aboutsummaryrefslogtreecommitdiffstats
path: root/drivers
diff options
context:
space:
mode:
authorDavid Woodhouse <David.Woodhouse@intel.com>2010-02-26 14:04:15 -0500
committerDavid Woodhouse <David.Woodhouse@intel.com>2010-02-26 14:06:24 -0500
commita7790532f5b7358c33a6b1834dc2b318de209f31 (patch)
tree0ceb9e24b3f54cb5c8453fb5a218e2a94a0f1cce /drivers
parent2764fb4244cc1bc08df3667924ca4a972e90ac70 (diff)
parent60b341b778cc2929df16c0a504c91621b3c6a4ad (diff)
Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6
The SmartMedia FTL code depends on new kfifo bits from 2.6.33
Diffstat (limited to 'drivers')
-rw-r--r--drivers/Kconfig2
-rw-r--r--drivers/accessibility/braille/braille_console.c1
-rw-r--r--drivers/acpi/Makefile1
-rw-r--r--drivers/acpi/acpi_pad.c40
-rw-r--r--drivers/acpi/acpica/acnamesp.h9
-rw-r--r--drivers/acpi/acpica/acobject.h6
-rw-r--r--drivers/acpi/acpica/dsmethod.c2
-rw-r--r--drivers/acpi/acpica/dswload.c64
-rw-r--r--drivers/acpi/acpica/evregion.c4
-rw-r--r--drivers/acpi/acpica/evrgnini.c15
-rw-r--r--drivers/acpi/acpica/evxface.c4
-rw-r--r--drivers/acpi/acpica/evxfevnt.c4
-rw-r--r--drivers/acpi/acpica/evxfregn.c4
-rw-r--r--drivers/acpi/acpica/exmutex.c18
-rw-r--r--drivers/acpi/acpica/nsaccess.c2
-rw-r--r--drivers/acpi/acpica/nsdump.c2
-rw-r--r--drivers/acpi/acpica/nseval.c18
-rw-r--r--drivers/acpi/acpica/nsnames.c2
-rw-r--r--drivers/acpi/acpica/nspredef.c93
-rw-r--r--drivers/acpi/acpica/nsrepair.c447
-rw-r--r--drivers/acpi/acpica/nsrepair2.c195
-rw-r--r--drivers/acpi/acpica/nsutils.c57
-rw-r--r--drivers/acpi/acpica/nsxfeval.c10
-rw-r--r--drivers/acpi/acpica/nsxfname.c10
-rw-r--r--drivers/acpi/acpica/nsxfobj.c14
-rw-r--r--drivers/acpi/acpica/psxface.c3
-rw-r--r--drivers/acpi/acpica/rsxface.c2
-rw-r--r--drivers/acpi/acpica/utcopy.c27
-rw-r--r--drivers/acpi/battery.c2
-rw-r--r--drivers/acpi/blacklist.c14
-rw-r--r--drivers/acpi/bus.c165
-rw-r--r--drivers/acpi/button.c7
-rw-r--r--drivers/acpi/debug.c84
-rw-r--r--drivers/acpi/dock.c262
-rw-r--r--drivers/acpi/ec.c136
-rw-r--r--drivers/acpi/fan.c2
-rw-r--r--drivers/acpi/internal.h1
-rw-r--r--drivers/acpi/numa.c21
-rw-r--r--drivers/acpi/osl.c2
-rw-r--r--drivers/acpi/pci_link.c2
-rw-r--r--drivers/acpi/pci_root.c78
-rw-r--r--drivers/acpi/power.c2
-rw-r--r--drivers/acpi/power_meter.c4
-rw-r--r--drivers/acpi/processor_core.c81
-rw-r--r--drivers/acpi/processor_idle.c111
-rw-r--r--drivers/acpi/processor_pdc.c209
-rw-r--r--drivers/acpi/processor_perflib.c56
-rw-r--r--drivers/acpi/processor_thermal.c3
-rw-r--r--drivers/acpi/sbs.c3
-rw-r--r--drivers/acpi/sbshc.c2
-rw-r--r--drivers/acpi/scan.c27
-rw-r--r--drivers/acpi/sleep.c29
-rw-r--r--drivers/acpi/tables.c4
-rw-r--r--drivers/acpi/thermal.c7
-rw-r--r--drivers/acpi/video.c51
-rw-r--r--drivers/ata/Kconfig1
-rw-r--r--drivers/ata/ahci.c15
-rw-r--r--drivers/ata/ata_piix.c2
-rw-r--r--drivers/ata/libata-core.c38
-rw-r--r--drivers/ata/libata-eh.c5
-rw-r--r--drivers/ata/libata-scsi.c4
-rw-r--r--drivers/ata/libata-sff.c5
-rw-r--r--drivers/ata/pata_bf54x.c19
-rw-r--r--drivers/ata/pata_cmd64x.c118
-rw-r--r--drivers/ata/pata_hpt3x2n.c64
-rw-r--r--drivers/ata/pata_octeon_cf.c2
-rw-r--r--drivers/ata/sata_mv.c144
-rw-r--r--drivers/ata/sata_promise.c2
-rw-r--r--drivers/atm/iphase.c2
-rw-r--r--drivers/base/bus.c2
-rw-r--r--drivers/base/class.c2
-rw-r--r--drivers/base/core.c16
-rw-r--r--drivers/base/devtmpfs.c22
-rw-r--r--drivers/base/driver.c4
-rw-r--r--drivers/base/memory.c82
-rw-r--r--drivers/base/platform.c1
-rw-r--r--drivers/base/power/main.c145
-rw-r--r--drivers/base/power/runtime.c55
-rw-r--r--drivers/block/DAC960.c2
-rw-r--r--drivers/block/aoe/aoecmd.c17
-rw-r--r--drivers/block/cciss.c3
-rw-r--r--drivers/block/drbd/Kconfig2
-rw-r--r--drivers/block/drbd/drbd_int.h9
-rw-r--r--drivers/block/drbd/drbd_main.c8
-rw-r--r--drivers/block/drbd/drbd_nl.c19
-rw-r--r--drivers/block/drbd/drbd_proc.c2
-rw-r--r--drivers/block/drbd/drbd_receiver.c49
-rw-r--r--drivers/block/drbd/drbd_worker.c2
-rw-r--r--drivers/block/mg_disk.c2
-rw-r--r--drivers/block/pktcdvd.c2
-rw-r--r--drivers/bluetooth/Kconfig13
-rw-r--r--drivers/bluetooth/Makefile1
-rw-r--r--drivers/bluetooth/ath3k.c187
-rw-r--r--drivers/bluetooth/bluecard_cs.c4
-rw-r--r--drivers/bluetooth/bt3c_cs.c4
-rw-r--r--drivers/bluetooth/btmrvl_sdio.c1
-rw-r--r--drivers/bluetooth/btuart_cs.c4
-rw-r--r--drivers/bluetooth/btusb.c1
-rw-r--r--drivers/bluetooth/dtl1_cs.c4
-rw-r--r--drivers/char/Kconfig4
-rw-r--r--drivers/char/agp/amd64-agp.c20
-rw-r--r--drivers/char/agp/backend.c13
-rw-r--r--drivers/char/agp/hp-agp.c6
-rw-r--r--drivers/char/agp/intel-agp.c6
-rw-r--r--drivers/char/hw_random/core.c5
-rw-r--r--drivers/char/hw_random/virtio-rng.c6
-rw-r--r--drivers/char/ipmi/ipmi_si_intf.c118
-rw-r--r--drivers/char/keyboard.c10
-rw-r--r--drivers/char/mem.c30
-rw-r--r--drivers/char/nozomi.c50
-rw-r--r--drivers/char/nwflash.c1
-rw-r--r--drivers/char/random.c9
-rw-r--r--drivers/char/sonypi.c60
-rw-r--r--drivers/char/toshiba.c12
-rw-r--r--drivers/char/tpm/tpm_infineon.c79
-rw-r--r--drivers/char/tty_io.c2
-rw-r--r--drivers/char/uv_mmtimer.c18
-rw-r--r--drivers/clocksource/cs5535-clockevt.c2
-rw-r--r--drivers/connector/connector.c175
-rw-r--r--drivers/cpufreq/cpufreq_ondemand.c3
-rw-r--r--drivers/cpuidle/governors/menu.c12
-rw-r--r--drivers/crypto/padlock-sha.c23
-rw-r--r--drivers/dma/Kconfig18
-rw-r--r--drivers/dma/Makefile2
-rw-r--r--drivers/dma/at_hdmac.c4
-rw-r--r--drivers/dma/coh901318.c1323
-rw-r--r--drivers/dma/coh901318_lli.c318
-rw-r--r--drivers/dma/coh901318_lli.h124
-rw-r--r--drivers/dma/dmaengine.c1
-rw-r--r--drivers/dma/dmatest.c18
-rw-r--r--drivers/dma/dw_dmac.c2
-rw-r--r--drivers/dma/ioat/dma.c2
-rw-r--r--drivers/dma/ioat/dma.h18
-rw-r--r--drivers/dma/ioat/dma_v2.c69
-rw-r--r--drivers/dma/ioat/dma_v2.h2
-rw-r--r--drivers/dma/ioat/dma_v3.c60
-rw-r--r--drivers/dma/ioat/registers.h1
-rw-r--r--drivers/dma/iop-adma.c4
-rw-r--r--drivers/dma/ipu/ipu_idmac.c25
-rw-r--r--drivers/dma/ppc4xx/Makefile1
-rw-r--r--drivers/dma/ppc4xx/adma.c5027
-rw-r--r--drivers/dma/ppc4xx/adma.h195
-rw-r--r--drivers/dma/ppc4xx/dma.h223
-rw-r--r--drivers/dma/ppc4xx/xor.h110
-rw-r--r--drivers/dma/shdma.c354
-rw-r--r--drivers/dma/shdma.h23
-rw-r--r--drivers/edac/amd64_edac.c62
-rw-r--r--drivers/edac/edac_pci_sysfs.c2
-rw-r--r--drivers/edac/i5000_edac.c8
-rw-r--r--drivers/edac/mpc85xx_edac.c8
-rw-r--r--drivers/firewire/Kconfig44
-rw-r--r--drivers/firewire/core-card.c41
-rw-r--r--drivers/firewire/core-cdev.c39
-rw-r--r--drivers/firewire/core-transaction.c118
-rw-r--r--drivers/firewire/net.c53
-rw-r--r--drivers/firewire/ohci.c21
-rw-r--r--drivers/gpio/Kconfig9
-rw-r--r--drivers/gpio/Makefile1
-rw-r--r--drivers/gpio/adp5588-gpio.c266
-rw-r--r--drivers/gpio/gpiolib.c2
-rw-r--r--drivers/gpu/drm/Kconfig2
-rw-r--r--drivers/gpu/drm/Makefile1
-rw-r--r--drivers/gpu/drm/ati_pcigart.c10
-rw-r--r--drivers/gpu/drm/drm_bufs.c4
-rw-r--r--drivers/gpu/drm/drm_crtc.c1
-rw-r--r--drivers/gpu/drm/drm_crtc_helper.c29
-rw-r--r--drivers/gpu/drm/drm_drv.c13
-rw-r--r--drivers/gpu/drm/drm_edid.c66
-rw-r--r--drivers/gpu/drm/drm_fb_helper.c13
-rw-r--r--drivers/gpu/drm/drm_gem.c13
-rw-r--r--drivers/gpu/drm/drm_ioc32.c89
-rw-r--r--drivers/gpu/drm/drm_irq.c5
-rw-r--r--drivers/gpu/drm/drm_mm.c7
-rw-r--r--drivers/gpu/drm/drm_modes.c90
-rw-r--r--drivers/gpu/drm/drm_pci.c8
-rw-r--r--drivers/gpu/drm/i2c/ch7006_drv.c5
-rw-r--r--drivers/gpu/drm/i2c/ch7006_mode.c5
-rw-r--r--drivers/gpu/drm/i810/i810_dma.c2
-rw-r--r--drivers/gpu/drm/i810/i810_drv.c2
-rw-r--r--drivers/gpu/drm/i830/i830_dma.c2
-rw-r--r--drivers/gpu/drm/i830/i830_drv.c2
-rw-r--r--drivers/gpu/drm/i915/i915_debugfs.c33
-rw-r--r--drivers/gpu/drm/i915/i915_dma.c36
-rw-r--r--drivers/gpu/drm/i915/i915_drv.c272
-rw-r--r--drivers/gpu/drm/i915/i915_drv.h139
-rw-r--r--drivers/gpu/drm/i915/i915_gem.c390
-rw-r--r--drivers/gpu/drm/i915/i915_gem_tiling.c46
-rw-r--r--drivers/gpu/drm/i915/i915_ioc32.c23
-rw-r--r--drivers/gpu/drm/i915/i915_irq.c132
-rw-r--r--drivers/gpu/drm/i915/i915_reg.h14
-rw-r--r--drivers/gpu/drm/i915/i915_suspend.c12
-rw-r--r--drivers/gpu/drm/i915/intel_bios.c35
-rw-r--r--drivers/gpu/drm/i915/intel_bios.h40
-rw-r--r--drivers/gpu/drm/i915/intel_crt.c5
-rw-r--r--drivers/gpu/drm/i915/intel_display.c732
-rw-r--r--drivers/gpu/drm/i915/intel_dp.c81
-rw-r--r--drivers/gpu/drm/i915/intel_fb.c2
-rw-r--r--drivers/gpu/drm/i915/intel_hdmi.c55
-rw-r--r--drivers/gpu/drm/i915/intel_lvds.c116
-rw-r--r--drivers/gpu/drm/i915/intel_sdvo.c94
-rw-r--r--drivers/gpu/drm/mga/mga_drv.c2
-rw-r--r--drivers/gpu/drm/mga/mga_ioc32.c13
-rw-r--r--drivers/gpu/drm/nouveau/Kconfig2
-rw-r--r--drivers/gpu/drm/nouveau/Makefile5
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_acpi.c12
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_bios.c826
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_bios.h3
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_bo.c264
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_channel.c54
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_connector.c42
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_dma.c108
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_dma.h10
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_dp.c36
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_drv.c22
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_drv.h105
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_fbcon.c79
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_fbcon.h7
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_fence.c4
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_gem.c62
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_grctx.c161
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_grctx.h133
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_ioc32.c4
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_irq.c161
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_mem.c219
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_notifier.c13
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_object.c5
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_reg.h17
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_sgdma.c7
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_state.c216
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_ttm.c30
-rw-r--r--drivers/gpu/drm/nouveau/nv04_crtc.c10
-rw-r--r--drivers/gpu/drm/nouveau/nv04_dac.c49
-rw-r--r--drivers/gpu/drm/nouveau/nv04_dfp.c8
-rw-r--r--drivers/gpu/drm/nouveau/nv04_display.c11
-rw-r--r--drivers/gpu/drm/nouveau/nv04_fbcon.c50
-rw-r--r--drivers/gpu/drm/nouveau/nv04_fifo.c34
-rw-r--r--drivers/gpu/drm/nouveau/nv04_graph.c161
-rw-r--r--drivers/gpu/drm/nouveau/nv04_instmem.c2
-rw-r--r--drivers/gpu/drm/nouveau/nv10_fb.c32
-rw-r--r--drivers/gpu/drm/nouveau/nv10_graph.c225
-rw-r--r--drivers/gpu/drm/nouveau/nv17_tv.c121
-rw-r--r--drivers/gpu/drm/nouveau/nv20_graph.c61
-rw-r--r--drivers/gpu/drm/nouveau/nv40_fb.c53
-rw-r--r--drivers/gpu/drm/nouveau/nv40_graph.c306
-rw-r--r--drivers/gpu/drm/nouveau/nv40_grctx.c678
-rw-r--r--drivers/gpu/drm/nouveau/nv50_crtc.c53
-rw-r--r--drivers/gpu/drm/nouveau/nv50_cursor.c8
-rw-r--r--drivers/gpu/drm/nouveau/nv50_dac.c20
-rw-r--r--drivers/gpu/drm/nouveau/nv50_display.c37
-rw-r--r--drivers/gpu/drm/nouveau/nv50_fbcon.c32
-rw-r--r--drivers/gpu/drm/nouveau/nv50_fifo.c19
-rw-r--r--drivers/gpu/drm/nouveau/nv50_graph.c23
-rw-r--r--drivers/gpu/drm/nouveau/nv50_instmem.c58
-rw-r--r--drivers/gpu/drm/nouveau/nv50_sor.c30
-rw-r--r--drivers/gpu/drm/r128/r128_drv.c2
-rw-r--r--drivers/gpu/drm/r128/r128_ioc32.c16
-rw-r--r--drivers/gpu/drm/radeon/Kconfig12
-rw-r--r--drivers/gpu/drm/radeon/Makefile7
-rw-r--r--drivers/gpu/drm/radeon/ObjectID.h801
-rw-r--r--drivers/gpu/drm/radeon/atom.c121
-rw-r--r--drivers/gpu/drm/radeon/atom.h2
-rw-r--r--drivers/gpu/drm/radeon/atombios.h199
-rw-r--r--drivers/gpu/drm/radeon/atombios_crtc.c259
-rw-r--r--drivers/gpu/drm/radeon/atombios_dp.c39
-rw-r--r--drivers/gpu/drm/radeon/mkregtable.c4
-rw-r--r--drivers/gpu/drm/radeon/r100.c100
-rw-r--r--drivers/gpu/drm/radeon/r100_track.h9
-rw-r--r--drivers/gpu/drm/radeon/r200.c17
-rw-r--r--drivers/gpu/drm/radeon/r300.c87
-rw-r--r--drivers/gpu/drm/radeon/r300_cmdbuf.c6
-rw-r--r--drivers/gpu/drm/radeon/r300_reg.h1
-rw-r--r--drivers/gpu/drm/radeon/r420.c48
-rw-r--r--drivers/gpu/drm/radeon/r520.c4
-rw-r--r--drivers/gpu/drm/radeon/r600.c214
-rw-r--r--drivers/gpu/drm/radeon/r600_audio.c266
-rw-r--r--drivers/gpu/drm/radeon/r600_blit_kms.c28
-rw-r--r--drivers/gpu/drm/radeon/r600_cp.c9
-rw-r--r--drivers/gpu/drm/radeon/r600_cs.c87
-rw-r--r--drivers/gpu/drm/radeon/r600_hdmi.c506
-rw-r--r--drivers/gpu/drm/radeon/r600_reg.h74
-rw-r--r--drivers/gpu/drm/radeon/r600d.h25
-rw-r--r--drivers/gpu/drm/radeon/radeon.h65
-rw-r--r--drivers/gpu/drm/radeon/radeon_agp.c17
-rw-r--r--drivers/gpu/drm/radeon/radeon_asic.h30
-rw-r--r--drivers/gpu/drm/radeon/radeon_atombios.c166
-rw-r--r--drivers/gpu/drm/radeon/radeon_benchmark.c55
-rw-r--r--drivers/gpu/drm/radeon/radeon_clocks.c6
-rw-r--r--drivers/gpu/drm/radeon/radeon_combios.c79
-rw-r--r--drivers/gpu/drm/radeon/radeon_connectors.c76
-rw-r--r--drivers/gpu/drm/radeon/radeon_cp.c1
-rw-r--r--drivers/gpu/drm/radeon/radeon_cs.c11
-rw-r--r--drivers/gpu/drm/radeon/radeon_device.c87
-rw-r--r--drivers/gpu/drm/radeon/radeon_display.c70
-rw-r--r--drivers/gpu/drm/radeon/radeon_drv.c8
-rw-r--r--drivers/gpu/drm/radeon/radeon_drv.h3
-rw-r--r--drivers/gpu/drm/radeon/radeon_encoders.c213
-rw-r--r--drivers/gpu/drm/radeon/radeon_fb.c2
-rw-r--r--drivers/gpu/drm/radeon/radeon_fence.c18
-rw-r--r--drivers/gpu/drm/radeon/radeon_gem.c13
-rw-r--r--drivers/gpu/drm/radeon/radeon_ioc32.c38
-rw-r--r--drivers/gpu/drm/radeon/radeon_irq.c10
-rw-r--r--drivers/gpu/drm/radeon/radeon_irq_kms.c10
-rw-r--r--drivers/gpu/drm/radeon/radeon_legacy_crtc.c82
-rw-r--r--drivers/gpu/drm/radeon/radeon_legacy_encoders.c23
-rw-r--r--drivers/gpu/drm/radeon/radeon_legacy_tv.c14
-rw-r--r--drivers/gpu/drm/radeon/radeon_mode.h65
-rw-r--r--drivers/gpu/drm/radeon/radeon_object.c65
-rw-r--r--drivers/gpu/drm/radeon/radeon_object.h20
-rw-r--r--drivers/gpu/drm/radeon/radeon_pm.c7
-rw-r--r--drivers/gpu/drm/radeon/radeon_ring.c107
-rw-r--r--drivers/gpu/drm/radeon/radeon_test.c4
-rw-r--r--drivers/gpu/drm/radeon/radeon_ttm.c23
-rw-r--r--drivers/gpu/drm/radeon/reg_srcs/r2002
-rw-r--r--drivers/gpu/drm/radeon/reg_srcs/r420795
-rw-r--r--drivers/gpu/drm/radeon/reg_srcs/rs60068
-rw-r--r--drivers/gpu/drm/radeon/reg_srcs/rv5156
-rw-r--r--drivers/gpu/drm/radeon/rs400.c32
-rw-r--r--drivers/gpu/drm/radeon/rs600.c14
-rw-r--r--drivers/gpu/drm/radeon/rs690.c4
-rw-r--r--drivers/gpu/drm/radeon/rv515.c5
-rw-r--r--drivers/gpu/drm/radeon/rv770.c90
-rw-r--r--drivers/gpu/drm/savage/savage_drv.c2
-rw-r--r--drivers/gpu/drm/sis/sis_drv.c2
-rw-r--r--drivers/gpu/drm/tdfx/tdfx_drv.c2
-rw-r--r--drivers/gpu/drm/ttm/ttm_bo.c152
-rw-r--r--drivers/gpu/drm/ttm/ttm_bo_util.c9
-rw-r--r--drivers/gpu/drm/ttm/ttm_bo_vm.c2
-rw-r--r--drivers/gpu/drm/ttm/ttm_lock.c2
-rw-r--r--drivers/gpu/drm/ttm/ttm_object.c2
-rw-r--r--drivers/gpu/drm/ttm/ttm_tt.c35
-rw-r--r--drivers/gpu/drm/via/via_drv.c2
-rw-r--r--drivers/gpu/drm/vmwgfx/Kconfig13
-rw-r--r--drivers/gpu/drm/vmwgfx/Makefile9
-rw-r--r--drivers/gpu/drm/vmwgfx/svga3d_reg.h1793
-rw-r--r--drivers/gpu/drm/vmwgfx/svga_escape.h89
-rw-r--r--drivers/gpu/drm/vmwgfx/svga_overlay.h201
-rw-r--r--drivers/gpu/drm/vmwgfx/svga_reg.h1346
-rw-r--r--drivers/gpu/drm/vmwgfx/svga_types.h45
-rw-r--r--drivers/gpu/drm/vmwgfx/vmwgfx_buffer.c252
-rw-r--r--drivers/gpu/drm/vmwgfx/vmwgfx_drv.c783
-rw-r--r--drivers/gpu/drm/vmwgfx/vmwgfx_drv.h521
-rw-r--r--drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c716
-rw-r--r--drivers/gpu/drm/vmwgfx/vmwgfx_fb.c737
-rw-r--r--drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c538
-rw-r--r--drivers/gpu/drm/vmwgfx/vmwgfx_gmr.c213
-rw-r--r--drivers/gpu/drm/vmwgfx/vmwgfx_ioctl.c87
-rw-r--r--drivers/gpu/drm/vmwgfx/vmwgfx_irq.c286
-rw-r--r--drivers/gpu/drm/vmwgfx/vmwgfx_kms.c880
-rw-r--r--drivers/gpu/drm/vmwgfx/vmwgfx_kms.h102
-rw-r--r--drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c516
-rw-r--r--drivers/gpu/drm/vmwgfx/vmwgfx_overlay.c625
-rw-r--r--drivers/gpu/drm/vmwgfx/vmwgfx_reg.h57
-rw-r--r--drivers/gpu/drm/vmwgfx/vmwgfx_resource.c1187
-rw-r--r--drivers/gpu/drm/vmwgfx/vmwgfx_ttm_glue.c99
-rw-r--r--drivers/gpu/vga/vgaarb.c2
-rw-r--r--drivers/hid/hid-apple.c7
-rw-r--r--drivers/hid/hid-core.c4
-rw-r--r--drivers/hid/hid-ids.h6
-rw-r--r--drivers/hid/hid-lg.h2
-rw-r--r--drivers/hid/hid-samsung.c25
-rw-r--r--drivers/hid/hid-wacom.c4
-rw-r--r--drivers/hwmon/Kconfig49
-rw-r--r--drivers/hwmon/Makefile4
-rw-r--r--drivers/hwmon/adt7462.c4
-rw-r--r--drivers/hwmon/amc6821.c1115
-rw-r--r--drivers/hwmon/asus_atk0110.c304
-rw-r--r--drivers/hwmon/coretemp.c16
-rw-r--r--drivers/hwmon/fschmd.c7
-rw-r--r--drivers/hwmon/k10temp.c223
-rw-r--r--drivers/hwmon/k8temp.c2
-rw-r--r--drivers/hwmon/lis3lv02d_i2c.c183
-rw-r--r--drivers/hwmon/lm78.c25
-rw-r--r--drivers/hwmon/sht15.c6
-rw-r--r--drivers/hwmon/sis5595.c2
-rw-r--r--drivers/hwmon/smsc47m1.c153
-rw-r--r--drivers/hwmon/via-cputemp.c356
-rw-r--r--drivers/hwmon/via686a.c2
-rw-r--r--drivers/hwmon/vt8231.c2
-rw-r--r--drivers/hwmon/w83627hf.c2
-rw-r--r--drivers/hwmon/w83781d.c26
-rw-r--r--drivers/i2c/busses/i2c-ali1563.c8
-rw-r--r--drivers/i2c/busses/i2c-bfin-twi.c6
-rw-r--r--drivers/i2c/busses/i2c-imx.c26
-rw-r--r--drivers/i2c/busses/i2c-omap.c13
-rw-r--r--drivers/i2c/busses/i2c-pca-isa.c4
-rw-r--r--drivers/i2c/busses/i2c-pca-platform.c4
-rw-r--r--drivers/i2c/busses/i2c-piix4.c4
-rw-r--r--drivers/i2c/busses/i2c-tiny-usb.c12
-rw-r--r--drivers/i2c/busses/i2c-viapro.c4
-rw-r--r--drivers/i2c/i2c-core.c7
-rw-r--r--drivers/idle/i7300_idle.c15
-rw-r--r--drivers/ieee1394/Kconfig59
-rw-r--r--drivers/infiniband/core/addr.c275
-rw-r--r--drivers/infiniband/core/cma.c129
-rw-r--r--drivers/infiniband/core/sa_query.c6
-rw-r--r--drivers/infiniband/core/ucma.c57
-rw-r--r--drivers/infiniband/core/uverbs_cmd.c2
-rw-r--r--drivers/infiniband/core/uverbs_main.c9
-rw-r--r--drivers/infiniband/hw/amso1100/c2_qp.c14
-rw-r--r--drivers/infiniband/hw/cxgb3/cxio_hal.h9
-rw-r--r--drivers/infiniband/hw/cxgb3/cxio_resource.c75
-rw-r--r--drivers/infiniband/hw/cxgb3/iwch_qp.c32
-rw-r--r--drivers/infiniband/hw/ehca/ehca_classes.h1
-rw-r--r--drivers/infiniband/hw/ehca/ehca_eq.c9
-rw-r--r--drivers/infiniband/hw/ehca/ehca_main.c2
-rw-r--r--drivers/infiniband/hw/ehca/ehca_reqs.c67
-rw-r--r--drivers/infiniband/hw/ipath/ipath_driver.c10
-rw-r--r--drivers/infiniband/hw/ipath/ipath_fs.c4
-rw-r--r--drivers/infiniband/hw/mlx4/main.c2
-rw-r--r--drivers/infiniband/hw/mlx4/qp.c27
-rw-r--r--drivers/infiniband/hw/mlx4/srq.c6
-rw-r--r--drivers/infiniband/hw/nes/Kconfig9
-rw-r--r--drivers/infiniband/hw/nes/nes.c5
-rw-r--r--drivers/infiniband/hw/nes/nes.h2
-rw-r--r--drivers/infiniband/hw/nes/nes_cm.c201
-rw-r--r--drivers/infiniband/hw/nes/nes_cm.h7
-rw-r--r--drivers/infiniband/hw/nes/nes_context.h2
-rw-r--r--drivers/infiniband/hw/nes/nes_hw.c40
-rw-r--r--drivers/infiniband/hw/nes/nes_hw.h29
-rw-r--r--drivers/infiniband/hw/nes/nes_nic.c2
-rw-r--r--drivers/infiniband/hw/nes/nes_user.h3
-rw-r--r--drivers/infiniband/hw/nes/nes_utils.c2
-rw-r--r--drivers/infiniband/hw/nes/nes_verbs.c817
-rw-r--r--drivers/infiniband/hw/nes/nes_verbs.h23
-rw-r--r--drivers/infiniband/ulp/ipoib/ipoib_main.c1
-rw-r--r--drivers/infiniband/ulp/iser/iser_memory.c122
-rw-r--r--drivers/input/evdev.c3
-rw-r--r--drivers/input/ff-memless.c48
-rw-r--r--drivers/input/input-polldev.c6
-rw-r--r--drivers/input/input.c97
-rw-r--r--drivers/input/joystick/gf2k.c2
-rw-r--r--drivers/input/joystick/iforce/iforce-main.c29
-rw-r--r--drivers/input/joystick/iforce/iforce-usb.c29
-rw-r--r--drivers/input/joystick/iforce/iforce.h2
-rw-r--r--drivers/input/joystick/xpad.c4
-rw-r--r--drivers/input/keyboard/atkbd.c74
-rw-r--r--drivers/input/keyboard/davinci_keyscan.c8
-rw-r--r--drivers/input/keyboard/ep93xx_keypad.c150
-rw-r--r--drivers/input/keyboard/matrix_keypad.c29
-rw-r--r--drivers/input/keyboard/twl4030_keypad.c11
-rw-r--r--drivers/input/misc/twl4030-pwrbutton.c14
-rw-r--r--drivers/input/misc/winbond-cir.c2
-rw-r--r--drivers/input/misc/wistron_btns.c2
-rw-r--r--drivers/input/mouse/Kconfig2
-rw-r--r--drivers/input/mouse/alps.c265
-rw-r--r--drivers/input/mouse/alps.h1
-rw-r--r--drivers/input/mouse/bcm5974.c44
-rw-r--r--drivers/input/mouse/hgpk.c1
-rw-r--r--drivers/input/mouse/lifebook.c8
-rw-r--r--drivers/input/mouse/psmouse-base.c83
-rw-r--r--drivers/input/mouse/sentelic.c6
-rw-r--r--drivers/input/mouse/synaptics.c10
-rw-r--r--drivers/input/mouse/synaptics.h1
-rw-r--r--drivers/input/serio/altera_ps2.c15
-rw-r--r--drivers/input/serio/ambakmi.c9
-rw-r--r--drivers/input/serio/at32psif.c3
-rw-r--r--drivers/input/serio/gscps2.c6
-rw-r--r--drivers/input/serio/hil_mlc.c8
-rw-r--r--drivers/input/serio/i8042-x86ia64io.h15
-rw-r--r--drivers/input/serio/i8042.c96
-rw-r--r--drivers/input/serio/sa1111ps2.c10
-rw-r--r--drivers/input/serio/serio.c11
-rw-r--r--drivers/input/tablet/wacom.h11
-rw-r--r--drivers/input/tablet/wacom_sys.c231
-rw-r--r--drivers/input/tablet/wacom_wac.c368
-rw-r--r--drivers/input/tablet/wacom_wac.h29
-rw-r--r--drivers/input/touchscreen/Kconfig12
-rw-r--r--drivers/input/touchscreen/Makefile1
-rw-r--r--drivers/input/touchscreen/ad7879.c197
-rw-r--r--drivers/input/touchscreen/mc13783_ts.c258
-rw-r--r--drivers/input/touchscreen/usbtouchscreen.c8
-rw-r--r--drivers/isdn/hardware/mISDN/hfcmulti.c2
-rw-r--r--drivers/isdn/mISDN/l1oip_core.c2
-rw-r--r--drivers/leds/Kconfig33
-rw-r--r--drivers/leds/Makefile4
-rw-r--r--drivers/leds/leds-adp5520.c230
-rw-r--r--drivers/leds/leds-alix2.c115
-rw-r--r--drivers/leds/leds-cobalt-qube.c4
-rw-r--r--drivers/leds/leds-cobalt-raq.c2
-rw-r--r--drivers/leds/leds-lt3593.c217
-rw-r--r--drivers/leds/leds-pwm.c5
-rw-r--r--drivers/leds/leds-regulator.c242
-rw-r--r--drivers/leds/leds-ss4200.c556
-rw-r--r--drivers/lguest/segments.c4
-rw-r--r--drivers/macintosh/smu.c2
-rw-r--r--drivers/macintosh/therm_pm72.c2
-rw-r--r--drivers/macintosh/therm_windtunnel.c2
-rw-r--r--drivers/md/dm-log-userspace-transfer.c10
-rw-r--r--drivers/md/dm-raid1.c2
-rw-r--r--drivers/md/dm-region-hash.c5
-rw-r--r--drivers/md/dm-snap-persistent.c2
-rw-r--r--drivers/md/dm-stripe.c2
-rw-r--r--drivers/md/dm-sysfs.c8
-rw-r--r--drivers/md/dm-table.c20
-rw-r--r--drivers/md/dm.c21
-rw-r--r--drivers/md/md.c56
-rw-r--r--drivers/md/raid5.c14
-rw-r--r--drivers/media/IR/ir-keytable.c2
-rw-r--r--drivers/media/common/saa7146_video.c4
-rw-r--r--drivers/media/common/tuners/tda8290.c12
-rw-r--r--drivers/media/dvb/Kconfig4
-rw-r--r--drivers/media/dvb/Makefile14
-rw-r--r--drivers/media/dvb/dvb-core/dmxdev.c2
-rw-r--r--drivers/media/dvb/dvb-core/dvb_demux.c20
-rw-r--r--drivers/media/dvb/dvb-usb/Kconfig4
-rw-r--r--drivers/media/dvb/firewire/firedtv-fw.c12
-rw-r--r--drivers/media/dvb/frontends/Kconfig19
-rw-r--r--drivers/media/dvb/frontends/Makefile2
-rw-r--r--drivers/media/dvb/frontends/dib8000.h2
-rw-r--r--drivers/media/dvb/frontends/l64781.c4
-rw-r--r--drivers/media/dvb/frontends/lgdt3305.h6
-rw-r--r--drivers/media/dvb/frontends/mb86a16.c1878
-rw-r--r--drivers/media/dvb/frontends/mb86a16.h52
-rw-r--r--drivers/media/dvb/frontends/mb86a16_priv.h151
-rw-r--r--drivers/media/dvb/frontends/tda10021.c4
-rw-r--r--drivers/media/dvb/frontends/tda665x.c257
-rw-r--r--drivers/media/dvb/frontends/tda665x.h52
-rw-r--r--drivers/media/dvb/mantis/Kconfig32
-rw-r--r--drivers/media/dvb/mantis/Makefile28
-rw-r--r--drivers/media/dvb/mantis/hopper_cards.c275
-rw-r--r--drivers/media/dvb/mantis/hopper_vp3028.c88
-rw-r--r--drivers/media/dvb/mantis/hopper_vp3028.h30
-rw-r--r--drivers/media/dvb/mantis/mantis_ca.c207
-rw-r--r--drivers/media/dvb/mantis/mantis_ca.h27
-rw-r--r--drivers/media/dvb/mantis/mantis_cards.c305
-rw-r--r--drivers/media/dvb/mantis/mantis_common.h179
-rw-r--r--drivers/media/dvb/mantis/mantis_core.c238
-rw-r--r--drivers/media/dvb/mantis/mantis_core.h57
-rw-r--r--drivers/media/dvb/mantis/mantis_dma.c256
-rw-r--r--drivers/media/dvb/mantis/mantis_dma.h30
-rw-r--r--drivers/media/dvb/mantis/mantis_dvb.c296
-rw-r--r--drivers/media/dvb/mantis/mantis_dvb.h35
-rw-r--r--drivers/media/dvb/mantis/mantis_evm.c117
-rw-r--r--drivers/media/dvb/mantis/mantis_hif.c240
-rw-r--r--drivers/media/dvb/mantis/mantis_hif.h29
-rw-r--r--drivers/media/dvb/mantis/mantis_i2c.c267
-rw-r--r--drivers/media/dvb/mantis/mantis_i2c.h30
-rw-r--r--drivers/media/dvb/mantis/mantis_input.c148
-rw-r--r--drivers/media/dvb/mantis/mantis_ioc.c130
-rw-r--r--drivers/media/dvb/mantis/mantis_ioc.h51
-rw-r--r--drivers/media/dvb/mantis/mantis_link.h83
-rw-r--r--drivers/media/dvb/mantis/mantis_pci.c177
-rw-r--r--drivers/media/dvb/mantis/mantis_pci.h27
-rw-r--r--drivers/media/dvb/mantis/mantis_pcmcia.c120
-rw-r--r--drivers/media/dvb/mantis/mantis_reg.h197
-rw-r--r--drivers/media/dvb/mantis/mantis_uart.c186
-rw-r--r--drivers/media/dvb/mantis/mantis_uart.h58
-rw-r--r--drivers/media/dvb/mantis/mantis_vp1033.c212
-rw-r--r--drivers/media/dvb/mantis/mantis_vp1033.h30
-rw-r--r--drivers/media/dvb/mantis/mantis_vp1034.c119
-rw-r--r--drivers/media/dvb/mantis/mantis_vp1034.h33
-rw-r--r--drivers/media/dvb/mantis/mantis_vp1041.c358
-rw-r--r--drivers/media/dvb/mantis/mantis_vp1041.h33
-rw-r--r--drivers/media/dvb/mantis/mantis_vp2033.c187
-rw-r--r--drivers/media/dvb/mantis/mantis_vp2033.h30
-rw-r--r--drivers/media/dvb/mantis/mantis_vp2040.c186
-rw-r--r--drivers/media/dvb/mantis/mantis_vp2040.h32
-rw-r--r--drivers/media/dvb/mantis/mantis_vp3028.c38
-rw-r--r--drivers/media/dvb/mantis/mantis_vp3028.h33
-rw-r--r--drivers/media/dvb/mantis/mantis_vp3030.c105
-rw-r--r--drivers/media/dvb/mantis/mantis_vp3030.h30
-rw-r--r--drivers/media/video/bt8xx/bttv-driver.c1
-rw-r--r--drivers/media/video/bt8xx/bttv-i2c.c8
-rw-r--r--drivers/media/video/bt8xx/bttvp.h1
-rw-r--r--drivers/media/video/cx23885/cx23888-ir.c44
-rw-r--r--drivers/media/video/gspca/gspca.c2
-rw-r--r--drivers/media/video/gspca/m5602/m5602_s5k4aa.c6
-rw-r--r--drivers/media/video/gspca/ov534.c2
-rw-r--r--drivers/media/video/gspca/sn9c20x.c2
-rw-r--r--drivers/media/video/gspca/stv06xx/stv06xx_vv6410.h1
-rw-r--r--drivers/media/video/gspca/sunplus.c26
-rw-r--r--drivers/media/video/gspca/vc032x.c4
-rw-r--r--drivers/media/video/meye.c60
-rw-r--r--drivers/media/video/meye.h4
-rw-r--r--drivers/media/video/mt9t112.c2
-rw-r--r--drivers/media/video/mx1_camera.c2
-rw-r--r--drivers/media/video/pwc/pwc-ctrl.c2
-rw-r--r--drivers/media/video/rj54n1cb0c.c2
-rw-r--r--drivers/media/video/saa7134/saa7134-core.c13
-rw-r--r--drivers/media/video/saa7134/saa7134-empress.c8
-rw-r--r--drivers/media/video/saa7134/saa7134-ts.c13
-rw-r--r--drivers/media/video/sh_mobile_ceu_camera.c2
-rw-r--r--drivers/media/video/uvc/uvc_ctrl.c2
-rw-r--r--drivers/media/video/uvc/uvc_queue.c13
-rw-r--r--drivers/media/video/uvc/uvc_video.c45
-rw-r--r--drivers/media/video/uvc/uvcvideo.h5
-rw-r--r--drivers/message/fusion/mptbase.c8
-rw-r--r--drivers/message/fusion/mptscsih.c2
-rw-r--r--drivers/message/i2o/i2o_config.c13
-rw-r--r--drivers/mfd/Makefile8
-rw-r--r--drivers/mfd/asic3.c40
-rw-r--r--drivers/mfd/mc13783-core.c4
-rw-r--r--drivers/mfd/t7l66xb.c55
-rw-r--r--drivers/mfd/tc6387xb.c119
-rw-r--r--drivers/mfd/tc6393xb.c56
-rw-r--r--drivers/mfd/tmio_core.c52
-rw-r--r--drivers/mfd/twl4030-irq.c4
-rw-r--r--drivers/mfd/wm8350-core.c3
-rw-r--r--drivers/mfd/wm8350-irq.c4
-rw-r--r--drivers/misc/Kconfig14
-rw-r--r--drivers/misc/enclosure.c1
-rw-r--r--drivers/mmc/card/block.c8
-rw-r--r--drivers/mmc/card/mmc_test.c9
-rw-r--r--drivers/mmc/card/queue.c18
-rw-r--r--drivers/mmc/core/mmc.c2
-rw-r--r--drivers/mmc/core/sdio.c5
-rw-r--r--drivers/mmc/core/sdio_bus.c7
-rw-r--r--drivers/mmc/host/Kconfig37
-rw-r--r--drivers/mmc/host/Makefile6
-rw-r--r--drivers/mmc/host/sdhci-of-core.c (renamed from drivers/mmc/host/sdhci-of.c)143
-rw-r--r--drivers/mmc/host/sdhci-of-esdhc.c143
-rw-r--r--drivers/mmc/host/sdhci-of-hlwd.c65
-rw-r--r--drivers/mmc/host/sdhci-of.h42
-rw-r--r--drivers/mmc/host/sdhci.h4
-rw-r--r--drivers/mmc/host/tmio_mmc.c59
-rw-r--r--drivers/mmc/host/tmio_mmc.h46
-rw-r--r--drivers/mtd/maps/Kconfig17
-rw-r--r--drivers/mtd/maps/pismo.c320
-rw-r--r--drivers/mtd/maps/pxa2xx-flash.c13
-rw-r--r--drivers/mtd/nand/Kconfig8
-rw-r--r--drivers/mtd/nand/Makefile1
-rw-r--r--drivers/mtd/nand/excite_nandflash.c248
-rw-r--r--drivers/mtd/tests/mtd_readtest.c6
-rw-r--r--drivers/mtd/tests/mtd_speedtest.c7
-rw-r--r--drivers/mtd/tests/mtd_stresstest.c6
-rw-r--r--drivers/mtd/ubi/cdev.c1
-rw-r--r--drivers/mtd/ubi/kapi.c15
-rw-r--r--drivers/mtd/ubi/upd.c1
-rw-r--r--drivers/mtd/ubi/vtbl.c1
-rw-r--r--drivers/net/3c507.c4
-rw-r--r--drivers/net/Kconfig4
-rw-r--r--drivers/net/Makefile2
-rw-r--r--drivers/net/arm/Kconfig1
-rw-r--r--drivers/net/atarilance.c2
-rw-r--r--drivers/net/atlx/atl2.c7
-rw-r--r--drivers/net/ax88796.c2
-rw-r--r--drivers/net/bcm63xx_enet.c12
-rw-r--r--drivers/net/benet/be.h6
-rw-r--r--drivers/net/benet/be_cmds.c39
-rw-r--r--drivers/net/benet/be_cmds.h19
-rw-r--r--drivers/net/benet/be_ethtool.c77
-rw-r--r--drivers/net/benet/be_main.c35
-rw-r--r--drivers/net/bfin_mac.c5
-rw-r--r--drivers/net/bnx2.c12
-rw-r--r--drivers/net/bnx2x_main.c2
-rw-r--r--drivers/net/bonding/bond_3ad.c171
-rw-r--r--drivers/net/bonding/bond_alb.c38
-rw-r--r--drivers/net/bonding/bond_ipv6.c12
-rw-r--r--drivers/net/bonding/bond_main.c609
-rw-r--r--drivers/net/bonding/bond_sysfs.c327
-rw-r--r--drivers/net/can/Kconfig2
-rw-r--r--drivers/net/can/at91_can.c4
-rw-r--r--drivers/net/can/bfin_can.c2
-rw-r--r--drivers/net/can/mcp251x.c15
-rw-r--r--drivers/net/can/mscan/mscan.c3
-rw-r--r--drivers/net/can/sja1000/sja1000.c18
-rw-r--r--drivers/net/can/ti_hecc.c2
-rw-r--r--drivers/net/can/usb/ems_usb.c2
-rw-r--r--drivers/net/cpmac.c2
-rw-r--r--drivers/net/cs89x0.c3
-rw-r--r--drivers/net/cxgb3/sge.c20
-rw-r--r--drivers/net/davinci_emac.c6
-rw-r--r--drivers/net/e100.c2
-rw-r--r--drivers/net/e1000/e1000.h2
-rw-r--r--drivers/net/e1000/e1000_main.c62
-rw-r--r--drivers/net/e1000e/82571.c8
-rw-r--r--drivers/net/e1000e/e1000.h2
-rw-r--r--drivers/net/e1000e/es2lan.c2
-rw-r--r--drivers/net/e1000e/hw.h1
-rw-r--r--drivers/net/e1000e/ich8lan.c78
-rw-r--r--drivers/net/e1000e/lib.c54
-rw-r--r--drivers/net/e1000e/netdev.c87
-rw-r--r--drivers/net/e1000e/phy.c85
-rw-r--r--drivers/net/fsl_pq_mdio.c30
-rw-r--r--drivers/net/gianfar.c63
-rw-r--r--drivers/net/gianfar.h18
-rw-r--r--drivers/net/hamradio/bpqether.c4
-rw-r--r--drivers/net/ibmlana.c3
-rw-r--r--drivers/net/igb/e1000_82575.c4
-rw-r--r--drivers/net/igb/e1000_phy.c9
-rw-r--r--drivers/net/igb/igb_ethtool.c2
-rw-r--r--drivers/net/igb/igb_main.c33
-rw-r--r--drivers/net/igbvf/netdev.c18
-rw-r--r--drivers/net/ixgb/ixgb_main.c10
-rw-r--r--drivers/net/ixgbe/Makefile2
-rw-r--r--drivers/net/ixgbe/ixgbe.h2
-rw-r--r--drivers/net/ixgbe/ixgbe_82598.c62
-rw-r--r--drivers/net/ixgbe/ixgbe_82599.c2
-rw-r--r--drivers/net/ixgbe/ixgbe_common.c2
-rw-r--r--drivers/net/ixgbe/ixgbe_common.h2
-rw-r--r--drivers/net/ixgbe/ixgbe_dcb.c2
-rw-r--r--drivers/net/ixgbe/ixgbe_dcb.h2
-rw-r--r--drivers/net/ixgbe/ixgbe_dcb_82598.c2
-rw-r--r--drivers/net/ixgbe/ixgbe_dcb_82598.h2
-rw-r--r--drivers/net/ixgbe/ixgbe_dcb_82599.c2
-rw-r--r--drivers/net/ixgbe/ixgbe_dcb_82599.h2
-rw-r--r--drivers/net/ixgbe/ixgbe_dcb_nl.c18
-rw-r--r--drivers/net/ixgbe/ixgbe_ethtool.c2
-rw-r--r--drivers/net/ixgbe/ixgbe_fcoe.c2
-rw-r--r--drivers/net/ixgbe/ixgbe_fcoe.h2
-rw-r--r--drivers/net/ixgbe/ixgbe_main.c65
-rw-r--r--drivers/net/ixgbe/ixgbe_phy.c2
-rw-r--r--drivers/net/ixgbe/ixgbe_phy.h2
-rw-r--r--drivers/net/ixgbe/ixgbe_type.h4
-rw-r--r--drivers/net/ks8851_mll.c4
-rw-r--r--drivers/net/ll_temac_main.c2
-rw-r--r--drivers/net/mlx4/fw.c3
-rw-r--r--drivers/net/mlx4/main.c2
-rw-r--r--drivers/net/mlx4/sense.c2
-rw-r--r--drivers/net/mv643xx_eth.c6
-rw-r--r--drivers/net/netxen/netxen_nic.h4
-rw-r--r--drivers/net/netxen/netxen_nic_ethtool.c193
-rw-r--r--drivers/net/netxen/netxen_nic_hw.c6
-rw-r--r--drivers/net/netxen/netxen_nic_init.c4
-rw-r--r--drivers/net/netxen/netxen_nic_main.c71
-rw-r--r--drivers/net/niu.c2
-rw-r--r--drivers/net/octeon/Kconfig10
-rw-r--r--drivers/net/octeon/Makefile2
-rw-r--r--drivers/net/octeon/octeon_mgmt.c1176
-rw-r--r--drivers/net/pcmcia/3c574_cs.c4
-rw-r--r--drivers/net/pcmcia/3c589_cs.c4
-rw-r--r--drivers/net/pcmcia/fmvj18x_cs.c1
-rw-r--r--drivers/net/pcmcia/nmclan_cs.c1
-rw-r--r--drivers/net/pcmcia/pcnet_cs.c4
-rw-r--r--drivers/net/pcnet32.c3
-rw-r--r--drivers/net/phy/Kconfig11
-rw-r--r--drivers/net/phy/Makefile1
-rw-r--r--drivers/net/phy/broadcom.c7
-rw-r--r--drivers/net/phy/mdio-octeon.c180
-rw-r--r--drivers/net/phy/mdio_bus.c72
-rw-r--r--drivers/net/phy/phy.c4
-rw-r--r--drivers/net/phy/phy_device.c31
-rw-r--r--drivers/net/qlge/qlge_main.c15
-rw-r--r--drivers/net/rrunner.c2
-rw-r--r--drivers/net/s2io.c2
-rw-r--r--drivers/net/sfc/efx.c7
-rw-r--r--drivers/net/sfc/falcon.c1
-rw-r--r--drivers/net/sfc/falcon_boards.c45
-rw-r--r--drivers/net/sfc/falcon_xmac.c38
-rw-r--r--drivers/net/sfc/mcdi.c14
-rw-r--r--drivers/net/sfc/mcdi.h1
-rw-r--r--drivers/net/sfc/mcdi_pcol.h4
-rw-r--r--drivers/net/sfc/mcdi_phy.c93
-rw-r--r--drivers/net/sfc/mtd.c5
-rw-r--r--drivers/net/sfc/net_driver.h1
-rw-r--r--drivers/net/sfc/nic.c2
-rw-r--r--drivers/net/sfc/qt202x_phy.c246
-rw-r--r--drivers/net/sfc/selftest.c10
-rw-r--r--drivers/net/sfc/siena.c1
-rw-r--r--drivers/net/sfc/tenxpress.c138
-rw-r--r--drivers/net/sfc/tx.c4
-rw-r--r--drivers/net/sh_eth.c9
-rw-r--r--drivers/net/sky2.c43
-rw-r--r--drivers/net/starfire.c5
-rw-r--r--drivers/net/tc35815.c1
-rw-r--r--drivers/net/tg3.c27
-rw-r--r--drivers/net/tg3.h3
-rw-r--r--drivers/net/tulip/Kconfig4
-rw-r--r--drivers/net/tulip/dmfe.c21
-rw-r--r--drivers/net/tulip/tulip_core.c33
-rw-r--r--drivers/net/tun.c6
-rw-r--r--drivers/net/ucc_geth.c48
-rw-r--r--drivers/net/ucc_geth.h13
-rw-r--r--drivers/net/usb/cdc_ether.c7
-rw-r--r--drivers/net/usb/hso.c105
-rw-r--r--drivers/net/usb/rtl8150.c6
-rw-r--r--drivers/net/via-rhine.c41
-rw-r--r--drivers/net/via-velocity.c49
-rw-r--r--drivers/net/virtio_net.c3
-rw-r--r--drivers/net/vxge/vxge-main.c8
-rw-r--r--drivers/net/wimax/i2400m/i2400m-usb.h2
-rw-r--r--drivers/net/wimax/i2400m/usb.c12
-rw-r--r--drivers/net/wireless/ath/ath5k/base.c18
-rw-r--r--drivers/net/wireless/ath/ath5k/eeprom.c32
-rw-r--r--drivers/net/wireless/ath/ath5k/eeprom.h8
-rw-r--r--drivers/net/wireless/ath/ath9k/Kconfig2
-rw-r--r--drivers/net/wireless/ath/ath9k/ath9k.h6
-rw-r--r--drivers/net/wireless/ath/ath9k/hw.c7
-rw-r--r--drivers/net/wireless/ath/ath9k/mac.c2
-rw-r--r--drivers/net/wireless/ath/ath9k/mac.h3
-rw-r--r--drivers/net/wireless/ath/ath9k/main.c22
-rw-r--r--drivers/net/wireless/ath/ath9k/pci.c2
-rw-r--r--drivers/net/wireless/ath/ath9k/xmit.c46
-rw-r--r--drivers/net/wireless/b43/b43.h1
-rw-r--r--drivers/net/wireless/b43/dma.c197
-rw-r--r--drivers/net/wireless/b43/dma.h7
-rw-r--r--drivers/net/wireless/b43/main.c13
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-3945.c15
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-3945.h1
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-4965.c6
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-5000-hw.h14
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-5000.c20
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-agn-rs.c2
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-agn.c6
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-core.c46
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-core.h4
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-csr.h8
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-dev.h15
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-devtrace.c26
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-devtrace.h26
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-eeprom.c37
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-eeprom.h4
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-hcmd.c2
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-rx.c61
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-scan.c3
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-sta.c12
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-tx.c25
-rw-r--r--drivers/net/wireless/iwlwifi/iwl3945-base.c68
-rw-r--r--drivers/net/wireless/iwmc3200wifi/commands.c4
-rw-r--r--drivers/net/wireless/iwmc3200wifi/commands.h1
-rw-r--r--drivers/net/wireless/iwmc3200wifi/iwm.h4
-rw-r--r--drivers/net/wireless/iwmc3200wifi/netdev.c2
-rw-r--r--drivers/net/wireless/iwmc3200wifi/rx.c4
-rw-r--r--drivers/net/wireless/libertas/cmd.c4
-rw-r--r--drivers/net/wireless/libertas/dev.h4
-rw-r--r--drivers/net/wireless/libertas/main.c21
-rw-r--r--drivers/net/wireless/libertas/mesh.c4
-rw-r--r--drivers/net/wireless/libertas/scan.c22
-rw-r--r--drivers/net/wireless/libertas/wext.c2
-rw-r--r--drivers/net/wireless/libertas_tf/main.c1
-rw-r--r--drivers/net/wireless/mwl8k.c4
-rw-r--r--drivers/net/wireless/orinoco/wext.c6
-rw-r--r--drivers/net/wireless/p54/p54pci.c8
-rw-r--r--drivers/net/wireless/rt2x00/rt2800.h2
-rw-r--r--drivers/net/wireless/rt2x00/rt2800lib.c19
-rw-r--r--drivers/net/wireless/rt2x00/rt2800usb.c1
-rw-r--r--drivers/net/wireless/rt2x00/rt2x00.h6
-rw-r--r--drivers/net/wireless/rt2x00/rt2x00dev.c12
-rw-r--r--drivers/net/wireless/rt2x00/rt2x00queue.c6
-rw-r--r--drivers/net/wireless/rt2x00/rt61pci.c5
-rw-r--r--drivers/net/wireless/rtl818x/rtl8180_dev.c1
-rw-r--r--drivers/net/wireless/rtl818x/rtl8187_dev.c1
-rw-r--r--drivers/net/wireless/wl12xx/wl1251_boot.c2
-rw-r--r--drivers/net/wireless/wl12xx/wl1271_cmd.c4
-rw-r--r--drivers/net/wireless/zd1211rw/zd_chip.c140
-rw-r--r--drivers/net/wireless/zd1211rw/zd_chip.h3
-rw-r--r--drivers/net/wireless/zd1211rw/zd_mac.c16
-rw-r--r--drivers/net/wireless/zd1211rw/zd_usb.c1
-rw-r--r--drivers/pci/hotplug/acpiphp_glue.c6
-rw-r--r--drivers/pci/hotplug/shpchp.h2
-rw-r--r--drivers/pci/intel-iommu.c6
-rw-r--r--drivers/pci/intr_remapping.c2
-rw-r--r--drivers/pci/pci-acpi.c10
-rw-r--r--drivers/pci/pci-sysfs.c6
-rw-r--r--drivers/pci/pci.c34
-rw-r--r--drivers/pci/pci.h8
-rw-r--r--drivers/pci/pcie/aer/Kconfig.debug4
-rw-r--r--drivers/pci/pcie/aer/aer_inject.c34
-rw-r--r--drivers/pci/pcie/aer/aerdrv.c2
-rw-r--r--drivers/pci/pcie/aer/aerdrv_acpi.c2
-rw-r--r--drivers/pci/pcie/aer/aerdrv_core.c6
-rw-r--r--drivers/pci/pcie/aer/aerdrv_errprint.c4
-rw-r--r--drivers/pci/pcie/aspm.c4
-rw-r--r--drivers/pci/pcie/portdrv_core.c16
-rw-r--r--drivers/pci/pcie/portdrv_pci.c19
-rw-r--r--drivers/pci/probe.c4
-rw-r--r--drivers/pci/quirks.c91
-rw-r--r--drivers/pci/search.c6
-rw-r--r--drivers/pcmcia/cardbus.c2
-rw-r--r--drivers/pcmcia/pxa2xx_base.c6
-rw-r--r--drivers/platform/x86/Kconfig70
-rw-r--r--drivers/platform/x86/Makefile3
-rw-r--r--drivers/platform/x86/acer-wmi.c5
-rw-r--r--drivers/platform/x86/acerhdf.c117
-rw-r--r--drivers/platform/x86/asus-laptop.c25
-rw-r--r--drivers/platform/x86/asus_acpi.c340
-rw-r--r--drivers/platform/x86/classmate-laptop.c609
-rw-r--r--drivers/platform/x86/compal-laptop.c1
-rw-r--r--drivers/platform/x86/dell-laptop.c86
-rw-r--r--drivers/platform/x86/dell-wmi.c171
-rw-r--r--drivers/platform/x86/eeepc-laptop.c1491
-rw-r--r--drivers/platform/x86/fujitsu-laptop.c38
-rw-r--r--drivers/platform/x86/hp-wmi.c157
-rw-r--r--drivers/platform/x86/msi-wmi.c288
-rw-r--r--drivers/platform/x86/sony-laptop.c153
-rw-r--r--drivers/platform/x86/tc1100-wmi.c115
-rw-r--r--drivers/platform/x86/thinkpad_acpi.c1211
-rw-r--r--drivers/platform/x86/toshiba_acpi.c259
-rw-r--r--drivers/platform/x86/toshiba_bluetooth.c144
-rw-r--r--drivers/platform/x86/wmi.c215
-rw-r--r--drivers/pnp/pnpacpi/core.c20
-rw-r--r--drivers/pnp/pnpacpi/rsparser.c9
-rw-r--r--drivers/power/pmu_battery.c2
-rw-r--r--drivers/power/wm97xx_battery.c10
-rw-r--r--drivers/regulator/88pm8607.c685
-rw-r--r--drivers/regulator/Kconfig13
-rw-r--r--drivers/regulator/Makefile4
-rw-r--r--drivers/regulator/ab3100.c33
-rw-r--r--drivers/regulator/core.c250
-rw-r--r--drivers/regulator/da903x.c2
-rw-r--r--drivers/regulator/lp3971.c8
-rw-r--r--drivers/regulator/max8660.c510
-rw-r--r--drivers/regulator/mc13783-regulator.c245
-rw-r--r--drivers/regulator/mc13783.c410
-rw-r--r--drivers/regulator/twl-regulator.c147
-rw-r--r--drivers/regulator/wm831x-dcdc.c207
-rw-r--r--drivers/regulator/wm831x-ldo.c2
-rw-r--r--drivers/regulator/wm8350-regulator.c4
-rw-r--r--drivers/rtc/rtc-cmos.c12
-rw-r--r--drivers/rtc/rtc-ds1305.c2
-rw-r--r--drivers/rtc/rtc-ds1307.c2
-rw-r--r--drivers/rtc/rtc-ds1374.c2
-rw-r--r--drivers/rtc/rtc-fm3130.c6
-rw-r--r--drivers/s390/block/dasd.c8
-rw-r--r--drivers/s390/block/dasd_alias.c2
-rw-r--r--drivers/s390/block/dasd_diag.c42
-rw-r--r--drivers/s390/block/dasd_eckd.c16
-rw-r--r--drivers/s390/block/dasd_ioctl.c21
-rw-r--r--drivers/s390/block/dasd_proc.c7
-rw-r--r--drivers/s390/char/con3215.c17
-rw-r--r--drivers/s390/char/fs3270.c19
-rw-r--r--drivers/s390/char/sclp_vt220.c4
-rw-r--r--drivers/s390/char/tape_34xx.c1
-rw-r--r--drivers/s390/char/tape_3590.c3
-rw-r--r--drivers/s390/char/tape_block.c40
-rw-r--r--drivers/s390/char/tape_char.c21
-rw-r--r--drivers/s390/char/tape_class.c4
-rw-r--r--drivers/s390/char/tape_core.c2
-rw-r--r--drivers/s390/char/tape_proc.c3
-rw-r--r--drivers/s390/char/tape_std.c3
-rw-r--r--drivers/s390/char/vmcp.c12
-rw-r--r--drivers/s390/cio/Makefile2
-rw-r--r--drivers/s390/cio/ccwreq.c3
-rw-r--r--drivers/s390/cio/chsc_sch.c23
-rw-r--r--drivers/s390/cio/device.c1
-rw-r--r--drivers/s390/cio/device_pgid.c29
-rw-r--r--drivers/s390/cio/fcx.c4
-rw-r--r--drivers/s390/cio/io_sch.h1
-rw-r--r--drivers/s390/cio/qdio.h36
-rw-r--r--drivers/s390/cio/qdio_debug.c114
-rw-r--r--drivers/s390/cio/qdio_main.c76
-rw-r--r--drivers/s390/cio/qdio_perf.c147
-rw-r--r--drivers/s390/cio/qdio_perf.h61
-rw-r--r--drivers/s390/cio/qdio_setup.c10
-rw-r--r--drivers/s390/cio/qdio_thinint.c8
-rw-r--r--drivers/s390/crypto/zcrypt_api.c4
-rw-r--r--drivers/s390/crypto/zcrypt_pcicc.c2
-rw-r--r--drivers/s390/crypto/zcrypt_pcixcc.c2
-rw-r--r--drivers/s390/net/claw.c2
-rw-r--r--drivers/s390/scsi/zfcp_cfdc.c9
-rw-r--r--drivers/s390/scsi/zfcp_dbf.c2
-rw-r--r--drivers/s390/scsi/zfcp_ext.h5
-rw-r--r--drivers/s390/scsi/zfcp_fc.c93
-rw-r--r--drivers/s390/scsi/zfcp_fc.h2
-rw-r--r--drivers/s390/scsi/zfcp_fsf.c19
-rw-r--r--drivers/s390/scsi/zfcp_scsi.c1
-rw-r--r--drivers/sbus/char/bbc_envctrl.c64
-rw-r--r--drivers/scsi/3w-9xxx.c11
-rw-r--r--drivers/scsi/Kconfig10
-rw-r--r--drivers/scsi/Makefile1
-rw-r--r--drivers/scsi/aacraid/aachba.c52
-rw-r--r--drivers/scsi/aacraid/aacraid.h5
-rw-r--r--drivers/scsi/aacraid/commctrl.c28
-rw-r--r--drivers/scsi/aacraid/comminit.c6
-rw-r--r--drivers/scsi/aacraid/commsup.c72
-rw-r--r--drivers/scsi/aacraid/dpcsup.c36
-rw-r--r--drivers/scsi/aic7xxx/aic79xx_core.c53
-rw-r--r--drivers/scsi/arm/fas216.c2
-rw-r--r--drivers/scsi/be2iscsi/be_cmds.c12
-rw-r--r--drivers/scsi/bnx2i/bnx2i.h1
-rw-r--r--drivers/scsi/bnx2i/bnx2i_hwi.c51
-rw-r--r--drivers/scsi/bnx2i/bnx2i_init.c16
-rw-r--r--drivers/scsi/bnx2i/bnx2i_iscsi.c2
-rw-r--r--drivers/scsi/cxgb3i/cxgb3i_offload.c58
-rw-r--r--drivers/scsi/cxgb3i/cxgb3i_pdu.c4
-rw-r--r--drivers/scsi/device_handler/scsi_dh_rdac.c2
-rw-r--r--drivers/scsi/fcoe/fcoe.c155
-rw-r--r--drivers/scsi/fcoe/libfcoe.c2
-rw-r--r--drivers/scsi/hpsa.c3531
-rw-r--r--drivers/scsi/hpsa.h273
-rw-r--r--drivers/scsi/hpsa_cmd.h326
-rw-r--r--drivers/scsi/ipr.c1
-rw-r--r--drivers/scsi/libfc/fc_exch.c2
-rw-r--r--drivers/scsi/libfc/fc_fcp.c68
-rw-r--r--drivers/scsi/libfc/fc_lport.c10
-rw-r--r--drivers/scsi/libfc/fc_rport.c3
-rw-r--r--drivers/scsi/libiscsi.c22
-rw-r--r--drivers/scsi/libiscsi_tcp.c36
-rw-r--r--drivers/scsi/libsrp.c17
-rw-r--r--drivers/scsi/lpfc/lpfc_els.c4
-rw-r--r--[-rwxr-xr-x]drivers/scsi/lpfc/lpfc_hbadisc.c25
-rw-r--r--drivers/scsi/lpfc/lpfc_hw4.h3
-rw-r--r--drivers/scsi/lpfc/lpfc_init.c30
-rw-r--r--drivers/scsi/lpfc/lpfc_sli.c48
-rw-r--r--drivers/scsi/lpfc/lpfc_sli4.h2
-rw-r--r--drivers/scsi/lpfc/lpfc_version.h2
-rw-r--r--drivers/scsi/lpfc/lpfc_vport.c4
-rw-r--r--drivers/scsi/megaraid/megaraid_sas.c34
-rw-r--r--drivers/scsi/mpt2sas/mpt2sas_base.c5
-rw-r--r--drivers/scsi/mvsas/mv_init.c1
-rw-r--r--drivers/scsi/osd/osd_initiator.c88
-rw-r--r--drivers/scsi/pm8001/pm8001_ctl.h10
-rw-r--r--drivers/scsi/pm8001/pm8001_hwi.c149
-rw-r--r--drivers/scsi/pm8001/pm8001_hwi.h3
-rw-r--r--drivers/scsi/pm8001/pm8001_init.c19
-rw-r--r--drivers/scsi/pm8001/pm8001_sas.c57
-rw-r--r--drivers/scsi/pm8001/pm8001_sas.h32
-rw-r--r--drivers/scsi/pmcraid.c42
-rw-r--r--drivers/scsi/pmcraid.h5
-rw-r--r--drivers/scsi/qla2xxx/qla_attr.c32
-rw-r--r--drivers/scsi/qla2xxx/qla_dbg.h9
-rw-r--r--drivers/scsi/qla2xxx/qla_def.h10
-rw-r--r--drivers/scsi/qla2xxx/qla_gbl.h4
-rw-r--r--drivers/scsi/qla2xxx/qla_init.c46
-rw-r--r--drivers/scsi/qla2xxx/qla_isr.c152
-rw-r--r--drivers/scsi/qla2xxx/qla_mbx.c64
-rw-r--r--drivers/scsi/qla2xxx/qla_mid.c10
-rw-r--r--drivers/scsi/qla2xxx/qla_os.c177
-rw-r--r--drivers/scsi/qla2xxx/qla_sup.c3
-rw-r--r--drivers/scsi/qla2xxx/qla_version.h2
-rw-r--r--drivers/scsi/scsi_lib.c3
-rw-r--r--drivers/scsi/scsi_transport_fc.c22
-rw-r--r--drivers/scsi/sd.c107
-rw-r--r--drivers/scsi/sd.h2
-rw-r--r--drivers/scsi/st.c23
-rw-r--r--drivers/scsi/st.h1
-rw-r--r--drivers/scsi/stex.c5
-rw-r--r--drivers/serial/21285.c4
-rw-r--r--drivers/serial/8250.c7
-rw-r--r--drivers/serial/8250_pnp.c12
-rw-r--r--drivers/serial/imx.c2
-rw-r--r--drivers/serial/pmac_zilog.c11
-rw-r--r--drivers/serial/serial_core.c105
-rw-r--r--drivers/serial/serial_cs.c19
-rw-r--r--drivers/serial/sh-sci.c87
-rw-r--r--drivers/serial/sh-sci.h118
-rw-r--r--drivers/serial/uartlite.c2
-rw-r--r--drivers/sh/intc.c2
-rw-r--r--drivers/sh/pfc.c2
-rw-r--r--drivers/spi/Kconfig28
-rw-r--r--drivers/spi/Makefile10
-rw-r--r--drivers/spi/atmel_spi.c6
-rw-r--r--drivers/spi/dw_spi.c944
-rw-r--r--drivers/spi/dw_spi_pci.c169
-rw-r--r--drivers/spi/spi_bfin5xx.c2
-rw-r--r--drivers/spi/spi_mpc8xxx.c2
-rw-r--r--drivers/spi/spi_s3c24xx.c244
-rw-r--r--drivers/spi/spi_s3c24xx_fiq.S116
-rw-r--r--drivers/spi/spi_s3c24xx_fiq.h26
-rw-r--r--drivers/spi/spi_s3c64xx.c1196
-rw-r--r--drivers/spi/spi_sh_msiof.c15
-rw-r--r--drivers/spi/spi_sh_sci.c2
-rw-r--r--drivers/spi/spi_txx9.c6
-rw-r--r--drivers/spi/spidev.c18
-rw-r--r--drivers/ssb/main.c3
-rw-r--r--drivers/staging/Kconfig6
-rw-r--r--drivers/staging/Makefile2
-rw-r--r--drivers/staging/asus_oled/asus_oled.c12
-rw-r--r--drivers/staging/batman-adv/Kconfig1
-rw-r--r--drivers/staging/batman-adv/send.c4
-rw-r--r--drivers/staging/comedi/comedi.h2
-rw-r--r--drivers/staging/comedi/drivers/jr3_pci.c7
-rw-r--r--drivers/staging/comedi/drivers/usbdux.c5
-rw-r--r--drivers/staging/cx25821/cx25821-medusa-video.c4
-rw-r--r--drivers/staging/dst/Kconfig67
-rw-r--r--drivers/staging/dst/Makefile3
-rw-r--r--drivers/staging/dst/crypto.c733
-rw-r--r--drivers/staging/dst/dcore.c1004
-rw-r--r--drivers/staging/dst/export.c660
-rw-r--r--drivers/staging/dst/state.c844
-rw-r--r--drivers/staging/dst/thread_pool.c348
-rw-r--r--drivers/staging/dst/trans.c337
-rw-r--r--drivers/staging/et131x/et1310_address_map.h18
-rw-r--r--drivers/staging/et131x/et1310_rx.c6
-rw-r--r--drivers/staging/hv/Hv.c50
-rw-r--r--drivers/staging/hv/Hv.h6
-rw-r--r--drivers/staging/hv/Vmbus.c12
-rw-r--r--drivers/staging/iio/ring_sw.h1
-rw-r--r--drivers/staging/octeon/Kconfig3
-rw-r--r--drivers/staging/octeon/ethernet-mdio.c204
-rw-r--r--drivers/staging/octeon/ethernet-mdio.h2
-rw-r--r--drivers/staging/octeon/ethernet-proc.c112
-rw-r--r--drivers/staging/octeon/ethernet-rgmii.c52
-rw-r--r--drivers/staging/octeon/ethernet-sgmii.c2
-rw-r--r--drivers/staging/octeon/ethernet-xaui.c2
-rw-r--r--drivers/staging/octeon/ethernet.c23
-rw-r--r--drivers/staging/octeon/octeon-ethernet.h6
-rw-r--r--drivers/staging/panel/Kconfig2
-rw-r--r--drivers/staging/panel/panel.c4
-rw-r--r--drivers/staging/pohmelfs/dir.c2
-rw-r--r--drivers/staging/ramzswap/TODO1
-rw-r--r--drivers/staging/ramzswap/ramzswap_drv.c28
-rw-r--r--drivers/staging/rtl8187se/ieee80211/ieee80211.h10
-rw-r--r--drivers/staging/rtl8187se/ieee80211/ieee80211_rx.c2
-rw-r--r--drivers/staging/rtl8187se/ieee80211/ieee80211_softmac.c14
-rw-r--r--drivers/staging/rtl8187se/ieee80211/ieee80211_tx.c2
-rw-r--r--drivers/staging/rtl8187se/r8180_core.c10
-rw-r--r--drivers/staging/rtl8187se/r8180_wx.c2
-rw-r--r--drivers/staging/rtl8192e/ieee80211.h12
-rw-r--r--drivers/staging/rtl8192e/ieee80211/ieee80211.h12
-rw-r--r--drivers/staging/rtl8192e/ieee80211/ieee80211_module.c10
-rw-r--r--drivers/staging/rtl8192e/ieee80211/ieee80211_rx.c2
-rw-r--r--drivers/staging/rtl8192e/ieee80211/ieee80211_softmac.c24
-rw-r--r--drivers/staging/rtl8192e/ieee80211/ieee80211_tx.c2
-rw-r--r--drivers/staging/rtl8192e/ieee80211/ieee80211_wx.c2
-rw-r--r--drivers/staging/rtl8192e/ieee80211/rtl819x_BAProc.c6
-rw-r--r--drivers/staging/rtl8192e/r8192E_core.c14
-rw-r--r--drivers/staging/rtl8192su/ieee80211/ieee80211.h8
-rw-r--r--drivers/staging/rtl8192su/ieee80211/ieee80211_rx.c6
-rw-r--r--drivers/staging/rtl8192su/ieee80211/ieee80211_softmac.c16
-rw-r--r--drivers/staging/rtl8192su/ieee80211/ieee80211_tx.c2
-rw-r--r--drivers/staging/rtl8192su/r8192U_core.c10
-rw-r--r--drivers/staging/rtl8192u/ieee80211/ieee80211_wx.c2
-rw-r--r--drivers/staging/rtl8192u/ieee80211/rtl819x_BAProc.c6
-rw-r--r--drivers/staging/sm7xx/Kconfig15
-rw-r--r--drivers/staging/sm7xx/Makefile3
-rw-r--r--drivers/staging/sm7xx/TODO10
-rw-r--r--drivers/staging/sm7xx/smtc2d.c979
-rw-r--r--drivers/staging/sm7xx/smtc2d.h530
-rw-r--r--drivers/staging/sm7xx/smtcfb.c1253
-rw-r--r--drivers/staging/sm7xx/smtcfb.h793
-rw-r--r--drivers/staging/vt6655/Kconfig2
-rw-r--r--drivers/staging/vt6656/Kconfig2
-rw-r--r--drivers/staging/wlan-ng/prism2fw.c2
-rw-r--r--drivers/thermal/thermal_sys.c19
-rw-r--r--drivers/usb/Makefile2
-rw-r--r--drivers/usb/core/devices.c2
-rw-r--r--drivers/usb/core/devio.c48
-rw-r--r--drivers/usb/core/hcd.c22
-rw-r--r--drivers/usb/core/hub.c76
-rw-r--r--drivers/usb/core/message.c8
-rw-r--r--drivers/usb/core/sysfs.c12
-rw-r--r--drivers/usb/core/usb.c6
-rw-r--r--drivers/usb/early/ehci-dbgp.c2
-rw-r--r--drivers/usb/gadget/audio.c1
-rw-r--r--drivers/usb/gadget/f_audio.c15
-rw-r--r--drivers/usb/gadget/f_eem.c3
-rw-r--r--drivers/usb/gadget/multi.c2
-rw-r--r--drivers/usb/gadget/r8a66597-udc.c1
-rw-r--r--drivers/usb/gadget/s3c-hsotg.c1
-rw-r--r--drivers/usb/gadget/u_audio.c12
-rw-r--r--drivers/usb/gadget/u_audio.h2
-rw-r--r--drivers/usb/host/ehci-hcd.c5
-rw-r--r--drivers/usb/host/ehci-hub.c33
-rw-r--r--drivers/usb/host/ehci-omap.c2
-rw-r--r--drivers/usb/host/ehci-q.c11
-rw-r--r--drivers/usb/host/fhci-hcd.c3
-rw-r--r--drivers/usb/host/fhci-sched.c10
-rw-r--r--drivers/usb/host/fhci-tds.c41
-rw-r--r--drivers/usb/host/fhci.h16
-rw-r--r--drivers/usb/host/isp1362-hcd.c25
-rw-r--r--drivers/usb/host/isp1760-hcd.c6
-rw-r--r--drivers/usb/host/r8a66597-hcd.c58
-rw-r--r--drivers/usb/host/uhci-hcd.c15
-rw-r--r--drivers/usb/host/uhci-hub.c2
-rw-r--r--drivers/usb/misc/appledisplay.c5
-rw-r--r--drivers/usb/misc/emi62.c2
-rw-r--r--drivers/usb/misc/sisusbvga/sisusb.c1
-rw-r--r--drivers/usb/musb/blackfin.c134
-rw-r--r--drivers/usb/musb/blackfin.h2
-rw-r--r--drivers/usb/musb/cppi_dma.c6
-rw-r--r--drivers/usb/musb/davinci.c2
-rw-r--r--drivers/usb/musb/musb_core.c14
-rw-r--r--drivers/usb/musb/musb_gadget.c13
-rw-r--r--drivers/usb/musb/musb_gadget_ep0.c14
-rw-r--r--drivers/usb/otg/Kconfig1
-rw-r--r--drivers/usb/otg/isp1301_omap.c4
-rw-r--r--drivers/usb/serial/ftdi_sio.c26
-rw-r--r--drivers/usb/serial/ftdi_sio.h959
-rw-r--r--drivers/usb/serial/ftdi_sio_ids.h1004
-rw-r--r--drivers/usb/serial/generic.c22
-rw-r--r--drivers/usb/serial/mos7840.c7
-rw-r--r--drivers/usb/serial/option.c5
-rw-r--r--drivers/usb/serial/sierra.c1
-rw-r--r--drivers/usb/serial/usb-serial.c7
-rw-r--r--drivers/usb/storage/unusual_devs.h9
-rw-r--r--drivers/usb/storage/usb.c3
-rw-r--r--drivers/video/atafb.c3
-rw-r--r--drivers/video/backlight/adp5520_bl.c2
-rw-r--r--drivers/video/backlight/adx_bl.c2
-rw-r--r--drivers/video/backlight/atmel-pwm-bl.c2
-rw-r--r--drivers/video/backlight/backlight.c2
-rw-r--r--drivers/video/backlight/corgi_lcd.c2
-rw-r--r--drivers/video/backlight/cr_bllcd.c4
-rw-r--r--drivers/video/backlight/da903x_bl.c2
-rw-r--r--drivers/video/backlight/generic_bl.c2
-rw-r--r--drivers/video/backlight/hp680_bl.c2
-rw-r--r--drivers/video/backlight/jornada720_bl.c2
-rw-r--r--drivers/video/backlight/kb3886_bl.c2
-rw-r--r--drivers/video/backlight/locomolcd.c2
-rw-r--r--drivers/video/backlight/mbp_nvidia_bl.c20
-rw-r--r--drivers/video/backlight/omap1_bl.c4
-rw-r--r--drivers/video/backlight/progear_bl.c2
-rw-r--r--drivers/video/backlight/pwm_bl.c11
-rw-r--r--drivers/video/backlight/tosa_bl.c2
-rw-r--r--drivers/video/backlight/wm831x_bl.c2
-rw-r--r--drivers/video/cyber2000fb.c12
-rw-r--r--drivers/video/efifb.c11
-rw-r--r--drivers/video/imxfb.c6
-rw-r--r--drivers/video/mx3fb.c12
-rw-r--r--drivers/video/omap/dispc.c18
-rw-r--r--drivers/video/omap/lcd_htcherald.c4
-rw-r--r--drivers/video/omap/lcd_ldp.c4
-rw-r--r--drivers/video/omap/lcd_omap2evm.c10
-rw-r--r--drivers/video/omap/lcd_omap3beagle.c2
-rw-r--r--drivers/video/omap/lcd_omap3evm.c10
-rw-r--r--drivers/video/omap/lcd_overo.c2
-rw-r--r--drivers/video/omap/omapfb.h2
-rw-r--r--drivers/video/omap/omapfb_main.c25
-rw-r--r--drivers/video/omap/rfbi.c4
-rw-r--r--drivers/video/omap2/dss/Kconfig7
-rw-r--r--drivers/video/omap2/dss/core.c10
-rw-r--r--drivers/video/omap2/dss/dispc.c74
-rw-r--r--drivers/video/omap2/dss/dsi.c159
-rw-r--r--drivers/video/omap2/dss/dss.c6
-rw-r--r--drivers/video/omap2/dss/dss.h14
-rw-r--r--drivers/video/omap2/dss/rfbi.c30
-rw-r--r--drivers/video/omap2/omapfb/omapfb-main.c6
-rw-r--r--drivers/video/pxafb.c4
-rw-r--r--drivers/video/s3c-fb.c14
-rw-r--r--drivers/video/sh_mobile_lcdcfb.c10
-rw-r--r--drivers/video/via/accel.c5
-rw-r--r--drivers/video/via/viafbdev.c15
-rw-r--r--drivers/virtio/virtio_balloon.c6
-rw-r--r--drivers/watchdog/Kconfig16
-rw-r--r--drivers/watchdog/Makefile1
-rw-r--r--drivers/watchdog/adx_wdt.c4
-rw-r--r--drivers/watchdog/at32ap700x_wdt.c2
-rw-r--r--drivers/watchdog/bfin_wdt.c13
-rw-r--r--drivers/watchdog/davinci_wdt.c2
-rw-r--r--drivers/watchdog/geodewdt.c40
-rw-r--r--drivers/watchdog/iTCO_wdt.c49
-rw-r--r--drivers/watchdog/ixp2000_wdt.c1
-rw-r--r--drivers/watchdog/mpcore_wdt.c2
-rw-r--r--drivers/watchdog/mv64x60_wdt.c2
-rw-r--r--drivers/watchdog/omap_wdt.c9
-rw-r--r--drivers/watchdog/pnx4008_wdt.c2
-rw-r--r--drivers/watchdog/rm9k_wdt.c419
-rw-r--r--drivers/watchdog/s3c2410_wdt.c2
-rw-r--r--drivers/watchdog/sbc_fitpc2_wdt.c11
-rw-r--r--drivers/watchdog/txx9wdt.c6
-rw-r--r--drivers/xen/manage.c8
1232 files changed, 71594 insertions, 20321 deletions
diff --git a/drivers/Kconfig b/drivers/Kconfig
index 8a07363417ed..368ae6d3a096 100644
--- a/drivers/Kconfig
+++ b/drivers/Kconfig
@@ -28,7 +28,7 @@ source "drivers/md/Kconfig"
28 28
29source "drivers/message/fusion/Kconfig" 29source "drivers/message/fusion/Kconfig"
30 30
31source "drivers/ieee1394/Kconfig" 31source "drivers/firewire/Kconfig"
32 32
33source "drivers/message/i2o/Kconfig" 33source "drivers/message/i2o/Kconfig"
34 34
diff --git a/drivers/accessibility/braille/braille_console.c b/drivers/accessibility/braille/braille_console.c
index d672cfe7ca59..cb423f5aef24 100644
--- a/drivers/accessibility/braille/braille_console.c
+++ b/drivers/accessibility/braille/braille_console.c
@@ -21,7 +21,6 @@
21 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 21 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22 */ 22 */
23 23
24#include <linux/autoconf.h>
25#include <linux/kernel.h> 24#include <linux/kernel.h>
26#include <linux/module.h> 25#include <linux/module.h>
27#include <linux/moduleparam.h> 26#include <linux/moduleparam.h>
diff --git a/drivers/acpi/Makefile b/drivers/acpi/Makefile
index c7b10b4298e9..66cc3f36a954 100644
--- a/drivers/acpi/Makefile
+++ b/drivers/acpi/Makefile
@@ -32,6 +32,7 @@ acpi-$(CONFIG_ACPI_SLEEP) += proc.o
32# 32#
33acpi-y += bus.o glue.o 33acpi-y += bus.o glue.o
34acpi-y += scan.o 34acpi-y += scan.o
35acpi-y += processor_pdc.o
35acpi-y += ec.o 36acpi-y += ec.o
36acpi-$(CONFIG_ACPI_DOCK) += dock.o 37acpi-$(CONFIG_ACPI_DOCK) += dock.o
37acpi-y += pci_root.o pci_link.o pci_irq.o pci_bind.o 38acpi-y += pci_root.o pci_link.o pci_irq.o pci_bind.o
diff --git a/drivers/acpi/acpi_pad.c b/drivers/acpi/acpi_pad.c
index 0d2cdb86158b..7e52295f1ecc 100644
--- a/drivers/acpi/acpi_pad.c
+++ b/drivers/acpi/acpi_pad.c
@@ -100,7 +100,8 @@ static void round_robin_cpu(unsigned int tsk_index)
100 struct cpumask *pad_busy_cpus = to_cpumask(pad_busy_cpus_bits); 100 struct cpumask *pad_busy_cpus = to_cpumask(pad_busy_cpus_bits);
101 cpumask_var_t tmp; 101 cpumask_var_t tmp;
102 int cpu; 102 int cpu;
103 unsigned long min_weight = -1, preferred_cpu; 103 unsigned long min_weight = -1;
104 unsigned long uninitialized_var(preferred_cpu);
104 105
105 if (!alloc_cpumask_var(&tmp, GFP_KERNEL)) 106 if (!alloc_cpumask_var(&tmp, GFP_KERNEL))
106 return; 107 return;
@@ -207,7 +208,7 @@ static int power_saving_thread(void *data)
207 * the mechanism only works when all CPUs have RT task running, 208 * the mechanism only works when all CPUs have RT task running,
208 * as if one CPU hasn't RT task, RT task from other CPUs will 209 * as if one CPU hasn't RT task, RT task from other CPUs will
209 * borrow CPU time from this CPU and cause RT task use > 95% 210 * borrow CPU time from this CPU and cause RT task use > 95%
210 * CPU time. To make 'avoid staration' work, takes a nap here. 211 * CPU time. To make 'avoid starvation' work, takes a nap here.
211 */ 212 */
212 if (do_sleep) 213 if (do_sleep)
213 schedule_timeout_killable(HZ * idle_pct / 100); 214 schedule_timeout_killable(HZ * idle_pct / 100);
@@ -221,14 +222,18 @@ static struct task_struct *ps_tsks[NR_CPUS];
221static unsigned int ps_tsk_num; 222static unsigned int ps_tsk_num;
222static int create_power_saving_task(void) 223static int create_power_saving_task(void)
223{ 224{
225 int rc = -ENOMEM;
226
224 ps_tsks[ps_tsk_num] = kthread_run(power_saving_thread, 227 ps_tsks[ps_tsk_num] = kthread_run(power_saving_thread,
225 (void *)(unsigned long)ps_tsk_num, 228 (void *)(unsigned long)ps_tsk_num,
226 "power_saving/%d", ps_tsk_num); 229 "power_saving/%d", ps_tsk_num);
227 if (ps_tsks[ps_tsk_num]) { 230 rc = IS_ERR(ps_tsks[ps_tsk_num]) ? PTR_ERR(ps_tsks[ps_tsk_num]) : 0;
231 if (!rc)
228 ps_tsk_num++; 232 ps_tsk_num++;
229 return 0; 233 else
230 } 234 ps_tsks[ps_tsk_num] = NULL;
231 return -EINVAL; 235
236 return rc;
232} 237}
233 238
234static void destroy_power_saving_task(void) 239static void destroy_power_saving_task(void)
@@ -236,6 +241,7 @@ static void destroy_power_saving_task(void)
236 if (ps_tsk_num > 0) { 241 if (ps_tsk_num > 0) {
237 ps_tsk_num--; 242 ps_tsk_num--;
238 kthread_stop(ps_tsks[ps_tsk_num]); 243 kthread_stop(ps_tsks[ps_tsk_num]);
244 ps_tsks[ps_tsk_num] = NULL;
239 } 245 }
240} 246}
241 247
@@ -252,7 +258,7 @@ static void set_power_saving_task_num(unsigned int num)
252 } 258 }
253} 259}
254 260
255static int acpi_pad_idle_cpus(unsigned int num_cpus) 261static void acpi_pad_idle_cpus(unsigned int num_cpus)
256{ 262{
257 get_online_cpus(); 263 get_online_cpus();
258 264
@@ -260,7 +266,6 @@ static int acpi_pad_idle_cpus(unsigned int num_cpus)
260 set_power_saving_task_num(num_cpus); 266 set_power_saving_task_num(num_cpus);
261 267
262 put_online_cpus(); 268 put_online_cpus();
263 return 0;
264} 269}
265 270
266static uint32_t acpi_pad_idle_cpus_num(void) 271static uint32_t acpi_pad_idle_cpus_num(void)
@@ -368,19 +373,21 @@ static void acpi_pad_remove_sysfs(struct acpi_device *device)
368static int acpi_pad_pur(acpi_handle handle, int *num_cpus) 373static int acpi_pad_pur(acpi_handle handle, int *num_cpus)
369{ 374{
370 struct acpi_buffer buffer = {ACPI_ALLOCATE_BUFFER, NULL}; 375 struct acpi_buffer buffer = {ACPI_ALLOCATE_BUFFER, NULL};
371 acpi_status status;
372 union acpi_object *package; 376 union acpi_object *package;
373 int rev, num, ret = -EINVAL; 377 int rev, num, ret = -EINVAL;
374 378
375 status = acpi_evaluate_object(handle, "_PUR", NULL, &buffer); 379 if (ACPI_FAILURE(acpi_evaluate_object(handle, "_PUR", NULL, &buffer)))
376 if (ACPI_FAILURE(status)) 380 return -EINVAL;
381
382 if (!buffer.length || !buffer.pointer)
377 return -EINVAL; 383 return -EINVAL;
384
378 package = buffer.pointer; 385 package = buffer.pointer;
379 if (package->type != ACPI_TYPE_PACKAGE || package->package.count != 2) 386 if (package->type != ACPI_TYPE_PACKAGE || package->package.count != 2)
380 goto out; 387 goto out;
381 rev = package->package.elements[0].integer.value; 388 rev = package->package.elements[0].integer.value;
382 num = package->package.elements[1].integer.value; 389 num = package->package.elements[1].integer.value;
383 if (rev != 1) 390 if (rev != 1 || num < 0)
384 goto out; 391 goto out;
385 *num_cpus = num; 392 *num_cpus = num;
386 ret = 0; 393 ret = 0;
@@ -409,7 +416,7 @@ static void acpi_pad_ost(acpi_handle handle, int stat,
409 416
410static void acpi_pad_handle_notify(acpi_handle handle) 417static void acpi_pad_handle_notify(acpi_handle handle)
411{ 418{
412 int num_cpus, ret; 419 int num_cpus;
413 uint32_t idle_cpus; 420 uint32_t idle_cpus;
414 421
415 mutex_lock(&isolated_cpus_lock); 422 mutex_lock(&isolated_cpus_lock);
@@ -417,12 +424,9 @@ static void acpi_pad_handle_notify(acpi_handle handle)
417 mutex_unlock(&isolated_cpus_lock); 424 mutex_unlock(&isolated_cpus_lock);
418 return; 425 return;
419 } 426 }
420 ret = acpi_pad_idle_cpus(num_cpus); 427 acpi_pad_idle_cpus(num_cpus);
421 idle_cpus = acpi_pad_idle_cpus_num(); 428 idle_cpus = acpi_pad_idle_cpus_num();
422 if (!ret) 429 acpi_pad_ost(handle, 0, idle_cpus);
423 acpi_pad_ost(handle, 0, idle_cpus);
424 else
425 acpi_pad_ost(handle, 1, 0);
426 mutex_unlock(&isolated_cpus_lock); 430 mutex_unlock(&isolated_cpus_lock);
427} 431}
428 432
diff --git a/drivers/acpi/acpica/acnamesp.h b/drivers/acpi/acpica/acnamesp.h
index ab83919dda61..61edb156e8d0 100644
--- a/drivers/acpi/acpica/acnamesp.h
+++ b/drivers/acpi/acpica/acnamesp.h
@@ -296,6 +296,11 @@ acpi_ns_complex_repairs(struct acpi_predefined_data *data,
296 acpi_status validate_status, 296 acpi_status validate_status,
297 union acpi_operand_object **return_object_ptr); 297 union acpi_operand_object **return_object_ptr);
298 298
299void
300acpi_ns_remove_null_elements(struct acpi_predefined_data *data,
301 u8 package_type,
302 union acpi_operand_object *obj_desc);
303
299/* 304/*
300 * nssearch - Namespace searching and entry 305 * nssearch - Namespace searching and entry
301 */ 306 */
@@ -354,9 +359,7 @@ acpi_ns_externalize_name(u32 internal_name_length,
354 const char *internal_name, 359 const char *internal_name,
355 u32 * converted_name_length, char **converted_name); 360 u32 * converted_name_length, char **converted_name);
356 361
357struct acpi_namespace_node *acpi_ns_map_handle_to_node(acpi_handle handle); 362struct acpi_namespace_node *acpi_ns_validate_handle(acpi_handle handle);
358
359acpi_handle acpi_ns_convert_entry_to_handle(struct acpi_namespace_node *node);
360 363
361void acpi_ns_terminate(void); 364void acpi_ns_terminate(void);
362 365
diff --git a/drivers/acpi/acpica/acobject.h b/drivers/acpi/acpica/acobject.h
index b39d682a2140..64062b1be3ee 100644
--- a/drivers/acpi/acpica/acobject.h
+++ b/drivers/acpi/acpica/acobject.h
@@ -180,7 +180,11 @@ struct acpi_object_method {
180 u8 sync_level; 180 u8 sync_level;
181 union acpi_operand_object *mutex; 181 union acpi_operand_object *mutex;
182 u8 *aml_start; 182 u8 *aml_start;
183 ACPI_INTERNAL_METHOD implementation; 183 union {
184 ACPI_INTERNAL_METHOD implementation;
185 union acpi_operand_object *handler;
186 } extra;
187
184 u32 aml_length; 188 u32 aml_length;
185 u8 thread_count; 189 u8 thread_count;
186 acpi_owner_id owner_id; 190 acpi_owner_id owner_id;
diff --git a/drivers/acpi/acpica/dsmethod.c b/drivers/acpi/acpica/dsmethod.c
index 567a4899a018..e786f9fd767f 100644
--- a/drivers/acpi/acpica/dsmethod.c
+++ b/drivers/acpi/acpica/dsmethod.c
@@ -414,7 +414,7 @@ acpi_ds_call_control_method(struct acpi_thread_state *thread,
414 /* Invoke an internal method if necessary */ 414 /* Invoke an internal method if necessary */
415 415
416 if (obj_desc->method.method_flags & AML_METHOD_INTERNAL_ONLY) { 416 if (obj_desc->method.method_flags & AML_METHOD_INTERNAL_ONLY) {
417 status = obj_desc->method.implementation(next_walk_state); 417 status = obj_desc->method.extra.implementation(next_walk_state);
418 if (status == AE_OK) { 418 if (status == AE_OK) {
419 status = AE_CTRL_TERMINATE; 419 status = AE_CTRL_TERMINATE;
420 } 420 }
diff --git a/drivers/acpi/acpica/dswload.c b/drivers/acpi/acpica/dswload.c
index 10fc78517843..b40513dd6a6a 100644
--- a/drivers/acpi/acpica/dswload.c
+++ b/drivers/acpi/acpica/dswload.c
@@ -212,18 +212,19 @@ acpi_ds_load1_begin_op(struct acpi_walk_state * walk_state,
212 case ACPI_TYPE_BUFFER: 212 case ACPI_TYPE_BUFFER:
213 213
214 /* 214 /*
215 * These types we will allow, but we will change the type. This 215 * These types we will allow, but we will change the type.
216 * enables some existing code of the form: 216 * This enables some existing code of the form:
217 * 217 *
218 * Name (DEB, 0) 218 * Name (DEB, 0)
219 * Scope (DEB) { ... } 219 * Scope (DEB) { ... }
220 * 220 *
221 * Note: silently change the type here. On the second pass, we will report 221 * Note: silently change the type here. On the second pass,
222 * a warning 222 * we will report a warning
223 */ 223 */
224 ACPI_DEBUG_PRINT((ACPI_DB_INFO, 224 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
225 "Type override - [%4.4s] had invalid type (%s) for Scope operator, changed to (Scope)\n", 225 "Type override - [%4.4s] had invalid type (%s) "
226 path, 226 "for Scope operator, changed to type ANY\n",
227 acpi_ut_get_node_name(node),
227 acpi_ut_get_type_name(node->type))); 228 acpi_ut_get_type_name(node->type)));
228 229
229 node->type = ACPI_TYPE_ANY; 230 node->type = ACPI_TYPE_ANY;
@@ -235,8 +236,10 @@ acpi_ds_load1_begin_op(struct acpi_walk_state * walk_state,
235 /* All other types are an error */ 236 /* All other types are an error */
236 237
237 ACPI_ERROR((AE_INFO, 238 ACPI_ERROR((AE_INFO,
238 "Invalid type (%s) for target of Scope operator [%4.4s] (Cannot override)", 239 "Invalid type (%s) for target of "
239 acpi_ut_get_type_name(node->type), path)); 240 "Scope operator [%4.4s] (Cannot override)",
241 acpi_ut_get_type_name(node->type),
242 acpi_ut_get_node_name(node)));
240 243
241 return_ACPI_STATUS(AE_AML_OPERAND_TYPE); 244 return_ACPI_STATUS(AE_AML_OPERAND_TYPE);
242 } 245 }
@@ -697,15 +700,16 @@ acpi_ds_load2_begin_op(struct acpi_walk_state *walk_state,
697 case ACPI_TYPE_BUFFER: 700 case ACPI_TYPE_BUFFER:
698 701
699 /* 702 /*
700 * These types we will allow, but we will change the type. This 703 * These types we will allow, but we will change the type.
701 * enables some existing code of the form: 704 * This enables some existing code of the form:
702 * 705 *
703 * Name (DEB, 0) 706 * Name (DEB, 0)
704 * Scope (DEB) { ... } 707 * Scope (DEB) { ... }
705 */ 708 */
706 ACPI_WARNING((AE_INFO, 709 ACPI_WARNING((AE_INFO,
707 "Type override - [%4.4s] had invalid type (%s) for Scope operator, changed to (Scope)", 710 "Type override - [%4.4s] had invalid type (%s) "
708 buffer_ptr, 711 "for Scope operator, changed to type ANY\n",
712 acpi_ut_get_node_name(node),
709 acpi_ut_get_type_name(node->type))); 713 acpi_ut_get_type_name(node->type)));
710 714
711 node->type = ACPI_TYPE_ANY; 715 node->type = ACPI_TYPE_ANY;
@@ -717,9 +721,10 @@ acpi_ds_load2_begin_op(struct acpi_walk_state *walk_state,
717 /* All other types are an error */ 721 /* All other types are an error */
718 722
719 ACPI_ERROR((AE_INFO, 723 ACPI_ERROR((AE_INFO,
720 "Invalid type (%s) for target of Scope operator [%4.4s]", 724 "Invalid type (%s) for target of "
725 "Scope operator [%4.4s] (Cannot override)",
721 acpi_ut_get_type_name(node->type), 726 acpi_ut_get_type_name(node->type),
722 buffer_ptr)); 727 acpi_ut_get_node_name(node)));
723 728
724 return (AE_AML_OPERAND_TYPE); 729 return (AE_AML_OPERAND_TYPE);
725 } 730 }
@@ -1047,9 +1052,22 @@ acpi_status acpi_ds_load2_end_op(struct acpi_walk_state *walk_state)
1047 } 1052 }
1048 1053
1049 /* 1054 /*
1050 * If we are executing a method, initialize the region 1055 * The op_region is not fully parsed at this time. The only valid
1056 * argument is the space_id. (We must save the address of the
1057 * AML of the address and length operands)
1058 *
1059 * If we have a valid region, initialize it. The namespace is
1060 * unlocked at this point.
1061 *
1062 * Need to unlock interpreter if it is locked (if we are running
1063 * a control method), in order to allow _REG methods to be run
1064 * during acpi_ev_initialize_region.
1051 */ 1065 */
1052 if (walk_state->method_node) { 1066 if (walk_state->method_node) {
1067 /*
1068 * Executing a method: initialize the region and unlock
1069 * the interpreter
1070 */
1053 status = 1071 status =
1054 acpi_ex_create_region(op->named.data, 1072 acpi_ex_create_region(op->named.data,
1055 op->named.length, 1073 op->named.length,
@@ -1058,21 +1076,17 @@ acpi_status acpi_ds_load2_end_op(struct acpi_walk_state *walk_state)
1058 if (ACPI_FAILURE(status)) { 1076 if (ACPI_FAILURE(status)) {
1059 return (status); 1077 return (status);
1060 } 1078 }
1061 }
1062 1079
1063 /* 1080 acpi_ex_exit_interpreter();
1064 * The op_region is not fully parsed at this time. Only valid 1081 }
1065 * argument is the space_id. (We must save the address of the
1066 * AML of the address and length operands)
1067 */
1068 1082
1069 /*
1070 * If we have a valid region, initialize it
1071 * Namespace is NOT locked at this point.
1072 */
1073 status = 1083 status =
1074 acpi_ev_initialize_region 1084 acpi_ev_initialize_region
1075 (acpi_ns_get_attached_object(node), FALSE); 1085 (acpi_ns_get_attached_object(node), FALSE);
1086 if (walk_state->method_node) {
1087 acpi_ex_enter_interpreter();
1088 }
1089
1076 if (ACPI_FAILURE(status)) { 1090 if (ACPI_FAILURE(status)) {
1077 /* 1091 /*
1078 * If AE_NOT_EXIST is returned, it is not fatal 1092 * If AE_NOT_EXIST is returned, it is not fatal
diff --git a/drivers/acpi/acpica/evregion.c b/drivers/acpi/acpica/evregion.c
index 0bc807c33a56..5336d911fbf0 100644
--- a/drivers/acpi/acpica/evregion.c
+++ b/drivers/acpi/acpica/evregion.c
@@ -718,7 +718,7 @@ acpi_ev_install_handler(acpi_handle obj_handle,
718 718
719 /* Convert and validate the device handle */ 719 /* Convert and validate the device handle */
720 720
721 node = acpi_ns_map_handle_to_node(obj_handle); 721 node = acpi_ns_validate_handle(obj_handle);
722 if (!node) { 722 if (!node) {
723 return (AE_BAD_PARAMETER); 723 return (AE_BAD_PARAMETER);
724 } 724 }
@@ -1087,7 +1087,7 @@ acpi_ev_reg_run(acpi_handle obj_handle,
1087 1087
1088 /* Convert and validate the device handle */ 1088 /* Convert and validate the device handle */
1089 1089
1090 node = acpi_ns_map_handle_to_node(obj_handle); 1090 node = acpi_ns_validate_handle(obj_handle);
1091 if (!node) { 1091 if (!node) {
1092 return (AE_BAD_PARAMETER); 1092 return (AE_BAD_PARAMETER);
1093 } 1093 }
diff --git a/drivers/acpi/acpica/evrgnini.c b/drivers/acpi/acpica/evrgnini.c
index cf29c4953028..ff168052a332 100644
--- a/drivers/acpi/acpica/evrgnini.c
+++ b/drivers/acpi/acpica/evrgnini.c
@@ -575,6 +575,21 @@ acpi_ev_initialize_region(union acpi_operand_object *region_obj,
575 handler_obj = obj_desc->thermal_zone.handler; 575 handler_obj = obj_desc->thermal_zone.handler;
576 break; 576 break;
577 577
578 case ACPI_TYPE_METHOD:
579 /*
580 * If we are executing module level code, the original
581 * Node's object was replaced by this Method object and we
582 * saved the handler in the method object.
583 *
584 * See acpi_ns_exec_module_code
585 */
586 if (obj_desc->method.
587 flags & AOPOBJ_MODULE_LEVEL) {
588 handler_obj =
589 obj_desc->method.extra.handler;
590 }
591 break;
592
578 default: 593 default:
579 /* Ignore other objects */ 594 /* Ignore other objects */
580 break; 595 break;
diff --git a/drivers/acpi/acpica/evxface.c b/drivers/acpi/acpica/evxface.c
index 10b8543dd466..2fe0809d4eb2 100644
--- a/drivers/acpi/acpica/evxface.c
+++ b/drivers/acpi/acpica/evxface.c
@@ -259,7 +259,7 @@ acpi_install_notify_handler(acpi_handle device,
259 259
260 /* Convert and validate the device handle */ 260 /* Convert and validate the device handle */
261 261
262 node = acpi_ns_map_handle_to_node(device); 262 node = acpi_ns_validate_handle(device);
263 if (!node) { 263 if (!node) {
264 status = AE_BAD_PARAMETER; 264 status = AE_BAD_PARAMETER;
265 goto unlock_and_exit; 265 goto unlock_and_exit;
@@ -425,7 +425,7 @@ acpi_remove_notify_handler(acpi_handle device,
425 425
426 /* Convert and validate the device handle */ 426 /* Convert and validate the device handle */
427 427
428 node = acpi_ns_map_handle_to_node(device); 428 node = acpi_ns_validate_handle(device);
429 if (!node) { 429 if (!node) {
430 status = AE_BAD_PARAMETER; 430 status = AE_BAD_PARAMETER;
431 goto unlock_and_exit; 431 goto unlock_and_exit;
diff --git a/drivers/acpi/acpica/evxfevnt.c b/drivers/acpi/acpica/evxfevnt.c
index 4721f58fe42c..eed7a38d25f2 100644
--- a/drivers/acpi/acpica/evxfevnt.c
+++ b/drivers/acpi/acpica/evxfevnt.c
@@ -610,7 +610,7 @@ acpi_install_gpe_block(acpi_handle gpe_device,
610 return (status); 610 return (status);
611 } 611 }
612 612
613 node = acpi_ns_map_handle_to_node(gpe_device); 613 node = acpi_ns_validate_handle(gpe_device);
614 if (!node) { 614 if (!node) {
615 status = AE_BAD_PARAMETER; 615 status = AE_BAD_PARAMETER;
616 goto unlock_and_exit; 616 goto unlock_and_exit;
@@ -698,7 +698,7 @@ acpi_status acpi_remove_gpe_block(acpi_handle gpe_device)
698 return (status); 698 return (status);
699 } 699 }
700 700
701 node = acpi_ns_map_handle_to_node(gpe_device); 701 node = acpi_ns_validate_handle(gpe_device);
702 if (!node) { 702 if (!node) {
703 status = AE_BAD_PARAMETER; 703 status = AE_BAD_PARAMETER;
704 goto unlock_and_exit; 704 goto unlock_and_exit;
diff --git a/drivers/acpi/acpica/evxfregn.c b/drivers/acpi/acpica/evxfregn.c
index 7c3d2d356ffb..c98aa7c2d67c 100644
--- a/drivers/acpi/acpica/evxfregn.c
+++ b/drivers/acpi/acpica/evxfregn.c
@@ -89,7 +89,7 @@ acpi_install_address_space_handler(acpi_handle device,
89 89
90 /* Convert and validate the device handle */ 90 /* Convert and validate the device handle */
91 91
92 node = acpi_ns_map_handle_to_node(device); 92 node = acpi_ns_validate_handle(device);
93 if (!node) { 93 if (!node) {
94 status = AE_BAD_PARAMETER; 94 status = AE_BAD_PARAMETER;
95 goto unlock_and_exit; 95 goto unlock_and_exit;
@@ -155,7 +155,7 @@ acpi_remove_address_space_handler(acpi_handle device,
155 155
156 /* Convert and validate the device handle */ 156 /* Convert and validate the device handle */
157 157
158 node = acpi_ns_map_handle_to_node(device); 158 node = acpi_ns_validate_handle(device);
159 if (!node || 159 if (!node ||
160 ((node->type != ACPI_TYPE_DEVICE) && 160 ((node->type != ACPI_TYPE_DEVICE) &&
161 (node->type != ACPI_TYPE_PROCESSOR) && 161 (node->type != ACPI_TYPE_PROCESSOR) &&
diff --git a/drivers/acpi/acpica/exmutex.c b/drivers/acpi/acpica/exmutex.c
index 2f0114202b05..3c456bd575d0 100644
--- a/drivers/acpi/acpica/exmutex.c
+++ b/drivers/acpi/acpica/exmutex.c
@@ -375,6 +375,15 @@ acpi_ex_release_mutex(union acpi_operand_object *obj_desc,
375 return_ACPI_STATUS(AE_AML_MUTEX_NOT_ACQUIRED); 375 return_ACPI_STATUS(AE_AML_MUTEX_NOT_ACQUIRED);
376 } 376 }
377 377
378 /* Must have a valid thread ID */
379
380 if (!walk_state->thread) {
381 ACPI_ERROR((AE_INFO,
382 "Cannot release Mutex [%4.4s], null thread info",
383 acpi_ut_get_node_name(obj_desc->mutex.node)));
384 return_ACPI_STATUS(AE_AML_INTERNAL);
385 }
386
378 /* 387 /*
379 * The Mutex is owned, but this thread must be the owner. 388 * The Mutex is owned, but this thread must be the owner.
380 * Special case for Global Lock, any thread can release 389 * Special case for Global Lock, any thread can release
@@ -392,15 +401,6 @@ acpi_ex_release_mutex(union acpi_operand_object *obj_desc,
392 return_ACPI_STATUS(AE_AML_NOT_OWNER); 401 return_ACPI_STATUS(AE_AML_NOT_OWNER);
393 } 402 }
394 403
395 /* Must have a valid thread ID */
396
397 if (!walk_state->thread) {
398 ACPI_ERROR((AE_INFO,
399 "Cannot release Mutex [%4.4s], null thread info",
400 acpi_ut_get_node_name(obj_desc->mutex.node)));
401 return_ACPI_STATUS(AE_AML_INTERNAL);
402 }
403
404 /* 404 /*
405 * The sync level of the mutex must be equal to the current sync level. In 405 * The sync level of the mutex must be equal to the current sync level. In
406 * other words, the current level means that at least one mutex at that 406 * other words, the current level means that at least one mutex at that
diff --git a/drivers/acpi/acpica/nsaccess.c b/drivers/acpi/acpica/nsaccess.c
index 9c3cdbe2d82a..d622ba770000 100644
--- a/drivers/acpi/acpica/nsaccess.c
+++ b/drivers/acpi/acpica/nsaccess.c
@@ -165,7 +165,7 @@ acpi_status acpi_ns_root_initialize(void)
165 165
166 obj_desc->method.method_flags = 166 obj_desc->method.method_flags =
167 AML_METHOD_INTERNAL_ONLY; 167 AML_METHOD_INTERNAL_ONLY;
168 obj_desc->method.implementation = 168 obj_desc->method.extra.implementation =
169 acpi_ut_osi_implementation; 169 acpi_ut_osi_implementation;
170#endif 170#endif
171 break; 171 break;
diff --git a/drivers/acpi/acpica/nsdump.c b/drivers/acpi/acpica/nsdump.c
index 2deb986861ca..e37836e27e29 100644
--- a/drivers/acpi/acpica/nsdump.c
+++ b/drivers/acpi/acpica/nsdump.c
@@ -180,7 +180,7 @@ acpi_ns_dump_one_object(acpi_handle obj_handle,
180 return (AE_OK); 180 return (AE_OK);
181 } 181 }
182 182
183 this_node = acpi_ns_map_handle_to_node(obj_handle); 183 this_node = acpi_ns_validate_handle(obj_handle);
184 if (!this_node) { 184 if (!this_node) {
185 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "Invalid object handle %p\n", 185 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "Invalid object handle %p\n",
186 obj_handle)); 186 obj_handle));
diff --git a/drivers/acpi/acpica/nseval.c b/drivers/acpi/acpica/nseval.c
index f771e978c403..af9fe9103734 100644
--- a/drivers/acpi/acpica/nseval.c
+++ b/drivers/acpi/acpica/nseval.c
@@ -381,6 +381,18 @@ acpi_ns_exec_module_code(union acpi_operand_object *method_obj,
381 method_obj->method.next_object); 381 method_obj->method.next_object);
382 type = acpi_ns_get_type(parent_node); 382 type = acpi_ns_get_type(parent_node);
383 383
384 /*
385 * Get the region handler and save it in the method object. We may need
386 * this if an operation region declaration causes a _REG method to be run.
387 *
388 * We can't do this in acpi_ps_link_module_code because
389 * acpi_gbl_root_node->Object is NULL at PASS1.
390 */
391 if ((type == ACPI_TYPE_DEVICE) && parent_node->object) {
392 method_obj->method.extra.handler =
393 parent_node->object->device.handler;
394 }
395
384 /* Must clear next_object (acpi_ns_attach_object needs the field) */ 396 /* Must clear next_object (acpi_ns_attach_object needs the field) */
385 397
386 method_obj->method.next_object = NULL; 398 method_obj->method.next_object = NULL;
@@ -415,6 +427,12 @@ acpi_ns_exec_module_code(union acpi_operand_object *method_obj,
415 ACPI_DEBUG_PRINT((ACPI_DB_INIT, "Executed module-level code at %p\n", 427 ACPI_DEBUG_PRINT((ACPI_DB_INIT, "Executed module-level code at %p\n",
416 method_obj->method.aml_start)); 428 method_obj->method.aml_start));
417 429
430 /* Delete a possible implicit return value (in slack mode) */
431
432 if (info->return_object) {
433 acpi_ut_remove_reference(info->return_object);
434 }
435
418 /* Detach the temporary method object */ 436 /* Detach the temporary method object */
419 437
420 acpi_ns_detach_object(parent_node); 438 acpi_ns_detach_object(parent_node);
diff --git a/drivers/acpi/acpica/nsnames.c b/drivers/acpi/acpica/nsnames.c
index af8e6bcee07e..8f9a4875ce26 100644
--- a/drivers/acpi/acpica/nsnames.c
+++ b/drivers/acpi/acpica/nsnames.c
@@ -232,7 +232,7 @@ acpi_ns_handle_to_pathname(acpi_handle target_handle,
232 232
233 ACPI_FUNCTION_TRACE_PTR(ns_handle_to_pathname, target_handle); 233 ACPI_FUNCTION_TRACE_PTR(ns_handle_to_pathname, target_handle);
234 234
235 node = acpi_ns_map_handle_to_node(target_handle); 235 node = acpi_ns_validate_handle(target_handle);
236 if (!node) { 236 if (!node) {
237 return_ACPI_STATUS(AE_BAD_PARAMETER); 237 return_ACPI_STATUS(AE_BAD_PARAMETER);
238 } 238 }
diff --git a/drivers/acpi/acpica/nspredef.c b/drivers/acpi/acpica/nspredef.c
index b05f42903c86..d34fa59548f7 100644
--- a/drivers/acpi/acpica/nspredef.c
+++ b/drivers/acpi/acpica/nspredef.c
@@ -216,29 +216,38 @@ acpi_ns_check_predefined_names(struct acpi_namespace_node *node,
216 data->pathname = pathname; 216 data->pathname = pathname;
217 217
218 /* 218 /*
219 * Check that the type of the return object is what is expected for 219 * Check that the type of the main return object is what is expected
220 * this predefined name 220 * for this predefined name
221 */ 221 */
222 status = acpi_ns_check_object_type(data, return_object_ptr, 222 status = acpi_ns_check_object_type(data, return_object_ptr,
223 predefined->info.expected_btypes, 223 predefined->info.expected_btypes,
224 ACPI_NOT_PACKAGE_ELEMENT); 224 ACPI_NOT_PACKAGE_ELEMENT);
225 if (ACPI_FAILURE(status)) { 225 if (ACPI_FAILURE(status)) {
226 goto check_validation_status; 226 goto exit;
227 } 227 }
228 228
229 /* For returned Package objects, check the type of all sub-objects */ 229 /*
230 230 * For returned Package objects, check the type of all sub-objects.
231 if (return_object->common.type == ACPI_TYPE_PACKAGE) { 231 * Note: Package may have been newly created by call above.
232 */
233 if ((*return_object_ptr)->common.type == ACPI_TYPE_PACKAGE) {
232 status = acpi_ns_check_package(data, return_object_ptr); 234 status = acpi_ns_check_package(data, return_object_ptr);
235 if (ACPI_FAILURE(status)) {
236 goto exit;
237 }
233 } 238 }
234 239
235 /* 240 /*
236 * Perform additional, more complicated repairs on a per-name 241 * The return object was OK, or it was successfully repaired above.
237 * basis. 242 * Now make some additional checks such as verifying that package
243 * objects are sorted correctly (if required) or buffer objects have
244 * the correct data width (bytes vs. dwords). These repairs are
245 * performed on a per-name basis, i.e., the code is specific to
246 * particular predefined names.
238 */ 247 */
239 status = acpi_ns_complex_repairs(data, node, status, return_object_ptr); 248 status = acpi_ns_complex_repairs(data, node, status, return_object_ptr);
240 249
241check_validation_status: 250exit:
242 /* 251 /*
243 * If the object validation failed or if we successfully repaired one 252 * If the object validation failed or if we successfully repaired one
244 * or more objects, mark the parent node to suppress further warning 253 * or more objects, mark the parent node to suppress further warning
@@ -427,6 +436,13 @@ acpi_ns_check_package(struct acpi_predefined_data *data,
427 data->pathname, package->ret_info.type, 436 data->pathname, package->ret_info.type,
428 return_object->package.count)); 437 return_object->package.count));
429 438
439 /*
440 * For variable-length Packages, we can safely remove all embedded
441 * and trailing NULL package elements
442 */
443 acpi_ns_remove_null_elements(data, package->ret_info.type,
444 return_object);
445
430 /* Extract package count and elements array */ 446 /* Extract package count and elements array */
431 447
432 elements = return_object->package.elements; 448 elements = return_object->package.elements;
@@ -461,11 +477,11 @@ acpi_ns_check_package(struct acpi_predefined_data *data,
461 if (count < expected_count) { 477 if (count < expected_count) {
462 goto package_too_small; 478 goto package_too_small;
463 } else if (count > expected_count) { 479 } else if (count > expected_count) {
464 ACPI_WARN_PREDEFINED((AE_INFO, data->pathname, 480 ACPI_DEBUG_PRINT((ACPI_DB_REPAIR,
465 data->node_flags, 481 "%s: Return Package is larger than needed - "
466 "Return Package is larger than needed - " 482 "found %u, expected %u\n",
467 "found %u, expected %u", count, 483 data->pathname, count,
468 expected_count)); 484 expected_count));
469 } 485 }
470 486
471 /* Validate all elements of the returned package */ 487 /* Validate all elements of the returned package */
@@ -680,53 +696,18 @@ acpi_ns_check_package_list(struct acpi_predefined_data *data,
680 union acpi_operand_object *sub_package; 696 union acpi_operand_object *sub_package;
681 union acpi_operand_object **sub_elements; 697 union acpi_operand_object **sub_elements;
682 acpi_status status; 698 acpi_status status;
683 u8 non_trailing_null = FALSE;
684 u32 expected_count; 699 u32 expected_count;
685 u32 i; 700 u32 i;
686 u32 j; 701 u32 j;
687 702
688 /* Validate each sub-Package in the parent Package */ 703 /*
689 704 * Validate each sub-Package in the parent Package
705 *
706 * NOTE: assumes list of sub-packages contains no NULL elements.
707 * Any NULL elements should have been removed by earlier call
708 * to acpi_ns_remove_null_elements.
709 */
690 for (i = 0; i < count; i++) { 710 for (i = 0; i < count; i++) {
691 /*
692 * Handling for NULL package elements. For now, we will simply allow
693 * a parent package with trailing NULL elements. This can happen if
694 * the package was defined to be longer than the initializer list.
695 * This is legal as per the ACPI specification. It is often used
696 * to allow for dynamic initialization of a Package.
697 *
698 * A future enhancement may be to simply truncate the package to
699 * remove the trailing NULL elements.
700 */
701 if (!(*elements)) {
702 if (!non_trailing_null) {
703
704 /* Ensure the remaining elements are all NULL */
705
706 for (j = 1; j < (count - i + 1); j++) {
707 if (elements[j]) {
708 non_trailing_null = TRUE;
709 }
710 }
711
712 if (!non_trailing_null) {
713
714 /* Ignore the trailing NULL elements */
715
716 return (AE_OK);
717 }
718 }
719
720 /* There are trailing non-null elements, issue warning */
721
722 ACPI_WARN_PREDEFINED((AE_INFO, data->pathname,
723 data->node_flags,
724 "Found NULL element at package index %u",
725 i));
726 elements++;
727 continue;
728 }
729
730 sub_package = *elements; 711 sub_package = *elements;
731 sub_elements = sub_package->package.elements; 712 sub_elements = sub_package->package.elements;
732 713
diff --git a/drivers/acpi/acpica/nsrepair.c b/drivers/acpi/acpica/nsrepair.c
index d563f1a564a7..4fd1bdb056b2 100644
--- a/drivers/acpi/acpica/nsrepair.c
+++ b/drivers/acpi/acpica/nsrepair.c
@@ -45,13 +45,52 @@
45#include "accommon.h" 45#include "accommon.h"
46#include "acnamesp.h" 46#include "acnamesp.h"
47#include "acinterp.h" 47#include "acinterp.h"
48#include "acpredef.h"
49 48
50#define _COMPONENT ACPI_NAMESPACE 49#define _COMPONENT ACPI_NAMESPACE
51ACPI_MODULE_NAME("nsrepair") 50ACPI_MODULE_NAME("nsrepair")
52 51
53/******************************************************************************* 52/*******************************************************************************
54 * 53 *
54 * This module attempts to repair or convert objects returned by the
55 * predefined methods to an object type that is expected, as per the ACPI
56 * specification. The need for this code is dictated by the many machines that
57 * return incorrect types for the standard predefined methods. Performing these
58 * conversions here, in one place, eliminates the need for individual ACPI
59 * device drivers to do the same. Note: Most of these conversions are different
60 * than the internal object conversion routines used for implicit object
61 * conversion.
62 *
63 * The following conversions can be performed as necessary:
64 *
65 * Integer -> String
66 * Integer -> Buffer
67 * String -> Integer
68 * String -> Buffer
69 * Buffer -> Integer
70 * Buffer -> String
71 * Buffer -> Package of Integers
72 * Package -> Package of one Package
73 *
74 ******************************************************************************/
75/* Local prototypes */
76static acpi_status
77acpi_ns_convert_to_integer(union acpi_operand_object *original_object,
78 union acpi_operand_object **return_object);
79
80static acpi_status
81acpi_ns_convert_to_string(union acpi_operand_object *original_object,
82 union acpi_operand_object **return_object);
83
84static acpi_status
85acpi_ns_convert_to_buffer(union acpi_operand_object *original_object,
86 union acpi_operand_object **return_object);
87
88static acpi_status
89acpi_ns_convert_to_package(union acpi_operand_object *original_object,
90 union acpi_operand_object **return_object);
91
92/*******************************************************************************
93 *
55 * FUNCTION: acpi_ns_repair_object 94 * FUNCTION: acpi_ns_repair_object
56 * 95 *
57 * PARAMETERS: Data - Pointer to validation data structure 96 * PARAMETERS: Data - Pointer to validation data structure
@@ -68,6 +107,7 @@ ACPI_MODULE_NAME("nsrepair")
68 * not expected. 107 * not expected.
69 * 108 *
70 ******************************************************************************/ 109 ******************************************************************************/
110
71acpi_status 111acpi_status
72acpi_ns_repair_object(struct acpi_predefined_data *data, 112acpi_ns_repair_object(struct acpi_predefined_data *data,
73 u32 expected_btypes, 113 u32 expected_btypes,
@@ -76,32 +116,206 @@ acpi_ns_repair_object(struct acpi_predefined_data *data,
76{ 116{
77 union acpi_operand_object *return_object = *return_object_ptr; 117 union acpi_operand_object *return_object = *return_object_ptr;
78 union acpi_operand_object *new_object; 118 union acpi_operand_object *new_object;
79 acpi_size length;
80 acpi_status status; 119 acpi_status status;
81 120
121 ACPI_FUNCTION_NAME(ns_repair_object);
122
82 /* 123 /*
83 * At this point, we know that the type of the returned object was not 124 * At this point, we know that the type of the returned object was not
84 * one of the expected types for this predefined name. Attempt to 125 * one of the expected types for this predefined name. Attempt to
85 * repair the object. Only a limited number of repairs are possible. 126 * repair the object by converting it to one of the expected object
127 * types for this predefined name.
86 */ 128 */
87 switch (return_object->common.type) { 129 if (expected_btypes & ACPI_RTYPE_INTEGER) {
130 status = acpi_ns_convert_to_integer(return_object, &new_object);
131 if (ACPI_SUCCESS(status)) {
132 goto object_repaired;
133 }
134 }
135 if (expected_btypes & ACPI_RTYPE_STRING) {
136 status = acpi_ns_convert_to_string(return_object, &new_object);
137 if (ACPI_SUCCESS(status)) {
138 goto object_repaired;
139 }
140 }
141 if (expected_btypes & ACPI_RTYPE_BUFFER) {
142 status = acpi_ns_convert_to_buffer(return_object, &new_object);
143 if (ACPI_SUCCESS(status)) {
144 goto object_repaired;
145 }
146 }
147 if (expected_btypes & ACPI_RTYPE_PACKAGE) {
148 status = acpi_ns_convert_to_package(return_object, &new_object);
149 if (ACPI_SUCCESS(status)) {
150 goto object_repaired;
151 }
152 }
153
154 /* We cannot repair this object */
155
156 return (AE_AML_OPERAND_TYPE);
157
158 object_repaired:
159
160 /* Object was successfully repaired */
161
162 /*
163 * If the original object is a package element, we need to:
164 * 1. Set the reference count of the new object to match the
165 * reference count of the old object.
166 * 2. Decrement the reference count of the original object.
167 */
168 if (package_index != ACPI_NOT_PACKAGE_ELEMENT) {
169 new_object->common.reference_count =
170 return_object->common.reference_count;
171
172 if (return_object->common.reference_count > 1) {
173 return_object->common.reference_count--;
174 }
175
176 ACPI_DEBUG_PRINT((ACPI_DB_REPAIR,
177 "%s: Converted %s to expected %s at index %u\n",
178 data->pathname,
179 acpi_ut_get_object_type_name(return_object),
180 acpi_ut_get_object_type_name(new_object),
181 package_index));
182 } else {
183 ACPI_DEBUG_PRINT((ACPI_DB_REPAIR,
184 "%s: Converted %s to expected %s\n",
185 data->pathname,
186 acpi_ut_get_object_type_name(return_object),
187 acpi_ut_get_object_type_name(new_object)));
188 }
189
190 /* Delete old object, install the new return object */
191
192 acpi_ut_remove_reference(return_object);
193 *return_object_ptr = new_object;
194 data->flags |= ACPI_OBJECT_REPAIRED;
195 return (AE_OK);
196}
197
198/*******************************************************************************
199 *
200 * FUNCTION: acpi_ns_convert_to_integer
201 *
202 * PARAMETERS: original_object - Object to be converted
203 * return_object - Where the new converted object is returned
204 *
205 * RETURN: Status. AE_OK if conversion was successful.
206 *
207 * DESCRIPTION: Attempt to convert a String/Buffer object to an Integer.
208 *
209 ******************************************************************************/
210
211static acpi_status
212acpi_ns_convert_to_integer(union acpi_operand_object *original_object,
213 union acpi_operand_object **return_object)
214{
215 union acpi_operand_object *new_object;
216 acpi_status status;
217 u64 value = 0;
218 u32 i;
219
220 switch (original_object->common.type) {
221 case ACPI_TYPE_STRING:
222
223 /* String-to-Integer conversion */
224
225 status = acpi_ut_strtoul64(original_object->string.pointer,
226 ACPI_ANY_BASE, &value);
227 if (ACPI_FAILURE(status)) {
228 return (status);
229 }
230 break;
231
88 case ACPI_TYPE_BUFFER: 232 case ACPI_TYPE_BUFFER:
89 233
90 /* Does the method/object legally return a string? */ 234 /* Buffer-to-Integer conversion. Max buffer size is 64 bits. */
91 235
92 if (!(expected_btypes & ACPI_RTYPE_STRING)) { 236 if (original_object->buffer.length > 8) {
93 return (AE_AML_OPERAND_TYPE); 237 return (AE_AML_OPERAND_TYPE);
94 } 238 }
95 239
240 /* Extract each buffer byte to create the integer */
241
242 for (i = 0; i < original_object->buffer.length; i++) {
243 value |=
244 ((u64) original_object->buffer.
245 pointer[i] << (i * 8));
246 }
247 break;
248
249 default:
250 return (AE_AML_OPERAND_TYPE);
251 }
252
253 new_object = acpi_ut_create_integer_object(value);
254 if (!new_object) {
255 return (AE_NO_MEMORY);
256 }
257
258 *return_object = new_object;
259 return (AE_OK);
260}
261
262/*******************************************************************************
263 *
264 * FUNCTION: acpi_ns_convert_to_string
265 *
266 * PARAMETERS: original_object - Object to be converted
267 * return_object - Where the new converted object is returned
268 *
269 * RETURN: Status. AE_OK if conversion was successful.
270 *
271 * DESCRIPTION: Attempt to convert a Integer/Buffer object to a String.
272 *
273 ******************************************************************************/
274
275static acpi_status
276acpi_ns_convert_to_string(union acpi_operand_object *original_object,
277 union acpi_operand_object **return_object)
278{
279 union acpi_operand_object *new_object;
280 acpi_size length;
281 acpi_status status;
282
283 switch (original_object->common.type) {
284 case ACPI_TYPE_INTEGER:
285 /*
286 * Integer-to-String conversion. Commonly, convert
287 * an integer of value 0 to a NULL string. The last element of
288 * _BIF and _BIX packages occasionally need this fix.
289 */
290 if (original_object->integer.value == 0) {
291
292 /* Allocate a new NULL string object */
293
294 new_object = acpi_ut_create_string_object(0);
295 if (!new_object) {
296 return (AE_NO_MEMORY);
297 }
298 } else {
299 status =
300 acpi_ex_convert_to_string(original_object,
301 &new_object,
302 ACPI_IMPLICIT_CONVERT_HEX);
303 if (ACPI_FAILURE(status)) {
304 return (status);
305 }
306 }
307 break;
308
309 case ACPI_TYPE_BUFFER:
96 /* 310 /*
97 * Have a Buffer, expected a String, convert. Use a to_string 311 * Buffer-to-String conversion. Use a to_string
98 * conversion, no transform performed on the buffer data. The best 312 * conversion, no transform performed on the buffer data. The best
99 * example of this is the _BIF method, where the string data from 313 * example of this is the _BIF method, where the string data from
100 * the battery is often (incorrectly) returned as buffer object(s). 314 * the battery is often (incorrectly) returned as buffer object(s).
101 */ 315 */
102 length = 0; 316 length = 0;
103 while ((length < return_object->buffer.length) && 317 while ((length < original_object->buffer.length) &&
104 (return_object->buffer.pointer[length])) { 318 (original_object->buffer.pointer[length])) {
105 length++; 319 length++;
106 } 320 }
107 321
@@ -117,94 +331,176 @@ acpi_ns_repair_object(struct acpi_predefined_data *data,
117 * terminated at Length+1. 331 * terminated at Length+1.
118 */ 332 */
119 ACPI_MEMCPY(new_object->string.pointer, 333 ACPI_MEMCPY(new_object->string.pointer,
120 return_object->buffer.pointer, length); 334 original_object->buffer.pointer, length);
121 break; 335 break;
122 336
337 default:
338 return (AE_AML_OPERAND_TYPE);
339 }
340
341 *return_object = new_object;
342 return (AE_OK);
343}
344
345/*******************************************************************************
346 *
347 * FUNCTION: acpi_ns_convert_to_buffer
348 *
349 * PARAMETERS: original_object - Object to be converted
350 * return_object - Where the new converted object is returned
351 *
352 * RETURN: Status. AE_OK if conversion was successful.
353 *
354 * DESCRIPTION: Attempt to convert a Integer/String/Package object to a Buffer.
355 *
356 ******************************************************************************/
357
358static acpi_status
359acpi_ns_convert_to_buffer(union acpi_operand_object *original_object,
360 union acpi_operand_object **return_object)
361{
362 union acpi_operand_object *new_object;
363 acpi_status status;
364 union acpi_operand_object **elements;
365 u32 *dword_buffer;
366 u32 count;
367 u32 i;
368
369 switch (original_object->common.type) {
123 case ACPI_TYPE_INTEGER: 370 case ACPI_TYPE_INTEGER:
371 /*
372 * Integer-to-Buffer conversion.
373 * Convert the Integer to a packed-byte buffer. _MAT and other
374 * objects need this sometimes, if a read has been performed on a
375 * Field object that is less than or equal to the global integer
376 * size (32 or 64 bits).
377 */
378 status =
379 acpi_ex_convert_to_buffer(original_object, &new_object);
380 if (ACPI_FAILURE(status)) {
381 return (status);
382 }
383 break;
124 384
125 /* 1) Does the method/object legally return a buffer? */ 385 case ACPI_TYPE_STRING:
126 386
127 if (expected_btypes & ACPI_RTYPE_BUFFER) { 387 /* String-to-Buffer conversion. Simple data copy */
128 /* 388
129 * Convert the Integer to a packed-byte buffer. _MAT needs 389 new_object =
130 * this sometimes, if a read has been performed on a Field 390 acpi_ut_create_buffer_object(original_object->string.
131 * object that is less than or equal to the global integer 391 length);
132 * size (32 or 64 bits). 392 if (!new_object) {
133 */ 393 return (AE_NO_MEMORY);
134 status =
135 acpi_ex_convert_to_buffer(return_object,
136 &new_object);
137 if (ACPI_FAILURE(status)) {
138 return (status);
139 }
140 } 394 }
141 395
142 /* 2) Does the method/object legally return a string? */ 396 ACPI_MEMCPY(new_object->buffer.pointer,
397 original_object->string.pointer,
398 original_object->string.length);
399 break;
400
401 case ACPI_TYPE_PACKAGE:
402 /*
403 * This case is often seen for predefined names that must return a
404 * Buffer object with multiple DWORD integers within. For example,
405 * _FDE and _GTM. The Package can be converted to a Buffer.
406 */
407
408 /* All elements of the Package must be integers */
143 409
144 else if (expected_btypes & ACPI_RTYPE_STRING) { 410 elements = original_object->package.elements;
145 /* 411 count = original_object->package.count;
146 * The only supported Integer-to-String conversion is to convert 412
147 * an integer of value 0 to a NULL string. The last element of 413 for (i = 0; i < count; i++) {
148 * _BIF and _BIX packages occasionally need this fix. 414 if ((!*elements) ||
149 */ 415 ((*elements)->common.type != ACPI_TYPE_INTEGER)) {
150 if (return_object->integer.value != 0) {
151 return (AE_AML_OPERAND_TYPE); 416 return (AE_AML_OPERAND_TYPE);
152 } 417 }
418 elements++;
419 }
153 420
154 /* Allocate a new NULL string object */ 421 /* Create the new buffer object to replace the Package */
155 422
156 new_object = acpi_ut_create_string_object(0); 423 new_object = acpi_ut_create_buffer_object(ACPI_MUL_4(count));
157 if (!new_object) { 424 if (!new_object) {
158 return (AE_NO_MEMORY); 425 return (AE_NO_MEMORY);
159 }
160 } else {
161 return (AE_AML_OPERAND_TYPE);
162 } 426 }
163 break;
164 427
165 default: 428 /* Copy the package elements (integers) to the buffer as DWORDs */
166 429
167 /* We cannot repair this object */ 430 elements = original_object->package.elements;
431 dword_buffer = ACPI_CAST_PTR(u32, new_object->buffer.pointer);
432
433 for (i = 0; i < count; i++) {
434 *dword_buffer = (u32) (*elements)->integer.value;
435 dword_buffer++;
436 elements++;
437 }
438 break;
168 439
440 default:
169 return (AE_AML_OPERAND_TYPE); 441 return (AE_AML_OPERAND_TYPE);
170 } 442 }
171 443
172 /* Object was successfully repaired */ 444 *return_object = new_object;
445 return (AE_OK);
446}
173 447
174 /* 448/*******************************************************************************
175 * If the original object is a package element, we need to: 449 *
176 * 1. Set the reference count of the new object to match the 450 * FUNCTION: acpi_ns_convert_to_package
177 * reference count of the old object. 451 *
178 * 2. Decrement the reference count of the original object. 452 * PARAMETERS: original_object - Object to be converted
179 */ 453 * return_object - Where the new converted object is returned
180 if (package_index != ACPI_NOT_PACKAGE_ELEMENT) { 454 *
181 new_object->common.reference_count = 455 * RETURN: Status. AE_OK if conversion was successful.
182 return_object->common.reference_count; 456 *
457 * DESCRIPTION: Attempt to convert a Buffer object to a Package. Each byte of
458 * the buffer is converted to a single integer package element.
459 *
460 ******************************************************************************/
183 461
184 if (return_object->common.reference_count > 1) { 462static acpi_status
185 return_object->common.reference_count--; 463acpi_ns_convert_to_package(union acpi_operand_object *original_object,
464 union acpi_operand_object **return_object)
465{
466 union acpi_operand_object *new_object;
467 union acpi_operand_object **elements;
468 u32 length;
469 u8 *buffer;
470
471 switch (original_object->common.type) {
472 case ACPI_TYPE_BUFFER:
473
474 /* Buffer-to-Package conversion */
475
476 length = original_object->buffer.length;
477 new_object = acpi_ut_create_package_object(length);
478 if (!new_object) {
479 return (AE_NO_MEMORY);
186 } 480 }
187 481
188 ACPI_INFO_PREDEFINED((AE_INFO, data->pathname, data->node_flags, 482 /* Convert each buffer byte to an integer package element */
189 "Converted %s to expected %s at index %u",
190 acpi_ut_get_object_type_name
191 (return_object),
192 acpi_ut_get_object_type_name(new_object),
193 package_index));
194 } else {
195 ACPI_INFO_PREDEFINED((AE_INFO, data->pathname, data->node_flags,
196 "Converted %s to expected %s",
197 acpi_ut_get_object_type_name
198 (return_object),
199 acpi_ut_get_object_type_name
200 (new_object)));
201 }
202 483
203 /* Delete old object, install the new return object */ 484 elements = new_object->package.elements;
485 buffer = original_object->buffer.pointer;
204 486
205 acpi_ut_remove_reference(return_object); 487 while (length--) {
206 *return_object_ptr = new_object; 488 *elements =
207 data->flags |= ACPI_OBJECT_REPAIRED; 489 acpi_ut_create_integer_object((u64) *buffer);
490 if (!*elements) {
491 acpi_ut_remove_reference(new_object);
492 return (AE_NO_MEMORY);
493 }
494 elements++;
495 buffer++;
496 }
497 break;
498
499 default:
500 return (AE_AML_OPERAND_TYPE);
501 }
502
503 *return_object = new_object;
208 return (AE_OK); 504 return (AE_OK);
209} 505}
210 506
@@ -238,6 +534,8 @@ acpi_ns_repair_package_list(struct acpi_predefined_data *data,
238{ 534{
239 union acpi_operand_object *pkg_obj_desc; 535 union acpi_operand_object *pkg_obj_desc;
240 536
537 ACPI_FUNCTION_NAME(ns_repair_package_list);
538
241 /* 539 /*
242 * Create the new outer package and populate it. The new package will 540 * Create the new outer package and populate it. The new package will
243 * have a single element, the lone subpackage. 541 * have a single element, the lone subpackage.
@@ -254,8 +552,9 @@ acpi_ns_repair_package_list(struct acpi_predefined_data *data,
254 *obj_desc_ptr = pkg_obj_desc; 552 *obj_desc_ptr = pkg_obj_desc;
255 data->flags |= ACPI_OBJECT_REPAIRED; 553 data->flags |= ACPI_OBJECT_REPAIRED;
256 554
257 ACPI_INFO_PREDEFINED((AE_INFO, data->pathname, data->node_flags, 555 ACPI_DEBUG_PRINT((ACPI_DB_REPAIR,
258 "Repaired Incorrectly formed Package")); 556 "%s: Repaired incorrectly formed Package\n",
557 data->pathname));
259 558
260 return (AE_OK); 559 return (AE_OK);
261} 560}
diff --git a/drivers/acpi/acpica/nsrepair2.c b/drivers/acpi/acpica/nsrepair2.c
index d07b68613818..f13691c1cca5 100644
--- a/drivers/acpi/acpica/nsrepair2.c
+++ b/drivers/acpi/acpica/nsrepair2.c
@@ -45,6 +45,7 @@
45#include <acpi/acpi.h> 45#include <acpi/acpi.h>
46#include "accommon.h" 46#include "accommon.h"
47#include "acnamesp.h" 47#include "acnamesp.h"
48#include "acpredef.h"
48 49
49#define _COMPONENT ACPI_NAMESPACE 50#define _COMPONENT ACPI_NAMESPACE
50ACPI_MODULE_NAME("nsrepair2") 51ACPI_MODULE_NAME("nsrepair2")
@@ -74,6 +75,10 @@ acpi_ns_repair_ALR(struct acpi_predefined_data *data,
74 union acpi_operand_object **return_object_ptr); 75 union acpi_operand_object **return_object_ptr);
75 76
76static acpi_status 77static acpi_status
78acpi_ns_repair_FDE(struct acpi_predefined_data *data,
79 union acpi_operand_object **return_object_ptr);
80
81static acpi_status
77acpi_ns_repair_PSS(struct acpi_predefined_data *data, 82acpi_ns_repair_PSS(struct acpi_predefined_data *data,
78 union acpi_operand_object **return_object_ptr); 83 union acpi_operand_object **return_object_ptr);
79 84
@@ -89,9 +94,6 @@ acpi_ns_check_sorted_list(struct acpi_predefined_data *data,
89 u8 sort_direction, char *sort_key_name); 94 u8 sort_direction, char *sort_key_name);
90 95
91static acpi_status 96static acpi_status
92acpi_ns_remove_null_elements(union acpi_operand_object *package);
93
94static acpi_status
95acpi_ns_sort_list(union acpi_operand_object **elements, 97acpi_ns_sort_list(union acpi_operand_object **elements,
96 u32 count, u32 index, u8 sort_direction); 98 u32 count, u32 index, u8 sort_direction);
97 99
@@ -104,17 +106,27 @@ acpi_ns_sort_list(union acpi_operand_object **elements,
104 * This table contains the names of the predefined methods for which we can 106 * This table contains the names of the predefined methods for which we can
105 * perform more complex repairs. 107 * perform more complex repairs.
106 * 108 *
107 * _ALR: Sort the list ascending by ambient_illuminance if necessary 109 * As necessary:
108 * _PSS: Sort the list descending by Power if necessary 110 *
109 * _TSS: Sort the list descending by Power if necessary 111 * _ALR: Sort the list ascending by ambient_illuminance
112 * _FDE: Convert Buffer of BYTEs to a Buffer of DWORDs
113 * _GTM: Convert Buffer of BYTEs to a Buffer of DWORDs
114 * _PSS: Sort the list descending by Power
115 * _TSS: Sort the list descending by Power
110 */ 116 */
111static const struct acpi_repair_info acpi_ns_repairable_names[] = { 117static const struct acpi_repair_info acpi_ns_repairable_names[] = {
112 {"_ALR", acpi_ns_repair_ALR}, 118 {"_ALR", acpi_ns_repair_ALR},
119 {"_FDE", acpi_ns_repair_FDE},
120 {"_GTM", acpi_ns_repair_FDE}, /* _GTM has same repair as _FDE */
113 {"_PSS", acpi_ns_repair_PSS}, 121 {"_PSS", acpi_ns_repair_PSS},
114 {"_TSS", acpi_ns_repair_TSS}, 122 {"_TSS", acpi_ns_repair_TSS},
115 {{0, 0, 0, 0}, NULL} /* Table terminator */ 123 {{0, 0, 0, 0}, NULL} /* Table terminator */
116}; 124};
117 125
126#define ACPI_FDE_FIELD_COUNT 5
127#define ACPI_FDE_BYTE_BUFFER_SIZE 5
128#define ACPI_FDE_DWORD_BUFFER_SIZE (ACPI_FDE_FIELD_COUNT * sizeof (u32))
129
118/****************************************************************************** 130/******************************************************************************
119 * 131 *
120 * FUNCTION: acpi_ns_complex_repairs 132 * FUNCTION: acpi_ns_complex_repairs
@@ -215,6 +227,94 @@ acpi_ns_repair_ALR(struct acpi_predefined_data *data,
215 227
216/****************************************************************************** 228/******************************************************************************
217 * 229 *
230 * FUNCTION: acpi_ns_repair_FDE
231 *
232 * PARAMETERS: Data - Pointer to validation data structure
233 * return_object_ptr - Pointer to the object returned from the
234 * evaluation of a method or object
235 *
236 * RETURN: Status. AE_OK if object is OK or was repaired successfully
237 *
238 * DESCRIPTION: Repair for the _FDE and _GTM objects. The expected return
239 * value is a Buffer of 5 DWORDs. This function repairs a common
240 * problem where the return value is a Buffer of BYTEs, not
241 * DWORDs.
242 *
243 *****************************************************************************/
244
245static acpi_status
246acpi_ns_repair_FDE(struct acpi_predefined_data *data,
247 union acpi_operand_object **return_object_ptr)
248{
249 union acpi_operand_object *return_object = *return_object_ptr;
250 union acpi_operand_object *buffer_object;
251 u8 *byte_buffer;
252 u32 *dword_buffer;
253 u32 i;
254
255 ACPI_FUNCTION_NAME(ns_repair_FDE);
256
257 switch (return_object->common.type) {
258 case ACPI_TYPE_BUFFER:
259
260 /* This is the expected type. Length should be (at least) 5 DWORDs */
261
262 if (return_object->buffer.length >= ACPI_FDE_DWORD_BUFFER_SIZE) {
263 return (AE_OK);
264 }
265
266 /* We can only repair if we have exactly 5 BYTEs */
267
268 if (return_object->buffer.length != ACPI_FDE_BYTE_BUFFER_SIZE) {
269 ACPI_WARN_PREDEFINED((AE_INFO, data->pathname,
270 data->node_flags,
271 "Incorrect return buffer length %u, expected %u",
272 return_object->buffer.length,
273 ACPI_FDE_DWORD_BUFFER_SIZE));
274
275 return (AE_AML_OPERAND_TYPE);
276 }
277
278 /* Create the new (larger) buffer object */
279
280 buffer_object =
281 acpi_ut_create_buffer_object(ACPI_FDE_DWORD_BUFFER_SIZE);
282 if (!buffer_object) {
283 return (AE_NO_MEMORY);
284 }
285
286 /* Expand each byte to a DWORD */
287
288 byte_buffer = return_object->buffer.pointer;
289 dword_buffer =
290 ACPI_CAST_PTR(u32, buffer_object->buffer.pointer);
291
292 for (i = 0; i < ACPI_FDE_FIELD_COUNT; i++) {
293 *dword_buffer = (u32) *byte_buffer;
294 dword_buffer++;
295 byte_buffer++;
296 }
297
298 ACPI_DEBUG_PRINT((ACPI_DB_REPAIR,
299 "%s Expanded Byte Buffer to expected DWord Buffer\n",
300 data->pathname));
301 break;
302
303 default:
304 return (AE_AML_OPERAND_TYPE);
305 }
306
307 /* Delete the original return object, return the new buffer object */
308
309 acpi_ut_remove_reference(return_object);
310 *return_object_ptr = buffer_object;
311
312 data->flags |= ACPI_OBJECT_REPAIRED;
313 return (AE_OK);
314}
315
316/******************************************************************************
317 *
218 * FUNCTION: acpi_ns_repair_TSS 318 * FUNCTION: acpi_ns_repair_TSS
219 * 319 *
220 * PARAMETERS: Data - Pointer to validation data structure 320 * PARAMETERS: Data - Pointer to validation data structure
@@ -345,6 +445,8 @@ acpi_ns_check_sorted_list(struct acpi_predefined_data *data,
345 u32 previous_value; 445 u32 previous_value;
346 acpi_status status; 446 acpi_status status;
347 447
448 ACPI_FUNCTION_NAME(ns_check_sorted_list);
449
348 /* The top-level object must be a package */ 450 /* The top-level object must be a package */
349 451
350 if (return_object->common.type != ACPI_TYPE_PACKAGE) { 452 if (return_object->common.type != ACPI_TYPE_PACKAGE) {
@@ -352,24 +454,10 @@ acpi_ns_check_sorted_list(struct acpi_predefined_data *data,
352 } 454 }
353 455
354 /* 456 /*
355 * Detect any NULL package elements and remove them from the 457 * NOTE: assumes list of sub-packages contains no NULL elements.
356 * package. 458 * Any NULL elements should have been removed by earlier call
357 * 459 * to acpi_ns_remove_null_elements.
358 * TBD: We may want to do this for all predefined names that
359 * return a variable-length package of packages.
360 */ 460 */
361 status = acpi_ns_remove_null_elements(return_object);
362 if (status == AE_NULL_ENTRY) {
363 ACPI_INFO_PREDEFINED((AE_INFO, data->pathname, data->node_flags,
364 "NULL elements removed from package"));
365
366 /* Exit if package is now zero length */
367
368 if (!return_object->package.count) {
369 return (AE_NULL_ENTRY);
370 }
371 }
372
373 outer_elements = return_object->package.elements; 461 outer_elements = return_object->package.elements;
374 outer_element_count = return_object->package.count; 462 outer_element_count = return_object->package.count;
375 if (!outer_element_count) { 463 if (!outer_element_count) {
@@ -422,10 +510,9 @@ acpi_ns_check_sorted_list(struct acpi_predefined_data *data,
422 510
423 data->flags |= ACPI_OBJECT_REPAIRED; 511 data->flags |= ACPI_OBJECT_REPAIRED;
424 512
425 ACPI_INFO_PREDEFINED((AE_INFO, data->pathname, 513 ACPI_DEBUG_PRINT((ACPI_DB_REPAIR,
426 data->node_flags, 514 "%s: Repaired unsorted list - now sorted by %s\n",
427 "Repaired unsorted list - now sorted by %s", 515 data->pathname, sort_key_name));
428 sort_key_name));
429 return (AE_OK); 516 return (AE_OK);
430 } 517 }
431 518
@@ -440,36 +527,63 @@ acpi_ns_check_sorted_list(struct acpi_predefined_data *data,
440 * 527 *
441 * FUNCTION: acpi_ns_remove_null_elements 528 * FUNCTION: acpi_ns_remove_null_elements
442 * 529 *
443 * PARAMETERS: obj_desc - A Package object 530 * PARAMETERS: Data - Pointer to validation data structure
531 * package_type - An acpi_return_package_types value
532 * obj_desc - A Package object
444 * 533 *
445 * RETURN: Status. AE_NULL_ENTRY means that one or more elements were 534 * RETURN: None.
446 * removed.
447 * 535 *
448 * DESCRIPTION: Remove all NULL package elements and update the package count. 536 * DESCRIPTION: Remove all NULL package elements from packages that contain
537 * a variable number of sub-packages.
449 * 538 *
450 *****************************************************************************/ 539 *****************************************************************************/
451 540
452static acpi_status 541void
453acpi_ns_remove_null_elements(union acpi_operand_object *obj_desc) 542acpi_ns_remove_null_elements(struct acpi_predefined_data *data,
543 u8 package_type,
544 union acpi_operand_object *obj_desc)
454{ 545{
455 union acpi_operand_object **source; 546 union acpi_operand_object **source;
456 union acpi_operand_object **dest; 547 union acpi_operand_object **dest;
457 acpi_status status = AE_OK;
458 u32 count; 548 u32 count;
459 u32 new_count; 549 u32 new_count;
460 u32 i; 550 u32 i;
461 551
552 ACPI_FUNCTION_NAME(ns_remove_null_elements);
553
554 /*
555 * PTYPE1 packages contain no subpackages.
556 * PTYPE2 packages contain a variable number of sub-packages. We can
557 * safely remove all NULL elements from the PTYPE2 packages.
558 */
559 switch (package_type) {
560 case ACPI_PTYPE1_FIXED:
561 case ACPI_PTYPE1_VAR:
562 case ACPI_PTYPE1_OPTION:
563 return;
564
565 case ACPI_PTYPE2:
566 case ACPI_PTYPE2_COUNT:
567 case ACPI_PTYPE2_PKG_COUNT:
568 case ACPI_PTYPE2_FIXED:
569 case ACPI_PTYPE2_MIN:
570 case ACPI_PTYPE2_REV_FIXED:
571 break;
572
573 default:
574 return;
575 }
576
462 count = obj_desc->package.count; 577 count = obj_desc->package.count;
463 new_count = count; 578 new_count = count;
464 579
465 source = obj_desc->package.elements; 580 source = obj_desc->package.elements;
466 dest = source; 581 dest = source;
467 582
468 /* Examine all elements of the package object */ 583 /* Examine all elements of the package object, remove nulls */
469 584
470 for (i = 0; i < count; i++) { 585 for (i = 0; i < count; i++) {
471 if (!*source) { 586 if (!*source) {
472 status = AE_NULL_ENTRY;
473 new_count--; 587 new_count--;
474 } else { 588 } else {
475 *dest = *source; 589 *dest = *source;
@@ -478,15 +592,18 @@ acpi_ns_remove_null_elements(union acpi_operand_object *obj_desc)
478 source++; 592 source++;
479 } 593 }
480 594
481 if (status == AE_NULL_ENTRY) { 595 /* Update parent package if any null elements were removed */
596
597 if (new_count < count) {
598 ACPI_DEBUG_PRINT((ACPI_DB_REPAIR,
599 "%s: Found and removed %u NULL elements\n",
600 data->pathname, (count - new_count)));
482 601
483 /* NULL terminate list and update the package count */ 602 /* NULL terminate list and update the package count */
484 603
485 *dest = NULL; 604 *dest = NULL;
486 obj_desc->package.count = new_count; 605 obj_desc->package.count = new_count;
487 } 606 }
488
489 return (status);
490} 607}
491 608
492/****************************************************************************** 609/******************************************************************************
diff --git a/drivers/acpi/acpica/nsutils.c b/drivers/acpi/acpica/nsutils.c
index ea55ab4f9849..47d91e668a1b 100644
--- a/drivers/acpi/acpica/nsutils.c
+++ b/drivers/acpi/acpica/nsutils.c
@@ -671,24 +671,25 @@ acpi_ns_externalize_name(u32 internal_name_length,
671 671
672/******************************************************************************* 672/*******************************************************************************
673 * 673 *
674 * FUNCTION: acpi_ns_map_handle_to_node 674 * FUNCTION: acpi_ns_validate_handle
675 * 675 *
676 * PARAMETERS: Handle - Handle to be converted to an Node 676 * PARAMETERS: Handle - Handle to be validated and typecast to a
677 * namespace node.
677 * 678 *
678 * RETURN: A Name table entry pointer 679 * RETURN: A pointer to a namespace node
679 * 680 *
680 * DESCRIPTION: Convert a namespace handle to a real Node 681 * DESCRIPTION: Convert a namespace handle to a namespace node. Handles special
682 * cases for the root node.
681 * 683 *
682 * Note: Real integer handles would allow for more verification 684 * NOTE: Real integer handles would allow for more verification
683 * and keep all pointers within this subsystem - however this introduces 685 * and keep all pointers within this subsystem - however this introduces
684 * more (and perhaps unnecessary) overhead. 686 * more overhead and has not been necessary to this point. Drivers
685 * 687 * holding handles are typically notified before a node becomes invalid
686 * The current implemenation is basically a placeholder until such time comes 688 * due to a table unload.
687 * that it is needed.
688 * 689 *
689 ******************************************************************************/ 690 ******************************************************************************/
690 691
691struct acpi_namespace_node *acpi_ns_map_handle_to_node(acpi_handle handle) 692struct acpi_namespace_node *acpi_ns_validate_handle(acpi_handle handle)
692{ 693{
693 694
694 ACPI_FUNCTION_ENTRY(); 695 ACPI_FUNCTION_ENTRY();
@@ -710,42 +711,6 @@ struct acpi_namespace_node *acpi_ns_map_handle_to_node(acpi_handle handle)
710 711
711/******************************************************************************* 712/*******************************************************************************
712 * 713 *
713 * FUNCTION: acpi_ns_convert_entry_to_handle
714 *
715 * PARAMETERS: Node - Node to be converted to a Handle
716 *
717 * RETURN: A user handle
718 *
719 * DESCRIPTION: Convert a real Node to a namespace handle
720 *
721 ******************************************************************************/
722
723acpi_handle acpi_ns_convert_entry_to_handle(struct acpi_namespace_node *node)
724{
725
726 /*
727 * Simple implementation for now;
728 */
729 return ((acpi_handle) node);
730
731/* Example future implementation ---------------------
732
733 if (!Node)
734 {
735 return (NULL);
736 }
737
738 if (Node == acpi_gbl_root_node)
739 {
740 return (ACPI_ROOT_OBJECT);
741 }
742
743 return ((acpi_handle) Node);
744------------------------------------------------------*/
745}
746
747/*******************************************************************************
748 *
749 * FUNCTION: acpi_ns_terminate 714 * FUNCTION: acpi_ns_terminate
750 * 715 *
751 * PARAMETERS: none 716 * PARAMETERS: none
diff --git a/drivers/acpi/acpica/nsxfeval.c b/drivers/acpi/acpica/nsxfeval.c
index f2bd1da77001..f0c0892bc7e5 100644
--- a/drivers/acpi/acpica/nsxfeval.c
+++ b/drivers/acpi/acpica/nsxfeval.c
@@ -190,7 +190,7 @@ acpi_evaluate_object(acpi_handle handle,
190 190
191 /* Convert and validate the device handle */ 191 /* Convert and validate the device handle */
192 192
193 info->prefix_node = acpi_ns_map_handle_to_node(handle); 193 info->prefix_node = acpi_ns_validate_handle(handle);
194 if (!info->prefix_node) { 194 if (!info->prefix_node) {
195 status = AE_BAD_PARAMETER; 195 status = AE_BAD_PARAMETER;
196 goto cleanup; 196 goto cleanup;
@@ -552,7 +552,7 @@ acpi_ns_get_device_callback(acpi_handle obj_handle,
552 return (status); 552 return (status);
553 } 553 }
554 554
555 node = acpi_ns_map_handle_to_node(obj_handle); 555 node = acpi_ns_validate_handle(obj_handle);
556 status = acpi_ut_release_mutex(ACPI_MTX_NAMESPACE); 556 status = acpi_ut_release_mutex(ACPI_MTX_NAMESPACE);
557 if (ACPI_FAILURE(status)) { 557 if (ACPI_FAILURE(status)) {
558 return (status); 558 return (status);
@@ -729,7 +729,7 @@ acpi_attach_data(acpi_handle obj_handle,
729 729
730 /* Convert and validate the handle */ 730 /* Convert and validate the handle */
731 731
732 node = acpi_ns_map_handle_to_node(obj_handle); 732 node = acpi_ns_validate_handle(obj_handle);
733 if (!node) { 733 if (!node) {
734 status = AE_BAD_PARAMETER; 734 status = AE_BAD_PARAMETER;
735 goto unlock_and_exit; 735 goto unlock_and_exit;
@@ -775,7 +775,7 @@ acpi_detach_data(acpi_handle obj_handle, acpi_object_handler handler)
775 775
776 /* Convert and validate the handle */ 776 /* Convert and validate the handle */
777 777
778 node = acpi_ns_map_handle_to_node(obj_handle); 778 node = acpi_ns_validate_handle(obj_handle);
779 if (!node) { 779 if (!node) {
780 status = AE_BAD_PARAMETER; 780 status = AE_BAD_PARAMETER;
781 goto unlock_and_exit; 781 goto unlock_and_exit;
@@ -822,7 +822,7 @@ acpi_get_data(acpi_handle obj_handle, acpi_object_handler handler, void **data)
822 822
823 /* Convert and validate the handle */ 823 /* Convert and validate the handle */
824 824
825 node = acpi_ns_map_handle_to_node(obj_handle); 825 node = acpi_ns_validate_handle(obj_handle);
826 if (!node) { 826 if (!node) {
827 status = AE_BAD_PARAMETER; 827 status = AE_BAD_PARAMETER;
828 goto unlock_and_exit; 828 goto unlock_and_exit;
diff --git a/drivers/acpi/acpica/nsxfname.c b/drivers/acpi/acpica/nsxfname.c
index ddc84af6336e..e611dd961b20 100644
--- a/drivers/acpi/acpica/nsxfname.c
+++ b/drivers/acpi/acpica/nsxfname.c
@@ -93,7 +93,7 @@ acpi_get_handle(acpi_handle parent,
93 /* Convert a parent handle to a prefix node */ 93 /* Convert a parent handle to a prefix node */
94 94
95 if (parent) { 95 if (parent) {
96 prefix_node = acpi_ns_map_handle_to_node(parent); 96 prefix_node = acpi_ns_validate_handle(parent);
97 if (!prefix_node) { 97 if (!prefix_node) {
98 return (AE_BAD_PARAMETER); 98 return (AE_BAD_PARAMETER);
99 } 99 }
@@ -114,7 +114,7 @@ acpi_get_handle(acpi_handle parent,
114 114
115 if (!ACPI_STRCMP(pathname, ACPI_NS_ROOT_PATH)) { 115 if (!ACPI_STRCMP(pathname, ACPI_NS_ROOT_PATH)) {
116 *ret_handle = 116 *ret_handle =
117 acpi_ns_convert_entry_to_handle(acpi_gbl_root_node); 117 ACPI_CAST_PTR(acpi_handle, acpi_gbl_root_node);
118 return (AE_OK); 118 return (AE_OK);
119 } 119 }
120 } else if (!prefix_node) { 120 } else if (!prefix_node) {
@@ -129,7 +129,7 @@ acpi_get_handle(acpi_handle parent,
129 status = 129 status =
130 acpi_ns_get_node(prefix_node, pathname, ACPI_NS_NO_UPSEARCH, &node); 130 acpi_ns_get_node(prefix_node, pathname, ACPI_NS_NO_UPSEARCH, &node);
131 if (ACPI_SUCCESS(status)) { 131 if (ACPI_SUCCESS(status)) {
132 *ret_handle = acpi_ns_convert_entry_to_handle(node); 132 *ret_handle = ACPI_CAST_PTR(acpi_handle, node);
133 } 133 }
134 134
135 return (status); 135 return (status);
@@ -186,7 +186,7 @@ acpi_get_name(acpi_handle handle, u32 name_type, struct acpi_buffer * buffer)
186 return (status); 186 return (status);
187 } 187 }
188 188
189 node = acpi_ns_map_handle_to_node(handle); 189 node = acpi_ns_validate_handle(handle);
190 if (!node) { 190 if (!node) {
191 status = AE_BAD_PARAMETER; 191 status = AE_BAD_PARAMETER;
192 goto unlock_and_exit; 192 goto unlock_and_exit;
@@ -291,7 +291,7 @@ acpi_get_object_info(acpi_handle handle,
291 goto cleanup; 291 goto cleanup;
292 } 292 }
293 293
294 node = acpi_ns_map_handle_to_node(handle); 294 node = acpi_ns_validate_handle(handle);
295 if (!node) { 295 if (!node) {
296 (void)acpi_ut_release_mutex(ACPI_MTX_NAMESPACE); 296 (void)acpi_ut_release_mutex(ACPI_MTX_NAMESPACE);
297 return (AE_BAD_PARAMETER); 297 return (AE_BAD_PARAMETER);
diff --git a/drivers/acpi/acpica/nsxfobj.c b/drivers/acpi/acpica/nsxfobj.c
index 4071bad4458e..0cc6ba01a495 100644
--- a/drivers/acpi/acpica/nsxfobj.c
+++ b/drivers/acpi/acpica/nsxfobj.c
@@ -79,7 +79,7 @@ acpi_status acpi_get_id(acpi_handle handle, acpi_owner_id * ret_id)
79 79
80 /* Convert and validate the handle */ 80 /* Convert and validate the handle */
81 81
82 node = acpi_ns_map_handle_to_node(handle); 82 node = acpi_ns_validate_handle(handle);
83 if (!node) { 83 if (!node) {
84 (void)acpi_ut_release_mutex(ACPI_MTX_NAMESPACE); 84 (void)acpi_ut_release_mutex(ACPI_MTX_NAMESPACE);
85 return (AE_BAD_PARAMETER); 85 return (AE_BAD_PARAMETER);
@@ -132,7 +132,7 @@ acpi_status acpi_get_type(acpi_handle handle, acpi_object_type * ret_type)
132 132
133 /* Convert and validate the handle */ 133 /* Convert and validate the handle */
134 134
135 node = acpi_ns_map_handle_to_node(handle); 135 node = acpi_ns_validate_handle(handle);
136 if (!node) { 136 if (!node) {
137 (void)acpi_ut_release_mutex(ACPI_MTX_NAMESPACE); 137 (void)acpi_ut_release_mutex(ACPI_MTX_NAMESPACE);
138 return (AE_BAD_PARAMETER); 138 return (AE_BAD_PARAMETER);
@@ -182,7 +182,7 @@ acpi_status acpi_get_parent(acpi_handle handle, acpi_handle * ret_handle)
182 182
183 /* Convert and validate the handle */ 183 /* Convert and validate the handle */
184 184
185 node = acpi_ns_map_handle_to_node(handle); 185 node = acpi_ns_validate_handle(handle);
186 if (!node) { 186 if (!node) {
187 status = AE_BAD_PARAMETER; 187 status = AE_BAD_PARAMETER;
188 goto unlock_and_exit; 188 goto unlock_and_exit;
@@ -191,7 +191,7 @@ acpi_status acpi_get_parent(acpi_handle handle, acpi_handle * ret_handle)
191 /* Get the parent entry */ 191 /* Get the parent entry */
192 192
193 parent_node = acpi_ns_get_parent_node(node); 193 parent_node = acpi_ns_get_parent_node(node);
194 *ret_handle = acpi_ns_convert_entry_to_handle(parent_node); 194 *ret_handle = ACPI_CAST_PTR(acpi_handle, parent_node);
195 195
196 /* Return exception if parent is null */ 196 /* Return exception if parent is null */
197 197
@@ -251,7 +251,7 @@ acpi_get_next_object(acpi_object_type type,
251 251
252 /* Start search at the beginning of the specified scope */ 252 /* Start search at the beginning of the specified scope */
253 253
254 parent_node = acpi_ns_map_handle_to_node(parent); 254 parent_node = acpi_ns_validate_handle(parent);
255 if (!parent_node) { 255 if (!parent_node) {
256 status = AE_BAD_PARAMETER; 256 status = AE_BAD_PARAMETER;
257 goto unlock_and_exit; 257 goto unlock_and_exit;
@@ -260,7 +260,7 @@ acpi_get_next_object(acpi_object_type type,
260 /* Non-null handle, ignore the parent */ 260 /* Non-null handle, ignore the parent */
261 /* Convert and validate the handle */ 261 /* Convert and validate the handle */
262 262
263 child_node = acpi_ns_map_handle_to_node(child); 263 child_node = acpi_ns_validate_handle(child);
264 if (!child_node) { 264 if (!child_node) {
265 status = AE_BAD_PARAMETER; 265 status = AE_BAD_PARAMETER;
266 goto unlock_and_exit; 266 goto unlock_and_exit;
@@ -276,7 +276,7 @@ acpi_get_next_object(acpi_object_type type,
276 } 276 }
277 277
278 if (ret_handle) { 278 if (ret_handle) {
279 *ret_handle = acpi_ns_convert_entry_to_handle(node); 279 *ret_handle = ACPI_CAST_PTR(acpi_handle, node);
280 } 280 }
281 281
282 unlock_and_exit: 282 unlock_and_exit:
diff --git a/drivers/acpi/acpica/psxface.c b/drivers/acpi/acpica/psxface.c
index 12934ad6da8e..d0c1b91eb8ca 100644
--- a/drivers/acpi/acpica/psxface.c
+++ b/drivers/acpi/acpica/psxface.c
@@ -287,7 +287,8 @@ acpi_status acpi_ps_execute_method(struct acpi_evaluate_info *info)
287 /* Invoke an internal method if necessary */ 287 /* Invoke an internal method if necessary */
288 288
289 if (info->obj_desc->method.method_flags & AML_METHOD_INTERNAL_ONLY) { 289 if (info->obj_desc->method.method_flags & AML_METHOD_INTERNAL_ONLY) {
290 status = info->obj_desc->method.implementation(walk_state); 290 status =
291 info->obj_desc->method.extra.implementation(walk_state);
291 info->return_object = walk_state->return_desc; 292 info->return_object = walk_state->return_desc;
292 293
293 /* Cleanup states */ 294 /* Cleanup states */
diff --git a/drivers/acpi/acpica/rsxface.c b/drivers/acpi/acpica/rsxface.c
index 395212bcd19b..f27feb4772f6 100644
--- a/drivers/acpi/acpica/rsxface.c
+++ b/drivers/acpi/acpica/rsxface.c
@@ -104,7 +104,7 @@ acpi_rs_validate_parameters(acpi_handle device_handle,
104 return_ACPI_STATUS(AE_BAD_PARAMETER); 104 return_ACPI_STATUS(AE_BAD_PARAMETER);
105 } 105 }
106 106
107 node = acpi_ns_map_handle_to_node(device_handle); 107 node = acpi_ns_validate_handle(device_handle);
108 if (!node) { 108 if (!node) {
109 return_ACPI_STATUS(AE_BAD_PARAMETER); 109 return_ACPI_STATUS(AE_BAD_PARAMETER);
110 } 110 }
diff --git a/drivers/acpi/acpica/utcopy.c b/drivers/acpi/acpica/utcopy.c
index 0f0c64bf8ac9..f857c5efb79f 100644
--- a/drivers/acpi/acpica/utcopy.c
+++ b/drivers/acpi/acpica/utcopy.c
@@ -323,11 +323,11 @@ acpi_ut_copy_ielement_to_eelement(u8 object_type,
323 * RETURN: Status 323 * RETURN: Status
324 * 324 *
325 * DESCRIPTION: This function is called to place a package object in a user 325 * DESCRIPTION: This function is called to place a package object in a user
326 * buffer. A package object by definition contains other objects. 326 * buffer. A package object by definition contains other objects.
327 * 327 *
328 * The buffer is assumed to have sufficient space for the object. 328 * The buffer is assumed to have sufficient space for the object.
329 * The caller must have verified the buffer length needed using the 329 * The caller must have verified the buffer length needed using
330 * acpi_ut_get_object_size function before calling this function. 330 * the acpi_ut_get_object_size function before calling this function.
331 * 331 *
332 ******************************************************************************/ 332 ******************************************************************************/
333 333
@@ -382,12 +382,12 @@ acpi_ut_copy_ipackage_to_epackage(union acpi_operand_object *internal_object,
382 * FUNCTION: acpi_ut_copy_iobject_to_eobject 382 * FUNCTION: acpi_ut_copy_iobject_to_eobject
383 * 383 *
384 * PARAMETERS: internal_object - The internal object to be converted 384 * PARAMETERS: internal_object - The internal object to be converted
385 * buffer_ptr - Where the object is returned 385 * ret_buffer - Where the object is returned
386 * 386 *
387 * RETURN: Status 387 * RETURN: Status
388 * 388 *
389 * DESCRIPTION: This function is called to build an API object to be returned to 389 * DESCRIPTION: This function is called to build an API object to be returned
390 * the caller. 390 * to the caller.
391 * 391 *
392 ******************************************************************************/ 392 ******************************************************************************/
393 393
@@ -626,7 +626,7 @@ acpi_ut_copy_epackage_to_ipackage(union acpi_object *external_object,
626 * PARAMETERS: external_object - The external object to be converted 626 * PARAMETERS: external_object - The external object to be converted
627 * internal_object - Where the internal object is returned 627 * internal_object - Where the internal object is returned
628 * 628 *
629 * RETURN: Status - the status of the call 629 * RETURN: Status
630 * 630 *
631 * DESCRIPTION: Converts an external object to an internal object. 631 * DESCRIPTION: Converts an external object to an internal object.
632 * 632 *
@@ -665,7 +665,7 @@ acpi_ut_copy_eobject_to_iobject(union acpi_object *external_object,
665 * 665 *
666 * RETURN: Status 666 * RETURN: Status
667 * 667 *
668 * DESCRIPTION: Simple copy of one internal object to another. Reference count 668 * DESCRIPTION: Simple copy of one internal object to another. Reference count
669 * of the destination object is preserved. 669 * of the destination object is preserved.
670 * 670 *
671 ******************************************************************************/ 671 ******************************************************************************/
@@ -897,10 +897,11 @@ acpi_ut_copy_ielement_to_ielement(u8 object_type,
897 * 897 *
898 * FUNCTION: acpi_ut_copy_ipackage_to_ipackage 898 * FUNCTION: acpi_ut_copy_ipackage_to_ipackage
899 * 899 *
900 * PARAMETERS: *source_obj - Pointer to the source package object 900 * PARAMETERS: source_obj - Pointer to the source package object
901 * *dest_obj - Where the internal object is returned 901 * dest_obj - Where the internal object is returned
902 * walk_state - Current Walk state descriptor
902 * 903 *
903 * RETURN: Status - the status of the call 904 * RETURN: Status
904 * 905 *
905 * DESCRIPTION: This function is called to copy an internal package object 906 * DESCRIPTION: This function is called to copy an internal package object
906 * into another internal package object. 907 * into another internal package object.
@@ -953,9 +954,9 @@ acpi_ut_copy_ipackage_to_ipackage(union acpi_operand_object *source_obj,
953 * 954 *
954 * FUNCTION: acpi_ut_copy_iobject_to_iobject 955 * FUNCTION: acpi_ut_copy_iobject_to_iobject
955 * 956 *
956 * PARAMETERS: walk_state - Current walk state 957 * PARAMETERS: source_desc - The internal object to be copied
957 * source_desc - The internal object to be copied
958 * dest_desc - Where the copied object is returned 958 * dest_desc - Where the copied object is returned
959 * walk_state - Current walk state
959 * 960 *
960 * RETURN: Status 961 * RETURN: Status
961 * 962 *
diff --git a/drivers/acpi/battery.c b/drivers/acpi/battery.c
index 3f4602b8f287..cada73ffdfa7 100644
--- a/drivers/acpi/battery.c
+++ b/drivers/acpi/battery.c
@@ -831,7 +831,7 @@ static void acpi_battery_notify(struct acpi_device *device, u32 event)
831 dev_name(&device->dev), event, 831 dev_name(&device->dev), event,
832 acpi_battery_present(battery)); 832 acpi_battery_present(battery));
833#ifdef CONFIG_ACPI_SYSFS_POWER 833#ifdef CONFIG_ACPI_SYSFS_POWER
834 /* acpi_batter_update could remove power_supply object */ 834 /* acpi_battery_update could remove power_supply object */
835 if (battery->bat.dev) 835 if (battery->bat.dev)
836 kobject_uevent(&battery->bat.dev->kobj, KOBJ_CHANGE); 836 kobject_uevent(&battery->bat.dev->kobj, KOBJ_CHANGE);
837#endif 837#endif
diff --git a/drivers/acpi/blacklist.c b/drivers/acpi/blacklist.c
index 23e5a0519af5..2815df66f6f7 100644
--- a/drivers/acpi/blacklist.c
+++ b/drivers/acpi/blacklist.c
@@ -185,6 +185,12 @@ static int __init dmi_disable_osi_vista(const struct dmi_system_id *d)
185 acpi_osi_setup("!Windows 2006"); 185 acpi_osi_setup("!Windows 2006");
186 return 0; 186 return 0;
187} 187}
188static int __init dmi_disable_osi_win7(const struct dmi_system_id *d)
189{
190 printk(KERN_NOTICE PREFIX "DMI detected: %s\n", d->ident);
191 acpi_osi_setup("!Windows 2009");
192 return 0;
193}
188 194
189static struct dmi_system_id acpi_osi_dmi_table[] __initdata = { 195static struct dmi_system_id acpi_osi_dmi_table[] __initdata = {
190 { 196 {
@@ -211,6 +217,14 @@ static struct dmi_system_id acpi_osi_dmi_table[] __initdata = {
211 DMI_MATCH(DMI_PRODUCT_NAME, "Sony VGN-SR290J"), 217 DMI_MATCH(DMI_PRODUCT_NAME, "Sony VGN-SR290J"),
212 }, 218 },
213 }, 219 },
220 {
221 .callback = dmi_disable_osi_win7,
222 .ident = "ASUS K50IJ",
223 .matches = {
224 DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer Inc."),
225 DMI_MATCH(DMI_PRODUCT_NAME, "K50IJ"),
226 },
227 },
214 228
215 /* 229 /*
216 * BIOS invocation of _OSI(Linux) is almost always a BIOS bug. 230 * BIOS invocation of _OSI(Linux) is almost always a BIOS bug.
diff --git a/drivers/acpi/bus.c b/drivers/acpi/bus.c
index 741191524353..a52126e46307 100644
--- a/drivers/acpi/bus.c
+++ b/drivers/acpi/bus.c
@@ -344,6 +344,167 @@ bool acpi_bus_can_wakeup(acpi_handle handle)
344 344
345EXPORT_SYMBOL(acpi_bus_can_wakeup); 345EXPORT_SYMBOL(acpi_bus_can_wakeup);
346 346
347static void acpi_print_osc_error(acpi_handle handle,
348 struct acpi_osc_context *context, char *error)
349{
350 struct acpi_buffer buffer = {ACPI_ALLOCATE_BUFFER};
351 int i;
352
353 if (ACPI_FAILURE(acpi_get_name(handle, ACPI_FULL_PATHNAME, &buffer)))
354 printk(KERN_DEBUG "%s\n", error);
355 else {
356 printk(KERN_DEBUG "%s:%s\n", (char *)buffer.pointer, error);
357 kfree(buffer.pointer);
358 }
359 printk(KERN_DEBUG"_OSC request data:");
360 for (i = 0; i < context->cap.length; i += sizeof(u32))
361 printk("%x ", *((u32 *)(context->cap.pointer + i)));
362 printk("\n");
363}
364
365static u8 hex_val(unsigned char c)
366{
367 return isdigit(c) ? c - '0' : toupper(c) - 'A' + 10;
368}
369
370static acpi_status acpi_str_to_uuid(char *str, u8 *uuid)
371{
372 int i;
373 static int opc_map_to_uuid[16] = {6, 4, 2, 0, 11, 9, 16, 14, 19, 21,
374 24, 26, 28, 30, 32, 34};
375
376 if (strlen(str) != 36)
377 return AE_BAD_PARAMETER;
378 for (i = 0; i < 36; i++) {
379 if (i == 8 || i == 13 || i == 18 || i == 23) {
380 if (str[i] != '-')
381 return AE_BAD_PARAMETER;
382 } else if (!isxdigit(str[i]))
383 return AE_BAD_PARAMETER;
384 }
385 for (i = 0; i < 16; i++) {
386 uuid[i] = hex_val(str[opc_map_to_uuid[i]]) << 4;
387 uuid[i] |= hex_val(str[opc_map_to_uuid[i] + 1]);
388 }
389 return AE_OK;
390}
391
392acpi_status acpi_run_osc(acpi_handle handle, struct acpi_osc_context *context)
393{
394 acpi_status status;
395 struct acpi_object_list input;
396 union acpi_object in_params[4];
397 union acpi_object *out_obj;
398 u8 uuid[16];
399 u32 errors;
400 struct acpi_buffer output = {ACPI_ALLOCATE_BUFFER, NULL};
401
402 if (!context)
403 return AE_ERROR;
404 if (ACPI_FAILURE(acpi_str_to_uuid(context->uuid_str, uuid)))
405 return AE_ERROR;
406 context->ret.length = ACPI_ALLOCATE_BUFFER;
407 context->ret.pointer = NULL;
408
409 /* Setting up input parameters */
410 input.count = 4;
411 input.pointer = in_params;
412 in_params[0].type = ACPI_TYPE_BUFFER;
413 in_params[0].buffer.length = 16;
414 in_params[0].buffer.pointer = uuid;
415 in_params[1].type = ACPI_TYPE_INTEGER;
416 in_params[1].integer.value = context->rev;
417 in_params[2].type = ACPI_TYPE_INTEGER;
418 in_params[2].integer.value = context->cap.length/sizeof(u32);
419 in_params[3].type = ACPI_TYPE_BUFFER;
420 in_params[3].buffer.length = context->cap.length;
421 in_params[3].buffer.pointer = context->cap.pointer;
422
423 status = acpi_evaluate_object(handle, "_OSC", &input, &output);
424 if (ACPI_FAILURE(status))
425 return status;
426
427 if (!output.length)
428 return AE_NULL_OBJECT;
429
430 out_obj = output.pointer;
431 if (out_obj->type != ACPI_TYPE_BUFFER
432 || out_obj->buffer.length != context->cap.length) {
433 acpi_print_osc_error(handle, context,
434 "_OSC evaluation returned wrong type");
435 status = AE_TYPE;
436 goto out_kfree;
437 }
438 /* Need to ignore the bit0 in result code */
439 errors = *((u32 *)out_obj->buffer.pointer) & ~(1 << 0);
440 if (errors) {
441 if (errors & OSC_REQUEST_ERROR)
442 acpi_print_osc_error(handle, context,
443 "_OSC request failed");
444 if (errors & OSC_INVALID_UUID_ERROR)
445 acpi_print_osc_error(handle, context,
446 "_OSC invalid UUID");
447 if (errors & OSC_INVALID_REVISION_ERROR)
448 acpi_print_osc_error(handle, context,
449 "_OSC invalid revision");
450 if (errors & OSC_CAPABILITIES_MASK_ERROR) {
451 if (((u32 *)context->cap.pointer)[OSC_QUERY_TYPE]
452 & OSC_QUERY_ENABLE)
453 goto out_success;
454 status = AE_SUPPORT;
455 goto out_kfree;
456 }
457 status = AE_ERROR;
458 goto out_kfree;
459 }
460out_success:
461 context->ret.length = out_obj->buffer.length;
462 context->ret.pointer = kmalloc(context->ret.length, GFP_KERNEL);
463 if (!context->ret.pointer) {
464 status = AE_NO_MEMORY;
465 goto out_kfree;
466 }
467 memcpy(context->ret.pointer, out_obj->buffer.pointer,
468 context->ret.length);
469 status = AE_OK;
470
471out_kfree:
472 kfree(output.pointer);
473 if (status != AE_OK)
474 context->ret.pointer = NULL;
475 return status;
476}
477EXPORT_SYMBOL(acpi_run_osc);
478
479static u8 sb_uuid_str[] = "0811B06E-4A27-44F9-8D60-3CBBC22E7B48";
480static void acpi_bus_osc_support(void)
481{
482 u32 capbuf[2];
483 struct acpi_osc_context context = {
484 .uuid_str = sb_uuid_str,
485 .rev = 1,
486 .cap.length = 8,
487 .cap.pointer = capbuf,
488 };
489 acpi_handle handle;
490
491 capbuf[OSC_QUERY_TYPE] = OSC_QUERY_ENABLE;
492 capbuf[OSC_SUPPORT_TYPE] = OSC_SB_PR3_SUPPORT; /* _PR3 is in use */
493#if defined(CONFIG_ACPI_PROCESSOR_AGGREGATOR) ||\
494 defined(CONFIG_ACPI_PROCESSOR_AGGREGATOR_MODULE)
495 capbuf[OSC_SUPPORT_TYPE] |= OSC_SB_PAD_SUPPORT;
496#endif
497
498#if defined(CONFIG_ACPI_PROCESSOR) || defined(CONFIG_ACPI_PROCESSOR_MODULE)
499 capbuf[OSC_SUPPORT_TYPE] |= OSC_SB_PPC_OST_SUPPORT;
500#endif
501 if (ACPI_FAILURE(acpi_get_handle(NULL, "\\_SB", &handle)))
502 return;
503 if (ACPI_SUCCESS(acpi_run_osc(handle, &context)))
504 kfree(context.ret.pointer);
505 /* do we need to check the returned cap? Sounds no */
506}
507
347/* -------------------------------------------------------------------------- 508/* --------------------------------------------------------------------------
348 Event Management 509 Event Management
349 -------------------------------------------------------------------------- */ 510 -------------------------------------------------------------------------- */
@@ -734,12 +895,16 @@ static int __init acpi_bus_init(void)
734 status = acpi_ec_ecdt_probe(); 895 status = acpi_ec_ecdt_probe();
735 /* Ignore result. Not having an ECDT is not fatal. */ 896 /* Ignore result. Not having an ECDT is not fatal. */
736 897
898 acpi_bus_osc_support();
899
737 status = acpi_initialize_objects(ACPI_FULL_INITIALIZATION); 900 status = acpi_initialize_objects(ACPI_FULL_INITIALIZATION);
738 if (ACPI_FAILURE(status)) { 901 if (ACPI_FAILURE(status)) {
739 printk(KERN_ERR PREFIX "Unable to initialize ACPI objects\n"); 902 printk(KERN_ERR PREFIX "Unable to initialize ACPI objects\n");
740 goto error1; 903 goto error1;
741 } 904 }
742 905
906 acpi_early_processor_set_pdc();
907
743 /* 908 /*
744 * Maybe EC region is required at bus_scan/acpi_get_devices. So it 909 * Maybe EC region is required at bus_scan/acpi_get_devices. So it
745 * is necessary to enable it as early as possible. 910 * is necessary to enable it as early as possible.
diff --git a/drivers/acpi/button.c b/drivers/acpi/button.c
index 0c9c6a9a002c..8a95e8329df7 100644
--- a/drivers/acpi/button.c
+++ b/drivers/acpi/button.c
@@ -282,6 +282,13 @@ static int acpi_lid_send_state(struct acpi_device *device)
282 if (ret == NOTIFY_DONE) 282 if (ret == NOTIFY_DONE)
283 ret = blocking_notifier_call_chain(&acpi_lid_notifier, state, 283 ret = blocking_notifier_call_chain(&acpi_lid_notifier, state,
284 device); 284 device);
285 if (ret == NOTIFY_DONE || ret == NOTIFY_OK) {
286 /*
287 * It is also regarded as success if the notifier_chain
288 * returns NOTIFY_OK or NOTIFY_DONE.
289 */
290 ret = 0;
291 }
285 return ret; 292 return ret;
286} 293}
287 294
diff --git a/drivers/acpi/debug.c b/drivers/acpi/debug.c
index 8a690c3b8e23..cc421b7ae166 100644
--- a/drivers/acpi/debug.c
+++ b/drivers/acpi/debug.c
@@ -8,6 +8,7 @@
8#include <linux/module.h> 8#include <linux/module.h>
9#include <linux/kernel.h> 9#include <linux/kernel.h>
10#include <linux/moduleparam.h> 10#include <linux/moduleparam.h>
11#include <linux/debugfs.h>
11#include <asm/uaccess.h> 12#include <asm/uaccess.h>
12#include <acpi/acpi_drivers.h> 13#include <acpi/acpi_drivers.h>
13 14
@@ -196,6 +197,80 @@ module_param_call(trace_state, param_set_trace_state, param_get_trace_state,
196 NULL, 0644); 197 NULL, 0644);
197 198
198/* -------------------------------------------------------------------------- 199/* --------------------------------------------------------------------------
200 DebugFS Interface
201 -------------------------------------------------------------------------- */
202
203static ssize_t cm_write(struct file *file, const char __user *user_buf,
204 size_t count, loff_t *ppos)
205{
206 static char *buf;
207 static int uncopied_bytes;
208 struct acpi_table_header table;
209 acpi_status status;
210
211 if (!(*ppos)) {
212 /* parse the table header to get the table length */
213 if (count <= sizeof(struct acpi_table_header))
214 return -EINVAL;
215 if (copy_from_user(&table, user_buf,
216 sizeof(struct acpi_table_header)))
217 return -EFAULT;
218 uncopied_bytes = table.length;
219 buf = kzalloc(uncopied_bytes, GFP_KERNEL);
220 if (!buf)
221 return -ENOMEM;
222 }
223
224 if (uncopied_bytes < count) {
225 kfree(buf);
226 return -EINVAL;
227 }
228
229 if (copy_from_user(buf + (*ppos), user_buf, count)) {
230 kfree(buf);
231 return -EFAULT;
232 }
233
234 uncopied_bytes -= count;
235 *ppos += count;
236
237 if (!uncopied_bytes) {
238 status = acpi_install_method(buf);
239 kfree(buf);
240 if (ACPI_FAILURE(status))
241 return -EINVAL;
242 add_taint(TAINT_OVERRIDDEN_ACPI_TABLE);
243 }
244
245 return count;
246}
247
248static const struct file_operations cm_fops = {
249 .write = cm_write,
250};
251
252static int acpi_debugfs_init(void)
253{
254 struct dentry *acpi_dir, *cm_dentry;
255
256 acpi_dir = debugfs_create_dir("acpi", NULL);
257 if (!acpi_dir)
258 goto err;
259
260 cm_dentry = debugfs_create_file("custom_method", S_IWUGO,
261 acpi_dir, NULL, &cm_fops);
262 if (!cm_dentry)
263 goto err;
264
265 return 0;
266
267err:
268 if (acpi_dir)
269 debugfs_remove(acpi_dir);
270 return -EINVAL;
271}
272
273/* --------------------------------------------------------------------------
199 FS Interface (/proc) 274 FS Interface (/proc)
200 -------------------------------------------------------------------------- */ 275 -------------------------------------------------------------------------- */
201#ifdef CONFIG_ACPI_PROCFS 276#ifdef CONFIG_ACPI_PROCFS
@@ -286,7 +361,7 @@ static const struct file_operations acpi_system_debug_proc_fops = {
286}; 361};
287#endif 362#endif
288 363
289int __init acpi_debug_init(void) 364int __init acpi_procfs_init(void)
290{ 365{
291#ifdef CONFIG_ACPI_PROCFS 366#ifdef CONFIG_ACPI_PROCFS
292 struct proc_dir_entry *entry; 367 struct proc_dir_entry *entry;
@@ -321,3 +396,10 @@ int __init acpi_debug_init(void)
321 return 0; 396 return 0;
322#endif 397#endif
323} 398}
399
400int __init acpi_debug_init(void)
401{
402 acpi_debugfs_init();
403 acpi_procfs_init();
404 return 0;
405}
diff --git a/drivers/acpi/dock.c b/drivers/acpi/dock.c
index 30be3c148f7e..b2586f57e1f5 100644
--- a/drivers/acpi/dock.c
+++ b/drivers/acpi/dock.c
@@ -50,7 +50,6 @@ MODULE_PARM_DESC(immediate_undock, "1 (default) will cause the driver to "
50 " before undocking"); 50 " before undocking");
51 51
52static struct atomic_notifier_head dock_notifier_list; 52static struct atomic_notifier_head dock_notifier_list;
53static char dock_device_name[] = "dock";
54 53
55static const struct acpi_device_id dock_device_ids[] = { 54static const struct acpi_device_id dock_device_ids[] = {
56 {"LNXDOCK", 0}, 55 {"LNXDOCK", 0},
@@ -93,40 +92,30 @@ struct dock_dependent_device {
93 * Dock Dependent device functions * 92 * Dock Dependent device functions *
94 *****************************************************************************/ 93 *****************************************************************************/
95/** 94/**
96 * alloc_dock_dependent_device - allocate and init a dependent device 95 * add_dock_dependent_device - associate a device with the dock station
97 * @handle: the acpi_handle of the dependent device 96 * @ds: The dock station
97 * @handle: handle of the dependent device
98 * 98 *
99 * Allocate memory for a dependent device structure for a device referenced 99 * Add the dependent device to the dock's dependent device list.
100 * by the acpi handle
101 */ 100 */
102static struct dock_dependent_device * 101static int
103alloc_dock_dependent_device(acpi_handle handle) 102add_dock_dependent_device(struct dock_station *ds, acpi_handle handle)
104{ 103{
105 struct dock_dependent_device *dd; 104 struct dock_dependent_device *dd;
106 105
107 dd = kzalloc(sizeof(*dd), GFP_KERNEL); 106 dd = kzalloc(sizeof(*dd), GFP_KERNEL);
108 if (dd) { 107 if (!dd)
109 dd->handle = handle; 108 return -ENOMEM;
110 INIT_LIST_HEAD(&dd->list); 109
111 INIT_LIST_HEAD(&dd->hotplug_list); 110 dd->handle = handle;
112 } 111 INIT_LIST_HEAD(&dd->list);
113 return dd; 112 INIT_LIST_HEAD(&dd->hotplug_list);
114}
115 113
116/**
117 * add_dock_dependent_device - associate a device with the dock station
118 * @ds: The dock station
119 * @dd: The dependent device
120 *
121 * Add the dependent device to the dock's dependent device list.
122 */
123static void
124add_dock_dependent_device(struct dock_station *ds,
125 struct dock_dependent_device *dd)
126{
127 spin_lock(&ds->dd_lock); 114 spin_lock(&ds->dd_lock);
128 list_add_tail(&dd->list, &ds->dependent_devices); 115 list_add_tail(&dd->list, &ds->dependent_devices);
129 spin_unlock(&ds->dd_lock); 116 spin_unlock(&ds->dd_lock);
117
118 return 0;
130} 119}
131 120
132/** 121/**
@@ -249,6 +238,7 @@ static int is_battery(acpi_handle handle)
249static int is_ejectable_bay(acpi_handle handle) 238static int is_ejectable_bay(acpi_handle handle)
250{ 239{
251 acpi_handle phandle; 240 acpi_handle phandle;
241
252 if (!is_ejectable(handle)) 242 if (!is_ejectable(handle))
253 return 0; 243 return 0;
254 if (is_battery(handle) || is_ata(handle)) 244 if (is_battery(handle) || is_ata(handle))
@@ -275,14 +265,13 @@ int is_dock_device(acpi_handle handle)
275 265
276 if (is_dock(handle)) 266 if (is_dock(handle))
277 return 1; 267 return 1;
278 list_for_each_entry(dock_station, &dock_stations, sibling) { 268
269 list_for_each_entry(dock_station, &dock_stations, sibling)
279 if (find_dock_dependent_device(dock_station, handle)) 270 if (find_dock_dependent_device(dock_station, handle))
280 return 1; 271 return 1;
281 }
282 272
283 return 0; 273 return 0;
284} 274}
285
286EXPORT_SYMBOL_GPL(is_dock_device); 275EXPORT_SYMBOL_GPL(is_dock_device);
287 276
288/** 277/**
@@ -305,8 +294,6 @@ static int dock_present(struct dock_station *ds)
305 return 0; 294 return 0;
306} 295}
307 296
308
309
310/** 297/**
311 * dock_create_acpi_device - add new devices to acpi 298 * dock_create_acpi_device - add new devices to acpi
312 * @handle - handle of the device to add 299 * @handle - handle of the device to add
@@ -320,7 +307,7 @@ static int dock_present(struct dock_station *ds)
320 */ 307 */
321static struct acpi_device * dock_create_acpi_device(acpi_handle handle) 308static struct acpi_device * dock_create_acpi_device(acpi_handle handle)
322{ 309{
323 struct acpi_device *device = NULL; 310 struct acpi_device *device;
324 struct acpi_device *parent_device; 311 struct acpi_device *parent_device;
325 acpi_handle parent; 312 acpi_handle parent;
326 int ret; 313 int ret;
@@ -337,8 +324,7 @@ static struct acpi_device * dock_create_acpi_device(acpi_handle handle)
337 ret = acpi_bus_add(&device, parent_device, handle, 324 ret = acpi_bus_add(&device, parent_device, handle,
338 ACPI_BUS_TYPE_DEVICE); 325 ACPI_BUS_TYPE_DEVICE);
339 if (ret) { 326 if (ret) {
340 pr_debug("error adding bus, %x\n", 327 pr_debug("error adding bus, %x\n", -ret);
341 -ret);
342 return NULL; 328 return NULL;
343 } 329 }
344 } 330 }
@@ -364,7 +350,6 @@ static void dock_remove_acpi_device(acpi_handle handle)
364 } 350 }
365} 351}
366 352
367
368/** 353/**
369 * hotplug_dock_devices - insert or remove devices on the dock station 354 * hotplug_dock_devices - insert or remove devices on the dock station
370 * @ds: the dock station 355 * @ds: the dock station
@@ -384,10 +369,9 @@ static void hotplug_dock_devices(struct dock_station *ds, u32 event)
384 /* 369 /*
385 * First call driver specific hotplug functions 370 * First call driver specific hotplug functions
386 */ 371 */
387 list_for_each_entry(dd, &ds->hotplug_devices, hotplug_list) { 372 list_for_each_entry(dd, &ds->hotplug_devices, hotplug_list)
388 if (dd->ops && dd->ops->handler) 373 if (dd->ops && dd->ops->handler)
389 dd->ops->handler(dd->handle, event, dd->context); 374 dd->ops->handler(dd->handle, event, dd->context);
390 }
391 375
392 /* 376 /*
393 * Now make sure that an acpi_device is created for each 377 * Now make sure that an acpi_device is created for each
@@ -426,6 +410,7 @@ static void dock_event(struct dock_station *ds, u32 event, int num)
426 list_for_each_entry(dd, &ds->hotplug_devices, hotplug_list) 410 list_for_each_entry(dd, &ds->hotplug_devices, hotplug_list)
427 if (dd->ops && dd->ops->uevent) 411 if (dd->ops && dd->ops->uevent)
428 dd->ops->uevent(dd->handle, event, dd->context); 412 dd->ops->uevent(dd->handle, event, dd->context);
413
429 if (num != DOCK_EVENT) 414 if (num != DOCK_EVENT)
430 kobject_uevent_env(&dev->kobj, KOBJ_CHANGE, envp); 415 kobject_uevent_env(&dev->kobj, KOBJ_CHANGE, envp);
431} 416}
@@ -456,8 +441,8 @@ static void eject_dock(struct dock_station *ds)
456 arg.type = ACPI_TYPE_INTEGER; 441 arg.type = ACPI_TYPE_INTEGER;
457 arg.integer.value = 1; 442 arg.integer.value = 1;
458 443
459 if (ACPI_FAILURE(acpi_evaluate_object(ds->handle, "_EJ0", 444 status = acpi_evaluate_object(ds->handle, "_EJ0", &arg_list, NULL);
460 &arg_list, NULL))) 445 if (ACPI_FAILURE(status))
461 pr_debug("Failed to evaluate _EJ0!\n"); 446 pr_debug("Failed to evaluate _EJ0!\n");
462} 447}
463 448
@@ -577,7 +562,6 @@ int register_dock_notifier(struct notifier_block *nb)
577 562
578 return atomic_notifier_chain_register(&dock_notifier_list, nb); 563 return atomic_notifier_chain_register(&dock_notifier_list, nb);
579} 564}
580
581EXPORT_SYMBOL_GPL(register_dock_notifier); 565EXPORT_SYMBOL_GPL(register_dock_notifier);
582 566
583/** 567/**
@@ -591,7 +575,6 @@ void unregister_dock_notifier(struct notifier_block *nb)
591 575
592 atomic_notifier_chain_unregister(&dock_notifier_list, nb); 576 atomic_notifier_chain_unregister(&dock_notifier_list, nb);
593} 577}
594
595EXPORT_SYMBOL_GPL(unregister_dock_notifier); 578EXPORT_SYMBOL_GPL(unregister_dock_notifier);
596 579
597/** 580/**
@@ -636,7 +619,6 @@ register_hotplug_dock_device(acpi_handle handle, struct acpi_dock_ops *ops,
636 619
637 return ret; 620 return ret;
638} 621}
639
640EXPORT_SYMBOL_GPL(register_hotplug_dock_device); 622EXPORT_SYMBOL_GPL(register_hotplug_dock_device);
641 623
642/** 624/**
@@ -657,7 +639,6 @@ void unregister_hotplug_dock_device(acpi_handle handle)
657 dock_del_hotplug_device(dock_station, dd); 639 dock_del_hotplug_device(dock_station, dd);
658 } 640 }
659} 641}
660
661EXPORT_SYMBOL_GPL(unregister_hotplug_dock_device); 642EXPORT_SYMBOL_GPL(unregister_hotplug_dock_device);
662 643
663/** 644/**
@@ -772,7 +753,7 @@ struct dock_data {
772 753
773static void acpi_dock_deferred_cb(void *context) 754static void acpi_dock_deferred_cb(void *context)
774{ 755{
775 struct dock_data *data = (struct dock_data *)context; 756 struct dock_data *data = context;
776 757
777 dock_notify(data->handle, data->event, data->ds); 758 dock_notify(data->handle, data->event, data->ds);
778 kfree(data); 759 kfree(data);
@@ -782,23 +763,22 @@ static int acpi_dock_notifier_call(struct notifier_block *this,
782 unsigned long event, void *data) 763 unsigned long event, void *data)
783{ 764{
784 struct dock_station *dock_station; 765 struct dock_station *dock_station;
785 acpi_handle handle = (acpi_handle)data; 766 acpi_handle handle = data;
786 767
787 if (event != ACPI_NOTIFY_BUS_CHECK && event != ACPI_NOTIFY_DEVICE_CHECK 768 if (event != ACPI_NOTIFY_BUS_CHECK && event != ACPI_NOTIFY_DEVICE_CHECK
788 && event != ACPI_NOTIFY_EJECT_REQUEST) 769 && event != ACPI_NOTIFY_EJECT_REQUEST)
789 return 0; 770 return 0;
790 list_for_each_entry(dock_station, &dock_stations, sibling) { 771 list_for_each_entry(dock_station, &dock_stations, sibling) {
791 if (dock_station->handle == handle) { 772 if (dock_station->handle == handle) {
792 struct dock_data *dock_data; 773 struct dock_data *dd;
793 774
794 dock_data = kmalloc(sizeof(*dock_data), GFP_KERNEL); 775 dd = kmalloc(sizeof(*dd), GFP_KERNEL);
795 if (!dock_data) 776 if (!dd)
796 return 0; 777 return 0;
797 dock_data->handle = handle; 778 dd->handle = handle;
798 dock_data->event = event; 779 dd->event = event;
799 dock_data->ds = dock_station; 780 dd->ds = dock_station;
800 acpi_os_hotplug_execute(acpi_dock_deferred_cb, 781 acpi_os_hotplug_execute(acpi_dock_deferred_cb, dd);
801 dock_data);
802 return 0 ; 782 return 0 ;
803 } 783 }
804 } 784 }
@@ -826,7 +806,6 @@ find_dock_devices(acpi_handle handle, u32 lvl, void *context, void **rv)
826 acpi_status status; 806 acpi_status status;
827 acpi_handle tmp, parent; 807 acpi_handle tmp, parent;
828 struct dock_station *ds = context; 808 struct dock_station *ds = context;
829 struct dock_dependent_device *dd;
830 809
831 status = acpi_bus_get_ejd(handle, &tmp); 810 status = acpi_bus_get_ejd(handle, &tmp);
832 if (ACPI_FAILURE(status)) { 811 if (ACPI_FAILURE(status)) {
@@ -840,11 +819,9 @@ find_dock_devices(acpi_handle handle, u32 lvl, void *context, void **rv)
840 goto fdd_out; 819 goto fdd_out;
841 } 820 }
842 821
843 if (tmp == ds->handle) { 822 if (tmp == ds->handle)
844 dd = alloc_dock_dependent_device(handle); 823 add_dock_dependent_device(ds, handle);
845 if (dd) 824
846 add_dock_dependent_device(ds, dd);
847 }
848fdd_out: 825fdd_out:
849 return AE_OK; 826 return AE_OK;
850} 827}
@@ -857,8 +834,7 @@ static ssize_t show_docked(struct device *dev,
857{ 834{
858 struct acpi_device *tmp; 835 struct acpi_device *tmp;
859 836
860 struct dock_station *dock_station = *((struct dock_station **) 837 struct dock_station *dock_station = dev->platform_data;
861 dev->platform_data);
862 838
863 if (ACPI_SUCCESS(acpi_bus_get_device(dock_station->handle, &tmp))) 839 if (ACPI_SUCCESS(acpi_bus_get_device(dock_station->handle, &tmp)))
864 return snprintf(buf, PAGE_SIZE, "1\n"); 840 return snprintf(buf, PAGE_SIZE, "1\n");
@@ -872,8 +848,7 @@ static DEVICE_ATTR(docked, S_IRUGO, show_docked, NULL);
872static ssize_t show_flags(struct device *dev, 848static ssize_t show_flags(struct device *dev,
873 struct device_attribute *attr, char *buf) 849 struct device_attribute *attr, char *buf)
874{ 850{
875 struct dock_station *dock_station = *((struct dock_station **) 851 struct dock_station *dock_station = dev->platform_data;
876 dev->platform_data);
877 return snprintf(buf, PAGE_SIZE, "%d\n", dock_station->flags); 852 return snprintf(buf, PAGE_SIZE, "%d\n", dock_station->flags);
878 853
879} 854}
@@ -886,8 +861,7 @@ static ssize_t write_undock(struct device *dev, struct device_attribute *attr,
886 const char *buf, size_t count) 861 const char *buf, size_t count)
887{ 862{
888 int ret; 863 int ret;
889 struct dock_station *dock_station = *((struct dock_station **) 864 struct dock_station *dock_station = dev->platform_data;
890 dev->platform_data);
891 865
892 if (!count) 866 if (!count)
893 return -EINVAL; 867 return -EINVAL;
@@ -905,8 +879,7 @@ static ssize_t show_dock_uid(struct device *dev,
905 struct device_attribute *attr, char *buf) 879 struct device_attribute *attr, char *buf)
906{ 880{
907 unsigned long long lbuf; 881 unsigned long long lbuf;
908 struct dock_station *dock_station = *((struct dock_station **) 882 struct dock_station *dock_station = dev->platform_data;
909 dev->platform_data);
910 acpi_status status = acpi_evaluate_integer(dock_station->handle, 883 acpi_status status = acpi_evaluate_integer(dock_station->handle,
911 "_UID", NULL, &lbuf); 884 "_UID", NULL, &lbuf);
912 if (ACPI_FAILURE(status)) 885 if (ACPI_FAILURE(status))
@@ -919,8 +892,7 @@ static DEVICE_ATTR(uid, S_IRUGO, show_dock_uid, NULL);
919static ssize_t show_dock_type(struct device *dev, 892static ssize_t show_dock_type(struct device *dev,
920 struct device_attribute *attr, char *buf) 893 struct device_attribute *attr, char *buf)
921{ 894{
922 struct dock_station *dock_station = *((struct dock_station **) 895 struct dock_station *dock_station = dev->platform_data;
923 dev->platform_data);
924 char *type; 896 char *type;
925 897
926 if (dock_station->flags & DOCK_IS_DOCK) 898 if (dock_station->flags & DOCK_IS_DOCK)
@@ -936,6 +908,19 @@ static ssize_t show_dock_type(struct device *dev,
936} 908}
937static DEVICE_ATTR(type, S_IRUGO, show_dock_type, NULL); 909static DEVICE_ATTR(type, S_IRUGO, show_dock_type, NULL);
938 910
911static struct attribute *dock_attributes[] = {
912 &dev_attr_docked.attr,
913 &dev_attr_flags.attr,
914 &dev_attr_undock.attr,
915 &dev_attr_uid.attr,
916 &dev_attr_type.attr,
917 NULL
918};
919
920static struct attribute_group dock_attribute_group = {
921 .attrs = dock_attributes
922};
923
939/** 924/**
940 * dock_add - add a new dock station 925 * dock_add - add a new dock station
941 * @handle: the dock station handle 926 * @handle: the dock station handle
@@ -945,39 +930,31 @@ static DEVICE_ATTR(type, S_IRUGO, show_dock_type, NULL);
945 */ 930 */
946static int dock_add(acpi_handle handle) 931static int dock_add(acpi_handle handle)
947{ 932{
948 int ret; 933 int ret, id;
949 struct dock_dependent_device *dd; 934 struct dock_station ds, *dock_station;
950 struct dock_station *dock_station; 935 struct platform_device *dd;
951 struct platform_device *dock_device; 936
937 id = dock_station_count;
938 memset(&ds, 0, sizeof(ds));
939 dd = platform_device_register_data(NULL, "dock", id, &ds, sizeof(ds));
940 if (IS_ERR(dd))
941 return PTR_ERR(dd);
942
943 dock_station = dd->dev.platform_data;
952 944
953 /* allocate & initialize the dock_station private data */
954 dock_station = kzalloc(sizeof(*dock_station), GFP_KERNEL);
955 if (!dock_station)
956 return -ENOMEM;
957 dock_station->handle = handle; 945 dock_station->handle = handle;
946 dock_station->dock_device = dd;
958 dock_station->last_dock_time = jiffies - HZ; 947 dock_station->last_dock_time = jiffies - HZ;
959 INIT_LIST_HEAD(&dock_station->dependent_devices); 948
960 INIT_LIST_HEAD(&dock_station->hotplug_devices);
961 INIT_LIST_HEAD(&dock_station->sibling);
962 spin_lock_init(&dock_station->dd_lock);
963 mutex_init(&dock_station->hp_lock); 949 mutex_init(&dock_station->hp_lock);
950 spin_lock_init(&dock_station->dd_lock);
951 INIT_LIST_HEAD(&dock_station->sibling);
952 INIT_LIST_HEAD(&dock_station->hotplug_devices);
964 ATOMIC_INIT_NOTIFIER_HEAD(&dock_notifier_list); 953 ATOMIC_INIT_NOTIFIER_HEAD(&dock_notifier_list);
965 954 INIT_LIST_HEAD(&dock_station->dependent_devices);
966 /* initialize platform device stuff */
967 dock_station->dock_device =
968 platform_device_register_simple(dock_device_name,
969 dock_station_count, NULL, 0);
970 dock_device = dock_station->dock_device;
971 if (IS_ERR(dock_device)) {
972 kfree(dock_station);
973 dock_station = NULL;
974 return PTR_ERR(dock_device);
975 }
976 platform_device_add_data(dock_device, &dock_station,
977 sizeof(struct dock_station *));
978 955
979 /* we want the dock device to send uevents */ 956 /* we want the dock device to send uevents */
980 dev_set_uevent_suppress(&dock_device->dev, 0); 957 dev_set_uevent_suppress(&dd->dev, 0);
981 958
982 if (is_dock(handle)) 959 if (is_dock(handle))
983 dock_station->flags |= DOCK_IS_DOCK; 960 dock_station->flags |= DOCK_IS_DOCK;
@@ -986,47 +963,9 @@ static int dock_add(acpi_handle handle)
986 if (is_battery(handle)) 963 if (is_battery(handle))
987 dock_station->flags |= DOCK_IS_BAT; 964 dock_station->flags |= DOCK_IS_BAT;
988 965
989 ret = device_create_file(&dock_device->dev, &dev_attr_docked); 966 ret = sysfs_create_group(&dd->dev.kobj, &dock_attribute_group);
990 if (ret) {
991 printk(KERN_ERR "Error %d adding sysfs file\n", ret);
992 platform_device_unregister(dock_device);
993 kfree(dock_station);
994 dock_station = NULL;
995 return ret;
996 }
997 ret = device_create_file(&dock_device->dev, &dev_attr_undock);
998 if (ret) {
999 printk(KERN_ERR "Error %d adding sysfs file\n", ret);
1000 device_remove_file(&dock_device->dev, &dev_attr_docked);
1001 platform_device_unregister(dock_device);
1002 kfree(dock_station);
1003 dock_station = NULL;
1004 return ret;
1005 }
1006 ret = device_create_file(&dock_device->dev, &dev_attr_uid);
1007 if (ret) {
1008 printk(KERN_ERR "Error %d adding sysfs file\n", ret);
1009 device_remove_file(&dock_device->dev, &dev_attr_docked);
1010 device_remove_file(&dock_device->dev, &dev_attr_undock);
1011 platform_device_unregister(dock_device);
1012 kfree(dock_station);
1013 dock_station = NULL;
1014 return ret;
1015 }
1016 ret = device_create_file(&dock_device->dev, &dev_attr_flags);
1017 if (ret) {
1018 printk(KERN_ERR "Error %d adding sysfs file\n", ret);
1019 device_remove_file(&dock_device->dev, &dev_attr_docked);
1020 device_remove_file(&dock_device->dev, &dev_attr_undock);
1021 device_remove_file(&dock_device->dev, &dev_attr_uid);
1022 platform_device_unregister(dock_device);
1023 kfree(dock_station);
1024 dock_station = NULL;
1025 return ret;
1026 }
1027 ret = device_create_file(&dock_device->dev, &dev_attr_type);
1028 if (ret) 967 if (ret)
1029 printk(KERN_ERR"Error %d adding sysfs file\n", ret); 968 goto err_unregister;
1030 969
1031 /* Find dependent devices */ 970 /* Find dependent devices */
1032 acpi_walk_namespace(ACPI_TYPE_DEVICE, ACPI_ROOT_OBJECT, 971 acpi_walk_namespace(ACPI_TYPE_DEVICE, ACPI_ROOT_OBJECT,
@@ -1034,58 +973,43 @@ static int dock_add(acpi_handle handle)
1034 dock_station, NULL); 973 dock_station, NULL);
1035 974
1036 /* add the dock station as a device dependent on itself */ 975 /* add the dock station as a device dependent on itself */
1037 dd = alloc_dock_dependent_device(handle); 976 ret = add_dock_dependent_device(dock_station, handle);
1038 if (!dd) { 977 if (ret)
1039 kfree(dock_station); 978 goto err_rmgroup;
1040 dock_station = NULL;
1041 ret = -ENOMEM;
1042 goto dock_add_err_unregister;
1043 }
1044 add_dock_dependent_device(dock_station, dd);
1045 979
1046 dock_station_count++; 980 dock_station_count++;
1047 list_add(&dock_station->sibling, &dock_stations); 981 list_add(&dock_station->sibling, &dock_stations);
1048 return 0; 982 return 0;
1049 983
1050dock_add_err_unregister: 984err_rmgroup:
1051 device_remove_file(&dock_device->dev, &dev_attr_type); 985 sysfs_remove_group(&dd->dev.kobj, &dock_attribute_group);
1052 device_remove_file(&dock_device->dev, &dev_attr_docked); 986err_unregister:
1053 device_remove_file(&dock_device->dev, &dev_attr_undock); 987 platform_device_unregister(dd);
1054 device_remove_file(&dock_device->dev, &dev_attr_uid); 988 printk(KERN_ERR "%s encountered error %d\n", __func__, ret);
1055 device_remove_file(&dock_device->dev, &dev_attr_flags);
1056 platform_device_unregister(dock_device);
1057 kfree(dock_station);
1058 dock_station = NULL;
1059 return ret; 989 return ret;
1060} 990}
1061 991
1062/** 992/**
1063 * dock_remove - free up resources related to the dock station 993 * dock_remove - free up resources related to the dock station
1064 */ 994 */
1065static int dock_remove(struct dock_station *dock_station) 995static int dock_remove(struct dock_station *ds)
1066{ 996{
1067 struct dock_dependent_device *dd, *tmp; 997 struct dock_dependent_device *dd, *tmp;
1068 struct platform_device *dock_device = dock_station->dock_device; 998 struct platform_device *dock_device = ds->dock_device;
1069 999
1070 if (!dock_station_count) 1000 if (!dock_station_count)
1071 return 0; 1001 return 0;
1072 1002
1073 /* remove dependent devices */ 1003 /* remove dependent devices */
1074 list_for_each_entry_safe(dd, tmp, &dock_station->dependent_devices, 1004 list_for_each_entry_safe(dd, tmp, &ds->dependent_devices, list)
1075 list) 1005 kfree(dd);
1076 kfree(dd); 1006
1007 list_del(&ds->sibling);
1077 1008
1078 /* cleanup sysfs */ 1009 /* cleanup sysfs */
1079 device_remove_file(&dock_device->dev, &dev_attr_type); 1010 sysfs_remove_group(&dock_device->dev.kobj, &dock_attribute_group);
1080 device_remove_file(&dock_device->dev, &dev_attr_docked);
1081 device_remove_file(&dock_device->dev, &dev_attr_undock);
1082 device_remove_file(&dock_device->dev, &dev_attr_uid);
1083 device_remove_file(&dock_device->dev, &dev_attr_flags);
1084 platform_device_unregister(dock_device); 1011 platform_device_unregister(dock_device);
1085 1012
1086 /* free dock station memory */
1087 kfree(dock_station);
1088 dock_station = NULL;
1089 return 0; 1013 return 0;
1090} 1014}
1091 1015
@@ -1103,11 +1027,10 @@ find_dock(acpi_handle handle, u32 lvl, void *context, void **rv)
1103{ 1027{
1104 acpi_status status = AE_OK; 1028 acpi_status status = AE_OK;
1105 1029
1106 if (is_dock(handle)) { 1030 if (is_dock(handle))
1107 if (dock_add(handle) >= 0) { 1031 if (dock_add(handle) >= 0)
1108 status = AE_CTRL_TERMINATE; 1032 status = AE_CTRL_TERMINATE;
1109 } 1033
1110 }
1111 return status; 1034 return status;
1112} 1035}
1113 1036
@@ -1145,8 +1068,7 @@ static int __init dock_init(void)
1145 1068
1146static void __exit dock_exit(void) 1069static void __exit dock_exit(void)
1147{ 1070{
1148 struct dock_station *dock_station; 1071 struct dock_station *tmp, *dock_station;
1149 struct dock_station *tmp;
1150 1072
1151 unregister_acpi_bus_notifier(&dock_acpi_notifier); 1073 unregister_acpi_bus_notifier(&dock_acpi_notifier);
1152 list_for_each_entry_safe(dock_station, tmp, &dock_stations, sibling) 1074 list_for_each_entry_safe(dock_station, tmp, &dock_stations, sibling)
diff --git a/drivers/acpi/ec.c b/drivers/acpi/ec.c
index 75b147f5c8fd..d6471bb6852f 100644
--- a/drivers/acpi/ec.c
+++ b/drivers/acpi/ec.c
@@ -201,14 +201,13 @@ unlock:
201 spin_unlock_irqrestore(&ec->curr_lock, flags); 201 spin_unlock_irqrestore(&ec->curr_lock, flags);
202} 202}
203 203
204static void acpi_ec_gpe_query(void *ec_cxt); 204static int acpi_ec_sync_query(struct acpi_ec *ec);
205 205
206static int ec_check_sci(struct acpi_ec *ec, u8 state) 206static int ec_check_sci_sync(struct acpi_ec *ec, u8 state)
207{ 207{
208 if (state & ACPI_EC_FLAG_SCI) { 208 if (state & ACPI_EC_FLAG_SCI) {
209 if (!test_and_set_bit(EC_FLAGS_QUERY_PENDING, &ec->flags)) 209 if (!test_and_set_bit(EC_FLAGS_QUERY_PENDING, &ec->flags))
210 return acpi_os_execute(OSL_EC_BURST_HANDLER, 210 return acpi_ec_sync_query(ec);
211 acpi_ec_gpe_query, ec);
212 } 211 }
213 return 0; 212 return 0;
214} 213}
@@ -249,11 +248,6 @@ static int acpi_ec_transaction_unlocked(struct acpi_ec *ec,
249{ 248{
250 unsigned long tmp; 249 unsigned long tmp;
251 int ret = 0; 250 int ret = 0;
252 pr_debug(PREFIX "transaction start\n");
253 /* disable GPE during transaction if storm is detected */
254 if (test_bit(EC_FLAGS_GPE_STORM, &ec->flags)) {
255 acpi_disable_gpe(NULL, ec->gpe);
256 }
257 if (EC_FLAGS_MSI) 251 if (EC_FLAGS_MSI)
258 udelay(ACPI_EC_MSI_UDELAY); 252 udelay(ACPI_EC_MSI_UDELAY);
259 /* start transaction */ 253 /* start transaction */
@@ -265,20 +259,9 @@ static int acpi_ec_transaction_unlocked(struct acpi_ec *ec,
265 clear_bit(EC_FLAGS_QUERY_PENDING, &ec->flags); 259 clear_bit(EC_FLAGS_QUERY_PENDING, &ec->flags);
266 spin_unlock_irqrestore(&ec->curr_lock, tmp); 260 spin_unlock_irqrestore(&ec->curr_lock, tmp);
267 ret = ec_poll(ec); 261 ret = ec_poll(ec);
268 pr_debug(PREFIX "transaction end\n");
269 spin_lock_irqsave(&ec->curr_lock, tmp); 262 spin_lock_irqsave(&ec->curr_lock, tmp);
270 ec->curr = NULL; 263 ec->curr = NULL;
271 spin_unlock_irqrestore(&ec->curr_lock, tmp); 264 spin_unlock_irqrestore(&ec->curr_lock, tmp);
272 if (test_bit(EC_FLAGS_GPE_STORM, &ec->flags)) {
273 /* check if we received SCI during transaction */
274 ec_check_sci(ec, acpi_ec_read_status(ec));
275 /* it is safe to enable GPE outside of transaction */
276 acpi_enable_gpe(NULL, ec->gpe);
277 } else if (t->irq_count > ACPI_EC_STORM_THRESHOLD) {
278 pr_info(PREFIX "GPE storm detected, "
279 "transactions will use polling mode\n");
280 set_bit(EC_FLAGS_GPE_STORM, &ec->flags);
281 }
282 return ret; 265 return ret;
283} 266}
284 267
@@ -321,7 +304,26 @@ static int acpi_ec_transaction(struct acpi_ec *ec, struct transaction *t)
321 status = -ETIME; 304 status = -ETIME;
322 goto end; 305 goto end;
323 } 306 }
307 pr_debug(PREFIX "transaction start\n");
308 /* disable GPE during transaction if storm is detected */
309 if (test_bit(EC_FLAGS_GPE_STORM, &ec->flags)) {
310 acpi_disable_gpe(NULL, ec->gpe);
311 }
312
324 status = acpi_ec_transaction_unlocked(ec, t); 313 status = acpi_ec_transaction_unlocked(ec, t);
314
315 /* check if we received SCI during transaction */
316 ec_check_sci_sync(ec, acpi_ec_read_status(ec));
317 if (test_bit(EC_FLAGS_GPE_STORM, &ec->flags)) {
318 msleep(1);
319 /* it is safe to enable GPE outside of transaction */
320 acpi_enable_gpe(NULL, ec->gpe);
321 } else if (t->irq_count > ACPI_EC_STORM_THRESHOLD) {
322 pr_info(PREFIX "GPE storm detected, "
323 "transactions will use polling mode\n");
324 set_bit(EC_FLAGS_GPE_STORM, &ec->flags);
325 }
326 pr_debug(PREFIX "transaction end\n");
325end: 327end:
326 if (ec->global_lock) 328 if (ec->global_lock)
327 acpi_release_global_lock(glk); 329 acpi_release_global_lock(glk);
@@ -443,7 +445,7 @@ int ec_transaction(u8 command,
443 445
444EXPORT_SYMBOL(ec_transaction); 446EXPORT_SYMBOL(ec_transaction);
445 447
446static int acpi_ec_query(struct acpi_ec *ec, u8 * data) 448static int acpi_ec_query_unlocked(struct acpi_ec *ec, u8 * data)
447{ 449{
448 int result; 450 int result;
449 u8 d; 451 u8 d;
@@ -452,20 +454,16 @@ static int acpi_ec_query(struct acpi_ec *ec, u8 * data)
452 .wlen = 0, .rlen = 1}; 454 .wlen = 0, .rlen = 1};
453 if (!ec || !data) 455 if (!ec || !data)
454 return -EINVAL; 456 return -EINVAL;
455
456 /* 457 /*
457 * Query the EC to find out which _Qxx method we need to evaluate. 458 * Query the EC to find out which _Qxx method we need to evaluate.
458 * Note that successful completion of the query causes the ACPI_EC_SCI 459 * Note that successful completion of the query causes the ACPI_EC_SCI
459 * bit to be cleared (and thus clearing the interrupt source). 460 * bit to be cleared (and thus clearing the interrupt source).
460 */ 461 */
461 462 result = acpi_ec_transaction_unlocked(ec, &t);
462 result = acpi_ec_transaction(ec, &t);
463 if (result) 463 if (result)
464 return result; 464 return result;
465
466 if (!d) 465 if (!d)
467 return -ENODATA; 466 return -ENODATA;
468
469 *data = d; 467 *data = d;
470 return 0; 468 return 0;
471} 469}
@@ -509,43 +507,79 @@ void acpi_ec_remove_query_handler(struct acpi_ec *ec, u8 query_bit)
509 507
510EXPORT_SYMBOL_GPL(acpi_ec_remove_query_handler); 508EXPORT_SYMBOL_GPL(acpi_ec_remove_query_handler);
511 509
512static void acpi_ec_gpe_query(void *ec_cxt) 510static void acpi_ec_run(void *cxt)
513{ 511{
514 struct acpi_ec *ec = ec_cxt; 512 struct acpi_ec_query_handler *handler = cxt;
515 u8 value = 0; 513 if (!handler)
516 struct acpi_ec_query_handler *handler, copy;
517
518 if (!ec || acpi_ec_query(ec, &value))
519 return; 514 return;
520 mutex_lock(&ec->lock); 515 pr_debug(PREFIX "start query execution\n");
516 if (handler->func)
517 handler->func(handler->data);
518 else if (handler->handle)
519 acpi_evaluate_object(handler->handle, NULL, NULL, NULL);
520 pr_debug(PREFIX "stop query execution\n");
521 kfree(handler);
522}
523
524static int acpi_ec_sync_query(struct acpi_ec *ec)
525{
526 u8 value = 0;
527 int status;
528 struct acpi_ec_query_handler *handler, *copy;
529 if ((status = acpi_ec_query_unlocked(ec, &value)))
530 return status;
521 list_for_each_entry(handler, &ec->list, node) { 531 list_for_each_entry(handler, &ec->list, node) {
522 if (value == handler->query_bit) { 532 if (value == handler->query_bit) {
523 /* have custom handler for this bit */ 533 /* have custom handler for this bit */
524 memcpy(&copy, handler, sizeof(copy)); 534 copy = kmalloc(sizeof(*handler), GFP_KERNEL);
525 mutex_unlock(&ec->lock); 535 if (!copy)
526 if (copy.func) { 536 return -ENOMEM;
527 copy.func(copy.data); 537 memcpy(copy, handler, sizeof(*copy));
528 } else if (copy.handle) { 538 pr_debug(PREFIX "push query execution (0x%2x) on queue\n", value);
529 acpi_evaluate_object(copy.handle, NULL, NULL, NULL); 539 return acpi_os_execute((copy->func) ?
530 } 540 OSL_NOTIFY_HANDLER : OSL_GPE_HANDLER,
531 return; 541 acpi_ec_run, copy);
532 } 542 }
533 } 543 }
544 return 0;
545}
546
547static void acpi_ec_gpe_query(void *ec_cxt)
548{
549 struct acpi_ec *ec = ec_cxt;
550 if (!ec)
551 return;
552 mutex_lock(&ec->lock);
553 acpi_ec_sync_query(ec);
534 mutex_unlock(&ec->lock); 554 mutex_unlock(&ec->lock);
535} 555}
536 556
557static void acpi_ec_gpe_query(void *ec_cxt);
558
559static int ec_check_sci(struct acpi_ec *ec, u8 state)
560{
561 if (state & ACPI_EC_FLAG_SCI) {
562 if (!test_and_set_bit(EC_FLAGS_QUERY_PENDING, &ec->flags)) {
563 pr_debug(PREFIX "push gpe query to the queue\n");
564 return acpi_os_execute(OSL_NOTIFY_HANDLER,
565 acpi_ec_gpe_query, ec);
566 }
567 }
568 return 0;
569}
570
537static u32 acpi_ec_gpe_handler(void *data) 571static u32 acpi_ec_gpe_handler(void *data)
538{ 572{
539 struct acpi_ec *ec = data; 573 struct acpi_ec *ec = data;
540 u8 status;
541 574
542 pr_debug(PREFIX "~~~> interrupt\n"); 575 pr_debug(PREFIX "~~~> interrupt\n");
543 status = acpi_ec_read_status(ec);
544 576
545 advance_transaction(ec, status); 577 advance_transaction(ec, acpi_ec_read_status(ec));
546 if (ec_transaction_done(ec) && (status & ACPI_EC_FLAG_IBF) == 0) 578 if (ec_transaction_done(ec) &&
579 (acpi_ec_read_status(ec) & ACPI_EC_FLAG_IBF) == 0) {
547 wake_up(&ec->wait); 580 wake_up(&ec->wait);
548 ec_check_sci(ec, status); 581 ec_check_sci(ec, acpi_ec_read_status(ec));
582 }
549 return ACPI_INTERRUPT_HANDLED; 583 return ACPI_INTERRUPT_HANDLED;
550} 584}
551 585
@@ -916,6 +950,7 @@ static int ec_validate_ecdt(const struct dmi_system_id *id)
916/* MSI EC needs special treatment, enable it */ 950/* MSI EC needs special treatment, enable it */
917static int ec_flag_msi(const struct dmi_system_id *id) 951static int ec_flag_msi(const struct dmi_system_id *id)
918{ 952{
953 printk(KERN_DEBUG PREFIX "Detected MSI hardware, enabling workarounds.\n");
919 EC_FLAGS_MSI = 1; 954 EC_FLAGS_MSI = 1;
920 EC_FLAGS_VALIDATE_ECDT = 1; 955 EC_FLAGS_VALIDATE_ECDT = 1;
921 return 0; 956 return 0;
@@ -928,8 +963,13 @@ static struct dmi_system_id __initdata ec_dmi_table[] = {
928 DMI_MATCH(DMI_BOARD_NAME, "JFL92") }, NULL}, 963 DMI_MATCH(DMI_BOARD_NAME, "JFL92") }, NULL},
929 { 964 {
930 ec_flag_msi, "MSI hardware", { 965 ec_flag_msi, "MSI hardware", {
931 DMI_MATCH(DMI_BIOS_VENDOR, "Micro-Star"), 966 DMI_MATCH(DMI_BIOS_VENDOR, "Micro-Star")}, NULL},
932 DMI_MATCH(DMI_CHASSIS_VENDOR, "MICRO-Star") }, NULL}, 967 {
968 ec_flag_msi, "MSI hardware", {
969 DMI_MATCH(DMI_SYS_VENDOR, "Micro-Star")}, NULL},
970 {
971 ec_flag_msi, "MSI hardware", {
972 DMI_MATCH(DMI_CHASSIS_VENDOR, "MICRO-Star")}, NULL},
933 { 973 {
934 ec_validate_ecdt, "ASUS hardware", { 974 ec_validate_ecdt, "ASUS hardware", {
935 DMI_MATCH(DMI_BIOS_VENDOR, "ASUS") }, NULL}, 975 DMI_MATCH(DMI_BIOS_VENDOR, "ASUS") }, NULL},
diff --git a/drivers/acpi/fan.c b/drivers/acpi/fan.c
index f419849a0d3f..acf2ab249842 100644
--- a/drivers/acpi/fan.c
+++ b/drivers/acpi/fan.c
@@ -267,7 +267,7 @@ static int acpi_fan_add(struct acpi_device *device)
267 goto end; 267 goto end;
268 } 268 }
269 269
270 dev_info(&device->dev, "registered as cooling_device%d\n", cdev->id); 270 dev_dbg(&device->dev, "registered as cooling_device%d\n", cdev->id);
271 271
272 device->driver_data = cdev; 272 device->driver_data = cdev;
273 result = sysfs_create_link(&device->dev.kobj, 273 result = sysfs_create_link(&device->dev.kobj,
diff --git a/drivers/acpi/internal.h b/drivers/acpi/internal.h
index 074cf8682d52..cb28e0502acc 100644
--- a/drivers/acpi/internal.h
+++ b/drivers/acpi/internal.h
@@ -43,6 +43,7 @@ int acpi_power_transition(struct acpi_device *device, int state);
43extern int acpi_power_nocheck; 43extern int acpi_power_nocheck;
44 44
45int acpi_wakeup_device_init(void); 45int acpi_wakeup_device_init(void);
46void acpi_early_processor_set_pdc(void);
46 47
47/* -------------------------------------------------------------------------- 48/* --------------------------------------------------------------------------
48 Embedded Controller 49 Embedded Controller
diff --git a/drivers/acpi/numa.c b/drivers/acpi/numa.c
index 2be2fb66204e..7ad48dfc12db 100644
--- a/drivers/acpi/numa.c
+++ b/drivers/acpi/numa.c
@@ -28,6 +28,7 @@
28#include <linux/types.h> 28#include <linux/types.h>
29#include <linux/errno.h> 29#include <linux/errno.h>
30#include <linux/acpi.h> 30#include <linux/acpi.h>
31#include <linux/numa.h>
31#include <acpi/acpi_bus.h> 32#include <acpi/acpi_bus.h>
32 33
33#define PREFIX "ACPI: " 34#define PREFIX "ACPI: "
@@ -40,14 +41,14 @@ static nodemask_t nodes_found_map = NODE_MASK_NONE;
40 41
41/* maps to convert between proximity domain and logical node ID */ 42/* maps to convert between proximity domain and logical node ID */
42static int pxm_to_node_map[MAX_PXM_DOMAINS] 43static int pxm_to_node_map[MAX_PXM_DOMAINS]
43 = { [0 ... MAX_PXM_DOMAINS - 1] = NID_INVAL }; 44 = { [0 ... MAX_PXM_DOMAINS - 1] = NUMA_NO_NODE };
44static int node_to_pxm_map[MAX_NUMNODES] 45static int node_to_pxm_map[MAX_NUMNODES]
45 = { [0 ... MAX_NUMNODES - 1] = PXM_INVAL }; 46 = { [0 ... MAX_NUMNODES - 1] = PXM_INVAL };
46 47
47int pxm_to_node(int pxm) 48int pxm_to_node(int pxm)
48{ 49{
49 if (pxm < 0) 50 if (pxm < 0)
50 return NID_INVAL; 51 return NUMA_NO_NODE;
51 return pxm_to_node_map[pxm]; 52 return pxm_to_node_map[pxm];
52} 53}
53 54
@@ -68,9 +69,9 @@ int acpi_map_pxm_to_node(int pxm)
68{ 69{
69 int node = pxm_to_node_map[pxm]; 70 int node = pxm_to_node_map[pxm];
70 71
71 if (node < 0){ 72 if (node < 0) {
72 if (nodes_weight(nodes_found_map) >= MAX_NUMNODES) 73 if (nodes_weight(nodes_found_map) >= MAX_NUMNODES)
73 return NID_INVAL; 74 return NUMA_NO_NODE;
74 node = first_unset_node(nodes_found_map); 75 node = first_unset_node(nodes_found_map);
75 __acpi_map_pxm_to_node(pxm, node); 76 __acpi_map_pxm_to_node(pxm, node);
76 node_set(node, nodes_found_map); 77 node_set(node, nodes_found_map);
@@ -79,16 +80,6 @@ int acpi_map_pxm_to_node(int pxm)
79 return node; 80 return node;
80} 81}
81 82
82#if 0
83void __cpuinit acpi_unmap_pxm_to_node(int node)
84{
85 int pxm = node_to_pxm_map[node];
86 pxm_to_node_map[pxm] = NID_INVAL;
87 node_to_pxm_map[node] = PXM_INVAL;
88 node_clear(node, nodes_found_map);
89}
90#endif /* 0 */
91
92static void __init 83static void __init
93acpi_table_print_srat_entry(struct acpi_subtable_header *header) 84acpi_table_print_srat_entry(struct acpi_subtable_header *header)
94{ 85{
diff --git a/drivers/acpi/osl.c b/drivers/acpi/osl.c
index 7c1c59ea9ec6..02e8464e480f 100644
--- a/drivers/acpi/osl.c
+++ b/drivers/acpi/osl.c
@@ -1118,7 +1118,7 @@ __setup("acpi_enforce_resources=", acpi_enforce_resources_setup);
1118 1118
1119/* Check for resource conflicts between ACPI OperationRegions and native 1119/* Check for resource conflicts between ACPI OperationRegions and native
1120 * drivers */ 1120 * drivers */
1121int acpi_check_resource_conflict(struct resource *res) 1121int acpi_check_resource_conflict(const struct resource *res)
1122{ 1122{
1123 struct acpi_res_list *res_list_elem; 1123 struct acpi_res_list *res_list_elem;
1124 int ioport; 1124 int ioport;
diff --git a/drivers/acpi/pci_link.c b/drivers/acpi/pci_link.c
index 394ae89409c2..04b0f007c9b7 100644
--- a/drivers/acpi/pci_link.c
+++ b/drivers/acpi/pci_link.c
@@ -56,7 +56,7 @@ ACPI_MODULE_NAME("pci_link");
56static int acpi_pci_link_add(struct acpi_device *device); 56static int acpi_pci_link_add(struct acpi_device *device);
57static int acpi_pci_link_remove(struct acpi_device *device, int type); 57static int acpi_pci_link_remove(struct acpi_device *device, int type);
58 58
59static struct acpi_device_id link_device_ids[] = { 59static const struct acpi_device_id link_device_ids[] = {
60 {"PNP0C0F", 0}, 60 {"PNP0C0F", 0},
61 {"", 0}, 61 {"", 0},
62}; 62};
diff --git a/drivers/acpi/pci_root.c b/drivers/acpi/pci_root.c
index 1af808171d46..64f55b6db73c 100644
--- a/drivers/acpi/pci_root.c
+++ b/drivers/acpi/pci_root.c
@@ -46,7 +46,7 @@ static int acpi_pci_root_add(struct acpi_device *device);
46static int acpi_pci_root_remove(struct acpi_device *device, int type); 46static int acpi_pci_root_remove(struct acpi_device *device, int type);
47static int acpi_pci_root_start(struct acpi_device *device); 47static int acpi_pci_root_start(struct acpi_device *device);
48 48
49static struct acpi_device_id root_device_ids[] = { 49static const struct acpi_device_id root_device_ids[] = {
50 {"PNP0A03", 0}, 50 {"PNP0A03", 0},
51 {"", 0}, 51 {"", 0},
52}; 52};
@@ -202,72 +202,24 @@ static void acpi_pci_bridge_scan(struct acpi_device *device)
202 } 202 }
203} 203}
204 204
205static u8 OSC_UUID[16] = {0x5B, 0x4D, 0xDB, 0x33, 0xF7, 0x1F, 0x1C, 0x40, 205static u8 pci_osc_uuid_str[] = "33DB4D5B-1FF7-401C-9657-7441C03DD766";
206 0x96, 0x57, 0x74, 0x41, 0xC0, 0x3D, 0xD7, 0x66};
207 206
208static acpi_status acpi_pci_run_osc(acpi_handle handle, 207static acpi_status acpi_pci_run_osc(acpi_handle handle,
209 const u32 *capbuf, u32 *retval) 208 const u32 *capbuf, u32 *retval)
210{ 209{
210 struct acpi_osc_context context = {
211 .uuid_str = pci_osc_uuid_str,
212 .rev = 1,
213 .cap.length = 12,
214 .cap.pointer = (void *)capbuf,
215 };
211 acpi_status status; 216 acpi_status status;
212 struct acpi_object_list input;
213 union acpi_object in_params[4];
214 struct acpi_buffer output = {ACPI_ALLOCATE_BUFFER, NULL};
215 union acpi_object *out_obj;
216 u32 errors;
217
218 /* Setting up input parameters */
219 input.count = 4;
220 input.pointer = in_params;
221 in_params[0].type = ACPI_TYPE_BUFFER;
222 in_params[0].buffer.length = 16;
223 in_params[0].buffer.pointer = OSC_UUID;
224 in_params[1].type = ACPI_TYPE_INTEGER;
225 in_params[1].integer.value = 1;
226 in_params[2].type = ACPI_TYPE_INTEGER;
227 in_params[2].integer.value = 3;
228 in_params[3].type = ACPI_TYPE_BUFFER;
229 in_params[3].buffer.length = 12;
230 in_params[3].buffer.pointer = (u8 *)capbuf;
231
232 status = acpi_evaluate_object(handle, "_OSC", &input, &output);
233 if (ACPI_FAILURE(status))
234 return status;
235 217
236 if (!output.length) 218 status = acpi_run_osc(handle, &context);
237 return AE_NULL_OBJECT; 219 if (ACPI_SUCCESS(status)) {
238 220 *retval = *((u32 *)(context.ret.pointer + 8));
239 out_obj = output.pointer; 221 kfree(context.ret.pointer);
240 if (out_obj->type != ACPI_TYPE_BUFFER) {
241 printk(KERN_DEBUG "_OSC evaluation returned wrong type\n");
242 status = AE_TYPE;
243 goto out_kfree;
244 }
245 /* Need to ignore the bit0 in result code */
246 errors = *((u32 *)out_obj->buffer.pointer) & ~(1 << 0);
247 if (errors) {
248 if (errors & OSC_REQUEST_ERROR)
249 printk(KERN_DEBUG "_OSC request failed\n");
250 if (errors & OSC_INVALID_UUID_ERROR)
251 printk(KERN_DEBUG "_OSC invalid UUID\n");
252 if (errors & OSC_INVALID_REVISION_ERROR)
253 printk(KERN_DEBUG "_OSC invalid revision\n");
254 if (errors & OSC_CAPABILITIES_MASK_ERROR) {
255 if (capbuf[OSC_QUERY_TYPE] & OSC_QUERY_ENABLE)
256 goto out_success;
257 printk(KERN_DEBUG
258 "Firmware did not grant requested _OSC control\n");
259 status = AE_SUPPORT;
260 goto out_kfree;
261 }
262 status = AE_ERROR;
263 goto out_kfree;
264 } 222 }
265out_success:
266 *retval = *((u32 *)(out_obj->buffer.pointer + 8));
267 status = AE_OK;
268
269out_kfree:
270 kfree(output.pointer);
271 return status; 223 return status;
272} 224}
273 225
@@ -277,10 +229,10 @@ static acpi_status acpi_pci_query_osc(struct acpi_pci_root *root, u32 flags)
277 u32 support_set, result, capbuf[3]; 229 u32 support_set, result, capbuf[3];
278 230
279 /* do _OSC query for all possible controls */ 231 /* do _OSC query for all possible controls */
280 support_set = root->osc_support_set | (flags & OSC_SUPPORT_MASKS); 232 support_set = root->osc_support_set | (flags & OSC_PCI_SUPPORT_MASKS);
281 capbuf[OSC_QUERY_TYPE] = OSC_QUERY_ENABLE; 233 capbuf[OSC_QUERY_TYPE] = OSC_QUERY_ENABLE;
282 capbuf[OSC_SUPPORT_TYPE] = support_set; 234 capbuf[OSC_SUPPORT_TYPE] = support_set;
283 capbuf[OSC_CONTROL_TYPE] = OSC_CONTROL_MASKS; 235 capbuf[OSC_CONTROL_TYPE] = OSC_PCI_CONTROL_MASKS;
284 236
285 status = acpi_pci_run_osc(root->device->handle, capbuf, &result); 237 status = acpi_pci_run_osc(root->device->handle, capbuf, &result);
286 if (ACPI_SUCCESS(status)) { 238 if (ACPI_SUCCESS(status)) {
@@ -427,7 +379,7 @@ acpi_status acpi_pci_osc_control_set(acpi_handle handle, u32 flags)
427 if (ACPI_FAILURE(status)) 379 if (ACPI_FAILURE(status))
428 return status; 380 return status;
429 381
430 control_req = (flags & OSC_CONTROL_MASKS); 382 control_req = (flags & OSC_PCI_CONTROL_MASKS);
431 if (!control_req) 383 if (!control_req)
432 return AE_TYPE; 384 return AE_TYPE;
433 385
diff --git a/drivers/acpi/power.c b/drivers/acpi/power.c
index 22b297916519..0f30c3c1eea4 100644
--- a/drivers/acpi/power.c
+++ b/drivers/acpi/power.c
@@ -65,7 +65,7 @@ static int acpi_power_remove(struct acpi_device *device, int type);
65static int acpi_power_resume(struct acpi_device *device); 65static int acpi_power_resume(struct acpi_device *device);
66static int acpi_power_open_fs(struct inode *inode, struct file *file); 66static int acpi_power_open_fs(struct inode *inode, struct file *file);
67 67
68static struct acpi_device_id power_device_ids[] = { 68static const struct acpi_device_id power_device_ids[] = {
69 {ACPI_POWER_HID, 0}, 69 {ACPI_POWER_HID, 0},
70 {"", 0}, 70 {"", 0},
71}; 71};
diff --git a/drivers/acpi/power_meter.c b/drivers/acpi/power_meter.c
index 2ef7030a0c28..dc4ffadf8122 100644
--- a/drivers/acpi/power_meter.c
+++ b/drivers/acpi/power_meter.c
@@ -64,7 +64,7 @@ static int can_cap_in_hardware(void)
64 return force_cap_on || cap_in_hardware; 64 return force_cap_on || cap_in_hardware;
65} 65}
66 66
67static struct acpi_device_id power_meter_ids[] = { 67static const struct acpi_device_id power_meter_ids[] = {
68 {"ACPI000D", 0}, 68 {"ACPI000D", 0},
69 {"", 0}, 69 {"", 0},
70}; 70};
@@ -534,6 +534,7 @@ static void remove_domain_devices(struct acpi_power_meter_resource *resource)
534 534
535 kfree(resource->domain_devices); 535 kfree(resource->domain_devices);
536 kobject_put(resource->holders_dir); 536 kobject_put(resource->holders_dir);
537 resource->num_domain_devices = 0;
537} 538}
538 539
539static int read_domain_devices(struct acpi_power_meter_resource *resource) 540static int read_domain_devices(struct acpi_power_meter_resource *resource)
@@ -740,7 +741,6 @@ skip_unsafe_cap:
740 741
741 return res; 742 return res;
742error: 743error:
743 remove_domain_devices(resource);
744 remove_attrs(resource); 744 remove_attrs(resource);
745 return res; 745 return res;
746} 746}
diff --git a/drivers/acpi/processor_core.c b/drivers/acpi/processor_core.c
index cb4283f5a79d..9863c98c81ba 100644
--- a/drivers/acpi/processor_core.c
+++ b/drivers/acpi/processor_core.c
@@ -124,29 +124,6 @@ static const struct file_operations acpi_processor_info_fops = {
124 124
125DEFINE_PER_CPU(struct acpi_processor *, processors); 125DEFINE_PER_CPU(struct acpi_processor *, processors);
126struct acpi_processor_errata errata __read_mostly; 126struct acpi_processor_errata errata __read_mostly;
127static int set_no_mwait(const struct dmi_system_id *id)
128{
129 printk(KERN_NOTICE PREFIX "%s detected - "
130 "disabling mwait for CPU C-states\n", id->ident);
131 idle_nomwait = 1;
132 return 0;
133}
134
135static struct dmi_system_id __cpuinitdata processor_idle_dmi_table[] = {
136 {
137 set_no_mwait, "IFL91 board", {
138 DMI_MATCH(DMI_BIOS_VENDOR, "COMPAL"),
139 DMI_MATCH(DMI_SYS_VENDOR, "ZEPTO"),
140 DMI_MATCH(DMI_PRODUCT_VERSION, "3215W"),
141 DMI_MATCH(DMI_BOARD_NAME, "IFL91") }, NULL},
142 {
143 set_no_mwait, "Extensa 5220", {
144 DMI_MATCH(DMI_BIOS_VENDOR, "Phoenix Technologies LTD"),
145 DMI_MATCH(DMI_SYS_VENDOR, "Acer"),
146 DMI_MATCH(DMI_PRODUCT_VERSION, "0100"),
147 DMI_MATCH(DMI_BOARD_NAME, "Columbia") }, NULL},
148 {},
149};
150 127
151/* -------------------------------------------------------------------------- 128/* --------------------------------------------------------------------------
152 Errata Handling 129 Errata Handling
@@ -277,45 +254,6 @@ static int acpi_processor_errata(struct acpi_processor *pr)
277} 254}
278 255
279/* -------------------------------------------------------------------------- 256/* --------------------------------------------------------------------------
280 Common ACPI processor functions
281 -------------------------------------------------------------------------- */
282
283/*
284 * _PDC is required for a BIOS-OS handshake for most of the newer
285 * ACPI processor features.
286 */
287static int acpi_processor_set_pdc(struct acpi_processor *pr)
288{
289 struct acpi_object_list *pdc_in = pr->pdc;
290 acpi_status status = AE_OK;
291
292
293 if (!pdc_in)
294 return status;
295 if (idle_nomwait) {
296 /*
297 * If mwait is disabled for CPU C-states, the C2C3_FFH access
298 * mode will be disabled in the parameter of _PDC object.
299 * Of course C1_FFH access mode will also be disabled.
300 */
301 union acpi_object *obj;
302 u32 *buffer = NULL;
303
304 obj = pdc_in->pointer;
305 buffer = (u32 *)(obj->buffer.pointer);
306 buffer[2] &= ~(ACPI_PDC_C_C2C3_FFH | ACPI_PDC_C_C1_FFH);
307
308 }
309 status = acpi_evaluate_object(pr->handle, "_PDC", pdc_in, NULL);
310
311 if (ACPI_FAILURE(status))
312 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
313 "Could not evaluate _PDC, using legacy perf. control...\n"));
314
315 return status;
316}
317
318/* --------------------------------------------------------------------------
319 FS Interface (/proc) 257 FS Interface (/proc)
320 -------------------------------------------------------------------------- */ 258 -------------------------------------------------------------------------- */
321 259
@@ -353,7 +291,7 @@ static int acpi_processor_info_open_fs(struct inode *inode, struct file *file)
353 PDE(inode)->data); 291 PDE(inode)->data);
354} 292}
355 293
356static int acpi_processor_add_fs(struct acpi_device *device) 294static int __cpuinit acpi_processor_add_fs(struct acpi_device *device)
357{ 295{
358 struct proc_dir_entry *entry = NULL; 296 struct proc_dir_entry *entry = NULL;
359 297
@@ -722,7 +660,7 @@ static void acpi_processor_notify(struct acpi_device *device, u32 event)
722 switch (event) { 660 switch (event) {
723 case ACPI_PROCESSOR_NOTIFY_PERFORMANCE: 661 case ACPI_PROCESSOR_NOTIFY_PERFORMANCE:
724 saved = pr->performance_platform_limit; 662 saved = pr->performance_platform_limit;
725 acpi_processor_ppc_has_changed(pr); 663 acpi_processor_ppc_has_changed(pr, 1);
726 if (saved == pr->performance_platform_limit) 664 if (saved == pr->performance_platform_limit)
727 break; 665 break;
728 acpi_bus_generate_proc_event(device, event, 666 acpi_bus_generate_proc_event(device, event,
@@ -758,7 +696,7 @@ static int acpi_cpu_soft_notify(struct notifier_block *nfb,
758 struct acpi_processor *pr = per_cpu(processors, cpu); 696 struct acpi_processor *pr = per_cpu(processors, cpu);
759 697
760 if (action == CPU_ONLINE && pr) { 698 if (action == CPU_ONLINE && pr) {
761 acpi_processor_ppc_has_changed(pr); 699 acpi_processor_ppc_has_changed(pr, 0);
762 acpi_processor_cst_has_changed(pr); 700 acpi_processor_cst_has_changed(pr);
763 acpi_processor_tstate_has_changed(pr); 701 acpi_processor_tstate_has_changed(pr);
764 } 702 }
@@ -825,12 +763,10 @@ static int __cpuinit acpi_processor_add(struct acpi_device *device)
825 } 763 }
826 764
827 /* _PDC call should be done before doing anything else (if reqd.). */ 765 /* _PDC call should be done before doing anything else (if reqd.). */
828 arch_acpi_processor_init_pdc(pr); 766 acpi_processor_set_pdc(pr->handle);
829 acpi_processor_set_pdc(pr);
830 arch_acpi_processor_cleanup_pdc(pr);
831 767
832#ifdef CONFIG_CPU_FREQ 768#ifdef CONFIG_CPU_FREQ
833 acpi_processor_ppc_has_changed(pr); 769 acpi_processor_ppc_has_changed(pr, 0);
834#endif 770#endif
835 acpi_processor_get_throttling_info(pr); 771 acpi_processor_get_throttling_info(pr);
836 acpi_processor_get_limit_info(pr); 772 acpi_processor_get_limit_info(pr);
@@ -845,7 +781,7 @@ static int __cpuinit acpi_processor_add(struct acpi_device *device)
845 goto err_power_exit; 781 goto err_power_exit;
846 } 782 }
847 783
848 dev_info(&device->dev, "registered as cooling_device%d\n", 784 dev_dbg(&device->dev, "registered as cooling_device%d\n",
849 pr->cdev->id); 785 pr->cdev->id);
850 786
851 result = sysfs_create_link(&device->dev.kobj, 787 result = sysfs_create_link(&device->dev.kobj,
@@ -1145,11 +1081,6 @@ static int __init acpi_processor_init(void)
1145 if (!acpi_processor_dir) 1081 if (!acpi_processor_dir)
1146 return -ENOMEM; 1082 return -ENOMEM;
1147#endif 1083#endif
1148 /*
1149 * Check whether the system is DMI table. If yes, OSPM
1150 * should not use mwait for CPU-states.
1151 */
1152 dmi_check_system(processor_idle_dmi_table);
1153 result = cpuidle_register_driver(&acpi_idle_driver); 1084 result = cpuidle_register_driver(&acpi_idle_driver);
1154 if (result < 0) 1085 if (result < 0)
1155 goto out_proc; 1086 goto out_proc;
diff --git a/drivers/acpi/processor_idle.c b/drivers/acpi/processor_idle.c
index bbd066e7f854..cc978a8c00b7 100644
--- a/drivers/acpi/processor_idle.c
+++ b/drivers/acpi/processor_idle.c
@@ -110,6 +110,14 @@ static struct dmi_system_id __cpuinitdata processor_power_dmi_table[] = {
110 DMI_MATCH(DMI_BIOS_VENDOR,"Phoenix Technologies LTD"), 110 DMI_MATCH(DMI_BIOS_VENDOR,"Phoenix Technologies LTD"),
111 DMI_MATCH(DMI_BIOS_VERSION,"SHE845M0.86C.0013.D.0302131307")}, 111 DMI_MATCH(DMI_BIOS_VERSION,"SHE845M0.86C.0013.D.0302131307")},
112 (void *)2}, 112 (void *)2},
113 { set_max_cstate, "Pavilion zv5000", {
114 DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
115 DMI_MATCH(DMI_PRODUCT_NAME,"Pavilion zv5000 (DS502A#ABA)")},
116 (void *)1},
117 { set_max_cstate, "Asus L8400B", {
118 DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer Inc."),
119 DMI_MATCH(DMI_PRODUCT_NAME,"L8400B series Notebook PC")},
120 (void *)1},
113 {}, 121 {},
114}; 122};
115 123
@@ -164,7 +172,7 @@ static void lapic_timer_check_state(int state, struct acpi_processor *pr,
164 pr->power.timer_broadcast_on_state = state; 172 pr->power.timer_broadcast_on_state = state;
165} 173}
166 174
167static void lapic_timer_propagate_broadcast(void *arg) 175static void __lapic_timer_propagate_broadcast(void *arg)
168{ 176{
169 struct acpi_processor *pr = (struct acpi_processor *) arg; 177 struct acpi_processor *pr = (struct acpi_processor *) arg;
170 unsigned long reason; 178 unsigned long reason;
@@ -175,6 +183,12 @@ static void lapic_timer_propagate_broadcast(void *arg)
175 clockevents_notify(reason, &pr->id); 183 clockevents_notify(reason, &pr->id);
176} 184}
177 185
186static void lapic_timer_propagate_broadcast(struct acpi_processor *pr)
187{
188 smp_call_function_single(pr->id, __lapic_timer_propagate_broadcast,
189 (void *)pr, 1);
190}
191
178/* Power(C) State timer broadcast control */ 192/* Power(C) State timer broadcast control */
179static void lapic_timer_state_broadcast(struct acpi_processor *pr, 193static void lapic_timer_state_broadcast(struct acpi_processor *pr,
180 struct acpi_processor_cx *cx, 194 struct acpi_processor_cx *cx,
@@ -299,6 +313,28 @@ static int acpi_processor_get_power_info_fadt(struct acpi_processor *pr)
299 pr->power.states[ACPI_STATE_C2].latency = acpi_gbl_FADT.C2latency; 313 pr->power.states[ACPI_STATE_C2].latency = acpi_gbl_FADT.C2latency;
300 pr->power.states[ACPI_STATE_C3].latency = acpi_gbl_FADT.C3latency; 314 pr->power.states[ACPI_STATE_C3].latency = acpi_gbl_FADT.C3latency;
301 315
316 /*
317 * FADT specified C2 latency must be less than or equal to
318 * 100 microseconds.
319 */
320 if (acpi_gbl_FADT.C2latency > ACPI_PROCESSOR_MAX_C2_LATENCY) {
321 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
322 "C2 latency too large [%d]\n", acpi_gbl_FADT.C2latency));
323 /* invalidate C2 */
324 pr->power.states[ACPI_STATE_C2].address = 0;
325 }
326
327 /*
328 * FADT supplied C3 latency must be less than or equal to
329 * 1000 microseconds.
330 */
331 if (acpi_gbl_FADT.C3latency > ACPI_PROCESSOR_MAX_C3_LATENCY) {
332 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
333 "C3 latency too large [%d]\n", acpi_gbl_FADT.C3latency));
334 /* invalidate C3 */
335 pr->power.states[ACPI_STATE_C3].address = 0;
336 }
337
302 ACPI_DEBUG_PRINT((ACPI_DB_INFO, 338 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
303 "lvl2[0x%08x] lvl3[0x%08x]\n", 339 "lvl2[0x%08x] lvl3[0x%08x]\n",
304 pr->power.states[ACPI_STATE_C2].address, 340 pr->power.states[ACPI_STATE_C2].address,
@@ -488,33 +524,6 @@ static int acpi_processor_get_power_info_cst(struct acpi_processor *pr)
488 return status; 524 return status;
489} 525}
490 526
491static void acpi_processor_power_verify_c2(struct acpi_processor_cx *cx)
492{
493
494 if (!cx->address)
495 return;
496
497 /*
498 * C2 latency must be less than or equal to 100
499 * microseconds.
500 */
501 else if (cx->latency > ACPI_PROCESSOR_MAX_C2_LATENCY) {
502 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
503 "latency too large [%d]\n", cx->latency));
504 return;
505 }
506
507 /*
508 * Otherwise we've met all of our C2 requirements.
509 * Normalize the C2 latency to expidite policy
510 */
511 cx->valid = 1;
512
513 cx->latency_ticks = cx->latency;
514
515 return;
516}
517
518static void acpi_processor_power_verify_c3(struct acpi_processor *pr, 527static void acpi_processor_power_verify_c3(struct acpi_processor *pr,
519 struct acpi_processor_cx *cx) 528 struct acpi_processor_cx *cx)
520{ 529{
@@ -526,16 +535,6 @@ static void acpi_processor_power_verify_c3(struct acpi_processor *pr,
526 return; 535 return;
527 536
528 /* 537 /*
529 * C3 latency must be less than or equal to 1000
530 * microseconds.
531 */
532 else if (cx->latency > ACPI_PROCESSOR_MAX_C3_LATENCY) {
533 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
534 "latency too large [%d]\n", cx->latency));
535 return;
536 }
537
538 /*
539 * PIIX4 Erratum #18: We don't support C3 when Type-F (fast) 538 * PIIX4 Erratum #18: We don't support C3 when Type-F (fast)
540 * DMA transfers are used by any ISA device to avoid livelock. 539 * DMA transfers are used by any ISA device to avoid livelock.
541 * Note that we could disable Type-F DMA (as recommended by 540 * Note that we could disable Type-F DMA (as recommended by
@@ -623,7 +622,10 @@ static int acpi_processor_power_verify(struct acpi_processor *pr)
623 break; 622 break;
624 623
625 case ACPI_STATE_C2: 624 case ACPI_STATE_C2:
626 acpi_processor_power_verify_c2(cx); 625 if (!cx->address)
626 break;
627 cx->valid = 1;
628 cx->latency_ticks = cx->latency; /* Normalize latency */
627 break; 629 break;
628 630
629 case ACPI_STATE_C3: 631 case ACPI_STATE_C3:
@@ -638,8 +640,7 @@ static int acpi_processor_power_verify(struct acpi_processor *pr)
638 working++; 640 working++;
639 } 641 }
640 642
641 smp_call_function_single(pr->id, lapic_timer_propagate_broadcast, 643 lapic_timer_propagate_broadcast(pr);
642 pr, 1);
643 644
644 return (working); 645 return (working);
645} 646}
@@ -879,12 +880,14 @@ static int acpi_idle_enter_simple(struct cpuidle_device *dev,
879 return(acpi_idle_enter_c1(dev, state)); 880 return(acpi_idle_enter_c1(dev, state));
880 881
881 local_irq_disable(); 882 local_irq_disable();
882 current_thread_info()->status &= ~TS_POLLING; 883 if (cx->entry_method != ACPI_CSTATE_FFH) {
883 /* 884 current_thread_info()->status &= ~TS_POLLING;
884 * TS_POLLING-cleared state must be visible before we test 885 /*
885 * NEED_RESCHED: 886 * TS_POLLING-cleared state must be visible before we test
886 */ 887 * NEED_RESCHED:
887 smp_mb(); 888 */
889 smp_mb();
890 }
888 891
889 if (unlikely(need_resched())) { 892 if (unlikely(need_resched())) {
890 current_thread_info()->status |= TS_POLLING; 893 current_thread_info()->status |= TS_POLLING;
@@ -964,12 +967,14 @@ static int acpi_idle_enter_bm(struct cpuidle_device *dev,
964 } 967 }
965 968
966 local_irq_disable(); 969 local_irq_disable();
967 current_thread_info()->status &= ~TS_POLLING; 970 if (cx->entry_method != ACPI_CSTATE_FFH) {
968 /* 971 current_thread_info()->status &= ~TS_POLLING;
969 * TS_POLLING-cleared state must be visible before we test 972 /*
970 * NEED_RESCHED: 973 * TS_POLLING-cleared state must be visible before we test
971 */ 974 * NEED_RESCHED:
972 smp_mb(); 975 */
976 smp_mb();
977 }
973 978
974 if (unlikely(need_resched())) { 979 if (unlikely(need_resched())) {
975 current_thread_info()->status |= TS_POLLING; 980 current_thread_info()->status |= TS_POLLING;
diff --git a/drivers/acpi/processor_pdc.c b/drivers/acpi/processor_pdc.c
new file mode 100644
index 000000000000..e306ba9aa34e
--- /dev/null
+++ b/drivers/acpi/processor_pdc.c
@@ -0,0 +1,209 @@
1/*
2 * Copyright (C) 2005 Intel Corporation
3 * Copyright (C) 2009 Hewlett-Packard Development Company, L.P.
4 *
5 * Alex Chiang <achiang@hp.com>
6 * - Unified x86/ia64 implementations
7 * Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
8 * - Added _PDC for platforms with Intel CPUs
9 */
10#include <linux/dmi.h>
11
12#include <acpi/acpi_drivers.h>
13#include <acpi/processor.h>
14
15#include "internal.h"
16
17#define PREFIX "ACPI: "
18#define _COMPONENT ACPI_PROCESSOR_COMPONENT
19ACPI_MODULE_NAME("processor_pdc");
20
21static int set_no_mwait(const struct dmi_system_id *id)
22{
23 printk(KERN_NOTICE PREFIX "%s detected - "
24 "disabling mwait for CPU C-states\n", id->ident);
25 idle_nomwait = 1;
26 return 0;
27}
28
29static struct dmi_system_id __cpuinitdata processor_idle_dmi_table[] = {
30 {
31 set_no_mwait, "IFL91 board", {
32 DMI_MATCH(DMI_BIOS_VENDOR, "COMPAL"),
33 DMI_MATCH(DMI_SYS_VENDOR, "ZEPTO"),
34 DMI_MATCH(DMI_PRODUCT_VERSION, "3215W"),
35 DMI_MATCH(DMI_BOARD_NAME, "IFL91") }, NULL},
36 {
37 set_no_mwait, "Extensa 5220", {
38 DMI_MATCH(DMI_BIOS_VENDOR, "Phoenix Technologies LTD"),
39 DMI_MATCH(DMI_SYS_VENDOR, "Acer"),
40 DMI_MATCH(DMI_PRODUCT_VERSION, "0100"),
41 DMI_MATCH(DMI_BOARD_NAME, "Columbia") }, NULL},
42 {},
43};
44
45static void acpi_set_pdc_bits(u32 *buf)
46{
47 buf[0] = ACPI_PDC_REVISION_ID;
48 buf[1] = 1;
49
50 /* Enable coordination with firmware's _TSD info */
51 buf[2] = ACPI_PDC_SMP_T_SWCOORD;
52
53 /* Twiddle arch-specific bits needed for _PDC */
54 arch_acpi_set_pdc_bits(buf);
55}
56
57static struct acpi_object_list *acpi_processor_alloc_pdc(void)
58{
59 struct acpi_object_list *obj_list;
60 union acpi_object *obj;
61 u32 *buf;
62
63 /* allocate and initialize pdc. It will be used later. */
64 obj_list = kmalloc(sizeof(struct acpi_object_list), GFP_KERNEL);
65 if (!obj_list) {
66 printk(KERN_ERR "Memory allocation error\n");
67 return NULL;
68 }
69
70 obj = kmalloc(sizeof(union acpi_object), GFP_KERNEL);
71 if (!obj) {
72 printk(KERN_ERR "Memory allocation error\n");
73 kfree(obj_list);
74 return NULL;
75 }
76
77 buf = kmalloc(12, GFP_KERNEL);
78 if (!buf) {
79 printk(KERN_ERR "Memory allocation error\n");
80 kfree(obj);
81 kfree(obj_list);
82 return NULL;
83 }
84
85 acpi_set_pdc_bits(buf);
86
87 obj->type = ACPI_TYPE_BUFFER;
88 obj->buffer.length = 12;
89 obj->buffer.pointer = (u8 *) buf;
90 obj_list->count = 1;
91 obj_list->pointer = obj;
92
93 return obj_list;
94}
95
96/*
97 * _PDC is required for a BIOS-OS handshake for most of the newer
98 * ACPI processor features.
99 */
100static int
101acpi_processor_eval_pdc(acpi_handle handle, struct acpi_object_list *pdc_in)
102{
103 acpi_status status = AE_OK;
104
105 if (idle_nomwait) {
106 /*
107 * If mwait is disabled for CPU C-states, the C2C3_FFH access
108 * mode will be disabled in the parameter of _PDC object.
109 * Of course C1_FFH access mode will also be disabled.
110 */
111 union acpi_object *obj;
112 u32 *buffer = NULL;
113
114 obj = pdc_in->pointer;
115 buffer = (u32 *)(obj->buffer.pointer);
116 buffer[2] &= ~(ACPI_PDC_C_C2C3_FFH | ACPI_PDC_C_C1_FFH);
117
118 }
119 status = acpi_evaluate_object(handle, "_PDC", pdc_in, NULL);
120
121 if (ACPI_FAILURE(status))
122 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
123 "Could not evaluate _PDC, using legacy perf. control.\n"));
124
125 return status;
126}
127
128static int early_pdc_done;
129
130void acpi_processor_set_pdc(acpi_handle handle)
131{
132 struct acpi_object_list *obj_list;
133
134 if (arch_has_acpi_pdc() == false)
135 return;
136
137 if (early_pdc_done)
138 return;
139
140 obj_list = acpi_processor_alloc_pdc();
141 if (!obj_list)
142 return;
143
144 acpi_processor_eval_pdc(handle, obj_list);
145
146 kfree(obj_list->pointer->buffer.pointer);
147 kfree(obj_list->pointer);
148 kfree(obj_list);
149}
150EXPORT_SYMBOL_GPL(acpi_processor_set_pdc);
151
152static int early_pdc_optin;
153static int set_early_pdc_optin(const struct dmi_system_id *id)
154{
155 early_pdc_optin = 1;
156 return 0;
157}
158
159static int param_early_pdc_optin(char *s)
160{
161 early_pdc_optin = 1;
162 return 1;
163}
164__setup("acpi_early_pdc_eval", param_early_pdc_optin);
165
166static struct dmi_system_id __cpuinitdata early_pdc_optin_table[] = {
167 {
168 set_early_pdc_optin, "HP Envy", {
169 DMI_MATCH(DMI_BIOS_VENDOR, "Hewlett-Packard"),
170 DMI_MATCH(DMI_PRODUCT_NAME, "HP Envy") }, NULL},
171 {
172 set_early_pdc_optin, "HP Pavilion dv6", {
173 DMI_MATCH(DMI_BIOS_VENDOR, "Hewlett-Packard"),
174 DMI_MATCH(DMI_PRODUCT_NAME, "HP Pavilion dv6") }, NULL},
175 {
176 set_early_pdc_optin, "HP Pavilion dv7", {
177 DMI_MATCH(DMI_BIOS_VENDOR, "Hewlett-Packard"),
178 DMI_MATCH(DMI_PRODUCT_NAME, "HP Pavilion dv7") }, NULL},
179 {},
180};
181
182static acpi_status
183early_init_pdc(acpi_handle handle, u32 lvl, void *context, void **rv)
184{
185 acpi_processor_set_pdc(handle);
186 return AE_OK;
187}
188
189void __init acpi_early_processor_set_pdc(void)
190{
191 /*
192 * Check whether the system is DMI table. If yes, OSPM
193 * should not use mwait for CPU-states.
194 */
195 dmi_check_system(processor_idle_dmi_table);
196
197 /*
198 * Allow systems to opt-in to early _PDC evaluation.
199 */
200 dmi_check_system(early_pdc_optin_table);
201 if (!early_pdc_optin)
202 return;
203
204 acpi_walk_namespace(ACPI_TYPE_PROCESSOR, ACPI_ROOT_OBJECT,
205 ACPI_UINT32_MAX,
206 early_init_pdc, NULL, NULL, NULL);
207
208 early_pdc_done = 1;
209}
diff --git a/drivers/acpi/processor_perflib.c b/drivers/acpi/processor_perflib.c
index 01e366d2b6fb..a959f6a07508 100644
--- a/drivers/acpi/processor_perflib.c
+++ b/drivers/acpi/processor_perflib.c
@@ -152,15 +152,59 @@ static int acpi_processor_get_platform_limit(struct acpi_processor *pr)
152 return 0; 152 return 0;
153} 153}
154 154
155int acpi_processor_ppc_has_changed(struct acpi_processor *pr) 155#define ACPI_PROCESSOR_NOTIFY_PERFORMANCE 0x80
156/*
157 * acpi_processor_ppc_ost: Notify firmware the _PPC evaluation status
158 * @handle: ACPI processor handle
159 * @status: the status code of _PPC evaluation
160 * 0: success. OSPM is now using the performance state specificed.
161 * 1: failure. OSPM has not changed the number of P-states in use
162 */
163static void acpi_processor_ppc_ost(acpi_handle handle, int status)
164{
165 union acpi_object params[2] = {
166 {.type = ACPI_TYPE_INTEGER,},
167 {.type = ACPI_TYPE_INTEGER,},
168 };
169 struct acpi_object_list arg_list = {2, params};
170 acpi_handle temp;
171
172 params[0].integer.value = ACPI_PROCESSOR_NOTIFY_PERFORMANCE;
173 params[1].integer.value = status;
174
175 /* when there is no _OST , skip it */
176 if (ACPI_FAILURE(acpi_get_handle(handle, "_OST", &temp)))
177 return;
178
179 acpi_evaluate_object(handle, "_OST", &arg_list, NULL);
180 return;
181}
182
183int acpi_processor_ppc_has_changed(struct acpi_processor *pr, int event_flag)
156{ 184{
157 int ret; 185 int ret;
158 186
159 if (ignore_ppc) 187 if (ignore_ppc) {
188 /*
189 * Only when it is notification event, the _OST object
190 * will be evaluated. Otherwise it is skipped.
191 */
192 if (event_flag)
193 acpi_processor_ppc_ost(pr->handle, 1);
160 return 0; 194 return 0;
195 }
161 196
162 ret = acpi_processor_get_platform_limit(pr); 197 ret = acpi_processor_get_platform_limit(pr);
163 198 /*
199 * Only when it is notification event, the _OST object
200 * will be evaluated. Otherwise it is skipped.
201 */
202 if (event_flag) {
203 if (ret < 0)
204 acpi_processor_ppc_ost(pr->handle, 1);
205 else
206 acpi_processor_ppc_ost(pr->handle, 0);
207 }
164 if (ret < 0) 208 if (ret < 0)
165 return (ret); 209 return (ret);
166 else 210 else
@@ -369,7 +413,11 @@ static int acpi_processor_get_performance_info(struct acpi_processor *pr)
369 if (result) 413 if (result)
370 goto update_bios; 414 goto update_bios;
371 415
372 return 0; 416 /* We need to call _PPC once when cpufreq starts */
417 if (ignore_ppc != 1)
418 result = acpi_processor_get_platform_limit(pr);
419
420 return result;
373 421
374 /* 422 /*
375 * Having _PPC but missing frequencies (_PSS, _PCT) is a very good hint that 423 * Having _PPC but missing frequencies (_PSS, _PCT) is a very good hint that
diff --git a/drivers/acpi/processor_thermal.c b/drivers/acpi/processor_thermal.c
index 140c5c5b423c..6deafb4aa0da 100644
--- a/drivers/acpi/processor_thermal.c
+++ b/drivers/acpi/processor_thermal.c
@@ -443,8 +443,7 @@ struct thermal_cooling_device_ops processor_cooling_ops = {
443#ifdef CONFIG_ACPI_PROCFS 443#ifdef CONFIG_ACPI_PROCFS
444static int acpi_processor_limit_seq_show(struct seq_file *seq, void *offset) 444static int acpi_processor_limit_seq_show(struct seq_file *seq, void *offset)
445{ 445{
446 struct acpi_processor *pr = (struct acpi_processor *)seq->private; 446 struct acpi_processor *pr = seq->private;
447
448 447
449 if (!pr) 448 if (!pr)
450 goto end; 449 goto end;
diff --git a/drivers/acpi/sbs.c b/drivers/acpi/sbs.c
index 52b9db8afc20..b16ddbf23a9c 100644
--- a/drivers/acpi/sbs.c
+++ b/drivers/acpi/sbs.c
@@ -822,7 +822,10 @@ static int acpi_battery_add(struct acpi_sbs *sbs, int id)
822 822
823static void acpi_battery_remove(struct acpi_sbs *sbs, int id) 823static void acpi_battery_remove(struct acpi_sbs *sbs, int id)
824{ 824{
825#if defined(CONFIG_ACPI_SYSFS_POWER) || defined(CONFIG_ACPI_PROCFS_POWER)
825 struct acpi_battery *battery = &sbs->battery[id]; 826 struct acpi_battery *battery = &sbs->battery[id];
827#endif
828
826#ifdef CONFIG_ACPI_SYSFS_POWER 829#ifdef CONFIG_ACPI_SYSFS_POWER
827 if (battery->bat.dev) { 830 if (battery->bat.dev) {
828 if (battery->have_sysfs_alarm) 831 if (battery->have_sysfs_alarm)
diff --git a/drivers/acpi/sbshc.c b/drivers/acpi/sbshc.c
index d9339806df45..fd09229282ea 100644
--- a/drivers/acpi/sbshc.c
+++ b/drivers/acpi/sbshc.c
@@ -242,7 +242,7 @@ static int smbus_alarm(void *context)
242 case ACPI_SBS_CHARGER: 242 case ACPI_SBS_CHARGER:
243 case ACPI_SBS_MANAGER: 243 case ACPI_SBS_MANAGER:
244 case ACPI_SBS_BATTERY: 244 case ACPI_SBS_BATTERY:
245 acpi_os_execute(OSL_GPE_HANDLER, 245 acpi_os_execute(OSL_NOTIFY_HANDLER,
246 acpi_smbus_callback, hc); 246 acpi_smbus_callback, hc);
247 default:; 247 default:;
248 } 248 }
diff --git a/drivers/acpi/scan.c b/drivers/acpi/scan.c
index ff9f6226085d..3e009674f333 100644
--- a/drivers/acpi/scan.c
+++ b/drivers/acpi/scan.c
@@ -1336,9 +1336,25 @@ static int acpi_bus_scan(acpi_handle handle, struct acpi_bus_ops *ops,
1336 1336
1337 if (child) 1337 if (child)
1338 *child = device; 1338 *child = device;
1339 return 0; 1339
1340 if (device)
1341 return 0;
1342 else
1343 return -ENODEV;
1340} 1344}
1341 1345
1346/*
1347 * acpi_bus_add and acpi_bus_start
1348 *
1349 * scan a given ACPI tree and (probably recently hot-plugged)
1350 * create and add or starts found devices.
1351 *
1352 * If no devices were found -ENODEV is returned which does not
1353 * mean that this is a real error, there just have been no suitable
1354 * ACPI objects in the table trunk from which the kernel could create
1355 * a device and add/start an appropriate driver.
1356 */
1357
1342int 1358int
1343acpi_bus_add(struct acpi_device **child, 1359acpi_bus_add(struct acpi_device **child,
1344 struct acpi_device *parent, acpi_handle handle, int type) 1360 struct acpi_device *parent, acpi_handle handle, int type)
@@ -1348,8 +1364,7 @@ acpi_bus_add(struct acpi_device **child,
1348 memset(&ops, 0, sizeof(ops)); 1364 memset(&ops, 0, sizeof(ops));
1349 ops.acpi_op_add = 1; 1365 ops.acpi_op_add = 1;
1350 1366
1351 acpi_bus_scan(handle, &ops, child); 1367 return acpi_bus_scan(handle, &ops, child);
1352 return 0;
1353} 1368}
1354EXPORT_SYMBOL(acpi_bus_add); 1369EXPORT_SYMBOL(acpi_bus_add);
1355 1370
@@ -1357,11 +1372,13 @@ int acpi_bus_start(struct acpi_device *device)
1357{ 1372{
1358 struct acpi_bus_ops ops; 1373 struct acpi_bus_ops ops;
1359 1374
1375 if (!device)
1376 return -EINVAL;
1377
1360 memset(&ops, 0, sizeof(ops)); 1378 memset(&ops, 0, sizeof(ops));
1361 ops.acpi_op_start = 1; 1379 ops.acpi_op_start = 1;
1362 1380
1363 acpi_bus_scan(device->handle, &ops, NULL); 1381 return acpi_bus_scan(device->handle, &ops, NULL);
1364 return 0;
1365} 1382}
1366EXPORT_SYMBOL(acpi_bus_start); 1383EXPORT_SYMBOL(acpi_bus_start);
1367 1384
diff --git a/drivers/acpi/sleep.c b/drivers/acpi/sleep.c
index 5f2c379ab7bf..79d33d908b5a 100644
--- a/drivers/acpi/sleep.c
+++ b/drivers/acpi/sleep.c
@@ -81,6 +81,23 @@ static int acpi_sleep_prepare(u32 acpi_state)
81#ifdef CONFIG_ACPI_SLEEP 81#ifdef CONFIG_ACPI_SLEEP
82static u32 acpi_target_sleep_state = ACPI_STATE_S0; 82static u32 acpi_target_sleep_state = ACPI_STATE_S0;
83/* 83/*
84 * According to the ACPI specification the BIOS should make sure that ACPI is
85 * enabled and SCI_EN bit is set on wake-up from S1 - S3 sleep states. Still,
86 * some BIOSes don't do that and therefore we use acpi_enable() to enable ACPI
87 * on such systems during resume. Unfortunately that doesn't help in
88 * particularly pathological cases in which SCI_EN has to be set directly on
89 * resume, although the specification states very clearly that this flag is
90 * owned by the hardware. The set_sci_en_on_resume variable will be set in such
91 * cases.
92 */
93static bool set_sci_en_on_resume;
94
95void __init acpi_set_sci_en_on_resume(void)
96{
97 set_sci_en_on_resume = true;
98}
99
100/*
84 * ACPI 1.0 wants us to execute _PTS before suspending devices, so we allow the 101 * ACPI 1.0 wants us to execute _PTS before suspending devices, so we allow the
85 * user to request that behavior by using the 'acpi_old_suspend_ordering' 102 * user to request that behavior by using the 'acpi_old_suspend_ordering'
86 * kernel command line option that causes the following variable to be set. 103 * kernel command line option that causes the following variable to be set.
@@ -170,18 +187,6 @@ static void acpi_pm_end(void)
170#endif /* CONFIG_ACPI_SLEEP */ 187#endif /* CONFIG_ACPI_SLEEP */
171 188
172#ifdef CONFIG_SUSPEND 189#ifdef CONFIG_SUSPEND
173/*
174 * According to the ACPI specification the BIOS should make sure that ACPI is
175 * enabled and SCI_EN bit is set on wake-up from S1 - S3 sleep states. Still,
176 * some BIOSes don't do that and therefore we use acpi_enable() to enable ACPI
177 * on such systems during resume. Unfortunately that doesn't help in
178 * particularly pathological cases in which SCI_EN has to be set directly on
179 * resume, although the specification states very clearly that this flag is
180 * owned by the hardware. The set_sci_en_on_resume variable will be set in such
181 * cases.
182 */
183static bool set_sci_en_on_resume;
184
185extern void do_suspend_lowlevel(void); 190extern void do_suspend_lowlevel(void);
186 191
187static u32 acpi_suspend_states[] = { 192static u32 acpi_suspend_states[] = {
diff --git a/drivers/acpi/tables.c b/drivers/acpi/tables.c
index f336bca7c450..8a0ed2800e63 100644
--- a/drivers/acpi/tables.c
+++ b/drivers/acpi/tables.c
@@ -213,7 +213,7 @@ acpi_table_parse_entries(char *id,
213 unsigned long table_end; 213 unsigned long table_end;
214 acpi_size tbl_size; 214 acpi_size tbl_size;
215 215
216 if (acpi_disabled) 216 if (acpi_disabled && !acpi_ht)
217 return -ENODEV; 217 return -ENODEV;
218 218
219 if (!handler) 219 if (!handler)
@@ -280,7 +280,7 @@ int __init acpi_table_parse(char *id, acpi_table_handler handler)
280 struct acpi_table_header *table = NULL; 280 struct acpi_table_header *table = NULL;
281 acpi_size tbl_size; 281 acpi_size tbl_size;
282 282
283 if (acpi_disabled) 283 if (acpi_disabled && !acpi_ht)
284 return -ENODEV; 284 return -ENODEV;
285 285
286 if (!handler) 286 if (!handler)
diff --git a/drivers/acpi/thermal.c b/drivers/acpi/thermal.c
index 65f67815902a..9073ada88835 100644
--- a/drivers/acpi/thermal.c
+++ b/drivers/acpi/thermal.c
@@ -1052,6 +1052,13 @@ static int acpi_thermal_trip_seq_show(struct seq_file *seq, void *offset)
1052 acpi_device_bid(device)); 1052 acpi_device_bid(device));
1053 } 1053 }
1054 seq_puts(seq, "\n"); 1054 seq_puts(seq, "\n");
1055 } else {
1056 seq_printf(seq, "passive (forced):");
1057 if (tz->thermal_zone->forced_passive)
1058 seq_printf(seq, " %i C\n",
1059 tz->thermal_zone->forced_passive / 1000);
1060 else
1061 seq_printf(seq, "<not set>\n");
1055 } 1062 }
1056 1063
1057 for (i = 0; i < ACPI_THERMAL_MAX_ACTIVE; i++) { 1064 for (i = 0; i < ACPI_THERMAL_MAX_ACTIVE; i++) {
diff --git a/drivers/acpi/video.c b/drivers/acpi/video.c
index 05dff631591c..b765790b32be 100644
--- a/drivers/acpi/video.c
+++ b/drivers/acpi/video.c
@@ -78,6 +78,13 @@ MODULE_LICENSE("GPL");
78static int brightness_switch_enabled = 1; 78static int brightness_switch_enabled = 1;
79module_param(brightness_switch_enabled, bool, 0644); 79module_param(brightness_switch_enabled, bool, 0644);
80 80
81/*
82 * By default, we don't allow duplicate ACPI video bus devices
83 * under the same VGA controller
84 */
85static int allow_duplicates;
86module_param(allow_duplicates, bool, 0644);
87
81static int register_count = 0; 88static int register_count = 0;
82static int acpi_video_bus_add(struct acpi_device *device); 89static int acpi_video_bus_add(struct acpi_device *device);
83static int acpi_video_bus_remove(struct acpi_device *device, int type); 90static int acpi_video_bus_remove(struct acpi_device *device, int type);
@@ -999,8 +1006,10 @@ static void acpi_video_device_find_cap(struct acpi_video_device *device)
999 sprintf(name, "acpi_video%d", count++); 1006 sprintf(name, "acpi_video%d", count++);
1000 device->backlight = backlight_device_register(name, 1007 device->backlight = backlight_device_register(name,
1001 NULL, device, &acpi_backlight_ops); 1008 NULL, device, &acpi_backlight_ops);
1002 device->backlight->props.max_brightness = device->brightness->count-3;
1003 kfree(name); 1009 kfree(name);
1010 if (IS_ERR(device->backlight))
1011 return;
1012 device->backlight->props.max_brightness = device->brightness->count-3;
1004 1013
1005 result = sysfs_create_link(&device->backlight->dev.kobj, 1014 result = sysfs_create_link(&device->backlight->dev.kobj,
1006 &device->dev->dev.kobj, "device"); 1015 &device->dev->dev.kobj, "device");
@@ -1979,6 +1988,10 @@ acpi_video_switch_brightness(struct acpi_video_device *device, int event)
1979 unsigned long long level_current, level_next; 1988 unsigned long long level_current, level_next;
1980 int result = -EINVAL; 1989 int result = -EINVAL;
1981 1990
1991 /* no warning message if acpi_backlight=vendor is used */
1992 if (!acpi_video_backlight_support())
1993 return 0;
1994
1982 if (!device->brightness) 1995 if (!device->brightness)
1983 goto out; 1996 goto out;
1984 1997
@@ -2233,11 +2246,47 @@ static int acpi_video_resume(struct acpi_device *device)
2233 return AE_OK; 2246 return AE_OK;
2234} 2247}
2235 2248
2249static acpi_status
2250acpi_video_bus_match(acpi_handle handle, u32 level, void *context,
2251 void **return_value)
2252{
2253 struct acpi_device *device = context;
2254 struct acpi_device *sibling;
2255 int result;
2256
2257 if (handle == device->handle)
2258 return AE_CTRL_TERMINATE;
2259
2260 result = acpi_bus_get_device(handle, &sibling);
2261 if (result)
2262 return AE_OK;
2263
2264 if (!strcmp(acpi_device_name(sibling), ACPI_VIDEO_BUS_NAME))
2265 return AE_ALREADY_EXISTS;
2266
2267 return AE_OK;
2268}
2269
2236static int acpi_video_bus_add(struct acpi_device *device) 2270static int acpi_video_bus_add(struct acpi_device *device)
2237{ 2271{
2238 struct acpi_video_bus *video; 2272 struct acpi_video_bus *video;
2239 struct input_dev *input; 2273 struct input_dev *input;
2240 int error; 2274 int error;
2275 acpi_status status;
2276
2277 status = acpi_walk_namespace(ACPI_TYPE_DEVICE,
2278 device->parent->handle, 1,
2279 acpi_video_bus_match, NULL,
2280 device, NULL);
2281 if (status == AE_ALREADY_EXISTS) {
2282 printk(KERN_WARNING FW_BUG
2283 "Duplicate ACPI video bus devices for the"
2284 " same VGA controller, please try module "
2285 "parameter \"video.allow_duplicates=1\""
2286 "if the current driver doesn't work.\n");
2287 if (!allow_duplicates)
2288 return -ENODEV;
2289 }
2241 2290
2242 video = kzalloc(sizeof(struct acpi_video_bus), GFP_KERNEL); 2291 video = kzalloc(sizeof(struct acpi_video_bus), GFP_KERNEL);
2243 if (!video) 2292 if (!video)
diff --git a/drivers/ata/Kconfig b/drivers/ata/Kconfig
index 85844d053846..56c6374a3989 100644
--- a/drivers/ata/Kconfig
+++ b/drivers/ata/Kconfig
@@ -40,7 +40,6 @@ config ATA_VERBOSE_ERROR
40config ATA_ACPI 40config ATA_ACPI
41 bool "ATA ACPI Support" 41 bool "ATA ACPI Support"
42 depends on ACPI && PCI 42 depends on ACPI && PCI
43 select ACPI_DOCK
44 default y 43 default y
45 help 44 help
46 This option adds support for ATA-related ACPI objects. 45 This option adds support for ATA-related ACPI objects.
diff --git a/drivers/ata/ahci.c b/drivers/ata/ahci.c
index b8bea100a160..b34390347c16 100644
--- a/drivers/ata/ahci.c
+++ b/drivers/ata/ahci.c
@@ -2868,6 +2868,21 @@ static bool ahci_broken_suspend(struct pci_dev *pdev)
2868 }, 2868 },
2869 .driver_data = "F.23", /* cutoff BIOS version */ 2869 .driver_data = "F.23", /* cutoff BIOS version */
2870 }, 2870 },
2871 /*
2872 * Acer eMachines G725 has the same problem. BIOS
2873 * V1.03 is known to be broken. V3.04 is known to
2874 * work. Inbetween, there are V1.06, V2.06 and V3.03
2875 * that we don't have much idea about. For now,
2876 * blacklist anything older than V3.04.
2877 */
2878 {
2879 .ident = "G725",
2880 .matches = {
2881 DMI_MATCH(DMI_SYS_VENDOR, "eMachines"),
2882 DMI_MATCH(DMI_PRODUCT_NAME, "eMachines G725"),
2883 },
2884 .driver_data = "V3.04", /* cutoff BIOS version */
2885 },
2871 { } /* terminate list */ 2886 { } /* terminate list */
2872 }; 2887 };
2873 const struct dmi_system_id *dmi = dmi_first_match(sysids); 2888 const struct dmi_system_id *dmi = dmi_first_match(sysids);
diff --git a/drivers/ata/ata_piix.c b/drivers/ata/ata_piix.c
index 19136a7e1064..6f3f2257d0f0 100644
--- a/drivers/ata/ata_piix.c
+++ b/drivers/ata/ata_piix.c
@@ -329,7 +329,7 @@ static struct ata_port_operations ich_pata_ops = {
329}; 329};
330 330
331static struct ata_port_operations piix_sata_ops = { 331static struct ata_port_operations piix_sata_ops = {
332 .inherits = &ata_bmdma_port_ops, 332 .inherits = &ata_bmdma32_port_ops,
333}; 333};
334 334
335static struct ata_port_operations piix_sidpr_sata_ops = { 335static struct ata_port_operations piix_sidpr_sata_ops = {
diff --git a/drivers/ata/libata-core.c b/drivers/ata/libata-core.c
index 22ff51bdbc8a..6728328f3bea 100644
--- a/drivers/ata/libata-core.c
+++ b/drivers/ata/libata-core.c
@@ -3790,21 +3790,45 @@ int sata_link_debounce(struct ata_link *link, const unsigned long *params,
3790int sata_link_resume(struct ata_link *link, const unsigned long *params, 3790int sata_link_resume(struct ata_link *link, const unsigned long *params,
3791 unsigned long deadline) 3791 unsigned long deadline)
3792{ 3792{
3793 int tries = ATA_LINK_RESUME_TRIES;
3793 u32 scontrol, serror; 3794 u32 scontrol, serror;
3794 int rc; 3795 int rc;
3795 3796
3796 if ((rc = sata_scr_read(link, SCR_CONTROL, &scontrol))) 3797 if ((rc = sata_scr_read(link, SCR_CONTROL, &scontrol)))
3797 return rc; 3798 return rc;
3798 3799
3799 scontrol = (scontrol & 0x0f0) | 0x300; 3800 /*
3801 * Writes to SControl sometimes get ignored under certain
3802 * controllers (ata_piix SIDPR). Make sure DET actually is
3803 * cleared.
3804 */
3805 do {
3806 scontrol = (scontrol & 0x0f0) | 0x300;
3807 if ((rc = sata_scr_write(link, SCR_CONTROL, scontrol)))
3808 return rc;
3809 /*
3810 * Some PHYs react badly if SStatus is pounded
3811 * immediately after resuming. Delay 200ms before
3812 * debouncing.
3813 */
3814 msleep(200);
3800 3815
3801 if ((rc = sata_scr_write(link, SCR_CONTROL, scontrol))) 3816 /* is SControl restored correctly? */
3802 return rc; 3817 if ((rc = sata_scr_read(link, SCR_CONTROL, &scontrol)))
3818 return rc;
3819 } while ((scontrol & 0xf0f) != 0x300 && --tries);
3803 3820
3804 /* Some PHYs react badly if SStatus is pounded immediately 3821 if ((scontrol & 0xf0f) != 0x300) {
3805 * after resuming. Delay 200ms before debouncing. 3822 ata_link_printk(link, KERN_ERR,
3806 */ 3823 "failed to resume link (SControl %X)\n",
3807 msleep(200); 3824 scontrol);
3825 return 0;
3826 }
3827
3828 if (tries < ATA_LINK_RESUME_TRIES)
3829 ata_link_printk(link, KERN_WARNING,
3830 "link resume succeeded after %d retries\n",
3831 ATA_LINK_RESUME_TRIES - tries);
3808 3832
3809 if ((rc = sata_link_debounce(link, params, deadline))) 3833 if ((rc = sata_link_debounce(link, params, deadline)))
3810 return rc; 3834 return rc;
diff --git a/drivers/ata/libata-eh.c b/drivers/ata/libata-eh.c
index 0ea97c942ced..9f6cfac0f2cc 100644
--- a/drivers/ata/libata-eh.c
+++ b/drivers/ata/libata-eh.c
@@ -2028,8 +2028,9 @@ static void ata_eh_link_autopsy(struct ata_link *link)
2028 qc->err_mask &= ~(AC_ERR_DEV | AC_ERR_OTHER); 2028 qc->err_mask &= ~(AC_ERR_DEV | AC_ERR_OTHER);
2029 2029
2030 /* determine whether the command is worth retrying */ 2030 /* determine whether the command is worth retrying */
2031 if (!(qc->err_mask & AC_ERR_INVALID) && 2031 if (qc->flags & ATA_QCFLAG_IO ||
2032 ((qc->flags & ATA_QCFLAG_IO) || qc->err_mask != AC_ERR_DEV)) 2032 (!(qc->err_mask & AC_ERR_INVALID) &&
2033 qc->err_mask != AC_ERR_DEV))
2033 qc->flags |= ATA_QCFLAG_RETRY; 2034 qc->flags |= ATA_QCFLAG_RETRY;
2034 2035
2035 /* accumulate error info */ 2036 /* accumulate error info */
diff --git a/drivers/ata/libata-scsi.c b/drivers/ata/libata-scsi.c
index 1683ebda900b..d096fbcbc771 100644
--- a/drivers/ata/libata-scsi.c
+++ b/drivers/ata/libata-scsi.c
@@ -2875,7 +2875,7 @@ static unsigned int ata_scsi_pass_thru(struct ata_queued_cmd *qc)
2875 * write indication (used for PIO/DMA setup), result TF is 2875 * write indication (used for PIO/DMA setup), result TF is
2876 * copied back and we don't whine too much about its failure. 2876 * copied back and we don't whine too much about its failure.
2877 */ 2877 */
2878 tf->flags = ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE; 2878 tf->flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
2879 if (scmd->sc_data_direction == DMA_TO_DEVICE) 2879 if (scmd->sc_data_direction == DMA_TO_DEVICE)
2880 tf->flags |= ATA_TFLAG_WRITE; 2880 tf->flags |= ATA_TFLAG_WRITE;
2881 2881
@@ -3022,7 +3022,7 @@ static inline ata_xlat_func_t ata_get_xlat_func(struct ata_device *dev, u8 cmd)
3022 case WRITE_16: 3022 case WRITE_16:
3023 return ata_scsi_rw_xlat; 3023 return ata_scsi_rw_xlat;
3024 3024
3025 case 0x93 /*WRITE_SAME_16*/: 3025 case WRITE_SAME_16:
3026 return ata_scsi_write_same_xlat; 3026 return ata_scsi_write_same_xlat;
3027 3027
3028 case SYNCHRONIZE_CACHE: 3028 case SYNCHRONIZE_CACHE:
diff --git a/drivers/ata/libata-sff.c b/drivers/ata/libata-sff.c
index efa8773bef5a..730ef3c384ca 100644
--- a/drivers/ata/libata-sff.c
+++ b/drivers/ata/libata-sff.c
@@ -893,6 +893,9 @@ static void ata_pio_sector(struct ata_queued_cmd *qc)
893 do_write); 893 do_write);
894 } 894 }
895 895
896 if (!do_write)
897 flush_dcache_page(page);
898
896 qc->curbytes += qc->sect_size; 899 qc->curbytes += qc->sect_size;
897 qc->cursg_ofs += qc->sect_size; 900 qc->cursg_ofs += qc->sect_size;
898 901
@@ -2275,7 +2278,7 @@ void ata_sff_drain_fifo(struct ata_queued_cmd *qc)
2275 ap = qc->ap; 2278 ap = qc->ap;
2276 /* Drain up to 64K of data before we give up this recovery method */ 2279 /* Drain up to 64K of data before we give up this recovery method */
2277 for (count = 0; (ap->ops->sff_check_status(ap) & ATA_DRQ) 2280 for (count = 0; (ap->ops->sff_check_status(ap) & ATA_DRQ)
2278 && count < 32768; count++) 2281 && count < 65536; count += 2)
2279 ioread16(ap->ioaddr.data_addr); 2282 ioread16(ap->ioaddr.data_addr);
2280 2283
2281 /* Can become DEBUG later */ 2284 /* Can become DEBUG later */
diff --git a/drivers/ata/pata_bf54x.c b/drivers/ata/pata_bf54x.c
index c4b47a3e5446..02c81f12c702 100644
--- a/drivers/ata/pata_bf54x.c
+++ b/drivers/ata/pata_bf54x.c
@@ -1557,6 +1557,25 @@ static unsigned short atapi_io_port[] = {
1557 P_ATAPI_DMARQ, 1557 P_ATAPI_DMARQ,
1558 P_ATAPI_INTRQ, 1558 P_ATAPI_INTRQ,
1559 P_ATAPI_IORDY, 1559 P_ATAPI_IORDY,
1560 P_ATAPI_D0A,
1561 P_ATAPI_D1A,
1562 P_ATAPI_D2A,
1563 P_ATAPI_D3A,
1564 P_ATAPI_D4A,
1565 P_ATAPI_D5A,
1566 P_ATAPI_D6A,
1567 P_ATAPI_D7A,
1568 P_ATAPI_D8A,
1569 P_ATAPI_D9A,
1570 P_ATAPI_D10A,
1571 P_ATAPI_D11A,
1572 P_ATAPI_D12A,
1573 P_ATAPI_D13A,
1574 P_ATAPI_D14A,
1575 P_ATAPI_D15A,
1576 P_ATAPI_A0A,
1577 P_ATAPI_A1A,
1578 P_ATAPI_A2A,
1560 0 1579 0
1561}; 1580};
1562 1581
diff --git a/drivers/ata/pata_cmd64x.c b/drivers/ata/pata_cmd64x.c
index dadfc358ba1c..0efb1f58f255 100644
--- a/drivers/ata/pata_cmd64x.c
+++ b/drivers/ata/pata_cmd64x.c
@@ -31,7 +31,7 @@
31#include <linux/libata.h> 31#include <linux/libata.h>
32 32
33#define DRV_NAME "pata_cmd64x" 33#define DRV_NAME "pata_cmd64x"
34#define DRV_VERSION "0.3.1" 34#define DRV_VERSION "0.2.5"
35 35
36/* 36/*
37 * CMD64x specific registers definition. 37 * CMD64x specific registers definition.
@@ -219,7 +219,7 @@ static void cmd64x_set_dmamode(struct ata_port *ap, struct ata_device *adev)
219 regU |= udma_data[adev->dma_mode - XFER_UDMA_0] << shift; 219 regU |= udma_data[adev->dma_mode - XFER_UDMA_0] << shift;
220 /* Merge the control bits */ 220 /* Merge the control bits */
221 regU |= 1 << adev->devno; /* UDMA on */ 221 regU |= 1 << adev->devno; /* UDMA on */
222 if (adev->dma_mode > 2) /* 15nS timing */ 222 if (adev->dma_mode > XFER_UDMA_2) /* 15nS timing */
223 regU |= 4 << adev->devno; 223 regU |= 4 << adev->devno;
224 } else { 224 } else {
225 regU &= ~ (1 << adev->devno); /* UDMA off */ 225 regU &= ~ (1 << adev->devno); /* UDMA off */
@@ -254,109 +254,17 @@ static void cmd648_bmdma_stop(struct ata_queued_cmd *qc)
254} 254}
255 255
256/** 256/**
257 * cmd64x_bmdma_stop - DMA stop callback 257 * cmd646r1_dma_stop - DMA stop callback
258 * @qc: Command in progress 258 * @qc: Command in progress
259 * 259 *
260 * Track the completion of live DMA commands and clear the 260 * Stub for now while investigating the r1 quirk in the old driver.
261 * host->private_data DMA tracking flag as we do.
262 */ 261 */
263 262
264static void cmd64x_bmdma_stop(struct ata_queued_cmd *qc) 263static void cmd646r1_bmdma_stop(struct ata_queued_cmd *qc)
265{ 264{
266 struct ata_port *ap = qc->ap;
267 ata_bmdma_stop(qc); 265 ata_bmdma_stop(qc);
268 WARN_ON(ap->host->private_data != ap);
269 ap->host->private_data = NULL;
270}
271
272/**
273 * cmd64x_qc_defer - Defer logic for chip limits
274 * @qc: queued command
275 *
276 * Decide whether we can issue the command. Called under the host lock.
277 */
278
279static int cmd64x_qc_defer(struct ata_queued_cmd *qc)
280{
281 struct ata_host *host = qc->ap->host;
282 struct ata_port *alt = host->ports[1 ^ qc->ap->port_no];
283 int rc;
284 int dma = 0;
285
286 /* Apply the ATA rules first */
287 rc = ata_std_qc_defer(qc);
288 if (rc)
289 return rc;
290
291 if (qc->tf.protocol == ATAPI_PROT_DMA ||
292 qc->tf.protocol == ATA_PROT_DMA)
293 dma = 1;
294
295 /* If the other port is not live then issue the command */
296 if (alt == NULL || !alt->qc_active) {
297 if (dma)
298 host->private_data = qc->ap;
299 return 0;
300 }
301 /* If there is a live DMA command then wait */
302 if (host->private_data != NULL)
303 return ATA_DEFER_PORT;
304 if (dma)
305 /* Cannot overlap our DMA command */
306 return ATA_DEFER_PORT;
307 return 0;
308} 266}
309 267
310/**
311 * cmd64x_interrupt - ATA host interrupt handler
312 * @irq: irq line (unused)
313 * @dev_instance: pointer to our ata_host information structure
314 *
315 * Our interrupt handler for PCI IDE devices. Calls
316 * ata_sff_host_intr() for each port that is flagging an IRQ. We cannot
317 * use the defaults as we need to avoid touching status/altstatus during
318 * a DMA.
319 *
320 * LOCKING:
321 * Obtains host lock during operation.
322 *
323 * RETURNS:
324 * IRQ_NONE or IRQ_HANDLED.
325 */
326irqreturn_t cmd64x_interrupt(int irq, void *dev_instance)
327{
328 struct ata_host *host = dev_instance;
329 struct pci_dev *pdev = to_pci_dev(host->dev);
330 unsigned int i;
331 unsigned int handled = 0;
332 unsigned long flags;
333 static const u8 irq_reg[2] = { CFR, ARTTIM23 };
334 static const u8 irq_mask[2] = { 1 << 2, 1 << 4 };
335
336 /* TODO: make _irqsave conditional on x86 PCI IDE legacy mode */
337 spin_lock_irqsave(&host->lock, flags);
338
339 for (i = 0; i < host->n_ports; i++) {
340 struct ata_port *ap;
341 u8 reg;
342
343 pci_read_config_byte(pdev, irq_reg[i], &reg);
344 ap = host->ports[i];
345 if (ap && (reg & irq_mask[i]) &&
346 !(ap->flags & ATA_FLAG_DISABLED)) {
347 struct ata_queued_cmd *qc;
348
349 qc = ata_qc_from_tag(ap, ap->link.active_tag);
350 if (qc && (!(qc->tf.flags & ATA_TFLAG_POLLING)) &&
351 (qc->flags & ATA_QCFLAG_ACTIVE))
352 handled |= ata_sff_host_intr(ap, qc);
353 }
354 }
355
356 spin_unlock_irqrestore(&host->lock, flags);
357
358 return IRQ_RETVAL(handled);
359}
360static struct scsi_host_template cmd64x_sht = { 268static struct scsi_host_template cmd64x_sht = {
361 ATA_BMDMA_SHT(DRV_NAME), 269 ATA_BMDMA_SHT(DRV_NAME),
362}; 270};
@@ -365,8 +273,6 @@ static const struct ata_port_operations cmd64x_base_ops = {
365 .inherits = &ata_bmdma_port_ops, 273 .inherits = &ata_bmdma_port_ops,
366 .set_piomode = cmd64x_set_piomode, 274 .set_piomode = cmd64x_set_piomode,
367 .set_dmamode = cmd64x_set_dmamode, 275 .set_dmamode = cmd64x_set_dmamode,
368 .bmdma_stop = cmd64x_bmdma_stop,
369 .qc_defer = cmd64x_qc_defer,
370}; 276};
371 277
372static struct ata_port_operations cmd64x_port_ops = { 278static struct ata_port_operations cmd64x_port_ops = {
@@ -376,6 +282,7 @@ static struct ata_port_operations cmd64x_port_ops = {
376 282
377static struct ata_port_operations cmd646r1_port_ops = { 283static struct ata_port_operations cmd646r1_port_ops = {
378 .inherits = &cmd64x_base_ops, 284 .inherits = &cmd64x_base_ops,
285 .bmdma_stop = cmd646r1_bmdma_stop,
379 .cable_detect = ata_cable_40wire, 286 .cable_detect = ata_cable_40wire,
380}; 287};
381 288
@@ -383,7 +290,6 @@ static struct ata_port_operations cmd648_port_ops = {
383 .inherits = &cmd64x_base_ops, 290 .inherits = &cmd64x_base_ops,
384 .bmdma_stop = cmd648_bmdma_stop, 291 .bmdma_stop = cmd648_bmdma_stop,
385 .cable_detect = cmd648_cable_detect, 292 .cable_detect = cmd648_cable_detect,
386 .qc_defer = ata_std_qc_defer
387}; 293};
388 294
389static int cmd64x_init_one(struct pci_dev *pdev, const struct pci_device_id *id) 295static int cmd64x_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
@@ -432,7 +338,6 @@ static int cmd64x_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
432 const struct ata_port_info *ppi[] = { &cmd_info[id->driver_data], NULL }; 338 const struct ata_port_info *ppi[] = { &cmd_info[id->driver_data], NULL };
433 u8 mrdmode; 339 u8 mrdmode;
434 int rc; 340 int rc;
435 struct ata_host *host;
436 341
437 rc = pcim_enable_device(pdev); 342 rc = pcim_enable_device(pdev);
438 if (rc) 343 if (rc)
@@ -450,25 +355,20 @@ static int cmd64x_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
450 ppi[0] = &cmd_info[3]; 355 ppi[0] = &cmd_info[3];
451 } 356 }
452 357
453
454 pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 64); 358 pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 64);
455 pci_read_config_byte(pdev, MRDMODE, &mrdmode); 359 pci_read_config_byte(pdev, MRDMODE, &mrdmode);
456 mrdmode &= ~ 0x30; /* IRQ set up */ 360 mrdmode &= ~ 0x30; /* IRQ set up */
457 mrdmode |= 0x02; /* Memory read line enable */ 361 mrdmode |= 0x02; /* Memory read line enable */
458 pci_write_config_byte(pdev, MRDMODE, mrdmode); 362 pci_write_config_byte(pdev, MRDMODE, mrdmode);
459 363
364 /* Force PIO 0 here.. */
365
460 /* PPC specific fixup copied from old driver */ 366 /* PPC specific fixup copied from old driver */
461#ifdef CONFIG_PPC 367#ifdef CONFIG_PPC
462 pci_write_config_byte(pdev, UDIDETCR0, 0xF0); 368 pci_write_config_byte(pdev, UDIDETCR0, 0xF0);
463#endif 369#endif
464 rc = ata_pci_sff_prepare_host(pdev, ppi, &host);
465 if (rc)
466 return rc;
467 /* We use this pointer to track the AP which has DMA running */
468 host->private_data = NULL;
469 370
470 pci_set_master(pdev); 371 return ata_pci_sff_init_one(pdev, ppi, &cmd64x_sht, NULL);
471 return ata_pci_sff_activate_host(host, cmd64x_interrupt, &cmd64x_sht);
472} 372}
473 373
474#ifdef CONFIG_PM 374#ifdef CONFIG_PM
diff --git a/drivers/ata/pata_hpt3x2n.c b/drivers/ata/pata_hpt3x2n.c
index 9a09a1b11ca5..dd26bc73bd9a 100644
--- a/drivers/ata/pata_hpt3x2n.c
+++ b/drivers/ata/pata_hpt3x2n.c
@@ -8,7 +8,7 @@
8 * Copyright (C) 1999-2003 Andre Hedrick <andre@linux-ide.org> 8 * Copyright (C) 1999-2003 Andre Hedrick <andre@linux-ide.org>
9 * Portions Copyright (C) 2001 Sun Microsystems, Inc. 9 * Portions Copyright (C) 2001 Sun Microsystems, Inc.
10 * Portions Copyright (C) 2003 Red Hat Inc 10 * Portions Copyright (C) 2003 Red Hat Inc
11 * Portions Copyright (C) 2005-2007 MontaVista Software, Inc. 11 * Portions Copyright (C) 2005-2009 MontaVista Software, Inc.
12 * 12 *
13 * 13 *
14 * TODO 14 * TODO
@@ -25,7 +25,7 @@
25#include <linux/libata.h> 25#include <linux/libata.h>
26 26
27#define DRV_NAME "pata_hpt3x2n" 27#define DRV_NAME "pata_hpt3x2n"
28#define DRV_VERSION "0.3.7" 28#define DRV_VERSION "0.3.8"
29 29
30enum { 30enum {
31 HPT_PCI_FAST = (1 << 31), 31 HPT_PCI_FAST = (1 << 31),
@@ -264,7 +264,7 @@ static void hpt3x2n_bmdma_stop(struct ata_queued_cmd *qc)
264 264
265static void hpt3x2n_set_clock(struct ata_port *ap, int source) 265static void hpt3x2n_set_clock(struct ata_port *ap, int source)
266{ 266{
267 void __iomem *bmdma = ap->ioaddr.bmdma_addr; 267 void __iomem *bmdma = ap->ioaddr.bmdma_addr - ap->port_no * 8;
268 268
269 /* Tristate the bus */ 269 /* Tristate the bus */
270 iowrite8(0x80, bmdma+0x73); 270 iowrite8(0x80, bmdma+0x73);
@@ -274,9 +274,9 @@ static void hpt3x2n_set_clock(struct ata_port *ap, int source)
274 iowrite8(source, bmdma+0x7B); 274 iowrite8(source, bmdma+0x7B);
275 iowrite8(0xC0, bmdma+0x79); 275 iowrite8(0xC0, bmdma+0x79);
276 276
277 /* Reset state machines */ 277 /* Reset state machines, avoid enabling the disabled channels */
278 iowrite8(0x37, bmdma+0x70); 278 iowrite8(ioread8(bmdma+0x70) | 0x32, bmdma+0x70);
279 iowrite8(0x37, bmdma+0x74); 279 iowrite8(ioread8(bmdma+0x74) | 0x32, bmdma+0x74);
280 280
281 /* Complete reset */ 281 /* Complete reset */
282 iowrite8(0x00, bmdma+0x79); 282 iowrite8(0x00, bmdma+0x79);
@@ -286,21 +286,10 @@ static void hpt3x2n_set_clock(struct ata_port *ap, int source)
286 iowrite8(0x00, bmdma+0x77); 286 iowrite8(0x00, bmdma+0x77);
287} 287}
288 288
289/* Check if our partner interface is busy */
290
291static int hpt3x2n_pair_idle(struct ata_port *ap)
292{
293 struct ata_host *host = ap->host;
294 struct ata_port *pair = host->ports[ap->port_no ^ 1];
295
296 if (pair->hsm_task_state == HSM_ST_IDLE)
297 return 1;
298 return 0;
299}
300
301static int hpt3x2n_use_dpll(struct ata_port *ap, int writing) 289static int hpt3x2n_use_dpll(struct ata_port *ap, int writing)
302{ 290{
303 long flags = (long)ap->host->private_data; 291 long flags = (long)ap->host->private_data;
292
304 /* See if we should use the DPLL */ 293 /* See if we should use the DPLL */
305 if (writing) 294 if (writing)
306 return USE_DPLL; /* Needed for write */ 295 return USE_DPLL; /* Needed for write */
@@ -309,20 +298,35 @@ static int hpt3x2n_use_dpll(struct ata_port *ap, int writing)
309 return 0; 298 return 0;
310} 299}
311 300
301static int hpt3x2n_qc_defer(struct ata_queued_cmd *qc)
302{
303 struct ata_port *ap = qc->ap;
304 struct ata_port *alt = ap->host->ports[ap->port_no ^ 1];
305 int rc, flags = (long)ap->host->private_data;
306 int dpll = hpt3x2n_use_dpll(ap, qc->tf.flags & ATA_TFLAG_WRITE);
307
308 /* First apply the usual rules */
309 rc = ata_std_qc_defer(qc);
310 if (rc != 0)
311 return rc;
312
313 if ((flags & USE_DPLL) != dpll && alt->qc_active)
314 return ATA_DEFER_PORT;
315 return 0;
316}
317
312static unsigned int hpt3x2n_qc_issue(struct ata_queued_cmd *qc) 318static unsigned int hpt3x2n_qc_issue(struct ata_queued_cmd *qc)
313{ 319{
314 struct ata_taskfile *tf = &qc->tf;
315 struct ata_port *ap = qc->ap; 320 struct ata_port *ap = qc->ap;
316 int flags = (long)ap->host->private_data; 321 int flags = (long)ap->host->private_data;
322 int dpll = hpt3x2n_use_dpll(ap, qc->tf.flags & ATA_TFLAG_WRITE);
317 323
318 if (hpt3x2n_pair_idle(ap)) { 324 if ((flags & USE_DPLL) != dpll) {
319 int dpll = hpt3x2n_use_dpll(ap, (tf->flags & ATA_TFLAG_WRITE)); 325 flags &= ~USE_DPLL;
320 if ((flags & USE_DPLL) != dpll) { 326 flags |= dpll;
321 if (dpll == 1) 327 ap->host->private_data = (void *)(long)flags;
322 hpt3x2n_set_clock(ap, 0x21); 328
323 else 329 hpt3x2n_set_clock(ap, dpll ? 0x21 : 0x23);
324 hpt3x2n_set_clock(ap, 0x23);
325 }
326 } 330 }
327 return ata_sff_qc_issue(qc); 331 return ata_sff_qc_issue(qc);
328} 332}
@@ -339,6 +343,8 @@ static struct ata_port_operations hpt3x2n_port_ops = {
339 .inherits = &ata_bmdma_port_ops, 343 .inherits = &ata_bmdma_port_ops,
340 344
341 .bmdma_stop = hpt3x2n_bmdma_stop, 345 .bmdma_stop = hpt3x2n_bmdma_stop,
346
347 .qc_defer = hpt3x2n_qc_defer,
342 .qc_issue = hpt3x2n_qc_issue, 348 .qc_issue = hpt3x2n_qc_issue,
343 349
344 .cable_detect = hpt3x2n_cable_detect, 350 .cable_detect = hpt3x2n_cable_detect,
@@ -454,7 +460,7 @@ static int hpt3x2n_init_one(struct pci_dev *dev, const struct pci_device_id *id)
454 unsigned int f_low, f_high; 460 unsigned int f_low, f_high;
455 int adjust; 461 int adjust;
456 unsigned long iobase = pci_resource_start(dev, 4); 462 unsigned long iobase = pci_resource_start(dev, 4);
457 void *hpriv = NULL; 463 void *hpriv = (void *)USE_DPLL;
458 int rc; 464 int rc;
459 465
460 rc = pcim_enable_device(dev); 466 rc = pcim_enable_device(dev);
@@ -539,7 +545,7 @@ static int hpt3x2n_init_one(struct pci_dev *dev, const struct pci_device_id *id)
539 /* Set our private data up. We only need a few flags so we use 545 /* Set our private data up. We only need a few flags so we use
540 it directly */ 546 it directly */
541 if (pci_mhz > 60) { 547 if (pci_mhz > 60) {
542 hpriv = (void *)PCI66; 548 hpriv = (void *)(PCI66 | USE_DPLL);
543 /* 549 /*
544 * On HPT371N, if ATA clock is 66 MHz we must set bit 2 in 550 * On HPT371N, if ATA clock is 66 MHz we must set bit 2 in
545 * the MISC. register to stretch the UltraDMA Tss timing. 551 * the MISC. register to stretch the UltraDMA Tss timing.
diff --git a/drivers/ata/pata_octeon_cf.c b/drivers/ata/pata_octeon_cf.c
index d6f69561dc86..37ef416c1242 100644
--- a/drivers/ata/pata_octeon_cf.c
+++ b/drivers/ata/pata_octeon_cf.c
@@ -853,7 +853,7 @@ static int __devinit octeon_cf_probe(struct platform_device *pdev)
853 return -EINVAL; 853 return -EINVAL;
854 854
855 cs1 = devm_ioremap_nocache(&pdev->dev, res_cs1->start, 855 cs1 = devm_ioremap_nocache(&pdev->dev, res_cs1->start,
856 res_cs0->end - res_cs1->start + 1); 856 resource_size(res_cs1));
857 857
858 if (!cs1) 858 if (!cs1)
859 return -ENOMEM; 859 return -ENOMEM;
diff --git a/drivers/ata/sata_mv.c b/drivers/ata/sata_mv.c
index a8a7be0d06ff..df8ee325d3ca 100644
--- a/drivers/ata/sata_mv.c
+++ b/drivers/ata/sata_mv.c
@@ -59,6 +59,7 @@
59#include <linux/dmapool.h> 59#include <linux/dmapool.h>
60#include <linux/dma-mapping.h> 60#include <linux/dma-mapping.h>
61#include <linux/device.h> 61#include <linux/device.h>
62#include <linux/clk.h>
62#include <linux/platform_device.h> 63#include <linux/platform_device.h>
63#include <linux/ata_platform.h> 64#include <linux/ata_platform.h>
64#include <linux/mbus.h> 65#include <linux/mbus.h>
@@ -538,6 +539,7 @@ struct mv_port_signal {
538 539
539struct mv_host_priv { 540struct mv_host_priv {
540 u32 hp_flags; 541 u32 hp_flags;
542 unsigned int board_idx;
541 u32 main_irq_mask; 543 u32 main_irq_mask;
542 struct mv_port_signal signal[8]; 544 struct mv_port_signal signal[8];
543 const struct mv_hw_ops *ops; 545 const struct mv_hw_ops *ops;
@@ -548,6 +550,10 @@ struct mv_host_priv {
548 u32 irq_cause_offset; 550 u32 irq_cause_offset;
549 u32 irq_mask_offset; 551 u32 irq_mask_offset;
550 u32 unmask_all_irqs; 552 u32 unmask_all_irqs;
553
554#if defined(CONFIG_HAVE_CLK)
555 struct clk *clk;
556#endif
551 /* 557 /*
552 * These consistent DMA memory pools give us guaranteed 558 * These consistent DMA memory pools give us guaranteed
553 * alignment for hardware-accessed data structures, 559 * alignment for hardware-accessed data structures,
@@ -2775,7 +2781,7 @@ static void mv_port_intr(struct ata_port *ap, u32 port_cause)
2775 struct mv_port_priv *pp; 2781 struct mv_port_priv *pp;
2776 int edma_was_enabled; 2782 int edma_was_enabled;
2777 2783
2778 if (!ap || (ap->flags & ATA_FLAG_DISABLED)) { 2784 if (ap->flags & ATA_FLAG_DISABLED) {
2779 mv_unexpected_intr(ap, 0); 2785 mv_unexpected_intr(ap, 0);
2780 return; 2786 return;
2781 } 2787 }
@@ -3393,7 +3399,7 @@ static void mv_soc_reset_hc_port(struct mv_host_priv *hpriv,
3393 ZERO(0x024); /* respq outp */ 3399 ZERO(0x024); /* respq outp */
3394 ZERO(0x020); /* respq inp */ 3400 ZERO(0x020); /* respq inp */
3395 ZERO(0x02c); /* test control */ 3401 ZERO(0x02c); /* test control */
3396 writel(0xbc, port_mmio + EDMA_IORDY_TMOUT); 3402 writel(0x800, port_mmio + EDMA_IORDY_TMOUT);
3397} 3403}
3398 3404
3399#undef ZERO 3405#undef ZERO
@@ -3854,7 +3860,6 @@ static int mv_chip_id(struct ata_host *host, unsigned int board_idx)
3854/** 3860/**
3855 * mv_init_host - Perform some early initialization of the host. 3861 * mv_init_host - Perform some early initialization of the host.
3856 * @host: ATA host to initialize 3862 * @host: ATA host to initialize
3857 * @board_idx: controller index
3858 * 3863 *
3859 * If possible, do an early global reset of the host. Then do 3864 * If possible, do an early global reset of the host. Then do
3860 * our port init and clear/unmask all/relevant host interrupts. 3865 * our port init and clear/unmask all/relevant host interrupts.
@@ -3862,13 +3867,13 @@ static int mv_chip_id(struct ata_host *host, unsigned int board_idx)
3862 * LOCKING: 3867 * LOCKING:
3863 * Inherited from caller. 3868 * Inherited from caller.
3864 */ 3869 */
3865static int mv_init_host(struct ata_host *host, unsigned int board_idx) 3870static int mv_init_host(struct ata_host *host)
3866{ 3871{
3867 int rc = 0, n_hc, port, hc; 3872 int rc = 0, n_hc, port, hc;
3868 struct mv_host_priv *hpriv = host->private_data; 3873 struct mv_host_priv *hpriv = host->private_data;
3869 void __iomem *mmio = hpriv->base; 3874 void __iomem *mmio = hpriv->base;
3870 3875
3871 rc = mv_chip_id(host, board_idx); 3876 rc = mv_chip_id(host, hpriv->board_idx);
3872 if (rc) 3877 if (rc)
3873 goto done; 3878 goto done;
3874 3879
@@ -3905,14 +3910,6 @@ static int mv_init_host(struct ata_host *host, unsigned int board_idx)
3905 void __iomem *port_mmio = mv_port_base(mmio, port); 3910 void __iomem *port_mmio = mv_port_base(mmio, port);
3906 3911
3907 mv_port_init(&ap->ioaddr, port_mmio); 3912 mv_port_init(&ap->ioaddr, port_mmio);
3908
3909#ifdef CONFIG_PCI
3910 if (!IS_SOC(hpriv)) {
3911 unsigned int offset = port_mmio - mmio;
3912 ata_port_pbar_desc(ap, MV_PRIMARY_BAR, -1, "mmio");
3913 ata_port_pbar_desc(ap, MV_PRIMARY_BAR, offset, "port");
3914 }
3915#endif
3916 } 3913 }
3917 3914
3918 for (hc = 0; hc < n_hc; hc++) { 3915 for (hc = 0; hc < n_hc; hc++) {
@@ -4035,12 +4032,21 @@ static int mv_platform_probe(struct platform_device *pdev)
4035 return -ENOMEM; 4032 return -ENOMEM;
4036 host->private_data = hpriv; 4033 host->private_data = hpriv;
4037 hpriv->n_ports = n_ports; 4034 hpriv->n_ports = n_ports;
4035 hpriv->board_idx = chip_soc;
4038 4036
4039 host->iomap = NULL; 4037 host->iomap = NULL;
4040 hpriv->base = devm_ioremap(&pdev->dev, res->start, 4038 hpriv->base = devm_ioremap(&pdev->dev, res->start,
4041 resource_size(res)); 4039 resource_size(res));
4042 hpriv->base -= SATAHC0_REG_BASE; 4040 hpriv->base -= SATAHC0_REG_BASE;
4043 4041
4042#if defined(CONFIG_HAVE_CLK)
4043 hpriv->clk = clk_get(&pdev->dev, NULL);
4044 if (IS_ERR(hpriv->clk))
4045 dev_notice(&pdev->dev, "cannot get clkdev\n");
4046 else
4047 clk_enable(hpriv->clk);
4048#endif
4049
4044 /* 4050 /*
4045 * (Re-)program MBUS remapping windows if we are asked to. 4051 * (Re-)program MBUS remapping windows if we are asked to.
4046 */ 4052 */
@@ -4049,12 +4055,12 @@ static int mv_platform_probe(struct platform_device *pdev)
4049 4055
4050 rc = mv_create_dma_pools(hpriv, &pdev->dev); 4056 rc = mv_create_dma_pools(hpriv, &pdev->dev);
4051 if (rc) 4057 if (rc)
4052 return rc; 4058 goto err;
4053 4059
4054 /* initialize adapter */ 4060 /* initialize adapter */
4055 rc = mv_init_host(host, chip_soc); 4061 rc = mv_init_host(host);
4056 if (rc) 4062 if (rc)
4057 return rc; 4063 goto err;
4058 4064
4059 dev_printk(KERN_INFO, &pdev->dev, 4065 dev_printk(KERN_INFO, &pdev->dev,
4060 "slots %u ports %d\n", (unsigned)MV_MAX_Q_DEPTH, 4066 "slots %u ports %d\n", (unsigned)MV_MAX_Q_DEPTH,
@@ -4062,6 +4068,15 @@ static int mv_platform_probe(struct platform_device *pdev)
4062 4068
4063 return ata_host_activate(host, platform_get_irq(pdev, 0), mv_interrupt, 4069 return ata_host_activate(host, platform_get_irq(pdev, 0), mv_interrupt,
4064 IRQF_SHARED, &mv6_sht); 4070 IRQF_SHARED, &mv6_sht);
4071err:
4072#if defined(CONFIG_HAVE_CLK)
4073 if (!IS_ERR(hpriv->clk)) {
4074 clk_disable(hpriv->clk);
4075 clk_put(hpriv->clk);
4076 }
4077#endif
4078
4079 return rc;
4065} 4080}
4066 4081
4067/* 4082/*
@@ -4076,14 +4091,66 @@ static int __devexit mv_platform_remove(struct platform_device *pdev)
4076{ 4091{
4077 struct device *dev = &pdev->dev; 4092 struct device *dev = &pdev->dev;
4078 struct ata_host *host = dev_get_drvdata(dev); 4093 struct ata_host *host = dev_get_drvdata(dev);
4079 4094#if defined(CONFIG_HAVE_CLK)
4095 struct mv_host_priv *hpriv = host->private_data;
4096#endif
4080 ata_host_detach(host); 4097 ata_host_detach(host);
4098
4099#if defined(CONFIG_HAVE_CLK)
4100 if (!IS_ERR(hpriv->clk)) {
4101 clk_disable(hpriv->clk);
4102 clk_put(hpriv->clk);
4103 }
4104#endif
4081 return 0; 4105 return 0;
4082} 4106}
4083 4107
4108#ifdef CONFIG_PM
4109static int mv_platform_suspend(struct platform_device *pdev, pm_message_t state)
4110{
4111 struct ata_host *host = dev_get_drvdata(&pdev->dev);
4112 if (host)
4113 return ata_host_suspend(host, state);
4114 else
4115 return 0;
4116}
4117
4118static int mv_platform_resume(struct platform_device *pdev)
4119{
4120 struct ata_host *host = dev_get_drvdata(&pdev->dev);
4121 int ret;
4122
4123 if (host) {
4124 struct mv_host_priv *hpriv = host->private_data;
4125 const struct mv_sata_platform_data *mv_platform_data = \
4126 pdev->dev.platform_data;
4127 /*
4128 * (Re-)program MBUS remapping windows if we are asked to.
4129 */
4130 if (mv_platform_data->dram != NULL)
4131 mv_conf_mbus_windows(hpriv, mv_platform_data->dram);
4132
4133 /* initialize adapter */
4134 ret = mv_init_host(host);
4135 if (ret) {
4136 printk(KERN_ERR DRV_NAME ": Error during HW init\n");
4137 return ret;
4138 }
4139 ata_host_resume(host);
4140 }
4141
4142 return 0;
4143}
4144#else
4145#define mv_platform_suspend NULL
4146#define mv_platform_resume NULL
4147#endif
4148
4084static struct platform_driver mv_platform_driver = { 4149static struct platform_driver mv_platform_driver = {
4085 .probe = mv_platform_probe, 4150 .probe = mv_platform_probe,
4086 .remove = __devexit_p(mv_platform_remove), 4151 .remove = __devexit_p(mv_platform_remove),
4152 .suspend = mv_platform_suspend,
4153 .resume = mv_platform_resume,
4087 .driver = { 4154 .driver = {
4088 .name = DRV_NAME, 4155 .name = DRV_NAME,
4089 .owner = THIS_MODULE, 4156 .owner = THIS_MODULE,
@@ -4094,6 +4161,9 @@ static struct platform_driver mv_platform_driver = {
4094#ifdef CONFIG_PCI 4161#ifdef CONFIG_PCI
4095static int mv_pci_init_one(struct pci_dev *pdev, 4162static int mv_pci_init_one(struct pci_dev *pdev,
4096 const struct pci_device_id *ent); 4163 const struct pci_device_id *ent);
4164#ifdef CONFIG_PM
4165static int mv_pci_device_resume(struct pci_dev *pdev);
4166#endif
4097 4167
4098 4168
4099static struct pci_driver mv_pci_driver = { 4169static struct pci_driver mv_pci_driver = {
@@ -4101,6 +4171,11 @@ static struct pci_driver mv_pci_driver = {
4101 .id_table = mv_pci_tbl, 4171 .id_table = mv_pci_tbl,
4102 .probe = mv_pci_init_one, 4172 .probe = mv_pci_init_one,
4103 .remove = ata_pci_remove_one, 4173 .remove = ata_pci_remove_one,
4174#ifdef CONFIG_PM
4175 .suspend = ata_pci_device_suspend,
4176 .resume = mv_pci_device_resume,
4177#endif
4178
4104}; 4179};
4105 4180
4106/* move to PCI layer or libata core? */ 4181/* move to PCI layer or libata core? */
@@ -4194,7 +4269,7 @@ static int mv_pci_init_one(struct pci_dev *pdev,
4194 const struct ata_port_info *ppi[] = { &mv_port_info[board_idx], NULL }; 4269 const struct ata_port_info *ppi[] = { &mv_port_info[board_idx], NULL };
4195 struct ata_host *host; 4270 struct ata_host *host;
4196 struct mv_host_priv *hpriv; 4271 struct mv_host_priv *hpriv;
4197 int n_ports, rc; 4272 int n_ports, port, rc;
4198 4273
4199 if (!printed_version++) 4274 if (!printed_version++)
4200 dev_printk(KERN_INFO, &pdev->dev, "version " DRV_VERSION "\n"); 4275 dev_printk(KERN_INFO, &pdev->dev, "version " DRV_VERSION "\n");
@@ -4208,6 +4283,7 @@ static int mv_pci_init_one(struct pci_dev *pdev,
4208 return -ENOMEM; 4283 return -ENOMEM;
4209 host->private_data = hpriv; 4284 host->private_data = hpriv;
4210 hpriv->n_ports = n_ports; 4285 hpriv->n_ports = n_ports;
4286 hpriv->board_idx = board_idx;
4211 4287
4212 /* acquire resources */ 4288 /* acquire resources */
4213 rc = pcim_enable_device(pdev); 4289 rc = pcim_enable_device(pdev);
@@ -4230,8 +4306,17 @@ static int mv_pci_init_one(struct pci_dev *pdev,
4230 if (rc) 4306 if (rc)
4231 return rc; 4307 return rc;
4232 4308
4309 for (port = 0; port < host->n_ports; port++) {
4310 struct ata_port *ap = host->ports[port];
4311 void __iomem *port_mmio = mv_port_base(hpriv->base, port);
4312 unsigned int offset = port_mmio - hpriv->base;
4313
4314 ata_port_pbar_desc(ap, MV_PRIMARY_BAR, -1, "mmio");
4315 ata_port_pbar_desc(ap, MV_PRIMARY_BAR, offset, "port");
4316 }
4317
4233 /* initialize adapter */ 4318 /* initialize adapter */
4234 rc = mv_init_host(host, board_idx); 4319 rc = mv_init_host(host);
4235 if (rc) 4320 if (rc)
4236 return rc; 4321 return rc;
4237 4322
@@ -4247,6 +4332,27 @@ static int mv_pci_init_one(struct pci_dev *pdev,
4247 return ata_host_activate(host, pdev->irq, mv_interrupt, IRQF_SHARED, 4332 return ata_host_activate(host, pdev->irq, mv_interrupt, IRQF_SHARED,
4248 IS_GEN_I(hpriv) ? &mv5_sht : &mv6_sht); 4333 IS_GEN_I(hpriv) ? &mv5_sht : &mv6_sht);
4249} 4334}
4335
4336#ifdef CONFIG_PM
4337static int mv_pci_device_resume(struct pci_dev *pdev)
4338{
4339 struct ata_host *host = dev_get_drvdata(&pdev->dev);
4340 int rc;
4341
4342 rc = ata_pci_device_do_resume(pdev);
4343 if (rc)
4344 return rc;
4345
4346 /* initialize adapter */
4347 rc = mv_init_host(host);
4348 if (rc)
4349 return rc;
4350
4351 ata_host_resume(host);
4352
4353 return 0;
4354}
4355#endif
4250#endif 4356#endif
4251 4357
4252static int mv_platform_probe(struct platform_device *pdev); 4358static int mv_platform_probe(struct platform_device *pdev);
diff --git a/drivers/ata/sata_promise.c b/drivers/ata/sata_promise.c
index 07d8d00b4d34..63306285c843 100644
--- a/drivers/ata/sata_promise.c
+++ b/drivers/ata/sata_promise.c
@@ -862,7 +862,7 @@ static void pdc_error_intr(struct ata_port *ap, struct ata_queued_cmd *qc,
862 if (port_status & PDC_DRIVE_ERR) 862 if (port_status & PDC_DRIVE_ERR)
863 ac_err_mask |= AC_ERR_DEV; 863 ac_err_mask |= AC_ERR_DEV;
864 if (port_status & (PDC_OVERRUN_ERR | PDC_UNDERRUN_ERR)) 864 if (port_status & (PDC_OVERRUN_ERR | PDC_UNDERRUN_ERR))
865 ac_err_mask |= AC_ERR_HSM; 865 ac_err_mask |= AC_ERR_OTHER;
866 if (port_status & (PDC2_ATA_HBA_ERR | PDC2_ATA_DMA_CNT_ERR)) 866 if (port_status & (PDC2_ATA_HBA_ERR | PDC2_ATA_DMA_CNT_ERR))
867 ac_err_mask |= AC_ERR_ATA_BUS; 867 ac_err_mask |= AC_ERR_ATA_BUS;
868 if (port_status & (PDC_PH_ERR | PDC_SH_ERR | PDC_DH_ERR | PDC2_HTO_ERR 868 if (port_status & (PDC_PH_ERR | PDC_SH_ERR | PDC_DH_ERR | PDC2_HTO_ERR
diff --git a/drivers/atm/iphase.c b/drivers/atm/iphase.c
index f734b345ac71..25a4c86f839b 100644
--- a/drivers/atm/iphase.c
+++ b/drivers/atm/iphase.c
@@ -557,7 +557,7 @@ static int ia_cbr_setup (IADEV *dev, struct atm_vcc *vcc) {
557 memcpy((caddr_t)&cbrVC,(caddr_t)TstSchedTbl,sizeof(cbrVC)); 557 memcpy((caddr_t)&cbrVC,(caddr_t)TstSchedTbl,sizeof(cbrVC));
558 } /* while */ 558 } /* while */
559 // Move this VCI number into this location of the CBR Sched table. 559 // Move this VCI number into this location of the CBR Sched table.
560 memcpy((caddr_t)TstSchedTbl, (caddr_t)&vcIndex,sizeof(TstSchedTbl)); 560 memcpy((caddr_t)TstSchedTbl, (caddr_t)&vcIndex, sizeof(*TstSchedTbl));
561 dev->CbrRemEntries--; 561 dev->CbrRemEntries--;
562 toBeAssigned--; 562 toBeAssigned--;
563 } /* while */ 563 } /* while */
diff --git a/drivers/base/bus.c b/drivers/base/bus.c
index 63c143e54a57..c0c5a43d9fb3 100644
--- a/drivers/base/bus.c
+++ b/drivers/base/bus.c
@@ -703,9 +703,9 @@ int bus_add_driver(struct device_driver *drv)
703 return 0; 703 return 0;
704 704
705out_unregister: 705out_unregister:
706 kobject_put(&priv->kobj);
706 kfree(drv->p); 707 kfree(drv->p);
707 drv->p = NULL; 708 drv->p = NULL;
708 kobject_put(&priv->kobj);
709out_put_bus: 709out_put_bus:
710 bus_put(bus); 710 bus_put(bus);
711 return error; 711 return error;
diff --git a/drivers/base/class.c b/drivers/base/class.c
index 161746deab4b..6e2c3b064f53 100644
--- a/drivers/base/class.c
+++ b/drivers/base/class.c
@@ -59,6 +59,8 @@ static void class_release(struct kobject *kobj)
59 else 59 else
60 pr_debug("class '%s' does not have a release() function, " 60 pr_debug("class '%s' does not have a release() function, "
61 "be careful\n", class->name); 61 "be careful\n", class->name);
62
63 kfree(cp);
62} 64}
63 65
64static struct sysfs_ops class_sysfs_ops = { 66static struct sysfs_ops class_sysfs_ops = {
diff --git a/drivers/base/core.c b/drivers/base/core.c
index f1290cbd1350..282025770429 100644
--- a/drivers/base/core.c
+++ b/drivers/base/core.c
@@ -446,7 +446,8 @@ struct kset *devices_kset;
446 * @dev: device. 446 * @dev: device.
447 * @attr: device attribute descriptor. 447 * @attr: device attribute descriptor.
448 */ 448 */
449int device_create_file(struct device *dev, struct device_attribute *attr) 449int device_create_file(struct device *dev,
450 const struct device_attribute *attr)
450{ 451{
451 int error = 0; 452 int error = 0;
452 if (dev) 453 if (dev)
@@ -459,7 +460,8 @@ int device_create_file(struct device *dev, struct device_attribute *attr)
459 * @dev: device. 460 * @dev: device.
460 * @attr: device attribute descriptor. 461 * @attr: device attribute descriptor.
461 */ 462 */
462void device_remove_file(struct device *dev, struct device_attribute *attr) 463void device_remove_file(struct device *dev,
464 const struct device_attribute *attr)
463{ 465{
464 if (dev) 466 if (dev)
465 sysfs_remove_file(&dev->kobj, &attr->attr); 467 sysfs_remove_file(&dev->kobj, &attr->attr);
@@ -470,7 +472,8 @@ void device_remove_file(struct device *dev, struct device_attribute *attr)
470 * @dev: device. 472 * @dev: device.
471 * @attr: device binary attribute descriptor. 473 * @attr: device binary attribute descriptor.
472 */ 474 */
473int device_create_bin_file(struct device *dev, struct bin_attribute *attr) 475int device_create_bin_file(struct device *dev,
476 const struct bin_attribute *attr)
474{ 477{
475 int error = -EINVAL; 478 int error = -EINVAL;
476 if (dev) 479 if (dev)
@@ -484,7 +487,8 @@ EXPORT_SYMBOL_GPL(device_create_bin_file);
484 * @dev: device. 487 * @dev: device.
485 * @attr: device binary attribute descriptor. 488 * @attr: device binary attribute descriptor.
486 */ 489 */
487void device_remove_bin_file(struct device *dev, struct bin_attribute *attr) 490void device_remove_bin_file(struct device *dev,
491 const struct bin_attribute *attr)
488{ 492{
489 if (dev) 493 if (dev)
490 sysfs_remove_bin_file(&dev->kobj, attr); 494 sysfs_remove_bin_file(&dev->kobj, attr);
@@ -905,8 +909,10 @@ int device_add(struct device *dev)
905 dev->init_name = NULL; 909 dev->init_name = NULL;
906 } 910 }
907 911
908 if (!dev_name(dev)) 912 if (!dev_name(dev)) {
913 error = -EINVAL;
909 goto name_error; 914 goto name_error;
915 }
910 916
911 pr_debug("device: '%s': %s\n", dev_name(dev), __func__); 917 pr_debug("device: '%s': %s\n", dev_name(dev), __func__);
912 918
diff --git a/drivers/base/devtmpfs.c b/drivers/base/devtmpfs.c
index 50375bb8e51d..42ae452b36b0 100644
--- a/drivers/base/devtmpfs.c
+++ b/drivers/base/devtmpfs.c
@@ -32,7 +32,7 @@ static int dev_mount = 1;
32static int dev_mount; 32static int dev_mount;
33#endif 33#endif
34 34
35static rwlock_t dirlock; 35static DEFINE_MUTEX(dirlock);
36 36
37static int __init mount_param(char *str) 37static int __init mount_param(char *str)
38{ 38{
@@ -93,7 +93,7 @@ static int create_path(const char *nodepath)
93{ 93{
94 int err; 94 int err;
95 95
96 read_lock(&dirlock); 96 mutex_lock(&dirlock);
97 err = dev_mkdir(nodepath, 0755); 97 err = dev_mkdir(nodepath, 0755);
98 if (err == -ENOENT) { 98 if (err == -ENOENT) {
99 char *path; 99 char *path;
@@ -101,8 +101,10 @@ static int create_path(const char *nodepath)
101 101
102 /* parent directories do not exist, create them */ 102 /* parent directories do not exist, create them */
103 path = kstrdup(nodepath, GFP_KERNEL); 103 path = kstrdup(nodepath, GFP_KERNEL);
104 if (!path) 104 if (!path) {
105 return -ENOMEM; 105 err = -ENOMEM;
106 goto out;
107 }
106 s = path; 108 s = path;
107 for (;;) { 109 for (;;) {
108 s = strchr(s, '/'); 110 s = strchr(s, '/');
@@ -117,7 +119,8 @@ static int create_path(const char *nodepath)
117 } 119 }
118 kfree(path); 120 kfree(path);
119 } 121 }
120 read_unlock(&dirlock); 122out:
123 mutex_unlock(&dirlock);
121 return err; 124 return err;
122} 125}
123 126
@@ -229,7 +232,7 @@ static int delete_path(const char *nodepath)
229 if (!path) 232 if (!path)
230 return -ENOMEM; 233 return -ENOMEM;
231 234
232 write_lock(&dirlock); 235 mutex_lock(&dirlock);
233 for (;;) { 236 for (;;) {
234 char *base; 237 char *base;
235 238
@@ -241,7 +244,7 @@ static int delete_path(const char *nodepath)
241 if (err) 244 if (err)
242 break; 245 break;
243 } 246 }
244 write_unlock(&dirlock); 247 mutex_unlock(&dirlock);
245 248
246 kfree(path); 249 kfree(path);
247 return err; 250 return err;
@@ -351,8 +354,7 @@ int __init devtmpfs_init(void)
351{ 354{
352 int err; 355 int err;
353 struct vfsmount *mnt; 356 struct vfsmount *mnt;
354 357 char options[] = "mode=0755";
355 rwlock_init(&dirlock);
356 358
357 err = register_filesystem(&dev_fs_type); 359 err = register_filesystem(&dev_fs_type);
358 if (err) { 360 if (err) {
@@ -361,7 +363,7 @@ int __init devtmpfs_init(void)
361 return err; 363 return err;
362 } 364 }
363 365
364 mnt = kern_mount_data(&dev_fs_type, "mode=0755"); 366 mnt = kern_mount_data(&dev_fs_type, options);
365 if (IS_ERR(mnt)) { 367 if (IS_ERR(mnt)) {
366 err = PTR_ERR(mnt); 368 err = PTR_ERR(mnt);
367 printk(KERN_ERR "devtmpfs: unable to create devtmpfs %i\n", err); 369 printk(KERN_ERR "devtmpfs: unable to create devtmpfs %i\n", err);
diff --git a/drivers/base/driver.c b/drivers/base/driver.c
index f367885a7646..90c9fff09ead 100644
--- a/drivers/base/driver.c
+++ b/drivers/base/driver.c
@@ -98,7 +98,7 @@ EXPORT_SYMBOL_GPL(driver_find_device);
98 * @attr: driver attribute descriptor. 98 * @attr: driver attribute descriptor.
99 */ 99 */
100int driver_create_file(struct device_driver *drv, 100int driver_create_file(struct device_driver *drv,
101 struct driver_attribute *attr) 101 const struct driver_attribute *attr)
102{ 102{
103 int error; 103 int error;
104 if (drv) 104 if (drv)
@@ -115,7 +115,7 @@ EXPORT_SYMBOL_GPL(driver_create_file);
115 * @attr: driver attribute descriptor. 115 * @attr: driver attribute descriptor.
116 */ 116 */
117void driver_remove_file(struct device_driver *drv, 117void driver_remove_file(struct device_driver *drv,
118 struct driver_attribute *attr) 118 const struct driver_attribute *attr)
119{ 119{
120 if (drv) 120 if (drv)
121 sysfs_remove_file(&drv->p->kobj, &attr->attr); 121 sysfs_remove_file(&drv->p->kobj, &attr->attr);
diff --git a/drivers/base/memory.c b/drivers/base/memory.c
index 989429cfed88..bd025059711f 100644
--- a/drivers/base/memory.c
+++ b/drivers/base/memory.c
@@ -63,6 +63,20 @@ void unregister_memory_notifier(struct notifier_block *nb)
63} 63}
64EXPORT_SYMBOL(unregister_memory_notifier); 64EXPORT_SYMBOL(unregister_memory_notifier);
65 65
66static ATOMIC_NOTIFIER_HEAD(memory_isolate_chain);
67
68int register_memory_isolate_notifier(struct notifier_block *nb)
69{
70 return atomic_notifier_chain_register(&memory_isolate_chain, nb);
71}
72EXPORT_SYMBOL(register_memory_isolate_notifier);
73
74void unregister_memory_isolate_notifier(struct notifier_block *nb)
75{
76 atomic_notifier_chain_unregister(&memory_isolate_chain, nb);
77}
78EXPORT_SYMBOL(unregister_memory_isolate_notifier);
79
66/* 80/*
67 * register_memory - Setup a sysfs device for a memory block 81 * register_memory - Setup a sysfs device for a memory block
68 */ 82 */
@@ -157,6 +171,11 @@ int memory_notify(unsigned long val, void *v)
157 return blocking_notifier_call_chain(&memory_chain, val, v); 171 return blocking_notifier_call_chain(&memory_chain, val, v);
158} 172}
159 173
174int memory_isolate_notify(unsigned long val, void *v)
175{
176 return atomic_notifier_call_chain(&memory_isolate_chain, val, v);
177}
178
160/* 179/*
161 * MEMORY_HOTPLUG depends on SPARSEMEM in mm/Kconfig, so it is 180 * MEMORY_HOTPLUG depends on SPARSEMEM in mm/Kconfig, so it is
162 * OK to have direct references to sparsemem variables in here. 181 * OK to have direct references to sparsemem variables in here.
@@ -292,7 +311,7 @@ static SYSDEV_ATTR(removable, 0444, show_mem_removable, NULL);
292static ssize_t 311static ssize_t
293print_block_size(struct class *class, char *buf) 312print_block_size(struct class *class, char *buf)
294{ 313{
295 return sprintf(buf, "%lx\n", (unsigned long)PAGES_PER_SECTION * PAGE_SIZE); 314 return sprintf(buf, "%#lx\n", (unsigned long)PAGES_PER_SECTION * PAGE_SIZE);
296} 315}
297 316
298static CLASS_ATTR(block_size_bytes, 0444, print_block_size, NULL); 317static CLASS_ATTR(block_size_bytes, 0444, print_block_size, NULL);
@@ -341,6 +360,64 @@ static inline int memory_probe_init(void)
341} 360}
342#endif 361#endif
343 362
363#ifdef CONFIG_MEMORY_FAILURE
364/*
365 * Support for offlining pages of memory
366 */
367
368/* Soft offline a page */
369static ssize_t
370store_soft_offline_page(struct class *class, const char *buf, size_t count)
371{
372 int ret;
373 u64 pfn;
374 if (!capable(CAP_SYS_ADMIN))
375 return -EPERM;
376 if (strict_strtoull(buf, 0, &pfn) < 0)
377 return -EINVAL;
378 pfn >>= PAGE_SHIFT;
379 if (!pfn_valid(pfn))
380 return -ENXIO;
381 ret = soft_offline_page(pfn_to_page(pfn), 0);
382 return ret == 0 ? count : ret;
383}
384
385/* Forcibly offline a page, including killing processes. */
386static ssize_t
387store_hard_offline_page(struct class *class, const char *buf, size_t count)
388{
389 int ret;
390 u64 pfn;
391 if (!capable(CAP_SYS_ADMIN))
392 return -EPERM;
393 if (strict_strtoull(buf, 0, &pfn) < 0)
394 return -EINVAL;
395 pfn >>= PAGE_SHIFT;
396 ret = __memory_failure(pfn, 0, 0);
397 return ret ? ret : count;
398}
399
400static CLASS_ATTR(soft_offline_page, 0644, NULL, store_soft_offline_page);
401static CLASS_ATTR(hard_offline_page, 0644, NULL, store_hard_offline_page);
402
403static __init int memory_fail_init(void)
404{
405 int err;
406
407 err = sysfs_create_file(&memory_sysdev_class.kset.kobj,
408 &class_attr_soft_offline_page.attr);
409 if (!err)
410 err = sysfs_create_file(&memory_sysdev_class.kset.kobj,
411 &class_attr_hard_offline_page.attr);
412 return err;
413}
414#else
415static inline int memory_fail_init(void)
416{
417 return 0;
418}
419#endif
420
344/* 421/*
345 * Note that phys_device is optional. It is here to allow for 422 * Note that phys_device is optional. It is here to allow for
346 * differentiation between which *physical* devices each 423 * differentiation between which *physical* devices each
@@ -473,6 +550,9 @@ int __init memory_dev_init(void)
473 err = memory_probe_init(); 550 err = memory_probe_init();
474 if (!ret) 551 if (!ret)
475 ret = err; 552 ret = err;
553 err = memory_fail_init();
554 if (!ret)
555 ret = err;
476 err = block_size_init(); 556 err = block_size_init();
477 if (!ret) 557 if (!ret)
478 ret = err; 558 ret = err;
diff --git a/drivers/base/platform.c b/drivers/base/platform.c
index 9d2ee25deaf5..58efaf2f1259 100644
--- a/drivers/base/platform.c
+++ b/drivers/base/platform.c
@@ -441,6 +441,7 @@ error:
441 platform_device_put(pdev); 441 platform_device_put(pdev);
442 return ERR_PTR(retval); 442 return ERR_PTR(retval);
443} 443}
444EXPORT_SYMBOL_GPL(platform_device_register_data);
444 445
445static int platform_drv_probe(struct device *_dev) 446static int platform_drv_probe(struct device *_dev)
446{ 447{
diff --git a/drivers/base/power/main.c b/drivers/base/power/main.c
index 8aa2443182d5..a5142bddef41 100644
--- a/drivers/base/power/main.c
+++ b/drivers/base/power/main.c
@@ -23,8 +23,8 @@
23#include <linux/pm.h> 23#include <linux/pm.h>
24#include <linux/pm_runtime.h> 24#include <linux/pm_runtime.h>
25#include <linux/resume-trace.h> 25#include <linux/resume-trace.h>
26#include <linux/rwsem.h>
27#include <linux/interrupt.h> 26#include <linux/interrupt.h>
27#include <linux/sched.h>
28 28
29#include "../base.h" 29#include "../base.h"
30#include "power.h" 30#include "power.h"
@@ -161,6 +161,32 @@ void device_pm_move_last(struct device *dev)
161 list_move_tail(&dev->power.entry, &dpm_list); 161 list_move_tail(&dev->power.entry, &dpm_list);
162} 162}
163 163
164static ktime_t initcall_debug_start(struct device *dev)
165{
166 ktime_t calltime = ktime_set(0, 0);
167
168 if (initcall_debug) {
169 pr_info("calling %s+ @ %i\n",
170 dev_name(dev), task_pid_nr(current));
171 calltime = ktime_get();
172 }
173
174 return calltime;
175}
176
177static void initcall_debug_report(struct device *dev, ktime_t calltime,
178 int error)
179{
180 ktime_t delta, rettime;
181
182 if (initcall_debug) {
183 rettime = ktime_get();
184 delta = ktime_sub(rettime, calltime);
185 pr_info("call %s+ returned %d after %Ld usecs\n", dev_name(dev),
186 error, (unsigned long long)ktime_to_ns(delta) >> 10);
187 }
188}
189
164/** 190/**
165 * pm_op - Execute the PM operation appropriate for given PM event. 191 * pm_op - Execute the PM operation appropriate for given PM event.
166 * @dev: Device to handle. 192 * @dev: Device to handle.
@@ -172,6 +198,9 @@ static int pm_op(struct device *dev,
172 pm_message_t state) 198 pm_message_t state)
173{ 199{
174 int error = 0; 200 int error = 0;
201 ktime_t calltime;
202
203 calltime = initcall_debug_start(dev);
175 204
176 switch (state.event) { 205 switch (state.event) {
177#ifdef CONFIG_SUSPEND 206#ifdef CONFIG_SUSPEND
@@ -219,6 +248,9 @@ static int pm_op(struct device *dev,
219 default: 248 default:
220 error = -EINVAL; 249 error = -EINVAL;
221 } 250 }
251
252 initcall_debug_report(dev, calltime, error);
253
222 return error; 254 return error;
223} 255}
224 256
@@ -236,6 +268,13 @@ static int pm_noirq_op(struct device *dev,
236 pm_message_t state) 268 pm_message_t state)
237{ 269{
238 int error = 0; 270 int error = 0;
271 ktime_t calltime, delta, rettime;
272
273 if (initcall_debug) {
274 pr_info("calling %s_i+ @ %i\n",
275 dev_name(dev), task_pid_nr(current));
276 calltime = ktime_get();
277 }
239 278
240 switch (state.event) { 279 switch (state.event) {
241#ifdef CONFIG_SUSPEND 280#ifdef CONFIG_SUSPEND
@@ -283,6 +322,15 @@ static int pm_noirq_op(struct device *dev,
283 default: 322 default:
284 error = -EINVAL; 323 error = -EINVAL;
285 } 324 }
325
326 if (initcall_debug) {
327 rettime = ktime_get();
328 delta = ktime_sub(rettime, calltime);
329 printk("initcall %s_i+ returned %d after %Ld usecs\n",
330 dev_name(dev), error,
331 (unsigned long long)ktime_to_ns(delta) >> 10);
332 }
333
286 return error; 334 return error;
287} 335}
288 336
@@ -324,6 +372,23 @@ static void pm_dev_err(struct device *dev, pm_message_t state, char *info,
324 kobject_name(&dev->kobj), pm_verb(state.event), info, error); 372 kobject_name(&dev->kobj), pm_verb(state.event), info, error);
325} 373}
326 374
375static void dpm_show_time(ktime_t starttime, pm_message_t state, char *info)
376{
377 ktime_t calltime;
378 s64 usecs64;
379 int usecs;
380
381 calltime = ktime_get();
382 usecs64 = ktime_to_ns(ktime_sub(calltime, starttime));
383 do_div(usecs64, NSEC_PER_USEC);
384 usecs = usecs64;
385 if (usecs == 0)
386 usecs = 1;
387 pr_info("PM: %s%s%s of devices complete after %ld.%03ld msecs\n",
388 info ?: "", info ? " " : "", pm_verb(state.event),
389 usecs / USEC_PER_MSEC, usecs % USEC_PER_MSEC);
390}
391
327/*------------------------- Resume routines -------------------------*/ 392/*------------------------- Resume routines -------------------------*/
328 393
329/** 394/**
@@ -341,14 +406,11 @@ static int device_resume_noirq(struct device *dev, pm_message_t state)
341 TRACE_DEVICE(dev); 406 TRACE_DEVICE(dev);
342 TRACE_RESUME(0); 407 TRACE_RESUME(0);
343 408
344 if (!dev->bus) 409 if (dev->bus && dev->bus->pm) {
345 goto End;
346
347 if (dev->bus->pm) {
348 pm_dev_dbg(dev, state, "EARLY "); 410 pm_dev_dbg(dev, state, "EARLY ");
349 error = pm_noirq_op(dev, dev->bus->pm, state); 411 error = pm_noirq_op(dev, dev->bus->pm, state);
350 } 412 }
351 End: 413
352 TRACE_RESUME(error); 414 TRACE_RESUME(error);
353 return error; 415 return error;
354} 416}
@@ -363,6 +425,7 @@ static int device_resume_noirq(struct device *dev, pm_message_t state)
363void dpm_resume_noirq(pm_message_t state) 425void dpm_resume_noirq(pm_message_t state)
364{ 426{
365 struct device *dev; 427 struct device *dev;
428 ktime_t starttime = ktime_get();
366 429
367 mutex_lock(&dpm_list_mtx); 430 mutex_lock(&dpm_list_mtx);
368 transition_started = false; 431 transition_started = false;
@@ -376,11 +439,32 @@ void dpm_resume_noirq(pm_message_t state)
376 pm_dev_err(dev, state, " early", error); 439 pm_dev_err(dev, state, " early", error);
377 } 440 }
378 mutex_unlock(&dpm_list_mtx); 441 mutex_unlock(&dpm_list_mtx);
442 dpm_show_time(starttime, state, "early");
379 resume_device_irqs(); 443 resume_device_irqs();
380} 444}
381EXPORT_SYMBOL_GPL(dpm_resume_noirq); 445EXPORT_SYMBOL_GPL(dpm_resume_noirq);
382 446
383/** 447/**
448 * legacy_resume - Execute a legacy (bus or class) resume callback for device.
449 * @dev: Device to resume.
450 * @cb: Resume callback to execute.
451 */
452static int legacy_resume(struct device *dev, int (*cb)(struct device *dev))
453{
454 int error;
455 ktime_t calltime;
456
457 calltime = initcall_debug_start(dev);
458
459 error = cb(dev);
460 suspend_report_result(cb, error);
461
462 initcall_debug_report(dev, calltime, error);
463
464 return error;
465}
466
467/**
384 * device_resume - Execute "resume" callbacks for given device. 468 * device_resume - Execute "resume" callbacks for given device.
385 * @dev: Device to handle. 469 * @dev: Device to handle.
386 * @state: PM transition of the system being carried out. 470 * @state: PM transition of the system being carried out.
@@ -400,7 +484,7 @@ static int device_resume(struct device *dev, pm_message_t state)
400 error = pm_op(dev, dev->bus->pm, state); 484 error = pm_op(dev, dev->bus->pm, state);
401 } else if (dev->bus->resume) { 485 } else if (dev->bus->resume) {
402 pm_dev_dbg(dev, state, "legacy "); 486 pm_dev_dbg(dev, state, "legacy ");
403 error = dev->bus->resume(dev); 487 error = legacy_resume(dev, dev->bus->resume);
404 } 488 }
405 if (error) 489 if (error)
406 goto End; 490 goto End;
@@ -421,7 +505,7 @@ static int device_resume(struct device *dev, pm_message_t state)
421 error = pm_op(dev, dev->class->pm, state); 505 error = pm_op(dev, dev->class->pm, state);
422 } else if (dev->class->resume) { 506 } else if (dev->class->resume) {
423 pm_dev_dbg(dev, state, "legacy class "); 507 pm_dev_dbg(dev, state, "legacy class ");
424 error = dev->class->resume(dev); 508 error = legacy_resume(dev, dev->class->resume);
425 } 509 }
426 } 510 }
427 End: 511 End:
@@ -441,6 +525,7 @@ static int device_resume(struct device *dev, pm_message_t state)
441static void dpm_resume(pm_message_t state) 525static void dpm_resume(pm_message_t state)
442{ 526{
443 struct list_head list; 527 struct list_head list;
528 ktime_t starttime = ktime_get();
444 529
445 INIT_LIST_HEAD(&list); 530 INIT_LIST_HEAD(&list);
446 mutex_lock(&dpm_list_mtx); 531 mutex_lock(&dpm_list_mtx);
@@ -469,6 +554,7 @@ static void dpm_resume(pm_message_t state)
469 } 554 }
470 list_splice(&list, &dpm_list); 555 list_splice(&list, &dpm_list);
471 mutex_unlock(&dpm_list_mtx); 556 mutex_unlock(&dpm_list_mtx);
557 dpm_show_time(starttime, state, NULL);
472} 558}
473 559
474/** 560/**
@@ -521,7 +607,7 @@ static void dpm_complete(pm_message_t state)
521 mutex_unlock(&dpm_list_mtx); 607 mutex_unlock(&dpm_list_mtx);
522 608
523 device_complete(dev, state); 609 device_complete(dev, state);
524 pm_runtime_put_noidle(dev); 610 pm_runtime_put_sync(dev);
525 611
526 mutex_lock(&dpm_list_mtx); 612 mutex_lock(&dpm_list_mtx);
527 } 613 }
@@ -584,10 +670,7 @@ static int device_suspend_noirq(struct device *dev, pm_message_t state)
584{ 670{
585 int error = 0; 671 int error = 0;
586 672
587 if (!dev->bus) 673 if (dev->bus && dev->bus->pm) {
588 return 0;
589
590 if (dev->bus->pm) {
591 pm_dev_dbg(dev, state, "LATE "); 674 pm_dev_dbg(dev, state, "LATE ");
592 error = pm_noirq_op(dev, dev->bus->pm, state); 675 error = pm_noirq_op(dev, dev->bus->pm, state);
593 } 676 }
@@ -604,6 +687,7 @@ static int device_suspend_noirq(struct device *dev, pm_message_t state)
604int dpm_suspend_noirq(pm_message_t state) 687int dpm_suspend_noirq(pm_message_t state)
605{ 688{
606 struct device *dev; 689 struct device *dev;
690 ktime_t starttime = ktime_get();
607 int error = 0; 691 int error = 0;
608 692
609 suspend_device_irqs(); 693 suspend_device_irqs();
@@ -619,11 +703,35 @@ int dpm_suspend_noirq(pm_message_t state)
619 mutex_unlock(&dpm_list_mtx); 703 mutex_unlock(&dpm_list_mtx);
620 if (error) 704 if (error)
621 dpm_resume_noirq(resume_event(state)); 705 dpm_resume_noirq(resume_event(state));
706 else
707 dpm_show_time(starttime, state, "late");
622 return error; 708 return error;
623} 709}
624EXPORT_SYMBOL_GPL(dpm_suspend_noirq); 710EXPORT_SYMBOL_GPL(dpm_suspend_noirq);
625 711
626/** 712/**
713 * legacy_suspend - Execute a legacy (bus or class) suspend callback for device.
714 * @dev: Device to suspend.
715 * @state: PM transition of the system being carried out.
716 * @cb: Suspend callback to execute.
717 */
718static int legacy_suspend(struct device *dev, pm_message_t state,
719 int (*cb)(struct device *dev, pm_message_t state))
720{
721 int error;
722 ktime_t calltime;
723
724 calltime = initcall_debug_start(dev);
725
726 error = cb(dev, state);
727 suspend_report_result(cb, error);
728
729 initcall_debug_report(dev, calltime, error);
730
731 return error;
732}
733
734/**
627 * device_suspend - Execute "suspend" callbacks for given device. 735 * device_suspend - Execute "suspend" callbacks for given device.
628 * @dev: Device to handle. 736 * @dev: Device to handle.
629 * @state: PM transition of the system being carried out. 737 * @state: PM transition of the system being carried out.
@@ -640,8 +748,7 @@ static int device_suspend(struct device *dev, pm_message_t state)
640 error = pm_op(dev, dev->class->pm, state); 748 error = pm_op(dev, dev->class->pm, state);
641 } else if (dev->class->suspend) { 749 } else if (dev->class->suspend) {
642 pm_dev_dbg(dev, state, "legacy class "); 750 pm_dev_dbg(dev, state, "legacy class ");
643 error = dev->class->suspend(dev, state); 751 error = legacy_suspend(dev, state, dev->class->suspend);
644 suspend_report_result(dev->class->suspend, error);
645 } 752 }
646 if (error) 753 if (error)
647 goto End; 754 goto End;
@@ -662,8 +769,7 @@ static int device_suspend(struct device *dev, pm_message_t state)
662 error = pm_op(dev, dev->bus->pm, state); 769 error = pm_op(dev, dev->bus->pm, state);
663 } else if (dev->bus->suspend) { 770 } else if (dev->bus->suspend) {
664 pm_dev_dbg(dev, state, "legacy "); 771 pm_dev_dbg(dev, state, "legacy ");
665 error = dev->bus->suspend(dev, state); 772 error = legacy_suspend(dev, state, dev->bus->suspend);
666 suspend_report_result(dev->bus->suspend, error);
667 } 773 }
668 } 774 }
669 End: 775 End:
@@ -679,6 +785,7 @@ static int device_suspend(struct device *dev, pm_message_t state)
679static int dpm_suspend(pm_message_t state) 785static int dpm_suspend(pm_message_t state)
680{ 786{
681 struct list_head list; 787 struct list_head list;
788 ktime_t starttime = ktime_get();
682 int error = 0; 789 int error = 0;
683 790
684 INIT_LIST_HEAD(&list); 791 INIT_LIST_HEAD(&list);
@@ -704,6 +811,8 @@ static int dpm_suspend(pm_message_t state)
704 } 811 }
705 list_splice(&list, dpm_list.prev); 812 list_splice(&list, dpm_list.prev);
706 mutex_unlock(&dpm_list_mtx); 813 mutex_unlock(&dpm_list_mtx);
814 if (!error)
815 dpm_show_time(starttime, state, NULL);
707 return error; 816 return error;
708} 817}
709 818
@@ -772,7 +881,7 @@ static int dpm_prepare(pm_message_t state)
772 pm_runtime_get_noresume(dev); 881 pm_runtime_get_noresume(dev);
773 if (pm_runtime_barrier(dev) && device_may_wakeup(dev)) { 882 if (pm_runtime_barrier(dev) && device_may_wakeup(dev)) {
774 /* Wake-up requested during system sleep transition. */ 883 /* Wake-up requested during system sleep transition. */
775 pm_runtime_put_noidle(dev); 884 pm_runtime_put_sync(dev);
776 error = -EBUSY; 885 error = -EBUSY;
777 } else { 886 } else {
778 error = device_prepare(dev, state); 887 error = device_prepare(dev, state);
diff --git a/drivers/base/power/runtime.c b/drivers/base/power/runtime.c
index 5a01ecef4af3..f8b044e8aef7 100644
--- a/drivers/base/power/runtime.c
+++ b/drivers/base/power/runtime.c
@@ -85,6 +85,19 @@ static int __pm_runtime_idle(struct device *dev)
85 dev->bus->pm->runtime_idle(dev); 85 dev->bus->pm->runtime_idle(dev);
86 86
87 spin_lock_irq(&dev->power.lock); 87 spin_lock_irq(&dev->power.lock);
88 } else if (dev->type && dev->type->pm && dev->type->pm->runtime_idle) {
89 spin_unlock_irq(&dev->power.lock);
90
91 dev->type->pm->runtime_idle(dev);
92
93 spin_lock_irq(&dev->power.lock);
94 } else if (dev->class && dev->class->pm
95 && dev->class->pm->runtime_idle) {
96 spin_unlock_irq(&dev->power.lock);
97
98 dev->class->pm->runtime_idle(dev);
99
100 spin_lock_irq(&dev->power.lock);
88 } 101 }
89 102
90 dev->power.idle_notification = false; 103 dev->power.idle_notification = false;
@@ -194,6 +207,22 @@ int __pm_runtime_suspend(struct device *dev, bool from_wq)
194 207
195 spin_lock_irq(&dev->power.lock); 208 spin_lock_irq(&dev->power.lock);
196 dev->power.runtime_error = retval; 209 dev->power.runtime_error = retval;
210 } else if (dev->type && dev->type->pm
211 && dev->type->pm->runtime_suspend) {
212 spin_unlock_irq(&dev->power.lock);
213
214 retval = dev->type->pm->runtime_suspend(dev);
215
216 spin_lock_irq(&dev->power.lock);
217 dev->power.runtime_error = retval;
218 } else if (dev->class && dev->class->pm
219 && dev->class->pm->runtime_suspend) {
220 spin_unlock_irq(&dev->power.lock);
221
222 retval = dev->class->pm->runtime_suspend(dev);
223
224 spin_lock_irq(&dev->power.lock);
225 dev->power.runtime_error = retval;
197 } else { 226 } else {
198 retval = -ENOSYS; 227 retval = -ENOSYS;
199 } 228 }
@@ -359,6 +388,22 @@ int __pm_runtime_resume(struct device *dev, bool from_wq)
359 388
360 spin_lock_irq(&dev->power.lock); 389 spin_lock_irq(&dev->power.lock);
361 dev->power.runtime_error = retval; 390 dev->power.runtime_error = retval;
391 } else if (dev->type && dev->type->pm
392 && dev->type->pm->runtime_resume) {
393 spin_unlock_irq(&dev->power.lock);
394
395 retval = dev->type->pm->runtime_resume(dev);
396
397 spin_lock_irq(&dev->power.lock);
398 dev->power.runtime_error = retval;
399 } else if (dev->class && dev->class->pm
400 && dev->class->pm->runtime_resume) {
401 spin_unlock_irq(&dev->power.lock);
402
403 retval = dev->class->pm->runtime_resume(dev);
404
405 spin_lock_irq(&dev->power.lock);
406 dev->power.runtime_error = retval;
362 } else { 407 } else {
363 retval = -ENOSYS; 408 retval = -ENOSYS;
364 } 409 }
@@ -701,15 +746,15 @@ EXPORT_SYMBOL_GPL(pm_request_resume);
701 * @dev: Device to handle. 746 * @dev: Device to handle.
702 * @sync: If set and the device is suspended, resume it synchronously. 747 * @sync: If set and the device is suspended, resume it synchronously.
703 * 748 *
704 * Increment the usage count of the device and if it was zero previously, 749 * Increment the usage count of the device and resume it or submit a resume
705 * resume it or submit a resume request for it, depending on the value of @sync. 750 * request for it, depending on the value of @sync.
706 */ 751 */
707int __pm_runtime_get(struct device *dev, bool sync) 752int __pm_runtime_get(struct device *dev, bool sync)
708{ 753{
709 int retval = 1; 754 int retval;
710 755
711 if (atomic_add_return(1, &dev->power.usage_count) == 1) 756 atomic_inc(&dev->power.usage_count);
712 retval = sync ? pm_runtime_resume(dev) : pm_request_resume(dev); 757 retval = sync ? pm_runtime_resume(dev) : pm_request_resume(dev);
713 758
714 return retval; 759 return retval;
715} 760}
diff --git a/drivers/block/DAC960.c b/drivers/block/DAC960.c
index eb4fa1943944..ce1fa923c414 100644
--- a/drivers/block/DAC960.c
+++ b/drivers/block/DAC960.c
@@ -7101,7 +7101,7 @@ static struct DAC960_privdata DAC960_BA_privdata = {
7101 7101
7102static struct DAC960_privdata DAC960_LP_privdata = { 7102static struct DAC960_privdata DAC960_LP_privdata = {
7103 .HardwareType = DAC960_LP_Controller, 7103 .HardwareType = DAC960_LP_Controller,
7104 .FirmwareType = DAC960_LP_Controller, 7104 .FirmwareType = DAC960_V2_Controller,
7105 .InterruptHandler = DAC960_LP_InterruptHandler, 7105 .InterruptHandler = DAC960_LP_InterruptHandler,
7106 .MemoryWindowSize = DAC960_LP_RegisterWindowSize, 7106 .MemoryWindowSize = DAC960_LP_RegisterWindowSize,
7107}; 7107};
diff --git a/drivers/block/aoe/aoecmd.c b/drivers/block/aoe/aoecmd.c
index 13bb69d2abb3..64a223b0cc22 100644
--- a/drivers/block/aoe/aoecmd.c
+++ b/drivers/block/aoe/aoecmd.c
@@ -735,21 +735,6 @@ diskstats(struct gendisk *disk, struct bio *bio, ulong duration, sector_t sector
735 part_stat_unlock(); 735 part_stat_unlock();
736} 736}
737 737
738/*
739 * Ensure we don't create aliases in VI caches
740 */
741static inline void
742killalias(struct bio *bio)
743{
744 struct bio_vec *bv;
745 int i;
746
747 if (bio_data_dir(bio) == READ)
748 __bio_for_each_segment(bv, bio, i, 0) {
749 flush_dcache_page(bv->bv_page);
750 }
751}
752
753void 738void
754aoecmd_ata_rsp(struct sk_buff *skb) 739aoecmd_ata_rsp(struct sk_buff *skb)
755{ 740{
@@ -871,7 +856,7 @@ aoecmd_ata_rsp(struct sk_buff *skb)
871 if (buf->flags & BUFFL_FAIL) 856 if (buf->flags & BUFFL_FAIL)
872 bio_endio(buf->bio, -EIO); 857 bio_endio(buf->bio, -EIO);
873 else { 858 else {
874 killalias(buf->bio); 859 bio_flush_dcache_pages(buf->bio);
875 bio_endio(buf->bio, 0); 860 bio_endio(buf->bio, 0);
876 } 861 }
877 mempool_free(buf, d->bufpool); 862 mempool_free(buf, d->bufpool);
diff --git a/drivers/block/cciss.c b/drivers/block/cciss.c
index 873e594860d3..9291614ac6b7 100644
--- a/drivers/block/cciss.c
+++ b/drivers/block/cciss.c
@@ -337,6 +337,9 @@ static int cciss_seq_show(struct seq_file *seq, void *v)
337 if (*pos > h->highest_lun) 337 if (*pos > h->highest_lun)
338 return 0; 338 return 0;
339 339
340 if (drv == NULL) /* it's possible for h->drv[] to have holes. */
341 return 0;
342
340 if (drv->heads == 0) 343 if (drv->heads == 0)
341 return 0; 344 return 0;
342 345
diff --git a/drivers/block/drbd/Kconfig b/drivers/block/drbd/Kconfig
index f4acd04ebeef..df0983787390 100644
--- a/drivers/block/drbd/Kconfig
+++ b/drivers/block/drbd/Kconfig
@@ -3,7 +3,7 @@
3# 3#
4 4
5comment "DRBD disabled because PROC_FS, INET or CONNECTOR not selected" 5comment "DRBD disabled because PROC_FS, INET or CONNECTOR not selected"
6 depends on !PROC_FS || !INET || !CONNECTOR 6 depends on PROC_FS='n' || INET='n' || CONNECTOR='n'
7 7
8config BLK_DEV_DRBD 8config BLK_DEV_DRBD
9 tristate "DRBD Distributed Replicated Block Device support" 9 tristate "DRBD Distributed Replicated Block Device support"
diff --git a/drivers/block/drbd/drbd_int.h b/drivers/block/drbd/drbd_int.h
index 2312d782fe99..2bf3a6ef3684 100644
--- a/drivers/block/drbd/drbd_int.h
+++ b/drivers/block/drbd/drbd_int.h
@@ -1275,7 +1275,7 @@ struct bm_extent {
1275#if DRBD_MAX_SECTORS_BM < DRBD_MAX_SECTORS_32 1275#if DRBD_MAX_SECTORS_BM < DRBD_MAX_SECTORS_32
1276#define DRBD_MAX_SECTORS DRBD_MAX_SECTORS_BM 1276#define DRBD_MAX_SECTORS DRBD_MAX_SECTORS_BM
1277#define DRBD_MAX_SECTORS_FLEX DRBD_MAX_SECTORS_BM 1277#define DRBD_MAX_SECTORS_FLEX DRBD_MAX_SECTORS_BM
1278#elif !defined(CONFIG_LBD) && BITS_PER_LONG == 32 1278#elif !defined(CONFIG_LBDAF) && BITS_PER_LONG == 32
1279#define DRBD_MAX_SECTORS DRBD_MAX_SECTORS_32 1279#define DRBD_MAX_SECTORS DRBD_MAX_SECTORS_32
1280#define DRBD_MAX_SECTORS_FLEX DRBD_MAX_SECTORS_32 1280#define DRBD_MAX_SECTORS_FLEX DRBD_MAX_SECTORS_32
1281#else 1281#else
@@ -1371,10 +1371,9 @@ extern int is_valid_ar_handle(struct drbd_request *, sector_t);
1371extern void drbd_suspend_io(struct drbd_conf *mdev); 1371extern void drbd_suspend_io(struct drbd_conf *mdev);
1372extern void drbd_resume_io(struct drbd_conf *mdev); 1372extern void drbd_resume_io(struct drbd_conf *mdev);
1373extern char *ppsize(char *buf, unsigned long long size); 1373extern char *ppsize(char *buf, unsigned long long size);
1374extern sector_t drbd_new_dev_size(struct drbd_conf *, 1374extern sector_t drbd_new_dev_size(struct drbd_conf *, struct drbd_backing_dev *, int);
1375 struct drbd_backing_dev *);
1376enum determine_dev_size { dev_size_error = -1, unchanged = 0, shrunk = 1, grew = 2 }; 1375enum determine_dev_size { dev_size_error = -1, unchanged = 0, shrunk = 1, grew = 2 };
1377extern enum determine_dev_size drbd_determin_dev_size(struct drbd_conf *) __must_hold(local); 1376extern enum determine_dev_size drbd_determin_dev_size(struct drbd_conf *, int force) __must_hold(local);
1378extern void resync_after_online_grow(struct drbd_conf *); 1377extern void resync_after_online_grow(struct drbd_conf *);
1379extern void drbd_setup_queue_param(struct drbd_conf *mdev, unsigned int) __must_hold(local); 1378extern void drbd_setup_queue_param(struct drbd_conf *mdev, unsigned int) __must_hold(local);
1380extern int drbd_set_role(struct drbd_conf *mdev, enum drbd_role new_role, 1379extern int drbd_set_role(struct drbd_conf *mdev, enum drbd_role new_role,
@@ -1490,7 +1489,7 @@ void drbd_bump_write_ordering(struct drbd_conf *mdev, enum write_ordering_e wo);
1490 1489
1491/* drbd_proc.c */ 1490/* drbd_proc.c */
1492extern struct proc_dir_entry *drbd_proc; 1491extern struct proc_dir_entry *drbd_proc;
1493extern struct file_operations drbd_proc_fops; 1492extern const struct file_operations drbd_proc_fops;
1494extern const char *drbd_conn_str(enum drbd_conns s); 1493extern const char *drbd_conn_str(enum drbd_conns s);
1495extern const char *drbd_role_str(enum drbd_role s); 1494extern const char *drbd_role_str(enum drbd_role s);
1496 1495
diff --git a/drivers/block/drbd/drbd_main.c b/drivers/block/drbd/drbd_main.c
index 157d1e4343c2..ab871e00ffc5 100644
--- a/drivers/block/drbd/drbd_main.c
+++ b/drivers/block/drbd/drbd_main.c
@@ -27,7 +27,6 @@
27 */ 27 */
28 28
29#include <linux/module.h> 29#include <linux/module.h>
30#include <linux/version.h>
31#include <linux/drbd.h> 30#include <linux/drbd.h>
32#include <asm/uaccess.h> 31#include <asm/uaccess.h>
33#include <asm/types.h> 32#include <asm/types.h>
@@ -151,7 +150,7 @@ wait_queue_head_t drbd_pp_wait;
151 150
152DEFINE_RATELIMIT_STATE(drbd_ratelimit_state, 5 * HZ, 5); 151DEFINE_RATELIMIT_STATE(drbd_ratelimit_state, 5 * HZ, 5);
153 152
154static struct block_device_operations drbd_ops = { 153static const struct block_device_operations drbd_ops = {
155 .owner = THIS_MODULE, 154 .owner = THIS_MODULE,
156 .open = drbd_open, 155 .open = drbd_open,
157 .release = drbd_release, 156 .release = drbd_release,
@@ -1299,6 +1298,7 @@ static void after_state_ch(struct drbd_conf *mdev, union drbd_state os,
1299 dev_err(DEV, "Sending state in drbd_io_error() failed\n"); 1298 dev_err(DEV, "Sending state in drbd_io_error() failed\n");
1300 } 1299 }
1301 1300
1301 wait_event(mdev->misc_wait, !atomic_read(&mdev->local_cnt));
1302 lc_destroy(mdev->resync); 1302 lc_destroy(mdev->resync);
1303 mdev->resync = NULL; 1303 mdev->resync = NULL;
1304 lc_destroy(mdev->act_log); 1304 lc_destroy(mdev->act_log);
@@ -2973,7 +2973,6 @@ struct drbd_conf *drbd_new_device(unsigned int minor)
2973 goto out_no_q; 2973 goto out_no_q;
2974 mdev->rq_queue = q; 2974 mdev->rq_queue = q;
2975 q->queuedata = mdev; 2975 q->queuedata = mdev;
2976 blk_queue_max_segment_size(q, DRBD_MAX_SEGMENT_SIZE);
2977 2976
2978 disk = alloc_disk(1); 2977 disk = alloc_disk(1);
2979 if (!disk) 2978 if (!disk)
@@ -2997,6 +2996,7 @@ struct drbd_conf *drbd_new_device(unsigned int minor)
2997 q->backing_dev_info.congested_data = mdev; 2996 q->backing_dev_info.congested_data = mdev;
2998 2997
2999 blk_queue_make_request(q, drbd_make_request_26); 2998 blk_queue_make_request(q, drbd_make_request_26);
2999 blk_queue_max_segment_size(q, DRBD_MAX_SEGMENT_SIZE);
3000 blk_queue_bounce_limit(q, BLK_BOUNCE_ANY); 3000 blk_queue_bounce_limit(q, BLK_BOUNCE_ANY);
3001 blk_queue_merge_bvec(q, drbd_merge_bvec); 3001 blk_queue_merge_bvec(q, drbd_merge_bvec);
3002 q->queue_lock = &mdev->req_lock; /* needed since we use */ 3002 q->queue_lock = &mdev->req_lock; /* needed since we use */
@@ -3623,7 +3623,7 @@ _drbd_fault_random(struct fault_random_state *rsp)
3623{ 3623{
3624 long refresh; 3624 long refresh;
3625 3625
3626 if (--rsp->count < 0) { 3626 if (!rsp->count--) {
3627 get_random_bytes(&refresh, sizeof(refresh)); 3627 get_random_bytes(&refresh, sizeof(refresh));
3628 rsp->state += refresh; 3628 rsp->state += refresh;
3629 rsp->count = FAULT_RANDOM_REFRESH; 3629 rsp->count = FAULT_RANDOM_REFRESH;
diff --git a/drivers/block/drbd/drbd_nl.c b/drivers/block/drbd/drbd_nl.c
index 4e0726aa53b0..1292e0620663 100644
--- a/drivers/block/drbd/drbd_nl.c
+++ b/drivers/block/drbd/drbd_nl.c
@@ -510,7 +510,7 @@ void drbd_resume_io(struct drbd_conf *mdev)
510 * Returns 0 on success, negative return values indicate errors. 510 * Returns 0 on success, negative return values indicate errors.
511 * You should call drbd_md_sync() after calling this function. 511 * You should call drbd_md_sync() after calling this function.
512 */ 512 */
513enum determine_dev_size drbd_determin_dev_size(struct drbd_conf *mdev) __must_hold(local) 513enum determine_dev_size drbd_determin_dev_size(struct drbd_conf *mdev, int force) __must_hold(local)
514{ 514{
515 sector_t prev_first_sect, prev_size; /* previous meta location */ 515 sector_t prev_first_sect, prev_size; /* previous meta location */
516 sector_t la_size; 516 sector_t la_size;
@@ -541,7 +541,7 @@ enum determine_dev_size drbd_determin_dev_size(struct drbd_conf *mdev) __must_ho
541 /* TODO: should only be some assert here, not (re)init... */ 541 /* TODO: should only be some assert here, not (re)init... */
542 drbd_md_set_sector_offsets(mdev, mdev->ldev); 542 drbd_md_set_sector_offsets(mdev, mdev->ldev);
543 543
544 size = drbd_new_dev_size(mdev, mdev->ldev); 544 size = drbd_new_dev_size(mdev, mdev->ldev, force);
545 545
546 if (drbd_get_capacity(mdev->this_bdev) != size || 546 if (drbd_get_capacity(mdev->this_bdev) != size ||
547 drbd_bm_capacity(mdev) != size) { 547 drbd_bm_capacity(mdev) != size) {
@@ -596,7 +596,7 @@ out:
596} 596}
597 597
598sector_t 598sector_t
599drbd_new_dev_size(struct drbd_conf *mdev, struct drbd_backing_dev *bdev) 599drbd_new_dev_size(struct drbd_conf *mdev, struct drbd_backing_dev *bdev, int assume_peer_has_space)
600{ 600{
601 sector_t p_size = mdev->p_size; /* partner's disk size. */ 601 sector_t p_size = mdev->p_size; /* partner's disk size. */
602 sector_t la_size = bdev->md.la_size_sect; /* last agreed size. */ 602 sector_t la_size = bdev->md.la_size_sect; /* last agreed size. */
@@ -606,6 +606,11 @@ drbd_new_dev_size(struct drbd_conf *mdev, struct drbd_backing_dev *bdev)
606 606
607 m_size = drbd_get_max_capacity(bdev); 607 m_size = drbd_get_max_capacity(bdev);
608 608
609 if (mdev->state.conn < C_CONNECTED && assume_peer_has_space) {
610 dev_warn(DEV, "Resize while not connected was forced by the user!\n");
611 p_size = m_size;
612 }
613
609 if (p_size && m_size) { 614 if (p_size && m_size) {
610 size = min_t(sector_t, p_size, m_size); 615 size = min_t(sector_t, p_size, m_size);
611 } else { 616 } else {
@@ -965,7 +970,7 @@ static int drbd_nl_disk_conf(struct drbd_conf *mdev, struct drbd_nl_cfg_req *nlp
965 970
966 /* Prevent shrinking of consistent devices ! */ 971 /* Prevent shrinking of consistent devices ! */
967 if (drbd_md_test_flag(nbc, MDF_CONSISTENT) && 972 if (drbd_md_test_flag(nbc, MDF_CONSISTENT) &&
968 drbd_new_dev_size(mdev, nbc) < nbc->md.la_size_sect) { 973 drbd_new_dev_size(mdev, nbc, 0) < nbc->md.la_size_sect) {
969 dev_warn(DEV, "refusing to truncate a consistent device\n"); 974 dev_warn(DEV, "refusing to truncate a consistent device\n");
970 retcode = ERR_DISK_TO_SMALL; 975 retcode = ERR_DISK_TO_SMALL;
971 goto force_diskless_dec; 976 goto force_diskless_dec;
@@ -1052,7 +1057,7 @@ static int drbd_nl_disk_conf(struct drbd_conf *mdev, struct drbd_nl_cfg_req *nlp
1052 !drbd_md_test_flag(mdev->ldev, MDF_CONNECTED_IND)) 1057 !drbd_md_test_flag(mdev->ldev, MDF_CONNECTED_IND))
1053 set_bit(USE_DEGR_WFC_T, &mdev->flags); 1058 set_bit(USE_DEGR_WFC_T, &mdev->flags);
1054 1059
1055 dd = drbd_determin_dev_size(mdev); 1060 dd = drbd_determin_dev_size(mdev, 0);
1056 if (dd == dev_size_error) { 1061 if (dd == dev_size_error) {
1057 retcode = ERR_NOMEM_BITMAP; 1062 retcode = ERR_NOMEM_BITMAP;
1058 goto force_diskless_dec; 1063 goto force_diskless_dec;
@@ -1271,7 +1276,7 @@ static int drbd_nl_net_conf(struct drbd_conf *mdev, struct drbd_nl_cfg_req *nlp,
1271 goto fail; 1276 goto fail;
1272 } 1277 }
1273 1278
1274 if (crypto_tfm_alg_type(crypto_hash_tfm(tfm)) != CRYPTO_ALG_TYPE_SHASH) { 1279 if (!drbd_crypto_is_hash(crypto_hash_tfm(tfm))) {
1275 retcode = ERR_AUTH_ALG_ND; 1280 retcode = ERR_AUTH_ALG_ND;
1276 goto fail; 1281 goto fail;
1277 } 1282 }
@@ -1504,7 +1509,7 @@ static int drbd_nl_resize(struct drbd_conf *mdev, struct drbd_nl_cfg_req *nlp,
1504 } 1509 }
1505 1510
1506 mdev->ldev->dc.disk_size = (sector_t)rs.resize_size; 1511 mdev->ldev->dc.disk_size = (sector_t)rs.resize_size;
1507 dd = drbd_determin_dev_size(mdev); 1512 dd = drbd_determin_dev_size(mdev, rs.resize_force);
1508 drbd_md_sync(mdev); 1513 drbd_md_sync(mdev);
1509 put_ldev(mdev); 1514 put_ldev(mdev);
1510 if (dd == dev_size_error) { 1515 if (dd == dev_size_error) {
diff --git a/drivers/block/drbd/drbd_proc.c b/drivers/block/drbd/drbd_proc.c
index bdd0b4943b10..df8ad9660d8f 100644
--- a/drivers/block/drbd/drbd_proc.c
+++ b/drivers/block/drbd/drbd_proc.c
@@ -38,7 +38,7 @@ static int drbd_proc_open(struct inode *inode, struct file *file);
38 38
39 39
40struct proc_dir_entry *drbd_proc; 40struct proc_dir_entry *drbd_proc;
41struct file_operations drbd_proc_fops = { 41const struct file_operations drbd_proc_fops = {
42 .owner = THIS_MODULE, 42 .owner = THIS_MODULE,
43 .open = drbd_proc_open, 43 .open = drbd_proc_open,
44 .read = seq_read, 44 .read = seq_read,
diff --git a/drivers/block/drbd/drbd_receiver.c b/drivers/block/drbd/drbd_receiver.c
index c548f24f54a1..d065c646b35a 100644
--- a/drivers/block/drbd/drbd_receiver.c
+++ b/drivers/block/drbd/drbd_receiver.c
@@ -28,7 +28,6 @@
28#include <asm/uaccess.h> 28#include <asm/uaccess.h>
29#include <net/sock.h> 29#include <net/sock.h>
30 30
31#include <linux/version.h>
32#include <linux/drbd.h> 31#include <linux/drbd.h>
33#include <linux/fs.h> 32#include <linux/fs.h>
34#include <linux/file.h> 33#include <linux/file.h>
@@ -879,9 +878,13 @@ retry:
879 878
880 if (mdev->cram_hmac_tfm) { 879 if (mdev->cram_hmac_tfm) {
881 /* drbd_request_state(mdev, NS(conn, WFAuth)); */ 880 /* drbd_request_state(mdev, NS(conn, WFAuth)); */
882 if (!drbd_do_auth(mdev)) { 881 switch (drbd_do_auth(mdev)) {
882 case -1:
883 dev_err(DEV, "Authentication of peer failed\n"); 883 dev_err(DEV, "Authentication of peer failed\n");
884 return -1; 884 return -1;
885 case 0:
886 dev_err(DEV, "Authentication of peer failed, trying again.\n");
887 return 0;
885 } 888 }
886 } 889 }
887 890
@@ -1202,10 +1205,11 @@ static int receive_Barrier(struct drbd_conf *mdev, struct p_header *h)
1202 1205
1203 case WO_bdev_flush: 1206 case WO_bdev_flush:
1204 case WO_drain_io: 1207 case WO_drain_io:
1205 D_ASSERT(rv == FE_STILL_LIVE); 1208 if (rv == FE_STILL_LIVE) {
1206 set_bit(DE_BARRIER_IN_NEXT_EPOCH_ISSUED, &mdev->current_epoch->flags); 1209 set_bit(DE_BARRIER_IN_NEXT_EPOCH_ISSUED, &mdev->current_epoch->flags);
1207 drbd_wait_ee_list_empty(mdev, &mdev->active_ee); 1210 drbd_wait_ee_list_empty(mdev, &mdev->active_ee);
1208 rv = drbd_flush_after_epoch(mdev, mdev->current_epoch); 1211 rv = drbd_flush_after_epoch(mdev, mdev->current_epoch);
1212 }
1209 if (rv == FE_RECYCLED) 1213 if (rv == FE_RECYCLED)
1210 return TRUE; 1214 return TRUE;
1211 1215
@@ -1220,7 +1224,7 @@ static int receive_Barrier(struct drbd_conf *mdev, struct p_header *h)
1220 epoch = kmalloc(sizeof(struct drbd_epoch), GFP_NOIO); 1224 epoch = kmalloc(sizeof(struct drbd_epoch), GFP_NOIO);
1221 if (!epoch) { 1225 if (!epoch) {
1222 dev_warn(DEV, "Allocation of an epoch failed, slowing down\n"); 1226 dev_warn(DEV, "Allocation of an epoch failed, slowing down\n");
1223 issue_flush = !test_and_set_bit(DE_BARRIER_IN_NEXT_EPOCH_ISSUED, &epoch->flags); 1227 issue_flush = !test_and_set_bit(DE_BARRIER_IN_NEXT_EPOCH_ISSUED, &mdev->current_epoch->flags);
1224 drbd_wait_ee_list_empty(mdev, &mdev->active_ee); 1228 drbd_wait_ee_list_empty(mdev, &mdev->active_ee);
1225 if (issue_flush) { 1229 if (issue_flush) {
1226 rv = drbd_flush_after_epoch(mdev, mdev->current_epoch); 1230 rv = drbd_flush_after_epoch(mdev, mdev->current_epoch);
@@ -2866,7 +2870,7 @@ static int receive_sizes(struct drbd_conf *mdev, struct p_header *h)
2866 2870
2867 /* Never shrink a device with usable data during connect. 2871 /* Never shrink a device with usable data during connect.
2868 But allow online shrinking if we are connected. */ 2872 But allow online shrinking if we are connected. */
2869 if (drbd_new_dev_size(mdev, mdev->ldev) < 2873 if (drbd_new_dev_size(mdev, mdev->ldev, 0) <
2870 drbd_get_capacity(mdev->this_bdev) && 2874 drbd_get_capacity(mdev->this_bdev) &&
2871 mdev->state.disk >= D_OUTDATED && 2875 mdev->state.disk >= D_OUTDATED &&
2872 mdev->state.conn < C_CONNECTED) { 2876 mdev->state.conn < C_CONNECTED) {
@@ -2881,7 +2885,7 @@ static int receive_sizes(struct drbd_conf *mdev, struct p_header *h)
2881#undef min_not_zero 2885#undef min_not_zero
2882 2886
2883 if (get_ldev(mdev)) { 2887 if (get_ldev(mdev)) {
2884 dd = drbd_determin_dev_size(mdev); 2888 dd = drbd_determin_dev_size(mdev, 0);
2885 put_ldev(mdev); 2889 put_ldev(mdev);
2886 if (dd == dev_size_error) 2890 if (dd == dev_size_error)
2887 return FALSE; 2891 return FALSE;
@@ -3831,10 +3835,17 @@ static int drbd_do_auth(struct drbd_conf *mdev)
3831{ 3835{
3832 dev_err(DEV, "This kernel was build without CONFIG_CRYPTO_HMAC.\n"); 3836 dev_err(DEV, "This kernel was build without CONFIG_CRYPTO_HMAC.\n");
3833 dev_err(DEV, "You need to disable 'cram-hmac-alg' in drbd.conf.\n"); 3837 dev_err(DEV, "You need to disable 'cram-hmac-alg' in drbd.conf.\n");
3834 return 0; 3838 return -1;
3835} 3839}
3836#else 3840#else
3837#define CHALLENGE_LEN 64 3841#define CHALLENGE_LEN 64
3842
3843/* Return value:
3844 1 - auth succeeded,
3845 0 - failed, try again (network error),
3846 -1 - auth failed, don't try again.
3847*/
3848
3838static int drbd_do_auth(struct drbd_conf *mdev) 3849static int drbd_do_auth(struct drbd_conf *mdev)
3839{ 3850{
3840 char my_challenge[CHALLENGE_LEN]; /* 64 Bytes... */ 3851 char my_challenge[CHALLENGE_LEN]; /* 64 Bytes... */
@@ -3855,7 +3866,7 @@ static int drbd_do_auth(struct drbd_conf *mdev)
3855 (u8 *)mdev->net_conf->shared_secret, key_len); 3866 (u8 *)mdev->net_conf->shared_secret, key_len);
3856 if (rv) { 3867 if (rv) {
3857 dev_err(DEV, "crypto_hash_setkey() failed with %d\n", rv); 3868 dev_err(DEV, "crypto_hash_setkey() failed with %d\n", rv);
3858 rv = 0; 3869 rv = -1;
3859 goto fail; 3870 goto fail;
3860 } 3871 }
3861 3872
@@ -3878,14 +3889,14 @@ static int drbd_do_auth(struct drbd_conf *mdev)
3878 3889
3879 if (p.length > CHALLENGE_LEN*2) { 3890 if (p.length > CHALLENGE_LEN*2) {
3880 dev_err(DEV, "expected AuthChallenge payload too big.\n"); 3891 dev_err(DEV, "expected AuthChallenge payload too big.\n");
3881 rv = 0; 3892 rv = -1;
3882 goto fail; 3893 goto fail;
3883 } 3894 }
3884 3895
3885 peers_ch = kmalloc(p.length, GFP_NOIO); 3896 peers_ch = kmalloc(p.length, GFP_NOIO);
3886 if (peers_ch == NULL) { 3897 if (peers_ch == NULL) {
3887 dev_err(DEV, "kmalloc of peers_ch failed\n"); 3898 dev_err(DEV, "kmalloc of peers_ch failed\n");
3888 rv = 0; 3899 rv = -1;
3889 goto fail; 3900 goto fail;
3890 } 3901 }
3891 3902
@@ -3901,7 +3912,7 @@ static int drbd_do_auth(struct drbd_conf *mdev)
3901 response = kmalloc(resp_size, GFP_NOIO); 3912 response = kmalloc(resp_size, GFP_NOIO);
3902 if (response == NULL) { 3913 if (response == NULL) {
3903 dev_err(DEV, "kmalloc of response failed\n"); 3914 dev_err(DEV, "kmalloc of response failed\n");
3904 rv = 0; 3915 rv = -1;
3905 goto fail; 3916 goto fail;
3906 } 3917 }
3907 3918
@@ -3911,7 +3922,7 @@ static int drbd_do_auth(struct drbd_conf *mdev)
3911 rv = crypto_hash_digest(&desc, &sg, sg.length, response); 3922 rv = crypto_hash_digest(&desc, &sg, sg.length, response);
3912 if (rv) { 3923 if (rv) {
3913 dev_err(DEV, "crypto_hash_digest() failed with %d\n", rv); 3924 dev_err(DEV, "crypto_hash_digest() failed with %d\n", rv);
3914 rv = 0; 3925 rv = -1;
3915 goto fail; 3926 goto fail;
3916 } 3927 }
3917 3928
@@ -3945,9 +3956,9 @@ static int drbd_do_auth(struct drbd_conf *mdev)
3945 } 3956 }
3946 3957
3947 right_response = kmalloc(resp_size, GFP_NOIO); 3958 right_response = kmalloc(resp_size, GFP_NOIO);
3948 if (response == NULL) { 3959 if (right_response == NULL) {
3949 dev_err(DEV, "kmalloc of right_response failed\n"); 3960 dev_err(DEV, "kmalloc of right_response failed\n");
3950 rv = 0; 3961 rv = -1;
3951 goto fail; 3962 goto fail;
3952 } 3963 }
3953 3964
@@ -3956,7 +3967,7 @@ static int drbd_do_auth(struct drbd_conf *mdev)
3956 rv = crypto_hash_digest(&desc, &sg, sg.length, right_response); 3967 rv = crypto_hash_digest(&desc, &sg, sg.length, right_response);
3957 if (rv) { 3968 if (rv) {
3958 dev_err(DEV, "crypto_hash_digest() failed with %d\n", rv); 3969 dev_err(DEV, "crypto_hash_digest() failed with %d\n", rv);
3959 rv = 0; 3970 rv = -1;
3960 goto fail; 3971 goto fail;
3961 } 3972 }
3962 3973
@@ -3965,6 +3976,8 @@ static int drbd_do_auth(struct drbd_conf *mdev)
3965 if (rv) 3976 if (rv)
3966 dev_info(DEV, "Peer authenticated using %d bytes of '%s' HMAC\n", 3977 dev_info(DEV, "Peer authenticated using %d bytes of '%s' HMAC\n",
3967 resp_size, mdev->net_conf->cram_hmac_alg); 3978 resp_size, mdev->net_conf->cram_hmac_alg);
3979 else
3980 rv = -1;
3968 3981
3969 fail: 3982 fail:
3970 kfree(peers_ch); 3983 kfree(peers_ch);
diff --git a/drivers/block/drbd/drbd_worker.c b/drivers/block/drbd/drbd_worker.c
index ed8796f1112d..b453c2bca3be 100644
--- a/drivers/block/drbd/drbd_worker.c
+++ b/drivers/block/drbd/drbd_worker.c
@@ -24,7 +24,6 @@
24 */ 24 */
25 25
26#include <linux/module.h> 26#include <linux/module.h>
27#include <linux/version.h>
28#include <linux/drbd.h> 27#include <linux/drbd.h>
29#include <linux/sched.h> 28#include <linux/sched.h>
30#include <linux/smp_lock.h> 29#include <linux/smp_lock.h>
@@ -34,7 +33,6 @@
34#include <linux/mm_inline.h> 33#include <linux/mm_inline.h>
35#include <linux/slab.h> 34#include <linux/slab.h>
36#include <linux/random.h> 35#include <linux/random.h>
37#include <linux/mm.h>
38#include <linux/string.h> 36#include <linux/string.h>
39#include <linux/scatterlist.h> 37#include <linux/scatterlist.h>
40 38
diff --git a/drivers/block/mg_disk.c b/drivers/block/mg_disk.c
index e0339aaa1815..02b2583df7fc 100644
--- a/drivers/block/mg_disk.c
+++ b/drivers/block/mg_disk.c
@@ -860,7 +860,7 @@ static int mg_probe(struct platform_device *plat_dev)
860 err = -EINVAL; 860 err = -EINVAL;
861 goto probe_err_2; 861 goto probe_err_2;
862 } 862 }
863 host->dev_base = ioremap(rsc->start , rsc->end + 1); 863 host->dev_base = ioremap(rsc->start, resource_size(rsc));
864 if (!host->dev_base) { 864 if (!host->dev_base) {
865 printk(KERN_ERR "%s:%d ioremap fail\n", 865 printk(KERN_ERR "%s:%d ioremap fail\n",
866 __func__, __LINE__); 866 __func__, __LINE__);
diff --git a/drivers/block/pktcdvd.c b/drivers/block/pktcdvd.c
index 2ddf03ae034e..68b5957f107c 100644
--- a/drivers/block/pktcdvd.c
+++ b/drivers/block/pktcdvd.c
@@ -322,7 +322,7 @@ static void pkt_sysfs_dev_remove(struct pktcdvd_device *pd)
322 pkt_kobj_remove(pd->kobj_stat); 322 pkt_kobj_remove(pd->kobj_stat);
323 pkt_kobj_remove(pd->kobj_wqueue); 323 pkt_kobj_remove(pd->kobj_wqueue);
324 if (class_pktcdvd) 324 if (class_pktcdvd)
325 device_destroy(class_pktcdvd, pd->pkt_dev); 325 device_unregister(pd->dev);
326} 326}
327 327
328 328
diff --git a/drivers/bluetooth/Kconfig b/drivers/bluetooth/Kconfig
index 652367aa6546..058fbccf2f52 100644
--- a/drivers/bluetooth/Kconfig
+++ b/drivers/bluetooth/Kconfig
@@ -195,5 +195,16 @@ config BT_MRVL_SDIO
195 Say Y here to compile support for Marvell BT-over-SDIO driver 195 Say Y here to compile support for Marvell BT-over-SDIO driver
196 into the kernel or say M to compile it as module. 196 into the kernel or say M to compile it as module.
197 197
198endmenu 198config BT_ATH3K
199 tristate "Atheros firmware download driver"
200 depends on BT_HCIBTUSB
201 select FW_LOADER
202 help
203 Bluetooth firmware download driver.
204 This driver loads the firmware into the Atheros Bluetooth
205 chipset.
199 206
207 Say Y here to compile support for "Atheros firmware download driver"
208 into the kernel or say M to compile it as module (ath3k).
209
210endmenu
diff --git a/drivers/bluetooth/Makefile b/drivers/bluetooth/Makefile
index b3f57d2d4eb0..7e5aed598121 100644
--- a/drivers/bluetooth/Makefile
+++ b/drivers/bluetooth/Makefile
@@ -15,6 +15,7 @@ obj-$(CONFIG_BT_HCIBTUART) += btuart_cs.o
15obj-$(CONFIG_BT_HCIBTUSB) += btusb.o 15obj-$(CONFIG_BT_HCIBTUSB) += btusb.o
16obj-$(CONFIG_BT_HCIBTSDIO) += btsdio.o 16obj-$(CONFIG_BT_HCIBTSDIO) += btsdio.o
17 17
18obj-$(CONFIG_BT_ATH3K) += ath3k.o
18obj-$(CONFIG_BT_MRVL) += btmrvl.o 19obj-$(CONFIG_BT_MRVL) += btmrvl.o
19obj-$(CONFIG_BT_MRVL_SDIO) += btmrvl_sdio.o 20obj-$(CONFIG_BT_MRVL_SDIO) += btmrvl_sdio.o
20 21
diff --git a/drivers/bluetooth/ath3k.c b/drivers/bluetooth/ath3k.c
new file mode 100644
index 000000000000..add9485ca5b6
--- /dev/null
+++ b/drivers/bluetooth/ath3k.c
@@ -0,0 +1,187 @@
1/*
2 * Copyright (c) 2008-2009 Atheros Communications Inc.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
17 *
18 */
19
20
21#include <linux/module.h>
22#include <linux/kernel.h>
23#include <linux/init.h>
24#include <linux/slab.h>
25#include <linux/types.h>
26#include <linux/errno.h>
27#include <linux/device.h>
28#include <linux/firmware.h>
29#include <linux/usb.h>
30#include <net/bluetooth/bluetooth.h>
31
32#define VERSION "1.0"
33
34
35static struct usb_device_id ath3k_table[] = {
36 /* Atheros AR3011 */
37 { USB_DEVICE(0x0CF3, 0x3000) },
38 { } /* Terminating entry */
39};
40
41MODULE_DEVICE_TABLE(usb, ath3k_table);
42
43#define USB_REQ_DFU_DNLOAD 1
44#define BULK_SIZE 4096
45
46struct ath3k_data {
47 struct usb_device *udev;
48 u8 *fw_data;
49 u32 fw_size;
50 u32 fw_sent;
51};
52
53static int ath3k_load_firmware(struct ath3k_data *data,
54 unsigned char *firmware,
55 int count)
56{
57 u8 *send_buf;
58 int err, pipe, len, size, sent = 0;
59
60 BT_DBG("ath3k %p udev %p", data, data->udev);
61
62 pipe = usb_sndctrlpipe(data->udev, 0);
63
64 if ((usb_control_msg(data->udev, pipe,
65 USB_REQ_DFU_DNLOAD,
66 USB_TYPE_VENDOR, 0, 0,
67 firmware, 20, USB_CTRL_SET_TIMEOUT)) < 0) {
68 BT_ERR("Can't change to loading configuration err");
69 return -EBUSY;
70 }
71 sent += 20;
72 count -= 20;
73
74 send_buf = kmalloc(BULK_SIZE, GFP_ATOMIC);
75 if (!send_buf) {
76 BT_ERR("Can't allocate memory chunk for firmware");
77 return -ENOMEM;
78 }
79
80 while (count) {
81 size = min_t(uint, count, BULK_SIZE);
82 pipe = usb_sndbulkpipe(data->udev, 0x02);
83 memcpy(send_buf, firmware + sent, size);
84
85 err = usb_bulk_msg(data->udev, pipe, send_buf, size,
86 &len, 3000);
87
88 if (err || (len != size)) {
89 BT_ERR("Error in firmware loading err = %d,"
90 "len = %d, size = %d", err, len, size);
91 goto error;
92 }
93
94 sent += size;
95 count -= size;
96 }
97
98 kfree(send_buf);
99 return 0;
100
101error:
102 kfree(send_buf);
103 return err;
104}
105
106static int ath3k_probe(struct usb_interface *intf,
107 const struct usb_device_id *id)
108{
109 const struct firmware *firmware;
110 struct usb_device *udev = interface_to_usbdev(intf);
111 struct ath3k_data *data;
112 int size;
113
114 BT_DBG("intf %p id %p", intf, id);
115
116 if (intf->cur_altsetting->desc.bInterfaceNumber != 0)
117 return -ENODEV;
118
119 data = kzalloc(sizeof(*data), GFP_KERNEL);
120 if (!data)
121 return -ENOMEM;
122
123 data->udev = udev;
124
125 if (request_firmware(&firmware, "ath3k-1.fw", &udev->dev) < 0) {
126 kfree(data);
127 return -EIO;
128 }
129
130 size = max_t(uint, firmware->size, 4096);
131 data->fw_data = kmalloc(size, GFP_KERNEL);
132 if (!data->fw_data) {
133 release_firmware(firmware);
134 kfree(data);
135 return -ENOMEM;
136 }
137
138 memcpy(data->fw_data, firmware->data, firmware->size);
139 data->fw_size = firmware->size;
140 data->fw_sent = 0;
141 release_firmware(firmware);
142
143 usb_set_intfdata(intf, data);
144 if (ath3k_load_firmware(data, data->fw_data, data->fw_size)) {
145 usb_set_intfdata(intf, NULL);
146 return -EIO;
147 }
148
149 return 0;
150}
151
152static void ath3k_disconnect(struct usb_interface *intf)
153{
154 struct ath3k_data *data = usb_get_intfdata(intf);
155
156 BT_DBG("ath3k_disconnect intf %p", intf);
157
158 kfree(data->fw_data);
159 kfree(data);
160}
161
162static struct usb_driver ath3k_driver = {
163 .name = "ath3k",
164 .probe = ath3k_probe,
165 .disconnect = ath3k_disconnect,
166 .id_table = ath3k_table,
167};
168
169static int __init ath3k_init(void)
170{
171 BT_INFO("Atheros AR30xx firmware driver ver %s", VERSION);
172 return usb_register(&ath3k_driver);
173}
174
175static void __exit ath3k_exit(void)
176{
177 usb_deregister(&ath3k_driver);
178}
179
180module_init(ath3k_init);
181module_exit(ath3k_exit);
182
183MODULE_AUTHOR("Atheros Communications");
184MODULE_DESCRIPTION("Atheros AR30xx firmware driver");
185MODULE_VERSION(VERSION);
186MODULE_LICENSE("GPL");
187MODULE_FIRMWARE("ath3k-1.fw");
diff --git a/drivers/bluetooth/bluecard_cs.c b/drivers/bluetooth/bluecard_cs.c
index 2acdc605cb4b..c2cf81144715 100644
--- a/drivers/bluetooth/bluecard_cs.c
+++ b/drivers/bluetooth/bluecard_cs.c
@@ -503,7 +503,9 @@ static irqreturn_t bluecard_interrupt(int irq, void *dev_inst)
503 unsigned int iobase; 503 unsigned int iobase;
504 unsigned char reg; 504 unsigned char reg;
505 505
506 BUG_ON(!info->hdev); 506 if (!info || !info->hdev)
507 /* our irq handler is shared */
508 return IRQ_NONE;
507 509
508 if (!test_bit(CARD_READY, &(info->hw_state))) 510 if (!test_bit(CARD_READY, &(info->hw_state)))
509 return IRQ_HANDLED; 511 return IRQ_HANDLED;
diff --git a/drivers/bluetooth/bt3c_cs.c b/drivers/bluetooth/bt3c_cs.c
index d814a2755ccb..9f5926aaf57f 100644
--- a/drivers/bluetooth/bt3c_cs.c
+++ b/drivers/bluetooth/bt3c_cs.c
@@ -345,7 +345,9 @@ static irqreturn_t bt3c_interrupt(int irq, void *dev_inst)
345 int iir; 345 int iir;
346 irqreturn_t r = IRQ_NONE; 346 irqreturn_t r = IRQ_NONE;
347 347
348 BUG_ON(!info->hdev); 348 if (!info || !info->hdev)
349 /* our irq handler is shared */
350 return IRQ_NONE;
349 351
350 iobase = info->p_dev->io.BasePort1; 352 iobase = info->p_dev->io.BasePort1;
351 353
diff --git a/drivers/bluetooth/btmrvl_sdio.c b/drivers/bluetooth/btmrvl_sdio.c
index f36defa37764..57d965b7f521 100644
--- a/drivers/bluetooth/btmrvl_sdio.c
+++ b/drivers/bluetooth/btmrvl_sdio.c
@@ -808,6 +808,7 @@ static int btmrvl_sdio_host_to_card(struct btmrvl_private *priv,
808 808
809exit: 809exit:
810 sdio_release_host(card->func); 810 sdio_release_host(card->func);
811 kfree(tmpbuf);
811 812
812 return ret; 813 return ret;
813} 814}
diff --git a/drivers/bluetooth/btuart_cs.c b/drivers/bluetooth/btuart_cs.c
index d339464dc15e..91c523099804 100644
--- a/drivers/bluetooth/btuart_cs.c
+++ b/drivers/bluetooth/btuart_cs.c
@@ -295,7 +295,9 @@ static irqreturn_t btuart_interrupt(int irq, void *dev_inst)
295 int iir, lsr; 295 int iir, lsr;
296 irqreturn_t r = IRQ_NONE; 296 irqreturn_t r = IRQ_NONE;
297 297
298 BUG_ON(!info->hdev); 298 if (!info || !info->hdev)
299 /* our irq handler is shared */
300 return IRQ_NONE;
299 301
300 iobase = info->p_dev->io.BasePort1; 302 iobase = info->p_dev->io.BasePort1;
301 303
diff --git a/drivers/bluetooth/btusb.c b/drivers/bluetooth/btusb.c
index 4d2905996751..a699f09ddf7c 100644
--- a/drivers/bluetooth/btusb.c
+++ b/drivers/bluetooth/btusb.c
@@ -307,6 +307,7 @@ static void btusb_bulk_complete(struct urb *urb)
307 return; 307 return;
308 308
309 usb_anchor_urb(urb, &data->bulk_anchor); 309 usb_anchor_urb(urb, &data->bulk_anchor);
310 usb_mark_last_busy(data->udev);
310 311
311 err = usb_submit_urb(urb, GFP_ATOMIC); 312 err = usb_submit_urb(urb, GFP_ATOMIC);
312 if (err < 0) { 313 if (err < 0) {
diff --git a/drivers/bluetooth/dtl1_cs.c b/drivers/bluetooth/dtl1_cs.c
index 4f02a6f3c980..697591941e17 100644
--- a/drivers/bluetooth/dtl1_cs.c
+++ b/drivers/bluetooth/dtl1_cs.c
@@ -299,7 +299,9 @@ static irqreturn_t dtl1_interrupt(int irq, void *dev_inst)
299 int iir, lsr; 299 int iir, lsr;
300 irqreturn_t r = IRQ_NONE; 300 irqreturn_t r = IRQ_NONE;
301 301
302 BUG_ON(!info->hdev); 302 if (!info || !info->hdev)
303 /* our irq handler is shared */
304 return IRQ_NONE;
303 305
304 iobase = info->p_dev->io.BasePort1; 306 iobase = info->p_dev->io.BasePort1;
305 307
diff --git a/drivers/char/Kconfig b/drivers/char/Kconfig
index 6f31c9472100..e023682be2c4 100644
--- a/drivers/char/Kconfig
+++ b/drivers/char/Kconfig
@@ -502,7 +502,7 @@ config BRIQ_PANEL
502 502
503config BFIN_OTP 503config BFIN_OTP
504 tristate "Blackfin On-Chip OTP Memory Support" 504 tristate "Blackfin On-Chip OTP Memory Support"
505 depends on BLACKFIN && (BF52x || BF54x) 505 depends on BLACKFIN && (BF51x || BF52x || BF54x)
506 default y 506 default y
507 help 507 help
508 If you say Y here, you will get support for a character device 508 If you say Y here, you will get support for a character device
@@ -669,7 +669,7 @@ config VIRTIO_CONSOLE
669 669
670config HVCS 670config HVCS
671 tristate "IBM Hypervisor Virtual Console Server support" 671 tristate "IBM Hypervisor Virtual Console Server support"
672 depends on PPC_PSERIES 672 depends on PPC_PSERIES && HVC_CONSOLE
673 help 673 help
674 Partitionable IBM Power5 ppc64 machines allow hosting of 674 Partitionable IBM Power5 ppc64 machines allow hosting of
675 firmware virtual consoles from one Linux partition by 675 firmware virtual consoles from one Linux partition by
diff --git a/drivers/char/agp/amd64-agp.c b/drivers/char/agp/amd64-agp.c
index 2fb2e6cc322a..fd50ead59c79 100644
--- a/drivers/char/agp/amd64-agp.c
+++ b/drivers/char/agp/amd64-agp.c
@@ -728,6 +728,7 @@ int __init agp_amd64_init(void)
728 728
729 if (agp_off) 729 if (agp_off)
730 return -EINVAL; 730 return -EINVAL;
731
731 err = pci_register_driver(&agp_amd64_pci_driver); 732 err = pci_register_driver(&agp_amd64_pci_driver);
732 if (err < 0) 733 if (err < 0)
733 return err; 734 return err;
@@ -764,19 +765,28 @@ int __init agp_amd64_init(void)
764 return err; 765 return err;
765} 766}
766 767
768static int __init agp_amd64_mod_init(void)
769{
770#ifndef MODULE
771 if (gart_iommu_aperture)
772 return agp_bridges_found ? 0 : -ENODEV;
773#endif
774 return agp_amd64_init();
775}
776
767static void __exit agp_amd64_cleanup(void) 777static void __exit agp_amd64_cleanup(void)
768{ 778{
779#ifndef MODULE
780 if (gart_iommu_aperture)
781 return;
782#endif
769 if (aperture_resource) 783 if (aperture_resource)
770 release_resource(aperture_resource); 784 release_resource(aperture_resource);
771 pci_unregister_driver(&agp_amd64_pci_driver); 785 pci_unregister_driver(&agp_amd64_pci_driver);
772} 786}
773 787
774/* On AMD64 the PCI driver needs to initialize this driver early 788module_init(agp_amd64_mod_init);
775 for the IOMMU, so it has to be called via a backdoor. */
776#ifndef CONFIG_GART_IOMMU
777module_init(agp_amd64_init);
778module_exit(agp_amd64_cleanup); 789module_exit(agp_amd64_cleanup);
779#endif
780 790
781MODULE_AUTHOR("Dave Jones <davej@redhat.com>, Andi Kleen"); 791MODULE_AUTHOR("Dave Jones <davej@redhat.com>, Andi Kleen");
782module_param(agp_try_unsupported, bool, 0); 792module_param(agp_try_unsupported, bool, 0);
diff --git a/drivers/char/agp/backend.c b/drivers/char/agp/backend.c
index a56ca080e108..c3ab46da51a3 100644
--- a/drivers/char/agp/backend.c
+++ b/drivers/char/agp/backend.c
@@ -285,18 +285,22 @@ int agp_add_bridge(struct agp_bridge_data *bridge)
285{ 285{
286 int error; 286 int error;
287 287
288 if (agp_off) 288 if (agp_off) {
289 return -ENODEV; 289 error = -ENODEV;
290 goto err_put_bridge;
291 }
290 292
291 if (!bridge->dev) { 293 if (!bridge->dev) {
292 printk (KERN_DEBUG PFX "Erk, registering with no pci_dev!\n"); 294 printk (KERN_DEBUG PFX "Erk, registering with no pci_dev!\n");
293 return -EINVAL; 295 error = -EINVAL;
296 goto err_put_bridge;
294 } 297 }
295 298
296 /* Grab reference on the chipset driver. */ 299 /* Grab reference on the chipset driver. */
297 if (!try_module_get(bridge->driver->owner)) { 300 if (!try_module_get(bridge->driver->owner)) {
298 dev_info(&bridge->dev->dev, "can't lock chipset driver\n"); 301 dev_info(&bridge->dev->dev, "can't lock chipset driver\n");
299 return -EINVAL; 302 error = -EINVAL;
303 goto err_put_bridge;
300 } 304 }
301 305
302 error = agp_backend_initialize(bridge); 306 error = agp_backend_initialize(bridge);
@@ -326,6 +330,7 @@ frontend_err:
326 agp_backend_cleanup(bridge); 330 agp_backend_cleanup(bridge);
327err_out: 331err_out:
328 module_put(bridge->driver->owner); 332 module_put(bridge->driver->owner);
333err_put_bridge:
329 agp_put_bridge(bridge); 334 agp_put_bridge(bridge);
330 return error; 335 return error;
331} 336}
diff --git a/drivers/char/agp/hp-agp.c b/drivers/char/agp/hp-agp.c
index 9047b2714653..58752b70efea 100644
--- a/drivers/char/agp/hp-agp.c
+++ b/drivers/char/agp/hp-agp.c
@@ -488,9 +488,8 @@ zx1_gart_probe (acpi_handle obj, u32 depth, void *context, void **ret)
488 handle = obj; 488 handle = obj;
489 do { 489 do {
490 status = acpi_get_object_info(handle, &info); 490 status = acpi_get_object_info(handle, &info);
491 if (ACPI_SUCCESS(status)) { 491 if (ACPI_SUCCESS(status) && (info->valid & ACPI_VALID_HID)) {
492 /* TBD check _CID also */ 492 /* TBD check _CID also */
493 info->hardware_id.string[sizeof(info->hardware_id.length)-1] = '\0';
494 match = (strcmp(info->hardware_id.string, "HWP0001") == 0); 493 match = (strcmp(info->hardware_id.string, "HWP0001") == 0);
495 kfree(info); 494 kfree(info);
496 if (match) { 495 if (match) {
@@ -509,6 +508,9 @@ zx1_gart_probe (acpi_handle obj, u32 depth, void *context, void **ret)
509 handle = parent; 508 handle = parent;
510 } while (ACPI_SUCCESS(status)); 509 } while (ACPI_SUCCESS(status));
511 510
511 if (ACPI_FAILURE(status))
512 return AE_OK; /* found no enclosing IOC */
513
512 if (hp_zx1_setup(sba_hpa + HP_ZX1_IOC_OFFSET, lba_hpa)) 514 if (hp_zx1_setup(sba_hpa + HP_ZX1_IOC_OFFSET, lba_hpa))
513 return AE_OK; 515 return AE_OK;
514 516
diff --git a/drivers/char/agp/intel-agp.c b/drivers/char/agp/intel-agp.c
index 30c36ac2cd00..3999a5f25f38 100644
--- a/drivers/char/agp/intel-agp.c
+++ b/drivers/char/agp/intel-agp.c
@@ -2460,10 +2460,14 @@ static int __devinit agp_intel_probe(struct pci_dev *pdev,
2460 &bridge->mode); 2460 &bridge->mode);
2461 } 2461 }
2462 2462
2463 if (bridge->driver->mask_memory == intel_i965_mask_memory) 2463 if (bridge->driver->mask_memory == intel_i965_mask_memory) {
2464 if (pci_set_dma_mask(intel_private.pcidev, DMA_BIT_MASK(36))) 2464 if (pci_set_dma_mask(intel_private.pcidev, DMA_BIT_MASK(36)))
2465 dev_err(&intel_private.pcidev->dev, 2465 dev_err(&intel_private.pcidev->dev,
2466 "set gfx device dma mask 36bit failed!\n"); 2466 "set gfx device dma mask 36bit failed!\n");
2467 else
2468 pci_set_consistent_dma_mask(intel_private.pcidev,
2469 DMA_BIT_MASK(36));
2470 }
2467 2471
2468 pci_set_drvdata(pdev, bridge); 2472 pci_set_drvdata(pdev, bridge);
2469 return agp_add_bridge(bridge); 2473 return agp_add_bridge(bridge);
diff --git a/drivers/char/hw_random/core.c b/drivers/char/hw_random/core.c
index e989f67bb61f..3d9c61e5acbf 100644
--- a/drivers/char/hw_random/core.c
+++ b/drivers/char/hw_random/core.c
@@ -158,10 +158,11 @@ static ssize_t rng_dev_read(struct file *filp, char __user *buf,
158 goto out; 158 goto out;
159 } 159 }
160 } 160 }
161out_unlock:
162 mutex_unlock(&rng_mutex);
163out: 161out:
164 return ret ? : err; 162 return ret ? : err;
163out_unlock:
164 mutex_unlock(&rng_mutex);
165 goto out;
165} 166}
166 167
167 168
diff --git a/drivers/char/hw_random/virtio-rng.c b/drivers/char/hw_random/virtio-rng.c
index bdaef8e94021..64fe0a793efd 100644
--- a/drivers/char/hw_random/virtio-rng.c
+++ b/drivers/char/hw_random/virtio-rng.c
@@ -114,7 +114,7 @@ static struct virtio_device_id id_table[] = {
114 { 0 }, 114 { 0 },
115}; 115};
116 116
117static struct virtio_driver virtio_rng = { 117static struct virtio_driver virtio_rng_driver = {
118 .driver.name = KBUILD_MODNAME, 118 .driver.name = KBUILD_MODNAME,
119 .driver.owner = THIS_MODULE, 119 .driver.owner = THIS_MODULE,
120 .id_table = id_table, 120 .id_table = id_table,
@@ -124,12 +124,12 @@ static struct virtio_driver virtio_rng = {
124 124
125static int __init init(void) 125static int __init init(void)
126{ 126{
127 return register_virtio_driver(&virtio_rng); 127 return register_virtio_driver(&virtio_rng_driver);
128} 128}
129 129
130static void __exit fini(void) 130static void __exit fini(void)
131{ 131{
132 unregister_virtio_driver(&virtio_rng); 132 unregister_virtio_driver(&virtio_rng_driver);
133} 133}
134module_init(init); 134module_init(init);
135module_exit(fini); 135module_exit(fini);
diff --git a/drivers/char/ipmi/ipmi_si_intf.c b/drivers/char/ipmi/ipmi_si_intf.c
index d2e698096ace..176f1751237f 100644
--- a/drivers/char/ipmi/ipmi_si_intf.c
+++ b/drivers/char/ipmi/ipmi_si_intf.c
@@ -64,6 +64,7 @@
64#include <linux/dmi.h> 64#include <linux/dmi.h>
65#include <linux/string.h> 65#include <linux/string.h>
66#include <linux/ctype.h> 66#include <linux/ctype.h>
67#include <linux/pnp.h>
67 68
68#ifdef CONFIG_PPC_OF 69#ifdef CONFIG_PPC_OF
69#include <linux/of_device.h> 70#include <linux/of_device.h>
@@ -1919,7 +1920,7 @@ struct SPMITable {
1919 s8 spmi_id[1]; /* A '\0' terminated array starts here. */ 1920 s8 spmi_id[1]; /* A '\0' terminated array starts here. */
1920}; 1921};
1921 1922
1922static __devinit int try_init_acpi(struct SPMITable *spmi) 1923static __devinit int try_init_spmi(struct SPMITable *spmi)
1923{ 1924{
1924 struct smi_info *info; 1925 struct smi_info *info;
1925 u8 addr_space; 1926 u8 addr_space;
@@ -1940,7 +1941,7 @@ static __devinit int try_init_acpi(struct SPMITable *spmi)
1940 return -ENOMEM; 1941 return -ENOMEM;
1941 } 1942 }
1942 1943
1943 info->addr_source = "ACPI"; 1944 info->addr_source = "SPMI";
1944 1945
1945 /* Figure out the interface type. */ 1946 /* Figure out the interface type. */
1946 switch (spmi->InterfaceType) { 1947 switch (spmi->InterfaceType) {
@@ -2002,7 +2003,7 @@ static __devinit int try_init_acpi(struct SPMITable *spmi)
2002 return 0; 2003 return 0;
2003} 2004}
2004 2005
2005static __devinit void acpi_find_bmc(void) 2006static __devinit void spmi_find_bmc(void)
2006{ 2007{
2007 acpi_status status; 2008 acpi_status status;
2008 struct SPMITable *spmi; 2009 struct SPMITable *spmi;
@@ -2020,9 +2021,106 @@ static __devinit void acpi_find_bmc(void)
2020 if (status != AE_OK) 2021 if (status != AE_OK)
2021 return; 2022 return;
2022 2023
2023 try_init_acpi(spmi); 2024 try_init_spmi(spmi);
2024 } 2025 }
2025} 2026}
2027
2028static int __devinit ipmi_pnp_probe(struct pnp_dev *dev,
2029 const struct pnp_device_id *dev_id)
2030{
2031 struct acpi_device *acpi_dev;
2032 struct smi_info *info;
2033 acpi_handle handle;
2034 acpi_status status;
2035 unsigned long long tmp;
2036
2037 acpi_dev = pnp_acpi_device(dev);
2038 if (!acpi_dev)
2039 return -ENODEV;
2040
2041 info = kzalloc(sizeof(*info), GFP_KERNEL);
2042 if (!info)
2043 return -ENOMEM;
2044
2045 info->addr_source = "ACPI";
2046
2047 handle = acpi_dev->handle;
2048
2049 /* _IFT tells us the interface type: KCS, BT, etc */
2050 status = acpi_evaluate_integer(handle, "_IFT", NULL, &tmp);
2051 if (ACPI_FAILURE(status))
2052 goto err_free;
2053
2054 switch (tmp) {
2055 case 1:
2056 info->si_type = SI_KCS;
2057 break;
2058 case 2:
2059 info->si_type = SI_SMIC;
2060 break;
2061 case 3:
2062 info->si_type = SI_BT;
2063 break;
2064 default:
2065 dev_info(&dev->dev, "unknown interface type %lld\n", tmp);
2066 goto err_free;
2067 }
2068
2069 if (pnp_port_valid(dev, 0)) {
2070 info->io_setup = port_setup;
2071 info->io.addr_type = IPMI_IO_ADDR_SPACE;
2072 info->io.addr_data = pnp_port_start(dev, 0);
2073 } else if (pnp_mem_valid(dev, 0)) {
2074 info->io_setup = mem_setup;
2075 info->io.addr_type = IPMI_MEM_ADDR_SPACE;
2076 info->io.addr_data = pnp_mem_start(dev, 0);
2077 } else {
2078 dev_err(&dev->dev, "no I/O or memory address\n");
2079 goto err_free;
2080 }
2081
2082 info->io.regspacing = DEFAULT_REGSPACING;
2083 info->io.regsize = DEFAULT_REGSPACING;
2084 info->io.regshift = 0;
2085
2086 /* If _GPE exists, use it; otherwise use standard interrupts */
2087 status = acpi_evaluate_integer(handle, "_GPE", NULL, &tmp);
2088 if (ACPI_SUCCESS(status)) {
2089 info->irq = tmp;
2090 info->irq_setup = acpi_gpe_irq_setup;
2091 } else if (pnp_irq_valid(dev, 0)) {
2092 info->irq = pnp_irq(dev, 0);
2093 info->irq_setup = std_irq_setup;
2094 }
2095
2096 info->dev = &acpi_dev->dev;
2097 pnp_set_drvdata(dev, info);
2098
2099 return try_smi_init(info);
2100
2101err_free:
2102 kfree(info);
2103 return -EINVAL;
2104}
2105
2106static void __devexit ipmi_pnp_remove(struct pnp_dev *dev)
2107{
2108 struct smi_info *info = pnp_get_drvdata(dev);
2109
2110 cleanup_one_si(info);
2111}
2112
2113static const struct pnp_device_id pnp_dev_table[] = {
2114 {"IPI0001", 0},
2115 {"", 0},
2116};
2117
2118static struct pnp_driver ipmi_pnp_driver = {
2119 .name = DEVICE_NAME,
2120 .probe = ipmi_pnp_probe,
2121 .remove = __devexit_p(ipmi_pnp_remove),
2122 .id_table = pnp_dev_table,
2123};
2026#endif 2124#endif
2027 2125
2028#ifdef CONFIG_DMI 2126#ifdef CONFIG_DMI
@@ -2202,7 +2300,6 @@ static int __devinit ipmi_pci_probe(struct pci_dev *pdev,
2202 int rv; 2300 int rv;
2203 int class_type = pdev->class & PCI_ERMC_CLASSCODE_TYPE_MASK; 2301 int class_type = pdev->class & PCI_ERMC_CLASSCODE_TYPE_MASK;
2204 struct smi_info *info; 2302 struct smi_info *info;
2205 int first_reg_offset = 0;
2206 2303
2207 info = kzalloc(sizeof(*info), GFP_KERNEL); 2304 info = kzalloc(sizeof(*info), GFP_KERNEL);
2208 if (!info) 2305 if (!info)
@@ -2241,9 +2338,6 @@ static int __devinit ipmi_pci_probe(struct pci_dev *pdev,
2241 info->addr_source_cleanup = ipmi_pci_cleanup; 2338 info->addr_source_cleanup = ipmi_pci_cleanup;
2242 info->addr_source_data = pdev; 2339 info->addr_source_data = pdev;
2243 2340
2244 if (pdev->subsystem_vendor == PCI_HP_VENDOR_ID)
2245 first_reg_offset = 1;
2246
2247 if (pci_resource_flags(pdev, 0) & IORESOURCE_IO) { 2341 if (pci_resource_flags(pdev, 0) & IORESOURCE_IO) {
2248 info->io_setup = port_setup; 2342 info->io_setup = port_setup;
2249 info->io.addr_type = IPMI_IO_ADDR_SPACE; 2343 info->io.addr_type = IPMI_IO_ADDR_SPACE;
@@ -3108,7 +3202,10 @@ static __devinit int init_ipmi_si(void)
3108#endif 3202#endif
3109 3203
3110#ifdef CONFIG_ACPI 3204#ifdef CONFIG_ACPI
3111 acpi_find_bmc(); 3205 spmi_find_bmc();
3206#endif
3207#ifdef CONFIG_ACPI
3208 pnp_register_driver(&ipmi_pnp_driver);
3112#endif 3209#endif
3113 3210
3114#ifdef CONFIG_PCI 3211#ifdef CONFIG_PCI
@@ -3233,6 +3330,9 @@ static __exit void cleanup_ipmi_si(void)
3233#ifdef CONFIG_PCI 3330#ifdef CONFIG_PCI
3234 pci_unregister_driver(&ipmi_pci_driver); 3331 pci_unregister_driver(&ipmi_pci_driver);
3235#endif 3332#endif
3333#ifdef CONFIG_ACPI
3334 pnp_unregister_driver(&ipmi_pnp_driver);
3335#endif
3236 3336
3237#ifdef CONFIG_PPC_OF 3337#ifdef CONFIG_PPC_OF
3238 of_unregister_platform_driver(&ipmi_of_platform_driver); 3338 of_unregister_platform_driver(&ipmi_of_platform_driver);
diff --git a/drivers/char/keyboard.c b/drivers/char/keyboard.c
index 5619007e7e05..f706b1dffdb3 100644
--- a/drivers/char/keyboard.c
+++ b/drivers/char/keyboard.c
@@ -233,7 +233,8 @@ int setkeycode(unsigned int scancode, unsigned int keycode)
233} 233}
234 234
235/* 235/*
236 * Making beeps and bells. 236 * Making beeps and bells. Note that we prefer beeps to bells, but when
237 * shutting the sound off we do both.
237 */ 238 */
238 239
239static int kd_sound_helper(struct input_handle *handle, void *data) 240static int kd_sound_helper(struct input_handle *handle, void *data)
@@ -242,9 +243,12 @@ static int kd_sound_helper(struct input_handle *handle, void *data)
242 struct input_dev *dev = handle->dev; 243 struct input_dev *dev = handle->dev;
243 244
244 if (test_bit(EV_SND, dev->evbit)) { 245 if (test_bit(EV_SND, dev->evbit)) {
245 if (test_bit(SND_TONE, dev->sndbit)) 246 if (test_bit(SND_TONE, dev->sndbit)) {
246 input_inject_event(handle, EV_SND, SND_TONE, *hz); 247 input_inject_event(handle, EV_SND, SND_TONE, *hz);
247 if (test_bit(SND_BELL, handle->dev->sndbit)) 248 if (*hz)
249 return 0;
250 }
251 if (test_bit(SND_BELL, dev->sndbit))
248 input_inject_event(handle, EV_SND, SND_BELL, *hz ? 1 : 0); 252 input_inject_event(handle, EV_SND, SND_BELL, *hz ? 1 : 0);
249 } 253 }
250 254
diff --git a/drivers/char/mem.c b/drivers/char/mem.c
index be832b6f8279..48788db4e280 100644
--- a/drivers/char/mem.c
+++ b/drivers/char/mem.c
@@ -395,6 +395,7 @@ static ssize_t read_kmem(struct file *file, char __user *buf,
395 unsigned long p = *ppos; 395 unsigned long p = *ppos;
396 ssize_t low_count, read, sz; 396 ssize_t low_count, read, sz;
397 char * kbuf; /* k-addr because vread() takes vmlist_lock rwlock */ 397 char * kbuf; /* k-addr because vread() takes vmlist_lock rwlock */
398 int err = 0;
398 399
399 read = 0; 400 read = 0;
400 if (p < (unsigned long) high_memory) { 401 if (p < (unsigned long) high_memory) {
@@ -441,12 +442,16 @@ static ssize_t read_kmem(struct file *file, char __user *buf,
441 return -ENOMEM; 442 return -ENOMEM;
442 while (count > 0) { 443 while (count > 0) {
443 sz = size_inside_page(p, count); 444 sz = size_inside_page(p, count);
445 if (!is_vmalloc_or_module_addr((void *)p)) {
446 err = -ENXIO;
447 break;
448 }
444 sz = vread(kbuf, (char *)p, sz); 449 sz = vread(kbuf, (char *)p, sz);
445 if (!sz) 450 if (!sz)
446 break; 451 break;
447 if (copy_to_user(buf, kbuf, sz)) { 452 if (copy_to_user(buf, kbuf, sz)) {
448 free_page((unsigned long)kbuf); 453 err = -EFAULT;
449 return -EFAULT; 454 break;
450 } 455 }
451 count -= sz; 456 count -= sz;
452 buf += sz; 457 buf += sz;
@@ -455,8 +460,8 @@ static ssize_t read_kmem(struct file *file, char __user *buf,
455 } 460 }
456 free_page((unsigned long)kbuf); 461 free_page((unsigned long)kbuf);
457 } 462 }
458 *ppos = p; 463 *ppos = p;
459 return read; 464 return read ? read : err;
460} 465}
461 466
462 467
@@ -520,6 +525,7 @@ static ssize_t write_kmem(struct file * file, const char __user * buf,
520 ssize_t wrote = 0; 525 ssize_t wrote = 0;
521 ssize_t virtr = 0; 526 ssize_t virtr = 0;
522 char * kbuf; /* k-addr because vwrite() takes vmlist_lock rwlock */ 527 char * kbuf; /* k-addr because vwrite() takes vmlist_lock rwlock */
528 int err = 0;
523 529
524 if (p < (unsigned long) high_memory) { 530 if (p < (unsigned long) high_memory) {
525 unsigned long to_write = min_t(unsigned long, count, 531 unsigned long to_write = min_t(unsigned long, count,
@@ -540,14 +546,16 @@ static ssize_t write_kmem(struct file * file, const char __user * buf,
540 unsigned long sz = size_inside_page(p, count); 546 unsigned long sz = size_inside_page(p, count);
541 unsigned long n; 547 unsigned long n;
542 548
549 if (!is_vmalloc_or_module_addr((void *)p)) {
550 err = -ENXIO;
551 break;
552 }
543 n = copy_from_user(kbuf, buf, sz); 553 n = copy_from_user(kbuf, buf, sz);
544 if (n) { 554 if (n) {
545 if (wrote + virtr) 555 err = -EFAULT;
546 break; 556 break;
547 free_page((unsigned long)kbuf);
548 return -EFAULT;
549 } 557 }
550 sz = vwrite(kbuf, (char *)p, sz); 558 vwrite(kbuf, (char *)p, sz);
551 count -= sz; 559 count -= sz;
552 buf += sz; 560 buf += sz;
553 virtr += sz; 561 virtr += sz;
@@ -556,8 +564,8 @@ static ssize_t write_kmem(struct file * file, const char __user * buf,
556 free_page((unsigned long)kbuf); 564 free_page((unsigned long)kbuf);
557 } 565 }
558 566
559 *ppos = p; 567 *ppos = p;
560 return virtr + wrote; 568 return virtr + wrote ? : err;
561} 569}
562#endif 570#endif
563 571
diff --git a/drivers/char/nozomi.c b/drivers/char/nozomi.c
index d3400b20444f..2ad7d37afbd0 100644
--- a/drivers/char/nozomi.c
+++ b/drivers/char/nozomi.c
@@ -358,7 +358,7 @@ struct port {
358 u8 update_flow_control; 358 u8 update_flow_control;
359 struct ctrl_ul ctrl_ul; 359 struct ctrl_ul ctrl_ul;
360 struct ctrl_dl ctrl_dl; 360 struct ctrl_dl ctrl_dl;
361 struct kfifo *fifo_ul; 361 struct kfifo fifo_ul;
362 void __iomem *dl_addr[2]; 362 void __iomem *dl_addr[2];
363 u32 dl_size[2]; 363 u32 dl_size[2];
364 u8 toggle_dl; 364 u8 toggle_dl;
@@ -685,8 +685,6 @@ static int nozomi_read_config_table(struct nozomi *dc)
685 dump_table(dc); 685 dump_table(dc);
686 686
687 for (i = PORT_MDM; i < MAX_PORT; i++) { 687 for (i = PORT_MDM; i < MAX_PORT; i++) {
688 dc->port[i].fifo_ul =
689 kfifo_alloc(FIFO_BUFFER_SIZE_UL, GFP_ATOMIC, NULL);
690 memset(&dc->port[i].ctrl_dl, 0, sizeof(struct ctrl_dl)); 688 memset(&dc->port[i].ctrl_dl, 0, sizeof(struct ctrl_dl));
691 memset(&dc->port[i].ctrl_ul, 0, sizeof(struct ctrl_ul)); 689 memset(&dc->port[i].ctrl_ul, 0, sizeof(struct ctrl_ul));
692 } 690 }
@@ -798,7 +796,7 @@ static int send_data(enum port_type index, struct nozomi *dc)
798 struct tty_struct *tty = tty_port_tty_get(&port->port); 796 struct tty_struct *tty = tty_port_tty_get(&port->port);
799 797
800 /* Get data from tty and place in buf for now */ 798 /* Get data from tty and place in buf for now */
801 size = __kfifo_get(port->fifo_ul, dc->send_buf, 799 size = kfifo_out(&port->fifo_ul, dc->send_buf,
802 ul_size < SEND_BUF_MAX ? ul_size : SEND_BUF_MAX); 800 ul_size < SEND_BUF_MAX ? ul_size : SEND_BUF_MAX);
803 801
804 if (size == 0) { 802 if (size == 0) {
@@ -988,11 +986,11 @@ static int receive_flow_control(struct nozomi *dc)
988 986
989 } else if (old_ctrl.CTS == 0 && ctrl_dl.CTS == 1) { 987 } else if (old_ctrl.CTS == 0 && ctrl_dl.CTS == 1) {
990 988
991 if (__kfifo_len(dc->port[port].fifo_ul)) { 989 if (kfifo_len(&dc->port[port].fifo_ul)) {
992 DBG1("Enable interrupt (0x%04X) on port: %d", 990 DBG1("Enable interrupt (0x%04X) on port: %d",
993 enable_ier, port); 991 enable_ier, port);
994 DBG1("Data in buffer [%d], enable transmit! ", 992 DBG1("Data in buffer [%d], enable transmit! ",
995 __kfifo_len(dc->port[port].fifo_ul)); 993 kfifo_len(&dc->port[port].fifo_ul));
996 enable_transmit_ul(port, dc); 994 enable_transmit_ul(port, dc);
997 } else { 995 } else {
998 DBG1("No data in buffer..."); 996 DBG1("No data in buffer...");
@@ -1433,6 +1431,16 @@ static int __devinit nozomi_card_init(struct pci_dev *pdev,
1433 goto err_free_sbuf; 1431 goto err_free_sbuf;
1434 } 1432 }
1435 1433
1434 for (i = PORT_MDM; i < MAX_PORT; i++) {
1435 if (kfifo_alloc(&dc->port[i].fifo_ul,
1436 FIFO_BUFFER_SIZE_UL, GFP_ATOMIC)) {
1437 dev_err(&pdev->dev,
1438 "Could not allocate kfifo buffer\n");
1439 ret = -ENOMEM;
1440 goto err_free_kfifo;
1441 }
1442 }
1443
1436 spin_lock_init(&dc->spin_mutex); 1444 spin_lock_init(&dc->spin_mutex);
1437 1445
1438 nozomi_setup_private_data(dc); 1446 nozomi_setup_private_data(dc);
@@ -1445,7 +1453,7 @@ static int __devinit nozomi_card_init(struct pci_dev *pdev,
1445 NOZOMI_NAME, dc); 1453 NOZOMI_NAME, dc);
1446 if (unlikely(ret)) { 1454 if (unlikely(ret)) {
1447 dev_err(&pdev->dev, "can't request irq %d\n", pdev->irq); 1455 dev_err(&pdev->dev, "can't request irq %d\n", pdev->irq);
1448 goto err_free_sbuf; 1456 goto err_free_kfifo;
1449 } 1457 }
1450 1458
1451 DBG1("base_addr: %p", dc->base_addr); 1459 DBG1("base_addr: %p", dc->base_addr);
@@ -1464,13 +1472,28 @@ static int __devinit nozomi_card_init(struct pci_dev *pdev,
1464 dc->state = NOZOMI_STATE_ENABLED; 1472 dc->state = NOZOMI_STATE_ENABLED;
1465 1473
1466 for (i = 0; i < MAX_PORT; i++) { 1474 for (i = 0; i < MAX_PORT; i++) {
1475 struct device *tty_dev;
1476
1467 mutex_init(&dc->port[i].tty_sem); 1477 mutex_init(&dc->port[i].tty_sem);
1468 tty_port_init(&dc->port[i].port); 1478 tty_port_init(&dc->port[i].port);
1469 tty_register_device(ntty_driver, dc->index_start + i, 1479 tty_dev = tty_register_device(ntty_driver, dc->index_start + i,
1470 &pdev->dev); 1480 &pdev->dev);
1481
1482 if (IS_ERR(tty_dev)) {
1483 ret = PTR_ERR(tty_dev);
1484 dev_err(&pdev->dev, "Could not allocate tty?\n");
1485 goto err_free_tty;
1486 }
1471 } 1487 }
1488
1472 return 0; 1489 return 0;
1473 1490
1491err_free_tty:
1492 for (i = dc->index_start; i < dc->index_start + MAX_PORT; ++i)
1493 tty_unregister_device(ntty_driver, i);
1494err_free_kfifo:
1495 for (i = 0; i < MAX_PORT; i++)
1496 kfifo_free(&dc->port[i].fifo_ul);
1474err_free_sbuf: 1497err_free_sbuf:
1475 kfree(dc->send_buf); 1498 kfree(dc->send_buf);
1476 iounmap(dc->base_addr); 1499 iounmap(dc->base_addr);
@@ -1536,8 +1559,7 @@ static void __devexit nozomi_card_exit(struct pci_dev *pdev)
1536 free_irq(pdev->irq, dc); 1559 free_irq(pdev->irq, dc);
1537 1560
1538 for (i = 0; i < MAX_PORT; i++) 1561 for (i = 0; i < MAX_PORT; i++)
1539 if (dc->port[i].fifo_ul) 1562 kfifo_free(&dc->port[i].fifo_ul);
1540 kfifo_free(dc->port[i].fifo_ul);
1541 1563
1542 kfree(dc->send_buf); 1564 kfree(dc->send_buf);
1543 1565
@@ -1629,10 +1651,10 @@ static void ntty_close(struct tty_struct *tty, struct file *file)
1629 1651
1630 dc->open_ttys--; 1652 dc->open_ttys--;
1631 port->count--; 1653 port->count--;
1632 tty_port_tty_set(port, NULL);
1633 1654
1634 if (port->count == 0) { 1655 if (port->count == 0) {
1635 DBG1("close: %d", nport->token_dl); 1656 DBG1("close: %d", nport->token_dl);
1657 tty_port_tty_set(port, NULL);
1636 spin_lock_irqsave(&dc->spin_mutex, flags); 1658 spin_lock_irqsave(&dc->spin_mutex, flags);
1637 dc->last_ier &= ~(nport->token_dl); 1659 dc->last_ier &= ~(nport->token_dl);
1638 writew(dc->last_ier, dc->reg_ier); 1660 writew(dc->last_ier, dc->reg_ier);
@@ -1673,7 +1695,7 @@ static int ntty_write(struct tty_struct *tty, const unsigned char *buffer,
1673 goto exit; 1695 goto exit;
1674 } 1696 }
1675 1697
1676 rval = __kfifo_put(port->fifo_ul, (unsigned char *)buffer, count); 1698 rval = kfifo_in(&port->fifo_ul, (unsigned char *)buffer, count);
1677 1699
1678 /* notify card */ 1700 /* notify card */
1679 if (unlikely(dc == NULL)) { 1701 if (unlikely(dc == NULL)) {
@@ -1721,7 +1743,7 @@ static int ntty_write_room(struct tty_struct *tty)
1721 if (!port->port.count) 1743 if (!port->port.count)
1722 goto exit; 1744 goto exit;
1723 1745
1724 room = port->fifo_ul->size - __kfifo_len(port->fifo_ul); 1746 room = port->fifo_ul.size - kfifo_len(&port->fifo_ul);
1725 1747
1726exit: 1748exit:
1727 mutex_unlock(&port->tty_sem); 1749 mutex_unlock(&port->tty_sem);
@@ -1878,7 +1900,7 @@ static s32 ntty_chars_in_buffer(struct tty_struct *tty)
1878 goto exit_in_buffer; 1900 goto exit_in_buffer;
1879 } 1901 }
1880 1902
1881 rval = __kfifo_len(port->fifo_ul); 1903 rval = kfifo_len(&port->fifo_ul);
1882 1904
1883exit_in_buffer: 1905exit_in_buffer:
1884 return rval; 1906 return rval;
diff --git a/drivers/char/nwflash.c b/drivers/char/nwflash.c
index 8c7df5ba088f..f80810901db6 100644
--- a/drivers/char/nwflash.c
+++ b/drivers/char/nwflash.c
@@ -27,6 +27,7 @@
27#include <linux/init.h> 27#include <linux/init.h>
28#include <linux/smp_lock.h> 28#include <linux/smp_lock.h>
29#include <linux/mutex.h> 29#include <linux/mutex.h>
30#include <linux/jiffies.h>
30 31
31#include <asm/hardware/dec21285.h> 32#include <asm/hardware/dec21285.h>
32#include <asm/io.h> 33#include <asm/io.h>
diff --git a/drivers/char/random.c b/drivers/char/random.c
index 8258982b49ec..2849713d2231 100644
--- a/drivers/char/random.c
+++ b/drivers/char/random.c
@@ -1051,12 +1051,6 @@ random_read(struct file *file, char __user *buf, size_t nbytes, loff_t *ppos)
1051 /* like a named pipe */ 1051 /* like a named pipe */
1052 } 1052 }
1053 1053
1054 /*
1055 * If we gave the user some bytes, update the access time.
1056 */
1057 if (count)
1058 file_accessed(file);
1059
1060 return (count ? count : retval); 1054 return (count ? count : retval);
1061} 1055}
1062 1056
@@ -1107,7 +1101,6 @@ static ssize_t random_write(struct file *file, const char __user *buffer,
1107 size_t count, loff_t *ppos) 1101 size_t count, loff_t *ppos)
1108{ 1102{
1109 size_t ret; 1103 size_t ret;
1110 struct inode *inode = file->f_path.dentry->d_inode;
1111 1104
1112 ret = write_pool(&blocking_pool, buffer, count); 1105 ret = write_pool(&blocking_pool, buffer, count);
1113 if (ret) 1106 if (ret)
@@ -1116,8 +1109,6 @@ static ssize_t random_write(struct file *file, const char __user *buffer,
1116 if (ret) 1109 if (ret)
1117 return ret; 1110 return ret;
1118 1111
1119 inode->i_mtime = current_fs_time(inode->i_sb);
1120 mark_inode_dirty(inode);
1121 return (ssize_t)count; 1112 return (ssize_t)count;
1122} 1113}
1123 1114
diff --git a/drivers/char/sonypi.c b/drivers/char/sonypi.c
index 8c262aaf7c26..bba727c3807e 100644
--- a/drivers/char/sonypi.c
+++ b/drivers/char/sonypi.c
@@ -50,7 +50,6 @@
50#include <linux/err.h> 50#include <linux/err.h>
51#include <linux/kfifo.h> 51#include <linux/kfifo.h>
52#include <linux/platform_device.h> 52#include <linux/platform_device.h>
53#include <linux/smp_lock.h>
54 53
55#include <asm/uaccess.h> 54#include <asm/uaccess.h>
56#include <asm/io.h> 55#include <asm/io.h>
@@ -487,7 +486,7 @@ static struct sonypi_device {
487 int camera_power; 486 int camera_power;
488 int bluetooth_power; 487 int bluetooth_power;
489 struct mutex lock; 488 struct mutex lock;
490 struct kfifo *fifo; 489 struct kfifo fifo;
491 spinlock_t fifo_lock; 490 spinlock_t fifo_lock;
492 wait_queue_head_t fifo_proc_list; 491 wait_queue_head_t fifo_proc_list;
493 struct fasync_struct *fifo_async; 492 struct fasync_struct *fifo_async;
@@ -496,7 +495,7 @@ static struct sonypi_device {
496 struct input_dev *input_jog_dev; 495 struct input_dev *input_jog_dev;
497 struct input_dev *input_key_dev; 496 struct input_dev *input_key_dev;
498 struct work_struct input_work; 497 struct work_struct input_work;
499 struct kfifo *input_fifo; 498 struct kfifo input_fifo;
500 spinlock_t input_fifo_lock; 499 spinlock_t input_fifo_lock;
501} sonypi_device; 500} sonypi_device;
502 501
@@ -777,8 +776,9 @@ static void input_keyrelease(struct work_struct *work)
777{ 776{
778 struct sonypi_keypress kp; 777 struct sonypi_keypress kp;
779 778
780 while (kfifo_get(sonypi_device.input_fifo, (unsigned char *)&kp, 779 while (kfifo_out_locked(&sonypi_device.input_fifo, (unsigned char *)&kp,
781 sizeof(kp)) == sizeof(kp)) { 780 sizeof(kp), &sonypi_device.input_fifo_lock)
781 == sizeof(kp)) {
782 msleep(10); 782 msleep(10);
783 input_report_key(kp.dev, kp.key, 0); 783 input_report_key(kp.dev, kp.key, 0);
784 input_sync(kp.dev); 784 input_sync(kp.dev);
@@ -827,8 +827,9 @@ static void sonypi_report_input_event(u8 event)
827 if (kp.dev) { 827 if (kp.dev) {
828 input_report_key(kp.dev, kp.key, 1); 828 input_report_key(kp.dev, kp.key, 1);
829 input_sync(kp.dev); 829 input_sync(kp.dev);
830 kfifo_put(sonypi_device.input_fifo, 830 kfifo_in_locked(&sonypi_device.input_fifo,
831 (unsigned char *)&kp, sizeof(kp)); 831 (unsigned char *)&kp, sizeof(kp),
832 &sonypi_device.input_fifo_lock);
832 schedule_work(&sonypi_device.input_work); 833 schedule_work(&sonypi_device.input_work);
833 } 834 }
834} 835}
@@ -880,7 +881,8 @@ found:
880 acpi_bus_generate_proc_event(sonypi_acpi_device, 1, event); 881 acpi_bus_generate_proc_event(sonypi_acpi_device, 1, event);
881#endif 882#endif
882 883
883 kfifo_put(sonypi_device.fifo, (unsigned char *)&event, sizeof(event)); 884 kfifo_in_locked(&sonypi_device.fifo, (unsigned char *)&event,
885 sizeof(event), &sonypi_device.fifo_lock);
884 kill_fasync(&sonypi_device.fifo_async, SIGIO, POLL_IN); 886 kill_fasync(&sonypi_device.fifo_async, SIGIO, POLL_IN);
885 wake_up_interruptible(&sonypi_device.fifo_proc_list); 887 wake_up_interruptible(&sonypi_device.fifo_proc_list);
886 888
@@ -902,14 +904,13 @@ static int sonypi_misc_release(struct inode *inode, struct file *file)
902 904
903static int sonypi_misc_open(struct inode *inode, struct file *file) 905static int sonypi_misc_open(struct inode *inode, struct file *file)
904{ 906{
905 lock_kernel();
906 mutex_lock(&sonypi_device.lock); 907 mutex_lock(&sonypi_device.lock);
907 /* Flush input queue on first open */ 908 /* Flush input queue on first open */
908 if (!sonypi_device.open_count) 909 if (!sonypi_device.open_count)
909 kfifo_reset(sonypi_device.fifo); 910 kfifo_reset(&sonypi_device.fifo);
910 sonypi_device.open_count++; 911 sonypi_device.open_count++;
911 mutex_unlock(&sonypi_device.lock); 912 mutex_unlock(&sonypi_device.lock);
912 unlock_kernel(); 913
913 return 0; 914 return 0;
914} 915}
915 916
@@ -919,17 +920,18 @@ static ssize_t sonypi_misc_read(struct file *file, char __user *buf,
919 ssize_t ret; 920 ssize_t ret;
920 unsigned char c; 921 unsigned char c;
921 922
922 if ((kfifo_len(sonypi_device.fifo) == 0) && 923 if ((kfifo_len(&sonypi_device.fifo) == 0) &&
923 (file->f_flags & O_NONBLOCK)) 924 (file->f_flags & O_NONBLOCK))
924 return -EAGAIN; 925 return -EAGAIN;
925 926
926 ret = wait_event_interruptible(sonypi_device.fifo_proc_list, 927 ret = wait_event_interruptible(sonypi_device.fifo_proc_list,
927 kfifo_len(sonypi_device.fifo) != 0); 928 kfifo_len(&sonypi_device.fifo) != 0);
928 if (ret) 929 if (ret)
929 return ret; 930 return ret;
930 931
931 while (ret < count && 932 while (ret < count &&
932 (kfifo_get(sonypi_device.fifo, &c, sizeof(c)) == sizeof(c))) { 933 (kfifo_out_locked(&sonypi_device.fifo, &c, sizeof(c),
934 &sonypi_device.fifo_lock) == sizeof(c))) {
933 if (put_user(c, buf++)) 935 if (put_user(c, buf++))
934 return -EFAULT; 936 return -EFAULT;
935 ret++; 937 ret++;
@@ -946,15 +948,15 @@ static ssize_t sonypi_misc_read(struct file *file, char __user *buf,
946static unsigned int sonypi_misc_poll(struct file *file, poll_table *wait) 948static unsigned int sonypi_misc_poll(struct file *file, poll_table *wait)
947{ 949{
948 poll_wait(file, &sonypi_device.fifo_proc_list, wait); 950 poll_wait(file, &sonypi_device.fifo_proc_list, wait);
949 if (kfifo_len(sonypi_device.fifo)) 951 if (kfifo_len(&sonypi_device.fifo))
950 return POLLIN | POLLRDNORM; 952 return POLLIN | POLLRDNORM;
951 return 0; 953 return 0;
952} 954}
953 955
954static int sonypi_misc_ioctl(struct inode *ip, struct file *fp, 956static long sonypi_misc_ioctl(struct file *fp,
955 unsigned int cmd, unsigned long arg) 957 unsigned int cmd, unsigned long arg)
956{ 958{
957 int ret = 0; 959 long ret = 0;
958 void __user *argp = (void __user *)arg; 960 void __user *argp = (void __user *)arg;
959 u8 val8; 961 u8 val8;
960 u16 val16; 962 u16 val16;
@@ -1070,7 +1072,8 @@ static const struct file_operations sonypi_misc_fops = {
1070 .open = sonypi_misc_open, 1072 .open = sonypi_misc_open,
1071 .release = sonypi_misc_release, 1073 .release = sonypi_misc_release,
1072 .fasync = sonypi_misc_fasync, 1074 .fasync = sonypi_misc_fasync,
1073 .ioctl = sonypi_misc_ioctl, 1075 .unlocked_ioctl = sonypi_misc_ioctl,
1076 .llseek = no_llseek,
1074}; 1077};
1075 1078
1076static struct miscdevice sonypi_misc_device = { 1079static struct miscdevice sonypi_misc_device = {
@@ -1313,11 +1316,10 @@ static int __devinit sonypi_probe(struct platform_device *dev)
1313 "http://www.linux.it/~malattia/wiki/index.php/Sony_drivers\n"); 1316 "http://www.linux.it/~malattia/wiki/index.php/Sony_drivers\n");
1314 1317
1315 spin_lock_init(&sonypi_device.fifo_lock); 1318 spin_lock_init(&sonypi_device.fifo_lock);
1316 sonypi_device.fifo = kfifo_alloc(SONYPI_BUF_SIZE, GFP_KERNEL, 1319 error = kfifo_alloc(&sonypi_device.fifo, SONYPI_BUF_SIZE, GFP_KERNEL);
1317 &sonypi_device.fifo_lock); 1320 if (error) {
1318 if (IS_ERR(sonypi_device.fifo)) {
1319 printk(KERN_ERR "sonypi: kfifo_alloc failed\n"); 1321 printk(KERN_ERR "sonypi: kfifo_alloc failed\n");
1320 return PTR_ERR(sonypi_device.fifo); 1322 return error;
1321 } 1323 }
1322 1324
1323 init_waitqueue_head(&sonypi_device.fifo_proc_list); 1325 init_waitqueue_head(&sonypi_device.fifo_proc_list);
@@ -1393,12 +1395,10 @@ static int __devinit sonypi_probe(struct platform_device *dev)
1393 } 1395 }
1394 1396
1395 spin_lock_init(&sonypi_device.input_fifo_lock); 1397 spin_lock_init(&sonypi_device.input_fifo_lock);
1396 sonypi_device.input_fifo = 1398 error = kfifo_alloc(&sonypi_device.input_fifo, SONYPI_BUF_SIZE,
1397 kfifo_alloc(SONYPI_BUF_SIZE, GFP_KERNEL, 1399 GFP_KERNEL);
1398 &sonypi_device.input_fifo_lock); 1400 if (error) {
1399 if (IS_ERR(sonypi_device.input_fifo)) {
1400 printk(KERN_ERR "sonypi: kfifo_alloc failed\n"); 1401 printk(KERN_ERR "sonypi: kfifo_alloc failed\n");
1401 error = PTR_ERR(sonypi_device.input_fifo);
1402 goto err_inpdev_unregister; 1402 goto err_inpdev_unregister;
1403 } 1403 }
1404 1404
@@ -1423,7 +1423,7 @@ static int __devinit sonypi_probe(struct platform_device *dev)
1423 pci_disable_device(pcidev); 1423 pci_disable_device(pcidev);
1424 err_put_pcidev: 1424 err_put_pcidev:
1425 pci_dev_put(pcidev); 1425 pci_dev_put(pcidev);
1426 kfifo_free(sonypi_device.fifo); 1426 kfifo_free(&sonypi_device.fifo);
1427 1427
1428 return error; 1428 return error;
1429} 1429}
@@ -1438,7 +1438,7 @@ static int __devexit sonypi_remove(struct platform_device *dev)
1438 if (useinput) { 1438 if (useinput) {
1439 input_unregister_device(sonypi_device.input_key_dev); 1439 input_unregister_device(sonypi_device.input_key_dev);
1440 input_unregister_device(sonypi_device.input_jog_dev); 1440 input_unregister_device(sonypi_device.input_jog_dev);
1441 kfifo_free(sonypi_device.input_fifo); 1441 kfifo_free(&sonypi_device.input_fifo);
1442 } 1442 }
1443 1443
1444 misc_deregister(&sonypi_misc_device); 1444 misc_deregister(&sonypi_misc_device);
@@ -1451,7 +1451,7 @@ static int __devexit sonypi_remove(struct platform_device *dev)
1451 pci_dev_put(sonypi_device.dev); 1451 pci_dev_put(sonypi_device.dev);
1452 } 1452 }
1453 1453
1454 kfifo_free(sonypi_device.fifo); 1454 kfifo_free(&sonypi_device.fifo);
1455 1455
1456 return 0; 1456 return 0;
1457} 1457}
diff --git a/drivers/char/toshiba.c b/drivers/char/toshiba.c
index 663cd15d7c78..f8bc79f6de34 100644
--- a/drivers/char/toshiba.c
+++ b/drivers/char/toshiba.c
@@ -68,7 +68,7 @@
68#include <linux/stat.h> 68#include <linux/stat.h>
69#include <linux/proc_fs.h> 69#include <linux/proc_fs.h>
70#include <linux/seq_file.h> 70#include <linux/seq_file.h>
71 71#include <linux/smp_lock.h>
72#include <linux/toshiba.h> 72#include <linux/toshiba.h>
73 73
74#define TOSH_MINOR_DEV 181 74#define TOSH_MINOR_DEV 181
@@ -88,13 +88,13 @@ static int tosh_date;
88static int tosh_sci; 88static int tosh_sci;
89static int tosh_fan; 89static int tosh_fan;
90 90
91static int tosh_ioctl(struct inode *, struct file *, unsigned int, 91static long tosh_ioctl(struct file *, unsigned int,
92 unsigned long); 92 unsigned long);
93 93
94 94
95static const struct file_operations tosh_fops = { 95static const struct file_operations tosh_fops = {
96 .owner = THIS_MODULE, 96 .owner = THIS_MODULE,
97 .ioctl = tosh_ioctl, 97 .unlocked_ioctl = tosh_ioctl,
98}; 98};
99 99
100static struct miscdevice tosh_device = { 100static struct miscdevice tosh_device = {
@@ -252,8 +252,7 @@ int tosh_smm(SMMRegisters *regs)
252EXPORT_SYMBOL(tosh_smm); 252EXPORT_SYMBOL(tosh_smm);
253 253
254 254
255static int tosh_ioctl(struct inode *ip, struct file *fp, unsigned int cmd, 255static long tosh_ioctl(struct file *fp, unsigned int cmd, unsigned long arg)
256 unsigned long arg)
257{ 256{
258 SMMRegisters regs; 257 SMMRegisters regs;
259 SMMRegisters __user *argp = (SMMRegisters __user *)arg; 258 SMMRegisters __user *argp = (SMMRegisters __user *)arg;
@@ -275,13 +274,16 @@ static int tosh_ioctl(struct inode *ip, struct file *fp, unsigned int cmd,
275 return -EINVAL; 274 return -EINVAL;
276 275
277 /* do we need to emulate the fan ? */ 276 /* do we need to emulate the fan ? */
277 lock_kernel();
278 if (tosh_fan==1) { 278 if (tosh_fan==1) {
279 if (((ax==0xf300) || (ax==0xf400)) && (bx==0x0004)) { 279 if (((ax==0xf300) || (ax==0xf400)) && (bx==0x0004)) {
280 err = tosh_emulate_fan(&regs); 280 err = tosh_emulate_fan(&regs);
281 unlock_kernel();
281 break; 282 break;
282 } 283 }
283 } 284 }
284 err = tosh_smm(&regs); 285 err = tosh_smm(&regs);
286 unlock_kernel();
285 break; 287 break;
286 default: 288 default:
287 return -EINVAL; 289 return -EINVAL;
diff --git a/drivers/char/tpm/tpm_infineon.c b/drivers/char/tpm/tpm_infineon.c
index ecba4942fc8e..f58440791e65 100644
--- a/drivers/char/tpm/tpm_infineon.c
+++ b/drivers/char/tpm/tpm_infineon.c
@@ -39,12 +39,12 @@
39struct tpm_inf_dev { 39struct tpm_inf_dev {
40 int iotype; 40 int iotype;
41 41
42 void __iomem *mem_base; /* MMIO ioremap'd addr */ 42 void __iomem *mem_base; /* MMIO ioremap'd addr */
43 unsigned long map_base; /* phys MMIO base */ 43 unsigned long map_base; /* phys MMIO base */
44 unsigned long map_size; /* MMIO region size */ 44 unsigned long map_size; /* MMIO region size */
45 unsigned int index_off; /* index register offset */ 45 unsigned int index_off; /* index register offset */
46 46
47 unsigned int data_regs; /* Data registers */ 47 unsigned int data_regs; /* Data registers */
48 unsigned int data_size; 48 unsigned int data_size;
49 49
50 unsigned int config_port; /* IO Port config index reg */ 50 unsigned int config_port; /* IO Port config index reg */
@@ -406,14 +406,14 @@ static const struct tpm_vendor_specific tpm_inf = {
406 .miscdev = {.fops = &inf_ops,}, 406 .miscdev = {.fops = &inf_ops,},
407}; 407};
408 408
409static const struct pnp_device_id tpm_pnp_tbl[] = { 409static const struct pnp_device_id tpm_inf_pnp_tbl[] = {
410 /* Infineon TPMs */ 410 /* Infineon TPMs */
411 {"IFX0101", 0}, 411 {"IFX0101", 0},
412 {"IFX0102", 0}, 412 {"IFX0102", 0},
413 {"", 0} 413 {"", 0}
414}; 414};
415 415
416MODULE_DEVICE_TABLE(pnp, tpm_pnp_tbl); 416MODULE_DEVICE_TABLE(pnp, tpm_inf_pnp_tbl);
417 417
418static int __devinit tpm_inf_pnp_probe(struct pnp_dev *dev, 418static int __devinit tpm_inf_pnp_probe(struct pnp_dev *dev,
419 const struct pnp_device_id *dev_id) 419 const struct pnp_device_id *dev_id)
@@ -430,7 +430,7 @@ static int __devinit tpm_inf_pnp_probe(struct pnp_dev *dev,
430 if (pnp_port_valid(dev, 0) && pnp_port_valid(dev, 1) && 430 if (pnp_port_valid(dev, 0) && pnp_port_valid(dev, 1) &&
431 !(pnp_port_flags(dev, 0) & IORESOURCE_DISABLED)) { 431 !(pnp_port_flags(dev, 0) & IORESOURCE_DISABLED)) {
432 432
433 tpm_dev.iotype = TPM_INF_IO_PORT; 433 tpm_dev.iotype = TPM_INF_IO_PORT;
434 434
435 tpm_dev.config_port = pnp_port_start(dev, 0); 435 tpm_dev.config_port = pnp_port_start(dev, 0);
436 tpm_dev.config_size = pnp_port_len(dev, 0); 436 tpm_dev.config_size = pnp_port_len(dev, 0);
@@ -459,9 +459,9 @@ static int __devinit tpm_inf_pnp_probe(struct pnp_dev *dev,
459 goto err_last; 459 goto err_last;
460 } 460 }
461 } else if (pnp_mem_valid(dev, 0) && 461 } else if (pnp_mem_valid(dev, 0) &&
462 !(pnp_mem_flags(dev, 0) & IORESOURCE_DISABLED)) { 462 !(pnp_mem_flags(dev, 0) & IORESOURCE_DISABLED)) {
463 463
464 tpm_dev.iotype = TPM_INF_IO_MEM; 464 tpm_dev.iotype = TPM_INF_IO_MEM;
465 465
466 tpm_dev.map_base = pnp_mem_start(dev, 0); 466 tpm_dev.map_base = pnp_mem_start(dev, 0);
467 tpm_dev.map_size = pnp_mem_len(dev, 0); 467 tpm_dev.map_size = pnp_mem_len(dev, 0);
@@ -563,11 +563,11 @@ static int __devinit tpm_inf_pnp_probe(struct pnp_dev *dev,
563 "product id 0x%02x%02x" 563 "product id 0x%02x%02x"
564 "%s\n", 564 "%s\n",
565 tpm_dev.iotype == TPM_INF_IO_PORT ? 565 tpm_dev.iotype == TPM_INF_IO_PORT ?
566 tpm_dev.config_port : 566 tpm_dev.config_port :
567 tpm_dev.map_base + tpm_dev.index_off, 567 tpm_dev.map_base + tpm_dev.index_off,
568 tpm_dev.iotype == TPM_INF_IO_PORT ? 568 tpm_dev.iotype == TPM_INF_IO_PORT ?
569 tpm_dev.data_regs : 569 tpm_dev.data_regs :
570 tpm_dev.map_base + tpm_dev.data_regs, 570 tpm_dev.map_base + tpm_dev.data_regs,
571 version[0], version[1], 571 version[0], version[1],
572 vendorid[0], vendorid[1], 572 vendorid[0], vendorid[1],
573 productid[0], productid[1], chipname); 573 productid[0], productid[1], chipname);
@@ -607,20 +607,55 @@ static __devexit void tpm_inf_pnp_remove(struct pnp_dev *dev)
607 iounmap(tpm_dev.mem_base); 607 iounmap(tpm_dev.mem_base);
608 release_mem_region(tpm_dev.map_base, tpm_dev.map_size); 608 release_mem_region(tpm_dev.map_base, tpm_dev.map_size);
609 } 609 }
610 tpm_dev_vendor_release(chip);
610 tpm_remove_hardware(chip->dev); 611 tpm_remove_hardware(chip->dev);
611 } 612 }
612} 613}
613 614
615static int tpm_inf_pnp_suspend(struct pnp_dev *dev, pm_message_t pm_state)
616{
617 struct tpm_chip *chip = pnp_get_drvdata(dev);
618 int rc;
619 if (chip) {
620 u8 savestate[] = {
621 0, 193, /* TPM_TAG_RQU_COMMAND */
622 0, 0, 0, 10, /* blob length (in bytes) */
623 0, 0, 0, 152 /* TPM_ORD_SaveState */
624 };
625 dev_info(&dev->dev, "saving TPM state\n");
626 rc = tpm_inf_send(chip, savestate, sizeof(savestate));
627 if (rc < 0) {
628 dev_err(&dev->dev, "error while saving TPM state\n");
629 return rc;
630 }
631 }
632 return 0;
633}
634
635static int tpm_inf_pnp_resume(struct pnp_dev *dev)
636{
637 /* Re-configure TPM after suspending */
638 tpm_config_out(ENABLE_REGISTER_PAIR, TPM_INF_ADDR);
639 tpm_config_out(IOLIMH, TPM_INF_ADDR);
640 tpm_config_out((tpm_dev.data_regs >> 8) & 0xff, TPM_INF_DATA);
641 tpm_config_out(IOLIML, TPM_INF_ADDR);
642 tpm_config_out((tpm_dev.data_regs & 0xff), TPM_INF_DATA);
643 /* activate register */
644 tpm_config_out(TPM_DAR, TPM_INF_ADDR);
645 tpm_config_out(0x01, TPM_INF_DATA);
646 tpm_config_out(DISABLE_REGISTER_PAIR, TPM_INF_ADDR);
647 /* disable RESET, LP and IRQC */
648 tpm_data_out(RESET_LP_IRQC_DISABLE, CMD);
649 return tpm_pm_resume(&dev->dev);
650}
651
614static struct pnp_driver tpm_inf_pnp_driver = { 652static struct pnp_driver tpm_inf_pnp_driver = {
615 .name = "tpm_inf_pnp", 653 .name = "tpm_inf_pnp",
616 .driver = { 654 .id_table = tpm_inf_pnp_tbl,
617 .owner = THIS_MODULE,
618 .suspend = tpm_pm_suspend,
619 .resume = tpm_pm_resume,
620 },
621 .id_table = tpm_pnp_tbl,
622 .probe = tpm_inf_pnp_probe, 655 .probe = tpm_inf_pnp_probe,
623 .remove = __devexit_p(tpm_inf_pnp_remove), 656 .suspend = tpm_inf_pnp_suspend,
657 .resume = tpm_inf_pnp_resume,
658 .remove = __devexit_p(tpm_inf_pnp_remove)
624}; 659};
625 660
626static int __init init_inf(void) 661static int __init init_inf(void)
@@ -638,5 +673,5 @@ module_exit(cleanup_inf);
638 673
639MODULE_AUTHOR("Marcel Selhorst <m.selhorst@sirrix.com>"); 674MODULE_AUTHOR("Marcel Selhorst <m.selhorst@sirrix.com>");
640MODULE_DESCRIPTION("Driver for Infineon TPM SLD 9630 TT 1.1 / SLB 9635 TT 1.2"); 675MODULE_DESCRIPTION("Driver for Infineon TPM SLD 9630 TT 1.1 / SLB 9635 TT 1.2");
641MODULE_VERSION("1.9"); 676MODULE_VERSION("1.9.2");
642MODULE_LICENSE("GPL"); 677MODULE_LICENSE("GPL");
diff --git a/drivers/char/tty_io.c b/drivers/char/tty_io.c
index f15df40bc318..dcb9083ecde0 100644
--- a/drivers/char/tty_io.c
+++ b/drivers/char/tty_io.c
@@ -1951,8 +1951,10 @@ static int tty_fasync(int fd, struct file *filp, int on)
1951 pid = task_pid(current); 1951 pid = task_pid(current);
1952 type = PIDTYPE_PID; 1952 type = PIDTYPE_PID;
1953 } 1953 }
1954 get_pid(pid);
1954 spin_unlock_irqrestore(&tty->ctrl_lock, flags); 1955 spin_unlock_irqrestore(&tty->ctrl_lock, flags);
1955 retval = __f_setown(filp, pid, type, 0); 1956 retval = __f_setown(filp, pid, type, 0);
1957 put_pid(pid);
1956 if (retval) 1958 if (retval)
1957 goto out; 1959 goto out;
1958 } else { 1960 } else {
diff --git a/drivers/char/uv_mmtimer.c b/drivers/char/uv_mmtimer.c
index 867b67be9f0a..c7072ba14f48 100644
--- a/drivers/char/uv_mmtimer.c
+++ b/drivers/char/uv_mmtimer.c
@@ -89,13 +89,17 @@ static long uv_mmtimer_ioctl(struct file *file, unsigned int cmd,
89 switch (cmd) { 89 switch (cmd) {
90 case MMTIMER_GETOFFSET: /* offset of the counter */ 90 case MMTIMER_GETOFFSET: /* offset of the counter */
91 /* 91 /*
92 * UV RTC register is on its own page 92 * Starting with HUB rev 2.0, the UV RTC register is
93 * replicated across all cachelines of it's own page.
94 * This allows faster simultaneous reads from a given socket.
95 *
96 * The offset returned is in 64 bit units.
93 */ 97 */
94 if (PAGE_SIZE <= (1 << 16)) 98 if (uv_get_min_hub_revision_id() == 1)
95 ret = ((UV_LOCAL_MMR_BASE | UVH_RTC) & (PAGE_SIZE-1)) 99 ret = 0;
96 / 8;
97 else 100 else
98 ret = -ENOSYS; 101 ret = ((uv_blade_processor_id() * L1_CACHE_BYTES) %
102 PAGE_SIZE) / 8;
99 break; 103 break;
100 104
101 case MMTIMER_GETRES: /* resolution of the clock in 10^-15 s */ 105 case MMTIMER_GETRES: /* resolution of the clock in 10^-15 s */
@@ -115,8 +119,8 @@ static long uv_mmtimer_ioctl(struct file *file, unsigned int cmd,
115 ret = hweight64(UVH_RTC_REAL_TIME_CLOCK_MASK); 119 ret = hweight64(UVH_RTC_REAL_TIME_CLOCK_MASK);
116 break; 120 break;
117 121
118 case MMTIMER_MMAPAVAIL: /* can we mmap the clock into userspace? */ 122 case MMTIMER_MMAPAVAIL:
119 ret = (PAGE_SIZE <= (1 << 16)) ? 1 : 0; 123 ret = 1;
120 break; 124 break;
121 125
122 case MMTIMER_GETCOUNTER: 126 case MMTIMER_GETCOUNTER:
diff --git a/drivers/clocksource/cs5535-clockevt.c b/drivers/clocksource/cs5535-clockevt.c
index 27d20fac19d1..b314a999aabe 100644
--- a/drivers/clocksource/cs5535-clockevt.c
+++ b/drivers/clocksource/cs5535-clockevt.c
@@ -21,7 +21,7 @@
21 21
22#define DRV_NAME "cs5535-clockevt" 22#define DRV_NAME "cs5535-clockevt"
23 23
24static int timer_irq = CONFIG_CS5535_MFGPT_DEFAULT_IRQ; 24static int timer_irq;
25module_param_named(irq, timer_irq, int, 0644); 25module_param_named(irq, timer_irq, int, 0644);
26MODULE_PARM_DESC(irq, "Which IRQ to use for the clock source MFGPT ticks."); 26MODULE_PARM_DESC(irq, "Which IRQ to use for the clock source MFGPT ticks.");
27 27
diff --git a/drivers/connector/connector.c b/drivers/connector/connector.c
index f06024668f99..537c29ac4487 100644
--- a/drivers/connector/connector.c
+++ b/drivers/connector/connector.c
@@ -36,17 +36,6 @@ MODULE_LICENSE("GPL");
36MODULE_AUTHOR("Evgeniy Polyakov <zbr@ioremap.net>"); 36MODULE_AUTHOR("Evgeniy Polyakov <zbr@ioremap.net>");
37MODULE_DESCRIPTION("Generic userspace <-> kernelspace connector."); 37MODULE_DESCRIPTION("Generic userspace <-> kernelspace connector.");
38 38
39static u32 cn_idx = CN_IDX_CONNECTOR;
40static u32 cn_val = CN_VAL_CONNECTOR;
41
42module_param(cn_idx, uint, 0);
43module_param(cn_val, uint, 0);
44MODULE_PARM_DESC(cn_idx, "Connector's main device idx.");
45MODULE_PARM_DESC(cn_val, "Connector's main device val.");
46
47static DEFINE_MUTEX(notify_lock);
48static LIST_HEAD(notify_list);
49
50static struct cn_dev cdev; 39static struct cn_dev cdev;
51 40
52static int cn_already_initialized; 41static int cn_already_initialized;
@@ -210,54 +199,6 @@ static void cn_rx_skb(struct sk_buff *__skb)
210} 199}
211 200
212/* 201/*
213 * Notification routing.
214 *
215 * Gets id and checks if there are notification request for it's idx
216 * and val. If there are such requests notify the listeners with the
217 * given notify event.
218 *
219 */
220static void cn_notify(struct cb_id *id, u32 notify_event)
221{
222 struct cn_ctl_entry *ent;
223
224 mutex_lock(&notify_lock);
225 list_for_each_entry(ent, &notify_list, notify_entry) {
226 int i;
227 struct cn_notify_req *req;
228 struct cn_ctl_msg *ctl = ent->msg;
229 int idx_found, val_found;
230
231 idx_found = val_found = 0;
232
233 req = (struct cn_notify_req *)ctl->data;
234 for (i = 0; i < ctl->idx_notify_num; ++i, ++req) {
235 if (id->idx >= req->first &&
236 id->idx < req->first + req->range) {
237 idx_found = 1;
238 break;
239 }
240 }
241
242 for (i = 0; i < ctl->val_notify_num; ++i, ++req) {
243 if (id->val >= req->first &&
244 id->val < req->first + req->range) {
245 val_found = 1;
246 break;
247 }
248 }
249
250 if (idx_found && val_found) {
251 struct cn_msg m = { .ack = notify_event, };
252
253 memcpy(&m.id, id, sizeof(m.id));
254 cn_netlink_send(&m, ctl->group, GFP_KERNEL);
255 }
256 }
257 mutex_unlock(&notify_lock);
258}
259
260/*
261 * Callback add routing - adds callback with given ID and name. 202 * Callback add routing - adds callback with given ID and name.
262 * If there is registered callback with the same ID it will not be added. 203 * If there is registered callback with the same ID it will not be added.
263 * 204 *
@@ -276,8 +217,6 @@ int cn_add_callback(struct cb_id *id, char *name,
276 if (err) 217 if (err)
277 return err; 218 return err;
278 219
279 cn_notify(id, 0);
280
281 return 0; 220 return 0;
282} 221}
283EXPORT_SYMBOL_GPL(cn_add_callback); 222EXPORT_SYMBOL_GPL(cn_add_callback);
@@ -295,111 +234,9 @@ void cn_del_callback(struct cb_id *id)
295 struct cn_dev *dev = &cdev; 234 struct cn_dev *dev = &cdev;
296 235
297 cn_queue_del_callback(dev->cbdev, id); 236 cn_queue_del_callback(dev->cbdev, id);
298 cn_notify(id, 1);
299} 237}
300EXPORT_SYMBOL_GPL(cn_del_callback); 238EXPORT_SYMBOL_GPL(cn_del_callback);
301 239
302/*
303 * Checks two connector's control messages to be the same.
304 * Returns 1 if they are the same or if the first one is corrupted.
305 */
306static int cn_ctl_msg_equals(struct cn_ctl_msg *m1, struct cn_ctl_msg *m2)
307{
308 int i;
309 struct cn_notify_req *req1, *req2;
310
311 if (m1->idx_notify_num != m2->idx_notify_num)
312 return 0;
313
314 if (m1->val_notify_num != m2->val_notify_num)
315 return 0;
316
317 if (m1->len != m2->len)
318 return 0;
319
320 if ((m1->idx_notify_num + m1->val_notify_num) * sizeof(*req1) !=
321 m1->len)
322 return 1;
323
324 req1 = (struct cn_notify_req *)m1->data;
325 req2 = (struct cn_notify_req *)m2->data;
326
327 for (i = 0; i < m1->idx_notify_num; ++i) {
328 if (req1->first != req2->first || req1->range != req2->range)
329 return 0;
330 req1++;
331 req2++;
332 }
333
334 for (i = 0; i < m1->val_notify_num; ++i) {
335 if (req1->first != req2->first || req1->range != req2->range)
336 return 0;
337 req1++;
338 req2++;
339 }
340
341 return 1;
342}
343
344/*
345 * Main connector device's callback.
346 *
347 * Used for notification of a request's processing.
348 */
349static void cn_callback(struct cn_msg *msg, struct netlink_skb_parms *nsp)
350{
351 struct cn_ctl_msg *ctl;
352 struct cn_ctl_entry *ent;
353 u32 size;
354
355 if (msg->len < sizeof(*ctl))
356 return;
357
358 ctl = (struct cn_ctl_msg *)msg->data;
359
360 size = (sizeof(*ctl) + ((ctl->idx_notify_num +
361 ctl->val_notify_num) *
362 sizeof(struct cn_notify_req)));
363
364 if (msg->len != size)
365 return;
366
367 if (ctl->len + sizeof(*ctl) != msg->len)
368 return;
369
370 /*
371 * Remove notification.
372 */
373 if (ctl->group == 0) {
374 struct cn_ctl_entry *n;
375
376 mutex_lock(&notify_lock);
377 list_for_each_entry_safe(ent, n, &notify_list, notify_entry) {
378 if (cn_ctl_msg_equals(ent->msg, ctl)) {
379 list_del(&ent->notify_entry);
380 kfree(ent);
381 }
382 }
383 mutex_unlock(&notify_lock);
384
385 return;
386 }
387
388 size += sizeof(*ent);
389
390 ent = kzalloc(size, GFP_KERNEL);
391 if (!ent)
392 return;
393
394 ent->msg = (struct cn_ctl_msg *)(ent + 1);
395
396 memcpy(ent->msg, ctl, size - sizeof(*ent));
397
398 mutex_lock(&notify_lock);
399 list_add(&ent->notify_entry, &notify_list);
400 mutex_unlock(&notify_lock);
401}
402
403static int cn_proc_show(struct seq_file *m, void *v) 240static int cn_proc_show(struct seq_file *m, void *v)
404{ 241{
405 struct cn_queue_dev *dev = cdev.cbdev; 242 struct cn_queue_dev *dev = cdev.cbdev;
@@ -437,11 +274,8 @@ static const struct file_operations cn_file_ops = {
437static int __devinit cn_init(void) 274static int __devinit cn_init(void)
438{ 275{
439 struct cn_dev *dev = &cdev; 276 struct cn_dev *dev = &cdev;
440 int err;
441 277
442 dev->input = cn_rx_skb; 278 dev->input = cn_rx_skb;
443 dev->id.idx = cn_idx;
444 dev->id.val = cn_val;
445 279
446 dev->nls = netlink_kernel_create(&init_net, NETLINK_CONNECTOR, 280 dev->nls = netlink_kernel_create(&init_net, NETLINK_CONNECTOR,
447 CN_NETLINK_USERS + 0xf, 281 CN_NETLINK_USERS + 0xf,
@@ -457,14 +291,6 @@ static int __devinit cn_init(void)
457 291
458 cn_already_initialized = 1; 292 cn_already_initialized = 1;
459 293
460 err = cn_add_callback(&dev->id, "connector", &cn_callback);
461 if (err) {
462 cn_already_initialized = 0;
463 cn_queue_free_dev(dev->cbdev);
464 netlink_kernel_release(dev->nls);
465 return -EINVAL;
466 }
467
468 proc_net_fops_create(&init_net, "connector", S_IRUGO, &cn_file_ops); 294 proc_net_fops_create(&init_net, "connector", S_IRUGO, &cn_file_ops);
469 295
470 return 0; 296 return 0;
@@ -478,7 +304,6 @@ static void __devexit cn_fini(void)
478 304
479 proc_net_remove(&init_net, "connector"); 305 proc_net_remove(&init_net, "connector");
480 306
481 cn_del_callback(&dev->id);
482 cn_queue_free_dev(dev->cbdev); 307 cn_queue_free_dev(dev->cbdev);
483 netlink_kernel_release(dev->nls); 308 netlink_kernel_release(dev->nls);
484} 309}
diff --git a/drivers/cpufreq/cpufreq_ondemand.c b/drivers/cpufreq/cpufreq_ondemand.c
index 4b34ade2332b..bd444dc93cf2 100644
--- a/drivers/cpufreq/cpufreq_ondemand.c
+++ b/drivers/cpufreq/cpufreq_ondemand.c
@@ -554,6 +554,9 @@ static void dbs_check_cpu(struct cpu_dbs_info_s *this_dbs_info)
554 (dbs_tuners_ins.up_threshold - 554 (dbs_tuners_ins.up_threshold -
555 dbs_tuners_ins.down_differential); 555 dbs_tuners_ins.down_differential);
556 556
557 if (freq_next < policy->min)
558 freq_next = policy->min;
559
557 if (!dbs_tuners_ins.powersave_bias) { 560 if (!dbs_tuners_ins.powersave_bias) {
558 __cpufreq_driver_target(policy, freq_next, 561 __cpufreq_driver_target(policy, freq_next,
559 CPUFREQ_RELATION_L); 562 CPUFREQ_RELATION_L);
diff --git a/drivers/cpuidle/governors/menu.c b/drivers/cpuidle/governors/menu.c
index 68104434ebb5..73655aeb3a60 100644
--- a/drivers/cpuidle/governors/menu.c
+++ b/drivers/cpuidle/governors/menu.c
@@ -18,6 +18,7 @@
18#include <linux/hrtimer.h> 18#include <linux/hrtimer.h>
19#include <linux/tick.h> 19#include <linux/tick.h>
20#include <linux/sched.h> 20#include <linux/sched.h>
21#include <linux/math64.h>
21 22
22#define BUCKETS 12 23#define BUCKETS 12
23#define RESOLUTION 1024 24#define RESOLUTION 1024
@@ -169,6 +170,12 @@ static DEFINE_PER_CPU(struct menu_device, menu_devices);
169 170
170static void menu_update(struct cpuidle_device *dev); 171static void menu_update(struct cpuidle_device *dev);
171 172
173/* This implements DIV_ROUND_CLOSEST but avoids 64 bit division */
174static u64 div_round64(u64 dividend, u32 divisor)
175{
176 return div_u64(dividend + (divisor / 2), divisor);
177}
178
172/** 179/**
173 * menu_select - selects the next idle state to enter 180 * menu_select - selects the next idle state to enter
174 * @dev: the CPU 181 * @dev: the CPU
@@ -209,9 +216,8 @@ static int menu_select(struct cpuidle_device *dev)
209 data->correction_factor[data->bucket] = RESOLUTION * DECAY; 216 data->correction_factor[data->bucket] = RESOLUTION * DECAY;
210 217
211 /* Make sure to round up for half microseconds */ 218 /* Make sure to round up for half microseconds */
212 data->predicted_us = DIV_ROUND_CLOSEST( 219 data->predicted_us = div_round64(data->expected_us * data->correction_factor[data->bucket],
213 data->expected_us * data->correction_factor[data->bucket], 220 RESOLUTION * DECAY);
214 RESOLUTION * DECAY);
215 221
216 /* 222 /*
217 * We want to default to C1 (hlt), not to busy polling 223 * We want to default to C1 (hlt), not to busy polling
diff --git a/drivers/crypto/padlock-sha.c b/drivers/crypto/padlock-sha.c
index 0af80577dc7b..d3a27e0119bc 100644
--- a/drivers/crypto/padlock-sha.c
+++ b/drivers/crypto/padlock-sha.c
@@ -57,6 +57,23 @@ static int padlock_sha_update(struct shash_desc *desc,
57 return crypto_shash_update(&dctx->fallback, data, length); 57 return crypto_shash_update(&dctx->fallback, data, length);
58} 58}
59 59
60static int padlock_sha_export(struct shash_desc *desc, void *out)
61{
62 struct padlock_sha_desc *dctx = shash_desc_ctx(desc);
63
64 return crypto_shash_export(&dctx->fallback, out);
65}
66
67static int padlock_sha_import(struct shash_desc *desc, const void *in)
68{
69 struct padlock_sha_desc *dctx = shash_desc_ctx(desc);
70 struct padlock_sha_ctx *ctx = crypto_shash_ctx(desc->tfm);
71
72 dctx->fallback.tfm = ctx->fallback;
73 dctx->fallback.flags = desc->flags & CRYPTO_TFM_REQ_MAY_SLEEP;
74 return crypto_shash_import(&dctx->fallback, in);
75}
76
60static inline void padlock_output_block(uint32_t *src, 77static inline void padlock_output_block(uint32_t *src,
61 uint32_t *dst, size_t count) 78 uint32_t *dst, size_t count)
62{ 79{
@@ -235,7 +252,10 @@ static struct shash_alg sha1_alg = {
235 .update = padlock_sha_update, 252 .update = padlock_sha_update,
236 .finup = padlock_sha1_finup, 253 .finup = padlock_sha1_finup,
237 .final = padlock_sha1_final, 254 .final = padlock_sha1_final,
255 .export = padlock_sha_export,
256 .import = padlock_sha_import,
238 .descsize = sizeof(struct padlock_sha_desc), 257 .descsize = sizeof(struct padlock_sha_desc),
258 .statesize = sizeof(struct sha1_state),
239 .base = { 259 .base = {
240 .cra_name = "sha1", 260 .cra_name = "sha1",
241 .cra_driver_name = "sha1-padlock", 261 .cra_driver_name = "sha1-padlock",
@@ -256,7 +276,10 @@ static struct shash_alg sha256_alg = {
256 .update = padlock_sha_update, 276 .update = padlock_sha_update,
257 .finup = padlock_sha256_finup, 277 .finup = padlock_sha256_finup,
258 .final = padlock_sha256_final, 278 .final = padlock_sha256_final,
279 .export = padlock_sha_export,
280 .import = padlock_sha_import,
259 .descsize = sizeof(struct padlock_sha_desc), 281 .descsize = sizeof(struct padlock_sha_desc),
282 .statesize = sizeof(struct sha256_state),
260 .base = { 283 .base = {
261 .cra_name = "sha256", 284 .cra_name = "sha256",
262 .cra_driver_name = "sha256-padlock", 285 .cra_driver_name = "sha256-padlock",
diff --git a/drivers/dma/Kconfig b/drivers/dma/Kconfig
index eb140ff38c27..e02d74b1e892 100644
--- a/drivers/dma/Kconfig
+++ b/drivers/dma/Kconfig
@@ -111,6 +111,24 @@ config SH_DMAE
111 help 111 help
112 Enable support for the Renesas SuperH DMA controllers. 112 Enable support for the Renesas SuperH DMA controllers.
113 113
114config COH901318
115 bool "ST-Ericsson COH901318 DMA support"
116 select DMA_ENGINE
117 depends on ARCH_U300
118 help
119 Enable support for ST-Ericsson COH 901 318 DMA.
120
121config AMCC_PPC440SPE_ADMA
122 tristate "AMCC PPC440SPe ADMA support"
123 depends on 440SPe || 440SP
124 select DMA_ENGINE
125 select ARCH_HAS_ASYNC_TX_FIND_CHANNEL
126 help
127 Enable support for the AMCC PPC440SPe RAID engines.
128
129config ARCH_HAS_ASYNC_TX_FIND_CHANNEL
130 bool
131
114config DMA_ENGINE 132config DMA_ENGINE
115 bool 133 bool
116 134
diff --git a/drivers/dma/Makefile b/drivers/dma/Makefile
index eca71ba78ae9..807053d48232 100644
--- a/drivers/dma/Makefile
+++ b/drivers/dma/Makefile
@@ -10,3 +10,5 @@ obj-$(CONFIG_AT_HDMAC) += at_hdmac.o
10obj-$(CONFIG_MX3_IPU) += ipu/ 10obj-$(CONFIG_MX3_IPU) += ipu/
11obj-$(CONFIG_TXX9_DMAC) += txx9dmac.o 11obj-$(CONFIG_TXX9_DMAC) += txx9dmac.o
12obj-$(CONFIG_SH_DMAE) += shdma.o 12obj-$(CONFIG_SH_DMAE) += shdma.o
13obj-$(CONFIG_COH901318) += coh901318.o coh901318_lli.o
14obj-$(CONFIG_AMCC_PPC440SPE_ADMA) += ppc4xx/
diff --git a/drivers/dma/at_hdmac.c b/drivers/dma/at_hdmac.c
index f15112569c1d..efc1a61ca231 100644
--- a/drivers/dma/at_hdmac.c
+++ b/drivers/dma/at_hdmac.c
@@ -815,7 +815,7 @@ atc_is_tx_complete(struct dma_chan *chan,
815 dev_vdbg(chan2dev(chan), "is_tx_complete: %d (d%d, u%d)\n", 815 dev_vdbg(chan2dev(chan), "is_tx_complete: %d (d%d, u%d)\n",
816 cookie, done ? *done : 0, used ? *used : 0); 816 cookie, done ? *done : 0, used ? *used : 0);
817 817
818 spin_lock_bh(atchan->lock); 818 spin_lock_bh(&atchan->lock);
819 819
820 last_complete = atchan->completed_cookie; 820 last_complete = atchan->completed_cookie;
821 last_used = chan->cookie; 821 last_used = chan->cookie;
@@ -830,7 +830,7 @@ atc_is_tx_complete(struct dma_chan *chan,
830 ret = dma_async_is_complete(cookie, last_complete, last_used); 830 ret = dma_async_is_complete(cookie, last_complete, last_used);
831 } 831 }
832 832
833 spin_unlock_bh(atchan->lock); 833 spin_unlock_bh(&atchan->lock);
834 834
835 if (done) 835 if (done)
836 *done = last_complete; 836 *done = last_complete;
diff --git a/drivers/dma/coh901318.c b/drivers/dma/coh901318.c
new file mode 100644
index 000000000000..64a937262a40
--- /dev/null
+++ b/drivers/dma/coh901318.c
@@ -0,0 +1,1323 @@
1/*
2 * driver/dma/coh901318.c
3 *
4 * Copyright (C) 2007-2009 ST-Ericsson
5 * License terms: GNU General Public License (GPL) version 2
6 * DMA driver for COH 901 318
7 * Author: Per Friden <per.friden@stericsson.com>
8 */
9
10#include <linux/init.h>
11#include <linux/module.h>
12#include <linux/kernel.h> /* printk() */
13#include <linux/fs.h> /* everything... */
14#include <linux/slab.h> /* kmalloc() */
15#include <linux/dmaengine.h>
16#include <linux/platform_device.h>
17#include <linux/device.h>
18#include <linux/irqreturn.h>
19#include <linux/interrupt.h>
20#include <linux/io.h>
21#include <linux/uaccess.h>
22#include <linux/debugfs.h>
23#include <mach/coh901318.h>
24
25#include "coh901318_lli.h"
26
27#define COHC_2_DEV(cohc) (&cohc->chan.dev->device)
28
29#ifdef VERBOSE_DEBUG
30#define COH_DBG(x) ({ if (1) x; 0; })
31#else
32#define COH_DBG(x) ({ if (0) x; 0; })
33#endif
34
35struct coh901318_desc {
36 struct dma_async_tx_descriptor desc;
37 struct list_head node;
38 struct scatterlist *sg;
39 unsigned int sg_len;
40 struct coh901318_lli *data;
41 enum dma_data_direction dir;
42 int pending_irqs;
43 unsigned long flags;
44};
45
46struct coh901318_base {
47 struct device *dev;
48 void __iomem *virtbase;
49 struct coh901318_pool pool;
50 struct powersave pm;
51 struct dma_device dma_slave;
52 struct dma_device dma_memcpy;
53 struct coh901318_chan *chans;
54 struct coh901318_platform *platform;
55};
56
57struct coh901318_chan {
58 spinlock_t lock;
59 int allocated;
60 int completed;
61 int id;
62 int stopped;
63
64 struct work_struct free_work;
65 struct dma_chan chan;
66
67 struct tasklet_struct tasklet;
68
69 struct list_head active;
70 struct list_head queue;
71 struct list_head free;
72
73 unsigned long nbr_active_done;
74 unsigned long busy;
75 int pending_irqs;
76
77 struct coh901318_base *base;
78};
79
80static void coh901318_list_print(struct coh901318_chan *cohc,
81 struct coh901318_lli *lli)
82{
83 struct coh901318_lli *l;
84 dma_addr_t addr = virt_to_phys(lli);
85 int i = 0;
86
87 while (addr) {
88 l = phys_to_virt(addr);
89 dev_vdbg(COHC_2_DEV(cohc), "i %d, lli %p, ctrl 0x%x, src 0x%x"
90 ", dst 0x%x, link 0x%x link_virt 0x%p\n",
91 i, l, l->control, l->src_addr, l->dst_addr,
92 l->link_addr, phys_to_virt(l->link_addr));
93 i++;
94 addr = l->link_addr;
95 }
96}
97
98#ifdef CONFIG_DEBUG_FS
99
100#define COH901318_DEBUGFS_ASSIGN(x, y) (x = y)
101
102static struct coh901318_base *debugfs_dma_base;
103static struct dentry *dma_dentry;
104
105static int coh901318_debugfs_open(struct inode *inode, struct file *file)
106{
107
108 file->private_data = inode->i_private;
109 return 0;
110}
111
112static int coh901318_debugfs_read(struct file *file, char __user *buf,
113 size_t count, loff_t *f_pos)
114{
115 u64 started_channels = debugfs_dma_base->pm.started_channels;
116 int pool_count = debugfs_dma_base->pool.debugfs_pool_counter;
117 int i;
118 int ret = 0;
119 char *dev_buf;
120 char *tmp;
121 int dev_size;
122
123 dev_buf = kmalloc(4*1024, GFP_KERNEL);
124 if (dev_buf == NULL)
125 goto err_kmalloc;
126 tmp = dev_buf;
127
128 tmp += sprintf(tmp, "DMA -- enable dma channels\n");
129
130 for (i = 0; i < debugfs_dma_base->platform->max_channels; i++)
131 if (started_channels & (1 << i))
132 tmp += sprintf(tmp, "channel %d\n", i);
133
134 tmp += sprintf(tmp, "Pool alloc nbr %d\n", pool_count);
135 dev_size = tmp - dev_buf;
136
137 /* No more to read if offset != 0 */
138 if (*f_pos > dev_size)
139 goto out;
140
141 if (count > dev_size - *f_pos)
142 count = dev_size - *f_pos;
143
144 if (copy_to_user(buf, dev_buf + *f_pos, count))
145 ret = -EINVAL;
146 ret = count;
147 *f_pos += count;
148
149 out:
150 kfree(dev_buf);
151 return ret;
152
153 err_kmalloc:
154 return 0;
155}
156
157static const struct file_operations coh901318_debugfs_status_operations = {
158 .owner = THIS_MODULE,
159 .open = coh901318_debugfs_open,
160 .read = coh901318_debugfs_read,
161};
162
163
164static int __init init_coh901318_debugfs(void)
165{
166
167 dma_dentry = debugfs_create_dir("dma", NULL);
168
169 (void) debugfs_create_file("status",
170 S_IFREG | S_IRUGO,
171 dma_dentry, NULL,
172 &coh901318_debugfs_status_operations);
173 return 0;
174}
175
176static void __exit exit_coh901318_debugfs(void)
177{
178 debugfs_remove_recursive(dma_dentry);
179}
180
181module_init(init_coh901318_debugfs);
182module_exit(exit_coh901318_debugfs);
183#else
184
185#define COH901318_DEBUGFS_ASSIGN(x, y)
186
187#endif /* CONFIG_DEBUG_FS */
188
189static inline struct coh901318_chan *to_coh901318_chan(struct dma_chan *chan)
190{
191 return container_of(chan, struct coh901318_chan, chan);
192}
193
194static inline dma_addr_t
195cohc_dev_addr(struct coh901318_chan *cohc)
196{
197 return cohc->base->platform->chan_conf[cohc->id].dev_addr;
198}
199
200static inline const struct coh901318_params *
201cohc_chan_param(struct coh901318_chan *cohc)
202{
203 return &cohc->base->platform->chan_conf[cohc->id].param;
204}
205
206static inline const struct coh_dma_channel *
207cohc_chan_conf(struct coh901318_chan *cohc)
208{
209 return &cohc->base->platform->chan_conf[cohc->id];
210}
211
212static void enable_powersave(struct coh901318_chan *cohc)
213{
214 unsigned long flags;
215 struct powersave *pm = &cohc->base->pm;
216
217 spin_lock_irqsave(&pm->lock, flags);
218
219 pm->started_channels &= ~(1ULL << cohc->id);
220
221 if (!pm->started_channels) {
222 /* DMA no longer intends to access memory */
223 cohc->base->platform->access_memory_state(cohc->base->dev,
224 false);
225 }
226
227 spin_unlock_irqrestore(&pm->lock, flags);
228}
229static void disable_powersave(struct coh901318_chan *cohc)
230{
231 unsigned long flags;
232 struct powersave *pm = &cohc->base->pm;
233
234 spin_lock_irqsave(&pm->lock, flags);
235
236 if (!pm->started_channels) {
237 /* DMA intends to access memory */
238 cohc->base->platform->access_memory_state(cohc->base->dev,
239 true);
240 }
241
242 pm->started_channels |= (1ULL << cohc->id);
243
244 spin_unlock_irqrestore(&pm->lock, flags);
245}
246
247static inline int coh901318_set_ctrl(struct coh901318_chan *cohc, u32 control)
248{
249 int channel = cohc->id;
250 void __iomem *virtbase = cohc->base->virtbase;
251
252 writel(control,
253 virtbase + COH901318_CX_CTRL +
254 COH901318_CX_CTRL_SPACING * channel);
255 return 0;
256}
257
258static inline int coh901318_set_conf(struct coh901318_chan *cohc, u32 conf)
259{
260 int channel = cohc->id;
261 void __iomem *virtbase = cohc->base->virtbase;
262
263 writel(conf,
264 virtbase + COH901318_CX_CFG +
265 COH901318_CX_CFG_SPACING*channel);
266 return 0;
267}
268
269
270static int coh901318_start(struct coh901318_chan *cohc)
271{
272 u32 val;
273 int channel = cohc->id;
274 void __iomem *virtbase = cohc->base->virtbase;
275
276 disable_powersave(cohc);
277
278 val = readl(virtbase + COH901318_CX_CFG +
279 COH901318_CX_CFG_SPACING * channel);
280
281 /* Enable channel */
282 val |= COH901318_CX_CFG_CH_ENABLE;
283 writel(val, virtbase + COH901318_CX_CFG +
284 COH901318_CX_CFG_SPACING * channel);
285
286 return 0;
287}
288
289static int coh901318_prep_linked_list(struct coh901318_chan *cohc,
290 struct coh901318_lli *data)
291{
292 int channel = cohc->id;
293 void __iomem *virtbase = cohc->base->virtbase;
294
295 BUG_ON(readl(virtbase + COH901318_CX_STAT +
296 COH901318_CX_STAT_SPACING*channel) &
297 COH901318_CX_STAT_ACTIVE);
298
299 writel(data->src_addr,
300 virtbase + COH901318_CX_SRC_ADDR +
301 COH901318_CX_SRC_ADDR_SPACING * channel);
302
303 writel(data->dst_addr, virtbase +
304 COH901318_CX_DST_ADDR +
305 COH901318_CX_DST_ADDR_SPACING * channel);
306
307 writel(data->link_addr, virtbase + COH901318_CX_LNK_ADDR +
308 COH901318_CX_LNK_ADDR_SPACING * channel);
309
310 writel(data->control, virtbase + COH901318_CX_CTRL +
311 COH901318_CX_CTRL_SPACING * channel);
312
313 return 0;
314}
315static dma_cookie_t
316coh901318_assign_cookie(struct coh901318_chan *cohc,
317 struct coh901318_desc *cohd)
318{
319 dma_cookie_t cookie = cohc->chan.cookie;
320
321 if (++cookie < 0)
322 cookie = 1;
323
324 cohc->chan.cookie = cookie;
325 cohd->desc.cookie = cookie;
326
327 return cookie;
328}
329
330static struct coh901318_desc *
331coh901318_desc_get(struct coh901318_chan *cohc)
332{
333 struct coh901318_desc *desc;
334
335 if (list_empty(&cohc->free)) {
336 /* alloc new desc because we're out of used ones
337 * TODO: alloc a pile of descs instead of just one,
338 * avoid many small allocations.
339 */
340 desc = kmalloc(sizeof(struct coh901318_desc), GFP_NOWAIT);
341 if (desc == NULL)
342 goto out;
343 INIT_LIST_HEAD(&desc->node);
344 } else {
345 /* Reuse an old desc. */
346 desc = list_first_entry(&cohc->free,
347 struct coh901318_desc,
348 node);
349 list_del(&desc->node);
350 }
351
352 out:
353 return desc;
354}
355
356static void
357coh901318_desc_free(struct coh901318_chan *cohc, struct coh901318_desc *cohd)
358{
359 list_add_tail(&cohd->node, &cohc->free);
360}
361
362/* call with irq lock held */
363static void
364coh901318_desc_submit(struct coh901318_chan *cohc, struct coh901318_desc *desc)
365{
366 list_add_tail(&desc->node, &cohc->active);
367
368 BUG_ON(cohc->pending_irqs != 0);
369
370 cohc->pending_irqs = desc->pending_irqs;
371}
372
373static struct coh901318_desc *
374coh901318_first_active_get(struct coh901318_chan *cohc)
375{
376 struct coh901318_desc *d;
377
378 if (list_empty(&cohc->active))
379 return NULL;
380
381 d = list_first_entry(&cohc->active,
382 struct coh901318_desc,
383 node);
384 return d;
385}
386
387static void
388coh901318_desc_remove(struct coh901318_desc *cohd)
389{
390 list_del(&cohd->node);
391}
392
393static void
394coh901318_desc_queue(struct coh901318_chan *cohc, struct coh901318_desc *desc)
395{
396 list_add_tail(&desc->node, &cohc->queue);
397}
398
399static struct coh901318_desc *
400coh901318_first_queued(struct coh901318_chan *cohc)
401{
402 struct coh901318_desc *d;
403
404 if (list_empty(&cohc->queue))
405 return NULL;
406
407 d = list_first_entry(&cohc->queue,
408 struct coh901318_desc,
409 node);
410 return d;
411}
412
413/*
414 * DMA start/stop controls
415 */
416u32 coh901318_get_bytes_left(struct dma_chan *chan)
417{
418 unsigned long flags;
419 u32 ret;
420 struct coh901318_chan *cohc = to_coh901318_chan(chan);
421
422 spin_lock_irqsave(&cohc->lock, flags);
423
424 /* Read transfer count value */
425 ret = readl(cohc->base->virtbase +
426 COH901318_CX_CTRL+COH901318_CX_CTRL_SPACING *
427 cohc->id) & COH901318_CX_CTRL_TC_VALUE_MASK;
428
429 spin_unlock_irqrestore(&cohc->lock, flags);
430
431 return ret;
432}
433EXPORT_SYMBOL(coh901318_get_bytes_left);
434
435
436/* Stops a transfer without losing data. Enables power save.
437 Use this function in conjunction with coh901318_continue(..)
438*/
439void coh901318_stop(struct dma_chan *chan)
440{
441 u32 val;
442 unsigned long flags;
443 struct coh901318_chan *cohc = to_coh901318_chan(chan);
444 int channel = cohc->id;
445 void __iomem *virtbase = cohc->base->virtbase;
446
447 spin_lock_irqsave(&cohc->lock, flags);
448
449 /* Disable channel in HW */
450 val = readl(virtbase + COH901318_CX_CFG +
451 COH901318_CX_CFG_SPACING * channel);
452
453 /* Stopping infinit transfer */
454 if ((val & COH901318_CX_CTRL_TC_ENABLE) == 0 &&
455 (val & COH901318_CX_CFG_CH_ENABLE))
456 cohc->stopped = 1;
457
458
459 val &= ~COH901318_CX_CFG_CH_ENABLE;
460 /* Enable twice, HW bug work around */
461 writel(val, virtbase + COH901318_CX_CFG +
462 COH901318_CX_CFG_SPACING * channel);
463 writel(val, virtbase + COH901318_CX_CFG +
464 COH901318_CX_CFG_SPACING * channel);
465
466 /* Spin-wait for it to actually go inactive */
467 while (readl(virtbase + COH901318_CX_STAT+COH901318_CX_STAT_SPACING *
468 channel) & COH901318_CX_STAT_ACTIVE)
469 cpu_relax();
470
471 /* Check if we stopped an active job */
472 if ((readl(virtbase + COH901318_CX_CTRL+COH901318_CX_CTRL_SPACING *
473 channel) & COH901318_CX_CTRL_TC_VALUE_MASK) > 0)
474 cohc->stopped = 1;
475
476 enable_powersave(cohc);
477
478 spin_unlock_irqrestore(&cohc->lock, flags);
479}
480EXPORT_SYMBOL(coh901318_stop);
481
482/* Continues a transfer that has been stopped via 300_dma_stop(..).
483 Power save is handled.
484*/
485void coh901318_continue(struct dma_chan *chan)
486{
487 u32 val;
488 unsigned long flags;
489 struct coh901318_chan *cohc = to_coh901318_chan(chan);
490 int channel = cohc->id;
491
492 spin_lock_irqsave(&cohc->lock, flags);
493
494 disable_powersave(cohc);
495
496 if (cohc->stopped) {
497 /* Enable channel in HW */
498 val = readl(cohc->base->virtbase + COH901318_CX_CFG +
499 COH901318_CX_CFG_SPACING * channel);
500
501 val |= COH901318_CX_CFG_CH_ENABLE;
502
503 writel(val, cohc->base->virtbase + COH901318_CX_CFG +
504 COH901318_CX_CFG_SPACING*channel);
505
506 cohc->stopped = 0;
507 }
508
509 spin_unlock_irqrestore(&cohc->lock, flags);
510}
511EXPORT_SYMBOL(coh901318_continue);
512
513bool coh901318_filter_id(struct dma_chan *chan, void *chan_id)
514{
515 unsigned int ch_nr = (unsigned int) chan_id;
516
517 if (ch_nr == to_coh901318_chan(chan)->id)
518 return true;
519
520 return false;
521}
522EXPORT_SYMBOL(coh901318_filter_id);
523
524/*
525 * DMA channel allocation
526 */
527static int coh901318_config(struct coh901318_chan *cohc,
528 struct coh901318_params *param)
529{
530 unsigned long flags;
531 const struct coh901318_params *p;
532 int channel = cohc->id;
533 void __iomem *virtbase = cohc->base->virtbase;
534
535 spin_lock_irqsave(&cohc->lock, flags);
536
537 if (param)
538 p = param;
539 else
540 p = &cohc->base->platform->chan_conf[channel].param;
541
542 /* Clear any pending BE or TC interrupt */
543 if (channel < 32) {
544 writel(1 << channel, virtbase + COH901318_BE_INT_CLEAR1);
545 writel(1 << channel, virtbase + COH901318_TC_INT_CLEAR1);
546 } else {
547 writel(1 << (channel - 32), virtbase +
548 COH901318_BE_INT_CLEAR2);
549 writel(1 << (channel - 32), virtbase +
550 COH901318_TC_INT_CLEAR2);
551 }
552
553 coh901318_set_conf(cohc, p->config);
554 coh901318_set_ctrl(cohc, p->ctrl_lli_last);
555
556 spin_unlock_irqrestore(&cohc->lock, flags);
557
558 return 0;
559}
560
561/* must lock when calling this function
562 * start queued jobs, if any
563 * TODO: start all queued jobs in one go
564 *
565 * Returns descriptor if queued job is started otherwise NULL.
566 * If the queue is empty NULL is returned.
567 */
568static struct coh901318_desc *coh901318_queue_start(struct coh901318_chan *cohc)
569{
570 struct coh901318_desc *cohd_que;
571
572 /* start queued jobs, if any
573 * TODO: transmit all queued jobs in one go
574 */
575 cohd_que = coh901318_first_queued(cohc);
576
577 if (cohd_que != NULL) {
578 /* Remove from queue */
579 coh901318_desc_remove(cohd_que);
580 /* initiate DMA job */
581 cohc->busy = 1;
582
583 coh901318_desc_submit(cohc, cohd_que);
584
585 coh901318_prep_linked_list(cohc, cohd_que->data);
586
587 /* start dma job */
588 coh901318_start(cohc);
589
590 }
591
592 return cohd_que;
593}
594
595static void dma_tasklet(unsigned long data)
596{
597 struct coh901318_chan *cohc = (struct coh901318_chan *) data;
598 struct coh901318_desc *cohd_fin;
599 unsigned long flags;
600 dma_async_tx_callback callback;
601 void *callback_param;
602
603 spin_lock_irqsave(&cohc->lock, flags);
604
605 /* get first active entry from list */
606 cohd_fin = coh901318_first_active_get(cohc);
607
608 BUG_ON(cohd_fin->pending_irqs == 0);
609
610 if (cohd_fin == NULL)
611 goto err;
612
613 cohd_fin->pending_irqs--;
614 cohc->completed = cohd_fin->desc.cookie;
615
616 if (cohc->nbr_active_done == 0)
617 return;
618
619 if (!cohd_fin->pending_irqs) {
620 /* release the lli allocation*/
621 coh901318_lli_free(&cohc->base->pool, &cohd_fin->data);
622 }
623
624 dev_vdbg(COHC_2_DEV(cohc), "[%s] chan_id %d pending_irqs %d"
625 " nbr_active_done %ld\n", __func__,
626 cohc->id, cohc->pending_irqs, cohc->nbr_active_done);
627
628 /* callback to client */
629 callback = cohd_fin->desc.callback;
630 callback_param = cohd_fin->desc.callback_param;
631
632 if (!cohd_fin->pending_irqs) {
633 coh901318_desc_remove(cohd_fin);
634
635 /* return desc to free-list */
636 coh901318_desc_free(cohc, cohd_fin);
637 }
638
639 if (cohc->nbr_active_done)
640 cohc->nbr_active_done--;
641
642 if (cohc->nbr_active_done) {
643 if (cohc_chan_conf(cohc)->priority_high)
644 tasklet_hi_schedule(&cohc->tasklet);
645 else
646 tasklet_schedule(&cohc->tasklet);
647 }
648 spin_unlock_irqrestore(&cohc->lock, flags);
649
650 if (callback)
651 callback(callback_param);
652
653 return;
654
655 err:
656 spin_unlock_irqrestore(&cohc->lock, flags);
657 dev_err(COHC_2_DEV(cohc), "[%s] No active dma desc\n", __func__);
658}
659
660
661/* called from interrupt context */
662static void dma_tc_handle(struct coh901318_chan *cohc)
663{
664 BUG_ON(!cohc->allocated && (list_empty(&cohc->active) ||
665 list_empty(&cohc->queue)));
666
667 if (!cohc->allocated)
668 return;
669
670 BUG_ON(cohc->pending_irqs == 0);
671
672 cohc->pending_irqs--;
673 cohc->nbr_active_done++;
674
675 if (cohc->pending_irqs == 0 && coh901318_queue_start(cohc) == NULL)
676 cohc->busy = 0;
677
678 BUG_ON(list_empty(&cohc->active));
679
680 if (cohc_chan_conf(cohc)->priority_high)
681 tasklet_hi_schedule(&cohc->tasklet);
682 else
683 tasklet_schedule(&cohc->tasklet);
684}
685
686
687static irqreturn_t dma_irq_handler(int irq, void *dev_id)
688{
689 u32 status1;
690 u32 status2;
691 int i;
692 int ch;
693 struct coh901318_base *base = dev_id;
694 struct coh901318_chan *cohc;
695 void __iomem *virtbase = base->virtbase;
696
697 status1 = readl(virtbase + COH901318_INT_STATUS1);
698 status2 = readl(virtbase + COH901318_INT_STATUS2);
699
700 if (unlikely(status1 == 0 && status2 == 0)) {
701 dev_warn(base->dev, "spurious DMA IRQ from no channel!\n");
702 return IRQ_HANDLED;
703 }
704
705 /* TODO: consider handle IRQ in tasklet here to
706 * minimize interrupt latency */
707
708 /* Check the first 32 DMA channels for IRQ */
709 while (status1) {
710 /* Find first bit set, return as a number. */
711 i = ffs(status1) - 1;
712 ch = i;
713
714 cohc = &base->chans[ch];
715 spin_lock(&cohc->lock);
716
717 /* Mask off this bit */
718 status1 &= ~(1 << i);
719 /* Check the individual channel bits */
720 if (test_bit(i, virtbase + COH901318_BE_INT_STATUS1)) {
721 dev_crit(COHC_2_DEV(cohc),
722 "DMA bus error on channel %d!\n", ch);
723 BUG_ON(1);
724 /* Clear BE interrupt */
725 __set_bit(i, virtbase + COH901318_BE_INT_CLEAR1);
726 } else {
727 /* Caused by TC, really? */
728 if (unlikely(!test_bit(i, virtbase +
729 COH901318_TC_INT_STATUS1))) {
730 dev_warn(COHC_2_DEV(cohc),
731 "ignoring interrupt not caused by terminal count on channel %d\n", ch);
732 /* Clear TC interrupt */
733 BUG_ON(1);
734 __set_bit(i, virtbase + COH901318_TC_INT_CLEAR1);
735 } else {
736 /* Enable powersave if transfer has finished */
737 if (!(readl(virtbase + COH901318_CX_STAT +
738 COH901318_CX_STAT_SPACING*ch) &
739 COH901318_CX_STAT_ENABLED)) {
740 enable_powersave(cohc);
741 }
742
743 /* Must clear TC interrupt before calling
744 * dma_tc_handle
745 * in case tc_handle initate a new dma job
746 */
747 __set_bit(i, virtbase + COH901318_TC_INT_CLEAR1);
748
749 dma_tc_handle(cohc);
750 }
751 }
752 spin_unlock(&cohc->lock);
753 }
754
755 /* Check the remaining 32 DMA channels for IRQ */
756 while (status2) {
757 /* Find first bit set, return as a number. */
758 i = ffs(status2) - 1;
759 ch = i + 32;
760 cohc = &base->chans[ch];
761 spin_lock(&cohc->lock);
762
763 /* Mask off this bit */
764 status2 &= ~(1 << i);
765 /* Check the individual channel bits */
766 if (test_bit(i, virtbase + COH901318_BE_INT_STATUS2)) {
767 dev_crit(COHC_2_DEV(cohc),
768 "DMA bus error on channel %d!\n", ch);
769 /* Clear BE interrupt */
770 BUG_ON(1);
771 __set_bit(i, virtbase + COH901318_BE_INT_CLEAR2);
772 } else {
773 /* Caused by TC, really? */
774 if (unlikely(!test_bit(i, virtbase +
775 COH901318_TC_INT_STATUS2))) {
776 dev_warn(COHC_2_DEV(cohc),
777 "ignoring interrupt not caused by terminal count on channel %d\n", ch);
778 /* Clear TC interrupt */
779 __set_bit(i, virtbase + COH901318_TC_INT_CLEAR2);
780 BUG_ON(1);
781 } else {
782 /* Enable powersave if transfer has finished */
783 if (!(readl(virtbase + COH901318_CX_STAT +
784 COH901318_CX_STAT_SPACING*ch) &
785 COH901318_CX_STAT_ENABLED)) {
786 enable_powersave(cohc);
787 }
788 /* Must clear TC interrupt before calling
789 * dma_tc_handle
790 * in case tc_handle initate a new dma job
791 */
792 __set_bit(i, virtbase + COH901318_TC_INT_CLEAR2);
793
794 dma_tc_handle(cohc);
795 }
796 }
797 spin_unlock(&cohc->lock);
798 }
799
800 return IRQ_HANDLED;
801}
802
803static int coh901318_alloc_chan_resources(struct dma_chan *chan)
804{
805 struct coh901318_chan *cohc = to_coh901318_chan(chan);
806
807 dev_vdbg(COHC_2_DEV(cohc), "[%s] DMA channel %d\n",
808 __func__, cohc->id);
809
810 if (chan->client_count > 1)
811 return -EBUSY;
812
813 coh901318_config(cohc, NULL);
814
815 cohc->allocated = 1;
816 cohc->completed = chan->cookie = 1;
817
818 return 1;
819}
820
821static void
822coh901318_free_chan_resources(struct dma_chan *chan)
823{
824 struct coh901318_chan *cohc = to_coh901318_chan(chan);
825 int channel = cohc->id;
826 unsigned long flags;
827
828 spin_lock_irqsave(&cohc->lock, flags);
829
830 /* Disable HW */
831 writel(0x00000000U, cohc->base->virtbase + COH901318_CX_CFG +
832 COH901318_CX_CFG_SPACING*channel);
833 writel(0x00000000U, cohc->base->virtbase + COH901318_CX_CTRL +
834 COH901318_CX_CTRL_SPACING*channel);
835
836 cohc->allocated = 0;
837
838 spin_unlock_irqrestore(&cohc->lock, flags);
839
840 chan->device->device_terminate_all(chan);
841}
842
843
844static dma_cookie_t
845coh901318_tx_submit(struct dma_async_tx_descriptor *tx)
846{
847 struct coh901318_desc *cohd = container_of(tx, struct coh901318_desc,
848 desc);
849 struct coh901318_chan *cohc = to_coh901318_chan(tx->chan);
850 unsigned long flags;
851
852 spin_lock_irqsave(&cohc->lock, flags);
853
854 tx->cookie = coh901318_assign_cookie(cohc, cohd);
855
856 coh901318_desc_queue(cohc, cohd);
857
858 spin_unlock_irqrestore(&cohc->lock, flags);
859
860 return tx->cookie;
861}
862
863static struct dma_async_tx_descriptor *
864coh901318_prep_memcpy(struct dma_chan *chan, dma_addr_t dest, dma_addr_t src,
865 size_t size, unsigned long flags)
866{
867 struct coh901318_lli *data;
868 struct coh901318_desc *cohd;
869 unsigned long flg;
870 struct coh901318_chan *cohc = to_coh901318_chan(chan);
871 int lli_len;
872 u32 ctrl_last = cohc_chan_param(cohc)->ctrl_lli_last;
873
874 spin_lock_irqsave(&cohc->lock, flg);
875
876 dev_vdbg(COHC_2_DEV(cohc),
877 "[%s] channel %d src 0x%x dest 0x%x size %d\n",
878 __func__, cohc->id, src, dest, size);
879
880 if (flags & DMA_PREP_INTERRUPT)
881 /* Trigger interrupt after last lli */
882 ctrl_last |= COH901318_CX_CTRL_TC_IRQ_ENABLE;
883
884 lli_len = size >> MAX_DMA_PACKET_SIZE_SHIFT;
885 if ((lli_len << MAX_DMA_PACKET_SIZE_SHIFT) < size)
886 lli_len++;
887
888 data = coh901318_lli_alloc(&cohc->base->pool, lli_len);
889
890 if (data == NULL)
891 goto err;
892
893 cohd = coh901318_desc_get(cohc);
894 cohd->sg = NULL;
895 cohd->sg_len = 0;
896 cohd->data = data;
897
898 cohd->pending_irqs =
899 coh901318_lli_fill_memcpy(
900 &cohc->base->pool, data, src, size, dest,
901 cohc_chan_param(cohc)->ctrl_lli_chained,
902 ctrl_last);
903 cohd->flags = flags;
904
905 COH_DBG(coh901318_list_print(cohc, data));
906
907 dma_async_tx_descriptor_init(&cohd->desc, chan);
908
909 cohd->desc.tx_submit = coh901318_tx_submit;
910
911 spin_unlock_irqrestore(&cohc->lock, flg);
912
913 return &cohd->desc;
914 err:
915 spin_unlock_irqrestore(&cohc->lock, flg);
916 return NULL;
917}
918
919static struct dma_async_tx_descriptor *
920coh901318_prep_slave_sg(struct dma_chan *chan, struct scatterlist *sgl,
921 unsigned int sg_len, enum dma_data_direction direction,
922 unsigned long flags)
923{
924 struct coh901318_chan *cohc = to_coh901318_chan(chan);
925 struct coh901318_lli *data;
926 struct coh901318_desc *cohd;
927 struct scatterlist *sg;
928 int len = 0;
929 int size;
930 int i;
931 u32 ctrl_chained = cohc_chan_param(cohc)->ctrl_lli_chained;
932 u32 ctrl = cohc_chan_param(cohc)->ctrl_lli;
933 u32 ctrl_last = cohc_chan_param(cohc)->ctrl_lli_last;
934 unsigned long flg;
935
936 if (!sgl)
937 goto out;
938 if (sgl->length == 0)
939 goto out;
940
941 spin_lock_irqsave(&cohc->lock, flg);
942
943 dev_vdbg(COHC_2_DEV(cohc), "[%s] sg_len %d dir %d\n",
944 __func__, sg_len, direction);
945
946 if (flags & DMA_PREP_INTERRUPT)
947 /* Trigger interrupt after last lli */
948 ctrl_last |= COH901318_CX_CTRL_TC_IRQ_ENABLE;
949
950 cohd = coh901318_desc_get(cohc);
951 cohd->sg = NULL;
952 cohd->sg_len = 0;
953 cohd->dir = direction;
954
955 if (direction == DMA_TO_DEVICE) {
956 u32 tx_flags = COH901318_CX_CTRL_PRDD_SOURCE |
957 COH901318_CX_CTRL_SRC_ADDR_INC_ENABLE;
958
959 ctrl_chained |= tx_flags;
960 ctrl_last |= tx_flags;
961 ctrl |= tx_flags;
962 } else if (direction == DMA_FROM_DEVICE) {
963 u32 rx_flags = COH901318_CX_CTRL_PRDD_DEST |
964 COH901318_CX_CTRL_DST_ADDR_INC_ENABLE;
965
966 ctrl_chained |= rx_flags;
967 ctrl_last |= rx_flags;
968 ctrl |= rx_flags;
969 } else
970 goto err_direction;
971
972 dma_async_tx_descriptor_init(&cohd->desc, chan);
973
974 cohd->desc.tx_submit = coh901318_tx_submit;
975
976
977 /* The dma only supports transmitting packages up to
978 * MAX_DMA_PACKET_SIZE. Calculate to total number of
979 * dma elemts required to send the entire sg list
980 */
981 for_each_sg(sgl, sg, sg_len, i) {
982 unsigned int factor;
983 size = sg_dma_len(sg);
984
985 if (size <= MAX_DMA_PACKET_SIZE) {
986 len++;
987 continue;
988 }
989
990 factor = size >> MAX_DMA_PACKET_SIZE_SHIFT;
991 if ((factor << MAX_DMA_PACKET_SIZE_SHIFT) < size)
992 factor++;
993
994 len += factor;
995 }
996
997 data = coh901318_lli_alloc(&cohc->base->pool, len);
998
999 if (data == NULL)
1000 goto err_dma_alloc;
1001
1002 /* initiate allocated data list */
1003 cohd->pending_irqs =
1004 coh901318_lli_fill_sg(&cohc->base->pool, data, sgl, sg_len,
1005 cohc_dev_addr(cohc),
1006 ctrl_chained,
1007 ctrl,
1008 ctrl_last,
1009 direction, COH901318_CX_CTRL_TC_IRQ_ENABLE);
1010 cohd->data = data;
1011
1012 cohd->flags = flags;
1013
1014 COH_DBG(coh901318_list_print(cohc, data));
1015
1016 spin_unlock_irqrestore(&cohc->lock, flg);
1017
1018 return &cohd->desc;
1019 err_dma_alloc:
1020 err_direction:
1021 coh901318_desc_remove(cohd);
1022 coh901318_desc_free(cohc, cohd);
1023 spin_unlock_irqrestore(&cohc->lock, flg);
1024 out:
1025 return NULL;
1026}
1027
1028static enum dma_status
1029coh901318_is_tx_complete(struct dma_chan *chan,
1030 dma_cookie_t cookie, dma_cookie_t *done,
1031 dma_cookie_t *used)
1032{
1033 struct coh901318_chan *cohc = to_coh901318_chan(chan);
1034 dma_cookie_t last_used;
1035 dma_cookie_t last_complete;
1036 int ret;
1037
1038 last_complete = cohc->completed;
1039 last_used = chan->cookie;
1040
1041 ret = dma_async_is_complete(cookie, last_complete, last_used);
1042
1043 if (done)
1044 *done = last_complete;
1045 if (used)
1046 *used = last_used;
1047
1048 return ret;
1049}
1050
1051static void
1052coh901318_issue_pending(struct dma_chan *chan)
1053{
1054 struct coh901318_chan *cohc = to_coh901318_chan(chan);
1055 unsigned long flags;
1056
1057 spin_lock_irqsave(&cohc->lock, flags);
1058
1059 /* Busy means that pending jobs are already being processed */
1060 if (!cohc->busy)
1061 coh901318_queue_start(cohc);
1062
1063 spin_unlock_irqrestore(&cohc->lock, flags);
1064}
1065
1066static void
1067coh901318_terminate_all(struct dma_chan *chan)
1068{
1069 unsigned long flags;
1070 struct coh901318_chan *cohc = to_coh901318_chan(chan);
1071 struct coh901318_desc *cohd;
1072 void __iomem *virtbase = cohc->base->virtbase;
1073
1074 coh901318_stop(chan);
1075
1076 spin_lock_irqsave(&cohc->lock, flags);
1077
1078 /* Clear any pending BE or TC interrupt */
1079 if (cohc->id < 32) {
1080 writel(1 << cohc->id, virtbase + COH901318_BE_INT_CLEAR1);
1081 writel(1 << cohc->id, virtbase + COH901318_TC_INT_CLEAR1);
1082 } else {
1083 writel(1 << (cohc->id - 32), virtbase +
1084 COH901318_BE_INT_CLEAR2);
1085 writel(1 << (cohc->id - 32), virtbase +
1086 COH901318_TC_INT_CLEAR2);
1087 }
1088
1089 enable_powersave(cohc);
1090
1091 while ((cohd = coh901318_first_active_get(cohc))) {
1092 /* release the lli allocation*/
1093 coh901318_lli_free(&cohc->base->pool, &cohd->data);
1094
1095 coh901318_desc_remove(cohd);
1096
1097 /* return desc to free-list */
1098 coh901318_desc_free(cohc, cohd);
1099 }
1100
1101 while ((cohd = coh901318_first_queued(cohc))) {
1102 /* release the lli allocation*/
1103 coh901318_lli_free(&cohc->base->pool, &cohd->data);
1104
1105 coh901318_desc_remove(cohd);
1106
1107 /* return desc to free-list */
1108 coh901318_desc_free(cohc, cohd);
1109 }
1110
1111
1112 cohc->nbr_active_done = 0;
1113 cohc->busy = 0;
1114 cohc->pending_irqs = 0;
1115
1116 spin_unlock_irqrestore(&cohc->lock, flags);
1117}
1118void coh901318_base_init(struct dma_device *dma, const int *pick_chans,
1119 struct coh901318_base *base)
1120{
1121 int chans_i;
1122 int i = 0;
1123 struct coh901318_chan *cohc;
1124
1125 INIT_LIST_HEAD(&dma->channels);
1126
1127 for (chans_i = 0; pick_chans[chans_i] != -1; chans_i += 2) {
1128 for (i = pick_chans[chans_i]; i <= pick_chans[chans_i+1]; i++) {
1129 cohc = &base->chans[i];
1130
1131 cohc->base = base;
1132 cohc->chan.device = dma;
1133 cohc->id = i;
1134
1135 /* TODO: do we really need this lock if only one
1136 * client is connected to each channel?
1137 */
1138
1139 spin_lock_init(&cohc->lock);
1140
1141 cohc->pending_irqs = 0;
1142 cohc->nbr_active_done = 0;
1143 cohc->busy = 0;
1144 INIT_LIST_HEAD(&cohc->free);
1145 INIT_LIST_HEAD(&cohc->active);
1146 INIT_LIST_HEAD(&cohc->queue);
1147
1148 tasklet_init(&cohc->tasklet, dma_tasklet,
1149 (unsigned long) cohc);
1150
1151 list_add_tail(&cohc->chan.device_node,
1152 &dma->channels);
1153 }
1154 }
1155}
1156
1157static int __init coh901318_probe(struct platform_device *pdev)
1158{
1159 int err = 0;
1160 struct coh901318_platform *pdata;
1161 struct coh901318_base *base;
1162 int irq;
1163 struct resource *io;
1164
1165 io = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1166 if (!io)
1167 goto err_get_resource;
1168
1169 /* Map DMA controller registers to virtual memory */
1170 if (request_mem_region(io->start,
1171 resource_size(io),
1172 pdev->dev.driver->name) == NULL) {
1173 err = -EBUSY;
1174 goto err_request_mem;
1175 }
1176
1177 pdata = pdev->dev.platform_data;
1178 if (!pdata)
1179 goto err_no_platformdata;
1180
1181 base = kmalloc(ALIGN(sizeof(struct coh901318_base), 4) +
1182 pdata->max_channels *
1183 sizeof(struct coh901318_chan),
1184 GFP_KERNEL);
1185 if (!base)
1186 goto err_alloc_coh_dma_channels;
1187
1188 base->chans = ((void *)base) + ALIGN(sizeof(struct coh901318_base), 4);
1189
1190 base->virtbase = ioremap(io->start, resource_size(io));
1191 if (!base->virtbase) {
1192 err = -ENOMEM;
1193 goto err_no_ioremap;
1194 }
1195
1196 base->dev = &pdev->dev;
1197 base->platform = pdata;
1198 spin_lock_init(&base->pm.lock);
1199 base->pm.started_channels = 0;
1200
1201 COH901318_DEBUGFS_ASSIGN(debugfs_dma_base, base);
1202
1203 platform_set_drvdata(pdev, base);
1204
1205 irq = platform_get_irq(pdev, 0);
1206 if (irq < 0)
1207 goto err_no_irq;
1208
1209 err = request_irq(irq, dma_irq_handler, IRQF_DISABLED,
1210 "coh901318", base);
1211 if (err) {
1212 dev_crit(&pdev->dev,
1213 "Cannot allocate IRQ for DMA controller!\n");
1214 goto err_request_irq;
1215 }
1216
1217 err = coh901318_pool_create(&base->pool, &pdev->dev,
1218 sizeof(struct coh901318_lli),
1219 32);
1220 if (err)
1221 goto err_pool_create;
1222
1223 /* init channels for device transfers */
1224 coh901318_base_init(&base->dma_slave, base->platform->chans_slave,
1225 base);
1226
1227 dma_cap_zero(base->dma_slave.cap_mask);
1228 dma_cap_set(DMA_SLAVE, base->dma_slave.cap_mask);
1229
1230 base->dma_slave.device_alloc_chan_resources = coh901318_alloc_chan_resources;
1231 base->dma_slave.device_free_chan_resources = coh901318_free_chan_resources;
1232 base->dma_slave.device_prep_slave_sg = coh901318_prep_slave_sg;
1233 base->dma_slave.device_is_tx_complete = coh901318_is_tx_complete;
1234 base->dma_slave.device_issue_pending = coh901318_issue_pending;
1235 base->dma_slave.device_terminate_all = coh901318_terminate_all;
1236 base->dma_slave.dev = &pdev->dev;
1237
1238 err = dma_async_device_register(&base->dma_slave);
1239
1240 if (err)
1241 goto err_register_slave;
1242
1243 /* init channels for memcpy */
1244 coh901318_base_init(&base->dma_memcpy, base->platform->chans_memcpy,
1245 base);
1246
1247 dma_cap_zero(base->dma_memcpy.cap_mask);
1248 dma_cap_set(DMA_MEMCPY, base->dma_memcpy.cap_mask);
1249
1250 base->dma_memcpy.device_alloc_chan_resources = coh901318_alloc_chan_resources;
1251 base->dma_memcpy.device_free_chan_resources = coh901318_free_chan_resources;
1252 base->dma_memcpy.device_prep_dma_memcpy = coh901318_prep_memcpy;
1253 base->dma_memcpy.device_is_tx_complete = coh901318_is_tx_complete;
1254 base->dma_memcpy.device_issue_pending = coh901318_issue_pending;
1255 base->dma_memcpy.device_terminate_all = coh901318_terminate_all;
1256 base->dma_memcpy.dev = &pdev->dev;
1257 err = dma_async_device_register(&base->dma_memcpy);
1258
1259 if (err)
1260 goto err_register_memcpy;
1261
1262 dev_dbg(&pdev->dev, "Initialized COH901318 DMA on virtual base 0x%08x\n",
1263 (u32) base->virtbase);
1264
1265 return err;
1266
1267 err_register_memcpy:
1268 dma_async_device_unregister(&base->dma_slave);
1269 err_register_slave:
1270 coh901318_pool_destroy(&base->pool);
1271 err_pool_create:
1272 free_irq(platform_get_irq(pdev, 0), base);
1273 err_request_irq:
1274 err_no_irq:
1275 iounmap(base->virtbase);
1276 err_no_ioremap:
1277 kfree(base);
1278 err_alloc_coh_dma_channels:
1279 err_no_platformdata:
1280 release_mem_region(pdev->resource->start,
1281 resource_size(pdev->resource));
1282 err_request_mem:
1283 err_get_resource:
1284 return err;
1285}
1286
1287static int __exit coh901318_remove(struct platform_device *pdev)
1288{
1289 struct coh901318_base *base = platform_get_drvdata(pdev);
1290
1291 dma_async_device_unregister(&base->dma_memcpy);
1292 dma_async_device_unregister(&base->dma_slave);
1293 coh901318_pool_destroy(&base->pool);
1294 free_irq(platform_get_irq(pdev, 0), base);
1295 iounmap(base->virtbase);
1296 kfree(base);
1297 release_mem_region(pdev->resource->start,
1298 resource_size(pdev->resource));
1299 return 0;
1300}
1301
1302
1303static struct platform_driver coh901318_driver = {
1304 .remove = __exit_p(coh901318_remove),
1305 .driver = {
1306 .name = "coh901318",
1307 },
1308};
1309
1310int __init coh901318_init(void)
1311{
1312 return platform_driver_probe(&coh901318_driver, coh901318_probe);
1313}
1314subsys_initcall(coh901318_init);
1315
1316void __exit coh901318_exit(void)
1317{
1318 platform_driver_unregister(&coh901318_driver);
1319}
1320module_exit(coh901318_exit);
1321
1322MODULE_LICENSE("GPL");
1323MODULE_AUTHOR("Per Friden");
diff --git a/drivers/dma/coh901318_lli.c b/drivers/dma/coh901318_lli.c
new file mode 100644
index 000000000000..f5120f238a4d
--- /dev/null
+++ b/drivers/dma/coh901318_lli.c
@@ -0,0 +1,318 @@
1/*
2 * driver/dma/coh901318_lli.c
3 *
4 * Copyright (C) 2007-2009 ST-Ericsson
5 * License terms: GNU General Public License (GPL) version 2
6 * Support functions for handling lli for dma
7 * Author: Per Friden <per.friden@stericsson.com>
8 */
9
10#include <linux/dma-mapping.h>
11#include <linux/spinlock.h>
12#include <linux/dmapool.h>
13#include <linux/memory.h>
14#include <mach/coh901318.h>
15
16#include "coh901318_lli.h"
17
18#if (defined(CONFIG_DEBUG_FS) && defined(CONFIG_U300_DEBUG))
19#define DEBUGFS_POOL_COUNTER_RESET(pool) (pool->debugfs_pool_counter = 0)
20#define DEBUGFS_POOL_COUNTER_ADD(pool, add) (pool->debugfs_pool_counter += add)
21#else
22#define DEBUGFS_POOL_COUNTER_RESET(pool)
23#define DEBUGFS_POOL_COUNTER_ADD(pool, add)
24#endif
25
26static struct coh901318_lli *
27coh901318_lli_next(struct coh901318_lli *data)
28{
29 if (data == NULL || data->link_addr == 0)
30 return NULL;
31
32 return (struct coh901318_lli *) data->virt_link_addr;
33}
34
35int coh901318_pool_create(struct coh901318_pool *pool,
36 struct device *dev,
37 size_t size, size_t align)
38{
39 spin_lock_init(&pool->lock);
40 pool->dev = dev;
41 pool->dmapool = dma_pool_create("lli_pool", dev, size, align, 0);
42
43 DEBUGFS_POOL_COUNTER_RESET(pool);
44 return 0;
45}
46
47int coh901318_pool_destroy(struct coh901318_pool *pool)
48{
49
50 dma_pool_destroy(pool->dmapool);
51 return 0;
52}
53
54struct coh901318_lli *
55coh901318_lli_alloc(struct coh901318_pool *pool, unsigned int len)
56{
57 int i;
58 struct coh901318_lli *head;
59 struct coh901318_lli *lli;
60 struct coh901318_lli *lli_prev;
61 dma_addr_t phy;
62
63 if (len == 0)
64 goto err;
65
66 spin_lock(&pool->lock);
67
68 head = dma_pool_alloc(pool->dmapool, GFP_NOWAIT, &phy);
69
70 if (head == NULL)
71 goto err;
72
73 DEBUGFS_POOL_COUNTER_ADD(pool, 1);
74
75 lli = head;
76 lli->phy_this = phy;
77
78 for (i = 1; i < len; i++) {
79 lli_prev = lli;
80
81 lli = dma_pool_alloc(pool->dmapool, GFP_NOWAIT, &phy);
82
83 if (lli == NULL)
84 goto err_clean_up;
85
86 DEBUGFS_POOL_COUNTER_ADD(pool, 1);
87 lli->phy_this = phy;
88
89 lli_prev->link_addr = phy;
90 lli_prev->virt_link_addr = lli;
91 }
92
93 lli->link_addr = 0x00000000U;
94
95 spin_unlock(&pool->lock);
96
97 return head;
98
99 err:
100 spin_unlock(&pool->lock);
101 return NULL;
102
103 err_clean_up:
104 lli_prev->link_addr = 0x00000000U;
105 spin_unlock(&pool->lock);
106 coh901318_lli_free(pool, &head);
107 return NULL;
108}
109
110void coh901318_lli_free(struct coh901318_pool *pool,
111 struct coh901318_lli **lli)
112{
113 struct coh901318_lli *l;
114 struct coh901318_lli *next;
115
116 if (lli == NULL)
117 return;
118
119 l = *lli;
120
121 if (l == NULL)
122 return;
123
124 spin_lock(&pool->lock);
125
126 while (l->link_addr) {
127 next = l->virt_link_addr;
128 dma_pool_free(pool->dmapool, l, l->phy_this);
129 DEBUGFS_POOL_COUNTER_ADD(pool, -1);
130 l = next;
131 }
132 dma_pool_free(pool->dmapool, l, l->phy_this);
133 DEBUGFS_POOL_COUNTER_ADD(pool, -1);
134
135 spin_unlock(&pool->lock);
136 *lli = NULL;
137}
138
139int
140coh901318_lli_fill_memcpy(struct coh901318_pool *pool,
141 struct coh901318_lli *lli,
142 dma_addr_t source, unsigned int size,
143 dma_addr_t destination, u32 ctrl_chained,
144 u32 ctrl_eom)
145{
146 int s = size;
147 dma_addr_t src = source;
148 dma_addr_t dst = destination;
149
150 lli->src_addr = src;
151 lli->dst_addr = dst;
152
153 while (lli->link_addr) {
154 lli->control = ctrl_chained | MAX_DMA_PACKET_SIZE;
155 lli->src_addr = src;
156 lli->dst_addr = dst;
157
158 s -= MAX_DMA_PACKET_SIZE;
159 lli = coh901318_lli_next(lli);
160
161 src += MAX_DMA_PACKET_SIZE;
162 dst += MAX_DMA_PACKET_SIZE;
163 }
164
165 lli->control = ctrl_eom | s;
166 lli->src_addr = src;
167 lli->dst_addr = dst;
168
169 /* One irq per single transfer */
170 return 1;
171}
172
173int
174coh901318_lli_fill_single(struct coh901318_pool *pool,
175 struct coh901318_lli *lli,
176 dma_addr_t buf, unsigned int size,
177 dma_addr_t dev_addr, u32 ctrl_chained, u32 ctrl_eom,
178 enum dma_data_direction dir)
179{
180 int s = size;
181 dma_addr_t src;
182 dma_addr_t dst;
183
184
185 if (dir == DMA_TO_DEVICE) {
186 src = buf;
187 dst = dev_addr;
188
189 } else if (dir == DMA_FROM_DEVICE) {
190
191 src = dev_addr;
192 dst = buf;
193 } else {
194 return -EINVAL;
195 }
196
197 while (lli->link_addr) {
198 size_t block_size = MAX_DMA_PACKET_SIZE;
199 lli->control = ctrl_chained | MAX_DMA_PACKET_SIZE;
200
201 /* If we are on the next-to-final block and there will
202 * be less than half a DMA packet left for the last
203 * block, then we want to make this block a little
204 * smaller to balance the sizes. This is meant to
205 * avoid too small transfers if the buffer size is
206 * (MAX_DMA_PACKET_SIZE*N + 1) */
207 if (s < (MAX_DMA_PACKET_SIZE + MAX_DMA_PACKET_SIZE/2))
208 block_size = MAX_DMA_PACKET_SIZE/2;
209
210 s -= block_size;
211 lli->src_addr = src;
212 lli->dst_addr = dst;
213
214 lli = coh901318_lli_next(lli);
215
216 if (dir == DMA_TO_DEVICE)
217 src += block_size;
218 else if (dir == DMA_FROM_DEVICE)
219 dst += block_size;
220 }
221
222 lli->control = ctrl_eom | s;
223 lli->src_addr = src;
224 lli->dst_addr = dst;
225
226 /* One irq per single transfer */
227 return 1;
228}
229
230int
231coh901318_lli_fill_sg(struct coh901318_pool *pool,
232 struct coh901318_lli *lli,
233 struct scatterlist *sgl, unsigned int nents,
234 dma_addr_t dev_addr, u32 ctrl_chained, u32 ctrl,
235 u32 ctrl_last,
236 enum dma_data_direction dir, u32 ctrl_irq_mask)
237{
238 int i;
239 struct scatterlist *sg;
240 u32 ctrl_sg;
241 dma_addr_t src = 0;
242 dma_addr_t dst = 0;
243 int nbr_of_irq = 0;
244 u32 bytes_to_transfer;
245 u32 elem_size;
246
247 if (lli == NULL)
248 goto err;
249
250 spin_lock(&pool->lock);
251
252 if (dir == DMA_TO_DEVICE)
253 dst = dev_addr;
254 else if (dir == DMA_FROM_DEVICE)
255 src = dev_addr;
256 else
257 goto err;
258
259 for_each_sg(sgl, sg, nents, i) {
260 if (sg_is_chain(sg)) {
261 /* sg continues to the next sg-element don't
262 * send ctrl_finish until the last
263 * sg-element in the chain
264 */
265 ctrl_sg = ctrl_chained;
266 } else if (i == nents - 1)
267 ctrl_sg = ctrl_last;
268 else
269 ctrl_sg = ctrl ? ctrl : ctrl_last;
270
271
272 if ((ctrl_sg & ctrl_irq_mask))
273 nbr_of_irq++;
274
275 if (dir == DMA_TO_DEVICE)
276 /* increment source address */
277 src = sg_dma_address(sg);
278 else
279 /* increment destination address */
280 dst = sg_dma_address(sg);
281
282 bytes_to_transfer = sg_dma_len(sg);
283
284 while (bytes_to_transfer) {
285 u32 val;
286
287 if (bytes_to_transfer > MAX_DMA_PACKET_SIZE) {
288 elem_size = MAX_DMA_PACKET_SIZE;
289 val = ctrl_chained;
290 } else {
291 elem_size = bytes_to_transfer;
292 val = ctrl_sg;
293 }
294
295 lli->control = val | elem_size;
296 lli->src_addr = src;
297 lli->dst_addr = dst;
298
299 if (dir == DMA_FROM_DEVICE)
300 dst += elem_size;
301 else
302 src += elem_size;
303
304 BUG_ON(lli->link_addr & 3);
305
306 bytes_to_transfer -= elem_size;
307 lli = coh901318_lli_next(lli);
308 }
309
310 }
311 spin_unlock(&pool->lock);
312
313 /* There can be many IRQs per sg transfer */
314 return nbr_of_irq;
315 err:
316 spin_unlock(&pool->lock);
317 return -EINVAL;
318}
diff --git a/drivers/dma/coh901318_lli.h b/drivers/dma/coh901318_lli.h
new file mode 100644
index 000000000000..7bf713b79c6b
--- /dev/null
+++ b/drivers/dma/coh901318_lli.h
@@ -0,0 +1,124 @@
1/*
2 * driver/dma/coh901318_lli.h
3 *
4 * Copyright (C) 2007-2009 ST-Ericsson
5 * License terms: GNU General Public License (GPL) version 2
6 * Support functions for handling lli for coh901318
7 * Author: Per Friden <per.friden@stericsson.com>
8 */
9
10#ifndef COH901318_LLI_H
11#define COH901318_LLI_H
12
13#include <mach/coh901318.h>
14
15struct device;
16
17struct coh901318_pool {
18 spinlock_t lock;
19 struct dma_pool *dmapool;
20 struct device *dev;
21
22#ifdef CONFIG_DEBUG_FS
23 int debugfs_pool_counter;
24#endif
25};
26
27struct device;
28/**
29 * coh901318_pool_create() - Creates an dma pool for lli:s
30 * @pool: pool handle
31 * @dev: dma device
32 * @lli_nbr: number of lli:s in the pool
33 * @algin: adress alignemtn of lli:s
34 * returns 0 on success otherwise none zero
35 */
36int coh901318_pool_create(struct coh901318_pool *pool,
37 struct device *dev,
38 size_t lli_nbr, size_t align);
39
40/**
41 * coh901318_pool_destroy() - Destroys the dma pool
42 * @pool: pool handle
43 * returns 0 on success otherwise none zero
44 */
45int coh901318_pool_destroy(struct coh901318_pool *pool);
46
47/**
48 * coh901318_lli_alloc() - Allocates a linked list
49 *
50 * @pool: pool handle
51 * @len: length to list
52 * return: none NULL if success otherwise NULL
53 */
54struct coh901318_lli *
55coh901318_lli_alloc(struct coh901318_pool *pool,
56 unsigned int len);
57
58/**
59 * coh901318_lli_free() - Returns the linked list items to the pool
60 * @pool: pool handle
61 * @lli: reference to lli pointer to be freed
62 */
63void coh901318_lli_free(struct coh901318_pool *pool,
64 struct coh901318_lli **lli);
65
66/**
67 * coh901318_lli_fill_memcpy() - Prepares the lli:s for dma memcpy
68 * @pool: pool handle
69 * @lli: allocated lli
70 * @src: src address
71 * @size: transfer size
72 * @dst: destination address
73 * @ctrl_chained: ctrl for chained lli
74 * @ctrl_last: ctrl for the last lli
75 * returns number of CPU interrupts for the lli, negative on error.
76 */
77int
78coh901318_lli_fill_memcpy(struct coh901318_pool *pool,
79 struct coh901318_lli *lli,
80 dma_addr_t src, unsigned int size,
81 dma_addr_t dst, u32 ctrl_chained, u32 ctrl_last);
82
83/**
84 * coh901318_lli_fill_single() - Prepares the lli:s for dma single transfer
85 * @pool: pool handle
86 * @lli: allocated lli
87 * @buf: transfer buffer
88 * @size: transfer size
89 * @dev_addr: address of periphal
90 * @ctrl_chained: ctrl for chained lli
91 * @ctrl_last: ctrl for the last lli
92 * @dir: direction of transfer (to or from device)
93 * returns number of CPU interrupts for the lli, negative on error.
94 */
95int
96coh901318_lli_fill_single(struct coh901318_pool *pool,
97 struct coh901318_lli *lli,
98 dma_addr_t buf, unsigned int size,
99 dma_addr_t dev_addr, u32 ctrl_chained, u32 ctrl_last,
100 enum dma_data_direction dir);
101
102/**
103 * coh901318_lli_fill_single() - Prepares the lli:s for dma scatter list transfer
104 * @pool: pool handle
105 * @lli: allocated lli
106 * @sg: scatter gather list
107 * @nents: number of entries in sg
108 * @dev_addr: address of periphal
109 * @ctrl_chained: ctrl for chained lli
110 * @ctrl: ctrl of middle lli
111 * @ctrl_last: ctrl for the last lli
112 * @dir: direction of transfer (to or from device)
113 * @ctrl_irq_mask: ctrl mask for CPU interrupt
114 * returns number of CPU interrupts for the lli, negative on error.
115 */
116int
117coh901318_lli_fill_sg(struct coh901318_pool *pool,
118 struct coh901318_lli *lli,
119 struct scatterlist *sg, unsigned int nents,
120 dma_addr_t dev_addr, u32 ctrl_chained,
121 u32 ctrl, u32 ctrl_last,
122 enum dma_data_direction dir, u32 ctrl_irq_mask);
123
124#endif /* COH901318_LLI_H */
diff --git a/drivers/dma/dmaengine.c b/drivers/dma/dmaengine.c
index 6f51a0a7a8bb..e7a3230fb7d5 100644
--- a/drivers/dma/dmaengine.c
+++ b/drivers/dma/dmaengine.c
@@ -826,6 +826,7 @@ void dma_async_device_unregister(struct dma_device *device)
826 chan->dev->chan = NULL; 826 chan->dev->chan = NULL;
827 mutex_unlock(&dma_list_mutex); 827 mutex_unlock(&dma_list_mutex);
828 device_unregister(&chan->dev->device); 828 device_unregister(&chan->dev->device);
829 free_percpu(chan->local);
829 } 830 }
830} 831}
831EXPORT_SYMBOL(dma_async_device_unregister); 832EXPORT_SYMBOL(dma_async_device_unregister);
diff --git a/drivers/dma/dmatest.c b/drivers/dma/dmatest.c
index a32a4cf7b1e0..948d563941c9 100644
--- a/drivers/dma/dmatest.c
+++ b/drivers/dma/dmatest.c
@@ -298,10 +298,6 @@ static int dmatest_func(void *data)
298 298
299 total_tests++; 299 total_tests++;
300 300
301 len = dmatest_random() % test_buf_size + 1;
302 src_off = dmatest_random() % (test_buf_size - len + 1);
303 dst_off = dmatest_random() % (test_buf_size - len + 1);
304
305 /* honor alignment restrictions */ 301 /* honor alignment restrictions */
306 if (thread->type == DMA_MEMCPY) 302 if (thread->type == DMA_MEMCPY)
307 align = dev->copy_align; 303 align = dev->copy_align;
@@ -310,7 +306,19 @@ static int dmatest_func(void *data)
310 else if (thread->type == DMA_PQ) 306 else if (thread->type == DMA_PQ)
311 align = dev->pq_align; 307 align = dev->pq_align;
312 308
309 if (1 << align > test_buf_size) {
310 pr_err("%u-byte buffer too small for %d-byte alignment\n",
311 test_buf_size, 1 << align);
312 break;
313 }
314
315 len = dmatest_random() % test_buf_size + 1;
313 len = (len >> align) << align; 316 len = (len >> align) << align;
317 if (!len)
318 len = 1 << align;
319 src_off = dmatest_random() % (test_buf_size - len + 1);
320 dst_off = dmatest_random() % (test_buf_size - len + 1);
321
314 src_off = (src_off >> align) << align; 322 src_off = (src_off >> align) << align;
315 dst_off = (dst_off >> align) << align; 323 dst_off = (dst_off >> align) << align;
316 324
@@ -459,7 +467,7 @@ err_srcs:
459 467
460 if (iterations > 0) 468 if (iterations > 0)
461 while (!kthread_should_stop()) { 469 while (!kthread_should_stop()) {
462 DECLARE_WAIT_QUEUE_HEAD(wait_dmatest_exit); 470 DECLARE_WAIT_QUEUE_HEAD_ONSTACK(wait_dmatest_exit);
463 interruptible_sleep_on(&wait_dmatest_exit); 471 interruptible_sleep_on(&wait_dmatest_exit);
464 } 472 }
465 473
diff --git a/drivers/dma/dw_dmac.c b/drivers/dma/dw_dmac.c
index 285bed0fe17b..d28369f7afd2 100644
--- a/drivers/dma/dw_dmac.c
+++ b/drivers/dma/dw_dmac.c
@@ -1270,8 +1270,6 @@ static int __init dw_probe(struct platform_device *pdev)
1270 goto err_kfree; 1270 goto err_kfree;
1271 } 1271 }
1272 1272
1273 memset(dw, 0, sizeof *dw);
1274
1275 dw->regs = ioremap(io->start, DW_REGLEN); 1273 dw->regs = ioremap(io->start, DW_REGLEN);
1276 if (!dw->regs) { 1274 if (!dw->regs) {
1277 err = -ENOMEM; 1275 err = -ENOMEM;
diff --git a/drivers/dma/ioat/dma.c b/drivers/dma/ioat/dma.c
index c524d36d3c2e..dcc4ab78b32b 100644
--- a/drivers/dma/ioat/dma.c
+++ b/drivers/dma/ioat/dma.c
@@ -1032,7 +1032,7 @@ int __devinit ioat_probe(struct ioatdma_device *device)
1032 dma->dev = &pdev->dev; 1032 dma->dev = &pdev->dev;
1033 1033
1034 if (!dma->chancnt) { 1034 if (!dma->chancnt) {
1035 dev_err(dev, "zero channels detected\n"); 1035 dev_err(dev, "channel enumeration error\n");
1036 goto err_setup_interrupts; 1036 goto err_setup_interrupts;
1037 } 1037 }
1038 1038
diff --git a/drivers/dma/ioat/dma.h b/drivers/dma/ioat/dma.h
index 45edde996480..bbc3e78ef333 100644
--- a/drivers/dma/ioat/dma.h
+++ b/drivers/dma/ioat/dma.h
@@ -60,6 +60,7 @@
60 * @dca: direct cache access context 60 * @dca: direct cache access context
61 * @intr_quirk: interrupt setup quirk (for ioat_v1 devices) 61 * @intr_quirk: interrupt setup quirk (for ioat_v1 devices)
62 * @enumerate_channels: hw version specific channel enumeration 62 * @enumerate_channels: hw version specific channel enumeration
63 * @reset_hw: hw version specific channel (re)initialization
63 * @cleanup_tasklet: select between the v2 and v3 cleanup routines 64 * @cleanup_tasklet: select between the v2 and v3 cleanup routines
64 * @timer_fn: select between the v2 and v3 timer watchdog routines 65 * @timer_fn: select between the v2 and v3 timer watchdog routines
65 * @self_test: hardware version specific self test for each supported op type 66 * @self_test: hardware version specific self test for each supported op type
@@ -78,6 +79,7 @@ struct ioatdma_device {
78 struct dca_provider *dca; 79 struct dca_provider *dca;
79 void (*intr_quirk)(struct ioatdma_device *device); 80 void (*intr_quirk)(struct ioatdma_device *device);
80 int (*enumerate_channels)(struct ioatdma_device *device); 81 int (*enumerate_channels)(struct ioatdma_device *device);
82 int (*reset_hw)(struct ioat_chan_common *chan);
81 void (*cleanup_tasklet)(unsigned long data); 83 void (*cleanup_tasklet)(unsigned long data);
82 void (*timer_fn)(unsigned long data); 84 void (*timer_fn)(unsigned long data);
83 int (*self_test)(struct ioatdma_device *device); 85 int (*self_test)(struct ioatdma_device *device);
@@ -264,6 +266,22 @@ static inline void ioat_suspend(struct ioat_chan_common *chan)
264 writeb(IOAT_CHANCMD_SUSPEND, chan->reg_base + IOAT_CHANCMD_OFFSET(ver)); 266 writeb(IOAT_CHANCMD_SUSPEND, chan->reg_base + IOAT_CHANCMD_OFFSET(ver));
265} 267}
266 268
269static inline void ioat_reset(struct ioat_chan_common *chan)
270{
271 u8 ver = chan->device->version;
272
273 writeb(IOAT_CHANCMD_RESET, chan->reg_base + IOAT_CHANCMD_OFFSET(ver));
274}
275
276static inline bool ioat_reset_pending(struct ioat_chan_common *chan)
277{
278 u8 ver = chan->device->version;
279 u8 cmd;
280
281 cmd = readb(chan->reg_base + IOAT_CHANCMD_OFFSET(ver));
282 return (cmd & IOAT_CHANCMD_RESET) == IOAT_CHANCMD_RESET;
283}
284
267static inline void ioat_set_chainaddr(struct ioat_dma_chan *ioat, u64 addr) 285static inline void ioat_set_chainaddr(struct ioat_dma_chan *ioat, u64 addr)
268{ 286{
269 struct ioat_chan_common *chan = &ioat->base; 287 struct ioat_chan_common *chan = &ioat->base;
diff --git a/drivers/dma/ioat/dma_v2.c b/drivers/dma/ioat/dma_v2.c
index 8f1f7f05deaa..5cc37afe2bc1 100644
--- a/drivers/dma/ioat/dma_v2.c
+++ b/drivers/dma/ioat/dma_v2.c
@@ -239,20 +239,50 @@ void __ioat2_restart_chan(struct ioat2_dma_chan *ioat)
239 __ioat2_start_null_desc(ioat); 239 __ioat2_start_null_desc(ioat);
240} 240}
241 241
242static void ioat2_restart_channel(struct ioat2_dma_chan *ioat) 242int ioat2_quiesce(struct ioat_chan_common *chan, unsigned long tmo)
243{ 243{
244 struct ioat_chan_common *chan = &ioat->base; 244 unsigned long end = jiffies + tmo;
245 unsigned long phys_complete; 245 int err = 0;
246 u32 status; 246 u32 status;
247 247
248 status = ioat_chansts(chan); 248 status = ioat_chansts(chan);
249 if (is_ioat_active(status) || is_ioat_idle(status)) 249 if (is_ioat_active(status) || is_ioat_idle(status))
250 ioat_suspend(chan); 250 ioat_suspend(chan);
251 while (is_ioat_active(status) || is_ioat_idle(status)) { 251 while (is_ioat_active(status) || is_ioat_idle(status)) {
252 if (tmo && time_after(jiffies, end)) {
253 err = -ETIMEDOUT;
254 break;
255 }
252 status = ioat_chansts(chan); 256 status = ioat_chansts(chan);
253 cpu_relax(); 257 cpu_relax();
254 } 258 }
255 259
260 return err;
261}
262
263int ioat2_reset_sync(struct ioat_chan_common *chan, unsigned long tmo)
264{
265 unsigned long end = jiffies + tmo;
266 int err = 0;
267
268 ioat_reset(chan);
269 while (ioat_reset_pending(chan)) {
270 if (end && time_after(jiffies, end)) {
271 err = -ETIMEDOUT;
272 break;
273 }
274 cpu_relax();
275 }
276
277 return err;
278}
279
280static void ioat2_restart_channel(struct ioat2_dma_chan *ioat)
281{
282 struct ioat_chan_common *chan = &ioat->base;
283 unsigned long phys_complete;
284
285 ioat2_quiesce(chan, 0);
256 if (ioat_cleanup_preamble(chan, &phys_complete)) 286 if (ioat_cleanup_preamble(chan, &phys_complete))
257 __cleanup(ioat, phys_complete); 287 __cleanup(ioat, phys_complete);
258 288
@@ -318,6 +348,19 @@ void ioat2_timer_event(unsigned long data)
318 spin_unlock_bh(&chan->cleanup_lock); 348 spin_unlock_bh(&chan->cleanup_lock);
319} 349}
320 350
351static int ioat2_reset_hw(struct ioat_chan_common *chan)
352{
353 /* throw away whatever the channel was doing and get it initialized */
354 u32 chanerr;
355
356 ioat2_quiesce(chan, msecs_to_jiffies(100));
357
358 chanerr = readl(chan->reg_base + IOAT_CHANERR_OFFSET);
359 writel(chanerr, chan->reg_base + IOAT_CHANERR_OFFSET);
360
361 return ioat2_reset_sync(chan, msecs_to_jiffies(200));
362}
363
321/** 364/**
322 * ioat2_enumerate_channels - find and initialize the device's channels 365 * ioat2_enumerate_channels - find and initialize the device's channels
323 * @device: the device to be enumerated 366 * @device: the device to be enumerated
@@ -360,6 +403,10 @@ int ioat2_enumerate_channels(struct ioatdma_device *device)
360 (unsigned long) ioat); 403 (unsigned long) ioat);
361 ioat->xfercap_log = xfercap_log; 404 ioat->xfercap_log = xfercap_log;
362 spin_lock_init(&ioat->ring_lock); 405 spin_lock_init(&ioat->ring_lock);
406 if (device->reset_hw(&ioat->base)) {
407 i = 0;
408 break;
409 }
363 } 410 }
364 dma->chancnt = i; 411 dma->chancnt = i;
365 return i; 412 return i;
@@ -467,7 +514,6 @@ int ioat2_alloc_chan_resources(struct dma_chan *c)
467 struct ioat2_dma_chan *ioat = to_ioat2_chan(c); 514 struct ioat2_dma_chan *ioat = to_ioat2_chan(c);
468 struct ioat_chan_common *chan = &ioat->base; 515 struct ioat_chan_common *chan = &ioat->base;
469 struct ioat_ring_ent **ring; 516 struct ioat_ring_ent **ring;
470 u32 chanerr;
471 int order; 517 int order;
472 518
473 /* have we already been set up? */ 519 /* have we already been set up? */
@@ -477,12 +523,6 @@ int ioat2_alloc_chan_resources(struct dma_chan *c)
477 /* Setup register to interrupt and write completion status on error */ 523 /* Setup register to interrupt and write completion status on error */
478 writew(IOAT_CHANCTRL_RUN, chan->reg_base + IOAT_CHANCTRL_OFFSET); 524 writew(IOAT_CHANCTRL_RUN, chan->reg_base + IOAT_CHANCTRL_OFFSET);
479 525
480 chanerr = readl(chan->reg_base + IOAT_CHANERR_OFFSET);
481 if (chanerr) {
482 dev_err(to_dev(chan), "CHANERR = %x, clearing\n", chanerr);
483 writel(chanerr, chan->reg_base + IOAT_CHANERR_OFFSET);
484 }
485
486 /* allocate a completion writeback area */ 526 /* allocate a completion writeback area */
487 /* doing 2 32bit writes to mmio since 1 64b write doesn't work */ 527 /* doing 2 32bit writes to mmio since 1 64b write doesn't work */
488 chan->completion = pci_pool_alloc(chan->device->completion_pool, 528 chan->completion = pci_pool_alloc(chan->device->completion_pool,
@@ -746,13 +786,7 @@ void ioat2_free_chan_resources(struct dma_chan *c)
746 tasklet_disable(&chan->cleanup_task); 786 tasklet_disable(&chan->cleanup_task);
747 del_timer_sync(&chan->timer); 787 del_timer_sync(&chan->timer);
748 device->cleanup_tasklet((unsigned long) ioat); 788 device->cleanup_tasklet((unsigned long) ioat);
749 789 device->reset_hw(chan);
750 /* Delay 100ms after reset to allow internal DMA logic to quiesce
751 * before removing DMA descriptor resources.
752 */
753 writeb(IOAT_CHANCMD_RESET,
754 chan->reg_base + IOAT_CHANCMD_OFFSET(chan->device->version));
755 mdelay(100);
756 790
757 spin_lock_bh(&ioat->ring_lock); 791 spin_lock_bh(&ioat->ring_lock);
758 descs = ioat2_ring_space(ioat); 792 descs = ioat2_ring_space(ioat);
@@ -839,6 +873,7 @@ int __devinit ioat2_dma_probe(struct ioatdma_device *device, int dca)
839 int err; 873 int err;
840 874
841 device->enumerate_channels = ioat2_enumerate_channels; 875 device->enumerate_channels = ioat2_enumerate_channels;
876 device->reset_hw = ioat2_reset_hw;
842 device->cleanup_tasklet = ioat2_cleanup_tasklet; 877 device->cleanup_tasklet = ioat2_cleanup_tasklet;
843 device->timer_fn = ioat2_timer_event; 878 device->timer_fn = ioat2_timer_event;
844 device->self_test = ioat_dma_self_test; 879 device->self_test = ioat_dma_self_test;
diff --git a/drivers/dma/ioat/dma_v2.h b/drivers/dma/ioat/dma_v2.h
index 1d849ef74d5f..3afad8da43cc 100644
--- a/drivers/dma/ioat/dma_v2.h
+++ b/drivers/dma/ioat/dma_v2.h
@@ -185,6 +185,8 @@ bool reshape_ring(struct ioat2_dma_chan *ioat, int order);
185void __ioat2_issue_pending(struct ioat2_dma_chan *ioat); 185void __ioat2_issue_pending(struct ioat2_dma_chan *ioat);
186void ioat2_cleanup_tasklet(unsigned long data); 186void ioat2_cleanup_tasklet(unsigned long data);
187void ioat2_timer_event(unsigned long data); 187void ioat2_timer_event(unsigned long data);
188int ioat2_quiesce(struct ioat_chan_common *chan, unsigned long tmo);
189int ioat2_reset_sync(struct ioat_chan_common *chan, unsigned long tmo);
188extern struct kobj_type ioat2_ktype; 190extern struct kobj_type ioat2_ktype;
189extern struct kmem_cache *ioat2_cache; 191extern struct kmem_cache *ioat2_cache;
190#endif /* IOATDMA_V2_H */ 192#endif /* IOATDMA_V2_H */
diff --git a/drivers/dma/ioat/dma_v3.c b/drivers/dma/ioat/dma_v3.c
index 42f6f10fb0cc..9908c9e94b2d 100644
--- a/drivers/dma/ioat/dma_v3.c
+++ b/drivers/dma/ioat/dma_v3.c
@@ -650,9 +650,11 @@ __ioat3_prep_pq_lock(struct dma_chan *c, enum sum_check_flags *result,
650 650
651 num_descs = ioat2_xferlen_to_descs(ioat, len); 651 num_descs = ioat2_xferlen_to_descs(ioat, len);
652 /* we need 2x the number of descriptors to cover greater than 3 652 /* we need 2x the number of descriptors to cover greater than 3
653 * sources 653 * sources (we need 1 extra source in the q-only continuation
654 * case and 3 extra sources in the p+q continuation case.
654 */ 655 */
655 if (src_cnt > 3 || flags & DMA_PREP_CONTINUE) { 656 if (src_cnt + dmaf_p_disabled_continue(flags) > 3 ||
657 (dmaf_continue(flags) && !dmaf_p_disabled_continue(flags))) {
656 with_ext = 1; 658 with_ext = 1;
657 num_descs *= 2; 659 num_descs *= 2;
658 } else 660 } else
@@ -1128,6 +1130,45 @@ static int __devinit ioat3_dma_self_test(struct ioatdma_device *device)
1128 return 0; 1130 return 0;
1129} 1131}
1130 1132
1133static int ioat3_reset_hw(struct ioat_chan_common *chan)
1134{
1135 /* throw away whatever the channel was doing and get it
1136 * initialized, with ioat3 specific workarounds
1137 */
1138 struct ioatdma_device *device = chan->device;
1139 struct pci_dev *pdev = device->pdev;
1140 u32 chanerr;
1141 u16 dev_id;
1142 int err;
1143
1144 ioat2_quiesce(chan, msecs_to_jiffies(100));
1145
1146 chanerr = readl(chan->reg_base + IOAT_CHANERR_OFFSET);
1147 writel(chanerr, chan->reg_base + IOAT_CHANERR_OFFSET);
1148
1149 /* -= IOAT ver.3 workarounds =- */
1150 /* Write CHANERRMSK_INT with 3E07h to mask out the errors
1151 * that can cause stability issues for IOAT ver.3, and clear any
1152 * pending errors
1153 */
1154 pci_write_config_dword(pdev, IOAT_PCI_CHANERRMASK_INT_OFFSET, 0x3e07);
1155 err = pci_read_config_dword(pdev, IOAT_PCI_CHANERR_INT_OFFSET, &chanerr);
1156 if (err) {
1157 dev_err(&pdev->dev, "channel error register unreachable\n");
1158 return err;
1159 }
1160 pci_write_config_dword(pdev, IOAT_PCI_CHANERR_INT_OFFSET, chanerr);
1161
1162 /* Clear DMAUNCERRSTS Cfg-Reg Parity Error status bit
1163 * (workaround for spurious config parity error after restart)
1164 */
1165 pci_read_config_word(pdev, IOAT_PCI_DEVICE_ID_OFFSET, &dev_id);
1166 if (dev_id == PCI_DEVICE_ID_INTEL_IOAT_TBG0)
1167 pci_write_config_dword(pdev, IOAT_PCI_DMAUNCERRSTS_OFFSET, 0x10);
1168
1169 return ioat2_reset_sync(chan, msecs_to_jiffies(200));
1170}
1171
1131int __devinit ioat3_dma_probe(struct ioatdma_device *device, int dca) 1172int __devinit ioat3_dma_probe(struct ioatdma_device *device, int dca)
1132{ 1173{
1133 struct pci_dev *pdev = device->pdev; 1174 struct pci_dev *pdev = device->pdev;
@@ -1137,10 +1178,10 @@ int __devinit ioat3_dma_probe(struct ioatdma_device *device, int dca)
1137 struct ioat_chan_common *chan; 1178 struct ioat_chan_common *chan;
1138 bool is_raid_device = false; 1179 bool is_raid_device = false;
1139 int err; 1180 int err;
1140 u16 dev_id;
1141 u32 cap; 1181 u32 cap;
1142 1182
1143 device->enumerate_channels = ioat2_enumerate_channels; 1183 device->enumerate_channels = ioat2_enumerate_channels;
1184 device->reset_hw = ioat3_reset_hw;
1144 device->self_test = ioat3_dma_self_test; 1185 device->self_test = ioat3_dma_self_test;
1145 dma = &device->common; 1186 dma = &device->common;
1146 dma->device_prep_dma_memcpy = ioat2_dma_prep_memcpy_lock; 1187 dma->device_prep_dma_memcpy = ioat2_dma_prep_memcpy_lock;
@@ -1216,19 +1257,6 @@ int __devinit ioat3_dma_probe(struct ioatdma_device *device, int dca)
1216 dma->device_prep_dma_xor_val = NULL; 1257 dma->device_prep_dma_xor_val = NULL;
1217 #endif 1258 #endif
1218 1259
1219 /* -= IOAT ver.3 workarounds =- */
1220 /* Write CHANERRMSK_INT with 3E07h to mask out the errors
1221 * that can cause stability issues for IOAT ver.3
1222 */
1223 pci_write_config_dword(pdev, IOAT_PCI_CHANERRMASK_INT_OFFSET, 0x3e07);
1224
1225 /* Clear DMAUNCERRSTS Cfg-Reg Parity Error status bit
1226 * (workaround for spurious config parity error after restart)
1227 */
1228 pci_read_config_word(pdev, IOAT_PCI_DEVICE_ID_OFFSET, &dev_id);
1229 if (dev_id == PCI_DEVICE_ID_INTEL_IOAT_TBG0)
1230 pci_write_config_dword(pdev, IOAT_PCI_DMAUNCERRSTS_OFFSET, 0x10);
1231
1232 err = ioat_probe(device); 1260 err = ioat_probe(device);
1233 if (err) 1261 if (err)
1234 return err; 1262 return err;
diff --git a/drivers/dma/ioat/registers.h b/drivers/dma/ioat/registers.h
index f015ec196700..e8ae63baf588 100644
--- a/drivers/dma/ioat/registers.h
+++ b/drivers/dma/ioat/registers.h
@@ -27,6 +27,7 @@
27 27
28#define IOAT_PCI_DEVICE_ID_OFFSET 0x02 28#define IOAT_PCI_DEVICE_ID_OFFSET 0x02
29#define IOAT_PCI_DMAUNCERRSTS_OFFSET 0x148 29#define IOAT_PCI_DMAUNCERRSTS_OFFSET 0x148
30#define IOAT_PCI_CHANERR_INT_OFFSET 0x180
30#define IOAT_PCI_CHANERRMASK_INT_OFFSET 0x184 31#define IOAT_PCI_CHANERRMASK_INT_OFFSET 0x184
31 32
32/* MMIO Device Registers */ 33/* MMIO Device Registers */
diff --git a/drivers/dma/iop-adma.c b/drivers/dma/iop-adma.c
index 645ca8d54ec4..ca6e6a0cb793 100644
--- a/drivers/dma/iop-adma.c
+++ b/drivers/dma/iop-adma.c
@@ -1470,7 +1470,7 @@ static int __devinit iop_adma_probe(struct platform_device *pdev)
1470 return -ENODEV; 1470 return -ENODEV;
1471 1471
1472 if (!devm_request_mem_region(&pdev->dev, res->start, 1472 if (!devm_request_mem_region(&pdev->dev, res->start,
1473 res->end - res->start, pdev->name)) 1473 resource_size(res), pdev->name))
1474 return -EBUSY; 1474 return -EBUSY;
1475 1475
1476 adev = kzalloc(sizeof(*adev), GFP_KERNEL); 1476 adev = kzalloc(sizeof(*adev), GFP_KERNEL);
@@ -1542,7 +1542,7 @@ static int __devinit iop_adma_probe(struct platform_device *pdev)
1542 iop_chan->device = adev; 1542 iop_chan->device = adev;
1543 1543
1544 iop_chan->mmr_base = devm_ioremap(&pdev->dev, res->start, 1544 iop_chan->mmr_base = devm_ioremap(&pdev->dev, res->start,
1545 res->end - res->start); 1545 resource_size(res));
1546 if (!iop_chan->mmr_base) { 1546 if (!iop_chan->mmr_base) {
1547 ret = -ENOMEM; 1547 ret = -ENOMEM;
1548 goto err_free_iop_chan; 1548 goto err_free_iop_chan;
diff --git a/drivers/dma/ipu/ipu_idmac.c b/drivers/dma/ipu/ipu_idmac.c
index 9a5bc1a7389e..e80bae1673fa 100644
--- a/drivers/dma/ipu/ipu_idmac.c
+++ b/drivers/dma/ipu/ipu_idmac.c
@@ -761,12 +761,10 @@ static void ipu_select_buffer(enum ipu_channel channel, int buffer_n)
761 * @buffer_n: buffer number to update. 761 * @buffer_n: buffer number to update.
762 * 0 or 1 are the only valid values. 762 * 0 or 1 are the only valid values.
763 * @phyaddr: buffer physical address. 763 * @phyaddr: buffer physical address.
764 * @return: Returns 0 on success or negative error code on failure. This
765 * function will fail if the buffer is set to ready.
766 */ 764 */
767/* Called under spin_lock(_irqsave)(&ichan->lock) */ 765/* Called under spin_lock(_irqsave)(&ichan->lock) */
768static int ipu_update_channel_buffer(struct idmac_channel *ichan, 766static void ipu_update_channel_buffer(struct idmac_channel *ichan,
769 int buffer_n, dma_addr_t phyaddr) 767 int buffer_n, dma_addr_t phyaddr)
770{ 768{
771 enum ipu_channel channel = ichan->dma_chan.chan_id; 769 enum ipu_channel channel = ichan->dma_chan.chan_id;
772 uint32_t reg; 770 uint32_t reg;
@@ -806,8 +804,6 @@ static int ipu_update_channel_buffer(struct idmac_channel *ichan,
806 } 804 }
807 805
808 spin_unlock_irqrestore(&ipu_data.lock, flags); 806 spin_unlock_irqrestore(&ipu_data.lock, flags);
809
810 return 0;
811} 807}
812 808
813/* Called under spin_lock_irqsave(&ichan->lock) */ 809/* Called under spin_lock_irqsave(&ichan->lock) */
@@ -816,7 +812,6 @@ static int ipu_submit_buffer(struct idmac_channel *ichan,
816{ 812{
817 unsigned int chan_id = ichan->dma_chan.chan_id; 813 unsigned int chan_id = ichan->dma_chan.chan_id;
818 struct device *dev = &ichan->dma_chan.dev->device; 814 struct device *dev = &ichan->dma_chan.dev->device;
819 int ret;
820 815
821 if (async_tx_test_ack(&desc->txd)) 816 if (async_tx_test_ack(&desc->txd))
822 return -EINTR; 817 return -EINTR;
@@ -827,14 +822,7 @@ static int ipu_submit_buffer(struct idmac_channel *ichan,
827 * could make it conditional on status >= IPU_CHANNEL_ENABLED, but 822 * could make it conditional on status >= IPU_CHANNEL_ENABLED, but
828 * doing it again shouldn't hurt either. 823 * doing it again shouldn't hurt either.
829 */ 824 */
830 ret = ipu_update_channel_buffer(ichan, buf_idx, 825 ipu_update_channel_buffer(ichan, buf_idx, sg_dma_address(sg));
831 sg_dma_address(sg));
832
833 if (ret < 0) {
834 dev_err(dev, "Updating sg %p on channel 0x%x buffer %d failed!\n",
835 sg, chan_id, buf_idx);
836 return ret;
837 }
838 826
839 ipu_select_buffer(chan_id, buf_idx); 827 ipu_select_buffer(chan_id, buf_idx);
840 dev_dbg(dev, "Updated sg %p on channel 0x%x buffer %d\n", 828 dev_dbg(dev, "Updated sg %p on channel 0x%x buffer %d\n",
@@ -1379,10 +1367,11 @@ static irqreturn_t idmac_interrupt(int irq, void *dev_id)
1379 1367
1380 if (likely(sgnew) && 1368 if (likely(sgnew) &&
1381 ipu_submit_buffer(ichan, descnew, sgnew, ichan->active_buffer) < 0) { 1369 ipu_submit_buffer(ichan, descnew, sgnew, ichan->active_buffer) < 0) {
1382 callback = desc->txd.callback; 1370 callback = descnew->txd.callback;
1383 callback_param = desc->txd.callback_param; 1371 callback_param = descnew->txd.callback_param;
1384 spin_unlock(&ichan->lock); 1372 spin_unlock(&ichan->lock);
1385 callback(callback_param); 1373 if (callback)
1374 callback(callback_param);
1386 spin_lock(&ichan->lock); 1375 spin_lock(&ichan->lock);
1387 } 1376 }
1388 1377
diff --git a/drivers/dma/ppc4xx/Makefile b/drivers/dma/ppc4xx/Makefile
new file mode 100644
index 000000000000..b3d259b3e52a
--- /dev/null
+++ b/drivers/dma/ppc4xx/Makefile
@@ -0,0 +1 @@
obj-$(CONFIG_AMCC_PPC440SPE_ADMA) += adma.o
diff --git a/drivers/dma/ppc4xx/adma.c b/drivers/dma/ppc4xx/adma.c
new file mode 100644
index 000000000000..0a3478e910f0
--- /dev/null
+++ b/drivers/dma/ppc4xx/adma.c
@@ -0,0 +1,5027 @@
1/*
2 * Copyright (C) 2006-2009 DENX Software Engineering.
3 *
4 * Author: Yuri Tikhonov <yur@emcraft.com>
5 *
6 * Further porting to arch/powerpc by
7 * Anatolij Gustschin <agust@denx.de>
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the Free
11 * Software Foundation; either version 2 of the License, or (at your option)
12 * any later version.
13 *
14 * This program is distributed in the hope that it will be useful, but WITHOUT
15 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
16 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
17 * more details.
18 *
19 * You should have received a copy of the GNU General Public License along with
20 * this program; if not, write to the Free Software Foundation, Inc., 59
21 * Temple Place - Suite 330, Boston, MA 02111-1307, USA.
22 *
23 * The full GNU General Public License is included in this distribution in the
24 * file called COPYING.
25 */
26
27/*
28 * This driver supports the asynchrounous DMA copy and RAID engines available
29 * on the AMCC PPC440SPe Processors.
30 * Based on the Intel Xscale(R) family of I/O Processors (IOP 32x, 33x, 134x)
31 * ADMA driver written by D.Williams.
32 */
33
34#include <linux/init.h>
35#include <linux/module.h>
36#include <linux/async_tx.h>
37#include <linux/delay.h>
38#include <linux/dma-mapping.h>
39#include <linux/spinlock.h>
40#include <linux/interrupt.h>
41#include <linux/uaccess.h>
42#include <linux/proc_fs.h>
43#include <linux/of.h>
44#include <linux/of_platform.h>
45#include <asm/dcr.h>
46#include <asm/dcr-regs.h>
47#include "adma.h"
48
49enum ppc_adma_init_code {
50 PPC_ADMA_INIT_OK = 0,
51 PPC_ADMA_INIT_MEMRES,
52 PPC_ADMA_INIT_MEMREG,
53 PPC_ADMA_INIT_ALLOC,
54 PPC_ADMA_INIT_COHERENT,
55 PPC_ADMA_INIT_CHANNEL,
56 PPC_ADMA_INIT_IRQ1,
57 PPC_ADMA_INIT_IRQ2,
58 PPC_ADMA_INIT_REGISTER
59};
60
61static char *ppc_adma_errors[] = {
62 [PPC_ADMA_INIT_OK] = "ok",
63 [PPC_ADMA_INIT_MEMRES] = "failed to get memory resource",
64 [PPC_ADMA_INIT_MEMREG] = "failed to request memory region",
65 [PPC_ADMA_INIT_ALLOC] = "failed to allocate memory for adev "
66 "structure",
67 [PPC_ADMA_INIT_COHERENT] = "failed to allocate coherent memory for "
68 "hardware descriptors",
69 [PPC_ADMA_INIT_CHANNEL] = "failed to allocate memory for channel",
70 [PPC_ADMA_INIT_IRQ1] = "failed to request first irq",
71 [PPC_ADMA_INIT_IRQ2] = "failed to request second irq",
72 [PPC_ADMA_INIT_REGISTER] = "failed to register dma async device",
73};
74
75static enum ppc_adma_init_code
76ppc440spe_adma_devices[PPC440SPE_ADMA_ENGINES_NUM];
77
78struct ppc_dma_chan_ref {
79 struct dma_chan *chan;
80 struct list_head node;
81};
82
83/* The list of channels exported by ppc440spe ADMA */
84struct list_head
85ppc440spe_adma_chan_list = LIST_HEAD_INIT(ppc440spe_adma_chan_list);
86
87/* This flag is set when want to refetch the xor chain in the interrupt
88 * handler
89 */
90static u32 do_xor_refetch;
91
92/* Pointer to DMA0, DMA1 CP/CS FIFO */
93static void *ppc440spe_dma_fifo_buf;
94
95/* Pointers to last submitted to DMA0, DMA1 CDBs */
96static struct ppc440spe_adma_desc_slot *chan_last_sub[3];
97static struct ppc440spe_adma_desc_slot *chan_first_cdb[3];
98
99/* Pointer to last linked and submitted xor CB */
100static struct ppc440spe_adma_desc_slot *xor_last_linked;
101static struct ppc440spe_adma_desc_slot *xor_last_submit;
102
103/* This array is used in data-check operations for storing a pattern */
104static char ppc440spe_qword[16];
105
106static atomic_t ppc440spe_adma_err_irq_ref;
107static dcr_host_t ppc440spe_mq_dcr_host;
108static unsigned int ppc440spe_mq_dcr_len;
109
110/* Since RXOR operations use the common register (MQ0_CF2H) for setting-up
111 * the block size in transactions, then we do not allow to activate more than
112 * only one RXOR transactions simultaneously. So use this var to store
113 * the information about is RXOR currently active (PPC440SPE_RXOR_RUN bit is
114 * set) or not (PPC440SPE_RXOR_RUN is clear).
115 */
116static unsigned long ppc440spe_rxor_state;
117
118/* These are used in enable & check routines
119 */
120static u32 ppc440spe_r6_enabled;
121static struct ppc440spe_adma_chan *ppc440spe_r6_tchan;
122static struct completion ppc440spe_r6_test_comp;
123
124static int ppc440spe_adma_dma2rxor_prep_src(
125 struct ppc440spe_adma_desc_slot *desc,
126 struct ppc440spe_rxor *cursor, int index,
127 int src_cnt, u32 addr);
128static void ppc440spe_adma_dma2rxor_set_src(
129 struct ppc440spe_adma_desc_slot *desc,
130 int index, dma_addr_t addr);
131static void ppc440spe_adma_dma2rxor_set_mult(
132 struct ppc440spe_adma_desc_slot *desc,
133 int index, u8 mult);
134
135#ifdef ADMA_LL_DEBUG
136#define ADMA_LL_DBG(x) ({ if (1) x; 0; })
137#else
138#define ADMA_LL_DBG(x) ({ if (0) x; 0; })
139#endif
140
141static void print_cb(struct ppc440spe_adma_chan *chan, void *block)
142{
143 struct dma_cdb *cdb;
144 struct xor_cb *cb;
145 int i;
146
147 switch (chan->device->id) {
148 case 0:
149 case 1:
150 cdb = block;
151
152 pr_debug("CDB at %p [%d]:\n"
153 "\t attr 0x%02x opc 0x%02x cnt 0x%08x\n"
154 "\t sg1u 0x%08x sg1l 0x%08x\n"
155 "\t sg2u 0x%08x sg2l 0x%08x\n"
156 "\t sg3u 0x%08x sg3l 0x%08x\n",
157 cdb, chan->device->id,
158 cdb->attr, cdb->opc, le32_to_cpu(cdb->cnt),
159 le32_to_cpu(cdb->sg1u), le32_to_cpu(cdb->sg1l),
160 le32_to_cpu(cdb->sg2u), le32_to_cpu(cdb->sg2l),
161 le32_to_cpu(cdb->sg3u), le32_to_cpu(cdb->sg3l)
162 );
163 break;
164 case 2:
165 cb = block;
166
167 pr_debug("CB at %p [%d]:\n"
168 "\t cbc 0x%08x cbbc 0x%08x cbs 0x%08x\n"
169 "\t cbtah 0x%08x cbtal 0x%08x\n"
170 "\t cblah 0x%08x cblal 0x%08x\n",
171 cb, chan->device->id,
172 cb->cbc, cb->cbbc, cb->cbs,
173 cb->cbtah, cb->cbtal,
174 cb->cblah, cb->cblal);
175 for (i = 0; i < 16; i++) {
176 if (i && !cb->ops[i].h && !cb->ops[i].l)
177 continue;
178 pr_debug("\t ops[%2d]: h 0x%08x l 0x%08x\n",
179 i, cb->ops[i].h, cb->ops[i].l);
180 }
181 break;
182 }
183}
184
185static void print_cb_list(struct ppc440spe_adma_chan *chan,
186 struct ppc440spe_adma_desc_slot *iter)
187{
188 for (; iter; iter = iter->hw_next)
189 print_cb(chan, iter->hw_desc);
190}
191
192static void prep_dma_xor_dbg(int id, dma_addr_t dst, dma_addr_t *src,
193 unsigned int src_cnt)
194{
195 int i;
196
197 pr_debug("\n%s(%d):\nsrc: ", __func__, id);
198 for (i = 0; i < src_cnt; i++)
199 pr_debug("\t0x%016llx ", src[i]);
200 pr_debug("dst:\n\t0x%016llx\n", dst);
201}
202
203static void prep_dma_pq_dbg(int id, dma_addr_t *dst, dma_addr_t *src,
204 unsigned int src_cnt)
205{
206 int i;
207
208 pr_debug("\n%s(%d):\nsrc: ", __func__, id);
209 for (i = 0; i < src_cnt; i++)
210 pr_debug("\t0x%016llx ", src[i]);
211 pr_debug("dst: ");
212 for (i = 0; i < 2; i++)
213 pr_debug("\t0x%016llx ", dst[i]);
214}
215
216static void prep_dma_pqzero_sum_dbg(int id, dma_addr_t *src,
217 unsigned int src_cnt,
218 const unsigned char *scf)
219{
220 int i;
221
222 pr_debug("\n%s(%d):\nsrc(coef): ", __func__, id);
223 if (scf) {
224 for (i = 0; i < src_cnt; i++)
225 pr_debug("\t0x%016llx(0x%02x) ", src[i], scf[i]);
226 } else {
227 for (i = 0; i < src_cnt; i++)
228 pr_debug("\t0x%016llx(no) ", src[i]);
229 }
230
231 pr_debug("dst: ");
232 for (i = 0; i < 2; i++)
233 pr_debug("\t0x%016llx ", src[src_cnt + i]);
234}
235
236/******************************************************************************
237 * Command (Descriptor) Blocks low-level routines
238 ******************************************************************************/
239/**
240 * ppc440spe_desc_init_interrupt - initialize the descriptor for INTERRUPT
241 * pseudo operation
242 */
243static void ppc440spe_desc_init_interrupt(struct ppc440spe_adma_desc_slot *desc,
244 struct ppc440spe_adma_chan *chan)
245{
246 struct xor_cb *p;
247
248 switch (chan->device->id) {
249 case PPC440SPE_XOR_ID:
250 p = desc->hw_desc;
251 memset(desc->hw_desc, 0, sizeof(struct xor_cb));
252 /* NOP with Command Block Complete Enable */
253 p->cbc = XOR_CBCR_CBCE_BIT;
254 break;
255 case PPC440SPE_DMA0_ID:
256 case PPC440SPE_DMA1_ID:
257 memset(desc->hw_desc, 0, sizeof(struct dma_cdb));
258 /* NOP with interrupt */
259 set_bit(PPC440SPE_DESC_INT, &desc->flags);
260 break;
261 default:
262 printk(KERN_ERR "Unsupported id %d in %s\n", chan->device->id,
263 __func__);
264 break;
265 }
266}
267
268/**
269 * ppc440spe_desc_init_null_xor - initialize the descriptor for NULL XOR
270 * pseudo operation
271 */
272static void ppc440spe_desc_init_null_xor(struct ppc440spe_adma_desc_slot *desc)
273{
274 memset(desc->hw_desc, 0, sizeof(struct xor_cb));
275 desc->hw_next = NULL;
276 desc->src_cnt = 0;
277 desc->dst_cnt = 1;
278}
279
280/**
281 * ppc440spe_desc_init_xor - initialize the descriptor for XOR operation
282 */
283static void ppc440spe_desc_init_xor(struct ppc440spe_adma_desc_slot *desc,
284 int src_cnt, unsigned long flags)
285{
286 struct xor_cb *hw_desc = desc->hw_desc;
287
288 memset(desc->hw_desc, 0, sizeof(struct xor_cb));
289 desc->hw_next = NULL;
290 desc->src_cnt = src_cnt;
291 desc->dst_cnt = 1;
292
293 hw_desc->cbc = XOR_CBCR_TGT_BIT | src_cnt;
294 if (flags & DMA_PREP_INTERRUPT)
295 /* Enable interrupt on completion */
296 hw_desc->cbc |= XOR_CBCR_CBCE_BIT;
297}
298
299/**
300 * ppc440spe_desc_init_dma2pq - initialize the descriptor for PQ
301 * operation in DMA2 controller
302 */
303static void ppc440spe_desc_init_dma2pq(struct ppc440spe_adma_desc_slot *desc,
304 int dst_cnt, int src_cnt, unsigned long flags)
305{
306 struct xor_cb *hw_desc = desc->hw_desc;
307
308 memset(desc->hw_desc, 0, sizeof(struct xor_cb));
309 desc->hw_next = NULL;
310 desc->src_cnt = src_cnt;
311 desc->dst_cnt = dst_cnt;
312 memset(desc->reverse_flags, 0, sizeof(desc->reverse_flags));
313 desc->descs_per_op = 0;
314
315 hw_desc->cbc = XOR_CBCR_TGT_BIT;
316 if (flags & DMA_PREP_INTERRUPT)
317 /* Enable interrupt on completion */
318 hw_desc->cbc |= XOR_CBCR_CBCE_BIT;
319}
320
321#define DMA_CTRL_FLAGS_LAST DMA_PREP_FENCE
322#define DMA_PREP_ZERO_P (DMA_CTRL_FLAGS_LAST << 1)
323#define DMA_PREP_ZERO_Q (DMA_PREP_ZERO_P << 1)
324
325/**
326 * ppc440spe_desc_init_dma01pq - initialize the descriptors for PQ operation
327 * with DMA0/1
328 */
329static void ppc440spe_desc_init_dma01pq(struct ppc440spe_adma_desc_slot *desc,
330 int dst_cnt, int src_cnt, unsigned long flags,
331 unsigned long op)
332{
333 struct dma_cdb *hw_desc;
334 struct ppc440spe_adma_desc_slot *iter;
335 u8 dopc;
336
337 /* Common initialization of a PQ descriptors chain */
338 set_bits(op, &desc->flags);
339 desc->src_cnt = src_cnt;
340 desc->dst_cnt = dst_cnt;
341
342 /* WXOR MULTICAST if both P and Q are being computed
343 * MV_SG1_SG2 if Q only
344 */
345 dopc = (desc->dst_cnt == DMA_DEST_MAX_NUM) ?
346 DMA_CDB_OPC_MULTICAST : DMA_CDB_OPC_MV_SG1_SG2;
347
348 list_for_each_entry(iter, &desc->group_list, chain_node) {
349 hw_desc = iter->hw_desc;
350 memset(iter->hw_desc, 0, sizeof(struct dma_cdb));
351
352 if (likely(!list_is_last(&iter->chain_node,
353 &desc->group_list))) {
354 /* set 'next' pointer */
355 iter->hw_next = list_entry(iter->chain_node.next,
356 struct ppc440spe_adma_desc_slot, chain_node);
357 clear_bit(PPC440SPE_DESC_INT, &iter->flags);
358 } else {
359 /* this is the last descriptor.
360 * this slot will be pasted from ADMA level
361 * each time it wants to configure parameters
362 * of the transaction (src, dst, ...)
363 */
364 iter->hw_next = NULL;
365 if (flags & DMA_PREP_INTERRUPT)
366 set_bit(PPC440SPE_DESC_INT, &iter->flags);
367 else
368 clear_bit(PPC440SPE_DESC_INT, &iter->flags);
369 }
370 }
371
372 /* Set OPS depending on WXOR/RXOR type of operation */
373 if (!test_bit(PPC440SPE_DESC_RXOR, &desc->flags)) {
374 /* This is a WXOR only chain:
375 * - first descriptors are for zeroing destinations
376 * if PPC440SPE_ZERO_P/Q set;
377 * - descriptors remained are for GF-XOR operations.
378 */
379 iter = list_first_entry(&desc->group_list,
380 struct ppc440spe_adma_desc_slot,
381 chain_node);
382
383 if (test_bit(PPC440SPE_ZERO_P, &desc->flags)) {
384 hw_desc = iter->hw_desc;
385 hw_desc->opc = DMA_CDB_OPC_MV_SG1_SG2;
386 iter = list_first_entry(&iter->chain_node,
387 struct ppc440spe_adma_desc_slot,
388 chain_node);
389 }
390
391 if (test_bit(PPC440SPE_ZERO_Q, &desc->flags)) {
392 hw_desc = iter->hw_desc;
393 hw_desc->opc = DMA_CDB_OPC_MV_SG1_SG2;
394 iter = list_first_entry(&iter->chain_node,
395 struct ppc440spe_adma_desc_slot,
396 chain_node);
397 }
398
399 list_for_each_entry_from(iter, &desc->group_list, chain_node) {
400 hw_desc = iter->hw_desc;
401 hw_desc->opc = dopc;
402 }
403 } else {
404 /* This is either RXOR-only or mixed RXOR/WXOR */
405
406 /* The first 1 or 2 slots in chain are always RXOR,
407 * if need to calculate P & Q, then there are two
408 * RXOR slots; if only P or only Q, then there is one
409 */
410 iter = list_first_entry(&desc->group_list,
411 struct ppc440spe_adma_desc_slot,
412 chain_node);
413 hw_desc = iter->hw_desc;
414 hw_desc->opc = DMA_CDB_OPC_MV_SG1_SG2;
415
416 if (desc->dst_cnt == DMA_DEST_MAX_NUM) {
417 iter = list_first_entry(&iter->chain_node,
418 struct ppc440spe_adma_desc_slot,
419 chain_node);
420 hw_desc = iter->hw_desc;
421 hw_desc->opc = DMA_CDB_OPC_MV_SG1_SG2;
422 }
423
424 /* The remaining descs (if any) are WXORs */
425 if (test_bit(PPC440SPE_DESC_WXOR, &desc->flags)) {
426 iter = list_first_entry(&iter->chain_node,
427 struct ppc440spe_adma_desc_slot,
428 chain_node);
429 list_for_each_entry_from(iter, &desc->group_list,
430 chain_node) {
431 hw_desc = iter->hw_desc;
432 hw_desc->opc = dopc;
433 }
434 }
435 }
436}
437
438/**
439 * ppc440spe_desc_init_dma01pqzero_sum - initialize the descriptor
440 * for PQ_ZERO_SUM operation
441 */
442static void ppc440spe_desc_init_dma01pqzero_sum(
443 struct ppc440spe_adma_desc_slot *desc,
444 int dst_cnt, int src_cnt)
445{
446 struct dma_cdb *hw_desc;
447 struct ppc440spe_adma_desc_slot *iter;
448 int i = 0;
449 u8 dopc = (dst_cnt == 2) ? DMA_CDB_OPC_MULTICAST :
450 DMA_CDB_OPC_MV_SG1_SG2;
451 /*
452 * Initialize starting from 2nd or 3rd descriptor dependent
453 * on dst_cnt. First one or two slots are for cloning P
454 * and/or Q to chan->pdest and/or chan->qdest as we have
455 * to preserve original P/Q.
456 */
457 iter = list_first_entry(&desc->group_list,
458 struct ppc440spe_adma_desc_slot, chain_node);
459 iter = list_entry(iter->chain_node.next,
460 struct ppc440spe_adma_desc_slot, chain_node);
461
462 if (dst_cnt > 1) {
463 iter = list_entry(iter->chain_node.next,
464 struct ppc440spe_adma_desc_slot, chain_node);
465 }
466 /* initialize each source descriptor in chain */
467 list_for_each_entry_from(iter, &desc->group_list, chain_node) {
468 hw_desc = iter->hw_desc;
469 memset(iter->hw_desc, 0, sizeof(struct dma_cdb));
470 iter->src_cnt = 0;
471 iter->dst_cnt = 0;
472
473 /* This is a ZERO_SUM operation:
474 * - <src_cnt> descriptors starting from 2nd or 3rd
475 * descriptor are for GF-XOR operations;
476 * - remaining <dst_cnt> descriptors are for checking the result
477 */
478 if (i++ < src_cnt)
479 /* MV_SG1_SG2 if only Q is being verified
480 * MULTICAST if both P and Q are being verified
481 */
482 hw_desc->opc = dopc;
483 else
484 /* DMA_CDB_OPC_DCHECK128 operation */
485 hw_desc->opc = DMA_CDB_OPC_DCHECK128;
486
487 if (likely(!list_is_last(&iter->chain_node,
488 &desc->group_list))) {
489 /* set 'next' pointer */
490 iter->hw_next = list_entry(iter->chain_node.next,
491 struct ppc440spe_adma_desc_slot,
492 chain_node);
493 } else {
494 /* this is the last descriptor.
495 * this slot will be pasted from ADMA level
496 * each time it wants to configure parameters
497 * of the transaction (src, dst, ...)
498 */
499 iter->hw_next = NULL;
500 /* always enable interrupt generation since we get
501 * the status of pqzero from the handler
502 */
503 set_bit(PPC440SPE_DESC_INT, &iter->flags);
504 }
505 }
506 desc->src_cnt = src_cnt;
507 desc->dst_cnt = dst_cnt;
508}
509
510/**
511 * ppc440spe_desc_init_memcpy - initialize the descriptor for MEMCPY operation
512 */
513static void ppc440spe_desc_init_memcpy(struct ppc440spe_adma_desc_slot *desc,
514 unsigned long flags)
515{
516 struct dma_cdb *hw_desc = desc->hw_desc;
517
518 memset(desc->hw_desc, 0, sizeof(struct dma_cdb));
519 desc->hw_next = NULL;
520 desc->src_cnt = 1;
521 desc->dst_cnt = 1;
522
523 if (flags & DMA_PREP_INTERRUPT)
524 set_bit(PPC440SPE_DESC_INT, &desc->flags);
525 else
526 clear_bit(PPC440SPE_DESC_INT, &desc->flags);
527
528 hw_desc->opc = DMA_CDB_OPC_MV_SG1_SG2;
529}
530
531/**
532 * ppc440spe_desc_init_memset - initialize the descriptor for MEMSET operation
533 */
534static void ppc440spe_desc_init_memset(struct ppc440spe_adma_desc_slot *desc,
535 int value, unsigned long flags)
536{
537 struct dma_cdb *hw_desc = desc->hw_desc;
538
539 memset(desc->hw_desc, 0, sizeof(struct dma_cdb));
540 desc->hw_next = NULL;
541 desc->src_cnt = 1;
542 desc->dst_cnt = 1;
543
544 if (flags & DMA_PREP_INTERRUPT)
545 set_bit(PPC440SPE_DESC_INT, &desc->flags);
546 else
547 clear_bit(PPC440SPE_DESC_INT, &desc->flags);
548
549 hw_desc->sg1u = hw_desc->sg1l = cpu_to_le32((u32)value);
550 hw_desc->sg3u = hw_desc->sg3l = cpu_to_le32((u32)value);
551 hw_desc->opc = DMA_CDB_OPC_DFILL128;
552}
553
554/**
555 * ppc440spe_desc_set_src_addr - set source address into the descriptor
556 */
557static void ppc440spe_desc_set_src_addr(struct ppc440spe_adma_desc_slot *desc,
558 struct ppc440spe_adma_chan *chan,
559 int src_idx, dma_addr_t addrh,
560 dma_addr_t addrl)
561{
562 struct dma_cdb *dma_hw_desc;
563 struct xor_cb *xor_hw_desc;
564 phys_addr_t addr64, tmplow, tmphi;
565
566 switch (chan->device->id) {
567 case PPC440SPE_DMA0_ID:
568 case PPC440SPE_DMA1_ID:
569 if (!addrh) {
570 addr64 = addrl;
571 tmphi = (addr64 >> 32);
572 tmplow = (addr64 & 0xFFFFFFFF);
573 } else {
574 tmphi = addrh;
575 tmplow = addrl;
576 }
577 dma_hw_desc = desc->hw_desc;
578 dma_hw_desc->sg1l = cpu_to_le32((u32)tmplow);
579 dma_hw_desc->sg1u |= cpu_to_le32((u32)tmphi);
580 break;
581 case PPC440SPE_XOR_ID:
582 xor_hw_desc = desc->hw_desc;
583 xor_hw_desc->ops[src_idx].l = addrl;
584 xor_hw_desc->ops[src_idx].h |= addrh;
585 break;
586 }
587}
588
589/**
590 * ppc440spe_desc_set_src_mult - set source address mult into the descriptor
591 */
592static void ppc440spe_desc_set_src_mult(struct ppc440spe_adma_desc_slot *desc,
593 struct ppc440spe_adma_chan *chan, u32 mult_index,
594 int sg_index, unsigned char mult_value)
595{
596 struct dma_cdb *dma_hw_desc;
597 struct xor_cb *xor_hw_desc;
598 u32 *psgu;
599
600 switch (chan->device->id) {
601 case PPC440SPE_DMA0_ID:
602 case PPC440SPE_DMA1_ID:
603 dma_hw_desc = desc->hw_desc;
604
605 switch (sg_index) {
606 /* for RXOR operations set multiplier
607 * into source cued address
608 */
609 case DMA_CDB_SG_SRC:
610 psgu = &dma_hw_desc->sg1u;
611 break;
612 /* for WXOR operations set multiplier
613 * into destination cued address(es)
614 */
615 case DMA_CDB_SG_DST1:
616 psgu = &dma_hw_desc->sg2u;
617 break;
618 case DMA_CDB_SG_DST2:
619 psgu = &dma_hw_desc->sg3u;
620 break;
621 default:
622 BUG();
623 }
624
625 *psgu |= cpu_to_le32(mult_value << mult_index);
626 break;
627 case PPC440SPE_XOR_ID:
628 xor_hw_desc = desc->hw_desc;
629 break;
630 default:
631 BUG();
632 }
633}
634
635/**
636 * ppc440spe_desc_set_dest_addr - set destination address into the descriptor
637 */
638static void ppc440spe_desc_set_dest_addr(struct ppc440spe_adma_desc_slot *desc,
639 struct ppc440spe_adma_chan *chan,
640 dma_addr_t addrh, dma_addr_t addrl,
641 u32 dst_idx)
642{
643 struct dma_cdb *dma_hw_desc;
644 struct xor_cb *xor_hw_desc;
645 phys_addr_t addr64, tmphi, tmplow;
646 u32 *psgu, *psgl;
647
648 switch (chan->device->id) {
649 case PPC440SPE_DMA0_ID:
650 case PPC440SPE_DMA1_ID:
651 if (!addrh) {
652 addr64 = addrl;
653 tmphi = (addr64 >> 32);
654 tmplow = (addr64 & 0xFFFFFFFF);
655 } else {
656 tmphi = addrh;
657 tmplow = addrl;
658 }
659 dma_hw_desc = desc->hw_desc;
660
661 psgu = dst_idx ? &dma_hw_desc->sg3u : &dma_hw_desc->sg2u;
662 psgl = dst_idx ? &dma_hw_desc->sg3l : &dma_hw_desc->sg2l;
663
664 *psgl = cpu_to_le32((u32)tmplow);
665 *psgu |= cpu_to_le32((u32)tmphi);
666 break;
667 case PPC440SPE_XOR_ID:
668 xor_hw_desc = desc->hw_desc;
669 xor_hw_desc->cbtal = addrl;
670 xor_hw_desc->cbtah |= addrh;
671 break;
672 }
673}
674
675/**
676 * ppc440spe_desc_set_byte_count - set number of data bytes involved
677 * into the operation
678 */
679static void ppc440spe_desc_set_byte_count(struct ppc440spe_adma_desc_slot *desc,
680 struct ppc440spe_adma_chan *chan,
681 u32 byte_count)
682{
683 struct dma_cdb *dma_hw_desc;
684 struct xor_cb *xor_hw_desc;
685
686 switch (chan->device->id) {
687 case PPC440SPE_DMA0_ID:
688 case PPC440SPE_DMA1_ID:
689 dma_hw_desc = desc->hw_desc;
690 dma_hw_desc->cnt = cpu_to_le32(byte_count);
691 break;
692 case PPC440SPE_XOR_ID:
693 xor_hw_desc = desc->hw_desc;
694 xor_hw_desc->cbbc = byte_count;
695 break;
696 }
697}
698
699/**
700 * ppc440spe_desc_set_rxor_block_size - set RXOR block size
701 */
702static inline void ppc440spe_desc_set_rxor_block_size(u32 byte_count)
703{
704 /* assume that byte_count is aligned on the 512-boundary;
705 * thus write it directly to the register (bits 23:31 are
706 * reserved there).
707 */
708 dcr_write(ppc440spe_mq_dcr_host, DCRN_MQ0_CF2H, byte_count);
709}
710
711/**
712 * ppc440spe_desc_set_dcheck - set CHECK pattern
713 */
714static void ppc440spe_desc_set_dcheck(struct ppc440spe_adma_desc_slot *desc,
715 struct ppc440spe_adma_chan *chan, u8 *qword)
716{
717 struct dma_cdb *dma_hw_desc;
718
719 switch (chan->device->id) {
720 case PPC440SPE_DMA0_ID:
721 case PPC440SPE_DMA1_ID:
722 dma_hw_desc = desc->hw_desc;
723 iowrite32(qword[0], &dma_hw_desc->sg3l);
724 iowrite32(qword[4], &dma_hw_desc->sg3u);
725 iowrite32(qword[8], &dma_hw_desc->sg2l);
726 iowrite32(qword[12], &dma_hw_desc->sg2u);
727 break;
728 default:
729 BUG();
730 }
731}
732
733/**
734 * ppc440spe_xor_set_link - set link address in xor CB
735 */
736static void ppc440spe_xor_set_link(struct ppc440spe_adma_desc_slot *prev_desc,
737 struct ppc440spe_adma_desc_slot *next_desc)
738{
739 struct xor_cb *xor_hw_desc = prev_desc->hw_desc;
740
741 if (unlikely(!next_desc || !(next_desc->phys))) {
742 printk(KERN_ERR "%s: next_desc=0x%p; next_desc->phys=0x%llx\n",
743 __func__, next_desc,
744 next_desc ? next_desc->phys : 0);
745 BUG();
746 }
747
748 xor_hw_desc->cbs = 0;
749 xor_hw_desc->cblal = next_desc->phys;
750 xor_hw_desc->cblah = 0;
751 xor_hw_desc->cbc |= XOR_CBCR_LNK_BIT;
752}
753
754/**
755 * ppc440spe_desc_set_link - set the address of descriptor following this
756 * descriptor in chain
757 */
758static void ppc440spe_desc_set_link(struct ppc440spe_adma_chan *chan,
759 struct ppc440spe_adma_desc_slot *prev_desc,
760 struct ppc440spe_adma_desc_slot *next_desc)
761{
762 unsigned long flags;
763 struct ppc440spe_adma_desc_slot *tail = next_desc;
764
765 if (unlikely(!prev_desc || !next_desc ||
766 (prev_desc->hw_next && prev_desc->hw_next != next_desc))) {
767 /* If previous next is overwritten something is wrong.
768 * though we may refetch from append to initiate list
769 * processing; in this case - it's ok.
770 */
771 printk(KERN_ERR "%s: prev_desc=0x%p; next_desc=0x%p; "
772 "prev->hw_next=0x%p\n", __func__, prev_desc,
773 next_desc, prev_desc ? prev_desc->hw_next : 0);
774 BUG();
775 }
776
777 local_irq_save(flags);
778
779 /* do s/w chaining both for DMA and XOR descriptors */
780 prev_desc->hw_next = next_desc;
781
782 switch (chan->device->id) {
783 case PPC440SPE_DMA0_ID:
784 case PPC440SPE_DMA1_ID:
785 break;
786 case PPC440SPE_XOR_ID:
787 /* bind descriptor to the chain */
788 while (tail->hw_next)
789 tail = tail->hw_next;
790 xor_last_linked = tail;
791
792 if (prev_desc == xor_last_submit)
793 /* do not link to the last submitted CB */
794 break;
795 ppc440spe_xor_set_link(prev_desc, next_desc);
796 break;
797 }
798
799 local_irq_restore(flags);
800}
801
802/**
803 * ppc440spe_desc_get_src_addr - extract the source address from the descriptor
804 */
805static u32 ppc440spe_desc_get_src_addr(struct ppc440spe_adma_desc_slot *desc,
806 struct ppc440spe_adma_chan *chan, int src_idx)
807{
808 struct dma_cdb *dma_hw_desc;
809 struct xor_cb *xor_hw_desc;
810
811 switch (chan->device->id) {
812 case PPC440SPE_DMA0_ID:
813 case PPC440SPE_DMA1_ID:
814 dma_hw_desc = desc->hw_desc;
815 /* May have 0, 1, 2, or 3 sources */
816 switch (dma_hw_desc->opc) {
817 case DMA_CDB_OPC_NO_OP:
818 case DMA_CDB_OPC_DFILL128:
819 return 0;
820 case DMA_CDB_OPC_DCHECK128:
821 if (unlikely(src_idx)) {
822 printk(KERN_ERR "%s: try to get %d source for"
823 " DCHECK128\n", __func__, src_idx);
824 BUG();
825 }
826 return le32_to_cpu(dma_hw_desc->sg1l);
827 case DMA_CDB_OPC_MULTICAST:
828 case DMA_CDB_OPC_MV_SG1_SG2:
829 if (unlikely(src_idx > 2)) {
830 printk(KERN_ERR "%s: try to get %d source from"
831 " DMA descr\n", __func__, src_idx);
832 BUG();
833 }
834 if (src_idx) {
835 if (le32_to_cpu(dma_hw_desc->sg1u) &
836 DMA_CUED_XOR_WIN_MSK) {
837 u8 region;
838
839 if (src_idx == 1)
840 return le32_to_cpu(
841 dma_hw_desc->sg1l) +
842 desc->unmap_len;
843
844 region = (le32_to_cpu(
845 dma_hw_desc->sg1u)) >>
846 DMA_CUED_REGION_OFF;
847
848 region &= DMA_CUED_REGION_MSK;
849 switch (region) {
850 case DMA_RXOR123:
851 return le32_to_cpu(
852 dma_hw_desc->sg1l) +
853 (desc->unmap_len << 1);
854 case DMA_RXOR124:
855 return le32_to_cpu(
856 dma_hw_desc->sg1l) +
857 (desc->unmap_len * 3);
858 case DMA_RXOR125:
859 return le32_to_cpu(
860 dma_hw_desc->sg1l) +
861 (desc->unmap_len << 2);
862 default:
863 printk(KERN_ERR
864 "%s: try to"
865 " get src3 for region %02x"
866 "PPC440SPE_DESC_RXOR12?\n",
867 __func__, region);
868 BUG();
869 }
870 } else {
871 printk(KERN_ERR
872 "%s: try to get %d"
873 " source for non-cued descr\n",
874 __func__, src_idx);
875 BUG();
876 }
877 }
878 return le32_to_cpu(dma_hw_desc->sg1l);
879 default:
880 printk(KERN_ERR "%s: unknown OPC 0x%02x\n",
881 __func__, dma_hw_desc->opc);
882 BUG();
883 }
884 return le32_to_cpu(dma_hw_desc->sg1l);
885 case PPC440SPE_XOR_ID:
886 /* May have up to 16 sources */
887 xor_hw_desc = desc->hw_desc;
888 return xor_hw_desc->ops[src_idx].l;
889 }
890 return 0;
891}
892
893/**
894 * ppc440spe_desc_get_dest_addr - extract the destination address from the
895 * descriptor
896 */
897static u32 ppc440spe_desc_get_dest_addr(struct ppc440spe_adma_desc_slot *desc,
898 struct ppc440spe_adma_chan *chan, int idx)
899{
900 struct dma_cdb *dma_hw_desc;
901 struct xor_cb *xor_hw_desc;
902
903 switch (chan->device->id) {
904 case PPC440SPE_DMA0_ID:
905 case PPC440SPE_DMA1_ID:
906 dma_hw_desc = desc->hw_desc;
907
908 if (likely(!idx))
909 return le32_to_cpu(dma_hw_desc->sg2l);
910 return le32_to_cpu(dma_hw_desc->sg3l);
911 case PPC440SPE_XOR_ID:
912 xor_hw_desc = desc->hw_desc;
913 return xor_hw_desc->cbtal;
914 }
915 return 0;
916}
917
918/**
919 * ppc440spe_desc_get_src_num - extract the number of source addresses from
920 * the descriptor
921 */
922static u32 ppc440spe_desc_get_src_num(struct ppc440spe_adma_desc_slot *desc,
923 struct ppc440spe_adma_chan *chan)
924{
925 struct dma_cdb *dma_hw_desc;
926 struct xor_cb *xor_hw_desc;
927
928 switch (chan->device->id) {
929 case PPC440SPE_DMA0_ID:
930 case PPC440SPE_DMA1_ID:
931 dma_hw_desc = desc->hw_desc;
932
933 switch (dma_hw_desc->opc) {
934 case DMA_CDB_OPC_NO_OP:
935 case DMA_CDB_OPC_DFILL128:
936 return 0;
937 case DMA_CDB_OPC_DCHECK128:
938 return 1;
939 case DMA_CDB_OPC_MV_SG1_SG2:
940 case DMA_CDB_OPC_MULTICAST:
941 /*
942 * Only for RXOR operations we have more than
943 * one source
944 */
945 if (le32_to_cpu(dma_hw_desc->sg1u) &
946 DMA_CUED_XOR_WIN_MSK) {
947 /* RXOR op, there are 2 or 3 sources */
948 if (((le32_to_cpu(dma_hw_desc->sg1u) >>
949 DMA_CUED_REGION_OFF) &
950 DMA_CUED_REGION_MSK) == DMA_RXOR12) {
951 /* RXOR 1-2 */
952 return 2;
953 } else {
954 /* RXOR 1-2-3/1-2-4/1-2-5 */
955 return 3;
956 }
957 }
958 return 1;
959 default:
960 printk(KERN_ERR "%s: unknown OPC 0x%02x\n",
961 __func__, dma_hw_desc->opc);
962 BUG();
963 }
964 case PPC440SPE_XOR_ID:
965 /* up to 16 sources */
966 xor_hw_desc = desc->hw_desc;
967 return xor_hw_desc->cbc & XOR_CDCR_OAC_MSK;
968 default:
969 BUG();
970 }
971 return 0;
972}
973
974/**
975 * ppc440spe_desc_get_dst_num - get the number of destination addresses in
976 * this descriptor
977 */
978static u32 ppc440spe_desc_get_dst_num(struct ppc440spe_adma_desc_slot *desc,
979 struct ppc440spe_adma_chan *chan)
980{
981 struct dma_cdb *dma_hw_desc;
982
983 switch (chan->device->id) {
984 case PPC440SPE_DMA0_ID:
985 case PPC440SPE_DMA1_ID:
986 /* May be 1 or 2 destinations */
987 dma_hw_desc = desc->hw_desc;
988 switch (dma_hw_desc->opc) {
989 case DMA_CDB_OPC_NO_OP:
990 case DMA_CDB_OPC_DCHECK128:
991 return 0;
992 case DMA_CDB_OPC_MV_SG1_SG2:
993 case DMA_CDB_OPC_DFILL128:
994 return 1;
995 case DMA_CDB_OPC_MULTICAST:
996 if (desc->dst_cnt == 2)
997 return 2;
998 else
999 return 1;
1000 default:
1001 printk(KERN_ERR "%s: unknown OPC 0x%02x\n",
1002 __func__, dma_hw_desc->opc);
1003 BUG();
1004 }
1005 case PPC440SPE_XOR_ID:
1006 /* Always only 1 destination */
1007 return 1;
1008 default:
1009 BUG();
1010 }
1011 return 0;
1012}
1013
1014/**
1015 * ppc440spe_desc_get_link - get the address of the descriptor that
1016 * follows this one
1017 */
1018static inline u32 ppc440spe_desc_get_link(struct ppc440spe_adma_desc_slot *desc,
1019 struct ppc440spe_adma_chan *chan)
1020{
1021 if (!desc->hw_next)
1022 return 0;
1023
1024 return desc->hw_next->phys;
1025}
1026
1027/**
1028 * ppc440spe_desc_is_aligned - check alignment
1029 */
1030static inline int ppc440spe_desc_is_aligned(
1031 struct ppc440spe_adma_desc_slot *desc, int num_slots)
1032{
1033 return (desc->idx & (num_slots - 1)) ? 0 : 1;
1034}
1035
1036/**
1037 * ppc440spe_chan_xor_slot_count - get the number of slots necessary for
1038 * XOR operation
1039 */
1040static int ppc440spe_chan_xor_slot_count(size_t len, int src_cnt,
1041 int *slots_per_op)
1042{
1043 int slot_cnt;
1044
1045 /* each XOR descriptor provides up to 16 source operands */
1046 slot_cnt = *slots_per_op = (src_cnt + XOR_MAX_OPS - 1)/XOR_MAX_OPS;
1047
1048 if (likely(len <= PPC440SPE_ADMA_XOR_MAX_BYTE_COUNT))
1049 return slot_cnt;
1050
1051 printk(KERN_ERR "%s: len %d > max %d !!\n",
1052 __func__, len, PPC440SPE_ADMA_XOR_MAX_BYTE_COUNT);
1053 BUG();
1054 return slot_cnt;
1055}
1056
1057/**
1058 * ppc440spe_dma2_pq_slot_count - get the number of slots necessary for
1059 * DMA2 PQ operation
1060 */
1061static int ppc440spe_dma2_pq_slot_count(dma_addr_t *srcs,
1062 int src_cnt, size_t len)
1063{
1064 signed long long order = 0;
1065 int state = 0;
1066 int addr_count = 0;
1067 int i;
1068 for (i = 1; i < src_cnt; i++) {
1069 dma_addr_t cur_addr = srcs[i];
1070 dma_addr_t old_addr = srcs[i-1];
1071 switch (state) {
1072 case 0:
1073 if (cur_addr == old_addr + len) {
1074 /* direct RXOR */
1075 order = 1;
1076 state = 1;
1077 if (i == src_cnt-1)
1078 addr_count++;
1079 } else if (old_addr == cur_addr + len) {
1080 /* reverse RXOR */
1081 order = -1;
1082 state = 1;
1083 if (i == src_cnt-1)
1084 addr_count++;
1085 } else {
1086 state = 3;
1087 }
1088 break;
1089 case 1:
1090 if (i == src_cnt-2 || (order == -1
1091 && cur_addr != old_addr - len)) {
1092 order = 0;
1093 state = 0;
1094 addr_count++;
1095 } else if (cur_addr == old_addr + len*order) {
1096 state = 2;
1097 if (i == src_cnt-1)
1098 addr_count++;
1099 } else if (cur_addr == old_addr + 2*len) {
1100 state = 2;
1101 if (i == src_cnt-1)
1102 addr_count++;
1103 } else if (cur_addr == old_addr + 3*len) {
1104 state = 2;
1105 if (i == src_cnt-1)
1106 addr_count++;
1107 } else {
1108 order = 0;
1109 state = 0;
1110 addr_count++;
1111 }
1112 break;
1113 case 2:
1114 order = 0;
1115 state = 0;
1116 addr_count++;
1117 break;
1118 }
1119 if (state == 3)
1120 break;
1121 }
1122 if (src_cnt <= 1 || (state != 1 && state != 2)) {
1123 pr_err("%s: src_cnt=%d, state=%d, addr_count=%d, order=%lld\n",
1124 __func__, src_cnt, state, addr_count, order);
1125 for (i = 0; i < src_cnt; i++)
1126 pr_err("\t[%d] 0x%llx \n", i, srcs[i]);
1127 BUG();
1128 }
1129
1130 return (addr_count + XOR_MAX_OPS - 1) / XOR_MAX_OPS;
1131}
1132
1133
1134/******************************************************************************
1135 * ADMA channel low-level routines
1136 ******************************************************************************/
1137
1138static u32
1139ppc440spe_chan_get_current_descriptor(struct ppc440spe_adma_chan *chan);
1140static void ppc440spe_chan_append(struct ppc440spe_adma_chan *chan);
1141
1142/**
1143 * ppc440spe_adma_device_clear_eot_status - interrupt ack to XOR or DMA engine
1144 */
1145static void ppc440spe_adma_device_clear_eot_status(
1146 struct ppc440spe_adma_chan *chan)
1147{
1148 struct dma_regs *dma_reg;
1149 struct xor_regs *xor_reg;
1150 u8 *p = chan->device->dma_desc_pool_virt;
1151 struct dma_cdb *cdb;
1152 u32 rv, i;
1153
1154 switch (chan->device->id) {
1155 case PPC440SPE_DMA0_ID:
1156 case PPC440SPE_DMA1_ID:
1157 /* read FIFO to ack */
1158 dma_reg = chan->device->dma_reg;
1159 while ((rv = ioread32(&dma_reg->csfpl))) {
1160 i = rv & DMA_CDB_ADDR_MSK;
1161 cdb = (struct dma_cdb *)&p[i -
1162 (u32)chan->device->dma_desc_pool];
1163
1164 /* Clear opcode to ack. This is necessary for
1165 * ZeroSum operations only
1166 */
1167 cdb->opc = 0;
1168
1169 if (test_bit(PPC440SPE_RXOR_RUN,
1170 &ppc440spe_rxor_state)) {
1171 /* probably this is a completed RXOR op,
1172 * get pointer to CDB using the fact that
1173 * physical and virtual addresses of CDB
1174 * in pools have the same offsets
1175 */
1176 if (le32_to_cpu(cdb->sg1u) &
1177 DMA_CUED_XOR_BASE) {
1178 /* this is a RXOR */
1179 clear_bit(PPC440SPE_RXOR_RUN,
1180 &ppc440spe_rxor_state);
1181 }
1182 }
1183
1184 if (rv & DMA_CDB_STATUS_MSK) {
1185 /* ZeroSum check failed
1186 */
1187 struct ppc440spe_adma_desc_slot *iter;
1188 dma_addr_t phys = rv & ~DMA_CDB_MSK;
1189
1190 /*
1191 * Update the status of corresponding
1192 * descriptor.
1193 */
1194 list_for_each_entry(iter, &chan->chain,
1195 chain_node) {
1196 if (iter->phys == phys)
1197 break;
1198 }
1199 /*
1200 * if cannot find the corresponding
1201 * slot it's a bug
1202 */
1203 BUG_ON(&iter->chain_node == &chan->chain);
1204
1205 if (iter->xor_check_result) {
1206 if (test_bit(PPC440SPE_DESC_PCHECK,
1207 &iter->flags)) {
1208 *iter->xor_check_result |=
1209 SUM_CHECK_P_RESULT;
1210 } else
1211 if (test_bit(PPC440SPE_DESC_QCHECK,
1212 &iter->flags)) {
1213 *iter->xor_check_result |=
1214 SUM_CHECK_Q_RESULT;
1215 } else
1216 BUG();
1217 }
1218 }
1219 }
1220
1221 rv = ioread32(&dma_reg->dsts);
1222 if (rv) {
1223 pr_err("DMA%d err status: 0x%x\n",
1224 chan->device->id, rv);
1225 /* write back to clear */
1226 iowrite32(rv, &dma_reg->dsts);
1227 }
1228 break;
1229 case PPC440SPE_XOR_ID:
1230 /* reset status bits to ack */
1231 xor_reg = chan->device->xor_reg;
1232 rv = ioread32be(&xor_reg->sr);
1233 iowrite32be(rv, &xor_reg->sr);
1234
1235 if (rv & (XOR_IE_ICBIE_BIT|XOR_IE_ICIE_BIT|XOR_IE_RPTIE_BIT)) {
1236 if (rv & XOR_IE_RPTIE_BIT) {
1237 /* Read PLB Timeout Error.
1238 * Try to resubmit the CB
1239 */
1240 u32 val = ioread32be(&xor_reg->ccbalr);
1241
1242 iowrite32be(val, &xor_reg->cblalr);
1243
1244 val = ioread32be(&xor_reg->crsr);
1245 iowrite32be(val | XOR_CRSR_XAE_BIT,
1246 &xor_reg->crsr);
1247 } else
1248 pr_err("XOR ERR 0x%x status\n", rv);
1249 break;
1250 }
1251
1252 /* if the XORcore is idle, but there are unprocessed CBs
1253 * then refetch the s/w chain here
1254 */
1255 if (!(ioread32be(&xor_reg->sr) & XOR_SR_XCP_BIT) &&
1256 do_xor_refetch)
1257 ppc440spe_chan_append(chan);
1258 break;
1259 }
1260}
1261
1262/**
1263 * ppc440spe_chan_is_busy - get the channel status
1264 */
1265static int ppc440spe_chan_is_busy(struct ppc440spe_adma_chan *chan)
1266{
1267 struct dma_regs *dma_reg;
1268 struct xor_regs *xor_reg;
1269 int busy = 0;
1270
1271 switch (chan->device->id) {
1272 case PPC440SPE_DMA0_ID:
1273 case PPC440SPE_DMA1_ID:
1274 dma_reg = chan->device->dma_reg;
1275 /* if command FIFO's head and tail pointers are equal and
1276 * status tail is the same as command, then channel is free
1277 */
1278 if (ioread16(&dma_reg->cpfhp) != ioread16(&dma_reg->cpftp) ||
1279 ioread16(&dma_reg->cpftp) != ioread16(&dma_reg->csftp))
1280 busy = 1;
1281 break;
1282 case PPC440SPE_XOR_ID:
1283 /* use the special status bit for the XORcore
1284 */
1285 xor_reg = chan->device->xor_reg;
1286 busy = (ioread32be(&xor_reg->sr) & XOR_SR_XCP_BIT) ? 1 : 0;
1287 break;
1288 }
1289
1290 return busy;
1291}
1292
1293/**
1294 * ppc440spe_chan_set_first_xor_descriptor - init XORcore chain
1295 */
1296static void ppc440spe_chan_set_first_xor_descriptor(
1297 struct ppc440spe_adma_chan *chan,
1298 struct ppc440spe_adma_desc_slot *next_desc)
1299{
1300 struct xor_regs *xor_reg = chan->device->xor_reg;
1301
1302 if (ioread32be(&xor_reg->sr) & XOR_SR_XCP_BIT)
1303 printk(KERN_INFO "%s: Warn: XORcore is running "
1304 "when try to set the first CDB!\n",
1305 __func__);
1306
1307 xor_last_submit = xor_last_linked = next_desc;
1308
1309 iowrite32be(XOR_CRSR_64BA_BIT, &xor_reg->crsr);
1310
1311 iowrite32be(next_desc->phys, &xor_reg->cblalr);
1312 iowrite32be(0, &xor_reg->cblahr);
1313 iowrite32be(ioread32be(&xor_reg->cbcr) | XOR_CBCR_LNK_BIT,
1314 &xor_reg->cbcr);
1315
1316 chan->hw_chain_inited = 1;
1317}
1318
1319/**
1320 * ppc440spe_dma_put_desc - put DMA0,1 descriptor to FIFO.
1321 * called with irqs disabled
1322 */
1323static void ppc440spe_dma_put_desc(struct ppc440spe_adma_chan *chan,
1324 struct ppc440spe_adma_desc_slot *desc)
1325{
1326 u32 pcdb;
1327 struct dma_regs *dma_reg = chan->device->dma_reg;
1328
1329 pcdb = desc->phys;
1330 if (!test_bit(PPC440SPE_DESC_INT, &desc->flags))
1331 pcdb |= DMA_CDB_NO_INT;
1332
1333 chan_last_sub[chan->device->id] = desc;
1334
1335 ADMA_LL_DBG(print_cb(chan, desc->hw_desc));
1336
1337 iowrite32(pcdb, &dma_reg->cpfpl);
1338}
1339
1340/**
1341 * ppc440spe_chan_append - update the h/w chain in the channel
1342 */
1343static void ppc440spe_chan_append(struct ppc440spe_adma_chan *chan)
1344{
1345 struct xor_regs *xor_reg;
1346 struct ppc440spe_adma_desc_slot *iter;
1347 struct xor_cb *xcb;
1348 u32 cur_desc;
1349 unsigned long flags;
1350
1351 local_irq_save(flags);
1352
1353 switch (chan->device->id) {
1354 case PPC440SPE_DMA0_ID:
1355 case PPC440SPE_DMA1_ID:
1356 cur_desc = ppc440spe_chan_get_current_descriptor(chan);
1357
1358 if (likely(cur_desc)) {
1359 iter = chan_last_sub[chan->device->id];
1360 BUG_ON(!iter);
1361 } else {
1362 /* first peer */
1363 iter = chan_first_cdb[chan->device->id];
1364 BUG_ON(!iter);
1365 ppc440spe_dma_put_desc(chan, iter);
1366 chan->hw_chain_inited = 1;
1367 }
1368
1369 /* is there something new to append */
1370 if (!iter->hw_next)
1371 break;
1372
1373 /* flush descriptors from the s/w queue to fifo */
1374 list_for_each_entry_continue(iter, &chan->chain, chain_node) {
1375 ppc440spe_dma_put_desc(chan, iter);
1376 if (!iter->hw_next)
1377 break;
1378 }
1379 break;
1380 case PPC440SPE_XOR_ID:
1381 /* update h/w links and refetch */
1382 if (!xor_last_submit->hw_next)
1383 break;
1384
1385 xor_reg = chan->device->xor_reg;
1386 /* the last linked CDB has to generate an interrupt
1387 * that we'd be able to append the next lists to h/w
1388 * regardless of the XOR engine state at the moment of
1389 * appending of these next lists
1390 */
1391 xcb = xor_last_linked->hw_desc;
1392 xcb->cbc |= XOR_CBCR_CBCE_BIT;
1393
1394 if (!(ioread32be(&xor_reg->sr) & XOR_SR_XCP_BIT)) {
1395 /* XORcore is idle. Refetch now */
1396 do_xor_refetch = 0;
1397 ppc440spe_xor_set_link(xor_last_submit,
1398 xor_last_submit->hw_next);
1399
1400 ADMA_LL_DBG(print_cb_list(chan,
1401 xor_last_submit->hw_next));
1402
1403 xor_last_submit = xor_last_linked;
1404 iowrite32be(ioread32be(&xor_reg->crsr) |
1405 XOR_CRSR_RCBE_BIT | XOR_CRSR_64BA_BIT,
1406 &xor_reg->crsr);
1407 } else {
1408 /* XORcore is running. Refetch later in the handler */
1409 do_xor_refetch = 1;
1410 }
1411
1412 break;
1413 }
1414
1415 local_irq_restore(flags);
1416}
1417
1418/**
1419 * ppc440spe_chan_get_current_descriptor - get the currently executed descriptor
1420 */
1421static u32
1422ppc440spe_chan_get_current_descriptor(struct ppc440spe_adma_chan *chan)
1423{
1424 struct dma_regs *dma_reg;
1425 struct xor_regs *xor_reg;
1426
1427 if (unlikely(!chan->hw_chain_inited))
1428 /* h/w descriptor chain is not initialized yet */
1429 return 0;
1430
1431 switch (chan->device->id) {
1432 case PPC440SPE_DMA0_ID:
1433 case PPC440SPE_DMA1_ID:
1434 dma_reg = chan->device->dma_reg;
1435 return ioread32(&dma_reg->acpl) & (~DMA_CDB_MSK);
1436 case PPC440SPE_XOR_ID:
1437 xor_reg = chan->device->xor_reg;
1438 return ioread32be(&xor_reg->ccbalr);
1439 }
1440 return 0;
1441}
1442
1443/**
1444 * ppc440spe_chan_run - enable the channel
1445 */
1446static void ppc440spe_chan_run(struct ppc440spe_adma_chan *chan)
1447{
1448 struct xor_regs *xor_reg;
1449
1450 switch (chan->device->id) {
1451 case PPC440SPE_DMA0_ID:
1452 case PPC440SPE_DMA1_ID:
1453 /* DMAs are always enabled, do nothing */
1454 break;
1455 case PPC440SPE_XOR_ID:
1456 /* drain write buffer */
1457 xor_reg = chan->device->xor_reg;
1458
1459 /* fetch descriptor pointed to in <link> */
1460 iowrite32be(XOR_CRSR_64BA_BIT | XOR_CRSR_XAE_BIT,
1461 &xor_reg->crsr);
1462 break;
1463 }
1464}
1465
1466/******************************************************************************
1467 * ADMA device level
1468 ******************************************************************************/
1469
1470static void ppc440spe_chan_start_null_xor(struct ppc440spe_adma_chan *chan);
1471static int ppc440spe_adma_alloc_chan_resources(struct dma_chan *chan);
1472
1473static dma_cookie_t
1474ppc440spe_adma_tx_submit(struct dma_async_tx_descriptor *tx);
1475
1476static void ppc440spe_adma_set_dest(struct ppc440spe_adma_desc_slot *tx,
1477 dma_addr_t addr, int index);
1478static void
1479ppc440spe_adma_memcpy_xor_set_src(struct ppc440spe_adma_desc_slot *tx,
1480 dma_addr_t addr, int index);
1481
1482static void
1483ppc440spe_adma_pq_set_dest(struct ppc440spe_adma_desc_slot *tx,
1484 dma_addr_t *paddr, unsigned long flags);
1485static void
1486ppc440spe_adma_pq_set_src(struct ppc440spe_adma_desc_slot *tx,
1487 dma_addr_t addr, int index);
1488static void
1489ppc440spe_adma_pq_set_src_mult(struct ppc440spe_adma_desc_slot *tx,
1490 unsigned char mult, int index, int dst_pos);
1491static void
1492ppc440spe_adma_pqzero_sum_set_dest(struct ppc440spe_adma_desc_slot *tx,
1493 dma_addr_t paddr, dma_addr_t qaddr);
1494
1495static struct page *ppc440spe_rxor_srcs[32];
1496
1497/**
1498 * ppc440spe_can_rxor - check if the operands may be processed with RXOR
1499 */
1500static int ppc440spe_can_rxor(struct page **srcs, int src_cnt, size_t len)
1501{
1502 int i, order = 0, state = 0;
1503 int idx = 0;
1504
1505 if (unlikely(!(src_cnt > 1)))
1506 return 0;
1507
1508 BUG_ON(src_cnt > ARRAY_SIZE(ppc440spe_rxor_srcs));
1509
1510 /* Skip holes in the source list before checking */
1511 for (i = 0; i < src_cnt; i++) {
1512 if (!srcs[i])
1513 continue;
1514 ppc440spe_rxor_srcs[idx++] = srcs[i];
1515 }
1516 src_cnt = idx;
1517
1518 for (i = 1; i < src_cnt; i++) {
1519 char *cur_addr = page_address(ppc440spe_rxor_srcs[i]);
1520 char *old_addr = page_address(ppc440spe_rxor_srcs[i - 1]);
1521
1522 switch (state) {
1523 case 0:
1524 if (cur_addr == old_addr + len) {
1525 /* direct RXOR */
1526 order = 1;
1527 state = 1;
1528 } else if (old_addr == cur_addr + len) {
1529 /* reverse RXOR */
1530 order = -1;
1531 state = 1;
1532 } else
1533 goto out;
1534 break;
1535 case 1:
1536 if ((i == src_cnt - 2) ||
1537 (order == -1 && cur_addr != old_addr - len)) {
1538 order = 0;
1539 state = 0;
1540 } else if ((cur_addr == old_addr + len * order) ||
1541 (cur_addr == old_addr + 2 * len) ||
1542 (cur_addr == old_addr + 3 * len)) {
1543 state = 2;
1544 } else {
1545 order = 0;
1546 state = 0;
1547 }
1548 break;
1549 case 2:
1550 order = 0;
1551 state = 0;
1552 break;
1553 }
1554 }
1555
1556out:
1557 if (state == 1 || state == 2)
1558 return 1;
1559
1560 return 0;
1561}
1562
1563/**
1564 * ppc440spe_adma_device_estimate - estimate the efficiency of processing
1565 * the operation given on this channel. It's assumed that 'chan' is
1566 * capable to process 'cap' type of operation.
1567 * @chan: channel to use
1568 * @cap: type of transaction
1569 * @dst_lst: array of destination pointers
1570 * @dst_cnt: number of destination operands
1571 * @src_lst: array of source pointers
1572 * @src_cnt: number of source operands
1573 * @src_sz: size of each source operand
1574 */
1575static int ppc440spe_adma_estimate(struct dma_chan *chan,
1576 enum dma_transaction_type cap, struct page **dst_lst, int dst_cnt,
1577 struct page **src_lst, int src_cnt, size_t src_sz)
1578{
1579 int ef = 1;
1580
1581 if (cap == DMA_PQ || cap == DMA_PQ_VAL) {
1582 /* If RAID-6 capabilities were not activated don't try
1583 * to use them
1584 */
1585 if (unlikely(!ppc440spe_r6_enabled))
1586 return -1;
1587 }
1588 /* In the current implementation of ppc440spe ADMA driver it
1589 * makes sense to pick out only pq case, because it may be
1590 * processed:
1591 * (1) either using Biskup method on DMA2;
1592 * (2) or on DMA0/1.
1593 * Thus we give a favour to (1) if the sources are suitable;
1594 * else let it be processed on one of the DMA0/1 engines.
1595 * In the sum_product case where destination is also the
1596 * source process it on DMA0/1 only.
1597 */
1598 if (cap == DMA_PQ && chan->chan_id == PPC440SPE_XOR_ID) {
1599
1600 if (dst_cnt == 1 && src_cnt == 2 && dst_lst[0] == src_lst[1])
1601 ef = 0; /* sum_product case, process on DMA0/1 */
1602 else if (ppc440spe_can_rxor(src_lst, src_cnt, src_sz))
1603 ef = 3; /* override (DMA0/1 + idle) */
1604 else
1605 ef = 0; /* can't process on DMA2 if !rxor */
1606 }
1607
1608 /* channel idleness increases the priority */
1609 if (likely(ef) &&
1610 !ppc440spe_chan_is_busy(to_ppc440spe_adma_chan(chan)))
1611 ef++;
1612
1613 return ef;
1614}
1615
1616struct dma_chan *
1617ppc440spe_async_tx_find_best_channel(enum dma_transaction_type cap,
1618 struct page **dst_lst, int dst_cnt, struct page **src_lst,
1619 int src_cnt, size_t src_sz)
1620{
1621 struct dma_chan *best_chan = NULL;
1622 struct ppc_dma_chan_ref *ref;
1623 int best_rank = -1;
1624
1625 if (unlikely(!src_sz))
1626 return NULL;
1627 if (src_sz > PAGE_SIZE) {
1628 /*
1629 * should a user of the api ever pass > PAGE_SIZE requests
1630 * we sort out cases where temporary page-sized buffers
1631 * are used.
1632 */
1633 switch (cap) {
1634 case DMA_PQ:
1635 if (src_cnt == 1 && dst_lst[1] == src_lst[0])
1636 return NULL;
1637 if (src_cnt == 2 && dst_lst[1] == src_lst[1])
1638 return NULL;
1639 break;
1640 case DMA_PQ_VAL:
1641 case DMA_XOR_VAL:
1642 return NULL;
1643 default:
1644 break;
1645 }
1646 }
1647
1648 list_for_each_entry(ref, &ppc440spe_adma_chan_list, node) {
1649 if (dma_has_cap(cap, ref->chan->device->cap_mask)) {
1650 int rank;
1651
1652 rank = ppc440spe_adma_estimate(ref->chan, cap, dst_lst,
1653 dst_cnt, src_lst, src_cnt, src_sz);
1654 if (rank > best_rank) {
1655 best_rank = rank;
1656 best_chan = ref->chan;
1657 }
1658 }
1659 }
1660
1661 return best_chan;
1662}
1663EXPORT_SYMBOL_GPL(ppc440spe_async_tx_find_best_channel);
1664
1665/**
1666 * ppc440spe_get_group_entry - get group entry with index idx
1667 * @tdesc: is the last allocated slot in the group.
1668 */
1669static struct ppc440spe_adma_desc_slot *
1670ppc440spe_get_group_entry(struct ppc440spe_adma_desc_slot *tdesc, u32 entry_idx)
1671{
1672 struct ppc440spe_adma_desc_slot *iter = tdesc->group_head;
1673 int i = 0;
1674
1675 if (entry_idx < 0 || entry_idx >= (tdesc->src_cnt + tdesc->dst_cnt)) {
1676 printk("%s: entry_idx %d, src_cnt %d, dst_cnt %d\n",
1677 __func__, entry_idx, tdesc->src_cnt, tdesc->dst_cnt);
1678 BUG();
1679 }
1680
1681 list_for_each_entry(iter, &tdesc->group_list, chain_node) {
1682 if (i++ == entry_idx)
1683 break;
1684 }
1685 return iter;
1686}
1687
1688/**
1689 * ppc440spe_adma_free_slots - flags descriptor slots for reuse
1690 * @slot: Slot to free
1691 * Caller must hold &ppc440spe_chan->lock while calling this function
1692 */
1693static void ppc440spe_adma_free_slots(struct ppc440spe_adma_desc_slot *slot,
1694 struct ppc440spe_adma_chan *chan)
1695{
1696 int stride = slot->slots_per_op;
1697
1698 while (stride--) {
1699 slot->slots_per_op = 0;
1700 slot = list_entry(slot->slot_node.next,
1701 struct ppc440spe_adma_desc_slot,
1702 slot_node);
1703 }
1704}
1705
1706static void ppc440spe_adma_unmap(struct ppc440spe_adma_chan *chan,
1707 struct ppc440spe_adma_desc_slot *desc)
1708{
1709 u32 src_cnt, dst_cnt;
1710 dma_addr_t addr;
1711
1712 /*
1713 * get the number of sources & destination
1714 * included in this descriptor and unmap
1715 * them all
1716 */
1717 src_cnt = ppc440spe_desc_get_src_num(desc, chan);
1718 dst_cnt = ppc440spe_desc_get_dst_num(desc, chan);
1719
1720 /* unmap destinations */
1721 if (!(desc->async_tx.flags & DMA_COMPL_SKIP_DEST_UNMAP)) {
1722 while (dst_cnt--) {
1723 addr = ppc440spe_desc_get_dest_addr(
1724 desc, chan, dst_cnt);
1725 dma_unmap_page(chan->device->dev,
1726 addr, desc->unmap_len,
1727 DMA_FROM_DEVICE);
1728 }
1729 }
1730
1731 /* unmap sources */
1732 if (!(desc->async_tx.flags & DMA_COMPL_SKIP_SRC_UNMAP)) {
1733 while (src_cnt--) {
1734 addr = ppc440spe_desc_get_src_addr(
1735 desc, chan, src_cnt);
1736 dma_unmap_page(chan->device->dev,
1737 addr, desc->unmap_len,
1738 DMA_TO_DEVICE);
1739 }
1740 }
1741}
1742
1743/**
1744 * ppc440spe_adma_run_tx_complete_actions - call functions to be called
1745 * upon completion
1746 */
1747static dma_cookie_t ppc440spe_adma_run_tx_complete_actions(
1748 struct ppc440spe_adma_desc_slot *desc,
1749 struct ppc440spe_adma_chan *chan,
1750 dma_cookie_t cookie)
1751{
1752 int i;
1753
1754 BUG_ON(desc->async_tx.cookie < 0);
1755 if (desc->async_tx.cookie > 0) {
1756 cookie = desc->async_tx.cookie;
1757 desc->async_tx.cookie = 0;
1758
1759 /* call the callback (must not sleep or submit new
1760 * operations to this channel)
1761 */
1762 if (desc->async_tx.callback)
1763 desc->async_tx.callback(
1764 desc->async_tx.callback_param);
1765
1766 /* unmap dma addresses
1767 * (unmap_single vs unmap_page?)
1768 *
1769 * actually, ppc's dma_unmap_page() functions are empty, so
1770 * the following code is just for the sake of completeness
1771 */
1772 if (chan && chan->needs_unmap && desc->group_head &&
1773 desc->unmap_len) {
1774 struct ppc440spe_adma_desc_slot *unmap =
1775 desc->group_head;
1776 /* assume 1 slot per op always */
1777 u32 slot_count = unmap->slot_cnt;
1778
1779 /* Run through the group list and unmap addresses */
1780 for (i = 0; i < slot_count; i++) {
1781 BUG_ON(!unmap);
1782 ppc440spe_adma_unmap(chan, unmap);
1783 unmap = unmap->hw_next;
1784 }
1785 }
1786 }
1787
1788 /* run dependent operations */
1789 dma_run_dependencies(&desc->async_tx);
1790
1791 return cookie;
1792}
1793
1794/**
1795 * ppc440spe_adma_clean_slot - clean up CDB slot (if ack is set)
1796 */
1797static int ppc440spe_adma_clean_slot(struct ppc440spe_adma_desc_slot *desc,
1798 struct ppc440spe_adma_chan *chan)
1799{
1800 /* the client is allowed to attach dependent operations
1801 * until 'ack' is set
1802 */
1803 if (!async_tx_test_ack(&desc->async_tx))
1804 return 0;
1805
1806 /* leave the last descriptor in the chain
1807 * so we can append to it
1808 */
1809 if (list_is_last(&desc->chain_node, &chan->chain) ||
1810 desc->phys == ppc440spe_chan_get_current_descriptor(chan))
1811 return 1;
1812
1813 if (chan->device->id != PPC440SPE_XOR_ID) {
1814 /* our DMA interrupt handler clears opc field of
1815 * each processed descriptor. For all types of
1816 * operations except for ZeroSum we do not actually
1817 * need ack from the interrupt handler. ZeroSum is a
1818 * special case since the result of this operation
1819 * is available from the handler only, so if we see
1820 * such type of descriptor (which is unprocessed yet)
1821 * then leave it in chain.
1822 */
1823 struct dma_cdb *cdb = desc->hw_desc;
1824 if (cdb->opc == DMA_CDB_OPC_DCHECK128)
1825 return 1;
1826 }
1827
1828 dev_dbg(chan->device->common.dev, "\tfree slot %llx: %d stride: %d\n",
1829 desc->phys, desc->idx, desc->slots_per_op);
1830
1831 list_del(&desc->chain_node);
1832 ppc440spe_adma_free_slots(desc, chan);
1833 return 0;
1834}
1835
1836/**
1837 * __ppc440spe_adma_slot_cleanup - this is the common clean-up routine
1838 * which runs through the channel CDBs list until reach the descriptor
1839 * currently processed. When routine determines that all CDBs of group
1840 * are completed then corresponding callbacks (if any) are called and slots
1841 * are freed.
1842 */
1843static void __ppc440spe_adma_slot_cleanup(struct ppc440spe_adma_chan *chan)
1844{
1845 struct ppc440spe_adma_desc_slot *iter, *_iter, *group_start = NULL;
1846 dma_cookie_t cookie = 0;
1847 u32 current_desc = ppc440spe_chan_get_current_descriptor(chan);
1848 int busy = ppc440spe_chan_is_busy(chan);
1849 int seen_current = 0, slot_cnt = 0, slots_per_op = 0;
1850
1851 dev_dbg(chan->device->common.dev, "ppc440spe adma%d: %s\n",
1852 chan->device->id, __func__);
1853
1854 if (!current_desc) {
1855 /* There were no transactions yet, so
1856 * nothing to clean
1857 */
1858 return;
1859 }
1860
1861 /* free completed slots from the chain starting with
1862 * the oldest descriptor
1863 */
1864 list_for_each_entry_safe(iter, _iter, &chan->chain,
1865 chain_node) {
1866 dev_dbg(chan->device->common.dev, "\tcookie: %d slot: %d "
1867 "busy: %d this_desc: %#llx next_desc: %#x "
1868 "cur: %#x ack: %d\n",
1869 iter->async_tx.cookie, iter->idx, busy, iter->phys,
1870 ppc440spe_desc_get_link(iter, chan), current_desc,
1871 async_tx_test_ack(&iter->async_tx));
1872 prefetch(_iter);
1873 prefetch(&_iter->async_tx);
1874
1875 /* do not advance past the current descriptor loaded into the
1876 * hardware channel,subsequent descriptors are either in process
1877 * or have not been submitted
1878 */
1879 if (seen_current)
1880 break;
1881
1882 /* stop the search if we reach the current descriptor and the
1883 * channel is busy, or if it appears that the current descriptor
1884 * needs to be re-read (i.e. has been appended to)
1885 */
1886 if (iter->phys == current_desc) {
1887 BUG_ON(seen_current++);
1888 if (busy || ppc440spe_desc_get_link(iter, chan)) {
1889 /* not all descriptors of the group have
1890 * been completed; exit.
1891 */
1892 break;
1893 }
1894 }
1895
1896 /* detect the start of a group transaction */
1897 if (!slot_cnt && !slots_per_op) {
1898 slot_cnt = iter->slot_cnt;
1899 slots_per_op = iter->slots_per_op;
1900 if (slot_cnt <= slots_per_op) {
1901 slot_cnt = 0;
1902 slots_per_op = 0;
1903 }
1904 }
1905
1906 if (slot_cnt) {
1907 if (!group_start)
1908 group_start = iter;
1909 slot_cnt -= slots_per_op;
1910 }
1911
1912 /* all the members of a group are complete */
1913 if (slots_per_op != 0 && slot_cnt == 0) {
1914 struct ppc440spe_adma_desc_slot *grp_iter, *_grp_iter;
1915 int end_of_chain = 0;
1916
1917 /* clean up the group */
1918 slot_cnt = group_start->slot_cnt;
1919 grp_iter = group_start;
1920 list_for_each_entry_safe_from(grp_iter, _grp_iter,
1921 &chan->chain, chain_node) {
1922
1923 cookie = ppc440spe_adma_run_tx_complete_actions(
1924 grp_iter, chan, cookie);
1925
1926 slot_cnt -= slots_per_op;
1927 end_of_chain = ppc440spe_adma_clean_slot(
1928 grp_iter, chan);
1929 if (end_of_chain && slot_cnt) {
1930 /* Should wait for ZeroSum completion */
1931 if (cookie > 0)
1932 chan->completed_cookie = cookie;
1933 return;
1934 }
1935
1936 if (slot_cnt == 0 || end_of_chain)
1937 break;
1938 }
1939
1940 /* the group should be complete at this point */
1941 BUG_ON(slot_cnt);
1942
1943 slots_per_op = 0;
1944 group_start = NULL;
1945 if (end_of_chain)
1946 break;
1947 else
1948 continue;
1949 } else if (slots_per_op) /* wait for group completion */
1950 continue;
1951
1952 cookie = ppc440spe_adma_run_tx_complete_actions(iter, chan,
1953 cookie);
1954
1955 if (ppc440spe_adma_clean_slot(iter, chan))
1956 break;
1957 }
1958
1959 BUG_ON(!seen_current);
1960
1961 if (cookie > 0) {
1962 chan->completed_cookie = cookie;
1963 pr_debug("\tcompleted cookie %d\n", cookie);
1964 }
1965
1966}
1967
1968/**
1969 * ppc440spe_adma_tasklet - clean up watch-dog initiator
1970 */
1971static void ppc440spe_adma_tasklet(unsigned long data)
1972{
1973 struct ppc440spe_adma_chan *chan = (struct ppc440spe_adma_chan *) data;
1974
1975 spin_lock_nested(&chan->lock, SINGLE_DEPTH_NESTING);
1976 __ppc440spe_adma_slot_cleanup(chan);
1977 spin_unlock(&chan->lock);
1978}
1979
1980/**
1981 * ppc440spe_adma_slot_cleanup - clean up scheduled initiator
1982 */
1983static void ppc440spe_adma_slot_cleanup(struct ppc440spe_adma_chan *chan)
1984{
1985 spin_lock_bh(&chan->lock);
1986 __ppc440spe_adma_slot_cleanup(chan);
1987 spin_unlock_bh(&chan->lock);
1988}
1989
1990/**
1991 * ppc440spe_adma_alloc_slots - allocate free slots (if any)
1992 */
1993static struct ppc440spe_adma_desc_slot *ppc440spe_adma_alloc_slots(
1994 struct ppc440spe_adma_chan *chan, int num_slots,
1995 int slots_per_op)
1996{
1997 struct ppc440spe_adma_desc_slot *iter = NULL, *_iter;
1998 struct ppc440spe_adma_desc_slot *alloc_start = NULL;
1999 struct list_head chain = LIST_HEAD_INIT(chain);
2000 int slots_found, retry = 0;
2001
2002
2003 BUG_ON(!num_slots || !slots_per_op);
2004 /* start search from the last allocated descrtiptor
2005 * if a contiguous allocation can not be found start searching
2006 * from the beginning of the list
2007 */
2008retry:
2009 slots_found = 0;
2010 if (retry == 0)
2011 iter = chan->last_used;
2012 else
2013 iter = list_entry(&chan->all_slots,
2014 struct ppc440spe_adma_desc_slot,
2015 slot_node);
2016 list_for_each_entry_safe_continue(iter, _iter, &chan->all_slots,
2017 slot_node) {
2018 prefetch(_iter);
2019 prefetch(&_iter->async_tx);
2020 if (iter->slots_per_op) {
2021 slots_found = 0;
2022 continue;
2023 }
2024
2025 /* start the allocation if the slot is correctly aligned */
2026 if (!slots_found++)
2027 alloc_start = iter;
2028
2029 if (slots_found == num_slots) {
2030 struct ppc440spe_adma_desc_slot *alloc_tail = NULL;
2031 struct ppc440spe_adma_desc_slot *last_used = NULL;
2032
2033 iter = alloc_start;
2034 while (num_slots) {
2035 int i;
2036 /* pre-ack all but the last descriptor */
2037 if (num_slots != slots_per_op)
2038 async_tx_ack(&iter->async_tx);
2039
2040 list_add_tail(&iter->chain_node, &chain);
2041 alloc_tail = iter;
2042 iter->async_tx.cookie = 0;
2043 iter->hw_next = NULL;
2044 iter->flags = 0;
2045 iter->slot_cnt = num_slots;
2046 iter->xor_check_result = NULL;
2047 for (i = 0; i < slots_per_op; i++) {
2048 iter->slots_per_op = slots_per_op - i;
2049 last_used = iter;
2050 iter = list_entry(iter->slot_node.next,
2051 struct ppc440spe_adma_desc_slot,
2052 slot_node);
2053 }
2054 num_slots -= slots_per_op;
2055 }
2056 alloc_tail->group_head = alloc_start;
2057 alloc_tail->async_tx.cookie = -EBUSY;
2058 list_splice(&chain, &alloc_tail->group_list);
2059 chan->last_used = last_used;
2060 return alloc_tail;
2061 }
2062 }
2063 if (!retry++)
2064 goto retry;
2065
2066 /* try to free some slots if the allocation fails */
2067 tasklet_schedule(&chan->irq_tasklet);
2068 return NULL;
2069}
2070
2071/**
2072 * ppc440spe_adma_alloc_chan_resources - allocate pools for CDB slots
2073 */
2074static int ppc440spe_adma_alloc_chan_resources(struct dma_chan *chan)
2075{
2076 struct ppc440spe_adma_chan *ppc440spe_chan;
2077 struct ppc440spe_adma_desc_slot *slot = NULL;
2078 char *hw_desc;
2079 int i, db_sz;
2080 int init;
2081
2082 ppc440spe_chan = to_ppc440spe_adma_chan(chan);
2083 init = ppc440spe_chan->slots_allocated ? 0 : 1;
2084 chan->chan_id = ppc440spe_chan->device->id;
2085
2086 /* Allocate descriptor slots */
2087 i = ppc440spe_chan->slots_allocated;
2088 if (ppc440spe_chan->device->id != PPC440SPE_XOR_ID)
2089 db_sz = sizeof(struct dma_cdb);
2090 else
2091 db_sz = sizeof(struct xor_cb);
2092
2093 for (; i < (ppc440spe_chan->device->pool_size / db_sz); i++) {
2094 slot = kzalloc(sizeof(struct ppc440spe_adma_desc_slot),
2095 GFP_KERNEL);
2096 if (!slot) {
2097 printk(KERN_INFO "SPE ADMA Channel only initialized"
2098 " %d descriptor slots", i--);
2099 break;
2100 }
2101
2102 hw_desc = (char *) ppc440spe_chan->device->dma_desc_pool_virt;
2103 slot->hw_desc = (void *) &hw_desc[i * db_sz];
2104 dma_async_tx_descriptor_init(&slot->async_tx, chan);
2105 slot->async_tx.tx_submit = ppc440spe_adma_tx_submit;
2106 INIT_LIST_HEAD(&slot->chain_node);
2107 INIT_LIST_HEAD(&slot->slot_node);
2108 INIT_LIST_HEAD(&slot->group_list);
2109 slot->phys = ppc440spe_chan->device->dma_desc_pool + i * db_sz;
2110 slot->idx = i;
2111
2112 spin_lock_bh(&ppc440spe_chan->lock);
2113 ppc440spe_chan->slots_allocated++;
2114 list_add_tail(&slot->slot_node, &ppc440spe_chan->all_slots);
2115 spin_unlock_bh(&ppc440spe_chan->lock);
2116 }
2117
2118 if (i && !ppc440spe_chan->last_used) {
2119 ppc440spe_chan->last_used =
2120 list_entry(ppc440spe_chan->all_slots.next,
2121 struct ppc440spe_adma_desc_slot,
2122 slot_node);
2123 }
2124
2125 dev_dbg(ppc440spe_chan->device->common.dev,
2126 "ppc440spe adma%d: allocated %d descriptor slots\n",
2127 ppc440spe_chan->device->id, i);
2128
2129 /* initialize the channel and the chain with a null operation */
2130 if (init) {
2131 switch (ppc440spe_chan->device->id) {
2132 case PPC440SPE_DMA0_ID:
2133 case PPC440SPE_DMA1_ID:
2134 ppc440spe_chan->hw_chain_inited = 0;
2135 /* Use WXOR for self-testing */
2136 if (!ppc440spe_r6_tchan)
2137 ppc440spe_r6_tchan = ppc440spe_chan;
2138 break;
2139 case PPC440SPE_XOR_ID:
2140 ppc440spe_chan_start_null_xor(ppc440spe_chan);
2141 break;
2142 default:
2143 BUG();
2144 }
2145 ppc440spe_chan->needs_unmap = 1;
2146 }
2147
2148 return (i > 0) ? i : -ENOMEM;
2149}
2150
2151/**
2152 * ppc440spe_desc_assign_cookie - assign a cookie
2153 */
2154static dma_cookie_t ppc440spe_desc_assign_cookie(
2155 struct ppc440spe_adma_chan *chan,
2156 struct ppc440spe_adma_desc_slot *desc)
2157{
2158 dma_cookie_t cookie = chan->common.cookie;
2159
2160 cookie++;
2161 if (cookie < 0)
2162 cookie = 1;
2163 chan->common.cookie = desc->async_tx.cookie = cookie;
2164 return cookie;
2165}
2166
2167/**
2168 * ppc440spe_rxor_set_region_data -
2169 */
2170static void ppc440spe_rxor_set_region(struct ppc440spe_adma_desc_slot *desc,
2171 u8 xor_arg_no, u32 mask)
2172{
2173 struct xor_cb *xcb = desc->hw_desc;
2174
2175 xcb->ops[xor_arg_no].h |= mask;
2176}
2177
2178/**
2179 * ppc440spe_rxor_set_src -
2180 */
2181static void ppc440spe_rxor_set_src(struct ppc440spe_adma_desc_slot *desc,
2182 u8 xor_arg_no, dma_addr_t addr)
2183{
2184 struct xor_cb *xcb = desc->hw_desc;
2185
2186 xcb->ops[xor_arg_no].h |= DMA_CUED_XOR_BASE;
2187 xcb->ops[xor_arg_no].l = addr;
2188}
2189
2190/**
2191 * ppc440spe_rxor_set_mult -
2192 */
2193static void ppc440spe_rxor_set_mult(struct ppc440spe_adma_desc_slot *desc,
2194 u8 xor_arg_no, u8 idx, u8 mult)
2195{
2196 struct xor_cb *xcb = desc->hw_desc;
2197
2198 xcb->ops[xor_arg_no].h |= mult << (DMA_CUED_MULT1_OFF + idx * 8);
2199}
2200
2201/**
2202 * ppc440spe_adma_check_threshold - append CDBs to h/w chain if threshold
2203 * has been achieved
2204 */
2205static void ppc440spe_adma_check_threshold(struct ppc440spe_adma_chan *chan)
2206{
2207 dev_dbg(chan->device->common.dev, "ppc440spe adma%d: pending: %d\n",
2208 chan->device->id, chan->pending);
2209
2210 if (chan->pending >= PPC440SPE_ADMA_THRESHOLD) {
2211 chan->pending = 0;
2212 ppc440spe_chan_append(chan);
2213 }
2214}
2215
2216/**
2217 * ppc440spe_adma_tx_submit - submit new descriptor group to the channel
2218 * (it's not necessary that descriptors will be submitted to the h/w
2219 * chains too right now)
2220 */
2221static dma_cookie_t ppc440spe_adma_tx_submit(struct dma_async_tx_descriptor *tx)
2222{
2223 struct ppc440spe_adma_desc_slot *sw_desc;
2224 struct ppc440spe_adma_chan *chan = to_ppc440spe_adma_chan(tx->chan);
2225 struct ppc440spe_adma_desc_slot *group_start, *old_chain_tail;
2226 int slot_cnt;
2227 int slots_per_op;
2228 dma_cookie_t cookie;
2229
2230 sw_desc = tx_to_ppc440spe_adma_slot(tx);
2231
2232 group_start = sw_desc->group_head;
2233 slot_cnt = group_start->slot_cnt;
2234 slots_per_op = group_start->slots_per_op;
2235
2236 spin_lock_bh(&chan->lock);
2237
2238 cookie = ppc440spe_desc_assign_cookie(chan, sw_desc);
2239
2240 if (unlikely(list_empty(&chan->chain))) {
2241 /* first peer */
2242 list_splice_init(&sw_desc->group_list, &chan->chain);
2243 chan_first_cdb[chan->device->id] = group_start;
2244 } else {
2245 /* isn't first peer, bind CDBs to chain */
2246 old_chain_tail = list_entry(chan->chain.prev,
2247 struct ppc440spe_adma_desc_slot,
2248 chain_node);
2249 list_splice_init(&sw_desc->group_list,
2250 &old_chain_tail->chain_node);
2251 /* fix up the hardware chain */
2252 ppc440spe_desc_set_link(chan, old_chain_tail, group_start);
2253 }
2254
2255 /* increment the pending count by the number of operations */
2256 chan->pending += slot_cnt / slots_per_op;
2257 ppc440spe_adma_check_threshold(chan);
2258 spin_unlock_bh(&chan->lock);
2259
2260 dev_dbg(chan->device->common.dev,
2261 "ppc440spe adma%d: %s cookie: %d slot: %d tx %p\n",
2262 chan->device->id, __func__,
2263 sw_desc->async_tx.cookie, sw_desc->idx, sw_desc);
2264
2265 return cookie;
2266}
2267
2268/**
2269 * ppc440spe_adma_prep_dma_interrupt - prepare CDB for a pseudo DMA operation
2270 */
2271static struct dma_async_tx_descriptor *ppc440spe_adma_prep_dma_interrupt(
2272 struct dma_chan *chan, unsigned long flags)
2273{
2274 struct ppc440spe_adma_chan *ppc440spe_chan;
2275 struct ppc440spe_adma_desc_slot *sw_desc, *group_start;
2276 int slot_cnt, slots_per_op;
2277
2278 ppc440spe_chan = to_ppc440spe_adma_chan(chan);
2279
2280 dev_dbg(ppc440spe_chan->device->common.dev,
2281 "ppc440spe adma%d: %s\n", ppc440spe_chan->device->id,
2282 __func__);
2283
2284 spin_lock_bh(&ppc440spe_chan->lock);
2285 slot_cnt = slots_per_op = 1;
2286 sw_desc = ppc440spe_adma_alloc_slots(ppc440spe_chan, slot_cnt,
2287 slots_per_op);
2288 if (sw_desc) {
2289 group_start = sw_desc->group_head;
2290 ppc440spe_desc_init_interrupt(group_start, ppc440spe_chan);
2291 group_start->unmap_len = 0;
2292 sw_desc->async_tx.flags = flags;
2293 }
2294 spin_unlock_bh(&ppc440spe_chan->lock);
2295
2296 return sw_desc ? &sw_desc->async_tx : NULL;
2297}
2298
2299/**
2300 * ppc440spe_adma_prep_dma_memcpy - prepare CDB for a MEMCPY operation
2301 */
2302static struct dma_async_tx_descriptor *ppc440spe_adma_prep_dma_memcpy(
2303 struct dma_chan *chan, dma_addr_t dma_dest,
2304 dma_addr_t dma_src, size_t len, unsigned long flags)
2305{
2306 struct ppc440spe_adma_chan *ppc440spe_chan;
2307 struct ppc440spe_adma_desc_slot *sw_desc, *group_start;
2308 int slot_cnt, slots_per_op;
2309
2310 ppc440spe_chan = to_ppc440spe_adma_chan(chan);
2311
2312 if (unlikely(!len))
2313 return NULL;
2314
2315 BUG_ON(unlikely(len > PPC440SPE_ADMA_DMA_MAX_BYTE_COUNT));
2316
2317 spin_lock_bh(&ppc440spe_chan->lock);
2318
2319 dev_dbg(ppc440spe_chan->device->common.dev,
2320 "ppc440spe adma%d: %s len: %u int_en %d\n",
2321 ppc440spe_chan->device->id, __func__, len,
2322 flags & DMA_PREP_INTERRUPT ? 1 : 0);
2323 slot_cnt = slots_per_op = 1;
2324 sw_desc = ppc440spe_adma_alloc_slots(ppc440spe_chan, slot_cnt,
2325 slots_per_op);
2326 if (sw_desc) {
2327 group_start = sw_desc->group_head;
2328 ppc440spe_desc_init_memcpy(group_start, flags);
2329 ppc440spe_adma_set_dest(group_start, dma_dest, 0);
2330 ppc440spe_adma_memcpy_xor_set_src(group_start, dma_src, 0);
2331 ppc440spe_desc_set_byte_count(group_start, ppc440spe_chan, len);
2332 sw_desc->unmap_len = len;
2333 sw_desc->async_tx.flags = flags;
2334 }
2335 spin_unlock_bh(&ppc440spe_chan->lock);
2336
2337 return sw_desc ? &sw_desc->async_tx : NULL;
2338}
2339
2340/**
2341 * ppc440spe_adma_prep_dma_memset - prepare CDB for a MEMSET operation
2342 */
2343static struct dma_async_tx_descriptor *ppc440spe_adma_prep_dma_memset(
2344 struct dma_chan *chan, dma_addr_t dma_dest, int value,
2345 size_t len, unsigned long flags)
2346{
2347 struct ppc440spe_adma_chan *ppc440spe_chan;
2348 struct ppc440spe_adma_desc_slot *sw_desc, *group_start;
2349 int slot_cnt, slots_per_op;
2350
2351 ppc440spe_chan = to_ppc440spe_adma_chan(chan);
2352
2353 if (unlikely(!len))
2354 return NULL;
2355
2356 BUG_ON(unlikely(len > PPC440SPE_ADMA_DMA_MAX_BYTE_COUNT));
2357
2358 spin_lock_bh(&ppc440spe_chan->lock);
2359
2360 dev_dbg(ppc440spe_chan->device->common.dev,
2361 "ppc440spe adma%d: %s cal: %u len: %u int_en %d\n",
2362 ppc440spe_chan->device->id, __func__, value, len,
2363 flags & DMA_PREP_INTERRUPT ? 1 : 0);
2364
2365 slot_cnt = slots_per_op = 1;
2366 sw_desc = ppc440spe_adma_alloc_slots(ppc440spe_chan, slot_cnt,
2367 slots_per_op);
2368 if (sw_desc) {
2369 group_start = sw_desc->group_head;
2370 ppc440spe_desc_init_memset(group_start, value, flags);
2371 ppc440spe_adma_set_dest(group_start, dma_dest, 0);
2372 ppc440spe_desc_set_byte_count(group_start, ppc440spe_chan, len);
2373 sw_desc->unmap_len = len;
2374 sw_desc->async_tx.flags = flags;
2375 }
2376 spin_unlock_bh(&ppc440spe_chan->lock);
2377
2378 return sw_desc ? &sw_desc->async_tx : NULL;
2379}
2380
2381/**
2382 * ppc440spe_adma_prep_dma_xor - prepare CDB for a XOR operation
2383 */
2384static struct dma_async_tx_descriptor *ppc440spe_adma_prep_dma_xor(
2385 struct dma_chan *chan, dma_addr_t dma_dest,
2386 dma_addr_t *dma_src, u32 src_cnt, size_t len,
2387 unsigned long flags)
2388{
2389 struct ppc440spe_adma_chan *ppc440spe_chan;
2390 struct ppc440spe_adma_desc_slot *sw_desc, *group_start;
2391 int slot_cnt, slots_per_op;
2392
2393 ppc440spe_chan = to_ppc440spe_adma_chan(chan);
2394
2395 ADMA_LL_DBG(prep_dma_xor_dbg(ppc440spe_chan->device->id,
2396 dma_dest, dma_src, src_cnt));
2397 if (unlikely(!len))
2398 return NULL;
2399 BUG_ON(unlikely(len > PPC440SPE_ADMA_XOR_MAX_BYTE_COUNT));
2400
2401 dev_dbg(ppc440spe_chan->device->common.dev,
2402 "ppc440spe adma%d: %s src_cnt: %d len: %u int_en: %d\n",
2403 ppc440spe_chan->device->id, __func__, src_cnt, len,
2404 flags & DMA_PREP_INTERRUPT ? 1 : 0);
2405
2406 spin_lock_bh(&ppc440spe_chan->lock);
2407 slot_cnt = ppc440spe_chan_xor_slot_count(len, src_cnt, &slots_per_op);
2408 sw_desc = ppc440spe_adma_alloc_slots(ppc440spe_chan, slot_cnt,
2409 slots_per_op);
2410 if (sw_desc) {
2411 group_start = sw_desc->group_head;
2412 ppc440spe_desc_init_xor(group_start, src_cnt, flags);
2413 ppc440spe_adma_set_dest(group_start, dma_dest, 0);
2414 while (src_cnt--)
2415 ppc440spe_adma_memcpy_xor_set_src(group_start,
2416 dma_src[src_cnt], src_cnt);
2417 ppc440spe_desc_set_byte_count(group_start, ppc440spe_chan, len);
2418 sw_desc->unmap_len = len;
2419 sw_desc->async_tx.flags = flags;
2420 }
2421 spin_unlock_bh(&ppc440spe_chan->lock);
2422
2423 return sw_desc ? &sw_desc->async_tx : NULL;
2424}
2425
2426static inline void
2427ppc440spe_desc_set_xor_src_cnt(struct ppc440spe_adma_desc_slot *desc,
2428 int src_cnt);
2429static void ppc440spe_init_rxor_cursor(struct ppc440spe_rxor *cursor);
2430
2431/**
2432 * ppc440spe_adma_init_dma2rxor_slot -
2433 */
2434static void ppc440spe_adma_init_dma2rxor_slot(
2435 struct ppc440spe_adma_desc_slot *desc,
2436 dma_addr_t *src, int src_cnt)
2437{
2438 int i;
2439
2440 /* initialize CDB */
2441 for (i = 0; i < src_cnt; i++) {
2442 ppc440spe_adma_dma2rxor_prep_src(desc, &desc->rxor_cursor, i,
2443 desc->src_cnt, (u32)src[i]);
2444 }
2445}
2446
2447/**
2448 * ppc440spe_dma01_prep_mult -
2449 * for Q operation where destination is also the source
2450 */
2451static struct ppc440spe_adma_desc_slot *ppc440spe_dma01_prep_mult(
2452 struct ppc440spe_adma_chan *ppc440spe_chan,
2453 dma_addr_t *dst, int dst_cnt, dma_addr_t *src, int src_cnt,
2454 const unsigned char *scf, size_t len, unsigned long flags)
2455{
2456 struct ppc440spe_adma_desc_slot *sw_desc = NULL;
2457 unsigned long op = 0;
2458 int slot_cnt;
2459
2460 set_bit(PPC440SPE_DESC_WXOR, &op);
2461 slot_cnt = 2;
2462
2463 spin_lock_bh(&ppc440spe_chan->lock);
2464
2465 /* use WXOR, each descriptor occupies one slot */
2466 sw_desc = ppc440spe_adma_alloc_slots(ppc440spe_chan, slot_cnt, 1);
2467 if (sw_desc) {
2468 struct ppc440spe_adma_chan *chan;
2469 struct ppc440spe_adma_desc_slot *iter;
2470 struct dma_cdb *hw_desc;
2471
2472 chan = to_ppc440spe_adma_chan(sw_desc->async_tx.chan);
2473 set_bits(op, &sw_desc->flags);
2474 sw_desc->src_cnt = src_cnt;
2475 sw_desc->dst_cnt = dst_cnt;
2476 /* First descriptor, zero data in the destination and copy it
2477 * to q page using MULTICAST transfer.
2478 */
2479 iter = list_first_entry(&sw_desc->group_list,
2480 struct ppc440spe_adma_desc_slot,
2481 chain_node);
2482 memset(iter->hw_desc, 0, sizeof(struct dma_cdb));
2483 /* set 'next' pointer */
2484 iter->hw_next = list_entry(iter->chain_node.next,
2485 struct ppc440spe_adma_desc_slot,
2486 chain_node);
2487 clear_bit(PPC440SPE_DESC_INT, &iter->flags);
2488 hw_desc = iter->hw_desc;
2489 hw_desc->opc = DMA_CDB_OPC_MULTICAST;
2490
2491 ppc440spe_desc_set_dest_addr(iter, chan,
2492 DMA_CUED_XOR_BASE, dst[0], 0);
2493 ppc440spe_desc_set_dest_addr(iter, chan, 0, dst[1], 1);
2494 ppc440spe_desc_set_src_addr(iter, chan, 0, DMA_CUED_XOR_HB,
2495 src[0]);
2496 ppc440spe_desc_set_byte_count(iter, ppc440spe_chan, len);
2497 iter->unmap_len = len;
2498
2499 /*
2500 * Second descriptor, multiply data from the q page
2501 * and store the result in real destination.
2502 */
2503 iter = list_first_entry(&iter->chain_node,
2504 struct ppc440spe_adma_desc_slot,
2505 chain_node);
2506 memset(iter->hw_desc, 0, sizeof(struct dma_cdb));
2507 iter->hw_next = NULL;
2508 if (flags & DMA_PREP_INTERRUPT)
2509 set_bit(PPC440SPE_DESC_INT, &iter->flags);
2510 else
2511 clear_bit(PPC440SPE_DESC_INT, &iter->flags);
2512
2513 hw_desc = iter->hw_desc;
2514 hw_desc->opc = DMA_CDB_OPC_MV_SG1_SG2;
2515 ppc440spe_desc_set_src_addr(iter, chan, 0,
2516 DMA_CUED_XOR_HB, dst[1]);
2517 ppc440spe_desc_set_dest_addr(iter, chan,
2518 DMA_CUED_XOR_BASE, dst[0], 0);
2519
2520 ppc440spe_desc_set_src_mult(iter, chan, DMA_CUED_MULT1_OFF,
2521 DMA_CDB_SG_DST1, scf[0]);
2522 ppc440spe_desc_set_byte_count(iter, ppc440spe_chan, len);
2523 iter->unmap_len = len;
2524 sw_desc->async_tx.flags = flags;
2525 }
2526
2527 spin_unlock_bh(&ppc440spe_chan->lock);
2528
2529 return sw_desc;
2530}
2531
2532/**
2533 * ppc440spe_dma01_prep_sum_product -
2534 * Dx = A*(P+Pxy) + B*(Q+Qxy) operation where destination is also
2535 * the source.
2536 */
2537static struct ppc440spe_adma_desc_slot *ppc440spe_dma01_prep_sum_product(
2538 struct ppc440spe_adma_chan *ppc440spe_chan,
2539 dma_addr_t *dst, dma_addr_t *src, int src_cnt,
2540 const unsigned char *scf, size_t len, unsigned long flags)
2541{
2542 struct ppc440spe_adma_desc_slot *sw_desc = NULL;
2543 unsigned long op = 0;
2544 int slot_cnt;
2545
2546 set_bit(PPC440SPE_DESC_WXOR, &op);
2547 slot_cnt = 3;
2548
2549 spin_lock_bh(&ppc440spe_chan->lock);
2550
2551 /* WXOR, each descriptor occupies one slot */
2552 sw_desc = ppc440spe_adma_alloc_slots(ppc440spe_chan, slot_cnt, 1);
2553 if (sw_desc) {
2554 struct ppc440spe_adma_chan *chan;
2555 struct ppc440spe_adma_desc_slot *iter;
2556 struct dma_cdb *hw_desc;
2557
2558 chan = to_ppc440spe_adma_chan(sw_desc->async_tx.chan);
2559 set_bits(op, &sw_desc->flags);
2560 sw_desc->src_cnt = src_cnt;
2561 sw_desc->dst_cnt = 1;
2562 /* 1st descriptor, src[1] data to q page and zero destination */
2563 iter = list_first_entry(&sw_desc->group_list,
2564 struct ppc440spe_adma_desc_slot,
2565 chain_node);
2566 memset(iter->hw_desc, 0, sizeof(struct dma_cdb));
2567 iter->hw_next = list_entry(iter->chain_node.next,
2568 struct ppc440spe_adma_desc_slot,
2569 chain_node);
2570 clear_bit(PPC440SPE_DESC_INT, &iter->flags);
2571 hw_desc = iter->hw_desc;
2572 hw_desc->opc = DMA_CDB_OPC_MULTICAST;
2573
2574 ppc440spe_desc_set_dest_addr(iter, chan, DMA_CUED_XOR_BASE,
2575 *dst, 0);
2576 ppc440spe_desc_set_dest_addr(iter, chan, 0,
2577 ppc440spe_chan->qdest, 1);
2578 ppc440spe_desc_set_src_addr(iter, chan, 0, DMA_CUED_XOR_HB,
2579 src[1]);
2580 ppc440spe_desc_set_byte_count(iter, ppc440spe_chan, len);
2581 iter->unmap_len = len;
2582
2583 /* 2nd descriptor, multiply src[1] data and store the
2584 * result in destination */
2585 iter = list_first_entry(&iter->chain_node,
2586 struct ppc440spe_adma_desc_slot,
2587 chain_node);
2588 memset(iter->hw_desc, 0, sizeof(struct dma_cdb));
2589 /* set 'next' pointer */
2590 iter->hw_next = list_entry(iter->chain_node.next,
2591 struct ppc440spe_adma_desc_slot,
2592 chain_node);
2593 if (flags & DMA_PREP_INTERRUPT)
2594 set_bit(PPC440SPE_DESC_INT, &iter->flags);
2595 else
2596 clear_bit(PPC440SPE_DESC_INT, &iter->flags);
2597
2598 hw_desc = iter->hw_desc;
2599 hw_desc->opc = DMA_CDB_OPC_MV_SG1_SG2;
2600 ppc440spe_desc_set_src_addr(iter, chan, 0, DMA_CUED_XOR_HB,
2601 ppc440spe_chan->qdest);
2602 ppc440spe_desc_set_dest_addr(iter, chan, DMA_CUED_XOR_BASE,
2603 *dst, 0);
2604 ppc440spe_desc_set_src_mult(iter, chan, DMA_CUED_MULT1_OFF,
2605 DMA_CDB_SG_DST1, scf[1]);
2606 ppc440spe_desc_set_byte_count(iter, ppc440spe_chan, len);
2607 iter->unmap_len = len;
2608
2609 /*
2610 * 3rd descriptor, multiply src[0] data and xor it
2611 * with destination
2612 */
2613 iter = list_first_entry(&iter->chain_node,
2614 struct ppc440spe_adma_desc_slot,
2615 chain_node);
2616 memset(iter->hw_desc, 0, sizeof(struct dma_cdb));
2617 iter->hw_next = NULL;
2618 if (flags & DMA_PREP_INTERRUPT)
2619 set_bit(PPC440SPE_DESC_INT, &iter->flags);
2620 else
2621 clear_bit(PPC440SPE_DESC_INT, &iter->flags);
2622
2623 hw_desc = iter->hw_desc;
2624 hw_desc->opc = DMA_CDB_OPC_MV_SG1_SG2;
2625 ppc440spe_desc_set_src_addr(iter, chan, 0, DMA_CUED_XOR_HB,
2626 src[0]);
2627 ppc440spe_desc_set_dest_addr(iter, chan, DMA_CUED_XOR_BASE,
2628 *dst, 0);
2629 ppc440spe_desc_set_src_mult(iter, chan, DMA_CUED_MULT1_OFF,
2630 DMA_CDB_SG_DST1, scf[0]);
2631 ppc440spe_desc_set_byte_count(iter, ppc440spe_chan, len);
2632 iter->unmap_len = len;
2633 sw_desc->async_tx.flags = flags;
2634 }
2635
2636 spin_unlock_bh(&ppc440spe_chan->lock);
2637
2638 return sw_desc;
2639}
2640
2641static struct ppc440spe_adma_desc_slot *ppc440spe_dma01_prep_pq(
2642 struct ppc440spe_adma_chan *ppc440spe_chan,
2643 dma_addr_t *dst, int dst_cnt, dma_addr_t *src, int src_cnt,
2644 const unsigned char *scf, size_t len, unsigned long flags)
2645{
2646 int slot_cnt;
2647 struct ppc440spe_adma_desc_slot *sw_desc = NULL, *iter;
2648 unsigned long op = 0;
2649 unsigned char mult = 1;
2650
2651 pr_debug("%s: dst_cnt %d, src_cnt %d, len %d\n",
2652 __func__, dst_cnt, src_cnt, len);
2653 /* select operations WXOR/RXOR depending on the
2654 * source addresses of operators and the number
2655 * of destinations (RXOR support only Q-parity calculations)
2656 */
2657 set_bit(PPC440SPE_DESC_WXOR, &op);
2658 if (!test_and_set_bit(PPC440SPE_RXOR_RUN, &ppc440spe_rxor_state)) {
2659 /* no active RXOR;
2660 * do RXOR if:
2661 * - there are more than 1 source,
2662 * - len is aligned on 512-byte boundary,
2663 * - source addresses fit to one of 4 possible regions.
2664 */
2665 if (src_cnt > 1 &&
2666 !(len & MQ0_CF2H_RXOR_BS_MASK) &&
2667 (src[0] + len) == src[1]) {
2668 /* may do RXOR R1 R2 */
2669 set_bit(PPC440SPE_DESC_RXOR, &op);
2670 if (src_cnt != 2) {
2671 /* may try to enhance region of RXOR */
2672 if ((src[1] + len) == src[2]) {
2673 /* do RXOR R1 R2 R3 */
2674 set_bit(PPC440SPE_DESC_RXOR123,
2675 &op);
2676 } else if ((src[1] + len * 2) == src[2]) {
2677 /* do RXOR R1 R2 R4 */
2678 set_bit(PPC440SPE_DESC_RXOR124, &op);
2679 } else if ((src[1] + len * 3) == src[2]) {
2680 /* do RXOR R1 R2 R5 */
2681 set_bit(PPC440SPE_DESC_RXOR125,
2682 &op);
2683 } else {
2684 /* do RXOR R1 R2 */
2685 set_bit(PPC440SPE_DESC_RXOR12,
2686 &op);
2687 }
2688 } else {
2689 /* do RXOR R1 R2 */
2690 set_bit(PPC440SPE_DESC_RXOR12, &op);
2691 }
2692 }
2693
2694 if (!test_bit(PPC440SPE_DESC_RXOR, &op)) {
2695 /* can not do this operation with RXOR */
2696 clear_bit(PPC440SPE_RXOR_RUN,
2697 &ppc440spe_rxor_state);
2698 } else {
2699 /* can do; set block size right now */
2700 ppc440spe_desc_set_rxor_block_size(len);
2701 }
2702 }
2703
2704 /* Number of necessary slots depends on operation type selected */
2705 if (!test_bit(PPC440SPE_DESC_RXOR, &op)) {
2706 /* This is a WXOR only chain. Need descriptors for each
2707 * source to GF-XOR them with WXOR, and need descriptors
2708 * for each destination to zero them with WXOR
2709 */
2710 slot_cnt = src_cnt;
2711
2712 if (flags & DMA_PREP_ZERO_P) {
2713 slot_cnt++;
2714 set_bit(PPC440SPE_ZERO_P, &op);
2715 }
2716 if (flags & DMA_PREP_ZERO_Q) {
2717 slot_cnt++;
2718 set_bit(PPC440SPE_ZERO_Q, &op);
2719 }
2720 } else {
2721 /* Need 1/2 descriptor for RXOR operation, and
2722 * need (src_cnt - (2 or 3)) for WXOR of sources
2723 * remained (if any)
2724 */
2725 slot_cnt = dst_cnt;
2726
2727 if (flags & DMA_PREP_ZERO_P)
2728 set_bit(PPC440SPE_ZERO_P, &op);
2729 if (flags & DMA_PREP_ZERO_Q)
2730 set_bit(PPC440SPE_ZERO_Q, &op);
2731
2732 if (test_bit(PPC440SPE_DESC_RXOR12, &op))
2733 slot_cnt += src_cnt - 2;
2734 else
2735 slot_cnt += src_cnt - 3;
2736
2737 /* Thus we have either RXOR only chain or
2738 * mixed RXOR/WXOR
2739 */
2740 if (slot_cnt == dst_cnt)
2741 /* RXOR only chain */
2742 clear_bit(PPC440SPE_DESC_WXOR, &op);
2743 }
2744
2745 spin_lock_bh(&ppc440spe_chan->lock);
2746 /* for both RXOR/WXOR each descriptor occupies one slot */
2747 sw_desc = ppc440spe_adma_alloc_slots(ppc440spe_chan, slot_cnt, 1);
2748 if (sw_desc) {
2749 ppc440spe_desc_init_dma01pq(sw_desc, dst_cnt, src_cnt,
2750 flags, op);
2751
2752 /* setup dst/src/mult */
2753 pr_debug("%s: set dst descriptor 0, 1: 0x%016llx, 0x%016llx\n",
2754 __func__, dst[0], dst[1]);
2755 ppc440spe_adma_pq_set_dest(sw_desc, dst, flags);
2756 while (src_cnt--) {
2757 ppc440spe_adma_pq_set_src(sw_desc, src[src_cnt],
2758 src_cnt);
2759
2760 /* NOTE: "Multi = 0 is equivalent to = 1" as it
2761 * stated in 440SPSPe_RAID6_Addendum_UM_1_17.pdf
2762 * doesn't work for RXOR with DMA0/1! Instead, multi=0
2763 * leads to zeroing source data after RXOR.
2764 * So, for P case set-up mult=1 explicitly.
2765 */
2766 if (!(flags & DMA_PREP_PQ_DISABLE_Q))
2767 mult = scf[src_cnt];
2768 ppc440spe_adma_pq_set_src_mult(sw_desc,
2769 mult, src_cnt, dst_cnt - 1);
2770 }
2771
2772 /* Setup byte count foreach slot just allocated */
2773 sw_desc->async_tx.flags = flags;
2774 list_for_each_entry(iter, &sw_desc->group_list,
2775 chain_node) {
2776 ppc440spe_desc_set_byte_count(iter,
2777 ppc440spe_chan, len);
2778 iter->unmap_len = len;
2779 }
2780 }
2781 spin_unlock_bh(&ppc440spe_chan->lock);
2782
2783 return sw_desc;
2784}
2785
2786static struct ppc440spe_adma_desc_slot *ppc440spe_dma2_prep_pq(
2787 struct ppc440spe_adma_chan *ppc440spe_chan,
2788 dma_addr_t *dst, int dst_cnt, dma_addr_t *src, int src_cnt,
2789 const unsigned char *scf, size_t len, unsigned long flags)
2790{
2791 int slot_cnt, descs_per_op;
2792 struct ppc440spe_adma_desc_slot *sw_desc = NULL, *iter;
2793 unsigned long op = 0;
2794 unsigned char mult = 1;
2795
2796 BUG_ON(!dst_cnt);
2797 /*pr_debug("%s: dst_cnt %d, src_cnt %d, len %d\n",
2798 __func__, dst_cnt, src_cnt, len);*/
2799
2800 spin_lock_bh(&ppc440spe_chan->lock);
2801 descs_per_op = ppc440spe_dma2_pq_slot_count(src, src_cnt, len);
2802 if (descs_per_op < 0) {
2803 spin_unlock_bh(&ppc440spe_chan->lock);
2804 return NULL;
2805 }
2806
2807 /* depending on number of sources we have 1 or 2 RXOR chains */
2808 slot_cnt = descs_per_op * dst_cnt;
2809
2810 sw_desc = ppc440spe_adma_alloc_slots(ppc440spe_chan, slot_cnt, 1);
2811 if (sw_desc) {
2812 op = slot_cnt;
2813 sw_desc->async_tx.flags = flags;
2814 list_for_each_entry(iter, &sw_desc->group_list, chain_node) {
2815 ppc440spe_desc_init_dma2pq(iter, dst_cnt, src_cnt,
2816 --op ? 0 : flags);
2817 ppc440spe_desc_set_byte_count(iter, ppc440spe_chan,
2818 len);
2819 iter->unmap_len = len;
2820
2821 ppc440spe_init_rxor_cursor(&(iter->rxor_cursor));
2822 iter->rxor_cursor.len = len;
2823 iter->descs_per_op = descs_per_op;
2824 }
2825 op = 0;
2826 list_for_each_entry(iter, &sw_desc->group_list, chain_node) {
2827 op++;
2828 if (op % descs_per_op == 0)
2829 ppc440spe_adma_init_dma2rxor_slot(iter, src,
2830 src_cnt);
2831 if (likely(!list_is_last(&iter->chain_node,
2832 &sw_desc->group_list))) {
2833 /* set 'next' pointer */
2834 iter->hw_next =
2835 list_entry(iter->chain_node.next,
2836 struct ppc440spe_adma_desc_slot,
2837 chain_node);
2838 ppc440spe_xor_set_link(iter, iter->hw_next);
2839 } else {
2840 /* this is the last descriptor. */
2841 iter->hw_next = NULL;
2842 }
2843 }
2844
2845 /* fixup head descriptor */
2846 sw_desc->dst_cnt = dst_cnt;
2847 if (flags & DMA_PREP_ZERO_P)
2848 set_bit(PPC440SPE_ZERO_P, &sw_desc->flags);
2849 if (flags & DMA_PREP_ZERO_Q)
2850 set_bit(PPC440SPE_ZERO_Q, &sw_desc->flags);
2851
2852 /* setup dst/src/mult */
2853 ppc440spe_adma_pq_set_dest(sw_desc, dst, flags);
2854
2855 while (src_cnt--) {
2856 /* handle descriptors (if dst_cnt == 2) inside
2857 * the ppc440spe_adma_pq_set_srcxxx() functions
2858 */
2859 ppc440spe_adma_pq_set_src(sw_desc, src[src_cnt],
2860 src_cnt);
2861 if (!(flags & DMA_PREP_PQ_DISABLE_Q))
2862 mult = scf[src_cnt];
2863 ppc440spe_adma_pq_set_src_mult(sw_desc,
2864 mult, src_cnt, dst_cnt - 1);
2865 }
2866 }
2867 spin_unlock_bh(&ppc440spe_chan->lock);
2868 ppc440spe_desc_set_rxor_block_size(len);
2869 return sw_desc;
2870}
2871
2872/**
2873 * ppc440spe_adma_prep_dma_pq - prepare CDB (group) for a GF-XOR operation
2874 */
2875static struct dma_async_tx_descriptor *ppc440spe_adma_prep_dma_pq(
2876 struct dma_chan *chan, dma_addr_t *dst, dma_addr_t *src,
2877 unsigned int src_cnt, const unsigned char *scf,
2878 size_t len, unsigned long flags)
2879{
2880 struct ppc440spe_adma_chan *ppc440spe_chan;
2881 struct ppc440spe_adma_desc_slot *sw_desc = NULL;
2882 int dst_cnt = 0;
2883
2884 ppc440spe_chan = to_ppc440spe_adma_chan(chan);
2885
2886 ADMA_LL_DBG(prep_dma_pq_dbg(ppc440spe_chan->device->id,
2887 dst, src, src_cnt));
2888 BUG_ON(!len);
2889 BUG_ON(unlikely(len > PPC440SPE_ADMA_XOR_MAX_BYTE_COUNT));
2890 BUG_ON(!src_cnt);
2891
2892 if (src_cnt == 1 && dst[1] == src[0]) {
2893 dma_addr_t dest[2];
2894
2895 /* dst[1] is real destination (Q) */
2896 dest[0] = dst[1];
2897 /* this is the page to multicast source data to */
2898 dest[1] = ppc440spe_chan->qdest;
2899 sw_desc = ppc440spe_dma01_prep_mult(ppc440spe_chan,
2900 dest, 2, src, src_cnt, scf, len, flags);
2901 return sw_desc ? &sw_desc->async_tx : NULL;
2902 }
2903
2904 if (src_cnt == 2 && dst[1] == src[1]) {
2905 sw_desc = ppc440spe_dma01_prep_sum_product(ppc440spe_chan,
2906 &dst[1], src, 2, scf, len, flags);
2907 return sw_desc ? &sw_desc->async_tx : NULL;
2908 }
2909
2910 if (!(flags & DMA_PREP_PQ_DISABLE_P)) {
2911 BUG_ON(!dst[0]);
2912 dst_cnt++;
2913 flags |= DMA_PREP_ZERO_P;
2914 }
2915
2916 if (!(flags & DMA_PREP_PQ_DISABLE_Q)) {
2917 BUG_ON(!dst[1]);
2918 dst_cnt++;
2919 flags |= DMA_PREP_ZERO_Q;
2920 }
2921
2922 BUG_ON(!dst_cnt);
2923
2924 dev_dbg(ppc440spe_chan->device->common.dev,
2925 "ppc440spe adma%d: %s src_cnt: %d len: %u int_en: %d\n",
2926 ppc440spe_chan->device->id, __func__, src_cnt, len,
2927 flags & DMA_PREP_INTERRUPT ? 1 : 0);
2928
2929 switch (ppc440spe_chan->device->id) {
2930 case PPC440SPE_DMA0_ID:
2931 case PPC440SPE_DMA1_ID:
2932 sw_desc = ppc440spe_dma01_prep_pq(ppc440spe_chan,
2933 dst, dst_cnt, src, src_cnt, scf,
2934 len, flags);
2935 break;
2936
2937 case PPC440SPE_XOR_ID:
2938 sw_desc = ppc440spe_dma2_prep_pq(ppc440spe_chan,
2939 dst, dst_cnt, src, src_cnt, scf,
2940 len, flags);
2941 break;
2942 }
2943
2944 return sw_desc ? &sw_desc->async_tx : NULL;
2945}
2946
2947/**
2948 * ppc440spe_adma_prep_dma_pqzero_sum - prepare CDB group for
2949 * a PQ_ZERO_SUM operation
2950 */
2951static struct dma_async_tx_descriptor *ppc440spe_adma_prep_dma_pqzero_sum(
2952 struct dma_chan *chan, dma_addr_t *pq, dma_addr_t *src,
2953 unsigned int src_cnt, const unsigned char *scf, size_t len,
2954 enum sum_check_flags *pqres, unsigned long flags)
2955{
2956 struct ppc440spe_adma_chan *ppc440spe_chan;
2957 struct ppc440spe_adma_desc_slot *sw_desc, *iter;
2958 dma_addr_t pdest, qdest;
2959 int slot_cnt, slots_per_op, idst, dst_cnt;
2960
2961 ppc440spe_chan = to_ppc440spe_adma_chan(chan);
2962
2963 if (flags & DMA_PREP_PQ_DISABLE_P)
2964 pdest = 0;
2965 else
2966 pdest = pq[0];
2967
2968 if (flags & DMA_PREP_PQ_DISABLE_Q)
2969 qdest = 0;
2970 else
2971 qdest = pq[1];
2972
2973 ADMA_LL_DBG(prep_dma_pqzero_sum_dbg(ppc440spe_chan->device->id,
2974 src, src_cnt, scf));
2975
2976 /* Always use WXOR for P/Q calculations (two destinations).
2977 * Need 1 or 2 extra slots to verify results are zero.
2978 */
2979 idst = dst_cnt = (pdest && qdest) ? 2 : 1;
2980
2981 /* One additional slot per destination to clone P/Q
2982 * before calculation (we have to preserve destinations).
2983 */
2984 slot_cnt = src_cnt + dst_cnt * 2;
2985 slots_per_op = 1;
2986
2987 spin_lock_bh(&ppc440spe_chan->lock);
2988 sw_desc = ppc440spe_adma_alloc_slots(ppc440spe_chan, slot_cnt,
2989 slots_per_op);
2990 if (sw_desc) {
2991 ppc440spe_desc_init_dma01pqzero_sum(sw_desc, dst_cnt, src_cnt);
2992
2993 /* Setup byte count for each slot just allocated */
2994 sw_desc->async_tx.flags = flags;
2995 list_for_each_entry(iter, &sw_desc->group_list, chain_node) {
2996 ppc440spe_desc_set_byte_count(iter, ppc440spe_chan,
2997 len);
2998 iter->unmap_len = len;
2999 }
3000
3001 if (pdest) {
3002 struct dma_cdb *hw_desc;
3003 struct ppc440spe_adma_chan *chan;
3004
3005 iter = sw_desc->group_head;
3006 chan = to_ppc440spe_adma_chan(iter->async_tx.chan);
3007 memset(iter->hw_desc, 0, sizeof(struct dma_cdb));
3008 iter->hw_next = list_entry(iter->chain_node.next,
3009 struct ppc440spe_adma_desc_slot,
3010 chain_node);
3011 hw_desc = iter->hw_desc;
3012 hw_desc->opc = DMA_CDB_OPC_MV_SG1_SG2;
3013 iter->src_cnt = 0;
3014 iter->dst_cnt = 0;
3015 ppc440spe_desc_set_dest_addr(iter, chan, 0,
3016 ppc440spe_chan->pdest, 0);
3017 ppc440spe_desc_set_src_addr(iter, chan, 0, 0, pdest);
3018 ppc440spe_desc_set_byte_count(iter, ppc440spe_chan,
3019 len);
3020 iter->unmap_len = 0;
3021 /* override pdest to preserve original P */
3022 pdest = ppc440spe_chan->pdest;
3023 }
3024 if (qdest) {
3025 struct dma_cdb *hw_desc;
3026 struct ppc440spe_adma_chan *chan;
3027
3028 iter = list_first_entry(&sw_desc->group_list,
3029 struct ppc440spe_adma_desc_slot,
3030 chain_node);
3031 chan = to_ppc440spe_adma_chan(iter->async_tx.chan);
3032
3033 if (pdest) {
3034 iter = list_entry(iter->chain_node.next,
3035 struct ppc440spe_adma_desc_slot,
3036 chain_node);
3037 }
3038
3039 memset(iter->hw_desc, 0, sizeof(struct dma_cdb));
3040 iter->hw_next = list_entry(iter->chain_node.next,
3041 struct ppc440spe_adma_desc_slot,
3042 chain_node);
3043 hw_desc = iter->hw_desc;
3044 hw_desc->opc = DMA_CDB_OPC_MV_SG1_SG2;
3045 iter->src_cnt = 0;
3046 iter->dst_cnt = 0;
3047 ppc440spe_desc_set_dest_addr(iter, chan, 0,
3048 ppc440spe_chan->qdest, 0);
3049 ppc440spe_desc_set_src_addr(iter, chan, 0, 0, qdest);
3050 ppc440spe_desc_set_byte_count(iter, ppc440spe_chan,
3051 len);
3052 iter->unmap_len = 0;
3053 /* override qdest to preserve original Q */
3054 qdest = ppc440spe_chan->qdest;
3055 }
3056
3057 /* Setup destinations for P/Q ops */
3058 ppc440spe_adma_pqzero_sum_set_dest(sw_desc, pdest, qdest);
3059
3060 /* Setup zero QWORDs into DCHECK CDBs */
3061 idst = dst_cnt;
3062 list_for_each_entry_reverse(iter, &sw_desc->group_list,
3063 chain_node) {
3064 /*
3065 * The last CDB corresponds to Q-parity check,
3066 * the one before last CDB corresponds
3067 * P-parity check
3068 */
3069 if (idst == DMA_DEST_MAX_NUM) {
3070 if (idst == dst_cnt) {
3071 set_bit(PPC440SPE_DESC_QCHECK,
3072 &iter->flags);
3073 } else {
3074 set_bit(PPC440SPE_DESC_PCHECK,
3075 &iter->flags);
3076 }
3077 } else {
3078 if (qdest) {
3079 set_bit(PPC440SPE_DESC_QCHECK,
3080 &iter->flags);
3081 } else {
3082 set_bit(PPC440SPE_DESC_PCHECK,
3083 &iter->flags);
3084 }
3085 }
3086 iter->xor_check_result = pqres;
3087
3088 /*
3089 * set it to zero, if check fail then result will
3090 * be updated
3091 */
3092 *iter->xor_check_result = 0;
3093 ppc440spe_desc_set_dcheck(iter, ppc440spe_chan,
3094 ppc440spe_qword);
3095
3096 if (!(--dst_cnt))
3097 break;
3098 }
3099
3100 /* Setup sources and mults for P/Q ops */
3101 list_for_each_entry_continue_reverse(iter, &sw_desc->group_list,
3102 chain_node) {
3103 struct ppc440spe_adma_chan *chan;
3104 u32 mult_dst;
3105
3106 chan = to_ppc440spe_adma_chan(iter->async_tx.chan);
3107 ppc440spe_desc_set_src_addr(iter, chan, 0,
3108 DMA_CUED_XOR_HB,
3109 src[src_cnt - 1]);
3110 if (qdest) {
3111 mult_dst = (dst_cnt - 1) ? DMA_CDB_SG_DST2 :
3112 DMA_CDB_SG_DST1;
3113 ppc440spe_desc_set_src_mult(iter, chan,
3114 DMA_CUED_MULT1_OFF,
3115 mult_dst,
3116 scf[src_cnt - 1]);
3117 }
3118 if (!(--src_cnt))
3119 break;
3120 }
3121 }
3122 spin_unlock_bh(&ppc440spe_chan->lock);
3123 return sw_desc ? &sw_desc->async_tx : NULL;
3124}
3125
3126/**
3127 * ppc440spe_adma_prep_dma_xor_zero_sum - prepare CDB group for
3128 * XOR ZERO_SUM operation
3129 */
3130static struct dma_async_tx_descriptor *ppc440spe_adma_prep_dma_xor_zero_sum(
3131 struct dma_chan *chan, dma_addr_t *src, unsigned int src_cnt,
3132 size_t len, enum sum_check_flags *result, unsigned long flags)
3133{
3134 struct dma_async_tx_descriptor *tx;
3135 dma_addr_t pq[2];
3136
3137 /* validate P, disable Q */
3138 pq[0] = src[0];
3139 pq[1] = 0;
3140 flags |= DMA_PREP_PQ_DISABLE_Q;
3141
3142 tx = ppc440spe_adma_prep_dma_pqzero_sum(chan, pq, &src[1],
3143 src_cnt - 1, 0, len,
3144 result, flags);
3145 return tx;
3146}
3147
3148/**
3149 * ppc440spe_adma_set_dest - set destination address into descriptor
3150 */
3151static void ppc440spe_adma_set_dest(struct ppc440spe_adma_desc_slot *sw_desc,
3152 dma_addr_t addr, int index)
3153{
3154 struct ppc440spe_adma_chan *chan;
3155
3156 BUG_ON(index >= sw_desc->dst_cnt);
3157
3158 chan = to_ppc440spe_adma_chan(sw_desc->async_tx.chan);
3159
3160 switch (chan->device->id) {
3161 case PPC440SPE_DMA0_ID:
3162 case PPC440SPE_DMA1_ID:
3163 /* to do: support transfers lengths >
3164 * PPC440SPE_ADMA_DMA/XOR_MAX_BYTE_COUNT
3165 */
3166 ppc440spe_desc_set_dest_addr(sw_desc->group_head,
3167 chan, 0, addr, index);
3168 break;
3169 case PPC440SPE_XOR_ID:
3170 sw_desc = ppc440spe_get_group_entry(sw_desc, index);
3171 ppc440spe_desc_set_dest_addr(sw_desc,
3172 chan, 0, addr, index);
3173 break;
3174 }
3175}
3176
3177static void ppc440spe_adma_pq_zero_op(struct ppc440spe_adma_desc_slot *iter,
3178 struct ppc440spe_adma_chan *chan, dma_addr_t addr)
3179{
3180 /* To clear destinations update the descriptor
3181 * (P or Q depending on index) as follows:
3182 * addr is destination (0 corresponds to SG2):
3183 */
3184 ppc440spe_desc_set_dest_addr(iter, chan, DMA_CUED_XOR_BASE, addr, 0);
3185
3186 /* ... and the addr is source: */
3187 ppc440spe_desc_set_src_addr(iter, chan, 0, DMA_CUED_XOR_HB, addr);
3188
3189 /* addr is always SG2 then the mult is always DST1 */
3190 ppc440spe_desc_set_src_mult(iter, chan, DMA_CUED_MULT1_OFF,
3191 DMA_CDB_SG_DST1, 1);
3192}
3193
3194/**
3195 * ppc440spe_adma_pq_set_dest - set destination address into descriptor
3196 * for the PQXOR operation
3197 */
3198static void ppc440spe_adma_pq_set_dest(struct ppc440spe_adma_desc_slot *sw_desc,
3199 dma_addr_t *addrs, unsigned long flags)
3200{
3201 struct ppc440spe_adma_desc_slot *iter;
3202 struct ppc440spe_adma_chan *chan;
3203 dma_addr_t paddr, qaddr;
3204 dma_addr_t addr = 0, ppath, qpath;
3205 int index = 0, i;
3206
3207 chan = to_ppc440spe_adma_chan(sw_desc->async_tx.chan);
3208
3209 if (flags & DMA_PREP_PQ_DISABLE_P)
3210 paddr = 0;
3211 else
3212 paddr = addrs[0];
3213
3214 if (flags & DMA_PREP_PQ_DISABLE_Q)
3215 qaddr = 0;
3216 else
3217 qaddr = addrs[1];
3218
3219 if (!paddr || !qaddr)
3220 addr = paddr ? paddr : qaddr;
3221
3222 switch (chan->device->id) {
3223 case PPC440SPE_DMA0_ID:
3224 case PPC440SPE_DMA1_ID:
3225 /* walk through the WXOR source list and set P/Q-destinations
3226 * for each slot:
3227 */
3228 if (!test_bit(PPC440SPE_DESC_RXOR, &sw_desc->flags)) {
3229 /* This is WXOR-only chain; may have 1/2 zero descs */
3230 if (test_bit(PPC440SPE_ZERO_P, &sw_desc->flags))
3231 index++;
3232 if (test_bit(PPC440SPE_ZERO_Q, &sw_desc->flags))
3233 index++;
3234
3235 iter = ppc440spe_get_group_entry(sw_desc, index);
3236 if (addr) {
3237 /* one destination */
3238 list_for_each_entry_from(iter,
3239 &sw_desc->group_list, chain_node)
3240 ppc440spe_desc_set_dest_addr(iter, chan,
3241 DMA_CUED_XOR_BASE, addr, 0);
3242 } else {
3243 /* two destinations */
3244 list_for_each_entry_from(iter,
3245 &sw_desc->group_list, chain_node) {
3246 ppc440spe_desc_set_dest_addr(iter, chan,
3247 DMA_CUED_XOR_BASE, paddr, 0);
3248 ppc440spe_desc_set_dest_addr(iter, chan,
3249 DMA_CUED_XOR_BASE, qaddr, 1);
3250 }
3251 }
3252
3253 if (index) {
3254 /* To clear destinations update the descriptor
3255 * (1st,2nd, or both depending on flags)
3256 */
3257 index = 0;
3258 if (test_bit(PPC440SPE_ZERO_P,
3259 &sw_desc->flags)) {
3260 iter = ppc440spe_get_group_entry(
3261 sw_desc, index++);
3262 ppc440spe_adma_pq_zero_op(iter, chan,
3263 paddr);
3264 }
3265
3266 if (test_bit(PPC440SPE_ZERO_Q,
3267 &sw_desc->flags)) {
3268 iter = ppc440spe_get_group_entry(
3269 sw_desc, index++);
3270 ppc440spe_adma_pq_zero_op(iter, chan,
3271 qaddr);
3272 }
3273
3274 return;
3275 }
3276 } else {
3277 /* This is RXOR-only or RXOR/WXOR mixed chain */
3278
3279 /* If we want to include destination into calculations,
3280 * then make dest addresses cued with mult=1 (XOR).
3281 */
3282 ppath = test_bit(PPC440SPE_ZERO_P, &sw_desc->flags) ?
3283 DMA_CUED_XOR_HB :
3284 DMA_CUED_XOR_BASE |
3285 (1 << DMA_CUED_MULT1_OFF);
3286 qpath = test_bit(PPC440SPE_ZERO_Q, &sw_desc->flags) ?
3287 DMA_CUED_XOR_HB :
3288 DMA_CUED_XOR_BASE |
3289 (1 << DMA_CUED_MULT1_OFF);
3290
3291 /* Setup destination(s) in RXOR slot(s) */
3292 iter = ppc440spe_get_group_entry(sw_desc, index++);
3293 ppc440spe_desc_set_dest_addr(iter, chan,
3294 paddr ? ppath : qpath,
3295 paddr ? paddr : qaddr, 0);
3296 if (!addr) {
3297 /* two destinations */
3298 iter = ppc440spe_get_group_entry(sw_desc,
3299 index++);
3300 ppc440spe_desc_set_dest_addr(iter, chan,
3301 qpath, qaddr, 0);
3302 }
3303
3304 if (test_bit(PPC440SPE_DESC_WXOR, &sw_desc->flags)) {
3305 /* Setup destination(s) in remaining WXOR
3306 * slots
3307 */
3308 iter = ppc440spe_get_group_entry(sw_desc,
3309 index);
3310 if (addr) {
3311 /* one destination */
3312 list_for_each_entry_from(iter,
3313 &sw_desc->group_list,
3314 chain_node)
3315 ppc440spe_desc_set_dest_addr(
3316 iter, chan,
3317 DMA_CUED_XOR_BASE,
3318 addr, 0);
3319
3320 } else {
3321 /* two destinations */
3322 list_for_each_entry_from(iter,
3323 &sw_desc->group_list,
3324 chain_node) {
3325 ppc440spe_desc_set_dest_addr(
3326 iter, chan,
3327 DMA_CUED_XOR_BASE,
3328 paddr, 0);
3329 ppc440spe_desc_set_dest_addr(
3330 iter, chan,
3331 DMA_CUED_XOR_BASE,
3332 qaddr, 1);
3333 }
3334 }
3335 }
3336
3337 }
3338 break;
3339
3340 case PPC440SPE_XOR_ID:
3341 /* DMA2 descriptors have only 1 destination, so there are
3342 * two chains - one for each dest.
3343 * If we want to include destination into calculations,
3344 * then make dest addresses cued with mult=1 (XOR).
3345 */
3346 ppath = test_bit(PPC440SPE_ZERO_P, &sw_desc->flags) ?
3347 DMA_CUED_XOR_HB :
3348 DMA_CUED_XOR_BASE |
3349 (1 << DMA_CUED_MULT1_OFF);
3350
3351 qpath = test_bit(PPC440SPE_ZERO_Q, &sw_desc->flags) ?
3352 DMA_CUED_XOR_HB :
3353 DMA_CUED_XOR_BASE |
3354 (1 << DMA_CUED_MULT1_OFF);
3355
3356 iter = ppc440spe_get_group_entry(sw_desc, 0);
3357 for (i = 0; i < sw_desc->descs_per_op; i++) {
3358 ppc440spe_desc_set_dest_addr(iter, chan,
3359 paddr ? ppath : qpath,
3360 paddr ? paddr : qaddr, 0);
3361 iter = list_entry(iter->chain_node.next,
3362 struct ppc440spe_adma_desc_slot,
3363 chain_node);
3364 }
3365
3366 if (!addr) {
3367 /* Two destinations; setup Q here */
3368 iter = ppc440spe_get_group_entry(sw_desc,
3369 sw_desc->descs_per_op);
3370 for (i = 0; i < sw_desc->descs_per_op; i++) {
3371 ppc440spe_desc_set_dest_addr(iter,
3372 chan, qpath, qaddr, 0);
3373 iter = list_entry(iter->chain_node.next,
3374 struct ppc440spe_adma_desc_slot,
3375 chain_node);
3376 }
3377 }
3378
3379 break;
3380 }
3381}
3382
3383/**
3384 * ppc440spe_adma_pq_zero_sum_set_dest - set destination address into descriptor
3385 * for the PQ_ZERO_SUM operation
3386 */
3387static void ppc440spe_adma_pqzero_sum_set_dest(
3388 struct ppc440spe_adma_desc_slot *sw_desc,
3389 dma_addr_t paddr, dma_addr_t qaddr)
3390{
3391 struct ppc440spe_adma_desc_slot *iter, *end;
3392 struct ppc440spe_adma_chan *chan;
3393 dma_addr_t addr = 0;
3394 int idx;
3395
3396 chan = to_ppc440spe_adma_chan(sw_desc->async_tx.chan);
3397
3398 /* walk through the WXOR source list and set P/Q-destinations
3399 * for each slot
3400 */
3401 idx = (paddr && qaddr) ? 2 : 1;
3402 /* set end */
3403 list_for_each_entry_reverse(end, &sw_desc->group_list,
3404 chain_node) {
3405 if (!(--idx))
3406 break;
3407 }
3408 /* set start */
3409 idx = (paddr && qaddr) ? 2 : 1;
3410 iter = ppc440spe_get_group_entry(sw_desc, idx);
3411
3412 if (paddr && qaddr) {
3413 /* two destinations */
3414 list_for_each_entry_from(iter, &sw_desc->group_list,
3415 chain_node) {
3416 if (unlikely(iter == end))
3417 break;
3418 ppc440spe_desc_set_dest_addr(iter, chan,
3419 DMA_CUED_XOR_BASE, paddr, 0);
3420 ppc440spe_desc_set_dest_addr(iter, chan,
3421 DMA_CUED_XOR_BASE, qaddr, 1);
3422 }
3423 } else {
3424 /* one destination */
3425 addr = paddr ? paddr : qaddr;
3426 list_for_each_entry_from(iter, &sw_desc->group_list,
3427 chain_node) {
3428 if (unlikely(iter == end))
3429 break;
3430 ppc440spe_desc_set_dest_addr(iter, chan,
3431 DMA_CUED_XOR_BASE, addr, 0);
3432 }
3433 }
3434
3435 /* The remaining descriptors are DATACHECK. These have no need in
3436 * destination. Actually, these destinations are used there
3437 * as sources for check operation. So, set addr as source.
3438 */
3439 ppc440spe_desc_set_src_addr(end, chan, 0, 0, addr ? addr : paddr);
3440
3441 if (!addr) {
3442 end = list_entry(end->chain_node.next,
3443 struct ppc440spe_adma_desc_slot, chain_node);
3444 ppc440spe_desc_set_src_addr(end, chan, 0, 0, qaddr);
3445 }
3446}
3447
3448/**
3449 * ppc440spe_desc_set_xor_src_cnt - set source count into descriptor
3450 */
3451static inline void ppc440spe_desc_set_xor_src_cnt(
3452 struct ppc440spe_adma_desc_slot *desc,
3453 int src_cnt)
3454{
3455 struct xor_cb *hw_desc = desc->hw_desc;
3456
3457 hw_desc->cbc &= ~XOR_CDCR_OAC_MSK;
3458 hw_desc->cbc |= src_cnt;
3459}
3460
3461/**
3462 * ppc440spe_adma_pq_set_src - set source address into descriptor
3463 */
3464static void ppc440spe_adma_pq_set_src(struct ppc440spe_adma_desc_slot *sw_desc,
3465 dma_addr_t addr, int index)
3466{
3467 struct ppc440spe_adma_chan *chan;
3468 dma_addr_t haddr = 0;
3469 struct ppc440spe_adma_desc_slot *iter = NULL;
3470
3471 chan = to_ppc440spe_adma_chan(sw_desc->async_tx.chan);
3472
3473 switch (chan->device->id) {
3474 case PPC440SPE_DMA0_ID:
3475 case PPC440SPE_DMA1_ID:
3476 /* DMA0,1 may do: WXOR, RXOR, RXOR+WXORs chain
3477 */
3478 if (test_bit(PPC440SPE_DESC_RXOR, &sw_desc->flags)) {
3479 /* RXOR-only or RXOR/WXOR operation */
3480 int iskip = test_bit(PPC440SPE_DESC_RXOR12,
3481 &sw_desc->flags) ? 2 : 3;
3482
3483 if (index == 0) {
3484 /* 1st slot (RXOR) */
3485 /* setup sources region (R1-2-3, R1-2-4,
3486 * or R1-2-5)
3487 */
3488 if (test_bit(PPC440SPE_DESC_RXOR12,
3489 &sw_desc->flags))
3490 haddr = DMA_RXOR12 <<
3491 DMA_CUED_REGION_OFF;
3492 else if (test_bit(PPC440SPE_DESC_RXOR123,
3493 &sw_desc->flags))
3494 haddr = DMA_RXOR123 <<
3495 DMA_CUED_REGION_OFF;
3496 else if (test_bit(PPC440SPE_DESC_RXOR124,
3497 &sw_desc->flags))
3498 haddr = DMA_RXOR124 <<
3499 DMA_CUED_REGION_OFF;
3500 else if (test_bit(PPC440SPE_DESC_RXOR125,
3501 &sw_desc->flags))
3502 haddr = DMA_RXOR125 <<
3503 DMA_CUED_REGION_OFF;
3504 else
3505 BUG();
3506 haddr |= DMA_CUED_XOR_BASE;
3507 iter = ppc440spe_get_group_entry(sw_desc, 0);
3508 } else if (index < iskip) {
3509 /* 1st slot (RXOR)
3510 * shall actually set source address only once
3511 * instead of first <iskip>
3512 */
3513 iter = NULL;
3514 } else {
3515 /* 2nd/3d and next slots (WXOR);
3516 * skip first slot with RXOR
3517 */
3518 haddr = DMA_CUED_XOR_HB;
3519 iter = ppc440spe_get_group_entry(sw_desc,
3520 index - iskip + sw_desc->dst_cnt);
3521 }
3522 } else {
3523 int znum = 0;
3524
3525 /* WXOR-only operation; skip first slots with
3526 * zeroing destinations
3527 */
3528 if (test_bit(PPC440SPE_ZERO_P, &sw_desc->flags))
3529 znum++;
3530 if (test_bit(PPC440SPE_ZERO_Q, &sw_desc->flags))
3531 znum++;
3532
3533 haddr = DMA_CUED_XOR_HB;
3534 iter = ppc440spe_get_group_entry(sw_desc,
3535 index + znum);
3536 }
3537
3538 if (likely(iter)) {
3539 ppc440spe_desc_set_src_addr(iter, chan, 0, haddr, addr);
3540
3541 if (!index &&
3542 test_bit(PPC440SPE_DESC_RXOR, &sw_desc->flags) &&
3543 sw_desc->dst_cnt == 2) {
3544 /* if we have two destinations for RXOR, then
3545 * setup source in the second descr too
3546 */
3547 iter = ppc440spe_get_group_entry(sw_desc, 1);
3548 ppc440spe_desc_set_src_addr(iter, chan, 0,
3549 haddr, addr);
3550 }
3551 }
3552 break;
3553
3554 case PPC440SPE_XOR_ID:
3555 /* DMA2 may do Biskup */
3556 iter = sw_desc->group_head;
3557 if (iter->dst_cnt == 2) {
3558 /* both P & Q calculations required; set P src here */
3559 ppc440spe_adma_dma2rxor_set_src(iter, index, addr);
3560
3561 /* this is for Q */
3562 iter = ppc440spe_get_group_entry(sw_desc,
3563 sw_desc->descs_per_op);
3564 }
3565 ppc440spe_adma_dma2rxor_set_src(iter, index, addr);
3566 break;
3567 }
3568}
3569
3570/**
3571 * ppc440spe_adma_memcpy_xor_set_src - set source address into descriptor
3572 */
3573static void ppc440spe_adma_memcpy_xor_set_src(
3574 struct ppc440spe_adma_desc_slot *sw_desc,
3575 dma_addr_t addr, int index)
3576{
3577 struct ppc440spe_adma_chan *chan;
3578
3579 chan = to_ppc440spe_adma_chan(sw_desc->async_tx.chan);
3580 sw_desc = sw_desc->group_head;
3581
3582 if (likely(sw_desc))
3583 ppc440spe_desc_set_src_addr(sw_desc, chan, index, 0, addr);
3584}
3585
3586/**
3587 * ppc440spe_adma_dma2rxor_inc_addr -
3588 */
3589static void ppc440spe_adma_dma2rxor_inc_addr(
3590 struct ppc440spe_adma_desc_slot *desc,
3591 struct ppc440spe_rxor *cursor, int index, int src_cnt)
3592{
3593 cursor->addr_count++;
3594 if (index == src_cnt - 1) {
3595 ppc440spe_desc_set_xor_src_cnt(desc, cursor->addr_count);
3596 } else if (cursor->addr_count == XOR_MAX_OPS) {
3597 ppc440spe_desc_set_xor_src_cnt(desc, cursor->addr_count);
3598 cursor->addr_count = 0;
3599 cursor->desc_count++;
3600 }
3601}
3602
3603/**
3604 * ppc440spe_adma_dma2rxor_prep_src - setup RXOR types in DMA2 CDB
3605 */
3606static int ppc440spe_adma_dma2rxor_prep_src(
3607 struct ppc440spe_adma_desc_slot *hdesc,
3608 struct ppc440spe_rxor *cursor, int index,
3609 int src_cnt, u32 addr)
3610{
3611 int rval = 0;
3612 u32 sign;
3613 struct ppc440spe_adma_desc_slot *desc = hdesc;
3614 int i;
3615
3616 for (i = 0; i < cursor->desc_count; i++) {
3617 desc = list_entry(hdesc->chain_node.next,
3618 struct ppc440spe_adma_desc_slot,
3619 chain_node);
3620 }
3621
3622 switch (cursor->state) {
3623 case 0:
3624 if (addr == cursor->addrl + cursor->len) {
3625 /* direct RXOR */
3626 cursor->state = 1;
3627 cursor->xor_count++;
3628 if (index == src_cnt-1) {
3629 ppc440spe_rxor_set_region(desc,
3630 cursor->addr_count,
3631 DMA_RXOR12 << DMA_CUED_REGION_OFF);
3632 ppc440spe_adma_dma2rxor_inc_addr(
3633 desc, cursor, index, src_cnt);
3634 }
3635 } else if (cursor->addrl == addr + cursor->len) {
3636 /* reverse RXOR */
3637 cursor->state = 1;
3638 cursor->xor_count++;
3639 set_bit(cursor->addr_count, &desc->reverse_flags[0]);
3640 if (index == src_cnt-1) {
3641 ppc440spe_rxor_set_region(desc,
3642 cursor->addr_count,
3643 DMA_RXOR12 << DMA_CUED_REGION_OFF);
3644 ppc440spe_adma_dma2rxor_inc_addr(
3645 desc, cursor, index, src_cnt);
3646 }
3647 } else {
3648 printk(KERN_ERR "Cannot build "
3649 "DMA2 RXOR command block.\n");
3650 BUG();
3651 }
3652 break;
3653 case 1:
3654 sign = test_bit(cursor->addr_count,
3655 desc->reverse_flags)
3656 ? -1 : 1;
3657 if (index == src_cnt-2 || (sign == -1
3658 && addr != cursor->addrl - 2*cursor->len)) {
3659 cursor->state = 0;
3660 cursor->xor_count = 1;
3661 cursor->addrl = addr;
3662 ppc440spe_rxor_set_region(desc,
3663 cursor->addr_count,
3664 DMA_RXOR12 << DMA_CUED_REGION_OFF);
3665 ppc440spe_adma_dma2rxor_inc_addr(
3666 desc, cursor, index, src_cnt);
3667 } else if (addr == cursor->addrl + 2*sign*cursor->len) {
3668 cursor->state = 2;
3669 cursor->xor_count = 0;
3670 ppc440spe_rxor_set_region(desc,
3671 cursor->addr_count,
3672 DMA_RXOR123 << DMA_CUED_REGION_OFF);
3673 if (index == src_cnt-1) {
3674 ppc440spe_adma_dma2rxor_inc_addr(
3675 desc, cursor, index, src_cnt);
3676 }
3677 } else if (addr == cursor->addrl + 3*cursor->len) {
3678 cursor->state = 2;
3679 cursor->xor_count = 0;
3680 ppc440spe_rxor_set_region(desc,
3681 cursor->addr_count,
3682 DMA_RXOR124 << DMA_CUED_REGION_OFF);
3683 if (index == src_cnt-1) {
3684 ppc440spe_adma_dma2rxor_inc_addr(
3685 desc, cursor, index, src_cnt);
3686 }
3687 } else if (addr == cursor->addrl + 4*cursor->len) {
3688 cursor->state = 2;
3689 cursor->xor_count = 0;
3690 ppc440spe_rxor_set_region(desc,
3691 cursor->addr_count,
3692 DMA_RXOR125 << DMA_CUED_REGION_OFF);
3693 if (index == src_cnt-1) {
3694 ppc440spe_adma_dma2rxor_inc_addr(
3695 desc, cursor, index, src_cnt);
3696 }
3697 } else {
3698 cursor->state = 0;
3699 cursor->xor_count = 1;
3700 cursor->addrl = addr;
3701 ppc440spe_rxor_set_region(desc,
3702 cursor->addr_count,
3703 DMA_RXOR12 << DMA_CUED_REGION_OFF);
3704 ppc440spe_adma_dma2rxor_inc_addr(
3705 desc, cursor, index, src_cnt);
3706 }
3707 break;
3708 case 2:
3709 cursor->state = 0;
3710 cursor->addrl = addr;
3711 cursor->xor_count++;
3712 if (index) {
3713 ppc440spe_adma_dma2rxor_inc_addr(
3714 desc, cursor, index, src_cnt);
3715 }
3716 break;
3717 }
3718
3719 return rval;
3720}
3721
3722/**
3723 * ppc440spe_adma_dma2rxor_set_src - set RXOR source address; it's assumed that
3724 * ppc440spe_adma_dma2rxor_prep_src() has already done prior this call
3725 */
3726static void ppc440spe_adma_dma2rxor_set_src(
3727 struct ppc440spe_adma_desc_slot *desc,
3728 int index, dma_addr_t addr)
3729{
3730 struct xor_cb *xcb = desc->hw_desc;
3731 int k = 0, op = 0, lop = 0;
3732
3733 /* get the RXOR operand which corresponds to index addr */
3734 while (op <= index) {
3735 lop = op;
3736 if (k == XOR_MAX_OPS) {
3737 k = 0;
3738 desc = list_entry(desc->chain_node.next,
3739 struct ppc440spe_adma_desc_slot, chain_node);
3740 xcb = desc->hw_desc;
3741
3742 }
3743 if ((xcb->ops[k++].h & (DMA_RXOR12 << DMA_CUED_REGION_OFF)) ==
3744 (DMA_RXOR12 << DMA_CUED_REGION_OFF))
3745 op += 2;
3746 else
3747 op += 3;
3748 }
3749
3750 BUG_ON(k < 1);
3751
3752 if (test_bit(k-1, desc->reverse_flags)) {
3753 /* reverse operand order; put last op in RXOR group */
3754 if (index == op - 1)
3755 ppc440spe_rxor_set_src(desc, k - 1, addr);
3756 } else {
3757 /* direct operand order; put first op in RXOR group */
3758 if (index == lop)
3759 ppc440spe_rxor_set_src(desc, k - 1, addr);
3760 }
3761}
3762
3763/**
3764 * ppc440spe_adma_dma2rxor_set_mult - set RXOR multipliers; it's assumed that
3765 * ppc440spe_adma_dma2rxor_prep_src() has already done prior this call
3766 */
3767static void ppc440spe_adma_dma2rxor_set_mult(
3768 struct ppc440spe_adma_desc_slot *desc,
3769 int index, u8 mult)
3770{
3771 struct xor_cb *xcb = desc->hw_desc;
3772 int k = 0, op = 0, lop = 0;
3773
3774 /* get the RXOR operand which corresponds to index mult */
3775 while (op <= index) {
3776 lop = op;
3777 if (k == XOR_MAX_OPS) {
3778 k = 0;
3779 desc = list_entry(desc->chain_node.next,
3780 struct ppc440spe_adma_desc_slot,
3781 chain_node);
3782 xcb = desc->hw_desc;
3783
3784 }
3785 if ((xcb->ops[k++].h & (DMA_RXOR12 << DMA_CUED_REGION_OFF)) ==
3786 (DMA_RXOR12 << DMA_CUED_REGION_OFF))
3787 op += 2;
3788 else
3789 op += 3;
3790 }
3791
3792 BUG_ON(k < 1);
3793 if (test_bit(k-1, desc->reverse_flags)) {
3794 /* reverse order */
3795 ppc440spe_rxor_set_mult(desc, k - 1, op - index - 1, mult);
3796 } else {
3797 /* direct order */
3798 ppc440spe_rxor_set_mult(desc, k - 1, index - lop, mult);
3799 }
3800}
3801
3802/**
3803 * ppc440spe_init_rxor_cursor -
3804 */
3805static void ppc440spe_init_rxor_cursor(struct ppc440spe_rxor *cursor)
3806{
3807 memset(cursor, 0, sizeof(struct ppc440spe_rxor));
3808 cursor->state = 2;
3809}
3810
3811/**
3812 * ppc440spe_adma_pq_set_src_mult - set multiplication coefficient into
3813 * descriptor for the PQXOR operation
3814 */
3815static void ppc440spe_adma_pq_set_src_mult(
3816 struct ppc440spe_adma_desc_slot *sw_desc,
3817 unsigned char mult, int index, int dst_pos)
3818{
3819 struct ppc440spe_adma_chan *chan;
3820 u32 mult_idx, mult_dst;
3821 struct ppc440spe_adma_desc_slot *iter = NULL, *iter1 = NULL;
3822
3823 chan = to_ppc440spe_adma_chan(sw_desc->async_tx.chan);
3824
3825 switch (chan->device->id) {
3826 case PPC440SPE_DMA0_ID:
3827 case PPC440SPE_DMA1_ID:
3828 if (test_bit(PPC440SPE_DESC_RXOR, &sw_desc->flags)) {
3829 int region = test_bit(PPC440SPE_DESC_RXOR12,
3830 &sw_desc->flags) ? 2 : 3;
3831
3832 if (index < region) {
3833 /* RXOR multipliers */
3834 iter = ppc440spe_get_group_entry(sw_desc,
3835 sw_desc->dst_cnt - 1);
3836 if (sw_desc->dst_cnt == 2)
3837 iter1 = ppc440spe_get_group_entry(
3838 sw_desc, 0);
3839
3840 mult_idx = DMA_CUED_MULT1_OFF + (index << 3);
3841 mult_dst = DMA_CDB_SG_SRC;
3842 } else {
3843 /* WXOR multiplier */
3844 iter = ppc440spe_get_group_entry(sw_desc,
3845 index - region +
3846 sw_desc->dst_cnt);
3847 mult_idx = DMA_CUED_MULT1_OFF;
3848 mult_dst = dst_pos ? DMA_CDB_SG_DST2 :
3849 DMA_CDB_SG_DST1;
3850 }
3851 } else {
3852 int znum = 0;
3853
3854 /* WXOR-only;
3855 * skip first slots with destinations (if ZERO_DST has
3856 * place)
3857 */
3858 if (test_bit(PPC440SPE_ZERO_P, &sw_desc->flags))
3859 znum++;
3860 if (test_bit(PPC440SPE_ZERO_Q, &sw_desc->flags))
3861 znum++;
3862
3863 iter = ppc440spe_get_group_entry(sw_desc, index + znum);
3864 mult_idx = DMA_CUED_MULT1_OFF;
3865 mult_dst = dst_pos ? DMA_CDB_SG_DST2 : DMA_CDB_SG_DST1;
3866 }
3867
3868 if (likely(iter)) {
3869 ppc440spe_desc_set_src_mult(iter, chan,
3870 mult_idx, mult_dst, mult);
3871
3872 if (unlikely(iter1)) {
3873 /* if we have two destinations for RXOR, then
3874 * we've just set Q mult. Set-up P now.
3875 */
3876 ppc440spe_desc_set_src_mult(iter1, chan,
3877 mult_idx, mult_dst, 1);
3878 }
3879
3880 }
3881 break;
3882
3883 case PPC440SPE_XOR_ID:
3884 iter = sw_desc->group_head;
3885 if (sw_desc->dst_cnt == 2) {
3886 /* both P & Q calculations required; set P mult here */
3887 ppc440spe_adma_dma2rxor_set_mult(iter, index, 1);
3888
3889 /* and then set Q mult */
3890 iter = ppc440spe_get_group_entry(sw_desc,
3891 sw_desc->descs_per_op);
3892 }
3893 ppc440spe_adma_dma2rxor_set_mult(iter, index, mult);
3894 break;
3895 }
3896}
3897
3898/**
3899 * ppc440spe_adma_free_chan_resources - free the resources allocated
3900 */
3901static void ppc440spe_adma_free_chan_resources(struct dma_chan *chan)
3902{
3903 struct ppc440spe_adma_chan *ppc440spe_chan;
3904 struct ppc440spe_adma_desc_slot *iter, *_iter;
3905 int in_use_descs = 0;
3906
3907 ppc440spe_chan = to_ppc440spe_adma_chan(chan);
3908 ppc440spe_adma_slot_cleanup(ppc440spe_chan);
3909
3910 spin_lock_bh(&ppc440spe_chan->lock);
3911 list_for_each_entry_safe(iter, _iter, &ppc440spe_chan->chain,
3912 chain_node) {
3913 in_use_descs++;
3914 list_del(&iter->chain_node);
3915 }
3916 list_for_each_entry_safe_reverse(iter, _iter,
3917 &ppc440spe_chan->all_slots, slot_node) {
3918 list_del(&iter->slot_node);
3919 kfree(iter);
3920 ppc440spe_chan->slots_allocated--;
3921 }
3922 ppc440spe_chan->last_used = NULL;
3923
3924 dev_dbg(ppc440spe_chan->device->common.dev,
3925 "ppc440spe adma%d %s slots_allocated %d\n",
3926 ppc440spe_chan->device->id,
3927 __func__, ppc440spe_chan->slots_allocated);
3928 spin_unlock_bh(&ppc440spe_chan->lock);
3929
3930 /* one is ok since we left it on there on purpose */
3931 if (in_use_descs > 1)
3932 printk(KERN_ERR "SPE: Freeing %d in use descriptors!\n",
3933 in_use_descs - 1);
3934}
3935
3936/**
3937 * ppc440spe_adma_is_complete - poll the status of an ADMA transaction
3938 * @chan: ADMA channel handle
3939 * @cookie: ADMA transaction identifier
3940 */
3941static enum dma_status ppc440spe_adma_is_complete(struct dma_chan *chan,
3942 dma_cookie_t cookie, dma_cookie_t *done, dma_cookie_t *used)
3943{
3944 struct ppc440spe_adma_chan *ppc440spe_chan;
3945 dma_cookie_t last_used;
3946 dma_cookie_t last_complete;
3947 enum dma_status ret;
3948
3949 ppc440spe_chan = to_ppc440spe_adma_chan(chan);
3950 last_used = chan->cookie;
3951 last_complete = ppc440spe_chan->completed_cookie;
3952
3953 if (done)
3954 *done = last_complete;
3955 if (used)
3956 *used = last_used;
3957
3958 ret = dma_async_is_complete(cookie, last_complete, last_used);
3959 if (ret == DMA_SUCCESS)
3960 return ret;
3961
3962 ppc440spe_adma_slot_cleanup(ppc440spe_chan);
3963
3964 last_used = chan->cookie;
3965 last_complete = ppc440spe_chan->completed_cookie;
3966
3967 if (done)
3968 *done = last_complete;
3969 if (used)
3970 *used = last_used;
3971
3972 return dma_async_is_complete(cookie, last_complete, last_used);
3973}
3974
3975/**
3976 * ppc440spe_adma_eot_handler - end of transfer interrupt handler
3977 */
3978static irqreturn_t ppc440spe_adma_eot_handler(int irq, void *data)
3979{
3980 struct ppc440spe_adma_chan *chan = data;
3981
3982 dev_dbg(chan->device->common.dev,
3983 "ppc440spe adma%d: %s\n", chan->device->id, __func__);
3984
3985 tasklet_schedule(&chan->irq_tasklet);
3986 ppc440spe_adma_device_clear_eot_status(chan);
3987
3988 return IRQ_HANDLED;
3989}
3990
3991/**
3992 * ppc440spe_adma_err_handler - DMA error interrupt handler;
3993 * do the same things as a eot handler
3994 */
3995static irqreturn_t ppc440spe_adma_err_handler(int irq, void *data)
3996{
3997 struct ppc440spe_adma_chan *chan = data;
3998
3999 dev_dbg(chan->device->common.dev,
4000 "ppc440spe adma%d: %s\n", chan->device->id, __func__);
4001
4002 tasklet_schedule(&chan->irq_tasklet);
4003 ppc440spe_adma_device_clear_eot_status(chan);
4004
4005 return IRQ_HANDLED;
4006}
4007
4008/**
4009 * ppc440spe_test_callback - called when test operation has been done
4010 */
4011static void ppc440spe_test_callback(void *unused)
4012{
4013 complete(&ppc440spe_r6_test_comp);
4014}
4015
4016/**
4017 * ppc440spe_adma_issue_pending - flush all pending descriptors to h/w
4018 */
4019static void ppc440spe_adma_issue_pending(struct dma_chan *chan)
4020{
4021 struct ppc440spe_adma_chan *ppc440spe_chan;
4022
4023 ppc440spe_chan = to_ppc440spe_adma_chan(chan);
4024 dev_dbg(ppc440spe_chan->device->common.dev,
4025 "ppc440spe adma%d: %s %d \n", ppc440spe_chan->device->id,
4026 __func__, ppc440spe_chan->pending);
4027
4028 if (ppc440spe_chan->pending) {
4029 ppc440spe_chan->pending = 0;
4030 ppc440spe_chan_append(ppc440spe_chan);
4031 }
4032}
4033
4034/**
4035 * ppc440spe_chan_start_null_xor - initiate the first XOR operation (DMA engines
4036 * use FIFOs (as opposite to chains used in XOR) so this is a XOR
4037 * specific operation)
4038 */
4039static void ppc440spe_chan_start_null_xor(struct ppc440spe_adma_chan *chan)
4040{
4041 struct ppc440spe_adma_desc_slot *sw_desc, *group_start;
4042 dma_cookie_t cookie;
4043 int slot_cnt, slots_per_op;
4044
4045 dev_dbg(chan->device->common.dev,
4046 "ppc440spe adma%d: %s\n", chan->device->id, __func__);
4047
4048 spin_lock_bh(&chan->lock);
4049 slot_cnt = ppc440spe_chan_xor_slot_count(0, 2, &slots_per_op);
4050 sw_desc = ppc440spe_adma_alloc_slots(chan, slot_cnt, slots_per_op);
4051 if (sw_desc) {
4052 group_start = sw_desc->group_head;
4053 list_splice_init(&sw_desc->group_list, &chan->chain);
4054 async_tx_ack(&sw_desc->async_tx);
4055 ppc440spe_desc_init_null_xor(group_start);
4056
4057 cookie = chan->common.cookie;
4058 cookie++;
4059 if (cookie <= 1)
4060 cookie = 2;
4061
4062 /* initialize the completed cookie to be less than
4063 * the most recently used cookie
4064 */
4065 chan->completed_cookie = cookie - 1;
4066 chan->common.cookie = sw_desc->async_tx.cookie = cookie;
4067
4068 /* channel should not be busy */
4069 BUG_ON(ppc440spe_chan_is_busy(chan));
4070
4071 /* set the descriptor address */
4072 ppc440spe_chan_set_first_xor_descriptor(chan, sw_desc);
4073
4074 /* run the descriptor */
4075 ppc440spe_chan_run(chan);
4076 } else
4077 printk(KERN_ERR "ppc440spe adma%d"
4078 " failed to allocate null descriptor\n",
4079 chan->device->id);
4080 spin_unlock_bh(&chan->lock);
4081}
4082
4083/**
4084 * ppc440spe_test_raid6 - test are RAID-6 capabilities enabled successfully.
4085 * For this we just perform one WXOR operation with the same source
4086 * and destination addresses, the GF-multiplier is 1; so if RAID-6
4087 * capabilities are enabled then we'll get src/dst filled with zero.
4088 */
4089static int ppc440spe_test_raid6(struct ppc440spe_adma_chan *chan)
4090{
4091 struct ppc440spe_adma_desc_slot *sw_desc, *iter;
4092 struct page *pg;
4093 char *a;
4094 dma_addr_t dma_addr, addrs[2];
4095 unsigned long op = 0;
4096 int rval = 0;
4097
4098 set_bit(PPC440SPE_DESC_WXOR, &op);
4099
4100 pg = alloc_page(GFP_KERNEL);
4101 if (!pg)
4102 return -ENOMEM;
4103
4104 spin_lock_bh(&chan->lock);
4105 sw_desc = ppc440spe_adma_alloc_slots(chan, 1, 1);
4106 if (sw_desc) {
4107 /* 1 src, 1 dsr, int_ena, WXOR */
4108 ppc440spe_desc_init_dma01pq(sw_desc, 1, 1, 1, op);
4109 list_for_each_entry(iter, &sw_desc->group_list, chain_node) {
4110 ppc440spe_desc_set_byte_count(iter, chan, PAGE_SIZE);
4111 iter->unmap_len = PAGE_SIZE;
4112 }
4113 } else {
4114 rval = -EFAULT;
4115 spin_unlock_bh(&chan->lock);
4116 goto exit;
4117 }
4118 spin_unlock_bh(&chan->lock);
4119
4120 /* Fill the test page with ones */
4121 memset(page_address(pg), 0xFF, PAGE_SIZE);
4122 dma_addr = dma_map_page(chan->device->dev, pg, 0,
4123 PAGE_SIZE, DMA_BIDIRECTIONAL);
4124
4125 /* Setup addresses */
4126 ppc440spe_adma_pq_set_src(sw_desc, dma_addr, 0);
4127 ppc440spe_adma_pq_set_src_mult(sw_desc, 1, 0, 0);
4128 addrs[0] = dma_addr;
4129 addrs[1] = 0;
4130 ppc440spe_adma_pq_set_dest(sw_desc, addrs, DMA_PREP_PQ_DISABLE_Q);
4131
4132 async_tx_ack(&sw_desc->async_tx);
4133 sw_desc->async_tx.callback = ppc440spe_test_callback;
4134 sw_desc->async_tx.callback_param = NULL;
4135
4136 init_completion(&ppc440spe_r6_test_comp);
4137
4138 ppc440spe_adma_tx_submit(&sw_desc->async_tx);
4139 ppc440spe_adma_issue_pending(&chan->common);
4140
4141 wait_for_completion(&ppc440spe_r6_test_comp);
4142
4143 /* Now check if the test page is zeroed */
4144 a = page_address(pg);
4145 if ((*(u32 *)a) == 0 && memcmp(a, a+4, PAGE_SIZE-4) == 0) {
4146 /* page is zero - RAID-6 enabled */
4147 rval = 0;
4148 } else {
4149 /* RAID-6 was not enabled */
4150 rval = -EINVAL;
4151 }
4152exit:
4153 __free_page(pg);
4154 return rval;
4155}
4156
4157static void ppc440spe_adma_init_capabilities(struct ppc440spe_adma_device *adev)
4158{
4159 switch (adev->id) {
4160 case PPC440SPE_DMA0_ID:
4161 case PPC440SPE_DMA1_ID:
4162 dma_cap_set(DMA_MEMCPY, adev->common.cap_mask);
4163 dma_cap_set(DMA_INTERRUPT, adev->common.cap_mask);
4164 dma_cap_set(DMA_MEMSET, adev->common.cap_mask);
4165 dma_cap_set(DMA_PQ, adev->common.cap_mask);
4166 dma_cap_set(DMA_PQ_VAL, adev->common.cap_mask);
4167 dma_cap_set(DMA_XOR_VAL, adev->common.cap_mask);
4168 break;
4169 case PPC440SPE_XOR_ID:
4170 dma_cap_set(DMA_XOR, adev->common.cap_mask);
4171 dma_cap_set(DMA_PQ, adev->common.cap_mask);
4172 dma_cap_set(DMA_INTERRUPT, adev->common.cap_mask);
4173 adev->common.cap_mask = adev->common.cap_mask;
4174 break;
4175 }
4176
4177 /* Set base routines */
4178 adev->common.device_alloc_chan_resources =
4179 ppc440spe_adma_alloc_chan_resources;
4180 adev->common.device_free_chan_resources =
4181 ppc440spe_adma_free_chan_resources;
4182 adev->common.device_is_tx_complete = ppc440spe_adma_is_complete;
4183 adev->common.device_issue_pending = ppc440spe_adma_issue_pending;
4184
4185 /* Set prep routines based on capability */
4186 if (dma_has_cap(DMA_MEMCPY, adev->common.cap_mask)) {
4187 adev->common.device_prep_dma_memcpy =
4188 ppc440spe_adma_prep_dma_memcpy;
4189 }
4190 if (dma_has_cap(DMA_MEMSET, adev->common.cap_mask)) {
4191 adev->common.device_prep_dma_memset =
4192 ppc440spe_adma_prep_dma_memset;
4193 }
4194 if (dma_has_cap(DMA_XOR, adev->common.cap_mask)) {
4195 adev->common.max_xor = XOR_MAX_OPS;
4196 adev->common.device_prep_dma_xor =
4197 ppc440spe_adma_prep_dma_xor;
4198 }
4199 if (dma_has_cap(DMA_PQ, adev->common.cap_mask)) {
4200 switch (adev->id) {
4201 case PPC440SPE_DMA0_ID:
4202 dma_set_maxpq(&adev->common,
4203 DMA0_FIFO_SIZE / sizeof(struct dma_cdb), 0);
4204 break;
4205 case PPC440SPE_DMA1_ID:
4206 dma_set_maxpq(&adev->common,
4207 DMA1_FIFO_SIZE / sizeof(struct dma_cdb), 0);
4208 break;
4209 case PPC440SPE_XOR_ID:
4210 adev->common.max_pq = XOR_MAX_OPS * 3;
4211 break;
4212 }
4213 adev->common.device_prep_dma_pq =
4214 ppc440spe_adma_prep_dma_pq;
4215 }
4216 if (dma_has_cap(DMA_PQ_VAL, adev->common.cap_mask)) {
4217 switch (adev->id) {
4218 case PPC440SPE_DMA0_ID:
4219 adev->common.max_pq = DMA0_FIFO_SIZE /
4220 sizeof(struct dma_cdb);
4221 break;
4222 case PPC440SPE_DMA1_ID:
4223 adev->common.max_pq = DMA1_FIFO_SIZE /
4224 sizeof(struct dma_cdb);
4225 break;
4226 }
4227 adev->common.device_prep_dma_pq_val =
4228 ppc440spe_adma_prep_dma_pqzero_sum;
4229 }
4230 if (dma_has_cap(DMA_XOR_VAL, adev->common.cap_mask)) {
4231 switch (adev->id) {
4232 case PPC440SPE_DMA0_ID:
4233 adev->common.max_xor = DMA0_FIFO_SIZE /
4234 sizeof(struct dma_cdb);
4235 break;
4236 case PPC440SPE_DMA1_ID:
4237 adev->common.max_xor = DMA1_FIFO_SIZE /
4238 sizeof(struct dma_cdb);
4239 break;
4240 }
4241 adev->common.device_prep_dma_xor_val =
4242 ppc440spe_adma_prep_dma_xor_zero_sum;
4243 }
4244 if (dma_has_cap(DMA_INTERRUPT, adev->common.cap_mask)) {
4245 adev->common.device_prep_dma_interrupt =
4246 ppc440spe_adma_prep_dma_interrupt;
4247 }
4248 pr_info("%s: AMCC(R) PPC440SP(E) ADMA Engine: "
4249 "( %s%s%s%s%s%s%s)\n",
4250 dev_name(adev->dev),
4251 dma_has_cap(DMA_PQ, adev->common.cap_mask) ? "pq " : "",
4252 dma_has_cap(DMA_PQ_VAL, adev->common.cap_mask) ? "pq_val " : "",
4253 dma_has_cap(DMA_XOR, adev->common.cap_mask) ? "xor " : "",
4254 dma_has_cap(DMA_XOR_VAL, adev->common.cap_mask) ? "xor_val " : "",
4255 dma_has_cap(DMA_MEMCPY, adev->common.cap_mask) ? "memcpy " : "",
4256 dma_has_cap(DMA_MEMSET, adev->common.cap_mask) ? "memset " : "",
4257 dma_has_cap(DMA_INTERRUPT, adev->common.cap_mask) ? "intr " : "");
4258}
4259
4260static int ppc440spe_adma_setup_irqs(struct ppc440spe_adma_device *adev,
4261 struct ppc440spe_adma_chan *chan,
4262 int *initcode)
4263{
4264 struct device_node *np;
4265 int ret;
4266
4267 np = container_of(adev->dev, struct of_device, dev)->node;
4268 if (adev->id != PPC440SPE_XOR_ID) {
4269 adev->err_irq = irq_of_parse_and_map(np, 1);
4270 if (adev->err_irq == NO_IRQ) {
4271 dev_warn(adev->dev, "no err irq resource?\n");
4272 *initcode = PPC_ADMA_INIT_IRQ2;
4273 adev->err_irq = -ENXIO;
4274 } else
4275 atomic_inc(&ppc440spe_adma_err_irq_ref);
4276 } else {
4277 adev->err_irq = -ENXIO;
4278 }
4279
4280 adev->irq = irq_of_parse_and_map(np, 0);
4281 if (adev->irq == NO_IRQ) {
4282 dev_err(adev->dev, "no irq resource\n");
4283 *initcode = PPC_ADMA_INIT_IRQ1;
4284 ret = -ENXIO;
4285 goto err_irq_map;
4286 }
4287 dev_dbg(adev->dev, "irq %d, err irq %d\n",
4288 adev->irq, adev->err_irq);
4289
4290 ret = request_irq(adev->irq, ppc440spe_adma_eot_handler,
4291 0, dev_driver_string(adev->dev), chan);
4292 if (ret) {
4293 dev_err(adev->dev, "can't request irq %d\n",
4294 adev->irq);
4295 *initcode = PPC_ADMA_INIT_IRQ1;
4296 ret = -EIO;
4297 goto err_req1;
4298 }
4299
4300 /* only DMA engines have a separate error IRQ
4301 * so it's Ok if err_irq < 0 in XOR engine case.
4302 */
4303 if (adev->err_irq > 0) {
4304 /* both DMA engines share common error IRQ */
4305 ret = request_irq(adev->err_irq,
4306 ppc440spe_adma_err_handler,
4307 IRQF_SHARED,
4308 dev_driver_string(adev->dev),
4309 chan);
4310 if (ret) {
4311 dev_err(adev->dev, "can't request irq %d\n",
4312 adev->err_irq);
4313 *initcode = PPC_ADMA_INIT_IRQ2;
4314 ret = -EIO;
4315 goto err_req2;
4316 }
4317 }
4318
4319 if (adev->id == PPC440SPE_XOR_ID) {
4320 /* enable XOR engine interrupts */
4321 iowrite32be(XOR_IE_CBCIE_BIT | XOR_IE_ICBIE_BIT |
4322 XOR_IE_ICIE_BIT | XOR_IE_RPTIE_BIT,
4323 &adev->xor_reg->ier);
4324 } else {
4325 u32 mask, enable;
4326
4327 np = of_find_compatible_node(NULL, NULL, "ibm,i2o-440spe");
4328 if (!np) {
4329 pr_err("%s: can't find I2O device tree node\n",
4330 __func__);
4331 ret = -ENODEV;
4332 goto err_req2;
4333 }
4334 adev->i2o_reg = of_iomap(np, 0);
4335 if (!adev->i2o_reg) {
4336 pr_err("%s: failed to map I2O registers\n", __func__);
4337 of_node_put(np);
4338 ret = -EINVAL;
4339 goto err_req2;
4340 }
4341 of_node_put(np);
4342 /* Unmask 'CS FIFO Attention' interrupts and
4343 * enable generating interrupts on errors
4344 */
4345 enable = (adev->id == PPC440SPE_DMA0_ID) ?
4346 ~(I2O_IOPIM_P0SNE | I2O_IOPIM_P0EM) :
4347 ~(I2O_IOPIM_P1SNE | I2O_IOPIM_P1EM);
4348 mask = ioread32(&adev->i2o_reg->iopim) & enable;
4349 iowrite32(mask, &adev->i2o_reg->iopim);
4350 }
4351 return 0;
4352
4353err_req2:
4354 free_irq(adev->irq, chan);
4355err_req1:
4356 irq_dispose_mapping(adev->irq);
4357err_irq_map:
4358 if (adev->err_irq > 0) {
4359 if (atomic_dec_and_test(&ppc440spe_adma_err_irq_ref))
4360 irq_dispose_mapping(adev->err_irq);
4361 }
4362 return ret;
4363}
4364
4365static void ppc440spe_adma_release_irqs(struct ppc440spe_adma_device *adev,
4366 struct ppc440spe_adma_chan *chan)
4367{
4368 u32 mask, disable;
4369
4370 if (adev->id == PPC440SPE_XOR_ID) {
4371 /* disable XOR engine interrupts */
4372 mask = ioread32be(&adev->xor_reg->ier);
4373 mask &= ~(XOR_IE_CBCIE_BIT | XOR_IE_ICBIE_BIT |
4374 XOR_IE_ICIE_BIT | XOR_IE_RPTIE_BIT);
4375 iowrite32be(mask, &adev->xor_reg->ier);
4376 } else {
4377 /* disable DMAx engine interrupts */
4378 disable = (adev->id == PPC440SPE_DMA0_ID) ?
4379 (I2O_IOPIM_P0SNE | I2O_IOPIM_P0EM) :
4380 (I2O_IOPIM_P1SNE | I2O_IOPIM_P1EM);
4381 mask = ioread32(&adev->i2o_reg->iopim) | disable;
4382 iowrite32(mask, &adev->i2o_reg->iopim);
4383 }
4384 free_irq(adev->irq, chan);
4385 irq_dispose_mapping(adev->irq);
4386 if (adev->err_irq > 0) {
4387 free_irq(adev->err_irq, chan);
4388 if (atomic_dec_and_test(&ppc440spe_adma_err_irq_ref)) {
4389 irq_dispose_mapping(adev->err_irq);
4390 iounmap(adev->i2o_reg);
4391 }
4392 }
4393}
4394
4395/**
4396 * ppc440spe_adma_probe - probe the asynch device
4397 */
4398static int __devinit ppc440spe_adma_probe(struct of_device *ofdev,
4399 const struct of_device_id *match)
4400{
4401 struct device_node *np = ofdev->node;
4402 struct resource res;
4403 struct ppc440spe_adma_device *adev;
4404 struct ppc440spe_adma_chan *chan;
4405 struct ppc_dma_chan_ref *ref, *_ref;
4406 int ret = 0, initcode = PPC_ADMA_INIT_OK;
4407 const u32 *idx;
4408 int len;
4409 void *regs;
4410 u32 id, pool_size;
4411
4412 if (of_device_is_compatible(np, "amcc,xor-accelerator")) {
4413 id = PPC440SPE_XOR_ID;
4414 /* As far as the XOR engine is concerned, it does not
4415 * use FIFOs but uses linked list. So there is no dependency
4416 * between pool size to allocate and the engine configuration.
4417 */
4418 pool_size = PAGE_SIZE << 1;
4419 } else {
4420 /* it is DMA0 or DMA1 */
4421 idx = of_get_property(np, "cell-index", &len);
4422 if (!idx || (len != sizeof(u32))) {
4423 dev_err(&ofdev->dev, "Device node %s has missing "
4424 "or invalid cell-index property\n",
4425 np->full_name);
4426 return -EINVAL;
4427 }
4428 id = *idx;
4429 /* DMA0,1 engines use FIFO to maintain CDBs, so we
4430 * should allocate the pool accordingly to size of this
4431 * FIFO. Thus, the pool size depends on the FIFO depth:
4432 * how much CDBs pointers the FIFO may contain then so
4433 * much CDBs we should provide in the pool.
4434 * That is
4435 * CDB size = 32B;
4436 * CDBs number = (DMA0_FIFO_SIZE >> 3);
4437 * Pool size = CDBs number * CDB size =
4438 * = (DMA0_FIFO_SIZE >> 3) << 5 = DMA0_FIFO_SIZE << 2.
4439 */
4440 pool_size = (id == PPC440SPE_DMA0_ID) ?
4441 DMA0_FIFO_SIZE : DMA1_FIFO_SIZE;
4442 pool_size <<= 2;
4443 }
4444
4445 if (of_address_to_resource(np, 0, &res)) {
4446 dev_err(&ofdev->dev, "failed to get memory resource\n");
4447 initcode = PPC_ADMA_INIT_MEMRES;
4448 ret = -ENODEV;
4449 goto out;
4450 }
4451
4452 if (!request_mem_region(res.start, resource_size(&res),
4453 dev_driver_string(&ofdev->dev))) {
4454 dev_err(&ofdev->dev, "failed to request memory region "
4455 "(0x%016llx-0x%016llx)\n",
4456 (u64)res.start, (u64)res.end);
4457 initcode = PPC_ADMA_INIT_MEMREG;
4458 ret = -EBUSY;
4459 goto out;
4460 }
4461
4462 /* create a device */
4463 adev = kzalloc(sizeof(*adev), GFP_KERNEL);
4464 if (!adev) {
4465 dev_err(&ofdev->dev, "failed to allocate device\n");
4466 initcode = PPC_ADMA_INIT_ALLOC;
4467 ret = -ENOMEM;
4468 goto err_adev_alloc;
4469 }
4470
4471 adev->id = id;
4472 adev->pool_size = pool_size;
4473 /* allocate coherent memory for hardware descriptors */
4474 adev->dma_desc_pool_virt = dma_alloc_coherent(&ofdev->dev,
4475 adev->pool_size, &adev->dma_desc_pool,
4476 GFP_KERNEL);
4477 if (adev->dma_desc_pool_virt == NULL) {
4478 dev_err(&ofdev->dev, "failed to allocate %d bytes of coherent "
4479 "memory for hardware descriptors\n",
4480 adev->pool_size);
4481 initcode = PPC_ADMA_INIT_COHERENT;
4482 ret = -ENOMEM;
4483 goto err_dma_alloc;
4484 }
4485 dev_dbg(&ofdev->dev, "allocted descriptor pool virt 0x%p phys 0x%llx\n",
4486 adev->dma_desc_pool_virt, (u64)adev->dma_desc_pool);
4487
4488 regs = ioremap(res.start, resource_size(&res));
4489 if (!regs) {
4490 dev_err(&ofdev->dev, "failed to ioremap regs!\n");
4491 goto err_regs_alloc;
4492 }
4493
4494 if (adev->id == PPC440SPE_XOR_ID) {
4495 adev->xor_reg = regs;
4496 /* Reset XOR */
4497 iowrite32be(XOR_CRSR_XASR_BIT, &adev->xor_reg->crsr);
4498 iowrite32be(XOR_CRSR_64BA_BIT, &adev->xor_reg->crrr);
4499 } else {
4500 size_t fifo_size = (adev->id == PPC440SPE_DMA0_ID) ?
4501 DMA0_FIFO_SIZE : DMA1_FIFO_SIZE;
4502 adev->dma_reg = regs;
4503 /* DMAx_FIFO_SIZE is defined in bytes,
4504 * <fsiz> - is defined in number of CDB pointers (8byte).
4505 * DMA FIFO Length = CSlength + CPlength, where
4506 * CSlength = CPlength = (fsiz + 1) * 8.
4507 */
4508 iowrite32(DMA_FIFO_ENABLE | ((fifo_size >> 3) - 2),
4509 &adev->dma_reg->fsiz);
4510 /* Configure DMA engine */
4511 iowrite32(DMA_CFG_DXEPR_HP | DMA_CFG_DFMPP_HP | DMA_CFG_FALGN,
4512 &adev->dma_reg->cfg);
4513 /* Clear Status */
4514 iowrite32(~0, &adev->dma_reg->dsts);
4515 }
4516
4517 adev->dev = &ofdev->dev;
4518 adev->common.dev = &ofdev->dev;
4519 INIT_LIST_HEAD(&adev->common.channels);
4520 dev_set_drvdata(&ofdev->dev, adev);
4521
4522 /* create a channel */
4523 chan = kzalloc(sizeof(*chan), GFP_KERNEL);
4524 if (!chan) {
4525 dev_err(&ofdev->dev, "can't allocate channel structure\n");
4526 initcode = PPC_ADMA_INIT_CHANNEL;
4527 ret = -ENOMEM;
4528 goto err_chan_alloc;
4529 }
4530
4531 spin_lock_init(&chan->lock);
4532 INIT_LIST_HEAD(&chan->chain);
4533 INIT_LIST_HEAD(&chan->all_slots);
4534 chan->device = adev;
4535 chan->common.device = &adev->common;
4536 list_add_tail(&chan->common.device_node, &adev->common.channels);
4537 tasklet_init(&chan->irq_tasklet, ppc440spe_adma_tasklet,
4538 (unsigned long)chan);
4539
4540 /* allocate and map helper pages for async validation or
4541 * async_mult/async_sum_product operations on DMA0/1.
4542 */
4543 if (adev->id != PPC440SPE_XOR_ID) {
4544 chan->pdest_page = alloc_page(GFP_KERNEL);
4545 chan->qdest_page = alloc_page(GFP_KERNEL);
4546 if (!chan->pdest_page ||
4547 !chan->qdest_page) {
4548 if (chan->pdest_page)
4549 __free_page(chan->pdest_page);
4550 if (chan->qdest_page)
4551 __free_page(chan->qdest_page);
4552 ret = -ENOMEM;
4553 goto err_page_alloc;
4554 }
4555 chan->pdest = dma_map_page(&ofdev->dev, chan->pdest_page, 0,
4556 PAGE_SIZE, DMA_BIDIRECTIONAL);
4557 chan->qdest = dma_map_page(&ofdev->dev, chan->qdest_page, 0,
4558 PAGE_SIZE, DMA_BIDIRECTIONAL);
4559 }
4560
4561 ref = kmalloc(sizeof(*ref), GFP_KERNEL);
4562 if (ref) {
4563 ref->chan = &chan->common;
4564 INIT_LIST_HEAD(&ref->node);
4565 list_add_tail(&ref->node, &ppc440spe_adma_chan_list);
4566 } else {
4567 dev_err(&ofdev->dev, "failed to allocate channel reference!\n");
4568 ret = -ENOMEM;
4569 goto err_ref_alloc;
4570 }
4571
4572 ret = ppc440spe_adma_setup_irqs(adev, chan, &initcode);
4573 if (ret)
4574 goto err_irq;
4575
4576 ppc440spe_adma_init_capabilities(adev);
4577
4578 ret = dma_async_device_register(&adev->common);
4579 if (ret) {
4580 initcode = PPC_ADMA_INIT_REGISTER;
4581 dev_err(&ofdev->dev, "failed to register dma device\n");
4582 goto err_dev_reg;
4583 }
4584
4585 goto out;
4586
4587err_dev_reg:
4588 ppc440spe_adma_release_irqs(adev, chan);
4589err_irq:
4590 list_for_each_entry_safe(ref, _ref, &ppc440spe_adma_chan_list, node) {
4591 if (chan == to_ppc440spe_adma_chan(ref->chan)) {
4592 list_del(&ref->node);
4593 kfree(ref);
4594 }
4595 }
4596err_ref_alloc:
4597 if (adev->id != PPC440SPE_XOR_ID) {
4598 dma_unmap_page(&ofdev->dev, chan->pdest,
4599 PAGE_SIZE, DMA_BIDIRECTIONAL);
4600 dma_unmap_page(&ofdev->dev, chan->qdest,
4601 PAGE_SIZE, DMA_BIDIRECTIONAL);
4602 __free_page(chan->pdest_page);
4603 __free_page(chan->qdest_page);
4604 }
4605err_page_alloc:
4606 kfree(chan);
4607err_chan_alloc:
4608 if (adev->id == PPC440SPE_XOR_ID)
4609 iounmap(adev->xor_reg);
4610 else
4611 iounmap(adev->dma_reg);
4612err_regs_alloc:
4613 dma_free_coherent(adev->dev, adev->pool_size,
4614 adev->dma_desc_pool_virt,
4615 adev->dma_desc_pool);
4616err_dma_alloc:
4617 kfree(adev);
4618err_adev_alloc:
4619 release_mem_region(res.start, resource_size(&res));
4620out:
4621 if (id < PPC440SPE_ADMA_ENGINES_NUM)
4622 ppc440spe_adma_devices[id] = initcode;
4623
4624 return ret;
4625}
4626
4627/**
4628 * ppc440spe_adma_remove - remove the asynch device
4629 */
4630static int __devexit ppc440spe_adma_remove(struct of_device *ofdev)
4631{
4632 struct ppc440spe_adma_device *adev = dev_get_drvdata(&ofdev->dev);
4633 struct device_node *np = ofdev->node;
4634 struct resource res;
4635 struct dma_chan *chan, *_chan;
4636 struct ppc_dma_chan_ref *ref, *_ref;
4637 struct ppc440spe_adma_chan *ppc440spe_chan;
4638
4639 dev_set_drvdata(&ofdev->dev, NULL);
4640 if (adev->id < PPC440SPE_ADMA_ENGINES_NUM)
4641 ppc440spe_adma_devices[adev->id] = -1;
4642
4643 dma_async_device_unregister(&adev->common);
4644
4645 list_for_each_entry_safe(chan, _chan, &adev->common.channels,
4646 device_node) {
4647 ppc440spe_chan = to_ppc440spe_adma_chan(chan);
4648 ppc440spe_adma_release_irqs(adev, ppc440spe_chan);
4649 tasklet_kill(&ppc440spe_chan->irq_tasklet);
4650 if (adev->id != PPC440SPE_XOR_ID) {
4651 dma_unmap_page(&ofdev->dev, ppc440spe_chan->pdest,
4652 PAGE_SIZE, DMA_BIDIRECTIONAL);
4653 dma_unmap_page(&ofdev->dev, ppc440spe_chan->qdest,
4654 PAGE_SIZE, DMA_BIDIRECTIONAL);
4655 __free_page(ppc440spe_chan->pdest_page);
4656 __free_page(ppc440spe_chan->qdest_page);
4657 }
4658 list_for_each_entry_safe(ref, _ref, &ppc440spe_adma_chan_list,
4659 node) {
4660 if (ppc440spe_chan ==
4661 to_ppc440spe_adma_chan(ref->chan)) {
4662 list_del(&ref->node);
4663 kfree(ref);
4664 }
4665 }
4666 list_del(&chan->device_node);
4667 kfree(ppc440spe_chan);
4668 }
4669
4670 dma_free_coherent(adev->dev, adev->pool_size,
4671 adev->dma_desc_pool_virt, adev->dma_desc_pool);
4672 if (adev->id == PPC440SPE_XOR_ID)
4673 iounmap(adev->xor_reg);
4674 else
4675 iounmap(adev->dma_reg);
4676 of_address_to_resource(np, 0, &res);
4677 release_mem_region(res.start, resource_size(&res));
4678 kfree(adev);
4679 return 0;
4680}
4681
4682/*
4683 * /sys driver interface to enable h/w RAID-6 capabilities
4684 * Files created in e.g. /sys/devices/plb.0/400100100.dma0/driver/
4685 * directory are "devices", "enable" and "poly".
4686 * "devices" shows available engines.
4687 * "enable" is used to enable RAID-6 capabilities or to check
4688 * whether these has been activated.
4689 * "poly" allows setting/checking used polynomial (for PPC440SPe only).
4690 */
4691
4692static ssize_t show_ppc440spe_devices(struct device_driver *dev, char *buf)
4693{
4694 ssize_t size = 0;
4695 int i;
4696
4697 for (i = 0; i < PPC440SPE_ADMA_ENGINES_NUM; i++) {
4698 if (ppc440spe_adma_devices[i] == -1)
4699 continue;
4700 size += snprintf(buf + size, PAGE_SIZE - size,
4701 "PPC440SP(E)-ADMA.%d: %s\n", i,
4702 ppc_adma_errors[ppc440spe_adma_devices[i]]);
4703 }
4704 return size;
4705}
4706
4707static ssize_t show_ppc440spe_r6enable(struct device_driver *dev, char *buf)
4708{
4709 return snprintf(buf, PAGE_SIZE,
4710 "PPC440SP(e) RAID-6 capabilities are %sABLED.\n",
4711 ppc440spe_r6_enabled ? "EN" : "DIS");
4712}
4713
4714static ssize_t store_ppc440spe_r6enable(struct device_driver *dev,
4715 const char *buf, size_t count)
4716{
4717 unsigned long val;
4718
4719 if (!count || count > 11)
4720 return -EINVAL;
4721
4722 if (!ppc440spe_r6_tchan)
4723 return -EFAULT;
4724
4725 /* Write a key */
4726 sscanf(buf, "%lx", &val);
4727 dcr_write(ppc440spe_mq_dcr_host, DCRN_MQ0_XORBA, val);
4728 isync();
4729
4730 /* Verify whether it really works now */
4731 if (ppc440spe_test_raid6(ppc440spe_r6_tchan) == 0) {
4732 pr_info("PPC440SP(e) RAID-6 has been activated "
4733 "successfully\n");
4734 ppc440spe_r6_enabled = 1;
4735 } else {
4736 pr_info("PPC440SP(e) RAID-6 hasn't been activated!"
4737 " Error key ?\n");
4738 ppc440spe_r6_enabled = 0;
4739 }
4740 return count;
4741}
4742
4743static ssize_t show_ppc440spe_r6poly(struct device_driver *dev, char *buf)
4744{
4745 ssize_t size = 0;
4746 u32 reg;
4747
4748#ifdef CONFIG_440SP
4749 /* 440SP has fixed polynomial */
4750 reg = 0x4d;
4751#else
4752 reg = dcr_read(ppc440spe_mq_dcr_host, DCRN_MQ0_CFBHL);
4753 reg >>= MQ0_CFBHL_POLY;
4754 reg &= 0xFF;
4755#endif
4756
4757 size = snprintf(buf, PAGE_SIZE, "PPC440SP(e) RAID-6 driver "
4758 "uses 0x1%02x polynomial.\n", reg);
4759 return size;
4760}
4761
4762static ssize_t store_ppc440spe_r6poly(struct device_driver *dev,
4763 const char *buf, size_t count)
4764{
4765 unsigned long reg, val;
4766
4767#ifdef CONFIG_440SP
4768 /* 440SP uses default 0x14D polynomial only */
4769 return -EINVAL;
4770#endif
4771
4772 if (!count || count > 6)
4773 return -EINVAL;
4774
4775 /* e.g., 0x14D or 0x11D */
4776 sscanf(buf, "%lx", &val);
4777
4778 if (val & ~0x1FF)
4779 return -EINVAL;
4780
4781 val &= 0xFF;
4782 reg = dcr_read(ppc440spe_mq_dcr_host, DCRN_MQ0_CFBHL);
4783 reg &= ~(0xFF << MQ0_CFBHL_POLY);
4784 reg |= val << MQ0_CFBHL_POLY;
4785 dcr_write(ppc440spe_mq_dcr_host, DCRN_MQ0_CFBHL, reg);
4786
4787 return count;
4788}
4789
4790static DRIVER_ATTR(devices, S_IRUGO, show_ppc440spe_devices, NULL);
4791static DRIVER_ATTR(enable, S_IRUGO | S_IWUSR, show_ppc440spe_r6enable,
4792 store_ppc440spe_r6enable);
4793static DRIVER_ATTR(poly, S_IRUGO | S_IWUSR, show_ppc440spe_r6poly,
4794 store_ppc440spe_r6poly);
4795
4796/*
4797 * Common initialisation for RAID engines; allocate memory for
4798 * DMAx FIFOs, perform configuration common for all DMA engines.
4799 * Further DMA engine specific configuration is done at probe time.
4800 */
4801static int ppc440spe_configure_raid_devices(void)
4802{
4803 struct device_node *np;
4804 struct resource i2o_res;
4805 struct i2o_regs __iomem *i2o_reg;
4806 dcr_host_t i2o_dcr_host;
4807 unsigned int dcr_base, dcr_len;
4808 int i, ret;
4809
4810 np = of_find_compatible_node(NULL, NULL, "ibm,i2o-440spe");
4811 if (!np) {
4812 pr_err("%s: can't find I2O device tree node\n",
4813 __func__);
4814 return -ENODEV;
4815 }
4816
4817 if (of_address_to_resource(np, 0, &i2o_res)) {
4818 of_node_put(np);
4819 return -EINVAL;
4820 }
4821
4822 i2o_reg = of_iomap(np, 0);
4823 if (!i2o_reg) {
4824 pr_err("%s: failed to map I2O registers\n", __func__);
4825 of_node_put(np);
4826 return -EINVAL;
4827 }
4828
4829 /* Get I2O DCRs base */
4830 dcr_base = dcr_resource_start(np, 0);
4831 dcr_len = dcr_resource_len(np, 0);
4832 if (!dcr_base && !dcr_len) {
4833 pr_err("%s: can't get DCR registers base/len!\n",
4834 np->full_name);
4835 of_node_put(np);
4836 iounmap(i2o_reg);
4837 return -ENODEV;
4838 }
4839
4840 i2o_dcr_host = dcr_map(np, dcr_base, dcr_len);
4841 if (!DCR_MAP_OK(i2o_dcr_host)) {
4842 pr_err("%s: failed to map DCRs!\n", np->full_name);
4843 of_node_put(np);
4844 iounmap(i2o_reg);
4845 return -ENODEV;
4846 }
4847 of_node_put(np);
4848
4849 /* Provide memory regions for DMA's FIFOs: I2O, DMA0 and DMA1 share
4850 * the base address of FIFO memory space.
4851 * Actually we need twice more physical memory than programmed in the
4852 * <fsiz> register (because there are two FIFOs for each DMA: CP and CS)
4853 */
4854 ppc440spe_dma_fifo_buf = kmalloc((DMA0_FIFO_SIZE + DMA1_FIFO_SIZE) << 1,
4855 GFP_KERNEL);
4856 if (!ppc440spe_dma_fifo_buf) {
4857 pr_err("%s: DMA FIFO buffer allocation failed.\n", __func__);
4858 iounmap(i2o_reg);
4859 dcr_unmap(i2o_dcr_host, dcr_len);
4860 return -ENOMEM;
4861 }
4862
4863 /*
4864 * Configure h/w
4865 */
4866 /* Reset I2O/DMA */
4867 mtdcri(SDR0, DCRN_SDR0_SRST, DCRN_SDR0_SRST_I2ODMA);
4868 mtdcri(SDR0, DCRN_SDR0_SRST, 0);
4869
4870 /* Setup the base address of mmaped registers */
4871 dcr_write(i2o_dcr_host, DCRN_I2O0_IBAH, (u32)(i2o_res.start >> 32));
4872 dcr_write(i2o_dcr_host, DCRN_I2O0_IBAL, (u32)(i2o_res.start) |
4873 I2O_REG_ENABLE);
4874 dcr_unmap(i2o_dcr_host, dcr_len);
4875
4876 /* Setup FIFO memory space base address */
4877 iowrite32(0, &i2o_reg->ifbah);
4878 iowrite32(((u32)__pa(ppc440spe_dma_fifo_buf)), &i2o_reg->ifbal);
4879
4880 /* set zero FIFO size for I2O, so the whole
4881 * ppc440spe_dma_fifo_buf is used by DMAs.
4882 * DMAx_FIFOs will be configured while probe.
4883 */
4884 iowrite32(0, &i2o_reg->ifsiz);
4885 iounmap(i2o_reg);
4886
4887 /* To prepare WXOR/RXOR functionality we need access to
4888 * Memory Queue Module DCRs (finally it will be enabled
4889 * via /sys interface of the ppc440spe ADMA driver).
4890 */
4891 np = of_find_compatible_node(NULL, NULL, "ibm,mq-440spe");
4892 if (!np) {
4893 pr_err("%s: can't find MQ device tree node\n",
4894 __func__);
4895 ret = -ENODEV;
4896 goto out_free;
4897 }
4898
4899 /* Get MQ DCRs base */
4900 dcr_base = dcr_resource_start(np, 0);
4901 dcr_len = dcr_resource_len(np, 0);
4902 if (!dcr_base && !dcr_len) {
4903 pr_err("%s: can't get DCR registers base/len!\n",
4904 np->full_name);
4905 ret = -ENODEV;
4906 goto out_mq;
4907 }
4908
4909 ppc440spe_mq_dcr_host = dcr_map(np, dcr_base, dcr_len);
4910 if (!DCR_MAP_OK(ppc440spe_mq_dcr_host)) {
4911 pr_err("%s: failed to map DCRs!\n", np->full_name);
4912 ret = -ENODEV;
4913 goto out_mq;
4914 }
4915 of_node_put(np);
4916 ppc440spe_mq_dcr_len = dcr_len;
4917
4918 /* Set HB alias */
4919 dcr_write(ppc440spe_mq_dcr_host, DCRN_MQ0_BAUH, DMA_CUED_XOR_HB);
4920
4921 /* Set:
4922 * - LL transaction passing limit to 1;
4923 * - Memory controller cycle limit to 1;
4924 * - Galois Polynomial to 0x14d (default)
4925 */
4926 dcr_write(ppc440spe_mq_dcr_host, DCRN_MQ0_CFBHL,
4927 (1 << MQ0_CFBHL_TPLM) | (1 << MQ0_CFBHL_HBCL) |
4928 (PPC440SPE_DEFAULT_POLY << MQ0_CFBHL_POLY));
4929
4930 atomic_set(&ppc440spe_adma_err_irq_ref, 0);
4931 for (i = 0; i < PPC440SPE_ADMA_ENGINES_NUM; i++)
4932 ppc440spe_adma_devices[i] = -1;
4933
4934 return 0;
4935
4936out_mq:
4937 of_node_put(np);
4938out_free:
4939 kfree(ppc440spe_dma_fifo_buf);
4940 return ret;
4941}
4942
4943static struct of_device_id __devinitdata ppc440spe_adma_of_match[] = {
4944 { .compatible = "ibm,dma-440spe", },
4945 { .compatible = "amcc,xor-accelerator", },
4946 {},
4947};
4948MODULE_DEVICE_TABLE(of, ppc440spe_adma_of_match);
4949
4950static struct of_platform_driver ppc440spe_adma_driver = {
4951 .match_table = ppc440spe_adma_of_match,
4952 .probe = ppc440spe_adma_probe,
4953 .remove = __devexit_p(ppc440spe_adma_remove),
4954 .driver = {
4955 .name = "PPC440SP(E)-ADMA",
4956 .owner = THIS_MODULE,
4957 },
4958};
4959
4960static __init int ppc440spe_adma_init(void)
4961{
4962 int ret;
4963
4964 ret = ppc440spe_configure_raid_devices();
4965 if (ret)
4966 return ret;
4967
4968 ret = of_register_platform_driver(&ppc440spe_adma_driver);
4969 if (ret) {
4970 pr_err("%s: failed to register platform driver\n",
4971 __func__);
4972 goto out_reg;
4973 }
4974
4975 /* Initialization status */
4976 ret = driver_create_file(&ppc440spe_adma_driver.driver,
4977 &driver_attr_devices);
4978 if (ret)
4979 goto out_dev;
4980
4981 /* RAID-6 h/w enable entry */
4982 ret = driver_create_file(&ppc440spe_adma_driver.driver,
4983 &driver_attr_enable);
4984 if (ret)
4985 goto out_en;
4986
4987 /* GF polynomial to use */
4988 ret = driver_create_file(&ppc440spe_adma_driver.driver,
4989 &driver_attr_poly);
4990 if (!ret)
4991 return ret;
4992
4993 driver_remove_file(&ppc440spe_adma_driver.driver,
4994 &driver_attr_enable);
4995out_en:
4996 driver_remove_file(&ppc440spe_adma_driver.driver,
4997 &driver_attr_devices);
4998out_dev:
4999 /* User will not be able to enable h/w RAID-6 */
5000 pr_err("%s: failed to create RAID-6 driver interface\n",
5001 __func__);
5002 of_unregister_platform_driver(&ppc440spe_adma_driver);
5003out_reg:
5004 dcr_unmap(ppc440spe_mq_dcr_host, ppc440spe_mq_dcr_len);
5005 kfree(ppc440spe_dma_fifo_buf);
5006 return ret;
5007}
5008
5009static void __exit ppc440spe_adma_exit(void)
5010{
5011 driver_remove_file(&ppc440spe_adma_driver.driver,
5012 &driver_attr_poly);
5013 driver_remove_file(&ppc440spe_adma_driver.driver,
5014 &driver_attr_enable);
5015 driver_remove_file(&ppc440spe_adma_driver.driver,
5016 &driver_attr_devices);
5017 of_unregister_platform_driver(&ppc440spe_adma_driver);
5018 dcr_unmap(ppc440spe_mq_dcr_host, ppc440spe_mq_dcr_len);
5019 kfree(ppc440spe_dma_fifo_buf);
5020}
5021
5022arch_initcall(ppc440spe_adma_init);
5023module_exit(ppc440spe_adma_exit);
5024
5025MODULE_AUTHOR("Yuri Tikhonov <yur@emcraft.com>");
5026MODULE_DESCRIPTION("PPC440SPE ADMA Engine Driver");
5027MODULE_LICENSE("GPL");
diff --git a/drivers/dma/ppc4xx/adma.h b/drivers/dma/ppc4xx/adma.h
new file mode 100644
index 000000000000..8ada5a812e3b
--- /dev/null
+++ b/drivers/dma/ppc4xx/adma.h
@@ -0,0 +1,195 @@
1/*
2 * 2006-2009 (C) DENX Software Engineering.
3 *
4 * Author: Yuri Tikhonov <yur@emcraft.com>
5 *
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of
8 * any kind, whether express or implied.
9 */
10
11#ifndef _PPC440SPE_ADMA_H
12#define _PPC440SPE_ADMA_H
13
14#include <linux/types.h>
15#include "dma.h"
16#include "xor.h"
17
18#define to_ppc440spe_adma_chan(chan) \
19 container_of(chan, struct ppc440spe_adma_chan, common)
20#define to_ppc440spe_adma_device(dev) \
21 container_of(dev, struct ppc440spe_adma_device, common)
22#define tx_to_ppc440spe_adma_slot(tx) \
23 container_of(tx, struct ppc440spe_adma_desc_slot, async_tx)
24
25/* Default polynomial (for 440SP is only available) */
26#define PPC440SPE_DEFAULT_POLY 0x4d
27
28#define PPC440SPE_ADMA_ENGINES_NUM (XOR_ENGINES_NUM + DMA_ENGINES_NUM)
29
30#define PPC440SPE_ADMA_WATCHDOG_MSEC 3
31#define PPC440SPE_ADMA_THRESHOLD 1
32
33#define PPC440SPE_DMA0_ID 0
34#define PPC440SPE_DMA1_ID 1
35#define PPC440SPE_XOR_ID 2
36
37#define PPC440SPE_ADMA_DMA_MAX_BYTE_COUNT 0xFFFFFFUL
38/* this is the XOR_CBBCR width */
39#define PPC440SPE_ADMA_XOR_MAX_BYTE_COUNT (1 << 31)
40#define PPC440SPE_ADMA_ZERO_SUM_MAX_BYTE_COUNT PPC440SPE_ADMA_XOR_MAX_BYTE_COUNT
41
42#define PPC440SPE_RXOR_RUN 0
43
44#define MQ0_CF2H_RXOR_BS_MASK 0x1FF
45
46#undef ADMA_LL_DEBUG
47
48/**
49 * struct ppc440spe_adma_device - internal representation of an ADMA device
50 * @dev: device
51 * @dma_reg: base for DMAx register access
52 * @xor_reg: base for XOR register access
53 * @i2o_reg: base for I2O register access
54 * @id: HW ADMA Device selector
55 * @dma_desc_pool_virt: base of DMA descriptor region (CPU address)
56 * @dma_desc_pool: base of DMA descriptor region (DMA address)
57 * @pool_size: size of the pool
58 * @irq: DMAx or XOR irq number
59 * @err_irq: DMAx error irq number
60 * @common: embedded struct dma_device
61 */
62struct ppc440spe_adma_device {
63 struct device *dev;
64 struct dma_regs __iomem *dma_reg;
65 struct xor_regs __iomem *xor_reg;
66 struct i2o_regs __iomem *i2o_reg;
67 int id;
68 void *dma_desc_pool_virt;
69 dma_addr_t dma_desc_pool;
70 size_t pool_size;
71 int irq;
72 int err_irq;
73 struct dma_device common;
74};
75
76/**
77 * struct ppc440spe_adma_chan - internal representation of an ADMA channel
78 * @lock: serializes enqueue/dequeue operations to the slot pool
79 * @device: parent device
80 * @chain: device chain view of the descriptors
81 * @common: common dmaengine channel object members
82 * @all_slots: complete domain of slots usable by the channel
83 * @pending: allows batching of hardware operations
84 * @completed_cookie: identifier for the most recently completed operation
85 * @slots_allocated: records the actual size of the descriptor slot pool
86 * @hw_chain_inited: h/w descriptor chain initialization flag
87 * @irq_tasklet: bottom half where ppc440spe_adma_slot_cleanup runs
88 * @needs_unmap: if buffers should not be unmapped upon final processing
89 * @pdest_page: P destination page for async validate operation
90 * @qdest_page: Q destination page for async validate operation
91 * @pdest: P dma addr for async validate operation
92 * @qdest: Q dma addr for async validate operation
93 */
94struct ppc440spe_adma_chan {
95 spinlock_t lock;
96 struct ppc440spe_adma_device *device;
97 struct list_head chain;
98 struct dma_chan common;
99 struct list_head all_slots;
100 struct ppc440spe_adma_desc_slot *last_used;
101 int pending;
102 dma_cookie_t completed_cookie;
103 int slots_allocated;
104 int hw_chain_inited;
105 struct tasklet_struct irq_tasklet;
106 u8 needs_unmap;
107 struct page *pdest_page;
108 struct page *qdest_page;
109 dma_addr_t pdest;
110 dma_addr_t qdest;
111};
112
113struct ppc440spe_rxor {
114 u32 addrl;
115 u32 addrh;
116 int len;
117 int xor_count;
118 int addr_count;
119 int desc_count;
120 int state;
121};
122
123/**
124 * struct ppc440spe_adma_desc_slot - PPC440SPE-ADMA software descriptor
125 * @phys: hardware address of the hardware descriptor chain
126 * @group_head: first operation in a transaction
127 * @hw_next: pointer to the next descriptor in chain
128 * @async_tx: support for the async_tx api
129 * @slot_node: node on the iop_adma_chan.all_slots list
130 * @chain_node: node on the op_adma_chan.chain list
131 * @group_list: list of slots that make up a multi-descriptor transaction
132 * for example transfer lengths larger than the supported hw max
133 * @unmap_len: transaction bytecount
134 * @hw_desc: virtual address of the hardware descriptor chain
135 * @stride: currently chained or not
136 * @idx: pool index
137 * @slot_cnt: total slots used in an transaction (group of operations)
138 * @src_cnt: number of sources set in this descriptor
139 * @dst_cnt: number of destinations set in the descriptor
140 * @slots_per_op: number of slots per operation
141 * @descs_per_op: number of slot per P/Q operation see comment
142 * for ppc440spe_prep_dma_pqxor function
143 * @flags: desc state/type
144 * @reverse_flags: 1 if a corresponding rxor address uses reversed address order
145 * @xor_check_result: result of zero sum
146 * @crc32_result: result crc calculation
147 */
148struct ppc440spe_adma_desc_slot {
149 dma_addr_t phys;
150 struct ppc440spe_adma_desc_slot *group_head;
151 struct ppc440spe_adma_desc_slot *hw_next;
152 struct dma_async_tx_descriptor async_tx;
153 struct list_head slot_node;
154 struct list_head chain_node; /* node in channel ops list */
155 struct list_head group_list; /* list */
156 unsigned int unmap_len;
157 void *hw_desc;
158 u16 stride;
159 u16 idx;
160 u16 slot_cnt;
161 u8 src_cnt;
162 u8 dst_cnt;
163 u8 slots_per_op;
164 u8 descs_per_op;
165 unsigned long flags;
166 unsigned long reverse_flags[8];
167
168#define PPC440SPE_DESC_INT 0 /* generate interrupt on complete */
169#define PPC440SPE_ZERO_P 1 /* clear P destionaion */
170#define PPC440SPE_ZERO_Q 2 /* clear Q destination */
171#define PPC440SPE_COHERENT 3 /* src/dst are coherent */
172
173#define PPC440SPE_DESC_WXOR 4 /* WXORs are in chain */
174#define PPC440SPE_DESC_RXOR 5 /* RXOR is in chain */
175
176#define PPC440SPE_DESC_RXOR123 8 /* CDB for RXOR123 operation */
177#define PPC440SPE_DESC_RXOR124 9 /* CDB for RXOR124 operation */
178#define PPC440SPE_DESC_RXOR125 10 /* CDB for RXOR125 operation */
179#define PPC440SPE_DESC_RXOR12 11 /* CDB for RXOR12 operation */
180#define PPC440SPE_DESC_RXOR_REV 12 /* CDB has srcs in reversed order */
181
182#define PPC440SPE_DESC_PCHECK 13
183#define PPC440SPE_DESC_QCHECK 14
184
185#define PPC440SPE_DESC_RXOR_MSK 0x3
186
187 struct ppc440spe_rxor rxor_cursor;
188
189 union {
190 u32 *xor_check_result;
191 u32 *crc32_result;
192 };
193};
194
195#endif /* _PPC440SPE_ADMA_H */
diff --git a/drivers/dma/ppc4xx/dma.h b/drivers/dma/ppc4xx/dma.h
new file mode 100644
index 000000000000..bcde2df2f373
--- /dev/null
+++ b/drivers/dma/ppc4xx/dma.h
@@ -0,0 +1,223 @@
1/*
2 * 440SPe's DMA engines support header file
3 *
4 * 2006-2009 (C) DENX Software Engineering.
5 *
6 * Author: Yuri Tikhonov <yur@emcraft.com>
7 *
8 * This file is licensed under the term of the GNU General Public License
9 * version 2. The program licensed "as is" without any warranty of any
10 * kind, whether express or implied.
11 */
12
13#ifndef _PPC440SPE_DMA_H
14#define _PPC440SPE_DMA_H
15
16#include <linux/types.h>
17
18/* Number of elements in the array with statical CDBs */
19#define MAX_STAT_DMA_CDBS 16
20/* Number of DMA engines available on the contoller */
21#define DMA_ENGINES_NUM 2
22
23/* Maximum h/w supported number of destinations */
24#define DMA_DEST_MAX_NUM 2
25
26/* FIFO's params */
27#define DMA0_FIFO_SIZE 0x1000
28#define DMA1_FIFO_SIZE 0x1000
29#define DMA_FIFO_ENABLE (1<<12)
30
31/* DMA Configuration Register. Data Transfer Engine PLB Priority: */
32#define DMA_CFG_DXEPR_LP (0<<26)
33#define DMA_CFG_DXEPR_HP (3<<26)
34#define DMA_CFG_DXEPR_HHP (2<<26)
35#define DMA_CFG_DXEPR_HHHP (1<<26)
36
37/* DMA Configuration Register. DMA FIFO Manager PLB Priority: */
38#define DMA_CFG_DFMPP_LP (0<<23)
39#define DMA_CFG_DFMPP_HP (3<<23)
40#define DMA_CFG_DFMPP_HHP (2<<23)
41#define DMA_CFG_DFMPP_HHHP (1<<23)
42
43/* DMA Configuration Register. Force 64-byte Alignment */
44#define DMA_CFG_FALGN (1 << 19)
45
46/*UIC0:*/
47#define D0CPF_INT (1<<12)
48#define D0CSF_INT (1<<11)
49#define D1CPF_INT (1<<10)
50#define D1CSF_INT (1<<9)
51/*UIC1:*/
52#define DMAE_INT (1<<9)
53
54/* I2O IOP Interrupt Mask Register */
55#define I2O_IOPIM_P0SNE (1<<3)
56#define I2O_IOPIM_P0EM (1<<5)
57#define I2O_IOPIM_P1SNE (1<<6)
58#define I2O_IOPIM_P1EM (1<<8)
59
60/* DMA CDB fields */
61#define DMA_CDB_MSK (0xF)
62#define DMA_CDB_64B_ADDR (1<<2)
63#define DMA_CDB_NO_INT (1<<3)
64#define DMA_CDB_STATUS_MSK (0x3)
65#define DMA_CDB_ADDR_MSK (0xFFFFFFF0)
66
67/* DMA CDB OpCodes */
68#define DMA_CDB_OPC_NO_OP (0x00)
69#define DMA_CDB_OPC_MV_SG1_SG2 (0x01)
70#define DMA_CDB_OPC_MULTICAST (0x05)
71#define DMA_CDB_OPC_DFILL128 (0x24)
72#define DMA_CDB_OPC_DCHECK128 (0x23)
73
74#define DMA_CUED_XOR_BASE (0x10000000)
75#define DMA_CUED_XOR_HB (0x00000008)
76
77#ifdef CONFIG_440SP
78#define DMA_CUED_MULT1_OFF 0
79#define DMA_CUED_MULT2_OFF 8
80#define DMA_CUED_MULT3_OFF 16
81#define DMA_CUED_REGION_OFF 24
82#define DMA_CUED_XOR_WIN_MSK (0xFC000000)
83#else
84#define DMA_CUED_MULT1_OFF 2
85#define DMA_CUED_MULT2_OFF 10
86#define DMA_CUED_MULT3_OFF 18
87#define DMA_CUED_REGION_OFF 26
88#define DMA_CUED_XOR_WIN_MSK (0xF0000000)
89#endif
90
91#define DMA_CUED_REGION_MSK 0x3
92#define DMA_RXOR123 0x0
93#define DMA_RXOR124 0x1
94#define DMA_RXOR125 0x2
95#define DMA_RXOR12 0x3
96
97/* S/G addresses */
98#define DMA_CDB_SG_SRC 1
99#define DMA_CDB_SG_DST1 2
100#define DMA_CDB_SG_DST2 3
101
102/*
103 * DMAx engines Command Descriptor Block Type
104 */
105struct dma_cdb {
106 /*
107 * Basic CDB structure (Table 20-17, p.499, 440spe_um_1_22.pdf)
108 */
109 u8 pad0[2]; /* reserved */
110 u8 attr; /* attributes */
111 u8 opc; /* opcode */
112 u32 sg1u; /* upper SG1 address */
113 u32 sg1l; /* lower SG1 address */
114 u32 cnt; /* SG count, 3B used */
115 u32 sg2u; /* upper SG2 address */
116 u32 sg2l; /* lower SG2 address */
117 u32 sg3u; /* upper SG3 address */
118 u32 sg3l; /* lower SG3 address */
119};
120
121/*
122 * DMAx hardware registers (p.515 in 440SPe UM 1.22)
123 */
124struct dma_regs {
125 u32 cpfpl;
126 u32 cpfph;
127 u32 csfpl;
128 u32 csfph;
129 u32 dsts;
130 u32 cfg;
131 u8 pad0[0x8];
132 u16 cpfhp;
133 u16 cpftp;
134 u16 csfhp;
135 u16 csftp;
136 u8 pad1[0x8];
137 u32 acpl;
138 u32 acph;
139 u32 s1bpl;
140 u32 s1bph;
141 u32 s2bpl;
142 u32 s2bph;
143 u32 s3bpl;
144 u32 s3bph;
145 u8 pad2[0x10];
146 u32 earl;
147 u32 earh;
148 u8 pad3[0x8];
149 u32 seat;
150 u32 sead;
151 u32 op;
152 u32 fsiz;
153};
154
155/*
156 * I2O hardware registers (p.528 in 440SPe UM 1.22)
157 */
158struct i2o_regs {
159 u32 ists;
160 u32 iseat;
161 u32 isead;
162 u8 pad0[0x14];
163 u32 idbel;
164 u8 pad1[0xc];
165 u32 ihis;
166 u32 ihim;
167 u8 pad2[0x8];
168 u32 ihiq;
169 u32 ihoq;
170 u8 pad3[0x8];
171 u32 iopis;
172 u32 iopim;
173 u32 iopiq;
174 u8 iopoq;
175 u8 pad4[3];
176 u16 iiflh;
177 u16 iiflt;
178 u16 iiplh;
179 u16 iiplt;
180 u16 ioflh;
181 u16 ioflt;
182 u16 ioplh;
183 u16 ioplt;
184 u32 iidc;
185 u32 ictl;
186 u32 ifcpp;
187 u8 pad5[0x4];
188 u16 mfac0;
189 u16 mfac1;
190 u16 mfac2;
191 u16 mfac3;
192 u16 mfac4;
193 u16 mfac5;
194 u16 mfac6;
195 u16 mfac7;
196 u16 ifcfh;
197 u16 ifcht;
198 u8 pad6[0x4];
199 u32 iifmc;
200 u32 iodb;
201 u32 iodbc;
202 u32 ifbal;
203 u32 ifbah;
204 u32 ifsiz;
205 u32 ispd0;
206 u32 ispd1;
207 u32 ispd2;
208 u32 ispd3;
209 u32 ihipl;
210 u32 ihiph;
211 u32 ihopl;
212 u32 ihoph;
213 u32 iiipl;
214 u32 iiiph;
215 u32 iiopl;
216 u32 iioph;
217 u32 ifcpl;
218 u32 ifcph;
219 u8 pad7[0x8];
220 u32 iopt;
221};
222
223#endif /* _PPC440SPE_DMA_H */
diff --git a/drivers/dma/ppc4xx/xor.h b/drivers/dma/ppc4xx/xor.h
new file mode 100644
index 000000000000..daed7384daac
--- /dev/null
+++ b/drivers/dma/ppc4xx/xor.h
@@ -0,0 +1,110 @@
1/*
2 * 440SPe's XOR engines support header file
3 *
4 * 2006-2009 (C) DENX Software Engineering.
5 *
6 * Author: Yuri Tikhonov <yur@emcraft.com>
7 *
8 * This file is licensed under the term of the GNU General Public License
9 * version 2. The program licensed "as is" without any warranty of any
10 * kind, whether express or implied.
11 */
12
13#ifndef _PPC440SPE_XOR_H
14#define _PPC440SPE_XOR_H
15
16#include <linux/types.h>
17
18/* Number of XOR engines available on the contoller */
19#define XOR_ENGINES_NUM 1
20
21/* Number of operands supported in the h/w */
22#define XOR_MAX_OPS 16
23
24/*
25 * XOR Command Block Control Register bits
26 */
27#define XOR_CBCR_LNK_BIT (1<<31) /* link present */
28#define XOR_CBCR_TGT_BIT (1<<30) /* target present */
29#define XOR_CBCR_CBCE_BIT (1<<29) /* command block compete enable */
30#define XOR_CBCR_RNZE_BIT (1<<28) /* result not zero enable */
31#define XOR_CBCR_XNOR_BIT (1<<15) /* XOR/XNOR */
32#define XOR_CDCR_OAC_MSK (0x7F) /* operand address count */
33
34/*
35 * XORCore Status Register bits
36 */
37#define XOR_SR_XCP_BIT (1<<31) /* core processing */
38#define XOR_SR_ICB_BIT (1<<17) /* invalid CB */
39#define XOR_SR_IC_BIT (1<<16) /* invalid command */
40#define XOR_SR_IPE_BIT (1<<15) /* internal parity error */
41#define XOR_SR_RNZ_BIT (1<<2) /* result not Zero */
42#define XOR_SR_CBC_BIT (1<<1) /* CB complete */
43#define XOR_SR_CBLC_BIT (1<<0) /* CB list complete */
44
45/*
46 * XORCore Control Set and Reset Register bits
47 */
48#define XOR_CRSR_XASR_BIT (1<<31) /* soft reset */
49#define XOR_CRSR_XAE_BIT (1<<30) /* enable */
50#define XOR_CRSR_RCBE_BIT (1<<29) /* refetch CB enable */
51#define XOR_CRSR_PAUS_BIT (1<<28) /* pause */
52#define XOR_CRSR_64BA_BIT (1<<27) /* 64/32 CB format */
53#define XOR_CRSR_CLP_BIT (1<<25) /* continue list processing */
54
55/*
56 * XORCore Interrupt Enable Register
57 */
58#define XOR_IE_ICBIE_BIT (1<<17) /* Invalid Command Block IRQ Enable */
59#define XOR_IE_ICIE_BIT (1<<16) /* Invalid Command IRQ Enable */
60#define XOR_IE_RPTIE_BIT (1<<14) /* Read PLB Timeout Error IRQ Enable */
61#define XOR_IE_CBCIE_BIT (1<<1) /* CB complete interrupt enable */
62#define XOR_IE_CBLCI_BIT (1<<0) /* CB list complete interrupt enable */
63
64/*
65 * XOR Accelerator engine Command Block Type
66 */
67struct xor_cb {
68 /*
69 * Basic 64-bit format XOR CB (Table 19-1, p.463, 440spe_um_1_22.pdf)
70 */
71 u32 cbc; /* control */
72 u32 cbbc; /* byte count */
73 u32 cbs; /* status */
74 u8 pad0[4]; /* reserved */
75 u32 cbtah; /* target address high */
76 u32 cbtal; /* target address low */
77 u32 cblah; /* link address high */
78 u32 cblal; /* link address low */
79 struct {
80 u32 h;
81 u32 l;
82 } __attribute__ ((packed)) ops[16];
83} __attribute__ ((packed));
84
85/*
86 * XOR hardware registers Table 19-3, UM 1.22
87 */
88struct xor_regs {
89 u32 op_ar[16][2]; /* operand address[0]-high,[1]-low registers */
90 u8 pad0[352]; /* reserved */
91 u32 cbcr; /* CB control register */
92 u32 cbbcr; /* CB byte count register */
93 u32 cbsr; /* CB status register */
94 u8 pad1[4]; /* reserved */
95 u32 cbtahr; /* operand target address high register */
96 u32 cbtalr; /* operand target address low register */
97 u32 cblahr; /* CB link address high register */
98 u32 cblalr; /* CB link address low register */
99 u32 crsr; /* control set register */
100 u32 crrr; /* control reset register */
101 u32 ccbahr; /* current CB address high register */
102 u32 ccbalr; /* current CB address low register */
103 u32 plbr; /* PLB configuration register */
104 u32 ier; /* interrupt enable register */
105 u32 pecr; /* parity error count register */
106 u32 sr; /* status register */
107 u32 revidr; /* revision ID register */
108};
109
110#endif /* _PPC440SPE_XOR_H */
diff --git a/drivers/dma/shdma.c b/drivers/dma/shdma.c
index 034ecf0ace03..d10cc899c460 100644
--- a/drivers/dma/shdma.c
+++ b/drivers/dma/shdma.c
@@ -23,16 +23,19 @@
23#include <linux/dmaengine.h> 23#include <linux/dmaengine.h>
24#include <linux/delay.h> 24#include <linux/delay.h>
25#include <linux/dma-mapping.h> 25#include <linux/dma-mapping.h>
26#include <linux/dmapool.h>
27#include <linux/platform_device.h> 26#include <linux/platform_device.h>
28#include <cpu/dma.h> 27#include <cpu/dma.h>
29#include <asm/dma-sh.h> 28#include <asm/dma-sh.h>
30#include "shdma.h" 29#include "shdma.h"
31 30
32/* DMA descriptor control */ 31/* DMA descriptor control */
33#define DESC_LAST (-1) 32enum sh_dmae_desc_status {
34#define DESC_COMP (1) 33 DESC_IDLE,
35#define DESC_NCOMP (0) 34 DESC_PREPARED,
35 DESC_SUBMITTED,
36 DESC_COMPLETED, /* completed, have to call callback */
37 DESC_WAITING, /* callback called, waiting for ack / re-submit */
38};
36 39
37#define NR_DESCS_PER_CHANNEL 32 40#define NR_DESCS_PER_CHANNEL 32
38/* 41/*
@@ -45,6 +48,8 @@
45 */ 48 */
46#define RS_DEFAULT (RS_DUAL) 49#define RS_DEFAULT (RS_DUAL)
47 50
51static void sh_dmae_chan_ld_cleanup(struct sh_dmae_chan *sh_chan, bool all);
52
48#define SH_DMAC_CHAN_BASE(id) (dma_base_addr[id]) 53#define SH_DMAC_CHAN_BASE(id) (dma_base_addr[id])
49static void sh_dmae_writel(struct sh_dmae_chan *sh_dc, u32 data, u32 reg) 54static void sh_dmae_writel(struct sh_dmae_chan *sh_dc, u32 data, u32 reg)
50{ 55{
@@ -80,17 +85,17 @@ static int sh_dmae_rst(int id)
80 unsigned short dmaor; 85 unsigned short dmaor;
81 86
82 sh_dmae_ctl_stop(id); 87 sh_dmae_ctl_stop(id);
83 dmaor = (dmaor_read_reg(id)|DMAOR_INIT); 88 dmaor = dmaor_read_reg(id) | DMAOR_INIT;
84 89
85 dmaor_write_reg(id, dmaor); 90 dmaor_write_reg(id, dmaor);
86 if ((dmaor_read_reg(id) & (DMAOR_AE | DMAOR_NMIF))) { 91 if (dmaor_read_reg(id) & (DMAOR_AE | DMAOR_NMIF)) {
87 pr_warning(KERN_ERR "dma-sh: Can't initialize DMAOR.\n"); 92 pr_warning(KERN_ERR "dma-sh: Can't initialize DMAOR.\n");
88 return -EINVAL; 93 return -EINVAL;
89 } 94 }
90 return 0; 95 return 0;
91} 96}
92 97
93static int dmae_is_idle(struct sh_dmae_chan *sh_chan) 98static int dmae_is_busy(struct sh_dmae_chan *sh_chan)
94{ 99{
95 u32 chcr = sh_dmae_readl(sh_chan, CHCR); 100 u32 chcr = sh_dmae_readl(sh_chan, CHCR);
96 if (chcr & CHCR_DE) { 101 if (chcr & CHCR_DE) {
@@ -106,19 +111,18 @@ static inline unsigned int calc_xmit_shift(struct sh_dmae_chan *sh_chan)
106 return ts_shift[(chcr & CHCR_TS_MASK) >> CHCR_TS_SHIFT]; 111 return ts_shift[(chcr & CHCR_TS_MASK) >> CHCR_TS_SHIFT];
107} 112}
108 113
109static void dmae_set_reg(struct sh_dmae_chan *sh_chan, struct sh_dmae_regs hw) 114static void dmae_set_reg(struct sh_dmae_chan *sh_chan, struct sh_dmae_regs *hw)
110{ 115{
111 sh_dmae_writel(sh_chan, hw.sar, SAR); 116 sh_dmae_writel(sh_chan, hw->sar, SAR);
112 sh_dmae_writel(sh_chan, hw.dar, DAR); 117 sh_dmae_writel(sh_chan, hw->dar, DAR);
113 sh_dmae_writel(sh_chan, 118 sh_dmae_writel(sh_chan, hw->tcr >> calc_xmit_shift(sh_chan), TCR);
114 (hw.tcr >> calc_xmit_shift(sh_chan)), TCR);
115} 119}
116 120
117static void dmae_start(struct sh_dmae_chan *sh_chan) 121static void dmae_start(struct sh_dmae_chan *sh_chan)
118{ 122{
119 u32 chcr = sh_dmae_readl(sh_chan, CHCR); 123 u32 chcr = sh_dmae_readl(sh_chan, CHCR);
120 124
121 chcr |= (CHCR_DE|CHCR_IE); 125 chcr |= CHCR_DE | CHCR_IE;
122 sh_dmae_writel(sh_chan, chcr, CHCR); 126 sh_dmae_writel(sh_chan, chcr, CHCR);
123} 127}
124 128
@@ -132,7 +136,7 @@ static void dmae_halt(struct sh_dmae_chan *sh_chan)
132 136
133static int dmae_set_chcr(struct sh_dmae_chan *sh_chan, u32 val) 137static int dmae_set_chcr(struct sh_dmae_chan *sh_chan, u32 val)
134{ 138{
135 int ret = dmae_is_idle(sh_chan); 139 int ret = dmae_is_busy(sh_chan);
136 /* When DMA was working, can not set data to CHCR */ 140 /* When DMA was working, can not set data to CHCR */
137 if (ret) 141 if (ret)
138 return ret; 142 return ret;
@@ -149,7 +153,7 @@ static int dmae_set_dmars(struct sh_dmae_chan *sh_chan, u16 val)
149{ 153{
150 u32 addr; 154 u32 addr;
151 int shift = 0; 155 int shift = 0;
152 int ret = dmae_is_idle(sh_chan); 156 int ret = dmae_is_busy(sh_chan);
153 if (ret) 157 if (ret)
154 return ret; 158 return ret;
155 159
@@ -185,8 +189,9 @@ static int dmae_set_dmars(struct sh_dmae_chan *sh_chan, u16 val)
185 189
186static dma_cookie_t sh_dmae_tx_submit(struct dma_async_tx_descriptor *tx) 190static dma_cookie_t sh_dmae_tx_submit(struct dma_async_tx_descriptor *tx)
187{ 191{
188 struct sh_desc *desc = tx_to_sh_desc(tx); 192 struct sh_desc *desc = tx_to_sh_desc(tx), *chunk, *last = desc, *c;
189 struct sh_dmae_chan *sh_chan = to_sh_chan(tx->chan); 193 struct sh_dmae_chan *sh_chan = to_sh_chan(tx->chan);
194 dma_async_tx_callback callback = tx->callback;
190 dma_cookie_t cookie; 195 dma_cookie_t cookie;
191 196
192 spin_lock_bh(&sh_chan->desc_lock); 197 spin_lock_bh(&sh_chan->desc_lock);
@@ -196,45 +201,53 @@ static dma_cookie_t sh_dmae_tx_submit(struct dma_async_tx_descriptor *tx)
196 if (cookie < 0) 201 if (cookie < 0)
197 cookie = 1; 202 cookie = 1;
198 203
199 /* If desc only in the case of 1 */ 204 sh_chan->common.cookie = cookie;
200 if (desc->async_tx.cookie != -EBUSY) 205 tx->cookie = cookie;
201 desc->async_tx.cookie = cookie; 206
202 sh_chan->common.cookie = desc->async_tx.cookie; 207 /* Mark all chunks of this descriptor as submitted, move to the queue */
208 list_for_each_entry_safe(chunk, c, desc->node.prev, node) {
209 /*
210 * All chunks are on the global ld_free, so, we have to find
211 * the end of the chain ourselves
212 */
213 if (chunk != desc && (chunk->mark == DESC_IDLE ||
214 chunk->async_tx.cookie > 0 ||
215 chunk->async_tx.cookie == -EBUSY ||
216 &chunk->node == &sh_chan->ld_free))
217 break;
218 chunk->mark = DESC_SUBMITTED;
219 /* Callback goes to the last chunk */
220 chunk->async_tx.callback = NULL;
221 chunk->cookie = cookie;
222 list_move_tail(&chunk->node, &sh_chan->ld_queue);
223 last = chunk;
224 }
225
226 last->async_tx.callback = callback;
227 last->async_tx.callback_param = tx->callback_param;
203 228
204 list_splice_init(&desc->tx_list, sh_chan->ld_queue.prev); 229 dev_dbg(sh_chan->dev, "submit #%d@%p on %d: %x[%d] -> %x\n",
230 tx->cookie, &last->async_tx, sh_chan->id,
231 desc->hw.sar, desc->hw.tcr, desc->hw.dar);
205 232
206 spin_unlock_bh(&sh_chan->desc_lock); 233 spin_unlock_bh(&sh_chan->desc_lock);
207 234
208 return cookie; 235 return cookie;
209} 236}
210 237
238/* Called with desc_lock held */
211static struct sh_desc *sh_dmae_get_desc(struct sh_dmae_chan *sh_chan) 239static struct sh_desc *sh_dmae_get_desc(struct sh_dmae_chan *sh_chan)
212{ 240{
213 struct sh_desc *desc, *_desc, *ret = NULL; 241 struct sh_desc *desc;
214 242
215 spin_lock_bh(&sh_chan->desc_lock); 243 list_for_each_entry(desc, &sh_chan->ld_free, node)
216 list_for_each_entry_safe(desc, _desc, &sh_chan->ld_free, node) { 244 if (desc->mark != DESC_PREPARED) {
217 if (async_tx_test_ack(&desc->async_tx)) { 245 BUG_ON(desc->mark != DESC_IDLE);
218 list_del(&desc->node); 246 list_del(&desc->node);
219 ret = desc; 247 return desc;
220 break;
221 } 248 }
222 }
223 spin_unlock_bh(&sh_chan->desc_lock);
224
225 return ret;
226}
227
228static void sh_dmae_put_desc(struct sh_dmae_chan *sh_chan, struct sh_desc *desc)
229{
230 if (desc) {
231 spin_lock_bh(&sh_chan->desc_lock);
232
233 list_splice_init(&desc->tx_list, &sh_chan->ld_free);
234 list_add(&desc->node, &sh_chan->ld_free);
235 249
236 spin_unlock_bh(&sh_chan->desc_lock); 250 return NULL;
237 }
238} 251}
239 252
240static int sh_dmae_alloc_chan_resources(struct dma_chan *chan) 253static int sh_dmae_alloc_chan_resources(struct dma_chan *chan)
@@ -253,11 +266,10 @@ static int sh_dmae_alloc_chan_resources(struct dma_chan *chan)
253 dma_async_tx_descriptor_init(&desc->async_tx, 266 dma_async_tx_descriptor_init(&desc->async_tx,
254 &sh_chan->common); 267 &sh_chan->common);
255 desc->async_tx.tx_submit = sh_dmae_tx_submit; 268 desc->async_tx.tx_submit = sh_dmae_tx_submit;
256 desc->async_tx.flags = DMA_CTRL_ACK; 269 desc->mark = DESC_IDLE;
257 INIT_LIST_HEAD(&desc->tx_list);
258 sh_dmae_put_desc(sh_chan, desc);
259 270
260 spin_lock_bh(&sh_chan->desc_lock); 271 spin_lock_bh(&sh_chan->desc_lock);
272 list_add(&desc->node, &sh_chan->ld_free);
261 sh_chan->descs_allocated++; 273 sh_chan->descs_allocated++;
262 } 274 }
263 spin_unlock_bh(&sh_chan->desc_lock); 275 spin_unlock_bh(&sh_chan->desc_lock);
@@ -274,7 +286,10 @@ static void sh_dmae_free_chan_resources(struct dma_chan *chan)
274 struct sh_desc *desc, *_desc; 286 struct sh_desc *desc, *_desc;
275 LIST_HEAD(list); 287 LIST_HEAD(list);
276 288
277 BUG_ON(!list_empty(&sh_chan->ld_queue)); 289 /* Prepared and not submitted descriptors can still be on the queue */
290 if (!list_empty(&sh_chan->ld_queue))
291 sh_dmae_chan_ld_cleanup(sh_chan, true);
292
278 spin_lock_bh(&sh_chan->desc_lock); 293 spin_lock_bh(&sh_chan->desc_lock);
279 294
280 list_splice_init(&sh_chan->ld_free, &list); 295 list_splice_init(&sh_chan->ld_free, &list);
@@ -293,6 +308,8 @@ static struct dma_async_tx_descriptor *sh_dmae_prep_memcpy(
293 struct sh_dmae_chan *sh_chan; 308 struct sh_dmae_chan *sh_chan;
294 struct sh_desc *first = NULL, *prev = NULL, *new; 309 struct sh_desc *first = NULL, *prev = NULL, *new;
295 size_t copy_size; 310 size_t copy_size;
311 LIST_HEAD(tx_list);
312 int chunks = (len + SH_DMA_TCR_MAX) / (SH_DMA_TCR_MAX + 1);
296 313
297 if (!chan) 314 if (!chan)
298 return NULL; 315 return NULL;
@@ -302,108 +319,189 @@ static struct dma_async_tx_descriptor *sh_dmae_prep_memcpy(
302 319
303 sh_chan = to_sh_chan(chan); 320 sh_chan = to_sh_chan(chan);
304 321
322 /* Have to lock the whole loop to protect against concurrent release */
323 spin_lock_bh(&sh_chan->desc_lock);
324
325 /*
326 * Chaining:
327 * first descriptor is what user is dealing with in all API calls, its
328 * cookie is at first set to -EBUSY, at tx-submit to a positive
329 * number
330 * if more than one chunk is needed further chunks have cookie = -EINVAL
331 * the last chunk, if not equal to the first, has cookie = -ENOSPC
332 * all chunks are linked onto the tx_list head with their .node heads
333 * only during this function, then they are immediately spliced
334 * back onto the free list in form of a chain
335 */
305 do { 336 do {
306 /* Allocate the link descriptor from DMA pool */ 337 /* Allocate the link descriptor from the free list */
307 new = sh_dmae_get_desc(sh_chan); 338 new = sh_dmae_get_desc(sh_chan);
308 if (!new) { 339 if (!new) {
309 dev_err(sh_chan->dev, 340 dev_err(sh_chan->dev,
310 "No free memory for link descriptor\n"); 341 "No free memory for link descriptor\n");
311 goto err_get_desc; 342 list_for_each_entry(new, &tx_list, node)
343 new->mark = DESC_IDLE;
344 list_splice(&tx_list, &sh_chan->ld_free);
345 spin_unlock_bh(&sh_chan->desc_lock);
346 return NULL;
312 } 347 }
313 348
314 copy_size = min(len, (size_t)SH_DMA_TCR_MAX); 349 copy_size = min(len, (size_t)SH_DMA_TCR_MAX + 1);
315 350
316 new->hw.sar = dma_src; 351 new->hw.sar = dma_src;
317 new->hw.dar = dma_dest; 352 new->hw.dar = dma_dest;
318 new->hw.tcr = copy_size; 353 new->hw.tcr = copy_size;
319 if (!first) 354 if (!first) {
355 /* First desc */
356 new->async_tx.cookie = -EBUSY;
320 first = new; 357 first = new;
358 } else {
359 /* Other desc - invisible to the user */
360 new->async_tx.cookie = -EINVAL;
361 }
321 362
322 new->mark = DESC_NCOMP; 363 dev_dbg(sh_chan->dev,
323 async_tx_ack(&new->async_tx); 364 "chaining %u of %u with %p, dst %x, cookie %d\n",
365 copy_size, len, &new->async_tx, dma_dest,
366 new->async_tx.cookie);
367
368 new->mark = DESC_PREPARED;
369 new->async_tx.flags = flags;
370 new->chunks = chunks--;
324 371
325 prev = new; 372 prev = new;
326 len -= copy_size; 373 len -= copy_size;
327 dma_src += copy_size; 374 dma_src += copy_size;
328 dma_dest += copy_size; 375 dma_dest += copy_size;
329 /* Insert the link descriptor to the LD ring */ 376 /* Insert the link descriptor to the LD ring */
330 list_add_tail(&new->node, &first->tx_list); 377 list_add_tail(&new->node, &tx_list);
331 } while (len); 378 } while (len);
332 379
333 new->async_tx.flags = flags; /* client is in control of this ack */ 380 if (new != first)
334 new->async_tx.cookie = -EBUSY; /* Last desc */ 381 new->async_tx.cookie = -ENOSPC;
335 382
336 return &first->async_tx; 383 /* Put them back on the free list, so, they don't get lost */
384 list_splice_tail(&tx_list, &sh_chan->ld_free);
337 385
338err_get_desc: 386 spin_unlock_bh(&sh_chan->desc_lock);
339 sh_dmae_put_desc(sh_chan, first);
340 return NULL;
341 387
388 return &first->async_tx;
342} 389}
343 390
344/* 391static dma_async_tx_callback __ld_cleanup(struct sh_dmae_chan *sh_chan, bool all)
345 * sh_chan_ld_cleanup - Clean up link descriptors
346 *
347 * This function clean up the ld_queue of DMA channel.
348 */
349static void sh_dmae_chan_ld_cleanup(struct sh_dmae_chan *sh_chan)
350{ 392{
351 struct sh_desc *desc, *_desc; 393 struct sh_desc *desc, *_desc;
394 /* Is the "exposed" head of a chain acked? */
395 bool head_acked = false;
396 dma_cookie_t cookie = 0;
397 dma_async_tx_callback callback = NULL;
398 void *param = NULL;
352 399
353 spin_lock_bh(&sh_chan->desc_lock); 400 spin_lock_bh(&sh_chan->desc_lock);
354 list_for_each_entry_safe(desc, _desc, &sh_chan->ld_queue, node) { 401 list_for_each_entry_safe(desc, _desc, &sh_chan->ld_queue, node) {
355 dma_async_tx_callback callback; 402 struct dma_async_tx_descriptor *tx = &desc->async_tx;
356 void *callback_param; 403
357 404 BUG_ON(tx->cookie > 0 && tx->cookie != desc->cookie);
358 /* non send data */ 405 BUG_ON(desc->mark != DESC_SUBMITTED &&
359 if (desc->mark == DESC_NCOMP) 406 desc->mark != DESC_COMPLETED &&
407 desc->mark != DESC_WAITING);
408
409 /*
410 * queue is ordered, and we use this loop to (1) clean up all
411 * completed descriptors, and to (2) update descriptor flags of
412 * any chunks in a (partially) completed chain
413 */
414 if (!all && desc->mark == DESC_SUBMITTED &&
415 desc->cookie != cookie)
360 break; 416 break;
361 417
362 /* send data sesc */ 418 if (tx->cookie > 0)
363 callback = desc->async_tx.callback; 419 cookie = tx->cookie;
364 callback_param = desc->async_tx.callback_param;
365 420
366 /* Remove from ld_queue list */ 421 if (desc->mark == DESC_COMPLETED && desc->chunks == 1) {
367 list_splice_init(&desc->tx_list, &sh_chan->ld_free); 422 BUG_ON(sh_chan->completed_cookie != desc->cookie - 1);
423 sh_chan->completed_cookie = desc->cookie;
424 }
368 425
369 dev_dbg(sh_chan->dev, "link descriptor %p will be recycle.\n", 426 /* Call callback on the last chunk */
370 desc); 427 if (desc->mark == DESC_COMPLETED && tx->callback) {
428 desc->mark = DESC_WAITING;
429 callback = tx->callback;
430 param = tx->callback_param;
431 dev_dbg(sh_chan->dev, "descriptor #%d@%p on %d callback\n",
432 tx->cookie, tx, sh_chan->id);
433 BUG_ON(desc->chunks != 1);
434 break;
435 }
371 436
372 list_move(&desc->node, &sh_chan->ld_free); 437 if (tx->cookie > 0 || tx->cookie == -EBUSY) {
373 /* Run the link descriptor callback function */ 438 if (desc->mark == DESC_COMPLETED) {
374 if (callback) { 439 BUG_ON(tx->cookie < 0);
375 spin_unlock_bh(&sh_chan->desc_lock); 440 desc->mark = DESC_WAITING;
376 dev_dbg(sh_chan->dev, "link descriptor %p callback\n", 441 }
377 desc); 442 head_acked = async_tx_test_ack(tx);
378 callback(callback_param); 443 } else {
379 spin_lock_bh(&sh_chan->desc_lock); 444 switch (desc->mark) {
445 case DESC_COMPLETED:
446 desc->mark = DESC_WAITING;
447 /* Fall through */
448 case DESC_WAITING:
449 if (head_acked)
450 async_tx_ack(&desc->async_tx);
451 }
452 }
453
454 dev_dbg(sh_chan->dev, "descriptor %p #%d completed.\n",
455 tx, tx->cookie);
456
457 if (((desc->mark == DESC_COMPLETED ||
458 desc->mark == DESC_WAITING) &&
459 async_tx_test_ack(&desc->async_tx)) || all) {
460 /* Remove from ld_queue list */
461 desc->mark = DESC_IDLE;
462 list_move(&desc->node, &sh_chan->ld_free);
380 } 463 }
381 } 464 }
382 spin_unlock_bh(&sh_chan->desc_lock); 465 spin_unlock_bh(&sh_chan->desc_lock);
466
467 if (callback)
468 callback(param);
469
470 return callback;
471}
472
473/*
474 * sh_chan_ld_cleanup - Clean up link descriptors
475 *
476 * This function cleans up the ld_queue of DMA channel.
477 */
478static void sh_dmae_chan_ld_cleanup(struct sh_dmae_chan *sh_chan, bool all)
479{
480 while (__ld_cleanup(sh_chan, all))
481 ;
383} 482}
384 483
385static void sh_chan_xfer_ld_queue(struct sh_dmae_chan *sh_chan) 484static void sh_chan_xfer_ld_queue(struct sh_dmae_chan *sh_chan)
386{ 485{
387 struct list_head *ld_node; 486 struct sh_desc *sd;
388 struct sh_dmae_regs hw;
389 487
488 spin_lock_bh(&sh_chan->desc_lock);
390 /* DMA work check */ 489 /* DMA work check */
391 if (dmae_is_idle(sh_chan)) 490 if (dmae_is_busy(sh_chan)) {
491 spin_unlock_bh(&sh_chan->desc_lock);
392 return; 492 return;
493 }
393 494
394 /* Find the first un-transfer desciptor */ 495 /* Find the first un-transfer desciptor */
395 for (ld_node = sh_chan->ld_queue.next; 496 list_for_each_entry(sd, &sh_chan->ld_queue, node)
396 (ld_node != &sh_chan->ld_queue) 497 if (sd->mark == DESC_SUBMITTED) {
397 && (to_sh_desc(ld_node)->mark == DESC_COMP); 498 /* Get the ld start address from ld_queue */
398 ld_node = ld_node->next) 499 dmae_set_reg(sh_chan, &sd->hw);
399 cpu_relax(); 500 dmae_start(sh_chan);
400 501 break;
401 if (ld_node != &sh_chan->ld_queue) { 502 }
402 /* Get the ld start address from ld_queue */ 503
403 hw = to_sh_desc(ld_node)->hw; 504 spin_unlock_bh(&sh_chan->desc_lock);
404 dmae_set_reg(sh_chan, hw);
405 dmae_start(sh_chan);
406 }
407} 505}
408 506
409static void sh_dmae_memcpy_issue_pending(struct dma_chan *chan) 507static void sh_dmae_memcpy_issue_pending(struct dma_chan *chan)
@@ -421,12 +519,11 @@ static enum dma_status sh_dmae_is_complete(struct dma_chan *chan,
421 dma_cookie_t last_used; 519 dma_cookie_t last_used;
422 dma_cookie_t last_complete; 520 dma_cookie_t last_complete;
423 521
424 sh_dmae_chan_ld_cleanup(sh_chan); 522 sh_dmae_chan_ld_cleanup(sh_chan, false);
425 523
426 last_used = chan->cookie; 524 last_used = chan->cookie;
427 last_complete = sh_chan->completed_cookie; 525 last_complete = sh_chan->completed_cookie;
428 if (last_complete == -EBUSY) 526 BUG_ON(last_complete < 0);
429 last_complete = last_used;
430 527
431 if (done) 528 if (done)
432 *done = last_complete; 529 *done = last_complete;
@@ -481,11 +578,13 @@ static irqreturn_t sh_dmae_err(int irq, void *data)
481 err = sh_dmae_rst(0); 578 err = sh_dmae_rst(0);
482 if (err) 579 if (err)
483 return err; 580 return err;
581#ifdef SH_DMAC_BASE1
484 if (shdev->pdata.mode & SHDMA_DMAOR1) { 582 if (shdev->pdata.mode & SHDMA_DMAOR1) {
485 err = sh_dmae_rst(1); 583 err = sh_dmae_rst(1);
486 if (err) 584 if (err)
487 return err; 585 return err;
488 } 586 }
587#endif
489 disable_irq(irq); 588 disable_irq(irq);
490 return IRQ_HANDLED; 589 return IRQ_HANDLED;
491 } 590 }
@@ -495,34 +594,25 @@ static irqreturn_t sh_dmae_err(int irq, void *data)
495static void dmae_do_tasklet(unsigned long data) 594static void dmae_do_tasklet(unsigned long data)
496{ 595{
497 struct sh_dmae_chan *sh_chan = (struct sh_dmae_chan *)data; 596 struct sh_dmae_chan *sh_chan = (struct sh_dmae_chan *)data;
498 struct sh_desc *desc, *_desc, *cur_desc = NULL; 597 struct sh_desc *desc;
499 u32 sar_buf = sh_dmae_readl(sh_chan, SAR); 598 u32 sar_buf = sh_dmae_readl(sh_chan, SAR);
500 list_for_each_entry_safe(desc, _desc,
501 &sh_chan->ld_queue, node) {
502 if ((desc->hw.sar + desc->hw.tcr) == sar_buf) {
503 cur_desc = desc;
504 break;
505 }
506 }
507 599
508 if (cur_desc) { 600 spin_lock(&sh_chan->desc_lock);
509 switch (cur_desc->async_tx.cookie) { 601 list_for_each_entry(desc, &sh_chan->ld_queue, node) {
510 case 0: /* other desc data */ 602 if ((desc->hw.sar + desc->hw.tcr) == sar_buf &&
511 break; 603 desc->mark == DESC_SUBMITTED) {
512 case -EBUSY: /* last desc */ 604 dev_dbg(sh_chan->dev, "done #%d@%p dst %u\n",
513 sh_chan->completed_cookie = 605 desc->async_tx.cookie, &desc->async_tx,
514 cur_desc->async_tx.cookie; 606 desc->hw.dar);
515 break; 607 desc->mark = DESC_COMPLETED;
516 default: /* first desc ( 0 < )*/
517 sh_chan->completed_cookie =
518 cur_desc->async_tx.cookie - 1;
519 break; 608 break;
520 } 609 }
521 cur_desc->mark = DESC_COMP;
522 } 610 }
611 spin_unlock(&sh_chan->desc_lock);
612
523 /* Next desc */ 613 /* Next desc */
524 sh_chan_xfer_ld_queue(sh_chan); 614 sh_chan_xfer_ld_queue(sh_chan);
525 sh_dmae_chan_ld_cleanup(sh_chan); 615 sh_dmae_chan_ld_cleanup(sh_chan, false);
526} 616}
527 617
528static unsigned int get_dmae_irq(unsigned int id) 618static unsigned int get_dmae_irq(unsigned int id)
@@ -543,8 +633,8 @@ static int __devinit sh_dmae_chan_probe(struct sh_dmae_device *shdev, int id)
543 /* alloc channel */ 633 /* alloc channel */
544 new_sh_chan = kzalloc(sizeof(struct sh_dmae_chan), GFP_KERNEL); 634 new_sh_chan = kzalloc(sizeof(struct sh_dmae_chan), GFP_KERNEL);
545 if (!new_sh_chan) { 635 if (!new_sh_chan) {
546 dev_err(shdev->common.dev, "No free memory for allocating " 636 dev_err(shdev->common.dev,
547 "dma channels!\n"); 637 "No free memory for allocating dma channels!\n");
548 return -ENOMEM; 638 return -ENOMEM;
549 } 639 }
550 640
@@ -586,8 +676,8 @@ static int __devinit sh_dmae_chan_probe(struct sh_dmae_device *shdev, int id)
586 "sh-dmae%d", new_sh_chan->id); 676 "sh-dmae%d", new_sh_chan->id);
587 677
588 /* set up channel irq */ 678 /* set up channel irq */
589 err = request_irq(irq, &sh_dmae_interrupt, 679 err = request_irq(irq, &sh_dmae_interrupt, irqflags,
590 irqflags, new_sh_chan->dev_id, new_sh_chan); 680 new_sh_chan->dev_id, new_sh_chan);
591 if (err) { 681 if (err) {
592 dev_err(shdev->common.dev, "DMA channel %d request_irq error " 682 dev_err(shdev->common.dev, "DMA channel %d request_irq error "
593 "with return %d\n", id, err); 683 "with return %d\n", id, err);
@@ -676,6 +766,8 @@ static int __init sh_dmae_probe(struct platform_device *pdev)
676 shdev->common.device_is_tx_complete = sh_dmae_is_complete; 766 shdev->common.device_is_tx_complete = sh_dmae_is_complete;
677 shdev->common.device_issue_pending = sh_dmae_memcpy_issue_pending; 767 shdev->common.device_issue_pending = sh_dmae_memcpy_issue_pending;
678 shdev->common.dev = &pdev->dev; 768 shdev->common.dev = &pdev->dev;
769 /* Default transfer size of 32 bytes requires 32-byte alignment */
770 shdev->common.copy_align = 5;
679 771
680#if defined(CONFIG_CPU_SH4) 772#if defined(CONFIG_CPU_SH4)
681 /* Non Mix IRQ mode SH7722/SH7730 etc... */ 773 /* Non Mix IRQ mode SH7722/SH7730 etc... */
@@ -688,8 +780,8 @@ static int __init sh_dmae_probe(struct platform_device *pdev)
688 } 780 }
689 781
690 for (ecnt = 0 ; ecnt < ARRAY_SIZE(eirq); ecnt++) { 782 for (ecnt = 0 ; ecnt < ARRAY_SIZE(eirq); ecnt++) {
691 err = request_irq(eirq[ecnt], sh_dmae_err, 783 err = request_irq(eirq[ecnt], sh_dmae_err, irqflags,
692 irqflags, "DMAC Address Error", shdev); 784 "DMAC Address Error", shdev);
693 if (err) { 785 if (err) {
694 dev_err(&pdev->dev, "DMA device request_irq" 786 dev_err(&pdev->dev, "DMA device request_irq"
695 "error (irq %d) with return %d\n", 787 "error (irq %d) with return %d\n",
diff --git a/drivers/dma/shdma.h b/drivers/dma/shdma.h
index 2b4bc15a2c0a..108f1cffb6f5 100644
--- a/drivers/dma/shdma.h
+++ b/drivers/dma/shdma.h
@@ -13,9 +13,9 @@
13#ifndef __DMA_SHDMA_H 13#ifndef __DMA_SHDMA_H
14#define __DMA_SHDMA_H 14#define __DMA_SHDMA_H
15 15
16#include <linux/device.h>
17#include <linux/dmapool.h>
18#include <linux/dmaengine.h> 16#include <linux/dmaengine.h>
17#include <linux/interrupt.h>
18#include <linux/list.h>
19 19
20#define SH_DMA_TCR_MAX 0x00FFFFFF /* 16MB */ 20#define SH_DMA_TCR_MAX 0x00FFFFFF /* 16MB */
21 21
@@ -26,24 +26,27 @@ struct sh_dmae_regs {
26}; 26};
27 27
28struct sh_desc { 28struct sh_desc {
29 struct list_head tx_list;
30 struct sh_dmae_regs hw; 29 struct sh_dmae_regs hw;
31 struct list_head node; 30 struct list_head node;
32 struct dma_async_tx_descriptor async_tx; 31 struct dma_async_tx_descriptor async_tx;
32 dma_cookie_t cookie;
33 int chunks;
33 int mark; 34 int mark;
34}; 35};
35 36
37struct device;
38
36struct sh_dmae_chan { 39struct sh_dmae_chan {
37 dma_cookie_t completed_cookie; /* The maximum cookie completed */ 40 dma_cookie_t completed_cookie; /* The maximum cookie completed */
38 spinlock_t desc_lock; /* Descriptor operation lock */ 41 spinlock_t desc_lock; /* Descriptor operation lock */
39 struct list_head ld_queue; /* Link descriptors queue */ 42 struct list_head ld_queue; /* Link descriptors queue */
40 struct list_head ld_free; /* Link descriptors free */ 43 struct list_head ld_free; /* Link descriptors free */
41 struct dma_chan common; /* DMA common channel */ 44 struct dma_chan common; /* DMA common channel */
42 struct device *dev; /* Channel device */ 45 struct device *dev; /* Channel device */
43 struct tasklet_struct tasklet; /* Tasklet */ 46 struct tasklet_struct tasklet; /* Tasklet */
44 int descs_allocated; /* desc count */ 47 int descs_allocated; /* desc count */
45 int id; /* Raw id of this channel */ 48 int id; /* Raw id of this channel */
46 char dev_id[16]; /* unique name per DMAC of channel */ 49 char dev_id[16]; /* unique name per DMAC of channel */
47 50
48 /* Set chcr */ 51 /* Set chcr */
49 int (*set_chcr)(struct sh_dmae_chan *sh_chan, u32 regs); 52 int (*set_chcr)(struct sh_dmae_chan *sh_chan, u32 regs);
diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c
index df5b68433f34..3391e6739d06 100644
--- a/drivers/edac/amd64_edac.c
+++ b/drivers/edac/amd64_edac.c
@@ -197,7 +197,7 @@ static int amd64_get_scrub_rate(struct mem_ctl_info *mci, u32 *bw)
197 edac_printk(KERN_DEBUG, EDAC_MC, 197 edac_printk(KERN_DEBUG, EDAC_MC,
198 "pci-read, sdram scrub control value: %d \n", scrubval); 198 "pci-read, sdram scrub control value: %d \n", scrubval);
199 199
200 for (i = 0; ARRAY_SIZE(scrubrates); i++) { 200 for (i = 0; i < ARRAY_SIZE(scrubrates); i++) {
201 if (scrubrates[i].scrubval == scrubval) { 201 if (scrubrates[i].scrubval == scrubval) {
202 *bw = scrubrates[i].bandwidth; 202 *bw = scrubrates[i].bandwidth;
203 status = 0; 203 status = 0;
@@ -1700,11 +1700,14 @@ static void f10_map_sysaddr_to_csrow(struct mem_ctl_info *mci,
1700 */ 1700 */
1701static void amd64_debug_display_dimm_sizes(int ctrl, struct amd64_pvt *pvt) 1701static void amd64_debug_display_dimm_sizes(int ctrl, struct amd64_pvt *pvt)
1702{ 1702{
1703 int dimm, size0, size1; 1703 int dimm, size0, size1, factor = 0;
1704 u32 dbam; 1704 u32 dbam;
1705 u32 *dcsb; 1705 u32 *dcsb;
1706 1706
1707 if (boot_cpu_data.x86 == 0xf) { 1707 if (boot_cpu_data.x86 == 0xf) {
1708 if (pvt->dclr0 & F10_WIDTH_128)
1709 factor = 1;
1710
1708 /* K8 families < revF not supported yet */ 1711 /* K8 families < revF not supported yet */
1709 if (pvt->ext_model < K8_REV_F) 1712 if (pvt->ext_model < K8_REV_F)
1710 return; 1713 return;
@@ -1732,7 +1735,8 @@ static void amd64_debug_display_dimm_sizes(int ctrl, struct amd64_pvt *pvt)
1732 size1 = pvt->ops->dbam_to_cs(pvt, DBAM_DIMM(dimm, dbam)); 1735 size1 = pvt->ops->dbam_to_cs(pvt, DBAM_DIMM(dimm, dbam));
1733 1736
1734 edac_printk(KERN_DEBUG, EDAC_MC, " %d: %5dMB %d: %5dMB\n", 1737 edac_printk(KERN_DEBUG, EDAC_MC, " %d: %5dMB %d: %5dMB\n",
1735 dimm * 2, size0, dimm * 2 + 1, size1); 1738 dimm * 2, size0 << factor,
1739 dimm * 2 + 1, size1 << factor);
1736 } 1740 }
1737} 1741}
1738 1742
@@ -2345,7 +2349,7 @@ static void amd64_read_mc_registers(struct amd64_pvt *pvt)
2345 amd64_read_pci_cfg(pvt->dram_f2_ctl, F10_DCLR_0, &pvt->dclr0); 2349 amd64_read_pci_cfg(pvt->dram_f2_ctl, F10_DCLR_0, &pvt->dclr0);
2346 amd64_read_pci_cfg(pvt->dram_f2_ctl, F10_DCHR_0, &pvt->dchr0); 2350 amd64_read_pci_cfg(pvt->dram_f2_ctl, F10_DCHR_0, &pvt->dchr0);
2347 2351
2348 if (!dct_ganging_enabled(pvt)) { 2352 if (!dct_ganging_enabled(pvt) && boot_cpu_data.x86 >= 0x10) {
2349 amd64_read_pci_cfg(pvt->dram_f2_ctl, F10_DCLR_1, &pvt->dclr1); 2353 amd64_read_pci_cfg(pvt->dram_f2_ctl, F10_DCLR_1, &pvt->dclr1);
2350 amd64_read_pci_cfg(pvt->dram_f2_ctl, F10_DCHR_1, &pvt->dchr1); 2354 amd64_read_pci_cfg(pvt->dram_f2_ctl, F10_DCHR_1, &pvt->dchr1);
2351 } 2355 }
@@ -2654,10 +2658,11 @@ static void amd64_restore_ecc_error_reporting(struct amd64_pvt *pvt)
2654 * the memory system completely. A command line option allows to force-enable 2658 * the memory system completely. A command line option allows to force-enable
2655 * hardware ECC later in amd64_enable_ecc_error_reporting(). 2659 * hardware ECC later in amd64_enable_ecc_error_reporting().
2656 */ 2660 */
2657static const char *ecc_warning = 2661static const char *ecc_msg =
2658 "WARNING: ECC is disabled by BIOS. Module will NOT be loaded.\n" 2662 "ECC disabled in the BIOS or no ECC capability, module will not load.\n"
2659 " Either Enable ECC in the BIOS, or set 'ecc_enable_override'.\n" 2663 " Either enable ECC checking or force module loading by setting "
2660 " Also, use of the override can cause unknown side effects.\n"; 2664 "'ecc_enable_override'.\n"
2665 " (Note that use of the override may cause unknown side effects.)\n";
2661 2666
2662static int amd64_check_ecc_enabled(struct amd64_pvt *pvt) 2667static int amd64_check_ecc_enabled(struct amd64_pvt *pvt)
2663{ 2668{
@@ -2669,7 +2674,7 @@ static int amd64_check_ecc_enabled(struct amd64_pvt *pvt)
2669 2674
2670 ecc_enabled = !!(value & K8_NBCFG_ECC_ENABLE); 2675 ecc_enabled = !!(value & K8_NBCFG_ECC_ENABLE);
2671 if (!ecc_enabled) 2676 if (!ecc_enabled)
2672 amd64_printk(KERN_WARNING, "This node reports that Memory ECC " 2677 amd64_printk(KERN_NOTICE, "This node reports that Memory ECC "
2673 "is currently disabled, set F3x%x[22] (%s).\n", 2678 "is currently disabled, set F3x%x[22] (%s).\n",
2674 K8_NBCFG, pci_name(pvt->misc_f3_ctl)); 2679 K8_NBCFG, pci_name(pvt->misc_f3_ctl));
2675 else 2680 else
@@ -2677,18 +2682,17 @@ static int amd64_check_ecc_enabled(struct amd64_pvt *pvt)
2677 2682
2678 nb_mce_en = amd64_nb_mce_bank_enabled_on_node(pvt->mc_node_id); 2683 nb_mce_en = amd64_nb_mce_bank_enabled_on_node(pvt->mc_node_id);
2679 if (!nb_mce_en) 2684 if (!nb_mce_en)
2680 amd64_printk(KERN_WARNING, "NB MCE bank disabled, set MSR " 2685 amd64_printk(KERN_NOTICE, "NB MCE bank disabled, set MSR "
2681 "0x%08x[4] on node %d to enable.\n", 2686 "0x%08x[4] on node %d to enable.\n",
2682 MSR_IA32_MCG_CTL, pvt->mc_node_id); 2687 MSR_IA32_MCG_CTL, pvt->mc_node_id);
2683 2688
2684 if (!ecc_enabled || !nb_mce_en) { 2689 if (!ecc_enabled || !nb_mce_en) {
2685 if (!ecc_enable_override) { 2690 if (!ecc_enable_override) {
2686 amd64_printk(KERN_WARNING, "%s", ecc_warning); 2691 amd64_printk(KERN_NOTICE, "%s", ecc_msg);
2687 return -ENODEV; 2692 return -ENODEV;
2688 } 2693 }
2689 } else
2690 /* CLEAR the override, since BIOS controlled it */
2691 ecc_enable_override = 0; 2694 ecc_enable_override = 0;
2695 }
2692 2696
2693 return 0; 2697 return 0;
2694} 2698}
@@ -2925,16 +2929,15 @@ static void __devexit amd64_remove_one_instance(struct pci_dev *pdev)
2925 2929
2926 amd64_free_mc_sibling_devices(pvt); 2930 amd64_free_mc_sibling_devices(pvt);
2927 2931
2928 kfree(pvt);
2929 mci->pvt_info = NULL;
2930
2931 mci_lookup[pvt->mc_node_id] = NULL;
2932
2933 /* unregister from EDAC MCE */ 2932 /* unregister from EDAC MCE */
2934 amd_report_gart_errors(false); 2933 amd_report_gart_errors(false);
2935 amd_unregister_ecc_decoder(amd64_decode_bus_error); 2934 amd_unregister_ecc_decoder(amd64_decode_bus_error);
2936 2935
2937 /* Free the EDAC CORE resources */ 2936 /* Free the EDAC CORE resources */
2937 mci->pvt_info = NULL;
2938 mci_lookup[pvt->mc_node_id] = NULL;
2939
2940 kfree(pvt);
2938 edac_mc_free(mci); 2941 edac_mc_free(mci);
2939} 2942}
2940 2943
@@ -3011,25 +3014,29 @@ static void amd64_setup_pci_device(void)
3011static int __init amd64_edac_init(void) 3014static int __init amd64_edac_init(void)
3012{ 3015{
3013 int nb, err = -ENODEV; 3016 int nb, err = -ENODEV;
3017 bool load_ok = false;
3014 3018
3015 edac_printk(KERN_INFO, EDAC_MOD_STR, EDAC_AMD64_VERSION "\n"); 3019 edac_printk(KERN_INFO, EDAC_MOD_STR, EDAC_AMD64_VERSION "\n");
3016 3020
3017 opstate_init(); 3021 opstate_init();
3018 3022
3019 if (cache_k8_northbridges() < 0) 3023 if (cache_k8_northbridges() < 0)
3020 return err; 3024 goto err_ret;
3021 3025
3022 msrs = msrs_alloc(); 3026 msrs = msrs_alloc();
3027 if (!msrs)
3028 goto err_ret;
3023 3029
3024 err = pci_register_driver(&amd64_pci_driver); 3030 err = pci_register_driver(&amd64_pci_driver);
3025 if (err) 3031 if (err)
3026 return err; 3032 goto err_pci;
3027 3033
3028 /* 3034 /*
3029 * At this point, the array 'pvt_lookup[]' contains pointers to alloc'd 3035 * At this point, the array 'pvt_lookup[]' contains pointers to alloc'd
3030 * amd64_pvt structs. These will be used in the 2nd stage init function 3036 * amd64_pvt structs. These will be used in the 2nd stage init function
3031 * to finish initialization of the MC instances. 3037 * to finish initialization of the MC instances.
3032 */ 3038 */
3039 err = -ENODEV;
3033 for (nb = 0; nb < num_k8_northbridges; nb++) { 3040 for (nb = 0; nb < num_k8_northbridges; nb++) {
3034 if (!pvt_lookup[nb]) 3041 if (!pvt_lookup[nb])
3035 continue; 3042 continue;
@@ -3037,16 +3044,21 @@ static int __init amd64_edac_init(void)
3037 err = amd64_init_2nd_stage(pvt_lookup[nb]); 3044 err = amd64_init_2nd_stage(pvt_lookup[nb]);
3038 if (err) 3045 if (err)
3039 goto err_2nd_stage; 3046 goto err_2nd_stage;
3040 }
3041 3047
3042 amd64_setup_pci_device(); 3048 load_ok = true;
3049 }
3043 3050
3044 return 0; 3051 if (load_ok) {
3052 amd64_setup_pci_device();
3053 return 0;
3054 }
3045 3055
3046err_2nd_stage: 3056err_2nd_stage:
3047 debugf0("2nd stage failed\n");
3048 pci_unregister_driver(&amd64_pci_driver); 3057 pci_unregister_driver(&amd64_pci_driver);
3049 3058err_pci:
3059 msrs_free(msrs);
3060 msrs = NULL;
3061err_ret:
3050 return err; 3062 return err;
3051} 3063}
3052 3064
diff --git a/drivers/edac/edac_pci_sysfs.c b/drivers/edac/edac_pci_sysfs.c
index 422728cfe994..fb60a877d768 100644
--- a/drivers/edac/edac_pci_sysfs.c
+++ b/drivers/edac/edac_pci_sysfs.c
@@ -534,8 +534,6 @@ static void edac_pci_dev_parity_clear(struct pci_dev *dev)
534{ 534{
535 u8 header_type; 535 u8 header_type;
536 536
537 debugf0("%s()\n", __func__);
538
539 get_pci_parity_status(dev, 0); 537 get_pci_parity_status(dev, 0);
540 538
541 /* read the device TYPE, looking for bridges */ 539 /* read the device TYPE, looking for bridges */
diff --git a/drivers/edac/i5000_edac.c b/drivers/edac/i5000_edac.c
index 77a9579d7167..adc10a2ac5f6 100644
--- a/drivers/edac/i5000_edac.c
+++ b/drivers/edac/i5000_edac.c
@@ -577,7 +577,13 @@ static void i5000_process_nonfatal_error_info(struct mem_ctl_info *mci,
577 debugf0("\tUncorrected bits= 0x%x\n", ue_errors); 577 debugf0("\tUncorrected bits= 0x%x\n", ue_errors);
578 578
579 branch = EXTRACT_FBDCHAN_INDX(info->ferr_nf_fbd); 579 branch = EXTRACT_FBDCHAN_INDX(info->ferr_nf_fbd);
580 channel = branch; 580
581 /*
582 * According with i5000 datasheet, bit 28 has no significance
583 * for errors M4Err-M12Err and M17Err-M21Err, on FERR_NF_FBD
584 */
585 channel = branch & 2;
586
581 bank = NREC_BANK(info->nrecmema); 587 bank = NREC_BANK(info->nrecmema);
582 rank = NREC_RANK(info->nrecmema); 588 rank = NREC_RANK(info->nrecmema);
583 rdwr = NREC_RDWR(info->nrecmema); 589 rdwr = NREC_RDWR(info->nrecmema);
diff --git a/drivers/edac/mpc85xx_edac.c b/drivers/edac/mpc85xx_edac.c
index cf27402af97b..ecd5928d7110 100644
--- a/drivers/edac/mpc85xx_edac.c
+++ b/drivers/edac/mpc85xx_edac.c
@@ -804,8 +804,8 @@ static void __devinit mpc85xx_init_csrows(struct mem_ctl_info *mci)
804 end <<= (24 - PAGE_SHIFT); 804 end <<= (24 - PAGE_SHIFT);
805 end |= (1 << (24 - PAGE_SHIFT)) - 1; 805 end |= (1 << (24 - PAGE_SHIFT)) - 1;
806 806
807 csrow->first_page = start >> PAGE_SHIFT; 807 csrow->first_page = start;
808 csrow->last_page = end >> PAGE_SHIFT; 808 csrow->last_page = end;
809 csrow->nr_pages = end + 1 - start; 809 csrow->nr_pages = end + 1 - start;
810 csrow->grain = 8; 810 csrow->grain = 8;
811 csrow->mtype = mtype; 811 csrow->mtype = mtype;
@@ -892,10 +892,6 @@ static int __devinit mpc85xx_mc_err_probe(struct of_device *op,
892 892
893 mpc85xx_init_csrows(mci); 893 mpc85xx_init_csrows(mci);
894 894
895#ifdef CONFIG_EDAC_DEBUG
896 edac_mc_register_mcidev_debug((struct attribute **)debug_attr);
897#endif
898
899 /* store the original error disable bits */ 895 /* store the original error disable bits */
900 orig_ddr_err_disable = 896 orig_ddr_err_disable =
901 in_be32(pdata->mc_vbase + MPC85XX_MC_ERR_DISABLE); 897 in_be32(pdata->mc_vbase + MPC85XX_MC_ERR_DISABLE);
diff --git a/drivers/firewire/Kconfig b/drivers/firewire/Kconfig
index 13efcd362072..a9371b36a9b9 100644
--- a/drivers/firewire/Kconfig
+++ b/drivers/firewire/Kconfig
@@ -1,5 +1,10 @@
1menu "IEEE 1394 (FireWire) support"
2 depends on PCI || BROKEN
3 # firewire-core does not depend on PCI but is
4 # not useful without PCI controller driver
5
1comment "You can enable one or both FireWire driver stacks." 6comment "You can enable one or both FireWire driver stacks."
2comment "See the help texts for more information." 7comment "The newer stack is recommended."
3 8
4config FIREWIRE 9config FIREWIRE
5 tristate "FireWire driver stack" 10 tristate "FireWire driver stack"
@@ -15,16 +20,6 @@ config FIREWIRE
15 To compile this driver as a module, say M here: the module will be 20 To compile this driver as a module, say M here: the module will be
16 called firewire-core. 21 called firewire-core.
17 22
18 This module functionally replaces ieee1394, raw1394, and video1394.
19 To access it from application programs, you generally need at least
20 libraw1394 v2. IIDC/DCAM applications need libdc1394 v2.
21 No libraries are required to access storage devices through the
22 firewire-sbp2 driver.
23
24 NOTE:
25 FireWire audio devices currently require the old drivers (ieee1394,
26 ohci1394, raw1394).
27
28config FIREWIRE_OHCI 23config FIREWIRE_OHCI
29 tristate "OHCI-1394 controllers" 24 tristate "OHCI-1394 controllers"
30 depends on PCI && FIREWIRE 25 depends on PCI && FIREWIRE
@@ -34,22 +29,7 @@ config FIREWIRE_OHCI
34 is the only chipset in use, so say Y here. 29 is the only chipset in use, so say Y here.
35 30
36 To compile this driver as a module, say M here: The module will be 31 To compile this driver as a module, say M here: The module will be
37 called firewire-ohci. It replaces ohci1394 of the classic IEEE 1394 32 called firewire-ohci.
38 stack.
39
40 NOTE:
41 If you want to install firewire-ohci and ohci1394 together, you
42 should configure them only as modules and blacklist the driver(s)
43 which you don't want to have auto-loaded. Add either
44
45 blacklist firewire-ohci
46 or
47 blacklist ohci1394
48 blacklist video1394
49 blacklist dv1394
50
51 to /etc/modprobe.conf or /etc/modprobe.d/* and update modprobe.conf
52 depending on your distribution.
53 33
54config FIREWIRE_OHCI_DEBUG 34config FIREWIRE_OHCI_DEBUG
55 bool 35 bool
@@ -66,8 +46,7 @@ config FIREWIRE_SBP2
66 like scanners. 46 like scanners.
67 47
68 To compile this driver as a module, say M here: The module will be 48 To compile this driver as a module, say M here: The module will be
69 called firewire-sbp2. It replaces sbp2 of the classic IEEE 1394 49 called firewire-sbp2.
70 stack.
71 50
72 You should also enable support for disks, CD-ROMs, etc. in the SCSI 51 You should also enable support for disks, CD-ROMs, etc. in the SCSI
73 configuration section. 52 configuration section.
@@ -83,5 +62,8 @@ config FIREWIRE_NET
83 NOTE, this driver is not stable yet! 62 NOTE, this driver is not stable yet!
84 63
85 To compile this driver as a module, say M here: The module will be 64 To compile this driver as a module, say M here: The module will be
86 called firewire-net. It replaces eth1394 of the classic IEEE 1394 65 called firewire-net.
87 stack. 66
67source "drivers/ieee1394/Kconfig"
68
69endmenu
diff --git a/drivers/firewire/core-card.c b/drivers/firewire/core-card.c
index 7083bcc1b9c7..5045156c5313 100644
--- a/drivers/firewire/core-card.c
+++ b/drivers/firewire/core-card.c
@@ -57,6 +57,8 @@ static LIST_HEAD(descriptor_list);
57static int descriptor_count; 57static int descriptor_count;
58 58
59static __be32 tmp_config_rom[256]; 59static __be32 tmp_config_rom[256];
60/* ROM header, bus info block, root dir header, capabilities = 7 quadlets */
61static size_t config_rom_length = 1 + 4 + 1 + 1;
60 62
61#define BIB_CRC(v) ((v) << 0) 63#define BIB_CRC(v) ((v) << 0)
62#define BIB_CRC_LENGTH(v) ((v) << 16) 64#define BIB_CRC_LENGTH(v) ((v) << 16)
@@ -73,7 +75,7 @@ static __be32 tmp_config_rom[256];
73#define BIB_CMC ((1) << 30) 75#define BIB_CMC ((1) << 30)
74#define BIB_IMC ((1) << 31) 76#define BIB_IMC ((1) << 31)
75 77
76static size_t generate_config_rom(struct fw_card *card, __be32 *config_rom) 78static void generate_config_rom(struct fw_card *card, __be32 *config_rom)
77{ 79{
78 struct fw_descriptor *desc; 80 struct fw_descriptor *desc;
79 int i, j, k, length; 81 int i, j, k, length;
@@ -130,23 +132,30 @@ static size_t generate_config_rom(struct fw_card *card, __be32 *config_rom)
130 for (i = 0; i < j; i += length + 1) 132 for (i = 0; i < j; i += length + 1)
131 length = fw_compute_block_crc(config_rom + i); 133 length = fw_compute_block_crc(config_rom + i);
132 134
133 return j; 135 WARN_ON(j != config_rom_length);
134} 136}
135 137
136static void update_config_roms(void) 138static void update_config_roms(void)
137{ 139{
138 struct fw_card *card; 140 struct fw_card *card;
139 size_t length;
140 141
141 list_for_each_entry (card, &card_list, link) { 142 list_for_each_entry (card, &card_list, link) {
142 length = generate_config_rom(card, tmp_config_rom); 143 generate_config_rom(card, tmp_config_rom);
143 card->driver->set_config_rom(card, tmp_config_rom, length); 144 card->driver->set_config_rom(card, tmp_config_rom,
145 config_rom_length);
144 } 146 }
145} 147}
146 148
149static size_t required_space(struct fw_descriptor *desc)
150{
151 /* descriptor + entry into root dir + optional immediate entry */
152 return desc->length + 1 + (desc->immediate > 0 ? 1 : 0);
153}
154
147int fw_core_add_descriptor(struct fw_descriptor *desc) 155int fw_core_add_descriptor(struct fw_descriptor *desc)
148{ 156{
149 size_t i; 157 size_t i;
158 int ret;
150 159
151 /* 160 /*
152 * Check descriptor is valid; the length of all blocks in the 161 * Check descriptor is valid; the length of all blocks in the
@@ -162,15 +171,21 @@ int fw_core_add_descriptor(struct fw_descriptor *desc)
162 171
163 mutex_lock(&card_mutex); 172 mutex_lock(&card_mutex);
164 173
165 list_add_tail(&desc->link, &descriptor_list); 174 if (config_rom_length + required_space(desc) > 256) {
166 descriptor_count++; 175 ret = -EBUSY;
167 if (desc->immediate > 0) 176 } else {
177 list_add_tail(&desc->link, &descriptor_list);
178 config_rom_length += required_space(desc);
168 descriptor_count++; 179 descriptor_count++;
169 update_config_roms(); 180 if (desc->immediate > 0)
181 descriptor_count++;
182 update_config_roms();
183 ret = 0;
184 }
170 185
171 mutex_unlock(&card_mutex); 186 mutex_unlock(&card_mutex);
172 187
173 return 0; 188 return ret;
174} 189}
175EXPORT_SYMBOL(fw_core_add_descriptor); 190EXPORT_SYMBOL(fw_core_add_descriptor);
176 191
@@ -179,6 +194,7 @@ void fw_core_remove_descriptor(struct fw_descriptor *desc)
179 mutex_lock(&card_mutex); 194 mutex_lock(&card_mutex);
180 195
181 list_del(&desc->link); 196 list_del(&desc->link);
197 config_rom_length -= required_space(desc);
182 descriptor_count--; 198 descriptor_count--;
183 if (desc->immediate > 0) 199 if (desc->immediate > 0)
184 descriptor_count--; 200 descriptor_count--;
@@ -428,7 +444,6 @@ EXPORT_SYMBOL(fw_card_initialize);
428int fw_card_add(struct fw_card *card, 444int fw_card_add(struct fw_card *card,
429 u32 max_receive, u32 link_speed, u64 guid) 445 u32 max_receive, u32 link_speed, u64 guid)
430{ 446{
431 size_t length;
432 int ret; 447 int ret;
433 448
434 card->max_receive = max_receive; 449 card->max_receive = max_receive;
@@ -437,8 +452,8 @@ int fw_card_add(struct fw_card *card,
437 452
438 mutex_lock(&card_mutex); 453 mutex_lock(&card_mutex);
439 454
440 length = generate_config_rom(card, tmp_config_rom); 455 generate_config_rom(card, tmp_config_rom);
441 ret = card->driver->enable(card, tmp_config_rom, length); 456 ret = card->driver->enable(card, tmp_config_rom, config_rom_length);
442 if (ret == 0) 457 if (ret == 0)
443 list_add_tail(&card->link, &card_list); 458 list_add_tail(&card->link, &card_list);
444 459
diff --git a/drivers/firewire/core-cdev.c b/drivers/firewire/core-cdev.c
index 231e6ee5ba43..4eeaed57e219 100644
--- a/drivers/firewire/core-cdev.c
+++ b/drivers/firewire/core-cdev.c
@@ -35,6 +35,7 @@
35#include <linux/preempt.h> 35#include <linux/preempt.h>
36#include <linux/sched.h> 36#include <linux/sched.h>
37#include <linux/spinlock.h> 37#include <linux/spinlock.h>
38#include <linux/string.h>
38#include <linux/time.h> 39#include <linux/time.h>
39#include <linux/uaccess.h> 40#include <linux/uaccess.h>
40#include <linux/vmalloc.h> 41#include <linux/vmalloc.h>
@@ -595,14 +596,22 @@ static int ioctl_send_request(struct client *client, void *buffer)
595 client->device->max_speed); 596 client->device->max_speed);
596} 597}
597 598
599static inline bool is_fcp_request(struct fw_request *request)
600{
601 return request == NULL;
602}
603
598static void release_request(struct client *client, 604static void release_request(struct client *client,
599 struct client_resource *resource) 605 struct client_resource *resource)
600{ 606{
601 struct inbound_transaction_resource *r = container_of(resource, 607 struct inbound_transaction_resource *r = container_of(resource,
602 struct inbound_transaction_resource, resource); 608 struct inbound_transaction_resource, resource);
603 609
604 fw_send_response(client->device->card, r->request, 610 if (is_fcp_request(r->request))
605 RCODE_CONFLICT_ERROR); 611 kfree(r->data);
612 else
613 fw_send_response(client->device->card, r->request,
614 RCODE_CONFLICT_ERROR);
606 kfree(r); 615 kfree(r);
607} 616}
608 617
@@ -615,6 +624,7 @@ static void handle_request(struct fw_card *card, struct fw_request *request,
615 struct address_handler_resource *handler = callback_data; 624 struct address_handler_resource *handler = callback_data;
616 struct inbound_transaction_resource *r; 625 struct inbound_transaction_resource *r;
617 struct inbound_transaction_event *e; 626 struct inbound_transaction_event *e;
627 void *fcp_frame = NULL;
618 int ret; 628 int ret;
619 629
620 r = kmalloc(sizeof(*r), GFP_ATOMIC); 630 r = kmalloc(sizeof(*r), GFP_ATOMIC);
@@ -626,6 +636,18 @@ static void handle_request(struct fw_card *card, struct fw_request *request,
626 r->data = payload; 636 r->data = payload;
627 r->length = length; 637 r->length = length;
628 638
639 if (is_fcp_request(request)) {
640 /*
641 * FIXME: Let core-transaction.c manage a
642 * single reference-counted copy?
643 */
644 fcp_frame = kmemdup(payload, length, GFP_ATOMIC);
645 if (fcp_frame == NULL)
646 goto failed;
647
648 r->data = fcp_frame;
649 }
650
629 r->resource.release = release_request; 651 r->resource.release = release_request;
630 ret = add_client_resource(handler->client, &r->resource, GFP_ATOMIC); 652 ret = add_client_resource(handler->client, &r->resource, GFP_ATOMIC);
631 if (ret < 0) 653 if (ret < 0)
@@ -639,13 +661,16 @@ static void handle_request(struct fw_card *card, struct fw_request *request,
639 e->request.closure = handler->closure; 661 e->request.closure = handler->closure;
640 662
641 queue_event(handler->client, &e->event, 663 queue_event(handler->client, &e->event,
642 &e->request, sizeof(e->request), payload, length); 664 &e->request, sizeof(e->request), r->data, length);
643 return; 665 return;
644 666
645 failed: 667 failed:
646 kfree(r); 668 kfree(r);
647 kfree(e); 669 kfree(e);
648 fw_send_response(card, request, RCODE_CONFLICT_ERROR); 670 kfree(fcp_frame);
671
672 if (!is_fcp_request(request))
673 fw_send_response(card, request, RCODE_CONFLICT_ERROR);
649} 674}
650 675
651static void release_address_handler(struct client *client, 676static void release_address_handler(struct client *client,
@@ -715,14 +740,16 @@ static int ioctl_send_response(struct client *client, void *buffer)
715 740
716 r = container_of(resource, struct inbound_transaction_resource, 741 r = container_of(resource, struct inbound_transaction_resource,
717 resource); 742 resource);
743 if (is_fcp_request(r->request))
744 goto out;
745
718 if (request->length < r->length) 746 if (request->length < r->length)
719 r->length = request->length; 747 r->length = request->length;
720
721 if (copy_from_user(r->data, u64_to_uptr(request->data), r->length)) { 748 if (copy_from_user(r->data, u64_to_uptr(request->data), r->length)) {
722 ret = -EFAULT; 749 ret = -EFAULT;
750 kfree(r->request);
723 goto out; 751 goto out;
724 } 752 }
725
726 fw_send_response(client->device->card, r->request, request->rcode); 753 fw_send_response(client->device->card, r->request, request->rcode);
727 out: 754 out:
728 kfree(r); 755 kfree(r);
diff --git a/drivers/firewire/core-transaction.c b/drivers/firewire/core-transaction.c
index 842739df23e2..495849eb13cc 100644
--- a/drivers/firewire/core-transaction.c
+++ b/drivers/firewire/core-transaction.c
@@ -432,14 +432,20 @@ static struct fw_address_handler *lookup_overlapping_address_handler(
432 return NULL; 432 return NULL;
433} 433}
434 434
435static bool is_enclosing_handler(struct fw_address_handler *handler,
436 unsigned long long offset, size_t length)
437{
438 return handler->offset <= offset &&
439 offset + length <= handler->offset + handler->length;
440}
441
435static struct fw_address_handler *lookup_enclosing_address_handler( 442static struct fw_address_handler *lookup_enclosing_address_handler(
436 struct list_head *list, unsigned long long offset, size_t length) 443 struct list_head *list, unsigned long long offset, size_t length)
437{ 444{
438 struct fw_address_handler *handler; 445 struct fw_address_handler *handler;
439 446
440 list_for_each_entry(handler, list, link) { 447 list_for_each_entry(handler, list, link) {
441 if (handler->offset <= offset && 448 if (is_enclosing_handler(handler, offset, length))
442 offset + length <= handler->offset + handler->length)
443 return handler; 449 return handler;
444 } 450 }
445 451
@@ -465,6 +471,12 @@ const struct fw_address_region fw_unit_space_region =
465 { .start = 0xfffff0000900ULL, .end = 0x1000000000000ULL, }; 471 { .start = 0xfffff0000900ULL, .end = 0x1000000000000ULL, };
466#endif /* 0 */ 472#endif /* 0 */
467 473
474static bool is_in_fcp_region(u64 offset, size_t length)
475{
476 return offset >= (CSR_REGISTER_BASE | CSR_FCP_COMMAND) &&
477 offset + length <= (CSR_REGISTER_BASE | CSR_FCP_END);
478}
479
468/** 480/**
469 * fw_core_add_address_handler - register for incoming requests 481 * fw_core_add_address_handler - register for incoming requests
470 * @handler: callback 482 * @handler: callback
@@ -477,8 +489,11 @@ const struct fw_address_region fw_unit_space_region =
477 * give the details of the particular request. 489 * give the details of the particular request.
478 * 490 *
479 * Return value: 0 on success, non-zero otherwise. 491 * Return value: 0 on success, non-zero otherwise.
492 *
480 * The start offset of the handler's address region is determined by 493 * The start offset of the handler's address region is determined by
481 * fw_core_add_address_handler() and is returned in handler->offset. 494 * fw_core_add_address_handler() and is returned in handler->offset.
495 *
496 * Address allocations are exclusive, except for the FCP registers.
482 */ 497 */
483int fw_core_add_address_handler(struct fw_address_handler *handler, 498int fw_core_add_address_handler(struct fw_address_handler *handler,
484 const struct fw_address_region *region) 499 const struct fw_address_region *region)
@@ -498,10 +513,12 @@ int fw_core_add_address_handler(struct fw_address_handler *handler,
498 513
499 handler->offset = region->start; 514 handler->offset = region->start;
500 while (handler->offset + handler->length <= region->end) { 515 while (handler->offset + handler->length <= region->end) {
501 other = 516 if (is_in_fcp_region(handler->offset, handler->length))
502 lookup_overlapping_address_handler(&address_handler_list, 517 other = NULL;
503 handler->offset, 518 else
504 handler->length); 519 other = lookup_overlapping_address_handler
520 (&address_handler_list,
521 handler->offset, handler->length);
505 if (other != NULL) { 522 if (other != NULL) {
506 handler->offset += other->length; 523 handler->offset += other->length;
507 } else { 524 } else {
@@ -668,6 +685,9 @@ static struct fw_request *allocate_request(struct fw_packet *p)
668void fw_send_response(struct fw_card *card, 685void fw_send_response(struct fw_card *card,
669 struct fw_request *request, int rcode) 686 struct fw_request *request, int rcode)
670{ 687{
688 if (WARN_ONCE(!request, "invalid for FCP address handlers"))
689 return;
690
671 /* unified transaction or broadcast transaction: don't respond */ 691 /* unified transaction or broadcast transaction: don't respond */
672 if (request->ack != ACK_PENDING || 692 if (request->ack != ACK_PENDING ||
673 HEADER_DESTINATION_IS_BROADCAST(request->request_header[0])) { 693 HEADER_DESTINATION_IS_BROADCAST(request->request_header[0])) {
@@ -686,26 +706,15 @@ void fw_send_response(struct fw_card *card,
686} 706}
687EXPORT_SYMBOL(fw_send_response); 707EXPORT_SYMBOL(fw_send_response);
688 708
689void fw_core_handle_request(struct fw_card *card, struct fw_packet *p) 709static void handle_exclusive_region_request(struct fw_card *card,
710 struct fw_packet *p,
711 struct fw_request *request,
712 unsigned long long offset)
690{ 713{
691 struct fw_address_handler *handler; 714 struct fw_address_handler *handler;
692 struct fw_request *request;
693 unsigned long long offset;
694 unsigned long flags; 715 unsigned long flags;
695 int tcode, destination, source; 716 int tcode, destination, source;
696 717
697 if (p->ack != ACK_PENDING && p->ack != ACK_COMPLETE)
698 return;
699
700 request = allocate_request(p);
701 if (request == NULL) {
702 /* FIXME: send statically allocated busy packet. */
703 return;
704 }
705
706 offset =
707 ((unsigned long long)
708 HEADER_GET_OFFSET_HIGH(p->header[1]) << 32) | p->header[2];
709 tcode = HEADER_GET_TCODE(p->header[0]); 718 tcode = HEADER_GET_TCODE(p->header[0]);
710 destination = HEADER_GET_DESTINATION(p->header[0]); 719 destination = HEADER_GET_DESTINATION(p->header[0]);
711 source = HEADER_GET_SOURCE(p->header[1]); 720 source = HEADER_GET_SOURCE(p->header[1]);
@@ -732,6 +741,73 @@ void fw_core_handle_request(struct fw_card *card, struct fw_packet *p)
732 request->data, request->length, 741 request->data, request->length,
733 handler->callback_data); 742 handler->callback_data);
734} 743}
744
745static void handle_fcp_region_request(struct fw_card *card,
746 struct fw_packet *p,
747 struct fw_request *request,
748 unsigned long long offset)
749{
750 struct fw_address_handler *handler;
751 unsigned long flags;
752 int tcode, destination, source;
753
754 if ((offset != (CSR_REGISTER_BASE | CSR_FCP_COMMAND) &&
755 offset != (CSR_REGISTER_BASE | CSR_FCP_RESPONSE)) ||
756 request->length > 0x200) {
757 fw_send_response(card, request, RCODE_ADDRESS_ERROR);
758
759 return;
760 }
761
762 tcode = HEADER_GET_TCODE(p->header[0]);
763 destination = HEADER_GET_DESTINATION(p->header[0]);
764 source = HEADER_GET_SOURCE(p->header[1]);
765
766 if (tcode != TCODE_WRITE_QUADLET_REQUEST &&
767 tcode != TCODE_WRITE_BLOCK_REQUEST) {
768 fw_send_response(card, request, RCODE_TYPE_ERROR);
769
770 return;
771 }
772
773 spin_lock_irqsave(&address_handler_lock, flags);
774 list_for_each_entry(handler, &address_handler_list, link) {
775 if (is_enclosing_handler(handler, offset, request->length))
776 handler->address_callback(card, NULL, tcode,
777 destination, source,
778 p->generation, p->speed,
779 offset, request->data,
780 request->length,
781 handler->callback_data);
782 }
783 spin_unlock_irqrestore(&address_handler_lock, flags);
784
785 fw_send_response(card, request, RCODE_COMPLETE);
786}
787
788void fw_core_handle_request(struct fw_card *card, struct fw_packet *p)
789{
790 struct fw_request *request;
791 unsigned long long offset;
792
793 if (p->ack != ACK_PENDING && p->ack != ACK_COMPLETE)
794 return;
795
796 request = allocate_request(p);
797 if (request == NULL) {
798 /* FIXME: send statically allocated busy packet. */
799 return;
800 }
801
802 offset = ((u64)HEADER_GET_OFFSET_HIGH(p->header[1]) << 32) |
803 p->header[2];
804
805 if (!is_in_fcp_region(offset, request->length))
806 handle_exclusive_region_request(card, p, request, offset);
807 else
808 handle_fcp_region_request(card, p, request, offset);
809
810}
735EXPORT_SYMBOL(fw_core_handle_request); 811EXPORT_SYMBOL(fw_core_handle_request);
736 812
737void fw_core_handle_response(struct fw_card *card, struct fw_packet *p) 813void fw_core_handle_response(struct fw_card *card, struct fw_packet *p)
diff --git a/drivers/firewire/net.c b/drivers/firewire/net.c
index cbaf420c36c5..2d3dc7ded0a9 100644
--- a/drivers/firewire/net.c
+++ b/drivers/firewire/net.c
@@ -893,20 +893,31 @@ static void fwnet_receive_broadcast(struct fw_iso_context *context,
893 893
894static struct kmem_cache *fwnet_packet_task_cache; 894static struct kmem_cache *fwnet_packet_task_cache;
895 895
896static void fwnet_free_ptask(struct fwnet_packet_task *ptask)
897{
898 dev_kfree_skb_any(ptask->skb);
899 kmem_cache_free(fwnet_packet_task_cache, ptask);
900}
901
896static int fwnet_send_packet(struct fwnet_packet_task *ptask); 902static int fwnet_send_packet(struct fwnet_packet_task *ptask);
897 903
898static void fwnet_transmit_packet_done(struct fwnet_packet_task *ptask) 904static void fwnet_transmit_packet_done(struct fwnet_packet_task *ptask)
899{ 905{
900 struct fwnet_device *dev; 906 struct fwnet_device *dev = ptask->dev;
901 unsigned long flags; 907 unsigned long flags;
902 908 bool free;
903 dev = ptask->dev;
904 909
905 spin_lock_irqsave(&dev->lock, flags); 910 spin_lock_irqsave(&dev->lock, flags);
906 list_del(&ptask->pt_link);
907 spin_unlock_irqrestore(&dev->lock, flags);
908 911
909 ptask->outstanding_pkts--; /* FIXME access inside lock */ 912 ptask->outstanding_pkts--;
913
914 /* Check whether we or the networking TX soft-IRQ is last user. */
915 free = (ptask->outstanding_pkts == 0 && !list_empty(&ptask->pt_link));
916
917 if (ptask->outstanding_pkts == 0)
918 list_del(&ptask->pt_link);
919
920 spin_unlock_irqrestore(&dev->lock, flags);
910 921
911 if (ptask->outstanding_pkts > 0) { 922 if (ptask->outstanding_pkts > 0) {
912 u16 dg_size; 923 u16 dg_size;
@@ -951,10 +962,10 @@ static void fwnet_transmit_packet_done(struct fwnet_packet_task *ptask)
951 ptask->max_payload = skb->len + RFC2374_FRAG_HDR_SIZE; 962 ptask->max_payload = skb->len + RFC2374_FRAG_HDR_SIZE;
952 } 963 }
953 fwnet_send_packet(ptask); 964 fwnet_send_packet(ptask);
954 } else {
955 dev_kfree_skb_any(ptask->skb);
956 kmem_cache_free(fwnet_packet_task_cache, ptask);
957 } 965 }
966
967 if (free)
968 fwnet_free_ptask(ptask);
958} 969}
959 970
960static void fwnet_write_complete(struct fw_card *card, int rcode, 971static void fwnet_write_complete(struct fw_card *card, int rcode,
@@ -977,6 +988,7 @@ static int fwnet_send_packet(struct fwnet_packet_task *ptask)
977 unsigned tx_len; 988 unsigned tx_len;
978 struct rfc2734_header *bufhdr; 989 struct rfc2734_header *bufhdr;
979 unsigned long flags; 990 unsigned long flags;
991 bool free;
980 992
981 dev = ptask->dev; 993 dev = ptask->dev;
982 tx_len = ptask->max_payload; 994 tx_len = ptask->max_payload;
@@ -1022,12 +1034,16 @@ static int fwnet_send_packet(struct fwnet_packet_task *ptask)
1022 generation, SCODE_100, 0ULL, ptask->skb->data, 1034 generation, SCODE_100, 0ULL, ptask->skb->data,
1023 tx_len + 8, fwnet_write_complete, ptask); 1035 tx_len + 8, fwnet_write_complete, ptask);
1024 1036
1025 /* FIXME race? */
1026 spin_lock_irqsave(&dev->lock, flags); 1037 spin_lock_irqsave(&dev->lock, flags);
1027 list_add_tail(&ptask->pt_link, &dev->broadcasted_list); 1038
1039 /* If the AT tasklet already ran, we may be last user. */
1040 free = (ptask->outstanding_pkts == 0 && list_empty(&ptask->pt_link));
1041 if (!free)
1042 list_add_tail(&ptask->pt_link, &dev->broadcasted_list);
1043
1028 spin_unlock_irqrestore(&dev->lock, flags); 1044 spin_unlock_irqrestore(&dev->lock, flags);
1029 1045
1030 return 0; 1046 goto out;
1031 } 1047 }
1032 1048
1033 fw_send_request(dev->card, &ptask->transaction, 1049 fw_send_request(dev->card, &ptask->transaction,
@@ -1035,12 +1051,19 @@ static int fwnet_send_packet(struct fwnet_packet_task *ptask)
1035 ptask->generation, ptask->speed, ptask->fifo_addr, 1051 ptask->generation, ptask->speed, ptask->fifo_addr,
1036 ptask->skb->data, tx_len, fwnet_write_complete, ptask); 1052 ptask->skb->data, tx_len, fwnet_write_complete, ptask);
1037 1053
1038 /* FIXME race? */
1039 spin_lock_irqsave(&dev->lock, flags); 1054 spin_lock_irqsave(&dev->lock, flags);
1040 list_add_tail(&ptask->pt_link, &dev->sent_list); 1055
1056 /* If the AT tasklet already ran, we may be last user. */
1057 free = (ptask->outstanding_pkts == 0 && list_empty(&ptask->pt_link));
1058 if (!free)
1059 list_add_tail(&ptask->pt_link, &dev->sent_list);
1060
1041 spin_unlock_irqrestore(&dev->lock, flags); 1061 spin_unlock_irqrestore(&dev->lock, flags);
1042 1062
1043 dev->netdev->trans_start = jiffies; 1063 dev->netdev->trans_start = jiffies;
1064 out:
1065 if (free)
1066 fwnet_free_ptask(ptask);
1044 1067
1045 return 0; 1068 return 0;
1046} 1069}
@@ -1298,6 +1321,8 @@ static netdev_tx_t fwnet_tx(struct sk_buff *skb, struct net_device *net)
1298 spin_unlock_irqrestore(&dev->lock, flags); 1321 spin_unlock_irqrestore(&dev->lock, flags);
1299 1322
1300 ptask->max_payload = max_payload; 1323 ptask->max_payload = max_payload;
1324 INIT_LIST_HEAD(&ptask->pt_link);
1325
1301 fwnet_send_packet(ptask); 1326 fwnet_send_packet(ptask);
1302 1327
1303 return NETDEV_TX_OK; 1328 return NETDEV_TX_OK;
diff --git a/drivers/firewire/ohci.c b/drivers/firewire/ohci.c
index 96768e160866..43ebf337b131 100644
--- a/drivers/firewire/ohci.c
+++ b/drivers/firewire/ohci.c
@@ -2101,11 +2101,6 @@ static int ohci_queue_iso_transmit(struct fw_iso_context *base,
2101 u32 payload_index, payload_end_index, next_page_index; 2101 u32 payload_index, payload_end_index, next_page_index;
2102 int page, end_page, i, length, offset; 2102 int page, end_page, i, length, offset;
2103 2103
2104 /*
2105 * FIXME: Cycle lost behavior should be configurable: lose
2106 * packet, retransmit or terminate..
2107 */
2108
2109 p = packet; 2104 p = packet;
2110 payload_index = payload; 2105 payload_index = payload;
2111 2106
@@ -2135,6 +2130,14 @@ static int ohci_queue_iso_transmit(struct fw_iso_context *base,
2135 if (!p->skip) { 2130 if (!p->skip) {
2136 d[0].control = cpu_to_le16(DESCRIPTOR_KEY_IMMEDIATE); 2131 d[0].control = cpu_to_le16(DESCRIPTOR_KEY_IMMEDIATE);
2137 d[0].req_count = cpu_to_le16(8); 2132 d[0].req_count = cpu_to_le16(8);
2133 /*
2134 * Link the skip address to this descriptor itself. This causes
2135 * a context to skip a cycle whenever lost cycles or FIFO
2136 * overruns occur, without dropping the data. The application
2137 * should then decide whether this is an error condition or not.
2138 * FIXME: Make the context's cycle-lost behaviour configurable?
2139 */
2140 d[0].branch_address = cpu_to_le32(d_bus | z);
2138 2141
2139 header = (__le32 *) &d[1]; 2142 header = (__le32 *) &d[1];
2140 header[0] = cpu_to_le32(IT_HEADER_SY(p->sy) | 2143 header[0] = cpu_to_le32(IT_HEADER_SY(p->sy) |
@@ -2226,7 +2229,6 @@ static int ohci_queue_iso_receive_dualbuffer(struct fw_iso_context *base,
2226 if (rest == 0) 2229 if (rest == 0)
2227 return -EINVAL; 2230 return -EINVAL;
2228 2231
2229 /* FIXME: make packet-per-buffer/dual-buffer a context option */
2230 while (rest > 0) { 2232 while (rest > 0) {
2231 d = context_get_descriptors(&ctx->context, 2233 d = context_get_descriptors(&ctx->context,
2232 z + header_z, &d_bus); 2234 z + header_z, &d_bus);
@@ -2421,6 +2423,7 @@ static void ohci_pmac_off(struct pci_dev *dev)
2421 2423
2422#define PCI_VENDOR_ID_AGERE PCI_VENDOR_ID_ATT 2424#define PCI_VENDOR_ID_AGERE PCI_VENDOR_ID_ATT
2423#define PCI_DEVICE_ID_AGERE_FW643 0x5901 2425#define PCI_DEVICE_ID_AGERE_FW643 0x5901
2426#define PCI_DEVICE_ID_TI_TSB43AB23 0x8024
2424 2427
2425static int __devinit pci_probe(struct pci_dev *dev, 2428static int __devinit pci_probe(struct pci_dev *dev,
2426 const struct pci_device_id *ent) 2429 const struct pci_device_id *ent)
@@ -2470,7 +2473,10 @@ static int __devinit pci_probe(struct pci_dev *dev,
2470 } 2473 }
2471 2474
2472 version = reg_read(ohci, OHCI1394_Version) & 0x00ff00ff; 2475 version = reg_read(ohci, OHCI1394_Version) & 0x00ff00ff;
2476#if 0
2477 /* FIXME: make it a context option or remove dual-buffer mode */
2473 ohci->use_dualbuffer = version >= OHCI_VERSION_1_1; 2478 ohci->use_dualbuffer = version >= OHCI_VERSION_1_1;
2479#endif
2474 2480
2475 /* dual-buffer mode is broken if more than one IR context is active */ 2481 /* dual-buffer mode is broken if more than one IR context is active */
2476 if (dev->vendor == PCI_VENDOR_ID_AGERE && 2482 if (dev->vendor == PCI_VENDOR_ID_AGERE &&
@@ -2486,7 +2492,8 @@ static int __devinit pci_probe(struct pci_dev *dev,
2486#if !defined(CONFIG_X86_32) 2492#if !defined(CONFIG_X86_32)
2487 /* dual-buffer mode is broken with descriptor addresses above 2G */ 2493 /* dual-buffer mode is broken with descriptor addresses above 2G */
2488 if (dev->vendor == PCI_VENDOR_ID_TI && 2494 if (dev->vendor == PCI_VENDOR_ID_TI &&
2489 dev->device == PCI_DEVICE_ID_TI_TSB43AB22) 2495 (dev->device == PCI_DEVICE_ID_TI_TSB43AB22 ||
2496 dev->device == PCI_DEVICE_ID_TI_TSB43AB23))
2490 ohci->use_dualbuffer = false; 2497 ohci->use_dualbuffer = false;
2491#endif 2498#endif
2492 2499
diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
index a019b49ecc9b..1f1d88ae68d6 100644
--- a/drivers/gpio/Kconfig
+++ b/drivers/gpio/Kconfig
@@ -172,6 +172,15 @@ config GPIO_ADP5520
172 To compile this driver as a module, choose M here: the module will 172 To compile this driver as a module, choose M here: the module will
173 be called adp5520-gpio. 173 be called adp5520-gpio.
174 174
175config GPIO_ADP5588
176 tristate "ADP5588 I2C GPIO expander"
177 depends on I2C
178 help
179 This option enables support for 18 GPIOs found
180 on Analog Devices ADP5588 GPIO Expanders.
181 To compile this driver as a module, choose M here: the module will be
182 called adp5588-gpio.
183
175comment "PCI GPIO expanders:" 184comment "PCI GPIO expanders:"
176 185
177config GPIO_CS5535 186config GPIO_CS5535
diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
index 52fe4cf734c7..48687238edb1 100644
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
@@ -5,6 +5,7 @@ ccflags-$(CONFIG_DEBUG_GPIO) += -DDEBUG
5obj-$(CONFIG_GPIOLIB) += gpiolib.o 5obj-$(CONFIG_GPIOLIB) += gpiolib.o
6 6
7obj-$(CONFIG_GPIO_ADP5520) += adp5520-gpio.o 7obj-$(CONFIG_GPIO_ADP5520) += adp5520-gpio.o
8obj-$(CONFIG_GPIO_ADP5588) += adp5588-gpio.o
8obj-$(CONFIG_GPIO_LANGWELL) += langwell_gpio.o 9obj-$(CONFIG_GPIO_LANGWELL) += langwell_gpio.o
9obj-$(CONFIG_GPIO_MAX7301) += max7301.o 10obj-$(CONFIG_GPIO_MAX7301) += max7301.o
10obj-$(CONFIG_GPIO_MAX732X) += max732x.o 11obj-$(CONFIG_GPIO_MAX732X) += max732x.o
diff --git a/drivers/gpio/adp5588-gpio.c b/drivers/gpio/adp5588-gpio.c
new file mode 100644
index 000000000000..afc097a16b33
--- /dev/null
+++ b/drivers/gpio/adp5588-gpio.c
@@ -0,0 +1,266 @@
1/*
2 * GPIO Chip driver for Analog Devices
3 * ADP5588 I/O Expander and QWERTY Keypad Controller
4 *
5 * Copyright 2009 Analog Devices Inc.
6 *
7 * Licensed under the GPL-2 or later.
8 */
9
10#include <linux/module.h>
11#include <linux/kernel.h>
12#include <linux/init.h>
13#include <linux/i2c.h>
14#include <linux/gpio.h>
15
16#include <linux/i2c/adp5588.h>
17
18#define DRV_NAME "adp5588-gpio"
19#define MAXGPIO 18
20#define ADP_BANK(offs) ((offs) >> 3)
21#define ADP_BIT(offs) (1u << ((offs) & 0x7))
22
23struct adp5588_gpio {
24 struct i2c_client *client;
25 struct gpio_chip gpio_chip;
26 struct mutex lock; /* protect cached dir, dat_out */
27 unsigned gpio_start;
28 uint8_t dat_out[3];
29 uint8_t dir[3];
30};
31
32static int adp5588_gpio_read(struct i2c_client *client, u8 reg)
33{
34 int ret = i2c_smbus_read_byte_data(client, reg);
35
36 if (ret < 0)
37 dev_err(&client->dev, "Read Error\n");
38
39 return ret;
40}
41
42static int adp5588_gpio_write(struct i2c_client *client, u8 reg, u8 val)
43{
44 int ret = i2c_smbus_write_byte_data(client, reg, val);
45
46 if (ret < 0)
47 dev_err(&client->dev, "Write Error\n");
48
49 return ret;
50}
51
52static int adp5588_gpio_get_value(struct gpio_chip *chip, unsigned off)
53{
54 struct adp5588_gpio *dev =
55 container_of(chip, struct adp5588_gpio, gpio_chip);
56
57 return !!(adp5588_gpio_read(dev->client, GPIO_DAT_STAT1 + ADP_BANK(off))
58 & ADP_BIT(off));
59}
60
61static void adp5588_gpio_set_value(struct gpio_chip *chip,
62 unsigned off, int val)
63{
64 unsigned bank, bit;
65 struct adp5588_gpio *dev =
66 container_of(chip, struct adp5588_gpio, gpio_chip);
67
68 bank = ADP_BANK(off);
69 bit = ADP_BIT(off);
70
71 mutex_lock(&dev->lock);
72 if (val)
73 dev->dat_out[bank] |= bit;
74 else
75 dev->dat_out[bank] &= ~bit;
76
77 adp5588_gpio_write(dev->client, GPIO_DAT_OUT1 + bank,
78 dev->dat_out[bank]);
79 mutex_unlock(&dev->lock);
80}
81
82static int adp5588_gpio_direction_input(struct gpio_chip *chip, unsigned off)
83{
84 int ret;
85 unsigned bank;
86 struct adp5588_gpio *dev =
87 container_of(chip, struct adp5588_gpio, gpio_chip);
88
89 bank = ADP_BANK(off);
90
91 mutex_lock(&dev->lock);
92 dev->dir[bank] &= ~ADP_BIT(off);
93 ret = adp5588_gpio_write(dev->client, GPIO_DIR1 + bank, dev->dir[bank]);
94 mutex_unlock(&dev->lock);
95
96 return ret;
97}
98
99static int adp5588_gpio_direction_output(struct gpio_chip *chip,
100 unsigned off, int val)
101{
102 int ret;
103 unsigned bank, bit;
104 struct adp5588_gpio *dev =
105 container_of(chip, struct adp5588_gpio, gpio_chip);
106
107 bank = ADP_BANK(off);
108 bit = ADP_BIT(off);
109
110 mutex_lock(&dev->lock);
111 dev->dir[bank] |= bit;
112
113 if (val)
114 dev->dat_out[bank] |= bit;
115 else
116 dev->dat_out[bank] &= ~bit;
117
118 ret = adp5588_gpio_write(dev->client, GPIO_DAT_OUT1 + bank,
119 dev->dat_out[bank]);
120 ret |= adp5588_gpio_write(dev->client, GPIO_DIR1 + bank,
121 dev->dir[bank]);
122 mutex_unlock(&dev->lock);
123
124 return ret;
125}
126
127static int __devinit adp5588_gpio_probe(struct i2c_client *client,
128 const struct i2c_device_id *id)
129{
130 struct adp5588_gpio_platform_data *pdata = client->dev.platform_data;
131 struct adp5588_gpio *dev;
132 struct gpio_chip *gc;
133 int ret, i, revid;
134
135 if (pdata == NULL) {
136 dev_err(&client->dev, "missing platform data\n");
137 return -ENODEV;
138 }
139
140 if (!i2c_check_functionality(client->adapter,
141 I2C_FUNC_SMBUS_BYTE_DATA)) {
142 dev_err(&client->dev, "SMBUS Byte Data not Supported\n");
143 return -EIO;
144 }
145
146 dev = kzalloc(sizeof(*dev), GFP_KERNEL);
147 if (dev == NULL) {
148 dev_err(&client->dev, "failed to alloc memory\n");
149 return -ENOMEM;
150 }
151
152 dev->client = client;
153
154 gc = &dev->gpio_chip;
155 gc->direction_input = adp5588_gpio_direction_input;
156 gc->direction_output = adp5588_gpio_direction_output;
157 gc->get = adp5588_gpio_get_value;
158 gc->set = adp5588_gpio_set_value;
159 gc->can_sleep = 1;
160
161 gc->base = pdata->gpio_start;
162 gc->ngpio = MAXGPIO;
163 gc->label = client->name;
164 gc->owner = THIS_MODULE;
165
166 mutex_init(&dev->lock);
167
168
169 ret = adp5588_gpio_read(dev->client, DEV_ID);
170 if (ret < 0)
171 goto err;
172
173 revid = ret & ADP5588_DEVICE_ID_MASK;
174
175 for (i = 0, ret = 0; i <= ADP_BANK(MAXGPIO); i++) {
176 dev->dat_out[i] = adp5588_gpio_read(client, GPIO_DAT_OUT1 + i);
177 dev->dir[i] = adp5588_gpio_read(client, GPIO_DIR1 + i);
178 ret |= adp5588_gpio_write(client, KP_GPIO1 + i, 0);
179 ret |= adp5588_gpio_write(client, GPIO_PULL1 + i,
180 (pdata->pullup_dis_mask >> (8 * i)) & 0xFF);
181
182 if (ret)
183 goto err;
184 }
185
186 ret = gpiochip_add(&dev->gpio_chip);
187 if (ret)
188 goto err;
189
190 dev_info(&client->dev, "gpios %d..%d on a %s Rev. %d\n",
191 gc->base, gc->base + gc->ngpio - 1,
192 client->name, revid);
193
194 if (pdata->setup) {
195 ret = pdata->setup(client, gc->base, gc->ngpio, pdata->context);
196 if (ret < 0)
197 dev_warn(&client->dev, "setup failed, %d\n", ret);
198 }
199
200 i2c_set_clientdata(client, dev);
201 return 0;
202
203err:
204 kfree(dev);
205 return ret;
206}
207
208static int __devexit adp5588_gpio_remove(struct i2c_client *client)
209{
210 struct adp5588_gpio_platform_data *pdata = client->dev.platform_data;
211 struct adp5588_gpio *dev = i2c_get_clientdata(client);
212 int ret;
213
214 if (pdata->teardown) {
215 ret = pdata->teardown(client,
216 dev->gpio_chip.base, dev->gpio_chip.ngpio,
217 pdata->context);
218 if (ret < 0) {
219 dev_err(&client->dev, "teardown failed %d\n", ret);
220 return ret;
221 }
222 }
223
224 ret = gpiochip_remove(&dev->gpio_chip);
225 if (ret) {
226 dev_err(&client->dev, "gpiochip_remove failed %d\n", ret);
227 return ret;
228 }
229
230 kfree(dev);
231 return 0;
232}
233
234static const struct i2c_device_id adp5588_gpio_id[] = {
235 {DRV_NAME, 0},
236 {}
237};
238
239MODULE_DEVICE_TABLE(i2c, adp5588_gpio_id);
240
241static struct i2c_driver adp5588_gpio_driver = {
242 .driver = {
243 .name = DRV_NAME,
244 },
245 .probe = adp5588_gpio_probe,
246 .remove = __devexit_p(adp5588_gpio_remove),
247 .id_table = adp5588_gpio_id,
248};
249
250static int __init adp5588_gpio_init(void)
251{
252 return i2c_add_driver(&adp5588_gpio_driver);
253}
254
255module_init(adp5588_gpio_init);
256
257static void __exit adp5588_gpio_exit(void)
258{
259 i2c_del_driver(&adp5588_gpio_driver);
260}
261
262module_exit(adp5588_gpio_exit);
263
264MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>");
265MODULE_DESCRIPTION("GPIO ADP5588 Driver");
266MODULE_LICENSE("GPL");
diff --git a/drivers/gpio/gpiolib.c b/drivers/gpio/gpiolib.c
index a25ad284a272..350842ad3632 100644
--- a/drivers/gpio/gpiolib.c
+++ b/drivers/gpio/gpiolib.c
@@ -858,8 +858,6 @@ int gpio_sysfs_set_active_low(unsigned gpio, int value)
858 desc = &gpio_desc[gpio]; 858 desc = &gpio_desc[gpio];
859 859
860 if (test_bit(FLAG_EXPORT, &desc->flags)) { 860 if (test_bit(FLAG_EXPORT, &desc->flags)) {
861 struct device *dev;
862
863 dev = class_find_device(&gpio_class, NULL, desc, match_export); 861 dev = class_find_device(&gpio_class, NULL, desc, match_export);
864 if (dev == NULL) { 862 if (dev == NULL) {
865 status = -ENODEV; 863 status = -ENODEV;
diff --git a/drivers/gpu/drm/Kconfig b/drivers/gpu/drm/Kconfig
index 96eddd17e050..305c59003963 100644
--- a/drivers/gpu/drm/Kconfig
+++ b/drivers/gpu/drm/Kconfig
@@ -66,6 +66,8 @@ config DRM_RADEON
66 66
67 If M is selected, the module will be called radeon. 67 If M is selected, the module will be called radeon.
68 68
69source "drivers/gpu/drm/radeon/Kconfig"
70
69config DRM_I810 71config DRM_I810
70 tristate "Intel I810" 72 tristate "Intel I810"
71 depends on DRM && AGP && AGP_INTEL 73 depends on DRM && AGP && AGP_INTEL
diff --git a/drivers/gpu/drm/Makefile b/drivers/gpu/drm/Makefile
index 470ef6779db3..39c5aa75b8f1 100644
--- a/drivers/gpu/drm/Makefile
+++ b/drivers/gpu/drm/Makefile
@@ -30,6 +30,7 @@ obj-$(CONFIG_DRM_I830) += i830/
30obj-$(CONFIG_DRM_I915) += i915/ 30obj-$(CONFIG_DRM_I915) += i915/
31obj-$(CONFIG_DRM_SIS) += sis/ 31obj-$(CONFIG_DRM_SIS) += sis/
32obj-$(CONFIG_DRM_SAVAGE)+= savage/ 32obj-$(CONFIG_DRM_SAVAGE)+= savage/
33obj-$(CONFIG_DRM_VMWGFX)+= vmwgfx/
33obj-$(CONFIG_DRM_VIA) +=via/ 34obj-$(CONFIG_DRM_VIA) +=via/
34obj-$(CONFIG_DRM_NOUVEAU) +=nouveau/ 35obj-$(CONFIG_DRM_NOUVEAU) +=nouveau/
35obj-y += i2c/ 36obj-y += i2c/
diff --git a/drivers/gpu/drm/ati_pcigart.c b/drivers/gpu/drm/ati_pcigart.c
index 628eae3e9b83..17be051b7aa3 100644
--- a/drivers/gpu/drm/ati_pcigart.c
+++ b/drivers/gpu/drm/ati_pcigart.c
@@ -39,8 +39,7 @@ static int drm_ati_alloc_pcigart_table(struct drm_device *dev,
39 struct drm_ati_pcigart_info *gart_info) 39 struct drm_ati_pcigart_info *gart_info)
40{ 40{
41 gart_info->table_handle = drm_pci_alloc(dev, gart_info->table_size, 41 gart_info->table_handle = drm_pci_alloc(dev, gart_info->table_size,
42 PAGE_SIZE, 42 PAGE_SIZE);
43 gart_info->table_mask);
44 if (gart_info->table_handle == NULL) 43 if (gart_info->table_handle == NULL)
45 return -ENOMEM; 44 return -ENOMEM;
46 45
@@ -112,6 +111,13 @@ int drm_ati_pcigart_init(struct drm_device *dev, struct drm_ati_pcigart_info *ga
112 if (gart_info->gart_table_location == DRM_ATI_GART_MAIN) { 111 if (gart_info->gart_table_location == DRM_ATI_GART_MAIN) {
113 DRM_DEBUG("PCI: no table in VRAM: using normal RAM\n"); 112 DRM_DEBUG("PCI: no table in VRAM: using normal RAM\n");
114 113
114 if (pci_set_dma_mask(dev->pdev, gart_info->table_mask)) {
115 DRM_ERROR("fail to set dma mask to 0x%Lx\n",
116 (unsigned long long)gart_info->table_mask);
117 ret = 1;
118 goto done;
119 }
120
115 ret = drm_ati_alloc_pcigart_table(dev, gart_info); 121 ret = drm_ati_alloc_pcigart_table(dev, gart_info);
116 if (ret) { 122 if (ret) {
117 DRM_ERROR("cannot allocate PCI GART page!\n"); 123 DRM_ERROR("cannot allocate PCI GART page!\n");
diff --git a/drivers/gpu/drm/drm_bufs.c b/drivers/gpu/drm/drm_bufs.c
index 3d09e304f6f4..8417cc4c43f1 100644
--- a/drivers/gpu/drm/drm_bufs.c
+++ b/drivers/gpu/drm/drm_bufs.c
@@ -326,7 +326,7 @@ static int drm_addmap_core(struct drm_device * dev, resource_size_t offset,
326 * As we're limiting the address to 2^32-1 (or less), 326 * As we're limiting the address to 2^32-1 (or less),
327 * casting it down to 32 bits is no problem, but we 327 * casting it down to 32 bits is no problem, but we
328 * need to point to a 64bit variable first. */ 328 * need to point to a 64bit variable first. */
329 dmah = drm_pci_alloc(dev, map->size, map->size, 0xffffffffUL); 329 dmah = drm_pci_alloc(dev, map->size, map->size);
330 if (!dmah) { 330 if (!dmah) {
331 kfree(map); 331 kfree(map);
332 return -ENOMEM; 332 return -ENOMEM;
@@ -885,7 +885,7 @@ int drm_addbufs_pci(struct drm_device * dev, struct drm_buf_desc * request)
885 885
886 while (entry->buf_count < count) { 886 while (entry->buf_count < count) {
887 887
888 dmah = drm_pci_alloc(dev, PAGE_SIZE << page_order, 0x1000, 0xfffffffful); 888 dmah = drm_pci_alloc(dev, PAGE_SIZE << page_order, 0x1000);
889 889
890 if (!dmah) { 890 if (!dmah) {
891 /* Set count correctly so we free the proper amount. */ 891 /* Set count correctly so we free the proper amount. */
diff --git a/drivers/gpu/drm/drm_crtc.c b/drivers/gpu/drm/drm_crtc.c
index 5124401f266a..d91fb8c0b7b3 100644
--- a/drivers/gpu/drm/drm_crtc.c
+++ b/drivers/gpu/drm/drm_crtc.c
@@ -158,6 +158,7 @@ static struct drm_conn_prop_enum_list drm_connector_enum_list[] =
158 { DRM_MODE_CONNECTOR_HDMIA, "HDMI Type A", 0 }, 158 { DRM_MODE_CONNECTOR_HDMIA, "HDMI Type A", 0 },
159 { DRM_MODE_CONNECTOR_HDMIB, "HDMI Type B", 0 }, 159 { DRM_MODE_CONNECTOR_HDMIB, "HDMI Type B", 0 },
160 { DRM_MODE_CONNECTOR_TV, "TV", 0 }, 160 { DRM_MODE_CONNECTOR_TV, "TV", 0 },
161 { DRM_MODE_CONNECTOR_eDP, "Embedded DisplayPort", 0 },
161}; 162};
162 163
163static struct drm_prop_enum_list drm_encoder_enum_list[] = 164static struct drm_prop_enum_list drm_encoder_enum_list[] =
diff --git a/drivers/gpu/drm/drm_crtc_helper.c b/drivers/gpu/drm/drm_crtc_helper.c
index 4231d6db72ec..7d0f00a935fa 100644
--- a/drivers/gpu/drm/drm_crtc_helper.c
+++ b/drivers/gpu/drm/drm_crtc_helper.c
@@ -216,7 +216,7 @@ bool drm_helper_crtc_in_use(struct drm_crtc *crtc)
216EXPORT_SYMBOL(drm_helper_crtc_in_use); 216EXPORT_SYMBOL(drm_helper_crtc_in_use);
217 217
218/** 218/**
219 * drm_disable_unused_functions - disable unused objects 219 * drm_helper_disable_unused_functions - disable unused objects
220 * @dev: DRM device 220 * @dev: DRM device
221 * 221 *
222 * LOCKING: 222 * LOCKING:
@@ -702,7 +702,7 @@ bool drm_crtc_helper_set_mode(struct drm_crtc *crtc,
702 if (encoder->crtc != crtc) 702 if (encoder->crtc != crtc)
703 continue; 703 continue;
704 704
705 DRM_INFO("%s: set mode %s %x\n", drm_get_encoder_name(encoder), 705 DRM_DEBUG("%s: set mode %s %x\n", drm_get_encoder_name(encoder),
706 mode->name, mode->base.id); 706 mode->name, mode->base.id);
707 encoder_funcs = encoder->helper_private; 707 encoder_funcs = encoder->helper_private;
708 encoder_funcs->mode_set(encoder, mode, adjusted_mode); 708 encoder_funcs->mode_set(encoder, mode, adjusted_mode);
@@ -1032,7 +1032,8 @@ bool drm_helper_initial_config(struct drm_device *dev)
1032 /* 1032 /*
1033 * we shouldn't end up with no modes here. 1033 * we shouldn't end up with no modes here.
1034 */ 1034 */
1035 WARN(!count, "No connectors reported connected with modes\n"); 1035 if (count == 0)
1036 printk(KERN_INFO "No connectors reported connected with modes\n");
1036 1037
1037 drm_setup_crtcs(dev); 1038 drm_setup_crtcs(dev);
1038 1039
@@ -1162,6 +1163,9 @@ EXPORT_SYMBOL(drm_helper_mode_fill_fb_struct);
1162int drm_helper_resume_force_mode(struct drm_device *dev) 1163int drm_helper_resume_force_mode(struct drm_device *dev)
1163{ 1164{
1164 struct drm_crtc *crtc; 1165 struct drm_crtc *crtc;
1166 struct drm_encoder *encoder;
1167 struct drm_encoder_helper_funcs *encoder_funcs;
1168 struct drm_crtc_helper_funcs *crtc_funcs;
1165 int ret; 1169 int ret;
1166 1170
1167 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { 1171 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
@@ -1174,6 +1178,25 @@ int drm_helper_resume_force_mode(struct drm_device *dev)
1174 1178
1175 if (ret == false) 1179 if (ret == false)
1176 DRM_ERROR("failed to set mode on crtc %p\n", crtc); 1180 DRM_ERROR("failed to set mode on crtc %p\n", crtc);
1181
1182 /* Turn off outputs that were already powered off */
1183 if (drm_helper_choose_crtc_dpms(crtc)) {
1184 list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
1185
1186 if(encoder->crtc != crtc)
1187 continue;
1188
1189 encoder_funcs = encoder->helper_private;
1190 if (encoder_funcs->dpms)
1191 (*encoder_funcs->dpms) (encoder,
1192 drm_helper_choose_encoder_dpms(encoder));
1193
1194 crtc_funcs = crtc->helper_private;
1195 if (crtc_funcs->dpms)
1196 (*crtc_funcs->dpms) (crtc,
1197 drm_helper_choose_crtc_dpms(crtc));
1198 }
1199 }
1177 } 1200 }
1178 /* disable the unused connectors while restoring the modesetting */ 1201 /* disable the unused connectors while restoring the modesetting */
1179 drm_helper_disable_unused_functions(dev); 1202 drm_helper_disable_unused_functions(dev);
diff --git a/drivers/gpu/drm/drm_drv.c b/drivers/gpu/drm/drm_drv.c
index ff2f1042cb44..766c46875a20 100644
--- a/drivers/gpu/drm/drm_drv.c
+++ b/drivers/gpu/drm/drm_drv.c
@@ -434,11 +434,11 @@ static int drm_version(struct drm_device *dev, void *data,
434 * Looks up the ioctl function in the ::ioctls table, checking for root 434 * Looks up the ioctl function in the ::ioctls table, checking for root
435 * previleges if so required, and dispatches to the respective function. 435 * previleges if so required, and dispatches to the respective function.
436 */ 436 */
437int drm_ioctl(struct inode *inode, struct file *filp, 437long drm_ioctl(struct file *filp,
438 unsigned int cmd, unsigned long arg) 438 unsigned int cmd, unsigned long arg)
439{ 439{
440 struct drm_file *file_priv = filp->private_data; 440 struct drm_file *file_priv = filp->private_data;
441 struct drm_device *dev = file_priv->minor->dev; 441 struct drm_device *dev;
442 struct drm_ioctl_desc *ioctl; 442 struct drm_ioctl_desc *ioctl;
443 drm_ioctl_t *func; 443 drm_ioctl_t *func;
444 unsigned int nr = DRM_IOCTL_NR(cmd); 444 unsigned int nr = DRM_IOCTL_NR(cmd);
@@ -446,6 +446,7 @@ int drm_ioctl(struct inode *inode, struct file *filp,
446 char stack_kdata[128]; 446 char stack_kdata[128];
447 char *kdata = NULL; 447 char *kdata = NULL;
448 448
449 dev = file_priv->minor->dev;
449 atomic_inc(&dev->ioctl_count); 450 atomic_inc(&dev->ioctl_count);
450 atomic_inc(&dev->counts[_DRM_STAT_IOCTLS]); 451 atomic_inc(&dev->counts[_DRM_STAT_IOCTLS]);
451 ++file_priv->ioctl_count; 452 ++file_priv->ioctl_count;
@@ -501,7 +502,13 @@ int drm_ioctl(struct inode *inode, struct file *filp,
501 goto err_i1; 502 goto err_i1;
502 } 503 }
503 } 504 }
504 retcode = func(dev, kdata, file_priv); 505 if (ioctl->flags & DRM_UNLOCKED)
506 retcode = func(dev, kdata, file_priv);
507 else {
508 lock_kernel();
509 retcode = func(dev, kdata, file_priv);
510 unlock_kernel();
511 }
505 512
506 if (cmd & IOC_OUT) { 513 if (cmd & IOC_OUT) {
507 if (copy_to_user((void __user *)arg, kdata, 514 if (copy_to_user((void __user *)arg, kdata,
diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index c39b26f1abed..ab6c97330412 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -598,6 +598,50 @@ struct drm_display_mode *drm_mode_std(struct drm_device *dev,
598 return mode; 598 return mode;
599} 599}
600 600
601/*
602 * EDID is delightfully ambiguous about how interlaced modes are to be
603 * encoded. Our internal representation is of frame height, but some
604 * HDTV detailed timings are encoded as field height.
605 *
606 * The format list here is from CEA, in frame size. Technically we
607 * should be checking refresh rate too. Whatever.
608 */
609static void
610drm_mode_do_interlace_quirk(struct drm_display_mode *mode,
611 struct detailed_pixel_timing *pt)
612{
613 int i;
614 static const struct {
615 int w, h;
616 } cea_interlaced[] = {
617 { 1920, 1080 },
618 { 720, 480 },
619 { 1440, 480 },
620 { 2880, 480 },
621 { 720, 576 },
622 { 1440, 576 },
623 { 2880, 576 },
624 };
625 static const int n_sizes =
626 sizeof(cea_interlaced)/sizeof(cea_interlaced[0]);
627
628 if (!(pt->misc & DRM_EDID_PT_INTERLACED))
629 return;
630
631 for (i = 0; i < n_sizes; i++) {
632 if ((mode->hdisplay == cea_interlaced[i].w) &&
633 (mode->vdisplay == cea_interlaced[i].h / 2)) {
634 mode->vdisplay *= 2;
635 mode->vsync_start *= 2;
636 mode->vsync_end *= 2;
637 mode->vtotal *= 2;
638 mode->vtotal |= 1;
639 }
640 }
641
642 mode->flags |= DRM_MODE_FLAG_INTERLACE;
643}
644
601/** 645/**
602 * drm_mode_detailed - create a new mode from an EDID detailed timing section 646 * drm_mode_detailed - create a new mode from an EDID detailed timing section
603 * @dev: DRM device (needed to create new mode) 647 * @dev: DRM device (needed to create new mode)
@@ -633,8 +677,7 @@ static struct drm_display_mode *drm_mode_detailed(struct drm_device *dev,
633 return NULL; 677 return NULL;
634 } 678 }
635 if (!(pt->misc & DRM_EDID_PT_SEPARATE_SYNC)) { 679 if (!(pt->misc & DRM_EDID_PT_SEPARATE_SYNC)) {
636 printk(KERN_WARNING "integrated sync not supported\n"); 680 printk(KERN_WARNING "composite sync not supported\n");
637 return NULL;
638 } 681 }
639 682
640 /* it is incorrect if hsync/vsync width is zero */ 683 /* it is incorrect if hsync/vsync width is zero */
@@ -681,8 +724,7 @@ static struct drm_display_mode *drm_mode_detailed(struct drm_device *dev,
681 724
682 drm_mode_set_name(mode); 725 drm_mode_set_name(mode);
683 726
684 if (pt->misc & DRM_EDID_PT_INTERLACED) 727 drm_mode_do_interlace_quirk(mode, pt);
685 mode->flags |= DRM_MODE_FLAG_INTERLACE;
686 728
687 if (quirks & EDID_QUIRK_DETAILED_SYNC_PP) { 729 if (quirks & EDID_QUIRK_DETAILED_SYNC_PP) {
688 pt->misc |= DRM_EDID_PT_HSYNC_POSITIVE | DRM_EDID_PT_VSYNC_POSITIVE; 730 pt->misc |= DRM_EDID_PT_HSYNC_POSITIVE | DRM_EDID_PT_VSYNC_POSITIVE;
@@ -911,23 +953,27 @@ static int drm_cvt_modes(struct drm_connector *connector,
911 struct drm_device *dev = connector->dev; 953 struct drm_device *dev = connector->dev;
912 struct cvt_timing *cvt; 954 struct cvt_timing *cvt;
913 const int rates[] = { 60, 85, 75, 60, 50 }; 955 const int rates[] = { 60, 85, 75, 60, 50 };
956 const u8 empty[3] = { 0, 0, 0 };
914 957
915 for (i = 0; i < 4; i++) { 958 for (i = 0; i < 4; i++) {
916 int width, height; 959 int uninitialized_var(width), height;
917 cvt = &(timing->data.other_data.data.cvt[i]); 960 cvt = &(timing->data.other_data.data.cvt[i]);
918 961
919 height = (cvt->code[0] + ((cvt->code[1] & 0xf0) << 8) + 1) * 2; 962 if (!memcmp(cvt->code, empty, 3))
920 switch (cvt->code[1] & 0xc0) { 963 continue;
964
965 height = (cvt->code[0] + ((cvt->code[1] & 0xf0) << 4) + 1) * 2;
966 switch (cvt->code[1] & 0x0c) {
921 case 0x00: 967 case 0x00:
922 width = height * 4 / 3; 968 width = height * 4 / 3;
923 break; 969 break;
924 case 0x40: 970 case 0x04:
925 width = height * 16 / 9; 971 width = height * 16 / 9;
926 break; 972 break;
927 case 0x80: 973 case 0x08:
928 width = height * 16 / 10; 974 width = height * 16 / 10;
929 break; 975 break;
930 case 0xc0: 976 case 0x0c:
931 width = height * 15 / 9; 977 width = height * 15 / 9;
932 break; 978 break;
933 } 979 }
diff --git a/drivers/gpu/drm/drm_fb_helper.c b/drivers/gpu/drm/drm_fb_helper.c
index 1b49fa055f4f..0f9e90552dc4 100644
--- a/drivers/gpu/drm/drm_fb_helper.c
+++ b/drivers/gpu/drm/drm_fb_helper.c
@@ -156,7 +156,7 @@ static bool drm_fb_helper_connector_parse_command_line(struct drm_connector *con
156 force = DRM_FORCE_ON; 156 force = DRM_FORCE_ON;
157 break; 157 break;
158 case 'D': 158 case 'D':
159 if ((connector->connector_type != DRM_MODE_CONNECTOR_DVII) || 159 if ((connector->connector_type != DRM_MODE_CONNECTOR_DVII) &&
160 (connector->connector_type != DRM_MODE_CONNECTOR_HDMIB)) 160 (connector->connector_type != DRM_MODE_CONNECTOR_HDMIB))
161 force = DRM_FORCE_ON; 161 force = DRM_FORCE_ON;
162 else 162 else
@@ -389,7 +389,7 @@ int drm_fb_helper_blank(int blank, struct fb_info *info)
389 break; 389 break;
390 /* Display: Off; HSync: On, VSync: On */ 390 /* Display: Off; HSync: On, VSync: On */
391 case FB_BLANK_NORMAL: 391 case FB_BLANK_NORMAL:
392 drm_fb_helper_off(info, DRM_MODE_DPMS_ON); 392 drm_fb_helper_off(info, DRM_MODE_DPMS_STANDBY);
393 break; 393 break;
394 /* Display: Off; HSync: Off, VSync: On */ 394 /* Display: Off; HSync: Off, VSync: On */
395 case FB_BLANK_HSYNC_SUSPEND: 395 case FB_BLANK_HSYNC_SUSPEND:
@@ -606,11 +606,10 @@ int drm_fb_helper_check_var(struct fb_var_screeninfo *var,
606 return -EINVAL; 606 return -EINVAL;
607 607
608 /* Need to resize the fb object !!! */ 608 /* Need to resize the fb object !!! */
609 if (var->xres > fb->width || var->yres > fb->height) { 609 if (var->bits_per_pixel > fb->bits_per_pixel || var->xres > fb->width || var->yres > fb->height) {
610 DRM_ERROR("Requested width/height is greater than current fb " 610 DRM_DEBUG("fb userspace requested width/height/bpp is greater than current fb "
611 "object %dx%d > %dx%d\n", var->xres, var->yres, 611 "object %dx%d-%d > %dx%d-%d\n", var->xres, var->yres, var->bits_per_pixel,
612 fb->width, fb->height); 612 fb->width, fb->height, fb->bits_per_pixel);
613 DRM_ERROR("Need resizing code.\n");
614 return -EINVAL; 613 return -EINVAL;
615 } 614 }
616 615
diff --git a/drivers/gpu/drm/drm_gem.c b/drivers/gpu/drm/drm_gem.c
index e9dbb481c469..8bf3770f294e 100644
--- a/drivers/gpu/drm/drm_gem.c
+++ b/drivers/gpu/drm/drm_gem.c
@@ -142,19 +142,6 @@ drm_gem_object_alloc(struct drm_device *dev, size_t size)
142 if (IS_ERR(obj->filp)) 142 if (IS_ERR(obj->filp))
143 goto free; 143 goto free;
144 144
145 /* Basically we want to disable the OOM killer and handle ENOMEM
146 * ourselves by sacrificing pages from cached buffers.
147 * XXX shmem_file_[gs]et_gfp_mask()
148 */
149 mapping_set_gfp_mask(obj->filp->f_path.dentry->d_inode->i_mapping,
150 GFP_HIGHUSER |
151 __GFP_COLD |
152 __GFP_FS |
153 __GFP_RECLAIMABLE |
154 __GFP_NORETRY |
155 __GFP_NOWARN |
156 __GFP_NOMEMALLOC);
157
158 kref_init(&obj->refcount); 145 kref_init(&obj->refcount);
159 kref_init(&obj->handlecount); 146 kref_init(&obj->handlecount);
160 obj->size = size; 147 obj->size = size;
diff --git a/drivers/gpu/drm/drm_ioc32.c b/drivers/gpu/drm/drm_ioc32.c
index 282d9fdf9f4e..d61d185cf040 100644
--- a/drivers/gpu/drm/drm_ioc32.c
+++ b/drivers/gpu/drm/drm_ioc32.c
@@ -104,7 +104,7 @@ static int compat_drm_version(struct file *file, unsigned int cmd,
104 &version->desc)) 104 &version->desc))
105 return -EFAULT; 105 return -EFAULT;
106 106
107 err = drm_ioctl(file->f_path.dentry->d_inode, file, 107 err = drm_ioctl(file,
108 DRM_IOCTL_VERSION, (unsigned long)version); 108 DRM_IOCTL_VERSION, (unsigned long)version);
109 if (err) 109 if (err)
110 return err; 110 return err;
@@ -145,8 +145,7 @@ static int compat_drm_getunique(struct file *file, unsigned int cmd,
145 &u->unique)) 145 &u->unique))
146 return -EFAULT; 146 return -EFAULT;
147 147
148 err = drm_ioctl(file->f_path.dentry->d_inode, file, 148 err = drm_ioctl(file, DRM_IOCTL_GET_UNIQUE, (unsigned long)u);
149 DRM_IOCTL_GET_UNIQUE, (unsigned long)u);
150 if (err) 149 if (err)
151 return err; 150 return err;
152 151
@@ -174,8 +173,7 @@ static int compat_drm_setunique(struct file *file, unsigned int cmd,
174 &u->unique)) 173 &u->unique))
175 return -EFAULT; 174 return -EFAULT;
176 175
177 return drm_ioctl(file->f_path.dentry->d_inode, file, 176 return drm_ioctl(file, DRM_IOCTL_SET_UNIQUE, (unsigned long)u);
178 DRM_IOCTL_SET_UNIQUE, (unsigned long)u);
179} 177}
180 178
181typedef struct drm_map32 { 179typedef struct drm_map32 {
@@ -205,8 +203,7 @@ static int compat_drm_getmap(struct file *file, unsigned int cmd,
205 if (__put_user(idx, &map->offset)) 203 if (__put_user(idx, &map->offset))
206 return -EFAULT; 204 return -EFAULT;
207 205
208 err = drm_ioctl(file->f_path.dentry->d_inode, file, 206 err = drm_ioctl(file, DRM_IOCTL_GET_MAP, (unsigned long)map);
209 DRM_IOCTL_GET_MAP, (unsigned long)map);
210 if (err) 207 if (err)
211 return err; 208 return err;
212 209
@@ -246,8 +243,7 @@ static int compat_drm_addmap(struct file *file, unsigned int cmd,
246 || __put_user(m32.flags, &map->flags)) 243 || __put_user(m32.flags, &map->flags))
247 return -EFAULT; 244 return -EFAULT;
248 245
249 err = drm_ioctl(file->f_path.dentry->d_inode, file, 246 err = drm_ioctl(file, DRM_IOCTL_ADD_MAP, (unsigned long)map);
250 DRM_IOCTL_ADD_MAP, (unsigned long)map);
251 if (err) 247 if (err)
252 return err; 248 return err;
253 249
@@ -284,8 +280,7 @@ static int compat_drm_rmmap(struct file *file, unsigned int cmd,
284 if (__put_user((void *)(unsigned long)handle, &map->handle)) 280 if (__put_user((void *)(unsigned long)handle, &map->handle))
285 return -EFAULT; 281 return -EFAULT;
286 282
287 return drm_ioctl(file->f_path.dentry->d_inode, file, 283 return drm_ioctl(file, DRM_IOCTL_RM_MAP, (unsigned long)map);
288 DRM_IOCTL_RM_MAP, (unsigned long)map);
289} 284}
290 285
291typedef struct drm_client32 { 286typedef struct drm_client32 {
@@ -314,8 +309,7 @@ static int compat_drm_getclient(struct file *file, unsigned int cmd,
314 if (__put_user(idx, &client->idx)) 309 if (__put_user(idx, &client->idx))
315 return -EFAULT; 310 return -EFAULT;
316 311
317 err = drm_ioctl(file->f_path.dentry->d_inode, file, 312 err = drm_ioctl(file, DRM_IOCTL_GET_CLIENT, (unsigned long)client);
318 DRM_IOCTL_GET_CLIENT, (unsigned long)client);
319 if (err) 313 if (err)
320 return err; 314 return err;
321 315
@@ -351,8 +345,7 @@ static int compat_drm_getstats(struct file *file, unsigned int cmd,
351 if (!access_ok(VERIFY_WRITE, stats, sizeof(*stats))) 345 if (!access_ok(VERIFY_WRITE, stats, sizeof(*stats)))
352 return -EFAULT; 346 return -EFAULT;
353 347
354 err = drm_ioctl(file->f_path.dentry->d_inode, file, 348 err = drm_ioctl(file, DRM_IOCTL_GET_STATS, (unsigned long)stats);
355 DRM_IOCTL_GET_STATS, (unsigned long)stats);
356 if (err) 349 if (err)
357 return err; 350 return err;
358 351
@@ -395,8 +388,7 @@ static int compat_drm_addbufs(struct file *file, unsigned int cmd,
395 || __put_user(agp_start, &buf->agp_start)) 388 || __put_user(agp_start, &buf->agp_start))
396 return -EFAULT; 389 return -EFAULT;
397 390
398 err = drm_ioctl(file->f_path.dentry->d_inode, file, 391 err = drm_ioctl(file, DRM_IOCTL_ADD_BUFS, (unsigned long)buf);
399 DRM_IOCTL_ADD_BUFS, (unsigned long)buf);
400 if (err) 392 if (err)
401 return err; 393 return err;
402 394
@@ -427,8 +419,7 @@ static int compat_drm_markbufs(struct file *file, unsigned int cmd,
427 || __put_user(b32.high_mark, &buf->high_mark)) 419 || __put_user(b32.high_mark, &buf->high_mark))
428 return -EFAULT; 420 return -EFAULT;
429 421
430 return drm_ioctl(file->f_path.dentry->d_inode, file, 422 return drm_ioctl(file, DRM_IOCTL_MARK_BUFS, (unsigned long)buf);
431 DRM_IOCTL_MARK_BUFS, (unsigned long)buf);
432} 423}
433 424
434typedef struct drm_buf_info32 { 425typedef struct drm_buf_info32 {
@@ -469,8 +460,7 @@ static int compat_drm_infobufs(struct file *file, unsigned int cmd,
469 || __put_user(list, &request->list)) 460 || __put_user(list, &request->list))
470 return -EFAULT; 461 return -EFAULT;
471 462
472 err = drm_ioctl(file->f_path.dentry->d_inode, file, 463 err = drm_ioctl(file, DRM_IOCTL_INFO_BUFS, (unsigned long)request);
473 DRM_IOCTL_INFO_BUFS, (unsigned long)request);
474 if (err) 464 if (err)
475 return err; 465 return err;
476 466
@@ -531,8 +521,7 @@ static int compat_drm_mapbufs(struct file *file, unsigned int cmd,
531 || __put_user(list, &request->list)) 521 || __put_user(list, &request->list))
532 return -EFAULT; 522 return -EFAULT;
533 523
534 err = drm_ioctl(file->f_path.dentry->d_inode, file, 524 err = drm_ioctl(file, DRM_IOCTL_MAP_BUFS, (unsigned long)request);
535 DRM_IOCTL_MAP_BUFS, (unsigned long)request);
536 if (err) 525 if (err)
537 return err; 526 return err;
538 527
@@ -578,8 +567,7 @@ static int compat_drm_freebufs(struct file *file, unsigned int cmd,
578 &request->list)) 567 &request->list))
579 return -EFAULT; 568 return -EFAULT;
580 569
581 return drm_ioctl(file->f_path.dentry->d_inode, file, 570 return drm_ioctl(file, DRM_IOCTL_FREE_BUFS, (unsigned long)request);
582 DRM_IOCTL_FREE_BUFS, (unsigned long)request);
583} 571}
584 572
585typedef struct drm_ctx_priv_map32 { 573typedef struct drm_ctx_priv_map32 {
@@ -605,8 +593,7 @@ static int compat_drm_setsareactx(struct file *file, unsigned int cmd,
605 &request->handle)) 593 &request->handle))
606 return -EFAULT; 594 return -EFAULT;
607 595
608 return drm_ioctl(file->f_path.dentry->d_inode, file, 596 return drm_ioctl(file, DRM_IOCTL_SET_SAREA_CTX, (unsigned long)request);
609 DRM_IOCTL_SET_SAREA_CTX, (unsigned long)request);
610} 597}
611 598
612static int compat_drm_getsareactx(struct file *file, unsigned int cmd, 599static int compat_drm_getsareactx(struct file *file, unsigned int cmd,
@@ -628,8 +615,7 @@ static int compat_drm_getsareactx(struct file *file, unsigned int cmd,
628 if (__put_user(ctx_id, &request->ctx_id)) 615 if (__put_user(ctx_id, &request->ctx_id))
629 return -EFAULT; 616 return -EFAULT;
630 617
631 err = drm_ioctl(file->f_path.dentry->d_inode, file, 618 err = drm_ioctl(file, DRM_IOCTL_GET_SAREA_CTX, (unsigned long)request);
632 DRM_IOCTL_GET_SAREA_CTX, (unsigned long)request);
633 if (err) 619 if (err)
634 return err; 620 return err;
635 621
@@ -664,8 +650,7 @@ static int compat_drm_resctx(struct file *file, unsigned int cmd,
664 &res->contexts)) 650 &res->contexts))
665 return -EFAULT; 651 return -EFAULT;
666 652
667 err = drm_ioctl(file->f_path.dentry->d_inode, file, 653 err = drm_ioctl(file, DRM_IOCTL_RES_CTX, (unsigned long)res);
668 DRM_IOCTL_RES_CTX, (unsigned long)res);
669 if (err) 654 if (err)
670 return err; 655 return err;
671 656
@@ -718,8 +703,7 @@ static int compat_drm_dma(struct file *file, unsigned int cmd,
718 &d->request_sizes)) 703 &d->request_sizes))
719 return -EFAULT; 704 return -EFAULT;
720 705
721 err = drm_ioctl(file->f_path.dentry->d_inode, file, 706 err = drm_ioctl(file, DRM_IOCTL_DMA, (unsigned long)d);
722 DRM_IOCTL_DMA, (unsigned long)d);
723 if (err) 707 if (err)
724 return err; 708 return err;
725 709
@@ -751,8 +735,7 @@ static int compat_drm_agp_enable(struct file *file, unsigned int cmd,
751 if (put_user(m32.mode, &mode->mode)) 735 if (put_user(m32.mode, &mode->mode))
752 return -EFAULT; 736 return -EFAULT;
753 737
754 return drm_ioctl(file->f_path.dentry->d_inode, file, 738 return drm_ioctl(file, DRM_IOCTL_AGP_ENABLE, (unsigned long)mode);
755 DRM_IOCTL_AGP_ENABLE, (unsigned long)mode);
756} 739}
757 740
758typedef struct drm_agp_info32 { 741typedef struct drm_agp_info32 {
@@ -781,8 +764,7 @@ static int compat_drm_agp_info(struct file *file, unsigned int cmd,
781 if (!access_ok(VERIFY_WRITE, info, sizeof(*info))) 764 if (!access_ok(VERIFY_WRITE, info, sizeof(*info)))
782 return -EFAULT; 765 return -EFAULT;
783 766
784 err = drm_ioctl(file->f_path.dentry->d_inode, file, 767 err = drm_ioctl(file, DRM_IOCTL_AGP_INFO, (unsigned long)info);
785 DRM_IOCTL_AGP_INFO, (unsigned long)info);
786 if (err) 768 if (err)
787 return err; 769 return err;
788 770
@@ -827,16 +809,14 @@ static int compat_drm_agp_alloc(struct file *file, unsigned int cmd,
827 || __put_user(req32.type, &request->type)) 809 || __put_user(req32.type, &request->type))
828 return -EFAULT; 810 return -EFAULT;
829 811
830 err = drm_ioctl(file->f_path.dentry->d_inode, file, 812 err = drm_ioctl(file, DRM_IOCTL_AGP_ALLOC, (unsigned long)request);
831 DRM_IOCTL_AGP_ALLOC, (unsigned long)request);
832 if (err) 813 if (err)
833 return err; 814 return err;
834 815
835 if (__get_user(req32.handle, &request->handle) 816 if (__get_user(req32.handle, &request->handle)
836 || __get_user(req32.physical, &request->physical) 817 || __get_user(req32.physical, &request->physical)
837 || copy_to_user(argp, &req32, sizeof(req32))) { 818 || copy_to_user(argp, &req32, sizeof(req32))) {
838 drm_ioctl(file->f_path.dentry->d_inode, file, 819 drm_ioctl(file, DRM_IOCTL_AGP_FREE, (unsigned long)request);
839 DRM_IOCTL_AGP_FREE, (unsigned long)request);
840 return -EFAULT; 820 return -EFAULT;
841 } 821 }
842 822
@@ -856,8 +836,7 @@ static int compat_drm_agp_free(struct file *file, unsigned int cmd,
856 || __put_user(handle, &request->handle)) 836 || __put_user(handle, &request->handle))
857 return -EFAULT; 837 return -EFAULT;
858 838
859 return drm_ioctl(file->f_path.dentry->d_inode, file, 839 return drm_ioctl(file, DRM_IOCTL_AGP_FREE, (unsigned long)request);
860 DRM_IOCTL_AGP_FREE, (unsigned long)request);
861} 840}
862 841
863typedef struct drm_agp_binding32 { 842typedef struct drm_agp_binding32 {
@@ -881,8 +860,7 @@ static int compat_drm_agp_bind(struct file *file, unsigned int cmd,
881 || __put_user(req32.offset, &request->offset)) 860 || __put_user(req32.offset, &request->offset))
882 return -EFAULT; 861 return -EFAULT;
883 862
884 return drm_ioctl(file->f_path.dentry->d_inode, file, 863 return drm_ioctl(file, DRM_IOCTL_AGP_BIND, (unsigned long)request);
885 DRM_IOCTL_AGP_BIND, (unsigned long)request);
886} 864}
887 865
888static int compat_drm_agp_unbind(struct file *file, unsigned int cmd, 866static int compat_drm_agp_unbind(struct file *file, unsigned int cmd,
@@ -898,8 +876,7 @@ static int compat_drm_agp_unbind(struct file *file, unsigned int cmd,
898 || __put_user(handle, &request->handle)) 876 || __put_user(handle, &request->handle))
899 return -EFAULT; 877 return -EFAULT;
900 878
901 return drm_ioctl(file->f_path.dentry->d_inode, file, 879 return drm_ioctl(file, DRM_IOCTL_AGP_UNBIND, (unsigned long)request);
902 DRM_IOCTL_AGP_UNBIND, (unsigned long)request);
903} 880}
904#endif /* __OS_HAS_AGP */ 881#endif /* __OS_HAS_AGP */
905 882
@@ -923,8 +900,7 @@ static int compat_drm_sg_alloc(struct file *file, unsigned int cmd,
923 || __put_user(x, &request->size)) 900 || __put_user(x, &request->size))
924 return -EFAULT; 901 return -EFAULT;
925 902
926 err = drm_ioctl(file->f_path.dentry->d_inode, file, 903 err = drm_ioctl(file, DRM_IOCTL_SG_ALLOC, (unsigned long)request);
927 DRM_IOCTL_SG_ALLOC, (unsigned long)request);
928 if (err) 904 if (err)
929 return err; 905 return err;
930 906
@@ -950,8 +926,7 @@ static int compat_drm_sg_free(struct file *file, unsigned int cmd,
950 || __put_user(x << PAGE_SHIFT, &request->handle)) 926 || __put_user(x << PAGE_SHIFT, &request->handle))
951 return -EFAULT; 927 return -EFAULT;
952 928
953 return drm_ioctl(file->f_path.dentry->d_inode, file, 929 return drm_ioctl(file, DRM_IOCTL_SG_FREE, (unsigned long)request);
954 DRM_IOCTL_SG_FREE, (unsigned long)request);
955} 930}
956 931
957#if defined(CONFIG_X86) || defined(CONFIG_IA64) 932#if defined(CONFIG_X86) || defined(CONFIG_IA64)
@@ -981,8 +956,7 @@ static int compat_drm_update_draw(struct file *file, unsigned int cmd,
981 __put_user(update32.data, &request->data)) 956 __put_user(update32.data, &request->data))
982 return -EFAULT; 957 return -EFAULT;
983 958
984 err = drm_ioctl(file->f_path.dentry->d_inode, file, 959 err = drm_ioctl(file, DRM_IOCTL_UPDATE_DRAW, (unsigned long)request);
985 DRM_IOCTL_UPDATE_DRAW, (unsigned long)request);
986 return err; 960 return err;
987} 961}
988#endif 962#endif
@@ -1023,8 +997,7 @@ static int compat_drm_wait_vblank(struct file *file, unsigned int cmd,
1023 || __put_user(req32.request.signal, &request->request.signal)) 997 || __put_user(req32.request.signal, &request->request.signal))
1024 return -EFAULT; 998 return -EFAULT;
1025 999
1026 err = drm_ioctl(file->f_path.dentry->d_inode, file, 1000 err = drm_ioctl(file, DRM_IOCTL_WAIT_VBLANK, (unsigned long)request);
1027 DRM_IOCTL_WAIT_VBLANK, (unsigned long)request);
1028 if (err) 1001 if (err)
1029 return err; 1002 return err;
1030 1003
@@ -1094,16 +1067,14 @@ long drm_compat_ioctl(struct file *filp, unsigned int cmd, unsigned long arg)
1094 * than always failing. 1067 * than always failing.
1095 */ 1068 */
1096 if (nr >= ARRAY_SIZE(drm_compat_ioctls)) 1069 if (nr >= ARRAY_SIZE(drm_compat_ioctls))
1097 return drm_ioctl(filp->f_dentry->d_inode, filp, cmd, arg); 1070 return drm_ioctl(filp, cmd, arg);
1098 1071
1099 fn = drm_compat_ioctls[nr]; 1072 fn = drm_compat_ioctls[nr];
1100 1073
1101 lock_kernel(); /* XXX for now */
1102 if (fn != NULL) 1074 if (fn != NULL)
1103 ret = (*fn) (filp, cmd, arg); 1075 ret = (*fn) (filp, cmd, arg);
1104 else 1076 else
1105 ret = drm_ioctl(filp->f_path.dentry->d_inode, filp, cmd, arg); 1077 ret = drm_ioctl(filp, cmd, arg);
1106 unlock_kernel();
1107 1078
1108 return ret; 1079 return ret;
1109} 1080}
diff --git a/drivers/gpu/drm/drm_irq.c b/drivers/gpu/drm/drm_irq.c
index 7998ee66b317..b98384dbd9a7 100644
--- a/drivers/gpu/drm/drm_irq.c
+++ b/drivers/gpu/drm/drm_irq.c
@@ -115,6 +115,7 @@ void drm_vblank_cleanup(struct drm_device *dev)
115 115
116 dev->num_crtcs = 0; 116 dev->num_crtcs = 0;
117} 117}
118EXPORT_SYMBOL(drm_vblank_cleanup);
118 119
119int drm_vblank_init(struct drm_device *dev, int num_crtcs) 120int drm_vblank_init(struct drm_device *dev, int num_crtcs)
120{ 121{
@@ -163,7 +164,6 @@ int drm_vblank_init(struct drm_device *dev, int num_crtcs)
163 } 164 }
164 165
165 dev->vblank_disable_allowed = 0; 166 dev->vblank_disable_allowed = 0;
166
167 return 0; 167 return 0;
168 168
169err: 169err:
@@ -493,6 +493,9 @@ EXPORT_SYMBOL(drm_vblank_off);
493 */ 493 */
494void drm_vblank_pre_modeset(struct drm_device *dev, int crtc) 494void drm_vblank_pre_modeset(struct drm_device *dev, int crtc)
495{ 495{
496 /* vblank is not initialized (IRQ not installed ?) */
497 if (!dev->num_crtcs)
498 return;
496 /* 499 /*
497 * To avoid all the problems that might happen if interrupts 500 * To avoid all the problems that might happen if interrupts
498 * were enabled/disabled around or between these calls, we just 501 * were enabled/disabled around or between these calls, we just
diff --git a/drivers/gpu/drm/drm_mm.c b/drivers/gpu/drm/drm_mm.c
index d7d7eac3ddd2..2ac074c8f5d2 100644
--- a/drivers/gpu/drm/drm_mm.c
+++ b/drivers/gpu/drm/drm_mm.c
@@ -358,7 +358,7 @@ struct drm_mm_node *drm_mm_search_free(const struct drm_mm *mm,
358 if (entry->size >= size + wasted) { 358 if (entry->size >= size + wasted) {
359 if (!best_match) 359 if (!best_match)
360 return entry; 360 return entry;
361 if (size < best_size) { 361 if (entry->size < best_size) {
362 best = entry; 362 best = entry;
363 best_size = entry->size; 363 best_size = entry->size;
364 } 364 }
@@ -405,10 +405,11 @@ struct drm_mm_node *drm_mm_search_free_in_range(const struct drm_mm *mm,
405 wasted += alignment - tmp; 405 wasted += alignment - tmp;
406 } 406 }
407 407
408 if (entry->size >= size + wasted) { 408 if (entry->size >= size + wasted &&
409 (entry->start + wasted + size) <= end) {
409 if (!best_match) 410 if (!best_match)
410 return entry; 411 return entry;
411 if (size < best_size) { 412 if (entry->size < best_size) {
412 best = entry; 413 best = entry;
413 best_size = entry->size; 414 best_size = entry->size;
414 } 415 }
diff --git a/drivers/gpu/drm/drm_modes.c b/drivers/gpu/drm/drm_modes.c
index 6d81a02463a3..76d63394c776 100644
--- a/drivers/gpu/drm/drm_modes.c
+++ b/drivers/gpu/drm/drm_modes.c
@@ -1,9 +1,4 @@
1/* 1/*
2 * The list_sort function is (presumably) licensed under the GPL (see the
3 * top level "COPYING" file for details).
4 *
5 * The remainder of this file is:
6 *
7 * Copyright © 1997-2003 by The XFree86 Project, Inc. 2 * Copyright © 1997-2003 by The XFree86 Project, Inc.
8 * Copyright © 2007 Dave Airlie 3 * Copyright © 2007 Dave Airlie
9 * Copyright © 2007-2008 Intel Corporation 4 * Copyright © 2007-2008 Intel Corporation
@@ -36,6 +31,7 @@
36 */ 31 */
37 32
38#include <linux/list.h> 33#include <linux/list.h>
34#include <linux/list_sort.h>
39#include "drmP.h" 35#include "drmP.h"
40#include "drm.h" 36#include "drm.h"
41#include "drm_crtc.h" 37#include "drm_crtc.h"
@@ -855,6 +851,7 @@ EXPORT_SYMBOL(drm_mode_prune_invalid);
855 851
856/** 852/**
857 * drm_mode_compare - compare modes for favorability 853 * drm_mode_compare - compare modes for favorability
854 * @priv: unused
858 * @lh_a: list_head for first mode 855 * @lh_a: list_head for first mode
859 * @lh_b: list_head for second mode 856 * @lh_b: list_head for second mode
860 * 857 *
@@ -868,7 +865,7 @@ EXPORT_SYMBOL(drm_mode_prune_invalid);
868 * Negative if @lh_a is better than @lh_b, zero if they're equivalent, or 865 * Negative if @lh_a is better than @lh_b, zero if they're equivalent, or
869 * positive if @lh_b is better than @lh_a. 866 * positive if @lh_b is better than @lh_a.
870 */ 867 */
871static int drm_mode_compare(struct list_head *lh_a, struct list_head *lh_b) 868static int drm_mode_compare(void *priv, struct list_head *lh_a, struct list_head *lh_b)
872{ 869{
873 struct drm_display_mode *a = list_entry(lh_a, struct drm_display_mode, head); 870 struct drm_display_mode *a = list_entry(lh_a, struct drm_display_mode, head);
874 struct drm_display_mode *b = list_entry(lh_b, struct drm_display_mode, head); 871 struct drm_display_mode *b = list_entry(lh_b, struct drm_display_mode, head);
@@ -885,85 +882,6 @@ static int drm_mode_compare(struct list_head *lh_a, struct list_head *lh_b)
885 return diff; 882 return diff;
886} 883}
887 884
888/* FIXME: what we don't have a list sort function? */
889/* list sort from Mark J Roberts (mjr@znex.org) */
890void list_sort(struct list_head *head,
891 int (*cmp)(struct list_head *a, struct list_head *b))
892{
893 struct list_head *p, *q, *e, *list, *tail, *oldhead;
894 int insize, nmerges, psize, qsize, i;
895
896 list = head->next;
897 list_del(head);
898 insize = 1;
899 for (;;) {
900 p = oldhead = list;
901 list = tail = NULL;
902 nmerges = 0;
903
904 while (p) {
905 nmerges++;
906 q = p;
907 psize = 0;
908 for (i = 0; i < insize; i++) {
909 psize++;
910 q = q->next == oldhead ? NULL : q->next;
911 if (!q)
912 break;
913 }
914
915 qsize = insize;
916 while (psize > 0 || (qsize > 0 && q)) {
917 if (!psize) {
918 e = q;
919 q = q->next;
920 qsize--;
921 if (q == oldhead)
922 q = NULL;
923 } else if (!qsize || !q) {
924 e = p;
925 p = p->next;
926 psize--;
927 if (p == oldhead)
928 p = NULL;
929 } else if (cmp(p, q) <= 0) {
930 e = p;
931 p = p->next;
932 psize--;
933 if (p == oldhead)
934 p = NULL;
935 } else {
936 e = q;
937 q = q->next;
938 qsize--;
939 if (q == oldhead)
940 q = NULL;
941 }
942 if (tail)
943 tail->next = e;
944 else
945 list = e;
946 e->prev = tail;
947 tail = e;
948 }
949 p = q;
950 }
951
952 tail->next = list;
953 list->prev = tail;
954
955 if (nmerges <= 1)
956 break;
957
958 insize *= 2;
959 }
960
961 head->next = list;
962 head->prev = list->prev;
963 list->prev->next = head;
964 list->prev = head;
965}
966
967/** 885/**
968 * drm_mode_sort - sort mode list 886 * drm_mode_sort - sort mode list
969 * @mode_list: list to sort 887 * @mode_list: list to sort
@@ -975,7 +893,7 @@ void list_sort(struct list_head *head,
975 */ 893 */
976void drm_mode_sort(struct list_head *mode_list) 894void drm_mode_sort(struct list_head *mode_list)
977{ 895{
978 list_sort(mode_list, drm_mode_compare); 896 list_sort(NULL, mode_list, drm_mode_compare);
979} 897}
980EXPORT_SYMBOL(drm_mode_sort); 898EXPORT_SYMBOL(drm_mode_sort);
981 899
diff --git a/drivers/gpu/drm/drm_pci.c b/drivers/gpu/drm/drm_pci.c
index 577094fb1995..e68ebf92fa2a 100644
--- a/drivers/gpu/drm/drm_pci.c
+++ b/drivers/gpu/drm/drm_pci.c
@@ -47,8 +47,7 @@
47/** 47/**
48 * \brief Allocate a PCI consistent memory block, for DMA. 48 * \brief Allocate a PCI consistent memory block, for DMA.
49 */ 49 */
50drm_dma_handle_t *drm_pci_alloc(struct drm_device * dev, size_t size, size_t align, 50drm_dma_handle_t *drm_pci_alloc(struct drm_device * dev, size_t size, size_t align)
51 dma_addr_t maxaddr)
52{ 51{
53 drm_dma_handle_t *dmah; 52 drm_dma_handle_t *dmah;
54#if 1 53#if 1
@@ -63,11 +62,6 @@ drm_dma_handle_t *drm_pci_alloc(struct drm_device * dev, size_t size, size_t ali
63 if (align > size) 62 if (align > size)
64 return NULL; 63 return NULL;
65 64
66 if (pci_set_dma_mask(dev->pdev, maxaddr) != 0) {
67 DRM_ERROR("Setting pci dma mask failed\n");
68 return NULL;
69 }
70
71 dmah = kmalloc(sizeof(drm_dma_handle_t), GFP_KERNEL); 65 dmah = kmalloc(sizeof(drm_dma_handle_t), GFP_KERNEL);
72 if (!dmah) 66 if (!dmah)
73 return NULL; 67 return NULL;
diff --git a/drivers/gpu/drm/i2c/ch7006_drv.c b/drivers/gpu/drm/i2c/ch7006_drv.c
index 9422a74c8b54..81681a07a806 100644
--- a/drivers/gpu/drm/i2c/ch7006_drv.c
+++ b/drivers/gpu/drm/i2c/ch7006_drv.c
@@ -408,6 +408,11 @@ static int ch7006_probe(struct i2c_client *client, const struct i2c_device_id *i
408 408
409 ch7006_info(client, "Detected version ID: %x\n", val); 409 ch7006_info(client, "Detected version ID: %x\n", val);
410 410
411 /* I don't know what this is for, but otherwise I get no
412 * signal.
413 */
414 ch7006_write(client, 0x3d, 0x0);
415
411 return 0; 416 return 0;
412 417
413fail: 418fail:
diff --git a/drivers/gpu/drm/i2c/ch7006_mode.c b/drivers/gpu/drm/i2c/ch7006_mode.c
index 87f5445092e8..e447dfb63890 100644
--- a/drivers/gpu/drm/i2c/ch7006_mode.c
+++ b/drivers/gpu/drm/i2c/ch7006_mode.c
@@ -427,11 +427,6 @@ void ch7006_state_load(struct i2c_client *client,
427 ch7006_load_reg(client, state, CH7006_SUBC_INC7); 427 ch7006_load_reg(client, state, CH7006_SUBC_INC7);
428 ch7006_load_reg(client, state, CH7006_PLL_CONTROL); 428 ch7006_load_reg(client, state, CH7006_PLL_CONTROL);
429 ch7006_load_reg(client, state, CH7006_CALC_SUBC_INC0); 429 ch7006_load_reg(client, state, CH7006_CALC_SUBC_INC0);
430
431 /* I don't know what this is for, but otherwise I get no
432 * signal.
433 */
434 ch7006_write(client, 0x3d, 0x0);
435} 430}
436 431
437void ch7006_state_save(struct i2c_client *client, 432void ch7006_state_save(struct i2c_client *client,
diff --git a/drivers/gpu/drm/i810/i810_dma.c b/drivers/gpu/drm/i810/i810_dma.c
index 7d1d88cdf2dc..de32d22a8c39 100644
--- a/drivers/gpu/drm/i810/i810_dma.c
+++ b/drivers/gpu/drm/i810/i810_dma.c
@@ -115,7 +115,7 @@ static int i810_mmap_buffers(struct file *filp, struct vm_area_struct *vma)
115static const struct file_operations i810_buffer_fops = { 115static const struct file_operations i810_buffer_fops = {
116 .open = drm_open, 116 .open = drm_open,
117 .release = drm_release, 117 .release = drm_release,
118 .ioctl = drm_ioctl, 118 .unlocked_ioctl = drm_ioctl,
119 .mmap = i810_mmap_buffers, 119 .mmap = i810_mmap_buffers,
120 .fasync = drm_fasync, 120 .fasync = drm_fasync,
121}; 121};
diff --git a/drivers/gpu/drm/i810/i810_drv.c b/drivers/gpu/drm/i810/i810_drv.c
index fabb9a817966..c1e02752e023 100644
--- a/drivers/gpu/drm/i810/i810_drv.c
+++ b/drivers/gpu/drm/i810/i810_drv.c
@@ -59,7 +59,7 @@ static struct drm_driver driver = {
59 .owner = THIS_MODULE, 59 .owner = THIS_MODULE,
60 .open = drm_open, 60 .open = drm_open,
61 .release = drm_release, 61 .release = drm_release,
62 .ioctl = drm_ioctl, 62 .unlocked_ioctl = drm_ioctl,
63 .mmap = drm_mmap, 63 .mmap = drm_mmap,
64 .poll = drm_poll, 64 .poll = drm_poll,
65 .fasync = drm_fasync, 65 .fasync = drm_fasync,
diff --git a/drivers/gpu/drm/i830/i830_dma.c b/drivers/gpu/drm/i830/i830_dma.c
index 877bf6cb14a4..06bd732e6463 100644
--- a/drivers/gpu/drm/i830/i830_dma.c
+++ b/drivers/gpu/drm/i830/i830_dma.c
@@ -117,7 +117,7 @@ static int i830_mmap_buffers(struct file *filp, struct vm_area_struct *vma)
117static const struct file_operations i830_buffer_fops = { 117static const struct file_operations i830_buffer_fops = {
118 .open = drm_open, 118 .open = drm_open,
119 .release = drm_release, 119 .release = drm_release,
120 .ioctl = drm_ioctl, 120 .unlocked_ioctl = drm_ioctl,
121 .mmap = i830_mmap_buffers, 121 .mmap = i830_mmap_buffers,
122 .fasync = drm_fasync, 122 .fasync = drm_fasync,
123}; 123};
diff --git a/drivers/gpu/drm/i830/i830_drv.c b/drivers/gpu/drm/i830/i830_drv.c
index 389597e4a623..44f990bed8f4 100644
--- a/drivers/gpu/drm/i830/i830_drv.c
+++ b/drivers/gpu/drm/i830/i830_drv.c
@@ -70,7 +70,7 @@ static struct drm_driver driver = {
70 .owner = THIS_MODULE, 70 .owner = THIS_MODULE,
71 .open = drm_open, 71 .open = drm_open,
72 .release = drm_release, 72 .release = drm_release,
73 .ioctl = drm_ioctl, 73 .unlocked_ioctl = drm_ioctl,
74 .mmap = drm_mmap, 74 .mmap = drm_mmap,
75 .poll = drm_poll, 75 .poll = drm_poll,
76 .fasync = drm_fasync, 76 .fasync = drm_fasync,
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
index 18476bf0b580..a894ade03093 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -272,7 +272,7 @@ static void i915_dump_pages(struct seq_file *m, struct page **pages, int page_co
272 mem = kmap_atomic(pages[page], KM_USER0); 272 mem = kmap_atomic(pages[page], KM_USER0);
273 for (i = 0; i < PAGE_SIZE; i += 4) 273 for (i = 0; i < PAGE_SIZE; i += 4)
274 seq_printf(m, "%08x : %08x\n", i, mem[i / 4]); 274 seq_printf(m, "%08x : %08x\n", i, mem[i / 4]);
275 kunmap_atomic(pages[page], KM_USER0); 275 kunmap_atomic(mem, KM_USER0);
276 } 276 }
277} 277}
278 278
@@ -290,7 +290,7 @@ static int i915_batchbuffer_info(struct seq_file *m, void *data)
290 list_for_each_entry(obj_priv, &dev_priv->mm.active_list, list) { 290 list_for_each_entry(obj_priv, &dev_priv->mm.active_list, list) {
291 obj = obj_priv->obj; 291 obj = obj_priv->obj;
292 if (obj->read_domains & I915_GEM_DOMAIN_COMMAND) { 292 if (obj->read_domains & I915_GEM_DOMAIN_COMMAND) {
293 ret = i915_gem_object_get_pages(obj); 293 ret = i915_gem_object_get_pages(obj, 0);
294 if (ret) { 294 if (ret) {
295 DRM_ERROR("Failed to get pages: %d\n", ret); 295 DRM_ERROR("Failed to get pages: %d\n", ret);
296 spin_unlock(&dev_priv->mm.active_list_lock); 296 spin_unlock(&dev_priv->mm.active_list_lock);
@@ -386,34 +386,6 @@ out:
386 return 0; 386 return 0;
387} 387}
388 388
389static int i915_registers_info(struct seq_file *m, void *data) {
390 struct drm_info_node *node = (struct drm_info_node *) m->private;
391 struct drm_device *dev = node->minor->dev;
392 drm_i915_private_t *dev_priv = dev->dev_private;
393 uint32_t reg;
394
395#define DUMP_RANGE(start, end) \
396 for (reg=start; reg < end; reg += 4) \
397 seq_printf(m, "%08x\t%08x\n", reg, I915_READ(reg));
398
399 DUMP_RANGE(0x00000, 0x00fff); /* VGA registers */
400 DUMP_RANGE(0x02000, 0x02fff); /* instruction, memory, interrupt control registers */
401 DUMP_RANGE(0x03000, 0x031ff); /* FENCE and PPGTT control registers */
402 DUMP_RANGE(0x03200, 0x03fff); /* frame buffer compression registers */
403 DUMP_RANGE(0x05000, 0x05fff); /* I/O control registers */
404 DUMP_RANGE(0x06000, 0x06fff); /* clock control registers */
405 DUMP_RANGE(0x07000, 0x07fff); /* 3D internal debug registers */
406 DUMP_RANGE(0x07400, 0x088ff); /* GPE debug registers */
407 DUMP_RANGE(0x0a000, 0x0afff); /* display palette registers */
408 DUMP_RANGE(0x10000, 0x13fff); /* MMIO MCHBAR */
409 DUMP_RANGE(0x30000, 0x3ffff); /* overlay registers */
410 DUMP_RANGE(0x60000, 0x6ffff); /* display engine pipeline registers */
411 DUMP_RANGE(0x70000, 0x72fff); /* display and cursor registers */
412 DUMP_RANGE(0x73000, 0x73fff); /* performance counters */
413
414 return 0;
415}
416
417static int 389static int
418i915_wedged_open(struct inode *inode, 390i915_wedged_open(struct inode *inode,
419 struct file *filp) 391 struct file *filp)
@@ -519,7 +491,6 @@ static int i915_wedged_create(struct dentry *root, struct drm_minor *minor)
519} 491}
520 492
521static struct drm_info_list i915_debugfs_list[] = { 493static struct drm_info_list i915_debugfs_list[] = {
522 {"i915_regs", i915_registers_info, 0},
523 {"i915_gem_active", i915_gem_object_list_info, 0, (void *) ACTIVE_LIST}, 494 {"i915_gem_active", i915_gem_object_list_info, 0, (void *) ACTIVE_LIST},
524 {"i915_gem_flushing", i915_gem_object_list_info, 0, (void *) FLUSHING_LIST}, 495 {"i915_gem_flushing", i915_gem_object_list_info, 0, (void *) FLUSHING_LIST},
525 {"i915_gem_inactive", i915_gem_object_list_info, 0, (void *) INACTIVE_LIST}, 496 {"i915_gem_inactive", i915_gem_object_list_info, 0, (void *) INACTIVE_LIST},
diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c
index 701bfeac7f57..2307f98349f7 100644
--- a/drivers/gpu/drm/i915/i915_dma.c
+++ b/drivers/gpu/drm/i915/i915_dma.c
@@ -123,7 +123,7 @@ static int i915_init_phys_hws(struct drm_device *dev)
123 drm_i915_private_t *dev_priv = dev->dev_private; 123 drm_i915_private_t *dev_priv = dev->dev_private;
124 /* Program Hardware Status Page */ 124 /* Program Hardware Status Page */
125 dev_priv->status_page_dmah = 125 dev_priv->status_page_dmah =
126 drm_pci_alloc(dev, PAGE_SIZE, PAGE_SIZE, 0xffffffff); 126 drm_pci_alloc(dev, PAGE_SIZE, PAGE_SIZE);
127 127
128 if (!dev_priv->status_page_dmah) { 128 if (!dev_priv->status_page_dmah) {
129 DRM_ERROR("Can not allocate hardware status page\n"); 129 DRM_ERROR("Can not allocate hardware status page\n");
@@ -134,6 +134,10 @@ static int i915_init_phys_hws(struct drm_device *dev)
134 134
135 memset(dev_priv->hw_status_page, 0, PAGE_SIZE); 135 memset(dev_priv->hw_status_page, 0, PAGE_SIZE);
136 136
137 if (IS_I965G(dev))
138 dev_priv->dma_status_page |= (dev_priv->dma_status_page >> 28) &
139 0xf0;
140
137 I915_WRITE(HWS_PGA, dev_priv->dma_status_page); 141 I915_WRITE(HWS_PGA, dev_priv->dma_status_page);
138 DRM_DEBUG_DRIVER("Enabled hardware status page\n"); 142 DRM_DEBUG_DRIVER("Enabled hardware status page\n");
139 return 0; 143 return 0;
@@ -731,8 +735,10 @@ static int i915_cmdbuffer(struct drm_device *dev, void *data,
731 if (cmdbuf->num_cliprects) { 735 if (cmdbuf->num_cliprects) {
732 cliprects = kcalloc(cmdbuf->num_cliprects, 736 cliprects = kcalloc(cmdbuf->num_cliprects,
733 sizeof(struct drm_clip_rect), GFP_KERNEL); 737 sizeof(struct drm_clip_rect), GFP_KERNEL);
734 if (cliprects == NULL) 738 if (cliprects == NULL) {
739 ret = -ENOMEM;
735 goto fail_batch_free; 740 goto fail_batch_free;
741 }
736 742
737 ret = copy_from_user(cliprects, cmdbuf->cliprects, 743 ret = copy_from_user(cliprects, cmdbuf->cliprects,
738 cmdbuf->num_cliprects * 744 cmdbuf->num_cliprects *
@@ -813,9 +819,13 @@ static int i915_getparam(struct drm_device *dev, void *data,
813 case I915_PARAM_HAS_PAGEFLIPPING: 819 case I915_PARAM_HAS_PAGEFLIPPING:
814 value = 1; 820 value = 1;
815 break; 821 break;
822 case I915_PARAM_HAS_EXECBUF2:
823 /* depends on GEM */
824 value = dev_priv->has_gem;
825 break;
816 default: 826 default:
817 DRM_DEBUG_DRIVER("Unknown parameter %d\n", 827 DRM_DEBUG_DRIVER("Unknown parameter %d\n",
818 param->param); 828 param->param);
819 return -EINVAL; 829 return -EINVAL;
820 } 830 }
821 831
@@ -1117,7 +1127,8 @@ static void i915_setup_compression(struct drm_device *dev, int size)
1117{ 1127{
1118 struct drm_i915_private *dev_priv = dev->dev_private; 1128 struct drm_i915_private *dev_priv = dev->dev_private;
1119 struct drm_mm_node *compressed_fb, *compressed_llb; 1129 struct drm_mm_node *compressed_fb, *compressed_llb;
1120 unsigned long cfb_base, ll_base; 1130 unsigned long cfb_base;
1131 unsigned long ll_base = 0;
1121 1132
1122 /* Leave 1M for line length buffer & misc. */ 1133 /* Leave 1M for line length buffer & misc. */
1123 compressed_fb = drm_mm_search_free(&dev_priv->vram, size, 4096, 0); 1134 compressed_fb = drm_mm_search_free(&dev_priv->vram, size, 4096, 0);
@@ -1200,14 +1211,6 @@ static int i915_load_modeset_init(struct drm_device *dev,
1200 dev->mode_config.fb_base = drm_get_resource_start(dev, fb_bar) & 1211 dev->mode_config.fb_base = drm_get_resource_start(dev, fb_bar) &
1201 0xff000000; 1212 0xff000000;
1202 1213
1203 if (IS_MOBILE(dev) || IS_I9XX(dev))
1204 dev_priv->cursor_needs_physical = true;
1205 else
1206 dev_priv->cursor_needs_physical = false;
1207
1208 if (IS_I965G(dev) || IS_G33(dev))
1209 dev_priv->cursor_needs_physical = false;
1210
1211 /* Basic memrange allocator for stolen space (aka vram) */ 1214 /* Basic memrange allocator for stolen space (aka vram) */
1212 drm_mm_init(&dev_priv->vram, 0, prealloc_size); 1215 drm_mm_init(&dev_priv->vram, 0, prealloc_size);
1213 DRM_INFO("set up %ldM of stolen space\n", prealloc_size / (1024*1024)); 1216 DRM_INFO("set up %ldM of stolen space\n", prealloc_size / (1024*1024));
@@ -1257,6 +1260,8 @@ static int i915_load_modeset_init(struct drm_device *dev,
1257 if (ret) 1260 if (ret)
1258 goto destroy_ringbuffer; 1261 goto destroy_ringbuffer;
1259 1262
1263 intel_modeset_init(dev);
1264
1260 ret = drm_irq_install(dev); 1265 ret = drm_irq_install(dev);
1261 if (ret) 1266 if (ret)
1262 goto destroy_ringbuffer; 1267 goto destroy_ringbuffer;
@@ -1271,8 +1276,6 @@ static int i915_load_modeset_init(struct drm_device *dev,
1271 1276
1272 I915_WRITE(INSTPM, (1 << 5) | (1 << 21)); 1277 I915_WRITE(INSTPM, (1 << 5) | (1 << 21));
1273 1278
1274 intel_modeset_init(dev);
1275
1276 drm_helper_initial_config(dev); 1279 drm_helper_initial_config(dev);
1277 1280
1278 return 0; 1281 return 0;
@@ -1360,7 +1363,7 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags)
1360{ 1363{
1361 struct drm_i915_private *dev_priv = dev->dev_private; 1364 struct drm_i915_private *dev_priv = dev->dev_private;
1362 resource_size_t base, size; 1365 resource_size_t base, size;
1363 int ret = 0, mmio_bar = IS_I9XX(dev) ? 0 : 1; 1366 int ret = 0, mmio_bar;
1364 uint32_t agp_size, prealloc_size, prealloc_start; 1367 uint32_t agp_size, prealloc_size, prealloc_start;
1365 1368
1366 /* i915 has 4 more counters */ 1369 /* i915 has 4 more counters */
@@ -1376,8 +1379,10 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags)
1376 1379
1377 dev->dev_private = (void *)dev_priv; 1380 dev->dev_private = (void *)dev_priv;
1378 dev_priv->dev = dev; 1381 dev_priv->dev = dev;
1382 dev_priv->info = (struct intel_device_info *) flags;
1379 1383
1380 /* Add register map (needed for suspend/resume) */ 1384 /* Add register map (needed for suspend/resume) */
1385 mmio_bar = IS_I9XX(dev) ? 0 : 1;
1381 base = drm_get_resource_start(dev, mmio_bar); 1386 base = drm_get_resource_start(dev, mmio_bar);
1382 size = drm_get_resource_len(dev, mmio_bar); 1387 size = drm_get_resource_len(dev, mmio_bar);
1383 1388
@@ -1652,6 +1657,7 @@ struct drm_ioctl_desc i915_ioctls[] = {
1652 DRM_IOCTL_DEF(DRM_I915_HWS_ADDR, i915_set_status_page, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), 1657 DRM_IOCTL_DEF(DRM_I915_HWS_ADDR, i915_set_status_page, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
1653 DRM_IOCTL_DEF(DRM_I915_GEM_INIT, i915_gem_init_ioctl, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), 1658 DRM_IOCTL_DEF(DRM_I915_GEM_INIT, i915_gem_init_ioctl, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
1654 DRM_IOCTL_DEF(DRM_I915_GEM_EXECBUFFER, i915_gem_execbuffer, DRM_AUTH), 1659 DRM_IOCTL_DEF(DRM_I915_GEM_EXECBUFFER, i915_gem_execbuffer, DRM_AUTH),
1660 DRM_IOCTL_DEF(DRM_I915_GEM_EXECBUFFER2, i915_gem_execbuffer2, DRM_AUTH),
1655 DRM_IOCTL_DEF(DRM_I915_GEM_PIN, i915_gem_pin_ioctl, DRM_AUTH|DRM_ROOT_ONLY), 1661 DRM_IOCTL_DEF(DRM_I915_GEM_PIN, i915_gem_pin_ioctl, DRM_AUTH|DRM_ROOT_ONLY),
1656 DRM_IOCTL_DEF(DRM_I915_GEM_UNPIN, i915_gem_unpin_ioctl, DRM_AUTH|DRM_ROOT_ONLY), 1662 DRM_IOCTL_DEF(DRM_I915_GEM_UNPIN, i915_gem_unpin_ioctl, DRM_AUTH|DRM_ROOT_ONLY),
1657 DRM_IOCTL_DEF(DRM_I915_GEM_BUSY, i915_gem_busy_ioctl, DRM_AUTH), 1663 DRM_IOCTL_DEF(DRM_I915_GEM_BUSY, i915_gem_busy_ioctl, DRM_AUTH),
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 2fa217862058..cf4cb3e9a0c2 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -33,7 +33,6 @@
33#include "i915_drm.h" 33#include "i915_drm.h"
34#include "i915_drv.h" 34#include "i915_drv.h"
35 35
36#include "drm_pciids.h"
37#include <linux/console.h> 36#include <linux/console.h>
38#include "drm_crtc_helper.h" 37#include "drm_crtc_helper.h"
39 38
@@ -46,36 +45,149 @@ module_param_named(fbpercrtc, i915_fbpercrtc, int, 0400);
46unsigned int i915_powersave = 1; 45unsigned int i915_powersave = 1;
47module_param_named(powersave, i915_powersave, int, 0400); 46module_param_named(powersave, i915_powersave, int, 0400);
48 47
48unsigned int i915_lvds_downclock = 0;
49module_param_named(lvds_downclock, i915_lvds_downclock, int, 0400);
50
49static struct drm_driver driver; 51static struct drm_driver driver;
50 52
51static struct pci_device_id pciidlist[] = { 53#define INTEL_VGA_DEVICE(id, info) { \
52 i915_PCI_IDS 54 .class = PCI_CLASS_DISPLAY_VGA << 8, \
55 .class_mask = 0xffff00, \
56 .vendor = 0x8086, \
57 .device = id, \
58 .subvendor = PCI_ANY_ID, \
59 .subdevice = PCI_ANY_ID, \
60 .driver_data = (unsigned long) info }
61
62const static struct intel_device_info intel_i830_info = {
63 .is_i8xx = 1, .is_mobile = 1, .cursor_needs_physical = 1,
64};
65
66const static struct intel_device_info intel_845g_info = {
67 .is_i8xx = 1,
68};
69
70const static struct intel_device_info intel_i85x_info = {
71 .is_i8xx = 1, .is_mobile = 1, .cursor_needs_physical = 1,
72};
73
74const static struct intel_device_info intel_i865g_info = {
75 .is_i8xx = 1,
76};
77
78const static struct intel_device_info intel_i915g_info = {
79 .is_i915g = 1, .is_i9xx = 1, .cursor_needs_physical = 1,
80};
81const static struct intel_device_info intel_i915gm_info = {
82 .is_i9xx = 1, .is_mobile = 1, .has_fbc = 1,
83 .cursor_needs_physical = 1,
84};
85const static struct intel_device_info intel_i945g_info = {
86 .is_i9xx = 1, .has_hotplug = 1, .cursor_needs_physical = 1,
87};
88const static struct intel_device_info intel_i945gm_info = {
89 .is_i945gm = 1, .is_i9xx = 1, .is_mobile = 1, .has_fbc = 1,
90 .has_hotplug = 1, .cursor_needs_physical = 1,
91};
92
93const static struct intel_device_info intel_i965g_info = {
94 .is_i965g = 1, .is_i9xx = 1, .has_hotplug = 1,
95};
96
97const static struct intel_device_info intel_i965gm_info = {
98 .is_i965g = 1, .is_mobile = 1, .is_i965gm = 1, .is_i9xx = 1,
99 .is_mobile = 1, .has_fbc = 1, .has_rc6 = 1,
100 .has_hotplug = 1,
101};
102
103const static struct intel_device_info intel_g33_info = {
104 .is_g33 = 1, .is_i9xx = 1, .need_gfx_hws = 1,
105 .has_hotplug = 1,
106};
107
108const static struct intel_device_info intel_g45_info = {
109 .is_i965g = 1, .is_g4x = 1, .is_i9xx = 1, .need_gfx_hws = 1,
110 .has_pipe_cxsr = 1,
111 .has_hotplug = 1,
112};
113
114const static struct intel_device_info intel_gm45_info = {
115 .is_i965g = 1, .is_mobile = 1, .is_g4x = 1, .is_i9xx = 1,
116 .is_mobile = 1, .need_gfx_hws = 1, .has_fbc = 1, .has_rc6 = 1,
117 .has_pipe_cxsr = 1,
118 .has_hotplug = 1,
119};
120
121const static struct intel_device_info intel_pineview_info = {
122 .is_g33 = 1, .is_pineview = 1, .is_mobile = 1, .is_i9xx = 1,
123 .need_gfx_hws = 1,
124 .has_hotplug = 1,
125};
126
127const static struct intel_device_info intel_ironlake_d_info = {
128 .is_ironlake = 1, .is_i965g = 1, .is_i9xx = 1, .need_gfx_hws = 1,
129 .has_pipe_cxsr = 1,
130 .has_hotplug = 1,
131};
132
133const static struct intel_device_info intel_ironlake_m_info = {
134 .is_ironlake = 1, .is_mobile = 1, .is_i965g = 1, .is_i9xx = 1,
135 .need_gfx_hws = 1, .has_rc6 = 1,
136 .has_hotplug = 1,
137};
138
139const static struct pci_device_id pciidlist[] = {
140 INTEL_VGA_DEVICE(0x3577, &intel_i830_info),
141 INTEL_VGA_DEVICE(0x2562, &intel_845g_info),
142 INTEL_VGA_DEVICE(0x3582, &intel_i85x_info),
143 INTEL_VGA_DEVICE(0x35e8, &intel_i85x_info),
144 INTEL_VGA_DEVICE(0x2572, &intel_i865g_info),
145 INTEL_VGA_DEVICE(0x2582, &intel_i915g_info),
146 INTEL_VGA_DEVICE(0x258a, &intel_i915g_info),
147 INTEL_VGA_DEVICE(0x2592, &intel_i915gm_info),
148 INTEL_VGA_DEVICE(0x2772, &intel_i945g_info),
149 INTEL_VGA_DEVICE(0x27a2, &intel_i945gm_info),
150 INTEL_VGA_DEVICE(0x27ae, &intel_i945gm_info),
151 INTEL_VGA_DEVICE(0x2972, &intel_i965g_info),
152 INTEL_VGA_DEVICE(0x2982, &intel_i965g_info),
153 INTEL_VGA_DEVICE(0x2992, &intel_i965g_info),
154 INTEL_VGA_DEVICE(0x29a2, &intel_i965g_info),
155 INTEL_VGA_DEVICE(0x29b2, &intel_g33_info),
156 INTEL_VGA_DEVICE(0x29c2, &intel_g33_info),
157 INTEL_VGA_DEVICE(0x29d2, &intel_g33_info),
158 INTEL_VGA_DEVICE(0x2a02, &intel_i965gm_info),
159 INTEL_VGA_DEVICE(0x2a12, &intel_i965gm_info),
160 INTEL_VGA_DEVICE(0x2a42, &intel_gm45_info),
161 INTEL_VGA_DEVICE(0x2e02, &intel_g45_info),
162 INTEL_VGA_DEVICE(0x2e12, &intel_g45_info),
163 INTEL_VGA_DEVICE(0x2e22, &intel_g45_info),
164 INTEL_VGA_DEVICE(0x2e32, &intel_g45_info),
165 INTEL_VGA_DEVICE(0x2e42, &intel_g45_info),
166 INTEL_VGA_DEVICE(0xa001, &intel_pineview_info),
167 INTEL_VGA_DEVICE(0xa011, &intel_pineview_info),
168 INTEL_VGA_DEVICE(0x0042, &intel_ironlake_d_info),
169 INTEL_VGA_DEVICE(0x0046, &intel_ironlake_m_info),
170 {0, 0, 0}
53}; 171};
54 172
55#if defined(CONFIG_DRM_I915_KMS) 173#if defined(CONFIG_DRM_I915_KMS)
56MODULE_DEVICE_TABLE(pci, pciidlist); 174MODULE_DEVICE_TABLE(pci, pciidlist);
57#endif 175#endif
58 176
59static int i915_suspend(struct drm_device *dev, pm_message_t state) 177static int i915_drm_freeze(struct drm_device *dev)
60{ 178{
61 struct drm_i915_private *dev_priv = dev->dev_private; 179 struct drm_i915_private *dev_priv = dev->dev_private;
62 180
63 if (!dev || !dev_priv) {
64 DRM_ERROR("dev: %p, dev_priv: %p\n", dev, dev_priv);
65 DRM_ERROR("DRM not initialized, aborting suspend.\n");
66 return -ENODEV;
67 }
68
69 if (state.event == PM_EVENT_PRETHAW)
70 return 0;
71
72 pci_save_state(dev->pdev); 181 pci_save_state(dev->pdev);
73 182
74 /* If KMS is active, we do the leavevt stuff here */ 183 /* If KMS is active, we do the leavevt stuff here */
75 if (drm_core_check_feature(dev, DRIVER_MODESET)) { 184 if (drm_core_check_feature(dev, DRIVER_MODESET)) {
76 if (i915_gem_idle(dev)) 185 int error = i915_gem_idle(dev);
186 if (error) {
77 dev_err(&dev->pdev->dev, 187 dev_err(&dev->pdev->dev,
78 "GEM idle failed, resume may fail\n"); 188 "GEM idle failed, resume might fail\n");
189 return error;
190 }
79 drm_irq_uninstall(dev); 191 drm_irq_uninstall(dev);
80 } 192 }
81 193
@@ -83,26 +195,42 @@ static int i915_suspend(struct drm_device *dev, pm_message_t state)
83 195
84 intel_opregion_free(dev, 1); 196 intel_opregion_free(dev, 1);
85 197
198 /* Modeset on resume, not lid events */
199 dev_priv->modeset_on_lid = 0;
200
201 return 0;
202}
203
204static int i915_suspend(struct drm_device *dev, pm_message_t state)
205{
206 int error;
207
208 if (!dev || !dev->dev_private) {
209 DRM_ERROR("dev: %p\n", dev);
210 DRM_ERROR("DRM not initialized, aborting suspend.\n");
211 return -ENODEV;
212 }
213
214 if (state.event == PM_EVENT_PRETHAW)
215 return 0;
216
217 error = i915_drm_freeze(dev);
218 if (error)
219 return error;
220
86 if (state.event == PM_EVENT_SUSPEND) { 221 if (state.event == PM_EVENT_SUSPEND) {
87 /* Shut down the device */ 222 /* Shut down the device */
88 pci_disable_device(dev->pdev); 223 pci_disable_device(dev->pdev);
89 pci_set_power_state(dev->pdev, PCI_D3hot); 224 pci_set_power_state(dev->pdev, PCI_D3hot);
90 } 225 }
91 226
92 /* Modeset on resume, not lid events */
93 dev_priv->modeset_on_lid = 0;
94
95 return 0; 227 return 0;
96} 228}
97 229
98static int i915_resume(struct drm_device *dev) 230static int i915_drm_thaw(struct drm_device *dev)
99{ 231{
100 struct drm_i915_private *dev_priv = dev->dev_private; 232 struct drm_i915_private *dev_priv = dev->dev_private;
101 int ret = 0; 233 int error = 0;
102
103 if (pci_enable_device(dev->pdev))
104 return -1;
105 pci_set_master(dev->pdev);
106 234
107 i915_restore_state(dev); 235 i915_restore_state(dev);
108 236
@@ -113,21 +241,28 @@ static int i915_resume(struct drm_device *dev)
113 mutex_lock(&dev->struct_mutex); 241 mutex_lock(&dev->struct_mutex);
114 dev_priv->mm.suspended = 0; 242 dev_priv->mm.suspended = 0;
115 243
116 ret = i915_gem_init_ringbuffer(dev); 244 error = i915_gem_init_ringbuffer(dev);
117 if (ret != 0)
118 ret = -1;
119 mutex_unlock(&dev->struct_mutex); 245 mutex_unlock(&dev->struct_mutex);
120 246
121 drm_irq_install(dev); 247 drm_irq_install(dev);
122 } 248
123 if (drm_core_check_feature(dev, DRIVER_MODESET)) {
124 /* Resume the modeset for every activated CRTC */ 249 /* Resume the modeset for every activated CRTC */
125 drm_helper_resume_force_mode(dev); 250 drm_helper_resume_force_mode(dev);
126 } 251 }
127 252
128 dev_priv->modeset_on_lid = 0; 253 dev_priv->modeset_on_lid = 0;
129 254
130 return ret; 255 return error;
256}
257
258static int i915_resume(struct drm_device *dev)
259{
260 if (pci_enable_device(dev->pdev))
261 return -EIO;
262
263 pci_set_master(dev->pdev);
264
265 return i915_drm_thaw(dev);
131} 266}
132 267
133/** 268/**
@@ -268,22 +403,73 @@ i915_pci_remove(struct pci_dev *pdev)
268 drm_put_dev(dev); 403 drm_put_dev(dev);
269} 404}
270 405
271static int 406static int i915_pm_suspend(struct device *dev)
272i915_pci_suspend(struct pci_dev *pdev, pm_message_t state)
273{ 407{
274 struct drm_device *dev = pci_get_drvdata(pdev); 408 struct pci_dev *pdev = to_pci_dev(dev);
409 struct drm_device *drm_dev = pci_get_drvdata(pdev);
410 int error;
275 411
276 return i915_suspend(dev, state); 412 if (!drm_dev || !drm_dev->dev_private) {
413 dev_err(dev, "DRM not initialized, aborting suspend.\n");
414 return -ENODEV;
415 }
416
417 error = i915_drm_freeze(drm_dev);
418 if (error)
419 return error;
420
421 pci_disable_device(pdev);
422 pci_set_power_state(pdev, PCI_D3hot);
423
424 return 0;
277} 425}
278 426
279static int 427static int i915_pm_resume(struct device *dev)
280i915_pci_resume(struct pci_dev *pdev)
281{ 428{
282 struct drm_device *dev = pci_get_drvdata(pdev); 429 struct pci_dev *pdev = to_pci_dev(dev);
430 struct drm_device *drm_dev = pci_get_drvdata(pdev);
283 431
284 return i915_resume(dev); 432 return i915_resume(drm_dev);
285} 433}
286 434
435static int i915_pm_freeze(struct device *dev)
436{
437 struct pci_dev *pdev = to_pci_dev(dev);
438 struct drm_device *drm_dev = pci_get_drvdata(pdev);
439
440 if (!drm_dev || !drm_dev->dev_private) {
441 dev_err(dev, "DRM not initialized, aborting suspend.\n");
442 return -ENODEV;
443 }
444
445 return i915_drm_freeze(drm_dev);
446}
447
448static int i915_pm_thaw(struct device *dev)
449{
450 struct pci_dev *pdev = to_pci_dev(dev);
451 struct drm_device *drm_dev = pci_get_drvdata(pdev);
452
453 return i915_drm_thaw(drm_dev);
454}
455
456static int i915_pm_poweroff(struct device *dev)
457{
458 struct pci_dev *pdev = to_pci_dev(dev);
459 struct drm_device *drm_dev = pci_get_drvdata(pdev);
460
461 return i915_drm_freeze(drm_dev);
462}
463
464const struct dev_pm_ops i915_pm_ops = {
465 .suspend = i915_pm_suspend,
466 .resume = i915_pm_resume,
467 .freeze = i915_pm_freeze,
468 .thaw = i915_pm_thaw,
469 .poweroff = i915_pm_poweroff,
470 .restore = i915_pm_resume,
471};
472
287static struct vm_operations_struct i915_gem_vm_ops = { 473static struct vm_operations_struct i915_gem_vm_ops = {
288 .fault = i915_gem_fault, 474 .fault = i915_gem_fault,
289 .open = drm_gem_vm_open, 475 .open = drm_gem_vm_open,
@@ -303,8 +489,11 @@ static struct drm_driver driver = {
303 .lastclose = i915_driver_lastclose, 489 .lastclose = i915_driver_lastclose,
304 .preclose = i915_driver_preclose, 490 .preclose = i915_driver_preclose,
305 .postclose = i915_driver_postclose, 491 .postclose = i915_driver_postclose,
492
493 /* Used in place of i915_pm_ops for non-DRIVER_MODESET */
306 .suspend = i915_suspend, 494 .suspend = i915_suspend,
307 .resume = i915_resume, 495 .resume = i915_resume,
496
308 .device_is_agp = i915_driver_device_is_agp, 497 .device_is_agp = i915_driver_device_is_agp,
309 .enable_vblank = i915_enable_vblank, 498 .enable_vblank = i915_enable_vblank,
310 .disable_vblank = i915_disable_vblank, 499 .disable_vblank = i915_disable_vblank,
@@ -329,7 +518,7 @@ static struct drm_driver driver = {
329 .owner = THIS_MODULE, 518 .owner = THIS_MODULE,
330 .open = drm_open, 519 .open = drm_open,
331 .release = drm_release, 520 .release = drm_release,
332 .ioctl = drm_ioctl, 521 .unlocked_ioctl = drm_ioctl,
333 .mmap = drm_gem_mmap, 522 .mmap = drm_gem_mmap,
334 .poll = drm_poll, 523 .poll = drm_poll,
335 .fasync = drm_fasync, 524 .fasync = drm_fasync,
@@ -344,10 +533,7 @@ static struct drm_driver driver = {
344 .id_table = pciidlist, 533 .id_table = pciidlist,
345 .probe = i915_pci_probe, 534 .probe = i915_pci_probe,
346 .remove = i915_pci_remove, 535 .remove = i915_pci_remove,
347#ifdef CONFIG_PM 536 .driver.pm = &i915_pm_ops,
348 .resume = i915_pci_resume,
349 .suspend = i915_pci_suspend,
350#endif
351 }, 537 },
352 538
353 .name = DRIVER_NAME, 539 .name = DRIVER_NAME,
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index fbecac72f5bb..b99b6a841d95 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -172,9 +172,31 @@ struct drm_i915_display_funcs {
172 172
173struct intel_overlay; 173struct intel_overlay;
174 174
175struct intel_device_info {
176 u8 is_mobile : 1;
177 u8 is_i8xx : 1;
178 u8 is_i915g : 1;
179 u8 is_i9xx : 1;
180 u8 is_i945gm : 1;
181 u8 is_i965g : 1;
182 u8 is_i965gm : 1;
183 u8 is_g33 : 1;
184 u8 need_gfx_hws : 1;
185 u8 is_g4x : 1;
186 u8 is_pineview : 1;
187 u8 is_ironlake : 1;
188 u8 has_fbc : 1;
189 u8 has_rc6 : 1;
190 u8 has_pipe_cxsr : 1;
191 u8 has_hotplug : 1;
192 u8 cursor_needs_physical : 1;
193};
194
175typedef struct drm_i915_private { 195typedef struct drm_i915_private {
176 struct drm_device *dev; 196 struct drm_device *dev;
177 197
198 const struct intel_device_info *info;
199
178 int has_gem; 200 int has_gem;
179 201
180 void __iomem *regs; 202 void __iomem *regs;
@@ -232,8 +254,6 @@ typedef struct drm_i915_private {
232 int hangcheck_count; 254 int hangcheck_count;
233 uint32_t last_acthd; 255 uint32_t last_acthd;
234 256
235 bool cursor_needs_physical;
236
237 struct drm_mm vram; 257 struct drm_mm vram;
238 258
239 unsigned long cfb_size; 259 unsigned long cfb_size;
@@ -263,6 +283,7 @@ typedef struct drm_i915_private {
263 unsigned int lvds_use_ssc:1; 283 unsigned int lvds_use_ssc:1;
264 unsigned int edp_support:1; 284 unsigned int edp_support:1;
265 int lvds_ssc_freq; 285 int lvds_ssc_freq;
286 int edp_bpp;
266 287
267 struct notifier_block lid_notifier; 288 struct notifier_block lid_notifier;
268 289
@@ -287,8 +308,6 @@ typedef struct drm_i915_private {
287 u32 saveDSPACNTR; 308 u32 saveDSPACNTR;
288 u32 saveDSPBCNTR; 309 u32 saveDSPBCNTR;
289 u32 saveDSPARB; 310 u32 saveDSPARB;
290 u32 saveRENDERSTANDBY;
291 u32 savePWRCTXA;
292 u32 saveHWS; 311 u32 saveHWS;
293 u32 savePIPEACONF; 312 u32 savePIPEACONF;
294 u32 savePIPEBCONF; 313 u32 savePIPEBCONF;
@@ -474,6 +493,15 @@ typedef struct drm_i915_private {
474 struct list_head flushing_list; 493 struct list_head flushing_list;
475 494
476 /** 495 /**
496 * List of objects currently pending a GPU write flush.
497 *
498 * All elements on this list will belong to either the
499 * active_list or flushing_list, last_rendering_seqno can
500 * be used to differentiate between the two elements.
501 */
502 struct list_head gpu_write_list;
503
504 /**
477 * LRU list of objects which are not in the ringbuffer and 505 * LRU list of objects which are not in the ringbuffer and
478 * are ready to unbind, but are still in the GTT. 506 * are ready to unbind, but are still in the GTT.
479 * 507 *
@@ -561,6 +589,7 @@ typedef struct drm_i915_private {
561 u16 orig_clock; 589 u16 orig_clock;
562 int child_dev_num; 590 int child_dev_num;
563 struct child_device_config *child_dev; 591 struct child_device_config *child_dev;
592 struct drm_connector *int_lvds_connector;
564} drm_i915_private_t; 593} drm_i915_private_t;
565 594
566/** driver private structure attached to each drm_gem_object */ 595/** driver private structure attached to each drm_gem_object */
@@ -572,6 +601,8 @@ struct drm_i915_gem_object {
572 601
573 /** This object's place on the active/flushing/inactive lists */ 602 /** This object's place on the active/flushing/inactive lists */
574 struct list_head list; 603 struct list_head list;
604 /** This object's place on GPU write list */
605 struct list_head gpu_write_list;
575 606
576 /** This object's place on the fenced object LRU */ 607 /** This object's place on the fenced object LRU */
577 struct list_head fence_list; 608 struct list_head fence_list;
@@ -703,6 +734,7 @@ extern struct drm_ioctl_desc i915_ioctls[];
703extern int i915_max_ioctl; 734extern int i915_max_ioctl;
704extern unsigned int i915_fbpercrtc; 735extern unsigned int i915_fbpercrtc;
705extern unsigned int i915_powersave; 736extern unsigned int i915_powersave;
737extern unsigned int i915_lvds_downclock;
706 738
707extern void i915_save_display(struct drm_device *dev); 739extern void i915_save_display(struct drm_device *dev);
708extern void i915_restore_display(struct drm_device *dev); 740extern void i915_restore_display(struct drm_device *dev);
@@ -794,6 +826,8 @@ int i915_gem_sw_finish_ioctl(struct drm_device *dev, void *data,
794 struct drm_file *file_priv); 826 struct drm_file *file_priv);
795int i915_gem_execbuffer(struct drm_device *dev, void *data, 827int i915_gem_execbuffer(struct drm_device *dev, void *data,
796 struct drm_file *file_priv); 828 struct drm_file *file_priv);
829int i915_gem_execbuffer2(struct drm_device *dev, void *data,
830 struct drm_file *file_priv);
797int i915_gem_pin_ioctl(struct drm_device *dev, void *data, 831int i915_gem_pin_ioctl(struct drm_device *dev, void *data,
798 struct drm_file *file_priv); 832 struct drm_file *file_priv);
799int i915_gem_unpin_ioctl(struct drm_device *dev, void *data, 833int i915_gem_unpin_ioctl(struct drm_device *dev, void *data,
@@ -843,12 +877,13 @@ int i915_do_wait_request(struct drm_device *dev, uint32_t seqno, int interruptib
843int i915_gem_fault(struct vm_area_struct *vma, struct vm_fault *vmf); 877int i915_gem_fault(struct vm_area_struct *vma, struct vm_fault *vmf);
844int i915_gem_object_set_to_gtt_domain(struct drm_gem_object *obj, 878int i915_gem_object_set_to_gtt_domain(struct drm_gem_object *obj,
845 int write); 879 int write);
880int i915_gem_object_set_to_display_plane(struct drm_gem_object *obj);
846int i915_gem_attach_phys_object(struct drm_device *dev, 881int i915_gem_attach_phys_object(struct drm_device *dev,
847 struct drm_gem_object *obj, int id); 882 struct drm_gem_object *obj, int id);
848void i915_gem_detach_phys_object(struct drm_device *dev, 883void i915_gem_detach_phys_object(struct drm_device *dev,
849 struct drm_gem_object *obj); 884 struct drm_gem_object *obj);
850void i915_gem_free_all_phys_object(struct drm_device *dev); 885void i915_gem_free_all_phys_object(struct drm_device *dev);
851int i915_gem_object_get_pages(struct drm_gem_object *obj); 886int i915_gem_object_get_pages(struct drm_gem_object *obj, gfp_t gfpmask);
852void i915_gem_object_put_pages(struct drm_gem_object *obj); 887void i915_gem_object_put_pages(struct drm_gem_object *obj);
853void i915_gem_release(struct drm_device * dev, struct drm_file *file_priv); 888void i915_gem_release(struct drm_device * dev, struct drm_file *file_priv);
854void i915_gem_object_flush_write_domain(struct drm_gem_object *obj); 889void i915_gem_object_flush_write_domain(struct drm_gem_object *obj);
@@ -860,6 +895,9 @@ void i915_gem_shrinker_exit(void);
860void i915_gem_detect_bit_6_swizzle(struct drm_device *dev); 895void i915_gem_detect_bit_6_swizzle(struct drm_device *dev);
861void i915_gem_object_do_bit_17_swizzle(struct drm_gem_object *obj); 896void i915_gem_object_do_bit_17_swizzle(struct drm_gem_object *obj);
862void i915_gem_object_save_bit_17_swizzle(struct drm_gem_object *obj); 897void i915_gem_object_save_bit_17_swizzle(struct drm_gem_object *obj);
898bool i915_tiling_ok(struct drm_device *dev, int stride, int size,
899 int tiling_mode);
900bool i915_obj_fenceable(struct drm_device *dev, struct drm_gem_object *obj);
863 901
864/* i915_gem_debug.c */ 902/* i915_gem_debug.c */
865void i915_gem_dump_object(struct drm_gem_object *obj, int len, 903void i915_gem_dump_object(struct drm_gem_object *obj, int len,
@@ -982,67 +1020,33 @@ extern void g4x_disable_fbc(struct drm_device *dev);
982extern int i915_wrap_ring(struct drm_device * dev); 1020extern int i915_wrap_ring(struct drm_device * dev);
983extern int i915_wait_ring(struct drm_device * dev, int n, const char *caller); 1021extern int i915_wait_ring(struct drm_device * dev, int n, const char *caller);
984 1022
985#define IS_I830(dev) ((dev)->pci_device == 0x3577) 1023#define INTEL_INFO(dev) (((struct drm_i915_private *) (dev)->dev_private)->info)
986#define IS_845G(dev) ((dev)->pci_device == 0x2562) 1024
987#define IS_I85X(dev) ((dev)->pci_device == 0x3582) 1025#define IS_I830(dev) ((dev)->pci_device == 0x3577)
988#define IS_I865G(dev) ((dev)->pci_device == 0x2572) 1026#define IS_845G(dev) ((dev)->pci_device == 0x2562)
989#define IS_I8XX(dev) (IS_I830(dev) || IS_845G(dev) || IS_I85X(dev) || IS_I865G(dev)) 1027#define IS_I85X(dev) ((dev)->pci_device == 0x3582)
990 1028#define IS_I865G(dev) ((dev)->pci_device == 0x2572)
991#define IS_I915G(dev) ((dev)->pci_device == 0x2582 || (dev)->pci_device == 0x258a) 1029#define IS_I8XX(dev) (INTEL_INFO(dev)->is_i8xx)
992#define IS_I915GM(dev) ((dev)->pci_device == 0x2592) 1030#define IS_I915G(dev) (INTEL_INFO(dev)->is_i915g)
993#define IS_I945G(dev) ((dev)->pci_device == 0x2772) 1031#define IS_I915GM(dev) ((dev)->pci_device == 0x2592)
994#define IS_I945GM(dev) ((dev)->pci_device == 0x27A2 ||\ 1032#define IS_I945G(dev) ((dev)->pci_device == 0x2772)
995 (dev)->pci_device == 0x27AE) 1033#define IS_I945GM(dev) (INTEL_INFO(dev)->is_i945gm)
996#define IS_I965G(dev) ((dev)->pci_device == 0x2972 || \ 1034#define IS_I965G(dev) (INTEL_INFO(dev)->is_i965g)
997 (dev)->pci_device == 0x2982 || \ 1035#define IS_I965GM(dev) (INTEL_INFO(dev)->is_i965gm)
998 (dev)->pci_device == 0x2992 || \ 1036#define IS_GM45(dev) ((dev)->pci_device == 0x2A42)
999 (dev)->pci_device == 0x29A2 || \ 1037#define IS_G4X(dev) (INTEL_INFO(dev)->is_g4x)
1000 (dev)->pci_device == 0x2A02 || \ 1038#define IS_PINEVIEW_G(dev) ((dev)->pci_device == 0xa001)
1001 (dev)->pci_device == 0x2A12 || \ 1039#define IS_PINEVIEW_M(dev) ((dev)->pci_device == 0xa011)
1002 (dev)->pci_device == 0x2A42 || \ 1040#define IS_PINEVIEW(dev) (INTEL_INFO(dev)->is_pineview)
1003 (dev)->pci_device == 0x2E02 || \ 1041#define IS_G33(dev) (INTEL_INFO(dev)->is_g33)
1004 (dev)->pci_device == 0x2E12 || \
1005 (dev)->pci_device == 0x2E22 || \
1006 (dev)->pci_device == 0x2E32 || \
1007 (dev)->pci_device == 0x2E42 || \
1008 (dev)->pci_device == 0x0042 || \
1009 (dev)->pci_device == 0x0046)
1010
1011#define IS_I965GM(dev) ((dev)->pci_device == 0x2A02 || \
1012 (dev)->pci_device == 0x2A12)
1013
1014#define IS_GM45(dev) ((dev)->pci_device == 0x2A42)
1015
1016#define IS_G4X(dev) ((dev)->pci_device == 0x2E02 || \
1017 (dev)->pci_device == 0x2E12 || \
1018 (dev)->pci_device == 0x2E22 || \
1019 (dev)->pci_device == 0x2E32 || \
1020 (dev)->pci_device == 0x2E42 || \
1021 IS_GM45(dev))
1022
1023#define IS_PINEVIEW_G(dev) ((dev)->pci_device == 0xa001)
1024#define IS_PINEVIEW_M(dev) ((dev)->pci_device == 0xa011)
1025#define IS_PINEVIEW(dev) (IS_PINEVIEW_G(dev) || IS_PINEVIEW_M(dev))
1026
1027#define IS_G33(dev) ((dev)->pci_device == 0x29C2 || \
1028 (dev)->pci_device == 0x29B2 || \
1029 (dev)->pci_device == 0x29D2 || \
1030 (IS_PINEVIEW(dev)))
1031
1032#define IS_IRONLAKE_D(dev) ((dev)->pci_device == 0x0042) 1042#define IS_IRONLAKE_D(dev) ((dev)->pci_device == 0x0042)
1033#define IS_IRONLAKE_M(dev) ((dev)->pci_device == 0x0046) 1043#define IS_IRONLAKE_M(dev) ((dev)->pci_device == 0x0046)
1034#define IS_IRONLAKE(dev) (IS_IRONLAKE_D(dev) || IS_IRONLAKE_M(dev)) 1044#define IS_IRONLAKE(dev) (INTEL_INFO(dev)->is_ironlake)
1035 1045#define IS_I9XX(dev) (INTEL_INFO(dev)->is_i9xx)
1036#define IS_I9XX(dev) (IS_I915G(dev) || IS_I915GM(dev) || IS_I945G(dev) || \ 1046#define IS_MOBILE(dev) (INTEL_INFO(dev)->is_mobile)
1037 IS_I945GM(dev) || IS_I965G(dev) || IS_G33(dev) || \
1038 IS_IRONLAKE(dev))
1039 1047
1040#define IS_MOBILE(dev) (IS_I830(dev) || IS_I85X(dev) || IS_I915GM(dev) || \ 1048#define I915_NEED_GFX_HWS(dev) (INTEL_INFO(dev)->need_gfx_hws)
1041 IS_I945GM(dev) || IS_I965GM(dev) || IS_GM45(dev) || \
1042 IS_PINEVIEW(dev) || IS_IRONLAKE_M(dev))
1043 1049
1044#define I915_NEED_GFX_HWS(dev) (IS_G33(dev) || IS_GM45(dev) || IS_G4X(dev) || \
1045 IS_IRONLAKE(dev))
1046/* With the 945 and later, Y tiling got adjusted so that it was 32 128-byte 1050/* With the 945 and later, Y tiling got adjusted so that it was 32 128-byte
1047 * rows, which changed the alignment requirements and fence programming. 1051 * rows, which changed the alignment requirements and fence programming.
1048 */ 1052 */
@@ -1054,17 +1058,14 @@ extern int i915_wait_ring(struct drm_device * dev, int n, const char *caller);
1054#define SUPPORTS_EDP(dev) (IS_IRONLAKE_M(dev)) 1058#define SUPPORTS_EDP(dev) (IS_IRONLAKE_M(dev))
1055#define SUPPORTS_TV(dev) (IS_I9XX(dev) && IS_MOBILE(dev) && \ 1059#define SUPPORTS_TV(dev) (IS_I9XX(dev) && IS_MOBILE(dev) && \
1056 !IS_IRONLAKE(dev) && !IS_PINEVIEW(dev)) 1060 !IS_IRONLAKE(dev) && !IS_PINEVIEW(dev))
1057#define I915_HAS_HOTPLUG(dev) (IS_I945G(dev) || IS_I945GM(dev) || IS_G33(dev) || IS_I965G(dev)) 1061#define I915_HAS_HOTPLUG(dev) (INTEL_INFO(dev)->has_hotplug)
1058/* dsparb controlled by hw only */ 1062/* dsparb controlled by hw only */
1059#define DSPARB_HWCONTROL(dev) (IS_G4X(dev) || IS_IRONLAKE(dev)) 1063#define DSPARB_HWCONTROL(dev) (IS_G4X(dev) || IS_IRONLAKE(dev))
1060 1064
1061#define HAS_FW_BLC(dev) (IS_I9XX(dev) || IS_G4X(dev) || IS_IRONLAKE(dev)) 1065#define HAS_FW_BLC(dev) (IS_I9XX(dev) || IS_G4X(dev) || IS_IRONLAKE(dev))
1062#define HAS_PIPE_CXSR(dev) (IS_G4X(dev) || IS_IRONLAKE(dev)) 1066#define HAS_PIPE_CXSR(dev) (INTEL_INFO(dev)->has_pipe_cxsr)
1063#define I915_HAS_FBC(dev) (IS_MOBILE(dev) && \ 1067#define I915_HAS_FBC(dev) (INTEL_INFO(dev)->has_fbc)
1064 (IS_I9XX(dev) || IS_GM45(dev)) && \ 1068#define I915_HAS_RC6(dev) (INTEL_INFO(dev)->has_rc6)
1065 !IS_PINEVIEW(dev) && \
1066 !IS_IRONLAKE(dev))
1067#define I915_HAS_RC6(dev) (IS_I965GM(dev) || IS_GM45(dev) || IS_IRONLAKE_M(dev))
1068 1069
1069#define PRIMARY_RINGBUFFER_SIZE (128*1024) 1070#define PRIMARY_RINGBUFFER_SIZE (128*1024)
1070 1071
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 8c463cf2050a..ec8a0d7ffa39 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -277,7 +277,7 @@ i915_gem_shmem_pread_fast(struct drm_device *dev, struct drm_gem_object *obj,
277 277
278 mutex_lock(&dev->struct_mutex); 278 mutex_lock(&dev->struct_mutex);
279 279
280 ret = i915_gem_object_get_pages(obj); 280 ret = i915_gem_object_get_pages(obj, 0);
281 if (ret != 0) 281 if (ret != 0)
282 goto fail_unlock; 282 goto fail_unlock;
283 283
@@ -321,40 +321,24 @@ fail_unlock:
321 return ret; 321 return ret;
322} 322}
323 323
324static inline gfp_t
325i915_gem_object_get_page_gfp_mask (struct drm_gem_object *obj)
326{
327 return mapping_gfp_mask(obj->filp->f_path.dentry->d_inode->i_mapping);
328}
329
330static inline void
331i915_gem_object_set_page_gfp_mask (struct drm_gem_object *obj, gfp_t gfp)
332{
333 mapping_set_gfp_mask(obj->filp->f_path.dentry->d_inode->i_mapping, gfp);
334}
335
336static int 324static int
337i915_gem_object_get_pages_or_evict(struct drm_gem_object *obj) 325i915_gem_object_get_pages_or_evict(struct drm_gem_object *obj)
338{ 326{
339 int ret; 327 int ret;
340 328
341 ret = i915_gem_object_get_pages(obj); 329 ret = i915_gem_object_get_pages(obj, __GFP_NORETRY | __GFP_NOWARN);
342 330
343 /* If we've insufficient memory to map in the pages, attempt 331 /* If we've insufficient memory to map in the pages, attempt
344 * to make some space by throwing out some old buffers. 332 * to make some space by throwing out some old buffers.
345 */ 333 */
346 if (ret == -ENOMEM) { 334 if (ret == -ENOMEM) {
347 struct drm_device *dev = obj->dev; 335 struct drm_device *dev = obj->dev;
348 gfp_t gfp;
349 336
350 ret = i915_gem_evict_something(dev, obj->size); 337 ret = i915_gem_evict_something(dev, obj->size);
351 if (ret) 338 if (ret)
352 return ret; 339 return ret;
353 340
354 gfp = i915_gem_object_get_page_gfp_mask(obj); 341 ret = i915_gem_object_get_pages(obj, 0);
355 i915_gem_object_set_page_gfp_mask(obj, gfp & ~__GFP_NORETRY);
356 ret = i915_gem_object_get_pages(obj);
357 i915_gem_object_set_page_gfp_mask (obj, gfp);
358 } 342 }
359 343
360 return ret; 344 return ret;
@@ -790,7 +774,7 @@ i915_gem_shmem_pwrite_fast(struct drm_device *dev, struct drm_gem_object *obj,
790 774
791 mutex_lock(&dev->struct_mutex); 775 mutex_lock(&dev->struct_mutex);
792 776
793 ret = i915_gem_object_get_pages(obj); 777 ret = i915_gem_object_get_pages(obj, 0);
794 if (ret != 0) 778 if (ret != 0)
795 goto fail_unlock; 779 goto fail_unlock;
796 780
@@ -1568,6 +1552,8 @@ i915_gem_object_move_to_inactive(struct drm_gem_object *obj)
1568 else 1552 else
1569 list_move_tail(&obj_priv->list, &dev_priv->mm.inactive_list); 1553 list_move_tail(&obj_priv->list, &dev_priv->mm.inactive_list);
1570 1554
1555 BUG_ON(!list_empty(&obj_priv->gpu_write_list));
1556
1571 obj_priv->last_rendering_seqno = 0; 1557 obj_priv->last_rendering_seqno = 0;
1572 if (obj_priv->active) { 1558 if (obj_priv->active) {
1573 obj_priv->active = 0; 1559 obj_priv->active = 0;
@@ -1638,7 +1624,8 @@ i915_add_request(struct drm_device *dev, struct drm_file *file_priv,
1638 struct drm_i915_gem_object *obj_priv, *next; 1624 struct drm_i915_gem_object *obj_priv, *next;
1639 1625
1640 list_for_each_entry_safe(obj_priv, next, 1626 list_for_each_entry_safe(obj_priv, next,
1641 &dev_priv->mm.flushing_list, list) { 1627 &dev_priv->mm.gpu_write_list,
1628 gpu_write_list) {
1642 struct drm_gem_object *obj = obj_priv->obj; 1629 struct drm_gem_object *obj = obj_priv->obj;
1643 1630
1644 if ((obj->write_domain & flush_domains) == 1631 if ((obj->write_domain & flush_domains) ==
@@ -1646,6 +1633,7 @@ i915_add_request(struct drm_device *dev, struct drm_file *file_priv,
1646 uint32_t old_write_domain = obj->write_domain; 1633 uint32_t old_write_domain = obj->write_domain;
1647 1634
1648 obj->write_domain = 0; 1635 obj->write_domain = 0;
1636 list_del_init(&obj_priv->gpu_write_list);
1649 i915_gem_object_move_to_active(obj, seqno); 1637 i915_gem_object_move_to_active(obj, seqno);
1650 1638
1651 trace_i915_gem_object_change_domain(obj, 1639 trace_i915_gem_object_change_domain(obj,
@@ -2021,9 +2009,6 @@ i915_gem_object_unbind(struct drm_gem_object *obj)
2021 /* blow away mappings if mapped through GTT */ 2009 /* blow away mappings if mapped through GTT */
2022 i915_gem_release_mmap(obj); 2010 i915_gem_release_mmap(obj);
2023 2011
2024 if (obj_priv->fence_reg != I915_FENCE_REG_NONE)
2025 i915_gem_clear_fence_reg(obj);
2026
2027 /* Move the object to the CPU domain to ensure that 2012 /* Move the object to the CPU domain to ensure that
2028 * any possible CPU writes while it's not in the GTT 2013 * any possible CPU writes while it's not in the GTT
2029 * are flushed when we go to remap it. This will 2014 * are flushed when we go to remap it. This will
@@ -2039,6 +2024,10 @@ i915_gem_object_unbind(struct drm_gem_object *obj)
2039 2024
2040 BUG_ON(obj_priv->active); 2025 BUG_ON(obj_priv->active);
2041 2026
2027 /* release the fence reg _after_ flushing */
2028 if (obj_priv->fence_reg != I915_FENCE_REG_NONE)
2029 i915_gem_clear_fence_reg(obj);
2030
2042 if (obj_priv->agp_mem != NULL) { 2031 if (obj_priv->agp_mem != NULL) {
2043 drm_unbind_agp(obj_priv->agp_mem); 2032 drm_unbind_agp(obj_priv->agp_mem);
2044 drm_free_agp(obj_priv->agp_mem, obj->size / PAGE_SIZE); 2033 drm_free_agp(obj_priv->agp_mem, obj->size / PAGE_SIZE);
@@ -2099,8 +2088,8 @@ static int
2099i915_gem_evict_everything(struct drm_device *dev) 2088i915_gem_evict_everything(struct drm_device *dev)
2100{ 2089{
2101 drm_i915_private_t *dev_priv = dev->dev_private; 2090 drm_i915_private_t *dev_priv = dev->dev_private;
2102 uint32_t seqno;
2103 int ret; 2091 int ret;
2092 uint32_t seqno;
2104 bool lists_empty; 2093 bool lists_empty;
2105 2094
2106 spin_lock(&dev_priv->mm.active_list_lock); 2095 spin_lock(&dev_priv->mm.active_list_lock);
@@ -2122,6 +2111,8 @@ i915_gem_evict_everything(struct drm_device *dev)
2122 if (ret) 2111 if (ret)
2123 return ret; 2112 return ret;
2124 2113
2114 BUG_ON(!list_empty(&dev_priv->mm.flushing_list));
2115
2125 ret = i915_gem_evict_from_inactive_list(dev); 2116 ret = i915_gem_evict_from_inactive_list(dev);
2126 if (ret) 2117 if (ret)
2127 return ret; 2118 return ret;
@@ -2229,7 +2220,8 @@ i915_gem_evict_something(struct drm_device *dev, int min_size)
2229} 2220}
2230 2221
2231int 2222int
2232i915_gem_object_get_pages(struct drm_gem_object *obj) 2223i915_gem_object_get_pages(struct drm_gem_object *obj,
2224 gfp_t gfpmask)
2233{ 2225{
2234 struct drm_i915_gem_object *obj_priv = obj->driver_private; 2226 struct drm_i915_gem_object *obj_priv = obj->driver_private;
2235 int page_count, i; 2227 int page_count, i;
@@ -2255,7 +2247,10 @@ i915_gem_object_get_pages(struct drm_gem_object *obj)
2255 inode = obj->filp->f_path.dentry->d_inode; 2247 inode = obj->filp->f_path.dentry->d_inode;
2256 mapping = inode->i_mapping; 2248 mapping = inode->i_mapping;
2257 for (i = 0; i < page_count; i++) { 2249 for (i = 0; i < page_count; i++) {
2258 page = read_mapping_page(mapping, i, NULL); 2250 page = read_cache_page_gfp(mapping, i,
2251 mapping_gfp_mask (mapping) |
2252 __GFP_COLD |
2253 gfpmask);
2259 if (IS_ERR(page)) { 2254 if (IS_ERR(page)) {
2260 ret = PTR_ERR(page); 2255 ret = PTR_ERR(page);
2261 i915_gem_object_put_pages(obj); 2256 i915_gem_object_put_pages(obj);
@@ -2578,12 +2573,9 @@ i915_gem_object_bind_to_gtt(struct drm_gem_object *obj, unsigned alignment)
2578 drm_i915_private_t *dev_priv = dev->dev_private; 2573 drm_i915_private_t *dev_priv = dev->dev_private;
2579 struct drm_i915_gem_object *obj_priv = obj->driver_private; 2574 struct drm_i915_gem_object *obj_priv = obj->driver_private;
2580 struct drm_mm_node *free_space; 2575 struct drm_mm_node *free_space;
2581 bool retry_alloc = false; 2576 gfp_t gfpmask = __GFP_NORETRY | __GFP_NOWARN;
2582 int ret; 2577 int ret;
2583 2578
2584 if (dev_priv->mm.suspended)
2585 return -EBUSY;
2586
2587 if (obj_priv->madv != I915_MADV_WILLNEED) { 2579 if (obj_priv->madv != I915_MADV_WILLNEED) {
2588 DRM_ERROR("Attempting to bind a purgeable object\n"); 2580 DRM_ERROR("Attempting to bind a purgeable object\n");
2589 return -EINVAL; 2581 return -EINVAL;
@@ -2625,15 +2617,7 @@ i915_gem_object_bind_to_gtt(struct drm_gem_object *obj, unsigned alignment)
2625 DRM_INFO("Binding object of size %zd at 0x%08x\n", 2617 DRM_INFO("Binding object of size %zd at 0x%08x\n",
2626 obj->size, obj_priv->gtt_offset); 2618 obj->size, obj_priv->gtt_offset);
2627#endif 2619#endif
2628 if (retry_alloc) { 2620 ret = i915_gem_object_get_pages(obj, gfpmask);
2629 i915_gem_object_set_page_gfp_mask (obj,
2630 i915_gem_object_get_page_gfp_mask (obj) & ~__GFP_NORETRY);
2631 }
2632 ret = i915_gem_object_get_pages(obj);
2633 if (retry_alloc) {
2634 i915_gem_object_set_page_gfp_mask (obj,
2635 i915_gem_object_get_page_gfp_mask (obj) | __GFP_NORETRY);
2636 }
2637 if (ret) { 2621 if (ret) {
2638 drm_mm_put_block(obj_priv->gtt_space); 2622 drm_mm_put_block(obj_priv->gtt_space);
2639 obj_priv->gtt_space = NULL; 2623 obj_priv->gtt_space = NULL;
@@ -2643,9 +2627,9 @@ i915_gem_object_bind_to_gtt(struct drm_gem_object *obj, unsigned alignment)
2643 ret = i915_gem_evict_something(dev, obj->size); 2627 ret = i915_gem_evict_something(dev, obj->size);
2644 if (ret) { 2628 if (ret) {
2645 /* now try to shrink everyone else */ 2629 /* now try to shrink everyone else */
2646 if (! retry_alloc) { 2630 if (gfpmask) {
2647 retry_alloc = true; 2631 gfpmask = 0;
2648 goto search_free; 2632 goto search_free;
2649 } 2633 }
2650 2634
2651 return ret; 2635 return ret;
@@ -2723,7 +2707,7 @@ i915_gem_object_flush_gpu_write_domain(struct drm_gem_object *obj)
2723 old_write_domain = obj->write_domain; 2707 old_write_domain = obj->write_domain;
2724 i915_gem_flush(dev, 0, obj->write_domain); 2708 i915_gem_flush(dev, 0, obj->write_domain);
2725 seqno = i915_add_request(dev, NULL, obj->write_domain); 2709 seqno = i915_add_request(dev, NULL, obj->write_domain);
2726 obj->write_domain = 0; 2710 BUG_ON(obj->write_domain);
2727 i915_gem_object_move_to_active(obj, seqno); 2711 i915_gem_object_move_to_active(obj, seqno);
2728 2712
2729 trace_i915_gem_object_change_domain(obj, 2713 trace_i915_gem_object_change_domain(obj,
@@ -2839,6 +2823,57 @@ i915_gem_object_set_to_gtt_domain(struct drm_gem_object *obj, int write)
2839 return 0; 2823 return 0;
2840} 2824}
2841 2825
2826/*
2827 * Prepare buffer for display plane. Use uninterruptible for possible flush
2828 * wait, as in modesetting process we're not supposed to be interrupted.
2829 */
2830int
2831i915_gem_object_set_to_display_plane(struct drm_gem_object *obj)
2832{
2833 struct drm_device *dev = obj->dev;
2834 struct drm_i915_gem_object *obj_priv = obj->driver_private;
2835 uint32_t old_write_domain, old_read_domains;
2836 int ret;
2837
2838 /* Not valid to be called on unbound objects. */
2839 if (obj_priv->gtt_space == NULL)
2840 return -EINVAL;
2841
2842 i915_gem_object_flush_gpu_write_domain(obj);
2843
2844 /* Wait on any GPU rendering and flushing to occur. */
2845 if (obj_priv->active) {
2846#if WATCH_BUF
2847 DRM_INFO("%s: object %p wait for seqno %08x\n",
2848 __func__, obj, obj_priv->last_rendering_seqno);
2849#endif
2850 ret = i915_do_wait_request(dev, obj_priv->last_rendering_seqno, 0);
2851 if (ret != 0)
2852 return ret;
2853 }
2854
2855 old_write_domain = obj->write_domain;
2856 old_read_domains = obj->read_domains;
2857
2858 obj->read_domains &= I915_GEM_DOMAIN_GTT;
2859
2860 i915_gem_object_flush_cpu_write_domain(obj);
2861
2862 /* It should now be out of any other write domains, and we can update
2863 * the domain values for our changes.
2864 */
2865 BUG_ON((obj->write_domain & ~I915_GEM_DOMAIN_GTT) != 0);
2866 obj->read_domains |= I915_GEM_DOMAIN_GTT;
2867 obj->write_domain = I915_GEM_DOMAIN_GTT;
2868 obj_priv->dirty = 1;
2869
2870 trace_i915_gem_object_change_domain(obj,
2871 old_read_domains,
2872 old_write_domain);
2873
2874 return 0;
2875}
2876
2842/** 2877/**
2843 * Moves a single object to the CPU read, and possibly write domain. 2878 * Moves a single object to the CPU read, and possibly write domain.
2844 * 2879 *
@@ -3198,7 +3233,7 @@ i915_gem_object_set_cpu_read_domain_range(struct drm_gem_object *obj,
3198static int 3233static int
3199i915_gem_object_pin_and_relocate(struct drm_gem_object *obj, 3234i915_gem_object_pin_and_relocate(struct drm_gem_object *obj,
3200 struct drm_file *file_priv, 3235 struct drm_file *file_priv,
3201 struct drm_i915_gem_exec_object *entry, 3236 struct drm_i915_gem_exec_object2 *entry,
3202 struct drm_i915_gem_relocation_entry *relocs) 3237 struct drm_i915_gem_relocation_entry *relocs)
3203{ 3238{
3204 struct drm_device *dev = obj->dev; 3239 struct drm_device *dev = obj->dev;
@@ -3206,12 +3241,35 @@ i915_gem_object_pin_and_relocate(struct drm_gem_object *obj,
3206 struct drm_i915_gem_object *obj_priv = obj->driver_private; 3241 struct drm_i915_gem_object *obj_priv = obj->driver_private;
3207 int i, ret; 3242 int i, ret;
3208 void __iomem *reloc_page; 3243 void __iomem *reloc_page;
3244 bool need_fence;
3245
3246 need_fence = entry->flags & EXEC_OBJECT_NEEDS_FENCE &&
3247 obj_priv->tiling_mode != I915_TILING_NONE;
3248
3249 /* Check fence reg constraints and rebind if necessary */
3250 if (need_fence && !i915_obj_fenceable(dev, obj))
3251 i915_gem_object_unbind(obj);
3209 3252
3210 /* Choose the GTT offset for our buffer and put it there. */ 3253 /* Choose the GTT offset for our buffer and put it there. */
3211 ret = i915_gem_object_pin(obj, (uint32_t) entry->alignment); 3254 ret = i915_gem_object_pin(obj, (uint32_t) entry->alignment);
3212 if (ret) 3255 if (ret)
3213 return ret; 3256 return ret;
3214 3257
3258 /*
3259 * Pre-965 chips need a fence register set up in order to
3260 * properly handle blits to/from tiled surfaces.
3261 */
3262 if (need_fence) {
3263 ret = i915_gem_object_get_fence_reg(obj);
3264 if (ret != 0) {
3265 if (ret != -EBUSY && ret != -ERESTARTSYS)
3266 DRM_ERROR("Failure to install fence: %d\n",
3267 ret);
3268 i915_gem_object_unpin(obj);
3269 return ret;
3270 }
3271 }
3272
3215 entry->offset = obj_priv->gtt_offset; 3273 entry->offset = obj_priv->gtt_offset;
3216 3274
3217 /* Apply the relocations, using the GTT aperture to avoid cache 3275 /* Apply the relocations, using the GTT aperture to avoid cache
@@ -3373,7 +3431,7 @@ i915_gem_object_pin_and_relocate(struct drm_gem_object *obj,
3373 */ 3431 */
3374static int 3432static int
3375i915_dispatch_gem_execbuffer(struct drm_device *dev, 3433i915_dispatch_gem_execbuffer(struct drm_device *dev,
3376 struct drm_i915_gem_execbuffer *exec, 3434 struct drm_i915_gem_execbuffer2 *exec,
3377 struct drm_clip_rect *cliprects, 3435 struct drm_clip_rect *cliprects,
3378 uint64_t exec_offset) 3436 uint64_t exec_offset)
3379{ 3437{
@@ -3463,7 +3521,7 @@ i915_gem_ring_throttle(struct drm_device *dev, struct drm_file *file_priv)
3463} 3521}
3464 3522
3465static int 3523static int
3466i915_gem_get_relocs_from_user(struct drm_i915_gem_exec_object *exec_list, 3524i915_gem_get_relocs_from_user(struct drm_i915_gem_exec_object2 *exec_list,
3467 uint32_t buffer_count, 3525 uint32_t buffer_count,
3468 struct drm_i915_gem_relocation_entry **relocs) 3526 struct drm_i915_gem_relocation_entry **relocs)
3469{ 3527{
@@ -3478,8 +3536,10 @@ i915_gem_get_relocs_from_user(struct drm_i915_gem_exec_object *exec_list,
3478 } 3536 }
3479 3537
3480 *relocs = drm_calloc_large(reloc_count, sizeof(**relocs)); 3538 *relocs = drm_calloc_large(reloc_count, sizeof(**relocs));
3481 if (*relocs == NULL) 3539 if (*relocs == NULL) {
3540 DRM_ERROR("failed to alloc relocs, count %d\n", reloc_count);
3482 return -ENOMEM; 3541 return -ENOMEM;
3542 }
3483 3543
3484 for (i = 0; i < buffer_count; i++) { 3544 for (i = 0; i < buffer_count; i++) {
3485 struct drm_i915_gem_relocation_entry __user *user_relocs; 3545 struct drm_i915_gem_relocation_entry __user *user_relocs;
@@ -3503,13 +3563,16 @@ i915_gem_get_relocs_from_user(struct drm_i915_gem_exec_object *exec_list,
3503} 3563}
3504 3564
3505static int 3565static int
3506i915_gem_put_relocs_to_user(struct drm_i915_gem_exec_object *exec_list, 3566i915_gem_put_relocs_to_user(struct drm_i915_gem_exec_object2 *exec_list,
3507 uint32_t buffer_count, 3567 uint32_t buffer_count,
3508 struct drm_i915_gem_relocation_entry *relocs) 3568 struct drm_i915_gem_relocation_entry *relocs)
3509{ 3569{
3510 uint32_t reloc_count = 0, i; 3570 uint32_t reloc_count = 0, i;
3511 int ret = 0; 3571 int ret = 0;
3512 3572
3573 if (relocs == NULL)
3574 return 0;
3575
3513 for (i = 0; i < buffer_count; i++) { 3576 for (i = 0; i < buffer_count; i++) {
3514 struct drm_i915_gem_relocation_entry __user *user_relocs; 3577 struct drm_i915_gem_relocation_entry __user *user_relocs;
3515 int unwritten; 3578 int unwritten;
@@ -3536,7 +3599,7 @@ err:
3536} 3599}
3537 3600
3538static int 3601static int
3539i915_gem_check_execbuffer (struct drm_i915_gem_execbuffer *exec, 3602i915_gem_check_execbuffer (struct drm_i915_gem_execbuffer2 *exec,
3540 uint64_t exec_offset) 3603 uint64_t exec_offset)
3541{ 3604{
3542 uint32_t exec_start, exec_len; 3605 uint32_t exec_start, exec_len;
@@ -3589,18 +3652,18 @@ i915_gem_wait_for_pending_flip(struct drm_device *dev,
3589} 3652}
3590 3653
3591int 3654int
3592i915_gem_execbuffer(struct drm_device *dev, void *data, 3655i915_gem_do_execbuffer(struct drm_device *dev, void *data,
3593 struct drm_file *file_priv) 3656 struct drm_file *file_priv,
3657 struct drm_i915_gem_execbuffer2 *args,
3658 struct drm_i915_gem_exec_object2 *exec_list)
3594{ 3659{
3595 drm_i915_private_t *dev_priv = dev->dev_private; 3660 drm_i915_private_t *dev_priv = dev->dev_private;
3596 struct drm_i915_gem_execbuffer *args = data;
3597 struct drm_i915_gem_exec_object *exec_list = NULL;
3598 struct drm_gem_object **object_list = NULL; 3661 struct drm_gem_object **object_list = NULL;
3599 struct drm_gem_object *batch_obj; 3662 struct drm_gem_object *batch_obj;
3600 struct drm_i915_gem_object *obj_priv; 3663 struct drm_i915_gem_object *obj_priv;
3601 struct drm_clip_rect *cliprects = NULL; 3664 struct drm_clip_rect *cliprects = NULL;
3602 struct drm_i915_gem_relocation_entry *relocs; 3665 struct drm_i915_gem_relocation_entry *relocs = NULL;
3603 int ret, ret2, i, pinned = 0; 3666 int ret = 0, ret2, i, pinned = 0;
3604 uint64_t exec_offset; 3667 uint64_t exec_offset;
3605 uint32_t seqno, flush_domains, reloc_index; 3668 uint32_t seqno, flush_domains, reloc_index;
3606 int pin_tries, flips; 3669 int pin_tries, flips;
@@ -3614,31 +3677,21 @@ i915_gem_execbuffer(struct drm_device *dev, void *data,
3614 DRM_ERROR("execbuf with %d buffers\n", args->buffer_count); 3677 DRM_ERROR("execbuf with %d buffers\n", args->buffer_count);
3615 return -EINVAL; 3678 return -EINVAL;
3616 } 3679 }
3617 /* Copy in the exec list from userland */
3618 exec_list = drm_malloc_ab(sizeof(*exec_list), args->buffer_count);
3619 object_list = drm_malloc_ab(sizeof(*object_list), args->buffer_count); 3680 object_list = drm_malloc_ab(sizeof(*object_list), args->buffer_count);
3620 if (exec_list == NULL || object_list == NULL) { 3681 if (object_list == NULL) {
3621 DRM_ERROR("Failed to allocate exec or object list " 3682 DRM_ERROR("Failed to allocate object list for %d buffers\n",
3622 "for %d buffers\n",
3623 args->buffer_count); 3683 args->buffer_count);
3624 ret = -ENOMEM; 3684 ret = -ENOMEM;
3625 goto pre_mutex_err; 3685 goto pre_mutex_err;
3626 } 3686 }
3627 ret = copy_from_user(exec_list,
3628 (struct drm_i915_relocation_entry __user *)
3629 (uintptr_t) args->buffers_ptr,
3630 sizeof(*exec_list) * args->buffer_count);
3631 if (ret != 0) {
3632 DRM_ERROR("copy %d exec entries failed %d\n",
3633 args->buffer_count, ret);
3634 goto pre_mutex_err;
3635 }
3636 3687
3637 if (args->num_cliprects != 0) { 3688 if (args->num_cliprects != 0) {
3638 cliprects = kcalloc(args->num_cliprects, sizeof(*cliprects), 3689 cliprects = kcalloc(args->num_cliprects, sizeof(*cliprects),
3639 GFP_KERNEL); 3690 GFP_KERNEL);
3640 if (cliprects == NULL) 3691 if (cliprects == NULL) {
3692 ret = -ENOMEM;
3641 goto pre_mutex_err; 3693 goto pre_mutex_err;
3694 }
3642 3695
3643 ret = copy_from_user(cliprects, 3696 ret = copy_from_user(cliprects,
3644 (struct drm_clip_rect __user *) 3697 (struct drm_clip_rect __user *)
@@ -3680,6 +3733,8 @@ i915_gem_execbuffer(struct drm_device *dev, void *data,
3680 if (object_list[i] == NULL) { 3733 if (object_list[i] == NULL) {
3681 DRM_ERROR("Invalid object handle %d at index %d\n", 3734 DRM_ERROR("Invalid object handle %d at index %d\n",
3682 exec_list[i].handle, i); 3735 exec_list[i].handle, i);
3736 /* prevent error path from reading uninitialized data */
3737 args->buffer_count = i + 1;
3683 ret = -EBADF; 3738 ret = -EBADF;
3684 goto err; 3739 goto err;
3685 } 3740 }
@@ -3688,6 +3743,8 @@ i915_gem_execbuffer(struct drm_device *dev, void *data,
3688 if (obj_priv->in_execbuffer) { 3743 if (obj_priv->in_execbuffer) {
3689 DRM_ERROR("Object %p appears more than once in object list\n", 3744 DRM_ERROR("Object %p appears more than once in object list\n",
3690 object_list[i]); 3745 object_list[i]);
3746 /* prevent error path from reading uninitialized data */
3747 args->buffer_count = i + 1;
3691 ret = -EBADF; 3748 ret = -EBADF;
3692 goto err; 3749 goto err;
3693 } 3750 }
@@ -3801,16 +3858,23 @@ i915_gem_execbuffer(struct drm_device *dev, void *data,
3801 i915_gem_flush(dev, 3858 i915_gem_flush(dev,
3802 dev->invalidate_domains, 3859 dev->invalidate_domains,
3803 dev->flush_domains); 3860 dev->flush_domains);
3804 if (dev->flush_domains) 3861 if (dev->flush_domains & I915_GEM_GPU_DOMAINS)
3805 (void)i915_add_request(dev, file_priv, 3862 (void)i915_add_request(dev, file_priv,
3806 dev->flush_domains); 3863 dev->flush_domains);
3807 } 3864 }
3808 3865
3809 for (i = 0; i < args->buffer_count; i++) { 3866 for (i = 0; i < args->buffer_count; i++) {
3810 struct drm_gem_object *obj = object_list[i]; 3867 struct drm_gem_object *obj = object_list[i];
3868 struct drm_i915_gem_object *obj_priv = obj->driver_private;
3811 uint32_t old_write_domain = obj->write_domain; 3869 uint32_t old_write_domain = obj->write_domain;
3812 3870
3813 obj->write_domain = obj->pending_write_domain; 3871 obj->write_domain = obj->pending_write_domain;
3872 if (obj->write_domain)
3873 list_move_tail(&obj_priv->gpu_write_list,
3874 &dev_priv->mm.gpu_write_list);
3875 else
3876 list_del_init(&obj_priv->gpu_write_list);
3877
3814 trace_i915_gem_object_change_domain(obj, 3878 trace_i915_gem_object_change_domain(obj,
3815 obj->read_domains, 3879 obj->read_domains,
3816 old_write_domain); 3880 old_write_domain);
@@ -3884,8 +3948,101 @@ err:
3884 3948
3885 mutex_unlock(&dev->struct_mutex); 3949 mutex_unlock(&dev->struct_mutex);
3886 3950
3951pre_mutex_err:
3952 /* Copy the updated relocations out regardless of current error
3953 * state. Failure to update the relocs would mean that the next
3954 * time userland calls execbuf, it would do so with presumed offset
3955 * state that didn't match the actual object state.
3956 */
3957 ret2 = i915_gem_put_relocs_to_user(exec_list, args->buffer_count,
3958 relocs);
3959 if (ret2 != 0) {
3960 DRM_ERROR("Failed to copy relocations back out: %d\n", ret2);
3961
3962 if (ret == 0)
3963 ret = ret2;
3964 }
3965
3966 drm_free_large(object_list);
3967 kfree(cliprects);
3968
3969 return ret;
3970}
3971
3972/*
3973 * Legacy execbuffer just creates an exec2 list from the original exec object
3974 * list array and passes it to the real function.
3975 */
3976int
3977i915_gem_execbuffer(struct drm_device *dev, void *data,
3978 struct drm_file *file_priv)
3979{
3980 struct drm_i915_gem_execbuffer *args = data;
3981 struct drm_i915_gem_execbuffer2 exec2;
3982 struct drm_i915_gem_exec_object *exec_list = NULL;
3983 struct drm_i915_gem_exec_object2 *exec2_list = NULL;
3984 int ret, i;
3985
3986#if WATCH_EXEC
3987 DRM_INFO("buffers_ptr %d buffer_count %d len %08x\n",
3988 (int) args->buffers_ptr, args->buffer_count, args->batch_len);
3989#endif
3990
3991 if (args->buffer_count < 1) {
3992 DRM_ERROR("execbuf with %d buffers\n", args->buffer_count);
3993 return -EINVAL;
3994 }
3995
3996 /* Copy in the exec list from userland */
3997 exec_list = drm_malloc_ab(sizeof(*exec_list), args->buffer_count);
3998 exec2_list = drm_malloc_ab(sizeof(*exec2_list), args->buffer_count);
3999 if (exec_list == NULL || exec2_list == NULL) {
4000 DRM_ERROR("Failed to allocate exec list for %d buffers\n",
4001 args->buffer_count);
4002 drm_free_large(exec_list);
4003 drm_free_large(exec2_list);
4004 return -ENOMEM;
4005 }
4006 ret = copy_from_user(exec_list,
4007 (struct drm_i915_relocation_entry __user *)
4008 (uintptr_t) args->buffers_ptr,
4009 sizeof(*exec_list) * args->buffer_count);
4010 if (ret != 0) {
4011 DRM_ERROR("copy %d exec entries failed %d\n",
4012 args->buffer_count, ret);
4013 drm_free_large(exec_list);
4014 drm_free_large(exec2_list);
4015 return -EFAULT;
4016 }
4017
4018 for (i = 0; i < args->buffer_count; i++) {
4019 exec2_list[i].handle = exec_list[i].handle;
4020 exec2_list[i].relocation_count = exec_list[i].relocation_count;
4021 exec2_list[i].relocs_ptr = exec_list[i].relocs_ptr;
4022 exec2_list[i].alignment = exec_list[i].alignment;
4023 exec2_list[i].offset = exec_list[i].offset;
4024 if (!IS_I965G(dev))
4025 exec2_list[i].flags = EXEC_OBJECT_NEEDS_FENCE;
4026 else
4027 exec2_list[i].flags = 0;
4028 }
4029
4030 exec2.buffers_ptr = args->buffers_ptr;
4031 exec2.buffer_count = args->buffer_count;
4032 exec2.batch_start_offset = args->batch_start_offset;
4033 exec2.batch_len = args->batch_len;
4034 exec2.DR1 = args->DR1;
4035 exec2.DR4 = args->DR4;
4036 exec2.num_cliprects = args->num_cliprects;
4037 exec2.cliprects_ptr = args->cliprects_ptr;
4038 exec2.flags = 0;
4039
4040 ret = i915_gem_do_execbuffer(dev, data, file_priv, &exec2, exec2_list);
3887 if (!ret) { 4041 if (!ret) {
3888 /* Copy the new buffer offsets back to the user's exec list. */ 4042 /* Copy the new buffer offsets back to the user's exec list. */
4043 for (i = 0; i < args->buffer_count; i++)
4044 exec_list[i].offset = exec2_list[i].offset;
4045 /* ... and back out to userspace */
3889 ret = copy_to_user((struct drm_i915_relocation_entry __user *) 4046 ret = copy_to_user((struct drm_i915_relocation_entry __user *)
3890 (uintptr_t) args->buffers_ptr, 4047 (uintptr_t) args->buffers_ptr,
3891 exec_list, 4048 exec_list,
@@ -3898,25 +4055,62 @@ err:
3898 } 4055 }
3899 } 4056 }
3900 4057
3901 /* Copy the updated relocations out regardless of current error 4058 drm_free_large(exec_list);
3902 * state. Failure to update the relocs would mean that the next 4059 drm_free_large(exec2_list);
3903 * time userland calls execbuf, it would do so with presumed offset 4060 return ret;
3904 * state that didn't match the actual object state. 4061}
3905 */
3906 ret2 = i915_gem_put_relocs_to_user(exec_list, args->buffer_count,
3907 relocs);
3908 if (ret2 != 0) {
3909 DRM_ERROR("Failed to copy relocations back out: %d\n", ret2);
3910 4062
3911 if (ret == 0) 4063int
3912 ret = ret2; 4064i915_gem_execbuffer2(struct drm_device *dev, void *data,
4065 struct drm_file *file_priv)
4066{
4067 struct drm_i915_gem_execbuffer2 *args = data;
4068 struct drm_i915_gem_exec_object2 *exec2_list = NULL;
4069 int ret;
4070
4071#if WATCH_EXEC
4072 DRM_INFO("buffers_ptr %d buffer_count %d len %08x\n",
4073 (int) args->buffers_ptr, args->buffer_count, args->batch_len);
4074#endif
4075
4076 if (args->buffer_count < 1) {
4077 DRM_ERROR("execbuf2 with %d buffers\n", args->buffer_count);
4078 return -EINVAL;
3913 } 4079 }
3914 4080
3915pre_mutex_err: 4081 exec2_list = drm_malloc_ab(sizeof(*exec2_list), args->buffer_count);
3916 drm_free_large(object_list); 4082 if (exec2_list == NULL) {
3917 drm_free_large(exec_list); 4083 DRM_ERROR("Failed to allocate exec list for %d buffers\n",
3918 kfree(cliprects); 4084 args->buffer_count);
4085 return -ENOMEM;
4086 }
4087 ret = copy_from_user(exec2_list,
4088 (struct drm_i915_relocation_entry __user *)
4089 (uintptr_t) args->buffers_ptr,
4090 sizeof(*exec2_list) * args->buffer_count);
4091 if (ret != 0) {
4092 DRM_ERROR("copy %d exec entries failed %d\n",
4093 args->buffer_count, ret);
4094 drm_free_large(exec2_list);
4095 return -EFAULT;
4096 }
4097
4098 ret = i915_gem_do_execbuffer(dev, data, file_priv, args, exec2_list);
4099 if (!ret) {
4100 /* Copy the new buffer offsets back to the user's exec list. */
4101 ret = copy_to_user((struct drm_i915_relocation_entry __user *)
4102 (uintptr_t) args->buffers_ptr,
4103 exec2_list,
4104 sizeof(*exec2_list) * args->buffer_count);
4105 if (ret) {
4106 ret = -EFAULT;
4107 DRM_ERROR("failed to copy %d exec entries "
4108 "back to user (%d)\n",
4109 args->buffer_count, ret);
4110 }
4111 }
3919 4112
4113 drm_free_large(exec2_list);
3920 return ret; 4114 return ret;
3921} 4115}
3922 4116
@@ -3933,19 +4127,7 @@ i915_gem_object_pin(struct drm_gem_object *obj, uint32_t alignment)
3933 if (ret) 4127 if (ret)
3934 return ret; 4128 return ret;
3935 } 4129 }
3936 /* 4130
3937 * Pre-965 chips need a fence register set up in order to
3938 * properly handle tiled surfaces.
3939 */
3940 if (!IS_I965G(dev) && obj_priv->tiling_mode != I915_TILING_NONE) {
3941 ret = i915_gem_object_get_fence_reg(obj);
3942 if (ret != 0) {
3943 if (ret != -EBUSY && ret != -ERESTARTSYS)
3944 DRM_ERROR("Failure to install fence: %d\n",
3945 ret);
3946 return ret;
3947 }
3948 }
3949 obj_priv->pin_count++; 4131 obj_priv->pin_count++;
3950 4132
3951 /* If the object is not active and not pending a flush, 4133 /* If the object is not active and not pending a flush,
@@ -4203,6 +4385,7 @@ int i915_gem_init_object(struct drm_gem_object *obj)
4203 obj_priv->obj = obj; 4385 obj_priv->obj = obj;
4204 obj_priv->fence_reg = I915_FENCE_REG_NONE; 4386 obj_priv->fence_reg = I915_FENCE_REG_NONE;
4205 INIT_LIST_HEAD(&obj_priv->list); 4387 INIT_LIST_HEAD(&obj_priv->list);
4388 INIT_LIST_HEAD(&obj_priv->gpu_write_list);
4206 INIT_LIST_HEAD(&obj_priv->fence_list); 4389 INIT_LIST_HEAD(&obj_priv->fence_list);
4207 obj_priv->madv = I915_MADV_WILLNEED; 4390 obj_priv->madv = I915_MADV_WILLNEED;
4208 4391
@@ -4654,6 +4837,7 @@ i915_gem_load(struct drm_device *dev)
4654 spin_lock_init(&dev_priv->mm.active_list_lock); 4837 spin_lock_init(&dev_priv->mm.active_list_lock);
4655 INIT_LIST_HEAD(&dev_priv->mm.active_list); 4838 INIT_LIST_HEAD(&dev_priv->mm.active_list);
4656 INIT_LIST_HEAD(&dev_priv->mm.flushing_list); 4839 INIT_LIST_HEAD(&dev_priv->mm.flushing_list);
4840 INIT_LIST_HEAD(&dev_priv->mm.gpu_write_list);
4657 INIT_LIST_HEAD(&dev_priv->mm.inactive_list); 4841 INIT_LIST_HEAD(&dev_priv->mm.inactive_list);
4658 INIT_LIST_HEAD(&dev_priv->mm.request_list); 4842 INIT_LIST_HEAD(&dev_priv->mm.request_list);
4659 INIT_LIST_HEAD(&dev_priv->mm.fence_list); 4843 INIT_LIST_HEAD(&dev_priv->mm.fence_list);
@@ -4708,7 +4892,7 @@ int i915_gem_init_phys_object(struct drm_device *dev,
4708 4892
4709 phys_obj->id = id; 4893 phys_obj->id = id;
4710 4894
4711 phys_obj->handle = drm_pci_alloc(dev, size, 0, 0xffffffff); 4895 phys_obj->handle = drm_pci_alloc(dev, size, 0);
4712 if (!phys_obj->handle) { 4896 if (!phys_obj->handle) {
4713 ret = -ENOMEM; 4897 ret = -ENOMEM;
4714 goto kfree_obj; 4898 goto kfree_obj;
@@ -4766,7 +4950,7 @@ void i915_gem_detach_phys_object(struct drm_device *dev,
4766 if (!obj_priv->phys_obj) 4950 if (!obj_priv->phys_obj)
4767 return; 4951 return;
4768 4952
4769 ret = i915_gem_object_get_pages(obj); 4953 ret = i915_gem_object_get_pages(obj, 0);
4770 if (ret) 4954 if (ret)
4771 goto out; 4955 goto out;
4772 4956
@@ -4824,7 +5008,7 @@ i915_gem_attach_phys_object(struct drm_device *dev,
4824 obj_priv->phys_obj = dev_priv->mm.phys_objs[id - 1]; 5008 obj_priv->phys_obj = dev_priv->mm.phys_objs[id - 1];
4825 obj_priv->phys_obj->cur_obj = obj; 5009 obj_priv->phys_obj->cur_obj = obj;
4826 5010
4827 ret = i915_gem_object_get_pages(obj); 5011 ret = i915_gem_object_get_pages(obj, 0);
4828 if (ret) { 5012 if (ret) {
4829 DRM_ERROR("failed to get page list\n"); 5013 DRM_ERROR("failed to get page list\n");
4830 goto out; 5014 goto out;
diff --git a/drivers/gpu/drm/i915/i915_gem_tiling.c b/drivers/gpu/drm/i915/i915_gem_tiling.c
index 30d6af6c09bb..df278b2685bf 100644
--- a/drivers/gpu/drm/i915/i915_gem_tiling.c
+++ b/drivers/gpu/drm/i915/i915_gem_tiling.c
@@ -304,35 +304,39 @@ i915_gem_detect_bit_6_swizzle(struct drm_device *dev)
304 304
305 305
306/** 306/**
307 * Returns the size of the fence for a tiled object of the given size. 307 * Returns whether an object is currently fenceable. If not, it may need
308 * to be unbound and have its pitch adjusted.
308 */ 309 */
309static int 310bool
310i915_get_fence_size(struct drm_device *dev, int size) 311i915_obj_fenceable(struct drm_device *dev, struct drm_gem_object *obj)
311{ 312{
312 int i; 313 struct drm_i915_gem_object *obj_priv = obj->driver_private;
313 int start;
314 314
315 if (IS_I965G(dev)) { 315 if (IS_I965G(dev)) {
316 /* The 965 can have fences at any page boundary. */ 316 /* The 965 can have fences at any page boundary. */
317 return ALIGN(size, 4096); 317 if (obj->size & 4095)
318 return false;
319 return true;
320 } else if (IS_I9XX(dev)) {
321 if (obj_priv->gtt_offset & ~I915_FENCE_START_MASK)
322 return false;
318 } else { 323 } else {
319 /* Align the size to a power of two greater than the smallest 324 if (obj_priv->gtt_offset & ~I830_FENCE_START_MASK)
320 * fence size. 325 return false;
321 */ 326 }
322 if (IS_I9XX(dev))
323 start = 1024 * 1024;
324 else
325 start = 512 * 1024;
326 327
327 for (i = start; i < size; i <<= 1) 328 /* Power of two sized... */
328 ; 329 if (obj->size & (obj->size - 1))
330 return false;
329 331
330 return i; 332 /* Objects must be size aligned as well */
331 } 333 if (obj_priv->gtt_offset & (obj->size - 1))
334 return false;
335 return true;
332} 336}
333 337
334/* Check pitch constriants for all chips & tiling formats */ 338/* Check pitch constriants for all chips & tiling formats */
335static bool 339bool
336i915_tiling_ok(struct drm_device *dev, int stride, int size, int tiling_mode) 340i915_tiling_ok(struct drm_device *dev, int stride, int size, int tiling_mode)
337{ 341{
338 int tile_width; 342 int tile_width;
@@ -384,12 +388,6 @@ i915_tiling_ok(struct drm_device *dev, int stride, int size, int tiling_mode)
384 if (stride & (stride - 1)) 388 if (stride & (stride - 1))
385 return false; 389 return false;
386 390
387 /* We don't 0handle the aperture area covered by the fence being bigger
388 * than the object size.
389 */
390 if (i915_get_fence_size(dev, size) != size)
391 return false;
392
393 return true; 391 return true;
394} 392}
395 393
diff --git a/drivers/gpu/drm/i915/i915_ioc32.c b/drivers/gpu/drm/i915/i915_ioc32.c
index 1fe68a251b75..13b028994b2b 100644
--- a/drivers/gpu/drm/i915/i915_ioc32.c
+++ b/drivers/gpu/drm/i915/i915_ioc32.c
@@ -66,8 +66,7 @@ static int compat_i915_batchbuffer(struct file *file, unsigned int cmd,
66 &batchbuffer->cliprects)) 66 &batchbuffer->cliprects))
67 return -EFAULT; 67 return -EFAULT;
68 68
69 return drm_ioctl(file->f_path.dentry->d_inode, file, 69 return drm_ioctl(file, DRM_IOCTL_I915_BATCHBUFFER,
70 DRM_IOCTL_I915_BATCHBUFFER,
71 (unsigned long)batchbuffer); 70 (unsigned long)batchbuffer);
72} 71}
73 72
@@ -102,8 +101,8 @@ static int compat_i915_cmdbuffer(struct file *file, unsigned int cmd,
102 &cmdbuffer->cliprects)) 101 &cmdbuffer->cliprects))
103 return -EFAULT; 102 return -EFAULT;
104 103
105 return drm_ioctl(file->f_path.dentry->d_inode, file, 104 return drm_ioctl(file, DRM_IOCTL_I915_CMDBUFFER,
106 DRM_IOCTL_I915_CMDBUFFER, (unsigned long)cmdbuffer); 105 (unsigned long)cmdbuffer);
107} 106}
108 107
109typedef struct drm_i915_irq_emit32 { 108typedef struct drm_i915_irq_emit32 {
@@ -125,8 +124,8 @@ static int compat_i915_irq_emit(struct file *file, unsigned int cmd,
125 &request->irq_seq)) 124 &request->irq_seq))
126 return -EFAULT; 125 return -EFAULT;
127 126
128 return drm_ioctl(file->f_path.dentry->d_inode, file, 127 return drm_ioctl(file, DRM_IOCTL_I915_IRQ_EMIT,
129 DRM_IOCTL_I915_IRQ_EMIT, (unsigned long)request); 128 (unsigned long)request);
130} 129}
131typedef struct drm_i915_getparam32 { 130typedef struct drm_i915_getparam32 {
132 int param; 131 int param;
@@ -149,8 +148,8 @@ static int compat_i915_getparam(struct file *file, unsigned int cmd,
149 &request->value)) 148 &request->value))
150 return -EFAULT; 149 return -EFAULT;
151 150
152 return drm_ioctl(file->f_path.dentry->d_inode, file, 151 return drm_ioctl(file, DRM_IOCTL_I915_GETPARAM,
153 DRM_IOCTL_I915_GETPARAM, (unsigned long)request); 152 (unsigned long)request);
154} 153}
155 154
156typedef struct drm_i915_mem_alloc32 { 155typedef struct drm_i915_mem_alloc32 {
@@ -178,8 +177,8 @@ static int compat_i915_alloc(struct file *file, unsigned int cmd,
178 &request->region_offset)) 177 &request->region_offset))
179 return -EFAULT; 178 return -EFAULT;
180 179
181 return drm_ioctl(file->f_path.dentry->d_inode, file, 180 return drm_ioctl(file, DRM_IOCTL_I915_ALLOC,
182 DRM_IOCTL_I915_ALLOC, (unsigned long)request); 181 (unsigned long)request);
183} 182}
184 183
185drm_ioctl_compat_t *i915_compat_ioctls[] = { 184drm_ioctl_compat_t *i915_compat_ioctls[] = {
@@ -211,12 +210,10 @@ long i915_compat_ioctl(struct file *filp, unsigned int cmd, unsigned long arg)
211 if (nr < DRM_COMMAND_BASE + DRM_ARRAY_SIZE(i915_compat_ioctls)) 210 if (nr < DRM_COMMAND_BASE + DRM_ARRAY_SIZE(i915_compat_ioctls))
212 fn = i915_compat_ioctls[nr - DRM_COMMAND_BASE]; 211 fn = i915_compat_ioctls[nr - DRM_COMMAND_BASE];
213 212
214 lock_kernel(); /* XXX for now */
215 if (fn != NULL) 213 if (fn != NULL)
216 ret = (*fn) (filp, cmd, arg); 214 ret = (*fn) (filp, cmd, arg);
217 else 215 else
218 ret = drm_ioctl(filp->f_path.dentry->d_inode, filp, cmd, arg); 216 ret = drm_ioctl(filp, cmd, arg);
219 unlock_kernel();
220 217
221 return ret; 218 return ret;
222} 219}
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 85f4c5de97e2..a17d6bdfe63e 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -274,7 +274,6 @@ irqreturn_t ironlake_irq_handler(struct drm_device *dev)
274 drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; 274 drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
275 int ret = IRQ_NONE; 275 int ret = IRQ_NONE;
276 u32 de_iir, gt_iir, de_ier, pch_iir; 276 u32 de_iir, gt_iir, de_ier, pch_iir;
277 u32 new_de_iir, new_gt_iir, new_pch_iir;
278 struct drm_i915_master_private *master_priv; 277 struct drm_i915_master_private *master_priv;
279 278
280 /* disable master interrupt before clearing iir */ 279 /* disable master interrupt before clearing iir */
@@ -286,49 +285,58 @@ irqreturn_t ironlake_irq_handler(struct drm_device *dev)
286 gt_iir = I915_READ(GTIIR); 285 gt_iir = I915_READ(GTIIR);
287 pch_iir = I915_READ(SDEIIR); 286 pch_iir = I915_READ(SDEIIR);
288 287
289 for (;;) { 288 if (de_iir == 0 && gt_iir == 0 && pch_iir == 0)
290 if (de_iir == 0 && gt_iir == 0 && pch_iir == 0) 289 goto done;
291 break;
292 290
293 ret = IRQ_HANDLED; 291 ret = IRQ_HANDLED;
294 292
295 /* should clear PCH hotplug event before clear CPU irq */ 293 if (dev->primary->master) {
296 I915_WRITE(SDEIIR, pch_iir); 294 master_priv = dev->primary->master->driver_priv;
297 new_pch_iir = I915_READ(SDEIIR); 295 if (master_priv->sarea_priv)
296 master_priv->sarea_priv->last_dispatch =
297 READ_BREADCRUMB(dev_priv);
298 }
298 299
299 I915_WRITE(DEIIR, de_iir); 300 if (gt_iir & GT_USER_INTERRUPT) {
300 new_de_iir = I915_READ(DEIIR); 301 u32 seqno = i915_get_gem_seqno(dev);
301 I915_WRITE(GTIIR, gt_iir); 302 dev_priv->mm.irq_gem_seqno = seqno;
302 new_gt_iir = I915_READ(GTIIR); 303 trace_i915_gem_request_complete(dev, seqno);
304 DRM_WAKEUP(&dev_priv->irq_queue);
305 dev_priv->hangcheck_count = 0;
306 mod_timer(&dev_priv->hangcheck_timer, jiffies + DRM_I915_HANGCHECK_PERIOD);
307 }
303 308
304 if (dev->primary->master) { 309 if (de_iir & DE_GSE)
305 master_priv = dev->primary->master->driver_priv; 310 ironlake_opregion_gse_intr(dev);
306 if (master_priv->sarea_priv)
307 master_priv->sarea_priv->last_dispatch =
308 READ_BREADCRUMB(dev_priv);
309 }
310 311
311 if (gt_iir & GT_USER_INTERRUPT) { 312 if (de_iir & DE_PLANEA_FLIP_DONE) {
312 u32 seqno = i915_get_gem_seqno(dev); 313 intel_prepare_page_flip(dev, 0);
313 dev_priv->mm.irq_gem_seqno = seqno; 314 intel_finish_page_flip(dev, 0);
314 trace_i915_gem_request_complete(dev, seqno); 315 }
315 DRM_WAKEUP(&dev_priv->irq_queue);
316 }
317 316
318 if (de_iir & DE_GSE) 317 if (de_iir & DE_PLANEB_FLIP_DONE) {
319 ironlake_opregion_gse_intr(dev); 318 intel_prepare_page_flip(dev, 1);
319 intel_finish_page_flip(dev, 1);
320 }
320 321
321 /* check event from PCH */ 322 if (de_iir & DE_PIPEA_VBLANK)
322 if ((de_iir & DE_PCH_EVENT) && 323 drm_handle_vblank(dev, 0);
323 (pch_iir & SDE_HOTPLUG_MASK)) {
324 queue_work(dev_priv->wq, &dev_priv->hotplug_work);
325 }
326 324
327 de_iir = new_de_iir; 325 if (de_iir & DE_PIPEB_VBLANK)
328 gt_iir = new_gt_iir; 326 drm_handle_vblank(dev, 1);
329 pch_iir = new_pch_iir; 327
328 /* check event from PCH */
329 if ((de_iir & DE_PCH_EVENT) &&
330 (pch_iir & SDE_HOTPLUG_MASK)) {
331 queue_work(dev_priv->wq, &dev_priv->hotplug_work);
330 } 332 }
331 333
334 /* should clear PCH hotplug event before clear CPU irq */
335 I915_WRITE(SDEIIR, pch_iir);
336 I915_WRITE(GTIIR, gt_iir);
337 I915_WRITE(DEIIR, de_iir);
338
339done:
332 I915_WRITE(DEIER, de_ier); 340 I915_WRITE(DEIER, de_ier);
333 (void)I915_READ(DEIER); 341 (void)I915_READ(DEIER);
334 342
@@ -852,11 +860,11 @@ int i915_enable_vblank(struct drm_device *dev, int pipe)
852 if (!(pipeconf & PIPEACONF_ENABLE)) 860 if (!(pipeconf & PIPEACONF_ENABLE))
853 return -EINVAL; 861 return -EINVAL;
854 862
855 if (IS_IRONLAKE(dev))
856 return 0;
857
858 spin_lock_irqsave(&dev_priv->user_irq_lock, irqflags); 863 spin_lock_irqsave(&dev_priv->user_irq_lock, irqflags);
859 if (IS_I965G(dev)) 864 if (IS_IRONLAKE(dev))
865 ironlake_enable_display_irq(dev_priv, (pipe == 0) ?
866 DE_PIPEA_VBLANK: DE_PIPEB_VBLANK);
867 else if (IS_I965G(dev))
860 i915_enable_pipestat(dev_priv, pipe, 868 i915_enable_pipestat(dev_priv, pipe,
861 PIPE_START_VBLANK_INTERRUPT_ENABLE); 869 PIPE_START_VBLANK_INTERRUPT_ENABLE);
862 else 870 else
@@ -874,13 +882,14 @@ void i915_disable_vblank(struct drm_device *dev, int pipe)
874 drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; 882 drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
875 unsigned long irqflags; 883 unsigned long irqflags;
876 884
877 if (IS_IRONLAKE(dev))
878 return;
879
880 spin_lock_irqsave(&dev_priv->user_irq_lock, irqflags); 885 spin_lock_irqsave(&dev_priv->user_irq_lock, irqflags);
881 i915_disable_pipestat(dev_priv, pipe, 886 if (IS_IRONLAKE(dev))
882 PIPE_VBLANK_INTERRUPT_ENABLE | 887 ironlake_disable_display_irq(dev_priv, (pipe == 0) ?
883 PIPE_START_VBLANK_INTERRUPT_ENABLE); 888 DE_PIPEA_VBLANK: DE_PIPEB_VBLANK);
889 else
890 i915_disable_pipestat(dev_priv, pipe,
891 PIPE_VBLANK_INTERRUPT_ENABLE |
892 PIPE_START_VBLANK_INTERRUPT_ENABLE);
884 spin_unlock_irqrestore(&dev_priv->user_irq_lock, irqflags); 893 spin_unlock_irqrestore(&dev_priv->user_irq_lock, irqflags);
885} 894}
886 895
@@ -1023,13 +1032,14 @@ static int ironlake_irq_postinstall(struct drm_device *dev)
1023{ 1032{
1024 drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; 1033 drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
1025 /* enable kind of interrupts always enabled */ 1034 /* enable kind of interrupts always enabled */
1026 u32 display_mask = DE_MASTER_IRQ_CONTROL | DE_GSE | DE_PCH_EVENT; 1035 u32 display_mask = DE_MASTER_IRQ_CONTROL | DE_GSE | DE_PCH_EVENT |
1036 DE_PLANEA_FLIP_DONE | DE_PLANEB_FLIP_DONE;
1027 u32 render_mask = GT_USER_INTERRUPT; 1037 u32 render_mask = GT_USER_INTERRUPT;
1028 u32 hotplug_mask = SDE_CRT_HOTPLUG | SDE_PORTB_HOTPLUG | 1038 u32 hotplug_mask = SDE_CRT_HOTPLUG | SDE_PORTB_HOTPLUG |
1029 SDE_PORTC_HOTPLUG | SDE_PORTD_HOTPLUG; 1039 SDE_PORTC_HOTPLUG | SDE_PORTD_HOTPLUG;
1030 1040
1031 dev_priv->irq_mask_reg = ~display_mask; 1041 dev_priv->irq_mask_reg = ~display_mask;
1032 dev_priv->de_irq_enable_reg = display_mask; 1042 dev_priv->de_irq_enable_reg = display_mask | DE_PIPEA_VBLANK | DE_PIPEB_VBLANK;
1033 1043
1034 /* should always can generate irq */ 1044 /* should always can generate irq */
1035 I915_WRITE(DEIIR, I915_READ(DEIIR)); 1045 I915_WRITE(DEIIR, I915_READ(DEIIR));
@@ -1084,6 +1094,10 @@ void i915_driver_irq_preinstall(struct drm_device * dev)
1084 (void) I915_READ(IER); 1094 (void) I915_READ(IER);
1085} 1095}
1086 1096
1097/*
1098 * Must be called after intel_modeset_init or hotplug interrupts won't be
1099 * enabled correctly.
1100 */
1087int i915_driver_irq_postinstall(struct drm_device *dev) 1101int i915_driver_irq_postinstall(struct drm_device *dev)
1088{ 1102{
1089 drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; 1103 drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
@@ -1106,19 +1120,23 @@ int i915_driver_irq_postinstall(struct drm_device *dev)
1106 if (I915_HAS_HOTPLUG(dev)) { 1120 if (I915_HAS_HOTPLUG(dev)) {
1107 u32 hotplug_en = I915_READ(PORT_HOTPLUG_EN); 1121 u32 hotplug_en = I915_READ(PORT_HOTPLUG_EN);
1108 1122
1109 /* Leave other bits alone */ 1123 /* Note HDMI and DP share bits */
1110 hotplug_en |= HOTPLUG_EN_MASK; 1124 if (dev_priv->hotplug_supported_mask & HDMIB_HOTPLUG_INT_STATUS)
1125 hotplug_en |= HDMIB_HOTPLUG_INT_EN;
1126 if (dev_priv->hotplug_supported_mask & HDMIC_HOTPLUG_INT_STATUS)
1127 hotplug_en |= HDMIC_HOTPLUG_INT_EN;
1128 if (dev_priv->hotplug_supported_mask & HDMID_HOTPLUG_INT_STATUS)
1129 hotplug_en |= HDMID_HOTPLUG_INT_EN;
1130 if (dev_priv->hotplug_supported_mask & SDVOC_HOTPLUG_INT_STATUS)
1131 hotplug_en |= SDVOC_HOTPLUG_INT_EN;
1132 if (dev_priv->hotplug_supported_mask & SDVOB_HOTPLUG_INT_STATUS)
1133 hotplug_en |= SDVOB_HOTPLUG_INT_EN;
1134 if (dev_priv->hotplug_supported_mask & CRT_HOTPLUG_INT_STATUS)
1135 hotplug_en |= CRT_HOTPLUG_INT_EN;
1136 /* Ignore TV since it's buggy */
1137
1111 I915_WRITE(PORT_HOTPLUG_EN, hotplug_en); 1138 I915_WRITE(PORT_HOTPLUG_EN, hotplug_en);
1112 1139
1113 dev_priv->hotplug_supported_mask = CRT_HOTPLUG_INT_STATUS |
1114 TV_HOTPLUG_INT_STATUS | SDVOC_HOTPLUG_INT_STATUS |
1115 SDVOB_HOTPLUG_INT_STATUS;
1116 if (IS_G4X(dev)) {
1117 dev_priv->hotplug_supported_mask |=
1118 HDMIB_HOTPLUG_INT_STATUS |
1119 HDMIC_HOTPLUG_INT_STATUS |
1120 HDMID_HOTPLUG_INT_STATUS;
1121 }
1122 /* Enable in IER... */ 1140 /* Enable in IER... */
1123 enable_mask |= I915_DISPLAY_PORT_INTERRUPT; 1141 enable_mask |= I915_DISPLAY_PORT_INTERRUPT;
1124 /* and unmask in IMR */ 1142 /* and unmask in IMR */
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 974b3cf70618..ab1bd2d3d3b6 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -338,6 +338,7 @@
338#define FBC_CTL_PERIODIC (1<<30) 338#define FBC_CTL_PERIODIC (1<<30)
339#define FBC_CTL_INTERVAL_SHIFT (16) 339#define FBC_CTL_INTERVAL_SHIFT (16)
340#define FBC_CTL_UNCOMPRESSIBLE (1<<14) 340#define FBC_CTL_UNCOMPRESSIBLE (1<<14)
341#define FBC_C3_IDLE (1<<13)
341#define FBC_CTL_STRIDE_SHIFT (5) 342#define FBC_CTL_STRIDE_SHIFT (5)
342#define FBC_CTL_FENCENO (1<<0) 343#define FBC_CTL_FENCENO (1<<0)
343#define FBC_COMMAND 0x0320c 344#define FBC_COMMAND 0x0320c
@@ -879,13 +880,6 @@
879#define CRT_HOTPLUG_DETECT_VOLTAGE_475MV (1 << 2) 880#define CRT_HOTPLUG_DETECT_VOLTAGE_475MV (1 << 2)
880#define CRT_HOTPLUG_MASK (0x3fc) /* Bits 9-2 */ 881#define CRT_HOTPLUG_MASK (0x3fc) /* Bits 9-2 */
881#define CRT_FORCE_HOTPLUG_MASK 0xfffffe1f 882#define CRT_FORCE_HOTPLUG_MASK 0xfffffe1f
882#define HOTPLUG_EN_MASK (HDMIB_HOTPLUG_INT_EN | \
883 HDMIC_HOTPLUG_INT_EN | \
884 HDMID_HOTPLUG_INT_EN | \
885 SDVOB_HOTPLUG_INT_EN | \
886 SDVOC_HOTPLUG_INT_EN | \
887 CRT_HOTPLUG_INT_EN)
888
889 883
890#define PORT_HOTPLUG_STAT 0x61114 884#define PORT_HOTPLUG_STAT 0x61114
891#define HDMIB_HOTPLUG_INT_STATUS (1 << 29) 885#define HDMIB_HOTPLUG_INT_STATUS (1 << 29)
@@ -982,6 +976,8 @@
982#define LVDS_PORT_EN (1 << 31) 976#define LVDS_PORT_EN (1 << 31)
983/* Selects pipe B for LVDS data. Must be set on pre-965. */ 977/* Selects pipe B for LVDS data. Must be set on pre-965. */
984#define LVDS_PIPEB_SELECT (1 << 30) 978#define LVDS_PIPEB_SELECT (1 << 30)
979/* LVDS dithering flag on 965/g4x platform */
980#define LVDS_ENABLE_DITHER (1 << 25)
985/* Enable border for unscaled (or aspect-scaled) display */ 981/* Enable border for unscaled (or aspect-scaled) display */
986#define LVDS_BORDER_ENABLE (1 << 15) 982#define LVDS_BORDER_ENABLE (1 << 15)
987/* 983/*
@@ -1751,6 +1747,8 @@
1751 1747
1752/* Display & cursor control */ 1748/* Display & cursor control */
1753 1749
1750/* dithering flag on Ironlake */
1751#define PIPE_ENABLE_DITHER (1 << 4)
1754/* Pipe A */ 1752/* Pipe A */
1755#define PIPEADSL 0x70000 1753#define PIPEADSL 0x70000
1756#define PIPEACONF 0x70008 1754#define PIPEACONF 0x70008
@@ -1818,7 +1816,7 @@
1818#define DSPFW_PLANEB_SHIFT 8 1816#define DSPFW_PLANEB_SHIFT 8
1819#define DSPFW2 0x70038 1817#define DSPFW2 0x70038
1820#define DSPFW_CURSORA_MASK 0x00003f00 1818#define DSPFW_CURSORA_MASK 0x00003f00
1821#define DSPFW_CURSORA_SHIFT 16 1819#define DSPFW_CURSORA_SHIFT 8
1822#define DSPFW3 0x7003c 1820#define DSPFW3 0x7003c
1823#define DSPFW_HPLL_SR_EN (1<<31) 1821#define DSPFW_HPLL_SR_EN (1<<31)
1824#define DSPFW_CURSOR_SR_SHIFT 24 1822#define DSPFW_CURSOR_SR_SHIFT 24
diff --git a/drivers/gpu/drm/i915/i915_suspend.c b/drivers/gpu/drm/i915/i915_suspend.c
index d5ebb00a9d49..a3b90c9561dc 100644
--- a/drivers/gpu/drm/i915/i915_suspend.c
+++ b/drivers/gpu/drm/i915/i915_suspend.c
@@ -732,12 +732,6 @@ int i915_save_state(struct drm_device *dev)
732 732
733 pci_read_config_byte(dev->pdev, LBB, &dev_priv->saveLBB); 733 pci_read_config_byte(dev->pdev, LBB, &dev_priv->saveLBB);
734 734
735 /* Render Standby */
736 if (I915_HAS_RC6(dev)) {
737 dev_priv->saveRENDERSTANDBY = I915_READ(MCHBAR_RENDER_STANDBY);
738 dev_priv->savePWRCTXA = I915_READ(PWRCTXA);
739 }
740
741 /* Hardware status page */ 735 /* Hardware status page */
742 dev_priv->saveHWS = I915_READ(HWS_PGA); 736 dev_priv->saveHWS = I915_READ(HWS_PGA);
743 737
@@ -793,12 +787,6 @@ int i915_restore_state(struct drm_device *dev)
793 787
794 pci_write_config_byte(dev->pdev, LBB, dev_priv->saveLBB); 788 pci_write_config_byte(dev->pdev, LBB, dev_priv->saveLBB);
795 789
796 /* Render Standby */
797 if (I915_HAS_RC6(dev)) {
798 I915_WRITE(MCHBAR_RENDER_STANDBY, dev_priv->saveRENDERSTANDBY);
799 I915_WRITE(PWRCTXA, dev_priv->savePWRCTXA);
800 }
801
802 /* Hardware status page */ 790 /* Hardware status page */
803 I915_WRITE(HWS_PGA, dev_priv->saveHWS); 791 I915_WRITE(HWS_PGA, dev_priv->saveHWS);
804 792
diff --git a/drivers/gpu/drm/i915/intel_bios.c b/drivers/gpu/drm/i915/intel_bios.c
index f27567747580..15fbc1b5a83e 100644
--- a/drivers/gpu/drm/i915/intel_bios.c
+++ b/drivers/gpu/drm/i915/intel_bios.c
@@ -33,6 +33,8 @@
33#define SLAVE_ADDR1 0x70 33#define SLAVE_ADDR1 0x70
34#define SLAVE_ADDR2 0x72 34#define SLAVE_ADDR2 0x72
35 35
36static int panel_type;
37
36static void * 38static void *
37find_section(struct bdb_header *bdb, int section_id) 39find_section(struct bdb_header *bdb, int section_id)
38{ 40{
@@ -128,6 +130,7 @@ parse_lfp_panel_data(struct drm_i915_private *dev_priv,
128 dev_priv->lvds_dither = lvds_options->pixel_dither; 130 dev_priv->lvds_dither = lvds_options->pixel_dither;
129 if (lvds_options->panel_type == 0xff) 131 if (lvds_options->panel_type == 0xff)
130 return; 132 return;
133 panel_type = lvds_options->panel_type;
131 134
132 lvds_lfp_data = find_section(bdb, BDB_LVDS_LFP_DATA); 135 lvds_lfp_data = find_section(bdb, BDB_LVDS_LFP_DATA);
133 if (!lvds_lfp_data) 136 if (!lvds_lfp_data)
@@ -197,7 +200,8 @@ parse_lfp_panel_data(struct drm_i915_private *dev_priv,
197 memset(temp_mode, 0, sizeof(*temp_mode)); 200 memset(temp_mode, 0, sizeof(*temp_mode));
198 } 201 }
199 kfree(temp_mode); 202 kfree(temp_mode);
200 if (temp_downclock < panel_fixed_mode->clock) { 203 if (temp_downclock < panel_fixed_mode->clock &&
204 i915_lvds_downclock) {
201 dev_priv->lvds_downclock_avail = 1; 205 dev_priv->lvds_downclock_avail = 1;
202 dev_priv->lvds_downclock = temp_downclock; 206 dev_priv->lvds_downclock = temp_downclock;
203 DRM_DEBUG_KMS("LVDS downclock is found in VBT. ", 207 DRM_DEBUG_KMS("LVDS downclock is found in VBT. ",
@@ -405,6 +409,34 @@ parse_driver_features(struct drm_i915_private *dev_priv,
405} 409}
406 410
407static void 411static void
412parse_edp(struct drm_i915_private *dev_priv, struct bdb_header *bdb)
413{
414 struct bdb_edp *edp;
415
416 edp = find_section(bdb, BDB_EDP);
417 if (!edp) {
418 if (SUPPORTS_EDP(dev_priv->dev) && dev_priv->edp_support) {
419 DRM_DEBUG_KMS("No eDP BDB found but eDP panel supported,\
420 assume 18bpp panel color depth.\n");
421 dev_priv->edp_bpp = 18;
422 }
423 return;
424 }
425
426 switch ((edp->color_depth >> (panel_type * 2)) & 3) {
427 case EDP_18BPP:
428 dev_priv->edp_bpp = 18;
429 break;
430 case EDP_24BPP:
431 dev_priv->edp_bpp = 24;
432 break;
433 case EDP_30BPP:
434 dev_priv->edp_bpp = 30;
435 break;
436 }
437}
438
439static void
408parse_device_mapping(struct drm_i915_private *dev_priv, 440parse_device_mapping(struct drm_i915_private *dev_priv,
409 struct bdb_header *bdb) 441 struct bdb_header *bdb)
410{ 442{
@@ -521,6 +553,7 @@ intel_init_bios(struct drm_device *dev)
521 parse_sdvo_device_mapping(dev_priv, bdb); 553 parse_sdvo_device_mapping(dev_priv, bdb);
522 parse_device_mapping(dev_priv, bdb); 554 parse_device_mapping(dev_priv, bdb);
523 parse_driver_features(dev_priv, bdb); 555 parse_driver_features(dev_priv, bdb);
556 parse_edp(dev_priv, bdb);
524 557
525 pci_unmap_rom(pdev, bios); 558 pci_unmap_rom(pdev, bios);
526 559
diff --git a/drivers/gpu/drm/i915/intel_bios.h b/drivers/gpu/drm/i915/intel_bios.h
index 425ac9d7f724..4c18514f6f80 100644
--- a/drivers/gpu/drm/i915/intel_bios.h
+++ b/drivers/gpu/drm/i915/intel_bios.h
@@ -98,6 +98,7 @@ struct vbios_data {
98#define BDB_SDVO_LVDS_PNP_IDS 24 98#define BDB_SDVO_LVDS_PNP_IDS 24
99#define BDB_SDVO_LVDS_POWER_SEQ 25 99#define BDB_SDVO_LVDS_POWER_SEQ 25
100#define BDB_TV_OPTIONS 26 100#define BDB_TV_OPTIONS 26
101#define BDB_EDP 27
101#define BDB_LVDS_OPTIONS 40 102#define BDB_LVDS_OPTIONS 40
102#define BDB_LVDS_LFP_DATA_PTRS 41 103#define BDB_LVDS_LFP_DATA_PTRS 41
103#define BDB_LVDS_LFP_DATA 42 104#define BDB_LVDS_LFP_DATA 42
@@ -426,6 +427,45 @@ struct bdb_driver_features {
426 u8 custom_vbt_version; 427 u8 custom_vbt_version;
427} __attribute__((packed)); 428} __attribute__((packed));
428 429
430#define EDP_18BPP 0
431#define EDP_24BPP 1
432#define EDP_30BPP 2
433#define EDP_RATE_1_62 0
434#define EDP_RATE_2_7 1
435#define EDP_LANE_1 0
436#define EDP_LANE_2 1
437#define EDP_LANE_4 3
438#define EDP_PREEMPHASIS_NONE 0
439#define EDP_PREEMPHASIS_3_5dB 1
440#define EDP_PREEMPHASIS_6dB 2
441#define EDP_PREEMPHASIS_9_5dB 3
442#define EDP_VSWING_0_4V 0
443#define EDP_VSWING_0_6V 1
444#define EDP_VSWING_0_8V 2
445#define EDP_VSWING_1_2V 3
446
447struct edp_power_seq {
448 u16 t3;
449 u16 t7;
450 u16 t9;
451 u16 t10;
452 u16 t12;
453} __attribute__ ((packed));
454
455struct edp_link_params {
456 u8 rate:4;
457 u8 lanes:4;
458 u8 preemphasis:4;
459 u8 vswing:4;
460} __attribute__ ((packed));
461
462struct bdb_edp {
463 struct edp_power_seq power_seqs[16];
464 u32 color_depth;
465 u32 sdrrs_msa_timing_delay;
466 struct edp_link_params link_params[16];
467} __attribute__ ((packed));
468
429bool intel_init_bios(struct drm_device *dev); 469bool intel_init_bios(struct drm_device *dev);
430 470
431/* 471/*
diff --git a/drivers/gpu/drm/i915/intel_crt.c b/drivers/gpu/drm/i915/intel_crt.c
index 9f3d3e563414..79dd4026586f 100644
--- a/drivers/gpu/drm/i915/intel_crt.c
+++ b/drivers/gpu/drm/i915/intel_crt.c
@@ -157,6 +157,9 @@ static bool intel_ironlake_crt_detect_hotplug(struct drm_connector *connector)
157 adpa = I915_READ(PCH_ADPA); 157 adpa = I915_READ(PCH_ADPA);
158 158
159 adpa &= ~ADPA_CRT_HOTPLUG_MASK; 159 adpa &= ~ADPA_CRT_HOTPLUG_MASK;
160 /* disable HPD first */
161 I915_WRITE(PCH_ADPA, adpa);
162 (void)I915_READ(PCH_ADPA);
160 163
161 adpa |= (ADPA_CRT_HOTPLUG_PERIOD_128 | 164 adpa |= (ADPA_CRT_HOTPLUG_PERIOD_128 |
162 ADPA_CRT_HOTPLUG_WARMUP_10MS | 165 ADPA_CRT_HOTPLUG_WARMUP_10MS |
@@ -548,4 +551,6 @@ void intel_crt_init(struct drm_device *dev)
548 drm_connector_helper_add(connector, &intel_crt_connector_helper_funcs); 551 drm_connector_helper_add(connector, &intel_crt_connector_helper_funcs);
549 552
550 drm_sysfs_connector_add(connector); 553 drm_sysfs_connector_add(connector);
554
555 dev_priv->hotplug_supported_mask |= CRT_HOTPLUG_INT_STATUS;
551} 556}
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 52cd9b006da2..b27202d23ebc 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -70,8 +70,6 @@ struct intel_limit {
70 intel_p2_t p2; 70 intel_p2_t p2;
71 bool (* find_pll)(const intel_limit_t *, struct drm_crtc *, 71 bool (* find_pll)(const intel_limit_t *, struct drm_crtc *,
72 int, int, intel_clock_t *); 72 int, int, intel_clock_t *);
73 bool (* find_reduced_pll)(const intel_limit_t *, struct drm_crtc *,
74 int, int, intel_clock_t *);
75}; 73};
76 74
77#define I8XX_DOT_MIN 25000 75#define I8XX_DOT_MIN 25000
@@ -242,38 +240,93 @@ struct intel_limit {
242#define IRONLAKE_DOT_MAX 350000 240#define IRONLAKE_DOT_MAX 350000
243#define IRONLAKE_VCO_MIN 1760000 241#define IRONLAKE_VCO_MIN 1760000
244#define IRONLAKE_VCO_MAX 3510000 242#define IRONLAKE_VCO_MAX 3510000
245#define IRONLAKE_N_MIN 1
246#define IRONLAKE_N_MAX 5
247#define IRONLAKE_M_MIN 79
248#define IRONLAKE_M_MAX 118
249#define IRONLAKE_M1_MIN 12 243#define IRONLAKE_M1_MIN 12
250#define IRONLAKE_M1_MAX 23 244#define IRONLAKE_M1_MAX 22
251#define IRONLAKE_M2_MIN 5 245#define IRONLAKE_M2_MIN 5
252#define IRONLAKE_M2_MAX 9 246#define IRONLAKE_M2_MAX 9
253#define IRONLAKE_P_SDVO_DAC_MIN 5
254#define IRONLAKE_P_SDVO_DAC_MAX 80
255#define IRONLAKE_P_LVDS_MIN 28
256#define IRONLAKE_P_LVDS_MAX 112
257#define IRONLAKE_P1_MIN 1
258#define IRONLAKE_P1_MAX 8
259#define IRONLAKE_P2_SDVO_DAC_SLOW 10
260#define IRONLAKE_P2_SDVO_DAC_FAST 5
261#define IRONLAKE_P2_LVDS_SLOW 14 /* single channel */
262#define IRONLAKE_P2_LVDS_FAST 7 /* double channel */
263#define IRONLAKE_P2_DOT_LIMIT 225000 /* 225Mhz */ 247#define IRONLAKE_P2_DOT_LIMIT 225000 /* 225Mhz */
264 248
249/* We have parameter ranges for different type of outputs. */
250
251/* DAC & HDMI Refclk 120Mhz */
252#define IRONLAKE_DAC_N_MIN 1
253#define IRONLAKE_DAC_N_MAX 5
254#define IRONLAKE_DAC_M_MIN 79
255#define IRONLAKE_DAC_M_MAX 127
256#define IRONLAKE_DAC_P_MIN 5
257#define IRONLAKE_DAC_P_MAX 80
258#define IRONLAKE_DAC_P1_MIN 1
259#define IRONLAKE_DAC_P1_MAX 8
260#define IRONLAKE_DAC_P2_SLOW 10
261#define IRONLAKE_DAC_P2_FAST 5
262
263/* LVDS single-channel 120Mhz refclk */
264#define IRONLAKE_LVDS_S_N_MIN 1
265#define IRONLAKE_LVDS_S_N_MAX 3
266#define IRONLAKE_LVDS_S_M_MIN 79
267#define IRONLAKE_LVDS_S_M_MAX 118
268#define IRONLAKE_LVDS_S_P_MIN 28
269#define IRONLAKE_LVDS_S_P_MAX 112
270#define IRONLAKE_LVDS_S_P1_MIN 2
271#define IRONLAKE_LVDS_S_P1_MAX 8
272#define IRONLAKE_LVDS_S_P2_SLOW 14
273#define IRONLAKE_LVDS_S_P2_FAST 14
274
275/* LVDS dual-channel 120Mhz refclk */
276#define IRONLAKE_LVDS_D_N_MIN 1
277#define IRONLAKE_LVDS_D_N_MAX 3
278#define IRONLAKE_LVDS_D_M_MIN 79
279#define IRONLAKE_LVDS_D_M_MAX 127
280#define IRONLAKE_LVDS_D_P_MIN 14
281#define IRONLAKE_LVDS_D_P_MAX 56
282#define IRONLAKE_LVDS_D_P1_MIN 2
283#define IRONLAKE_LVDS_D_P1_MAX 8
284#define IRONLAKE_LVDS_D_P2_SLOW 7
285#define IRONLAKE_LVDS_D_P2_FAST 7
286
287/* LVDS single-channel 100Mhz refclk */
288#define IRONLAKE_LVDS_S_SSC_N_MIN 1
289#define IRONLAKE_LVDS_S_SSC_N_MAX 2
290#define IRONLAKE_LVDS_S_SSC_M_MIN 79
291#define IRONLAKE_LVDS_S_SSC_M_MAX 126
292#define IRONLAKE_LVDS_S_SSC_P_MIN 28
293#define IRONLAKE_LVDS_S_SSC_P_MAX 112
294#define IRONLAKE_LVDS_S_SSC_P1_MIN 2
295#define IRONLAKE_LVDS_S_SSC_P1_MAX 8
296#define IRONLAKE_LVDS_S_SSC_P2_SLOW 14
297#define IRONLAKE_LVDS_S_SSC_P2_FAST 14
298
299/* LVDS dual-channel 100Mhz refclk */
300#define IRONLAKE_LVDS_D_SSC_N_MIN 1
301#define IRONLAKE_LVDS_D_SSC_N_MAX 3
302#define IRONLAKE_LVDS_D_SSC_M_MIN 79
303#define IRONLAKE_LVDS_D_SSC_M_MAX 126
304#define IRONLAKE_LVDS_D_SSC_P_MIN 14
305#define IRONLAKE_LVDS_D_SSC_P_MAX 42
306#define IRONLAKE_LVDS_D_SSC_P1_MIN 2
307#define IRONLAKE_LVDS_D_SSC_P1_MAX 6
308#define IRONLAKE_LVDS_D_SSC_P2_SLOW 7
309#define IRONLAKE_LVDS_D_SSC_P2_FAST 7
310
311/* DisplayPort */
312#define IRONLAKE_DP_N_MIN 1
313#define IRONLAKE_DP_N_MAX 2
314#define IRONLAKE_DP_M_MIN 81
315#define IRONLAKE_DP_M_MAX 90
316#define IRONLAKE_DP_P_MIN 10
317#define IRONLAKE_DP_P_MAX 20
318#define IRONLAKE_DP_P2_FAST 10
319#define IRONLAKE_DP_P2_SLOW 10
320#define IRONLAKE_DP_P2_LIMIT 0
321#define IRONLAKE_DP_P1_MIN 1
322#define IRONLAKE_DP_P1_MAX 2
323
265static bool 324static bool
266intel_find_best_PLL(const intel_limit_t *limit, struct drm_crtc *crtc, 325intel_find_best_PLL(const intel_limit_t *limit, struct drm_crtc *crtc,
267 int target, int refclk, intel_clock_t *best_clock); 326 int target, int refclk, intel_clock_t *best_clock);
268static bool 327static bool
269intel_find_best_reduced_PLL(const intel_limit_t *limit, struct drm_crtc *crtc,
270 int target, int refclk, intel_clock_t *best_clock);
271static bool
272intel_g4x_find_best_PLL(const intel_limit_t *limit, struct drm_crtc *crtc, 328intel_g4x_find_best_PLL(const intel_limit_t *limit, struct drm_crtc *crtc,
273 int target, int refclk, intel_clock_t *best_clock); 329 int target, int refclk, intel_clock_t *best_clock);
274static bool
275intel_ironlake_find_best_PLL(const intel_limit_t *limit, struct drm_crtc *crtc,
276 int target, int refclk, intel_clock_t *best_clock);
277 330
278static bool 331static bool
279intel_find_pll_g4x_dp(const intel_limit_t *, struct drm_crtc *crtc, 332intel_find_pll_g4x_dp(const intel_limit_t *, struct drm_crtc *crtc,
@@ -294,7 +347,6 @@ static const intel_limit_t intel_limits_i8xx_dvo = {
294 .p2 = { .dot_limit = I8XX_P2_SLOW_LIMIT, 347 .p2 = { .dot_limit = I8XX_P2_SLOW_LIMIT,
295 .p2_slow = I8XX_P2_SLOW, .p2_fast = I8XX_P2_FAST }, 348 .p2_slow = I8XX_P2_SLOW, .p2_fast = I8XX_P2_FAST },
296 .find_pll = intel_find_best_PLL, 349 .find_pll = intel_find_best_PLL,
297 .find_reduced_pll = intel_find_best_reduced_PLL,
298}; 350};
299 351
300static const intel_limit_t intel_limits_i8xx_lvds = { 352static const intel_limit_t intel_limits_i8xx_lvds = {
@@ -309,7 +361,6 @@ static const intel_limit_t intel_limits_i8xx_lvds = {
309 .p2 = { .dot_limit = I8XX_P2_SLOW_LIMIT, 361 .p2 = { .dot_limit = I8XX_P2_SLOW_LIMIT,
310 .p2_slow = I8XX_P2_LVDS_SLOW, .p2_fast = I8XX_P2_LVDS_FAST }, 362 .p2_slow = I8XX_P2_LVDS_SLOW, .p2_fast = I8XX_P2_LVDS_FAST },
311 .find_pll = intel_find_best_PLL, 363 .find_pll = intel_find_best_PLL,
312 .find_reduced_pll = intel_find_best_reduced_PLL,
313}; 364};
314 365
315static const intel_limit_t intel_limits_i9xx_sdvo = { 366static const intel_limit_t intel_limits_i9xx_sdvo = {
@@ -324,7 +375,6 @@ static const intel_limit_t intel_limits_i9xx_sdvo = {
324 .p2 = { .dot_limit = I9XX_P2_SDVO_DAC_SLOW_LIMIT, 375 .p2 = { .dot_limit = I9XX_P2_SDVO_DAC_SLOW_LIMIT,
325 .p2_slow = I9XX_P2_SDVO_DAC_SLOW, .p2_fast = I9XX_P2_SDVO_DAC_FAST }, 376 .p2_slow = I9XX_P2_SDVO_DAC_SLOW, .p2_fast = I9XX_P2_SDVO_DAC_FAST },
326 .find_pll = intel_find_best_PLL, 377 .find_pll = intel_find_best_PLL,
327 .find_reduced_pll = intel_find_best_reduced_PLL,
328}; 378};
329 379
330static const intel_limit_t intel_limits_i9xx_lvds = { 380static const intel_limit_t intel_limits_i9xx_lvds = {
@@ -342,7 +392,6 @@ static const intel_limit_t intel_limits_i9xx_lvds = {
342 .p2 = { .dot_limit = I9XX_P2_LVDS_SLOW_LIMIT, 392 .p2 = { .dot_limit = I9XX_P2_LVDS_SLOW_LIMIT,
343 .p2_slow = I9XX_P2_LVDS_SLOW, .p2_fast = I9XX_P2_LVDS_FAST }, 393 .p2_slow = I9XX_P2_LVDS_SLOW, .p2_fast = I9XX_P2_LVDS_FAST },
344 .find_pll = intel_find_best_PLL, 394 .find_pll = intel_find_best_PLL,
345 .find_reduced_pll = intel_find_best_reduced_PLL,
346}; 395};
347 396
348 /* below parameter and function is for G4X Chipset Family*/ 397 /* below parameter and function is for G4X Chipset Family*/
@@ -360,7 +409,6 @@ static const intel_limit_t intel_limits_g4x_sdvo = {
360 .p2_fast = G4X_P2_SDVO_FAST 409 .p2_fast = G4X_P2_SDVO_FAST
361 }, 410 },
362 .find_pll = intel_g4x_find_best_PLL, 411 .find_pll = intel_g4x_find_best_PLL,
363 .find_reduced_pll = intel_g4x_find_best_PLL,
364}; 412};
365 413
366static const intel_limit_t intel_limits_g4x_hdmi = { 414static const intel_limit_t intel_limits_g4x_hdmi = {
@@ -377,7 +425,6 @@ static const intel_limit_t intel_limits_g4x_hdmi = {
377 .p2_fast = G4X_P2_HDMI_DAC_FAST 425 .p2_fast = G4X_P2_HDMI_DAC_FAST
378 }, 426 },
379 .find_pll = intel_g4x_find_best_PLL, 427 .find_pll = intel_g4x_find_best_PLL,
380 .find_reduced_pll = intel_g4x_find_best_PLL,
381}; 428};
382 429
383static const intel_limit_t intel_limits_g4x_single_channel_lvds = { 430static const intel_limit_t intel_limits_g4x_single_channel_lvds = {
@@ -402,7 +449,6 @@ static const intel_limit_t intel_limits_g4x_single_channel_lvds = {
402 .p2_fast = G4X_P2_SINGLE_CHANNEL_LVDS_FAST 449 .p2_fast = G4X_P2_SINGLE_CHANNEL_LVDS_FAST
403 }, 450 },
404 .find_pll = intel_g4x_find_best_PLL, 451 .find_pll = intel_g4x_find_best_PLL,
405 .find_reduced_pll = intel_g4x_find_best_PLL,
406}; 452};
407 453
408static const intel_limit_t intel_limits_g4x_dual_channel_lvds = { 454static const intel_limit_t intel_limits_g4x_dual_channel_lvds = {
@@ -427,7 +473,6 @@ static const intel_limit_t intel_limits_g4x_dual_channel_lvds = {
427 .p2_fast = G4X_P2_DUAL_CHANNEL_LVDS_FAST 473 .p2_fast = G4X_P2_DUAL_CHANNEL_LVDS_FAST
428 }, 474 },
429 .find_pll = intel_g4x_find_best_PLL, 475 .find_pll = intel_g4x_find_best_PLL,
430 .find_reduced_pll = intel_g4x_find_best_PLL,
431}; 476};
432 477
433static const intel_limit_t intel_limits_g4x_display_port = { 478static const intel_limit_t intel_limits_g4x_display_port = {
@@ -465,7 +510,6 @@ static const intel_limit_t intel_limits_pineview_sdvo = {
465 .p2 = { .dot_limit = I9XX_P2_SDVO_DAC_SLOW_LIMIT, 510 .p2 = { .dot_limit = I9XX_P2_SDVO_DAC_SLOW_LIMIT,
466 .p2_slow = I9XX_P2_SDVO_DAC_SLOW, .p2_fast = I9XX_P2_SDVO_DAC_FAST }, 511 .p2_slow = I9XX_P2_SDVO_DAC_SLOW, .p2_fast = I9XX_P2_SDVO_DAC_FAST },
467 .find_pll = intel_find_best_PLL, 512 .find_pll = intel_find_best_PLL,
468 .find_reduced_pll = intel_find_best_reduced_PLL,
469}; 513};
470 514
471static const intel_limit_t intel_limits_pineview_lvds = { 515static const intel_limit_t intel_limits_pineview_lvds = {
@@ -481,46 +525,135 @@ static const intel_limit_t intel_limits_pineview_lvds = {
481 .p2 = { .dot_limit = I9XX_P2_LVDS_SLOW_LIMIT, 525 .p2 = { .dot_limit = I9XX_P2_LVDS_SLOW_LIMIT,
482 .p2_slow = I9XX_P2_LVDS_SLOW, .p2_fast = I9XX_P2_LVDS_SLOW }, 526 .p2_slow = I9XX_P2_LVDS_SLOW, .p2_fast = I9XX_P2_LVDS_SLOW },
483 .find_pll = intel_find_best_PLL, 527 .find_pll = intel_find_best_PLL,
484 .find_reduced_pll = intel_find_best_reduced_PLL,
485}; 528};
486 529
487static const intel_limit_t intel_limits_ironlake_sdvo = { 530static const intel_limit_t intel_limits_ironlake_dac = {
531 .dot = { .min = IRONLAKE_DOT_MIN, .max = IRONLAKE_DOT_MAX },
532 .vco = { .min = IRONLAKE_VCO_MIN, .max = IRONLAKE_VCO_MAX },
533 .n = { .min = IRONLAKE_DAC_N_MIN, .max = IRONLAKE_DAC_N_MAX },
534 .m = { .min = IRONLAKE_DAC_M_MIN, .max = IRONLAKE_DAC_M_MAX },
535 .m1 = { .min = IRONLAKE_M1_MIN, .max = IRONLAKE_M1_MAX },
536 .m2 = { .min = IRONLAKE_M2_MIN, .max = IRONLAKE_M2_MAX },
537 .p = { .min = IRONLAKE_DAC_P_MIN, .max = IRONLAKE_DAC_P_MAX },
538 .p1 = { .min = IRONLAKE_DAC_P1_MIN, .max = IRONLAKE_DAC_P1_MAX },
539 .p2 = { .dot_limit = IRONLAKE_P2_DOT_LIMIT,
540 .p2_slow = IRONLAKE_DAC_P2_SLOW,
541 .p2_fast = IRONLAKE_DAC_P2_FAST },
542 .find_pll = intel_g4x_find_best_PLL,
543};
544
545static const intel_limit_t intel_limits_ironlake_single_lvds = {
546 .dot = { .min = IRONLAKE_DOT_MIN, .max = IRONLAKE_DOT_MAX },
547 .vco = { .min = IRONLAKE_VCO_MIN, .max = IRONLAKE_VCO_MAX },
548 .n = { .min = IRONLAKE_LVDS_S_N_MIN, .max = IRONLAKE_LVDS_S_N_MAX },
549 .m = { .min = IRONLAKE_LVDS_S_M_MIN, .max = IRONLAKE_LVDS_S_M_MAX },
550 .m1 = { .min = IRONLAKE_M1_MIN, .max = IRONLAKE_M1_MAX },
551 .m2 = { .min = IRONLAKE_M2_MIN, .max = IRONLAKE_M2_MAX },
552 .p = { .min = IRONLAKE_LVDS_S_P_MIN, .max = IRONLAKE_LVDS_S_P_MAX },
553 .p1 = { .min = IRONLAKE_LVDS_S_P1_MIN, .max = IRONLAKE_LVDS_S_P1_MAX },
554 .p2 = { .dot_limit = IRONLAKE_P2_DOT_LIMIT,
555 .p2_slow = IRONLAKE_LVDS_S_P2_SLOW,
556 .p2_fast = IRONLAKE_LVDS_S_P2_FAST },
557 .find_pll = intel_g4x_find_best_PLL,
558};
559
560static const intel_limit_t intel_limits_ironlake_dual_lvds = {
488 .dot = { .min = IRONLAKE_DOT_MIN, .max = IRONLAKE_DOT_MAX }, 561 .dot = { .min = IRONLAKE_DOT_MIN, .max = IRONLAKE_DOT_MAX },
489 .vco = { .min = IRONLAKE_VCO_MIN, .max = IRONLAKE_VCO_MAX }, 562 .vco = { .min = IRONLAKE_VCO_MIN, .max = IRONLAKE_VCO_MAX },
490 .n = { .min = IRONLAKE_N_MIN, .max = IRONLAKE_N_MAX }, 563 .n = { .min = IRONLAKE_LVDS_D_N_MIN, .max = IRONLAKE_LVDS_D_N_MAX },
491 .m = { .min = IRONLAKE_M_MIN, .max = IRONLAKE_M_MAX }, 564 .m = { .min = IRONLAKE_LVDS_D_M_MIN, .max = IRONLAKE_LVDS_D_M_MAX },
492 .m1 = { .min = IRONLAKE_M1_MIN, .max = IRONLAKE_M1_MAX }, 565 .m1 = { .min = IRONLAKE_M1_MIN, .max = IRONLAKE_M1_MAX },
493 .m2 = { .min = IRONLAKE_M2_MIN, .max = IRONLAKE_M2_MAX }, 566 .m2 = { .min = IRONLAKE_M2_MIN, .max = IRONLAKE_M2_MAX },
494 .p = { .min = IRONLAKE_P_SDVO_DAC_MIN, .max = IRONLAKE_P_SDVO_DAC_MAX }, 567 .p = { .min = IRONLAKE_LVDS_D_P_MIN, .max = IRONLAKE_LVDS_D_P_MAX },
495 .p1 = { .min = IRONLAKE_P1_MIN, .max = IRONLAKE_P1_MAX }, 568 .p1 = { .min = IRONLAKE_LVDS_D_P1_MIN, .max = IRONLAKE_LVDS_D_P1_MAX },
496 .p2 = { .dot_limit = IRONLAKE_P2_DOT_LIMIT, 569 .p2 = { .dot_limit = IRONLAKE_P2_DOT_LIMIT,
497 .p2_slow = IRONLAKE_P2_SDVO_DAC_SLOW, 570 .p2_slow = IRONLAKE_LVDS_D_P2_SLOW,
498 .p2_fast = IRONLAKE_P2_SDVO_DAC_FAST }, 571 .p2_fast = IRONLAKE_LVDS_D_P2_FAST },
499 .find_pll = intel_ironlake_find_best_PLL, 572 .find_pll = intel_g4x_find_best_PLL,
500}; 573};
501 574
502static const intel_limit_t intel_limits_ironlake_lvds = { 575static const intel_limit_t intel_limits_ironlake_single_lvds_100m = {
503 .dot = { .min = IRONLAKE_DOT_MIN, .max = IRONLAKE_DOT_MAX }, 576 .dot = { .min = IRONLAKE_DOT_MIN, .max = IRONLAKE_DOT_MAX },
504 .vco = { .min = IRONLAKE_VCO_MIN, .max = IRONLAKE_VCO_MAX }, 577 .vco = { .min = IRONLAKE_VCO_MIN, .max = IRONLAKE_VCO_MAX },
505 .n = { .min = IRONLAKE_N_MIN, .max = IRONLAKE_N_MAX }, 578 .n = { .min = IRONLAKE_LVDS_S_SSC_N_MIN, .max = IRONLAKE_LVDS_S_SSC_N_MAX },
506 .m = { .min = IRONLAKE_M_MIN, .max = IRONLAKE_M_MAX }, 579 .m = { .min = IRONLAKE_LVDS_S_SSC_M_MIN, .max = IRONLAKE_LVDS_S_SSC_M_MAX },
507 .m1 = { .min = IRONLAKE_M1_MIN, .max = IRONLAKE_M1_MAX }, 580 .m1 = { .min = IRONLAKE_M1_MIN, .max = IRONLAKE_M1_MAX },
508 .m2 = { .min = IRONLAKE_M2_MIN, .max = IRONLAKE_M2_MAX }, 581 .m2 = { .min = IRONLAKE_M2_MIN, .max = IRONLAKE_M2_MAX },
509 .p = { .min = IRONLAKE_P_LVDS_MIN, .max = IRONLAKE_P_LVDS_MAX }, 582 .p = { .min = IRONLAKE_LVDS_S_SSC_P_MIN, .max = IRONLAKE_LVDS_S_SSC_P_MAX },
510 .p1 = { .min = IRONLAKE_P1_MIN, .max = IRONLAKE_P1_MAX }, 583 .p1 = { .min = IRONLAKE_LVDS_S_SSC_P1_MIN,.max = IRONLAKE_LVDS_S_SSC_P1_MAX },
511 .p2 = { .dot_limit = IRONLAKE_P2_DOT_LIMIT, 584 .p2 = { .dot_limit = IRONLAKE_P2_DOT_LIMIT,
512 .p2_slow = IRONLAKE_P2_LVDS_SLOW, 585 .p2_slow = IRONLAKE_LVDS_S_SSC_P2_SLOW,
513 .p2_fast = IRONLAKE_P2_LVDS_FAST }, 586 .p2_fast = IRONLAKE_LVDS_S_SSC_P2_FAST },
514 .find_pll = intel_ironlake_find_best_PLL, 587 .find_pll = intel_g4x_find_best_PLL,
588};
589
590static const intel_limit_t intel_limits_ironlake_dual_lvds_100m = {
591 .dot = { .min = IRONLAKE_DOT_MIN, .max = IRONLAKE_DOT_MAX },
592 .vco = { .min = IRONLAKE_VCO_MIN, .max = IRONLAKE_VCO_MAX },
593 .n = { .min = IRONLAKE_LVDS_D_SSC_N_MIN, .max = IRONLAKE_LVDS_D_SSC_N_MAX },
594 .m = { .min = IRONLAKE_LVDS_D_SSC_M_MIN, .max = IRONLAKE_LVDS_D_SSC_M_MAX },
595 .m1 = { .min = IRONLAKE_M1_MIN, .max = IRONLAKE_M1_MAX },
596 .m2 = { .min = IRONLAKE_M2_MIN, .max = IRONLAKE_M2_MAX },
597 .p = { .min = IRONLAKE_LVDS_D_SSC_P_MIN, .max = IRONLAKE_LVDS_D_SSC_P_MAX },
598 .p1 = { .min = IRONLAKE_LVDS_D_SSC_P1_MIN,.max = IRONLAKE_LVDS_D_SSC_P1_MAX },
599 .p2 = { .dot_limit = IRONLAKE_P2_DOT_LIMIT,
600 .p2_slow = IRONLAKE_LVDS_D_SSC_P2_SLOW,
601 .p2_fast = IRONLAKE_LVDS_D_SSC_P2_FAST },
602 .find_pll = intel_g4x_find_best_PLL,
603};
604
605static const intel_limit_t intel_limits_ironlake_display_port = {
606 .dot = { .min = IRONLAKE_DOT_MIN,
607 .max = IRONLAKE_DOT_MAX },
608 .vco = { .min = IRONLAKE_VCO_MIN,
609 .max = IRONLAKE_VCO_MAX},
610 .n = { .min = IRONLAKE_DP_N_MIN,
611 .max = IRONLAKE_DP_N_MAX },
612 .m = { .min = IRONLAKE_DP_M_MIN,
613 .max = IRONLAKE_DP_M_MAX },
614 .m1 = { .min = IRONLAKE_M1_MIN,
615 .max = IRONLAKE_M1_MAX },
616 .m2 = { .min = IRONLAKE_M2_MIN,
617 .max = IRONLAKE_M2_MAX },
618 .p = { .min = IRONLAKE_DP_P_MIN,
619 .max = IRONLAKE_DP_P_MAX },
620 .p1 = { .min = IRONLAKE_DP_P1_MIN,
621 .max = IRONLAKE_DP_P1_MAX},
622 .p2 = { .dot_limit = IRONLAKE_DP_P2_LIMIT,
623 .p2_slow = IRONLAKE_DP_P2_SLOW,
624 .p2_fast = IRONLAKE_DP_P2_FAST },
625 .find_pll = intel_find_pll_ironlake_dp,
515}; 626};
516 627
517static const intel_limit_t *intel_ironlake_limit(struct drm_crtc *crtc) 628static const intel_limit_t *intel_ironlake_limit(struct drm_crtc *crtc)
518{ 629{
630 struct drm_device *dev = crtc->dev;
631 struct drm_i915_private *dev_priv = dev->dev_private;
519 const intel_limit_t *limit; 632 const intel_limit_t *limit;
520 if (intel_pipe_has_type(crtc, INTEL_OUTPUT_LVDS)) 633 int refclk = 120;
521 limit = &intel_limits_ironlake_lvds; 634
635 if (intel_pipe_has_type(crtc, INTEL_OUTPUT_LVDS)) {
636 if (dev_priv->lvds_use_ssc && dev_priv->lvds_ssc_freq == 100)
637 refclk = 100;
638
639 if ((I915_READ(PCH_LVDS) & LVDS_CLKB_POWER_MASK) ==
640 LVDS_CLKB_POWER_UP) {
641 /* LVDS dual channel */
642 if (refclk == 100)
643 limit = &intel_limits_ironlake_dual_lvds_100m;
644 else
645 limit = &intel_limits_ironlake_dual_lvds;
646 } else {
647 if (refclk == 100)
648 limit = &intel_limits_ironlake_single_lvds_100m;
649 else
650 limit = &intel_limits_ironlake_single_lvds;
651 }
652 } else if (intel_pipe_has_type(crtc, INTEL_OUTPUT_DISPLAYPORT) ||
653 HAS_eDP)
654 limit = &intel_limits_ironlake_display_port;
522 else 655 else
523 limit = &intel_limits_ironlake_sdvo; 656 limit = &intel_limits_ironlake_dac;
524 657
525 return limit; 658 return limit;
526} 659}
@@ -737,46 +870,6 @@ intel_find_best_PLL(const intel_limit_t *limit, struct drm_crtc *crtc,
737 return (err != target); 870 return (err != target);
738} 871}
739 872
740
741static bool
742intel_find_best_reduced_PLL(const intel_limit_t *limit, struct drm_crtc *crtc,
743 int target, int refclk, intel_clock_t *best_clock)
744
745{
746 struct drm_device *dev = crtc->dev;
747 intel_clock_t clock;
748 int err = target;
749 bool found = false;
750
751 memcpy(&clock, best_clock, sizeof(intel_clock_t));
752
753 for (clock.m1 = limit->m1.min; clock.m1 <= limit->m1.max; clock.m1++) {
754 for (clock.m2 = limit->m2.min; clock.m2 <= limit->m2.max; clock.m2++) {
755 /* m1 is always 0 in Pineview */
756 if (clock.m2 >= clock.m1 && !IS_PINEVIEW(dev))
757 break;
758 for (clock.n = limit->n.min; clock.n <= limit->n.max;
759 clock.n++) {
760 int this_err;
761
762 intel_clock(dev, refclk, &clock);
763
764 if (!intel_PLL_is_valid(crtc, &clock))
765 continue;
766
767 this_err = abs(clock.dot - target);
768 if (this_err < err) {
769 *best_clock = clock;
770 err = this_err;
771 found = true;
772 }
773 }
774 }
775 }
776
777 return found;
778}
779
780static bool 873static bool
781intel_g4x_find_best_PLL(const intel_limit_t *limit, struct drm_crtc *crtc, 874intel_g4x_find_best_PLL(const intel_limit_t *limit, struct drm_crtc *crtc,
782 int target, int refclk, intel_clock_t *best_clock) 875 int target, int refclk, intel_clock_t *best_clock)
@@ -791,7 +884,13 @@ intel_g4x_find_best_PLL(const intel_limit_t *limit, struct drm_crtc *crtc,
791 found = false; 884 found = false;
792 885
793 if (intel_pipe_has_type(crtc, INTEL_OUTPUT_LVDS)) { 886 if (intel_pipe_has_type(crtc, INTEL_OUTPUT_LVDS)) {
794 if ((I915_READ(LVDS) & LVDS_CLKB_POWER_MASK) == 887 int lvds_reg;
888
889 if (IS_IRONLAKE(dev))
890 lvds_reg = PCH_LVDS;
891 else
892 lvds_reg = LVDS;
893 if ((I915_READ(lvds_reg) & LVDS_CLKB_POWER_MASK) ==
795 LVDS_CLKB_POWER_UP) 894 LVDS_CLKB_POWER_UP)
796 clock.p2 = limit->p2.p2_fast; 895 clock.p2 = limit->p2.p2_fast;
797 else 896 else
@@ -839,6 +938,11 @@ intel_find_pll_ironlake_dp(const intel_limit_t *limit, struct drm_crtc *crtc,
839{ 938{
840 struct drm_device *dev = crtc->dev; 939 struct drm_device *dev = crtc->dev;
841 intel_clock_t clock; 940 intel_clock_t clock;
941
942 /* return directly when it is eDP */
943 if (HAS_eDP)
944 return true;
945
842 if (target < 200000) { 946 if (target < 200000) {
843 clock.n = 1; 947 clock.n = 1;
844 clock.p1 = 2; 948 clock.p1 = 2;
@@ -857,68 +961,6 @@ intel_find_pll_ironlake_dp(const intel_limit_t *limit, struct drm_crtc *crtc,
857 return true; 961 return true;
858} 962}
859 963
860static bool
861intel_ironlake_find_best_PLL(const intel_limit_t *limit, struct drm_crtc *crtc,
862 int target, int refclk, intel_clock_t *best_clock)
863{
864 struct drm_device *dev = crtc->dev;
865 struct drm_i915_private *dev_priv = dev->dev_private;
866 intel_clock_t clock;
867 int err_most = 47;
868 int err_min = 10000;
869
870 /* eDP has only 2 clock choice, no n/m/p setting */
871 if (HAS_eDP)
872 return true;
873
874 if (intel_pipe_has_type(crtc, INTEL_OUTPUT_DISPLAYPORT))
875 return intel_find_pll_ironlake_dp(limit, crtc, target,
876 refclk, best_clock);
877
878 if (intel_pipe_has_type(crtc, INTEL_OUTPUT_LVDS)) {
879 if ((I915_READ(PCH_LVDS) & LVDS_CLKB_POWER_MASK) ==
880 LVDS_CLKB_POWER_UP)
881 clock.p2 = limit->p2.p2_fast;
882 else
883 clock.p2 = limit->p2.p2_slow;
884 } else {
885 if (target < limit->p2.dot_limit)
886 clock.p2 = limit->p2.p2_slow;
887 else
888 clock.p2 = limit->p2.p2_fast;
889 }
890
891 memset(best_clock, 0, sizeof(*best_clock));
892 for (clock.p1 = limit->p1.max; clock.p1 >= limit->p1.min; clock.p1--) {
893 /* based on hardware requriment prefer smaller n to precision */
894 for (clock.n = limit->n.min; clock.n <= limit->n.max; clock.n++) {
895 /* based on hardware requirment prefere larger m1,m2 */
896 for (clock.m1 = limit->m1.max;
897 clock.m1 >= limit->m1.min; clock.m1--) {
898 for (clock.m2 = limit->m2.max;
899 clock.m2 >= limit->m2.min; clock.m2--) {
900 int this_err;
901
902 intel_clock(dev, refclk, &clock);
903 if (!intel_PLL_is_valid(crtc, &clock))
904 continue;
905 this_err = abs((10000 - (target*10000/clock.dot)));
906 if (this_err < err_most) {
907 *best_clock = clock;
908 /* found on first matching */
909 goto out;
910 } else if (this_err < err_min) {
911 *best_clock = clock;
912 err_min = this_err;
913 }
914 }
915 }
916 }
917 }
918out:
919 return true;
920}
921
922/* DisplayPort has only two frequencies, 162MHz and 270MHz */ 964/* DisplayPort has only two frequencies, 162MHz and 270MHz */
923static bool 965static bool
924intel_find_pll_g4x_dp(const intel_limit_t *limit, struct drm_crtc *crtc, 966intel_find_pll_g4x_dp(const intel_limit_t *limit, struct drm_crtc *crtc,
@@ -989,6 +1031,8 @@ static void i8xx_enable_fbc(struct drm_crtc *crtc, unsigned long interval)
989 1031
990 /* enable it... */ 1032 /* enable it... */
991 fbc_ctl = FBC_CTL_EN | FBC_CTL_PERIODIC; 1033 fbc_ctl = FBC_CTL_EN | FBC_CTL_PERIODIC;
1034 if (IS_I945GM(dev))
1035 fbc_ctl |= FBC_C3_IDLE; /* 945 needs special SR handling */
992 fbc_ctl |= (dev_priv->cfb_pitch & 0xff) << FBC_CTL_STRIDE_SHIFT; 1036 fbc_ctl |= (dev_priv->cfb_pitch & 0xff) << FBC_CTL_STRIDE_SHIFT;
993 fbc_ctl |= (interval & 0x2fff) << FBC_CTL_INTERVAL_SHIFT; 1037 fbc_ctl |= (interval & 0x2fff) << FBC_CTL_INTERVAL_SHIFT;
994 if (obj_priv->tiling_mode != I915_TILING_NONE) 1038 if (obj_priv->tiling_mode != I915_TILING_NONE)
@@ -1282,7 +1326,7 @@ intel_pipe_set_base(struct drm_crtc *crtc, int x, int y,
1282 return ret; 1326 return ret;
1283 } 1327 }
1284 1328
1285 ret = i915_gem_object_set_to_gtt_domain(obj, 1); 1329 ret = i915_gem_object_set_to_display_plane(obj);
1286 if (ret != 0) { 1330 if (ret != 0) {
1287 i915_gem_object_unpin(obj); 1331 i915_gem_object_unpin(obj);
1288 mutex_unlock(&dev->struct_mutex); 1332 mutex_unlock(&dev->struct_mutex);
@@ -1493,6 +1537,10 @@ static void ironlake_crtc_dpms(struct drm_crtc *crtc, int mode)
1493 int trans_vsync_reg = (pipe == 0) ? TRANS_VSYNC_A : TRANS_VSYNC_B; 1537 int trans_vsync_reg = (pipe == 0) ? TRANS_VSYNC_A : TRANS_VSYNC_B;
1494 u32 temp; 1538 u32 temp;
1495 int tries = 5, j, n; 1539 int tries = 5, j, n;
1540 u32 pipe_bpc;
1541
1542 temp = I915_READ(pipeconf_reg);
1543 pipe_bpc = temp & PIPE_BPC_MASK;
1496 1544
1497 /* XXX: When our outputs are all unaware of DPMS modes other than off 1545 /* XXX: When our outputs are all unaware of DPMS modes other than off
1498 * and on, we should map those modes to DRM_MODE_DPMS_OFF in the CRTC. 1546 * and on, we should map those modes to DRM_MODE_DPMS_OFF in the CRTC.
@@ -1524,6 +1572,12 @@ static void ironlake_crtc_dpms(struct drm_crtc *crtc, int mode)
1524 1572
1525 /* enable PCH FDI RX PLL, wait warmup plus DMI latency */ 1573 /* enable PCH FDI RX PLL, wait warmup plus DMI latency */
1526 temp = I915_READ(fdi_rx_reg); 1574 temp = I915_READ(fdi_rx_reg);
1575 /*
1576 * make the BPC in FDI Rx be consistent with that in
1577 * pipeconf reg.
1578 */
1579 temp &= ~(0x7 << 16);
1580 temp |= (pipe_bpc << 11);
1527 I915_WRITE(fdi_rx_reg, temp | FDI_RX_PLL_ENABLE | 1581 I915_WRITE(fdi_rx_reg, temp | FDI_RX_PLL_ENABLE |
1528 FDI_SEL_PCDCLK | 1582 FDI_SEL_PCDCLK |
1529 FDI_DP_PORT_WIDTH_X4); /* default 4 lanes */ 1583 FDI_DP_PORT_WIDTH_X4); /* default 4 lanes */
@@ -1666,6 +1720,12 @@ static void ironlake_crtc_dpms(struct drm_crtc *crtc, int mode)
1666 1720
1667 /* enable PCH transcoder */ 1721 /* enable PCH transcoder */
1668 temp = I915_READ(transconf_reg); 1722 temp = I915_READ(transconf_reg);
1723 /*
1724 * make the BPC in transcoder be consistent with
1725 * that in pipeconf reg.
1726 */
1727 temp &= ~PIPE_BPC_MASK;
1728 temp |= pipe_bpc;
1669 I915_WRITE(transconf_reg, temp | TRANS_ENABLE); 1729 I915_WRITE(transconf_reg, temp | TRANS_ENABLE);
1670 I915_READ(transconf_reg); 1730 I915_READ(transconf_reg);
1671 1731
@@ -1697,6 +1757,7 @@ static void ironlake_crtc_dpms(struct drm_crtc *crtc, int mode)
1697 case DRM_MODE_DPMS_OFF: 1757 case DRM_MODE_DPMS_OFF:
1698 DRM_DEBUG_KMS("crtc %d dpms off\n", pipe); 1758 DRM_DEBUG_KMS("crtc %d dpms off\n", pipe);
1699 1759
1760 drm_vblank_off(dev, pipe);
1700 /* Disable display plane */ 1761 /* Disable display plane */
1701 temp = I915_READ(dspcntr_reg); 1762 temp = I915_READ(dspcntr_reg);
1702 if ((temp & DISPLAY_PLANE_ENABLE) != 0) { 1763 if ((temp & DISPLAY_PLANE_ENABLE) != 0) {
@@ -1745,6 +1806,9 @@ static void ironlake_crtc_dpms(struct drm_crtc *crtc, int mode)
1745 I915_READ(fdi_tx_reg); 1806 I915_READ(fdi_tx_reg);
1746 1807
1747 temp = I915_READ(fdi_rx_reg); 1808 temp = I915_READ(fdi_rx_reg);
1809 /* BPC in FDI rx is consistent with that in pipeconf */
1810 temp &= ~(0x07 << 16);
1811 temp |= (pipe_bpc << 11);
1748 I915_WRITE(fdi_rx_reg, temp & ~FDI_RX_ENABLE); 1812 I915_WRITE(fdi_rx_reg, temp & ~FDI_RX_ENABLE);
1749 I915_READ(fdi_rx_reg); 1813 I915_READ(fdi_rx_reg);
1750 1814
@@ -1789,7 +1853,12 @@ static void ironlake_crtc_dpms(struct drm_crtc *crtc, int mode)
1789 } 1853 }
1790 } 1854 }
1791 } 1855 }
1792 1856 temp = I915_READ(transconf_reg);
1857 /* BPC in transcoder is consistent with that in pipeconf */
1858 temp &= ~PIPE_BPC_MASK;
1859 temp |= pipe_bpc;
1860 I915_WRITE(transconf_reg, temp);
1861 I915_READ(transconf_reg);
1793 udelay(100); 1862 udelay(100);
1794 1863
1795 /* disable PCH DPLL */ 1864 /* disable PCH DPLL */
@@ -2448,7 +2517,7 @@ static void pineview_enable_cxsr(struct drm_device *dev, unsigned long clock,
2448 * A value of 5us seems to be a good balance; safe for very low end 2517 * A value of 5us seems to be a good balance; safe for very low end
2449 * platforms but not overly aggressive on lower latency configs. 2518 * platforms but not overly aggressive on lower latency configs.
2450 */ 2519 */
2451const static int latency_ns = 5000; 2520static const int latency_ns = 5000;
2452 2521
2453static int i9xx_get_fifo_size(struct drm_device *dev, int plane) 2522static int i9xx_get_fifo_size(struct drm_device *dev, int plane)
2454{ 2523{
@@ -2559,7 +2628,7 @@ static void g4x_update_wm(struct drm_device *dev, int planea_clock,
2559 /* Calc sr entries for one plane configs */ 2628 /* Calc sr entries for one plane configs */
2560 if (sr_hdisplay && (!planea_clock || !planeb_clock)) { 2629 if (sr_hdisplay && (!planea_clock || !planeb_clock)) {
2561 /* self-refresh has much higher latency */ 2630 /* self-refresh has much higher latency */
2562 const static int sr_latency_ns = 12000; 2631 static const int sr_latency_ns = 12000;
2563 2632
2564 sr_clock = planea_clock ? planea_clock : planeb_clock; 2633 sr_clock = planea_clock ? planea_clock : planeb_clock;
2565 line_time_us = ((sr_hdisplay * 1000) / sr_clock); 2634 line_time_us = ((sr_hdisplay * 1000) / sr_clock);
@@ -2570,6 +2639,10 @@ static void g4x_update_wm(struct drm_device *dev, int planea_clock,
2570 sr_entries = roundup(sr_entries / cacheline_size, 1); 2639 sr_entries = roundup(sr_entries / cacheline_size, 1);
2571 DRM_DEBUG("self-refresh entries: %d\n", sr_entries); 2640 DRM_DEBUG("self-refresh entries: %d\n", sr_entries);
2572 I915_WRITE(FW_BLC_SELF, FW_BLC_SELF_EN); 2641 I915_WRITE(FW_BLC_SELF, FW_BLC_SELF_EN);
2642 } else {
2643 /* Turn off self refresh if both pipes are enabled */
2644 I915_WRITE(FW_BLC_SELF, I915_READ(FW_BLC_SELF)
2645 & ~FW_BLC_SELF_EN);
2573 } 2646 }
2574 2647
2575 DRM_DEBUG("Setting FIFO watermarks - A: %d, B: %d, SR %d\n", 2648 DRM_DEBUG("Setting FIFO watermarks - A: %d, B: %d, SR %d\n",
@@ -2598,7 +2671,7 @@ static void i965_update_wm(struct drm_device *dev, int planea_clock,
2598 /* Calc sr entries for one plane configs */ 2671 /* Calc sr entries for one plane configs */
2599 if (sr_hdisplay && (!planea_clock || !planeb_clock)) { 2672 if (sr_hdisplay && (!planea_clock || !planeb_clock)) {
2600 /* self-refresh has much higher latency */ 2673 /* self-refresh has much higher latency */
2601 const static int sr_latency_ns = 12000; 2674 static const int sr_latency_ns = 12000;
2602 2675
2603 sr_clock = planea_clock ? planea_clock : planeb_clock; 2676 sr_clock = planea_clock ? planea_clock : planeb_clock;
2604 line_time_us = ((sr_hdisplay * 1000) / sr_clock); 2677 line_time_us = ((sr_hdisplay * 1000) / sr_clock);
@@ -2613,6 +2686,10 @@ static void i965_update_wm(struct drm_device *dev, int planea_clock,
2613 srwm = 1; 2686 srwm = 1;
2614 srwm &= 0x3f; 2687 srwm &= 0x3f;
2615 I915_WRITE(FW_BLC_SELF, FW_BLC_SELF_EN); 2688 I915_WRITE(FW_BLC_SELF, FW_BLC_SELF_EN);
2689 } else {
2690 /* Turn off self refresh if both pipes are enabled */
2691 I915_WRITE(FW_BLC_SELF, I915_READ(FW_BLC_SELF)
2692 & ~FW_BLC_SELF_EN);
2616 } 2693 }
2617 2694
2618 DRM_DEBUG_KMS("Setting FIFO watermarks - A: 8, B: 8, C: 8, SR %d\n", 2695 DRM_DEBUG_KMS("Setting FIFO watermarks - A: 8, B: 8, C: 8, SR %d\n",
@@ -2667,7 +2744,7 @@ static void i9xx_update_wm(struct drm_device *dev, int planea_clock,
2667 if (HAS_FW_BLC(dev) && sr_hdisplay && 2744 if (HAS_FW_BLC(dev) && sr_hdisplay &&
2668 (!planea_clock || !planeb_clock)) { 2745 (!planea_clock || !planeb_clock)) {
2669 /* self-refresh has much higher latency */ 2746 /* self-refresh has much higher latency */
2670 const static int sr_latency_ns = 6000; 2747 static const int sr_latency_ns = 6000;
2671 2748
2672 sr_clock = planea_clock ? planea_clock : planeb_clock; 2749 sr_clock = planea_clock ? planea_clock : planeb_clock;
2673 line_time_us = ((sr_hdisplay * 1000) / sr_clock); 2750 line_time_us = ((sr_hdisplay * 1000) / sr_clock);
@@ -2681,6 +2758,10 @@ static void i9xx_update_wm(struct drm_device *dev, int planea_clock,
2681 if (srwm < 0) 2758 if (srwm < 0)
2682 srwm = 1; 2759 srwm = 1;
2683 I915_WRITE(FW_BLC_SELF, FW_BLC_SELF_EN | (srwm & 0x3f)); 2760 I915_WRITE(FW_BLC_SELF, FW_BLC_SELF_EN | (srwm & 0x3f));
2761 } else {
2762 /* Turn off self refresh if both pipes are enabled */
2763 I915_WRITE(FW_BLC_SELF, I915_READ(FW_BLC_SELF)
2764 & ~FW_BLC_SELF_EN);
2684 } 2765 }
2685 2766
2686 DRM_DEBUG_KMS("Setting FIFO watermarks - A: %d, B: %d, C: %d, SR %d\n", 2767 DRM_DEBUG_KMS("Setting FIFO watermarks - A: %d, B: %d, C: %d, SR %d\n",
@@ -2906,10 +2987,8 @@ static int intel_crtc_mode_set(struct drm_crtc *crtc,
2906 return -EINVAL; 2987 return -EINVAL;
2907 } 2988 }
2908 2989
2909 if (is_lvds && limit->find_reduced_pll && 2990 if (is_lvds && dev_priv->lvds_downclock_avail) {
2910 dev_priv->lvds_downclock_avail) { 2991 has_reduced_clock = limit->find_pll(limit, crtc,
2911 memcpy(&reduced_clock, &clock, sizeof(intel_clock_t));
2912 has_reduced_clock = limit->find_reduced_pll(limit, crtc,
2913 dev_priv->lvds_downclock, 2992 dev_priv->lvds_downclock,
2914 refclk, 2993 refclk,
2915 &reduced_clock); 2994 &reduced_clock);
@@ -2969,6 +3048,33 @@ static int intel_crtc_mode_set(struct drm_crtc *crtc,
2969 3048
2970 /* determine panel color depth */ 3049 /* determine panel color depth */
2971 temp = I915_READ(pipeconf_reg); 3050 temp = I915_READ(pipeconf_reg);
3051 temp &= ~PIPE_BPC_MASK;
3052 if (is_lvds) {
3053 int lvds_reg = I915_READ(PCH_LVDS);
3054 /* the BPC will be 6 if it is 18-bit LVDS panel */
3055 if ((lvds_reg & LVDS_A3_POWER_MASK) == LVDS_A3_POWER_UP)
3056 temp |= PIPE_8BPC;
3057 else
3058 temp |= PIPE_6BPC;
3059 } else if (is_edp) {
3060 switch (dev_priv->edp_bpp/3) {
3061 case 8:
3062 temp |= PIPE_8BPC;
3063 break;
3064 case 10:
3065 temp |= PIPE_10BPC;
3066 break;
3067 case 6:
3068 temp |= PIPE_6BPC;
3069 break;
3070 case 12:
3071 temp |= PIPE_12BPC;
3072 break;
3073 }
3074 } else
3075 temp |= PIPE_8BPC;
3076 I915_WRITE(pipeconf_reg, temp);
3077 I915_READ(pipeconf_reg);
2972 3078
2973 switch (temp & PIPE_BPC_MASK) { 3079 switch (temp & PIPE_BPC_MASK) {
2974 case PIPE_8BPC: 3080 case PIPE_8BPC:
@@ -3195,7 +3301,20 @@ static int intel_crtc_mode_set(struct drm_crtc *crtc,
3195 * appropriately here, but we need to look more thoroughly into how 3301 * appropriately here, but we need to look more thoroughly into how
3196 * panels behave in the two modes. 3302 * panels behave in the two modes.
3197 */ 3303 */
3198 3304 /* set the dithering flag */
3305 if (IS_I965G(dev)) {
3306 if (dev_priv->lvds_dither) {
3307 if (IS_IRONLAKE(dev))
3308 pipeconf |= PIPE_ENABLE_DITHER;
3309 else
3310 lvds |= LVDS_ENABLE_DITHER;
3311 } else {
3312 if (IS_IRONLAKE(dev))
3313 pipeconf &= ~PIPE_ENABLE_DITHER;
3314 else
3315 lvds &= ~LVDS_ENABLE_DITHER;
3316 }
3317 }
3199 I915_WRITE(lvds_reg, lvds); 3318 I915_WRITE(lvds_reg, lvds);
3200 I915_READ(lvds_reg); 3319 I915_READ(lvds_reg);
3201 } 3320 }
@@ -3385,7 +3504,7 @@ static int intel_crtc_cursor_set(struct drm_crtc *crtc,
3385 3504
3386 /* we only need to pin inside GTT if cursor is non-phy */ 3505 /* we only need to pin inside GTT if cursor is non-phy */
3387 mutex_lock(&dev->struct_mutex); 3506 mutex_lock(&dev->struct_mutex);
3388 if (!dev_priv->cursor_needs_physical) { 3507 if (!dev_priv->info->cursor_needs_physical) {
3389 ret = i915_gem_object_pin(bo, PAGE_SIZE); 3508 ret = i915_gem_object_pin(bo, PAGE_SIZE);
3390 if (ret) { 3509 if (ret) {
3391 DRM_ERROR("failed to pin cursor bo\n"); 3510 DRM_ERROR("failed to pin cursor bo\n");
@@ -3420,7 +3539,7 @@ static int intel_crtc_cursor_set(struct drm_crtc *crtc,
3420 I915_WRITE(base, addr); 3539 I915_WRITE(base, addr);
3421 3540
3422 if (intel_crtc->cursor_bo) { 3541 if (intel_crtc->cursor_bo) {
3423 if (dev_priv->cursor_needs_physical) { 3542 if (dev_priv->info->cursor_needs_physical) {
3424 if (intel_crtc->cursor_bo != bo) 3543 if (intel_crtc->cursor_bo != bo)
3425 i915_gem_detach_phys_object(dev, intel_crtc->cursor_bo); 3544 i915_gem_detach_phys_object(dev, intel_crtc->cursor_bo);
3426 } else 3545 } else
@@ -3779,125 +3898,6 @@ static void intel_gpu_idle_timer(unsigned long arg)
3779 queue_work(dev_priv->wq, &dev_priv->idle_work); 3898 queue_work(dev_priv->wq, &dev_priv->idle_work);
3780} 3899}
3781 3900
3782void intel_increase_renderclock(struct drm_device *dev, bool schedule)
3783{
3784 drm_i915_private_t *dev_priv = dev->dev_private;
3785
3786 if (IS_IRONLAKE(dev))
3787 return;
3788
3789 if (!dev_priv->render_reclock_avail) {
3790 DRM_DEBUG_DRIVER("not reclocking render clock\n");
3791 return;
3792 }
3793
3794 /* Restore render clock frequency to original value */
3795 if (IS_G4X(dev) || IS_I9XX(dev))
3796 pci_write_config_word(dev->pdev, GCFGC, dev_priv->orig_clock);
3797 else if (IS_I85X(dev))
3798 pci_write_config_word(dev->pdev, HPLLCC, dev_priv->orig_clock);
3799 DRM_DEBUG_DRIVER("increasing render clock frequency\n");
3800
3801 /* Schedule downclock */
3802 if (schedule)
3803 mod_timer(&dev_priv->idle_timer, jiffies +
3804 msecs_to_jiffies(GPU_IDLE_TIMEOUT));
3805}
3806
3807void intel_decrease_renderclock(struct drm_device *dev)
3808{
3809 drm_i915_private_t *dev_priv = dev->dev_private;
3810
3811 if (IS_IRONLAKE(dev))
3812 return;
3813
3814 if (!dev_priv->render_reclock_avail) {
3815 DRM_DEBUG_DRIVER("not reclocking render clock\n");
3816 return;
3817 }
3818
3819 if (IS_G4X(dev)) {
3820 u16 gcfgc;
3821
3822 /* Adjust render clock... */
3823 pci_read_config_word(dev->pdev, GCFGC, &gcfgc);
3824
3825 /* Down to minimum... */
3826 gcfgc &= ~GM45_GC_RENDER_CLOCK_MASK;
3827 gcfgc |= GM45_GC_RENDER_CLOCK_266_MHZ;
3828
3829 pci_write_config_word(dev->pdev, GCFGC, gcfgc);
3830 } else if (IS_I965G(dev)) {
3831 u16 gcfgc;
3832
3833 /* Adjust render clock... */
3834 pci_read_config_word(dev->pdev, GCFGC, &gcfgc);
3835
3836 /* Down to minimum... */
3837 gcfgc &= ~I965_GC_RENDER_CLOCK_MASK;
3838 gcfgc |= I965_GC_RENDER_CLOCK_267_MHZ;
3839
3840 pci_write_config_word(dev->pdev, GCFGC, gcfgc);
3841 } else if (IS_I945G(dev) || IS_I945GM(dev)) {
3842 u16 gcfgc;
3843
3844 /* Adjust render clock... */
3845 pci_read_config_word(dev->pdev, GCFGC, &gcfgc);
3846
3847 /* Down to minimum... */
3848 gcfgc &= ~I945_GC_RENDER_CLOCK_MASK;
3849 gcfgc |= I945_GC_RENDER_CLOCK_166_MHZ;
3850
3851 pci_write_config_word(dev->pdev, GCFGC, gcfgc);
3852 } else if (IS_I915G(dev)) {
3853 u16 gcfgc;
3854
3855 /* Adjust render clock... */
3856 pci_read_config_word(dev->pdev, GCFGC, &gcfgc);
3857
3858 /* Down to minimum... */
3859 gcfgc &= ~I915_GC_RENDER_CLOCK_MASK;
3860 gcfgc |= I915_GC_RENDER_CLOCK_166_MHZ;
3861
3862 pci_write_config_word(dev->pdev, GCFGC, gcfgc);
3863 } else if (IS_I85X(dev)) {
3864 u16 hpllcc;
3865
3866 /* Adjust render clock... */
3867 pci_read_config_word(dev->pdev, HPLLCC, &hpllcc);
3868
3869 /* Up to maximum... */
3870 hpllcc &= ~GC_CLOCK_CONTROL_MASK;
3871 hpllcc |= GC_CLOCK_133_200;
3872
3873 pci_write_config_word(dev->pdev, HPLLCC, hpllcc);
3874 }
3875 DRM_DEBUG_DRIVER("decreasing render clock frequency\n");
3876}
3877
3878/* Note that no increase function is needed for this - increase_renderclock()
3879 * will also rewrite these bits
3880 */
3881void intel_decrease_displayclock(struct drm_device *dev)
3882{
3883 if (IS_IRONLAKE(dev))
3884 return;
3885
3886 if (IS_I945G(dev) || IS_I945GM(dev) || IS_I915G(dev) ||
3887 IS_I915GM(dev)) {
3888 u16 gcfgc;
3889
3890 /* Adjust render clock... */
3891 pci_read_config_word(dev->pdev, GCFGC, &gcfgc);
3892
3893 /* Down to minimum... */
3894 gcfgc &= ~0xf0;
3895 gcfgc |= 0x80;
3896
3897 pci_write_config_word(dev->pdev, GCFGC, gcfgc);
3898 }
3899}
3900
3901#define CRTC_IDLE_TIMEOUT 1000 /* ms */ 3901#define CRTC_IDLE_TIMEOUT 1000 /* ms */
3902 3902
3903static void intel_crtc_idle_timer(unsigned long arg) 3903static void intel_crtc_idle_timer(unsigned long arg)
@@ -4011,12 +4011,6 @@ static void intel_idle_update(struct work_struct *work)
4011 4011
4012 mutex_lock(&dev->struct_mutex); 4012 mutex_lock(&dev->struct_mutex);
4013 4013
4014 /* GPU isn't processing, downclock it. */
4015 if (!dev_priv->busy) {
4016 intel_decrease_renderclock(dev);
4017 intel_decrease_displayclock(dev);
4018 }
4019
4020 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { 4014 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
4021 /* Skip inactive CRTCs */ 4015 /* Skip inactive CRTCs */
4022 if (!crtc->fb) 4016 if (!crtc->fb)
@@ -4050,13 +4044,11 @@ void intel_mark_busy(struct drm_device *dev, struct drm_gem_object *obj)
4050 if (!drm_core_check_feature(dev, DRIVER_MODESET)) 4044 if (!drm_core_check_feature(dev, DRIVER_MODESET))
4051 return; 4045 return;
4052 4046
4053 if (!dev_priv->busy) { 4047 if (!dev_priv->busy)
4054 dev_priv->busy = true; 4048 dev_priv->busy = true;
4055 intel_increase_renderclock(dev, true); 4049 else
4056 } else {
4057 mod_timer(&dev_priv->idle_timer, jiffies + 4050 mod_timer(&dev_priv->idle_timer, jiffies +
4058 msecs_to_jiffies(GPU_IDLE_TIMEOUT)); 4051 msecs_to_jiffies(GPU_IDLE_TIMEOUT));
4059 }
4060 4052
4061 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { 4053 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
4062 if (!crtc->fb) 4054 if (!crtc->fb)
@@ -4089,7 +4081,8 @@ static void intel_crtc_destroy(struct drm_crtc *crtc)
4089struct intel_unpin_work { 4081struct intel_unpin_work {
4090 struct work_struct work; 4082 struct work_struct work;
4091 struct drm_device *dev; 4083 struct drm_device *dev;
4092 struct drm_gem_object *obj; 4084 struct drm_gem_object *old_fb_obj;
4085 struct drm_gem_object *pending_flip_obj;
4093 struct drm_pending_vblank_event *event; 4086 struct drm_pending_vblank_event *event;
4094 int pending; 4087 int pending;
4095}; 4088};
@@ -4100,8 +4093,9 @@ static void intel_unpin_work_fn(struct work_struct *__work)
4100 container_of(__work, struct intel_unpin_work, work); 4093 container_of(__work, struct intel_unpin_work, work);
4101 4094
4102 mutex_lock(&work->dev->struct_mutex); 4095 mutex_lock(&work->dev->struct_mutex);
4103 i915_gem_object_unpin(work->obj); 4096 i915_gem_object_unpin(work->old_fb_obj);
4104 drm_gem_object_unreference(work->obj); 4097 drm_gem_object_unreference(work->pending_flip_obj);
4098 drm_gem_object_unreference(work->old_fb_obj);
4105 mutex_unlock(&work->dev->struct_mutex); 4099 mutex_unlock(&work->dev->struct_mutex);
4106 kfree(work); 4100 kfree(work);
4107} 4101}
@@ -4124,6 +4118,12 @@ void intel_finish_page_flip(struct drm_device *dev, int pipe)
4124 spin_lock_irqsave(&dev->event_lock, flags); 4118 spin_lock_irqsave(&dev->event_lock, flags);
4125 work = intel_crtc->unpin_work; 4119 work = intel_crtc->unpin_work;
4126 if (work == NULL || !work->pending) { 4120 if (work == NULL || !work->pending) {
4121 if (work && !work->pending) {
4122 obj_priv = work->pending_flip_obj->driver_private;
4123 DRM_DEBUG_DRIVER("flip finish: %p (%d) not pending?\n",
4124 obj_priv,
4125 atomic_read(&obj_priv->pending_flip));
4126 }
4127 spin_unlock_irqrestore(&dev->event_lock, flags); 4127 spin_unlock_irqrestore(&dev->event_lock, flags);
4128 return; 4128 return;
4129 } 4129 }
@@ -4144,8 +4144,11 @@ void intel_finish_page_flip(struct drm_device *dev, int pipe)
4144 4144
4145 spin_unlock_irqrestore(&dev->event_lock, flags); 4145 spin_unlock_irqrestore(&dev->event_lock, flags);
4146 4146
4147 obj_priv = work->obj->driver_private; 4147 obj_priv = work->pending_flip_obj->driver_private;
4148 if (atomic_dec_and_test(&obj_priv->pending_flip)) 4148
4149 /* Initial scanout buffer will have a 0 pending flip count */
4150 if ((atomic_read(&obj_priv->pending_flip) == 0) ||
4151 atomic_dec_and_test(&obj_priv->pending_flip))
4149 DRM_WAKEUP(&dev_priv->pending_flip_queue); 4152 DRM_WAKEUP(&dev_priv->pending_flip_queue);
4150 schedule_work(&work->work); 4153 schedule_work(&work->work);
4151} 4154}
@@ -4158,8 +4161,11 @@ void intel_prepare_page_flip(struct drm_device *dev, int plane)
4158 unsigned long flags; 4161 unsigned long flags;
4159 4162
4160 spin_lock_irqsave(&dev->event_lock, flags); 4163 spin_lock_irqsave(&dev->event_lock, flags);
4161 if (intel_crtc->unpin_work) 4164 if (intel_crtc->unpin_work) {
4162 intel_crtc->unpin_work->pending = 1; 4165 intel_crtc->unpin_work->pending = 1;
4166 } else {
4167 DRM_DEBUG_DRIVER("preparing flip with no unpin work?\n");
4168 }
4163 spin_unlock_irqrestore(&dev->event_lock, flags); 4169 spin_unlock_irqrestore(&dev->event_lock, flags);
4164} 4170}
4165 4171
@@ -4175,7 +4181,8 @@ static int intel_crtc_page_flip(struct drm_crtc *crtc,
4175 struct intel_crtc *intel_crtc = to_intel_crtc(crtc); 4181 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
4176 struct intel_unpin_work *work; 4182 struct intel_unpin_work *work;
4177 unsigned long flags; 4183 unsigned long flags;
4178 int ret; 4184 int pipesrc_reg = (intel_crtc->pipe == 0) ? PIPEASRC : PIPEBSRC;
4185 int ret, pipesrc;
4179 RING_LOCALS; 4186 RING_LOCALS;
4180 4187
4181 work = kzalloc(sizeof *work, GFP_KERNEL); 4188 work = kzalloc(sizeof *work, GFP_KERNEL);
@@ -4187,12 +4194,13 @@ static int intel_crtc_page_flip(struct drm_crtc *crtc,
4187 work->event = event; 4194 work->event = event;
4188 work->dev = crtc->dev; 4195 work->dev = crtc->dev;
4189 intel_fb = to_intel_framebuffer(crtc->fb); 4196 intel_fb = to_intel_framebuffer(crtc->fb);
4190 work->obj = intel_fb->obj; 4197 work->old_fb_obj = intel_fb->obj;
4191 INIT_WORK(&work->work, intel_unpin_work_fn); 4198 INIT_WORK(&work->work, intel_unpin_work_fn);
4192 4199
4193 /* We borrow the event spin lock for protecting unpin_work */ 4200 /* We borrow the event spin lock for protecting unpin_work */
4194 spin_lock_irqsave(&dev->event_lock, flags); 4201 spin_lock_irqsave(&dev->event_lock, flags);
4195 if (intel_crtc->unpin_work) { 4202 if (intel_crtc->unpin_work) {
4203 DRM_DEBUG_DRIVER("flip queue: crtc already busy\n");
4196 spin_unlock_irqrestore(&dev->event_lock, flags); 4204 spin_unlock_irqrestore(&dev->event_lock, flags);
4197 kfree(work); 4205 kfree(work);
4198 mutex_unlock(&dev->struct_mutex); 4206 mutex_unlock(&dev->struct_mutex);
@@ -4206,19 +4214,24 @@ static int intel_crtc_page_flip(struct drm_crtc *crtc,
4206 4214
4207 ret = intel_pin_and_fence_fb_obj(dev, obj); 4215 ret = intel_pin_and_fence_fb_obj(dev, obj);
4208 if (ret != 0) { 4216 if (ret != 0) {
4217 DRM_DEBUG_DRIVER("flip queue: %p pin & fence failed\n",
4218 obj->driver_private);
4209 kfree(work); 4219 kfree(work);
4220 intel_crtc->unpin_work = NULL;
4210 mutex_unlock(&dev->struct_mutex); 4221 mutex_unlock(&dev->struct_mutex);
4211 return ret; 4222 return ret;
4212 } 4223 }
4213 4224
4214 /* Reference the old fb object for the scheduled work. */ 4225 /* Reference the objects for the scheduled work. */
4215 drm_gem_object_reference(work->obj); 4226 drm_gem_object_reference(work->old_fb_obj);
4227 drm_gem_object_reference(obj);
4216 4228
4217 crtc->fb = fb; 4229 crtc->fb = fb;
4218 i915_gem_object_flush_write_domain(obj); 4230 i915_gem_object_flush_write_domain(obj);
4219 drm_vblank_get(dev, intel_crtc->pipe); 4231 drm_vblank_get(dev, intel_crtc->pipe);
4220 obj_priv = obj->driver_private; 4232 obj_priv = obj->driver_private;
4221 atomic_inc(&obj_priv->pending_flip); 4233 atomic_inc(&obj_priv->pending_flip);
4234 work->pending_flip_obj = obj;
4222 4235
4223 BEGIN_LP_RING(4); 4236 BEGIN_LP_RING(4);
4224 OUT_RING(MI_DISPLAY_FLIP | 4237 OUT_RING(MI_DISPLAY_FLIP |
@@ -4226,7 +4239,8 @@ static int intel_crtc_page_flip(struct drm_crtc *crtc,
4226 OUT_RING(fb->pitch); 4239 OUT_RING(fb->pitch);
4227 if (IS_I965G(dev)) { 4240 if (IS_I965G(dev)) {
4228 OUT_RING(obj_priv->gtt_offset | obj_priv->tiling_mode); 4241 OUT_RING(obj_priv->gtt_offset | obj_priv->tiling_mode);
4229 OUT_RING((fb->width << 16) | fb->height); 4242 pipesrc = I915_READ(pipesrc_reg);
4243 OUT_RING(pipesrc & 0x0fff0fff);
4230 } else { 4244 } else {
4231 OUT_RING(obj_priv->gtt_offset); 4245 OUT_RING(obj_priv->gtt_offset);
4232 OUT_RING(MI_NOOP); 4246 OUT_RING(MI_NOOP);
@@ -4400,29 +4414,43 @@ static void intel_setup_outputs(struct drm_device *dev)
4400 bool found = false; 4414 bool found = false;
4401 4415
4402 if (I915_READ(SDVOB) & SDVO_DETECTED) { 4416 if (I915_READ(SDVOB) & SDVO_DETECTED) {
4417 DRM_DEBUG_KMS("probing SDVOB\n");
4403 found = intel_sdvo_init(dev, SDVOB); 4418 found = intel_sdvo_init(dev, SDVOB);
4404 if (!found && SUPPORTS_INTEGRATED_HDMI(dev)) 4419 if (!found && SUPPORTS_INTEGRATED_HDMI(dev)) {
4420 DRM_DEBUG_KMS("probing HDMI on SDVOB\n");
4405 intel_hdmi_init(dev, SDVOB); 4421 intel_hdmi_init(dev, SDVOB);
4422 }
4406 4423
4407 if (!found && SUPPORTS_INTEGRATED_DP(dev)) 4424 if (!found && SUPPORTS_INTEGRATED_DP(dev)) {
4425 DRM_DEBUG_KMS("probing DP_B\n");
4408 intel_dp_init(dev, DP_B); 4426 intel_dp_init(dev, DP_B);
4427 }
4409 } 4428 }
4410 4429
4411 /* Before G4X SDVOC doesn't have its own detect register */ 4430 /* Before G4X SDVOC doesn't have its own detect register */
4412 4431
4413 if (I915_READ(SDVOB) & SDVO_DETECTED) 4432 if (I915_READ(SDVOB) & SDVO_DETECTED) {
4433 DRM_DEBUG_KMS("probing SDVOC\n");
4414 found = intel_sdvo_init(dev, SDVOC); 4434 found = intel_sdvo_init(dev, SDVOC);
4435 }
4415 4436
4416 if (!found && (I915_READ(SDVOC) & SDVO_DETECTED)) { 4437 if (!found && (I915_READ(SDVOC) & SDVO_DETECTED)) {
4417 4438
4418 if (SUPPORTS_INTEGRATED_HDMI(dev)) 4439 if (SUPPORTS_INTEGRATED_HDMI(dev)) {
4440 DRM_DEBUG_KMS("probing HDMI on SDVOC\n");
4419 intel_hdmi_init(dev, SDVOC); 4441 intel_hdmi_init(dev, SDVOC);
4420 if (SUPPORTS_INTEGRATED_DP(dev)) 4442 }
4443 if (SUPPORTS_INTEGRATED_DP(dev)) {
4444 DRM_DEBUG_KMS("probing DP_C\n");
4421 intel_dp_init(dev, DP_C); 4445 intel_dp_init(dev, DP_C);
4446 }
4422 } 4447 }
4423 4448
4424 if (SUPPORTS_INTEGRATED_DP(dev) && (I915_READ(DP_D) & DP_DETECTED)) 4449 if (SUPPORTS_INTEGRATED_DP(dev) &&
4450 (I915_READ(DP_D) & DP_DETECTED)) {
4451 DRM_DEBUG_KMS("probing DP_D\n");
4425 intel_dp_init(dev, DP_D); 4452 intel_dp_init(dev, DP_D);
4453 }
4426 } else if (IS_I8XX(dev)) 4454 } else if (IS_I8XX(dev))
4427 intel_dvo_init(dev); 4455 intel_dvo_init(dev);
4428 4456
@@ -4527,6 +4555,42 @@ static const struct drm_mode_config_funcs intel_mode_funcs = {
4527 .fb_changed = intelfb_probe, 4555 .fb_changed = intelfb_probe,
4528}; 4556};
4529 4557
4558static struct drm_gem_object *
4559intel_alloc_power_context(struct drm_device *dev)
4560{
4561 struct drm_gem_object *pwrctx;
4562 int ret;
4563
4564 pwrctx = drm_gem_object_alloc(dev, 4096);
4565 if (!pwrctx) {
4566 DRM_DEBUG("failed to alloc power context, RC6 disabled\n");
4567 return NULL;
4568 }
4569
4570 mutex_lock(&dev->struct_mutex);
4571 ret = i915_gem_object_pin(pwrctx, 4096);
4572 if (ret) {
4573 DRM_ERROR("failed to pin power context: %d\n", ret);
4574 goto err_unref;
4575 }
4576
4577 ret = i915_gem_object_set_to_gtt_domain(pwrctx, 1);
4578 if (ret) {
4579 DRM_ERROR("failed to set-domain on power context: %d\n", ret);
4580 goto err_unpin;
4581 }
4582 mutex_unlock(&dev->struct_mutex);
4583
4584 return pwrctx;
4585
4586err_unpin:
4587 i915_gem_object_unpin(pwrctx);
4588err_unref:
4589 drm_gem_object_unreference(pwrctx);
4590 mutex_unlock(&dev->struct_mutex);
4591 return NULL;
4592}
4593
4530void intel_init_clock_gating(struct drm_device *dev) 4594void intel_init_clock_gating(struct drm_device *dev)
4531{ 4595{
4532 struct drm_i915_private *dev_priv = dev->dev_private; 4596 struct drm_i915_private *dev_priv = dev->dev_private;
@@ -4579,42 +4643,27 @@ void intel_init_clock_gating(struct drm_device *dev)
4579 * GPU can automatically power down the render unit if given a page 4643 * GPU can automatically power down the render unit if given a page
4580 * to save state. 4644 * to save state.
4581 */ 4645 */
4582 if (I915_HAS_RC6(dev)) { 4646 if (I915_HAS_RC6(dev) && drm_core_check_feature(dev, DRIVER_MODESET)) {
4583 struct drm_gem_object *pwrctx; 4647 struct drm_i915_gem_object *obj_priv = NULL;
4584 struct drm_i915_gem_object *obj_priv;
4585 int ret;
4586 4648
4587 if (dev_priv->pwrctx) { 4649 if (dev_priv->pwrctx) {
4588 obj_priv = dev_priv->pwrctx->driver_private; 4650 obj_priv = dev_priv->pwrctx->driver_private;
4589 } else { 4651 } else {
4590 pwrctx = drm_gem_object_alloc(dev, 4096); 4652 struct drm_gem_object *pwrctx;
4591 if (!pwrctx) {
4592 DRM_DEBUG("failed to alloc power context, "
4593 "RC6 disabled\n");
4594 goto out;
4595 }
4596 4653
4597 ret = i915_gem_object_pin(pwrctx, 4096); 4654 pwrctx = intel_alloc_power_context(dev);
4598 if (ret) { 4655 if (pwrctx) {
4599 DRM_ERROR("failed to pin power context: %d\n", 4656 dev_priv->pwrctx = pwrctx;
4600 ret); 4657 obj_priv = pwrctx->driver_private;
4601 drm_gem_object_unreference(pwrctx);
4602 goto out;
4603 } 4658 }
4604
4605 i915_gem_object_set_to_gtt_domain(pwrctx, 1);
4606
4607 dev_priv->pwrctx = pwrctx;
4608 obj_priv = pwrctx->driver_private;
4609 } 4659 }
4610 4660
4611 I915_WRITE(PWRCTXA, obj_priv->gtt_offset | PWRCTX_EN); 4661 if (obj_priv) {
4612 I915_WRITE(MCHBAR_RENDER_STANDBY, 4662 I915_WRITE(PWRCTXA, obj_priv->gtt_offset | PWRCTX_EN);
4613 I915_READ(MCHBAR_RENDER_STANDBY) & ~RCX_SW_EXIT); 4663 I915_WRITE(MCHBAR_RENDER_STANDBY,
4664 I915_READ(MCHBAR_RENDER_STANDBY) & ~RCX_SW_EXIT);
4665 }
4614 } 4666 }
4615
4616out:
4617 return;
4618} 4667}
4619 4668
4620/* Set up chip specific display functions */ 4669/* Set up chip specific display functions */
@@ -4770,7 +4819,6 @@ void intel_modeset_cleanup(struct drm_device *dev)
4770 del_timer_sync(&intel_crtc->idle_timer); 4819 del_timer_sync(&intel_crtc->idle_timer);
4771 } 4820 }
4772 4821
4773 intel_increase_renderclock(dev, false);
4774 del_timer_sync(&dev_priv->idle_timer); 4822 del_timer_sync(&dev_priv->idle_timer);
4775 4823
4776 if (dev_priv->display.disable_fbc) 4824 if (dev_priv->display.disable_fbc)
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 4e7aa8b7b938..439506cefc14 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -125,9 +125,15 @@ intel_dp_link_clock(uint8_t link_bw)
125 125
126/* I think this is a fiction */ 126/* I think this is a fiction */
127static int 127static int
128intel_dp_link_required(int pixel_clock) 128intel_dp_link_required(struct drm_device *dev,
129 struct intel_output *intel_output, int pixel_clock)
129{ 130{
130 return pixel_clock * 3; 131 struct drm_i915_private *dev_priv = dev->dev_private;
132
133 if (IS_eDP(intel_output))
134 return (pixel_clock * dev_priv->edp_bpp) / 8;
135 else
136 return pixel_clock * 3;
131} 137}
132 138
133static int 139static int
@@ -138,7 +144,8 @@ intel_dp_mode_valid(struct drm_connector *connector,
138 int max_link_clock = intel_dp_link_clock(intel_dp_max_link_bw(intel_output)); 144 int max_link_clock = intel_dp_link_clock(intel_dp_max_link_bw(intel_output));
139 int max_lanes = intel_dp_max_lane_count(intel_output); 145 int max_lanes = intel_dp_max_lane_count(intel_output);
140 146
141 if (intel_dp_link_required(mode->clock) > max_link_clock * max_lanes) 147 if (intel_dp_link_required(connector->dev, intel_output, mode->clock)
148 > max_link_clock * max_lanes)
142 return MODE_CLOCK_HIGH; 149 return MODE_CLOCK_HIGH;
143 150
144 if (mode->clock < 10000) 151 if (mode->clock < 10000)
@@ -492,7 +499,8 @@ intel_dp_mode_fixup(struct drm_encoder *encoder, struct drm_display_mode *mode,
492 for (clock = 0; clock <= max_clock; clock++) { 499 for (clock = 0; clock <= max_clock; clock++) {
493 int link_avail = intel_dp_link_clock(bws[clock]) * lane_count; 500 int link_avail = intel_dp_link_clock(bws[clock]) * lane_count;
494 501
495 if (intel_dp_link_required(mode->clock) <= link_avail) { 502 if (intel_dp_link_required(encoder->dev, intel_output, mode->clock)
503 <= link_avail) {
496 dp_priv->link_bw = bws[clock]; 504 dp_priv->link_bw = bws[clock];
497 dp_priv->lane_count = lane_count; 505 dp_priv->lane_count = lane_count;
498 adjusted_mode->clock = intel_dp_link_clock(dp_priv->link_bw); 506 adjusted_mode->clock = intel_dp_link_clock(dp_priv->link_bw);
@@ -1289,53 +1297,7 @@ intel_dp_hot_plug(struct intel_output *intel_output)
1289 if (dp_priv->dpms_mode == DRM_MODE_DPMS_ON) 1297 if (dp_priv->dpms_mode == DRM_MODE_DPMS_ON)
1290 intel_dp_check_link_status(intel_output); 1298 intel_dp_check_link_status(intel_output);
1291} 1299}
1292/* 1300
1293 * Enumerate the child dev array parsed from VBT to check whether
1294 * the given DP is present.
1295 * If it is present, return 1.
1296 * If it is not present, return false.
1297 * If no child dev is parsed from VBT, it is assumed that the given
1298 * DP is present.
1299 */
1300static int dp_is_present_in_vbt(struct drm_device *dev, int dp_reg)
1301{
1302 struct drm_i915_private *dev_priv = dev->dev_private;
1303 struct child_device_config *p_child;
1304 int i, dp_port, ret;
1305
1306 if (!dev_priv->child_dev_num)
1307 return 1;
1308
1309 dp_port = 0;
1310 if (dp_reg == DP_B || dp_reg == PCH_DP_B)
1311 dp_port = PORT_IDPB;
1312 else if (dp_reg == DP_C || dp_reg == PCH_DP_C)
1313 dp_port = PORT_IDPC;
1314 else if (dp_reg == DP_D || dp_reg == PCH_DP_D)
1315 dp_port = PORT_IDPD;
1316
1317 ret = 0;
1318 for (i = 0; i < dev_priv->child_dev_num; i++) {
1319 p_child = dev_priv->child_dev + i;
1320 /*
1321 * If the device type is not DP, continue.
1322 */
1323 if (p_child->device_type != DEVICE_TYPE_DP &&
1324 p_child->device_type != DEVICE_TYPE_eDP)
1325 continue;
1326 /* Find the eDP port */
1327 if (dp_reg == DP_A && p_child->device_type == DEVICE_TYPE_eDP) {
1328 ret = 1;
1329 break;
1330 }
1331 /* Find the DP port */
1332 if (p_child->dvo_port == dp_port) {
1333 ret = 1;
1334 break;
1335 }
1336 }
1337 return ret;
1338}
1339void 1301void
1340intel_dp_init(struct drm_device *dev, int output_reg) 1302intel_dp_init(struct drm_device *dev, int output_reg)
1341{ 1303{
@@ -1345,10 +1307,6 @@ intel_dp_init(struct drm_device *dev, int output_reg)
1345 struct intel_dp_priv *dp_priv; 1307 struct intel_dp_priv *dp_priv;
1346 const char *name = NULL; 1308 const char *name = NULL;
1347 1309
1348 if (!dp_is_present_in_vbt(dev, output_reg)) {
1349 DRM_DEBUG_KMS("DP is not present. Ignore it\n");
1350 return;
1351 }
1352 intel_output = kcalloc(sizeof(struct intel_output) + 1310 intel_output = kcalloc(sizeof(struct intel_output) +
1353 sizeof(struct intel_dp_priv), 1, GFP_KERNEL); 1311 sizeof(struct intel_dp_priv), 1, GFP_KERNEL);
1354 if (!intel_output) 1312 if (!intel_output)
@@ -1373,11 +1331,10 @@ intel_dp_init(struct drm_device *dev, int output_reg)
1373 else if (output_reg == DP_D || output_reg == PCH_DP_D) 1331 else if (output_reg == DP_D || output_reg == PCH_DP_D)
1374 intel_output->clone_mask = (1 << INTEL_DP_D_CLONE_BIT); 1332 intel_output->clone_mask = (1 << INTEL_DP_D_CLONE_BIT);
1375 1333
1376 if (IS_eDP(intel_output)) { 1334 if (IS_eDP(intel_output))
1377 intel_output->crtc_mask = (1 << 1);
1378 intel_output->clone_mask = (1 << INTEL_EDP_CLONE_BIT); 1335 intel_output->clone_mask = (1 << INTEL_EDP_CLONE_BIT);
1379 } else 1336
1380 intel_output->crtc_mask = (1 << 0) | (1 << 1); 1337 intel_output->crtc_mask = (1 << 0) | (1 << 1);
1381 connector->interlace_allowed = true; 1338 connector->interlace_allowed = true;
1382 connector->doublescan_allowed = 0; 1339 connector->doublescan_allowed = 0;
1383 1340
@@ -1402,14 +1359,20 @@ intel_dp_init(struct drm_device *dev, int output_reg)
1402 break; 1359 break;
1403 case DP_B: 1360 case DP_B:
1404 case PCH_DP_B: 1361 case PCH_DP_B:
1362 dev_priv->hotplug_supported_mask |=
1363 HDMIB_HOTPLUG_INT_STATUS;
1405 name = "DPDDC-B"; 1364 name = "DPDDC-B";
1406 break; 1365 break;
1407 case DP_C: 1366 case DP_C:
1408 case PCH_DP_C: 1367 case PCH_DP_C:
1368 dev_priv->hotplug_supported_mask |=
1369 HDMIC_HOTPLUG_INT_STATUS;
1409 name = "DPDDC-C"; 1370 name = "DPDDC-C";
1410 break; 1371 break;
1411 case DP_D: 1372 case DP_D:
1412 case PCH_DP_D: 1373 case PCH_DP_D:
1374 dev_priv->hotplug_supported_mask |=
1375 HDMID_HOTPLUG_INT_STATUS;
1413 name = "DPDDC-D"; 1376 name = "DPDDC-D";
1414 break; 1377 break;
1415 } 1378 }
diff --git a/drivers/gpu/drm/i915/intel_fb.c b/drivers/gpu/drm/i915/intel_fb.c
index 371d753e362b..aaabbcbe5905 100644
--- a/drivers/gpu/drm/i915/intel_fb.c
+++ b/drivers/gpu/drm/i915/intel_fb.c
@@ -148,7 +148,7 @@ static int intelfb_create(struct drm_device *dev, uint32_t fb_width,
148 148
149 mutex_lock(&dev->struct_mutex); 149 mutex_lock(&dev->struct_mutex);
150 150
151 ret = i915_gem_object_pin(fbo, PAGE_SIZE); 151 ret = i915_gem_object_pin(fbo, 64*1024);
152 if (ret) { 152 if (ret) {
153 DRM_ERROR("failed to pin fb: %d\n", ret); 153 DRM_ERROR("failed to pin fb: %d\n", ret);
154 goto out_unref; 154 goto out_unref;
diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c
index f04dbbe7d400..0e268deed761 100644
--- a/drivers/gpu/drm/i915/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/intel_hdmi.c
@@ -225,52 +225,6 @@ static const struct drm_encoder_funcs intel_hdmi_enc_funcs = {
225 .destroy = intel_hdmi_enc_destroy, 225 .destroy = intel_hdmi_enc_destroy,
226}; 226};
227 227
228/*
229 * Enumerate the child dev array parsed from VBT to check whether
230 * the given HDMI is present.
231 * If it is present, return 1.
232 * If it is not present, return false.
233 * If no child dev is parsed from VBT, it assumes that the given
234 * HDMI is present.
235 */
236static int hdmi_is_present_in_vbt(struct drm_device *dev, int hdmi_reg)
237{
238 struct drm_i915_private *dev_priv = dev->dev_private;
239 struct child_device_config *p_child;
240 int i, hdmi_port, ret;
241
242 if (!dev_priv->child_dev_num)
243 return 1;
244
245 if (hdmi_reg == SDVOB)
246 hdmi_port = DVO_B;
247 else if (hdmi_reg == SDVOC)
248 hdmi_port = DVO_C;
249 else if (hdmi_reg == HDMIB)
250 hdmi_port = DVO_B;
251 else if (hdmi_reg == HDMIC)
252 hdmi_port = DVO_C;
253 else if (hdmi_reg == HDMID)
254 hdmi_port = DVO_D;
255 else
256 return 0;
257
258 ret = 0;
259 for (i = 0; i < dev_priv->child_dev_num; i++) {
260 p_child = dev_priv->child_dev + i;
261 /*
262 * If the device type is not HDMI, continue.
263 */
264 if (p_child->device_type != DEVICE_TYPE_HDMI)
265 continue;
266 /* Find the HDMI port */
267 if (p_child->dvo_port == hdmi_port) {
268 ret = 1;
269 break;
270 }
271 }
272 return ret;
273}
274void intel_hdmi_init(struct drm_device *dev, int sdvox_reg) 228void intel_hdmi_init(struct drm_device *dev, int sdvox_reg)
275{ 229{
276 struct drm_i915_private *dev_priv = dev->dev_private; 230 struct drm_i915_private *dev_priv = dev->dev_private;
@@ -278,10 +232,6 @@ void intel_hdmi_init(struct drm_device *dev, int sdvox_reg)
278 struct intel_output *intel_output; 232 struct intel_output *intel_output;
279 struct intel_hdmi_priv *hdmi_priv; 233 struct intel_hdmi_priv *hdmi_priv;
280 234
281 if (!hdmi_is_present_in_vbt(dev, sdvox_reg)) {
282 DRM_DEBUG_KMS("HDMI is not present. Ignored it \n");
283 return;
284 }
285 intel_output = kcalloc(sizeof(struct intel_output) + 235 intel_output = kcalloc(sizeof(struct intel_output) +
286 sizeof(struct intel_hdmi_priv), 1, GFP_KERNEL); 236 sizeof(struct intel_hdmi_priv), 1, GFP_KERNEL);
287 if (!intel_output) 237 if (!intel_output)
@@ -303,21 +253,26 @@ void intel_hdmi_init(struct drm_device *dev, int sdvox_reg)
303 if (sdvox_reg == SDVOB) { 253 if (sdvox_reg == SDVOB) {
304 intel_output->clone_mask = (1 << INTEL_HDMIB_CLONE_BIT); 254 intel_output->clone_mask = (1 << INTEL_HDMIB_CLONE_BIT);
305 intel_output->ddc_bus = intel_i2c_create(dev, GPIOE, "HDMIB"); 255 intel_output->ddc_bus = intel_i2c_create(dev, GPIOE, "HDMIB");
256 dev_priv->hotplug_supported_mask |= HDMIB_HOTPLUG_INT_STATUS;
306 } else if (sdvox_reg == SDVOC) { 257 } else if (sdvox_reg == SDVOC) {
307 intel_output->clone_mask = (1 << INTEL_HDMIC_CLONE_BIT); 258 intel_output->clone_mask = (1 << INTEL_HDMIC_CLONE_BIT);
308 intel_output->ddc_bus = intel_i2c_create(dev, GPIOD, "HDMIC"); 259 intel_output->ddc_bus = intel_i2c_create(dev, GPIOD, "HDMIC");
260 dev_priv->hotplug_supported_mask |= HDMIC_HOTPLUG_INT_STATUS;
309 } else if (sdvox_reg == HDMIB) { 261 } else if (sdvox_reg == HDMIB) {
310 intel_output->clone_mask = (1 << INTEL_HDMID_CLONE_BIT); 262 intel_output->clone_mask = (1 << INTEL_HDMID_CLONE_BIT);
311 intel_output->ddc_bus = intel_i2c_create(dev, PCH_GPIOE, 263 intel_output->ddc_bus = intel_i2c_create(dev, PCH_GPIOE,
312 "HDMIB"); 264 "HDMIB");
265 dev_priv->hotplug_supported_mask |= HDMIB_HOTPLUG_INT_STATUS;
313 } else if (sdvox_reg == HDMIC) { 266 } else if (sdvox_reg == HDMIC) {
314 intel_output->clone_mask = (1 << INTEL_HDMIE_CLONE_BIT); 267 intel_output->clone_mask = (1 << INTEL_HDMIE_CLONE_BIT);
315 intel_output->ddc_bus = intel_i2c_create(dev, PCH_GPIOD, 268 intel_output->ddc_bus = intel_i2c_create(dev, PCH_GPIOD,
316 "HDMIC"); 269 "HDMIC");
270 dev_priv->hotplug_supported_mask |= HDMIC_HOTPLUG_INT_STATUS;
317 } else if (sdvox_reg == HDMID) { 271 } else if (sdvox_reg == HDMID) {
318 intel_output->clone_mask = (1 << INTEL_HDMIF_CLONE_BIT); 272 intel_output->clone_mask = (1 << INTEL_HDMIF_CLONE_BIT);
319 intel_output->ddc_bus = intel_i2c_create(dev, PCH_GPIOF, 273 intel_output->ddc_bus = intel_i2c_create(dev, PCH_GPIOF,
320 "HDMID"); 274 "HDMID");
275 dev_priv->hotplug_supported_mask |= HDMID_HOTPLUG_INT_STATUS;
321 } 276 }
322 if (!intel_output->ddc_bus) 277 if (!intel_output->ddc_bus)
323 goto err_connector; 278 goto err_connector;
diff --git a/drivers/gpu/drm/i915/intel_lvds.c b/drivers/gpu/drm/i915/intel_lvds.c
index 3118ce274e67..c2e8a45780d5 100644
--- a/drivers/gpu/drm/i915/intel_lvds.c
+++ b/drivers/gpu/drm/i915/intel_lvds.c
@@ -602,12 +602,47 @@ static void intel_lvds_mode_set(struct drm_encoder *encoder,
602/* Some lid devices report incorrect lid status, assume they're connected */ 602/* Some lid devices report incorrect lid status, assume they're connected */
603static const struct dmi_system_id bad_lid_status[] = { 603static const struct dmi_system_id bad_lid_status[] = {
604 { 604 {
605 .ident = "Compaq nx9020",
606 .matches = {
607 DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
608 DMI_MATCH(DMI_BOARD_NAME, "3084"),
609 },
610 },
611 {
612 .ident = "Samsung SX20S",
613 .matches = {
614 DMI_MATCH(DMI_SYS_VENDOR, "Samsung Electronics"),
615 DMI_MATCH(DMI_BOARD_NAME, "SX20S"),
616 },
617 },
618 {
605 .ident = "Aspire One", 619 .ident = "Aspire One",
606 .matches = { 620 .matches = {
607 DMI_MATCH(DMI_SYS_VENDOR, "Acer"), 621 DMI_MATCH(DMI_SYS_VENDOR, "Acer"),
608 DMI_MATCH(DMI_PRODUCT_NAME, "Aspire one"), 622 DMI_MATCH(DMI_PRODUCT_NAME, "Aspire one"),
609 }, 623 },
610 }, 624 },
625 {
626 .ident = "Aspire 1810T",
627 .matches = {
628 DMI_MATCH(DMI_SYS_VENDOR, "Acer"),
629 DMI_MATCH(DMI_PRODUCT_NAME, "Aspire 1810T"),
630 },
631 },
632 {
633 .ident = "PC-81005",
634 .matches = {
635 DMI_MATCH(DMI_SYS_VENDOR, "MALATA"),
636 DMI_MATCH(DMI_PRODUCT_NAME, "PC-81005"),
637 },
638 },
639 {
640 .ident = "Clevo M5x0N",
641 .matches = {
642 DMI_MATCH(DMI_SYS_VENDOR, "CLEVO Co."),
643 DMI_MATCH(DMI_BOARD_NAME, "M5x0N"),
644 },
645 },
611 { } 646 { }
612}; 647};
613 648
@@ -622,7 +657,7 @@ static enum drm_connector_status intel_lvds_detect(struct drm_connector *connect
622{ 657{
623 enum drm_connector_status status = connector_status_connected; 658 enum drm_connector_status status = connector_status_connected;
624 659
625 if (!acpi_lid_open() && !dmi_check_system(bad_lid_status)) 660 if (!dmi_check_system(bad_lid_status) && !acpi_lid_open())
626 status = connector_status_disconnected; 661 status = connector_status_disconnected;
627 662
628 return status; 663 return status;
@@ -679,7 +714,14 @@ static int intel_lid_notify(struct notifier_block *nb, unsigned long val,
679 struct drm_i915_private *dev_priv = 714 struct drm_i915_private *dev_priv =
680 container_of(nb, struct drm_i915_private, lid_notifier); 715 container_of(nb, struct drm_i915_private, lid_notifier);
681 struct drm_device *dev = dev_priv->dev; 716 struct drm_device *dev = dev_priv->dev;
717 struct drm_connector *connector = dev_priv->int_lvds_connector;
682 718
719 /*
720 * check and update the status of LVDS connector after receiving
721 * the LID nofication event.
722 */
723 if (connector)
724 connector->status = connector->funcs->detect(connector);
683 if (!acpi_lid_open()) { 725 if (!acpi_lid_open()) {
684 dev_priv->modeset_on_lid = 1; 726 dev_priv->modeset_on_lid = 1;
685 return NOTIFY_OK; 727 return NOTIFY_OK;
@@ -854,65 +896,6 @@ static const struct dmi_system_id intel_no_lvds[] = {
854 { } /* terminating entry */ 896 { } /* terminating entry */
855}; 897};
856 898
857#ifdef CONFIG_ACPI
858/*
859 * check_lid_device -- check whether @handle is an ACPI LID device.
860 * @handle: ACPI device handle
861 * @level : depth in the ACPI namespace tree
862 * @context: the number of LID device when we find the device
863 * @rv: a return value to fill if desired (Not use)
864 */
865static acpi_status
866check_lid_device(acpi_handle handle, u32 level, void *context,
867 void **return_value)
868{
869 struct acpi_device *acpi_dev;
870 int *lid_present = context;
871
872 acpi_dev = NULL;
873 /* Get the acpi device for device handle */
874 if (acpi_bus_get_device(handle, &acpi_dev) || !acpi_dev) {
875 /* If there is no ACPI device for handle, return */
876 return AE_OK;
877 }
878
879 if (!strncmp(acpi_device_hid(acpi_dev), "PNP0C0D", 7))
880 *lid_present = 1;
881
882 return AE_OK;
883}
884
885/**
886 * check whether there exists the ACPI LID device by enumerating the ACPI
887 * device tree.
888 */
889static int intel_lid_present(void)
890{
891 int lid_present = 0;
892
893 if (acpi_disabled) {
894 /* If ACPI is disabled, there is no ACPI device tree to
895 * check, so assume the LID device would have been present.
896 */
897 return 1;
898 }
899
900 acpi_walk_namespace(ACPI_TYPE_DEVICE, ACPI_ROOT_OBJECT,
901 ACPI_UINT32_MAX,
902 check_lid_device, NULL, &lid_present, NULL);
903
904 return lid_present;
905}
906#else
907static int intel_lid_present(void)
908{
909 /* In the absence of ACPI built in, assume that the LID device would
910 * have been present.
911 */
912 return 1;
913}
914#endif
915
916/** 899/**
917 * intel_find_lvds_downclock - find the reduced downclock for LVDS in EDID 900 * intel_find_lvds_downclock - find the reduced downclock for LVDS in EDID
918 * @dev: drm device 901 * @dev: drm device
@@ -957,7 +940,8 @@ static void intel_find_lvds_downclock(struct drm_device *dev,
957 } 940 }
958 } 941 }
959 mutex_unlock(&dev->mode_config.mutex); 942 mutex_unlock(&dev->mode_config.mutex);
960 if (temp_downclock < panel_fixed_mode->clock) { 943 if (temp_downclock < panel_fixed_mode->clock &&
944 i915_lvds_downclock) {
961 /* We found the downclock for LVDS. */ 945 /* We found the downclock for LVDS. */
962 dev_priv->lvds_downclock_avail = 1; 946 dev_priv->lvds_downclock_avail = 1;
963 dev_priv->lvds_downclock = temp_downclock; 947 dev_priv->lvds_downclock = temp_downclock;
@@ -1031,12 +1015,8 @@ void intel_lvds_init(struct drm_device *dev)
1031 if (dmi_check_system(intel_no_lvds)) 1015 if (dmi_check_system(intel_no_lvds))
1032 return; 1016 return;
1033 1017
1034 /* 1018 if (!lvds_is_present_in_vbt(dev)) {
1035 * Assume LVDS is present if there's an ACPI lid device or if the 1019 DRM_DEBUG_KMS("LVDS is not present in VBT\n");
1036 * device is present in the VBT.
1037 */
1038 if (!lvds_is_present_in_vbt(dev) && !intel_lid_present()) {
1039 DRM_DEBUG_KMS("LVDS is not present in VBT and no lid detected\n");
1040 return; 1020 return;
1041 } 1021 }
1042 1022
@@ -1180,6 +1160,8 @@ out:
1180 DRM_DEBUG_KMS("lid notifier registration failed\n"); 1160 DRM_DEBUG_KMS("lid notifier registration failed\n");
1181 dev_priv->lid_notifier.notifier_call = NULL; 1161 dev_priv->lid_notifier.notifier_call = NULL;
1182 } 1162 }
1163 /* keep the LVDS connector */
1164 dev_priv->int_lvds_connector = connector;
1183 drm_sysfs_connector_add(connector); 1165 drm_sysfs_connector_add(connector);
1184 return; 1166 return;
1185 1167
diff --git a/drivers/gpu/drm/i915/intel_sdvo.c b/drivers/gpu/drm/i915/intel_sdvo.c
index 24a3dc99716c..82678d30ab06 100644
--- a/drivers/gpu/drm/i915/intel_sdvo.c
+++ b/drivers/gpu/drm/i915/intel_sdvo.c
@@ -462,14 +462,63 @@ static int intel_sdvo_get_pixel_multiplier(struct drm_display_mode *mode)
462} 462}
463 463
464/** 464/**
465 * Don't check status code from this as it switches the bus back to the 465 * Try to read the response after issuie the DDC switch command. But it
466 * SDVO chips which defeats the purpose of doing a bus switch in the first 466 * is noted that we must do the action of reading response and issuing DDC
467 * place. 467 * switch command in one I2C transaction. Otherwise when we try to start
468 * another I2C transaction after issuing the DDC bus switch, it will be
469 * switched to the internal SDVO register.
468 */ 470 */
469static void intel_sdvo_set_control_bus_switch(struct intel_output *intel_output, 471static void intel_sdvo_set_control_bus_switch(struct intel_output *intel_output,
470 u8 target) 472 u8 target)
471{ 473{
472 intel_sdvo_write_cmd(intel_output, SDVO_CMD_SET_CONTROL_BUS_SWITCH, &target, 1); 474 struct intel_sdvo_priv *sdvo_priv = intel_output->dev_priv;
475 u8 out_buf[2], cmd_buf[2], ret_value[2], ret;
476 struct i2c_msg msgs[] = {
477 {
478 .addr = sdvo_priv->slave_addr >> 1,
479 .flags = 0,
480 .len = 2,
481 .buf = out_buf,
482 },
483 /* the following two are to read the response */
484 {
485 .addr = sdvo_priv->slave_addr >> 1,
486 .flags = 0,
487 .len = 1,
488 .buf = cmd_buf,
489 },
490 {
491 .addr = sdvo_priv->slave_addr >> 1,
492 .flags = I2C_M_RD,
493 .len = 1,
494 .buf = ret_value,
495 },
496 };
497
498 intel_sdvo_debug_write(intel_output, SDVO_CMD_SET_CONTROL_BUS_SWITCH,
499 &target, 1);
500 /* write the DDC switch command argument */
501 intel_sdvo_write_byte(intel_output, SDVO_I2C_ARG_0, target);
502
503 out_buf[0] = SDVO_I2C_OPCODE;
504 out_buf[1] = SDVO_CMD_SET_CONTROL_BUS_SWITCH;
505 cmd_buf[0] = SDVO_I2C_CMD_STATUS;
506 cmd_buf[1] = 0;
507 ret_value[0] = 0;
508 ret_value[1] = 0;
509
510 ret = i2c_transfer(intel_output->i2c_bus, msgs, 3);
511 if (ret != 3) {
512 /* failure in I2C transfer */
513 DRM_DEBUG_KMS("I2c transfer returned %d\n", ret);
514 return;
515 }
516 if (ret_value[0] != SDVO_CMD_STATUS_SUCCESS) {
517 DRM_DEBUG_KMS("DDC switch command returns response %d\n",
518 ret_value[0]);
519 return;
520 }
521 return;
473} 522}
474 523
475static bool intel_sdvo_set_target_input(struct intel_output *intel_output, bool target_0, bool target_1) 524static bool intel_sdvo_set_target_input(struct intel_output *intel_output, bool target_0, bool target_1)
@@ -1579,6 +1628,32 @@ intel_sdvo_hdmi_sink_detect(struct drm_connector *connector, u16 response)
1579 edid = drm_get_edid(&intel_output->base, 1628 edid = drm_get_edid(&intel_output->base,
1580 intel_output->ddc_bus); 1629 intel_output->ddc_bus);
1581 1630
1631 /* This is only applied to SDVO cards with multiple outputs */
1632 if (edid == NULL && intel_sdvo_multifunc_encoder(intel_output)) {
1633 uint8_t saved_ddc, temp_ddc;
1634 saved_ddc = sdvo_priv->ddc_bus;
1635 temp_ddc = sdvo_priv->ddc_bus >> 1;
1636 /*
1637 * Don't use the 1 as the argument of DDC bus switch to get
1638 * the EDID. It is used for SDVO SPD ROM.
1639 */
1640 while(temp_ddc > 1) {
1641 sdvo_priv->ddc_bus = temp_ddc;
1642 edid = drm_get_edid(&intel_output->base,
1643 intel_output->ddc_bus);
1644 if (edid) {
1645 /*
1646 * When we can get the EDID, maybe it is the
1647 * correct DDC bus. Update it.
1648 */
1649 sdvo_priv->ddc_bus = temp_ddc;
1650 break;
1651 }
1652 temp_ddc >>= 1;
1653 }
1654 if (edid == NULL)
1655 sdvo_priv->ddc_bus = saved_ddc;
1656 }
1582 /* when there is no edid and no monitor is connected with VGA 1657 /* when there is no edid and no monitor is connected with VGA
1583 * port, try to use the CRT ddc to read the EDID for DVI-connector 1658 * port, try to use the CRT ddc to read the EDID for DVI-connector
1584 */ 1659 */
@@ -2270,6 +2345,14 @@ intel_sdvo_output_setup(struct intel_output *intel_output, uint16_t flags)
2270 connector->connector_type = DRM_MODE_CONNECTOR_VGA; 2345 connector->connector_type = DRM_MODE_CONNECTOR_VGA;
2271 intel_output->clone_mask = (1 << INTEL_SDVO_NON_TV_CLONE_BIT) | 2346 intel_output->clone_mask = (1 << INTEL_SDVO_NON_TV_CLONE_BIT) |
2272 (1 << INTEL_ANALOG_CLONE_BIT); 2347 (1 << INTEL_ANALOG_CLONE_BIT);
2348 } else if (flags & SDVO_OUTPUT_CVBS0) {
2349
2350 sdvo_priv->controlled_output = SDVO_OUTPUT_CVBS0;
2351 encoder->encoder_type = DRM_MODE_ENCODER_TVDAC;
2352 connector->connector_type = DRM_MODE_CONNECTOR_SVIDEO;
2353 sdvo_priv->is_tv = true;
2354 intel_output->needs_tv_clock = true;
2355 intel_output->clone_mask = 1 << INTEL_SDVO_TV_CLONE_BIT;
2273 } else if (flags & SDVO_OUTPUT_LVDS0) { 2356 } else if (flags & SDVO_OUTPUT_LVDS0) {
2274 2357
2275 sdvo_priv->controlled_output = SDVO_OUTPUT_LVDS0; 2358 sdvo_priv->controlled_output = SDVO_OUTPUT_LVDS0;
@@ -2662,6 +2745,7 @@ static void intel_sdvo_create_enhance_property(struct drm_connector *connector)
2662 2745
2663bool intel_sdvo_init(struct drm_device *dev, int output_device) 2746bool intel_sdvo_init(struct drm_device *dev, int output_device)
2664{ 2747{
2748 struct drm_i915_private *dev_priv = dev->dev_private;
2665 struct drm_connector *connector; 2749 struct drm_connector *connector;
2666 struct intel_output *intel_output; 2750 struct intel_output *intel_output;
2667 struct intel_sdvo_priv *sdvo_priv; 2751 struct intel_sdvo_priv *sdvo_priv;
@@ -2708,10 +2792,12 @@ bool intel_sdvo_init(struct drm_device *dev, int output_device)
2708 intel_output->ddc_bus = intel_i2c_create(dev, GPIOE, "SDVOB DDC BUS"); 2792 intel_output->ddc_bus = intel_i2c_create(dev, GPIOE, "SDVOB DDC BUS");
2709 sdvo_priv->analog_ddc_bus = intel_i2c_create(dev, GPIOA, 2793 sdvo_priv->analog_ddc_bus = intel_i2c_create(dev, GPIOA,
2710 "SDVOB/VGA DDC BUS"); 2794 "SDVOB/VGA DDC BUS");
2795 dev_priv->hotplug_supported_mask |= SDVOB_HOTPLUG_INT_STATUS;
2711 } else { 2796 } else {
2712 intel_output->ddc_bus = intel_i2c_create(dev, GPIOE, "SDVOC DDC BUS"); 2797 intel_output->ddc_bus = intel_i2c_create(dev, GPIOE, "SDVOC DDC BUS");
2713 sdvo_priv->analog_ddc_bus = intel_i2c_create(dev, GPIOA, 2798 sdvo_priv->analog_ddc_bus = intel_i2c_create(dev, GPIOA,
2714 "SDVOC/VGA DDC BUS"); 2799 "SDVOC/VGA DDC BUS");
2800 dev_priv->hotplug_supported_mask |= SDVOC_HOTPLUG_INT_STATUS;
2715 } 2801 }
2716 2802
2717 if (intel_output->ddc_bus == NULL) 2803 if (intel_output->ddc_bus == NULL)
diff --git a/drivers/gpu/drm/mga/mga_drv.c b/drivers/gpu/drm/mga/mga_drv.c
index 97ee566ef749..ddfe16197b59 100644
--- a/drivers/gpu/drm/mga/mga_drv.c
+++ b/drivers/gpu/drm/mga/mga_drv.c
@@ -68,7 +68,7 @@ static struct drm_driver driver = {
68 .owner = THIS_MODULE, 68 .owner = THIS_MODULE,
69 .open = drm_open, 69 .open = drm_open,
70 .release = drm_release, 70 .release = drm_release,
71 .ioctl = drm_ioctl, 71 .unlocked_ioctl = drm_ioctl,
72 .mmap = drm_mmap, 72 .mmap = drm_mmap,
73 .poll = drm_poll, 73 .poll = drm_poll,
74 .fasync = drm_fasync, 74 .fasync = drm_fasync,
diff --git a/drivers/gpu/drm/mga/mga_ioc32.c b/drivers/gpu/drm/mga/mga_ioc32.c
index 30d00478ddee..c1f877b7bac1 100644
--- a/drivers/gpu/drm/mga/mga_ioc32.c
+++ b/drivers/gpu/drm/mga/mga_ioc32.c
@@ -100,8 +100,7 @@ static int compat_mga_init(struct file *file, unsigned int cmd,
100 if (err) 100 if (err)
101 return -EFAULT; 101 return -EFAULT;
102 102
103 return drm_ioctl(file->f_path.dentry->d_inode, file, 103 return drm_ioctl(file, DRM_IOCTL_MGA_INIT, (unsigned long)init);
104 DRM_IOCTL_MGA_INIT, (unsigned long)init);
105} 104}
106 105
107typedef struct drm_mga_getparam32 { 106typedef struct drm_mga_getparam32 {
@@ -125,8 +124,7 @@ static int compat_mga_getparam(struct file *file, unsigned int cmd,
125 &getparam->value)) 124 &getparam->value))
126 return -EFAULT; 125 return -EFAULT;
127 126
128 return drm_ioctl(file->f_path.dentry->d_inode, file, 127 return drm_ioctl(file, DRM_IOCTL_MGA_GETPARAM, (unsigned long)getparam);
129 DRM_IOCTL_MGA_GETPARAM, (unsigned long)getparam);
130} 128}
131 129
132typedef struct drm_mga_drm_bootstrap32 { 130typedef struct drm_mga_drm_bootstrap32 {
@@ -166,8 +164,7 @@ static int compat_mga_dma_bootstrap(struct file *file, unsigned int cmd,
166 || __put_user(dma_bootstrap32.agp_size, &dma_bootstrap->agp_size)) 164 || __put_user(dma_bootstrap32.agp_size, &dma_bootstrap->agp_size))
167 return -EFAULT; 165 return -EFAULT;
168 166
169 err = drm_ioctl(file->f_path.dentry->d_inode, file, 167 err = drm_ioctl(file, DRM_IOCTL_MGA_DMA_BOOTSTRAP,
170 DRM_IOCTL_MGA_DMA_BOOTSTRAP,
171 (unsigned long)dma_bootstrap); 168 (unsigned long)dma_bootstrap);
172 if (err) 169 if (err)
173 return err; 170 return err;
@@ -220,12 +217,10 @@ long mga_compat_ioctl(struct file *filp, unsigned int cmd, unsigned long arg)
220 if (nr < DRM_COMMAND_BASE + DRM_ARRAY_SIZE(mga_compat_ioctls)) 217 if (nr < DRM_COMMAND_BASE + DRM_ARRAY_SIZE(mga_compat_ioctls))
221 fn = mga_compat_ioctls[nr - DRM_COMMAND_BASE]; 218 fn = mga_compat_ioctls[nr - DRM_COMMAND_BASE];
222 219
223 lock_kernel(); /* XXX for now */
224 if (fn != NULL) 220 if (fn != NULL)
225 ret = (*fn) (filp, cmd, arg); 221 ret = (*fn) (filp, cmd, arg);
226 else 222 else
227 ret = drm_ioctl(filp->f_path.dentry->d_inode, filp, cmd, arg); 223 ret = drm_ioctl(filp, cmd, arg);
228 unlock_kernel();
229 224
230 return ret; 225 return ret;
231} 226}
diff --git a/drivers/gpu/drm/nouveau/Kconfig b/drivers/gpu/drm/nouveau/Kconfig
index d823e6319516..1175429da102 100644
--- a/drivers/gpu/drm/nouveau/Kconfig
+++ b/drivers/gpu/drm/nouveau/Kconfig
@@ -30,7 +30,7 @@ config DRM_NOUVEAU_DEBUG
30 via debugfs. 30 via debugfs.
31 31
32menu "I2C encoder or helper chips" 32menu "I2C encoder or helper chips"
33 depends on DRM 33 depends on DRM && DRM_KMS_HELPER && I2C
34 34
35config DRM_I2C_CH7006 35config DRM_I2C_CH7006
36 tristate "Chrontel ch7006 TV encoder" 36 tristate "Chrontel ch7006 TV encoder"
diff --git a/drivers/gpu/drm/nouveau/Makefile b/drivers/gpu/drm/nouveau/Makefile
index 1d90d4d0144f..48c290b5da8c 100644
--- a/drivers/gpu/drm/nouveau/Makefile
+++ b/drivers/gpu/drm/nouveau/Makefile
@@ -8,14 +8,15 @@ nouveau-y := nouveau_drv.o nouveau_state.o nouveau_channel.o nouveau_mem.o \
8 nouveau_sgdma.o nouveau_dma.o \ 8 nouveau_sgdma.o nouveau_dma.o \
9 nouveau_bo.o nouveau_fence.o nouveau_gem.o nouveau_ttm.o \ 9 nouveau_bo.o nouveau_fence.o nouveau_gem.o nouveau_ttm.o \
10 nouveau_hw.o nouveau_calc.o nouveau_bios.o nouveau_i2c.o \ 10 nouveau_hw.o nouveau_calc.o nouveau_bios.o nouveau_i2c.o \
11 nouveau_display.o nouveau_connector.o nouveau_fbcon.o \ 11 nouveau_display.o nouveau_connector.o nouveau_fbcon.o \
12 nouveau_dp.o \ 12 nouveau_dp.o nouveau_grctx.o \
13 nv04_timer.o \ 13 nv04_timer.o \
14 nv04_mc.o nv40_mc.o nv50_mc.o \ 14 nv04_mc.o nv40_mc.o nv50_mc.o \
15 nv04_fb.o nv10_fb.o nv40_fb.o \ 15 nv04_fb.o nv10_fb.o nv40_fb.o \
16 nv04_fifo.o nv10_fifo.o nv40_fifo.o nv50_fifo.o \ 16 nv04_fifo.o nv10_fifo.o nv40_fifo.o nv50_fifo.o \
17 nv04_graph.o nv10_graph.o nv20_graph.o \ 17 nv04_graph.o nv10_graph.o nv20_graph.o \
18 nv40_graph.o nv50_graph.o \ 18 nv40_graph.o nv50_graph.o \
19 nv40_grctx.o \
19 nv04_instmem.o nv50_instmem.o \ 20 nv04_instmem.o nv50_instmem.o \
20 nv50_crtc.o nv50_dac.o nv50_sor.o \ 21 nv50_crtc.o nv50_dac.o nv50_sor.o \
21 nv50_cursor.o nv50_display.o nv50_fbcon.o \ 22 nv50_cursor.o nv50_display.o nv50_fbcon.o \
diff --git a/drivers/gpu/drm/nouveau/nouveau_acpi.c b/drivers/gpu/drm/nouveau/nouveau_acpi.c
index 1cf488247a16..48227e744753 100644
--- a/drivers/gpu/drm/nouveau/nouveau_acpi.c
+++ b/drivers/gpu/drm/nouveau/nouveau_acpi.c
@@ -90,21 +90,21 @@ int nouveau_hybrid_setup(struct drm_device *dev)
90{ 90{
91 int result; 91 int result;
92 92
93 if (nouveau_dsm(dev, NOUVEAU_DSM_ACTIVE, NOUVEAU_DSM_ACTIVE_QUERY, 93 if (nouveau_dsm(dev, NOUVEAU_DSM_POWER, NOUVEAU_DSM_POWER_STATE,
94 &result)) 94 &result))
95 return -ENODEV; 95 return -ENODEV;
96 96
97 NV_INFO(dev, "_DSM hardware status gave 0x%x\n", result); 97 NV_INFO(dev, "_DSM hardware status gave 0x%x\n", result);
98 98
99 if (result & 0x1) { /* Stamina mode - disable the external GPU */ 99 if (result) { /* Ensure that the external GPU is enabled */
100 nouveau_dsm(dev, NOUVEAU_DSM_LED, NOUVEAU_DSM_LED_SPEED, NULL);
101 nouveau_dsm(dev, NOUVEAU_DSM_POWER, NOUVEAU_DSM_POWER_SPEED,
102 NULL);
103 } else { /* Stamina mode - disable the external GPU */
100 nouveau_dsm(dev, NOUVEAU_DSM_LED, NOUVEAU_DSM_LED_STAMINA, 104 nouveau_dsm(dev, NOUVEAU_DSM_LED, NOUVEAU_DSM_LED_STAMINA,
101 NULL); 105 NULL);
102 nouveau_dsm(dev, NOUVEAU_DSM_POWER, NOUVEAU_DSM_POWER_STAMINA, 106 nouveau_dsm(dev, NOUVEAU_DSM_POWER, NOUVEAU_DSM_POWER_STAMINA,
103 NULL); 107 NULL);
104 } else { /* Ensure that the external GPU is enabled */
105 nouveau_dsm(dev, NOUVEAU_DSM_LED, NOUVEAU_DSM_LED_SPEED, NULL);
106 nouveau_dsm(dev, NOUVEAU_DSM_POWER, NOUVEAU_DSM_POWER_SPEED,
107 NULL);
108 } 108 }
109 109
110 return 0; 110 return 0;
diff --git a/drivers/gpu/drm/nouveau/nouveau_bios.c b/drivers/gpu/drm/nouveau/nouveau_bios.c
index 5eec5ed69489..0e9cd1d49130 100644
--- a/drivers/gpu/drm/nouveau/nouveau_bios.c
+++ b/drivers/gpu/drm/nouveau/nouveau_bios.c
@@ -181,43 +181,42 @@ struct methods {
181 const char desc[8]; 181 const char desc[8];
182 void (*loadbios)(struct drm_device *, uint8_t *); 182 void (*loadbios)(struct drm_device *, uint8_t *);
183 const bool rw; 183 const bool rw;
184 int score;
185}; 184};
186 185
187static struct methods nv04_methods[] = { 186static struct methods nv04_methods[] = {
188 { "PROM", load_vbios_prom, false }, 187 { "PROM", load_vbios_prom, false },
189 { "PRAMIN", load_vbios_pramin, true }, 188 { "PRAMIN", load_vbios_pramin, true },
190 { "PCIROM", load_vbios_pci, true }, 189 { "PCIROM", load_vbios_pci, true },
191 { }
192}; 190};
193 191
194static struct methods nv50_methods[] = { 192static struct methods nv50_methods[] = {
195 { "PRAMIN", load_vbios_pramin, true }, 193 { "PRAMIN", load_vbios_pramin, true },
196 { "PROM", load_vbios_prom, false }, 194 { "PROM", load_vbios_prom, false },
197 { "PCIROM", load_vbios_pci, true }, 195 { "PCIROM", load_vbios_pci, true },
198 { }
199}; 196};
200 197
198#define METHODCNT 3
199
201static bool NVShadowVBIOS(struct drm_device *dev, uint8_t *data) 200static bool NVShadowVBIOS(struct drm_device *dev, uint8_t *data)
202{ 201{
203 struct drm_nouveau_private *dev_priv = dev->dev_private; 202 struct drm_nouveau_private *dev_priv = dev->dev_private;
204 struct methods *methods, *method; 203 struct methods *methods;
204 int i;
205 int testscore = 3; 205 int testscore = 3;
206 int scores[METHODCNT];
206 207
207 if (nouveau_vbios) { 208 if (nouveau_vbios) {
208 method = nv04_methods; 209 methods = nv04_methods;
209 while (method->loadbios) { 210 for (i = 0; i < METHODCNT; i++)
210 if (!strcasecmp(nouveau_vbios, method->desc)) 211 if (!strcasecmp(nouveau_vbios, methods[i].desc))
211 break; 212 break;
212 method++;
213 }
214 213
215 if (method->loadbios) { 214 if (i < METHODCNT) {
216 NV_INFO(dev, "Attempting to use BIOS image from %s\n", 215 NV_INFO(dev, "Attempting to use BIOS image from %s\n",
217 method->desc); 216 methods[i].desc);
218 217
219 method->loadbios(dev, data); 218 methods[i].loadbios(dev, data);
220 if (score_vbios(dev, data, method->rw)) 219 if (score_vbios(dev, data, methods[i].rw))
221 return true; 220 return true;
222 } 221 }
223 222
@@ -229,28 +228,24 @@ static bool NVShadowVBIOS(struct drm_device *dev, uint8_t *data)
229 else 228 else
230 methods = nv50_methods; 229 methods = nv50_methods;
231 230
232 method = methods; 231 for (i = 0; i < METHODCNT; i++) {
233 while (method->loadbios) {
234 NV_TRACE(dev, "Attempting to load BIOS image from %s\n", 232 NV_TRACE(dev, "Attempting to load BIOS image from %s\n",
235 method->desc); 233 methods[i].desc);
236 data[0] = data[1] = 0; /* avoid reuse of previous image */ 234 data[0] = data[1] = 0; /* avoid reuse of previous image */
237 method->loadbios(dev, data); 235 methods[i].loadbios(dev, data);
238 method->score = score_vbios(dev, data, method->rw); 236 scores[i] = score_vbios(dev, data, methods[i].rw);
239 if (method->score == testscore) 237 if (scores[i] == testscore)
240 return true; 238 return true;
241 method++;
242 } 239 }
243 240
244 while (--testscore > 0) { 241 while (--testscore > 0) {
245 method = methods; 242 for (i = 0; i < METHODCNT; i++) {
246 while (method->loadbios) { 243 if (scores[i] == testscore) {
247 if (method->score == testscore) {
248 NV_TRACE(dev, "Using BIOS image from %s\n", 244 NV_TRACE(dev, "Using BIOS image from %s\n",
249 method->desc); 245 methods[i].desc);
250 method->loadbios(dev, data); 246 methods[i].loadbios(dev, data);
251 return true; 247 return true;
252 } 248 }
253 method++;
254 } 249 }
255 } 250 }
256 251
@@ -261,10 +256,7 @@ static bool NVShadowVBIOS(struct drm_device *dev, uint8_t *data)
261struct init_tbl_entry { 256struct init_tbl_entry {
262 char *name; 257 char *name;
263 uint8_t id; 258 uint8_t id;
264 int length; 259 int (*handler)(struct nvbios *, uint16_t, struct init_exec *);
265 int length_offset;
266 int length_multiplier;
267 bool (*handler)(struct nvbios *, uint16_t, struct init_exec *);
268}; 260};
269 261
270struct bit_entry { 262struct bit_entry {
@@ -318,63 +310,22 @@ valid_reg(struct nvbios *bios, uint32_t reg)
318 struct drm_device *dev = bios->dev; 310 struct drm_device *dev = bios->dev;
319 311
320 /* C51 has misaligned regs on purpose. Marvellous */ 312 /* C51 has misaligned regs on purpose. Marvellous */
321 if (reg & 0x2 || (reg & 0x1 && dev_priv->VBIOS.pub.chip_version != 0x51)) { 313 if (reg & 0x2 ||
322 NV_ERROR(dev, "========== misaligned reg 0x%08X ==========\n", 314 (reg & 0x1 && dev_priv->VBIOS.pub.chip_version != 0x51))
323 reg); 315 NV_ERROR(dev, "======= misaligned reg 0x%08X =======\n", reg);
324 return 0; 316
325 } 317 /* warn on C51 regs that haven't been verified accessible in tracing */
326 /*
327 * Warn on C51 regs that have not been verified accessible in
328 * mmiotracing
329 */
330 if (reg & 0x1 && dev_priv->VBIOS.pub.chip_version == 0x51 && 318 if (reg & 0x1 && dev_priv->VBIOS.pub.chip_version == 0x51 &&
331 reg != 0x130d && reg != 0x1311 && reg != 0x60081d) 319 reg != 0x130d && reg != 0x1311 && reg != 0x60081d)
332 NV_WARN(dev, "=== C51 misaligned reg 0x%08X not verified ===\n", 320 NV_WARN(dev, "=== C51 misaligned reg 0x%08X not verified ===\n",
333 reg); 321 reg);
334 322
335 /* Trust the init scripts on G80 */ 323 if (reg >= (8*1024*1024)) {
336 if (dev_priv->card_type >= NV_50) 324 NV_ERROR(dev, "=== reg 0x%08x out of mapped bounds ===\n", reg);
337 return 1; 325 return 0;
338
339 #define WITHIN(x, y, z) ((x >= y) && (x < y + z))
340 if (WITHIN(reg, NV_PMC_OFFSET, NV_PMC_SIZE))
341 return 1;
342 if (WITHIN(reg, NV_PBUS_OFFSET, NV_PBUS_SIZE))
343 return 1;
344 if (WITHIN(reg, NV_PFIFO_OFFSET, NV_PFIFO_SIZE))
345 return 1;
346 if (dev_priv->VBIOS.pub.chip_version >= 0x30 &&
347 (WITHIN(reg, 0x4000, 0x600) || reg == 0x00004600))
348 return 1;
349 if (dev_priv->VBIOS.pub.chip_version >= 0x40 &&
350 WITHIN(reg, 0xc000, 0x48))
351 return 1;
352 if (dev_priv->VBIOS.pub.chip_version >= 0x17 && reg == 0x0000d204)
353 return 1;
354 if (dev_priv->VBIOS.pub.chip_version >= 0x40) {
355 if (reg == 0x00011014 || reg == 0x00020328)
356 return 1;
357 if (WITHIN(reg, 0x88000, NV_PBUS_SIZE)) /* new PBUS */
358 return 1;
359 } 326 }
360 if (WITHIN(reg, NV_PFB_OFFSET, NV_PFB_SIZE))
361 return 1;
362 if (WITHIN(reg, NV_PEXTDEV_OFFSET, NV_PEXTDEV_SIZE))
363 return 1;
364 if (WITHIN(reg, NV_PCRTC0_OFFSET, NV_PCRTC0_SIZE * 2))
365 return 1;
366 if (WITHIN(reg, NV_PRAMDAC0_OFFSET, NV_PRAMDAC0_SIZE * 2))
367 return 1;
368 if (dev_priv->VBIOS.pub.chip_version >= 0x17 && reg == 0x0070fff0)
369 return 1;
370 if (dev_priv->VBIOS.pub.chip_version == 0x51 &&
371 WITHIN(reg, NV_PRAMIN_OFFSET, NV_PRAMIN_SIZE))
372 return 1;
373 #undef WITHIN
374
375 NV_ERROR(dev, "========== unknown reg 0x%08X ==========\n", reg);
376 327
377 return 0; 328 return 1;
378} 329}
379 330
380static bool 331static bool
@@ -820,7 +771,7 @@ static uint32_t get_tmds_index_reg(struct drm_device *dev, uint8_t mlv)
820 } 771 }
821} 772}
822 773
823static bool 774static int
824init_io_restrict_prog(struct nvbios *bios, uint16_t offset, 775init_io_restrict_prog(struct nvbios *bios, uint16_t offset,
825 struct init_exec *iexec) 776 struct init_exec *iexec)
826{ 777{
@@ -852,9 +803,10 @@ init_io_restrict_prog(struct nvbios *bios, uint16_t offset,
852 uint32_t reg = ROM32(bios->data[offset + 7]); 803 uint32_t reg = ROM32(bios->data[offset + 7]);
853 uint8_t config; 804 uint8_t config;
854 uint32_t configval; 805 uint32_t configval;
806 int len = 11 + count * 4;
855 807
856 if (!iexec->execute) 808 if (!iexec->execute)
857 return true; 809 return len;
858 810
859 BIOSLOG(bios, "0x%04X: Port: 0x%04X, Index: 0x%02X, Mask: 0x%02X, " 811 BIOSLOG(bios, "0x%04X: Port: 0x%04X, Index: 0x%02X, Mask: 0x%02X, "
860 "Shift: 0x%02X, Count: 0x%02X, Reg: 0x%08X\n", 812 "Shift: 0x%02X, Count: 0x%02X, Reg: 0x%08X\n",
@@ -865,7 +817,7 @@ init_io_restrict_prog(struct nvbios *bios, uint16_t offset,
865 NV_ERROR(bios->dev, 817 NV_ERROR(bios->dev,
866 "0x%04X: Config 0x%02X exceeds maximal bound 0x%02X\n", 818 "0x%04X: Config 0x%02X exceeds maximal bound 0x%02X\n",
867 offset, config, count); 819 offset, config, count);
868 return false; 820 return 0;
869 } 821 }
870 822
871 configval = ROM32(bios->data[offset + 11 + config * 4]); 823 configval = ROM32(bios->data[offset + 11 + config * 4]);
@@ -874,10 +826,10 @@ init_io_restrict_prog(struct nvbios *bios, uint16_t offset,
874 826
875 bios_wr32(bios, reg, configval); 827 bios_wr32(bios, reg, configval);
876 828
877 return true; 829 return len;
878} 830}
879 831
880static bool 832static int
881init_repeat(struct nvbios *bios, uint16_t offset, struct init_exec *iexec) 833init_repeat(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
882{ 834{
883 /* 835 /*
@@ -912,10 +864,10 @@ init_repeat(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
912 864
913 iexec->repeat = false; 865 iexec->repeat = false;
914 866
915 return true; 867 return 2;
916} 868}
917 869
918static bool 870static int
919init_io_restrict_pll(struct nvbios *bios, uint16_t offset, 871init_io_restrict_pll(struct nvbios *bios, uint16_t offset,
920 struct init_exec *iexec) 872 struct init_exec *iexec)
921{ 873{
@@ -951,9 +903,10 @@ init_io_restrict_pll(struct nvbios *bios, uint16_t offset,
951 uint32_t reg = ROM32(bios->data[offset + 8]); 903 uint32_t reg = ROM32(bios->data[offset + 8]);
952 uint8_t config; 904 uint8_t config;
953 uint16_t freq; 905 uint16_t freq;
906 int len = 12 + count * 2;
954 907
955 if (!iexec->execute) 908 if (!iexec->execute)
956 return true; 909 return len;
957 910
958 BIOSLOG(bios, "0x%04X: Port: 0x%04X, Index: 0x%02X, Mask: 0x%02X, " 911 BIOSLOG(bios, "0x%04X: Port: 0x%04X, Index: 0x%02X, Mask: 0x%02X, "
959 "Shift: 0x%02X, IO Flag Condition: 0x%02X, " 912 "Shift: 0x%02X, IO Flag Condition: 0x%02X, "
@@ -966,7 +919,7 @@ init_io_restrict_pll(struct nvbios *bios, uint16_t offset,
966 NV_ERROR(bios->dev, 919 NV_ERROR(bios->dev,
967 "0x%04X: Config 0x%02X exceeds maximal bound 0x%02X\n", 920 "0x%04X: Config 0x%02X exceeds maximal bound 0x%02X\n",
968 offset, config, count); 921 offset, config, count);
969 return false; 922 return 0;
970 } 923 }
971 924
972 freq = ROM16(bios->data[offset + 12 + config * 2]); 925 freq = ROM16(bios->data[offset + 12 + config * 2]);
@@ -986,10 +939,10 @@ init_io_restrict_pll(struct nvbios *bios, uint16_t offset,
986 939
987 setPLL(bios, reg, freq * 10); 940 setPLL(bios, reg, freq * 10);
988 941
989 return true; 942 return len;
990} 943}
991 944
992static bool 945static int
993init_end_repeat(struct nvbios *bios, uint16_t offset, struct init_exec *iexec) 946init_end_repeat(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
994{ 947{
995 /* 948 /*
@@ -1007,12 +960,12 @@ init_end_repeat(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
1007 * we're not in repeat mode 960 * we're not in repeat mode
1008 */ 961 */
1009 if (iexec->repeat) 962 if (iexec->repeat)
1010 return false; 963 return 0;
1011 964
1012 return true; 965 return 1;
1013} 966}
1014 967
1015static bool 968static int
1016init_copy(struct nvbios *bios, uint16_t offset, struct init_exec *iexec) 969init_copy(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
1017{ 970{
1018 /* 971 /*
@@ -1041,7 +994,7 @@ init_copy(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
1041 uint8_t crtcdata; 994 uint8_t crtcdata;
1042 995
1043 if (!iexec->execute) 996 if (!iexec->execute)
1044 return true; 997 return 11;
1045 998
1046 BIOSLOG(bios, "0x%04X: Reg: 0x%08X, Shift: 0x%02X, SrcMask: 0x%02X, " 999 BIOSLOG(bios, "0x%04X: Reg: 0x%08X, Shift: 0x%02X, SrcMask: 0x%02X, "
1047 "Port: 0x%04X, Index: 0x%02X, Mask: 0x%02X\n", 1000 "Port: 0x%04X, Index: 0x%02X, Mask: 0x%02X\n",
@@ -1060,10 +1013,10 @@ init_copy(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
1060 crtcdata |= (uint8_t)data; 1013 crtcdata |= (uint8_t)data;
1061 bios_idxprt_wr(bios, crtcport, crtcindex, crtcdata); 1014 bios_idxprt_wr(bios, crtcport, crtcindex, crtcdata);
1062 1015
1063 return true; 1016 return 11;
1064} 1017}
1065 1018
1066static bool 1019static int
1067init_not(struct nvbios *bios, uint16_t offset, struct init_exec *iexec) 1020init_not(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
1068{ 1021{
1069 /* 1022 /*
@@ -1079,10 +1032,10 @@ init_not(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
1079 BIOSLOG(bios, "0x%04X: ------ Executing following commands ------\n", offset); 1032 BIOSLOG(bios, "0x%04X: ------ Executing following commands ------\n", offset);
1080 1033
1081 iexec->execute = !iexec->execute; 1034 iexec->execute = !iexec->execute;
1082 return true; 1035 return 1;
1083} 1036}
1084 1037
1085static bool 1038static int
1086init_io_flag_condition(struct nvbios *bios, uint16_t offset, 1039init_io_flag_condition(struct nvbios *bios, uint16_t offset,
1087 struct init_exec *iexec) 1040 struct init_exec *iexec)
1088{ 1041{
@@ -1100,7 +1053,7 @@ init_io_flag_condition(struct nvbios *bios, uint16_t offset,
1100 uint8_t cond = bios->data[offset + 1]; 1053 uint8_t cond = bios->data[offset + 1];
1101 1054
1102 if (!iexec->execute) 1055 if (!iexec->execute)
1103 return true; 1056 return 2;
1104 1057
1105 if (io_flag_condition_met(bios, offset, cond)) 1058 if (io_flag_condition_met(bios, offset, cond))
1106 BIOSLOG(bios, "0x%04X: Condition fulfilled -- continuing to execute\n", offset); 1059 BIOSLOG(bios, "0x%04X: Condition fulfilled -- continuing to execute\n", offset);
@@ -1109,10 +1062,10 @@ init_io_flag_condition(struct nvbios *bios, uint16_t offset,
1109 iexec->execute = false; 1062 iexec->execute = false;
1110 } 1063 }
1111 1064
1112 return true; 1065 return 2;
1113} 1066}
1114 1067
1115static bool 1068static int
1116init_idx_addr_latched(struct nvbios *bios, uint16_t offset, 1069init_idx_addr_latched(struct nvbios *bios, uint16_t offset,
1117 struct init_exec *iexec) 1070 struct init_exec *iexec)
1118{ 1071{
@@ -1140,11 +1093,12 @@ init_idx_addr_latched(struct nvbios *bios, uint16_t offset,
1140 uint32_t mask = ROM32(bios->data[offset + 9]); 1093 uint32_t mask = ROM32(bios->data[offset + 9]);
1141 uint32_t data = ROM32(bios->data[offset + 13]); 1094 uint32_t data = ROM32(bios->data[offset + 13]);
1142 uint8_t count = bios->data[offset + 17]; 1095 uint8_t count = bios->data[offset + 17];
1096 int len = 18 + count * 2;
1143 uint32_t value; 1097 uint32_t value;
1144 int i; 1098 int i;
1145 1099
1146 if (!iexec->execute) 1100 if (!iexec->execute)
1147 return true; 1101 return len;
1148 1102
1149 BIOSLOG(bios, "0x%04X: ControlReg: 0x%08X, DataReg: 0x%08X, " 1103 BIOSLOG(bios, "0x%04X: ControlReg: 0x%08X, DataReg: 0x%08X, "
1150 "Mask: 0x%08X, Data: 0x%08X, Count: 0x%02X\n", 1104 "Mask: 0x%08X, Data: 0x%08X, Count: 0x%02X\n",
@@ -1164,10 +1118,10 @@ init_idx_addr_latched(struct nvbios *bios, uint16_t offset,
1164 bios_wr32(bios, controlreg, value); 1118 bios_wr32(bios, controlreg, value);
1165 } 1119 }
1166 1120
1167 return true; 1121 return len;
1168} 1122}
1169 1123
1170static bool 1124static int
1171init_io_restrict_pll2(struct nvbios *bios, uint16_t offset, 1125init_io_restrict_pll2(struct nvbios *bios, uint16_t offset,
1172 struct init_exec *iexec) 1126 struct init_exec *iexec)
1173{ 1127{
@@ -1196,25 +1150,26 @@ init_io_restrict_pll2(struct nvbios *bios, uint16_t offset,
1196 uint8_t shift = bios->data[offset + 5]; 1150 uint8_t shift = bios->data[offset + 5];
1197 uint8_t count = bios->data[offset + 6]; 1151 uint8_t count = bios->data[offset + 6];
1198 uint32_t reg = ROM32(bios->data[offset + 7]); 1152 uint32_t reg = ROM32(bios->data[offset + 7]);
1153 int len = 11 + count * 4;
1199 uint8_t config; 1154 uint8_t config;
1200 uint32_t freq; 1155 uint32_t freq;
1201 1156
1202 if (!iexec->execute) 1157 if (!iexec->execute)
1203 return true; 1158 return len;
1204 1159
1205 BIOSLOG(bios, "0x%04X: Port: 0x%04X, Index: 0x%02X, Mask: 0x%02X, " 1160 BIOSLOG(bios, "0x%04X: Port: 0x%04X, Index: 0x%02X, Mask: 0x%02X, "
1206 "Shift: 0x%02X, Count: 0x%02X, Reg: 0x%08X\n", 1161 "Shift: 0x%02X, Count: 0x%02X, Reg: 0x%08X\n",
1207 offset, crtcport, crtcindex, mask, shift, count, reg); 1162 offset, crtcport, crtcindex, mask, shift, count, reg);
1208 1163
1209 if (!reg) 1164 if (!reg)
1210 return true; 1165 return len;
1211 1166
1212 config = (bios_idxprt_rd(bios, crtcport, crtcindex) & mask) >> shift; 1167 config = (bios_idxprt_rd(bios, crtcport, crtcindex) & mask) >> shift;
1213 if (config > count) { 1168 if (config > count) {
1214 NV_ERROR(bios->dev, 1169 NV_ERROR(bios->dev,
1215 "0x%04X: Config 0x%02X exceeds maximal bound 0x%02X\n", 1170 "0x%04X: Config 0x%02X exceeds maximal bound 0x%02X\n",
1216 offset, config, count); 1171 offset, config, count);
1217 return false; 1172 return 0;
1218 } 1173 }
1219 1174
1220 freq = ROM32(bios->data[offset + 11 + config * 4]); 1175 freq = ROM32(bios->data[offset + 11 + config * 4]);
@@ -1224,10 +1179,10 @@ init_io_restrict_pll2(struct nvbios *bios, uint16_t offset,
1224 1179
1225 setPLL(bios, reg, freq); 1180 setPLL(bios, reg, freq);
1226 1181
1227 return true; 1182 return len;
1228} 1183}
1229 1184
1230static bool 1185static int
1231init_pll2(struct nvbios *bios, uint16_t offset, struct init_exec *iexec) 1186init_pll2(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
1232{ 1187{
1233 /* 1188 /*
@@ -1244,16 +1199,16 @@ init_pll2(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
1244 uint32_t freq = ROM32(bios->data[offset + 5]); 1199 uint32_t freq = ROM32(bios->data[offset + 5]);
1245 1200
1246 if (!iexec->execute) 1201 if (!iexec->execute)
1247 return true; 1202 return 9;
1248 1203
1249 BIOSLOG(bios, "0x%04X: Reg: 0x%04X, Freq: %dkHz\n", 1204 BIOSLOG(bios, "0x%04X: Reg: 0x%04X, Freq: %dkHz\n",
1250 offset, reg, freq); 1205 offset, reg, freq);
1251 1206
1252 setPLL(bios, reg, freq); 1207 setPLL(bios, reg, freq);
1253 return true; 1208 return 9;
1254} 1209}
1255 1210
1256static bool 1211static int
1257init_i2c_byte(struct nvbios *bios, uint16_t offset, struct init_exec *iexec) 1212init_i2c_byte(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
1258{ 1213{
1259 /* 1214 /*
@@ -1277,12 +1232,13 @@ init_i2c_byte(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
1277 uint8_t i2c_index = bios->data[offset + 1]; 1232 uint8_t i2c_index = bios->data[offset + 1];
1278 uint8_t i2c_address = bios->data[offset + 2]; 1233 uint8_t i2c_address = bios->data[offset + 2];
1279 uint8_t count = bios->data[offset + 3]; 1234 uint8_t count = bios->data[offset + 3];
1235 int len = 4 + count * 3;
1280 struct nouveau_i2c_chan *chan; 1236 struct nouveau_i2c_chan *chan;
1281 struct i2c_msg msg; 1237 struct i2c_msg msg;
1282 int i; 1238 int i;
1283 1239
1284 if (!iexec->execute) 1240 if (!iexec->execute)
1285 return true; 1241 return len;
1286 1242
1287 BIOSLOG(bios, "0x%04X: DCBI2CIndex: 0x%02X, I2CAddress: 0x%02X, " 1243 BIOSLOG(bios, "0x%04X: DCBI2CIndex: 0x%02X, I2CAddress: 0x%02X, "
1288 "Count: 0x%02X\n", 1244 "Count: 0x%02X\n",
@@ -1290,7 +1246,7 @@ init_i2c_byte(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
1290 1246
1291 chan = init_i2c_device_find(bios->dev, i2c_index); 1247 chan = init_i2c_device_find(bios->dev, i2c_index);
1292 if (!chan) 1248 if (!chan)
1293 return false; 1249 return 0;
1294 1250
1295 for (i = 0; i < count; i++) { 1251 for (i = 0; i < count; i++) {
1296 uint8_t i2c_reg = bios->data[offset + 4 + i * 3]; 1252 uint8_t i2c_reg = bios->data[offset + 4 + i * 3];
@@ -1303,7 +1259,7 @@ init_i2c_byte(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
1303 msg.len = 1; 1259 msg.len = 1;
1304 msg.buf = &value; 1260 msg.buf = &value;
1305 if (i2c_transfer(&chan->adapter, &msg, 1) != 1) 1261 if (i2c_transfer(&chan->adapter, &msg, 1) != 1)
1306 return false; 1262 return 0;
1307 1263
1308 BIOSLOG(bios, "0x%04X: I2CReg: 0x%02X, Value: 0x%02X, " 1264 BIOSLOG(bios, "0x%04X: I2CReg: 0x%02X, Value: 0x%02X, "
1309 "Mask: 0x%02X, Data: 0x%02X\n", 1265 "Mask: 0x%02X, Data: 0x%02X\n",
@@ -1317,14 +1273,14 @@ init_i2c_byte(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
1317 msg.len = 1; 1273 msg.len = 1;
1318 msg.buf = &value; 1274 msg.buf = &value;
1319 if (i2c_transfer(&chan->adapter, &msg, 1) != 1) 1275 if (i2c_transfer(&chan->adapter, &msg, 1) != 1)
1320 return false; 1276 return 0;
1321 } 1277 }
1322 } 1278 }
1323 1279
1324 return true; 1280 return len;
1325} 1281}
1326 1282
1327static bool 1283static int
1328init_zm_i2c_byte(struct nvbios *bios, uint16_t offset, struct init_exec *iexec) 1284init_zm_i2c_byte(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
1329{ 1285{
1330 /* 1286 /*
@@ -1346,12 +1302,13 @@ init_zm_i2c_byte(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
1346 uint8_t i2c_index = bios->data[offset + 1]; 1302 uint8_t i2c_index = bios->data[offset + 1];
1347 uint8_t i2c_address = bios->data[offset + 2]; 1303 uint8_t i2c_address = bios->data[offset + 2];
1348 uint8_t count = bios->data[offset + 3]; 1304 uint8_t count = bios->data[offset + 3];
1305 int len = 4 + count * 2;
1349 struct nouveau_i2c_chan *chan; 1306 struct nouveau_i2c_chan *chan;
1350 struct i2c_msg msg; 1307 struct i2c_msg msg;
1351 int i; 1308 int i;
1352 1309
1353 if (!iexec->execute) 1310 if (!iexec->execute)
1354 return true; 1311 return len;
1355 1312
1356 BIOSLOG(bios, "0x%04X: DCBI2CIndex: 0x%02X, I2CAddress: 0x%02X, " 1313 BIOSLOG(bios, "0x%04X: DCBI2CIndex: 0x%02X, I2CAddress: 0x%02X, "
1357 "Count: 0x%02X\n", 1314 "Count: 0x%02X\n",
@@ -1359,7 +1316,7 @@ init_zm_i2c_byte(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
1359 1316
1360 chan = init_i2c_device_find(bios->dev, i2c_index); 1317 chan = init_i2c_device_find(bios->dev, i2c_index);
1361 if (!chan) 1318 if (!chan)
1362 return false; 1319 return 0;
1363 1320
1364 for (i = 0; i < count; i++) { 1321 for (i = 0; i < count; i++) {
1365 uint8_t i2c_reg = bios->data[offset + 4 + i * 2]; 1322 uint8_t i2c_reg = bios->data[offset + 4 + i * 2];
@@ -1374,14 +1331,14 @@ init_zm_i2c_byte(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
1374 msg.len = 1; 1331 msg.len = 1;
1375 msg.buf = &data; 1332 msg.buf = &data;
1376 if (i2c_transfer(&chan->adapter, &msg, 1) != 1) 1333 if (i2c_transfer(&chan->adapter, &msg, 1) != 1)
1377 return false; 1334 return 0;
1378 } 1335 }
1379 } 1336 }
1380 1337
1381 return true; 1338 return len;
1382} 1339}
1383 1340
1384static bool 1341static int
1385init_zm_i2c(struct nvbios *bios, uint16_t offset, struct init_exec *iexec) 1342init_zm_i2c(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
1386{ 1343{
1387 /* 1344 /*
@@ -1401,13 +1358,14 @@ init_zm_i2c(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
1401 uint8_t i2c_index = bios->data[offset + 1]; 1358 uint8_t i2c_index = bios->data[offset + 1];
1402 uint8_t i2c_address = bios->data[offset + 2]; 1359 uint8_t i2c_address = bios->data[offset + 2];
1403 uint8_t count = bios->data[offset + 3]; 1360 uint8_t count = bios->data[offset + 3];
1361 int len = 4 + count;
1404 struct nouveau_i2c_chan *chan; 1362 struct nouveau_i2c_chan *chan;
1405 struct i2c_msg msg; 1363 struct i2c_msg msg;
1406 uint8_t data[256]; 1364 uint8_t data[256];
1407 int i; 1365 int i;
1408 1366
1409 if (!iexec->execute) 1367 if (!iexec->execute)
1410 return true; 1368 return len;
1411 1369
1412 BIOSLOG(bios, "0x%04X: DCBI2CIndex: 0x%02X, I2CAddress: 0x%02X, " 1370 BIOSLOG(bios, "0x%04X: DCBI2CIndex: 0x%02X, I2CAddress: 0x%02X, "
1413 "Count: 0x%02X\n", 1371 "Count: 0x%02X\n",
@@ -1415,7 +1373,7 @@ init_zm_i2c(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
1415 1373
1416 chan = init_i2c_device_find(bios->dev, i2c_index); 1374 chan = init_i2c_device_find(bios->dev, i2c_index);
1417 if (!chan) 1375 if (!chan)
1418 return false; 1376 return 0;
1419 1377
1420 for (i = 0; i < count; i++) { 1378 for (i = 0; i < count; i++) {
1421 data[i] = bios->data[offset + 4 + i]; 1379 data[i] = bios->data[offset + 4 + i];
@@ -1429,13 +1387,13 @@ init_zm_i2c(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
1429 msg.len = count; 1387 msg.len = count;
1430 msg.buf = data; 1388 msg.buf = data;
1431 if (i2c_transfer(&chan->adapter, &msg, 1) != 1) 1389 if (i2c_transfer(&chan->adapter, &msg, 1) != 1)
1432 return false; 1390 return 0;
1433 } 1391 }
1434 1392
1435 return true; 1393 return len;
1436} 1394}
1437 1395
1438static bool 1396static int
1439init_tmds(struct nvbios *bios, uint16_t offset, struct init_exec *iexec) 1397init_tmds(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
1440{ 1398{
1441 /* 1399 /*
@@ -1460,7 +1418,7 @@ init_tmds(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
1460 uint32_t reg, value; 1418 uint32_t reg, value;
1461 1419
1462 if (!iexec->execute) 1420 if (!iexec->execute)
1463 return true; 1421 return 5;
1464 1422
1465 BIOSLOG(bios, "0x%04X: MagicLookupValue: 0x%02X, TMDSAddr: 0x%02X, " 1423 BIOSLOG(bios, "0x%04X: MagicLookupValue: 0x%02X, TMDSAddr: 0x%02X, "
1466 "Mask: 0x%02X, Data: 0x%02X\n", 1424 "Mask: 0x%02X, Data: 0x%02X\n",
@@ -1468,7 +1426,7 @@ init_tmds(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
1468 1426
1469 reg = get_tmds_index_reg(bios->dev, mlv); 1427 reg = get_tmds_index_reg(bios->dev, mlv);
1470 if (!reg) 1428 if (!reg)
1471 return false; 1429 return 0;
1472 1430
1473 bios_wr32(bios, reg, 1431 bios_wr32(bios, reg,
1474 tmdsaddr | NV_PRAMDAC_FP_TMDS_CONTROL_WRITE_DISABLE); 1432 tmdsaddr | NV_PRAMDAC_FP_TMDS_CONTROL_WRITE_DISABLE);
@@ -1476,10 +1434,10 @@ init_tmds(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
1476 bios_wr32(bios, reg + 4, value); 1434 bios_wr32(bios, reg + 4, value);
1477 bios_wr32(bios, reg, tmdsaddr); 1435 bios_wr32(bios, reg, tmdsaddr);
1478 1436
1479 return true; 1437 return 5;
1480} 1438}
1481 1439
1482static bool 1440static int
1483init_zm_tmds_group(struct nvbios *bios, uint16_t offset, 1441init_zm_tmds_group(struct nvbios *bios, uint16_t offset,
1484 struct init_exec *iexec) 1442 struct init_exec *iexec)
1485{ 1443{
@@ -1500,18 +1458,19 @@ init_zm_tmds_group(struct nvbios *bios, uint16_t offset,
1500 1458
1501 uint8_t mlv = bios->data[offset + 1]; 1459 uint8_t mlv = bios->data[offset + 1];
1502 uint8_t count = bios->data[offset + 2]; 1460 uint8_t count = bios->data[offset + 2];
1461 int len = 3 + count * 2;
1503 uint32_t reg; 1462 uint32_t reg;
1504 int i; 1463 int i;
1505 1464
1506 if (!iexec->execute) 1465 if (!iexec->execute)
1507 return true; 1466 return len;
1508 1467
1509 BIOSLOG(bios, "0x%04X: MagicLookupValue: 0x%02X, Count: 0x%02X\n", 1468 BIOSLOG(bios, "0x%04X: MagicLookupValue: 0x%02X, Count: 0x%02X\n",
1510 offset, mlv, count); 1469 offset, mlv, count);
1511 1470
1512 reg = get_tmds_index_reg(bios->dev, mlv); 1471 reg = get_tmds_index_reg(bios->dev, mlv);
1513 if (!reg) 1472 if (!reg)
1514 return false; 1473 return 0;
1515 1474
1516 for (i = 0; i < count; i++) { 1475 for (i = 0; i < count; i++) {
1517 uint8_t tmdsaddr = bios->data[offset + 3 + i * 2]; 1476 uint8_t tmdsaddr = bios->data[offset + 3 + i * 2];
@@ -1521,10 +1480,10 @@ init_zm_tmds_group(struct nvbios *bios, uint16_t offset,
1521 bios_wr32(bios, reg, tmdsaddr); 1480 bios_wr32(bios, reg, tmdsaddr);
1522 } 1481 }
1523 1482
1524 return true; 1483 return len;
1525} 1484}
1526 1485
1527static bool 1486static int
1528init_cr_idx_adr_latch(struct nvbios *bios, uint16_t offset, 1487init_cr_idx_adr_latch(struct nvbios *bios, uint16_t offset,
1529 struct init_exec *iexec) 1488 struct init_exec *iexec)
1530{ 1489{
@@ -1547,11 +1506,12 @@ init_cr_idx_adr_latch(struct nvbios *bios, uint16_t offset,
1547 uint8_t crtcindex2 = bios->data[offset + 2]; 1506 uint8_t crtcindex2 = bios->data[offset + 2];
1548 uint8_t baseaddr = bios->data[offset + 3]; 1507 uint8_t baseaddr = bios->data[offset + 3];
1549 uint8_t count = bios->data[offset + 4]; 1508 uint8_t count = bios->data[offset + 4];
1509 int len = 5 + count;
1550 uint8_t oldaddr, data; 1510 uint8_t oldaddr, data;
1551 int i; 1511 int i;
1552 1512
1553 if (!iexec->execute) 1513 if (!iexec->execute)
1554 return true; 1514 return len;
1555 1515
1556 BIOSLOG(bios, "0x%04X: Index1: 0x%02X, Index2: 0x%02X, " 1516 BIOSLOG(bios, "0x%04X: Index1: 0x%02X, Index2: 0x%02X, "
1557 "BaseAddr: 0x%02X, Count: 0x%02X\n", 1517 "BaseAddr: 0x%02X, Count: 0x%02X\n",
@@ -1568,10 +1528,10 @@ init_cr_idx_adr_latch(struct nvbios *bios, uint16_t offset,
1568 1528
1569 bios_idxprt_wr(bios, NV_CIO_CRX__COLOR, crtcindex1, oldaddr); 1529 bios_idxprt_wr(bios, NV_CIO_CRX__COLOR, crtcindex1, oldaddr);
1570 1530
1571 return true; 1531 return len;
1572} 1532}
1573 1533
1574static bool 1534static int
1575init_cr(struct nvbios *bios, uint16_t offset, struct init_exec *iexec) 1535init_cr(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
1576{ 1536{
1577 /* 1537 /*
@@ -1592,7 +1552,7 @@ init_cr(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
1592 uint8_t value; 1552 uint8_t value;
1593 1553
1594 if (!iexec->execute) 1554 if (!iexec->execute)
1595 return true; 1555 return 4;
1596 1556
1597 BIOSLOG(bios, "0x%04X: Index: 0x%02X, Mask: 0x%02X, Data: 0x%02X\n", 1557 BIOSLOG(bios, "0x%04X: Index: 0x%02X, Mask: 0x%02X, Data: 0x%02X\n",
1598 offset, crtcindex, mask, data); 1558 offset, crtcindex, mask, data);
@@ -1601,10 +1561,10 @@ init_cr(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
1601 value |= data; 1561 value |= data;
1602 bios_idxprt_wr(bios, NV_CIO_CRX__COLOR, crtcindex, value); 1562 bios_idxprt_wr(bios, NV_CIO_CRX__COLOR, crtcindex, value);
1603 1563
1604 return true; 1564 return 4;
1605} 1565}
1606 1566
1607static bool 1567static int
1608init_zm_cr(struct nvbios *bios, uint16_t offset, struct init_exec *iexec) 1568init_zm_cr(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
1609{ 1569{
1610 /* 1570 /*
@@ -1621,14 +1581,14 @@ init_zm_cr(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
1621 uint8_t data = bios->data[offset + 2]; 1581 uint8_t data = bios->data[offset + 2];
1622 1582
1623 if (!iexec->execute) 1583 if (!iexec->execute)
1624 return true; 1584 return 3;
1625 1585
1626 bios_idxprt_wr(bios, NV_CIO_CRX__COLOR, crtcindex, data); 1586 bios_idxprt_wr(bios, NV_CIO_CRX__COLOR, crtcindex, data);
1627 1587
1628 return true; 1588 return 3;
1629} 1589}
1630 1590
1631static bool 1591static int
1632init_zm_cr_group(struct nvbios *bios, uint16_t offset, struct init_exec *iexec) 1592init_zm_cr_group(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
1633{ 1593{
1634 /* 1594 /*
@@ -1645,18 +1605,19 @@ init_zm_cr_group(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
1645 */ 1605 */
1646 1606
1647 uint8_t count = bios->data[offset + 1]; 1607 uint8_t count = bios->data[offset + 1];
1608 int len = 2 + count * 2;
1648 int i; 1609 int i;
1649 1610
1650 if (!iexec->execute) 1611 if (!iexec->execute)
1651 return true; 1612 return len;
1652 1613
1653 for (i = 0; i < count; i++) 1614 for (i = 0; i < count; i++)
1654 init_zm_cr(bios, offset + 2 + 2 * i - 1, iexec); 1615 init_zm_cr(bios, offset + 2 + 2 * i - 1, iexec);
1655 1616
1656 return true; 1617 return len;
1657} 1618}
1658 1619
1659static bool 1620static int
1660init_condition_time(struct nvbios *bios, uint16_t offset, 1621init_condition_time(struct nvbios *bios, uint16_t offset,
1661 struct init_exec *iexec) 1622 struct init_exec *iexec)
1662{ 1623{
@@ -1680,7 +1641,7 @@ init_condition_time(struct nvbios *bios, uint16_t offset,
1680 unsigned cnt; 1641 unsigned cnt;
1681 1642
1682 if (!iexec->execute) 1643 if (!iexec->execute)
1683 return true; 1644 return 3;
1684 1645
1685 if (retries > 100) 1646 if (retries > 100)
1686 retries = 100; 1647 retries = 100;
@@ -1711,10 +1672,10 @@ init_condition_time(struct nvbios *bios, uint16_t offset,
1711 iexec->execute = false; 1672 iexec->execute = false;
1712 } 1673 }
1713 1674
1714 return true; 1675 return 3;
1715} 1676}
1716 1677
1717static bool 1678static int
1718init_zm_reg_sequence(struct nvbios *bios, uint16_t offset, 1679init_zm_reg_sequence(struct nvbios *bios, uint16_t offset,
1719 struct init_exec *iexec) 1680 struct init_exec *iexec)
1720{ 1681{
@@ -1734,10 +1695,11 @@ init_zm_reg_sequence(struct nvbios *bios, uint16_t offset,
1734 1695
1735 uint32_t basereg = ROM32(bios->data[offset + 1]); 1696 uint32_t basereg = ROM32(bios->data[offset + 1]);
1736 uint32_t count = bios->data[offset + 5]; 1697 uint32_t count = bios->data[offset + 5];
1698 int len = 6 + count * 4;
1737 int i; 1699 int i;
1738 1700
1739 if (!iexec->execute) 1701 if (!iexec->execute)
1740 return true; 1702 return len;
1741 1703
1742 BIOSLOG(bios, "0x%04X: BaseReg: 0x%08X, Count: 0x%02X\n", 1704 BIOSLOG(bios, "0x%04X: BaseReg: 0x%08X, Count: 0x%02X\n",
1743 offset, basereg, count); 1705 offset, basereg, count);
@@ -1749,10 +1711,10 @@ init_zm_reg_sequence(struct nvbios *bios, uint16_t offset,
1749 bios_wr32(bios, reg, data); 1711 bios_wr32(bios, reg, data);
1750 } 1712 }
1751 1713
1752 return true; 1714 return len;
1753} 1715}
1754 1716
1755static bool 1717static int
1756init_sub_direct(struct nvbios *bios, uint16_t offset, struct init_exec *iexec) 1718init_sub_direct(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
1757{ 1719{
1758 /* 1720 /*
@@ -1768,7 +1730,7 @@ init_sub_direct(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
1768 uint16_t sub_offset = ROM16(bios->data[offset + 1]); 1730 uint16_t sub_offset = ROM16(bios->data[offset + 1]);
1769 1731
1770 if (!iexec->execute) 1732 if (!iexec->execute)
1771 return true; 1733 return 3;
1772 1734
1773 BIOSLOG(bios, "0x%04X: Executing subroutine at 0x%04X\n", 1735 BIOSLOG(bios, "0x%04X: Executing subroutine at 0x%04X\n",
1774 offset, sub_offset); 1736 offset, sub_offset);
@@ -1777,10 +1739,10 @@ init_sub_direct(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
1777 1739
1778 BIOSLOG(bios, "0x%04X: End of 0x%04X subroutine\n", offset, sub_offset); 1740 BIOSLOG(bios, "0x%04X: End of 0x%04X subroutine\n", offset, sub_offset);
1779 1741
1780 return true; 1742 return 3;
1781} 1743}
1782 1744
1783static bool 1745static int
1784init_copy_nv_reg(struct nvbios *bios, uint16_t offset, struct init_exec *iexec) 1746init_copy_nv_reg(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
1785{ 1747{
1786 /* 1748 /*
@@ -1808,7 +1770,7 @@ init_copy_nv_reg(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
1808 uint32_t srcvalue, dstvalue; 1770 uint32_t srcvalue, dstvalue;
1809 1771
1810 if (!iexec->execute) 1772 if (!iexec->execute)
1811 return true; 1773 return 22;
1812 1774
1813 BIOSLOG(bios, "0x%04X: SrcReg: 0x%08X, Shift: 0x%02X, SrcMask: 0x%08X, " 1775 BIOSLOG(bios, "0x%04X: SrcReg: 0x%08X, Shift: 0x%02X, SrcMask: 0x%08X, "
1814 "Xor: 0x%08X, DstReg: 0x%08X, DstMask: 0x%08X\n", 1776 "Xor: 0x%08X, DstReg: 0x%08X, DstMask: 0x%08X\n",
@@ -1827,10 +1789,10 @@ init_copy_nv_reg(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
1827 1789
1828 bios_wr32(bios, dstreg, dstvalue | srcvalue); 1790 bios_wr32(bios, dstreg, dstvalue | srcvalue);
1829 1791
1830 return true; 1792 return 22;
1831} 1793}
1832 1794
1833static bool 1795static int
1834init_zm_index_io(struct nvbios *bios, uint16_t offset, struct init_exec *iexec) 1796init_zm_index_io(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
1835{ 1797{
1836 /* 1798 /*
@@ -1848,14 +1810,14 @@ init_zm_index_io(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
1848 uint8_t data = bios->data[offset + 4]; 1810 uint8_t data = bios->data[offset + 4];
1849 1811
1850 if (!iexec->execute) 1812 if (!iexec->execute)
1851 return true; 1813 return 5;
1852 1814
1853 bios_idxprt_wr(bios, crtcport, crtcindex, data); 1815 bios_idxprt_wr(bios, crtcport, crtcindex, data);
1854 1816
1855 return true; 1817 return 5;
1856} 1818}
1857 1819
1858static bool 1820static int
1859init_compute_mem(struct nvbios *bios, uint16_t offset, struct init_exec *iexec) 1821init_compute_mem(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
1860{ 1822{
1861 /* 1823 /*
@@ -1903,8 +1865,8 @@ init_compute_mem(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
1903 1865
1904 struct drm_nouveau_private *dev_priv = bios->dev->dev_private; 1866 struct drm_nouveau_private *dev_priv = bios->dev->dev_private;
1905 1867
1906 if (dev_priv->card_type >= NV_50) 1868 if (dev_priv->card_type >= NV_40)
1907 return true; 1869 return 1;
1908 1870
1909 /* 1871 /*
1910 * On every card I've seen, this step gets done for us earlier in 1872 * On every card I've seen, this step gets done for us earlier in
@@ -1922,10 +1884,10 @@ init_compute_mem(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
1922 /* write back the saved configuration value */ 1884 /* write back the saved configuration value */
1923 bios_wr32(bios, NV_PFB_CFG0, bios->state.saved_nv_pfb_cfg0); 1885 bios_wr32(bios, NV_PFB_CFG0, bios->state.saved_nv_pfb_cfg0);
1924 1886
1925 return true; 1887 return 1;
1926} 1888}
1927 1889
1928static bool 1890static int
1929init_reset(struct nvbios *bios, uint16_t offset, struct init_exec *iexec) 1891init_reset(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
1930{ 1892{
1931 /* 1893 /*
@@ -1959,10 +1921,10 @@ init_reset(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
1959 pci_nv_20 &= ~NV_PBUS_PCI_NV_20_ROM_SHADOW_ENABLED; /* 0xfffffffe */ 1921 pci_nv_20 &= ~NV_PBUS_PCI_NV_20_ROM_SHADOW_ENABLED; /* 0xfffffffe */
1960 bios_wr32(bios, NV_PBUS_PCI_NV_20, pci_nv_20); 1922 bios_wr32(bios, NV_PBUS_PCI_NV_20, pci_nv_20);
1961 1923
1962 return true; 1924 return 13;
1963} 1925}
1964 1926
1965static bool 1927static int
1966init_configure_mem(struct nvbios *bios, uint16_t offset, 1928init_configure_mem(struct nvbios *bios, uint16_t offset,
1967 struct init_exec *iexec) 1929 struct init_exec *iexec)
1968{ 1930{
@@ -1983,7 +1945,7 @@ init_configure_mem(struct nvbios *bios, uint16_t offset,
1983 uint32_t reg, data; 1945 uint32_t reg, data;
1984 1946
1985 if (bios->major_version > 2) 1947 if (bios->major_version > 2)
1986 return false; 1948 return 0;
1987 1949
1988 bios_idxprt_wr(bios, NV_VIO_SRX, NV_VIO_SR_CLOCK_INDEX, bios_idxprt_rd( 1950 bios_idxprt_wr(bios, NV_VIO_SRX, NV_VIO_SR_CLOCK_INDEX, bios_idxprt_rd(
1989 bios, NV_VIO_SRX, NV_VIO_SR_CLOCK_INDEX) | 0x20); 1951 bios, NV_VIO_SRX, NV_VIO_SR_CLOCK_INDEX) | 0x20);
@@ -2015,10 +1977,10 @@ init_configure_mem(struct nvbios *bios, uint16_t offset,
2015 bios_wr32(bios, reg, data); 1977 bios_wr32(bios, reg, data);
2016 } 1978 }
2017 1979
2018 return true; 1980 return 1;
2019} 1981}
2020 1982
2021static bool 1983static int
2022init_configure_clk(struct nvbios *bios, uint16_t offset, 1984init_configure_clk(struct nvbios *bios, uint16_t offset,
2023 struct init_exec *iexec) 1985 struct init_exec *iexec)
2024{ 1986{
@@ -2038,7 +2000,7 @@ init_configure_clk(struct nvbios *bios, uint16_t offset,
2038 int clock; 2000 int clock;
2039 2001
2040 if (bios->major_version > 2) 2002 if (bios->major_version > 2)
2041 return false; 2003 return 0;
2042 2004
2043 clock = ROM16(bios->data[meminitoffs + 4]) * 10; 2005 clock = ROM16(bios->data[meminitoffs + 4]) * 10;
2044 setPLL(bios, NV_PRAMDAC_NVPLL_COEFF, clock); 2006 setPLL(bios, NV_PRAMDAC_NVPLL_COEFF, clock);
@@ -2048,10 +2010,10 @@ init_configure_clk(struct nvbios *bios, uint16_t offset,
2048 clock *= 2; 2010 clock *= 2;
2049 setPLL(bios, NV_PRAMDAC_MPLL_COEFF, clock); 2011 setPLL(bios, NV_PRAMDAC_MPLL_COEFF, clock);
2050 2012
2051 return true; 2013 return 1;
2052} 2014}
2053 2015
2054static bool 2016static int
2055init_configure_preinit(struct nvbios *bios, uint16_t offset, 2017init_configure_preinit(struct nvbios *bios, uint16_t offset,
2056 struct init_exec *iexec) 2018 struct init_exec *iexec)
2057{ 2019{
@@ -2071,15 +2033,15 @@ init_configure_preinit(struct nvbios *bios, uint16_t offset,
2071 uint8_t cr3c = ((straps << 2) & 0xf0) | (straps & (1 << 6)); 2033 uint8_t cr3c = ((straps << 2) & 0xf0) | (straps & (1 << 6));
2072 2034
2073 if (bios->major_version > 2) 2035 if (bios->major_version > 2)
2074 return false; 2036 return 0;
2075 2037
2076 bios_idxprt_wr(bios, NV_CIO_CRX__COLOR, 2038 bios_idxprt_wr(bios, NV_CIO_CRX__COLOR,
2077 NV_CIO_CRE_SCRATCH4__INDEX, cr3c); 2039 NV_CIO_CRE_SCRATCH4__INDEX, cr3c);
2078 2040
2079 return true; 2041 return 1;
2080} 2042}
2081 2043
2082static bool 2044static int
2083init_io(struct nvbios *bios, uint16_t offset, struct init_exec *iexec) 2045init_io(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
2084{ 2046{
2085 /* 2047 /*
@@ -2099,7 +2061,7 @@ init_io(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
2099 uint8_t data = bios->data[offset + 4]; 2061 uint8_t data = bios->data[offset + 4];
2100 2062
2101 if (!iexec->execute) 2063 if (!iexec->execute)
2102 return true; 2064 return 5;
2103 2065
2104 BIOSLOG(bios, "0x%04X: Port: 0x%04X, Mask: 0x%02X, Data: 0x%02X\n", 2066 BIOSLOG(bios, "0x%04X: Port: 0x%04X, Mask: 0x%02X, Data: 0x%02X\n",
2105 offset, crtcport, mask, data); 2067 offset, crtcport, mask, data);
@@ -2158,15 +2120,15 @@ init_io(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
2158 for (i = 0; i < 2; i++) 2120 for (i = 0; i < 2; i++)
2159 bios_wr32(bios, 0x614108 + (i*0x800), bios_rd32( 2121 bios_wr32(bios, 0x614108 + (i*0x800), bios_rd32(
2160 bios, 0x614108 + (i*0x800)) & 0x0fffffff); 2122 bios, 0x614108 + (i*0x800)) & 0x0fffffff);
2161 return true; 2123 return 5;
2162 } 2124 }
2163 2125
2164 bios_port_wr(bios, crtcport, (bios_port_rd(bios, crtcport) & mask) | 2126 bios_port_wr(bios, crtcport, (bios_port_rd(bios, crtcport) & mask) |
2165 data); 2127 data);
2166 return true; 2128 return 5;
2167} 2129}
2168 2130
2169static bool 2131static int
2170init_sub(struct nvbios *bios, uint16_t offset, struct init_exec *iexec) 2132init_sub(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
2171{ 2133{
2172 /* 2134 /*
@@ -2181,7 +2143,7 @@ init_sub(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
2181 uint8_t sub = bios->data[offset + 1]; 2143 uint8_t sub = bios->data[offset + 1];
2182 2144
2183 if (!iexec->execute) 2145 if (!iexec->execute)
2184 return true; 2146 return 2;
2185 2147
2186 BIOSLOG(bios, "0x%04X: Calling script %d\n", offset, sub); 2148 BIOSLOG(bios, "0x%04X: Calling script %d\n", offset, sub);
2187 2149
@@ -2191,10 +2153,10 @@ init_sub(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
2191 2153
2192 BIOSLOG(bios, "0x%04X: End of script %d\n", offset, sub); 2154 BIOSLOG(bios, "0x%04X: End of script %d\n", offset, sub);
2193 2155
2194 return true; 2156 return 2;
2195} 2157}
2196 2158
2197static bool 2159static int
2198init_ram_condition(struct nvbios *bios, uint16_t offset, 2160init_ram_condition(struct nvbios *bios, uint16_t offset,
2199 struct init_exec *iexec) 2161 struct init_exec *iexec)
2200{ 2162{
@@ -2215,7 +2177,7 @@ init_ram_condition(struct nvbios *bios, uint16_t offset,
2215 uint8_t data; 2177 uint8_t data;
2216 2178
2217 if (!iexec->execute) 2179 if (!iexec->execute)
2218 return true; 2180 return 3;
2219 2181
2220 data = bios_rd32(bios, NV_PFB_BOOT_0) & mask; 2182 data = bios_rd32(bios, NV_PFB_BOOT_0) & mask;
2221 2183
@@ -2229,10 +2191,10 @@ init_ram_condition(struct nvbios *bios, uint16_t offset,
2229 iexec->execute = false; 2191 iexec->execute = false;
2230 } 2192 }
2231 2193
2232 return true; 2194 return 3;
2233} 2195}
2234 2196
2235static bool 2197static int
2236init_nv_reg(struct nvbios *bios, uint16_t offset, struct init_exec *iexec) 2198init_nv_reg(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
2237{ 2199{
2238 /* 2200 /*
@@ -2251,17 +2213,17 @@ init_nv_reg(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
2251 uint32_t data = ROM32(bios->data[offset + 9]); 2213 uint32_t data = ROM32(bios->data[offset + 9]);
2252 2214
2253 if (!iexec->execute) 2215 if (!iexec->execute)
2254 return true; 2216 return 13;
2255 2217
2256 BIOSLOG(bios, "0x%04X: Reg: 0x%08X, Mask: 0x%08X, Data: 0x%08X\n", 2218 BIOSLOG(bios, "0x%04X: Reg: 0x%08X, Mask: 0x%08X, Data: 0x%08X\n",
2257 offset, reg, mask, data); 2219 offset, reg, mask, data);
2258 2220
2259 bios_wr32(bios, reg, (bios_rd32(bios, reg) & mask) | data); 2221 bios_wr32(bios, reg, (bios_rd32(bios, reg) & mask) | data);
2260 2222
2261 return true; 2223 return 13;
2262} 2224}
2263 2225
2264static bool 2226static int
2265init_macro(struct nvbios *bios, uint16_t offset, struct init_exec *iexec) 2227init_macro(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
2266{ 2228{
2267 /* 2229 /*
@@ -2285,7 +2247,7 @@ init_macro(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
2285 int i; 2247 int i;
2286 2248
2287 if (!iexec->execute) 2249 if (!iexec->execute)
2288 return true; 2250 return 2;
2289 2251
2290 BIOSLOG(bios, "0x%04X: Macro: 0x%02X, MacroTableIndex: 0x%02X, " 2252 BIOSLOG(bios, "0x%04X: Macro: 0x%02X, MacroTableIndex: 0x%02X, "
2291 "Count: 0x%02X\n", 2253 "Count: 0x%02X\n",
@@ -2300,10 +2262,10 @@ init_macro(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
2300 bios_wr32(bios, reg, data); 2262 bios_wr32(bios, reg, data);
2301 } 2263 }
2302 2264
2303 return true; 2265 return 2;
2304} 2266}
2305 2267
2306static bool 2268static int
2307init_done(struct nvbios *bios, uint16_t offset, struct init_exec *iexec) 2269init_done(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
2308{ 2270{
2309 /* 2271 /*
@@ -2315,10 +2277,10 @@ init_done(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
2315 */ 2277 */
2316 2278
2317 /* mild retval abuse to stop parsing this table */ 2279 /* mild retval abuse to stop parsing this table */
2318 return false; 2280 return 0;
2319} 2281}
2320 2282
2321static bool 2283static int
2322init_resume(struct nvbios *bios, uint16_t offset, struct init_exec *iexec) 2284init_resume(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
2323{ 2285{
2324 /* 2286 /*
@@ -2330,15 +2292,15 @@ init_resume(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
2330 */ 2292 */
2331 2293
2332 if (iexec->execute) 2294 if (iexec->execute)
2333 return true; 2295 return 1;
2334 2296
2335 iexec->execute = true; 2297 iexec->execute = true;
2336 BIOSLOG(bios, "0x%04X: ---- Executing following commands ----\n", offset); 2298 BIOSLOG(bios, "0x%04X: ---- Executing following commands ----\n", offset);
2337 2299
2338 return true; 2300 return 1;
2339} 2301}
2340 2302
2341static bool 2303static int
2342init_time(struct nvbios *bios, uint16_t offset, struct init_exec *iexec) 2304init_time(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
2343{ 2305{
2344 /* 2306 /*
@@ -2353,7 +2315,7 @@ init_time(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
2353 unsigned time = ROM16(bios->data[offset + 1]); 2315 unsigned time = ROM16(bios->data[offset + 1]);
2354 2316
2355 if (!iexec->execute) 2317 if (!iexec->execute)
2356 return true; 2318 return 3;
2357 2319
2358 BIOSLOG(bios, "0x%04X: Sleeping for 0x%04X microseconds\n", 2320 BIOSLOG(bios, "0x%04X: Sleeping for 0x%04X microseconds\n",
2359 offset, time); 2321 offset, time);
@@ -2363,10 +2325,10 @@ init_time(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
2363 else 2325 else
2364 msleep((time + 900) / 1000); 2326 msleep((time + 900) / 1000);
2365 2327
2366 return true; 2328 return 3;
2367} 2329}
2368 2330
2369static bool 2331static int
2370init_condition(struct nvbios *bios, uint16_t offset, struct init_exec *iexec) 2332init_condition(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
2371{ 2333{
2372 /* 2334 /*
@@ -2383,7 +2345,7 @@ init_condition(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
2383 uint8_t cond = bios->data[offset + 1]; 2345 uint8_t cond = bios->data[offset + 1];
2384 2346
2385 if (!iexec->execute) 2347 if (!iexec->execute)
2386 return true; 2348 return 2;
2387 2349
2388 BIOSLOG(bios, "0x%04X: Condition: 0x%02X\n", offset, cond); 2350 BIOSLOG(bios, "0x%04X: Condition: 0x%02X\n", offset, cond);
2389 2351
@@ -2394,10 +2356,10 @@ init_condition(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
2394 iexec->execute = false; 2356 iexec->execute = false;
2395 } 2357 }
2396 2358
2397 return true; 2359 return 2;
2398} 2360}
2399 2361
2400static bool 2362static int
2401init_io_condition(struct nvbios *bios, uint16_t offset, struct init_exec *iexec) 2363init_io_condition(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
2402{ 2364{
2403 /* 2365 /*
@@ -2414,7 +2376,7 @@ init_io_condition(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
2414 uint8_t cond = bios->data[offset + 1]; 2376 uint8_t cond = bios->data[offset + 1];
2415 2377
2416 if (!iexec->execute) 2378 if (!iexec->execute)
2417 return true; 2379 return 2;
2418 2380
2419 BIOSLOG(bios, "0x%04X: IO condition: 0x%02X\n", offset, cond); 2381 BIOSLOG(bios, "0x%04X: IO condition: 0x%02X\n", offset, cond);
2420 2382
@@ -2425,10 +2387,10 @@ init_io_condition(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
2425 iexec->execute = false; 2387 iexec->execute = false;
2426 } 2388 }
2427 2389
2428 return true; 2390 return 2;
2429} 2391}
2430 2392
2431static bool 2393static int
2432init_index_io(struct nvbios *bios, uint16_t offset, struct init_exec *iexec) 2394init_index_io(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
2433{ 2395{
2434 /* 2396 /*
@@ -2451,7 +2413,7 @@ init_index_io(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
2451 uint8_t value; 2413 uint8_t value;
2452 2414
2453 if (!iexec->execute) 2415 if (!iexec->execute)
2454 return true; 2416 return 6;
2455 2417
2456 BIOSLOG(bios, "0x%04X: Port: 0x%04X, Index: 0x%02X, Mask: 0x%02X, " 2418 BIOSLOG(bios, "0x%04X: Port: 0x%04X, Index: 0x%02X, Mask: 0x%02X, "
2457 "Data: 0x%02X\n", 2419 "Data: 0x%02X\n",
@@ -2460,10 +2422,10 @@ init_index_io(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
2460 value = (bios_idxprt_rd(bios, crtcport, crtcindex) & mask) | data; 2422 value = (bios_idxprt_rd(bios, crtcport, crtcindex) & mask) | data;
2461 bios_idxprt_wr(bios, crtcport, crtcindex, value); 2423 bios_idxprt_wr(bios, crtcport, crtcindex, value);
2462 2424
2463 return true; 2425 return 6;
2464} 2426}
2465 2427
2466static bool 2428static int
2467init_pll(struct nvbios *bios, uint16_t offset, struct init_exec *iexec) 2429init_pll(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
2468{ 2430{
2469 /* 2431 /*
@@ -2481,16 +2443,16 @@ init_pll(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
2481 uint16_t freq = ROM16(bios->data[offset + 5]); 2443 uint16_t freq = ROM16(bios->data[offset + 5]);
2482 2444
2483 if (!iexec->execute) 2445 if (!iexec->execute)
2484 return true; 2446 return 7;
2485 2447
2486 BIOSLOG(bios, "0x%04X: Reg: 0x%08X, Freq: %d0kHz\n", offset, reg, freq); 2448 BIOSLOG(bios, "0x%04X: Reg: 0x%08X, Freq: %d0kHz\n", offset, reg, freq);
2487 2449
2488 setPLL(bios, reg, freq * 10); 2450 setPLL(bios, reg, freq * 10);
2489 2451
2490 return true; 2452 return 7;
2491} 2453}
2492 2454
2493static bool 2455static int
2494init_zm_reg(struct nvbios *bios, uint16_t offset, struct init_exec *iexec) 2456init_zm_reg(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
2495{ 2457{
2496 /* 2458 /*
@@ -2507,17 +2469,17 @@ init_zm_reg(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
2507 uint32_t value = ROM32(bios->data[offset + 5]); 2469 uint32_t value = ROM32(bios->data[offset + 5]);
2508 2470
2509 if (!iexec->execute) 2471 if (!iexec->execute)
2510 return true; 2472 return 9;
2511 2473
2512 if (reg == 0x000200) 2474 if (reg == 0x000200)
2513 value |= 1; 2475 value |= 1;
2514 2476
2515 bios_wr32(bios, reg, value); 2477 bios_wr32(bios, reg, value);
2516 2478
2517 return true; 2479 return 9;
2518} 2480}
2519 2481
2520static bool 2482static int
2521init_ram_restrict_pll(struct nvbios *bios, uint16_t offset, 2483init_ram_restrict_pll(struct nvbios *bios, uint16_t offset,
2522 struct init_exec *iexec) 2484 struct init_exec *iexec)
2523{ 2485{
@@ -2543,14 +2505,15 @@ init_ram_restrict_pll(struct nvbios *bios, uint16_t offset,
2543 uint8_t type = bios->data[offset + 1]; 2505 uint8_t type = bios->data[offset + 1];
2544 uint32_t freq = ROM32(bios->data[offset + 2 + (index * 4)]); 2506 uint32_t freq = ROM32(bios->data[offset + 2 + (index * 4)]);
2545 uint8_t *pll_limits = &bios->data[bios->pll_limit_tbl_ptr], *entry; 2507 uint8_t *pll_limits = &bios->data[bios->pll_limit_tbl_ptr], *entry;
2508 int len = 2 + bios->ram_restrict_group_count * 4;
2546 int i; 2509 int i;
2547 2510
2548 if (!iexec->execute) 2511 if (!iexec->execute)
2549 return true; 2512 return len;
2550 2513
2551 if (!bios->pll_limit_tbl_ptr || (pll_limits[0] & 0xf0) != 0x30) { 2514 if (!bios->pll_limit_tbl_ptr || (pll_limits[0] & 0xf0) != 0x30) {
2552 NV_ERROR(dev, "PLL limits table not version 3.x\n"); 2515 NV_ERROR(dev, "PLL limits table not version 3.x\n");
2553 return true; /* deliberate, allow default clocks to remain */ 2516 return len; /* deliberate, allow default clocks to remain */
2554 } 2517 }
2555 2518
2556 entry = pll_limits + pll_limits[1]; 2519 entry = pll_limits + pll_limits[1];
@@ -2563,15 +2526,15 @@ init_ram_restrict_pll(struct nvbios *bios, uint16_t offset,
2563 offset, type, reg, freq); 2526 offset, type, reg, freq);
2564 2527
2565 setPLL(bios, reg, freq); 2528 setPLL(bios, reg, freq);
2566 return true; 2529 return len;
2567 } 2530 }
2568 } 2531 }
2569 2532
2570 NV_ERROR(dev, "PLL type 0x%02x not found in PLL limits table", type); 2533 NV_ERROR(dev, "PLL type 0x%02x not found in PLL limits table", type);
2571 return true; 2534 return len;
2572} 2535}
2573 2536
2574static bool 2537static int
2575init_8c(struct nvbios *bios, uint16_t offset, struct init_exec *iexec) 2538init_8c(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
2576{ 2539{
2577 /* 2540 /*
@@ -2581,10 +2544,10 @@ init_8c(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
2581 * 2544 *
2582 */ 2545 */
2583 2546
2584 return true; 2547 return 1;
2585} 2548}
2586 2549
2587static bool 2550static int
2588init_8d(struct nvbios *bios, uint16_t offset, struct init_exec *iexec) 2551init_8d(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
2589{ 2552{
2590 /* 2553 /*
@@ -2594,10 +2557,10 @@ init_8d(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
2594 * 2557 *
2595 */ 2558 */
2596 2559
2597 return true; 2560 return 1;
2598} 2561}
2599 2562
2600static bool 2563static int
2601init_gpio(struct nvbios *bios, uint16_t offset, struct init_exec *iexec) 2564init_gpio(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
2602{ 2565{
2603 /* 2566 /*
@@ -2615,14 +2578,17 @@ init_gpio(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
2615 const uint8_t *gpio_entry; 2578 const uint8_t *gpio_entry;
2616 int i; 2579 int i;
2617 2580
2581 if (!iexec->execute)
2582 return 1;
2583
2618 if (bios->bdcb.version != 0x40) { 2584 if (bios->bdcb.version != 0x40) {
2619 NV_ERROR(bios->dev, "DCB table not version 4.0\n"); 2585 NV_ERROR(bios->dev, "DCB table not version 4.0\n");
2620 return false; 2586 return 0;
2621 } 2587 }
2622 2588
2623 if (!bios->bdcb.gpio_table_ptr) { 2589 if (!bios->bdcb.gpio_table_ptr) {
2624 NV_WARN(bios->dev, "Invalid pointer to INIT_8E table\n"); 2590 NV_WARN(bios->dev, "Invalid pointer to INIT_8E table\n");
2625 return false; 2591 return 0;
2626 } 2592 }
2627 2593
2628 gpio_entry = gpio_table + gpio_table[1]; 2594 gpio_entry = gpio_table + gpio_table[1];
@@ -2660,13 +2626,10 @@ init_gpio(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
2660 bios_wr32(bios, r, v); 2626 bios_wr32(bios, r, v);
2661 } 2627 }
2662 2628
2663 return true; 2629 return 1;
2664} 2630}
2665 2631
2666/* hack to avoid moving the itbl_entry array before this function */ 2632static int
2667int init_ram_restrict_zm_reg_group_blocklen;
2668
2669static bool
2670init_ram_restrict_zm_reg_group(struct nvbios *bios, uint16_t offset, 2633init_ram_restrict_zm_reg_group(struct nvbios *bios, uint16_t offset,
2671 struct init_exec *iexec) 2634 struct init_exec *iexec)
2672{ 2635{
@@ -2692,21 +2655,21 @@ init_ram_restrict_zm_reg_group(struct nvbios *bios, uint16_t offset,
2692 uint8_t regincrement = bios->data[offset + 5]; 2655 uint8_t regincrement = bios->data[offset + 5];
2693 uint8_t count = bios->data[offset + 6]; 2656 uint8_t count = bios->data[offset + 6];
2694 uint32_t strap_ramcfg, data; 2657 uint32_t strap_ramcfg, data;
2695 uint16_t blocklen; 2658 /* previously set by 'M' BIT table */
2659 uint16_t blocklen = bios->ram_restrict_group_count * 4;
2660 int len = 7 + count * blocklen;
2696 uint8_t index; 2661 uint8_t index;
2697 int i; 2662 int i;
2698 2663
2699 /* previously set by 'M' BIT table */
2700 blocklen = init_ram_restrict_zm_reg_group_blocklen;
2701 2664
2702 if (!iexec->execute) 2665 if (!iexec->execute)
2703 return true; 2666 return len;
2704 2667
2705 if (!blocklen) { 2668 if (!blocklen) {
2706 NV_ERROR(bios->dev, 2669 NV_ERROR(bios->dev,
2707 "0x%04X: Zero block length - has the M table " 2670 "0x%04X: Zero block length - has the M table "
2708 "been parsed?\n", offset); 2671 "been parsed?\n", offset);
2709 return false; 2672 return 0;
2710 } 2673 }
2711 2674
2712 strap_ramcfg = (bios_rd32(bios, NV_PEXTDEV_BOOT_0) >> 2) & 0xf; 2675 strap_ramcfg = (bios_rd32(bios, NV_PEXTDEV_BOOT_0) >> 2) & 0xf;
@@ -2724,10 +2687,10 @@ init_ram_restrict_zm_reg_group(struct nvbios *bios, uint16_t offset,
2724 reg += regincrement; 2687 reg += regincrement;
2725 } 2688 }
2726 2689
2727 return true; 2690 return len;
2728} 2691}
2729 2692
2730static bool 2693static int
2731init_copy_zm_reg(struct nvbios *bios, uint16_t offset, struct init_exec *iexec) 2694init_copy_zm_reg(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
2732{ 2695{
2733 /* 2696 /*
@@ -2744,14 +2707,14 @@ init_copy_zm_reg(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
2744 uint32_t dstreg = ROM32(bios->data[offset + 5]); 2707 uint32_t dstreg = ROM32(bios->data[offset + 5]);
2745 2708
2746 if (!iexec->execute) 2709 if (!iexec->execute)
2747 return true; 2710 return 9;
2748 2711
2749 bios_wr32(bios, dstreg, bios_rd32(bios, srcreg)); 2712 bios_wr32(bios, dstreg, bios_rd32(bios, srcreg));
2750 2713
2751 return true; 2714 return 9;
2752} 2715}
2753 2716
2754static bool 2717static int
2755init_zm_reg_group_addr_latched(struct nvbios *bios, uint16_t offset, 2718init_zm_reg_group_addr_latched(struct nvbios *bios, uint16_t offset,
2756 struct init_exec *iexec) 2719 struct init_exec *iexec)
2757{ 2720{
@@ -2769,20 +2732,21 @@ init_zm_reg_group_addr_latched(struct nvbios *bios, uint16_t offset,
2769 2732
2770 uint32_t reg = ROM32(bios->data[offset + 1]); 2733 uint32_t reg = ROM32(bios->data[offset + 1]);
2771 uint8_t count = bios->data[offset + 5]; 2734 uint8_t count = bios->data[offset + 5];
2735 int len = 6 + count * 4;
2772 int i; 2736 int i;
2773 2737
2774 if (!iexec->execute) 2738 if (!iexec->execute)
2775 return true; 2739 return len;
2776 2740
2777 for (i = 0; i < count; i++) { 2741 for (i = 0; i < count; i++) {
2778 uint32_t data = ROM32(bios->data[offset + 6 + 4 * i]); 2742 uint32_t data = ROM32(bios->data[offset + 6 + 4 * i]);
2779 bios_wr32(bios, reg, data); 2743 bios_wr32(bios, reg, data);
2780 } 2744 }
2781 2745
2782 return true; 2746 return len;
2783} 2747}
2784 2748
2785static bool 2749static int
2786init_reserved(struct nvbios *bios, uint16_t offset, struct init_exec *iexec) 2750init_reserved(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
2787{ 2751{
2788 /* 2752 /*
@@ -2793,10 +2757,10 @@ init_reserved(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
2793 * Seemingly does nothing 2757 * Seemingly does nothing
2794 */ 2758 */
2795 2759
2796 return true; 2760 return 1;
2797} 2761}
2798 2762
2799static bool 2763static int
2800init_96(struct nvbios *bios, uint16_t offset, struct init_exec *iexec) 2764init_96(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
2801{ 2765{
2802 /* 2766 /*
@@ -2829,13 +2793,13 @@ init_96(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
2829 val <<= bios->data[offset + 16]; 2793 val <<= bios->data[offset + 16];
2830 2794
2831 if (!iexec->execute) 2795 if (!iexec->execute)
2832 return true; 2796 return 17;
2833 2797
2834 bios_wr32(bios, reg, (bios_rd32(bios, reg) & mask) | val); 2798 bios_wr32(bios, reg, (bios_rd32(bios, reg) & mask) | val);
2835 return true; 2799 return 17;
2836} 2800}
2837 2801
2838static bool 2802static int
2839init_97(struct nvbios *bios, uint16_t offset, struct init_exec *iexec) 2803init_97(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
2840{ 2804{
2841 /* 2805 /*
@@ -2859,13 +2823,13 @@ init_97(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
2859 val = (val & mask) | ((val + add) & ~mask); 2823 val = (val & mask) | ((val + add) & ~mask);
2860 2824
2861 if (!iexec->execute) 2825 if (!iexec->execute)
2862 return true; 2826 return 13;
2863 2827
2864 bios_wr32(bios, reg, val); 2828 bios_wr32(bios, reg, val);
2865 return true; 2829 return 13;
2866} 2830}
2867 2831
2868static bool 2832static int
2869init_auxch(struct nvbios *bios, uint16_t offset, struct init_exec *iexec) 2833init_auxch(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
2870{ 2834{
2871 /* 2835 /*
@@ -2883,32 +2847,33 @@ init_auxch(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
2883 struct drm_device *dev = bios->dev; 2847 struct drm_device *dev = bios->dev;
2884 struct nouveau_i2c_chan *auxch; 2848 struct nouveau_i2c_chan *auxch;
2885 uint32_t addr = ROM32(bios->data[offset + 1]); 2849 uint32_t addr = ROM32(bios->data[offset + 1]);
2886 uint8_t len = bios->data[offset + 5]; 2850 uint8_t count = bios->data[offset + 5];
2851 int len = 6 + count * 2;
2887 int ret, i; 2852 int ret, i;
2888 2853
2889 if (!bios->display.output) { 2854 if (!bios->display.output) {
2890 NV_ERROR(dev, "INIT_AUXCH: no active output\n"); 2855 NV_ERROR(dev, "INIT_AUXCH: no active output\n");
2891 return false; 2856 return 0;
2892 } 2857 }
2893 2858
2894 auxch = init_i2c_device_find(dev, bios->display.output->i2c_index); 2859 auxch = init_i2c_device_find(dev, bios->display.output->i2c_index);
2895 if (!auxch) { 2860 if (!auxch) {
2896 NV_ERROR(dev, "INIT_AUXCH: couldn't get auxch %d\n", 2861 NV_ERROR(dev, "INIT_AUXCH: couldn't get auxch %d\n",
2897 bios->display.output->i2c_index); 2862 bios->display.output->i2c_index);
2898 return false; 2863 return 0;
2899 } 2864 }
2900 2865
2901 if (!iexec->execute) 2866 if (!iexec->execute)
2902 return true; 2867 return len;
2903 2868
2904 offset += 6; 2869 offset += 6;
2905 for (i = 0; i < len; i++, offset += 2) { 2870 for (i = 0; i < count; i++, offset += 2) {
2906 uint8_t data; 2871 uint8_t data;
2907 2872
2908 ret = nouveau_dp_auxch(auxch, 9, addr, &data, 1); 2873 ret = nouveau_dp_auxch(auxch, 9, addr, &data, 1);
2909 if (ret) { 2874 if (ret) {
2910 NV_ERROR(dev, "INIT_AUXCH: rd auxch fail %d\n", ret); 2875 NV_ERROR(dev, "INIT_AUXCH: rd auxch fail %d\n", ret);
2911 return false; 2876 return 0;
2912 } 2877 }
2913 2878
2914 data &= bios->data[offset + 0]; 2879 data &= bios->data[offset + 0];
@@ -2917,14 +2882,14 @@ init_auxch(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
2917 ret = nouveau_dp_auxch(auxch, 8, addr, &data, 1); 2882 ret = nouveau_dp_auxch(auxch, 8, addr, &data, 1);
2918 if (ret) { 2883 if (ret) {
2919 NV_ERROR(dev, "INIT_AUXCH: wr auxch fail %d\n", ret); 2884 NV_ERROR(dev, "INIT_AUXCH: wr auxch fail %d\n", ret);
2920 return false; 2885 return 0;
2921 } 2886 }
2922 } 2887 }
2923 2888
2924 return true; 2889 return len;
2925} 2890}
2926 2891
2927static bool 2892static int
2928init_zm_auxch(struct nvbios *bios, uint16_t offset, struct init_exec *iexec) 2893init_zm_auxch(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
2929{ 2894{
2930 /* 2895 /*
@@ -2941,106 +2906,99 @@ init_zm_auxch(struct nvbios *bios, uint16_t offset, struct init_exec *iexec)
2941 struct drm_device *dev = bios->dev; 2906 struct drm_device *dev = bios->dev;
2942 struct nouveau_i2c_chan *auxch; 2907 struct nouveau_i2c_chan *auxch;
2943 uint32_t addr = ROM32(bios->data[offset + 1]); 2908 uint32_t addr = ROM32(bios->data[offset + 1]);
2944 uint8_t len = bios->data[offset + 5]; 2909 uint8_t count = bios->data[offset + 5];
2910 int len = 6 + count;
2945 int ret, i; 2911 int ret, i;
2946 2912
2947 if (!bios->display.output) { 2913 if (!bios->display.output) {
2948 NV_ERROR(dev, "INIT_ZM_AUXCH: no active output\n"); 2914 NV_ERROR(dev, "INIT_ZM_AUXCH: no active output\n");
2949 return false; 2915 return 0;
2950 } 2916 }
2951 2917
2952 auxch = init_i2c_device_find(dev, bios->display.output->i2c_index); 2918 auxch = init_i2c_device_find(dev, bios->display.output->i2c_index);
2953 if (!auxch) { 2919 if (!auxch) {
2954 NV_ERROR(dev, "INIT_ZM_AUXCH: couldn't get auxch %d\n", 2920 NV_ERROR(dev, "INIT_ZM_AUXCH: couldn't get auxch %d\n",
2955 bios->display.output->i2c_index); 2921 bios->display.output->i2c_index);
2956 return false; 2922 return 0;
2957 } 2923 }
2958 2924
2959 if (!iexec->execute) 2925 if (!iexec->execute)
2960 return true; 2926 return len;
2961 2927
2962 offset += 6; 2928 offset += 6;
2963 for (i = 0; i < len; i++, offset++) { 2929 for (i = 0; i < count; i++, offset++) {
2964 ret = nouveau_dp_auxch(auxch, 8, addr, &bios->data[offset], 1); 2930 ret = nouveau_dp_auxch(auxch, 8, addr, &bios->data[offset], 1);
2965 if (ret) { 2931 if (ret) {
2966 NV_ERROR(dev, "INIT_ZM_AUXCH: wr auxch fail %d\n", ret); 2932 NV_ERROR(dev, "INIT_ZM_AUXCH: wr auxch fail %d\n", ret);
2967 return false; 2933 return 0;
2968 } 2934 }
2969 } 2935 }
2970 2936
2971 return true; 2937 return len;
2972} 2938}
2973 2939
2974static struct init_tbl_entry itbl_entry[] = { 2940static struct init_tbl_entry itbl_entry[] = {
2975 /* command name , id , length , offset , mult , command handler */ 2941 /* command name , id , length , offset , mult , command handler */
2976 /* INIT_PROG (0x31, 15, 10, 4) removed due to no example of use */ 2942 /* INIT_PROG (0x31, 15, 10, 4) removed due to no example of use */
2977 { "INIT_IO_RESTRICT_PROG" , 0x32, 11 , 6 , 4 , init_io_restrict_prog }, 2943 { "INIT_IO_RESTRICT_PROG" , 0x32, init_io_restrict_prog },
2978 { "INIT_REPEAT" , 0x33, 2 , 0 , 0 , init_repeat }, 2944 { "INIT_REPEAT" , 0x33, init_repeat },
2979 { "INIT_IO_RESTRICT_PLL" , 0x34, 12 , 7 , 2 , init_io_restrict_pll }, 2945 { "INIT_IO_RESTRICT_PLL" , 0x34, init_io_restrict_pll },
2980 { "INIT_END_REPEAT" , 0x36, 1 , 0 , 0 , init_end_repeat }, 2946 { "INIT_END_REPEAT" , 0x36, init_end_repeat },
2981 { "INIT_COPY" , 0x37, 11 , 0 , 0 , init_copy }, 2947 { "INIT_COPY" , 0x37, init_copy },
2982 { "INIT_NOT" , 0x38, 1 , 0 , 0 , init_not }, 2948 { "INIT_NOT" , 0x38, init_not },
2983 { "INIT_IO_FLAG_CONDITION" , 0x39, 2 , 0 , 0 , init_io_flag_condition }, 2949 { "INIT_IO_FLAG_CONDITION" , 0x39, init_io_flag_condition },
2984 { "INIT_INDEX_ADDRESS_LATCHED" , 0x49, 18 , 17 , 2 , init_idx_addr_latched }, 2950 { "INIT_INDEX_ADDRESS_LATCHED" , 0x49, init_idx_addr_latched },
2985 { "INIT_IO_RESTRICT_PLL2" , 0x4A, 11 , 6 , 4 , init_io_restrict_pll2 }, 2951 { "INIT_IO_RESTRICT_PLL2" , 0x4A, init_io_restrict_pll2 },
2986 { "INIT_PLL2" , 0x4B, 9 , 0 , 0 , init_pll2 }, 2952 { "INIT_PLL2" , 0x4B, init_pll2 },
2987 { "INIT_I2C_BYTE" , 0x4C, 4 , 3 , 3 , init_i2c_byte }, 2953 { "INIT_I2C_BYTE" , 0x4C, init_i2c_byte },
2988 { "INIT_ZM_I2C_BYTE" , 0x4D, 4 , 3 , 2 , init_zm_i2c_byte }, 2954 { "INIT_ZM_I2C_BYTE" , 0x4D, init_zm_i2c_byte },
2989 { "INIT_ZM_I2C" , 0x4E, 4 , 3 , 1 , init_zm_i2c }, 2955 { "INIT_ZM_I2C" , 0x4E, init_zm_i2c },
2990 { "INIT_TMDS" , 0x4F, 5 , 0 , 0 , init_tmds }, 2956 { "INIT_TMDS" , 0x4F, init_tmds },
2991 { "INIT_ZM_TMDS_GROUP" , 0x50, 3 , 2 , 2 , init_zm_tmds_group }, 2957 { "INIT_ZM_TMDS_GROUP" , 0x50, init_zm_tmds_group },
2992 { "INIT_CR_INDEX_ADDRESS_LATCHED" , 0x51, 5 , 4 , 1 , init_cr_idx_adr_latch }, 2958 { "INIT_CR_INDEX_ADDRESS_LATCHED" , 0x51, init_cr_idx_adr_latch },
2993 { "INIT_CR" , 0x52, 4 , 0 , 0 , init_cr }, 2959 { "INIT_CR" , 0x52, init_cr },
2994 { "INIT_ZM_CR" , 0x53, 3 , 0 , 0 , init_zm_cr }, 2960 { "INIT_ZM_CR" , 0x53, init_zm_cr },
2995 { "INIT_ZM_CR_GROUP" , 0x54, 2 , 1 , 2 , init_zm_cr_group }, 2961 { "INIT_ZM_CR_GROUP" , 0x54, init_zm_cr_group },
2996 { "INIT_CONDITION_TIME" , 0x56, 3 , 0 , 0 , init_condition_time }, 2962 { "INIT_CONDITION_TIME" , 0x56, init_condition_time },
2997 { "INIT_ZM_REG_SEQUENCE" , 0x58, 6 , 5 , 4 , init_zm_reg_sequence }, 2963 { "INIT_ZM_REG_SEQUENCE" , 0x58, init_zm_reg_sequence },
2998 /* INIT_INDIRECT_REG (0x5A, 7, 0, 0) removed due to no example of use */ 2964 /* INIT_INDIRECT_REG (0x5A, 7, 0, 0) removed due to no example of use */
2999 { "INIT_SUB_DIRECT" , 0x5B, 3 , 0 , 0 , init_sub_direct }, 2965 { "INIT_SUB_DIRECT" , 0x5B, init_sub_direct },
3000 { "INIT_COPY_NV_REG" , 0x5F, 22 , 0 , 0 , init_copy_nv_reg }, 2966 { "INIT_COPY_NV_REG" , 0x5F, init_copy_nv_reg },
3001 { "INIT_ZM_INDEX_IO" , 0x62, 5 , 0 , 0 , init_zm_index_io }, 2967 { "INIT_ZM_INDEX_IO" , 0x62, init_zm_index_io },
3002 { "INIT_COMPUTE_MEM" , 0x63, 1 , 0 , 0 , init_compute_mem }, 2968 { "INIT_COMPUTE_MEM" , 0x63, init_compute_mem },
3003 { "INIT_RESET" , 0x65, 13 , 0 , 0 , init_reset }, 2969 { "INIT_RESET" , 0x65, init_reset },
3004 { "INIT_CONFIGURE_MEM" , 0x66, 1 , 0 , 0 , init_configure_mem }, 2970 { "INIT_CONFIGURE_MEM" , 0x66, init_configure_mem },
3005 { "INIT_CONFIGURE_CLK" , 0x67, 1 , 0 , 0 , init_configure_clk }, 2971 { "INIT_CONFIGURE_CLK" , 0x67, init_configure_clk },
3006 { "INIT_CONFIGURE_PREINIT" , 0x68, 1 , 0 , 0 , init_configure_preinit }, 2972 { "INIT_CONFIGURE_PREINIT" , 0x68, init_configure_preinit },
3007 { "INIT_IO" , 0x69, 5 , 0 , 0 , init_io }, 2973 { "INIT_IO" , 0x69, init_io },
3008 { "INIT_SUB" , 0x6B, 2 , 0 , 0 , init_sub }, 2974 { "INIT_SUB" , 0x6B, init_sub },
3009 { "INIT_RAM_CONDITION" , 0x6D, 3 , 0 , 0 , init_ram_condition }, 2975 { "INIT_RAM_CONDITION" , 0x6D, init_ram_condition },
3010 { "INIT_NV_REG" , 0x6E, 13 , 0 , 0 , init_nv_reg }, 2976 { "INIT_NV_REG" , 0x6E, init_nv_reg },
3011 { "INIT_MACRO" , 0x6F, 2 , 0 , 0 , init_macro }, 2977 { "INIT_MACRO" , 0x6F, init_macro },
3012 { "INIT_DONE" , 0x71, 1 , 0 , 0 , init_done }, 2978 { "INIT_DONE" , 0x71, init_done },
3013 { "INIT_RESUME" , 0x72, 1 , 0 , 0 , init_resume }, 2979 { "INIT_RESUME" , 0x72, init_resume },
3014 /* INIT_RAM_CONDITION2 (0x73, 9, 0, 0) removed due to no example of use */ 2980 /* INIT_RAM_CONDITION2 (0x73, 9, 0, 0) removed due to no example of use */
3015 { "INIT_TIME" , 0x74, 3 , 0 , 0 , init_time }, 2981 { "INIT_TIME" , 0x74, init_time },
3016 { "INIT_CONDITION" , 0x75, 2 , 0 , 0 , init_condition }, 2982 { "INIT_CONDITION" , 0x75, init_condition },
3017 { "INIT_IO_CONDITION" , 0x76, 2 , 0 , 0 , init_io_condition }, 2983 { "INIT_IO_CONDITION" , 0x76, init_io_condition },
3018 { "INIT_INDEX_IO" , 0x78, 6 , 0 , 0 , init_index_io }, 2984 { "INIT_INDEX_IO" , 0x78, init_index_io },
3019 { "INIT_PLL" , 0x79, 7 , 0 , 0 , init_pll }, 2985 { "INIT_PLL" , 0x79, init_pll },
3020 { "INIT_ZM_REG" , 0x7A, 9 , 0 , 0 , init_zm_reg }, 2986 { "INIT_ZM_REG" , 0x7A, init_zm_reg },
3021 /* INIT_RAM_RESTRICT_PLL's length is adjusted by the BIT M table */ 2987 { "INIT_RAM_RESTRICT_PLL" , 0x87, init_ram_restrict_pll },
3022 { "INIT_RAM_RESTRICT_PLL" , 0x87, 2 , 0 , 0 , init_ram_restrict_pll }, 2988 { "INIT_8C" , 0x8C, init_8c },
3023 { "INIT_8C" , 0x8C, 1 , 0 , 0 , init_8c }, 2989 { "INIT_8D" , 0x8D, init_8d },
3024 { "INIT_8D" , 0x8D, 1 , 0 , 0 , init_8d }, 2990 { "INIT_GPIO" , 0x8E, init_gpio },
3025 { "INIT_GPIO" , 0x8E, 1 , 0 , 0 , init_gpio }, 2991 { "INIT_RAM_RESTRICT_ZM_REG_GROUP" , 0x8F, init_ram_restrict_zm_reg_group },
3026 /* INIT_RAM_RESTRICT_ZM_REG_GROUP's mult is loaded by M table in BIT */ 2992 { "INIT_COPY_ZM_REG" , 0x90, init_copy_zm_reg },
3027 { "INIT_RAM_RESTRICT_ZM_REG_GROUP" , 0x8F, 7 , 6 , 0 , init_ram_restrict_zm_reg_group }, 2993 { "INIT_ZM_REG_GROUP_ADDRESS_LATCHED" , 0x91, init_zm_reg_group_addr_latched },
3028 { "INIT_COPY_ZM_REG" , 0x90, 9 , 0 , 0 , init_copy_zm_reg }, 2994 { "INIT_RESERVED" , 0x92, init_reserved },
3029 { "INIT_ZM_REG_GROUP_ADDRESS_LATCHED" , 0x91, 6 , 5 , 4 , init_zm_reg_group_addr_latched }, 2995 { "INIT_96" , 0x96, init_96 },
3030 { "INIT_RESERVED" , 0x92, 1 , 0 , 0 , init_reserved }, 2996 { "INIT_97" , 0x97, init_97 },
3031 { "INIT_96" , 0x96, 17 , 0 , 0 , init_96 }, 2997 { "INIT_AUXCH" , 0x98, init_auxch },
3032 { "INIT_97" , 0x97, 13 , 0 , 0 , init_97 }, 2998 { "INIT_ZM_AUXCH" , 0x99, init_zm_auxch },
3033 { "INIT_AUXCH" , 0x98, 6 , 5 , 2 , init_auxch }, 2999 { NULL , 0 , NULL }
3034 { "INIT_ZM_AUXCH" , 0x99, 6 , 5 , 1 , init_zm_auxch },
3035 { NULL , 0 , 0 , 0 , 0 , NULL }
3036}; 3000};
3037 3001
3038static unsigned int get_init_table_entry_length(struct nvbios *bios, unsigned int offset, int i)
3039{
3040 /* Calculates the length of a given init table entry. */
3041 return itbl_entry[i].length + bios->data[offset + itbl_entry[i].length_offset]*itbl_entry[i].length_multiplier;
3042}
3043
3044#define MAX_TABLE_OPS 1000 3002#define MAX_TABLE_OPS 1000
3045 3003
3046static int 3004static int
@@ -3056,7 +3014,7 @@ parse_init_table(struct nvbios *bios, unsigned int offset,
3056 * is changed back to EXECUTE. 3014 * is changed back to EXECUTE.
3057 */ 3015 */
3058 3016
3059 int count = 0, i; 3017 int count = 0, i, res;
3060 uint8_t id; 3018 uint8_t id;
3061 3019
3062 /* 3020 /*
@@ -3076,22 +3034,21 @@ parse_init_table(struct nvbios *bios, unsigned int offset,
3076 offset, itbl_entry[i].id, itbl_entry[i].name); 3034 offset, itbl_entry[i].id, itbl_entry[i].name);
3077 3035
3078 /* execute eventual command handler */ 3036 /* execute eventual command handler */
3079 if (itbl_entry[i].handler) 3037 res = (*itbl_entry[i].handler)(bios, offset, iexec);
3080 if (!(*itbl_entry[i].handler)(bios, offset, iexec)) 3038 if (!res)
3081 break; 3039 break;
3040 /*
3041 * Add the offset of the current command including all data
3042 * of that command. The offset will then be pointing on the
3043 * next op code.
3044 */
3045 offset += res;
3082 } else { 3046 } else {
3083 NV_ERROR(bios->dev, 3047 NV_ERROR(bios->dev,
3084 "0x%04X: Init table command not found: " 3048 "0x%04X: Init table command not found: "
3085 "0x%02X\n", offset, id); 3049 "0x%02X\n", offset, id);
3086 return -ENOENT; 3050 return -ENOENT;
3087 } 3051 }
3088
3089 /*
3090 * Add the offset of the current command including all data
3091 * of that command. The offset will then be pointing on the
3092 * next op code.
3093 */
3094 offset += get_init_table_entry_length(bios, offset, i);
3095 } 3052 }
3096 3053
3097 if (offset >= bios->length) 3054 if (offset >= bios->length)
@@ -3198,16 +3155,25 @@ static int call_lvds_manufacturer_script(struct drm_device *dev, struct dcb_entr
3198 } 3155 }
3199#ifdef __powerpc__ 3156#ifdef __powerpc__
3200 /* Powerbook specific quirks */ 3157 /* Powerbook specific quirks */
3201 if (script == LVDS_RESET && ((dev->pci_device & 0xffff) == 0x0179 || (dev->pci_device & 0xffff) == 0x0329)) 3158 if ((dev->pci_device & 0xffff) == 0x0179 ||
3202 nv_write_tmds(dev, dcbent->or, 0, 0x02, 0x72); 3159 (dev->pci_device & 0xffff) == 0x0189 ||
3203 if ((dev->pci_device & 0xffff) == 0x0179 || (dev->pci_device & 0xffff) == 0x0189 || (dev->pci_device & 0xffff) == 0x0329) { 3160 (dev->pci_device & 0xffff) == 0x0329) {
3204 if (script == LVDS_PANEL_ON) { 3161 if (script == LVDS_RESET) {
3205 bios_wr32(bios, NV_PBUS_DEBUG_DUALHEAD_CTL, bios_rd32(bios, NV_PBUS_DEBUG_DUALHEAD_CTL) | (1 << 31)); 3162 nv_write_tmds(dev, dcbent->or, 0, 0x02, 0x72);
3206 bios_wr32(bios, NV_PCRTC_GPIO_EXT, bios_rd32(bios, NV_PCRTC_GPIO_EXT) | 1); 3163
3207 } 3164 } else if (script == LVDS_PANEL_ON) {
3208 if (script == LVDS_PANEL_OFF) { 3165 bios_wr32(bios, NV_PBUS_DEBUG_DUALHEAD_CTL,
3209 bios_wr32(bios, NV_PBUS_DEBUG_DUALHEAD_CTL, bios_rd32(bios, NV_PBUS_DEBUG_DUALHEAD_CTL) & ~(1 << 31)); 3166 bios_rd32(bios, NV_PBUS_DEBUG_DUALHEAD_CTL)
3210 bios_wr32(bios, NV_PCRTC_GPIO_EXT, bios_rd32(bios, NV_PCRTC_GPIO_EXT) & ~3); 3167 | (1 << 31));
3168 bios_wr32(bios, NV_PCRTC_GPIO_EXT,
3169 bios_rd32(bios, NV_PCRTC_GPIO_EXT) | 1);
3170
3171 } else if (script == LVDS_PANEL_OFF) {
3172 bios_wr32(bios, NV_PBUS_DEBUG_DUALHEAD_CTL,
3173 bios_rd32(bios, NV_PBUS_DEBUG_DUALHEAD_CTL)
3174 & ~(1 << 31));
3175 bios_wr32(bios, NV_PCRTC_GPIO_EXT,
3176 bios_rd32(bios, NV_PCRTC_GPIO_EXT) & ~3);
3211 } 3177 }
3212 } 3178 }
3213#endif 3179#endif
@@ -3799,7 +3765,6 @@ nouveau_bios_run_display_table(struct drm_device *dev, struct dcb_entry *dcbent,
3799 */ 3765 */
3800 3766
3801 struct drm_nouveau_private *dev_priv = dev->dev_private; 3767 struct drm_nouveau_private *dev_priv = dev->dev_private;
3802 struct init_exec iexec = {true, false};
3803 struct nvbios *bios = &dev_priv->VBIOS; 3768 struct nvbios *bios = &dev_priv->VBIOS;
3804 uint8_t *table = &bios->data[bios->display.script_table_ptr]; 3769 uint8_t *table = &bios->data[bios->display.script_table_ptr];
3805 uint8_t *otable = NULL; 3770 uint8_t *otable = NULL;
@@ -3854,7 +3819,7 @@ nouveau_bios_run_display_table(struct drm_device *dev, struct dcb_entry *dcbent,
3854 * script tables is a pointer to the script to execute. 3819 * script tables is a pointer to the script to execute.
3855 */ 3820 */
3856 3821
3857 NV_DEBUG(dev, "Searching for output entry for %d %d %d\n", 3822 NV_DEBUG_KMS(dev, "Searching for output entry for %d %d %d\n",
3858 dcbent->type, dcbent->location, dcbent->or); 3823 dcbent->type, dcbent->location, dcbent->or);
3859 otable = bios_output_config_match(dev, dcbent, table[1] + 3824 otable = bios_output_config_match(dev, dcbent, table[1] +
3860 bios->display.script_table_ptr, 3825 bios->display.script_table_ptr,
@@ -3879,27 +3844,25 @@ nouveau_bios_run_display_table(struct drm_device *dev, struct dcb_entry *dcbent,
3879 } 3844 }
3880 } 3845 }
3881 3846
3882 bios->display.output = dcbent;
3883
3884 if (pxclk == 0) { 3847 if (pxclk == 0) {
3885 script = ROM16(otable[6]); 3848 script = ROM16(otable[6]);
3886 if (!script) { 3849 if (!script) {
3887 NV_DEBUG(dev, "output script 0 not found\n"); 3850 NV_DEBUG_KMS(dev, "output script 0 not found\n");
3888 return 1; 3851 return 1;
3889 } 3852 }
3890 3853
3891 NV_TRACE(dev, "0x%04X: parsing output script 0\n", script); 3854 NV_TRACE(dev, "0x%04X: parsing output script 0\n", script);
3892 parse_init_table(bios, script, &iexec); 3855 nouveau_bios_run_init_table(dev, script, dcbent);
3893 } else 3856 } else
3894 if (pxclk == -1) { 3857 if (pxclk == -1) {
3895 script = ROM16(otable[8]); 3858 script = ROM16(otable[8]);
3896 if (!script) { 3859 if (!script) {
3897 NV_DEBUG(dev, "output script 1 not found\n"); 3860 NV_DEBUG_KMS(dev, "output script 1 not found\n");
3898 return 1; 3861 return 1;
3899 } 3862 }
3900 3863
3901 NV_TRACE(dev, "0x%04X: parsing output script 1\n", script); 3864 NV_TRACE(dev, "0x%04X: parsing output script 1\n", script);
3902 parse_init_table(bios, script, &iexec); 3865 nouveau_bios_run_init_table(dev, script, dcbent);
3903 } else 3866 } else
3904 if (pxclk == -2) { 3867 if (pxclk == -2) {
3905 if (table[4] >= 12) 3868 if (table[4] >= 12)
@@ -3907,12 +3870,12 @@ nouveau_bios_run_display_table(struct drm_device *dev, struct dcb_entry *dcbent,
3907 else 3870 else
3908 script = 0; 3871 script = 0;
3909 if (!script) { 3872 if (!script) {
3910 NV_DEBUG(dev, "output script 2 not found\n"); 3873 NV_DEBUG_KMS(dev, "output script 2 not found\n");
3911 return 1; 3874 return 1;
3912 } 3875 }
3913 3876
3914 NV_TRACE(dev, "0x%04X: parsing output script 2\n", script); 3877 NV_TRACE(dev, "0x%04X: parsing output script 2\n", script);
3915 parse_init_table(bios, script, &iexec); 3878 nouveau_bios_run_init_table(dev, script, dcbent);
3916 } else 3879 } else
3917 if (pxclk > 0) { 3880 if (pxclk > 0) {
3918 script = ROM16(otable[table[4] + i*6 + 2]); 3881 script = ROM16(otable[table[4] + i*6 + 2]);
@@ -3924,19 +3887,19 @@ nouveau_bios_run_display_table(struct drm_device *dev, struct dcb_entry *dcbent,
3924 } 3887 }
3925 3888
3926 NV_TRACE(dev, "0x%04X: parsing clock script 0\n", script); 3889 NV_TRACE(dev, "0x%04X: parsing clock script 0\n", script);
3927 parse_init_table(bios, script, &iexec); 3890 nouveau_bios_run_init_table(dev, script, dcbent);
3928 } else 3891 } else
3929 if (pxclk < 0) { 3892 if (pxclk < 0) {
3930 script = ROM16(otable[table[4] + i*6 + 4]); 3893 script = ROM16(otable[table[4] + i*6 + 4]);
3931 if (script) 3894 if (script)
3932 script = clkcmptable(bios, script, -pxclk); 3895 script = clkcmptable(bios, script, -pxclk);
3933 if (!script) { 3896 if (!script) {
3934 NV_DEBUG(dev, "clock script 1 not found\n"); 3897 NV_DEBUG_KMS(dev, "clock script 1 not found\n");
3935 return 1; 3898 return 1;
3936 } 3899 }
3937 3900
3938 NV_TRACE(dev, "0x%04X: parsing clock script 1\n", script); 3901 NV_TRACE(dev, "0x%04X: parsing clock script 1\n", script);
3939 parse_init_table(bios, script, &iexec); 3902 nouveau_bios_run_init_table(dev, script, dcbent);
3940 } 3903 }
3941 3904
3942 return 0; 3905 return 0;
@@ -4606,10 +4569,6 @@ parse_bit_M_tbl_entry(struct drm_device *dev, struct nvbios *bios,
4606 * stuff that we don't use - their use currently unknown 4569 * stuff that we don't use - their use currently unknown
4607 */ 4570 */
4608 4571
4609 uint16_t rr_strap_xlat;
4610 uint8_t rr_group_count;
4611 int i;
4612
4613 /* 4572 /*
4614 * Older bios versions don't have a sufficiently long table for 4573 * Older bios versions don't have a sufficiently long table for
4615 * what we want 4574 * what we want
@@ -4618,24 +4577,13 @@ parse_bit_M_tbl_entry(struct drm_device *dev, struct nvbios *bios,
4618 return 0; 4577 return 0;
4619 4578
4620 if (bitentry->id[1] < 2) { 4579 if (bitentry->id[1] < 2) {
4621 rr_group_count = bios->data[bitentry->offset + 2]; 4580 bios->ram_restrict_group_count = bios->data[bitentry->offset + 2];
4622 rr_strap_xlat = ROM16(bios->data[bitentry->offset + 3]); 4581 bios->ram_restrict_tbl_ptr = ROM16(bios->data[bitentry->offset + 3]);
4623 } else { 4582 } else {
4624 rr_group_count = bios->data[bitentry->offset + 0]; 4583 bios->ram_restrict_group_count = bios->data[bitentry->offset + 0];
4625 rr_strap_xlat = ROM16(bios->data[bitentry->offset + 1]); 4584 bios->ram_restrict_tbl_ptr = ROM16(bios->data[bitentry->offset + 1]);
4626 } 4585 }
4627 4586
4628 /* adjust length of INIT_87 */
4629 for (i = 0; itbl_entry[i].name && (itbl_entry[i].id != 0x87); i++);
4630 itbl_entry[i].length += rr_group_count * 4;
4631
4632 /* set up multiplier for INIT_RAM_RESTRICT_ZM_REG_GROUP */
4633 for (; itbl_entry[i].name && (itbl_entry[i].id != 0x8f); i++);
4634 itbl_entry[i].length_multiplier = rr_group_count * 4;
4635
4636 init_ram_restrict_zm_reg_group_blocklen = itbl_entry[i].length_multiplier;
4637 bios->ram_restrict_tbl_ptr = rr_strap_xlat;
4638
4639 return 0; 4587 return 0;
4640} 4588}
4641 4589
@@ -5234,7 +5182,7 @@ parse_dcb_connector_table(struct nvbios *bios)
5234 int i; 5182 int i;
5235 5183
5236 if (!bios->bdcb.connector_table_ptr) { 5184 if (!bios->bdcb.connector_table_ptr) {
5237 NV_DEBUG(dev, "No DCB connector table present\n"); 5185 NV_DEBUG_KMS(dev, "No DCB connector table present\n");
5238 return; 5186 return;
5239 } 5187 }
5240 5188
@@ -5451,52 +5399,49 @@ static bool
5451parse_dcb15_entry(struct drm_device *dev, struct parsed_dcb *dcb, 5399parse_dcb15_entry(struct drm_device *dev, struct parsed_dcb *dcb,
5452 uint32_t conn, uint32_t conf, struct dcb_entry *entry) 5400 uint32_t conn, uint32_t conf, struct dcb_entry *entry)
5453{ 5401{
5454 if (conn != 0xf0003f00 && conn != 0xf2247f10 && conn != 0xf2204001 && 5402 switch (conn & 0x0000000f) {
5455 conn != 0xf2204301 && conn != 0xf2204311 && conn != 0xf2208001 && 5403 case 0:
5456 conn != 0xf2244001 && conn != 0xf2244301 && conn != 0xf2244311 && 5404 entry->type = OUTPUT_ANALOG;
5457 conn != 0xf4204011 && conn != 0xf4208011 && conn != 0xf4248011 && 5405 break;
5458 conn != 0xf2045ff2 && conn != 0xf2045f14 && conn != 0xf207df14 && 5406 case 1:
5459 conn != 0xf2205004 && conn != 0xf2209004) { 5407 entry->type = OUTPUT_TV;
5460 NV_ERROR(dev, "Unknown DCB 1.5 entry, please report\n"); 5408 break;
5461 5409 case 2:
5462 /* cause output setting to fail for !TV, so message is seen */ 5410 case 3:
5463 if ((conn & 0xf) != 0x1)
5464 dcb->entries = 0;
5465
5466 return false;
5467 }
5468 /* most of the below is a "best guess" atm */
5469 entry->type = conn & 0xf;
5470 if (entry->type == 2)
5471 /* another way of specifying straps based lvds... */
5472 entry->type = OUTPUT_LVDS; 5411 entry->type = OUTPUT_LVDS;
5473 if (entry->type == 4) { /* digital */ 5412 break;
5474 if (conn & 0x10) 5413 case 4:
5475 entry->type = OUTPUT_LVDS; 5414 switch ((conn & 0x000000f0) >> 4) {
5476 else 5415 case 0:
5477 entry->type = OUTPUT_TMDS; 5416 entry->type = OUTPUT_TMDS;
5417 break;
5418 case 1:
5419 entry->type = OUTPUT_LVDS;
5420 break;
5421 default:
5422 NV_ERROR(dev, "Unknown DCB subtype 4/%d\n",
5423 (conn & 0x000000f0) >> 4);
5424 return false;
5425 }
5426 break;
5427 default:
5428 NV_ERROR(dev, "Unknown DCB type %d\n", conn & 0x0000000f);
5429 return false;
5478 } 5430 }
5479 /* what's in bits 5-13? could be some encoder maker thing, in tv case */ 5431
5480 entry->i2c_index = (conn >> 14) & 0xf; 5432 entry->i2c_index = (conn & 0x0003c000) >> 14;
5481 /* raw heads field is in range 0-1, so move to 1-2 */ 5433 entry->heads = ((conn & 0x001c0000) >> 18) + 1;
5482 entry->heads = ((conn >> 18) & 0x7) + 1; 5434 entry->or = entry->heads; /* same as heads, hopefully safe enough */
5483 entry->location = (conn >> 21) & 0xf; 5435 entry->location = (conn & 0x01e00000) >> 21;
5484 /* unused: entry->bus = (conn >> 25) & 0x7; */ 5436 entry->bus = (conn & 0x0e000000) >> 25;
5485 /* set or to be same as heads -- hopefully safe enough */
5486 entry->or = entry->heads;
5487 entry->duallink_possible = false; 5437 entry->duallink_possible = false;
5488 5438
5489 switch (entry->type) { 5439 switch (entry->type) {
5490 case OUTPUT_ANALOG: 5440 case OUTPUT_ANALOG:
5491 entry->crtconf.maxfreq = (conf & 0xffff) * 10; 5441 entry->crtconf.maxfreq = (conf & 0xffff) * 10;
5492 break; 5442 break;
5493 case OUTPUT_LVDS: 5443 case OUTPUT_TV:
5494 /* 5444 entry->tvconf.has_component_output = false;
5495 * This is probably buried in conn's unknown bits.
5496 * This will upset EDID-ful models, if they exist
5497 */
5498 entry->lvdsconf.use_straps_for_mode = true;
5499 entry->lvdsconf.use_power_scripts = true;
5500 break; 5445 break;
5501 case OUTPUT_TMDS: 5446 case OUTPUT_TMDS:
5502 /* 5447 /*
@@ -5505,8 +5450,12 @@ parse_dcb15_entry(struct drm_device *dev, struct parsed_dcb *dcb,
5505 */ 5450 */
5506 fabricate_vga_output(dcb, entry->i2c_index, entry->heads); 5451 fabricate_vga_output(dcb, entry->i2c_index, entry->heads);
5507 break; 5452 break;
5508 case OUTPUT_TV: 5453 case OUTPUT_LVDS:
5509 entry->tvconf.has_component_output = false; 5454 if ((conn & 0x00003f00) != 0x10)
5455 entry->lvdsconf.use_straps_for_mode = true;
5456 entry->lvdsconf.use_power_scripts = true;
5457 break;
5458 default:
5510 break; 5459 break;
5511 } 5460 }
5512 5461
@@ -5581,11 +5530,13 @@ void merge_like_dcb_entries(struct drm_device *dev, struct parsed_dcb *dcb)
5581 dcb->entries = newentries; 5530 dcb->entries = newentries;
5582} 5531}
5583 5532
5584static int parse_dcb_table(struct drm_device *dev, struct nvbios *bios, bool twoHeads) 5533static int
5534parse_dcb_table(struct drm_device *dev, struct nvbios *bios, bool twoHeads)
5585{ 5535{
5536 struct drm_nouveau_private *dev_priv = dev->dev_private;
5586 struct bios_parsed_dcb *bdcb = &bios->bdcb; 5537 struct bios_parsed_dcb *bdcb = &bios->bdcb;
5587 struct parsed_dcb *dcb; 5538 struct parsed_dcb *dcb;
5588 uint16_t dcbptr, i2ctabptr = 0; 5539 uint16_t dcbptr = 0, i2ctabptr = 0;
5589 uint8_t *dcbtable; 5540 uint8_t *dcbtable;
5590 uint8_t headerlen = 0x4, entries = DCB_MAX_NUM_ENTRIES; 5541 uint8_t headerlen = 0x4, entries = DCB_MAX_NUM_ENTRIES;
5591 bool configblock = true; 5542 bool configblock = true;
@@ -5596,16 +5547,18 @@ static int parse_dcb_table(struct drm_device *dev, struct nvbios *bios, bool two
5596 dcb->entries = 0; 5547 dcb->entries = 0;
5597 5548
5598 /* get the offset from 0x36 */ 5549 /* get the offset from 0x36 */
5599 dcbptr = ROM16(bios->data[0x36]); 5550 if (dev_priv->card_type > NV_04) {
5551 dcbptr = ROM16(bios->data[0x36]);
5552 if (dcbptr == 0x0000)
5553 NV_WARN(dev, "No output data (DCB) found in BIOS\n");
5554 }
5600 5555
5556 /* this situation likely means a really old card, pre DCB */
5601 if (dcbptr == 0x0) { 5557 if (dcbptr == 0x0) {
5602 NV_WARN(dev, "No output data (DCB) found in BIOS, " 5558 NV_INFO(dev, "Assuming a CRT output exists\n");
5603 "assuming a CRT output exists\n");
5604 /* this situation likely means a really old card, pre DCB */
5605 fabricate_vga_output(dcb, LEGACY_I2C_CRT, 1); 5559 fabricate_vga_output(dcb, LEGACY_I2C_CRT, 1);
5606 5560
5607 if (nv04_tv_identify(dev, 5561 if (nv04_tv_identify(dev, bios->legacy.i2c_indices.tv) >= 0)
5608 bios->legacy.i2c_indices.tv) >= 0)
5609 fabricate_tv_output(dcb, twoHeads); 5562 fabricate_tv_output(dcb, twoHeads);
5610 5563
5611 return 0; 5564 return 0;
@@ -5909,9 +5862,11 @@ nouveau_bios_run_init_table(struct drm_device *dev, uint16_t table,
5909 struct nvbios *bios = &dev_priv->VBIOS; 5862 struct nvbios *bios = &dev_priv->VBIOS;
5910 struct init_exec iexec = { true, false }; 5863 struct init_exec iexec = { true, false };
5911 5864
5865 mutex_lock(&bios->lock);
5912 bios->display.output = dcbent; 5866 bios->display.output = dcbent;
5913 parse_init_table(bios, table, &iexec); 5867 parse_init_table(bios, table, &iexec);
5914 bios->display.output = NULL; 5868 bios->display.output = NULL;
5869 mutex_unlock(&bios->lock);
5915} 5870}
5916 5871
5917static bool NVInitVBIOS(struct drm_device *dev) 5872static bool NVInitVBIOS(struct drm_device *dev)
@@ -5920,6 +5875,7 @@ static bool NVInitVBIOS(struct drm_device *dev)
5920 struct nvbios *bios = &dev_priv->VBIOS; 5875 struct nvbios *bios = &dev_priv->VBIOS;
5921 5876
5922 memset(bios, 0, sizeof(struct nvbios)); 5877 memset(bios, 0, sizeof(struct nvbios));
5878 mutex_init(&bios->lock);
5923 bios->dev = dev; 5879 bios->dev = dev;
5924 5880
5925 if (!NVShadowVBIOS(dev, bios->data)) 5881 if (!NVShadowVBIOS(dev, bios->data))
diff --git a/drivers/gpu/drm/nouveau/nouveau_bios.h b/drivers/gpu/drm/nouveau/nouveau_bios.h
index 1d5f10bd78ed..fd94bd6dc264 100644
--- a/drivers/gpu/drm/nouveau/nouveau_bios.h
+++ b/drivers/gpu/drm/nouveau/nouveau_bios.h
@@ -205,6 +205,8 @@ struct nvbios {
205 struct drm_device *dev; 205 struct drm_device *dev;
206 struct nouveau_bios_info pub; 206 struct nouveau_bios_info pub;
207 207
208 struct mutex lock;
209
208 uint8_t data[NV_PROM_SIZE]; 210 uint8_t data[NV_PROM_SIZE];
209 unsigned int length; 211 unsigned int length;
210 bool execute; 212 bool execute;
@@ -227,6 +229,7 @@ struct nvbios {
227 229
228 uint16_t pll_limit_tbl_ptr; 230 uint16_t pll_limit_tbl_ptr;
229 uint16_t ram_restrict_tbl_ptr; 231 uint16_t ram_restrict_tbl_ptr;
232 uint8_t ram_restrict_group_count;
230 233
231 uint16_t some_script_ptr; /* BIT I + 14 */ 234 uint16_t some_script_ptr; /* BIT I + 14 */
232 uint16_t init96_tbl_ptr; /* BIT I + 16 */ 235 uint16_t init96_tbl_ptr; /* BIT I + 16 */
diff --git a/drivers/gpu/drm/nouveau/nouveau_bo.c b/drivers/gpu/drm/nouveau/nouveau_bo.c
index 320a14bceb99..028719fddf76 100644
--- a/drivers/gpu/drm/nouveau/nouveau_bo.c
+++ b/drivers/gpu/drm/nouveau/nouveau_bo.c
@@ -33,10 +33,13 @@
33#include "nouveau_drv.h" 33#include "nouveau_drv.h"
34#include "nouveau_dma.h" 34#include "nouveau_dma.h"
35 35
36#include <linux/log2.h>
37
36static void 38static void
37nouveau_bo_del_ttm(struct ttm_buffer_object *bo) 39nouveau_bo_del_ttm(struct ttm_buffer_object *bo)
38{ 40{
39 struct drm_nouveau_private *dev_priv = nouveau_bdev(bo->bdev); 41 struct drm_nouveau_private *dev_priv = nouveau_bdev(bo->bdev);
42 struct drm_device *dev = dev_priv->dev;
40 struct nouveau_bo *nvbo = nouveau_bo(bo); 43 struct nouveau_bo *nvbo = nouveau_bo(bo);
41 44
42 ttm_bo_kunmap(&nvbo->kmap); 45 ttm_bo_kunmap(&nvbo->kmap);
@@ -44,12 +47,87 @@ nouveau_bo_del_ttm(struct ttm_buffer_object *bo)
44 if (unlikely(nvbo->gem)) 47 if (unlikely(nvbo->gem))
45 DRM_ERROR("bo %p still attached to GEM object\n", bo); 48 DRM_ERROR("bo %p still attached to GEM object\n", bo);
46 49
50 if (nvbo->tile)
51 nv10_mem_expire_tiling(dev, nvbo->tile, NULL);
52
47 spin_lock(&dev_priv->ttm.bo_list_lock); 53 spin_lock(&dev_priv->ttm.bo_list_lock);
48 list_del(&nvbo->head); 54 list_del(&nvbo->head);
49 spin_unlock(&dev_priv->ttm.bo_list_lock); 55 spin_unlock(&dev_priv->ttm.bo_list_lock);
50 kfree(nvbo); 56 kfree(nvbo);
51} 57}
52 58
59static void
60nouveau_bo_fixup_align(struct drm_device *dev,
61 uint32_t tile_mode, uint32_t tile_flags,
62 int *align, int *size)
63{
64 struct drm_nouveau_private *dev_priv = dev->dev_private;
65
66 /*
67 * Some of the tile_flags have a periodic structure of N*4096 bytes,
68 * align to to that as well as the page size. Align the size to the
69 * appropriate boundaries. This does imply that sizes are rounded up
70 * 3-7 pages, so be aware of this and do not waste memory by allocating
71 * many small buffers.
72 */
73 if (dev_priv->card_type == NV_50) {
74 uint32_t block_size = nouveau_mem_fb_amount(dev) >> 15;
75 int i;
76
77 switch (tile_flags) {
78 case 0x1800:
79 case 0x2800:
80 case 0x4800:
81 case 0x7a00:
82 if (is_power_of_2(block_size)) {
83 for (i = 1; i < 10; i++) {
84 *align = 12 * i * block_size;
85 if (!(*align % 65536))
86 break;
87 }
88 } else {
89 for (i = 1; i < 10; i++) {
90 *align = 8 * i * block_size;
91 if (!(*align % 65536))
92 break;
93 }
94 }
95 *size = roundup(*size, *align);
96 break;
97 default:
98 break;
99 }
100
101 } else {
102 if (tile_mode) {
103 if (dev_priv->chipset >= 0x40) {
104 *align = 65536;
105 *size = roundup(*size, 64 * tile_mode);
106
107 } else if (dev_priv->chipset >= 0x30) {
108 *align = 32768;
109 *size = roundup(*size, 64 * tile_mode);
110
111 } else if (dev_priv->chipset >= 0x20) {
112 *align = 16384;
113 *size = roundup(*size, 64 * tile_mode);
114
115 } else if (dev_priv->chipset >= 0x10) {
116 *align = 16384;
117 *size = roundup(*size, 32 * tile_mode);
118 }
119 }
120 }
121
122 /* ALIGN works only on powers of two. */
123 *size = roundup(*size, PAGE_SIZE);
124
125 if (dev_priv->card_type == NV_50) {
126 *size = roundup(*size, 65536);
127 *align = max(65536, *align);
128 }
129}
130
53int 131int
54nouveau_bo_new(struct drm_device *dev, struct nouveau_channel *chan, 132nouveau_bo_new(struct drm_device *dev, struct nouveau_channel *chan,
55 int size, int align, uint32_t flags, uint32_t tile_mode, 133 int size, int align, uint32_t flags, uint32_t tile_mode,
@@ -58,7 +136,7 @@ nouveau_bo_new(struct drm_device *dev, struct nouveau_channel *chan,
58{ 136{
59 struct drm_nouveau_private *dev_priv = dev->dev_private; 137 struct drm_nouveau_private *dev_priv = dev->dev_private;
60 struct nouveau_bo *nvbo; 138 struct nouveau_bo *nvbo;
61 int ret, n = 0; 139 int ret = 0;
62 140
63 nvbo = kzalloc(sizeof(struct nouveau_bo), GFP_KERNEL); 141 nvbo = kzalloc(sizeof(struct nouveau_bo), GFP_KERNEL);
64 if (!nvbo) 142 if (!nvbo)
@@ -70,59 +148,14 @@ nouveau_bo_new(struct drm_device *dev, struct nouveau_channel *chan,
70 nvbo->tile_mode = tile_mode; 148 nvbo->tile_mode = tile_mode;
71 nvbo->tile_flags = tile_flags; 149 nvbo->tile_flags = tile_flags;
72 150
73 /* 151 nouveau_bo_fixup_align(dev, tile_mode, tile_flags, &align, &size);
74 * Some of the tile_flags have a periodic structure of N*4096 bytes,
75 * align to to that as well as the page size. Overallocate memory to
76 * avoid corruption of other buffer objects.
77 */
78 switch (tile_flags) {
79 case 0x1800:
80 case 0x2800:
81 case 0x4800:
82 case 0x7a00:
83 if (dev_priv->chipset >= 0xA0) {
84 /* This is based on high end cards with 448 bits
85 * memory bus, could be different elsewhere.*/
86 size += 6 * 28672;
87 /* 8 * 28672 is the actual alignment requirement,
88 * but we must also align to page size. */
89 align = 2 * 8 * 28672;
90 } else if (dev_priv->chipset >= 0x90) {
91 size += 3 * 16384;
92 align = 12 * 16834;
93 } else {
94 size += 3 * 8192;
95 /* 12 * 8192 is the actual alignment requirement,
96 * but we must also align to page size. */
97 align = 2 * 12 * 8192;
98 }
99 break;
100 default:
101 break;
102 }
103
104 align >>= PAGE_SHIFT; 152 align >>= PAGE_SHIFT;
105 153
106 size = (size + (PAGE_SIZE - 1)) & ~(PAGE_SIZE - 1);
107 if (dev_priv->card_type == NV_50) {
108 size = (size + 65535) & ~65535;
109 if (align < (65536 / PAGE_SIZE))
110 align = (65536 / PAGE_SIZE);
111 }
112
113 if (flags & TTM_PL_FLAG_VRAM)
114 nvbo->placements[n++] = TTM_PL_FLAG_VRAM | TTM_PL_MASK_CACHING;
115 if (flags & TTM_PL_FLAG_TT)
116 nvbo->placements[n++] = TTM_PL_FLAG_TT | TTM_PL_MASK_CACHING;
117 nvbo->placement.fpfn = 0; 154 nvbo->placement.fpfn = 0;
118 nvbo->placement.lpfn = mappable ? dev_priv->fb_mappable_pages : 0; 155 nvbo->placement.lpfn = mappable ? dev_priv->fb_mappable_pages : 0;
119 nvbo->placement.placement = nvbo->placements; 156 nouveau_bo_placement_set(nvbo, flags);
120 nvbo->placement.busy_placement = nvbo->placements;
121 nvbo->placement.num_placement = n;
122 nvbo->placement.num_busy_placement = n;
123 157
124 nvbo->channel = chan; 158 nvbo->channel = chan;
125 nouveau_bo_placement_set(nvbo, flags);
126 ret = ttm_bo_init(&dev_priv->ttm.bdev, &nvbo->bo, size, 159 ret = ttm_bo_init(&dev_priv->ttm.bdev, &nvbo->bo, size,
127 ttm_bo_type_device, &nvbo->placement, align, 0, 160 ttm_bo_type_device, &nvbo->placement, align, 0,
128 false, NULL, size, nouveau_bo_del_ttm); 161 false, NULL, size, nouveau_bo_del_ttm);
@@ -154,6 +187,11 @@ nouveau_bo_placement_set(struct nouveau_bo *nvbo, uint32_t memtype)
154 nvbo->placement.busy_placement = nvbo->placements; 187 nvbo->placement.busy_placement = nvbo->placements;
155 nvbo->placement.num_placement = n; 188 nvbo->placement.num_placement = n;
156 nvbo->placement.num_busy_placement = n; 189 nvbo->placement.num_busy_placement = n;
190
191 if (nvbo->pin_refcnt) {
192 while (n--)
193 nvbo->placements[n] |= TTM_PL_FLAG_NO_EVICT;
194 }
157} 195}
158 196
159int 197int
@@ -311,8 +349,10 @@ nouveau_bo_create_ttm_backend_entry(struct ttm_bo_device *bdev)
311 struct drm_device *dev = dev_priv->dev; 349 struct drm_device *dev = dev_priv->dev;
312 350
313 switch (dev_priv->gart_info.type) { 351 switch (dev_priv->gart_info.type) {
352#if __OS_HAS_AGP
314 case NOUVEAU_GART_AGP: 353 case NOUVEAU_GART_AGP:
315 return ttm_agp_backend_init(bdev, dev->agp->bridge); 354 return ttm_agp_backend_init(bdev, dev->agp->bridge);
355#endif
316 case NOUVEAU_GART_SGDMA: 356 case NOUVEAU_GART_SGDMA:
317 return nouveau_sgdma_init_ttm(dev); 357 return nouveau_sgdma_init_ttm(dev);
318 default: 358 default:
@@ -398,16 +438,23 @@ nouveau_bo_evict_flags(struct ttm_buffer_object *bo, struct ttm_placement *pl)
398 struct nouveau_bo *nvbo = nouveau_bo(bo); 438 struct nouveau_bo *nvbo = nouveau_bo(bo);
399 439
400 switch (bo->mem.mem_type) { 440 switch (bo->mem.mem_type) {
441 case TTM_PL_VRAM:
442 nouveau_bo_placement_set(nvbo, TTM_PL_FLAG_TT |
443 TTM_PL_FLAG_SYSTEM);
444 break;
401 default: 445 default:
402 nouveau_bo_placement_set(nvbo, TTM_PL_FLAG_SYSTEM); 446 nouveau_bo_placement_set(nvbo, TTM_PL_FLAG_SYSTEM);
403 break; 447 break;
404 } 448 }
449
450 *pl = nvbo->placement;
405} 451}
406 452
407 453
408/* GPU-assisted copy using NV_MEMORY_TO_MEMORY_FORMAT, can access 454/* GPU-assisted copy using NV_MEMORY_TO_MEMORY_FORMAT, can access
409 * TTM_PL_{VRAM,TT} directly. 455 * TTM_PL_{VRAM,TT} directly.
410 */ 456 */
457
411static int 458static int
412nouveau_bo_move_accel_cleanup(struct nouveau_channel *chan, 459nouveau_bo_move_accel_cleanup(struct nouveau_channel *chan,
413 struct nouveau_bo *nvbo, bool evict, bool no_wait, 460 struct nouveau_bo *nvbo, bool evict, bool no_wait,
@@ -422,6 +469,8 @@ nouveau_bo_move_accel_cleanup(struct nouveau_channel *chan,
422 469
423 ret = ttm_bo_move_accel_cleanup(&nvbo->bo, fence, NULL, 470 ret = ttm_bo_move_accel_cleanup(&nvbo->bo, fence, NULL,
424 evict, no_wait, new_mem); 471 evict, no_wait, new_mem);
472 if (nvbo->channel && nvbo->channel != chan)
473 ret = nouveau_fence_wait(fence, NULL, false, false);
425 nouveau_fence_unref((void *)&fence); 474 nouveau_fence_unref((void *)&fence);
426 return ret; 475 return ret;
427} 476}
@@ -442,22 +491,20 @@ nouveau_bo_mem_ctxdma(struct nouveau_bo *nvbo, struct nouveau_channel *chan,
442} 491}
443 492
444static int 493static int
445nouveau_bo_move_m2mf(struct ttm_buffer_object *bo, int evict, int no_wait, 494nouveau_bo_move_m2mf(struct ttm_buffer_object *bo, int evict, bool intr,
446 struct ttm_mem_reg *old_mem, struct ttm_mem_reg *new_mem) 495 int no_wait, struct ttm_mem_reg *new_mem)
447{ 496{
448 struct nouveau_bo *nvbo = nouveau_bo(bo); 497 struct nouveau_bo *nvbo = nouveau_bo(bo);
449 struct drm_nouveau_private *dev_priv = nouveau_bdev(bo->bdev); 498 struct drm_nouveau_private *dev_priv = nouveau_bdev(bo->bdev);
499 struct ttm_mem_reg *old_mem = &bo->mem;
450 struct nouveau_channel *chan; 500 struct nouveau_channel *chan;
451 uint64_t src_offset, dst_offset; 501 uint64_t src_offset, dst_offset;
452 uint32_t page_count; 502 uint32_t page_count;
453 int ret; 503 int ret;
454 504
455 chan = nvbo->channel; 505 chan = nvbo->channel;
456 if (!chan || nvbo->tile_flags || nvbo->no_vm) { 506 if (!chan || nvbo->tile_flags || nvbo->no_vm)
457 chan = dev_priv->channel; 507 chan = dev_priv->channel;
458 if (!chan)
459 return -EINVAL;
460 }
461 508
462 src_offset = old_mem->mm_node->start << PAGE_SHIFT; 509 src_offset = old_mem->mm_node->start << PAGE_SHIFT;
463 dst_offset = new_mem->mm_node->start << PAGE_SHIFT; 510 dst_offset = new_mem->mm_node->start << PAGE_SHIFT;
@@ -537,7 +584,7 @@ nouveau_bo_move_flipd(struct ttm_buffer_object *bo, bool evict, bool intr,
537 584
538 placement.fpfn = placement.lpfn = 0; 585 placement.fpfn = placement.lpfn = 0;
539 placement.num_placement = placement.num_busy_placement = 1; 586 placement.num_placement = placement.num_busy_placement = 1;
540 placement.placement = &placement_memtype; 587 placement.placement = placement.busy_placement = &placement_memtype;
541 588
542 tmp_mem = *new_mem; 589 tmp_mem = *new_mem;
543 tmp_mem.mm_node = NULL; 590 tmp_mem.mm_node = NULL;
@@ -549,7 +596,7 @@ nouveau_bo_move_flipd(struct ttm_buffer_object *bo, bool evict, bool intr,
549 if (ret) 596 if (ret)
550 goto out; 597 goto out;
551 598
552 ret = nouveau_bo_move_m2mf(bo, true, no_wait, &bo->mem, &tmp_mem); 599 ret = nouveau_bo_move_m2mf(bo, true, intr, no_wait, &tmp_mem);
553 if (ret) 600 if (ret)
554 goto out; 601 goto out;
555 602
@@ -575,7 +622,7 @@ nouveau_bo_move_flips(struct ttm_buffer_object *bo, bool evict, bool intr,
575 622
576 placement.fpfn = placement.lpfn = 0; 623 placement.fpfn = placement.lpfn = 0;
577 placement.num_placement = placement.num_busy_placement = 1; 624 placement.num_placement = placement.num_busy_placement = 1;
578 placement.placement = &placement_memtype; 625 placement.placement = placement.busy_placement = &placement_memtype;
579 626
580 tmp_mem = *new_mem; 627 tmp_mem = *new_mem;
581 tmp_mem.mm_node = NULL; 628 tmp_mem.mm_node = NULL;
@@ -587,7 +634,7 @@ nouveau_bo_move_flips(struct ttm_buffer_object *bo, bool evict, bool intr,
587 if (ret) 634 if (ret)
588 goto out; 635 goto out;
589 636
590 ret = nouveau_bo_move_m2mf(bo, true, no_wait, &bo->mem, new_mem); 637 ret = nouveau_bo_move_m2mf(bo, evict, intr, no_wait, new_mem);
591 if (ret) 638 if (ret)
592 goto out; 639 goto out;
593 640
@@ -602,51 +649,106 @@ out:
602} 649}
603 650
604static int 651static int
605nouveau_bo_move(struct ttm_buffer_object *bo, bool evict, bool intr, 652nouveau_bo_vm_bind(struct ttm_buffer_object *bo, struct ttm_mem_reg *new_mem,
606 bool no_wait, struct ttm_mem_reg *new_mem) 653 struct nouveau_tile_reg **new_tile)
607{ 654{
608 struct drm_nouveau_private *dev_priv = nouveau_bdev(bo->bdev); 655 struct drm_nouveau_private *dev_priv = nouveau_bdev(bo->bdev);
609 struct nouveau_bo *nvbo = nouveau_bo(bo);
610 struct drm_device *dev = dev_priv->dev; 656 struct drm_device *dev = dev_priv->dev;
611 struct ttm_mem_reg *old_mem = &bo->mem; 657 struct nouveau_bo *nvbo = nouveau_bo(bo);
658 uint64_t offset;
612 int ret; 659 int ret;
613 660
614 if (dev_priv->card_type == NV_50 && new_mem->mem_type == TTM_PL_VRAM && 661 if (nvbo->no_vm || new_mem->mem_type != TTM_PL_VRAM) {
615 !nvbo->no_vm) { 662 /* Nothing to do. */
616 uint64_t offset = new_mem->mm_node->start << PAGE_SHIFT; 663 *new_tile = NULL;
664 return 0;
665 }
666
667 offset = new_mem->mm_node->start << PAGE_SHIFT;
617 668
669 if (dev_priv->card_type == NV_50) {
618 ret = nv50_mem_vm_bind_linear(dev, 670 ret = nv50_mem_vm_bind_linear(dev,
619 offset + dev_priv->vm_vram_base, 671 offset + dev_priv->vm_vram_base,
620 new_mem->size, nvbo->tile_flags, 672 new_mem->size, nvbo->tile_flags,
621 offset); 673 offset);
622 if (ret) 674 if (ret)
623 return ret; 675 return ret;
676
677 } else if (dev_priv->card_type >= NV_10) {
678 *new_tile = nv10_mem_set_tiling(dev, offset, new_mem->size,
679 nvbo->tile_mode);
624 } 680 }
625 681
626 if (dev_priv->init_state != NOUVEAU_CARD_INIT_DONE) 682 return 0;
627 return ttm_bo_move_memcpy(bo, evict, no_wait, new_mem); 683}
684
685static void
686nouveau_bo_vm_cleanup(struct ttm_buffer_object *bo,
687 struct nouveau_tile_reg *new_tile,
688 struct nouveau_tile_reg **old_tile)
689{
690 struct drm_nouveau_private *dev_priv = nouveau_bdev(bo->bdev);
691 struct drm_device *dev = dev_priv->dev;
692
693 if (dev_priv->card_type >= NV_10 &&
694 dev_priv->card_type < NV_50) {
695 if (*old_tile)
696 nv10_mem_expire_tiling(dev, *old_tile, bo->sync_obj);
628 697
698 *old_tile = new_tile;
699 }
700}
701
702static int
703nouveau_bo_move(struct ttm_buffer_object *bo, bool evict, bool intr,
704 bool no_wait, struct ttm_mem_reg *new_mem)
705{
706 struct drm_nouveau_private *dev_priv = nouveau_bdev(bo->bdev);
707 struct nouveau_bo *nvbo = nouveau_bo(bo);
708 struct ttm_mem_reg *old_mem = &bo->mem;
709 struct nouveau_tile_reg *new_tile = NULL;
710 int ret = 0;
711
712 ret = nouveau_bo_vm_bind(bo, new_mem, &new_tile);
713 if (ret)
714 return ret;
715
716 /* Software copy if the card isn't up and running yet. */
717 if (dev_priv->init_state != NOUVEAU_CARD_INIT_DONE ||
718 !dev_priv->channel) {
719 ret = ttm_bo_move_memcpy(bo, evict, no_wait, new_mem);
720 goto out;
721 }
722
723 /* Fake bo copy. */
629 if (old_mem->mem_type == TTM_PL_SYSTEM && !bo->ttm) { 724 if (old_mem->mem_type == TTM_PL_SYSTEM && !bo->ttm) {
630 BUG_ON(bo->mem.mm_node != NULL); 725 BUG_ON(bo->mem.mm_node != NULL);
631 bo->mem = *new_mem; 726 bo->mem = *new_mem;
632 new_mem->mm_node = NULL; 727 new_mem->mm_node = NULL;
633 return 0; 728 goto out;
634 } 729 }
635 730
636 if (new_mem->mem_type == TTM_PL_SYSTEM) { 731 /* Hardware assisted copy. */
637 if (old_mem->mem_type == TTM_PL_SYSTEM) 732 if (new_mem->mem_type == TTM_PL_SYSTEM)
638 return ttm_bo_move_memcpy(bo, evict, no_wait, new_mem); 733 ret = nouveau_bo_move_flipd(bo, evict, intr, no_wait, new_mem);
639 if (nouveau_bo_move_flipd(bo, evict, intr, no_wait, new_mem)) 734 else if (old_mem->mem_type == TTM_PL_SYSTEM)
640 return ttm_bo_move_memcpy(bo, evict, no_wait, new_mem); 735 ret = nouveau_bo_move_flips(bo, evict, intr, no_wait, new_mem);
641 } else if (old_mem->mem_type == TTM_PL_SYSTEM) { 736 else
642 if (nouveau_bo_move_flips(bo, evict, intr, no_wait, new_mem)) 737 ret = nouveau_bo_move_m2mf(bo, evict, intr, no_wait, new_mem);
643 return ttm_bo_move_memcpy(bo, evict, no_wait, new_mem);
644 } else {
645 if (nouveau_bo_move_m2mf(bo, evict, no_wait, old_mem, new_mem))
646 return ttm_bo_move_memcpy(bo, evict, no_wait, new_mem);
647 }
648 738
649 return 0; 739 if (!ret)
740 goto out;
741
742 /* Fallback to software copy. */
743 ret = ttm_bo_move_memcpy(bo, evict, no_wait, new_mem);
744
745out:
746 if (ret)
747 nouveau_bo_vm_cleanup(bo, NULL, &new_tile);
748 else
749 nouveau_bo_vm_cleanup(bo, new_tile, &nvbo->tile);
750
751 return ret;
650} 752}
651 753
652static int 754static int
diff --git a/drivers/gpu/drm/nouveau/nouveau_channel.c b/drivers/gpu/drm/nouveau/nouveau_channel.c
index 9aaa972f8822..2281f99da7fc 100644
--- a/drivers/gpu/drm/nouveau/nouveau_channel.c
+++ b/drivers/gpu/drm/nouveau/nouveau_channel.c
@@ -158,6 +158,8 @@ nouveau_channel_alloc(struct drm_device *dev, struct nouveau_channel **chan_ret,
158 return ret; 158 return ret;
159 } 159 }
160 160
161 nouveau_dma_pre_init(chan);
162
161 /* Locate channel's user control regs */ 163 /* Locate channel's user control regs */
162 if (dev_priv->card_type < NV_40) 164 if (dev_priv->card_type < NV_40)
163 user = NV03_USER(channel); 165 user = NV03_USER(channel);
@@ -235,47 +237,6 @@ nouveau_channel_alloc(struct drm_device *dev, struct nouveau_channel **chan_ret,
235 return 0; 237 return 0;
236} 238}
237 239
238int
239nouveau_channel_idle(struct nouveau_channel *chan)
240{
241 struct drm_device *dev = chan->dev;
242 struct drm_nouveau_private *dev_priv = dev->dev_private;
243 struct nouveau_engine *engine = &dev_priv->engine;
244 uint32_t caches;
245 int idle;
246
247 if (!chan) {
248 NV_ERROR(dev, "no channel...\n");
249 return 1;
250 }
251
252 caches = nv_rd32(dev, NV03_PFIFO_CACHES);
253 nv_wr32(dev, NV03_PFIFO_CACHES, caches & ~1);
254
255 if (engine->fifo.channel_id(dev) != chan->id) {
256 struct nouveau_gpuobj *ramfc =
257 chan->ramfc ? chan->ramfc->gpuobj : NULL;
258
259 if (!ramfc) {
260 NV_ERROR(dev, "No RAMFC for channel %d\n", chan->id);
261 return 1;
262 }
263
264 engine->instmem.prepare_access(dev, false);
265 if (nv_ro32(dev, ramfc, 0) != nv_ro32(dev, ramfc, 1))
266 idle = 0;
267 else
268 idle = 1;
269 engine->instmem.finish_access(dev);
270 } else {
271 idle = (nv_rd32(dev, NV04_PFIFO_CACHE1_DMA_GET) ==
272 nv_rd32(dev, NV04_PFIFO_CACHE1_DMA_PUT));
273 }
274
275 nv_wr32(dev, NV03_PFIFO_CACHES, caches);
276 return idle;
277}
278
279/* stops a fifo */ 240/* stops a fifo */
280void 241void
281nouveau_channel_free(struct nouveau_channel *chan) 242nouveau_channel_free(struct nouveau_channel *chan)
@@ -317,12 +278,11 @@ nouveau_channel_free(struct nouveau_channel *chan)
317 /* Ensure the channel is no longer active on the GPU */ 278 /* Ensure the channel is no longer active on the GPU */
318 pfifo->reassign(dev, false); 279 pfifo->reassign(dev, false);
319 280
320 if (pgraph->channel(dev) == chan) { 281 pgraph->fifo_access(dev, false);
321 pgraph->fifo_access(dev, false); 282 if (pgraph->channel(dev) == chan)
322 pgraph->unload_context(dev); 283 pgraph->unload_context(dev);
323 pgraph->fifo_access(dev, true);
324 }
325 pgraph->destroy_context(chan); 284 pgraph->destroy_context(chan);
285 pgraph->fifo_access(dev, true);
326 286
327 if (pfifo->channel_id(dev) == chan->id) { 287 if (pfifo->channel_id(dev) == chan->id) {
328 pfifo->disable(dev); 288 pfifo->disable(dev);
@@ -414,7 +374,9 @@ nouveau_ioctl_fifo_alloc(struct drm_device *dev, void *data,
414 init->subchan[0].grclass = 0x0039; 374 init->subchan[0].grclass = 0x0039;
415 else 375 else
416 init->subchan[0].grclass = 0x5039; 376 init->subchan[0].grclass = 0x5039;
417 init->nr_subchan = 1; 377 init->subchan[1].handle = NvSw;
378 init->subchan[1].grclass = NV_SW;
379 init->nr_subchan = 2;
418 380
419 /* Named memory object area */ 381 /* Named memory object area */
420 ret = drm_gem_handle_create(file_priv, chan->notifier_bo->gem, 382 ret = drm_gem_handle_create(file_priv, chan->notifier_bo->gem,
diff --git a/drivers/gpu/drm/nouveau/nouveau_connector.c b/drivers/gpu/drm/nouveau/nouveau_connector.c
index 032cf098fa1c..d2f63353ea97 100644
--- a/drivers/gpu/drm/nouveau/nouveau_connector.c
+++ b/drivers/gpu/drm/nouveau/nouveau_connector.c
@@ -24,9 +24,12 @@
24 * 24 *
25 */ 25 */
26 26
27#include <acpi/button.h>
28
27#include "drmP.h" 29#include "drmP.h"
28#include "drm_edid.h" 30#include "drm_edid.h"
29#include "drm_crtc_helper.h" 31#include "drm_crtc_helper.h"
32
30#include "nouveau_reg.h" 33#include "nouveau_reg.h"
31#include "nouveau_drv.h" 34#include "nouveau_drv.h"
32#include "nouveau_encoder.h" 35#include "nouveau_encoder.h"
@@ -83,14 +86,17 @@ nouveau_encoder_connector_get(struct nouveau_encoder *encoder)
83static void 86static void
84nouveau_connector_destroy(struct drm_connector *drm_connector) 87nouveau_connector_destroy(struct drm_connector *drm_connector)
85{ 88{
86 struct nouveau_connector *connector = nouveau_connector(drm_connector); 89 struct nouveau_connector *nv_connector =
87 struct drm_device *dev = connector->base.dev; 90 nouveau_connector(drm_connector);
91 struct drm_device *dev;
88 92
89 NV_DEBUG(dev, "\n"); 93 if (!nv_connector)
90
91 if (!connector)
92 return; 94 return;
93 95
96 dev = nv_connector->base.dev;
97 NV_DEBUG_KMS(dev, "\n");
98
99 kfree(nv_connector->edid);
94 drm_sysfs_connector_remove(drm_connector); 100 drm_sysfs_connector_remove(drm_connector);
95 drm_connector_cleanup(drm_connector); 101 drm_connector_cleanup(drm_connector);
96 kfree(drm_connector); 102 kfree(drm_connector);
@@ -233,10 +239,21 @@ nouveau_connector_detect(struct drm_connector *connector)
233 if (connector->connector_type == DRM_MODE_CONNECTOR_LVDS) 239 if (connector->connector_type == DRM_MODE_CONNECTOR_LVDS)
234 nv_encoder = find_encoder_by_type(connector, OUTPUT_LVDS); 240 nv_encoder = find_encoder_by_type(connector, OUTPUT_LVDS);
235 if (nv_encoder && nv_connector->native_mode) { 241 if (nv_encoder && nv_connector->native_mode) {
242#ifdef CONFIG_ACPI
243 if (!nouveau_ignorelid && !acpi_lid_open())
244 return connector_status_disconnected;
245#endif
236 nouveau_connector_set_encoder(connector, nv_encoder); 246 nouveau_connector_set_encoder(connector, nv_encoder);
237 return connector_status_connected; 247 return connector_status_connected;
238 } 248 }
239 249
250 /* Cleanup the previous EDID block. */
251 if (nv_connector->edid) {
252 drm_mode_connector_update_edid_property(connector, NULL);
253 kfree(nv_connector->edid);
254 nv_connector->edid = NULL;
255 }
256
240 i2c = nouveau_connector_ddc_detect(connector, &nv_encoder); 257 i2c = nouveau_connector_ddc_detect(connector, &nv_encoder);
241 if (i2c) { 258 if (i2c) {
242 nouveau_connector_ddc_prepare(connector, &flags); 259 nouveau_connector_ddc_prepare(connector, &flags);
@@ -247,7 +264,7 @@ nouveau_connector_detect(struct drm_connector *connector)
247 if (!nv_connector->edid) { 264 if (!nv_connector->edid) {
248 NV_ERROR(dev, "DDC responded, but no EDID for %s\n", 265 NV_ERROR(dev, "DDC responded, but no EDID for %s\n",
249 drm_get_connector_name(connector)); 266 drm_get_connector_name(connector));
250 return connector_status_disconnected; 267 goto detect_analog;
251 } 268 }
252 269
253 if (nv_encoder->dcb->type == OUTPUT_DP && 270 if (nv_encoder->dcb->type == OUTPUT_DP &&
@@ -281,6 +298,7 @@ nouveau_connector_detect(struct drm_connector *connector)
281 return connector_status_connected; 298 return connector_status_connected;
282 } 299 }
283 300
301detect_analog:
284 nv_encoder = find_encoder_by_type(connector, OUTPUT_ANALOG); 302 nv_encoder = find_encoder_by_type(connector, OUTPUT_ANALOG);
285 if (!nv_encoder) 303 if (!nv_encoder)
286 nv_encoder = find_encoder_by_type(connector, OUTPUT_TV); 304 nv_encoder = find_encoder_by_type(connector, OUTPUT_TV);
@@ -420,7 +438,7 @@ nouveau_connector_native_mode(struct nouveau_connector *connector)
420 /* Use preferred mode if there is one.. */ 438 /* Use preferred mode if there is one.. */
421 list_for_each_entry(mode, &connector->base.probed_modes, head) { 439 list_for_each_entry(mode, &connector->base.probed_modes, head) {
422 if (mode->type & DRM_MODE_TYPE_PREFERRED) { 440 if (mode->type & DRM_MODE_TYPE_PREFERRED) {
423 NV_DEBUG(dev, "native mode from preferred\n"); 441 NV_DEBUG_KMS(dev, "native mode from preferred\n");
424 return drm_mode_duplicate(dev, mode); 442 return drm_mode_duplicate(dev, mode);
425 } 443 }
426 } 444 }
@@ -445,7 +463,7 @@ nouveau_connector_native_mode(struct nouveau_connector *connector)
445 largest = mode; 463 largest = mode;
446 } 464 }
447 465
448 NV_DEBUG(dev, "native mode from largest: %dx%d@%d\n", 466 NV_DEBUG_KMS(dev, "native mode from largest: %dx%d@%d\n",
449 high_w, high_h, high_v); 467 high_w, high_h, high_v);
450 return largest ? drm_mode_duplicate(dev, largest) : NULL; 468 return largest ? drm_mode_duplicate(dev, largest) : NULL;
451} 469}
@@ -687,8 +705,12 @@ nouveau_connector_create_lvds(struct drm_device *dev,
687 */ 705 */
688 if (!nv_connector->edid && !nv_connector->native_mode && 706 if (!nv_connector->edid && !nv_connector->native_mode &&
689 !dev_priv->VBIOS.pub.fp_no_ddc) { 707 !dev_priv->VBIOS.pub.fp_no_ddc) {
690 nv_connector->edid = 708 struct edid *edid =
691 (struct edid *)nouveau_bios_embedded_edid(dev); 709 (struct edid *)nouveau_bios_embedded_edid(dev);
710 if (edid) {
711 nv_connector->edid = kmalloc(EDID_LENGTH, GFP_KERNEL);
712 *(nv_connector->edid) = *edid;
713 }
692 } 714 }
693 715
694 if (!nv_connector->edid) 716 if (!nv_connector->edid)
@@ -725,7 +747,7 @@ nouveau_connector_create(struct drm_device *dev, int index, int type)
725 struct drm_encoder *encoder; 747 struct drm_encoder *encoder;
726 int ret; 748 int ret;
727 749
728 NV_DEBUG(dev, "\n"); 750 NV_DEBUG_KMS(dev, "\n");
729 751
730 nv_connector = kzalloc(sizeof(*nv_connector), GFP_KERNEL); 752 nv_connector = kzalloc(sizeof(*nv_connector), GFP_KERNEL);
731 if (!nv_connector) 753 if (!nv_connector)
diff --git a/drivers/gpu/drm/nouveau/nouveau_dma.c b/drivers/gpu/drm/nouveau/nouveau_dma.c
index 703553687b20..50d9e67745af 100644
--- a/drivers/gpu/drm/nouveau/nouveau_dma.c
+++ b/drivers/gpu/drm/nouveau/nouveau_dma.c
@@ -29,12 +29,22 @@
29#include "nouveau_drv.h" 29#include "nouveau_drv.h"
30#include "nouveau_dma.h" 30#include "nouveau_dma.h"
31 31
32void
33nouveau_dma_pre_init(struct nouveau_channel *chan)
34{
35 chan->dma.max = (chan->pushbuf_bo->bo.mem.size >> 2) - 2;
36 chan->dma.put = 0;
37 chan->dma.cur = chan->dma.put;
38 chan->dma.free = chan->dma.max - chan->dma.cur;
39}
40
32int 41int
33nouveau_dma_init(struct nouveau_channel *chan) 42nouveau_dma_init(struct nouveau_channel *chan)
34{ 43{
35 struct drm_device *dev = chan->dev; 44 struct drm_device *dev = chan->dev;
36 struct drm_nouveau_private *dev_priv = dev->dev_private; 45 struct drm_nouveau_private *dev_priv = dev->dev_private;
37 struct nouveau_gpuobj *m2mf = NULL; 46 struct nouveau_gpuobj *m2mf = NULL;
47 struct nouveau_gpuobj *nvsw = NULL;
38 int ret, i; 48 int ret, i;
39 49
40 /* Create NV_MEMORY_TO_MEMORY_FORMAT for buffer moves */ 50 /* Create NV_MEMORY_TO_MEMORY_FORMAT for buffer moves */
@@ -47,6 +57,15 @@ nouveau_dma_init(struct nouveau_channel *chan)
47 if (ret) 57 if (ret)
48 return ret; 58 return ret;
49 59
60 /* Create an NV_SW object for various sync purposes */
61 ret = nouveau_gpuobj_sw_new(chan, NV_SW, &nvsw);
62 if (ret)
63 return ret;
64
65 ret = nouveau_gpuobj_ref_add(dev, chan, NvSw, nvsw, NULL);
66 if (ret)
67 return ret;
68
50 /* NV_MEMORY_TO_MEMORY_FORMAT requires a notifier object */ 69 /* NV_MEMORY_TO_MEMORY_FORMAT requires a notifier object */
51 ret = nouveau_notifier_alloc(chan, NvNotify0, 32, &chan->m2mf_ntfy); 70 ret = nouveau_notifier_alloc(chan, NvNotify0, 32, &chan->m2mf_ntfy);
52 if (ret) 71 if (ret)
@@ -64,12 +83,6 @@ nouveau_dma_init(struct nouveau_channel *chan)
64 return ret; 83 return ret;
65 } 84 }
66 85
67 /* Initialise DMA vars */
68 chan->dma.max = (chan->pushbuf_bo->bo.mem.size >> 2) - 2;
69 chan->dma.put = 0;
70 chan->dma.cur = chan->dma.put;
71 chan->dma.free = chan->dma.max - chan->dma.cur;
72
73 /* Insert NOPS for NOUVEAU_DMA_SKIPS */ 86 /* Insert NOPS for NOUVEAU_DMA_SKIPS */
74 ret = RING_SPACE(chan, NOUVEAU_DMA_SKIPS); 87 ret = RING_SPACE(chan, NOUVEAU_DMA_SKIPS);
75 if (ret) 88 if (ret)
@@ -87,6 +100,13 @@ nouveau_dma_init(struct nouveau_channel *chan)
87 BEGIN_RING(chan, NvSubM2MF, NV_MEMORY_TO_MEMORY_FORMAT_DMA_NOTIFY, 1); 100 BEGIN_RING(chan, NvSubM2MF, NV_MEMORY_TO_MEMORY_FORMAT_DMA_NOTIFY, 1);
88 OUT_RING(chan, NvNotify0); 101 OUT_RING(chan, NvNotify0);
89 102
103 /* Initialise NV_SW */
104 ret = RING_SPACE(chan, 2);
105 if (ret)
106 return ret;
107 BEGIN_RING(chan, NvSubSw, 0, 1);
108 OUT_RING(chan, NvSw);
109
90 /* Sit back and pray the channel works.. */ 110 /* Sit back and pray the channel works.. */
91 FIRE_RING(chan); 111 FIRE_RING(chan);
92 112
@@ -106,47 +126,52 @@ OUT_RINGp(struct nouveau_channel *chan, const void *data, unsigned nr_dwords)
106 chan->dma.cur += nr_dwords; 126 chan->dma.cur += nr_dwords;
107} 127}
108 128
109static inline bool 129/* Fetch and adjust GPU GET pointer
110READ_GET(struct nouveau_channel *chan, uint32_t *get) 130 *
131 * Returns:
132 * value >= 0, the adjusted GET pointer
133 * -EINVAL if GET pointer currently outside main push buffer
134 * -EBUSY if timeout exceeded
135 */
136static inline int
137READ_GET(struct nouveau_channel *chan, uint32_t *prev_get, uint32_t *timeout)
111{ 138{
112 uint32_t val; 139 uint32_t val;
113 140
114 val = nvchan_rd32(chan, chan->user_get); 141 val = nvchan_rd32(chan, chan->user_get);
115 if (val < chan->pushbuf_base || 142
116 val >= chan->pushbuf_base + chan->pushbuf_bo->bo.mem.size) { 143 /* reset counter as long as GET is still advancing, this is
117 /* meaningless to dma_wait() except to know whether the 144 * to avoid misdetecting a GPU lockup if the GPU happens to
118 * GPU has stalled or not 145 * just be processing an operation that takes a long time
119 */ 146 */
120 *get = val; 147 if (val != *prev_get) {
121 return false; 148 *prev_get = val;
149 *timeout = 0;
150 }
151
152 if ((++*timeout & 0xff) == 0) {
153 DRM_UDELAY(1);
154 if (*timeout > 100000)
155 return -EBUSY;
122 } 156 }
123 157
124 *get = (val - chan->pushbuf_base) >> 2; 158 if (val < chan->pushbuf_base ||
125 return true; 159 val > chan->pushbuf_base + (chan->dma.max << 2))
160 return -EINVAL;
161
162 return (val - chan->pushbuf_base) >> 2;
126} 163}
127 164
128int 165int
129nouveau_dma_wait(struct nouveau_channel *chan, int size) 166nouveau_dma_wait(struct nouveau_channel *chan, int size)
130{ 167{
131 uint32_t get, prev_get = 0, cnt = 0; 168 uint32_t prev_get = 0, cnt = 0;
132 bool get_valid; 169 int get;
133 170
134 while (chan->dma.free < size) { 171 while (chan->dma.free < size) {
135 /* reset counter as long as GET is still advancing, this is 172 get = READ_GET(chan, &prev_get, &cnt);
136 * to avoid misdetecting a GPU lockup if the GPU happens to 173 if (unlikely(get == -EBUSY))
137 * just be processing an operation that takes a long time 174 return -EBUSY;
138 */
139 get_valid = READ_GET(chan, &get);
140 if (get != prev_get) {
141 prev_get = get;
142 cnt = 0;
143 }
144
145 if ((++cnt & 0xff) == 0) {
146 DRM_UDELAY(1);
147 if (cnt > 100000)
148 return -EBUSY;
149 }
150 175
151 /* loop until we have a usable GET pointer. the value 176 /* loop until we have a usable GET pointer. the value
152 * we read from the GPU may be outside the main ring if 177 * we read from the GPU may be outside the main ring if
@@ -157,7 +182,7 @@ nouveau_dma_wait(struct nouveau_channel *chan, int size)
157 * from the SKIPS area, so the code below doesn't have to deal 182 * from the SKIPS area, so the code below doesn't have to deal
158 * with some fun corner cases. 183 * with some fun corner cases.
159 */ 184 */
160 if (!get_valid || get < NOUVEAU_DMA_SKIPS) 185 if (unlikely(get == -EINVAL) || get < NOUVEAU_DMA_SKIPS)
161 continue; 186 continue;
162 187
163 if (get <= chan->dma.cur) { 188 if (get <= chan->dma.cur) {
@@ -183,6 +208,19 @@ nouveau_dma_wait(struct nouveau_channel *chan, int size)
183 * after processing the currently pending commands. 208 * after processing the currently pending commands.
184 */ 209 */
185 OUT_RING(chan, chan->pushbuf_base | 0x20000000); 210 OUT_RING(chan, chan->pushbuf_base | 0x20000000);
211
212 /* wait for GET to depart from the skips area.
213 * prevents writing GET==PUT and causing a race
214 * condition that causes us to think the GPU is
215 * idle when it's not.
216 */
217 do {
218 get = READ_GET(chan, &prev_get, &cnt);
219 if (unlikely(get == -EBUSY))
220 return -EBUSY;
221 if (unlikely(get == -EINVAL))
222 continue;
223 } while (get <= NOUVEAU_DMA_SKIPS);
186 WRITE_PUT(NOUVEAU_DMA_SKIPS); 224 WRITE_PUT(NOUVEAU_DMA_SKIPS);
187 225
188 /* we're now submitting commands at the start of 226 /* we're now submitting commands at the start of
diff --git a/drivers/gpu/drm/nouveau/nouveau_dma.h b/drivers/gpu/drm/nouveau/nouveau_dma.h
index 04e85d8f757e..dabfd655f93e 100644
--- a/drivers/gpu/drm/nouveau/nouveau_dma.h
+++ b/drivers/gpu/drm/nouveau/nouveau_dma.h
@@ -46,10 +46,11 @@
46/* Hardcoded object assignments to subchannels (subchannel id). */ 46/* Hardcoded object assignments to subchannels (subchannel id). */
47enum { 47enum {
48 NvSubM2MF = 0, 48 NvSubM2MF = 0,
49 NvSub2D = 1, 49 NvSubSw = 1,
50 NvSubCtxSurf2D = 1, 50 NvSub2D = 2,
51 NvSubGdiRect = 2, 51 NvSubCtxSurf2D = 2,
52 NvSubImageBlit = 3 52 NvSubGdiRect = 3,
53 NvSubImageBlit = 4
53}; 54};
54 55
55/* Object handles. */ 56/* Object handles. */
@@ -67,6 +68,7 @@ enum {
67 NvClipRect = 0x8000000b, 68 NvClipRect = 0x8000000b,
68 NvGdiRect = 0x8000000c, 69 NvGdiRect = 0x8000000c,
69 NvImageBlit = 0x8000000d, 70 NvImageBlit = 0x8000000d,
71 NvSw = 0x8000000e,
70 72
71 /* G80+ display objects */ 73 /* G80+ display objects */
72 NvEvoVRAM = 0x01000000, 74 NvEvoVRAM = 0x01000000,
diff --git a/drivers/gpu/drm/nouveau/nouveau_dp.c b/drivers/gpu/drm/nouveau/nouveau_dp.c
index de61f4640e12..f954ad93e81f 100644
--- a/drivers/gpu/drm/nouveau/nouveau_dp.c
+++ b/drivers/gpu/drm/nouveau/nouveau_dp.c
@@ -187,7 +187,7 @@ nouveau_dp_link_train_adjust(struct drm_encoder *encoder, uint8_t *config)
187 if (ret) 187 if (ret)
188 return false; 188 return false;
189 189
190 NV_DEBUG(dev, "\t\tadjust 0x%02x 0x%02x\n", request[0], request[1]); 190 NV_DEBUG_KMS(dev, "\t\tadjust 0x%02x 0x%02x\n", request[0], request[1]);
191 191
192 /* Keep all lanes at the same level.. */ 192 /* Keep all lanes at the same level.. */
193 for (i = 0; i < nv_encoder->dp.link_nr; i++) { 193 for (i = 0; i < nv_encoder->dp.link_nr; i++) {
@@ -228,7 +228,7 @@ nouveau_dp_link_train_commit(struct drm_encoder *encoder, uint8_t *config)
228 int or = nv_encoder->or, link = !(nv_encoder->dcb->sorconf.link & 1); 228 int or = nv_encoder->or, link = !(nv_encoder->dcb->sorconf.link & 1);
229 int dpe_headerlen, ret, i; 229 int dpe_headerlen, ret, i;
230 230
231 NV_DEBUG(dev, "\t\tconfig 0x%02x 0x%02x 0x%02x 0x%02x\n", 231 NV_DEBUG_KMS(dev, "\t\tconfig 0x%02x 0x%02x 0x%02x 0x%02x\n",
232 config[0], config[1], config[2], config[3]); 232 config[0], config[1], config[2], config[3]);
233 233
234 dpe = nouveau_bios_dp_table(dev, nv_encoder->dcb, &dpe_headerlen); 234 dpe = nouveau_bios_dp_table(dev, nv_encoder->dcb, &dpe_headerlen);
@@ -276,12 +276,12 @@ nouveau_dp_link_train(struct drm_encoder *encoder)
276 bool cr_done, cr_max_vs, eq_done; 276 bool cr_done, cr_max_vs, eq_done;
277 int ret = 0, i, tries, voltage; 277 int ret = 0, i, tries, voltage;
278 278
279 NV_DEBUG(dev, "link training!!\n"); 279 NV_DEBUG_KMS(dev, "link training!!\n");
280train: 280train:
281 cr_done = eq_done = false; 281 cr_done = eq_done = false;
282 282
283 /* set link configuration */ 283 /* set link configuration */
284 NV_DEBUG(dev, "\tbegin train: bw %d, lanes %d\n", 284 NV_DEBUG_KMS(dev, "\tbegin train: bw %d, lanes %d\n",
285 nv_encoder->dp.link_bw, nv_encoder->dp.link_nr); 285 nv_encoder->dp.link_bw, nv_encoder->dp.link_nr);
286 286
287 ret = nouveau_dp_link_bw_set(encoder, nv_encoder->dp.link_bw); 287 ret = nouveau_dp_link_bw_set(encoder, nv_encoder->dp.link_bw);
@@ -297,7 +297,7 @@ train:
297 return false; 297 return false;
298 298
299 /* clock recovery */ 299 /* clock recovery */
300 NV_DEBUG(dev, "\tbegin cr\n"); 300 NV_DEBUG_KMS(dev, "\tbegin cr\n");
301 ret = nouveau_dp_link_train_set(encoder, DP_TRAINING_PATTERN_1); 301 ret = nouveau_dp_link_train_set(encoder, DP_TRAINING_PATTERN_1);
302 if (ret) 302 if (ret)
303 goto stop; 303 goto stop;
@@ -314,7 +314,7 @@ train:
314 ret = auxch_rd(encoder, DP_LANE0_1_STATUS, status, 2); 314 ret = auxch_rd(encoder, DP_LANE0_1_STATUS, status, 2);
315 if (ret) 315 if (ret)
316 break; 316 break;
317 NV_DEBUG(dev, "\t\tstatus: 0x%02x 0x%02x\n", 317 NV_DEBUG_KMS(dev, "\t\tstatus: 0x%02x 0x%02x\n",
318 status[0], status[1]); 318 status[0], status[1]);
319 319
320 cr_done = true; 320 cr_done = true;
@@ -346,7 +346,7 @@ train:
346 goto stop; 346 goto stop;
347 347
348 /* channel equalisation */ 348 /* channel equalisation */
349 NV_DEBUG(dev, "\tbegin eq\n"); 349 NV_DEBUG_KMS(dev, "\tbegin eq\n");
350 ret = nouveau_dp_link_train_set(encoder, DP_TRAINING_PATTERN_2); 350 ret = nouveau_dp_link_train_set(encoder, DP_TRAINING_PATTERN_2);
351 if (ret) 351 if (ret)
352 goto stop; 352 goto stop;
@@ -357,7 +357,7 @@ train:
357 ret = auxch_rd(encoder, DP_LANE0_1_STATUS, status, 3); 357 ret = auxch_rd(encoder, DP_LANE0_1_STATUS, status, 3);
358 if (ret) 358 if (ret)
359 break; 359 break;
360 NV_DEBUG(dev, "\t\tstatus: 0x%02x 0x%02x\n", 360 NV_DEBUG_KMS(dev, "\t\tstatus: 0x%02x 0x%02x\n",
361 status[0], status[1]); 361 status[0], status[1]);
362 362
363 eq_done = true; 363 eq_done = true;
@@ -395,9 +395,9 @@ stop:
395 395
396 /* retry at a lower setting, if possible */ 396 /* retry at a lower setting, if possible */
397 if (!ret && !(eq_done && cr_done)) { 397 if (!ret && !(eq_done && cr_done)) {
398 NV_DEBUG(dev, "\twe failed\n"); 398 NV_DEBUG_KMS(dev, "\twe failed\n");
399 if (nv_encoder->dp.link_bw != DP_LINK_BW_1_62) { 399 if (nv_encoder->dp.link_bw != DP_LINK_BW_1_62) {
400 NV_DEBUG(dev, "retry link training at low rate\n"); 400 NV_DEBUG_KMS(dev, "retry link training at low rate\n");
401 nv_encoder->dp.link_bw = DP_LINK_BW_1_62; 401 nv_encoder->dp.link_bw = DP_LINK_BW_1_62;
402 goto train; 402 goto train;
403 } 403 }
@@ -418,7 +418,7 @@ nouveau_dp_detect(struct drm_encoder *encoder)
418 if (ret) 418 if (ret)
419 return false; 419 return false;
420 420
421 NV_DEBUG(dev, "encoder: link_bw %d, link_nr %d\n" 421 NV_DEBUG_KMS(dev, "encoder: link_bw %d, link_nr %d\n"
422 "display: link_bw %d, link_nr %d version 0x%02x\n", 422 "display: link_bw %d, link_nr %d version 0x%02x\n",
423 nv_encoder->dcb->dpconf.link_bw, 423 nv_encoder->dcb->dpconf.link_bw,
424 nv_encoder->dcb->dpconf.link_nr, 424 nv_encoder->dcb->dpconf.link_nr,
@@ -446,7 +446,7 @@ nouveau_dp_auxch(struct nouveau_i2c_chan *auxch, int cmd, int addr,
446 uint32_t tmp, ctrl, stat = 0, data32[4] = {}; 446 uint32_t tmp, ctrl, stat = 0, data32[4] = {};
447 int ret = 0, i, index = auxch->rd; 447 int ret = 0, i, index = auxch->rd;
448 448
449 NV_DEBUG(dev, "ch %d cmd %d addr 0x%x len %d\n", index, cmd, addr, data_nr); 449 NV_DEBUG_KMS(dev, "ch %d cmd %d addr 0x%x len %d\n", index, cmd, addr, data_nr);
450 450
451 tmp = nv_rd32(dev, NV50_AUXCH_CTRL(auxch->rd)); 451 tmp = nv_rd32(dev, NV50_AUXCH_CTRL(auxch->rd));
452 nv_wr32(dev, NV50_AUXCH_CTRL(auxch->rd), tmp | 0x00100000); 452 nv_wr32(dev, NV50_AUXCH_CTRL(auxch->rd), tmp | 0x00100000);
@@ -472,7 +472,7 @@ nouveau_dp_auxch(struct nouveau_i2c_chan *auxch, int cmd, int addr,
472 if (!(cmd & 1)) { 472 if (!(cmd & 1)) {
473 memcpy(data32, data, data_nr); 473 memcpy(data32, data, data_nr);
474 for (i = 0; i < 4; i++) { 474 for (i = 0; i < 4; i++) {
475 NV_DEBUG(dev, "wr %d: 0x%08x\n", i, data32[i]); 475 NV_DEBUG_KMS(dev, "wr %d: 0x%08x\n", i, data32[i]);
476 nv_wr32(dev, NV50_AUXCH_DATA_OUT(index, i), data32[i]); 476 nv_wr32(dev, NV50_AUXCH_DATA_OUT(index, i), data32[i]);
477 } 477 }
478 } 478 }
@@ -490,7 +490,8 @@ nouveau_dp_auxch(struct nouveau_i2c_chan *auxch, int cmd, int addr,
490 if (!nv_wait(NV50_AUXCH_CTRL(index), 0x00010000, 0x00000000)) { 490 if (!nv_wait(NV50_AUXCH_CTRL(index), 0x00010000, 0x00000000)) {
491 NV_ERROR(dev, "expected bit 16 == 0, got 0x%08x\n", 491 NV_ERROR(dev, "expected bit 16 == 0, got 0x%08x\n",
492 nv_rd32(dev, NV50_AUXCH_CTRL(index))); 492 nv_rd32(dev, NV50_AUXCH_CTRL(index)));
493 return -EBUSY; 493 ret = -EBUSY;
494 goto out;
494 } 495 }
495 496
496 udelay(400); 497 udelay(400);
@@ -502,9 +503,14 @@ nouveau_dp_auxch(struct nouveau_i2c_chan *auxch, int cmd, int addr,
502 } 503 }
503 504
504 if (cmd & 1) { 505 if (cmd & 1) {
506 if ((stat & NV50_AUXCH_STAT_COUNT) != data_nr) {
507 ret = -EREMOTEIO;
508 goto out;
509 }
510
505 for (i = 0; i < 4; i++) { 511 for (i = 0; i < 4; i++) {
506 data32[i] = nv_rd32(dev, NV50_AUXCH_DATA_IN(index, i)); 512 data32[i] = nv_rd32(dev, NV50_AUXCH_DATA_IN(index, i));
507 NV_DEBUG(dev, "rd %d: 0x%08x\n", i, data32[i]); 513 NV_DEBUG_KMS(dev, "rd %d: 0x%08x\n", i, data32[i]);
508 } 514 }
509 memcpy(data, data32, data_nr); 515 memcpy(data, data32, data_nr);
510 } 516 }
diff --git a/drivers/gpu/drm/nouveau/nouveau_drv.c b/drivers/gpu/drm/nouveau/nouveau_drv.c
index 35249c35118f..da3b93b84502 100644
--- a/drivers/gpu/drm/nouveau/nouveau_drv.c
+++ b/drivers/gpu/drm/nouveau/nouveau_drv.c
@@ -35,6 +35,10 @@
35 35
36#include "drm_pciids.h" 36#include "drm_pciids.h"
37 37
38MODULE_PARM_DESC(ctxfw, "Use external firmware blob for grctx init (NV40)");
39int nouveau_ctxfw = 0;
40module_param_named(ctxfw, nouveau_ctxfw, int, 0400);
41
38MODULE_PARM_DESC(noagp, "Disable AGP"); 42MODULE_PARM_DESC(noagp, "Disable AGP");
39int nouveau_noagp; 43int nouveau_noagp;
40module_param_named(noagp, nouveau_noagp, int, 0400); 44module_param_named(noagp, nouveau_noagp, int, 0400);
@@ -52,7 +56,7 @@ int nouveau_vram_pushbuf;
52module_param_named(vram_pushbuf, nouveau_vram_pushbuf, int, 0400); 56module_param_named(vram_pushbuf, nouveau_vram_pushbuf, int, 0400);
53 57
54MODULE_PARM_DESC(vram_notify, "Force DMA notifiers to be in VRAM"); 58MODULE_PARM_DESC(vram_notify, "Force DMA notifiers to be in VRAM");
55int nouveau_vram_notify; 59int nouveau_vram_notify = 1;
56module_param_named(vram_notify, nouveau_vram_notify, int, 0400); 60module_param_named(vram_notify, nouveau_vram_notify, int, 0400);
57 61
58MODULE_PARM_DESC(duallink, "Allow dual-link TMDS (>=GeForce 8)"); 62MODULE_PARM_DESC(duallink, "Allow dual-link TMDS (>=GeForce 8)");
@@ -67,6 +71,18 @@ MODULE_PARM_DESC(uscript_tmds, "TMDS output script table ID (>=GeForce 8)");
67int nouveau_uscript_tmds = -1; 71int nouveau_uscript_tmds = -1;
68module_param_named(uscript_tmds, nouveau_uscript_tmds, int, 0400); 72module_param_named(uscript_tmds, nouveau_uscript_tmds, int, 0400);
69 73
74MODULE_PARM_DESC(ignorelid, "Ignore ACPI lid status");
75int nouveau_ignorelid = 0;
76module_param_named(ignorelid, nouveau_ignorelid, int, 0400);
77
78MODULE_PARM_DESC(noagp, "Disable all acceleration");
79int nouveau_noaccel = 0;
80module_param_named(noaccel, nouveau_noaccel, int, 0400);
81
82MODULE_PARM_DESC(noagp, "Disable fbcon acceleration");
83int nouveau_nofbaccel = 0;
84module_param_named(nofbaccel, nouveau_nofbaccel, int, 0400);
85
70MODULE_PARM_DESC(tv_norm, "Default TV norm.\n" 86MODULE_PARM_DESC(tv_norm, "Default TV norm.\n"
71 "\t\tSupported: PAL, PAL-M, PAL-N, PAL-Nc, NTSC-M, NTSC-J,\n" 87 "\t\tSupported: PAL, PAL-M, PAL-N, PAL-Nc, NTSC-M, NTSC-J,\n"
72 "\t\t\thd480i, hd480p, hd576i, hd576p, hd720p, hd1080i.\n" 88 "\t\t\thd480i, hd480p, hd576i, hd576p, hd720p, hd1080i.\n"
@@ -273,7 +289,7 @@ nouveau_pci_resume(struct pci_dev *pdev)
273 289
274 for (i = 0; i < dev_priv->engine.fifo.channels; i++) { 290 for (i = 0; i < dev_priv->engine.fifo.channels; i++) {
275 chan = dev_priv->fifos[i]; 291 chan = dev_priv->fifos[i];
276 if (!chan) 292 if (!chan || !chan->pushbuf_bo)
277 continue; 293 continue;
278 294
279 for (j = 0; j < NOUVEAU_DMA_SKIPS; j++) 295 for (j = 0; j < NOUVEAU_DMA_SKIPS; j++)
@@ -341,7 +357,7 @@ static struct drm_driver driver = {
341 .owner = THIS_MODULE, 357 .owner = THIS_MODULE,
342 .open = drm_open, 358 .open = drm_open,
343 .release = drm_release, 359 .release = drm_release,
344 .ioctl = drm_ioctl, 360 .unlocked_ioctl = drm_ioctl,
345 .mmap = nouveau_ttm_mmap, 361 .mmap = nouveau_ttm_mmap,
346 .poll = drm_poll, 362 .poll = drm_poll,
347 .fasync = drm_fasync, 363 .fasync = drm_fasync,
diff --git a/drivers/gpu/drm/nouveau/nouveau_drv.h b/drivers/gpu/drm/nouveau/nouveau_drv.h
index 88b4c7b77e7f..1c15ef37b71c 100644
--- a/drivers/gpu/drm/nouveau/nouveau_drv.h
+++ b/drivers/gpu/drm/nouveau/nouveau_drv.h
@@ -54,15 +54,24 @@ struct nouveau_fpriv {
54#include "nouveau_drm.h" 54#include "nouveau_drm.h"
55#include "nouveau_reg.h" 55#include "nouveau_reg.h"
56#include "nouveau_bios.h" 56#include "nouveau_bios.h"
57struct nouveau_grctx;
57 58
58#define MAX_NUM_DCB_ENTRIES 16 59#define MAX_NUM_DCB_ENTRIES 16
59 60
60#define NOUVEAU_MAX_CHANNEL_NR 128 61#define NOUVEAU_MAX_CHANNEL_NR 128
62#define NOUVEAU_MAX_TILE_NR 15
61 63
62#define NV50_VM_MAX_VRAM (2*1024*1024*1024ULL) 64#define NV50_VM_MAX_VRAM (2*1024*1024*1024ULL)
63#define NV50_VM_BLOCK (512*1024*1024ULL) 65#define NV50_VM_BLOCK (512*1024*1024ULL)
64#define NV50_VM_VRAM_NR (NV50_VM_MAX_VRAM / NV50_VM_BLOCK) 66#define NV50_VM_VRAM_NR (NV50_VM_MAX_VRAM / NV50_VM_BLOCK)
65 67
68struct nouveau_tile_reg {
69 struct nouveau_fence *fence;
70 uint32_t addr;
71 uint32_t size;
72 bool used;
73};
74
66struct nouveau_bo { 75struct nouveau_bo {
67 struct ttm_buffer_object bo; 76 struct ttm_buffer_object bo;
68 struct ttm_placement placement; 77 struct ttm_placement placement;
@@ -82,6 +91,7 @@ struct nouveau_bo {
82 91
83 uint32_t tile_mode; 92 uint32_t tile_mode;
84 uint32_t tile_flags; 93 uint32_t tile_flags;
94 struct nouveau_tile_reg *tile;
85 95
86 struct drm_gem_object *gem; 96 struct drm_gem_object *gem;
87 struct drm_file *cpu_filp; 97 struct drm_file *cpu_filp;
@@ -276,8 +286,13 @@ struct nouveau_timer_engine {
276}; 286};
277 287
278struct nouveau_fb_engine { 288struct nouveau_fb_engine {
289 int num_tiles;
290
279 int (*init)(struct drm_device *dev); 291 int (*init)(struct drm_device *dev);
280 void (*takedown)(struct drm_device *dev); 292 void (*takedown)(struct drm_device *dev);
293
294 void (*set_region_tiling)(struct drm_device *dev, int i, uint32_t addr,
295 uint32_t size, uint32_t pitch);
281}; 296};
282 297
283struct nouveau_fifo_engine { 298struct nouveau_fifo_engine {
@@ -291,6 +306,8 @@ struct nouveau_fifo_engine {
291 void (*disable)(struct drm_device *); 306 void (*disable)(struct drm_device *);
292 void (*enable)(struct drm_device *); 307 void (*enable)(struct drm_device *);
293 bool (*reassign)(struct drm_device *, bool enable); 308 bool (*reassign)(struct drm_device *, bool enable);
309 bool (*cache_flush)(struct drm_device *dev);
310 bool (*cache_pull)(struct drm_device *dev, bool enable);
294 311
295 int (*channel_id)(struct drm_device *); 312 int (*channel_id)(struct drm_device *);
296 313
@@ -317,6 +334,7 @@ struct nouveau_pgraph_engine {
317 bool accel_blocked; 334 bool accel_blocked;
318 void *ctxprog; 335 void *ctxprog;
319 void *ctxvals; 336 void *ctxvals;
337 int grctx_size;
320 338
321 int (*init)(struct drm_device *); 339 int (*init)(struct drm_device *);
322 void (*takedown)(struct drm_device *); 340 void (*takedown)(struct drm_device *);
@@ -328,6 +346,9 @@ struct nouveau_pgraph_engine {
328 void (*destroy_context)(struct nouveau_channel *); 346 void (*destroy_context)(struct nouveau_channel *);
329 int (*load_context)(struct nouveau_channel *); 347 int (*load_context)(struct nouveau_channel *);
330 int (*unload_context)(struct drm_device *); 348 int (*unload_context)(struct drm_device *);
349
350 void (*set_region_tiling)(struct drm_device *dev, int i, uint32_t addr,
351 uint32_t size, uint32_t pitch);
331}; 352};
332 353
333struct nouveau_engine { 354struct nouveau_engine {
@@ -488,6 +509,8 @@ struct drm_nouveau_private {
488 void __iomem *ramin; 509 void __iomem *ramin;
489 uint32_t ramin_size; 510 uint32_t ramin_size;
490 511
512 struct nouveau_bo *vga_ram;
513
491 struct workqueue_struct *wq; 514 struct workqueue_struct *wq;
492 struct work_struct irq_work; 515 struct work_struct irq_work;
493 516
@@ -546,6 +569,12 @@ struct drm_nouveau_private {
546 unsigned long sg_handle; 569 unsigned long sg_handle;
547 } gart_info; 570 } gart_info;
548 571
572 /* nv10-nv40 tiling regions */
573 struct {
574 struct nouveau_tile_reg reg[NOUVEAU_MAX_TILE_NR];
575 spinlock_t lock;
576 } tile;
577
549 /* G8x/G9x virtual address space */ 578 /* G8x/G9x virtual address space */
550 uint64_t vm_gart_base; 579 uint64_t vm_gart_base;
551 uint64_t vm_gart_size; 580 uint64_t vm_gart_size;
@@ -554,6 +583,7 @@ struct drm_nouveau_private {
554 uint64_t vm_end; 583 uint64_t vm_end;
555 struct nouveau_gpuobj *vm_vram_pt[NV50_VM_VRAM_NR]; 584 struct nouveau_gpuobj *vm_vram_pt[NV50_VM_VRAM_NR];
556 int vm_vram_pt_nr; 585 int vm_vram_pt_nr;
586 uint64_t vram_sys_base;
557 587
558 /* the mtrr covering the FB */ 588 /* the mtrr covering the FB */
559 int fb_mtrr; 589 int fb_mtrr;
@@ -647,6 +677,10 @@ extern int nouveau_fbpercrtc;
647extern char *nouveau_tv_norm; 677extern char *nouveau_tv_norm;
648extern int nouveau_reg_debug; 678extern int nouveau_reg_debug;
649extern char *nouveau_vbios; 679extern char *nouveau_vbios;
680extern int nouveau_ctxfw;
681extern int nouveau_ignorelid;
682extern int nouveau_nofbaccel;
683extern int nouveau_noaccel;
650 684
651/* nouveau_state.c */ 685/* nouveau_state.c */
652extern void nouveau_preclose(struct drm_device *dev, struct drm_file *); 686extern void nouveau_preclose(struct drm_device *dev, struct drm_file *);
@@ -682,6 +716,13 @@ extern void nouveau_mem_release(struct drm_file *, struct mem_block *heap);
682extern int nouveau_mem_init(struct drm_device *); 716extern int nouveau_mem_init(struct drm_device *);
683extern int nouveau_mem_init_agp(struct drm_device *); 717extern int nouveau_mem_init_agp(struct drm_device *);
684extern void nouveau_mem_close(struct drm_device *); 718extern void nouveau_mem_close(struct drm_device *);
719extern struct nouveau_tile_reg *nv10_mem_set_tiling(struct drm_device *dev,
720 uint32_t addr,
721 uint32_t size,
722 uint32_t pitch);
723extern void nv10_mem_expire_tiling(struct drm_device *dev,
724 struct nouveau_tile_reg *tile,
725 struct nouveau_fence *fence);
685extern int nv50_mem_vm_bind_linear(struct drm_device *, uint64_t virt, 726extern int nv50_mem_vm_bind_linear(struct drm_device *, uint64_t virt,
686 uint32_t size, uint32_t flags, 727 uint32_t size, uint32_t flags,
687 uint64_t phys); 728 uint64_t phys);
@@ -710,7 +751,6 @@ extern int nouveau_channel_alloc(struct drm_device *dev,
710 struct drm_file *file_priv, 751 struct drm_file *file_priv,
711 uint32_t fb_ctxdma, uint32_t tt_ctxdma); 752 uint32_t fb_ctxdma, uint32_t tt_ctxdma);
712extern void nouveau_channel_free(struct nouveau_channel *); 753extern void nouveau_channel_free(struct nouveau_channel *);
713extern int nouveau_channel_idle(struct nouveau_channel *chan);
714 754
715/* nouveau_object.c */ 755/* nouveau_object.c */
716extern int nouveau_gpuobj_early_init(struct drm_device *); 756extern int nouveau_gpuobj_early_init(struct drm_device *);
@@ -753,6 +793,8 @@ extern int nouveau_gpuobj_gart_dma_new(struct nouveau_channel *,
753 uint32_t *o_ret); 793 uint32_t *o_ret);
754extern int nouveau_gpuobj_gr_new(struct nouveau_channel *, int class, 794extern int nouveau_gpuobj_gr_new(struct nouveau_channel *, int class,
755 struct nouveau_gpuobj **); 795 struct nouveau_gpuobj **);
796extern int nouveau_gpuobj_sw_new(struct nouveau_channel *, int class,
797 struct nouveau_gpuobj **);
756extern int nouveau_ioctl_grobj_alloc(struct drm_device *, void *data, 798extern int nouveau_ioctl_grobj_alloc(struct drm_device *, void *data,
757 struct drm_file *); 799 struct drm_file *);
758extern int nouveau_ioctl_gpuobj_free(struct drm_device *, void *data, 800extern int nouveau_ioctl_gpuobj_free(struct drm_device *, void *data,
@@ -801,6 +843,7 @@ nouveau_debugfs_channel_fini(struct nouveau_channel *chan)
801#endif 843#endif
802 844
803/* nouveau_dma.c */ 845/* nouveau_dma.c */
846extern void nouveau_dma_pre_init(struct nouveau_channel *);
804extern int nouveau_dma_init(struct nouveau_channel *); 847extern int nouveau_dma_init(struct nouveau_channel *);
805extern int nouveau_dma_wait(struct nouveau_channel *, int size); 848extern int nouveau_dma_wait(struct nouveau_channel *, int size);
806 849
@@ -876,16 +919,22 @@ extern void nv04_fb_takedown(struct drm_device *);
876/* nv10_fb.c */ 919/* nv10_fb.c */
877extern int nv10_fb_init(struct drm_device *); 920extern int nv10_fb_init(struct drm_device *);
878extern void nv10_fb_takedown(struct drm_device *); 921extern void nv10_fb_takedown(struct drm_device *);
922extern void nv10_fb_set_region_tiling(struct drm_device *, int, uint32_t,
923 uint32_t, uint32_t);
879 924
880/* nv40_fb.c */ 925/* nv40_fb.c */
881extern int nv40_fb_init(struct drm_device *); 926extern int nv40_fb_init(struct drm_device *);
882extern void nv40_fb_takedown(struct drm_device *); 927extern void nv40_fb_takedown(struct drm_device *);
928extern void nv40_fb_set_region_tiling(struct drm_device *, int, uint32_t,
929 uint32_t, uint32_t);
883 930
884/* nv04_fifo.c */ 931/* nv04_fifo.c */
885extern int nv04_fifo_init(struct drm_device *); 932extern int nv04_fifo_init(struct drm_device *);
886extern void nv04_fifo_disable(struct drm_device *); 933extern void nv04_fifo_disable(struct drm_device *);
887extern void nv04_fifo_enable(struct drm_device *); 934extern void nv04_fifo_enable(struct drm_device *);
888extern bool nv04_fifo_reassign(struct drm_device *, bool); 935extern bool nv04_fifo_reassign(struct drm_device *, bool);
936extern bool nv04_fifo_cache_flush(struct drm_device *);
937extern bool nv04_fifo_cache_pull(struct drm_device *, bool);
889extern int nv04_fifo_channel_id(struct drm_device *); 938extern int nv04_fifo_channel_id(struct drm_device *);
890extern int nv04_fifo_create_context(struct nouveau_channel *); 939extern int nv04_fifo_create_context(struct nouveau_channel *);
891extern void nv04_fifo_destroy_context(struct nouveau_channel *); 940extern void nv04_fifo_destroy_context(struct nouveau_channel *);
@@ -938,6 +987,8 @@ extern void nv10_graph_destroy_context(struct nouveau_channel *);
938extern int nv10_graph_load_context(struct nouveau_channel *); 987extern int nv10_graph_load_context(struct nouveau_channel *);
939extern int nv10_graph_unload_context(struct drm_device *); 988extern int nv10_graph_unload_context(struct drm_device *);
940extern void nv10_graph_context_switch(struct drm_device *); 989extern void nv10_graph_context_switch(struct drm_device *);
990extern void nv10_graph_set_region_tiling(struct drm_device *, int, uint32_t,
991 uint32_t, uint32_t);
941 992
942/* nv20_graph.c */ 993/* nv20_graph.c */
943extern struct nouveau_pgraph_object_class nv20_graph_grclass[]; 994extern struct nouveau_pgraph_object_class nv20_graph_grclass[];
@@ -949,6 +1000,8 @@ extern int nv20_graph_unload_context(struct drm_device *);
949extern int nv20_graph_init(struct drm_device *); 1000extern int nv20_graph_init(struct drm_device *);
950extern void nv20_graph_takedown(struct drm_device *); 1001extern void nv20_graph_takedown(struct drm_device *);
951extern int nv30_graph_init(struct drm_device *); 1002extern int nv30_graph_init(struct drm_device *);
1003extern void nv20_graph_set_region_tiling(struct drm_device *, int, uint32_t,
1004 uint32_t, uint32_t);
952 1005
953/* nv40_graph.c */ 1006/* nv40_graph.c */
954extern struct nouveau_pgraph_object_class nv40_graph_grclass[]; 1007extern struct nouveau_pgraph_object_class nv40_graph_grclass[];
@@ -959,9 +1012,9 @@ extern int nv40_graph_create_context(struct nouveau_channel *);
959extern void nv40_graph_destroy_context(struct nouveau_channel *); 1012extern void nv40_graph_destroy_context(struct nouveau_channel *);
960extern int nv40_graph_load_context(struct nouveau_channel *); 1013extern int nv40_graph_load_context(struct nouveau_channel *);
961extern int nv40_graph_unload_context(struct drm_device *); 1014extern int nv40_graph_unload_context(struct drm_device *);
962extern int nv40_grctx_init(struct drm_device *); 1015extern void nv40_grctx_init(struct nouveau_grctx *);
963extern void nv40_grctx_fini(struct drm_device *); 1016extern void nv40_graph_set_region_tiling(struct drm_device *, int, uint32_t,
964extern void nv40_grctx_vals_load(struct drm_device *, struct nouveau_gpuobj *); 1017 uint32_t, uint32_t);
965 1018
966/* nv50_graph.c */ 1019/* nv50_graph.c */
967extern struct nouveau_pgraph_object_class nv50_graph_grclass[]; 1020extern struct nouveau_pgraph_object_class nv50_graph_grclass[];
@@ -975,6 +1028,12 @@ extern int nv50_graph_load_context(struct nouveau_channel *);
975extern int nv50_graph_unload_context(struct drm_device *); 1028extern int nv50_graph_unload_context(struct drm_device *);
976extern void nv50_graph_context_switch(struct drm_device *); 1029extern void nv50_graph_context_switch(struct drm_device *);
977 1030
1031/* nouveau_grctx.c */
1032extern int nouveau_grctx_prog_load(struct drm_device *);
1033extern void nouveau_grctx_vals_load(struct drm_device *,
1034 struct nouveau_gpuobj *);
1035extern void nouveau_grctx_fini(struct drm_device *);
1036
978/* nv04_instmem.c */ 1037/* nv04_instmem.c */
979extern int nv04_instmem_init(struct drm_device *); 1038extern int nv04_instmem_init(struct drm_device *);
980extern void nv04_instmem_takedown(struct drm_device *); 1039extern void nv04_instmem_takedown(struct drm_device *);
@@ -1023,8 +1082,7 @@ extern long nouveau_compat_ioctl(struct file *file, unsigned int cmd,
1023 1082
1024/* nv04_dac.c */ 1083/* nv04_dac.c */
1025extern int nv04_dac_create(struct drm_device *dev, struct dcb_entry *entry); 1084extern int nv04_dac_create(struct drm_device *dev, struct dcb_entry *entry);
1026extern enum drm_connector_status nv17_dac_detect(struct drm_encoder *encoder, 1085extern uint32_t nv17_dac_sample_load(struct drm_encoder *encoder);
1027 struct drm_connector *connector);
1028extern int nv04_dac_output_offset(struct drm_encoder *encoder); 1086extern int nv04_dac_output_offset(struct drm_encoder *encoder);
1029extern void nv04_dac_update_dacclk(struct drm_encoder *encoder, bool enable); 1087extern void nv04_dac_update_dacclk(struct drm_encoder *encoder, bool enable);
1030 1088
@@ -1042,9 +1100,6 @@ extern int nv04_tv_create(struct drm_device *dev, struct dcb_entry *entry);
1042 1100
1043/* nv17_tv.c */ 1101/* nv17_tv.c */
1044extern int nv17_tv_create(struct drm_device *dev, struct dcb_entry *entry); 1102extern int nv17_tv_create(struct drm_device *dev, struct dcb_entry *entry);
1045extern enum drm_connector_status nv17_tv_detect(struct drm_encoder *encoder,
1046 struct drm_connector *connector,
1047 uint32_t pin_mask);
1048 1103
1049/* nv04_display.c */ 1104/* nv04_display.c */
1050extern int nv04_display_create(struct drm_device *); 1105extern int nv04_display_create(struct drm_device *);
@@ -1207,14 +1262,24 @@ static inline void nv_wo32(struct drm_device *dev, struct nouveau_gpuobj *obj,
1207 pci_name(d->pdev), ##arg) 1262 pci_name(d->pdev), ##arg)
1208#ifndef NV_DEBUG_NOTRACE 1263#ifndef NV_DEBUG_NOTRACE
1209#define NV_DEBUG(d, fmt, arg...) do { \ 1264#define NV_DEBUG(d, fmt, arg...) do { \
1210 if (drm_debug) { \ 1265 if (drm_debug & DRM_UT_DRIVER) { \
1266 NV_PRINTK(KERN_DEBUG, d, "%s:%d - " fmt, __func__, \
1267 __LINE__, ##arg); \
1268 } \
1269} while (0)
1270#define NV_DEBUG_KMS(d, fmt, arg...) do { \
1271 if (drm_debug & DRM_UT_KMS) { \
1211 NV_PRINTK(KERN_DEBUG, d, "%s:%d - " fmt, __func__, \ 1272 NV_PRINTK(KERN_DEBUG, d, "%s:%d - " fmt, __func__, \
1212 __LINE__, ##arg); \ 1273 __LINE__, ##arg); \
1213 } \ 1274 } \
1214} while (0) 1275} while (0)
1215#else 1276#else
1216#define NV_DEBUG(d, fmt, arg...) do { \ 1277#define NV_DEBUG(d, fmt, arg...) do { \
1217 if (drm_debug) \ 1278 if (drm_debug & DRM_UT_DRIVER) \
1279 NV_PRINTK(KERN_DEBUG, d, fmt, ##arg); \
1280} while (0)
1281#define NV_DEBUG_KMS(d, fmt, arg...) do { \
1282 if (drm_debug & DRM_UT_KMS) \
1218 NV_PRINTK(KERN_DEBUG, d, fmt, ##arg); \ 1283 NV_PRINTK(KERN_DEBUG, d, fmt, ##arg); \
1219} while (0) 1284} while (0)
1220#endif 1285#endif
@@ -1273,14 +1338,14 @@ nv_two_reg_pll(struct drm_device *dev)
1273 return false; 1338 return false;
1274} 1339}
1275 1340
1276#define NV50_NVSW 0x0000506e 1341#define NV_SW 0x0000506e
1277#define NV50_NVSW_DMA_SEMAPHORE 0x00000060 1342#define NV_SW_DMA_SEMAPHORE 0x00000060
1278#define NV50_NVSW_SEMAPHORE_OFFSET 0x00000064 1343#define NV_SW_SEMAPHORE_OFFSET 0x00000064
1279#define NV50_NVSW_SEMAPHORE_ACQUIRE 0x00000068 1344#define NV_SW_SEMAPHORE_ACQUIRE 0x00000068
1280#define NV50_NVSW_SEMAPHORE_RELEASE 0x0000006c 1345#define NV_SW_SEMAPHORE_RELEASE 0x0000006c
1281#define NV50_NVSW_DMA_VBLSEM 0x0000018c 1346#define NV_SW_DMA_VBLSEM 0x0000018c
1282#define NV50_NVSW_VBLSEM_OFFSET 0x00000400 1347#define NV_SW_VBLSEM_OFFSET 0x00000400
1283#define NV50_NVSW_VBLSEM_RELEASE_VALUE 0x00000404 1348#define NV_SW_VBLSEM_RELEASE_VALUE 0x00000404
1284#define NV50_NVSW_VBLSEM_RELEASE 0x00000408 1349#define NV_SW_VBLSEM_RELEASE 0x00000408
1285 1350
1286#endif /* __NOUVEAU_DRV_H__ */ 1351#endif /* __NOUVEAU_DRV_H__ */
diff --git a/drivers/gpu/drm/nouveau/nouveau_fbcon.c b/drivers/gpu/drm/nouveau/nouveau_fbcon.c
index 36e8c5e4503a..ea879a2efef3 100644
--- a/drivers/gpu/drm/nouveau/nouveau_fbcon.c
+++ b/drivers/gpu/drm/nouveau/nouveau_fbcon.c
@@ -58,14 +58,13 @@ nouveau_fbcon_sync(struct fb_info *info)
58 struct nouveau_channel *chan = dev_priv->channel; 58 struct nouveau_channel *chan = dev_priv->channel;
59 int ret, i; 59 int ret, i;
60 60
61 if (!chan->accel_done || 61 if (!chan || !chan->accel_done ||
62 info->state != FBINFO_STATE_RUNNING || 62 info->state != FBINFO_STATE_RUNNING ||
63 info->flags & FBINFO_HWACCEL_DISABLED) 63 info->flags & FBINFO_HWACCEL_DISABLED)
64 return 0; 64 return 0;
65 65
66 if (RING_SPACE(chan, 4)) { 66 if (RING_SPACE(chan, 4)) {
67 NV_ERROR(dev, "GPU lockup - switching to software fbcon\n"); 67 nouveau_fbcon_gpu_lockup(info);
68 info->flags |= FBINFO_HWACCEL_DISABLED;
69 return 0; 68 return 0;
70 } 69 }
71 70
@@ -86,8 +85,7 @@ nouveau_fbcon_sync(struct fb_info *info)
86 } 85 }
87 86
88 if (ret) { 87 if (ret) {
89 NV_ERROR(dev, "GPU lockup - switching to software fbcon\n"); 88 nouveau_fbcon_gpu_lockup(info);
90 info->flags |= FBINFO_HWACCEL_DISABLED;
91 return 0; 89 return 0;
92 } 90 }
93 91
@@ -109,6 +107,34 @@ static struct fb_ops nouveau_fbcon_ops = {
109 .fb_setcmap = drm_fb_helper_setcmap, 107 .fb_setcmap = drm_fb_helper_setcmap,
110}; 108};
111 109
110static struct fb_ops nv04_fbcon_ops = {
111 .owner = THIS_MODULE,
112 .fb_check_var = drm_fb_helper_check_var,
113 .fb_set_par = drm_fb_helper_set_par,
114 .fb_setcolreg = drm_fb_helper_setcolreg,
115 .fb_fillrect = nv04_fbcon_fillrect,
116 .fb_copyarea = nv04_fbcon_copyarea,
117 .fb_imageblit = nv04_fbcon_imageblit,
118 .fb_sync = nouveau_fbcon_sync,
119 .fb_pan_display = drm_fb_helper_pan_display,
120 .fb_blank = drm_fb_helper_blank,
121 .fb_setcmap = drm_fb_helper_setcmap,
122};
123
124static struct fb_ops nv50_fbcon_ops = {
125 .owner = THIS_MODULE,
126 .fb_check_var = drm_fb_helper_check_var,
127 .fb_set_par = drm_fb_helper_set_par,
128 .fb_setcolreg = drm_fb_helper_setcolreg,
129 .fb_fillrect = nv50_fbcon_fillrect,
130 .fb_copyarea = nv50_fbcon_copyarea,
131 .fb_imageblit = nv50_fbcon_imageblit,
132 .fb_sync = nouveau_fbcon_sync,
133 .fb_pan_display = drm_fb_helper_pan_display,
134 .fb_blank = drm_fb_helper_blank,
135 .fb_setcmap = drm_fb_helper_setcmap,
136};
137
112static void nouveau_fbcon_gamma_set(struct drm_crtc *crtc, u16 red, u16 green, 138static void nouveau_fbcon_gamma_set(struct drm_crtc *crtc, u16 red, u16 green,
113 u16 blue, int regno) 139 u16 blue, int regno)
114{ 140{
@@ -212,11 +238,11 @@ nouveau_fbcon_create(struct drm_device *dev, uint32_t fb_width,
212 238
213 mode_cmd.bpp = surface_bpp; 239 mode_cmd.bpp = surface_bpp;
214 mode_cmd.pitch = mode_cmd.width * (mode_cmd.bpp >> 3); 240 mode_cmd.pitch = mode_cmd.width * (mode_cmd.bpp >> 3);
215 mode_cmd.pitch = ALIGN(mode_cmd.pitch, 256); 241 mode_cmd.pitch = roundup(mode_cmd.pitch, 256);
216 mode_cmd.depth = surface_depth; 242 mode_cmd.depth = surface_depth;
217 243
218 size = mode_cmd.pitch * mode_cmd.height; 244 size = mode_cmd.pitch * mode_cmd.height;
219 size = ALIGN(size, PAGE_SIZE); 245 size = roundup(size, PAGE_SIZE);
220 246
221 ret = nouveau_gem_new(dev, dev_priv->channel, size, 0, TTM_PL_FLAG_VRAM, 247 ret = nouveau_gem_new(dev, dev_priv->channel, size, 0, TTM_PL_FLAG_VRAM,
222 0, 0x0000, false, true, &nvbo); 248 0, 0x0000, false, true, &nvbo);
@@ -269,8 +295,12 @@ nouveau_fbcon_create(struct drm_device *dev, uint32_t fb_width,
269 dev_priv->fbdev_info = info; 295 dev_priv->fbdev_info = info;
270 296
271 strcpy(info->fix.id, "nouveaufb"); 297 strcpy(info->fix.id, "nouveaufb");
272 info->flags = FBINFO_DEFAULT | FBINFO_HWACCEL_COPYAREA | 298 if (nouveau_nofbaccel)
273 FBINFO_HWACCEL_FILLRECT | FBINFO_HWACCEL_IMAGEBLIT; 299 info->flags = FBINFO_DEFAULT | FBINFO_HWACCEL_DISABLED;
300 else
301 info->flags = FBINFO_DEFAULT | FBINFO_HWACCEL_COPYAREA |
302 FBINFO_HWACCEL_FILLRECT |
303 FBINFO_HWACCEL_IMAGEBLIT;
274 info->fbops = &nouveau_fbcon_ops; 304 info->fbops = &nouveau_fbcon_ops;
275 info->fix.smem_start = dev->mode_config.fb_base + nvbo->bo.offset - 305 info->fix.smem_start = dev->mode_config.fb_base + nvbo->bo.offset -
276 dev_priv->vm_vram_base; 306 dev_priv->vm_vram_base;
@@ -318,14 +348,18 @@ nouveau_fbcon_create(struct drm_device *dev, uint32_t fb_width,
318 par->nouveau_fb = nouveau_fb; 348 par->nouveau_fb = nouveau_fb;
319 par->dev = dev; 349 par->dev = dev;
320 350
321 switch (dev_priv->card_type) { 351 if (dev_priv->channel && !nouveau_nofbaccel) {
322 case NV_50: 352 switch (dev_priv->card_type) {
323 nv50_fbcon_accel_init(info); 353 case NV_50:
324 break; 354 nv50_fbcon_accel_init(info);
325 default: 355 info->fbops = &nv50_fbcon_ops;
326 nv04_fbcon_accel_init(info); 356 break;
327 break; 357 default:
328 }; 358 nv04_fbcon_accel_init(info);
359 info->fbops = &nv04_fbcon_ops;
360 break;
361 };
362 }
329 363
330 nouveau_fbcon_zfill(dev); 364 nouveau_fbcon_zfill(dev);
331 365
@@ -347,7 +381,7 @@ out:
347int 381int
348nouveau_fbcon_probe(struct drm_device *dev) 382nouveau_fbcon_probe(struct drm_device *dev)
349{ 383{
350 NV_DEBUG(dev, "\n"); 384 NV_DEBUG_KMS(dev, "\n");
351 385
352 return drm_fb_helper_single_fb_probe(dev, 32, nouveau_fbcon_create); 386 return drm_fb_helper_single_fb_probe(dev, 32, nouveau_fbcon_create);
353} 387}
@@ -378,3 +412,12 @@ nouveau_fbcon_remove(struct drm_device *dev, struct drm_framebuffer *fb)
378 412
379 return 0; 413 return 0;
380} 414}
415
416void nouveau_fbcon_gpu_lockup(struct fb_info *info)
417{
418 struct nouveau_fbcon_par *par = info->par;
419 struct drm_device *dev = par->dev;
420
421 NV_ERROR(dev, "GPU lockup - switching to software fbcon\n");
422 info->flags |= FBINFO_HWACCEL_DISABLED;
423}
diff --git a/drivers/gpu/drm/nouveau/nouveau_fbcon.h b/drivers/gpu/drm/nouveau/nouveau_fbcon.h
index 8531140fedbc..f9c34e1a8c11 100644
--- a/drivers/gpu/drm/nouveau/nouveau_fbcon.h
+++ b/drivers/gpu/drm/nouveau/nouveau_fbcon.h
@@ -40,8 +40,15 @@ int nouveau_fbcon_remove(struct drm_device *dev, struct drm_framebuffer *fb);
40void nouveau_fbcon_restore(void); 40void nouveau_fbcon_restore(void);
41void nouveau_fbcon_zfill(struct drm_device *dev); 41void nouveau_fbcon_zfill(struct drm_device *dev);
42 42
43void nv04_fbcon_copyarea(struct fb_info *info, const struct fb_copyarea *region);
44void nv04_fbcon_fillrect(struct fb_info *info, const struct fb_fillrect *rect);
45void nv04_fbcon_imageblit(struct fb_info *info, const struct fb_image *image);
43int nv04_fbcon_accel_init(struct fb_info *info); 46int nv04_fbcon_accel_init(struct fb_info *info);
47void nv50_fbcon_fillrect(struct fb_info *info, const struct fb_fillrect *rect);
48void nv50_fbcon_copyarea(struct fb_info *info, const struct fb_copyarea *region);
49void nv50_fbcon_imageblit(struct fb_info *info, const struct fb_image *image);
44int nv50_fbcon_accel_init(struct fb_info *info); 50int nv50_fbcon_accel_init(struct fb_info *info);
45 51
52void nouveau_fbcon_gpu_lockup(struct fb_info *info);
46#endif /* __NV50_FBCON_H__ */ 53#endif /* __NV50_FBCON_H__ */
47 54
diff --git a/drivers/gpu/drm/nouveau/nouveau_fence.c b/drivers/gpu/drm/nouveau/nouveau_fence.c
index 0cff7eb3690a..faddf53ff9ed 100644
--- a/drivers/gpu/drm/nouveau/nouveau_fence.c
+++ b/drivers/gpu/drm/nouveau/nouveau_fence.c
@@ -142,7 +142,7 @@ nouveau_fence_emit(struct nouveau_fence *fence)
142 list_add_tail(&fence->entry, &chan->fence.pending); 142 list_add_tail(&fence->entry, &chan->fence.pending);
143 spin_unlock_irqrestore(&chan->fence.lock, flags); 143 spin_unlock_irqrestore(&chan->fence.lock, flags);
144 144
145 BEGIN_RING(chan, NvSubM2MF, USE_REFCNT ? 0x0050 : 0x0150, 1); 145 BEGIN_RING(chan, NvSubSw, USE_REFCNT ? 0x0050 : 0x0150, 1);
146 OUT_RING(chan, fence->sequence); 146 OUT_RING(chan, fence->sequence);
147 FIRE_RING(chan); 147 FIRE_RING(chan);
148 148
@@ -205,7 +205,7 @@ nouveau_fence_wait(void *sync_obj, void *sync_arg, bool lazy, bool intr)
205 schedule_timeout(1); 205 schedule_timeout(1);
206 206
207 if (intr && signal_pending(current)) { 207 if (intr && signal_pending(current)) {
208 ret = -ERESTART; 208 ret = -ERESTARTSYS;
209 break; 209 break;
210 } 210 }
211 } 211 }
diff --git a/drivers/gpu/drm/nouveau/nouveau_gem.c b/drivers/gpu/drm/nouveau/nouveau_gem.c
index 11f831f0ddc5..70cc30803e3b 100644
--- a/drivers/gpu/drm/nouveau/nouveau_gem.c
+++ b/drivers/gpu/drm/nouveau/nouveau_gem.c
@@ -220,7 +220,6 @@ nouveau_gem_set_domain(struct drm_gem_object *gem, uint32_t read_domains,
220} 220}
221 221
222struct validate_op { 222struct validate_op {
223 struct nouveau_fence *fence;
224 struct list_head vram_list; 223 struct list_head vram_list;
225 struct list_head gart_list; 224 struct list_head gart_list;
226 struct list_head both_list; 225 struct list_head both_list;
@@ -252,17 +251,11 @@ validate_fini_list(struct list_head *list, struct nouveau_fence *fence)
252} 251}
253 252
254static void 253static void
255validate_fini(struct validate_op *op, bool success) 254validate_fini(struct validate_op *op, struct nouveau_fence* fence)
256{ 255{
257 struct nouveau_fence *fence = op->fence; 256 validate_fini_list(&op->vram_list, fence);
258 257 validate_fini_list(&op->gart_list, fence);
259 if (unlikely(!success)) 258 validate_fini_list(&op->both_list, fence);
260 op->fence = NULL;
261
262 validate_fini_list(&op->vram_list, op->fence);
263 validate_fini_list(&op->gart_list, op->fence);
264 validate_fini_list(&op->both_list, op->fence);
265 nouveau_fence_unref((void *)&fence);
266} 259}
267 260
268static int 261static int
@@ -328,6 +321,7 @@ retry:
328 else { 321 else {
329 NV_ERROR(dev, "invalid valid domains: 0x%08x\n", 322 NV_ERROR(dev, "invalid valid domains: 0x%08x\n",
330 b->valid_domains); 323 b->valid_domains);
324 list_add_tail(&nvbo->entry, &op->both_list);
331 validate_fini(op, NULL); 325 validate_fini(op, NULL);
332 return -EINVAL; 326 return -EINVAL;
333 } 327 }
@@ -342,8 +336,6 @@ retry:
342 } 336 }
343 337
344 ret = ttm_bo_wait_cpu(&nvbo->bo, false); 338 ret = ttm_bo_wait_cpu(&nvbo->bo, false);
345 if (ret == -ERESTART)
346 ret = -EAGAIN;
347 if (ret) 339 if (ret)
348 return ret; 340 return ret;
349 goto retry; 341 goto retry;
@@ -422,10 +414,6 @@ nouveau_gem_pushbuf_validate(struct nouveau_channel *chan,
422 INIT_LIST_HEAD(&op->gart_list); 414 INIT_LIST_HEAD(&op->gart_list);
423 INIT_LIST_HEAD(&op->both_list); 415 INIT_LIST_HEAD(&op->both_list);
424 416
425 ret = nouveau_fence_new(chan, &op->fence, false);
426 if (ret)
427 return ret;
428
429 if (nr_buffers == 0) 417 if (nr_buffers == 0)
430 return 0; 418 return 0;
431 419
@@ -479,13 +467,14 @@ u_memcpya(uint64_t user, unsigned nmemb, unsigned size)
479static int 467static int
480nouveau_gem_pushbuf_reloc_apply(struct nouveau_channel *chan, int nr_bo, 468nouveau_gem_pushbuf_reloc_apply(struct nouveau_channel *chan, int nr_bo,
481 struct drm_nouveau_gem_pushbuf_bo *bo, 469 struct drm_nouveau_gem_pushbuf_bo *bo,
482 int nr_relocs, uint64_t ptr_relocs, 470 unsigned nr_relocs, uint64_t ptr_relocs,
483 int nr_dwords, int first_dword, 471 unsigned nr_dwords, unsigned first_dword,
484 uint32_t *pushbuf, bool is_iomem) 472 uint32_t *pushbuf, bool is_iomem)
485{ 473{
486 struct drm_nouveau_gem_pushbuf_reloc *reloc = NULL; 474 struct drm_nouveau_gem_pushbuf_reloc *reloc = NULL;
487 struct drm_device *dev = chan->dev; 475 struct drm_device *dev = chan->dev;
488 int ret = 0, i; 476 int ret = 0;
477 unsigned i;
489 478
490 reloc = u_memcpya(ptr_relocs, nr_relocs, sizeof(*reloc)); 479 reloc = u_memcpya(ptr_relocs, nr_relocs, sizeof(*reloc));
491 if (IS_ERR(reloc)) 480 if (IS_ERR(reloc))
@@ -543,6 +532,7 @@ nouveau_gem_ioctl_pushbuf(struct drm_device *dev, void *data,
543 struct drm_nouveau_gem_pushbuf_bo *bo = NULL; 532 struct drm_nouveau_gem_pushbuf_bo *bo = NULL;
544 struct nouveau_channel *chan; 533 struct nouveau_channel *chan;
545 struct validate_op op; 534 struct validate_op op;
535 struct nouveau_fence* fence = 0;
546 uint32_t *pushbuf = NULL; 536 uint32_t *pushbuf = NULL;
547 int ret = 0, do_reloc = 0, i; 537 int ret = 0, do_reloc = 0, i;
548 538
@@ -599,7 +589,7 @@ nouveau_gem_ioctl_pushbuf(struct drm_device *dev, void *data,
599 589
600 OUT_RINGp(chan, pushbuf, req->nr_dwords); 590 OUT_RINGp(chan, pushbuf, req->nr_dwords);
601 591
602 ret = nouveau_fence_emit(op.fence); 592 ret = nouveau_fence_new(chan, &fence, true);
603 if (ret) { 593 if (ret) {
604 NV_ERROR(dev, "error fencing pushbuf: %d\n", ret); 594 NV_ERROR(dev, "error fencing pushbuf: %d\n", ret);
605 WIND_RING(chan); 595 WIND_RING(chan);
@@ -607,7 +597,7 @@ nouveau_gem_ioctl_pushbuf(struct drm_device *dev, void *data,
607 } 597 }
608 598
609 if (nouveau_gem_pushbuf_sync(chan)) { 599 if (nouveau_gem_pushbuf_sync(chan)) {
610 ret = nouveau_fence_wait(op.fence, NULL, false, false); 600 ret = nouveau_fence_wait(fence, NULL, false, false);
611 if (ret) { 601 if (ret) {
612 for (i = 0; i < req->nr_dwords; i++) 602 for (i = 0; i < req->nr_dwords; i++)
613 NV_ERROR(dev, "0x%08x\n", pushbuf[i]); 603 NV_ERROR(dev, "0x%08x\n", pushbuf[i]);
@@ -616,7 +606,8 @@ nouveau_gem_ioctl_pushbuf(struct drm_device *dev, void *data,
616 } 606 }
617 607
618out: 608out:
619 validate_fini(&op, ret == 0); 609 validate_fini(&op, fence);
610 nouveau_fence_unref((void**)&fence);
620 mutex_unlock(&dev->struct_mutex); 611 mutex_unlock(&dev->struct_mutex);
621 kfree(pushbuf); 612 kfree(pushbuf);
622 kfree(bo); 613 kfree(bo);
@@ -636,6 +627,7 @@ nouveau_gem_ioctl_pushbuf_call(struct drm_device *dev, void *data,
636 struct drm_gem_object *gem; 627 struct drm_gem_object *gem;
637 struct nouveau_bo *pbbo; 628 struct nouveau_bo *pbbo;
638 struct validate_op op; 629 struct validate_op op;
630 struct nouveau_fence* fence = 0;
639 int i, ret = 0, do_reloc = 0; 631 int i, ret = 0, do_reloc = 0;
640 632
641 NOUVEAU_CHECK_INITIALISED_WITH_RETURN; 633 NOUVEAU_CHECK_INITIALISED_WITH_RETURN;
@@ -677,6 +669,18 @@ nouveau_gem_ioctl_pushbuf_call(struct drm_device *dev, void *data,
677 } 669 }
678 pbbo = nouveau_gem_object(gem); 670 pbbo = nouveau_gem_object(gem);
679 671
672 if ((req->offset & 3) || req->nr_dwords < 2 ||
673 (unsigned long)req->offset > (unsigned long)pbbo->bo.mem.size ||
674 (unsigned long)req->nr_dwords >
675 ((unsigned long)(pbbo->bo.mem.size - req->offset ) >> 2)) {
676 NV_ERROR(dev, "pb call misaligned or out of bounds: "
677 "%d + %d * 4 > %ld\n",
678 req->offset, req->nr_dwords, pbbo->bo.mem.size);
679 ret = -EINVAL;
680 drm_gem_object_unreference(gem);
681 goto out;
682 }
683
680 ret = ttm_bo_reserve(&pbbo->bo, false, false, true, 684 ret = ttm_bo_reserve(&pbbo->bo, false, false, true,
681 chan->fence.sequence); 685 chan->fence.sequence);
682 if (ret) { 686 if (ret) {
@@ -774,7 +778,7 @@ nouveau_gem_ioctl_pushbuf_call(struct drm_device *dev, void *data,
774 OUT_RING(chan, 0); 778 OUT_RING(chan, 0);
775 } 779 }
776 780
777 ret = nouveau_fence_emit(op.fence); 781 ret = nouveau_fence_new(chan, &fence, true);
778 if (ret) { 782 if (ret) {
779 NV_ERROR(dev, "error fencing pushbuf: %d\n", ret); 783 NV_ERROR(dev, "error fencing pushbuf: %d\n", ret);
780 WIND_RING(chan); 784 WIND_RING(chan);
@@ -782,7 +786,8 @@ nouveau_gem_ioctl_pushbuf_call(struct drm_device *dev, void *data,
782 } 786 }
783 787
784out: 788out:
785 validate_fini(&op, ret == 0); 789 validate_fini(&op, fence);
790 nouveau_fence_unref((void**)&fence);
786 mutex_unlock(&dev->struct_mutex); 791 mutex_unlock(&dev->struct_mutex);
787 kfree(bo); 792 kfree(bo);
788 793
@@ -915,19 +920,16 @@ nouveau_gem_ioctl_cpu_prep(struct drm_device *dev, void *data,
915 goto out; 920 goto out;
916 921
917 ret = ttm_bo_wait_cpu(&nvbo->bo, no_wait); 922 ret = ttm_bo_wait_cpu(&nvbo->bo, no_wait);
918 if (ret == -ERESTART)
919 ret = -EAGAIN;
920 if (ret) 923 if (ret)
921 goto out; 924 goto out;
922 } 925 }
923 926
924 if (req->flags & NOUVEAU_GEM_CPU_PREP_NOBLOCK) { 927 if (req->flags & NOUVEAU_GEM_CPU_PREP_NOBLOCK) {
928 spin_lock(&nvbo->bo.lock);
925 ret = ttm_bo_wait(&nvbo->bo, false, false, no_wait); 929 ret = ttm_bo_wait(&nvbo->bo, false, false, no_wait);
930 spin_unlock(&nvbo->bo.lock);
926 } else { 931 } else {
927 ret = ttm_bo_synccpu_write_grab(&nvbo->bo, no_wait); 932 ret = ttm_bo_synccpu_write_grab(&nvbo->bo, no_wait);
928 if (ret == -ERESTART)
929 ret = -EAGAIN;
930 else
931 if (ret == 0) 933 if (ret == 0)
932 nvbo->cpu_filp = file_priv; 934 nvbo->cpu_filp = file_priv;
933 } 935 }
diff --git a/drivers/gpu/drm/nouveau/nouveau_grctx.c b/drivers/gpu/drm/nouveau/nouveau_grctx.c
new file mode 100644
index 000000000000..c7ebec696747
--- /dev/null
+++ b/drivers/gpu/drm/nouveau/nouveau_grctx.c
@@ -0,0 +1,161 @@
1/*
2 * Copyright 2009 Red Hat Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: Ben Skeggs
23 */
24
25#include <linux/firmware.h>
26
27#include "drmP.h"
28#include "nouveau_drv.h"
29
30struct nouveau_ctxprog {
31 uint32_t signature;
32 uint8_t version;
33 uint16_t length;
34 uint32_t data[];
35} __attribute__ ((packed));
36
37struct nouveau_ctxvals {
38 uint32_t signature;
39 uint8_t version;
40 uint32_t length;
41 struct {
42 uint32_t offset;
43 uint32_t value;
44 } data[];
45} __attribute__ ((packed));
46
47int
48nouveau_grctx_prog_load(struct drm_device *dev)
49{
50 struct drm_nouveau_private *dev_priv = dev->dev_private;
51 struct nouveau_pgraph_engine *pgraph = &dev_priv->engine.graph;
52 const int chipset = dev_priv->chipset;
53 const struct firmware *fw;
54 const struct nouveau_ctxprog *cp;
55 const struct nouveau_ctxvals *cv;
56 char name[32];
57 int ret, i;
58
59 if (pgraph->accel_blocked)
60 return -ENODEV;
61
62 if (!pgraph->ctxprog) {
63 sprintf(name, "nouveau/nv%02x.ctxprog", chipset);
64 ret = request_firmware(&fw, name, &dev->pdev->dev);
65 if (ret) {
66 NV_ERROR(dev, "No ctxprog for NV%02x\n", chipset);
67 return ret;
68 }
69
70 pgraph->ctxprog = kmalloc(fw->size, GFP_KERNEL);
71 if (!pgraph->ctxprog) {
72 NV_ERROR(dev, "OOM copying ctxprog\n");
73 release_firmware(fw);
74 return -ENOMEM;
75 }
76 memcpy(pgraph->ctxprog, fw->data, fw->size);
77
78 cp = pgraph->ctxprog;
79 if (le32_to_cpu(cp->signature) != 0x5043564e ||
80 cp->version != 0 ||
81 le16_to_cpu(cp->length) != ((fw->size - 7) / 4)) {
82 NV_ERROR(dev, "ctxprog invalid\n");
83 release_firmware(fw);
84 nouveau_grctx_fini(dev);
85 return -EINVAL;
86 }
87 release_firmware(fw);
88 }
89
90 if (!pgraph->ctxvals) {
91 sprintf(name, "nouveau/nv%02x.ctxvals", chipset);
92 ret = request_firmware(&fw, name, &dev->pdev->dev);
93 if (ret) {
94 NV_ERROR(dev, "No ctxvals for NV%02x\n", chipset);
95 nouveau_grctx_fini(dev);
96 return ret;
97 }
98
99 pgraph->ctxvals = kmalloc(fw->size, GFP_KERNEL);
100 if (!pgraph->ctxvals) {
101 NV_ERROR(dev, "OOM copying ctxvals\n");
102 release_firmware(fw);
103 nouveau_grctx_fini(dev);
104 return -ENOMEM;
105 }
106 memcpy(pgraph->ctxvals, fw->data, fw->size);
107
108 cv = (void *)pgraph->ctxvals;
109 if (le32_to_cpu(cv->signature) != 0x5643564e ||
110 cv->version != 0 ||
111 le32_to_cpu(cv->length) != ((fw->size - 9) / 8)) {
112 NV_ERROR(dev, "ctxvals invalid\n");
113 release_firmware(fw);
114 nouveau_grctx_fini(dev);
115 return -EINVAL;
116 }
117 release_firmware(fw);
118 }
119
120 cp = pgraph->ctxprog;
121
122 nv_wr32(dev, NV40_PGRAPH_CTXCTL_UCODE_INDEX, 0);
123 for (i = 0; i < le16_to_cpu(cp->length); i++)
124 nv_wr32(dev, NV40_PGRAPH_CTXCTL_UCODE_DATA,
125 le32_to_cpu(cp->data[i]));
126
127 return 0;
128}
129
130void
131nouveau_grctx_fini(struct drm_device *dev)
132{
133 struct drm_nouveau_private *dev_priv = dev->dev_private;
134 struct nouveau_pgraph_engine *pgraph = &dev_priv->engine.graph;
135
136 if (pgraph->ctxprog) {
137 kfree(pgraph->ctxprog);
138 pgraph->ctxprog = NULL;
139 }
140
141 if (pgraph->ctxvals) {
142 kfree(pgraph->ctxprog);
143 pgraph->ctxvals = NULL;
144 }
145}
146
147void
148nouveau_grctx_vals_load(struct drm_device *dev, struct nouveau_gpuobj *ctx)
149{
150 struct drm_nouveau_private *dev_priv = dev->dev_private;
151 struct nouveau_pgraph_engine *pgraph = &dev_priv->engine.graph;
152 struct nouveau_ctxvals *cv = pgraph->ctxvals;
153 int i;
154
155 if (!cv)
156 return;
157
158 for (i = 0; i < le32_to_cpu(cv->length); i++)
159 nv_wo32(dev, ctx, le32_to_cpu(cv->data[i].offset),
160 le32_to_cpu(cv->data[i].value));
161}
diff --git a/drivers/gpu/drm/nouveau/nouveau_grctx.h b/drivers/gpu/drm/nouveau/nouveau_grctx.h
new file mode 100644
index 000000000000..5d39c4ce8006
--- /dev/null
+++ b/drivers/gpu/drm/nouveau/nouveau_grctx.h
@@ -0,0 +1,133 @@
1#ifndef __NOUVEAU_GRCTX_H__
2#define __NOUVEAU_GRCTX_H__
3
4struct nouveau_grctx {
5 struct drm_device *dev;
6
7 enum {
8 NOUVEAU_GRCTX_PROG,
9 NOUVEAU_GRCTX_VALS
10 } mode;
11 void *data;
12
13 uint32_t ctxprog_max;
14 uint32_t ctxprog_len;
15 uint32_t ctxprog_reg;
16 int ctxprog_label[32];
17 uint32_t ctxvals_pos;
18 uint32_t ctxvals_base;
19};
20
21#ifdef CP_CTX
22static inline void
23cp_out(struct nouveau_grctx *ctx, uint32_t inst)
24{
25 uint32_t *ctxprog = ctx->data;
26
27 if (ctx->mode != NOUVEAU_GRCTX_PROG)
28 return;
29
30 BUG_ON(ctx->ctxprog_len == ctx->ctxprog_max);
31 ctxprog[ctx->ctxprog_len++] = inst;
32}
33
34static inline void
35cp_lsr(struct nouveau_grctx *ctx, uint32_t val)
36{
37 cp_out(ctx, CP_LOAD_SR | val);
38}
39
40static inline void
41cp_ctx(struct nouveau_grctx *ctx, uint32_t reg, uint32_t length)
42{
43 ctx->ctxprog_reg = (reg - 0x00400000) >> 2;
44
45 ctx->ctxvals_base = ctx->ctxvals_pos;
46 ctx->ctxvals_pos = ctx->ctxvals_base + length;
47
48 if (length > (CP_CTX_COUNT >> CP_CTX_COUNT_SHIFT)) {
49 cp_lsr(ctx, length);
50 length = 0;
51 }
52
53 cp_out(ctx, CP_CTX | (length << CP_CTX_COUNT_SHIFT) | ctx->ctxprog_reg);
54}
55
56static inline void
57cp_name(struct nouveau_grctx *ctx, int name)
58{
59 uint32_t *ctxprog = ctx->data;
60 int i;
61
62 if (ctx->mode != NOUVEAU_GRCTX_PROG)
63 return;
64
65 ctx->ctxprog_label[name] = ctx->ctxprog_len;
66 for (i = 0; i < ctx->ctxprog_len; i++) {
67 if ((ctxprog[i] & 0xfff00000) != 0xff400000)
68 continue;
69 if ((ctxprog[i] & CP_BRA_IP) != ((name) << CP_BRA_IP_SHIFT))
70 continue;
71 ctxprog[i] = (ctxprog[i] & 0x00ff00ff) |
72 (ctx->ctxprog_len << CP_BRA_IP_SHIFT);
73 }
74}
75
76static inline void
77_cp_bra(struct nouveau_grctx *ctx, u32 mod, int flag, int state, int name)
78{
79 int ip = 0;
80
81 if (mod != 2) {
82 ip = ctx->ctxprog_label[name] << CP_BRA_IP_SHIFT;
83 if (ip == 0)
84 ip = 0xff000000 | (name << CP_BRA_IP_SHIFT);
85 }
86
87 cp_out(ctx, CP_BRA | (mod << 18) | ip | flag |
88 (state ? 0 : CP_BRA_IF_CLEAR));
89}
90#define cp_bra(c,f,s,n) _cp_bra((c), 0, CP_FLAG_##f, CP_FLAG_##f##_##s, n)
91#ifdef CP_BRA_MOD
92#define cp_cal(c,f,s,n) _cp_bra((c), 1, CP_FLAG_##f, CP_FLAG_##f##_##s, n)
93#define cp_ret(c,f,s) _cp_bra((c), 2, CP_FLAG_##f, CP_FLAG_##f##_##s, 0)
94#endif
95
96static inline void
97_cp_wait(struct nouveau_grctx *ctx, int flag, int state)
98{
99 cp_out(ctx, CP_WAIT | flag | (state ? CP_WAIT_SET : 0));
100}
101#define cp_wait(c,f,s) _cp_wait((c), CP_FLAG_##f, CP_FLAG_##f##_##s)
102
103static inline void
104_cp_set(struct nouveau_grctx *ctx, int flag, int state)
105{
106 cp_out(ctx, CP_SET | flag | (state ? CP_SET_1 : 0));
107}
108#define cp_set(c,f,s) _cp_set((c), CP_FLAG_##f, CP_FLAG_##f##_##s)
109
110static inline void
111cp_pos(struct nouveau_grctx *ctx, int offset)
112{
113 ctx->ctxvals_pos = offset;
114 ctx->ctxvals_base = ctx->ctxvals_pos;
115
116 cp_lsr(ctx, ctx->ctxvals_pos);
117 cp_out(ctx, CP_SET_CONTEXT_POINTER);
118}
119
120static inline void
121gr_def(struct nouveau_grctx *ctx, uint32_t reg, uint32_t val)
122{
123 if (ctx->mode != NOUVEAU_GRCTX_VALS)
124 return;
125
126 reg = (reg - 0x00400000) / 4;
127 reg = (reg - ctx->ctxprog_reg) + ctx->ctxvals_base;
128
129 nv_wo32(ctx->dev, ctx->data, reg, val);
130}
131#endif
132
133#endif
diff --git a/drivers/gpu/drm/nouveau/nouveau_ioc32.c b/drivers/gpu/drm/nouveau/nouveau_ioc32.c
index a2c30f4611ba..475ba810bba3 100644
--- a/drivers/gpu/drm/nouveau/nouveau_ioc32.c
+++ b/drivers/gpu/drm/nouveau/nouveau_ioc32.c
@@ -61,12 +61,10 @@ long nouveau_compat_ioctl(struct file *filp, unsigned int cmd,
61 if (nr < DRM_COMMAND_BASE + DRM_ARRAY_SIZE(mga_compat_ioctls)) 61 if (nr < DRM_COMMAND_BASE + DRM_ARRAY_SIZE(mga_compat_ioctls))
62 fn = nouveau_compat_ioctls[nr - DRM_COMMAND_BASE]; 62 fn = nouveau_compat_ioctls[nr - DRM_COMMAND_BASE];
63#endif 63#endif
64 lock_kernel(); /* XXX for now */
65 if (fn != NULL) 64 if (fn != NULL)
66 ret = (*fn)(filp, cmd, arg); 65 ret = (*fn)(filp, cmd, arg);
67 else 66 else
68 ret = drm_ioctl(filp->f_dentry->d_inode, filp, cmd, arg); 67 ret = drm_ioctl(filp, cmd, arg);
69 unlock_kernel();
70 68
71 return ret; 69 return ret;
72} 70}
diff --git a/drivers/gpu/drm/nouveau/nouveau_irq.c b/drivers/gpu/drm/nouveau/nouveau_irq.c
index 370c72c968d1..447f9f69d6b1 100644
--- a/drivers/gpu/drm/nouveau/nouveau_irq.c
+++ b/drivers/gpu/drm/nouveau/nouveau_irq.c
@@ -211,6 +211,20 @@ nouveau_fifo_irq_handler(struct drm_device *dev)
211 get + 4); 211 get + 4);
212 } 212 }
213 213
214 if (status & NV_PFIFO_INTR_SEMAPHORE) {
215 uint32_t sem;
216
217 status &= ~NV_PFIFO_INTR_SEMAPHORE;
218 nv_wr32(dev, NV03_PFIFO_INTR_0,
219 NV_PFIFO_INTR_SEMAPHORE);
220
221 sem = nv_rd32(dev, NV10_PFIFO_CACHE1_SEMAPHORE);
222 nv_wr32(dev, NV10_PFIFO_CACHE1_SEMAPHORE, sem | 0x1);
223
224 nv_wr32(dev, NV03_PFIFO_CACHE1_GET, get + 4);
225 nv_wr32(dev, NV04_PFIFO_CACHE1_PULL0, 1);
226 }
227
214 if (status) { 228 if (status) {
215 NV_INFO(dev, "PFIFO_INTR 0x%08x - Ch %d\n", 229 NV_INFO(dev, "PFIFO_INTR 0x%08x - Ch %d\n",
216 status, chid); 230 status, chid);
@@ -483,6 +497,13 @@ nouveau_pgraph_intr_error(struct drm_device *dev, uint32_t nsource)
483 if (nsource & NV03_PGRAPH_NSOURCE_ILLEGAL_MTHD) { 497 if (nsource & NV03_PGRAPH_NSOURCE_ILLEGAL_MTHD) {
484 if (nouveau_pgraph_intr_swmthd(dev, &trap)) 498 if (nouveau_pgraph_intr_swmthd(dev, &trap))
485 unhandled = 1; 499 unhandled = 1;
500 } else if (nsource & NV03_PGRAPH_NSOURCE_DMA_VTX_PROTECTION) {
501 uint32_t v = nv_rd32(dev, 0x402000);
502 nv_wr32(dev, 0x402000, v);
503
504 /* dump the error anyway for now: it's useful for
505 Gallium development */
506 unhandled = 1;
486 } else { 507 } else {
487 unhandled = 1; 508 unhandled = 1;
488 } 509 }
@@ -559,85 +580,99 @@ nouveau_pgraph_irq_handler(struct drm_device *dev)
559static void 580static void
560nv50_pgraph_irq_handler(struct drm_device *dev) 581nv50_pgraph_irq_handler(struct drm_device *dev)
561{ 582{
562 uint32_t status, nsource; 583 uint32_t status;
563 584
564 status = nv_rd32(dev, NV03_PGRAPH_INTR); 585 while ((status = nv_rd32(dev, NV03_PGRAPH_INTR))) {
565 nsource = nv_rd32(dev, NV03_PGRAPH_NSOURCE); 586 uint32_t nsource = nv_rd32(dev, NV03_PGRAPH_NSOURCE);
566 587
567 if (status & 0x00000001) { 588 if (status & 0x00000001) {
568 nouveau_pgraph_intr_notify(dev, nsource); 589 nouveau_pgraph_intr_notify(dev, nsource);
569 status &= ~0x00000001; 590 status &= ~0x00000001;
570 nv_wr32(dev, NV03_PGRAPH_INTR, 0x00000001); 591 nv_wr32(dev, NV03_PGRAPH_INTR, 0x00000001);
571 } 592 }
572 593
573 if (status & 0x00000010) { 594 if (status & 0x00000010) {
574 nouveau_pgraph_intr_error(dev, nsource | 595 nouveau_pgraph_intr_error(dev, nsource |
575 NV03_PGRAPH_NSOURCE_ILLEGAL_MTHD); 596 NV03_PGRAPH_NSOURCE_ILLEGAL_MTHD);
576 597
577 status &= ~0x00000010; 598 status &= ~0x00000010;
578 nv_wr32(dev, NV03_PGRAPH_INTR, 0x00000010); 599 nv_wr32(dev, NV03_PGRAPH_INTR, 0x00000010);
579 } 600 }
580 601
581 if (status & 0x00001000) { 602 if (status & 0x00001000) {
582 nv_wr32(dev, 0x400500, 0x00000000); 603 nv_wr32(dev, 0x400500, 0x00000000);
583 nv_wr32(dev, NV03_PGRAPH_INTR, NV_PGRAPH_INTR_CONTEXT_SWITCH); 604 nv_wr32(dev, NV03_PGRAPH_INTR,
584 nv_wr32(dev, NV40_PGRAPH_INTR_EN, nv_rd32(dev, 605 NV_PGRAPH_INTR_CONTEXT_SWITCH);
585 NV40_PGRAPH_INTR_EN) & ~NV_PGRAPH_INTR_CONTEXT_SWITCH); 606 nv_wr32(dev, NV40_PGRAPH_INTR_EN, nv_rd32(dev,
586 nv_wr32(dev, 0x400500, 0x00010001); 607 NV40_PGRAPH_INTR_EN) &
608 ~NV_PGRAPH_INTR_CONTEXT_SWITCH);
609 nv_wr32(dev, 0x400500, 0x00010001);
587 610
588 nv50_graph_context_switch(dev); 611 nv50_graph_context_switch(dev);
589 612
590 status &= ~NV_PGRAPH_INTR_CONTEXT_SWITCH; 613 status &= ~NV_PGRAPH_INTR_CONTEXT_SWITCH;
591 } 614 }
592 615
593 if (status & 0x00100000) { 616 if (status & 0x00100000) {
594 nouveau_pgraph_intr_error(dev, nsource | 617 nouveau_pgraph_intr_error(dev, nsource |
595 NV03_PGRAPH_NSOURCE_DATA_ERROR); 618 NV03_PGRAPH_NSOURCE_DATA_ERROR);
596 619
597 status &= ~0x00100000; 620 status &= ~0x00100000;
598 nv_wr32(dev, NV03_PGRAPH_INTR, 0x00100000); 621 nv_wr32(dev, NV03_PGRAPH_INTR, 0x00100000);
599 } 622 }
600 623
601 if (status & 0x00200000) { 624 if (status & 0x00200000) {
602 int r; 625 int r;
603 626
604 nouveau_pgraph_intr_error(dev, nsource | 627 nouveau_pgraph_intr_error(dev, nsource |
605 NV03_PGRAPH_NSOURCE_PROTECTION_ERROR); 628 NV03_PGRAPH_NSOURCE_PROTECTION_ERROR);
606 629
607 NV_ERROR(dev, "magic set 1:\n"); 630 NV_ERROR(dev, "magic set 1:\n");
608 for (r = 0x408900; r <= 0x408910; r += 4) 631 for (r = 0x408900; r <= 0x408910; r += 4)
609 NV_ERROR(dev, "\t0x%08x: 0x%08x\n", r, nv_rd32(dev, r)); 632 NV_ERROR(dev, "\t0x%08x: 0x%08x\n", r,
610 nv_wr32(dev, 0x408900, nv_rd32(dev, 0x408904) | 0xc0000000); 633 nv_rd32(dev, r));
611 for (r = 0x408e08; r <= 0x408e24; r += 4) 634 nv_wr32(dev, 0x408900,
612 NV_ERROR(dev, "\t0x%08x: 0x%08x\n", r, nv_rd32(dev, r)); 635 nv_rd32(dev, 0x408904) | 0xc0000000);
613 nv_wr32(dev, 0x408e08, nv_rd32(dev, 0x408e08) | 0xc0000000); 636 for (r = 0x408e08; r <= 0x408e24; r += 4)
614 637 NV_ERROR(dev, "\t0x%08x: 0x%08x\n", r,
615 NV_ERROR(dev, "magic set 2:\n"); 638 nv_rd32(dev, r));
616 for (r = 0x409900; r <= 0x409910; r += 4) 639 nv_wr32(dev, 0x408e08,
617 NV_ERROR(dev, "\t0x%08x: 0x%08x\n", r, nv_rd32(dev, r)); 640 nv_rd32(dev, 0x408e08) | 0xc0000000);
618 nv_wr32(dev, 0x409900, nv_rd32(dev, 0x409904) | 0xc0000000); 641
619 for (r = 0x409e08; r <= 0x409e24; r += 4) 642 NV_ERROR(dev, "magic set 2:\n");
620 NV_ERROR(dev, "\t0x%08x: 0x%08x\n", r, nv_rd32(dev, r)); 643 for (r = 0x409900; r <= 0x409910; r += 4)
621 nv_wr32(dev, 0x409e08, nv_rd32(dev, 0x409e08) | 0xc0000000); 644 NV_ERROR(dev, "\t0x%08x: 0x%08x\n", r,
622 645 nv_rd32(dev, r));
623 status &= ~0x00200000; 646 nv_wr32(dev, 0x409900,
624 nv_wr32(dev, NV03_PGRAPH_NSOURCE, nsource); 647 nv_rd32(dev, 0x409904) | 0xc0000000);
625 nv_wr32(dev, NV03_PGRAPH_INTR, 0x00200000); 648 for (r = 0x409e08; r <= 0x409e24; r += 4)
626 } 649 NV_ERROR(dev, "\t0x%08x: 0x%08x\n", r,
650 nv_rd32(dev, r));
651 nv_wr32(dev, 0x409e08,
652 nv_rd32(dev, 0x409e08) | 0xc0000000);
653
654 status &= ~0x00200000;
655 nv_wr32(dev, NV03_PGRAPH_NSOURCE, nsource);
656 nv_wr32(dev, NV03_PGRAPH_INTR, 0x00200000);
657 }
627 658
628 if (status) { 659 if (status) {
629 NV_INFO(dev, "Unhandled PGRAPH_INTR - 0x%08x\n", status); 660 NV_INFO(dev, "Unhandled PGRAPH_INTR - 0x%08x\n",
630 nv_wr32(dev, NV03_PGRAPH_INTR, status); 661 status);
631 } 662 nv_wr32(dev, NV03_PGRAPH_INTR, status);
663 }
632 664
633 { 665 {
634 const int isb = (1 << 16) | (1 << 0); 666 const int isb = (1 << 16) | (1 << 0);
635 667
636 if ((nv_rd32(dev, 0x400500) & isb) != isb) 668 if ((nv_rd32(dev, 0x400500) & isb) != isb)
637 nv_wr32(dev, 0x400500, nv_rd32(dev, 0x400500) | isb); 669 nv_wr32(dev, 0x400500,
670 nv_rd32(dev, 0x400500) | isb);
671 }
638 } 672 }
639 673
640 nv_wr32(dev, NV03_PMC_INTR_0, NV_PMC_INTR_0_PGRAPH_PENDING); 674 nv_wr32(dev, NV03_PMC_INTR_0, NV_PMC_INTR_0_PGRAPH_PENDING);
675 nv_wr32(dev, 0x400824, nv_rd32(dev, 0x400824) & ~(1 << 31));
641} 676}
642 677
643static void 678static void
diff --git a/drivers/gpu/drm/nouveau/nouveau_mem.c b/drivers/gpu/drm/nouveau/nouveau_mem.c
index 02755712ed3d..2dc09dbd817d 100644
--- a/drivers/gpu/drm/nouveau/nouveau_mem.c
+++ b/drivers/gpu/drm/nouveau/nouveau_mem.c
@@ -192,6 +192,92 @@ void nouveau_mem_release(struct drm_file *file_priv, struct mem_block *heap)
192} 192}
193 193
194/* 194/*
195 * NV10-NV40 tiling helpers
196 */
197
198static void
199nv10_mem_set_region_tiling(struct drm_device *dev, int i, uint32_t addr,
200 uint32_t size, uint32_t pitch)
201{
202 struct drm_nouveau_private *dev_priv = dev->dev_private;
203 struct nouveau_fifo_engine *pfifo = &dev_priv->engine.fifo;
204 struct nouveau_fb_engine *pfb = &dev_priv->engine.fb;
205 struct nouveau_pgraph_engine *pgraph = &dev_priv->engine.graph;
206 struct nouveau_tile_reg *tile = &dev_priv->tile.reg[i];
207
208 tile->addr = addr;
209 tile->size = size;
210 tile->used = !!pitch;
211 nouveau_fence_unref((void **)&tile->fence);
212
213 if (!pfifo->cache_flush(dev))
214 return;
215
216 pfifo->reassign(dev, false);
217 pfifo->cache_flush(dev);
218 pfifo->cache_pull(dev, false);
219
220 nouveau_wait_for_idle(dev);
221
222 pgraph->set_region_tiling(dev, i, addr, size, pitch);
223 pfb->set_region_tiling(dev, i, addr, size, pitch);
224
225 pfifo->cache_pull(dev, true);
226 pfifo->reassign(dev, true);
227}
228
229struct nouveau_tile_reg *
230nv10_mem_set_tiling(struct drm_device *dev, uint32_t addr, uint32_t size,
231 uint32_t pitch)
232{
233 struct drm_nouveau_private *dev_priv = dev->dev_private;
234 struct nouveau_fb_engine *pfb = &dev_priv->engine.fb;
235 struct nouveau_tile_reg *tile = dev_priv->tile.reg, *found = NULL;
236 int i;
237
238 spin_lock(&dev_priv->tile.lock);
239
240 for (i = 0; i < pfb->num_tiles; i++) {
241 if (tile[i].used)
242 /* Tile region in use. */
243 continue;
244
245 if (tile[i].fence &&
246 !nouveau_fence_signalled(tile[i].fence, NULL))
247 /* Pending tile region. */
248 continue;
249
250 if (max(tile[i].addr, addr) <
251 min(tile[i].addr + tile[i].size, addr + size))
252 /* Kill an intersecting tile region. */
253 nv10_mem_set_region_tiling(dev, i, 0, 0, 0);
254
255 if (pitch && !found) {
256 /* Free tile region. */
257 nv10_mem_set_region_tiling(dev, i, addr, size, pitch);
258 found = &tile[i];
259 }
260 }
261
262 spin_unlock(&dev_priv->tile.lock);
263
264 return found;
265}
266
267void
268nv10_mem_expire_tiling(struct drm_device *dev, struct nouveau_tile_reg *tile,
269 struct nouveau_fence *fence)
270{
271 if (fence) {
272 /* Mark it as pending. */
273 tile->fence = fence;
274 nouveau_fence_ref(fence);
275 }
276
277 tile->used = false;
278}
279
280/*
195 * NV50 VM helpers 281 * NV50 VM helpers
196 */ 282 */
197int 283int
@@ -199,53 +285,50 @@ nv50_mem_vm_bind_linear(struct drm_device *dev, uint64_t virt, uint32_t size,
199 uint32_t flags, uint64_t phys) 285 uint32_t flags, uint64_t phys)
200{ 286{
201 struct drm_nouveau_private *dev_priv = dev->dev_private; 287 struct drm_nouveau_private *dev_priv = dev->dev_private;
202 struct nouveau_gpuobj **pgt; 288 struct nouveau_gpuobj *pgt;
203 unsigned psz, pfl, pages; 289 unsigned block;
204 290 int i;
205 if (virt >= dev_priv->vm_gart_base && 291
206 (virt + size) < (dev_priv->vm_gart_base + dev_priv->vm_gart_size)) { 292 virt = ((virt - dev_priv->vm_vram_base) >> 16) << 1;
207 psz = 12; 293 size = (size >> 16) << 1;
208 pgt = &dev_priv->gart_info.sg_ctxdma; 294
209 pfl = 0x21; 295 phys |= ((uint64_t)flags << 32);
210 virt -= dev_priv->vm_gart_base; 296 phys |= 1;
211 } else 297 if (dev_priv->vram_sys_base) {
212 if (virt >= dev_priv->vm_vram_base && 298 phys += dev_priv->vram_sys_base;
213 (virt + size) < (dev_priv->vm_vram_base + dev_priv->vm_vram_size)) { 299 phys |= 0x30;
214 psz = 16;
215 pgt = dev_priv->vm_vram_pt;
216 pfl = 0x01;
217 virt -= dev_priv->vm_vram_base;
218 } else {
219 NV_ERROR(dev, "Invalid address: 0x%16llx-0x%16llx\n",
220 virt, virt + size - 1);
221 return -EINVAL;
222 } 300 }
223 301
224 pages = size >> psz;
225
226 dev_priv->engine.instmem.prepare_access(dev, true); 302 dev_priv->engine.instmem.prepare_access(dev, true);
227 if (flags & 0x80000000) { 303 while (size) {
228 while (pages--) { 304 unsigned offset_h = upper_32_bits(phys);
229 struct nouveau_gpuobj *pt = pgt[virt >> 29]; 305 unsigned offset_l = lower_32_bits(phys);
230 unsigned pte = ((virt & 0x1fffffffULL) >> psz) << 1; 306 unsigned pte, end;
307
308 for (i = 7; i >= 0; i--) {
309 block = 1 << (i + 1);
310 if (size >= block && !(virt & (block - 1)))
311 break;
312 }
313 offset_l |= (i << 7);
231 314
232 nv_wo32(dev, pt, pte++, 0x00000000); 315 phys += block << 15;
233 nv_wo32(dev, pt, pte++, 0x00000000); 316 size -= block;
234 317
235 virt += (1 << psz); 318 while (block) {
236 } 319 pgt = dev_priv->vm_vram_pt[virt >> 14];
237 } else { 320 pte = virt & 0x3ffe;
238 while (pages--) {
239 struct nouveau_gpuobj *pt = pgt[virt >> 29];
240 unsigned pte = ((virt & 0x1fffffffULL) >> psz) << 1;
241 unsigned offset_h = upper_32_bits(phys) & 0xff;
242 unsigned offset_l = lower_32_bits(phys);
243 321
244 nv_wo32(dev, pt, pte++, offset_l | pfl); 322 end = pte + block;
245 nv_wo32(dev, pt, pte++, offset_h | flags); 323 if (end > 16384)
324 end = 16384;
325 block -= (end - pte);
326 virt += (end - pte);
246 327
247 phys += (1 << psz); 328 while (pte < end) {
248 virt += (1 << psz); 329 nv_wo32(dev, pgt, pte++, offset_l);
330 nv_wo32(dev, pgt, pte++, offset_h);
331 }
249 } 332 }
250 } 333 }
251 dev_priv->engine.instmem.finish_access(dev); 334 dev_priv->engine.instmem.finish_access(dev);
@@ -270,7 +353,41 @@ nv50_mem_vm_bind_linear(struct drm_device *dev, uint64_t virt, uint32_t size,
270void 353void
271nv50_mem_vm_unbind(struct drm_device *dev, uint64_t virt, uint32_t size) 354nv50_mem_vm_unbind(struct drm_device *dev, uint64_t virt, uint32_t size)
272{ 355{
273 nv50_mem_vm_bind_linear(dev, virt, size, 0x80000000, 0); 356 struct drm_nouveau_private *dev_priv = dev->dev_private;
357 struct nouveau_gpuobj *pgt;
358 unsigned pages, pte, end;
359
360 virt -= dev_priv->vm_vram_base;
361 pages = (size >> 16) << 1;
362
363 dev_priv->engine.instmem.prepare_access(dev, true);
364 while (pages) {
365 pgt = dev_priv->vm_vram_pt[virt >> 29];
366 pte = (virt & 0x1ffe0000ULL) >> 15;
367
368 end = pte + pages;
369 if (end > 16384)
370 end = 16384;
371 pages -= (end - pte);
372 virt += (end - pte) << 15;
373
374 while (pte < end)
375 nv_wo32(dev, pgt, pte++, 0);
376 }
377 dev_priv->engine.instmem.finish_access(dev);
378
379 nv_wr32(dev, 0x100c80, 0x00050001);
380 if (!nv_wait(0x100c80, 0x00000001, 0x00000000)) {
381 NV_ERROR(dev, "timeout: (0x100c80 & 1) == 0 (2)\n");
382 NV_ERROR(dev, "0x100c80 = 0x%08x\n", nv_rd32(dev, 0x100c80));
383 return;
384 }
385
386 nv_wr32(dev, 0x100c80, 0x00000001);
387 if (!nv_wait(0x100c80, 0x00000001, 0x00000000)) {
388 NV_ERROR(dev, "timeout: (0x100c80 & 1) == 0 (2)\n");
389 NV_ERROR(dev, "0x100c80 = 0x%08x\n", nv_rd32(dev, 0x100c80));
390 }
274} 391}
275 392
276/* 393/*
@@ -297,9 +414,8 @@ void nouveau_mem_close(struct drm_device *dev)
297{ 414{
298 struct drm_nouveau_private *dev_priv = dev->dev_private; 415 struct drm_nouveau_private *dev_priv = dev->dev_private;
299 416
300 if (dev_priv->ttm.bdev.man[TTM_PL_PRIV0].has_type) 417 nouveau_bo_unpin(dev_priv->vga_ram);
301 ttm_bo_clean_mm(&dev_priv->ttm.bdev, TTM_PL_PRIV0); 418 nouveau_bo_ref(NULL, &dev_priv->vga_ram);
302 ttm_bo_clean_mm(&dev_priv->ttm.bdev, TTM_PL_VRAM);
303 419
304 ttm_bo_device_release(&dev_priv->ttm.bdev); 420 ttm_bo_device_release(&dev_priv->ttm.bdev);
305 421
@@ -407,6 +523,7 @@ uint64_t nouveau_mem_fb_amount(struct drm_device *dev)
407 return 0; 523 return 0;
408} 524}
409 525
526#if __OS_HAS_AGP
410static void nouveau_mem_reset_agp(struct drm_device *dev) 527static void nouveau_mem_reset_agp(struct drm_device *dev)
411{ 528{
412 uint32_t saved_pci_nv_1, saved_pci_nv_19, pmc_enable; 529 uint32_t saved_pci_nv_1, saved_pci_nv_19, pmc_enable;
@@ -432,10 +549,12 @@ static void nouveau_mem_reset_agp(struct drm_device *dev)
432 nv_wr32(dev, NV04_PBUS_PCI_NV_19, saved_pci_nv_19); 549 nv_wr32(dev, NV04_PBUS_PCI_NV_19, saved_pci_nv_19);
433 nv_wr32(dev, NV04_PBUS_PCI_NV_1, saved_pci_nv_1); 550 nv_wr32(dev, NV04_PBUS_PCI_NV_1, saved_pci_nv_1);
434} 551}
552#endif
435 553
436int 554int
437nouveau_mem_init_agp(struct drm_device *dev) 555nouveau_mem_init_agp(struct drm_device *dev)
438{ 556{
557#if __OS_HAS_AGP
439 struct drm_nouveau_private *dev_priv = dev->dev_private; 558 struct drm_nouveau_private *dev_priv = dev->dev_private;
440 struct drm_agp_info info; 559 struct drm_agp_info info;
441 struct drm_agp_mode mode; 560 struct drm_agp_mode mode;
@@ -471,6 +590,7 @@ nouveau_mem_init_agp(struct drm_device *dev)
471 dev_priv->gart_info.type = NOUVEAU_GART_AGP; 590 dev_priv->gart_info.type = NOUVEAU_GART_AGP;
472 dev_priv->gart_info.aper_base = info.aperture_base; 591 dev_priv->gart_info.aper_base = info.aperture_base;
473 dev_priv->gart_info.aper_size = info.aperture_size; 592 dev_priv->gart_info.aper_size = info.aperture_size;
593#endif
474 return 0; 594 return 0;
475} 595}
476 596
@@ -509,6 +629,7 @@ nouveau_mem_init(struct drm_device *dev)
509 629
510 INIT_LIST_HEAD(&dev_priv->ttm.bo_list); 630 INIT_LIST_HEAD(&dev_priv->ttm.bo_list);
511 spin_lock_init(&dev_priv->ttm.bo_list_lock); 631 spin_lock_init(&dev_priv->ttm.bo_list_lock);
632 spin_lock_init(&dev_priv->tile.lock);
512 633
513 dev_priv->fb_available_size = nouveau_mem_fb_amount(dev); 634 dev_priv->fb_available_size = nouveau_mem_fb_amount(dev);
514 635
@@ -531,6 +652,15 @@ nouveau_mem_init(struct drm_device *dev)
531 return ret; 652 return ret;
532 } 653 }
533 654
655 ret = nouveau_bo_new(dev, NULL, 256*1024, 0, TTM_PL_FLAG_VRAM,
656 0, 0, true, true, &dev_priv->vga_ram);
657 if (ret == 0)
658 ret = nouveau_bo_pin(dev_priv->vga_ram, TTM_PL_FLAG_VRAM);
659 if (ret) {
660 NV_WARN(dev, "failed to reserve VGA memory\n");
661 nouveau_bo_ref(NULL, &dev_priv->vga_ram);
662 }
663
534 /* GART */ 664 /* GART */
535#if !defined(__powerpc__) && !defined(__ia64__) 665#if !defined(__powerpc__) && !defined(__ia64__)
536 if (drm_device_is_agp(dev) && dev->agp) { 666 if (drm_device_is_agp(dev) && dev->agp) {
@@ -562,6 +692,7 @@ nouveau_mem_init(struct drm_device *dev)
562 dev_priv->fb_mtrr = drm_mtrr_add(drm_get_resource_start(dev, 1), 692 dev_priv->fb_mtrr = drm_mtrr_add(drm_get_resource_start(dev, 1),
563 drm_get_resource_len(dev, 1), 693 drm_get_resource_len(dev, 1),
564 DRM_MTRR_WC); 694 DRM_MTRR_WC);
695
565 return 0; 696 return 0;
566} 697}
567 698
diff --git a/drivers/gpu/drm/nouveau/nouveau_notifier.c b/drivers/gpu/drm/nouveau/nouveau_notifier.c
index 6c66a34b6345..d99dc087f9b1 100644
--- a/drivers/gpu/drm/nouveau/nouveau_notifier.c
+++ b/drivers/gpu/drm/nouveau/nouveau_notifier.c
@@ -34,15 +34,20 @@ nouveau_notifier_init_channel(struct nouveau_channel *chan)
34{ 34{
35 struct drm_device *dev = chan->dev; 35 struct drm_device *dev = chan->dev;
36 struct nouveau_bo *ntfy = NULL; 36 struct nouveau_bo *ntfy = NULL;
37 uint32_t flags;
37 int ret; 38 int ret;
38 39
39 ret = nouveau_gem_new(dev, NULL, PAGE_SIZE, 0, nouveau_vram_notify ? 40 if (nouveau_vram_notify)
40 TTM_PL_FLAG_VRAM : TTM_PL_FLAG_TT, 41 flags = TTM_PL_FLAG_VRAM;
42 else
43 flags = TTM_PL_FLAG_TT;
44
45 ret = nouveau_gem_new(dev, NULL, PAGE_SIZE, 0, flags,
41 0, 0x0000, false, true, &ntfy); 46 0, 0x0000, false, true, &ntfy);
42 if (ret) 47 if (ret)
43 return ret; 48 return ret;
44 49
45 ret = nouveau_bo_pin(ntfy, TTM_PL_FLAG_VRAM); 50 ret = nouveau_bo_pin(ntfy, flags);
46 if (ret) 51 if (ret)
47 goto out_err; 52 goto out_err;
48 53
@@ -128,6 +133,8 @@ nouveau_notifier_alloc(struct nouveau_channel *chan, uint32_t handle,
128 target = NV_DMA_TARGET_PCI; 133 target = NV_DMA_TARGET_PCI;
129 } else { 134 } else {
130 target = NV_DMA_TARGET_AGP; 135 target = NV_DMA_TARGET_AGP;
136 if (dev_priv->card_type >= NV_50)
137 offset += dev_priv->vm_gart_base;
131 } 138 }
132 } else { 139 } else {
133 NV_ERROR(dev, "Bad DMA target, mem_type %d!\n", 140 NV_ERROR(dev, "Bad DMA target, mem_type %d!\n",
diff --git a/drivers/gpu/drm/nouveau/nouveau_object.c b/drivers/gpu/drm/nouveau/nouveau_object.c
index 93379bb81bea..e7c100ba63a1 100644
--- a/drivers/gpu/drm/nouveau/nouveau_object.c
+++ b/drivers/gpu/drm/nouveau/nouveau_object.c
@@ -881,15 +881,16 @@ nouveau_gpuobj_gr_new(struct nouveau_channel *chan, int class,
881 return 0; 881 return 0;
882} 882}
883 883
884static int 884int
885nouveau_gpuobj_sw_new(struct nouveau_channel *chan, int class, 885nouveau_gpuobj_sw_new(struct nouveau_channel *chan, int class,
886 struct nouveau_gpuobj **gpuobj_ret) 886 struct nouveau_gpuobj **gpuobj_ret)
887{ 887{
888 struct drm_nouveau_private *dev_priv = chan->dev->dev_private; 888 struct drm_nouveau_private *dev_priv;
889 struct nouveau_gpuobj *gpuobj; 889 struct nouveau_gpuobj *gpuobj;
890 890
891 if (!chan || !gpuobj_ret || *gpuobj_ret != NULL) 891 if (!chan || !gpuobj_ret || *gpuobj_ret != NULL)
892 return -EINVAL; 892 return -EINVAL;
893 dev_priv = chan->dev->dev_private;
893 894
894 gpuobj = kzalloc(sizeof(*gpuobj), GFP_KERNEL); 895 gpuobj = kzalloc(sizeof(*gpuobj), GFP_KERNEL);
895 if (!gpuobj) 896 if (!gpuobj)
diff --git a/drivers/gpu/drm/nouveau/nouveau_reg.h b/drivers/gpu/drm/nouveau/nouveau_reg.h
index fa1b0e7165b9..aa9b310e41be 100644
--- a/drivers/gpu/drm/nouveau/nouveau_reg.h
+++ b/drivers/gpu/drm/nouveau/nouveau_reg.h
@@ -99,6 +99,7 @@
99 * the card will hang early on in the X init process. 99 * the card will hang early on in the X init process.
100 */ 100 */
101# define NV_PMC_ENABLE_UNK13 (1<<13) 101# define NV_PMC_ENABLE_UNK13 (1<<13)
102#define NV40_PMC_GRAPH_UNITS 0x00001540
102#define NV40_PMC_BACKLIGHT 0x000015f0 103#define NV40_PMC_BACKLIGHT 0x000015f0
103# define NV40_PMC_BACKLIGHT_MASK 0x001f0000 104# define NV40_PMC_BACKLIGHT_MASK 0x001f0000
104#define NV40_PMC_1700 0x00001700 105#define NV40_PMC_1700 0x00001700
@@ -349,19 +350,19 @@
349#define NV04_PGRAPH_BLEND 0x00400824 350#define NV04_PGRAPH_BLEND 0x00400824
350#define NV04_PGRAPH_STORED_FMT 0x00400830 351#define NV04_PGRAPH_STORED_FMT 0x00400830
351#define NV04_PGRAPH_PATT_COLORRAM 0x00400900 352#define NV04_PGRAPH_PATT_COLORRAM 0x00400900
352#define NV40_PGRAPH_TILE0(i) (0x00400900 + (i*16)) 353#define NV20_PGRAPH_TILE(i) (0x00400900 + (i*16))
353#define NV40_PGRAPH_TLIMIT0(i) (0x00400904 + (i*16)) 354#define NV20_PGRAPH_TLIMIT(i) (0x00400904 + (i*16))
354#define NV40_PGRAPH_TSIZE0(i) (0x00400908 + (i*16)) 355#define NV20_PGRAPH_TSIZE(i) (0x00400908 + (i*16))
355#define NV40_PGRAPH_TSTATUS0(i) (0x0040090C + (i*16)) 356#define NV20_PGRAPH_TSTATUS(i) (0x0040090C + (i*16))
356#define NV10_PGRAPH_TILE(i) (0x00400B00 + (i*16)) 357#define NV10_PGRAPH_TILE(i) (0x00400B00 + (i*16))
357#define NV10_PGRAPH_TLIMIT(i) (0x00400B04 + (i*16)) 358#define NV10_PGRAPH_TLIMIT(i) (0x00400B04 + (i*16))
358#define NV10_PGRAPH_TSIZE(i) (0x00400B08 + (i*16)) 359#define NV10_PGRAPH_TSIZE(i) (0x00400B08 + (i*16))
359#define NV10_PGRAPH_TSTATUS(i) (0x00400B0C + (i*16)) 360#define NV10_PGRAPH_TSTATUS(i) (0x00400B0C + (i*16))
360#define NV04_PGRAPH_U_RAM 0x00400D00 361#define NV04_PGRAPH_U_RAM 0x00400D00
361#define NV47_PGRAPH_TILE0(i) (0x00400D00 + (i*16)) 362#define NV47_PGRAPH_TILE(i) (0x00400D00 + (i*16))
362#define NV47_PGRAPH_TLIMIT0(i) (0x00400D04 + (i*16)) 363#define NV47_PGRAPH_TLIMIT(i) (0x00400D04 + (i*16))
363#define NV47_PGRAPH_TSIZE0(i) (0x00400D08 + (i*16)) 364#define NV47_PGRAPH_TSIZE(i) (0x00400D08 + (i*16))
364#define NV47_PGRAPH_TSTATUS0(i) (0x00400D0C + (i*16)) 365#define NV47_PGRAPH_TSTATUS(i) (0x00400D0C + (i*16))
365#define NV04_PGRAPH_V_RAM 0x00400D40 366#define NV04_PGRAPH_V_RAM 0x00400D40
366#define NV04_PGRAPH_W_RAM 0x00400D80 367#define NV04_PGRAPH_W_RAM 0x00400D80
367#define NV10_PGRAPH_COMBINER0_IN_ALPHA 0x00400E40 368#define NV10_PGRAPH_COMBINER0_IN_ALPHA 0x00400E40
diff --git a/drivers/gpu/drm/nouveau/nouveau_sgdma.c b/drivers/gpu/drm/nouveau/nouveau_sgdma.c
index 4c7f1e403e80..ed1590577b6c 100644
--- a/drivers/gpu/drm/nouveau/nouveau_sgdma.c
+++ b/drivers/gpu/drm/nouveau/nouveau_sgdma.c
@@ -54,11 +54,12 @@ static void
54nouveau_sgdma_clear(struct ttm_backend *be) 54nouveau_sgdma_clear(struct ttm_backend *be)
55{ 55{
56 struct nouveau_sgdma_be *nvbe = (struct nouveau_sgdma_be *)be; 56 struct nouveau_sgdma_be *nvbe = (struct nouveau_sgdma_be *)be;
57 struct drm_device *dev = nvbe->dev; 57 struct drm_device *dev;
58
59 NV_DEBUG(nvbe->dev, "\n");
60 58
61 if (nvbe && nvbe->pages) { 59 if (nvbe && nvbe->pages) {
60 dev = nvbe->dev;
61 NV_DEBUG(dev, "\n");
62
62 if (nvbe->bound) 63 if (nvbe->bound)
63 be->func->unbind(be); 64 be->func->unbind(be);
64 65
diff --git a/drivers/gpu/drm/nouveau/nouveau_state.c b/drivers/gpu/drm/nouveau/nouveau_state.c
index 2ed41d339f6a..a4851af5b05e 100644
--- a/drivers/gpu/drm/nouveau/nouveau_state.c
+++ b/drivers/gpu/drm/nouveau/nouveau_state.c
@@ -76,6 +76,8 @@ static int nouveau_init_engine_ptrs(struct drm_device *dev)
76 engine->fifo.disable = nv04_fifo_disable; 76 engine->fifo.disable = nv04_fifo_disable;
77 engine->fifo.enable = nv04_fifo_enable; 77 engine->fifo.enable = nv04_fifo_enable;
78 engine->fifo.reassign = nv04_fifo_reassign; 78 engine->fifo.reassign = nv04_fifo_reassign;
79 engine->fifo.cache_flush = nv04_fifo_cache_flush;
80 engine->fifo.cache_pull = nv04_fifo_cache_pull;
79 engine->fifo.channel_id = nv04_fifo_channel_id; 81 engine->fifo.channel_id = nv04_fifo_channel_id;
80 engine->fifo.create_context = nv04_fifo_create_context; 82 engine->fifo.create_context = nv04_fifo_create_context;
81 engine->fifo.destroy_context = nv04_fifo_destroy_context; 83 engine->fifo.destroy_context = nv04_fifo_destroy_context;
@@ -100,6 +102,7 @@ static int nouveau_init_engine_ptrs(struct drm_device *dev)
100 engine->timer.takedown = nv04_timer_takedown; 102 engine->timer.takedown = nv04_timer_takedown;
101 engine->fb.init = nv10_fb_init; 103 engine->fb.init = nv10_fb_init;
102 engine->fb.takedown = nv10_fb_takedown; 104 engine->fb.takedown = nv10_fb_takedown;
105 engine->fb.set_region_tiling = nv10_fb_set_region_tiling;
103 engine->graph.grclass = nv10_graph_grclass; 106 engine->graph.grclass = nv10_graph_grclass;
104 engine->graph.init = nv10_graph_init; 107 engine->graph.init = nv10_graph_init;
105 engine->graph.takedown = nv10_graph_takedown; 108 engine->graph.takedown = nv10_graph_takedown;
@@ -109,12 +112,15 @@ static int nouveau_init_engine_ptrs(struct drm_device *dev)
109 engine->graph.fifo_access = nv04_graph_fifo_access; 112 engine->graph.fifo_access = nv04_graph_fifo_access;
110 engine->graph.load_context = nv10_graph_load_context; 113 engine->graph.load_context = nv10_graph_load_context;
111 engine->graph.unload_context = nv10_graph_unload_context; 114 engine->graph.unload_context = nv10_graph_unload_context;
115 engine->graph.set_region_tiling = nv10_graph_set_region_tiling;
112 engine->fifo.channels = 32; 116 engine->fifo.channels = 32;
113 engine->fifo.init = nv10_fifo_init; 117 engine->fifo.init = nv10_fifo_init;
114 engine->fifo.takedown = nouveau_stub_takedown; 118 engine->fifo.takedown = nouveau_stub_takedown;
115 engine->fifo.disable = nv04_fifo_disable; 119 engine->fifo.disable = nv04_fifo_disable;
116 engine->fifo.enable = nv04_fifo_enable; 120 engine->fifo.enable = nv04_fifo_enable;
117 engine->fifo.reassign = nv04_fifo_reassign; 121 engine->fifo.reassign = nv04_fifo_reassign;
122 engine->fifo.cache_flush = nv04_fifo_cache_flush;
123 engine->fifo.cache_pull = nv04_fifo_cache_pull;
118 engine->fifo.channel_id = nv10_fifo_channel_id; 124 engine->fifo.channel_id = nv10_fifo_channel_id;
119 engine->fifo.create_context = nv10_fifo_create_context; 125 engine->fifo.create_context = nv10_fifo_create_context;
120 engine->fifo.destroy_context = nv10_fifo_destroy_context; 126 engine->fifo.destroy_context = nv10_fifo_destroy_context;
@@ -139,6 +145,7 @@ static int nouveau_init_engine_ptrs(struct drm_device *dev)
139 engine->timer.takedown = nv04_timer_takedown; 145 engine->timer.takedown = nv04_timer_takedown;
140 engine->fb.init = nv10_fb_init; 146 engine->fb.init = nv10_fb_init;
141 engine->fb.takedown = nv10_fb_takedown; 147 engine->fb.takedown = nv10_fb_takedown;
148 engine->fb.set_region_tiling = nv10_fb_set_region_tiling;
142 engine->graph.grclass = nv20_graph_grclass; 149 engine->graph.grclass = nv20_graph_grclass;
143 engine->graph.init = nv20_graph_init; 150 engine->graph.init = nv20_graph_init;
144 engine->graph.takedown = nv20_graph_takedown; 151 engine->graph.takedown = nv20_graph_takedown;
@@ -148,12 +155,15 @@ static int nouveau_init_engine_ptrs(struct drm_device *dev)
148 engine->graph.fifo_access = nv04_graph_fifo_access; 155 engine->graph.fifo_access = nv04_graph_fifo_access;
149 engine->graph.load_context = nv20_graph_load_context; 156 engine->graph.load_context = nv20_graph_load_context;
150 engine->graph.unload_context = nv20_graph_unload_context; 157 engine->graph.unload_context = nv20_graph_unload_context;
158 engine->graph.set_region_tiling = nv20_graph_set_region_tiling;
151 engine->fifo.channels = 32; 159 engine->fifo.channels = 32;
152 engine->fifo.init = nv10_fifo_init; 160 engine->fifo.init = nv10_fifo_init;
153 engine->fifo.takedown = nouveau_stub_takedown; 161 engine->fifo.takedown = nouveau_stub_takedown;
154 engine->fifo.disable = nv04_fifo_disable; 162 engine->fifo.disable = nv04_fifo_disable;
155 engine->fifo.enable = nv04_fifo_enable; 163 engine->fifo.enable = nv04_fifo_enable;
156 engine->fifo.reassign = nv04_fifo_reassign; 164 engine->fifo.reassign = nv04_fifo_reassign;
165 engine->fifo.cache_flush = nv04_fifo_cache_flush;
166 engine->fifo.cache_pull = nv04_fifo_cache_pull;
157 engine->fifo.channel_id = nv10_fifo_channel_id; 167 engine->fifo.channel_id = nv10_fifo_channel_id;
158 engine->fifo.create_context = nv10_fifo_create_context; 168 engine->fifo.create_context = nv10_fifo_create_context;
159 engine->fifo.destroy_context = nv10_fifo_destroy_context; 169 engine->fifo.destroy_context = nv10_fifo_destroy_context;
@@ -178,6 +188,7 @@ static int nouveau_init_engine_ptrs(struct drm_device *dev)
178 engine->timer.takedown = nv04_timer_takedown; 188 engine->timer.takedown = nv04_timer_takedown;
179 engine->fb.init = nv10_fb_init; 189 engine->fb.init = nv10_fb_init;
180 engine->fb.takedown = nv10_fb_takedown; 190 engine->fb.takedown = nv10_fb_takedown;
191 engine->fb.set_region_tiling = nv10_fb_set_region_tiling;
181 engine->graph.grclass = nv30_graph_grclass; 192 engine->graph.grclass = nv30_graph_grclass;
182 engine->graph.init = nv30_graph_init; 193 engine->graph.init = nv30_graph_init;
183 engine->graph.takedown = nv20_graph_takedown; 194 engine->graph.takedown = nv20_graph_takedown;
@@ -187,12 +198,15 @@ static int nouveau_init_engine_ptrs(struct drm_device *dev)
187 engine->graph.destroy_context = nv20_graph_destroy_context; 198 engine->graph.destroy_context = nv20_graph_destroy_context;
188 engine->graph.load_context = nv20_graph_load_context; 199 engine->graph.load_context = nv20_graph_load_context;
189 engine->graph.unload_context = nv20_graph_unload_context; 200 engine->graph.unload_context = nv20_graph_unload_context;
201 engine->graph.set_region_tiling = nv20_graph_set_region_tiling;
190 engine->fifo.channels = 32; 202 engine->fifo.channels = 32;
191 engine->fifo.init = nv10_fifo_init; 203 engine->fifo.init = nv10_fifo_init;
192 engine->fifo.takedown = nouveau_stub_takedown; 204 engine->fifo.takedown = nouveau_stub_takedown;
193 engine->fifo.disable = nv04_fifo_disable; 205 engine->fifo.disable = nv04_fifo_disable;
194 engine->fifo.enable = nv04_fifo_enable; 206 engine->fifo.enable = nv04_fifo_enable;
195 engine->fifo.reassign = nv04_fifo_reassign; 207 engine->fifo.reassign = nv04_fifo_reassign;
208 engine->fifo.cache_flush = nv04_fifo_cache_flush;
209 engine->fifo.cache_pull = nv04_fifo_cache_pull;
196 engine->fifo.channel_id = nv10_fifo_channel_id; 210 engine->fifo.channel_id = nv10_fifo_channel_id;
197 engine->fifo.create_context = nv10_fifo_create_context; 211 engine->fifo.create_context = nv10_fifo_create_context;
198 engine->fifo.destroy_context = nv10_fifo_destroy_context; 212 engine->fifo.destroy_context = nv10_fifo_destroy_context;
@@ -218,6 +232,7 @@ static int nouveau_init_engine_ptrs(struct drm_device *dev)
218 engine->timer.takedown = nv04_timer_takedown; 232 engine->timer.takedown = nv04_timer_takedown;
219 engine->fb.init = nv40_fb_init; 233 engine->fb.init = nv40_fb_init;
220 engine->fb.takedown = nv40_fb_takedown; 234 engine->fb.takedown = nv40_fb_takedown;
235 engine->fb.set_region_tiling = nv40_fb_set_region_tiling;
221 engine->graph.grclass = nv40_graph_grclass; 236 engine->graph.grclass = nv40_graph_grclass;
222 engine->graph.init = nv40_graph_init; 237 engine->graph.init = nv40_graph_init;
223 engine->graph.takedown = nv40_graph_takedown; 238 engine->graph.takedown = nv40_graph_takedown;
@@ -227,12 +242,15 @@ static int nouveau_init_engine_ptrs(struct drm_device *dev)
227 engine->graph.destroy_context = nv40_graph_destroy_context; 242 engine->graph.destroy_context = nv40_graph_destroy_context;
228 engine->graph.load_context = nv40_graph_load_context; 243 engine->graph.load_context = nv40_graph_load_context;
229 engine->graph.unload_context = nv40_graph_unload_context; 244 engine->graph.unload_context = nv40_graph_unload_context;
245 engine->graph.set_region_tiling = nv40_graph_set_region_tiling;
230 engine->fifo.channels = 32; 246 engine->fifo.channels = 32;
231 engine->fifo.init = nv40_fifo_init; 247 engine->fifo.init = nv40_fifo_init;
232 engine->fifo.takedown = nouveau_stub_takedown; 248 engine->fifo.takedown = nouveau_stub_takedown;
233 engine->fifo.disable = nv04_fifo_disable; 249 engine->fifo.disable = nv04_fifo_disable;
234 engine->fifo.enable = nv04_fifo_enable; 250 engine->fifo.enable = nv04_fifo_enable;
235 engine->fifo.reassign = nv04_fifo_reassign; 251 engine->fifo.reassign = nv04_fifo_reassign;
252 engine->fifo.cache_flush = nv04_fifo_cache_flush;
253 engine->fifo.cache_pull = nv04_fifo_cache_pull;
236 engine->fifo.channel_id = nv10_fifo_channel_id; 254 engine->fifo.channel_id = nv10_fifo_channel_id;
237 engine->fifo.create_context = nv40_fifo_create_context; 255 engine->fifo.create_context = nv40_fifo_create_context;
238 engine->fifo.destroy_context = nv40_fifo_destroy_context; 256 engine->fifo.destroy_context = nv40_fifo_destroy_context;
@@ -292,6 +310,14 @@ static int nouveau_init_engine_ptrs(struct drm_device *dev)
292static unsigned int 310static unsigned int
293nouveau_vga_set_decode(void *priv, bool state) 311nouveau_vga_set_decode(void *priv, bool state)
294{ 312{
313 struct drm_device *dev = priv;
314 struct drm_nouveau_private *dev_priv = dev->dev_private;
315
316 if (dev_priv->chipset >= 0x40)
317 nv_wr32(dev, 0x88054, state);
318 else
319 nv_wr32(dev, 0x1854, state);
320
295 if (state) 321 if (state)
296 return VGA_RSRC_LEGACY_IO | VGA_RSRC_LEGACY_MEM | 322 return VGA_RSRC_LEGACY_IO | VGA_RSRC_LEGACY_MEM |
297 VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM; 323 VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM;
@@ -299,12 +325,57 @@ nouveau_vga_set_decode(void *priv, bool state)
299 return VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM; 325 return VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM;
300} 326}
301 327
328static int
329nouveau_card_init_channel(struct drm_device *dev)
330{
331 struct drm_nouveau_private *dev_priv = dev->dev_private;
332 struct nouveau_gpuobj *gpuobj;
333 int ret;
334
335 ret = nouveau_channel_alloc(dev, &dev_priv->channel,
336 (struct drm_file *)-2,
337 NvDmaFB, NvDmaTT);
338 if (ret)
339 return ret;
340
341 gpuobj = NULL;
342 ret = nouveau_gpuobj_dma_new(dev_priv->channel, NV_CLASS_DMA_IN_MEMORY,
343 0, nouveau_mem_fb_amount(dev),
344 NV_DMA_ACCESS_RW, NV_DMA_TARGET_VIDMEM,
345 &gpuobj);
346 if (ret)
347 goto out_err;
348
349 ret = nouveau_gpuobj_ref_add(dev, dev_priv->channel, NvDmaVRAM,
350 gpuobj, NULL);
351 if (ret)
352 goto out_err;
353
354 gpuobj = NULL;
355 ret = nouveau_gpuobj_gart_dma_new(dev_priv->channel, 0,
356 dev_priv->gart_info.aper_size,
357 NV_DMA_ACCESS_RW, &gpuobj, NULL);
358 if (ret)
359 goto out_err;
360
361 ret = nouveau_gpuobj_ref_add(dev, dev_priv->channel, NvDmaGART,
362 gpuobj, NULL);
363 if (ret)
364 goto out_err;
365
366 return 0;
367out_err:
368 nouveau_gpuobj_del(dev, &gpuobj);
369 nouveau_channel_free(dev_priv->channel);
370 dev_priv->channel = NULL;
371 return ret;
372}
373
302int 374int
303nouveau_card_init(struct drm_device *dev) 375nouveau_card_init(struct drm_device *dev)
304{ 376{
305 struct drm_nouveau_private *dev_priv = dev->dev_private; 377 struct drm_nouveau_private *dev_priv = dev->dev_private;
306 struct nouveau_engine *engine; 378 struct nouveau_engine *engine;
307 struct nouveau_gpuobj *gpuobj;
308 int ret; 379 int ret;
309 380
310 NV_DEBUG(dev, "prev state = %d\n", dev_priv->init_state); 381 NV_DEBUG(dev, "prev state = %d\n", dev_priv->init_state);
@@ -317,7 +388,7 @@ nouveau_card_init(struct drm_device *dev)
317 /* Initialise internal driver API hooks */ 388 /* Initialise internal driver API hooks */
318 ret = nouveau_init_engine_ptrs(dev); 389 ret = nouveau_init_engine_ptrs(dev);
319 if (ret) 390 if (ret)
320 return ret; 391 goto out;
321 engine = &dev_priv->engine; 392 engine = &dev_priv->engine;
322 dev_priv->init_state = NOUVEAU_CARD_INIT_FAILED; 393 dev_priv->init_state = NOUVEAU_CARD_INIT_FAILED;
323 394
@@ -325,12 +396,12 @@ nouveau_card_init(struct drm_device *dev)
325 if (drm_core_check_feature(dev, DRIVER_MODESET)) { 396 if (drm_core_check_feature(dev, DRIVER_MODESET)) {
326 ret = nouveau_bios_init(dev); 397 ret = nouveau_bios_init(dev);
327 if (ret) 398 if (ret)
328 return ret; 399 goto out;
329 } 400 }
330 401
331 ret = nouveau_gpuobj_early_init(dev); 402 ret = nouveau_gpuobj_early_init(dev);
332 if (ret) 403 if (ret)
333 return ret; 404 goto out_bios;
334 405
335 /* Initialise instance memory, must happen before mem_init so we 406 /* Initialise instance memory, must happen before mem_init so we
336 * know exactly how much VRAM we're able to use for "normal" 407 * know exactly how much VRAM we're able to use for "normal"
@@ -338,100 +409,72 @@ nouveau_card_init(struct drm_device *dev)
338 */ 409 */
339 ret = engine->instmem.init(dev); 410 ret = engine->instmem.init(dev);
340 if (ret) 411 if (ret)
341 return ret; 412 goto out_gpuobj_early;
342 413
343 /* Setup the memory manager */ 414 /* Setup the memory manager */
344 ret = nouveau_mem_init(dev); 415 ret = nouveau_mem_init(dev);
345 if (ret) 416 if (ret)
346 return ret; 417 goto out_instmem;
347 418
348 ret = nouveau_gpuobj_init(dev); 419 ret = nouveau_gpuobj_init(dev);
349 if (ret) 420 if (ret)
350 return ret; 421 goto out_mem;
351 422
352 /* PMC */ 423 /* PMC */
353 ret = engine->mc.init(dev); 424 ret = engine->mc.init(dev);
354 if (ret) 425 if (ret)
355 return ret; 426 goto out_gpuobj;
356 427
357 /* PTIMER */ 428 /* PTIMER */
358 ret = engine->timer.init(dev); 429 ret = engine->timer.init(dev);
359 if (ret) 430 if (ret)
360 return ret; 431 goto out_mc;
361 432
362 /* PFB */ 433 /* PFB */
363 ret = engine->fb.init(dev); 434 ret = engine->fb.init(dev);
364 if (ret) 435 if (ret)
365 return ret; 436 goto out_timer;
366 437
367 /* PGRAPH */ 438 if (nouveau_noaccel)
368 ret = engine->graph.init(dev); 439 engine->graph.accel_blocked = true;
369 if (ret) 440 else {
370 return ret; 441 /* PGRAPH */
442 ret = engine->graph.init(dev);
443 if (ret)
444 goto out_fb;
371 445
372 /* PFIFO */ 446 /* PFIFO */
373 ret = engine->fifo.init(dev); 447 ret = engine->fifo.init(dev);
374 if (ret) 448 if (ret)
375 return ret; 449 goto out_graph;
450 }
376 451
377 /* this call irq_preinstall, register irq handler and 452 /* this call irq_preinstall, register irq handler and
378 * call irq_postinstall 453 * call irq_postinstall
379 */ 454 */
380 ret = drm_irq_install(dev); 455 ret = drm_irq_install(dev);
381 if (ret) 456 if (ret)
382 return ret; 457 goto out_fifo;
383 458
384 ret = drm_vblank_init(dev, 0); 459 ret = drm_vblank_init(dev, 0);
385 if (ret) 460 if (ret)
386 return ret; 461 goto out_irq;
387 462
388 /* what about PVIDEO/PCRTC/PRAMDAC etc? */ 463 /* what about PVIDEO/PCRTC/PRAMDAC etc? */
389 464
390 ret = nouveau_channel_alloc(dev, &dev_priv->channel, 465 if (!engine->graph.accel_blocked) {
391 (struct drm_file *)-2, 466 ret = nouveau_card_init_channel(dev);
392 NvDmaFB, NvDmaTT); 467 if (ret)
393 if (ret) 468 goto out_irq;
394 return ret;
395
396 gpuobj = NULL;
397 ret = nouveau_gpuobj_dma_new(dev_priv->channel, NV_CLASS_DMA_IN_MEMORY,
398 0, nouveau_mem_fb_amount(dev),
399 NV_DMA_ACCESS_RW, NV_DMA_TARGET_VIDMEM,
400 &gpuobj);
401 if (ret)
402 return ret;
403
404 ret = nouveau_gpuobj_ref_add(dev, dev_priv->channel, NvDmaVRAM,
405 gpuobj, NULL);
406 if (ret) {
407 nouveau_gpuobj_del(dev, &gpuobj);
408 return ret;
409 }
410
411 gpuobj = NULL;
412 ret = nouveau_gpuobj_gart_dma_new(dev_priv->channel, 0,
413 dev_priv->gart_info.aper_size,
414 NV_DMA_ACCESS_RW, &gpuobj, NULL);
415 if (ret)
416 return ret;
417
418 ret = nouveau_gpuobj_ref_add(dev, dev_priv->channel, NvDmaGART,
419 gpuobj, NULL);
420 if (ret) {
421 nouveau_gpuobj_del(dev, &gpuobj);
422 return ret;
423 } 469 }
424 470
425 if (drm_core_check_feature(dev, DRIVER_MODESET)) { 471 if (drm_core_check_feature(dev, DRIVER_MODESET)) {
426 if (dev_priv->card_type >= NV_50) { 472 if (dev_priv->card_type >= NV_50)
427 ret = nv50_display_create(dev); 473 ret = nv50_display_create(dev);
428 if (ret) 474 else
429 return ret;
430 } else {
431 ret = nv04_display_create(dev); 475 ret = nv04_display_create(dev);
432 if (ret) 476 if (ret)
433 return ret; 477 goto out_irq;
434 }
435 } 478 }
436 479
437 ret = nouveau_backlight_init(dev); 480 ret = nouveau_backlight_init(dev);
@@ -444,6 +487,34 @@ nouveau_card_init(struct drm_device *dev)
444 drm_helper_initial_config(dev); 487 drm_helper_initial_config(dev);
445 488
446 return 0; 489 return 0;
490
491out_irq:
492 drm_irq_uninstall(dev);
493out_fifo:
494 if (!nouveau_noaccel)
495 engine->fifo.takedown(dev);
496out_graph:
497 if (!nouveau_noaccel)
498 engine->graph.takedown(dev);
499out_fb:
500 engine->fb.takedown(dev);
501out_timer:
502 engine->timer.takedown(dev);
503out_mc:
504 engine->mc.takedown(dev);
505out_gpuobj:
506 nouveau_gpuobj_takedown(dev);
507out_mem:
508 nouveau_mem_close(dev);
509out_instmem:
510 engine->instmem.takedown(dev);
511out_gpuobj_early:
512 nouveau_gpuobj_late_takedown(dev);
513out_bios:
514 nouveau_bios_takedown(dev);
515out:
516 vga_client_register(dev->pdev, NULL, NULL, NULL);
517 return ret;
447} 518}
448 519
449static void nouveau_card_takedown(struct drm_device *dev) 520static void nouveau_card_takedown(struct drm_device *dev)
@@ -461,13 +532,16 @@ static void nouveau_card_takedown(struct drm_device *dev)
461 dev_priv->channel = NULL; 532 dev_priv->channel = NULL;
462 } 533 }
463 534
464 engine->fifo.takedown(dev); 535 if (!nouveau_noaccel) {
465 engine->graph.takedown(dev); 536 engine->fifo.takedown(dev);
537 engine->graph.takedown(dev);
538 }
466 engine->fb.takedown(dev); 539 engine->fb.takedown(dev);
467 engine->timer.takedown(dev); 540 engine->timer.takedown(dev);
468 engine->mc.takedown(dev); 541 engine->mc.takedown(dev);
469 542
470 mutex_lock(&dev->struct_mutex); 543 mutex_lock(&dev->struct_mutex);
544 ttm_bo_clean_mm(&dev_priv->ttm.bdev, TTM_PL_VRAM);
471 ttm_bo_clean_mm(&dev_priv->ttm.bdev, TTM_PL_TT); 545 ttm_bo_clean_mm(&dev_priv->ttm.bdev, TTM_PL_TT);
472 mutex_unlock(&dev->struct_mutex); 546 mutex_unlock(&dev->struct_mutex);
473 nouveau_sgdma_takedown(dev); 547 nouveau_sgdma_takedown(dev);
@@ -585,7 +659,10 @@ int nouveau_load(struct drm_device *dev, unsigned long flags)
585 dev_priv->chipset = (reg0 & 0xff00000) >> 20; 659 dev_priv->chipset = (reg0 & 0xff00000) >> 20;
586 /* NV04 or NV05 */ 660 /* NV04 or NV05 */
587 } else if ((reg0 & 0xff00fff0) == 0x20004000) { 661 } else if ((reg0 & 0xff00fff0) == 0x20004000) {
588 dev_priv->chipset = 0x04; 662 if (reg0 & 0x00f00000)
663 dev_priv->chipset = 0x05;
664 else
665 dev_priv->chipset = 0x04;
589 } else 666 } else
590 dev_priv->chipset = 0xff; 667 dev_priv->chipset = 0xff;
591 668
@@ -665,8 +742,8 @@ static void nouveau_close(struct drm_device *dev)
665{ 742{
666 struct drm_nouveau_private *dev_priv = dev->dev_private; 743 struct drm_nouveau_private *dev_priv = dev->dev_private;
667 744
668 /* In the case of an error dev_priv may not be be allocated yet */ 745 /* In the case of an error dev_priv may not be allocated yet */
669 if (dev_priv && dev_priv->card_type) 746 if (dev_priv)
670 nouveau_card_takedown(dev); 747 nouveau_card_takedown(dev);
671} 748}
672 749
@@ -756,6 +833,15 @@ int nouveau_ioctl_getparam(struct drm_device *dev, void *data,
756 case NOUVEAU_GETPARAM_VM_VRAM_BASE: 833 case NOUVEAU_GETPARAM_VM_VRAM_BASE:
757 getparam->value = dev_priv->vm_vram_base; 834 getparam->value = dev_priv->vm_vram_base;
758 break; 835 break;
836 case NOUVEAU_GETPARAM_GRAPH_UNITS:
837 /* NV40 and NV50 versions are quite different, but register
838 * address is the same. User is supposed to know the card
839 * family anyway... */
840 if (dev_priv->chipset >= 0x40) {
841 getparam->value = nv_rd32(dev, NV40_PMC_GRAPH_UNITS);
842 break;
843 }
844 /* FALLTHRU */
759 default: 845 default:
760 NV_ERROR(dev, "unknown parameter %lld\n", getparam->param); 846 NV_ERROR(dev, "unknown parameter %lld\n", getparam->param);
761 return -EINVAL; 847 return -EINVAL;
diff --git a/drivers/gpu/drm/nouveau/nouveau_ttm.c b/drivers/gpu/drm/nouveau/nouveau_ttm.c
index 187eb84e4da5..c385d50f041b 100644
--- a/drivers/gpu/drm/nouveau/nouveau_ttm.c
+++ b/drivers/gpu/drm/nouveau/nouveau_ttm.c
@@ -28,45 +28,17 @@
28 28
29#include "nouveau_drv.h" 29#include "nouveau_drv.h"
30 30
31static struct vm_operations_struct nouveau_ttm_vm_ops;
32static const struct vm_operations_struct *ttm_vm_ops;
33
34static int
35nouveau_ttm_fault(struct vm_area_struct *vma, struct vm_fault *vmf)
36{
37 struct ttm_buffer_object *bo = vma->vm_private_data;
38 int ret;
39
40 if (unlikely(bo == NULL))
41 return VM_FAULT_NOPAGE;
42
43 ret = ttm_vm_ops->fault(vma, vmf);
44 return ret;
45}
46
47int 31int
48nouveau_ttm_mmap(struct file *filp, struct vm_area_struct *vma) 32nouveau_ttm_mmap(struct file *filp, struct vm_area_struct *vma)
49{ 33{
50 struct drm_file *file_priv = filp->private_data; 34 struct drm_file *file_priv = filp->private_data;
51 struct drm_nouveau_private *dev_priv = 35 struct drm_nouveau_private *dev_priv =
52 file_priv->minor->dev->dev_private; 36 file_priv->minor->dev->dev_private;
53 int ret;
54 37
55 if (unlikely(vma->vm_pgoff < DRM_FILE_PAGE_OFFSET)) 38 if (unlikely(vma->vm_pgoff < DRM_FILE_PAGE_OFFSET))
56 return drm_mmap(filp, vma); 39 return drm_mmap(filp, vma);
57 40
58 ret = ttm_bo_mmap(filp, vma, &dev_priv->ttm.bdev); 41 return ttm_bo_mmap(filp, vma, &dev_priv->ttm.bdev);
59 if (unlikely(ret != 0))
60 return ret;
61
62 if (unlikely(ttm_vm_ops == NULL)) {
63 ttm_vm_ops = vma->vm_ops;
64 nouveau_ttm_vm_ops = *ttm_vm_ops;
65 nouveau_ttm_vm_ops.fault = &nouveau_ttm_fault;
66 }
67
68 vma->vm_ops = &nouveau_ttm_vm_ops;
69 return 0;
70} 42}
71 43
72static int 44static int
diff --git a/drivers/gpu/drm/nouveau/nv04_crtc.c b/drivers/gpu/drm/nouveau/nv04_crtc.c
index b91363606055..d2f143ed97c1 100644
--- a/drivers/gpu/drm/nouveau/nv04_crtc.c
+++ b/drivers/gpu/drm/nouveau/nv04_crtc.c
@@ -143,10 +143,10 @@ static void nv_crtc_calc_state_ext(struct drm_crtc *crtc, struct drm_display_mod
143 state->pllsel |= nv_crtc->index ? PLLSEL_VPLL2_MASK : PLLSEL_VPLL1_MASK; 143 state->pllsel |= nv_crtc->index ? PLLSEL_VPLL2_MASK : PLLSEL_VPLL1_MASK;
144 144
145 if (pv->NM2) 145 if (pv->NM2)
146 NV_TRACE(dev, "vpll: n1 %d n2 %d m1 %d m2 %d log2p %d\n", 146 NV_DEBUG_KMS(dev, "vpll: n1 %d n2 %d m1 %d m2 %d log2p %d\n",
147 pv->N1, pv->N2, pv->M1, pv->M2, pv->log2P); 147 pv->N1, pv->N2, pv->M1, pv->M2, pv->log2P);
148 else 148 else
149 NV_TRACE(dev, "vpll: n %d m %d log2p %d\n", 149 NV_DEBUG_KMS(dev, "vpll: n %d m %d log2p %d\n",
150 pv->N1, pv->M1, pv->log2P); 150 pv->N1, pv->M1, pv->log2P);
151 151
152 nv_crtc->cursor.set_offset(nv_crtc, nv_crtc->cursor.offset); 152 nv_crtc->cursor.set_offset(nv_crtc, nv_crtc->cursor.offset);
@@ -160,7 +160,7 @@ nv_crtc_dpms(struct drm_crtc *crtc, int mode)
160 unsigned char seq1 = 0, crtc17 = 0; 160 unsigned char seq1 = 0, crtc17 = 0;
161 unsigned char crtc1A; 161 unsigned char crtc1A;
162 162
163 NV_TRACE(dev, "Setting dpms mode %d on CRTC %d\n", mode, 163 NV_DEBUG_KMS(dev, "Setting dpms mode %d on CRTC %d\n", mode,
164 nv_crtc->index); 164 nv_crtc->index);
165 165
166 if (nv_crtc->last_dpms == mode) /* Don't do unnecesary mode changes. */ 166 if (nv_crtc->last_dpms == mode) /* Don't do unnecesary mode changes. */
@@ -603,7 +603,7 @@ nv_crtc_mode_set(struct drm_crtc *crtc, struct drm_display_mode *mode,
603 struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc); 603 struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
604 struct drm_nouveau_private *dev_priv = dev->dev_private; 604 struct drm_nouveau_private *dev_priv = dev->dev_private;
605 605
606 NV_DEBUG(dev, "CTRC mode on CRTC %d:\n", nv_crtc->index); 606 NV_DEBUG_KMS(dev, "CTRC mode on CRTC %d:\n", nv_crtc->index);
607 drm_mode_debug_printmodeline(adjusted_mode); 607 drm_mode_debug_printmodeline(adjusted_mode);
608 608
609 /* unlock must come after turning off FP_TG_CONTROL in output_prepare */ 609 /* unlock must come after turning off FP_TG_CONTROL in output_prepare */
@@ -703,7 +703,7 @@ static void nv_crtc_destroy(struct drm_crtc *crtc)
703{ 703{
704 struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc); 704 struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
705 705
706 NV_DEBUG(crtc->dev, "\n"); 706 NV_DEBUG_KMS(crtc->dev, "\n");
707 707
708 if (!nv_crtc) 708 if (!nv_crtc)
709 return; 709 return;
diff --git a/drivers/gpu/drm/nouveau/nv04_dac.c b/drivers/gpu/drm/nouveau/nv04_dac.c
index a5fa51714e87..1d73b15d70da 100644
--- a/drivers/gpu/drm/nouveau/nv04_dac.c
+++ b/drivers/gpu/drm/nouveau/nv04_dac.c
@@ -119,7 +119,7 @@ static enum drm_connector_status nv04_dac_detect(struct drm_encoder *encoder,
119 struct drm_connector *connector) 119 struct drm_connector *connector)
120{ 120{
121 struct drm_device *dev = encoder->dev; 121 struct drm_device *dev = encoder->dev;
122 uint8_t saved_seq1, saved_pi, saved_rpc1; 122 uint8_t saved_seq1, saved_pi, saved_rpc1, saved_cr_mode;
123 uint8_t saved_palette0[3], saved_palette_mask; 123 uint8_t saved_palette0[3], saved_palette_mask;
124 uint32_t saved_rtest_ctrl, saved_rgen_ctrl; 124 uint32_t saved_rtest_ctrl, saved_rgen_ctrl;
125 int i; 125 int i;
@@ -135,6 +135,9 @@ static enum drm_connector_status nv04_dac_detect(struct drm_encoder *encoder,
135 /* only implemented for head A for now */ 135 /* only implemented for head A for now */
136 NVSetOwner(dev, 0); 136 NVSetOwner(dev, 0);
137 137
138 saved_cr_mode = NVReadVgaCrtc(dev, 0, NV_CIO_CR_MODE_INDEX);
139 NVWriteVgaCrtc(dev, 0, NV_CIO_CR_MODE_INDEX, saved_cr_mode | 0x80);
140
138 saved_seq1 = NVReadVgaSeq(dev, 0, NV_VIO_SR_CLOCK_INDEX); 141 saved_seq1 = NVReadVgaSeq(dev, 0, NV_VIO_SR_CLOCK_INDEX);
139 NVWriteVgaSeq(dev, 0, NV_VIO_SR_CLOCK_INDEX, saved_seq1 & ~0x20); 142 NVWriteVgaSeq(dev, 0, NV_VIO_SR_CLOCK_INDEX, saved_seq1 & ~0x20);
140 143
@@ -203,25 +206,25 @@ out:
203 NVWriteVgaCrtc(dev, 0, NV_CIO_CRE_PIXEL_INDEX, saved_pi); 206 NVWriteVgaCrtc(dev, 0, NV_CIO_CRE_PIXEL_INDEX, saved_pi);
204 NVWriteVgaCrtc(dev, 0, NV_CIO_CRE_RPC1_INDEX, saved_rpc1); 207 NVWriteVgaCrtc(dev, 0, NV_CIO_CRE_RPC1_INDEX, saved_rpc1);
205 NVWriteVgaSeq(dev, 0, NV_VIO_SR_CLOCK_INDEX, saved_seq1); 208 NVWriteVgaSeq(dev, 0, NV_VIO_SR_CLOCK_INDEX, saved_seq1);
209 NVWriteVgaCrtc(dev, 0, NV_CIO_CR_MODE_INDEX, saved_cr_mode);
206 210
207 if (blue == 0x18) { 211 if (blue == 0x18) {
208 NV_TRACE(dev, "Load detected on head A\n"); 212 NV_INFO(dev, "Load detected on head A\n");
209 return connector_status_connected; 213 return connector_status_connected;
210 } 214 }
211 215
212 return connector_status_disconnected; 216 return connector_status_disconnected;
213} 217}
214 218
215enum drm_connector_status nv17_dac_detect(struct drm_encoder *encoder, 219uint32_t nv17_dac_sample_load(struct drm_encoder *encoder)
216 struct drm_connector *connector)
217{ 220{
218 struct drm_device *dev = encoder->dev; 221 struct drm_device *dev = encoder->dev;
219 struct drm_nouveau_private *dev_priv = dev->dev_private; 222 struct drm_nouveau_private *dev_priv = dev->dev_private;
220 struct dcb_entry *dcb = nouveau_encoder(encoder)->dcb; 223 struct dcb_entry *dcb = nouveau_encoder(encoder)->dcb;
221 uint32_t testval, regoffset = nv04_dac_output_offset(encoder); 224 uint32_t sample, testval, regoffset = nv04_dac_output_offset(encoder);
222 uint32_t saved_powerctrl_2 = 0, saved_powerctrl_4 = 0, saved_routput, 225 uint32_t saved_powerctrl_2 = 0, saved_powerctrl_4 = 0, saved_routput,
223 saved_rtest_ctrl, saved_gpio0, saved_gpio1, temp, routput; 226 saved_rtest_ctrl, saved_gpio0, saved_gpio1, temp, routput;
224 int head, present = 0; 227 int head;
225 228
226#define RGB_TEST_DATA(r, g, b) (r << 0 | g << 10 | b << 20) 229#define RGB_TEST_DATA(r, g, b) (r << 0 | g << 10 | b << 20)
227 if (dcb->type == OUTPUT_TV) { 230 if (dcb->type == OUTPUT_TV) {
@@ -287,13 +290,7 @@ enum drm_connector_status nv17_dac_detect(struct drm_encoder *encoder,
287 temp | NV_PRAMDAC_TEST_CONTROL_TP_INS_EN_ASSERTED); 290 temp | NV_PRAMDAC_TEST_CONTROL_TP_INS_EN_ASSERTED);
288 msleep(5); 291 msleep(5);
289 292
290 temp = NVReadRAMDAC(dev, 0, NV_PRAMDAC_TEST_CONTROL + regoffset); 293 sample = NVReadRAMDAC(dev, 0, NV_PRAMDAC_TEST_CONTROL + regoffset);
291
292 if (dcb->type == OUTPUT_TV)
293 present = (nv17_tv_detect(encoder, connector, temp)
294 == connector_status_connected);
295 else
296 present = temp & NV_PRAMDAC_TEST_CONTROL_SENSEB_ALLHI;
297 294
298 temp = NVReadRAMDAC(dev, head, NV_PRAMDAC_TEST_CONTROL); 295 temp = NVReadRAMDAC(dev, head, NV_PRAMDAC_TEST_CONTROL);
299 NVWriteRAMDAC(dev, head, NV_PRAMDAC_TEST_CONTROL, 296 NVWriteRAMDAC(dev, head, NV_PRAMDAC_TEST_CONTROL,
@@ -310,15 +307,25 @@ enum drm_connector_status nv17_dac_detect(struct drm_encoder *encoder,
310 nv17_gpio_set(dev, DCB_GPIO_TVDAC1, saved_gpio1); 307 nv17_gpio_set(dev, DCB_GPIO_TVDAC1, saved_gpio1);
311 nv17_gpio_set(dev, DCB_GPIO_TVDAC0, saved_gpio0); 308 nv17_gpio_set(dev, DCB_GPIO_TVDAC0, saved_gpio0);
312 309
313 if (present) { 310 return sample;
314 NV_INFO(dev, "Load detected on output %c\n", '@' + ffs(dcb->or)); 311}
312
313static enum drm_connector_status
314nv17_dac_detect(struct drm_encoder *encoder, struct drm_connector *connector)
315{
316 struct drm_device *dev = encoder->dev;
317 struct dcb_entry *dcb = nouveau_encoder(encoder)->dcb;
318 uint32_t sample = nv17_dac_sample_load(encoder);
319
320 if (sample & NV_PRAMDAC_TEST_CONTROL_SENSEB_ALLHI) {
321 NV_INFO(dev, "Load detected on output %c\n",
322 '@' + ffs(dcb->or));
315 return connector_status_connected; 323 return connector_status_connected;
324 } else {
325 return connector_status_disconnected;
316 } 326 }
317
318 return connector_status_disconnected;
319} 327}
320 328
321
322static bool nv04_dac_mode_fixup(struct drm_encoder *encoder, 329static bool nv04_dac_mode_fixup(struct drm_encoder *encoder,
323 struct drm_display_mode *mode, 330 struct drm_display_mode *mode,
324 struct drm_display_mode *adjusted_mode) 331 struct drm_display_mode *adjusted_mode)
@@ -350,14 +357,10 @@ static void nv04_dac_mode_set(struct drm_encoder *encoder,
350 struct drm_display_mode *mode, 357 struct drm_display_mode *mode,
351 struct drm_display_mode *adjusted_mode) 358 struct drm_display_mode *adjusted_mode)
352{ 359{
353 struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
354 struct drm_device *dev = encoder->dev; 360 struct drm_device *dev = encoder->dev;
355 struct drm_nouveau_private *dev_priv = dev->dev_private; 361 struct drm_nouveau_private *dev_priv = dev->dev_private;
356 int head = nouveau_crtc(encoder->crtc)->index; 362 int head = nouveau_crtc(encoder->crtc)->index;
357 363
358 NV_TRACE(dev, "%s called for encoder %d\n", __func__,
359 nv_encoder->dcb->index);
360
361 if (nv_gf4_disp_arch(dev)) { 364 if (nv_gf4_disp_arch(dev)) {
362 struct drm_encoder *rebind; 365 struct drm_encoder *rebind;
363 uint32_t dac_offset = nv04_dac_output_offset(encoder); 366 uint32_t dac_offset = nv04_dac_output_offset(encoder);
@@ -466,7 +469,7 @@ static void nv04_dac_destroy(struct drm_encoder *encoder)
466{ 469{
467 struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder); 470 struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
468 471
469 NV_DEBUG(encoder->dev, "\n"); 472 NV_DEBUG_KMS(encoder->dev, "\n");
470 473
471 drm_encoder_cleanup(encoder); 474 drm_encoder_cleanup(encoder);
472 kfree(nv_encoder); 475 kfree(nv_encoder);
diff --git a/drivers/gpu/drm/nouveau/nv04_dfp.c b/drivers/gpu/drm/nouveau/nv04_dfp.c
index e5b33339d595..483f875bdb6a 100644
--- a/drivers/gpu/drm/nouveau/nv04_dfp.c
+++ b/drivers/gpu/drm/nouveau/nv04_dfp.c
@@ -261,7 +261,7 @@ static void nv04_dfp_mode_set(struct drm_encoder *encoder,
261 struct drm_display_mode *output_mode = &nv_encoder->mode; 261 struct drm_display_mode *output_mode = &nv_encoder->mode;
262 uint32_t mode_ratio, panel_ratio; 262 uint32_t mode_ratio, panel_ratio;
263 263
264 NV_DEBUG(dev, "Output mode on CRTC %d:\n", nv_crtc->index); 264 NV_DEBUG_KMS(dev, "Output mode on CRTC %d:\n", nv_crtc->index);
265 drm_mode_debug_printmodeline(output_mode); 265 drm_mode_debug_printmodeline(output_mode);
266 266
267 /* Initialize the FP registers in this CRTC. */ 267 /* Initialize the FP registers in this CRTC. */
@@ -413,7 +413,9 @@ static void nv04_dfp_commit(struct drm_encoder *encoder)
413 struct dcb_entry *dcbe = nv_encoder->dcb; 413 struct dcb_entry *dcbe = nv_encoder->dcb;
414 int head = nouveau_crtc(encoder->crtc)->index; 414 int head = nouveau_crtc(encoder->crtc)->index;
415 415
416 NV_TRACE(dev, "%s called for encoder %d\n", __func__, nv_encoder->dcb->index); 416 NV_INFO(dev, "Output %s is running on CRTC %d using output %c\n",
417 drm_get_connector_name(&nouveau_encoder_connector_get(nv_encoder)->base),
418 nv_crtc->index, '@' + ffs(nv_encoder->dcb->or));
417 419
418 if (dcbe->type == OUTPUT_TMDS) 420 if (dcbe->type == OUTPUT_TMDS)
419 run_tmds_table(dev, dcbe, head, nv_encoder->mode.clock); 421 run_tmds_table(dev, dcbe, head, nv_encoder->mode.clock);
@@ -550,7 +552,7 @@ static void nv04_dfp_destroy(struct drm_encoder *encoder)
550{ 552{
551 struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder); 553 struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
552 554
553 NV_DEBUG(encoder->dev, "\n"); 555 NV_DEBUG_KMS(encoder->dev, "\n");
554 556
555 drm_encoder_cleanup(encoder); 557 drm_encoder_cleanup(encoder);
556 kfree(nv_encoder); 558 kfree(nv_encoder);
diff --git a/drivers/gpu/drm/nouveau/nv04_display.c b/drivers/gpu/drm/nouveau/nv04_display.c
index b47c757ff48b..ef77215fa5b9 100644
--- a/drivers/gpu/drm/nouveau/nv04_display.c
+++ b/drivers/gpu/drm/nouveau/nv04_display.c
@@ -99,10 +99,11 @@ nv04_display_create(struct drm_device *dev)
99 uint16_t connector[16] = { 0 }; 99 uint16_t connector[16] = { 0 };
100 int i, ret; 100 int i, ret;
101 101
102 NV_DEBUG(dev, "\n"); 102 NV_DEBUG_KMS(dev, "\n");
103 103
104 if (nv_two_heads(dev)) 104 if (nv_two_heads(dev))
105 nv04_display_store_initial_head_owner(dev); 105 nv04_display_store_initial_head_owner(dev);
106 nouveau_hw_save_vga_fonts(dev, 1);
106 107
107 drm_mode_config_init(dev); 108 drm_mode_config_init(dev);
108 drm_mode_create_scaling_mode_property(dev); 109 drm_mode_create_scaling_mode_property(dev);
@@ -203,8 +204,6 @@ nv04_display_create(struct drm_device *dev)
203 /* Save previous state */ 204 /* Save previous state */
204 NVLockVgaCrtcs(dev, false); 205 NVLockVgaCrtcs(dev, false);
205 206
206 nouveau_hw_save_vga_fonts(dev, 1);
207
208 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) 207 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head)
209 crtc->funcs->save(crtc); 208 crtc->funcs->save(crtc);
210 209
@@ -223,7 +222,7 @@ nv04_display_destroy(struct drm_device *dev)
223 struct drm_encoder *encoder; 222 struct drm_encoder *encoder;
224 struct drm_crtc *crtc; 223 struct drm_crtc *crtc;
225 224
226 NV_DEBUG(dev, "\n"); 225 NV_DEBUG_KMS(dev, "\n");
227 226
228 /* Turn every CRTC off. */ 227 /* Turn every CRTC off. */
229 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { 228 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
@@ -246,9 +245,9 @@ nv04_display_destroy(struct drm_device *dev)
246 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) 245 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head)
247 crtc->funcs->restore(crtc); 246 crtc->funcs->restore(crtc);
248 247
249 nouveau_hw_save_vga_fonts(dev, 0);
250
251 drm_mode_config_cleanup(dev); 248 drm_mode_config_cleanup(dev);
249
250 nouveau_hw_save_vga_fonts(dev, 0);
252} 251}
253 252
254void 253void
diff --git a/drivers/gpu/drm/nouveau/nv04_fbcon.c b/drivers/gpu/drm/nouveau/nv04_fbcon.c
index 09a31071ee58..fd01caabd5c3 100644
--- a/drivers/gpu/drm/nouveau/nv04_fbcon.c
+++ b/drivers/gpu/drm/nouveau/nv04_fbcon.c
@@ -27,7 +27,7 @@
27#include "nouveau_dma.h" 27#include "nouveau_dma.h"
28#include "nouveau_fbcon.h" 28#include "nouveau_fbcon.h"
29 29
30static void 30void
31nv04_fbcon_copyarea(struct fb_info *info, const struct fb_copyarea *region) 31nv04_fbcon_copyarea(struct fb_info *info, const struct fb_copyarea *region)
32{ 32{
33 struct nouveau_fbcon_par *par = info->par; 33 struct nouveau_fbcon_par *par = info->par;
@@ -39,8 +39,7 @@ nv04_fbcon_copyarea(struct fb_info *info, const struct fb_copyarea *region)
39 return; 39 return;
40 40
41 if (!(info->flags & FBINFO_HWACCEL_DISABLED) && RING_SPACE(chan, 4)) { 41 if (!(info->flags & FBINFO_HWACCEL_DISABLED) && RING_SPACE(chan, 4)) {
42 NV_ERROR(dev, "GPU lockup - switching to software fbcon\n"); 42 nouveau_fbcon_gpu_lockup(info);
43 info->flags |= FBINFO_HWACCEL_DISABLED;
44 } 43 }
45 44
46 if (info->flags & FBINFO_HWACCEL_DISABLED) { 45 if (info->flags & FBINFO_HWACCEL_DISABLED) {
@@ -55,21 +54,19 @@ nv04_fbcon_copyarea(struct fb_info *info, const struct fb_copyarea *region)
55 FIRE_RING(chan); 54 FIRE_RING(chan);
56} 55}
57 56
58static void 57void
59nv04_fbcon_fillrect(struct fb_info *info, const struct fb_fillrect *rect) 58nv04_fbcon_fillrect(struct fb_info *info, const struct fb_fillrect *rect)
60{ 59{
61 struct nouveau_fbcon_par *par = info->par; 60 struct nouveau_fbcon_par *par = info->par;
62 struct drm_device *dev = par->dev; 61 struct drm_device *dev = par->dev;
63 struct drm_nouveau_private *dev_priv = dev->dev_private; 62 struct drm_nouveau_private *dev_priv = dev->dev_private;
64 struct nouveau_channel *chan = dev_priv->channel; 63 struct nouveau_channel *chan = dev_priv->channel;
65 uint32_t color = ((uint32_t *) info->pseudo_palette)[rect->color];
66 64
67 if (info->state != FBINFO_STATE_RUNNING) 65 if (info->state != FBINFO_STATE_RUNNING)
68 return; 66 return;
69 67
70 if (!(info->flags & FBINFO_HWACCEL_DISABLED) && RING_SPACE(chan, 7)) { 68 if (!(info->flags & FBINFO_HWACCEL_DISABLED) && RING_SPACE(chan, 7)) {
71 NV_ERROR(dev, "GPU lockup - switching to software fbcon\n"); 69 nouveau_fbcon_gpu_lockup(info);
72 info->flags |= FBINFO_HWACCEL_DISABLED;
73 } 70 }
74 71
75 if (info->flags & FBINFO_HWACCEL_DISABLED) { 72 if (info->flags & FBINFO_HWACCEL_DISABLED) {
@@ -80,14 +77,18 @@ nv04_fbcon_fillrect(struct fb_info *info, const struct fb_fillrect *rect)
80 BEGIN_RING(chan, NvSubGdiRect, 0x02fc, 1); 77 BEGIN_RING(chan, NvSubGdiRect, 0x02fc, 1);
81 OUT_RING(chan, (rect->rop != ROP_COPY) ? 1 : 3); 78 OUT_RING(chan, (rect->rop != ROP_COPY) ? 1 : 3);
82 BEGIN_RING(chan, NvSubGdiRect, 0x03fc, 1); 79 BEGIN_RING(chan, NvSubGdiRect, 0x03fc, 1);
83 OUT_RING(chan, color); 80 if (info->fix.visual == FB_VISUAL_TRUECOLOR ||
81 info->fix.visual == FB_VISUAL_DIRECTCOLOR)
82 OUT_RING(chan, ((uint32_t *)info->pseudo_palette)[rect->color]);
83 else
84 OUT_RING(chan, rect->color);
84 BEGIN_RING(chan, NvSubGdiRect, 0x0400, 2); 85 BEGIN_RING(chan, NvSubGdiRect, 0x0400, 2);
85 OUT_RING(chan, (rect->dx << 16) | rect->dy); 86 OUT_RING(chan, (rect->dx << 16) | rect->dy);
86 OUT_RING(chan, (rect->width << 16) | rect->height); 87 OUT_RING(chan, (rect->width << 16) | rect->height);
87 FIRE_RING(chan); 88 FIRE_RING(chan);
88} 89}
89 90
90static void 91void
91nv04_fbcon_imageblit(struct fb_info *info, const struct fb_image *image) 92nv04_fbcon_imageblit(struct fb_info *info, const struct fb_image *image)
92{ 93{
93 struct nouveau_fbcon_par *par = info->par; 94 struct nouveau_fbcon_par *par = info->par;
@@ -109,8 +110,7 @@ nv04_fbcon_imageblit(struct fb_info *info, const struct fb_image *image)
109 } 110 }
110 111
111 if (!(info->flags & FBINFO_HWACCEL_DISABLED) && RING_SPACE(chan, 8)) { 112 if (!(info->flags & FBINFO_HWACCEL_DISABLED) && RING_SPACE(chan, 8)) {
112 NV_ERROR(dev, "GPU lockup - switching to software fbcon\n"); 113 nouveau_fbcon_gpu_lockup(info);
113 info->flags |= FBINFO_HWACCEL_DISABLED;
114 } 114 }
115 115
116 if (info->flags & FBINFO_HWACCEL_DISABLED) { 116 if (info->flags & FBINFO_HWACCEL_DISABLED) {
@@ -144,8 +144,7 @@ nv04_fbcon_imageblit(struct fb_info *info, const struct fb_image *image)
144 int iter_len = dsize > 128 ? 128 : dsize; 144 int iter_len = dsize > 128 ? 128 : dsize;
145 145
146 if (RING_SPACE(chan, iter_len + 1)) { 146 if (RING_SPACE(chan, iter_len + 1)) {
147 NV_ERROR(dev, "GPU lockup - switching to software fbcon\n"); 147 nouveau_fbcon_gpu_lockup(info);
148 info->flags |= FBINFO_HWACCEL_DISABLED;
149 cfb_imageblit(info, image); 148 cfb_imageblit(info, image);
150 return; 149 return;
151 } 150 }
@@ -184,6 +183,7 @@ nv04_fbcon_accel_init(struct fb_info *info)
184 struct drm_device *dev = par->dev; 183 struct drm_device *dev = par->dev;
185 struct drm_nouveau_private *dev_priv = dev->dev_private; 184 struct drm_nouveau_private *dev_priv = dev->dev_private;
186 struct nouveau_channel *chan = dev_priv->channel; 185 struct nouveau_channel *chan = dev_priv->channel;
186 const int sub = NvSubCtxSurf2D;
187 int surface_fmt, pattern_fmt, rect_fmt; 187 int surface_fmt, pattern_fmt, rect_fmt;
188 int ret; 188 int ret;
189 189
@@ -242,30 +242,29 @@ nv04_fbcon_accel_init(struct fb_info *info)
242 return ret; 242 return ret;
243 243
244 if (RING_SPACE(chan, 49)) { 244 if (RING_SPACE(chan, 49)) {
245 NV_ERROR(dev, "GPU lockup - switching to software fbcon\n"); 245 nouveau_fbcon_gpu_lockup(info);
246 info->flags |= FBINFO_HWACCEL_DISABLED;
247 return 0; 246 return 0;
248 } 247 }
249 248
250 BEGIN_RING(chan, 1, 0x0000, 1); 249 BEGIN_RING(chan, sub, 0x0000, 1);
251 OUT_RING(chan, NvCtxSurf2D); 250 OUT_RING(chan, NvCtxSurf2D);
252 BEGIN_RING(chan, 1, 0x0184, 2); 251 BEGIN_RING(chan, sub, 0x0184, 2);
253 OUT_RING(chan, NvDmaFB); 252 OUT_RING(chan, NvDmaFB);
254 OUT_RING(chan, NvDmaFB); 253 OUT_RING(chan, NvDmaFB);
255 BEGIN_RING(chan, 1, 0x0300, 4); 254 BEGIN_RING(chan, sub, 0x0300, 4);
256 OUT_RING(chan, surface_fmt); 255 OUT_RING(chan, surface_fmt);
257 OUT_RING(chan, info->fix.line_length | (info->fix.line_length << 16)); 256 OUT_RING(chan, info->fix.line_length | (info->fix.line_length << 16));
258 OUT_RING(chan, info->fix.smem_start - dev->mode_config.fb_base); 257 OUT_RING(chan, info->fix.smem_start - dev->mode_config.fb_base);
259 OUT_RING(chan, info->fix.smem_start - dev->mode_config.fb_base); 258 OUT_RING(chan, info->fix.smem_start - dev->mode_config.fb_base);
260 259
261 BEGIN_RING(chan, 1, 0x0000, 1); 260 BEGIN_RING(chan, sub, 0x0000, 1);
262 OUT_RING(chan, NvRop); 261 OUT_RING(chan, NvRop);
263 BEGIN_RING(chan, 1, 0x0300, 1); 262 BEGIN_RING(chan, sub, 0x0300, 1);
264 OUT_RING(chan, 0x55); 263 OUT_RING(chan, 0x55);
265 264
266 BEGIN_RING(chan, 1, 0x0000, 1); 265 BEGIN_RING(chan, sub, 0x0000, 1);
267 OUT_RING(chan, NvImagePatt); 266 OUT_RING(chan, NvImagePatt);
268 BEGIN_RING(chan, 1, 0x0300, 8); 267 BEGIN_RING(chan, sub, 0x0300, 8);
269 OUT_RING(chan, pattern_fmt); 268 OUT_RING(chan, pattern_fmt);
270#ifdef __BIG_ENDIAN 269#ifdef __BIG_ENDIAN
271 OUT_RING(chan, 2); 270 OUT_RING(chan, 2);
@@ -279,9 +278,9 @@ nv04_fbcon_accel_init(struct fb_info *info)
279 OUT_RING(chan, ~0); 278 OUT_RING(chan, ~0);
280 OUT_RING(chan, ~0); 279 OUT_RING(chan, ~0);
281 280
282 BEGIN_RING(chan, 1, 0x0000, 1); 281 BEGIN_RING(chan, sub, 0x0000, 1);
283 OUT_RING(chan, NvClipRect); 282 OUT_RING(chan, NvClipRect);
284 BEGIN_RING(chan, 1, 0x0300, 2); 283 BEGIN_RING(chan, sub, 0x0300, 2);
285 OUT_RING(chan, 0); 284 OUT_RING(chan, 0);
286 OUT_RING(chan, (info->var.yres_virtual << 16) | info->var.xres_virtual); 285 OUT_RING(chan, (info->var.yres_virtual << 16) | info->var.xres_virtual);
287 286
@@ -308,9 +307,6 @@ nv04_fbcon_accel_init(struct fb_info *info)
308 307
309 FIRE_RING(chan); 308 FIRE_RING(chan);
310 309
311 info->fbops->fb_fillrect = nv04_fbcon_fillrect;
312 info->fbops->fb_copyarea = nv04_fbcon_copyarea;
313 info->fbops->fb_imageblit = nv04_fbcon_imageblit;
314 return 0; 310 return 0;
315} 311}
316 312
diff --git a/drivers/gpu/drm/nouveau/nv04_fifo.c b/drivers/gpu/drm/nouveau/nv04_fifo.c
index 0c3cd53c7313..f31347b8c9b0 100644
--- a/drivers/gpu/drm/nouveau/nv04_fifo.c
+++ b/drivers/gpu/drm/nouveau/nv04_fifo.c
@@ -71,6 +71,40 @@ nv04_fifo_reassign(struct drm_device *dev, bool enable)
71 return (reassign == 1); 71 return (reassign == 1);
72} 72}
73 73
74bool
75nv04_fifo_cache_flush(struct drm_device *dev)
76{
77 struct drm_nouveau_private *dev_priv = dev->dev_private;
78 struct nouveau_timer_engine *ptimer = &dev_priv->engine.timer;
79 uint64_t start = ptimer->read(dev);
80
81 do {
82 if (nv_rd32(dev, NV03_PFIFO_CACHE1_GET) ==
83 nv_rd32(dev, NV03_PFIFO_CACHE1_PUT))
84 return true;
85
86 } while (ptimer->read(dev) - start < 100000000);
87
88 NV_ERROR(dev, "Timeout flushing the PFIFO cache.\n");
89
90 return false;
91}
92
93bool
94nv04_fifo_cache_pull(struct drm_device *dev, bool enable)
95{
96 uint32_t pull = nv_rd32(dev, NV04_PFIFO_CACHE1_PULL0);
97
98 if (enable) {
99 nv_wr32(dev, NV04_PFIFO_CACHE1_PULL0, pull | 1);
100 } else {
101 nv_wr32(dev, NV04_PFIFO_CACHE1_PULL0, pull & ~1);
102 nv_wr32(dev, NV04_PFIFO_CACHE1_HASH, 0);
103 }
104
105 return !!(pull & 1);
106}
107
74int 108int
75nv04_fifo_channel_id(struct drm_device *dev) 109nv04_fifo_channel_id(struct drm_device *dev)
76{ 110{
diff --git a/drivers/gpu/drm/nouveau/nv04_graph.c b/drivers/gpu/drm/nouveau/nv04_graph.c
index 396ee92118f6..e260986ea65a 100644
--- a/drivers/gpu/drm/nouveau/nv04_graph.c
+++ b/drivers/gpu/drm/nouveau/nv04_graph.c
@@ -28,6 +28,10 @@
28#include "nouveau_drv.h" 28#include "nouveau_drv.h"
29 29
30static uint32_t nv04_graph_ctx_regs[] = { 30static uint32_t nv04_graph_ctx_regs[] = {
31 0x0040053c,
32 0x00400544,
33 0x00400540,
34 0x00400548,
31 NV04_PGRAPH_CTX_SWITCH1, 35 NV04_PGRAPH_CTX_SWITCH1,
32 NV04_PGRAPH_CTX_SWITCH2, 36 NV04_PGRAPH_CTX_SWITCH2,
33 NV04_PGRAPH_CTX_SWITCH3, 37 NV04_PGRAPH_CTX_SWITCH3,
@@ -102,69 +106,69 @@ static uint32_t nv04_graph_ctx_regs[] = {
102 NV04_PGRAPH_PATT_COLOR0, 106 NV04_PGRAPH_PATT_COLOR0,
103 NV04_PGRAPH_PATT_COLOR1, 107 NV04_PGRAPH_PATT_COLOR1,
104 NV04_PGRAPH_PATT_COLORRAM+0x00, 108 NV04_PGRAPH_PATT_COLORRAM+0x00,
105 NV04_PGRAPH_PATT_COLORRAM+0x01,
106 NV04_PGRAPH_PATT_COLORRAM+0x02,
107 NV04_PGRAPH_PATT_COLORRAM+0x03,
108 NV04_PGRAPH_PATT_COLORRAM+0x04, 109 NV04_PGRAPH_PATT_COLORRAM+0x04,
109 NV04_PGRAPH_PATT_COLORRAM+0x05,
110 NV04_PGRAPH_PATT_COLORRAM+0x06,
111 NV04_PGRAPH_PATT_COLORRAM+0x07,
112 NV04_PGRAPH_PATT_COLORRAM+0x08, 110 NV04_PGRAPH_PATT_COLORRAM+0x08,
113 NV04_PGRAPH_PATT_COLORRAM+0x09, 111 NV04_PGRAPH_PATT_COLORRAM+0x0c,
114 NV04_PGRAPH_PATT_COLORRAM+0x0A,
115 NV04_PGRAPH_PATT_COLORRAM+0x0B,
116 NV04_PGRAPH_PATT_COLORRAM+0x0C,
117 NV04_PGRAPH_PATT_COLORRAM+0x0D,
118 NV04_PGRAPH_PATT_COLORRAM+0x0E,
119 NV04_PGRAPH_PATT_COLORRAM+0x0F,
120 NV04_PGRAPH_PATT_COLORRAM+0x10, 112 NV04_PGRAPH_PATT_COLORRAM+0x10,
121 NV04_PGRAPH_PATT_COLORRAM+0x11,
122 NV04_PGRAPH_PATT_COLORRAM+0x12,
123 NV04_PGRAPH_PATT_COLORRAM+0x13,
124 NV04_PGRAPH_PATT_COLORRAM+0x14, 113 NV04_PGRAPH_PATT_COLORRAM+0x14,
125 NV04_PGRAPH_PATT_COLORRAM+0x15,
126 NV04_PGRAPH_PATT_COLORRAM+0x16,
127 NV04_PGRAPH_PATT_COLORRAM+0x17,
128 NV04_PGRAPH_PATT_COLORRAM+0x18, 114 NV04_PGRAPH_PATT_COLORRAM+0x18,
129 NV04_PGRAPH_PATT_COLORRAM+0x19, 115 NV04_PGRAPH_PATT_COLORRAM+0x1c,
130 NV04_PGRAPH_PATT_COLORRAM+0x1A,
131 NV04_PGRAPH_PATT_COLORRAM+0x1B,
132 NV04_PGRAPH_PATT_COLORRAM+0x1C,
133 NV04_PGRAPH_PATT_COLORRAM+0x1D,
134 NV04_PGRAPH_PATT_COLORRAM+0x1E,
135 NV04_PGRAPH_PATT_COLORRAM+0x1F,
136 NV04_PGRAPH_PATT_COLORRAM+0x20, 116 NV04_PGRAPH_PATT_COLORRAM+0x20,
137 NV04_PGRAPH_PATT_COLORRAM+0x21,
138 NV04_PGRAPH_PATT_COLORRAM+0x22,
139 NV04_PGRAPH_PATT_COLORRAM+0x23,
140 NV04_PGRAPH_PATT_COLORRAM+0x24, 117 NV04_PGRAPH_PATT_COLORRAM+0x24,
141 NV04_PGRAPH_PATT_COLORRAM+0x25,
142 NV04_PGRAPH_PATT_COLORRAM+0x26,
143 NV04_PGRAPH_PATT_COLORRAM+0x27,
144 NV04_PGRAPH_PATT_COLORRAM+0x28, 118 NV04_PGRAPH_PATT_COLORRAM+0x28,
145 NV04_PGRAPH_PATT_COLORRAM+0x29, 119 NV04_PGRAPH_PATT_COLORRAM+0x2c,
146 NV04_PGRAPH_PATT_COLORRAM+0x2A,
147 NV04_PGRAPH_PATT_COLORRAM+0x2B,
148 NV04_PGRAPH_PATT_COLORRAM+0x2C,
149 NV04_PGRAPH_PATT_COLORRAM+0x2D,
150 NV04_PGRAPH_PATT_COLORRAM+0x2E,
151 NV04_PGRAPH_PATT_COLORRAM+0x2F,
152 NV04_PGRAPH_PATT_COLORRAM+0x30, 120 NV04_PGRAPH_PATT_COLORRAM+0x30,
153 NV04_PGRAPH_PATT_COLORRAM+0x31,
154 NV04_PGRAPH_PATT_COLORRAM+0x32,
155 NV04_PGRAPH_PATT_COLORRAM+0x33,
156 NV04_PGRAPH_PATT_COLORRAM+0x34, 121 NV04_PGRAPH_PATT_COLORRAM+0x34,
157 NV04_PGRAPH_PATT_COLORRAM+0x35,
158 NV04_PGRAPH_PATT_COLORRAM+0x36,
159 NV04_PGRAPH_PATT_COLORRAM+0x37,
160 NV04_PGRAPH_PATT_COLORRAM+0x38, 122 NV04_PGRAPH_PATT_COLORRAM+0x38,
161 NV04_PGRAPH_PATT_COLORRAM+0x39, 123 NV04_PGRAPH_PATT_COLORRAM+0x3c,
162 NV04_PGRAPH_PATT_COLORRAM+0x3A, 124 NV04_PGRAPH_PATT_COLORRAM+0x40,
163 NV04_PGRAPH_PATT_COLORRAM+0x3B, 125 NV04_PGRAPH_PATT_COLORRAM+0x44,
164 NV04_PGRAPH_PATT_COLORRAM+0x3C, 126 NV04_PGRAPH_PATT_COLORRAM+0x48,
165 NV04_PGRAPH_PATT_COLORRAM+0x3D, 127 NV04_PGRAPH_PATT_COLORRAM+0x4c,
166 NV04_PGRAPH_PATT_COLORRAM+0x3E, 128 NV04_PGRAPH_PATT_COLORRAM+0x50,
167 NV04_PGRAPH_PATT_COLORRAM+0x3F, 129 NV04_PGRAPH_PATT_COLORRAM+0x54,
130 NV04_PGRAPH_PATT_COLORRAM+0x58,
131 NV04_PGRAPH_PATT_COLORRAM+0x5c,
132 NV04_PGRAPH_PATT_COLORRAM+0x60,
133 NV04_PGRAPH_PATT_COLORRAM+0x64,
134 NV04_PGRAPH_PATT_COLORRAM+0x68,
135 NV04_PGRAPH_PATT_COLORRAM+0x6c,
136 NV04_PGRAPH_PATT_COLORRAM+0x70,
137 NV04_PGRAPH_PATT_COLORRAM+0x74,
138 NV04_PGRAPH_PATT_COLORRAM+0x78,
139 NV04_PGRAPH_PATT_COLORRAM+0x7c,
140 NV04_PGRAPH_PATT_COLORRAM+0x80,
141 NV04_PGRAPH_PATT_COLORRAM+0x84,
142 NV04_PGRAPH_PATT_COLORRAM+0x88,
143 NV04_PGRAPH_PATT_COLORRAM+0x8c,
144 NV04_PGRAPH_PATT_COLORRAM+0x90,
145 NV04_PGRAPH_PATT_COLORRAM+0x94,
146 NV04_PGRAPH_PATT_COLORRAM+0x98,
147 NV04_PGRAPH_PATT_COLORRAM+0x9c,
148 NV04_PGRAPH_PATT_COLORRAM+0xa0,
149 NV04_PGRAPH_PATT_COLORRAM+0xa4,
150 NV04_PGRAPH_PATT_COLORRAM+0xa8,
151 NV04_PGRAPH_PATT_COLORRAM+0xac,
152 NV04_PGRAPH_PATT_COLORRAM+0xb0,
153 NV04_PGRAPH_PATT_COLORRAM+0xb4,
154 NV04_PGRAPH_PATT_COLORRAM+0xb8,
155 NV04_PGRAPH_PATT_COLORRAM+0xbc,
156 NV04_PGRAPH_PATT_COLORRAM+0xc0,
157 NV04_PGRAPH_PATT_COLORRAM+0xc4,
158 NV04_PGRAPH_PATT_COLORRAM+0xc8,
159 NV04_PGRAPH_PATT_COLORRAM+0xcc,
160 NV04_PGRAPH_PATT_COLORRAM+0xd0,
161 NV04_PGRAPH_PATT_COLORRAM+0xd4,
162 NV04_PGRAPH_PATT_COLORRAM+0xd8,
163 NV04_PGRAPH_PATT_COLORRAM+0xdc,
164 NV04_PGRAPH_PATT_COLORRAM+0xe0,
165 NV04_PGRAPH_PATT_COLORRAM+0xe4,
166 NV04_PGRAPH_PATT_COLORRAM+0xe8,
167 NV04_PGRAPH_PATT_COLORRAM+0xec,
168 NV04_PGRAPH_PATT_COLORRAM+0xf0,
169 NV04_PGRAPH_PATT_COLORRAM+0xf4,
170 NV04_PGRAPH_PATT_COLORRAM+0xf8,
171 NV04_PGRAPH_PATT_COLORRAM+0xfc,
168 NV04_PGRAPH_PATTERN, 172 NV04_PGRAPH_PATTERN,
169 0x0040080c, 173 0x0040080c,
170 NV04_PGRAPH_PATTERN_SHAPE, 174 NV04_PGRAPH_PATTERN_SHAPE,
@@ -247,14 +251,6 @@ static uint32_t nv04_graph_ctx_regs[] = {
247 0x004004f8, 251 0x004004f8,
248 0x0040047c, 252 0x0040047c,
249 0x004004fc, 253 0x004004fc,
250 0x0040053c,
251 0x00400544,
252 0x00400540,
253 0x00400548,
254 0x00400560,
255 0x00400568,
256 0x00400564,
257 0x0040056c,
258 0x00400534, 254 0x00400534,
259 0x00400538, 255 0x00400538,
260 0x00400514, 256 0x00400514,
@@ -341,9 +337,8 @@ static uint32_t nv04_graph_ctx_regs[] = {
341 0x00400500, 337 0x00400500,
342 0x00400504, 338 0x00400504,
343 NV04_PGRAPH_VALID1, 339 NV04_PGRAPH_VALID1,
344 NV04_PGRAPH_VALID2 340 NV04_PGRAPH_VALID2,
345 341 NV04_PGRAPH_DEBUG_3
346
347}; 342};
348 343
349struct graph_state { 344struct graph_state {
@@ -388,6 +383,18 @@ nv04_graph_context_switch(struct drm_device *dev)
388 pgraph->fifo_access(dev, true); 383 pgraph->fifo_access(dev, true);
389} 384}
390 385
386static uint32_t *ctx_reg(struct graph_state *ctx, uint32_t reg)
387{
388 int i;
389
390 for (i = 0; i < ARRAY_SIZE(nv04_graph_ctx_regs); i++) {
391 if (nv04_graph_ctx_regs[i] == reg)
392 return &ctx->nv04[i];
393 }
394
395 return NULL;
396}
397
391int nv04_graph_create_context(struct nouveau_channel *chan) 398int nv04_graph_create_context(struct nouveau_channel *chan)
392{ 399{
393 struct graph_state *pgraph_ctx; 400 struct graph_state *pgraph_ctx;
@@ -398,15 +405,8 @@ int nv04_graph_create_context(struct nouveau_channel *chan)
398 if (pgraph_ctx == NULL) 405 if (pgraph_ctx == NULL)
399 return -ENOMEM; 406 return -ENOMEM;
400 407
401 /* dev_priv->fifos[channel].pgraph_ctx_user = channel << 24; */ 408 *ctx_reg(pgraph_ctx, NV04_PGRAPH_DEBUG_3) = 0xfad4ff31;
402 pgraph_ctx->nv04[0] = 0x0001ffff; 409
403 /* is it really needed ??? */
404#if 0
405 dev_priv->fifos[channel].pgraph_ctx[1] =
406 nv_rd32(dev, NV_PGRAPH_DEBUG_4);
407 dev_priv->fifos[channel].pgraph_ctx[2] =
408 nv_rd32(dev, 0x004006b0);
409#endif
410 return 0; 410 return 0;
411} 411}
412 412
@@ -429,9 +429,13 @@ int nv04_graph_load_context(struct nouveau_channel *chan)
429 nv_wr32(dev, nv04_graph_ctx_regs[i], pgraph_ctx->nv04[i]); 429 nv_wr32(dev, nv04_graph_ctx_regs[i], pgraph_ctx->nv04[i]);
430 430
431 nv_wr32(dev, NV04_PGRAPH_CTX_CONTROL, 0x10010100); 431 nv_wr32(dev, NV04_PGRAPH_CTX_CONTROL, 0x10010100);
432 nv_wr32(dev, NV04_PGRAPH_CTX_USER, chan->id << 24); 432
433 tmp = nv_rd32(dev, NV04_PGRAPH_CTX_USER) & 0x00ffffff;
434 nv_wr32(dev, NV04_PGRAPH_CTX_USER, tmp | chan->id << 24);
435
433 tmp = nv_rd32(dev, NV04_PGRAPH_FFINTFC_ST2); 436 tmp = nv_rd32(dev, NV04_PGRAPH_FFINTFC_ST2);
434 nv_wr32(dev, NV04_PGRAPH_FFINTFC_ST2, tmp & 0x000fffff); 437 nv_wr32(dev, NV04_PGRAPH_FFINTFC_ST2, tmp & 0x000fffff);
438
435 return 0; 439 return 0;
436} 440}
437 441
@@ -494,7 +498,7 @@ int nv04_graph_init(struct drm_device *dev)
494 nv_wr32(dev, NV04_PGRAPH_STATE , 0xFFFFFFFF); 498 nv_wr32(dev, NV04_PGRAPH_STATE , 0xFFFFFFFF);
495 nv_wr32(dev, NV04_PGRAPH_CTX_CONTROL , 0x10000100); 499 nv_wr32(dev, NV04_PGRAPH_CTX_CONTROL , 0x10000100);
496 tmp = nv_rd32(dev, NV04_PGRAPH_CTX_USER) & 0x00ffffff; 500 tmp = nv_rd32(dev, NV04_PGRAPH_CTX_USER) & 0x00ffffff;
497 tmp |= dev_priv->engine.fifo.channels << 24; 501 tmp |= (dev_priv->engine.fifo.channels - 1) << 24;
498 nv_wr32(dev, NV04_PGRAPH_CTX_USER, tmp); 502 nv_wr32(dev, NV04_PGRAPH_CTX_USER, tmp);
499 503
500 /* These don't belong here, they're part of a per-channel context */ 504 /* These don't belong here, they're part of a per-channel context */
@@ -533,7 +537,7 @@ nv04_graph_mthd_set_operation(struct nouveau_channel *chan, int grclass,
533 int mthd, uint32_t data) 537 int mthd, uint32_t data)
534{ 538{
535 struct drm_device *dev = chan->dev; 539 struct drm_device *dev = chan->dev;
536 uint32_t instance = nv_rd32(dev, NV04_PGRAPH_CTX_SWITCH4) & 0xffff; 540 uint32_t instance = (nv_rd32(dev, NV04_PGRAPH_CTX_SWITCH4) & 0xffff) << 4;
537 int subc = (nv_rd32(dev, NV04_PGRAPH_TRAPPED_ADDR) >> 13) & 0x7; 541 int subc = (nv_rd32(dev, NV04_PGRAPH_TRAPPED_ADDR) >> 13) & 0x7;
538 uint32_t tmp; 542 uint32_t tmp;
539 543
@@ -543,11 +547,11 @@ nv04_graph_mthd_set_operation(struct nouveau_channel *chan, int grclass,
543 547
544 nv_wi32(dev, instance, tmp); 548 nv_wi32(dev, instance, tmp);
545 nv_wr32(dev, NV04_PGRAPH_CTX_SWITCH1, tmp); 549 nv_wr32(dev, NV04_PGRAPH_CTX_SWITCH1, tmp);
546 nv_wr32(dev, NV04_PGRAPH_CTX_CACHE1 + subc, tmp); 550 nv_wr32(dev, NV04_PGRAPH_CTX_CACHE1 + (subc<<2), tmp);
547 return 0; 551 return 0;
548} 552}
549 553
550static struct nouveau_pgraph_object_method nv04_graph_mthds_m2mf[] = { 554static struct nouveau_pgraph_object_method nv04_graph_mthds_sw[] = {
551 { 0x0150, nv04_graph_mthd_set_ref }, 555 { 0x0150, nv04_graph_mthd_set_ref },
552 {} 556 {}
553}; 557};
@@ -558,7 +562,7 @@ static struct nouveau_pgraph_object_method nv04_graph_mthds_set_operation[] = {
558}; 562};
559 563
560struct nouveau_pgraph_object_class nv04_graph_grclass[] = { 564struct nouveau_pgraph_object_class nv04_graph_grclass[] = {
561 { 0x0039, false, nv04_graph_mthds_m2mf }, 565 { 0x0039, false, NULL },
562 { 0x004a, false, nv04_graph_mthds_set_operation }, /* gdirect */ 566 { 0x004a, false, nv04_graph_mthds_set_operation }, /* gdirect */
563 { 0x005f, false, nv04_graph_mthds_set_operation }, /* imageblit */ 567 { 0x005f, false, nv04_graph_mthds_set_operation }, /* imageblit */
564 { 0x0061, false, nv04_graph_mthds_set_operation }, /* ifc */ 568 { 0x0061, false, nv04_graph_mthds_set_operation }, /* ifc */
@@ -574,6 +578,7 @@ struct nouveau_pgraph_object_class nv04_graph_grclass[] = {
574 { 0x0053, false, NULL }, /* surf3d */ 578 { 0x0053, false, NULL }, /* surf3d */
575 { 0x0054, false, NULL }, /* tex_tri */ 579 { 0x0054, false, NULL }, /* tex_tri */
576 { 0x0055, false, NULL }, /* multitex_tri */ 580 { 0x0055, false, NULL }, /* multitex_tri */
581 { 0x506e, true, nv04_graph_mthds_sw },
577 {} 582 {}
578}; 583};
579 584
diff --git a/drivers/gpu/drm/nouveau/nv04_instmem.c b/drivers/gpu/drm/nouveau/nv04_instmem.c
index a20c206625a2..a3b9563a6f60 100644
--- a/drivers/gpu/drm/nouveau/nv04_instmem.c
+++ b/drivers/gpu/drm/nouveau/nv04_instmem.c
@@ -30,7 +30,7 @@ nv04_instmem_determine_amount(struct drm_device *dev)
30 * of vram. For now, only reserve a small piece until we know 30 * of vram. For now, only reserve a small piece until we know
31 * more about what each chipset requires. 31 * more about what each chipset requires.
32 */ 32 */
33 switch (dev_priv->chipset & 0xf0) { 33 switch (dev_priv->chipset) {
34 case 0x40: 34 case 0x40:
35 case 0x47: 35 case 0x47:
36 case 0x49: 36 case 0x49:
diff --git a/drivers/gpu/drm/nouveau/nv10_fb.c b/drivers/gpu/drm/nouveau/nv10_fb.c
index 79e2d104d70a..cc5cda44e501 100644
--- a/drivers/gpu/drm/nouveau/nv10_fb.c
+++ b/drivers/gpu/drm/nouveau/nv10_fb.c
@@ -3,17 +3,37 @@
3#include "nouveau_drv.h" 3#include "nouveau_drv.h"
4#include "nouveau_drm.h" 4#include "nouveau_drm.h"
5 5
6void
7nv10_fb_set_region_tiling(struct drm_device *dev, int i, uint32_t addr,
8 uint32_t size, uint32_t pitch)
9{
10 struct drm_nouveau_private *dev_priv = dev->dev_private;
11 uint32_t limit = max(1u, addr + size) - 1;
12
13 if (pitch) {
14 if (dev_priv->card_type >= NV_20)
15 addr |= 1;
16 else
17 addr |= 1 << 31;
18 }
19
20 nv_wr32(dev, NV10_PFB_TLIMIT(i), limit);
21 nv_wr32(dev, NV10_PFB_TSIZE(i), pitch);
22 nv_wr32(dev, NV10_PFB_TILE(i), addr);
23}
24
6int 25int
7nv10_fb_init(struct drm_device *dev) 26nv10_fb_init(struct drm_device *dev)
8{ 27{
9 uint32_t fb_bar_size; 28 struct drm_nouveau_private *dev_priv = dev->dev_private;
29 struct nouveau_fb_engine *pfb = &dev_priv->engine.fb;
10 int i; 30 int i;
11 31
12 fb_bar_size = drm_get_resource_len(dev, 0) - 1; 32 pfb->num_tiles = NV10_PFB_TILE__SIZE;
13 for (i = 0; i < NV10_PFB_TILE__SIZE; i++) { 33
14 nv_wr32(dev, NV10_PFB_TILE(i), 0); 34 /* Turn all the tiling regions off. */
15 nv_wr32(dev, NV10_PFB_TLIMIT(i), fb_bar_size); 35 for (i = 0; i < pfb->num_tiles; i++)
16 } 36 pfb->set_region_tiling(dev, i, 0, 0, 0);
17 37
18 return 0; 38 return 0;
19} 39}
diff --git a/drivers/gpu/drm/nouveau/nv10_graph.c b/drivers/gpu/drm/nouveau/nv10_graph.c
index 6bf6804bb0ef..fcf2cdd19493 100644
--- a/drivers/gpu/drm/nouveau/nv10_graph.c
+++ b/drivers/gpu/drm/nouveau/nv10_graph.c
@@ -389,49 +389,50 @@ struct graph_state {
389 int nv10[ARRAY_SIZE(nv10_graph_ctx_regs)]; 389 int nv10[ARRAY_SIZE(nv10_graph_ctx_regs)];
390 int nv17[ARRAY_SIZE(nv17_graph_ctx_regs)]; 390 int nv17[ARRAY_SIZE(nv17_graph_ctx_regs)];
391 struct pipe_state pipe_state; 391 struct pipe_state pipe_state;
392 uint32_t lma_window[4];
392}; 393};
393 394
395#define PIPE_SAVE(dev, state, addr) \
396 do { \
397 int __i; \
398 nv_wr32(dev, NV10_PGRAPH_PIPE_ADDRESS, addr); \
399 for (__i = 0; __i < ARRAY_SIZE(state); __i++) \
400 state[__i] = nv_rd32(dev, NV10_PGRAPH_PIPE_DATA); \
401 } while (0)
402
403#define PIPE_RESTORE(dev, state, addr) \
404 do { \
405 int __i; \
406 nv_wr32(dev, NV10_PGRAPH_PIPE_ADDRESS, addr); \
407 for (__i = 0; __i < ARRAY_SIZE(state); __i++) \
408 nv_wr32(dev, NV10_PGRAPH_PIPE_DATA, state[__i]); \
409 } while (0)
410
394static void nv10_graph_save_pipe(struct nouveau_channel *chan) 411static void nv10_graph_save_pipe(struct nouveau_channel *chan)
395{ 412{
396 struct drm_device *dev = chan->dev; 413 struct drm_device *dev = chan->dev;
397 struct graph_state *pgraph_ctx = chan->pgraph_ctx; 414 struct graph_state *pgraph_ctx = chan->pgraph_ctx;
398 struct pipe_state *fifo_pipe_state = &pgraph_ctx->pipe_state; 415 struct pipe_state *pipe = &pgraph_ctx->pipe_state;
399 int i; 416
400#define PIPE_SAVE(addr) \ 417 PIPE_SAVE(dev, pipe->pipe_0x4400, 0x4400);
401 do { \ 418 PIPE_SAVE(dev, pipe->pipe_0x0200, 0x0200);
402 nv_wr32(dev, NV10_PGRAPH_PIPE_ADDRESS, addr); \ 419 PIPE_SAVE(dev, pipe->pipe_0x6400, 0x6400);
403 for (i = 0; i < ARRAY_SIZE(fifo_pipe_state->pipe_##addr); i++) \ 420 PIPE_SAVE(dev, pipe->pipe_0x6800, 0x6800);
404 fifo_pipe_state->pipe_##addr[i] = nv_rd32(dev, NV10_PGRAPH_PIPE_DATA); \ 421 PIPE_SAVE(dev, pipe->pipe_0x6c00, 0x6c00);
405 } while (0) 422 PIPE_SAVE(dev, pipe->pipe_0x7000, 0x7000);
406 423 PIPE_SAVE(dev, pipe->pipe_0x7400, 0x7400);
407 PIPE_SAVE(0x4400); 424 PIPE_SAVE(dev, pipe->pipe_0x7800, 0x7800);
408 PIPE_SAVE(0x0200); 425 PIPE_SAVE(dev, pipe->pipe_0x0040, 0x0040);
409 PIPE_SAVE(0x6400); 426 PIPE_SAVE(dev, pipe->pipe_0x0000, 0x0000);
410 PIPE_SAVE(0x6800);
411 PIPE_SAVE(0x6c00);
412 PIPE_SAVE(0x7000);
413 PIPE_SAVE(0x7400);
414 PIPE_SAVE(0x7800);
415 PIPE_SAVE(0x0040);
416 PIPE_SAVE(0x0000);
417
418#undef PIPE_SAVE
419} 427}
420 428
421static void nv10_graph_load_pipe(struct nouveau_channel *chan) 429static void nv10_graph_load_pipe(struct nouveau_channel *chan)
422{ 430{
423 struct drm_device *dev = chan->dev; 431 struct drm_device *dev = chan->dev;
424 struct graph_state *pgraph_ctx = chan->pgraph_ctx; 432 struct graph_state *pgraph_ctx = chan->pgraph_ctx;
425 struct pipe_state *fifo_pipe_state = &pgraph_ctx->pipe_state; 433 struct pipe_state *pipe = &pgraph_ctx->pipe_state;
426 int i;
427 uint32_t xfmode0, xfmode1; 434 uint32_t xfmode0, xfmode1;
428#define PIPE_RESTORE(addr) \ 435 int i;
429 do { \
430 nv_wr32(dev, NV10_PGRAPH_PIPE_ADDRESS, addr); \
431 for (i = 0; i < ARRAY_SIZE(fifo_pipe_state->pipe_##addr); i++) \
432 nv_wr32(dev, NV10_PGRAPH_PIPE_DATA, fifo_pipe_state->pipe_##addr[i]); \
433 } while (0)
434
435 436
436 nouveau_wait_for_idle(dev); 437 nouveau_wait_for_idle(dev);
437 /* XXX check haiku comments */ 438 /* XXX check haiku comments */
@@ -457,24 +458,22 @@ static void nv10_graph_load_pipe(struct nouveau_channel *chan)
457 nv_wr32(dev, NV10_PGRAPH_PIPE_DATA, 0x00000008); 458 nv_wr32(dev, NV10_PGRAPH_PIPE_DATA, 0x00000008);
458 459
459 460
460 PIPE_RESTORE(0x0200); 461 PIPE_RESTORE(dev, pipe->pipe_0x0200, 0x0200);
461 nouveau_wait_for_idle(dev); 462 nouveau_wait_for_idle(dev);
462 463
463 /* restore XFMODE */ 464 /* restore XFMODE */
464 nv_wr32(dev, NV10_PGRAPH_XFMODE0, xfmode0); 465 nv_wr32(dev, NV10_PGRAPH_XFMODE0, xfmode0);
465 nv_wr32(dev, NV10_PGRAPH_XFMODE1, xfmode1); 466 nv_wr32(dev, NV10_PGRAPH_XFMODE1, xfmode1);
466 PIPE_RESTORE(0x6400); 467 PIPE_RESTORE(dev, pipe->pipe_0x6400, 0x6400);
467 PIPE_RESTORE(0x6800); 468 PIPE_RESTORE(dev, pipe->pipe_0x6800, 0x6800);
468 PIPE_RESTORE(0x6c00); 469 PIPE_RESTORE(dev, pipe->pipe_0x6c00, 0x6c00);
469 PIPE_RESTORE(0x7000); 470 PIPE_RESTORE(dev, pipe->pipe_0x7000, 0x7000);
470 PIPE_RESTORE(0x7400); 471 PIPE_RESTORE(dev, pipe->pipe_0x7400, 0x7400);
471 PIPE_RESTORE(0x7800); 472 PIPE_RESTORE(dev, pipe->pipe_0x7800, 0x7800);
472 PIPE_RESTORE(0x4400); 473 PIPE_RESTORE(dev, pipe->pipe_0x4400, 0x4400);
473 PIPE_RESTORE(0x0000); 474 PIPE_RESTORE(dev, pipe->pipe_0x0000, 0x0000);
474 PIPE_RESTORE(0x0040); 475 PIPE_RESTORE(dev, pipe->pipe_0x0040, 0x0040);
475 nouveau_wait_for_idle(dev); 476 nouveau_wait_for_idle(dev);
476
477#undef PIPE_RESTORE
478} 477}
479 478
480static void nv10_graph_create_pipe(struct nouveau_channel *chan) 479static void nv10_graph_create_pipe(struct nouveau_channel *chan)
@@ -808,6 +807,20 @@ void nv10_graph_destroy_context(struct nouveau_channel *chan)
808 chan->pgraph_ctx = NULL; 807 chan->pgraph_ctx = NULL;
809} 808}
810 809
810void
811nv10_graph_set_region_tiling(struct drm_device *dev, int i, uint32_t addr,
812 uint32_t size, uint32_t pitch)
813{
814 uint32_t limit = max(1u, addr + size) - 1;
815
816 if (pitch)
817 addr |= 1 << 31;
818
819 nv_wr32(dev, NV10_PGRAPH_TLIMIT(i), limit);
820 nv_wr32(dev, NV10_PGRAPH_TSIZE(i), pitch);
821 nv_wr32(dev, NV10_PGRAPH_TILE(i), addr);
822}
823
811int nv10_graph_init(struct drm_device *dev) 824int nv10_graph_init(struct drm_device *dev)
812{ 825{
813 struct drm_nouveau_private *dev_priv = dev->dev_private; 826 struct drm_nouveau_private *dev_priv = dev->dev_private;
@@ -832,21 +845,16 @@ int nv10_graph_init(struct drm_device *dev)
832 (1<<31)); 845 (1<<31));
833 if (dev_priv->chipset >= 0x17) { 846 if (dev_priv->chipset >= 0x17) {
834 nv_wr32(dev, NV10_PGRAPH_DEBUG_4, 0x1f000000); 847 nv_wr32(dev, NV10_PGRAPH_DEBUG_4, 0x1f000000);
848 nv_wr32(dev, 0x400a10, 0x3ff3fb6);
849 nv_wr32(dev, 0x400838, 0x2f8684);
850 nv_wr32(dev, 0x40083c, 0x115f3f);
835 nv_wr32(dev, 0x004006b0, 0x40000020); 851 nv_wr32(dev, 0x004006b0, 0x40000020);
836 } else 852 } else
837 nv_wr32(dev, NV10_PGRAPH_DEBUG_4, 0x00000000); 853 nv_wr32(dev, NV10_PGRAPH_DEBUG_4, 0x00000000);
838 854
839 /* copy tile info from PFB */ 855 /* Turn all the tiling regions off. */
840 for (i = 0; i < NV10_PFB_TILE__SIZE; i++) { 856 for (i = 0; i < NV10_PFB_TILE__SIZE; i++)
841 nv_wr32(dev, NV10_PGRAPH_TILE(i), 857 nv10_graph_set_region_tiling(dev, i, 0, 0, 0);
842 nv_rd32(dev, NV10_PFB_TILE(i)));
843 nv_wr32(dev, NV10_PGRAPH_TLIMIT(i),
844 nv_rd32(dev, NV10_PFB_TLIMIT(i)));
845 nv_wr32(dev, NV10_PGRAPH_TSIZE(i),
846 nv_rd32(dev, NV10_PFB_TSIZE(i)));
847 nv_wr32(dev, NV10_PGRAPH_TSTATUS(i),
848 nv_rd32(dev, NV10_PFB_TSTATUS(i)));
849 }
850 858
851 nv_wr32(dev, NV10_PGRAPH_CTX_SWITCH1, 0x00000000); 859 nv_wr32(dev, NV10_PGRAPH_CTX_SWITCH1, 0x00000000);
852 nv_wr32(dev, NV10_PGRAPH_CTX_SWITCH2, 0x00000000); 860 nv_wr32(dev, NV10_PGRAPH_CTX_SWITCH2, 0x00000000);
@@ -867,6 +875,115 @@ void nv10_graph_takedown(struct drm_device *dev)
867{ 875{
868} 876}
869 877
878static int
879nv17_graph_mthd_lma_window(struct nouveau_channel *chan, int grclass,
880 int mthd, uint32_t data)
881{
882 struct drm_device *dev = chan->dev;
883 struct graph_state *ctx = chan->pgraph_ctx;
884 struct pipe_state *pipe = &ctx->pipe_state;
885 struct drm_nouveau_private *dev_priv = dev->dev_private;
886 struct nouveau_pgraph_engine *pgraph = &dev_priv->engine.graph;
887 uint32_t pipe_0x0040[1], pipe_0x64c0[8], pipe_0x6a80[3], pipe_0x6ab0[3];
888 uint32_t xfmode0, xfmode1;
889 int i;
890
891 ctx->lma_window[(mthd - 0x1638) / 4] = data;
892
893 if (mthd != 0x1644)
894 return 0;
895
896 nouveau_wait_for_idle(dev);
897
898 PIPE_SAVE(dev, pipe_0x0040, 0x0040);
899 PIPE_SAVE(dev, pipe->pipe_0x0200, 0x0200);
900
901 PIPE_RESTORE(dev, ctx->lma_window, 0x6790);
902
903 nouveau_wait_for_idle(dev);
904
905 xfmode0 = nv_rd32(dev, NV10_PGRAPH_XFMODE0);
906 xfmode1 = nv_rd32(dev, NV10_PGRAPH_XFMODE1);
907
908 PIPE_SAVE(dev, pipe->pipe_0x4400, 0x4400);
909 PIPE_SAVE(dev, pipe_0x64c0, 0x64c0);
910 PIPE_SAVE(dev, pipe_0x6ab0, 0x6ab0);
911 PIPE_SAVE(dev, pipe_0x6a80, 0x6a80);
912
913 nouveau_wait_for_idle(dev);
914
915 nv_wr32(dev, NV10_PGRAPH_XFMODE0, 0x10000000);
916 nv_wr32(dev, NV10_PGRAPH_XFMODE1, 0x00000000);
917 nv_wr32(dev, NV10_PGRAPH_PIPE_ADDRESS, 0x000064c0);
918 for (i = 0; i < 4; i++)
919 nv_wr32(dev, NV10_PGRAPH_PIPE_DATA, 0x3f800000);
920 for (i = 0; i < 4; i++)
921 nv_wr32(dev, NV10_PGRAPH_PIPE_DATA, 0x00000000);
922
923 nv_wr32(dev, NV10_PGRAPH_PIPE_ADDRESS, 0x00006ab0);
924 for (i = 0; i < 3; i++)
925 nv_wr32(dev, NV10_PGRAPH_PIPE_DATA, 0x3f800000);
926
927 nv_wr32(dev, NV10_PGRAPH_PIPE_ADDRESS, 0x00006a80);
928 for (i = 0; i < 3; i++)
929 nv_wr32(dev, NV10_PGRAPH_PIPE_DATA, 0x00000000);
930
931 nv_wr32(dev, NV10_PGRAPH_PIPE_ADDRESS, 0x00000040);
932 nv_wr32(dev, NV10_PGRAPH_PIPE_DATA, 0x00000008);
933
934 PIPE_RESTORE(dev, pipe->pipe_0x0200, 0x0200);
935
936 nouveau_wait_for_idle(dev);
937
938 PIPE_RESTORE(dev, pipe_0x0040, 0x0040);
939
940 nv_wr32(dev, NV10_PGRAPH_XFMODE0, xfmode0);
941 nv_wr32(dev, NV10_PGRAPH_XFMODE1, xfmode1);
942
943 PIPE_RESTORE(dev, pipe_0x64c0, 0x64c0);
944 PIPE_RESTORE(dev, pipe_0x6ab0, 0x6ab0);
945 PIPE_RESTORE(dev, pipe_0x6a80, 0x6a80);
946 PIPE_RESTORE(dev, pipe->pipe_0x4400, 0x4400);
947
948 nv_wr32(dev, NV10_PGRAPH_PIPE_ADDRESS, 0x000000c0);
949 nv_wr32(dev, NV10_PGRAPH_PIPE_DATA, 0x00000000);
950
951 nouveau_wait_for_idle(dev);
952
953 pgraph->fifo_access(dev, true);
954
955 return 0;
956}
957
958static int
959nv17_graph_mthd_lma_enable(struct nouveau_channel *chan, int grclass,
960 int mthd, uint32_t data)
961{
962 struct drm_device *dev = chan->dev;
963 struct drm_nouveau_private *dev_priv = dev->dev_private;
964 struct nouveau_pgraph_engine *pgraph = &dev_priv->engine.graph;
965
966 nouveau_wait_for_idle(dev);
967
968 nv_wr32(dev, NV10_PGRAPH_DEBUG_4,
969 nv_rd32(dev, NV10_PGRAPH_DEBUG_4) | 0x1 << 8);
970 nv_wr32(dev, 0x004006b0,
971 nv_rd32(dev, 0x004006b0) | 0x8 << 24);
972
973 pgraph->fifo_access(dev, true);
974
975 return 0;
976}
977
978static struct nouveau_pgraph_object_method nv17_graph_celsius_mthds[] = {
979 { 0x1638, nv17_graph_mthd_lma_window },
980 { 0x163c, nv17_graph_mthd_lma_window },
981 { 0x1640, nv17_graph_mthd_lma_window },
982 { 0x1644, nv17_graph_mthd_lma_window },
983 { 0x1658, nv17_graph_mthd_lma_enable },
984 {}
985};
986
870struct nouveau_pgraph_object_class nv10_graph_grclass[] = { 987struct nouveau_pgraph_object_class nv10_graph_grclass[] = {
871 { 0x0030, false, NULL }, /* null */ 988 { 0x0030, false, NULL }, /* null */
872 { 0x0039, false, NULL }, /* m2mf */ 989 { 0x0039, false, NULL }, /* m2mf */
@@ -887,6 +1004,6 @@ struct nouveau_pgraph_object_class nv10_graph_grclass[] = {
887 { 0x0095, false, NULL }, /* multitex_tri */ 1004 { 0x0095, false, NULL }, /* multitex_tri */
888 { 0x0056, false, NULL }, /* celcius (nv10) */ 1005 { 0x0056, false, NULL }, /* celcius (nv10) */
889 { 0x0096, false, NULL }, /* celcius (nv11) */ 1006 { 0x0096, false, NULL }, /* celcius (nv11) */
890 { 0x0099, false, NULL }, /* celcius (nv17) */ 1007 { 0x0099, false, nv17_graph_celsius_mthds }, /* celcius (nv17) */
891 {} 1008 {}
892}; 1009};
diff --git a/drivers/gpu/drm/nouveau/nv17_tv.c b/drivers/gpu/drm/nouveau/nv17_tv.c
index 46cfd9c60478..21ac6e49b6ee 100644
--- a/drivers/gpu/drm/nouveau/nv17_tv.c
+++ b/drivers/gpu/drm/nouveau/nv17_tv.c
@@ -33,13 +33,103 @@
33#include "nouveau_hw.h" 33#include "nouveau_hw.h"
34#include "nv17_tv.h" 34#include "nv17_tv.h"
35 35
36enum drm_connector_status nv17_tv_detect(struct drm_encoder *encoder, 36static uint32_t nv42_tv_sample_load(struct drm_encoder *encoder)
37 struct drm_connector *connector,
38 uint32_t pin_mask)
39{ 37{
38 struct drm_device *dev = encoder->dev;
39 struct drm_nouveau_private *dev_priv = dev->dev_private;
40 uint32_t testval, regoffset = nv04_dac_output_offset(encoder);
41 uint32_t gpio0, gpio1, fp_htotal, fp_hsync_start, fp_hsync_end,
42 fp_control, test_ctrl, dacclk, ctv_14, ctv_1c, ctv_6c;
43 uint32_t sample = 0;
44 int head;
45
46#define RGB_TEST_DATA(r, g, b) (r << 0 | g << 10 | b << 20)
47 testval = RGB_TEST_DATA(0x82, 0xeb, 0x82);
48 if (dev_priv->vbios->tvdactestval)
49 testval = dev_priv->vbios->tvdactestval;
50
51 dacclk = NVReadRAMDAC(dev, 0, NV_PRAMDAC_DACCLK + regoffset);
52 head = (dacclk & 0x100) >> 8;
53
54 /* Save the previous state. */
55 gpio1 = nv17_gpio_get(dev, DCB_GPIO_TVDAC1);
56 gpio0 = nv17_gpio_get(dev, DCB_GPIO_TVDAC0);
57 fp_htotal = NVReadRAMDAC(dev, head, NV_PRAMDAC_FP_HTOTAL);
58 fp_hsync_start = NVReadRAMDAC(dev, head, NV_PRAMDAC_FP_HSYNC_START);
59 fp_hsync_end = NVReadRAMDAC(dev, head, NV_PRAMDAC_FP_HSYNC_END);
60 fp_control = NVReadRAMDAC(dev, head, NV_PRAMDAC_FP_TG_CONTROL);
61 test_ctrl = NVReadRAMDAC(dev, 0, NV_PRAMDAC_TEST_CONTROL + regoffset);
62 ctv_1c = NVReadRAMDAC(dev, head, 0x680c1c);
63 ctv_14 = NVReadRAMDAC(dev, head, 0x680c14);
64 ctv_6c = NVReadRAMDAC(dev, head, 0x680c6c);
65
66 /* Prepare the DAC for load detection. */
67 nv17_gpio_set(dev, DCB_GPIO_TVDAC1, true);
68 nv17_gpio_set(dev, DCB_GPIO_TVDAC0, true);
69
70 NVWriteRAMDAC(dev, head, NV_PRAMDAC_FP_HTOTAL, 1343);
71 NVWriteRAMDAC(dev, head, NV_PRAMDAC_FP_HSYNC_START, 1047);
72 NVWriteRAMDAC(dev, head, NV_PRAMDAC_FP_HSYNC_END, 1183);
73 NVWriteRAMDAC(dev, head, NV_PRAMDAC_FP_TG_CONTROL,
74 NV_PRAMDAC_FP_TG_CONTROL_DISPEN_POS |
75 NV_PRAMDAC_FP_TG_CONTROL_WIDTH_12 |
76 NV_PRAMDAC_FP_TG_CONTROL_READ_PROG |
77 NV_PRAMDAC_FP_TG_CONTROL_HSYNC_POS |
78 NV_PRAMDAC_FP_TG_CONTROL_VSYNC_POS);
79
80 NVWriteRAMDAC(dev, 0, NV_PRAMDAC_TEST_CONTROL + regoffset, 0);
81
82 NVWriteRAMDAC(dev, 0, NV_PRAMDAC_DACCLK + regoffset,
83 (dacclk & ~0xff) | 0x22);
84 msleep(1);
85 NVWriteRAMDAC(dev, 0, NV_PRAMDAC_DACCLK + regoffset,
86 (dacclk & ~0xff) | 0x21);
87
88 NVWriteRAMDAC(dev, head, 0x680c1c, 1 << 20);
89 NVWriteRAMDAC(dev, head, 0x680c14, 4 << 16);
90
91 /* Sample pin 0x4 (usually S-video luma). */
92 NVWriteRAMDAC(dev, head, 0x680c6c, testval >> 10 & 0x3ff);
93 msleep(20);
94 sample |= NVReadRAMDAC(dev, 0, NV_PRAMDAC_TEST_CONTROL + regoffset)
95 & 0x4 << 28;
96
97 /* Sample the remaining pins. */
98 NVWriteRAMDAC(dev, head, 0x680c6c, testval & 0x3ff);
99 msleep(20);
100 sample |= NVReadRAMDAC(dev, 0, NV_PRAMDAC_TEST_CONTROL + regoffset)
101 & 0xa << 28;
102
103 /* Restore the previous state. */
104 NVWriteRAMDAC(dev, head, 0x680c1c, ctv_1c);
105 NVWriteRAMDAC(dev, head, 0x680c14, ctv_14);
106 NVWriteRAMDAC(dev, head, 0x680c6c, ctv_6c);
107 NVWriteRAMDAC(dev, 0, NV_PRAMDAC_DACCLK + regoffset, dacclk);
108 NVWriteRAMDAC(dev, 0, NV_PRAMDAC_TEST_CONTROL + regoffset, test_ctrl);
109 NVWriteRAMDAC(dev, head, NV_PRAMDAC_FP_TG_CONTROL, fp_control);
110 NVWriteRAMDAC(dev, head, NV_PRAMDAC_FP_HSYNC_END, fp_hsync_end);
111 NVWriteRAMDAC(dev, head, NV_PRAMDAC_FP_HSYNC_START, fp_hsync_start);
112 NVWriteRAMDAC(dev, head, NV_PRAMDAC_FP_HTOTAL, fp_htotal);
113 nv17_gpio_set(dev, DCB_GPIO_TVDAC1, gpio1);
114 nv17_gpio_set(dev, DCB_GPIO_TVDAC0, gpio0);
115
116 return sample;
117}
118
119static enum drm_connector_status
120nv17_tv_detect(struct drm_encoder *encoder, struct drm_connector *connector)
121{
122 struct drm_device *dev = encoder->dev;
123 struct drm_nouveau_private *dev_priv = dev->dev_private;
124 struct drm_mode_config *conf = &dev->mode_config;
40 struct nv17_tv_encoder *tv_enc = to_tv_enc(encoder); 125 struct nv17_tv_encoder *tv_enc = to_tv_enc(encoder);
126 struct dcb_entry *dcb = tv_enc->base.dcb;
41 127
42 tv_enc->pin_mask = pin_mask >> 28 & 0xe; 128 if (dev_priv->chipset == 0x42 ||
129 dev_priv->chipset == 0x43)
130 tv_enc->pin_mask = nv42_tv_sample_load(encoder) >> 28 & 0xe;
131 else
132 tv_enc->pin_mask = nv17_dac_sample_load(encoder) >> 28 & 0xe;
43 133
44 switch (tv_enc->pin_mask) { 134 switch (tv_enc->pin_mask) {
45 case 0x2: 135 case 0x2:
@@ -50,7 +140,7 @@ enum drm_connector_status nv17_tv_detect(struct drm_encoder *encoder,
50 tv_enc->subconnector = DRM_MODE_SUBCONNECTOR_SVIDEO; 140 tv_enc->subconnector = DRM_MODE_SUBCONNECTOR_SVIDEO;
51 break; 141 break;
52 case 0xe: 142 case 0xe:
53 if (nouveau_encoder(encoder)->dcb->tvconf.has_component_output) 143 if (dcb->tvconf.has_component_output)
54 tv_enc->subconnector = DRM_MODE_SUBCONNECTOR_Component; 144 tv_enc->subconnector = DRM_MODE_SUBCONNECTOR_Component;
55 else 145 else
56 tv_enc->subconnector = DRM_MODE_SUBCONNECTOR_SCART; 146 tv_enc->subconnector = DRM_MODE_SUBCONNECTOR_SCART;
@@ -61,11 +151,16 @@ enum drm_connector_status nv17_tv_detect(struct drm_encoder *encoder,
61 } 151 }
62 152
63 drm_connector_property_set_value(connector, 153 drm_connector_property_set_value(connector,
64 encoder->dev->mode_config.tv_subconnector_property, 154 conf->tv_subconnector_property,
65 tv_enc->subconnector); 155 tv_enc->subconnector);
66 156
67 return tv_enc->subconnector ? connector_status_connected : 157 if (tv_enc->subconnector) {
68 connector_status_disconnected; 158 NV_INFO(dev, "Load detected on output %c\n",
159 '@' + ffs(dcb->or));
160 return connector_status_connected;
161 } else {
162 return connector_status_disconnected;
163 }
69} 164}
70 165
71static const struct { 166static const struct {
@@ -219,7 +314,7 @@ static void nv17_tv_dpms(struct drm_encoder *encoder, int mode)
219 return; 314 return;
220 nouveau_encoder(encoder)->last_dpms = mode; 315 nouveau_encoder(encoder)->last_dpms = mode;
221 316
222 NV_TRACE(dev, "Setting dpms mode %d on TV encoder (output %d)\n", 317 NV_INFO(dev, "Setting dpms mode %d on TV encoder (output %d)\n",
223 mode, nouveau_encoder(encoder)->dcb->index); 318 mode, nouveau_encoder(encoder)->dcb->index);
224 319
225 regs->ptv_200 &= ~1; 320 regs->ptv_200 &= ~1;
@@ -484,6 +579,8 @@ static void nv17_tv_restore(struct drm_encoder *encoder)
484 nouveau_encoder(encoder)->restore.output); 579 nouveau_encoder(encoder)->restore.output);
485 580
486 nv17_tv_state_load(dev, &to_tv_enc(encoder)->saved_state); 581 nv17_tv_state_load(dev, &to_tv_enc(encoder)->saved_state);
582
583 nouveau_encoder(encoder)->last_dpms = NV_DPMS_CLEARED;
487} 584}
488 585
489static int nv17_tv_create_resources(struct drm_encoder *encoder, 586static int nv17_tv_create_resources(struct drm_encoder *encoder,
@@ -619,7 +716,7 @@ static void nv17_tv_destroy(struct drm_encoder *encoder)
619{ 716{
620 struct nv17_tv_encoder *tv_enc = to_tv_enc(encoder); 717 struct nv17_tv_encoder *tv_enc = to_tv_enc(encoder);
621 718
622 NV_DEBUG(encoder->dev, "\n"); 719 NV_DEBUG_KMS(encoder->dev, "\n");
623 720
624 drm_encoder_cleanup(encoder); 721 drm_encoder_cleanup(encoder);
625 kfree(tv_enc); 722 kfree(tv_enc);
@@ -633,7 +730,7 @@ static struct drm_encoder_helper_funcs nv17_tv_helper_funcs = {
633 .prepare = nv17_tv_prepare, 730 .prepare = nv17_tv_prepare,
634 .commit = nv17_tv_commit, 731 .commit = nv17_tv_commit,
635 .mode_set = nv17_tv_mode_set, 732 .mode_set = nv17_tv_mode_set,
636 .detect = nv17_dac_detect, 733 .detect = nv17_tv_detect,
637}; 734};
638 735
639static struct drm_encoder_slave_funcs nv17_tv_slave_funcs = { 736static struct drm_encoder_slave_funcs nv17_tv_slave_funcs = {
diff --git a/drivers/gpu/drm/nouveau/nv20_graph.c b/drivers/gpu/drm/nouveau/nv20_graph.c
index 18ba74f19703..d6fc0a82f03d 100644
--- a/drivers/gpu/drm/nouveau/nv20_graph.c
+++ b/drivers/gpu/drm/nouveau/nv20_graph.c
@@ -514,6 +514,27 @@ nv20_graph_rdi(struct drm_device *dev)
514 nouveau_wait_for_idle(dev); 514 nouveau_wait_for_idle(dev);
515} 515}
516 516
517void
518nv20_graph_set_region_tiling(struct drm_device *dev, int i, uint32_t addr,
519 uint32_t size, uint32_t pitch)
520{
521 uint32_t limit = max(1u, addr + size) - 1;
522
523 if (pitch)
524 addr |= 1;
525
526 nv_wr32(dev, NV20_PGRAPH_TLIMIT(i), limit);
527 nv_wr32(dev, NV20_PGRAPH_TSIZE(i), pitch);
528 nv_wr32(dev, NV20_PGRAPH_TILE(i), addr);
529
530 nv_wr32(dev, NV10_PGRAPH_RDI_INDEX, 0x00EA0030 + 4 * i);
531 nv_wr32(dev, NV10_PGRAPH_RDI_DATA, limit);
532 nv_wr32(dev, NV10_PGRAPH_RDI_INDEX, 0x00EA0050 + 4 * i);
533 nv_wr32(dev, NV10_PGRAPH_RDI_DATA, pitch);
534 nv_wr32(dev, NV10_PGRAPH_RDI_INDEX, 0x00EA0010 + 4 * i);
535 nv_wr32(dev, NV10_PGRAPH_RDI_DATA, addr);
536}
537
517int 538int
518nv20_graph_init(struct drm_device *dev) 539nv20_graph_init(struct drm_device *dev)
519{ 540{
@@ -572,27 +593,10 @@ nv20_graph_init(struct drm_device *dev)
572 nv_wr32(dev, NV10_PGRAPH_RDI_DATA , 0x00000030); 593 nv_wr32(dev, NV10_PGRAPH_RDI_DATA , 0x00000030);
573 } 594 }
574 595
575 /* copy tile info from PFB */ 596 /* Turn all the tiling regions off. */
576 for (i = 0; i < NV10_PFB_TILE__SIZE; i++) { 597 for (i = 0; i < NV10_PFB_TILE__SIZE; i++)
577 nv_wr32(dev, 0x00400904 + i * 0x10, 598 nv20_graph_set_region_tiling(dev, i, 0, 0, 0);
578 nv_rd32(dev, NV10_PFB_TLIMIT(i))); 599
579 /* which is NV40_PGRAPH_TLIMIT0(i) ?? */
580 nv_wr32(dev, NV10_PGRAPH_RDI_INDEX, 0x00EA0030 + i * 4);
581 nv_wr32(dev, NV10_PGRAPH_RDI_DATA,
582 nv_rd32(dev, NV10_PFB_TLIMIT(i)));
583 nv_wr32(dev, 0x00400908 + i * 0x10,
584 nv_rd32(dev, NV10_PFB_TSIZE(i)));
585 /* which is NV40_PGRAPH_TSIZE0(i) ?? */
586 nv_wr32(dev, NV10_PGRAPH_RDI_INDEX, 0x00EA0050 + i * 4);
587 nv_wr32(dev, NV10_PGRAPH_RDI_DATA,
588 nv_rd32(dev, NV10_PFB_TSIZE(i)));
589 nv_wr32(dev, 0x00400900 + i * 0x10,
590 nv_rd32(dev, NV10_PFB_TILE(i)));
591 /* which is NV40_PGRAPH_TILE0(i) ?? */
592 nv_wr32(dev, NV10_PGRAPH_RDI_INDEX, 0x00EA0010 + i * 4);
593 nv_wr32(dev, NV10_PGRAPH_RDI_DATA,
594 nv_rd32(dev, NV10_PFB_TILE(i)));
595 }
596 for (i = 0; i < 8; i++) { 600 for (i = 0; i < 8; i++) {
597 nv_wr32(dev, 0x400980 + i * 4, nv_rd32(dev, 0x100300 + i * 4)); 601 nv_wr32(dev, 0x400980 + i * 4, nv_rd32(dev, 0x100300 + i * 4));
598 nv_wr32(dev, NV10_PGRAPH_RDI_INDEX, 0x00EA0090 + i * 4); 602 nv_wr32(dev, NV10_PGRAPH_RDI_INDEX, 0x00EA0090 + i * 4);
@@ -704,18 +708,9 @@ nv30_graph_init(struct drm_device *dev)
704 708
705 nv_wr32(dev, 0x4000c0, 0x00000016); 709 nv_wr32(dev, 0x4000c0, 0x00000016);
706 710
707 /* copy tile info from PFB */ 711 /* Turn all the tiling regions off. */
708 for (i = 0; i < NV10_PFB_TILE__SIZE; i++) { 712 for (i = 0; i < NV10_PFB_TILE__SIZE; i++)
709 nv_wr32(dev, 0x00400904 + i * 0x10, 713 nv20_graph_set_region_tiling(dev, i, 0, 0, 0);
710 nv_rd32(dev, NV10_PFB_TLIMIT(i)));
711 /* which is NV40_PGRAPH_TLIMIT0(i) ?? */
712 nv_wr32(dev, 0x00400908 + i * 0x10,
713 nv_rd32(dev, NV10_PFB_TSIZE(i)));
714 /* which is NV40_PGRAPH_TSIZE0(i) ?? */
715 nv_wr32(dev, 0x00400900 + i * 0x10,
716 nv_rd32(dev, NV10_PFB_TILE(i)));
717 /* which is NV40_PGRAPH_TILE0(i) ?? */
718 }
719 714
720 nv_wr32(dev, NV10_PGRAPH_CTX_CONTROL, 0x10000100); 715 nv_wr32(dev, NV10_PGRAPH_CTX_CONTROL, 0x10000100);
721 nv_wr32(dev, NV10_PGRAPH_STATE , 0xFFFFFFFF); 716 nv_wr32(dev, NV10_PGRAPH_STATE , 0xFFFFFFFF);
diff --git a/drivers/gpu/drm/nouveau/nv40_fb.c b/drivers/gpu/drm/nouveau/nv40_fb.c
index ca1d27107a8e..3cd07d8d5bd7 100644
--- a/drivers/gpu/drm/nouveau/nv40_fb.c
+++ b/drivers/gpu/drm/nouveau/nv40_fb.c
@@ -3,12 +3,37 @@
3#include "nouveau_drv.h" 3#include "nouveau_drv.h"
4#include "nouveau_drm.h" 4#include "nouveau_drm.h"
5 5
6void
7nv40_fb_set_region_tiling(struct drm_device *dev, int i, uint32_t addr,
8 uint32_t size, uint32_t pitch)
9{
10 struct drm_nouveau_private *dev_priv = dev->dev_private;
11 uint32_t limit = max(1u, addr + size) - 1;
12
13 if (pitch)
14 addr |= 1;
15
16 switch (dev_priv->chipset) {
17 case 0x40:
18 nv_wr32(dev, NV10_PFB_TLIMIT(i), limit);
19 nv_wr32(dev, NV10_PFB_TSIZE(i), pitch);
20 nv_wr32(dev, NV10_PFB_TILE(i), addr);
21 break;
22
23 default:
24 nv_wr32(dev, NV40_PFB_TLIMIT(i), limit);
25 nv_wr32(dev, NV40_PFB_TSIZE(i), pitch);
26 nv_wr32(dev, NV40_PFB_TILE(i), addr);
27 break;
28 }
29}
30
6int 31int
7nv40_fb_init(struct drm_device *dev) 32nv40_fb_init(struct drm_device *dev)
8{ 33{
9 struct drm_nouveau_private *dev_priv = dev->dev_private; 34 struct drm_nouveau_private *dev_priv = dev->dev_private;
10 uint32_t fb_bar_size, tmp; 35 struct nouveau_fb_engine *pfb = &dev_priv->engine.fb;
11 int num_tiles; 36 uint32_t tmp;
12 int i; 37 int i;
13 38
14 /* This is strictly a NV4x register (don't know about NV5x). */ 39 /* This is strictly a NV4x register (don't know about NV5x). */
@@ -23,35 +48,23 @@ nv40_fb_init(struct drm_device *dev)
23 case 0x45: 48 case 0x45:
24 tmp = nv_rd32(dev, NV10_PFB_CLOSE_PAGE2); 49 tmp = nv_rd32(dev, NV10_PFB_CLOSE_PAGE2);
25 nv_wr32(dev, NV10_PFB_CLOSE_PAGE2, tmp & ~(1 << 15)); 50 nv_wr32(dev, NV10_PFB_CLOSE_PAGE2, tmp & ~(1 << 15));
26 num_tiles = NV10_PFB_TILE__SIZE; 51 pfb->num_tiles = NV10_PFB_TILE__SIZE;
27 break; 52 break;
28 case 0x46: /* G72 */ 53 case 0x46: /* G72 */
29 case 0x47: /* G70 */ 54 case 0x47: /* G70 */
30 case 0x49: /* G71 */ 55 case 0x49: /* G71 */
31 case 0x4b: /* G73 */ 56 case 0x4b: /* G73 */
32 case 0x4c: /* C51 (G7X version) */ 57 case 0x4c: /* C51 (G7X version) */
33 num_tiles = NV40_PFB_TILE__SIZE_1; 58 pfb->num_tiles = NV40_PFB_TILE__SIZE_1;
34 break; 59 break;
35 default: 60 default:
36 num_tiles = NV40_PFB_TILE__SIZE_0; 61 pfb->num_tiles = NV40_PFB_TILE__SIZE_0;
37 break; 62 break;
38 } 63 }
39 64
40 fb_bar_size = drm_get_resource_len(dev, 0) - 1; 65 /* Turn all the tiling regions off. */
41 switch (dev_priv->chipset) { 66 for (i = 0; i < pfb->num_tiles; i++)
42 case 0x40: 67 pfb->set_region_tiling(dev, i, 0, 0, 0);
43 for (i = 0; i < num_tiles; i++) {
44 nv_wr32(dev, NV10_PFB_TILE(i), 0);
45 nv_wr32(dev, NV10_PFB_TLIMIT(i), fb_bar_size);
46 }
47 break;
48 default:
49 for (i = 0; i < num_tiles; i++) {
50 nv_wr32(dev, NV40_PFB_TILE(i), 0);
51 nv_wr32(dev, NV40_PFB_TLIMIT(i), fb_bar_size);
52 }
53 break;
54 }
55 68
56 return 0; 69 return 0;
57} 70}
diff --git a/drivers/gpu/drm/nouveau/nv40_graph.c b/drivers/gpu/drm/nouveau/nv40_graph.c
index d3e0a2a6acf8..53e8afe1dcd1 100644
--- a/drivers/gpu/drm/nouveau/nv40_graph.c
+++ b/drivers/gpu/drm/nouveau/nv40_graph.c
@@ -24,36 +24,10 @@
24 * 24 *
25 */ 25 */
26 26
27#include <linux/firmware.h>
28
29#include "drmP.h" 27#include "drmP.h"
30#include "drm.h" 28#include "drm.h"
31#include "nouveau_drv.h" 29#include "nouveau_drv.h"
32 30#include "nouveau_grctx.h"
33MODULE_FIRMWARE("nouveau/nv40.ctxprog");
34MODULE_FIRMWARE("nouveau/nv40.ctxvals");
35MODULE_FIRMWARE("nouveau/nv41.ctxprog");
36MODULE_FIRMWARE("nouveau/nv41.ctxvals");
37MODULE_FIRMWARE("nouveau/nv42.ctxprog");
38MODULE_FIRMWARE("nouveau/nv42.ctxvals");
39MODULE_FIRMWARE("nouveau/nv43.ctxprog");
40MODULE_FIRMWARE("nouveau/nv43.ctxvals");
41MODULE_FIRMWARE("nouveau/nv44.ctxprog");
42MODULE_FIRMWARE("nouveau/nv44.ctxvals");
43MODULE_FIRMWARE("nouveau/nv46.ctxprog");
44MODULE_FIRMWARE("nouveau/nv46.ctxvals");
45MODULE_FIRMWARE("nouveau/nv47.ctxprog");
46MODULE_FIRMWARE("nouveau/nv47.ctxvals");
47MODULE_FIRMWARE("nouveau/nv49.ctxprog");
48MODULE_FIRMWARE("nouveau/nv49.ctxvals");
49MODULE_FIRMWARE("nouveau/nv4a.ctxprog");
50MODULE_FIRMWARE("nouveau/nv4a.ctxvals");
51MODULE_FIRMWARE("nouveau/nv4b.ctxprog");
52MODULE_FIRMWARE("nouveau/nv4b.ctxvals");
53MODULE_FIRMWARE("nouveau/nv4c.ctxprog");
54MODULE_FIRMWARE("nouveau/nv4c.ctxvals");
55MODULE_FIRMWARE("nouveau/nv4e.ctxprog");
56MODULE_FIRMWARE("nouveau/nv4e.ctxvals");
57 31
58struct nouveau_channel * 32struct nouveau_channel *
59nv40_graph_channel(struct drm_device *dev) 33nv40_graph_channel(struct drm_device *dev)
@@ -83,27 +57,30 @@ nv40_graph_create_context(struct nouveau_channel *chan)
83{ 57{
84 struct drm_device *dev = chan->dev; 58 struct drm_device *dev = chan->dev;
85 struct drm_nouveau_private *dev_priv = dev->dev_private; 59 struct drm_nouveau_private *dev_priv = dev->dev_private;
86 struct nouveau_gpuobj *ctx; 60 struct nouveau_pgraph_engine *pgraph = &dev_priv->engine.graph;
87 int ret; 61 int ret;
88 62
89 /* Allocate a 175KiB block of PRAMIN to store the context. This 63 ret = nouveau_gpuobj_new_ref(dev, chan, NULL, 0, pgraph->grctx_size,
90 * is massive overkill for a lot of chipsets, but it should be safe 64 16, NVOBJ_FLAG_ZERO_ALLOC,
91 * until we're able to implement this properly (will happen at more 65 &chan->ramin_grctx);
92 * or less the same time we're able to write our own context programs.
93 */
94 ret = nouveau_gpuobj_new_ref(dev, chan, NULL, 0, 175*1024, 16,
95 NVOBJ_FLAG_ZERO_ALLOC,
96 &chan->ramin_grctx);
97 if (ret) 66 if (ret)
98 return ret; 67 return ret;
99 ctx = chan->ramin_grctx->gpuobj;
100 68
101 /* Initialise default context values */ 69 /* Initialise default context values */
102 dev_priv->engine.instmem.prepare_access(dev, true); 70 dev_priv->engine.instmem.prepare_access(dev, true);
103 nv40_grctx_vals_load(dev, ctx); 71 if (!pgraph->ctxprog) {
104 nv_wo32(dev, ctx, 0, ctx->im_pramin->start); 72 struct nouveau_grctx ctx = {};
105 dev_priv->engine.instmem.finish_access(dev);
106 73
74 ctx.dev = chan->dev;
75 ctx.mode = NOUVEAU_GRCTX_VALS;
76 ctx.data = chan->ramin_grctx->gpuobj;
77 nv40_grctx_init(&ctx);
78 } else {
79 nouveau_grctx_vals_load(dev, chan->ramin_grctx->gpuobj);
80 }
81 nv_wo32(dev, chan->ramin_grctx->gpuobj, 0,
82 chan->ramin_grctx->gpuobj->im_pramin->start);
83 dev_priv->engine.instmem.finish_access(dev);
107 return 0; 84 return 0;
108} 85}
109 86
@@ -204,133 +181,46 @@ nv40_graph_unload_context(struct drm_device *dev)
204 return ret; 181 return ret;
205} 182}
206 183
207struct nouveau_ctxprog {
208 uint32_t signature;
209 uint8_t version;
210 uint16_t length;
211 uint32_t data[];
212} __attribute__ ((packed));
213
214struct nouveau_ctxvals {
215 uint32_t signature;
216 uint8_t version;
217 uint32_t length;
218 struct {
219 uint32_t offset;
220 uint32_t value;
221 } data[];
222} __attribute__ ((packed));
223
224int
225nv40_grctx_init(struct drm_device *dev)
226{
227 struct drm_nouveau_private *dev_priv = dev->dev_private;
228 struct nouveau_pgraph_engine *pgraph = &dev_priv->engine.graph;
229 const int chipset = dev_priv->chipset;
230 const struct firmware *fw;
231 const struct nouveau_ctxprog *cp;
232 const struct nouveau_ctxvals *cv;
233 char name[32];
234 int ret, i;
235
236 pgraph->accel_blocked = true;
237
238 if (!pgraph->ctxprog) {
239 sprintf(name, "nouveau/nv%02x.ctxprog", chipset);
240 ret = request_firmware(&fw, name, &dev->pdev->dev);
241 if (ret) {
242 NV_ERROR(dev, "No ctxprog for NV%02x\n", chipset);
243 return ret;
244 }
245
246 pgraph->ctxprog = kmalloc(fw->size, GFP_KERNEL);
247 if (!pgraph->ctxprog) {
248 NV_ERROR(dev, "OOM copying ctxprog\n");
249 release_firmware(fw);
250 return -ENOMEM;
251 }
252 memcpy(pgraph->ctxprog, fw->data, fw->size);
253
254 cp = pgraph->ctxprog;
255 if (cp->signature != 0x5043564e || cp->version != 0 ||
256 cp->length != ((fw->size - 7) / 4)) {
257 NV_ERROR(dev, "ctxprog invalid\n");
258 release_firmware(fw);
259 nv40_grctx_fini(dev);
260 return -EINVAL;
261 }
262 release_firmware(fw);
263 }
264
265 if (!pgraph->ctxvals) {
266 sprintf(name, "nouveau/nv%02x.ctxvals", chipset);
267 ret = request_firmware(&fw, name, &dev->pdev->dev);
268 if (ret) {
269 NV_ERROR(dev, "No ctxvals for NV%02x\n", chipset);
270 nv40_grctx_fini(dev);
271 return ret;
272 }
273
274 pgraph->ctxvals = kmalloc(fw->size, GFP_KERNEL);
275 if (!pgraph->ctxprog) {
276 NV_ERROR(dev, "OOM copying ctxprog\n");
277 release_firmware(fw);
278 nv40_grctx_fini(dev);
279 return -ENOMEM;
280 }
281 memcpy(pgraph->ctxvals, fw->data, fw->size);
282
283 cv = (void *)pgraph->ctxvals;
284 if (cv->signature != 0x5643564e || cv->version != 0 ||
285 cv->length != ((fw->size - 9) / 8)) {
286 NV_ERROR(dev, "ctxvals invalid\n");
287 release_firmware(fw);
288 nv40_grctx_fini(dev);
289 return -EINVAL;
290 }
291 release_firmware(fw);
292 }
293
294 cp = pgraph->ctxprog;
295
296 nv_wr32(dev, NV40_PGRAPH_CTXCTL_UCODE_INDEX, 0);
297 for (i = 0; i < cp->length; i++)
298 nv_wr32(dev, NV40_PGRAPH_CTXCTL_UCODE_DATA, cp->data[i]);
299
300 pgraph->accel_blocked = false;
301 return 0;
302}
303
304void 184void
305nv40_grctx_fini(struct drm_device *dev) 185nv40_graph_set_region_tiling(struct drm_device *dev, int i, uint32_t addr,
186 uint32_t size, uint32_t pitch)
306{ 187{
307 struct drm_nouveau_private *dev_priv = dev->dev_private; 188 struct drm_nouveau_private *dev_priv = dev->dev_private;
308 struct nouveau_pgraph_engine *pgraph = &dev_priv->engine.graph; 189 uint32_t limit = max(1u, addr + size) - 1;
309
310 if (pgraph->ctxprog) {
311 kfree(pgraph->ctxprog);
312 pgraph->ctxprog = NULL;
313 }
314 190
315 if (pgraph->ctxvals) { 191 if (pitch)
316 kfree(pgraph->ctxprog); 192 addr |= 1;
317 pgraph->ctxvals = NULL;
318 }
319}
320 193
321void 194 switch (dev_priv->chipset) {
322nv40_grctx_vals_load(struct drm_device *dev, struct nouveau_gpuobj *ctx) 195 case 0x44:
323{ 196 case 0x4a:
324 struct drm_nouveau_private *dev_priv = dev->dev_private; 197 case 0x4e:
325 struct nouveau_pgraph_engine *pgraph = &dev_priv->engine.graph; 198 nv_wr32(dev, NV20_PGRAPH_TSIZE(i), pitch);
326 struct nouveau_ctxvals *cv = pgraph->ctxvals; 199 nv_wr32(dev, NV20_PGRAPH_TLIMIT(i), limit);
327 int i; 200 nv_wr32(dev, NV20_PGRAPH_TILE(i), addr);
201 break;
328 202
329 if (!cv) 203 case 0x46:
330 return; 204 case 0x47:
205 case 0x49:
206 case 0x4b:
207 nv_wr32(dev, NV47_PGRAPH_TSIZE(i), pitch);
208 nv_wr32(dev, NV47_PGRAPH_TLIMIT(i), limit);
209 nv_wr32(dev, NV47_PGRAPH_TILE(i), addr);
210 nv_wr32(dev, NV40_PGRAPH_TSIZE1(i), pitch);
211 nv_wr32(dev, NV40_PGRAPH_TLIMIT1(i), limit);
212 nv_wr32(dev, NV40_PGRAPH_TILE1(i), addr);
213 break;
331 214
332 for (i = 0; i < cv->length; i++) 215 default:
333 nv_wo32(dev, ctx, cv->data[i].offset, cv->data[i].value); 216 nv_wr32(dev, NV20_PGRAPH_TSIZE(i), pitch);
217 nv_wr32(dev, NV20_PGRAPH_TLIMIT(i), limit);
218 nv_wr32(dev, NV20_PGRAPH_TILE(i), addr);
219 nv_wr32(dev, NV40_PGRAPH_TSIZE1(i), pitch);
220 nv_wr32(dev, NV40_PGRAPH_TLIMIT1(i), limit);
221 nv_wr32(dev, NV40_PGRAPH_TILE1(i), addr);
222 break;
223 }
334} 224}
335 225
336/* 226/*
@@ -347,7 +237,8 @@ nv40_graph_init(struct drm_device *dev)
347{ 237{
348 struct drm_nouveau_private *dev_priv = 238 struct drm_nouveau_private *dev_priv =
349 (struct drm_nouveau_private *)dev->dev_private; 239 (struct drm_nouveau_private *)dev->dev_private;
350 uint32_t vramsz, tmp; 240 struct nouveau_fb_engine *pfb = &dev_priv->engine.fb;
241 uint32_t vramsz;
351 int i, j; 242 int i, j;
352 243
353 nv_wr32(dev, NV03_PMC_ENABLE, nv_rd32(dev, NV03_PMC_ENABLE) & 244 nv_wr32(dev, NV03_PMC_ENABLE, nv_rd32(dev, NV03_PMC_ENABLE) &
@@ -355,7 +246,26 @@ nv40_graph_init(struct drm_device *dev)
355 nv_wr32(dev, NV03_PMC_ENABLE, nv_rd32(dev, NV03_PMC_ENABLE) | 246 nv_wr32(dev, NV03_PMC_ENABLE, nv_rd32(dev, NV03_PMC_ENABLE) |
356 NV_PMC_ENABLE_PGRAPH); 247 NV_PMC_ENABLE_PGRAPH);
357 248
358 nv40_grctx_init(dev); 249 if (nouveau_ctxfw) {
250 nouveau_grctx_prog_load(dev);
251 dev_priv->engine.graph.grctx_size = 175 * 1024;
252 }
253
254 if (!dev_priv->engine.graph.ctxprog) {
255 struct nouveau_grctx ctx = {};
256 uint32_t cp[256];
257
258 ctx.dev = dev;
259 ctx.mode = NOUVEAU_GRCTX_PROG;
260 ctx.data = cp;
261 ctx.ctxprog_max = 256;
262 nv40_grctx_init(&ctx);
263 dev_priv->engine.graph.grctx_size = ctx.ctxvals_pos * 4;
264
265 nv_wr32(dev, NV40_PGRAPH_CTXCTL_UCODE_INDEX, 0);
266 for (i = 0; i < ctx.ctxprog_len; i++)
267 nv_wr32(dev, NV40_PGRAPH_CTXCTL_UCODE_DATA, cp[i]);
268 }
359 269
360 /* No context present currently */ 270 /* No context present currently */
361 nv_wr32(dev, NV40_PGRAPH_CTXCTL_CUR, 0x00000000); 271 nv_wr32(dev, NV40_PGRAPH_CTXCTL_CUR, 0x00000000);
@@ -425,74 +335,9 @@ nv40_graph_init(struct drm_device *dev)
425 nv_wr32(dev, 0x400b38, 0x2ffff800); 335 nv_wr32(dev, 0x400b38, 0x2ffff800);
426 nv_wr32(dev, 0x400b3c, 0x00006000); 336 nv_wr32(dev, 0x400b3c, 0x00006000);
427 337
428 /* copy tile info from PFB */ 338 /* Turn all the tiling regions off. */
429 switch (dev_priv->chipset) { 339 for (i = 0; i < pfb->num_tiles; i++)
430 case 0x40: /* vanilla NV40 */ 340 nv40_graph_set_region_tiling(dev, i, 0, 0, 0);
431 for (i = 0; i < NV10_PFB_TILE__SIZE; i++) {
432 tmp = nv_rd32(dev, NV10_PFB_TILE(i));
433 nv_wr32(dev, NV40_PGRAPH_TILE0(i), tmp);
434 nv_wr32(dev, NV40_PGRAPH_TILE1(i), tmp);
435 tmp = nv_rd32(dev, NV10_PFB_TLIMIT(i));
436 nv_wr32(dev, NV40_PGRAPH_TLIMIT0(i), tmp);
437 nv_wr32(dev, NV40_PGRAPH_TLIMIT1(i), tmp);
438 tmp = nv_rd32(dev, NV10_PFB_TSIZE(i));
439 nv_wr32(dev, NV40_PGRAPH_TSIZE0(i), tmp);
440 nv_wr32(dev, NV40_PGRAPH_TSIZE1(i), tmp);
441 tmp = nv_rd32(dev, NV10_PFB_TSTATUS(i));
442 nv_wr32(dev, NV40_PGRAPH_TSTATUS0(i), tmp);
443 nv_wr32(dev, NV40_PGRAPH_TSTATUS1(i), tmp);
444 }
445 break;
446 case 0x44:
447 case 0x4a:
448 case 0x4e: /* NV44-based cores don't have 0x406900? */
449 for (i = 0; i < NV40_PFB_TILE__SIZE_0; i++) {
450 tmp = nv_rd32(dev, NV40_PFB_TILE(i));
451 nv_wr32(dev, NV40_PGRAPH_TILE0(i), tmp);
452 tmp = nv_rd32(dev, NV40_PFB_TLIMIT(i));
453 nv_wr32(dev, NV40_PGRAPH_TLIMIT0(i), tmp);
454 tmp = nv_rd32(dev, NV40_PFB_TSIZE(i));
455 nv_wr32(dev, NV40_PGRAPH_TSIZE0(i), tmp);
456 tmp = nv_rd32(dev, NV40_PFB_TSTATUS(i));
457 nv_wr32(dev, NV40_PGRAPH_TSTATUS0(i), tmp);
458 }
459 break;
460 case 0x46:
461 case 0x47:
462 case 0x49:
463 case 0x4b: /* G7X-based cores */
464 for (i = 0; i < NV40_PFB_TILE__SIZE_1; i++) {
465 tmp = nv_rd32(dev, NV40_PFB_TILE(i));
466 nv_wr32(dev, NV47_PGRAPH_TILE0(i), tmp);
467 nv_wr32(dev, NV40_PGRAPH_TILE1(i), tmp);
468 tmp = nv_rd32(dev, NV40_PFB_TLIMIT(i));
469 nv_wr32(dev, NV47_PGRAPH_TLIMIT0(i), tmp);
470 nv_wr32(dev, NV40_PGRAPH_TLIMIT1(i), tmp);
471 tmp = nv_rd32(dev, NV40_PFB_TSIZE(i));
472 nv_wr32(dev, NV47_PGRAPH_TSIZE0(i), tmp);
473 nv_wr32(dev, NV40_PGRAPH_TSIZE1(i), tmp);
474 tmp = nv_rd32(dev, NV40_PFB_TSTATUS(i));
475 nv_wr32(dev, NV47_PGRAPH_TSTATUS0(i), tmp);
476 nv_wr32(dev, NV40_PGRAPH_TSTATUS1(i), tmp);
477 }
478 break;
479 default: /* everything else */
480 for (i = 0; i < NV40_PFB_TILE__SIZE_0; i++) {
481 tmp = nv_rd32(dev, NV40_PFB_TILE(i));
482 nv_wr32(dev, NV40_PGRAPH_TILE0(i), tmp);
483 nv_wr32(dev, NV40_PGRAPH_TILE1(i), tmp);
484 tmp = nv_rd32(dev, NV40_PFB_TLIMIT(i));
485 nv_wr32(dev, NV40_PGRAPH_TLIMIT0(i), tmp);
486 nv_wr32(dev, NV40_PGRAPH_TLIMIT1(i), tmp);
487 tmp = nv_rd32(dev, NV40_PFB_TSIZE(i));
488 nv_wr32(dev, NV40_PGRAPH_TSIZE0(i), tmp);
489 nv_wr32(dev, NV40_PGRAPH_TSIZE1(i), tmp);
490 tmp = nv_rd32(dev, NV40_PFB_TSTATUS(i));
491 nv_wr32(dev, NV40_PGRAPH_TSTATUS0(i), tmp);
492 nv_wr32(dev, NV40_PGRAPH_TSTATUS1(i), tmp);
493 }
494 break;
495 }
496 341
497 /* begin RAM config */ 342 /* begin RAM config */
498 vramsz = drm_get_resource_len(dev, 0) - 1; 343 vramsz = drm_get_resource_len(dev, 0) - 1;
@@ -535,6 +380,7 @@ nv40_graph_init(struct drm_device *dev)
535 380
536void nv40_graph_takedown(struct drm_device *dev) 381void nv40_graph_takedown(struct drm_device *dev)
537{ 382{
383 nouveau_grctx_fini(dev);
538} 384}
539 385
540struct nouveau_pgraph_object_class nv40_graph_grclass[] = { 386struct nouveau_pgraph_object_class nv40_graph_grclass[] = {
diff --git a/drivers/gpu/drm/nouveau/nv40_grctx.c b/drivers/gpu/drm/nouveau/nv40_grctx.c
new file mode 100644
index 000000000000..11b11c31f543
--- /dev/null
+++ b/drivers/gpu/drm/nouveau/nv40_grctx.c
@@ -0,0 +1,678 @@
1/*
2 * Copyright 2009 Red Hat Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: Ben Skeggs
23 */
24
25/* NVIDIA context programs handle a number of other conditions which are
26 * not implemented in our versions. It's not clear why NVIDIA context
27 * programs have this code, nor whether it's strictly necessary for
28 * correct operation. We'll implement additional handling if/when we
29 * discover it's necessary.
30 *
31 * - On context save, NVIDIA set 0x400314 bit 0 to 1 if the "3D state"
32 * flag is set, this gets saved into the context.
33 * - On context save, the context program for all cards load nsource
34 * into a flag register and check for ILLEGAL_MTHD. If it's set,
35 * opcode 0x60000d is called before resuming normal operation.
36 * - Some context programs check more conditions than the above. NV44
37 * checks: ((nsource & 0x0857) || (0x400718 & 0x0100) || (intr & 0x0001))
38 * and calls 0x60000d before resuming normal operation.
39 * - At the very beginning of NVIDIA's context programs, flag 9 is checked
40 * and if true 0x800001 is called with count=0, pos=0, the flag is cleared
41 * and then the ctxprog is aborted. It looks like a complicated NOP,
42 * its purpose is unknown.
43 * - In the section of code that loads the per-vs state, NVIDIA check
44 * flag 10. If it's set, they only transfer the small 0x300 byte block
45 * of state + the state for a single vs as opposed to the state for
46 * all vs units. It doesn't seem likely that it'll occur in normal
47 * operation, especially seeing as it appears NVIDIA may have screwed
48 * up the ctxprogs for some cards and have an invalid instruction
49 * rather than a cp_lsr(ctx, dwords_for_1_vs_unit) instruction.
50 * - There's a number of places where context offset 0 (where we place
51 * the PRAMIN offset of the context) is loaded into either 0x408000,
52 * 0x408004 or 0x408008. Not sure what's up there either.
53 * - The ctxprogs for some cards save 0x400a00 again during the cleanup
54 * path for auto-loadctx.
55 */
56
57#define CP_FLAG_CLEAR 0
58#define CP_FLAG_SET 1
59#define CP_FLAG_SWAP_DIRECTION ((0 * 32) + 0)
60#define CP_FLAG_SWAP_DIRECTION_LOAD 0
61#define CP_FLAG_SWAP_DIRECTION_SAVE 1
62#define CP_FLAG_USER_SAVE ((0 * 32) + 5)
63#define CP_FLAG_USER_SAVE_NOT_PENDING 0
64#define CP_FLAG_USER_SAVE_PENDING 1
65#define CP_FLAG_USER_LOAD ((0 * 32) + 6)
66#define CP_FLAG_USER_LOAD_NOT_PENDING 0
67#define CP_FLAG_USER_LOAD_PENDING 1
68#define CP_FLAG_STATUS ((3 * 32) + 0)
69#define CP_FLAG_STATUS_IDLE 0
70#define CP_FLAG_STATUS_BUSY 1
71#define CP_FLAG_AUTO_SAVE ((3 * 32) + 4)
72#define CP_FLAG_AUTO_SAVE_NOT_PENDING 0
73#define CP_FLAG_AUTO_SAVE_PENDING 1
74#define CP_FLAG_AUTO_LOAD ((3 * 32) + 5)
75#define CP_FLAG_AUTO_LOAD_NOT_PENDING 0
76#define CP_FLAG_AUTO_LOAD_PENDING 1
77#define CP_FLAG_UNK54 ((3 * 32) + 6)
78#define CP_FLAG_UNK54_CLEAR 0
79#define CP_FLAG_UNK54_SET 1
80#define CP_FLAG_ALWAYS ((3 * 32) + 8)
81#define CP_FLAG_ALWAYS_FALSE 0
82#define CP_FLAG_ALWAYS_TRUE 1
83#define CP_FLAG_UNK57 ((3 * 32) + 9)
84#define CP_FLAG_UNK57_CLEAR 0
85#define CP_FLAG_UNK57_SET 1
86
87#define CP_CTX 0x00100000
88#define CP_CTX_COUNT 0x000fc000
89#define CP_CTX_COUNT_SHIFT 14
90#define CP_CTX_REG 0x00003fff
91#define CP_LOAD_SR 0x00200000
92#define CP_LOAD_SR_VALUE 0x000fffff
93#define CP_BRA 0x00400000
94#define CP_BRA_IP 0x0000ff00
95#define CP_BRA_IP_SHIFT 8
96#define CP_BRA_IF_CLEAR 0x00000080
97#define CP_BRA_FLAG 0x0000007f
98#define CP_WAIT 0x00500000
99#define CP_WAIT_SET 0x00000080
100#define CP_WAIT_FLAG 0x0000007f
101#define CP_SET 0x00700000
102#define CP_SET_1 0x00000080
103#define CP_SET_FLAG 0x0000007f
104#define CP_NEXT_TO_SWAP 0x00600007
105#define CP_NEXT_TO_CURRENT 0x00600009
106#define CP_SET_CONTEXT_POINTER 0x0060000a
107#define CP_END 0x0060000e
108#define CP_LOAD_MAGIC_UNK01 0x00800001 /* unknown */
109#define CP_LOAD_MAGIC_NV44TCL 0x00800029 /* per-vs state (0x4497) */
110#define CP_LOAD_MAGIC_NV40TCL 0x00800041 /* per-vs state (0x4097) */
111
112#include "drmP.h"
113#include "nouveau_drv.h"
114#include "nouveau_grctx.h"
115
116/* TODO:
117 * - get vs count from 0x1540
118 * - document unimplemented bits compared to nvidia
119 * - nsource handling
120 * - R0 & 0x0200 handling
121 * - single-vs handling
122 * - 400314 bit 0
123 */
124
125static int
126nv40_graph_4097(struct drm_device *dev)
127{
128 struct drm_nouveau_private *dev_priv = dev->dev_private;
129
130 if ((dev_priv->chipset & 0xf0) == 0x60)
131 return 0;
132
133 return !!(0x0baf & (1 << dev_priv->chipset));
134}
135
136static int
137nv40_graph_vs_count(struct drm_device *dev)
138{
139 struct drm_nouveau_private *dev_priv = dev->dev_private;
140
141 switch (dev_priv->chipset) {
142 case 0x47:
143 case 0x49:
144 case 0x4b:
145 return 8;
146 case 0x40:
147 return 6;
148 case 0x41:
149 case 0x42:
150 return 5;
151 case 0x43:
152 case 0x44:
153 case 0x46:
154 case 0x4a:
155 return 3;
156 case 0x4c:
157 case 0x4e:
158 case 0x67:
159 default:
160 return 1;
161 }
162}
163
164
165enum cp_label {
166 cp_check_load = 1,
167 cp_setup_auto_load,
168 cp_setup_load,
169 cp_setup_save,
170 cp_swap_state,
171 cp_swap_state3d_3_is_save,
172 cp_prepare_exit,
173 cp_exit,
174};
175
176static void
177nv40_graph_construct_general(struct nouveau_grctx *ctx)
178{
179 struct drm_nouveau_private *dev_priv = ctx->dev->dev_private;
180 int i;
181
182 cp_ctx(ctx, 0x4000a4, 1);
183 gr_def(ctx, 0x4000a4, 0x00000008);
184 cp_ctx(ctx, 0x400144, 58);
185 gr_def(ctx, 0x400144, 0x00000001);
186 cp_ctx(ctx, 0x400314, 1);
187 gr_def(ctx, 0x400314, 0x00000000);
188 cp_ctx(ctx, 0x400400, 10);
189 cp_ctx(ctx, 0x400480, 10);
190 cp_ctx(ctx, 0x400500, 19);
191 gr_def(ctx, 0x400514, 0x00040000);
192 gr_def(ctx, 0x400524, 0x55555555);
193 gr_def(ctx, 0x400528, 0x55555555);
194 gr_def(ctx, 0x40052c, 0x55555555);
195 gr_def(ctx, 0x400530, 0x55555555);
196 cp_ctx(ctx, 0x400560, 6);
197 gr_def(ctx, 0x400568, 0x0000ffff);
198 gr_def(ctx, 0x40056c, 0x0000ffff);
199 cp_ctx(ctx, 0x40057c, 5);
200 cp_ctx(ctx, 0x400710, 3);
201 gr_def(ctx, 0x400710, 0x20010001);
202 gr_def(ctx, 0x400714, 0x0f73ef00);
203 cp_ctx(ctx, 0x400724, 1);
204 gr_def(ctx, 0x400724, 0x02008821);
205 cp_ctx(ctx, 0x400770, 3);
206 if (dev_priv->chipset == 0x40) {
207 cp_ctx(ctx, 0x400814, 4);
208 cp_ctx(ctx, 0x400828, 5);
209 cp_ctx(ctx, 0x400840, 5);
210 gr_def(ctx, 0x400850, 0x00000040);
211 cp_ctx(ctx, 0x400858, 4);
212 gr_def(ctx, 0x400858, 0x00000040);
213 gr_def(ctx, 0x40085c, 0x00000040);
214 gr_def(ctx, 0x400864, 0x80000000);
215 cp_ctx(ctx, 0x40086c, 9);
216 gr_def(ctx, 0x40086c, 0x80000000);
217 gr_def(ctx, 0x400870, 0x80000000);
218 gr_def(ctx, 0x400874, 0x80000000);
219 gr_def(ctx, 0x400878, 0x80000000);
220 gr_def(ctx, 0x400888, 0x00000040);
221 gr_def(ctx, 0x40088c, 0x80000000);
222 cp_ctx(ctx, 0x4009c0, 8);
223 gr_def(ctx, 0x4009cc, 0x80000000);
224 gr_def(ctx, 0x4009dc, 0x80000000);
225 } else {
226 cp_ctx(ctx, 0x400840, 20);
227 if (!nv40_graph_4097(ctx->dev)) {
228 for (i = 0; i < 8; i++)
229 gr_def(ctx, 0x400860 + (i * 4), 0x00000001);
230 }
231 gr_def(ctx, 0x400880, 0x00000040);
232 gr_def(ctx, 0x400884, 0x00000040);
233 gr_def(ctx, 0x400888, 0x00000040);
234 cp_ctx(ctx, 0x400894, 11);
235 gr_def(ctx, 0x400894, 0x00000040);
236 if (nv40_graph_4097(ctx->dev)) {
237 for (i = 0; i < 8; i++)
238 gr_def(ctx, 0x4008a0 + (i * 4), 0x80000000);
239 }
240 cp_ctx(ctx, 0x4008e0, 2);
241 cp_ctx(ctx, 0x4008f8, 2);
242 if (dev_priv->chipset == 0x4c ||
243 (dev_priv->chipset & 0xf0) == 0x60)
244 cp_ctx(ctx, 0x4009f8, 1);
245 }
246 cp_ctx(ctx, 0x400a00, 73);
247 gr_def(ctx, 0x400b0c, 0x0b0b0b0c);
248 cp_ctx(ctx, 0x401000, 4);
249 cp_ctx(ctx, 0x405004, 1);
250 switch (dev_priv->chipset) {
251 case 0x47:
252 case 0x49:
253 case 0x4b:
254 cp_ctx(ctx, 0x403448, 1);
255 gr_def(ctx, 0x403448, 0x00001010);
256 break;
257 default:
258 cp_ctx(ctx, 0x403440, 1);
259 switch (dev_priv->chipset) {
260 case 0x40:
261 gr_def(ctx, 0x403440, 0x00000010);
262 break;
263 case 0x44:
264 case 0x46:
265 case 0x4a:
266 gr_def(ctx, 0x403440, 0x00003010);
267 break;
268 case 0x41:
269 case 0x42:
270 case 0x43:
271 case 0x4c:
272 case 0x4e:
273 case 0x67:
274 default:
275 gr_def(ctx, 0x403440, 0x00001010);
276 break;
277 }
278 break;
279 }
280}
281
282static void
283nv40_graph_construct_state3d(struct nouveau_grctx *ctx)
284{
285 struct drm_nouveau_private *dev_priv = ctx->dev->dev_private;
286 int i;
287
288 if (dev_priv->chipset == 0x40) {
289 cp_ctx(ctx, 0x401880, 51);
290 gr_def(ctx, 0x401940, 0x00000100);
291 } else
292 if (dev_priv->chipset == 0x46 || dev_priv->chipset == 0x47 ||
293 dev_priv->chipset == 0x49 || dev_priv->chipset == 0x4b) {
294 cp_ctx(ctx, 0x401880, 32);
295 for (i = 0; i < 16; i++)
296 gr_def(ctx, 0x401880 + (i * 4), 0x00000111);
297 if (dev_priv->chipset == 0x46)
298 cp_ctx(ctx, 0x401900, 16);
299 cp_ctx(ctx, 0x401940, 3);
300 }
301 cp_ctx(ctx, 0x40194c, 18);
302 gr_def(ctx, 0x401954, 0x00000111);
303 gr_def(ctx, 0x401958, 0x00080060);
304 gr_def(ctx, 0x401974, 0x00000080);
305 gr_def(ctx, 0x401978, 0xffff0000);
306 gr_def(ctx, 0x40197c, 0x00000001);
307 gr_def(ctx, 0x401990, 0x46400000);
308 if (dev_priv->chipset == 0x40) {
309 cp_ctx(ctx, 0x4019a0, 2);
310 cp_ctx(ctx, 0x4019ac, 5);
311 } else {
312 cp_ctx(ctx, 0x4019a0, 1);
313 cp_ctx(ctx, 0x4019b4, 3);
314 }
315 gr_def(ctx, 0x4019bc, 0xffff0000);
316 switch (dev_priv->chipset) {
317 case 0x46:
318 case 0x47:
319 case 0x49:
320 case 0x4b:
321 cp_ctx(ctx, 0x4019c0, 18);
322 for (i = 0; i < 16; i++)
323 gr_def(ctx, 0x4019c0 + (i * 4), 0x88888888);
324 break;
325 }
326 cp_ctx(ctx, 0x401a08, 8);
327 gr_def(ctx, 0x401a10, 0x0fff0000);
328 gr_def(ctx, 0x401a14, 0x0fff0000);
329 gr_def(ctx, 0x401a1c, 0x00011100);
330 cp_ctx(ctx, 0x401a2c, 4);
331 cp_ctx(ctx, 0x401a44, 26);
332 for (i = 0; i < 16; i++)
333 gr_def(ctx, 0x401a44 + (i * 4), 0x07ff0000);
334 gr_def(ctx, 0x401a8c, 0x4b7fffff);
335 if (dev_priv->chipset == 0x40) {
336 cp_ctx(ctx, 0x401ab8, 3);
337 } else {
338 cp_ctx(ctx, 0x401ab8, 1);
339 cp_ctx(ctx, 0x401ac0, 1);
340 }
341 cp_ctx(ctx, 0x401ad0, 8);
342 gr_def(ctx, 0x401ad0, 0x30201000);
343 gr_def(ctx, 0x401ad4, 0x70605040);
344 gr_def(ctx, 0x401ad8, 0xb8a89888);
345 gr_def(ctx, 0x401adc, 0xf8e8d8c8);
346 cp_ctx(ctx, 0x401b10, dev_priv->chipset == 0x40 ? 2 : 1);
347 gr_def(ctx, 0x401b10, 0x40100000);
348 cp_ctx(ctx, 0x401b18, dev_priv->chipset == 0x40 ? 6 : 5);
349 gr_def(ctx, 0x401b28, dev_priv->chipset == 0x40 ?
350 0x00000004 : 0x00000000);
351 cp_ctx(ctx, 0x401b30, 25);
352 gr_def(ctx, 0x401b34, 0x0000ffff);
353 gr_def(ctx, 0x401b68, 0x435185d6);
354 gr_def(ctx, 0x401b6c, 0x2155b699);
355 gr_def(ctx, 0x401b70, 0xfedcba98);
356 gr_def(ctx, 0x401b74, 0x00000098);
357 gr_def(ctx, 0x401b84, 0xffffffff);
358 gr_def(ctx, 0x401b88, 0x00ff7000);
359 gr_def(ctx, 0x401b8c, 0x0000ffff);
360 if (dev_priv->chipset != 0x44 && dev_priv->chipset != 0x4a &&
361 dev_priv->chipset != 0x4e)
362 cp_ctx(ctx, 0x401b94, 1);
363 cp_ctx(ctx, 0x401b98, 8);
364 gr_def(ctx, 0x401b9c, 0x00ff0000);
365 cp_ctx(ctx, 0x401bc0, 9);
366 gr_def(ctx, 0x401be0, 0x00ffff00);
367 cp_ctx(ctx, 0x401c00, 192);
368 for (i = 0; i < 16; i++) { /* fragment texture units */
369 gr_def(ctx, 0x401c40 + (i * 4), 0x00018488);
370 gr_def(ctx, 0x401c80 + (i * 4), 0x00028202);
371 gr_def(ctx, 0x401d00 + (i * 4), 0x0000aae4);
372 gr_def(ctx, 0x401d40 + (i * 4), 0x01012000);
373 gr_def(ctx, 0x401d80 + (i * 4), 0x00080008);
374 gr_def(ctx, 0x401e00 + (i * 4), 0x00100008);
375 }
376 for (i = 0; i < 4; i++) { /* vertex texture units */
377 gr_def(ctx, 0x401e90 + (i * 4), 0x0001bc80);
378 gr_def(ctx, 0x401ea0 + (i * 4), 0x00000202);
379 gr_def(ctx, 0x401ec0 + (i * 4), 0x00000008);
380 gr_def(ctx, 0x401ee0 + (i * 4), 0x00080008);
381 }
382 cp_ctx(ctx, 0x400f5c, 3);
383 gr_def(ctx, 0x400f5c, 0x00000002);
384 cp_ctx(ctx, 0x400f84, 1);
385}
386
387static void
388nv40_graph_construct_state3d_2(struct nouveau_grctx *ctx)
389{
390 struct drm_nouveau_private *dev_priv = ctx->dev->dev_private;
391 int i;
392
393 cp_ctx(ctx, 0x402000, 1);
394 cp_ctx(ctx, 0x402404, dev_priv->chipset == 0x40 ? 1 : 2);
395 switch (dev_priv->chipset) {
396 case 0x40:
397 gr_def(ctx, 0x402404, 0x00000001);
398 break;
399 case 0x4c:
400 case 0x4e:
401 case 0x67:
402 gr_def(ctx, 0x402404, 0x00000020);
403 break;
404 case 0x46:
405 case 0x49:
406 case 0x4b:
407 gr_def(ctx, 0x402404, 0x00000421);
408 break;
409 default:
410 gr_def(ctx, 0x402404, 0x00000021);
411 }
412 if (dev_priv->chipset != 0x40)
413 gr_def(ctx, 0x402408, 0x030c30c3);
414 switch (dev_priv->chipset) {
415 case 0x44:
416 case 0x46:
417 case 0x4a:
418 case 0x4c:
419 case 0x4e:
420 case 0x67:
421 cp_ctx(ctx, 0x402440, 1);
422 gr_def(ctx, 0x402440, 0x00011001);
423 break;
424 default:
425 break;
426 }
427 cp_ctx(ctx, 0x402480, dev_priv->chipset == 0x40 ? 8 : 9);
428 gr_def(ctx, 0x402488, 0x3e020200);
429 gr_def(ctx, 0x40248c, 0x00ffffff);
430 switch (dev_priv->chipset) {
431 case 0x40:
432 gr_def(ctx, 0x402490, 0x60103f00);
433 break;
434 case 0x47:
435 gr_def(ctx, 0x402490, 0x40103f00);
436 break;
437 case 0x41:
438 case 0x42:
439 case 0x49:
440 case 0x4b:
441 gr_def(ctx, 0x402490, 0x20103f00);
442 break;
443 default:
444 gr_def(ctx, 0x402490, 0x0c103f00);
445 break;
446 }
447 gr_def(ctx, 0x40249c, dev_priv->chipset <= 0x43 ?
448 0x00020000 : 0x00040000);
449 cp_ctx(ctx, 0x402500, 31);
450 gr_def(ctx, 0x402530, 0x00008100);
451 if (dev_priv->chipset == 0x40)
452 cp_ctx(ctx, 0x40257c, 6);
453 cp_ctx(ctx, 0x402594, 16);
454 cp_ctx(ctx, 0x402800, 17);
455 gr_def(ctx, 0x402800, 0x00000001);
456 switch (dev_priv->chipset) {
457 case 0x47:
458 case 0x49:
459 case 0x4b:
460 cp_ctx(ctx, 0x402864, 1);
461 gr_def(ctx, 0x402864, 0x00001001);
462 cp_ctx(ctx, 0x402870, 3);
463 gr_def(ctx, 0x402878, 0x00000003);
464 if (dev_priv->chipset != 0x47) { /* belong at end!! */
465 cp_ctx(ctx, 0x402900, 1);
466 cp_ctx(ctx, 0x402940, 1);
467 cp_ctx(ctx, 0x402980, 1);
468 cp_ctx(ctx, 0x4029c0, 1);
469 cp_ctx(ctx, 0x402a00, 1);
470 cp_ctx(ctx, 0x402a40, 1);
471 cp_ctx(ctx, 0x402a80, 1);
472 cp_ctx(ctx, 0x402ac0, 1);
473 }
474 break;
475 case 0x40:
476 cp_ctx(ctx, 0x402844, 1);
477 gr_def(ctx, 0x402844, 0x00000001);
478 cp_ctx(ctx, 0x402850, 1);
479 break;
480 default:
481 cp_ctx(ctx, 0x402844, 1);
482 gr_def(ctx, 0x402844, 0x00001001);
483 cp_ctx(ctx, 0x402850, 2);
484 gr_def(ctx, 0x402854, 0x00000003);
485 break;
486 }
487
488 cp_ctx(ctx, 0x402c00, 4);
489 gr_def(ctx, 0x402c00, dev_priv->chipset == 0x40 ?
490 0x80800001 : 0x00888001);
491 switch (dev_priv->chipset) {
492 case 0x47:
493 case 0x49:
494 case 0x4b:
495 cp_ctx(ctx, 0x402c20, 40);
496 for (i = 0; i < 32; i++)
497 gr_def(ctx, 0x402c40 + (i * 4), 0xffffffff);
498 cp_ctx(ctx, 0x4030b8, 13);
499 gr_def(ctx, 0x4030dc, 0x00000005);
500 gr_def(ctx, 0x4030e8, 0x0000ffff);
501 break;
502 default:
503 cp_ctx(ctx, 0x402c10, 4);
504 if (dev_priv->chipset == 0x40)
505 cp_ctx(ctx, 0x402c20, 36);
506 else
507 if (dev_priv->chipset <= 0x42)
508 cp_ctx(ctx, 0x402c20, 24);
509 else
510 if (dev_priv->chipset <= 0x4a)
511 cp_ctx(ctx, 0x402c20, 16);
512 else
513 cp_ctx(ctx, 0x402c20, 8);
514 cp_ctx(ctx, 0x402cb0, dev_priv->chipset == 0x40 ? 12 : 13);
515 gr_def(ctx, 0x402cd4, 0x00000005);
516 if (dev_priv->chipset != 0x40)
517 gr_def(ctx, 0x402ce0, 0x0000ffff);
518 break;
519 }
520
521 cp_ctx(ctx, 0x403400, dev_priv->chipset == 0x40 ? 4 : 3);
522 cp_ctx(ctx, 0x403410, dev_priv->chipset == 0x40 ? 4 : 3);
523 cp_ctx(ctx, 0x403420, nv40_graph_vs_count(ctx->dev));
524 for (i = 0; i < nv40_graph_vs_count(ctx->dev); i++)
525 gr_def(ctx, 0x403420 + (i * 4), 0x00005555);
526
527 if (dev_priv->chipset != 0x40) {
528 cp_ctx(ctx, 0x403600, 1);
529 gr_def(ctx, 0x403600, 0x00000001);
530 }
531 cp_ctx(ctx, 0x403800, 1);
532
533 cp_ctx(ctx, 0x403c18, 1);
534 gr_def(ctx, 0x403c18, 0x00000001);
535 switch (dev_priv->chipset) {
536 case 0x46:
537 case 0x47:
538 case 0x49:
539 case 0x4b:
540 cp_ctx(ctx, 0x405018, 1);
541 gr_def(ctx, 0x405018, 0x08e00001);
542 cp_ctx(ctx, 0x405c24, 1);
543 gr_def(ctx, 0x405c24, 0x000e3000);
544 break;
545 }
546 if (dev_priv->chipset != 0x4e)
547 cp_ctx(ctx, 0x405800, 11);
548 cp_ctx(ctx, 0x407000, 1);
549}
550
551static void
552nv40_graph_construct_state3d_3(struct nouveau_grctx *ctx)
553{
554 int len = nv40_graph_4097(ctx->dev) ? 0x0684 : 0x0084;
555
556 cp_out (ctx, 0x300000);
557 cp_lsr (ctx, len - 4);
558 cp_bra (ctx, SWAP_DIRECTION, SAVE, cp_swap_state3d_3_is_save);
559 cp_lsr (ctx, len);
560 cp_name(ctx, cp_swap_state3d_3_is_save);
561 cp_out (ctx, 0x800001);
562
563 ctx->ctxvals_pos += len;
564}
565
566static void
567nv40_graph_construct_shader(struct nouveau_grctx *ctx)
568{
569 struct drm_device *dev = ctx->dev;
570 struct drm_nouveau_private *dev_priv = dev->dev_private;
571 struct nouveau_gpuobj *obj = ctx->data;
572 int vs, vs_nr, vs_len, vs_nr_b0, vs_nr_b1, b0_offset, b1_offset;
573 int offset, i;
574
575 vs_nr = nv40_graph_vs_count(ctx->dev);
576 vs_nr_b0 = 363;
577 vs_nr_b1 = dev_priv->chipset == 0x40 ? 128 : 64;
578 if (dev_priv->chipset == 0x40) {
579 b0_offset = 0x2200/4; /* 33a0 */
580 b1_offset = 0x55a0/4; /* 1500 */
581 vs_len = 0x6aa0/4;
582 } else
583 if (dev_priv->chipset == 0x41 || dev_priv->chipset == 0x42) {
584 b0_offset = 0x2200/4; /* 2200 */
585 b1_offset = 0x4400/4; /* 0b00 */
586 vs_len = 0x4f00/4;
587 } else {
588 b0_offset = 0x1d40/4; /* 2200 */
589 b1_offset = 0x3f40/4; /* 0b00 : 0a40 */
590 vs_len = nv40_graph_4097(dev) ? 0x4a40/4 : 0x4980/4;
591 }
592
593 cp_lsr(ctx, vs_len * vs_nr + 0x300/4);
594 cp_out(ctx, nv40_graph_4097(dev) ? 0x800041 : 0x800029);
595
596 offset = ctx->ctxvals_pos;
597 ctx->ctxvals_pos += (0x0300/4 + (vs_nr * vs_len));
598
599 if (ctx->mode != NOUVEAU_GRCTX_VALS)
600 return;
601
602 offset += 0x0280/4;
603 for (i = 0; i < 16; i++, offset += 2)
604 nv_wo32(dev, obj, offset, 0x3f800000);
605
606 for (vs = 0; vs < vs_nr; vs++, offset += vs_len) {
607 for (i = 0; i < vs_nr_b0 * 6; i += 6)
608 nv_wo32(dev, obj, offset + b0_offset + i, 0x00000001);
609 for (i = 0; i < vs_nr_b1 * 4; i += 4)
610 nv_wo32(dev, obj, offset + b1_offset + i, 0x3f800000);
611 }
612}
613
614void
615nv40_grctx_init(struct nouveau_grctx *ctx)
616{
617 /* decide whether we're loading/unloading the context */
618 cp_bra (ctx, AUTO_SAVE, PENDING, cp_setup_save);
619 cp_bra (ctx, USER_SAVE, PENDING, cp_setup_save);
620
621 cp_name(ctx, cp_check_load);
622 cp_bra (ctx, AUTO_LOAD, PENDING, cp_setup_auto_load);
623 cp_bra (ctx, USER_LOAD, PENDING, cp_setup_load);
624 cp_bra (ctx, ALWAYS, TRUE, cp_exit);
625
626 /* setup for context load */
627 cp_name(ctx, cp_setup_auto_load);
628 cp_wait(ctx, STATUS, IDLE);
629 cp_out (ctx, CP_NEXT_TO_SWAP);
630 cp_name(ctx, cp_setup_load);
631 cp_wait(ctx, STATUS, IDLE);
632 cp_set (ctx, SWAP_DIRECTION, LOAD);
633 cp_out (ctx, 0x00910880); /* ?? */
634 cp_out (ctx, 0x00901ffe); /* ?? */
635 cp_out (ctx, 0x01940000); /* ?? */
636 cp_lsr (ctx, 0x20);
637 cp_out (ctx, 0x0060000b); /* ?? */
638 cp_wait(ctx, UNK57, CLEAR);
639 cp_out (ctx, 0x0060000c); /* ?? */
640 cp_bra (ctx, ALWAYS, TRUE, cp_swap_state);
641
642 /* setup for context save */
643 cp_name(ctx, cp_setup_save);
644 cp_set (ctx, SWAP_DIRECTION, SAVE);
645
646 /* general PGRAPH state */
647 cp_name(ctx, cp_swap_state);
648 cp_pos (ctx, 0x00020/4);
649 nv40_graph_construct_general(ctx);
650 cp_wait(ctx, STATUS, IDLE);
651
652 /* 3D state, block 1 */
653 cp_bra (ctx, UNK54, CLEAR, cp_prepare_exit);
654 nv40_graph_construct_state3d(ctx);
655 cp_wait(ctx, STATUS, IDLE);
656
657 /* 3D state, block 2 */
658 nv40_graph_construct_state3d_2(ctx);
659
660 /* Some other block of "random" state */
661 nv40_graph_construct_state3d_3(ctx);
662
663 /* Per-vertex shader state */
664 cp_pos (ctx, ctx->ctxvals_pos);
665 nv40_graph_construct_shader(ctx);
666
667 /* pre-exit state updates */
668 cp_name(ctx, cp_prepare_exit);
669 cp_bra (ctx, SWAP_DIRECTION, SAVE, cp_check_load);
670 cp_bra (ctx, USER_SAVE, PENDING, cp_exit);
671 cp_out (ctx, CP_NEXT_TO_CURRENT);
672
673 cp_name(ctx, cp_exit);
674 cp_set (ctx, USER_SAVE, NOT_PENDING);
675 cp_set (ctx, USER_LOAD, NOT_PENDING);
676 cp_out (ctx, CP_END);
677}
678
diff --git a/drivers/gpu/drm/nouveau/nv50_crtc.c b/drivers/gpu/drm/nouveau/nv50_crtc.c
index f8e28a1e44e7..d1a651e3400c 100644
--- a/drivers/gpu/drm/nouveau/nv50_crtc.c
+++ b/drivers/gpu/drm/nouveau/nv50_crtc.c
@@ -45,7 +45,7 @@ nv50_crtc_lut_load(struct drm_crtc *crtc)
45 void __iomem *lut = nvbo_kmap_obj_iovirtual(nv_crtc->lut.nvbo); 45 void __iomem *lut = nvbo_kmap_obj_iovirtual(nv_crtc->lut.nvbo);
46 int i; 46 int i;
47 47
48 NV_DEBUG(crtc->dev, "\n"); 48 NV_DEBUG_KMS(crtc->dev, "\n");
49 49
50 for (i = 0; i < 256; i++) { 50 for (i = 0; i < 256; i++) {
51 writew(nv_crtc->lut.r[i] >> 2, lut + 8*i + 0); 51 writew(nv_crtc->lut.r[i] >> 2, lut + 8*i + 0);
@@ -68,8 +68,8 @@ nv50_crtc_blank(struct nouveau_crtc *nv_crtc, bool blanked)
68 struct nouveau_channel *evo = dev_priv->evo; 68 struct nouveau_channel *evo = dev_priv->evo;
69 int index = nv_crtc->index, ret; 69 int index = nv_crtc->index, ret;
70 70
71 NV_DEBUG(dev, "index %d\n", nv_crtc->index); 71 NV_DEBUG_KMS(dev, "index %d\n", nv_crtc->index);
72 NV_DEBUG(dev, "%s\n", blanked ? "blanked" : "unblanked"); 72 NV_DEBUG_KMS(dev, "%s\n", blanked ? "blanked" : "unblanked");
73 73
74 if (blanked) { 74 if (blanked) {
75 nv_crtc->cursor.hide(nv_crtc, false); 75 nv_crtc->cursor.hide(nv_crtc, false);
@@ -139,7 +139,7 @@ nv50_crtc_set_dither(struct nouveau_crtc *nv_crtc, bool on, bool update)
139 struct nouveau_channel *evo = dev_priv->evo; 139 struct nouveau_channel *evo = dev_priv->evo;
140 int ret; 140 int ret;
141 141
142 NV_DEBUG(dev, "\n"); 142 NV_DEBUG_KMS(dev, "\n");
143 143
144 ret = RING_SPACE(evo, 2 + (update ? 2 : 0)); 144 ret = RING_SPACE(evo, 2 + (update ? 2 : 0));
145 if (ret) { 145 if (ret) {
@@ -193,7 +193,7 @@ nv50_crtc_set_scale(struct nouveau_crtc *nv_crtc, int scaling_mode, bool update)
193 uint32_t outX, outY, horiz, vert; 193 uint32_t outX, outY, horiz, vert;
194 int ret; 194 int ret;
195 195
196 NV_DEBUG(dev, "\n"); 196 NV_DEBUG_KMS(dev, "\n");
197 197
198 switch (scaling_mode) { 198 switch (scaling_mode) {
199 case DRM_MODE_SCALE_NONE: 199 case DRM_MODE_SCALE_NONE:
@@ -298,14 +298,17 @@ nv50_crtc_set_clock(struct drm_device *dev, int head, int pclk)
298static void 298static void
299nv50_crtc_destroy(struct drm_crtc *crtc) 299nv50_crtc_destroy(struct drm_crtc *crtc)
300{ 300{
301 struct drm_device *dev = crtc->dev; 301 struct drm_device *dev;
302 struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc); 302 struct nouveau_crtc *nv_crtc;
303
304 NV_DEBUG(dev, "\n");
305 303
306 if (!crtc) 304 if (!crtc)
307 return; 305 return;
308 306
307 dev = crtc->dev;
308 nv_crtc = nouveau_crtc(crtc);
309
310 NV_DEBUG_KMS(dev, "\n");
311
309 drm_crtc_cleanup(&nv_crtc->base); 312 drm_crtc_cleanup(&nv_crtc->base);
310 313
311 nv50_cursor_fini(nv_crtc); 314 nv50_cursor_fini(nv_crtc);
@@ -432,16 +435,36 @@ nv50_crtc_prepare(struct drm_crtc *crtc)
432 struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc); 435 struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
433 struct drm_device *dev = crtc->dev; 436 struct drm_device *dev = crtc->dev;
434 struct drm_encoder *encoder; 437 struct drm_encoder *encoder;
438 uint32_t dac = 0, sor = 0;
435 439
436 NV_DEBUG(dev, "index %d\n", nv_crtc->index); 440 NV_DEBUG_KMS(dev, "index %d\n", nv_crtc->index);
437 441
438 /* Disconnect all unused encoders. */ 442 /* Disconnect all unused encoders. */
439 list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) { 443 list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
440 struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder); 444 struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
441 445
442 if (drm_helper_encoder_in_use(encoder)) 446 if (!drm_helper_encoder_in_use(encoder))
443 continue; 447 continue;
444 448
449 if (nv_encoder->dcb->type == OUTPUT_ANALOG ||
450 nv_encoder->dcb->type == OUTPUT_TV)
451 dac |= (1 << nv_encoder->or);
452 else
453 sor |= (1 << nv_encoder->or);
454 }
455
456 list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
457 struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
458
459 if (nv_encoder->dcb->type == OUTPUT_ANALOG ||
460 nv_encoder->dcb->type == OUTPUT_TV) {
461 if (dac & (1 << nv_encoder->or))
462 continue;
463 } else {
464 if (sor & (1 << nv_encoder->or))
465 continue;
466 }
467
445 nv_encoder->disconnect(nv_encoder); 468 nv_encoder->disconnect(nv_encoder);
446 } 469 }
447 470
@@ -458,7 +481,7 @@ nv50_crtc_commit(struct drm_crtc *crtc)
458 struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc); 481 struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
459 int ret; 482 int ret;
460 483
461 NV_DEBUG(dev, "index %d\n", nv_crtc->index); 484 NV_DEBUG_KMS(dev, "index %d\n", nv_crtc->index);
462 485
463 nv50_crtc_blank(nv_crtc, false); 486 nv50_crtc_blank(nv_crtc, false);
464 487
@@ -497,7 +520,7 @@ nv50_crtc_do_mode_set_base(struct drm_crtc *crtc, int x, int y,
497 struct nouveau_framebuffer *fb = nouveau_framebuffer(drm_fb); 520 struct nouveau_framebuffer *fb = nouveau_framebuffer(drm_fb);
498 int ret, format; 521 int ret, format;
499 522
500 NV_DEBUG(dev, "index %d\n", nv_crtc->index); 523 NV_DEBUG_KMS(dev, "index %d\n", nv_crtc->index);
501 524
502 switch (drm_fb->depth) { 525 switch (drm_fb->depth) {
503 case 8: 526 case 8:
@@ -612,7 +635,7 @@ nv50_crtc_mode_set(struct drm_crtc *crtc, struct drm_display_mode *mode,
612 635
613 *nv_crtc->mode = *adjusted_mode; 636 *nv_crtc->mode = *adjusted_mode;
614 637
615 NV_DEBUG(dev, "index %d\n", nv_crtc->index); 638 NV_DEBUG_KMS(dev, "index %d\n", nv_crtc->index);
616 639
617 hsync_dur = adjusted_mode->hsync_end - adjusted_mode->hsync_start; 640 hsync_dur = adjusted_mode->hsync_end - adjusted_mode->hsync_start;
618 vsync_dur = adjusted_mode->vsync_end - adjusted_mode->vsync_start; 641 vsync_dur = adjusted_mode->vsync_end - adjusted_mode->vsync_start;
@@ -706,7 +729,7 @@ nv50_crtc_create(struct drm_device *dev, int index)
706 struct nouveau_crtc *nv_crtc = NULL; 729 struct nouveau_crtc *nv_crtc = NULL;
707 int ret, i; 730 int ret, i;
708 731
709 NV_DEBUG(dev, "\n"); 732 NV_DEBUG_KMS(dev, "\n");
710 733
711 nv_crtc = kzalloc(sizeof(*nv_crtc), GFP_KERNEL); 734 nv_crtc = kzalloc(sizeof(*nv_crtc), GFP_KERNEL);
712 if (!nv_crtc) 735 if (!nv_crtc)
diff --git a/drivers/gpu/drm/nouveau/nv50_cursor.c b/drivers/gpu/drm/nouveau/nv50_cursor.c
index e2e79a8f220d..753e723adb3a 100644
--- a/drivers/gpu/drm/nouveau/nv50_cursor.c
+++ b/drivers/gpu/drm/nouveau/nv50_cursor.c
@@ -41,7 +41,7 @@ nv50_cursor_show(struct nouveau_crtc *nv_crtc, bool update)
41 struct drm_device *dev = nv_crtc->base.dev; 41 struct drm_device *dev = nv_crtc->base.dev;
42 int ret; 42 int ret;
43 43
44 NV_DEBUG(dev, "\n"); 44 NV_DEBUG_KMS(dev, "\n");
45 45
46 if (update && nv_crtc->cursor.visible) 46 if (update && nv_crtc->cursor.visible)
47 return; 47 return;
@@ -76,7 +76,7 @@ nv50_cursor_hide(struct nouveau_crtc *nv_crtc, bool update)
76 struct drm_device *dev = nv_crtc->base.dev; 76 struct drm_device *dev = nv_crtc->base.dev;
77 int ret; 77 int ret;
78 78
79 NV_DEBUG(dev, "\n"); 79 NV_DEBUG_KMS(dev, "\n");
80 80
81 if (update && !nv_crtc->cursor.visible) 81 if (update && !nv_crtc->cursor.visible)
82 return; 82 return;
@@ -116,7 +116,7 @@ nv50_cursor_set_pos(struct nouveau_crtc *nv_crtc, int x, int y)
116static void 116static void
117nv50_cursor_set_offset(struct nouveau_crtc *nv_crtc, uint32_t offset) 117nv50_cursor_set_offset(struct nouveau_crtc *nv_crtc, uint32_t offset)
118{ 118{
119 NV_DEBUG(nv_crtc->base.dev, "\n"); 119 NV_DEBUG_KMS(nv_crtc->base.dev, "\n");
120 if (offset == nv_crtc->cursor.offset) 120 if (offset == nv_crtc->cursor.offset)
121 return; 121 return;
122 122
@@ -143,7 +143,7 @@ nv50_cursor_fini(struct nouveau_crtc *nv_crtc)
143 struct drm_device *dev = nv_crtc->base.dev; 143 struct drm_device *dev = nv_crtc->base.dev;
144 int idx = nv_crtc->index; 144 int idx = nv_crtc->index;
145 145
146 NV_DEBUG(dev, "\n"); 146 NV_DEBUG_KMS(dev, "\n");
147 147
148 nv_wr32(dev, NV50_PDISPLAY_CURSOR_CURSOR_CTRL2(idx), 0); 148 nv_wr32(dev, NV50_PDISPLAY_CURSOR_CURSOR_CTRL2(idx), 0);
149 if (!nv_wait(NV50_PDISPLAY_CURSOR_CURSOR_CTRL2(idx), 149 if (!nv_wait(NV50_PDISPLAY_CURSOR_CURSOR_CTRL2(idx),
diff --git a/drivers/gpu/drm/nouveau/nv50_dac.c b/drivers/gpu/drm/nouveau/nv50_dac.c
index fb5838e3be24..f08f042a8e10 100644
--- a/drivers/gpu/drm/nouveau/nv50_dac.c
+++ b/drivers/gpu/drm/nouveau/nv50_dac.c
@@ -44,7 +44,7 @@ nv50_dac_disconnect(struct nouveau_encoder *nv_encoder)
44 struct nouveau_channel *evo = dev_priv->evo; 44 struct nouveau_channel *evo = dev_priv->evo;
45 int ret; 45 int ret;
46 46
47 NV_DEBUG(dev, "Disconnecting DAC %d\n", nv_encoder->or); 47 NV_DEBUG_KMS(dev, "Disconnecting DAC %d\n", nv_encoder->or);
48 48
49 ret = RING_SPACE(evo, 2); 49 ret = RING_SPACE(evo, 2);
50 if (ret) { 50 if (ret) {
@@ -81,11 +81,11 @@ nv50_dac_detect(struct drm_encoder *encoder, struct drm_connector *connector)
81 /* Use bios provided value if possible. */ 81 /* Use bios provided value if possible. */
82 if (dev_priv->vbios->dactestval) { 82 if (dev_priv->vbios->dactestval) {
83 load_pattern = dev_priv->vbios->dactestval; 83 load_pattern = dev_priv->vbios->dactestval;
84 NV_DEBUG(dev, "Using bios provided load_pattern of %d\n", 84 NV_DEBUG_KMS(dev, "Using bios provided load_pattern of %d\n",
85 load_pattern); 85 load_pattern);
86 } else { 86 } else {
87 load_pattern = 340; 87 load_pattern = 340;
88 NV_DEBUG(dev, "Using default load_pattern of %d\n", 88 NV_DEBUG_KMS(dev, "Using default load_pattern of %d\n",
89 load_pattern); 89 load_pattern);
90 } 90 }
91 91
@@ -103,9 +103,9 @@ nv50_dac_detect(struct drm_encoder *encoder, struct drm_connector *connector)
103 status = connector_status_connected; 103 status = connector_status_connected;
104 104
105 if (status == connector_status_connected) 105 if (status == connector_status_connected)
106 NV_DEBUG(dev, "Load was detected on output with or %d\n", or); 106 NV_DEBUG_KMS(dev, "Load was detected on output with or %d\n", or);
107 else 107 else
108 NV_DEBUG(dev, "Load was not detected on output with or %d\n", or); 108 NV_DEBUG_KMS(dev, "Load was not detected on output with or %d\n", or);
109 109
110 return status; 110 return status;
111} 111}
@@ -118,7 +118,7 @@ nv50_dac_dpms(struct drm_encoder *encoder, int mode)
118 uint32_t val; 118 uint32_t val;
119 int or = nv_encoder->or; 119 int or = nv_encoder->or;
120 120
121 NV_DEBUG(dev, "or %d mode %d\n", or, mode); 121 NV_DEBUG_KMS(dev, "or %d mode %d\n", or, mode);
122 122
123 /* wait for it to be done */ 123 /* wait for it to be done */
124 if (!nv_wait(NV50_PDISPLAY_DAC_DPMS_CTRL(or), 124 if (!nv_wait(NV50_PDISPLAY_DAC_DPMS_CTRL(or),
@@ -173,7 +173,7 @@ nv50_dac_mode_fixup(struct drm_encoder *encoder, struct drm_display_mode *mode,
173 struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder); 173 struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
174 struct nouveau_connector *connector; 174 struct nouveau_connector *connector;
175 175
176 NV_DEBUG(encoder->dev, "or %d\n", nv_encoder->or); 176 NV_DEBUG_KMS(encoder->dev, "or %d\n", nv_encoder->or);
177 177
178 connector = nouveau_encoder_connector_get(nv_encoder); 178 connector = nouveau_encoder_connector_get(nv_encoder);
179 if (!connector) { 179 if (!connector) {
@@ -213,7 +213,7 @@ nv50_dac_mode_set(struct drm_encoder *encoder, struct drm_display_mode *mode,
213 uint32_t mode_ctl = 0, mode_ctl2 = 0; 213 uint32_t mode_ctl = 0, mode_ctl2 = 0;
214 int ret; 214 int ret;
215 215
216 NV_DEBUG(dev, "or %d\n", nv_encoder->or); 216 NV_DEBUG_KMS(dev, "or %d\n", nv_encoder->or);
217 217
218 nv50_dac_dpms(encoder, DRM_MODE_DPMS_ON); 218 nv50_dac_dpms(encoder, DRM_MODE_DPMS_ON);
219 219
@@ -264,7 +264,7 @@ nv50_dac_destroy(struct drm_encoder *encoder)
264 if (!encoder) 264 if (!encoder)
265 return; 265 return;
266 266
267 NV_DEBUG(encoder->dev, "\n"); 267 NV_DEBUG_KMS(encoder->dev, "\n");
268 268
269 drm_encoder_cleanup(encoder); 269 drm_encoder_cleanup(encoder);
270 kfree(nv_encoder); 270 kfree(nv_encoder);
@@ -280,7 +280,7 @@ nv50_dac_create(struct drm_device *dev, struct dcb_entry *entry)
280 struct nouveau_encoder *nv_encoder; 280 struct nouveau_encoder *nv_encoder;
281 struct drm_encoder *encoder; 281 struct drm_encoder *encoder;
282 282
283 NV_DEBUG(dev, "\n"); 283 NV_DEBUG_KMS(dev, "\n");
284 NV_INFO(dev, "Detected a DAC output\n"); 284 NV_INFO(dev, "Detected a DAC output\n");
285 285
286 nv_encoder = kzalloc(sizeof(*nv_encoder), GFP_KERNEL); 286 nv_encoder = kzalloc(sizeof(*nv_encoder), GFP_KERNEL);
diff --git a/drivers/gpu/drm/nouveau/nv50_display.c b/drivers/gpu/drm/nouveau/nv50_display.c
index 12c5ee63495b..90f0bf59fbcd 100644
--- a/drivers/gpu/drm/nouveau/nv50_display.c
+++ b/drivers/gpu/drm/nouveau/nv50_display.c
@@ -188,7 +188,7 @@ nv50_display_init(struct drm_device *dev)
188 uint64_t start; 188 uint64_t start;
189 int ret, i; 189 int ret, i;
190 190
191 NV_DEBUG(dev, "\n"); 191 NV_DEBUG_KMS(dev, "\n");
192 192
193 nv_wr32(dev, 0x00610184, nv_rd32(dev, 0x00614004)); 193 nv_wr32(dev, 0x00610184, nv_rd32(dev, 0x00614004));
194 /* 194 /*
@@ -232,7 +232,7 @@ nv50_display_init(struct drm_device *dev)
232 nv_wr32(dev, NV50_PDISPLAY_UNK_380, 0); 232 nv_wr32(dev, NV50_PDISPLAY_UNK_380, 0);
233 /* RAM is clamped to 256 MiB. */ 233 /* RAM is clamped to 256 MiB. */
234 ram_amount = nouveau_mem_fb_amount(dev); 234 ram_amount = nouveau_mem_fb_amount(dev);
235 NV_DEBUG(dev, "ram_amount %d\n", ram_amount); 235 NV_DEBUG_KMS(dev, "ram_amount %d\n", ram_amount);
236 if (ram_amount > 256*1024*1024) 236 if (ram_amount > 256*1024*1024)
237 ram_amount = 256*1024*1024; 237 ram_amount = 256*1024*1024;
238 nv_wr32(dev, NV50_PDISPLAY_RAM_AMOUNT, ram_amount - 1); 238 nv_wr32(dev, NV50_PDISPLAY_RAM_AMOUNT, ram_amount - 1);
@@ -398,7 +398,7 @@ static int nv50_display_disable(struct drm_device *dev)
398 struct drm_crtc *drm_crtc; 398 struct drm_crtc *drm_crtc;
399 int ret, i; 399 int ret, i;
400 400
401 NV_DEBUG(dev, "\n"); 401 NV_DEBUG_KMS(dev, "\n");
402 402
403 list_for_each_entry(drm_crtc, &dev->mode_config.crtc_list, head) { 403 list_for_each_entry(drm_crtc, &dev->mode_config.crtc_list, head) {
404 struct nouveau_crtc *crtc = nouveau_crtc(drm_crtc); 404 struct nouveau_crtc *crtc = nouveau_crtc(drm_crtc);
@@ -469,7 +469,7 @@ int nv50_display_create(struct drm_device *dev)
469 uint32_t connector[16] = {}; 469 uint32_t connector[16] = {};
470 int ret, i; 470 int ret, i;
471 471
472 NV_DEBUG(dev, "\n"); 472 NV_DEBUG_KMS(dev, "\n");
473 473
474 /* init basic kernel modesetting */ 474 /* init basic kernel modesetting */
475 drm_mode_config_init(dev); 475 drm_mode_config_init(dev);
@@ -573,7 +573,7 @@ int nv50_display_destroy(struct drm_device *dev)
573{ 573{
574 struct drm_nouveau_private *dev_priv = dev->dev_private; 574 struct drm_nouveau_private *dev_priv = dev->dev_private;
575 575
576 NV_DEBUG(dev, "\n"); 576 NV_DEBUG_KMS(dev, "\n");
577 577
578 drm_mode_config_cleanup(dev); 578 drm_mode_config_cleanup(dev);
579 579
@@ -617,7 +617,7 @@ nv50_display_irq_head(struct drm_device *dev, int *phead,
617 * CRTC separately, and submission will be blocked by the GPU 617 * CRTC separately, and submission will be blocked by the GPU
618 * until we handle each in turn. 618 * until we handle each in turn.
619 */ 619 */
620 NV_DEBUG(dev, "0x610030: 0x%08x\n", unk30); 620 NV_DEBUG_KMS(dev, "0x610030: 0x%08x\n", unk30);
621 head = ffs((unk30 >> 9) & 3) - 1; 621 head = ffs((unk30 >> 9) & 3) - 1;
622 if (head < 0) 622 if (head < 0)
623 return -EINVAL; 623 return -EINVAL;
@@ -661,7 +661,7 @@ nv50_display_irq_head(struct drm_device *dev, int *phead,
661 or = i; 661 or = i;
662 } 662 }
663 663
664 NV_DEBUG(dev, "type %d, or %d\n", type, or); 664 NV_DEBUG_KMS(dev, "type %d, or %d\n", type, or);
665 if (type == OUTPUT_ANY) { 665 if (type == OUTPUT_ANY) {
666 NV_ERROR(dev, "unknown encoder!!\n"); 666 NV_ERROR(dev, "unknown encoder!!\n");
667 return -1; 667 return -1;
@@ -690,9 +690,21 @@ nv50_display_script_select(struct drm_device *dev, struct dcb_entry *dcbent,
690 int pxclk) 690 int pxclk)
691{ 691{
692 struct drm_nouveau_private *dev_priv = dev->dev_private; 692 struct drm_nouveau_private *dev_priv = dev->dev_private;
693 struct nouveau_connector *nv_connector = NULL;
694 struct drm_encoder *encoder;
693 struct nvbios *bios = &dev_priv->VBIOS; 695 struct nvbios *bios = &dev_priv->VBIOS;
694 uint32_t mc, script = 0, or; 696 uint32_t mc, script = 0, or;
695 697
698 list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
699 struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
700
701 if (nv_encoder->dcb != dcbent)
702 continue;
703
704 nv_connector = nouveau_encoder_connector_get(nv_encoder);
705 break;
706 }
707
696 or = ffs(dcbent->or) - 1; 708 or = ffs(dcbent->or) - 1;
697 mc = nv50_display_mode_ctrl(dev, dcbent->type != OUTPUT_ANALOG, or); 709 mc = nv50_display_mode_ctrl(dev, dcbent->type != OUTPUT_ANALOG, or);
698 switch (dcbent->type) { 710 switch (dcbent->type) {
@@ -711,6 +723,11 @@ nv50_display_script_select(struct drm_device *dev, struct dcb_entry *dcbent,
711 } else 723 } else
712 if (bios->fp.strapless_is_24bit & 1) 724 if (bios->fp.strapless_is_24bit & 1)
713 script |= 0x0200; 725 script |= 0x0200;
726
727 if (nv_connector && nv_connector->edid &&
728 (nv_connector->edid->revision >= 4) &&
729 (nv_connector->edid->input & 0x70) >= 0x20)
730 script |= 0x0200;
714 } 731 }
715 732
716 if (nouveau_uscript_lvds >= 0) { 733 if (nouveau_uscript_lvds >= 0) {
@@ -811,7 +828,7 @@ nv50_display_unk20_handler(struct drm_device *dev)
811 pclk = nv_rd32(dev, NV50_PDISPLAY_CRTC_P(head, CLOCK)) & 0x3fffff; 828 pclk = nv_rd32(dev, NV50_PDISPLAY_CRTC_P(head, CLOCK)) & 0x3fffff;
812 script = nv50_display_script_select(dev, dcbent, pclk); 829 script = nv50_display_script_select(dev, dcbent, pclk);
813 830
814 NV_DEBUG(dev, "head %d pxclk: %dKHz\n", head, pclk); 831 NV_DEBUG_KMS(dev, "head %d pxclk: %dKHz\n", head, pclk);
815 832
816 if (dcbent->type != OUTPUT_DP) 833 if (dcbent->type != OUTPUT_DP)
817 nouveau_bios_run_display_table(dev, dcbent, 0, -2); 834 nouveau_bios_run_display_table(dev, dcbent, 0, -2);
@@ -870,7 +887,7 @@ nv50_display_irq_handler_bh(struct work_struct *work)
870 uint32_t intr0 = nv_rd32(dev, NV50_PDISPLAY_INTR_0); 887 uint32_t intr0 = nv_rd32(dev, NV50_PDISPLAY_INTR_0);
871 uint32_t intr1 = nv_rd32(dev, NV50_PDISPLAY_INTR_1); 888 uint32_t intr1 = nv_rd32(dev, NV50_PDISPLAY_INTR_1);
872 889
873 NV_DEBUG(dev, "PDISPLAY_INTR_BH 0x%08x 0x%08x\n", intr0, intr1); 890 NV_DEBUG_KMS(dev, "PDISPLAY_INTR_BH 0x%08x 0x%08x\n", intr0, intr1);
874 891
875 if (intr1 & NV50_PDISPLAY_INTR_1_CLK_UNK10) 892 if (intr1 & NV50_PDISPLAY_INTR_1_CLK_UNK10)
876 nv50_display_unk10_handler(dev); 893 nv50_display_unk10_handler(dev);
@@ -974,7 +991,7 @@ nv50_display_irq_handler(struct drm_device *dev)
974 uint32_t intr1 = nv_rd32(dev, NV50_PDISPLAY_INTR_1); 991 uint32_t intr1 = nv_rd32(dev, NV50_PDISPLAY_INTR_1);
975 uint32_t clock; 992 uint32_t clock;
976 993
977 NV_DEBUG(dev, "PDISPLAY_INTR 0x%08x 0x%08x\n", intr0, intr1); 994 NV_DEBUG_KMS(dev, "PDISPLAY_INTR 0x%08x 0x%08x\n", intr0, intr1);
978 995
979 if (!intr0 && !(intr1 & ~delayed)) 996 if (!intr0 && !(intr1 & ~delayed))
980 break; 997 break;
diff --git a/drivers/gpu/drm/nouveau/nv50_fbcon.c b/drivers/gpu/drm/nouveau/nv50_fbcon.c
index 6bcc6d39e9b0..0f57cdf7ccb2 100644
--- a/drivers/gpu/drm/nouveau/nv50_fbcon.c
+++ b/drivers/gpu/drm/nouveau/nv50_fbcon.c
@@ -3,7 +3,7 @@
3#include "nouveau_dma.h" 3#include "nouveau_dma.h"
4#include "nouveau_fbcon.h" 4#include "nouveau_fbcon.h"
5 5
6static void 6void
7nv50_fbcon_fillrect(struct fb_info *info, const struct fb_fillrect *rect) 7nv50_fbcon_fillrect(struct fb_info *info, const struct fb_fillrect *rect)
8{ 8{
9 struct nouveau_fbcon_par *par = info->par; 9 struct nouveau_fbcon_par *par = info->par;
@@ -16,9 +16,7 @@ nv50_fbcon_fillrect(struct fb_info *info, const struct fb_fillrect *rect)
16 16
17 if (!(info->flags & FBINFO_HWACCEL_DISABLED) && 17 if (!(info->flags & FBINFO_HWACCEL_DISABLED) &&
18 RING_SPACE(chan, rect->rop == ROP_COPY ? 7 : 11)) { 18 RING_SPACE(chan, rect->rop == ROP_COPY ? 7 : 11)) {
19 NV_ERROR(dev, "GPU lockup - switching to software fbcon\n"); 19 nouveau_fbcon_gpu_lockup(info);
20
21 info->flags |= FBINFO_HWACCEL_DISABLED;
22 } 20 }
23 21
24 if (info->flags & FBINFO_HWACCEL_DISABLED) { 22 if (info->flags & FBINFO_HWACCEL_DISABLED) {
@@ -31,7 +29,11 @@ nv50_fbcon_fillrect(struct fb_info *info, const struct fb_fillrect *rect)
31 OUT_RING(chan, 1); 29 OUT_RING(chan, 1);
32 } 30 }
33 BEGIN_RING(chan, NvSub2D, 0x0588, 1); 31 BEGIN_RING(chan, NvSub2D, 0x0588, 1);
34 OUT_RING(chan, rect->color); 32 if (info->fix.visual == FB_VISUAL_TRUECOLOR ||
33 info->fix.visual == FB_VISUAL_DIRECTCOLOR)
34 OUT_RING(chan, ((uint32_t *)info->pseudo_palette)[rect->color]);
35 else
36 OUT_RING(chan, rect->color);
35 BEGIN_RING(chan, NvSub2D, 0x0600, 4); 37 BEGIN_RING(chan, NvSub2D, 0x0600, 4);
36 OUT_RING(chan, rect->dx); 38 OUT_RING(chan, rect->dx);
37 OUT_RING(chan, rect->dy); 39 OUT_RING(chan, rect->dy);
@@ -44,7 +46,7 @@ nv50_fbcon_fillrect(struct fb_info *info, const struct fb_fillrect *rect)
44 FIRE_RING(chan); 46 FIRE_RING(chan);
45} 47}
46 48
47static void 49void
48nv50_fbcon_copyarea(struct fb_info *info, const struct fb_copyarea *region) 50nv50_fbcon_copyarea(struct fb_info *info, const struct fb_copyarea *region)
49{ 51{
50 struct nouveau_fbcon_par *par = info->par; 52 struct nouveau_fbcon_par *par = info->par;
@@ -56,9 +58,7 @@ nv50_fbcon_copyarea(struct fb_info *info, const struct fb_copyarea *region)
56 return; 58 return;
57 59
58 if (!(info->flags & FBINFO_HWACCEL_DISABLED) && RING_SPACE(chan, 12)) { 60 if (!(info->flags & FBINFO_HWACCEL_DISABLED) && RING_SPACE(chan, 12)) {
59 NV_ERROR(dev, "GPU lockup - switching to software fbcon\n"); 61 nouveau_fbcon_gpu_lockup(info);
60
61 info->flags |= FBINFO_HWACCEL_DISABLED;
62 } 62 }
63 63
64 if (info->flags & FBINFO_HWACCEL_DISABLED) { 64 if (info->flags & FBINFO_HWACCEL_DISABLED) {
@@ -81,7 +81,7 @@ nv50_fbcon_copyarea(struct fb_info *info, const struct fb_copyarea *region)
81 FIRE_RING(chan); 81 FIRE_RING(chan);
82} 82}
83 83
84static void 84void
85nv50_fbcon_imageblit(struct fb_info *info, const struct fb_image *image) 85nv50_fbcon_imageblit(struct fb_info *info, const struct fb_image *image)
86{ 86{
87 struct nouveau_fbcon_par *par = info->par; 87 struct nouveau_fbcon_par *par = info->par;
@@ -101,8 +101,7 @@ nv50_fbcon_imageblit(struct fb_info *info, const struct fb_image *image)
101 } 101 }
102 102
103 if (!(info->flags & FBINFO_HWACCEL_DISABLED) && RING_SPACE(chan, 11)) { 103 if (!(info->flags & FBINFO_HWACCEL_DISABLED) && RING_SPACE(chan, 11)) {
104 NV_ERROR(dev, "GPU lockup - switching to software fbcon\n"); 104 nouveau_fbcon_gpu_lockup(info);
105 info->flags |= FBINFO_HWACCEL_DISABLED;
106 } 105 }
107 106
108 if (info->flags & FBINFO_HWACCEL_DISABLED) { 107 if (info->flags & FBINFO_HWACCEL_DISABLED) {
@@ -135,9 +134,7 @@ nv50_fbcon_imageblit(struct fb_info *info, const struct fb_image *image)
135 int push = dwords > 2047 ? 2047 : dwords; 134 int push = dwords > 2047 ? 2047 : dwords;
136 135
137 if (RING_SPACE(chan, push + 1)) { 136 if (RING_SPACE(chan, push + 1)) {
138 NV_ERROR(dev, 137 nouveau_fbcon_gpu_lockup(info);
139 "GPU lockup - switching to software fbcon\n");
140 info->flags |= FBINFO_HWACCEL_DISABLED;
141 cfb_imageblit(info, image); 138 cfb_imageblit(info, image);
142 return; 139 return;
143 } 140 }
@@ -199,7 +196,7 @@ nv50_fbcon_accel_init(struct fb_info *info)
199 196
200 ret = RING_SPACE(chan, 59); 197 ret = RING_SPACE(chan, 59);
201 if (ret) { 198 if (ret) {
202 NV_ERROR(dev, "GPU lockup - switching to software fbcon\n"); 199 nouveau_fbcon_gpu_lockup(info);
203 return ret; 200 return ret;
204 } 201 }
205 202
@@ -265,9 +262,6 @@ nv50_fbcon_accel_init(struct fb_info *info)
265 OUT_RING(chan, info->fix.smem_start - dev_priv->fb_phys + 262 OUT_RING(chan, info->fix.smem_start - dev_priv->fb_phys +
266 dev_priv->vm_vram_base); 263 dev_priv->vm_vram_base);
267 264
268 info->fbops->fb_fillrect = nv50_fbcon_fillrect;
269 info->fbops->fb_copyarea = nv50_fbcon_copyarea;
270 info->fbops->fb_imageblit = nv50_fbcon_imageblit;
271 return 0; 265 return 0;
272} 266}
273 267
diff --git a/drivers/gpu/drm/nouveau/nv50_fifo.c b/drivers/gpu/drm/nouveau/nv50_fifo.c
index 77ae1aaa0bce..204a79ff10f4 100644
--- a/drivers/gpu/drm/nouveau/nv50_fifo.c
+++ b/drivers/gpu/drm/nouveau/nv50_fifo.c
@@ -272,7 +272,7 @@ nv50_fifo_create_context(struct nouveau_channel *chan)
272 return ret; 272 return ret;
273 ramfc = chan->ramfc->gpuobj; 273 ramfc = chan->ramfc->gpuobj;
274 274
275 ret = nouveau_gpuobj_new_ref(dev, chan, NULL, 0, 4096, 256, 275 ret = nouveau_gpuobj_new_ref(dev, chan, NULL, 0, 4096, 1024,
276 0, &chan->cache); 276 0, &chan->cache);
277 if (ret) 277 if (ret)
278 return ret; 278 return ret;
@@ -317,17 +317,20 @@ void
317nv50_fifo_destroy_context(struct nouveau_channel *chan) 317nv50_fifo_destroy_context(struct nouveau_channel *chan)
318{ 318{
319 struct drm_device *dev = chan->dev; 319 struct drm_device *dev = chan->dev;
320 struct nouveau_gpuobj_ref *ramfc = chan->ramfc;
320 321
321 NV_DEBUG(dev, "ch%d\n", chan->id); 322 NV_DEBUG(dev, "ch%d\n", chan->id);
322 323
323 nouveau_gpuobj_ref_del(dev, &chan->ramfc); 324 /* This will ensure the channel is seen as disabled. */
324 nouveau_gpuobj_ref_del(dev, &chan->cache); 325 chan->ramfc = NULL;
325
326 nv50_fifo_channel_disable(dev, chan->id, false); 326 nv50_fifo_channel_disable(dev, chan->id, false);
327 327
328 /* Dummy channel, also used on ch 127 */ 328 /* Dummy channel, also used on ch 127 */
329 if (chan->id == 0) 329 if (chan->id == 0)
330 nv50_fifo_channel_disable(dev, 127, false); 330 nv50_fifo_channel_disable(dev, 127, false);
331
332 nouveau_gpuobj_ref_del(dev, &ramfc);
333 nouveau_gpuobj_ref_del(dev, &chan->cache);
331} 334}
332 335
333int 336int
@@ -384,8 +387,8 @@ nv50_fifo_load_context(struct nouveau_channel *chan)
384 nv_wr32(dev, NV40_PFIFO_CACHE1_DATA(ptr), 387 nv_wr32(dev, NV40_PFIFO_CACHE1_DATA(ptr),
385 nv_ro32(dev, cache, (ptr * 2) + 1)); 388 nv_ro32(dev, cache, (ptr * 2) + 1));
386 } 389 }
387 nv_wr32(dev, 0x3210, cnt << 2); 390 nv_wr32(dev, NV03_PFIFO_CACHE1_PUT, cnt << 2);
388 nv_wr32(dev, 0x3270, 0); 391 nv_wr32(dev, NV03_PFIFO_CACHE1_GET, 0);
389 392
390 /* guessing that all the 0x34xx regs aren't on NV50 */ 393 /* guessing that all the 0x34xx regs aren't on NV50 */
391 if (!IS_G80) { 394 if (!IS_G80) {
@@ -398,8 +401,6 @@ nv50_fifo_load_context(struct nouveau_channel *chan)
398 401
399 dev_priv->engine.instmem.finish_access(dev); 402 dev_priv->engine.instmem.finish_access(dev);
400 403
401 nv_wr32(dev, NV03_PFIFO_CACHE1_GET, 0);
402 nv_wr32(dev, NV03_PFIFO_CACHE1_PUT, 0);
403 nv_wr32(dev, NV03_PFIFO_CACHE1_PUSH1, chan->id | (1<<16)); 404 nv_wr32(dev, NV03_PFIFO_CACHE1_PUSH1, chan->id | (1<<16));
404 return 0; 405 return 0;
405} 406}
@@ -416,7 +417,7 @@ nv50_fifo_unload_context(struct drm_device *dev)
416 NV_DEBUG(dev, "\n"); 417 NV_DEBUG(dev, "\n");
417 418
418 chid = pfifo->channel_id(dev); 419 chid = pfifo->channel_id(dev);
419 if (chid < 0 || chid >= dev_priv->engine.fifo.channels) 420 if (chid < 1 || chid >= dev_priv->engine.fifo.channels - 1)
420 return 0; 421 return 0;
421 422
422 chan = dev_priv->fifos[chid]; 423 chan = dev_priv->fifos[chid];
diff --git a/drivers/gpu/drm/nouveau/nv50_graph.c b/drivers/gpu/drm/nouveau/nv50_graph.c
index 177d8229336f..6d504801b514 100644
--- a/drivers/gpu/drm/nouveau/nv50_graph.c
+++ b/drivers/gpu/drm/nouveau/nv50_graph.c
@@ -84,7 +84,7 @@ nv50_graph_init_regs__nv(struct drm_device *dev)
84 nv_wr32(dev, 0x400804, 0xc0000000); 84 nv_wr32(dev, 0x400804, 0xc0000000);
85 nv_wr32(dev, 0x406800, 0xc0000000); 85 nv_wr32(dev, 0x406800, 0xc0000000);
86 nv_wr32(dev, 0x400c04, 0xc0000000); 86 nv_wr32(dev, 0x400c04, 0xc0000000);
87 nv_wr32(dev, 0x401804, 0xc0000000); 87 nv_wr32(dev, 0x401800, 0xc0000000);
88 nv_wr32(dev, 0x405018, 0xc0000000); 88 nv_wr32(dev, 0x405018, 0xc0000000);
89 nv_wr32(dev, 0x402000, 0xc0000000); 89 nv_wr32(dev, 0x402000, 0xc0000000);
90 90
@@ -107,9 +107,13 @@ nv50_graph_init_regs(struct drm_device *dev)
107static int 107static int
108nv50_graph_init_ctxctl(struct drm_device *dev) 108nv50_graph_init_ctxctl(struct drm_device *dev)
109{ 109{
110 struct drm_nouveau_private *dev_priv = dev->dev_private;
111
110 NV_DEBUG(dev, "\n"); 112 NV_DEBUG(dev, "\n");
111 113
112 nv40_grctx_init(dev); 114 nouveau_grctx_prog_load(dev);
115 if (!dev_priv->engine.graph.ctxprog)
116 dev_priv->engine.graph.accel_blocked = true;
113 117
114 nv_wr32(dev, 0x400320, 4); 118 nv_wr32(dev, 0x400320, 4);
115 nv_wr32(dev, NV40_PGRAPH_CTXCTL_CUR, 0); 119 nv_wr32(dev, NV40_PGRAPH_CTXCTL_CUR, 0);
@@ -140,7 +144,7 @@ void
140nv50_graph_takedown(struct drm_device *dev) 144nv50_graph_takedown(struct drm_device *dev)
141{ 145{
142 NV_DEBUG(dev, "\n"); 146 NV_DEBUG(dev, "\n");
143 nv40_grctx_fini(dev); 147 nouveau_grctx_fini(dev);
144} 148}
145 149
146void 150void
@@ -161,6 +165,12 @@ nv50_graph_channel(struct drm_device *dev)
161 uint32_t inst; 165 uint32_t inst;
162 int i; 166 int i;
163 167
168 /* Be sure we're not in the middle of a context switch or bad things
169 * will happen, such as unloading the wrong pgraph context.
170 */
171 if (!nv_wait(0x400300, 0x00000001, 0x00000000))
172 NV_ERROR(dev, "Ctxprog is still running\n");
173
164 inst = nv_rd32(dev, NV50_PGRAPH_CTXCTL_CUR); 174 inst = nv_rd32(dev, NV50_PGRAPH_CTXCTL_CUR);
165 if (!(inst & NV50_PGRAPH_CTXCTL_CUR_LOADED)) 175 if (!(inst & NV50_PGRAPH_CTXCTL_CUR_LOADED))
166 return NULL; 176 return NULL;
@@ -207,7 +217,7 @@ nv50_graph_create_context(struct nouveau_channel *chan)
207 dev_priv->engine.instmem.finish_access(dev); 217 dev_priv->engine.instmem.finish_access(dev);
208 218
209 dev_priv->engine.instmem.prepare_access(dev, true); 219 dev_priv->engine.instmem.prepare_access(dev, true);
210 nv40_grctx_vals_load(dev, ctx); 220 nouveau_grctx_vals_load(dev, ctx);
211 nv_wo32(dev, ctx, 0x00000/4, chan->ramin->instance >> 12); 221 nv_wo32(dev, ctx, 0x00000/4, chan->ramin->instance >> 12);
212 if ((dev_priv->chipset & 0xf0) == 0xa0) 222 if ((dev_priv->chipset & 0xf0) == 0xa0)
213 nv_wo32(dev, ctx, 0x00004/4, 0x00000000); 223 nv_wo32(dev, ctx, 0x00004/4, 0x00000000);
@@ -271,19 +281,18 @@ nv50_graph_load_context(struct nouveau_channel *chan)
271int 281int
272nv50_graph_unload_context(struct drm_device *dev) 282nv50_graph_unload_context(struct drm_device *dev)
273{ 283{
274 uint32_t inst, fifo = nv_rd32(dev, 0x400500); 284 uint32_t inst;
275 285
276 inst = nv_rd32(dev, NV50_PGRAPH_CTXCTL_CUR); 286 inst = nv_rd32(dev, NV50_PGRAPH_CTXCTL_CUR);
277 if (!(inst & NV50_PGRAPH_CTXCTL_CUR_LOADED)) 287 if (!(inst & NV50_PGRAPH_CTXCTL_CUR_LOADED))
278 return 0; 288 return 0;
279 inst &= NV50_PGRAPH_CTXCTL_CUR_INSTANCE; 289 inst &= NV50_PGRAPH_CTXCTL_CUR_INSTANCE;
280 290
281 nv_wr32(dev, 0x400500, fifo & ~1); 291 nouveau_wait_for_idle(dev);
282 nv_wr32(dev, 0x400784, inst); 292 nv_wr32(dev, 0x400784, inst);
283 nv_wr32(dev, 0x400824, nv_rd32(dev, 0x400824) | 0x20); 293 nv_wr32(dev, 0x400824, nv_rd32(dev, 0x400824) | 0x20);
284 nv_wr32(dev, 0x400304, nv_rd32(dev, 0x400304) | 0x01); 294 nv_wr32(dev, 0x400304, nv_rd32(dev, 0x400304) | 0x01);
285 nouveau_wait_for_idle(dev); 295 nouveau_wait_for_idle(dev);
286 nv_wr32(dev, 0x400500, fifo);
287 296
288 nv_wr32(dev, NV50_PGRAPH_CTXCTL_CUR, inst); 297 nv_wr32(dev, NV50_PGRAPH_CTXCTL_CUR, inst);
289 return 0; 298 return 0;
diff --git a/drivers/gpu/drm/nouveau/nv50_instmem.c b/drivers/gpu/drm/nouveau/nv50_instmem.c
index 94400f777e7f..f0dc4e36ef05 100644
--- a/drivers/gpu/drm/nouveau/nv50_instmem.c
+++ b/drivers/gpu/drm/nouveau/nv50_instmem.c
@@ -76,6 +76,11 @@ nv50_instmem_init(struct drm_device *dev)
76 for (i = 0x1700; i <= 0x1710; i += 4) 76 for (i = 0x1700; i <= 0x1710; i += 4)
77 priv->save1700[(i-0x1700)/4] = nv_rd32(dev, i); 77 priv->save1700[(i-0x1700)/4] = nv_rd32(dev, i);
78 78
79 if (dev_priv->chipset == 0xaa || dev_priv->chipset == 0xac)
80 dev_priv->vram_sys_base = nv_rd32(dev, 0x100e10) << 12;
81 else
82 dev_priv->vram_sys_base = 0;
83
79 /* Reserve the last MiB of VRAM, we should probably try to avoid 84 /* Reserve the last MiB of VRAM, we should probably try to avoid
80 * setting up the below tables over the top of the VBIOS image at 85 * setting up the below tables over the top of the VBIOS image at
81 * some point. 86 * some point.
@@ -172,16 +177,28 @@ nv50_instmem_init(struct drm_device *dev)
172 * We map the entire fake channel into the start of the PRAMIN BAR 177 * We map the entire fake channel into the start of the PRAMIN BAR
173 */ 178 */
174 ret = nouveau_gpuobj_new_ref(dev, chan, NULL, 0, pt_size, 0x1000, 179 ret = nouveau_gpuobj_new_ref(dev, chan, NULL, 0, pt_size, 0x1000,
175 0, &priv->pramin_pt); 180 0, &priv->pramin_pt);
176 if (ret) 181 if (ret)
177 return ret; 182 return ret;
178 183
179 for (i = 0, v = c_offset; i < pt_size; i += 8, v += 0x1000) { 184 v = c_offset | 1;
180 if (v < (c_offset + c_size)) 185 if (dev_priv->vram_sys_base) {
181 BAR0_WI32(priv->pramin_pt->gpuobj, i + 0, v | 1); 186 v += dev_priv->vram_sys_base;
182 else 187 v |= 0x30;
183 BAR0_WI32(priv->pramin_pt->gpuobj, i + 0, 0x00000009); 188 }
189
190 i = 0;
191 while (v < dev_priv->vram_sys_base + c_offset + c_size) {
192 BAR0_WI32(priv->pramin_pt->gpuobj, i + 0, v);
193 BAR0_WI32(priv->pramin_pt->gpuobj, i + 4, 0x00000000);
194 v += 0x1000;
195 i += 8;
196 }
197
198 while (i < pt_size) {
199 BAR0_WI32(priv->pramin_pt->gpuobj, i + 0, 0x00000000);
184 BAR0_WI32(priv->pramin_pt->gpuobj, i + 4, 0x00000000); 200 BAR0_WI32(priv->pramin_pt->gpuobj, i + 4, 0x00000000);
201 i += 8;
185 } 202 }
186 203
187 BAR0_WI32(chan->vm_pd, 0x00, priv->pramin_pt->instance | 0x63); 204 BAR0_WI32(chan->vm_pd, 0x00, priv->pramin_pt->instance | 0x63);
@@ -416,7 +433,9 @@ nv50_instmem_bind(struct drm_device *dev, struct nouveau_gpuobj *gpuobj)
416{ 433{
417 struct drm_nouveau_private *dev_priv = dev->dev_private; 434 struct drm_nouveau_private *dev_priv = dev->dev_private;
418 struct nv50_instmem_priv *priv = dev_priv->engine.instmem.priv; 435 struct nv50_instmem_priv *priv = dev_priv->engine.instmem.priv;
419 uint32_t pte, pte_end, vram; 436 struct nouveau_gpuobj *pramin_pt = priv->pramin_pt->gpuobj;
437 uint32_t pte, pte_end;
438 uint64_t vram;
420 439
421 if (!gpuobj->im_backing || !gpuobj->im_pramin || gpuobj->im_bound) 440 if (!gpuobj->im_backing || !gpuobj->im_pramin || gpuobj->im_bound)
422 return -EINVAL; 441 return -EINVAL;
@@ -424,20 +443,24 @@ nv50_instmem_bind(struct drm_device *dev, struct nouveau_gpuobj *gpuobj)
424 NV_DEBUG(dev, "st=0x%0llx sz=0x%0llx\n", 443 NV_DEBUG(dev, "st=0x%0llx sz=0x%0llx\n",
425 gpuobj->im_pramin->start, gpuobj->im_pramin->size); 444 gpuobj->im_pramin->start, gpuobj->im_pramin->size);
426 445
427 pte = (gpuobj->im_pramin->start >> 12) << 3; 446 pte = (gpuobj->im_pramin->start >> 12) << 1;
428 pte_end = ((gpuobj->im_pramin->size >> 12) << 3) + pte; 447 pte_end = ((gpuobj->im_pramin->size >> 12) << 1) + pte;
429 vram = gpuobj->im_backing_start; 448 vram = gpuobj->im_backing_start;
430 449
431 NV_DEBUG(dev, "pramin=0x%llx, pte=%d, pte_end=%d\n", 450 NV_DEBUG(dev, "pramin=0x%llx, pte=%d, pte_end=%d\n",
432 gpuobj->im_pramin->start, pte, pte_end); 451 gpuobj->im_pramin->start, pte, pte_end);
433 NV_DEBUG(dev, "first vram page: 0x%08x\n", gpuobj->im_backing_start); 452 NV_DEBUG(dev, "first vram page: 0x%08x\n", gpuobj->im_backing_start);
434 453
454 vram |= 1;
455 if (dev_priv->vram_sys_base) {
456 vram += dev_priv->vram_sys_base;
457 vram |= 0x30;
458 }
459
435 dev_priv->engine.instmem.prepare_access(dev, true); 460 dev_priv->engine.instmem.prepare_access(dev, true);
436 while (pte < pte_end) { 461 while (pte < pte_end) {
437 nv_wo32(dev, priv->pramin_pt->gpuobj, (pte + 0)/4, vram | 1); 462 nv_wo32(dev, pramin_pt, pte++, lower_32_bits(vram));
438 nv_wo32(dev, priv->pramin_pt->gpuobj, (pte + 4)/4, 0x00000000); 463 nv_wo32(dev, pramin_pt, pte++, upper_32_bits(vram));
439
440 pte += 8;
441 vram += NV50_INSTMEM_PAGE_SIZE; 464 vram += NV50_INSTMEM_PAGE_SIZE;
442 } 465 }
443 dev_priv->engine.instmem.finish_access(dev); 466 dev_priv->engine.instmem.finish_access(dev);
@@ -470,14 +493,13 @@ nv50_instmem_unbind(struct drm_device *dev, struct nouveau_gpuobj *gpuobj)
470 if (gpuobj->im_bound == 0) 493 if (gpuobj->im_bound == 0)
471 return -EINVAL; 494 return -EINVAL;
472 495
473 pte = (gpuobj->im_pramin->start >> 12) << 3; 496 pte = (gpuobj->im_pramin->start >> 12) << 1;
474 pte_end = ((gpuobj->im_pramin->size >> 12) << 3) + pte; 497 pte_end = ((gpuobj->im_pramin->size >> 12) << 1) + pte;
475 498
476 dev_priv->engine.instmem.prepare_access(dev, true); 499 dev_priv->engine.instmem.prepare_access(dev, true);
477 while (pte < pte_end) { 500 while (pte < pte_end) {
478 nv_wo32(dev, priv->pramin_pt->gpuobj, (pte + 0)/4, 0x00000009); 501 nv_wo32(dev, priv->pramin_pt->gpuobj, pte++, 0x00000000);
479 nv_wo32(dev, priv->pramin_pt->gpuobj, (pte + 4)/4, 0x00000000); 502 nv_wo32(dev, priv->pramin_pt->gpuobj, pte++, 0x00000000);
480 pte += 8;
481 } 503 }
482 dev_priv->engine.instmem.finish_access(dev); 504 dev_priv->engine.instmem.finish_access(dev);
483 505
diff --git a/drivers/gpu/drm/nouveau/nv50_sor.c b/drivers/gpu/drm/nouveau/nv50_sor.c
index 8c280463a664..c2fff543b06f 100644
--- a/drivers/gpu/drm/nouveau/nv50_sor.c
+++ b/drivers/gpu/drm/nouveau/nv50_sor.c
@@ -44,7 +44,7 @@ nv50_sor_disconnect(struct nouveau_encoder *nv_encoder)
44 struct nouveau_channel *evo = dev_priv->evo; 44 struct nouveau_channel *evo = dev_priv->evo;
45 int ret; 45 int ret;
46 46
47 NV_DEBUG(dev, "Disconnecting SOR %d\n", nv_encoder->or); 47 NV_DEBUG_KMS(dev, "Disconnecting SOR %d\n", nv_encoder->or);
48 48
49 ret = RING_SPACE(evo, 2); 49 ret = RING_SPACE(evo, 2);
50 if (ret) { 50 if (ret) {
@@ -70,7 +70,7 @@ nv50_sor_dp_link_train(struct drm_encoder *encoder)
70 } 70 }
71 71
72 if (dpe->script0) { 72 if (dpe->script0) {
73 NV_DEBUG(dev, "SOR-%d: running DP script 0\n", nv_encoder->or); 73 NV_DEBUG_KMS(dev, "SOR-%d: running DP script 0\n", nv_encoder->or);
74 nouveau_bios_run_init_table(dev, le16_to_cpu(dpe->script0), 74 nouveau_bios_run_init_table(dev, le16_to_cpu(dpe->script0),
75 nv_encoder->dcb); 75 nv_encoder->dcb);
76 } 76 }
@@ -79,7 +79,7 @@ nv50_sor_dp_link_train(struct drm_encoder *encoder)
79 NV_ERROR(dev, "SOR-%d: link training failed\n", nv_encoder->or); 79 NV_ERROR(dev, "SOR-%d: link training failed\n", nv_encoder->or);
80 80
81 if (dpe->script1) { 81 if (dpe->script1) {
82 NV_DEBUG(dev, "SOR-%d: running DP script 1\n", nv_encoder->or); 82 NV_DEBUG_KMS(dev, "SOR-%d: running DP script 1\n", nv_encoder->or);
83 nouveau_bios_run_init_table(dev, le16_to_cpu(dpe->script1), 83 nouveau_bios_run_init_table(dev, le16_to_cpu(dpe->script1),
84 nv_encoder->dcb); 84 nv_encoder->dcb);
85 } 85 }
@@ -90,10 +90,24 @@ nv50_sor_dpms(struct drm_encoder *encoder, int mode)
90{ 90{
91 struct drm_device *dev = encoder->dev; 91 struct drm_device *dev = encoder->dev;
92 struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder); 92 struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
93 struct drm_encoder *enc;
93 uint32_t val; 94 uint32_t val;
94 int or = nv_encoder->or; 95 int or = nv_encoder->or;
95 96
96 NV_DEBUG(dev, "or %d mode %d\n", or, mode); 97 NV_DEBUG_KMS(dev, "or %d mode %d\n", or, mode);
98
99 nv_encoder->last_dpms = mode;
100 list_for_each_entry(enc, &dev->mode_config.encoder_list, head) {
101 struct nouveau_encoder *nvenc = nouveau_encoder(enc);
102
103 if (nvenc == nv_encoder ||
104 nvenc->disconnect != nv50_sor_disconnect ||
105 nvenc->dcb->or != nv_encoder->dcb->or)
106 continue;
107
108 if (nvenc->last_dpms == DRM_MODE_DPMS_ON)
109 return;
110 }
97 111
98 /* wait for it to be done */ 112 /* wait for it to be done */
99 if (!nv_wait(NV50_PDISPLAY_SOR_DPMS_CTRL(or), 113 if (!nv_wait(NV50_PDISPLAY_SOR_DPMS_CTRL(or),
@@ -142,7 +156,7 @@ nv50_sor_mode_fixup(struct drm_encoder *encoder, struct drm_display_mode *mode,
142 struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder); 156 struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
143 struct nouveau_connector *connector; 157 struct nouveau_connector *connector;
144 158
145 NV_DEBUG(encoder->dev, "or %d\n", nv_encoder->or); 159 NV_DEBUG_KMS(encoder->dev, "or %d\n", nv_encoder->or);
146 160
147 connector = nouveau_encoder_connector_get(nv_encoder); 161 connector = nouveau_encoder_connector_get(nv_encoder);
148 if (!connector) { 162 if (!connector) {
@@ -182,7 +196,7 @@ nv50_sor_mode_set(struct drm_encoder *encoder, struct drm_display_mode *mode,
182 uint32_t mode_ctl = 0; 196 uint32_t mode_ctl = 0;
183 int ret; 197 int ret;
184 198
185 NV_DEBUG(dev, "or %d\n", nv_encoder->or); 199 NV_DEBUG_KMS(dev, "or %d\n", nv_encoder->or);
186 200
187 nv50_sor_dpms(encoder, DRM_MODE_DPMS_ON); 201 nv50_sor_dpms(encoder, DRM_MODE_DPMS_ON);
188 202
@@ -246,7 +260,7 @@ nv50_sor_destroy(struct drm_encoder *encoder)
246 if (!encoder) 260 if (!encoder)
247 return; 261 return;
248 262
249 NV_DEBUG(encoder->dev, "\n"); 263 NV_DEBUG_KMS(encoder->dev, "\n");
250 264
251 drm_encoder_cleanup(encoder); 265 drm_encoder_cleanup(encoder);
252 266
@@ -265,7 +279,7 @@ nv50_sor_create(struct drm_device *dev, struct dcb_entry *entry)
265 bool dum; 279 bool dum;
266 int type; 280 int type;
267 281
268 NV_DEBUG(dev, "\n"); 282 NV_DEBUG_KMS(dev, "\n");
269 283
270 switch (entry->type) { 284 switch (entry->type) {
271 case OUTPUT_TMDS: 285 case OUTPUT_TMDS:
diff --git a/drivers/gpu/drm/r128/r128_drv.c b/drivers/gpu/drm/r128/r128_drv.c
index 601f4c0e5da5..b806fdcc7170 100644
--- a/drivers/gpu/drm/r128/r128_drv.c
+++ b/drivers/gpu/drm/r128/r128_drv.c
@@ -64,7 +64,7 @@ static struct drm_driver driver = {
64 .owner = THIS_MODULE, 64 .owner = THIS_MODULE,
65 .open = drm_open, 65 .open = drm_open,
66 .release = drm_release, 66 .release = drm_release,
67 .ioctl = drm_ioctl, 67 .unlocked_ioctl = drm_ioctl,
68 .mmap = drm_mmap, 68 .mmap = drm_mmap,
69 .poll = drm_poll, 69 .poll = drm_poll,
70 .fasync = drm_fasync, 70 .fasync = drm_fasync,
diff --git a/drivers/gpu/drm/r128/r128_ioc32.c b/drivers/gpu/drm/r128/r128_ioc32.c
index d3cb676eee84..51c99fc4dd38 100644
--- a/drivers/gpu/drm/r128/r128_ioc32.c
+++ b/drivers/gpu/drm/r128/r128_ioc32.c
@@ -95,8 +95,7 @@ static int compat_r128_init(struct file *file, unsigned int cmd,
95 &init->agp_textures_offset)) 95 &init->agp_textures_offset))
96 return -EFAULT; 96 return -EFAULT;
97 97
98 return drm_ioctl(file->f_path.dentry->d_inode, file, 98 return drm_ioctl(file, DRM_IOCTL_R128_INIT, (unsigned long)init);
99 DRM_IOCTL_R128_INIT, (unsigned long)init);
100} 99}
101 100
102typedef struct drm_r128_depth32 { 101typedef struct drm_r128_depth32 {
@@ -129,8 +128,7 @@ static int compat_r128_depth(struct file *file, unsigned int cmd,
129 &depth->mask)) 128 &depth->mask))
130 return -EFAULT; 129 return -EFAULT;
131 130
132 return drm_ioctl(file->f_path.dentry->d_inode, file, 131 return drm_ioctl(file, DRM_IOCTL_R128_DEPTH, (unsigned long)depth);
133 DRM_IOCTL_R128_DEPTH, (unsigned long)depth);
134 132
135} 133}
136 134
@@ -153,8 +151,7 @@ static int compat_r128_stipple(struct file *file, unsigned int cmd,
153 &stipple->mask)) 151 &stipple->mask))
154 return -EFAULT; 152 return -EFAULT;
155 153
156 return drm_ioctl(file->f_path.dentry->d_inode, file, 154 return drm_ioctl(file, DRM_IOCTL_R128_STIPPLE, (unsigned long)stipple);
157 DRM_IOCTL_R128_STIPPLE, (unsigned long)stipple);
158} 155}
159 156
160typedef struct drm_r128_getparam32 { 157typedef struct drm_r128_getparam32 {
@@ -178,8 +175,7 @@ static int compat_r128_getparam(struct file *file, unsigned int cmd,
178 &getparam->value)) 175 &getparam->value))
179 return -EFAULT; 176 return -EFAULT;
180 177
181 return drm_ioctl(file->f_path.dentry->d_inode, file, 178 return drm_ioctl(file, DRM_IOCTL_R128_GETPARAM, (unsigned long)getparam);
182 DRM_IOCTL_R128_GETPARAM, (unsigned long)getparam);
183} 179}
184 180
185drm_ioctl_compat_t *r128_compat_ioctls[] = { 181drm_ioctl_compat_t *r128_compat_ioctls[] = {
@@ -210,12 +206,10 @@ long r128_compat_ioctl(struct file *filp, unsigned int cmd, unsigned long arg)
210 if (nr < DRM_COMMAND_BASE + DRM_ARRAY_SIZE(r128_compat_ioctls)) 206 if (nr < DRM_COMMAND_BASE + DRM_ARRAY_SIZE(r128_compat_ioctls))
211 fn = r128_compat_ioctls[nr - DRM_COMMAND_BASE]; 207 fn = r128_compat_ioctls[nr - DRM_COMMAND_BASE];
212 208
213 lock_kernel(); /* XXX for now */
214 if (fn != NULL) 209 if (fn != NULL)
215 ret = (*fn) (filp, cmd, arg); 210 ret = (*fn) (filp, cmd, arg);
216 else 211 else
217 ret = drm_ioctl(filp->f_path.dentry->d_inode, filp, cmd, arg); 212 ret = drm_ioctl(filp, cmd, arg);
218 unlock_kernel();
219 213
220 return ret; 214 return ret;
221} 215}
diff --git a/drivers/gpu/drm/radeon/Kconfig b/drivers/gpu/drm/radeon/Kconfig
index 5982321be4d5..1c02d23f6fcc 100644
--- a/drivers/gpu/drm/radeon/Kconfig
+++ b/drivers/gpu/drm/radeon/Kconfig
@@ -1,10 +1,14 @@
1config DRM_RADEON_KMS 1config DRM_RADEON_KMS
2 bool "Enable modesetting on radeon by default" 2 bool "Enable modesetting on radeon by default - NEW DRIVER"
3 depends on DRM_RADEON 3 depends on DRM_RADEON
4 help 4 help
5 Choose this option if you want kernel modesetting enabled by default, 5 Choose this option if you want kernel modesetting enabled by default.
6 and you have a new enough userspace to support this. Running old 6
7 userspaces with this enabled will cause pain. 7 This is a completely new driver. It's only part of the existing drm
8 for compatibility reasons. It requires an entirely different graphics
9 stack above it and works very differently from the old drm stack.
10 i.e. don't enable this unless you know what you are doing it may
11 cause issues or bugs compared to the previous userspace driver stack.
8 12
9 When kernel modesetting is enabled the IOCTL of radeon/drm 13 When kernel modesetting is enabled the IOCTL of radeon/drm
10 driver are considered as invalid and an error message is printed 14 driver are considered as invalid and an error message is printed
diff --git a/drivers/gpu/drm/radeon/Makefile b/drivers/gpu/drm/radeon/Makefile
index feb52eee4314..1cc7b937b1ea 100644
--- a/drivers/gpu/drm/radeon/Makefile
+++ b/drivers/gpu/drm/radeon/Makefile
@@ -24,6 +24,9 @@ $(obj)/rv515_reg_safe.h: $(src)/reg_srcs/rv515 $(obj)/mkregtable
24$(obj)/r300_reg_safe.h: $(src)/reg_srcs/r300 $(obj)/mkregtable 24$(obj)/r300_reg_safe.h: $(src)/reg_srcs/r300 $(obj)/mkregtable
25 $(call if_changed,mkregtable) 25 $(call if_changed,mkregtable)
26 26
27$(obj)/r420_reg_safe.h: $(src)/reg_srcs/r420 $(obj)/mkregtable
28 $(call if_changed,mkregtable)
29
27$(obj)/rs600_reg_safe.h: $(src)/reg_srcs/rs600 $(obj)/mkregtable 30$(obj)/rs600_reg_safe.h: $(src)/reg_srcs/rs600 $(obj)/mkregtable
28 $(call if_changed,mkregtable) 31 $(call if_changed,mkregtable)
29 32
@@ -35,6 +38,8 @@ $(obj)/rv515.o: $(obj)/rv515_reg_safe.h
35 38
36$(obj)/r300.o: $(obj)/r300_reg_safe.h 39$(obj)/r300.o: $(obj)/r300_reg_safe.h
37 40
41$(obj)/r420.o: $(obj)/r420_reg_safe.h
42
38$(obj)/rs600.o: $(obj)/rs600_reg_safe.h 43$(obj)/rs600.o: $(obj)/rs600_reg_safe.h
39 44
40radeon-y := radeon_drv.o radeon_cp.o radeon_state.o radeon_mem.o \ 45radeon-y := radeon_drv.o radeon_cp.o radeon_state.o radeon_mem.o \
@@ -49,7 +54,7 @@ radeon-y += radeon_device.o radeon_kms.o \
49 radeon_cs.o radeon_bios.o radeon_benchmark.o r100.o r300.o r420.o \ 54 radeon_cs.o radeon_bios.o radeon_benchmark.o r100.o r300.o r420.o \
50 rs400.o rs600.o rs690.o rv515.o r520.o r600.o rv770.o radeon_test.o \ 55 rs400.o rs600.o rs690.o rv515.o r520.o r600.o rv770.o radeon_test.o \
51 r200.o radeon_legacy_tv.o r600_cs.o r600_blit.o r600_blit_shaders.o \ 56 r200.o radeon_legacy_tv.o r600_cs.o r600_blit.o r600_blit_shaders.o \
52 r600_blit_kms.o radeon_pm.o atombios_dp.o 57 r600_blit_kms.o radeon_pm.o atombios_dp.o r600_audio.o r600_hdmi.o
53 58
54radeon-$(CONFIG_COMPAT) += radeon_ioc32.o 59radeon-$(CONFIG_COMPAT) += radeon_ioc32.o
55 60
diff --git a/drivers/gpu/drm/radeon/ObjectID.h b/drivers/gpu/drm/radeon/ObjectID.h
index 6d0183c61d3b..c714179d1bfa 100644
--- a/drivers/gpu/drm/radeon/ObjectID.h
+++ b/drivers/gpu/drm/radeon/ObjectID.h
@@ -1,5 +1,5 @@
1/* 1/*
2* Copyright 2006-2007 Advanced Micro Devices, Inc. 2* Copyright 2006-2007 Advanced Micro Devices, Inc.
3* 3*
4* Permission is hereby granted, free of charge, to any person obtaining a 4* Permission is hereby granted, free of charge, to any person obtaining a
5* copy of this software and associated documentation files (the "Software"), 5* copy of this software and associated documentation files (the "Software"),
@@ -41,14 +41,14 @@
41/****************************************************/ 41/****************************************************/
42/* Encoder Object ID Definition */ 42/* Encoder Object ID Definition */
43/****************************************************/ 43/****************************************************/
44#define ENCODER_OBJECT_ID_NONE 0x00 44#define ENCODER_OBJECT_ID_NONE 0x00
45 45
46/* Radeon Class Display Hardware */ 46/* Radeon Class Display Hardware */
47#define ENCODER_OBJECT_ID_INTERNAL_LVDS 0x01 47#define ENCODER_OBJECT_ID_INTERNAL_LVDS 0x01
48#define ENCODER_OBJECT_ID_INTERNAL_TMDS1 0x02 48#define ENCODER_OBJECT_ID_INTERNAL_TMDS1 0x02
49#define ENCODER_OBJECT_ID_INTERNAL_TMDS2 0x03 49#define ENCODER_OBJECT_ID_INTERNAL_TMDS2 0x03
50#define ENCODER_OBJECT_ID_INTERNAL_DAC1 0x04 50#define ENCODER_OBJECT_ID_INTERNAL_DAC1 0x04
51#define ENCODER_OBJECT_ID_INTERNAL_DAC2 0x05 /* TV/CV DAC */ 51#define ENCODER_OBJECT_ID_INTERNAL_DAC2 0x05 /* TV/CV DAC */
52#define ENCODER_OBJECT_ID_INTERNAL_SDVOA 0x06 52#define ENCODER_OBJECT_ID_INTERNAL_SDVOA 0x06
53#define ENCODER_OBJECT_ID_INTERNAL_SDVOB 0x07 53#define ENCODER_OBJECT_ID_INTERNAL_SDVOB 0x07
54 54
@@ -56,11 +56,11 @@
56#define ENCODER_OBJECT_ID_SI170B 0x08 56#define ENCODER_OBJECT_ID_SI170B 0x08
57#define ENCODER_OBJECT_ID_CH7303 0x09 57#define ENCODER_OBJECT_ID_CH7303 0x09
58#define ENCODER_OBJECT_ID_CH7301 0x0A 58#define ENCODER_OBJECT_ID_CH7301 0x0A
59#define ENCODER_OBJECT_ID_INTERNAL_DVO1 0x0B /* This belongs to Radeon Class Display Hardware */ 59#define ENCODER_OBJECT_ID_INTERNAL_DVO1 0x0B /* This belongs to Radeon Class Display Hardware */
60#define ENCODER_OBJECT_ID_EXTERNAL_SDVOA 0x0C 60#define ENCODER_OBJECT_ID_EXTERNAL_SDVOA 0x0C
61#define ENCODER_OBJECT_ID_EXTERNAL_SDVOB 0x0D 61#define ENCODER_OBJECT_ID_EXTERNAL_SDVOB 0x0D
62#define ENCODER_OBJECT_ID_TITFP513 0x0E 62#define ENCODER_OBJECT_ID_TITFP513 0x0E
63#define ENCODER_OBJECT_ID_INTERNAL_LVTM1 0x0F /* not used for Radeon */ 63#define ENCODER_OBJECT_ID_INTERNAL_LVTM1 0x0F /* not used for Radeon */
64#define ENCODER_OBJECT_ID_VT1623 0x10 64#define ENCODER_OBJECT_ID_VT1623 0x10
65#define ENCODER_OBJECT_ID_HDMI_SI1930 0x11 65#define ENCODER_OBJECT_ID_HDMI_SI1930 0x11
66#define ENCODER_OBJECT_ID_HDMI_INTERNAL 0x12 66#define ENCODER_OBJECT_ID_HDMI_INTERNAL 0x12
@@ -68,9 +68,9 @@
68#define ENCODER_OBJECT_ID_INTERNAL_KLDSCP_TMDS1 0x13 68#define ENCODER_OBJECT_ID_INTERNAL_KLDSCP_TMDS1 0x13
69#define ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DVO1 0x14 69#define ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DVO1 0x14
70#define ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC1 0x15 70#define ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC1 0x15
71#define ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC2 0x16 /* Shared with CV/TV and CRT */ 71#define ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC2 0x16 /* Shared with CV/TV and CRT */
72#define ENCODER_OBJECT_ID_SI178 0X17 /* External TMDS (dual link, no HDCP.) */ 72#define ENCODER_OBJECT_ID_SI178 0X17 /* External TMDS (dual link, no HDCP.) */
73#define ENCODER_OBJECT_ID_MVPU_FPGA 0x18 /* MVPU FPGA chip */ 73#define ENCODER_OBJECT_ID_MVPU_FPGA 0x18 /* MVPU FPGA chip */
74#define ENCODER_OBJECT_ID_INTERNAL_DDI 0x19 74#define ENCODER_OBJECT_ID_INTERNAL_DDI 0x19
75#define ENCODER_OBJECT_ID_VT1625 0x1A 75#define ENCODER_OBJECT_ID_VT1625 0x1A
76#define ENCODER_OBJECT_ID_HDMI_SI1932 0x1B 76#define ENCODER_OBJECT_ID_HDMI_SI1932 0x1B
@@ -86,7 +86,7 @@
86/****************************************************/ 86/****************************************************/
87/* Connector Object ID Definition */ 87/* Connector Object ID Definition */
88/****************************************************/ 88/****************************************************/
89#define CONNECTOR_OBJECT_ID_NONE 0x00 89#define CONNECTOR_OBJECT_ID_NONE 0x00
90#define CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_I 0x01 90#define CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_I 0x01
91#define CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_I 0x02 91#define CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_I 0x02
92#define CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_D 0x03 92#define CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_D 0x03
@@ -96,7 +96,7 @@
96#define CONNECTOR_OBJECT_ID_SVIDEO 0x07 96#define CONNECTOR_OBJECT_ID_SVIDEO 0x07
97#define CONNECTOR_OBJECT_ID_YPbPr 0x08 97#define CONNECTOR_OBJECT_ID_YPbPr 0x08
98#define CONNECTOR_OBJECT_ID_D_CONNECTOR 0x09 98#define CONNECTOR_OBJECT_ID_D_CONNECTOR 0x09
99#define CONNECTOR_OBJECT_ID_9PIN_DIN 0x0A /* Supports both CV & TV */ 99#define CONNECTOR_OBJECT_ID_9PIN_DIN 0x0A /* Supports both CV & TV */
100#define CONNECTOR_OBJECT_ID_SCART 0x0B 100#define CONNECTOR_OBJECT_ID_SCART 0x0B
101#define CONNECTOR_OBJECT_ID_HDMI_TYPE_A 0x0C 101#define CONNECTOR_OBJECT_ID_HDMI_TYPE_A 0x0C
102#define CONNECTOR_OBJECT_ID_HDMI_TYPE_B 0x0D 102#define CONNECTOR_OBJECT_ID_HDMI_TYPE_B 0x0D
@@ -106,6 +106,8 @@
106#define CONNECTOR_OBJECT_ID_CROSSFIRE 0x11 106#define CONNECTOR_OBJECT_ID_CROSSFIRE 0x11
107#define CONNECTOR_OBJECT_ID_HARDCODE_DVI 0x12 107#define CONNECTOR_OBJECT_ID_HARDCODE_DVI 0x12
108#define CONNECTOR_OBJECT_ID_DISPLAYPORT 0x13 108#define CONNECTOR_OBJECT_ID_DISPLAYPORT 0x13
109#define CONNECTOR_OBJECT_ID_eDP 0x14
110#define CONNECTOR_OBJECT_ID_MXM 0x15
109 111
110/* deleted */ 112/* deleted */
111 113
@@ -116,6 +118,14 @@
116#define ROUTER_OBJECT_ID_I2C_EXTENDER_CNTL 0x01 118#define ROUTER_OBJECT_ID_I2C_EXTENDER_CNTL 0x01
117 119
118/****************************************************/ 120/****************************************************/
121/* Generic Object ID Definition */
122/****************************************************/
123#define GENERIC_OBJECT_ID_NONE 0x00
124#define GENERIC_OBJECT_ID_GLSYNC 0x01
125#define GENERIC_OBJECT_ID_PX2_NON_DRIVABLE 0x02
126#define GENERIC_OBJECT_ID_MXM_OPM 0x03
127
128/****************************************************/
119/* Graphics Object ENUM ID Definition */ 129/* Graphics Object ENUM ID Definition */
120/****************************************************/ 130/****************************************************/
121#define GRAPH_OBJECT_ENUM_ID1 0x01 131#define GRAPH_OBJECT_ENUM_ID1 0x01
@@ -124,6 +134,7 @@
124#define GRAPH_OBJECT_ENUM_ID4 0x04 134#define GRAPH_OBJECT_ENUM_ID4 0x04
125#define GRAPH_OBJECT_ENUM_ID5 0x05 135#define GRAPH_OBJECT_ENUM_ID5 0x05
126#define GRAPH_OBJECT_ENUM_ID6 0x06 136#define GRAPH_OBJECT_ENUM_ID6 0x06
137#define GRAPH_OBJECT_ENUM_ID7 0x07
127 138
128/****************************************************/ 139/****************************************************/
129/* Graphics Object ID Bit definition */ 140/* Graphics Object ID Bit definition */
@@ -133,35 +144,35 @@
133#define RESERVED1_ID_MASK 0x0800 144#define RESERVED1_ID_MASK 0x0800
134#define OBJECT_TYPE_MASK 0x7000 145#define OBJECT_TYPE_MASK 0x7000
135#define RESERVED2_ID_MASK 0x8000 146#define RESERVED2_ID_MASK 0x8000
136 147
137#define OBJECT_ID_SHIFT 0x00 148#define OBJECT_ID_SHIFT 0x00
138#define ENUM_ID_SHIFT 0x08 149#define ENUM_ID_SHIFT 0x08
139#define OBJECT_TYPE_SHIFT 0x0C 150#define OBJECT_TYPE_SHIFT 0x0C
140 151
152
141/****************************************************/ 153/****************************************************/
142/* Graphics Object family definition */ 154/* Graphics Object family definition */
143/****************************************************/ 155/****************************************************/
144#define CONSTRUCTOBJECTFAMILYID(GRAPHICS_OBJECT_TYPE, GRAPHICS_OBJECT_ID) \ 156#define CONSTRUCTOBJECTFAMILYID(GRAPHICS_OBJECT_TYPE, GRAPHICS_OBJECT_ID) (GRAPHICS_OBJECT_TYPE << OBJECT_TYPE_SHIFT | \
145 (GRAPHICS_OBJECT_TYPE << OBJECT_TYPE_SHIFT | \ 157 GRAPHICS_OBJECT_ID << OBJECT_ID_SHIFT)
146 GRAPHICS_OBJECT_ID << OBJECT_ID_SHIFT)
147/****************************************************/ 158/****************************************************/
148/* GPU Object ID definition - Shared with BIOS */ 159/* GPU Object ID definition - Shared with BIOS */
149/****************************************************/ 160/****************************************************/
150#define GPU_ENUM_ID1 (GRAPH_OBJECT_TYPE_GPU << OBJECT_TYPE_SHIFT |\ 161#define GPU_ENUM_ID1 ( GRAPH_OBJECT_TYPE_GPU << OBJECT_TYPE_SHIFT |\
151 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT) 162 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT)
152 163
153/****************************************************/ 164/****************************************************/
154/* Encoder Object ID definition - Shared with BIOS */ 165/* Encoder Object ID definition - Shared with BIOS */
155/****************************************************/ 166/****************************************************/
156/* 167/*
157#define ENCODER_INTERNAL_LVDS_ENUM_ID1 0x2101 168#define ENCODER_INTERNAL_LVDS_ENUM_ID1 0x2101
158#define ENCODER_INTERNAL_TMDS1_ENUM_ID1 0x2102 169#define ENCODER_INTERNAL_TMDS1_ENUM_ID1 0x2102
159#define ENCODER_INTERNAL_TMDS2_ENUM_ID1 0x2103 170#define ENCODER_INTERNAL_TMDS2_ENUM_ID1 0x2103
160#define ENCODER_INTERNAL_DAC1_ENUM_ID1 0x2104 171#define ENCODER_INTERNAL_DAC1_ENUM_ID1 0x2104
161#define ENCODER_INTERNAL_DAC2_ENUM_ID1 0x2105 172#define ENCODER_INTERNAL_DAC2_ENUM_ID1 0x2105
162#define ENCODER_INTERNAL_SDVOA_ENUM_ID1 0x2106 173#define ENCODER_INTERNAL_SDVOA_ENUM_ID1 0x2106
163#define ENCODER_INTERNAL_SDVOB_ENUM_ID1 0x2107 174#define ENCODER_INTERNAL_SDVOB_ENUM_ID1 0x2107
164#define ENCODER_SIL170B_ENUM_ID1 0x2108 175#define ENCODER_SIL170B_ENUM_ID1 0x2108
165#define ENCODER_CH7303_ENUM_ID1 0x2109 176#define ENCODER_CH7303_ENUM_ID1 0x2109
166#define ENCODER_CH7301_ENUM_ID1 0x210A 177#define ENCODER_CH7301_ENUM_ID1 0x210A
167#define ENCODER_INTERNAL_DVO1_ENUM_ID1 0x210B 178#define ENCODER_INTERNAL_DVO1_ENUM_ID1 0x210B
@@ -175,8 +186,8 @@
175#define ENCODER_INTERNAL_KLDSCP_TMDS1_ENUM_ID1 0x2113 186#define ENCODER_INTERNAL_KLDSCP_TMDS1_ENUM_ID1 0x2113
176#define ENCODER_INTERNAL_KLDSCP_DVO1_ENUM_ID1 0x2114 187#define ENCODER_INTERNAL_KLDSCP_DVO1_ENUM_ID1 0x2114
177#define ENCODER_INTERNAL_KLDSCP_DAC1_ENUM_ID1 0x2115 188#define ENCODER_INTERNAL_KLDSCP_DAC1_ENUM_ID1 0x2115
178#define ENCODER_INTERNAL_KLDSCP_DAC2_ENUM_ID1 0x2116 189#define ENCODER_INTERNAL_KLDSCP_DAC2_ENUM_ID1 0x2116
179#define ENCODER_SI178_ENUM_ID1 0x2117 190#define ENCODER_SI178_ENUM_ID1 0x2117
180#define ENCODER_MVPU_FPGA_ENUM_ID1 0x2118 191#define ENCODER_MVPU_FPGA_ENUM_ID1 0x2118
181#define ENCODER_INTERNAL_DDI_ENUM_ID1 0x2119 192#define ENCODER_INTERNAL_DDI_ENUM_ID1 0x2119
182#define ENCODER_VT1625_ENUM_ID1 0x211A 193#define ENCODER_VT1625_ENUM_ID1 0x211A
@@ -185,205 +196,169 @@
185#define ENCODER_DP_DP501_ENUM_ID1 0x211D 196#define ENCODER_DP_DP501_ENUM_ID1 0x211D
186#define ENCODER_INTERNAL_UNIPHY_ENUM_ID1 0x211E 197#define ENCODER_INTERNAL_UNIPHY_ENUM_ID1 0x211E
187*/ 198*/
188#define ENCODER_INTERNAL_LVDS_ENUM_ID1 \ 199#define ENCODER_INTERNAL_LVDS_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
189 (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\ 200 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
190 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\ 201 ENCODER_OBJECT_ID_INTERNAL_LVDS << OBJECT_ID_SHIFT)
191 ENCODER_OBJECT_ID_INTERNAL_LVDS << OBJECT_ID_SHIFT) 202
192 203#define ENCODER_INTERNAL_TMDS1_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
193#define ENCODER_INTERNAL_TMDS1_ENUM_ID1 \ 204 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
194 (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\ 205 ENCODER_OBJECT_ID_INTERNAL_TMDS1 << OBJECT_ID_SHIFT)
195 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\ 206
196 ENCODER_OBJECT_ID_INTERNAL_TMDS1 << OBJECT_ID_SHIFT) 207#define ENCODER_INTERNAL_TMDS2_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
197 208 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
198#define ENCODER_INTERNAL_TMDS2_ENUM_ID1 \ 209 ENCODER_OBJECT_ID_INTERNAL_TMDS2 << OBJECT_ID_SHIFT)
199 (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\ 210
200 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\ 211#define ENCODER_INTERNAL_DAC1_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
201 ENCODER_OBJECT_ID_INTERNAL_TMDS2 << OBJECT_ID_SHIFT) 212 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
202 213 ENCODER_OBJECT_ID_INTERNAL_DAC1 << OBJECT_ID_SHIFT)
203#define ENCODER_INTERNAL_DAC1_ENUM_ID1 \ 214
204 (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\ 215#define ENCODER_INTERNAL_DAC2_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
205 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\ 216 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
206 ENCODER_OBJECT_ID_INTERNAL_DAC1 << OBJECT_ID_SHIFT) 217 ENCODER_OBJECT_ID_INTERNAL_DAC2 << OBJECT_ID_SHIFT)
207 218
208#define ENCODER_INTERNAL_DAC2_ENUM_ID1 \ 219#define ENCODER_INTERNAL_SDVOA_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
209 (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\ 220 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
210 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\ 221 ENCODER_OBJECT_ID_INTERNAL_SDVOA << OBJECT_ID_SHIFT)
211 ENCODER_OBJECT_ID_INTERNAL_DAC2 << OBJECT_ID_SHIFT) 222
212 223#define ENCODER_INTERNAL_SDVOA_ENUM_ID2 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
213#define ENCODER_INTERNAL_SDVOA_ENUM_ID1 \ 224 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
214 (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\ 225 ENCODER_OBJECT_ID_INTERNAL_SDVOA << OBJECT_ID_SHIFT)
215 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\ 226
216 ENCODER_OBJECT_ID_INTERNAL_SDVOA << OBJECT_ID_SHIFT) 227#define ENCODER_INTERNAL_SDVOB_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
217 228 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
218#define ENCODER_INTERNAL_SDVOA_ENUM_ID2 \ 229 ENCODER_OBJECT_ID_INTERNAL_SDVOB << OBJECT_ID_SHIFT)
219 (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\ 230
220 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\ 231#define ENCODER_SIL170B_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
221 ENCODER_OBJECT_ID_INTERNAL_SDVOA << OBJECT_ID_SHIFT) 232 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
222 233 ENCODER_OBJECT_ID_SI170B << OBJECT_ID_SHIFT)
223#define ENCODER_INTERNAL_SDVOB_ENUM_ID1 \ 234
224 (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\ 235#define ENCODER_CH7303_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
225 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\ 236 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
226 ENCODER_OBJECT_ID_INTERNAL_SDVOB << OBJECT_ID_SHIFT) 237 ENCODER_OBJECT_ID_CH7303 << OBJECT_ID_SHIFT)
227 238
228#define ENCODER_SIL170B_ENUM_ID1 \ 239#define ENCODER_CH7301_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
229 (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\ 240 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
230 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\ 241 ENCODER_OBJECT_ID_CH7301 << OBJECT_ID_SHIFT)
231 ENCODER_OBJECT_ID_SI170B << OBJECT_ID_SHIFT) 242
232 243#define ENCODER_INTERNAL_DVO1_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
233#define ENCODER_CH7303_ENUM_ID1 \ 244 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
234 (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\ 245 ENCODER_OBJECT_ID_INTERNAL_DVO1 << OBJECT_ID_SHIFT)
235 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\ 246
236 ENCODER_OBJECT_ID_CH7303 << OBJECT_ID_SHIFT) 247#define ENCODER_EXTERNAL_SDVOA_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
237 248 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
238#define ENCODER_CH7301_ENUM_ID1 \ 249 ENCODER_OBJECT_ID_EXTERNAL_SDVOA << OBJECT_ID_SHIFT)
239 (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\ 250
240 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\ 251#define ENCODER_EXTERNAL_SDVOA_ENUM_ID2 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
241 ENCODER_OBJECT_ID_CH7301 << OBJECT_ID_SHIFT) 252 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
242 253 ENCODER_OBJECT_ID_EXTERNAL_SDVOA << OBJECT_ID_SHIFT)
243#define ENCODER_INTERNAL_DVO1_ENUM_ID1 \ 254
244 (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\ 255
245 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\ 256#define ENCODER_EXTERNAL_SDVOB_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
246 ENCODER_OBJECT_ID_INTERNAL_DVO1 << OBJECT_ID_SHIFT) 257 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
247 258 ENCODER_OBJECT_ID_EXTERNAL_SDVOB << OBJECT_ID_SHIFT)
248#define ENCODER_EXTERNAL_SDVOA_ENUM_ID1 \ 259
249 (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\ 260
250 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\ 261#define ENCODER_TITFP513_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
251 ENCODER_OBJECT_ID_EXTERNAL_SDVOA << OBJECT_ID_SHIFT) 262 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
252 263 ENCODER_OBJECT_ID_TITFP513 << OBJECT_ID_SHIFT)
253#define ENCODER_EXTERNAL_SDVOA_ENUM_ID2 \ 264
254 (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\ 265#define ENCODER_INTERNAL_LVTM1_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
255 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\ 266 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
256 ENCODER_OBJECT_ID_EXTERNAL_SDVOA << OBJECT_ID_SHIFT) 267 ENCODER_OBJECT_ID_INTERNAL_LVTM1 << OBJECT_ID_SHIFT)
257 268
258#define ENCODER_EXTERNAL_SDVOB_ENUM_ID1 \ 269#define ENCODER_VT1623_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
259 (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\ 270 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
260 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\ 271 ENCODER_OBJECT_ID_VT1623 << OBJECT_ID_SHIFT)
261 ENCODER_OBJECT_ID_EXTERNAL_SDVOB << OBJECT_ID_SHIFT) 272
262 273#define ENCODER_HDMI_SI1930_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
263#define ENCODER_TITFP513_ENUM_ID1 \ 274 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
264 (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\ 275 ENCODER_OBJECT_ID_HDMI_SI1930 << OBJECT_ID_SHIFT)
265 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\ 276
266 ENCODER_OBJECT_ID_TITFP513 << OBJECT_ID_SHIFT) 277#define ENCODER_HDMI_INTERNAL_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
267 278 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
268#define ENCODER_INTERNAL_LVTM1_ENUM_ID1 \ 279 ENCODER_OBJECT_ID_HDMI_INTERNAL << OBJECT_ID_SHIFT)
269 (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\ 280
270 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\ 281#define ENCODER_INTERNAL_KLDSCP_TMDS1_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
271 ENCODER_OBJECT_ID_INTERNAL_LVTM1 << OBJECT_ID_SHIFT) 282 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
272 283 ENCODER_OBJECT_ID_INTERNAL_KLDSCP_TMDS1 << OBJECT_ID_SHIFT)
273#define ENCODER_VT1623_ENUM_ID1 \ 284
274 (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\ 285
275 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\ 286#define ENCODER_INTERNAL_KLDSCP_TMDS1_ENUM_ID2 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
276 ENCODER_OBJECT_ID_VT1623 << OBJECT_ID_SHIFT) 287 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
277 288 ENCODER_OBJECT_ID_INTERNAL_KLDSCP_TMDS1 << OBJECT_ID_SHIFT)
278#define ENCODER_HDMI_SI1930_ENUM_ID1 \ 289
279 (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\ 290
280 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\ 291#define ENCODER_INTERNAL_KLDSCP_DVO1_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
281 ENCODER_OBJECT_ID_HDMI_SI1930 << OBJECT_ID_SHIFT) 292 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
282 293 ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DVO1 << OBJECT_ID_SHIFT)
283#define ENCODER_HDMI_INTERNAL_ENUM_ID1 \ 294
284 (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\ 295#define ENCODER_INTERNAL_KLDSCP_DAC1_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
285 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\ 296 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
286 ENCODER_OBJECT_ID_HDMI_INTERNAL << OBJECT_ID_SHIFT) 297 ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC1 << OBJECT_ID_SHIFT)
287 298
288#define ENCODER_INTERNAL_KLDSCP_TMDS1_ENUM_ID1 \ 299#define ENCODER_INTERNAL_KLDSCP_DAC2_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
289 (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\ 300 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
290 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\ 301 ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC2 << OBJECT_ID_SHIFT) // Shared with CV/TV and CRT
291 ENCODER_OBJECT_ID_INTERNAL_KLDSCP_TMDS1 << OBJECT_ID_SHIFT) 302
292 303#define ENCODER_SI178_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
293#define ENCODER_INTERNAL_KLDSCP_TMDS1_ENUM_ID2 \ 304 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
294 (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\ 305 ENCODER_OBJECT_ID_SI178 << OBJECT_ID_SHIFT)
295 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\ 306
296 ENCODER_OBJECT_ID_INTERNAL_KLDSCP_TMDS1 << OBJECT_ID_SHIFT) 307#define ENCODER_MVPU_FPGA_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
297 308 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
298#define ENCODER_INTERNAL_KLDSCP_DVO1_ENUM_ID1 \ 309 ENCODER_OBJECT_ID_MVPU_FPGA << OBJECT_ID_SHIFT)
299 (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\ 310
300 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\ 311#define ENCODER_INTERNAL_DDI_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
301 ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DVO1 << OBJECT_ID_SHIFT) 312 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
302 313 ENCODER_OBJECT_ID_INTERNAL_DDI << OBJECT_ID_SHIFT)
303#define ENCODER_INTERNAL_KLDSCP_DAC1_ENUM_ID1 \ 314
304 (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\ 315#define ENCODER_VT1625_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
305 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\ 316 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
306 ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC1 << OBJECT_ID_SHIFT) 317 ENCODER_OBJECT_ID_VT1625 << OBJECT_ID_SHIFT)
307 318
308#define ENCODER_INTERNAL_KLDSCP_DAC2_ENUM_ID1 \ 319#define ENCODER_HDMI_SI1932_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
309 (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\ 320 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
310 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\ 321 ENCODER_OBJECT_ID_HDMI_SI1932 << OBJECT_ID_SHIFT)
311 ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC2 << OBJECT_ID_SHIFT) /* Shared with CV/TV and CRT */ 322
312 323#define ENCODER_DP_DP501_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
313#define ENCODER_SI178_ENUM_ID1 \ 324 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
314 (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\ 325 ENCODER_OBJECT_ID_DP_DP501 << OBJECT_ID_SHIFT)
315 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\ 326
316 ENCODER_OBJECT_ID_SI178 << OBJECT_ID_SHIFT) 327#define ENCODER_DP_AN9801_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
317 328 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
318#define ENCODER_MVPU_FPGA_ENUM_ID1 \ 329 ENCODER_OBJECT_ID_DP_AN9801 << OBJECT_ID_SHIFT)
319 (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\ 330
320 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\ 331#define ENCODER_INTERNAL_UNIPHY_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
321 ENCODER_OBJECT_ID_MVPU_FPGA << OBJECT_ID_SHIFT) 332 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
322 333 ENCODER_OBJECT_ID_INTERNAL_UNIPHY << OBJECT_ID_SHIFT)
323#define ENCODER_INTERNAL_DDI_ENUM_ID1 \ 334
324 (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\ 335#define ENCODER_INTERNAL_UNIPHY_ENUM_ID2 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
325 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\ 336 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
326 ENCODER_OBJECT_ID_INTERNAL_DDI << OBJECT_ID_SHIFT) 337 ENCODER_OBJECT_ID_INTERNAL_UNIPHY << OBJECT_ID_SHIFT)
327 338
328#define ENCODER_VT1625_ENUM_ID1 \ 339#define ENCODER_INTERNAL_KLDSCP_LVTMA_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
329 (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\ 340 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
330 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\ 341 ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA << OBJECT_ID_SHIFT)
331 ENCODER_OBJECT_ID_VT1625 << OBJECT_ID_SHIFT) 342
332 343#define ENCODER_INTERNAL_UNIPHY1_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
333#define ENCODER_HDMI_SI1932_ENUM_ID1 \ 344 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
334 (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\ 345 ENCODER_OBJECT_ID_INTERNAL_UNIPHY1 << OBJECT_ID_SHIFT)
335 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\ 346
336 ENCODER_OBJECT_ID_HDMI_SI1932 << OBJECT_ID_SHIFT) 347#define ENCODER_INTERNAL_UNIPHY1_ENUM_ID2 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
337 348 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
338#define ENCODER_DP_DP501_ENUM_ID1 \ 349 ENCODER_OBJECT_ID_INTERNAL_UNIPHY1 << OBJECT_ID_SHIFT)
339 (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\ 350
340 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\ 351#define ENCODER_INTERNAL_UNIPHY2_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
341 ENCODER_OBJECT_ID_DP_DP501 << OBJECT_ID_SHIFT) 352 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
342 353 ENCODER_OBJECT_ID_INTERNAL_UNIPHY2 << OBJECT_ID_SHIFT)
343#define ENCODER_DP_AN9801_ENUM_ID1 \ 354
344 (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\ 355#define ENCODER_INTERNAL_UNIPHY2_ENUM_ID2 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
345 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\ 356 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
346 ENCODER_OBJECT_ID_DP_AN9801 << OBJECT_ID_SHIFT) 357 ENCODER_OBJECT_ID_INTERNAL_UNIPHY2 << OBJECT_ID_SHIFT)
347 358
348#define ENCODER_INTERNAL_UNIPHY_ENUM_ID1 \ 359#define ENCODER_GENERAL_EXTERNAL_DVO_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
349 (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\ 360 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
350 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\ 361 ENCODER_OBJECT_ID_GENERAL_EXTERNAL_DVO << OBJECT_ID_SHIFT)
351 ENCODER_OBJECT_ID_INTERNAL_UNIPHY << OBJECT_ID_SHIFT)
352
353#define ENCODER_INTERNAL_UNIPHY_ENUM_ID2 \
354 (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
355 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
356 ENCODER_OBJECT_ID_INTERNAL_UNIPHY << OBJECT_ID_SHIFT)
357
358#define ENCODER_INTERNAL_KLDSCP_LVTMA_ENUM_ID1 \
359 (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
360 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
361 ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA << OBJECT_ID_SHIFT)
362
363#define ENCODER_INTERNAL_UNIPHY1_ENUM_ID1 \
364 (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
365 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
366 ENCODER_OBJECT_ID_INTERNAL_UNIPHY1 << OBJECT_ID_SHIFT)
367
368#define ENCODER_INTERNAL_UNIPHY1_ENUM_ID2 \
369 (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
370 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
371 ENCODER_OBJECT_ID_INTERNAL_UNIPHY1 << OBJECT_ID_SHIFT)
372
373#define ENCODER_INTERNAL_UNIPHY2_ENUM_ID1 \
374 (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
375 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
376 ENCODER_OBJECT_ID_INTERNAL_UNIPHY2 << OBJECT_ID_SHIFT)
377
378#define ENCODER_INTERNAL_UNIPHY2_ENUM_ID2 \
379 (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
380 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
381 ENCODER_OBJECT_ID_INTERNAL_UNIPHY2 << OBJECT_ID_SHIFT)
382
383#define ENCODER_GENERAL_EXTERNAL_DVO_ENUM_ID1 \
384 (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
385 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
386 ENCODER_OBJECT_ID_GENERAL_EXTERNAL_DVO << OBJECT_ID_SHIFT)
387 362
388/****************************************************/ 363/****************************************************/
389/* Connector Object ID definition - Shared with BIOS */ 364/* Connector Object ID definition - Shared with BIOS */
@@ -406,167 +381,253 @@
406#define CONNECTOR_7PIN_DIN_ENUM_ID1 0x310F 381#define CONNECTOR_7PIN_DIN_ENUM_ID1 0x310F
407#define CONNECTOR_PCIE_CONNECTOR_ENUM_ID1 0x3110 382#define CONNECTOR_PCIE_CONNECTOR_ENUM_ID1 0x3110
408*/ 383*/
409#define CONNECTOR_LVDS_ENUM_ID1 \ 384#define CONNECTOR_LVDS_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
410 (GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\ 385 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
411 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\ 386 CONNECTOR_OBJECT_ID_LVDS << OBJECT_ID_SHIFT)
412 CONNECTOR_OBJECT_ID_LVDS << OBJECT_ID_SHIFT) 387
413 388#define CONNECTOR_LVDS_ENUM_ID2 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
414#define CONNECTOR_SINGLE_LINK_DVI_I_ENUM_ID1 \ 389 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
415 (GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\ 390 CONNECTOR_OBJECT_ID_LVDS << OBJECT_ID_SHIFT)
416 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\ 391
417 CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_I << OBJECT_ID_SHIFT) 392#define CONNECTOR_eDP_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
418 393 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
419#define CONNECTOR_SINGLE_LINK_DVI_I_ENUM_ID2 \ 394 CONNECTOR_OBJECT_ID_eDP << OBJECT_ID_SHIFT)
420 (GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\ 395
421 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\ 396#define CONNECTOR_eDP_ENUM_ID2 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
422 CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_I << OBJECT_ID_SHIFT) 397 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
423 398 CONNECTOR_OBJECT_ID_eDP << OBJECT_ID_SHIFT)
424#define CONNECTOR_DUAL_LINK_DVI_I_ENUM_ID1 \ 399
425 (GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\ 400#define CONNECTOR_SINGLE_LINK_DVI_I_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
426 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\ 401 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
427 CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_I << OBJECT_ID_SHIFT) 402 CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_I << OBJECT_ID_SHIFT)
428 403
429#define CONNECTOR_DUAL_LINK_DVI_I_ENUM_ID2 \ 404#define CONNECTOR_SINGLE_LINK_DVI_I_ENUM_ID2 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
430 (GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\ 405 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
431 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\ 406 CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_I << OBJECT_ID_SHIFT)
432 CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_I << OBJECT_ID_SHIFT) 407
433 408#define CONNECTOR_DUAL_LINK_DVI_I_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
434#define CONNECTOR_SINGLE_LINK_DVI_D_ENUM_ID1 \ 409 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
435 (GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\ 410 CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_I << OBJECT_ID_SHIFT)
436 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\ 411
437 CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_D << OBJECT_ID_SHIFT) 412#define CONNECTOR_DUAL_LINK_DVI_I_ENUM_ID2 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
438 413 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
439#define CONNECTOR_SINGLE_LINK_DVI_D_ENUM_ID2 \ 414 CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_I << OBJECT_ID_SHIFT)
440 (GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\ 415
441 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\ 416#define CONNECTOR_SINGLE_LINK_DVI_D_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
442 CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_D << OBJECT_ID_SHIFT) 417 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
443 418 CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_D << OBJECT_ID_SHIFT)
444#define CONNECTOR_DUAL_LINK_DVI_D_ENUM_ID1 \ 419
445 (GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\ 420#define CONNECTOR_SINGLE_LINK_DVI_D_ENUM_ID2 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
446 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\ 421 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
447 CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_D << OBJECT_ID_SHIFT) 422 CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_D << OBJECT_ID_SHIFT)
448 423
449#define CONNECTOR_VGA_ENUM_ID1 \ 424#define CONNECTOR_DUAL_LINK_DVI_D_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
450 (GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\ 425 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
451 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\ 426 CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_D << OBJECT_ID_SHIFT)
452 CONNECTOR_OBJECT_ID_VGA << OBJECT_ID_SHIFT) 427
453 428#define CONNECTOR_DUAL_LINK_DVI_D_ENUM_ID2 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
454#define CONNECTOR_VGA_ENUM_ID2 \ 429 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
455 (GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\ 430 CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_D << OBJECT_ID_SHIFT)
456 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\ 431
457 CONNECTOR_OBJECT_ID_VGA << OBJECT_ID_SHIFT) 432#define CONNECTOR_DUAL_LINK_DVI_D_ENUM_ID3 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
458 433 GRAPH_OBJECT_ENUM_ID3 << ENUM_ID_SHIFT |\
459#define CONNECTOR_COMPOSITE_ENUM_ID1 \ 434 CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_D << OBJECT_ID_SHIFT)
460 (GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\ 435
461 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\ 436#define CONNECTOR_VGA_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
462 CONNECTOR_OBJECT_ID_COMPOSITE << OBJECT_ID_SHIFT) 437 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
463 438 CONNECTOR_OBJECT_ID_VGA << OBJECT_ID_SHIFT)
464#define CONNECTOR_SVIDEO_ENUM_ID1 \ 439
465 (GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\ 440#define CONNECTOR_VGA_ENUM_ID2 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
466 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\ 441 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
467 CONNECTOR_OBJECT_ID_SVIDEO << OBJECT_ID_SHIFT) 442 CONNECTOR_OBJECT_ID_VGA << OBJECT_ID_SHIFT)
468 443
469#define CONNECTOR_YPbPr_ENUM_ID1 \ 444#define CONNECTOR_COMPOSITE_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
470 (GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\ 445 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
471 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\ 446 CONNECTOR_OBJECT_ID_COMPOSITE << OBJECT_ID_SHIFT)
472 CONNECTOR_OBJECT_ID_YPbPr << OBJECT_ID_SHIFT) 447
473 448#define CONNECTOR_COMPOSITE_ENUM_ID2 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
474#define CONNECTOR_D_CONNECTOR_ENUM_ID1 \ 449 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
475 (GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\ 450 CONNECTOR_OBJECT_ID_COMPOSITE << OBJECT_ID_SHIFT)
476 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\ 451
477 CONNECTOR_OBJECT_ID_D_CONNECTOR << OBJECT_ID_SHIFT) 452#define CONNECTOR_SVIDEO_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
478 453 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
479#define CONNECTOR_9PIN_DIN_ENUM_ID1 \ 454 CONNECTOR_OBJECT_ID_SVIDEO << OBJECT_ID_SHIFT)
480 (GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\ 455
481 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\ 456#define CONNECTOR_SVIDEO_ENUM_ID2 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
482 CONNECTOR_OBJECT_ID_9PIN_DIN << OBJECT_ID_SHIFT) 457 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
483 458 CONNECTOR_OBJECT_ID_SVIDEO << OBJECT_ID_SHIFT)
484#define CONNECTOR_SCART_ENUM_ID1 \ 459
485 (GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\ 460#define CONNECTOR_YPbPr_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
486 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\ 461 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
487 CONNECTOR_OBJECT_ID_SCART << OBJECT_ID_SHIFT) 462 CONNECTOR_OBJECT_ID_YPbPr << OBJECT_ID_SHIFT)
488 463
489#define CONNECTOR_HDMI_TYPE_A_ENUM_ID1 \ 464#define CONNECTOR_YPbPr_ENUM_ID2 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
490 (GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\ 465 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
491 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\ 466 CONNECTOR_OBJECT_ID_YPbPr << OBJECT_ID_SHIFT)
492 CONNECTOR_OBJECT_ID_HDMI_TYPE_A << OBJECT_ID_SHIFT) 467
493 468#define CONNECTOR_D_CONNECTOR_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
494#define CONNECTOR_HDMI_TYPE_B_ENUM_ID1 \ 469 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
495 (GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\ 470 CONNECTOR_OBJECT_ID_D_CONNECTOR << OBJECT_ID_SHIFT)
496 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\ 471
497 CONNECTOR_OBJECT_ID_HDMI_TYPE_B << OBJECT_ID_SHIFT) 472#define CONNECTOR_D_CONNECTOR_ENUM_ID2 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
498 473 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
499#define CONNECTOR_7PIN_DIN_ENUM_ID1 \ 474 CONNECTOR_OBJECT_ID_D_CONNECTOR << OBJECT_ID_SHIFT)
500 (GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\ 475
501 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\ 476#define CONNECTOR_9PIN_DIN_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
502 CONNECTOR_OBJECT_ID_7PIN_DIN << OBJECT_ID_SHIFT) 477 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
503 478 CONNECTOR_OBJECT_ID_9PIN_DIN << OBJECT_ID_SHIFT)
504#define CONNECTOR_PCIE_CONNECTOR_ENUM_ID1 \ 479
505 (GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\ 480#define CONNECTOR_9PIN_DIN_ENUM_ID2 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
506 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\ 481 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
507 CONNECTOR_OBJECT_ID_PCIE_CONNECTOR << OBJECT_ID_SHIFT) 482 CONNECTOR_OBJECT_ID_9PIN_DIN << OBJECT_ID_SHIFT)
508 483
509#define CONNECTOR_PCIE_CONNECTOR_ENUM_ID2 \ 484#define CONNECTOR_SCART_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
510 (GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\ 485 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
511 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\ 486 CONNECTOR_OBJECT_ID_SCART << OBJECT_ID_SHIFT)
512 CONNECTOR_OBJECT_ID_PCIE_CONNECTOR << OBJECT_ID_SHIFT) 487
513 488#define CONNECTOR_SCART_ENUM_ID2 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
514#define CONNECTOR_CROSSFIRE_ENUM_ID1 \ 489 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
515 (GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\ 490 CONNECTOR_OBJECT_ID_SCART << OBJECT_ID_SHIFT)
516 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\ 491
517 CONNECTOR_OBJECT_ID_CROSSFIRE << OBJECT_ID_SHIFT) 492#define CONNECTOR_HDMI_TYPE_A_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
518 493 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
519#define CONNECTOR_CROSSFIRE_ENUM_ID2 \ 494 CONNECTOR_OBJECT_ID_HDMI_TYPE_A << OBJECT_ID_SHIFT)
520 (GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\ 495
521 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\ 496#define CONNECTOR_HDMI_TYPE_A_ENUM_ID2 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
522 CONNECTOR_OBJECT_ID_CROSSFIRE << OBJECT_ID_SHIFT) 497 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
523 498 CONNECTOR_OBJECT_ID_HDMI_TYPE_A << OBJECT_ID_SHIFT)
524#define CONNECTOR_HARDCODE_DVI_ENUM_ID1 \ 499
525 (GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\ 500#define CONNECTOR_HDMI_TYPE_A_ENUM_ID3 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
526 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\ 501 GRAPH_OBJECT_ENUM_ID3 << ENUM_ID_SHIFT |\
527 CONNECTOR_OBJECT_ID_HARDCODE_DVI << OBJECT_ID_SHIFT) 502 CONNECTOR_OBJECT_ID_HDMI_TYPE_A << OBJECT_ID_SHIFT)
528 503
529#define CONNECTOR_HARDCODE_DVI_ENUM_ID2 \ 504#define CONNECTOR_HDMI_TYPE_B_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
530 (GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\ 505 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
531 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\ 506 CONNECTOR_OBJECT_ID_HDMI_TYPE_B << OBJECT_ID_SHIFT)
532 CONNECTOR_OBJECT_ID_HARDCODE_DVI << OBJECT_ID_SHIFT) 507
533 508#define CONNECTOR_HDMI_TYPE_B_ENUM_ID2 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
534#define CONNECTOR_DISPLAYPORT_ENUM_ID1 \ 509 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
535 (GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\ 510 CONNECTOR_OBJECT_ID_HDMI_TYPE_B << OBJECT_ID_SHIFT)
536 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\ 511
537 CONNECTOR_OBJECT_ID_DISPLAYPORT << OBJECT_ID_SHIFT) 512#define CONNECTOR_7PIN_DIN_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
538 513 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
539#define CONNECTOR_DISPLAYPORT_ENUM_ID2 \ 514 CONNECTOR_OBJECT_ID_7PIN_DIN << OBJECT_ID_SHIFT)
540 (GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\ 515#define CONNECTOR_7PIN_DIN_ENUM_ID2 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
541 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\ 516 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
542 CONNECTOR_OBJECT_ID_DISPLAYPORT << OBJECT_ID_SHIFT) 517 CONNECTOR_OBJECT_ID_7PIN_DIN << OBJECT_ID_SHIFT)
543 518
544#define CONNECTOR_DISPLAYPORT_ENUM_ID3 \ 519#define CONNECTOR_PCIE_CONNECTOR_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
545 (GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\ 520 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
546 GRAPH_OBJECT_ENUM_ID3 << ENUM_ID_SHIFT |\ 521 CONNECTOR_OBJECT_ID_PCIE_CONNECTOR << OBJECT_ID_SHIFT)
547 CONNECTOR_OBJECT_ID_DISPLAYPORT << OBJECT_ID_SHIFT) 522
548 523#define CONNECTOR_PCIE_CONNECTOR_ENUM_ID2 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
549#define CONNECTOR_DISPLAYPORT_ENUM_ID4 \ 524 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
550 (GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\ 525 CONNECTOR_OBJECT_ID_PCIE_CONNECTOR << OBJECT_ID_SHIFT)
551 GRAPH_OBJECT_ENUM_ID4 << ENUM_ID_SHIFT |\ 526
552 CONNECTOR_OBJECT_ID_DISPLAYPORT << OBJECT_ID_SHIFT) 527#define CONNECTOR_CROSSFIRE_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
528 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
529 CONNECTOR_OBJECT_ID_CROSSFIRE << OBJECT_ID_SHIFT)
530
531#define CONNECTOR_CROSSFIRE_ENUM_ID2 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
532 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
533 CONNECTOR_OBJECT_ID_CROSSFIRE << OBJECT_ID_SHIFT)
534
535
536#define CONNECTOR_HARDCODE_DVI_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
537 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
538 CONNECTOR_OBJECT_ID_HARDCODE_DVI << OBJECT_ID_SHIFT)
539
540#define CONNECTOR_HARDCODE_DVI_ENUM_ID2 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
541 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
542 CONNECTOR_OBJECT_ID_HARDCODE_DVI << OBJECT_ID_SHIFT)
543
544#define CONNECTOR_DISPLAYPORT_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
545 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
546 CONNECTOR_OBJECT_ID_DISPLAYPORT << OBJECT_ID_SHIFT)
547
548#define CONNECTOR_DISPLAYPORT_ENUM_ID2 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
549 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
550 CONNECTOR_OBJECT_ID_DISPLAYPORT << OBJECT_ID_SHIFT)
551
552#define CONNECTOR_DISPLAYPORT_ENUM_ID3 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
553 GRAPH_OBJECT_ENUM_ID3 << ENUM_ID_SHIFT |\
554 CONNECTOR_OBJECT_ID_DISPLAYPORT << OBJECT_ID_SHIFT)
555
556#define CONNECTOR_DISPLAYPORT_ENUM_ID4 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
557 GRAPH_OBJECT_ENUM_ID4 << ENUM_ID_SHIFT |\
558 CONNECTOR_OBJECT_ID_DISPLAYPORT << OBJECT_ID_SHIFT)
559
560#define CONNECTOR_DISPLAYPORT_ENUM_ID5 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
561 GRAPH_OBJECT_ENUM_ID5 << ENUM_ID_SHIFT |\
562 CONNECTOR_OBJECT_ID_DISPLAYPORT << OBJECT_ID_SHIFT)
563
564#define CONNECTOR_DISPLAYPORT_ENUM_ID6 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
565 GRAPH_OBJECT_ENUM_ID6 << ENUM_ID_SHIFT |\
566 CONNECTOR_OBJECT_ID_DISPLAYPORT << OBJECT_ID_SHIFT)
567
568#define CONNECTOR_MXM_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
569 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
570 CONNECTOR_OBJECT_ID_MXM << OBJECT_ID_SHIFT) //Mapping to MXM_DP_A
571
572#define CONNECTOR_MXM_ENUM_ID2 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
573 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
574 CONNECTOR_OBJECT_ID_MXM << OBJECT_ID_SHIFT) //Mapping to MXM_DP_B
575
576#define CONNECTOR_MXM_ENUM_ID3 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
577 GRAPH_OBJECT_ENUM_ID3 << ENUM_ID_SHIFT |\
578 CONNECTOR_OBJECT_ID_MXM << OBJECT_ID_SHIFT) //Mapping to MXM_DP_C
579
580#define CONNECTOR_MXM_ENUM_ID4 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
581 GRAPH_OBJECT_ENUM_ID4 << ENUM_ID_SHIFT |\
582 CONNECTOR_OBJECT_ID_MXM << OBJECT_ID_SHIFT) //Mapping to MXM_DP_D
583
584#define CONNECTOR_MXM_ENUM_ID5 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
585 GRAPH_OBJECT_ENUM_ID5 << ENUM_ID_SHIFT |\
586 CONNECTOR_OBJECT_ID_MXM << OBJECT_ID_SHIFT) //Mapping to MXM_LVDS_TXxx
587
588#define CONNECTOR_MXM_ENUM_ID6 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
589 GRAPH_OBJECT_ENUM_ID6 << ENUM_ID_SHIFT |\
590 CONNECTOR_OBJECT_ID_MXM << OBJECT_ID_SHIFT) //Mapping to MXM_LVDS_UXxx
591
592#define CONNECTOR_MXM_ENUM_ID7 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
593 GRAPH_OBJECT_ENUM_ID7 << ENUM_ID_SHIFT |\
594 CONNECTOR_OBJECT_ID_MXM << OBJECT_ID_SHIFT) //Mapping to MXM_DAC
553 595
554/****************************************************/ 596/****************************************************/
555/* Router Object ID definition - Shared with BIOS */ 597/* Router Object ID definition - Shared with BIOS */
556/****************************************************/ 598/****************************************************/
557#define ROUTER_I2C_EXTENDER_CNTL_ENUM_ID1 \ 599#define ROUTER_I2C_EXTENDER_CNTL_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ROUTER << OBJECT_TYPE_SHIFT |\
558 (GRAPH_OBJECT_TYPE_ROUTER << OBJECT_TYPE_SHIFT |\ 600 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
559 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\ 601 ROUTER_OBJECT_ID_I2C_EXTENDER_CNTL << OBJECT_ID_SHIFT)
560 ROUTER_OBJECT_ID_I2C_EXTENDER_CNTL << OBJECT_ID_SHIFT)
561 602
562/* deleted */ 603/* deleted */
563 604
564/****************************************************/ 605/****************************************************/
606/* Generic Object ID definition - Shared with BIOS */
607/****************************************************/
608#define GENERICOBJECT_GLSYNC_ENUM_ID1 (GRAPH_OBJECT_TYPE_GENERIC << OBJECT_TYPE_SHIFT |\
609 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
610 GENERIC_OBJECT_ID_GLSYNC << OBJECT_ID_SHIFT)
611
612#define GENERICOBJECT_PX2_NON_DRIVABLE_ID1 (GRAPH_OBJECT_TYPE_GENERIC << OBJECT_TYPE_SHIFT |\
613 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
614 GENERIC_OBJECT_ID_PX2_NON_DRIVABLE<< OBJECT_ID_SHIFT)
615
616#define GENERICOBJECT_PX2_NON_DRIVABLE_ID2 (GRAPH_OBJECT_TYPE_GENERIC << OBJECT_TYPE_SHIFT |\
617 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
618 GENERIC_OBJECT_ID_PX2_NON_DRIVABLE<< OBJECT_ID_SHIFT)
619
620#define GENERICOBJECT_MXM_OPM_ENUM_ID1 (GRAPH_OBJECT_TYPE_GENERIC << OBJECT_TYPE_SHIFT |\
621 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
622 GENERIC_OBJECT_ID_MXM_OPM << OBJECT_ID_SHIFT)
623
624/****************************************************/
565/* Object Cap definition - Shared with BIOS */ 625/* Object Cap definition - Shared with BIOS */
566/****************************************************/ 626/****************************************************/
567#define GRAPHICS_OBJECT_CAP_I2C 0x00000001L 627#define GRAPHICS_OBJECT_CAP_I2C 0x00000001L
568#define GRAPHICS_OBJECT_CAP_TABLE_ID 0x00000002L 628#define GRAPHICS_OBJECT_CAP_TABLE_ID 0x00000002L
569 629
630
570#define GRAPHICS_OBJECT_I2CCOMMAND_TABLE_ID 0x01 631#define GRAPHICS_OBJECT_I2CCOMMAND_TABLE_ID 0x01
571#define GRAPHICS_OBJECT_HOTPLUGDETECTIONINTERUPT_TABLE_ID 0x02 632#define GRAPHICS_OBJECT_HOTPLUGDETECTIONINTERUPT_TABLE_ID 0x02
572#define GRAPHICS_OBJECT_ENCODER_OUTPUT_PROTECTION_TABLE_ID 0x03 633#define GRAPHICS_OBJECT_ENCODER_OUTPUT_PROTECTION_TABLE_ID 0x03
@@ -575,4 +636,8 @@
575#pragma pack() 636#pragma pack()
576#endif 637#endif
577 638
578#endif /*GRAPHICTYPE */ 639#endif /*GRAPHICTYPE */
640
641
642
643
diff --git a/drivers/gpu/drm/radeon/atom.c b/drivers/gpu/drm/radeon/atom.c
index 6578d19dff93..7f152f66f196 100644
--- a/drivers/gpu/drm/radeon/atom.c
+++ b/drivers/gpu/drm/radeon/atom.c
@@ -24,6 +24,7 @@
24 24
25#include <linux/module.h> 25#include <linux/module.h>
26#include <linux/sched.h> 26#include <linux/sched.h>
27#include <asm/unaligned.h>
27 28
28#define ATOM_DEBUG 29#define ATOM_DEBUG
29 30
@@ -58,6 +59,7 @@ typedef struct {
58} atom_exec_context; 59} atom_exec_context;
59 60
60int atom_debug = 0; 61int atom_debug = 0;
62static void atom_execute_table_locked(struct atom_context *ctx, int index, uint32_t * params);
61void atom_execute_table(struct atom_context *ctx, int index, uint32_t * params); 63void atom_execute_table(struct atom_context *ctx, int index, uint32_t * params);
62 64
63static uint32_t atom_arg_mask[8] = 65static uint32_t atom_arg_mask[8] =
@@ -211,7 +213,9 @@ static uint32_t atom_get_src_int(atom_exec_context *ctx, uint8_t attr,
211 case ATOM_ARG_PS: 213 case ATOM_ARG_PS:
212 idx = U8(*ptr); 214 idx = U8(*ptr);
213 (*ptr)++; 215 (*ptr)++;
214 val = le32_to_cpu(ctx->ps[idx]); 216 /* get_unaligned_le32 avoids unaligned accesses from atombios
217 * tables, noticed on a DEC Alpha. */
218 val = get_unaligned_le32((u32 *)&ctx->ps[idx]);
215 if (print) 219 if (print)
216 DEBUG("PS[0x%02X,0x%04X]", idx, val); 220 DEBUG("PS[0x%02X,0x%04X]", idx, val);
217 break; 221 break;
@@ -245,6 +249,9 @@ static uint32_t atom_get_src_int(atom_exec_context *ctx, uint8_t attr,
245 case ATOM_WS_ATTRIBUTES: 249 case ATOM_WS_ATTRIBUTES:
246 val = gctx->io_attr; 250 val = gctx->io_attr;
247 break; 251 break;
252 case ATOM_WS_REGPTR:
253 val = gctx->reg_block;
254 break;
248 default: 255 default:
249 val = ctx->ws[idx]; 256 val = ctx->ws[idx];
250 } 257 }
@@ -384,6 +391,32 @@ static uint32_t atom_get_src(atom_exec_context *ctx, uint8_t attr, int *ptr)
384 return atom_get_src_int(ctx, attr, ptr, NULL, 1); 391 return atom_get_src_int(ctx, attr, ptr, NULL, 1);
385} 392}
386 393
394static uint32_t atom_get_src_direct(atom_exec_context *ctx, uint8_t align, int *ptr)
395{
396 uint32_t val = 0xCDCDCDCD;
397
398 switch (align) {
399 case ATOM_SRC_DWORD:
400 val = U32(*ptr);
401 (*ptr) += 4;
402 break;
403 case ATOM_SRC_WORD0:
404 case ATOM_SRC_WORD8:
405 case ATOM_SRC_WORD16:
406 val = U16(*ptr);
407 (*ptr) += 2;
408 break;
409 case ATOM_SRC_BYTE0:
410 case ATOM_SRC_BYTE8:
411 case ATOM_SRC_BYTE16:
412 case ATOM_SRC_BYTE24:
413 val = U8(*ptr);
414 (*ptr)++;
415 break;
416 }
417 return val;
418}
419
387static uint32_t atom_get_dst(atom_exec_context *ctx, int arg, uint8_t attr, 420static uint32_t atom_get_dst(atom_exec_context *ctx, int arg, uint8_t attr,
388 int *ptr, uint32_t *saved, int print) 421 int *ptr, uint32_t *saved, int print)
389{ 422{
@@ -481,6 +514,9 @@ static void atom_put_dst(atom_exec_context *ctx, int arg, uint8_t attr,
481 case ATOM_WS_ATTRIBUTES: 514 case ATOM_WS_ATTRIBUTES:
482 gctx->io_attr = val; 515 gctx->io_attr = val;
483 break; 516 break;
517 case ATOM_WS_REGPTR:
518 gctx->reg_block = val;
519 break;
484 default: 520 default:
485 ctx->ws[idx] = val; 521 ctx->ws[idx] = val;
486 } 522 }
@@ -573,7 +609,7 @@ static void atom_op_calltable(atom_exec_context *ctx, int *ptr, int arg)
573 else 609 else
574 SDEBUG(" table: %d\n", idx); 610 SDEBUG(" table: %d\n", idx);
575 if (U16(ctx->ctx->cmd_table + 4 + 2 * idx)) 611 if (U16(ctx->ctx->cmd_table + 4 + 2 * idx))
576 atom_execute_table(ctx->ctx, idx, ctx->ps + ctx->ps_shift); 612 atom_execute_table_locked(ctx->ctx, idx, ctx->ps + ctx->ps_shift);
577} 613}
578 614
579static void atom_op_clear(atom_exec_context *ctx, int *ptr, int arg) 615static void atom_op_clear(atom_exec_context *ctx, int *ptr, int arg)
@@ -607,7 +643,7 @@ static void atom_op_delay(atom_exec_context *ctx, int *ptr, int arg)
607 uint8_t count = U8((*ptr)++); 643 uint8_t count = U8((*ptr)++);
608 SDEBUG(" count: %d\n", count); 644 SDEBUG(" count: %d\n", count);
609 if (arg == ATOM_UNIT_MICROSEC) 645 if (arg == ATOM_UNIT_MICROSEC)
610 schedule_timeout_uninterruptible(usecs_to_jiffies(count)); 646 udelay(count);
611 else 647 else
612 schedule_timeout_uninterruptible(msecs_to_jiffies(count)); 648 schedule_timeout_uninterruptible(msecs_to_jiffies(count));
613} 649}
@@ -676,7 +712,7 @@ static void atom_op_mask(atom_exec_context *ctx, int *ptr, int arg)
676 SDEBUG(" dst: "); 712 SDEBUG(" dst: ");
677 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1); 713 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
678 SDEBUG(" src1: "); 714 SDEBUG(" src1: ");
679 src1 = atom_get_src(ctx, attr, ptr); 715 src1 = atom_get_src_direct(ctx, ((attr >> 3) & 7), ptr);
680 SDEBUG(" src2: "); 716 SDEBUG(" src2: ");
681 src2 = atom_get_src(ctx, attr, ptr); 717 src2 = atom_get_src(ctx, attr, ptr);
682 dst &= src1; 718 dst &= src1;
@@ -808,6 +844,38 @@ static void atom_op_setregblock(atom_exec_context *ctx, int *ptr, int arg)
808 SDEBUG(" base: 0x%04X\n", ctx->ctx->reg_block); 844 SDEBUG(" base: 0x%04X\n", ctx->ctx->reg_block);
809} 845}
810 846
847static void atom_op_shift_left(atom_exec_context *ctx, int *ptr, int arg)
848{
849 uint8_t attr = U8((*ptr)++), shift;
850 uint32_t saved, dst;
851 int dptr = *ptr;
852 attr &= 0x38;
853 attr |= atom_def_dst[attr >> 3] << 6;
854 SDEBUG(" dst: ");
855 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
856 shift = atom_get_src_direct(ctx, ATOM_SRC_BYTE0, ptr);
857 SDEBUG(" shift: %d\n", shift);
858 dst <<= shift;
859 SDEBUG(" dst: ");
860 atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
861}
862
863static void atom_op_shift_right(atom_exec_context *ctx, int *ptr, int arg)
864{
865 uint8_t attr = U8((*ptr)++), shift;
866 uint32_t saved, dst;
867 int dptr = *ptr;
868 attr &= 0x38;
869 attr |= atom_def_dst[attr >> 3] << 6;
870 SDEBUG(" dst: ");
871 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
872 shift = atom_get_src_direct(ctx, ATOM_SRC_BYTE0, ptr);
873 SDEBUG(" shift: %d\n", shift);
874 dst >>= shift;
875 SDEBUG(" dst: ");
876 atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
877}
878
811static void atom_op_shl(atom_exec_context *ctx, int *ptr, int arg) 879static void atom_op_shl(atom_exec_context *ctx, int *ptr, int arg)
812{ 880{
813 uint8_t attr = U8((*ptr)++), shift; 881 uint8_t attr = U8((*ptr)++), shift;
@@ -817,7 +885,7 @@ static void atom_op_shl(atom_exec_context *ctx, int *ptr, int arg)
817 attr |= atom_def_dst[attr >> 3] << 6; 885 attr |= atom_def_dst[attr >> 3] << 6;
818 SDEBUG(" dst: "); 886 SDEBUG(" dst: ");
819 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1); 887 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
820 shift = U8((*ptr)++); 888 shift = atom_get_src(ctx, attr, ptr);
821 SDEBUG(" shift: %d\n", shift); 889 SDEBUG(" shift: %d\n", shift);
822 dst <<= shift; 890 dst <<= shift;
823 SDEBUG(" dst: "); 891 SDEBUG(" dst: ");
@@ -833,7 +901,7 @@ static void atom_op_shr(atom_exec_context *ctx, int *ptr, int arg)
833 attr |= atom_def_dst[attr >> 3] << 6; 901 attr |= atom_def_dst[attr >> 3] << 6;
834 SDEBUG(" dst: "); 902 SDEBUG(" dst: ");
835 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1); 903 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
836 shift = U8((*ptr)++); 904 shift = atom_get_src(ctx, attr, ptr);
837 SDEBUG(" shift: %d\n", shift); 905 SDEBUG(" shift: %d\n", shift);
838 dst >>= shift; 906 dst >>= shift;
839 SDEBUG(" dst: "); 907 SDEBUG(" dst: ");
@@ -936,18 +1004,18 @@ static struct {
936 atom_op_or, ATOM_ARG_FB}, { 1004 atom_op_or, ATOM_ARG_FB}, {
937 atom_op_or, ATOM_ARG_PLL}, { 1005 atom_op_or, ATOM_ARG_PLL}, {
938 atom_op_or, ATOM_ARG_MC}, { 1006 atom_op_or, ATOM_ARG_MC}, {
939 atom_op_shl, ATOM_ARG_REG}, { 1007 atom_op_shift_left, ATOM_ARG_REG}, {
940 atom_op_shl, ATOM_ARG_PS}, { 1008 atom_op_shift_left, ATOM_ARG_PS}, {
941 atom_op_shl, ATOM_ARG_WS}, { 1009 atom_op_shift_left, ATOM_ARG_WS}, {
942 atom_op_shl, ATOM_ARG_FB}, { 1010 atom_op_shift_left, ATOM_ARG_FB}, {
943 atom_op_shl, ATOM_ARG_PLL}, { 1011 atom_op_shift_left, ATOM_ARG_PLL}, {
944 atom_op_shl, ATOM_ARG_MC}, { 1012 atom_op_shift_left, ATOM_ARG_MC}, {
945 atom_op_shr, ATOM_ARG_REG}, { 1013 atom_op_shift_right, ATOM_ARG_REG}, {
946 atom_op_shr, ATOM_ARG_PS}, { 1014 atom_op_shift_right, ATOM_ARG_PS}, {
947 atom_op_shr, ATOM_ARG_WS}, { 1015 atom_op_shift_right, ATOM_ARG_WS}, {
948 atom_op_shr, ATOM_ARG_FB}, { 1016 atom_op_shift_right, ATOM_ARG_FB}, {
949 atom_op_shr, ATOM_ARG_PLL}, { 1017 atom_op_shift_right, ATOM_ARG_PLL}, {
950 atom_op_shr, ATOM_ARG_MC}, { 1018 atom_op_shift_right, ATOM_ARG_MC}, {
951 atom_op_mul, ATOM_ARG_REG}, { 1019 atom_op_mul, ATOM_ARG_REG}, {
952 atom_op_mul, ATOM_ARG_PS}, { 1020 atom_op_mul, ATOM_ARG_PS}, {
953 atom_op_mul, ATOM_ARG_WS}, { 1021 atom_op_mul, ATOM_ARG_WS}, {
@@ -1040,7 +1108,7 @@ static struct {
1040 atom_op_shr, ATOM_ARG_MC}, { 1108 atom_op_shr, ATOM_ARG_MC}, {
1041atom_op_debug, 0},}; 1109atom_op_debug, 0},};
1042 1110
1043void atom_execute_table(struct atom_context *ctx, int index, uint32_t * params) 1111static void atom_execute_table_locked(struct atom_context *ctx, int index, uint32_t * params)
1044{ 1112{
1045 int base = CU16(ctx->cmd_table + 4 + 2 * index); 1113 int base = CU16(ctx->cmd_table + 4 + 2 * index);
1046 int len, ws, ps, ptr; 1114 int len, ws, ps, ptr;
@@ -1057,8 +1125,6 @@ void atom_execute_table(struct atom_context *ctx, int index, uint32_t * params)
1057 1125
1058 SDEBUG(">> execute %04X (len %d, WS %d, PS %d)\n", base, len, ws, ps); 1126 SDEBUG(">> execute %04X (len %d, WS %d, PS %d)\n", base, len, ws, ps);
1059 1127
1060 /* reset reg block */
1061 ctx->reg_block = 0;
1062 ectx.ctx = ctx; 1128 ectx.ctx = ctx;
1063 ectx.ps_shift = ps / 4; 1129 ectx.ps_shift = ps / 4;
1064 ectx.start = base; 1130 ectx.start = base;
@@ -1092,6 +1158,19 @@ void atom_execute_table(struct atom_context *ctx, int index, uint32_t * params)
1092 kfree(ectx.ws); 1158 kfree(ectx.ws);
1093} 1159}
1094 1160
1161void atom_execute_table(struct atom_context *ctx, int index, uint32_t * params)
1162{
1163 mutex_lock(&ctx->mutex);
1164 /* reset reg block */
1165 ctx->reg_block = 0;
1166 /* reset fb window */
1167 ctx->fb_base = 0;
1168 /* reset io mode */
1169 ctx->io_mode = ATOM_IO_MM;
1170 atom_execute_table_locked(ctx, index, params);
1171 mutex_unlock(&ctx->mutex);
1172}
1173
1095static int atom_iio_len[] = { 1, 2, 3, 3, 3, 3, 4, 4, 4, 3 }; 1174static int atom_iio_len[] = { 1, 2, 3, 3, 3, 3, 4, 4, 4, 3 };
1096 1175
1097static void atom_index_iio(struct atom_context *ctx, int base) 1176static void atom_index_iio(struct atom_context *ctx, int base)
diff --git a/drivers/gpu/drm/radeon/atom.h b/drivers/gpu/drm/radeon/atom.h
index 6671848e5ea1..bc73781423a1 100644
--- a/drivers/gpu/drm/radeon/atom.h
+++ b/drivers/gpu/drm/radeon/atom.h
@@ -91,6 +91,7 @@
91#define ATOM_WS_AND_MASK 0x45 91#define ATOM_WS_AND_MASK 0x45
92#define ATOM_WS_FB_WINDOW 0x46 92#define ATOM_WS_FB_WINDOW 0x46
93#define ATOM_WS_ATTRIBUTES 0x47 93#define ATOM_WS_ATTRIBUTES 0x47
94#define ATOM_WS_REGPTR 0x48
94 95
95#define ATOM_IIO_NOP 0 96#define ATOM_IIO_NOP 0
96#define ATOM_IIO_START 1 97#define ATOM_IIO_START 1
@@ -120,6 +121,7 @@ struct card_info {
120 121
121struct atom_context { 122struct atom_context {
122 struct card_info *card; 123 struct card_info *card;
124 struct mutex mutex;
123 void *bios; 125 void *bios;
124 uint32_t cmd_table, data_table; 126 uint32_t cmd_table, data_table;
125 uint16_t *iio; 127 uint16_t *iio;
diff --git a/drivers/gpu/drm/radeon/atombios.h b/drivers/gpu/drm/radeon/atombios.h
index 5f48515c77a7..91ad0d1c1b17 100644
--- a/drivers/gpu/drm/radeon/atombios.h
+++ b/drivers/gpu/drm/radeon/atombios.h
@@ -4690,6 +4690,205 @@ typedef struct _ATOM_POWERPLAY_INFO_V3 {
4690 ATOM_POWERMODE_INFO_V3 asPowerPlayInfo[ATOM_MAX_NUMBEROF_POWER_BLOCK]; 4690 ATOM_POWERMODE_INFO_V3 asPowerPlayInfo[ATOM_MAX_NUMBEROF_POWER_BLOCK];
4691} ATOM_POWERPLAY_INFO_V3; 4691} ATOM_POWERPLAY_INFO_V3;
4692 4692
4693/* New PPlib */
4694/**************************************************************************/
4695typedef struct _ATOM_PPLIB_THERMALCONTROLLER
4696
4697{
4698 UCHAR ucType; // one of ATOM_PP_THERMALCONTROLLER_*
4699 UCHAR ucI2cLine; // as interpreted by DAL I2C
4700 UCHAR ucI2cAddress;
4701 UCHAR ucFanParameters; // Fan Control Parameters.
4702 UCHAR ucFanMinRPM; // Fan Minimum RPM (hundreds) -- for display purposes only.
4703 UCHAR ucFanMaxRPM; // Fan Maximum RPM (hundreds) -- for display purposes only.
4704 UCHAR ucReserved; // ----
4705 UCHAR ucFlags; // to be defined
4706} ATOM_PPLIB_THERMALCONTROLLER;
4707
4708#define ATOM_PP_FANPARAMETERS_TACHOMETER_PULSES_PER_REVOLUTION_MASK 0x0f
4709#define ATOM_PP_FANPARAMETERS_NOFAN 0x80 // No fan is connected to this controller.
4710
4711#define ATOM_PP_THERMALCONTROLLER_NONE 0
4712#define ATOM_PP_THERMALCONTROLLER_LM63 1 // Not used by PPLib
4713#define ATOM_PP_THERMALCONTROLLER_ADM1032 2 // Not used by PPLib
4714#define ATOM_PP_THERMALCONTROLLER_ADM1030 3 // Not used by PPLib
4715#define ATOM_PP_THERMALCONTROLLER_MUA6649 4 // Not used by PPLib
4716#define ATOM_PP_THERMALCONTROLLER_LM64 5
4717#define ATOM_PP_THERMALCONTROLLER_F75375 6 // Not used by PPLib
4718#define ATOM_PP_THERMALCONTROLLER_RV6xx 7
4719#define ATOM_PP_THERMALCONTROLLER_RV770 8
4720#define ATOM_PP_THERMALCONTROLLER_ADT7473 9
4721
4722typedef struct _ATOM_PPLIB_STATE
4723{
4724 UCHAR ucNonClockStateIndex;
4725 UCHAR ucClockStateIndices[1]; // variable-sized
4726} ATOM_PPLIB_STATE;
4727
4728//// ATOM_PPLIB_POWERPLAYTABLE::ulPlatformCaps
4729#define ATOM_PP_PLATFORM_CAP_BACKBIAS 1
4730#define ATOM_PP_PLATFORM_CAP_POWERPLAY 2
4731#define ATOM_PP_PLATFORM_CAP_SBIOSPOWERSOURCE 4
4732#define ATOM_PP_PLATFORM_CAP_ASPM_L0s 8
4733#define ATOM_PP_PLATFORM_CAP_ASPM_L1 16
4734#define ATOM_PP_PLATFORM_CAP_HARDWAREDC 32
4735#define ATOM_PP_PLATFORM_CAP_GEMINIPRIMARY 64
4736#define ATOM_PP_PLATFORM_CAP_STEPVDDC 128
4737#define ATOM_PP_PLATFORM_CAP_VOLTAGECONTROL 256
4738#define ATOM_PP_PLATFORM_CAP_SIDEPORTCONTROL 512
4739#define ATOM_PP_PLATFORM_CAP_TURNOFFPLL_ASPML1 1024
4740#define ATOM_PP_PLATFORM_CAP_HTLINKCONTROL 2048
4741
4742typedef struct _ATOM_PPLIB_POWERPLAYTABLE
4743{
4744 ATOM_COMMON_TABLE_HEADER sHeader;
4745
4746 UCHAR ucDataRevision;
4747
4748 UCHAR ucNumStates;
4749 UCHAR ucStateEntrySize;
4750 UCHAR ucClockInfoSize;
4751 UCHAR ucNonClockSize;
4752
4753 // offset from start of this table to array of ucNumStates ATOM_PPLIB_STATE structures
4754 USHORT usStateArrayOffset;
4755
4756 // offset from start of this table to array of ASIC-specific structures,
4757 // currently ATOM_PPLIB_CLOCK_INFO.
4758 USHORT usClockInfoArrayOffset;
4759
4760 // offset from start of this table to array of ATOM_PPLIB_NONCLOCK_INFO
4761 USHORT usNonClockInfoArrayOffset;
4762
4763 USHORT usBackbiasTime; // in microseconds
4764 USHORT usVoltageTime; // in microseconds
4765 USHORT usTableSize; //the size of this structure, or the extended structure
4766
4767 ULONG ulPlatformCaps; // See ATOM_PPLIB_CAPS_*
4768
4769 ATOM_PPLIB_THERMALCONTROLLER sThermalController;
4770
4771 USHORT usBootClockInfoOffset;
4772 USHORT usBootNonClockInfoOffset;
4773
4774} ATOM_PPLIB_POWERPLAYTABLE;
4775
4776//// ATOM_PPLIB_NONCLOCK_INFO::usClassification
4777#define ATOM_PPLIB_CLASSIFICATION_UI_MASK 0x0007
4778#define ATOM_PPLIB_CLASSIFICATION_UI_SHIFT 0
4779#define ATOM_PPLIB_CLASSIFICATION_UI_NONE 0
4780#define ATOM_PPLIB_CLASSIFICATION_UI_BATTERY 1
4781#define ATOM_PPLIB_CLASSIFICATION_UI_BALANCED 3
4782#define ATOM_PPLIB_CLASSIFICATION_UI_PERFORMANCE 5
4783// 2, 4, 6, 7 are reserved
4784
4785#define ATOM_PPLIB_CLASSIFICATION_BOOT 0x0008
4786#define ATOM_PPLIB_CLASSIFICATION_THERMAL 0x0010
4787#define ATOM_PPLIB_CLASSIFICATION_LIMITEDPOWERSOURCE 0x0020
4788#define ATOM_PPLIB_CLASSIFICATION_REST 0x0040
4789#define ATOM_PPLIB_CLASSIFICATION_FORCED 0x0080
4790#define ATOM_PPLIB_CLASSIFICATION_3DPERFORMANCE 0x0100
4791#define ATOM_PPLIB_CLASSIFICATION_OVERDRIVETEMPLATE 0x0200
4792#define ATOM_PPLIB_CLASSIFICATION_UVDSTATE 0x0400
4793#define ATOM_PPLIB_CLASSIFICATION_3DLOW 0x0800
4794#define ATOM_PPLIB_CLASSIFICATION_ACPI 0x1000
4795// remaining 3 bits are reserved
4796
4797//// ATOM_PPLIB_NONCLOCK_INFO::ulCapsAndSettings
4798#define ATOM_PPLIB_SINGLE_DISPLAY_ONLY 0x00000001
4799#define ATOM_PPLIB_SUPPORTS_VIDEO_PLAYBACK 0x00000002
4800
4801// 0 is 2.5Gb/s, 1 is 5Gb/s
4802#define ATOM_PPLIB_PCIE_LINK_SPEED_MASK 0x00000004
4803#define ATOM_PPLIB_PCIE_LINK_SPEED_SHIFT 2
4804
4805// lanes - 1: 1, 2, 4, 8, 12, 16 permitted by PCIE spec
4806#define ATOM_PPLIB_PCIE_LINK_WIDTH_MASK 0x000000F8
4807#define ATOM_PPLIB_PCIE_LINK_WIDTH_SHIFT 3
4808
4809// lookup into reduced refresh-rate table
4810#define ATOM_PPLIB_LIMITED_REFRESHRATE_VALUE_MASK 0x00000F00
4811#define ATOM_PPLIB_LIMITED_REFRESHRATE_VALUE_SHIFT 8
4812
4813#define ATOM_PPLIB_LIMITED_REFRESHRATE_UNLIMITED 0
4814#define ATOM_PPLIB_LIMITED_REFRESHRATE_50HZ 1
4815// 2-15 TBD as needed.
4816
4817#define ATOM_PPLIB_SOFTWARE_DISABLE_LOADBALANCING 0x00001000
4818#define ATOM_PPLIB_SOFTWARE_ENABLE_SLEEP_FOR_TIMESTAMPS 0x00002000
4819#define ATOM_PPLIB_ENABLE_VARIBRIGHT 0x00008000
4820
4821#define ATOM_PPLIB_DISALLOW_ON_DC 0x00004000
4822
4823// Contained in an array starting at the offset
4824// in ATOM_PPLIB_POWERPLAYTABLE::usNonClockInfoArrayOffset.
4825// referenced from ATOM_PPLIB_STATE_INFO::ucNonClockStateIndex
4826typedef struct _ATOM_PPLIB_NONCLOCK_INFO
4827{
4828 USHORT usClassification;
4829 UCHAR ucMinTemperature;
4830 UCHAR ucMaxTemperature;
4831 ULONG ulCapsAndSettings;
4832 UCHAR ucRequiredPower;
4833 UCHAR ucUnused1[3];
4834} ATOM_PPLIB_NONCLOCK_INFO;
4835
4836// Contained in an array starting at the offset
4837// in ATOM_PPLIB_POWERPLAYTABLE::usClockInfoArrayOffset.
4838// referenced from ATOM_PPLIB_STATE::ucClockStateIndices
4839typedef struct _ATOM_PPLIB_R600_CLOCK_INFO
4840{
4841 USHORT usEngineClockLow;
4842 UCHAR ucEngineClockHigh;
4843
4844 USHORT usMemoryClockLow;
4845 UCHAR ucMemoryClockHigh;
4846
4847 USHORT usVDDC;
4848 USHORT usUnused1;
4849 USHORT usUnused2;
4850
4851 ULONG ulFlags; // ATOM_PPLIB_R600_FLAGS_*
4852
4853} ATOM_PPLIB_R600_CLOCK_INFO;
4854
4855// ulFlags in ATOM_PPLIB_R600_CLOCK_INFO
4856#define ATOM_PPLIB_R600_FLAGS_PCIEGEN2 1
4857#define ATOM_PPLIB_R600_FLAGS_UVDSAFE 2
4858#define ATOM_PPLIB_R600_FLAGS_BACKBIASENABLE 4
4859#define ATOM_PPLIB_R600_FLAGS_MEMORY_ODT_OFF 8
4860#define ATOM_PPLIB_R600_FLAGS_MEMORY_DLL_OFF 16
4861
4862typedef struct _ATOM_PPLIB_RS780_CLOCK_INFO
4863
4864{
4865 USHORT usLowEngineClockLow; // Low Engine clock in MHz (the same way as on the R600).
4866 UCHAR ucLowEngineClockHigh;
4867 USHORT usHighEngineClockLow; // High Engine clock in MHz.
4868 UCHAR ucHighEngineClockHigh;
4869 USHORT usMemoryClockLow; // For now one of the ATOM_PPLIB_RS780_SPMCLK_XXXX constants.
4870 UCHAR ucMemoryClockHigh; // Currentyl unused.
4871 UCHAR ucPadding; // For proper alignment and size.
4872 USHORT usVDDC; // For the 780, use: None, Low, High, Variable
4873 UCHAR ucMaxHTLinkWidth; // From SBIOS - {2, 4, 8, 16}
4874 UCHAR ucMinHTLinkWidth; // From SBIOS - {2, 4, 8, 16}. Effective only if CDLW enabled. Minimum down stream width could be bigger as display BW requriement.
4875 USHORT usHTLinkFreq; // See definition ATOM_PPLIB_RS780_HTLINKFREQ_xxx or in MHz(>=200).
4876 ULONG ulFlags;
4877} ATOM_PPLIB_RS780_CLOCK_INFO;
4878
4879#define ATOM_PPLIB_RS780_VOLTAGE_NONE 0
4880#define ATOM_PPLIB_RS780_VOLTAGE_LOW 1
4881#define ATOM_PPLIB_RS780_VOLTAGE_HIGH 2
4882#define ATOM_PPLIB_RS780_VOLTAGE_VARIABLE 3
4883
4884#define ATOM_PPLIB_RS780_SPMCLK_NONE 0 // We cannot change the side port memory clock, leave it as it is.
4885#define ATOM_PPLIB_RS780_SPMCLK_LOW 1
4886#define ATOM_PPLIB_RS780_SPMCLK_HIGH 2
4887
4888#define ATOM_PPLIB_RS780_HTLINKFREQ_NONE 0
4889#define ATOM_PPLIB_RS780_HTLINKFREQ_LOW 1
4890#define ATOM_PPLIB_RS780_HTLINKFREQ_HIGH 2
4891
4693/**************************************************************************/ 4892/**************************************************************************/
4694 4893
4695/* Following definitions are for compatiblity issue in different SW components. */ 4894/* Following definitions are for compatiblity issue in different SW components. */
diff --git a/drivers/gpu/drm/radeon/atombios_crtc.c b/drivers/gpu/drm/radeon/atombios_crtc.c
index 260fcf59f00c..af464e351fbd 100644
--- a/drivers/gpu/drm/radeon/atombios_crtc.c
+++ b/drivers/gpu/drm/radeon/atombios_crtc.c
@@ -307,7 +307,6 @@ atombios_set_crtc_dtd_timing(struct drm_crtc *crtc,
307 args.susModeMiscInfo.usAccess = cpu_to_le16(misc); 307 args.susModeMiscInfo.usAccess = cpu_to_le16(misc);
308 args.ucCRTC = radeon_crtc->crtc_id; 308 args.ucCRTC = radeon_crtc->crtc_id;
309 309
310 printk("executing set crtc dtd timing\n");
311 atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args); 310 atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args);
312} 311}
313 312
@@ -347,7 +346,6 @@ static void atombios_crtc_set_timing(struct drm_crtc *crtc,
347 args.susModeMiscInfo.usAccess = cpu_to_le16(misc); 346 args.susModeMiscInfo.usAccess = cpu_to_le16(misc);
348 args.ucCRTC = radeon_crtc->crtc_id; 347 args.ucCRTC = radeon_crtc->crtc_id;
349 348
350 printk("executing set crtc timing\n");
351 atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args); 349 atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args);
352} 350}
353 351
@@ -409,59 +407,57 @@ static void atombios_set_ss(struct drm_crtc *crtc, int enable)
409 } 407 }
410} 408}
411 409
412void atombios_crtc_set_pll(struct drm_crtc *crtc, struct drm_display_mode *mode) 410union adjust_pixel_clock {
411 ADJUST_DISPLAY_PLL_PS_ALLOCATION v1;
412};
413
414static u32 atombios_adjust_pll(struct drm_crtc *crtc,
415 struct drm_display_mode *mode,
416 struct radeon_pll *pll)
413{ 417{
414 struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
415 struct drm_device *dev = crtc->dev; 418 struct drm_device *dev = crtc->dev;
416 struct radeon_device *rdev = dev->dev_private; 419 struct radeon_device *rdev = dev->dev_private;
417 struct drm_encoder *encoder = NULL; 420 struct drm_encoder *encoder = NULL;
418 struct radeon_encoder *radeon_encoder = NULL; 421 struct radeon_encoder *radeon_encoder = NULL;
419 uint8_t frev, crev; 422 u32 adjusted_clock = mode->clock;
420 int index;
421 SET_PIXEL_CLOCK_PS_ALLOCATION args;
422 PIXEL_CLOCK_PARAMETERS *spc1_ptr;
423 PIXEL_CLOCK_PARAMETERS_V2 *spc2_ptr;
424 PIXEL_CLOCK_PARAMETERS_V3 *spc3_ptr;
425 uint32_t pll_clock = mode->clock;
426 uint32_t adjusted_clock;
427 uint32_t ref_div = 0, fb_div = 0, frac_fb_div = 0, post_div = 0;
428 struct radeon_pll *pll;
429 int pll_flags = 0;
430 423
431 memset(&args, 0, sizeof(args)); 424 /* reset the pll flags */
425 pll->flags = 0;
432 426
433 if (ASIC_IS_AVIVO(rdev)) { 427 if (ASIC_IS_AVIVO(rdev)) {
434 if ((rdev->family == CHIP_RS600) || 428 if ((rdev->family == CHIP_RS600) ||
435 (rdev->family == CHIP_RS690) || 429 (rdev->family == CHIP_RS690) ||
436 (rdev->family == CHIP_RS740)) 430 (rdev->family == CHIP_RS740))
437 pll_flags |= (RADEON_PLL_USE_FRAC_FB_DIV | 431 pll->flags |= (RADEON_PLL_USE_FRAC_FB_DIV |
438 RADEON_PLL_PREFER_CLOSEST_LOWER); 432 RADEON_PLL_PREFER_CLOSEST_LOWER);
439 433
440 if (ASIC_IS_DCE32(rdev) && mode->clock > 200000) /* range limits??? */ 434 if (ASIC_IS_DCE32(rdev) && mode->clock > 200000) /* range limits??? */
441 pll_flags |= RADEON_PLL_PREFER_HIGH_FB_DIV; 435 pll->flags |= RADEON_PLL_PREFER_HIGH_FB_DIV;
442 else 436 else
443 pll_flags |= RADEON_PLL_PREFER_LOW_REF_DIV; 437 pll->flags |= RADEON_PLL_PREFER_LOW_REF_DIV;
444 } else { 438 } else {
445 pll_flags |= RADEON_PLL_LEGACY; 439 pll->flags |= RADEON_PLL_LEGACY;
446 440
447 if (mode->clock > 200000) /* range limits??? */ 441 if (mode->clock > 200000) /* range limits??? */
448 pll_flags |= RADEON_PLL_PREFER_HIGH_FB_DIV; 442 pll->flags |= RADEON_PLL_PREFER_HIGH_FB_DIV;
449 else 443 else
450 pll_flags |= RADEON_PLL_PREFER_LOW_REF_DIV; 444 pll->flags |= RADEON_PLL_PREFER_LOW_REF_DIV;
451 445
452 } 446 }
453 447
454 list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) { 448 list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
455 if (encoder->crtc == crtc) { 449 if (encoder->crtc == crtc) {
456 if (!ASIC_IS_AVIVO(rdev)) {
457 if (encoder->encoder_type !=
458 DRM_MODE_ENCODER_DAC)
459 pll_flags |= RADEON_PLL_NO_ODD_POST_DIV;
460 if (encoder->encoder_type ==
461 DRM_MODE_ENCODER_LVDS)
462 pll_flags |= RADEON_PLL_USE_REF_DIV;
463 }
464 radeon_encoder = to_radeon_encoder(encoder); 450 radeon_encoder = to_radeon_encoder(encoder);
451 if (ASIC_IS_AVIVO(rdev)) {
452 /* DVO wants 2x pixel clock if the DVO chip is in 12 bit mode */
453 if (radeon_encoder->encoder_id == ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DVO1)
454 adjusted_clock = mode->clock * 2;
455 } else {
456 if (encoder->encoder_type != DRM_MODE_ENCODER_DAC)
457 pll->flags |= RADEON_PLL_NO_ODD_POST_DIV;
458 if (encoder->encoder_type == DRM_MODE_ENCODER_LVDS)
459 pll->flags |= RADEON_PLL_USE_REF_DIV;
460 }
465 break; 461 break;
466 } 462 }
467 } 463 }
@@ -471,46 +467,101 @@ void atombios_crtc_set_pll(struct drm_crtc *crtc, struct drm_display_mode *mode)
471 * special hw requirements. 467 * special hw requirements.
472 */ 468 */
473 if (ASIC_IS_DCE3(rdev)) { 469 if (ASIC_IS_DCE3(rdev)) {
474 ADJUST_DISPLAY_PLL_PS_ALLOCATION adjust_pll_args; 470 union adjust_pixel_clock args;
471 struct radeon_encoder_atom_dig *dig;
472 u8 frev, crev;
473 int index;
475 474
476 if (!encoder) 475 if (!radeon_encoder->enc_priv)
477 return; 476 return adjusted_clock;
478 477 dig = radeon_encoder->enc_priv;
479 memset(&adjust_pll_args, 0, sizeof(adjust_pll_args));
480 adjust_pll_args.usPixelClock = cpu_to_le16(mode->clock / 10);
481 adjust_pll_args.ucTransmitterID = radeon_encoder->encoder_id;
482 adjust_pll_args.ucEncodeMode = atombios_get_encoder_mode(encoder);
483 478
484 index = GetIndexIntoMasterTable(COMMAND, AdjustDisplayPll); 479 index = GetIndexIntoMasterTable(COMMAND, AdjustDisplayPll);
485 atom_execute_table(rdev->mode_info.atom_context, 480 atom_parse_cmd_header(rdev->mode_info.atom_context, index, &frev,
486 index, (uint32_t *)&adjust_pll_args); 481 &crev);
487 adjusted_clock = le16_to_cpu(adjust_pll_args.usPixelClock) * 10; 482
488 } else { 483 memset(&args, 0, sizeof(args));
489 /* DVO wants 2x pixel clock if the DVO chip is in 12 bit mode */ 484
490 if (ASIC_IS_AVIVO(rdev) && 485 switch (frev) {
491 (radeon_encoder->encoder_id == ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DVO1)) 486 case 1:
492 adjusted_clock = mode->clock * 2; 487 switch (crev) {
493 else 488 case 1:
494 adjusted_clock = mode->clock; 489 case 2:
490 args.v1.usPixelClock = cpu_to_le16(mode->clock / 10);
491 args.v1.ucTransmitterID = radeon_encoder->encoder_id;
492 args.v1.ucEncodeMode = atombios_get_encoder_mode(encoder);
493
494 atom_execute_table(rdev->mode_info.atom_context,
495 index, (uint32_t *)&args);
496 adjusted_clock = le16_to_cpu(args.v1.usPixelClock) * 10;
497 break;
498 default:
499 DRM_ERROR("Unknown table version %d %d\n", frev, crev);
500 return adjusted_clock;
501 }
502 break;
503 default:
504 DRM_ERROR("Unknown table version %d %d\n", frev, crev);
505 return adjusted_clock;
506 }
495 } 507 }
508 return adjusted_clock;
509}
510
511union set_pixel_clock {
512 SET_PIXEL_CLOCK_PS_ALLOCATION base;
513 PIXEL_CLOCK_PARAMETERS v1;
514 PIXEL_CLOCK_PARAMETERS_V2 v2;
515 PIXEL_CLOCK_PARAMETERS_V3 v3;
516};
517
518void atombios_crtc_set_pll(struct drm_crtc *crtc, struct drm_display_mode *mode)
519{
520 struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
521 struct drm_device *dev = crtc->dev;
522 struct radeon_device *rdev = dev->dev_private;
523 struct drm_encoder *encoder = NULL;
524 struct radeon_encoder *radeon_encoder = NULL;
525 u8 frev, crev;
526 int index;
527 union set_pixel_clock args;
528 u32 pll_clock = mode->clock;
529 u32 ref_div = 0, fb_div = 0, frac_fb_div = 0, post_div = 0;
530 struct radeon_pll *pll;
531 u32 adjusted_clock;
532
533 memset(&args, 0, sizeof(args));
534
535 list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
536 if (encoder->crtc == crtc) {
537 radeon_encoder = to_radeon_encoder(encoder);
538 break;
539 }
540 }
541
542 if (!radeon_encoder)
543 return;
496 544
497 if (radeon_crtc->crtc_id == 0) 545 if (radeon_crtc->crtc_id == 0)
498 pll = &rdev->clock.p1pll; 546 pll = &rdev->clock.p1pll;
499 else 547 else
500 pll = &rdev->clock.p2pll; 548 pll = &rdev->clock.p2pll;
501 549
550 /* adjust pixel clock as needed */
551 adjusted_clock = atombios_adjust_pll(crtc, mode, pll);
552
502 if (ASIC_IS_AVIVO(rdev)) { 553 if (ASIC_IS_AVIVO(rdev)) {
503 if (radeon_new_pll) 554 if (radeon_new_pll)
504 radeon_compute_pll_avivo(pll, adjusted_clock, &pll_clock, 555 radeon_compute_pll_avivo(pll, adjusted_clock, &pll_clock,
505 &fb_div, &frac_fb_div, 556 &fb_div, &frac_fb_div,
506 &ref_div, &post_div, pll_flags); 557 &ref_div, &post_div);
507 else 558 else
508 radeon_compute_pll(pll, adjusted_clock, &pll_clock, 559 radeon_compute_pll(pll, adjusted_clock, &pll_clock,
509 &fb_div, &frac_fb_div, 560 &fb_div, &frac_fb_div,
510 &ref_div, &post_div, pll_flags); 561 &ref_div, &post_div);
511 } else 562 } else
512 radeon_compute_pll(pll, adjusted_clock, &pll_clock, &fb_div, &frac_fb_div, 563 radeon_compute_pll(pll, adjusted_clock, &pll_clock, &fb_div, &frac_fb_div,
513 &ref_div, &post_div, pll_flags); 564 &ref_div, &post_div);
514 565
515 index = GetIndexIntoMasterTable(COMMAND, SetPixelClock); 566 index = GetIndexIntoMasterTable(COMMAND, SetPixelClock);
516 atom_parse_cmd_header(rdev->mode_info.atom_context, index, &frev, 567 atom_parse_cmd_header(rdev->mode_info.atom_context, index, &frev,
@@ -520,45 +571,38 @@ void atombios_crtc_set_pll(struct drm_crtc *crtc, struct drm_display_mode *mode)
520 case 1: 571 case 1:
521 switch (crev) { 572 switch (crev) {
522 case 1: 573 case 1:
523 spc1_ptr = (PIXEL_CLOCK_PARAMETERS *) & args.sPCLKInput; 574 args.v1.usPixelClock = cpu_to_le16(mode->clock / 10);
524 spc1_ptr->usPixelClock = cpu_to_le16(mode->clock / 10); 575 args.v1.usRefDiv = cpu_to_le16(ref_div);
525 spc1_ptr->usRefDiv = cpu_to_le16(ref_div); 576 args.v1.usFbDiv = cpu_to_le16(fb_div);
526 spc1_ptr->usFbDiv = cpu_to_le16(fb_div); 577 args.v1.ucFracFbDiv = frac_fb_div;
527 spc1_ptr->ucFracFbDiv = frac_fb_div; 578 args.v1.ucPostDiv = post_div;
528 spc1_ptr->ucPostDiv = post_div; 579 args.v1.ucPpll =
529 spc1_ptr->ucPpll =
530 radeon_crtc->crtc_id ? ATOM_PPLL2 : ATOM_PPLL1; 580 radeon_crtc->crtc_id ? ATOM_PPLL2 : ATOM_PPLL1;
531 spc1_ptr->ucCRTC = radeon_crtc->crtc_id; 581 args.v1.ucCRTC = radeon_crtc->crtc_id;
532 spc1_ptr->ucRefDivSrc = 1; 582 args.v1.ucRefDivSrc = 1;
533 break; 583 break;
534 case 2: 584 case 2:
535 spc2_ptr = 585 args.v2.usPixelClock = cpu_to_le16(mode->clock / 10);
536 (PIXEL_CLOCK_PARAMETERS_V2 *) & args.sPCLKInput; 586 args.v2.usRefDiv = cpu_to_le16(ref_div);
537 spc2_ptr->usPixelClock = cpu_to_le16(mode->clock / 10); 587 args.v2.usFbDiv = cpu_to_le16(fb_div);
538 spc2_ptr->usRefDiv = cpu_to_le16(ref_div); 588 args.v2.ucFracFbDiv = frac_fb_div;
539 spc2_ptr->usFbDiv = cpu_to_le16(fb_div); 589 args.v2.ucPostDiv = post_div;
540 spc2_ptr->ucFracFbDiv = frac_fb_div; 590 args.v2.ucPpll =
541 spc2_ptr->ucPostDiv = post_div;
542 spc2_ptr->ucPpll =
543 radeon_crtc->crtc_id ? ATOM_PPLL2 : ATOM_PPLL1; 591 radeon_crtc->crtc_id ? ATOM_PPLL2 : ATOM_PPLL1;
544 spc2_ptr->ucCRTC = radeon_crtc->crtc_id; 592 args.v2.ucCRTC = radeon_crtc->crtc_id;
545 spc2_ptr->ucRefDivSrc = 1; 593 args.v2.ucRefDivSrc = 1;
546 break; 594 break;
547 case 3: 595 case 3:
548 if (!encoder) 596 args.v3.usPixelClock = cpu_to_le16(mode->clock / 10);
549 return; 597 args.v3.usRefDiv = cpu_to_le16(ref_div);
550 spc3_ptr = 598 args.v3.usFbDiv = cpu_to_le16(fb_div);
551 (PIXEL_CLOCK_PARAMETERS_V3 *) & args.sPCLKInput; 599 args.v3.ucFracFbDiv = frac_fb_div;
552 spc3_ptr->usPixelClock = cpu_to_le16(mode->clock / 10); 600 args.v3.ucPostDiv = post_div;
553 spc3_ptr->usRefDiv = cpu_to_le16(ref_div); 601 args.v3.ucPpll =
554 spc3_ptr->usFbDiv = cpu_to_le16(fb_div);
555 spc3_ptr->ucFracFbDiv = frac_fb_div;
556 spc3_ptr->ucPostDiv = post_div;
557 spc3_ptr->ucPpll =
558 radeon_crtc->crtc_id ? ATOM_PPLL2 : ATOM_PPLL1; 602 radeon_crtc->crtc_id ? ATOM_PPLL2 : ATOM_PPLL1;
559 spc3_ptr->ucMiscInfo = (radeon_crtc->crtc_id << 2); 603 args.v3.ucMiscInfo = (radeon_crtc->crtc_id << 2);
560 spc3_ptr->ucTransmitterId = radeon_encoder->encoder_id; 604 args.v3.ucTransmitterId = radeon_encoder->encoder_id;
561 spc3_ptr->ucEncoderMode = 605 args.v3.ucEncoderMode =
562 atombios_get_encoder_mode(encoder); 606 atombios_get_encoder_mode(encoder);
563 break; 607 break;
564 default: 608 default:
@@ -571,12 +615,11 @@ void atombios_crtc_set_pll(struct drm_crtc *crtc, struct drm_display_mode *mode)
571 return; 615 return;
572 } 616 }
573 617
574 printk("executing set pll\n");
575 atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args); 618 atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args);
576} 619}
577 620
578int atombios_crtc_set_base(struct drm_crtc *crtc, int x, int y, 621static int avivo_crtc_set_base(struct drm_crtc *crtc, int x, int y,
579 struct drm_framebuffer *old_fb) 622 struct drm_framebuffer *old_fb)
580{ 623{
581 struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); 624 struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
582 struct drm_device *dev = crtc->dev; 625 struct drm_device *dev = crtc->dev;
@@ -706,6 +749,42 @@ int atombios_crtc_set_base(struct drm_crtc *crtc, int x, int y,
706 return 0; 749 return 0;
707} 750}
708 751
752int atombios_crtc_set_base(struct drm_crtc *crtc, int x, int y,
753 struct drm_framebuffer *old_fb)
754{
755 struct drm_device *dev = crtc->dev;
756 struct radeon_device *rdev = dev->dev_private;
757
758 if (ASIC_IS_AVIVO(rdev))
759 return avivo_crtc_set_base(crtc, x, y, old_fb);
760 else
761 return radeon_crtc_set_base(crtc, x, y, old_fb);
762}
763
764/* properly set additional regs when using atombios */
765static void radeon_legacy_atom_fixup(struct drm_crtc *crtc)
766{
767 struct drm_device *dev = crtc->dev;
768 struct radeon_device *rdev = dev->dev_private;
769 struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
770 u32 disp_merge_cntl;
771
772 switch (radeon_crtc->crtc_id) {
773 case 0:
774 disp_merge_cntl = RREG32(RADEON_DISP_MERGE_CNTL);
775 disp_merge_cntl &= ~RADEON_DISP_RGB_OFFSET_EN;
776 WREG32(RADEON_DISP_MERGE_CNTL, disp_merge_cntl);
777 break;
778 case 1:
779 disp_merge_cntl = RREG32(RADEON_DISP2_MERGE_CNTL);
780 disp_merge_cntl &= ~RADEON_DISP2_RGB_OFFSET_EN;
781 WREG32(RADEON_DISP2_MERGE_CNTL, disp_merge_cntl);
782 WREG32(RADEON_FP_H2_SYNC_STRT_WID, RREG32(RADEON_CRTC2_H_SYNC_STRT_WID));
783 WREG32(RADEON_FP_V2_SYNC_STRT_WID, RREG32(RADEON_CRTC2_V_SYNC_STRT_WID));
784 break;
785 }
786}
787
709int atombios_crtc_mode_set(struct drm_crtc *crtc, 788int atombios_crtc_mode_set(struct drm_crtc *crtc,
710 struct drm_display_mode *mode, 789 struct drm_display_mode *mode,
711 struct drm_display_mode *adjusted_mode, 790 struct drm_display_mode *adjusted_mode,
@@ -727,8 +806,8 @@ int atombios_crtc_mode_set(struct drm_crtc *crtc,
727 else { 806 else {
728 if (radeon_crtc->crtc_id == 0) 807 if (radeon_crtc->crtc_id == 0)
729 atombios_set_crtc_dtd_timing(crtc, adjusted_mode); 808 atombios_set_crtc_dtd_timing(crtc, adjusted_mode);
730 radeon_crtc_set_base(crtc, x, y, old_fb); 809 atombios_crtc_set_base(crtc, x, y, old_fb);
731 radeon_legacy_atom_set_surface(crtc); 810 radeon_legacy_atom_fixup(crtc);
732 } 811 }
733 atombios_overscan_setup(crtc, mode, adjusted_mode); 812 atombios_overscan_setup(crtc, mode, adjusted_mode);
734 atombios_scaler_setup(crtc); 813 atombios_scaler_setup(crtc);
@@ -746,8 +825,8 @@ static bool atombios_crtc_mode_fixup(struct drm_crtc *crtc,
746 825
747static void atombios_crtc_prepare(struct drm_crtc *crtc) 826static void atombios_crtc_prepare(struct drm_crtc *crtc)
748{ 827{
749 atombios_crtc_dpms(crtc, DRM_MODE_DPMS_OFF);
750 atombios_lock_crtc(crtc, 1); 828 atombios_lock_crtc(crtc, 1);
829 atombios_crtc_dpms(crtc, DRM_MODE_DPMS_OFF);
751} 830}
752 831
753static void atombios_crtc_commit(struct drm_crtc *crtc) 832static void atombios_crtc_commit(struct drm_crtc *crtc)
diff --git a/drivers/gpu/drm/radeon/atombios_dp.c b/drivers/gpu/drm/radeon/atombios_dp.c
index 0d63c4436e7c..99915a682d59 100644
--- a/drivers/gpu/drm/radeon/atombios_dp.c
+++ b/drivers/gpu/drm/radeon/atombios_dp.c
@@ -332,11 +332,13 @@ bool radeon_process_aux_ch(struct radeon_i2c_chan *chan, u8 *req_bytes,
332 PROCESS_AUX_CHANNEL_TRANSACTION_PS_ALLOCATION args; 332 PROCESS_AUX_CHANNEL_TRANSACTION_PS_ALLOCATION args;
333 int index = GetIndexIntoMasterTable(COMMAND, ProcessAuxChannelTransaction); 333 int index = GetIndexIntoMasterTable(COMMAND, ProcessAuxChannelTransaction);
334 unsigned char *base; 334 unsigned char *base;
335 int retry_count = 0;
335 336
336 memset(&args, 0, sizeof(args)); 337 memset(&args, 0, sizeof(args));
337 338
338 base = (unsigned char *)rdev->mode_info.atom_context->scratch; 339 base = (unsigned char *)rdev->mode_info.atom_context->scratch;
339 340
341retry:
340 memcpy(base, req_bytes, num_bytes); 342 memcpy(base, req_bytes, num_bytes);
341 343
342 args.lpAuxRequest = 0; 344 args.lpAuxRequest = 0;
@@ -347,10 +349,12 @@ bool radeon_process_aux_ch(struct radeon_i2c_chan *chan, u8 *req_bytes,
347 349
348 atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args); 350 atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args);
349 351
350 if (args.ucReplyStatus) { 352 if (args.ucReplyStatus && !args.ucDataOutLen) {
351 DRM_DEBUG("failed to get auxch %02x%02x %02x %02x 0x%02x %02x\n", 353 if (args.ucReplyStatus == 0x20 && retry_count++ < 10)
354 goto retry;
355 DRM_DEBUG("failed to get auxch %02x%02x %02x %02x 0x%02x %02x after %d retries\n",
352 req_bytes[1], req_bytes[0], req_bytes[2], req_bytes[3], 356 req_bytes[1], req_bytes[0], req_bytes[2], req_bytes[3],
353 chan->rec.i2c_id, args.ucReplyStatus); 357 chan->rec.i2c_id, args.ucReplyStatus, retry_count);
354 return false; 358 return false;
355 } 359 }
356 360
@@ -468,7 +472,8 @@ void radeon_dp_set_link_config(struct drm_connector *connector,
468 struct radeon_connector *radeon_connector; 472 struct radeon_connector *radeon_connector;
469 struct radeon_connector_atom_dig *dig_connector; 473 struct radeon_connector_atom_dig *dig_connector;
470 474
471 if (connector->connector_type != DRM_MODE_CONNECTOR_DisplayPort) 475 if ((connector->connector_type != DRM_MODE_CONNECTOR_DisplayPort) &&
476 (connector->connector_type != DRM_MODE_CONNECTOR_eDP))
472 return; 477 return;
473 478
474 radeon_connector = to_radeon_connector(connector); 479 radeon_connector = to_radeon_connector(connector);
@@ -582,7 +587,8 @@ void dp_link_train(struct drm_encoder *encoder,
582 u8 train_set[4]; 587 u8 train_set[4];
583 int i; 588 int i;
584 589
585 if (connector->connector_type != DRM_MODE_CONNECTOR_DisplayPort) 590 if ((connector->connector_type != DRM_MODE_CONNECTOR_DisplayPort) &&
591 (connector->connector_type != DRM_MODE_CONNECTOR_eDP))
586 return; 592 return;
587 593
588 if (!radeon_encoder->enc_priv) 594 if (!radeon_encoder->enc_priv)
@@ -594,21 +600,14 @@ void dp_link_train(struct drm_encoder *encoder,
594 return; 600 return;
595 dig_connector = radeon_connector->con_priv; 601 dig_connector = radeon_connector->con_priv;
596 602
597 if (ASIC_IS_DCE32(rdev)) { 603 if (dig->dig_encoder)
598 if (dig->dig_block) 604 enc_id |= ATOM_DP_CONFIG_DIG2_ENCODER;
599 enc_id |= ATOM_DP_CONFIG_DIG2_ENCODER; 605 else
600 else 606 enc_id |= ATOM_DP_CONFIG_DIG1_ENCODER;
601 enc_id |= ATOM_DP_CONFIG_DIG1_ENCODER; 607 if (dig_connector->linkb)
602 if (dig_connector->linkb) 608 enc_id |= ATOM_DP_CONFIG_LINK_B;
603 enc_id |= ATOM_DP_CONFIG_LINK_B; 609 else
604 else 610 enc_id |= ATOM_DP_CONFIG_LINK_A;
605 enc_id |= ATOM_DP_CONFIG_LINK_A;
606 } else {
607 if (dig_connector->linkb)
608 enc_id |= ATOM_DP_CONFIG_DIG2_ENCODER | ATOM_DP_CONFIG_LINK_B;
609 else
610 enc_id |= ATOM_DP_CONFIG_DIG1_ENCODER | ATOM_DP_CONFIG_LINK_A;
611 }
612 611
613 memset(link_configuration, 0, DP_LINK_CONFIGURATION_SIZE); 612 memset(link_configuration, 0, DP_LINK_CONFIGURATION_SIZE);
614 if (dig_connector->dp_clock == 270000) 613 if (dig_connector->dp_clock == 270000)
diff --git a/drivers/gpu/drm/radeon/mkregtable.c b/drivers/gpu/drm/radeon/mkregtable.c
index 0d79577c1576..607241c6a8a9 100644
--- a/drivers/gpu/drm/radeon/mkregtable.c
+++ b/drivers/gpu/drm/radeon/mkregtable.c
@@ -661,8 +661,10 @@ static int parser_auth(struct table *t, const char *filename)
661 fseek(file, 0, SEEK_SET); 661 fseek(file, 0, SEEK_SET);
662 662
663 /* get header */ 663 /* get header */
664 if (fgets(buf, 1024, file) == NULL) 664 if (fgets(buf, 1024, file) == NULL) {
665 fclose(file);
665 return -1; 666 return -1;
667 }
666 668
667 /* first line will contain the last register 669 /* first line will contain the last register
668 * and gpu name */ 670 * and gpu name */
diff --git a/drivers/gpu/drm/radeon/r100.c b/drivers/gpu/drm/radeon/r100.c
index 824cc6480a06..c0d4650cdb79 100644
--- a/drivers/gpu/drm/radeon/r100.c
+++ b/drivers/gpu/drm/radeon/r100.c
@@ -131,7 +131,8 @@ void r100_hpd_init(struct radeon_device *rdev)
131 break; 131 break;
132 } 132 }
133 } 133 }
134 r100_irq_set(rdev); 134 if (rdev->irq.installed)
135 r100_irq_set(rdev);
135} 136}
136 137
137void r100_hpd_fini(struct radeon_device *rdev) 138void r100_hpd_fini(struct radeon_device *rdev)
@@ -243,6 +244,11 @@ int r100_irq_set(struct radeon_device *rdev)
243{ 244{
244 uint32_t tmp = 0; 245 uint32_t tmp = 0;
245 246
247 if (!rdev->irq.installed) {
248 WARN(1, "Can't enable IRQ/MSI because no handler is installed.\n");
249 WREG32(R_000040_GEN_INT_CNTL, 0);
250 return -EINVAL;
251 }
246 if (rdev->irq.sw_int) { 252 if (rdev->irq.sw_int) {
247 tmp |= RADEON_SW_INT_ENABLE; 253 tmp |= RADEON_SW_INT_ENABLE;
248 } 254 }
@@ -348,14 +354,25 @@ u32 r100_get_vblank_counter(struct radeon_device *rdev, int crtc)
348 return RREG32(RADEON_CRTC2_CRNT_FRAME); 354 return RREG32(RADEON_CRTC2_CRNT_FRAME);
349} 355}
350 356
357/* Who ever call radeon_fence_emit should call ring_lock and ask
358 * for enough space (today caller are ib schedule and buffer move) */
351void r100_fence_ring_emit(struct radeon_device *rdev, 359void r100_fence_ring_emit(struct radeon_device *rdev,
352 struct radeon_fence *fence) 360 struct radeon_fence *fence)
353{ 361{
354 /* Who ever call radeon_fence_emit should call ring_lock and ask 362 /* We have to make sure that caches are flushed before
355 * for enough space (today caller are ib schedule and buffer move) */ 363 * CPU might read something from VRAM. */
364 radeon_ring_write(rdev, PACKET0(RADEON_RB3D_DSTCACHE_CTLSTAT, 0));
365 radeon_ring_write(rdev, RADEON_RB3D_DC_FLUSH_ALL);
366 radeon_ring_write(rdev, PACKET0(RADEON_RB3D_ZCACHE_CTLSTAT, 0));
367 radeon_ring_write(rdev, RADEON_RB3D_ZC_FLUSH_ALL);
356 /* Wait until IDLE & CLEAN */ 368 /* Wait until IDLE & CLEAN */
357 radeon_ring_write(rdev, PACKET0(0x1720, 0)); 369 radeon_ring_write(rdev, PACKET0(0x1720, 0));
358 radeon_ring_write(rdev, (1 << 16) | (1 << 17)); 370 radeon_ring_write(rdev, (1 << 16) | (1 << 17));
371 radeon_ring_write(rdev, PACKET0(RADEON_HOST_PATH_CNTL, 0));
372 radeon_ring_write(rdev, rdev->config.r100.hdp_cntl |
373 RADEON_HDP_READ_BUFFER_INVALIDATE);
374 radeon_ring_write(rdev, PACKET0(RADEON_HOST_PATH_CNTL, 0));
375 radeon_ring_write(rdev, rdev->config.r100.hdp_cntl);
359 /* Emit fence sequence & fire IRQ */ 376 /* Emit fence sequence & fire IRQ */
360 radeon_ring_write(rdev, PACKET0(rdev->fence_drv.scratch_reg, 0)); 377 radeon_ring_write(rdev, PACKET0(rdev->fence_drv.scratch_reg, 0));
361 radeon_ring_write(rdev, fence->seq); 378 radeon_ring_write(rdev, fence->seq);
@@ -1374,7 +1391,6 @@ static int r100_packet0_check(struct radeon_cs_parser *p,
1374 case RADEON_TXFORMAT_ARGB4444: 1391 case RADEON_TXFORMAT_ARGB4444:
1375 case RADEON_TXFORMAT_VYUY422: 1392 case RADEON_TXFORMAT_VYUY422:
1376 case RADEON_TXFORMAT_YVYU422: 1393 case RADEON_TXFORMAT_YVYU422:
1377 case RADEON_TXFORMAT_DXT1:
1378 case RADEON_TXFORMAT_SHADOW16: 1394 case RADEON_TXFORMAT_SHADOW16:
1379 case RADEON_TXFORMAT_LDUDV655: 1395 case RADEON_TXFORMAT_LDUDV655:
1380 case RADEON_TXFORMAT_DUDV88: 1396 case RADEON_TXFORMAT_DUDV88:
@@ -1382,12 +1398,19 @@ static int r100_packet0_check(struct radeon_cs_parser *p,
1382 break; 1398 break;
1383 case RADEON_TXFORMAT_ARGB8888: 1399 case RADEON_TXFORMAT_ARGB8888:
1384 case RADEON_TXFORMAT_RGBA8888: 1400 case RADEON_TXFORMAT_RGBA8888:
1385 case RADEON_TXFORMAT_DXT23:
1386 case RADEON_TXFORMAT_DXT45:
1387 case RADEON_TXFORMAT_SHADOW32: 1401 case RADEON_TXFORMAT_SHADOW32:
1388 case RADEON_TXFORMAT_LDUDUV8888: 1402 case RADEON_TXFORMAT_LDUDUV8888:
1389 track->textures[i].cpp = 4; 1403 track->textures[i].cpp = 4;
1390 break; 1404 break;
1405 case RADEON_TXFORMAT_DXT1:
1406 track->textures[i].cpp = 1;
1407 track->textures[i].compress_format = R100_TRACK_COMP_DXT1;
1408 break;
1409 case RADEON_TXFORMAT_DXT23:
1410 case RADEON_TXFORMAT_DXT45:
1411 track->textures[i].cpp = 1;
1412 track->textures[i].compress_format = R100_TRACK_COMP_DXT35;
1413 break;
1391 } 1414 }
1392 track->textures[i].cube_info[4].width = 1 << ((idx_value >> 16) & 0xf); 1415 track->textures[i].cube_info[4].width = 1 << ((idx_value >> 16) & 0xf);
1393 track->textures[i].cube_info[4].height = 1 << ((idx_value >> 20) & 0xf); 1416 track->textures[i].cube_info[4].height = 1 << ((idx_value >> 20) & 0xf);
@@ -1487,6 +1510,7 @@ static int r100_packet3_check(struct radeon_cs_parser *p,
1487 DRM_ERROR("PRIM_WALK must be 3 for IMMD draw\n"); 1510 DRM_ERROR("PRIM_WALK must be 3 for IMMD draw\n");
1488 return -EINVAL; 1511 return -EINVAL;
1489 } 1512 }
1513 track->vtx_size = r100_get_vtx_size(radeon_get_ib_value(p, idx + 0));
1490 track->vap_vf_cntl = radeon_get_ib_value(p, idx + 1); 1514 track->vap_vf_cntl = radeon_get_ib_value(p, idx + 1);
1491 track->immd_dwords = pkt->count - 1; 1515 track->immd_dwords = pkt->count - 1;
1492 r = r100_cs_track_check(p->rdev, track); 1516 r = r100_cs_track_check(p->rdev, track);
@@ -1707,14 +1731,6 @@ void r100_gpu_init(struct radeon_device *rdev)
1707 r100_hdp_reset(rdev); 1731 r100_hdp_reset(rdev);
1708} 1732}
1709 1733
1710void r100_hdp_flush(struct radeon_device *rdev)
1711{
1712 u32 tmp;
1713 tmp = RREG32(RADEON_HOST_PATH_CNTL);
1714 tmp |= RADEON_HDP_READ_BUFFER_INVALIDATE;
1715 WREG32(RADEON_HOST_PATH_CNTL, tmp);
1716}
1717
1718void r100_hdp_reset(struct radeon_device *rdev) 1734void r100_hdp_reset(struct radeon_device *rdev)
1719{ 1735{
1720 uint32_t tmp; 1736 uint32_t tmp;
@@ -2731,6 +2747,7 @@ static inline void r100_cs_track_texture_print(struct r100_cs_track_texture *t)
2731 DRM_ERROR("coordinate type %d\n", t->tex_coord_type); 2747 DRM_ERROR("coordinate type %d\n", t->tex_coord_type);
2732 DRM_ERROR("width round to power of 2 %d\n", t->roundup_w); 2748 DRM_ERROR("width round to power of 2 %d\n", t->roundup_w);
2733 DRM_ERROR("height round to power of 2 %d\n", t->roundup_h); 2749 DRM_ERROR("height round to power of 2 %d\n", t->roundup_h);
2750 DRM_ERROR("compress format %d\n", t->compress_format);
2734} 2751}
2735 2752
2736static int r100_cs_track_cube(struct radeon_device *rdev, 2753static int r100_cs_track_cube(struct radeon_device *rdev,
@@ -2760,6 +2777,36 @@ static int r100_cs_track_cube(struct radeon_device *rdev,
2760 return 0; 2777 return 0;
2761} 2778}
2762 2779
2780static int r100_track_compress_size(int compress_format, int w, int h)
2781{
2782 int block_width, block_height, block_bytes;
2783 int wblocks, hblocks;
2784 int min_wblocks;
2785 int sz;
2786
2787 block_width = 4;
2788 block_height = 4;
2789
2790 switch (compress_format) {
2791 case R100_TRACK_COMP_DXT1:
2792 block_bytes = 8;
2793 min_wblocks = 4;
2794 break;
2795 default:
2796 case R100_TRACK_COMP_DXT35:
2797 block_bytes = 16;
2798 min_wblocks = 2;
2799 break;
2800 }
2801
2802 hblocks = (h + block_height - 1) / block_height;
2803 wblocks = (w + block_width - 1) / block_width;
2804 if (wblocks < min_wblocks)
2805 wblocks = min_wblocks;
2806 sz = wblocks * hblocks * block_bytes;
2807 return sz;
2808}
2809
2763static int r100_cs_track_texture_check(struct radeon_device *rdev, 2810static int r100_cs_track_texture_check(struct radeon_device *rdev,
2764 struct r100_cs_track *track) 2811 struct r100_cs_track *track)
2765{ 2812{
@@ -2797,9 +2844,15 @@ static int r100_cs_track_texture_check(struct radeon_device *rdev,
2797 h = h / (1 << i); 2844 h = h / (1 << i);
2798 if (track->textures[u].roundup_h) 2845 if (track->textures[u].roundup_h)
2799 h = roundup_pow_of_two(h); 2846 h = roundup_pow_of_two(h);
2800 size += w * h; 2847 if (track->textures[u].compress_format) {
2848
2849 size += r100_track_compress_size(track->textures[u].compress_format, w, h);
2850 /* compressed textures are block based */
2851 } else
2852 size += w * h;
2801 } 2853 }
2802 size *= track->textures[u].cpp; 2854 size *= track->textures[u].cpp;
2855
2803 switch (track->textures[u].tex_coord_type) { 2856 switch (track->textures[u].tex_coord_type) {
2804 case 0: 2857 case 0:
2805 break; 2858 break;
@@ -2838,6 +2891,10 @@ int r100_cs_track_check(struct radeon_device *rdev, struct r100_cs_track *track)
2838 2891
2839 for (i = 0; i < track->num_cb; i++) { 2892 for (i = 0; i < track->num_cb; i++) {
2840 if (track->cb[i].robj == NULL) { 2893 if (track->cb[i].robj == NULL) {
2894 if (!(track->fastfill || track->color_channel_mask ||
2895 track->blend_read_enable)) {
2896 continue;
2897 }
2841 DRM_ERROR("[drm] No buffer for color buffer %d !\n", i); 2898 DRM_ERROR("[drm] No buffer for color buffer %d !\n", i);
2842 return -EINVAL; 2899 return -EINVAL;
2843 } 2900 }
@@ -2967,6 +3024,7 @@ void r100_cs_track_clear(struct radeon_device *rdev, struct r100_cs_track *track
2967 track->arrays[i].esize = 0x7F; 3024 track->arrays[i].esize = 0x7F;
2968 } 3025 }
2969 for (i = 0; i < track->num_texture; i++) { 3026 for (i = 0; i < track->num_texture; i++) {
3027 track->textures[i].compress_format = R100_TRACK_COMP_NONE;
2970 track->textures[i].pitch = 16536; 3028 track->textures[i].pitch = 16536;
2971 track->textures[i].width = 16536; 3029 track->textures[i].width = 16536;
2972 track->textures[i].height = 16536; 3030 track->textures[i].height = 16536;
@@ -3265,6 +3323,7 @@ static int r100_startup(struct radeon_device *rdev)
3265 } 3323 }
3266 /* Enable IRQ */ 3324 /* Enable IRQ */
3267 r100_irq_set(rdev); 3325 r100_irq_set(rdev);
3326 rdev->config.r100.hdp_cntl = RREG32(RADEON_HOST_PATH_CNTL);
3268 /* 1M ring buffer */ 3327 /* 1M ring buffer */
3269 r = r100_cp_init(rdev, 1024 * 1024); 3328 r = r100_cp_init(rdev, 1024 * 1024);
3270 if (r) { 3329 if (r) {
@@ -3316,13 +3375,13 @@ int r100_suspend(struct radeon_device *rdev)
3316 3375
3317void r100_fini(struct radeon_device *rdev) 3376void r100_fini(struct radeon_device *rdev)
3318{ 3377{
3319 r100_suspend(rdev);
3320 r100_cp_fini(rdev); 3378 r100_cp_fini(rdev);
3321 r100_wb_fini(rdev); 3379 r100_wb_fini(rdev);
3322 r100_ib_fini(rdev); 3380 r100_ib_fini(rdev);
3323 radeon_gem_fini(rdev); 3381 radeon_gem_fini(rdev);
3324 if (rdev->flags & RADEON_IS_PCI) 3382 if (rdev->flags & RADEON_IS_PCI)
3325 r100_pci_gart_fini(rdev); 3383 r100_pci_gart_fini(rdev);
3384 radeon_agp_fini(rdev);
3326 radeon_irq_kms_fini(rdev); 3385 radeon_irq_kms_fini(rdev);
3327 radeon_fence_driver_fini(rdev); 3386 radeon_fence_driver_fini(rdev);
3328 radeon_bo_fini(rdev); 3387 radeon_bo_fini(rdev);
@@ -3346,9 +3405,7 @@ int r100_mc_init(struct radeon_device *rdev)
3346 if (rdev->flags & RADEON_IS_AGP) { 3405 if (rdev->flags & RADEON_IS_AGP) {
3347 r = radeon_agp_init(rdev); 3406 r = radeon_agp_init(rdev);
3348 if (r) { 3407 if (r) {
3349 printk(KERN_WARNING "[drm] Disabling AGP\n"); 3408 radeon_agp_disable(rdev);
3350 rdev->flags &= ~RADEON_IS_AGP;
3351 rdev->mc.gtt_size = radeon_gart_size * 1024 * 1024;
3352 } else { 3409 } else {
3353 rdev->mc.gtt_location = rdev->mc.agp_base; 3410 rdev->mc.gtt_location = rdev->mc.agp_base;
3354 } 3411 }
@@ -3399,6 +3456,8 @@ int r100_init(struct radeon_device *rdev)
3399 r100_errata(rdev); 3456 r100_errata(rdev);
3400 /* Initialize clocks */ 3457 /* Initialize clocks */
3401 radeon_get_clock_info(rdev->ddev); 3458 radeon_get_clock_info(rdev->ddev);
3459 /* Initialize power management */
3460 radeon_pm_init(rdev);
3402 /* Get vram informations */ 3461 /* Get vram informations */
3403 r100_vram_info(rdev); 3462 r100_vram_info(rdev);
3404 /* Initialize memory controller (also test AGP) */ 3463 /* Initialize memory controller (also test AGP) */
@@ -3427,13 +3486,12 @@ int r100_init(struct radeon_device *rdev)
3427 if (r) { 3486 if (r) {
3428 /* Somethings want wront with the accel init stop accel */ 3487 /* Somethings want wront with the accel init stop accel */
3429 dev_err(rdev->dev, "Disabling GPU acceleration\n"); 3488 dev_err(rdev->dev, "Disabling GPU acceleration\n");
3430 r100_suspend(rdev);
3431 r100_cp_fini(rdev); 3489 r100_cp_fini(rdev);
3432 r100_wb_fini(rdev); 3490 r100_wb_fini(rdev);
3433 r100_ib_fini(rdev); 3491 r100_ib_fini(rdev);
3492 radeon_irq_kms_fini(rdev);
3434 if (rdev->flags & RADEON_IS_PCI) 3493 if (rdev->flags & RADEON_IS_PCI)
3435 r100_pci_gart_fini(rdev); 3494 r100_pci_gart_fini(rdev);
3436 radeon_irq_kms_fini(rdev);
3437 rdev->accel_working = false; 3495 rdev->accel_working = false;
3438 } 3496 }
3439 return 0; 3497 return 0;
diff --git a/drivers/gpu/drm/radeon/r100_track.h b/drivers/gpu/drm/radeon/r100_track.h
index ca50903dd2bb..b27a6999d219 100644
--- a/drivers/gpu/drm/radeon/r100_track.h
+++ b/drivers/gpu/drm/radeon/r100_track.h
@@ -28,6 +28,10 @@ struct r100_cs_cube_info {
28 unsigned height; 28 unsigned height;
29}; 29};
30 30
31#define R100_TRACK_COMP_NONE 0
32#define R100_TRACK_COMP_DXT1 1
33#define R100_TRACK_COMP_DXT35 2
34
31struct r100_cs_track_texture { 35struct r100_cs_track_texture {
32 struct radeon_bo *robj; 36 struct radeon_bo *robj;
33 struct r100_cs_cube_info cube_info[5]; /* info for 5 non-primary faces */ 37 struct r100_cs_cube_info cube_info[5]; /* info for 5 non-primary faces */
@@ -44,6 +48,7 @@ struct r100_cs_track_texture {
44 bool enabled; 48 bool enabled;
45 bool roundup_w; 49 bool roundup_w;
46 bool roundup_h; 50 bool roundup_h;
51 unsigned compress_format;
47}; 52};
48 53
49struct r100_cs_track_limits { 54struct r100_cs_track_limits {
@@ -62,13 +67,15 @@ struct r100_cs_track {
62 unsigned immd_dwords; 67 unsigned immd_dwords;
63 unsigned num_arrays; 68 unsigned num_arrays;
64 unsigned max_indx; 69 unsigned max_indx;
70 unsigned color_channel_mask;
65 struct r100_cs_track_array arrays[11]; 71 struct r100_cs_track_array arrays[11];
66 struct r100_cs_track_cb cb[R300_MAX_CB]; 72 struct r100_cs_track_cb cb[R300_MAX_CB];
67 struct r100_cs_track_cb zb; 73 struct r100_cs_track_cb zb;
68 struct r100_cs_track_texture textures[R300_TRACK_MAX_TEXTURE]; 74 struct r100_cs_track_texture textures[R300_TRACK_MAX_TEXTURE];
69 bool z_enabled; 75 bool z_enabled;
70 bool separate_cube; 76 bool separate_cube;
71 77 bool fastfill;
78 bool blend_read_enable;
72}; 79};
73 80
74int r100_cs_track_check(struct radeon_device *rdev, struct r100_cs_track *track); 81int r100_cs_track_check(struct radeon_device *rdev, struct r100_cs_track *track);
diff --git a/drivers/gpu/drm/radeon/r200.c b/drivers/gpu/drm/radeon/r200.c
index eb740fc3549f..ff1e0cd608bf 100644
--- a/drivers/gpu/drm/radeon/r200.c
+++ b/drivers/gpu/drm/radeon/r200.c
@@ -371,13 +371,16 @@ int r200_packet0_check(struct radeon_cs_parser *p,
371 case 5: 371 case 5:
372 case 6: 372 case 6:
373 case 7: 373 case 7:
374 /* 1D/2D */
374 track->textures[i].tex_coord_type = 0; 375 track->textures[i].tex_coord_type = 0;
375 break; 376 break;
376 case 1: 377 case 1:
377 track->textures[i].tex_coord_type = 1; 378 /* CUBE */
379 track->textures[i].tex_coord_type = 2;
378 break; 380 break;
379 case 2: 381 case 2:
380 track->textures[i].tex_coord_type = 2; 382 /* 3D */
383 track->textures[i].tex_coord_type = 1;
381 break; 384 break;
382 } 385 }
383 break; 386 break;
@@ -401,7 +404,6 @@ int r200_packet0_check(struct radeon_cs_parser *p,
401 case R200_TXFORMAT_Y8: 404 case R200_TXFORMAT_Y8:
402 track->textures[i].cpp = 1; 405 track->textures[i].cpp = 1;
403 break; 406 break;
404 case R200_TXFORMAT_DXT1:
405 case R200_TXFORMAT_AI88: 407 case R200_TXFORMAT_AI88:
406 case R200_TXFORMAT_ARGB1555: 408 case R200_TXFORMAT_ARGB1555:
407 case R200_TXFORMAT_RGB565: 409 case R200_TXFORMAT_RGB565:
@@ -418,9 +420,16 @@ int r200_packet0_check(struct radeon_cs_parser *p,
418 case R200_TXFORMAT_ABGR8888: 420 case R200_TXFORMAT_ABGR8888:
419 case R200_TXFORMAT_BGR111110: 421 case R200_TXFORMAT_BGR111110:
420 case R200_TXFORMAT_LDVDU8888: 422 case R200_TXFORMAT_LDVDU8888:
423 track->textures[i].cpp = 4;
424 break;
425 case R200_TXFORMAT_DXT1:
426 track->textures[i].cpp = 1;
427 track->textures[i].compress_format = R100_TRACK_COMP_DXT1;
428 break;
421 case R200_TXFORMAT_DXT23: 429 case R200_TXFORMAT_DXT23:
422 case R200_TXFORMAT_DXT45: 430 case R200_TXFORMAT_DXT45:
423 track->textures[i].cpp = 4; 431 track->textures[i].cpp = 1;
432 track->textures[i].compress_format = R100_TRACK_COMP_DXT1;
424 break; 433 break;
425 } 434 }
426 track->textures[i].cube_info[4].width = 1 << ((idx_value >> 16) & 0xf); 435 track->textures[i].cube_info[4].width = 1 << ((idx_value >> 16) & 0xf);
diff --git a/drivers/gpu/drm/radeon/r300.c b/drivers/gpu/drm/radeon/r300.c
index 83378c39d0e3..43b55a030b4d 100644
--- a/drivers/gpu/drm/radeon/r300.c
+++ b/drivers/gpu/drm/radeon/r300.c
@@ -36,7 +36,15 @@
36#include "rv350d.h" 36#include "rv350d.h"
37#include "r300_reg_safe.h" 37#include "r300_reg_safe.h"
38 38
39/* This files gather functions specifics to: r300,r350,rv350,rv370,rv380 */ 39/* This files gather functions specifics to: r300,r350,rv350,rv370,rv380
40 *
41 * GPU Errata:
42 * - HOST_PATH_CNTL: r300 family seems to dislike write to HOST_PATH_CNTL
43 * using MMIO to flush host path read cache, this lead to HARDLOCKUP.
44 * However, scheduling such write to the ring seems harmless, i suspect
45 * the CP read collide with the flush somehow, or maybe the MC, hard to
46 * tell. (Jerome Glisse)
47 */
40 48
41/* 49/*
42 * rv370,rv380 PCIE GART 50 * rv370,rv380 PCIE GART
@@ -178,6 +186,11 @@ void r300_fence_ring_emit(struct radeon_device *rdev,
178 /* Wait until IDLE & CLEAN */ 186 /* Wait until IDLE & CLEAN */
179 radeon_ring_write(rdev, PACKET0(0x1720, 0)); 187 radeon_ring_write(rdev, PACKET0(0x1720, 0));
180 radeon_ring_write(rdev, (1 << 17) | (1 << 16) | (1 << 9)); 188 radeon_ring_write(rdev, (1 << 17) | (1 << 16) | (1 << 9));
189 radeon_ring_write(rdev, PACKET0(RADEON_HOST_PATH_CNTL, 0));
190 radeon_ring_write(rdev, rdev->config.r300.hdp_cntl |
191 RADEON_HDP_READ_BUFFER_INVALIDATE);
192 radeon_ring_write(rdev, PACKET0(RADEON_HOST_PATH_CNTL, 0));
193 radeon_ring_write(rdev, rdev->config.r300.hdp_cntl);
181 /* Emit fence sequence & fire IRQ */ 194 /* Emit fence sequence & fire IRQ */
182 radeon_ring_write(rdev, PACKET0(rdev->fence_drv.scratch_reg, 0)); 195 radeon_ring_write(rdev, PACKET0(rdev->fence_drv.scratch_reg, 0));
183 radeon_ring_write(rdev, fence->seq); 196 radeon_ring_write(rdev, fence->seq);
@@ -493,11 +506,14 @@ void r300_vram_info(struct radeon_device *rdev)
493 506
494 /* DDR for all card after R300 & IGP */ 507 /* DDR for all card after R300 & IGP */
495 rdev->mc.vram_is_ddr = true; 508 rdev->mc.vram_is_ddr = true;
509
496 tmp = RREG32(RADEON_MEM_CNTL); 510 tmp = RREG32(RADEON_MEM_CNTL);
497 if (tmp & R300_MEM_NUM_CHANNELS_MASK) { 511 tmp &= R300_MEM_NUM_CHANNELS_MASK;
498 rdev->mc.vram_width = 128; 512 switch (tmp) {
499 } else { 513 case 0: rdev->mc.vram_width = 64; break;
500 rdev->mc.vram_width = 64; 514 case 1: rdev->mc.vram_width = 128; break;
515 case 2: rdev->mc.vram_width = 256; break;
516 default: rdev->mc.vram_width = 128; break;
501 } 517 }
502 518
503 r100_vram_init_sizes(rdev); 519 r100_vram_init_sizes(rdev);
@@ -686,7 +702,15 @@ static int r300_packet0_check(struct radeon_cs_parser *p,
686 r100_cs_dump_packet(p, pkt); 702 r100_cs_dump_packet(p, pkt);
687 return r; 703 return r;
688 } 704 }
689 ib[idx] = idx_value + ((u32)reloc->lobj.gpu_offset); 705
706 if (reloc->lobj.tiling_flags & RADEON_TILING_MACRO)
707 tile_flags |= R300_TXO_MACRO_TILE;
708 if (reloc->lobj.tiling_flags & RADEON_TILING_MICRO)
709 tile_flags |= R300_TXO_MICRO_TILE;
710
711 tmp = idx_value + ((u32)reloc->lobj.gpu_offset);
712 tmp |= tile_flags;
713 ib[idx] = tmp;
690 track->textures[i].robj = reloc->robj; 714 track->textures[i].robj = reloc->robj;
691 break; 715 break;
692 /* Tracked registers */ 716 /* Tracked registers */
@@ -852,7 +876,6 @@ static int r300_packet0_check(struct radeon_cs_parser *p,
852 case R300_TX_FORMAT_Z6Y5X5: 876 case R300_TX_FORMAT_Z6Y5X5:
853 case R300_TX_FORMAT_W4Z4Y4X4: 877 case R300_TX_FORMAT_W4Z4Y4X4:
854 case R300_TX_FORMAT_W1Z5Y5X5: 878 case R300_TX_FORMAT_W1Z5Y5X5:
855 case R300_TX_FORMAT_DXT1:
856 case R300_TX_FORMAT_D3DMFT_CxV8U8: 879 case R300_TX_FORMAT_D3DMFT_CxV8U8:
857 case R300_TX_FORMAT_B8G8_B8G8: 880 case R300_TX_FORMAT_B8G8_B8G8:
858 case R300_TX_FORMAT_G8R8_G8B8: 881 case R300_TX_FORMAT_G8R8_G8B8:
@@ -866,8 +889,6 @@ static int r300_packet0_check(struct radeon_cs_parser *p,
866 case 0x17: 889 case 0x17:
867 case R300_TX_FORMAT_FL_I32: 890 case R300_TX_FORMAT_FL_I32:
868 case 0x1e: 891 case 0x1e:
869 case R300_TX_FORMAT_DXT3:
870 case R300_TX_FORMAT_DXT5:
871 track->textures[i].cpp = 4; 892 track->textures[i].cpp = 4;
872 break; 893 break;
873 case R300_TX_FORMAT_W16Z16Y16X16: 894 case R300_TX_FORMAT_W16Z16Y16X16:
@@ -878,6 +899,23 @@ static int r300_packet0_check(struct radeon_cs_parser *p,
878 case R300_TX_FORMAT_FL_R32G32B32A32: 899 case R300_TX_FORMAT_FL_R32G32B32A32:
879 track->textures[i].cpp = 16; 900 track->textures[i].cpp = 16;
880 break; 901 break;
902 case R300_TX_FORMAT_DXT1:
903 track->textures[i].cpp = 1;
904 track->textures[i].compress_format = R100_TRACK_COMP_DXT1;
905 break;
906 case R300_TX_FORMAT_ATI2N:
907 if (p->rdev->family < CHIP_R420) {
908 DRM_ERROR("Invalid texture format %u\n",
909 (idx_value & 0x1F));
910 return -EINVAL;
911 }
912 /* The same rules apply as for DXT3/5. */
913 /* Pass through. */
914 case R300_TX_FORMAT_DXT3:
915 case R300_TX_FORMAT_DXT5:
916 track->textures[i].cpp = 1;
917 track->textures[i].compress_format = R100_TRACK_COMP_DXT35;
918 break;
881 default: 919 default:
882 DRM_ERROR("Invalid texture format %u\n", 920 DRM_ERROR("Invalid texture format %u\n",
883 (idx_value & 0x1F)); 921 (idx_value & 0x1F));
@@ -937,6 +975,16 @@ static int r300_packet0_check(struct radeon_cs_parser *p,
937 track->textures[i].width_11 = tmp; 975 track->textures[i].width_11 = tmp;
938 tmp = ((idx_value >> 16) & 1) << 11; 976 tmp = ((idx_value >> 16) & 1) << 11;
939 track->textures[i].height_11 = tmp; 977 track->textures[i].height_11 = tmp;
978
979 /* ATI1N */
980 if (idx_value & (1 << 14)) {
981 /* The same rules apply as for DXT1. */
982 track->textures[i].compress_format =
983 R100_TRACK_COMP_DXT1;
984 }
985 } else if (idx_value & (1 << 14)) {
986 DRM_ERROR("Forbidden bit TXFORMAT_MSB\n");
987 return -EINVAL;
940 } 988 }
941 break; 989 break;
942 case 0x4480: 990 case 0x4480:
@@ -978,6 +1026,18 @@ static int r300_packet0_check(struct radeon_cs_parser *p,
978 } 1026 }
979 ib[idx] = idx_value + ((u32)reloc->lobj.gpu_offset); 1027 ib[idx] = idx_value + ((u32)reloc->lobj.gpu_offset);
980 break; 1028 break;
1029 case 0x4e0c:
1030 /* RB3D_COLOR_CHANNEL_MASK */
1031 track->color_channel_mask = idx_value;
1032 break;
1033 case 0x4d1c:
1034 /* ZB_BW_CNTL */
1035 track->fastfill = !!(idx_value & (1 << 2));
1036 break;
1037 case 0x4e04:
1038 /* RB3D_BLENDCNTL */
1039 track->blend_read_enable = !!(idx_value & (1 << 2));
1040 break;
981 case 0x4be8: 1041 case 0x4be8:
982 /* valid register only on RV530 */ 1042 /* valid register only on RV530 */
983 if (p->rdev->family == CHIP_RV530) 1043 if (p->rdev->family == CHIP_RV530)
@@ -1214,6 +1274,7 @@ static int r300_startup(struct radeon_device *rdev)
1214 } 1274 }
1215 /* Enable IRQ */ 1275 /* Enable IRQ */
1216 r100_irq_set(rdev); 1276 r100_irq_set(rdev);
1277 rdev->config.r300.hdp_cntl = RREG32(RADEON_HOST_PATH_CNTL);
1217 /* 1M ring buffer */ 1278 /* 1M ring buffer */
1218 r = r100_cp_init(rdev, 1024 * 1024); 1279 r = r100_cp_init(rdev, 1024 * 1024);
1219 if (r) { 1280 if (r) {
@@ -1269,7 +1330,6 @@ int r300_suspend(struct radeon_device *rdev)
1269 1330
1270void r300_fini(struct radeon_device *rdev) 1331void r300_fini(struct radeon_device *rdev)
1271{ 1332{
1272 r300_suspend(rdev);
1273 r100_cp_fini(rdev); 1333 r100_cp_fini(rdev);
1274 r100_wb_fini(rdev); 1334 r100_wb_fini(rdev);
1275 r100_ib_fini(rdev); 1335 r100_ib_fini(rdev);
@@ -1278,6 +1338,7 @@ void r300_fini(struct radeon_device *rdev)
1278 rv370_pcie_gart_fini(rdev); 1338 rv370_pcie_gart_fini(rdev);
1279 if (rdev->flags & RADEON_IS_PCI) 1339 if (rdev->flags & RADEON_IS_PCI)
1280 r100_pci_gart_fini(rdev); 1340 r100_pci_gart_fini(rdev);
1341 radeon_agp_fini(rdev);
1281 radeon_irq_kms_fini(rdev); 1342 radeon_irq_kms_fini(rdev);
1282 radeon_fence_driver_fini(rdev); 1343 radeon_fence_driver_fini(rdev);
1283 radeon_bo_fini(rdev); 1344 radeon_bo_fini(rdev);
@@ -1324,6 +1385,8 @@ int r300_init(struct radeon_device *rdev)
1324 r300_errata(rdev); 1385 r300_errata(rdev);
1325 /* Initialize clocks */ 1386 /* Initialize clocks */
1326 radeon_get_clock_info(rdev->ddev); 1387 radeon_get_clock_info(rdev->ddev);
1388 /* Initialize power management */
1389 radeon_pm_init(rdev);
1327 /* Get vram informations */ 1390 /* Get vram informations */
1328 r300_vram_info(rdev); 1391 r300_vram_info(rdev);
1329 /* Initialize memory controller (also test AGP) */ 1392 /* Initialize memory controller (also test AGP) */
@@ -1357,15 +1420,15 @@ int r300_init(struct radeon_device *rdev)
1357 if (r) { 1420 if (r) {
1358 /* Somethings want wront with the accel init stop accel */ 1421 /* Somethings want wront with the accel init stop accel */
1359 dev_err(rdev->dev, "Disabling GPU acceleration\n"); 1422 dev_err(rdev->dev, "Disabling GPU acceleration\n");
1360 r300_suspend(rdev);
1361 r100_cp_fini(rdev); 1423 r100_cp_fini(rdev);
1362 r100_wb_fini(rdev); 1424 r100_wb_fini(rdev);
1363 r100_ib_fini(rdev); 1425 r100_ib_fini(rdev);
1426 radeon_irq_kms_fini(rdev);
1364 if (rdev->flags & RADEON_IS_PCIE) 1427 if (rdev->flags & RADEON_IS_PCIE)
1365 rv370_pcie_gart_fini(rdev); 1428 rv370_pcie_gart_fini(rdev);
1366 if (rdev->flags & RADEON_IS_PCI) 1429 if (rdev->flags & RADEON_IS_PCI)
1367 r100_pci_gart_fini(rdev); 1430 r100_pci_gart_fini(rdev);
1368 radeon_irq_kms_fini(rdev); 1431 radeon_agp_fini(rdev);
1369 rdev->accel_working = false; 1432 rdev->accel_working = false;
1370 } 1433 }
1371 return 0; 1434 return 0;
diff --git a/drivers/gpu/drm/radeon/r300_cmdbuf.c b/drivers/gpu/drm/radeon/r300_cmdbuf.c
index cb2e470f97d4..34bffa0e4b73 100644
--- a/drivers/gpu/drm/radeon/r300_cmdbuf.c
+++ b/drivers/gpu/drm/radeon/r300_cmdbuf.c
@@ -990,7 +990,7 @@ static inline int r300_emit_r500fp(drm_radeon_private_t *dev_priv,
990 int sz; 990 int sz;
991 int addr; 991 int addr;
992 int type; 992 int type;
993 int clamp; 993 int isclamp;
994 int stride; 994 int stride;
995 RING_LOCALS; 995 RING_LOCALS;
996 996
@@ -999,10 +999,10 @@ static inline int r300_emit_r500fp(drm_radeon_private_t *dev_priv,
999 addr = ((header.r500fp.adrhi_flags & 1) << 8) | header.r500fp.adrlo; 999 addr = ((header.r500fp.adrhi_flags & 1) << 8) | header.r500fp.adrlo;
1000 1000
1001 type = !!(header.r500fp.adrhi_flags & R500FP_CONSTANT_TYPE); 1001 type = !!(header.r500fp.adrhi_flags & R500FP_CONSTANT_TYPE);
1002 clamp = !!(header.r500fp.adrhi_flags & R500FP_CONSTANT_CLAMP); 1002 isclamp = !!(header.r500fp.adrhi_flags & R500FP_CONSTANT_CLAMP);
1003 1003
1004 addr |= (type << 16); 1004 addr |= (type << 16);
1005 addr |= (clamp << 17); 1005 addr |= (isclamp << 17);
1006 1006
1007 stride = type ? 4 : 6; 1007 stride = type ? 4 : 6;
1008 1008
diff --git a/drivers/gpu/drm/radeon/r300_reg.h b/drivers/gpu/drm/radeon/r300_reg.h
index 4b7afef35a65..1735a2b69580 100644
--- a/drivers/gpu/drm/radeon/r300_reg.h
+++ b/drivers/gpu/drm/radeon/r300_reg.h
@@ -900,6 +900,7 @@
900# define R300_TX_FORMAT_FL_I32 0x1B 900# define R300_TX_FORMAT_FL_I32 0x1B
901# define R300_TX_FORMAT_FL_I32A32 0x1C 901# define R300_TX_FORMAT_FL_I32A32 0x1C
902# define R300_TX_FORMAT_FL_R32G32B32A32 0x1D 902# define R300_TX_FORMAT_FL_R32G32B32A32 0x1D
903# define R300_TX_FORMAT_ATI2N 0x1F
903 /* alpha modes, convenience mostly */ 904 /* alpha modes, convenience mostly */
904 /* if you have alpha, pick constant appropriate to the 905 /* if you have alpha, pick constant appropriate to the
905 number of channels (1 for I8, 2 for I8A8, 4 for R8G8B8A8, etc */ 906 number of channels (1 for I8, 2 for I8A8, 4 for R8G8B8A8, etc */
diff --git a/drivers/gpu/drm/radeon/r420.c b/drivers/gpu/drm/radeon/r420.c
index c05a7270cf0c..d9373246c97f 100644
--- a/drivers/gpu/drm/radeon/r420.c
+++ b/drivers/gpu/drm/radeon/r420.c
@@ -30,7 +30,15 @@
30#include "radeon_reg.h" 30#include "radeon_reg.h"
31#include "radeon.h" 31#include "radeon.h"
32#include "atom.h" 32#include "atom.h"
33#include "r100d.h"
33#include "r420d.h" 34#include "r420d.h"
35#include "r420_reg_safe.h"
36
37static void r420_set_reg_safe(struct radeon_device *rdev)
38{
39 rdev->config.r300.reg_safe_bm = r420_reg_safe_bm;
40 rdev->config.r300.reg_safe_bm_size = ARRAY_SIZE(r420_reg_safe_bm);
41}
34 42
35int r420_mc_init(struct radeon_device *rdev) 43int r420_mc_init(struct radeon_device *rdev)
36{ 44{
@@ -42,9 +50,7 @@ int r420_mc_init(struct radeon_device *rdev)
42 if (rdev->flags & RADEON_IS_AGP) { 50 if (rdev->flags & RADEON_IS_AGP) {
43 r = radeon_agp_init(rdev); 51 r = radeon_agp_init(rdev);
44 if (r) { 52 if (r) {
45 printk(KERN_WARNING "[drm] Disabling AGP\n"); 53 radeon_agp_disable(rdev);
46 rdev->flags &= ~RADEON_IS_AGP;
47 rdev->mc.gtt_size = radeon_gart_size * 1024 * 1024;
48 } else { 54 } else {
49 rdev->mc.gtt_location = rdev->mc.agp_base; 55 rdev->mc.gtt_location = rdev->mc.agp_base;
50 } 56 }
@@ -165,6 +171,34 @@ static void r420_clock_resume(struct radeon_device *rdev)
165 WREG32_PLL(R_00000D_SCLK_CNTL, sclk_cntl); 171 WREG32_PLL(R_00000D_SCLK_CNTL, sclk_cntl);
166} 172}
167 173
174static void r420_cp_errata_init(struct radeon_device *rdev)
175{
176 /* RV410 and R420 can lock up if CP DMA to host memory happens
177 * while the 2D engine is busy.
178 *
179 * The proper workaround is to queue a RESYNC at the beginning
180 * of the CP init, apparently.
181 */
182 radeon_scratch_get(rdev, &rdev->config.r300.resync_scratch);
183 radeon_ring_lock(rdev, 8);
184 radeon_ring_write(rdev, PACKET0(R300_CP_RESYNC_ADDR, 1));
185 radeon_ring_write(rdev, rdev->config.r300.resync_scratch);
186 radeon_ring_write(rdev, 0xDEADBEEF);
187 radeon_ring_unlock_commit(rdev);
188}
189
190static void r420_cp_errata_fini(struct radeon_device *rdev)
191{
192 /* Catch the RESYNC we dispatched all the way back,
193 * at the very beginning of the CP init.
194 */
195 radeon_ring_lock(rdev, 8);
196 radeon_ring_write(rdev, PACKET0(R300_RB3D_DSTCACHE_CTLSTAT, 0));
197 radeon_ring_write(rdev, R300_RB3D_DC_FINISH);
198 radeon_ring_unlock_commit(rdev);
199 radeon_scratch_free(rdev, rdev->config.r300.resync_scratch);
200}
201
168static int r420_startup(struct radeon_device *rdev) 202static int r420_startup(struct radeon_device *rdev)
169{ 203{
170 int r; 204 int r;
@@ -190,12 +224,14 @@ static int r420_startup(struct radeon_device *rdev)
190 r420_pipes_init(rdev); 224 r420_pipes_init(rdev);
191 /* Enable IRQ */ 225 /* Enable IRQ */
192 r100_irq_set(rdev); 226 r100_irq_set(rdev);
227 rdev->config.r300.hdp_cntl = RREG32(RADEON_HOST_PATH_CNTL);
193 /* 1M ring buffer */ 228 /* 1M ring buffer */
194 r = r100_cp_init(rdev, 1024 * 1024); 229 r = r100_cp_init(rdev, 1024 * 1024);
195 if (r) { 230 if (r) {
196 dev_err(rdev->dev, "failled initializing CP (%d).\n", r); 231 dev_err(rdev->dev, "failled initializing CP (%d).\n", r);
197 return r; 232 return r;
198 } 233 }
234 r420_cp_errata_init(rdev);
199 r = r100_wb_init(rdev); 235 r = r100_wb_init(rdev);
200 if (r) { 236 if (r) {
201 dev_err(rdev->dev, "failled initializing WB (%d).\n", r); 237 dev_err(rdev->dev, "failled initializing WB (%d).\n", r);
@@ -238,6 +274,7 @@ int r420_resume(struct radeon_device *rdev)
238 274
239int r420_suspend(struct radeon_device *rdev) 275int r420_suspend(struct radeon_device *rdev)
240{ 276{
277 r420_cp_errata_fini(rdev);
241 r100_cp_disable(rdev); 278 r100_cp_disable(rdev);
242 r100_wb_disable(rdev); 279 r100_wb_disable(rdev);
243 r100_irq_disable(rdev); 280 r100_irq_disable(rdev);
@@ -346,22 +383,21 @@ int r420_init(struct radeon_device *rdev)
346 if (r) 383 if (r)
347 return r; 384 return r;
348 } 385 }
349 r300_set_reg_safe(rdev); 386 r420_set_reg_safe(rdev);
350 rdev->accel_working = true; 387 rdev->accel_working = true;
351 r = r420_startup(rdev); 388 r = r420_startup(rdev);
352 if (r) { 389 if (r) {
353 /* Somethings want wront with the accel init stop accel */ 390 /* Somethings want wront with the accel init stop accel */
354 dev_err(rdev->dev, "Disabling GPU acceleration\n"); 391 dev_err(rdev->dev, "Disabling GPU acceleration\n");
355 r420_suspend(rdev);
356 r100_cp_fini(rdev); 392 r100_cp_fini(rdev);
357 r100_wb_fini(rdev); 393 r100_wb_fini(rdev);
358 r100_ib_fini(rdev); 394 r100_ib_fini(rdev);
395 radeon_irq_kms_fini(rdev);
359 if (rdev->flags & RADEON_IS_PCIE) 396 if (rdev->flags & RADEON_IS_PCIE)
360 rv370_pcie_gart_fini(rdev); 397 rv370_pcie_gart_fini(rdev);
361 if (rdev->flags & RADEON_IS_PCI) 398 if (rdev->flags & RADEON_IS_PCI)
362 r100_pci_gart_fini(rdev); 399 r100_pci_gart_fini(rdev);
363 radeon_agp_fini(rdev); 400 radeon_agp_fini(rdev);
364 radeon_irq_kms_fini(rdev);
365 rdev->accel_working = false; 401 rdev->accel_working = false;
366 } 402 }
367 return 0; 403 return 0;
diff --git a/drivers/gpu/drm/radeon/r520.c b/drivers/gpu/drm/radeon/r520.c
index 0f3843b6dac7..ddf5731eba0d 100644
--- a/drivers/gpu/drm/radeon/r520.c
+++ b/drivers/gpu/drm/radeon/r520.c
@@ -186,6 +186,7 @@ static int r520_startup(struct radeon_device *rdev)
186 } 186 }
187 /* Enable IRQ */ 187 /* Enable IRQ */
188 rs600_irq_set(rdev); 188 rs600_irq_set(rdev);
189 rdev->config.r300.hdp_cntl = RREG32(RADEON_HOST_PATH_CNTL);
189 /* 1M ring buffer */ 190 /* 1M ring buffer */
190 r = r100_cp_init(rdev, 1024 * 1024); 191 r = r100_cp_init(rdev, 1024 * 1024);
191 if (r) { 192 if (r) {
@@ -293,13 +294,12 @@ int r520_init(struct radeon_device *rdev)
293 if (r) { 294 if (r) {
294 /* Somethings want wront with the accel init stop accel */ 295 /* Somethings want wront with the accel init stop accel */
295 dev_err(rdev->dev, "Disabling GPU acceleration\n"); 296 dev_err(rdev->dev, "Disabling GPU acceleration\n");
296 rv515_suspend(rdev);
297 r100_cp_fini(rdev); 297 r100_cp_fini(rdev);
298 r100_wb_fini(rdev); 298 r100_wb_fini(rdev);
299 r100_ib_fini(rdev); 299 r100_ib_fini(rdev);
300 radeon_irq_kms_fini(rdev);
300 rv370_pcie_gart_fini(rdev); 301 rv370_pcie_gart_fini(rdev);
301 radeon_agp_fini(rdev); 302 radeon_agp_fini(rdev);
302 radeon_irq_kms_fini(rdev);
303 rdev->accel_working = false; 303 rdev->accel_working = false;
304 } 304 }
305 return 0; 305 return 0;
diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c
index 36656bd110bf..2ffcf5a03551 100644
--- a/drivers/gpu/drm/radeon/r600.c
+++ b/drivers/gpu/drm/radeon/r600.c
@@ -285,7 +285,8 @@ void r600_hpd_init(struct radeon_device *rdev)
285 } 285 }
286 } 286 }
287 } 287 }
288 r600_irq_set(rdev); 288 if (rdev->irq.installed)
289 r600_irq_set(rdev);
289} 290}
290 291
291void r600_hpd_fini(struct radeon_device *rdev) 292void r600_hpd_fini(struct radeon_device *rdev)
@@ -623,7 +624,6 @@ int r600_mc_init(struct radeon_device *rdev)
623 fixed20_12 a; 624 fixed20_12 a;
624 u32 tmp; 625 u32 tmp;
625 int chansize, numchan; 626 int chansize, numchan;
626 int r;
627 627
628 /* Get VRAM informations */ 628 /* Get VRAM informations */
629 rdev->mc.vram_is_ddr = true; 629 rdev->mc.vram_is_ddr = true;
@@ -666,9 +666,6 @@ int r600_mc_init(struct radeon_device *rdev)
666 rdev->mc.real_vram_size = rdev->mc.aper_size; 666 rdev->mc.real_vram_size = rdev->mc.aper_size;
667 667
668 if (rdev->flags & RADEON_IS_AGP) { 668 if (rdev->flags & RADEON_IS_AGP) {
669 r = radeon_agp_init(rdev);
670 if (r)
671 return r;
672 /* gtt_size is setup by radeon_agp_init */ 669 /* gtt_size is setup by radeon_agp_init */
673 rdev->mc.gtt_location = rdev->mc.agp_base; 670 rdev->mc.gtt_location = rdev->mc.agp_base;
674 tmp = 0xFFFFFFFFUL - rdev->mc.agp_base - rdev->mc.gtt_size; 671 tmp = 0xFFFFFFFFUL - rdev->mc.agp_base - rdev->mc.gtt_size;
@@ -726,6 +723,10 @@ int r600_mc_init(struct radeon_device *rdev)
726 a.full = rfixed_const(100); 723 a.full = rfixed_const(100);
727 rdev->pm.sclk.full = rfixed_const(rdev->clock.default_sclk); 724 rdev->pm.sclk.full = rfixed_const(rdev->clock.default_sclk);
728 rdev->pm.sclk.full = rfixed_div(rdev->pm.sclk, a); 725 rdev->pm.sclk.full = rfixed_div(rdev->pm.sclk, a);
726
727 if (rdev->flags & RADEON_IS_IGP)
728 rdev->mc.igp_sideport_enabled = radeon_atombios_sideport_present(rdev);
729
729 return 0; 730 return 0;
730} 731}
731 732
@@ -1384,11 +1385,6 @@ void r600_pciep_wreg(struct radeon_device *rdev, u32 reg, u32 v)
1384 (void)RREG32(PCIE_PORT_DATA); 1385 (void)RREG32(PCIE_PORT_DATA);
1385} 1386}
1386 1387
1387void r600_hdp_flush(struct radeon_device *rdev)
1388{
1389 WREG32(R_005480_HDP_MEM_COHERENCY_FLUSH_CNTL, 0x1);
1390}
1391
1392/* 1388/*
1393 * CP & Ring 1389 * CP & Ring
1394 */ 1390 */
@@ -1658,6 +1654,12 @@ void r600_ring_init(struct radeon_device *rdev, unsigned ring_size)
1658 rdev->cp.align_mask = 16 - 1; 1654 rdev->cp.align_mask = 16 - 1;
1659} 1655}
1660 1656
1657void r600_cp_fini(struct radeon_device *rdev)
1658{
1659 r600_cp_stop(rdev);
1660 radeon_ring_fini(rdev);
1661}
1662
1661 1663
1662/* 1664/*
1663 * GPU scratch registers helpers function. 1665 * GPU scratch registers helpers function.
@@ -1785,28 +1787,31 @@ void r600_fence_ring_emit(struct radeon_device *rdev,
1785 radeon_ring_write(rdev, PACKET3(PACKET3_SET_CONFIG_REG, 1)); 1787 radeon_ring_write(rdev, PACKET3(PACKET3_SET_CONFIG_REG, 1));
1786 radeon_ring_write(rdev, ((rdev->fence_drv.scratch_reg - PACKET3_SET_CONFIG_REG_OFFSET) >> 2)); 1788 radeon_ring_write(rdev, ((rdev->fence_drv.scratch_reg - PACKET3_SET_CONFIG_REG_OFFSET) >> 2));
1787 radeon_ring_write(rdev, fence->seq); 1789 radeon_ring_write(rdev, fence->seq);
1790 radeon_ring_write(rdev, PACKET0(R_005480_HDP_MEM_COHERENCY_FLUSH_CNTL, 0));
1791 radeon_ring_write(rdev, 1);
1788 /* CP_INTERRUPT packet 3 no longer exists, use packet 0 */ 1792 /* CP_INTERRUPT packet 3 no longer exists, use packet 0 */
1789 radeon_ring_write(rdev, PACKET0(CP_INT_STATUS, 0)); 1793 radeon_ring_write(rdev, PACKET0(CP_INT_STATUS, 0));
1790 radeon_ring_write(rdev, RB_INT_STAT); 1794 radeon_ring_write(rdev, RB_INT_STAT);
1791} 1795}
1792 1796
1793int r600_copy_dma(struct radeon_device *rdev,
1794 uint64_t src_offset,
1795 uint64_t dst_offset,
1796 unsigned num_pages,
1797 struct radeon_fence *fence)
1798{
1799 /* FIXME: implement */
1800 return 0;
1801}
1802
1803int r600_copy_blit(struct radeon_device *rdev, 1797int r600_copy_blit(struct radeon_device *rdev,
1804 uint64_t src_offset, uint64_t dst_offset, 1798 uint64_t src_offset, uint64_t dst_offset,
1805 unsigned num_pages, struct radeon_fence *fence) 1799 unsigned num_pages, struct radeon_fence *fence)
1806{ 1800{
1807 r600_blit_prepare_copy(rdev, num_pages * RADEON_GPU_PAGE_SIZE); 1801 int r;
1802
1803 mutex_lock(&rdev->r600_blit.mutex);
1804 rdev->r600_blit.vb_ib = NULL;
1805 r = r600_blit_prepare_copy(rdev, num_pages * RADEON_GPU_PAGE_SIZE);
1806 if (r) {
1807 if (rdev->r600_blit.vb_ib)
1808 radeon_ib_free(rdev, &rdev->r600_blit.vb_ib);
1809 mutex_unlock(&rdev->r600_blit.mutex);
1810 return r;
1811 }
1808 r600_kms_blit_copy(rdev, src_offset, dst_offset, num_pages * RADEON_GPU_PAGE_SIZE); 1812 r600_kms_blit_copy(rdev, src_offset, dst_offset, num_pages * RADEON_GPU_PAGE_SIZE);
1809 r600_blit_done_copy(rdev, fence); 1813 r600_blit_done_copy(rdev, fence);
1814 mutex_unlock(&rdev->r600_blit.mutex);
1810 return 0; 1815 return 0;
1811} 1816}
1812 1817
@@ -1862,18 +1867,25 @@ int r600_startup(struct radeon_device *rdev)
1862 return r; 1867 return r;
1863 } 1868 }
1864 r600_gpu_init(rdev); 1869 r600_gpu_init(rdev);
1865 1870 r = r600_blit_init(rdev);
1866 r = radeon_bo_reserve(rdev->r600_blit.shader_obj, false);
1867 if (unlikely(r != 0))
1868 return r;
1869 r = radeon_bo_pin(rdev->r600_blit.shader_obj, RADEON_GEM_DOMAIN_VRAM,
1870 &rdev->r600_blit.shader_gpu_addr);
1871 radeon_bo_unreserve(rdev->r600_blit.shader_obj);
1872 if (r) { 1871 if (r) {
1873 dev_err(rdev->dev, "(%d) pin blit object failed\n", r); 1872 r600_blit_fini(rdev);
1874 return r; 1873 rdev->asic->copy = NULL;
1874 dev_warn(rdev->dev, "failed blitter (%d) falling back to memcpy\n", r);
1875 }
1876 /* pin copy shader into vram */
1877 if (rdev->r600_blit.shader_obj) {
1878 r = radeon_bo_reserve(rdev->r600_blit.shader_obj, false);
1879 if (unlikely(r != 0))
1880 return r;
1881 r = radeon_bo_pin(rdev->r600_blit.shader_obj, RADEON_GEM_DOMAIN_VRAM,
1882 &rdev->r600_blit.shader_gpu_addr);
1883 radeon_bo_unreserve(rdev->r600_blit.shader_obj);
1884 if (r) {
1885 dev_err(rdev->dev, "(%d) pin blit object failed\n", r);
1886 return r;
1887 }
1875 } 1888 }
1876
1877 /* Enable IRQ */ 1889 /* Enable IRQ */
1878 r = r600_irq_init(rdev); 1890 r = r600_irq_init(rdev);
1879 if (r) { 1891 if (r) {
@@ -1938,6 +1950,13 @@ int r600_resume(struct radeon_device *rdev)
1938 DRM_ERROR("radeon: failled testing IB (%d).\n", r); 1950 DRM_ERROR("radeon: failled testing IB (%d).\n", r);
1939 return r; 1951 return r;
1940 } 1952 }
1953
1954 r = r600_audio_init(rdev);
1955 if (r) {
1956 DRM_ERROR("radeon: audio resume failed\n");
1957 return r;
1958 }
1959
1941 return r; 1960 return r;
1942} 1961}
1943 1962
@@ -1945,17 +1964,21 @@ int r600_suspend(struct radeon_device *rdev)
1945{ 1964{
1946 int r; 1965 int r;
1947 1966
1967 r600_audio_fini(rdev);
1948 /* FIXME: we should wait for ring to be empty */ 1968 /* FIXME: we should wait for ring to be empty */
1949 r600_cp_stop(rdev); 1969 r600_cp_stop(rdev);
1950 rdev->cp.ready = false; 1970 rdev->cp.ready = false;
1971 r600_irq_suspend(rdev);
1951 r600_wb_disable(rdev); 1972 r600_wb_disable(rdev);
1952 r600_pcie_gart_disable(rdev); 1973 r600_pcie_gart_disable(rdev);
1953 /* unpin shaders bo */ 1974 /* unpin shaders bo */
1954 r = radeon_bo_reserve(rdev->r600_blit.shader_obj, false); 1975 if (rdev->r600_blit.shader_obj) {
1955 if (unlikely(r != 0)) 1976 r = radeon_bo_reserve(rdev->r600_blit.shader_obj, false);
1956 return r; 1977 if (!r) {
1957 radeon_bo_unpin(rdev->r600_blit.shader_obj); 1978 radeon_bo_unpin(rdev->r600_blit.shader_obj);
1958 radeon_bo_unreserve(rdev->r600_blit.shader_obj); 1979 radeon_bo_unreserve(rdev->r600_blit.shader_obj);
1980 }
1981 }
1959 return 0; 1982 return 0;
1960} 1983}
1961 1984
@@ -2016,6 +2039,11 @@ int r600_init(struct radeon_device *rdev)
2016 r = radeon_fence_driver_init(rdev); 2039 r = radeon_fence_driver_init(rdev);
2017 if (r) 2040 if (r)
2018 return r; 2041 return r;
2042 if (rdev->flags & RADEON_IS_AGP) {
2043 r = radeon_agp_init(rdev);
2044 if (r)
2045 radeon_agp_disable(rdev);
2046 }
2019 r = r600_mc_init(rdev); 2047 r = r600_mc_init(rdev);
2020 if (r) 2048 if (r)
2021 return r; 2049 return r;
@@ -2038,52 +2066,50 @@ int r600_init(struct radeon_device *rdev)
2038 if (r) 2066 if (r)
2039 return r; 2067 return r;
2040 2068
2041 r = r600_blit_init(rdev);
2042 if (r) {
2043 DRM_ERROR("radeon: failed blitter (%d).\n", r);
2044 return r;
2045 }
2046
2047 rdev->accel_working = true; 2069 rdev->accel_working = true;
2048 r = r600_startup(rdev); 2070 r = r600_startup(rdev);
2049 if (r) { 2071 if (r) {
2050 r600_suspend(rdev); 2072 dev_err(rdev->dev, "disabling GPU acceleration\n");
2073 r600_cp_fini(rdev);
2051 r600_wb_fini(rdev); 2074 r600_wb_fini(rdev);
2052 radeon_ring_fini(rdev); 2075 r600_irq_fini(rdev);
2076 radeon_irq_kms_fini(rdev);
2053 r600_pcie_gart_fini(rdev); 2077 r600_pcie_gart_fini(rdev);
2054 rdev->accel_working = false; 2078 rdev->accel_working = false;
2055 } 2079 }
2056 if (rdev->accel_working) { 2080 if (rdev->accel_working) {
2057 r = radeon_ib_pool_init(rdev); 2081 r = radeon_ib_pool_init(rdev);
2058 if (r) { 2082 if (r) {
2059 DRM_ERROR("radeon: failed initializing IB pool (%d).\n", r); 2083 dev_err(rdev->dev, "IB initialization failed (%d).\n", r);
2060 rdev->accel_working = false;
2061 }
2062 r = r600_ib_test(rdev);
2063 if (r) {
2064 DRM_ERROR("radeon: failed testing IB (%d).\n", r);
2065 rdev->accel_working = false; 2084 rdev->accel_working = false;
2085 } else {
2086 r = r600_ib_test(rdev);
2087 if (r) {
2088 dev_err(rdev->dev, "IB test failed (%d).\n", r);
2089 rdev->accel_working = false;
2090 }
2066 } 2091 }
2067 } 2092 }
2093
2094 r = r600_audio_init(rdev);
2095 if (r)
2096 return r; /* TODO error handling */
2068 return 0; 2097 return 0;
2069} 2098}
2070 2099
2071void r600_fini(struct radeon_device *rdev) 2100void r600_fini(struct radeon_device *rdev)
2072{ 2101{
2073 /* Suspend operations */ 2102 r600_audio_fini(rdev);
2074 r600_suspend(rdev);
2075
2076 r600_blit_fini(rdev); 2103 r600_blit_fini(rdev);
2104 r600_cp_fini(rdev);
2105 r600_wb_fini(rdev);
2077 r600_irq_fini(rdev); 2106 r600_irq_fini(rdev);
2078 radeon_irq_kms_fini(rdev); 2107 radeon_irq_kms_fini(rdev);
2079 radeon_ring_fini(rdev);
2080 r600_wb_fini(rdev);
2081 r600_pcie_gart_fini(rdev); 2108 r600_pcie_gart_fini(rdev);
2109 radeon_agp_fini(rdev);
2082 radeon_gem_fini(rdev); 2110 radeon_gem_fini(rdev);
2083 radeon_fence_driver_fini(rdev); 2111 radeon_fence_driver_fini(rdev);
2084 radeon_clocks_fini(rdev); 2112 radeon_clocks_fini(rdev);
2085 if (rdev->flags & RADEON_IS_AGP)
2086 radeon_agp_fini(rdev);
2087 radeon_bo_fini(rdev); 2113 radeon_bo_fini(rdev);
2088 radeon_atombios_fini(rdev); 2114 radeon_atombios_fini(rdev);
2089 kfree(rdev->bios); 2115 kfree(rdev->bios);
@@ -2189,14 +2215,14 @@ void r600_ih_ring_init(struct radeon_device *rdev, unsigned ring_size)
2189 rb_bufsz = drm_order(ring_size / 4); 2215 rb_bufsz = drm_order(ring_size / 4);
2190 ring_size = (1 << rb_bufsz) * 4; 2216 ring_size = (1 << rb_bufsz) * 4;
2191 rdev->ih.ring_size = ring_size; 2217 rdev->ih.ring_size = ring_size;
2192 rdev->ih.align_mask = 4 - 1; 2218 rdev->ih.ptr_mask = rdev->ih.ring_size - 1;
2219 rdev->ih.rptr = 0;
2193} 2220}
2194 2221
2195static int r600_ih_ring_alloc(struct radeon_device *rdev, unsigned ring_size) 2222static int r600_ih_ring_alloc(struct radeon_device *rdev)
2196{ 2223{
2197 int r; 2224 int r;
2198 2225
2199 rdev->ih.ring_size = ring_size;
2200 /* Allocate ring buffer */ 2226 /* Allocate ring buffer */
2201 if (rdev->ih.ring_obj == NULL) { 2227 if (rdev->ih.ring_obj == NULL) {
2202 r = radeon_bo_create(rdev, NULL, rdev->ih.ring_size, 2228 r = radeon_bo_create(rdev, NULL, rdev->ih.ring_size,
@@ -2226,9 +2252,6 @@ static int r600_ih_ring_alloc(struct radeon_device *rdev, unsigned ring_size)
2226 return r; 2252 return r;
2227 } 2253 }
2228 } 2254 }
2229 rdev->ih.ptr_mask = (rdev->cp.ring_size / 4) - 1;
2230 rdev->ih.rptr = 0;
2231
2232 return 0; 2255 return 0;
2233} 2256}
2234 2257
@@ -2378,7 +2401,7 @@ int r600_irq_init(struct radeon_device *rdev)
2378 u32 interrupt_cntl, ih_cntl, ih_rb_cntl; 2401 u32 interrupt_cntl, ih_cntl, ih_rb_cntl;
2379 2402
2380 /* allocate ring */ 2403 /* allocate ring */
2381 ret = r600_ih_ring_alloc(rdev, rdev->ih.ring_size); 2404 ret = r600_ih_ring_alloc(rdev);
2382 if (ret) 2405 if (ret)
2383 return ret; 2406 return ret;
2384 2407
@@ -2441,10 +2464,15 @@ int r600_irq_init(struct radeon_device *rdev)
2441 return ret; 2464 return ret;
2442} 2465}
2443 2466
2444void r600_irq_fini(struct radeon_device *rdev) 2467void r600_irq_suspend(struct radeon_device *rdev)
2445{ 2468{
2446 r600_disable_interrupts(rdev); 2469 r600_disable_interrupts(rdev);
2447 r600_rlc_stop(rdev); 2470 r600_rlc_stop(rdev);
2471}
2472
2473void r600_irq_fini(struct radeon_device *rdev)
2474{
2475 r600_irq_suspend(rdev);
2448 r600_ih_ring_fini(rdev); 2476 r600_ih_ring_fini(rdev);
2449} 2477}
2450 2478
@@ -2454,9 +2482,17 @@ int r600_irq_set(struct radeon_device *rdev)
2454 u32 mode_int = 0; 2482 u32 mode_int = 0;
2455 u32 hpd1, hpd2, hpd3, hpd4 = 0, hpd5 = 0, hpd6 = 0; 2483 u32 hpd1, hpd2, hpd3, hpd4 = 0, hpd5 = 0, hpd6 = 0;
2456 2484
2485 if (!rdev->irq.installed) {
2486 WARN(1, "Can't enable IRQ/MSI because no handler is installed.\n");
2487 return -EINVAL;
2488 }
2457 /* don't enable anything if the ih is disabled */ 2489 /* don't enable anything if the ih is disabled */
2458 if (!rdev->ih.enabled) 2490 if (!rdev->ih.enabled) {
2491 r600_disable_interrupts(rdev);
2492 /* force the active interrupt state to all disabled */
2493 r600_disable_interrupt_state(rdev);
2459 return 0; 2494 return 0;
2495 }
2460 2496
2461 if (ASIC_IS_DCE3(rdev)) { 2497 if (ASIC_IS_DCE3(rdev)) {
2462 hpd1 = RREG32(DC_HPD1_INT_CONTROL) & ~DC_HPDx_INT_EN; 2498 hpd1 = RREG32(DC_HPD1_INT_CONTROL) & ~DC_HPDx_INT_EN;
@@ -2626,16 +2662,18 @@ static inline u32 r600_get_ih_wptr(struct radeon_device *rdev)
2626 wptr = RREG32(IH_RB_WPTR); 2662 wptr = RREG32(IH_RB_WPTR);
2627 2663
2628 if (wptr & RB_OVERFLOW) { 2664 if (wptr & RB_OVERFLOW) {
2629 WARN_ON(1); 2665 /* When a ring buffer overflow happen start parsing interrupt
2630 /* XXX deal with overflow */ 2666 * from the last not overwritten vector (wptr + 16). Hopefully
2631 DRM_ERROR("IH RB overflow\n"); 2667 * this should allow us to catchup.
2668 */
2669 dev_warn(rdev->dev, "IH ring buffer overflow (0x%08X, %d, %d)\n",
2670 wptr, rdev->ih.rptr, (wptr + 16) + rdev->ih.ptr_mask);
2671 rdev->ih.rptr = (wptr + 16) & rdev->ih.ptr_mask;
2632 tmp = RREG32(IH_RB_CNTL); 2672 tmp = RREG32(IH_RB_CNTL);
2633 tmp |= IH_WPTR_OVERFLOW_CLEAR; 2673 tmp |= IH_WPTR_OVERFLOW_CLEAR;
2634 WREG32(IH_RB_CNTL, tmp); 2674 WREG32(IH_RB_CNTL, tmp);
2635 } 2675 }
2636 wptr = wptr & WPTR_OFFSET_MASK; 2676 return (wptr & rdev->ih.ptr_mask);
2637
2638 return wptr;
2639} 2677}
2640 2678
2641/* r600 IV Ring 2679/* r600 IV Ring
@@ -2671,12 +2709,13 @@ int r600_irq_process(struct radeon_device *rdev)
2671 u32 wptr = r600_get_ih_wptr(rdev); 2709 u32 wptr = r600_get_ih_wptr(rdev);
2672 u32 rptr = rdev->ih.rptr; 2710 u32 rptr = rdev->ih.rptr;
2673 u32 src_id, src_data; 2711 u32 src_id, src_data;
2674 u32 last_entry = rdev->ih.ring_size - 16;
2675 u32 ring_index, disp_int, disp_int_cont, disp_int_cont2; 2712 u32 ring_index, disp_int, disp_int_cont, disp_int_cont2;
2676 unsigned long flags; 2713 unsigned long flags;
2677 bool queue_hotplug = false; 2714 bool queue_hotplug = false;
2678 2715
2679 DRM_DEBUG("r600_irq_process start: rptr %d, wptr %d\n", rptr, wptr); 2716 DRM_DEBUG("r600_irq_process start: rptr %d, wptr %d\n", rptr, wptr);
2717 if (!rdev->ih.enabled)
2718 return IRQ_NONE;
2680 2719
2681 spin_lock_irqsave(&rdev->ih.lock, flags); 2720 spin_lock_irqsave(&rdev->ih.lock, flags);
2682 2721
@@ -2717,7 +2756,7 @@ restart_ih:
2717 } 2756 }
2718 break; 2757 break;
2719 default: 2758 default:
2720 DRM_ERROR("Unhandled interrupt: %d %d\n", src_id, src_data); 2759 DRM_DEBUG("Unhandled interrupt: %d %d\n", src_id, src_data);
2721 break; 2760 break;
2722 } 2761 }
2723 break; 2762 break;
@@ -2737,7 +2776,7 @@ restart_ih:
2737 } 2776 }
2738 break; 2777 break;
2739 default: 2778 default:
2740 DRM_ERROR("Unhandled interrupt: %d %d\n", src_id, src_data); 2779 DRM_DEBUG("Unhandled interrupt: %d %d\n", src_id, src_data);
2741 break; 2780 break;
2742 } 2781 }
2743 break; 2782 break;
@@ -2786,7 +2825,7 @@ restart_ih:
2786 } 2825 }
2787 break; 2826 break;
2788 default: 2827 default:
2789 DRM_ERROR("Unhandled interrupt: %d %d\n", src_id, src_data); 2828 DRM_DEBUG("Unhandled interrupt: %d %d\n", src_id, src_data);
2790 break; 2829 break;
2791 } 2830 }
2792 break; 2831 break;
@@ -2800,15 +2839,13 @@ restart_ih:
2800 DRM_DEBUG("IH: CP EOP\n"); 2839 DRM_DEBUG("IH: CP EOP\n");
2801 break; 2840 break;
2802 default: 2841 default:
2803 DRM_ERROR("Unhandled interrupt: %d %d\n", src_id, src_data); 2842 DRM_DEBUG("Unhandled interrupt: %d %d\n", src_id, src_data);
2804 break; 2843 break;
2805 } 2844 }
2806 2845
2807 /* wptr/rptr are in bytes! */ 2846 /* wptr/rptr are in bytes! */
2808 if (rptr == last_entry) 2847 rptr += 16;
2809 rptr = 0; 2848 rptr &= rdev->ih.ptr_mask;
2810 else
2811 rptr += 16;
2812 } 2849 }
2813 /* make sure wptr hasn't changed while processing */ 2850 /* make sure wptr hasn't changed while processing */
2814 wptr = r600_get_ih_wptr(rdev); 2851 wptr = r600_get_ih_wptr(rdev);
@@ -2876,3 +2913,18 @@ int r600_debugfs_mc_info_init(struct radeon_device *rdev)
2876 return 0; 2913 return 0;
2877#endif 2914#endif
2878} 2915}
2916
2917/**
2918 * r600_ioctl_wait_idle - flush host path cache on wait idle ioctl
2919 * rdev: radeon device structure
2920 * bo: buffer object struct which userspace is waiting for idle
2921 *
2922 * Some R6XX/R7XX doesn't seems to take into account HDP flush performed
2923 * through ring buffer, this leads to corruption in rendering, see
2924 * http://bugzilla.kernel.org/show_bug.cgi?id=15186 to avoid this we
2925 * directly perform HDP flush by writing register through MMIO.
2926 */
2927void r600_ioctl_wait_idle(struct radeon_device *rdev, struct radeon_bo *bo)
2928{
2929 WREG32(R_005480_HDP_MEM_COHERENCY_FLUSH_CNTL, 0x1);
2930}
diff --git a/drivers/gpu/drm/radeon/r600_audio.c b/drivers/gpu/drm/radeon/r600_audio.c
new file mode 100644
index 000000000000..0dcb6904c4ff
--- /dev/null
+++ b/drivers/gpu/drm/radeon/r600_audio.c
@@ -0,0 +1,266 @@
1/*
2 * Copyright 2008 Advanced Micro Devices, Inc.
3 * Copyright 2008 Red Hat Inc.
4 * Copyright 2009 Christian König.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22 * OTHER DEALINGS IN THE SOFTWARE.
23 *
24 * Authors: Christian König
25 */
26#include "drmP.h"
27#include "radeon.h"
28#include "radeon_reg.h"
29#include "atom.h"
30
31#define AUDIO_TIMER_INTERVALL 100 /* 1/10 sekund should be enough */
32
33/*
34 * check if the chipset is supported
35 */
36static int r600_audio_chipset_supported(struct radeon_device *rdev)
37{
38 return (rdev->family >= CHIP_R600 && rdev->family < CHIP_RV710)
39 || rdev->family == CHIP_RS600
40 || rdev->family == CHIP_RS690
41 || rdev->family == CHIP_RS740;
42}
43
44/*
45 * current number of channels
46 */
47static int r600_audio_channels(struct radeon_device *rdev)
48{
49 return (RREG32(R600_AUDIO_RATE_BPS_CHANNEL) & 0x7) + 1;
50}
51
52/*
53 * current bits per sample
54 */
55static int r600_audio_bits_per_sample(struct radeon_device *rdev)
56{
57 uint32_t value = (RREG32(R600_AUDIO_RATE_BPS_CHANNEL) & 0xF0) >> 4;
58 switch (value) {
59 case 0x0: return 8;
60 case 0x1: return 16;
61 case 0x2: return 20;
62 case 0x3: return 24;
63 case 0x4: return 32;
64 }
65
66 DRM_ERROR("Unknown bits per sample 0x%x using 16 instead.\n", (int)value);
67
68 return 16;
69}
70
71/*
72 * current sampling rate in HZ
73 */
74static int r600_audio_rate(struct radeon_device *rdev)
75{
76 uint32_t value = RREG32(R600_AUDIO_RATE_BPS_CHANNEL);
77 uint32_t result;
78
79 if (value & 0x4000)
80 result = 44100;
81 else
82 result = 48000;
83
84 result *= ((value >> 11) & 0x7) + 1;
85 result /= ((value >> 8) & 0x7) + 1;
86
87 return result;
88}
89
90/*
91 * iec 60958 status bits
92 */
93static uint8_t r600_audio_status_bits(struct radeon_device *rdev)
94{
95 return RREG32(R600_AUDIO_STATUS_BITS) & 0xff;
96}
97
98/*
99 * iec 60958 category code
100 */
101static uint8_t r600_audio_category_code(struct radeon_device *rdev)
102{
103 return (RREG32(R600_AUDIO_STATUS_BITS) >> 8) & 0xff;
104}
105
106/*
107 * update all hdmi interfaces with current audio parameters
108 */
109static void r600_audio_update_hdmi(unsigned long param)
110{
111 struct radeon_device *rdev = (struct radeon_device *)param;
112 struct drm_device *dev = rdev->ddev;
113
114 int channels = r600_audio_channels(rdev);
115 int rate = r600_audio_rate(rdev);
116 int bps = r600_audio_bits_per_sample(rdev);
117 uint8_t status_bits = r600_audio_status_bits(rdev);
118 uint8_t category_code = r600_audio_category_code(rdev);
119
120 struct drm_encoder *encoder;
121 int changes = 0;
122
123 changes |= channels != rdev->audio_channels;
124 changes |= rate != rdev->audio_rate;
125 changes |= bps != rdev->audio_bits_per_sample;
126 changes |= status_bits != rdev->audio_status_bits;
127 changes |= category_code != rdev->audio_category_code;
128
129 if (changes) {
130 rdev->audio_channels = channels;
131 rdev->audio_rate = rate;
132 rdev->audio_bits_per_sample = bps;
133 rdev->audio_status_bits = status_bits;
134 rdev->audio_category_code = category_code;
135 }
136
137 list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
138 if (changes || r600_hdmi_buffer_status_changed(encoder))
139 r600_hdmi_update_audio_settings(
140 encoder, channels,
141 rate, bps, status_bits,
142 category_code);
143 }
144
145 mod_timer(&rdev->audio_timer,
146 jiffies + msecs_to_jiffies(AUDIO_TIMER_INTERVALL));
147}
148
149/*
150 * initialize the audio vars and register the update timer
151 */
152int r600_audio_init(struct radeon_device *rdev)
153{
154 if (!r600_audio_chipset_supported(rdev))
155 return 0;
156
157 DRM_INFO("%s audio support", radeon_audio ? "Enabling" : "Disabling");
158 WREG32_P(R600_AUDIO_ENABLE, radeon_audio ? 0x81000000 : 0x0, ~0x81000000);
159
160 rdev->audio_channels = -1;
161 rdev->audio_rate = -1;
162 rdev->audio_bits_per_sample = -1;
163 rdev->audio_status_bits = 0;
164 rdev->audio_category_code = 0;
165
166 setup_timer(
167 &rdev->audio_timer,
168 r600_audio_update_hdmi,
169 (unsigned long)rdev);
170
171 mod_timer(&rdev->audio_timer, jiffies + 1);
172
173 return 0;
174}
175
176/*
177 * determin how the encoders and audio interface is wired together
178 */
179int r600_audio_tmds_index(struct drm_encoder *encoder)
180{
181 struct drm_device *dev = encoder->dev;
182 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
183 struct drm_encoder *other;
184
185 switch (radeon_encoder->encoder_id) {
186 case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_TMDS1:
187 case ENCODER_OBJECT_ID_INTERNAL_UNIPHY:
188 case ENCODER_OBJECT_ID_INTERNAL_UNIPHY1:
189 return 0;
190
191 case ENCODER_OBJECT_ID_INTERNAL_LVTM1:
192 /* special case check if an TMDS1 is present */
193 list_for_each_entry(other, &dev->mode_config.encoder_list, head) {
194 if (to_radeon_encoder(other)->encoder_id ==
195 ENCODER_OBJECT_ID_INTERNAL_TMDS1)
196 return 1;
197 }
198 return 0;
199
200 case ENCODER_OBJECT_ID_INTERNAL_UNIPHY2:
201 case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA:
202 return 1;
203
204 default:
205 DRM_ERROR("Unsupported encoder type 0x%02X\n",
206 radeon_encoder->encoder_id);
207 return -1;
208 }
209}
210
211/*
212 * atach the audio codec to the clock source of the encoder
213 */
214void r600_audio_set_clock(struct drm_encoder *encoder, int clock)
215{
216 struct drm_device *dev = encoder->dev;
217 struct radeon_device *rdev = dev->dev_private;
218 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
219 int base_rate = 48000;
220
221 switch (radeon_encoder->encoder_id) {
222 case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_TMDS1:
223 case ENCODER_OBJECT_ID_INTERNAL_LVTM1:
224 WREG32_P(R600_AUDIO_TIMING, 0, ~0x301);
225 break;
226
227 case ENCODER_OBJECT_ID_INTERNAL_UNIPHY:
228 case ENCODER_OBJECT_ID_INTERNAL_UNIPHY1:
229 case ENCODER_OBJECT_ID_INTERNAL_UNIPHY2:
230 case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA:
231 WREG32_P(R600_AUDIO_TIMING, 0x100, ~0x301);
232 break;
233
234 default:
235 DRM_ERROR("Unsupported encoder type 0x%02X\n",
236 radeon_encoder->encoder_id);
237 return;
238 }
239
240 switch (r600_audio_tmds_index(encoder)) {
241 case 0:
242 WREG32(R600_AUDIO_PLL1_MUL, base_rate*50);
243 WREG32(R600_AUDIO_PLL1_DIV, clock*100);
244 WREG32(R600_AUDIO_CLK_SRCSEL, 0);
245 break;
246
247 case 1:
248 WREG32(R600_AUDIO_PLL2_MUL, base_rate*50);
249 WREG32(R600_AUDIO_PLL2_DIV, clock*100);
250 WREG32(R600_AUDIO_CLK_SRCSEL, 1);
251 break;
252 }
253}
254
255/*
256 * release the audio timer
257 * TODO: How to do this correctly on SMP systems?
258 */
259void r600_audio_fini(struct radeon_device *rdev)
260{
261 if (!r600_audio_chipset_supported(rdev))
262 return;
263
264 del_timer(&rdev->audio_timer);
265 WREG32_P(R600_AUDIO_ENABLE, 0x0, ~0x81000000);
266}
diff --git a/drivers/gpu/drm/radeon/r600_blit_kms.c b/drivers/gpu/drm/radeon/r600_blit_kms.c
index 9aecafb51b66..446b765ac72a 100644
--- a/drivers/gpu/drm/radeon/r600_blit_kms.c
+++ b/drivers/gpu/drm/radeon/r600_blit_kms.c
@@ -449,6 +449,7 @@ int r600_blit_init(struct radeon_device *rdev)
449 u32 packet2s[16]; 449 u32 packet2s[16];
450 int num_packet2s = 0; 450 int num_packet2s = 0;
451 451
452 mutex_init(&rdev->r600_blit.mutex);
452 rdev->r600_blit.state_offset = 0; 453 rdev->r600_blit.state_offset = 0;
453 454
454 if (rdev->family >= CHIP_RV770) 455 if (rdev->family >= CHIP_RV770)
@@ -512,14 +513,16 @@ void r600_blit_fini(struct radeon_device *rdev)
512{ 513{
513 int r; 514 int r;
514 515
516 if (rdev->r600_blit.shader_obj == NULL)
517 return;
518 /* If we can't reserve the bo, unref should be enough to destroy
519 * it when it becomes idle.
520 */
515 r = radeon_bo_reserve(rdev->r600_blit.shader_obj, false); 521 r = radeon_bo_reserve(rdev->r600_blit.shader_obj, false);
516 if (unlikely(r != 0)) { 522 if (!r) {
517 dev_err(rdev->dev, "(%d) can't finish r600 blit\n", r); 523 radeon_bo_unpin(rdev->r600_blit.shader_obj);
518 goto out_unref; 524 radeon_bo_unreserve(rdev->r600_blit.shader_obj);
519 } 525 }
520 radeon_bo_unpin(rdev->r600_blit.shader_obj);
521 radeon_bo_unreserve(rdev->r600_blit.shader_obj);
522out_unref:
523 radeon_bo_unref(&rdev->r600_blit.shader_obj); 526 radeon_bo_unref(&rdev->r600_blit.shader_obj);
524} 527}
525 528
@@ -540,9 +543,6 @@ int r600_vb_ib_get(struct radeon_device *rdev)
540void r600_vb_ib_put(struct radeon_device *rdev) 543void r600_vb_ib_put(struct radeon_device *rdev)
541{ 544{
542 radeon_fence_emit(rdev, rdev->r600_blit.vb_ib->fence); 545 radeon_fence_emit(rdev, rdev->r600_blit.vb_ib->fence);
543 mutex_lock(&rdev->ib_pool.mutex);
544 list_add_tail(&rdev->r600_blit.vb_ib->list, &rdev->ib_pool.scheduled_ibs);
545 mutex_unlock(&rdev->ib_pool.mutex);
546 radeon_ib_free(rdev, &rdev->r600_blit.vb_ib); 546 radeon_ib_free(rdev, &rdev->r600_blit.vb_ib);
547} 547}
548 548
@@ -555,7 +555,8 @@ int r600_blit_prepare_copy(struct radeon_device *rdev, int size_bytes)
555 int dwords_per_loop = 76, num_loops; 555 int dwords_per_loop = 76, num_loops;
556 556
557 r = r600_vb_ib_get(rdev); 557 r = r600_vb_ib_get(rdev);
558 WARN_ON(r); 558 if (r)
559 return r;
559 560
560 /* set_render_target emits 2 extra dwords on rv6xx */ 561 /* set_render_target emits 2 extra dwords on rv6xx */
561 if (rdev->family > CHIP_R600 && rdev->family < CHIP_RV770) 562 if (rdev->family > CHIP_R600 && rdev->family < CHIP_RV770)
@@ -577,11 +578,12 @@ int r600_blit_prepare_copy(struct radeon_device *rdev, int size_bytes)
577 ring_size = num_loops * dwords_per_loop; 578 ring_size = num_loops * dwords_per_loop;
578 /* set default + shaders */ 579 /* set default + shaders */
579 ring_size += 40; /* shaders + def state */ 580 ring_size += 40; /* shaders + def state */
580 ring_size += 5; /* fence emit for VB IB */ 581 ring_size += 7; /* fence emit for VB IB */
581 ring_size += 5; /* done copy */ 582 ring_size += 5; /* done copy */
582 ring_size += 5; /* fence emit for done copy */ 583 ring_size += 7; /* fence emit for done copy */
583 r = radeon_ring_lock(rdev, ring_size); 584 r = radeon_ring_lock(rdev, ring_size);
584 WARN_ON(r); 585 if (r)
586 return r;
585 587
586 set_default_state(rdev); /* 14 */ 588 set_default_state(rdev); /* 14 */
587 set_shaders(rdev); /* 26 */ 589 set_shaders(rdev); /* 26 */
diff --git a/drivers/gpu/drm/radeon/r600_cp.c b/drivers/gpu/drm/radeon/r600_cp.c
index 6d5a711c2e91..75bcf35a0931 100644
--- a/drivers/gpu/drm/radeon/r600_cp.c
+++ b/drivers/gpu/drm/radeon/r600_cp.c
@@ -1428,9 +1428,12 @@ static void r700_gfx_init(struct drm_device *dev,
1428 1428
1429 gb_tiling_config |= R600_BANK_SWAPS(1); 1429 gb_tiling_config |= R600_BANK_SWAPS(1);
1430 1430
1431 backend_map = r700_get_tile_pipe_to_backend_map(dev_priv->r600_max_tile_pipes, 1431 if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV740)
1432 dev_priv->r600_max_backends, 1432 backend_map = 0x28;
1433 (0xff << dev_priv->r600_max_backends) & 0xff); 1433 else
1434 backend_map = r700_get_tile_pipe_to_backend_map(dev_priv->r600_max_tile_pipes,
1435 dev_priv->r600_max_backends,
1436 (0xff << dev_priv->r600_max_backends) & 0xff);
1434 gb_tiling_config |= R600_BACKEND_MAP(backend_map); 1437 gb_tiling_config |= R600_BACKEND_MAP(backend_map);
1435 1438
1436 cc_gc_shader_pipe_config = 1439 cc_gc_shader_pipe_config =
diff --git a/drivers/gpu/drm/radeon/r600_cs.c b/drivers/gpu/drm/radeon/r600_cs.c
index 0d820764f340..e4c45ec16507 100644
--- a/drivers/gpu/drm/radeon/r600_cs.c
+++ b/drivers/gpu/drm/radeon/r600_cs.c
@@ -36,6 +36,10 @@ static int r600_cs_packet_next_reloc_nomm(struct radeon_cs_parser *p,
36typedef int (*next_reloc_t)(struct radeon_cs_parser*, struct radeon_cs_reloc**); 36typedef int (*next_reloc_t)(struct radeon_cs_parser*, struct radeon_cs_reloc**);
37static next_reloc_t r600_cs_packet_next_reloc = &r600_cs_packet_next_reloc_mm; 37static next_reloc_t r600_cs_packet_next_reloc = &r600_cs_packet_next_reloc_mm;
38 38
39struct r600_cs_track {
40 u32 cb_color0_base_last;
41};
42
39/** 43/**
40 * r600_cs_packet_parse() - parse cp packet and point ib index to next packet 44 * r600_cs_packet_parse() - parse cp packet and point ib index to next packet
41 * @parser: parser structure holding parsing context. 45 * @parser: parser structure holding parsing context.
@@ -170,13 +174,35 @@ static int r600_cs_packet_next_reloc_nomm(struct radeon_cs_parser *p,
170 idx, relocs_chunk->length_dw); 174 idx, relocs_chunk->length_dw);
171 return -EINVAL; 175 return -EINVAL;
172 } 176 }
173 *cs_reloc = &p->relocs[0]; 177 *cs_reloc = p->relocs;
174 (*cs_reloc)->lobj.gpu_offset = (u64)relocs_chunk->kdata[idx + 3] << 32; 178 (*cs_reloc)->lobj.gpu_offset = (u64)relocs_chunk->kdata[idx + 3] << 32;
175 (*cs_reloc)->lobj.gpu_offset |= relocs_chunk->kdata[idx + 0]; 179 (*cs_reloc)->lobj.gpu_offset |= relocs_chunk->kdata[idx + 0];
176 return 0; 180 return 0;
177} 181}
178 182
179/** 183/**
184 * r600_cs_packet_next_is_pkt3_nop() - test if next packet is packet3 nop for reloc
185 * @parser: parser structure holding parsing context.
186 *
187 * Check next packet is relocation packet3, do bo validation and compute
188 * GPU offset using the provided start.
189 **/
190static inline int r600_cs_packet_next_is_pkt3_nop(struct radeon_cs_parser *p)
191{
192 struct radeon_cs_packet p3reloc;
193 int r;
194
195 r = r600_cs_packet_parse(p, &p3reloc, p->idx);
196 if (r) {
197 return 0;
198 }
199 if (p3reloc.type != PACKET_TYPE3 || p3reloc.opcode != PACKET3_NOP) {
200 return 0;
201 }
202 return 1;
203}
204
205/**
180 * r600_cs_packet_next_vline() - parse userspace VLINE packet 206 * r600_cs_packet_next_vline() - parse userspace VLINE packet
181 * @parser: parser structure holding parsing context. 207 * @parser: parser structure holding parsing context.
182 * 208 *
@@ -337,6 +363,7 @@ static int r600_packet3_check(struct radeon_cs_parser *p,
337 struct radeon_cs_packet *pkt) 363 struct radeon_cs_packet *pkt)
338{ 364{
339 struct radeon_cs_reloc *reloc; 365 struct radeon_cs_reloc *reloc;
366 struct r600_cs_track *track;
340 volatile u32 *ib; 367 volatile u32 *ib;
341 unsigned idx; 368 unsigned idx;
342 unsigned i; 369 unsigned i;
@@ -344,6 +371,7 @@ static int r600_packet3_check(struct radeon_cs_parser *p,
344 int r; 371 int r;
345 u32 idx_value; 372 u32 idx_value;
346 373
374 track = (struct r600_cs_track *)p->track;
347 ib = p->ib->ptr; 375 ib = p->ib->ptr;
348 idx = pkt->idx + 1; 376 idx = pkt->idx + 1;
349 idx_value = radeon_get_ib_value(p, idx); 377 idx_value = radeon_get_ib_value(p, idx);
@@ -503,9 +531,60 @@ static int r600_packet3_check(struct radeon_cs_parser *p,
503 for (i = 0; i < pkt->count; i++) { 531 for (i = 0; i < pkt->count; i++) {
504 reg = start_reg + (4 * i); 532 reg = start_reg + (4 * i);
505 switch (reg) { 533 switch (reg) {
534 /* This register were added late, there is userspace
535 * which does provide relocation for those but set
536 * 0 offset. In order to avoid breaking old userspace
537 * we detect this and set address to point to last
538 * CB_COLOR0_BASE, note that if userspace doesn't set
539 * CB_COLOR0_BASE before this register we will report
540 * error. Old userspace always set CB_COLOR0_BASE
541 * before any of this.
542 */
543 case R_0280E0_CB_COLOR0_FRAG:
544 case R_0280E4_CB_COLOR1_FRAG:
545 case R_0280E8_CB_COLOR2_FRAG:
546 case R_0280EC_CB_COLOR3_FRAG:
547 case R_0280F0_CB_COLOR4_FRAG:
548 case R_0280F4_CB_COLOR5_FRAG:
549 case R_0280F8_CB_COLOR6_FRAG:
550 case R_0280FC_CB_COLOR7_FRAG:
551 case R_0280C0_CB_COLOR0_TILE:
552 case R_0280C4_CB_COLOR1_TILE:
553 case R_0280C8_CB_COLOR2_TILE:
554 case R_0280CC_CB_COLOR3_TILE:
555 case R_0280D0_CB_COLOR4_TILE:
556 case R_0280D4_CB_COLOR5_TILE:
557 case R_0280D8_CB_COLOR6_TILE:
558 case R_0280DC_CB_COLOR7_TILE:
559 if (!r600_cs_packet_next_is_pkt3_nop(p)) {
560 if (!track->cb_color0_base_last) {
561 dev_err(p->dev, "Broken old userspace ? no cb_color0_base supplied before trying to write 0x%08X\n", reg);
562 return -EINVAL;
563 }
564 ib[idx+1+i] = track->cb_color0_base_last;
565 printk_once(KERN_WARNING "radeon: You have old & broken userspace "
566 "please consider updating mesa & xf86-video-ati\n");
567 } else {
568 r = r600_cs_packet_next_reloc(p, &reloc);
569 if (r) {
570 dev_err(p->dev, "bad SET_CONTEXT_REG 0x%04X\n", reg);
571 return -EINVAL;
572 }
573 ib[idx+1+i] += (u32)((reloc->lobj.gpu_offset >> 8) & 0xffffffff);
574 }
575 break;
506 case DB_DEPTH_BASE: 576 case DB_DEPTH_BASE:
507 case DB_HTILE_DATA_BASE: 577 case DB_HTILE_DATA_BASE:
508 case CB_COLOR0_BASE: 578 case CB_COLOR0_BASE:
579 r = r600_cs_packet_next_reloc(p, &reloc);
580 if (r) {
581 DRM_ERROR("bad SET_CONTEXT_REG "
582 "0x%04X\n", reg);
583 return -EINVAL;
584 }
585 ib[idx+1+i] += (u32)((reloc->lobj.gpu_offset >> 8) & 0xffffffff);
586 track->cb_color0_base_last = ib[idx+1+i];
587 break;
509 case CB_COLOR1_BASE: 588 case CB_COLOR1_BASE:
510 case CB_COLOR2_BASE: 589 case CB_COLOR2_BASE:
511 case CB_COLOR3_BASE: 590 case CB_COLOR3_BASE:
@@ -678,8 +757,11 @@ static int r600_packet3_check(struct radeon_cs_parser *p,
678int r600_cs_parse(struct radeon_cs_parser *p) 757int r600_cs_parse(struct radeon_cs_parser *p)
679{ 758{
680 struct radeon_cs_packet pkt; 759 struct radeon_cs_packet pkt;
760 struct r600_cs_track *track;
681 int r; 761 int r;
682 762
763 track = kzalloc(sizeof(*track), GFP_KERNEL);
764 p->track = track;
683 do { 765 do {
684 r = r600_cs_packet_parse(p, &pkt, p->idx); 766 r = r600_cs_packet_parse(p, &pkt, p->idx);
685 if (r) { 767 if (r) {
@@ -717,7 +799,7 @@ static int r600_cs_parser_relocs_legacy(struct radeon_cs_parser *p)
717 if (p->chunk_relocs_idx == -1) { 799 if (p->chunk_relocs_idx == -1) {
718 return 0; 800 return 0;
719 } 801 }
720 p->relocs = kcalloc(1, sizeof(struct radeon_cs_reloc), GFP_KERNEL); 802 p->relocs = kzalloc(sizeof(struct radeon_cs_reloc), GFP_KERNEL);
721 if (p->relocs == NULL) { 803 if (p->relocs == NULL) {
722 return -ENOMEM; 804 return -ENOMEM;
723 } 805 }
@@ -757,6 +839,7 @@ int r600_cs_legacy(struct drm_device *dev, void *data, struct drm_file *filp,
757 /* initialize parser */ 839 /* initialize parser */
758 memset(&parser, 0, sizeof(struct radeon_cs_parser)); 840 memset(&parser, 0, sizeof(struct radeon_cs_parser));
759 parser.filp = filp; 841 parser.filp = filp;
842 parser.dev = &dev->pdev->dev;
760 parser.rdev = NULL; 843 parser.rdev = NULL;
761 parser.family = family; 844 parser.family = family;
762 parser.ib = &fake_ib; 845 parser.ib = &fake_ib;
diff --git a/drivers/gpu/drm/radeon/r600_hdmi.c b/drivers/gpu/drm/radeon/r600_hdmi.c
new file mode 100644
index 000000000000..fcc949df0e5d
--- /dev/null
+++ b/drivers/gpu/drm/radeon/r600_hdmi.c
@@ -0,0 +1,506 @@
1/*
2 * Copyright 2008 Advanced Micro Devices, Inc.
3 * Copyright 2008 Red Hat Inc.
4 * Copyright 2009 Christian König.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22 * OTHER DEALINGS IN THE SOFTWARE.
23 *
24 * Authors: Christian König
25 */
26#include "drmP.h"
27#include "radeon_drm.h"
28#include "radeon.h"
29#include "atom.h"
30
31/*
32 * HDMI color format
33 */
34enum r600_hdmi_color_format {
35 RGB = 0,
36 YCC_422 = 1,
37 YCC_444 = 2
38};
39
40/*
41 * IEC60958 status bits
42 */
43enum r600_hdmi_iec_status_bits {
44 AUDIO_STATUS_DIG_ENABLE = 0x01,
45 AUDIO_STATUS_V = 0x02,
46 AUDIO_STATUS_VCFG = 0x04,
47 AUDIO_STATUS_EMPHASIS = 0x08,
48 AUDIO_STATUS_COPYRIGHT = 0x10,
49 AUDIO_STATUS_NONAUDIO = 0x20,
50 AUDIO_STATUS_PROFESSIONAL = 0x40,
51 AUDIO_STATUS_LEVEL = 0x80
52};
53
54struct {
55 uint32_t Clock;
56
57 int N_32kHz;
58 int CTS_32kHz;
59
60 int N_44_1kHz;
61 int CTS_44_1kHz;
62
63 int N_48kHz;
64 int CTS_48kHz;
65
66} r600_hdmi_ACR[] = {
67 /* 32kHz 44.1kHz 48kHz */
68 /* Clock N CTS N CTS N CTS */
69 { 25174, 4576, 28125, 7007, 31250, 6864, 28125 }, /* 25,20/1.001 MHz */
70 { 25200, 4096, 25200, 6272, 28000, 6144, 25200 }, /* 25.20 MHz */
71 { 27000, 4096, 27000, 6272, 30000, 6144, 27000 }, /* 27.00 MHz */
72 { 27027, 4096, 27027, 6272, 30030, 6144, 27027 }, /* 27.00*1.001 MHz */
73 { 54000, 4096, 54000, 6272, 60000, 6144, 54000 }, /* 54.00 MHz */
74 { 54054, 4096, 54054, 6272, 60060, 6144, 54054 }, /* 54.00*1.001 MHz */
75 { 74175, 11648, 210937, 17836, 234375, 11648, 140625 }, /* 74.25/1.001 MHz */
76 { 74250, 4096, 74250, 6272, 82500, 6144, 74250 }, /* 74.25 MHz */
77 { 148351, 11648, 421875, 8918, 234375, 5824, 140625 }, /* 148.50/1.001 MHz */
78 { 148500, 4096, 148500, 6272, 165000, 6144, 148500 }, /* 148.50 MHz */
79 { 0, 4096, 0, 6272, 0, 6144, 0 } /* Other */
80};
81
82/*
83 * calculate CTS value if it's not found in the table
84 */
85static void r600_hdmi_calc_CTS(uint32_t clock, int *CTS, int N, int freq)
86{
87 if (*CTS == 0)
88 *CTS = clock*N/(128*freq)*1000;
89 DRM_DEBUG("Using ACR timing N=%d CTS=%d for frequency %d\n",
90 N, *CTS, freq);
91}
92
93/*
94 * update the N and CTS parameters for a given pixel clock rate
95 */
96static void r600_hdmi_update_ACR(struct drm_encoder *encoder, uint32_t clock)
97{
98 struct drm_device *dev = encoder->dev;
99 struct radeon_device *rdev = dev->dev_private;
100 uint32_t offset = to_radeon_encoder(encoder)->hdmi_offset;
101 int CTS;
102 int N;
103 int i;
104
105 for (i = 0; r600_hdmi_ACR[i].Clock != clock && r600_hdmi_ACR[i].Clock != 0; i++);
106
107 CTS = r600_hdmi_ACR[i].CTS_32kHz;
108 N = r600_hdmi_ACR[i].N_32kHz;
109 r600_hdmi_calc_CTS(clock, &CTS, N, 32000);
110 WREG32(offset+R600_HDMI_32kHz_CTS, CTS << 12);
111 WREG32(offset+R600_HDMI_32kHz_N, N);
112
113 CTS = r600_hdmi_ACR[i].CTS_44_1kHz;
114 N = r600_hdmi_ACR[i].N_44_1kHz;
115 r600_hdmi_calc_CTS(clock, &CTS, N, 44100);
116 WREG32(offset+R600_HDMI_44_1kHz_CTS, CTS << 12);
117 WREG32(offset+R600_HDMI_44_1kHz_N, N);
118
119 CTS = r600_hdmi_ACR[i].CTS_48kHz;
120 N = r600_hdmi_ACR[i].N_48kHz;
121 r600_hdmi_calc_CTS(clock, &CTS, N, 48000);
122 WREG32(offset+R600_HDMI_48kHz_CTS, CTS << 12);
123 WREG32(offset+R600_HDMI_48kHz_N, N);
124}
125
126/*
127 * calculate the crc for a given info frame
128 */
129static void r600_hdmi_infoframe_checksum(uint8_t packetType,
130 uint8_t versionNumber,
131 uint8_t length,
132 uint8_t *frame)
133{
134 int i;
135 frame[0] = packetType + versionNumber + length;
136 for (i = 1; i <= length; i++)
137 frame[0] += frame[i];
138 frame[0] = 0x100 - frame[0];
139}
140
141/*
142 * build a HDMI Video Info Frame
143 */
144static void r600_hdmi_videoinfoframe(
145 struct drm_encoder *encoder,
146 enum r600_hdmi_color_format color_format,
147 int active_information_present,
148 uint8_t active_format_aspect_ratio,
149 uint8_t scan_information,
150 uint8_t colorimetry,
151 uint8_t ex_colorimetry,
152 uint8_t quantization,
153 int ITC,
154 uint8_t picture_aspect_ratio,
155 uint8_t video_format_identification,
156 uint8_t pixel_repetition,
157 uint8_t non_uniform_picture_scaling,
158 uint8_t bar_info_data_valid,
159 uint16_t top_bar,
160 uint16_t bottom_bar,
161 uint16_t left_bar,
162 uint16_t right_bar
163)
164{
165 struct drm_device *dev = encoder->dev;
166 struct radeon_device *rdev = dev->dev_private;
167 uint32_t offset = to_radeon_encoder(encoder)->hdmi_offset;
168
169 uint8_t frame[14];
170
171 frame[0x0] = 0;
172 frame[0x1] =
173 (scan_information & 0x3) |
174 ((bar_info_data_valid & 0x3) << 2) |
175 ((active_information_present & 0x1) << 4) |
176 ((color_format & 0x3) << 5);
177 frame[0x2] =
178 (active_format_aspect_ratio & 0xF) |
179 ((picture_aspect_ratio & 0x3) << 4) |
180 ((colorimetry & 0x3) << 6);
181 frame[0x3] =
182 (non_uniform_picture_scaling & 0x3) |
183 ((quantization & 0x3) << 2) |
184 ((ex_colorimetry & 0x7) << 4) |
185 ((ITC & 0x1) << 7);
186 frame[0x4] = (video_format_identification & 0x7F);
187 frame[0x5] = (pixel_repetition & 0xF);
188 frame[0x6] = (top_bar & 0xFF);
189 frame[0x7] = (top_bar >> 8);
190 frame[0x8] = (bottom_bar & 0xFF);
191 frame[0x9] = (bottom_bar >> 8);
192 frame[0xA] = (left_bar & 0xFF);
193 frame[0xB] = (left_bar >> 8);
194 frame[0xC] = (right_bar & 0xFF);
195 frame[0xD] = (right_bar >> 8);
196
197 r600_hdmi_infoframe_checksum(0x82, 0x02, 0x0D, frame);
198
199 WREG32(offset+R600_HDMI_VIDEOINFOFRAME_0,
200 frame[0x0] | (frame[0x1] << 8) | (frame[0x2] << 16) | (frame[0x3] << 24));
201 WREG32(offset+R600_HDMI_VIDEOINFOFRAME_1,
202 frame[0x4] | (frame[0x5] << 8) | (frame[0x6] << 16) | (frame[0x7] << 24));
203 WREG32(offset+R600_HDMI_VIDEOINFOFRAME_2,
204 frame[0x8] | (frame[0x9] << 8) | (frame[0xA] << 16) | (frame[0xB] << 24));
205 WREG32(offset+R600_HDMI_VIDEOINFOFRAME_3,
206 frame[0xC] | (frame[0xD] << 8));
207}
208
209/*
210 * build a Audio Info Frame
211 */
212static void r600_hdmi_audioinfoframe(
213 struct drm_encoder *encoder,
214 uint8_t channel_count,
215 uint8_t coding_type,
216 uint8_t sample_size,
217 uint8_t sample_frequency,
218 uint8_t format,
219 uint8_t channel_allocation,
220 uint8_t level_shift,
221 int downmix_inhibit
222)
223{
224 struct drm_device *dev = encoder->dev;
225 struct radeon_device *rdev = dev->dev_private;
226 uint32_t offset = to_radeon_encoder(encoder)->hdmi_offset;
227
228 uint8_t frame[11];
229
230 frame[0x0] = 0;
231 frame[0x1] = (channel_count & 0x7) | ((coding_type & 0xF) << 4);
232 frame[0x2] = (sample_size & 0x3) | ((sample_frequency & 0x7) << 2);
233 frame[0x3] = format;
234 frame[0x4] = channel_allocation;
235 frame[0x5] = ((level_shift & 0xF) << 3) | ((downmix_inhibit & 0x1) << 7);
236 frame[0x6] = 0;
237 frame[0x7] = 0;
238 frame[0x8] = 0;
239 frame[0x9] = 0;
240 frame[0xA] = 0;
241
242 r600_hdmi_infoframe_checksum(0x84, 0x01, 0x0A, frame);
243
244 WREG32(offset+R600_HDMI_AUDIOINFOFRAME_0,
245 frame[0x0] | (frame[0x1] << 8) | (frame[0x2] << 16) | (frame[0x3] << 24));
246 WREG32(offset+R600_HDMI_AUDIOINFOFRAME_1,
247 frame[0x4] | (frame[0x5] << 8) | (frame[0x6] << 16) | (frame[0x8] << 24));
248}
249
250/*
251 * test if audio buffer is filled enough to start playing
252 */
253static int r600_hdmi_is_audio_buffer_filled(struct drm_encoder *encoder)
254{
255 struct drm_device *dev = encoder->dev;
256 struct radeon_device *rdev = dev->dev_private;
257 uint32_t offset = to_radeon_encoder(encoder)->hdmi_offset;
258
259 return (RREG32(offset+R600_HDMI_STATUS) & 0x10) != 0;
260}
261
262/*
263 * have buffer status changed since last call?
264 */
265int r600_hdmi_buffer_status_changed(struct drm_encoder *encoder)
266{
267 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
268 int status, result;
269
270 if (!radeon_encoder->hdmi_offset)
271 return 0;
272
273 status = r600_hdmi_is_audio_buffer_filled(encoder);
274 result = radeon_encoder->hdmi_buffer_status != status;
275 radeon_encoder->hdmi_buffer_status = status;
276
277 return result;
278}
279
280/*
281 * write the audio workaround status to the hardware
282 */
283void r600_hdmi_audio_workaround(struct drm_encoder *encoder)
284{
285 struct drm_device *dev = encoder->dev;
286 struct radeon_device *rdev = dev->dev_private;
287 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
288 uint32_t offset = radeon_encoder->hdmi_offset;
289
290 if (!offset)
291 return;
292
293 if (r600_hdmi_is_audio_buffer_filled(encoder)) {
294 /* disable audio workaround and start delivering of audio frames */
295 WREG32_P(offset+R600_HDMI_CNTL, 0x00000001, ~0x00001001);
296
297 } else if (radeon_encoder->hdmi_audio_workaround) {
298 /* enable audio workaround and start delivering of audio frames */
299 WREG32_P(offset+R600_HDMI_CNTL, 0x00001001, ~0x00001001);
300
301 } else {
302 /* disable audio workaround and stop delivering of audio frames */
303 WREG32_P(offset+R600_HDMI_CNTL, 0x00000000, ~0x00001001);
304 }
305}
306
307
308/*
309 * update the info frames with the data from the current display mode
310 */
311void r600_hdmi_setmode(struct drm_encoder *encoder, struct drm_display_mode *mode)
312{
313 struct drm_device *dev = encoder->dev;
314 struct radeon_device *rdev = dev->dev_private;
315 uint32_t offset = to_radeon_encoder(encoder)->hdmi_offset;
316
317 if (!offset)
318 return;
319
320 r600_audio_set_clock(encoder, mode->clock);
321
322 WREG32(offset+R600_HDMI_UNKNOWN_0, 0x1000);
323 WREG32(offset+R600_HDMI_UNKNOWN_1, 0x0);
324 WREG32(offset+R600_HDMI_UNKNOWN_2, 0x1000);
325
326 r600_hdmi_update_ACR(encoder, mode->clock);
327
328 WREG32(offset+R600_HDMI_VIDEOCNTL, 0x13);
329
330 WREG32(offset+R600_HDMI_VERSION, 0x202);
331
332 r600_hdmi_videoinfoframe(encoder, RGB, 0, 0, 0, 0,
333 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0);
334
335 /* it's unknown what these bits do excatly, but it's indeed quite usefull for debugging */
336 WREG32(offset+R600_HDMI_AUDIO_DEBUG_0, 0x00FFFFFF);
337 WREG32(offset+R600_HDMI_AUDIO_DEBUG_1, 0x007FFFFF);
338 WREG32(offset+R600_HDMI_AUDIO_DEBUG_2, 0x00000001);
339 WREG32(offset+R600_HDMI_AUDIO_DEBUG_3, 0x00000001);
340
341 r600_hdmi_audio_workaround(encoder);
342
343 /* audio packets per line, does anyone know how to calc this ? */
344 WREG32_P(offset+R600_HDMI_CNTL, 0x00040000, ~0x001F0000);
345
346 /* update? reset? don't realy know */
347 WREG32_P(offset+R600_HDMI_CNTL, 0x14000000, ~0x14000000);
348}
349
350/*
351 * update settings with current parameters from audio engine
352 */
353void r600_hdmi_update_audio_settings(struct drm_encoder *encoder,
354 int channels,
355 int rate,
356 int bps,
357 uint8_t status_bits,
358 uint8_t category_code)
359{
360 struct drm_device *dev = encoder->dev;
361 struct radeon_device *rdev = dev->dev_private;
362 uint32_t offset = to_radeon_encoder(encoder)->hdmi_offset;
363
364 uint32_t iec;
365
366 if (!offset)
367 return;
368
369 DRM_DEBUG("%s with %d channels, %d Hz sampling rate, %d bits per sample,\n",
370 r600_hdmi_is_audio_buffer_filled(encoder) ? "playing" : "stopped",
371 channels, rate, bps);
372 DRM_DEBUG("0x%02X IEC60958 status bits and 0x%02X category code\n",
373 (int)status_bits, (int)category_code);
374
375 iec = 0;
376 if (status_bits & AUDIO_STATUS_PROFESSIONAL)
377 iec |= 1 << 0;
378 if (status_bits & AUDIO_STATUS_NONAUDIO)
379 iec |= 1 << 1;
380 if (status_bits & AUDIO_STATUS_COPYRIGHT)
381 iec |= 1 << 2;
382 if (status_bits & AUDIO_STATUS_EMPHASIS)
383 iec |= 1 << 3;
384
385 iec |= category_code << 8;
386
387 switch (rate) {
388 case 32000: iec |= 0x3 << 24; break;
389 case 44100: iec |= 0x0 << 24; break;
390 case 88200: iec |= 0x8 << 24; break;
391 case 176400: iec |= 0xc << 24; break;
392 case 48000: iec |= 0x2 << 24; break;
393 case 96000: iec |= 0xa << 24; break;
394 case 192000: iec |= 0xe << 24; break;
395 }
396
397 WREG32(offset+R600_HDMI_IEC60958_1, iec);
398
399 iec = 0;
400 switch (bps) {
401 case 16: iec |= 0x2; break;
402 case 20: iec |= 0x3; break;
403 case 24: iec |= 0xb; break;
404 }
405 if (status_bits & AUDIO_STATUS_V)
406 iec |= 0x5 << 16;
407
408 WREG32_P(offset+R600_HDMI_IEC60958_2, iec, ~0x5000f);
409
410 /* 0x021 or 0x031 sets the audio frame length */
411 WREG32(offset+R600_HDMI_AUDIOCNTL, 0x31);
412 r600_hdmi_audioinfoframe(encoder, channels-1, 0, 0, 0, 0, 0, 0, 0);
413
414 r600_hdmi_audio_workaround(encoder);
415
416 /* update? reset? don't realy know */
417 WREG32_P(offset+R600_HDMI_CNTL, 0x04000000, ~0x04000000);
418}
419
420/*
421 * enable/disable the HDMI engine
422 */
423void r600_hdmi_enable(struct drm_encoder *encoder, int enable)
424{
425 struct drm_device *dev = encoder->dev;
426 struct radeon_device *rdev = dev->dev_private;
427 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
428 uint32_t offset = to_radeon_encoder(encoder)->hdmi_offset;
429
430 if (!offset)
431 return;
432
433 DRM_DEBUG("%s HDMI interface @ 0x%04X\n", enable ? "Enabling" : "Disabling", offset);
434
435 /* some version of atombios ignore the enable HDMI flag
436 * so enabling/disabling HDMI was moved here for TMDS1+2 */
437 switch (radeon_encoder->encoder_id) {
438 case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_TMDS1:
439 WREG32_P(AVIVO_TMDSA_CNTL, enable ? 0x4 : 0x0, ~0x4);
440 WREG32(offset+R600_HDMI_ENABLE, enable ? 0x101 : 0x0);
441 break;
442
443 case ENCODER_OBJECT_ID_INTERNAL_LVTM1:
444 WREG32_P(AVIVO_LVTMA_CNTL, enable ? 0x4 : 0x0, ~0x4);
445 WREG32(offset+R600_HDMI_ENABLE, enable ? 0x105 : 0x0);
446 break;
447
448 case ENCODER_OBJECT_ID_INTERNAL_UNIPHY:
449 case ENCODER_OBJECT_ID_INTERNAL_UNIPHY1:
450 case ENCODER_OBJECT_ID_INTERNAL_UNIPHY2:
451 case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA:
452 /* This part is doubtfull in my opinion */
453 WREG32(offset+R600_HDMI_ENABLE, enable ? 0x110 : 0x0);
454 break;
455
456 default:
457 DRM_ERROR("unknown HDMI output type\n");
458 break;
459 }
460}
461
462/*
463 * determin at which register offset the HDMI encoder is
464 */
465void r600_hdmi_init(struct drm_encoder *encoder)
466{
467 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
468
469 switch (radeon_encoder->encoder_id) {
470 case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_TMDS1:
471 case ENCODER_OBJECT_ID_INTERNAL_UNIPHY:
472 case ENCODER_OBJECT_ID_INTERNAL_UNIPHY1:
473 radeon_encoder->hdmi_offset = R600_HDMI_TMDS1;
474 break;
475
476 case ENCODER_OBJECT_ID_INTERNAL_LVTM1:
477 switch (r600_audio_tmds_index(encoder)) {
478 case 0:
479 radeon_encoder->hdmi_offset = R600_HDMI_TMDS1;
480 break;
481 case 1:
482 radeon_encoder->hdmi_offset = R600_HDMI_TMDS2;
483 break;
484 default:
485 radeon_encoder->hdmi_offset = 0;
486 break;
487 }
488 case ENCODER_OBJECT_ID_INTERNAL_UNIPHY2:
489 radeon_encoder->hdmi_offset = R600_HDMI_TMDS2;
490 break;
491
492 case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA:
493 radeon_encoder->hdmi_offset = R600_HDMI_DIG;
494 break;
495
496 default:
497 radeon_encoder->hdmi_offset = 0;
498 break;
499 }
500
501 DRM_DEBUG("using HDMI engine at offset 0x%04X for encoder 0x%x\n",
502 radeon_encoder->hdmi_offset, radeon_encoder->encoder_id);
503
504 /* TODO: make this configureable */
505 radeon_encoder->hdmi_audio_workaround = 0;
506}
diff --git a/drivers/gpu/drm/radeon/r600_reg.h b/drivers/gpu/drm/radeon/r600_reg.h
index e2d1f5f33f7e..d0e28ffdeda9 100644
--- a/drivers/gpu/drm/radeon/r600_reg.h
+++ b/drivers/gpu/drm/radeon/r600_reg.h
@@ -110,5 +110,79 @@
110#define R600_BIOS_6_SCRATCH 0x173c 110#define R600_BIOS_6_SCRATCH 0x173c
111#define R600_BIOS_7_SCRATCH 0x1740 111#define R600_BIOS_7_SCRATCH 0x1740
112 112
113/* Audio, these regs were reverse enginered,
114 * so the chance is high that the naming is wrong
115 * R6xx+ ??? */
116
117/* Audio clocks */
118#define R600_AUDIO_PLL1_MUL 0x0514
119#define R600_AUDIO_PLL1_DIV 0x0518
120#define R600_AUDIO_PLL2_MUL 0x0524
121#define R600_AUDIO_PLL2_DIV 0x0528
122#define R600_AUDIO_CLK_SRCSEL 0x0534
123
124/* Audio general */
125#define R600_AUDIO_ENABLE 0x7300
126#define R600_AUDIO_TIMING 0x7344
127
128/* Audio params */
129#define R600_AUDIO_VENDOR_ID 0x7380
130#define R600_AUDIO_REVISION_ID 0x7384
131#define R600_AUDIO_ROOT_NODE_COUNT 0x7388
132#define R600_AUDIO_NID1_NODE_COUNT 0x738c
133#define R600_AUDIO_NID1_TYPE 0x7390
134#define R600_AUDIO_SUPPORTED_SIZE_RATE 0x7394
135#define R600_AUDIO_SUPPORTED_CODEC 0x7398
136#define R600_AUDIO_SUPPORTED_POWER_STATES 0x739c
137#define R600_AUDIO_NID2_CAPS 0x73a0
138#define R600_AUDIO_NID3_CAPS 0x73a4
139#define R600_AUDIO_NID3_PIN_CAPS 0x73a8
140
141/* Audio conn list */
142#define R600_AUDIO_CONN_LIST_LEN 0x73ac
143#define R600_AUDIO_CONN_LIST 0x73b0
144
145/* Audio verbs */
146#define R600_AUDIO_RATE_BPS_CHANNEL 0x73c0
147#define R600_AUDIO_PLAYING 0x73c4
148#define R600_AUDIO_IMPLEMENTATION_ID 0x73c8
149#define R600_AUDIO_CONFIG_DEFAULT 0x73cc
150#define R600_AUDIO_PIN_SENSE 0x73d0
151#define R600_AUDIO_PIN_WIDGET_CNTL 0x73d4
152#define R600_AUDIO_STATUS_BITS 0x73d8
153
154/* HDMI base register addresses */
155#define R600_HDMI_TMDS1 0x7400
156#define R600_HDMI_TMDS2 0x7700
157#define R600_HDMI_DIG 0x7800
158
159/* HDMI registers */
160#define R600_HDMI_ENABLE 0x00
161#define R600_HDMI_STATUS 0x04
162#define R600_HDMI_CNTL 0x08
163#define R600_HDMI_UNKNOWN_0 0x0C
164#define R600_HDMI_AUDIOCNTL 0x10
165#define R600_HDMI_VIDEOCNTL 0x14
166#define R600_HDMI_VERSION 0x18
167#define R600_HDMI_UNKNOWN_1 0x28
168#define R600_HDMI_VIDEOINFOFRAME_0 0x54
169#define R600_HDMI_VIDEOINFOFRAME_1 0x58
170#define R600_HDMI_VIDEOINFOFRAME_2 0x5c
171#define R600_HDMI_VIDEOINFOFRAME_3 0x60
172#define R600_HDMI_32kHz_CTS 0xac
173#define R600_HDMI_32kHz_N 0xb0
174#define R600_HDMI_44_1kHz_CTS 0xb4
175#define R600_HDMI_44_1kHz_N 0xb8
176#define R600_HDMI_48kHz_CTS 0xbc
177#define R600_HDMI_48kHz_N 0xc0
178#define R600_HDMI_AUDIOINFOFRAME_0 0xcc
179#define R600_HDMI_AUDIOINFOFRAME_1 0xd0
180#define R600_HDMI_IEC60958_1 0xd4
181#define R600_HDMI_IEC60958_2 0xd8
182#define R600_HDMI_UNKNOWN_2 0xdc
183#define R600_HDMI_AUDIO_DEBUG_0 0xe0
184#define R600_HDMI_AUDIO_DEBUG_1 0xe4
185#define R600_HDMI_AUDIO_DEBUG_2 0xe8
186#define R600_HDMI_AUDIO_DEBUG_3 0xec
113 187
114#endif 188#endif
diff --git a/drivers/gpu/drm/radeon/r600d.h b/drivers/gpu/drm/radeon/r600d.h
index 05894edadab4..30480881aed1 100644
--- a/drivers/gpu/drm/radeon/r600d.h
+++ b/drivers/gpu/drm/radeon/r600d.h
@@ -882,4 +882,29 @@
882#define S_000E60_SOFT_RESET_VMC(x) (((x) & 1) << 17) 882#define S_000E60_SOFT_RESET_VMC(x) (((x) & 1) << 17)
883 883
884#define R_005480_HDP_MEM_COHERENCY_FLUSH_CNTL 0x5480 884#define R_005480_HDP_MEM_COHERENCY_FLUSH_CNTL 0x5480
885
886#define R_0280E0_CB_COLOR0_FRAG 0x0280E0
887#define S_0280E0_BASE_256B(x) (((x) & 0xFFFFFFFF) << 0)
888#define G_0280E0_BASE_256B(x) (((x) >> 0) & 0xFFFFFFFF)
889#define C_0280E0_BASE_256B 0x00000000
890#define R_0280E4_CB_COLOR1_FRAG 0x0280E4
891#define R_0280E8_CB_COLOR2_FRAG 0x0280E8
892#define R_0280EC_CB_COLOR3_FRAG 0x0280EC
893#define R_0280F0_CB_COLOR4_FRAG 0x0280F0
894#define R_0280F4_CB_COLOR5_FRAG 0x0280F4
895#define R_0280F8_CB_COLOR6_FRAG 0x0280F8
896#define R_0280FC_CB_COLOR7_FRAG 0x0280FC
897#define R_0280C0_CB_COLOR0_TILE 0x0280C0
898#define S_0280C0_BASE_256B(x) (((x) & 0xFFFFFFFF) << 0)
899#define G_0280C0_BASE_256B(x) (((x) >> 0) & 0xFFFFFFFF)
900#define C_0280C0_BASE_256B 0x00000000
901#define R_0280C4_CB_COLOR1_TILE 0x0280C4
902#define R_0280C8_CB_COLOR2_TILE 0x0280C8
903#define R_0280CC_CB_COLOR3_TILE 0x0280CC
904#define R_0280D0_CB_COLOR4_TILE 0x0280D0
905#define R_0280D4_CB_COLOR5_TILE 0x0280D4
906#define R_0280D8_CB_COLOR6_TILE 0x0280D8
907#define R_0280DC_CB_COLOR7_TILE 0x0280DC
908
909
885#endif 910#endif
diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h
index c938bb54123c..c0356bb193e5 100644
--- a/drivers/gpu/drm/radeon/radeon.h
+++ b/drivers/gpu/drm/radeon/radeon.h
@@ -89,12 +89,14 @@ extern int radeon_testing;
89extern int radeon_connector_table; 89extern int radeon_connector_table;
90extern int radeon_tv; 90extern int radeon_tv;
91extern int radeon_new_pll; 91extern int radeon_new_pll;
92extern int radeon_audio;
92 93
93/* 94/*
94 * Copy from radeon_drv.h so we don't have to include both and have conflicting 95 * Copy from radeon_drv.h so we don't have to include both and have conflicting
95 * symbol; 96 * symbol;
96 */ 97 */
97#define RADEON_MAX_USEC_TIMEOUT 100000 /* 100 ms */ 98#define RADEON_MAX_USEC_TIMEOUT 100000 /* 100 ms */
99/* RADEON_IB_POOL_SIZE must be a power of 2 */
98#define RADEON_IB_POOL_SIZE 16 100#define RADEON_IB_POOL_SIZE 16
99#define RADEON_DEBUGFS_MAX_NUM_FILES 32 101#define RADEON_DEBUGFS_MAX_NUM_FILES 32
100#define RADEONFB_CONN_LIMIT 4 102#define RADEONFB_CONN_LIMIT 4
@@ -161,6 +163,7 @@ struct radeon_fence_driver {
161 struct list_head created; 163 struct list_head created;
162 struct list_head emited; 164 struct list_head emited;
163 struct list_head signaled; 165 struct list_head signaled;
166 bool initialized;
164}; 167};
165 168
166struct radeon_fence { 169struct radeon_fence {
@@ -201,8 +204,9 @@ struct radeon_surface_reg {
201struct radeon_mman { 204struct radeon_mman {
202 struct ttm_bo_global_ref bo_global_ref; 205 struct ttm_bo_global_ref bo_global_ref;
203 struct ttm_global_reference mem_global_ref; 206 struct ttm_global_reference mem_global_ref;
204 bool mem_global_referenced;
205 struct ttm_bo_device bdev; 207 struct ttm_bo_device bdev;
208 bool mem_global_referenced;
209 bool initialized;
206}; 210};
207 211
208struct radeon_bo { 212struct radeon_bo {
@@ -316,10 +320,12 @@ struct radeon_mc {
316 u64 real_vram_size; 320 u64 real_vram_size;
317 int vram_mtrr; 321 int vram_mtrr;
318 bool vram_is_ddr; 322 bool vram_is_ddr;
323 bool igp_sideport_enabled;
319}; 324};
320 325
321int radeon_mc_setup(struct radeon_device *rdev); 326int radeon_mc_setup(struct radeon_device *rdev);
322 327bool radeon_combios_sideport_present(struct radeon_device *rdev);
328bool radeon_atombios_sideport_present(struct radeon_device *rdev);
323 329
324/* 330/*
325 * GPU scratch registers structures, functions & helpers 331 * GPU scratch registers structures, functions & helpers
@@ -358,11 +364,12 @@ void radeon_irq_kms_sw_irq_put(struct radeon_device *rdev);
358 */ 364 */
359struct radeon_ib { 365struct radeon_ib {
360 struct list_head list; 366 struct list_head list;
361 unsigned long idx; 367 unsigned idx;
362 uint64_t gpu_addr; 368 uint64_t gpu_addr;
363 struct radeon_fence *fence; 369 struct radeon_fence *fence;
364 uint32_t *ptr; 370 uint32_t *ptr;
365 uint32_t length_dw; 371 uint32_t length_dw;
372 bool free;
366}; 373};
367 374
368/* 375/*
@@ -372,10 +379,9 @@ struct radeon_ib {
372struct radeon_ib_pool { 379struct radeon_ib_pool {
373 struct mutex mutex; 380 struct mutex mutex;
374 struct radeon_bo *robj; 381 struct radeon_bo *robj;
375 struct list_head scheduled_ibs;
376 struct radeon_ib ibs[RADEON_IB_POOL_SIZE]; 382 struct radeon_ib ibs[RADEON_IB_POOL_SIZE];
377 bool ready; 383 bool ready;
378 DECLARE_BITMAP(alloc_bm, RADEON_IB_POOL_SIZE); 384 unsigned head_id;
379}; 385};
380 386
381struct radeon_cp { 387struct radeon_cp {
@@ -405,13 +411,13 @@ struct r600_ih {
405 unsigned wptr_old; 411 unsigned wptr_old;
406 unsigned ring_size; 412 unsigned ring_size;
407 uint64_t gpu_addr; 413 uint64_t gpu_addr;
408 uint32_t align_mask;
409 uint32_t ptr_mask; 414 uint32_t ptr_mask;
410 spinlock_t lock; 415 spinlock_t lock;
411 bool enabled; 416 bool enabled;
412}; 417};
413 418
414struct r600_blit { 419struct r600_blit {
420 struct mutex mutex;
415 struct radeon_bo *shader_obj; 421 struct radeon_bo *shader_obj;
416 u64 shader_gpu_addr; 422 u64 shader_gpu_addr;
417 u32 vs_offset, ps_offset; 423 u32 vs_offset, ps_offset;
@@ -460,6 +466,7 @@ struct radeon_cs_chunk {
460}; 466};
461 467
462struct radeon_cs_parser { 468struct radeon_cs_parser {
469 struct device *dev;
463 struct radeon_device *rdev; 470 struct radeon_device *rdev;
464 struct drm_file *filp; 471 struct drm_file *filp;
465 /* chunks */ 472 /* chunks */
@@ -651,11 +658,17 @@ struct radeon_asic {
651 uint32_t offset, uint32_t obj_size); 658 uint32_t offset, uint32_t obj_size);
652 int (*clear_surface_reg)(struct radeon_device *rdev, int reg); 659 int (*clear_surface_reg)(struct radeon_device *rdev, int reg);
653 void (*bandwidth_update)(struct radeon_device *rdev); 660 void (*bandwidth_update)(struct radeon_device *rdev);
654 void (*hdp_flush)(struct radeon_device *rdev);
655 void (*hpd_init)(struct radeon_device *rdev); 661 void (*hpd_init)(struct radeon_device *rdev);
656 void (*hpd_fini)(struct radeon_device *rdev); 662 void (*hpd_fini)(struct radeon_device *rdev);
657 bool (*hpd_sense)(struct radeon_device *rdev, enum radeon_hpd_id hpd); 663 bool (*hpd_sense)(struct radeon_device *rdev, enum radeon_hpd_id hpd);
658 void (*hpd_set_polarity)(struct radeon_device *rdev, enum radeon_hpd_id hpd); 664 void (*hpd_set_polarity)(struct radeon_device *rdev, enum radeon_hpd_id hpd);
665 /* ioctl hw specific callback. Some hw might want to perform special
666 * operation on specific ioctl. For instance on wait idle some hw
667 * might want to perform and HDP flush through MMIO as it seems that
668 * some R6XX/R7XX hw doesn't take HDP flush into account if programmed
669 * through ring.
670 */
671 void (*ioctl_wait_idle)(struct radeon_device *rdev, struct radeon_bo *bo);
659}; 672};
660 673
661/* 674/*
@@ -664,11 +677,14 @@ struct radeon_asic {
664struct r100_asic { 677struct r100_asic {
665 const unsigned *reg_safe_bm; 678 const unsigned *reg_safe_bm;
666 unsigned reg_safe_bm_size; 679 unsigned reg_safe_bm_size;
680 u32 hdp_cntl;
667}; 681};
668 682
669struct r300_asic { 683struct r300_asic {
670 const unsigned *reg_safe_bm; 684 const unsigned *reg_safe_bm;
671 unsigned reg_safe_bm_size; 685 unsigned reg_safe_bm_size;
686 u32 resync_scratch;
687 u32 hdp_cntl;
672}; 688};
673 689
674struct r600_asic { 690struct r600_asic {
@@ -814,6 +830,14 @@ struct radeon_device {
814 struct r600_ih ih; /* r6/700 interrupt ring */ 830 struct r600_ih ih; /* r6/700 interrupt ring */
815 struct workqueue_struct *wq; 831 struct workqueue_struct *wq;
816 struct work_struct hotplug_work; 832 struct work_struct hotplug_work;
833
834 /* audio stuff */
835 struct timer_list audio_timer;
836 int audio_channels;
837 int audio_rate;
838 int audio_bits_per_sample;
839 uint8_t audio_status_bits;
840 uint8_t audio_category_code;
817}; 841};
818 842
819int radeon_device_init(struct radeon_device *rdev, 843int radeon_device_init(struct radeon_device *rdev,
@@ -832,7 +856,7 @@ void r600_kms_blit_copy(struct radeon_device *rdev,
832 856
833static inline uint32_t r100_mm_rreg(struct radeon_device *rdev, uint32_t reg) 857static inline uint32_t r100_mm_rreg(struct radeon_device *rdev, uint32_t reg)
834{ 858{
835 if (reg < 0x10000) 859 if (reg < rdev->rmmio_size)
836 return readl(((void __iomem *)rdev->rmmio) + reg); 860 return readl(((void __iomem *)rdev->rmmio) + reg);
837 else { 861 else {
838 writel(reg, ((void __iomem *)rdev->rmmio) + RADEON_MM_INDEX); 862 writel(reg, ((void __iomem *)rdev->rmmio) + RADEON_MM_INDEX);
@@ -842,7 +866,7 @@ static inline uint32_t r100_mm_rreg(struct radeon_device *rdev, uint32_t reg)
842 866
843static inline void r100_mm_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v) 867static inline void r100_mm_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v)
844{ 868{
845 if (reg < 0x10000) 869 if (reg < rdev->rmmio_size)
846 writel(v, ((void __iomem *)rdev->rmmio) + reg); 870 writel(v, ((void __iomem *)rdev->rmmio) + reg);
847 else { 871 else {
848 writel(reg, ((void __iomem *)rdev->rmmio) + RADEON_MM_INDEX); 872 writel(reg, ((void __iomem *)rdev->rmmio) + RADEON_MM_INDEX);
@@ -996,13 +1020,14 @@ static inline void radeon_ring_write(struct radeon_device *rdev, uint32_t v)
996#define radeon_set_surface_reg(rdev, r, f, p, o, s) ((rdev)->asic->set_surface_reg((rdev), (r), (f), (p), (o), (s))) 1020#define radeon_set_surface_reg(rdev, r, f, p, o, s) ((rdev)->asic->set_surface_reg((rdev), (r), (f), (p), (o), (s)))
997#define radeon_clear_surface_reg(rdev, r) ((rdev)->asic->clear_surface_reg((rdev), (r))) 1021#define radeon_clear_surface_reg(rdev, r) ((rdev)->asic->clear_surface_reg((rdev), (r)))
998#define radeon_bandwidth_update(rdev) (rdev)->asic->bandwidth_update((rdev)) 1022#define radeon_bandwidth_update(rdev) (rdev)->asic->bandwidth_update((rdev))
999#define radeon_hdp_flush(rdev) (rdev)->asic->hdp_flush((rdev))
1000#define radeon_hpd_init(rdev) (rdev)->asic->hpd_init((rdev)) 1023#define radeon_hpd_init(rdev) (rdev)->asic->hpd_init((rdev))
1001#define radeon_hpd_fini(rdev) (rdev)->asic->hpd_fini((rdev)) 1024#define radeon_hpd_fini(rdev) (rdev)->asic->hpd_fini((rdev))
1002#define radeon_hpd_sense(rdev, hpd) (rdev)->asic->hpd_sense((rdev), (hpd)) 1025#define radeon_hpd_sense(rdev, hpd) (rdev)->asic->hpd_sense((rdev), (hpd))
1003#define radeon_hpd_set_polarity(rdev, hpd) (rdev)->asic->hpd_set_polarity((rdev), (hpd)) 1026#define radeon_hpd_set_polarity(rdev, hpd) (rdev)->asic->hpd_set_polarity((rdev), (hpd))
1004 1027
1005/* Common functions */ 1028/* Common functions */
1029/* AGP */
1030extern void radeon_agp_disable(struct radeon_device *rdev);
1006extern int radeon_gart_table_vram_pin(struct radeon_device *rdev); 1031extern int radeon_gart_table_vram_pin(struct radeon_device *rdev);
1007extern int radeon_modeset_init(struct radeon_device *rdev); 1032extern int radeon_modeset_init(struct radeon_device *rdev);
1008extern void radeon_modeset_fini(struct radeon_device *rdev); 1033extern void radeon_modeset_fini(struct radeon_device *rdev);
@@ -1016,6 +1041,7 @@ extern int radeon_cs_parser_init(struct radeon_cs_parser *p, void *data);
1016extern void radeon_legacy_set_clock_gating(struct radeon_device *rdev, int enable); 1041extern void radeon_legacy_set_clock_gating(struct radeon_device *rdev, int enable);
1017extern void radeon_atom_set_clock_gating(struct radeon_device *rdev, int enable); 1042extern void radeon_atom_set_clock_gating(struct radeon_device *rdev, int enable);
1018extern void radeon_ttm_placement_from_domain(struct radeon_bo *rbo, u32 domain); 1043extern void radeon_ttm_placement_from_domain(struct radeon_bo *rbo, u32 domain);
1044extern bool radeon_ttm_bo_is_radeon_bo(struct ttm_buffer_object *bo);
1019 1045
1020/* r100,rv100,rs100,rv200,rs200,r200,rv250,rs300,rv280 */ 1046/* r100,rv100,rs100,rv200,rs200,r200,rv250,rs300,rv280 */
1021struct r100_mc_save { 1047struct r100_mc_save {
@@ -1125,6 +1151,7 @@ extern bool r600_card_posted(struct radeon_device *rdev);
1125extern void r600_cp_stop(struct radeon_device *rdev); 1151extern void r600_cp_stop(struct radeon_device *rdev);
1126extern void r600_ring_init(struct radeon_device *rdev, unsigned ring_size); 1152extern void r600_ring_init(struct radeon_device *rdev, unsigned ring_size);
1127extern int r600_cp_resume(struct radeon_device *rdev); 1153extern int r600_cp_resume(struct radeon_device *rdev);
1154extern void r600_cp_fini(struct radeon_device *rdev);
1128extern int r600_count_pipe_bits(uint32_t val); 1155extern int r600_count_pipe_bits(uint32_t val);
1129extern int r600_gart_clear_page(struct radeon_device *rdev, int i); 1156extern int r600_gart_clear_page(struct radeon_device *rdev, int i);
1130extern int r600_mc_wait_for_idle(struct radeon_device *rdev); 1157extern int r600_mc_wait_for_idle(struct radeon_device *rdev);
@@ -1145,6 +1172,22 @@ extern int r600_irq_init(struct radeon_device *rdev);
1145extern void r600_irq_fini(struct radeon_device *rdev); 1172extern void r600_irq_fini(struct radeon_device *rdev);
1146extern void r600_ih_ring_init(struct radeon_device *rdev, unsigned ring_size); 1173extern void r600_ih_ring_init(struct radeon_device *rdev, unsigned ring_size);
1147extern int r600_irq_set(struct radeon_device *rdev); 1174extern int r600_irq_set(struct radeon_device *rdev);
1175extern void r600_irq_suspend(struct radeon_device *rdev);
1176/* r600 audio */
1177extern int r600_audio_init(struct radeon_device *rdev);
1178extern int r600_audio_tmds_index(struct drm_encoder *encoder);
1179extern void r600_audio_set_clock(struct drm_encoder *encoder, int clock);
1180extern void r600_audio_fini(struct radeon_device *rdev);
1181extern void r600_hdmi_init(struct drm_encoder *encoder);
1182extern void r600_hdmi_enable(struct drm_encoder *encoder, int enable);
1183extern void r600_hdmi_setmode(struct drm_encoder *encoder, struct drm_display_mode *mode);
1184extern int r600_hdmi_buffer_status_changed(struct drm_encoder *encoder);
1185extern void r600_hdmi_update_audio_settings(struct drm_encoder *encoder,
1186 int channels,
1187 int rate,
1188 int bps,
1189 uint8_t status_bits,
1190 uint8_t category_code);
1148 1191
1149#include "radeon_object.h" 1192#include "radeon_object.h"
1150 1193
diff --git a/drivers/gpu/drm/radeon/radeon_agp.c b/drivers/gpu/drm/radeon/radeon_agp.c
index 54bf49a6d676..c0681a5556dc 100644
--- a/drivers/gpu/drm/radeon/radeon_agp.c
+++ b/drivers/gpu/drm/radeon/radeon_agp.c
@@ -144,9 +144,19 @@ int radeon_agp_init(struct radeon_device *rdev)
144 144
145 ret = drm_agp_info(rdev->ddev, &info); 145 ret = drm_agp_info(rdev->ddev, &info);
146 if (ret) { 146 if (ret) {
147 drm_agp_release(rdev->ddev);
147 DRM_ERROR("Unable to get AGP info: %d\n", ret); 148 DRM_ERROR("Unable to get AGP info: %d\n", ret);
148 return ret; 149 return ret;
149 } 150 }
151
152 if (rdev->ddev->agp->agp_info.aper_size < 32) {
153 drm_agp_release(rdev->ddev);
154 dev_warn(rdev->dev, "AGP aperture too small (%zuM) "
155 "need at least 32M, disabling AGP\n",
156 rdev->ddev->agp->agp_info.aper_size);
157 return -EINVAL;
158 }
159
150 mode.mode = info.mode; 160 mode.mode = info.mode;
151 agp_status = (RREG32(RADEON_AGP_STATUS) | RADEON_AGPv3_MODE) & mode.mode; 161 agp_status = (RREG32(RADEON_AGP_STATUS) | RADEON_AGPv3_MODE) & mode.mode;
152 is_v3 = !!(agp_status & RADEON_AGPv3_MODE); 162 is_v3 = !!(agp_status & RADEON_AGPv3_MODE);
@@ -221,6 +231,7 @@ int radeon_agp_init(struct radeon_device *rdev)
221 ret = drm_agp_enable(rdev->ddev, mode); 231 ret = drm_agp_enable(rdev->ddev, mode);
222 if (ret) { 232 if (ret) {
223 DRM_ERROR("Unable to enable AGP (mode = 0x%lx)\n", mode.mode); 233 DRM_ERROR("Unable to enable AGP (mode = 0x%lx)\n", mode.mode);
234 drm_agp_release(rdev->ddev);
224 return ret; 235 return ret;
225 } 236 }
226 237
@@ -252,10 +263,8 @@ void radeon_agp_resume(struct radeon_device *rdev)
252void radeon_agp_fini(struct radeon_device *rdev) 263void radeon_agp_fini(struct radeon_device *rdev)
253{ 264{
254#if __OS_HAS_AGP 265#if __OS_HAS_AGP
255 if (rdev->flags & RADEON_IS_AGP) { 266 if (rdev->ddev->agp && rdev->ddev->agp->acquired) {
256 if (rdev->ddev->agp && rdev->ddev->agp->acquired) { 267 drm_agp_release(rdev->ddev);
257 drm_agp_release(rdev->ddev);
258 }
259 } 268 }
260#endif 269#endif
261} 270}
diff --git a/drivers/gpu/drm/radeon/radeon_asic.h b/drivers/gpu/drm/radeon/radeon_asic.h
index 636116bedcb4..05ee1aeac3fd 100644
--- a/drivers/gpu/drm/radeon/radeon_asic.h
+++ b/drivers/gpu/drm/radeon/radeon_asic.h
@@ -33,6 +33,7 @@
33 */ 33 */
34uint32_t radeon_legacy_get_engine_clock(struct radeon_device *rdev); 34uint32_t radeon_legacy_get_engine_clock(struct radeon_device *rdev);
35void radeon_legacy_set_engine_clock(struct radeon_device *rdev, uint32_t eng_clock); 35void radeon_legacy_set_engine_clock(struct radeon_device *rdev, uint32_t eng_clock);
36uint32_t radeon_legacy_get_memory_clock(struct radeon_device *rdev);
36void radeon_legacy_set_clock_gating(struct radeon_device *rdev, int enable); 37void radeon_legacy_set_clock_gating(struct radeon_device *rdev, int enable);
37 38
38uint32_t radeon_atom_get_engine_clock(struct radeon_device *rdev); 39uint32_t radeon_atom_get_engine_clock(struct radeon_device *rdev);
@@ -76,7 +77,6 @@ int r100_clear_surface_reg(struct radeon_device *rdev, int reg);
76void r100_bandwidth_update(struct radeon_device *rdev); 77void r100_bandwidth_update(struct radeon_device *rdev);
77void r100_ring_ib_execute(struct radeon_device *rdev, struct radeon_ib *ib); 78void r100_ring_ib_execute(struct radeon_device *rdev, struct radeon_ib *ib);
78int r100_ring_test(struct radeon_device *rdev); 79int r100_ring_test(struct radeon_device *rdev);
79void r100_hdp_flush(struct radeon_device *rdev);
80void r100_hpd_init(struct radeon_device *rdev); 80void r100_hpd_init(struct radeon_device *rdev);
81void r100_hpd_fini(struct radeon_device *rdev); 81void r100_hpd_fini(struct radeon_device *rdev);
82bool r100_hpd_sense(struct radeon_device *rdev, enum radeon_hpd_id hpd); 82bool r100_hpd_sense(struct radeon_device *rdev, enum radeon_hpd_id hpd);
@@ -106,18 +106,18 @@ static struct radeon_asic r100_asic = {
106 .copy = &r100_copy_blit, 106 .copy = &r100_copy_blit,
107 .get_engine_clock = &radeon_legacy_get_engine_clock, 107 .get_engine_clock = &radeon_legacy_get_engine_clock,
108 .set_engine_clock = &radeon_legacy_set_engine_clock, 108 .set_engine_clock = &radeon_legacy_set_engine_clock,
109 .get_memory_clock = NULL, 109 .get_memory_clock = &radeon_legacy_get_memory_clock,
110 .set_memory_clock = NULL, 110 .set_memory_clock = NULL,
111 .set_pcie_lanes = NULL, 111 .set_pcie_lanes = NULL,
112 .set_clock_gating = &radeon_legacy_set_clock_gating, 112 .set_clock_gating = &radeon_legacy_set_clock_gating,
113 .set_surface_reg = r100_set_surface_reg, 113 .set_surface_reg = r100_set_surface_reg,
114 .clear_surface_reg = r100_clear_surface_reg, 114 .clear_surface_reg = r100_clear_surface_reg,
115 .bandwidth_update = &r100_bandwidth_update, 115 .bandwidth_update = &r100_bandwidth_update,
116 .hdp_flush = &r100_hdp_flush,
117 .hpd_init = &r100_hpd_init, 116 .hpd_init = &r100_hpd_init,
118 .hpd_fini = &r100_hpd_fini, 117 .hpd_fini = &r100_hpd_fini,
119 .hpd_sense = &r100_hpd_sense, 118 .hpd_sense = &r100_hpd_sense,
120 .hpd_set_polarity = &r100_hpd_set_polarity, 119 .hpd_set_polarity = &r100_hpd_set_polarity,
120 .ioctl_wait_idle = NULL,
121}; 121};
122 122
123 123
@@ -166,18 +166,18 @@ static struct radeon_asic r300_asic = {
166 .copy = &r100_copy_blit, 166 .copy = &r100_copy_blit,
167 .get_engine_clock = &radeon_legacy_get_engine_clock, 167 .get_engine_clock = &radeon_legacy_get_engine_clock,
168 .set_engine_clock = &radeon_legacy_set_engine_clock, 168 .set_engine_clock = &radeon_legacy_set_engine_clock,
169 .get_memory_clock = NULL, 169 .get_memory_clock = &radeon_legacy_get_memory_clock,
170 .set_memory_clock = NULL, 170 .set_memory_clock = NULL,
171 .set_pcie_lanes = &rv370_set_pcie_lanes, 171 .set_pcie_lanes = &rv370_set_pcie_lanes,
172 .set_clock_gating = &radeon_legacy_set_clock_gating, 172 .set_clock_gating = &radeon_legacy_set_clock_gating,
173 .set_surface_reg = r100_set_surface_reg, 173 .set_surface_reg = r100_set_surface_reg,
174 .clear_surface_reg = r100_clear_surface_reg, 174 .clear_surface_reg = r100_clear_surface_reg,
175 .bandwidth_update = &r100_bandwidth_update, 175 .bandwidth_update = &r100_bandwidth_update,
176 .hdp_flush = &r100_hdp_flush,
177 .hpd_init = &r100_hpd_init, 176 .hpd_init = &r100_hpd_init,
178 .hpd_fini = &r100_hpd_fini, 177 .hpd_fini = &r100_hpd_fini,
179 .hpd_sense = &r100_hpd_sense, 178 .hpd_sense = &r100_hpd_sense,
180 .hpd_set_polarity = &r100_hpd_set_polarity, 179 .hpd_set_polarity = &r100_hpd_set_polarity,
180 .ioctl_wait_idle = NULL,
181}; 181};
182 182
183/* 183/*
@@ -217,11 +217,11 @@ static struct radeon_asic r420_asic = {
217 .set_surface_reg = r100_set_surface_reg, 217 .set_surface_reg = r100_set_surface_reg,
218 .clear_surface_reg = r100_clear_surface_reg, 218 .clear_surface_reg = r100_clear_surface_reg,
219 .bandwidth_update = &r100_bandwidth_update, 219 .bandwidth_update = &r100_bandwidth_update,
220 .hdp_flush = &r100_hdp_flush,
221 .hpd_init = &r100_hpd_init, 220 .hpd_init = &r100_hpd_init,
222 .hpd_fini = &r100_hpd_fini, 221 .hpd_fini = &r100_hpd_fini,
223 .hpd_sense = &r100_hpd_sense, 222 .hpd_sense = &r100_hpd_sense,
224 .hpd_set_polarity = &r100_hpd_set_polarity, 223 .hpd_set_polarity = &r100_hpd_set_polarity,
224 .ioctl_wait_idle = NULL,
225}; 225};
226 226
227 227
@@ -259,18 +259,18 @@ static struct radeon_asic rs400_asic = {
259 .copy = &r100_copy_blit, 259 .copy = &r100_copy_blit,
260 .get_engine_clock = &radeon_legacy_get_engine_clock, 260 .get_engine_clock = &radeon_legacy_get_engine_clock,
261 .set_engine_clock = &radeon_legacy_set_engine_clock, 261 .set_engine_clock = &radeon_legacy_set_engine_clock,
262 .get_memory_clock = NULL, 262 .get_memory_clock = &radeon_legacy_get_memory_clock,
263 .set_memory_clock = NULL, 263 .set_memory_clock = NULL,
264 .set_pcie_lanes = NULL, 264 .set_pcie_lanes = NULL,
265 .set_clock_gating = &radeon_legacy_set_clock_gating, 265 .set_clock_gating = &radeon_legacy_set_clock_gating,
266 .set_surface_reg = r100_set_surface_reg, 266 .set_surface_reg = r100_set_surface_reg,
267 .clear_surface_reg = r100_clear_surface_reg, 267 .clear_surface_reg = r100_clear_surface_reg,
268 .bandwidth_update = &r100_bandwidth_update, 268 .bandwidth_update = &r100_bandwidth_update,
269 .hdp_flush = &r100_hdp_flush,
270 .hpd_init = &r100_hpd_init, 269 .hpd_init = &r100_hpd_init,
271 .hpd_fini = &r100_hpd_fini, 270 .hpd_fini = &r100_hpd_fini,
272 .hpd_sense = &r100_hpd_sense, 271 .hpd_sense = &r100_hpd_sense,
273 .hpd_set_polarity = &r100_hpd_set_polarity, 272 .hpd_set_polarity = &r100_hpd_set_polarity,
273 .ioctl_wait_idle = NULL,
274}; 274};
275 275
276 276
@@ -323,11 +323,11 @@ static struct radeon_asic rs600_asic = {
323 .set_pcie_lanes = NULL, 323 .set_pcie_lanes = NULL,
324 .set_clock_gating = &radeon_atom_set_clock_gating, 324 .set_clock_gating = &radeon_atom_set_clock_gating,
325 .bandwidth_update = &rs600_bandwidth_update, 325 .bandwidth_update = &rs600_bandwidth_update,
326 .hdp_flush = &r100_hdp_flush,
327 .hpd_init = &rs600_hpd_init, 326 .hpd_init = &rs600_hpd_init,
328 .hpd_fini = &rs600_hpd_fini, 327 .hpd_fini = &rs600_hpd_fini,
329 .hpd_sense = &rs600_hpd_sense, 328 .hpd_sense = &rs600_hpd_sense,
330 .hpd_set_polarity = &rs600_hpd_set_polarity, 329 .hpd_set_polarity = &rs600_hpd_set_polarity,
330 .ioctl_wait_idle = NULL,
331}; 331};
332 332
333 333
@@ -371,11 +371,11 @@ static struct radeon_asic rs690_asic = {
371 .set_surface_reg = r100_set_surface_reg, 371 .set_surface_reg = r100_set_surface_reg,
372 .clear_surface_reg = r100_clear_surface_reg, 372 .clear_surface_reg = r100_clear_surface_reg,
373 .bandwidth_update = &rs690_bandwidth_update, 373 .bandwidth_update = &rs690_bandwidth_update,
374 .hdp_flush = &r100_hdp_flush,
375 .hpd_init = &rs600_hpd_init, 374 .hpd_init = &rs600_hpd_init,
376 .hpd_fini = &rs600_hpd_fini, 375 .hpd_fini = &rs600_hpd_fini,
377 .hpd_sense = &rs600_hpd_sense, 376 .hpd_sense = &rs600_hpd_sense,
378 .hpd_set_polarity = &rs600_hpd_set_polarity, 377 .hpd_set_polarity = &rs600_hpd_set_polarity,
378 .ioctl_wait_idle = NULL,
379}; 379};
380 380
381 381
@@ -423,11 +423,11 @@ static struct radeon_asic rv515_asic = {
423 .set_surface_reg = r100_set_surface_reg, 423 .set_surface_reg = r100_set_surface_reg,
424 .clear_surface_reg = r100_clear_surface_reg, 424 .clear_surface_reg = r100_clear_surface_reg,
425 .bandwidth_update = &rv515_bandwidth_update, 425 .bandwidth_update = &rv515_bandwidth_update,
426 .hdp_flush = &r100_hdp_flush,
427 .hpd_init = &rs600_hpd_init, 426 .hpd_init = &rs600_hpd_init,
428 .hpd_fini = &rs600_hpd_fini, 427 .hpd_fini = &rs600_hpd_fini,
429 .hpd_sense = &rs600_hpd_sense, 428 .hpd_sense = &rs600_hpd_sense,
430 .hpd_set_polarity = &rs600_hpd_set_polarity, 429 .hpd_set_polarity = &rs600_hpd_set_polarity,
430 .ioctl_wait_idle = NULL,
431}; 431};
432 432
433 433
@@ -466,11 +466,11 @@ static struct radeon_asic r520_asic = {
466 .set_surface_reg = r100_set_surface_reg, 466 .set_surface_reg = r100_set_surface_reg,
467 .clear_surface_reg = r100_clear_surface_reg, 467 .clear_surface_reg = r100_clear_surface_reg,
468 .bandwidth_update = &rv515_bandwidth_update, 468 .bandwidth_update = &rv515_bandwidth_update,
469 .hdp_flush = &r100_hdp_flush,
470 .hpd_init = &rs600_hpd_init, 469 .hpd_init = &rs600_hpd_init,
471 .hpd_fini = &rs600_hpd_fini, 470 .hpd_fini = &rs600_hpd_fini,
472 .hpd_sense = &rs600_hpd_sense, 471 .hpd_sense = &rs600_hpd_sense,
473 .hpd_set_polarity = &rs600_hpd_set_polarity, 472 .hpd_set_polarity = &rs600_hpd_set_polarity,
473 .ioctl_wait_idle = NULL,
474}; 474};
475 475
476/* 476/*
@@ -507,12 +507,12 @@ int r600_ring_test(struct radeon_device *rdev);
507int r600_copy_blit(struct radeon_device *rdev, 507int r600_copy_blit(struct radeon_device *rdev,
508 uint64_t src_offset, uint64_t dst_offset, 508 uint64_t src_offset, uint64_t dst_offset,
509 unsigned num_pages, struct radeon_fence *fence); 509 unsigned num_pages, struct radeon_fence *fence);
510void r600_hdp_flush(struct radeon_device *rdev);
511void r600_hpd_init(struct radeon_device *rdev); 510void r600_hpd_init(struct radeon_device *rdev);
512void r600_hpd_fini(struct radeon_device *rdev); 511void r600_hpd_fini(struct radeon_device *rdev);
513bool r600_hpd_sense(struct radeon_device *rdev, enum radeon_hpd_id hpd); 512bool r600_hpd_sense(struct radeon_device *rdev, enum radeon_hpd_id hpd);
514void r600_hpd_set_polarity(struct radeon_device *rdev, 513void r600_hpd_set_polarity(struct radeon_device *rdev,
515 enum radeon_hpd_id hpd); 514 enum radeon_hpd_id hpd);
515extern void r600_ioctl_wait_idle(struct radeon_device *rdev, struct radeon_bo *bo);
516 516
517static struct radeon_asic r600_asic = { 517static struct radeon_asic r600_asic = {
518 .init = &r600_init, 518 .init = &r600_init,
@@ -543,11 +543,11 @@ static struct radeon_asic r600_asic = {
543 .set_surface_reg = r600_set_surface_reg, 543 .set_surface_reg = r600_set_surface_reg,
544 .clear_surface_reg = r600_clear_surface_reg, 544 .clear_surface_reg = r600_clear_surface_reg,
545 .bandwidth_update = &rv515_bandwidth_update, 545 .bandwidth_update = &rv515_bandwidth_update,
546 .hdp_flush = &r600_hdp_flush,
547 .hpd_init = &r600_hpd_init, 546 .hpd_init = &r600_hpd_init,
548 .hpd_fini = &r600_hpd_fini, 547 .hpd_fini = &r600_hpd_fini,
549 .hpd_sense = &r600_hpd_sense, 548 .hpd_sense = &r600_hpd_sense,
550 .hpd_set_polarity = &r600_hpd_set_polarity, 549 .hpd_set_polarity = &r600_hpd_set_polarity,
550 .ioctl_wait_idle = r600_ioctl_wait_idle,
551}; 551};
552 552
553/* 553/*
@@ -588,11 +588,11 @@ static struct radeon_asic rv770_asic = {
588 .set_surface_reg = r600_set_surface_reg, 588 .set_surface_reg = r600_set_surface_reg,
589 .clear_surface_reg = r600_clear_surface_reg, 589 .clear_surface_reg = r600_clear_surface_reg,
590 .bandwidth_update = &rv515_bandwidth_update, 590 .bandwidth_update = &rv515_bandwidth_update,
591 .hdp_flush = &r600_hdp_flush,
592 .hpd_init = &r600_hpd_init, 591 .hpd_init = &r600_hpd_init,
593 .hpd_fini = &r600_hpd_fini, 592 .hpd_fini = &r600_hpd_fini,
594 .hpd_sense = &r600_hpd_sense, 593 .hpd_sense = &r600_hpd_sense,
595 .hpd_set_polarity = &r600_hpd_set_polarity, 594 .hpd_set_polarity = &r600_hpd_set_polarity,
595 .ioctl_wait_idle = r600_ioctl_wait_idle,
596}; 596};
597 597
598#endif 598#endif
diff --git a/drivers/gpu/drm/radeon/radeon_atombios.c b/drivers/gpu/drm/radeon/radeon_atombios.c
index 12a0c760e7ff..4d8831548a5f 100644
--- a/drivers/gpu/drm/radeon/radeon_atombios.c
+++ b/drivers/gpu/drm/radeon/radeon_atombios.c
@@ -114,6 +114,7 @@ static inline struct radeon_i2c_bus_rec radeon_lookup_i2c_gpio(struct radeon_dev
114 i2c.i2c_id = gpio->sucI2cId.ucAccess; 114 i2c.i2c_id = gpio->sucI2cId.ucAccess;
115 115
116 i2c.valid = true; 116 i2c.valid = true;
117 break;
117 } 118 }
118 } 119 }
119 120
@@ -205,6 +206,15 @@ static bool radeon_atom_apply_quirks(struct drm_device *dev,
205 *connector_type = DRM_MODE_CONNECTOR_DVID; 206 *connector_type = DRM_MODE_CONNECTOR_DVID;
206 } 207 }
207 208
209 /* Asrock RS600 board lists the DVI port as HDMI */
210 if ((dev->pdev->device == 0x7941) &&
211 (dev->pdev->subsystem_vendor == 0x1849) &&
212 (dev->pdev->subsystem_device == 0x7941)) {
213 if ((*connector_type == DRM_MODE_CONNECTOR_HDMIA) &&
214 (supported_device == ATOM_DEVICE_DFP3_SUPPORT))
215 *connector_type = DRM_MODE_CONNECTOR_DVID;
216 }
217
208 /* a-bit f-i90hd - ciaranm on #radeonhd - this board has no DVI */ 218 /* a-bit f-i90hd - ciaranm on #radeonhd - this board has no DVI */
209 if ((dev->pdev->device == 0x7941) && 219 if ((dev->pdev->device == 0x7941) &&
210 (dev->pdev->subsystem_vendor == 0x147b) && 220 (dev->pdev->subsystem_vendor == 0x147b) &&
@@ -286,6 +296,15 @@ static bool radeon_atom_apply_quirks(struct drm_device *dev,
286 *connector_type = DRM_MODE_CONNECTOR_DVID; 296 *connector_type = DRM_MODE_CONNECTOR_DVID;
287 } 297 }
288 298
299 /* XFX Pine Group device rv730 reports no VGA DDC lines
300 * even though they are wired up to record 0x93
301 */
302 if ((dev->pdev->device == 0x9498) &&
303 (dev->pdev->subsystem_vendor == 0x1682) &&
304 (dev->pdev->subsystem_device == 0x2452)) {
305 struct radeon_device *rdev = dev->dev_private;
306 *i2c_bus = radeon_lookup_i2c_gpio(rdev, 0x93);
307 }
289 return true; 308 return true;
290} 309}
291 310
@@ -345,7 +364,9 @@ const int object_connector_convert[] = {
345 DRM_MODE_CONNECTOR_Unknown, 364 DRM_MODE_CONNECTOR_Unknown,
346 DRM_MODE_CONNECTOR_Unknown, 365 DRM_MODE_CONNECTOR_Unknown,
347 DRM_MODE_CONNECTOR_Unknown, 366 DRM_MODE_CONNECTOR_Unknown,
348 DRM_MODE_CONNECTOR_DisplayPort 367 DRM_MODE_CONNECTOR_DisplayPort,
368 DRM_MODE_CONNECTOR_eDP,
369 DRM_MODE_CONNECTOR_Unknown
349}; 370};
350 371
351bool radeon_get_atom_connector_info_from_object_table(struct drm_device *dev) 372bool radeon_get_atom_connector_info_from_object_table(struct drm_device *dev)
@@ -745,8 +766,7 @@ bool radeon_get_atom_connector_info_from_supported_devices_table(struct
745 else 766 else
746 radeon_add_legacy_encoder(dev, 767 radeon_add_legacy_encoder(dev,
747 radeon_get_encoder_id(dev, 768 radeon_get_encoder_id(dev,
748 (1 << 769 (1 << i),
749 i),
750 dac), 770 dac),
751 (1 << i)); 771 (1 << i));
752 } 772 }
@@ -758,32 +778,30 @@ bool radeon_get_atom_connector_info_from_supported_devices_table(struct
758 if (bios_connectors[j].valid && (i != j)) { 778 if (bios_connectors[j].valid && (i != j)) {
759 if (bios_connectors[i].line_mux == 779 if (bios_connectors[i].line_mux ==
760 bios_connectors[j].line_mux) { 780 bios_connectors[j].line_mux) {
761 if (((bios_connectors[i]. 781 /* make sure not to combine LVDS */
762 devices & 782 if (bios_connectors[i].devices & (ATOM_DEVICE_LCD_SUPPORT)) {
763 (ATOM_DEVICE_DFP_SUPPORT)) 783 bios_connectors[i].line_mux = 53;
764 && (bios_connectors[j]. 784 bios_connectors[i].ddc_bus.valid = false;
765 devices & 785 continue;
766 (ATOM_DEVICE_CRT_SUPPORT))) 786 }
767 || 787 if (bios_connectors[j].devices & (ATOM_DEVICE_LCD_SUPPORT)) {
768 ((bios_connectors[j]. 788 bios_connectors[j].line_mux = 53;
769 devices & 789 bios_connectors[j].ddc_bus.valid = false;
770 (ATOM_DEVICE_DFP_SUPPORT)) 790 continue;
771 && (bios_connectors[i]. 791 }
772 devices & 792 /* combine analog and digital for DVI-I */
773 (ATOM_DEVICE_CRT_SUPPORT)))) { 793 if (((bios_connectors[i].devices & (ATOM_DEVICE_DFP_SUPPORT)) &&
774 bios_connectors[i]. 794 (bios_connectors[j].devices & (ATOM_DEVICE_CRT_SUPPORT))) ||
775 devices |= 795 ((bios_connectors[j].devices & (ATOM_DEVICE_DFP_SUPPORT)) &&
776 bios_connectors[j]. 796 (bios_connectors[i].devices & (ATOM_DEVICE_CRT_SUPPORT)))) {
777 devices; 797 bios_connectors[i].devices |=
778 bios_connectors[i]. 798 bios_connectors[j].devices;
779 connector_type = 799 bios_connectors[i].connector_type =
780 DRM_MODE_CONNECTOR_DVII; 800 DRM_MODE_CONNECTOR_DVII;
781 if (bios_connectors[j].devices & 801 if (bios_connectors[j].devices & (ATOM_DEVICE_DFP_SUPPORT))
782 (ATOM_DEVICE_DFP_SUPPORT))
783 bios_connectors[i].hpd = 802 bios_connectors[i].hpd =
784 bios_connectors[j].hpd; 803 bios_connectors[j].hpd;
785 bios_connectors[j]. 804 bios_connectors[j].valid = false;
786 valid = false;
787 } 805 }
788 } 806 }
789 } 807 }
@@ -938,6 +956,43 @@ bool radeon_atom_get_clock_info(struct drm_device *dev)
938 return false; 956 return false;
939} 957}
940 958
959union igp_info {
960 struct _ATOM_INTEGRATED_SYSTEM_INFO info;
961 struct _ATOM_INTEGRATED_SYSTEM_INFO_V2 info_2;
962};
963
964bool radeon_atombios_sideport_present(struct radeon_device *rdev)
965{
966 struct radeon_mode_info *mode_info = &rdev->mode_info;
967 int index = GetIndexIntoMasterTable(DATA, IntegratedSystemInfo);
968 union igp_info *igp_info;
969 u8 frev, crev;
970 u16 data_offset;
971
972 atom_parse_data_header(mode_info->atom_context, index, NULL, &frev,
973 &crev, &data_offset);
974
975 igp_info = (union igp_info *)(mode_info->atom_context->bios +
976 data_offset);
977
978 if (igp_info) {
979 switch (crev) {
980 case 1:
981 if (igp_info->info.ucMemoryType & 0xf0)
982 return true;
983 break;
984 case 2:
985 if (igp_info->info_2.ucMemoryType & 0x0f)
986 return true;
987 break;
988 default:
989 DRM_ERROR("Unsupported IGP table: %d %d\n", frev, crev);
990 break;
991 }
992 }
993 return false;
994}
995
941bool radeon_atombios_get_tmds_info(struct radeon_encoder *encoder, 996bool radeon_atombios_get_tmds_info(struct radeon_encoder *encoder,
942 struct radeon_encoder_int_tmds *tmds) 997 struct radeon_encoder_int_tmds *tmds)
943{ 998{
@@ -1029,6 +1084,7 @@ static struct radeon_atom_ss *radeon_atombios_get_ss_info(struct
1029 ss->delay = ss_info->asSS_Info[i].ucSS_Delay; 1084 ss->delay = ss_info->asSS_Info[i].ucSS_Delay;
1030 ss->range = ss_info->asSS_Info[i].ucSS_Range; 1085 ss->range = ss_info->asSS_Info[i].ucSS_Range;
1031 ss->refdiv = ss_info->asSS_Info[i].ucRecommendedRef_Div; 1086 ss->refdiv = ss_info->asSS_Info[i].ucRecommendedRef_Div;
1087 break;
1032 } 1088 }
1033 } 1089 }
1034 } 1090 }
@@ -1234,6 +1290,61 @@ bool radeon_atom_get_tv_timings(struct radeon_device *rdev, int index,
1234 return true; 1290 return true;
1235} 1291}
1236 1292
1293enum radeon_tv_std
1294radeon_atombios_get_tv_info(struct radeon_device *rdev)
1295{
1296 struct radeon_mode_info *mode_info = &rdev->mode_info;
1297 int index = GetIndexIntoMasterTable(DATA, AnalogTV_Info);
1298 uint16_t data_offset;
1299 uint8_t frev, crev;
1300 struct _ATOM_ANALOG_TV_INFO *tv_info;
1301 enum radeon_tv_std tv_std = TV_STD_NTSC;
1302
1303 atom_parse_data_header(mode_info->atom_context, index, NULL, &frev, &crev, &data_offset);
1304
1305 tv_info = (struct _ATOM_ANALOG_TV_INFO *)(mode_info->atom_context->bios + data_offset);
1306
1307 switch (tv_info->ucTV_BootUpDefaultStandard) {
1308 case ATOM_TV_NTSC:
1309 tv_std = TV_STD_NTSC;
1310 DRM_INFO("Default TV standard: NTSC\n");
1311 break;
1312 case ATOM_TV_NTSCJ:
1313 tv_std = TV_STD_NTSC_J;
1314 DRM_INFO("Default TV standard: NTSC-J\n");
1315 break;
1316 case ATOM_TV_PAL:
1317 tv_std = TV_STD_PAL;
1318 DRM_INFO("Default TV standard: PAL\n");
1319 break;
1320 case ATOM_TV_PALM:
1321 tv_std = TV_STD_PAL_M;
1322 DRM_INFO("Default TV standard: PAL-M\n");
1323 break;
1324 case ATOM_TV_PALN:
1325 tv_std = TV_STD_PAL_N;
1326 DRM_INFO("Default TV standard: PAL-N\n");
1327 break;
1328 case ATOM_TV_PALCN:
1329 tv_std = TV_STD_PAL_CN;
1330 DRM_INFO("Default TV standard: PAL-CN\n");
1331 break;
1332 case ATOM_TV_PAL60:
1333 tv_std = TV_STD_PAL_60;
1334 DRM_INFO("Default TV standard: PAL-60\n");
1335 break;
1336 case ATOM_TV_SECAM:
1337 tv_std = TV_STD_SECAM;
1338 DRM_INFO("Default TV standard: SECAM\n");
1339 break;
1340 default:
1341 tv_std = TV_STD_NTSC;
1342 DRM_INFO("Unknown TV standard; defaulting to NTSC\n");
1343 break;
1344 }
1345 return tv_std;
1346}
1347
1237struct radeon_encoder_tv_dac * 1348struct radeon_encoder_tv_dac *
1238radeon_atombios_get_tv_dac_info(struct radeon_encoder *encoder) 1349radeon_atombios_get_tv_dac_info(struct radeon_encoder *encoder)
1239{ 1350{
@@ -1269,6 +1380,7 @@ radeon_atombios_get_tv_dac_info(struct radeon_encoder *encoder)
1269 dac = dac_info->ucDAC2_NTSC_DAC_Adjustment; 1380 dac = dac_info->ucDAC2_NTSC_DAC_Adjustment;
1270 tv_dac->ntsc_tvdac_adj = (bg << 16) | (dac << 20); 1381 tv_dac->ntsc_tvdac_adj = (bg << 16) | (dac << 20);
1271 1382
1383 tv_dac->tv_std = radeon_atombios_get_tv_info(rdev);
1272 } 1384 }
1273 return tv_dac; 1385 return tv_dac;
1274} 1386}
diff --git a/drivers/gpu/drm/radeon/radeon_benchmark.c b/drivers/gpu/drm/radeon/radeon_benchmark.c
index 4ddfd4b5bc51..7932dc4d6b90 100644
--- a/drivers/gpu/drm/radeon/radeon_benchmark.c
+++ b/drivers/gpu/drm/radeon/radeon_benchmark.c
@@ -65,31 +65,42 @@ void radeon_benchmark_move(struct radeon_device *rdev, unsigned bsize,
65 if (r) { 65 if (r) {
66 goto out_cleanup; 66 goto out_cleanup;
67 } 67 }
68 start_jiffies = jiffies; 68
69 for (i = 0; i < n; i++) { 69 /* r100 doesn't have dma engine so skip the test */
70 r = radeon_fence_create(rdev, &fence); 70 if (rdev->asic->copy_dma) {
71 if (r) { 71
72 goto out_cleanup; 72 start_jiffies = jiffies;
73 for (i = 0; i < n; i++) {
74 r = radeon_fence_create(rdev, &fence);
75 if (r) {
76 goto out_cleanup;
77 }
78
79 r = radeon_copy_dma(rdev, saddr, daddr,
80 size / RADEON_GPU_PAGE_SIZE, fence);
81
82 if (r) {
83 goto out_cleanup;
84 }
85 r = radeon_fence_wait(fence, false);
86 if (r) {
87 goto out_cleanup;
88 }
89 radeon_fence_unref(&fence);
73 } 90 }
74 r = radeon_copy_dma(rdev, saddr, daddr, size / RADEON_GPU_PAGE_SIZE, fence); 91 end_jiffies = jiffies;
75 if (r) { 92 time = end_jiffies - start_jiffies;
76 goto out_cleanup; 93 time = jiffies_to_msecs(time);
94 if (time > 0) {
95 i = ((n * size) >> 10) / time;
96 printk(KERN_INFO "radeon: dma %u bo moves of %ukb from"
97 " %d to %d in %lums (%ukb/ms %ukb/s %uM/s)\n",
98 n, size >> 10,
99 sdomain, ddomain, time,
100 i, i * 1000, (i * 1000) / 1024);
77 } 101 }
78 r = radeon_fence_wait(fence, false);
79 if (r) {
80 goto out_cleanup;
81 }
82 radeon_fence_unref(&fence);
83 }
84 end_jiffies = jiffies;
85 time = end_jiffies - start_jiffies;
86 time = jiffies_to_msecs(time);
87 if (time > 0) {
88 i = ((n * size) >> 10) / time;
89 printk(KERN_INFO "radeon: dma %u bo moves of %ukb from %d to %d"
90 " in %lums (%ukb/ms %ukb/s %uM/s)\n", n, size >> 10,
91 sdomain, ddomain, time, i, i * 1000, (i * 1000) / 1024);
92 } 102 }
103
93 start_jiffies = jiffies; 104 start_jiffies = jiffies;
94 for (i = 0; i < n; i++) { 105 for (i = 0; i < n; i++) {
95 r = radeon_fence_create(rdev, &fence); 106 r = radeon_fence_create(rdev, &fence);
diff --git a/drivers/gpu/drm/radeon/radeon_clocks.c b/drivers/gpu/drm/radeon/radeon_clocks.c
index b062109efbee..73c4405bf42f 100644
--- a/drivers/gpu/drm/radeon/radeon_clocks.c
+++ b/drivers/gpu/drm/radeon/radeon_clocks.c
@@ -56,13 +56,13 @@ uint32_t radeon_legacy_get_engine_clock(struct radeon_device *rdev)
56 else if (post_div == 3) 56 else if (post_div == 3)
57 sclk >>= 2; 57 sclk >>= 2;
58 else if (post_div == 4) 58 else if (post_div == 4)
59 sclk >>= 4; 59 sclk >>= 3;
60 60
61 return sclk; 61 return sclk;
62} 62}
63 63
64/* 10 khz */ 64/* 10 khz */
65static uint32_t radeon_legacy_get_memory_clock(struct radeon_device *rdev) 65uint32_t radeon_legacy_get_memory_clock(struct radeon_device *rdev)
66{ 66{
67 struct radeon_pll *mpll = &rdev->clock.mpll; 67 struct radeon_pll *mpll = &rdev->clock.mpll;
68 uint32_t fb_div, ref_div, post_div, mclk; 68 uint32_t fb_div, ref_div, post_div, mclk;
@@ -86,7 +86,7 @@ static uint32_t radeon_legacy_get_memory_clock(struct radeon_device *rdev)
86 else if (post_div == 3) 86 else if (post_div == 3)
87 mclk >>= 2; 87 mclk >>= 2;
88 else if (post_div == 4) 88 else if (post_div == 4)
89 mclk >>= 4; 89 mclk >>= 3;
90 90
91 return mclk; 91 return mclk;
92} 92}
diff --git a/drivers/gpu/drm/radeon/radeon_combios.c b/drivers/gpu/drm/radeon/radeon_combios.c
index c5021a3445de..e7b19440102e 100644
--- a/drivers/gpu/drm/radeon/radeon_combios.c
+++ b/drivers/gpu/drm/radeon/radeon_combios.c
@@ -595,6 +595,48 @@ bool radeon_combios_get_clock_info(struct drm_device *dev)
595 return false; 595 return false;
596} 596}
597 597
598bool radeon_combios_sideport_present(struct radeon_device *rdev)
599{
600 struct drm_device *dev = rdev->ddev;
601 u16 igp_info;
602
603 igp_info = combios_get_table_offset(dev, COMBIOS_INTEGRATED_SYSTEM_INFO_TABLE);
604
605 if (igp_info) {
606 if (RBIOS16(igp_info + 0x4))
607 return true;
608 }
609 return false;
610}
611
612static const uint32_t default_primarydac_adj[CHIP_LAST] = {
613 0x00000808, /* r100 */
614 0x00000808, /* rv100 */
615 0x00000808, /* rs100 */
616 0x00000808, /* rv200 */
617 0x00000808, /* rs200 */
618 0x00000808, /* r200 */
619 0x00000808, /* rv250 */
620 0x00000000, /* rs300 */
621 0x00000808, /* rv280 */
622 0x00000808, /* r300 */
623 0x00000808, /* r350 */
624 0x00000808, /* rv350 */
625 0x00000808, /* rv380 */
626 0x00000808, /* r420 */
627 0x00000808, /* r423 */
628 0x00000808, /* rv410 */
629 0x00000000, /* rs400 */
630 0x00000000, /* rs480 */
631};
632
633static void radeon_legacy_get_primary_dac_info_from_table(struct radeon_device *rdev,
634 struct radeon_encoder_primary_dac *p_dac)
635{
636 p_dac->ps2_pdac_adj = default_primarydac_adj[rdev->family];
637 return;
638}
639
598struct radeon_encoder_primary_dac *radeon_combios_get_primary_dac_info(struct 640struct radeon_encoder_primary_dac *radeon_combios_get_primary_dac_info(struct
599 radeon_encoder 641 radeon_encoder
600 *encoder) 642 *encoder)
@@ -604,20 +646,20 @@ struct radeon_encoder_primary_dac *radeon_combios_get_primary_dac_info(struct
604 uint16_t dac_info; 646 uint16_t dac_info;
605 uint8_t rev, bg, dac; 647 uint8_t rev, bg, dac;
606 struct radeon_encoder_primary_dac *p_dac = NULL; 648 struct radeon_encoder_primary_dac *p_dac = NULL;
649 int found = 0;
607 650
608 if (rdev->bios == NULL) 651 p_dac = kzalloc(sizeof(struct radeon_encoder_primary_dac),
652 GFP_KERNEL);
653
654 if (!p_dac)
609 return NULL; 655 return NULL;
610 656
657 if (rdev->bios == NULL)
658 goto out;
659
611 /* check CRT table */ 660 /* check CRT table */
612 dac_info = combios_get_table_offset(dev, COMBIOS_CRT_INFO_TABLE); 661 dac_info = combios_get_table_offset(dev, COMBIOS_CRT_INFO_TABLE);
613 if (dac_info) { 662 if (dac_info) {
614 p_dac =
615 kzalloc(sizeof(struct radeon_encoder_primary_dac),
616 GFP_KERNEL);
617
618 if (!p_dac)
619 return NULL;
620
621 rev = RBIOS8(dac_info) & 0x3; 663 rev = RBIOS8(dac_info) & 0x3;
622 if (rev < 2) { 664 if (rev < 2) {
623 bg = RBIOS8(dac_info + 0x2) & 0xf; 665 bg = RBIOS8(dac_info + 0x2) & 0xf;
@@ -628,20 +670,26 @@ struct radeon_encoder_primary_dac *radeon_combios_get_primary_dac_info(struct
628 dac = RBIOS8(dac_info + 0x3) & 0xf; 670 dac = RBIOS8(dac_info + 0x3) & 0xf;
629 p_dac->ps2_pdac_adj = (bg << 8) | (dac); 671 p_dac->ps2_pdac_adj = (bg << 8) | (dac);
630 } 672 }
631 673 found = 1;
632 } 674 }
633 675
676out:
677 if (!found) /* fallback to defaults */
678 radeon_legacy_get_primary_dac_info_from_table(rdev, p_dac);
679
634 return p_dac; 680 return p_dac;
635} 681}
636 682
637static enum radeon_tv_std 683enum radeon_tv_std
638radeon_combios_get_tv_info(struct radeon_encoder *encoder) 684radeon_combios_get_tv_info(struct radeon_device *rdev)
639{ 685{
640 struct drm_device *dev = encoder->base.dev; 686 struct drm_device *dev = rdev->ddev;
641 struct radeon_device *rdev = dev->dev_private;
642 uint16_t tv_info; 687 uint16_t tv_info;
643 enum radeon_tv_std tv_std = TV_STD_NTSC; 688 enum radeon_tv_std tv_std = TV_STD_NTSC;
644 689
690 if (rdev->bios == NULL)
691 return tv_std;
692
645 tv_info = combios_get_table_offset(dev, COMBIOS_TV_INFO_TABLE); 693 tv_info = combios_get_table_offset(dev, COMBIOS_TV_INFO_TABLE);
646 if (tv_info) { 694 if (tv_info) {
647 if (RBIOS8(tv_info + 6) == 'T') { 695 if (RBIOS8(tv_info + 6) == 'T') {
@@ -779,7 +827,7 @@ struct radeon_encoder_tv_dac *radeon_combios_get_tv_dac_info(struct
779 tv_dac->ntsc_tvdac_adj = (bg << 16) | (dac << 20); 827 tv_dac->ntsc_tvdac_adj = (bg << 16) | (dac << 20);
780 found = 1; 828 found = 1;
781 } 829 }
782 tv_dac->tv_std = radeon_combios_get_tv_info(encoder); 830 tv_dac->tv_std = radeon_combios_get_tv_info(rdev);
783 } 831 }
784 if (!found) { 832 if (!found) {
785 /* then check CRT table */ 833 /* then check CRT table */
@@ -923,8 +971,7 @@ struct radeon_encoder_lvds *radeon_combios_get_lvds_info(struct radeon_encoder
923 lvds->native_mode.vdisplay); 971 lvds->native_mode.vdisplay);
924 972
925 lvds->panel_vcc_delay = RBIOS16(lcd_info + 0x2c); 973 lvds->panel_vcc_delay = RBIOS16(lcd_info + 0x2c);
926 if (lvds->panel_vcc_delay > 2000 || lvds->panel_vcc_delay < 0) 974 lvds->panel_vcc_delay = min_t(u16, lvds->panel_vcc_delay, 2000);
927 lvds->panel_vcc_delay = 2000;
928 975
929 lvds->panel_pwr_delay = RBIOS8(lcd_info + 0x24); 976 lvds->panel_pwr_delay = RBIOS8(lcd_info + 0x24);
930 lvds->panel_digon_delay = RBIOS16(lcd_info + 0x38) & 0xf; 977 lvds->panel_digon_delay = RBIOS16(lcd_info + 0x38) & 0xf;
diff --git a/drivers/gpu/drm/radeon/radeon_connectors.c b/drivers/gpu/drm/radeon/radeon_connectors.c
index 5eece186e03c..65f81942f399 100644
--- a/drivers/gpu/drm/radeon/radeon_connectors.c
+++ b/drivers/gpu/drm/radeon/radeon_connectors.c
@@ -49,8 +49,10 @@ void radeon_connector_hotplug(struct drm_connector *connector)
49 if (radeon_connector->hpd.hpd != RADEON_HPD_NONE) 49 if (radeon_connector->hpd.hpd != RADEON_HPD_NONE)
50 radeon_hpd_set_polarity(rdev, radeon_connector->hpd.hpd); 50 radeon_hpd_set_polarity(rdev, radeon_connector->hpd.hpd);
51 51
52 if (connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort) { 52 if ((connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort) ||
53 if (radeon_dp_getsinktype(radeon_connector) == CONNECTOR_OBJECT_ID_DISPLAYPORT) { 53 (connector->connector_type == DRM_MODE_CONNECTOR_eDP)) {
54 if ((radeon_dp_getsinktype(radeon_connector) == CONNECTOR_OBJECT_ID_DISPLAYPORT) ||
55 (radeon_dp_getsinktype(radeon_connector) == CONNECTOR_OBJECT_ID_eDP)) {
54 if (radeon_dp_needs_link_train(radeon_connector)) { 56 if (radeon_dp_needs_link_train(radeon_connector)) {
55 if (connector->encoder) 57 if (connector->encoder)
56 dp_link_train(connector->encoder, connector); 58 dp_link_train(connector->encoder, connector);
@@ -208,6 +210,18 @@ static struct drm_display_mode *radeon_fp_native_mode(struct drm_encoder *encode
208 drm_mode_set_name(mode); 210 drm_mode_set_name(mode);
209 211
210 DRM_DEBUG("Adding native panel mode %s\n", mode->name); 212 DRM_DEBUG("Adding native panel mode %s\n", mode->name);
213 } else if (native_mode->hdisplay != 0 &&
214 native_mode->vdisplay != 0) {
215 /* mac laptops without an edid */
216 /* Note that this is not necessarily the exact panel mode,
217 * but an approximation based on the cvt formula. For these
218 * systems we should ideally read the mode info out of the
219 * registers or add a mode table, but this works and is much
220 * simpler.
221 */
222 mode = drm_cvt_mode(dev, native_mode->hdisplay, native_mode->vdisplay, 60, true, false, false);
223 mode->type = DRM_MODE_TYPE_PREFERRED | DRM_MODE_TYPE_DRIVER;
224 DRM_DEBUG("Adding cvt approximation of native panel mode %s\n", mode->name);
211 } 225 }
212 return mode; 226 return mode;
213} 227}
@@ -566,16 +580,18 @@ static enum drm_connector_status radeon_vga_detect(struct drm_connector *connect
566 struct radeon_connector *radeon_connector = to_radeon_connector(connector); 580 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
567 struct drm_encoder *encoder; 581 struct drm_encoder *encoder;
568 struct drm_encoder_helper_funcs *encoder_funcs; 582 struct drm_encoder_helper_funcs *encoder_funcs;
569 bool dret; 583 bool dret = false;
570 enum drm_connector_status ret = connector_status_disconnected; 584 enum drm_connector_status ret = connector_status_disconnected;
571 585
572 encoder = radeon_best_single_encoder(connector); 586 encoder = radeon_best_single_encoder(connector);
573 if (!encoder) 587 if (!encoder)
574 ret = connector_status_disconnected; 588 ret = connector_status_disconnected;
575 589
576 radeon_i2c_do_lock(radeon_connector->ddc_bus, 1); 590 if (radeon_connector->ddc_bus) {
577 dret = radeon_ddc_probe(radeon_connector); 591 radeon_i2c_do_lock(radeon_connector->ddc_bus, 1);
578 radeon_i2c_do_lock(radeon_connector->ddc_bus, 0); 592 dret = radeon_ddc_probe(radeon_connector);
593 radeon_i2c_do_lock(radeon_connector->ddc_bus, 0);
594 }
579 if (dret) { 595 if (dret) {
580 if (radeon_connector->edid) { 596 if (radeon_connector->edid) {
581 kfree(radeon_connector->edid); 597 kfree(radeon_connector->edid);
@@ -603,7 +619,7 @@ static enum drm_connector_status radeon_vga_detect(struct drm_connector *connect
603 ret = connector_status_connected; 619 ret = connector_status_connected;
604 } 620 }
605 } else { 621 } else {
606 if (radeon_connector->dac_load_detect) { 622 if (radeon_connector->dac_load_detect && encoder) {
607 encoder_funcs = encoder->helper_private; 623 encoder_funcs = encoder->helper_private;
608 ret = encoder_funcs->detect(encoder, connector); 624 ret = encoder_funcs->detect(encoder, connector);
609 } 625 }
@@ -726,11 +742,13 @@ static enum drm_connector_status radeon_dvi_detect(struct drm_connector *connect
726 struct drm_mode_object *obj; 742 struct drm_mode_object *obj;
727 int i; 743 int i;
728 enum drm_connector_status ret = connector_status_disconnected; 744 enum drm_connector_status ret = connector_status_disconnected;
729 bool dret; 745 bool dret = false;
730 746
731 radeon_i2c_do_lock(radeon_connector->ddc_bus, 1); 747 if (radeon_connector->ddc_bus) {
732 dret = radeon_ddc_probe(radeon_connector); 748 radeon_i2c_do_lock(radeon_connector->ddc_bus, 1);
733 radeon_i2c_do_lock(radeon_connector->ddc_bus, 0); 749 dret = radeon_ddc_probe(radeon_connector);
750 radeon_i2c_do_lock(radeon_connector->ddc_bus, 0);
751 }
734 if (dret) { 752 if (dret) {
735 if (radeon_connector->edid) { 753 if (radeon_connector->edid) {
736 kfree(radeon_connector->edid); 754 kfree(radeon_connector->edid);
@@ -762,7 +780,7 @@ static enum drm_connector_status radeon_dvi_detect(struct drm_connector *connect
762 * connected and the DVI port disconnected. If the edid doesn't 780 * connected and the DVI port disconnected. If the edid doesn't
763 * say HDMI, vice versa. 781 * say HDMI, vice versa.
764 */ 782 */
765 if (radeon_connector->shared_ddc && connector_status_connected) { 783 if (radeon_connector->shared_ddc && (ret == connector_status_connected)) {
766 struct drm_device *dev = connector->dev; 784 struct drm_device *dev = connector->dev;
767 struct drm_connector *list_connector; 785 struct drm_connector *list_connector;
768 struct radeon_connector *list_radeon_connector; 786 struct radeon_connector *list_radeon_connector;
@@ -886,10 +904,18 @@ static void radeon_dvi_force(struct drm_connector *connector)
886static int radeon_dvi_mode_valid(struct drm_connector *connector, 904static int radeon_dvi_mode_valid(struct drm_connector *connector,
887 struct drm_display_mode *mode) 905 struct drm_display_mode *mode)
888{ 906{
907 struct drm_device *dev = connector->dev;
908 struct radeon_device *rdev = dev->dev_private;
889 struct radeon_connector *radeon_connector = to_radeon_connector(connector); 909 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
890 910
891 /* XXX check mode bandwidth */ 911 /* XXX check mode bandwidth */
892 912
913 /* clocks over 135 MHz have heat issues with DVI on RV100 */
914 if (radeon_connector->use_digital &&
915 (rdev->family == CHIP_RV100) &&
916 (mode->clock > 135000))
917 return MODE_CLOCK_HIGH;
918
893 if (radeon_connector->use_digital && (mode->clock > 165000)) { 919 if (radeon_connector->use_digital && (mode->clock > 165000)) {
894 if ((radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_I) || 920 if ((radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_I) ||
895 (radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_D) || 921 (radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_D) ||
@@ -955,7 +981,8 @@ static enum drm_connector_status radeon_dp_detect(struct drm_connector *connecto
955 } 981 }
956 982
957 sink_type = radeon_dp_getsinktype(radeon_connector); 983 sink_type = radeon_dp_getsinktype(radeon_connector);
958 if (sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) { 984 if ((sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) ||
985 (sink_type == CONNECTOR_OBJECT_ID_eDP)) {
959 if (radeon_dp_getdpcd(radeon_connector)) { 986 if (radeon_dp_getdpcd(radeon_connector)) {
960 radeon_dig_connector->dp_sink_type = sink_type; 987 radeon_dig_connector->dp_sink_type = sink_type;
961 ret = connector_status_connected; 988 ret = connector_status_connected;
@@ -980,7 +1007,8 @@ static int radeon_dp_mode_valid(struct drm_connector *connector,
980 1007
981 /* XXX check mode bandwidth */ 1008 /* XXX check mode bandwidth */
982 1009
983 if (radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) 1010 if ((radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) ||
1011 (radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_eDP))
984 return radeon_dp_mode_valid_helper(radeon_connector, mode); 1012 return radeon_dp_mode_valid_helper(radeon_connector, mode);
985 else 1013 else
986 return MODE_OK; 1014 return MODE_OK;
@@ -1032,8 +1060,7 @@ radeon_add_atom_connector(struct drm_device *dev,
1032 return; 1060 return;
1033 } 1061 }
1034 if (radeon_connector->ddc_bus && i2c_bus->valid) { 1062 if (radeon_connector->ddc_bus && i2c_bus->valid) {
1035 if (memcmp(&radeon_connector->ddc_bus->rec, i2c_bus, 1063 if (radeon_connector->ddc_bus->rec.i2c_id == i2c_bus->i2c_id) {
1036 sizeof(struct radeon_i2c_bus_rec)) == 0) {
1037 radeon_connector->shared_ddc = true; 1064 radeon_connector->shared_ddc = true;
1038 shared_ddc = true; 1065 shared_ddc = true;
1039 } 1066 }
@@ -1133,6 +1160,7 @@ radeon_add_atom_connector(struct drm_device *dev,
1133 subpixel_order = SubPixelHorizontalRGB; 1160 subpixel_order = SubPixelHorizontalRGB;
1134 break; 1161 break;
1135 case DRM_MODE_CONNECTOR_DisplayPort: 1162 case DRM_MODE_CONNECTOR_DisplayPort:
1163 case DRM_MODE_CONNECTOR_eDP:
1136 radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL); 1164 radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL);
1137 if (!radeon_dig_connector) 1165 if (!radeon_dig_connector)
1138 goto failed; 1166 goto failed;
@@ -1145,10 +1173,16 @@ radeon_add_atom_connector(struct drm_device *dev,
1145 goto failed; 1173 goto failed;
1146 if (i2c_bus->valid) { 1174 if (i2c_bus->valid) {
1147 /* add DP i2c bus */ 1175 /* add DP i2c bus */
1148 radeon_dig_connector->dp_i2c_bus = radeon_i2c_create_dp(dev, i2c_bus, "DP-auxch"); 1176 if (connector_type == DRM_MODE_CONNECTOR_eDP)
1177 radeon_dig_connector->dp_i2c_bus = radeon_i2c_create_dp(dev, i2c_bus, "eDP-auxch");
1178 else
1179 radeon_dig_connector->dp_i2c_bus = radeon_i2c_create_dp(dev, i2c_bus, "DP-auxch");
1149 if (!radeon_dig_connector->dp_i2c_bus) 1180 if (!radeon_dig_connector->dp_i2c_bus)
1150 goto failed; 1181 goto failed;
1151 radeon_connector->ddc_bus = radeon_i2c_create(dev, i2c_bus, "DP"); 1182 if (connector_type == DRM_MODE_CONNECTOR_eDP)
1183 radeon_connector->ddc_bus = radeon_i2c_create(dev, i2c_bus, "eDP");
1184 else
1185 radeon_connector->ddc_bus = radeon_i2c_create(dev, i2c_bus, "DP");
1152 if (!radeon_connector->ddc_bus) 1186 if (!radeon_connector->ddc_bus)
1153 goto failed; 1187 goto failed;
1154 } 1188 }
@@ -1171,7 +1205,7 @@ radeon_add_atom_connector(struct drm_device *dev,
1171 1); 1205 1);
1172 drm_connector_attach_property(&radeon_connector->base, 1206 drm_connector_attach_property(&radeon_connector->base,
1173 rdev->mode_info.tv_std_property, 1207 rdev->mode_info.tv_std_property,
1174 1); 1208 radeon_atombios_get_tv_info(rdev));
1175 } 1209 }
1176 break; 1210 break;
1177 case DRM_MODE_CONNECTOR_LVDS: 1211 case DRM_MODE_CONNECTOR_LVDS:
@@ -1312,10 +1346,10 @@ radeon_add_legacy_connector(struct drm_device *dev,
1312 radeon_connector->dac_load_detect = false; 1346 radeon_connector->dac_load_detect = false;
1313 drm_connector_attach_property(&radeon_connector->base, 1347 drm_connector_attach_property(&radeon_connector->base,
1314 rdev->mode_info.load_detect_property, 1348 rdev->mode_info.load_detect_property,
1315 1); 1349 radeon_connector->dac_load_detect);
1316 drm_connector_attach_property(&radeon_connector->base, 1350 drm_connector_attach_property(&radeon_connector->base,
1317 rdev->mode_info.tv_std_property, 1351 rdev->mode_info.tv_std_property,
1318 1); 1352 radeon_combios_get_tv_info(rdev));
1319 } 1353 }
1320 break; 1354 break;
1321 case DRM_MODE_CONNECTOR_LVDS: 1355 case DRM_MODE_CONNECTOR_LVDS:
diff --git a/drivers/gpu/drm/radeon/radeon_cp.c b/drivers/gpu/drm/radeon/radeon_cp.c
index 0b2f9c2ad2c1..06123ba31d31 100644
--- a/drivers/gpu/drm/radeon/radeon_cp.c
+++ b/drivers/gpu/drm/radeon/radeon_cp.c
@@ -2145,6 +2145,7 @@ int radeon_master_create(struct drm_device *dev, struct drm_master *master)
2145 &master_priv->sarea); 2145 &master_priv->sarea);
2146 if (ret) { 2146 if (ret) {
2147 DRM_ERROR("SAREA setup failed\n"); 2147 DRM_ERROR("SAREA setup failed\n");
2148 kfree(master_priv);
2148 return ret; 2149 return ret;
2149 } 2150 }
2150 master_priv->sarea_priv = master_priv->sarea->handle + sizeof(struct drm_sarea); 2151 master_priv->sarea_priv = master_priv->sarea->handle + sizeof(struct drm_sarea);
diff --git a/drivers/gpu/drm/radeon/radeon_cs.c b/drivers/gpu/drm/radeon/radeon_cs.c
index 65590a0f1d93..e9d085021c1f 100644
--- a/drivers/gpu/drm/radeon/radeon_cs.c
+++ b/drivers/gpu/drm/radeon/radeon_cs.c
@@ -86,7 +86,7 @@ int radeon_cs_parser_relocs(struct radeon_cs_parser *p)
86 &p->validated); 86 &p->validated);
87 } 87 }
88 } 88 }
89 return radeon_bo_list_validate(&p->validated, p->ib->fence); 89 return radeon_bo_list_validate(&p->validated);
90} 90}
91 91
92int radeon_cs_parser_init(struct radeon_cs_parser *p, void *data) 92int radeon_cs_parser_init(struct radeon_cs_parser *p, void *data)
@@ -189,12 +189,10 @@ static void radeon_cs_parser_fini(struct radeon_cs_parser *parser, int error)
189{ 189{
190 unsigned i; 190 unsigned i;
191 191
192 if (error) { 192 if (!error && parser->ib) {
193 radeon_bo_list_unvalidate(&parser->validated, 193 radeon_bo_list_fence(&parser->validated, parser->ib->fence);
194 parser->ib->fence);
195 } else {
196 radeon_bo_list_unreserve(&parser->validated);
197 } 194 }
195 radeon_bo_list_unreserve(&parser->validated);
198 for (i = 0; i < parser->nrelocs; i++) { 196 for (i = 0; i < parser->nrelocs; i++) {
199 if (parser->relocs[i].gobj) { 197 if (parser->relocs[i].gobj) {
200 mutex_lock(&parser->rdev->ddev->struct_mutex); 198 mutex_lock(&parser->rdev->ddev->struct_mutex);
@@ -231,6 +229,7 @@ int radeon_cs_ioctl(struct drm_device *dev, void *data, struct drm_file *filp)
231 memset(&parser, 0, sizeof(struct radeon_cs_parser)); 229 memset(&parser, 0, sizeof(struct radeon_cs_parser));
232 parser.filp = filp; 230 parser.filp = filp;
233 parser.rdev = rdev; 231 parser.rdev = rdev;
232 parser.dev = rdev->dev;
234 r = radeon_cs_parser_init(&parser, data); 233 r = radeon_cs_parser_init(&parser, data);
235 if (r) { 234 if (r) {
236 DRM_ERROR("Failed to initialize parser !\n"); 235 DRM_ERROR("Failed to initialize parser !\n");
diff --git a/drivers/gpu/drm/radeon/radeon_device.c b/drivers/gpu/drm/radeon/radeon_device.c
index 02bcdb1240c0..768b1509fa03 100644
--- a/drivers/gpu/drm/radeon/radeon_device.c
+++ b/drivers/gpu/drm/radeon/radeon_device.c
@@ -391,6 +391,12 @@ int radeon_asic_init(struct radeon_device *rdev)
391 /* FIXME: not supported yet */ 391 /* FIXME: not supported yet */
392 return -EINVAL; 392 return -EINVAL;
393 } 393 }
394
395 if (rdev->flags & RADEON_IS_IGP) {
396 rdev->asic->get_memory_clock = NULL;
397 rdev->asic->set_memory_clock = NULL;
398 }
399
394 return 0; 400 return 0;
395} 401}
396 402
@@ -481,6 +487,7 @@ int radeon_atombios_init(struct radeon_device *rdev)
481 atom_card_info->pll_write = cail_pll_write; 487 atom_card_info->pll_write = cail_pll_write;
482 488
483 rdev->mode_info.atom_context = atom_parse(atom_card_info, rdev->bios); 489 rdev->mode_info.atom_context = atom_parse(atom_card_info, rdev->bios);
490 mutex_init(&rdev->mode_info.atom_context->mutex);
484 radeon_atom_initialize_bios_scratch_regs(rdev->ddev); 491 radeon_atom_initialize_bios_scratch_regs(rdev->ddev);
485 atom_allocate_fb_scratch(rdev->mode_info.atom_context); 492 atom_allocate_fb_scratch(rdev->mode_info.atom_context);
486 return 0; 493 return 0;
@@ -537,11 +544,75 @@ void radeon_agp_disable(struct radeon_device *rdev)
537 rdev->asic->gart_tlb_flush = &r100_pci_gart_tlb_flush; 544 rdev->asic->gart_tlb_flush = &r100_pci_gart_tlb_flush;
538 rdev->asic->gart_set_page = &r100_pci_gart_set_page; 545 rdev->asic->gart_set_page = &r100_pci_gart_set_page;
539 } 546 }
547 rdev->mc.gtt_size = radeon_gart_size * 1024 * 1024;
548}
549
550void radeon_check_arguments(struct radeon_device *rdev)
551{
552 /* vramlimit must be a power of two */
553 switch (radeon_vram_limit) {
554 case 0:
555 case 4:
556 case 8:
557 case 16:
558 case 32:
559 case 64:
560 case 128:
561 case 256:
562 case 512:
563 case 1024:
564 case 2048:
565 case 4096:
566 break;
567 default:
568 dev_warn(rdev->dev, "vram limit (%d) must be a power of 2\n",
569 radeon_vram_limit);
570 radeon_vram_limit = 0;
571 break;
572 }
573 radeon_vram_limit = radeon_vram_limit << 20;
574 /* gtt size must be power of two and greater or equal to 32M */
575 switch (radeon_gart_size) {
576 case 4:
577 case 8:
578 case 16:
579 dev_warn(rdev->dev, "gart size (%d) too small forcing to 512M\n",
580 radeon_gart_size);
581 radeon_gart_size = 512;
582 break;
583 case 32:
584 case 64:
585 case 128:
586 case 256:
587 case 512:
588 case 1024:
589 case 2048:
590 case 4096:
591 break;
592 default:
593 dev_warn(rdev->dev, "gart size (%d) must be a power of 2\n",
594 radeon_gart_size);
595 radeon_gart_size = 512;
596 break;
597 }
598 rdev->mc.gtt_size = radeon_gart_size * 1024 * 1024;
599 /* AGP mode can only be -1, 1, 2, 4, 8 */
600 switch (radeon_agpmode) {
601 case -1:
602 case 0:
603 case 1:
604 case 2:
605 case 4:
606 case 8:
607 break;
608 default:
609 dev_warn(rdev->dev, "invalid AGP mode %d (valid mode: "
610 "-1, 0, 1, 2, 4, 8)\n", radeon_agpmode);
611 radeon_agpmode = 0;
612 break;
613 }
540} 614}
541 615
542/*
543 * Radeon device.
544 */
545int radeon_device_init(struct radeon_device *rdev, 616int radeon_device_init(struct radeon_device *rdev,
546 struct drm_device *ddev, 617 struct drm_device *ddev,
547 struct pci_dev *pdev, 618 struct pci_dev *pdev,
@@ -580,9 +651,9 @@ int radeon_device_init(struct radeon_device *rdev,
580 651
581 /* Set asic functions */ 652 /* Set asic functions */
582 r = radeon_asic_init(rdev); 653 r = radeon_asic_init(rdev);
583 if (r) { 654 if (r)
584 return r; 655 return r;
585 } 656 radeon_check_arguments(rdev);
586 657
587 if (rdev->flags & RADEON_IS_AGP && radeon_agpmode == -1) { 658 if (rdev->flags & RADEON_IS_AGP && radeon_agpmode == -1) {
588 radeon_agp_disable(rdev); 659 radeon_agp_disable(rdev);
@@ -663,16 +734,18 @@ void radeon_device_fini(struct radeon_device *rdev)
663 */ 734 */
664int radeon_suspend_kms(struct drm_device *dev, pm_message_t state) 735int radeon_suspend_kms(struct drm_device *dev, pm_message_t state)
665{ 736{
666 struct radeon_device *rdev = dev->dev_private; 737 struct radeon_device *rdev;
667 struct drm_crtc *crtc; 738 struct drm_crtc *crtc;
668 int r; 739 int r;
669 740
670 if (dev == NULL || rdev == NULL) { 741 if (dev == NULL || dev->dev_private == NULL) {
671 return -ENODEV; 742 return -ENODEV;
672 } 743 }
673 if (state.event == PM_EVENT_PRETHAW) { 744 if (state.event == PM_EVENT_PRETHAW) {
674 return 0; 745 return 0;
675 } 746 }
747 rdev = dev->dev_private;
748
676 /* unpin the front buffers */ 749 /* unpin the front buffers */
677 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { 750 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
678 struct radeon_framebuffer *rfb = to_radeon_framebuffer(crtc->fb); 751 struct radeon_framebuffer *rfb = to_radeon_framebuffer(crtc->fb);
diff --git a/drivers/gpu/drm/radeon/radeon_display.c b/drivers/gpu/drm/radeon/radeon_display.c
index a133b833e45d..7e17a362b54b 100644
--- a/drivers/gpu/drm/radeon/radeon_display.c
+++ b/drivers/gpu/drm/radeon/radeon_display.c
@@ -234,7 +234,7 @@ static const char *encoder_names[34] = {
234 "INTERNAL_UNIPHY2", 234 "INTERNAL_UNIPHY2",
235}; 235};
236 236
237static const char *connector_names[13] = { 237static const char *connector_names[15] = {
238 "Unknown", 238 "Unknown",
239 "VGA", 239 "VGA",
240 "DVI-I", 240 "DVI-I",
@@ -248,6 +248,8 @@ static const char *connector_names[13] = {
248 "DisplayPort", 248 "DisplayPort",
249 "HDMI-A", 249 "HDMI-A",
250 "HDMI-B", 250 "HDMI-B",
251 "TV",
252 "eDP",
251}; 253};
252 254
253static const char *hpd_names[7] = { 255static const char *hpd_names[7] = {
@@ -276,7 +278,7 @@ static void radeon_print_display_setup(struct drm_device *dev)
276 DRM_INFO(" %s\n", connector_names[connector->connector_type]); 278 DRM_INFO(" %s\n", connector_names[connector->connector_type]);
277 if (radeon_connector->hpd.hpd != RADEON_HPD_NONE) 279 if (radeon_connector->hpd.hpd != RADEON_HPD_NONE)
278 DRM_INFO(" %s\n", hpd_names[radeon_connector->hpd.hpd]); 280 DRM_INFO(" %s\n", hpd_names[radeon_connector->hpd.hpd]);
279 if (radeon_connector->ddc_bus) 281 if (radeon_connector->ddc_bus) {
280 DRM_INFO(" DDC: 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x\n", 282 DRM_INFO(" DDC: 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x\n",
281 radeon_connector->ddc_bus->rec.mask_clk_reg, 283 radeon_connector->ddc_bus->rec.mask_clk_reg,
282 radeon_connector->ddc_bus->rec.mask_data_reg, 284 radeon_connector->ddc_bus->rec.mask_data_reg,
@@ -286,6 +288,15 @@ static void radeon_print_display_setup(struct drm_device *dev)
286 radeon_connector->ddc_bus->rec.en_data_reg, 288 radeon_connector->ddc_bus->rec.en_data_reg,
287 radeon_connector->ddc_bus->rec.y_clk_reg, 289 radeon_connector->ddc_bus->rec.y_clk_reg,
288 radeon_connector->ddc_bus->rec.y_data_reg); 290 radeon_connector->ddc_bus->rec.y_data_reg);
291 } else {
292 if (connector->connector_type == DRM_MODE_CONNECTOR_VGA ||
293 connector->connector_type == DRM_MODE_CONNECTOR_DVII ||
294 connector->connector_type == DRM_MODE_CONNECTOR_DVID ||
295 connector->connector_type == DRM_MODE_CONNECTOR_DVIA ||
296 connector->connector_type == DRM_MODE_CONNECTOR_HDMIA ||
297 connector->connector_type == DRM_MODE_CONNECTOR_HDMIB)
298 DRM_INFO(" DDC: no ddc bus - possible BIOS bug - please report to xorg-driver-ati@lists.x.org\n");
299 }
289 DRM_INFO(" Encoders:\n"); 300 DRM_INFO(" Encoders:\n");
290 list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) { 301 list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
291 radeon_encoder = to_radeon_encoder(encoder); 302 radeon_encoder = to_radeon_encoder(encoder);
@@ -329,8 +340,11 @@ static bool radeon_setup_enc_conn(struct drm_device *dev)
329 ret = radeon_get_atom_connector_info_from_object_table(dev); 340 ret = radeon_get_atom_connector_info_from_object_table(dev);
330 else 341 else
331 ret = radeon_get_atom_connector_info_from_supported_devices_table(dev); 342 ret = radeon_get_atom_connector_info_from_supported_devices_table(dev);
332 } else 343 } else {
333 ret = radeon_get_legacy_connector_info_from_bios(dev); 344 ret = radeon_get_legacy_connector_info_from_bios(dev);
345 if (ret == false)
346 ret = radeon_get_legacy_connector_info_from_table(dev);
347 }
334 } else { 348 } else {
335 if (!ASIC_IS_AVIVO(rdev)) 349 if (!ASIC_IS_AVIVO(rdev))
336 ret = radeon_get_legacy_connector_info_from_table(dev); 350 ret = radeon_get_legacy_connector_info_from_table(dev);
@@ -349,9 +363,11 @@ int radeon_ddc_get_modes(struct radeon_connector *radeon_connector)
349{ 363{
350 int ret = 0; 364 int ret = 0;
351 365
352 if (radeon_connector->base.connector_type == DRM_MODE_CONNECTOR_DisplayPort) { 366 if ((radeon_connector->base.connector_type == DRM_MODE_CONNECTOR_DisplayPort) ||
367 (radeon_connector->base.connector_type == DRM_MODE_CONNECTOR_eDP)) {
353 struct radeon_connector_atom_dig *dig = radeon_connector->con_priv; 368 struct radeon_connector_atom_dig *dig = radeon_connector->con_priv;
354 if (dig->dp_i2c_bus) 369 if ((dig->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT ||
370 dig->dp_sink_type == CONNECTOR_OBJECT_ID_eDP) && dig->dp_i2c_bus)
355 radeon_connector->edid = drm_get_edid(&radeon_connector->base, &dig->dp_i2c_bus->adapter); 371 radeon_connector->edid = drm_get_edid(&radeon_connector->base, &dig->dp_i2c_bus->adapter);
356 } 372 }
357 if (!radeon_connector->ddc_bus) 373 if (!radeon_connector->ddc_bus)
@@ -404,11 +420,12 @@ void radeon_compute_pll(struct radeon_pll *pll,
404 uint32_t *fb_div_p, 420 uint32_t *fb_div_p,
405 uint32_t *frac_fb_div_p, 421 uint32_t *frac_fb_div_p,
406 uint32_t *ref_div_p, 422 uint32_t *ref_div_p,
407 uint32_t *post_div_p, 423 uint32_t *post_div_p)
408 int flags)
409{ 424{
410 uint32_t min_ref_div = pll->min_ref_div; 425 uint32_t min_ref_div = pll->min_ref_div;
411 uint32_t max_ref_div = pll->max_ref_div; 426 uint32_t max_ref_div = pll->max_ref_div;
427 uint32_t min_post_div = pll->min_post_div;
428 uint32_t max_post_div = pll->max_post_div;
412 uint32_t min_fractional_feed_div = 0; 429 uint32_t min_fractional_feed_div = 0;
413 uint32_t max_fractional_feed_div = 0; 430 uint32_t max_fractional_feed_div = 0;
414 uint32_t best_vco = pll->best_vco; 431 uint32_t best_vco = pll->best_vco;
@@ -424,7 +441,7 @@ void radeon_compute_pll(struct radeon_pll *pll,
424 DRM_DEBUG("PLL freq %llu %u %u\n", freq, pll->min_ref_div, pll->max_ref_div); 441 DRM_DEBUG("PLL freq %llu %u %u\n", freq, pll->min_ref_div, pll->max_ref_div);
425 freq = freq * 1000; 442 freq = freq * 1000;
426 443
427 if (flags & RADEON_PLL_USE_REF_DIV) 444 if (pll->flags & RADEON_PLL_USE_REF_DIV)
428 min_ref_div = max_ref_div = pll->reference_div; 445 min_ref_div = max_ref_div = pll->reference_div;
429 else { 446 else {
430 while (min_ref_div < max_ref_div-1) { 447 while (min_ref_div < max_ref_div-1) {
@@ -439,19 +456,22 @@ void radeon_compute_pll(struct radeon_pll *pll,
439 } 456 }
440 } 457 }
441 458
442 if (flags & RADEON_PLL_USE_FRAC_FB_DIV) { 459 if (pll->flags & RADEON_PLL_USE_POST_DIV)
460 min_post_div = max_post_div = pll->post_div;
461
462 if (pll->flags & RADEON_PLL_USE_FRAC_FB_DIV) {
443 min_fractional_feed_div = pll->min_frac_feedback_div; 463 min_fractional_feed_div = pll->min_frac_feedback_div;
444 max_fractional_feed_div = pll->max_frac_feedback_div; 464 max_fractional_feed_div = pll->max_frac_feedback_div;
445 } 465 }
446 466
447 for (post_div = pll->min_post_div; post_div <= pll->max_post_div; ++post_div) { 467 for (post_div = min_post_div; post_div <= max_post_div; ++post_div) {
448 uint32_t ref_div; 468 uint32_t ref_div;
449 469
450 if ((flags & RADEON_PLL_NO_ODD_POST_DIV) && (post_div & 1)) 470 if ((pll->flags & RADEON_PLL_NO_ODD_POST_DIV) && (post_div & 1))
451 continue; 471 continue;
452 472
453 /* legacy radeons only have a few post_divs */ 473 /* legacy radeons only have a few post_divs */
454 if (flags & RADEON_PLL_LEGACY) { 474 if (pll->flags & RADEON_PLL_LEGACY) {
455 if ((post_div == 5) || 475 if ((post_div == 5) ||
456 (post_div == 7) || 476 (post_div == 7) ||
457 (post_div == 9) || 477 (post_div == 9) ||
@@ -498,7 +518,7 @@ void radeon_compute_pll(struct radeon_pll *pll,
498 tmp += (uint64_t)pll->reference_freq * 1000 * frac_feedback_div; 518 tmp += (uint64_t)pll->reference_freq * 1000 * frac_feedback_div;
499 current_freq = radeon_div(tmp, ref_div * post_div); 519 current_freq = radeon_div(tmp, ref_div * post_div);
500 520
501 if (flags & RADEON_PLL_PREFER_CLOSEST_LOWER) { 521 if (pll->flags & RADEON_PLL_PREFER_CLOSEST_LOWER) {
502 error = freq - current_freq; 522 error = freq - current_freq;
503 error = error < 0 ? 0xffffffff : error; 523 error = error < 0 ? 0xffffffff : error;
504 } else 524 } else
@@ -525,12 +545,12 @@ void radeon_compute_pll(struct radeon_pll *pll,
525 best_freq = current_freq; 545 best_freq = current_freq;
526 best_error = error; 546 best_error = error;
527 best_vco_diff = vco_diff; 547 best_vco_diff = vco_diff;
528 } else if (((flags & RADEON_PLL_PREFER_LOW_REF_DIV) && (ref_div < best_ref_div)) || 548 } else if (((pll->flags & RADEON_PLL_PREFER_LOW_REF_DIV) && (ref_div < best_ref_div)) ||
529 ((flags & RADEON_PLL_PREFER_HIGH_REF_DIV) && (ref_div > best_ref_div)) || 549 ((pll->flags & RADEON_PLL_PREFER_HIGH_REF_DIV) && (ref_div > best_ref_div)) ||
530 ((flags & RADEON_PLL_PREFER_LOW_FB_DIV) && (feedback_div < best_feedback_div)) || 550 ((pll->flags & RADEON_PLL_PREFER_LOW_FB_DIV) && (feedback_div < best_feedback_div)) ||
531 ((flags & RADEON_PLL_PREFER_HIGH_FB_DIV) && (feedback_div > best_feedback_div)) || 551 ((pll->flags & RADEON_PLL_PREFER_HIGH_FB_DIV) && (feedback_div > best_feedback_div)) ||
532 ((flags & RADEON_PLL_PREFER_LOW_POST_DIV) && (post_div < best_post_div)) || 552 ((pll->flags & RADEON_PLL_PREFER_LOW_POST_DIV) && (post_div < best_post_div)) ||
533 ((flags & RADEON_PLL_PREFER_HIGH_POST_DIV) && (post_div > best_post_div))) { 553 ((pll->flags & RADEON_PLL_PREFER_HIGH_POST_DIV) && (post_div > best_post_div))) {
534 best_post_div = post_div; 554 best_post_div = post_div;
535 best_ref_div = ref_div; 555 best_ref_div = ref_div;
536 best_feedback_div = feedback_div; 556 best_feedback_div = feedback_div;
@@ -566,8 +586,7 @@ void radeon_compute_pll_avivo(struct radeon_pll *pll,
566 uint32_t *fb_div_p, 586 uint32_t *fb_div_p,
567 uint32_t *frac_fb_div_p, 587 uint32_t *frac_fb_div_p,
568 uint32_t *ref_div_p, 588 uint32_t *ref_div_p,
569 uint32_t *post_div_p, 589 uint32_t *post_div_p)
570 int flags)
571{ 590{
572 fixed20_12 m, n, frac_n, p, f_vco, f_pclk, best_freq; 591 fixed20_12 m, n, frac_n, p, f_vco, f_pclk, best_freq;
573 fixed20_12 pll_out_max, pll_out_min; 592 fixed20_12 pll_out_max, pll_out_min;
@@ -661,7 +680,6 @@ static void radeon_user_framebuffer_destroy(struct drm_framebuffer *fb)
661 radeonfb_remove(dev, fb); 680 radeonfb_remove(dev, fb);
662 681
663 if (radeon_fb->obj) { 682 if (radeon_fb->obj) {
664 radeon_gem_object_unpin(radeon_fb->obj);
665 mutex_lock(&dev->struct_mutex); 683 mutex_lock(&dev->struct_mutex);
666 drm_gem_object_unreference(radeon_fb->obj); 684 drm_gem_object_unreference(radeon_fb->obj);
667 mutex_unlock(&dev->struct_mutex); 685 mutex_unlock(&dev->struct_mutex);
@@ -709,7 +727,11 @@ radeon_user_framebuffer_create(struct drm_device *dev,
709 struct drm_gem_object *obj; 727 struct drm_gem_object *obj;
710 728
711 obj = drm_gem_object_lookup(dev, file_priv, mode_cmd->handle); 729 obj = drm_gem_object_lookup(dev, file_priv, mode_cmd->handle);
712 730 if (obj == NULL) {
731 dev_err(&dev->pdev->dev, "No GEM object associated to handle 0x%08X, "
732 "can't create framebuffer\n", mode_cmd->handle);
733 return NULL;
734 }
713 return radeon_framebuffer_create(dev, mode_cmd, obj); 735 return radeon_framebuffer_create(dev, mode_cmd, obj);
714} 736}
715 737
@@ -739,7 +761,7 @@ static struct drm_prop_enum_list radeon_tv_std_enum_list[] =
739 { TV_STD_SECAM, "secam" }, 761 { TV_STD_SECAM, "secam" },
740}; 762};
741 763
742int radeon_modeset_create_props(struct radeon_device *rdev) 764static int radeon_modeset_create_props(struct radeon_device *rdev)
743{ 765{
744 int i, sz; 766 int i, sz;
745 767
diff --git a/drivers/gpu/drm/radeon/radeon_drv.c b/drivers/gpu/drm/radeon/radeon_drv.c
index c5c45e626d74..8ba3de7994d4 100644
--- a/drivers/gpu/drm/radeon/radeon_drv.c
+++ b/drivers/gpu/drm/radeon/radeon_drv.c
@@ -87,6 +87,7 @@ int radeon_testing = 0;
87int radeon_connector_table = 0; 87int radeon_connector_table = 0;
88int radeon_tv = 1; 88int radeon_tv = 1;
89int radeon_new_pll = 1; 89int radeon_new_pll = 1;
90int radeon_audio = 1;
90 91
91MODULE_PARM_DESC(no_wb, "Disable AGP writeback for scratch registers"); 92MODULE_PARM_DESC(no_wb, "Disable AGP writeback for scratch registers");
92module_param_named(no_wb, radeon_no_wb, int, 0444); 93module_param_named(no_wb, radeon_no_wb, int, 0444);
@@ -124,6 +125,9 @@ module_param_named(tv, radeon_tv, int, 0444);
124MODULE_PARM_DESC(new_pll, "Select new PLL code for AVIVO chips"); 125MODULE_PARM_DESC(new_pll, "Select new PLL code for AVIVO chips");
125module_param_named(new_pll, radeon_new_pll, int, 0444); 126module_param_named(new_pll, radeon_new_pll, int, 0444);
126 127
128MODULE_PARM_DESC(audio, "Audio enable (0 = disable)");
129module_param_named(audio, radeon_audio, int, 0444);
130
127static int radeon_suspend(struct drm_device *dev, pm_message_t state) 131static int radeon_suspend(struct drm_device *dev, pm_message_t state)
128{ 132{
129 drm_radeon_private_t *dev_priv = dev->dev_private; 133 drm_radeon_private_t *dev_priv = dev->dev_private;
@@ -192,7 +196,7 @@ static struct drm_driver driver_old = {
192 .owner = THIS_MODULE, 196 .owner = THIS_MODULE,
193 .open = drm_open, 197 .open = drm_open,
194 .release = drm_release, 198 .release = drm_release,
195 .ioctl = drm_ioctl, 199 .unlocked_ioctl = drm_ioctl,
196 .mmap = drm_mmap, 200 .mmap = drm_mmap,
197 .poll = drm_poll, 201 .poll = drm_poll,
198 .fasync = drm_fasync, 202 .fasync = drm_fasync,
@@ -280,7 +284,7 @@ static struct drm_driver kms_driver = {
280 .owner = THIS_MODULE, 284 .owner = THIS_MODULE,
281 .open = drm_open, 285 .open = drm_open,
282 .release = drm_release, 286 .release = drm_release,
283 .ioctl = drm_ioctl, 287 .unlocked_ioctl = drm_ioctl,
284 .mmap = radeon_mmap, 288 .mmap = radeon_mmap,
285 .poll = drm_poll, 289 .poll = drm_poll,
286 .fasync = drm_fasync, 290 .fasync = drm_fasync,
diff --git a/drivers/gpu/drm/radeon/radeon_drv.h b/drivers/gpu/drm/radeon/radeon_drv.h
index e13785282a82..c57ad606504d 100644
--- a/drivers/gpu/drm/radeon/radeon_drv.h
+++ b/drivers/gpu/drm/radeon/radeon_drv.h
@@ -106,9 +106,10 @@
106 * 1.29- R500 3D cmd buffer support 106 * 1.29- R500 3D cmd buffer support
107 * 1.30- Add support for occlusion queries 107 * 1.30- Add support for occlusion queries
108 * 1.31- Add support for num Z pipes from GET_PARAM 108 * 1.31- Add support for num Z pipes from GET_PARAM
109 * 1.32- fixes for rv740 setup
109 */ 110 */
110#define DRIVER_MAJOR 1 111#define DRIVER_MAJOR 1
111#define DRIVER_MINOR 31 112#define DRIVER_MINOR 32
112#define DRIVER_PATCHLEVEL 0 113#define DRIVER_PATCHLEVEL 0
113 114
114enum radeon_cp_microcode_version { 115enum radeon_cp_microcode_version {
diff --git a/drivers/gpu/drm/radeon/radeon_encoders.c b/drivers/gpu/drm/radeon/radeon_encoders.c
index b4f23ec93201..3c91724457ca 100644
--- a/drivers/gpu/drm/radeon/radeon_encoders.c
+++ b/drivers/gpu/drm/radeon/radeon_encoders.c
@@ -156,6 +156,26 @@ radeon_get_encoder_id(struct drm_device *dev, uint32_t supported_device, uint8_t
156 return ret; 156 return ret;
157} 157}
158 158
159static inline bool radeon_encoder_is_digital(struct drm_encoder *encoder)
160{
161 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
162 switch (radeon_encoder->encoder_id) {
163 case ENCODER_OBJECT_ID_INTERNAL_LVDS:
164 case ENCODER_OBJECT_ID_INTERNAL_TMDS1:
165 case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_TMDS1:
166 case ENCODER_OBJECT_ID_INTERNAL_LVTM1:
167 case ENCODER_OBJECT_ID_INTERNAL_DVO1:
168 case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DVO1:
169 case ENCODER_OBJECT_ID_INTERNAL_DDI:
170 case ENCODER_OBJECT_ID_INTERNAL_UNIPHY:
171 case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA:
172 case ENCODER_OBJECT_ID_INTERNAL_UNIPHY1:
173 case ENCODER_OBJECT_ID_INTERNAL_UNIPHY2:
174 return true;
175 default:
176 return false;
177 }
178}
159void 179void
160radeon_link_encoder_connector(struct drm_device *dev) 180radeon_link_encoder_connector(struct drm_device *dev)
161{ 181{
@@ -202,7 +222,7 @@ radeon_get_connector_for_encoder(struct drm_encoder *encoder)
202 222
203 list_for_each_entry(connector, &dev->mode_config.connector_list, head) { 223 list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
204 radeon_connector = to_radeon_connector(connector); 224 radeon_connector = to_radeon_connector(connector);
205 if (radeon_encoder->devices & radeon_connector->devices) 225 if (radeon_encoder->active_device & radeon_connector->devices)
206 return connector; 226 return connector;
207 } 227 }
208 return NULL; 228 return NULL;
@@ -233,6 +253,8 @@ static bool radeon_atom_mode_fixup(struct drm_encoder *encoder,
233 if (!ASIC_IS_AVIVO(rdev)) { 253 if (!ASIC_IS_AVIVO(rdev)) {
234 adjusted_mode->hdisplay = mode->hdisplay; 254 adjusted_mode->hdisplay = mode->hdisplay;
235 adjusted_mode->vdisplay = mode->vdisplay; 255 adjusted_mode->vdisplay = mode->vdisplay;
256 adjusted_mode->crtc_hdisplay = mode->hdisplay;
257 adjusted_mode->crtc_vdisplay = mode->vdisplay;
236 } 258 }
237 adjusted_mode->base.id = mode_id; 259 adjusted_mode->base.id = mode_id;
238 } 260 }
@@ -438,6 +460,7 @@ atombios_digital_setup(struct drm_encoder *encoder, int action)
438 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 460 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
439 union lvds_encoder_control args; 461 union lvds_encoder_control args;
440 int index = 0; 462 int index = 0;
463 int hdmi_detected = 0;
441 uint8_t frev, crev; 464 uint8_t frev, crev;
442 struct radeon_encoder_atom_dig *dig; 465 struct radeon_encoder_atom_dig *dig;
443 struct drm_connector *connector; 466 struct drm_connector *connector;
@@ -458,6 +481,9 @@ atombios_digital_setup(struct drm_encoder *encoder, int action)
458 if (!radeon_connector->con_priv) 481 if (!radeon_connector->con_priv)
459 return; 482 return;
460 483
484 if (drm_detect_hdmi_monitor(radeon_connector->edid))
485 hdmi_detected = 1;
486
461 dig_connector = radeon_connector->con_priv; 487 dig_connector = radeon_connector->con_priv;
462 488
463 memset(&args, 0, sizeof(args)); 489 memset(&args, 0, sizeof(args));
@@ -487,13 +513,13 @@ atombios_digital_setup(struct drm_encoder *encoder, int action)
487 case 1: 513 case 1:
488 args.v1.ucMisc = 0; 514 args.v1.ucMisc = 0;
489 args.v1.ucAction = action; 515 args.v1.ucAction = action;
490 if (drm_detect_hdmi_monitor(radeon_connector->edid)) 516 if (hdmi_detected)
491 args.v1.ucMisc |= PANEL_ENCODER_MISC_HDMI_TYPE; 517 args.v1.ucMisc |= PANEL_ENCODER_MISC_HDMI_TYPE;
492 args.v1.usPixelClock = cpu_to_le16(radeon_encoder->pixel_clock / 10); 518 args.v1.usPixelClock = cpu_to_le16(radeon_encoder->pixel_clock / 10);
493 if (radeon_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT)) { 519 if (radeon_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT)) {
494 if (dig->lvds_misc & (1 << 0)) 520 if (dig->lvds_misc & ATOM_PANEL_MISC_DUAL)
495 args.v1.ucMisc |= PANEL_ENCODER_MISC_DUAL; 521 args.v1.ucMisc |= PANEL_ENCODER_MISC_DUAL;
496 if (dig->lvds_misc & (1 << 1)) 522 if (dig->lvds_misc & ATOM_PANEL_MISC_888RGB)
497 args.v1.ucMisc |= (1 << 1); 523 args.v1.ucMisc |= (1 << 1);
498 } else { 524 } else {
499 if (dig_connector->linkb) 525 if (dig_connector->linkb)
@@ -512,7 +538,7 @@ atombios_digital_setup(struct drm_encoder *encoder, int action)
512 if (dig->coherent_mode) 538 if (dig->coherent_mode)
513 args.v2.ucMisc |= PANEL_ENCODER_MISC_COHERENT; 539 args.v2.ucMisc |= PANEL_ENCODER_MISC_COHERENT;
514 } 540 }
515 if (drm_detect_hdmi_monitor(radeon_connector->edid)) 541 if (hdmi_detected)
516 args.v2.ucMisc |= PANEL_ENCODER_MISC_HDMI_TYPE; 542 args.v2.ucMisc |= PANEL_ENCODER_MISC_HDMI_TYPE;
517 args.v2.usPixelClock = cpu_to_le16(radeon_encoder->pixel_clock / 10); 543 args.v2.usPixelClock = cpu_to_le16(radeon_encoder->pixel_clock / 10);
518 args.v2.ucTruncate = 0; 544 args.v2.ucTruncate = 0;
@@ -520,18 +546,18 @@ atombios_digital_setup(struct drm_encoder *encoder, int action)
520 args.v2.ucTemporal = 0; 546 args.v2.ucTemporal = 0;
521 args.v2.ucFRC = 0; 547 args.v2.ucFRC = 0;
522 if (radeon_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT)) { 548 if (radeon_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT)) {
523 if (dig->lvds_misc & (1 << 0)) 549 if (dig->lvds_misc & ATOM_PANEL_MISC_DUAL)
524 args.v2.ucMisc |= PANEL_ENCODER_MISC_DUAL; 550 args.v2.ucMisc |= PANEL_ENCODER_MISC_DUAL;
525 if (dig->lvds_misc & (1 << 5)) { 551 if (dig->lvds_misc & ATOM_PANEL_MISC_SPATIAL) {
526 args.v2.ucSpatial = PANEL_ENCODER_SPATIAL_DITHER_EN; 552 args.v2.ucSpatial = PANEL_ENCODER_SPATIAL_DITHER_EN;
527 if (dig->lvds_misc & (1 << 1)) 553 if (dig->lvds_misc & ATOM_PANEL_MISC_888RGB)
528 args.v2.ucSpatial |= PANEL_ENCODER_SPATIAL_DITHER_DEPTH; 554 args.v2.ucSpatial |= PANEL_ENCODER_SPATIAL_DITHER_DEPTH;
529 } 555 }
530 if (dig->lvds_misc & (1 << 6)) { 556 if (dig->lvds_misc & ATOM_PANEL_MISC_TEMPORAL) {
531 args.v2.ucTemporal = PANEL_ENCODER_TEMPORAL_DITHER_EN; 557 args.v2.ucTemporal = PANEL_ENCODER_TEMPORAL_DITHER_EN;
532 if (dig->lvds_misc & (1 << 1)) 558 if (dig->lvds_misc & ATOM_PANEL_MISC_888RGB)
533 args.v2.ucTemporal |= PANEL_ENCODER_TEMPORAL_DITHER_DEPTH; 559 args.v2.ucTemporal |= PANEL_ENCODER_TEMPORAL_DITHER_DEPTH;
534 if (((dig->lvds_misc >> 2) & 0x3) == 2) 560 if (((dig->lvds_misc >> ATOM_PANEL_MISC_GREY_LEVEL_SHIFT) & 0x3) == 2)
535 args.v2.ucTemporal |= PANEL_ENCODER_TEMPORAL_LEVEL_4; 561 args.v2.ucTemporal |= PANEL_ENCODER_TEMPORAL_LEVEL_4;
536 } 562 }
537 } else { 563 } else {
@@ -552,7 +578,7 @@ atombios_digital_setup(struct drm_encoder *encoder, int action)
552 } 578 }
553 579
554 atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args); 580 atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args);
555 581 r600_hdmi_enable(encoder, hdmi_detected);
556} 582}
557 583
558int 584int
@@ -590,21 +616,23 @@ atombios_get_encoder_mode(struct drm_encoder *encoder)
590 return ATOM_ENCODER_MODE_LVDS; 616 return ATOM_ENCODER_MODE_LVDS;
591 break; 617 break;
592 case DRM_MODE_CONNECTOR_DisplayPort: 618 case DRM_MODE_CONNECTOR_DisplayPort:
619 case DRM_MODE_CONNECTOR_eDP:
593 radeon_dig_connector = radeon_connector->con_priv; 620 radeon_dig_connector = radeon_connector->con_priv;
594 if (radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) 621 if ((radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) ||
622 (radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_eDP))
595 return ATOM_ENCODER_MODE_DP; 623 return ATOM_ENCODER_MODE_DP;
596 else if (drm_detect_hdmi_monitor(radeon_connector->edid)) 624 else if (drm_detect_hdmi_monitor(radeon_connector->edid))
597 return ATOM_ENCODER_MODE_HDMI; 625 return ATOM_ENCODER_MODE_HDMI;
598 else 626 else
599 return ATOM_ENCODER_MODE_DVI; 627 return ATOM_ENCODER_MODE_DVI;
600 break; 628 break;
601 case CONNECTOR_DVI_A: 629 case DRM_MODE_CONNECTOR_DVIA:
602 case CONNECTOR_VGA: 630 case DRM_MODE_CONNECTOR_VGA:
603 return ATOM_ENCODER_MODE_CRT; 631 return ATOM_ENCODER_MODE_CRT;
604 break; 632 break;
605 case CONNECTOR_STV: 633 case DRM_MODE_CONNECTOR_Composite:
606 case CONNECTOR_CTV: 634 case DRM_MODE_CONNECTOR_SVIDEO:
607 case CONNECTOR_DIN: 635 case DRM_MODE_CONNECTOR_9PinDIN:
608 /* fix me */ 636 /* fix me */
609 return ATOM_ENCODER_MODE_TV; 637 return ATOM_ENCODER_MODE_TV;
610 /*return ATOM_ENCODER_MODE_CV;*/ 638 /*return ATOM_ENCODER_MODE_CV;*/
@@ -668,31 +696,11 @@ atombios_dig_encoder_setup(struct drm_encoder *encoder, int action)
668 696
669 memset(&args, 0, sizeof(args)); 697 memset(&args, 0, sizeof(args));
670 698
671 if (ASIC_IS_DCE32(rdev)) { 699 if (dig->dig_encoder)
672 if (dig->dig_block) 700 index = GetIndexIntoMasterTable(COMMAND, DIG2EncoderControl);
673 index = GetIndexIntoMasterTable(COMMAND, DIG2EncoderControl); 701 else
674 else 702 index = GetIndexIntoMasterTable(COMMAND, DIG1EncoderControl);
675 index = GetIndexIntoMasterTable(COMMAND, DIG1EncoderControl); 703 num = dig->dig_encoder + 1;
676 num = dig->dig_block + 1;
677 } else {
678 switch (radeon_encoder->encoder_id) {
679 case ENCODER_OBJECT_ID_INTERNAL_UNIPHY:
680 /* XXX doesn't really matter which dig encoder we pick as long as it's
681 * not already in use
682 */
683 if (dig_connector->linkb)
684 index = GetIndexIntoMasterTable(COMMAND, DIG2EncoderControl);
685 else
686 index = GetIndexIntoMasterTable(COMMAND, DIG1EncoderControl);
687 num = 1;
688 break;
689 case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA:
690 /* Only dig2 encoder can drive LVTMA */
691 index = GetIndexIntoMasterTable(COMMAND, DIG2EncoderControl);
692 num = 2;
693 break;
694 }
695 }
696 704
697 atom_parse_cmd_header(rdev->mode_info.atom_context, index, &frev, &crev); 705 atom_parse_cmd_header(rdev->mode_info.atom_context, index, &frev, &crev);
698 706
@@ -814,7 +822,7 @@ atombios_dig_transmitter_setup(struct drm_encoder *encoder, int action, uint8_t
814 args.v1.usPixelClock = cpu_to_le16(radeon_encoder->pixel_clock / 10); 822 args.v1.usPixelClock = cpu_to_le16(radeon_encoder->pixel_clock / 10);
815 } 823 }
816 if (ASIC_IS_DCE32(rdev)) { 824 if (ASIC_IS_DCE32(rdev)) {
817 if (dig->dig_block) 825 if (dig->dig_encoder == 1)
818 args.v2.acConfig.ucEncoderSel = 1; 826 args.v2.acConfig.ucEncoderSel = 1;
819 if (dig_connector->linkb) 827 if (dig_connector->linkb)
820 args.v2.acConfig.ucLinkSel = 1; 828 args.v2.acConfig.ucLinkSel = 1;
@@ -841,17 +849,16 @@ atombios_dig_transmitter_setup(struct drm_encoder *encoder, int action, uint8_t
841 args.v2.acConfig.fCoherentMode = 1; 849 args.v2.acConfig.fCoherentMode = 1;
842 } 850 }
843 } else { 851 } else {
852
844 args.v1.ucConfig = ATOM_TRANSMITTER_CONFIG_CLKSRC_PPLL; 853 args.v1.ucConfig = ATOM_TRANSMITTER_CONFIG_CLKSRC_PPLL;
845 854
855 if (dig->dig_encoder)
856 args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_DIG2_ENCODER;
857 else
858 args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_DIG1_ENCODER;
859
846 switch (radeon_encoder->encoder_id) { 860 switch (radeon_encoder->encoder_id) {
847 case ENCODER_OBJECT_ID_INTERNAL_UNIPHY: 861 case ENCODER_OBJECT_ID_INTERNAL_UNIPHY:
848 /* XXX doesn't really matter which dig encoder we pick as long as it's
849 * not already in use
850 */
851 if (dig_connector->linkb)
852 args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_DIG2_ENCODER;
853 else
854 args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_DIG1_ENCODER;
855 if (rdev->flags & RADEON_IS_IGP) { 862 if (rdev->flags & RADEON_IS_IGP) {
856 if (radeon_encoder->pixel_clock > 165000) { 863 if (radeon_encoder->pixel_clock > 165000) {
857 if (dig_connector->igp_lane_info & 0x3) 864 if (dig_connector->igp_lane_info & 0x3)
@@ -870,10 +877,6 @@ atombios_dig_transmitter_setup(struct drm_encoder *encoder, int action, uint8_t
870 } 877 }
871 } 878 }
872 break; 879 break;
873 case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA:
874 /* Only dig2 encoder can drive LVTMA */
875 args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_DIG2_ENCODER;
876 break;
877 } 880 }
878 881
879 if (radeon_encoder->pixel_clock > 165000) 882 if (radeon_encoder->pixel_clock > 165000)
@@ -893,7 +896,6 @@ atombios_dig_transmitter_setup(struct drm_encoder *encoder, int action, uint8_t
893 } 896 }
894 897
895 atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args); 898 atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args);
896
897} 899}
898 900
899static void 901static void
@@ -1039,6 +1041,7 @@ atombios_set_encoder_crtc_source(struct drm_encoder *encoder)
1039 union crtc_sourc_param args; 1041 union crtc_sourc_param args;
1040 int index = GetIndexIntoMasterTable(COMMAND, SelectCRTC_Source); 1042 int index = GetIndexIntoMasterTable(COMMAND, SelectCRTC_Source);
1041 uint8_t frev, crev; 1043 uint8_t frev, crev;
1044 struct radeon_encoder_atom_dig *dig;
1042 1045
1043 memset(&args, 0, sizeof(args)); 1046 memset(&args, 0, sizeof(args));
1044 1047
@@ -1102,40 +1105,16 @@ atombios_set_encoder_crtc_source(struct drm_encoder *encoder)
1102 case ENCODER_OBJECT_ID_INTERNAL_UNIPHY: 1105 case ENCODER_OBJECT_ID_INTERNAL_UNIPHY:
1103 case ENCODER_OBJECT_ID_INTERNAL_UNIPHY1: 1106 case ENCODER_OBJECT_ID_INTERNAL_UNIPHY1:
1104 case ENCODER_OBJECT_ID_INTERNAL_UNIPHY2: 1107 case ENCODER_OBJECT_ID_INTERNAL_UNIPHY2:
1105 if (ASIC_IS_DCE32(rdev)) { 1108 case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA:
1106 if (radeon_crtc->crtc_id) 1109 dig = radeon_encoder->enc_priv;
1107 args.v2.ucEncoderID = ASIC_INT_DIG2_ENCODER_ID; 1110 if (dig->dig_encoder)
1108 else 1111 args.v2.ucEncoderID = ASIC_INT_DIG2_ENCODER_ID;
1109 args.v2.ucEncoderID = ASIC_INT_DIG1_ENCODER_ID; 1112 else
1110 } else { 1113 args.v2.ucEncoderID = ASIC_INT_DIG1_ENCODER_ID;
1111 struct drm_connector *connector;
1112 struct radeon_connector *radeon_connector;
1113 struct radeon_connector_atom_dig *dig_connector;
1114
1115 connector = radeon_get_connector_for_encoder(encoder);
1116 if (!connector)
1117 return;
1118 radeon_connector = to_radeon_connector(connector);
1119 if (!radeon_connector->con_priv)
1120 return;
1121 dig_connector = radeon_connector->con_priv;
1122
1123 /* XXX doesn't really matter which dig encoder we pick as long as it's
1124 * not already in use
1125 */
1126 if (dig_connector->linkb)
1127 args.v2.ucEncoderID = ASIC_INT_DIG2_ENCODER_ID;
1128 else
1129 args.v2.ucEncoderID = ASIC_INT_DIG1_ENCODER_ID;
1130 }
1131 break; 1114 break;
1132 case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DVO1: 1115 case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DVO1:
1133 args.v2.ucEncoderID = ASIC_INT_DVO_ENCODER_ID; 1116 args.v2.ucEncoderID = ASIC_INT_DVO_ENCODER_ID;
1134 break; 1117 break;
1135 case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA:
1136 /* Only dig2 encoder can drive LVTMA */
1137 args.v2.ucEncoderID = ASIC_INT_DIG2_ENCODER_ID;
1138 break;
1139 case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC1: 1118 case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC1:
1140 if (radeon_encoder->active_device & (ATOM_DEVICE_TV_SUPPORT)) 1119 if (radeon_encoder->active_device & (ATOM_DEVICE_TV_SUPPORT))
1141 args.v2.ucEncoderID = ASIC_INT_TV_ENCODER_ID; 1120 args.v2.ucEncoderID = ASIC_INT_TV_ENCODER_ID;
@@ -1162,7 +1141,6 @@ atombios_set_encoder_crtc_source(struct drm_encoder *encoder)
1162 } 1141 }
1163 1142
1164 atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args); 1143 atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args);
1165
1166} 1144}
1167 1145
1168static void 1146static void
@@ -1196,6 +1174,47 @@ atombios_apply_encoder_quirks(struct drm_encoder *encoder,
1196 } 1174 }
1197} 1175}
1198 1176
1177static int radeon_atom_pick_dig_encoder(struct drm_encoder *encoder)
1178{
1179 struct drm_device *dev = encoder->dev;
1180 struct radeon_device *rdev = dev->dev_private;
1181 struct radeon_crtc *radeon_crtc = to_radeon_crtc(encoder->crtc);
1182 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
1183 struct drm_encoder *test_encoder;
1184 struct radeon_encoder_atom_dig *dig;
1185 uint32_t dig_enc_in_use = 0;
1186 /* on DCE32 and encoder can driver any block so just crtc id */
1187 if (ASIC_IS_DCE32(rdev)) {
1188 return radeon_crtc->crtc_id;
1189 }
1190
1191 /* on DCE3 - LVTMA can only be driven by DIGB */
1192 list_for_each_entry(test_encoder, &dev->mode_config.encoder_list, head) {
1193 struct radeon_encoder *radeon_test_encoder;
1194
1195 if (encoder == test_encoder)
1196 continue;
1197
1198 if (!radeon_encoder_is_digital(test_encoder))
1199 continue;
1200
1201 radeon_test_encoder = to_radeon_encoder(test_encoder);
1202 dig = radeon_test_encoder->enc_priv;
1203
1204 if (dig->dig_encoder >= 0)
1205 dig_enc_in_use |= (1 << dig->dig_encoder);
1206 }
1207
1208 if (radeon_encoder->encoder_id == ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA) {
1209 if (dig_enc_in_use & 0x2)
1210 DRM_ERROR("LVDS required digital encoder 2 but it was in use - stealing\n");
1211 return 1;
1212 }
1213 if (!(dig_enc_in_use & 1))
1214 return 0;
1215 return 1;
1216}
1217
1199static void 1218static void
1200radeon_atom_encoder_mode_set(struct drm_encoder *encoder, 1219radeon_atom_encoder_mode_set(struct drm_encoder *encoder,
1201 struct drm_display_mode *mode, 1220 struct drm_display_mode *mode,
@@ -1208,12 +1227,9 @@ radeon_atom_encoder_mode_set(struct drm_encoder *encoder,
1208 1227
1209 if (radeon_encoder->active_device & 1228 if (radeon_encoder->active_device &
1210 (ATOM_DEVICE_DFP_SUPPORT | ATOM_DEVICE_LCD_SUPPORT)) { 1229 (ATOM_DEVICE_DFP_SUPPORT | ATOM_DEVICE_LCD_SUPPORT)) {
1211 if (radeon_encoder->enc_priv) { 1230 struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
1212 struct radeon_encoder_atom_dig *dig; 1231 if (dig)
1213 1232 dig->dig_encoder = radeon_atom_pick_dig_encoder(encoder);
1214 dig = radeon_encoder->enc_priv;
1215 dig->dig_block = radeon_crtc->crtc_id;
1216 }
1217 } 1233 }
1218 radeon_encoder->pixel_clock = adjusted_mode->clock; 1234 radeon_encoder->pixel_clock = adjusted_mode->clock;
1219 1235
@@ -1265,6 +1281,8 @@ radeon_atom_encoder_mode_set(struct drm_encoder *encoder,
1265 break; 1281 break;
1266 } 1282 }
1267 atombios_apply_encoder_quirks(encoder, adjusted_mode); 1283 atombios_apply_encoder_quirks(encoder, adjusted_mode);
1284
1285 r600_hdmi_setmode(encoder, adjusted_mode);
1268} 1286}
1269 1287
1270static bool 1288static bool
@@ -1371,7 +1389,13 @@ static void radeon_atom_encoder_commit(struct drm_encoder *encoder)
1371static void radeon_atom_encoder_disable(struct drm_encoder *encoder) 1389static void radeon_atom_encoder_disable(struct drm_encoder *encoder)
1372{ 1390{
1373 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 1391 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
1392 struct radeon_encoder_atom_dig *dig;
1374 radeon_atom_encoder_dpms(encoder, DRM_MODE_DPMS_OFF); 1393 radeon_atom_encoder_dpms(encoder, DRM_MODE_DPMS_OFF);
1394
1395 if (radeon_encoder_is_digital(encoder)) {
1396 dig = radeon_encoder->enc_priv;
1397 dig->dig_encoder = -1;
1398 }
1375 radeon_encoder->active_device = 0; 1399 radeon_encoder->active_device = 0;
1376} 1400}
1377 1401
@@ -1428,6 +1452,7 @@ radeon_atombios_set_dig_info(struct radeon_encoder *radeon_encoder)
1428 1452
1429 /* coherent mode by default */ 1453 /* coherent mode by default */
1430 dig->coherent_mode = true; 1454 dig->coherent_mode = true;
1455 dig->dig_encoder = -1;
1431 1456
1432 return dig; 1457 return dig;
1433} 1458}
@@ -1510,4 +1535,6 @@ radeon_add_atom_encoder(struct drm_device *dev, uint32_t encoder_id, uint32_t su
1510 drm_encoder_helper_add(encoder, &radeon_atom_dig_helper_funcs); 1535 drm_encoder_helper_add(encoder, &radeon_atom_dig_helper_funcs);
1511 break; 1536 break;
1512 } 1537 }
1538
1539 r600_hdmi_init(encoder);
1513} 1540}
diff --git a/drivers/gpu/drm/radeon/radeon_fb.c b/drivers/gpu/drm/radeon/radeon_fb.c
index 3ba213d1b06c..d71e346e9ab5 100644
--- a/drivers/gpu/drm/radeon/radeon_fb.c
+++ b/drivers/gpu/drm/radeon/radeon_fb.c
@@ -248,7 +248,7 @@ int radeonfb_create(struct drm_device *dev,
248 if (ret) 248 if (ret)
249 goto out_unref; 249 goto out_unref;
250 250
251 memset_io(fbptr, 0xff, aligned_size); 251 memset_io(fbptr, 0x0, aligned_size);
252 252
253 strcpy(info->fix.id, "radeondrmfb"); 253 strcpy(info->fix.id, "radeondrmfb");
254 254
diff --git a/drivers/gpu/drm/radeon/radeon_fence.c b/drivers/gpu/drm/radeon/radeon_fence.c
index cb4cd97ae39f..8495d4e32e18 100644
--- a/drivers/gpu/drm/radeon/radeon_fence.c
+++ b/drivers/gpu/drm/radeon/radeon_fence.c
@@ -140,16 +140,15 @@ int radeon_fence_create(struct radeon_device *rdev, struct radeon_fence **fence)
140 140
141bool radeon_fence_signaled(struct radeon_fence *fence) 141bool radeon_fence_signaled(struct radeon_fence *fence)
142{ 142{
143 struct radeon_device *rdev = fence->rdev;
144 unsigned long irq_flags; 143 unsigned long irq_flags;
145 bool signaled = false; 144 bool signaled = false;
146 145
147 if (rdev->gpu_lockup) { 146 if (!fence)
148 return true; 147 return true;
149 } 148
150 if (fence == NULL) { 149 if (fence->rdev->gpu_lockup)
151 return true; 150 return true;
152 } 151
153 write_lock_irqsave(&fence->rdev->fence_drv.lock, irq_flags); 152 write_lock_irqsave(&fence->rdev->fence_drv.lock, irq_flags);
154 signaled = fence->signaled; 153 signaled = fence->signaled;
155 /* if we are shuting down report all fence as signaled */ 154 /* if we are shuting down report all fence as signaled */
@@ -324,7 +323,7 @@ int radeon_fence_driver_init(struct radeon_device *rdev)
324 write_lock_irqsave(&rdev->fence_drv.lock, irq_flags); 323 write_lock_irqsave(&rdev->fence_drv.lock, irq_flags);
325 r = radeon_scratch_get(rdev, &rdev->fence_drv.scratch_reg); 324 r = radeon_scratch_get(rdev, &rdev->fence_drv.scratch_reg);
326 if (r) { 325 if (r) {
327 DRM_ERROR("Fence failed to get a scratch register."); 326 dev_err(rdev->dev, "fence failed to get scratch register\n");
328 write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags); 327 write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
329 return r; 328 return r;
330 } 329 }
@@ -335,9 +334,10 @@ int radeon_fence_driver_init(struct radeon_device *rdev)
335 INIT_LIST_HEAD(&rdev->fence_drv.signaled); 334 INIT_LIST_HEAD(&rdev->fence_drv.signaled);
336 rdev->fence_drv.count_timeout = 0; 335 rdev->fence_drv.count_timeout = 0;
337 init_waitqueue_head(&rdev->fence_drv.queue); 336 init_waitqueue_head(&rdev->fence_drv.queue);
337 rdev->fence_drv.initialized = true;
338 write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags); 338 write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
339 if (radeon_debugfs_fence_init(rdev)) { 339 if (radeon_debugfs_fence_init(rdev)) {
340 DRM_ERROR("Failed to register debugfs file for fence !\n"); 340 dev_err(rdev->dev, "fence debugfs file creation failed\n");
341 } 341 }
342 return 0; 342 return 0;
343} 343}
@@ -346,11 +346,13 @@ void radeon_fence_driver_fini(struct radeon_device *rdev)
346{ 346{
347 unsigned long irq_flags; 347 unsigned long irq_flags;
348 348
349 if (!rdev->fence_drv.initialized)
350 return;
349 wake_up_all(&rdev->fence_drv.queue); 351 wake_up_all(&rdev->fence_drv.queue);
350 write_lock_irqsave(&rdev->fence_drv.lock, irq_flags); 352 write_lock_irqsave(&rdev->fence_drv.lock, irq_flags);
351 radeon_scratch_free(rdev, rdev->fence_drv.scratch_reg); 353 radeon_scratch_free(rdev, rdev->fence_drv.scratch_reg);
352 write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags); 354 write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
353 DRM_INFO("radeon: fence finalized\n"); 355 rdev->fence_drv.initialized = false;
354} 356}
355 357
356 358
diff --git a/drivers/gpu/drm/radeon/radeon_gem.c b/drivers/gpu/drm/radeon/radeon_gem.c
index 2944486871b0..db8e9a355a01 100644
--- a/drivers/gpu/drm/radeon/radeon_gem.c
+++ b/drivers/gpu/drm/radeon/radeon_gem.c
@@ -66,8 +66,9 @@ int radeon_gem_object_create(struct radeon_device *rdev, int size,
66 } 66 }
67 r = radeon_bo_create(rdev, gobj, size, kernel, initial_domain, &robj); 67 r = radeon_bo_create(rdev, gobj, size, kernel, initial_domain, &robj);
68 if (r) { 68 if (r) {
69 DRM_ERROR("Failed to allocate GEM object (%d, %d, %u)\n", 69 if (r != -ERESTARTSYS)
70 size, initial_domain, alignment); 70 DRM_ERROR("Failed to allocate GEM object (%d, %d, %u, %d)\n",
71 size, initial_domain, alignment, r);
71 mutex_lock(&rdev->ddev->struct_mutex); 72 mutex_lock(&rdev->ddev->struct_mutex);
72 drm_gem_object_unreference(gobj); 73 drm_gem_object_unreference(gobj);
73 mutex_unlock(&rdev->ddev->struct_mutex); 74 mutex_unlock(&rdev->ddev->struct_mutex);
@@ -130,7 +131,6 @@ int radeon_gem_set_domain(struct drm_gem_object *gobj,
130 printk(KERN_ERR "Failed to wait for object !\n"); 131 printk(KERN_ERR "Failed to wait for object !\n");
131 return r; 132 return r;
132 } 133 }
133 radeon_hdp_flush(robj->rdev);
134 } 134 }
135 return 0; 135 return 0;
136} 136}
@@ -308,10 +308,12 @@ int radeon_gem_wait_idle_ioctl(struct drm_device *dev, void *data,
308 } 308 }
309 robj = gobj->driver_private; 309 robj = gobj->driver_private;
310 r = radeon_bo_wait(robj, NULL, false); 310 r = radeon_bo_wait(robj, NULL, false);
311 /* callback hw specific functions if any */
312 if (robj->rdev->asic->ioctl_wait_idle)
313 robj->rdev->asic->ioctl_wait_idle(robj->rdev, robj);
311 mutex_lock(&dev->struct_mutex); 314 mutex_lock(&dev->struct_mutex);
312 drm_gem_object_unreference(gobj); 315 drm_gem_object_unreference(gobj);
313 mutex_unlock(&dev->struct_mutex); 316 mutex_unlock(&dev->struct_mutex);
314 radeon_hdp_flush(robj->rdev);
315 return r; 317 return r;
316} 318}
317 319
@@ -350,9 +352,10 @@ int radeon_gem_get_tiling_ioctl(struct drm_device *dev, void *data,
350 rbo = gobj->driver_private; 352 rbo = gobj->driver_private;
351 r = radeon_bo_reserve(rbo, false); 353 r = radeon_bo_reserve(rbo, false);
352 if (unlikely(r != 0)) 354 if (unlikely(r != 0))
353 return r; 355 goto out;
354 radeon_bo_get_tiling_flags(rbo, &args->tiling_flags, &args->pitch); 356 radeon_bo_get_tiling_flags(rbo, &args->tiling_flags, &args->pitch);
355 radeon_bo_unreserve(rbo); 357 radeon_bo_unreserve(rbo);
358out:
356 mutex_lock(&dev->struct_mutex); 359 mutex_lock(&dev->struct_mutex);
357 drm_gem_object_unreference(gobj); 360 drm_gem_object_unreference(gobj);
358 mutex_unlock(&dev->struct_mutex); 361 mutex_unlock(&dev->struct_mutex);
diff --git a/drivers/gpu/drm/radeon/radeon_ioc32.c b/drivers/gpu/drm/radeon/radeon_ioc32.c
index a1bf11de308a..48b7cea31e08 100644
--- a/drivers/gpu/drm/radeon/radeon_ioc32.c
+++ b/drivers/gpu/drm/radeon/radeon_ioc32.c
@@ -92,8 +92,7 @@ static int compat_radeon_cp_init(struct file *file, unsigned int cmd,
92 &init->gart_textures_offset)) 92 &init->gart_textures_offset))
93 return -EFAULT; 93 return -EFAULT;
94 94
95 return drm_ioctl(file->f_path.dentry->d_inode, file, 95 return drm_ioctl(file, DRM_IOCTL_RADEON_CP_INIT, (unsigned long)init);
96 DRM_IOCTL_RADEON_CP_INIT, (unsigned long)init);
97} 96}
98 97
99typedef struct drm_radeon_clear32 { 98typedef struct drm_radeon_clear32 {
@@ -125,8 +124,7 @@ static int compat_radeon_cp_clear(struct file *file, unsigned int cmd,
125 &clr->depth_boxes)) 124 &clr->depth_boxes))
126 return -EFAULT; 125 return -EFAULT;
127 126
128 return drm_ioctl(file->f_path.dentry->d_inode, file, 127 return drm_ioctl(file, DRM_IOCTL_RADEON_CLEAR, (unsigned long)clr);
129 DRM_IOCTL_RADEON_CLEAR, (unsigned long)clr);
130} 128}
131 129
132typedef struct drm_radeon_stipple32 { 130typedef struct drm_radeon_stipple32 {
@@ -149,8 +147,7 @@ static int compat_radeon_cp_stipple(struct file *file, unsigned int cmd,
149 &request->mask)) 147 &request->mask))
150 return -EFAULT; 148 return -EFAULT;
151 149
152 return drm_ioctl(file->f_path.dentry->d_inode, file, 150 return drm_ioctl(file, DRM_IOCTL_RADEON_STIPPLE, (unsigned long)request);
153 DRM_IOCTL_RADEON_STIPPLE, (unsigned long)request);
154} 151}
155 152
156typedef struct drm_radeon_tex_image32 { 153typedef struct drm_radeon_tex_image32 {
@@ -204,8 +201,7 @@ static int compat_radeon_cp_texture(struct file *file, unsigned int cmd,
204 &image->data)) 201 &image->data))
205 return -EFAULT; 202 return -EFAULT;
206 203
207 return drm_ioctl(file->f_path.dentry->d_inode, file, 204 return drm_ioctl(file, DRM_IOCTL_RADEON_TEXTURE, (unsigned long)request);
208 DRM_IOCTL_RADEON_TEXTURE, (unsigned long)request);
209} 205}
210 206
211typedef struct drm_radeon_vertex2_32 { 207typedef struct drm_radeon_vertex2_32 {
@@ -238,8 +234,7 @@ static int compat_radeon_cp_vertex2(struct file *file, unsigned int cmd,
238 &request->prim)) 234 &request->prim))
239 return -EFAULT; 235 return -EFAULT;
240 236
241 return drm_ioctl(file->f_path.dentry->d_inode, file, 237 return drm_ioctl(file, DRM_IOCTL_RADEON_VERTEX2, (unsigned long)request);
242 DRM_IOCTL_RADEON_VERTEX2, (unsigned long)request);
243} 238}
244 239
245typedef struct drm_radeon_cmd_buffer32 { 240typedef struct drm_radeon_cmd_buffer32 {
@@ -268,8 +263,7 @@ static int compat_radeon_cp_cmdbuf(struct file *file, unsigned int cmd,
268 &request->boxes)) 263 &request->boxes))
269 return -EFAULT; 264 return -EFAULT;
270 265
271 return drm_ioctl(file->f_path.dentry->d_inode, file, 266 return drm_ioctl(file, DRM_IOCTL_RADEON_CMDBUF, (unsigned long)request);
272 DRM_IOCTL_RADEON_CMDBUF, (unsigned long)request);
273} 267}
274 268
275typedef struct drm_radeon_getparam32 { 269typedef struct drm_radeon_getparam32 {
@@ -293,8 +287,7 @@ static int compat_radeon_cp_getparam(struct file *file, unsigned int cmd,
293 &request->value)) 287 &request->value))
294 return -EFAULT; 288 return -EFAULT;
295 289
296 return drm_ioctl(file->f_path.dentry->d_inode, file, 290 return drm_ioctl(file, DRM_IOCTL_RADEON_GETPARAM, (unsigned long)request);
297 DRM_IOCTL_RADEON_GETPARAM, (unsigned long)request);
298} 291}
299 292
300typedef struct drm_radeon_mem_alloc32 { 293typedef struct drm_radeon_mem_alloc32 {
@@ -322,8 +315,7 @@ static int compat_radeon_mem_alloc(struct file *file, unsigned int cmd,
322 &request->region_offset)) 315 &request->region_offset))
323 return -EFAULT; 316 return -EFAULT;
324 317
325 return drm_ioctl(file->f_path.dentry->d_inode, file, 318 return drm_ioctl(file, DRM_IOCTL_RADEON_ALLOC, (unsigned long)request);
326 DRM_IOCTL_RADEON_ALLOC, (unsigned long)request);
327} 319}
328 320
329typedef struct drm_radeon_irq_emit32 { 321typedef struct drm_radeon_irq_emit32 {
@@ -345,8 +337,7 @@ static int compat_radeon_irq_emit(struct file *file, unsigned int cmd,
345 &request->irq_seq)) 337 &request->irq_seq))
346 return -EFAULT; 338 return -EFAULT;
347 339
348 return drm_ioctl(file->f_path.dentry->d_inode, file, 340 return drm_ioctl(file, DRM_IOCTL_RADEON_IRQ_EMIT, (unsigned long)request);
349 DRM_IOCTL_RADEON_IRQ_EMIT, (unsigned long)request);
350} 341}
351 342
352/* The two 64-bit arches where alignof(u64)==4 in 32-bit code */ 343/* The two 64-bit arches where alignof(u64)==4 in 32-bit code */
@@ -372,8 +363,7 @@ static int compat_radeon_cp_setparam(struct file *file, unsigned int cmd,
372 &request->value)) 363 &request->value))
373 return -EFAULT; 364 return -EFAULT;
374 365
375 return drm_ioctl(file->f_dentry->d_inode, file, 366 return drm_ioctl(file, DRM_IOCTL_RADEON_SETPARAM, (unsigned long) request);
376 DRM_IOCTL_RADEON_SETPARAM, (unsigned long) request);
377} 367}
378#else 368#else
379#define compat_radeon_cp_setparam NULL 369#define compat_radeon_cp_setparam NULL
@@ -413,12 +403,10 @@ long radeon_compat_ioctl(struct file *filp, unsigned int cmd, unsigned long arg)
413 if (nr < DRM_COMMAND_BASE + DRM_ARRAY_SIZE(radeon_compat_ioctls)) 403 if (nr < DRM_COMMAND_BASE + DRM_ARRAY_SIZE(radeon_compat_ioctls))
414 fn = radeon_compat_ioctls[nr - DRM_COMMAND_BASE]; 404 fn = radeon_compat_ioctls[nr - DRM_COMMAND_BASE];
415 405
416 lock_kernel(); /* XXX for now */
417 if (fn != NULL) 406 if (fn != NULL)
418 ret = (*fn) (filp, cmd, arg); 407 ret = (*fn) (filp, cmd, arg);
419 else 408 else
420 ret = drm_ioctl(filp->f_path.dentry->d_inode, filp, cmd, arg); 409 ret = drm_ioctl(filp, cmd, arg);
421 unlock_kernel();
422 410
423 return ret; 411 return ret;
424} 412}
@@ -431,9 +419,7 @@ long radeon_kms_compat_ioctl(struct file *filp, unsigned int cmd, unsigned long
431 if (nr < DRM_COMMAND_BASE) 419 if (nr < DRM_COMMAND_BASE)
432 return drm_compat_ioctl(filp, cmd, arg); 420 return drm_compat_ioctl(filp, cmd, arg);
433 421
434 lock_kernel(); /* XXX for now */ 422 ret = drm_ioctl(filp, cmd, arg);
435 ret = drm_ioctl(filp->f_path.dentry->d_inode, filp, cmd, arg);
436 unlock_kernel();
437 423
438 return ret; 424 return ret;
439} 425}
diff --git a/drivers/gpu/drm/radeon/radeon_irq.c b/drivers/gpu/drm/radeon/radeon_irq.c
index b79ecc4a7cc4..2f349a300195 100644
--- a/drivers/gpu/drm/radeon/radeon_irq.c
+++ b/drivers/gpu/drm/radeon/radeon_irq.c
@@ -289,16 +289,16 @@ int radeon_irq_emit(struct drm_device *dev, void *data, struct drm_file *file_pr
289 drm_radeon_irq_emit_t *emit = data; 289 drm_radeon_irq_emit_t *emit = data;
290 int result; 290 int result;
291 291
292 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
293 return -EINVAL;
294
295 LOCK_TEST_WITH_RETURN(dev, file_priv);
296
297 if (!dev_priv) { 292 if (!dev_priv) {
298 DRM_ERROR("called with no initialization\n"); 293 DRM_ERROR("called with no initialization\n");
299 return -EINVAL; 294 return -EINVAL;
300 } 295 }
301 296
297 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
298 return -EINVAL;
299
300 LOCK_TEST_WITH_RETURN(dev, file_priv);
301
302 result = radeon_emit_irq(dev); 302 result = radeon_emit_irq(dev);
303 303
304 if (DRM_COPY_TO_USER(emit->irq_seq, &result, sizeof(int))) { 304 if (DRM_COPY_TO_USER(emit->irq_seq, &result, sizeof(int))) {
diff --git a/drivers/gpu/drm/radeon/radeon_irq_kms.c b/drivers/gpu/drm/radeon/radeon_irq_kms.c
index 9223296fe37b..3cfd60fd0083 100644
--- a/drivers/gpu/drm/radeon/radeon_irq_kms.c
+++ b/drivers/gpu/drm/radeon/radeon_irq_kms.c
@@ -97,6 +97,7 @@ void radeon_driver_irq_uninstall_kms(struct drm_device *dev)
97 rdev->irq.sw_int = false; 97 rdev->irq.sw_int = false;
98 for (i = 0; i < 2; i++) { 98 for (i = 0; i < 2; i++) {
99 rdev->irq.crtc_vblank_int[i] = false; 99 rdev->irq.crtc_vblank_int[i] = false;
100 rdev->irq.hpd[i] = false;
100 } 101 }
101 radeon_irq_set(rdev); 102 radeon_irq_set(rdev);
102} 103}
@@ -128,17 +129,22 @@ int radeon_irq_kms_init(struct radeon_device *rdev)
128 DRM_INFO("radeon: using MSI.\n"); 129 DRM_INFO("radeon: using MSI.\n");
129 } 130 }
130 } 131 }
131 drm_irq_install(rdev->ddev);
132 rdev->irq.installed = true; 132 rdev->irq.installed = true;
133 r = drm_irq_install(rdev->ddev);
134 if (r) {
135 rdev->irq.installed = false;
136 return r;
137 }
133 DRM_INFO("radeon: irq initialized.\n"); 138 DRM_INFO("radeon: irq initialized.\n");
134 return 0; 139 return 0;
135} 140}
136 141
137void radeon_irq_kms_fini(struct radeon_device *rdev) 142void radeon_irq_kms_fini(struct radeon_device *rdev)
138{ 143{
144 drm_vblank_cleanup(rdev->ddev);
139 if (rdev->irq.installed) { 145 if (rdev->irq.installed) {
140 rdev->irq.installed = false;
141 drm_irq_uninstall(rdev->ddev); 146 drm_irq_uninstall(rdev->ddev);
147 rdev->irq.installed = false;
142 if (rdev->msi_enabled) 148 if (rdev->msi_enabled)
143 pci_disable_msi(rdev->pdev); 149 pci_disable_msi(rdev->pdev);
144 } 150 }
diff --git a/drivers/gpu/drm/radeon/radeon_legacy_crtc.c b/drivers/gpu/drm/radeon/radeon_legacy_crtc.c
index b82ede98e152..b6d8081e1246 100644
--- a/drivers/gpu/drm/radeon/radeon_legacy_crtc.c
+++ b/drivers/gpu/drm/radeon/radeon_legacy_crtc.c
@@ -43,8 +43,7 @@ static void radeon_overscan_setup(struct drm_crtc *crtc,
43} 43}
44 44
45static void radeon_legacy_rmx_mode_set(struct drm_crtc *crtc, 45static void radeon_legacy_rmx_mode_set(struct drm_crtc *crtc,
46 struct drm_display_mode *mode, 46 struct drm_display_mode *mode)
47 struct drm_display_mode *adjusted_mode)
48{ 47{
49 struct drm_device *dev = crtc->dev; 48 struct drm_device *dev = crtc->dev;
50 struct radeon_device *rdev = dev->dev_private; 49 struct radeon_device *rdev = dev->dev_private;
@@ -340,69 +339,6 @@ void radeon_crtc_dpms(struct drm_crtc *crtc, int mode)
340 } 339 }
341} 340}
342 341
343/* properly set crtc bpp when using atombios */
344void radeon_legacy_atom_set_surface(struct drm_crtc *crtc)
345{
346 struct drm_device *dev = crtc->dev;
347 struct radeon_device *rdev = dev->dev_private;
348 struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
349 int format;
350 uint32_t crtc_gen_cntl;
351 uint32_t disp_merge_cntl;
352 uint32_t crtc_pitch;
353
354 switch (crtc->fb->bits_per_pixel) {
355 case 8:
356 format = 2;
357 break;
358 case 15: /* 555 */
359 format = 3;
360 break;
361 case 16: /* 565 */
362 format = 4;
363 break;
364 case 24: /* RGB */
365 format = 5;
366 break;
367 case 32: /* xRGB */
368 format = 6;
369 break;
370 default:
371 return;
372 }
373
374 crtc_pitch = ((((crtc->fb->pitch / (crtc->fb->bits_per_pixel / 8)) * crtc->fb->bits_per_pixel) +
375 ((crtc->fb->bits_per_pixel * 8) - 1)) /
376 (crtc->fb->bits_per_pixel * 8));
377 crtc_pitch |= crtc_pitch << 16;
378
379 WREG32(RADEON_CRTC_PITCH + radeon_crtc->crtc_offset, crtc_pitch);
380
381 switch (radeon_crtc->crtc_id) {
382 case 0:
383 disp_merge_cntl = RREG32(RADEON_DISP_MERGE_CNTL);
384 disp_merge_cntl &= ~RADEON_DISP_RGB_OFFSET_EN;
385 WREG32(RADEON_DISP_MERGE_CNTL, disp_merge_cntl);
386
387 crtc_gen_cntl = RREG32(RADEON_CRTC_GEN_CNTL) & 0xfffff0ff;
388 crtc_gen_cntl |= (format << 8);
389 crtc_gen_cntl |= RADEON_CRTC_EXT_DISP_EN;
390 WREG32(RADEON_CRTC_GEN_CNTL, crtc_gen_cntl);
391 break;
392 case 1:
393 disp_merge_cntl = RREG32(RADEON_DISP2_MERGE_CNTL);
394 disp_merge_cntl &= ~RADEON_DISP2_RGB_OFFSET_EN;
395 WREG32(RADEON_DISP2_MERGE_CNTL, disp_merge_cntl);
396
397 crtc_gen_cntl = RREG32(RADEON_CRTC2_GEN_CNTL) & 0xfffff0ff;
398 crtc_gen_cntl |= (format << 8);
399 WREG32(RADEON_CRTC2_GEN_CNTL, crtc_gen_cntl);
400 WREG32(RADEON_FP_H2_SYNC_STRT_WID, RREG32(RADEON_CRTC2_H_SYNC_STRT_WID));
401 WREG32(RADEON_FP_V2_SYNC_STRT_WID, RREG32(RADEON_CRTC2_V_SYNC_STRT_WID));
402 break;
403 }
404}
405
406int radeon_crtc_set_base(struct drm_crtc *crtc, int x, int y, 342int radeon_crtc_set_base(struct drm_crtc *crtc, int x, int y,
407 struct drm_framebuffer *old_fb) 343 struct drm_framebuffer *old_fb)
408{ 344{
@@ -756,7 +692,6 @@ static void radeon_set_pll(struct drm_crtc *crtc, struct drm_display_mode *mode)
756 uint32_t post_divider = 0; 692 uint32_t post_divider = 0;
757 uint32_t freq = 0; 693 uint32_t freq = 0;
758 uint8_t pll_gain; 694 uint8_t pll_gain;
759 int pll_flags = RADEON_PLL_LEGACY;
760 bool use_bios_divs = false; 695 bool use_bios_divs = false;
761 /* PLL registers */ 696 /* PLL registers */
762 uint32_t pll_ref_div = 0; 697 uint32_t pll_ref_div = 0;
@@ -790,10 +725,12 @@ static void radeon_set_pll(struct drm_crtc *crtc, struct drm_display_mode *mode)
790 else 725 else
791 pll = &rdev->clock.p1pll; 726 pll = &rdev->clock.p1pll;
792 727
728 pll->flags = RADEON_PLL_LEGACY;
729
793 if (mode->clock > 200000) /* range limits??? */ 730 if (mode->clock > 200000) /* range limits??? */
794 pll_flags |= RADEON_PLL_PREFER_HIGH_FB_DIV; 731 pll->flags |= RADEON_PLL_PREFER_HIGH_FB_DIV;
795 else 732 else
796 pll_flags |= RADEON_PLL_PREFER_LOW_REF_DIV; 733 pll->flags |= RADEON_PLL_PREFER_LOW_REF_DIV;
797 734
798 list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) { 735 list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
799 if (encoder->crtc == crtc) { 736 if (encoder->crtc == crtc) {
@@ -805,7 +742,7 @@ static void radeon_set_pll(struct drm_crtc *crtc, struct drm_display_mode *mode)
805 } 742 }
806 743
807 if (encoder->encoder_type != DRM_MODE_ENCODER_DAC) 744 if (encoder->encoder_type != DRM_MODE_ENCODER_DAC)
808 pll_flags |= RADEON_PLL_NO_ODD_POST_DIV; 745 pll->flags |= RADEON_PLL_NO_ODD_POST_DIV;
809 if (encoder->encoder_type == DRM_MODE_ENCODER_LVDS) { 746 if (encoder->encoder_type == DRM_MODE_ENCODER_LVDS) {
810 if (!rdev->is_atom_bios) { 747 if (!rdev->is_atom_bios) {
811 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 748 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
@@ -820,7 +757,7 @@ static void radeon_set_pll(struct drm_crtc *crtc, struct drm_display_mode *mode)
820 } 757 }
821 } 758 }
822 } 759 }
823 pll_flags |= RADEON_PLL_USE_REF_DIV; 760 pll->flags |= RADEON_PLL_USE_REF_DIV;
824 } 761 }
825 } 762 }
826 } 763 }
@@ -830,8 +767,7 @@ static void radeon_set_pll(struct drm_crtc *crtc, struct drm_display_mode *mode)
830 if (!use_bios_divs) { 767 if (!use_bios_divs) {
831 radeon_compute_pll(pll, mode->clock, 768 radeon_compute_pll(pll, mode->clock,
832 &freq, &feedback_div, &frac_fb_div, 769 &freq, &feedback_div, &frac_fb_div,
833 &reference_div, &post_divider, 770 &reference_div, &post_divider);
834 pll_flags);
835 771
836 for (post_div = &post_divs[0]; post_div->divider; ++post_div) { 772 for (post_div = &post_divs[0]; post_div->divider; ++post_div) {
837 if (post_div->divider == post_divider) 773 if (post_div->divider == post_divider)
@@ -1059,7 +995,7 @@ static int radeon_crtc_mode_set(struct drm_crtc *crtc,
1059 radeon_set_pll(crtc, adjusted_mode); 995 radeon_set_pll(crtc, adjusted_mode);
1060 radeon_overscan_setup(crtc, adjusted_mode); 996 radeon_overscan_setup(crtc, adjusted_mode);
1061 if (radeon_crtc->crtc_id == 0) { 997 if (radeon_crtc->crtc_id == 0) {
1062 radeon_legacy_rmx_mode_set(crtc, mode, adjusted_mode); 998 radeon_legacy_rmx_mode_set(crtc, adjusted_mode);
1063 } else { 999 } else {
1064 if (radeon_crtc->rmx_type != RMX_OFF) { 1000 if (radeon_crtc->rmx_type != RMX_OFF) {
1065 /* FIXME: only first crtc has rmx what should we 1001 /* FIXME: only first crtc has rmx what should we
diff --git a/drivers/gpu/drm/radeon/radeon_legacy_encoders.c b/drivers/gpu/drm/radeon/radeon_legacy_encoders.c
index df00515e81fa..38e45e231ef5 100644
--- a/drivers/gpu/drm/radeon/radeon_legacy_encoders.c
+++ b/drivers/gpu/drm/radeon/radeon_legacy_encoders.c
@@ -46,6 +46,7 @@ static void radeon_legacy_lvds_dpms(struct drm_encoder *encoder, int mode)
46 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 46 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
47 uint32_t lvds_gen_cntl, lvds_pll_cntl, pixclks_cntl, disp_pwr_man; 47 uint32_t lvds_gen_cntl, lvds_pll_cntl, pixclks_cntl, disp_pwr_man;
48 int panel_pwr_delay = 2000; 48 int panel_pwr_delay = 2000;
49 bool is_mac = false;
49 DRM_DEBUG("\n"); 50 DRM_DEBUG("\n");
50 51
51 if (radeon_encoder->enc_priv) { 52 if (radeon_encoder->enc_priv) {
@@ -58,6 +59,15 @@ static void radeon_legacy_lvds_dpms(struct drm_encoder *encoder, int mode)
58 } 59 }
59 } 60 }
60 61
62 /* macs (and possibly some x86 oem systems?) wire up LVDS strangely
63 * Taken from radeonfb.
64 */
65 if ((rdev->mode_info.connector_table == CT_IBOOK) ||
66 (rdev->mode_info.connector_table == CT_POWERBOOK_EXTERNAL) ||
67 (rdev->mode_info.connector_table == CT_POWERBOOK_INTERNAL) ||
68 (rdev->mode_info.connector_table == CT_POWERBOOK_VGA))
69 is_mac = true;
70
61 switch (mode) { 71 switch (mode) {
62 case DRM_MODE_DPMS_ON: 72 case DRM_MODE_DPMS_ON:
63 disp_pwr_man = RREG32(RADEON_DISP_PWR_MAN); 73 disp_pwr_man = RREG32(RADEON_DISP_PWR_MAN);
@@ -74,6 +84,8 @@ static void radeon_legacy_lvds_dpms(struct drm_encoder *encoder, int mode)
74 84
75 lvds_gen_cntl = RREG32(RADEON_LVDS_GEN_CNTL); 85 lvds_gen_cntl = RREG32(RADEON_LVDS_GEN_CNTL);
76 lvds_gen_cntl |= (RADEON_LVDS_ON | RADEON_LVDS_EN | RADEON_LVDS_DIGON | RADEON_LVDS_BLON); 86 lvds_gen_cntl |= (RADEON_LVDS_ON | RADEON_LVDS_EN | RADEON_LVDS_DIGON | RADEON_LVDS_BLON);
87 if (is_mac)
88 lvds_gen_cntl |= RADEON_LVDS_BL_MOD_EN;
77 lvds_gen_cntl &= ~(RADEON_LVDS_DISPLAY_DIS); 89 lvds_gen_cntl &= ~(RADEON_LVDS_DISPLAY_DIS);
78 udelay(panel_pwr_delay * 1000); 90 udelay(panel_pwr_delay * 1000);
79 WREG32(RADEON_LVDS_GEN_CNTL, lvds_gen_cntl); 91 WREG32(RADEON_LVDS_GEN_CNTL, lvds_gen_cntl);
@@ -85,7 +97,14 @@ static void radeon_legacy_lvds_dpms(struct drm_encoder *encoder, int mode)
85 WREG32_PLL_P(RADEON_PIXCLKS_CNTL, 0, ~RADEON_PIXCLK_LVDS_ALWAYS_ONb); 97 WREG32_PLL_P(RADEON_PIXCLKS_CNTL, 0, ~RADEON_PIXCLK_LVDS_ALWAYS_ONb);
86 lvds_gen_cntl = RREG32(RADEON_LVDS_GEN_CNTL); 98 lvds_gen_cntl = RREG32(RADEON_LVDS_GEN_CNTL);
87 lvds_gen_cntl |= RADEON_LVDS_DISPLAY_DIS; 99 lvds_gen_cntl |= RADEON_LVDS_DISPLAY_DIS;
88 lvds_gen_cntl &= ~(RADEON_LVDS_ON | RADEON_LVDS_BLON | RADEON_LVDS_EN | RADEON_LVDS_DIGON); 100 if (is_mac) {
101 lvds_gen_cntl &= ~RADEON_LVDS_BL_MOD_EN;
102 WREG32(RADEON_LVDS_GEN_CNTL, lvds_gen_cntl);
103 lvds_gen_cntl &= ~(RADEON_LVDS_ON | RADEON_LVDS_EN);
104 } else {
105 WREG32(RADEON_LVDS_GEN_CNTL, lvds_gen_cntl);
106 lvds_gen_cntl &= ~(RADEON_LVDS_ON | RADEON_LVDS_BLON | RADEON_LVDS_EN | RADEON_LVDS_DIGON);
107 }
89 udelay(panel_pwr_delay * 1000); 108 udelay(panel_pwr_delay * 1000);
90 WREG32(RADEON_LVDS_GEN_CNTL, lvds_gen_cntl); 109 WREG32(RADEON_LVDS_GEN_CNTL, lvds_gen_cntl);
91 WREG32_PLL(RADEON_PIXCLKS_CNTL, pixclks_cntl); 110 WREG32_PLL(RADEON_PIXCLKS_CNTL, pixclks_cntl);
@@ -207,6 +226,8 @@ static bool radeon_legacy_mode_fixup(struct drm_encoder *encoder,
207 *adjusted_mode = *native_mode; 226 *adjusted_mode = *native_mode;
208 adjusted_mode->hdisplay = mode->hdisplay; 227 adjusted_mode->hdisplay = mode->hdisplay;
209 adjusted_mode->vdisplay = mode->vdisplay; 228 adjusted_mode->vdisplay = mode->vdisplay;
229 adjusted_mode->crtc_hdisplay = mode->hdisplay;
230 adjusted_mode->crtc_vdisplay = mode->vdisplay;
210 adjusted_mode->base.id = mode_id; 231 adjusted_mode->base.id = mode_id;
211 } 232 }
212 233
diff --git a/drivers/gpu/drm/radeon/radeon_legacy_tv.c b/drivers/gpu/drm/radeon/radeon_legacy_tv.c
index 3a12bb0c0563..417684daef4c 100644
--- a/drivers/gpu/drm/radeon/radeon_legacy_tv.c
+++ b/drivers/gpu/drm/radeon/radeon_legacy_tv.c
@@ -77,7 +77,7 @@ struct radeon_tv_mode_constants {
77 unsigned pix_to_tv; 77 unsigned pix_to_tv;
78}; 78};
79 79
80static const uint16_t hor_timing_NTSC[] = { 80static const uint16_t hor_timing_NTSC[MAX_H_CODE_TIMING_LEN] = {
81 0x0007, 81 0x0007,
82 0x003f, 82 0x003f,
83 0x0263, 83 0x0263,
@@ -98,7 +98,7 @@ static const uint16_t hor_timing_NTSC[] = {
98 0 98 0
99}; 99};
100 100
101static const uint16_t vert_timing_NTSC[] = { 101static const uint16_t vert_timing_NTSC[MAX_V_CODE_TIMING_LEN] = {
102 0x2001, 102 0x2001,
103 0x200d, 103 0x200d,
104 0x1006, 104 0x1006,
@@ -115,7 +115,7 @@ static const uint16_t vert_timing_NTSC[] = {
115 0 115 0
116}; 116};
117 117
118static const uint16_t hor_timing_PAL[] = { 118static const uint16_t hor_timing_PAL[MAX_H_CODE_TIMING_LEN] = {
119 0x0007, 119 0x0007,
120 0x0058, 120 0x0058,
121 0x027c, 121 0x027c,
@@ -136,7 +136,7 @@ static const uint16_t hor_timing_PAL[] = {
136 0 136 0
137}; 137};
138 138
139static const uint16_t vert_timing_PAL[] = { 139static const uint16_t vert_timing_PAL[MAX_V_CODE_TIMING_LEN] = {
140 0x2001, 140 0x2001,
141 0x200c, 141 0x200c,
142 0x1005, 142 0x1005,
@@ -623,9 +623,9 @@ void radeon_legacy_tv_mode_set(struct drm_encoder *encoder,
623 } 623 }
624 flicker_removal = (tmp + 500) / 1000; 624 flicker_removal = (tmp + 500) / 1000;
625 625
626 if (flicker_removal < 3) 626 if (flicker_removal < 2)
627 flicker_removal = 3; 627 flicker_removal = 2;
628 for (i = 0; i < 6; ++i) { 628 for (i = 0; i < ARRAY_SIZE(SLOPE_limit); ++i) {
629 if (flicker_removal == SLOPE_limit[i]) 629 if (flicker_removal == SLOPE_limit[i])
630 break; 630 break;
631 } 631 }
diff --git a/drivers/gpu/drm/radeon/radeon_mode.h b/drivers/gpu/drm/radeon/radeon_mode.h
index 44d4b652ea12..e81b2aeb6a8f 100644
--- a/drivers/gpu/drm/radeon/radeon_mode.h
+++ b/drivers/gpu/drm/radeon/radeon_mode.h
@@ -46,32 +46,6 @@ struct radeon_device;
46#define to_radeon_encoder(x) container_of(x, struct radeon_encoder, base) 46#define to_radeon_encoder(x) container_of(x, struct radeon_encoder, base)
47#define to_radeon_framebuffer(x) container_of(x, struct radeon_framebuffer, base) 47#define to_radeon_framebuffer(x) container_of(x, struct radeon_framebuffer, base)
48 48
49enum radeon_connector_type {
50 CONNECTOR_NONE,
51 CONNECTOR_VGA,
52 CONNECTOR_DVI_I,
53 CONNECTOR_DVI_D,
54 CONNECTOR_DVI_A,
55 CONNECTOR_STV,
56 CONNECTOR_CTV,
57 CONNECTOR_LVDS,
58 CONNECTOR_DIGITAL,
59 CONNECTOR_SCART,
60 CONNECTOR_HDMI_TYPE_A,
61 CONNECTOR_HDMI_TYPE_B,
62 CONNECTOR_0XC,
63 CONNECTOR_0XD,
64 CONNECTOR_DIN,
65 CONNECTOR_DISPLAY_PORT,
66 CONNECTOR_UNSUPPORTED
67};
68
69enum radeon_dvi_type {
70 DVI_AUTO,
71 DVI_DIGITAL,
72 DVI_ANALOG
73};
74
75enum radeon_rmx_type { 49enum radeon_rmx_type {
76 RMX_OFF, 50 RMX_OFF,
77 RMX_FULL, 51 RMX_FULL,
@@ -88,6 +62,7 @@ enum radeon_tv_std {
88 TV_STD_SCART_PAL, 62 TV_STD_SCART_PAL,
89 TV_STD_SECAM, 63 TV_STD_SECAM,
90 TV_STD_PAL_CN, 64 TV_STD_PAL_CN,
65 TV_STD_PAL_N,
91}; 66};
92 67
93/* radeon gpio-based i2c 68/* radeon gpio-based i2c
@@ -150,16 +125,24 @@ struct radeon_tmds_pll {
150#define RADEON_PLL_PREFER_HIGH_POST_DIV (1 << 9) 125#define RADEON_PLL_PREFER_HIGH_POST_DIV (1 << 9)
151#define RADEON_PLL_USE_FRAC_FB_DIV (1 << 10) 126#define RADEON_PLL_USE_FRAC_FB_DIV (1 << 10)
152#define RADEON_PLL_PREFER_CLOSEST_LOWER (1 << 11) 127#define RADEON_PLL_PREFER_CLOSEST_LOWER (1 << 11)
128#define RADEON_PLL_USE_POST_DIV (1 << 12)
153 129
154struct radeon_pll { 130struct radeon_pll {
155 uint16_t reference_freq; 131 /* reference frequency */
156 uint16_t reference_div; 132 uint32_t reference_freq;
133
134 /* fixed dividers */
135 uint32_t reference_div;
136 uint32_t post_div;
137
138 /* pll in/out limits */
157 uint32_t pll_in_min; 139 uint32_t pll_in_min;
158 uint32_t pll_in_max; 140 uint32_t pll_in_max;
159 uint32_t pll_out_min; 141 uint32_t pll_out_min;
160 uint32_t pll_out_max; 142 uint32_t pll_out_max;
161 uint16_t xclk; 143 uint32_t best_vco;
162 144
145 /* divider limits */
163 uint32_t min_ref_div; 146 uint32_t min_ref_div;
164 uint32_t max_ref_div; 147 uint32_t max_ref_div;
165 uint32_t min_post_div; 148 uint32_t min_post_div;
@@ -168,7 +151,12 @@ struct radeon_pll {
168 uint32_t max_feedback_div; 151 uint32_t max_feedback_div;
169 uint32_t min_frac_feedback_div; 152 uint32_t min_frac_feedback_div;
170 uint32_t max_frac_feedback_div; 153 uint32_t max_frac_feedback_div;
171 uint32_t best_vco; 154
155 /* flags for the current clock */
156 uint32_t flags;
157
158 /* pll id */
159 uint32_t id;
172}; 160};
173 161
174struct radeon_i2c_chan { 162struct radeon_i2c_chan {
@@ -311,7 +299,7 @@ struct radeon_atom_ss {
311struct radeon_encoder_atom_dig { 299struct radeon_encoder_atom_dig {
312 /* atom dig */ 300 /* atom dig */
313 bool coherent_mode; 301 bool coherent_mode;
314 int dig_block; 302 int dig_encoder; /* -1 disabled, 0 DIGA, 1 DIGB */
315 /* atom lvds */ 303 /* atom lvds */
316 uint32_t lvds_misc; 304 uint32_t lvds_misc;
317 uint16_t panel_pwr_delay; 305 uint16_t panel_pwr_delay;
@@ -334,6 +322,9 @@ struct radeon_encoder {
334 enum radeon_rmx_type rmx_type; 322 enum radeon_rmx_type rmx_type;
335 struct drm_display_mode native_mode; 323 struct drm_display_mode native_mode;
336 void *enc_priv; 324 void *enc_priv;
325 int hdmi_offset;
326 int hdmi_audio_workaround;
327 int hdmi_buffer_status;
337}; 328};
338 329
339struct radeon_connector_atom_dig { 330struct radeon_connector_atom_dig {
@@ -392,6 +383,11 @@ struct radeon_framebuffer {
392 struct drm_gem_object *obj; 383 struct drm_gem_object *obj;
393}; 384};
394 385
386extern enum radeon_tv_std
387radeon_combios_get_tv_info(struct radeon_device *rdev);
388extern enum radeon_tv_std
389radeon_atombios_get_tv_info(struct radeon_device *rdev);
390
395extern void radeon_connector_hotplug(struct drm_connector *connector); 391extern void radeon_connector_hotplug(struct drm_connector *connector);
396extern bool radeon_dp_needs_link_train(struct radeon_connector *radeon_connector); 392extern bool radeon_dp_needs_link_train(struct radeon_connector *radeon_connector);
397extern int radeon_dp_mode_valid_helper(struct radeon_connector *radeon_connector, 393extern int radeon_dp_mode_valid_helper(struct radeon_connector *radeon_connector,
@@ -434,8 +430,7 @@ extern void radeon_compute_pll(struct radeon_pll *pll,
434 uint32_t *fb_div_p, 430 uint32_t *fb_div_p,
435 uint32_t *frac_fb_div_p, 431 uint32_t *frac_fb_div_p,
436 uint32_t *ref_div_p, 432 uint32_t *ref_div_p,
437 uint32_t *post_div_p, 433 uint32_t *post_div_p);
438 int flags);
439 434
440extern void radeon_compute_pll_avivo(struct radeon_pll *pll, 435extern void radeon_compute_pll_avivo(struct radeon_pll *pll,
441 uint64_t freq, 436 uint64_t freq,
@@ -443,8 +438,7 @@ extern void radeon_compute_pll_avivo(struct radeon_pll *pll,
443 uint32_t *fb_div_p, 438 uint32_t *fb_div_p,
444 uint32_t *frac_fb_div_p, 439 uint32_t *frac_fb_div_p,
445 uint32_t *ref_div_p, 440 uint32_t *ref_div_p,
446 uint32_t *post_div_p, 441 uint32_t *post_div_p);
447 int flags);
448 442
449extern void radeon_setup_encoder_clones(struct drm_device *dev); 443extern void radeon_setup_encoder_clones(struct drm_device *dev);
450 444
@@ -470,7 +464,6 @@ extern void atombios_crtc_dpms(struct drm_crtc *crtc, int mode);
470 464
471extern int radeon_crtc_set_base(struct drm_crtc *crtc, int x, int y, 465extern int radeon_crtc_set_base(struct drm_crtc *crtc, int x, int y,
472 struct drm_framebuffer *old_fb); 466 struct drm_framebuffer *old_fb);
473extern void radeon_legacy_atom_set_surface(struct drm_crtc *crtc);
474 467
475extern int radeon_crtc_cursor_set(struct drm_crtc *crtc, 468extern int radeon_crtc_cursor_set(struct drm_crtc *crtc,
476 struct drm_file *file_priv, 469 struct drm_file *file_priv,
diff --git a/drivers/gpu/drm/radeon/radeon_object.c b/drivers/gpu/drm/radeon/radeon_object.c
index 544e18ffaf22..f1da370928eb 100644
--- a/drivers/gpu/drm/radeon/radeon_object.c
+++ b/drivers/gpu/drm/radeon/radeon_object.c
@@ -56,6 +56,13 @@ static void radeon_ttm_bo_destroy(struct ttm_buffer_object *tbo)
56 kfree(bo); 56 kfree(bo);
57} 57}
58 58
59bool radeon_ttm_bo_is_radeon_bo(struct ttm_buffer_object *bo)
60{
61 if (bo->destroy == &radeon_ttm_bo_destroy)
62 return true;
63 return false;
64}
65
59void radeon_ttm_placement_from_domain(struct radeon_bo *rbo, u32 domain) 66void radeon_ttm_placement_from_domain(struct radeon_bo *rbo, u32 domain)
60{ 67{
61 u32 c = 0; 68 u32 c = 0;
@@ -71,6 +78,8 @@ void radeon_ttm_placement_from_domain(struct radeon_bo *rbo, u32 domain)
71 rbo->placements[c++] = TTM_PL_MASK_CACHING | TTM_PL_FLAG_TT; 78 rbo->placements[c++] = TTM_PL_MASK_CACHING | TTM_PL_FLAG_TT;
72 if (domain & RADEON_GEM_DOMAIN_CPU) 79 if (domain & RADEON_GEM_DOMAIN_CPU)
73 rbo->placements[c++] = TTM_PL_MASK_CACHING | TTM_PL_FLAG_SYSTEM; 80 rbo->placements[c++] = TTM_PL_MASK_CACHING | TTM_PL_FLAG_SYSTEM;
81 if (!c)
82 rbo->placements[c++] = TTM_PL_MASK_CACHING | TTM_PL_FLAG_SYSTEM;
74 rbo->placement.num_placement = c; 83 rbo->placement.num_placement = c;
75 rbo->placement.num_busy_placement = c; 84 rbo->placement.num_busy_placement = c;
76} 85}
@@ -211,9 +220,11 @@ int radeon_bo_unpin(struct radeon_bo *bo)
211 220
212int radeon_bo_evict_vram(struct radeon_device *rdev) 221int radeon_bo_evict_vram(struct radeon_device *rdev)
213{ 222{
214 if (rdev->flags & RADEON_IS_IGP) { 223 /* late 2.6.33 fix IGP hibernate - we need pm ops to do this correct */
215 /* Useless to evict on IGP chips */ 224 if (0 && (rdev->flags & RADEON_IS_IGP)) {
216 return 0; 225 if (rdev->mc.igp_sideport_enabled == false)
226 /* Useless to evict on IGP chips */
227 return 0;
217 } 228 }
218 return ttm_bo_evict_mm(&rdev->mman.bdev, TTM_PL_VRAM); 229 return ttm_bo_evict_mm(&rdev->mman.bdev, TTM_PL_VRAM);
219} 230}
@@ -295,11 +306,10 @@ void radeon_bo_list_unreserve(struct list_head *head)
295 } 306 }
296} 307}
297 308
298int radeon_bo_list_validate(struct list_head *head, void *fence) 309int radeon_bo_list_validate(struct list_head *head)
299{ 310{
300 struct radeon_bo_list *lobj; 311 struct radeon_bo_list *lobj;
301 struct radeon_bo *bo; 312 struct radeon_bo *bo;
302 struct radeon_fence *old_fence = NULL;
303 int r; 313 int r;
304 314
305 r = radeon_bo_list_reserve(head); 315 r = radeon_bo_list_reserve(head);
@@ -323,32 +333,27 @@ int radeon_bo_list_validate(struct list_head *head, void *fence)
323 } 333 }
324 lobj->gpu_offset = radeon_bo_gpu_offset(bo); 334 lobj->gpu_offset = radeon_bo_gpu_offset(bo);
325 lobj->tiling_flags = bo->tiling_flags; 335 lobj->tiling_flags = bo->tiling_flags;
326 if (fence) {
327 old_fence = (struct radeon_fence *)bo->tbo.sync_obj;
328 bo->tbo.sync_obj = radeon_fence_ref(fence);
329 bo->tbo.sync_obj_arg = NULL;
330 }
331 if (old_fence) {
332 radeon_fence_unref(&old_fence);
333 }
334 } 336 }
335 return 0; 337 return 0;
336} 338}
337 339
338void radeon_bo_list_unvalidate(struct list_head *head, void *fence) 340void radeon_bo_list_fence(struct list_head *head, void *fence)
339{ 341{
340 struct radeon_bo_list *lobj; 342 struct radeon_bo_list *lobj;
341 struct radeon_fence *old_fence; 343 struct radeon_bo *bo;
342 344 struct radeon_fence *old_fence = NULL;
343 if (fence) 345
344 list_for_each_entry(lobj, head, list) { 346 list_for_each_entry(lobj, head, list) {
345 old_fence = to_radeon_fence(lobj->bo->tbo.sync_obj); 347 bo = lobj->bo;
346 if (old_fence == fence) { 348 spin_lock(&bo->tbo.lock);
347 lobj->bo->tbo.sync_obj = NULL; 349 old_fence = (struct radeon_fence *)bo->tbo.sync_obj;
348 radeon_fence_unref(&old_fence); 350 bo->tbo.sync_obj = radeon_fence_ref(fence);
349 } 351 bo->tbo.sync_obj_arg = NULL;
352 spin_unlock(&bo->tbo.lock);
353 if (old_fence) {
354 radeon_fence_unref(&old_fence);
350 } 355 }
351 radeon_bo_list_unreserve(head); 356 }
352} 357}
353 358
354int radeon_bo_fbdev_mmap(struct radeon_bo *bo, 359int radeon_bo_fbdev_mmap(struct radeon_bo *bo,
@@ -481,14 +486,20 @@ int radeon_bo_check_tiling(struct radeon_bo *bo, bool has_moved,
481} 486}
482 487
483void radeon_bo_move_notify(struct ttm_buffer_object *bo, 488void radeon_bo_move_notify(struct ttm_buffer_object *bo,
484 struct ttm_mem_reg *mem) 489 struct ttm_mem_reg *mem)
485{ 490{
486 struct radeon_bo *rbo = container_of(bo, struct radeon_bo, tbo); 491 struct radeon_bo *rbo;
492 if (!radeon_ttm_bo_is_radeon_bo(bo))
493 return;
494 rbo = container_of(bo, struct radeon_bo, tbo);
487 radeon_bo_check_tiling(rbo, 0, 1); 495 radeon_bo_check_tiling(rbo, 0, 1);
488} 496}
489 497
490void radeon_bo_fault_reserve_notify(struct ttm_buffer_object *bo) 498void radeon_bo_fault_reserve_notify(struct ttm_buffer_object *bo)
491{ 499{
492 struct radeon_bo *rbo = container_of(bo, struct radeon_bo, tbo); 500 struct radeon_bo *rbo;
501 if (!radeon_ttm_bo_is_radeon_bo(bo))
502 return;
503 rbo = container_of(bo, struct radeon_bo, tbo);
493 radeon_bo_check_tiling(rbo, 0, 0); 504 radeon_bo_check_tiling(rbo, 0, 0);
494} 505}
diff --git a/drivers/gpu/drm/radeon/radeon_object.h b/drivers/gpu/drm/radeon/radeon_object.h
index f6b69c2c0d00..7ab43de1e244 100644
--- a/drivers/gpu/drm/radeon/radeon_object.h
+++ b/drivers/gpu/drm/radeon/radeon_object.h
@@ -59,19 +59,17 @@ static inline unsigned radeon_mem_type_to_domain(u32 mem_type)
59 * 59 *
60 * Returns: 60 * Returns:
61 * -EBUSY: buffer is busy and @no_wait is true 61 * -EBUSY: buffer is busy and @no_wait is true
62 * -ERESTART: A wait for the buffer to become unreserved was interrupted by 62 * -ERESTARTSYS: A wait for the buffer to become unreserved was interrupted by
63 * a signal. Release all buffer reservations and return to user-space. 63 * a signal. Release all buffer reservations and return to user-space.
64 */ 64 */
65static inline int radeon_bo_reserve(struct radeon_bo *bo, bool no_wait) 65static inline int radeon_bo_reserve(struct radeon_bo *bo, bool no_wait)
66{ 66{
67 int r; 67 int r;
68 68
69retry:
70 r = ttm_bo_reserve(&bo->tbo, true, no_wait, false, 0); 69 r = ttm_bo_reserve(&bo->tbo, true, no_wait, false, 0);
71 if (unlikely(r != 0)) { 70 if (unlikely(r != 0)) {
72 if (r == -ERESTART) 71 if (r != -ERESTARTSYS)
73 goto retry; 72 dev_err(bo->rdev->dev, "%p reserve failed\n", bo);
74 dev_err(bo->rdev->dev, "%p reserve failed\n", bo);
75 return r; 73 return r;
76 } 74 }
77 return 0; 75 return 0;
@@ -125,12 +123,10 @@ static inline int radeon_bo_wait(struct radeon_bo *bo, u32 *mem_type,
125{ 123{
126 int r; 124 int r;
127 125
128retry:
129 r = ttm_bo_reserve(&bo->tbo, true, no_wait, false, 0); 126 r = ttm_bo_reserve(&bo->tbo, true, no_wait, false, 0);
130 if (unlikely(r != 0)) { 127 if (unlikely(r != 0)) {
131 if (r == -ERESTART) 128 if (r != -ERESTARTSYS)
132 goto retry; 129 dev_err(bo->rdev->dev, "%p reserve failed for wait\n", bo);
133 dev_err(bo->rdev->dev, "%p reserve failed for wait\n", bo);
134 return r; 130 return r;
135 } 131 }
136 spin_lock(&bo->tbo.lock); 132 spin_lock(&bo->tbo.lock);
@@ -140,8 +136,6 @@ retry:
140 r = ttm_bo_wait(&bo->tbo, true, true, no_wait); 136 r = ttm_bo_wait(&bo->tbo, true, true, no_wait);
141 spin_unlock(&bo->tbo.lock); 137 spin_unlock(&bo->tbo.lock);
142 ttm_bo_unreserve(&bo->tbo); 138 ttm_bo_unreserve(&bo->tbo);
143 if (unlikely(r == -ERESTART))
144 goto retry;
145 return r; 139 return r;
146} 140}
147 141
@@ -162,8 +156,8 @@ extern void radeon_bo_list_add_object(struct radeon_bo_list *lobj,
162 struct list_head *head); 156 struct list_head *head);
163extern int radeon_bo_list_reserve(struct list_head *head); 157extern int radeon_bo_list_reserve(struct list_head *head);
164extern void radeon_bo_list_unreserve(struct list_head *head); 158extern void radeon_bo_list_unreserve(struct list_head *head);
165extern int radeon_bo_list_validate(struct list_head *head, void *fence); 159extern int radeon_bo_list_validate(struct list_head *head);
166extern void radeon_bo_list_unvalidate(struct list_head *head, void *fence); 160extern void radeon_bo_list_fence(struct list_head *head, void *fence);
167extern int radeon_bo_fbdev_mmap(struct radeon_bo *bo, 161extern int radeon_bo_fbdev_mmap(struct radeon_bo *bo,
168 struct vm_area_struct *vma); 162 struct vm_area_struct *vma);
169extern int radeon_bo_set_tiling_flags(struct radeon_bo *bo, 163extern int radeon_bo_set_tiling_flags(struct radeon_bo *bo,
diff --git a/drivers/gpu/drm/radeon/radeon_pm.c b/drivers/gpu/drm/radeon/radeon_pm.c
index 34b08d307c81..8bce64cdc320 100644
--- a/drivers/gpu/drm/radeon/radeon_pm.c
+++ b/drivers/gpu/drm/radeon/radeon_pm.c
@@ -44,8 +44,11 @@ static int radeon_debugfs_pm_info(struct seq_file *m, void *data)
44 struct drm_device *dev = node->minor->dev; 44 struct drm_device *dev = node->minor->dev;
45 struct radeon_device *rdev = dev->dev_private; 45 struct radeon_device *rdev = dev->dev_private;
46 46
47 seq_printf(m, "engine clock: %u0 kHz\n", radeon_get_engine_clock(rdev)); 47 seq_printf(m, "default engine clock: %u0 kHz\n", rdev->clock.default_sclk);
48 seq_printf(m, "memory clock: %u0 kHz\n", radeon_get_memory_clock(rdev)); 48 seq_printf(m, "current engine clock: %u0 kHz\n", radeon_get_engine_clock(rdev));
49 seq_printf(m, "default memory clock: %u0 kHz\n", rdev->clock.default_mclk);
50 if (rdev->asic->get_memory_clock)
51 seq_printf(m, "current memory clock: %u0 kHz\n", radeon_get_memory_clock(rdev));
49 52
50 return 0; 53 return 0;
51} 54}
diff --git a/drivers/gpu/drm/radeon/radeon_ring.c b/drivers/gpu/drm/radeon/radeon_ring.c
index 4d12b2d17b4d..6579eb4c1f28 100644
--- a/drivers/gpu/drm/radeon/radeon_ring.c
+++ b/drivers/gpu/drm/radeon/radeon_ring.c
@@ -41,68 +41,55 @@ int radeon_ib_get(struct radeon_device *rdev, struct radeon_ib **ib)
41{ 41{
42 struct radeon_fence *fence; 42 struct radeon_fence *fence;
43 struct radeon_ib *nib; 43 struct radeon_ib *nib;
44 unsigned long i; 44 int r = 0, i, c;
45 int r = 0;
46 45
47 *ib = NULL; 46 *ib = NULL;
48 r = radeon_fence_create(rdev, &fence); 47 r = radeon_fence_create(rdev, &fence);
49 if (r) { 48 if (r) {
50 DRM_ERROR("failed to create fence for new IB\n"); 49 dev_err(rdev->dev, "failed to create fence for new IB\n");
51 return r; 50 return r;
52 } 51 }
53 mutex_lock(&rdev->ib_pool.mutex); 52 mutex_lock(&rdev->ib_pool.mutex);
54 i = find_first_zero_bit(rdev->ib_pool.alloc_bm, RADEON_IB_POOL_SIZE); 53 for (i = rdev->ib_pool.head_id, c = 0, nib = NULL; c < RADEON_IB_POOL_SIZE; c++, i++) {
55 if (i < RADEON_IB_POOL_SIZE) { 54 i &= (RADEON_IB_POOL_SIZE - 1);
56 set_bit(i, rdev->ib_pool.alloc_bm); 55 if (rdev->ib_pool.ibs[i].free) {
57 rdev->ib_pool.ibs[i].length_dw = 0; 56 nib = &rdev->ib_pool.ibs[i];
58 *ib = &rdev->ib_pool.ibs[i]; 57 break;
59 mutex_unlock(&rdev->ib_pool.mutex); 58 }
60 goto out;
61 } 59 }
62 if (list_empty(&rdev->ib_pool.scheduled_ibs)) { 60 if (nib == NULL) {
63 /* we go do nothings here */ 61 /* This should never happen, it means we allocated all
62 * IB and haven't scheduled one yet, return EBUSY to
63 * userspace hoping that on ioctl recall we get better
64 * luck
65 */
66 dev_err(rdev->dev, "no free indirect buffer !\n");
64 mutex_unlock(&rdev->ib_pool.mutex); 67 mutex_unlock(&rdev->ib_pool.mutex);
65 DRM_ERROR("all IB allocated none scheduled.\n"); 68 radeon_fence_unref(&fence);
66 r = -EINVAL; 69 return -EBUSY;
67 goto out;
68 } 70 }
69 /* get the first ib on the scheduled list */ 71 rdev->ib_pool.head_id = (nib->idx + 1) & (RADEON_IB_POOL_SIZE - 1);
70 nib = list_entry(rdev->ib_pool.scheduled_ibs.next, 72 nib->free = false;
71 struct radeon_ib, list); 73 if (nib->fence) {
72 if (nib->fence == NULL) {
73 /* we go do nothings here */
74 mutex_unlock(&rdev->ib_pool.mutex); 74 mutex_unlock(&rdev->ib_pool.mutex);
75 DRM_ERROR("IB %lu scheduled without a fence.\n", nib->idx); 75 r = radeon_fence_wait(nib->fence, false);
76 r = -EINVAL; 76 if (r) {
77 goto out; 77 dev_err(rdev->dev, "error waiting fence of IB(%u:0x%016lX:%u)\n",
78 } 78 nib->idx, (unsigned long)nib->gpu_addr, nib->length_dw);
79 mutex_unlock(&rdev->ib_pool.mutex); 79 mutex_lock(&rdev->ib_pool.mutex);
80 80 nib->free = true;
81 r = radeon_fence_wait(nib->fence, false); 81 mutex_unlock(&rdev->ib_pool.mutex);
82 if (r) { 82 radeon_fence_unref(&fence);
83 DRM_ERROR("radeon: IB(%lu:0x%016lX:%u)\n", nib->idx, 83 return r;
84 (unsigned long)nib->gpu_addr, nib->length_dw); 84 }
85 DRM_ERROR("radeon: GPU lockup detected, fail to get a IB\n"); 85 mutex_lock(&rdev->ib_pool.mutex);
86 goto out;
87 } 86 }
88 radeon_fence_unref(&nib->fence); 87 radeon_fence_unref(&nib->fence);
89 88 nib->fence = fence;
90 nib->length_dw = 0; 89 nib->length_dw = 0;
91
92 /* scheduled list is accessed here */
93 mutex_lock(&rdev->ib_pool.mutex);
94 list_del(&nib->list);
95 INIT_LIST_HEAD(&nib->list);
96 mutex_unlock(&rdev->ib_pool.mutex); 90 mutex_unlock(&rdev->ib_pool.mutex);
97
98 *ib = nib; 91 *ib = nib;
99out: 92 return 0;
100 if (r) {
101 radeon_fence_unref(&fence);
102 } else {
103 (*ib)->fence = fence;
104 }
105 return r;
106} 93}
107 94
108void radeon_ib_free(struct radeon_device *rdev, struct radeon_ib **ib) 95void radeon_ib_free(struct radeon_device *rdev, struct radeon_ib **ib)
@@ -113,19 +100,10 @@ void radeon_ib_free(struct radeon_device *rdev, struct radeon_ib **ib)
113 if (tmp == NULL) { 100 if (tmp == NULL) {
114 return; 101 return;
115 } 102 }
116 mutex_lock(&rdev->ib_pool.mutex); 103 if (!tmp->fence->emited)
117 if (!list_empty(&tmp->list) && !radeon_fence_signaled(tmp->fence)) {
118 /* IB is scheduled & not signaled don't do anythings */
119 mutex_unlock(&rdev->ib_pool.mutex);
120 return;
121 }
122 list_del(&tmp->list);
123 INIT_LIST_HEAD(&tmp->list);
124 if (tmp->fence)
125 radeon_fence_unref(&tmp->fence); 104 radeon_fence_unref(&tmp->fence);
126 105 mutex_lock(&rdev->ib_pool.mutex);
127 tmp->length_dw = 0; 106 tmp->free = true;
128 clear_bit(tmp->idx, rdev->ib_pool.alloc_bm);
129 mutex_unlock(&rdev->ib_pool.mutex); 107 mutex_unlock(&rdev->ib_pool.mutex);
130} 108}
131 109
@@ -135,7 +113,7 @@ int radeon_ib_schedule(struct radeon_device *rdev, struct radeon_ib *ib)
135 113
136 if (!ib->length_dw || !rdev->cp.ready) { 114 if (!ib->length_dw || !rdev->cp.ready) {
137 /* TODO: Nothings in the ib we should report. */ 115 /* TODO: Nothings in the ib we should report. */
138 DRM_ERROR("radeon: couldn't schedule IB(%lu).\n", ib->idx); 116 DRM_ERROR("radeon: couldn't schedule IB(%u).\n", ib->idx);
139 return -EINVAL; 117 return -EINVAL;
140 } 118 }
141 119
@@ -148,7 +126,8 @@ int radeon_ib_schedule(struct radeon_device *rdev, struct radeon_ib *ib)
148 radeon_ring_ib_execute(rdev, ib); 126 radeon_ring_ib_execute(rdev, ib);
149 radeon_fence_emit(rdev, ib->fence); 127 radeon_fence_emit(rdev, ib->fence);
150 mutex_lock(&rdev->ib_pool.mutex); 128 mutex_lock(&rdev->ib_pool.mutex);
151 list_add_tail(&ib->list, &rdev->ib_pool.scheduled_ibs); 129 /* once scheduled IB is considered free and protected by the fence */
130 ib->free = true;
152 mutex_unlock(&rdev->ib_pool.mutex); 131 mutex_unlock(&rdev->ib_pool.mutex);
153 radeon_ring_unlock_commit(rdev); 132 radeon_ring_unlock_commit(rdev);
154 return 0; 133 return 0;
@@ -164,7 +143,6 @@ int radeon_ib_pool_init(struct radeon_device *rdev)
164 if (rdev->ib_pool.robj) 143 if (rdev->ib_pool.robj)
165 return 0; 144 return 0;
166 /* Allocate 1M object buffer */ 145 /* Allocate 1M object buffer */
167 INIT_LIST_HEAD(&rdev->ib_pool.scheduled_ibs);
168 r = radeon_bo_create(rdev, NULL, RADEON_IB_POOL_SIZE*64*1024, 146 r = radeon_bo_create(rdev, NULL, RADEON_IB_POOL_SIZE*64*1024,
169 true, RADEON_GEM_DOMAIN_GTT, 147 true, RADEON_GEM_DOMAIN_GTT,
170 &rdev->ib_pool.robj); 148 &rdev->ib_pool.robj);
@@ -195,9 +173,9 @@ int radeon_ib_pool_init(struct radeon_device *rdev)
195 rdev->ib_pool.ibs[i].ptr = ptr + offset; 173 rdev->ib_pool.ibs[i].ptr = ptr + offset;
196 rdev->ib_pool.ibs[i].idx = i; 174 rdev->ib_pool.ibs[i].idx = i;
197 rdev->ib_pool.ibs[i].length_dw = 0; 175 rdev->ib_pool.ibs[i].length_dw = 0;
198 INIT_LIST_HEAD(&rdev->ib_pool.ibs[i].list); 176 rdev->ib_pool.ibs[i].free = true;
199 } 177 }
200 bitmap_zero(rdev->ib_pool.alloc_bm, RADEON_IB_POOL_SIZE); 178 rdev->ib_pool.head_id = 0;
201 rdev->ib_pool.ready = true; 179 rdev->ib_pool.ready = true;
202 DRM_INFO("radeon: ib pool ready.\n"); 180 DRM_INFO("radeon: ib pool ready.\n");
203 if (radeon_debugfs_ib_init(rdev)) { 181 if (radeon_debugfs_ib_init(rdev)) {
@@ -214,7 +192,6 @@ void radeon_ib_pool_fini(struct radeon_device *rdev)
214 return; 192 return;
215 } 193 }
216 mutex_lock(&rdev->ib_pool.mutex); 194 mutex_lock(&rdev->ib_pool.mutex);
217 bitmap_zero(rdev->ib_pool.alloc_bm, RADEON_IB_POOL_SIZE);
218 if (rdev->ib_pool.robj) { 195 if (rdev->ib_pool.robj) {
219 r = radeon_bo_reserve(rdev->ib_pool.robj, false); 196 r = radeon_bo_reserve(rdev->ib_pool.robj, false);
220 if (likely(r == 0)) { 197 if (likely(r == 0)) {
@@ -363,7 +340,7 @@ static int radeon_debugfs_ib_info(struct seq_file *m, void *data)
363 if (ib == NULL) { 340 if (ib == NULL) {
364 return 0; 341 return 0;
365 } 342 }
366 seq_printf(m, "IB %04lu\n", ib->idx); 343 seq_printf(m, "IB %04u\n", ib->idx);
367 seq_printf(m, "IB fence %p\n", ib->fence); 344 seq_printf(m, "IB fence %p\n", ib->fence);
368 seq_printf(m, "IB size %05u dwords\n", ib->length_dw); 345 seq_printf(m, "IB size %05u dwords\n", ib->length_dw);
369 for (i = 0; i < ib->length_dw; i++) { 346 for (i = 0; i < ib->length_dw; i++) {
diff --git a/drivers/gpu/drm/radeon/radeon_test.c b/drivers/gpu/drm/radeon/radeon_test.c
index 391c973ec4db..9f5e2f929da9 100644
--- a/drivers/gpu/drm/radeon/radeon_test.c
+++ b/drivers/gpu/drm/radeon/radeon_test.c
@@ -42,8 +42,8 @@ void radeon_test_moves(struct radeon_device *rdev)
42 /* Number of tests = 42 /* Number of tests =
43 * (Total GTT - IB pool - writeback page - ring buffer) / test size 43 * (Total GTT - IB pool - writeback page - ring buffer) / test size
44 */ 44 */
45 n = (rdev->mc.gtt_size - RADEON_IB_POOL_SIZE*64*1024 - RADEON_GPU_PAGE_SIZE - 45 n = ((u32)(rdev->mc.gtt_size - RADEON_IB_POOL_SIZE*64*1024 - RADEON_GPU_PAGE_SIZE -
46 rdev->cp.ring_size) / size; 46 rdev->cp.ring_size)) / size;
47 47
48 gtt_obj = kzalloc(n * sizeof(*gtt_obj), GFP_KERNEL); 48 gtt_obj = kzalloc(n * sizeof(*gtt_obj), GFP_KERNEL);
49 if (!gtt_obj) { 49 if (!gtt_obj) {
diff --git a/drivers/gpu/drm/radeon/radeon_ttm.c b/drivers/gpu/drm/radeon/radeon_ttm.c
index 5a19d529d1c0..58b5adf974ca 100644
--- a/drivers/gpu/drm/radeon/radeon_ttm.c
+++ b/drivers/gpu/drm/radeon/radeon_ttm.c
@@ -200,10 +200,25 @@ static int radeon_init_mem_type(struct ttm_bo_device *bdev, uint32_t type,
200static void radeon_evict_flags(struct ttm_buffer_object *bo, 200static void radeon_evict_flags(struct ttm_buffer_object *bo,
201 struct ttm_placement *placement) 201 struct ttm_placement *placement)
202{ 202{
203 struct radeon_bo *rbo = container_of(bo, struct radeon_bo, tbo); 203 struct radeon_bo *rbo;
204 static u32 placements = TTM_PL_MASK_CACHING | TTM_PL_FLAG_SYSTEM;
205
206 if (!radeon_ttm_bo_is_radeon_bo(bo)) {
207 placement->fpfn = 0;
208 placement->lpfn = 0;
209 placement->placement = &placements;
210 placement->busy_placement = &placements;
211 placement->num_placement = 1;
212 placement->num_busy_placement = 1;
213 return;
214 }
215 rbo = container_of(bo, struct radeon_bo, tbo);
204 switch (bo->mem.mem_type) { 216 switch (bo->mem.mem_type) {
205 case TTM_PL_VRAM: 217 case TTM_PL_VRAM:
206 radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_GTT); 218 if (rbo->rdev->cp.ready == false)
219 radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_CPU);
220 else
221 radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_GTT);
207 break; 222 break;
208 case TTM_PL_TT: 223 case TTM_PL_TT:
209 default: 224 default:
@@ -482,6 +497,7 @@ int radeon_ttm_init(struct radeon_device *rdev)
482 DRM_ERROR("failed initializing buffer object driver(%d).\n", r); 497 DRM_ERROR("failed initializing buffer object driver(%d).\n", r);
483 return r; 498 return r;
484 } 499 }
500 rdev->mman.initialized = true;
485 r = ttm_bo_init_mm(&rdev->mman.bdev, TTM_PL_VRAM, 501 r = ttm_bo_init_mm(&rdev->mman.bdev, TTM_PL_VRAM,
486 rdev->mc.real_vram_size >> PAGE_SHIFT); 502 rdev->mc.real_vram_size >> PAGE_SHIFT);
487 if (r) { 503 if (r) {
@@ -529,6 +545,8 @@ void radeon_ttm_fini(struct radeon_device *rdev)
529{ 545{
530 int r; 546 int r;
531 547
548 if (!rdev->mman.initialized)
549 return;
532 if (rdev->stollen_vga_memory) { 550 if (rdev->stollen_vga_memory) {
533 r = radeon_bo_reserve(rdev->stollen_vga_memory, false); 551 r = radeon_bo_reserve(rdev->stollen_vga_memory, false);
534 if (r == 0) { 552 if (r == 0) {
@@ -542,6 +560,7 @@ void radeon_ttm_fini(struct radeon_device *rdev)
542 ttm_bo_device_release(&rdev->mman.bdev); 560 ttm_bo_device_release(&rdev->mman.bdev);
543 radeon_gart_fini(rdev); 561 radeon_gart_fini(rdev);
544 radeon_ttm_global_fini(rdev); 562 radeon_ttm_global_fini(rdev);
563 rdev->mman.initialized = false;
545 DRM_INFO("radeon: ttm finalized\n"); 564 DRM_INFO("radeon: ttm finalized\n");
546} 565}
547 566
diff --git a/drivers/gpu/drm/radeon/reg_srcs/r200 b/drivers/gpu/drm/radeon/reg_srcs/r200
index 6021c8849a16..c29ac434ac9c 100644
--- a/drivers/gpu/drm/radeon/reg_srcs/r200
+++ b/drivers/gpu/drm/radeon/reg_srcs/r200
@@ -91,6 +91,8 @@ r200 0x3294
910x22b8 SE_TCL_TEX_CYL_WRAP_CTL 910x22b8 SE_TCL_TEX_CYL_WRAP_CTL
920x22c0 SE_TCL_UCP_VERT_BLEND_CNTL 920x22c0 SE_TCL_UCP_VERT_BLEND_CNTL
930x22c4 SE_TCL_POINT_SPRITE_CNTL 930x22c4 SE_TCL_POINT_SPRITE_CNTL
940x22d0 SE_PVS_CNTL
950x22d4 SE_PVS_CONST_CNTL
940x2648 RE_POINTSIZE 960x2648 RE_POINTSIZE
950x26c0 RE_TOP_LEFT 970x26c0 RE_TOP_LEFT
960x26c4 RE_MISC 980x26c4 RE_MISC
diff --git a/drivers/gpu/drm/radeon/reg_srcs/r420 b/drivers/gpu/drm/radeon/reg_srcs/r420
new file mode 100644
index 000000000000..989f7a020832
--- /dev/null
+++ b/drivers/gpu/drm/radeon/reg_srcs/r420
@@ -0,0 +1,795 @@
1r420 0x4f60
20x1434 SRC_Y_X
30x1438 DST_Y_X
40x143C DST_HEIGHT_WIDTH
50x146C DP_GUI_MASTER_CNTL
60x1474 BRUSH_Y_X
70x1478 DP_BRUSH_BKGD_CLR
80x147C DP_BRUSH_FRGD_CLR
90x1480 BRUSH_DATA0
100x1484 BRUSH_DATA1
110x1598 DST_WIDTH_HEIGHT
120x15C0 CLR_CMP_CNTL
130x15C4 CLR_CMP_CLR_SRC
140x15C8 CLR_CMP_CLR_DST
150x15CC CLR_CMP_MSK
160x15D8 DP_SRC_FRGD_CLR
170x15DC DP_SRC_BKGD_CLR
180x1600 DST_LINE_START
190x1604 DST_LINE_END
200x1608 DST_LINE_PATCOUNT
210x16C0 DP_CNTL
220x16CC DP_WRITE_MSK
230x16D0 DP_CNTL_XDIR_YDIR_YMAJOR
240x16E8 DEFAULT_SC_BOTTOM_RIGHT
250x16EC SC_TOP_LEFT
260x16F0 SC_BOTTOM_RIGHT
270x16F4 SRC_SC_BOTTOM_RIGHT
280x1714 DSTCACHE_CTLSTAT
290x1720 WAIT_UNTIL
300x172C RBBM_GUICNTL
310x1D98 VAP_VPORT_XSCALE
320x1D9C VAP_VPORT_XOFFSET
330x1DA0 VAP_VPORT_YSCALE
340x1DA4 VAP_VPORT_YOFFSET
350x1DA8 VAP_VPORT_ZSCALE
360x1DAC VAP_VPORT_ZOFFSET
370x2080 VAP_CNTL
380x2090 VAP_OUT_VTX_FMT_0
390x2094 VAP_OUT_VTX_FMT_1
400x20B0 VAP_VTE_CNTL
410x2138 VAP_VF_MIN_VTX_INDX
420x2140 VAP_CNTL_STATUS
430x2150 VAP_PROG_STREAM_CNTL_0
440x2154 VAP_PROG_STREAM_CNTL_1
450x2158 VAP_PROG_STREAM_CNTL_2
460x215C VAP_PROG_STREAM_CNTL_3
470x2160 VAP_PROG_STREAM_CNTL_4
480x2164 VAP_PROG_STREAM_CNTL_5
490x2168 VAP_PROG_STREAM_CNTL_6
500x216C VAP_PROG_STREAM_CNTL_7
510x2180 VAP_VTX_STATE_CNTL
520x2184 VAP_VSM_VTX_ASSM
530x2188 VAP_VTX_STATE_IND_REG_0
540x218C VAP_VTX_STATE_IND_REG_1
550x2190 VAP_VTX_STATE_IND_REG_2
560x2194 VAP_VTX_STATE_IND_REG_3
570x2198 VAP_VTX_STATE_IND_REG_4
580x219C VAP_VTX_STATE_IND_REG_5
590x21A0 VAP_VTX_STATE_IND_REG_6
600x21A4 VAP_VTX_STATE_IND_REG_7
610x21A8 VAP_VTX_STATE_IND_REG_8
620x21AC VAP_VTX_STATE_IND_REG_9
630x21B0 VAP_VTX_STATE_IND_REG_10
640x21B4 VAP_VTX_STATE_IND_REG_11
650x21B8 VAP_VTX_STATE_IND_REG_12
660x21BC VAP_VTX_STATE_IND_REG_13
670x21C0 VAP_VTX_STATE_IND_REG_14
680x21C4 VAP_VTX_STATE_IND_REG_15
690x21DC VAP_PSC_SGN_NORM_CNTL
700x21E0 VAP_PROG_STREAM_CNTL_EXT_0
710x21E4 VAP_PROG_STREAM_CNTL_EXT_1
720x21E8 VAP_PROG_STREAM_CNTL_EXT_2
730x21EC VAP_PROG_STREAM_CNTL_EXT_3
740x21F0 VAP_PROG_STREAM_CNTL_EXT_4
750x21F4 VAP_PROG_STREAM_CNTL_EXT_5
760x21F8 VAP_PROG_STREAM_CNTL_EXT_6
770x21FC VAP_PROG_STREAM_CNTL_EXT_7
780x2200 VAP_PVS_VECTOR_INDX_REG
790x2204 VAP_PVS_VECTOR_DATA_REG
800x2208 VAP_PVS_VECTOR_DATA_REG_128
810x221C VAP_CLIP_CNTL
820x2220 VAP_GB_VERT_CLIP_ADJ
830x2224 VAP_GB_VERT_DISC_ADJ
840x2228 VAP_GB_HORZ_CLIP_ADJ
850x222C VAP_GB_HORZ_DISC_ADJ
860x2230 VAP_PVS_FLOW_CNTL_ADDRS_0
870x2234 VAP_PVS_FLOW_CNTL_ADDRS_1
880x2238 VAP_PVS_FLOW_CNTL_ADDRS_2
890x223C VAP_PVS_FLOW_CNTL_ADDRS_3
900x2240 VAP_PVS_FLOW_CNTL_ADDRS_4
910x2244 VAP_PVS_FLOW_CNTL_ADDRS_5
920x2248 VAP_PVS_FLOW_CNTL_ADDRS_6
930x224C VAP_PVS_FLOW_CNTL_ADDRS_7
940x2250 VAP_PVS_FLOW_CNTL_ADDRS_8
950x2254 VAP_PVS_FLOW_CNTL_ADDRS_9
960x2258 VAP_PVS_FLOW_CNTL_ADDRS_10
970x225C VAP_PVS_FLOW_CNTL_ADDRS_11
980x2260 VAP_PVS_FLOW_CNTL_ADDRS_12
990x2264 VAP_PVS_FLOW_CNTL_ADDRS_13
1000x2268 VAP_PVS_FLOW_CNTL_ADDRS_14
1010x226C VAP_PVS_FLOW_CNTL_ADDRS_15
1020x2284 VAP_PVS_STATE_FLUSH_REG
1030x2288 VAP_PVS_VTX_TIMEOUT_REG
1040x2290 VAP_PVS_FLOW_CNTL_LOOP_INDEX_0
1050x2294 VAP_PVS_FLOW_CNTL_LOOP_INDEX_1
1060x2298 VAP_PVS_FLOW_CNTL_LOOP_INDEX_2
1070x229C VAP_PVS_FLOW_CNTL_LOOP_INDEX_3
1080x22A0 VAP_PVS_FLOW_CNTL_LOOP_INDEX_4
1090x22A4 VAP_PVS_FLOW_CNTL_LOOP_INDEX_5
1100x22A8 VAP_PVS_FLOW_CNTL_LOOP_INDEX_6
1110x22AC VAP_PVS_FLOW_CNTL_LOOP_INDEX_7
1120x22B0 VAP_PVS_FLOW_CNTL_LOOP_INDEX_8
1130x22B4 VAP_PVS_FLOW_CNTL_LOOP_INDEX_9
1140x22B8 VAP_PVS_FLOW_CNTL_LOOP_INDEX_10
1150x22BC VAP_PVS_FLOW_CNTL_LOOP_INDEX_11
1160x22C0 VAP_PVS_FLOW_CNTL_LOOP_INDEX_12
1170x22C4 VAP_PVS_FLOW_CNTL_LOOP_INDEX_13
1180x22C8 VAP_PVS_FLOW_CNTL_LOOP_INDEX_14
1190x22CC VAP_PVS_FLOW_CNTL_LOOP_INDEX_15
1200x22D0 VAP_PVS_CODE_CNTL_0
1210x22D4 VAP_PVS_CONST_CNTL
1220x22D8 VAP_PVS_CODE_CNTL_1
1230x22DC VAP_PVS_FLOW_CNTL_OPC
1240x342C RB2D_DSTCACHE_CTLSTAT
1250x4000 GB_VAP_RASTER_VTX_FMT_0
1260x4004 GB_VAP_RASTER_VTX_FMT_1
1270x4008 GB_ENABLE
1280x401C GB_SELECT
1290x4020 GB_AA_CONFIG
1300x4024 GB_FIFO_SIZE
1310x4100 TX_INVALTAGS
1320x4200 GA_POINT_S0
1330x4204 GA_POINT_T0
1340x4208 GA_POINT_S1
1350x420C GA_POINT_T1
1360x4214 GA_TRIANGLE_STIPPLE
1370x421C GA_POINT_SIZE
1380x4230 GA_POINT_MINMAX
1390x4234 GA_LINE_CNTL
1400x4238 GA_LINE_STIPPLE_CONFIG
1410x4260 GA_LINE_STIPPLE_VALUE
1420x4264 GA_LINE_S0
1430x4268 GA_LINE_S1
1440x4278 GA_COLOR_CONTROL
1450x427C GA_SOLID_RG
1460x4280 GA_SOLID_BA
1470x4288 GA_POLY_MODE
1480x428C GA_ROUND_MODE
1490x4290 GA_OFFSET
1500x4294 GA_FOG_SCALE
1510x4298 GA_FOG_OFFSET
1520x42A0 SU_TEX_WRAP
1530x42A4 SU_POLY_OFFSET_FRONT_SCALE
1540x42A8 SU_POLY_OFFSET_FRONT_OFFSET
1550x42AC SU_POLY_OFFSET_BACK_SCALE
1560x42B0 SU_POLY_OFFSET_BACK_OFFSET
1570x42B4 SU_POLY_OFFSET_ENABLE
1580x42B8 SU_CULL_MODE
1590x42C0 SU_DEPTH_SCALE
1600x42C4 SU_DEPTH_OFFSET
1610x42C8 SU_REG_DEST
1620x4300 RS_COUNT
1630x4304 RS_INST_COUNT
1640x4310 RS_IP_0
1650x4314 RS_IP_1
1660x4318 RS_IP_2
1670x431C RS_IP_3
1680x4320 RS_IP_4
1690x4324 RS_IP_5
1700x4328 RS_IP_6
1710x432C RS_IP_7
1720x4330 RS_INST_0
1730x4334 RS_INST_1
1740x4338 RS_INST_2
1750x433C RS_INST_3
1760x4340 RS_INST_4
1770x4344 RS_INST_5
1780x4348 RS_INST_6
1790x434C RS_INST_7
1800x4350 RS_INST_8
1810x4354 RS_INST_9
1820x4358 RS_INST_10
1830x435C RS_INST_11
1840x4360 RS_INST_12
1850x4364 RS_INST_13
1860x4368 RS_INST_14
1870x436C RS_INST_15
1880x43A4 SC_HYPERZ_EN
1890x43A8 SC_EDGERULE
1900x43B0 SC_CLIP_0_A
1910x43B4 SC_CLIP_0_B
1920x43B8 SC_CLIP_1_A
1930x43BC SC_CLIP_1_B
1940x43C0 SC_CLIP_2_A
1950x43C4 SC_CLIP_2_B
1960x43C8 SC_CLIP_3_A
1970x43CC SC_CLIP_3_B
1980x43D0 SC_CLIP_RULE
1990x43E0 SC_SCISSOR0
2000x43E8 SC_SCREENDOOR
2010x4440 TX_FILTER1_0
2020x4444 TX_FILTER1_1
2030x4448 TX_FILTER1_2
2040x444C TX_FILTER1_3
2050x4450 TX_FILTER1_4
2060x4454 TX_FILTER1_5
2070x4458 TX_FILTER1_6
2080x445C TX_FILTER1_7
2090x4460 TX_FILTER1_8
2100x4464 TX_FILTER1_9
2110x4468 TX_FILTER1_10
2120x446C TX_FILTER1_11
2130x4470 TX_FILTER1_12
2140x4474 TX_FILTER1_13
2150x4478 TX_FILTER1_14
2160x447C TX_FILTER1_15
2170x4580 TX_CHROMA_KEY_0
2180x4584 TX_CHROMA_KEY_1
2190x4588 TX_CHROMA_KEY_2
2200x458C TX_CHROMA_KEY_3
2210x4590 TX_CHROMA_KEY_4
2220x4594 TX_CHROMA_KEY_5
2230x4598 TX_CHROMA_KEY_6
2240x459C TX_CHROMA_KEY_7
2250x45A0 TX_CHROMA_KEY_8
2260x45A4 TX_CHROMA_KEY_9
2270x45A8 TX_CHROMA_KEY_10
2280x45AC TX_CHROMA_KEY_11
2290x45B0 TX_CHROMA_KEY_12
2300x45B4 TX_CHROMA_KEY_13
2310x45B8 TX_CHROMA_KEY_14
2320x45BC TX_CHROMA_KEY_15
2330x45C0 TX_BORDER_COLOR_0
2340x45C4 TX_BORDER_COLOR_1
2350x45C8 TX_BORDER_COLOR_2
2360x45CC TX_BORDER_COLOR_3
2370x45D0 TX_BORDER_COLOR_4
2380x45D4 TX_BORDER_COLOR_5
2390x45D8 TX_BORDER_COLOR_6
2400x45DC TX_BORDER_COLOR_7
2410x45E0 TX_BORDER_COLOR_8
2420x45E4 TX_BORDER_COLOR_9
2430x45E8 TX_BORDER_COLOR_10
2440x45EC TX_BORDER_COLOR_11
2450x45F0 TX_BORDER_COLOR_12
2460x45F4 TX_BORDER_COLOR_13
2470x45F8 TX_BORDER_COLOR_14
2480x45FC TX_BORDER_COLOR_15
2490x4600 US_CONFIG
2500x4604 US_PIXSIZE
2510x4608 US_CODE_OFFSET
2520x460C US_RESET
2530x4610 US_CODE_ADDR_0
2540x4614 US_CODE_ADDR_1
2550x4618 US_CODE_ADDR_2
2560x461C US_CODE_ADDR_3
2570x4620 US_TEX_INST_0
2580x4624 US_TEX_INST_1
2590x4628 US_TEX_INST_2
2600x462C US_TEX_INST_3
2610x4630 US_TEX_INST_4
2620x4634 US_TEX_INST_5
2630x4638 US_TEX_INST_6
2640x463C US_TEX_INST_7
2650x4640 US_TEX_INST_8
2660x4644 US_TEX_INST_9
2670x4648 US_TEX_INST_10
2680x464C US_TEX_INST_11
2690x4650 US_TEX_INST_12
2700x4654 US_TEX_INST_13
2710x4658 US_TEX_INST_14
2720x465C US_TEX_INST_15
2730x4660 US_TEX_INST_16
2740x4664 US_TEX_INST_17
2750x4668 US_TEX_INST_18
2760x466C US_TEX_INST_19
2770x4670 US_TEX_INST_20
2780x4674 US_TEX_INST_21
2790x4678 US_TEX_INST_22
2800x467C US_TEX_INST_23
2810x4680 US_TEX_INST_24
2820x4684 US_TEX_INST_25
2830x4688 US_TEX_INST_26
2840x468C US_TEX_INST_27
2850x4690 US_TEX_INST_28
2860x4694 US_TEX_INST_29
2870x4698 US_TEX_INST_30
2880x469C US_TEX_INST_31
2890x46A4 US_OUT_FMT_0
2900x46A8 US_OUT_FMT_1
2910x46AC US_OUT_FMT_2
2920x46B0 US_OUT_FMT_3
2930x46B4 US_W_FMT
2940x46B8 US_CODE_BANK
2950x46BC US_CODE_EXT
2960x46C0 US_ALU_RGB_ADDR_0
2970x46C4 US_ALU_RGB_ADDR_1
2980x46C8 US_ALU_RGB_ADDR_2
2990x46CC US_ALU_RGB_ADDR_3
3000x46D0 US_ALU_RGB_ADDR_4
3010x46D4 US_ALU_RGB_ADDR_5
3020x46D8 US_ALU_RGB_ADDR_6
3030x46DC US_ALU_RGB_ADDR_7
3040x46E0 US_ALU_RGB_ADDR_8
3050x46E4 US_ALU_RGB_ADDR_9
3060x46E8 US_ALU_RGB_ADDR_10
3070x46EC US_ALU_RGB_ADDR_11
3080x46F0 US_ALU_RGB_ADDR_12
3090x46F4 US_ALU_RGB_ADDR_13
3100x46F8 US_ALU_RGB_ADDR_14
3110x46FC US_ALU_RGB_ADDR_15
3120x4700 US_ALU_RGB_ADDR_16
3130x4704 US_ALU_RGB_ADDR_17
3140x4708 US_ALU_RGB_ADDR_18
3150x470C US_ALU_RGB_ADDR_19
3160x4710 US_ALU_RGB_ADDR_20
3170x4714 US_ALU_RGB_ADDR_21
3180x4718 US_ALU_RGB_ADDR_22
3190x471C US_ALU_RGB_ADDR_23
3200x4720 US_ALU_RGB_ADDR_24
3210x4724 US_ALU_RGB_ADDR_25
3220x4728 US_ALU_RGB_ADDR_26
3230x472C US_ALU_RGB_ADDR_27
3240x4730 US_ALU_RGB_ADDR_28
3250x4734 US_ALU_RGB_ADDR_29
3260x4738 US_ALU_RGB_ADDR_30
3270x473C US_ALU_RGB_ADDR_31
3280x4740 US_ALU_RGB_ADDR_32
3290x4744 US_ALU_RGB_ADDR_33
3300x4748 US_ALU_RGB_ADDR_34
3310x474C US_ALU_RGB_ADDR_35
3320x4750 US_ALU_RGB_ADDR_36
3330x4754 US_ALU_RGB_ADDR_37
3340x4758 US_ALU_RGB_ADDR_38
3350x475C US_ALU_RGB_ADDR_39
3360x4760 US_ALU_RGB_ADDR_40
3370x4764 US_ALU_RGB_ADDR_41
3380x4768 US_ALU_RGB_ADDR_42
3390x476C US_ALU_RGB_ADDR_43
3400x4770 US_ALU_RGB_ADDR_44
3410x4774 US_ALU_RGB_ADDR_45
3420x4778 US_ALU_RGB_ADDR_46
3430x477C US_ALU_RGB_ADDR_47
3440x4780 US_ALU_RGB_ADDR_48
3450x4784 US_ALU_RGB_ADDR_49
3460x4788 US_ALU_RGB_ADDR_50
3470x478C US_ALU_RGB_ADDR_51
3480x4790 US_ALU_RGB_ADDR_52
3490x4794 US_ALU_RGB_ADDR_53
3500x4798 US_ALU_RGB_ADDR_54
3510x479C US_ALU_RGB_ADDR_55
3520x47A0 US_ALU_RGB_ADDR_56
3530x47A4 US_ALU_RGB_ADDR_57
3540x47A8 US_ALU_RGB_ADDR_58
3550x47AC US_ALU_RGB_ADDR_59
3560x47B0 US_ALU_RGB_ADDR_60
3570x47B4 US_ALU_RGB_ADDR_61
3580x47B8 US_ALU_RGB_ADDR_62
3590x47BC US_ALU_RGB_ADDR_63
3600x47C0 US_ALU_ALPHA_ADDR_0
3610x47C4 US_ALU_ALPHA_ADDR_1
3620x47C8 US_ALU_ALPHA_ADDR_2
3630x47CC US_ALU_ALPHA_ADDR_3
3640x47D0 US_ALU_ALPHA_ADDR_4
3650x47D4 US_ALU_ALPHA_ADDR_5
3660x47D8 US_ALU_ALPHA_ADDR_6
3670x47DC US_ALU_ALPHA_ADDR_7
3680x47E0 US_ALU_ALPHA_ADDR_8
3690x47E4 US_ALU_ALPHA_ADDR_9
3700x47E8 US_ALU_ALPHA_ADDR_10
3710x47EC US_ALU_ALPHA_ADDR_11
3720x47F0 US_ALU_ALPHA_ADDR_12
3730x47F4 US_ALU_ALPHA_ADDR_13
3740x47F8 US_ALU_ALPHA_ADDR_14
3750x47FC US_ALU_ALPHA_ADDR_15
3760x4800 US_ALU_ALPHA_ADDR_16
3770x4804 US_ALU_ALPHA_ADDR_17
3780x4808 US_ALU_ALPHA_ADDR_18
3790x480C US_ALU_ALPHA_ADDR_19
3800x4810 US_ALU_ALPHA_ADDR_20
3810x4814 US_ALU_ALPHA_ADDR_21
3820x4818 US_ALU_ALPHA_ADDR_22
3830x481C US_ALU_ALPHA_ADDR_23
3840x4820 US_ALU_ALPHA_ADDR_24
3850x4824 US_ALU_ALPHA_ADDR_25
3860x4828 US_ALU_ALPHA_ADDR_26
3870x482C US_ALU_ALPHA_ADDR_27
3880x4830 US_ALU_ALPHA_ADDR_28
3890x4834 US_ALU_ALPHA_ADDR_29
3900x4838 US_ALU_ALPHA_ADDR_30
3910x483C US_ALU_ALPHA_ADDR_31
3920x4840 US_ALU_ALPHA_ADDR_32
3930x4844 US_ALU_ALPHA_ADDR_33
3940x4848 US_ALU_ALPHA_ADDR_34
3950x484C US_ALU_ALPHA_ADDR_35
3960x4850 US_ALU_ALPHA_ADDR_36
3970x4854 US_ALU_ALPHA_ADDR_37
3980x4858 US_ALU_ALPHA_ADDR_38
3990x485C US_ALU_ALPHA_ADDR_39
4000x4860 US_ALU_ALPHA_ADDR_40
4010x4864 US_ALU_ALPHA_ADDR_41
4020x4868 US_ALU_ALPHA_ADDR_42
4030x486C US_ALU_ALPHA_ADDR_43
4040x4870 US_ALU_ALPHA_ADDR_44
4050x4874 US_ALU_ALPHA_ADDR_45
4060x4878 US_ALU_ALPHA_ADDR_46
4070x487C US_ALU_ALPHA_ADDR_47
4080x4880 US_ALU_ALPHA_ADDR_48
4090x4884 US_ALU_ALPHA_ADDR_49
4100x4888 US_ALU_ALPHA_ADDR_50
4110x488C US_ALU_ALPHA_ADDR_51
4120x4890 US_ALU_ALPHA_ADDR_52
4130x4894 US_ALU_ALPHA_ADDR_53
4140x4898 US_ALU_ALPHA_ADDR_54
4150x489C US_ALU_ALPHA_ADDR_55
4160x48A0 US_ALU_ALPHA_ADDR_56
4170x48A4 US_ALU_ALPHA_ADDR_57
4180x48A8 US_ALU_ALPHA_ADDR_58
4190x48AC US_ALU_ALPHA_ADDR_59
4200x48B0 US_ALU_ALPHA_ADDR_60
4210x48B4 US_ALU_ALPHA_ADDR_61
4220x48B8 US_ALU_ALPHA_ADDR_62
4230x48BC US_ALU_ALPHA_ADDR_63
4240x48C0 US_ALU_RGB_INST_0
4250x48C4 US_ALU_RGB_INST_1
4260x48C8 US_ALU_RGB_INST_2
4270x48CC US_ALU_RGB_INST_3
4280x48D0 US_ALU_RGB_INST_4
4290x48D4 US_ALU_RGB_INST_5
4300x48D8 US_ALU_RGB_INST_6
4310x48DC US_ALU_RGB_INST_7
4320x48E0 US_ALU_RGB_INST_8
4330x48E4 US_ALU_RGB_INST_9
4340x48E8 US_ALU_RGB_INST_10
4350x48EC US_ALU_RGB_INST_11
4360x48F0 US_ALU_RGB_INST_12
4370x48F4 US_ALU_RGB_INST_13
4380x48F8 US_ALU_RGB_INST_14
4390x48FC US_ALU_RGB_INST_15
4400x4900 US_ALU_RGB_INST_16
4410x4904 US_ALU_RGB_INST_17
4420x4908 US_ALU_RGB_INST_18
4430x490C US_ALU_RGB_INST_19
4440x4910 US_ALU_RGB_INST_20
4450x4914 US_ALU_RGB_INST_21
4460x4918 US_ALU_RGB_INST_22
4470x491C US_ALU_RGB_INST_23
4480x4920 US_ALU_RGB_INST_24
4490x4924 US_ALU_RGB_INST_25
4500x4928 US_ALU_RGB_INST_26
4510x492C US_ALU_RGB_INST_27
4520x4930 US_ALU_RGB_INST_28
4530x4934 US_ALU_RGB_INST_29
4540x4938 US_ALU_RGB_INST_30
4550x493C US_ALU_RGB_INST_31
4560x4940 US_ALU_RGB_INST_32
4570x4944 US_ALU_RGB_INST_33
4580x4948 US_ALU_RGB_INST_34
4590x494C US_ALU_RGB_INST_35
4600x4950 US_ALU_RGB_INST_36
4610x4954 US_ALU_RGB_INST_37
4620x4958 US_ALU_RGB_INST_38
4630x495C US_ALU_RGB_INST_39
4640x4960 US_ALU_RGB_INST_40
4650x4964 US_ALU_RGB_INST_41
4660x4968 US_ALU_RGB_INST_42
4670x496C US_ALU_RGB_INST_43
4680x4970 US_ALU_RGB_INST_44
4690x4974 US_ALU_RGB_INST_45
4700x4978 US_ALU_RGB_INST_46
4710x497C US_ALU_RGB_INST_47
4720x4980 US_ALU_RGB_INST_48
4730x4984 US_ALU_RGB_INST_49
4740x4988 US_ALU_RGB_INST_50
4750x498C US_ALU_RGB_INST_51
4760x4990 US_ALU_RGB_INST_52
4770x4994 US_ALU_RGB_INST_53
4780x4998 US_ALU_RGB_INST_54
4790x499C US_ALU_RGB_INST_55
4800x49A0 US_ALU_RGB_INST_56
4810x49A4 US_ALU_RGB_INST_57
4820x49A8 US_ALU_RGB_INST_58
4830x49AC US_ALU_RGB_INST_59
4840x49B0 US_ALU_RGB_INST_60
4850x49B4 US_ALU_RGB_INST_61
4860x49B8 US_ALU_RGB_INST_62
4870x49BC US_ALU_RGB_INST_63
4880x49C0 US_ALU_ALPHA_INST_0
4890x49C4 US_ALU_ALPHA_INST_1
4900x49C8 US_ALU_ALPHA_INST_2
4910x49CC US_ALU_ALPHA_INST_3
4920x49D0 US_ALU_ALPHA_INST_4
4930x49D4 US_ALU_ALPHA_INST_5
4940x49D8 US_ALU_ALPHA_INST_6
4950x49DC US_ALU_ALPHA_INST_7
4960x49E0 US_ALU_ALPHA_INST_8
4970x49E4 US_ALU_ALPHA_INST_9
4980x49E8 US_ALU_ALPHA_INST_10
4990x49EC US_ALU_ALPHA_INST_11
5000x49F0 US_ALU_ALPHA_INST_12
5010x49F4 US_ALU_ALPHA_INST_13
5020x49F8 US_ALU_ALPHA_INST_14
5030x49FC US_ALU_ALPHA_INST_15
5040x4A00 US_ALU_ALPHA_INST_16
5050x4A04 US_ALU_ALPHA_INST_17
5060x4A08 US_ALU_ALPHA_INST_18
5070x4A0C US_ALU_ALPHA_INST_19
5080x4A10 US_ALU_ALPHA_INST_20
5090x4A14 US_ALU_ALPHA_INST_21
5100x4A18 US_ALU_ALPHA_INST_22
5110x4A1C US_ALU_ALPHA_INST_23
5120x4A20 US_ALU_ALPHA_INST_24
5130x4A24 US_ALU_ALPHA_INST_25
5140x4A28 US_ALU_ALPHA_INST_26
5150x4A2C US_ALU_ALPHA_INST_27
5160x4A30 US_ALU_ALPHA_INST_28
5170x4A34 US_ALU_ALPHA_INST_29
5180x4A38 US_ALU_ALPHA_INST_30
5190x4A3C US_ALU_ALPHA_INST_31
5200x4A40 US_ALU_ALPHA_INST_32
5210x4A44 US_ALU_ALPHA_INST_33
5220x4A48 US_ALU_ALPHA_INST_34
5230x4A4C US_ALU_ALPHA_INST_35
5240x4A50 US_ALU_ALPHA_INST_36
5250x4A54 US_ALU_ALPHA_INST_37
5260x4A58 US_ALU_ALPHA_INST_38
5270x4A5C US_ALU_ALPHA_INST_39
5280x4A60 US_ALU_ALPHA_INST_40
5290x4A64 US_ALU_ALPHA_INST_41
5300x4A68 US_ALU_ALPHA_INST_42
5310x4A6C US_ALU_ALPHA_INST_43
5320x4A70 US_ALU_ALPHA_INST_44
5330x4A74 US_ALU_ALPHA_INST_45
5340x4A78 US_ALU_ALPHA_INST_46
5350x4A7C US_ALU_ALPHA_INST_47
5360x4A80 US_ALU_ALPHA_INST_48
5370x4A84 US_ALU_ALPHA_INST_49
5380x4A88 US_ALU_ALPHA_INST_50
5390x4A8C US_ALU_ALPHA_INST_51
5400x4A90 US_ALU_ALPHA_INST_52
5410x4A94 US_ALU_ALPHA_INST_53
5420x4A98 US_ALU_ALPHA_INST_54
5430x4A9C US_ALU_ALPHA_INST_55
5440x4AA0 US_ALU_ALPHA_INST_56
5450x4AA4 US_ALU_ALPHA_INST_57
5460x4AA8 US_ALU_ALPHA_INST_58
5470x4AAC US_ALU_ALPHA_INST_59
5480x4AB0 US_ALU_ALPHA_INST_60
5490x4AB4 US_ALU_ALPHA_INST_61
5500x4AB8 US_ALU_ALPHA_INST_62
5510x4ABC US_ALU_ALPHA_INST_63
5520x4AC0 US_ALU_EXT_ADDR_0
5530x4AC4 US_ALU_EXT_ADDR_1
5540x4AC8 US_ALU_EXT_ADDR_2
5550x4ACC US_ALU_EXT_ADDR_3
5560x4AD0 US_ALU_EXT_ADDR_4
5570x4AD4 US_ALU_EXT_ADDR_5
5580x4AD8 US_ALU_EXT_ADDR_6
5590x4ADC US_ALU_EXT_ADDR_7
5600x4AE0 US_ALU_EXT_ADDR_8
5610x4AE4 US_ALU_EXT_ADDR_9
5620x4AE8 US_ALU_EXT_ADDR_10
5630x4AEC US_ALU_EXT_ADDR_11
5640x4AF0 US_ALU_EXT_ADDR_12
5650x4AF4 US_ALU_EXT_ADDR_13
5660x4AF8 US_ALU_EXT_ADDR_14
5670x4AFC US_ALU_EXT_ADDR_15
5680x4B00 US_ALU_EXT_ADDR_16
5690x4B04 US_ALU_EXT_ADDR_17
5700x4B08 US_ALU_EXT_ADDR_18
5710x4B0C US_ALU_EXT_ADDR_19
5720x4B10 US_ALU_EXT_ADDR_20
5730x4B14 US_ALU_EXT_ADDR_21
5740x4B18 US_ALU_EXT_ADDR_22
5750x4B1C US_ALU_EXT_ADDR_23
5760x4B20 US_ALU_EXT_ADDR_24
5770x4B24 US_ALU_EXT_ADDR_25
5780x4B28 US_ALU_EXT_ADDR_26
5790x4B2C US_ALU_EXT_ADDR_27
5800x4B30 US_ALU_EXT_ADDR_28
5810x4B34 US_ALU_EXT_ADDR_29
5820x4B38 US_ALU_EXT_ADDR_30
5830x4B3C US_ALU_EXT_ADDR_31
5840x4B40 US_ALU_EXT_ADDR_32
5850x4B44 US_ALU_EXT_ADDR_33
5860x4B48 US_ALU_EXT_ADDR_34
5870x4B4C US_ALU_EXT_ADDR_35
5880x4B50 US_ALU_EXT_ADDR_36
5890x4B54 US_ALU_EXT_ADDR_37
5900x4B58 US_ALU_EXT_ADDR_38
5910x4B5C US_ALU_EXT_ADDR_39
5920x4B60 US_ALU_EXT_ADDR_40
5930x4B64 US_ALU_EXT_ADDR_41
5940x4B68 US_ALU_EXT_ADDR_42
5950x4B6C US_ALU_EXT_ADDR_43
5960x4B70 US_ALU_EXT_ADDR_44
5970x4B74 US_ALU_EXT_ADDR_45
5980x4B78 US_ALU_EXT_ADDR_46
5990x4B7C US_ALU_EXT_ADDR_47
6000x4B80 US_ALU_EXT_ADDR_48
6010x4B84 US_ALU_EXT_ADDR_49
6020x4B88 US_ALU_EXT_ADDR_50
6030x4B8C US_ALU_EXT_ADDR_51
6040x4B90 US_ALU_EXT_ADDR_52
6050x4B94 US_ALU_EXT_ADDR_53
6060x4B98 US_ALU_EXT_ADDR_54
6070x4B9C US_ALU_EXT_ADDR_55
6080x4BA0 US_ALU_EXT_ADDR_56
6090x4BA4 US_ALU_EXT_ADDR_57
6100x4BA8 US_ALU_EXT_ADDR_58
6110x4BAC US_ALU_EXT_ADDR_59
6120x4BB0 US_ALU_EXT_ADDR_60
6130x4BB4 US_ALU_EXT_ADDR_61
6140x4BB8 US_ALU_EXT_ADDR_62
6150x4BBC US_ALU_EXT_ADDR_63
6160x4BC0 FG_FOG_BLEND
6170x4BC4 FG_FOG_FACTOR
6180x4BC8 FG_FOG_COLOR_R
6190x4BCC FG_FOG_COLOR_G
6200x4BD0 FG_FOG_COLOR_B
6210x4BD4 FG_ALPHA_FUNC
6220x4BD8 FG_DEPTH_SRC
6230x4C00 US_ALU_CONST_R_0
6240x4C04 US_ALU_CONST_G_0
6250x4C08 US_ALU_CONST_B_0
6260x4C0C US_ALU_CONST_A_0
6270x4C10 US_ALU_CONST_R_1
6280x4C14 US_ALU_CONST_G_1
6290x4C18 US_ALU_CONST_B_1
6300x4C1C US_ALU_CONST_A_1
6310x4C20 US_ALU_CONST_R_2
6320x4C24 US_ALU_CONST_G_2
6330x4C28 US_ALU_CONST_B_2
6340x4C2C US_ALU_CONST_A_2
6350x4C30 US_ALU_CONST_R_3
6360x4C34 US_ALU_CONST_G_3
6370x4C38 US_ALU_CONST_B_3
6380x4C3C US_ALU_CONST_A_3
6390x4C40 US_ALU_CONST_R_4
6400x4C44 US_ALU_CONST_G_4
6410x4C48 US_ALU_CONST_B_4
6420x4C4C US_ALU_CONST_A_4
6430x4C50 US_ALU_CONST_R_5
6440x4C54 US_ALU_CONST_G_5
6450x4C58 US_ALU_CONST_B_5
6460x4C5C US_ALU_CONST_A_5
6470x4C60 US_ALU_CONST_R_6
6480x4C64 US_ALU_CONST_G_6
6490x4C68 US_ALU_CONST_B_6
6500x4C6C US_ALU_CONST_A_6
6510x4C70 US_ALU_CONST_R_7
6520x4C74 US_ALU_CONST_G_7
6530x4C78 US_ALU_CONST_B_7
6540x4C7C US_ALU_CONST_A_7
6550x4C80 US_ALU_CONST_R_8
6560x4C84 US_ALU_CONST_G_8
6570x4C88 US_ALU_CONST_B_8
6580x4C8C US_ALU_CONST_A_8
6590x4C90 US_ALU_CONST_R_9
6600x4C94 US_ALU_CONST_G_9
6610x4C98 US_ALU_CONST_B_9
6620x4C9C US_ALU_CONST_A_9
6630x4CA0 US_ALU_CONST_R_10
6640x4CA4 US_ALU_CONST_G_10
6650x4CA8 US_ALU_CONST_B_10
6660x4CAC US_ALU_CONST_A_10
6670x4CB0 US_ALU_CONST_R_11
6680x4CB4 US_ALU_CONST_G_11
6690x4CB8 US_ALU_CONST_B_11
6700x4CBC US_ALU_CONST_A_11
6710x4CC0 US_ALU_CONST_R_12
6720x4CC4 US_ALU_CONST_G_12
6730x4CC8 US_ALU_CONST_B_12
6740x4CCC US_ALU_CONST_A_12
6750x4CD0 US_ALU_CONST_R_13
6760x4CD4 US_ALU_CONST_G_13
6770x4CD8 US_ALU_CONST_B_13
6780x4CDC US_ALU_CONST_A_13
6790x4CE0 US_ALU_CONST_R_14
6800x4CE4 US_ALU_CONST_G_14
6810x4CE8 US_ALU_CONST_B_14
6820x4CEC US_ALU_CONST_A_14
6830x4CF0 US_ALU_CONST_R_15
6840x4CF4 US_ALU_CONST_G_15
6850x4CF8 US_ALU_CONST_B_15
6860x4CFC US_ALU_CONST_A_15
6870x4D00 US_ALU_CONST_R_16
6880x4D04 US_ALU_CONST_G_16
6890x4D08 US_ALU_CONST_B_16
6900x4D0C US_ALU_CONST_A_16
6910x4D10 US_ALU_CONST_R_17
6920x4D14 US_ALU_CONST_G_17
6930x4D18 US_ALU_CONST_B_17
6940x4D1C US_ALU_CONST_A_17
6950x4D20 US_ALU_CONST_R_18
6960x4D24 US_ALU_CONST_G_18
6970x4D28 US_ALU_CONST_B_18
6980x4D2C US_ALU_CONST_A_18
6990x4D30 US_ALU_CONST_R_19
7000x4D34 US_ALU_CONST_G_19
7010x4D38 US_ALU_CONST_B_19
7020x4D3C US_ALU_CONST_A_19
7030x4D40 US_ALU_CONST_R_20
7040x4D44 US_ALU_CONST_G_20
7050x4D48 US_ALU_CONST_B_20
7060x4D4C US_ALU_CONST_A_20
7070x4D50 US_ALU_CONST_R_21
7080x4D54 US_ALU_CONST_G_21
7090x4D58 US_ALU_CONST_B_21
7100x4D5C US_ALU_CONST_A_21
7110x4D60 US_ALU_CONST_R_22
7120x4D64 US_ALU_CONST_G_22
7130x4D68 US_ALU_CONST_B_22
7140x4D6C US_ALU_CONST_A_22
7150x4D70 US_ALU_CONST_R_23
7160x4D74 US_ALU_CONST_G_23
7170x4D78 US_ALU_CONST_B_23
7180x4D7C US_ALU_CONST_A_23
7190x4D80 US_ALU_CONST_R_24
7200x4D84 US_ALU_CONST_G_24
7210x4D88 US_ALU_CONST_B_24
7220x4D8C US_ALU_CONST_A_24
7230x4D90 US_ALU_CONST_R_25
7240x4D94 US_ALU_CONST_G_25
7250x4D98 US_ALU_CONST_B_25
7260x4D9C US_ALU_CONST_A_25
7270x4DA0 US_ALU_CONST_R_26
7280x4DA4 US_ALU_CONST_G_26
7290x4DA8 US_ALU_CONST_B_26
7300x4DAC US_ALU_CONST_A_26
7310x4DB0 US_ALU_CONST_R_27
7320x4DB4 US_ALU_CONST_G_27
7330x4DB8 US_ALU_CONST_B_27
7340x4DBC US_ALU_CONST_A_27
7350x4DC0 US_ALU_CONST_R_28
7360x4DC4 US_ALU_CONST_G_28
7370x4DC8 US_ALU_CONST_B_28
7380x4DCC US_ALU_CONST_A_28
7390x4DD0 US_ALU_CONST_R_29
7400x4DD4 US_ALU_CONST_G_29
7410x4DD8 US_ALU_CONST_B_29
7420x4DDC US_ALU_CONST_A_29
7430x4DE0 US_ALU_CONST_R_30
7440x4DE4 US_ALU_CONST_G_30
7450x4DE8 US_ALU_CONST_B_30
7460x4DEC US_ALU_CONST_A_30
7470x4DF0 US_ALU_CONST_R_31
7480x4DF4 US_ALU_CONST_G_31
7490x4DF8 US_ALU_CONST_B_31
7500x4DFC US_ALU_CONST_A_31
7510x4E04 RB3D_BLENDCNTL_R3
7520x4E08 RB3D_ABLENDCNTL_R3
7530x4E0C RB3D_COLOR_CHANNEL_MASK
7540x4E10 RB3D_CONSTANT_COLOR
7550x4E14 RB3D_COLOR_CLEAR_VALUE
7560x4E18 RB3D_ROPCNTL_R3
7570x4E1C RB3D_CLRCMP_FLIPE_R3
7580x4E20 RB3D_CLRCMP_CLR_R3
7590x4E24 RB3D_CLRCMP_MSK_R3
7600x4E48 RB3D_DEBUG_CTL
7610x4E4C RB3D_DSTCACHE_CTLSTAT_R3
7620x4E50 RB3D_DITHER_CTL
7630x4E54 RB3D_CMASK_OFFSET0
7640x4E58 RB3D_CMASK_OFFSET1
7650x4E5C RB3D_CMASK_OFFSET2
7660x4E60 RB3D_CMASK_OFFSET3
7670x4E64 RB3D_CMASK_PITCH0
7680x4E68 RB3D_CMASK_PITCH1
7690x4E6C RB3D_CMASK_PITCH2
7700x4E70 RB3D_CMASK_PITCH3
7710x4E74 RB3D_CMASK_WRINDEX
7720x4E78 RB3D_CMASK_DWORD
7730x4E7C RB3D_CMASK_RDINDEX
7740x4E80 RB3D_AARESOLVE_OFFSET
7750x4E84 RB3D_AARESOLVE_PITCH
7760x4E88 RB3D_AARESOLVE_CTL
7770x4EA0 RB3D_DISCARD_SRC_PIXEL_LTE_THRESHOLD
7780x4EA4 RB3D_DISCARD_SRC_PIXEL_GTE_THRESHOLD
7790x4F04 ZB_ZSTENCILCNTL
7800x4F08 ZB_STENCILREFMASK
7810x4F14 ZB_ZTOP
7820x4F18 ZB_ZCACHE_CTLSTAT
7830x4F1C ZB_BW_CNTL
7840x4F28 ZB_DEPTHCLEARVALUE
7850x4F30 ZB_ZMASK_OFFSET
7860x4F34 ZB_ZMASK_PITCH
7870x4F38 ZB_ZMASK_WRINDEX
7880x4F3C ZB_ZMASK_DWORD
7890x4F40 ZB_ZMASK_RDINDEX
7900x4F44 ZB_HIZ_OFFSET
7910x4F48 ZB_HIZ_WRINDEX
7920x4F4C ZB_HIZ_DWORD
7930x4F50 ZB_HIZ_RDINDEX
7940x4F54 ZB_HIZ_PITCH
7950x4F58 ZB_ZPASS_DATA
diff --git a/drivers/gpu/drm/radeon/reg_srcs/rs600 b/drivers/gpu/drm/radeon/reg_srcs/rs600
index 8e3c0b807add..6801b865d1c4 100644
--- a/drivers/gpu/drm/radeon/reg_srcs/rs600
+++ b/drivers/gpu/drm/radeon/reg_srcs/rs600
@@ -153,7 +153,7 @@ rs600 0x6d40
1530x42A4 SU_POLY_OFFSET_FRONT_SCALE 1530x42A4 SU_POLY_OFFSET_FRONT_SCALE
1540x42A8 SU_POLY_OFFSET_FRONT_OFFSET 1540x42A8 SU_POLY_OFFSET_FRONT_OFFSET
1550x42AC SU_POLY_OFFSET_BACK_SCALE 1550x42AC SU_POLY_OFFSET_BACK_SCALE
1560x42B0 SU_POLY_OFFSET_BACK_OFFSET 1560x42B0 SU_POLY_OFFSET_BACK_OFFSET
1570x42B4 SU_POLY_OFFSET_ENABLE 1570x42B4 SU_POLY_OFFSET_ENABLE
1580x42B8 SU_CULL_MODE 1580x42B8 SU_CULL_MODE
1590x42C0 SU_DEPTH_SCALE 1590x42C0 SU_DEPTH_SCALE
@@ -291,6 +291,8 @@ rs600 0x6d40
2910x46AC US_OUT_FMT_2 2910x46AC US_OUT_FMT_2
2920x46B0 US_OUT_FMT_3 2920x46B0 US_OUT_FMT_3
2930x46B4 US_W_FMT 2930x46B4 US_W_FMT
2940x46B8 US_CODE_BANK
2950x46BC US_CODE_EXT
2940x46C0 US_ALU_RGB_ADDR_0 2960x46C0 US_ALU_RGB_ADDR_0
2950x46C4 US_ALU_RGB_ADDR_1 2970x46C4 US_ALU_RGB_ADDR_1
2960x46C8 US_ALU_RGB_ADDR_2 2980x46C8 US_ALU_RGB_ADDR_2
@@ -547,6 +549,70 @@ rs600 0x6d40
5470x4AB4 US_ALU_ALPHA_INST_61 5490x4AB4 US_ALU_ALPHA_INST_61
5480x4AB8 US_ALU_ALPHA_INST_62 5500x4AB8 US_ALU_ALPHA_INST_62
5490x4ABC US_ALU_ALPHA_INST_63 5510x4ABC US_ALU_ALPHA_INST_63
5520x4AC0 US_ALU_EXT_ADDR_0
5530x4AC4 US_ALU_EXT_ADDR_1
5540x4AC8 US_ALU_EXT_ADDR_2
5550x4ACC US_ALU_EXT_ADDR_3
5560x4AD0 US_ALU_EXT_ADDR_4
5570x4AD4 US_ALU_EXT_ADDR_5
5580x4AD8 US_ALU_EXT_ADDR_6
5590x4ADC US_ALU_EXT_ADDR_7
5600x4AE0 US_ALU_EXT_ADDR_8
5610x4AE4 US_ALU_EXT_ADDR_9
5620x4AE8 US_ALU_EXT_ADDR_10
5630x4AEC US_ALU_EXT_ADDR_11
5640x4AF0 US_ALU_EXT_ADDR_12
5650x4AF4 US_ALU_EXT_ADDR_13
5660x4AF8 US_ALU_EXT_ADDR_14
5670x4AFC US_ALU_EXT_ADDR_15
5680x4B00 US_ALU_EXT_ADDR_16
5690x4B04 US_ALU_EXT_ADDR_17
5700x4B08 US_ALU_EXT_ADDR_18
5710x4B0C US_ALU_EXT_ADDR_19
5720x4B10 US_ALU_EXT_ADDR_20
5730x4B14 US_ALU_EXT_ADDR_21
5740x4B18 US_ALU_EXT_ADDR_22
5750x4B1C US_ALU_EXT_ADDR_23
5760x4B20 US_ALU_EXT_ADDR_24
5770x4B24 US_ALU_EXT_ADDR_25
5780x4B28 US_ALU_EXT_ADDR_26
5790x4B2C US_ALU_EXT_ADDR_27
5800x4B30 US_ALU_EXT_ADDR_28
5810x4B34 US_ALU_EXT_ADDR_29
5820x4B38 US_ALU_EXT_ADDR_30
5830x4B3C US_ALU_EXT_ADDR_31
5840x4B40 US_ALU_EXT_ADDR_32
5850x4B44 US_ALU_EXT_ADDR_33
5860x4B48 US_ALU_EXT_ADDR_34
5870x4B4C US_ALU_EXT_ADDR_35
5880x4B50 US_ALU_EXT_ADDR_36
5890x4B54 US_ALU_EXT_ADDR_37
5900x4B58 US_ALU_EXT_ADDR_38
5910x4B5C US_ALU_EXT_ADDR_39
5920x4B60 US_ALU_EXT_ADDR_40
5930x4B64 US_ALU_EXT_ADDR_41
5940x4B68 US_ALU_EXT_ADDR_42
5950x4B6C US_ALU_EXT_ADDR_43
5960x4B70 US_ALU_EXT_ADDR_44
5970x4B74 US_ALU_EXT_ADDR_45
5980x4B78 US_ALU_EXT_ADDR_46
5990x4B7C US_ALU_EXT_ADDR_47
6000x4B80 US_ALU_EXT_ADDR_48
6010x4B84 US_ALU_EXT_ADDR_49
6020x4B88 US_ALU_EXT_ADDR_50
6030x4B8C US_ALU_EXT_ADDR_51
6040x4B90 US_ALU_EXT_ADDR_52
6050x4B94 US_ALU_EXT_ADDR_53
6060x4B98 US_ALU_EXT_ADDR_54
6070x4B9C US_ALU_EXT_ADDR_55
6080x4BA0 US_ALU_EXT_ADDR_56
6090x4BA4 US_ALU_EXT_ADDR_57
6100x4BA8 US_ALU_EXT_ADDR_58
6110x4BAC US_ALU_EXT_ADDR_59
6120x4BB0 US_ALU_EXT_ADDR_60
6130x4BB4 US_ALU_EXT_ADDR_61
6140x4BB8 US_ALU_EXT_ADDR_62
6150x4BBC US_ALU_EXT_ADDR_63
5500x4BC0 FG_FOG_BLEND 6160x4BC0 FG_FOG_BLEND
5510x4BC4 FG_FOG_FACTOR 6170x4BC4 FG_FOG_FACTOR
5520x4BC8 FG_FOG_COLOR_R 6180x4BC8 FG_FOG_COLOR_R
diff --git a/drivers/gpu/drm/radeon/reg_srcs/rv515 b/drivers/gpu/drm/radeon/reg_srcs/rv515
index 0102a0d5735c..38abf63bf2cd 100644
--- a/drivers/gpu/drm/radeon/reg_srcs/rv515
+++ b/drivers/gpu/drm/radeon/reg_srcs/rv515
@@ -161,7 +161,12 @@ rv515 0x6d40
1610x401C GB_SELECT 1610x401C GB_SELECT
1620x4020 GB_AA_CONFIG 1620x4020 GB_AA_CONFIG
1630x4024 GB_FIFO_SIZE 1630x4024 GB_FIFO_SIZE
1640x4028 GB_Z_PEQ_CONFIG
1640x4100 TX_INVALTAGS 1650x4100 TX_INVALTAGS
1660x4114 SU_TEX_WRAP_PS3
1670x4118 PS3_ENABLE
1680x411c PS3_VTX_FMT
1690x4120 PS3_TEX_SOURCE
1650x4200 GA_POINT_S0 1700x4200 GA_POINT_S0
1660x4204 GA_POINT_T0 1710x4204 GA_POINT_T0
1670x4208 GA_POINT_S1 1720x4208 GA_POINT_S1
@@ -171,6 +176,7 @@ rv515 0x6d40
1710x4230 GA_POINT_MINMAX 1760x4230 GA_POINT_MINMAX
1720x4234 GA_LINE_CNTL 1770x4234 GA_LINE_CNTL
1730x4238 GA_LINE_STIPPLE_CONFIG 1780x4238 GA_LINE_STIPPLE_CONFIG
1790x4258 GA_COLOR_CONTROL_PS3
1740x4260 GA_LINE_STIPPLE_VALUE 1800x4260 GA_LINE_STIPPLE_VALUE
1750x4264 GA_LINE_S0 1810x4264 GA_LINE_S0
1760x4268 GA_LINE_S1 1820x4268 GA_LINE_S1
diff --git a/drivers/gpu/drm/radeon/rs400.c b/drivers/gpu/drm/radeon/rs400.c
index c1fcdddb6be6..287fcebfb4e6 100644
--- a/drivers/gpu/drm/radeon/rs400.c
+++ b/drivers/gpu/drm/radeon/rs400.c
@@ -223,15 +223,31 @@ int rs400_gart_set_page(struct radeon_device *rdev, int i, uint64_t addr)
223 return 0; 223 return 0;
224} 224}
225 225
226int rs400_mc_wait_for_idle(struct radeon_device *rdev)
227{
228 unsigned i;
229 uint32_t tmp;
230
231 for (i = 0; i < rdev->usec_timeout; i++) {
232 /* read MC_STATUS */
233 tmp = RREG32(0x0150);
234 if (tmp & (1 << 2)) {
235 return 0;
236 }
237 DRM_UDELAY(1);
238 }
239 return -1;
240}
241
226void rs400_gpu_init(struct radeon_device *rdev) 242void rs400_gpu_init(struct radeon_device *rdev)
227{ 243{
228 /* FIXME: HDP same place on rs400 ? */ 244 /* FIXME: HDP same place on rs400 ? */
229 r100_hdp_reset(rdev); 245 r100_hdp_reset(rdev);
230 /* FIXME: is this correct ? */ 246 /* FIXME: is this correct ? */
231 r420_pipes_init(rdev); 247 r420_pipes_init(rdev);
232 if (r300_mc_wait_for_idle(rdev)) { 248 if (rs400_mc_wait_for_idle(rdev)) {
233 printk(KERN_WARNING "Failed to wait MC idle while " 249 printk(KERN_WARNING "rs400: Failed to wait MC idle while "
234 "programming pipes. Bad things might happen.\n"); 250 "programming pipes. Bad things might happen. %08x\n", RREG32(0x150));
235 } 251 }
236} 252}
237 253
@@ -356,6 +372,7 @@ static int rs400_mc_init(struct radeon_device *rdev)
356 rdev->mc.vram_location = G_00015C_MC_FB_START(tmp) << 16; 372 rdev->mc.vram_location = G_00015C_MC_FB_START(tmp) << 16;
357 rdev->mc.gtt_location = 0xFFFFFFFFUL; 373 rdev->mc.gtt_location = 0xFFFFFFFFUL;
358 r = radeon_mc_setup(rdev); 374 r = radeon_mc_setup(rdev);
375 rdev->mc.igp_sideport_enabled = radeon_combios_sideport_present(rdev);
359 if (r) 376 if (r)
360 return r; 377 return r;
361 return 0; 378 return 0;
@@ -369,8 +386,8 @@ void rs400_mc_program(struct radeon_device *rdev)
369 r100_mc_stop(rdev, &save); 386 r100_mc_stop(rdev, &save);
370 387
371 /* Wait for mc idle */ 388 /* Wait for mc idle */
372 if (r300_mc_wait_for_idle(rdev)) 389 if (rs400_mc_wait_for_idle(rdev))
373 dev_warn(rdev->dev, "Wait MC idle timeout before updating MC.\n"); 390 dev_warn(rdev->dev, "rs400: Wait MC idle timeout before updating MC.\n");
374 WREG32(R_000148_MC_FB_LOCATION, 391 WREG32(R_000148_MC_FB_LOCATION,
375 S_000148_MC_FB_START(rdev->mc.vram_start >> 16) | 392 S_000148_MC_FB_START(rdev->mc.vram_start >> 16) |
376 S_000148_MC_FB_TOP(rdev->mc.vram_end >> 16)); 393 S_000148_MC_FB_TOP(rdev->mc.vram_end >> 16));
@@ -395,6 +412,7 @@ static int rs400_startup(struct radeon_device *rdev)
395 return r; 412 return r;
396 /* Enable IRQ */ 413 /* Enable IRQ */
397 r100_irq_set(rdev); 414 r100_irq_set(rdev);
415 rdev->config.r300.hdp_cntl = RREG32(RADEON_HOST_PATH_CNTL);
398 /* 1M ring buffer */ 416 /* 1M ring buffer */
399 r = r100_cp_init(rdev, 1024 * 1024); 417 r = r100_cp_init(rdev, 1024 * 1024);
400 if (r) { 418 if (r) {
@@ -446,7 +464,6 @@ int rs400_suspend(struct radeon_device *rdev)
446 464
447void rs400_fini(struct radeon_device *rdev) 465void rs400_fini(struct radeon_device *rdev)
448{ 466{
449 rs400_suspend(rdev);
450 r100_cp_fini(rdev); 467 r100_cp_fini(rdev);
451 r100_wb_fini(rdev); 468 r100_wb_fini(rdev);
452 r100_ib_fini(rdev); 469 r100_ib_fini(rdev);
@@ -497,6 +514,8 @@ int rs400_init(struct radeon_device *rdev)
497 514
498 /* Initialize clocks */ 515 /* Initialize clocks */
499 radeon_get_clock_info(rdev->ddev); 516 radeon_get_clock_info(rdev->ddev);
517 /* Initialize power management */
518 radeon_pm_init(rdev);
500 /* Get vram informations */ 519 /* Get vram informations */
501 rs400_vram_info(rdev); 520 rs400_vram_info(rdev);
502 /* Initialize memory controller (also test AGP) */ 521 /* Initialize memory controller (also test AGP) */
@@ -523,7 +542,6 @@ int rs400_init(struct radeon_device *rdev)
523 if (r) { 542 if (r) {
524 /* Somethings want wront with the accel init stop accel */ 543 /* Somethings want wront with the accel init stop accel */
525 dev_err(rdev->dev, "Disabling GPU acceleration\n"); 544 dev_err(rdev->dev, "Disabling GPU acceleration\n");
526 rs400_suspend(rdev);
527 r100_cp_fini(rdev); 545 r100_cp_fini(rdev);
528 r100_wb_fini(rdev); 546 r100_wb_fini(rdev);
529 r100_ib_fini(rdev); 547 r100_ib_fini(rdev);
diff --git a/drivers/gpu/drm/radeon/rs600.c b/drivers/gpu/drm/radeon/rs600.c
index 4f8ea4260572..c3818562a13e 100644
--- a/drivers/gpu/drm/radeon/rs600.c
+++ b/drivers/gpu/drm/radeon/rs600.c
@@ -56,6 +56,7 @@ int rs600_mc_init(struct radeon_device *rdev)
56 rdev->mc.vram_location = G_000004_MC_FB_START(tmp) << 16; 56 rdev->mc.vram_location = G_000004_MC_FB_START(tmp) << 16;
57 rdev->mc.gtt_location = 0xffffffffUL; 57 rdev->mc.gtt_location = 0xffffffffUL;
58 r = radeon_mc_setup(rdev); 58 r = radeon_mc_setup(rdev);
59 rdev->mc.igp_sideport_enabled = radeon_atombios_sideport_present(rdev);
59 if (r) 60 if (r)
60 return r; 61 return r;
61 return 0; 62 return 0;
@@ -134,7 +135,8 @@ void rs600_hpd_init(struct radeon_device *rdev)
134 break; 135 break;
135 } 136 }
136 } 137 }
137 rs600_irq_set(rdev); 138 if (rdev->irq.installed)
139 rs600_irq_set(rdev);
138} 140}
139 141
140void rs600_hpd_fini(struct radeon_device *rdev) 142void rs600_hpd_fini(struct radeon_device *rdev)
@@ -315,6 +317,11 @@ int rs600_irq_set(struct radeon_device *rdev)
315 u32 hpd2 = RREG32(R_007D18_DC_HOT_PLUG_DETECT2_INT_CONTROL) & 317 u32 hpd2 = RREG32(R_007D18_DC_HOT_PLUG_DETECT2_INT_CONTROL) &
316 ~S_007D18_DC_HOT_PLUG_DETECT2_INT_EN(1); 318 ~S_007D18_DC_HOT_PLUG_DETECT2_INT_EN(1);
317 319
320 if (!rdev->irq.installed) {
321 WARN(1, "Can't enable IRQ/MSI because no handler is installed.\n");
322 WREG32(R_000040_GEN_INT_CNTL, 0);
323 return -EINVAL;
324 }
318 if (rdev->irq.sw_int) { 325 if (rdev->irq.sw_int) {
319 tmp |= S_000040_SW_INT_EN(1); 326 tmp |= S_000040_SW_INT_EN(1);
320 } 327 }
@@ -396,7 +403,7 @@ int rs600_irq_process(struct radeon_device *rdev)
396 } 403 }
397 while (status || r500_disp_int) { 404 while (status || r500_disp_int) {
398 /* SW interrupt */ 405 /* SW interrupt */
399 if (G_000040_SW_INT_EN(status)) 406 if (G_000044_SW_INT(status))
400 radeon_fence_process(rdev); 407 radeon_fence_process(rdev);
401 /* Vertical blank interrupts */ 408 /* Vertical blank interrupts */
402 if (G_007EDC_LB_D1_VBLANK_INTERRUPT(r500_disp_int)) 409 if (G_007EDC_LB_D1_VBLANK_INTERRUPT(r500_disp_int))
@@ -553,6 +560,7 @@ static int rs600_startup(struct radeon_device *rdev)
553 return r; 560 return r;
554 /* Enable IRQ */ 561 /* Enable IRQ */
555 rs600_irq_set(rdev); 562 rs600_irq_set(rdev);
563 rdev->config.r300.hdp_cntl = RREG32(RADEON_HOST_PATH_CNTL);
556 /* 1M ring buffer */ 564 /* 1M ring buffer */
557 r = r100_cp_init(rdev, 1024 * 1024); 565 r = r100_cp_init(rdev, 1024 * 1024);
558 if (r) { 566 if (r) {
@@ -602,7 +610,6 @@ int rs600_suspend(struct radeon_device *rdev)
602 610
603void rs600_fini(struct radeon_device *rdev) 611void rs600_fini(struct radeon_device *rdev)
604{ 612{
605 rs600_suspend(rdev);
606 r100_cp_fini(rdev); 613 r100_cp_fini(rdev);
607 r100_wb_fini(rdev); 614 r100_wb_fini(rdev);
608 r100_ib_fini(rdev); 615 r100_ib_fini(rdev);
@@ -681,7 +688,6 @@ int rs600_init(struct radeon_device *rdev)
681 if (r) { 688 if (r) {
682 /* Somethings want wront with the accel init stop accel */ 689 /* Somethings want wront with the accel init stop accel */
683 dev_err(rdev->dev, "Disabling GPU acceleration\n"); 690 dev_err(rdev->dev, "Disabling GPU acceleration\n");
684 rs600_suspend(rdev);
685 r100_cp_fini(rdev); 691 r100_cp_fini(rdev);
686 r100_wb_fini(rdev); 692 r100_wb_fini(rdev);
687 r100_ib_fini(rdev); 693 r100_ib_fini(rdev);
diff --git a/drivers/gpu/drm/radeon/rs690.c b/drivers/gpu/drm/radeon/rs690.c
index 1e22f52d6039..06e2771aee5a 100644
--- a/drivers/gpu/drm/radeon/rs690.c
+++ b/drivers/gpu/drm/radeon/rs690.c
@@ -172,6 +172,7 @@ static int rs690_mc_init(struct radeon_device *rdev)
172 rdev->mc.vram_location = G_000100_MC_FB_START(tmp) << 16; 172 rdev->mc.vram_location = G_000100_MC_FB_START(tmp) << 16;
173 rdev->mc.gtt_location = 0xFFFFFFFFUL; 173 rdev->mc.gtt_location = 0xFFFFFFFFUL;
174 r = radeon_mc_setup(rdev); 174 r = radeon_mc_setup(rdev);
175 rdev->mc.igp_sideport_enabled = radeon_atombios_sideport_present(rdev);
175 if (r) 176 if (r)
176 return r; 177 return r;
177 return 0; 178 return 0;
@@ -625,6 +626,7 @@ static int rs690_startup(struct radeon_device *rdev)
625 return r; 626 return r;
626 /* Enable IRQ */ 627 /* Enable IRQ */
627 rs600_irq_set(rdev); 628 rs600_irq_set(rdev);
629 rdev->config.r300.hdp_cntl = RREG32(RADEON_HOST_PATH_CNTL);
628 /* 1M ring buffer */ 630 /* 1M ring buffer */
629 r = r100_cp_init(rdev, 1024 * 1024); 631 r = r100_cp_init(rdev, 1024 * 1024);
630 if (r) { 632 if (r) {
@@ -674,7 +676,6 @@ int rs690_suspend(struct radeon_device *rdev)
674 676
675void rs690_fini(struct radeon_device *rdev) 677void rs690_fini(struct radeon_device *rdev)
676{ 678{
677 rs690_suspend(rdev);
678 r100_cp_fini(rdev); 679 r100_cp_fini(rdev);
679 r100_wb_fini(rdev); 680 r100_wb_fini(rdev);
680 r100_ib_fini(rdev); 681 r100_ib_fini(rdev);
@@ -754,7 +755,6 @@ int rs690_init(struct radeon_device *rdev)
754 if (r) { 755 if (r) {
755 /* Somethings want wront with the accel init stop accel */ 756 /* Somethings want wront with the accel init stop accel */
756 dev_err(rdev->dev, "Disabling GPU acceleration\n"); 757 dev_err(rdev->dev, "Disabling GPU acceleration\n");
757 rs690_suspend(rdev);
758 r100_cp_fini(rdev); 758 r100_cp_fini(rdev);
759 r100_wb_fini(rdev); 759 r100_wb_fini(rdev);
760 r100_ib_fini(rdev); 760 r100_ib_fini(rdev);
diff --git a/drivers/gpu/drm/radeon/rv515.c b/drivers/gpu/drm/radeon/rv515.c
index 59632a506b46..0e1e6b8632b8 100644
--- a/drivers/gpu/drm/radeon/rv515.c
+++ b/drivers/gpu/drm/radeon/rv515.c
@@ -479,6 +479,7 @@ static int rv515_startup(struct radeon_device *rdev)
479 } 479 }
480 /* Enable IRQ */ 480 /* Enable IRQ */
481 rs600_irq_set(rdev); 481 rs600_irq_set(rdev);
482 rdev->config.r300.hdp_cntl = RREG32(RADEON_HOST_PATH_CNTL);
482 /* 1M ring buffer */ 483 /* 1M ring buffer */
483 r = r100_cp_init(rdev, 1024 * 1024); 484 r = r100_cp_init(rdev, 1024 * 1024);
484 if (r) { 485 if (r) {
@@ -536,7 +537,6 @@ void rv515_set_safe_registers(struct radeon_device *rdev)
536 537
537void rv515_fini(struct radeon_device *rdev) 538void rv515_fini(struct radeon_device *rdev)
538{ 539{
539 rv515_suspend(rdev);
540 r100_cp_fini(rdev); 540 r100_cp_fini(rdev);
541 r100_wb_fini(rdev); 541 r100_wb_fini(rdev);
542 r100_ib_fini(rdev); 542 r100_ib_fini(rdev);
@@ -614,13 +614,12 @@ int rv515_init(struct radeon_device *rdev)
614 if (r) { 614 if (r) {
615 /* Somethings want wront with the accel init stop accel */ 615 /* Somethings want wront with the accel init stop accel */
616 dev_err(rdev->dev, "Disabling GPU acceleration\n"); 616 dev_err(rdev->dev, "Disabling GPU acceleration\n");
617 rv515_suspend(rdev);
618 r100_cp_fini(rdev); 617 r100_cp_fini(rdev);
619 r100_wb_fini(rdev); 618 r100_wb_fini(rdev);
620 r100_ib_fini(rdev); 619 r100_ib_fini(rdev);
620 radeon_irq_kms_fini(rdev);
621 rv370_pcie_gart_fini(rdev); 621 rv370_pcie_gart_fini(rdev);
622 radeon_agp_fini(rdev); 622 radeon_agp_fini(rdev);
623 radeon_irq_kms_fini(rdev);
624 rdev->accel_working = false; 623 rdev->accel_working = false;
625 } 624 }
626 return 0; 625 return 0;
diff --git a/drivers/gpu/drm/radeon/rv770.c b/drivers/gpu/drm/radeon/rv770.c
index fbb0357f1ec3..03021674d097 100644
--- a/drivers/gpu/drm/radeon/rv770.c
+++ b/drivers/gpu/drm/radeon/rv770.c
@@ -549,9 +549,12 @@ static void rv770_gpu_init(struct radeon_device *rdev)
549 549
550 gb_tiling_config |= BANK_SWAPS(1); 550 gb_tiling_config |= BANK_SWAPS(1);
551 551
552 backend_map = r700_get_tile_pipe_to_backend_map(rdev->config.rv770.max_tile_pipes, 552 if (rdev->family == CHIP_RV740)
553 rdev->config.rv770.max_backends, 553 backend_map = 0x28;
554 (0xff << rdev->config.rv770.max_backends) & 0xff); 554 else
555 backend_map = r700_get_tile_pipe_to_backend_map(rdev->config.rv770.max_tile_pipes,
556 rdev->config.rv770.max_backends,
557 (0xff << rdev->config.rv770.max_backends) & 0xff);
555 gb_tiling_config |= BACKEND_MAP(backend_map); 558 gb_tiling_config |= BACKEND_MAP(backend_map);
556 559
557 cc_gc_shader_pipe_config = 560 cc_gc_shader_pipe_config =
@@ -779,7 +782,6 @@ int rv770_mc_init(struct radeon_device *rdev)
779 fixed20_12 a; 782 fixed20_12 a;
780 u32 tmp; 783 u32 tmp;
781 int chansize, numchan; 784 int chansize, numchan;
782 int r;
783 785
784 /* Get VRAM informations */ 786 /* Get VRAM informations */
785 rdev->mc.vram_is_ddr = true; 787 rdev->mc.vram_is_ddr = true;
@@ -822,9 +824,6 @@ int rv770_mc_init(struct radeon_device *rdev)
822 rdev->mc.real_vram_size = rdev->mc.aper_size; 824 rdev->mc.real_vram_size = rdev->mc.aper_size;
823 825
824 if (rdev->flags & RADEON_IS_AGP) { 826 if (rdev->flags & RADEON_IS_AGP) {
825 r = radeon_agp_init(rdev);
826 if (r)
827 return r;
828 /* gtt_size is setup by radeon_agp_init */ 827 /* gtt_size is setup by radeon_agp_init */
829 rdev->mc.gtt_location = rdev->mc.agp_base; 828 rdev->mc.gtt_location = rdev->mc.agp_base;
830 tmp = 0xFFFFFFFFUL - rdev->mc.agp_base - rdev->mc.gtt_size; 829 tmp = 0xFFFFFFFFUL - rdev->mc.agp_base - rdev->mc.gtt_size;
@@ -891,18 +890,25 @@ static int rv770_startup(struct radeon_device *rdev)
891 return r; 890 return r;
892 } 891 }
893 rv770_gpu_init(rdev); 892 rv770_gpu_init(rdev);
894 893 r = r600_blit_init(rdev);
895 r = radeon_bo_reserve(rdev->r600_blit.shader_obj, false);
896 if (unlikely(r != 0))
897 return r;
898 r = radeon_bo_pin(rdev->r600_blit.shader_obj, RADEON_GEM_DOMAIN_VRAM,
899 &rdev->r600_blit.shader_gpu_addr);
900 radeon_bo_unreserve(rdev->r600_blit.shader_obj);
901 if (r) { 894 if (r) {
902 DRM_ERROR("failed to pin blit object %d\n", r); 895 r600_blit_fini(rdev);
903 return r; 896 rdev->asic->copy = NULL;
897 dev_warn(rdev->dev, "failed blitter (%d) falling back to memcpy\n", r);
898 }
899 /* pin copy shader into vram */
900 if (rdev->r600_blit.shader_obj) {
901 r = radeon_bo_reserve(rdev->r600_blit.shader_obj, false);
902 if (unlikely(r != 0))
903 return r;
904 r = radeon_bo_pin(rdev->r600_blit.shader_obj, RADEON_GEM_DOMAIN_VRAM,
905 &rdev->r600_blit.shader_gpu_addr);
906 radeon_bo_unreserve(rdev->r600_blit.shader_obj);
907 if (r) {
908 DRM_ERROR("failed to pin blit object %d\n", r);
909 return r;
910 }
904 } 911 }
905
906 /* Enable IRQ */ 912 /* Enable IRQ */
907 r = r600_irq_init(rdev); 913 r = r600_irq_init(rdev);
908 if (r) { 914 if (r) {
@@ -964,13 +970,16 @@ int rv770_suspend(struct radeon_device *rdev)
964 /* FIXME: we should wait for ring to be empty */ 970 /* FIXME: we should wait for ring to be empty */
965 r700_cp_stop(rdev); 971 r700_cp_stop(rdev);
966 rdev->cp.ready = false; 972 rdev->cp.ready = false;
973 r600_irq_suspend(rdev);
967 r600_wb_disable(rdev); 974 r600_wb_disable(rdev);
968 rv770_pcie_gart_disable(rdev); 975 rv770_pcie_gart_disable(rdev);
969 /* unpin shaders bo */ 976 /* unpin shaders bo */
970 r = radeon_bo_reserve(rdev->r600_blit.shader_obj, false); 977 if (rdev->r600_blit.shader_obj) {
971 if (likely(r == 0)) { 978 r = radeon_bo_reserve(rdev->r600_blit.shader_obj, false);
972 radeon_bo_unpin(rdev->r600_blit.shader_obj); 979 if (likely(r == 0)) {
973 radeon_bo_unreserve(rdev->r600_blit.shader_obj); 980 radeon_bo_unpin(rdev->r600_blit.shader_obj);
981 radeon_bo_unreserve(rdev->r600_blit.shader_obj);
982 }
974 } 983 }
975 return 0; 984 return 0;
976} 985}
@@ -1029,6 +1038,11 @@ int rv770_init(struct radeon_device *rdev)
1029 r = radeon_fence_driver_init(rdev); 1038 r = radeon_fence_driver_init(rdev);
1030 if (r) 1039 if (r)
1031 return r; 1040 return r;
1041 if (rdev->flags & RADEON_IS_AGP) {
1042 r = radeon_agp_init(rdev);
1043 if (r)
1044 radeon_agp_disable(rdev);
1045 }
1032 r = rv770_mc_init(rdev); 1046 r = rv770_mc_init(rdev);
1033 if (r) 1047 if (r)
1034 return r; 1048 return r;
@@ -1051,31 +1065,28 @@ int rv770_init(struct radeon_device *rdev)
1051 if (r) 1065 if (r)
1052 return r; 1066 return r;
1053 1067
1054 r = r600_blit_init(rdev);
1055 if (r) {
1056 DRM_ERROR("radeon: failed blitter (%d).\n", r);
1057 return r;
1058 }
1059
1060 rdev->accel_working = true; 1068 rdev->accel_working = true;
1061 r = rv770_startup(rdev); 1069 r = rv770_startup(rdev);
1062 if (r) { 1070 if (r) {
1063 rv770_suspend(rdev); 1071 dev_err(rdev->dev, "disabling GPU acceleration\n");
1072 r600_cp_fini(rdev);
1064 r600_wb_fini(rdev); 1073 r600_wb_fini(rdev);
1065 radeon_ring_fini(rdev); 1074 r600_irq_fini(rdev);
1075 radeon_irq_kms_fini(rdev);
1066 rv770_pcie_gart_fini(rdev); 1076 rv770_pcie_gart_fini(rdev);
1067 rdev->accel_working = false; 1077 rdev->accel_working = false;
1068 } 1078 }
1069 if (rdev->accel_working) { 1079 if (rdev->accel_working) {
1070 r = radeon_ib_pool_init(rdev); 1080 r = radeon_ib_pool_init(rdev);
1071 if (r) { 1081 if (r) {
1072 DRM_ERROR("radeon: failed initializing IB pool (%d).\n", r); 1082 dev_err(rdev->dev, "IB initialization failed (%d).\n", r);
1073 rdev->accel_working = false;
1074 }
1075 r = r600_ib_test(rdev);
1076 if (r) {
1077 DRM_ERROR("radeon: failed testing IB (%d).\n", r);
1078 rdev->accel_working = false; 1083 rdev->accel_working = false;
1084 } else {
1085 r = r600_ib_test(rdev);
1086 if (r) {
1087 dev_err(rdev->dev, "IB test failed (%d).\n", r);
1088 rdev->accel_working = false;
1089 }
1079 } 1090 }
1080 } 1091 }
1081 return 0; 1092 return 0;
@@ -1083,19 +1094,16 @@ int rv770_init(struct radeon_device *rdev)
1083 1094
1084void rv770_fini(struct radeon_device *rdev) 1095void rv770_fini(struct radeon_device *rdev)
1085{ 1096{
1086 rv770_suspend(rdev);
1087
1088 r600_blit_fini(rdev); 1097 r600_blit_fini(rdev);
1098 r600_cp_fini(rdev);
1099 r600_wb_fini(rdev);
1089 r600_irq_fini(rdev); 1100 r600_irq_fini(rdev);
1090 radeon_irq_kms_fini(rdev); 1101 radeon_irq_kms_fini(rdev);
1091 radeon_ring_fini(rdev);
1092 r600_wb_fini(rdev);
1093 rv770_pcie_gart_fini(rdev); 1102 rv770_pcie_gart_fini(rdev);
1094 radeon_gem_fini(rdev); 1103 radeon_gem_fini(rdev);
1095 radeon_fence_driver_fini(rdev); 1104 radeon_fence_driver_fini(rdev);
1096 radeon_clocks_fini(rdev); 1105 radeon_clocks_fini(rdev);
1097 if (rdev->flags & RADEON_IS_AGP) 1106 radeon_agp_fini(rdev);
1098 radeon_agp_fini(rdev);
1099 radeon_bo_fini(rdev); 1107 radeon_bo_fini(rdev);
1100 radeon_atombios_fini(rdev); 1108 radeon_atombios_fini(rdev);
1101 kfree(rdev->bios); 1109 kfree(rdev->bios);
diff --git a/drivers/gpu/drm/savage/savage_drv.c b/drivers/gpu/drm/savage/savage_drv.c
index eee52aa92a7c..021de44c15ab 100644
--- a/drivers/gpu/drm/savage/savage_drv.c
+++ b/drivers/gpu/drm/savage/savage_drv.c
@@ -50,7 +50,7 @@ static struct drm_driver driver = {
50 .owner = THIS_MODULE, 50 .owner = THIS_MODULE,
51 .open = drm_open, 51 .open = drm_open,
52 .release = drm_release, 52 .release = drm_release,
53 .ioctl = drm_ioctl, 53 .unlocked_ioctl = drm_ioctl,
54 .mmap = drm_mmap, 54 .mmap = drm_mmap,
55 .poll = drm_poll, 55 .poll = drm_poll,
56 .fasync = drm_fasync, 56 .fasync = drm_fasync,
diff --git a/drivers/gpu/drm/sis/sis_drv.c b/drivers/gpu/drm/sis/sis_drv.c
index e725cc0b1155..4fd1f067d380 100644
--- a/drivers/gpu/drm/sis/sis_drv.c
+++ b/drivers/gpu/drm/sis/sis_drv.c
@@ -80,7 +80,7 @@ static struct drm_driver driver = {
80 .owner = THIS_MODULE, 80 .owner = THIS_MODULE,
81 .open = drm_open, 81 .open = drm_open,
82 .release = drm_release, 82 .release = drm_release,
83 .ioctl = drm_ioctl, 83 .unlocked_ioctl = drm_ioctl,
84 .mmap = drm_mmap, 84 .mmap = drm_mmap,
85 .poll = drm_poll, 85 .poll = drm_poll,
86 .fasync = drm_fasync, 86 .fasync = drm_fasync,
diff --git a/drivers/gpu/drm/tdfx/tdfx_drv.c b/drivers/gpu/drm/tdfx/tdfx_drv.c
index 012ff2e356b2..ec5a43e65722 100644
--- a/drivers/gpu/drm/tdfx/tdfx_drv.c
+++ b/drivers/gpu/drm/tdfx/tdfx_drv.c
@@ -48,7 +48,7 @@ static struct drm_driver driver = {
48 .owner = THIS_MODULE, 48 .owner = THIS_MODULE,
49 .open = drm_open, 49 .open = drm_open,
50 .release = drm_release, 50 .release = drm_release,
51 .ioctl = drm_ioctl, 51 .unlocked_ioctl = drm_ioctl,
52 .mmap = drm_mmap, 52 .mmap = drm_mmap,
53 .poll = drm_poll, 53 .poll = drm_poll,
54 .fasync = drm_fasync, 54 .fasync = drm_fasync,
diff --git a/drivers/gpu/drm/ttm/ttm_bo.c b/drivers/gpu/drm/ttm/ttm_bo.c
index 1fbb2eea5e88..c7320ce4567d 100644
--- a/drivers/gpu/drm/ttm/ttm_bo.c
+++ b/drivers/gpu/drm/ttm/ttm_bo.c
@@ -71,34 +71,34 @@ static inline int ttm_mem_type_from_flags(uint32_t flags, uint32_t *mem_type)
71 return -EINVAL; 71 return -EINVAL;
72} 72}
73 73
74static void ttm_mem_type_manager_debug(struct ttm_bo_global *glob, 74static void ttm_mem_type_debug(struct ttm_bo_device *bdev, int mem_type)
75 struct ttm_mem_type_manager *man)
76{ 75{
76 struct ttm_mem_type_manager *man = &bdev->man[mem_type];
77
77 printk(KERN_ERR TTM_PFX " has_type: %d\n", man->has_type); 78 printk(KERN_ERR TTM_PFX " has_type: %d\n", man->has_type);
78 printk(KERN_ERR TTM_PFX " use_type: %d\n", man->use_type); 79 printk(KERN_ERR TTM_PFX " use_type: %d\n", man->use_type);
79 printk(KERN_ERR TTM_PFX " flags: 0x%08X\n", man->flags); 80 printk(KERN_ERR TTM_PFX " flags: 0x%08X\n", man->flags);
80 printk(KERN_ERR TTM_PFX " gpu_offset: 0x%08lX\n", man->gpu_offset); 81 printk(KERN_ERR TTM_PFX " gpu_offset: 0x%08lX\n", man->gpu_offset);
81 printk(KERN_ERR TTM_PFX " io_offset: 0x%08lX\n", man->io_offset); 82 printk(KERN_ERR TTM_PFX " io_offset: 0x%08lX\n", man->io_offset);
82 printk(KERN_ERR TTM_PFX " io_size: %ld\n", man->io_size); 83 printk(KERN_ERR TTM_PFX " io_size: %ld\n", man->io_size);
83 printk(KERN_ERR TTM_PFX " size: %ld\n", (unsigned long)man->size); 84 printk(KERN_ERR TTM_PFX " size: %llu\n", man->size);
84 printk(KERN_ERR TTM_PFX " available_caching: 0x%08X\n", 85 printk(KERN_ERR TTM_PFX " available_caching: 0x%08X\n",
85 man->available_caching); 86 man->available_caching);
86 printk(KERN_ERR TTM_PFX " default_caching: 0x%08X\n", 87 printk(KERN_ERR TTM_PFX " default_caching: 0x%08X\n",
87 man->default_caching); 88 man->default_caching);
88 spin_lock(&glob->lru_lock); 89 if (mem_type != TTM_PL_SYSTEM) {
89 drm_mm_debug_table(&man->manager, TTM_PFX); 90 spin_lock(&bdev->glob->lru_lock);
90 spin_unlock(&glob->lru_lock); 91 drm_mm_debug_table(&man->manager, TTM_PFX);
92 spin_unlock(&bdev->glob->lru_lock);
93 }
91} 94}
92 95
93static void ttm_bo_mem_space_debug(struct ttm_buffer_object *bo, 96static void ttm_bo_mem_space_debug(struct ttm_buffer_object *bo,
94 struct ttm_placement *placement) 97 struct ttm_placement *placement)
95{ 98{
96 struct ttm_bo_device *bdev = bo->bdev;
97 struct ttm_bo_global *glob = bo->glob;
98 struct ttm_mem_type_manager *man;
99 int i, ret, mem_type; 99 int i, ret, mem_type;
100 100
101 printk(KERN_ERR TTM_PFX "No space for %p (%ld pages, %ldK, %ldM)\n", 101 printk(KERN_ERR TTM_PFX "No space for %p (%lu pages, %luK, %luM)\n",
102 bo, bo->mem.num_pages, bo->mem.size >> 10, 102 bo, bo->mem.num_pages, bo->mem.size >> 10,
103 bo->mem.size >> 20); 103 bo->mem.size >> 20);
104 for (i = 0; i < placement->num_placement; i++) { 104 for (i = 0; i < placement->num_placement; i++) {
@@ -106,10 +106,9 @@ static void ttm_bo_mem_space_debug(struct ttm_buffer_object *bo,
106 &mem_type); 106 &mem_type);
107 if (ret) 107 if (ret)
108 return; 108 return;
109 man = &bdev->man[mem_type];
110 printk(KERN_ERR TTM_PFX " placement[%d]=0x%08X (%d)\n", 109 printk(KERN_ERR TTM_PFX " placement[%d]=0x%08X (%d)\n",
111 i, placement->placement[i], mem_type); 110 i, placement->placement[i], mem_type);
112 ttm_mem_type_manager_debug(glob, man); 111 ttm_mem_type_debug(bo->bdev, mem_type);
113 } 112 }
114} 113}
115 114
@@ -427,7 +426,8 @@ moved:
427 bdev->man[bo->mem.mem_type].gpu_offset; 426 bdev->man[bo->mem.mem_type].gpu_offset;
428 bo->cur_placement = bo->mem.placement; 427 bo->cur_placement = bo->mem.placement;
429 spin_unlock(&bo->lock); 428 spin_unlock(&bo->lock);
430 } 429 } else
430 bo->offset = 0;
431 431
432 return 0; 432 return 0;
433 433
@@ -465,6 +465,8 @@ static int ttm_bo_cleanup_refs(struct ttm_buffer_object *bo, bool remove_all)
465 spin_unlock(&bo->lock); 465 spin_unlock(&bo->lock);
466 466
467 spin_lock(&glob->lru_lock); 467 spin_lock(&glob->lru_lock);
468 put_count = ttm_bo_del_from_lru(bo);
469
468 ret = ttm_bo_reserve_locked(bo, false, false, false, 0); 470 ret = ttm_bo_reserve_locked(bo, false, false, false, 0);
469 BUG_ON(ret); 471 BUG_ON(ret);
470 if (bo->ttm) 472 if (bo->ttm)
@@ -472,20 +474,19 @@ static int ttm_bo_cleanup_refs(struct ttm_buffer_object *bo, bool remove_all)
472 474
473 if (!list_empty(&bo->ddestroy)) { 475 if (!list_empty(&bo->ddestroy)) {
474 list_del_init(&bo->ddestroy); 476 list_del_init(&bo->ddestroy);
475 kref_put(&bo->list_kref, ttm_bo_ref_bug); 477 ++put_count;
476 } 478 }
477 if (bo->mem.mm_node) { 479 if (bo->mem.mm_node) {
478 bo->mem.mm_node->private = NULL; 480 bo->mem.mm_node->private = NULL;
479 drm_mm_put_block(bo->mem.mm_node); 481 drm_mm_put_block(bo->mem.mm_node);
480 bo->mem.mm_node = NULL; 482 bo->mem.mm_node = NULL;
481 } 483 }
482 put_count = ttm_bo_del_from_lru(bo);
483 spin_unlock(&glob->lru_lock); 484 spin_unlock(&glob->lru_lock);
484 485
485 atomic_set(&bo->reserved, 0); 486 atomic_set(&bo->reserved, 0);
486 487
487 while (put_count--) 488 while (put_count--)
488 kref_put(&bo->list_kref, ttm_bo_release_list); 489 kref_put(&bo->list_kref, ttm_bo_ref_bug);
489 490
490 return 0; 491 return 0;
491 } 492 }
@@ -523,52 +524,44 @@ static int ttm_bo_cleanup_refs(struct ttm_buffer_object *bo, bool remove_all)
523static int ttm_bo_delayed_delete(struct ttm_bo_device *bdev, bool remove_all) 524static int ttm_bo_delayed_delete(struct ttm_bo_device *bdev, bool remove_all)
524{ 525{
525 struct ttm_bo_global *glob = bdev->glob; 526 struct ttm_bo_global *glob = bdev->glob;
526 struct ttm_buffer_object *entry, *nentry; 527 struct ttm_buffer_object *entry = NULL;
527 struct list_head *list, *next; 528 int ret = 0;
528 int ret;
529 529
530 spin_lock(&glob->lru_lock); 530 spin_lock(&glob->lru_lock);
531 list_for_each_safe(list, next, &bdev->ddestroy) { 531 if (list_empty(&bdev->ddestroy))
532 entry = list_entry(list, struct ttm_buffer_object, ddestroy); 532 goto out_unlock;
533 nentry = NULL;
534 533
535 /* 534 entry = list_first_entry(&bdev->ddestroy,
536 * Protect the next list entry from destruction while we 535 struct ttm_buffer_object, ddestroy);
537 * unlock the lru_lock. 536 kref_get(&entry->list_kref);
538 */ 537
538 for (;;) {
539 struct ttm_buffer_object *nentry = NULL;
539 540
540 if (next != &bdev->ddestroy) { 541 if (entry->ddestroy.next != &bdev->ddestroy) {
541 nentry = list_entry(next, struct ttm_buffer_object, 542 nentry = list_first_entry(&entry->ddestroy,
542 ddestroy); 543 struct ttm_buffer_object, ddestroy);
543 kref_get(&nentry->list_kref); 544 kref_get(&nentry->list_kref);
544 } 545 }
545 kref_get(&entry->list_kref);
546 546
547 spin_unlock(&glob->lru_lock); 547 spin_unlock(&glob->lru_lock);
548 ret = ttm_bo_cleanup_refs(entry, remove_all); 548 ret = ttm_bo_cleanup_refs(entry, remove_all);
549 kref_put(&entry->list_kref, ttm_bo_release_list); 549 kref_put(&entry->list_kref, ttm_bo_release_list);
550 entry = nentry;
551
552 if (ret || !entry)
553 goto out;
550 554
551 spin_lock(&glob->lru_lock); 555 spin_lock(&glob->lru_lock);
552 if (nentry) { 556 if (list_empty(&entry->ddestroy))
553 bool next_onlist = !list_empty(next);
554 spin_unlock(&glob->lru_lock);
555 kref_put(&nentry->list_kref, ttm_bo_release_list);
556 spin_lock(&glob->lru_lock);
557 /*
558 * Someone might have raced us and removed the
559 * next entry from the list. We don't bother restarting
560 * list traversal.
561 */
562
563 if (!next_onlist)
564 break;
565 }
566 if (ret)
567 break; 557 break;
568 } 558 }
569 ret = !list_empty(&bdev->ddestroy);
570 spin_unlock(&glob->lru_lock);
571 559
560out_unlock:
561 spin_unlock(&glob->lru_lock);
562out:
563 if (entry)
564 kref_put(&entry->list_kref, ttm_bo_release_list);
572 return ret; 565 return ret;
573} 566}
574 567
@@ -684,19 +677,45 @@ static int ttm_mem_evict_first(struct ttm_bo_device *bdev,
684 struct ttm_buffer_object *bo; 677 struct ttm_buffer_object *bo;
685 int ret, put_count = 0; 678 int ret, put_count = 0;
686 679
680retry:
687 spin_lock(&glob->lru_lock); 681 spin_lock(&glob->lru_lock);
682 if (list_empty(&man->lru)) {
683 spin_unlock(&glob->lru_lock);
684 return -EBUSY;
685 }
686
688 bo = list_first_entry(&man->lru, struct ttm_buffer_object, lru); 687 bo = list_first_entry(&man->lru, struct ttm_buffer_object, lru);
689 kref_get(&bo->list_kref); 688 kref_get(&bo->list_kref);
690 ret = ttm_bo_reserve_locked(bo, interruptible, no_wait, false, 0); 689
691 if (likely(ret == 0)) 690 ret = ttm_bo_reserve_locked(bo, false, true, false, 0);
692 put_count = ttm_bo_del_from_lru(bo); 691
692 if (unlikely(ret == -EBUSY)) {
693 spin_unlock(&glob->lru_lock);
694 if (likely(!no_wait))
695 ret = ttm_bo_wait_unreserved(bo, interruptible);
696
697 kref_put(&bo->list_kref, ttm_bo_release_list);
698
699 /**
700 * We *need* to retry after releasing the lru lock.
701 */
702
703 if (unlikely(ret != 0))
704 return ret;
705 goto retry;
706 }
707
708 put_count = ttm_bo_del_from_lru(bo);
693 spin_unlock(&glob->lru_lock); 709 spin_unlock(&glob->lru_lock);
694 if (unlikely(ret != 0)) 710
695 return ret; 711 BUG_ON(ret != 0);
712
696 while (put_count--) 713 while (put_count--)
697 kref_put(&bo->list_kref, ttm_bo_ref_bug); 714 kref_put(&bo->list_kref, ttm_bo_ref_bug);
715
698 ret = ttm_bo_evict(bo, interruptible, no_wait); 716 ret = ttm_bo_evict(bo, interruptible, no_wait);
699 ttm_bo_unreserve(bo); 717 ttm_bo_unreserve(bo);
718
700 kref_put(&bo->list_kref, ttm_bo_release_list); 719 kref_put(&bo->list_kref, ttm_bo_release_list);
701 return ret; 720 return ret;
702} 721}
@@ -849,7 +868,7 @@ int ttm_bo_mem_space(struct ttm_buffer_object *bo,
849 int i, ret; 868 int i, ret;
850 869
851 mem->mm_node = NULL; 870 mem->mm_node = NULL;
852 for (i = 0; i <= placement->num_placement; ++i) { 871 for (i = 0; i < placement->num_placement; ++i) {
853 ret = ttm_mem_type_from_flags(placement->placement[i], 872 ret = ttm_mem_type_from_flags(placement->placement[i],
854 &mem_type); 873 &mem_type);
855 if (ret) 874 if (ret)
@@ -900,8 +919,8 @@ int ttm_bo_mem_space(struct ttm_buffer_object *bo,
900 if (!type_found) 919 if (!type_found)
901 return -EINVAL; 920 return -EINVAL;
902 921
903 for (i = 0; i <= placement->num_busy_placement; ++i) { 922 for (i = 0; i < placement->num_busy_placement; ++i) {
904 ret = ttm_mem_type_from_flags(placement->placement[i], 923 ret = ttm_mem_type_from_flags(placement->busy_placement[i],
905 &mem_type); 924 &mem_type);
906 if (ret) 925 if (ret)
907 return ret; 926 return ret;
@@ -911,7 +930,7 @@ int ttm_bo_mem_space(struct ttm_buffer_object *bo,
911 if (!ttm_bo_mt_compatible(man, 930 if (!ttm_bo_mt_compatible(man,
912 bo->type == ttm_bo_type_user, 931 bo->type == ttm_bo_type_user,
913 mem_type, 932 mem_type,
914 placement->placement[i], 933 placement->busy_placement[i],
915 &cur_flags)) 934 &cur_flags))
916 continue; 935 continue;
917 936
@@ -921,9 +940,17 @@ int ttm_bo_mem_space(struct ttm_buffer_object *bo,
921 * Use the access and other non-mapping-related flag bits from 940 * Use the access and other non-mapping-related flag bits from
922 * the memory placement flags to the current flags 941 * the memory placement flags to the current flags
923 */ 942 */
924 ttm_flag_masked(&cur_flags, placement->placement[i], 943 ttm_flag_masked(&cur_flags, placement->busy_placement[i],
925 ~TTM_PL_MASK_MEMTYPE); 944 ~TTM_PL_MASK_MEMTYPE);
926 945
946
947 if (mem_type == TTM_PL_SYSTEM) {
948 mem->mem_type = mem_type;
949 mem->placement = cur_flags;
950 mem->mm_node = NULL;
951 return 0;
952 }
953
927 ret = ttm_bo_mem_force_space(bo, mem_type, placement, mem, 954 ret = ttm_bo_mem_force_space(bo, mem_type, placement, mem,
928 interruptible, no_wait); 955 interruptible, no_wait);
929 if (ret == 0 && mem->mm_node) { 956 if (ret == 0 && mem->mm_node) {
@@ -993,6 +1020,12 @@ static int ttm_bo_mem_compat(struct ttm_placement *placement,
993 struct ttm_mem_reg *mem) 1020 struct ttm_mem_reg *mem)
994{ 1021{
995 int i; 1022 int i;
1023 struct drm_mm_node *node = mem->mm_node;
1024
1025 if (node && placement->lpfn != 0 &&
1026 (node->start < placement->fpfn ||
1027 node->start + node->size > placement->lpfn))
1028 return -1;
996 1029
997 for (i = 0; i < placement->num_placement; i++) { 1030 for (i = 0; i < placement->num_placement; i++) {
998 if ((placement->placement[i] & mem->placement & 1031 if ((placement->placement[i] & mem->placement &
@@ -1115,6 +1148,7 @@ int ttm_bo_init(struct ttm_bo_device *bdev,
1115 bo->glob = bdev->glob; 1148 bo->glob = bdev->glob;
1116 bo->type = type; 1149 bo->type = type;
1117 bo->num_pages = num_pages; 1150 bo->num_pages = num_pages;
1151 bo->mem.size = num_pages << PAGE_SHIFT;
1118 bo->mem.mem_type = TTM_PL_SYSTEM; 1152 bo->mem.mem_type = TTM_PL_SYSTEM;
1119 bo->mem.num_pages = bo->num_pages; 1153 bo->mem.num_pages = bo->num_pages;
1120 bo->mem.mm_node = NULL; 1154 bo->mem.mm_node = NULL;
@@ -1817,6 +1851,9 @@ static int ttm_bo_swapout(struct ttm_mem_shrink *shrink)
1817 * anyone tries to access a ttm page. 1851 * anyone tries to access a ttm page.
1818 */ 1852 */
1819 1853
1854 if (bo->bdev->driver->swap_notify)
1855 bo->bdev->driver->swap_notify(bo);
1856
1820 ret = ttm_tt_swapout(bo->ttm, bo->persistant_swap_storage); 1857 ret = ttm_tt_swapout(bo->ttm, bo->persistant_swap_storage);
1821out: 1858out:
1822 1859
@@ -1837,3 +1874,4 @@ void ttm_bo_swapout_all(struct ttm_bo_device *bdev)
1837 while (ttm_bo_swapout(&bdev->glob->shrink) == 0) 1874 while (ttm_bo_swapout(&bdev->glob->shrink) == 0)
1838 ; 1875 ;
1839} 1876}
1877EXPORT_SYMBOL(ttm_bo_swapout_all);
diff --git a/drivers/gpu/drm/ttm/ttm_bo_util.c b/drivers/gpu/drm/ttm/ttm_bo_util.c
index 2ecf7d0c64f6..5ca37a58a98c 100644
--- a/drivers/gpu/drm/ttm/ttm_bo_util.c
+++ b/drivers/gpu/drm/ttm/ttm_bo_util.c
@@ -53,7 +53,6 @@ int ttm_bo_move_ttm(struct ttm_buffer_object *bo,
53{ 53{
54 struct ttm_tt *ttm = bo->ttm; 54 struct ttm_tt *ttm = bo->ttm;
55 struct ttm_mem_reg *old_mem = &bo->mem; 55 struct ttm_mem_reg *old_mem = &bo->mem;
56 uint32_t save_flags = old_mem->placement;
57 int ret; 56 int ret;
58 57
59 if (old_mem->mem_type != TTM_PL_SYSTEM) { 58 if (old_mem->mem_type != TTM_PL_SYSTEM) {
@@ -62,7 +61,6 @@ int ttm_bo_move_ttm(struct ttm_buffer_object *bo,
62 ttm_flag_masked(&old_mem->placement, TTM_PL_FLAG_SYSTEM, 61 ttm_flag_masked(&old_mem->placement, TTM_PL_FLAG_SYSTEM,
63 TTM_PL_MASK_MEM); 62 TTM_PL_MASK_MEM);
64 old_mem->mem_type = TTM_PL_SYSTEM; 63 old_mem->mem_type = TTM_PL_SYSTEM;
65 save_flags = old_mem->placement;
66 } 64 }
67 65
68 ret = ttm_tt_set_placement_caching(ttm, new_mem->placement); 66 ret = ttm_tt_set_placement_caching(ttm, new_mem->placement);
@@ -77,7 +75,7 @@ int ttm_bo_move_ttm(struct ttm_buffer_object *bo,
77 75
78 *old_mem = *new_mem; 76 *old_mem = *new_mem;
79 new_mem->mm_node = NULL; 77 new_mem->mm_node = NULL;
80 ttm_flag_masked(&save_flags, new_mem->placement, TTM_PL_MASK_MEMTYPE); 78
81 return 0; 79 return 0;
82} 80}
83EXPORT_SYMBOL(ttm_bo_move_ttm); 81EXPORT_SYMBOL(ttm_bo_move_ttm);
@@ -219,7 +217,6 @@ int ttm_bo_move_memcpy(struct ttm_buffer_object *bo,
219 void *old_iomap; 217 void *old_iomap;
220 void *new_iomap; 218 void *new_iomap;
221 int ret; 219 int ret;
222 uint32_t save_flags = old_mem->placement;
223 unsigned long i; 220 unsigned long i;
224 unsigned long page; 221 unsigned long page;
225 unsigned long add = 0; 222 unsigned long add = 0;
@@ -270,7 +267,6 @@ out2:
270 267
271 *old_mem = *new_mem; 268 *old_mem = *new_mem;
272 new_mem->mm_node = NULL; 269 new_mem->mm_node = NULL;
273 ttm_flag_masked(&save_flags, new_mem->placement, TTM_PL_MASK_MEMTYPE);
274 270
275 if ((man->flags & TTM_MEMTYPE_FLAG_FIXED) && (ttm != NULL)) { 271 if ((man->flags & TTM_MEMTYPE_FLAG_FIXED) && (ttm != NULL)) {
276 ttm_tt_unbind(ttm); 272 ttm_tt_unbind(ttm);
@@ -537,7 +533,6 @@ int ttm_bo_move_accel_cleanup(struct ttm_buffer_object *bo,
537 struct ttm_mem_type_manager *man = &bdev->man[new_mem->mem_type]; 533 struct ttm_mem_type_manager *man = &bdev->man[new_mem->mem_type];
538 struct ttm_mem_reg *old_mem = &bo->mem; 534 struct ttm_mem_reg *old_mem = &bo->mem;
539 int ret; 535 int ret;
540 uint32_t save_flags = old_mem->placement;
541 struct ttm_buffer_object *ghost_obj; 536 struct ttm_buffer_object *ghost_obj;
542 void *tmp_obj = NULL; 537 void *tmp_obj = NULL;
543 538
@@ -598,7 +593,7 @@ int ttm_bo_move_accel_cleanup(struct ttm_buffer_object *bo,
598 593
599 *old_mem = *new_mem; 594 *old_mem = *new_mem;
600 new_mem->mm_node = NULL; 595 new_mem->mm_node = NULL;
601 ttm_flag_masked(&save_flags, new_mem->placement, TTM_PL_MASK_MEMTYPE); 596
602 return 0; 597 return 0;
603} 598}
604EXPORT_SYMBOL(ttm_bo_move_accel_cleanup); 599EXPORT_SYMBOL(ttm_bo_move_accel_cleanup);
diff --git a/drivers/gpu/drm/ttm/ttm_bo_vm.c b/drivers/gpu/drm/ttm/ttm_bo_vm.c
index 609a85a4d855..668dbe8b8dd3 100644
--- a/drivers/gpu/drm/ttm/ttm_bo_vm.c
+++ b/drivers/gpu/drm/ttm/ttm_bo_vm.c
@@ -320,7 +320,7 @@ ssize_t ttm_bo_io(struct ttm_bo_device *bdev, struct file *filp,
320 return -EFAULT; 320 return -EFAULT;
321 321
322 driver = bo->bdev->driver; 322 driver = bo->bdev->driver;
323 if (unlikely(driver->verify_access)) { 323 if (unlikely(!driver->verify_access)) {
324 ret = -EPERM; 324 ret = -EPERM;
325 goto out_unref; 325 goto out_unref;
326 } 326 }
diff --git a/drivers/gpu/drm/ttm/ttm_lock.c b/drivers/gpu/drm/ttm/ttm_lock.c
index f619ebcaa4ec..3d172ef04ee1 100644
--- a/drivers/gpu/drm/ttm/ttm_lock.c
+++ b/drivers/gpu/drm/ttm/ttm_lock.c
@@ -288,6 +288,7 @@ void ttm_suspend_unlock(struct ttm_lock *lock)
288 wake_up_all(&lock->queue); 288 wake_up_all(&lock->queue);
289 spin_unlock(&lock->lock); 289 spin_unlock(&lock->lock);
290} 290}
291EXPORT_SYMBOL(ttm_suspend_unlock);
291 292
292static bool __ttm_suspend_lock(struct ttm_lock *lock) 293static bool __ttm_suspend_lock(struct ttm_lock *lock)
293{ 294{
@@ -309,3 +310,4 @@ void ttm_suspend_lock(struct ttm_lock *lock)
309{ 310{
310 wait_event(lock->queue, __ttm_suspend_lock(lock)); 311 wait_event(lock->queue, __ttm_suspend_lock(lock));
311} 312}
313EXPORT_SYMBOL(ttm_suspend_lock);
diff --git a/drivers/gpu/drm/ttm/ttm_object.c b/drivers/gpu/drm/ttm/ttm_object.c
index 1099abac824b..75e9d6f86ba4 100644
--- a/drivers/gpu/drm/ttm/ttm_object.c
+++ b/drivers/gpu/drm/ttm/ttm_object.c
@@ -109,8 +109,8 @@ struct ttm_ref_object {
109 struct drm_hash_item hash; 109 struct drm_hash_item hash;
110 struct list_head head; 110 struct list_head head;
111 struct kref kref; 111 struct kref kref;
112 struct ttm_base_object *obj;
113 enum ttm_ref_type ref_type; 112 enum ttm_ref_type ref_type;
113 struct ttm_base_object *obj;
114 struct ttm_object_file *tfile; 114 struct ttm_object_file *tfile;
115}; 115};
116 116
diff --git a/drivers/gpu/drm/ttm/ttm_tt.c b/drivers/gpu/drm/ttm/ttm_tt.c
index 9c2b1cc5dba5..3d47a2c12322 100644
--- a/drivers/gpu/drm/ttm/ttm_tt.c
+++ b/drivers/gpu/drm/ttm/ttm_tt.c
@@ -196,23 +196,34 @@ EXPORT_SYMBOL(ttm_tt_populate);
196 196
197#ifdef CONFIG_X86 197#ifdef CONFIG_X86
198static inline int ttm_tt_set_page_caching(struct page *p, 198static inline int ttm_tt_set_page_caching(struct page *p,
199 enum ttm_caching_state c_state) 199 enum ttm_caching_state c_old,
200 enum ttm_caching_state c_new)
200{ 201{
202 int ret = 0;
203
201 if (PageHighMem(p)) 204 if (PageHighMem(p))
202 return 0; 205 return 0;
203 206
204 switch (c_state) { 207 if (c_old != tt_cached) {
205 case tt_cached: 208 /* p isn't in the default caching state, set it to
206 return set_pages_wb(p, 1); 209 * writeback first to free its current memtype. */
207 case tt_wc: 210
208 return set_memory_wc((unsigned long) page_address(p), 1); 211 ret = set_pages_wb(p, 1);
209 default: 212 if (ret)
210 return set_pages_uc(p, 1); 213 return ret;
211 } 214 }
215
216 if (c_new == tt_wc)
217 ret = set_memory_wc((unsigned long) page_address(p), 1);
218 else if (c_new == tt_uncached)
219 ret = set_pages_uc(p, 1);
220
221 return ret;
212} 222}
213#else /* CONFIG_X86 */ 223#else /* CONFIG_X86 */
214static inline int ttm_tt_set_page_caching(struct page *p, 224static inline int ttm_tt_set_page_caching(struct page *p,
215 enum ttm_caching_state c_state) 225 enum ttm_caching_state c_old,
226 enum ttm_caching_state c_new)
216{ 227{
217 return 0; 228 return 0;
218} 229}
@@ -245,7 +256,9 @@ static int ttm_tt_set_caching(struct ttm_tt *ttm,
245 for (i = 0; i < ttm->num_pages; ++i) { 256 for (i = 0; i < ttm->num_pages; ++i) {
246 cur_page = ttm->pages[i]; 257 cur_page = ttm->pages[i];
247 if (likely(cur_page != NULL)) { 258 if (likely(cur_page != NULL)) {
248 ret = ttm_tt_set_page_caching(cur_page, c_state); 259 ret = ttm_tt_set_page_caching(cur_page,
260 ttm->caching_state,
261 c_state);
249 if (unlikely(ret != 0)) 262 if (unlikely(ret != 0))
250 goto out_err; 263 goto out_err;
251 } 264 }
@@ -259,7 +272,7 @@ out_err:
259 for (j = 0; j < i; ++j) { 272 for (j = 0; j < i; ++j) {
260 cur_page = ttm->pages[j]; 273 cur_page = ttm->pages[j];
261 if (likely(cur_page != NULL)) { 274 if (likely(cur_page != NULL)) {
262 (void)ttm_tt_set_page_caching(cur_page, 275 (void)ttm_tt_set_page_caching(cur_page, c_state,
263 ttm->caching_state); 276 ttm->caching_state);
264 } 277 }
265 } 278 }
diff --git a/drivers/gpu/drm/via/via_drv.c b/drivers/gpu/drm/via/via_drv.c
index bc2f51843005..7a1b210401e0 100644
--- a/drivers/gpu/drm/via/via_drv.c
+++ b/drivers/gpu/drm/via/via_drv.c
@@ -58,7 +58,7 @@ static struct drm_driver driver = {
58 .owner = THIS_MODULE, 58 .owner = THIS_MODULE,
59 .open = drm_open, 59 .open = drm_open,
60 .release = drm_release, 60 .release = drm_release,
61 .ioctl = drm_ioctl, 61 .unlocked_ioctl = drm_ioctl,
62 .mmap = drm_mmap, 62 .mmap = drm_mmap,
63 .poll = drm_poll, 63 .poll = drm_poll,
64 .fasync = drm_fasync, 64 .fasync = drm_fasync,
diff --git a/drivers/gpu/drm/vmwgfx/Kconfig b/drivers/gpu/drm/vmwgfx/Kconfig
new file mode 100644
index 000000000000..f20b8bcbef39
--- /dev/null
+++ b/drivers/gpu/drm/vmwgfx/Kconfig
@@ -0,0 +1,13 @@
1config DRM_VMWGFX
2 tristate "DRM driver for VMware Virtual GPU"
3 depends on DRM && PCI
4 select FB_DEFERRED_IO
5 select FB_CFB_FILLRECT
6 select FB_CFB_COPYAREA
7 select FB_CFB_IMAGEBLIT
8 select DRM_TTM
9 help
10 KMS enabled DRM driver for SVGA2 virtual hardware.
11
12 If unsure say n. The compiled module will be
13 called vmwgfx.ko
diff --git a/drivers/gpu/drm/vmwgfx/Makefile b/drivers/gpu/drm/vmwgfx/Makefile
new file mode 100644
index 000000000000..1a3cb6816d1c
--- /dev/null
+++ b/drivers/gpu/drm/vmwgfx/Makefile
@@ -0,0 +1,9 @@
1
2ccflags-y := -Iinclude/drm
3
4vmwgfx-y := vmwgfx_execbuf.o vmwgfx_gmr.o vmwgfx_kms.o vmwgfx_drv.o \
5 vmwgfx_fb.o vmwgfx_ioctl.o vmwgfx_resource.o vmwgfx_buffer.o \
6 vmwgfx_fifo.o vmwgfx_irq.o vmwgfx_ldu.o vmwgfx_ttm_glue.o \
7 vmwgfx_overlay.o
8
9obj-$(CONFIG_DRM_VMWGFX) := vmwgfx.o
diff --git a/drivers/gpu/drm/vmwgfx/svga3d_reg.h b/drivers/gpu/drm/vmwgfx/svga3d_reg.h
new file mode 100644
index 000000000000..77cb45331000
--- /dev/null
+++ b/drivers/gpu/drm/vmwgfx/svga3d_reg.h
@@ -0,0 +1,1793 @@
1/**********************************************************
2 * Copyright 1998-2009 VMware, Inc. All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person
5 * obtaining a copy of this software and associated documentation
6 * files (the "Software"), to deal in the Software without
7 * restriction, including without limitation the rights to use, copy,
8 * modify, merge, publish, distribute, sublicense, and/or sell copies
9 * of the Software, and to permit persons to whom the Software is
10 * furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice shall be
13 * included in all copies or substantial portions of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
16 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
17 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
18 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
19 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
20 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
21 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22 * SOFTWARE.
23 *
24 **********************************************************/
25
26/*
27 * svga3d_reg.h --
28 *
29 * SVGA 3D hardware definitions
30 */
31
32#ifndef _SVGA3D_REG_H_
33#define _SVGA3D_REG_H_
34
35#include "svga_reg.h"
36
37
38/*
39 * 3D Hardware Version
40 *
41 * The hardware version is stored in the SVGA_FIFO_3D_HWVERSION fifo
42 * register. Is set by the host and read by the guest. This lets
43 * us make new guest drivers which are backwards-compatible with old
44 * SVGA hardware revisions. It does not let us support old guest
45 * drivers. Good enough for now.
46 *
47 */
48
49#define SVGA3D_MAKE_HWVERSION(major, minor) (((major) << 16) | ((minor) & 0xFF))
50#define SVGA3D_MAJOR_HWVERSION(version) ((version) >> 16)
51#define SVGA3D_MINOR_HWVERSION(version) ((version) & 0xFF)
52
53typedef enum {
54 SVGA3D_HWVERSION_WS5_RC1 = SVGA3D_MAKE_HWVERSION(0, 1),
55 SVGA3D_HWVERSION_WS5_RC2 = SVGA3D_MAKE_HWVERSION(0, 2),
56 SVGA3D_HWVERSION_WS51_RC1 = SVGA3D_MAKE_HWVERSION(0, 3),
57 SVGA3D_HWVERSION_WS6_B1 = SVGA3D_MAKE_HWVERSION(1, 1),
58 SVGA3D_HWVERSION_FUSION_11 = SVGA3D_MAKE_HWVERSION(1, 4),
59 SVGA3D_HWVERSION_WS65_B1 = SVGA3D_MAKE_HWVERSION(2, 0),
60 SVGA3D_HWVERSION_CURRENT = SVGA3D_HWVERSION_WS65_B1,
61} SVGA3dHardwareVersion;
62
63/*
64 * Generic Types
65 */
66
67typedef uint32 SVGA3dBool; /* 32-bit Bool definition */
68#define SVGA3D_NUM_CLIPPLANES 6
69#define SVGA3D_MAX_SIMULTANEOUS_RENDER_TARGETS 8
70
71
72/*
73 * Surface formats.
74 *
75 * If you modify this list, be sure to keep GLUtil.c in sync. It
76 * includes the internal format definition of each surface in
77 * GLUtil_ConvertSurfaceFormat, and it contains a table of
78 * human-readable names in GLUtil_GetFormatName.
79 */
80
81typedef enum SVGA3dSurfaceFormat {
82 SVGA3D_FORMAT_INVALID = 0,
83
84 SVGA3D_X8R8G8B8 = 1,
85 SVGA3D_A8R8G8B8 = 2,
86
87 SVGA3D_R5G6B5 = 3,
88 SVGA3D_X1R5G5B5 = 4,
89 SVGA3D_A1R5G5B5 = 5,
90 SVGA3D_A4R4G4B4 = 6,
91
92 SVGA3D_Z_D32 = 7,
93 SVGA3D_Z_D16 = 8,
94 SVGA3D_Z_D24S8 = 9,
95 SVGA3D_Z_D15S1 = 10,
96
97 SVGA3D_LUMINANCE8 = 11,
98 SVGA3D_LUMINANCE4_ALPHA4 = 12,
99 SVGA3D_LUMINANCE16 = 13,
100 SVGA3D_LUMINANCE8_ALPHA8 = 14,
101
102 SVGA3D_DXT1 = 15,
103 SVGA3D_DXT2 = 16,
104 SVGA3D_DXT3 = 17,
105 SVGA3D_DXT4 = 18,
106 SVGA3D_DXT5 = 19,
107
108 SVGA3D_BUMPU8V8 = 20,
109 SVGA3D_BUMPL6V5U5 = 21,
110 SVGA3D_BUMPX8L8V8U8 = 22,
111 SVGA3D_BUMPL8V8U8 = 23,
112
113 SVGA3D_ARGB_S10E5 = 24, /* 16-bit floating-point ARGB */
114 SVGA3D_ARGB_S23E8 = 25, /* 32-bit floating-point ARGB */
115
116 SVGA3D_A2R10G10B10 = 26,
117
118 /* signed formats */
119 SVGA3D_V8U8 = 27,
120 SVGA3D_Q8W8V8U8 = 28,
121 SVGA3D_CxV8U8 = 29,
122
123 /* mixed formats */
124 SVGA3D_X8L8V8U8 = 30,
125 SVGA3D_A2W10V10U10 = 31,
126
127 SVGA3D_ALPHA8 = 32,
128
129 /* Single- and dual-component floating point formats */
130 SVGA3D_R_S10E5 = 33,
131 SVGA3D_R_S23E8 = 34,
132 SVGA3D_RG_S10E5 = 35,
133 SVGA3D_RG_S23E8 = 36,
134
135 /*
136 * Any surface can be used as a buffer object, but SVGA3D_BUFFER is
137 * the most efficient format to use when creating new surfaces
138 * expressly for index or vertex data.
139 */
140 SVGA3D_BUFFER = 37,
141
142 SVGA3D_Z_D24X8 = 38,
143
144 SVGA3D_V16U16 = 39,
145
146 SVGA3D_G16R16 = 40,
147 SVGA3D_A16B16G16R16 = 41,
148
149 /* Packed Video formats */
150 SVGA3D_UYVY = 42,
151 SVGA3D_YUY2 = 43,
152
153 SVGA3D_FORMAT_MAX
154} SVGA3dSurfaceFormat;
155
156typedef uint32 SVGA3dColor; /* a, r, g, b */
157
158/*
159 * These match the D3DFORMAT_OP definitions used by Direct3D. We need
160 * them so that we can query the host for what the supported surface
161 * operations are (when we're using the D3D backend, in particular),
162 * and so we can send those operations to the guest.
163 */
164typedef enum {
165 SVGA3DFORMAT_OP_TEXTURE = 0x00000001,
166 SVGA3DFORMAT_OP_VOLUMETEXTURE = 0x00000002,
167 SVGA3DFORMAT_OP_CUBETEXTURE = 0x00000004,
168 SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET = 0x00000008,
169 SVGA3DFORMAT_OP_SAME_FORMAT_RENDERTARGET = 0x00000010,
170 SVGA3DFORMAT_OP_ZSTENCIL = 0x00000040,
171 SVGA3DFORMAT_OP_ZSTENCIL_WITH_ARBITRARY_COLOR_DEPTH = 0x00000080,
172
173/*
174 * This format can be used as a render target if the current display mode
175 * is the same depth if the alpha channel is ignored. e.g. if the device
176 * can render to A8R8G8B8 when the display mode is X8R8G8B8, then the
177 * format op list entry for A8R8G8B8 should have this cap.
178 */
179 SVGA3DFORMAT_OP_SAME_FORMAT_UP_TO_ALPHA_RENDERTARGET = 0x00000100,
180
181/*
182 * This format contains DirectDraw support (including Flip). This flag
183 * should not to be set on alpha formats.
184 */
185 SVGA3DFORMAT_OP_DISPLAYMODE = 0x00000400,
186
187/*
188 * The rasterizer can support some level of Direct3D support in this format
189 * and implies that the driver can create a Context in this mode (for some
190 * render target format). When this flag is set, the SVGA3DFORMAT_OP_DISPLAYMODE
191 * flag must also be set.
192 */
193 SVGA3DFORMAT_OP_3DACCELERATION = 0x00000800,
194
195/*
196 * This is set for a private format when the driver has put the bpp in
197 * the structure.
198 */
199 SVGA3DFORMAT_OP_PIXELSIZE = 0x00001000,
200
201/*
202 * Indicates that this format can be converted to any RGB format for which
203 * SVGA3DFORMAT_OP_MEMBEROFGROUP_ARGB is specified
204 */
205 SVGA3DFORMAT_OP_CONVERT_TO_ARGB = 0x00002000,
206
207/*
208 * Indicates that this format can be used to create offscreen plain surfaces.
209 */
210 SVGA3DFORMAT_OP_OFFSCREENPLAIN = 0x00004000,
211
212/*
213 * Indicated that this format can be read as an SRGB texture (meaning that the
214 * sampler will linearize the looked up data)
215 */
216 SVGA3DFORMAT_OP_SRGBREAD = 0x00008000,
217
218/*
219 * Indicates that this format can be used in the bumpmap instructions
220 */
221 SVGA3DFORMAT_OP_BUMPMAP = 0x00010000,
222
223/*
224 * Indicates that this format can be sampled by the displacement map sampler
225 */
226 SVGA3DFORMAT_OP_DMAP = 0x00020000,
227
228/*
229 * Indicates that this format cannot be used with texture filtering
230 */
231 SVGA3DFORMAT_OP_NOFILTER = 0x00040000,
232
233/*
234 * Indicates that format conversions are supported to this RGB format if
235 * SVGA3DFORMAT_OP_CONVERT_TO_ARGB is specified in the source format.
236 */
237 SVGA3DFORMAT_OP_MEMBEROFGROUP_ARGB = 0x00080000,
238
239/*
240 * Indicated that this format can be written as an SRGB target (meaning that the
241 * pixel pipe will DE-linearize data on output to format)
242 */
243 SVGA3DFORMAT_OP_SRGBWRITE = 0x00100000,
244
245/*
246 * Indicates that this format cannot be used with alpha blending
247 */
248 SVGA3DFORMAT_OP_NOALPHABLEND = 0x00200000,
249
250/*
251 * Indicates that the device can auto-generated sublevels for resources
252 * of this format
253 */
254 SVGA3DFORMAT_OP_AUTOGENMIPMAP = 0x00400000,
255
256/*
257 * Indicates that this format can be used by vertex texture sampler
258 */
259 SVGA3DFORMAT_OP_VERTEXTEXTURE = 0x00800000,
260
261/*
262 * Indicates that this format supports neither texture coordinate wrap
263 * modes, nor mipmapping
264 */
265 SVGA3DFORMAT_OP_NOTEXCOORDWRAPNORMIP = 0x01000000
266} SVGA3dFormatOp;
267
268/*
269 * This structure is a conversion of SVGA3DFORMAT_OP_*.
270 * Entries must be located at the same position.
271 */
272typedef union {
273 uint32 value;
274 struct {
275 uint32 texture : 1;
276 uint32 volumeTexture : 1;
277 uint32 cubeTexture : 1;
278 uint32 offscreenRenderTarget : 1;
279 uint32 sameFormatRenderTarget : 1;
280 uint32 unknown1 : 1;
281 uint32 zStencil : 1;
282 uint32 zStencilArbitraryDepth : 1;
283 uint32 sameFormatUpToAlpha : 1;
284 uint32 unknown2 : 1;
285 uint32 displayMode : 1;
286 uint32 acceleration3d : 1;
287 uint32 pixelSize : 1;
288 uint32 convertToARGB : 1;
289 uint32 offscreenPlain : 1;
290 uint32 sRGBRead : 1;
291 uint32 bumpMap : 1;
292 uint32 dmap : 1;
293 uint32 noFilter : 1;
294 uint32 memberOfGroupARGB : 1;
295 uint32 sRGBWrite : 1;
296 uint32 noAlphaBlend : 1;
297 uint32 autoGenMipMap : 1;
298 uint32 vertexTexture : 1;
299 uint32 noTexCoordWrapNorMip : 1;
300 };
301} SVGA3dSurfaceFormatCaps;
302
303/*
304 * SVGA_3D_CMD_SETRENDERSTATE Types. All value types
305 * must fit in a uint32.
306 */
307
308typedef enum {
309 SVGA3D_RS_INVALID = 0,
310 SVGA3D_RS_ZENABLE = 1, /* SVGA3dBool */
311 SVGA3D_RS_ZWRITEENABLE = 2, /* SVGA3dBool */
312 SVGA3D_RS_ALPHATESTENABLE = 3, /* SVGA3dBool */
313 SVGA3D_RS_DITHERENABLE = 4, /* SVGA3dBool */
314 SVGA3D_RS_BLENDENABLE = 5, /* SVGA3dBool */
315 SVGA3D_RS_FOGENABLE = 6, /* SVGA3dBool */
316 SVGA3D_RS_SPECULARENABLE = 7, /* SVGA3dBool */
317 SVGA3D_RS_STENCILENABLE = 8, /* SVGA3dBool */
318 SVGA3D_RS_LIGHTINGENABLE = 9, /* SVGA3dBool */
319 SVGA3D_RS_NORMALIZENORMALS = 10, /* SVGA3dBool */
320 SVGA3D_RS_POINTSPRITEENABLE = 11, /* SVGA3dBool */
321 SVGA3D_RS_POINTSCALEENABLE = 12, /* SVGA3dBool */
322 SVGA3D_RS_STENCILREF = 13, /* uint32 */
323 SVGA3D_RS_STENCILMASK = 14, /* uint32 */
324 SVGA3D_RS_STENCILWRITEMASK = 15, /* uint32 */
325 SVGA3D_RS_FOGSTART = 16, /* float */
326 SVGA3D_RS_FOGEND = 17, /* float */
327 SVGA3D_RS_FOGDENSITY = 18, /* float */
328 SVGA3D_RS_POINTSIZE = 19, /* float */
329 SVGA3D_RS_POINTSIZEMIN = 20, /* float */
330 SVGA3D_RS_POINTSIZEMAX = 21, /* float */
331 SVGA3D_RS_POINTSCALE_A = 22, /* float */
332 SVGA3D_RS_POINTSCALE_B = 23, /* float */
333 SVGA3D_RS_POINTSCALE_C = 24, /* float */
334 SVGA3D_RS_FOGCOLOR = 25, /* SVGA3dColor */
335 SVGA3D_RS_AMBIENT = 26, /* SVGA3dColor */
336 SVGA3D_RS_CLIPPLANEENABLE = 27, /* SVGA3dClipPlanes */
337 SVGA3D_RS_FOGMODE = 28, /* SVGA3dFogMode */
338 SVGA3D_RS_FILLMODE = 29, /* SVGA3dFillMode */
339 SVGA3D_RS_SHADEMODE = 30, /* SVGA3dShadeMode */
340 SVGA3D_RS_LINEPATTERN = 31, /* SVGA3dLinePattern */
341 SVGA3D_RS_SRCBLEND = 32, /* SVGA3dBlendOp */
342 SVGA3D_RS_DSTBLEND = 33, /* SVGA3dBlendOp */
343 SVGA3D_RS_BLENDEQUATION = 34, /* SVGA3dBlendEquation */
344 SVGA3D_RS_CULLMODE = 35, /* SVGA3dFace */
345 SVGA3D_RS_ZFUNC = 36, /* SVGA3dCmpFunc */
346 SVGA3D_RS_ALPHAFUNC = 37, /* SVGA3dCmpFunc */
347 SVGA3D_RS_STENCILFUNC = 38, /* SVGA3dCmpFunc */
348 SVGA3D_RS_STENCILFAIL = 39, /* SVGA3dStencilOp */
349 SVGA3D_RS_STENCILZFAIL = 40, /* SVGA3dStencilOp */
350 SVGA3D_RS_STENCILPASS = 41, /* SVGA3dStencilOp */
351 SVGA3D_RS_ALPHAREF = 42, /* float (0.0 .. 1.0) */
352 SVGA3D_RS_FRONTWINDING = 43, /* SVGA3dFrontWinding */
353 SVGA3D_RS_COORDINATETYPE = 44, /* SVGA3dCoordinateType */
354 SVGA3D_RS_ZBIAS = 45, /* float */
355 SVGA3D_RS_RANGEFOGENABLE = 46, /* SVGA3dBool */
356 SVGA3D_RS_COLORWRITEENABLE = 47, /* SVGA3dColorMask */
357 SVGA3D_RS_VERTEXMATERIALENABLE = 48, /* SVGA3dBool */
358 SVGA3D_RS_DIFFUSEMATERIALSOURCE = 49, /* SVGA3dVertexMaterial */
359 SVGA3D_RS_SPECULARMATERIALSOURCE = 50, /* SVGA3dVertexMaterial */
360 SVGA3D_RS_AMBIENTMATERIALSOURCE = 51, /* SVGA3dVertexMaterial */
361 SVGA3D_RS_EMISSIVEMATERIALSOURCE = 52, /* SVGA3dVertexMaterial */
362 SVGA3D_RS_TEXTUREFACTOR = 53, /* SVGA3dColor */
363 SVGA3D_RS_LOCALVIEWER = 54, /* SVGA3dBool */
364 SVGA3D_RS_SCISSORTESTENABLE = 55, /* SVGA3dBool */
365 SVGA3D_RS_BLENDCOLOR = 56, /* SVGA3dColor */
366 SVGA3D_RS_STENCILENABLE2SIDED = 57, /* SVGA3dBool */
367 SVGA3D_RS_CCWSTENCILFUNC = 58, /* SVGA3dCmpFunc */
368 SVGA3D_RS_CCWSTENCILFAIL = 59, /* SVGA3dStencilOp */
369 SVGA3D_RS_CCWSTENCILZFAIL = 60, /* SVGA3dStencilOp */
370 SVGA3D_RS_CCWSTENCILPASS = 61, /* SVGA3dStencilOp */
371 SVGA3D_RS_VERTEXBLEND = 62, /* SVGA3dVertexBlendFlags */
372 SVGA3D_RS_SLOPESCALEDEPTHBIAS = 63, /* float */
373 SVGA3D_RS_DEPTHBIAS = 64, /* float */
374
375
376 /*
377 * Output Gamma Level
378 *
379 * Output gamma effects the gamma curve of colors that are output from the
380 * rendering pipeline. A value of 1.0 specifies a linear color space. If the
381 * value is <= 0.0, gamma correction is ignored and linear color space is
382 * used.
383 */
384
385 SVGA3D_RS_OUTPUTGAMMA = 65, /* float */
386 SVGA3D_RS_ZVISIBLE = 66, /* SVGA3dBool */
387 SVGA3D_RS_LASTPIXEL = 67, /* SVGA3dBool */
388 SVGA3D_RS_CLIPPING = 68, /* SVGA3dBool */
389 SVGA3D_RS_WRAP0 = 69, /* SVGA3dWrapFlags */
390 SVGA3D_RS_WRAP1 = 70, /* SVGA3dWrapFlags */
391 SVGA3D_RS_WRAP2 = 71, /* SVGA3dWrapFlags */
392 SVGA3D_RS_WRAP3 = 72, /* SVGA3dWrapFlags */
393 SVGA3D_RS_WRAP4 = 73, /* SVGA3dWrapFlags */
394 SVGA3D_RS_WRAP5 = 74, /* SVGA3dWrapFlags */
395 SVGA3D_RS_WRAP6 = 75, /* SVGA3dWrapFlags */
396 SVGA3D_RS_WRAP7 = 76, /* SVGA3dWrapFlags */
397 SVGA3D_RS_WRAP8 = 77, /* SVGA3dWrapFlags */
398 SVGA3D_RS_WRAP9 = 78, /* SVGA3dWrapFlags */
399 SVGA3D_RS_WRAP10 = 79, /* SVGA3dWrapFlags */
400 SVGA3D_RS_WRAP11 = 80, /* SVGA3dWrapFlags */
401 SVGA3D_RS_WRAP12 = 81, /* SVGA3dWrapFlags */
402 SVGA3D_RS_WRAP13 = 82, /* SVGA3dWrapFlags */
403 SVGA3D_RS_WRAP14 = 83, /* SVGA3dWrapFlags */
404 SVGA3D_RS_WRAP15 = 84, /* SVGA3dWrapFlags */
405 SVGA3D_RS_MULTISAMPLEANTIALIAS = 85, /* SVGA3dBool */
406 SVGA3D_RS_MULTISAMPLEMASK = 86, /* uint32 */
407 SVGA3D_RS_INDEXEDVERTEXBLENDENABLE = 87, /* SVGA3dBool */
408 SVGA3D_RS_TWEENFACTOR = 88, /* float */
409 SVGA3D_RS_ANTIALIASEDLINEENABLE = 89, /* SVGA3dBool */
410 SVGA3D_RS_COLORWRITEENABLE1 = 90, /* SVGA3dColorMask */
411 SVGA3D_RS_COLORWRITEENABLE2 = 91, /* SVGA3dColorMask */
412 SVGA3D_RS_COLORWRITEENABLE3 = 92, /* SVGA3dColorMask */
413 SVGA3D_RS_SEPARATEALPHABLENDENABLE = 93, /* SVGA3dBool */
414 SVGA3D_RS_SRCBLENDALPHA = 94, /* SVGA3dBlendOp */
415 SVGA3D_RS_DSTBLENDALPHA = 95, /* SVGA3dBlendOp */
416 SVGA3D_RS_BLENDEQUATIONALPHA = 96, /* SVGA3dBlendEquation */
417 SVGA3D_RS_MAX
418} SVGA3dRenderStateName;
419
420typedef enum {
421 SVGA3D_VERTEXMATERIAL_NONE = 0, /* Use the value in the current material */
422 SVGA3D_VERTEXMATERIAL_DIFFUSE = 1, /* Use the value in the diffuse component */
423 SVGA3D_VERTEXMATERIAL_SPECULAR = 2, /* Use the value in the specular component */
424} SVGA3dVertexMaterial;
425
426typedef enum {
427 SVGA3D_FILLMODE_INVALID = 0,
428 SVGA3D_FILLMODE_POINT = 1,
429 SVGA3D_FILLMODE_LINE = 2,
430 SVGA3D_FILLMODE_FILL = 3,
431 SVGA3D_FILLMODE_MAX
432} SVGA3dFillModeType;
433
434
435typedef
436union {
437 struct {
438 uint16 mode; /* SVGA3dFillModeType */
439 uint16 face; /* SVGA3dFace */
440 };
441 uint32 uintValue;
442} SVGA3dFillMode;
443
444typedef enum {
445 SVGA3D_SHADEMODE_INVALID = 0,
446 SVGA3D_SHADEMODE_FLAT = 1,
447 SVGA3D_SHADEMODE_SMOOTH = 2,
448 SVGA3D_SHADEMODE_PHONG = 3, /* Not supported */
449 SVGA3D_SHADEMODE_MAX
450} SVGA3dShadeMode;
451
452typedef
453union {
454 struct {
455 uint16 repeat;
456 uint16 pattern;
457 };
458 uint32 uintValue;
459} SVGA3dLinePattern;
460
461typedef enum {
462 SVGA3D_BLENDOP_INVALID = 0,
463 SVGA3D_BLENDOP_ZERO = 1,
464 SVGA3D_BLENDOP_ONE = 2,
465 SVGA3D_BLENDOP_SRCCOLOR = 3,
466 SVGA3D_BLENDOP_INVSRCCOLOR = 4,
467 SVGA3D_BLENDOP_SRCALPHA = 5,
468 SVGA3D_BLENDOP_INVSRCALPHA = 6,
469 SVGA3D_BLENDOP_DESTALPHA = 7,
470 SVGA3D_BLENDOP_INVDESTALPHA = 8,
471 SVGA3D_BLENDOP_DESTCOLOR = 9,
472 SVGA3D_BLENDOP_INVDESTCOLOR = 10,
473 SVGA3D_BLENDOP_SRCALPHASAT = 11,
474 SVGA3D_BLENDOP_BLENDFACTOR = 12,
475 SVGA3D_BLENDOP_INVBLENDFACTOR = 13,
476 SVGA3D_BLENDOP_MAX
477} SVGA3dBlendOp;
478
479typedef enum {
480 SVGA3D_BLENDEQ_INVALID = 0,
481 SVGA3D_BLENDEQ_ADD = 1,
482 SVGA3D_BLENDEQ_SUBTRACT = 2,
483 SVGA3D_BLENDEQ_REVSUBTRACT = 3,
484 SVGA3D_BLENDEQ_MINIMUM = 4,
485 SVGA3D_BLENDEQ_MAXIMUM = 5,
486 SVGA3D_BLENDEQ_MAX
487} SVGA3dBlendEquation;
488
489typedef enum {
490 SVGA3D_FRONTWINDING_INVALID = 0,
491 SVGA3D_FRONTWINDING_CW = 1,
492 SVGA3D_FRONTWINDING_CCW = 2,
493 SVGA3D_FRONTWINDING_MAX
494} SVGA3dFrontWinding;
495
496typedef enum {
497 SVGA3D_FACE_INVALID = 0,
498 SVGA3D_FACE_NONE = 1,
499 SVGA3D_FACE_FRONT = 2,
500 SVGA3D_FACE_BACK = 3,
501 SVGA3D_FACE_FRONT_BACK = 4,
502 SVGA3D_FACE_MAX
503} SVGA3dFace;
504
505/*
506 * The order and the values should not be changed
507 */
508
509typedef enum {
510 SVGA3D_CMP_INVALID = 0,
511 SVGA3D_CMP_NEVER = 1,
512 SVGA3D_CMP_LESS = 2,
513 SVGA3D_CMP_EQUAL = 3,
514 SVGA3D_CMP_LESSEQUAL = 4,
515 SVGA3D_CMP_GREATER = 5,
516 SVGA3D_CMP_NOTEQUAL = 6,
517 SVGA3D_CMP_GREATEREQUAL = 7,
518 SVGA3D_CMP_ALWAYS = 8,
519 SVGA3D_CMP_MAX
520} SVGA3dCmpFunc;
521
522/*
523 * SVGA3D_FOGFUNC_* specifies the fog equation, or PER_VERTEX which allows
524 * the fog factor to be specified in the alpha component of the specular
525 * (a.k.a. secondary) vertex color.
526 */
527typedef enum {
528 SVGA3D_FOGFUNC_INVALID = 0,
529 SVGA3D_FOGFUNC_EXP = 1,
530 SVGA3D_FOGFUNC_EXP2 = 2,
531 SVGA3D_FOGFUNC_LINEAR = 3,
532 SVGA3D_FOGFUNC_PER_VERTEX = 4
533} SVGA3dFogFunction;
534
535/*
536 * SVGA3D_FOGTYPE_* specifies if fog factors are computed on a per-vertex
537 * or per-pixel basis.
538 */
539typedef enum {
540 SVGA3D_FOGTYPE_INVALID = 0,
541 SVGA3D_FOGTYPE_VERTEX = 1,
542 SVGA3D_FOGTYPE_PIXEL = 2,
543 SVGA3D_FOGTYPE_MAX = 3
544} SVGA3dFogType;
545
546/*
547 * SVGA3D_FOGBASE_* selects depth or range-based fog. Depth-based fog is
548 * computed using the eye Z value of each pixel (or vertex), whereas range-
549 * based fog is computed using the actual distance (range) to the eye.
550 */
551typedef enum {
552 SVGA3D_FOGBASE_INVALID = 0,
553 SVGA3D_FOGBASE_DEPTHBASED = 1,
554 SVGA3D_FOGBASE_RANGEBASED = 2,
555 SVGA3D_FOGBASE_MAX = 3
556} SVGA3dFogBase;
557
558typedef enum {
559 SVGA3D_STENCILOP_INVALID = 0,
560 SVGA3D_STENCILOP_KEEP = 1,
561 SVGA3D_STENCILOP_ZERO = 2,
562 SVGA3D_STENCILOP_REPLACE = 3,
563 SVGA3D_STENCILOP_INCRSAT = 4,
564 SVGA3D_STENCILOP_DECRSAT = 5,
565 SVGA3D_STENCILOP_INVERT = 6,
566 SVGA3D_STENCILOP_INCR = 7,
567 SVGA3D_STENCILOP_DECR = 8,
568 SVGA3D_STENCILOP_MAX
569} SVGA3dStencilOp;
570
571typedef enum {
572 SVGA3D_CLIPPLANE_0 = (1 << 0),
573 SVGA3D_CLIPPLANE_1 = (1 << 1),
574 SVGA3D_CLIPPLANE_2 = (1 << 2),
575 SVGA3D_CLIPPLANE_3 = (1 << 3),
576 SVGA3D_CLIPPLANE_4 = (1 << 4),
577 SVGA3D_CLIPPLANE_5 = (1 << 5),
578} SVGA3dClipPlanes;
579
580typedef enum {
581 SVGA3D_CLEAR_COLOR = 0x1,
582 SVGA3D_CLEAR_DEPTH = 0x2,
583 SVGA3D_CLEAR_STENCIL = 0x4
584} SVGA3dClearFlag;
585
586typedef enum {
587 SVGA3D_RT_DEPTH = 0,
588 SVGA3D_RT_STENCIL = 1,
589 SVGA3D_RT_COLOR0 = 2,
590 SVGA3D_RT_COLOR1 = 3,
591 SVGA3D_RT_COLOR2 = 4,
592 SVGA3D_RT_COLOR3 = 5,
593 SVGA3D_RT_COLOR4 = 6,
594 SVGA3D_RT_COLOR5 = 7,
595 SVGA3D_RT_COLOR6 = 8,
596 SVGA3D_RT_COLOR7 = 9,
597 SVGA3D_RT_MAX,
598 SVGA3D_RT_INVALID = ((uint32)-1),
599} SVGA3dRenderTargetType;
600
601#define SVGA3D_MAX_RT_COLOR (SVGA3D_RT_COLOR7 - SVGA3D_RT_COLOR0 + 1)
602
603typedef
604union {
605 struct {
606 uint32 red : 1;
607 uint32 green : 1;
608 uint32 blue : 1;
609 uint32 alpha : 1;
610 };
611 uint32 uintValue;
612} SVGA3dColorMask;
613
614typedef enum {
615 SVGA3D_VBLEND_DISABLE = 0,
616 SVGA3D_VBLEND_1WEIGHT = 1,
617 SVGA3D_VBLEND_2WEIGHT = 2,
618 SVGA3D_VBLEND_3WEIGHT = 3,
619} SVGA3dVertexBlendFlags;
620
621typedef enum {
622 SVGA3D_WRAPCOORD_0 = 1 << 0,
623 SVGA3D_WRAPCOORD_1 = 1 << 1,
624 SVGA3D_WRAPCOORD_2 = 1 << 2,
625 SVGA3D_WRAPCOORD_3 = 1 << 3,
626 SVGA3D_WRAPCOORD_ALL = 0xF,
627} SVGA3dWrapFlags;
628
629/*
630 * SVGA_3D_CMD_TEXTURESTATE Types. All value types
631 * must fit in a uint32.
632 */
633
634typedef enum {
635 SVGA3D_TS_INVALID = 0,
636 SVGA3D_TS_BIND_TEXTURE = 1, /* SVGA3dSurfaceId */
637 SVGA3D_TS_COLOROP = 2, /* SVGA3dTextureCombiner */
638 SVGA3D_TS_COLORARG1 = 3, /* SVGA3dTextureArgData */
639 SVGA3D_TS_COLORARG2 = 4, /* SVGA3dTextureArgData */
640 SVGA3D_TS_ALPHAOP = 5, /* SVGA3dTextureCombiner */
641 SVGA3D_TS_ALPHAARG1 = 6, /* SVGA3dTextureArgData */
642 SVGA3D_TS_ALPHAARG2 = 7, /* SVGA3dTextureArgData */
643 SVGA3D_TS_ADDRESSU = 8, /* SVGA3dTextureAddress */
644 SVGA3D_TS_ADDRESSV = 9, /* SVGA3dTextureAddress */
645 SVGA3D_TS_MIPFILTER = 10, /* SVGA3dTextureFilter */
646 SVGA3D_TS_MAGFILTER = 11, /* SVGA3dTextureFilter */
647 SVGA3D_TS_MINFILTER = 12, /* SVGA3dTextureFilter */
648 SVGA3D_TS_BORDERCOLOR = 13, /* SVGA3dColor */
649 SVGA3D_TS_TEXCOORDINDEX = 14, /* uint32 */
650 SVGA3D_TS_TEXTURETRANSFORMFLAGS = 15, /* SVGA3dTexTransformFlags */
651 SVGA3D_TS_TEXCOORDGEN = 16, /* SVGA3dTextureCoordGen */
652 SVGA3D_TS_BUMPENVMAT00 = 17, /* float */
653 SVGA3D_TS_BUMPENVMAT01 = 18, /* float */
654 SVGA3D_TS_BUMPENVMAT10 = 19, /* float */
655 SVGA3D_TS_BUMPENVMAT11 = 20, /* float */
656 SVGA3D_TS_TEXTURE_MIPMAP_LEVEL = 21, /* uint32 */
657 SVGA3D_TS_TEXTURE_LOD_BIAS = 22, /* float */
658 SVGA3D_TS_TEXTURE_ANISOTROPIC_LEVEL = 23, /* uint32 */
659 SVGA3D_TS_ADDRESSW = 24, /* SVGA3dTextureAddress */
660
661
662 /*
663 * Sampler Gamma Level
664 *
665 * Sampler gamma effects the color of samples taken from the sampler. A
666 * value of 1.0 will produce linear samples. If the value is <= 0.0 the
667 * gamma value is ignored and a linear space is used.
668 */
669
670 SVGA3D_TS_GAMMA = 25, /* float */
671 SVGA3D_TS_BUMPENVLSCALE = 26, /* float */
672 SVGA3D_TS_BUMPENVLOFFSET = 27, /* float */
673 SVGA3D_TS_COLORARG0 = 28, /* SVGA3dTextureArgData */
674 SVGA3D_TS_ALPHAARG0 = 29, /* SVGA3dTextureArgData */
675 SVGA3D_TS_MAX
676} SVGA3dTextureStateName;
677
678typedef enum {
679 SVGA3D_TC_INVALID = 0,
680 SVGA3D_TC_DISABLE = 1,
681 SVGA3D_TC_SELECTARG1 = 2,
682 SVGA3D_TC_SELECTARG2 = 3,
683 SVGA3D_TC_MODULATE = 4,
684 SVGA3D_TC_ADD = 5,
685 SVGA3D_TC_ADDSIGNED = 6,
686 SVGA3D_TC_SUBTRACT = 7,
687 SVGA3D_TC_BLENDTEXTUREALPHA = 8,
688 SVGA3D_TC_BLENDDIFFUSEALPHA = 9,
689 SVGA3D_TC_BLENDCURRENTALPHA = 10,
690 SVGA3D_TC_BLENDFACTORALPHA = 11,
691 SVGA3D_TC_MODULATE2X = 12,
692 SVGA3D_TC_MODULATE4X = 13,
693 SVGA3D_TC_DSDT = 14,
694 SVGA3D_TC_DOTPRODUCT3 = 15,
695 SVGA3D_TC_BLENDTEXTUREALPHAPM = 16,
696 SVGA3D_TC_ADDSIGNED2X = 17,
697 SVGA3D_TC_ADDSMOOTH = 18,
698 SVGA3D_TC_PREMODULATE = 19,
699 SVGA3D_TC_MODULATEALPHA_ADDCOLOR = 20,
700 SVGA3D_TC_MODULATECOLOR_ADDALPHA = 21,
701 SVGA3D_TC_MODULATEINVALPHA_ADDCOLOR = 22,
702 SVGA3D_TC_MODULATEINVCOLOR_ADDALPHA = 23,
703 SVGA3D_TC_BUMPENVMAPLUMINANCE = 24,
704 SVGA3D_TC_MULTIPLYADD = 25,
705 SVGA3D_TC_LERP = 26,
706 SVGA3D_TC_MAX
707} SVGA3dTextureCombiner;
708
709#define SVGA3D_TC_CAP_BIT(svga3d_tc_op) (svga3d_tc_op ? (1 << (svga3d_tc_op - 1)) : 0)
710
711typedef enum {
712 SVGA3D_TEX_ADDRESS_INVALID = 0,
713 SVGA3D_TEX_ADDRESS_WRAP = 1,
714 SVGA3D_TEX_ADDRESS_MIRROR = 2,
715 SVGA3D_TEX_ADDRESS_CLAMP = 3,
716 SVGA3D_TEX_ADDRESS_BORDER = 4,
717 SVGA3D_TEX_ADDRESS_MIRRORONCE = 5,
718 SVGA3D_TEX_ADDRESS_EDGE = 6,
719 SVGA3D_TEX_ADDRESS_MAX
720} SVGA3dTextureAddress;
721
722/*
723 * SVGA3D_TEX_FILTER_NONE as the minification filter means mipmapping is
724 * disabled, and the rasterizer should use the magnification filter instead.
725 */
726typedef enum {
727 SVGA3D_TEX_FILTER_NONE = 0,
728 SVGA3D_TEX_FILTER_NEAREST = 1,
729 SVGA3D_TEX_FILTER_LINEAR = 2,
730 SVGA3D_TEX_FILTER_ANISOTROPIC = 3,
731 SVGA3D_TEX_FILTER_FLATCUBIC = 4, // Deprecated, not implemented
732 SVGA3D_TEX_FILTER_GAUSSIANCUBIC = 5, // Deprecated, not implemented
733 SVGA3D_TEX_FILTER_PYRAMIDALQUAD = 6, // Not currently implemented
734 SVGA3D_TEX_FILTER_GAUSSIANQUAD = 7, // Not currently implemented
735 SVGA3D_TEX_FILTER_MAX
736} SVGA3dTextureFilter;
737
738typedef enum {
739 SVGA3D_TEX_TRANSFORM_OFF = 0,
740 SVGA3D_TEX_TRANSFORM_S = (1 << 0),
741 SVGA3D_TEX_TRANSFORM_T = (1 << 1),
742 SVGA3D_TEX_TRANSFORM_R = (1 << 2),
743 SVGA3D_TEX_TRANSFORM_Q = (1 << 3),
744 SVGA3D_TEX_PROJECTED = (1 << 15),
745} SVGA3dTexTransformFlags;
746
747typedef enum {
748 SVGA3D_TEXCOORD_GEN_OFF = 0,
749 SVGA3D_TEXCOORD_GEN_EYE_POSITION = 1,
750 SVGA3D_TEXCOORD_GEN_EYE_NORMAL = 2,
751 SVGA3D_TEXCOORD_GEN_REFLECTIONVECTOR = 3,
752 SVGA3D_TEXCOORD_GEN_SPHERE = 4,
753 SVGA3D_TEXCOORD_GEN_MAX
754} SVGA3dTextureCoordGen;
755
756/*
757 * Texture argument constants for texture combiner
758 */
759typedef enum {
760 SVGA3D_TA_INVALID = 0,
761 SVGA3D_TA_CONSTANT = 1,
762 SVGA3D_TA_PREVIOUS = 2,
763 SVGA3D_TA_DIFFUSE = 3,
764 SVGA3D_TA_TEXTURE = 4,
765 SVGA3D_TA_SPECULAR = 5,
766 SVGA3D_TA_MAX
767} SVGA3dTextureArgData;
768
769#define SVGA3D_TM_MASK_LEN 4
770
771/* Modifiers for texture argument constants defined above. */
772typedef enum {
773 SVGA3D_TM_NONE = 0,
774 SVGA3D_TM_ALPHA = (1 << SVGA3D_TM_MASK_LEN),
775 SVGA3D_TM_ONE_MINUS = (2 << SVGA3D_TM_MASK_LEN),
776} SVGA3dTextureArgModifier;
777
778#define SVGA3D_INVALID_ID ((uint32)-1)
779#define SVGA3D_MAX_CLIP_PLANES 6
780
781/*
782 * This is the limit to the number of fixed-function texture
783 * transforms and texture coordinates we can support. It does *not*
784 * correspond to the number of texture image units (samplers) we
785 * support!
786 */
787#define SVGA3D_MAX_TEXTURE_COORDS 8
788
789/*
790 * Vertex declarations
791 *
792 * Notes:
793 *
794 * SVGA3D_DECLUSAGE_POSITIONT is for pre-transformed vertices. If you
795 * draw with any POSITIONT vertex arrays, the programmable vertex
796 * pipeline will be implicitly disabled. Drawing will take place as if
797 * no vertex shader was bound.
798 */
799
800typedef enum {
801 SVGA3D_DECLUSAGE_POSITION = 0,
802 SVGA3D_DECLUSAGE_BLENDWEIGHT, // 1
803 SVGA3D_DECLUSAGE_BLENDINDICES, // 2
804 SVGA3D_DECLUSAGE_NORMAL, // 3
805 SVGA3D_DECLUSAGE_PSIZE, // 4
806 SVGA3D_DECLUSAGE_TEXCOORD, // 5
807 SVGA3D_DECLUSAGE_TANGENT, // 6
808 SVGA3D_DECLUSAGE_BINORMAL, // 7
809 SVGA3D_DECLUSAGE_TESSFACTOR, // 8
810 SVGA3D_DECLUSAGE_POSITIONT, // 9
811 SVGA3D_DECLUSAGE_COLOR, // 10
812 SVGA3D_DECLUSAGE_FOG, // 11
813 SVGA3D_DECLUSAGE_DEPTH, // 12
814 SVGA3D_DECLUSAGE_SAMPLE, // 13
815 SVGA3D_DECLUSAGE_MAX
816} SVGA3dDeclUsage;
817
818typedef enum {
819 SVGA3D_DECLMETHOD_DEFAULT = 0,
820 SVGA3D_DECLMETHOD_PARTIALU,
821 SVGA3D_DECLMETHOD_PARTIALV,
822 SVGA3D_DECLMETHOD_CROSSUV, // Normal
823 SVGA3D_DECLMETHOD_UV,
824 SVGA3D_DECLMETHOD_LOOKUP, // Lookup a displacement map
825 SVGA3D_DECLMETHOD_LOOKUPPRESAMPLED, // Lookup a pre-sampled displacement map
826} SVGA3dDeclMethod;
827
828typedef enum {
829 SVGA3D_DECLTYPE_FLOAT1 = 0,
830 SVGA3D_DECLTYPE_FLOAT2 = 1,
831 SVGA3D_DECLTYPE_FLOAT3 = 2,
832 SVGA3D_DECLTYPE_FLOAT4 = 3,
833 SVGA3D_DECLTYPE_D3DCOLOR = 4,
834 SVGA3D_DECLTYPE_UBYTE4 = 5,
835 SVGA3D_DECLTYPE_SHORT2 = 6,
836 SVGA3D_DECLTYPE_SHORT4 = 7,
837 SVGA3D_DECLTYPE_UBYTE4N = 8,
838 SVGA3D_DECLTYPE_SHORT2N = 9,
839 SVGA3D_DECLTYPE_SHORT4N = 10,
840 SVGA3D_DECLTYPE_USHORT2N = 11,
841 SVGA3D_DECLTYPE_USHORT4N = 12,
842 SVGA3D_DECLTYPE_UDEC3 = 13,
843 SVGA3D_DECLTYPE_DEC3N = 14,
844 SVGA3D_DECLTYPE_FLOAT16_2 = 15,
845 SVGA3D_DECLTYPE_FLOAT16_4 = 16,
846 SVGA3D_DECLTYPE_MAX,
847} SVGA3dDeclType;
848
849/*
850 * This structure is used for the divisor for geometry instancing;
851 * it's a direct translation of the Direct3D equivalent.
852 */
853typedef union {
854 struct {
855 /*
856 * For index data, this number represents the number of instances to draw.
857 * For instance data, this number represents the number of
858 * instances/vertex in this stream
859 */
860 uint32 count : 30;
861
862 /*
863 * This is 1 if this is supposed to be the data that is repeated for
864 * every instance.
865 */
866 uint32 indexedData : 1;
867
868 /*
869 * This is 1 if this is supposed to be the per-instance data.
870 */
871 uint32 instanceData : 1;
872 };
873
874 uint32 value;
875} SVGA3dVertexDivisor;
876
877typedef enum {
878 SVGA3D_PRIMITIVE_INVALID = 0,
879 SVGA3D_PRIMITIVE_TRIANGLELIST = 1,
880 SVGA3D_PRIMITIVE_POINTLIST = 2,
881 SVGA3D_PRIMITIVE_LINELIST = 3,
882 SVGA3D_PRIMITIVE_LINESTRIP = 4,
883 SVGA3D_PRIMITIVE_TRIANGLESTRIP = 5,
884 SVGA3D_PRIMITIVE_TRIANGLEFAN = 6,
885 SVGA3D_PRIMITIVE_MAX
886} SVGA3dPrimitiveType;
887
888typedef enum {
889 SVGA3D_COORDINATE_INVALID = 0,
890 SVGA3D_COORDINATE_LEFTHANDED = 1,
891 SVGA3D_COORDINATE_RIGHTHANDED = 2,
892 SVGA3D_COORDINATE_MAX
893} SVGA3dCoordinateType;
894
895typedef enum {
896 SVGA3D_TRANSFORM_INVALID = 0,
897 SVGA3D_TRANSFORM_WORLD = 1,
898 SVGA3D_TRANSFORM_VIEW = 2,
899 SVGA3D_TRANSFORM_PROJECTION = 3,
900 SVGA3D_TRANSFORM_TEXTURE0 = 4,
901 SVGA3D_TRANSFORM_TEXTURE1 = 5,
902 SVGA3D_TRANSFORM_TEXTURE2 = 6,
903 SVGA3D_TRANSFORM_TEXTURE3 = 7,
904 SVGA3D_TRANSFORM_TEXTURE4 = 8,
905 SVGA3D_TRANSFORM_TEXTURE5 = 9,
906 SVGA3D_TRANSFORM_TEXTURE6 = 10,
907 SVGA3D_TRANSFORM_TEXTURE7 = 11,
908 SVGA3D_TRANSFORM_WORLD1 = 12,
909 SVGA3D_TRANSFORM_WORLD2 = 13,
910 SVGA3D_TRANSFORM_WORLD3 = 14,
911 SVGA3D_TRANSFORM_MAX
912} SVGA3dTransformType;
913
914typedef enum {
915 SVGA3D_LIGHTTYPE_INVALID = 0,
916 SVGA3D_LIGHTTYPE_POINT = 1,
917 SVGA3D_LIGHTTYPE_SPOT1 = 2, /* 1-cone, in degrees */
918 SVGA3D_LIGHTTYPE_SPOT2 = 3, /* 2-cone, in radians */
919 SVGA3D_LIGHTTYPE_DIRECTIONAL = 4,
920 SVGA3D_LIGHTTYPE_MAX
921} SVGA3dLightType;
922
923typedef enum {
924 SVGA3D_CUBEFACE_POSX = 0,
925 SVGA3D_CUBEFACE_NEGX = 1,
926 SVGA3D_CUBEFACE_POSY = 2,
927 SVGA3D_CUBEFACE_NEGY = 3,
928 SVGA3D_CUBEFACE_POSZ = 4,
929 SVGA3D_CUBEFACE_NEGZ = 5,
930} SVGA3dCubeFace;
931
932typedef enum {
933 SVGA3D_SHADERTYPE_COMPILED_DX8 = 0,
934 SVGA3D_SHADERTYPE_VS = 1,
935 SVGA3D_SHADERTYPE_PS = 2,
936 SVGA3D_SHADERTYPE_MAX
937} SVGA3dShaderType;
938
939typedef enum {
940 SVGA3D_CONST_TYPE_FLOAT = 0,
941 SVGA3D_CONST_TYPE_INT = 1,
942 SVGA3D_CONST_TYPE_BOOL = 2,
943} SVGA3dShaderConstType;
944
945#define SVGA3D_MAX_SURFACE_FACES 6
946
947typedef enum {
948 SVGA3D_STRETCH_BLT_POINT = 0,
949 SVGA3D_STRETCH_BLT_LINEAR = 1,
950 SVGA3D_STRETCH_BLT_MAX
951} SVGA3dStretchBltMode;
952
953typedef enum {
954 SVGA3D_QUERYTYPE_OCCLUSION = 0,
955 SVGA3D_QUERYTYPE_MAX
956} SVGA3dQueryType;
957
958typedef enum {
959 SVGA3D_QUERYSTATE_PENDING = 0, /* Waiting on the host (set by guest) */
960 SVGA3D_QUERYSTATE_SUCCEEDED = 1, /* Completed successfully (set by host) */
961 SVGA3D_QUERYSTATE_FAILED = 2, /* Completed unsuccessfully (set by host) */
962 SVGA3D_QUERYSTATE_NEW = 3, /* Never submitted (For guest use only) */
963} SVGA3dQueryState;
964
965typedef enum {
966 SVGA3D_WRITE_HOST_VRAM = 1,
967 SVGA3D_READ_HOST_VRAM = 2,
968} SVGA3dTransferType;
969
970/*
971 * The maximum number vertex arrays we're guaranteed to support in
972 * SVGA_3D_CMD_DRAWPRIMITIVES.
973 */
974#define SVGA3D_MAX_VERTEX_ARRAYS 32
975
976/*
977 * Identifiers for commands in the command FIFO.
978 *
979 * IDs between 1000 and 1039 (inclusive) were used by obsolete versions of
980 * the SVGA3D protocol and remain reserved; they should not be used in the
981 * future.
982 *
983 * IDs between 1040 and 1999 (inclusive) are available for use by the
984 * current SVGA3D protocol.
985 *
986 * FIFO clients other than SVGA3D should stay below 1000, or at 2000
987 * and up.
988 */
989
990#define SVGA_3D_CMD_LEGACY_BASE 1000
991#define SVGA_3D_CMD_BASE 1040
992
993#define SVGA_3D_CMD_SURFACE_DEFINE SVGA_3D_CMD_BASE + 0
994#define SVGA_3D_CMD_SURFACE_DESTROY SVGA_3D_CMD_BASE + 1
995#define SVGA_3D_CMD_SURFACE_COPY SVGA_3D_CMD_BASE + 2
996#define SVGA_3D_CMD_SURFACE_STRETCHBLT SVGA_3D_CMD_BASE + 3
997#define SVGA_3D_CMD_SURFACE_DMA SVGA_3D_CMD_BASE + 4
998#define SVGA_3D_CMD_CONTEXT_DEFINE SVGA_3D_CMD_BASE + 5
999#define SVGA_3D_CMD_CONTEXT_DESTROY SVGA_3D_CMD_BASE + 6
1000#define SVGA_3D_CMD_SETTRANSFORM SVGA_3D_CMD_BASE + 7
1001#define SVGA_3D_CMD_SETZRANGE SVGA_3D_CMD_BASE + 8
1002#define SVGA_3D_CMD_SETRENDERSTATE SVGA_3D_CMD_BASE + 9
1003#define SVGA_3D_CMD_SETRENDERTARGET SVGA_3D_CMD_BASE + 10
1004#define SVGA_3D_CMD_SETTEXTURESTATE SVGA_3D_CMD_BASE + 11
1005#define SVGA_3D_CMD_SETMATERIAL SVGA_3D_CMD_BASE + 12
1006#define SVGA_3D_CMD_SETLIGHTDATA SVGA_3D_CMD_BASE + 13
1007#define SVGA_3D_CMD_SETLIGHTENABLED SVGA_3D_CMD_BASE + 14
1008#define SVGA_3D_CMD_SETVIEWPORT SVGA_3D_CMD_BASE + 15
1009#define SVGA_3D_CMD_SETCLIPPLANE SVGA_3D_CMD_BASE + 16
1010#define SVGA_3D_CMD_CLEAR SVGA_3D_CMD_BASE + 17
1011#define SVGA_3D_CMD_PRESENT SVGA_3D_CMD_BASE + 18 // Deprecated
1012#define SVGA_3D_CMD_SHADER_DEFINE SVGA_3D_CMD_BASE + 19
1013#define SVGA_3D_CMD_SHADER_DESTROY SVGA_3D_CMD_BASE + 20
1014#define SVGA_3D_CMD_SET_SHADER SVGA_3D_CMD_BASE + 21
1015#define SVGA_3D_CMD_SET_SHADER_CONST SVGA_3D_CMD_BASE + 22
1016#define SVGA_3D_CMD_DRAW_PRIMITIVES SVGA_3D_CMD_BASE + 23
1017#define SVGA_3D_CMD_SETSCISSORRECT SVGA_3D_CMD_BASE + 24
1018#define SVGA_3D_CMD_BEGIN_QUERY SVGA_3D_CMD_BASE + 25
1019#define SVGA_3D_CMD_END_QUERY SVGA_3D_CMD_BASE + 26
1020#define SVGA_3D_CMD_WAIT_FOR_QUERY SVGA_3D_CMD_BASE + 27
1021#define SVGA_3D_CMD_PRESENT_READBACK SVGA_3D_CMD_BASE + 28 // Deprecated
1022#define SVGA_3D_CMD_BLIT_SURFACE_TO_SCREEN SVGA_3D_CMD_BASE + 29
1023#define SVGA_3D_CMD_MAX SVGA_3D_CMD_BASE + 30
1024
1025#define SVGA_3D_CMD_FUTURE_MAX 2000
1026
1027/*
1028 * Common substructures used in multiple FIFO commands:
1029 */
1030
1031typedef struct {
1032 union {
1033 struct {
1034 uint16 function; // SVGA3dFogFunction
1035 uint8 type; // SVGA3dFogType
1036 uint8 base; // SVGA3dFogBase
1037 };
1038 uint32 uintValue;
1039 };
1040} SVGA3dFogMode;
1041
1042/*
1043 * Uniquely identify one image (a 1D/2D/3D array) from a surface. This
1044 * is a surface ID as well as face/mipmap indices.
1045 */
1046
1047typedef
1048struct SVGA3dSurfaceImageId {
1049 uint32 sid;
1050 uint32 face;
1051 uint32 mipmap;
1052} SVGA3dSurfaceImageId;
1053
1054typedef
1055struct SVGA3dGuestImage {
1056 SVGAGuestPtr ptr;
1057
1058 /*
1059 * A note on interpretation of pitch: This value of pitch is the
1060 * number of bytes between vertically adjacent image
1061 * blocks. Normally this is the number of bytes between the first
1062 * pixel of two adjacent scanlines. With compressed textures,
1063 * however, this may represent the number of bytes between
1064 * compression blocks rather than between rows of pixels.
1065 *
1066 * XXX: Compressed textures currently must be tightly packed in guest memory.
1067 *
1068 * If the image is 1-dimensional, pitch is ignored.
1069 *
1070 * If 'pitch' is zero, the SVGA3D device calculates a pitch value
1071 * assuming each row of blocks is tightly packed.
1072 */
1073 uint32 pitch;
1074} SVGA3dGuestImage;
1075
1076
1077/*
1078 * FIFO command format definitions:
1079 */
1080
1081/*
1082 * The data size header following cmdNum for every 3d command
1083 */
1084typedef
1085struct {
1086 uint32 id;
1087 uint32 size;
1088} SVGA3dCmdHeader;
1089
1090/*
1091 * A surface is a hierarchy of host VRAM surfaces: 1D, 2D, or 3D, with
1092 * optional mipmaps and cube faces.
1093 */
1094
1095typedef
1096struct {
1097 uint32 width;
1098 uint32 height;
1099 uint32 depth;
1100} SVGA3dSize;
1101
1102typedef enum {
1103 SVGA3D_SURFACE_CUBEMAP = (1 << 0),
1104 SVGA3D_SURFACE_HINT_STATIC = (1 << 1),
1105 SVGA3D_SURFACE_HINT_DYNAMIC = (1 << 2),
1106 SVGA3D_SURFACE_HINT_INDEXBUFFER = (1 << 3),
1107 SVGA3D_SURFACE_HINT_VERTEXBUFFER = (1 << 4),
1108 SVGA3D_SURFACE_HINT_TEXTURE = (1 << 5),
1109 SVGA3D_SURFACE_HINT_RENDERTARGET = (1 << 6),
1110 SVGA3D_SURFACE_HINT_DEPTHSTENCIL = (1 << 7),
1111 SVGA3D_SURFACE_HINT_WRITEONLY = (1 << 8),
1112} SVGA3dSurfaceFlags;
1113
1114typedef
1115struct {
1116 uint32 numMipLevels;
1117} SVGA3dSurfaceFace;
1118
1119typedef
1120struct {
1121 uint32 sid;
1122 SVGA3dSurfaceFlags surfaceFlags;
1123 SVGA3dSurfaceFormat format;
1124 SVGA3dSurfaceFace face[SVGA3D_MAX_SURFACE_FACES];
1125 /*
1126 * Followed by an SVGA3dSize structure for each mip level in each face.
1127 *
1128 * A note on surface sizes: Sizes are always specified in pixels,
1129 * even if the true surface size is not a multiple of the minimum
1130 * block size of the surface's format. For example, a 3x3x1 DXT1
1131 * compressed texture would actually be stored as a 4x4x1 image in
1132 * memory.
1133 */
1134} SVGA3dCmdDefineSurface; /* SVGA_3D_CMD_SURFACE_DEFINE */
1135
1136typedef
1137struct {
1138 uint32 sid;
1139} SVGA3dCmdDestroySurface; /* SVGA_3D_CMD_SURFACE_DESTROY */
1140
1141typedef
1142struct {
1143 uint32 cid;
1144} SVGA3dCmdDefineContext; /* SVGA_3D_CMD_CONTEXT_DEFINE */
1145
1146typedef
1147struct {
1148 uint32 cid;
1149} SVGA3dCmdDestroyContext; /* SVGA_3D_CMD_CONTEXT_DESTROY */
1150
1151typedef
1152struct {
1153 uint32 cid;
1154 SVGA3dClearFlag clearFlag;
1155 uint32 color;
1156 float depth;
1157 uint32 stencil;
1158 /* Followed by variable number of SVGA3dRect structures */
1159} SVGA3dCmdClear; /* SVGA_3D_CMD_CLEAR */
1160
1161typedef
1162struct SVGA3dCopyRect {
1163 uint32 x;
1164 uint32 y;
1165 uint32 w;
1166 uint32 h;
1167 uint32 srcx;
1168 uint32 srcy;
1169} SVGA3dCopyRect;
1170
1171typedef
1172struct SVGA3dCopyBox {
1173 uint32 x;
1174 uint32 y;
1175 uint32 z;
1176 uint32 w;
1177 uint32 h;
1178 uint32 d;
1179 uint32 srcx;
1180 uint32 srcy;
1181 uint32 srcz;
1182} SVGA3dCopyBox;
1183
1184typedef
1185struct {
1186 uint32 x;
1187 uint32 y;
1188 uint32 w;
1189 uint32 h;
1190} SVGA3dRect;
1191
1192typedef
1193struct {
1194 uint32 x;
1195 uint32 y;
1196 uint32 z;
1197 uint32 w;
1198 uint32 h;
1199 uint32 d;
1200} SVGA3dBox;
1201
1202typedef
1203struct {
1204 uint32 x;
1205 uint32 y;
1206 uint32 z;
1207} SVGA3dPoint;
1208
1209typedef
1210struct {
1211 SVGA3dLightType type;
1212 SVGA3dBool inWorldSpace;
1213 float diffuse[4];
1214 float specular[4];
1215 float ambient[4];
1216 float position[4];
1217 float direction[4];
1218 float range;
1219 float falloff;
1220 float attenuation0;
1221 float attenuation1;
1222 float attenuation2;
1223 float theta;
1224 float phi;
1225} SVGA3dLightData;
1226
1227typedef
1228struct {
1229 uint32 sid;
1230 /* Followed by variable number of SVGA3dCopyRect structures */
1231} SVGA3dCmdPresent; /* SVGA_3D_CMD_PRESENT */
1232
1233typedef
1234struct {
1235 SVGA3dRenderStateName state;
1236 union {
1237 uint32 uintValue;
1238 float floatValue;
1239 };
1240} SVGA3dRenderState;
1241
1242typedef
1243struct {
1244 uint32 cid;
1245 /* Followed by variable number of SVGA3dRenderState structures */
1246} SVGA3dCmdSetRenderState; /* SVGA_3D_CMD_SETRENDERSTATE */
1247
1248typedef
1249struct {
1250 uint32 cid;
1251 SVGA3dRenderTargetType type;
1252 SVGA3dSurfaceImageId target;
1253} SVGA3dCmdSetRenderTarget; /* SVGA_3D_CMD_SETRENDERTARGET */
1254
1255typedef
1256struct {
1257 SVGA3dSurfaceImageId src;
1258 SVGA3dSurfaceImageId dest;
1259 /* Followed by variable number of SVGA3dCopyBox structures */
1260} SVGA3dCmdSurfaceCopy; /* SVGA_3D_CMD_SURFACE_COPY */
1261
1262typedef
1263struct {
1264 SVGA3dSurfaceImageId src;
1265 SVGA3dSurfaceImageId dest;
1266 SVGA3dBox boxSrc;
1267 SVGA3dBox boxDest;
1268 SVGA3dStretchBltMode mode;
1269} SVGA3dCmdSurfaceStretchBlt; /* SVGA_3D_CMD_SURFACE_STRETCHBLT */
1270
1271typedef
1272struct {
1273 /*
1274 * If the discard flag is present in a surface DMA operation, the host may
1275 * discard the contents of the current mipmap level and face of the target
1276 * surface before applying the surface DMA contents.
1277 */
1278 uint32 discard : 1;
1279
1280 /*
1281 * If the unsynchronized flag is present, the host may perform this upload
1282 * without syncing to pending reads on this surface.
1283 */
1284 uint32 unsynchronized : 1;
1285
1286 /*
1287 * Guests *MUST* set the reserved bits to 0 before submitting the command
1288 * suffix as future flags may occupy these bits.
1289 */
1290 uint32 reserved : 30;
1291} SVGA3dSurfaceDMAFlags;
1292
1293typedef
1294struct {
1295 SVGA3dGuestImage guest;
1296 SVGA3dSurfaceImageId host;
1297 SVGA3dTransferType transfer;
1298 /*
1299 * Followed by variable number of SVGA3dCopyBox structures. For consistency
1300 * in all clipping logic and coordinate translation, we define the
1301 * "source" in each copyBox as the guest image and the
1302 * "destination" as the host image, regardless of transfer
1303 * direction.
1304 *
1305 * For efficiency, the SVGA3D device is free to copy more data than
1306 * specified. For example, it may round copy boxes outwards such
1307 * that they lie on particular alignment boundaries.
1308 */
1309} SVGA3dCmdSurfaceDMA; /* SVGA_3D_CMD_SURFACE_DMA */
1310
1311/*
1312 * SVGA3dCmdSurfaceDMASuffix --
1313 *
1314 * This is a command suffix that will appear after a SurfaceDMA command in
1315 * the FIFO. It contains some extra information that hosts may use to
1316 * optimize performance or protect the guest. This suffix exists to preserve
1317 * backwards compatibility while also allowing for new functionality to be
1318 * implemented.
1319 */
1320
1321typedef
1322struct {
1323 uint32 suffixSize;
1324
1325 /*
1326 * The maximum offset is used to determine the maximum offset from the
1327 * guestPtr base address that will be accessed or written to during this
1328 * surfaceDMA. If the suffix is supported, the host will respect this
1329 * boundary while performing surface DMAs.
1330 *
1331 * Defaults to MAX_UINT32
1332 */
1333 uint32 maximumOffset;
1334
1335 /*
1336 * A set of flags that describes optimizations that the host may perform
1337 * while performing this surface DMA operation. The guest should never rely
1338 * on behaviour that is different when these flags are set for correctness.
1339 *
1340 * Defaults to 0
1341 */
1342 SVGA3dSurfaceDMAFlags flags;
1343} SVGA3dCmdSurfaceDMASuffix;
1344
1345/*
1346 * SVGA_3D_CMD_DRAW_PRIMITIVES --
1347 *
1348 * This command is the SVGA3D device's generic drawing entry point.
1349 * It can draw multiple ranges of primitives, optionally using an
1350 * index buffer, using an arbitrary collection of vertex buffers.
1351 *
1352 * Each SVGA3dVertexDecl defines a distinct vertex array to bind
1353 * during this draw call. The declarations specify which surface
1354 * the vertex data lives in, what that vertex data is used for,
1355 * and how to interpret it.
1356 *
1357 * Each SVGA3dPrimitiveRange defines a collection of primitives
1358 * to render using the same vertex arrays. An index buffer is
1359 * optional.
1360 */
1361
1362typedef
1363struct {
1364 /*
1365 * A range hint is an optional specification for the range of indices
1366 * in an SVGA3dArray that will be used. If 'last' is zero, it is assumed
1367 * that the entire array will be used.
1368 *
1369 * These are only hints. The SVGA3D device may use them for
1370 * performance optimization if possible, but it's also allowed to
1371 * ignore these values.
1372 */
1373 uint32 first;
1374 uint32 last;
1375} SVGA3dArrayRangeHint;
1376
1377typedef
1378struct {
1379 /*
1380 * Define the origin and shape of a vertex or index array. Both
1381 * 'offset' and 'stride' are in bytes. The provided surface will be
1382 * reinterpreted as a flat array of bytes in the same format used
1383 * by surface DMA operations. To avoid unnecessary conversions, the
1384 * surface should be created with the SVGA3D_BUFFER format.
1385 *
1386 * Index 0 in the array starts 'offset' bytes into the surface.
1387 * Index 1 begins at byte 'offset + stride', etc. Array indices may
1388 * not be negative.
1389 */
1390 uint32 surfaceId;
1391 uint32 offset;
1392 uint32 stride;
1393} SVGA3dArray;
1394
1395typedef
1396struct {
1397 /*
1398 * Describe a vertex array's data type, and define how it is to be
1399 * used by the fixed function pipeline or the vertex shader. It
1400 * isn't useful to have two VertexDecls with the same
1401 * VertexArrayIdentity in one draw call.
1402 */
1403 SVGA3dDeclType type;
1404 SVGA3dDeclMethod method;
1405 SVGA3dDeclUsage usage;
1406 uint32 usageIndex;
1407} SVGA3dVertexArrayIdentity;
1408
1409typedef
1410struct {
1411 SVGA3dVertexArrayIdentity identity;
1412 SVGA3dArray array;
1413 SVGA3dArrayRangeHint rangeHint;
1414} SVGA3dVertexDecl;
1415
1416typedef
1417struct {
1418 /*
1419 * Define a group of primitives to render, from sequential indices.
1420 *
1421 * The value of 'primitiveType' and 'primitiveCount' imply the
1422 * total number of vertices that will be rendered.
1423 */
1424 SVGA3dPrimitiveType primType;
1425 uint32 primitiveCount;
1426
1427 /*
1428 * Optional index buffer. If indexArray.surfaceId is
1429 * SVGA3D_INVALID_ID, we render without an index buffer. Rendering
1430 * without an index buffer is identical to rendering with an index
1431 * buffer containing the sequence [0, 1, 2, 3, ...].
1432 *
1433 * If an index buffer is in use, indexWidth specifies the width in
1434 * bytes of each index value. It must be less than or equal to
1435 * indexArray.stride.
1436 *
1437 * (Currently, the SVGA3D device requires index buffers to be tightly
1438 * packed. In other words, indexWidth == indexArray.stride)
1439 */
1440 SVGA3dArray indexArray;
1441 uint32 indexWidth;
1442
1443 /*
1444 * Optional index bias. This number is added to all indices from
1445 * indexArray before they are used as vertex array indices. This
1446 * can be used in multiple ways:
1447 *
1448 * - When not using an indexArray, this bias can be used to
1449 * specify where in the vertex arrays to begin rendering.
1450 *
1451 * - A positive number here is equivalent to increasing the
1452 * offset in each vertex array.
1453 *
1454 * - A negative number can be used to render using a small
1455 * vertex array and an index buffer that contains large
1456 * values. This may be used by some applications that
1457 * crop a vertex buffer without modifying their index
1458 * buffer.
1459 *
1460 * Note that rendering with a negative bias value may be slower and
1461 * use more memory than rendering with a positive or zero bias.
1462 */
1463 int32 indexBias;
1464} SVGA3dPrimitiveRange;
1465
1466typedef
1467struct {
1468 uint32 cid;
1469 uint32 numVertexDecls;
1470 uint32 numRanges;
1471
1472 /*
1473 * There are two variable size arrays after the
1474 * SVGA3dCmdDrawPrimitives structure. In order,
1475 * they are:
1476 *
1477 * 1. SVGA3dVertexDecl, quantity 'numVertexDecls'
1478 * 2. SVGA3dPrimitiveRange, quantity 'numRanges'
1479 * 3. Optionally, SVGA3dVertexDivisor, quantity 'numVertexDecls' (contains
1480 * the frequency divisor for this the corresponding vertex decl)
1481 */
1482} SVGA3dCmdDrawPrimitives; /* SVGA_3D_CMD_DRAWPRIMITIVES */
1483
1484typedef
1485struct {
1486 uint32 stage;
1487 SVGA3dTextureStateName name;
1488 union {
1489 uint32 value;
1490 float floatValue;
1491 };
1492} SVGA3dTextureState;
1493
1494typedef
1495struct {
1496 uint32 cid;
1497 /* Followed by variable number of SVGA3dTextureState structures */
1498} SVGA3dCmdSetTextureState; /* SVGA_3D_CMD_SETTEXTURESTATE */
1499
1500typedef
1501struct {
1502 uint32 cid;
1503 SVGA3dTransformType type;
1504 float matrix[16];
1505} SVGA3dCmdSetTransform; /* SVGA_3D_CMD_SETTRANSFORM */
1506
1507typedef
1508struct {
1509 float min;
1510 float max;
1511} SVGA3dZRange;
1512
1513typedef
1514struct {
1515 uint32 cid;
1516 SVGA3dZRange zRange;
1517} SVGA3dCmdSetZRange; /* SVGA_3D_CMD_SETZRANGE */
1518
1519typedef
1520struct {
1521 float diffuse[4];
1522 float ambient[4];
1523 float specular[4];
1524 float emissive[4];
1525 float shininess;
1526} SVGA3dMaterial;
1527
1528typedef
1529struct {
1530 uint32 cid;
1531 SVGA3dFace face;
1532 SVGA3dMaterial material;
1533} SVGA3dCmdSetMaterial; /* SVGA_3D_CMD_SETMATERIAL */
1534
1535typedef
1536struct {
1537 uint32 cid;
1538 uint32 index;
1539 SVGA3dLightData data;
1540} SVGA3dCmdSetLightData; /* SVGA_3D_CMD_SETLIGHTDATA */
1541
1542typedef
1543struct {
1544 uint32 cid;
1545 uint32 index;
1546 uint32 enabled;
1547} SVGA3dCmdSetLightEnabled; /* SVGA_3D_CMD_SETLIGHTENABLED */
1548
1549typedef
1550struct {
1551 uint32 cid;
1552 SVGA3dRect rect;
1553} SVGA3dCmdSetViewport; /* SVGA_3D_CMD_SETVIEWPORT */
1554
1555typedef
1556struct {
1557 uint32 cid;
1558 SVGA3dRect rect;
1559} SVGA3dCmdSetScissorRect; /* SVGA_3D_CMD_SETSCISSORRECT */
1560
1561typedef
1562struct {
1563 uint32 cid;
1564 uint32 index;
1565 float plane[4];
1566} SVGA3dCmdSetClipPlane; /* SVGA_3D_CMD_SETCLIPPLANE */
1567
1568typedef
1569struct {
1570 uint32 cid;
1571 uint32 shid;
1572 SVGA3dShaderType type;
1573 /* Followed by variable number of DWORDs for shader bycode */
1574} SVGA3dCmdDefineShader; /* SVGA_3D_CMD_SHADER_DEFINE */
1575
1576typedef
1577struct {
1578 uint32 cid;
1579 uint32 shid;
1580 SVGA3dShaderType type;
1581} SVGA3dCmdDestroyShader; /* SVGA_3D_CMD_SHADER_DESTROY */
1582
1583typedef
1584struct {
1585 uint32 cid;
1586 uint32 reg; /* register number */
1587 SVGA3dShaderType type;
1588 SVGA3dShaderConstType ctype;
1589 uint32 values[4];
1590} SVGA3dCmdSetShaderConst; /* SVGA_3D_CMD_SET_SHADER_CONST */
1591
1592typedef
1593struct {
1594 uint32 cid;
1595 SVGA3dShaderType type;
1596 uint32 shid;
1597} SVGA3dCmdSetShader; /* SVGA_3D_CMD_SET_SHADER */
1598
1599typedef
1600struct {
1601 uint32 cid;
1602 SVGA3dQueryType type;
1603} SVGA3dCmdBeginQuery; /* SVGA_3D_CMD_BEGIN_QUERY */
1604
1605typedef
1606struct {
1607 uint32 cid;
1608 SVGA3dQueryType type;
1609 SVGAGuestPtr guestResult; /* Points to an SVGA3dQueryResult structure */
1610} SVGA3dCmdEndQuery; /* SVGA_3D_CMD_END_QUERY */
1611
1612typedef
1613struct {
1614 uint32 cid; /* Same parameters passed to END_QUERY */
1615 SVGA3dQueryType type;
1616 SVGAGuestPtr guestResult;
1617} SVGA3dCmdWaitForQuery; /* SVGA_3D_CMD_WAIT_FOR_QUERY */
1618
1619typedef
1620struct {
1621 uint32 totalSize; /* Set by guest before query is ended. */
1622 SVGA3dQueryState state; /* Set by host or guest. See SVGA3dQueryState. */
1623 union { /* Set by host on exit from PENDING state */
1624 uint32 result32;
1625 };
1626} SVGA3dQueryResult;
1627
1628/*
1629 * SVGA_3D_CMD_BLIT_SURFACE_TO_SCREEN --
1630 *
1631 * This is a blit from an SVGA3D surface to a Screen Object. Just
1632 * like GMR-to-screen blits, this blit may be directed at a
1633 * specific screen or to the virtual coordinate space.
1634 *
1635 * The blit copies from a rectangular region of an SVGA3D surface
1636 * image to a rectangular region of a screen or screens.
1637 *
1638 * This command takes an optional variable-length list of clipping
1639 * rectangles after the body of the command. If no rectangles are
1640 * specified, there is no clipping region. The entire destRect is
1641 * drawn to. If one or more rectangles are included, they describe
1642 * a clipping region. The clip rectangle coordinates are measured
1643 * relative to the top-left corner of destRect.
1644 *
1645 * This clipping region serves multiple purposes:
1646 *
1647 * - It can be used to perform an irregularly shaped blit more
1648 * efficiently than by issuing many separate blit commands.
1649 *
1650 * - It is equivalent to allowing blits with non-integer
1651 * source coordinates. You could blit just one half-pixel
1652 * of a source, for example, by specifying a larger
1653 * destination rectangle than you need, then removing
1654 * part of it using a clip rectangle.
1655 *
1656 * Availability:
1657 * SVGA_FIFO_CAP_SCREEN_OBJECT
1658 *
1659 * Limitations:
1660 *
1661 * - Currently, no backend supports blits from a mipmap or face
1662 * other than the first one.
1663 */
1664
1665typedef
1666struct {
1667 SVGA3dSurfaceImageId srcImage;
1668 SVGASignedRect srcRect;
1669 uint32 destScreenId; /* Screen ID or SVGA_ID_INVALID for virt. coords */
1670 SVGASignedRect destRect; /* Supports scaling if src/rest different size */
1671 /* Clipping: zero or more SVGASignedRects follow */
1672} SVGA3dCmdBlitSurfaceToScreen; /* SVGA_3D_CMD_BLIT_SURFACE_TO_SCREEN */
1673
1674
1675/*
1676 * Capability query index.
1677 *
1678 * Notes:
1679 *
1680 * 1. SVGA3D_DEVCAP_MAX_TEXTURES reflects the maximum number of
1681 * fixed-function texture units available. Each of these units
1682 * work in both FFP and Shader modes, and they support texture
1683 * transforms and texture coordinates. The host may have additional
1684 * texture image units that are only usable with shaders.
1685 *
1686 * 2. The BUFFER_FORMAT capabilities are deprecated, and they always
1687 * return TRUE. Even on physical hardware that does not support
1688 * these formats natively, the SVGA3D device will provide an emulation
1689 * which should be invisible to the guest OS.
1690 *
1691 * In general, the SVGA3D device should support any operation on
1692 * any surface format, it just may perform some of these
1693 * operations in software depending on the capabilities of the
1694 * available physical hardware.
1695 *
1696 * XXX: In the future, we will add capabilities that describe in
1697 * detail what formats are supported in hardware for what kinds
1698 * of operations.
1699 */
1700
1701typedef enum {
1702 SVGA3D_DEVCAP_3D = 0,
1703 SVGA3D_DEVCAP_MAX_LIGHTS = 1,
1704 SVGA3D_DEVCAP_MAX_TEXTURES = 2, /* See note (1) */
1705 SVGA3D_DEVCAP_MAX_CLIP_PLANES = 3,
1706 SVGA3D_DEVCAP_VERTEX_SHADER_VERSION = 4,
1707 SVGA3D_DEVCAP_VERTEX_SHADER = 5,
1708 SVGA3D_DEVCAP_FRAGMENT_SHADER_VERSION = 6,
1709 SVGA3D_DEVCAP_FRAGMENT_SHADER = 7,
1710 SVGA3D_DEVCAP_MAX_RENDER_TARGETS = 8,
1711 SVGA3D_DEVCAP_S23E8_TEXTURES = 9,
1712 SVGA3D_DEVCAP_S10E5_TEXTURES = 10,
1713 SVGA3D_DEVCAP_MAX_FIXED_VERTEXBLEND = 11,
1714 SVGA3D_DEVCAP_D16_BUFFER_FORMAT = 12, /* See note (2) */
1715 SVGA3D_DEVCAP_D24S8_BUFFER_FORMAT = 13, /* See note (2) */
1716 SVGA3D_DEVCAP_D24X8_BUFFER_FORMAT = 14, /* See note (2) */
1717 SVGA3D_DEVCAP_QUERY_TYPES = 15,
1718 SVGA3D_DEVCAP_TEXTURE_GRADIENT_SAMPLING = 16,
1719 SVGA3D_DEVCAP_MAX_POINT_SIZE = 17,
1720 SVGA3D_DEVCAP_MAX_SHADER_TEXTURES = 18,
1721 SVGA3D_DEVCAP_MAX_TEXTURE_WIDTH = 19,
1722 SVGA3D_DEVCAP_MAX_TEXTURE_HEIGHT = 20,
1723 SVGA3D_DEVCAP_MAX_VOLUME_EXTENT = 21,
1724 SVGA3D_DEVCAP_MAX_TEXTURE_REPEAT = 22,
1725 SVGA3D_DEVCAP_MAX_TEXTURE_ASPECT_RATIO = 23,
1726 SVGA3D_DEVCAP_MAX_TEXTURE_ANISOTROPY = 24,
1727 SVGA3D_DEVCAP_MAX_PRIMITIVE_COUNT = 25,
1728 SVGA3D_DEVCAP_MAX_VERTEX_INDEX = 26,
1729 SVGA3D_DEVCAP_MAX_VERTEX_SHADER_INSTRUCTIONS = 27,
1730 SVGA3D_DEVCAP_MAX_FRAGMENT_SHADER_INSTRUCTIONS = 28,
1731 SVGA3D_DEVCAP_MAX_VERTEX_SHADER_TEMPS = 29,
1732 SVGA3D_DEVCAP_MAX_FRAGMENT_SHADER_TEMPS = 30,
1733 SVGA3D_DEVCAP_TEXTURE_OPS = 31,
1734 SVGA3D_DEVCAP_SURFACEFMT_X8R8G8B8 = 32,
1735 SVGA3D_DEVCAP_SURFACEFMT_A8R8G8B8 = 33,
1736 SVGA3D_DEVCAP_SURFACEFMT_A2R10G10B10 = 34,
1737 SVGA3D_DEVCAP_SURFACEFMT_X1R5G5B5 = 35,
1738 SVGA3D_DEVCAP_SURFACEFMT_A1R5G5B5 = 36,
1739 SVGA3D_DEVCAP_SURFACEFMT_A4R4G4B4 = 37,
1740 SVGA3D_DEVCAP_SURFACEFMT_R5G6B5 = 38,
1741 SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE16 = 39,
1742 SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE8_ALPHA8 = 40,
1743 SVGA3D_DEVCAP_SURFACEFMT_ALPHA8 = 41,
1744 SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE8 = 42,
1745 SVGA3D_DEVCAP_SURFACEFMT_Z_D16 = 43,
1746 SVGA3D_DEVCAP_SURFACEFMT_Z_D24S8 = 44,
1747 SVGA3D_DEVCAP_SURFACEFMT_Z_D24X8 = 45,
1748 SVGA3D_DEVCAP_SURFACEFMT_DXT1 = 46,
1749 SVGA3D_DEVCAP_SURFACEFMT_DXT2 = 47,
1750 SVGA3D_DEVCAP_SURFACEFMT_DXT3 = 48,
1751 SVGA3D_DEVCAP_SURFACEFMT_DXT4 = 49,
1752 SVGA3D_DEVCAP_SURFACEFMT_DXT5 = 50,
1753 SVGA3D_DEVCAP_SURFACEFMT_BUMPX8L8V8U8 = 51,
1754 SVGA3D_DEVCAP_SURFACEFMT_A2W10V10U10 = 52,
1755 SVGA3D_DEVCAP_SURFACEFMT_BUMPU8V8 = 53,
1756 SVGA3D_DEVCAP_SURFACEFMT_Q8W8V8U8 = 54,
1757 SVGA3D_DEVCAP_SURFACEFMT_CxV8U8 = 55,
1758 SVGA3D_DEVCAP_SURFACEFMT_R_S10E5 = 56,
1759 SVGA3D_DEVCAP_SURFACEFMT_R_S23E8 = 57,
1760 SVGA3D_DEVCAP_SURFACEFMT_RG_S10E5 = 58,
1761 SVGA3D_DEVCAP_SURFACEFMT_RG_S23E8 = 59,
1762 SVGA3D_DEVCAP_SURFACEFMT_ARGB_S10E5 = 60,
1763 SVGA3D_DEVCAP_SURFACEFMT_ARGB_S23E8 = 61,
1764 SVGA3D_DEVCAP_MAX_VERTEX_SHADER_TEXTURES = 63,
1765
1766 /*
1767 * Note that MAX_SIMULTANEOUS_RENDER_TARGETS is a maximum count of color
1768 * render targets. This does no include the depth or stencil targets.
1769 */
1770 SVGA3D_DEVCAP_MAX_SIMULTANEOUS_RENDER_TARGETS = 64,
1771
1772 SVGA3D_DEVCAP_SURFACEFMT_V16U16 = 65,
1773 SVGA3D_DEVCAP_SURFACEFMT_G16R16 = 66,
1774 SVGA3D_DEVCAP_SURFACEFMT_A16B16G16R16 = 67,
1775 SVGA3D_DEVCAP_SURFACEFMT_UYVY = 68,
1776 SVGA3D_DEVCAP_SURFACEFMT_YUY2 = 69,
1777
1778 /*
1779 * Don't add new caps into the previous section; the values in this
1780 * enumeration must not change. You can put new values right before
1781 * SVGA3D_DEVCAP_MAX.
1782 */
1783 SVGA3D_DEVCAP_MAX /* This must be the last index. */
1784} SVGA3dDevCapIndex;
1785
1786typedef union {
1787 Bool b;
1788 uint32 u;
1789 int32 i;
1790 float f;
1791} SVGA3dDevCapResult;
1792
1793#endif /* _SVGA3D_REG_H_ */
diff --git a/drivers/gpu/drm/vmwgfx/svga_escape.h b/drivers/gpu/drm/vmwgfx/svga_escape.h
new file mode 100644
index 000000000000..7b85e9b8c854
--- /dev/null
+++ b/drivers/gpu/drm/vmwgfx/svga_escape.h
@@ -0,0 +1,89 @@
1/**********************************************************
2 * Copyright 2007-2009 VMware, Inc. All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person
5 * obtaining a copy of this software and associated documentation
6 * files (the "Software"), to deal in the Software without
7 * restriction, including without limitation the rights to use, copy,
8 * modify, merge, publish, distribute, sublicense, and/or sell copies
9 * of the Software, and to permit persons to whom the Software is
10 * furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice shall be
13 * included in all copies or substantial portions of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
16 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
17 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
18 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
19 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
20 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
21 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22 * SOFTWARE.
23 *
24 **********************************************************/
25
26/*
27 * svga_escape.h --
28 *
29 * Definitions for our own (vendor-specific) SVGA Escape commands.
30 */
31
32#ifndef _SVGA_ESCAPE_H_
33#define _SVGA_ESCAPE_H_
34
35
36/*
37 * Namespace IDs for the escape command
38 */
39
40#define SVGA_ESCAPE_NSID_VMWARE 0x00000000
41#define SVGA_ESCAPE_NSID_DEVEL 0xFFFFFFFF
42
43
44/*
45 * Within SVGA_ESCAPE_NSID_VMWARE, we multiplex commands according to
46 * the first DWORD of escape data (after the nsID and size). As a
47 * guideline we're using the high word and low word as a major and
48 * minor command number, respectively.
49 *
50 * Major command number allocation:
51 *
52 * 0000: Reserved
53 * 0001: SVGA_ESCAPE_VMWARE_LOG (svga_binary_logger.h)
54 * 0002: SVGA_ESCAPE_VMWARE_VIDEO (svga_overlay.h)
55 * 0003: SVGA_ESCAPE_VMWARE_HINT (svga_escape.h)
56 */
57
58#define SVGA_ESCAPE_VMWARE_MAJOR_MASK 0xFFFF0000
59
60
61/*
62 * SVGA Hint commands.
63 *
64 * These escapes let the SVGA driver provide optional information to
65 * he host about the state of the guest or guest applications. The
66 * host can use these hints to make user interface or performance
67 * decisions.
68 *
69 * Notes:
70 *
71 * - SVGA_ESCAPE_VMWARE_HINT_FULLSCREEN is deprecated for guests
72 * that use the SVGA Screen Object extension. Instead of sending
73 * this escape, use the SVGA_SCREEN_FULLSCREEN_HINT flag on your
74 * Screen Object.
75 */
76
77#define SVGA_ESCAPE_VMWARE_HINT 0x00030000
78#define SVGA_ESCAPE_VMWARE_HINT_FULLSCREEN 0x00030001 // Deprecated
79
80typedef
81struct {
82 uint32 command;
83 uint32 fullscreen;
84 struct {
85 int32 x, y;
86 } monitorPosition;
87} SVGAEscapeHintFullscreen;
88
89#endif /* _SVGA_ESCAPE_H_ */
diff --git a/drivers/gpu/drm/vmwgfx/svga_overlay.h b/drivers/gpu/drm/vmwgfx/svga_overlay.h
new file mode 100644
index 000000000000..f753d73c14b4
--- /dev/null
+++ b/drivers/gpu/drm/vmwgfx/svga_overlay.h
@@ -0,0 +1,201 @@
1/**********************************************************
2 * Copyright 2007-2009 VMware, Inc. All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person
5 * obtaining a copy of this software and associated documentation
6 * files (the "Software"), to deal in the Software without
7 * restriction, including without limitation the rights to use, copy,
8 * modify, merge, publish, distribute, sublicense, and/or sell copies
9 * of the Software, and to permit persons to whom the Software is
10 * furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice shall be
13 * included in all copies or substantial portions of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
16 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
17 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
18 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
19 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
20 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
21 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22 * SOFTWARE.
23 *
24 **********************************************************/
25
26/*
27 * svga_overlay.h --
28 *
29 * Definitions for video-overlay support.
30 */
31
32#ifndef _SVGA_OVERLAY_H_
33#define _SVGA_OVERLAY_H_
34
35#include "svga_reg.h"
36
37/*
38 * Video formats we support
39 */
40
41#define VMWARE_FOURCC_YV12 0x32315659 // 'Y' 'V' '1' '2'
42#define VMWARE_FOURCC_YUY2 0x32595559 // 'Y' 'U' 'Y' '2'
43#define VMWARE_FOURCC_UYVY 0x59565955 // 'U' 'Y' 'V' 'Y'
44
45typedef enum {
46 SVGA_OVERLAY_FORMAT_INVALID = 0,
47 SVGA_OVERLAY_FORMAT_YV12 = VMWARE_FOURCC_YV12,
48 SVGA_OVERLAY_FORMAT_YUY2 = VMWARE_FOURCC_YUY2,
49 SVGA_OVERLAY_FORMAT_UYVY = VMWARE_FOURCC_UYVY,
50} SVGAOverlayFormat;
51
52#define SVGA_VIDEO_COLORKEY_MASK 0x00ffffff
53
54#define SVGA_ESCAPE_VMWARE_VIDEO 0x00020000
55
56#define SVGA_ESCAPE_VMWARE_VIDEO_SET_REGS 0x00020001
57 /* FIFO escape layout:
58 * Type, Stream Id, (Register Id, Value) pairs */
59
60#define SVGA_ESCAPE_VMWARE_VIDEO_FLUSH 0x00020002
61 /* FIFO escape layout:
62 * Type, Stream Id */
63
64typedef
65struct SVGAEscapeVideoSetRegs {
66 struct {
67 uint32 cmdType;
68 uint32 streamId;
69 } header;
70
71 // May include zero or more items.
72 struct {
73 uint32 registerId;
74 uint32 value;
75 } items[1];
76} SVGAEscapeVideoSetRegs;
77
78typedef
79struct SVGAEscapeVideoFlush {
80 uint32 cmdType;
81 uint32 streamId;
82} SVGAEscapeVideoFlush;
83
84
85/*
86 * Struct definitions for the video overlay commands built on
87 * SVGAFifoCmdEscape.
88 */
89typedef
90struct {
91 uint32 command;
92 uint32 overlay;
93} SVGAFifoEscapeCmdVideoBase;
94
95typedef
96struct {
97 SVGAFifoEscapeCmdVideoBase videoCmd;
98} SVGAFifoEscapeCmdVideoFlush;
99
100typedef
101struct {
102 SVGAFifoEscapeCmdVideoBase videoCmd;
103 struct {
104 uint32 regId;
105 uint32 value;
106 } items[1];
107} SVGAFifoEscapeCmdVideoSetRegs;
108
109typedef
110struct {
111 SVGAFifoEscapeCmdVideoBase videoCmd;
112 struct {
113 uint32 regId;
114 uint32 value;
115 } items[SVGA_VIDEO_NUM_REGS];
116} SVGAFifoEscapeCmdVideoSetAllRegs;
117
118
119/*
120 *----------------------------------------------------------------------
121 *
122 * VMwareVideoGetAttributes --
123 *
124 * Computes the size, pitches and offsets for YUV frames.
125 *
126 * Results:
127 * TRUE on success; otherwise FALSE on failure.
128 *
129 * Side effects:
130 * Pitches and offsets for the given YUV frame are put in 'pitches'
131 * and 'offsets' respectively. They are both optional though.
132 *
133 *----------------------------------------------------------------------
134 */
135
136static inline bool
137VMwareVideoGetAttributes(const SVGAOverlayFormat format, // IN
138 uint32 *width, // IN / OUT
139 uint32 *height, // IN / OUT
140 uint32 *size, // OUT
141 uint32 *pitches, // OUT (optional)
142 uint32 *offsets) // OUT (optional)
143{
144 int tmp;
145
146 *width = (*width + 1) & ~1;
147
148 if (offsets) {
149 offsets[0] = 0;
150 }
151
152 switch (format) {
153 case VMWARE_FOURCC_YV12:
154 *height = (*height + 1) & ~1;
155 *size = (*width + 3) & ~3;
156
157 if (pitches) {
158 pitches[0] = *size;
159 }
160
161 *size *= *height;
162
163 if (offsets) {
164 offsets[1] = *size;
165 }
166
167 tmp = ((*width >> 1) + 3) & ~3;
168
169 if (pitches) {
170 pitches[1] = pitches[2] = tmp;
171 }
172
173 tmp *= (*height >> 1);
174 *size += tmp;
175
176 if (offsets) {
177 offsets[2] = *size;
178 }
179
180 *size += tmp;
181 break;
182
183 case VMWARE_FOURCC_YUY2:
184 case VMWARE_FOURCC_UYVY:
185 *size = *width * 2;
186
187 if (pitches) {
188 pitches[0] = *size;
189 }
190
191 *size *= *height;
192 break;
193
194 default:
195 return false;
196 }
197
198 return true;
199}
200
201#endif // _SVGA_OVERLAY_H_
diff --git a/drivers/gpu/drm/vmwgfx/svga_reg.h b/drivers/gpu/drm/vmwgfx/svga_reg.h
new file mode 100644
index 000000000000..1b96c2ec07dd
--- /dev/null
+++ b/drivers/gpu/drm/vmwgfx/svga_reg.h
@@ -0,0 +1,1346 @@
1/**********************************************************
2 * Copyright 1998-2009 VMware, Inc. All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person
5 * obtaining a copy of this software and associated documentation
6 * files (the "Software"), to deal in the Software without
7 * restriction, including without limitation the rights to use, copy,
8 * modify, merge, publish, distribute, sublicense, and/or sell copies
9 * of the Software, and to permit persons to whom the Software is
10 * furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice shall be
13 * included in all copies or substantial portions of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
16 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
17 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
18 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
19 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
20 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
21 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22 * SOFTWARE.
23 *
24 **********************************************************/
25
26/*
27 * svga_reg.h --
28 *
29 * Virtual hardware definitions for the VMware SVGA II device.
30 */
31
32#ifndef _SVGA_REG_H_
33#define _SVGA_REG_H_
34
35/*
36 * PCI device IDs.
37 */
38#define PCI_VENDOR_ID_VMWARE 0x15AD
39#define PCI_DEVICE_ID_VMWARE_SVGA2 0x0405
40
41/*
42 * Legal values for the SVGA_REG_CURSOR_ON register in old-fashioned
43 * cursor bypass mode. This is still supported, but no new guest
44 * drivers should use it.
45 */
46#define SVGA_CURSOR_ON_HIDE 0x0 /* Must be 0 to maintain backward compatibility */
47#define SVGA_CURSOR_ON_SHOW 0x1 /* Must be 1 to maintain backward compatibility */
48#define SVGA_CURSOR_ON_REMOVE_FROM_FB 0x2 /* Remove the cursor from the framebuffer because we need to see what's under it */
49#define SVGA_CURSOR_ON_RESTORE_TO_FB 0x3 /* Put the cursor back in the framebuffer so the user can see it */
50
51/*
52 * The maximum framebuffer size that can traced for e.g. guests in VESA mode.
53 * The changeMap in the monitor is proportional to this number. Therefore, we'd
54 * like to keep it as small as possible to reduce monitor overhead (using
55 * SVGA_VRAM_MAX_SIZE for this increases the size of the shared area by over
56 * 4k!).
57 *
58 * NB: For compatibility reasons, this value must be greater than 0xff0000.
59 * See bug 335072.
60 */
61#define SVGA_FB_MAX_TRACEABLE_SIZE 0x1000000
62
63#define SVGA_MAX_PSEUDOCOLOR_DEPTH 8
64#define SVGA_MAX_PSEUDOCOLORS (1 << SVGA_MAX_PSEUDOCOLOR_DEPTH)
65#define SVGA_NUM_PALETTE_REGS (3 * SVGA_MAX_PSEUDOCOLORS)
66
67#define SVGA_MAGIC 0x900000UL
68#define SVGA_MAKE_ID(ver) (SVGA_MAGIC << 8 | (ver))
69
70/* Version 2 let the address of the frame buffer be unsigned on Win32 */
71#define SVGA_VERSION_2 2
72#define SVGA_ID_2 SVGA_MAKE_ID(SVGA_VERSION_2)
73
74/* Version 1 has new registers starting with SVGA_REG_CAPABILITIES so
75 PALETTE_BASE has moved */
76#define SVGA_VERSION_1 1
77#define SVGA_ID_1 SVGA_MAKE_ID(SVGA_VERSION_1)
78
79/* Version 0 is the initial version */
80#define SVGA_VERSION_0 0
81#define SVGA_ID_0 SVGA_MAKE_ID(SVGA_VERSION_0)
82
83/* "Invalid" value for all SVGA IDs. (Version ID, screen object ID, surface ID...) */
84#define SVGA_ID_INVALID 0xFFFFFFFF
85
86/* Port offsets, relative to BAR0 */
87#define SVGA_INDEX_PORT 0x0
88#define SVGA_VALUE_PORT 0x1
89#define SVGA_BIOS_PORT 0x2
90#define SVGA_IRQSTATUS_PORT 0x8
91
92/*
93 * Interrupt source flags for IRQSTATUS_PORT and IRQMASK.
94 *
95 * Interrupts are only supported when the
96 * SVGA_CAP_IRQMASK capability is present.
97 */
98#define SVGA_IRQFLAG_ANY_FENCE 0x1 /* Any fence was passed */
99#define SVGA_IRQFLAG_FIFO_PROGRESS 0x2 /* Made forward progress in the FIFO */
100#define SVGA_IRQFLAG_FENCE_GOAL 0x4 /* SVGA_FIFO_FENCE_GOAL reached */
101
102/*
103 * Registers
104 */
105
106enum {
107 SVGA_REG_ID = 0,
108 SVGA_REG_ENABLE = 1,
109 SVGA_REG_WIDTH = 2,
110 SVGA_REG_HEIGHT = 3,
111 SVGA_REG_MAX_WIDTH = 4,
112 SVGA_REG_MAX_HEIGHT = 5,
113 SVGA_REG_DEPTH = 6,
114 SVGA_REG_BITS_PER_PIXEL = 7, /* Current bpp in the guest */
115 SVGA_REG_PSEUDOCOLOR = 8,
116 SVGA_REG_RED_MASK = 9,
117 SVGA_REG_GREEN_MASK = 10,
118 SVGA_REG_BLUE_MASK = 11,
119 SVGA_REG_BYTES_PER_LINE = 12,
120 SVGA_REG_FB_START = 13, /* (Deprecated) */
121 SVGA_REG_FB_OFFSET = 14,
122 SVGA_REG_VRAM_SIZE = 15,
123 SVGA_REG_FB_SIZE = 16,
124
125 /* ID 0 implementation only had the above registers, then the palette */
126
127 SVGA_REG_CAPABILITIES = 17,
128 SVGA_REG_MEM_START = 18, /* (Deprecated) */
129 SVGA_REG_MEM_SIZE = 19,
130 SVGA_REG_CONFIG_DONE = 20, /* Set when memory area configured */
131 SVGA_REG_SYNC = 21, /* See "FIFO Synchronization Registers" */
132 SVGA_REG_BUSY = 22, /* See "FIFO Synchronization Registers" */
133 SVGA_REG_GUEST_ID = 23, /* Set guest OS identifier */
134 SVGA_REG_CURSOR_ID = 24, /* (Deprecated) */
135 SVGA_REG_CURSOR_X = 25, /* (Deprecated) */
136 SVGA_REG_CURSOR_Y = 26, /* (Deprecated) */
137 SVGA_REG_CURSOR_ON = 27, /* (Deprecated) */
138 SVGA_REG_HOST_BITS_PER_PIXEL = 28, /* (Deprecated) */
139 SVGA_REG_SCRATCH_SIZE = 29, /* Number of scratch registers */
140 SVGA_REG_MEM_REGS = 30, /* Number of FIFO registers */
141 SVGA_REG_NUM_DISPLAYS = 31, /* (Deprecated) */
142 SVGA_REG_PITCHLOCK = 32, /* Fixed pitch for all modes */
143 SVGA_REG_IRQMASK = 33, /* Interrupt mask */
144
145 /* Legacy multi-monitor support */
146 SVGA_REG_NUM_GUEST_DISPLAYS = 34,/* Number of guest displays in X/Y direction */
147 SVGA_REG_DISPLAY_ID = 35, /* Display ID for the following display attributes */
148 SVGA_REG_DISPLAY_IS_PRIMARY = 36,/* Whether this is a primary display */
149 SVGA_REG_DISPLAY_POSITION_X = 37,/* The display position x */
150 SVGA_REG_DISPLAY_POSITION_Y = 38,/* The display position y */
151 SVGA_REG_DISPLAY_WIDTH = 39, /* The display's width */
152 SVGA_REG_DISPLAY_HEIGHT = 40, /* The display's height */
153
154 /* See "Guest memory regions" below. */
155 SVGA_REG_GMR_ID = 41,
156 SVGA_REG_GMR_DESCRIPTOR = 42,
157 SVGA_REG_GMR_MAX_IDS = 43,
158 SVGA_REG_GMR_MAX_DESCRIPTOR_LENGTH = 44,
159
160 SVGA_REG_TRACES = 45, /* Enable trace-based updates even when FIFO is on */
161 SVGA_REG_TOP = 46, /* Must be 1 more than the last register */
162
163 SVGA_PALETTE_BASE = 1024, /* Base of SVGA color map */
164 /* Next 768 (== 256*3) registers exist for colormap */
165
166 SVGA_SCRATCH_BASE = SVGA_PALETTE_BASE + SVGA_NUM_PALETTE_REGS
167 /* Base of scratch registers */
168 /* Next reg[SVGA_REG_SCRATCH_SIZE] registers exist for scratch usage:
169 First 4 are reserved for VESA BIOS Extension; any remaining are for
170 the use of the current SVGA driver. */
171};
172
173
174/*
175 * Guest memory regions (GMRs):
176 *
177 * This is a new memory mapping feature available in SVGA devices
178 * which have the SVGA_CAP_GMR bit set. Previously, there were two
179 * fixed memory regions available with which to share data between the
180 * device and the driver: the FIFO ('MEM') and the framebuffer. GMRs
181 * are our name for an extensible way of providing arbitrary DMA
182 * buffers for use between the driver and the SVGA device. They are a
183 * new alternative to framebuffer memory, usable for both 2D and 3D
184 * graphics operations.
185 *
186 * Since GMR mapping must be done synchronously with guest CPU
187 * execution, we use a new pair of SVGA registers:
188 *
189 * SVGA_REG_GMR_ID --
190 *
191 * Read/write.
192 * This register holds the 32-bit ID (a small positive integer)
193 * of a GMR to create, delete, or redefine. Writing this register
194 * has no side-effects.
195 *
196 * SVGA_REG_GMR_DESCRIPTOR --
197 *
198 * Write-only.
199 * Writing this register will create, delete, or redefine the GMR
200 * specified by the above ID register. If this register is zero,
201 * the GMR is deleted. Any pointers into this GMR (including those
202 * currently being processed by FIFO commands) will be
203 * synchronously invalidated.
204 *
205 * If this register is nonzero, it must be the physical page
206 * number (PPN) of a data structure which describes the physical
207 * layout of the memory region this GMR should describe. The
208 * descriptor structure will be read synchronously by the SVGA
209 * device when this register is written. The descriptor need not
210 * remain allocated for the lifetime of the GMR.
211 *
212 * The guest driver should write SVGA_REG_GMR_ID first, then
213 * SVGA_REG_GMR_DESCRIPTOR.
214 *
215 * SVGA_REG_GMR_MAX_IDS --
216 *
217 * Read-only.
218 * The SVGA device may choose to support a maximum number of
219 * user-defined GMR IDs. This register holds the number of supported
220 * IDs. (The maximum supported ID plus 1)
221 *
222 * SVGA_REG_GMR_MAX_DESCRIPTOR_LENGTH --
223 *
224 * Read-only.
225 * The SVGA device may choose to put a limit on the total number
226 * of SVGAGuestMemDescriptor structures it will read when defining
227 * a single GMR.
228 *
229 * The descriptor structure is an array of SVGAGuestMemDescriptor
230 * structures. Each structure may do one of three things:
231 *
232 * - Terminate the GMR descriptor list.
233 * (ppn==0, numPages==0)
234 *
235 * - Add a PPN or range of PPNs to the GMR's virtual address space.
236 * (ppn != 0, numPages != 0)
237 *
238 * - Provide the PPN of the next SVGAGuestMemDescriptor, in order to
239 * support multi-page GMR descriptor tables without forcing the
240 * driver to allocate physically contiguous memory.
241 * (ppn != 0, numPages == 0)
242 *
243 * Note that each physical page of SVGAGuestMemDescriptor structures
244 * can describe at least 2MB of guest memory. If the driver needs to
245 * use more than one page of descriptor structures, it must use one of
246 * its SVGAGuestMemDescriptors to point to an additional page. The
247 * device will never automatically cross a page boundary.
248 *
249 * Once the driver has described a GMR, it is immediately available
250 * for use via any FIFO command that uses an SVGAGuestPtr structure.
251 * These pointers include a GMR identifier plus an offset into that
252 * GMR.
253 *
254 * The driver must check the SVGA_CAP_GMR bit before using the GMR
255 * registers.
256 */
257
258/*
259 * Special GMR IDs, allowing SVGAGuestPtrs to point to framebuffer
260 * memory as well. In the future, these IDs could even be used to
261 * allow legacy memory regions to be redefined by the guest as GMRs.
262 *
263 * Using the guest framebuffer (GFB) at BAR1 for general purpose DMA
264 * is being phased out. Please try to use user-defined GMRs whenever
265 * possible.
266 */
267#define SVGA_GMR_NULL ((uint32) -1)
268#define SVGA_GMR_FRAMEBUFFER ((uint32) -2) // Guest Framebuffer (GFB)
269
270typedef
271struct SVGAGuestMemDescriptor {
272 uint32 ppn;
273 uint32 numPages;
274} SVGAGuestMemDescriptor;
275
276typedef
277struct SVGAGuestPtr {
278 uint32 gmrId;
279 uint32 offset;
280} SVGAGuestPtr;
281
282
283/*
284 * SVGAGMRImageFormat --
285 *
286 * This is a packed representation of the source 2D image format
287 * for a GMR-to-screen blit. Currently it is defined as an encoding
288 * of the screen's color depth and bits-per-pixel, however, 16 bits
289 * are reserved for future use to identify other encodings (such as
290 * RGBA or higher-precision images).
291 *
292 * Currently supported formats:
293 *
294 * bpp depth Format Name
295 * --- ----- -----------
296 * 32 24 32-bit BGRX
297 * 24 24 24-bit BGR
298 * 16 16 RGB 5-6-5
299 * 16 15 RGB 5-5-5
300 *
301 */
302
303typedef
304struct SVGAGMRImageFormat {
305 union {
306 struct {
307 uint32 bitsPerPixel : 8;
308 uint32 colorDepth : 8;
309 uint32 reserved : 16; // Must be zero
310 };
311
312 uint32 value;
313 };
314} SVGAGMRImageFormat;
315
316/*
317 * SVGAColorBGRX --
318 *
319 * A 24-bit color format (BGRX), which does not depend on the
320 * format of the legacy guest framebuffer (GFB) or the current
321 * GMRFB state.
322 */
323
324typedef
325struct SVGAColorBGRX {
326 union {
327 struct {
328 uint32 b : 8;
329 uint32 g : 8;
330 uint32 r : 8;
331 uint32 x : 8; // Unused
332 };
333
334 uint32 value;
335 };
336} SVGAColorBGRX;
337
338
339/*
340 * SVGASignedRect --
341 * SVGASignedPoint --
342 *
343 * Signed rectangle and point primitives. These are used by the new
344 * 2D primitives for drawing to Screen Objects, which can occupy a
345 * signed virtual coordinate space.
346 *
347 * SVGASignedRect specifies a half-open interval: the (left, top)
348 * pixel is part of the rectangle, but the (right, bottom) pixel is
349 * not.
350 */
351
352typedef
353struct SVGASignedRect {
354 int32 left;
355 int32 top;
356 int32 right;
357 int32 bottom;
358} SVGASignedRect;
359
360typedef
361struct SVGASignedPoint {
362 int32 x;
363 int32 y;
364} SVGASignedPoint;
365
366
367/*
368 * Capabilities
369 *
370 * Note the holes in the bitfield. Missing bits have been deprecated,
371 * and must not be reused. Those capabilities will never be reported
372 * by new versions of the SVGA device.
373 */
374
375#define SVGA_CAP_NONE 0x00000000
376#define SVGA_CAP_RECT_COPY 0x00000002
377#define SVGA_CAP_CURSOR 0x00000020
378#define SVGA_CAP_CURSOR_BYPASS 0x00000040 // Legacy (Use Cursor Bypass 3 instead)
379#define SVGA_CAP_CURSOR_BYPASS_2 0x00000080 // Legacy (Use Cursor Bypass 3 instead)
380#define SVGA_CAP_8BIT_EMULATION 0x00000100
381#define SVGA_CAP_ALPHA_CURSOR 0x00000200
382#define SVGA_CAP_3D 0x00004000
383#define SVGA_CAP_EXTENDED_FIFO 0x00008000
384#define SVGA_CAP_MULTIMON 0x00010000 // Legacy multi-monitor support
385#define SVGA_CAP_PITCHLOCK 0x00020000
386#define SVGA_CAP_IRQMASK 0x00040000
387#define SVGA_CAP_DISPLAY_TOPOLOGY 0x00080000 // Legacy multi-monitor support
388#define SVGA_CAP_GMR 0x00100000
389#define SVGA_CAP_TRACES 0x00200000
390
391
392/*
393 * FIFO register indices.
394 *
395 * The FIFO is a chunk of device memory mapped into guest physmem. It
396 * is always treated as 32-bit words.
397 *
398 * The guest driver gets to decide how to partition it between
399 * - FIFO registers (there are always at least 4, specifying where the
400 * following data area is and how much data it contains; there may be
401 * more registers following these, depending on the FIFO protocol
402 * version in use)
403 * - FIFO data, written by the guest and slurped out by the VMX.
404 * These indices are 32-bit word offsets into the FIFO.
405 */
406
407enum {
408 /*
409 * Block 1 (basic registers): The originally defined FIFO registers.
410 * These exist and are valid for all versions of the FIFO protocol.
411 */
412
413 SVGA_FIFO_MIN = 0,
414 SVGA_FIFO_MAX, /* The distance from MIN to MAX must be at least 10K */
415 SVGA_FIFO_NEXT_CMD,
416 SVGA_FIFO_STOP,
417
418 /*
419 * Block 2 (extended registers): Mandatory registers for the extended
420 * FIFO. These exist if the SVGA caps register includes
421 * SVGA_CAP_EXTENDED_FIFO; some of them are valid only if their
422 * associated capability bit is enabled.
423 *
424 * Note that when originally defined, SVGA_CAP_EXTENDED_FIFO implied
425 * support only for (FIFO registers) CAPABILITIES, FLAGS, and FENCE.
426 * This means that the guest has to test individually (in most cases
427 * using FIFO caps) for the presence of registers after this; the VMX
428 * can define "extended FIFO" to mean whatever it wants, and currently
429 * won't enable it unless there's room for that set and much more.
430 */
431
432 SVGA_FIFO_CAPABILITIES = 4,
433 SVGA_FIFO_FLAGS,
434 // Valid with SVGA_FIFO_CAP_FENCE:
435 SVGA_FIFO_FENCE,
436
437 /*
438 * Block 3a (optional extended registers): Additional registers for the
439 * extended FIFO, whose presence isn't actually implied by
440 * SVGA_CAP_EXTENDED_FIFO; these exist if SVGA_FIFO_MIN is high enough to
441 * leave room for them.
442 *
443 * These in block 3a, the VMX currently considers mandatory for the
444 * extended FIFO.
445 */
446
447 // Valid if exists (i.e. if extended FIFO enabled):
448 SVGA_FIFO_3D_HWVERSION, /* See SVGA3dHardwareVersion in svga3d_reg.h */
449 // Valid with SVGA_FIFO_CAP_PITCHLOCK:
450 SVGA_FIFO_PITCHLOCK,
451
452 // Valid with SVGA_FIFO_CAP_CURSOR_BYPASS_3:
453 SVGA_FIFO_CURSOR_ON, /* Cursor bypass 3 show/hide register */
454 SVGA_FIFO_CURSOR_X, /* Cursor bypass 3 x register */
455 SVGA_FIFO_CURSOR_Y, /* Cursor bypass 3 y register */
456 SVGA_FIFO_CURSOR_COUNT, /* Incremented when any of the other 3 change */
457 SVGA_FIFO_CURSOR_LAST_UPDATED,/* Last time the host updated the cursor */
458
459 // Valid with SVGA_FIFO_CAP_RESERVE:
460 SVGA_FIFO_RESERVED, /* Bytes past NEXT_CMD with real contents */
461
462 /*
463 * Valid with SVGA_FIFO_CAP_SCREEN_OBJECT:
464 *
465 * By default this is SVGA_ID_INVALID, to indicate that the cursor
466 * coordinates are specified relative to the virtual root. If this
467 * is set to a specific screen ID, cursor position is reinterpreted
468 * as a signed offset relative to that screen's origin. This is the
469 * only way to place the cursor on a non-rooted screen.
470 */
471 SVGA_FIFO_CURSOR_SCREEN_ID,
472
473 /*
474 * XXX: The gap here, up until SVGA_FIFO_3D_CAPS, can be used for new
475 * registers, but this must be done carefully and with judicious use of
476 * capability bits, since comparisons based on SVGA_FIFO_MIN aren't
477 * enough to tell you whether the register exists: we've shipped drivers
478 * and products that used SVGA_FIFO_3D_CAPS but didn't know about some of
479 * the earlier ones. The actual order of introduction was:
480 * - PITCHLOCK
481 * - 3D_CAPS
482 * - CURSOR_* (cursor bypass 3)
483 * - RESERVED
484 * So, code that wants to know whether it can use any of the
485 * aforementioned registers, or anything else added after PITCHLOCK and
486 * before 3D_CAPS, needs to reason about something other than
487 * SVGA_FIFO_MIN.
488 */
489
490 /*
491 * 3D caps block space; valid with 3D hardware version >=
492 * SVGA3D_HWVERSION_WS6_B1.
493 */
494 SVGA_FIFO_3D_CAPS = 32,
495 SVGA_FIFO_3D_CAPS_LAST = 32 + 255,
496
497 /*
498 * End of VMX's current definition of "extended-FIFO registers".
499 * Registers before here are always enabled/disabled as a block; either
500 * the extended FIFO is enabled and includes all preceding registers, or
501 * it's disabled entirely.
502 *
503 * Block 3b (truly optional extended registers): Additional registers for
504 * the extended FIFO, which the VMX already knows how to enable and
505 * disable with correct granularity.
506 *
507 * Registers after here exist if and only if the guest SVGA driver
508 * sets SVGA_FIFO_MIN high enough to leave room for them.
509 */
510
511 // Valid if register exists:
512 SVGA_FIFO_GUEST_3D_HWVERSION, /* Guest driver's 3D version */
513 SVGA_FIFO_FENCE_GOAL, /* Matching target for SVGA_IRQFLAG_FENCE_GOAL */
514 SVGA_FIFO_BUSY, /* See "FIFO Synchronization Registers" */
515
516 /*
517 * Always keep this last. This defines the maximum number of
518 * registers we know about. At power-on, this value is placed in
519 * the SVGA_REG_MEM_REGS register, and we expect the guest driver
520 * to allocate this much space in FIFO memory for registers.
521 */
522 SVGA_FIFO_NUM_REGS
523};
524
525
526/*
527 * Definition of registers included in extended FIFO support.
528 *
529 * The guest SVGA driver gets to allocate the FIFO between registers
530 * and data. It must always allocate at least 4 registers, but old
531 * drivers stopped there.
532 *
533 * The VMX will enable extended FIFO support if and only if the guest
534 * left enough room for all registers defined as part of the mandatory
535 * set for the extended FIFO.
536 *
537 * Note that the guest drivers typically allocate the FIFO only at
538 * initialization time, not at mode switches, so it's likely that the
539 * number of FIFO registers won't change without a reboot.
540 *
541 * All registers less than this value are guaranteed to be present if
542 * svgaUser->fifo.extended is set. Any later registers must be tested
543 * individually for compatibility at each use (in the VMX).
544 *
545 * This value is used only by the VMX, so it can change without
546 * affecting driver compatibility; keep it that way?
547 */
548#define SVGA_FIFO_EXTENDED_MANDATORY_REGS (SVGA_FIFO_3D_CAPS_LAST + 1)
549
550
551/*
552 * FIFO Synchronization Registers
553 *
554 * This explains the relationship between the various FIFO
555 * sync-related registers in IOSpace and in FIFO space.
556 *
557 * SVGA_REG_SYNC --
558 *
559 * The SYNC register can be used in two different ways by the guest:
560 *
561 * 1. If the guest wishes to fully sync (drain) the FIFO,
562 * it will write once to SYNC then poll on the BUSY
563 * register. The FIFO is sync'ed once BUSY is zero.
564 *
565 * 2. If the guest wants to asynchronously wake up the host,
566 * it will write once to SYNC without polling on BUSY.
567 * Ideally it will do this after some new commands have
568 * been placed in the FIFO, and after reading a zero
569 * from SVGA_FIFO_BUSY.
570 *
571 * (1) is the original behaviour that SYNC was designed to
572 * support. Originally, a write to SYNC would implicitly
573 * trigger a read from BUSY. This causes us to synchronously
574 * process the FIFO.
575 *
576 * This behaviour has since been changed so that writing SYNC
577 * will *not* implicitly cause a read from BUSY. Instead, it
578 * makes a channel call which asynchronously wakes up the MKS
579 * thread.
580 *
581 * New guests can use this new behaviour to implement (2)
582 * efficiently. This lets guests get the host's attention
583 * without waiting for the MKS to poll, which gives us much
584 * better CPU utilization on SMP hosts and on UP hosts while
585 * we're blocked on the host GPU.
586 *
587 * Old guests shouldn't notice the behaviour change. SYNC was
588 * never guaranteed to process the entire FIFO, since it was
589 * bounded to a particular number of CPU cycles. Old guests will
590 * still loop on the BUSY register until the FIFO is empty.
591 *
592 * Writing to SYNC currently has the following side-effects:
593 *
594 * - Sets SVGA_REG_BUSY to TRUE (in the monitor)
595 * - Asynchronously wakes up the MKS thread for FIFO processing
596 * - The value written to SYNC is recorded as a "reason", for
597 * stats purposes.
598 *
599 * If SVGA_FIFO_BUSY is available, drivers are advised to only
600 * write to SYNC if SVGA_FIFO_BUSY is FALSE. Drivers should set
601 * SVGA_FIFO_BUSY to TRUE after writing to SYNC. The MKS will
602 * eventually set SVGA_FIFO_BUSY on its own, but this approach
603 * lets the driver avoid sending multiple asynchronous wakeup
604 * messages to the MKS thread.
605 *
606 * SVGA_REG_BUSY --
607 *
608 * This register is set to TRUE when SVGA_REG_SYNC is written,
609 * and it reads as FALSE when the FIFO has been completely
610 * drained.
611 *
612 * Every read from this register causes us to synchronously
613 * process FIFO commands. There is no guarantee as to how many
614 * commands each read will process.
615 *
616 * CPU time spent processing FIFO commands will be billed to
617 * the guest.
618 *
619 * New drivers should avoid using this register unless they
620 * need to guarantee that the FIFO is completely drained. It
621 * is overkill for performing a sync-to-fence. Older drivers
622 * will use this register for any type of synchronization.
623 *
624 * SVGA_FIFO_BUSY --
625 *
626 * This register is a fast way for the guest driver to check
627 * whether the FIFO is already being processed. It reads and
628 * writes at normal RAM speeds, with no monitor intervention.
629 *
630 * If this register reads as TRUE, the host is guaranteeing that
631 * any new commands written into the FIFO will be noticed before
632 * the MKS goes back to sleep.
633 *
634 * If this register reads as FALSE, no such guarantee can be
635 * made.
636 *
637 * The guest should use this register to quickly determine
638 * whether or not it needs to wake up the host. If the guest
639 * just wrote a command or group of commands that it would like
640 * the host to begin processing, it should:
641 *
642 * 1. Read SVGA_FIFO_BUSY. If it reads as TRUE, no further
643 * action is necessary.
644 *
645 * 2. Write TRUE to SVGA_FIFO_BUSY. This informs future guest
646 * code that we've already sent a SYNC to the host and we
647 * don't need to send a duplicate.
648 *
649 * 3. Write a reason to SVGA_REG_SYNC. This will send an
650 * asynchronous wakeup to the MKS thread.
651 */
652
653
654/*
655 * FIFO Capabilities
656 *
657 * Fence -- Fence register and command are supported
658 * Accel Front -- Front buffer only commands are supported
659 * Pitch Lock -- Pitch lock register is supported
660 * Video -- SVGA Video overlay units are supported
661 * Escape -- Escape command is supported
662 *
663 * XXX: Add longer descriptions for each capability, including a list
664 * of the new features that each capability provides.
665 *
666 * SVGA_FIFO_CAP_SCREEN_OBJECT --
667 *
668 * Provides dynamic multi-screen rendering, for improved Unity and
669 * multi-monitor modes. With Screen Object, the guest can
670 * dynamically create and destroy 'screens', which can represent
671 * Unity windows or virtual monitors. Screen Object also provides
672 * strong guarantees that DMA operations happen only when
673 * guest-initiated. Screen Object deprecates the BAR1 guest
674 * framebuffer (GFB) and all commands that work only with the GFB.
675 *
676 * New registers:
677 * FIFO_CURSOR_SCREEN_ID, VIDEO_DATA_GMRID, VIDEO_DST_SCREEN_ID
678 *
679 * New 2D commands:
680 * DEFINE_SCREEN, DESTROY_SCREEN, DEFINE_GMRFB, BLIT_GMRFB_TO_SCREEN,
681 * BLIT_SCREEN_TO_GMRFB, ANNOTATION_FILL, ANNOTATION_COPY
682 *
683 * New 3D commands:
684 * BLIT_SURFACE_TO_SCREEN
685 *
686 * New guarantees:
687 *
688 * - The host will not read or write guest memory, including the GFB,
689 * except when explicitly initiated by a DMA command.
690 *
691 * - All DMA, including legacy DMA like UPDATE and PRESENT_READBACK,
692 * is guaranteed to complete before any subsequent FENCEs.
693 *
694 * - All legacy commands which affect a Screen (UPDATE, PRESENT,
695 * PRESENT_READBACK) as well as new Screen blit commands will
696 * all behave consistently as blits, and memory will be read
697 * or written in FIFO order.
698 *
699 * For example, if you PRESENT from one SVGA3D surface to multiple
700 * places on the screen, the data copied will always be from the
701 * SVGA3D surface at the time the PRESENT was issued in the FIFO.
702 * This was not necessarily true on devices without Screen Object.
703 *
704 * This means that on devices that support Screen Object, the
705 * PRESENT_READBACK command should not be necessary unless you
706 * actually want to read back the results of 3D rendering into
707 * system memory. (And for that, the BLIT_SCREEN_TO_GMRFB
708 * command provides a strict superset of functionality.)
709 *
710 * - When a screen is resized, either using Screen Object commands or
711 * legacy multimon registers, its contents are preserved.
712 */
713
714#define SVGA_FIFO_CAP_NONE 0
715#define SVGA_FIFO_CAP_FENCE (1<<0)
716#define SVGA_FIFO_CAP_ACCELFRONT (1<<1)
717#define SVGA_FIFO_CAP_PITCHLOCK (1<<2)
718#define SVGA_FIFO_CAP_VIDEO (1<<3)
719#define SVGA_FIFO_CAP_CURSOR_BYPASS_3 (1<<4)
720#define SVGA_FIFO_CAP_ESCAPE (1<<5)
721#define SVGA_FIFO_CAP_RESERVE (1<<6)
722#define SVGA_FIFO_CAP_SCREEN_OBJECT (1<<7)
723
724
725/*
726 * FIFO Flags
727 *
728 * Accel Front -- Driver should use front buffer only commands
729 */
730
731#define SVGA_FIFO_FLAG_NONE 0
732#define SVGA_FIFO_FLAG_ACCELFRONT (1<<0)
733#define SVGA_FIFO_FLAG_RESERVED (1<<31) // Internal use only
734
735/*
736 * FIFO reservation sentinel value
737 */
738
739#define SVGA_FIFO_RESERVED_UNKNOWN 0xffffffff
740
741
742/*
743 * Video overlay support
744 */
745
746#define SVGA_NUM_OVERLAY_UNITS 32
747
748
749/*
750 * Video capabilities that the guest is currently using
751 */
752
753#define SVGA_VIDEO_FLAG_COLORKEY 0x0001
754
755
756/*
757 * Offsets for the video overlay registers
758 */
759
760enum {
761 SVGA_VIDEO_ENABLED = 0,
762 SVGA_VIDEO_FLAGS,
763 SVGA_VIDEO_DATA_OFFSET,
764 SVGA_VIDEO_FORMAT,
765 SVGA_VIDEO_COLORKEY,
766 SVGA_VIDEO_SIZE, // Deprecated
767 SVGA_VIDEO_WIDTH,
768 SVGA_VIDEO_HEIGHT,
769 SVGA_VIDEO_SRC_X,
770 SVGA_VIDEO_SRC_Y,
771 SVGA_VIDEO_SRC_WIDTH,
772 SVGA_VIDEO_SRC_HEIGHT,
773 SVGA_VIDEO_DST_X, // Signed int32
774 SVGA_VIDEO_DST_Y, // Signed int32
775 SVGA_VIDEO_DST_WIDTH,
776 SVGA_VIDEO_DST_HEIGHT,
777 SVGA_VIDEO_PITCH_1,
778 SVGA_VIDEO_PITCH_2,
779 SVGA_VIDEO_PITCH_3,
780 SVGA_VIDEO_DATA_GMRID, // Optional, defaults to SVGA_GMR_FRAMEBUFFER
781 SVGA_VIDEO_DST_SCREEN_ID, // Optional, defaults to virtual coords (SVGA_ID_INVALID)
782 SVGA_VIDEO_NUM_REGS
783};
784
785
786/*
787 * SVGA Overlay Units
788 *
789 * width and height relate to the entire source video frame.
790 * srcX, srcY, srcWidth and srcHeight represent subset of the source
791 * video frame to be displayed.
792 */
793
794typedef struct SVGAOverlayUnit {
795 uint32 enabled;
796 uint32 flags;
797 uint32 dataOffset;
798 uint32 format;
799 uint32 colorKey;
800 uint32 size;
801 uint32 width;
802 uint32 height;
803 uint32 srcX;
804 uint32 srcY;
805 uint32 srcWidth;
806 uint32 srcHeight;
807 int32 dstX;
808 int32 dstY;
809 uint32 dstWidth;
810 uint32 dstHeight;
811 uint32 pitches[3];
812 uint32 dataGMRId;
813 uint32 dstScreenId;
814} SVGAOverlayUnit;
815
816
817/*
818 * SVGAScreenObject --
819 *
820 * This is a new way to represent a guest's multi-monitor screen or
821 * Unity window. Screen objects are only supported if the
822 * SVGA_FIFO_CAP_SCREEN_OBJECT capability bit is set.
823 *
824 * If Screen Objects are supported, they can be used to fully
825 * replace the functionality provided by the framebuffer registers
826 * (SVGA_REG_WIDTH, HEIGHT, etc.) and by SVGA_CAP_DISPLAY_TOPOLOGY.
827 *
828 * The screen object is a struct with guaranteed binary
829 * compatibility. New flags can be added, and the struct may grow,
830 * but existing fields must retain their meaning.
831 *
832 */
833
834#define SVGA_SCREEN_HAS_ROOT (1 << 0) // Screen is present in the virtual coord space
835#define SVGA_SCREEN_IS_PRIMARY (1 << 1) // Guest considers this screen to be 'primary'
836#define SVGA_SCREEN_FULLSCREEN_HINT (1 << 2) // Guest is running a fullscreen app here
837
838typedef
839struct SVGAScreenObject {
840 uint32 structSize; // sizeof(SVGAScreenObject)
841 uint32 id;
842 uint32 flags;
843 struct {
844 uint32 width;
845 uint32 height;
846 } size;
847 struct {
848 int32 x;
849 int32 y;
850 } root; // Only used if SVGA_SCREEN_HAS_ROOT is set.
851} SVGAScreenObject;
852
853
854/*
855 * Commands in the command FIFO:
856 *
857 * Command IDs defined below are used for the traditional 2D FIFO
858 * communication (not all commands are available for all versions of the
859 * SVGA FIFO protocol).
860 *
861 * Note the holes in the command ID numbers: These commands have been
862 * deprecated, and the old IDs must not be reused.
863 *
864 * Command IDs from 1000 to 1999 are reserved for use by the SVGA3D
865 * protocol.
866 *
867 * Each command's parameters are described by the comments and
868 * structs below.
869 */
870
871typedef enum {
872 SVGA_CMD_INVALID_CMD = 0,
873 SVGA_CMD_UPDATE = 1,
874 SVGA_CMD_RECT_COPY = 3,
875 SVGA_CMD_DEFINE_CURSOR = 19,
876 SVGA_CMD_DEFINE_ALPHA_CURSOR = 22,
877 SVGA_CMD_UPDATE_VERBOSE = 25,
878 SVGA_CMD_FRONT_ROP_FILL = 29,
879 SVGA_CMD_FENCE = 30,
880 SVGA_CMD_ESCAPE = 33,
881 SVGA_CMD_DEFINE_SCREEN = 34,
882 SVGA_CMD_DESTROY_SCREEN = 35,
883 SVGA_CMD_DEFINE_GMRFB = 36,
884 SVGA_CMD_BLIT_GMRFB_TO_SCREEN = 37,
885 SVGA_CMD_BLIT_SCREEN_TO_GMRFB = 38,
886 SVGA_CMD_ANNOTATION_FILL = 39,
887 SVGA_CMD_ANNOTATION_COPY = 40,
888 SVGA_CMD_MAX
889} SVGAFifoCmdId;
890
891#define SVGA_CMD_MAX_ARGS 64
892
893
894/*
895 * SVGA_CMD_UPDATE --
896 *
897 * This is a DMA transfer which copies from the Guest Framebuffer
898 * (GFB) at BAR1 + SVGA_REG_FB_OFFSET to any screens which
899 * intersect with the provided virtual rectangle.
900 *
901 * This command does not support using arbitrary guest memory as a
902 * data source- it only works with the pre-defined GFB memory.
903 * This command also does not support signed virtual coordinates.
904 * If you have defined screens (using SVGA_CMD_DEFINE_SCREEN) with
905 * negative root x/y coordinates, the negative portion of those
906 * screens will not be reachable by this command.
907 *
908 * This command is not necessary when using framebuffer
909 * traces. Traces are automatically enabled if the SVGA FIFO is
910 * disabled, and you may explicitly enable/disable traces using
911 * SVGA_REG_TRACES. With traces enabled, any write to the GFB will
912 * automatically act as if a subsequent SVGA_CMD_UPDATE was issued.
913 *
914 * Traces and SVGA_CMD_UPDATE are the only supported ways to render
915 * pseudocolor screen updates. The newer Screen Object commands
916 * only support true color formats.
917 *
918 * Availability:
919 * Always available.
920 */
921
922typedef
923struct {
924 uint32 x;
925 uint32 y;
926 uint32 width;
927 uint32 height;
928} SVGAFifoCmdUpdate;
929
930
931/*
932 * SVGA_CMD_RECT_COPY --
933 *
934 * Perform a rectangular DMA transfer from one area of the GFB to
935 * another, and copy the result to any screens which intersect it.
936 *
937 * Availability:
938 * SVGA_CAP_RECT_COPY
939 */
940
941typedef
942struct {
943 uint32 srcX;
944 uint32 srcY;
945 uint32 destX;
946 uint32 destY;
947 uint32 width;
948 uint32 height;
949} SVGAFifoCmdRectCopy;
950
951
952/*
953 * SVGA_CMD_DEFINE_CURSOR --
954 *
955 * Provide a new cursor image, as an AND/XOR mask.
956 *
957 * The recommended way to position the cursor overlay is by using
958 * the SVGA_FIFO_CURSOR_* registers, supported by the
959 * SVGA_FIFO_CAP_CURSOR_BYPASS_3 capability.
960 *
961 * Availability:
962 * SVGA_CAP_CURSOR
963 */
964
965typedef
966struct {
967 uint32 id; // Reserved, must be zero.
968 uint32 hotspotX;
969 uint32 hotspotY;
970 uint32 width;
971 uint32 height;
972 uint32 andMaskDepth; // Value must be 1 or equal to BITS_PER_PIXEL
973 uint32 xorMaskDepth; // Value must be 1 or equal to BITS_PER_PIXEL
974 /*
975 * Followed by scanline data for AND mask, then XOR mask.
976 * Each scanline is padded to a 32-bit boundary.
977 */
978} SVGAFifoCmdDefineCursor;
979
980
981/*
982 * SVGA_CMD_DEFINE_ALPHA_CURSOR --
983 *
984 * Provide a new cursor image, in 32-bit BGRA format.
985 *
986 * The recommended way to position the cursor overlay is by using
987 * the SVGA_FIFO_CURSOR_* registers, supported by the
988 * SVGA_FIFO_CAP_CURSOR_BYPASS_3 capability.
989 *
990 * Availability:
991 * SVGA_CAP_ALPHA_CURSOR
992 */
993
994typedef
995struct {
996 uint32 id; // Reserved, must be zero.
997 uint32 hotspotX;
998 uint32 hotspotY;
999 uint32 width;
1000 uint32 height;
1001 /* Followed by scanline data */
1002} SVGAFifoCmdDefineAlphaCursor;
1003
1004
1005/*
1006 * SVGA_CMD_UPDATE_VERBOSE --
1007 *
1008 * Just like SVGA_CMD_UPDATE, but also provide a per-rectangle
1009 * 'reason' value, an opaque cookie which is used by internal
1010 * debugging tools. Third party drivers should not use this
1011 * command.
1012 *
1013 * Availability:
1014 * SVGA_CAP_EXTENDED_FIFO
1015 */
1016
1017typedef
1018struct {
1019 uint32 x;
1020 uint32 y;
1021 uint32 width;
1022 uint32 height;
1023 uint32 reason;
1024} SVGAFifoCmdUpdateVerbose;
1025
1026
1027/*
1028 * SVGA_CMD_FRONT_ROP_FILL --
1029 *
1030 * This is a hint which tells the SVGA device that the driver has
1031 * just filled a rectangular region of the GFB with a solid
1032 * color. Instead of reading these pixels from the GFB, the device
1033 * can assume that they all equal 'color'. This is primarily used
1034 * for remote desktop protocols.
1035 *
1036 * Availability:
1037 * SVGA_FIFO_CAP_ACCELFRONT
1038 */
1039
1040#define SVGA_ROP_COPY 0x03
1041
1042typedef
1043struct {
1044 uint32 color; // In the same format as the GFB
1045 uint32 x;
1046 uint32 y;
1047 uint32 width;
1048 uint32 height;
1049 uint32 rop; // Must be SVGA_ROP_COPY
1050} SVGAFifoCmdFrontRopFill;
1051
1052
1053/*
1054 * SVGA_CMD_FENCE --
1055 *
1056 * Insert a synchronization fence. When the SVGA device reaches
1057 * this command, it will copy the 'fence' value into the
1058 * SVGA_FIFO_FENCE register. It will also compare the fence against
1059 * SVGA_FIFO_FENCE_GOAL. If the fence matches the goal and the
1060 * SVGA_IRQFLAG_FENCE_GOAL interrupt is enabled, the device will
1061 * raise this interrupt.
1062 *
1063 * Availability:
1064 * SVGA_FIFO_FENCE for this command,
1065 * SVGA_CAP_IRQMASK for SVGA_FIFO_FENCE_GOAL.
1066 */
1067
1068typedef
1069struct {
1070 uint32 fence;
1071} SVGAFifoCmdFence;
1072
1073
1074/*
1075 * SVGA_CMD_ESCAPE --
1076 *
1077 * Send an extended or vendor-specific variable length command.
1078 * This is used for video overlay, third party plugins, and
1079 * internal debugging tools. See svga_escape.h
1080 *
1081 * Availability:
1082 * SVGA_FIFO_CAP_ESCAPE
1083 */
1084
1085typedef
1086struct {
1087 uint32 nsid;
1088 uint32 size;
1089 /* followed by 'size' bytes of data */
1090} SVGAFifoCmdEscape;
1091
1092
1093/*
1094 * SVGA_CMD_DEFINE_SCREEN --
1095 *
1096 * Define or redefine an SVGAScreenObject. See the description of
1097 * SVGAScreenObject above. The video driver is responsible for
1098 * generating new screen IDs. They should be small positive
1099 * integers. The virtual device will have an implementation
1100 * specific upper limit on the number of screen IDs
1101 * supported. Drivers are responsible for recycling IDs. The first
1102 * valid ID is zero.
1103 *
1104 * - Interaction with other registers:
1105 *
1106 * For backwards compatibility, when the GFB mode registers (WIDTH,
1107 * HEIGHT, PITCHLOCK, BITS_PER_PIXEL) are modified, the SVGA device
1108 * deletes all screens other than screen #0, and redefines screen
1109 * #0 according to the specified mode. Drivers that use
1110 * SVGA_CMD_DEFINE_SCREEN should destroy or redefine screen #0.
1111 *
1112 * If you use screen objects, do not use the legacy multi-mon
1113 * registers (SVGA_REG_NUM_GUEST_DISPLAYS, SVGA_REG_DISPLAY_*).
1114 *
1115 * Availability:
1116 * SVGA_FIFO_CAP_SCREEN_OBJECT
1117 */
1118
1119typedef
1120struct {
1121 SVGAScreenObject screen; // Variable-length according to version
1122} SVGAFifoCmdDefineScreen;
1123
1124
1125/*
1126 * SVGA_CMD_DESTROY_SCREEN --
1127 *
1128 * Destroy an SVGAScreenObject. Its ID is immediately available for
1129 * re-use.
1130 *
1131 * Availability:
1132 * SVGA_FIFO_CAP_SCREEN_OBJECT
1133 */
1134
1135typedef
1136struct {
1137 uint32 screenId;
1138} SVGAFifoCmdDestroyScreen;
1139
1140
1141/*
1142 * SVGA_CMD_DEFINE_GMRFB --
1143 *
1144 * This command sets a piece of SVGA device state called the
1145 * Guest Memory Region Framebuffer, or GMRFB. The GMRFB is a
1146 * piece of light-weight state which identifies the location and
1147 * format of an image in guest memory or in BAR1. The GMRFB has
1148 * an arbitrary size, and it doesn't need to match the geometry
1149 * of the GFB or any screen object.
1150 *
1151 * The GMRFB can be redefined as often as you like. You could
1152 * always use the same GMRFB, you could redefine it before
1153 * rendering from a different guest screen, or you could even
1154 * redefine it before every blit.
1155 *
1156 * There are multiple ways to use this command. The simplest way is
1157 * to use it to move the framebuffer either to elsewhere in the GFB
1158 * (BAR1) memory region, or to a user-defined GMR. This lets a
1159 * driver use a framebuffer allocated entirely out of normal system
1160 * memory, which we encourage.
1161 *
1162 * Another way to use this command is to set up a ring buffer of
1163 * updates in GFB memory. If a driver wants to ensure that no
1164 * frames are skipped by the SVGA device, it is important that the
1165 * driver not modify the source data for a blit until the device is
1166 * done processing the command. One efficient way to accomplish
1167 * this is to use a ring of small DMA buffers. Each buffer is used
1168 * for one blit, then we move on to the next buffer in the
1169 * ring. The FENCE mechanism is used to protect each buffer from
1170 * re-use until the device is finished with that buffer's
1171 * corresponding blit.
1172 *
1173 * This command does not affect the meaning of SVGA_CMD_UPDATE.
1174 * UPDATEs always occur from the legacy GFB memory area. This
1175 * command has no support for pseudocolor GMRFBs. Currently only
1176 * true-color 15, 16, and 24-bit depths are supported. Future
1177 * devices may expose capabilities for additional framebuffer
1178 * formats.
1179 *
1180 * The default GMRFB value is undefined. Drivers must always send
1181 * this command at least once before performing any blit from the
1182 * GMRFB.
1183 *
1184 * Availability:
1185 * SVGA_FIFO_CAP_SCREEN_OBJECT
1186 */
1187
1188typedef
1189struct {
1190 SVGAGuestPtr ptr;
1191 uint32 bytesPerLine;
1192 SVGAGMRImageFormat format;
1193} SVGAFifoCmdDefineGMRFB;
1194
1195
1196/*
1197 * SVGA_CMD_BLIT_GMRFB_TO_SCREEN --
1198 *
1199 * This is a guest-to-host blit. It performs a DMA operation to
1200 * copy a rectangular region of pixels from the current GMRFB to
1201 * one or more Screen Objects.
1202 *
1203 * The destination coordinate may be specified relative to a
1204 * screen's origin (if a screen ID is specified) or relative to the
1205 * virtual coordinate system's origin (if the screen ID is
1206 * SVGA_ID_INVALID). The actual destination may span zero or more
1207 * screens, in the case of a virtual destination rect or a rect
1208 * which extends off the edge of the specified screen.
1209 *
1210 * This command writes to the screen's "base layer": the underlying
1211 * framebuffer which exists below any cursor or video overlays. No
1212 * action is necessary to explicitly hide or update any overlays
1213 * which exist on top of the updated region.
1214 *
1215 * The SVGA device is guaranteed to finish reading from the GMRFB
1216 * by the time any subsequent FENCE commands are reached.
1217 *
1218 * This command consumes an annotation. See the
1219 * SVGA_CMD_ANNOTATION_* commands for details.
1220 *
1221 * Availability:
1222 * SVGA_FIFO_CAP_SCREEN_OBJECT
1223 */
1224
1225typedef
1226struct {
1227 SVGASignedPoint srcOrigin;
1228 SVGASignedRect destRect;
1229 uint32 destScreenId;
1230} SVGAFifoCmdBlitGMRFBToScreen;
1231
1232
1233/*
1234 * SVGA_CMD_BLIT_SCREEN_TO_GMRFB --
1235 *
1236 * This is a host-to-guest blit. It performs a DMA operation to
1237 * copy a rectangular region of pixels from a single Screen Object
1238 * back to the current GMRFB.
1239 *
1240 * Usage note: This command should be used rarely. It will
1241 * typically be inefficient, but it is necessary for some types of
1242 * synchronization between 3D (GPU) and 2D (CPU) rendering into
1243 * overlapping areas of a screen.
1244 *
1245 * The source coordinate is specified relative to a screen's
1246 * origin. The provided screen ID must be valid. If any parameters
1247 * are invalid, the resulting pixel values are undefined.
1248 *
1249 * This command reads the screen's "base layer". Overlays like
1250 * video and cursor are not included, but any data which was sent
1251 * using a blit-to-screen primitive will be available, no matter
1252 * whether the data's original source was the GMRFB or the 3D
1253 * acceleration hardware.
1254 *
1255 * Note that our guest-to-host blits and host-to-guest blits aren't
1256 * symmetric in their current implementation. While the parameters
1257 * are identical, host-to-guest blits are a lot less featureful.
1258 * They do not support clipping: If the source parameters don't
1259 * fully fit within a screen, the blit fails. They must originate
1260 * from exactly one screen. Virtual coordinates are not directly
1261 * supported.
1262 *
1263 * Host-to-guest blits do support the same set of GMRFB formats
1264 * offered by guest-to-host blits.
1265 *
1266 * The SVGA device is guaranteed to finish writing to the GMRFB by
1267 * the time any subsequent FENCE commands are reached.
1268 *
1269 * Availability:
1270 * SVGA_FIFO_CAP_SCREEN_OBJECT
1271 */
1272
1273typedef
1274struct {
1275 SVGASignedPoint destOrigin;
1276 SVGASignedRect srcRect;
1277 uint32 srcScreenId;
1278} SVGAFifoCmdBlitScreenToGMRFB;
1279
1280
1281/*
1282 * SVGA_CMD_ANNOTATION_FILL --
1283 *
1284 * This is a blit annotation. This command stores a small piece of
1285 * device state which is consumed by the next blit-to-screen
1286 * command. The state is only cleared by commands which are
1287 * specifically documented as consuming an annotation. Other
1288 * commands (such as ESCAPEs for debugging) may intervene between
1289 * the annotation and its associated blit.
1290 *
1291 * This annotation is a promise about the contents of the next
1292 * blit: The video driver is guaranteeing that all pixels in that
1293 * blit will have the same value, specified here as a color in
1294 * SVGAColorBGRX format.
1295 *
1296 * The SVGA device can still render the blit correctly even if it
1297 * ignores this annotation, but the annotation may allow it to
1298 * perform the blit more efficiently, for example by ignoring the
1299 * source data and performing a fill in hardware.
1300 *
1301 * This annotation is most important for performance when the
1302 * user's display is being remoted over a network connection.
1303 *
1304 * Availability:
1305 * SVGA_FIFO_CAP_SCREEN_OBJECT
1306 */
1307
1308typedef
1309struct {
1310 SVGAColorBGRX color;
1311} SVGAFifoCmdAnnotationFill;
1312
1313
1314/*
1315 * SVGA_CMD_ANNOTATION_COPY --
1316 *
1317 * This is a blit annotation. See SVGA_CMD_ANNOTATION_FILL for more
1318 * information about annotations.
1319 *
1320 * This annotation is a promise about the contents of the next
1321 * blit: The video driver is guaranteeing that all pixels in that
1322 * blit will have the same value as those which already exist at an
1323 * identically-sized region on the same or a different screen.
1324 *
1325 * Note that the source pixels for the COPY in this annotation are
1326 * sampled before applying the anqnotation's associated blit. They
1327 * are allowed to overlap with the blit's destination pixels.
1328 *
1329 * The copy source rectangle is specified the same way as the blit
1330 * destination: it can be a rectangle which spans zero or more
1331 * screens, specified relative to either a screen or to the virtual
1332 * coordinate system's origin. If the source rectangle includes
1333 * pixels which are not from exactly one screen, the results are
1334 * undefined.
1335 *
1336 * Availability:
1337 * SVGA_FIFO_CAP_SCREEN_OBJECT
1338 */
1339
1340typedef
1341struct {
1342 SVGASignedPoint srcOrigin;
1343 uint32 srcScreenId;
1344} SVGAFifoCmdAnnotationCopy;
1345
1346#endif
diff --git a/drivers/gpu/drm/vmwgfx/svga_types.h b/drivers/gpu/drm/vmwgfx/svga_types.h
new file mode 100644
index 000000000000..55836dedcfc2
--- /dev/null
+++ b/drivers/gpu/drm/vmwgfx/svga_types.h
@@ -0,0 +1,45 @@
1/**************************************************************************
2 *
3 * Copyright © 2009 VMware, Inc., Palo Alto, CA., USA
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
21 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
22 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
23 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
24 * USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28/**
29 * Silly typedefs for the svga headers. Currently the headers are shared
30 * between all components that talk to svga. And as such the headers are
31 * are in a completely different style and use weird defines.
32 *
33 * This file lets all the ugly be prefixed with svga*.
34 */
35
36#ifndef _SVGA_TYPES_H_
37#define _SVGA_TYPES_H_
38
39typedef uint16_t uint16;
40typedef uint32_t uint32;
41typedef uint8_t uint8;
42typedef int32_t int32;
43typedef bool Bool;
44
45#endif
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_buffer.c b/drivers/gpu/drm/vmwgfx/vmwgfx_buffer.c
new file mode 100644
index 000000000000..825ebe3d89d5
--- /dev/null
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_buffer.c
@@ -0,0 +1,252 @@
1/**************************************************************************
2 *
3 * Copyright © 2009 VMware, Inc., Palo Alto, CA., USA
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
21 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
22 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
23 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
24 * USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28#include "vmwgfx_drv.h"
29#include "ttm/ttm_bo_driver.h"
30#include "ttm/ttm_placement.h"
31
32static uint32_t vram_placement_flags = TTM_PL_FLAG_VRAM |
33 TTM_PL_FLAG_CACHED;
34
35static uint32_t vram_ne_placement_flags = TTM_PL_FLAG_VRAM |
36 TTM_PL_FLAG_CACHED |
37 TTM_PL_FLAG_NO_EVICT;
38
39static uint32_t sys_placement_flags = TTM_PL_FLAG_SYSTEM |
40 TTM_PL_FLAG_CACHED;
41
42struct ttm_placement vmw_vram_placement = {
43 .fpfn = 0,
44 .lpfn = 0,
45 .num_placement = 1,
46 .placement = &vram_placement_flags,
47 .num_busy_placement = 1,
48 .busy_placement = &vram_placement_flags
49};
50
51struct ttm_placement vmw_vram_sys_placement = {
52 .fpfn = 0,
53 .lpfn = 0,
54 .num_placement = 1,
55 .placement = &vram_placement_flags,
56 .num_busy_placement = 1,
57 .busy_placement = &sys_placement_flags
58};
59
60struct ttm_placement vmw_vram_ne_placement = {
61 .fpfn = 0,
62 .lpfn = 0,
63 .num_placement = 1,
64 .placement = &vram_ne_placement_flags,
65 .num_busy_placement = 1,
66 .busy_placement = &vram_ne_placement_flags
67};
68
69struct ttm_placement vmw_sys_placement = {
70 .fpfn = 0,
71 .lpfn = 0,
72 .num_placement = 1,
73 .placement = &sys_placement_flags,
74 .num_busy_placement = 1,
75 .busy_placement = &sys_placement_flags
76};
77
78struct vmw_ttm_backend {
79 struct ttm_backend backend;
80};
81
82static int vmw_ttm_populate(struct ttm_backend *backend,
83 unsigned long num_pages, struct page **pages,
84 struct page *dummy_read_page)
85{
86 return 0;
87}
88
89static int vmw_ttm_bind(struct ttm_backend *backend, struct ttm_mem_reg *bo_mem)
90{
91 return 0;
92}
93
94static int vmw_ttm_unbind(struct ttm_backend *backend)
95{
96 return 0;
97}
98
99static void vmw_ttm_clear(struct ttm_backend *backend)
100{
101}
102
103static void vmw_ttm_destroy(struct ttm_backend *backend)
104{
105 struct vmw_ttm_backend *vmw_be =
106 container_of(backend, struct vmw_ttm_backend, backend);
107
108 kfree(vmw_be);
109}
110
111static struct ttm_backend_func vmw_ttm_func = {
112 .populate = vmw_ttm_populate,
113 .clear = vmw_ttm_clear,
114 .bind = vmw_ttm_bind,
115 .unbind = vmw_ttm_unbind,
116 .destroy = vmw_ttm_destroy,
117};
118
119struct ttm_backend *vmw_ttm_backend_init(struct ttm_bo_device *bdev)
120{
121 struct vmw_ttm_backend *vmw_be;
122
123 vmw_be = kmalloc(sizeof(*vmw_be), GFP_KERNEL);
124 if (!vmw_be)
125 return NULL;
126
127 vmw_be->backend.func = &vmw_ttm_func;
128
129 return &vmw_be->backend;
130}
131
132int vmw_invalidate_caches(struct ttm_bo_device *bdev, uint32_t flags)
133{
134 return 0;
135}
136
137int vmw_init_mem_type(struct ttm_bo_device *bdev, uint32_t type,
138 struct ttm_mem_type_manager *man)
139{
140 struct vmw_private *dev_priv =
141 container_of(bdev, struct vmw_private, bdev);
142
143 switch (type) {
144 case TTM_PL_SYSTEM:
145 /* System memory */
146
147 man->flags = TTM_MEMTYPE_FLAG_MAPPABLE;
148 man->available_caching = TTM_PL_MASK_CACHING;
149 man->default_caching = TTM_PL_FLAG_CACHED;
150 break;
151 case TTM_PL_VRAM:
152 /* "On-card" video ram */
153 man->gpu_offset = 0;
154 man->io_offset = dev_priv->vram_start;
155 man->io_size = dev_priv->vram_size;
156 man->flags = TTM_MEMTYPE_FLAG_FIXED |
157 TTM_MEMTYPE_FLAG_NEEDS_IOREMAP | TTM_MEMTYPE_FLAG_MAPPABLE;
158 man->io_addr = NULL;
159 man->available_caching = TTM_PL_MASK_CACHING;
160 man->default_caching = TTM_PL_FLAG_WC;
161 break;
162 default:
163 DRM_ERROR("Unsupported memory type %u\n", (unsigned)type);
164 return -EINVAL;
165 }
166 return 0;
167}
168
169void vmw_evict_flags(struct ttm_buffer_object *bo,
170 struct ttm_placement *placement)
171{
172 *placement = vmw_sys_placement;
173}
174
175/**
176 * FIXME: Proper access checks on buffers.
177 */
178
179static int vmw_verify_access(struct ttm_buffer_object *bo, struct file *filp)
180{
181 return 0;
182}
183
184static void vmw_move_notify(struct ttm_buffer_object *bo,
185 struct ttm_mem_reg *new_mem)
186{
187 if (new_mem->mem_type != TTM_PL_SYSTEM)
188 vmw_dmabuf_gmr_unbind(bo);
189}
190
191static void vmw_swap_notify(struct ttm_buffer_object *bo)
192{
193 vmw_dmabuf_gmr_unbind(bo);
194}
195
196/**
197 * FIXME: We're using the old vmware polling method to sync.
198 * Do this with fences instead.
199 */
200
201static void *vmw_sync_obj_ref(void *sync_obj)
202{
203 return sync_obj;
204}
205
206static void vmw_sync_obj_unref(void **sync_obj)
207{
208 *sync_obj = NULL;
209}
210
211static int vmw_sync_obj_flush(void *sync_obj, void *sync_arg)
212{
213 struct vmw_private *dev_priv = (struct vmw_private *)sync_arg;
214
215 mutex_lock(&dev_priv->hw_mutex);
216 vmw_write(dev_priv, SVGA_REG_SYNC, SVGA_SYNC_GENERIC);
217 mutex_unlock(&dev_priv->hw_mutex);
218 return 0;
219}
220
221static bool vmw_sync_obj_signaled(void *sync_obj, void *sync_arg)
222{
223 struct vmw_private *dev_priv = (struct vmw_private *)sync_arg;
224 uint32_t sequence = (unsigned long) sync_obj;
225
226 return vmw_fence_signaled(dev_priv, sequence);
227}
228
229static int vmw_sync_obj_wait(void *sync_obj, void *sync_arg,
230 bool lazy, bool interruptible)
231{
232 struct vmw_private *dev_priv = (struct vmw_private *)sync_arg;
233 uint32_t sequence = (unsigned long) sync_obj;
234
235 return vmw_wait_fence(dev_priv, false, sequence, false, 3*HZ);
236}
237
238struct ttm_bo_driver vmw_bo_driver = {
239 .create_ttm_backend_entry = vmw_ttm_backend_init,
240 .invalidate_caches = vmw_invalidate_caches,
241 .init_mem_type = vmw_init_mem_type,
242 .evict_flags = vmw_evict_flags,
243 .move = NULL,
244 .verify_access = vmw_verify_access,
245 .sync_obj_signaled = vmw_sync_obj_signaled,
246 .sync_obj_wait = vmw_sync_obj_wait,
247 .sync_obj_flush = vmw_sync_obj_flush,
248 .sync_obj_unref = vmw_sync_obj_unref,
249 .sync_obj_ref = vmw_sync_obj_ref,
250 .move_notify = vmw_move_notify,
251 .swap_notify = vmw_swap_notify
252};
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c b/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c
new file mode 100644
index 000000000000..0c9c0811f42d
--- /dev/null
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c
@@ -0,0 +1,783 @@
1/**************************************************************************
2 *
3 * Copyright © 2009 VMware, Inc., Palo Alto, CA., USA
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
21 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
22 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
23 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
24 * USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28#include "drmP.h"
29#include "vmwgfx_drv.h"
30#include "ttm/ttm_placement.h"
31#include "ttm/ttm_bo_driver.h"
32#include "ttm/ttm_object.h"
33#include "ttm/ttm_module.h"
34
35#define VMWGFX_DRIVER_NAME "vmwgfx"
36#define VMWGFX_DRIVER_DESC "Linux drm driver for VMware graphics devices"
37#define VMWGFX_CHIP_SVGAII 0
38#define VMW_FB_RESERVATION 0
39
40/**
41 * Fully encoded drm commands. Might move to vmw_drm.h
42 */
43
44#define DRM_IOCTL_VMW_GET_PARAM \
45 DRM_IOWR(DRM_COMMAND_BASE + DRM_VMW_GET_PARAM, \
46 struct drm_vmw_getparam_arg)
47#define DRM_IOCTL_VMW_ALLOC_DMABUF \
48 DRM_IOWR(DRM_COMMAND_BASE + DRM_VMW_ALLOC_DMABUF, \
49 union drm_vmw_alloc_dmabuf_arg)
50#define DRM_IOCTL_VMW_UNREF_DMABUF \
51 DRM_IOW(DRM_COMMAND_BASE + DRM_VMW_UNREF_DMABUF, \
52 struct drm_vmw_unref_dmabuf_arg)
53#define DRM_IOCTL_VMW_CURSOR_BYPASS \
54 DRM_IOW(DRM_COMMAND_BASE + DRM_VMW_CURSOR_BYPASS, \
55 struct drm_vmw_cursor_bypass_arg)
56
57#define DRM_IOCTL_VMW_CONTROL_STREAM \
58 DRM_IOW(DRM_COMMAND_BASE + DRM_VMW_CONTROL_STREAM, \
59 struct drm_vmw_control_stream_arg)
60#define DRM_IOCTL_VMW_CLAIM_STREAM \
61 DRM_IOR(DRM_COMMAND_BASE + DRM_VMW_CLAIM_STREAM, \
62 struct drm_vmw_stream_arg)
63#define DRM_IOCTL_VMW_UNREF_STREAM \
64 DRM_IOW(DRM_COMMAND_BASE + DRM_VMW_UNREF_STREAM, \
65 struct drm_vmw_stream_arg)
66
67#define DRM_IOCTL_VMW_CREATE_CONTEXT \
68 DRM_IOR(DRM_COMMAND_BASE + DRM_VMW_CREATE_CONTEXT, \
69 struct drm_vmw_context_arg)
70#define DRM_IOCTL_VMW_UNREF_CONTEXT \
71 DRM_IOW(DRM_COMMAND_BASE + DRM_VMW_UNREF_CONTEXT, \
72 struct drm_vmw_context_arg)
73#define DRM_IOCTL_VMW_CREATE_SURFACE \
74 DRM_IOWR(DRM_COMMAND_BASE + DRM_VMW_CREATE_SURFACE, \
75 union drm_vmw_surface_create_arg)
76#define DRM_IOCTL_VMW_UNREF_SURFACE \
77 DRM_IOW(DRM_COMMAND_BASE + DRM_VMW_UNREF_SURFACE, \
78 struct drm_vmw_surface_arg)
79#define DRM_IOCTL_VMW_REF_SURFACE \
80 DRM_IOWR(DRM_COMMAND_BASE + DRM_VMW_REF_SURFACE, \
81 union drm_vmw_surface_reference_arg)
82#define DRM_IOCTL_VMW_EXECBUF \
83 DRM_IOW(DRM_COMMAND_BASE + DRM_VMW_EXECBUF, \
84 struct drm_vmw_execbuf_arg)
85#define DRM_IOCTL_VMW_FIFO_DEBUG \
86 DRM_IOWR(DRM_COMMAND_BASE + DRM_VMW_FIFO_DEBUG, \
87 struct drm_vmw_fifo_debug_arg)
88#define DRM_IOCTL_VMW_FENCE_WAIT \
89 DRM_IOWR(DRM_COMMAND_BASE + DRM_VMW_FENCE_WAIT, \
90 struct drm_vmw_fence_wait_arg)
91
92
93/**
94 * The core DRM version of this macro doesn't account for
95 * DRM_COMMAND_BASE.
96 */
97
98#define VMW_IOCTL_DEF(ioctl, func, flags) \
99 [DRM_IOCTL_NR(ioctl) - DRM_COMMAND_BASE] = {ioctl, flags, func}
100
101/**
102 * Ioctl definitions.
103 */
104
105static struct drm_ioctl_desc vmw_ioctls[] = {
106 VMW_IOCTL_DEF(DRM_IOCTL_VMW_GET_PARAM, vmw_getparam_ioctl,
107 DRM_AUTH | DRM_UNLOCKED),
108 VMW_IOCTL_DEF(DRM_IOCTL_VMW_ALLOC_DMABUF, vmw_dmabuf_alloc_ioctl,
109 DRM_AUTH | DRM_UNLOCKED),
110 VMW_IOCTL_DEF(DRM_IOCTL_VMW_UNREF_DMABUF, vmw_dmabuf_unref_ioctl,
111 DRM_AUTH | DRM_UNLOCKED),
112 VMW_IOCTL_DEF(DRM_IOCTL_VMW_CURSOR_BYPASS,
113 vmw_kms_cursor_bypass_ioctl,
114 DRM_MASTER | DRM_CONTROL_ALLOW | DRM_UNLOCKED),
115
116 VMW_IOCTL_DEF(DRM_IOCTL_VMW_CONTROL_STREAM, vmw_overlay_ioctl,
117 DRM_MASTER | DRM_CONTROL_ALLOW | DRM_UNLOCKED),
118 VMW_IOCTL_DEF(DRM_IOCTL_VMW_CLAIM_STREAM, vmw_stream_claim_ioctl,
119 DRM_MASTER | DRM_CONTROL_ALLOW | DRM_UNLOCKED),
120 VMW_IOCTL_DEF(DRM_IOCTL_VMW_UNREF_STREAM, vmw_stream_unref_ioctl,
121 DRM_MASTER | DRM_CONTROL_ALLOW | DRM_UNLOCKED),
122
123 VMW_IOCTL_DEF(DRM_IOCTL_VMW_CREATE_CONTEXT, vmw_context_define_ioctl,
124 DRM_AUTH | DRM_UNLOCKED),
125 VMW_IOCTL_DEF(DRM_IOCTL_VMW_UNREF_CONTEXT, vmw_context_destroy_ioctl,
126 DRM_AUTH | DRM_UNLOCKED),
127 VMW_IOCTL_DEF(DRM_IOCTL_VMW_CREATE_SURFACE, vmw_surface_define_ioctl,
128 DRM_AUTH | DRM_UNLOCKED),
129 VMW_IOCTL_DEF(DRM_IOCTL_VMW_UNREF_SURFACE, vmw_surface_destroy_ioctl,
130 DRM_AUTH | DRM_UNLOCKED),
131 VMW_IOCTL_DEF(DRM_IOCTL_VMW_REF_SURFACE, vmw_surface_reference_ioctl,
132 DRM_AUTH | DRM_UNLOCKED),
133 VMW_IOCTL_DEF(DRM_IOCTL_VMW_EXECBUF, vmw_execbuf_ioctl,
134 DRM_AUTH | DRM_UNLOCKED),
135 VMW_IOCTL_DEF(DRM_IOCTL_VMW_FIFO_DEBUG, vmw_fifo_debug_ioctl,
136 DRM_AUTH | DRM_ROOT_ONLY | DRM_MASTER | DRM_UNLOCKED),
137 VMW_IOCTL_DEF(DRM_IOCTL_VMW_FENCE_WAIT, vmw_fence_wait_ioctl,
138 DRM_AUTH | DRM_UNLOCKED)
139};
140
141static struct pci_device_id vmw_pci_id_list[] = {
142 {0x15ad, 0x0405, PCI_ANY_ID, PCI_ANY_ID, 0, 0, VMWGFX_CHIP_SVGAII},
143 {0, 0, 0}
144};
145
146static char *vmw_devname = "vmwgfx";
147
148static int vmw_probe(struct pci_dev *, const struct pci_device_id *);
149static void vmw_master_init(struct vmw_master *);
150static int vmwgfx_pm_notifier(struct notifier_block *nb, unsigned long val,
151 void *ptr);
152
153static void vmw_print_capabilities(uint32_t capabilities)
154{
155 DRM_INFO("Capabilities:\n");
156 if (capabilities & SVGA_CAP_RECT_COPY)
157 DRM_INFO(" Rect copy.\n");
158 if (capabilities & SVGA_CAP_CURSOR)
159 DRM_INFO(" Cursor.\n");
160 if (capabilities & SVGA_CAP_CURSOR_BYPASS)
161 DRM_INFO(" Cursor bypass.\n");
162 if (capabilities & SVGA_CAP_CURSOR_BYPASS_2)
163 DRM_INFO(" Cursor bypass 2.\n");
164 if (capabilities & SVGA_CAP_8BIT_EMULATION)
165 DRM_INFO(" 8bit emulation.\n");
166 if (capabilities & SVGA_CAP_ALPHA_CURSOR)
167 DRM_INFO(" Alpha cursor.\n");
168 if (capabilities & SVGA_CAP_3D)
169 DRM_INFO(" 3D.\n");
170 if (capabilities & SVGA_CAP_EXTENDED_FIFO)
171 DRM_INFO(" Extended Fifo.\n");
172 if (capabilities & SVGA_CAP_MULTIMON)
173 DRM_INFO(" Multimon.\n");
174 if (capabilities & SVGA_CAP_PITCHLOCK)
175 DRM_INFO(" Pitchlock.\n");
176 if (capabilities & SVGA_CAP_IRQMASK)
177 DRM_INFO(" Irq mask.\n");
178 if (capabilities & SVGA_CAP_DISPLAY_TOPOLOGY)
179 DRM_INFO(" Display Topology.\n");
180 if (capabilities & SVGA_CAP_GMR)
181 DRM_INFO(" GMR.\n");
182 if (capabilities & SVGA_CAP_TRACES)
183 DRM_INFO(" Traces.\n");
184}
185
186static int vmw_request_device(struct vmw_private *dev_priv)
187{
188 int ret;
189
190 vmw_kms_save_vga(dev_priv);
191
192 ret = vmw_fifo_init(dev_priv, &dev_priv->fifo);
193 if (unlikely(ret != 0)) {
194 DRM_ERROR("Unable to initialize FIFO.\n");
195 return ret;
196 }
197
198 return 0;
199}
200
201static void vmw_release_device(struct vmw_private *dev_priv)
202{
203 vmw_fifo_release(dev_priv, &dev_priv->fifo);
204 vmw_kms_restore_vga(dev_priv);
205}
206
207
208static int vmw_driver_load(struct drm_device *dev, unsigned long chipset)
209{
210 struct vmw_private *dev_priv;
211 int ret;
212 uint32_t svga_id;
213
214 dev_priv = kzalloc(sizeof(*dev_priv), GFP_KERNEL);
215 if (unlikely(dev_priv == NULL)) {
216 DRM_ERROR("Failed allocating a device private struct.\n");
217 return -ENOMEM;
218 }
219 memset(dev_priv, 0, sizeof(*dev_priv));
220
221 dev_priv->dev = dev;
222 dev_priv->vmw_chipset = chipset;
223 dev_priv->last_read_sequence = (uint32_t) -100;
224 mutex_init(&dev_priv->hw_mutex);
225 mutex_init(&dev_priv->cmdbuf_mutex);
226 rwlock_init(&dev_priv->resource_lock);
227 idr_init(&dev_priv->context_idr);
228 idr_init(&dev_priv->surface_idr);
229 idr_init(&dev_priv->stream_idr);
230 ida_init(&dev_priv->gmr_ida);
231 mutex_init(&dev_priv->init_mutex);
232 init_waitqueue_head(&dev_priv->fence_queue);
233 init_waitqueue_head(&dev_priv->fifo_queue);
234 atomic_set(&dev_priv->fence_queue_waiters, 0);
235 atomic_set(&dev_priv->fifo_queue_waiters, 0);
236 INIT_LIST_HEAD(&dev_priv->gmr_lru);
237
238 dev_priv->io_start = pci_resource_start(dev->pdev, 0);
239 dev_priv->vram_start = pci_resource_start(dev->pdev, 1);
240 dev_priv->mmio_start = pci_resource_start(dev->pdev, 2);
241
242 mutex_lock(&dev_priv->hw_mutex);
243
244 vmw_write(dev_priv, SVGA_REG_ID, SVGA_ID_2);
245 svga_id = vmw_read(dev_priv, SVGA_REG_ID);
246 if (svga_id != SVGA_ID_2) {
247 ret = -ENOSYS;
248 DRM_ERROR("Unsuported SVGA ID 0x%x\n", svga_id);
249 mutex_unlock(&dev_priv->hw_mutex);
250 goto out_err0;
251 }
252
253 dev_priv->capabilities = vmw_read(dev_priv, SVGA_REG_CAPABILITIES);
254
255 if (dev_priv->capabilities & SVGA_CAP_GMR) {
256 dev_priv->max_gmr_descriptors =
257 vmw_read(dev_priv,
258 SVGA_REG_GMR_MAX_DESCRIPTOR_LENGTH);
259 dev_priv->max_gmr_ids =
260 vmw_read(dev_priv, SVGA_REG_GMR_MAX_IDS);
261 }
262
263 dev_priv->vram_size = vmw_read(dev_priv, SVGA_REG_VRAM_SIZE);
264 dev_priv->mmio_size = vmw_read(dev_priv, SVGA_REG_MEM_SIZE);
265 dev_priv->fb_max_width = vmw_read(dev_priv, SVGA_REG_MAX_WIDTH);
266 dev_priv->fb_max_height = vmw_read(dev_priv, SVGA_REG_MAX_HEIGHT);
267
268 mutex_unlock(&dev_priv->hw_mutex);
269
270 vmw_print_capabilities(dev_priv->capabilities);
271
272 if (dev_priv->capabilities & SVGA_CAP_GMR) {
273 DRM_INFO("Max GMR ids is %u\n",
274 (unsigned)dev_priv->max_gmr_ids);
275 DRM_INFO("Max GMR descriptors is %u\n",
276 (unsigned)dev_priv->max_gmr_descriptors);
277 }
278 DRM_INFO("VRAM at 0x%08x size is %u kiB\n",
279 dev_priv->vram_start, dev_priv->vram_size / 1024);
280 DRM_INFO("MMIO at 0x%08x size is %u kiB\n",
281 dev_priv->mmio_start, dev_priv->mmio_size / 1024);
282
283 ret = vmw_ttm_global_init(dev_priv);
284 if (unlikely(ret != 0))
285 goto out_err0;
286
287
288 vmw_master_init(&dev_priv->fbdev_master);
289 ttm_lock_set_kill(&dev_priv->fbdev_master.lock, false, SIGTERM);
290 dev_priv->active_master = &dev_priv->fbdev_master;
291
292
293 ret = ttm_bo_device_init(&dev_priv->bdev,
294 dev_priv->bo_global_ref.ref.object,
295 &vmw_bo_driver, VMWGFX_FILE_PAGE_OFFSET,
296 false);
297 if (unlikely(ret != 0)) {
298 DRM_ERROR("Failed initializing TTM buffer object driver.\n");
299 goto out_err1;
300 }
301
302 ret = ttm_bo_init_mm(&dev_priv->bdev, TTM_PL_VRAM,
303 (dev_priv->vram_size >> PAGE_SHIFT));
304 if (unlikely(ret != 0)) {
305 DRM_ERROR("Failed initializing memory manager for VRAM.\n");
306 goto out_err2;
307 }
308
309 dev_priv->mmio_mtrr = drm_mtrr_add(dev_priv->mmio_start,
310 dev_priv->mmio_size, DRM_MTRR_WC);
311
312 dev_priv->mmio_virt = ioremap_wc(dev_priv->mmio_start,
313 dev_priv->mmio_size);
314
315 if (unlikely(dev_priv->mmio_virt == NULL)) {
316 ret = -ENOMEM;
317 DRM_ERROR("Failed mapping MMIO.\n");
318 goto out_err3;
319 }
320
321 dev_priv->tdev = ttm_object_device_init
322 (dev_priv->mem_global_ref.object, 12);
323
324 if (unlikely(dev_priv->tdev == NULL)) {
325 DRM_ERROR("Unable to initialize TTM object management.\n");
326 ret = -ENOMEM;
327 goto out_err4;
328 }
329
330 dev->dev_private = dev_priv;
331
332 if (!dev->devname)
333 dev->devname = vmw_devname;
334
335 if (dev_priv->capabilities & SVGA_CAP_IRQMASK) {
336 ret = drm_irq_install(dev);
337 if (unlikely(ret != 0)) {
338 DRM_ERROR("Failed installing irq: %d\n", ret);
339 goto out_no_irq;
340 }
341 }
342
343 ret = pci_request_regions(dev->pdev, "vmwgfx probe");
344 dev_priv->stealth = (ret != 0);
345 if (dev_priv->stealth) {
346 /**
347 * Request at least the mmio PCI resource.
348 */
349
350 DRM_INFO("It appears like vesafb is loaded. "
351 "Ignore above error if any.\n");
352 ret = pci_request_region(dev->pdev, 2, "vmwgfx stealth probe");
353 if (unlikely(ret != 0)) {
354 DRM_ERROR("Failed reserving the SVGA MMIO resource.\n");
355 goto out_no_device;
356 }
357 }
358 ret = vmw_request_device(dev_priv);
359 if (unlikely(ret != 0))
360 goto out_no_device;
361 vmw_kms_init(dev_priv);
362 vmw_overlay_init(dev_priv);
363 vmw_fb_init(dev_priv);
364
365 dev_priv->pm_nb.notifier_call = vmwgfx_pm_notifier;
366 register_pm_notifier(&dev_priv->pm_nb);
367
368 DRM_INFO("%s", vmw_fifo_have_3d(dev_priv) ? "Have 3D\n" : "No 3D\n");
369
370 return 0;
371
372out_no_device:
373 if (dev_priv->capabilities & SVGA_CAP_IRQMASK)
374 drm_irq_uninstall(dev_priv->dev);
375 if (dev->devname == vmw_devname)
376 dev->devname = NULL;
377out_no_irq:
378 ttm_object_device_release(&dev_priv->tdev);
379out_err4:
380 iounmap(dev_priv->mmio_virt);
381out_err3:
382 drm_mtrr_del(dev_priv->mmio_mtrr, dev_priv->mmio_start,
383 dev_priv->mmio_size, DRM_MTRR_WC);
384 (void)ttm_bo_clean_mm(&dev_priv->bdev, TTM_PL_VRAM);
385out_err2:
386 (void)ttm_bo_device_release(&dev_priv->bdev);
387out_err1:
388 vmw_ttm_global_release(dev_priv);
389out_err0:
390 ida_destroy(&dev_priv->gmr_ida);
391 idr_destroy(&dev_priv->surface_idr);
392 idr_destroy(&dev_priv->context_idr);
393 idr_destroy(&dev_priv->stream_idr);
394 kfree(dev_priv);
395 return ret;
396}
397
398static int vmw_driver_unload(struct drm_device *dev)
399{
400 struct vmw_private *dev_priv = vmw_priv(dev);
401
402 DRM_INFO(VMWGFX_DRIVER_NAME " unload.\n");
403
404 unregister_pm_notifier(&dev_priv->pm_nb);
405
406 vmw_fb_close(dev_priv);
407 vmw_kms_close(dev_priv);
408 vmw_overlay_close(dev_priv);
409 vmw_release_device(dev_priv);
410 if (dev_priv->stealth)
411 pci_release_region(dev->pdev, 2);
412 else
413 pci_release_regions(dev->pdev);
414
415 if (dev_priv->capabilities & SVGA_CAP_IRQMASK)
416 drm_irq_uninstall(dev_priv->dev);
417 if (dev->devname == vmw_devname)
418 dev->devname = NULL;
419 ttm_object_device_release(&dev_priv->tdev);
420 iounmap(dev_priv->mmio_virt);
421 drm_mtrr_del(dev_priv->mmio_mtrr, dev_priv->mmio_start,
422 dev_priv->mmio_size, DRM_MTRR_WC);
423 (void)ttm_bo_clean_mm(&dev_priv->bdev, TTM_PL_VRAM);
424 (void)ttm_bo_device_release(&dev_priv->bdev);
425 vmw_ttm_global_release(dev_priv);
426 ida_destroy(&dev_priv->gmr_ida);
427 idr_destroy(&dev_priv->surface_idr);
428 idr_destroy(&dev_priv->context_idr);
429 idr_destroy(&dev_priv->stream_idr);
430
431 kfree(dev_priv);
432
433 return 0;
434}
435
436static void vmw_postclose(struct drm_device *dev,
437 struct drm_file *file_priv)
438{
439 struct vmw_fpriv *vmw_fp;
440
441 vmw_fp = vmw_fpriv(file_priv);
442 ttm_object_file_release(&vmw_fp->tfile);
443 if (vmw_fp->locked_master)
444 drm_master_put(&vmw_fp->locked_master);
445 kfree(vmw_fp);
446}
447
448static int vmw_driver_open(struct drm_device *dev, struct drm_file *file_priv)
449{
450 struct vmw_private *dev_priv = vmw_priv(dev);
451 struct vmw_fpriv *vmw_fp;
452 int ret = -ENOMEM;
453
454 vmw_fp = kzalloc(sizeof(*vmw_fp), GFP_KERNEL);
455 if (unlikely(vmw_fp == NULL))
456 return ret;
457
458 vmw_fp->tfile = ttm_object_file_init(dev_priv->tdev, 10);
459 if (unlikely(vmw_fp->tfile == NULL))
460 goto out_no_tfile;
461
462 file_priv->driver_priv = vmw_fp;
463
464 if (unlikely(dev_priv->bdev.dev_mapping == NULL))
465 dev_priv->bdev.dev_mapping =
466 file_priv->filp->f_path.dentry->d_inode->i_mapping;
467
468 return 0;
469
470out_no_tfile:
471 kfree(vmw_fp);
472 return ret;
473}
474
475static long vmw_unlocked_ioctl(struct file *filp, unsigned int cmd,
476 unsigned long arg)
477{
478 struct drm_file *file_priv = filp->private_data;
479 struct drm_device *dev = file_priv->minor->dev;
480 unsigned int nr = DRM_IOCTL_NR(cmd);
481
482 /*
483 * Do extra checking on driver private ioctls.
484 */
485
486 if ((nr >= DRM_COMMAND_BASE) && (nr < DRM_COMMAND_END)
487 && (nr < DRM_COMMAND_BASE + dev->driver->num_ioctls)) {
488 struct drm_ioctl_desc *ioctl =
489 &vmw_ioctls[nr - DRM_COMMAND_BASE];
490
491 if (unlikely(ioctl->cmd != cmd)) {
492 DRM_ERROR("Invalid command format, ioctl %d\n",
493 nr - DRM_COMMAND_BASE);
494 return -EINVAL;
495 }
496 }
497
498 return drm_ioctl(filp, cmd, arg);
499}
500
501static int vmw_firstopen(struct drm_device *dev)
502{
503 struct vmw_private *dev_priv = vmw_priv(dev);
504 dev_priv->is_opened = true;
505
506 return 0;
507}
508
509static void vmw_lastclose(struct drm_device *dev)
510{
511 struct vmw_private *dev_priv = vmw_priv(dev);
512 struct drm_crtc *crtc;
513 struct drm_mode_set set;
514 int ret;
515
516 /**
517 * Do nothing on the lastclose call from drm_unload.
518 */
519
520 if (!dev_priv->is_opened)
521 return;
522
523 dev_priv->is_opened = false;
524 set.x = 0;
525 set.y = 0;
526 set.fb = NULL;
527 set.mode = NULL;
528 set.connectors = NULL;
529 set.num_connectors = 0;
530
531 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
532 set.crtc = crtc;
533 ret = crtc->funcs->set_config(&set);
534 WARN_ON(ret != 0);
535 }
536
537}
538
539static void vmw_master_init(struct vmw_master *vmaster)
540{
541 ttm_lock_init(&vmaster->lock);
542}
543
544static int vmw_master_create(struct drm_device *dev,
545 struct drm_master *master)
546{
547 struct vmw_master *vmaster;
548
549 DRM_INFO("Master create.\n");
550 vmaster = kzalloc(sizeof(*vmaster), GFP_KERNEL);
551 if (unlikely(vmaster == NULL))
552 return -ENOMEM;
553
554 ttm_lock_init(&vmaster->lock);
555 ttm_lock_set_kill(&vmaster->lock, true, SIGTERM);
556 master->driver_priv = vmaster;
557
558 return 0;
559}
560
561static void vmw_master_destroy(struct drm_device *dev,
562 struct drm_master *master)
563{
564 struct vmw_master *vmaster = vmw_master(master);
565
566 DRM_INFO("Master destroy.\n");
567 master->driver_priv = NULL;
568 kfree(vmaster);
569}
570
571
572static int vmw_master_set(struct drm_device *dev,
573 struct drm_file *file_priv,
574 bool from_open)
575{
576 struct vmw_private *dev_priv = vmw_priv(dev);
577 struct vmw_fpriv *vmw_fp = vmw_fpriv(file_priv);
578 struct vmw_master *active = dev_priv->active_master;
579 struct vmw_master *vmaster = vmw_master(file_priv->master);
580 int ret = 0;
581
582 DRM_INFO("Master set.\n");
583
584 if (active) {
585 BUG_ON(active != &dev_priv->fbdev_master);
586 ret = ttm_vt_lock(&active->lock, false, vmw_fp->tfile);
587 if (unlikely(ret != 0))
588 goto out_no_active_lock;
589
590 ttm_lock_set_kill(&active->lock, true, SIGTERM);
591 ret = ttm_bo_evict_mm(&dev_priv->bdev, TTM_PL_VRAM);
592 if (unlikely(ret != 0)) {
593 DRM_ERROR("Unable to clean VRAM on "
594 "master drop.\n");
595 }
596
597 dev_priv->active_master = NULL;
598 }
599
600 ttm_lock_set_kill(&vmaster->lock, false, SIGTERM);
601 if (!from_open) {
602 ttm_vt_unlock(&vmaster->lock);
603 BUG_ON(vmw_fp->locked_master != file_priv->master);
604 drm_master_put(&vmw_fp->locked_master);
605 }
606
607 dev_priv->active_master = vmaster;
608
609 return 0;
610
611out_no_active_lock:
612 vmw_release_device(dev_priv);
613 return ret;
614}
615
616static void vmw_master_drop(struct drm_device *dev,
617 struct drm_file *file_priv,
618 bool from_release)
619{
620 struct vmw_private *dev_priv = vmw_priv(dev);
621 struct vmw_fpriv *vmw_fp = vmw_fpriv(file_priv);
622 struct vmw_master *vmaster = vmw_master(file_priv->master);
623 int ret;
624
625 DRM_INFO("Master drop.\n");
626
627 /**
628 * Make sure the master doesn't disappear while we have
629 * it locked.
630 */
631
632 vmw_fp->locked_master = drm_master_get(file_priv->master);
633 ret = ttm_vt_lock(&vmaster->lock, false, vmw_fp->tfile);
634
635 if (unlikely((ret != 0))) {
636 DRM_ERROR("Unable to lock TTM at VT switch.\n");
637 drm_master_put(&vmw_fp->locked_master);
638 }
639
640 ttm_lock_set_kill(&vmaster->lock, true, SIGTERM);
641
642 dev_priv->active_master = &dev_priv->fbdev_master;
643 ttm_lock_set_kill(&dev_priv->fbdev_master.lock, false, SIGTERM);
644 ttm_vt_unlock(&dev_priv->fbdev_master.lock);
645
646 vmw_fb_on(dev_priv);
647}
648
649
650static void vmw_remove(struct pci_dev *pdev)
651{
652 struct drm_device *dev = pci_get_drvdata(pdev);
653
654 drm_put_dev(dev);
655}
656
657static int vmwgfx_pm_notifier(struct notifier_block *nb, unsigned long val,
658 void *ptr)
659{
660 struct vmw_private *dev_priv =
661 container_of(nb, struct vmw_private, pm_nb);
662 struct vmw_master *vmaster = dev_priv->active_master;
663
664 switch (val) {
665 case PM_HIBERNATION_PREPARE:
666 case PM_SUSPEND_PREPARE:
667 ttm_suspend_lock(&vmaster->lock);
668
669 /**
670 * This empties VRAM and unbinds all GMR bindings.
671 * Buffer contents is moved to swappable memory.
672 */
673 ttm_bo_swapout_all(&dev_priv->bdev);
674 break;
675 case PM_POST_HIBERNATION:
676 case PM_POST_SUSPEND:
677 ttm_suspend_unlock(&vmaster->lock);
678 break;
679 case PM_RESTORE_PREPARE:
680 break;
681 case PM_POST_RESTORE:
682 break;
683 default:
684 break;
685 }
686 return 0;
687}
688
689/**
690 * These might not be needed with the virtual SVGA device.
691 */
692
693int vmw_pci_suspend(struct pci_dev *pdev, pm_message_t state)
694{
695 pci_save_state(pdev);
696 pci_disable_device(pdev);
697 pci_set_power_state(pdev, PCI_D3hot);
698 return 0;
699}
700
701int vmw_pci_resume(struct pci_dev *pdev)
702{
703 pci_set_power_state(pdev, PCI_D0);
704 pci_restore_state(pdev);
705 return pci_enable_device(pdev);
706}
707
708static struct drm_driver driver = {
709 .driver_features = DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED |
710 DRIVER_MODESET,
711 .load = vmw_driver_load,
712 .unload = vmw_driver_unload,
713 .firstopen = vmw_firstopen,
714 .lastclose = vmw_lastclose,
715 .irq_preinstall = vmw_irq_preinstall,
716 .irq_postinstall = vmw_irq_postinstall,
717 .irq_uninstall = vmw_irq_uninstall,
718 .irq_handler = vmw_irq_handler,
719 .reclaim_buffers_locked = NULL,
720 .get_map_ofs = drm_core_get_map_ofs,
721 .get_reg_ofs = drm_core_get_reg_ofs,
722 .ioctls = vmw_ioctls,
723 .num_ioctls = DRM_ARRAY_SIZE(vmw_ioctls),
724 .dma_quiescent = NULL, /*vmw_dma_quiescent, */
725 .master_create = vmw_master_create,
726 .master_destroy = vmw_master_destroy,
727 .master_set = vmw_master_set,
728 .master_drop = vmw_master_drop,
729 .open = vmw_driver_open,
730 .postclose = vmw_postclose,
731 .fops = {
732 .owner = THIS_MODULE,
733 .open = drm_open,
734 .release = drm_release,
735 .unlocked_ioctl = vmw_unlocked_ioctl,
736 .mmap = vmw_mmap,
737 .poll = drm_poll,
738 .fasync = drm_fasync,
739#if defined(CONFIG_COMPAT)
740 .compat_ioctl = drm_compat_ioctl,
741#endif
742 },
743 .pci_driver = {
744 .name = VMWGFX_DRIVER_NAME,
745 .id_table = vmw_pci_id_list,
746 .probe = vmw_probe,
747 .remove = vmw_remove,
748 .suspend = vmw_pci_suspend,
749 .resume = vmw_pci_resume
750 },
751 .name = VMWGFX_DRIVER_NAME,
752 .desc = VMWGFX_DRIVER_DESC,
753 .date = VMWGFX_DRIVER_DATE,
754 .major = VMWGFX_DRIVER_MAJOR,
755 .minor = VMWGFX_DRIVER_MINOR,
756 .patchlevel = VMWGFX_DRIVER_PATCHLEVEL
757};
758
759static int vmw_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
760{
761 return drm_get_dev(pdev, ent, &driver);
762}
763
764static int __init vmwgfx_init(void)
765{
766 int ret;
767 ret = drm_init(&driver);
768 if (ret)
769 DRM_ERROR("Failed initializing DRM.\n");
770 return ret;
771}
772
773static void __exit vmwgfx_exit(void)
774{
775 drm_exit(&driver);
776}
777
778module_init(vmwgfx_init);
779module_exit(vmwgfx_exit);
780
781MODULE_AUTHOR("VMware Inc. and others");
782MODULE_DESCRIPTION("Standalone drm driver for the VMware SVGA device");
783MODULE_LICENSE("GPL and additional rights");
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_drv.h b/drivers/gpu/drm/vmwgfx/vmwgfx_drv.h
new file mode 100644
index 000000000000..356dc935ec13
--- /dev/null
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_drv.h
@@ -0,0 +1,521 @@
1/**************************************************************************
2 *
3 * Copyright © 2009 VMware, Inc., Palo Alto, CA., USA
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
21 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
22 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
23 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
24 * USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28#ifndef _VMWGFX_DRV_H_
29#define _VMWGFX_DRV_H_
30
31#include "vmwgfx_reg.h"
32#include "drmP.h"
33#include "vmwgfx_drm.h"
34#include "drm_hashtab.h"
35#include "linux/suspend.h"
36#include "ttm/ttm_bo_driver.h"
37#include "ttm/ttm_object.h"
38#include "ttm/ttm_lock.h"
39#include "ttm/ttm_execbuf_util.h"
40#include "ttm/ttm_module.h"
41
42#define VMWGFX_DRIVER_DATE "20100209"
43#define VMWGFX_DRIVER_MAJOR 1
44#define VMWGFX_DRIVER_MINOR 0
45#define VMWGFX_DRIVER_PATCHLEVEL 0
46#define VMWGFX_FILE_PAGE_OFFSET 0x00100000
47#define VMWGFX_FIFO_STATIC_SIZE (1024*1024)
48#define VMWGFX_MAX_RELOCATIONS 2048
49#define VMWGFX_MAX_GMRS 2048
50
51struct vmw_fpriv {
52 struct drm_master *locked_master;
53 struct ttm_object_file *tfile;
54};
55
56struct vmw_dma_buffer {
57 struct ttm_buffer_object base;
58 struct list_head validate_list;
59 struct list_head gmr_lru;
60 uint32_t gmr_id;
61 bool gmr_bound;
62 uint32_t cur_validate_node;
63 bool on_validate_list;
64};
65
66struct vmw_resource {
67 struct kref kref;
68 struct vmw_private *dev_priv;
69 struct idr *idr;
70 int id;
71 enum ttm_object_type res_type;
72 bool avail;
73 void (*hw_destroy) (struct vmw_resource *res);
74 void (*res_free) (struct vmw_resource *res);
75
76 /* TODO is a generic snooper needed? */
77#if 0
78 void (*snoop)(struct vmw_resource *res,
79 struct ttm_object_file *tfile,
80 SVGA3dCmdHeader *header);
81 void *snoop_priv;
82#endif
83};
84
85struct vmw_cursor_snooper {
86 struct drm_crtc *crtc;
87 size_t age;
88 uint32_t *image;
89};
90
91struct vmw_surface {
92 struct vmw_resource res;
93 uint32_t flags;
94 uint32_t format;
95 uint32_t mip_levels[DRM_VMW_MAX_SURFACE_FACES];
96 struct drm_vmw_size *sizes;
97 uint32_t num_sizes;
98
99 bool scanout;
100
101 /* TODO so far just a extra pointer */
102 struct vmw_cursor_snooper snooper;
103};
104
105struct vmw_fifo_state {
106 unsigned long reserved_size;
107 __le32 *dynamic_buffer;
108 __le32 *static_buffer;
109 __le32 *last_buffer;
110 uint32_t last_data_size;
111 uint32_t last_buffer_size;
112 bool last_buffer_add;
113 unsigned long static_buffer_size;
114 bool using_bounce_buffer;
115 uint32_t capabilities;
116 struct mutex fifo_mutex;
117 struct rw_semaphore rwsem;
118};
119
120struct vmw_relocation {
121 SVGAGuestPtr *location;
122 uint32_t index;
123};
124
125struct vmw_sw_context{
126 struct ida bo_list;
127 uint32_t last_cid;
128 bool cid_valid;
129 uint32_t last_sid;
130 uint32_t sid_translation;
131 bool sid_valid;
132 struct ttm_object_file *tfile;
133 struct list_head validate_nodes;
134 struct vmw_relocation relocs[VMWGFX_MAX_RELOCATIONS];
135 uint32_t cur_reloc;
136 struct ttm_validate_buffer val_bufs[VMWGFX_MAX_GMRS];
137 uint32_t cur_val_buf;
138};
139
140struct vmw_legacy_display;
141struct vmw_overlay;
142
143struct vmw_master {
144 struct ttm_lock lock;
145};
146
147struct vmw_private {
148 struct ttm_bo_device bdev;
149 struct ttm_bo_global_ref bo_global_ref;
150 struct ttm_global_reference mem_global_ref;
151
152 struct vmw_fifo_state fifo;
153
154 struct drm_device *dev;
155 unsigned long vmw_chipset;
156 unsigned int io_start;
157 uint32_t vram_start;
158 uint32_t vram_size;
159 uint32_t mmio_start;
160 uint32_t mmio_size;
161 uint32_t fb_max_width;
162 uint32_t fb_max_height;
163 __le32 __iomem *mmio_virt;
164 int mmio_mtrr;
165 uint32_t capabilities;
166 uint32_t max_gmr_descriptors;
167 uint32_t max_gmr_ids;
168 struct mutex hw_mutex;
169
170 /*
171 * VGA registers.
172 */
173
174 uint32_t vga_width;
175 uint32_t vga_height;
176 uint32_t vga_depth;
177 uint32_t vga_bpp;
178 uint32_t vga_pseudo;
179 uint32_t vga_red_mask;
180 uint32_t vga_blue_mask;
181 uint32_t vga_green_mask;
182
183 /*
184 * Framebuffer info.
185 */
186
187 void *fb_info;
188 struct vmw_legacy_display *ldu_priv;
189 struct vmw_overlay *overlay_priv;
190
191 /*
192 * Context and surface management.
193 */
194
195 rwlock_t resource_lock;
196 struct idr context_idr;
197 struct idr surface_idr;
198 struct idr stream_idr;
199
200 /*
201 * Block lastclose from racing with firstopen.
202 */
203
204 struct mutex init_mutex;
205
206 /*
207 * A resource manager for kernel-only surfaces and
208 * contexts.
209 */
210
211 struct ttm_object_device *tdev;
212
213 /*
214 * Fencing and IRQs.
215 */
216
217 atomic_t fence_seq;
218 wait_queue_head_t fence_queue;
219 wait_queue_head_t fifo_queue;
220 atomic_t fence_queue_waiters;
221 atomic_t fifo_queue_waiters;
222 uint32_t last_read_sequence;
223 spinlock_t irq_lock;
224
225 /*
226 * Device state
227 */
228
229 uint32_t traces_state;
230 uint32_t enable_state;
231 uint32_t config_done_state;
232
233 /**
234 * Execbuf
235 */
236 /**
237 * Protected by the cmdbuf mutex.
238 */
239
240 struct vmw_sw_context ctx;
241 uint32_t val_seq;
242 struct mutex cmdbuf_mutex;
243
244 /**
245 * GMR management. Protected by the lru spinlock.
246 */
247
248 struct ida gmr_ida;
249 struct list_head gmr_lru;
250
251
252 /**
253 * Operating mode.
254 */
255
256 bool stealth;
257 bool is_opened;
258
259 /**
260 * Master management.
261 */
262
263 struct vmw_master *active_master;
264 struct vmw_master fbdev_master;
265 struct notifier_block pm_nb;
266};
267
268static inline struct vmw_private *vmw_priv(struct drm_device *dev)
269{
270 return (struct vmw_private *)dev->dev_private;
271}
272
273static inline struct vmw_fpriv *vmw_fpriv(struct drm_file *file_priv)
274{
275 return (struct vmw_fpriv *)file_priv->driver_priv;
276}
277
278static inline struct vmw_master *vmw_master(struct drm_master *master)
279{
280 return (struct vmw_master *) master->driver_priv;
281}
282
283static inline void vmw_write(struct vmw_private *dev_priv,
284 unsigned int offset, uint32_t value)
285{
286 outl(offset, dev_priv->io_start + VMWGFX_INDEX_PORT);
287 outl(value, dev_priv->io_start + VMWGFX_VALUE_PORT);
288}
289
290static inline uint32_t vmw_read(struct vmw_private *dev_priv,
291 unsigned int offset)
292{
293 uint32_t val;
294
295 outl(offset, dev_priv->io_start + VMWGFX_INDEX_PORT);
296 val = inl(dev_priv->io_start + VMWGFX_VALUE_PORT);
297 return val;
298}
299
300/**
301 * GMR utilities - vmwgfx_gmr.c
302 */
303
304extern int vmw_gmr_bind(struct vmw_private *dev_priv,
305 struct ttm_buffer_object *bo);
306extern void vmw_gmr_unbind(struct vmw_private *dev_priv, int gmr_id);
307
308/**
309 * Resource utilities - vmwgfx_resource.c
310 */
311
312extern struct vmw_resource *vmw_context_alloc(struct vmw_private *dev_priv);
313extern void vmw_resource_unreference(struct vmw_resource **p_res);
314extern struct vmw_resource *vmw_resource_reference(struct vmw_resource *res);
315extern int vmw_context_destroy_ioctl(struct drm_device *dev, void *data,
316 struct drm_file *file_priv);
317extern int vmw_context_define_ioctl(struct drm_device *dev, void *data,
318 struct drm_file *file_priv);
319extern int vmw_context_check(struct vmw_private *dev_priv,
320 struct ttm_object_file *tfile,
321 int id);
322extern void vmw_surface_res_free(struct vmw_resource *res);
323extern int vmw_surface_init(struct vmw_private *dev_priv,
324 struct vmw_surface *srf,
325 void (*res_free) (struct vmw_resource *res));
326extern int vmw_user_surface_lookup_handle(struct vmw_private *dev_priv,
327 struct ttm_object_file *tfile,
328 uint32_t handle,
329 struct vmw_surface **out);
330extern int vmw_surface_destroy_ioctl(struct drm_device *dev, void *data,
331 struct drm_file *file_priv);
332extern int vmw_surface_define_ioctl(struct drm_device *dev, void *data,
333 struct drm_file *file_priv);
334extern int vmw_surface_reference_ioctl(struct drm_device *dev, void *data,
335 struct drm_file *file_priv);
336extern int vmw_surface_check(struct vmw_private *dev_priv,
337 struct ttm_object_file *tfile,
338 uint32_t handle, int *id);
339extern void vmw_dmabuf_bo_free(struct ttm_buffer_object *bo);
340extern int vmw_dmabuf_init(struct vmw_private *dev_priv,
341 struct vmw_dma_buffer *vmw_bo,
342 size_t size, struct ttm_placement *placement,
343 bool interuptable,
344 void (*bo_free) (struct ttm_buffer_object *bo));
345extern int vmw_dmabuf_alloc_ioctl(struct drm_device *dev, void *data,
346 struct drm_file *file_priv);
347extern int vmw_dmabuf_unref_ioctl(struct drm_device *dev, void *data,
348 struct drm_file *file_priv);
349extern uint32_t vmw_dmabuf_validate_node(struct ttm_buffer_object *bo,
350 uint32_t cur_validate_node);
351extern void vmw_dmabuf_validate_clear(struct ttm_buffer_object *bo);
352extern int vmw_user_dmabuf_lookup(struct ttm_object_file *tfile,
353 uint32_t id, struct vmw_dma_buffer **out);
354extern uint32_t vmw_dmabuf_gmr(struct ttm_buffer_object *bo);
355extern void vmw_dmabuf_set_gmr(struct ttm_buffer_object *bo, uint32_t id);
356extern int vmw_gmr_id_alloc(struct vmw_private *dev_priv, uint32_t *p_id);
357extern int vmw_dmabuf_to_start_of_vram(struct vmw_private *vmw_priv,
358 struct vmw_dma_buffer *bo);
359extern int vmw_dmabuf_from_vram(struct vmw_private *vmw_priv,
360 struct vmw_dma_buffer *bo);
361extern void vmw_dmabuf_gmr_unbind(struct ttm_buffer_object *bo);
362extern int vmw_stream_claim_ioctl(struct drm_device *dev, void *data,
363 struct drm_file *file_priv);
364extern int vmw_stream_unref_ioctl(struct drm_device *dev, void *data,
365 struct drm_file *file_priv);
366extern int vmw_user_stream_lookup(struct vmw_private *dev_priv,
367 struct ttm_object_file *tfile,
368 uint32_t *inout_id,
369 struct vmw_resource **out);
370
371
372/**
373 * Misc Ioctl functionality - vmwgfx_ioctl.c
374 */
375
376extern int vmw_getparam_ioctl(struct drm_device *dev, void *data,
377 struct drm_file *file_priv);
378extern int vmw_fifo_debug_ioctl(struct drm_device *dev, void *data,
379 struct drm_file *file_priv);
380
381/**
382 * Fifo utilities - vmwgfx_fifo.c
383 */
384
385extern int vmw_fifo_init(struct vmw_private *dev_priv,
386 struct vmw_fifo_state *fifo);
387extern void vmw_fifo_release(struct vmw_private *dev_priv,
388 struct vmw_fifo_state *fifo);
389extern void *vmw_fifo_reserve(struct vmw_private *dev_priv, uint32_t bytes);
390extern void vmw_fifo_commit(struct vmw_private *dev_priv, uint32_t bytes);
391extern int vmw_fifo_send_fence(struct vmw_private *dev_priv,
392 uint32_t *sequence);
393extern void vmw_fifo_ping_host(struct vmw_private *dev_priv, uint32_t reason);
394extern int vmw_fifo_mmap(struct file *filp, struct vm_area_struct *vma);
395extern bool vmw_fifo_have_3d(struct vmw_private *dev_priv);
396
397/**
398 * TTM glue - vmwgfx_ttm_glue.c
399 */
400
401extern int vmw_ttm_global_init(struct vmw_private *dev_priv);
402extern void vmw_ttm_global_release(struct vmw_private *dev_priv);
403extern int vmw_mmap(struct file *filp, struct vm_area_struct *vma);
404
405/**
406 * TTM buffer object driver - vmwgfx_buffer.c
407 */
408
409extern struct ttm_placement vmw_vram_placement;
410extern struct ttm_placement vmw_vram_ne_placement;
411extern struct ttm_placement vmw_vram_sys_placement;
412extern struct ttm_placement vmw_sys_placement;
413extern struct ttm_bo_driver vmw_bo_driver;
414extern int vmw_dma_quiescent(struct drm_device *dev);
415
416/**
417 * Command submission - vmwgfx_execbuf.c
418 */
419
420extern int vmw_execbuf_ioctl(struct drm_device *dev, void *data,
421 struct drm_file *file_priv);
422
423/**
424 * IRQs and wating - vmwgfx_irq.c
425 */
426
427extern irqreturn_t vmw_irq_handler(DRM_IRQ_ARGS);
428extern int vmw_wait_fence(struct vmw_private *dev_priv, bool lazy,
429 uint32_t sequence, bool interruptible,
430 unsigned long timeout);
431extern void vmw_irq_preinstall(struct drm_device *dev);
432extern int vmw_irq_postinstall(struct drm_device *dev);
433extern void vmw_irq_uninstall(struct drm_device *dev);
434extern bool vmw_fence_signaled(struct vmw_private *dev_priv,
435 uint32_t sequence);
436extern int vmw_fence_wait_ioctl(struct drm_device *dev, void *data,
437 struct drm_file *file_priv);
438extern int vmw_fallback_wait(struct vmw_private *dev_priv,
439 bool lazy,
440 bool fifo_idle,
441 uint32_t sequence,
442 bool interruptible,
443 unsigned long timeout);
444
445/**
446 * Kernel framebuffer - vmwgfx_fb.c
447 */
448
449int vmw_fb_init(struct vmw_private *vmw_priv);
450int vmw_fb_close(struct vmw_private *dev_priv);
451int vmw_fb_off(struct vmw_private *vmw_priv);
452int vmw_fb_on(struct vmw_private *vmw_priv);
453
454/**
455 * Kernel modesetting - vmwgfx_kms.c
456 */
457
458int vmw_kms_init(struct vmw_private *dev_priv);
459int vmw_kms_close(struct vmw_private *dev_priv);
460int vmw_kms_save_vga(struct vmw_private *vmw_priv);
461int vmw_kms_restore_vga(struct vmw_private *vmw_priv);
462int vmw_kms_cursor_bypass_ioctl(struct drm_device *dev, void *data,
463 struct drm_file *file_priv);
464void vmw_kms_cursor_post_execbuf(struct vmw_private *dev_priv);
465void vmw_kms_cursor_snoop(struct vmw_surface *srf,
466 struct ttm_object_file *tfile,
467 struct ttm_buffer_object *bo,
468 SVGA3dCmdHeader *header);
469
470/**
471 * Overlay control - vmwgfx_overlay.c
472 */
473
474int vmw_overlay_init(struct vmw_private *dev_priv);
475int vmw_overlay_close(struct vmw_private *dev_priv);
476int vmw_overlay_ioctl(struct drm_device *dev, void *data,
477 struct drm_file *file_priv);
478int vmw_overlay_stop_all(struct vmw_private *dev_priv);
479int vmw_overlay_resume_all(struct vmw_private *dev_priv);
480int vmw_overlay_pause_all(struct vmw_private *dev_priv);
481int vmw_overlay_claim(struct vmw_private *dev_priv, uint32_t *out);
482int vmw_overlay_unref(struct vmw_private *dev_priv, uint32_t stream_id);
483int vmw_overlay_num_overlays(struct vmw_private *dev_priv);
484int vmw_overlay_num_free_overlays(struct vmw_private *dev_priv);
485
486/**
487 * Inline helper functions
488 */
489
490static inline void vmw_surface_unreference(struct vmw_surface **srf)
491{
492 struct vmw_surface *tmp_srf = *srf;
493 struct vmw_resource *res = &tmp_srf->res;
494 *srf = NULL;
495
496 vmw_resource_unreference(&res);
497}
498
499static inline struct vmw_surface *vmw_surface_reference(struct vmw_surface *srf)
500{
501 (void) vmw_resource_reference(&srf->res);
502 return srf;
503}
504
505static inline void vmw_dmabuf_unreference(struct vmw_dma_buffer **buf)
506{
507 struct vmw_dma_buffer *tmp_buf = *buf;
508 struct ttm_buffer_object *bo = &tmp_buf->base;
509 *buf = NULL;
510
511 ttm_bo_unref(&bo);
512}
513
514static inline struct vmw_dma_buffer *vmw_dmabuf_reference(struct vmw_dma_buffer *buf)
515{
516 if (ttm_bo_reference(&buf->base))
517 return buf;
518 return NULL;
519}
520
521#endif
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c b/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c
new file mode 100644
index 000000000000..0897359b3e4e
--- /dev/null
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c
@@ -0,0 +1,716 @@
1/**************************************************************************
2 *
3 * Copyright © 2009 VMware, Inc., Palo Alto, CA., USA
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
21 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
22 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
23 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
24 * USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28#include "vmwgfx_drv.h"
29#include "vmwgfx_reg.h"
30#include "ttm/ttm_bo_api.h"
31#include "ttm/ttm_placement.h"
32
33static int vmw_cmd_invalid(struct vmw_private *dev_priv,
34 struct vmw_sw_context *sw_context,
35 SVGA3dCmdHeader *header)
36{
37 return capable(CAP_SYS_ADMIN) ? : -EINVAL;
38}
39
40static int vmw_cmd_ok(struct vmw_private *dev_priv,
41 struct vmw_sw_context *sw_context,
42 SVGA3dCmdHeader *header)
43{
44 return 0;
45}
46
47static int vmw_cmd_cid_check(struct vmw_private *dev_priv,
48 struct vmw_sw_context *sw_context,
49 SVGA3dCmdHeader *header)
50{
51 struct vmw_cid_cmd {
52 SVGA3dCmdHeader header;
53 __le32 cid;
54 } *cmd;
55 int ret;
56
57 cmd = container_of(header, struct vmw_cid_cmd, header);
58 if (likely(sw_context->cid_valid && cmd->cid == sw_context->last_cid))
59 return 0;
60
61 ret = vmw_context_check(dev_priv, sw_context->tfile, cmd->cid);
62 if (unlikely(ret != 0)) {
63 DRM_ERROR("Could not find or use context %u\n",
64 (unsigned) cmd->cid);
65 return ret;
66 }
67
68 sw_context->last_cid = cmd->cid;
69 sw_context->cid_valid = true;
70
71 return 0;
72}
73
74static int vmw_cmd_sid_check(struct vmw_private *dev_priv,
75 struct vmw_sw_context *sw_context,
76 uint32_t *sid)
77{
78 if (*sid == SVGA3D_INVALID_ID)
79 return 0;
80
81 if (unlikely((!sw_context->sid_valid ||
82 *sid != sw_context->last_sid))) {
83 int real_id;
84 int ret = vmw_surface_check(dev_priv, sw_context->tfile,
85 *sid, &real_id);
86
87 if (unlikely(ret != 0)) {
88 DRM_ERROR("Could ot find or use surface 0x%08x "
89 "address 0x%08lx\n",
90 (unsigned int) *sid,
91 (unsigned long) sid);
92 return ret;
93 }
94
95 sw_context->last_sid = *sid;
96 sw_context->sid_valid = true;
97 *sid = real_id;
98 sw_context->sid_translation = real_id;
99 } else
100 *sid = sw_context->sid_translation;
101
102 return 0;
103}
104
105
106static int vmw_cmd_set_render_target_check(struct vmw_private *dev_priv,
107 struct vmw_sw_context *sw_context,
108 SVGA3dCmdHeader *header)
109{
110 struct vmw_sid_cmd {
111 SVGA3dCmdHeader header;
112 SVGA3dCmdSetRenderTarget body;
113 } *cmd;
114 int ret;
115
116 ret = vmw_cmd_cid_check(dev_priv, sw_context, header);
117 if (unlikely(ret != 0))
118 return ret;
119
120 cmd = container_of(header, struct vmw_sid_cmd, header);
121 ret = vmw_cmd_sid_check(dev_priv, sw_context, &cmd->body.target.sid);
122 return ret;
123}
124
125static int vmw_cmd_surface_copy_check(struct vmw_private *dev_priv,
126 struct vmw_sw_context *sw_context,
127 SVGA3dCmdHeader *header)
128{
129 struct vmw_sid_cmd {
130 SVGA3dCmdHeader header;
131 SVGA3dCmdSurfaceCopy body;
132 } *cmd;
133 int ret;
134
135 cmd = container_of(header, struct vmw_sid_cmd, header);
136 ret = vmw_cmd_sid_check(dev_priv, sw_context, &cmd->body.src.sid);
137 if (unlikely(ret != 0))
138 return ret;
139 return vmw_cmd_sid_check(dev_priv, sw_context, &cmd->body.dest.sid);
140}
141
142static int vmw_cmd_stretch_blt_check(struct vmw_private *dev_priv,
143 struct vmw_sw_context *sw_context,
144 SVGA3dCmdHeader *header)
145{
146 struct vmw_sid_cmd {
147 SVGA3dCmdHeader header;
148 SVGA3dCmdSurfaceStretchBlt body;
149 } *cmd;
150 int ret;
151
152 cmd = container_of(header, struct vmw_sid_cmd, header);
153 ret = vmw_cmd_sid_check(dev_priv, sw_context, &cmd->body.src.sid);
154 if (unlikely(ret != 0))
155 return ret;
156 return vmw_cmd_sid_check(dev_priv, sw_context, &cmd->body.dest.sid);
157}
158
159static int vmw_cmd_blt_surf_screen_check(struct vmw_private *dev_priv,
160 struct vmw_sw_context *sw_context,
161 SVGA3dCmdHeader *header)
162{
163 struct vmw_sid_cmd {
164 SVGA3dCmdHeader header;
165 SVGA3dCmdBlitSurfaceToScreen body;
166 } *cmd;
167
168 cmd = container_of(header, struct vmw_sid_cmd, header);
169 return vmw_cmd_sid_check(dev_priv, sw_context, &cmd->body.srcImage.sid);
170}
171
172static int vmw_cmd_present_check(struct vmw_private *dev_priv,
173 struct vmw_sw_context *sw_context,
174 SVGA3dCmdHeader *header)
175{
176 struct vmw_sid_cmd {
177 SVGA3dCmdHeader header;
178 SVGA3dCmdPresent body;
179 } *cmd;
180
181 cmd = container_of(header, struct vmw_sid_cmd, header);
182 return vmw_cmd_sid_check(dev_priv, sw_context, &cmd->body.sid);
183}
184
185static int vmw_translate_guest_ptr(struct vmw_private *dev_priv,
186 struct vmw_sw_context *sw_context,
187 SVGAGuestPtr *ptr,
188 struct vmw_dma_buffer **vmw_bo_p)
189{
190 struct vmw_dma_buffer *vmw_bo = NULL;
191 struct ttm_buffer_object *bo;
192 uint32_t handle = ptr->gmrId;
193 struct vmw_relocation *reloc;
194 uint32_t cur_validate_node;
195 struct ttm_validate_buffer *val_buf;
196 int ret;
197
198 ret = vmw_user_dmabuf_lookup(sw_context->tfile, handle, &vmw_bo);
199 if (unlikely(ret != 0)) {
200 DRM_ERROR("Could not find or use GMR region.\n");
201 return -EINVAL;
202 }
203 bo = &vmw_bo->base;
204
205 if (unlikely(sw_context->cur_reloc >= VMWGFX_MAX_RELOCATIONS)) {
206 DRM_ERROR("Max number relocations per submission"
207 " exceeded\n");
208 ret = -EINVAL;
209 goto out_no_reloc;
210 }
211
212 reloc = &sw_context->relocs[sw_context->cur_reloc++];
213 reloc->location = ptr;
214
215 cur_validate_node = vmw_dmabuf_validate_node(bo, sw_context->cur_val_buf);
216 if (unlikely(cur_validate_node >= VMWGFX_MAX_GMRS)) {
217 DRM_ERROR("Max number of DMA buffers per submission"
218 " exceeded.\n");
219 ret = -EINVAL;
220 goto out_no_reloc;
221 }
222
223 reloc->index = cur_validate_node;
224 if (unlikely(cur_validate_node == sw_context->cur_val_buf)) {
225 val_buf = &sw_context->val_bufs[cur_validate_node];
226 val_buf->bo = ttm_bo_reference(bo);
227 val_buf->new_sync_obj_arg = (void *) dev_priv;
228 list_add_tail(&val_buf->head, &sw_context->validate_nodes);
229 ++sw_context->cur_val_buf;
230 }
231 *vmw_bo_p = vmw_bo;
232 return 0;
233
234out_no_reloc:
235 vmw_dmabuf_unreference(&vmw_bo);
236 vmw_bo_p = NULL;
237 return ret;
238}
239
240static int vmw_cmd_end_query(struct vmw_private *dev_priv,
241 struct vmw_sw_context *sw_context,
242 SVGA3dCmdHeader *header)
243{
244 struct vmw_dma_buffer *vmw_bo;
245 struct vmw_query_cmd {
246 SVGA3dCmdHeader header;
247 SVGA3dCmdEndQuery q;
248 } *cmd;
249 int ret;
250
251 cmd = container_of(header, struct vmw_query_cmd, header);
252 ret = vmw_cmd_cid_check(dev_priv, sw_context, header);
253 if (unlikely(ret != 0))
254 return ret;
255
256 ret = vmw_translate_guest_ptr(dev_priv, sw_context,
257 &cmd->q.guestResult,
258 &vmw_bo);
259 if (unlikely(ret != 0))
260 return ret;
261
262 vmw_dmabuf_unreference(&vmw_bo);
263 return 0;
264}
265
266static int vmw_cmd_wait_query(struct vmw_private *dev_priv,
267 struct vmw_sw_context *sw_context,
268 SVGA3dCmdHeader *header)
269{
270 struct vmw_dma_buffer *vmw_bo;
271 struct vmw_query_cmd {
272 SVGA3dCmdHeader header;
273 SVGA3dCmdWaitForQuery q;
274 } *cmd;
275 int ret;
276
277 cmd = container_of(header, struct vmw_query_cmd, header);
278 ret = vmw_cmd_cid_check(dev_priv, sw_context, header);
279 if (unlikely(ret != 0))
280 return ret;
281
282 ret = vmw_translate_guest_ptr(dev_priv, sw_context,
283 &cmd->q.guestResult,
284 &vmw_bo);
285 if (unlikely(ret != 0))
286 return ret;
287
288 vmw_dmabuf_unreference(&vmw_bo);
289 return 0;
290}
291
292
293static int vmw_cmd_dma(struct vmw_private *dev_priv,
294 struct vmw_sw_context *sw_context,
295 SVGA3dCmdHeader *header)
296{
297 struct vmw_dma_buffer *vmw_bo = NULL;
298 struct ttm_buffer_object *bo;
299 struct vmw_surface *srf = NULL;
300 struct vmw_dma_cmd {
301 SVGA3dCmdHeader header;
302 SVGA3dCmdSurfaceDMA dma;
303 } *cmd;
304 int ret;
305
306 cmd = container_of(header, struct vmw_dma_cmd, header);
307 ret = vmw_translate_guest_ptr(dev_priv, sw_context,
308 &cmd->dma.guest.ptr,
309 &vmw_bo);
310 if (unlikely(ret != 0))
311 return ret;
312
313 bo = &vmw_bo->base;
314 ret = vmw_user_surface_lookup_handle(dev_priv, sw_context->tfile,
315 cmd->dma.host.sid, &srf);
316 if (ret) {
317 DRM_ERROR("could not find surface\n");
318 goto out_no_reloc;
319 }
320
321 /**
322 * Patch command stream with device SID.
323 */
324
325 cmd->dma.host.sid = srf->res.id;
326 vmw_kms_cursor_snoop(srf, sw_context->tfile, bo, header);
327 /**
328 * FIXME: May deadlock here when called from the
329 * command parsing code.
330 */
331 vmw_surface_unreference(&srf);
332
333out_no_reloc:
334 vmw_dmabuf_unreference(&vmw_bo);
335 return ret;
336}
337
338static int vmw_cmd_draw(struct vmw_private *dev_priv,
339 struct vmw_sw_context *sw_context,
340 SVGA3dCmdHeader *header)
341{
342 struct vmw_draw_cmd {
343 SVGA3dCmdHeader header;
344 SVGA3dCmdDrawPrimitives body;
345 } *cmd;
346 SVGA3dVertexDecl *decl = (SVGA3dVertexDecl *)(
347 (unsigned long)header + sizeof(*cmd));
348 SVGA3dPrimitiveRange *range;
349 uint32_t i;
350 uint32_t maxnum;
351 int ret;
352
353 ret = vmw_cmd_cid_check(dev_priv, sw_context, header);
354 if (unlikely(ret != 0))
355 return ret;
356
357 cmd = container_of(header, struct vmw_draw_cmd, header);
358 maxnum = (header->size - sizeof(cmd->body)) / sizeof(*decl);
359
360 if (unlikely(cmd->body.numVertexDecls > maxnum)) {
361 DRM_ERROR("Illegal number of vertex declarations.\n");
362 return -EINVAL;
363 }
364
365 for (i = 0; i < cmd->body.numVertexDecls; ++i, ++decl) {
366 ret = vmw_cmd_sid_check(dev_priv, sw_context,
367 &decl->array.surfaceId);
368 if (unlikely(ret != 0))
369 return ret;
370 }
371
372 maxnum = (header->size - sizeof(cmd->body) -
373 cmd->body.numVertexDecls * sizeof(*decl)) / sizeof(*range);
374 if (unlikely(cmd->body.numRanges > maxnum)) {
375 DRM_ERROR("Illegal number of index ranges.\n");
376 return -EINVAL;
377 }
378
379 range = (SVGA3dPrimitiveRange *) decl;
380 for (i = 0; i < cmd->body.numRanges; ++i, ++range) {
381 ret = vmw_cmd_sid_check(dev_priv, sw_context,
382 &range->indexArray.surfaceId);
383 if (unlikely(ret != 0))
384 return ret;
385 }
386 return 0;
387}
388
389
390static int vmw_cmd_tex_state(struct vmw_private *dev_priv,
391 struct vmw_sw_context *sw_context,
392 SVGA3dCmdHeader *header)
393{
394 struct vmw_tex_state_cmd {
395 SVGA3dCmdHeader header;
396 SVGA3dCmdSetTextureState state;
397 };
398
399 SVGA3dTextureState *last_state = (SVGA3dTextureState *)
400 ((unsigned long) header + header->size + sizeof(header));
401 SVGA3dTextureState *cur_state = (SVGA3dTextureState *)
402 ((unsigned long) header + sizeof(struct vmw_tex_state_cmd));
403 int ret;
404
405 ret = vmw_cmd_cid_check(dev_priv, sw_context, header);
406 if (unlikely(ret != 0))
407 return ret;
408
409 for (; cur_state < last_state; ++cur_state) {
410 if (likely(cur_state->name != SVGA3D_TS_BIND_TEXTURE))
411 continue;
412
413 ret = vmw_cmd_sid_check(dev_priv, sw_context,
414 &cur_state->value);
415 if (unlikely(ret != 0))
416 return ret;
417 }
418
419 return 0;
420}
421
422
423typedef int (*vmw_cmd_func) (struct vmw_private *,
424 struct vmw_sw_context *,
425 SVGA3dCmdHeader *);
426
427#define VMW_CMD_DEF(cmd, func) \
428 [cmd - SVGA_3D_CMD_BASE] = func
429
430static vmw_cmd_func vmw_cmd_funcs[SVGA_3D_CMD_MAX] = {
431 VMW_CMD_DEF(SVGA_3D_CMD_SURFACE_DEFINE, &vmw_cmd_invalid),
432 VMW_CMD_DEF(SVGA_3D_CMD_SURFACE_DESTROY, &vmw_cmd_invalid),
433 VMW_CMD_DEF(SVGA_3D_CMD_SURFACE_COPY, &vmw_cmd_surface_copy_check),
434 VMW_CMD_DEF(SVGA_3D_CMD_SURFACE_STRETCHBLT, &vmw_cmd_stretch_blt_check),
435 VMW_CMD_DEF(SVGA_3D_CMD_SURFACE_DMA, &vmw_cmd_dma),
436 VMW_CMD_DEF(SVGA_3D_CMD_CONTEXT_DEFINE, &vmw_cmd_invalid),
437 VMW_CMD_DEF(SVGA_3D_CMD_CONTEXT_DESTROY, &vmw_cmd_invalid),
438 VMW_CMD_DEF(SVGA_3D_CMD_SETTRANSFORM, &vmw_cmd_cid_check),
439 VMW_CMD_DEF(SVGA_3D_CMD_SETZRANGE, &vmw_cmd_cid_check),
440 VMW_CMD_DEF(SVGA_3D_CMD_SETRENDERSTATE, &vmw_cmd_cid_check),
441 VMW_CMD_DEF(SVGA_3D_CMD_SETRENDERTARGET,
442 &vmw_cmd_set_render_target_check),
443 VMW_CMD_DEF(SVGA_3D_CMD_SETTEXTURESTATE, &vmw_cmd_tex_state),
444 VMW_CMD_DEF(SVGA_3D_CMD_SETMATERIAL, &vmw_cmd_cid_check),
445 VMW_CMD_DEF(SVGA_3D_CMD_SETLIGHTDATA, &vmw_cmd_cid_check),
446 VMW_CMD_DEF(SVGA_3D_CMD_SETLIGHTENABLED, &vmw_cmd_cid_check),
447 VMW_CMD_DEF(SVGA_3D_CMD_SETVIEWPORT, &vmw_cmd_cid_check),
448 VMW_CMD_DEF(SVGA_3D_CMD_SETCLIPPLANE, &vmw_cmd_cid_check),
449 VMW_CMD_DEF(SVGA_3D_CMD_CLEAR, &vmw_cmd_cid_check),
450 VMW_CMD_DEF(SVGA_3D_CMD_PRESENT, &vmw_cmd_present_check),
451 VMW_CMD_DEF(SVGA_3D_CMD_SHADER_DEFINE, &vmw_cmd_cid_check),
452 VMW_CMD_DEF(SVGA_3D_CMD_SHADER_DESTROY, &vmw_cmd_cid_check),
453 VMW_CMD_DEF(SVGA_3D_CMD_SET_SHADER, &vmw_cmd_cid_check),
454 VMW_CMD_DEF(SVGA_3D_CMD_SET_SHADER_CONST, &vmw_cmd_cid_check),
455 VMW_CMD_DEF(SVGA_3D_CMD_DRAW_PRIMITIVES, &vmw_cmd_draw),
456 VMW_CMD_DEF(SVGA_3D_CMD_SETSCISSORRECT, &vmw_cmd_cid_check),
457 VMW_CMD_DEF(SVGA_3D_CMD_BEGIN_QUERY, &vmw_cmd_cid_check),
458 VMW_CMD_DEF(SVGA_3D_CMD_END_QUERY, &vmw_cmd_end_query),
459 VMW_CMD_DEF(SVGA_3D_CMD_WAIT_FOR_QUERY, &vmw_cmd_wait_query),
460 VMW_CMD_DEF(SVGA_3D_CMD_PRESENT_READBACK, &vmw_cmd_ok),
461 VMW_CMD_DEF(SVGA_3D_CMD_BLIT_SURFACE_TO_SCREEN,
462 &vmw_cmd_blt_surf_screen_check)
463};
464
465static int vmw_cmd_check(struct vmw_private *dev_priv,
466 struct vmw_sw_context *sw_context,
467 void *buf, uint32_t *size)
468{
469 uint32_t cmd_id;
470 uint32_t size_remaining = *size;
471 SVGA3dCmdHeader *header = (SVGA3dCmdHeader *) buf;
472 int ret;
473
474 cmd_id = ((uint32_t *)buf)[0];
475 if (cmd_id == SVGA_CMD_UPDATE) {
476 *size = 5 << 2;
477 return 0;
478 }
479
480 cmd_id = le32_to_cpu(header->id);
481 *size = le32_to_cpu(header->size) + sizeof(SVGA3dCmdHeader);
482
483 cmd_id -= SVGA_3D_CMD_BASE;
484 if (unlikely(*size > size_remaining))
485 goto out_err;
486
487 if (unlikely(cmd_id >= SVGA_3D_CMD_MAX - SVGA_3D_CMD_BASE))
488 goto out_err;
489
490 ret = vmw_cmd_funcs[cmd_id](dev_priv, sw_context, header);
491 if (unlikely(ret != 0))
492 goto out_err;
493
494 return 0;
495out_err:
496 DRM_ERROR("Illegal / Invalid SVGA3D command: %d\n",
497 cmd_id + SVGA_3D_CMD_BASE);
498 return -EINVAL;
499}
500
501static int vmw_cmd_check_all(struct vmw_private *dev_priv,
502 struct vmw_sw_context *sw_context,
503 void *buf, uint32_t size)
504{
505 int32_t cur_size = size;
506 int ret;
507
508 while (cur_size > 0) {
509 size = cur_size;
510 ret = vmw_cmd_check(dev_priv, sw_context, buf, &size);
511 if (unlikely(ret != 0))
512 return ret;
513 buf = (void *)((unsigned long) buf + size);
514 cur_size -= size;
515 }
516
517 if (unlikely(cur_size != 0)) {
518 DRM_ERROR("Command verifier out of sync.\n");
519 return -EINVAL;
520 }
521
522 return 0;
523}
524
525static void vmw_free_relocations(struct vmw_sw_context *sw_context)
526{
527 sw_context->cur_reloc = 0;
528}
529
530static void vmw_apply_relocations(struct vmw_sw_context *sw_context)
531{
532 uint32_t i;
533 struct vmw_relocation *reloc;
534 struct ttm_validate_buffer *validate;
535 struct ttm_buffer_object *bo;
536
537 for (i = 0; i < sw_context->cur_reloc; ++i) {
538 reloc = &sw_context->relocs[i];
539 validate = &sw_context->val_bufs[reloc->index];
540 bo = validate->bo;
541 reloc->location->offset += bo->offset;
542 reloc->location->gmrId = vmw_dmabuf_gmr(bo);
543 }
544 vmw_free_relocations(sw_context);
545}
546
547static void vmw_clear_validations(struct vmw_sw_context *sw_context)
548{
549 struct ttm_validate_buffer *entry, *next;
550
551 list_for_each_entry_safe(entry, next, &sw_context->validate_nodes,
552 head) {
553 list_del(&entry->head);
554 vmw_dmabuf_validate_clear(entry->bo);
555 ttm_bo_unref(&entry->bo);
556 sw_context->cur_val_buf--;
557 }
558 BUG_ON(sw_context->cur_val_buf != 0);
559}
560
561static int vmw_validate_single_buffer(struct vmw_private *dev_priv,
562 struct ttm_buffer_object *bo)
563{
564 int ret;
565
566 if (vmw_dmabuf_gmr(bo) != SVGA_GMR_NULL)
567 return 0;
568
569 /**
570 * Put BO in VRAM, only if there is space.
571 */
572
573 ret = ttm_bo_validate(bo, &vmw_vram_sys_placement, true, false);
574 if (unlikely(ret == -ERESTARTSYS))
575 return ret;
576
577 /**
578 * Otherwise, set it up as GMR.
579 */
580
581 if (vmw_dmabuf_gmr(bo) != SVGA_GMR_NULL)
582 return 0;
583
584 ret = vmw_gmr_bind(dev_priv, bo);
585 if (likely(ret == 0 || ret == -ERESTARTSYS))
586 return ret;
587
588 /**
589 * If that failed, try VRAM again, this time evicting
590 * previous contents.
591 */
592
593 ret = ttm_bo_validate(bo, &vmw_vram_placement, true, false);
594 return ret;
595}
596
597
598static int vmw_validate_buffers(struct vmw_private *dev_priv,
599 struct vmw_sw_context *sw_context)
600{
601 struct ttm_validate_buffer *entry;
602 int ret;
603
604 list_for_each_entry(entry, &sw_context->validate_nodes, head) {
605 ret = vmw_validate_single_buffer(dev_priv, entry->bo);
606 if (unlikely(ret != 0))
607 return ret;
608 }
609 return 0;
610}
611
612int vmw_execbuf_ioctl(struct drm_device *dev, void *data,
613 struct drm_file *file_priv)
614{
615 struct vmw_private *dev_priv = vmw_priv(dev);
616 struct drm_vmw_execbuf_arg *arg = (struct drm_vmw_execbuf_arg *)data;
617 struct drm_vmw_fence_rep fence_rep;
618 struct drm_vmw_fence_rep __user *user_fence_rep;
619 int ret;
620 void *user_cmd;
621 void *cmd;
622 uint32_t sequence;
623 struct vmw_sw_context *sw_context = &dev_priv->ctx;
624 struct vmw_master *vmaster = vmw_master(file_priv->master);
625
626 ret = ttm_read_lock(&vmaster->lock, true);
627 if (unlikely(ret != 0))
628 return ret;
629
630 ret = mutex_lock_interruptible(&dev_priv->cmdbuf_mutex);
631 if (unlikely(ret != 0)) {
632 ret = -ERESTARTSYS;
633 goto out_no_cmd_mutex;
634 }
635
636 cmd = vmw_fifo_reserve(dev_priv, arg->command_size);
637 if (unlikely(cmd == NULL)) {
638 DRM_ERROR("Failed reserving fifo space for commands.\n");
639 ret = -ENOMEM;
640 goto out_unlock;
641 }
642
643 user_cmd = (void __user *)(unsigned long)arg->commands;
644 ret = copy_from_user(cmd, user_cmd, arg->command_size);
645
646 if (unlikely(ret != 0)) {
647 DRM_ERROR("Failed copying commands.\n");
648 goto out_commit;
649 }
650
651 sw_context->tfile = vmw_fpriv(file_priv)->tfile;
652 sw_context->cid_valid = false;
653 sw_context->sid_valid = false;
654 sw_context->cur_reloc = 0;
655 sw_context->cur_val_buf = 0;
656
657 INIT_LIST_HEAD(&sw_context->validate_nodes);
658
659 ret = vmw_cmd_check_all(dev_priv, sw_context, cmd, arg->command_size);
660 if (unlikely(ret != 0))
661 goto out_err;
662 ret = ttm_eu_reserve_buffers(&sw_context->validate_nodes,
663 dev_priv->val_seq++);
664 if (unlikely(ret != 0))
665 goto out_err;
666
667 ret = vmw_validate_buffers(dev_priv, sw_context);
668 if (unlikely(ret != 0))
669 goto out_err;
670
671 vmw_apply_relocations(sw_context);
672 vmw_fifo_commit(dev_priv, arg->command_size);
673
674 ret = vmw_fifo_send_fence(dev_priv, &sequence);
675
676 ttm_eu_fence_buffer_objects(&sw_context->validate_nodes,
677 (void *)(unsigned long) sequence);
678 vmw_clear_validations(sw_context);
679 mutex_unlock(&dev_priv->cmdbuf_mutex);
680
681 /*
682 * This error is harmless, because if fence submission fails,
683 * vmw_fifo_send_fence will sync.
684 */
685
686 if (ret != 0)
687 DRM_ERROR("Fence submission error. Syncing.\n");
688
689 fence_rep.error = ret;
690 fence_rep.fence_seq = (uint64_t) sequence;
691
692 user_fence_rep = (struct drm_vmw_fence_rep __user *)
693 (unsigned long)arg->fence_rep;
694
695 /*
696 * copy_to_user errors will be detected by user space not
697 * seeing fence_rep::error filled in.
698 */
699
700 ret = copy_to_user(user_fence_rep, &fence_rep, sizeof(fence_rep));
701
702 vmw_kms_cursor_post_execbuf(dev_priv);
703 ttm_read_unlock(&vmaster->lock);
704 return 0;
705out_err:
706 vmw_free_relocations(sw_context);
707 ttm_eu_backoff_reservation(&sw_context->validate_nodes);
708 vmw_clear_validations(sw_context);
709out_commit:
710 vmw_fifo_commit(dev_priv, 0);
711out_unlock:
712 mutex_unlock(&dev_priv->cmdbuf_mutex);
713out_no_cmd_mutex:
714 ttm_read_unlock(&vmaster->lock);
715 return ret;
716}
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_fb.c b/drivers/gpu/drm/vmwgfx/vmwgfx_fb.c
new file mode 100644
index 000000000000..a93367041cdc
--- /dev/null
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_fb.c
@@ -0,0 +1,737 @@
1/**************************************************************************
2 *
3 * Copyright © 2007 David Airlie
4 * Copyright © 2009 VMware, Inc., Palo Alto, CA., USA
5 * All Rights Reserved.
6 *
7 * Permission is hereby granted, free of charge, to any person obtaining a
8 * copy of this software and associated documentation files (the
9 * "Software"), to deal in the Software without restriction, including
10 * without limitation the rights to use, copy, modify, merge, publish,
11 * distribute, sub license, and/or sell copies of the Software, and to
12 * permit persons to whom the Software is furnished to do so, subject to
13 * the following conditions:
14 *
15 * The above copyright notice and this permission notice (including the
16 * next paragraph) shall be included in all copies or substantial portions
17 * of the Software.
18 *
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
22 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
23 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
24 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
25 * USE OR OTHER DEALINGS IN THE SOFTWARE.
26 *
27 **************************************************************************/
28
29#include "drmP.h"
30#include "vmwgfx_drv.h"
31
32#include "ttm/ttm_placement.h"
33
34#define VMW_DIRTY_DELAY (HZ / 30)
35
36struct vmw_fb_par {
37 struct vmw_private *vmw_priv;
38
39 void *vmalloc;
40
41 struct vmw_dma_buffer *vmw_bo;
42 struct ttm_bo_kmap_obj map;
43
44 u32 pseudo_palette[17];
45
46 unsigned depth;
47 unsigned bpp;
48
49 unsigned max_width;
50 unsigned max_height;
51
52 void *bo_ptr;
53 unsigned bo_size;
54 bool bo_iowrite;
55
56 struct {
57 spinlock_t lock;
58 bool active;
59 unsigned x1;
60 unsigned y1;
61 unsigned x2;
62 unsigned y2;
63 } dirty;
64};
65
66static int vmw_fb_setcolreg(unsigned regno, unsigned red, unsigned green,
67 unsigned blue, unsigned transp,
68 struct fb_info *info)
69{
70 struct vmw_fb_par *par = info->par;
71 u32 *pal = par->pseudo_palette;
72
73 if (regno > 15) {
74 DRM_ERROR("Bad regno %u.\n", regno);
75 return 1;
76 }
77
78 switch (par->depth) {
79 case 24:
80 case 32:
81 pal[regno] = ((red & 0xff00) << 8) |
82 (green & 0xff00) |
83 ((blue & 0xff00) >> 8);
84 break;
85 default:
86 DRM_ERROR("Bad depth %u, bpp %u.\n", par->depth, par->bpp);
87 return 1;
88 }
89
90 return 0;
91}
92
93static int vmw_fb_check_var(struct fb_var_screeninfo *var,
94 struct fb_info *info)
95{
96 int depth = var->bits_per_pixel;
97 struct vmw_fb_par *par = info->par;
98 struct vmw_private *vmw_priv = par->vmw_priv;
99
100 switch (var->bits_per_pixel) {
101 case 32:
102 depth = (var->transp.length > 0) ? 32 : 24;
103 break;
104 default:
105 DRM_ERROR("Bad bpp %u.\n", var->bits_per_pixel);
106 return -EINVAL;
107 }
108
109 switch (depth) {
110 case 24:
111 var->red.offset = 16;
112 var->green.offset = 8;
113 var->blue.offset = 0;
114 var->red.length = 8;
115 var->green.length = 8;
116 var->blue.length = 8;
117 var->transp.length = 0;
118 var->transp.offset = 0;
119 break;
120 case 32:
121 var->red.offset = 16;
122 var->green.offset = 8;
123 var->blue.offset = 0;
124 var->red.length = 8;
125 var->green.length = 8;
126 var->blue.length = 8;
127 var->transp.length = 8;
128 var->transp.offset = 24;
129 break;
130 default:
131 DRM_ERROR("Bad depth %u.\n", depth);
132 return -EINVAL;
133 }
134
135 /* without multimon its hard to resize */
136 if (!(vmw_priv->capabilities & SVGA_CAP_MULTIMON) &&
137 (var->xres != par->max_width ||
138 var->yres != par->max_height)) {
139 DRM_ERROR("Tried to resize, but we don't have multimon\n");
140 return -EINVAL;
141 }
142
143 if (var->xres > par->max_width ||
144 var->yres > par->max_height) {
145 DRM_ERROR("Requested geom can not fit in framebuffer\n");
146 return -EINVAL;
147 }
148
149 return 0;
150}
151
152static int vmw_fb_set_par(struct fb_info *info)
153{
154 struct vmw_fb_par *par = info->par;
155 struct vmw_private *vmw_priv = par->vmw_priv;
156
157 if (vmw_priv->capabilities & SVGA_CAP_MULTIMON) {
158 vmw_write(vmw_priv, SVGA_REG_NUM_GUEST_DISPLAYS, 1);
159 vmw_write(vmw_priv, SVGA_REG_DISPLAY_ID, 0);
160 vmw_write(vmw_priv, SVGA_REG_DISPLAY_IS_PRIMARY, true);
161 vmw_write(vmw_priv, SVGA_REG_DISPLAY_POSITION_X, 0);
162 vmw_write(vmw_priv, SVGA_REG_DISPLAY_POSITION_Y, 0);
163 vmw_write(vmw_priv, SVGA_REG_DISPLAY_WIDTH, 0);
164 vmw_write(vmw_priv, SVGA_REG_DISPLAY_HEIGHT, 0);
165 vmw_write(vmw_priv, SVGA_REG_DISPLAY_ID, SVGA_ID_INVALID);
166
167 vmw_write(vmw_priv, SVGA_REG_ENABLE, 1);
168 vmw_write(vmw_priv, SVGA_REG_WIDTH, par->max_width);
169 vmw_write(vmw_priv, SVGA_REG_HEIGHT, par->max_height);
170 vmw_write(vmw_priv, SVGA_REG_BITS_PER_PIXEL, par->bpp);
171 vmw_write(vmw_priv, SVGA_REG_DEPTH, par->depth);
172 vmw_write(vmw_priv, SVGA_REG_RED_MASK, 0x00ff0000);
173 vmw_write(vmw_priv, SVGA_REG_GREEN_MASK, 0x0000ff00);
174 vmw_write(vmw_priv, SVGA_REG_BLUE_MASK, 0x000000ff);
175
176 /* TODO check if pitch and offset changes */
177
178 vmw_write(vmw_priv, SVGA_REG_NUM_GUEST_DISPLAYS, 1);
179 vmw_write(vmw_priv, SVGA_REG_DISPLAY_ID, 0);
180 vmw_write(vmw_priv, SVGA_REG_DISPLAY_IS_PRIMARY, true);
181 vmw_write(vmw_priv, SVGA_REG_DISPLAY_POSITION_X, info->var.xoffset);
182 vmw_write(vmw_priv, SVGA_REG_DISPLAY_POSITION_Y, info->var.yoffset);
183 vmw_write(vmw_priv, SVGA_REG_DISPLAY_WIDTH, info->var.xres);
184 vmw_write(vmw_priv, SVGA_REG_DISPLAY_HEIGHT, info->var.yres);
185 vmw_write(vmw_priv, SVGA_REG_DISPLAY_ID, SVGA_ID_INVALID);
186 } else {
187 vmw_write(vmw_priv, SVGA_REG_WIDTH, info->var.xres);
188 vmw_write(vmw_priv, SVGA_REG_HEIGHT, info->var.yres);
189
190 /* TODO check if pitch and offset changes */
191 }
192
193 return 0;
194}
195
196static int vmw_fb_pan_display(struct fb_var_screeninfo *var,
197 struct fb_info *info)
198{
199 return 0;
200}
201
202static int vmw_fb_blank(int blank, struct fb_info *info)
203{
204 return 0;
205}
206
207/*
208 * Dirty code
209 */
210
211static void vmw_fb_dirty_flush(struct vmw_fb_par *par)
212{
213 struct vmw_private *vmw_priv = par->vmw_priv;
214 struct fb_info *info = vmw_priv->fb_info;
215 int stride = (info->fix.line_length / 4);
216 int *src = (int *)info->screen_base;
217 __le32 __iomem *vram_mem = par->bo_ptr;
218 unsigned long flags;
219 unsigned x, y, w, h;
220 int i, k;
221 struct {
222 uint32_t header;
223 SVGAFifoCmdUpdate body;
224 } *cmd;
225
226 spin_lock_irqsave(&par->dirty.lock, flags);
227 if (!par->dirty.active) {
228 spin_unlock_irqrestore(&par->dirty.lock, flags);
229 return;
230 }
231 x = par->dirty.x1;
232 y = par->dirty.y1;
233 w = min(par->dirty.x2, info->var.xres) - x;
234 h = min(par->dirty.y2, info->var.yres) - y;
235 par->dirty.x1 = par->dirty.x2 = 0;
236 par->dirty.y1 = par->dirty.y2 = 0;
237 spin_unlock_irqrestore(&par->dirty.lock, flags);
238
239 for (i = y * stride; i < info->fix.smem_len / 4; i += stride) {
240 for (k = i+x; k < i+x+w && k < info->fix.smem_len / 4; k++)
241 iowrite32(src[k], vram_mem + k);
242 }
243
244#if 0
245 DRM_INFO("%s, (%u, %u) (%ux%u)\n", __func__, x, y, w, h);
246#endif
247
248 cmd = vmw_fifo_reserve(vmw_priv, sizeof(*cmd));
249 if (unlikely(cmd == NULL)) {
250 DRM_ERROR("Fifo reserve failed.\n");
251 return;
252 }
253
254 cmd->header = cpu_to_le32(SVGA_CMD_UPDATE);
255 cmd->body.x = cpu_to_le32(x);
256 cmd->body.y = cpu_to_le32(y);
257 cmd->body.width = cpu_to_le32(w);
258 cmd->body.height = cpu_to_le32(h);
259 vmw_fifo_commit(vmw_priv, sizeof(*cmd));
260}
261
262static void vmw_fb_dirty_mark(struct vmw_fb_par *par,
263 unsigned x1, unsigned y1,
264 unsigned width, unsigned height)
265{
266 struct fb_info *info = par->vmw_priv->fb_info;
267 unsigned long flags;
268 unsigned x2 = x1 + width;
269 unsigned y2 = y1 + height;
270
271 spin_lock_irqsave(&par->dirty.lock, flags);
272 if (par->dirty.x1 == par->dirty.x2) {
273 par->dirty.x1 = x1;
274 par->dirty.y1 = y1;
275 par->dirty.x2 = x2;
276 par->dirty.y2 = y2;
277 /* if we are active start the dirty work
278 * we share the work with the defio system */
279 if (par->dirty.active)
280 schedule_delayed_work(&info->deferred_work, VMW_DIRTY_DELAY);
281 } else {
282 if (x1 < par->dirty.x1)
283 par->dirty.x1 = x1;
284 if (y1 < par->dirty.y1)
285 par->dirty.y1 = y1;
286 if (x2 > par->dirty.x2)
287 par->dirty.x2 = x2;
288 if (y2 > par->dirty.y2)
289 par->dirty.y2 = y2;
290 }
291 spin_unlock_irqrestore(&par->dirty.lock, flags);
292}
293
294static void vmw_deferred_io(struct fb_info *info,
295 struct list_head *pagelist)
296{
297 struct vmw_fb_par *par = info->par;
298 unsigned long start, end, min, max;
299 unsigned long flags;
300 struct page *page;
301 int y1, y2;
302
303 min = ULONG_MAX;
304 max = 0;
305 list_for_each_entry(page, pagelist, lru) {
306 start = page->index << PAGE_SHIFT;
307 end = start + PAGE_SIZE - 1;
308 min = min(min, start);
309 max = max(max, end);
310 }
311
312 if (min < max) {
313 y1 = min / info->fix.line_length;
314 y2 = (max / info->fix.line_length) + 1;
315
316 spin_lock_irqsave(&par->dirty.lock, flags);
317 par->dirty.x1 = 0;
318 par->dirty.y1 = y1;
319 par->dirty.x2 = info->var.xres;
320 par->dirty.y2 = y2;
321 spin_unlock_irqrestore(&par->dirty.lock, flags);
322 }
323
324 vmw_fb_dirty_flush(par);
325};
326
327struct fb_deferred_io vmw_defio = {
328 .delay = VMW_DIRTY_DELAY,
329 .deferred_io = vmw_deferred_io,
330};
331
332/*
333 * Draw code
334 */
335
336static void vmw_fb_fillrect(struct fb_info *info, const struct fb_fillrect *rect)
337{
338 cfb_fillrect(info, rect);
339 vmw_fb_dirty_mark(info->par, rect->dx, rect->dy,
340 rect->width, rect->height);
341}
342
343static void vmw_fb_copyarea(struct fb_info *info, const struct fb_copyarea *region)
344{
345 cfb_copyarea(info, region);
346 vmw_fb_dirty_mark(info->par, region->dx, region->dy,
347 region->width, region->height);
348}
349
350static void vmw_fb_imageblit(struct fb_info *info, const struct fb_image *image)
351{
352 cfb_imageblit(info, image);
353 vmw_fb_dirty_mark(info->par, image->dx, image->dy,
354 image->width, image->height);
355}
356
357/*
358 * Bring up code
359 */
360
361static struct fb_ops vmw_fb_ops = {
362 .owner = THIS_MODULE,
363 .fb_check_var = vmw_fb_check_var,
364 .fb_set_par = vmw_fb_set_par,
365 .fb_setcolreg = vmw_fb_setcolreg,
366 .fb_fillrect = vmw_fb_fillrect,
367 .fb_copyarea = vmw_fb_copyarea,
368 .fb_imageblit = vmw_fb_imageblit,
369 .fb_pan_display = vmw_fb_pan_display,
370 .fb_blank = vmw_fb_blank,
371};
372
373static int vmw_fb_create_bo(struct vmw_private *vmw_priv,
374 size_t size, struct vmw_dma_buffer **out)
375{
376 struct vmw_dma_buffer *vmw_bo;
377 struct ttm_placement ne_placement = vmw_vram_ne_placement;
378 int ret;
379
380 ne_placement.lpfn = (size + PAGE_SIZE - 1) >> PAGE_SHIFT;
381
382 /* interuptable? */
383 ret = ttm_write_lock(&vmw_priv->fbdev_master.lock, false);
384 if (unlikely(ret != 0))
385 return ret;
386
387 vmw_bo = kmalloc(sizeof(*vmw_bo), GFP_KERNEL);
388 if (!vmw_bo)
389 goto err_unlock;
390
391 ret = vmw_dmabuf_init(vmw_priv, vmw_bo, size,
392 &ne_placement,
393 false,
394 &vmw_dmabuf_bo_free);
395 if (unlikely(ret != 0))
396 goto err_unlock; /* init frees the buffer on failure */
397
398 *out = vmw_bo;
399
400 ttm_write_unlock(&vmw_priv->fbdev_master.lock);
401
402 return 0;
403
404err_unlock:
405 ttm_write_unlock(&vmw_priv->fbdev_master.lock);
406 return ret;
407}
408
409int vmw_fb_init(struct vmw_private *vmw_priv)
410{
411 struct device *device = &vmw_priv->dev->pdev->dev;
412 struct vmw_fb_par *par;
413 struct fb_info *info;
414 unsigned initial_width, initial_height;
415 unsigned fb_width, fb_height;
416 unsigned fb_bbp, fb_depth, fb_offset, fb_pitch, fb_size;
417 int ret;
418
419 initial_width = 800;
420 initial_height = 600;
421
422 fb_bbp = 32;
423 fb_depth = 24;
424
425 if (vmw_priv->capabilities & SVGA_CAP_MULTIMON) {
426 fb_width = min(vmw_priv->fb_max_width, (unsigned)2048);
427 fb_height = min(vmw_priv->fb_max_height, (unsigned)2048);
428 } else {
429 fb_width = min(vmw_priv->fb_max_width, initial_width);
430 fb_height = min(vmw_priv->fb_max_height, initial_height);
431 }
432
433 initial_width = min(fb_width, initial_width);
434 initial_height = min(fb_height, initial_height);
435
436 vmw_write(vmw_priv, SVGA_REG_WIDTH, fb_width);
437 vmw_write(vmw_priv, SVGA_REG_HEIGHT, fb_height);
438 vmw_write(vmw_priv, SVGA_REG_BITS_PER_PIXEL, fb_bbp);
439 vmw_write(vmw_priv, SVGA_REG_DEPTH, fb_depth);
440 vmw_write(vmw_priv, SVGA_REG_RED_MASK, 0x00ff0000);
441 vmw_write(vmw_priv, SVGA_REG_GREEN_MASK, 0x0000ff00);
442 vmw_write(vmw_priv, SVGA_REG_BLUE_MASK, 0x000000ff);
443
444 fb_size = vmw_read(vmw_priv, SVGA_REG_FB_SIZE);
445 fb_offset = vmw_read(vmw_priv, SVGA_REG_FB_OFFSET);
446 fb_pitch = vmw_read(vmw_priv, SVGA_REG_BYTES_PER_LINE);
447
448 DRM_DEBUG("width %u\n", vmw_read(vmw_priv, SVGA_REG_MAX_WIDTH));
449 DRM_DEBUG("height %u\n", vmw_read(vmw_priv, SVGA_REG_MAX_HEIGHT));
450 DRM_DEBUG("width %u\n", vmw_read(vmw_priv, SVGA_REG_WIDTH));
451 DRM_DEBUG("height %u\n", vmw_read(vmw_priv, SVGA_REG_HEIGHT));
452 DRM_DEBUG("bpp %u\n", vmw_read(vmw_priv, SVGA_REG_BITS_PER_PIXEL));
453 DRM_DEBUG("depth %u\n", vmw_read(vmw_priv, SVGA_REG_DEPTH));
454 DRM_DEBUG("bpl %u\n", vmw_read(vmw_priv, SVGA_REG_BYTES_PER_LINE));
455 DRM_DEBUG("r mask %08x\n", vmw_read(vmw_priv, SVGA_REG_RED_MASK));
456 DRM_DEBUG("g mask %08x\n", vmw_read(vmw_priv, SVGA_REG_GREEN_MASK));
457 DRM_DEBUG("b mask %08x\n", vmw_read(vmw_priv, SVGA_REG_BLUE_MASK));
458 DRM_DEBUG("fb_offset 0x%08x\n", fb_offset);
459 DRM_DEBUG("fb_pitch %u\n", fb_pitch);
460 DRM_DEBUG("fb_size %u kiB\n", fb_size / 1024);
461
462 info = framebuffer_alloc(sizeof(*par), device);
463 if (!info)
464 return -ENOMEM;
465
466 /*
467 * Par
468 */
469 vmw_priv->fb_info = info;
470 par = info->par;
471 par->vmw_priv = vmw_priv;
472 par->depth = fb_depth;
473 par->bpp = fb_bbp;
474 par->vmalloc = NULL;
475 par->max_width = fb_width;
476 par->max_height = fb_height;
477
478 /*
479 * Create buffers and alloc memory
480 */
481 par->vmalloc = vmalloc(fb_size);
482 if (unlikely(par->vmalloc == NULL)) {
483 ret = -ENOMEM;
484 goto err_free;
485 }
486
487 ret = vmw_fb_create_bo(vmw_priv, fb_size, &par->vmw_bo);
488 if (unlikely(ret != 0))
489 goto err_free;
490
491 ret = ttm_bo_kmap(&par->vmw_bo->base,
492 0,
493 par->vmw_bo->base.num_pages,
494 &par->map);
495 if (unlikely(ret != 0))
496 goto err_unref;
497 par->bo_ptr = ttm_kmap_obj_virtual(&par->map, &par->bo_iowrite);
498 par->bo_size = fb_size;
499
500 /*
501 * Fixed and var
502 */
503 strcpy(info->fix.id, "svgadrmfb");
504 info->fix.type = FB_TYPE_PACKED_PIXELS;
505 info->fix.visual = FB_VISUAL_TRUECOLOR;
506 info->fix.type_aux = 0;
507 info->fix.xpanstep = 1; /* doing it in hw */
508 info->fix.ypanstep = 1; /* doing it in hw */
509 info->fix.ywrapstep = 0;
510 info->fix.accel = FB_ACCEL_NONE;
511 info->fix.line_length = fb_pitch;
512
513 info->fix.smem_start = 0;
514 info->fix.smem_len = fb_size;
515
516 info->fix.mmio_start = 0;
517 info->fix.mmio_len = 0;
518
519 info->pseudo_palette = par->pseudo_palette;
520 info->screen_base = par->vmalloc;
521 info->screen_size = fb_size;
522
523 info->flags = FBINFO_DEFAULT;
524 info->fbops = &vmw_fb_ops;
525
526 /* 24 depth per default */
527 info->var.red.offset = 16;
528 info->var.green.offset = 8;
529 info->var.blue.offset = 0;
530 info->var.red.length = 8;
531 info->var.green.length = 8;
532 info->var.blue.length = 8;
533 info->var.transp.offset = 0;
534 info->var.transp.length = 0;
535
536 info->var.xres_virtual = fb_width;
537 info->var.yres_virtual = fb_height;
538 info->var.bits_per_pixel = par->bpp;
539 info->var.xoffset = 0;
540 info->var.yoffset = 0;
541 info->var.activate = FB_ACTIVATE_NOW;
542 info->var.height = -1;
543 info->var.width = -1;
544
545 info->var.xres = initial_width;
546 info->var.yres = initial_height;
547
548#if 0
549 info->pixmap.size = 64*1024;
550 info->pixmap.buf_align = 8;
551 info->pixmap.access_align = 32;
552 info->pixmap.flags = FB_PIXMAP_SYSTEM;
553 info->pixmap.scan_align = 1;
554#else
555 info->pixmap.size = 0;
556 info->pixmap.buf_align = 8;
557 info->pixmap.access_align = 32;
558 info->pixmap.flags = FB_PIXMAP_SYSTEM;
559 info->pixmap.scan_align = 1;
560#endif
561
562 info->aperture_base = vmw_priv->vram_start;
563 info->aperture_size = vmw_priv->vram_size;
564
565 /*
566 * Dirty & Deferred IO
567 */
568 par->dirty.x1 = par->dirty.x2 = 0;
569 par->dirty.y1 = par->dirty.y1 = 0;
570 par->dirty.active = true;
571 spin_lock_init(&par->dirty.lock);
572 info->fbdefio = &vmw_defio;
573 fb_deferred_io_init(info);
574
575 ret = register_framebuffer(info);
576 if (unlikely(ret != 0))
577 goto err_defio;
578
579 return 0;
580
581err_defio:
582 fb_deferred_io_cleanup(info);
583 ttm_bo_kunmap(&par->map);
584err_unref:
585 ttm_bo_unref((struct ttm_buffer_object **)&par->vmw_bo);
586err_free:
587 vfree(par->vmalloc);
588 framebuffer_release(info);
589 vmw_priv->fb_info = NULL;
590
591 return ret;
592}
593
594int vmw_fb_close(struct vmw_private *vmw_priv)
595{
596 struct fb_info *info;
597 struct vmw_fb_par *par;
598 struct ttm_buffer_object *bo;
599
600 if (!vmw_priv->fb_info)
601 return 0;
602
603 info = vmw_priv->fb_info;
604 par = info->par;
605 bo = &par->vmw_bo->base;
606 par->vmw_bo = NULL;
607
608 /* ??? order */
609 fb_deferred_io_cleanup(info);
610 unregister_framebuffer(info);
611
612 ttm_bo_kunmap(&par->map);
613 ttm_bo_unref(&bo);
614
615 vfree(par->vmalloc);
616 framebuffer_release(info);
617
618 return 0;
619}
620
621int vmw_dmabuf_from_vram(struct vmw_private *vmw_priv,
622 struct vmw_dma_buffer *vmw_bo)
623{
624 struct ttm_buffer_object *bo = &vmw_bo->base;
625 int ret = 0;
626
627 ret = ttm_bo_reserve(bo, false, false, false, 0);
628 if (unlikely(ret != 0))
629 return ret;
630
631 ret = ttm_bo_validate(bo, &vmw_sys_placement, false, false);
632 ttm_bo_unreserve(bo);
633
634 return ret;
635}
636
637int vmw_dmabuf_to_start_of_vram(struct vmw_private *vmw_priv,
638 struct vmw_dma_buffer *vmw_bo)
639{
640 struct ttm_buffer_object *bo = &vmw_bo->base;
641 struct ttm_placement ne_placement = vmw_vram_ne_placement;
642 int ret = 0;
643
644 ne_placement.lpfn = bo->num_pages;
645
646 /* interuptable? */
647 ret = ttm_write_lock(&vmw_priv->active_master->lock, false);
648 if (unlikely(ret != 0))
649 return ret;
650
651 ret = ttm_bo_reserve(bo, false, false, false, 0);
652 if (unlikely(ret != 0))
653 goto err_unlock;
654
655 ret = ttm_bo_validate(bo, &ne_placement, false, false);
656 ttm_bo_unreserve(bo);
657err_unlock:
658 ttm_write_unlock(&vmw_priv->active_master->lock);
659
660 return ret;
661}
662
663int vmw_fb_off(struct vmw_private *vmw_priv)
664{
665 struct fb_info *info;
666 struct vmw_fb_par *par;
667 unsigned long flags;
668
669 if (!vmw_priv->fb_info)
670 return -EINVAL;
671
672 info = vmw_priv->fb_info;
673 par = info->par;
674
675 spin_lock_irqsave(&par->dirty.lock, flags);
676 par->dirty.active = false;
677 spin_unlock_irqrestore(&par->dirty.lock, flags);
678
679 flush_scheduled_work();
680
681 par->bo_ptr = NULL;
682 ttm_bo_kunmap(&par->map);
683
684 vmw_dmabuf_from_vram(vmw_priv, par->vmw_bo);
685
686 return 0;
687}
688
689int vmw_fb_on(struct vmw_private *vmw_priv)
690{
691 struct fb_info *info;
692 struct vmw_fb_par *par;
693 unsigned long flags;
694 bool dummy;
695 int ret;
696
697 if (!vmw_priv->fb_info)
698 return -EINVAL;
699
700 info = vmw_priv->fb_info;
701 par = info->par;
702
703 /* we are already active */
704 if (par->bo_ptr != NULL)
705 return 0;
706
707 /* Make sure that all overlays are stoped when we take over */
708 vmw_overlay_stop_all(vmw_priv);
709
710 ret = vmw_dmabuf_to_start_of_vram(vmw_priv, par->vmw_bo);
711 if (unlikely(ret != 0)) {
712 DRM_ERROR("could not move buffer to start of VRAM\n");
713 goto err_no_buffer;
714 }
715
716 ret = ttm_bo_kmap(&par->vmw_bo->base,
717 0,
718 par->vmw_bo->base.num_pages,
719 &par->map);
720 BUG_ON(ret != 0);
721 par->bo_ptr = ttm_kmap_obj_virtual(&par->map, &dummy);
722
723 spin_lock_irqsave(&par->dirty.lock, flags);
724 par->dirty.active = true;
725 spin_unlock_irqrestore(&par->dirty.lock, flags);
726
727err_no_buffer:
728 vmw_fb_set_par(info);
729
730 vmw_fb_dirty_mark(par, 0, 0, info->var.xres, info->var.yres);
731
732 /* If there already was stuff dirty we wont
733 * schedule a new work, so lets do it now */
734 schedule_delayed_work(&info->deferred_work, 0);
735
736 return 0;
737}
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c b/drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c
new file mode 100644
index 000000000000..39d43a01d846
--- /dev/null
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_fifo.c
@@ -0,0 +1,538 @@
1/**************************************************************************
2 *
3 * Copyright © 2009 VMware, Inc., Palo Alto, CA., USA
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
21 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
22 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
23 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
24 * USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28#include "vmwgfx_drv.h"
29#include "drmP.h"
30#include "ttm/ttm_placement.h"
31
32bool vmw_fifo_have_3d(struct vmw_private *dev_priv)
33{
34 __le32 __iomem *fifo_mem = dev_priv->mmio_virt;
35 uint32_t fifo_min, hwversion;
36
37 fifo_min = ioread32(fifo_mem + SVGA_FIFO_MIN);
38 if (fifo_min <= SVGA_FIFO_3D_HWVERSION * sizeof(unsigned int))
39 return false;
40
41 hwversion = ioread32(fifo_mem + SVGA_FIFO_3D_HWVERSION);
42 if (hwversion == 0)
43 return false;
44
45 if (hwversion < SVGA3D_HWVERSION_WS65_B1)
46 return false;
47
48 return true;
49}
50
51int vmw_fifo_init(struct vmw_private *dev_priv, struct vmw_fifo_state *fifo)
52{
53 __le32 __iomem *fifo_mem = dev_priv->mmio_virt;
54 uint32_t max;
55 uint32_t min;
56 uint32_t dummy;
57 int ret;
58
59 fifo->static_buffer_size = VMWGFX_FIFO_STATIC_SIZE;
60 fifo->static_buffer = vmalloc(fifo->static_buffer_size);
61 if (unlikely(fifo->static_buffer == NULL))
62 return -ENOMEM;
63
64 fifo->last_buffer_size = VMWGFX_FIFO_STATIC_SIZE;
65 fifo->last_data_size = 0;
66 fifo->last_buffer_add = false;
67 fifo->last_buffer = vmalloc(fifo->last_buffer_size);
68 if (unlikely(fifo->last_buffer == NULL)) {
69 ret = -ENOMEM;
70 goto out_err;
71 }
72
73 fifo->dynamic_buffer = NULL;
74 fifo->reserved_size = 0;
75 fifo->using_bounce_buffer = false;
76
77 mutex_init(&fifo->fifo_mutex);
78 init_rwsem(&fifo->rwsem);
79
80 /*
81 * Allow mapping the first page read-only to user-space.
82 */
83
84 DRM_INFO("width %d\n", vmw_read(dev_priv, SVGA_REG_WIDTH));
85 DRM_INFO("height %d\n", vmw_read(dev_priv, SVGA_REG_HEIGHT));
86 DRM_INFO("bpp %d\n", vmw_read(dev_priv, SVGA_REG_BITS_PER_PIXEL));
87
88 mutex_lock(&dev_priv->hw_mutex);
89 dev_priv->enable_state = vmw_read(dev_priv, SVGA_REG_ENABLE);
90 dev_priv->config_done_state = vmw_read(dev_priv, SVGA_REG_CONFIG_DONE);
91 vmw_write(dev_priv, SVGA_REG_ENABLE, 1);
92
93 min = 4;
94 if (dev_priv->capabilities & SVGA_CAP_EXTENDED_FIFO)
95 min = vmw_read(dev_priv, SVGA_REG_MEM_REGS);
96 min <<= 2;
97
98 if (min < PAGE_SIZE)
99 min = PAGE_SIZE;
100
101 iowrite32(min, fifo_mem + SVGA_FIFO_MIN);
102 iowrite32(dev_priv->mmio_size, fifo_mem + SVGA_FIFO_MAX);
103 wmb();
104 iowrite32(min, fifo_mem + SVGA_FIFO_NEXT_CMD);
105 iowrite32(min, fifo_mem + SVGA_FIFO_STOP);
106 iowrite32(0, fifo_mem + SVGA_FIFO_BUSY);
107 mb();
108
109 vmw_write(dev_priv, SVGA_REG_CONFIG_DONE, 1);
110 mutex_unlock(&dev_priv->hw_mutex);
111
112 max = ioread32(fifo_mem + SVGA_FIFO_MAX);
113 min = ioread32(fifo_mem + SVGA_FIFO_MIN);
114 fifo->capabilities = ioread32(fifo_mem + SVGA_FIFO_CAPABILITIES);
115
116 DRM_INFO("Fifo max 0x%08x min 0x%08x cap 0x%08x\n",
117 (unsigned int) max,
118 (unsigned int) min,
119 (unsigned int) fifo->capabilities);
120
121 atomic_set(&dev_priv->fence_seq, dev_priv->last_read_sequence);
122 iowrite32(dev_priv->last_read_sequence, fifo_mem + SVGA_FIFO_FENCE);
123
124 return vmw_fifo_send_fence(dev_priv, &dummy);
125out_err:
126 vfree(fifo->static_buffer);
127 fifo->static_buffer = NULL;
128 return ret;
129}
130
131void vmw_fifo_ping_host(struct vmw_private *dev_priv, uint32_t reason)
132{
133 __le32 __iomem *fifo_mem = dev_priv->mmio_virt;
134
135 mutex_lock(&dev_priv->hw_mutex);
136
137 if (unlikely(ioread32(fifo_mem + SVGA_FIFO_BUSY) == 0)) {
138 iowrite32(1, fifo_mem + SVGA_FIFO_BUSY);
139 vmw_write(dev_priv, SVGA_REG_SYNC, reason);
140 }
141
142 mutex_unlock(&dev_priv->hw_mutex);
143}
144
145void vmw_fifo_release(struct vmw_private *dev_priv, struct vmw_fifo_state *fifo)
146{
147 __le32 __iomem *fifo_mem = dev_priv->mmio_virt;
148
149 mutex_lock(&dev_priv->hw_mutex);
150
151 while (vmw_read(dev_priv, SVGA_REG_BUSY) != 0)
152 vmw_write(dev_priv, SVGA_REG_SYNC, SVGA_SYNC_GENERIC);
153
154 dev_priv->last_read_sequence = ioread32(fifo_mem + SVGA_FIFO_FENCE);
155
156 vmw_write(dev_priv, SVGA_REG_CONFIG_DONE,
157 dev_priv->config_done_state);
158 vmw_write(dev_priv, SVGA_REG_ENABLE,
159 dev_priv->enable_state);
160
161 mutex_unlock(&dev_priv->hw_mutex);
162
163 if (likely(fifo->last_buffer != NULL)) {
164 vfree(fifo->last_buffer);
165 fifo->last_buffer = NULL;
166 }
167
168 if (likely(fifo->static_buffer != NULL)) {
169 vfree(fifo->static_buffer);
170 fifo->static_buffer = NULL;
171 }
172
173 if (likely(fifo->dynamic_buffer != NULL)) {
174 vfree(fifo->dynamic_buffer);
175 fifo->dynamic_buffer = NULL;
176 }
177}
178
179static bool vmw_fifo_is_full(struct vmw_private *dev_priv, uint32_t bytes)
180{
181 __le32 __iomem *fifo_mem = dev_priv->mmio_virt;
182 uint32_t max = ioread32(fifo_mem + SVGA_FIFO_MAX);
183 uint32_t next_cmd = ioread32(fifo_mem + SVGA_FIFO_NEXT_CMD);
184 uint32_t min = ioread32(fifo_mem + SVGA_FIFO_MIN);
185 uint32_t stop = ioread32(fifo_mem + SVGA_FIFO_STOP);
186
187 return ((max - next_cmd) + (stop - min) <= bytes);
188}
189
190static int vmw_fifo_wait_noirq(struct vmw_private *dev_priv,
191 uint32_t bytes, bool interruptible,
192 unsigned long timeout)
193{
194 int ret = 0;
195 unsigned long end_jiffies = jiffies + timeout;
196 DEFINE_WAIT(__wait);
197
198 DRM_INFO("Fifo wait noirq.\n");
199
200 for (;;) {
201 prepare_to_wait(&dev_priv->fifo_queue, &__wait,
202 (interruptible) ?
203 TASK_INTERRUPTIBLE : TASK_UNINTERRUPTIBLE);
204 if (!vmw_fifo_is_full(dev_priv, bytes))
205 break;
206 if (time_after_eq(jiffies, end_jiffies)) {
207 ret = -EBUSY;
208 DRM_ERROR("SVGA device lockup.\n");
209 break;
210 }
211 schedule_timeout(1);
212 if (interruptible && signal_pending(current)) {
213 ret = -ERESTARTSYS;
214 break;
215 }
216 }
217 finish_wait(&dev_priv->fifo_queue, &__wait);
218 wake_up_all(&dev_priv->fifo_queue);
219 DRM_INFO("Fifo noirq exit.\n");
220 return ret;
221}
222
223static int vmw_fifo_wait(struct vmw_private *dev_priv,
224 uint32_t bytes, bool interruptible,
225 unsigned long timeout)
226{
227 long ret = 1L;
228 unsigned long irq_flags;
229
230 if (likely(!vmw_fifo_is_full(dev_priv, bytes)))
231 return 0;
232
233 vmw_fifo_ping_host(dev_priv, SVGA_SYNC_FIFOFULL);
234 if (!(dev_priv->capabilities & SVGA_CAP_IRQMASK))
235 return vmw_fifo_wait_noirq(dev_priv, bytes,
236 interruptible, timeout);
237
238 mutex_lock(&dev_priv->hw_mutex);
239 if (atomic_add_return(1, &dev_priv->fifo_queue_waiters) > 0) {
240 spin_lock_irqsave(&dev_priv->irq_lock, irq_flags);
241 outl(SVGA_IRQFLAG_FIFO_PROGRESS,
242 dev_priv->io_start + VMWGFX_IRQSTATUS_PORT);
243 vmw_write(dev_priv, SVGA_REG_IRQMASK,
244 vmw_read(dev_priv, SVGA_REG_IRQMASK) |
245 SVGA_IRQFLAG_FIFO_PROGRESS);
246 spin_unlock_irqrestore(&dev_priv->irq_lock, irq_flags);
247 }
248 mutex_unlock(&dev_priv->hw_mutex);
249
250 if (interruptible)
251 ret = wait_event_interruptible_timeout
252 (dev_priv->fifo_queue,
253 !vmw_fifo_is_full(dev_priv, bytes), timeout);
254 else
255 ret = wait_event_timeout
256 (dev_priv->fifo_queue,
257 !vmw_fifo_is_full(dev_priv, bytes), timeout);
258
259 if (unlikely(ret == 0))
260 ret = -EBUSY;
261 else if (likely(ret > 0))
262 ret = 0;
263
264 mutex_lock(&dev_priv->hw_mutex);
265 if (atomic_dec_and_test(&dev_priv->fifo_queue_waiters)) {
266 spin_lock_irqsave(&dev_priv->irq_lock, irq_flags);
267 vmw_write(dev_priv, SVGA_REG_IRQMASK,
268 vmw_read(dev_priv, SVGA_REG_IRQMASK) &
269 ~SVGA_IRQFLAG_FIFO_PROGRESS);
270 spin_unlock_irqrestore(&dev_priv->irq_lock, irq_flags);
271 }
272 mutex_unlock(&dev_priv->hw_mutex);
273
274 return ret;
275}
276
277void *vmw_fifo_reserve(struct vmw_private *dev_priv, uint32_t bytes)
278{
279 struct vmw_fifo_state *fifo_state = &dev_priv->fifo;
280 __le32 __iomem *fifo_mem = dev_priv->mmio_virt;
281 uint32_t max;
282 uint32_t min;
283 uint32_t next_cmd;
284 uint32_t reserveable = fifo_state->capabilities & SVGA_FIFO_CAP_RESERVE;
285 int ret;
286
287 mutex_lock(&fifo_state->fifo_mutex);
288 max = ioread32(fifo_mem + SVGA_FIFO_MAX);
289 min = ioread32(fifo_mem + SVGA_FIFO_MIN);
290 next_cmd = ioread32(fifo_mem + SVGA_FIFO_NEXT_CMD);
291
292 if (unlikely(bytes >= (max - min)))
293 goto out_err;
294
295 BUG_ON(fifo_state->reserved_size != 0);
296 BUG_ON(fifo_state->dynamic_buffer != NULL);
297
298 fifo_state->reserved_size = bytes;
299
300 while (1) {
301 uint32_t stop = ioread32(fifo_mem + SVGA_FIFO_STOP);
302 bool need_bounce = false;
303 bool reserve_in_place = false;
304
305 if (next_cmd >= stop) {
306 if (likely((next_cmd + bytes < max ||
307 (next_cmd + bytes == max && stop > min))))
308 reserve_in_place = true;
309
310 else if (vmw_fifo_is_full(dev_priv, bytes)) {
311 ret = vmw_fifo_wait(dev_priv, bytes,
312 false, 3 * HZ);
313 if (unlikely(ret != 0))
314 goto out_err;
315 } else
316 need_bounce = true;
317
318 } else {
319
320 if (likely((next_cmd + bytes < stop)))
321 reserve_in_place = true;
322 else {
323 ret = vmw_fifo_wait(dev_priv, bytes,
324 false, 3 * HZ);
325 if (unlikely(ret != 0))
326 goto out_err;
327 }
328 }
329
330 if (reserve_in_place) {
331 if (reserveable || bytes <= sizeof(uint32_t)) {
332 fifo_state->using_bounce_buffer = false;
333
334 if (reserveable)
335 iowrite32(bytes, fifo_mem +
336 SVGA_FIFO_RESERVED);
337 return fifo_mem + (next_cmd >> 2);
338 } else {
339 need_bounce = true;
340 }
341 }
342
343 if (need_bounce) {
344 fifo_state->using_bounce_buffer = true;
345 if (bytes < fifo_state->static_buffer_size)
346 return fifo_state->static_buffer;
347 else {
348 fifo_state->dynamic_buffer = vmalloc(bytes);
349 return fifo_state->dynamic_buffer;
350 }
351 }
352 }
353out_err:
354 fifo_state->reserved_size = 0;
355 mutex_unlock(&fifo_state->fifo_mutex);
356 return NULL;
357}
358
359static void vmw_fifo_res_copy(struct vmw_fifo_state *fifo_state,
360 __le32 __iomem *fifo_mem,
361 uint32_t next_cmd,
362 uint32_t max, uint32_t min, uint32_t bytes)
363{
364 uint32_t chunk_size = max - next_cmd;
365 uint32_t rest;
366 uint32_t *buffer = (fifo_state->dynamic_buffer != NULL) ?
367 fifo_state->dynamic_buffer : fifo_state->static_buffer;
368
369 if (bytes < chunk_size)
370 chunk_size = bytes;
371
372 iowrite32(bytes, fifo_mem + SVGA_FIFO_RESERVED);
373 mb();
374 memcpy_toio(fifo_mem + (next_cmd >> 2), buffer, chunk_size);
375 rest = bytes - chunk_size;
376 if (rest)
377 memcpy_toio(fifo_mem + (min >> 2), buffer + (chunk_size >> 2),
378 rest);
379}
380
381static void vmw_fifo_slow_copy(struct vmw_fifo_state *fifo_state,
382 __le32 __iomem *fifo_mem,
383 uint32_t next_cmd,
384 uint32_t max, uint32_t min, uint32_t bytes)
385{
386 uint32_t *buffer = (fifo_state->dynamic_buffer != NULL) ?
387 fifo_state->dynamic_buffer : fifo_state->static_buffer;
388
389 while (bytes > 0) {
390 iowrite32(*buffer++, fifo_mem + (next_cmd >> 2));
391 next_cmd += sizeof(uint32_t);
392 if (unlikely(next_cmd == max))
393 next_cmd = min;
394 mb();
395 iowrite32(next_cmd, fifo_mem + SVGA_FIFO_NEXT_CMD);
396 mb();
397 bytes -= sizeof(uint32_t);
398 }
399}
400
401void vmw_fifo_commit(struct vmw_private *dev_priv, uint32_t bytes)
402{
403 struct vmw_fifo_state *fifo_state = &dev_priv->fifo;
404 __le32 __iomem *fifo_mem = dev_priv->mmio_virt;
405 uint32_t next_cmd = ioread32(fifo_mem + SVGA_FIFO_NEXT_CMD);
406 uint32_t max = ioread32(fifo_mem + SVGA_FIFO_MAX);
407 uint32_t min = ioread32(fifo_mem + SVGA_FIFO_MIN);
408 bool reserveable = fifo_state->capabilities & SVGA_FIFO_CAP_RESERVE;
409
410 BUG_ON((bytes & 3) != 0);
411 BUG_ON(bytes > fifo_state->reserved_size);
412
413 fifo_state->reserved_size = 0;
414
415 if (fifo_state->using_bounce_buffer) {
416 if (reserveable)
417 vmw_fifo_res_copy(fifo_state, fifo_mem,
418 next_cmd, max, min, bytes);
419 else
420 vmw_fifo_slow_copy(fifo_state, fifo_mem,
421 next_cmd, max, min, bytes);
422
423 if (fifo_state->dynamic_buffer) {
424 vfree(fifo_state->dynamic_buffer);
425 fifo_state->dynamic_buffer = NULL;
426 }
427
428 }
429
430 down_write(&fifo_state->rwsem);
431 if (fifo_state->using_bounce_buffer || reserveable) {
432 next_cmd += bytes;
433 if (next_cmd >= max)
434 next_cmd -= max - min;
435 mb();
436 iowrite32(next_cmd, fifo_mem + SVGA_FIFO_NEXT_CMD);
437 }
438
439 if (reserveable)
440 iowrite32(0, fifo_mem + SVGA_FIFO_RESERVED);
441 mb();
442 up_write(&fifo_state->rwsem);
443 vmw_fifo_ping_host(dev_priv, SVGA_SYNC_GENERIC);
444 mutex_unlock(&fifo_state->fifo_mutex);
445}
446
447int vmw_fifo_send_fence(struct vmw_private *dev_priv, uint32_t *sequence)
448{
449 struct vmw_fifo_state *fifo_state = &dev_priv->fifo;
450 struct svga_fifo_cmd_fence *cmd_fence;
451 void *fm;
452 int ret = 0;
453 uint32_t bytes = sizeof(__le32) + sizeof(*cmd_fence);
454
455 fm = vmw_fifo_reserve(dev_priv, bytes);
456 if (unlikely(fm == NULL)) {
457 *sequence = atomic_read(&dev_priv->fence_seq);
458 ret = -ENOMEM;
459 (void)vmw_fallback_wait(dev_priv, false, true, *sequence,
460 false, 3*HZ);
461 goto out_err;
462 }
463
464 do {
465 *sequence = atomic_add_return(1, &dev_priv->fence_seq);
466 } while (*sequence == 0);
467
468 if (!(fifo_state->capabilities & SVGA_FIFO_CAP_FENCE)) {
469
470 /*
471 * Don't request hardware to send a fence. The
472 * waiting code in vmwgfx_irq.c will emulate this.
473 */
474
475 vmw_fifo_commit(dev_priv, 0);
476 return 0;
477 }
478
479 *(__le32 *) fm = cpu_to_le32(SVGA_CMD_FENCE);
480 cmd_fence = (struct svga_fifo_cmd_fence *)
481 ((unsigned long)fm + sizeof(__le32));
482
483 iowrite32(*sequence, &cmd_fence->fence);
484 fifo_state->last_buffer_add = true;
485 vmw_fifo_commit(dev_priv, bytes);
486 fifo_state->last_buffer_add = false;
487
488out_err:
489 return ret;
490}
491
492/**
493 * Map the first page of the FIFO read-only to user-space.
494 */
495
496static int vmw_fifo_vm_fault(struct vm_area_struct *vma, struct vm_fault *vmf)
497{
498 int ret;
499 unsigned long address = (unsigned long)vmf->virtual_address;
500
501 if (address != vma->vm_start)
502 return VM_FAULT_SIGBUS;
503
504 ret = vm_insert_pfn(vma, address, vma->vm_pgoff);
505 if (likely(ret == -EBUSY || ret == 0))
506 return VM_FAULT_NOPAGE;
507 else if (ret == -ENOMEM)
508 return VM_FAULT_OOM;
509
510 return VM_FAULT_SIGBUS;
511}
512
513static struct vm_operations_struct vmw_fifo_vm_ops = {
514 .fault = vmw_fifo_vm_fault,
515 .open = NULL,
516 .close = NULL
517};
518
519int vmw_fifo_mmap(struct file *filp, struct vm_area_struct *vma)
520{
521 struct drm_file *file_priv;
522 struct vmw_private *dev_priv;
523
524 file_priv = (struct drm_file *)filp->private_data;
525 dev_priv = vmw_priv(file_priv->minor->dev);
526
527 if (vma->vm_pgoff != (dev_priv->mmio_start >> PAGE_SHIFT) ||
528 (vma->vm_end - vma->vm_start) != PAGE_SIZE)
529 return -EINVAL;
530
531 vma->vm_flags &= ~(VM_WRITE | VM_MAYWRITE);
532 vma->vm_flags |= VM_IO | VM_PFNMAP | VM_DONTEXPAND | VM_SHARED;
533 vma->vm_page_prot = vm_get_page_prot(vma->vm_flags);
534 vma->vm_page_prot = ttm_io_prot(TTM_PL_FLAG_UNCACHED,
535 vma->vm_page_prot);
536 vma->vm_ops = &vmw_fifo_vm_ops;
537 return 0;
538}
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_gmr.c b/drivers/gpu/drm/vmwgfx/vmwgfx_gmr.c
new file mode 100644
index 000000000000..5f8908a5d7fd
--- /dev/null
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_gmr.c
@@ -0,0 +1,213 @@
1/**************************************************************************
2 *
3 * Copyright © 2009 VMware, Inc., Palo Alto, CA., USA
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
21 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
22 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
23 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
24 * USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28#include "vmwgfx_drv.h"
29#include "drmP.h"
30#include "ttm/ttm_bo_driver.h"
31
32/**
33 * FIXME: Adjust to the ttm lowmem / highmem storage to minimize
34 * the number of used descriptors.
35 */
36
37static int vmw_gmr_build_descriptors(struct list_head *desc_pages,
38 struct page *pages[],
39 unsigned long num_pages)
40{
41 struct page *page, *next;
42 struct svga_guest_mem_descriptor *page_virtual = NULL;
43 struct svga_guest_mem_descriptor *desc_virtual = NULL;
44 unsigned int desc_per_page;
45 unsigned long prev_pfn;
46 unsigned long pfn;
47 int ret;
48
49 desc_per_page = PAGE_SIZE /
50 sizeof(struct svga_guest_mem_descriptor) - 1;
51
52 while (likely(num_pages != 0)) {
53 page = alloc_page(__GFP_HIGHMEM);
54 if (unlikely(page == NULL)) {
55 ret = -ENOMEM;
56 goto out_err;
57 }
58
59 list_add_tail(&page->lru, desc_pages);
60
61 /*
62 * Point previous page terminating descriptor to this
63 * page before unmapping it.
64 */
65
66 if (likely(page_virtual != NULL)) {
67 desc_virtual->ppn = page_to_pfn(page);
68 kunmap_atomic(page_virtual, KM_USER0);
69 }
70
71 page_virtual = kmap_atomic(page, KM_USER0);
72 desc_virtual = page_virtual - 1;
73 prev_pfn = ~(0UL);
74
75 while (likely(num_pages != 0)) {
76 pfn = page_to_pfn(*pages);
77
78 if (pfn != prev_pfn + 1) {
79
80 if (desc_virtual - page_virtual ==
81 desc_per_page - 1)
82 break;
83
84 (++desc_virtual)->ppn = cpu_to_le32(pfn);
85 desc_virtual->num_pages = cpu_to_le32(1);
86 } else {
87 uint32_t tmp =
88 le32_to_cpu(desc_virtual->num_pages);
89 desc_virtual->num_pages = cpu_to_le32(tmp + 1);
90 }
91 prev_pfn = pfn;
92 --num_pages;
93 ++pages;
94 }
95
96 (++desc_virtual)->ppn = cpu_to_le32(0);
97 desc_virtual->num_pages = cpu_to_le32(0);
98 }
99
100 if (likely(page_virtual != NULL))
101 kunmap_atomic(page_virtual, KM_USER0);
102
103 return 0;
104out_err:
105 list_for_each_entry_safe(page, next, desc_pages, lru) {
106 list_del_init(&page->lru);
107 __free_page(page);
108 }
109 return ret;
110}
111
112static inline void vmw_gmr_free_descriptors(struct list_head *desc_pages)
113{
114 struct page *page, *next;
115
116 list_for_each_entry_safe(page, next, desc_pages, lru) {
117 list_del_init(&page->lru);
118 __free_page(page);
119 }
120}
121
122static void vmw_gmr_fire_descriptors(struct vmw_private *dev_priv,
123 int gmr_id, struct list_head *desc_pages)
124{
125 struct page *page;
126
127 if (unlikely(list_empty(desc_pages)))
128 return;
129
130 page = list_entry(desc_pages->next, struct page, lru);
131
132 mutex_lock(&dev_priv->hw_mutex);
133
134 vmw_write(dev_priv, SVGA_REG_GMR_ID, gmr_id);
135 wmb();
136 vmw_write(dev_priv, SVGA_REG_GMR_DESCRIPTOR, page_to_pfn(page));
137 mb();
138
139 mutex_unlock(&dev_priv->hw_mutex);
140
141}
142
143/**
144 * FIXME: Adjust to the ttm lowmem / highmem storage to minimize
145 * the number of used descriptors.
146 */
147
148static unsigned long vmw_gmr_count_descriptors(struct page *pages[],
149 unsigned long num_pages)
150{
151 unsigned long prev_pfn = ~(0UL);
152 unsigned long pfn;
153 unsigned long descriptors = 0;
154
155 while (num_pages--) {
156 pfn = page_to_pfn(*pages++);
157 if (prev_pfn + 1 != pfn)
158 ++descriptors;
159 prev_pfn = pfn;
160 }
161
162 return descriptors;
163}
164
165int vmw_gmr_bind(struct vmw_private *dev_priv,
166 struct ttm_buffer_object *bo)
167{
168 struct ttm_tt *ttm = bo->ttm;
169 unsigned long descriptors;
170 int ret;
171 uint32_t id;
172 struct list_head desc_pages;
173
174 if (!(dev_priv->capabilities & SVGA_CAP_GMR))
175 return -EINVAL;
176
177 ret = ttm_tt_populate(ttm);
178 if (unlikely(ret != 0))
179 return ret;
180
181 descriptors = vmw_gmr_count_descriptors(ttm->pages, ttm->num_pages);
182 if (unlikely(descriptors > dev_priv->max_gmr_descriptors))
183 return -EINVAL;
184
185 INIT_LIST_HEAD(&desc_pages);
186 ret = vmw_gmr_build_descriptors(&desc_pages, ttm->pages,
187 ttm->num_pages);
188 if (unlikely(ret != 0))
189 return ret;
190
191 ret = vmw_gmr_id_alloc(dev_priv, &id);
192 if (unlikely(ret != 0))
193 goto out_no_id;
194
195 vmw_gmr_fire_descriptors(dev_priv, id, &desc_pages);
196 vmw_gmr_free_descriptors(&desc_pages);
197 vmw_dmabuf_set_gmr(bo, id);
198 return 0;
199
200out_no_id:
201 vmw_gmr_free_descriptors(&desc_pages);
202 return ret;
203}
204
205void vmw_gmr_unbind(struct vmw_private *dev_priv, int gmr_id)
206{
207 mutex_lock(&dev_priv->hw_mutex);
208 vmw_write(dev_priv, SVGA_REG_GMR_ID, gmr_id);
209 wmb();
210 vmw_write(dev_priv, SVGA_REG_GMR_DESCRIPTOR, 0);
211 mb();
212 mutex_unlock(&dev_priv->hw_mutex);
213}
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_ioctl.c b/drivers/gpu/drm/vmwgfx/vmwgfx_ioctl.c
new file mode 100644
index 000000000000..1c7a316454d8
--- /dev/null
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_ioctl.c
@@ -0,0 +1,87 @@
1/**************************************************************************
2 *
3 * Copyright © 2009 VMware, Inc., Palo Alto, CA., USA
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
21 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
22 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
23 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
24 * USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28#include "vmwgfx_drv.h"
29#include "vmwgfx_drm.h"
30
31int vmw_getparam_ioctl(struct drm_device *dev, void *data,
32 struct drm_file *file_priv)
33{
34 struct vmw_private *dev_priv = vmw_priv(dev);
35 struct drm_vmw_getparam_arg *param =
36 (struct drm_vmw_getparam_arg *)data;
37
38 switch (param->param) {
39 case DRM_VMW_PARAM_NUM_STREAMS:
40 param->value = vmw_overlay_num_overlays(dev_priv);
41 break;
42 case DRM_VMW_PARAM_NUM_FREE_STREAMS:
43 param->value = vmw_overlay_num_free_overlays(dev_priv);
44 break;
45 case DRM_VMW_PARAM_3D:
46 param->value = vmw_fifo_have_3d(dev_priv) ? 1 : 0;
47 break;
48 case DRM_VMW_PARAM_FIFO_OFFSET:
49 param->value = dev_priv->mmio_start;
50 break;
51 case DRM_VMW_PARAM_HW_CAPS:
52 param->value = dev_priv->capabilities;
53 break;
54 case DRM_VMW_PARAM_FIFO_CAPS:
55 param->value = dev_priv->fifo.capabilities;
56 break;
57 default:
58 DRM_ERROR("Illegal vmwgfx get param request: %d\n",
59 param->param);
60 return -EINVAL;
61 }
62
63 return 0;
64}
65
66int vmw_fifo_debug_ioctl(struct drm_device *dev, void *data,
67 struct drm_file *file_priv)
68{
69 struct vmw_private *dev_priv = vmw_priv(dev);
70 struct vmw_fifo_state *fifo_state = &dev_priv->fifo;
71 struct drm_vmw_fifo_debug_arg *arg =
72 (struct drm_vmw_fifo_debug_arg *)data;
73 __le32 __user *buffer = (__le32 __user *)
74 (unsigned long)arg->debug_buffer;
75
76 if (unlikely(fifo_state->last_buffer == NULL))
77 return -EINVAL;
78
79 if (arg->debug_buffer_size < fifo_state->last_data_size) {
80 arg->used_size = arg->debug_buffer_size;
81 arg->did_not_fit = 1;
82 } else {
83 arg->used_size = fifo_state->last_data_size;
84 arg->did_not_fit = 0;
85 }
86 return copy_to_user(buffer, fifo_state->last_buffer, arg->used_size);
87}
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_irq.c b/drivers/gpu/drm/vmwgfx/vmwgfx_irq.c
new file mode 100644
index 000000000000..4d7cb5393860
--- /dev/null
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_irq.c
@@ -0,0 +1,286 @@
1/**************************************************************************
2 *
3 * Copyright © 2009 VMware, Inc., Palo Alto, CA., USA
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
21 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
22 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
23 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
24 * USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28#include "drmP.h"
29#include "vmwgfx_drv.h"
30
31#define VMW_FENCE_WRAP (1 << 24)
32
33irqreturn_t vmw_irq_handler(DRM_IRQ_ARGS)
34{
35 struct drm_device *dev = (struct drm_device *)arg;
36 struct vmw_private *dev_priv = vmw_priv(dev);
37 uint32_t status;
38
39 spin_lock(&dev_priv->irq_lock);
40 status = inl(dev_priv->io_start + VMWGFX_IRQSTATUS_PORT);
41 spin_unlock(&dev_priv->irq_lock);
42
43 if (status & SVGA_IRQFLAG_ANY_FENCE)
44 wake_up_all(&dev_priv->fence_queue);
45 if (status & SVGA_IRQFLAG_FIFO_PROGRESS)
46 wake_up_all(&dev_priv->fifo_queue);
47
48 if (likely(status)) {
49 outl(status, dev_priv->io_start + VMWGFX_IRQSTATUS_PORT);
50 return IRQ_HANDLED;
51 }
52
53 return IRQ_NONE;
54}
55
56static bool vmw_fifo_idle(struct vmw_private *dev_priv, uint32_t sequence)
57{
58 uint32_t busy;
59
60 mutex_lock(&dev_priv->hw_mutex);
61 busy = vmw_read(dev_priv, SVGA_REG_BUSY);
62 mutex_unlock(&dev_priv->hw_mutex);
63
64 return (busy == 0);
65}
66
67
68bool vmw_fence_signaled(struct vmw_private *dev_priv,
69 uint32_t sequence)
70{
71 __le32 __iomem *fifo_mem = dev_priv->mmio_virt;
72 struct vmw_fifo_state *fifo_state;
73 bool ret;
74
75 if (likely(dev_priv->last_read_sequence - sequence < VMW_FENCE_WRAP))
76 return true;
77
78 dev_priv->last_read_sequence = ioread32(fifo_mem + SVGA_FIFO_FENCE);
79 if (likely(dev_priv->last_read_sequence - sequence < VMW_FENCE_WRAP))
80 return true;
81
82 fifo_state = &dev_priv->fifo;
83 if (!(fifo_state->capabilities & SVGA_FIFO_CAP_FENCE) &&
84 vmw_fifo_idle(dev_priv, sequence))
85 return true;
86
87 /**
88 * Then check if the sequence is higher than what we've actually
89 * emitted. Then the fence is stale and signaled.
90 */
91
92 ret = ((atomic_read(&dev_priv->fence_seq) - sequence)
93 > VMW_FENCE_WRAP);
94
95 return ret;
96}
97
98int vmw_fallback_wait(struct vmw_private *dev_priv,
99 bool lazy,
100 bool fifo_idle,
101 uint32_t sequence,
102 bool interruptible,
103 unsigned long timeout)
104{
105 struct vmw_fifo_state *fifo_state = &dev_priv->fifo;
106
107 uint32_t count = 0;
108 uint32_t signal_seq;
109 int ret;
110 unsigned long end_jiffies = jiffies + timeout;
111 bool (*wait_condition)(struct vmw_private *, uint32_t);
112 DEFINE_WAIT(__wait);
113
114 wait_condition = (fifo_idle) ? &vmw_fifo_idle :
115 &vmw_fence_signaled;
116
117 /**
118 * Block command submission while waiting for idle.
119 */
120
121 if (fifo_idle)
122 down_read(&fifo_state->rwsem);
123 signal_seq = atomic_read(&dev_priv->fence_seq);
124 ret = 0;
125
126 for (;;) {
127 prepare_to_wait(&dev_priv->fence_queue, &__wait,
128 (interruptible) ?
129 TASK_INTERRUPTIBLE : TASK_UNINTERRUPTIBLE);
130 if (wait_condition(dev_priv, sequence))
131 break;
132 if (time_after_eq(jiffies, end_jiffies)) {
133 DRM_ERROR("SVGA device lockup.\n");
134 break;
135 }
136 if (lazy)
137 schedule_timeout(1);
138 else if ((++count & 0x0F) == 0) {
139 /**
140 * FIXME: Use schedule_hr_timeout here for
141 * newer kernels and lower CPU utilization.
142 */
143
144 __set_current_state(TASK_RUNNING);
145 schedule();
146 __set_current_state((interruptible) ?
147 TASK_INTERRUPTIBLE :
148 TASK_UNINTERRUPTIBLE);
149 }
150 if (interruptible && signal_pending(current)) {
151 ret = -ERESTARTSYS;
152 break;
153 }
154 }
155 finish_wait(&dev_priv->fence_queue, &__wait);
156 if (ret == 0 && fifo_idle) {
157 __le32 __iomem *fifo_mem = dev_priv->mmio_virt;
158 iowrite32(signal_seq, fifo_mem + SVGA_FIFO_FENCE);
159 }
160 wake_up_all(&dev_priv->fence_queue);
161 if (fifo_idle)
162 up_read(&fifo_state->rwsem);
163
164 return ret;
165}
166
167int vmw_wait_fence(struct vmw_private *dev_priv,
168 bool lazy, uint32_t sequence,
169 bool interruptible, unsigned long timeout)
170{
171 long ret;
172 unsigned long irq_flags;
173 struct vmw_fifo_state *fifo = &dev_priv->fifo;
174
175 if (likely(dev_priv->last_read_sequence - sequence < VMW_FENCE_WRAP))
176 return 0;
177
178 if (likely(vmw_fence_signaled(dev_priv, sequence)))
179 return 0;
180
181 vmw_fifo_ping_host(dev_priv, SVGA_SYNC_GENERIC);
182
183 if (!(fifo->capabilities & SVGA_FIFO_CAP_FENCE))
184 return vmw_fallback_wait(dev_priv, lazy, true, sequence,
185 interruptible, timeout);
186
187 if (!(dev_priv->capabilities & SVGA_CAP_IRQMASK))
188 return vmw_fallback_wait(dev_priv, lazy, false, sequence,
189 interruptible, timeout);
190
191 mutex_lock(&dev_priv->hw_mutex);
192 if (atomic_add_return(1, &dev_priv->fence_queue_waiters) > 0) {
193 spin_lock_irqsave(&dev_priv->irq_lock, irq_flags);
194 outl(SVGA_IRQFLAG_ANY_FENCE,
195 dev_priv->io_start + VMWGFX_IRQSTATUS_PORT);
196 vmw_write(dev_priv, SVGA_REG_IRQMASK,
197 vmw_read(dev_priv, SVGA_REG_IRQMASK) |
198 SVGA_IRQFLAG_ANY_FENCE);
199 spin_unlock_irqrestore(&dev_priv->irq_lock, irq_flags);
200 }
201 mutex_unlock(&dev_priv->hw_mutex);
202
203 if (interruptible)
204 ret = wait_event_interruptible_timeout
205 (dev_priv->fence_queue,
206 vmw_fence_signaled(dev_priv, sequence),
207 timeout);
208 else
209 ret = wait_event_timeout
210 (dev_priv->fence_queue,
211 vmw_fence_signaled(dev_priv, sequence),
212 timeout);
213
214 if (unlikely(ret == 0))
215 ret = -EBUSY;
216 else if (likely(ret > 0))
217 ret = 0;
218
219 mutex_lock(&dev_priv->hw_mutex);
220 if (atomic_dec_and_test(&dev_priv->fence_queue_waiters)) {
221 spin_lock_irqsave(&dev_priv->irq_lock, irq_flags);
222 vmw_write(dev_priv, SVGA_REG_IRQMASK,
223 vmw_read(dev_priv, SVGA_REG_IRQMASK) &
224 ~SVGA_IRQFLAG_ANY_FENCE);
225 spin_unlock_irqrestore(&dev_priv->irq_lock, irq_flags);
226 }
227 mutex_unlock(&dev_priv->hw_mutex);
228
229 return ret;
230}
231
232void vmw_irq_preinstall(struct drm_device *dev)
233{
234 struct vmw_private *dev_priv = vmw_priv(dev);
235 uint32_t status;
236
237 if (!(dev_priv->capabilities & SVGA_CAP_IRQMASK))
238 return;
239
240 spin_lock_init(&dev_priv->irq_lock);
241 status = inl(dev_priv->io_start + VMWGFX_IRQSTATUS_PORT);
242 outl(status, dev_priv->io_start + VMWGFX_IRQSTATUS_PORT);
243}
244
245int vmw_irq_postinstall(struct drm_device *dev)
246{
247 return 0;
248}
249
250void vmw_irq_uninstall(struct drm_device *dev)
251{
252 struct vmw_private *dev_priv = vmw_priv(dev);
253 uint32_t status;
254
255 if (!(dev_priv->capabilities & SVGA_CAP_IRQMASK))
256 return;
257
258 mutex_lock(&dev_priv->hw_mutex);
259 vmw_write(dev_priv, SVGA_REG_IRQMASK, 0);
260 mutex_unlock(&dev_priv->hw_mutex);
261
262 status = inl(dev_priv->io_start + VMWGFX_IRQSTATUS_PORT);
263 outl(status, dev_priv->io_start + VMWGFX_IRQSTATUS_PORT);
264}
265
266#define VMW_FENCE_WAIT_TIMEOUT 3*HZ;
267
268int vmw_fence_wait_ioctl(struct drm_device *dev, void *data,
269 struct drm_file *file_priv)
270{
271 struct drm_vmw_fence_wait_arg *arg =
272 (struct drm_vmw_fence_wait_arg *)data;
273 unsigned long timeout;
274
275 if (!arg->cookie_valid) {
276 arg->cookie_valid = 1;
277 arg->kernel_cookie = jiffies + VMW_FENCE_WAIT_TIMEOUT;
278 }
279
280 timeout = jiffies;
281 if (time_after_eq(timeout, (unsigned long)arg->kernel_cookie))
282 return -EBUSY;
283
284 timeout = (unsigned long)arg->kernel_cookie - timeout;
285 return vmw_wait_fence(vmw_priv(dev), true, arg->sequence, true, timeout);
286}
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c b/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c
new file mode 100644
index 000000000000..31f9afed0a63
--- /dev/null
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c
@@ -0,0 +1,880 @@
1/**************************************************************************
2 *
3 * Copyright © 2009 VMware, Inc., Palo Alto, CA., USA
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
21 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
22 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
23 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
24 * USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28#include "vmwgfx_kms.h"
29
30/* Might need a hrtimer here? */
31#define VMWGFX_PRESENT_RATE ((HZ / 60 > 0) ? HZ / 60 : 1)
32
33
34void vmw_display_unit_cleanup(struct vmw_display_unit *du)
35{
36 if (du->cursor_surface)
37 vmw_surface_unreference(&du->cursor_surface);
38 if (du->cursor_dmabuf)
39 vmw_dmabuf_unreference(&du->cursor_dmabuf);
40 drm_crtc_cleanup(&du->crtc);
41 drm_encoder_cleanup(&du->encoder);
42 drm_connector_cleanup(&du->connector);
43}
44
45/*
46 * Display Unit Cursor functions
47 */
48
49int vmw_cursor_update_image(struct vmw_private *dev_priv,
50 u32 *image, u32 width, u32 height,
51 u32 hotspotX, u32 hotspotY)
52{
53 struct {
54 u32 cmd;
55 SVGAFifoCmdDefineAlphaCursor cursor;
56 } *cmd;
57 u32 image_size = width * height * 4;
58 u32 cmd_size = sizeof(*cmd) + image_size;
59
60 if (!image)
61 return -EINVAL;
62
63 cmd = vmw_fifo_reserve(dev_priv, cmd_size);
64 if (unlikely(cmd == NULL)) {
65 DRM_ERROR("Fifo reserve failed.\n");
66 return -ENOMEM;
67 }
68
69 memset(cmd, 0, sizeof(*cmd));
70
71 memcpy(&cmd[1], image, image_size);
72
73 cmd->cmd = cpu_to_le32(SVGA_CMD_DEFINE_ALPHA_CURSOR);
74 cmd->cursor.id = cpu_to_le32(0);
75 cmd->cursor.width = cpu_to_le32(width);
76 cmd->cursor.height = cpu_to_le32(height);
77 cmd->cursor.hotspotX = cpu_to_le32(hotspotX);
78 cmd->cursor.hotspotY = cpu_to_le32(hotspotY);
79
80 vmw_fifo_commit(dev_priv, cmd_size);
81
82 return 0;
83}
84
85void vmw_cursor_update_position(struct vmw_private *dev_priv,
86 bool show, int x, int y)
87{
88 __le32 __iomem *fifo_mem = dev_priv->mmio_virt;
89 uint32_t count;
90
91 iowrite32(show ? 1 : 0, fifo_mem + SVGA_FIFO_CURSOR_ON);
92 iowrite32(x, fifo_mem + SVGA_FIFO_CURSOR_X);
93 iowrite32(y, fifo_mem + SVGA_FIFO_CURSOR_Y);
94 count = ioread32(fifo_mem + SVGA_FIFO_CURSOR_COUNT);
95 iowrite32(++count, fifo_mem + SVGA_FIFO_CURSOR_COUNT);
96}
97
98int vmw_du_crtc_cursor_set(struct drm_crtc *crtc, struct drm_file *file_priv,
99 uint32_t handle, uint32_t width, uint32_t height)
100{
101 struct vmw_private *dev_priv = vmw_priv(crtc->dev);
102 struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
103 struct vmw_display_unit *du = vmw_crtc_to_du(crtc);
104 struct vmw_surface *surface = NULL;
105 struct vmw_dma_buffer *dmabuf = NULL;
106 int ret;
107
108 if (handle) {
109 ret = vmw_user_surface_lookup_handle(dev_priv, tfile,
110 handle, &surface);
111 if (!ret) {
112 if (!surface->snooper.image) {
113 DRM_ERROR("surface not suitable for cursor\n");
114 return -EINVAL;
115 }
116 } else {
117 ret = vmw_user_dmabuf_lookup(tfile,
118 handle, &dmabuf);
119 if (ret) {
120 DRM_ERROR("failed to find surface or dmabuf: %i\n", ret);
121 return -EINVAL;
122 }
123 }
124 }
125
126 /* takedown old cursor */
127 if (du->cursor_surface) {
128 du->cursor_surface->snooper.crtc = NULL;
129 vmw_surface_unreference(&du->cursor_surface);
130 }
131 if (du->cursor_dmabuf)
132 vmw_dmabuf_unreference(&du->cursor_dmabuf);
133
134 /* setup new image */
135 if (surface) {
136 /* vmw_user_surface_lookup takes one reference */
137 du->cursor_surface = surface;
138
139 du->cursor_surface->snooper.crtc = crtc;
140 du->cursor_age = du->cursor_surface->snooper.age;
141 vmw_cursor_update_image(dev_priv, surface->snooper.image,
142 64, 64, du->hotspot_x, du->hotspot_y);
143 } else if (dmabuf) {
144 struct ttm_bo_kmap_obj map;
145 unsigned long kmap_offset;
146 unsigned long kmap_num;
147 void *virtual;
148 bool dummy;
149
150 /* vmw_user_surface_lookup takes one reference */
151 du->cursor_dmabuf = dmabuf;
152
153 kmap_offset = 0;
154 kmap_num = (64*64*4) >> PAGE_SHIFT;
155
156 ret = ttm_bo_reserve(&dmabuf->base, true, false, false, 0);
157 if (unlikely(ret != 0)) {
158 DRM_ERROR("reserve failed\n");
159 return -EINVAL;
160 }
161
162 ret = ttm_bo_kmap(&dmabuf->base, kmap_offset, kmap_num, &map);
163 if (unlikely(ret != 0))
164 goto err_unreserve;
165
166 virtual = ttm_kmap_obj_virtual(&map, &dummy);
167 vmw_cursor_update_image(dev_priv, virtual, 64, 64,
168 du->hotspot_x, du->hotspot_y);
169
170 ttm_bo_kunmap(&map);
171err_unreserve:
172 ttm_bo_unreserve(&dmabuf->base);
173
174 } else {
175 vmw_cursor_update_position(dev_priv, false, 0, 0);
176 return 0;
177 }
178
179 vmw_cursor_update_position(dev_priv, true, du->cursor_x, du->cursor_y);
180
181 return 0;
182}
183
184int vmw_du_crtc_cursor_move(struct drm_crtc *crtc, int x, int y)
185{
186 struct vmw_private *dev_priv = vmw_priv(crtc->dev);
187 struct vmw_display_unit *du = vmw_crtc_to_du(crtc);
188 bool shown = du->cursor_surface || du->cursor_dmabuf ? true : false;
189
190 du->cursor_x = x + crtc->x;
191 du->cursor_y = y + crtc->y;
192
193 vmw_cursor_update_position(dev_priv, shown,
194 du->cursor_x, du->cursor_y);
195
196 return 0;
197}
198
199void vmw_kms_cursor_snoop(struct vmw_surface *srf,
200 struct ttm_object_file *tfile,
201 struct ttm_buffer_object *bo,
202 SVGA3dCmdHeader *header)
203{
204 struct ttm_bo_kmap_obj map;
205 unsigned long kmap_offset;
206 unsigned long kmap_num;
207 SVGA3dCopyBox *box;
208 unsigned box_count;
209 void *virtual;
210 bool dummy;
211 struct vmw_dma_cmd {
212 SVGA3dCmdHeader header;
213 SVGA3dCmdSurfaceDMA dma;
214 } *cmd;
215 int ret;
216
217 cmd = container_of(header, struct vmw_dma_cmd, header);
218
219 /* No snooper installed */
220 if (!srf->snooper.image)
221 return;
222
223 if (cmd->dma.host.face != 0 || cmd->dma.host.mipmap != 0) {
224 DRM_ERROR("face and mipmap for cursors should never != 0\n");
225 return;
226 }
227
228 if (cmd->header.size < 64) {
229 DRM_ERROR("at least one full copy box must be given\n");
230 return;
231 }
232
233 box = (SVGA3dCopyBox *)&cmd[1];
234 box_count = (cmd->header.size - sizeof(SVGA3dCmdSurfaceDMA)) /
235 sizeof(SVGA3dCopyBox);
236
237 if (cmd->dma.guest.pitch != (64 * 4) ||
238 cmd->dma.guest.ptr.offset % PAGE_SIZE ||
239 box->x != 0 || box->y != 0 || box->z != 0 ||
240 box->srcx != 0 || box->srcy != 0 || box->srcz != 0 ||
241 box->w != 64 || box->h != 64 || box->d != 1 ||
242 box_count != 1) {
243 /* TODO handle none page aligned offsets */
244 /* TODO handle partial uploads and pitch != 256 */
245 /* TODO handle more then one copy (size != 64) */
246 DRM_ERROR("lazy programer, cant handle wierd stuff\n");
247 return;
248 }
249
250 kmap_offset = cmd->dma.guest.ptr.offset >> PAGE_SHIFT;
251 kmap_num = (64*64*4) >> PAGE_SHIFT;
252
253 ret = ttm_bo_reserve(bo, true, false, false, 0);
254 if (unlikely(ret != 0)) {
255 DRM_ERROR("reserve failed\n");
256 return;
257 }
258
259 ret = ttm_bo_kmap(bo, kmap_offset, kmap_num, &map);
260 if (unlikely(ret != 0))
261 goto err_unreserve;
262
263 virtual = ttm_kmap_obj_virtual(&map, &dummy);
264
265 memcpy(srf->snooper.image, virtual, 64*64*4);
266 srf->snooper.age++;
267
268 /* we can't call this function from this function since execbuf has
269 * reserved fifo space.
270 *
271 * if (srf->snooper.crtc)
272 * vmw_ldu_crtc_cursor_update_image(dev_priv,
273 * srf->snooper.image, 64, 64,
274 * du->hotspot_x, du->hotspot_y);
275 */
276
277 ttm_bo_kunmap(&map);
278err_unreserve:
279 ttm_bo_unreserve(bo);
280}
281
282void vmw_kms_cursor_post_execbuf(struct vmw_private *dev_priv)
283{
284 struct drm_device *dev = dev_priv->dev;
285 struct vmw_display_unit *du;
286 struct drm_crtc *crtc;
287
288 mutex_lock(&dev->mode_config.mutex);
289
290 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
291 du = vmw_crtc_to_du(crtc);
292 if (!du->cursor_surface ||
293 du->cursor_age == du->cursor_surface->snooper.age)
294 continue;
295
296 du->cursor_age = du->cursor_surface->snooper.age;
297 vmw_cursor_update_image(dev_priv,
298 du->cursor_surface->snooper.image,
299 64, 64, du->hotspot_x, du->hotspot_y);
300 }
301
302 mutex_unlock(&dev->mode_config.mutex);
303}
304
305/*
306 * Generic framebuffer code
307 */
308
309int vmw_framebuffer_create_handle(struct drm_framebuffer *fb,
310 struct drm_file *file_priv,
311 unsigned int *handle)
312{
313 if (handle)
314 handle = 0;
315
316 return 0;
317}
318
319/*
320 * Surface framebuffer code
321 */
322
323#define vmw_framebuffer_to_vfbs(x) \
324 container_of(x, struct vmw_framebuffer_surface, base.base)
325
326struct vmw_framebuffer_surface {
327 struct vmw_framebuffer base;
328 struct vmw_surface *surface;
329 struct delayed_work d_work;
330 struct mutex work_lock;
331 bool present_fs;
332};
333
334void vmw_framebuffer_surface_destroy(struct drm_framebuffer *framebuffer)
335{
336 struct vmw_framebuffer_surface *vfb =
337 vmw_framebuffer_to_vfbs(framebuffer);
338
339 cancel_delayed_work_sync(&vfb->d_work);
340 drm_framebuffer_cleanup(framebuffer);
341 vmw_surface_unreference(&vfb->surface);
342
343 kfree(framebuffer);
344}
345
346static void vmw_framebuffer_present_fs_callback(struct work_struct *work)
347{
348 struct delayed_work *d_work =
349 container_of(work, struct delayed_work, work);
350 struct vmw_framebuffer_surface *vfbs =
351 container_of(d_work, struct vmw_framebuffer_surface, d_work);
352 struct vmw_surface *surf = vfbs->surface;
353 struct drm_framebuffer *framebuffer = &vfbs->base.base;
354 struct vmw_private *dev_priv = vmw_priv(framebuffer->dev);
355
356 struct {
357 SVGA3dCmdHeader header;
358 SVGA3dCmdPresent body;
359 SVGA3dCopyRect cr;
360 } *cmd;
361
362 mutex_lock(&vfbs->work_lock);
363 if (!vfbs->present_fs)
364 goto out_unlock;
365
366 cmd = vmw_fifo_reserve(dev_priv, sizeof(*cmd));
367 if (unlikely(cmd == NULL))
368 goto out_resched;
369
370 cmd->header.id = cpu_to_le32(SVGA_3D_CMD_PRESENT);
371 cmd->header.size = cpu_to_le32(sizeof(cmd->body) + sizeof(cmd->cr));
372 cmd->body.sid = cpu_to_le32(surf->res.id);
373 cmd->cr.x = cpu_to_le32(0);
374 cmd->cr.y = cpu_to_le32(0);
375 cmd->cr.srcx = cmd->cr.x;
376 cmd->cr.srcy = cmd->cr.y;
377 cmd->cr.w = cpu_to_le32(framebuffer->width);
378 cmd->cr.h = cpu_to_le32(framebuffer->height);
379 vfbs->present_fs = false;
380 vmw_fifo_commit(dev_priv, sizeof(*cmd));
381out_resched:
382 /**
383 * Will not re-add if already pending.
384 */
385 schedule_delayed_work(&vfbs->d_work, VMWGFX_PRESENT_RATE);
386out_unlock:
387 mutex_unlock(&vfbs->work_lock);
388}
389
390
391int vmw_framebuffer_surface_dirty(struct drm_framebuffer *framebuffer,
392 unsigned flags, unsigned color,
393 struct drm_clip_rect *clips,
394 unsigned num_clips)
395{
396 struct vmw_private *dev_priv = vmw_priv(framebuffer->dev);
397 struct vmw_framebuffer_surface *vfbs =
398 vmw_framebuffer_to_vfbs(framebuffer);
399 struct vmw_surface *surf = vfbs->surface;
400 struct drm_clip_rect norect;
401 SVGA3dCopyRect *cr;
402 int i, inc = 1;
403
404 struct {
405 SVGA3dCmdHeader header;
406 SVGA3dCmdPresent body;
407 SVGA3dCopyRect cr;
408 } *cmd;
409
410 if (!num_clips ||
411 !(dev_priv->fifo.capabilities &
412 SVGA_FIFO_CAP_SCREEN_OBJECT)) {
413 int ret;
414
415 mutex_lock(&vfbs->work_lock);
416 vfbs->present_fs = true;
417 ret = schedule_delayed_work(&vfbs->d_work, VMWGFX_PRESENT_RATE);
418 mutex_unlock(&vfbs->work_lock);
419 if (ret) {
420 /**
421 * No work pending, Force immediate present.
422 */
423 vmw_framebuffer_present_fs_callback(&vfbs->d_work.work);
424 }
425 return 0;
426 }
427
428 if (!num_clips) {
429 num_clips = 1;
430 clips = &norect;
431 norect.x1 = norect.y1 = 0;
432 norect.x2 = framebuffer->width;
433 norect.y2 = framebuffer->height;
434 } else if (flags & DRM_MODE_FB_DIRTY_ANNOTATE_COPY) {
435 num_clips /= 2;
436 inc = 2; /* skip source rects */
437 }
438
439 cmd = vmw_fifo_reserve(dev_priv, sizeof(*cmd) + (num_clips - 1) * sizeof(cmd->cr));
440 if (unlikely(cmd == NULL)) {
441 DRM_ERROR("Fifo reserve failed.\n");
442 return -ENOMEM;
443 }
444
445 memset(cmd, 0, sizeof(*cmd));
446
447 cmd->header.id = cpu_to_le32(SVGA_3D_CMD_PRESENT);
448 cmd->header.size = cpu_to_le32(sizeof(cmd->body) + num_clips * sizeof(cmd->cr));
449 cmd->body.sid = cpu_to_le32(surf->res.id);
450
451 for (i = 0, cr = &cmd->cr; i < num_clips; i++, cr++, clips += inc) {
452 cr->x = cpu_to_le16(clips->x1);
453 cr->y = cpu_to_le16(clips->y1);
454 cr->srcx = cr->x;
455 cr->srcy = cr->y;
456 cr->w = cpu_to_le16(clips->x2 - clips->x1);
457 cr->h = cpu_to_le16(clips->y2 - clips->y1);
458 }
459
460 vmw_fifo_commit(dev_priv, sizeof(*cmd) + (num_clips - 1) * sizeof(cmd->cr));
461
462 return 0;
463}
464
465static struct drm_framebuffer_funcs vmw_framebuffer_surface_funcs = {
466 .destroy = vmw_framebuffer_surface_destroy,
467 .dirty = vmw_framebuffer_surface_dirty,
468 .create_handle = vmw_framebuffer_create_handle,
469};
470
471int vmw_kms_new_framebuffer_surface(struct vmw_private *dev_priv,
472 struct vmw_surface *surface,
473 struct vmw_framebuffer **out,
474 unsigned width, unsigned height)
475
476{
477 struct drm_device *dev = dev_priv->dev;
478 struct vmw_framebuffer_surface *vfbs;
479 int ret;
480
481 vfbs = kzalloc(sizeof(*vfbs), GFP_KERNEL);
482 if (!vfbs) {
483 ret = -ENOMEM;
484 goto out_err1;
485 }
486
487 ret = drm_framebuffer_init(dev, &vfbs->base.base,
488 &vmw_framebuffer_surface_funcs);
489 if (ret)
490 goto out_err2;
491
492 if (!vmw_surface_reference(surface)) {
493 DRM_ERROR("failed to reference surface %p\n", surface);
494 goto out_err3;
495 }
496
497 /* XXX get the first 3 from the surface info */
498 vfbs->base.base.bits_per_pixel = 32;
499 vfbs->base.base.pitch = width * 32 / 4;
500 vfbs->base.base.depth = 24;
501 vfbs->base.base.width = width;
502 vfbs->base.base.height = height;
503 vfbs->base.pin = NULL;
504 vfbs->base.unpin = NULL;
505 vfbs->surface = surface;
506 mutex_init(&vfbs->work_lock);
507 INIT_DELAYED_WORK(&vfbs->d_work, &vmw_framebuffer_present_fs_callback);
508 *out = &vfbs->base;
509
510 return 0;
511
512out_err3:
513 drm_framebuffer_cleanup(&vfbs->base.base);
514out_err2:
515 kfree(vfbs);
516out_err1:
517 return ret;
518}
519
520/*
521 * Dmabuf framebuffer code
522 */
523
524#define vmw_framebuffer_to_vfbd(x) \
525 container_of(x, struct vmw_framebuffer_dmabuf, base.base)
526
527struct vmw_framebuffer_dmabuf {
528 struct vmw_framebuffer base;
529 struct vmw_dma_buffer *buffer;
530};
531
532void vmw_framebuffer_dmabuf_destroy(struct drm_framebuffer *framebuffer)
533{
534 struct vmw_framebuffer_dmabuf *vfbd =
535 vmw_framebuffer_to_vfbd(framebuffer);
536
537 drm_framebuffer_cleanup(framebuffer);
538 vmw_dmabuf_unreference(&vfbd->buffer);
539
540 kfree(vfbd);
541}
542
543int vmw_framebuffer_dmabuf_dirty(struct drm_framebuffer *framebuffer,
544 unsigned flags, unsigned color,
545 struct drm_clip_rect *clips,
546 unsigned num_clips)
547{
548 struct vmw_private *dev_priv = vmw_priv(framebuffer->dev);
549 struct drm_clip_rect norect;
550 struct {
551 uint32_t header;
552 SVGAFifoCmdUpdate body;
553 } *cmd;
554 int i, increment = 1;
555
556 if (!num_clips) {
557 num_clips = 1;
558 clips = &norect;
559 norect.x1 = norect.y1 = 0;
560 norect.x2 = framebuffer->width;
561 norect.y2 = framebuffer->height;
562 } else if (flags & DRM_MODE_FB_DIRTY_ANNOTATE_COPY) {
563 num_clips /= 2;
564 increment = 2;
565 }
566
567 cmd = vmw_fifo_reserve(dev_priv, sizeof(*cmd) * num_clips);
568 if (unlikely(cmd == NULL)) {
569 DRM_ERROR("Fifo reserve failed.\n");
570 return -ENOMEM;
571 }
572
573 for (i = 0; i < num_clips; i++, clips += increment) {
574 cmd[i].header = cpu_to_le32(SVGA_CMD_UPDATE);
575 cmd[i].body.x = cpu_to_le32(clips->x1);
576 cmd[i].body.y = cpu_to_le32(clips->y1);
577 cmd[i].body.width = cpu_to_le32(clips->x2 - clips->x1);
578 cmd[i].body.height = cpu_to_le32(clips->y2 - clips->y1);
579 }
580
581 vmw_fifo_commit(dev_priv, sizeof(*cmd) * num_clips);
582
583 return 0;
584}
585
586static struct drm_framebuffer_funcs vmw_framebuffer_dmabuf_funcs = {
587 .destroy = vmw_framebuffer_dmabuf_destroy,
588 .dirty = vmw_framebuffer_dmabuf_dirty,
589 .create_handle = vmw_framebuffer_create_handle,
590};
591
592static int vmw_framebuffer_dmabuf_pin(struct vmw_framebuffer *vfb)
593{
594 struct vmw_private *dev_priv = vmw_priv(vfb->base.dev);
595 struct vmw_framebuffer_dmabuf *vfbd =
596 vmw_framebuffer_to_vfbd(&vfb->base);
597 int ret;
598
599 vmw_overlay_pause_all(dev_priv);
600
601 ret = vmw_dmabuf_to_start_of_vram(dev_priv, vfbd->buffer);
602
603 if (dev_priv->capabilities & SVGA_CAP_MULTIMON) {
604 vmw_write(dev_priv, SVGA_REG_NUM_GUEST_DISPLAYS, 1);
605 vmw_write(dev_priv, SVGA_REG_DISPLAY_ID, 0);
606 vmw_write(dev_priv, SVGA_REG_DISPLAY_IS_PRIMARY, true);
607 vmw_write(dev_priv, SVGA_REG_DISPLAY_POSITION_X, 0);
608 vmw_write(dev_priv, SVGA_REG_DISPLAY_POSITION_Y, 0);
609 vmw_write(dev_priv, SVGA_REG_DISPLAY_WIDTH, 0);
610 vmw_write(dev_priv, SVGA_REG_DISPLAY_HEIGHT, 0);
611 vmw_write(dev_priv, SVGA_REG_DISPLAY_ID, SVGA_ID_INVALID);
612
613 vmw_write(dev_priv, SVGA_REG_ENABLE, 1);
614 vmw_write(dev_priv, SVGA_REG_WIDTH, vfb->base.width);
615 vmw_write(dev_priv, SVGA_REG_HEIGHT, vfb->base.height);
616 vmw_write(dev_priv, SVGA_REG_BITS_PER_PIXEL, vfb->base.bits_per_pixel);
617 vmw_write(dev_priv, SVGA_REG_DEPTH, vfb->base.depth);
618 vmw_write(dev_priv, SVGA_REG_RED_MASK, 0x00ff0000);
619 vmw_write(dev_priv, SVGA_REG_GREEN_MASK, 0x0000ff00);
620 vmw_write(dev_priv, SVGA_REG_BLUE_MASK, 0x000000ff);
621 } else
622 WARN_ON(true);
623
624 vmw_overlay_resume_all(dev_priv);
625
626 return 0;
627}
628
629static int vmw_framebuffer_dmabuf_unpin(struct vmw_framebuffer *vfb)
630{
631 struct vmw_private *dev_priv = vmw_priv(vfb->base.dev);
632 struct vmw_framebuffer_dmabuf *vfbd =
633 vmw_framebuffer_to_vfbd(&vfb->base);
634
635 if (!vfbd->buffer) {
636 WARN_ON(!vfbd->buffer);
637 return 0;
638 }
639
640 return vmw_dmabuf_from_vram(dev_priv, vfbd->buffer);
641}
642
643int vmw_kms_new_framebuffer_dmabuf(struct vmw_private *dev_priv,
644 struct vmw_dma_buffer *dmabuf,
645 struct vmw_framebuffer **out,
646 unsigned width, unsigned height)
647
648{
649 struct drm_device *dev = dev_priv->dev;
650 struct vmw_framebuffer_dmabuf *vfbd;
651 int ret;
652
653 vfbd = kzalloc(sizeof(*vfbd), GFP_KERNEL);
654 if (!vfbd) {
655 ret = -ENOMEM;
656 goto out_err1;
657 }
658
659 ret = drm_framebuffer_init(dev, &vfbd->base.base,
660 &vmw_framebuffer_dmabuf_funcs);
661 if (ret)
662 goto out_err2;
663
664 if (!vmw_dmabuf_reference(dmabuf)) {
665 DRM_ERROR("failed to reference dmabuf %p\n", dmabuf);
666 goto out_err3;
667 }
668
669 /* XXX get the first 3 from the surface info */
670 vfbd->base.base.bits_per_pixel = 32;
671 vfbd->base.base.pitch = width * 32 / 4;
672 vfbd->base.base.depth = 24;
673 vfbd->base.base.width = width;
674 vfbd->base.base.height = height;
675 vfbd->base.pin = vmw_framebuffer_dmabuf_pin;
676 vfbd->base.unpin = vmw_framebuffer_dmabuf_unpin;
677 vfbd->buffer = dmabuf;
678 *out = &vfbd->base;
679
680 return 0;
681
682out_err3:
683 drm_framebuffer_cleanup(&vfbd->base.base);
684out_err2:
685 kfree(vfbd);
686out_err1:
687 return ret;
688}
689
690/*
691 * Generic Kernel modesetting functions
692 */
693
694static struct drm_framebuffer *vmw_kms_fb_create(struct drm_device *dev,
695 struct drm_file *file_priv,
696 struct drm_mode_fb_cmd *mode_cmd)
697{
698 struct vmw_private *dev_priv = vmw_priv(dev);
699 struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
700 struct vmw_framebuffer *vfb = NULL;
701 struct vmw_surface *surface = NULL;
702 struct vmw_dma_buffer *bo = NULL;
703 int ret;
704
705 ret = vmw_user_surface_lookup_handle(dev_priv, tfile,
706 mode_cmd->handle, &surface);
707 if (ret)
708 goto try_dmabuf;
709
710 if (!surface->scanout)
711 goto err_not_scanout;
712
713 ret = vmw_kms_new_framebuffer_surface(dev_priv, surface, &vfb,
714 mode_cmd->width, mode_cmd->height);
715
716 /* vmw_user_surface_lookup takes one ref so does new_fb */
717 vmw_surface_unreference(&surface);
718
719 if (ret) {
720 DRM_ERROR("failed to create vmw_framebuffer: %i\n", ret);
721 return NULL;
722 }
723 return &vfb->base;
724
725try_dmabuf:
726 DRM_INFO("%s: trying buffer\n", __func__);
727
728 ret = vmw_user_dmabuf_lookup(tfile, mode_cmd->handle, &bo);
729 if (ret) {
730 DRM_ERROR("failed to find buffer: %i\n", ret);
731 return NULL;
732 }
733
734 ret = vmw_kms_new_framebuffer_dmabuf(dev_priv, bo, &vfb,
735 mode_cmd->width, mode_cmd->height);
736
737 /* vmw_user_dmabuf_lookup takes one ref so does new_fb */
738 vmw_dmabuf_unreference(&bo);
739
740 if (ret) {
741 DRM_ERROR("failed to create vmw_framebuffer: %i\n", ret);
742 return NULL;
743 }
744
745 return &vfb->base;
746
747err_not_scanout:
748 DRM_ERROR("surface not marked as scanout\n");
749 /* vmw_user_surface_lookup takes one ref */
750 vmw_surface_unreference(&surface);
751
752 return NULL;
753}
754
755static int vmw_kms_fb_changed(struct drm_device *dev)
756{
757 return 0;
758}
759
760static struct drm_mode_config_funcs vmw_kms_funcs = {
761 .fb_create = vmw_kms_fb_create,
762 .fb_changed = vmw_kms_fb_changed,
763};
764
765int vmw_kms_init(struct vmw_private *dev_priv)
766{
767 struct drm_device *dev = dev_priv->dev;
768 int ret;
769
770 drm_mode_config_init(dev);
771 dev->mode_config.funcs = &vmw_kms_funcs;
772 dev->mode_config.min_width = 1;
773 dev->mode_config.min_height = 1;
774 dev->mode_config.max_width = dev_priv->fb_max_width;
775 dev->mode_config.max_height = dev_priv->fb_max_height;
776
777 ret = vmw_kms_init_legacy_display_system(dev_priv);
778
779 return 0;
780}
781
782int vmw_kms_close(struct vmw_private *dev_priv)
783{
784 /*
785 * Docs says we should take the lock before calling this function
786 * but since it destroys encoders and our destructor calls
787 * drm_encoder_cleanup which takes the lock we deadlock.
788 */
789 drm_mode_config_cleanup(dev_priv->dev);
790 vmw_kms_close_legacy_display_system(dev_priv);
791 return 0;
792}
793
794int vmw_kms_cursor_bypass_ioctl(struct drm_device *dev, void *data,
795 struct drm_file *file_priv)
796{
797 struct drm_vmw_cursor_bypass_arg *arg = data;
798 struct vmw_display_unit *du;
799 struct drm_mode_object *obj;
800 struct drm_crtc *crtc;
801 int ret = 0;
802
803
804 mutex_lock(&dev->mode_config.mutex);
805 if (arg->flags & DRM_VMW_CURSOR_BYPASS_ALL) {
806
807 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
808 du = vmw_crtc_to_du(crtc);
809 du->hotspot_x = arg->xhot;
810 du->hotspot_y = arg->yhot;
811 }
812
813 mutex_unlock(&dev->mode_config.mutex);
814 return 0;
815 }
816
817 obj = drm_mode_object_find(dev, arg->crtc_id, DRM_MODE_OBJECT_CRTC);
818 if (!obj) {
819 ret = -EINVAL;
820 goto out;
821 }
822
823 crtc = obj_to_crtc(obj);
824 du = vmw_crtc_to_du(crtc);
825
826 du->hotspot_x = arg->xhot;
827 du->hotspot_y = arg->yhot;
828
829out:
830 mutex_unlock(&dev->mode_config.mutex);
831
832 return ret;
833}
834
835int vmw_kms_save_vga(struct vmw_private *vmw_priv)
836{
837 /*
838 * setup a single multimon monitor with the size
839 * of 0x0, this stops the UI from resizing when we
840 * change the framebuffer size
841 */
842 if (vmw_priv->capabilities & SVGA_CAP_MULTIMON) {
843 vmw_write(vmw_priv, SVGA_REG_NUM_GUEST_DISPLAYS, 1);
844 vmw_write(vmw_priv, SVGA_REG_DISPLAY_ID, 0);
845 vmw_write(vmw_priv, SVGA_REG_DISPLAY_IS_PRIMARY, true);
846 vmw_write(vmw_priv, SVGA_REG_DISPLAY_POSITION_X, 0);
847 vmw_write(vmw_priv, SVGA_REG_DISPLAY_POSITION_Y, 0);
848 vmw_write(vmw_priv, SVGA_REG_DISPLAY_WIDTH, 0);
849 vmw_write(vmw_priv, SVGA_REG_DISPLAY_HEIGHT, 0);
850 vmw_write(vmw_priv, SVGA_REG_DISPLAY_ID, SVGA_ID_INVALID);
851 }
852
853 vmw_priv->vga_width = vmw_read(vmw_priv, SVGA_REG_WIDTH);
854 vmw_priv->vga_height = vmw_read(vmw_priv, SVGA_REG_HEIGHT);
855 vmw_priv->vga_bpp = vmw_read(vmw_priv, SVGA_REG_BITS_PER_PIXEL);
856 vmw_priv->vga_depth = vmw_read(vmw_priv, SVGA_REG_DEPTH);
857 vmw_priv->vga_pseudo = vmw_read(vmw_priv, SVGA_REG_PSEUDOCOLOR);
858 vmw_priv->vga_red_mask = vmw_read(vmw_priv, SVGA_REG_RED_MASK);
859 vmw_priv->vga_green_mask = vmw_read(vmw_priv, SVGA_REG_GREEN_MASK);
860 vmw_priv->vga_blue_mask = vmw_read(vmw_priv, SVGA_REG_BLUE_MASK);
861
862 return 0;
863}
864
865int vmw_kms_restore_vga(struct vmw_private *vmw_priv)
866{
867 vmw_write(vmw_priv, SVGA_REG_WIDTH, vmw_priv->vga_width);
868 vmw_write(vmw_priv, SVGA_REG_HEIGHT, vmw_priv->vga_height);
869 vmw_write(vmw_priv, SVGA_REG_BITS_PER_PIXEL, vmw_priv->vga_bpp);
870 vmw_write(vmw_priv, SVGA_REG_DEPTH, vmw_priv->vga_depth);
871 vmw_write(vmw_priv, SVGA_REG_PSEUDOCOLOR, vmw_priv->vga_pseudo);
872 vmw_write(vmw_priv, SVGA_REG_RED_MASK, vmw_priv->vga_red_mask);
873 vmw_write(vmw_priv, SVGA_REG_GREEN_MASK, vmw_priv->vga_green_mask);
874 vmw_write(vmw_priv, SVGA_REG_BLUE_MASK, vmw_priv->vga_blue_mask);
875
876 /* TODO check for multimon */
877 vmw_write(vmw_priv, SVGA_REG_NUM_GUEST_DISPLAYS, 0);
878
879 return 0;
880}
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_kms.h b/drivers/gpu/drm/vmwgfx/vmwgfx_kms.h
new file mode 100644
index 000000000000..8b95249f0531
--- /dev/null
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_kms.h
@@ -0,0 +1,102 @@
1/**************************************************************************
2 *
3 * Copyright © 2009 VMware, Inc., Palo Alto, CA., USA
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
21 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
22 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
23 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
24 * USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28#ifndef VMWGFX_KMS_H_
29#define VMWGFX_KMS_H_
30
31#include "drmP.h"
32#include "vmwgfx_drv.h"
33
34
35#define vmw_framebuffer_to_vfb(x) \
36 container_of(x, struct vmw_framebuffer, base)
37
38/**
39 * Base class for framebuffers
40 *
41 * @pin is called the when ever a crtc uses this framebuffer
42 * @unpin is called
43 */
44struct vmw_framebuffer {
45 struct drm_framebuffer base;
46 int (*pin)(struct vmw_framebuffer *fb);
47 int (*unpin)(struct vmw_framebuffer *fb);
48};
49
50
51#define vmw_crtc_to_du(x) \
52 container_of(x, struct vmw_display_unit, crtc)
53
54/*
55 * Basic cursor manipulation
56 */
57int vmw_cursor_update_image(struct vmw_private *dev_priv,
58 u32 *image, u32 width, u32 height,
59 u32 hotspotX, u32 hotspotY);
60void vmw_cursor_update_position(struct vmw_private *dev_priv,
61 bool show, int x, int y);
62
63/**
64 * Base class display unit.
65 *
66 * Since the SVGA hw doesn't have a concept of a crtc, encoder or connector
67 * so the display unit is all of them at the same time. This is true for both
68 * legacy multimon and screen objects.
69 */
70struct vmw_display_unit {
71 struct drm_crtc crtc;
72 struct drm_encoder encoder;
73 struct drm_connector connector;
74
75 struct vmw_surface *cursor_surface;
76 struct vmw_dma_buffer *cursor_dmabuf;
77 size_t cursor_age;
78
79 int cursor_x;
80 int cursor_y;
81
82 int hotspot_x;
83 int hotspot_y;
84
85 unsigned unit;
86};
87
88/*
89 * Shared display unit functions - vmwgfx_kms.c
90 */
91void vmw_display_unit_cleanup(struct vmw_display_unit *du);
92int vmw_du_crtc_cursor_set(struct drm_crtc *crtc, struct drm_file *file_priv,
93 uint32_t handle, uint32_t width, uint32_t height);
94int vmw_du_crtc_cursor_move(struct drm_crtc *crtc, int x, int y);
95
96/*
97 * Legacy display unit functions - vmwgfx_ldu.h
98 */
99int vmw_kms_init_legacy_display_system(struct vmw_private *dev_priv);
100int vmw_kms_close_legacy_display_system(struct vmw_private *dev_priv);
101
102#endif
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c b/drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c
new file mode 100644
index 000000000000..90891593bf6c
--- /dev/null
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c
@@ -0,0 +1,516 @@
1/**************************************************************************
2 *
3 * Copyright © 2009 VMware, Inc., Palo Alto, CA., USA
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
21 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
22 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
23 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
24 * USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28#include "vmwgfx_kms.h"
29
30#define vmw_crtc_to_ldu(x) \
31 container_of(x, struct vmw_legacy_display_unit, base.crtc)
32#define vmw_encoder_to_ldu(x) \
33 container_of(x, struct vmw_legacy_display_unit, base.encoder)
34#define vmw_connector_to_ldu(x) \
35 container_of(x, struct vmw_legacy_display_unit, base.connector)
36
37struct vmw_legacy_display {
38 struct list_head active;
39
40 unsigned num_active;
41
42 struct vmw_framebuffer *fb;
43};
44
45/**
46 * Display unit using the legacy register interface.
47 */
48struct vmw_legacy_display_unit {
49 struct vmw_display_unit base;
50
51 struct list_head active;
52
53 unsigned unit;
54};
55
56static void vmw_ldu_destroy(struct vmw_legacy_display_unit *ldu)
57{
58 list_del_init(&ldu->active);
59 vmw_display_unit_cleanup(&ldu->base);
60 kfree(ldu);
61}
62
63
64/*
65 * Legacy Display Unit CRTC functions
66 */
67
68static void vmw_ldu_crtc_save(struct drm_crtc *crtc)
69{
70}
71
72static void vmw_ldu_crtc_restore(struct drm_crtc *crtc)
73{
74}
75
76static void vmw_ldu_crtc_gamma_set(struct drm_crtc *crtc,
77 u16 *r, u16 *g, u16 *b,
78 uint32_t size)
79{
80}
81
82static void vmw_ldu_crtc_destroy(struct drm_crtc *crtc)
83{
84 vmw_ldu_destroy(vmw_crtc_to_ldu(crtc));
85}
86
87static int vmw_ldu_commit_list(struct vmw_private *dev_priv)
88{
89 struct vmw_legacy_display *lds = dev_priv->ldu_priv;
90 struct vmw_legacy_display_unit *entry;
91 struct drm_crtc *crtc;
92 int i = 0;
93
94 /* to stop the screen from changing size on resize */
95 vmw_write(dev_priv, SVGA_REG_NUM_GUEST_DISPLAYS, 0);
96 for (i = 0; i < lds->num_active; i++) {
97 vmw_write(dev_priv, SVGA_REG_DISPLAY_ID, i);
98 vmw_write(dev_priv, SVGA_REG_DISPLAY_IS_PRIMARY, !i);
99 vmw_write(dev_priv, SVGA_REG_DISPLAY_POSITION_X, 0);
100 vmw_write(dev_priv, SVGA_REG_DISPLAY_POSITION_Y, 0);
101 vmw_write(dev_priv, SVGA_REG_DISPLAY_WIDTH, 0);
102 vmw_write(dev_priv, SVGA_REG_DISPLAY_HEIGHT, 0);
103 vmw_write(dev_priv, SVGA_REG_DISPLAY_ID, SVGA_ID_INVALID);
104 }
105
106 /* Now set the mode */
107 vmw_write(dev_priv, SVGA_REG_NUM_GUEST_DISPLAYS, lds->num_active);
108 i = 0;
109 list_for_each_entry(entry, &lds->active, active) {
110 crtc = &entry->base.crtc;
111
112 vmw_write(dev_priv, SVGA_REG_DISPLAY_ID, i);
113 vmw_write(dev_priv, SVGA_REG_DISPLAY_IS_PRIMARY, !i);
114 vmw_write(dev_priv, SVGA_REG_DISPLAY_POSITION_X, crtc->x);
115 vmw_write(dev_priv, SVGA_REG_DISPLAY_POSITION_Y, crtc->y);
116 vmw_write(dev_priv, SVGA_REG_DISPLAY_WIDTH, crtc->mode.hdisplay);
117 vmw_write(dev_priv, SVGA_REG_DISPLAY_HEIGHT, crtc->mode.vdisplay);
118 vmw_write(dev_priv, SVGA_REG_DISPLAY_ID, SVGA_ID_INVALID);
119
120 i++;
121 }
122
123 return 0;
124}
125
126static int vmw_ldu_del_active(struct vmw_private *vmw_priv,
127 struct vmw_legacy_display_unit *ldu)
128{
129 struct vmw_legacy_display *ld = vmw_priv->ldu_priv;
130 if (list_empty(&ldu->active))
131 return 0;
132
133 list_del_init(&ldu->active);
134 if (--(ld->num_active) == 0) {
135 BUG_ON(!ld->fb);
136 if (ld->fb->unpin)
137 ld->fb->unpin(ld->fb);
138 ld->fb = NULL;
139 }
140
141 return 0;
142}
143
144static int vmw_ldu_add_active(struct vmw_private *vmw_priv,
145 struct vmw_legacy_display_unit *ldu,
146 struct vmw_framebuffer *vfb)
147{
148 struct vmw_legacy_display *ld = vmw_priv->ldu_priv;
149 struct vmw_legacy_display_unit *entry;
150 struct list_head *at;
151
152 if (!list_empty(&ldu->active))
153 return 0;
154
155 at = &ld->active;
156 list_for_each_entry(entry, &ld->active, active) {
157 if (entry->unit > ldu->unit)
158 break;
159
160 at = &entry->active;
161 }
162
163 list_add(&ldu->active, at);
164 if (ld->num_active++ == 0) {
165 BUG_ON(ld->fb);
166 if (vfb->pin)
167 vfb->pin(vfb);
168 ld->fb = vfb;
169 }
170
171 return 0;
172}
173
174static int vmw_ldu_crtc_set_config(struct drm_mode_set *set)
175{
176 struct vmw_private *dev_priv;
177 struct vmw_legacy_display_unit *ldu;
178 struct drm_connector *connector;
179 struct drm_display_mode *mode;
180 struct drm_encoder *encoder;
181 struct vmw_framebuffer *vfb;
182 struct drm_framebuffer *fb;
183 struct drm_crtc *crtc;
184
185 if (!set)
186 return -EINVAL;
187
188 if (!set->crtc)
189 return -EINVAL;
190
191 /* get the ldu */
192 crtc = set->crtc;
193 ldu = vmw_crtc_to_ldu(crtc);
194 vfb = set->fb ? vmw_framebuffer_to_vfb(set->fb) : NULL;
195 dev_priv = vmw_priv(crtc->dev);
196
197 if (set->num_connectors > 1) {
198 DRM_ERROR("to many connectors\n");
199 return -EINVAL;
200 }
201
202 if (set->num_connectors == 1 &&
203 set->connectors[0] != &ldu->base.connector) {
204 DRM_ERROR("connector doesn't match %p %p\n",
205 set->connectors[0], &ldu->base.connector);
206 return -EINVAL;
207 }
208
209 /* ldu only supports one fb active at the time */
210 if (dev_priv->ldu_priv->fb && vfb &&
211 dev_priv->ldu_priv->fb != vfb) {
212 DRM_ERROR("Multiple framebuffers not supported\n");
213 return -EINVAL;
214 }
215
216 /* since they always map one to one these are safe */
217 connector = &ldu->base.connector;
218 encoder = &ldu->base.encoder;
219
220 /* should we turn the crtc off? */
221 if (set->num_connectors == 0 || !set->mode || !set->fb) {
222
223 connector->encoder = NULL;
224 encoder->crtc = NULL;
225 crtc->fb = NULL;
226
227 vmw_ldu_del_active(dev_priv, ldu);
228
229 vmw_ldu_commit_list(dev_priv);
230
231 return 0;
232 }
233
234
235 /* we now know we want to set a mode */
236 mode = set->mode;
237 fb = set->fb;
238
239 if (set->x + mode->hdisplay > fb->width ||
240 set->y + mode->vdisplay > fb->height) {
241 DRM_ERROR("set outside of framebuffer\n");
242 return -EINVAL;
243 }
244
245 vmw_fb_off(dev_priv);
246
247 crtc->fb = fb;
248 encoder->crtc = crtc;
249 connector->encoder = encoder;
250 crtc->x = set->x;
251 crtc->y = set->y;
252 crtc->mode = *mode;
253
254 vmw_ldu_add_active(dev_priv, ldu, vfb);
255
256 vmw_ldu_commit_list(dev_priv);
257
258 return 0;
259}
260
261static struct drm_crtc_funcs vmw_legacy_crtc_funcs = {
262 .save = vmw_ldu_crtc_save,
263 .restore = vmw_ldu_crtc_restore,
264 .cursor_set = vmw_du_crtc_cursor_set,
265 .cursor_move = vmw_du_crtc_cursor_move,
266 .gamma_set = vmw_ldu_crtc_gamma_set,
267 .destroy = vmw_ldu_crtc_destroy,
268 .set_config = vmw_ldu_crtc_set_config,
269};
270
271/*
272 * Legacy Display Unit encoder functions
273 */
274
275static void vmw_ldu_encoder_destroy(struct drm_encoder *encoder)
276{
277 vmw_ldu_destroy(vmw_encoder_to_ldu(encoder));
278}
279
280static struct drm_encoder_funcs vmw_legacy_encoder_funcs = {
281 .destroy = vmw_ldu_encoder_destroy,
282};
283
284/*
285 * Legacy Display Unit connector functions
286 */
287
288static void vmw_ldu_connector_dpms(struct drm_connector *connector, int mode)
289{
290}
291
292static void vmw_ldu_connector_save(struct drm_connector *connector)
293{
294}
295
296static void vmw_ldu_connector_restore(struct drm_connector *connector)
297{
298}
299
300static enum drm_connector_status
301 vmw_ldu_connector_detect(struct drm_connector *connector)
302{
303 /* XXX vmwctrl should control connection status */
304 if (vmw_connector_to_ldu(connector)->base.unit == 0)
305 return connector_status_connected;
306 return connector_status_disconnected;
307}
308
309static struct drm_display_mode vmw_ldu_connector_builtin[] = {
310 /* 640x480@60Hz */
311 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656,
312 752, 800, 0, 480, 489, 492, 525, 0,
313 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
314 /* 800x600@60Hz */
315 { DRM_MODE("800x600",
316 DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED,
317 40000, 800, 840, 968, 1056, 0, 600, 601, 605, 628,
318 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
319 /* 1024x768@60Hz */
320 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048,
321 1184, 1344, 0, 768, 771, 777, 806, 0,
322 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
323 /* 1152x864@75Hz */
324 { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216,
325 1344, 1600, 0, 864, 865, 868, 900, 0,
326 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
327 /* 1280x768@60Hz */
328 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 79500, 1280, 1344,
329 1472, 1664, 0, 768, 771, 778, 798, 0,
330 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
331 /* 1280x800@60Hz */
332 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 83500, 1280, 1352,
333 1480, 1680, 0, 800, 803, 809, 831, 0,
334 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
335 /* 1280x960@60Hz */
336 { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1376,
337 1488, 1800, 0, 960, 961, 964, 1000, 0,
338 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
339 /* 1280x1024@60Hz */
340 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1328,
341 1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
342 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
343 /* 1360x768@60Hz */
344 { DRM_MODE("1360x768", DRM_MODE_TYPE_DRIVER, 85500, 1360, 1424,
345 1536, 1792, 0, 768, 771, 777, 795, 0,
346 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
347 /* 1440x1050@60Hz */
348 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 121750, 1400, 1488,
349 1632, 1864, 0, 1050, 1053, 1057, 1089, 0,
350 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
351 /* 1440x900@60Hz */
352 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 106500, 1440, 1520,
353 1672, 1904, 0, 900, 903, 909, 934, 0,
354 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
355 /* 1600x1200@60Hz */
356 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 162000, 1600, 1664,
357 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
358 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
359 /* 1680x1050@60Hz */
360 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 146250, 1680, 1784,
361 1960, 2240, 0, 1050, 1053, 1059, 1089, 0,
362 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
363 /* 1792x1344@60Hz */
364 { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 204750, 1792, 1920,
365 2120, 2448, 0, 1344, 1345, 1348, 1394, 0,
366 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
367 /* 1853x1392@60Hz */
368 { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 218250, 1856, 1952,
369 2176, 2528, 0, 1392, 1393, 1396, 1439, 0,
370 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
371 /* 1920x1200@60Hz */
372 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 193250, 1920, 2056,
373 2256, 2592, 0, 1200, 1203, 1209, 1245, 0,
374 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
375 /* 1920x1440@60Hz */
376 { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 234000, 1920, 2048,
377 2256, 2600, 0, 1440, 1441, 1444, 1500, 0,
378 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
379 /* 2560x1600@60Hz */
380 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 348500, 2560, 2752,
381 3032, 3504, 0, 1600, 1603, 1609, 1658, 0,
382 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
383 /* Terminate */
384 { DRM_MODE("", 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0) },
385};
386
387static int vmw_ldu_connector_fill_modes(struct drm_connector *connector,
388 uint32_t max_width, uint32_t max_height)
389{
390 struct drm_device *dev = connector->dev;
391 struct drm_display_mode *mode = NULL;
392 int i;
393
394 for (i = 0; vmw_ldu_connector_builtin[i].type != 0; i++) {
395 if (vmw_ldu_connector_builtin[i].hdisplay > max_width ||
396 vmw_ldu_connector_builtin[i].vdisplay > max_height)
397 continue;
398
399 mode = drm_mode_duplicate(dev, &vmw_ldu_connector_builtin[i]);
400 if (!mode)
401 return 0;
402 mode->vrefresh = drm_mode_vrefresh(mode);
403
404 drm_mode_probed_add(connector, mode);
405 }
406
407 drm_mode_connector_list_update(connector);
408
409 return 1;
410}
411
412static int vmw_ldu_connector_set_property(struct drm_connector *connector,
413 struct drm_property *property,
414 uint64_t val)
415{
416 return 0;
417}
418
419static void vmw_ldu_connector_destroy(struct drm_connector *connector)
420{
421 vmw_ldu_destroy(vmw_connector_to_ldu(connector));
422}
423
424static struct drm_connector_funcs vmw_legacy_connector_funcs = {
425 .dpms = vmw_ldu_connector_dpms,
426 .save = vmw_ldu_connector_save,
427 .restore = vmw_ldu_connector_restore,
428 .detect = vmw_ldu_connector_detect,
429 .fill_modes = vmw_ldu_connector_fill_modes,
430 .set_property = vmw_ldu_connector_set_property,
431 .destroy = vmw_ldu_connector_destroy,
432};
433
434static int vmw_ldu_init(struct vmw_private *dev_priv, unsigned unit)
435{
436 struct vmw_legacy_display_unit *ldu;
437 struct drm_device *dev = dev_priv->dev;
438 struct drm_connector *connector;
439 struct drm_encoder *encoder;
440 struct drm_crtc *crtc;
441
442 ldu = kzalloc(sizeof(*ldu), GFP_KERNEL);
443 if (!ldu)
444 return -ENOMEM;
445
446 ldu->unit = unit;
447 crtc = &ldu->base.crtc;
448 encoder = &ldu->base.encoder;
449 connector = &ldu->base.connector;
450
451 drm_connector_init(dev, connector, &vmw_legacy_connector_funcs,
452 DRM_MODE_CONNECTOR_LVDS);
453 /* Initial status */
454 if (unit == 0)
455 connector->status = connector_status_connected;
456 else
457 connector->status = connector_status_disconnected;
458
459 drm_encoder_init(dev, encoder, &vmw_legacy_encoder_funcs,
460 DRM_MODE_ENCODER_LVDS);
461 drm_mode_connector_attach_encoder(connector, encoder);
462 encoder->possible_crtcs = (1 << unit);
463 encoder->possible_clones = 0;
464
465 INIT_LIST_HEAD(&ldu->active);
466
467 drm_crtc_init(dev, crtc, &vmw_legacy_crtc_funcs);
468
469 drm_connector_attach_property(connector,
470 dev->mode_config.dirty_info_property,
471 1);
472
473 return 0;
474}
475
476int vmw_kms_init_legacy_display_system(struct vmw_private *dev_priv)
477{
478 if (dev_priv->ldu_priv) {
479 DRM_INFO("ldu system already on\n");
480 return -EINVAL;
481 }
482
483 dev_priv->ldu_priv = kmalloc(GFP_KERNEL, sizeof(*dev_priv->ldu_priv));
484
485 if (!dev_priv->ldu_priv)
486 return -ENOMEM;
487
488 INIT_LIST_HEAD(&dev_priv->ldu_priv->active);
489 dev_priv->ldu_priv->num_active = 0;
490 dev_priv->ldu_priv->fb = NULL;
491
492 drm_mode_create_dirty_info_property(dev_priv->dev);
493
494 vmw_ldu_init(dev_priv, 0);
495 vmw_ldu_init(dev_priv, 1);
496 vmw_ldu_init(dev_priv, 2);
497 vmw_ldu_init(dev_priv, 3);
498 vmw_ldu_init(dev_priv, 4);
499 vmw_ldu_init(dev_priv, 5);
500 vmw_ldu_init(dev_priv, 6);
501 vmw_ldu_init(dev_priv, 7);
502
503 return 0;
504}
505
506int vmw_kms_close_legacy_display_system(struct vmw_private *dev_priv)
507{
508 if (!dev_priv->ldu_priv)
509 return -ENOSYS;
510
511 BUG_ON(!list_empty(&dev_priv->ldu_priv->active));
512
513 kfree(dev_priv->ldu_priv);
514
515 return 0;
516}
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_overlay.c b/drivers/gpu/drm/vmwgfx/vmwgfx_overlay.c
new file mode 100644
index 000000000000..5b6eabeb7f51
--- /dev/null
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_overlay.c
@@ -0,0 +1,625 @@
1/**************************************************************************
2 *
3 * Copyright © 2009 VMware, Inc., Palo Alto, CA., USA
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
21 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
22 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
23 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
24 * USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28
29#include "drmP.h"
30#include "vmwgfx_drv.h"
31
32#include "ttm/ttm_placement.h"
33
34#include "svga_overlay.h"
35#include "svga_escape.h"
36
37#define VMW_MAX_NUM_STREAMS 1
38
39struct vmw_stream {
40 struct vmw_dma_buffer *buf;
41 bool claimed;
42 bool paused;
43 struct drm_vmw_control_stream_arg saved;
44};
45
46/**
47 * Overlay control
48 */
49struct vmw_overlay {
50 /*
51 * Each stream is a single overlay. In Xv these are called ports.
52 */
53 struct mutex mutex;
54 struct vmw_stream stream[VMW_MAX_NUM_STREAMS];
55};
56
57static inline struct vmw_overlay *vmw_overlay(struct drm_device *dev)
58{
59 struct vmw_private *dev_priv = vmw_priv(dev);
60 return dev_priv ? dev_priv->overlay_priv : NULL;
61}
62
63struct vmw_escape_header {
64 uint32_t cmd;
65 SVGAFifoCmdEscape body;
66};
67
68struct vmw_escape_video_flush {
69 struct vmw_escape_header escape;
70 SVGAEscapeVideoFlush flush;
71};
72
73static inline void fill_escape(struct vmw_escape_header *header,
74 uint32_t size)
75{
76 header->cmd = SVGA_CMD_ESCAPE;
77 header->body.nsid = SVGA_ESCAPE_NSID_VMWARE;
78 header->body.size = size;
79}
80
81static inline void fill_flush(struct vmw_escape_video_flush *cmd,
82 uint32_t stream_id)
83{
84 fill_escape(&cmd->escape, sizeof(cmd->flush));
85 cmd->flush.cmdType = SVGA_ESCAPE_VMWARE_VIDEO_FLUSH;
86 cmd->flush.streamId = stream_id;
87}
88
89/**
90 * Pin or unpin a buffer in vram.
91 *
92 * @dev_priv: Driver private.
93 * @buf: DMA buffer to pin or unpin.
94 * @pin: Pin buffer in vram if true.
95 * @interruptible: Use interruptible wait.
96 *
97 * Takes the current masters ttm lock in read.
98 *
99 * Returns
100 * -ERESTARTSYS if interrupted by a signal.
101 */
102static int vmw_dmabuf_pin_in_vram(struct vmw_private *dev_priv,
103 struct vmw_dma_buffer *buf,
104 bool pin, bool interruptible)
105{
106 struct ttm_buffer_object *bo = &buf->base;
107 struct ttm_placement *overlay_placement = &vmw_vram_placement;
108 int ret;
109
110 ret = ttm_read_lock(&dev_priv->active_master->lock, interruptible);
111 if (unlikely(ret != 0))
112 return ret;
113
114 ret = ttm_bo_reserve(bo, interruptible, false, false, 0);
115 if (unlikely(ret != 0))
116 goto err;
117
118 if (pin)
119 overlay_placement = &vmw_vram_ne_placement;
120
121 ret = ttm_bo_validate(bo, overlay_placement, interruptible, false);
122
123 ttm_bo_unreserve(bo);
124
125err:
126 ttm_read_unlock(&dev_priv->active_master->lock);
127
128 return ret;
129}
130
131/**
132 * Send put command to hw.
133 *
134 * Returns
135 * -ERESTARTSYS if interrupted by a signal.
136 */
137static int vmw_overlay_send_put(struct vmw_private *dev_priv,
138 struct vmw_dma_buffer *buf,
139 struct drm_vmw_control_stream_arg *arg,
140 bool interruptible)
141{
142 struct {
143 struct vmw_escape_header escape;
144 struct {
145 struct {
146 uint32_t cmdType;
147 uint32_t streamId;
148 } header;
149 struct {
150 uint32_t registerId;
151 uint32_t value;
152 } items[SVGA_VIDEO_PITCH_3 + 1];
153 } body;
154 struct vmw_escape_video_flush flush;
155 } *cmds;
156 uint32_t offset;
157 int i, ret;
158
159 for (;;) {
160 cmds = vmw_fifo_reserve(dev_priv, sizeof(*cmds));
161 if (cmds)
162 break;
163
164 ret = vmw_fallback_wait(dev_priv, false, true, 0,
165 interruptible, 3*HZ);
166 if (interruptible && ret == -ERESTARTSYS)
167 return ret;
168 else
169 BUG_ON(ret != 0);
170 }
171
172 fill_escape(&cmds->escape, sizeof(cmds->body));
173 cmds->body.header.cmdType = SVGA_ESCAPE_VMWARE_VIDEO_SET_REGS;
174 cmds->body.header.streamId = arg->stream_id;
175
176 for (i = 0; i <= SVGA_VIDEO_PITCH_3; i++)
177 cmds->body.items[i].registerId = i;
178
179 offset = buf->base.offset + arg->offset;
180
181 cmds->body.items[SVGA_VIDEO_ENABLED].value = true;
182 cmds->body.items[SVGA_VIDEO_FLAGS].value = arg->flags;
183 cmds->body.items[SVGA_VIDEO_DATA_OFFSET].value = offset;
184 cmds->body.items[SVGA_VIDEO_FORMAT].value = arg->format;
185 cmds->body.items[SVGA_VIDEO_COLORKEY].value = arg->color_key;
186 cmds->body.items[SVGA_VIDEO_SIZE].value = arg->size;
187 cmds->body.items[SVGA_VIDEO_WIDTH].value = arg->width;
188 cmds->body.items[SVGA_VIDEO_HEIGHT].value = arg->height;
189 cmds->body.items[SVGA_VIDEO_SRC_X].value = arg->src.x;
190 cmds->body.items[SVGA_VIDEO_SRC_Y].value = arg->src.y;
191 cmds->body.items[SVGA_VIDEO_SRC_WIDTH].value = arg->src.w;
192 cmds->body.items[SVGA_VIDEO_SRC_HEIGHT].value = arg->src.h;
193 cmds->body.items[SVGA_VIDEO_DST_X].value = arg->dst.x;
194 cmds->body.items[SVGA_VIDEO_DST_Y].value = arg->dst.y;
195 cmds->body.items[SVGA_VIDEO_DST_WIDTH].value = arg->dst.w;
196 cmds->body.items[SVGA_VIDEO_DST_HEIGHT].value = arg->dst.h;
197 cmds->body.items[SVGA_VIDEO_PITCH_1].value = arg->pitch[0];
198 cmds->body.items[SVGA_VIDEO_PITCH_2].value = arg->pitch[1];
199 cmds->body.items[SVGA_VIDEO_PITCH_3].value = arg->pitch[2];
200
201 fill_flush(&cmds->flush, arg->stream_id);
202
203 vmw_fifo_commit(dev_priv, sizeof(*cmds));
204
205 return 0;
206}
207
208/**
209 * Send stop command to hw.
210 *
211 * Returns
212 * -ERESTARTSYS if interrupted by a signal.
213 */
214static int vmw_overlay_send_stop(struct vmw_private *dev_priv,
215 uint32_t stream_id,
216 bool interruptible)
217{
218 struct {
219 struct vmw_escape_header escape;
220 SVGAEscapeVideoSetRegs body;
221 struct vmw_escape_video_flush flush;
222 } *cmds;
223 int ret;
224
225 for (;;) {
226 cmds = vmw_fifo_reserve(dev_priv, sizeof(*cmds));
227 if (cmds)
228 break;
229
230 ret = vmw_fallback_wait(dev_priv, false, true, 0,
231 interruptible, 3*HZ);
232 if (interruptible && ret == -ERESTARTSYS)
233 return ret;
234 else
235 BUG_ON(ret != 0);
236 }
237
238 fill_escape(&cmds->escape, sizeof(cmds->body));
239 cmds->body.header.cmdType = SVGA_ESCAPE_VMWARE_VIDEO_SET_REGS;
240 cmds->body.header.streamId = stream_id;
241 cmds->body.items[0].registerId = SVGA_VIDEO_ENABLED;
242 cmds->body.items[0].value = false;
243 fill_flush(&cmds->flush, stream_id);
244
245 vmw_fifo_commit(dev_priv, sizeof(*cmds));
246
247 return 0;
248}
249
250/**
251 * Stop or pause a stream.
252 *
253 * If the stream is paused the no evict flag is removed from the buffer
254 * but left in vram. This allows for instance mode_set to evict it
255 * should it need to.
256 *
257 * The caller must hold the overlay lock.
258 *
259 * @stream_id which stream to stop/pause.
260 * @pause true to pause, false to stop completely.
261 */
262static int vmw_overlay_stop(struct vmw_private *dev_priv,
263 uint32_t stream_id, bool pause,
264 bool interruptible)
265{
266 struct vmw_overlay *overlay = dev_priv->overlay_priv;
267 struct vmw_stream *stream = &overlay->stream[stream_id];
268 int ret;
269
270 /* no buffer attached the stream is completely stopped */
271 if (!stream->buf)
272 return 0;
273
274 /* If the stream is paused this is already done */
275 if (!stream->paused) {
276 ret = vmw_overlay_send_stop(dev_priv, stream_id,
277 interruptible);
278 if (ret)
279 return ret;
280
281 /* We just remove the NO_EVICT flag so no -ENOMEM */
282 ret = vmw_dmabuf_pin_in_vram(dev_priv, stream->buf, false,
283 interruptible);
284 if (interruptible && ret == -ERESTARTSYS)
285 return ret;
286 else
287 BUG_ON(ret != 0);
288 }
289
290 if (!pause) {
291 vmw_dmabuf_unreference(&stream->buf);
292 stream->paused = false;
293 } else {
294 stream->paused = true;
295 }
296
297 return 0;
298}
299
300/**
301 * Update a stream and send any put or stop fifo commands needed.
302 *
303 * The caller must hold the overlay lock.
304 *
305 * Returns
306 * -ENOMEM if buffer doesn't fit in vram.
307 * -ERESTARTSYS if interrupted.
308 */
309static int vmw_overlay_update_stream(struct vmw_private *dev_priv,
310 struct vmw_dma_buffer *buf,
311 struct drm_vmw_control_stream_arg *arg,
312 bool interruptible)
313{
314 struct vmw_overlay *overlay = dev_priv->overlay_priv;
315 struct vmw_stream *stream = &overlay->stream[arg->stream_id];
316 int ret = 0;
317
318 if (!buf)
319 return -EINVAL;
320
321 DRM_DEBUG(" %s: old %p, new %p, %spaused\n", __func__,
322 stream->buf, buf, stream->paused ? "" : "not ");
323
324 if (stream->buf != buf) {
325 ret = vmw_overlay_stop(dev_priv, arg->stream_id,
326 false, interruptible);
327 if (ret)
328 return ret;
329 } else if (!stream->paused) {
330 /* If the buffers match and not paused then just send
331 * the put command, no need to do anything else.
332 */
333 ret = vmw_overlay_send_put(dev_priv, buf, arg, interruptible);
334 if (ret == 0)
335 stream->saved = *arg;
336 else
337 BUG_ON(!interruptible);
338
339 return ret;
340 }
341
342 /* We don't start the old stream if we are interrupted.
343 * Might return -ENOMEM if it can't fit the buffer in vram.
344 */
345 ret = vmw_dmabuf_pin_in_vram(dev_priv, buf, true, interruptible);
346 if (ret)
347 return ret;
348
349 ret = vmw_overlay_send_put(dev_priv, buf, arg, interruptible);
350 if (ret) {
351 /* This one needs to happen no matter what. We only remove
352 * the NO_EVICT flag so this is safe from -ENOMEM.
353 */
354 BUG_ON(vmw_dmabuf_pin_in_vram(dev_priv, buf, false, false) != 0);
355 return ret;
356 }
357
358 if (stream->buf != buf)
359 stream->buf = vmw_dmabuf_reference(buf);
360 stream->saved = *arg;
361
362 return 0;
363}
364
365/**
366 * Stop all streams.
367 *
368 * Used by the fb code when starting.
369 *
370 * Takes the overlay lock.
371 */
372int vmw_overlay_stop_all(struct vmw_private *dev_priv)
373{
374 struct vmw_overlay *overlay = dev_priv->overlay_priv;
375 int i, ret;
376
377 if (!overlay)
378 return 0;
379
380 mutex_lock(&overlay->mutex);
381
382 for (i = 0; i < VMW_MAX_NUM_STREAMS; i++) {
383 struct vmw_stream *stream = &overlay->stream[i];
384 if (!stream->buf)
385 continue;
386
387 ret = vmw_overlay_stop(dev_priv, i, false, false);
388 WARN_ON(ret != 0);
389 }
390
391 mutex_unlock(&overlay->mutex);
392
393 return 0;
394}
395
396/**
397 * Try to resume all paused streams.
398 *
399 * Used by the kms code after moving a new scanout buffer to vram.
400 *
401 * Takes the overlay lock.
402 */
403int vmw_overlay_resume_all(struct vmw_private *dev_priv)
404{
405 struct vmw_overlay *overlay = dev_priv->overlay_priv;
406 int i, ret;
407
408 if (!overlay)
409 return 0;
410
411 mutex_lock(&overlay->mutex);
412
413 for (i = 0; i < VMW_MAX_NUM_STREAMS; i++) {
414 struct vmw_stream *stream = &overlay->stream[i];
415 if (!stream->paused)
416 continue;
417
418 ret = vmw_overlay_update_stream(dev_priv, stream->buf,
419 &stream->saved, false);
420 if (ret != 0)
421 DRM_INFO("%s: *warning* failed to resume stream %i\n",
422 __func__, i);
423 }
424
425 mutex_unlock(&overlay->mutex);
426
427 return 0;
428}
429
430/**
431 * Pauses all active streams.
432 *
433 * Used by the kms code when moving a new scanout buffer to vram.
434 *
435 * Takes the overlay lock.
436 */
437int vmw_overlay_pause_all(struct vmw_private *dev_priv)
438{
439 struct vmw_overlay *overlay = dev_priv->overlay_priv;
440 int i, ret;
441
442 if (!overlay)
443 return 0;
444
445 mutex_lock(&overlay->mutex);
446
447 for (i = 0; i < VMW_MAX_NUM_STREAMS; i++) {
448 if (overlay->stream[i].paused)
449 DRM_INFO("%s: *warning* stream %i already paused\n",
450 __func__, i);
451 ret = vmw_overlay_stop(dev_priv, i, true, false);
452 WARN_ON(ret != 0);
453 }
454
455 mutex_unlock(&overlay->mutex);
456
457 return 0;
458}
459
460int vmw_overlay_ioctl(struct drm_device *dev, void *data,
461 struct drm_file *file_priv)
462{
463 struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
464 struct vmw_private *dev_priv = vmw_priv(dev);
465 struct vmw_overlay *overlay = dev_priv->overlay_priv;
466 struct drm_vmw_control_stream_arg *arg =
467 (struct drm_vmw_control_stream_arg *)data;
468 struct vmw_dma_buffer *buf;
469 struct vmw_resource *res;
470 int ret;
471
472 if (!overlay)
473 return -ENOSYS;
474
475 ret = vmw_user_stream_lookup(dev_priv, tfile, &arg->stream_id, &res);
476 if (ret)
477 return ret;
478
479 mutex_lock(&overlay->mutex);
480
481 if (!arg->enabled) {
482 ret = vmw_overlay_stop(dev_priv, arg->stream_id, false, true);
483 goto out_unlock;
484 }
485
486 ret = vmw_user_dmabuf_lookup(tfile, arg->handle, &buf);
487 if (ret)
488 goto out_unlock;
489
490 ret = vmw_overlay_update_stream(dev_priv, buf, arg, true);
491
492 vmw_dmabuf_unreference(&buf);
493
494out_unlock:
495 mutex_unlock(&overlay->mutex);
496 vmw_resource_unreference(&res);
497
498 return ret;
499}
500
501int vmw_overlay_num_overlays(struct vmw_private *dev_priv)
502{
503 if (!dev_priv->overlay_priv)
504 return 0;
505
506 return VMW_MAX_NUM_STREAMS;
507}
508
509int vmw_overlay_num_free_overlays(struct vmw_private *dev_priv)
510{
511 struct vmw_overlay *overlay = dev_priv->overlay_priv;
512 int i, k;
513
514 if (!overlay)
515 return 0;
516
517 mutex_lock(&overlay->mutex);
518
519 for (i = 0, k = 0; i < VMW_MAX_NUM_STREAMS; i++)
520 if (!overlay->stream[i].claimed)
521 k++;
522
523 mutex_unlock(&overlay->mutex);
524
525 return k;
526}
527
528int vmw_overlay_claim(struct vmw_private *dev_priv, uint32_t *out)
529{
530 struct vmw_overlay *overlay = dev_priv->overlay_priv;
531 int i;
532
533 if (!overlay)
534 return -ENOSYS;
535
536 mutex_lock(&overlay->mutex);
537
538 for (i = 0; i < VMW_MAX_NUM_STREAMS; i++) {
539
540 if (overlay->stream[i].claimed)
541 continue;
542
543 overlay->stream[i].claimed = true;
544 *out = i;
545 mutex_unlock(&overlay->mutex);
546 return 0;
547 }
548
549 mutex_unlock(&overlay->mutex);
550 return -ESRCH;
551}
552
553int vmw_overlay_unref(struct vmw_private *dev_priv, uint32_t stream_id)
554{
555 struct vmw_overlay *overlay = dev_priv->overlay_priv;
556
557 BUG_ON(stream_id >= VMW_MAX_NUM_STREAMS);
558
559 if (!overlay)
560 return -ENOSYS;
561
562 mutex_lock(&overlay->mutex);
563
564 WARN_ON(!overlay->stream[stream_id].claimed);
565 vmw_overlay_stop(dev_priv, stream_id, false, false);
566 overlay->stream[stream_id].claimed = false;
567
568 mutex_unlock(&overlay->mutex);
569 return 0;
570}
571
572int vmw_overlay_init(struct vmw_private *dev_priv)
573{
574 struct vmw_overlay *overlay;
575 int i;
576
577 if (dev_priv->overlay_priv)
578 return -EINVAL;
579
580 if (!(dev_priv->fifo.capabilities & SVGA_FIFO_CAP_VIDEO) &&
581 (dev_priv->fifo.capabilities & SVGA_FIFO_CAP_ESCAPE)) {
582 DRM_INFO("hardware doesn't support overlays\n");
583 return -ENOSYS;
584 }
585
586 overlay = kmalloc(GFP_KERNEL, sizeof(*overlay));
587 if (!overlay)
588 return -ENOMEM;
589
590 memset(overlay, 0, sizeof(*overlay));
591 mutex_init(&overlay->mutex);
592 for (i = 0; i < VMW_MAX_NUM_STREAMS; i++) {
593 overlay->stream[i].buf = NULL;
594 overlay->stream[i].paused = false;
595 overlay->stream[i].claimed = false;
596 }
597
598 dev_priv->overlay_priv = overlay;
599
600 return 0;
601}
602
603int vmw_overlay_close(struct vmw_private *dev_priv)
604{
605 struct vmw_overlay *overlay = dev_priv->overlay_priv;
606 bool forgotten_buffer = false;
607 int i;
608
609 if (!overlay)
610 return -ENOSYS;
611
612 for (i = 0; i < VMW_MAX_NUM_STREAMS; i++) {
613 if (overlay->stream[i].buf) {
614 forgotten_buffer = true;
615 vmw_overlay_stop(dev_priv, i, false, false);
616 }
617 }
618
619 WARN_ON(forgotten_buffer);
620
621 dev_priv->overlay_priv = NULL;
622 kfree(overlay);
623
624 return 0;
625}
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_reg.h b/drivers/gpu/drm/vmwgfx/vmwgfx_reg.h
new file mode 100644
index 000000000000..9d0dd3a342eb
--- /dev/null
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_reg.h
@@ -0,0 +1,57 @@
1/**************************************************************************
2 *
3 * Copyright © 2009 VMware, Inc., Palo Alto, CA., USA
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
21 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
22 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
23 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
24 * USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28/**
29 * This file contains virtual hardware defines for kernel space.
30 */
31
32#ifndef _VMWGFX_REG_H_
33#define _VMWGFX_REG_H_
34
35#include <linux/types.h>
36
37#define VMWGFX_INDEX_PORT 0x0
38#define VMWGFX_VALUE_PORT 0x1
39#define VMWGFX_IRQSTATUS_PORT 0x8
40
41struct svga_guest_mem_descriptor {
42 __le32 ppn;
43 __le32 num_pages;
44};
45
46struct svga_fifo_cmd_fence {
47 __le32 fence;
48};
49
50#define SVGA_SYNC_GENERIC 1
51#define SVGA_SYNC_FIFOFULL 2
52
53#include "svga_types.h"
54
55#include "svga3d_reg.h"
56
57#endif
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c b/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c
new file mode 100644
index 000000000000..f8fbbc67a406
--- /dev/null
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c
@@ -0,0 +1,1187 @@
1/**************************************************************************
2 *
3 * Copyright © 2009 VMware, Inc., Palo Alto, CA., USA
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
21 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
22 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
23 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
24 * USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28#include "vmwgfx_drv.h"
29#include "vmwgfx_drm.h"
30#include "ttm/ttm_object.h"
31#include "ttm/ttm_placement.h"
32#include "drmP.h"
33
34#define VMW_RES_CONTEXT ttm_driver_type0
35#define VMW_RES_SURFACE ttm_driver_type1
36#define VMW_RES_STREAM ttm_driver_type2
37
38struct vmw_user_context {
39 struct ttm_base_object base;
40 struct vmw_resource res;
41};
42
43struct vmw_user_surface {
44 struct ttm_base_object base;
45 struct vmw_surface srf;
46};
47
48struct vmw_user_dma_buffer {
49 struct ttm_base_object base;
50 struct vmw_dma_buffer dma;
51};
52
53struct vmw_bo_user_rep {
54 uint32_t handle;
55 uint64_t map_handle;
56};
57
58struct vmw_stream {
59 struct vmw_resource res;
60 uint32_t stream_id;
61};
62
63struct vmw_user_stream {
64 struct ttm_base_object base;
65 struct vmw_stream stream;
66};
67
68static inline struct vmw_dma_buffer *
69vmw_dma_buffer(struct ttm_buffer_object *bo)
70{
71 return container_of(bo, struct vmw_dma_buffer, base);
72}
73
74static inline struct vmw_user_dma_buffer *
75vmw_user_dma_buffer(struct ttm_buffer_object *bo)
76{
77 struct vmw_dma_buffer *vmw_bo = vmw_dma_buffer(bo);
78 return container_of(vmw_bo, struct vmw_user_dma_buffer, dma);
79}
80
81struct vmw_resource *vmw_resource_reference(struct vmw_resource *res)
82{
83 kref_get(&res->kref);
84 return res;
85}
86
87static void vmw_resource_release(struct kref *kref)
88{
89 struct vmw_resource *res =
90 container_of(kref, struct vmw_resource, kref);
91 struct vmw_private *dev_priv = res->dev_priv;
92
93 idr_remove(res->idr, res->id);
94 write_unlock(&dev_priv->resource_lock);
95
96 if (likely(res->hw_destroy != NULL))
97 res->hw_destroy(res);
98
99 if (res->res_free != NULL)
100 res->res_free(res);
101 else
102 kfree(res);
103
104 write_lock(&dev_priv->resource_lock);
105}
106
107void vmw_resource_unreference(struct vmw_resource **p_res)
108{
109 struct vmw_resource *res = *p_res;
110 struct vmw_private *dev_priv = res->dev_priv;
111
112 *p_res = NULL;
113 write_lock(&dev_priv->resource_lock);
114 kref_put(&res->kref, vmw_resource_release);
115 write_unlock(&dev_priv->resource_lock);
116}
117
118static int vmw_resource_init(struct vmw_private *dev_priv,
119 struct vmw_resource *res,
120 struct idr *idr,
121 enum ttm_object_type obj_type,
122 void (*res_free) (struct vmw_resource *res))
123{
124 int ret;
125
126 kref_init(&res->kref);
127 res->hw_destroy = NULL;
128 res->res_free = res_free;
129 res->res_type = obj_type;
130 res->idr = idr;
131 res->avail = false;
132 res->dev_priv = dev_priv;
133
134 do {
135 if (unlikely(idr_pre_get(idr, GFP_KERNEL) == 0))
136 return -ENOMEM;
137
138 write_lock(&dev_priv->resource_lock);
139 ret = idr_get_new_above(idr, res, 1, &res->id);
140 write_unlock(&dev_priv->resource_lock);
141
142 } while (ret == -EAGAIN);
143
144 return ret;
145}
146
147/**
148 * vmw_resource_activate
149 *
150 * @res: Pointer to the newly created resource
151 * @hw_destroy: Destroy function. NULL if none.
152 *
153 * Activate a resource after the hardware has been made aware of it.
154 * Set tye destroy function to @destroy. Typically this frees the
155 * resource and destroys the hardware resources associated with it.
156 * Activate basically means that the function vmw_resource_lookup will
157 * find it.
158 */
159
160static void vmw_resource_activate(struct vmw_resource *res,
161 void (*hw_destroy) (struct vmw_resource *))
162{
163 struct vmw_private *dev_priv = res->dev_priv;
164
165 write_lock(&dev_priv->resource_lock);
166 res->avail = true;
167 res->hw_destroy = hw_destroy;
168 write_unlock(&dev_priv->resource_lock);
169}
170
171struct vmw_resource *vmw_resource_lookup(struct vmw_private *dev_priv,
172 struct idr *idr, int id)
173{
174 struct vmw_resource *res;
175
176 read_lock(&dev_priv->resource_lock);
177 res = idr_find(idr, id);
178 if (res && res->avail)
179 kref_get(&res->kref);
180 else
181 res = NULL;
182 read_unlock(&dev_priv->resource_lock);
183
184 if (unlikely(res == NULL))
185 return NULL;
186
187 return res;
188}
189
190/**
191 * Context management:
192 */
193
194static void vmw_hw_context_destroy(struct vmw_resource *res)
195{
196
197 struct vmw_private *dev_priv = res->dev_priv;
198 struct {
199 SVGA3dCmdHeader header;
200 SVGA3dCmdDestroyContext body;
201 } *cmd = vmw_fifo_reserve(dev_priv, sizeof(*cmd));
202
203 if (unlikely(cmd == NULL)) {
204 DRM_ERROR("Failed reserving FIFO space for surface "
205 "destruction.\n");
206 return;
207 }
208
209 cmd->header.id = cpu_to_le32(SVGA_3D_CMD_CONTEXT_DESTROY);
210 cmd->header.size = cpu_to_le32(sizeof(cmd->body));
211 cmd->body.cid = cpu_to_le32(res->id);
212
213 vmw_fifo_commit(dev_priv, sizeof(*cmd));
214}
215
216static int vmw_context_init(struct vmw_private *dev_priv,
217 struct vmw_resource *res,
218 void (*res_free) (struct vmw_resource *res))
219{
220 int ret;
221
222 struct {
223 SVGA3dCmdHeader header;
224 SVGA3dCmdDefineContext body;
225 } *cmd;
226
227 ret = vmw_resource_init(dev_priv, res, &dev_priv->context_idr,
228 VMW_RES_CONTEXT, res_free);
229
230 if (unlikely(ret != 0)) {
231 if (res_free == NULL)
232 kfree(res);
233 else
234 res_free(res);
235 return ret;
236 }
237
238 cmd = vmw_fifo_reserve(dev_priv, sizeof(*cmd));
239 if (unlikely(cmd == NULL)) {
240 DRM_ERROR("Fifo reserve failed.\n");
241 vmw_resource_unreference(&res);
242 return -ENOMEM;
243 }
244
245 cmd->header.id = cpu_to_le32(SVGA_3D_CMD_CONTEXT_DEFINE);
246 cmd->header.size = cpu_to_le32(sizeof(cmd->body));
247 cmd->body.cid = cpu_to_le32(res->id);
248
249 vmw_fifo_commit(dev_priv, sizeof(*cmd));
250 vmw_resource_activate(res, vmw_hw_context_destroy);
251 return 0;
252}
253
254struct vmw_resource *vmw_context_alloc(struct vmw_private *dev_priv)
255{
256 struct vmw_resource *res = kmalloc(sizeof(*res), GFP_KERNEL);
257 int ret;
258
259 if (unlikely(res == NULL))
260 return NULL;
261
262 ret = vmw_context_init(dev_priv, res, NULL);
263 return (ret == 0) ? res : NULL;
264}
265
266/**
267 * User-space context management:
268 */
269
270static void vmw_user_context_free(struct vmw_resource *res)
271{
272 struct vmw_user_context *ctx =
273 container_of(res, struct vmw_user_context, res);
274
275 kfree(ctx);
276}
277
278/**
279 * This function is called when user space has no more references on the
280 * base object. It releases the base-object's reference on the resource object.
281 */
282
283static void vmw_user_context_base_release(struct ttm_base_object **p_base)
284{
285 struct ttm_base_object *base = *p_base;
286 struct vmw_user_context *ctx =
287 container_of(base, struct vmw_user_context, base);
288 struct vmw_resource *res = &ctx->res;
289
290 *p_base = NULL;
291 vmw_resource_unreference(&res);
292}
293
294int vmw_context_destroy_ioctl(struct drm_device *dev, void *data,
295 struct drm_file *file_priv)
296{
297 struct vmw_private *dev_priv = vmw_priv(dev);
298 struct vmw_resource *res;
299 struct vmw_user_context *ctx;
300 struct drm_vmw_context_arg *arg = (struct drm_vmw_context_arg *)data;
301 struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
302 int ret = 0;
303
304 res = vmw_resource_lookup(dev_priv, &dev_priv->context_idr, arg->cid);
305 if (unlikely(res == NULL))
306 return -EINVAL;
307
308 if (res->res_free != &vmw_user_context_free) {
309 ret = -EINVAL;
310 goto out;
311 }
312
313 ctx = container_of(res, struct vmw_user_context, res);
314 if (ctx->base.tfile != tfile && !ctx->base.shareable) {
315 ret = -EPERM;
316 goto out;
317 }
318
319 ttm_ref_object_base_unref(tfile, ctx->base.hash.key, TTM_REF_USAGE);
320out:
321 vmw_resource_unreference(&res);
322 return ret;
323}
324
325int vmw_context_define_ioctl(struct drm_device *dev, void *data,
326 struct drm_file *file_priv)
327{
328 struct vmw_private *dev_priv = vmw_priv(dev);
329 struct vmw_user_context *ctx = kmalloc(sizeof(*ctx), GFP_KERNEL);
330 struct vmw_resource *res;
331 struct vmw_resource *tmp;
332 struct drm_vmw_context_arg *arg = (struct drm_vmw_context_arg *)data;
333 struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
334 int ret;
335
336 if (unlikely(ctx == NULL))
337 return -ENOMEM;
338
339 res = &ctx->res;
340 ctx->base.shareable = false;
341 ctx->base.tfile = NULL;
342
343 ret = vmw_context_init(dev_priv, res, vmw_user_context_free);
344 if (unlikely(ret != 0))
345 return ret;
346
347 tmp = vmw_resource_reference(&ctx->res);
348 ret = ttm_base_object_init(tfile, &ctx->base, false, VMW_RES_CONTEXT,
349 &vmw_user_context_base_release, NULL);
350
351 if (unlikely(ret != 0)) {
352 vmw_resource_unreference(&tmp);
353 goto out_err;
354 }
355
356 arg->cid = res->id;
357out_err:
358 vmw_resource_unreference(&res);
359 return ret;
360
361}
362
363int vmw_context_check(struct vmw_private *dev_priv,
364 struct ttm_object_file *tfile,
365 int id)
366{
367 struct vmw_resource *res;
368 int ret = 0;
369
370 read_lock(&dev_priv->resource_lock);
371 res = idr_find(&dev_priv->context_idr, id);
372 if (res && res->avail) {
373 struct vmw_user_context *ctx =
374 container_of(res, struct vmw_user_context, res);
375 if (ctx->base.tfile != tfile && !ctx->base.shareable)
376 ret = -EPERM;
377 } else
378 ret = -EINVAL;
379 read_unlock(&dev_priv->resource_lock);
380
381 return ret;
382}
383
384
385/**
386 * Surface management.
387 */
388
389static void vmw_hw_surface_destroy(struct vmw_resource *res)
390{
391
392 struct vmw_private *dev_priv = res->dev_priv;
393 struct {
394 SVGA3dCmdHeader header;
395 SVGA3dCmdDestroySurface body;
396 } *cmd = vmw_fifo_reserve(dev_priv, sizeof(*cmd));
397
398 if (unlikely(cmd == NULL)) {
399 DRM_ERROR("Failed reserving FIFO space for surface "
400 "destruction.\n");
401 return;
402 }
403
404 cmd->header.id = cpu_to_le32(SVGA_3D_CMD_SURFACE_DESTROY);
405 cmd->header.size = cpu_to_le32(sizeof(cmd->body));
406 cmd->body.sid = cpu_to_le32(res->id);
407
408 vmw_fifo_commit(dev_priv, sizeof(*cmd));
409}
410
411void vmw_surface_res_free(struct vmw_resource *res)
412{
413 struct vmw_surface *srf = container_of(res, struct vmw_surface, res);
414
415 kfree(srf->sizes);
416 kfree(srf->snooper.image);
417 kfree(srf);
418}
419
420int vmw_surface_init(struct vmw_private *dev_priv,
421 struct vmw_surface *srf,
422 void (*res_free) (struct vmw_resource *res))
423{
424 int ret;
425 struct {
426 SVGA3dCmdHeader header;
427 SVGA3dCmdDefineSurface body;
428 } *cmd;
429 SVGA3dSize *cmd_size;
430 struct vmw_resource *res = &srf->res;
431 struct drm_vmw_size *src_size;
432 size_t submit_size;
433 uint32_t cmd_len;
434 int i;
435
436 BUG_ON(res_free == NULL);
437 ret = vmw_resource_init(dev_priv, res, &dev_priv->surface_idr,
438 VMW_RES_SURFACE, res_free);
439
440 if (unlikely(ret != 0)) {
441 res_free(res);
442 return ret;
443 }
444
445 submit_size = sizeof(*cmd) + srf->num_sizes * sizeof(SVGA3dSize);
446 cmd_len = sizeof(cmd->body) + srf->num_sizes * sizeof(SVGA3dSize);
447
448 cmd = vmw_fifo_reserve(dev_priv, submit_size);
449 if (unlikely(cmd == NULL)) {
450 DRM_ERROR("Fifo reserve failed for create surface.\n");
451 vmw_resource_unreference(&res);
452 return -ENOMEM;
453 }
454
455 cmd->header.id = cpu_to_le32(SVGA_3D_CMD_SURFACE_DEFINE);
456 cmd->header.size = cpu_to_le32(cmd_len);
457 cmd->body.sid = cpu_to_le32(res->id);
458 cmd->body.surfaceFlags = cpu_to_le32(srf->flags);
459 cmd->body.format = cpu_to_le32(srf->format);
460 for (i = 0; i < DRM_VMW_MAX_SURFACE_FACES; ++i) {
461 cmd->body.face[i].numMipLevels =
462 cpu_to_le32(srf->mip_levels[i]);
463 }
464
465 cmd += 1;
466 cmd_size = (SVGA3dSize *) cmd;
467 src_size = srf->sizes;
468
469 for (i = 0; i < srf->num_sizes; ++i, cmd_size++, src_size++) {
470 cmd_size->width = cpu_to_le32(src_size->width);
471 cmd_size->height = cpu_to_le32(src_size->height);
472 cmd_size->depth = cpu_to_le32(src_size->depth);
473 }
474
475 vmw_fifo_commit(dev_priv, submit_size);
476 vmw_resource_activate(res, vmw_hw_surface_destroy);
477 return 0;
478}
479
480static void vmw_user_surface_free(struct vmw_resource *res)
481{
482 struct vmw_surface *srf = container_of(res, struct vmw_surface, res);
483 struct vmw_user_surface *user_srf =
484 container_of(srf, struct vmw_user_surface, srf);
485
486 kfree(srf->sizes);
487 kfree(srf->snooper.image);
488 kfree(user_srf);
489}
490
491int vmw_user_surface_lookup_handle(struct vmw_private *dev_priv,
492 struct ttm_object_file *tfile,
493 uint32_t handle, struct vmw_surface **out)
494{
495 struct vmw_resource *res;
496 struct vmw_surface *srf;
497 struct vmw_user_surface *user_srf;
498 struct ttm_base_object *base;
499 int ret = -EINVAL;
500
501 base = ttm_base_object_lookup(tfile, handle);
502 if (unlikely(base == NULL))
503 return -EINVAL;
504
505 if (unlikely(base->object_type != VMW_RES_SURFACE))
506 goto out_bad_resource;
507
508 user_srf = container_of(base, struct vmw_user_surface, base);
509 srf = &user_srf->srf;
510 res = &srf->res;
511
512 read_lock(&dev_priv->resource_lock);
513
514 if (!res->avail || res->res_free != &vmw_user_surface_free) {
515 read_unlock(&dev_priv->resource_lock);
516 goto out_bad_resource;
517 }
518
519 kref_get(&res->kref);
520 read_unlock(&dev_priv->resource_lock);
521
522 *out = srf;
523 ret = 0;
524
525out_bad_resource:
526 ttm_base_object_unref(&base);
527
528 return ret;
529}
530
531static void vmw_user_surface_base_release(struct ttm_base_object **p_base)
532{
533 struct ttm_base_object *base = *p_base;
534 struct vmw_user_surface *user_srf =
535 container_of(base, struct vmw_user_surface, base);
536 struct vmw_resource *res = &user_srf->srf.res;
537
538 *p_base = NULL;
539 vmw_resource_unreference(&res);
540}
541
542int vmw_surface_destroy_ioctl(struct drm_device *dev, void *data,
543 struct drm_file *file_priv)
544{
545 struct drm_vmw_surface_arg *arg = (struct drm_vmw_surface_arg *)data;
546 struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
547
548 return ttm_ref_object_base_unref(tfile, arg->sid, TTM_REF_USAGE);
549}
550
551int vmw_surface_define_ioctl(struct drm_device *dev, void *data,
552 struct drm_file *file_priv)
553{
554 struct vmw_private *dev_priv = vmw_priv(dev);
555 struct vmw_user_surface *user_srf =
556 kmalloc(sizeof(*user_srf), GFP_KERNEL);
557 struct vmw_surface *srf;
558 struct vmw_resource *res;
559 struct vmw_resource *tmp;
560 union drm_vmw_surface_create_arg *arg =
561 (union drm_vmw_surface_create_arg *)data;
562 struct drm_vmw_surface_create_req *req = &arg->req;
563 struct drm_vmw_surface_arg *rep = &arg->rep;
564 struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
565 struct drm_vmw_size __user *user_sizes;
566 int ret;
567 int i;
568
569 if (unlikely(user_srf == NULL))
570 return -ENOMEM;
571
572 srf = &user_srf->srf;
573 res = &srf->res;
574
575 srf->flags = req->flags;
576 srf->format = req->format;
577 srf->scanout = req->scanout;
578 memcpy(srf->mip_levels, req->mip_levels, sizeof(srf->mip_levels));
579 srf->num_sizes = 0;
580 for (i = 0; i < DRM_VMW_MAX_SURFACE_FACES; ++i)
581 srf->num_sizes += srf->mip_levels[i];
582
583 if (srf->num_sizes > DRM_VMW_MAX_SURFACE_FACES *
584 DRM_VMW_MAX_MIP_LEVELS) {
585 ret = -EINVAL;
586 goto out_err0;
587 }
588
589 srf->sizes = kmalloc(srf->num_sizes * sizeof(*srf->sizes), GFP_KERNEL);
590 if (unlikely(srf->sizes == NULL)) {
591 ret = -ENOMEM;
592 goto out_err0;
593 }
594
595 user_sizes = (struct drm_vmw_size __user *)(unsigned long)
596 req->size_addr;
597
598 ret = copy_from_user(srf->sizes, user_sizes,
599 srf->num_sizes * sizeof(*srf->sizes));
600 if (unlikely(ret != 0))
601 goto out_err1;
602
603 if (srf->scanout &&
604 srf->num_sizes == 1 &&
605 srf->sizes[0].width == 64 &&
606 srf->sizes[0].height == 64 &&
607 srf->format == SVGA3D_A8R8G8B8) {
608
609 srf->snooper.image = kmalloc(64 * 64 * 4, GFP_KERNEL);
610 /* clear the image */
611 if (srf->snooper.image) {
612 memset(srf->snooper.image, 0x00, 64 * 64 * 4);
613 } else {
614 DRM_ERROR("Failed to allocate cursor_image\n");
615 ret = -ENOMEM;
616 goto out_err1;
617 }
618 } else {
619 srf->snooper.image = NULL;
620 }
621 srf->snooper.crtc = NULL;
622
623 user_srf->base.shareable = false;
624 user_srf->base.tfile = NULL;
625
626 /**
627 * From this point, the generic resource management functions
628 * destroy the object on failure.
629 */
630
631 ret = vmw_surface_init(dev_priv, srf, vmw_user_surface_free);
632 if (unlikely(ret != 0))
633 return ret;
634
635 tmp = vmw_resource_reference(&srf->res);
636 ret = ttm_base_object_init(tfile, &user_srf->base,
637 req->shareable, VMW_RES_SURFACE,
638 &vmw_user_surface_base_release, NULL);
639
640 if (unlikely(ret != 0)) {
641 vmw_resource_unreference(&tmp);
642 vmw_resource_unreference(&res);
643 return ret;
644 }
645
646 rep->sid = user_srf->base.hash.key;
647 if (rep->sid == SVGA3D_INVALID_ID)
648 DRM_ERROR("Created bad Surface ID.\n");
649
650 vmw_resource_unreference(&res);
651 return 0;
652out_err1:
653 kfree(srf->sizes);
654out_err0:
655 kfree(user_srf);
656 return ret;
657}
658
659int vmw_surface_reference_ioctl(struct drm_device *dev, void *data,
660 struct drm_file *file_priv)
661{
662 union drm_vmw_surface_reference_arg *arg =
663 (union drm_vmw_surface_reference_arg *)data;
664 struct drm_vmw_surface_arg *req = &arg->req;
665 struct drm_vmw_surface_create_req *rep = &arg->rep;
666 struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
667 struct vmw_surface *srf;
668 struct vmw_user_surface *user_srf;
669 struct drm_vmw_size __user *user_sizes;
670 struct ttm_base_object *base;
671 int ret = -EINVAL;
672
673 base = ttm_base_object_lookup(tfile, req->sid);
674 if (unlikely(base == NULL)) {
675 DRM_ERROR("Could not find surface to reference.\n");
676 return -EINVAL;
677 }
678
679 if (unlikely(base->object_type != VMW_RES_SURFACE))
680 goto out_bad_resource;
681
682 user_srf = container_of(base, struct vmw_user_surface, base);
683 srf = &user_srf->srf;
684
685 ret = ttm_ref_object_add(tfile, &user_srf->base, TTM_REF_USAGE, NULL);
686 if (unlikely(ret != 0)) {
687 DRM_ERROR("Could not add a reference to a surface.\n");
688 goto out_no_reference;
689 }
690
691 rep->flags = srf->flags;
692 rep->format = srf->format;
693 memcpy(rep->mip_levels, srf->mip_levels, sizeof(srf->mip_levels));
694 user_sizes = (struct drm_vmw_size __user *)(unsigned long)
695 rep->size_addr;
696
697 if (user_sizes)
698 ret = copy_to_user(user_sizes, srf->sizes,
699 srf->num_sizes * sizeof(*srf->sizes));
700 if (unlikely(ret != 0))
701 DRM_ERROR("copy_to_user failed %p %u\n",
702 user_sizes, srf->num_sizes);
703out_bad_resource:
704out_no_reference:
705 ttm_base_object_unref(&base);
706
707 return ret;
708}
709
710int vmw_surface_check(struct vmw_private *dev_priv,
711 struct ttm_object_file *tfile,
712 uint32_t handle, int *id)
713{
714 struct ttm_base_object *base;
715 struct vmw_user_surface *user_srf;
716
717 int ret = -EPERM;
718
719 base = ttm_base_object_lookup(tfile, handle);
720 if (unlikely(base == NULL))
721 return -EINVAL;
722
723 if (unlikely(base->object_type != VMW_RES_SURFACE))
724 goto out_bad_surface;
725
726 user_srf = container_of(base, struct vmw_user_surface, base);
727 *id = user_srf->srf.res.id;
728 ret = 0;
729
730out_bad_surface:
731 /**
732 * FIXME: May deadlock here when called from the
733 * command parsing code.
734 */
735
736 ttm_base_object_unref(&base);
737 return ret;
738}
739
740/**
741 * Buffer management.
742 */
743
744static size_t vmw_dmabuf_acc_size(struct ttm_bo_global *glob,
745 unsigned long num_pages)
746{
747 static size_t bo_user_size = ~0;
748
749 size_t page_array_size =
750 (num_pages * sizeof(void *) + PAGE_SIZE - 1) & PAGE_MASK;
751
752 if (unlikely(bo_user_size == ~0)) {
753 bo_user_size = glob->ttm_bo_extra_size +
754 ttm_round_pot(sizeof(struct vmw_dma_buffer));
755 }
756
757 return bo_user_size + page_array_size;
758}
759
760void vmw_dmabuf_gmr_unbind(struct ttm_buffer_object *bo)
761{
762 struct vmw_dma_buffer *vmw_bo = vmw_dma_buffer(bo);
763 struct ttm_bo_global *glob = bo->glob;
764 struct vmw_private *dev_priv =
765 container_of(bo->bdev, struct vmw_private, bdev);
766
767 if (vmw_bo->gmr_bound) {
768 vmw_gmr_unbind(dev_priv, vmw_bo->gmr_id);
769 spin_lock(&glob->lru_lock);
770 ida_remove(&dev_priv->gmr_ida, vmw_bo->gmr_id);
771 spin_unlock(&glob->lru_lock);
772 vmw_bo->gmr_bound = false;
773 }
774}
775
776void vmw_dmabuf_bo_free(struct ttm_buffer_object *bo)
777{
778 struct vmw_dma_buffer *vmw_bo = vmw_dma_buffer(bo);
779 struct ttm_bo_global *glob = bo->glob;
780
781 vmw_dmabuf_gmr_unbind(bo);
782 ttm_mem_global_free(glob->mem_glob, bo->acc_size);
783 kfree(vmw_bo);
784}
785
786int vmw_dmabuf_init(struct vmw_private *dev_priv,
787 struct vmw_dma_buffer *vmw_bo,
788 size_t size, struct ttm_placement *placement,
789 bool interruptible,
790 void (*bo_free) (struct ttm_buffer_object *bo))
791{
792 struct ttm_bo_device *bdev = &dev_priv->bdev;
793 struct ttm_mem_global *mem_glob = bdev->glob->mem_glob;
794 size_t acc_size;
795 int ret;
796
797 BUG_ON(!bo_free);
798
799 acc_size =
800 vmw_dmabuf_acc_size(bdev->glob,
801 (size + PAGE_SIZE - 1) >> PAGE_SHIFT);
802
803 ret = ttm_mem_global_alloc(mem_glob, acc_size, false, false);
804 if (unlikely(ret != 0)) {
805 /* we must free the bo here as
806 * ttm_buffer_object_init does so as well */
807 bo_free(&vmw_bo->base);
808 return ret;
809 }
810
811 memset(vmw_bo, 0, sizeof(*vmw_bo));
812
813 INIT_LIST_HEAD(&vmw_bo->gmr_lru);
814 INIT_LIST_HEAD(&vmw_bo->validate_list);
815 vmw_bo->gmr_id = 0;
816 vmw_bo->gmr_bound = false;
817
818 ret = ttm_bo_init(bdev, &vmw_bo->base, size,
819 ttm_bo_type_device, placement,
820 0, 0, interruptible,
821 NULL, acc_size, bo_free);
822 return ret;
823}
824
825static void vmw_user_dmabuf_destroy(struct ttm_buffer_object *bo)
826{
827 struct vmw_user_dma_buffer *vmw_user_bo = vmw_user_dma_buffer(bo);
828 struct ttm_bo_global *glob = bo->glob;
829
830 vmw_dmabuf_gmr_unbind(bo);
831 ttm_mem_global_free(glob->mem_glob, bo->acc_size);
832 kfree(vmw_user_bo);
833}
834
835static void vmw_user_dmabuf_release(struct ttm_base_object **p_base)
836{
837 struct vmw_user_dma_buffer *vmw_user_bo;
838 struct ttm_base_object *base = *p_base;
839 struct ttm_buffer_object *bo;
840
841 *p_base = NULL;
842
843 if (unlikely(base == NULL))
844 return;
845
846 vmw_user_bo = container_of(base, struct vmw_user_dma_buffer, base);
847 bo = &vmw_user_bo->dma.base;
848 ttm_bo_unref(&bo);
849}
850
851int vmw_dmabuf_alloc_ioctl(struct drm_device *dev, void *data,
852 struct drm_file *file_priv)
853{
854 struct vmw_private *dev_priv = vmw_priv(dev);
855 union drm_vmw_alloc_dmabuf_arg *arg =
856 (union drm_vmw_alloc_dmabuf_arg *)data;
857 struct drm_vmw_alloc_dmabuf_req *req = &arg->req;
858 struct drm_vmw_dmabuf_rep *rep = &arg->rep;
859 struct vmw_user_dma_buffer *vmw_user_bo;
860 struct ttm_buffer_object *tmp;
861 struct vmw_master *vmaster = vmw_master(file_priv->master);
862 int ret;
863
864 vmw_user_bo = kzalloc(sizeof(*vmw_user_bo), GFP_KERNEL);
865 if (unlikely(vmw_user_bo == NULL))
866 return -ENOMEM;
867
868 ret = ttm_read_lock(&vmaster->lock, true);
869 if (unlikely(ret != 0)) {
870 kfree(vmw_user_bo);
871 return ret;
872 }
873
874 ret = vmw_dmabuf_init(dev_priv, &vmw_user_bo->dma, req->size,
875 &vmw_vram_sys_placement, true,
876 &vmw_user_dmabuf_destroy);
877 if (unlikely(ret != 0))
878 return ret;
879
880 tmp = ttm_bo_reference(&vmw_user_bo->dma.base);
881 ret = ttm_base_object_init(vmw_fpriv(file_priv)->tfile,
882 &vmw_user_bo->base,
883 false,
884 ttm_buffer_type,
885 &vmw_user_dmabuf_release, NULL);
886 if (unlikely(ret != 0)) {
887 ttm_bo_unref(&tmp);
888 } else {
889 rep->handle = vmw_user_bo->base.hash.key;
890 rep->map_handle = vmw_user_bo->dma.base.addr_space_offset;
891 rep->cur_gmr_id = vmw_user_bo->base.hash.key;
892 rep->cur_gmr_offset = 0;
893 }
894 ttm_bo_unref(&tmp);
895
896 ttm_read_unlock(&vmaster->lock);
897
898 return 0;
899}
900
901int vmw_dmabuf_unref_ioctl(struct drm_device *dev, void *data,
902 struct drm_file *file_priv)
903{
904 struct drm_vmw_unref_dmabuf_arg *arg =
905 (struct drm_vmw_unref_dmabuf_arg *)data;
906
907 return ttm_ref_object_base_unref(vmw_fpriv(file_priv)->tfile,
908 arg->handle,
909 TTM_REF_USAGE);
910}
911
912uint32_t vmw_dmabuf_validate_node(struct ttm_buffer_object *bo,
913 uint32_t cur_validate_node)
914{
915 struct vmw_dma_buffer *vmw_bo = vmw_dma_buffer(bo);
916
917 if (likely(vmw_bo->on_validate_list))
918 return vmw_bo->cur_validate_node;
919
920 vmw_bo->cur_validate_node = cur_validate_node;
921 vmw_bo->on_validate_list = true;
922
923 return cur_validate_node;
924}
925
926void vmw_dmabuf_validate_clear(struct ttm_buffer_object *bo)
927{
928 struct vmw_dma_buffer *vmw_bo = vmw_dma_buffer(bo);
929
930 vmw_bo->on_validate_list = false;
931}
932
933uint32_t vmw_dmabuf_gmr(struct ttm_buffer_object *bo)
934{
935 struct vmw_dma_buffer *vmw_bo;
936
937 if (bo->mem.mem_type == TTM_PL_VRAM)
938 return SVGA_GMR_FRAMEBUFFER;
939
940 vmw_bo = vmw_dma_buffer(bo);
941
942 return (vmw_bo->gmr_bound) ? vmw_bo->gmr_id : SVGA_GMR_NULL;
943}
944
945void vmw_dmabuf_set_gmr(struct ttm_buffer_object *bo, uint32_t id)
946{
947 struct vmw_dma_buffer *vmw_bo = vmw_dma_buffer(bo);
948 vmw_bo->gmr_bound = true;
949 vmw_bo->gmr_id = id;
950}
951
952int vmw_user_dmabuf_lookup(struct ttm_object_file *tfile,
953 uint32_t handle, struct vmw_dma_buffer **out)
954{
955 struct vmw_user_dma_buffer *vmw_user_bo;
956 struct ttm_base_object *base;
957
958 base = ttm_base_object_lookup(tfile, handle);
959 if (unlikely(base == NULL)) {
960 printk(KERN_ERR "Invalid buffer object handle 0x%08lx.\n",
961 (unsigned long)handle);
962 return -ESRCH;
963 }
964
965 if (unlikely(base->object_type != ttm_buffer_type)) {
966 ttm_base_object_unref(&base);
967 printk(KERN_ERR "Invalid buffer object handle 0x%08lx.\n",
968 (unsigned long)handle);
969 return -EINVAL;
970 }
971
972 vmw_user_bo = container_of(base, struct vmw_user_dma_buffer, base);
973 (void)ttm_bo_reference(&vmw_user_bo->dma.base);
974 ttm_base_object_unref(&base);
975 *out = &vmw_user_bo->dma;
976
977 return 0;
978}
979
980/**
981 * TODO: Implement a gmr id eviction mechanism. Currently we just fail
982 * when we're out of ids, causing GMR space to be allocated
983 * out of VRAM.
984 */
985
986int vmw_gmr_id_alloc(struct vmw_private *dev_priv, uint32_t *p_id)
987{
988 struct ttm_bo_global *glob = dev_priv->bdev.glob;
989 int id;
990 int ret;
991
992 do {
993 if (unlikely(ida_pre_get(&dev_priv->gmr_ida, GFP_KERNEL) == 0))
994 return -ENOMEM;
995
996 spin_lock(&glob->lru_lock);
997 ret = ida_get_new(&dev_priv->gmr_ida, &id);
998 spin_unlock(&glob->lru_lock);
999 } while (ret == -EAGAIN);
1000
1001 if (unlikely(ret != 0))
1002 return ret;
1003
1004 if (unlikely(id >= dev_priv->max_gmr_ids)) {
1005 spin_lock(&glob->lru_lock);
1006 ida_remove(&dev_priv->gmr_ida, id);
1007 spin_unlock(&glob->lru_lock);
1008 return -EBUSY;
1009 }
1010
1011 *p_id = (uint32_t) id;
1012 return 0;
1013}
1014
1015/*
1016 * Stream managment
1017 */
1018
1019static void vmw_stream_destroy(struct vmw_resource *res)
1020{
1021 struct vmw_private *dev_priv = res->dev_priv;
1022 struct vmw_stream *stream;
1023 int ret;
1024
1025 DRM_INFO("%s: unref\n", __func__);
1026 stream = container_of(res, struct vmw_stream, res);
1027
1028 ret = vmw_overlay_unref(dev_priv, stream->stream_id);
1029 WARN_ON(ret != 0);
1030}
1031
1032static int vmw_stream_init(struct vmw_private *dev_priv,
1033 struct vmw_stream *stream,
1034 void (*res_free) (struct vmw_resource *res))
1035{
1036 struct vmw_resource *res = &stream->res;
1037 int ret;
1038
1039 ret = vmw_resource_init(dev_priv, res, &dev_priv->stream_idr,
1040 VMW_RES_STREAM, res_free);
1041
1042 if (unlikely(ret != 0)) {
1043 if (res_free == NULL)
1044 kfree(stream);
1045 else
1046 res_free(&stream->res);
1047 return ret;
1048 }
1049
1050 ret = vmw_overlay_claim(dev_priv, &stream->stream_id);
1051 if (ret) {
1052 vmw_resource_unreference(&res);
1053 return ret;
1054 }
1055
1056 DRM_INFO("%s: claimed\n", __func__);
1057
1058 vmw_resource_activate(&stream->res, vmw_stream_destroy);
1059 return 0;
1060}
1061
1062/**
1063 * User-space context management:
1064 */
1065
1066static void vmw_user_stream_free(struct vmw_resource *res)
1067{
1068 struct vmw_user_stream *stream =
1069 container_of(res, struct vmw_user_stream, stream.res);
1070
1071 kfree(stream);
1072}
1073
1074/**
1075 * This function is called when user space has no more references on the
1076 * base object. It releases the base-object's reference on the resource object.
1077 */
1078
1079static void vmw_user_stream_base_release(struct ttm_base_object **p_base)
1080{
1081 struct ttm_base_object *base = *p_base;
1082 struct vmw_user_stream *stream =
1083 container_of(base, struct vmw_user_stream, base);
1084 struct vmw_resource *res = &stream->stream.res;
1085
1086 *p_base = NULL;
1087 vmw_resource_unreference(&res);
1088}
1089
1090int vmw_stream_unref_ioctl(struct drm_device *dev, void *data,
1091 struct drm_file *file_priv)
1092{
1093 struct vmw_private *dev_priv = vmw_priv(dev);
1094 struct vmw_resource *res;
1095 struct vmw_user_stream *stream;
1096 struct drm_vmw_stream_arg *arg = (struct drm_vmw_stream_arg *)data;
1097 struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
1098 int ret = 0;
1099
1100 res = vmw_resource_lookup(dev_priv, &dev_priv->stream_idr, arg->stream_id);
1101 if (unlikely(res == NULL))
1102 return -EINVAL;
1103
1104 if (res->res_free != &vmw_user_stream_free) {
1105 ret = -EINVAL;
1106 goto out;
1107 }
1108
1109 stream = container_of(res, struct vmw_user_stream, stream.res);
1110 if (stream->base.tfile != tfile) {
1111 ret = -EINVAL;
1112 goto out;
1113 }
1114
1115 ttm_ref_object_base_unref(tfile, stream->base.hash.key, TTM_REF_USAGE);
1116out:
1117 vmw_resource_unreference(&res);
1118 return ret;
1119}
1120
1121int vmw_stream_claim_ioctl(struct drm_device *dev, void *data,
1122 struct drm_file *file_priv)
1123{
1124 struct vmw_private *dev_priv = vmw_priv(dev);
1125 struct vmw_user_stream *stream = kmalloc(sizeof(*stream), GFP_KERNEL);
1126 struct vmw_resource *res;
1127 struct vmw_resource *tmp;
1128 struct drm_vmw_stream_arg *arg = (struct drm_vmw_stream_arg *)data;
1129 struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
1130 int ret;
1131
1132 if (unlikely(stream == NULL))
1133 return -ENOMEM;
1134
1135 res = &stream->stream.res;
1136 stream->base.shareable = false;
1137 stream->base.tfile = NULL;
1138
1139 ret = vmw_stream_init(dev_priv, &stream->stream, vmw_user_stream_free);
1140 if (unlikely(ret != 0))
1141 return ret;
1142
1143 tmp = vmw_resource_reference(res);
1144 ret = ttm_base_object_init(tfile, &stream->base, false, VMW_RES_STREAM,
1145 &vmw_user_stream_base_release, NULL);
1146
1147 if (unlikely(ret != 0)) {
1148 vmw_resource_unreference(&tmp);
1149 goto out_err;
1150 }
1151
1152 arg->stream_id = res->id;
1153out_err:
1154 vmw_resource_unreference(&res);
1155 return ret;
1156}
1157
1158int vmw_user_stream_lookup(struct vmw_private *dev_priv,
1159 struct ttm_object_file *tfile,
1160 uint32_t *inout_id, struct vmw_resource **out)
1161{
1162 struct vmw_user_stream *stream;
1163 struct vmw_resource *res;
1164 int ret;
1165
1166 res = vmw_resource_lookup(dev_priv, &dev_priv->stream_idr, *inout_id);
1167 if (unlikely(res == NULL))
1168 return -EINVAL;
1169
1170 if (res->res_free != &vmw_user_stream_free) {
1171 ret = -EINVAL;
1172 goto err_ref;
1173 }
1174
1175 stream = container_of(res, struct vmw_user_stream, stream.res);
1176 if (stream->base.tfile != tfile) {
1177 ret = -EPERM;
1178 goto err_ref;
1179 }
1180
1181 *inout_id = stream->stream.stream_id;
1182 *out = res;
1183 return 0;
1184err_ref:
1185 vmw_resource_unreference(&res);
1186 return ret;
1187}
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_ttm_glue.c b/drivers/gpu/drm/vmwgfx/vmwgfx_ttm_glue.c
new file mode 100644
index 000000000000..e3df4adfb4d8
--- /dev/null
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_ttm_glue.c
@@ -0,0 +1,99 @@
1/**************************************************************************
2 *
3 * Copyright © 2009 VMware, Inc., Palo Alto, CA., USA
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
21 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
22 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
23 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
24 * USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28#include "drmP.h"
29#include "vmwgfx_drv.h"
30
31int vmw_mmap(struct file *filp, struct vm_area_struct *vma)
32{
33 struct drm_file *file_priv;
34 struct vmw_private *dev_priv;
35
36 if (unlikely(vma->vm_pgoff < VMWGFX_FILE_PAGE_OFFSET)) {
37 if (vmw_fifo_mmap(filp, vma) == 0)
38 return 0;
39 return drm_mmap(filp, vma);
40 }
41
42 file_priv = (struct drm_file *)filp->private_data;
43 dev_priv = vmw_priv(file_priv->minor->dev);
44 return ttm_bo_mmap(filp, vma, &dev_priv->bdev);
45}
46
47static int vmw_ttm_mem_global_init(struct ttm_global_reference *ref)
48{
49 DRM_INFO("global init.\n");
50 return ttm_mem_global_init(ref->object);
51}
52
53static void vmw_ttm_mem_global_release(struct ttm_global_reference *ref)
54{
55 ttm_mem_global_release(ref->object);
56}
57
58int vmw_ttm_global_init(struct vmw_private *dev_priv)
59{
60 struct ttm_global_reference *global_ref;
61 int ret;
62
63 global_ref = &dev_priv->mem_global_ref;
64 global_ref->global_type = TTM_GLOBAL_TTM_MEM;
65 global_ref->size = sizeof(struct ttm_mem_global);
66 global_ref->init = &vmw_ttm_mem_global_init;
67 global_ref->release = &vmw_ttm_mem_global_release;
68
69 ret = ttm_global_item_ref(global_ref);
70 if (unlikely(ret != 0)) {
71 DRM_ERROR("Failed setting up TTM memory accounting.\n");
72 return ret;
73 }
74
75 dev_priv->bo_global_ref.mem_glob =
76 dev_priv->mem_global_ref.object;
77 global_ref = &dev_priv->bo_global_ref.ref;
78 global_ref->global_type = TTM_GLOBAL_TTM_BO;
79 global_ref->size = sizeof(struct ttm_bo_global);
80 global_ref->init = &ttm_bo_global_init;
81 global_ref->release = &ttm_bo_global_release;
82 ret = ttm_global_item_ref(global_ref);
83
84 if (unlikely(ret != 0)) {
85 DRM_ERROR("Failed setting up TTM buffer objects.\n");
86 goto out_no_bo;
87 }
88
89 return 0;
90out_no_bo:
91 ttm_global_item_unref(&dev_priv->mem_global_ref);
92 return ret;
93}
94
95void vmw_ttm_global_release(struct vmw_private *dev_priv)
96{
97 ttm_global_item_unref(&dev_priv->bo_global_ref.ref);
98 ttm_global_item_unref(&dev_priv->mem_global_ref);
99}
diff --git a/drivers/gpu/vga/vgaarb.c b/drivers/gpu/vga/vgaarb.c
index 1ac0c93603c9..2f6cf69ecb39 100644
--- a/drivers/gpu/vga/vgaarb.c
+++ b/drivers/gpu/vga/vgaarb.c
@@ -961,7 +961,7 @@ static ssize_t vga_arb_write(struct file *file, const char __user * buf,
961 remaining -= 7; 961 remaining -= 7;
962 pr_devel("client 0x%p called 'target'\n", priv); 962 pr_devel("client 0x%p called 'target'\n", priv);
963 /* if target is default */ 963 /* if target is default */
964 if (!strncmp(buf, "default", 7)) 964 if (!strncmp(curr_pos, "default", 7))
965 pdev = pci_dev_get(vga_default_device()); 965 pdev = pci_dev_get(vga_default_device());
966 else { 966 else {
967 if (!vga_pci_str_to_vars(curr_pos, remaining, 967 if (!vga_pci_str_to_vars(curr_pos, remaining,
diff --git a/drivers/hid/hid-apple.c b/drivers/hid/hid-apple.c
index 4b96e7a898cf..5b4d66dc1a05 100644
--- a/drivers/hid/hid-apple.c
+++ b/drivers/hid/hid-apple.c
@@ -431,6 +431,13 @@ static const struct hid_device_id apple_devices[] = {
431 .driver_data = APPLE_HAS_FN | APPLE_ISO_KEYBOARD }, 431 .driver_data = APPLE_HAS_FN | APPLE_ISO_KEYBOARD },
432 { HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING3_JIS), 432 { HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING3_JIS),
433 .driver_data = APPLE_HAS_FN | APPLE_RDESC_JIS }, 433 .driver_data = APPLE_HAS_FN | APPLE_RDESC_JIS },
434 { HID_BLUETOOTH_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_ALU_WIRELESS_2009_ANSI),
435 .driver_data = APPLE_NUMLOCK_EMULATION | APPLE_HAS_FN },
436 { HID_BLUETOOTH_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_ALU_WIRELESS_2009_ISO),
437 .driver_data = APPLE_NUMLOCK_EMULATION | APPLE_HAS_FN |
438 APPLE_ISO_KEYBOARD },
439 { HID_BLUETOOTH_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_ALU_WIRELESS_2009_JIS),
440 .driver_data = APPLE_NUMLOCK_EMULATION | APPLE_HAS_FN },
434 { HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_FOUNTAIN_TP_ONLY), 441 { HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_FOUNTAIN_TP_ONLY),
435 .driver_data = APPLE_NUMLOCK_EMULATION | APPLE_HAS_FN }, 442 .driver_data = APPLE_NUMLOCK_EMULATION | APPLE_HAS_FN },
436 { HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_GEYSER1_TP_ONLY), 443 { HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_GEYSER1_TP_ONLY),
diff --git a/drivers/hid/hid-core.c b/drivers/hid/hid-core.c
index 80792d38d25c..eabe5f87c6c1 100644
--- a/drivers/hid/hid-core.c
+++ b/drivers/hid/hid-core.c
@@ -1285,6 +1285,9 @@ static const struct hid_device_id hid_blacklist[] = {
1285 { HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING3_ANSI) }, 1285 { HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING3_ANSI) },
1286 { HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING3_ISO) }, 1286 { HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING3_ISO) },
1287 { HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING3_JIS) }, 1287 { HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING3_JIS) },
1288 { HID_BLUETOOTH_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_ALU_WIRELESS_2009_ANSI) },
1289 { HID_BLUETOOTH_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_ALU_WIRELESS_2009_ISO) },
1290 { HID_BLUETOOTH_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_ALU_WIRELESS_2009_JIS) },
1288 { HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_FOUNTAIN_TP_ONLY) }, 1291 { HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_FOUNTAIN_TP_ONLY) },
1289 { HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_GEYSER1_TP_ONLY) }, 1292 { HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_GEYSER1_TP_ONLY) },
1290 { HID_USB_DEVICE(USB_VENDOR_ID_BELKIN, USB_DEVICE_ID_FLIP_KVM) }, 1293 { HID_USB_DEVICE(USB_VENDOR_ID_BELKIN, USB_DEVICE_ID_FLIP_KVM) },
@@ -1553,6 +1556,7 @@ static const struct hid_device_id hid_ignore_list[] = {
1553 { HID_USB_DEVICE(USB_VENDOR_ID_DELORME, USB_DEVICE_ID_DELORME_EARTHMATE) }, 1556 { HID_USB_DEVICE(USB_VENDOR_ID_DELORME, USB_DEVICE_ID_DELORME_EARTHMATE) },
1554 { HID_USB_DEVICE(USB_VENDOR_ID_DELORME, USB_DEVICE_ID_DELORME_EM_LT20) }, 1557 { HID_USB_DEVICE(USB_VENDOR_ID_DELORME, USB_DEVICE_ID_DELORME_EM_LT20) },
1555 { HID_USB_DEVICE(USB_VENDOR_ID_ESSENTIAL_REALITY, USB_DEVICE_ID_ESSENTIAL_REALITY_P5) }, 1558 { HID_USB_DEVICE(USB_VENDOR_ID_ESSENTIAL_REALITY, USB_DEVICE_ID_ESSENTIAL_REALITY_P5) },
1559 { HID_USB_DEVICE(USB_VENDOR_ID_ETT, USB_DEVICE_ID_TC5UH) },
1556 { HID_USB_DEVICE(USB_VENDOR_ID_GENERAL_TOUCH, 0x0001) }, 1560 { HID_USB_DEVICE(USB_VENDOR_ID_GENERAL_TOUCH, 0x0001) },
1557 { HID_USB_DEVICE(USB_VENDOR_ID_GENERAL_TOUCH, 0x0002) }, 1561 { HID_USB_DEVICE(USB_VENDOR_ID_GENERAL_TOUCH, 0x0002) },
1558 { HID_USB_DEVICE(USB_VENDOR_ID_GENERAL_TOUCH, 0x0003) }, 1562 { HID_USB_DEVICE(USB_VENDOR_ID_GENERAL_TOUCH, 0x0003) },
diff --git a/drivers/hid/hid-ids.h b/drivers/hid/hid-ids.h
index 3839340e293a..010368e649ed 100644
--- a/drivers/hid/hid-ids.h
+++ b/drivers/hid/hid-ids.h
@@ -88,6 +88,9 @@
88#define USB_DEVICE_ID_APPLE_WELLSPRING3_ANSI 0x0236 88#define USB_DEVICE_ID_APPLE_WELLSPRING3_ANSI 0x0236
89#define USB_DEVICE_ID_APPLE_WELLSPRING3_ISO 0x0237 89#define USB_DEVICE_ID_APPLE_WELLSPRING3_ISO 0x0237
90#define USB_DEVICE_ID_APPLE_WELLSPRING3_JIS 0x0238 90#define USB_DEVICE_ID_APPLE_WELLSPRING3_JIS 0x0238
91#define USB_DEVICE_ID_APPLE_ALU_WIRELESS_2009_ANSI 0x0239
92#define USB_DEVICE_ID_APPLE_ALU_WIRELESS_2009_ISO 0x023a
93#define USB_DEVICE_ID_APPLE_ALU_WIRELESS_2009_JIS 0x023b
91#define USB_DEVICE_ID_APPLE_FOUNTAIN_TP_ONLY 0x030a 94#define USB_DEVICE_ID_APPLE_FOUNTAIN_TP_ONLY 0x030a
92#define USB_DEVICE_ID_APPLE_GEYSER1_TP_ONLY 0x030b 95#define USB_DEVICE_ID_APPLE_GEYSER1_TP_ONLY 0x030b
93#define USB_DEVICE_ID_APPLE_ATV_IRCONTROL 0x8241 96#define USB_DEVICE_ID_APPLE_ATV_IRCONTROL 0x8241
@@ -166,6 +169,9 @@
166#define USB_VENDOR_ID_ESSENTIAL_REALITY 0x0d7f 169#define USB_VENDOR_ID_ESSENTIAL_REALITY 0x0d7f
167#define USB_DEVICE_ID_ESSENTIAL_REALITY_P5 0x0100 170#define USB_DEVICE_ID_ESSENTIAL_REALITY_P5 0x0100
168 171
172#define USB_VENDOR_ID_ETT 0x0664
173#define USB_DEVICE_ID_TC5UH 0x0309
174
169#define USB_VENDOR_ID_EZKEY 0x0518 175#define USB_VENDOR_ID_EZKEY 0x0518
170#define USB_DEVICE_ID_BTC_8193 0x0002 176#define USB_DEVICE_ID_BTC_8193 0x0002
171 177
diff --git a/drivers/hid/hid-lg.h b/drivers/hid/hid-lg.h
index 27ae750ca878..bf31592eaf79 100644
--- a/drivers/hid/hid-lg.h
+++ b/drivers/hid/hid-lg.h
@@ -1,8 +1,6 @@
1#ifndef __HID_LG_H 1#ifndef __HID_LG_H
2#define __HID_LG_H 2#define __HID_LG_H
3 3
4#include <linux/autoconf.h>
5
6#ifdef CONFIG_LOGITECH_FF 4#ifdef CONFIG_LOGITECH_FF
7int lgff_init(struct hid_device *hdev); 5int lgff_init(struct hid_device *hdev);
8#else 6#else
diff --git a/drivers/hid/hid-samsung.c b/drivers/hid/hid-samsung.c
index 5b222eed0692..510dd1340597 100644
--- a/drivers/hid/hid-samsung.c
+++ b/drivers/hid/hid-samsung.c
@@ -39,7 +39,17 @@
39 * 39 *
40 * 3. 135 byte report descriptor 40 * 3. 135 byte report descriptor
41 * Report #4 has an array field with logical range 0..17 instead of 1..14. 41 * Report #4 has an array field with logical range 0..17 instead of 1..14.
42 *
43 * 4. 171 byte report descriptor
44 * Report #3 has an array field with logical range 0..1 instead of 1..3.
42 */ 45 */
46static inline void samsung_dev_trace(struct hid_device *hdev,
47 unsigned int rsize)
48{
49 dev_info(&hdev->dev, "fixing up Samsung IrDA %d byte report "
50 "descriptor\n", rsize);
51}
52
43static void samsung_report_fixup(struct hid_device *hdev, __u8 *rdesc, 53static void samsung_report_fixup(struct hid_device *hdev, __u8 *rdesc,
44 unsigned int rsize) 54 unsigned int rsize)
45{ 55{
@@ -47,8 +57,7 @@ static void samsung_report_fixup(struct hid_device *hdev, __u8 *rdesc,
47 rdesc[177] == 0x75 && rdesc[178] == 0x30 && 57 rdesc[177] == 0x75 && rdesc[178] == 0x30 &&
48 rdesc[179] == 0x95 && rdesc[180] == 0x01 && 58 rdesc[179] == 0x95 && rdesc[180] == 0x01 &&
49 rdesc[182] == 0x40) { 59 rdesc[182] == 0x40) {
50 dev_info(&hdev->dev, "fixing up Samsung IrDA %d byte report " 60 samsung_dev_trace(hdev, 184);
51 "descriptor\n", 184);
52 rdesc[176] = 0xff; 61 rdesc[176] = 0xff;
53 rdesc[178] = 0x08; 62 rdesc[178] = 0x08;
54 rdesc[180] = 0x06; 63 rdesc[180] = 0x06;
@@ -56,17 +65,21 @@ static void samsung_report_fixup(struct hid_device *hdev, __u8 *rdesc,
56 } else 65 } else
57 if (rsize == 203 && rdesc[192] == 0x15 && rdesc[193] == 0x0 && 66 if (rsize == 203 && rdesc[192] == 0x15 && rdesc[193] == 0x0 &&
58 rdesc[194] == 0x25 && rdesc[195] == 0x12) { 67 rdesc[194] == 0x25 && rdesc[195] == 0x12) {
59 dev_info(&hdev->dev, "fixing up Samsung IrDA %d byte report " 68 samsung_dev_trace(hdev, 203);
60 "descriptor\n", 203);
61 rdesc[193] = 0x1; 69 rdesc[193] = 0x1;
62 rdesc[195] = 0xf; 70 rdesc[195] = 0xf;
63 } else 71 } else
64 if (rsize == 135 && rdesc[124] == 0x15 && rdesc[125] == 0x0 && 72 if (rsize == 135 && rdesc[124] == 0x15 && rdesc[125] == 0x0 &&
65 rdesc[126] == 0x25 && rdesc[127] == 0x11) { 73 rdesc[126] == 0x25 && rdesc[127] == 0x11) {
66 dev_info(&hdev->dev, "fixing up Samsung IrDA %d byte report " 74 samsung_dev_trace(hdev, 135);
67 "descriptor\n", 135);
68 rdesc[125] = 0x1; 75 rdesc[125] = 0x1;
69 rdesc[127] = 0xe; 76 rdesc[127] = 0xe;
77 } else
78 if (rsize == 171 && rdesc[160] == 0x15 && rdesc[161] == 0x0 &&
79 rdesc[162] == 0x25 && rdesc[163] == 0x01) {
80 samsung_dev_trace(hdev, 171);
81 rdesc[161] = 0x1;
82 rdesc[163] = 0x3;
70 } 83 }
71} 84}
72 85
diff --git a/drivers/hid/hid-wacom.c b/drivers/hid/hid-wacom.c
index 747542172242..12dcda529201 100644
--- a/drivers/hid/hid-wacom.c
+++ b/drivers/hid/hid-wacom.c
@@ -142,6 +142,7 @@ static int wacom_raw_event(struct hid_device *hdev, struct hid_report *report,
142 wdata->butstate = rw; 142 wdata->butstate = rw;
143 input_report_key(input, BTN_0, rw & 0x02); 143 input_report_key(input, BTN_0, rw & 0x02);
144 input_report_key(input, BTN_1, rw & 0x01); 144 input_report_key(input, BTN_1, rw & 0x01);
145 input_report_key(input, BTN_TOOL_FINGER, 0xf0);
145 input_event(input, EV_MSC, MSC_SERIAL, 0xf0); 146 input_event(input, EV_MSC, MSC_SERIAL, 0xf0);
146 input_sync(input); 147 input_sync(input);
147 } 148 }
@@ -196,6 +197,9 @@ static int wacom_probe(struct hid_device *hdev,
196 /* Pad */ 197 /* Pad */
197 input->evbit[0] |= BIT(EV_MSC); 198 input->evbit[0] |= BIT(EV_MSC);
198 input->mscbit[0] |= BIT(MSC_SERIAL); 199 input->mscbit[0] |= BIT(MSC_SERIAL);
200 set_bit(BTN_0, input->keybit);
201 set_bit(BTN_1, input->keybit);
202 set_bit(BTN_TOOL_FINGER, input->keybit);
199 203
200 /* Distance, rubber and mouse */ 204 /* Distance, rubber and mouse */
201 input->absbit[0] |= BIT(ABS_DISTANCE); 205 input->absbit[0] |= BIT(ABS_DISTANCE);
diff --git a/drivers/hwmon/Kconfig b/drivers/hwmon/Kconfig
index 95ccbe377f9c..68cf87749a42 100644
--- a/drivers/hwmon/Kconfig
+++ b/drivers/hwmon/Kconfig
@@ -228,6 +228,18 @@ config SENSORS_K8TEMP
228 This driver can also be built as a module. If so, the module 228 This driver can also be built as a module. If so, the module
229 will be called k8temp. 229 will be called k8temp.
230 230
231config SENSORS_K10TEMP
232 tristate "AMD Phenom/Sempron/Turion/Opteron temperature sensor"
233 depends on X86 && PCI
234 help
235 If you say yes here you get support for the temperature
236 sensor(s) inside your CPU. Supported are later revisions of
237 the AMD Family 10h and all revisions of the AMD Family 11h
238 microarchitectures.
239
240 This driver can also be built as a module. If so, the module
241 will be called k10temp.
242
231config SENSORS_AMS 243config SENSORS_AMS
232 tristate "Apple Motion Sensor driver" 244 tristate "Apple Motion Sensor driver"
233 depends on PPC_PMAC && !PPC64 && INPUT && ((ADB_PMU && I2C = y) || (ADB_PMU && !I2C) || I2C) && EXPERIMENTAL 245 depends on PPC_PMAC && !PPC64 && INPUT && ((ADB_PMU && I2C = y) || (ADB_PMU && !I2C) || I2C) && EXPERIMENTAL
@@ -380,7 +392,7 @@ config SENSORS_GL520SM
380 392
381config SENSORS_CORETEMP 393config SENSORS_CORETEMP
382 tristate "Intel Core/Core2/Atom temperature sensor" 394 tristate "Intel Core/Core2/Atom temperature sensor"
383 depends on X86 && EXPERIMENTAL 395 depends on X86 && PCI && EXPERIMENTAL
384 help 396 help
385 If you say yes here you get support for the temperature 397 If you say yes here you get support for the temperature
386 sensor inside your CPU. Most of the family 6 CPUs 398 sensor inside your CPU. Most of the family 6 CPUs
@@ -780,6 +792,16 @@ config SENSORS_ADS7828
780 This driver can also be built as a module. If so, the module 792 This driver can also be built as a module. If so, the module
781 will be called ads7828. 793 will be called ads7828.
782 794
795config SENSORS_AMC6821
796 tristate "Texas Instruments AMC6821"
797 depends on I2C && EXPERIMENTAL
798 help
799 If you say yes here you get support for the Texas Instruments
800 AMC6821 hardware monitoring chips.
801
802 This driver can also be build as a module. If so, the module
803 will be called amc6821.
804
783config SENSORS_THMC50 805config SENSORS_THMC50
784 tristate "Texas Instruments THMC50 / Analog Devices ADM1022" 806 tristate "Texas Instruments THMC50 / Analog Devices ADM1022"
785 depends on I2C && EXPERIMENTAL 807 depends on I2C && EXPERIMENTAL
@@ -810,6 +832,14 @@ config SENSORS_TMP421
810 This driver can also be built as a module. If so, the module 832 This driver can also be built as a module. If so, the module
811 will be called tmp421. 833 will be called tmp421.
812 834
835config SENSORS_VIA_CPUTEMP
836 tristate "VIA CPU temperature sensor"
837 depends on X86
838 help
839 If you say yes here you get support for the temperature
840 sensor inside your CPU. Supported are all known variants of
841 the VIA C7 and Nano.
842
813config SENSORS_VIA686A 843config SENSORS_VIA686A
814 tristate "VIA686A" 844 tristate "VIA686A"
815 depends on PCI 845 depends on PCI
@@ -998,6 +1028,23 @@ config SENSORS_LIS3_SPI
998 will be called lis3lv02d and a specific module for the SPI transport 1028 will be called lis3lv02d and a specific module for the SPI transport
999 is called lis3lv02d_spi. 1029 is called lis3lv02d_spi.
1000 1030
1031config SENSORS_LIS3_I2C
1032 tristate "STMicroeletronics LIS3LV02Dx three-axis digital accelerometer (I2C)"
1033 depends on I2C && INPUT
1034 select INPUT_POLLDEV
1035 default n
1036 help
1037 This driver provides support for the LIS3LV02Dx accelerometer connected
1038 via I2C. The accelerometer data is readable via
1039 /sys/devices/platform/lis3lv02d.
1040
1041 This driver also provides an absolute input class device, allowing
1042 the device to act as a pinball machine-esque joystick.
1043
1044 This driver can also be built as modules. If so, the core module
1045 will be called lis3lv02d and a specific module for the I2C transport
1046 is called lis3lv02d_i2c.
1047
1001config SENSORS_APPLESMC 1048config SENSORS_APPLESMC
1002 tristate "Apple SMC (Motion sensor, light sensor, keyboard backlight)" 1049 tristate "Apple SMC (Motion sensor, light sensor, keyboard backlight)"
1003 depends on INPUT && X86 1050 depends on INPUT && X86
diff --git a/drivers/hwmon/Makefile b/drivers/hwmon/Makefile
index 33c2ee105284..4bc215c0953f 100644
--- a/drivers/hwmon/Makefile
+++ b/drivers/hwmon/Makefile
@@ -53,8 +53,10 @@ obj-$(CONFIG_SENSORS_IBMAEM) += ibmaem.o
53obj-$(CONFIG_SENSORS_IBMPEX) += ibmpex.o 53obj-$(CONFIG_SENSORS_IBMPEX) += ibmpex.o
54obj-$(CONFIG_SENSORS_IT87) += it87.o 54obj-$(CONFIG_SENSORS_IT87) += it87.o
55obj-$(CONFIG_SENSORS_K8TEMP) += k8temp.o 55obj-$(CONFIG_SENSORS_K8TEMP) += k8temp.o
56obj-$(CONFIG_SENSORS_K10TEMP) += k10temp.o
56obj-$(CONFIG_SENSORS_LIS3LV02D) += lis3lv02d.o hp_accel.o 57obj-$(CONFIG_SENSORS_LIS3LV02D) += lis3lv02d.o hp_accel.o
57obj-$(CONFIG_SENSORS_LIS3_SPI) += lis3lv02d.o lis3lv02d_spi.o 58obj-$(CONFIG_SENSORS_LIS3_SPI) += lis3lv02d.o lis3lv02d_spi.o
59obj-$(CONFIG_SENSORS_LIS3_I2C) += lis3lv02d.o lis3lv02d_i2c.o
58obj-$(CONFIG_SENSORS_LM63) += lm63.o 60obj-$(CONFIG_SENSORS_LM63) += lm63.o
59obj-$(CONFIG_SENSORS_LM70) += lm70.o 61obj-$(CONFIG_SENSORS_LM70) += lm70.o
60obj-$(CONFIG_SENSORS_LM73) += lm73.o 62obj-$(CONFIG_SENSORS_LM73) += lm73.o
@@ -84,9 +86,11 @@ obj-$(CONFIG_SENSORS_SIS5595) += sis5595.o
84obj-$(CONFIG_SENSORS_SMSC47B397)+= smsc47b397.o 86obj-$(CONFIG_SENSORS_SMSC47B397)+= smsc47b397.o
85obj-$(CONFIG_SENSORS_SMSC47M1) += smsc47m1.o 87obj-$(CONFIG_SENSORS_SMSC47M1) += smsc47m1.o
86obj-$(CONFIG_SENSORS_SMSC47M192)+= smsc47m192.o 88obj-$(CONFIG_SENSORS_SMSC47M192)+= smsc47m192.o
89obj-$(CONFIG_SENSORS_AMC6821) += amc6821.o
87obj-$(CONFIG_SENSORS_THMC50) += thmc50.o 90obj-$(CONFIG_SENSORS_THMC50) += thmc50.o
88obj-$(CONFIG_SENSORS_TMP401) += tmp401.o 91obj-$(CONFIG_SENSORS_TMP401) += tmp401.o
89obj-$(CONFIG_SENSORS_TMP421) += tmp421.o 92obj-$(CONFIG_SENSORS_TMP421) += tmp421.o
93obj-$(CONFIG_SENSORS_VIA_CPUTEMP)+= via-cputemp.o
90obj-$(CONFIG_SENSORS_VIA686A) += via686a.o 94obj-$(CONFIG_SENSORS_VIA686A) += via686a.o
91obj-$(CONFIG_SENSORS_VT1211) += vt1211.o 95obj-$(CONFIG_SENSORS_VT1211) += vt1211.o
92obj-$(CONFIG_SENSORS_VT8231) += vt8231.o 96obj-$(CONFIG_SENSORS_VT8231) += vt8231.o
diff --git a/drivers/hwmon/adt7462.c b/drivers/hwmon/adt7462.c
index a1a7ef14b519..b8156b4893bb 100644
--- a/drivers/hwmon/adt7462.c
+++ b/drivers/hwmon/adt7462.c
@@ -94,7 +94,7 @@ static const unsigned short normal_i2c[] = { 0x58, 0x5C, I2C_CLIENT_END };
94#define ADT7462_PIN24_SHIFT 6 94#define ADT7462_PIN24_SHIFT 6
95#define ADT7462_PIN26_VOLT_INPUT 0x08 95#define ADT7462_PIN26_VOLT_INPUT 0x08
96#define ADT7462_PIN25_VOLT_INPUT 0x20 96#define ADT7462_PIN25_VOLT_INPUT 0x20
97#define ADT7462_PIN28_SHIFT 6 /* cfg3 */ 97#define ADT7462_PIN28_SHIFT 4 /* cfg3 */
98#define ADT7462_PIN28_VOLT 0x5 98#define ADT7462_PIN28_VOLT 0x5
99 99
100#define ADT7462_REG_ALARM1 0xB8 100#define ADT7462_REG_ALARM1 0xB8
@@ -179,7 +179,7 @@ static const unsigned short normal_i2c[] = { 0x58, 0x5C, I2C_CLIENT_END };
179 * 179 *
180 * Some, but not all, of these voltages have low/high limits. 180 * Some, but not all, of these voltages have low/high limits.
181 */ 181 */
182#define ADT7462_VOLT_COUNT 12 182#define ADT7462_VOLT_COUNT 13
183 183
184#define ADT7462_VENDOR 0x41 184#define ADT7462_VENDOR 0x41
185#define ADT7462_DEVICE 0x62 185#define ADT7462_DEVICE 0x62
diff --git a/drivers/hwmon/amc6821.c b/drivers/hwmon/amc6821.c
new file mode 100644
index 000000000000..fa9708c2d723
--- /dev/null
+++ b/drivers/hwmon/amc6821.c
@@ -0,0 +1,1115 @@
1/*
2 amc6821.c - Part of lm_sensors, Linux kernel modules for hardware
3 monitoring
4 Copyright (C) 2009 T. Mertelj <tomaz.mertelj@guest.arnes.si>
5
6 Based on max6650.c:
7 Copyright (C) 2007 Hans J. Koch <hjk@linutronix.de>
8
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2 of the License, or
12 (at your option) any later version.
13
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
18
19 You should have received a copy of the GNU General Public License
20 along with this program; if not, write to the Free Software
21 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22*/
23
24
25#include <linux/kernel.h> /* Needed for KERN_INFO */
26#include <linux/module.h>
27#include <linux/init.h>
28#include <linux/slab.h>
29#include <linux/jiffies.h>
30#include <linux/i2c.h>
31#include <linux/hwmon.h>
32#include <linux/hwmon-sysfs.h>
33#include <linux/err.h>
34#include <linux/mutex.h>
35
36
37/*
38 * Addresses to scan.
39 */
40
41static const unsigned short normal_i2c[] = {0x18, 0x19, 0x1a, 0x2c, 0x2d, 0x2e,
42 0x4c, 0x4d, 0x4e, I2C_CLIENT_END};
43
44
45
46/*
47 * Insmod parameters
48 */
49
50static int pwminv = 0; /*Inverted PWM output. */
51module_param(pwminv, int, S_IRUGO);
52
53static int init = 1; /*Power-on initialization.*/
54module_param(init, int, S_IRUGO);
55
56
57enum chips { amc6821 };
58
59#define AMC6821_REG_DEV_ID 0x3D
60#define AMC6821_REG_COMP_ID 0x3E
61#define AMC6821_REG_CONF1 0x00
62#define AMC6821_REG_CONF2 0x01
63#define AMC6821_REG_CONF3 0x3F
64#define AMC6821_REG_CONF4 0x04
65#define AMC6821_REG_STAT1 0x02
66#define AMC6821_REG_STAT2 0x03
67#define AMC6821_REG_TDATA_LOW 0x08
68#define AMC6821_REG_TDATA_HI 0x09
69#define AMC6821_REG_LTEMP_HI 0x0A
70#define AMC6821_REG_RTEMP_HI 0x0B
71#define AMC6821_REG_LTEMP_LIMIT_MIN 0x15
72#define AMC6821_REG_LTEMP_LIMIT_MAX 0x14
73#define AMC6821_REG_RTEMP_LIMIT_MIN 0x19
74#define AMC6821_REG_RTEMP_LIMIT_MAX 0x18
75#define AMC6821_REG_LTEMP_CRIT 0x1B
76#define AMC6821_REG_RTEMP_CRIT 0x1D
77#define AMC6821_REG_PSV_TEMP 0x1C
78#define AMC6821_REG_DCY 0x22
79#define AMC6821_REG_LTEMP_FAN_CTRL 0x24
80#define AMC6821_REG_RTEMP_FAN_CTRL 0x25
81#define AMC6821_REG_DCY_LOW_TEMP 0x21
82
83#define AMC6821_REG_TACH_LLIMITL 0x10
84#define AMC6821_REG_TACH_LLIMITH 0x11
85#define AMC6821_REG_TACH_HLIMITL 0x12
86#define AMC6821_REG_TACH_HLIMITH 0x13
87
88#define AMC6821_CONF1_START 0x01
89#define AMC6821_CONF1_FAN_INT_EN 0x02
90#define AMC6821_CONF1_FANIE 0x04
91#define AMC6821_CONF1_PWMINV 0x08
92#define AMC6821_CONF1_FAN_FAULT_EN 0x10
93#define AMC6821_CONF1_FDRC0 0x20
94#define AMC6821_CONF1_FDRC1 0x40
95#define AMC6821_CONF1_THERMOVIE 0x80
96
97#define AMC6821_CONF2_PWM_EN 0x01
98#define AMC6821_CONF2_TACH_MODE 0x02
99#define AMC6821_CONF2_TACH_EN 0x04
100#define AMC6821_CONF2_RTFIE 0x08
101#define AMC6821_CONF2_LTOIE 0x10
102#define AMC6821_CONF2_RTOIE 0x20
103#define AMC6821_CONF2_PSVIE 0x40
104#define AMC6821_CONF2_RST 0x80
105
106#define AMC6821_CONF3_THERM_FAN_EN 0x80
107#define AMC6821_CONF3_REV_MASK 0x0F
108
109#define AMC6821_CONF4_OVREN 0x10
110#define AMC6821_CONF4_TACH_FAST 0x20
111#define AMC6821_CONF4_PSPR 0x40
112#define AMC6821_CONF4_MODE 0x80
113
114#define AMC6821_STAT1_RPM_ALARM 0x01
115#define AMC6821_STAT1_FANS 0x02
116#define AMC6821_STAT1_RTH 0x04
117#define AMC6821_STAT1_RTL 0x08
118#define AMC6821_STAT1_R_THERM 0x10
119#define AMC6821_STAT1_RTF 0x20
120#define AMC6821_STAT1_LTH 0x40
121#define AMC6821_STAT1_LTL 0x80
122
123#define AMC6821_STAT2_RTC 0x08
124#define AMC6821_STAT2_LTC 0x10
125#define AMC6821_STAT2_LPSV 0x20
126#define AMC6821_STAT2_L_THERM 0x40
127#define AMC6821_STAT2_THERM_IN 0x80
128
129enum {IDX_TEMP1_INPUT = 0, IDX_TEMP1_MIN, IDX_TEMP1_MAX,
130 IDX_TEMP1_CRIT, IDX_TEMP2_INPUT, IDX_TEMP2_MIN,
131 IDX_TEMP2_MAX, IDX_TEMP2_CRIT,
132 TEMP_IDX_LEN, };
133
134static const u8 temp_reg[] = {AMC6821_REG_LTEMP_HI,
135 AMC6821_REG_LTEMP_LIMIT_MIN,
136 AMC6821_REG_LTEMP_LIMIT_MAX,
137 AMC6821_REG_LTEMP_CRIT,
138 AMC6821_REG_RTEMP_HI,
139 AMC6821_REG_RTEMP_LIMIT_MIN,
140 AMC6821_REG_RTEMP_LIMIT_MAX,
141 AMC6821_REG_RTEMP_CRIT, };
142
143enum {IDX_FAN1_INPUT = 0, IDX_FAN1_MIN, IDX_FAN1_MAX,
144 FAN1_IDX_LEN, };
145
146static const u8 fan_reg_low[] = {AMC6821_REG_TDATA_LOW,
147 AMC6821_REG_TACH_LLIMITL,
148 AMC6821_REG_TACH_HLIMITL, };
149
150
151static const u8 fan_reg_hi[] = {AMC6821_REG_TDATA_HI,
152 AMC6821_REG_TACH_LLIMITH,
153 AMC6821_REG_TACH_HLIMITH, };
154
155static int amc6821_probe(
156 struct i2c_client *client,
157 const struct i2c_device_id *id);
158static int amc6821_detect(
159 struct i2c_client *client,
160 struct i2c_board_info *info);
161static int amc6821_init_client(struct i2c_client *client);
162static int amc6821_remove(struct i2c_client *client);
163static struct amc6821_data *amc6821_update_device(struct device *dev);
164
165/*
166 * Driver data (common to all clients)
167 */
168
169static const struct i2c_device_id amc6821_id[] = {
170 { "amc6821", amc6821 },
171 { }
172};
173
174MODULE_DEVICE_TABLE(i2c, amc6821_id);
175
176static struct i2c_driver amc6821_driver = {
177 .class = I2C_CLASS_HWMON,
178 .driver = {
179 .name = "amc6821",
180 },
181 .probe = amc6821_probe,
182 .remove = amc6821_remove,
183 .id_table = amc6821_id,
184 .detect = amc6821_detect,
185 .address_list = normal_i2c,
186};
187
188
189/*
190 * Client data (each client gets its own)
191 */
192
193struct amc6821_data {
194 struct device *hwmon_dev;
195 struct mutex update_lock;
196 char valid; /* zero until following fields are valid */
197 unsigned long last_updated; /* in jiffies */
198
199 /* register values */
200 int temp[TEMP_IDX_LEN];
201
202 u16 fan[FAN1_IDX_LEN];
203 u8 fan1_div;
204
205 u8 pwm1;
206 u8 temp1_auto_point_temp[3];
207 u8 temp2_auto_point_temp[3];
208 u8 pwm1_auto_point_pwm[3];
209 u8 pwm1_enable;
210 u8 pwm1_auto_channels_temp;
211
212 u8 stat1;
213 u8 stat2;
214};
215
216
217static ssize_t get_temp(
218 struct device *dev,
219 struct device_attribute *devattr,
220 char *buf)
221{
222 struct amc6821_data *data = amc6821_update_device(dev);
223 int ix = to_sensor_dev_attr(devattr)->index;
224
225 return sprintf(buf, "%d\n", data->temp[ix] * 1000);
226}
227
228
229
230static ssize_t set_temp(
231 struct device *dev,
232 struct device_attribute *attr,
233 const char *buf,
234 size_t count)
235{
236 struct i2c_client *client = to_i2c_client(dev);
237 struct amc6821_data *data = i2c_get_clientdata(client);
238 int ix = to_sensor_dev_attr(attr)->index;
239 long val;
240
241 int ret = strict_strtol(buf, 10, &val);
242 if (ret)
243 return ret;
244 val = SENSORS_LIMIT(val / 1000, -128, 127);
245
246 mutex_lock(&data->update_lock);
247 data->temp[ix] = val;
248 if (i2c_smbus_write_byte_data(client, temp_reg[ix], data->temp[ix])) {
249 dev_err(&client->dev, "Register write error, aborting.\n");
250 count = -EIO;
251 }
252 mutex_unlock(&data->update_lock);
253 return count;
254}
255
256
257
258
259static ssize_t get_temp_alarm(
260 struct device *dev,
261 struct device_attribute *devattr,
262 char *buf)
263{
264 struct amc6821_data *data = amc6821_update_device(dev);
265 int ix = to_sensor_dev_attr(devattr)->index;
266 u8 flag;
267
268 switch (ix) {
269 case IDX_TEMP1_MIN:
270 flag = data->stat1 & AMC6821_STAT1_LTL;
271 break;
272 case IDX_TEMP1_MAX:
273 flag = data->stat1 & AMC6821_STAT1_LTH;
274 break;
275 case IDX_TEMP1_CRIT:
276 flag = data->stat2 & AMC6821_STAT2_LTC;
277 break;
278 case IDX_TEMP2_MIN:
279 flag = data->stat1 & AMC6821_STAT1_RTL;
280 break;
281 case IDX_TEMP2_MAX:
282 flag = data->stat1 & AMC6821_STAT1_RTH;
283 break;
284 case IDX_TEMP2_CRIT:
285 flag = data->stat2 & AMC6821_STAT2_RTC;
286 break;
287 default:
288 dev_dbg(dev, "Unknown attr->index (%d).\n", ix);
289 return -EINVAL;
290 }
291 if (flag)
292 return sprintf(buf, "1");
293 else
294 return sprintf(buf, "0");
295}
296
297
298
299
300static ssize_t get_temp2_fault(
301 struct device *dev,
302 struct device_attribute *devattr,
303 char *buf)
304{
305 struct amc6821_data *data = amc6821_update_device(dev);
306 if (data->stat1 & AMC6821_STAT1_RTF)
307 return sprintf(buf, "1");
308 else
309 return sprintf(buf, "0");
310}
311
312static ssize_t get_pwm1(
313 struct device *dev,
314 struct device_attribute *devattr,
315 char *buf)
316{
317 struct amc6821_data *data = amc6821_update_device(dev);
318 return sprintf(buf, "%d\n", data->pwm1);
319}
320
321static ssize_t set_pwm1(
322 struct device *dev,
323 struct device_attribute *devattr,
324 const char *buf,
325 size_t count)
326{
327 struct i2c_client *client = to_i2c_client(dev);
328 struct amc6821_data *data = i2c_get_clientdata(client);
329 long val;
330 int ret = strict_strtol(buf, 10, &val);
331 if (ret)
332 return ret;
333
334 mutex_lock(&data->update_lock);
335 data->pwm1 = SENSORS_LIMIT(val , 0, 255);
336 i2c_smbus_write_byte_data(client, AMC6821_REG_DCY, data->pwm1);
337 mutex_unlock(&data->update_lock);
338 return count;
339}
340
341static ssize_t get_pwm1_enable(
342 struct device *dev,
343 struct device_attribute *devattr,
344 char *buf)
345{
346 struct amc6821_data *data = amc6821_update_device(dev);
347 return sprintf(buf, "%d\n", data->pwm1_enable);
348}
349
350static ssize_t set_pwm1_enable(
351 struct device *dev,
352 struct device_attribute *attr,
353 const char *buf,
354 size_t count)
355{
356 struct i2c_client *client = to_i2c_client(dev);
357 struct amc6821_data *data = i2c_get_clientdata(client);
358 long val;
359 int config = strict_strtol(buf, 10, &val);
360 if (config)
361 return config;
362
363 config = i2c_smbus_read_byte_data(client, AMC6821_REG_CONF1);
364 if (config < 0) {
365 dev_err(&client->dev,
366 "Error reading configuration register, aborting.\n");
367 return -EIO;
368 }
369
370 switch (val) {
371 case 1:
372 config &= ~AMC6821_CONF1_FDRC0;
373 config &= ~AMC6821_CONF1_FDRC1;
374 break;
375 case 2:
376 config &= ~AMC6821_CONF1_FDRC0;
377 config |= AMC6821_CONF1_FDRC1;
378 break;
379 case 3:
380 config |= AMC6821_CONF1_FDRC0;
381 config |= AMC6821_CONF1_FDRC1;
382 break;
383 default:
384 return -EINVAL;
385 }
386 mutex_lock(&data->update_lock);
387 if (i2c_smbus_write_byte_data(client, AMC6821_REG_CONF1, config)) {
388 dev_err(&client->dev,
389 "Configuration register write error, aborting.\n");
390 count = -EIO;
391 }
392 mutex_unlock(&data->update_lock);
393 return count;
394}
395
396
397static ssize_t get_pwm1_auto_channels_temp(
398 struct device *dev,
399 struct device_attribute *devattr,
400 char *buf)
401{
402 struct amc6821_data *data = amc6821_update_device(dev);
403 return sprintf(buf, "%d\n", data->pwm1_auto_channels_temp);
404}
405
406
407static ssize_t get_temp_auto_point_temp(
408 struct device *dev,
409 struct device_attribute *devattr,
410 char *buf)
411{
412 int ix = to_sensor_dev_attr_2(devattr)->index;
413 int nr = to_sensor_dev_attr_2(devattr)->nr;
414 struct amc6821_data *data = amc6821_update_device(dev);
415 switch (nr) {
416 case 1:
417 return sprintf(buf, "%d\n",
418 data->temp1_auto_point_temp[ix] * 1000);
419 break;
420 case 2:
421 return sprintf(buf, "%d\n",
422 data->temp2_auto_point_temp[ix] * 1000);
423 break;
424 default:
425 dev_dbg(dev, "Unknown attr->nr (%d).\n", nr);
426 return -EINVAL;
427 }
428}
429
430
431static ssize_t get_pwm1_auto_point_pwm(
432 struct device *dev,
433 struct device_attribute *devattr,
434 char *buf)
435{
436 int ix = to_sensor_dev_attr(devattr)->index;
437 struct amc6821_data *data = amc6821_update_device(dev);
438 return sprintf(buf, "%d\n", data->pwm1_auto_point_pwm[ix]);
439}
440
441
442static inline ssize_t set_slope_register(struct i2c_client *client,
443 u8 reg,
444 u8 dpwm,
445 u8 *ptemp)
446{
447 int dt;
448 u8 tmp;
449
450 dt = ptemp[2]-ptemp[1];
451 for (tmp = 4; tmp > 0; tmp--) {
452 if (dt * (0x20 >> tmp) >= dpwm)
453 break;
454 }
455 tmp |= (ptemp[1] & 0x7C) << 1;
456 if (i2c_smbus_write_byte_data(client,
457 reg, tmp)) {
458 dev_err(&client->dev, "Register write error, aborting.\n");
459 return -EIO;
460 }
461 return 0;
462}
463
464
465
466static ssize_t set_temp_auto_point_temp(
467 struct device *dev,
468 struct device_attribute *attr,
469 const char *buf,
470 size_t count)
471{
472 struct i2c_client *client = to_i2c_client(dev);
473 struct amc6821_data *data = amc6821_update_device(dev);
474 int ix = to_sensor_dev_attr_2(attr)->index;
475 int nr = to_sensor_dev_attr_2(attr)->nr;
476 u8 *ptemp;
477 u8 reg;
478 int dpwm;
479 long val;
480 int ret = strict_strtol(buf, 10, &val);
481 if (ret)
482 return ret;
483
484 switch (nr) {
485 case 1:
486 ptemp = data->temp1_auto_point_temp;
487 reg = AMC6821_REG_LTEMP_FAN_CTRL;
488 break;
489 case 2:
490 ptemp = data->temp2_auto_point_temp;
491 reg = AMC6821_REG_RTEMP_FAN_CTRL;
492 break;
493 default:
494 dev_dbg(dev, "Unknown attr->nr (%d).\n", nr);
495 return -EINVAL;
496 }
497
498 data->valid = 0;
499 mutex_lock(&data->update_lock);
500 switch (ix) {
501 case 0:
502 ptemp[0] = SENSORS_LIMIT(val / 1000, 0,
503 data->temp1_auto_point_temp[1]);
504 ptemp[0] = SENSORS_LIMIT(ptemp[0], 0,
505 data->temp2_auto_point_temp[1]);
506 ptemp[0] = SENSORS_LIMIT(ptemp[0], 0, 63);
507 if (i2c_smbus_write_byte_data(
508 client,
509 AMC6821_REG_PSV_TEMP,
510 ptemp[0])) {
511 dev_err(&client->dev,
512 "Register write error, aborting.\n");
513 count = -EIO;
514 }
515 goto EXIT;
516 break;
517 case 1:
518 ptemp[1] = SENSORS_LIMIT(
519 val / 1000,
520 (ptemp[0] & 0x7C) + 4,
521 124);
522 ptemp[1] &= 0x7C;
523 ptemp[2] = SENSORS_LIMIT(
524 ptemp[2], ptemp[1] + 1,
525 255);
526 break;
527 case 2:
528 ptemp[2] = SENSORS_LIMIT(
529 val / 1000,
530 ptemp[1]+1,
531 255);
532 break;
533 default:
534 dev_dbg(dev, "Unknown attr->index (%d).\n", ix);
535 count = -EINVAL;
536 goto EXIT;
537 }
538 dpwm = data->pwm1_auto_point_pwm[2] - data->pwm1_auto_point_pwm[1];
539 if (set_slope_register(client, reg, dpwm, ptemp))
540 count = -EIO;
541
542EXIT:
543 mutex_unlock(&data->update_lock);
544 return count;
545}
546
547
548
549static ssize_t set_pwm1_auto_point_pwm(
550 struct device *dev,
551 struct device_attribute *attr,
552 const char *buf,
553 size_t count)
554{
555 struct i2c_client *client = to_i2c_client(dev);
556 struct amc6821_data *data = i2c_get_clientdata(client);
557 int dpwm;
558 long val;
559 int ret = strict_strtol(buf, 10, &val);
560 if (ret)
561 return ret;
562
563 mutex_lock(&data->update_lock);
564 data->pwm1_auto_point_pwm[1] = SENSORS_LIMIT(val, 0, 254);
565 if (i2c_smbus_write_byte_data(client, AMC6821_REG_DCY_LOW_TEMP,
566 data->pwm1_auto_point_pwm[1])) {
567 dev_err(&client->dev, "Register write error, aborting.\n");
568 count = -EIO;
569 goto EXIT;
570 }
571 dpwm = data->pwm1_auto_point_pwm[2] - data->pwm1_auto_point_pwm[1];
572 if (set_slope_register(client, AMC6821_REG_LTEMP_FAN_CTRL, dpwm,
573 data->temp1_auto_point_temp)) {
574 count = -EIO;
575 goto EXIT;
576 }
577 if (set_slope_register(client, AMC6821_REG_RTEMP_FAN_CTRL, dpwm,
578 data->temp2_auto_point_temp)) {
579 count = -EIO;
580 goto EXIT;
581 }
582
583EXIT:
584 data->valid = 0;
585 mutex_unlock(&data->update_lock);
586 return count;
587}
588
589static ssize_t get_fan(
590 struct device *dev,
591 struct device_attribute *devattr,
592 char *buf)
593{
594 struct amc6821_data *data = amc6821_update_device(dev);
595 int ix = to_sensor_dev_attr(devattr)->index;
596 if (0 == data->fan[ix])
597 return sprintf(buf, "0");
598 return sprintf(buf, "%d\n", (int)(6000000 / data->fan[ix]));
599}
600
601
602
603static ssize_t get_fan1_fault(
604 struct device *dev,
605 struct device_attribute *devattr,
606 char *buf)
607{
608 struct amc6821_data *data = amc6821_update_device(dev);
609 if (data->stat1 & AMC6821_STAT1_FANS)
610 return sprintf(buf, "1");
611 else
612 return sprintf(buf, "0");
613}
614
615
616
617static ssize_t set_fan(
618 struct device *dev,
619 struct device_attribute *attr,
620 const char *buf, size_t count)
621{
622 struct i2c_client *client = to_i2c_client(dev);
623 struct amc6821_data *data = i2c_get_clientdata(client);
624 long val;
625 int ix = to_sensor_dev_attr(attr)->index;
626 int ret = strict_strtol(buf, 10, &val);
627 if (ret)
628 return ret;
629 val = 1 > val ? 0xFFFF : 6000000/val;
630
631 mutex_lock(&data->update_lock);
632 data->fan[ix] = (u16) SENSORS_LIMIT(val, 1, 0xFFFF);
633 if (i2c_smbus_write_byte_data(client, fan_reg_low[ix],
634 data->fan[ix] & 0xFF)) {
635 dev_err(&client->dev, "Register write error, aborting.\n");
636 count = -EIO;
637 goto EXIT;
638 }
639 if (i2c_smbus_write_byte_data(client,
640 fan_reg_hi[ix], data->fan[ix] >> 8)) {
641 dev_err(&client->dev, "Register write error, aborting.\n");
642 count = -EIO;
643 }
644EXIT:
645 mutex_unlock(&data->update_lock);
646 return count;
647}
648
649
650
651static ssize_t get_fan1_div(
652 struct device *dev,
653 struct device_attribute *devattr,
654 char *buf)
655{
656 struct amc6821_data *data = amc6821_update_device(dev);
657 return sprintf(buf, "%d\n", data->fan1_div);
658}
659
660static ssize_t set_fan1_div(
661 struct device *dev,
662 struct device_attribute *attr,
663 const char *buf, size_t count)
664{
665 struct i2c_client *client = to_i2c_client(dev);
666 struct amc6821_data *data = i2c_get_clientdata(client);
667 long val;
668 int config = strict_strtol(buf, 10, &val);
669 if (config)
670 return config;
671
672 config = i2c_smbus_read_byte_data(client, AMC6821_REG_CONF4);
673 if (config < 0) {
674 dev_err(&client->dev,
675 "Error reading configuration register, aborting.\n");
676 return -EIO;
677 }
678 mutex_lock(&data->update_lock);
679 switch (val) {
680 case 2:
681 config &= ~AMC6821_CONF4_PSPR;
682 data->fan1_div = 2;
683 break;
684 case 4:
685 config |= AMC6821_CONF4_PSPR;
686 data->fan1_div = 4;
687 break;
688 default:
689 count = -EINVAL;
690 goto EXIT;
691 }
692 if (i2c_smbus_write_byte_data(client, AMC6821_REG_CONF4, config)) {
693 dev_err(&client->dev,
694 "Configuration register write error, aborting.\n");
695 count = -EIO;
696 }
697EXIT:
698 mutex_unlock(&data->update_lock);
699 return count;
700}
701
702
703
704static SENSOR_DEVICE_ATTR(temp1_input, S_IRUGO,
705 get_temp, NULL, IDX_TEMP1_INPUT);
706static SENSOR_DEVICE_ATTR(temp1_min, S_IRUGO | S_IWUSR, get_temp,
707 set_temp, IDX_TEMP1_MIN);
708static SENSOR_DEVICE_ATTR(temp1_max, S_IRUGO | S_IWUSR, get_temp,
709 set_temp, IDX_TEMP1_MAX);
710static SENSOR_DEVICE_ATTR(temp1_crit, S_IRUGO | S_IWUSR, get_temp,
711 set_temp, IDX_TEMP1_CRIT);
712static SENSOR_DEVICE_ATTR(temp1_min_alarm, S_IRUGO,
713 get_temp_alarm, NULL, IDX_TEMP1_MIN);
714static SENSOR_DEVICE_ATTR(temp1_max_alarm, S_IRUGO,
715 get_temp_alarm, NULL, IDX_TEMP1_MAX);
716static SENSOR_DEVICE_ATTR(temp1_crit_alarm, S_IRUGO,
717 get_temp_alarm, NULL, IDX_TEMP1_CRIT);
718static SENSOR_DEVICE_ATTR(temp2_input, S_IRUGO | S_IWUSR,
719 get_temp, NULL, IDX_TEMP2_INPUT);
720static SENSOR_DEVICE_ATTR(temp2_min, S_IRUGO | S_IWUSR, get_temp,
721 set_temp, IDX_TEMP2_MIN);
722static SENSOR_DEVICE_ATTR(temp2_max, S_IRUGO | S_IWUSR, get_temp,
723 set_temp, IDX_TEMP2_MAX);
724static SENSOR_DEVICE_ATTR(temp2_crit, S_IRUGO | S_IWUSR, get_temp,
725 set_temp, IDX_TEMP2_CRIT);
726static SENSOR_DEVICE_ATTR(temp2_fault, S_IRUGO,
727 get_temp2_fault, NULL, 0);
728static SENSOR_DEVICE_ATTR(temp2_min_alarm, S_IRUGO,
729 get_temp_alarm, NULL, IDX_TEMP2_MIN);
730static SENSOR_DEVICE_ATTR(temp2_max_alarm, S_IRUGO,
731 get_temp_alarm, NULL, IDX_TEMP2_MAX);
732static SENSOR_DEVICE_ATTR(temp2_crit_alarm, S_IRUGO,
733 get_temp_alarm, NULL, IDX_TEMP2_CRIT);
734static SENSOR_DEVICE_ATTR(fan1_input, S_IRUGO, get_fan, NULL, IDX_FAN1_INPUT);
735static SENSOR_DEVICE_ATTR(fan1_min, S_IRUGO | S_IWUSR,
736 get_fan, set_fan, IDX_FAN1_MIN);
737static SENSOR_DEVICE_ATTR(fan1_max, S_IRUGO | S_IWUSR,
738 get_fan, set_fan, IDX_FAN1_MAX);
739static SENSOR_DEVICE_ATTR(fan1_fault, S_IRUGO, get_fan1_fault, NULL, 0);
740static SENSOR_DEVICE_ATTR(fan1_div, S_IRUGO | S_IWUSR,
741 get_fan1_div, set_fan1_div, 0);
742
743static SENSOR_DEVICE_ATTR(pwm1, S_IWUSR | S_IRUGO, get_pwm1, set_pwm1, 0);
744static SENSOR_DEVICE_ATTR(pwm1_enable, S_IWUSR | S_IRUGO,
745 get_pwm1_enable, set_pwm1_enable, 0);
746static SENSOR_DEVICE_ATTR(pwm1_auto_point1_pwm, S_IRUGO,
747 get_pwm1_auto_point_pwm, NULL, 0);
748static SENSOR_DEVICE_ATTR(pwm1_auto_point2_pwm, S_IWUSR | S_IRUGO,
749 get_pwm1_auto_point_pwm, set_pwm1_auto_point_pwm, 1);
750static SENSOR_DEVICE_ATTR(pwm1_auto_point3_pwm, S_IRUGO,
751 get_pwm1_auto_point_pwm, NULL, 2);
752static SENSOR_DEVICE_ATTR(pwm1_auto_channels_temp, S_IRUGO,
753 get_pwm1_auto_channels_temp, NULL, 0);
754static SENSOR_DEVICE_ATTR_2(temp1_auto_point1_temp, S_IRUGO,
755 get_temp_auto_point_temp, NULL, 1, 0);
756static SENSOR_DEVICE_ATTR_2(temp1_auto_point2_temp, S_IWUSR | S_IRUGO,
757 get_temp_auto_point_temp, set_temp_auto_point_temp, 1, 1);
758static SENSOR_DEVICE_ATTR_2(temp1_auto_point3_temp, S_IWUSR | S_IRUGO,
759 get_temp_auto_point_temp, set_temp_auto_point_temp, 1, 2);
760
761static SENSOR_DEVICE_ATTR_2(temp2_auto_point1_temp, S_IWUSR | S_IRUGO,
762 get_temp_auto_point_temp, set_temp_auto_point_temp, 2, 0);
763static SENSOR_DEVICE_ATTR_2(temp2_auto_point2_temp, S_IWUSR | S_IRUGO,
764 get_temp_auto_point_temp, set_temp_auto_point_temp, 2, 1);
765static SENSOR_DEVICE_ATTR_2(temp2_auto_point3_temp, S_IWUSR | S_IRUGO,
766 get_temp_auto_point_temp, set_temp_auto_point_temp, 2, 2);
767
768
769
770static struct attribute *amc6821_attrs[] = {
771 &sensor_dev_attr_temp1_input.dev_attr.attr,
772 &sensor_dev_attr_temp1_min.dev_attr.attr,
773 &sensor_dev_attr_temp1_max.dev_attr.attr,
774 &sensor_dev_attr_temp1_crit.dev_attr.attr,
775 &sensor_dev_attr_temp1_min_alarm.dev_attr.attr,
776 &sensor_dev_attr_temp1_max_alarm.dev_attr.attr,
777 &sensor_dev_attr_temp1_crit_alarm.dev_attr.attr,
778 &sensor_dev_attr_temp2_input.dev_attr.attr,
779 &sensor_dev_attr_temp2_min.dev_attr.attr,
780 &sensor_dev_attr_temp2_max.dev_attr.attr,
781 &sensor_dev_attr_temp2_crit.dev_attr.attr,
782 &sensor_dev_attr_temp2_min_alarm.dev_attr.attr,
783 &sensor_dev_attr_temp2_max_alarm.dev_attr.attr,
784 &sensor_dev_attr_temp2_crit_alarm.dev_attr.attr,
785 &sensor_dev_attr_temp2_fault.dev_attr.attr,
786 &sensor_dev_attr_fan1_input.dev_attr.attr,
787 &sensor_dev_attr_fan1_min.dev_attr.attr,
788 &sensor_dev_attr_fan1_max.dev_attr.attr,
789 &sensor_dev_attr_fan1_fault.dev_attr.attr,
790 &sensor_dev_attr_fan1_div.dev_attr.attr,
791 &sensor_dev_attr_pwm1.dev_attr.attr,
792 &sensor_dev_attr_pwm1_enable.dev_attr.attr,
793 &sensor_dev_attr_pwm1_auto_channels_temp.dev_attr.attr,
794 &sensor_dev_attr_pwm1_auto_point1_pwm.dev_attr.attr,
795 &sensor_dev_attr_pwm1_auto_point2_pwm.dev_attr.attr,
796 &sensor_dev_attr_pwm1_auto_point3_pwm.dev_attr.attr,
797 &sensor_dev_attr_temp1_auto_point1_temp.dev_attr.attr,
798 &sensor_dev_attr_temp1_auto_point2_temp.dev_attr.attr,
799 &sensor_dev_attr_temp1_auto_point3_temp.dev_attr.attr,
800 &sensor_dev_attr_temp2_auto_point1_temp.dev_attr.attr,
801 &sensor_dev_attr_temp2_auto_point2_temp.dev_attr.attr,
802 &sensor_dev_attr_temp2_auto_point3_temp.dev_attr.attr,
803 NULL
804};
805
806static struct attribute_group amc6821_attr_grp = {
807 .attrs = amc6821_attrs,
808};
809
810
811
812/* Return 0 if detection is successful, -ENODEV otherwise */
813static int amc6821_detect(
814 struct i2c_client *client,
815 struct i2c_board_info *info)
816{
817 struct i2c_adapter *adapter = client->adapter;
818 int address = client->addr;
819 int dev_id, comp_id;
820
821 dev_dbg(&adapter->dev, "amc6821_detect called.\n");
822
823 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) {
824 dev_dbg(&adapter->dev,
825 "amc6821: I2C bus doesn't support byte mode, "
826 "skipping.\n");
827 return -ENODEV;
828 }
829
830 dev_id = i2c_smbus_read_byte_data(client, AMC6821_REG_DEV_ID);
831 comp_id = i2c_smbus_read_byte_data(client, AMC6821_REG_COMP_ID);
832 if (dev_id != 0x21 || comp_id != 0x49) {
833 dev_dbg(&adapter->dev,
834 "amc6821: detection failed at 0x%02x.\n",
835 address);
836 return -ENODEV;
837 }
838
839 /* Bit 7 of the address register is ignored, so we can check the
840 ID registers again */
841 dev_id = i2c_smbus_read_byte_data(client, 0x80 | AMC6821_REG_DEV_ID);
842 comp_id = i2c_smbus_read_byte_data(client, 0x80 | AMC6821_REG_COMP_ID);
843 if (dev_id != 0x21 || comp_id != 0x49) {
844 dev_dbg(&adapter->dev,
845 "amc6821: detection failed at 0x%02x.\n",
846 address);
847 return -ENODEV;
848 }
849
850 dev_info(&adapter->dev, "amc6821: chip found at 0x%02x.\n", address);
851 strlcpy(info->type, "amc6821", I2C_NAME_SIZE);
852
853 return 0;
854}
855
856static int amc6821_probe(
857 struct i2c_client *client,
858 const struct i2c_device_id *id)
859{
860 struct amc6821_data *data;
861 int err;
862
863 data = kzalloc(sizeof(struct amc6821_data), GFP_KERNEL);
864 if (!data) {
865 dev_err(&client->dev, "out of memory.\n");
866 return -ENOMEM;
867 }
868
869
870 i2c_set_clientdata(client, data);
871 mutex_init(&data->update_lock);
872
873 /*
874 * Initialize the amc6821 chip
875 */
876 err = amc6821_init_client(client);
877 if (err)
878 goto err_free;
879
880 err = sysfs_create_group(&client->dev.kobj, &amc6821_attr_grp);
881 if (err)
882 goto err_free;
883
884 data->hwmon_dev = hwmon_device_register(&client->dev);
885 if (!IS_ERR(data->hwmon_dev))
886 return 0;
887
888 err = PTR_ERR(data->hwmon_dev);
889 dev_err(&client->dev, "error registering hwmon device.\n");
890 sysfs_remove_group(&client->dev.kobj, &amc6821_attr_grp);
891err_free:
892 kfree(data);
893 return err;
894}
895
896static int amc6821_remove(struct i2c_client *client)
897{
898 struct amc6821_data *data = i2c_get_clientdata(client);
899
900 hwmon_device_unregister(data->hwmon_dev);
901 sysfs_remove_group(&client->dev.kobj, &amc6821_attr_grp);
902
903 kfree(data);
904
905 return 0;
906}
907
908
909static int amc6821_init_client(struct i2c_client *client)
910{
911 int config;
912 int err = -EIO;
913
914 if (init) {
915 config = i2c_smbus_read_byte_data(client, AMC6821_REG_CONF4);
916
917 if (config < 0) {
918 dev_err(&client->dev,
919 "Error reading configuration register, aborting.\n");
920 return err;
921 }
922
923 config |= AMC6821_CONF4_MODE;
924
925 if (i2c_smbus_write_byte_data(client, AMC6821_REG_CONF4,
926 config)) {
927 dev_err(&client->dev,
928 "Configuration register write error, aborting.\n");
929 return err;
930 }
931
932 config = i2c_smbus_read_byte_data(client, AMC6821_REG_CONF3);
933
934 if (config < 0) {
935 dev_err(&client->dev,
936 "Error reading configuration register, aborting.\n");
937 return err;
938 }
939
940 dev_info(&client->dev, "Revision %d\n", config & 0x0f);
941
942 config &= ~AMC6821_CONF3_THERM_FAN_EN;
943
944 if (i2c_smbus_write_byte_data(client, AMC6821_REG_CONF3,
945 config)) {
946 dev_err(&client->dev,
947 "Configuration register write error, aborting.\n");
948 return err;
949 }
950
951 config = i2c_smbus_read_byte_data(client, AMC6821_REG_CONF2);
952
953 if (config < 0) {
954 dev_err(&client->dev,
955 "Error reading configuration register, aborting.\n");
956 return err;
957 }
958
959 config &= ~AMC6821_CONF2_RTFIE;
960 config &= ~AMC6821_CONF2_LTOIE;
961 config &= ~AMC6821_CONF2_RTOIE;
962 if (i2c_smbus_write_byte_data(client,
963 AMC6821_REG_CONF2, config)) {
964 dev_err(&client->dev,
965 "Configuration register write error, aborting.\n");
966 return err;
967 }
968
969 config = i2c_smbus_read_byte_data(client, AMC6821_REG_CONF1);
970
971 if (config < 0) {
972 dev_err(&client->dev,
973 "Error reading configuration register, aborting.\n");
974 return err;
975 }
976
977 config &= ~AMC6821_CONF1_THERMOVIE;
978 config &= ~AMC6821_CONF1_FANIE;
979 config |= AMC6821_CONF1_START;
980 if (pwminv)
981 config |= AMC6821_CONF1_PWMINV;
982 else
983 config &= ~AMC6821_CONF1_PWMINV;
984
985 if (i2c_smbus_write_byte_data(
986 client, AMC6821_REG_CONF1, config)) {
987 dev_err(&client->dev,
988 "Configuration register write error, aborting.\n");
989 return err;
990 }
991 }
992 return 0;
993}
994
995
996static struct amc6821_data *amc6821_update_device(struct device *dev)
997{
998 struct i2c_client *client = to_i2c_client(dev);
999 struct amc6821_data *data = i2c_get_clientdata(client);
1000 int timeout = HZ;
1001 u8 reg;
1002 int i;
1003
1004 mutex_lock(&data->update_lock);
1005
1006 if (time_after(jiffies, data->last_updated + timeout) ||
1007 !data->valid) {
1008
1009 for (i = 0; i < TEMP_IDX_LEN; i++)
1010 data->temp[i] = i2c_smbus_read_byte_data(client,
1011 temp_reg[i]);
1012
1013 data->stat1 = i2c_smbus_read_byte_data(client,
1014 AMC6821_REG_STAT1);
1015 data->stat2 = i2c_smbus_read_byte_data(client,
1016 AMC6821_REG_STAT2);
1017
1018 data->pwm1 = i2c_smbus_read_byte_data(client,
1019 AMC6821_REG_DCY);
1020 for (i = 0; i < FAN1_IDX_LEN; i++) {
1021 data->fan[i] = i2c_smbus_read_byte_data(
1022 client,
1023 fan_reg_low[i]);
1024 data->fan[i] += i2c_smbus_read_byte_data(
1025 client,
1026 fan_reg_hi[i]) << 8;
1027 }
1028 data->fan1_div = i2c_smbus_read_byte_data(client,
1029 AMC6821_REG_CONF4);
1030 data->fan1_div = data->fan1_div & AMC6821_CONF4_PSPR ? 4 : 2;
1031
1032 data->pwm1_auto_point_pwm[0] = 0;
1033 data->pwm1_auto_point_pwm[2] = 255;
1034 data->pwm1_auto_point_pwm[1] = i2c_smbus_read_byte_data(client,
1035 AMC6821_REG_DCY_LOW_TEMP);
1036
1037 data->temp1_auto_point_temp[0] =
1038 i2c_smbus_read_byte_data(client,
1039 AMC6821_REG_PSV_TEMP);
1040 data->temp2_auto_point_temp[0] =
1041 data->temp1_auto_point_temp[0];
1042 reg = i2c_smbus_read_byte_data(client,
1043 AMC6821_REG_LTEMP_FAN_CTRL);
1044 data->temp1_auto_point_temp[1] = (reg & 0xF8) >> 1;
1045 reg &= 0x07;
1046 reg = 0x20 >> reg;
1047 if (reg > 0)
1048 data->temp1_auto_point_temp[2] =
1049 data->temp1_auto_point_temp[1] +
1050 (data->pwm1_auto_point_pwm[2] -
1051 data->pwm1_auto_point_pwm[1]) / reg;
1052 else
1053 data->temp1_auto_point_temp[2] = 255;
1054
1055 reg = i2c_smbus_read_byte_data(client,
1056 AMC6821_REG_RTEMP_FAN_CTRL);
1057 data->temp2_auto_point_temp[1] = (reg & 0xF8) >> 1;
1058 reg &= 0x07;
1059 reg = 0x20 >> reg;
1060 if (reg > 0)
1061 data->temp2_auto_point_temp[2] =
1062 data->temp2_auto_point_temp[1] +
1063 (data->pwm1_auto_point_pwm[2] -
1064 data->pwm1_auto_point_pwm[1]) / reg;
1065 else
1066 data->temp2_auto_point_temp[2] = 255;
1067
1068 reg = i2c_smbus_read_byte_data(client, AMC6821_REG_CONF1);
1069 reg = (reg >> 5) & 0x3;
1070 switch (reg) {
1071 case 0: /*open loop: software sets pwm1*/
1072 data->pwm1_auto_channels_temp = 0;
1073 data->pwm1_enable = 1;
1074 break;
1075 case 2: /*closed loop: remote T (temp2)*/
1076 data->pwm1_auto_channels_temp = 2;
1077 data->pwm1_enable = 2;
1078 break;
1079 case 3: /*closed loop: local and remote T (temp2)*/
1080 data->pwm1_auto_channels_temp = 3;
1081 data->pwm1_enable = 3;
1082 break;
1083 case 1: /*semi-open loop: software sets rpm, chip controls pwm1,
1084 *currently not implemented
1085 */
1086 data->pwm1_auto_channels_temp = 0;
1087 data->pwm1_enable = 0;
1088 break;
1089 }
1090
1091 data->last_updated = jiffies;
1092 data->valid = 1;
1093 }
1094 mutex_unlock(&data->update_lock);
1095 return data;
1096}
1097
1098
1099static int __init amc6821_init(void)
1100{
1101 return i2c_add_driver(&amc6821_driver);
1102}
1103
1104static void __exit amc6821_exit(void)
1105{
1106 i2c_del_driver(&amc6821_driver);
1107}
1108
1109module_init(amc6821_init);
1110module_exit(amc6821_exit);
1111
1112
1113MODULE_LICENSE("GPL");
1114MODULE_AUTHOR("T. Mertelj <tomaz.mertelj@guest.arnes.si>");
1115MODULE_DESCRIPTION("Texas Instruments amc6821 hwmon driver");
diff --git a/drivers/hwmon/asus_atk0110.c b/drivers/hwmon/asus_atk0110.c
index 5a3ee00c0e7d..028284f544e3 100644
--- a/drivers/hwmon/asus_atk0110.c
+++ b/drivers/hwmon/asus_atk0110.c
@@ -5,6 +5,7 @@
5 * See COPYING in the top level directory of the kernel tree. 5 * See COPYING in the top level directory of the kernel tree.
6 */ 6 */
7 7
8#include <linux/debugfs.h>
8#include <linux/kernel.h> 9#include <linux/kernel.h>
9#include <linux/hwmon.h> 10#include <linux/hwmon.h>
10#include <linux/list.h> 11#include <linux/list.h>
@@ -101,6 +102,11 @@ struct atk_data {
101 int temperature_count; 102 int temperature_count;
102 int fan_count; 103 int fan_count;
103 struct list_head sensor_list; 104 struct list_head sensor_list;
105
106 struct {
107 struct dentry *root;
108 u32 id;
109 } debugfs;
104}; 110};
105 111
106 112
@@ -624,6 +630,187 @@ static int atk_read_value(struct atk_sensor_data *sensor, u64 *value)
624 return err; 630 return err;
625} 631}
626 632
633#ifdef CONFIG_DEBUG_FS
634static int atk_debugfs_gitm_get(void *p, u64 *val)
635{
636 struct atk_data *data = p;
637 union acpi_object *ret;
638 struct atk_acpi_ret_buffer *buf;
639 int err = 0;
640
641 if (!data->read_handle)
642 return -ENODEV;
643
644 if (!data->debugfs.id)
645 return -EINVAL;
646
647 ret = atk_gitm(data, data->debugfs.id);
648 if (IS_ERR(ret))
649 return PTR_ERR(ret);
650
651 buf = (struct atk_acpi_ret_buffer *)ret->buffer.pointer;
652 if (buf->flags)
653 *val = buf->value;
654 else
655 err = -EIO;
656
657 return err;
658}
659
660DEFINE_SIMPLE_ATTRIBUTE(atk_debugfs_gitm,
661 atk_debugfs_gitm_get,
662 NULL,
663 "0x%08llx\n")
664
665static int atk_acpi_print(char *buf, size_t sz, union acpi_object *obj)
666{
667 int ret = 0;
668
669 switch (obj->type) {
670 case ACPI_TYPE_INTEGER:
671 ret = snprintf(buf, sz, "0x%08llx\n", obj->integer.value);
672 break;
673 case ACPI_TYPE_STRING:
674 ret = snprintf(buf, sz, "%s\n", obj->string.pointer);
675 break;
676 }
677
678 return ret;
679}
680
681static void atk_pack_print(char *buf, size_t sz, union acpi_object *pack)
682{
683 int ret;
684 int i;
685
686 for (i = 0; i < pack->package.count; i++) {
687 union acpi_object *obj = &pack->package.elements[i];
688
689 ret = atk_acpi_print(buf, sz, obj);
690 if (ret >= sz)
691 break;
692 buf += ret;
693 sz -= ret;
694 }
695}
696
697static int atk_debugfs_ggrp_open(struct inode *inode, struct file *file)
698{
699 struct atk_data *data = inode->i_private;
700 char *buf = NULL;
701 union acpi_object *ret;
702 u8 cls;
703 int i;
704
705 if (!data->enumerate_handle)
706 return -ENODEV;
707 if (!data->debugfs.id)
708 return -EINVAL;
709
710 cls = (data->debugfs.id & 0xff000000) >> 24;
711 ret = atk_ggrp(data, cls);
712 if (IS_ERR(ret))
713 return PTR_ERR(ret);
714
715 for (i = 0; i < ret->package.count; i++) {
716 union acpi_object *pack = &ret->package.elements[i];
717 union acpi_object *id;
718
719 if (pack->type != ACPI_TYPE_PACKAGE)
720 continue;
721 if (!pack->package.count)
722 continue;
723 id = &pack->package.elements[0];
724 if (id->integer.value == data->debugfs.id) {
725 /* Print the package */
726 buf = kzalloc(512, GFP_KERNEL);
727 if (!buf) {
728 ACPI_FREE(ret);
729 return -ENOMEM;
730 }
731 atk_pack_print(buf, 512, pack);
732 break;
733 }
734 }
735 ACPI_FREE(ret);
736
737 if (!buf)
738 return -EINVAL;
739
740 file->private_data = buf;
741
742 return nonseekable_open(inode, file);
743}
744
745static ssize_t atk_debugfs_ggrp_read(struct file *file, char __user *buf,
746 size_t count, loff_t *pos)
747{
748 char *str = file->private_data;
749 size_t len = strlen(str);
750
751 return simple_read_from_buffer(buf, count, pos, str, len);
752}
753
754static int atk_debugfs_ggrp_release(struct inode *inode, struct file *file)
755{
756 kfree(file->private_data);
757 return 0;
758}
759
760static const struct file_operations atk_debugfs_ggrp_fops = {
761 .read = atk_debugfs_ggrp_read,
762 .open = atk_debugfs_ggrp_open,
763 .release = atk_debugfs_ggrp_release,
764};
765
766static void atk_debugfs_init(struct atk_data *data)
767{
768 struct dentry *d;
769 struct dentry *f;
770
771 data->debugfs.id = 0;
772
773 d = debugfs_create_dir("asus_atk0110", NULL);
774 if (!d || IS_ERR(d))
775 return;
776
777 f = debugfs_create_x32("id", S_IRUSR | S_IWUSR, d, &data->debugfs.id);
778 if (!f || IS_ERR(f))
779 goto cleanup;
780
781 f = debugfs_create_file("gitm", S_IRUSR, d, data,
782 &atk_debugfs_gitm);
783 if (!f || IS_ERR(f))
784 goto cleanup;
785
786 f = debugfs_create_file("ggrp", S_IRUSR, d, data,
787 &atk_debugfs_ggrp_fops);
788 if (!f || IS_ERR(f))
789 goto cleanup;
790
791 data->debugfs.root = d;
792
793 return;
794cleanup:
795 debugfs_remove_recursive(d);
796}
797
798static void atk_debugfs_cleanup(struct atk_data *data)
799{
800 debugfs_remove_recursive(data->debugfs.root);
801}
802
803#else /* CONFIG_DEBUG_FS */
804
805static void atk_debugfs_init(struct atk_data *data)
806{
807}
808
809static void atk_debugfs_cleanup(struct atk_data *data)
810{
811}
812#endif
813
627static int atk_add_sensor(struct atk_data *data, union acpi_object *obj) 814static int atk_add_sensor(struct atk_data *data, union acpi_object *obj)
628{ 815{
629 struct device *dev = &data->acpi_dev->dev; 816 struct device *dev = &data->acpi_dev->dev;
@@ -1047,76 +1234,75 @@ remove:
1047 return err; 1234 return err;
1048} 1235}
1049 1236
1050static int atk_check_old_if(struct atk_data *data) 1237static int atk_probe_if(struct atk_data *data)
1051{ 1238{
1052 struct device *dev = &data->acpi_dev->dev; 1239 struct device *dev = &data->acpi_dev->dev;
1053 acpi_handle ret; 1240 acpi_handle ret;
1054 acpi_status status; 1241 acpi_status status;
1242 int err = 0;
1055 1243
1056 /* RTMP: read temperature */ 1244 /* RTMP: read temperature */
1057 status = acpi_get_handle(data->atk_handle, METHOD_OLD_READ_TMP, &ret); 1245 status = acpi_get_handle(data->atk_handle, METHOD_OLD_READ_TMP, &ret);
1058 if (status != AE_OK) { 1246 if (ACPI_SUCCESS(status))
1247 data->rtmp_handle = ret;
1248 else
1059 dev_dbg(dev, "method " METHOD_OLD_READ_TMP " not found: %s\n", 1249 dev_dbg(dev, "method " METHOD_OLD_READ_TMP " not found: %s\n",
1060 acpi_format_exception(status)); 1250 acpi_format_exception(status));
1061 return -ENODEV;
1062 }
1063 data->rtmp_handle = ret;
1064 1251
1065 /* RVLT: read voltage */ 1252 /* RVLT: read voltage */
1066 status = acpi_get_handle(data->atk_handle, METHOD_OLD_READ_VLT, &ret); 1253 status = acpi_get_handle(data->atk_handle, METHOD_OLD_READ_VLT, &ret);
1067 if (status != AE_OK) { 1254 if (ACPI_SUCCESS(status))
1255 data->rvlt_handle = ret;
1256 else
1068 dev_dbg(dev, "method " METHOD_OLD_READ_VLT " not found: %s\n", 1257 dev_dbg(dev, "method " METHOD_OLD_READ_VLT " not found: %s\n",
1069 acpi_format_exception(status)); 1258 acpi_format_exception(status));
1070 return -ENODEV;
1071 }
1072 data->rvlt_handle = ret;
1073 1259
1074 /* RFAN: read fan status */ 1260 /* RFAN: read fan status */
1075 status = acpi_get_handle(data->atk_handle, METHOD_OLD_READ_FAN, &ret); 1261 status = acpi_get_handle(data->atk_handle, METHOD_OLD_READ_FAN, &ret);
1076 if (status != AE_OK) { 1262 if (ACPI_SUCCESS(status))
1263 data->rfan_handle = ret;
1264 else
1077 dev_dbg(dev, "method " METHOD_OLD_READ_FAN " not found: %s\n", 1265 dev_dbg(dev, "method " METHOD_OLD_READ_FAN " not found: %s\n",
1078 acpi_format_exception(status)); 1266 acpi_format_exception(status));
1079 return -ENODEV;
1080 }
1081 data->rfan_handle = ret;
1082
1083 return 0;
1084}
1085
1086static int atk_check_new_if(struct atk_data *data)
1087{
1088 struct device *dev = &data->acpi_dev->dev;
1089 acpi_handle ret;
1090 acpi_status status;
1091 1267
1092 /* Enumeration */ 1268 /* Enumeration */
1093 status = acpi_get_handle(data->atk_handle, METHOD_ENUMERATE, &ret); 1269 status = acpi_get_handle(data->atk_handle, METHOD_ENUMERATE, &ret);
1094 if (status != AE_OK) { 1270 if (ACPI_SUCCESS(status))
1271 data->enumerate_handle = ret;
1272 else
1095 dev_dbg(dev, "method " METHOD_ENUMERATE " not found: %s\n", 1273 dev_dbg(dev, "method " METHOD_ENUMERATE " not found: %s\n",
1096 acpi_format_exception(status)); 1274 acpi_format_exception(status));
1097 return -ENODEV;
1098 }
1099 data->enumerate_handle = ret;
1100 1275
1101 /* De-multiplexer (read) */ 1276 /* De-multiplexer (read) */
1102 status = acpi_get_handle(data->atk_handle, METHOD_READ, &ret); 1277 status = acpi_get_handle(data->atk_handle, METHOD_READ, &ret);
1103 if (status != AE_OK) { 1278 if (ACPI_SUCCESS(status))
1279 data->read_handle = ret;
1280 else
1104 dev_dbg(dev, "method " METHOD_READ " not found: %s\n", 1281 dev_dbg(dev, "method " METHOD_READ " not found: %s\n",
1105 acpi_format_exception(status)); 1282 acpi_format_exception(status));
1106 return -ENODEV;
1107 }
1108 data->read_handle = ret;
1109 1283
1110 /* De-multiplexer (write) */ 1284 /* De-multiplexer (write) */
1111 status = acpi_get_handle(data->atk_handle, METHOD_WRITE, &ret); 1285 status = acpi_get_handle(data->atk_handle, METHOD_WRITE, &ret);
1112 if (status != AE_OK) { 1286 if (ACPI_SUCCESS(status))
1113 dev_dbg(dev, "method " METHOD_READ " not found: %s\n", 1287 data->write_handle = ret;
1288 else
1289 dev_dbg(dev, "method " METHOD_WRITE " not found: %s\n",
1114 acpi_format_exception(status)); 1290 acpi_format_exception(status));
1115 return -ENODEV;
1116 }
1117 data->write_handle = ret;
1118 1291
1119 return 0; 1292 /* Check for hwmon methods: first check "old" style methods; note that
1293 * both may be present: in this case we stick to the old interface;
1294 * analysis of multiple DSDTs indicates that when both interfaces
1295 * are present the new one (GGRP/GITM) is not functional.
1296 */
1297 if (data->rtmp_handle && data->rvlt_handle && data->rfan_handle)
1298 data->old_interface = true;
1299 else if (data->enumerate_handle && data->read_handle &&
1300 data->write_handle)
1301 data->old_interface = false;
1302 else
1303 err = -ENODEV;
1304
1305 return err;
1120} 1306}
1121 1307
1122static int atk_add(struct acpi_device *device) 1308static int atk_add(struct acpi_device *device)
@@ -1143,40 +1329,30 @@ static int atk_add(struct acpi_device *device)
1143 &buf, ACPI_TYPE_PACKAGE); 1329 &buf, ACPI_TYPE_PACKAGE);
1144 if (ret != AE_OK) { 1330 if (ret != AE_OK) {
1145 dev_dbg(&device->dev, "atk: method MBIF not found\n"); 1331 dev_dbg(&device->dev, "atk: method MBIF not found\n");
1146 err = -ENODEV; 1332 } else {
1147 goto out; 1333 obj = buf.pointer;
1334 if (obj->package.count >= 2) {
1335 union acpi_object *id = &obj->package.elements[1];
1336 if (id->type == ACPI_TYPE_STRING)
1337 dev_dbg(&device->dev, "board ID = %s\n",
1338 id->string.pointer);
1339 }
1340 ACPI_FREE(buf.pointer);
1148 } 1341 }
1149 1342
1150 obj = buf.pointer; 1343 err = atk_probe_if(data);
1151 if (obj->package.count >= 2 && 1344 if (err) {
1152 obj->package.elements[1].type == ACPI_TYPE_STRING) { 1345 dev_err(&device->dev, "No usable hwmon interface detected\n");
1153 dev_dbg(&device->dev, "board ID = %s\n", 1346 goto out;
1154 obj->package.elements[1].string.pointer);
1155 } 1347 }
1156 ACPI_FREE(buf.pointer);
1157 1348
1158 /* Check for hwmon methods: first check "old" style methods; note that 1349 if (data->old_interface) {
1159 * both may be present: in this case we stick to the old interface;
1160 * analysis of multiple DSDTs indicates that when both interfaces
1161 * are present the new one (GGRP/GITM) is not functional.
1162 */
1163 err = atk_check_old_if(data);
1164 if (!err) {
1165 dev_dbg(&device->dev, "Using old hwmon interface\n"); 1350 dev_dbg(&device->dev, "Using old hwmon interface\n");
1166 data->old_interface = true; 1351 err = atk_enumerate_old_hwmon(data);
1167 } else { 1352 } else {
1168 err = atk_check_new_if(data);
1169 if (err)
1170 goto out;
1171
1172 dev_dbg(&device->dev, "Using new hwmon interface\n"); 1353 dev_dbg(&device->dev, "Using new hwmon interface\n");
1173 data->old_interface = false;
1174 }
1175
1176 if (data->old_interface)
1177 err = atk_enumerate_old_hwmon(data);
1178 else
1179 err = atk_enumerate_new_hwmon(data); 1354 err = atk_enumerate_new_hwmon(data);
1355 }
1180 if (err < 0) 1356 if (err < 0)
1181 goto out; 1357 goto out;
1182 if (err == 0) { 1358 if (err == 0) {
@@ -1190,6 +1366,8 @@ static int atk_add(struct acpi_device *device)
1190 if (err) 1366 if (err)
1191 goto cleanup; 1367 goto cleanup;
1192 1368
1369 atk_debugfs_init(data);
1370
1193 device->driver_data = data; 1371 device->driver_data = data;
1194 return 0; 1372 return 0;
1195cleanup: 1373cleanup:
@@ -1208,6 +1386,8 @@ static int atk_remove(struct acpi_device *device, int type)
1208 1386
1209 device->driver_data = NULL; 1387 device->driver_data = NULL;
1210 1388
1389 atk_debugfs_cleanup(data);
1390
1211 atk_remove_files(data); 1391 atk_remove_files(data);
1212 atk_free_sensors(data); 1392 atk_free_sensors(data);
1213 hwmon_device_unregister(data->hwmon_dev); 1393 hwmon_device_unregister(data->hwmon_dev);
diff --git a/drivers/hwmon/coretemp.c b/drivers/hwmon/coretemp.c
index caef39cda8c8..2d7bceeed0bc 100644
--- a/drivers/hwmon/coretemp.c
+++ b/drivers/hwmon/coretemp.c
@@ -33,6 +33,7 @@
33#include <linux/list.h> 33#include <linux/list.h>
34#include <linux/platform_device.h> 34#include <linux/platform_device.h>
35#include <linux/cpu.h> 35#include <linux/cpu.h>
36#include <linux/pci.h>
36#include <asm/msr.h> 37#include <asm/msr.h>
37#include <asm/processor.h> 38#include <asm/processor.h>
38 39
@@ -161,6 +162,7 @@ static int __devinit adjust_tjmax(struct cpuinfo_x86 *c, u32 id, struct device *
161 int usemsr_ee = 1; 162 int usemsr_ee = 1;
162 int err; 163 int err;
163 u32 eax, edx; 164 u32 eax, edx;
165 struct pci_dev *host_bridge;
164 166
165 /* Early chips have no MSR for TjMax */ 167 /* Early chips have no MSR for TjMax */
166 168
@@ -168,11 +170,21 @@ static int __devinit adjust_tjmax(struct cpuinfo_x86 *c, u32 id, struct device *
168 usemsr_ee = 0; 170 usemsr_ee = 0;
169 } 171 }
170 172
171 /* Atoms seems to have TjMax at 90C */ 173 /* Atom CPUs */
172 174
173 if (c->x86_model == 0x1c) { 175 if (c->x86_model == 0x1c) {
174 usemsr_ee = 0; 176 usemsr_ee = 0;
175 tjmax = 90000; 177
178 host_bridge = pci_get_bus_and_slot(0, PCI_DEVFN(0, 0));
179
180 if (host_bridge && host_bridge->vendor == PCI_VENDOR_ID_INTEL
181 && (host_bridge->device == 0xa000 /* NM10 based nettop */
182 || host_bridge->device == 0xa010)) /* NM10 based netbook */
183 tjmax = 100000;
184 else
185 tjmax = 90000;
186
187 pci_dev_put(host_bridge);
176 } 188 }
177 189
178 if ((c->x86_model > 0xe) && (usemsr_ee)) { 190 if ((c->x86_model > 0xe) && (usemsr_ee)) {
diff --git a/drivers/hwmon/fschmd.c b/drivers/hwmon/fschmd.c
index bd0fc67e804b..fa0728232e71 100644
--- a/drivers/hwmon/fschmd.c
+++ b/drivers/hwmon/fschmd.c
@@ -768,6 +768,7 @@ leave:
768static int watchdog_open(struct inode *inode, struct file *filp) 768static int watchdog_open(struct inode *inode, struct file *filp)
769{ 769{
770 struct fschmd_data *pos, *data = NULL; 770 struct fschmd_data *pos, *data = NULL;
771 int watchdog_is_open;
771 772
772 /* We get called from drivers/char/misc.c with misc_mtx hold, and we 773 /* We get called from drivers/char/misc.c with misc_mtx hold, and we
773 call misc_register() from fschmd_probe() with watchdog_data_mutex 774 call misc_register() from fschmd_probe() with watchdog_data_mutex
@@ -782,10 +783,12 @@ static int watchdog_open(struct inode *inode, struct file *filp)
782 } 783 }
783 } 784 }
784 /* Note we can never not have found data, so we don't check for this */ 785 /* Note we can never not have found data, so we don't check for this */
785 kref_get(&data->kref); 786 watchdog_is_open = test_and_set_bit(0, &data->watchdog_is_open);
787 if (!watchdog_is_open)
788 kref_get(&data->kref);
786 mutex_unlock(&watchdog_data_mutex); 789 mutex_unlock(&watchdog_data_mutex);
787 790
788 if (test_and_set_bit(0, &data->watchdog_is_open)) 791 if (watchdog_is_open)
789 return -EBUSY; 792 return -EBUSY;
790 793
791 /* Start the watchdog */ 794 /* Start the watchdog */
diff --git a/drivers/hwmon/k10temp.c b/drivers/hwmon/k10temp.c
new file mode 100644
index 000000000000..099a2138cdf6
--- /dev/null
+++ b/drivers/hwmon/k10temp.c
@@ -0,0 +1,223 @@
1/*
2 * k10temp.c - AMD Family 10h/11h processor hardware monitoring
3 *
4 * Copyright (c) 2009 Clemens Ladisch <clemens@ladisch.de>
5 *
6 *
7 * This driver is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License; either
9 * version 2 of the License, or (at your option) any later version.
10 *
11 * This driver is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
14 * See the GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this driver; if not, see <http://www.gnu.org/licenses/>.
18 */
19
20#include <linux/err.h>
21#include <linux/hwmon.h>
22#include <linux/hwmon-sysfs.h>
23#include <linux/init.h>
24#include <linux/module.h>
25#include <linux/pci.h>
26#include <asm/processor.h>
27
28MODULE_DESCRIPTION("AMD Family 10h/11h CPU core temperature monitor");
29MODULE_AUTHOR("Clemens Ladisch <clemens@ladisch.de>");
30MODULE_LICENSE("GPL");
31
32static bool force;
33module_param(force, bool, 0444);
34MODULE_PARM_DESC(force, "force loading on processors with erratum 319");
35
36/* CPUID function 0x80000001, ebx */
37#define CPUID_PKGTYPE_MASK 0xf0000000
38#define CPUID_PKGTYPE_F 0x00000000
39#define CPUID_PKGTYPE_AM2R2_AM3 0x10000000
40
41/* DRAM controller (PCI function 2) */
42#define REG_DCT0_CONFIG_HIGH 0x094
43#define DDR3_MODE 0x00000100
44
45/* miscellaneous (PCI function 3) */
46#define REG_HARDWARE_THERMAL_CONTROL 0x64
47#define HTC_ENABLE 0x00000001
48
49#define REG_REPORTED_TEMPERATURE 0xa4
50
51#define REG_NORTHBRIDGE_CAPABILITIES 0xe8
52#define NB_CAP_HTC 0x00000400
53
54static ssize_t show_temp(struct device *dev,
55 struct device_attribute *attr, char *buf)
56{
57 u32 regval;
58
59 pci_read_config_dword(to_pci_dev(dev),
60 REG_REPORTED_TEMPERATURE, &regval);
61 return sprintf(buf, "%u\n", (regval >> 21) * 125);
62}
63
64static ssize_t show_temp_max(struct device *dev,
65 struct device_attribute *attr, char *buf)
66{
67 return sprintf(buf, "%d\n", 70 * 1000);
68}
69
70static ssize_t show_temp_crit(struct device *dev,
71 struct device_attribute *devattr, char *buf)
72{
73 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
74 int show_hyst = attr->index;
75 u32 regval;
76 int value;
77
78 pci_read_config_dword(to_pci_dev(dev),
79 REG_HARDWARE_THERMAL_CONTROL, &regval);
80 value = ((regval >> 16) & 0x7f) * 500 + 52000;
81 if (show_hyst)
82 value -= ((regval >> 24) & 0xf) * 500;
83 return sprintf(buf, "%d\n", value);
84}
85
86static ssize_t show_name(struct device *dev,
87 struct device_attribute *attr, char *buf)
88{
89 return sprintf(buf, "k10temp\n");
90}
91
92static DEVICE_ATTR(temp1_input, S_IRUGO, show_temp, NULL);
93static DEVICE_ATTR(temp1_max, S_IRUGO, show_temp_max, NULL);
94static SENSOR_DEVICE_ATTR(temp1_crit, S_IRUGO, show_temp_crit, NULL, 0);
95static SENSOR_DEVICE_ATTR(temp1_crit_hyst, S_IRUGO, show_temp_crit, NULL, 1);
96static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
97
98static bool __devinit has_erratum_319(struct pci_dev *pdev)
99{
100 u32 pkg_type, reg_dram_cfg;
101
102 if (boot_cpu_data.x86 != 0x10)
103 return false;
104
105 /*
106 * Erratum 319: The thermal sensor of Socket F/AM2+ processors
107 * may be unreliable.
108 */
109 pkg_type = cpuid_ebx(0x80000001) & CPUID_PKGTYPE_MASK;
110 if (pkg_type == CPUID_PKGTYPE_F)
111 return true;
112 if (pkg_type != CPUID_PKGTYPE_AM2R2_AM3)
113 return false;
114
115 /* Differentiate between AM2+ (bad) and AM3 (good) */
116 pci_bus_read_config_dword(pdev->bus,
117 PCI_DEVFN(PCI_SLOT(pdev->devfn), 2),
118 REG_DCT0_CONFIG_HIGH, &reg_dram_cfg);
119 return !(reg_dram_cfg & DDR3_MODE);
120}
121
122static int __devinit k10temp_probe(struct pci_dev *pdev,
123 const struct pci_device_id *id)
124{
125 struct device *hwmon_dev;
126 u32 reg_caps, reg_htc;
127 int unreliable = has_erratum_319(pdev);
128 int err;
129
130 if (unreliable && !force) {
131 dev_err(&pdev->dev,
132 "unreliable CPU thermal sensor; monitoring disabled\n");
133 err = -ENODEV;
134 goto exit;
135 }
136
137 err = device_create_file(&pdev->dev, &dev_attr_temp1_input);
138 if (err)
139 goto exit;
140 err = device_create_file(&pdev->dev, &dev_attr_temp1_max);
141 if (err)
142 goto exit_remove;
143
144 pci_read_config_dword(pdev, REG_NORTHBRIDGE_CAPABILITIES, &reg_caps);
145 pci_read_config_dword(pdev, REG_HARDWARE_THERMAL_CONTROL, &reg_htc);
146 if ((reg_caps & NB_CAP_HTC) && (reg_htc & HTC_ENABLE)) {
147 err = device_create_file(&pdev->dev,
148 &sensor_dev_attr_temp1_crit.dev_attr);
149 if (err)
150 goto exit_remove;
151 err = device_create_file(&pdev->dev,
152 &sensor_dev_attr_temp1_crit_hyst.dev_attr);
153 if (err)
154 goto exit_remove;
155 }
156
157 err = device_create_file(&pdev->dev, &dev_attr_name);
158 if (err)
159 goto exit_remove;
160
161 hwmon_dev = hwmon_device_register(&pdev->dev);
162 if (IS_ERR(hwmon_dev)) {
163 err = PTR_ERR(hwmon_dev);
164 goto exit_remove;
165 }
166 dev_set_drvdata(&pdev->dev, hwmon_dev);
167
168 if (unreliable && force)
169 dev_warn(&pdev->dev,
170 "unreliable CPU thermal sensor; check erratum 319\n");
171 return 0;
172
173exit_remove:
174 device_remove_file(&pdev->dev, &dev_attr_name);
175 device_remove_file(&pdev->dev, &dev_attr_temp1_input);
176 device_remove_file(&pdev->dev, &dev_attr_temp1_max);
177 device_remove_file(&pdev->dev,
178 &sensor_dev_attr_temp1_crit.dev_attr);
179 device_remove_file(&pdev->dev,
180 &sensor_dev_attr_temp1_crit_hyst.dev_attr);
181exit:
182 return err;
183}
184
185static void __devexit k10temp_remove(struct pci_dev *pdev)
186{
187 hwmon_device_unregister(dev_get_drvdata(&pdev->dev));
188 device_remove_file(&pdev->dev, &dev_attr_name);
189 device_remove_file(&pdev->dev, &dev_attr_temp1_input);
190 device_remove_file(&pdev->dev, &dev_attr_temp1_max);
191 device_remove_file(&pdev->dev,
192 &sensor_dev_attr_temp1_crit.dev_attr);
193 device_remove_file(&pdev->dev,
194 &sensor_dev_attr_temp1_crit_hyst.dev_attr);
195 dev_set_drvdata(&pdev->dev, NULL);
196}
197
198static const struct pci_device_id k10temp_id_table[] = {
199 { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_10H_NB_MISC) },
200 { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_11H_NB_MISC) },
201 {}
202};
203MODULE_DEVICE_TABLE(pci, k10temp_id_table);
204
205static struct pci_driver k10temp_driver = {
206 .name = "k10temp",
207 .id_table = k10temp_id_table,
208 .probe = k10temp_probe,
209 .remove = __devexit_p(k10temp_remove),
210};
211
212static int __init k10temp_init(void)
213{
214 return pci_register_driver(&k10temp_driver);
215}
216
217static void __exit k10temp_exit(void)
218{
219 pci_unregister_driver(&k10temp_driver);
220}
221
222module_init(k10temp_init)
223module_exit(k10temp_exit)
diff --git a/drivers/hwmon/k8temp.c b/drivers/hwmon/k8temp.c
index 1fe995111841..0ceb6d6200a3 100644
--- a/drivers/hwmon/k8temp.c
+++ b/drivers/hwmon/k8temp.c
@@ -136,7 +136,7 @@ static SENSOR_DEVICE_ATTR_2(temp3_input, S_IRUGO, show_temp, NULL, 1, 0);
136static SENSOR_DEVICE_ATTR_2(temp4_input, S_IRUGO, show_temp, NULL, 1, 1); 136static SENSOR_DEVICE_ATTR_2(temp4_input, S_IRUGO, show_temp, NULL, 1, 1);
137static DEVICE_ATTR(name, S_IRUGO, show_name, NULL); 137static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
138 138
139static struct pci_device_id k8temp_ids[] = { 139static const struct pci_device_id k8temp_ids[] = {
140 { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_K8_NB_MISC) }, 140 { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_K8_NB_MISC) },
141 { 0 }, 141 { 0 },
142}; 142};
diff --git a/drivers/hwmon/lis3lv02d_i2c.c b/drivers/hwmon/lis3lv02d_i2c.c
new file mode 100644
index 000000000000..dc1f5402c1d7
--- /dev/null
+++ b/drivers/hwmon/lis3lv02d_i2c.c
@@ -0,0 +1,183 @@
1/*
2 * drivers/hwmon/lis3lv02d_i2c.c
3 *
4 * Implements I2C interface for lis3lv02d (STMicroelectronics) accelerometer.
5 * Driver is based on corresponding SPI driver written by Daniel Mack
6 * (lis3lv02d_spi.c (C) 2009 Daniel Mack <daniel@caiaq.de> ).
7 *
8 * Copyright (C) 2009 Nokia Corporation and/or its subsidiary(-ies).
9 *
10 * Contact: Samu Onkalo <samu.p.onkalo@nokia.com>
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * version 2 as published by the Free Software Foundation.
15 *
16 * This program is distributed in the hope that it will be useful, but
17 * WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
19 * General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
24 * 02110-1301 USA
25 */
26
27#include <linux/module.h>
28#include <linux/kernel.h>
29#include <linux/init.h>
30#include <linux/err.h>
31#include <linux/i2c.h>
32#include "lis3lv02d.h"
33
34#define DRV_NAME "lis3lv02d_i2c"
35
36static inline s32 lis3_i2c_write(struct lis3lv02d *lis3, int reg, u8 value)
37{
38 struct i2c_client *c = lis3->bus_priv;
39 return i2c_smbus_write_byte_data(c, reg, value);
40}
41
42static inline s32 lis3_i2c_read(struct lis3lv02d *lis3, int reg, u8 *v)
43{
44 struct i2c_client *c = lis3->bus_priv;
45 *v = i2c_smbus_read_byte_data(c, reg);
46 return 0;
47}
48
49static int lis3_i2c_init(struct lis3lv02d *lis3)
50{
51 u8 reg;
52 int ret;
53
54 /* power up the device */
55 ret = lis3->read(lis3, CTRL_REG1, &reg);
56 if (ret < 0)
57 return ret;
58
59 reg |= CTRL1_PD0;
60 return lis3->write(lis3, CTRL_REG1, reg);
61}
62
63/* Default axis mapping but it can be overwritten by platform data */
64static struct axis_conversion lis3lv02d_axis_map = { LIS3_DEV_X,
65 LIS3_DEV_Y,
66 LIS3_DEV_Z };
67
68static int __devinit lis3lv02d_i2c_probe(struct i2c_client *client,
69 const struct i2c_device_id *id)
70{
71 int ret = 0;
72 struct lis3lv02d_platform_data *pdata = client->dev.platform_data;
73
74 if (pdata) {
75 if (pdata->axis_x)
76 lis3lv02d_axis_map.x = pdata->axis_x;
77
78 if (pdata->axis_y)
79 lis3lv02d_axis_map.y = pdata->axis_y;
80
81 if (pdata->axis_z)
82 lis3lv02d_axis_map.z = pdata->axis_z;
83
84 if (pdata->setup_resources)
85 ret = pdata->setup_resources();
86
87 if (ret)
88 goto fail;
89 }
90
91 lis3_dev.pdata = pdata;
92 lis3_dev.bus_priv = client;
93 lis3_dev.init = lis3_i2c_init;
94 lis3_dev.read = lis3_i2c_read;
95 lis3_dev.write = lis3_i2c_write;
96 lis3_dev.irq = client->irq;
97 lis3_dev.ac = lis3lv02d_axis_map;
98
99 i2c_set_clientdata(client, &lis3_dev);
100 ret = lis3lv02d_init_device(&lis3_dev);
101fail:
102 return ret;
103}
104
105static int __devexit lis3lv02d_i2c_remove(struct i2c_client *client)
106{
107 struct lis3lv02d *lis3 = i2c_get_clientdata(client);
108 struct lis3lv02d_platform_data *pdata = client->dev.platform_data;
109
110 if (pdata && pdata->release_resources)
111 pdata->release_resources();
112
113 lis3lv02d_joystick_disable();
114 lis3lv02d_poweroff(lis3);
115
116 return lis3lv02d_remove_fs(&lis3_dev);
117}
118
119#ifdef CONFIG_PM
120static int lis3lv02d_i2c_suspend(struct i2c_client *client, pm_message_t mesg)
121{
122 struct lis3lv02d *lis3 = i2c_get_clientdata(client);
123
124 if (!lis3->pdata->wakeup_flags)
125 lis3lv02d_poweroff(lis3);
126 return 0;
127}
128
129static int lis3lv02d_i2c_resume(struct i2c_client *client)
130{
131 struct lis3lv02d *lis3 = i2c_get_clientdata(client);
132
133 if (!lis3->pdata->wakeup_flags)
134 lis3lv02d_poweron(lis3);
135 return 0;
136}
137
138static void lis3lv02d_i2c_shutdown(struct i2c_client *client)
139{
140 lis3lv02d_i2c_suspend(client, PMSG_SUSPEND);
141}
142#else
143#define lis3lv02d_i2c_suspend NULL
144#define lis3lv02d_i2c_resume NULL
145#define lis3lv02d_i2c_shutdown NULL
146#endif
147
148static const struct i2c_device_id lis3lv02d_id[] = {
149 {"lis3lv02d", 0 },
150 {}
151};
152
153MODULE_DEVICE_TABLE(i2c, lis3lv02d_id);
154
155static struct i2c_driver lis3lv02d_i2c_driver = {
156 .driver = {
157 .name = DRV_NAME,
158 .owner = THIS_MODULE,
159 },
160 .suspend = lis3lv02d_i2c_suspend,
161 .shutdown = lis3lv02d_i2c_shutdown,
162 .resume = lis3lv02d_i2c_resume,
163 .probe = lis3lv02d_i2c_probe,
164 .remove = __devexit_p(lis3lv02d_i2c_remove),
165 .id_table = lis3lv02d_id,
166};
167
168static int __init lis3lv02d_init(void)
169{
170 return i2c_add_driver(&lis3lv02d_i2c_driver);
171}
172
173static void __exit lis3lv02d_exit(void)
174{
175 i2c_del_driver(&lis3lv02d_i2c_driver);
176}
177
178MODULE_AUTHOR("Nokia Corporation");
179MODULE_DESCRIPTION("lis3lv02d I2C interface");
180MODULE_LICENSE("GPL");
181
182module_init(lis3lv02d_init);
183module_exit(lis3lv02d_exit);
diff --git a/drivers/hwmon/lm78.c b/drivers/hwmon/lm78.c
index cadcbd90ff3b..72ff2c4e757d 100644
--- a/drivers/hwmon/lm78.c
+++ b/drivers/hwmon/lm78.c
@@ -851,17 +851,16 @@ static struct lm78_data *lm78_update_device(struct device *dev)
851static int __init lm78_isa_found(unsigned short address) 851static int __init lm78_isa_found(unsigned short address)
852{ 852{
853 int val, save, found = 0; 853 int val, save, found = 0;
854 854 int port;
855 /* We have to request the region in two parts because some 855
856 boards declare base+4 to base+7 as a PNP device */ 856 /* Some boards declare base+0 to base+7 as a PNP device, some base+4
857 if (!request_region(address, 4, "lm78")) { 857 * to base+7 and some base+5 to base+6. So we better request each port
858 pr_debug("lm78: Failed to request low part of region\n"); 858 * individually for the probing phase. */
859 return 0; 859 for (port = address; port < address + LM78_EXTENT; port++) {
860 } 860 if (!request_region(port, 1, "lm78")) {
861 if (!request_region(address + 4, 4, "lm78")) { 861 pr_debug("lm78: Failed to request port 0x%x\n", port);
862 pr_debug("lm78: Failed to request high part of region\n"); 862 goto release;
863 release_region(address, 4); 863 }
864 return 0;
865 } 864 }
866 865
867#define REALLY_SLOW_IO 866#define REALLY_SLOW_IO
@@ -925,8 +924,8 @@ static int __init lm78_isa_found(unsigned short address)
925 val & 0x80 ? "LM79" : "LM78", (int)address); 924 val & 0x80 ? "LM79" : "LM78", (int)address);
926 925
927 release: 926 release:
928 release_region(address + 4, 4); 927 for (port--; port >= address; port--)
929 release_region(address, 4); 928 release_region(port, 1);
930 return found; 929 return found;
931} 930}
932 931
diff --git a/drivers/hwmon/sht15.c b/drivers/hwmon/sht15.c
index ebe38b680ee3..864a371f6eb9 100644
--- a/drivers/hwmon/sht15.c
+++ b/drivers/hwmon/sht15.c
@@ -305,7 +305,7 @@ static inline int sht15_calc_temp(struct sht15_data *data)
305 int d1 = 0; 305 int d1 = 0;
306 int i; 306 int i;
307 307
308 for (i = 1; i < ARRAY_SIZE(temppoints) - 1; i++) 308 for (i = 1; i < ARRAY_SIZE(temppoints); i++)
309 /* Find pointer to interpolate */ 309 /* Find pointer to interpolate */
310 if (data->supply_uV > temppoints[i - 1].vdd) { 310 if (data->supply_uV > temppoints[i - 1].vdd) {
311 d1 = (data->supply_uV/1000 - temppoints[i - 1].vdd) 311 d1 = (data->supply_uV/1000 - temppoints[i - 1].vdd)
@@ -332,12 +332,12 @@ static inline int sht15_calc_humid(struct sht15_data *data)
332 332
333 const int c1 = -4; 333 const int c1 = -4;
334 const int c2 = 40500; /* x 10 ^ -6 */ 334 const int c2 = 40500; /* x 10 ^ -6 */
335 const int c3 = 2800; /* x10 ^ -9 */ 335 const int c3 = -2800; /* x10 ^ -9 */
336 336
337 RHlinear = c1*1000 337 RHlinear = c1*1000
338 + c2 * data->val_humid/1000 338 + c2 * data->val_humid/1000
339 + (data->val_humid * data->val_humid * c3)/1000000; 339 + (data->val_humid * data->val_humid * c3)/1000000;
340 return (temp - 25000) * (10000 + 800 * data->val_humid) 340 return (temp - 25000) * (10000 + 80 * data->val_humid)
341 / 1000000 + RHlinear; 341 / 1000000 + RHlinear;
342} 342}
343 343
diff --git a/drivers/hwmon/sis5595.c b/drivers/hwmon/sis5595.c
index 12f2e7086560..79c2931e3008 100644
--- a/drivers/hwmon/sis5595.c
+++ b/drivers/hwmon/sis5595.c
@@ -697,7 +697,7 @@ static struct sis5595_data *sis5595_update_device(struct device *dev)
697 return data; 697 return data;
698} 698}
699 699
700static struct pci_device_id sis5595_pci_ids[] = { 700static const struct pci_device_id sis5595_pci_ids[] = {
701 { PCI_DEVICE(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_503) }, 701 { PCI_DEVICE(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_503) },
702 { 0, } 702 { 0, }
703}; 703};
diff --git a/drivers/hwmon/smsc47m1.c b/drivers/hwmon/smsc47m1.c
index 8ad50fdba00d..8fa462f2b570 100644
--- a/drivers/hwmon/smsc47m1.c
+++ b/drivers/hwmon/smsc47m1.c
@@ -136,11 +136,11 @@ struct smsc47m1_data {
136 136
137struct smsc47m1_sio_data { 137struct smsc47m1_sio_data {
138 enum chips type; 138 enum chips type;
139 u8 activate; /* Remember initial device state */
139}; 140};
140 141
141 142
142static int smsc47m1_probe(struct platform_device *pdev); 143static int __exit smsc47m1_remove(struct platform_device *pdev);
143static int __devexit smsc47m1_remove(struct platform_device *pdev);
144static struct smsc47m1_data *smsc47m1_update_device(struct device *dev, 144static struct smsc47m1_data *smsc47m1_update_device(struct device *dev,
145 int init); 145 int init);
146 146
@@ -160,8 +160,7 @@ static struct platform_driver smsc47m1_driver = {
160 .owner = THIS_MODULE, 160 .owner = THIS_MODULE,
161 .name = DRVNAME, 161 .name = DRVNAME,
162 }, 162 },
163 .probe = smsc47m1_probe, 163 .remove = __exit_p(smsc47m1_remove),
164 .remove = __devexit_p(smsc47m1_remove),
165}; 164};
166 165
167static ssize_t get_fan(struct device *dev, struct device_attribute 166static ssize_t get_fan(struct device *dev, struct device_attribute
@@ -470,24 +469,126 @@ static int __init smsc47m1_find(unsigned short *addr,
470 superio_select(); 469 superio_select();
471 *addr = (superio_inb(SUPERIO_REG_BASE) << 8) 470 *addr = (superio_inb(SUPERIO_REG_BASE) << 8)
472 | superio_inb(SUPERIO_REG_BASE + 1); 471 | superio_inb(SUPERIO_REG_BASE + 1);
473 val = superio_inb(SUPERIO_REG_ACT); 472 if (*addr == 0) {
474 if (*addr == 0 || (val & 0x01) == 0) { 473 pr_info(DRVNAME ": Device address not set, will not use\n");
475 pr_info(DRVNAME ": Device is disabled, will not use\n");
476 superio_exit(); 474 superio_exit();
477 return -ENODEV; 475 return -ENODEV;
478 } 476 }
479 477
478 /* Enable only if address is set (needed at least on the
479 * Compaq Presario S4000NX) */
480 sio_data->activate = superio_inb(SUPERIO_REG_ACT);
481 if ((sio_data->activate & 0x01) == 0) {
482 pr_info(DRVNAME ": Enabling device\n");
483 superio_outb(SUPERIO_REG_ACT, sio_data->activate | 0x01);
484 }
485
480 superio_exit(); 486 superio_exit();
481 return 0; 487 return 0;
482} 488}
483 489
484static int __devinit smsc47m1_probe(struct platform_device *pdev) 490/* Restore device to its initial state */
491static void smsc47m1_restore(const struct smsc47m1_sio_data *sio_data)
492{
493 if ((sio_data->activate & 0x01) == 0) {
494 superio_enter();
495 superio_select();
496
497 pr_info(DRVNAME ": Disabling device\n");
498 superio_outb(SUPERIO_REG_ACT, sio_data->activate);
499
500 superio_exit();
501 }
502}
503
504#define CHECK 1
505#define REQUEST 2
506#define RELEASE 3
507
508/*
509 * This function can be used to:
510 * - test for resource conflicts with ACPI
511 * - request the resources
512 * - release the resources
513 * We only allocate the I/O ports we really need, to minimize the risk of
514 * conflicts with ACPI or with other drivers.
515 */
516static int smsc47m1_handle_resources(unsigned short address, enum chips type,
517 int action, struct device *dev)
518{
519 static const u8 ports_m1[] = {
520 /* register, region length */
521 0x04, 1,
522 0x33, 4,
523 0x56, 7,
524 };
525
526 static const u8 ports_m2[] = {
527 /* register, region length */
528 0x04, 1,
529 0x09, 1,
530 0x2c, 2,
531 0x35, 4,
532 0x56, 7,
533 0x69, 4,
534 };
535
536 int i, ports_size, err;
537 const u8 *ports;
538
539 switch (type) {
540 case smsc47m1:
541 default:
542 ports = ports_m1;
543 ports_size = ARRAY_SIZE(ports_m1);
544 break;
545 case smsc47m2:
546 ports = ports_m2;
547 ports_size = ARRAY_SIZE(ports_m2);
548 break;
549 }
550
551 for (i = 0; i + 1 < ports_size; i += 2) {
552 unsigned short start = address + ports[i];
553 unsigned short len = ports[i + 1];
554
555 switch (action) {
556 case CHECK:
557 /* Only check for conflicts */
558 err = acpi_check_region(start, len, DRVNAME);
559 if (err)
560 return err;
561 break;
562 case REQUEST:
563 /* Request the resources */
564 if (!request_region(start, len, DRVNAME)) {
565 dev_err(dev, "Region 0x%hx-0x%hx already in "
566 "use!\n", start, start + len);
567
568 /* Undo all requests */
569 for (i -= 2; i >= 0; i -= 2)
570 release_region(address + ports[i],
571 ports[i + 1]);
572 return -EBUSY;
573 }
574 break;
575 case RELEASE:
576 /* Release the resources */
577 release_region(start, len);
578 break;
579 }
580 }
581
582 return 0;
583}
584
585static int __init smsc47m1_probe(struct platform_device *pdev)
485{ 586{
486 struct device *dev = &pdev->dev; 587 struct device *dev = &pdev->dev;
487 struct smsc47m1_sio_data *sio_data = dev->platform_data; 588 struct smsc47m1_sio_data *sio_data = dev->platform_data;
488 struct smsc47m1_data *data; 589 struct smsc47m1_data *data;
489 struct resource *res; 590 struct resource *res;
490 int err = 0; 591 int err;
491 int fan1, fan2, fan3, pwm1, pwm2, pwm3; 592 int fan1, fan2, fan3, pwm1, pwm2, pwm3;
492 593
493 static const char *names[] = { 594 static const char *names[] = {
@@ -496,12 +597,10 @@ static int __devinit smsc47m1_probe(struct platform_device *pdev)
496 }; 597 };
497 598
498 res = platform_get_resource(pdev, IORESOURCE_IO, 0); 599 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
499 if (!request_region(res->start, SMSC_EXTENT, DRVNAME)) { 600 err = smsc47m1_handle_resources(res->start, sio_data->type,
500 dev_err(dev, "Region 0x%lx-0x%lx already in use!\n", 601 REQUEST, dev);
501 (unsigned long)res->start, 602 if (err < 0)
502 (unsigned long)res->end); 603 return err;
503 return -EBUSY;
504 }
505 604
506 if (!(data = kzalloc(sizeof(struct smsc47m1_data), GFP_KERNEL))) { 605 if (!(data = kzalloc(sizeof(struct smsc47m1_data), GFP_KERNEL))) {
507 err = -ENOMEM; 606 err = -ENOMEM;
@@ -637,11 +736,11 @@ error_free:
637 platform_set_drvdata(pdev, NULL); 736 platform_set_drvdata(pdev, NULL);
638 kfree(data); 737 kfree(data);
639error_release: 738error_release:
640 release_region(res->start, SMSC_EXTENT); 739 smsc47m1_handle_resources(res->start, sio_data->type, RELEASE, dev);
641 return err; 740 return err;
642} 741}
643 742
644static int __devexit smsc47m1_remove(struct platform_device *pdev) 743static int __exit smsc47m1_remove(struct platform_device *pdev)
645{ 744{
646 struct smsc47m1_data *data = platform_get_drvdata(pdev); 745 struct smsc47m1_data *data = platform_get_drvdata(pdev);
647 struct resource *res; 746 struct resource *res;
@@ -650,7 +749,7 @@ static int __devexit smsc47m1_remove(struct platform_device *pdev)
650 sysfs_remove_group(&pdev->dev.kobj, &smsc47m1_group); 749 sysfs_remove_group(&pdev->dev.kobj, &smsc47m1_group);
651 750
652 res = platform_get_resource(pdev, IORESOURCE_IO, 0); 751 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
653 release_region(res->start, SMSC_EXTENT); 752 smsc47m1_handle_resources(res->start, data->type, RELEASE, &pdev->dev);
654 platform_set_drvdata(pdev, NULL); 753 platform_set_drvdata(pdev, NULL);
655 kfree(data); 754 kfree(data);
656 755
@@ -717,7 +816,7 @@ static int __init smsc47m1_device_add(unsigned short address,
717 }; 816 };
718 int err; 817 int err;
719 818
720 err = acpi_check_resource_conflict(&res); 819 err = smsc47m1_handle_resources(address, sio_data->type, CHECK, NULL);
721 if (err) 820 if (err)
722 goto exit; 821 goto exit;
723 822
@@ -766,27 +865,29 @@ static int __init sm_smsc47m1_init(void)
766 if (smsc47m1_find(&address, &sio_data)) 865 if (smsc47m1_find(&address, &sio_data))
767 return -ENODEV; 866 return -ENODEV;
768 867
769 err = platform_driver_register(&smsc47m1_driver); 868 /* Sets global pdev as a side effect */
869 err = smsc47m1_device_add(address, &sio_data);
770 if (err) 870 if (err)
771 goto exit; 871 goto exit;
772 872
773 /* Sets global pdev as a side effect */ 873 err = platform_driver_probe(&smsc47m1_driver, smsc47m1_probe);
774 err = smsc47m1_device_add(address, &sio_data);
775 if (err) 874 if (err)
776 goto exit_driver; 875 goto exit_device;
777 876
778 return 0; 877 return 0;
779 878
780exit_driver: 879exit_device:
781 platform_driver_unregister(&smsc47m1_driver); 880 platform_device_unregister(pdev);
881 smsc47m1_restore(&sio_data);
782exit: 882exit:
783 return err; 883 return err;
784} 884}
785 885
786static void __exit sm_smsc47m1_exit(void) 886static void __exit sm_smsc47m1_exit(void)
787{ 887{
788 platform_device_unregister(pdev);
789 platform_driver_unregister(&smsc47m1_driver); 888 platform_driver_unregister(&smsc47m1_driver);
889 smsc47m1_restore(pdev->dev.platform_data);
890 platform_device_unregister(pdev);
790} 891}
791 892
792MODULE_AUTHOR("Mark D. Studebaker <mdsxyz123@yahoo.com>"); 893MODULE_AUTHOR("Mark D. Studebaker <mdsxyz123@yahoo.com>");
diff --git a/drivers/hwmon/via-cputemp.c b/drivers/hwmon/via-cputemp.c
new file mode 100644
index 000000000000..7442cf754856
--- /dev/null
+++ b/drivers/hwmon/via-cputemp.c
@@ -0,0 +1,356 @@
1/*
2 * via-cputemp.c - Driver for VIA CPU core temperature monitoring
3 * Copyright (C) 2009 VIA Technologies, Inc.
4 *
5 * based on existing coretemp.c, which is
6 *
7 * Copyright (C) 2007 Rudolf Marek <r.marek@assembler.cz>
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; version 2 of the License.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
21 * 02110-1301 USA.
22 */
23
24#include <linux/module.h>
25#include <linux/delay.h>
26#include <linux/init.h>
27#include <linux/slab.h>
28#include <linux/jiffies.h>
29#include <linux/hwmon.h>
30#include <linux/sysfs.h>
31#include <linux/hwmon-sysfs.h>
32#include <linux/err.h>
33#include <linux/mutex.h>
34#include <linux/list.h>
35#include <linux/platform_device.h>
36#include <linux/cpu.h>
37#include <asm/msr.h>
38#include <asm/processor.h>
39
40#define DRVNAME "via_cputemp"
41
42enum { SHOW_TEMP, SHOW_LABEL, SHOW_NAME } SHOW;
43
44/*
45 * Functions declaration
46 */
47
48struct via_cputemp_data {
49 struct device *hwmon_dev;
50 const char *name;
51 u32 id;
52 u32 msr;
53};
54
55/*
56 * Sysfs stuff
57 */
58
59static ssize_t show_name(struct device *dev, struct device_attribute
60 *devattr, char *buf)
61{
62 int ret;
63 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
64 struct via_cputemp_data *data = dev_get_drvdata(dev);
65
66 if (attr->index == SHOW_NAME)
67 ret = sprintf(buf, "%s\n", data->name);
68 else /* show label */
69 ret = sprintf(buf, "Core %d\n", data->id);
70 return ret;
71}
72
73static ssize_t show_temp(struct device *dev,
74 struct device_attribute *devattr, char *buf)
75{
76 struct via_cputemp_data *data = dev_get_drvdata(dev);
77 u32 eax, edx;
78 int err;
79
80 err = rdmsr_safe_on_cpu(data->id, data->msr, &eax, &edx);
81 if (err)
82 return -EAGAIN;
83
84 return sprintf(buf, "%lu\n", ((unsigned long)eax & 0xffffff) * 1000);
85}
86
87static SENSOR_DEVICE_ATTR(temp1_input, S_IRUGO, show_temp, NULL,
88 SHOW_TEMP);
89static SENSOR_DEVICE_ATTR(temp1_label, S_IRUGO, show_name, NULL, SHOW_LABEL);
90static SENSOR_DEVICE_ATTR(name, S_IRUGO, show_name, NULL, SHOW_NAME);
91
92static struct attribute *via_cputemp_attributes[] = {
93 &sensor_dev_attr_name.dev_attr.attr,
94 &sensor_dev_attr_temp1_label.dev_attr.attr,
95 &sensor_dev_attr_temp1_input.dev_attr.attr,
96 NULL
97};
98
99static const struct attribute_group via_cputemp_group = {
100 .attrs = via_cputemp_attributes,
101};
102
103static int __devinit via_cputemp_probe(struct platform_device *pdev)
104{
105 struct via_cputemp_data *data;
106 struct cpuinfo_x86 *c = &cpu_data(pdev->id);
107 int err;
108 u32 eax, edx;
109
110 data = kzalloc(sizeof(struct via_cputemp_data), GFP_KERNEL);
111 if (!data) {
112 err = -ENOMEM;
113 dev_err(&pdev->dev, "Out of memory\n");
114 goto exit;
115 }
116
117 data->id = pdev->id;
118 data->name = "via_cputemp";
119
120 switch (c->x86_model) {
121 case 0xA:
122 /* C7 A */
123 case 0xD:
124 /* C7 D */
125 data->msr = 0x1169;
126 break;
127 case 0xF:
128 /* Nano */
129 data->msr = 0x1423;
130 break;
131 default:
132 err = -ENODEV;
133 goto exit_free;
134 }
135
136 /* test if we can access the TEMPERATURE MSR */
137 err = rdmsr_safe_on_cpu(data->id, data->msr, &eax, &edx);
138 if (err) {
139 dev_err(&pdev->dev,
140 "Unable to access TEMPERATURE MSR, giving up\n");
141 goto exit_free;
142 }
143
144 platform_set_drvdata(pdev, data);
145
146 err = sysfs_create_group(&pdev->dev.kobj, &via_cputemp_group);
147 if (err)
148 goto exit_free;
149
150 data->hwmon_dev = hwmon_device_register(&pdev->dev);
151 if (IS_ERR(data->hwmon_dev)) {
152 err = PTR_ERR(data->hwmon_dev);
153 dev_err(&pdev->dev, "Class registration failed (%d)\n",
154 err);
155 goto exit_remove;
156 }
157
158 return 0;
159
160exit_remove:
161 sysfs_remove_group(&pdev->dev.kobj, &via_cputemp_group);
162exit_free:
163 platform_set_drvdata(pdev, NULL);
164 kfree(data);
165exit:
166 return err;
167}
168
169static int __devexit via_cputemp_remove(struct platform_device *pdev)
170{
171 struct via_cputemp_data *data = platform_get_drvdata(pdev);
172
173 hwmon_device_unregister(data->hwmon_dev);
174 sysfs_remove_group(&pdev->dev.kobj, &via_cputemp_group);
175 platform_set_drvdata(pdev, NULL);
176 kfree(data);
177 return 0;
178}
179
180static struct platform_driver via_cputemp_driver = {
181 .driver = {
182 .owner = THIS_MODULE,
183 .name = DRVNAME,
184 },
185 .probe = via_cputemp_probe,
186 .remove = __devexit_p(via_cputemp_remove),
187};
188
189struct pdev_entry {
190 struct list_head list;
191 struct platform_device *pdev;
192 unsigned int cpu;
193};
194
195static LIST_HEAD(pdev_list);
196static DEFINE_MUTEX(pdev_list_mutex);
197
198static int __cpuinit via_cputemp_device_add(unsigned int cpu)
199{
200 int err;
201 struct platform_device *pdev;
202 struct pdev_entry *pdev_entry;
203
204 pdev = platform_device_alloc(DRVNAME, cpu);
205 if (!pdev) {
206 err = -ENOMEM;
207 printk(KERN_ERR DRVNAME ": Device allocation failed\n");
208 goto exit;
209 }
210
211 pdev_entry = kzalloc(sizeof(struct pdev_entry), GFP_KERNEL);
212 if (!pdev_entry) {
213 err = -ENOMEM;
214 goto exit_device_put;
215 }
216
217 err = platform_device_add(pdev);
218 if (err) {
219 printk(KERN_ERR DRVNAME ": Device addition failed (%d)\n",
220 err);
221 goto exit_device_free;
222 }
223
224 pdev_entry->pdev = pdev;
225 pdev_entry->cpu = cpu;
226 mutex_lock(&pdev_list_mutex);
227 list_add_tail(&pdev_entry->list, &pdev_list);
228 mutex_unlock(&pdev_list_mutex);
229
230 return 0;
231
232exit_device_free:
233 kfree(pdev_entry);
234exit_device_put:
235 platform_device_put(pdev);
236exit:
237 return err;
238}
239
240#ifdef CONFIG_HOTPLUG_CPU
241static void via_cputemp_device_remove(unsigned int cpu)
242{
243 struct pdev_entry *p, *n;
244 mutex_lock(&pdev_list_mutex);
245 list_for_each_entry_safe(p, n, &pdev_list, list) {
246 if (p->cpu == cpu) {
247 platform_device_unregister(p->pdev);
248 list_del(&p->list);
249 kfree(p);
250 }
251 }
252 mutex_unlock(&pdev_list_mutex);
253}
254
255static int __cpuinit via_cputemp_cpu_callback(struct notifier_block *nfb,
256 unsigned long action, void *hcpu)
257{
258 unsigned int cpu = (unsigned long) hcpu;
259
260 switch (action) {
261 case CPU_ONLINE:
262 case CPU_DOWN_FAILED:
263 via_cputemp_device_add(cpu);
264 break;
265 case CPU_DOWN_PREPARE:
266 via_cputemp_device_remove(cpu);
267 break;
268 }
269 return NOTIFY_OK;
270}
271
272static struct notifier_block via_cputemp_cpu_notifier __refdata = {
273 .notifier_call = via_cputemp_cpu_callback,
274};
275#endif /* !CONFIG_HOTPLUG_CPU */
276
277static int __init via_cputemp_init(void)
278{
279 int i, err;
280 struct pdev_entry *p, *n;
281
282 if (cpu_data(0).x86_vendor != X86_VENDOR_CENTAUR) {
283 printk(KERN_DEBUG DRVNAME ": Not a VIA CPU\n");
284 err = -ENODEV;
285 goto exit;
286 }
287
288 err = platform_driver_register(&via_cputemp_driver);
289 if (err)
290 goto exit;
291
292 for_each_online_cpu(i) {
293 struct cpuinfo_x86 *c = &cpu_data(i);
294
295 if (c->x86 != 6)
296 continue;
297
298 if (c->x86_model < 0x0a)
299 continue;
300
301 if (c->x86_model > 0x0f) {
302 printk(KERN_WARNING DRVNAME ": Unknown CPU "
303 "model 0x%x\n", c->x86_model);
304 continue;
305 }
306
307 err = via_cputemp_device_add(i);
308 if (err)
309 goto exit_devices_unreg;
310 }
311 if (list_empty(&pdev_list)) {
312 err = -ENODEV;
313 goto exit_driver_unreg;
314 }
315
316#ifdef CONFIG_HOTPLUG_CPU
317 register_hotcpu_notifier(&via_cputemp_cpu_notifier);
318#endif
319 return 0;
320
321exit_devices_unreg:
322 mutex_lock(&pdev_list_mutex);
323 list_for_each_entry_safe(p, n, &pdev_list, list) {
324 platform_device_unregister(p->pdev);
325 list_del(&p->list);
326 kfree(p);
327 }
328 mutex_unlock(&pdev_list_mutex);
329exit_driver_unreg:
330 platform_driver_unregister(&via_cputemp_driver);
331exit:
332 return err;
333}
334
335static void __exit via_cputemp_exit(void)
336{
337 struct pdev_entry *p, *n;
338#ifdef CONFIG_HOTPLUG_CPU
339 unregister_hotcpu_notifier(&via_cputemp_cpu_notifier);
340#endif
341 mutex_lock(&pdev_list_mutex);
342 list_for_each_entry_safe(p, n, &pdev_list, list) {
343 platform_device_unregister(p->pdev);
344 list_del(&p->list);
345 kfree(p);
346 }
347 mutex_unlock(&pdev_list_mutex);
348 platform_driver_unregister(&via_cputemp_driver);
349}
350
351MODULE_AUTHOR("Harald Welte <HaraldWelte@viatech.com>");
352MODULE_DESCRIPTION("VIA CPU temperature monitor");
353MODULE_LICENSE("GPL");
354
355module_init(via_cputemp_init)
356module_exit(via_cputemp_exit)
diff --git a/drivers/hwmon/via686a.c b/drivers/hwmon/via686a.c
index 39e82a492f26..f397ce7ad598 100644
--- a/drivers/hwmon/via686a.c
+++ b/drivers/hwmon/via686a.c
@@ -767,7 +767,7 @@ static struct via686a_data *via686a_update_device(struct device *dev)
767 return data; 767 return data;
768} 768}
769 769
770static struct pci_device_id via686a_pci_ids[] = { 770static const struct pci_device_id via686a_pci_ids[] = {
771 { PCI_DEVICE(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C686_4) }, 771 { PCI_DEVICE(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C686_4) },
772 { 0, } 772 { 0, }
773}; 773};
diff --git a/drivers/hwmon/vt8231.c b/drivers/hwmon/vt8231.c
index 470a1226ba2b..d47b4c9949c2 100644
--- a/drivers/hwmon/vt8231.c
+++ b/drivers/hwmon/vt8231.c
@@ -697,7 +697,7 @@ static struct platform_driver vt8231_driver = {
697 .remove = __devexit_p(vt8231_remove), 697 .remove = __devexit_p(vt8231_remove),
698}; 698};
699 699
700static struct pci_device_id vt8231_pci_ids[] = { 700static const struct pci_device_id vt8231_pci_ids[] = {
701 { PCI_DEVICE(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8231_4) }, 701 { PCI_DEVICE(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8231_4) },
702 { 0, } 702 { 0, }
703}; 703};
diff --git a/drivers/hwmon/w83627hf.c b/drivers/hwmon/w83627hf.c
index b257c7223733..38e280523071 100644
--- a/drivers/hwmon/w83627hf.c
+++ b/drivers/hwmon/w83627hf.c
@@ -1135,6 +1135,7 @@ static int __init w83627hf_find(int sioaddr, unsigned short *addr,
1135 "W83687THF", 1135 "W83687THF",
1136 }; 1136 };
1137 1137
1138 sio_data->sioaddr = sioaddr;
1138 superio_enter(sio_data); 1139 superio_enter(sio_data);
1139 val = force_id ? force_id : superio_inb(sio_data, DEVID); 1140 val = force_id ? force_id : superio_inb(sio_data, DEVID);
1140 switch (val) { 1141 switch (val) {
@@ -1177,7 +1178,6 @@ static int __init w83627hf_find(int sioaddr, unsigned short *addr,
1177 } 1178 }
1178 1179
1179 err = 0; 1180 err = 0;
1180 sio_data->sioaddr = sioaddr;
1181 pr_info(DRVNAME ": Found %s chip at %#x\n", 1181 pr_info(DRVNAME ": Found %s chip at %#x\n",
1182 names[sio_data->type], *addr); 1182 names[sio_data->type], *addr);
1183 1183
diff --git a/drivers/hwmon/w83781d.c b/drivers/hwmon/w83781d.c
index 05f9225b6f94..32d4adee73db 100644
--- a/drivers/hwmon/w83781d.c
+++ b/drivers/hwmon/w83781d.c
@@ -1793,17 +1793,17 @@ static int __init
1793w83781d_isa_found(unsigned short address) 1793w83781d_isa_found(unsigned short address)
1794{ 1794{
1795 int val, save, found = 0; 1795 int val, save, found = 0;
1796 1796 int port;
1797 /* We have to request the region in two parts because some 1797
1798 boards declare base+4 to base+7 as a PNP device */ 1798 /* Some boards declare base+0 to base+7 as a PNP device, some base+4
1799 if (!request_region(address, 4, "w83781d")) { 1799 * to base+7 and some base+5 to base+6. So we better request each port
1800 pr_debug("w83781d: Failed to request low part of region\n"); 1800 * individually for the probing phase. */
1801 return 0; 1801 for (port = address; port < address + W83781D_EXTENT; port++) {
1802 } 1802 if (!request_region(port, 1, "w83781d")) {
1803 if (!request_region(address + 4, 4, "w83781d")) { 1803 pr_debug("w83781d: Failed to request port 0x%x\n",
1804 pr_debug("w83781d: Failed to request high part of region\n"); 1804 port);
1805 release_region(address, 4); 1805 goto release;
1806 return 0; 1806 }
1807 } 1807 }
1808 1808
1809#define REALLY_SLOW_IO 1809#define REALLY_SLOW_IO
@@ -1877,8 +1877,8 @@ w83781d_isa_found(unsigned short address)
1877 val == 0x30 ? "W83782D" : "W83781D", (int)address); 1877 val == 0x30 ? "W83782D" : "W83781D", (int)address);
1878 1878
1879 release: 1879 release:
1880 release_region(address + 4, 4); 1880 for (port--; port >= address; port--)
1881 release_region(address, 4); 1881 release_region(port, 1);
1882 return found; 1882 return found;
1883} 1883}
1884 1884
diff --git a/drivers/i2c/busses/i2c-ali1563.c b/drivers/i2c/busses/i2c-ali1563.c
index f70f46582c6c..4687af40dd50 100644
--- a/drivers/i2c/busses/i2c-ali1563.c
+++ b/drivers/i2c/busses/i2c-ali1563.c
@@ -87,9 +87,9 @@ static int ali1563_transaction(struct i2c_adapter * a, int size)
87 outb_p(inb_p(SMB_HST_CNTL2) | HST_CNTL2_START, SMB_HST_CNTL2); 87 outb_p(inb_p(SMB_HST_CNTL2) | HST_CNTL2_START, SMB_HST_CNTL2);
88 88
89 timeout = ALI1563_MAX_TIMEOUT; 89 timeout = ALI1563_MAX_TIMEOUT;
90 do 90 do {
91 msleep(1); 91 msleep(1);
92 while (((data = inb_p(SMB_HST_STS)) & HST_STS_BUSY) && --timeout); 92 } while (((data = inb_p(SMB_HST_STS)) & HST_STS_BUSY) && --timeout);
93 93
94 dev_dbg(&a->dev, "Transaction (post): STS=%02x, CNTL1=%02x, " 94 dev_dbg(&a->dev, "Transaction (post): STS=%02x, CNTL1=%02x, "
95 "CNTL2=%02x, CMD=%02x, ADD=%02x, DAT0=%02x, DAT1=%02x\n", 95 "CNTL2=%02x, CMD=%02x, ADD=%02x, DAT0=%02x, DAT1=%02x\n",
@@ -157,9 +157,9 @@ static int ali1563_block_start(struct i2c_adapter * a)
157 outb_p(inb_p(SMB_HST_CNTL2) | HST_CNTL2_START, SMB_HST_CNTL2); 157 outb_p(inb_p(SMB_HST_CNTL2) | HST_CNTL2_START, SMB_HST_CNTL2);
158 158
159 timeout = ALI1563_MAX_TIMEOUT; 159 timeout = ALI1563_MAX_TIMEOUT;
160 do 160 do {
161 msleep(1); 161 msleep(1);
162 while (!((data = inb_p(SMB_HST_STS)) & HST_STS_DONE) && --timeout); 162 } while (!((data = inb_p(SMB_HST_STS)) & HST_STS_DONE) && --timeout);
163 163
164 dev_dbg(&a->dev, "Block (post): STS=%02x, CNTL1=%02x, " 164 dev_dbg(&a->dev, "Block (post): STS=%02x, CNTL1=%02x, "
165 "CNTL2=%02x, CMD=%02x, ADD=%02x, DAT0=%02x, DAT1=%02x\n", 165 "CNTL2=%02x, CMD=%02x, ADD=%02x, DAT0=%02x, DAT1=%02x\n",
diff --git a/drivers/i2c/busses/i2c-bfin-twi.c b/drivers/i2c/busses/i2c-bfin-twi.c
index b309ac2c3d5c..fe3fb567317d 100644
--- a/drivers/i2c/busses/i2c-bfin-twi.c
+++ b/drivers/i2c/busses/i2c-bfin-twi.c
@@ -693,13 +693,13 @@ static int i2c_bfin_twi_probe(struct platform_device *pdev)
693 } 693 }
694 694
695 /* Set TWI internal clock as 10MHz */ 695 /* Set TWI internal clock as 10MHz */
696 write_CONTROL(iface, ((get_sclk() / 1024 / 1024 + 5) / 10) & 0x7F); 696 write_CONTROL(iface, ((get_sclk() / 1000 / 1000 + 5) / 10) & 0x7F);
697 697
698 /* 698 /*
699 * We will not end up with a CLKDIV=0 because no one will specify 699 * We will not end up with a CLKDIV=0 because no one will specify
700 * 20kHz SCL or less in Kconfig now. (5 * 1024 / 20 = 0x100) 700 * 20kHz SCL or less in Kconfig now. (5 * 1000 / 20 = 250)
701 */ 701 */
702 clkhilow = 5 * 1024 / CONFIG_I2C_BLACKFIN_TWI_CLK_KHZ; 702 clkhilow = ((10 * 1000 / CONFIG_I2C_BLACKFIN_TWI_CLK_KHZ) + 1) / 2;
703 703
704 /* Set Twi interface clock as specified */ 704 /* Set Twi interface clock as specified */
705 write_CLKDIV(iface, (clkhilow << 8) | clkhilow); 705 write_CLKDIV(iface, (clkhilow << 8) | clkhilow);
diff --git a/drivers/i2c/busses/i2c-imx.c b/drivers/i2c/busses/i2c-imx.c
index e3654d683e15..75bf820e7ccb 100644
--- a/drivers/i2c/busses/i2c-imx.c
+++ b/drivers/i2c/busses/i2c-imx.c
@@ -226,7 +226,6 @@ static void i2c_imx_stop(struct imx_i2c_struct *i2c_imx)
226 temp = readb(i2c_imx->base + IMX_I2C_I2CR); 226 temp = readb(i2c_imx->base + IMX_I2C_I2CR);
227 temp &= ~(I2CR_MSTA | I2CR_MTX); 227 temp &= ~(I2CR_MSTA | I2CR_MTX);
228 writeb(temp, i2c_imx->base + IMX_I2C_I2CR); 228 writeb(temp, i2c_imx->base + IMX_I2C_I2CR);
229 i2c_imx->stopped = 1;
230 } 229 }
231 if (cpu_is_mx1()) { 230 if (cpu_is_mx1()) {
232 /* 231 /*
@@ -236,8 +235,10 @@ static void i2c_imx_stop(struct imx_i2c_struct *i2c_imx)
236 udelay(i2c_imx->disable_delay); 235 udelay(i2c_imx->disable_delay);
237 } 236 }
238 237
239 if (!i2c_imx->stopped) 238 if (!i2c_imx->stopped) {
240 i2c_imx_bus_busy(i2c_imx, 0); 239 i2c_imx_bus_busy(i2c_imx, 0);
240 i2c_imx->stopped = 1;
241 }
241 242
242 /* Disable I2C controller */ 243 /* Disable I2C controller */
243 writeb(0, i2c_imx->base + IMX_I2C_I2CR); 244 writeb(0, i2c_imx->base + IMX_I2C_I2CR);
@@ -496,22 +497,23 @@ static int __init i2c_imx_probe(struct platform_device *pdev)
496 } 497 }
497 498
498 res_size = resource_size(res); 499 res_size = resource_size(res);
500
501 if (!request_mem_region(res->start, res_size, DRIVER_NAME)) {
502 ret = -EBUSY;
503 goto fail0;
504 }
505
499 base = ioremap(res->start, res_size); 506 base = ioremap(res->start, res_size);
500 if (!base) { 507 if (!base) {
501 dev_err(&pdev->dev, "ioremap failed\n"); 508 dev_err(&pdev->dev, "ioremap failed\n");
502 ret = -EIO; 509 ret = -EIO;
503 goto fail0; 510 goto fail1;
504 } 511 }
505 512
506 i2c_imx = kzalloc(sizeof(struct imx_i2c_struct), GFP_KERNEL); 513 i2c_imx = kzalloc(sizeof(struct imx_i2c_struct), GFP_KERNEL);
507 if (!i2c_imx) { 514 if (!i2c_imx) {
508 dev_err(&pdev->dev, "can't allocate interface\n"); 515 dev_err(&pdev->dev, "can't allocate interface\n");
509 ret = -ENOMEM; 516 ret = -ENOMEM;
510 goto fail1;
511 }
512
513 if (!request_mem_region(res->start, res_size, DRIVER_NAME)) {
514 ret = -EBUSY;
515 goto fail2; 517 goto fail2;
516 } 518 }
517 519
@@ -582,11 +584,11 @@ fail5:
582fail4: 584fail4:
583 clk_put(i2c_imx->clk); 585 clk_put(i2c_imx->clk);
584fail3: 586fail3:
585 release_mem_region(i2c_imx->res->start, resource_size(res));
586fail2:
587 kfree(i2c_imx); 587 kfree(i2c_imx);
588fail1: 588fail2:
589 iounmap(base); 589 iounmap(base);
590fail1:
591 release_mem_region(res->start, resource_size(res));
590fail0: 592fail0:
591 if (pdata && pdata->exit) 593 if (pdata && pdata->exit)
592 pdata->exit(&pdev->dev); 594 pdata->exit(&pdev->dev);
@@ -618,8 +620,8 @@ static int __exit i2c_imx_remove(struct platform_device *pdev)
618 620
619 clk_put(i2c_imx->clk); 621 clk_put(i2c_imx->clk);
620 622
621 release_mem_region(i2c_imx->res->start, resource_size(i2c_imx->res));
622 iounmap(i2c_imx->base); 623 iounmap(i2c_imx->base);
624 release_mem_region(i2c_imx->res->start, resource_size(i2c_imx->res));
623 kfree(i2c_imx); 625 kfree(i2c_imx);
624 return 0; 626 return 0;
625} 627}
diff --git a/drivers/i2c/busses/i2c-omap.c b/drivers/i2c/busses/i2c-omap.c
index 75bf3ad18099..0037e31076ba 100644
--- a/drivers/i2c/busses/i2c-omap.c
+++ b/drivers/i2c/busses/i2c-omap.c
@@ -247,7 +247,13 @@ static void omap_i2c_unidle(struct omap_i2c_dev *dev)
247 omap_i2c_write_reg(dev, OMAP_I2C_CON_REG, OMAP_I2C_CON_EN); 247 omap_i2c_write_reg(dev, OMAP_I2C_CON_REG, OMAP_I2C_CON_EN);
248 } 248 }
249 dev->idle = 0; 249 dev->idle = 0;
250 omap_i2c_write_reg(dev, OMAP_I2C_IE_REG, dev->iestate); 250
251 /*
252 * Don't write to this register if the IE state is 0 as it can
253 * cause deadlock.
254 */
255 if (dev->iestate)
256 omap_i2c_write_reg(dev, OMAP_I2C_IE_REG, dev->iestate);
251} 257}
252 258
253static void omap_i2c_idle(struct omap_i2c_dev *dev) 259static void omap_i2c_idle(struct omap_i2c_dev *dev)
@@ -280,6 +286,11 @@ static int omap_i2c_init(struct omap_i2c_dev *dev)
280 unsigned long internal_clk = 0; 286 unsigned long internal_clk = 0;
281 287
282 if (dev->rev >= OMAP_I2C_REV_2) { 288 if (dev->rev >= OMAP_I2C_REV_2) {
289 /* Disable I2C controller before soft reset */
290 omap_i2c_write_reg(dev, OMAP_I2C_CON_REG,
291 omap_i2c_read_reg(dev, OMAP_I2C_CON_REG) &
292 ~(OMAP_I2C_CON_EN));
293
283 omap_i2c_write_reg(dev, OMAP_I2C_SYSC_REG, SYSC_SOFTRESET_MASK); 294 omap_i2c_write_reg(dev, OMAP_I2C_SYSC_REG, SYSC_SOFTRESET_MASK);
284 /* For some reason we need to set the EN bit before the 295 /* For some reason we need to set the EN bit before the
285 * reset done bit gets set. */ 296 * reset done bit gets set. */
diff --git a/drivers/i2c/busses/i2c-pca-isa.c b/drivers/i2c/busses/i2c-pca-isa.c
index 0ed68e2ccd22..f7346a9bd95f 100644
--- a/drivers/i2c/busses/i2c-pca-isa.c
+++ b/drivers/i2c/busses/i2c-pca-isa.c
@@ -75,7 +75,7 @@ static int pca_isa_waitforcompletion(void *pd)
75 unsigned long timeout; 75 unsigned long timeout;
76 76
77 if (irq > -1) { 77 if (irq > -1) {
78 ret = wait_event_interruptible_timeout(pca_wait, 78 ret = wait_event_timeout(pca_wait,
79 pca_isa_readbyte(pd, I2C_PCA_CON) 79 pca_isa_readbyte(pd, I2C_PCA_CON)
80 & I2C_PCA_CON_SI, pca_isa_ops.timeout); 80 & I2C_PCA_CON_SI, pca_isa_ops.timeout);
81 } else { 81 } else {
@@ -96,7 +96,7 @@ static void pca_isa_resetchip(void *pd)
96} 96}
97 97
98static irqreturn_t pca_handler(int this_irq, void *dev_id) { 98static irqreturn_t pca_handler(int this_irq, void *dev_id) {
99 wake_up_interruptible(&pca_wait); 99 wake_up(&pca_wait);
100 return IRQ_HANDLED; 100 return IRQ_HANDLED;
101} 101}
102 102
diff --git a/drivers/i2c/busses/i2c-pca-platform.c b/drivers/i2c/busses/i2c-pca-platform.c
index c4df9d411cd5..5b2213df5ed0 100644
--- a/drivers/i2c/busses/i2c-pca-platform.c
+++ b/drivers/i2c/busses/i2c-pca-platform.c
@@ -84,7 +84,7 @@ static int i2c_pca_pf_waitforcompletion(void *pd)
84 unsigned long timeout; 84 unsigned long timeout;
85 85
86 if (i2c->irq) { 86 if (i2c->irq) {
87 ret = wait_event_interruptible_timeout(i2c->wait, 87 ret = wait_event_timeout(i2c->wait,
88 i2c->algo_data.read_byte(i2c, I2C_PCA_CON) 88 i2c->algo_data.read_byte(i2c, I2C_PCA_CON)
89 & I2C_PCA_CON_SI, i2c->adap.timeout); 89 & I2C_PCA_CON_SI, i2c->adap.timeout);
90 } else { 90 } else {
@@ -122,7 +122,7 @@ static irqreturn_t i2c_pca_pf_handler(int this_irq, void *dev_id)
122 if ((i2c->algo_data.read_byte(i2c, I2C_PCA_CON) & I2C_PCA_CON_SI) == 0) 122 if ((i2c->algo_data.read_byte(i2c, I2C_PCA_CON) & I2C_PCA_CON_SI) == 0)
123 return IRQ_NONE; 123 return IRQ_NONE;
124 124
125 wake_up_interruptible(&i2c->wait); 125 wake_up(&i2c->wait);
126 126
127 return IRQ_HANDLED; 127 return IRQ_HANDLED;
128} 128}
diff --git a/drivers/i2c/busses/i2c-piix4.c b/drivers/i2c/busses/i2c-piix4.c
index 1e245e9cad31..e56e4b6823ca 100644
--- a/drivers/i2c/busses/i2c-piix4.c
+++ b/drivers/i2c/busses/i2c-piix4.c
@@ -324,12 +324,12 @@ static int piix4_transaction(void)
324 else 324 else
325 msleep(1); 325 msleep(1);
326 326
327 while ((timeout++ < MAX_TIMEOUT) && 327 while ((++timeout < MAX_TIMEOUT) &&
328 ((temp = inb_p(SMBHSTSTS)) & 0x01)) 328 ((temp = inb_p(SMBHSTSTS)) & 0x01))
329 msleep(1); 329 msleep(1);
330 330
331 /* If the SMBus is still busy, we give up */ 331 /* If the SMBus is still busy, we give up */
332 if (timeout >= MAX_TIMEOUT) { 332 if (timeout == MAX_TIMEOUT) {
333 dev_err(&piix4_adapter.dev, "SMBus Timeout!\n"); 333 dev_err(&piix4_adapter.dev, "SMBus Timeout!\n");
334 result = -ETIMEDOUT; 334 result = -ETIMEDOUT;
335 } 335 }
diff --git a/drivers/i2c/busses/i2c-tiny-usb.c b/drivers/i2c/busses/i2c-tiny-usb.c
index b1c050ff311d..e29b6d5ba8ef 100644
--- a/drivers/i2c/busses/i2c-tiny-usb.c
+++ b/drivers/i2c/busses/i2c-tiny-usb.c
@@ -13,6 +13,7 @@
13#include <linux/kernel.h> 13#include <linux/kernel.h>
14#include <linux/errno.h> 14#include <linux/errno.h>
15#include <linux/module.h> 15#include <linux/module.h>
16#include <linux/types.h>
16 17
17/* include interfaces to usb layer */ 18/* include interfaces to usb layer */
18#include <linux/usb.h> 19#include <linux/usb.h>
@@ -31,8 +32,8 @@
31#define CMD_I2C_IO_END (1<<1) 32#define CMD_I2C_IO_END (1<<1)
32 33
33/* i2c bit delay, default is 10us -> 100kHz */ 34/* i2c bit delay, default is 10us -> 100kHz */
34static int delay = 10; 35static unsigned short delay = 10;
35module_param(delay, int, 0); 36module_param(delay, ushort, 0);
36MODULE_PARM_DESC(delay, "bit delay in microseconds, " 37MODULE_PARM_DESC(delay, "bit delay in microseconds, "
37 "e.g. 10 for 100kHz (default is 100kHz)"); 38 "e.g. 10 for 100kHz (default is 100kHz)");
38 39
@@ -109,7 +110,7 @@ static int usb_xfer(struct i2c_adapter *adapter, struct i2c_msg *msgs, int num)
109 110
110static u32 usb_func(struct i2c_adapter *adapter) 111static u32 usb_func(struct i2c_adapter *adapter)
111{ 112{
112 u32 func; 113 __le32 func;
113 114
114 /* get functionality from adapter */ 115 /* get functionality from adapter */
115 if (usb_read(adapter, CMD_GET_FUNC, 0, 0, &func, sizeof(func)) != 116 if (usb_read(adapter, CMD_GET_FUNC, 0, 0, &func, sizeof(func)) !=
@@ -118,7 +119,7 @@ static u32 usb_func(struct i2c_adapter *adapter)
118 return 0; 119 return 0;
119 } 120 }
120 121
121 return func; 122 return le32_to_cpu(func);
122} 123}
123 124
124/* This is the actual algorithm we define */ 125/* This is the actual algorithm we define */
@@ -216,8 +217,7 @@ static int i2c_tiny_usb_probe(struct usb_interface *interface,
216 "i2c-tiny-usb at bus %03d device %03d", 217 "i2c-tiny-usb at bus %03d device %03d",
217 dev->usb_dev->bus->busnum, dev->usb_dev->devnum); 218 dev->usb_dev->bus->busnum, dev->usb_dev->devnum);
218 219
219 if (usb_write(&dev->adapter, CMD_SET_DELAY, 220 if (usb_write(&dev->adapter, CMD_SET_DELAY, delay, 0, NULL, 0) != 0) {
220 cpu_to_le16(delay), 0, NULL, 0) != 0) {
221 dev_err(&dev->adapter.dev, 221 dev_err(&dev->adapter.dev,
222 "failure setting delay to %dus\n", delay); 222 "failure setting delay to %dus\n", delay);
223 retval = -EIO; 223 retval = -EIO;
diff --git a/drivers/i2c/busses/i2c-viapro.c b/drivers/i2c/busses/i2c-viapro.c
index e4b1543015af..a84a909e1234 100644
--- a/drivers/i2c/busses/i2c-viapro.c
+++ b/drivers/i2c/busses/i2c-viapro.c
@@ -165,10 +165,10 @@ static int vt596_transaction(u8 size)
165 do { 165 do {
166 msleep(1); 166 msleep(1);
167 temp = inb_p(SMBHSTSTS); 167 temp = inb_p(SMBHSTSTS);
168 } while ((temp & 0x01) && (timeout++ < MAX_TIMEOUT)); 168 } while ((temp & 0x01) && (++timeout < MAX_TIMEOUT));
169 169
170 /* If the SMBus is still busy, we give up */ 170 /* If the SMBus is still busy, we give up */
171 if (timeout >= MAX_TIMEOUT) { 171 if (timeout == MAX_TIMEOUT) {
172 result = -ETIMEDOUT; 172 result = -ETIMEDOUT;
173 dev_err(&vt596_adapter.dev, "SMBus timeout!\n"); 173 dev_err(&vt596_adapter.dev, "SMBus timeout!\n");
174 } 174 }
diff --git a/drivers/i2c/i2c-core.c b/drivers/i2c/i2c-core.c
index 0ac2f90ab840..10be7b5fbe97 100644
--- a/drivers/i2c/i2c-core.c
+++ b/drivers/i2c/i2c-core.c
@@ -248,7 +248,7 @@ static const struct attribute_group *i2c_dev_attr_groups[] = {
248 NULL 248 NULL
249}; 249};
250 250
251const static struct dev_pm_ops i2c_device_pm_ops = { 251static const struct dev_pm_ops i2c_device_pm_ops = {
252 .suspend = i2c_device_pm_suspend, 252 .suspend = i2c_device_pm_suspend,
253 .resume = i2c_device_pm_resume, 253 .resume = i2c_device_pm_resume,
254}; 254};
@@ -843,6 +843,9 @@ int i2c_del_adapter(struct i2c_adapter *adap)
843 adap->dev.parent); 843 adap->dev.parent);
844#endif 844#endif
845 845
846 /* device name is gone after device_unregister */
847 dev_dbg(&adap->dev, "adapter [%s] unregistered\n", adap->name);
848
846 /* clean up the sysfs representation */ 849 /* clean up the sysfs representation */
847 init_completion(&adap->dev_released); 850 init_completion(&adap->dev_released);
848 device_unregister(&adap->dev); 851 device_unregister(&adap->dev);
@@ -855,8 +858,6 @@ int i2c_del_adapter(struct i2c_adapter *adap)
855 idr_remove(&i2c_adapter_idr, adap->nr); 858 idr_remove(&i2c_adapter_idr, adap->nr);
856 mutex_unlock(&core_lock); 859 mutex_unlock(&core_lock);
857 860
858 dev_dbg(&adap->dev, "adapter [%s] unregistered\n", adap->name);
859
860 /* Clear the device structure in case this adapter is ever going to be 861 /* Clear the device structure in case this adapter is ever going to be
861 added again */ 862 added again */
862 memset(&adap->dev, 0, sizeof(adap->dev)); 863 memset(&adap->dev, 0, sizeof(adap->dev));
diff --git a/drivers/idle/i7300_idle.c b/drivers/idle/i7300_idle.c
index 1f20a042a4f5..dd253002cd50 100644
--- a/drivers/idle/i7300_idle.c
+++ b/drivers/idle/i7300_idle.c
@@ -81,7 +81,7 @@ static u8 i7300_idle_thrtctl_saved;
81static u8 i7300_idle_thrtlow_saved; 81static u8 i7300_idle_thrtlow_saved;
82static u32 i7300_idle_mc_saved; 82static u32 i7300_idle_mc_saved;
83 83
84static cpumask_t idle_cpumask; 84static cpumask_var_t idle_cpumask;
85static ktime_t start_ktime; 85static ktime_t start_ktime;
86static unsigned long avg_idle_us; 86static unsigned long avg_idle_us;
87 87
@@ -459,9 +459,9 @@ static int i7300_idle_notifier(struct notifier_block *nb, unsigned long val,
459 spin_lock_irqsave(&i7300_idle_lock, flags); 459 spin_lock_irqsave(&i7300_idle_lock, flags);
460 if (val == IDLE_START) { 460 if (val == IDLE_START) {
461 461
462 cpu_set(smp_processor_id(), idle_cpumask); 462 cpumask_set_cpu(smp_processor_id(), idle_cpumask);
463 463
464 if (cpus_weight(idle_cpumask) != num_online_cpus()) 464 if (cpumask_weight(idle_cpumask) != num_online_cpus())
465 goto end; 465 goto end;
466 466
467 now_ktime = ktime_get(); 467 now_ktime = ktime_get();
@@ -478,8 +478,8 @@ static int i7300_idle_notifier(struct notifier_block *nb, unsigned long val,
478 i7300_idle_ioat_start(); 478 i7300_idle_ioat_start();
479 479
480 } else if (val == IDLE_END) { 480 } else if (val == IDLE_END) {
481 cpu_clear(smp_processor_id(), idle_cpumask); 481 cpumask_clear_cpu(smp_processor_id(), idle_cpumask);
482 if (cpus_weight(idle_cpumask) == (num_online_cpus() - 1)) { 482 if (cpumask_weight(idle_cpumask) == (num_online_cpus() - 1)) {
483 /* First CPU coming out of idle */ 483 /* First CPU coming out of idle */
484 u64 idle_duration_us; 484 u64 idle_duration_us;
485 485
@@ -553,7 +553,6 @@ struct debugfs_file_info {
553static int __init i7300_idle_init(void) 553static int __init i7300_idle_init(void)
554{ 554{
555 spin_lock_init(&i7300_idle_lock); 555 spin_lock_init(&i7300_idle_lock);
556 cpus_clear(idle_cpumask);
557 total_us = 0; 556 total_us = 0;
558 557
559 if (i7300_idle_platform_probe(&fbd_dev, &ioat_dev, forceload)) 558 if (i7300_idle_platform_probe(&fbd_dev, &ioat_dev, forceload))
@@ -565,6 +564,9 @@ static int __init i7300_idle_init(void)
565 if (i7300_idle_ioat_init()) 564 if (i7300_idle_ioat_init())
566 return -ENODEV; 565 return -ENODEV;
567 566
567 if (!zalloc_cpumask_var(&idle_cpumask, GFP_KERNEL))
568 return -ENOMEM;
569
568 debugfs_dir = debugfs_create_dir("i7300_idle", NULL); 570 debugfs_dir = debugfs_create_dir("i7300_idle", NULL);
569 if (debugfs_dir) { 571 if (debugfs_dir) {
570 int i = 0; 572 int i = 0;
@@ -589,6 +591,7 @@ static int __init i7300_idle_init(void)
589static void __exit i7300_idle_exit(void) 591static void __exit i7300_idle_exit(void)
590{ 592{
591 idle_notifier_unregister(&i7300_idle_nb); 593 idle_notifier_unregister(&i7300_idle_nb);
594 free_cpumask_var(idle_cpumask);
592 595
593 if (debugfs_dir) { 596 if (debugfs_dir) {
594 int i = 0; 597 int i = 0;
diff --git a/drivers/ieee1394/Kconfig b/drivers/ieee1394/Kconfig
index f102fcc7e52a..e02096cf7d95 100644
--- a/drivers/ieee1394/Kconfig
+++ b/drivers/ieee1394/Kconfig
@@ -1,8 +1,3 @@
1menu "IEEE 1394 (FireWire) support"
2 depends on PCI || BROKEN
3
4source "drivers/firewire/Kconfig"
5
6config IEEE1394 1config IEEE1394
7 tristate "Legacy alternative FireWire driver stack" 2 tristate "Legacy alternative FireWire driver stack"
8 depends on PCI || BROKEN 3 depends on PCI || BROKEN
@@ -16,8 +11,13 @@ config IEEE1394
16 is the core support only, you will also need to select a driver for 11 is the core support only, you will also need to select a driver for
17 your IEEE 1394 adapter. 12 your IEEE 1394 adapter.
18 13
19 To compile this driver as a module, say M here: the 14 To compile this driver as a module, say M here: the module will be
20 module will be called ieee1394. 15 called ieee1394.
16
17 NOTE:
18 ieee1394 is superseded by the newer firewire-core driver. See
19 http://ieee1394.wiki.kernel.org/index.php/Juju_Migration for
20 further information on how to switch to the new FireWire drivers.
21 21
22config IEEE1394_OHCI1394 22config IEEE1394_OHCI1394
23 tristate "OHCI-1394 controllers" 23 tristate "OHCI-1394 controllers"
@@ -29,19 +29,23 @@ config IEEE1394_OHCI1394
29 use one of these chipsets. It should work with any OHCI-1394 29 use one of these chipsets. It should work with any OHCI-1394
30 compliant card, however. 30 compliant card, however.
31 31
32 To compile this driver as a module, say M here: the 32 To compile this driver as a module, say M here: the module will be
33 module will be called ohci1394. 33 called ohci1394.
34 34
35 NOTE: 35 NOTE:
36 ohci1394 is superseded by the newer firewire-ohci driver. See
37 http://ieee1394.wiki.kernel.org/index.php/Juju_Migration for
38 further information on how to switch to the new FireWire drivers.
39
36 If you want to install firewire-ohci and ohci1394 together, you 40 If you want to install firewire-ohci and ohci1394 together, you
37 should configure them only as modules and blacklist the driver(s) 41 should configure them only as modules and blacklist the driver(s)
38 which you don't want to have auto-loaded. Add either 42 which you don't want to have auto-loaded. Add either
39 43
40 blacklist firewire-ohci
41 or
42 blacklist ohci1394 44 blacklist ohci1394
43 blacklist video1394 45 blacklist video1394
44 blacklist dv1394 46 blacklist dv1394
47 or
48 blacklist firewire-ohci
45 49
46 to /etc/modprobe.conf or /etc/modprobe.d/* and update modprobe.conf 50 to /etc/modprobe.conf or /etc/modprobe.d/* and update modprobe.conf
47 depending on your distribution. 51 depending on your distribution.
@@ -58,8 +62,8 @@ config IEEE1394_PCILYNX
58 Instruments PCILynx chip. Note: this driver is written for revision 62 Instruments PCILynx chip. Note: this driver is written for revision
59 2 of this chip and may not work with revision 0. 63 2 of this chip and may not work with revision 0.
60 64
61 To compile this driver as a module, say M here: the 65 To compile this driver as a module, say M here: the module will be
62 module will be called pcilynx. 66 called pcilynx.
63 67
64 Only some old and now very rare PCI and CardBus cards and 68 Only some old and now very rare PCI and CardBus cards and
65 PowerMacs G3 B&W contain the PCILynx controller. Therefore 69 PowerMacs G3 B&W contain the PCILynx controller. Therefore
@@ -79,6 +83,14 @@ config IEEE1394_SBP2
79 You should also enable support for disks, CD-ROMs, etc. in the SCSI 83 You should also enable support for disks, CD-ROMs, etc. in the SCSI
80 configuration section. 84 configuration section.
81 85
86 To compile this driver as a module, say M here: the module will be
87 called sbp2.
88
89 NOTE:
90 sbp2 is superseded by the newer firewire-sbp2 driver. See
91 http://ieee1394.wiki.kernel.org/index.php/Juju_Migration for
92 further information on how to switch to the new FireWire drivers.
93
82config IEEE1394_SBP2_PHYS_DMA 94config IEEE1394_SBP2_PHYS_DMA
83 bool "Enable replacement for physical DMA in SBP2" 95 bool "Enable replacement for physical DMA in SBP2"
84 depends on IEEE1394_SBP2 && VIRT_TO_BUS && EXPERIMENTAL 96 depends on IEEE1394_SBP2 && VIRT_TO_BUS && EXPERIMENTAL
@@ -111,6 +123,11 @@ config IEEE1394_ETH1394
111 123
112 The module is called eth1394 although it does not emulate Ethernet. 124 The module is called eth1394 although it does not emulate Ethernet.
113 125
126 NOTE:
127 eth1394 is superseded by the newer firewire-net driver. See
128 http://ieee1394.wiki.kernel.org/index.php/Juju_Migration for
129 further information on how to switch to the new FireWire drivers.
130
114config IEEE1394_RAWIO 131config IEEE1394_RAWIO
115 tristate "raw1394 userspace interface" 132 tristate "raw1394 userspace interface"
116 depends on IEEE1394 133 depends on IEEE1394
@@ -123,6 +140,11 @@ config IEEE1394_RAWIO
123 To compile this driver as a module, say M here: the module will be 140 To compile this driver as a module, say M here: the module will be
124 called raw1394. 141 called raw1394.
125 142
143 NOTE:
144 raw1394 is superseded by the newer firewire-core driver. See
145 http://ieee1394.wiki.kernel.org/index.php/Juju_Migration for
146 further information on how to switch to the new FireWire drivers.
147
126config IEEE1394_VIDEO1394 148config IEEE1394_VIDEO1394
127 tristate "video1394 userspace interface" 149 tristate "video1394 userspace interface"
128 depends on IEEE1394 && IEEE1394_OHCI1394 150 depends on IEEE1394 && IEEE1394_OHCI1394
@@ -136,13 +158,18 @@ config IEEE1394_VIDEO1394
136 To compile this driver as a module, say M here: the module will be 158 To compile this driver as a module, say M here: the module will be
137 called video1394. 159 called video1394.
138 160
161 NOTE:
162 video1394 is superseded by the newer firewire-core driver. See
163 http://ieee1394.wiki.kernel.org/index.php/Juju_Migration for
164 further information on how to switch to the new FireWire drivers.
165
139config IEEE1394_DV1394 166config IEEE1394_DV1394
140 tristate "dv1394 userspace interface (deprecated)" 167 tristate "dv1394 userspace interface (deprecated)"
141 depends on IEEE1394 && IEEE1394_OHCI1394 168 depends on IEEE1394 && IEEE1394_OHCI1394
142 help 169 help
143 The dv1394 driver is unsupported and may be removed from Linux in a 170 The dv1394 driver is unsupported and may be removed from Linux in a
144 future release. Its functionality is now provided by raw1394 together 171 future release. Its functionality is now provided by either
145 with libraries such as libiec61883. 172 raw1394 or firewire-core together with libraries such as libiec61883.
146 173
147config IEEE1394_VERBOSEDEBUG 174config IEEE1394_VERBOSEDEBUG
148 bool "Excessive debugging output" 175 bool "Excessive debugging output"
@@ -153,5 +180,3 @@ config IEEE1394_VERBOSEDEBUG
153 will quickly result in large amounts of data sent to the system log. 180 will quickly result in large amounts of data sent to the system log.
154 181
155 Say Y if you really need the debugging output. Everyone else says N. 182 Say Y if you really need the debugging output. Everyone else says N.
156
157endmenu
diff --git a/drivers/infiniband/core/addr.c b/drivers/infiniband/core/addr.c
index bd07803e9183..abbb06996f9e 100644
--- a/drivers/infiniband/core/addr.c
+++ b/drivers/infiniband/core/addr.c
@@ -36,7 +36,6 @@
36#include <linux/mutex.h> 36#include <linux/mutex.h>
37#include <linux/inetdevice.h> 37#include <linux/inetdevice.h>
38#include <linux/workqueue.h> 38#include <linux/workqueue.h>
39#include <linux/if_arp.h>
40#include <net/arp.h> 39#include <net/arp.h>
41#include <net/neighbour.h> 40#include <net/neighbour.h>
42#include <net/route.h> 41#include <net/route.h>
@@ -92,22 +91,12 @@ EXPORT_SYMBOL(rdma_addr_unregister_client);
92int rdma_copy_addr(struct rdma_dev_addr *dev_addr, struct net_device *dev, 91int rdma_copy_addr(struct rdma_dev_addr *dev_addr, struct net_device *dev,
93 const unsigned char *dst_dev_addr) 92 const unsigned char *dst_dev_addr)
94{ 93{
95 switch (dev->type) { 94 dev_addr->dev_type = dev->type;
96 case ARPHRD_INFINIBAND:
97 dev_addr->dev_type = RDMA_NODE_IB_CA;
98 break;
99 case ARPHRD_ETHER:
100 dev_addr->dev_type = RDMA_NODE_RNIC;
101 break;
102 default:
103 return -EADDRNOTAVAIL;
104 }
105
106 memcpy(dev_addr->src_dev_addr, dev->dev_addr, MAX_ADDR_LEN); 95 memcpy(dev_addr->src_dev_addr, dev->dev_addr, MAX_ADDR_LEN);
107 memcpy(dev_addr->broadcast, dev->broadcast, MAX_ADDR_LEN); 96 memcpy(dev_addr->broadcast, dev->broadcast, MAX_ADDR_LEN);
108 if (dst_dev_addr) 97 if (dst_dev_addr)
109 memcpy(dev_addr->dst_dev_addr, dst_dev_addr, MAX_ADDR_LEN); 98 memcpy(dev_addr->dst_dev_addr, dst_dev_addr, MAX_ADDR_LEN);
110 dev_addr->src_dev = dev; 99 dev_addr->bound_dev_if = dev->ifindex;
111 return 0; 100 return 0;
112} 101}
113EXPORT_SYMBOL(rdma_copy_addr); 102EXPORT_SYMBOL(rdma_copy_addr);
@@ -117,6 +106,15 @@ int rdma_translate_ip(struct sockaddr *addr, struct rdma_dev_addr *dev_addr)
117 struct net_device *dev; 106 struct net_device *dev;
118 int ret = -EADDRNOTAVAIL; 107 int ret = -EADDRNOTAVAIL;
119 108
109 if (dev_addr->bound_dev_if) {
110 dev = dev_get_by_index(&init_net, dev_addr->bound_dev_if);
111 if (!dev)
112 return -ENODEV;
113 ret = rdma_copy_addr(dev_addr, dev, NULL);
114 dev_put(dev);
115 return ret;
116 }
117
120 switch (addr->sa_family) { 118 switch (addr->sa_family) {
121 case AF_INET: 119 case AF_INET:
122 dev = ip_dev_find(&init_net, 120 dev = ip_dev_find(&init_net,
@@ -131,6 +129,7 @@ int rdma_translate_ip(struct sockaddr *addr, struct rdma_dev_addr *dev_addr)
131 129
132#if defined(CONFIG_IPV6) || defined(CONFIG_IPV6_MODULE) 130#if defined(CONFIG_IPV6) || defined(CONFIG_IPV6_MODULE)
133 case AF_INET6: 131 case AF_INET6:
132 read_lock(&dev_base_lock);
134 for_each_netdev(&init_net, dev) { 133 for_each_netdev(&init_net, dev) {
135 if (ipv6_chk_addr(&init_net, 134 if (ipv6_chk_addr(&init_net,
136 &((struct sockaddr_in6 *) addr)->sin6_addr, 135 &((struct sockaddr_in6 *) addr)->sin6_addr,
@@ -139,6 +138,7 @@ int rdma_translate_ip(struct sockaddr *addr, struct rdma_dev_addr *dev_addr)
139 break; 138 break;
140 } 139 }
141 } 140 }
141 read_unlock(&dev_base_lock);
142 break; 142 break;
143#endif 143#endif
144 } 144 }
@@ -176,48 +176,9 @@ static void queue_req(struct addr_req *req)
176 mutex_unlock(&lock); 176 mutex_unlock(&lock);
177} 177}
178 178
179static void addr_send_arp(struct sockaddr *dst_in) 179static int addr4_resolve(struct sockaddr_in *src_in,
180{ 180 struct sockaddr_in *dst_in,
181 struct rtable *rt; 181 struct rdma_dev_addr *addr)
182 struct flowi fl;
183
184 memset(&fl, 0, sizeof fl);
185
186 switch (dst_in->sa_family) {
187 case AF_INET:
188 fl.nl_u.ip4_u.daddr =
189 ((struct sockaddr_in *) dst_in)->sin_addr.s_addr;
190
191 if (ip_route_output_key(&init_net, &rt, &fl))
192 return;
193
194 neigh_event_send(rt->u.dst.neighbour, NULL);
195 ip_rt_put(rt);
196 break;
197
198#if defined(CONFIG_IPV6) || defined(CONFIG_IPV6_MODULE)
199 case AF_INET6:
200 {
201 struct dst_entry *dst;
202
203 fl.nl_u.ip6_u.daddr =
204 ((struct sockaddr_in6 *) dst_in)->sin6_addr;
205
206 dst = ip6_route_output(&init_net, NULL, &fl);
207 if (!dst)
208 return;
209
210 neigh_event_send(dst->neighbour, NULL);
211 dst_release(dst);
212 break;
213 }
214#endif
215 }
216}
217
218static int addr4_resolve_remote(struct sockaddr_in *src_in,
219 struct sockaddr_in *dst_in,
220 struct rdma_dev_addr *addr)
221{ 182{
222 __be32 src_ip = src_in->sin_addr.s_addr; 183 __be32 src_ip = src_in->sin_addr.s_addr;
223 __be32 dst_ip = dst_in->sin_addr.s_addr; 184 __be32 dst_ip = dst_in->sin_addr.s_addr;
@@ -229,10 +190,22 @@ static int addr4_resolve_remote(struct sockaddr_in *src_in,
229 memset(&fl, 0, sizeof fl); 190 memset(&fl, 0, sizeof fl);
230 fl.nl_u.ip4_u.daddr = dst_ip; 191 fl.nl_u.ip4_u.daddr = dst_ip;
231 fl.nl_u.ip4_u.saddr = src_ip; 192 fl.nl_u.ip4_u.saddr = src_ip;
193 fl.oif = addr->bound_dev_if;
194
232 ret = ip_route_output_key(&init_net, &rt, &fl); 195 ret = ip_route_output_key(&init_net, &rt, &fl);
233 if (ret) 196 if (ret)
234 goto out; 197 goto out;
235 198
199 src_in->sin_family = AF_INET;
200 src_in->sin_addr.s_addr = rt->rt_src;
201
202 if (rt->idev->dev->flags & IFF_LOOPBACK) {
203 ret = rdma_translate_ip((struct sockaddr *) dst_in, addr);
204 if (!ret)
205 memcpy(addr->dst_dev_addr, addr->src_dev_addr, MAX_ADDR_LEN);
206 goto put;
207 }
208
236 /* If the device does ARP internally, return 'done' */ 209 /* If the device does ARP internally, return 'done' */
237 if (rt->idev->dev->flags & IFF_NOARP) { 210 if (rt->idev->dev->flags & IFF_NOARP) {
238 rdma_copy_addr(addr, rt->idev->dev, NULL); 211 rdma_copy_addr(addr, rt->idev->dev, NULL);
@@ -240,21 +213,14 @@ static int addr4_resolve_remote(struct sockaddr_in *src_in,
240 } 213 }
241 214
242 neigh = neigh_lookup(&arp_tbl, &rt->rt_gateway, rt->idev->dev); 215 neigh = neigh_lookup(&arp_tbl, &rt->rt_gateway, rt->idev->dev);
243 if (!neigh) { 216 if (!neigh || !(neigh->nud_state & NUD_VALID)) {
217 neigh_event_send(rt->u.dst.neighbour, NULL);
244 ret = -ENODATA; 218 ret = -ENODATA;
219 if (neigh)
220 goto release;
245 goto put; 221 goto put;
246 } 222 }
247 223
248 if (!(neigh->nud_state & NUD_VALID)) {
249 ret = -ENODATA;
250 goto release;
251 }
252
253 if (!src_ip) {
254 src_in->sin_family = dst_in->sin_family;
255 src_in->sin_addr.s_addr = rt->rt_src;
256 }
257
258 ret = rdma_copy_addr(addr, neigh->dev, neigh->ha); 224 ret = rdma_copy_addr(addr, neigh->dev, neigh->ha);
259release: 225release:
260 neigh_release(neigh); 226 neigh_release(neigh);
@@ -265,52 +231,77 @@ out:
265} 231}
266 232
267#if defined(CONFIG_IPV6) || defined(CONFIG_IPV6_MODULE) 233#if defined(CONFIG_IPV6) || defined(CONFIG_IPV6_MODULE)
268static int addr6_resolve_remote(struct sockaddr_in6 *src_in, 234static int addr6_resolve(struct sockaddr_in6 *src_in,
269 struct sockaddr_in6 *dst_in, 235 struct sockaddr_in6 *dst_in,
270 struct rdma_dev_addr *addr) 236 struct rdma_dev_addr *addr)
271{ 237{
272 struct flowi fl; 238 struct flowi fl;
273 struct neighbour *neigh; 239 struct neighbour *neigh;
274 struct dst_entry *dst; 240 struct dst_entry *dst;
275 int ret = -ENODATA; 241 int ret;
276 242
277 memset(&fl, 0, sizeof fl); 243 memset(&fl, 0, sizeof fl);
278 fl.nl_u.ip6_u.daddr = dst_in->sin6_addr; 244 ipv6_addr_copy(&fl.fl6_dst, &dst_in->sin6_addr);
279 fl.nl_u.ip6_u.saddr = src_in->sin6_addr; 245 ipv6_addr_copy(&fl.fl6_src, &src_in->sin6_addr);
246 fl.oif = addr->bound_dev_if;
280 247
281 dst = ip6_route_output(&init_net, NULL, &fl); 248 dst = ip6_route_output(&init_net, NULL, &fl);
282 if (!dst) 249 if ((ret = dst->error))
283 return ret; 250 goto put;
251
252 if (ipv6_addr_any(&fl.fl6_src)) {
253 ret = ipv6_dev_get_saddr(&init_net, ip6_dst_idev(dst)->dev,
254 &fl.fl6_dst, 0, &fl.fl6_src);
255 if (ret)
256 goto put;
257
258 src_in->sin6_family = AF_INET6;
259 ipv6_addr_copy(&src_in->sin6_addr, &fl.fl6_src);
260 }
261
262 if (dst->dev->flags & IFF_LOOPBACK) {
263 ret = rdma_translate_ip((struct sockaddr *) dst_in, addr);
264 if (!ret)
265 memcpy(addr->dst_dev_addr, addr->src_dev_addr, MAX_ADDR_LEN);
266 goto put;
267 }
284 268
269 /* If the device does ARP internally, return 'done' */
285 if (dst->dev->flags & IFF_NOARP) { 270 if (dst->dev->flags & IFF_NOARP) {
286 ret = rdma_copy_addr(addr, dst->dev, NULL); 271 ret = rdma_copy_addr(addr, dst->dev, NULL);
287 } else { 272 goto put;
288 neigh = dst->neighbour; 273 }
289 if (neigh && (neigh->nud_state & NUD_VALID)) 274
290 ret = rdma_copy_addr(addr, neigh->dev, neigh->ha); 275 neigh = dst->neighbour;
276 if (!neigh || !(neigh->nud_state & NUD_VALID)) {
277 neigh_event_send(dst->neighbour, NULL);
278 ret = -ENODATA;
279 goto put;
291 } 280 }
292 281
282 ret = rdma_copy_addr(addr, dst->dev, neigh->ha);
283put:
293 dst_release(dst); 284 dst_release(dst);
294 return ret; 285 return ret;
295} 286}
296#else 287#else
297static int addr6_resolve_remote(struct sockaddr_in6 *src_in, 288static int addr6_resolve(struct sockaddr_in6 *src_in,
298 struct sockaddr_in6 *dst_in, 289 struct sockaddr_in6 *dst_in,
299 struct rdma_dev_addr *addr) 290 struct rdma_dev_addr *addr)
300{ 291{
301 return -EADDRNOTAVAIL; 292 return -EADDRNOTAVAIL;
302} 293}
303#endif 294#endif
304 295
305static int addr_resolve_remote(struct sockaddr *src_in, 296static int addr_resolve(struct sockaddr *src_in,
306 struct sockaddr *dst_in, 297 struct sockaddr *dst_in,
307 struct rdma_dev_addr *addr) 298 struct rdma_dev_addr *addr)
308{ 299{
309 if (src_in->sa_family == AF_INET) { 300 if (src_in->sa_family == AF_INET) {
310 return addr4_resolve_remote((struct sockaddr_in *) src_in, 301 return addr4_resolve((struct sockaddr_in *) src_in,
311 (struct sockaddr_in *) dst_in, addr); 302 (struct sockaddr_in *) dst_in, addr);
312 } else 303 } else
313 return addr6_resolve_remote((struct sockaddr_in6 *) src_in, 304 return addr6_resolve((struct sockaddr_in6 *) src_in,
314 (struct sockaddr_in6 *) dst_in, addr); 305 (struct sockaddr_in6 *) dst_in, addr);
315} 306}
316 307
@@ -327,8 +318,7 @@ static void process_req(struct work_struct *work)
327 if (req->status == -ENODATA) { 318 if (req->status == -ENODATA) {
328 src_in = (struct sockaddr *) &req->src_addr; 319 src_in = (struct sockaddr *) &req->src_addr;
329 dst_in = (struct sockaddr *) &req->dst_addr; 320 dst_in = (struct sockaddr *) &req->dst_addr;
330 req->status = addr_resolve_remote(src_in, dst_in, 321 req->status = addr_resolve(src_in, dst_in, req->addr);
331 req->addr);
332 if (req->status && time_after_eq(jiffies, req->timeout)) 322 if (req->status && time_after_eq(jiffies, req->timeout))
333 req->status = -ETIMEDOUT; 323 req->status = -ETIMEDOUT;
334 else if (req->status == -ENODATA) 324 else if (req->status == -ENODATA)
@@ -352,82 +342,6 @@ static void process_req(struct work_struct *work)
352 } 342 }
353} 343}
354 344
355static int addr_resolve_local(struct sockaddr *src_in,
356 struct sockaddr *dst_in,
357 struct rdma_dev_addr *addr)
358{
359 struct net_device *dev;
360 int ret;
361
362 switch (dst_in->sa_family) {
363 case AF_INET:
364 {
365 __be32 src_ip = ((struct sockaddr_in *) src_in)->sin_addr.s_addr;
366 __be32 dst_ip = ((struct sockaddr_in *) dst_in)->sin_addr.s_addr;
367
368 dev = ip_dev_find(&init_net, dst_ip);
369 if (!dev)
370 return -EADDRNOTAVAIL;
371
372 if (ipv4_is_zeronet(src_ip)) {
373 src_in->sa_family = dst_in->sa_family;
374 ((struct sockaddr_in *) src_in)->sin_addr.s_addr = dst_ip;
375 ret = rdma_copy_addr(addr, dev, dev->dev_addr);
376 } else if (ipv4_is_loopback(src_ip)) {
377 ret = rdma_translate_ip(dst_in, addr);
378 if (!ret)
379 memcpy(addr->dst_dev_addr, dev->dev_addr, MAX_ADDR_LEN);
380 } else {
381 ret = rdma_translate_ip(src_in, addr);
382 if (!ret)
383 memcpy(addr->dst_dev_addr, dev->dev_addr, MAX_ADDR_LEN);
384 }
385 dev_put(dev);
386 break;
387 }
388
389#if defined(CONFIG_IPV6) || defined(CONFIG_IPV6_MODULE)
390 case AF_INET6:
391 {
392 struct in6_addr *a;
393
394 for_each_netdev(&init_net, dev)
395 if (ipv6_chk_addr(&init_net,
396 &((struct sockaddr_in6 *) dst_in)->sin6_addr,
397 dev, 1))
398 break;
399
400 if (!dev)
401 return -EADDRNOTAVAIL;
402
403 a = &((struct sockaddr_in6 *) src_in)->sin6_addr;
404
405 if (ipv6_addr_any(a)) {
406 src_in->sa_family = dst_in->sa_family;
407 ((struct sockaddr_in6 *) src_in)->sin6_addr =
408 ((struct sockaddr_in6 *) dst_in)->sin6_addr;
409 ret = rdma_copy_addr(addr, dev, dev->dev_addr);
410 } else if (ipv6_addr_loopback(a)) {
411 ret = rdma_translate_ip(dst_in, addr);
412 if (!ret)
413 memcpy(addr->dst_dev_addr, dev->dev_addr, MAX_ADDR_LEN);
414 } else {
415 ret = rdma_translate_ip(src_in, addr);
416 if (!ret)
417 memcpy(addr->dst_dev_addr, dev->dev_addr, MAX_ADDR_LEN);
418 }
419 break;
420 }
421#endif
422
423 default:
424 ret = -EADDRNOTAVAIL;
425 break;
426 }
427
428 return ret;
429}
430
431int rdma_resolve_ip(struct rdma_addr_client *client, 345int rdma_resolve_ip(struct rdma_addr_client *client,
432 struct sockaddr *src_addr, struct sockaddr *dst_addr, 346 struct sockaddr *src_addr, struct sockaddr *dst_addr,
433 struct rdma_dev_addr *addr, int timeout_ms, 347 struct rdma_dev_addr *addr, int timeout_ms,
@@ -443,22 +357,28 @@ int rdma_resolve_ip(struct rdma_addr_client *client,
443 if (!req) 357 if (!req)
444 return -ENOMEM; 358 return -ENOMEM;
445 359
446 if (src_addr) 360 src_in = (struct sockaddr *) &req->src_addr;
447 memcpy(&req->src_addr, src_addr, ip_addr_size(src_addr)); 361 dst_in = (struct sockaddr *) &req->dst_addr;
448 memcpy(&req->dst_addr, dst_addr, ip_addr_size(dst_addr)); 362
363 if (src_addr) {
364 if (src_addr->sa_family != dst_addr->sa_family) {
365 ret = -EINVAL;
366 goto err;
367 }
368
369 memcpy(src_in, src_addr, ip_addr_size(src_addr));
370 } else {
371 src_in->sa_family = dst_addr->sa_family;
372 }
373
374 memcpy(dst_in, dst_addr, ip_addr_size(dst_addr));
449 req->addr = addr; 375 req->addr = addr;
450 req->callback = callback; 376 req->callback = callback;
451 req->context = context; 377 req->context = context;
452 req->client = client; 378 req->client = client;
453 atomic_inc(&client->refcount); 379 atomic_inc(&client->refcount);
454 380
455 src_in = (struct sockaddr *) &req->src_addr; 381 req->status = addr_resolve(src_in, dst_in, addr);
456 dst_in = (struct sockaddr *) &req->dst_addr;
457
458 req->status = addr_resolve_local(src_in, dst_in, addr);
459 if (req->status == -EADDRNOTAVAIL)
460 req->status = addr_resolve_remote(src_in, dst_in, addr);
461
462 switch (req->status) { 382 switch (req->status) {
463 case 0: 383 case 0:
464 req->timeout = jiffies; 384 req->timeout = jiffies;
@@ -467,15 +387,16 @@ int rdma_resolve_ip(struct rdma_addr_client *client,
467 case -ENODATA: 387 case -ENODATA:
468 req->timeout = msecs_to_jiffies(timeout_ms) + jiffies; 388 req->timeout = msecs_to_jiffies(timeout_ms) + jiffies;
469 queue_req(req); 389 queue_req(req);
470 addr_send_arp(dst_in);
471 break; 390 break;
472 default: 391 default:
473 ret = req->status; 392 ret = req->status;
474 atomic_dec(&client->refcount); 393 atomic_dec(&client->refcount);
475 kfree(req); 394 goto err;
476 break;
477 } 395 }
478 return ret; 396 return ret;
397err:
398 kfree(req);
399 return ret;
479} 400}
480EXPORT_SYMBOL(rdma_resolve_ip); 401EXPORT_SYMBOL(rdma_resolve_ip);
481 402
diff --git a/drivers/infiniband/core/cma.c b/drivers/infiniband/core/cma.c
index 075317884b53..875e34e0b235 100644
--- a/drivers/infiniband/core/cma.c
+++ b/drivers/infiniband/core/cma.c
@@ -330,17 +330,7 @@ static int cma_acquire_dev(struct rdma_id_private *id_priv)
330 union ib_gid gid; 330 union ib_gid gid;
331 int ret = -ENODEV; 331 int ret = -ENODEV;
332 332
333 switch (rdma_node_get_transport(dev_addr->dev_type)) { 333 rdma_addr_get_sgid(dev_addr, &gid);
334 case RDMA_TRANSPORT_IB:
335 ib_addr_get_sgid(dev_addr, &gid);
336 break;
337 case RDMA_TRANSPORT_IWARP:
338 iw_addr_get_sgid(dev_addr, &gid);
339 break;
340 default:
341 return -ENODEV;
342 }
343
344 list_for_each_entry(cma_dev, &dev_list, list) { 334 list_for_each_entry(cma_dev, &dev_list, list) {
345 ret = ib_find_cached_gid(cma_dev->device, &gid, 335 ret = ib_find_cached_gid(cma_dev->device, &gid,
346 &id_priv->id.port_num, NULL); 336 &id_priv->id.port_num, NULL);
@@ -1032,11 +1022,17 @@ static struct rdma_id_private *cma_new_conn_id(struct rdma_cm_id *listen_id,
1032 if (rt->num_paths == 2) 1022 if (rt->num_paths == 2)
1033 rt->path_rec[1] = *ib_event->param.req_rcvd.alternate_path; 1023 rt->path_rec[1] = *ib_event->param.req_rcvd.alternate_path;
1034 1024
1035 ib_addr_set_dgid(&rt->addr.dev_addr, &rt->path_rec[0].dgid); 1025 if (cma_any_addr((struct sockaddr *) &rt->addr.src_addr)) {
1036 ret = rdma_translate_ip((struct sockaddr *) &id->route.addr.src_addr, 1026 rt->addr.dev_addr.dev_type = ARPHRD_INFINIBAND;
1037 &id->route.addr.dev_addr); 1027 rdma_addr_set_sgid(&rt->addr.dev_addr, &rt->path_rec[0].sgid);
1038 if (ret) 1028 ib_addr_set_pkey(&rt->addr.dev_addr, rt->path_rec[0].pkey);
1039 goto destroy_id; 1029 } else {
1030 ret = rdma_translate_ip((struct sockaddr *) &rt->addr.src_addr,
1031 &rt->addr.dev_addr);
1032 if (ret)
1033 goto destroy_id;
1034 }
1035 rdma_addr_set_dgid(&rt->addr.dev_addr, &rt->path_rec[0].dgid);
1040 1036
1041 id_priv = container_of(id, struct rdma_id_private, id); 1037 id_priv = container_of(id, struct rdma_id_private, id);
1042 id_priv->state = CMA_CONNECT; 1038 id_priv->state = CMA_CONNECT;
@@ -1071,10 +1067,12 @@ static struct rdma_id_private *cma_new_udp_id(struct rdma_cm_id *listen_id,
1071 cma_save_net_info(&id->route.addr, &listen_id->route.addr, 1067 cma_save_net_info(&id->route.addr, &listen_id->route.addr,
1072 ip_ver, port, src, dst); 1068 ip_ver, port, src, dst);
1073 1069
1074 ret = rdma_translate_ip((struct sockaddr *) &id->route.addr.src_addr, 1070 if (!cma_any_addr((struct sockaddr *) &id->route.addr.src_addr)) {
1075 &id->route.addr.dev_addr); 1071 ret = rdma_translate_ip((struct sockaddr *) &id->route.addr.src_addr,
1076 if (ret) 1072 &id->route.addr.dev_addr);
1077 goto err; 1073 if (ret)
1074 goto err;
1075 }
1078 1076
1079 id_priv = container_of(id, struct rdma_id_private, id); 1077 id_priv = container_of(id, struct rdma_id_private, id);
1080 id_priv->state = CMA_CONNECT; 1078 id_priv->state = CMA_CONNECT;
@@ -1474,15 +1472,6 @@ static void cma_listen_on_all(struct rdma_id_private *id_priv)
1474 mutex_unlock(&lock); 1472 mutex_unlock(&lock);
1475} 1473}
1476 1474
1477static int cma_bind_any(struct rdma_cm_id *id, sa_family_t af)
1478{
1479 struct sockaddr_storage addr_in;
1480
1481 memset(&addr_in, 0, sizeof addr_in);
1482 addr_in.ss_family = af;
1483 return rdma_bind_addr(id, (struct sockaddr *) &addr_in);
1484}
1485
1486int rdma_listen(struct rdma_cm_id *id, int backlog) 1475int rdma_listen(struct rdma_cm_id *id, int backlog)
1487{ 1476{
1488 struct rdma_id_private *id_priv; 1477 struct rdma_id_private *id_priv;
@@ -1490,7 +1479,8 @@ int rdma_listen(struct rdma_cm_id *id, int backlog)
1490 1479
1491 id_priv = container_of(id, struct rdma_id_private, id); 1480 id_priv = container_of(id, struct rdma_id_private, id);
1492 if (id_priv->state == CMA_IDLE) { 1481 if (id_priv->state == CMA_IDLE) {
1493 ret = cma_bind_any(id, AF_INET); 1482 ((struct sockaddr *) &id->route.addr.src_addr)->sa_family = AF_INET;
1483 ret = rdma_bind_addr(id, (struct sockaddr *) &id->route.addr.src_addr);
1494 if (ret) 1484 if (ret)
1495 return ret; 1485 return ret;
1496 } 1486 }
@@ -1565,8 +1555,8 @@ static int cma_query_ib_route(struct rdma_id_private *id_priv, int timeout_ms,
1565 struct sockaddr_in6 *sin6; 1555 struct sockaddr_in6 *sin6;
1566 1556
1567 memset(&path_rec, 0, sizeof path_rec); 1557 memset(&path_rec, 0, sizeof path_rec);
1568 ib_addr_get_sgid(&addr->dev_addr, &path_rec.sgid); 1558 rdma_addr_get_sgid(&addr->dev_addr, &path_rec.sgid);
1569 ib_addr_get_dgid(&addr->dev_addr, &path_rec.dgid); 1559 rdma_addr_get_dgid(&addr->dev_addr, &path_rec.dgid);
1570 path_rec.pkey = cpu_to_be16(ib_addr_get_pkey(&addr->dev_addr)); 1560 path_rec.pkey = cpu_to_be16(ib_addr_get_pkey(&addr->dev_addr));
1571 path_rec.numb_path = 1; 1561 path_rec.numb_path = 1;
1572 path_rec.reversible = 1; 1562 path_rec.reversible = 1;
@@ -1781,7 +1771,11 @@ port_found:
1781 if (ret) 1771 if (ret)
1782 goto out; 1772 goto out;
1783 1773
1784 ib_addr_set_sgid(&id_priv->id.route.addr.dev_addr, &gid); 1774 id_priv->id.route.addr.dev_addr.dev_type =
1775 (rdma_node_get_transport(cma_dev->device->node_type) == RDMA_TRANSPORT_IB) ?
1776 ARPHRD_INFINIBAND : ARPHRD_ETHER;
1777
1778 rdma_addr_set_sgid(&id_priv->id.route.addr.dev_addr, &gid);
1785 ib_addr_set_pkey(&id_priv->id.route.addr.dev_addr, pkey); 1779 ib_addr_set_pkey(&id_priv->id.route.addr.dev_addr, pkey);
1786 id_priv->id.port_num = p; 1780 id_priv->id.port_num = p;
1787 cma_attach_to_dev(id_priv, cma_dev); 1781 cma_attach_to_dev(id_priv, cma_dev);
@@ -1839,7 +1833,7 @@ out:
1839static int cma_resolve_loopback(struct rdma_id_private *id_priv) 1833static int cma_resolve_loopback(struct rdma_id_private *id_priv)
1840{ 1834{
1841 struct cma_work *work; 1835 struct cma_work *work;
1842 struct sockaddr_in *src_in, *dst_in; 1836 struct sockaddr *src, *dst;
1843 union ib_gid gid; 1837 union ib_gid gid;
1844 int ret; 1838 int ret;
1845 1839
@@ -1853,14 +1847,19 @@ static int cma_resolve_loopback(struct rdma_id_private *id_priv)
1853 goto err; 1847 goto err;
1854 } 1848 }
1855 1849
1856 ib_addr_get_sgid(&id_priv->id.route.addr.dev_addr, &gid); 1850 rdma_addr_get_sgid(&id_priv->id.route.addr.dev_addr, &gid);
1857 ib_addr_set_dgid(&id_priv->id.route.addr.dev_addr, &gid); 1851 rdma_addr_set_dgid(&id_priv->id.route.addr.dev_addr, &gid);
1858 1852
1859 if (cma_zero_addr((struct sockaddr *) &id_priv->id.route.addr.src_addr)) { 1853 src = (struct sockaddr *) &id_priv->id.route.addr.src_addr;
1860 src_in = (struct sockaddr_in *)&id_priv->id.route.addr.src_addr; 1854 if (cma_zero_addr(src)) {
1861 dst_in = (struct sockaddr_in *)&id_priv->id.route.addr.dst_addr; 1855 dst = (struct sockaddr *) &id_priv->id.route.addr.dst_addr;
1862 src_in->sin_family = dst_in->sin_family; 1856 if ((src->sa_family = dst->sa_family) == AF_INET) {
1863 src_in->sin_addr.s_addr = dst_in->sin_addr.s_addr; 1857 ((struct sockaddr_in *) src)->sin_addr.s_addr =
1858 ((struct sockaddr_in *) dst)->sin_addr.s_addr;
1859 } else {
1860 ipv6_addr_copy(&((struct sockaddr_in6 *) src)->sin6_addr,
1861 &((struct sockaddr_in6 *) dst)->sin6_addr);
1862 }
1864 } 1863 }
1865 1864
1866 work->id = id_priv; 1865 work->id = id_priv;
@@ -1878,10 +1877,14 @@ err:
1878static int cma_bind_addr(struct rdma_cm_id *id, struct sockaddr *src_addr, 1877static int cma_bind_addr(struct rdma_cm_id *id, struct sockaddr *src_addr,
1879 struct sockaddr *dst_addr) 1878 struct sockaddr *dst_addr)
1880{ 1879{
1881 if (src_addr && src_addr->sa_family) 1880 if (!src_addr || !src_addr->sa_family) {
1882 return rdma_bind_addr(id, src_addr); 1881 src_addr = (struct sockaddr *) &id->route.addr.src_addr;
1883 else 1882 if ((src_addr->sa_family = dst_addr->sa_family) == AF_INET6) {
1884 return cma_bind_any(id, dst_addr->sa_family); 1883 ((struct sockaddr_in6 *) src_addr)->sin6_scope_id =
1884 ((struct sockaddr_in6 *) dst_addr)->sin6_scope_id;
1885 }
1886 }
1887 return rdma_bind_addr(id, src_addr);
1885} 1888}
1886 1889
1887int rdma_resolve_addr(struct rdma_cm_id *id, struct sockaddr *src_addr, 1890int rdma_resolve_addr(struct rdma_cm_id *id, struct sockaddr *src_addr,
@@ -2077,6 +2080,25 @@ static int cma_get_port(struct rdma_id_private *id_priv)
2077 return ret; 2080 return ret;
2078} 2081}
2079 2082
2083static int cma_check_linklocal(struct rdma_dev_addr *dev_addr,
2084 struct sockaddr *addr)
2085{
2086#if defined(CONFIG_IPV6) || defined(CONFIG_IPV6_MODULE)
2087 struct sockaddr_in6 *sin6;
2088
2089 if (addr->sa_family != AF_INET6)
2090 return 0;
2091
2092 sin6 = (struct sockaddr_in6 *) addr;
2093 if ((ipv6_addr_type(&sin6->sin6_addr) & IPV6_ADDR_LINKLOCAL) &&
2094 !sin6->sin6_scope_id)
2095 return -EINVAL;
2096
2097 dev_addr->bound_dev_if = sin6->sin6_scope_id;
2098#endif
2099 return 0;
2100}
2101
2080int rdma_bind_addr(struct rdma_cm_id *id, struct sockaddr *addr) 2102int rdma_bind_addr(struct rdma_cm_id *id, struct sockaddr *addr)
2081{ 2103{
2082 struct rdma_id_private *id_priv; 2104 struct rdma_id_private *id_priv;
@@ -2089,6 +2111,10 @@ int rdma_bind_addr(struct rdma_cm_id *id, struct sockaddr *addr)
2089 if (!cma_comp_exch(id_priv, CMA_IDLE, CMA_ADDR_BOUND)) 2111 if (!cma_comp_exch(id_priv, CMA_IDLE, CMA_ADDR_BOUND))
2090 return -EINVAL; 2112 return -EINVAL;
2091 2113
2114 ret = cma_check_linklocal(&id->route.addr.dev_addr, addr);
2115 if (ret)
2116 goto err1;
2117
2092 if (!cma_any_addr(addr)) { 2118 if (!cma_any_addr(addr)) {
2093 ret = rdma_translate_ip(addr, &id->route.addr.dev_addr); 2119 ret = rdma_translate_ip(addr, &id->route.addr.dev_addr);
2094 if (ret) 2120 if (ret)
@@ -2108,7 +2134,7 @@ int rdma_bind_addr(struct rdma_cm_id *id, struct sockaddr *addr)
2108 2134
2109 return 0; 2135 return 0;
2110err2: 2136err2:
2111 if (!cma_any_addr(addr)) { 2137 if (id_priv->cma_dev) {
2112 mutex_lock(&lock); 2138 mutex_lock(&lock);
2113 cma_detach_from_dev(id_priv); 2139 cma_detach_from_dev(id_priv);
2114 mutex_unlock(&lock); 2140 mutex_unlock(&lock);
@@ -2687,10 +2713,15 @@ static void cma_set_mgid(struct rdma_id_private *id_priv,
2687 if (cma_any_addr(addr)) { 2713 if (cma_any_addr(addr)) {
2688 memset(mgid, 0, sizeof *mgid); 2714 memset(mgid, 0, sizeof *mgid);
2689 } else if ((addr->sa_family == AF_INET6) && 2715 } else if ((addr->sa_family == AF_INET6) &&
2690 ((be32_to_cpu(sin6->sin6_addr.s6_addr32[0]) & 0xFF10A01B) == 2716 ((be32_to_cpu(sin6->sin6_addr.s6_addr32[0]) & 0xFFF0FFFF) ==
2691 0xFF10A01B)) { 2717 0xFF10A01B)) {
2692 /* IPv6 address is an SA assigned MGID. */ 2718 /* IPv6 address is an SA assigned MGID. */
2693 memcpy(mgid, &sin6->sin6_addr, sizeof *mgid); 2719 memcpy(mgid, &sin6->sin6_addr, sizeof *mgid);
2720 } else if ((addr->sa_family == AF_INET6)) {
2721 ipv6_ib_mc_map(&sin6->sin6_addr, dev_addr->broadcast, mc_map);
2722 if (id_priv->id.ps == RDMA_PS_UDP)
2723 mc_map[7] = 0x01; /* Use RDMA CM signature */
2724 *mgid = *(union ib_gid *) (mc_map + 4);
2694 } else { 2725 } else {
2695 ip_ib_mc_map(sin->sin_addr.s_addr, dev_addr->broadcast, mc_map); 2726 ip_ib_mc_map(sin->sin_addr.s_addr, dev_addr->broadcast, mc_map);
2696 if (id_priv->id.ps == RDMA_PS_UDP) 2727 if (id_priv->id.ps == RDMA_PS_UDP)
@@ -2716,7 +2747,7 @@ static int cma_join_ib_multicast(struct rdma_id_private *id_priv,
2716 cma_set_mgid(id_priv, (struct sockaddr *) &mc->addr, &rec.mgid); 2747 cma_set_mgid(id_priv, (struct sockaddr *) &mc->addr, &rec.mgid);
2717 if (id_priv->id.ps == RDMA_PS_UDP) 2748 if (id_priv->id.ps == RDMA_PS_UDP)
2718 rec.qkey = cpu_to_be32(RDMA_UDP_QKEY); 2749 rec.qkey = cpu_to_be32(RDMA_UDP_QKEY);
2719 ib_addr_get_sgid(dev_addr, &rec.port_gid); 2750 rdma_addr_get_sgid(dev_addr, &rec.port_gid);
2720 rec.pkey = cpu_to_be16(ib_addr_get_pkey(dev_addr)); 2751 rec.pkey = cpu_to_be16(ib_addr_get_pkey(dev_addr));
2721 rec.join_state = 1; 2752 rec.join_state = 1;
2722 2753
@@ -2815,7 +2846,7 @@ static int cma_netdev_change(struct net_device *ndev, struct rdma_id_private *id
2815 2846
2816 dev_addr = &id_priv->id.route.addr.dev_addr; 2847 dev_addr = &id_priv->id.route.addr.dev_addr;
2817 2848
2818 if ((dev_addr->src_dev == ndev) && 2849 if ((dev_addr->bound_dev_if == ndev->ifindex) &&
2819 memcmp(dev_addr->src_dev_addr, ndev->dev_addr, ndev->addr_len)) { 2850 memcmp(dev_addr->src_dev_addr, ndev->dev_addr, ndev->addr_len)) {
2820 printk(KERN_INFO "RDMA CM addr change for ndev %s used by id %p\n", 2851 printk(KERN_INFO "RDMA CM addr change for ndev %s used by id %p\n",
2821 ndev->name, &id_priv->id); 2852 ndev->name, &id_priv->id);
diff --git a/drivers/infiniband/core/sa_query.c b/drivers/infiniband/core/sa_query.c
index 82543716d59e..7e1ffd8ccd5c 100644
--- a/drivers/infiniband/core/sa_query.c
+++ b/drivers/infiniband/core/sa_query.c
@@ -604,6 +604,12 @@ retry:
604 return ret ? ret : id; 604 return ret ? ret : id;
605} 605}
606 606
607void ib_sa_unpack_path(void *attribute, struct ib_sa_path_rec *rec)
608{
609 ib_unpack(path_rec_table, ARRAY_SIZE(path_rec_table), attribute, rec);
610}
611EXPORT_SYMBOL(ib_sa_unpack_path);
612
607static void ib_sa_path_rec_callback(struct ib_sa_query *sa_query, 613static void ib_sa_path_rec_callback(struct ib_sa_query *sa_query,
608 int status, 614 int status,
609 struct ib_sa_mad *mad) 615 struct ib_sa_mad *mad)
diff --git a/drivers/infiniband/core/ucma.c b/drivers/infiniband/core/ucma.c
index bb96d3c4b0f4..b2e16c332d5b 100644
--- a/drivers/infiniband/core/ucma.c
+++ b/drivers/infiniband/core/ucma.c
@@ -43,6 +43,7 @@
43#include <rdma/rdma_user_cm.h> 43#include <rdma/rdma_user_cm.h>
44#include <rdma/ib_marshall.h> 44#include <rdma/ib_marshall.h>
45#include <rdma/rdma_cm.h> 45#include <rdma/rdma_cm.h>
46#include <rdma/rdma_cm_ib.h>
46 47
47MODULE_AUTHOR("Sean Hefty"); 48MODULE_AUTHOR("Sean Hefty");
48MODULE_DESCRIPTION("RDMA Userspace Connection Manager Access"); 49MODULE_DESCRIPTION("RDMA Userspace Connection Manager Access");
@@ -562,10 +563,10 @@ static void ucma_copy_ib_route(struct rdma_ucm_query_route_resp *resp,
562 switch (route->num_paths) { 563 switch (route->num_paths) {
563 case 0: 564 case 0:
564 dev_addr = &route->addr.dev_addr; 565 dev_addr = &route->addr.dev_addr;
565 ib_addr_get_dgid(dev_addr, 566 rdma_addr_get_dgid(dev_addr,
566 (union ib_gid *) &resp->ib_route[0].dgid); 567 (union ib_gid *) &resp->ib_route[0].dgid);
567 ib_addr_get_sgid(dev_addr, 568 rdma_addr_get_sgid(dev_addr,
568 (union ib_gid *) &resp->ib_route[0].sgid); 569 (union ib_gid *) &resp->ib_route[0].sgid);
569 resp->ib_route[0].pkey = cpu_to_be16(ib_addr_get_pkey(dev_addr)); 570 resp->ib_route[0].pkey = cpu_to_be16(ib_addr_get_pkey(dev_addr));
570 break; 571 break;
571 case 2: 572 case 2:
@@ -812,6 +813,51 @@ static int ucma_set_option_id(struct ucma_context *ctx, int optname,
812 return ret; 813 return ret;
813} 814}
814 815
816static int ucma_set_ib_path(struct ucma_context *ctx,
817 struct ib_path_rec_data *path_data, size_t optlen)
818{
819 struct ib_sa_path_rec sa_path;
820 struct rdma_cm_event event;
821 int ret;
822
823 if (optlen % sizeof(*path_data))
824 return -EINVAL;
825
826 for (; optlen; optlen -= sizeof(*path_data), path_data++) {
827 if (path_data->flags == (IB_PATH_GMP | IB_PATH_PRIMARY |
828 IB_PATH_BIDIRECTIONAL))
829 break;
830 }
831
832 if (!optlen)
833 return -EINVAL;
834
835 ib_sa_unpack_path(path_data->path_rec, &sa_path);
836 ret = rdma_set_ib_paths(ctx->cm_id, &sa_path, 1);
837 if (ret)
838 return ret;
839
840 memset(&event, 0, sizeof event);
841 event.event = RDMA_CM_EVENT_ROUTE_RESOLVED;
842 return ucma_event_handler(ctx->cm_id, &event);
843}
844
845static int ucma_set_option_ib(struct ucma_context *ctx, int optname,
846 void *optval, size_t optlen)
847{
848 int ret;
849
850 switch (optname) {
851 case RDMA_OPTION_IB_PATH:
852 ret = ucma_set_ib_path(ctx, optval, optlen);
853 break;
854 default:
855 ret = -ENOSYS;
856 }
857
858 return ret;
859}
860
815static int ucma_set_option_level(struct ucma_context *ctx, int level, 861static int ucma_set_option_level(struct ucma_context *ctx, int level,
816 int optname, void *optval, size_t optlen) 862 int optname, void *optval, size_t optlen)
817{ 863{
@@ -821,6 +867,9 @@ static int ucma_set_option_level(struct ucma_context *ctx, int level,
821 case RDMA_OPTION_ID: 867 case RDMA_OPTION_ID:
822 ret = ucma_set_option_id(ctx, optname, optval, optlen); 868 ret = ucma_set_option_id(ctx, optname, optval, optlen);
823 break; 869 break;
870 case RDMA_OPTION_IB:
871 ret = ucma_set_option_ib(ctx, optname, optval, optlen);
872 break;
824 default: 873 default:
825 ret = -ENOSYS; 874 ret = -ENOSYS;
826 } 875 }
diff --git a/drivers/infiniband/core/uverbs_cmd.c b/drivers/infiniband/core/uverbs_cmd.c
index 56feab6c251e..112d3970222a 100644
--- a/drivers/infiniband/core/uverbs_cmd.c
+++ b/drivers/infiniband/core/uverbs_cmd.c
@@ -285,7 +285,7 @@ ssize_t ib_uverbs_get_context(struct ib_uverbs_file *file,
285 285
286 ucontext = ibdev->alloc_ucontext(ibdev, &udata); 286 ucontext = ibdev->alloc_ucontext(ibdev, &udata);
287 if (IS_ERR(ucontext)) { 287 if (IS_ERR(ucontext)) {
288 ret = PTR_ERR(file->ucontext); 288 ret = PTR_ERR(ucontext);
289 goto err; 289 goto err;
290 } 290 }
291 291
diff --git a/drivers/infiniband/core/uverbs_main.c b/drivers/infiniband/core/uverbs_main.c
index aec0fbdfe7f0..5f284ffd430e 100644
--- a/drivers/infiniband/core/uverbs_main.c
+++ b/drivers/infiniband/core/uverbs_main.c
@@ -492,6 +492,7 @@ struct file *ib_uverbs_alloc_event_file(struct ib_uverbs_file *uverbs_file,
492 int is_async, int *fd) 492 int is_async, int *fd)
493{ 493{
494 struct ib_uverbs_event_file *ev_file; 494 struct ib_uverbs_event_file *ev_file;
495 struct path path;
495 struct file *filp; 496 struct file *filp;
496 int ret; 497 int ret;
497 498
@@ -519,8 +520,10 @@ struct file *ib_uverbs_alloc_event_file(struct ib_uverbs_file *uverbs_file,
519 * system call on a uverbs file, which will already have a 520 * system call on a uverbs file, which will already have a
520 * module reference. 521 * module reference.
521 */ 522 */
522 filp = alloc_file(uverbs_event_mnt, dget(uverbs_event_mnt->mnt_root), 523 path.mnt = uverbs_event_mnt;
523 FMODE_READ, fops_get(&uverbs_event_fops)); 524 path.dentry = uverbs_event_mnt->mnt_root;
525 path_get(&path);
526 filp = alloc_file(&path, FMODE_READ, fops_get(&uverbs_event_fops));
524 if (!filp) { 527 if (!filp) {
525 ret = -ENFILE; 528 ret = -ENFILE;
526 goto err_fd; 529 goto err_fd;
@@ -531,6 +534,8 @@ struct file *ib_uverbs_alloc_event_file(struct ib_uverbs_file *uverbs_file,
531 return filp; 534 return filp;
532 535
533err_fd: 536err_fd:
537 fops_put(&uverbs_event_fops);
538 path_put(&path);
534 put_unused_fd(*fd); 539 put_unused_fd(*fd);
535 540
536err: 541err:
diff --git a/drivers/infiniband/hw/amso1100/c2_qp.c b/drivers/infiniband/hw/amso1100/c2_qp.c
index a6d89440ad2c..ad518868df77 100644
--- a/drivers/infiniband/hw/amso1100/c2_qp.c
+++ b/drivers/infiniband/hw/amso1100/c2_qp.c
@@ -798,8 +798,10 @@ int c2_post_send(struct ib_qp *ibqp, struct ib_send_wr *ib_wr,
798 u8 actual_sge_count; 798 u8 actual_sge_count;
799 u32 msg_size; 799 u32 msg_size;
800 800
801 if (qp->state > IB_QPS_RTS) 801 if (qp->state > IB_QPS_RTS) {
802 return -EINVAL; 802 err = -EINVAL;
803 goto out;
804 }
803 805
804 while (ib_wr) { 806 while (ib_wr) {
805 807
@@ -930,6 +932,7 @@ int c2_post_send(struct ib_qp *ibqp, struct ib_send_wr *ib_wr,
930 ib_wr = ib_wr->next; 932 ib_wr = ib_wr->next;
931 } 933 }
932 934
935out:
933 if (err) 936 if (err)
934 *bad_wr = ib_wr; 937 *bad_wr = ib_wr;
935 return err; 938 return err;
@@ -944,8 +947,10 @@ int c2_post_receive(struct ib_qp *ibqp, struct ib_recv_wr *ib_wr,
944 unsigned long lock_flags; 947 unsigned long lock_flags;
945 int err = 0; 948 int err = 0;
946 949
947 if (qp->state > IB_QPS_RTS) 950 if (qp->state > IB_QPS_RTS) {
948 return -EINVAL; 951 err = -EINVAL;
952 goto out;
953 }
949 954
950 /* 955 /*
951 * Try and post each work request 956 * Try and post each work request
@@ -998,6 +1003,7 @@ int c2_post_receive(struct ib_qp *ibqp, struct ib_recv_wr *ib_wr,
998 ib_wr = ib_wr->next; 1003 ib_wr = ib_wr->next;
999 } 1004 }
1000 1005
1006out:
1001 if (err) 1007 if (err)
1002 *bad_wr = ib_wr; 1008 *bad_wr = ib_wr;
1003 return err; 1009 return err;
diff --git a/drivers/infiniband/hw/cxgb3/cxio_hal.h b/drivers/infiniband/hw/cxgb3/cxio_hal.h
index bfd03bf8be54..f3d440cc68f2 100644
--- a/drivers/infiniband/hw/cxgb3/cxio_hal.h
+++ b/drivers/infiniband/hw/cxgb3/cxio_hal.h
@@ -34,6 +34,7 @@
34 34
35#include <linux/list.h> 35#include <linux/list.h>
36#include <linux/mutex.h> 36#include <linux/mutex.h>
37#include <linux/kfifo.h>
37 38
38#include "t3_cpl.h" 39#include "t3_cpl.h"
39#include "t3cdev.h" 40#include "t3cdev.h"
@@ -75,13 +76,13 @@ struct cxio_hal_ctrl_qp {
75}; 76};
76 77
77struct cxio_hal_resource { 78struct cxio_hal_resource {
78 struct kfifo *tpt_fifo; 79 struct kfifo tpt_fifo;
79 spinlock_t tpt_fifo_lock; 80 spinlock_t tpt_fifo_lock;
80 struct kfifo *qpid_fifo; 81 struct kfifo qpid_fifo;
81 spinlock_t qpid_fifo_lock; 82 spinlock_t qpid_fifo_lock;
82 struct kfifo *cqid_fifo; 83 struct kfifo cqid_fifo;
83 spinlock_t cqid_fifo_lock; 84 spinlock_t cqid_fifo_lock;
84 struct kfifo *pdid_fifo; 85 struct kfifo pdid_fifo;
85 spinlock_t pdid_fifo_lock; 86 spinlock_t pdid_fifo_lock;
86}; 87};
87 88
diff --git a/drivers/infiniband/hw/cxgb3/cxio_resource.c b/drivers/infiniband/hw/cxgb3/cxio_resource.c
index bd233c087653..31f9201b2980 100644
--- a/drivers/infiniband/hw/cxgb3/cxio_resource.c
+++ b/drivers/infiniband/hw/cxgb3/cxio_resource.c
@@ -39,12 +39,12 @@
39#include "cxio_resource.h" 39#include "cxio_resource.h"
40#include "cxio_hal.h" 40#include "cxio_hal.h"
41 41
42static struct kfifo *rhdl_fifo; 42static struct kfifo rhdl_fifo;
43static spinlock_t rhdl_fifo_lock; 43static spinlock_t rhdl_fifo_lock;
44 44
45#define RANDOM_SIZE 16 45#define RANDOM_SIZE 16
46 46
47static int __cxio_init_resource_fifo(struct kfifo **fifo, 47static int __cxio_init_resource_fifo(struct kfifo *fifo,
48 spinlock_t *fifo_lock, 48 spinlock_t *fifo_lock,
49 u32 nr, u32 skip_low, 49 u32 nr, u32 skip_low,
50 u32 skip_high, 50 u32 skip_high,
@@ -55,12 +55,11 @@ static int __cxio_init_resource_fifo(struct kfifo **fifo,
55 u32 rarray[16]; 55 u32 rarray[16];
56 spin_lock_init(fifo_lock); 56 spin_lock_init(fifo_lock);
57 57
58 *fifo = kfifo_alloc(nr * sizeof(u32), GFP_KERNEL, fifo_lock); 58 if (kfifo_alloc(fifo, nr * sizeof(u32), GFP_KERNEL))
59 if (IS_ERR(*fifo))
60 return -ENOMEM; 59 return -ENOMEM;
61 60
62 for (i = 0; i < skip_low + skip_high; i++) 61 for (i = 0; i < skip_low + skip_high; i++)
63 __kfifo_put(*fifo, (unsigned char *) &entry, sizeof(u32)); 62 kfifo_in(fifo, (unsigned char *) &entry, sizeof(u32));
64 if (random) { 63 if (random) {
65 j = 0; 64 j = 0;
66 random_bytes = random32(); 65 random_bytes = random32();
@@ -72,33 +71,35 @@ static int __cxio_init_resource_fifo(struct kfifo **fifo,
72 random_bytes = random32(); 71 random_bytes = random32();
73 } 72 }
74 idx = (random_bytes >> (j * 2)) & 0xF; 73 idx = (random_bytes >> (j * 2)) & 0xF;
75 __kfifo_put(*fifo, 74 kfifo_in(fifo,
76 (unsigned char *) &rarray[idx], 75 (unsigned char *) &rarray[idx],
77 sizeof(u32)); 76 sizeof(u32));
78 rarray[idx] = i; 77 rarray[idx] = i;
79 j++; 78 j++;
80 } 79 }
81 for (i = 0; i < RANDOM_SIZE; i++) 80 for (i = 0; i < RANDOM_SIZE; i++)
82 __kfifo_put(*fifo, 81 kfifo_in(fifo,
83 (unsigned char *) &rarray[i], 82 (unsigned char *) &rarray[i],
84 sizeof(u32)); 83 sizeof(u32));
85 } else 84 } else
86 for (i = skip_low; i < nr - skip_high; i++) 85 for (i = skip_low; i < nr - skip_high; i++)
87 __kfifo_put(*fifo, (unsigned char *) &i, sizeof(u32)); 86 kfifo_in(fifo, (unsigned char *) &i, sizeof(u32));
88 87
89 for (i = 0; i < skip_low + skip_high; i++) 88 for (i = 0; i < skip_low + skip_high; i++)
90 kfifo_get(*fifo, (unsigned char *) &entry, sizeof(u32)); 89 if (kfifo_out_locked(fifo, (unsigned char *) &entry,
90 sizeof(u32), fifo_lock) != sizeof(u32))
91 break;
91 return 0; 92 return 0;
92} 93}
93 94
94static int cxio_init_resource_fifo(struct kfifo **fifo, spinlock_t * fifo_lock, 95static int cxio_init_resource_fifo(struct kfifo *fifo, spinlock_t * fifo_lock,
95 u32 nr, u32 skip_low, u32 skip_high) 96 u32 nr, u32 skip_low, u32 skip_high)
96{ 97{
97 return (__cxio_init_resource_fifo(fifo, fifo_lock, nr, skip_low, 98 return (__cxio_init_resource_fifo(fifo, fifo_lock, nr, skip_low,
98 skip_high, 0)); 99 skip_high, 0));
99} 100}
100 101
101static int cxio_init_resource_fifo_random(struct kfifo **fifo, 102static int cxio_init_resource_fifo_random(struct kfifo *fifo,
102 spinlock_t * fifo_lock, 103 spinlock_t * fifo_lock,
103 u32 nr, u32 skip_low, u32 skip_high) 104 u32 nr, u32 skip_low, u32 skip_high)
104{ 105{
@@ -113,15 +114,13 @@ static int cxio_init_qpid_fifo(struct cxio_rdev *rdev_p)
113 114
114 spin_lock_init(&rdev_p->rscp->qpid_fifo_lock); 115 spin_lock_init(&rdev_p->rscp->qpid_fifo_lock);
115 116
116 rdev_p->rscp->qpid_fifo = kfifo_alloc(T3_MAX_NUM_QP * sizeof(u32), 117 if (kfifo_alloc(&rdev_p->rscp->qpid_fifo, T3_MAX_NUM_QP * sizeof(u32),
117 GFP_KERNEL, 118 GFP_KERNEL))
118 &rdev_p->rscp->qpid_fifo_lock);
119 if (IS_ERR(rdev_p->rscp->qpid_fifo))
120 return -ENOMEM; 119 return -ENOMEM;
121 120
122 for (i = 16; i < T3_MAX_NUM_QP; i++) 121 for (i = 16; i < T3_MAX_NUM_QP; i++)
123 if (!(i & rdev_p->qpmask)) 122 if (!(i & rdev_p->qpmask))
124 __kfifo_put(rdev_p->rscp->qpid_fifo, 123 kfifo_in(&rdev_p->rscp->qpid_fifo,
125 (unsigned char *) &i, sizeof(u32)); 124 (unsigned char *) &i, sizeof(u32));
126 return 0; 125 return 0;
127} 126}
@@ -134,7 +133,7 @@ int cxio_hal_init_rhdl_resource(u32 nr_rhdl)
134 133
135void cxio_hal_destroy_rhdl_resource(void) 134void cxio_hal_destroy_rhdl_resource(void)
136{ 135{
137 kfifo_free(rhdl_fifo); 136 kfifo_free(&rhdl_fifo);
138} 137}
139 138
140/* nr_* must be power of 2 */ 139/* nr_* must be power of 2 */
@@ -167,11 +166,11 @@ int cxio_hal_init_resource(struct cxio_rdev *rdev_p,
167 goto pdid_err; 166 goto pdid_err;
168 return 0; 167 return 0;
169pdid_err: 168pdid_err:
170 kfifo_free(rscp->cqid_fifo); 169 kfifo_free(&rscp->cqid_fifo);
171cqid_err: 170cqid_err:
172 kfifo_free(rscp->qpid_fifo); 171 kfifo_free(&rscp->qpid_fifo);
173qpid_err: 172qpid_err:
174 kfifo_free(rscp->tpt_fifo); 173 kfifo_free(&rscp->tpt_fifo);
175tpt_err: 174tpt_err:
176 return -ENOMEM; 175 return -ENOMEM;
177} 176}
@@ -179,33 +178,37 @@ tpt_err:
179/* 178/*
180 * returns 0 if no resource available 179 * returns 0 if no resource available
181 */ 180 */
182static u32 cxio_hal_get_resource(struct kfifo *fifo) 181static u32 cxio_hal_get_resource(struct kfifo *fifo, spinlock_t * lock)
183{ 182{
184 u32 entry; 183 u32 entry;
185 if (kfifo_get(fifo, (unsigned char *) &entry, sizeof(u32))) 184 if (kfifo_out_locked(fifo, (unsigned char *) &entry, sizeof(u32), lock))
186 return entry; 185 return entry;
187 else 186 else
188 return 0; /* fifo emptry */ 187 return 0; /* fifo emptry */
189} 188}
190 189
191static void cxio_hal_put_resource(struct kfifo *fifo, u32 entry) 190static void cxio_hal_put_resource(struct kfifo *fifo, spinlock_t * lock,
191 u32 entry)
192{ 192{
193 BUG_ON(kfifo_put(fifo, (unsigned char *) &entry, sizeof(u32)) == 0); 193 BUG_ON(
194 kfifo_in_locked(fifo, (unsigned char *) &entry, sizeof(u32), lock)
195 == 0);
194} 196}
195 197
196u32 cxio_hal_get_stag(struct cxio_hal_resource *rscp) 198u32 cxio_hal_get_stag(struct cxio_hal_resource *rscp)
197{ 199{
198 return cxio_hal_get_resource(rscp->tpt_fifo); 200 return cxio_hal_get_resource(&rscp->tpt_fifo, &rscp->tpt_fifo_lock);
199} 201}
200 202
201void cxio_hal_put_stag(struct cxio_hal_resource *rscp, u32 stag) 203void cxio_hal_put_stag(struct cxio_hal_resource *rscp, u32 stag)
202{ 204{
203 cxio_hal_put_resource(rscp->tpt_fifo, stag); 205 cxio_hal_put_resource(&rscp->tpt_fifo, &rscp->tpt_fifo_lock, stag);
204} 206}
205 207
206u32 cxio_hal_get_qpid(struct cxio_hal_resource *rscp) 208u32 cxio_hal_get_qpid(struct cxio_hal_resource *rscp)
207{ 209{
208 u32 qpid = cxio_hal_get_resource(rscp->qpid_fifo); 210 u32 qpid = cxio_hal_get_resource(&rscp->qpid_fifo,
211 &rscp->qpid_fifo_lock);
209 PDBG("%s qpid 0x%x\n", __func__, qpid); 212 PDBG("%s qpid 0x%x\n", __func__, qpid);
210 return qpid; 213 return qpid;
211} 214}
@@ -213,35 +216,35 @@ u32 cxio_hal_get_qpid(struct cxio_hal_resource *rscp)
213void cxio_hal_put_qpid(struct cxio_hal_resource *rscp, u32 qpid) 216void cxio_hal_put_qpid(struct cxio_hal_resource *rscp, u32 qpid)
214{ 217{
215 PDBG("%s qpid 0x%x\n", __func__, qpid); 218 PDBG("%s qpid 0x%x\n", __func__, qpid);
216 cxio_hal_put_resource(rscp->qpid_fifo, qpid); 219 cxio_hal_put_resource(&rscp->qpid_fifo, &rscp->qpid_fifo_lock, qpid);
217} 220}
218 221
219u32 cxio_hal_get_cqid(struct cxio_hal_resource *rscp) 222u32 cxio_hal_get_cqid(struct cxio_hal_resource *rscp)
220{ 223{
221 return cxio_hal_get_resource(rscp->cqid_fifo); 224 return cxio_hal_get_resource(&rscp->cqid_fifo, &rscp->cqid_fifo_lock);
222} 225}
223 226
224void cxio_hal_put_cqid(struct cxio_hal_resource *rscp, u32 cqid) 227void cxio_hal_put_cqid(struct cxio_hal_resource *rscp, u32 cqid)
225{ 228{
226 cxio_hal_put_resource(rscp->cqid_fifo, cqid); 229 cxio_hal_put_resource(&rscp->cqid_fifo, &rscp->cqid_fifo_lock, cqid);
227} 230}
228 231
229u32 cxio_hal_get_pdid(struct cxio_hal_resource *rscp) 232u32 cxio_hal_get_pdid(struct cxio_hal_resource *rscp)
230{ 233{
231 return cxio_hal_get_resource(rscp->pdid_fifo); 234 return cxio_hal_get_resource(&rscp->pdid_fifo, &rscp->pdid_fifo_lock);
232} 235}
233 236
234void cxio_hal_put_pdid(struct cxio_hal_resource *rscp, u32 pdid) 237void cxio_hal_put_pdid(struct cxio_hal_resource *rscp, u32 pdid)
235{ 238{
236 cxio_hal_put_resource(rscp->pdid_fifo, pdid); 239 cxio_hal_put_resource(&rscp->pdid_fifo, &rscp->pdid_fifo_lock, pdid);
237} 240}
238 241
239void cxio_hal_destroy_resource(struct cxio_hal_resource *rscp) 242void cxio_hal_destroy_resource(struct cxio_hal_resource *rscp)
240{ 243{
241 kfifo_free(rscp->tpt_fifo); 244 kfifo_free(&rscp->tpt_fifo);
242 kfifo_free(rscp->cqid_fifo); 245 kfifo_free(&rscp->cqid_fifo);
243 kfifo_free(rscp->qpid_fifo); 246 kfifo_free(&rscp->qpid_fifo);
244 kfifo_free(rscp->pdid_fifo); 247 kfifo_free(&rscp->pdid_fifo);
245 kfree(rscp); 248 kfree(rscp);
246} 249}
247 250
diff --git a/drivers/infiniband/hw/cxgb3/iwch_qp.c b/drivers/infiniband/hw/cxgb3/iwch_qp.c
index 1cecf98829ac..3eb8cecf81d7 100644
--- a/drivers/infiniband/hw/cxgb3/iwch_qp.c
+++ b/drivers/infiniband/hw/cxgb3/iwch_qp.c
@@ -365,18 +365,19 @@ int iwch_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr,
365 spin_lock_irqsave(&qhp->lock, flag); 365 spin_lock_irqsave(&qhp->lock, flag);
366 if (qhp->attr.state > IWCH_QP_STATE_RTS) { 366 if (qhp->attr.state > IWCH_QP_STATE_RTS) {
367 spin_unlock_irqrestore(&qhp->lock, flag); 367 spin_unlock_irqrestore(&qhp->lock, flag);
368 return -EINVAL; 368 err = -EINVAL;
369 goto out;
369 } 370 }
370 num_wrs = Q_FREECNT(qhp->wq.sq_rptr, qhp->wq.sq_wptr, 371 num_wrs = Q_FREECNT(qhp->wq.sq_rptr, qhp->wq.sq_wptr,
371 qhp->wq.sq_size_log2); 372 qhp->wq.sq_size_log2);
372 if (num_wrs <= 0) { 373 if (num_wrs <= 0) {
373 spin_unlock_irqrestore(&qhp->lock, flag); 374 spin_unlock_irqrestore(&qhp->lock, flag);
374 return -ENOMEM; 375 err = -ENOMEM;
376 goto out;
375 } 377 }
376 while (wr) { 378 while (wr) {
377 if (num_wrs == 0) { 379 if (num_wrs == 0) {
378 err = -ENOMEM; 380 err = -ENOMEM;
379 *bad_wr = wr;
380 break; 381 break;
381 } 382 }
382 idx = Q_PTR2IDX(qhp->wq.wptr, qhp->wq.size_log2); 383 idx = Q_PTR2IDX(qhp->wq.wptr, qhp->wq.size_log2);
@@ -428,10 +429,8 @@ int iwch_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr,
428 wr->opcode); 429 wr->opcode);
429 err = -EINVAL; 430 err = -EINVAL;
430 } 431 }
431 if (err) { 432 if (err)
432 *bad_wr = wr;
433 break; 433 break;
434 }
435 wqe->send.wrid.id0.hi = qhp->wq.sq_wptr; 434 wqe->send.wrid.id0.hi = qhp->wq.sq_wptr;
436 sqp->wr_id = wr->wr_id; 435 sqp->wr_id = wr->wr_id;
437 sqp->opcode = wr2opcode(t3_wr_opcode); 436 sqp->opcode = wr2opcode(t3_wr_opcode);
@@ -454,6 +453,10 @@ int iwch_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr,
454 } 453 }
455 spin_unlock_irqrestore(&qhp->lock, flag); 454 spin_unlock_irqrestore(&qhp->lock, flag);
456 ring_doorbell(qhp->wq.doorbell, qhp->wq.qpid); 455 ring_doorbell(qhp->wq.doorbell, qhp->wq.qpid);
456
457out:
458 if (err)
459 *bad_wr = wr;
457 return err; 460 return err;
458} 461}
459 462
@@ -471,18 +474,19 @@ int iwch_post_receive(struct ib_qp *ibqp, struct ib_recv_wr *wr,
471 spin_lock_irqsave(&qhp->lock, flag); 474 spin_lock_irqsave(&qhp->lock, flag);
472 if (qhp->attr.state > IWCH_QP_STATE_RTS) { 475 if (qhp->attr.state > IWCH_QP_STATE_RTS) {
473 spin_unlock_irqrestore(&qhp->lock, flag); 476 spin_unlock_irqrestore(&qhp->lock, flag);
474 return -EINVAL; 477 err = -EINVAL;
478 goto out;
475 } 479 }
476 num_wrs = Q_FREECNT(qhp->wq.rq_rptr, qhp->wq.rq_wptr, 480 num_wrs = Q_FREECNT(qhp->wq.rq_rptr, qhp->wq.rq_wptr,
477 qhp->wq.rq_size_log2) - 1; 481 qhp->wq.rq_size_log2) - 1;
478 if (!wr) { 482 if (!wr) {
479 spin_unlock_irqrestore(&qhp->lock, flag); 483 spin_unlock_irqrestore(&qhp->lock, flag);
480 return -EINVAL; 484 err = -ENOMEM;
485 goto out;
481 } 486 }
482 while (wr) { 487 while (wr) {
483 if (wr->num_sge > T3_MAX_SGE) { 488 if (wr->num_sge > T3_MAX_SGE) {
484 err = -EINVAL; 489 err = -EINVAL;
485 *bad_wr = wr;
486 break; 490 break;
487 } 491 }
488 idx = Q_PTR2IDX(qhp->wq.wptr, qhp->wq.size_log2); 492 idx = Q_PTR2IDX(qhp->wq.wptr, qhp->wq.size_log2);
@@ -494,10 +498,10 @@ int iwch_post_receive(struct ib_qp *ibqp, struct ib_recv_wr *wr,
494 err = build_zero_stag_recv(qhp, wqe, wr); 498 err = build_zero_stag_recv(qhp, wqe, wr);
495 else 499 else
496 err = -ENOMEM; 500 err = -ENOMEM;
497 if (err) { 501
498 *bad_wr = wr; 502 if (err)
499 break; 503 break;
500 } 504
501 build_fw_riwrh((void *) wqe, T3_WR_RCV, T3_COMPLETION_FLAG, 505 build_fw_riwrh((void *) wqe, T3_WR_RCV, T3_COMPLETION_FLAG,
502 Q_GENBIT(qhp->wq.wptr, qhp->wq.size_log2), 506 Q_GENBIT(qhp->wq.wptr, qhp->wq.size_log2),
503 0, sizeof(struct t3_receive_wr) >> 3, T3_SOPEOP); 507 0, sizeof(struct t3_receive_wr) >> 3, T3_SOPEOP);
@@ -511,6 +515,10 @@ int iwch_post_receive(struct ib_qp *ibqp, struct ib_recv_wr *wr,
511 } 515 }
512 spin_unlock_irqrestore(&qhp->lock, flag); 516 spin_unlock_irqrestore(&qhp->lock, flag);
513 ring_doorbell(qhp->wq.doorbell, qhp->wq.qpid); 517 ring_doorbell(qhp->wq.doorbell, qhp->wq.qpid);
518
519out:
520 if (err)
521 *bad_wr = wr;
514 return err; 522 return err;
515} 523}
516 524
diff --git a/drivers/infiniband/hw/ehca/ehca_classes.h b/drivers/infiniband/hw/ehca/ehca_classes.h
index c825142a2fb7..0136abd50dd4 100644
--- a/drivers/infiniband/hw/ehca/ehca_classes.h
+++ b/drivers/infiniband/hw/ehca/ehca_classes.h
@@ -375,6 +375,7 @@ extern rwlock_t ehca_qp_idr_lock;
375extern rwlock_t ehca_cq_idr_lock; 375extern rwlock_t ehca_cq_idr_lock;
376extern struct idr ehca_qp_idr; 376extern struct idr ehca_qp_idr;
377extern struct idr ehca_cq_idr; 377extern struct idr ehca_cq_idr;
378extern spinlock_t shca_list_lock;
378 379
379extern int ehca_static_rate; 380extern int ehca_static_rate;
380extern int ehca_port_act_time; 381extern int ehca_port_act_time;
diff --git a/drivers/infiniband/hw/ehca/ehca_eq.c b/drivers/infiniband/hw/ehca/ehca_eq.c
index 523e733c630e..3b87589b8ea0 100644
--- a/drivers/infiniband/hw/ehca/ehca_eq.c
+++ b/drivers/infiniband/hw/ehca/ehca_eq.c
@@ -169,12 +169,15 @@ int ehca_destroy_eq(struct ehca_shca *shca, struct ehca_eq *eq)
169 unsigned long flags; 169 unsigned long flags;
170 u64 h_ret; 170 u64 h_ret;
171 171
172 spin_lock_irqsave(&eq->spinlock, flags);
173 ibmebus_free_irq(eq->ist, (void *)shca); 172 ibmebus_free_irq(eq->ist, (void *)shca);
174 173
175 h_ret = hipz_h_destroy_eq(shca->ipz_hca_handle, eq); 174 spin_lock_irqsave(&shca_list_lock, flags);
175 eq->is_initialized = 0;
176 spin_unlock_irqrestore(&shca_list_lock, flags);
176 177
177 spin_unlock_irqrestore(&eq->spinlock, flags); 178 tasklet_kill(&eq->interrupt_task);
179
180 h_ret = hipz_h_destroy_eq(shca->ipz_hca_handle, eq);
178 181
179 if (h_ret != H_SUCCESS) { 182 if (h_ret != H_SUCCESS) {
180 ehca_err(&shca->ib_device, "Can't free EQ resources."); 183 ehca_err(&shca->ib_device, "Can't free EQ resources.");
diff --git a/drivers/infiniband/hw/ehca/ehca_main.c b/drivers/infiniband/hw/ehca/ehca_main.c
index fb2d83c5bf01..129a6bebd6e3 100644
--- a/drivers/infiniband/hw/ehca/ehca_main.c
+++ b/drivers/infiniband/hw/ehca/ehca_main.c
@@ -123,7 +123,7 @@ DEFINE_IDR(ehca_qp_idr);
123DEFINE_IDR(ehca_cq_idr); 123DEFINE_IDR(ehca_cq_idr);
124 124
125static LIST_HEAD(shca_list); /* list of all registered ehcas */ 125static LIST_HEAD(shca_list); /* list of all registered ehcas */
126static DEFINE_SPINLOCK(shca_list_lock); 126DEFINE_SPINLOCK(shca_list_lock);
127 127
128static struct timer_list poll_eqs_timer; 128static struct timer_list poll_eqs_timer;
129 129
diff --git a/drivers/infiniband/hw/ehca/ehca_reqs.c b/drivers/infiniband/hw/ehca/ehca_reqs.c
index 8fd88cd828fd..e3ec7fdd67bd 100644
--- a/drivers/infiniband/hw/ehca/ehca_reqs.c
+++ b/drivers/infiniband/hw/ehca/ehca_reqs.c
@@ -400,7 +400,6 @@ static inline void map_ib_wc_status(u32 cqe_status,
400 400
401static inline int post_one_send(struct ehca_qp *my_qp, 401static inline int post_one_send(struct ehca_qp *my_qp,
402 struct ib_send_wr *cur_send_wr, 402 struct ib_send_wr *cur_send_wr,
403 struct ib_send_wr **bad_send_wr,
404 int hidden) 403 int hidden)
405{ 404{
406 struct ehca_wqe *wqe_p; 405 struct ehca_wqe *wqe_p;
@@ -412,8 +411,6 @@ static inline int post_one_send(struct ehca_qp *my_qp,
412 wqe_p = ipz_qeit_get_inc(&my_qp->ipz_squeue); 411 wqe_p = ipz_qeit_get_inc(&my_qp->ipz_squeue);
413 if (unlikely(!wqe_p)) { 412 if (unlikely(!wqe_p)) {
414 /* too many posted work requests: queue overflow */ 413 /* too many posted work requests: queue overflow */
415 if (bad_send_wr)
416 *bad_send_wr = cur_send_wr;
417 ehca_err(my_qp->ib_qp.device, "Too many posted WQEs " 414 ehca_err(my_qp->ib_qp.device, "Too many posted WQEs "
418 "qp_num=%x", my_qp->ib_qp.qp_num); 415 "qp_num=%x", my_qp->ib_qp.qp_num);
419 return -ENOMEM; 416 return -ENOMEM;
@@ -433,8 +430,6 @@ static inline int post_one_send(struct ehca_qp *my_qp,
433 */ 430 */
434 if (unlikely(ret)) { 431 if (unlikely(ret)) {
435 my_qp->ipz_squeue.current_q_offset = start_offset; 432 my_qp->ipz_squeue.current_q_offset = start_offset;
436 if (bad_send_wr)
437 *bad_send_wr = cur_send_wr;
438 ehca_err(my_qp->ib_qp.device, "Could not write WQE " 433 ehca_err(my_qp->ib_qp.device, "Could not write WQE "
439 "qp_num=%x", my_qp->ib_qp.qp_num); 434 "qp_num=%x", my_qp->ib_qp.qp_num);
440 return -EINVAL; 435 return -EINVAL;
@@ -448,7 +443,6 @@ int ehca_post_send(struct ib_qp *qp,
448 struct ib_send_wr **bad_send_wr) 443 struct ib_send_wr **bad_send_wr)
449{ 444{
450 struct ehca_qp *my_qp = container_of(qp, struct ehca_qp, ib_qp); 445 struct ehca_qp *my_qp = container_of(qp, struct ehca_qp, ib_qp);
451 struct ib_send_wr *cur_send_wr;
452 int wqe_cnt = 0; 446 int wqe_cnt = 0;
453 int ret = 0; 447 int ret = 0;
454 unsigned long flags; 448 unsigned long flags;
@@ -457,7 +451,8 @@ int ehca_post_send(struct ib_qp *qp,
457 if (unlikely(my_qp->state < IB_QPS_RTS)) { 451 if (unlikely(my_qp->state < IB_QPS_RTS)) {
458 ehca_err(qp->device, "Invalid QP state qp_state=%d qpn=%x", 452 ehca_err(qp->device, "Invalid QP state qp_state=%d qpn=%x",
459 my_qp->state, qp->qp_num); 453 my_qp->state, qp->qp_num);
460 return -EINVAL; 454 ret = -EINVAL;
455 goto out;
461 } 456 }
462 457
463 /* LOCK the QUEUE */ 458 /* LOCK the QUEUE */
@@ -476,24 +471,21 @@ int ehca_post_send(struct ib_qp *qp,
476 struct ib_send_wr circ_wr; 471 struct ib_send_wr circ_wr;
477 memset(&circ_wr, 0, sizeof(circ_wr)); 472 memset(&circ_wr, 0, sizeof(circ_wr));
478 circ_wr.opcode = IB_WR_RDMA_READ; 473 circ_wr.opcode = IB_WR_RDMA_READ;
479 post_one_send(my_qp, &circ_wr, NULL, 1); /* ignore retcode */ 474 post_one_send(my_qp, &circ_wr, 1); /* ignore retcode */
480 wqe_cnt++; 475 wqe_cnt++;
481 ehca_dbg(qp->device, "posted circ wr qp_num=%x", qp->qp_num); 476 ehca_dbg(qp->device, "posted circ wr qp_num=%x", qp->qp_num);
482 my_qp->message_count = my_qp->packet_count = 0; 477 my_qp->message_count = my_qp->packet_count = 0;
483 } 478 }
484 479
485 /* loop processes list of send reqs */ 480 /* loop processes list of send reqs */
486 for (cur_send_wr = send_wr; cur_send_wr != NULL; 481 while (send_wr) {
487 cur_send_wr = cur_send_wr->next) { 482 ret = post_one_send(my_qp, send_wr, 0);
488 ret = post_one_send(my_qp, cur_send_wr, bad_send_wr, 0);
489 if (unlikely(ret)) { 483 if (unlikely(ret)) {
490 /* if one or more WQEs were successful, don't fail */
491 if (wqe_cnt)
492 ret = 0;
493 goto post_send_exit0; 484 goto post_send_exit0;
494 } 485 }
495 wqe_cnt++; 486 wqe_cnt++;
496 } /* eof for cur_send_wr */ 487 send_wr = send_wr->next;
488 }
497 489
498post_send_exit0: 490post_send_exit0:
499 iosync(); /* serialize GAL register access */ 491 iosync(); /* serialize GAL register access */
@@ -503,6 +495,10 @@ post_send_exit0:
503 my_qp, qp->qp_num, wqe_cnt, ret); 495 my_qp, qp->qp_num, wqe_cnt, ret);
504 my_qp->message_count += wqe_cnt; 496 my_qp->message_count += wqe_cnt;
505 spin_unlock_irqrestore(&my_qp->spinlock_s, flags); 497 spin_unlock_irqrestore(&my_qp->spinlock_s, flags);
498
499out:
500 if (ret)
501 *bad_send_wr = send_wr;
506 return ret; 502 return ret;
507} 503}
508 504
@@ -511,7 +507,6 @@ static int internal_post_recv(struct ehca_qp *my_qp,
511 struct ib_recv_wr *recv_wr, 507 struct ib_recv_wr *recv_wr,
512 struct ib_recv_wr **bad_recv_wr) 508 struct ib_recv_wr **bad_recv_wr)
513{ 509{
514 struct ib_recv_wr *cur_recv_wr;
515 struct ehca_wqe *wqe_p; 510 struct ehca_wqe *wqe_p;
516 int wqe_cnt = 0; 511 int wqe_cnt = 0;
517 int ret = 0; 512 int ret = 0;
@@ -522,27 +517,23 @@ static int internal_post_recv(struct ehca_qp *my_qp,
522 if (unlikely(!HAS_RQ(my_qp))) { 517 if (unlikely(!HAS_RQ(my_qp))) {
523 ehca_err(dev, "QP has no RQ ehca_qp=%p qp_num=%x ext_type=%d", 518 ehca_err(dev, "QP has no RQ ehca_qp=%p qp_num=%x ext_type=%d",
524 my_qp, my_qp->real_qp_num, my_qp->ext_type); 519 my_qp, my_qp->real_qp_num, my_qp->ext_type);
525 return -ENODEV; 520 ret = -ENODEV;
521 goto out;
526 } 522 }
527 523
528 /* LOCK the QUEUE */ 524 /* LOCK the QUEUE */
529 spin_lock_irqsave(&my_qp->spinlock_r, flags); 525 spin_lock_irqsave(&my_qp->spinlock_r, flags);
530 526
531 /* loop processes list of send reqs */ 527 /* loop processes list of recv reqs */
532 for (cur_recv_wr = recv_wr; cur_recv_wr != NULL; 528 while (recv_wr) {
533 cur_recv_wr = cur_recv_wr->next) {
534 u64 start_offset = my_qp->ipz_rqueue.current_q_offset; 529 u64 start_offset = my_qp->ipz_rqueue.current_q_offset;
535 /* get pointer next to free WQE */ 530 /* get pointer next to free WQE */
536 wqe_p = ipz_qeit_get_inc(&my_qp->ipz_rqueue); 531 wqe_p = ipz_qeit_get_inc(&my_qp->ipz_rqueue);
537 if (unlikely(!wqe_p)) { 532 if (unlikely(!wqe_p)) {
538 /* too many posted work requests: queue overflow */ 533 /* too many posted work requests: queue overflow */
539 if (bad_recv_wr) 534 ret = -ENOMEM;
540 *bad_recv_wr = cur_recv_wr; 535 ehca_err(dev, "Too many posted WQEs "
541 if (wqe_cnt == 0) { 536 "qp_num=%x", my_qp->real_qp_num);
542 ret = -ENOMEM;
543 ehca_err(dev, "Too many posted WQEs "
544 "qp_num=%x", my_qp->real_qp_num);
545 }
546 goto post_recv_exit0; 537 goto post_recv_exit0;
547 } 538 }
548 /* 539 /*
@@ -552,7 +543,7 @@ static int internal_post_recv(struct ehca_qp *my_qp,
552 rq_map_idx = start_offset / my_qp->ipz_rqueue.qe_size; 543 rq_map_idx = start_offset / my_qp->ipz_rqueue.qe_size;
553 544
554 /* write a RECV WQE into the QUEUE */ 545 /* write a RECV WQE into the QUEUE */
555 ret = ehca_write_rwqe(&my_qp->ipz_rqueue, wqe_p, cur_recv_wr, 546 ret = ehca_write_rwqe(&my_qp->ipz_rqueue, wqe_p, recv_wr,
556 rq_map_idx); 547 rq_map_idx);
557 /* 548 /*
558 * if something failed, 549 * if something failed,
@@ -560,22 +551,20 @@ static int internal_post_recv(struct ehca_qp *my_qp,
560 */ 551 */
561 if (unlikely(ret)) { 552 if (unlikely(ret)) {
562 my_qp->ipz_rqueue.current_q_offset = start_offset; 553 my_qp->ipz_rqueue.current_q_offset = start_offset;
563 *bad_recv_wr = cur_recv_wr; 554 ret = -EINVAL;
564 if (wqe_cnt == 0) { 555 ehca_err(dev, "Could not write WQE "
565 ret = -EINVAL; 556 "qp_num=%x", my_qp->real_qp_num);
566 ehca_err(dev, "Could not write WQE "
567 "qp_num=%x", my_qp->real_qp_num);
568 }
569 goto post_recv_exit0; 557 goto post_recv_exit0;
570 } 558 }
571 559
572 qmap_entry = &my_qp->rq_map.map[rq_map_idx]; 560 qmap_entry = &my_qp->rq_map.map[rq_map_idx];
573 qmap_entry->app_wr_id = get_app_wr_id(cur_recv_wr->wr_id); 561 qmap_entry->app_wr_id = get_app_wr_id(recv_wr->wr_id);
574 qmap_entry->reported = 0; 562 qmap_entry->reported = 0;
575 qmap_entry->cqe_req = 1; 563 qmap_entry->cqe_req = 1;
576 564
577 wqe_cnt++; 565 wqe_cnt++;
578 } /* eof for cur_recv_wr */ 566 recv_wr = recv_wr->next;
567 } /* eof for recv_wr */
579 568
580post_recv_exit0: 569post_recv_exit0:
581 iosync(); /* serialize GAL register access */ 570 iosync(); /* serialize GAL register access */
@@ -584,6 +573,11 @@ post_recv_exit0:
584 ehca_dbg(dev, "ehca_qp=%p qp_num=%x wqe_cnt=%d ret=%i", 573 ehca_dbg(dev, "ehca_qp=%p qp_num=%x wqe_cnt=%d ret=%i",
585 my_qp, my_qp->real_qp_num, wqe_cnt, ret); 574 my_qp, my_qp->real_qp_num, wqe_cnt, ret);
586 spin_unlock_irqrestore(&my_qp->spinlock_r, flags); 575 spin_unlock_irqrestore(&my_qp->spinlock_r, flags);
576
577out:
578 if (ret)
579 *bad_recv_wr = recv_wr;
580
587 return ret; 581 return ret;
588} 582}
589 583
@@ -597,6 +591,7 @@ int ehca_post_recv(struct ib_qp *qp,
597 if (unlikely(my_qp->state == IB_QPS_RESET)) { 591 if (unlikely(my_qp->state == IB_QPS_RESET)) {
598 ehca_err(qp->device, "Invalid QP state qp_state=%d qpn=%x", 592 ehca_err(qp->device, "Invalid QP state qp_state=%d qpn=%x",
599 my_qp->state, qp->qp_num); 593 my_qp->state, qp->qp_num);
594 *bad_recv_wr = recv_wr;
600 return -EINVAL; 595 return -EINVAL;
601 } 596 }
602 597
diff --git a/drivers/infiniband/hw/ipath/ipath_driver.c b/drivers/infiniband/hw/ipath/ipath_driver.c
index 013d1380e77c..d2787fe80304 100644
--- a/drivers/infiniband/hw/ipath/ipath_driver.c
+++ b/drivers/infiniband/hw/ipath/ipath_driver.c
@@ -39,6 +39,7 @@
39#include <linux/delay.h> 39#include <linux/delay.h>
40#include <linux/netdevice.h> 40#include <linux/netdevice.h>
41#include <linux/vmalloc.h> 41#include <linux/vmalloc.h>
42#include <linux/bitmap.h>
42 43
43#include "ipath_kernel.h" 44#include "ipath_kernel.h"
44#include "ipath_verbs.h" 45#include "ipath_verbs.h"
@@ -1697,7 +1698,7 @@ void ipath_chg_pioavailkernel(struct ipath_devdata *dd, unsigned start,
1697 unsigned len, int avail) 1698 unsigned len, int avail)
1698{ 1699{
1699 unsigned long flags; 1700 unsigned long flags;
1700 unsigned end, cnt = 0, next; 1701 unsigned end, cnt = 0;
1701 1702
1702 /* There are two bits per send buffer (busy and generation) */ 1703 /* There are two bits per send buffer (busy and generation) */
1703 start *= 2; 1704 start *= 2;
@@ -1748,12 +1749,7 @@ void ipath_chg_pioavailkernel(struct ipath_devdata *dd, unsigned start,
1748 1749
1749 if (dd->ipath_pioupd_thresh) { 1750 if (dd->ipath_pioupd_thresh) {
1750 end = 2 * (dd->ipath_piobcnt2k + dd->ipath_piobcnt4k); 1751 end = 2 * (dd->ipath_piobcnt2k + dd->ipath_piobcnt4k);
1751 next = find_first_bit(dd->ipath_pioavailkernel, end); 1752 cnt = bitmap_weight(dd->ipath_pioavailkernel, end);
1752 while (next < end) {
1753 cnt++;
1754 next = find_next_bit(dd->ipath_pioavailkernel, end,
1755 next + 1);
1756 }
1757 } 1753 }
1758 spin_unlock_irqrestore(&ipath_pioavail_lock, flags); 1754 spin_unlock_irqrestore(&ipath_pioavail_lock, flags);
1759 1755
diff --git a/drivers/infiniband/hw/ipath/ipath_fs.c b/drivers/infiniband/hw/ipath/ipath_fs.c
index b3684060465e..100da8542bba 100644
--- a/drivers/infiniband/hw/ipath/ipath_fs.c
+++ b/drivers/infiniband/hw/ipath/ipath_fs.c
@@ -346,10 +346,8 @@ static int ipathfs_fill_super(struct super_block *sb, void *data,
346 list_for_each_entry_safe(dd, tmp, &ipath_dev_list, ipath_list) { 346 list_for_each_entry_safe(dd, tmp, &ipath_dev_list, ipath_list) {
347 spin_unlock_irqrestore(&ipath_devs_lock, flags); 347 spin_unlock_irqrestore(&ipath_devs_lock, flags);
348 ret = create_device_files(sb, dd); 348 ret = create_device_files(sb, dd);
349 if (ret) { 349 if (ret)
350 deactivate_locked_super(sb);
351 goto bail; 350 goto bail;
352 }
353 spin_lock_irqsave(&ipath_devs_lock, flags); 351 spin_lock_irqsave(&ipath_devs_lock, flags);
354 } 352 }
355 353
diff --git a/drivers/infiniband/hw/mlx4/main.c b/drivers/infiniband/hw/mlx4/main.c
index 3cb3f47a10b8..e596537ff353 100644
--- a/drivers/infiniband/hw/mlx4/main.c
+++ b/drivers/infiniband/hw/mlx4/main.c
@@ -103,7 +103,7 @@ static int mlx4_ib_query_device(struct ib_device *ibdev,
103 props->device_cap_flags |= IB_DEVICE_UD_AV_PORT_ENFORCE; 103 props->device_cap_flags |= IB_DEVICE_UD_AV_PORT_ENFORCE;
104 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_IPOIB_CSUM) 104 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_IPOIB_CSUM)
105 props->device_cap_flags |= IB_DEVICE_UD_IP_CSUM; 105 props->device_cap_flags |= IB_DEVICE_UD_IP_CSUM;
106 if (dev->dev->caps.max_gso_sz) 106 if (dev->dev->caps.max_gso_sz && dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_BLH)
107 props->device_cap_flags |= IB_DEVICE_UD_TSO; 107 props->device_cap_flags |= IB_DEVICE_UD_TSO;
108 if (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_RESERVED_LKEY) 108 if (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_RESERVED_LKEY)
109 props->device_cap_flags |= IB_DEVICE_LOCAL_DMA_LKEY; 109 props->device_cap_flags |= IB_DEVICE_LOCAL_DMA_LKEY;
diff --git a/drivers/infiniband/hw/mlx4/qp.c b/drivers/infiniband/hw/mlx4/qp.c
index 256a00c6aeea..2a97c964b9ef 100644
--- a/drivers/infiniband/hw/mlx4/qp.c
+++ b/drivers/infiniband/hw/mlx4/qp.c
@@ -54,7 +54,8 @@ enum {
54 /* 54 /*
55 * Largest possible UD header: send with GRH and immediate data. 55 * Largest possible UD header: send with GRH and immediate data.
56 */ 56 */
57 MLX4_IB_UD_HEADER_SIZE = 72 57 MLX4_IB_UD_HEADER_SIZE = 72,
58 MLX4_IB_LSO_HEADER_SPARE = 128,
58}; 59};
59 60
60struct mlx4_ib_sqp { 61struct mlx4_ib_sqp {
@@ -67,7 +68,8 @@ struct mlx4_ib_sqp {
67}; 68};
68 69
69enum { 70enum {
70 MLX4_IB_MIN_SQ_STRIDE = 6 71 MLX4_IB_MIN_SQ_STRIDE = 6,
72 MLX4_IB_CACHE_LINE_SIZE = 64,
71}; 73};
72 74
73static const __be32 mlx4_ib_opcode[] = { 75static const __be32 mlx4_ib_opcode[] = {
@@ -261,7 +263,7 @@ static int send_wqe_overhead(enum ib_qp_type type, u32 flags)
261 case IB_QPT_UD: 263 case IB_QPT_UD:
262 return sizeof (struct mlx4_wqe_ctrl_seg) + 264 return sizeof (struct mlx4_wqe_ctrl_seg) +
263 sizeof (struct mlx4_wqe_datagram_seg) + 265 sizeof (struct mlx4_wqe_datagram_seg) +
264 ((flags & MLX4_IB_QP_LSO) ? 64 : 0); 266 ((flags & MLX4_IB_QP_LSO) ? MLX4_IB_LSO_HEADER_SPARE : 0);
265 case IB_QPT_UC: 267 case IB_QPT_UC:
266 return sizeof (struct mlx4_wqe_ctrl_seg) + 268 return sizeof (struct mlx4_wqe_ctrl_seg) +
267 sizeof (struct mlx4_wqe_raddr_seg); 269 sizeof (struct mlx4_wqe_raddr_seg);
@@ -897,7 +899,6 @@ static int __mlx4_ib_modify_qp(struct ib_qp *ibqp,
897 899
898 context->flags = cpu_to_be32((to_mlx4_state(new_state) << 28) | 900 context->flags = cpu_to_be32((to_mlx4_state(new_state) << 28) |
899 (to_mlx4_st(ibqp->qp_type) << 16)); 901 (to_mlx4_st(ibqp->qp_type) << 16));
900 context->flags |= cpu_to_be32(1 << 8); /* DE? */
901 902
902 if (!(attr_mask & IB_QP_PATH_MIG_STATE)) 903 if (!(attr_mask & IB_QP_PATH_MIG_STATE))
903 context->flags |= cpu_to_be32(MLX4_QP_PM_MIGRATED << 11); 904 context->flags |= cpu_to_be32(MLX4_QP_PM_MIGRATED << 11);
@@ -1467,16 +1468,12 @@ static void __set_data_seg(struct mlx4_wqe_data_seg *dseg, struct ib_sge *sg)
1467 1468
1468static int build_lso_seg(struct mlx4_wqe_lso_seg *wqe, struct ib_send_wr *wr, 1469static int build_lso_seg(struct mlx4_wqe_lso_seg *wqe, struct ib_send_wr *wr,
1469 struct mlx4_ib_qp *qp, unsigned *lso_seg_len, 1470 struct mlx4_ib_qp *qp, unsigned *lso_seg_len,
1470 __be32 *lso_hdr_sz) 1471 __be32 *lso_hdr_sz, __be32 *blh)
1471{ 1472{
1472 unsigned halign = ALIGN(sizeof *wqe + wr->wr.ud.hlen, 16); 1473 unsigned halign = ALIGN(sizeof *wqe + wr->wr.ud.hlen, 16);
1473 1474
1474 /* 1475 if (unlikely(halign > MLX4_IB_CACHE_LINE_SIZE))
1475 * This is a temporary limitation and will be removed in 1476 *blh = cpu_to_be32(1 << 6);
1476 * a forthcoming FW release:
1477 */
1478 if (unlikely(halign > 64))
1479 return -EINVAL;
1480 1477
1481 if (unlikely(!(qp->flags & MLX4_IB_QP_LSO) && 1478 if (unlikely(!(qp->flags & MLX4_IB_QP_LSO) &&
1482 wr->num_sge > qp->sq.max_gs - (halign >> 4))) 1479 wr->num_sge > qp->sq.max_gs - (halign >> 4)))
@@ -1522,6 +1519,7 @@ int mlx4_ib_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr,
1522 __be32 dummy; 1519 __be32 dummy;
1523 __be32 *lso_wqe; 1520 __be32 *lso_wqe;
1524 __be32 uninitialized_var(lso_hdr_sz); 1521 __be32 uninitialized_var(lso_hdr_sz);
1522 __be32 blh;
1525 int i; 1523 int i;
1526 1524
1527 spin_lock_irqsave(&qp->sq.lock, flags); 1525 spin_lock_irqsave(&qp->sq.lock, flags);
@@ -1530,6 +1528,7 @@ int mlx4_ib_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr,
1530 1528
1531 for (nreq = 0; wr; ++nreq, wr = wr->next) { 1529 for (nreq = 0; wr; ++nreq, wr = wr->next) {
1532 lso_wqe = &dummy; 1530 lso_wqe = &dummy;
1531 blh = 0;
1533 1532
1534 if (mlx4_wq_overflow(&qp->sq, nreq, qp->ibqp.send_cq)) { 1533 if (mlx4_wq_overflow(&qp->sq, nreq, qp->ibqp.send_cq)) {
1535 err = -ENOMEM; 1534 err = -ENOMEM;
@@ -1616,7 +1615,7 @@ int mlx4_ib_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr,
1616 size += sizeof (struct mlx4_wqe_datagram_seg) / 16; 1615 size += sizeof (struct mlx4_wqe_datagram_seg) / 16;
1617 1616
1618 if (wr->opcode == IB_WR_LSO) { 1617 if (wr->opcode == IB_WR_LSO) {
1619 err = build_lso_seg(wqe, wr, qp, &seglen, &lso_hdr_sz); 1618 err = build_lso_seg(wqe, wr, qp, &seglen, &lso_hdr_sz, &blh);
1620 if (unlikely(err)) { 1619 if (unlikely(err)) {
1621 *bad_wr = wr; 1620 *bad_wr = wr;
1622 goto out; 1621 goto out;
@@ -1687,7 +1686,7 @@ int mlx4_ib_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr,
1687 } 1686 }
1688 1687
1689 ctrl->owner_opcode = mlx4_ib_opcode[wr->opcode] | 1688 ctrl->owner_opcode = mlx4_ib_opcode[wr->opcode] |
1690 (ind & qp->sq.wqe_cnt ? cpu_to_be32(1 << 31) : 0); 1689 (ind & qp->sq.wqe_cnt ? cpu_to_be32(1 << 31) : 0) | blh;
1691 1690
1692 stamp = ind + qp->sq_spare_wqes; 1691 stamp = ind + qp->sq_spare_wqes;
1693 ind += DIV_ROUND_UP(size * 16, 1U << qp->sq.wqe_shift); 1692 ind += DIV_ROUND_UP(size * 16, 1U << qp->sq.wqe_shift);
@@ -1753,7 +1752,7 @@ int mlx4_ib_post_recv(struct ib_qp *ibqp, struct ib_recv_wr *wr,
1753 ind = qp->rq.head & (qp->rq.wqe_cnt - 1); 1752 ind = qp->rq.head & (qp->rq.wqe_cnt - 1);
1754 1753
1755 for (nreq = 0; wr; ++nreq, wr = wr->next) { 1754 for (nreq = 0; wr; ++nreq, wr = wr->next) {
1756 if (mlx4_wq_overflow(&qp->rq, nreq, qp->ibqp.send_cq)) { 1755 if (mlx4_wq_overflow(&qp->rq, nreq, qp->ibqp.recv_cq)) {
1757 err = -ENOMEM; 1756 err = -ENOMEM;
1758 *bad_wr = wr; 1757 *bad_wr = wr;
1759 goto out; 1758 goto out;
diff --git a/drivers/infiniband/hw/mlx4/srq.c b/drivers/infiniband/hw/mlx4/srq.c
index d42565258fb7..cf8085bcbd6d 100644
--- a/drivers/infiniband/hw/mlx4/srq.c
+++ b/drivers/infiniband/hw/mlx4/srq.c
@@ -74,6 +74,7 @@ struct ib_srq *mlx4_ib_create_srq(struct ib_pd *pd,
74 struct mlx4_ib_dev *dev = to_mdev(pd->device); 74 struct mlx4_ib_dev *dev = to_mdev(pd->device);
75 struct mlx4_ib_srq *srq; 75 struct mlx4_ib_srq *srq;
76 struct mlx4_wqe_srq_next_seg *next; 76 struct mlx4_wqe_srq_next_seg *next;
77 struct mlx4_wqe_data_seg *scatter;
77 int desc_size; 78 int desc_size;
78 int buf_size; 79 int buf_size;
79 int err; 80 int err;
@@ -149,6 +150,11 @@ struct ib_srq *mlx4_ib_create_srq(struct ib_pd *pd,
149 next = get_wqe(srq, i); 150 next = get_wqe(srq, i);
150 next->next_wqe_index = 151 next->next_wqe_index =
151 cpu_to_be16((i + 1) & (srq->msrq.max - 1)); 152 cpu_to_be16((i + 1) & (srq->msrq.max - 1));
153
154 for (scatter = (void *) (next + 1);
155 (void *) scatter < (void *) next + desc_size;
156 ++scatter)
157 scatter->lkey = cpu_to_be32(MLX4_INVALID_LKEY);
152 } 158 }
153 159
154 err = mlx4_mtt_init(dev->dev, srq->buf.npages, srq->buf.page_shift, 160 err = mlx4_mtt_init(dev->dev, srq->buf.npages, srq->buf.page_shift,
diff --git a/drivers/infiniband/hw/nes/Kconfig b/drivers/infiniband/hw/nes/Kconfig
index d449eb6ec78e..846dc97cf260 100644
--- a/drivers/infiniband/hw/nes/Kconfig
+++ b/drivers/infiniband/hw/nes/Kconfig
@@ -4,14 +4,13 @@ config INFINIBAND_NES
4 select LIBCRC32C 4 select LIBCRC32C
5 select INET_LRO 5 select INET_LRO
6 ---help--- 6 ---help---
7 This is a low-level driver for NetEffect RDMA enabled 7 This is the RDMA Network Interface Card (RNIC) driver for
8 Network Interface Cards (RNIC). 8 NetEffect Ethernet Cluster Server Adapters.
9 9
10config INFINIBAND_NES_DEBUG 10config INFINIBAND_NES_DEBUG
11 bool "Verbose debugging output" 11 bool "Verbose debugging output"
12 depends on INFINIBAND_NES 12 depends on INFINIBAND_NES
13 default n 13 default n
14 ---help--- 14 ---help---
15 This option causes the NetEffect RNIC driver to produce debug 15 This option enables debug messages from the NetEffect RNIC
16 messages. Select this if you are developing the driver 16 driver. Select this if you are diagnosing a problem.
17 or trying to diagnose a problem.
diff --git a/drivers/infiniband/hw/nes/nes.c b/drivers/infiniband/hw/nes/nes.c
index cbde0cfe27e0..b9d09bafd6c1 100644
--- a/drivers/infiniband/hw/nes/nes.c
+++ b/drivers/infiniband/hw/nes/nes.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * Copyright (c) 2006 - 2009 Intel-NE, Inc. All rights reserved. 2 * Copyright (c) 2006 - 2009 Intel Corporation. All rights reserved.
3 * Copyright (c) 2005 Open Grid Computing, Inc. All rights reserved. 3 * Copyright (c) 2005 Open Grid Computing, Inc. All rights reserved.
4 * 4 *
5 * This software is available to you under a choice of one of two 5 * This software is available to you under a choice of one of two
@@ -521,7 +521,8 @@ static int __devinit nes_probe(struct pci_dev *pcidev, const struct pci_device_i
521 spin_lock_init(&nesdev->indexed_regs_lock); 521 spin_lock_init(&nesdev->indexed_regs_lock);
522 522
523 /* Remap the PCI registers in adapter BAR0 to kernel VA space */ 523 /* Remap the PCI registers in adapter BAR0 to kernel VA space */
524 mmio_regs = ioremap_nocache(pci_resource_start(pcidev, BAR_0), sizeof(mmio_regs)); 524 mmio_regs = ioremap_nocache(pci_resource_start(pcidev, BAR_0),
525 pci_resource_len(pcidev, BAR_0));
525 if (mmio_regs == NULL) { 526 if (mmio_regs == NULL) {
526 printk(KERN_ERR PFX "Unable to remap BAR0\n"); 527 printk(KERN_ERR PFX "Unable to remap BAR0\n");
527 ret = -EIO; 528 ret = -EIO;
diff --git a/drivers/infiniband/hw/nes/nes.h b/drivers/infiniband/hw/nes/nes.h
index bcc6abc4faff..98840564bb2f 100644
--- a/drivers/infiniband/hw/nes/nes.h
+++ b/drivers/infiniband/hw/nes/nes.h
@@ -1,5 +1,5 @@
1/* 1/*
2 * Copyright (c) 2006 - 2009 Intel-NE, Inc. All rights reserved. 2 * Copyright (c) 2006 - 2009 Intel Corporation. All rights reserved.
3 * Copyright (c) 2005 Open Grid Computing, Inc. All rights reserved. 3 * Copyright (c) 2005 Open Grid Computing, Inc. All rights reserved.
4 * 4 *
5 * This software is available to you under a choice of one of two 5 * This software is available to you under a choice of one of two
diff --git a/drivers/infiniband/hw/nes/nes_cm.c b/drivers/infiniband/hw/nes/nes_cm.c
index 73473db19863..39468c277036 100644
--- a/drivers/infiniband/hw/nes/nes_cm.c
+++ b/drivers/infiniband/hw/nes/nes_cm.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * Copyright (c) 2006 - 2009 Intel-NE, Inc. All rights reserved. 2 * Copyright (c) 2006 - 2009 Intel Corporation. All rights reserved.
3 * 3 *
4 * This software is available to you under a choice of one of two 4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU 5 * licenses. You may choose to be licensed under the terms of the GNU
@@ -52,6 +52,7 @@
52#include <linux/random.h> 52#include <linux/random.h>
53#include <linux/list.h> 53#include <linux/list.h>
54#include <linux/threads.h> 54#include <linux/threads.h>
55#include <linux/highmem.h>
55#include <net/arp.h> 56#include <net/arp.h>
56#include <net/neighbour.h> 57#include <net/neighbour.h>
57#include <net/route.h> 58#include <net/route.h>
@@ -251,6 +252,33 @@ static int parse_mpa(struct nes_cm_node *cm_node, u8 *buffer, u32 *type,
251 252
252 mpa_frame = (struct ietf_mpa_frame *)buffer; 253 mpa_frame = (struct ietf_mpa_frame *)buffer;
253 cm_node->mpa_frame_size = ntohs(mpa_frame->priv_data_len); 254 cm_node->mpa_frame_size = ntohs(mpa_frame->priv_data_len);
255 /* make sure mpa private data len is less than 512 bytes */
256 if (cm_node->mpa_frame_size > IETF_MAX_PRIV_DATA_LEN) {
257 nes_debug(NES_DBG_CM, "The received Length of Private"
258 " Data field exceeds 512 octets\n");
259 return -EINVAL;
260 }
261 /*
262 * make sure MPA receiver interoperate with the
263 * received MPA version and MPA key information
264 *
265 */
266 if (mpa_frame->rev != mpa_version) {
267 nes_debug(NES_DBG_CM, "The received mpa version"
268 " can not be interoperated\n");
269 return -EINVAL;
270 }
271 if (cm_node->state != NES_CM_STATE_MPAREQ_SENT) {
272 if (memcmp(mpa_frame->key, IEFT_MPA_KEY_REQ, IETF_MPA_KEY_SIZE)) {
273 nes_debug(NES_DBG_CM, "Unexpected MPA Key received \n");
274 return -EINVAL;
275 }
276 } else {
277 if (memcmp(mpa_frame->key, IEFT_MPA_KEY_REP, IETF_MPA_KEY_SIZE)) {
278 nes_debug(NES_DBG_CM, "Unexpected MPA Key received \n");
279 return -EINVAL;
280 }
281 }
254 282
255 if (cm_node->mpa_frame_size + sizeof(struct ietf_mpa_frame) != len) { 283 if (cm_node->mpa_frame_size + sizeof(struct ietf_mpa_frame) != len) {
256 nes_debug(NES_DBG_CM, "The received ietf buffer was not right" 284 nes_debug(NES_DBG_CM, "The received ietf buffer was not right"
@@ -486,6 +514,8 @@ static void nes_retrans_expired(struct nes_cm_node *cm_node)
486 send_reset(cm_node, NULL); 514 send_reset(cm_node, NULL);
487 break; 515 break;
488 default: 516 default:
517 add_ref_cm_node(cm_node);
518 send_reset(cm_node, NULL);
489 create_event(cm_node, NES_CM_EVENT_ABORTED); 519 create_event(cm_node, NES_CM_EVENT_ABORTED);
490 } 520 }
491} 521}
@@ -949,6 +979,7 @@ static int mini_cm_dec_refcnt_listen(struct nes_cm_core *cm_core,
949 reset_entry); 979 reset_entry);
950 { 980 {
951 struct nes_cm_node *loopback = cm_node->loopbackpartner; 981 struct nes_cm_node *loopback = cm_node->loopbackpartner;
982 enum nes_cm_node_state old_state;
952 if (NES_CM_STATE_FIN_WAIT1 <= cm_node->state) { 983 if (NES_CM_STATE_FIN_WAIT1 <= cm_node->state) {
953 rem_ref_cm_node(cm_node->cm_core, cm_node); 984 rem_ref_cm_node(cm_node->cm_core, cm_node);
954 } else { 985 } else {
@@ -960,11 +991,12 @@ static int mini_cm_dec_refcnt_listen(struct nes_cm_core *cm_core,
960 NES_CM_STATE_CLOSED; 991 NES_CM_STATE_CLOSED;
961 WARN_ON(1); 992 WARN_ON(1);
962 } else { 993 } else {
963 cm_node->state = 994 old_state = cm_node->state;
964 NES_CM_STATE_CLOSED; 995 cm_node->state = NES_CM_STATE_LISTENER_DESTROYED;
965 rem_ref_cm_node( 996 if (old_state != NES_CM_STATE_MPAREQ_RCVD)
966 cm_node->cm_core, 997 rem_ref_cm_node(
967 cm_node); 998 cm_node->cm_core,
999 cm_node);
968 } 1000 }
969 } else { 1001 } else {
970 struct nes_cm_event event; 1002 struct nes_cm_event event;
@@ -980,20 +1012,9 @@ static int mini_cm_dec_refcnt_listen(struct nes_cm_core *cm_core,
980 loopback->loc_port; 1012 loopback->loc_port;
981 event.cm_info.cm_id = loopback->cm_id; 1013 event.cm_info.cm_id = loopback->cm_id;
982 cm_event_connect_error(&event); 1014 cm_event_connect_error(&event);
1015 cm_node->state = NES_CM_STATE_LISTENER_DESTROYED;
983 loopback->state = NES_CM_STATE_CLOSED; 1016 loopback->state = NES_CM_STATE_CLOSED;
984 1017
985 event.cm_node = cm_node;
986 event.cm_info.rem_addr =
987 cm_node->rem_addr;
988 event.cm_info.loc_addr =
989 cm_node->loc_addr;
990 event.cm_info.rem_port =
991 cm_node->rem_port;
992 event.cm_info.loc_port =
993 cm_node->loc_port;
994 event.cm_info.cm_id = cm_node->cm_id;
995 cm_event_reset(&event);
996
997 rem_ref_cm_node(cm_node->cm_core, 1018 rem_ref_cm_node(cm_node->cm_core,
998 cm_node); 1019 cm_node);
999 1020
@@ -1077,12 +1098,13 @@ static inline int mini_cm_accelerated(struct nes_cm_core *cm_core,
1077/** 1098/**
1078 * nes_addr_resolve_neigh 1099 * nes_addr_resolve_neigh
1079 */ 1100 */
1080static int nes_addr_resolve_neigh(struct nes_vnic *nesvnic, u32 dst_ip) 1101static int nes_addr_resolve_neigh(struct nes_vnic *nesvnic, u32 dst_ip, int arpindex)
1081{ 1102{
1082 struct rtable *rt; 1103 struct rtable *rt;
1083 struct flowi fl; 1104 struct flowi fl;
1084 struct neighbour *neigh; 1105 struct neighbour *neigh;
1085 int rc = -1; 1106 int rc = arpindex;
1107 struct nes_adapter *nesadapter = nesvnic->nesdev->nesadapter;
1086 1108
1087 memset(&fl, 0, sizeof fl); 1109 memset(&fl, 0, sizeof fl);
1088 fl.nl_u.ip4_u.daddr = htonl(dst_ip); 1110 fl.nl_u.ip4_u.daddr = htonl(dst_ip);
@@ -1098,6 +1120,21 @@ static int nes_addr_resolve_neigh(struct nes_vnic *nesvnic, u32 dst_ip)
1098 nes_debug(NES_DBG_CM, "Neighbor MAC address for 0x%08X" 1120 nes_debug(NES_DBG_CM, "Neighbor MAC address for 0x%08X"
1099 " is %pM, Gateway is 0x%08X \n", dst_ip, 1121 " is %pM, Gateway is 0x%08X \n", dst_ip,
1100 neigh->ha, ntohl(rt->rt_gateway)); 1122 neigh->ha, ntohl(rt->rt_gateway));
1123
1124 if (arpindex >= 0) {
1125 if (!memcmp(nesadapter->arp_table[arpindex].mac_addr,
1126 neigh->ha, ETH_ALEN)){
1127 /* Mac address same as in nes_arp_table */
1128 neigh_release(neigh);
1129 ip_rt_put(rt);
1130 return rc;
1131 }
1132
1133 nes_manage_arp_cache(nesvnic->netdev,
1134 nesadapter->arp_table[arpindex].mac_addr,
1135 dst_ip, NES_ARP_DELETE);
1136 }
1137
1101 nes_manage_arp_cache(nesvnic->netdev, neigh->ha, 1138 nes_manage_arp_cache(nesvnic->netdev, neigh->ha,
1102 dst_ip, NES_ARP_ADD); 1139 dst_ip, NES_ARP_ADD);
1103 rc = nes_arp_table(nesvnic->nesdev, dst_ip, NULL, 1140 rc = nes_arp_table(nesvnic->nesdev, dst_ip, NULL,
@@ -1113,7 +1150,6 @@ static int nes_addr_resolve_neigh(struct nes_vnic *nesvnic, u32 dst_ip)
1113 return rc; 1150 return rc;
1114} 1151}
1115 1152
1116
1117/** 1153/**
1118 * make_cm_node - create a new instance of a cm node 1154 * make_cm_node - create a new instance of a cm node
1119 */ 1155 */
@@ -1123,6 +1159,7 @@ static struct nes_cm_node *make_cm_node(struct nes_cm_core *cm_core,
1123{ 1159{
1124 struct nes_cm_node *cm_node; 1160 struct nes_cm_node *cm_node;
1125 struct timespec ts; 1161 struct timespec ts;
1162 int oldarpindex = 0;
1126 int arpindex = 0; 1163 int arpindex = 0;
1127 struct nes_device *nesdev; 1164 struct nes_device *nesdev;
1128 struct nes_adapter *nesadapter; 1165 struct nes_adapter *nesadapter;
@@ -1176,17 +1213,18 @@ static struct nes_cm_node *make_cm_node(struct nes_cm_core *cm_core,
1176 nesadapter = nesdev->nesadapter; 1213 nesadapter = nesdev->nesadapter;
1177 1214
1178 cm_node->loopbackpartner = NULL; 1215 cm_node->loopbackpartner = NULL;
1216
1179 /* get the mac addr for the remote node */ 1217 /* get the mac addr for the remote node */
1180 if (ipv4_is_loopback(htonl(cm_node->rem_addr))) 1218 if (ipv4_is_loopback(htonl(cm_node->rem_addr)))
1181 arpindex = nes_arp_table(nesdev, ntohl(nesvnic->local_ipaddr), NULL, NES_ARP_RESOLVE); 1219 arpindex = nes_arp_table(nesdev, ntohl(nesvnic->local_ipaddr), NULL, NES_ARP_RESOLVE);
1182 else 1220 else {
1183 arpindex = nes_arp_table(nesdev, cm_node->rem_addr, NULL, NES_ARP_RESOLVE); 1221 oldarpindex = nes_arp_table(nesdev, cm_node->rem_addr, NULL, NES_ARP_RESOLVE);
1222 arpindex = nes_addr_resolve_neigh(nesvnic, cm_info->rem_addr, oldarpindex);
1223
1224 }
1184 if (arpindex < 0) { 1225 if (arpindex < 0) {
1185 arpindex = nes_addr_resolve_neigh(nesvnic, cm_info->rem_addr); 1226 kfree(cm_node);
1186 if (arpindex < 0) { 1227 return NULL;
1187 kfree(cm_node);
1188 return NULL;
1189 }
1190 } 1228 }
1191 1229
1192 /* copy the mac addr to node context */ 1230 /* copy the mac addr to node context */
@@ -1333,13 +1371,20 @@ static void handle_fin_pkt(struct nes_cm_node *cm_node)
1333 case NES_CM_STATE_SYN_RCVD: 1371 case NES_CM_STATE_SYN_RCVD:
1334 case NES_CM_STATE_SYN_SENT: 1372 case NES_CM_STATE_SYN_SENT:
1335 case NES_CM_STATE_ESTABLISHED: 1373 case NES_CM_STATE_ESTABLISHED:
1336 case NES_CM_STATE_MPAREQ_SENT:
1337 case NES_CM_STATE_MPAREJ_RCVD: 1374 case NES_CM_STATE_MPAREJ_RCVD:
1338 cm_node->tcp_cntxt.rcv_nxt++; 1375 cm_node->tcp_cntxt.rcv_nxt++;
1339 cleanup_retrans_entry(cm_node); 1376 cleanup_retrans_entry(cm_node);
1340 cm_node->state = NES_CM_STATE_LAST_ACK; 1377 cm_node->state = NES_CM_STATE_LAST_ACK;
1341 send_fin(cm_node, NULL); 1378 send_fin(cm_node, NULL);
1342 break; 1379 break;
1380 case NES_CM_STATE_MPAREQ_SENT:
1381 create_event(cm_node, NES_CM_EVENT_ABORTED);
1382 cm_node->tcp_cntxt.rcv_nxt++;
1383 cleanup_retrans_entry(cm_node);
1384 cm_node->state = NES_CM_STATE_CLOSED;
1385 add_ref_cm_node(cm_node);
1386 send_reset(cm_node, NULL);
1387 break;
1343 case NES_CM_STATE_FIN_WAIT1: 1388 case NES_CM_STATE_FIN_WAIT1:
1344 cm_node->tcp_cntxt.rcv_nxt++; 1389 cm_node->tcp_cntxt.rcv_nxt++;
1345 cleanup_retrans_entry(cm_node); 1390 cleanup_retrans_entry(cm_node);
@@ -1590,6 +1635,7 @@ static void handle_syn_pkt(struct nes_cm_node *cm_node, struct sk_buff *skb,
1590 break; 1635 break;
1591 case NES_CM_STATE_CLOSED: 1636 case NES_CM_STATE_CLOSED:
1592 cleanup_retrans_entry(cm_node); 1637 cleanup_retrans_entry(cm_node);
1638 add_ref_cm_node(cm_node);
1593 send_reset(cm_node, skb); 1639 send_reset(cm_node, skb);
1594 break; 1640 break;
1595 case NES_CM_STATE_TSA: 1641 case NES_CM_STATE_TSA:
@@ -1641,9 +1687,15 @@ static void handle_synack_pkt(struct nes_cm_node *cm_node, struct sk_buff *skb,
1641 passive_open_err(cm_node, skb, 1); 1687 passive_open_err(cm_node, skb, 1);
1642 break; 1688 break;
1643 case NES_CM_STATE_LISTENING: 1689 case NES_CM_STATE_LISTENING:
1690 cm_node->tcp_cntxt.loc_seq_num = ntohl(tcph->ack_seq);
1691 cleanup_retrans_entry(cm_node);
1692 cm_node->state = NES_CM_STATE_CLOSED;
1693 send_reset(cm_node, skb);
1694 break;
1644 case NES_CM_STATE_CLOSED: 1695 case NES_CM_STATE_CLOSED:
1645 cm_node->tcp_cntxt.loc_seq_num = ntohl(tcph->ack_seq); 1696 cm_node->tcp_cntxt.loc_seq_num = ntohl(tcph->ack_seq);
1646 cleanup_retrans_entry(cm_node); 1697 cleanup_retrans_entry(cm_node);
1698 add_ref_cm_node(cm_node);
1647 send_reset(cm_node, skb); 1699 send_reset(cm_node, skb);
1648 break; 1700 break;
1649 case NES_CM_STATE_ESTABLISHED: 1701 case NES_CM_STATE_ESTABLISHED:
@@ -1712,8 +1764,13 @@ static int handle_ack_pkt(struct nes_cm_node *cm_node, struct sk_buff *skb,
1712 dev_kfree_skb_any(skb); 1764 dev_kfree_skb_any(skb);
1713 break; 1765 break;
1714 case NES_CM_STATE_LISTENING: 1766 case NES_CM_STATE_LISTENING:
1767 cleanup_retrans_entry(cm_node);
1768 cm_node->state = NES_CM_STATE_CLOSED;
1769 send_reset(cm_node, skb);
1770 break;
1715 case NES_CM_STATE_CLOSED: 1771 case NES_CM_STATE_CLOSED:
1716 cleanup_retrans_entry(cm_node); 1772 cleanup_retrans_entry(cm_node);
1773 add_ref_cm_node(cm_node);
1717 send_reset(cm_node, skb); 1774 send_reset(cm_node, skb);
1718 break; 1775 break;
1719 case NES_CM_STATE_LAST_ACK: 1776 case NES_CM_STATE_LAST_ACK:
@@ -1974,7 +2031,7 @@ static struct nes_cm_node *mini_cm_connect(struct nes_cm_core *cm_core,
1974 if (!cm_node) 2031 if (!cm_node)
1975 return NULL; 2032 return NULL;
1976 mpa_frame = &cm_node->mpa_frame; 2033 mpa_frame = &cm_node->mpa_frame;
1977 strcpy(mpa_frame->key, IEFT_MPA_KEY_REQ); 2034 memcpy(mpa_frame->key, IEFT_MPA_KEY_REQ, IETF_MPA_KEY_SIZE);
1978 mpa_frame->flags = IETF_MPA_FLAGS_CRC; 2035 mpa_frame->flags = IETF_MPA_FLAGS_CRC;
1979 mpa_frame->rev = IETF_MPA_VERSION; 2036 mpa_frame->rev = IETF_MPA_VERSION;
1980 mpa_frame->priv_data_len = htons(private_data_len); 2037 mpa_frame->priv_data_len = htons(private_data_len);
@@ -2102,30 +2159,39 @@ static int mini_cm_reject(struct nes_cm_core *cm_core,
2102 cm_node->state = NES_CM_STATE_CLOSED; 2159 cm_node->state = NES_CM_STATE_CLOSED;
2103 rem_ref_cm_node(cm_core, cm_node); 2160 rem_ref_cm_node(cm_core, cm_node);
2104 } else { 2161 } else {
2105 ret = send_mpa_reject(cm_node); 2162 if (cm_node->state == NES_CM_STATE_LISTENER_DESTROYED) {
2106 if (ret) { 2163 rem_ref_cm_node(cm_core, cm_node);
2107 cm_node->state = NES_CM_STATE_CLOSED; 2164 } else {
2108 err = send_reset(cm_node, NULL); 2165 ret = send_mpa_reject(cm_node);
2109 if (err) 2166 if (ret) {
2110 WARN_ON(1); 2167 cm_node->state = NES_CM_STATE_CLOSED;
2111 } else 2168 err = send_reset(cm_node, NULL);
2112 cm_id->add_ref(cm_id); 2169 if (err)
2170 WARN_ON(1);
2171 } else
2172 cm_id->add_ref(cm_id);
2173 }
2113 } 2174 }
2114 } else { 2175 } else {
2115 cm_node->cm_id = NULL; 2176 cm_node->cm_id = NULL;
2116 event.cm_node = loopback; 2177 if (cm_node->state == NES_CM_STATE_LISTENER_DESTROYED) {
2117 event.cm_info.rem_addr = loopback->rem_addr; 2178 rem_ref_cm_node(cm_core, cm_node);
2118 event.cm_info.loc_addr = loopback->loc_addr; 2179 rem_ref_cm_node(cm_core, loopback);
2119 event.cm_info.rem_port = loopback->rem_port; 2180 } else {
2120 event.cm_info.loc_port = loopback->loc_port; 2181 event.cm_node = loopback;
2121 event.cm_info.cm_id = loopback->cm_id; 2182 event.cm_info.rem_addr = loopback->rem_addr;
2122 cm_event_mpa_reject(&event); 2183 event.cm_info.loc_addr = loopback->loc_addr;
2123 rem_ref_cm_node(cm_core, cm_node); 2184 event.cm_info.rem_port = loopback->rem_port;
2124 loopback->state = NES_CM_STATE_CLOSING; 2185 event.cm_info.loc_port = loopback->loc_port;
2186 event.cm_info.cm_id = loopback->cm_id;
2187 cm_event_mpa_reject(&event);
2188 rem_ref_cm_node(cm_core, cm_node);
2189 loopback->state = NES_CM_STATE_CLOSING;
2125 2190
2126 cm_id = loopback->cm_id; 2191 cm_id = loopback->cm_id;
2127 rem_ref_cm_node(cm_core, loopback); 2192 rem_ref_cm_node(cm_core, loopback);
2128 cm_id->rem_ref(cm_id); 2193 cm_id->rem_ref(cm_id);
2194 }
2129 } 2195 }
2130 2196
2131 return ret; 2197 return ret;
@@ -2164,11 +2230,15 @@ static int mini_cm_close(struct nes_cm_core *cm_core, struct nes_cm_node *cm_nod
2164 case NES_CM_STATE_CLOSING: 2230 case NES_CM_STATE_CLOSING:
2165 ret = -1; 2231 ret = -1;
2166 break; 2232 break;
2167 case NES_CM_STATE_MPAREJ_RCVD:
2168 case NES_CM_STATE_LISTENING: 2233 case NES_CM_STATE_LISTENING:
2234 cleanup_retrans_entry(cm_node);
2235 send_reset(cm_node, NULL);
2236 break;
2237 case NES_CM_STATE_MPAREJ_RCVD:
2169 case NES_CM_STATE_UNKNOWN: 2238 case NES_CM_STATE_UNKNOWN:
2170 case NES_CM_STATE_INITED: 2239 case NES_CM_STATE_INITED:
2171 case NES_CM_STATE_CLOSED: 2240 case NES_CM_STATE_CLOSED:
2241 case NES_CM_STATE_LISTENER_DESTROYED:
2172 ret = rem_ref_cm_node(cm_core, cm_node); 2242 ret = rem_ref_cm_node(cm_core, cm_node);
2173 break; 2243 break;
2174 case NES_CM_STATE_TSA: 2244 case NES_CM_STATE_TSA:
@@ -2687,8 +2757,6 @@ int nes_accept(struct iw_cm_id *cm_id, struct iw_cm_conn_param *conn_param)
2687 struct nes_pd *nespd; 2757 struct nes_pd *nespd;
2688 u64 tagged_offset; 2758 u64 tagged_offset;
2689 2759
2690
2691
2692 ibqp = nes_get_qp(cm_id->device, conn_param->qpn); 2760 ibqp = nes_get_qp(cm_id->device, conn_param->qpn);
2693 if (!ibqp) 2761 if (!ibqp)
2694 return -EINVAL; 2762 return -EINVAL;
@@ -2704,6 +2772,13 @@ int nes_accept(struct iw_cm_id *cm_id, struct iw_cm_conn_param *conn_param)
2704 "%s\n", cm_node, nesvnic, nesvnic->netdev, 2772 "%s\n", cm_node, nesvnic, nesvnic->netdev,
2705 nesvnic->netdev->name); 2773 nesvnic->netdev->name);
2706 2774
2775 if (NES_CM_STATE_LISTENER_DESTROYED == cm_node->state) {
2776 if (cm_node->loopbackpartner)
2777 rem_ref_cm_node(cm_node->cm_core, cm_node->loopbackpartner);
2778 rem_ref_cm_node(cm_node->cm_core, cm_node);
2779 return -EINVAL;
2780 }
2781
2707 /* associate the node with the QP */ 2782 /* associate the node with the QP */
2708 nesqp->cm_node = (void *)cm_node; 2783 nesqp->cm_node = (void *)cm_node;
2709 cm_node->nesqp = nesqp; 2784 cm_node->nesqp = nesqp;
@@ -2786,6 +2861,10 @@ int nes_accept(struct iw_cm_id *cm_id, struct iw_cm_conn_param *conn_param)
2786 cpu_to_le32(conn_param->private_data_len + 2861 cpu_to_le32(conn_param->private_data_len +
2787 sizeof(struct ietf_mpa_frame)); 2862 sizeof(struct ietf_mpa_frame));
2788 wqe->wqe_words[NES_IWARP_SQ_WQE_STAG0_IDX] = ibmr->lkey; 2863 wqe->wqe_words[NES_IWARP_SQ_WQE_STAG0_IDX] = ibmr->lkey;
2864 if (nesqp->sq_kmapped) {
2865 nesqp->sq_kmapped = 0;
2866 kunmap(nesqp->page);
2867 }
2789 2868
2790 nesqp->nesqp_context->ird_ord_sizes |= 2869 nesqp->nesqp_context->ird_ord_sizes |=
2791 cpu_to_le32(NES_QPCONTEXT_ORDIRD_LSMM_PRESENT | 2870 cpu_to_le32(NES_QPCONTEXT_ORDIRD_LSMM_PRESENT |
@@ -2929,7 +3008,7 @@ int nes_reject(struct iw_cm_id *cm_id, const void *pdata, u8 pdata_len)
2929 if (cm_node->mpa_frame_size > MAX_CM_BUFFER) 3008 if (cm_node->mpa_frame_size > MAX_CM_BUFFER)
2930 return -EINVAL; 3009 return -EINVAL;
2931 3010
2932 strcpy(&cm_node->mpa_frame.key[0], IEFT_MPA_KEY_REP); 3011 memcpy(&cm_node->mpa_frame.key[0], IEFT_MPA_KEY_REP, IETF_MPA_KEY_SIZE);
2933 if (loopback) { 3012 if (loopback) {
2934 memcpy(&loopback->mpa_frame.priv_data, pdata, pdata_len); 3013 memcpy(&loopback->mpa_frame.priv_data, pdata, pdata_len);
2935 loopback->mpa_frame.priv_data_len = pdata_len; 3014 loopback->mpa_frame.priv_data_len = pdata_len;
@@ -2974,6 +3053,9 @@ int nes_connect(struct iw_cm_id *cm_id, struct iw_cm_conn_param *conn_param)
2974 if (!nesdev) 3053 if (!nesdev)
2975 return -EINVAL; 3054 return -EINVAL;
2976 3055
3056 if (!(cm_id->local_addr.sin_port) || !(cm_id->remote_addr.sin_port))
3057 return -EINVAL;
3058
2977 nes_debug(NES_DBG_CM, "QP%u, current IP = 0x%08X, Destination IP = " 3059 nes_debug(NES_DBG_CM, "QP%u, current IP = 0x%08X, Destination IP = "
2978 "0x%08X:0x%04X, local = 0x%08X:0x%04X.\n", nesqp->hwqp.qp_id, 3060 "0x%08X:0x%04X, local = 0x%08X:0x%04X.\n", nesqp->hwqp.qp_id,
2979 ntohl(nesvnic->local_ipaddr), 3061 ntohl(nesvnic->local_ipaddr),
@@ -3251,6 +3333,11 @@ static void cm_event_connected(struct nes_cm_event *event)
3251 wqe->wqe_words[NES_IWARP_SQ_WQE_LENGTH0_IDX] = 0; 3333 wqe->wqe_words[NES_IWARP_SQ_WQE_LENGTH0_IDX] = 0;
3252 wqe->wqe_words[NES_IWARP_SQ_WQE_STAG0_IDX] = 0; 3334 wqe->wqe_words[NES_IWARP_SQ_WQE_STAG0_IDX] = 0;
3253 3335
3336 if (nesqp->sq_kmapped) {
3337 nesqp->sq_kmapped = 0;
3338 kunmap(nesqp->page);
3339 }
3340
3254 /* use the reserved spot on the WQ for the extra first WQE */ 3341 /* use the reserved spot on the WQ for the extra first WQE */
3255 nesqp->nesqp_context->ird_ord_sizes &= 3342 nesqp->nesqp_context->ird_ord_sizes &=
3256 cpu_to_le32(~(NES_QPCONTEXT_ORDIRD_LSMM_PRESENT | 3343 cpu_to_le32(~(NES_QPCONTEXT_ORDIRD_LSMM_PRESENT |
@@ -3346,7 +3433,7 @@ static void cm_event_connect_error(struct nes_cm_event *event)
3346 nesqp->cm_id = NULL; 3433 nesqp->cm_id = NULL;
3347 cm_id->provider_data = NULL; 3434 cm_id->provider_data = NULL;
3348 cm_event.event = IW_CM_EVENT_CONNECT_REPLY; 3435 cm_event.event = IW_CM_EVENT_CONNECT_REPLY;
3349 cm_event.status = IW_CM_EVENT_STATUS_REJECTED; 3436 cm_event.status = -ECONNRESET;
3350 cm_event.provider_data = cm_id->provider_data; 3437 cm_event.provider_data = cm_id->provider_data;
3351 cm_event.local_addr = cm_id->local_addr; 3438 cm_event.local_addr = cm_id->local_addr;
3352 cm_event.remote_addr = cm_id->remote_addr; 3439 cm_event.remote_addr = cm_id->remote_addr;
@@ -3390,6 +3477,8 @@ static void cm_event_reset(struct nes_cm_event *event)
3390 3477
3391 nes_debug(NES_DBG_CM, "%p - cm_id = %p\n", event->cm_node, cm_id); 3478 nes_debug(NES_DBG_CM, "%p - cm_id = %p\n", event->cm_node, cm_id);
3392 nesqp = cm_id->provider_data; 3479 nesqp = cm_id->provider_data;
3480 if (!nesqp)
3481 return;
3393 3482
3394 nesqp->cm_id = NULL; 3483 nesqp->cm_id = NULL;
3395 /* cm_id->provider_data = NULL; */ 3484 /* cm_id->provider_data = NULL; */
@@ -3401,8 +3490,8 @@ static void cm_event_reset(struct nes_cm_event *event)
3401 cm_event.private_data = NULL; 3490 cm_event.private_data = NULL;
3402 cm_event.private_data_len = 0; 3491 cm_event.private_data_len = 0;
3403 3492
3404 ret = cm_id->event_handler(cm_id, &cm_event);
3405 cm_id->add_ref(cm_id); 3493 cm_id->add_ref(cm_id);
3494 ret = cm_id->event_handler(cm_id, &cm_event);
3406 atomic_inc(&cm_closes); 3495 atomic_inc(&cm_closes);
3407 cm_event.event = IW_CM_EVENT_CLOSE; 3496 cm_event.event = IW_CM_EVENT_CLOSE;
3408 cm_event.status = IW_CM_EVENT_STATUS_OK; 3497 cm_event.status = IW_CM_EVENT_STATUS_OK;
diff --git a/drivers/infiniband/hw/nes/nes_cm.h b/drivers/infiniband/hw/nes/nes_cm.h
index 90e8e4d8a5ce..d9825fda70a1 100644
--- a/drivers/infiniband/hw/nes/nes_cm.h
+++ b/drivers/infiniband/hw/nes/nes_cm.h
@@ -1,5 +1,5 @@
1/* 1/*
2 * Copyright (c) 2006 - 2009 Intel-NE, Inc. All rights reserved. 2 * Copyright (c) 2006 - 2009 Intel Corporation. All rights reserved.
3 * 3 *
4 * This software is available to you under a choice of one of two 4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU 5 * licenses. You may choose to be licensed under the terms of the GNU
@@ -47,6 +47,8 @@
47#define IEFT_MPA_KEY_REP "MPA ID Rep Frame" 47#define IEFT_MPA_KEY_REP "MPA ID Rep Frame"
48#define IETF_MPA_KEY_SIZE 16 48#define IETF_MPA_KEY_SIZE 16
49#define IETF_MPA_VERSION 1 49#define IETF_MPA_VERSION 1
50#define IETF_MAX_PRIV_DATA_LEN 512
51#define IETF_MPA_FRAME_SIZE 20
50 52
51enum ietf_mpa_flags { 53enum ietf_mpa_flags {
52 IETF_MPA_FLAGS_MARKERS = 0x80, /* receive Markers */ 54 IETF_MPA_FLAGS_MARKERS = 0x80, /* receive Markers */
@@ -169,7 +171,7 @@ struct nes_timer_entry {
169 171
170#define NES_CM_DEF_SEQ2 0x18ed5740 172#define NES_CM_DEF_SEQ2 0x18ed5740
171#define NES_CM_DEF_LOCAL_ID2 0xb807 173#define NES_CM_DEF_LOCAL_ID2 0xb807
172#define MAX_CM_BUFFER 512 174#define MAX_CM_BUFFER (IETF_MPA_FRAME_SIZE + IETF_MAX_PRIV_DATA_LEN)
173 175
174 176
175typedef u32 nes_addr_t; 177typedef u32 nes_addr_t;
@@ -198,6 +200,7 @@ enum nes_cm_node_state {
198 NES_CM_STATE_TIME_WAIT, 200 NES_CM_STATE_TIME_WAIT,
199 NES_CM_STATE_LAST_ACK, 201 NES_CM_STATE_LAST_ACK,
200 NES_CM_STATE_CLOSING, 202 NES_CM_STATE_CLOSING,
203 NES_CM_STATE_LISTENER_DESTROYED,
201 NES_CM_STATE_CLOSED 204 NES_CM_STATE_CLOSED
202}; 205};
203 206
diff --git a/drivers/infiniband/hw/nes/nes_context.h b/drivers/infiniband/hw/nes/nes_context.h
index 0fb8d81d9a62..b4393a16099d 100644
--- a/drivers/infiniband/hw/nes/nes_context.h
+++ b/drivers/infiniband/hw/nes/nes_context.h
@@ -1,5 +1,5 @@
1/* 1/*
2 * Copyright (c) 2006 - 2009 Intel-NE, Inc. All rights reserved. 2 * Copyright (c) 2006 - 2009 Intel Corporation. All rights reserved.
3 * 3 *
4 * This software is available to you under a choice of one of two 4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU 5 * licenses. You may choose to be licensed under the terms of the GNU
diff --git a/drivers/infiniband/hw/nes/nes_hw.c b/drivers/infiniband/hw/nes/nes_hw.c
index 3512d6de3019..b1c2cbb88f09 100644
--- a/drivers/infiniband/hw/nes/nes_hw.c
+++ b/drivers/infiniband/hw/nes/nes_hw.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * Copyright (c) 2006 - 2009 Intel-NE, Inc. All rights reserved. 2 * Copyright (c) 2006 - 2009 Intel Corporation. All rights reserved.
3 * 3 *
4 * This software is available to you under a choice of one of two 4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU 5 * licenses. You may choose to be licensed under the terms of the GNU
@@ -424,8 +424,9 @@ struct nes_adapter *nes_init_adapter(struct nes_device *nesdev, u8 hw_rev) {
424 424
425 nesadapter->base_pd = 1; 425 nesadapter->base_pd = 1;
426 426
427 nesadapter->device_cap_flags = 427 nesadapter->device_cap_flags = IB_DEVICE_LOCAL_DMA_LKEY |
428 IB_DEVICE_LOCAL_DMA_LKEY | IB_DEVICE_MEM_WINDOW; 428 IB_DEVICE_MEM_WINDOW |
429 IB_DEVICE_MEM_MGT_EXTENSIONS;
429 430
430 nesadapter->allocated_qps = (unsigned long *)&(((unsigned char *)nesadapter) 431 nesadapter->allocated_qps = (unsigned long *)&(((unsigned char *)nesadapter)
431 [(sizeof(struct nes_adapter)+(sizeof(unsigned long)-1))&(~(sizeof(unsigned long)-1))]); 432 [(sizeof(struct nes_adapter)+(sizeof(unsigned long)-1))&(~(sizeof(unsigned long)-1))]);
@@ -436,11 +437,12 @@ struct nes_adapter *nes_init_adapter(struct nes_device *nesdev, u8 hw_rev) {
436 nesadapter->qp_table = (struct nes_qp **)(&nesadapter->allocated_arps[BITS_TO_LONGS(arp_table_size)]); 437 nesadapter->qp_table = (struct nes_qp **)(&nesadapter->allocated_arps[BITS_TO_LONGS(arp_table_size)]);
437 438
438 439
439 /* mark the usual suspect QPs and CQs as in use */ 440 /* mark the usual suspect QPs, MR and CQs as in use */
440 for (u32temp = 0; u32temp < NES_FIRST_QPN; u32temp++) { 441 for (u32temp = 0; u32temp < NES_FIRST_QPN; u32temp++) {
441 set_bit(u32temp, nesadapter->allocated_qps); 442 set_bit(u32temp, nesadapter->allocated_qps);
442 set_bit(u32temp, nesadapter->allocated_cqs); 443 set_bit(u32temp, nesadapter->allocated_cqs);
443 } 444 }
445 set_bit(0, nesadapter->allocated_mrs);
444 446
445 for (u32temp = 0; u32temp < 20; u32temp++) 447 for (u32temp = 0; u32temp < 20; u32temp++)
446 set_bit(u32temp, nesadapter->allocated_pds); 448 set_bit(u32temp, nesadapter->allocated_pds);
@@ -481,7 +483,7 @@ struct nes_adapter *nes_init_adapter(struct nes_device *nesdev, u8 hw_rev) {
481 nesadapter->max_irrq_wr = (u32temp >> 16) & 3; 483 nesadapter->max_irrq_wr = (u32temp >> 16) & 3;
482 484
483 nesadapter->max_sge = 4; 485 nesadapter->max_sge = 4;
484 nesadapter->max_cqe = 32767; 486 nesadapter->max_cqe = 32766;
485 487
486 if (nes_read_eeprom_values(nesdev, nesadapter)) { 488 if (nes_read_eeprom_values(nesdev, nesadapter)) {
487 printk(KERN_ERR PFX "Unable to read EEPROM data.\n"); 489 printk(KERN_ERR PFX "Unable to read EEPROM data.\n");
@@ -1355,6 +1357,8 @@ int nes_init_phy(struct nes_device *nesdev)
1355 } 1357 }
1356 if ((phy_type == NES_PHY_TYPE_ARGUS) || 1358 if ((phy_type == NES_PHY_TYPE_ARGUS) ||
1357 (phy_type == NES_PHY_TYPE_SFP_D)) { 1359 (phy_type == NES_PHY_TYPE_SFP_D)) {
1360 u32 first_time = 1;
1361
1358 /* Check firmware heartbeat */ 1362 /* Check firmware heartbeat */
1359 nes_read_10G_phy_reg(nesdev, phy_index, 0x3, 0xd7ee); 1363 nes_read_10G_phy_reg(nesdev, phy_index, 0x3, 0xd7ee);
1360 temp_phy_data = (u16)nes_read_indexed(nesdev, NES_IDX_MAC_MDIO_CONTROL); 1364 temp_phy_data = (u16)nes_read_indexed(nesdev, NES_IDX_MAC_MDIO_CONTROL);
@@ -1362,8 +1366,13 @@ int nes_init_phy(struct nes_device *nesdev)
1362 nes_read_10G_phy_reg(nesdev, phy_index, 0x3, 0xd7ee); 1366 nes_read_10G_phy_reg(nesdev, phy_index, 0x3, 0xd7ee);
1363 temp_phy_data2 = (u16)nes_read_indexed(nesdev, NES_IDX_MAC_MDIO_CONTROL); 1367 temp_phy_data2 = (u16)nes_read_indexed(nesdev, NES_IDX_MAC_MDIO_CONTROL);
1364 1368
1365 if (temp_phy_data != temp_phy_data2) 1369 if (temp_phy_data != temp_phy_data2) {
1366 return 0; 1370 nes_read_10G_phy_reg(nesdev, phy_index, 0x3, 0xd7fd);
1371 temp_phy_data = (u16)nes_read_indexed(nesdev, NES_IDX_MAC_MDIO_CONTROL);
1372 if ((temp_phy_data & 0xff) > 0x20)
1373 return 0;
1374 printk(PFX "Reinitializing PHY\n");
1375 }
1367 1376
1368 /* no heartbeat, configure the PHY */ 1377 /* no heartbeat, configure the PHY */
1369 nes_write_10G_phy_reg(nesdev, phy_index, 0x1, 0x0000, 0x8000); 1378 nes_write_10G_phy_reg(nesdev, phy_index, 0x1, 0x0000, 0x8000);
@@ -1399,7 +1408,7 @@ int nes_init_phy(struct nes_device *nesdev)
1399 temp_phy_data = (u16)nes_read_indexed(nesdev, NES_IDX_MAC_MDIO_CONTROL); 1408 temp_phy_data = (u16)nes_read_indexed(nesdev, NES_IDX_MAC_MDIO_CONTROL);
1400 do { 1409 do {
1401 if (counter++ > 150) { 1410 if (counter++ > 150) {
1402 nes_debug(NES_DBG_PHY, "No PHY heartbeat\n"); 1411 printk(PFX "No PHY heartbeat\n");
1403 break; 1412 break;
1404 } 1413 }
1405 mdelay(1); 1414 mdelay(1);
@@ -1413,11 +1422,20 @@ int nes_init_phy(struct nes_device *nesdev)
1413 nes_read_10G_phy_reg(nesdev, phy_index, 0x3, 0xd7fd); 1422 nes_read_10G_phy_reg(nesdev, phy_index, 0x3, 0xd7fd);
1414 temp_phy_data = (u16)nes_read_indexed(nesdev, NES_IDX_MAC_MDIO_CONTROL); 1423 temp_phy_data = (u16)nes_read_indexed(nesdev, NES_IDX_MAC_MDIO_CONTROL);
1415 if (counter++ > 300) { 1424 if (counter++ > 300) {
1416 nes_debug(NES_DBG_PHY, "PHY did not track\n"); 1425 if (((temp_phy_data & 0xff) == 0x0) && first_time) {
1417 break; 1426 first_time = 0;
1427 counter = 0;
1428 /* reset AMCC PHY and try again */
1429 nes_write_10G_phy_reg(nesdev, phy_index, 0x3, 0xe854, 0x00c0);
1430 nes_write_10G_phy_reg(nesdev, phy_index, 0x3, 0xe854, 0x0040);
1431 continue;
1432 } else {
1433 printk(PFX "PHY did not track\n");
1434 break;
1435 }
1418 } 1436 }
1419 mdelay(10); 1437 mdelay(10);
1420 } while (((temp_phy_data & 0xff) != 0x50) && ((temp_phy_data & 0xff) != 0x70)); 1438 } while ((temp_phy_data & 0xff) < 0x30);
1421 1439
1422 /* setup signal integrity */ 1440 /* setup signal integrity */
1423 nes_write_10G_phy_reg(nesdev, phy_index, 0x1, 0xd003, 0x0000); 1441 nes_write_10G_phy_reg(nesdev, phy_index, 0x1, 0xd003, 0x0000);
diff --git a/drivers/infiniband/hw/nes/nes_hw.h b/drivers/infiniband/hw/nes/nes_hw.h
index f28a41ba9fa1..084be0ee689b 100644
--- a/drivers/infiniband/hw/nes/nes_hw.h
+++ b/drivers/infiniband/hw/nes/nes_hw.h
@@ -1,5 +1,5 @@
1/* 1/*
2* Copyright (c) 2006 - 2009 Intel-NE, Inc. All rights reserved. 2* Copyright (c) 2006 - 2009 Intel Corporation. All rights reserved.
3* 3*
4* This software is available to you under a choice of one of two 4* This software is available to you under a choice of one of two
5* licenses. You may choose to be licensed under the terms of the GNU 5* licenses. You may choose to be licensed under the terms of the GNU
@@ -546,11 +546,23 @@ enum nes_iwarp_sq_fmr_wqe_word_idx {
546 NES_IWARP_SQ_FMR_WQE_PBL_LENGTH_IDX = 14, 546 NES_IWARP_SQ_FMR_WQE_PBL_LENGTH_IDX = 14,
547}; 547};
548 548
549enum nes_iwarp_sq_fmr_opcodes {
550 NES_IWARP_SQ_FMR_WQE_ZERO_BASED = (1<<6),
551 NES_IWARP_SQ_FMR_WQE_PAGE_SIZE_4K = (0<<7),
552 NES_IWARP_SQ_FMR_WQE_PAGE_SIZE_2M = (1<<7),
553 NES_IWARP_SQ_FMR_WQE_RIGHTS_ENABLE_LOCAL_READ = (1<<16),
554 NES_IWARP_SQ_FMR_WQE_RIGHTS_ENABLE_LOCAL_WRITE = (1<<17),
555 NES_IWARP_SQ_FMR_WQE_RIGHTS_ENABLE_REMOTE_READ = (1<<18),
556 NES_IWARP_SQ_FMR_WQE_RIGHTS_ENABLE_REMOTE_WRITE = (1<<19),
557 NES_IWARP_SQ_FMR_WQE_RIGHTS_ENABLE_WINDOW_BIND = (1<<20),
558};
559
560#define NES_IWARP_SQ_FMR_WQE_MR_LENGTH_HIGH_MASK 0xFF;
561
549enum nes_iwarp_sq_locinv_wqe_word_idx { 562enum nes_iwarp_sq_locinv_wqe_word_idx {
550 NES_IWARP_SQ_LOCINV_WQE_INV_STAG_IDX = 6, 563 NES_IWARP_SQ_LOCINV_WQE_INV_STAG_IDX = 6,
551}; 564};
552 565
553
554enum nes_iwarp_rq_wqe_word_idx { 566enum nes_iwarp_rq_wqe_word_idx {
555 NES_IWARP_RQ_WQE_TOTAL_PAYLOAD_IDX = 1, 567 NES_IWARP_RQ_WQE_TOTAL_PAYLOAD_IDX = 1,
556 NES_IWARP_RQ_WQE_COMP_CTX_LOW_IDX = 2, 568 NES_IWARP_RQ_WQE_COMP_CTX_LOW_IDX = 2,
@@ -1153,6 +1165,19 @@ struct nes_pbl {
1153 /* TODO: need to add list for two level tables */ 1165 /* TODO: need to add list for two level tables */
1154}; 1166};
1155 1167
1168#define NES_4K_PBL_CHUNK_SIZE 4096
1169
1170struct nes_fast_mr_wqe_pbl {
1171 u64 *kva;
1172 dma_addr_t paddr;
1173};
1174
1175struct nes_ib_fast_reg_page_list {
1176 struct ib_fast_reg_page_list ibfrpl;
1177 struct nes_fast_mr_wqe_pbl nes_wqe_pbl;
1178 u64 pbl;
1179};
1180
1156struct nes_listener { 1181struct nes_listener {
1157 struct work_struct work; 1182 struct work_struct work;
1158 struct workqueue_struct *wq; 1183 struct workqueue_struct *wq;
diff --git a/drivers/infiniband/hw/nes/nes_nic.c b/drivers/infiniband/hw/nes/nes_nic.c
index de18fdfdadf2..ab1102780186 100644
--- a/drivers/infiniband/hw/nes/nes_nic.c
+++ b/drivers/infiniband/hw/nes/nes_nic.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * Copyright (c) 2006 - 2009 Intel-NE, Inc. All rights reserved. 2 * Copyright (c) 2006 - 2009 Intel Corporation. All rights reserved.
3 * 3 *
4 * This software is available to you under a choice of one of two 4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU 5 * licenses. You may choose to be licensed under the terms of the GNU
diff --git a/drivers/infiniband/hw/nes/nes_user.h b/drivers/infiniband/hw/nes/nes_user.h
index cc90c14b49eb..71e133ab209b 100644
--- a/drivers/infiniband/hw/nes/nes_user.h
+++ b/drivers/infiniband/hw/nes/nes_user.h
@@ -1,5 +1,5 @@
1/* 1/*
2 * Copyright (c) 2006 - 2009 Intel-NE, Inc. All rights reserved. 2 * Copyright (c) 2006 - 2009 Intel Corporation. All rights reserved.
3 * Copyright (c) 2005 Topspin Communications. All rights reserved. 3 * Copyright (c) 2005 Topspin Communications. All rights reserved.
4 * Copyright (c) 2005 Cisco Systems. All rights reserved. 4 * Copyright (c) 2005 Cisco Systems. All rights reserved.
5 * Copyright (c) 2005 Open Grid Computing, Inc. All rights reserved. 5 * Copyright (c) 2005 Open Grid Computing, Inc. All rights reserved.
@@ -86,6 +86,7 @@ enum iwnes_memreg_type {
86 IWNES_MEMREG_TYPE_CQ = 0x0002, 86 IWNES_MEMREG_TYPE_CQ = 0x0002,
87 IWNES_MEMREG_TYPE_MW = 0x0003, 87 IWNES_MEMREG_TYPE_MW = 0x0003,
88 IWNES_MEMREG_TYPE_FMR = 0x0004, 88 IWNES_MEMREG_TYPE_FMR = 0x0004,
89 IWNES_MEMREG_TYPE_FMEM = 0x0005,
89}; 90};
90 91
91struct nes_mem_reg_req { 92struct nes_mem_reg_req {
diff --git a/drivers/infiniband/hw/nes/nes_utils.c b/drivers/infiniband/hw/nes/nes_utils.c
index 9687c397ce1a..729d525c5b70 100644
--- a/drivers/infiniband/hw/nes/nes_utils.c
+++ b/drivers/infiniband/hw/nes/nes_utils.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * Copyright (c) 2006 - 2009 Intel-NE, Inc. All rights reserved. 2 * Copyright (c) 2006 - 2009 Intel Corporation. All rights reserved.
3 * 3 *
4 * This software is available to you under a choice of one of two 4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU 5 * licenses. You may choose to be licensed under the terms of the GNU
diff --git a/drivers/infiniband/hw/nes/nes_verbs.c b/drivers/infiniband/hw/nes/nes_verbs.c
index a680c42d6e8c..64d3136e3747 100644
--- a/drivers/infiniband/hw/nes/nes_verbs.c
+++ b/drivers/infiniband/hw/nes/nes_verbs.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * Copyright (c) 2006 - 2009 Intel-NE, Inc. All rights reserved. 2 * Copyright (c) 2006 - 2009 Intel Corporation. All rights reserved.
3 * 3 *
4 * This software is available to you under a choice of one of two 4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU 5 * licenses. You may choose to be licensed under the terms of the GNU
@@ -275,342 +275,236 @@ static int nes_bind_mw(struct ib_qp *ibqp, struct ib_mw *ibmw,
275} 275}
276 276
277 277
278/** 278/*
279 * nes_alloc_fmr 279 * nes_alloc_fast_mr
280 */ 280 */
281static struct ib_fmr *nes_alloc_fmr(struct ib_pd *ibpd, 281static int alloc_fast_reg_mr(struct nes_device *nesdev, struct nes_pd *nespd,
282 int ibmr_access_flags, 282 u32 stag, u32 page_count)
283 struct ib_fmr_attr *ibfmr_attr)
284{ 283{
285 unsigned long flags;
286 struct nes_pd *nespd = to_nespd(ibpd);
287 struct nes_vnic *nesvnic = to_nesvnic(ibpd->device);
288 struct nes_device *nesdev = nesvnic->nesdev;
289 struct nes_adapter *nesadapter = nesdev->nesadapter;
290 struct nes_fmr *nesfmr;
291 struct nes_cqp_request *cqp_request;
292 struct nes_hw_cqp_wqe *cqp_wqe; 284 struct nes_hw_cqp_wqe *cqp_wqe;
285 struct nes_cqp_request *cqp_request;
286 unsigned long flags;
293 int ret; 287 int ret;
294 u32 stag; 288 struct nes_adapter *nesadapter = nesdev->nesadapter;
295 u32 stag_index = 0;
296 u32 next_stag_index = 0;
297 u32 driver_key = 0;
298 u32 opcode = 0; 289 u32 opcode = 0;
299 u8 stag_key = 0; 290 u16 major_code;
300 int i=0; 291 u64 region_length = page_count * PAGE_SIZE;
301 struct nes_vpbl vpbl;
302
303 get_random_bytes(&next_stag_index, sizeof(next_stag_index));
304 stag_key = (u8)next_stag_index;
305
306 driver_key = 0;
307
308 next_stag_index >>= 8;
309 next_stag_index %= nesadapter->max_mr;
310
311 ret = nes_alloc_resource(nesadapter, nesadapter->allocated_mrs,
312 nesadapter->max_mr, &stag_index, &next_stag_index);
313 if (ret) {
314 goto failed_resource_alloc;
315 }
316
317 nesfmr = kzalloc(sizeof(*nesfmr), GFP_KERNEL);
318 if (!nesfmr) {
319 ret = -ENOMEM;
320 goto failed_fmr_alloc;
321 }
322
323 nesfmr->nesmr.mode = IWNES_MEMREG_TYPE_FMR;
324 if (ibfmr_attr->max_pages == 1) {
325 /* use zero length PBL */
326 nesfmr->nesmr.pbl_4k = 0;
327 nesfmr->nesmr.pbls_used = 0;
328 } else if (ibfmr_attr->max_pages <= 32) {
329 /* use PBL 256 */
330 nesfmr->nesmr.pbl_4k = 0;
331 nesfmr->nesmr.pbls_used = 1;
332 } else if (ibfmr_attr->max_pages <= 512) {
333 /* use 4K PBLs */
334 nesfmr->nesmr.pbl_4k = 1;
335 nesfmr->nesmr.pbls_used = 1;
336 } else {
337 /* use two level 4K PBLs */
338 /* add support for two level 256B PBLs */
339 nesfmr->nesmr.pbl_4k = 1;
340 nesfmr->nesmr.pbls_used = 1 + (ibfmr_attr->max_pages >> 9) +
341 ((ibfmr_attr->max_pages & 511) ? 1 : 0);
342 }
343 /* Register the region with the adapter */
344 spin_lock_irqsave(&nesadapter->pbl_lock, flags);
345
346 /* track PBL resources */
347 if (nesfmr->nesmr.pbls_used != 0) {
348 if (nesfmr->nesmr.pbl_4k) {
349 if (nesfmr->nesmr.pbls_used > nesadapter->free_4kpbl) {
350 spin_unlock_irqrestore(&nesadapter->pbl_lock, flags);
351 ret = -ENOMEM;
352 goto failed_vpbl_avail;
353 } else {
354 nesadapter->free_4kpbl -= nesfmr->nesmr.pbls_used;
355 }
356 } else {
357 if (nesfmr->nesmr.pbls_used > nesadapter->free_256pbl) {
358 spin_unlock_irqrestore(&nesadapter->pbl_lock, flags);
359 ret = -ENOMEM;
360 goto failed_vpbl_avail;
361 } else {
362 nesadapter->free_256pbl -= nesfmr->nesmr.pbls_used;
363 }
364 }
365 }
366
367 /* one level pbl */
368 if (nesfmr->nesmr.pbls_used == 0) {
369 nesfmr->root_vpbl.pbl_vbase = NULL;
370 nes_debug(NES_DBG_MR, "zero level pbl \n");
371 } else if (nesfmr->nesmr.pbls_used == 1) {
372 /* can change it to kmalloc & dma_map_single */
373 nesfmr->root_vpbl.pbl_vbase = pci_alloc_consistent(nesdev->pcidev, 4096,
374 &nesfmr->root_vpbl.pbl_pbase);
375 if (!nesfmr->root_vpbl.pbl_vbase) {
376 spin_unlock_irqrestore(&nesadapter->pbl_lock, flags);
377 ret = -ENOMEM;
378 goto failed_vpbl_alloc;
379 }
380 nesfmr->leaf_pbl_cnt = 0;
381 nes_debug(NES_DBG_MR, "one level pbl, root_vpbl.pbl_vbase=%p \n",
382 nesfmr->root_vpbl.pbl_vbase);
383 }
384 /* two level pbl */
385 else {
386 nesfmr->root_vpbl.pbl_vbase = pci_alloc_consistent(nesdev->pcidev, 8192,
387 &nesfmr->root_vpbl.pbl_pbase);
388 if (!nesfmr->root_vpbl.pbl_vbase) {
389 spin_unlock_irqrestore(&nesadapter->pbl_lock, flags);
390 ret = -ENOMEM;
391 goto failed_vpbl_alloc;
392 }
393
394 nesfmr->leaf_pbl_cnt = nesfmr->nesmr.pbls_used-1;
395 nesfmr->root_vpbl.leaf_vpbl = kzalloc(sizeof(*nesfmr->root_vpbl.leaf_vpbl)*1024, GFP_ATOMIC);
396 if (!nesfmr->root_vpbl.leaf_vpbl) {
397 spin_unlock_irqrestore(&nesadapter->pbl_lock, flags);
398 ret = -ENOMEM;
399 goto failed_leaf_vpbl_alloc;
400 }
401
402 nes_debug(NES_DBG_MR, "two level pbl, root_vpbl.pbl_vbase=%p"
403 " leaf_pbl_cnt=%d root_vpbl.leaf_vpbl=%p\n",
404 nesfmr->root_vpbl.pbl_vbase, nesfmr->leaf_pbl_cnt, nesfmr->root_vpbl.leaf_vpbl);
405
406 for (i=0; i<nesfmr->leaf_pbl_cnt; i++)
407 nesfmr->root_vpbl.leaf_vpbl[i].pbl_vbase = NULL;
408
409 for (i=0; i<nesfmr->leaf_pbl_cnt; i++) {
410 vpbl.pbl_vbase = pci_alloc_consistent(nesdev->pcidev, 4096,
411 &vpbl.pbl_pbase);
412
413 if (!vpbl.pbl_vbase) {
414 ret = -ENOMEM;
415 spin_unlock_irqrestore(&nesadapter->pbl_lock, flags);
416 goto failed_leaf_vpbl_pages_alloc;
417 }
418
419 nesfmr->root_vpbl.pbl_vbase[i].pa_low = cpu_to_le32((u32)vpbl.pbl_pbase);
420 nesfmr->root_vpbl.pbl_vbase[i].pa_high = cpu_to_le32((u32)((((u64)vpbl.pbl_pbase)>>32)));
421 nesfmr->root_vpbl.leaf_vpbl[i] = vpbl;
422
423 nes_debug(NES_DBG_MR, "pbase_low=0x%x, pbase_high=0x%x, vpbl=%p\n",
424 nesfmr->root_vpbl.pbl_vbase[i].pa_low,
425 nesfmr->root_vpbl.pbl_vbase[i].pa_high,
426 &nesfmr->root_vpbl.leaf_vpbl[i]);
427 }
428 }
429 nesfmr->ib_qp = NULL;
430 nesfmr->access_rights =0;
431 292
432 stag = stag_index << 8;
433 stag |= driver_key;
434 stag += (u32)stag_key;
435 293
436 spin_unlock_irqrestore(&nesadapter->pbl_lock, flags);
437 cqp_request = nes_get_cqp_request(nesdev); 294 cqp_request = nes_get_cqp_request(nesdev);
438 if (cqp_request == NULL) { 295 if (cqp_request == NULL) {
439 nes_debug(NES_DBG_MR, "Failed to get a cqp_request.\n"); 296 nes_debug(NES_DBG_MR, "Failed to get a cqp_request.\n");
440 ret = -ENOMEM; 297 return -ENOMEM;
441 goto failed_leaf_vpbl_pages_alloc;
442 } 298 }
299 nes_debug(NES_DBG_MR, "alloc_fast_reg_mr: page_count = %d, "
300 "region_length = %llu\n",
301 page_count, region_length);
443 cqp_request->waiting = 1; 302 cqp_request->waiting = 1;
444 cqp_wqe = &cqp_request->cqp_wqe; 303 cqp_wqe = &cqp_request->cqp_wqe;
445 304
446 nes_debug(NES_DBG_MR, "Registering STag 0x%08X, index = 0x%08X\n", 305 spin_lock_irqsave(&nesadapter->pbl_lock, flags);
447 stag, stag_index); 306 if (nesadapter->free_4kpbl > 0) {
448 307 nesadapter->free_4kpbl--;
449 opcode = NES_CQP_ALLOCATE_STAG | NES_CQP_STAG_VA_TO | NES_CQP_STAG_MR; 308 spin_unlock_irqrestore(&nesadapter->pbl_lock, flags);
450 309 } else {
451 if (nesfmr->nesmr.pbl_4k == 1) 310 /* No 4kpbl's available: */
452 opcode |= NES_CQP_STAG_PBL_BLK_SIZE; 311 spin_unlock_irqrestore(&nesadapter->pbl_lock, flags);
453 312 nes_debug(NES_DBG_MR, "Out of Pbls\n");
454 if (ibmr_access_flags & IB_ACCESS_REMOTE_WRITE) { 313 nes_free_cqp_request(nesdev, cqp_request);
455 opcode |= NES_CQP_STAG_RIGHTS_REMOTE_WRITE | 314 return -ENOMEM;
456 NES_CQP_STAG_RIGHTS_LOCAL_WRITE | NES_CQP_STAG_REM_ACC_EN;
457 nesfmr->access_rights |=
458 NES_CQP_STAG_RIGHTS_REMOTE_WRITE | NES_CQP_STAG_RIGHTS_LOCAL_WRITE |
459 NES_CQP_STAG_REM_ACC_EN;
460 } 315 }
461 316
462 if (ibmr_access_flags & IB_ACCESS_REMOTE_READ) { 317 opcode = NES_CQP_ALLOCATE_STAG | NES_CQP_STAG_MR |
463 opcode |= NES_CQP_STAG_RIGHTS_REMOTE_READ | 318 NES_CQP_STAG_PBL_BLK_SIZE | NES_CQP_STAG_VA_TO |
464 NES_CQP_STAG_RIGHTS_LOCAL_READ | NES_CQP_STAG_REM_ACC_EN; 319 NES_CQP_STAG_REM_ACC_EN;
465 nesfmr->access_rights |= 320 /*
466 NES_CQP_STAG_RIGHTS_REMOTE_READ | NES_CQP_STAG_RIGHTS_LOCAL_READ | 321 * The current OFED API does not support the zero based TO option.
467 NES_CQP_STAG_REM_ACC_EN; 322 * If added then need to changed the NES_CQP_STAG_VA* option. Also,
468 } 323 * the API does not support that ability to have the MR set for local
324 * access only when created and not allow the SQ op to override. Given
325 * this the remote enable must be set here.
326 */
469 327
470 nes_fill_init_cqp_wqe(cqp_wqe, nesdev); 328 nes_fill_init_cqp_wqe(cqp_wqe, nesdev);
471 set_wqe_32bit_value(cqp_wqe->wqe_words, NES_CQP_WQE_OPCODE_IDX, opcode); 329 set_wqe_32bit_value(cqp_wqe->wqe_words, NES_CQP_WQE_OPCODE_IDX, opcode);
472 set_wqe_32bit_value(cqp_wqe->wqe_words, NES_CQP_STAG_WQE_LEN_HIGH_PD_IDX, (nespd->pd_id & 0x00007fff)); 330 set_wqe_32bit_value(cqp_wqe->wqe_words, NES_CQP_STAG_WQE_PBL_BLK_COUNT_IDX, 1);
473 set_wqe_32bit_value(cqp_wqe->wqe_words, NES_CQP_STAG_WQE_STAG_IDX, stag);
474 331
475 cqp_wqe->wqe_words[NES_CQP_STAG_WQE_PBL_BLK_COUNT_IDX] = 332 cqp_wqe->wqe_words[NES_CQP_STAG_WQE_LEN_HIGH_PD_IDX] =
476 cpu_to_le32((nesfmr->nesmr.pbls_used>1) ? 333 cpu_to_le32((u32)(region_length >> 8) & 0xff000000);
477 (nesfmr->nesmr.pbls_used-1) : nesfmr->nesmr.pbls_used); 334 cqp_wqe->wqe_words[NES_CQP_STAG_WQE_LEN_HIGH_PD_IDX] |=
335 cpu_to_le32(nespd->pd_id & 0x00007fff);
336
337 set_wqe_32bit_value(cqp_wqe->wqe_words, NES_CQP_STAG_WQE_STAG_IDX, stag);
338 set_wqe_64bit_value(cqp_wqe->wqe_words, NES_CQP_STAG_WQE_VA_LOW_IDX, 0);
339 set_wqe_32bit_value(cqp_wqe->wqe_words, NES_CQP_STAG_WQE_LEN_LOW_IDX, 0);
340 set_wqe_64bit_value(cqp_wqe->wqe_words, NES_CQP_STAG_WQE_PA_LOW_IDX, 0);
341 set_wqe_32bit_value(cqp_wqe->wqe_words, NES_CQP_STAG_WQE_PBL_LEN_IDX, (page_count * 8));
342 cqp_wqe->wqe_words[NES_CQP_WQE_OPCODE_IDX] |= cpu_to_le32(NES_CQP_STAG_PBL_BLK_SIZE);
343 barrier();
478 344
479 atomic_set(&cqp_request->refcount, 2); 345 atomic_set(&cqp_request->refcount, 2);
480 nes_post_cqp_request(nesdev, cqp_request); 346 nes_post_cqp_request(nesdev, cqp_request);
481 347
482 /* Wait for CQP */ 348 /* Wait for CQP */
483 ret = wait_event_timeout(cqp_request->waitq, (cqp_request->request_done != 0), 349 ret = wait_event_timeout(cqp_request->waitq,
484 NES_EVENT_TIMEOUT); 350 (0 != cqp_request->request_done),
485 nes_debug(NES_DBG_MR, "Register STag 0x%08X completed, wait_event_timeout ret = %u," 351 NES_EVENT_TIMEOUT);
486 " CQP Major:Minor codes = 0x%04X:0x%04X.\n", 352
487 stag, ret, cqp_request->major_code, cqp_request->minor_code); 353 nes_debug(NES_DBG_MR, "Allocate STag 0x%08X completed, "
488 354 "wait_event_timeout ret = %u, CQP Major:Minor codes = "
489 if ((!ret) || (cqp_request->major_code)) { 355 "0x%04X:0x%04X.\n", stag, ret, cqp_request->major_code,
490 nes_put_cqp_request(nesdev, cqp_request); 356 cqp_request->minor_code);
491 ret = (!ret) ? -ETIME : -EIO; 357 major_code = cqp_request->major_code;
492 goto failed_leaf_vpbl_pages_alloc;
493 }
494 nes_put_cqp_request(nesdev, cqp_request); 358 nes_put_cqp_request(nesdev, cqp_request);
495 nesfmr->nesmr.ibfmr.lkey = stag;
496 nesfmr->nesmr.ibfmr.rkey = stag;
497 nesfmr->attr = *ibfmr_attr;
498
499 return &nesfmr->nesmr.ibfmr;
500
501 failed_leaf_vpbl_pages_alloc:
502 /* unroll all allocated pages */
503 for (i=0; i<nesfmr->leaf_pbl_cnt; i++) {
504 if (nesfmr->root_vpbl.leaf_vpbl[i].pbl_vbase) {
505 pci_free_consistent(nesdev->pcidev, 4096, nesfmr->root_vpbl.leaf_vpbl[i].pbl_vbase,
506 nesfmr->root_vpbl.leaf_vpbl[i].pbl_pbase);
507 }
508 }
509 if (nesfmr->root_vpbl.leaf_vpbl)
510 kfree(nesfmr->root_vpbl.leaf_vpbl);
511 359
512 failed_leaf_vpbl_alloc: 360 if (!ret || major_code) {
513 if (nesfmr->leaf_pbl_cnt == 0) {
514 if (nesfmr->root_vpbl.pbl_vbase)
515 pci_free_consistent(nesdev->pcidev, 4096, nesfmr->root_vpbl.pbl_vbase,
516 nesfmr->root_vpbl.pbl_pbase);
517 } else
518 pci_free_consistent(nesdev->pcidev, 8192, nesfmr->root_vpbl.pbl_vbase,
519 nesfmr->root_vpbl.pbl_pbase);
520
521 failed_vpbl_alloc:
522 if (nesfmr->nesmr.pbls_used != 0) {
523 spin_lock_irqsave(&nesadapter->pbl_lock, flags); 361 spin_lock_irqsave(&nesadapter->pbl_lock, flags);
524 if (nesfmr->nesmr.pbl_4k) 362 nesadapter->free_4kpbl++;
525 nesadapter->free_4kpbl += nesfmr->nesmr.pbls_used;
526 else
527 nesadapter->free_256pbl += nesfmr->nesmr.pbls_used;
528 spin_unlock_irqrestore(&nesadapter->pbl_lock, flags); 363 spin_unlock_irqrestore(&nesadapter->pbl_lock, flags);
529 } 364 }
530 365
531failed_vpbl_avail: 366 if (!ret)
532 kfree(nesfmr); 367 return -ETIME;
533 368 else if (major_code)
534 failed_fmr_alloc: 369 return -EIO;
535 nes_free_resource(nesadapter, nesadapter->allocated_mrs, stag_index); 370 return 0;
536
537 failed_resource_alloc:
538 return ERR_PTR(ret);
539} 371}
540 372
541 373/*
542/** 374 * nes_alloc_fast_reg_mr
543 * nes_dealloc_fmr
544 */ 375 */
545static int nes_dealloc_fmr(struct ib_fmr *ibfmr) 376struct ib_mr *nes_alloc_fast_reg_mr(struct ib_pd *ibpd, int max_page_list_len)
546{ 377{
547 unsigned long flags; 378 struct nes_pd *nespd = to_nespd(ibpd);
548 struct nes_mr *nesmr = to_nesmr_from_ibfmr(ibfmr); 379 struct nes_vnic *nesvnic = to_nesvnic(ibpd->device);
549 struct nes_fmr *nesfmr = to_nesfmr(nesmr);
550 struct nes_vnic *nesvnic = to_nesvnic(ibfmr->device);
551 struct nes_device *nesdev = nesvnic->nesdev; 380 struct nes_device *nesdev = nesvnic->nesdev;
552 struct nes_adapter *nesadapter = nesdev->nesadapter; 381 struct nes_adapter *nesadapter = nesdev->nesadapter;
553 int i = 0;
554 int rc;
555 382
556 /* free the resources */ 383 u32 next_stag_index;
557 if (nesfmr->leaf_pbl_cnt == 0) { 384 u8 stag_key = 0;
558 /* single PBL case */ 385 u32 driver_key = 0;
559 if (nesfmr->root_vpbl.pbl_vbase) 386 int err = 0;
560 pci_free_consistent(nesdev->pcidev, 4096, nesfmr->root_vpbl.pbl_vbase, 387 u32 stag_index = 0;
561 nesfmr->root_vpbl.pbl_pbase); 388 struct nes_mr *nesmr;
562 } else { 389 u32 stag;
563 for (i = 0; i < nesfmr->leaf_pbl_cnt; i++) { 390 int ret;
564 pci_free_consistent(nesdev->pcidev, 4096, nesfmr->root_vpbl.leaf_vpbl[i].pbl_vbase, 391 struct ib_mr *ibmr;
565 nesfmr->root_vpbl.leaf_vpbl[i].pbl_pbase); 392/*
566 } 393 * Note: Set to always use a fixed length single page entry PBL. This is to allow
567 kfree(nesfmr->root_vpbl.leaf_vpbl); 394 * for the fast_reg_mr operation to always know the size of the PBL.
568 pci_free_consistent(nesdev->pcidev, 8192, nesfmr->root_vpbl.pbl_vbase, 395 */
569 nesfmr->root_vpbl.pbl_pbase); 396 if (max_page_list_len > (NES_4K_PBL_CHUNK_SIZE / sizeof(u64)))
570 } 397 return ERR_PTR(-E2BIG);
571 nesmr->ibmw.device = ibfmr->device;
572 nesmr->ibmw.pd = ibfmr->pd;
573 nesmr->ibmw.rkey = ibfmr->rkey;
574 nesmr->ibmw.uobject = NULL;
575 398
576 rc = nes_dealloc_mw(&nesmr->ibmw); 399 get_random_bytes(&next_stag_index, sizeof(next_stag_index));
400 stag_key = (u8)next_stag_index;
401 next_stag_index >>= 8;
402 next_stag_index %= nesadapter->max_mr;
577 403
578 if ((rc == 0) && (nesfmr->nesmr.pbls_used != 0)) { 404 err = nes_alloc_resource(nesadapter, nesadapter->allocated_mrs,
579 spin_lock_irqsave(&nesadapter->pbl_lock, flags); 405 nesadapter->max_mr, &stag_index,
580 if (nesfmr->nesmr.pbl_4k) { 406 &next_stag_index);
581 nesadapter->free_4kpbl += nesfmr->nesmr.pbls_used; 407 if (err)
582 WARN_ON(nesadapter->free_4kpbl > nesadapter->max_4kpbl); 408 return ERR_PTR(err);
583 } else { 409
584 nesadapter->free_256pbl += nesfmr->nesmr.pbls_used; 410 nesmr = kzalloc(sizeof(*nesmr), GFP_KERNEL);
585 WARN_ON(nesadapter->free_256pbl > nesadapter->max_256pbl); 411 if (!nesmr) {
586 } 412 nes_free_resource(nesadapter, nesadapter->allocated_mrs, stag_index);
587 spin_unlock_irqrestore(&nesadapter->pbl_lock, flags); 413 return ERR_PTR(-ENOMEM);
588 } 414 }
589 415
590 return rc; 416 stag = stag_index << 8;
591} 417 stag |= driver_key;
418 stag += (u32)stag_key;
592 419
420 nes_debug(NES_DBG_MR, "Allocating STag 0x%08X index = 0x%08X\n",
421 stag, stag_index);
593 422
594/** 423 ret = alloc_fast_reg_mr(nesdev, nespd, stag, max_page_list_len);
595 * nes_map_phys_fmr 424
425 if (ret == 0) {
426 nesmr->ibmr.rkey = stag;
427 nesmr->ibmr.lkey = stag;
428 nesmr->mode = IWNES_MEMREG_TYPE_FMEM;
429 ibmr = &nesmr->ibmr;
430 } else {
431 kfree(nesmr);
432 nes_free_resource(nesadapter, nesadapter->allocated_mrs, stag_index);
433 ibmr = ERR_PTR(-ENOMEM);
434 }
435 return ibmr;
436}
437
438/*
439 * nes_alloc_fast_reg_page_list
596 */ 440 */
597static int nes_map_phys_fmr(struct ib_fmr *ibfmr, u64 *page_list, 441static struct ib_fast_reg_page_list *nes_alloc_fast_reg_page_list(
598 int list_len, u64 iova) 442 struct ib_device *ibdev,
443 int page_list_len)
599{ 444{
600 return 0; 445 struct nes_vnic *nesvnic = to_nesvnic(ibdev);
601} 446 struct nes_device *nesdev = nesvnic->nesdev;
447 struct ib_fast_reg_page_list *pifrpl;
448 struct nes_ib_fast_reg_page_list *pnesfrpl;
602 449
450 if (page_list_len > (NES_4K_PBL_CHUNK_SIZE / sizeof(u64)))
451 return ERR_PTR(-E2BIG);
452 /*
453 * Allocate the ib_fast_reg_page_list structure, the
454 * nes_fast_bpl structure, and the PLB table.
455 */
456 pnesfrpl = kmalloc(sizeof(struct nes_ib_fast_reg_page_list) +
457 page_list_len * sizeof(u64), GFP_KERNEL);
458
459 if (!pnesfrpl)
460 return ERR_PTR(-ENOMEM);
603 461
604/** 462 pifrpl = &pnesfrpl->ibfrpl;
605 * nes_unmap_frm 463 pifrpl->page_list = &pnesfrpl->pbl;
464 pifrpl->max_page_list_len = page_list_len;
465 /*
466 * Allocate the WQE PBL
467 */
468 pnesfrpl->nes_wqe_pbl.kva = pci_alloc_consistent(nesdev->pcidev,
469 page_list_len * sizeof(u64),
470 &pnesfrpl->nes_wqe_pbl.paddr);
471
472 if (!pnesfrpl->nes_wqe_pbl.kva) {
473 kfree(pnesfrpl);
474 return ERR_PTR(-ENOMEM);
475 }
476 nes_debug(NES_DBG_MR, "nes_alloc_fast_reg_pbl: nes_frpl = %p, "
477 "ibfrpl = %p, ibfrpl.page_list = %p, pbl.kva = %p, "
478 "pbl.paddr= %p\n", pnesfrpl, &pnesfrpl->ibfrpl,
479 pnesfrpl->ibfrpl.page_list, pnesfrpl->nes_wqe_pbl.kva,
480 (void *)pnesfrpl->nes_wqe_pbl.paddr);
481
482 return pifrpl;
483}
484
485/*
486 * nes_free_fast_reg_page_list
606 */ 487 */
607static int nes_unmap_fmr(struct list_head *ibfmr_list) 488static void nes_free_fast_reg_page_list(struct ib_fast_reg_page_list *pifrpl)
608{ 489{
609 return 0; 490 struct nes_vnic *nesvnic = to_nesvnic(pifrpl->device);
491 struct nes_device *nesdev = nesvnic->nesdev;
492 struct nes_ib_fast_reg_page_list *pnesfrpl;
493
494 pnesfrpl = container_of(pifrpl, struct nes_ib_fast_reg_page_list, ibfrpl);
495 /*
496 * Free the WQE PBL.
497 */
498 pci_free_consistent(nesdev->pcidev,
499 pifrpl->max_page_list_len * sizeof(u64),
500 pnesfrpl->nes_wqe_pbl.kva,
501 pnesfrpl->nes_wqe_pbl.paddr);
502 /*
503 * Free the PBL structure
504 */
505 kfree(pnesfrpl);
610} 506}
611 507
612
613
614/** 508/**
615 * nes_query_device 509 * nes_query_device
616 */ 510 */
@@ -633,23 +527,23 @@ static int nes_query_device(struct ib_device *ibdev, struct ib_device_attr *prop
633 props->max_qp_wr = nesdev->nesadapter->max_qp_wr - 2; 527 props->max_qp_wr = nesdev->nesadapter->max_qp_wr - 2;
634 props->max_sge = nesdev->nesadapter->max_sge; 528 props->max_sge = nesdev->nesadapter->max_sge;
635 props->max_cq = nesibdev->max_cq; 529 props->max_cq = nesibdev->max_cq;
636 props->max_cqe = nesdev->nesadapter->max_cqe - 1; 530 props->max_cqe = nesdev->nesadapter->max_cqe;
637 props->max_mr = nesibdev->max_mr; 531 props->max_mr = nesibdev->max_mr;
638 props->max_mw = nesibdev->max_mr; 532 props->max_mw = nesibdev->max_mr;
639 props->max_pd = nesibdev->max_pd; 533 props->max_pd = nesibdev->max_pd;
640 props->max_sge_rd = 1; 534 props->max_sge_rd = 1;
641 switch (nesdev->nesadapter->max_irrq_wr) { 535 switch (nesdev->nesadapter->max_irrq_wr) {
642 case 0: 536 case 0:
643 props->max_qp_rd_atom = 1; 537 props->max_qp_rd_atom = 2;
644 break; 538 break;
645 case 1: 539 case 1:
646 props->max_qp_rd_atom = 4; 540 props->max_qp_rd_atom = 8;
647 break; 541 break;
648 case 2: 542 case 2:
649 props->max_qp_rd_atom = 16; 543 props->max_qp_rd_atom = 32;
650 break; 544 break;
651 case 3: 545 case 3:
652 props->max_qp_rd_atom = 32; 546 props->max_qp_rd_atom = 64;
653 break; 547 break;
654 default: 548 default:
655 props->max_qp_rd_atom = 0; 549 props->max_qp_rd_atom = 0;
@@ -1121,6 +1015,7 @@ static int nes_setup_virt_qp(struct nes_qp *nesqp, struct nes_pbl *nespbl,
1121 kunmap(nesqp->page); 1015 kunmap(nesqp->page);
1122 return -ENOMEM; 1016 return -ENOMEM;
1123 } 1017 }
1018 nesqp->sq_kmapped = 1;
1124 nesqp->hwqp.q2_vbase = mem; 1019 nesqp->hwqp.q2_vbase = mem;
1125 mem += 256; 1020 mem += 256;
1126 memset(nesqp->hwqp.q2_vbase, 0, 256); 1021 memset(nesqp->hwqp.q2_vbase, 0, 256);
@@ -1198,7 +1093,10 @@ static inline void nes_free_qp_mem(struct nes_device *nesdev,
1198 pci_free_consistent(nesdev->pcidev, nesqp->qp_mem_size, nesqp->hwqp.q2_vbase, nesqp->hwqp.q2_pbase); 1093 pci_free_consistent(nesdev->pcidev, nesqp->qp_mem_size, nesqp->hwqp.q2_vbase, nesqp->hwqp.q2_pbase);
1199 pci_free_consistent(nesdev->pcidev, 256, nesqp->pbl_vbase, nesqp->pbl_pbase ); 1094 pci_free_consistent(nesdev->pcidev, 256, nesqp->pbl_vbase, nesqp->pbl_pbase );
1200 nesqp->pbl_vbase = NULL; 1095 nesqp->pbl_vbase = NULL;
1201 kunmap(nesqp->page); 1096 if (nesqp->sq_kmapped) {
1097 nesqp->sq_kmapped = 0;
1098 kunmap(nesqp->page);
1099 }
1202 } 1100 }
1203} 1101}
1204 1102
@@ -1504,8 +1402,6 @@ static struct ib_qp *nes_create_qp(struct ib_pd *ibpd,
1504 nes_debug(NES_DBG_QP, "QP%u structure located @%p.Size = %u.\n", 1402 nes_debug(NES_DBG_QP, "QP%u structure located @%p.Size = %u.\n",
1505 nesqp->hwqp.qp_id, nesqp, (u32)sizeof(*nesqp)); 1403 nesqp->hwqp.qp_id, nesqp, (u32)sizeof(*nesqp));
1506 spin_lock_init(&nesqp->lock); 1404 spin_lock_init(&nesqp->lock);
1507 init_waitqueue_head(&nesqp->state_waitq);
1508 init_waitqueue_head(&nesqp->kick_waitq);
1509 nes_add_ref(&nesqp->ibqp); 1405 nes_add_ref(&nesqp->ibqp);
1510 break; 1406 break;
1511 default: 1407 default:
@@ -1513,6 +1409,8 @@ static struct ib_qp *nes_create_qp(struct ib_pd *ibpd,
1513 return ERR_PTR(-EINVAL); 1409 return ERR_PTR(-EINVAL);
1514 } 1410 }
1515 1411
1412 nesqp->sig_all = (init_attr->sq_sig_type == IB_SIGNAL_ALL_WR);
1413
1516 /* update the QP table */ 1414 /* update the QP table */
1517 nesdev->nesadapter->qp_table[nesqp->hwqp.qp_id-NES_FIRST_QPN] = nesqp; 1415 nesdev->nesadapter->qp_table[nesqp->hwqp.qp_id-NES_FIRST_QPN] = nesqp;
1518 nes_debug(NES_DBG_QP, "netdev refcnt=%u\n", 1416 nes_debug(NES_DBG_QP, "netdev refcnt=%u\n",
@@ -1607,8 +1505,10 @@ static int nes_destroy_qp(struct ib_qp *ibqp)
1607 nes_ucontext->first_free_wq = nesqp->mmap_sq_db_index; 1505 nes_ucontext->first_free_wq = nesqp->mmap_sq_db_index;
1608 } 1506 }
1609 } 1507 }
1610 if (nesqp->pbl_pbase) 1508 if (nesqp->pbl_pbase && nesqp->sq_kmapped) {
1509 nesqp->sq_kmapped = 0;
1611 kunmap(nesqp->page); 1510 kunmap(nesqp->page);
1511 }
1612 } else { 1512 } else {
1613 /* Clean any pending completions from the cq(s) */ 1513 /* Clean any pending completions from the cq(s) */
1614 if (nesqp->nesscq) 1514 if (nesqp->nesscq)
@@ -1649,6 +1549,9 @@ static struct ib_cq *nes_create_cq(struct ib_device *ibdev, int entries,
1649 unsigned long flags; 1549 unsigned long flags;
1650 int ret; 1550 int ret;
1651 1551
1552 if (entries > nesadapter->max_cqe)
1553 return ERR_PTR(-EINVAL);
1554
1652 err = nes_alloc_resource(nesadapter, nesadapter->allocated_cqs, 1555 err = nes_alloc_resource(nesadapter, nesadapter->allocated_cqs,
1653 nesadapter->max_cq, &cq_num, &nesadapter->next_cq); 1556 nesadapter->max_cq, &cq_num, &nesadapter->next_cq);
1654 if (err) { 1557 if (err) {
@@ -2606,9 +2509,6 @@ static struct ib_mr *nes_reg_user_mr(struct ib_pd *pd, u64 start, u64 length,
2606 stag = stag_index << 8; 2509 stag = stag_index << 8;
2607 stag |= driver_key; 2510 stag |= driver_key;
2608 stag += (u32)stag_key; 2511 stag += (u32)stag_key;
2609 if (stag == 0) {
2610 stag = 1;
2611 }
2612 2512
2613 iova_start = virt; 2513 iova_start = virt;
2614 /* Make the leaf PBL the root if only one PBL */ 2514 /* Make the leaf PBL the root if only one PBL */
@@ -3109,7 +3009,6 @@ int nes_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr,
3109 " already done based on hw state.\n", 3009 " already done based on hw state.\n",
3110 nesqp->hwqp.qp_id); 3010 nesqp->hwqp.qp_id);
3111 issue_modify_qp = 0; 3011 issue_modify_qp = 0;
3112 nesqp->in_disconnect = 0;
3113 } 3012 }
3114 switch (nesqp->hw_iwarp_state) { 3013 switch (nesqp->hw_iwarp_state) {
3115 case NES_AEQE_IWARP_STATE_CLOSING: 3014 case NES_AEQE_IWARP_STATE_CLOSING:
@@ -3122,7 +3021,6 @@ int nes_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr,
3122 break; 3021 break;
3123 default: 3022 default:
3124 next_iwarp_state = NES_CQP_QP_IWARP_STATE_CLOSING; 3023 next_iwarp_state = NES_CQP_QP_IWARP_STATE_CLOSING;
3125 nesqp->in_disconnect = 1;
3126 nesqp->hw_iwarp_state = NES_AEQE_IWARP_STATE_CLOSING; 3024 nesqp->hw_iwarp_state = NES_AEQE_IWARP_STATE_CLOSING;
3127 break; 3025 break;
3128 } 3026 }
@@ -3139,7 +3037,6 @@ int nes_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr,
3139 next_iwarp_state = NES_CQP_QP_IWARP_STATE_TERMINATE; 3037 next_iwarp_state = NES_CQP_QP_IWARP_STATE_TERMINATE;
3140 nesqp->hw_iwarp_state = NES_AEQE_IWARP_STATE_TERMINATE; 3038 nesqp->hw_iwarp_state = NES_AEQE_IWARP_STATE_TERMINATE;
3141 issue_modify_qp = 1; 3039 issue_modify_qp = 1;
3142 nesqp->in_disconnect = 1;
3143 break; 3040 break;
3144 case IB_QPS_ERR: 3041 case IB_QPS_ERR:
3145 case IB_QPS_RESET: 3042 case IB_QPS_RESET:
@@ -3162,7 +3059,6 @@ int nes_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr,
3162 if ((nesqp->hw_tcp_state > NES_AEQE_TCP_STATE_CLOSED) && 3059 if ((nesqp->hw_tcp_state > NES_AEQE_TCP_STATE_CLOSED) &&
3163 (nesqp->hw_tcp_state != NES_AEQE_TCP_STATE_TIME_WAIT)) { 3060 (nesqp->hw_tcp_state != NES_AEQE_TCP_STATE_TIME_WAIT)) {
3164 next_iwarp_state |= NES_CQP_QP_RESET; 3061 next_iwarp_state |= NES_CQP_QP_RESET;
3165 nesqp->in_disconnect = 1;
3166 } else { 3062 } else {
3167 nes_debug(NES_DBG_MOD_QP, "QP%u NOT setting NES_CQP_QP_RESET since TCP state = %u\n", 3063 nes_debug(NES_DBG_MOD_QP, "QP%u NOT setting NES_CQP_QP_RESET since TCP state = %u\n",
3168 nesqp->hwqp.qp_id, nesqp->hw_tcp_state); 3064 nesqp->hwqp.qp_id, nesqp->hw_tcp_state);
@@ -3373,21 +3269,17 @@ static int nes_post_send(struct ib_qp *ibqp, struct ib_send_wr *ib_wr,
3373 struct nes_device *nesdev = nesvnic->nesdev; 3269 struct nes_device *nesdev = nesvnic->nesdev;
3374 struct nes_qp *nesqp = to_nesqp(ibqp); 3270 struct nes_qp *nesqp = to_nesqp(ibqp);
3375 struct nes_hw_qp_wqe *wqe; 3271 struct nes_hw_qp_wqe *wqe;
3376 int err; 3272 int err = 0;
3377 u32 qsize = nesqp->hwqp.sq_size; 3273 u32 qsize = nesqp->hwqp.sq_size;
3378 u32 head; 3274 u32 head;
3379 u32 wqe_misc; 3275 u32 wqe_misc = 0;
3380 u32 wqe_count; 3276 u32 wqe_count = 0;
3381 u32 counter; 3277 u32 counter;
3382 u32 total_payload_length;
3383
3384 err = 0;
3385 wqe_misc = 0;
3386 wqe_count = 0;
3387 total_payload_length = 0;
3388 3278
3389 if (nesqp->ibqp_state > IB_QPS_RTS) 3279 if (nesqp->ibqp_state > IB_QPS_RTS) {
3390 return -EINVAL; 3280 err = -EINVAL;
3281 goto out;
3282 }
3391 3283
3392 spin_lock_irqsave(&nesqp->lock, flags); 3284 spin_lock_irqsave(&nesqp->lock, flags);
3393 3285
@@ -3413,94 +3305,208 @@ static int nes_post_send(struct ib_qp *ibqp, struct ib_send_wr *ib_wr,
3413 u64temp = (u64)(ib_wr->wr_id); 3305 u64temp = (u64)(ib_wr->wr_id);
3414 set_wqe_64bit_value(wqe->wqe_words, NES_IWARP_SQ_WQE_COMP_SCRATCH_LOW_IDX, 3306 set_wqe_64bit_value(wqe->wqe_words, NES_IWARP_SQ_WQE_COMP_SCRATCH_LOW_IDX,
3415 u64temp); 3307 u64temp);
3416 switch (ib_wr->opcode) { 3308 switch (ib_wr->opcode) {
3417 case IB_WR_SEND: 3309 case IB_WR_SEND:
3418 if (ib_wr->send_flags & IB_SEND_SOLICITED) { 3310 case IB_WR_SEND_WITH_INV:
3419 wqe_misc = NES_IWARP_SQ_OP_SENDSE; 3311 if (IB_WR_SEND == ib_wr->opcode) {
3420 } else { 3312 if (ib_wr->send_flags & IB_SEND_SOLICITED)
3421 wqe_misc = NES_IWARP_SQ_OP_SEND; 3313 wqe_misc = NES_IWARP_SQ_OP_SENDSE;
3422 } 3314 else
3423 if (ib_wr->num_sge > nesdev->nesadapter->max_sge) { 3315 wqe_misc = NES_IWARP_SQ_OP_SEND;
3424 err = -EINVAL; 3316 } else {
3425 break; 3317 if (ib_wr->send_flags & IB_SEND_SOLICITED)
3426 } 3318 wqe_misc = NES_IWARP_SQ_OP_SENDSEINV;
3427 if (ib_wr->send_flags & IB_SEND_FENCE) { 3319 else
3428 wqe_misc |= NES_IWARP_SQ_WQE_LOCAL_FENCE; 3320 wqe_misc = NES_IWARP_SQ_OP_SENDINV;
3429 }
3430 if ((ib_wr->send_flags & IB_SEND_INLINE) &&
3431 ((nes_drv_opt & NES_DRV_OPT_NO_INLINE_DATA) == 0) &&
3432 (ib_wr->sg_list[0].length <= 64)) {
3433 memcpy(&wqe->wqe_words[NES_IWARP_SQ_WQE_IMM_DATA_START_IDX],
3434 (void *)(unsigned long)ib_wr->sg_list[0].addr, ib_wr->sg_list[0].length);
3435 set_wqe_32bit_value(wqe->wqe_words, NES_IWARP_SQ_WQE_TOTAL_PAYLOAD_IDX,
3436 ib_wr->sg_list[0].length);
3437 wqe_misc |= NES_IWARP_SQ_WQE_IMM_DATA;
3438 } else {
3439 fill_wqe_sg_send(wqe, ib_wr, 1);
3440 }
3441 3321
3442 break; 3322 set_wqe_32bit_value(wqe->wqe_words, NES_IWARP_SQ_WQE_INV_STAG_LOW_IDX,
3443 case IB_WR_RDMA_WRITE: 3323 ib_wr->ex.invalidate_rkey);
3444 wqe_misc = NES_IWARP_SQ_OP_RDMAW; 3324 }
3445 if (ib_wr->num_sge > nesdev->nesadapter->max_sge) {
3446 nes_debug(NES_DBG_IW_TX, "Exceeded max sge, ib_wr=%u, max=%u\n",
3447 ib_wr->num_sge,
3448 nesdev->nesadapter->max_sge);
3449 err = -EINVAL;
3450 break;
3451 }
3452 if (ib_wr->send_flags & IB_SEND_FENCE) {
3453 wqe_misc |= NES_IWARP_SQ_WQE_LOCAL_FENCE;
3454 }
3455 3325
3456 set_wqe_32bit_value(wqe->wqe_words, NES_IWARP_SQ_WQE_RDMA_STAG_IDX, 3326 if (ib_wr->num_sge > nesdev->nesadapter->max_sge) {
3457 ib_wr->wr.rdma.rkey); 3327 err = -EINVAL;
3458 set_wqe_64bit_value(wqe->wqe_words, NES_IWARP_SQ_WQE_RDMA_TO_LOW_IDX, 3328 break;
3459 ib_wr->wr.rdma.remote_addr);
3460
3461 if ((ib_wr->send_flags & IB_SEND_INLINE) &&
3462 ((nes_drv_opt & NES_DRV_OPT_NO_INLINE_DATA) == 0) &&
3463 (ib_wr->sg_list[0].length <= 64)) {
3464 memcpy(&wqe->wqe_words[NES_IWARP_SQ_WQE_IMM_DATA_START_IDX],
3465 (void *)(unsigned long)ib_wr->sg_list[0].addr, ib_wr->sg_list[0].length);
3466 set_wqe_32bit_value(wqe->wqe_words, NES_IWARP_SQ_WQE_TOTAL_PAYLOAD_IDX,
3467 ib_wr->sg_list[0].length);
3468 wqe_misc |= NES_IWARP_SQ_WQE_IMM_DATA;
3469 } else {
3470 fill_wqe_sg_send(wqe, ib_wr, 1);
3471 }
3472 wqe->wqe_words[NES_IWARP_SQ_WQE_RDMA_LENGTH_IDX] =
3473 wqe->wqe_words[NES_IWARP_SQ_WQE_TOTAL_PAYLOAD_IDX];
3474 break;
3475 case IB_WR_RDMA_READ:
3476 /* iWARP only supports 1 sge for RDMA reads */
3477 if (ib_wr->num_sge > 1) {
3478 nes_debug(NES_DBG_IW_TX, "Exceeded max sge, ib_wr=%u, max=1\n",
3479 ib_wr->num_sge);
3480 err = -EINVAL;
3481 break;
3482 }
3483 wqe_misc = NES_IWARP_SQ_OP_RDMAR;
3484 set_wqe_64bit_value(wqe->wqe_words, NES_IWARP_SQ_WQE_RDMA_TO_LOW_IDX,
3485 ib_wr->wr.rdma.remote_addr);
3486 set_wqe_32bit_value(wqe->wqe_words, NES_IWARP_SQ_WQE_RDMA_STAG_IDX,
3487 ib_wr->wr.rdma.rkey);
3488 set_wqe_32bit_value(wqe->wqe_words, NES_IWARP_SQ_WQE_RDMA_LENGTH_IDX,
3489 ib_wr->sg_list->length);
3490 set_wqe_64bit_value(wqe->wqe_words, NES_IWARP_SQ_WQE_FRAG0_LOW_IDX,
3491 ib_wr->sg_list->addr);
3492 set_wqe_32bit_value(wqe->wqe_words, NES_IWARP_SQ_WQE_STAG0_IDX,
3493 ib_wr->sg_list->lkey);
3494 break;
3495 default:
3496 /* error */
3497 err = -EINVAL;
3498 break;
3499 } 3329 }
3500 3330
3501 if (ib_wr->send_flags & IB_SEND_SIGNALED) { 3331 if (ib_wr->send_flags & IB_SEND_FENCE)
3502 wqe_misc |= NES_IWARP_SQ_WQE_SIGNALED_COMPL; 3332 wqe_misc |= NES_IWARP_SQ_WQE_LOCAL_FENCE;
3333
3334 if ((ib_wr->send_flags & IB_SEND_INLINE) &&
3335 ((nes_drv_opt & NES_DRV_OPT_NO_INLINE_DATA) == 0) &&
3336 (ib_wr->sg_list[0].length <= 64)) {
3337 memcpy(&wqe->wqe_words[NES_IWARP_SQ_WQE_IMM_DATA_START_IDX],
3338 (void *)(unsigned long)ib_wr->sg_list[0].addr, ib_wr->sg_list[0].length);
3339 set_wqe_32bit_value(wqe->wqe_words, NES_IWARP_SQ_WQE_TOTAL_PAYLOAD_IDX,
3340 ib_wr->sg_list[0].length);
3341 wqe_misc |= NES_IWARP_SQ_WQE_IMM_DATA;
3342 } else {
3343 fill_wqe_sg_send(wqe, ib_wr, 1);
3344 }
3345
3346 break;
3347 case IB_WR_RDMA_WRITE:
3348 wqe_misc = NES_IWARP_SQ_OP_RDMAW;
3349 if (ib_wr->num_sge > nesdev->nesadapter->max_sge) {
3350 nes_debug(NES_DBG_IW_TX, "Exceeded max sge, ib_wr=%u, max=%u\n",
3351 ib_wr->num_sge, nesdev->nesadapter->max_sge);
3352 err = -EINVAL;
3353 break;
3354 }
3355
3356 if (ib_wr->send_flags & IB_SEND_FENCE)
3357 wqe_misc |= NES_IWARP_SQ_WQE_LOCAL_FENCE;
3358
3359 set_wqe_32bit_value(wqe->wqe_words, NES_IWARP_SQ_WQE_RDMA_STAG_IDX,
3360 ib_wr->wr.rdma.rkey);
3361 set_wqe_64bit_value(wqe->wqe_words, NES_IWARP_SQ_WQE_RDMA_TO_LOW_IDX,
3362 ib_wr->wr.rdma.remote_addr);
3363
3364 if ((ib_wr->send_flags & IB_SEND_INLINE) &&
3365 ((nes_drv_opt & NES_DRV_OPT_NO_INLINE_DATA) == 0) &&
3366 (ib_wr->sg_list[0].length <= 64)) {
3367 memcpy(&wqe->wqe_words[NES_IWARP_SQ_WQE_IMM_DATA_START_IDX],
3368 (void *)(unsigned long)ib_wr->sg_list[0].addr, ib_wr->sg_list[0].length);
3369 set_wqe_32bit_value(wqe->wqe_words, NES_IWARP_SQ_WQE_TOTAL_PAYLOAD_IDX,
3370 ib_wr->sg_list[0].length);
3371 wqe_misc |= NES_IWARP_SQ_WQE_IMM_DATA;
3372 } else {
3373 fill_wqe_sg_send(wqe, ib_wr, 1);
3374 }
3375
3376 wqe->wqe_words[NES_IWARP_SQ_WQE_RDMA_LENGTH_IDX] =
3377 wqe->wqe_words[NES_IWARP_SQ_WQE_TOTAL_PAYLOAD_IDX];
3378 break;
3379 case IB_WR_RDMA_READ:
3380 case IB_WR_RDMA_READ_WITH_INV:
3381 /* iWARP only supports 1 sge for RDMA reads */
3382 if (ib_wr->num_sge > 1) {
3383 nes_debug(NES_DBG_IW_TX, "Exceeded max sge, ib_wr=%u, max=1\n",
3384 ib_wr->num_sge);
3385 err = -EINVAL;
3386 break;
3387 }
3388 if (ib_wr->opcode == IB_WR_RDMA_READ) {
3389 wqe_misc = NES_IWARP_SQ_OP_RDMAR;
3390 } else {
3391 wqe_misc = NES_IWARP_SQ_OP_RDMAR_LOCINV;
3392 set_wqe_32bit_value(wqe->wqe_words, NES_IWARP_SQ_WQE_INV_STAG_LOW_IDX,
3393 ib_wr->ex.invalidate_rkey);
3394 }
3395
3396 set_wqe_64bit_value(wqe->wqe_words, NES_IWARP_SQ_WQE_RDMA_TO_LOW_IDX,
3397 ib_wr->wr.rdma.remote_addr);
3398 set_wqe_32bit_value(wqe->wqe_words, NES_IWARP_SQ_WQE_RDMA_STAG_IDX,
3399 ib_wr->wr.rdma.rkey);
3400 set_wqe_32bit_value(wqe->wqe_words, NES_IWARP_SQ_WQE_RDMA_LENGTH_IDX,
3401 ib_wr->sg_list->length);
3402 set_wqe_64bit_value(wqe->wqe_words, NES_IWARP_SQ_WQE_FRAG0_LOW_IDX,
3403 ib_wr->sg_list->addr);
3404 set_wqe_32bit_value(wqe->wqe_words, NES_IWARP_SQ_WQE_STAG0_IDX,
3405 ib_wr->sg_list->lkey);
3406 break;
3407 case IB_WR_LOCAL_INV:
3408 wqe_misc = NES_IWARP_SQ_OP_LOCINV;
3409 set_wqe_32bit_value(wqe->wqe_words,
3410 NES_IWARP_SQ_LOCINV_WQE_INV_STAG_IDX,
3411 ib_wr->ex.invalidate_rkey);
3412 break;
3413 case IB_WR_FAST_REG_MR:
3414 {
3415 int i;
3416 int flags = ib_wr->wr.fast_reg.access_flags;
3417 struct nes_ib_fast_reg_page_list *pnesfrpl =
3418 container_of(ib_wr->wr.fast_reg.page_list,
3419 struct nes_ib_fast_reg_page_list,
3420 ibfrpl);
3421 u64 *src_page_list = pnesfrpl->ibfrpl.page_list;
3422 u64 *dst_page_list = pnesfrpl->nes_wqe_pbl.kva;
3423
3424 if (ib_wr->wr.fast_reg.page_list_len >
3425 (NES_4K_PBL_CHUNK_SIZE / sizeof(u64))) {
3426 nes_debug(NES_DBG_IW_TX, "SQ_FMR: bad page_list_len\n");
3427 err = -EINVAL;
3428 break;
3429 }
3430 wqe_misc = NES_IWARP_SQ_OP_FAST_REG;
3431 set_wqe_64bit_value(wqe->wqe_words,
3432 NES_IWARP_SQ_FMR_WQE_VA_FBO_LOW_IDX,
3433 ib_wr->wr.fast_reg.iova_start);
3434 set_wqe_32bit_value(wqe->wqe_words,
3435 NES_IWARP_SQ_FMR_WQE_LENGTH_LOW_IDX,
3436 ib_wr->wr.fast_reg.length);
3437 set_wqe_32bit_value(wqe->wqe_words,
3438 NES_IWARP_SQ_FMR_WQE_MR_STAG_IDX,
3439 ib_wr->wr.fast_reg.rkey);
3440 /* Set page size: */
3441 if (ib_wr->wr.fast_reg.page_shift == 12) {
3442 wqe_misc |= NES_IWARP_SQ_FMR_WQE_PAGE_SIZE_4K;
3443 } else if (ib_wr->wr.fast_reg.page_shift == 21) {
3444 wqe_misc |= NES_IWARP_SQ_FMR_WQE_PAGE_SIZE_2M;
3445 } else {
3446 nes_debug(NES_DBG_IW_TX, "Invalid page shift,"
3447 " ib_wr=%u, max=1\n", ib_wr->num_sge);
3448 err = -EINVAL;
3449 break;
3450 }
3451 /* Set access_flags */
3452 wqe_misc |= NES_IWARP_SQ_FMR_WQE_RIGHTS_ENABLE_LOCAL_READ;
3453 if (flags & IB_ACCESS_LOCAL_WRITE)
3454 wqe_misc |= NES_IWARP_SQ_FMR_WQE_RIGHTS_ENABLE_LOCAL_WRITE;
3455
3456 if (flags & IB_ACCESS_REMOTE_WRITE)
3457 wqe_misc |= NES_IWARP_SQ_FMR_WQE_RIGHTS_ENABLE_REMOTE_WRITE;
3458
3459 if (flags & IB_ACCESS_REMOTE_READ)
3460 wqe_misc |= NES_IWARP_SQ_FMR_WQE_RIGHTS_ENABLE_REMOTE_READ;
3461
3462 if (flags & IB_ACCESS_MW_BIND)
3463 wqe_misc |= NES_IWARP_SQ_FMR_WQE_RIGHTS_ENABLE_WINDOW_BIND;
3464
3465 /* Fill in PBL info: */
3466 if (ib_wr->wr.fast_reg.page_list_len >
3467 pnesfrpl->ibfrpl.max_page_list_len) {
3468 nes_debug(NES_DBG_IW_TX, "Invalid page list length,"
3469 " ib_wr=%p, value=%u, max=%u\n",
3470 ib_wr, ib_wr->wr.fast_reg.page_list_len,
3471 pnesfrpl->ibfrpl.max_page_list_len);
3472 err = -EINVAL;
3473 break;
3474 }
3475
3476 set_wqe_64bit_value(wqe->wqe_words,
3477 NES_IWARP_SQ_FMR_WQE_PBL_ADDR_LOW_IDX,
3478 pnesfrpl->nes_wqe_pbl.paddr);
3479
3480 set_wqe_32bit_value(wqe->wqe_words,
3481 NES_IWARP_SQ_FMR_WQE_PBL_LENGTH_IDX,
3482 ib_wr->wr.fast_reg.page_list_len * 8);
3483
3484 for (i = 0; i < ib_wr->wr.fast_reg.page_list_len; i++)
3485 dst_page_list[i] = cpu_to_le64(src_page_list[i]);
3486
3487 nes_debug(NES_DBG_IW_TX, "SQ_FMR: iova_start: %p, "
3488 "length: %d, rkey: %0x, pgl_paddr: %p, "
3489 "page_list_len: %u, wqe_misc: %x\n",
3490 (void *)ib_wr->wr.fast_reg.iova_start,
3491 ib_wr->wr.fast_reg.length,
3492 ib_wr->wr.fast_reg.rkey,
3493 (void *)pnesfrpl->nes_wqe_pbl.paddr,
3494 ib_wr->wr.fast_reg.page_list_len,
3495 wqe_misc);
3496 break;
3497 }
3498 default:
3499 /* error */
3500 err = -EINVAL;
3501 break;
3503 } 3502 }
3503
3504 if (err)
3505 break;
3506
3507 if ((ib_wr->send_flags & IB_SEND_SIGNALED) || nesqp->sig_all)
3508 wqe_misc |= NES_IWARP_SQ_WQE_SIGNALED_COMPL;
3509
3504 wqe->wqe_words[NES_IWARP_SQ_WQE_MISC_IDX] = cpu_to_le32(wqe_misc); 3510 wqe->wqe_words[NES_IWARP_SQ_WQE_MISC_IDX] = cpu_to_le32(wqe_misc);
3505 3511
3506 ib_wr = ib_wr->next; 3512 ib_wr = ib_wr->next;
@@ -3522,6 +3528,7 @@ static int nes_post_send(struct ib_qp *ibqp, struct ib_send_wr *ib_wr,
3522 3528
3523 spin_unlock_irqrestore(&nesqp->lock, flags); 3529 spin_unlock_irqrestore(&nesqp->lock, flags);
3524 3530
3531out:
3525 if (err) 3532 if (err)
3526 *bad_wr = ib_wr; 3533 *bad_wr = ib_wr;
3527 return err; 3534 return err;
@@ -3548,8 +3555,10 @@ static int nes_post_recv(struct ib_qp *ibqp, struct ib_recv_wr *ib_wr,
3548 u32 counter; 3555 u32 counter;
3549 u32 total_payload_length; 3556 u32 total_payload_length;
3550 3557
3551 if (nesqp->ibqp_state > IB_QPS_RTS) 3558 if (nesqp->ibqp_state > IB_QPS_RTS) {
3552 return -EINVAL; 3559 err = -EINVAL;
3560 goto out;
3561 }
3553 3562
3554 spin_lock_irqsave(&nesqp->lock, flags); 3563 spin_lock_irqsave(&nesqp->lock, flags);
3555 3564
@@ -3612,6 +3621,7 @@ static int nes_post_recv(struct ib_qp *ibqp, struct ib_recv_wr *ib_wr,
3612 3621
3613 spin_unlock_irqrestore(&nesqp->lock, flags); 3622 spin_unlock_irqrestore(&nesqp->lock, flags);
3614 3623
3624out:
3615 if (err) 3625 if (err)
3616 *bad_wr = ib_wr; 3626 *bad_wr = ib_wr;
3617 return err; 3627 return err;
@@ -3720,6 +3730,12 @@ static int nes_poll_cq(struct ib_cq *ibcq, int num_entries, struct ib_wc *entry)
3720 nes_debug(NES_DBG_CQ, "Operation = Send.\n"); 3730 nes_debug(NES_DBG_CQ, "Operation = Send.\n");
3721 entry->opcode = IB_WC_SEND; 3731 entry->opcode = IB_WC_SEND;
3722 break; 3732 break;
3733 case NES_IWARP_SQ_OP_LOCINV:
3734 entry->opcode = IB_WR_LOCAL_INV;
3735 break;
3736 case NES_IWARP_SQ_OP_FAST_REG:
3737 entry->opcode = IB_WC_FAST_REG_MR;
3738 break;
3723 } 3739 }
3724 3740
3725 nesqp->hwqp.sq_tail = (wqe_index+1)&(nesqp->hwqp.sq_size - 1); 3741 nesqp->hwqp.sq_tail = (wqe_index+1)&(nesqp->hwqp.sq_size - 1);
@@ -3890,10 +3906,9 @@ struct nes_ib_device *nes_init_ofa_device(struct net_device *netdev)
3890 nesibdev->ibdev.dealloc_mw = nes_dealloc_mw; 3906 nesibdev->ibdev.dealloc_mw = nes_dealloc_mw;
3891 nesibdev->ibdev.bind_mw = nes_bind_mw; 3907 nesibdev->ibdev.bind_mw = nes_bind_mw;
3892 3908
3893 nesibdev->ibdev.alloc_fmr = nes_alloc_fmr; 3909 nesibdev->ibdev.alloc_fast_reg_mr = nes_alloc_fast_reg_mr;
3894 nesibdev->ibdev.unmap_fmr = nes_unmap_fmr; 3910 nesibdev->ibdev.alloc_fast_reg_page_list = nes_alloc_fast_reg_page_list;
3895 nesibdev->ibdev.dealloc_fmr = nes_dealloc_fmr; 3911 nesibdev->ibdev.free_fast_reg_page_list = nes_free_fast_reg_page_list;
3896 nesibdev->ibdev.map_phys_fmr = nes_map_phys_fmr;
3897 3912
3898 nesibdev->ibdev.attach_mcast = nes_multicast_attach; 3913 nesibdev->ibdev.attach_mcast = nes_multicast_attach;
3899 nesibdev->ibdev.detach_mcast = nes_multicast_detach; 3914 nesibdev->ibdev.detach_mcast = nes_multicast_detach;
diff --git a/drivers/infiniband/hw/nes/nes_verbs.h b/drivers/infiniband/hw/nes/nes_verbs.h
index 89822d75f82e..2df9993e0cac 100644
--- a/drivers/infiniband/hw/nes/nes_verbs.h
+++ b/drivers/infiniband/hw/nes/nes_verbs.h
@@ -1,5 +1,5 @@
1/* 1/*
2 * Copyright (c) 2006 - 2009 Intel-NE, Inc. All rights reserved. 2 * Copyright (c) 2006 - 2009 Intel Corporation. All rights reserved.
3 * Copyright (c) 2005 Open Grid Computing, Inc. All rights reserved. 3 * Copyright (c) 2005 Open Grid Computing, Inc. All rights reserved.
4 * 4 *
5 * This software is available to you under a choice of one of two 5 * This software is available to you under a choice of one of two
@@ -135,19 +135,15 @@ struct nes_qp {
135 struct ib_qp ibqp; 135 struct ib_qp ibqp;
136 void *allocated_buffer; 136 void *allocated_buffer;
137 struct iw_cm_id *cm_id; 137 struct iw_cm_id *cm_id;
138 struct workqueue_struct *wq;
139 struct nes_cq *nesscq; 138 struct nes_cq *nesscq;
140 struct nes_cq *nesrcq; 139 struct nes_cq *nesrcq;
141 struct nes_pd *nespd; 140 struct nes_pd *nespd;
142 void *cm_node; /* handle of the node this QP is associated with */ 141 void *cm_node; /* handle of the node this QP is associated with */
143 struct ietf_mpa_frame *ietf_frame; 142 struct ietf_mpa_frame *ietf_frame;
144 dma_addr_t ietf_frame_pbase; 143 dma_addr_t ietf_frame_pbase;
145 wait_queue_head_t state_waitq;
146 struct ib_mr *lsmm_mr; 144 struct ib_mr *lsmm_mr;
147 unsigned long socket;
148 struct nes_hw_qp hwqp; 145 struct nes_hw_qp hwqp;
149 struct work_struct work; 146 struct work_struct work;
150 struct work_struct ae_work;
151 enum ib_qp_state ibqp_state; 147 enum ib_qp_state ibqp_state;
152 u32 iwarp_state; 148 u32 iwarp_state;
153 u32 hte_index; 149 u32 hte_index;
@@ -165,19 +161,20 @@ struct nes_qp {
165 struct page *page; 161 struct page *page;
166 struct timer_list terminate_timer; 162 struct timer_list terminate_timer;
167 enum ib_event_type terminate_eventtype; 163 enum ib_event_type terminate_eventtype;
168 wait_queue_head_t kick_waitq; 164 u16 active_conn:1;
169 u16 in_disconnect; 165 u16 skip_lsmm:1;
166 u16 user_mode:1;
167 u16 hte_added:1;
168 u16 flush_issued:1;
169 u16 destroyed:1;
170 u16 sig_all:1;
171 u16 rsvd:9;
170 u16 private_data_len; 172 u16 private_data_len;
171 u16 term_sq_flush_code; 173 u16 term_sq_flush_code;
172 u16 term_rq_flush_code; 174 u16 term_rq_flush_code;
173 u8 active_conn;
174 u8 skip_lsmm;
175 u8 user_mode;
176 u8 hte_added;
177 u8 hw_iwarp_state; 175 u8 hw_iwarp_state;
178 u8 flush_issued;
179 u8 hw_tcp_state; 176 u8 hw_tcp_state;
180 u8 term_flags; 177 u8 term_flags;
181 u8 destroyed; 178 u8 sq_kmapped;
182}; 179};
183#endif /* NES_VERBS_H */ 180#endif /* NES_VERBS_H */
diff --git a/drivers/infiniband/ulp/ipoib/ipoib_main.c b/drivers/infiniband/ulp/ipoib/ipoib_main.c
index 2bf5116deec4..df3eb8c9fd96 100644
--- a/drivers/infiniband/ulp/ipoib/ipoib_main.c
+++ b/drivers/infiniband/ulp/ipoib/ipoib_main.c
@@ -884,6 +884,7 @@ struct ipoib_neigh *ipoib_neigh_alloc(struct neighbour *neighbour,
884 884
885 neigh->neighbour = neighbour; 885 neigh->neighbour = neighbour;
886 neigh->dev = dev; 886 neigh->dev = dev;
887 memset(&neigh->dgid.raw, 0, sizeof (union ib_gid));
887 *to_ipoib_neigh(neighbour) = neigh; 888 *to_ipoib_neigh(neighbour) = neigh;
888 skb_queue_head_init(&neigh->queue); 889 skb_queue_head_init(&neigh->queue);
889 ipoib_cm_set(neigh, NULL); 890 ipoib_cm_set(neigh, NULL);
diff --git a/drivers/infiniband/ulp/iser/iser_memory.c b/drivers/infiniband/ulp/iser/iser_memory.c
index b9453d068e9d..274c883ef3ea 100644
--- a/drivers/infiniband/ulp/iser/iser_memory.c
+++ b/drivers/infiniband/ulp/iser/iser_memory.c
@@ -209,6 +209,8 @@ void iser_finalize_rdma_unaligned_sg(struct iscsi_iser_task *iser_task,
209 mem_copy->copy_buf = NULL; 209 mem_copy->copy_buf = NULL;
210} 210}
211 211
212#define IS_4K_ALIGNED(addr) ((((unsigned long)addr) & ~MASK_4K) == 0)
213
212/** 214/**
213 * iser_sg_to_page_vec - Translates scatterlist entries to physical addresses 215 * iser_sg_to_page_vec - Translates scatterlist entries to physical addresses
214 * and returns the length of resulting physical address array (may be less than 216 * and returns the length of resulting physical address array (may be less than
@@ -221,62 +223,52 @@ void iser_finalize_rdma_unaligned_sg(struct iscsi_iser_task *iser_task,
221 * where --few fragments of the same page-- are present in the SG as 223 * where --few fragments of the same page-- are present in the SG as
222 * consecutive elements. Also, it handles one entry SG. 224 * consecutive elements. Also, it handles one entry SG.
223 */ 225 */
226
224static int iser_sg_to_page_vec(struct iser_data_buf *data, 227static int iser_sg_to_page_vec(struct iser_data_buf *data,
225 struct iser_page_vec *page_vec, 228 struct iser_page_vec *page_vec,
226 struct ib_device *ibdev) 229 struct ib_device *ibdev)
227{ 230{
228 struct scatterlist *sgl = (struct scatterlist *)data->buf; 231 struct scatterlist *sg, *sgl = (struct scatterlist *)data->buf;
229 struct scatterlist *sg; 232 u64 start_addr, end_addr, page, chunk_start = 0;
230 u64 first_addr, last_addr, page;
231 int end_aligned;
232 unsigned int cur_page = 0;
233 unsigned long total_sz = 0; 233 unsigned long total_sz = 0;
234 int i; 234 unsigned int dma_len;
235 int i, new_chunk, cur_page, last_ent = data->dma_nents - 1;
235 236
236 /* compute the offset of first element */ 237 /* compute the offset of first element */
237 page_vec->offset = (u64) sgl[0].offset & ~MASK_4K; 238 page_vec->offset = (u64) sgl[0].offset & ~MASK_4K;
238 239
240 new_chunk = 1;
241 cur_page = 0;
239 for_each_sg(sgl, sg, data->dma_nents, i) { 242 for_each_sg(sgl, sg, data->dma_nents, i) {
240 unsigned int dma_len = ib_sg_dma_len(ibdev, sg); 243 start_addr = ib_sg_dma_address(ibdev, sg);
241 244 if (new_chunk)
245 chunk_start = start_addr;
246 dma_len = ib_sg_dma_len(ibdev, sg);
247 end_addr = start_addr + dma_len;
242 total_sz += dma_len; 248 total_sz += dma_len;
243 249
244 first_addr = ib_sg_dma_address(ibdev, sg); 250 /* collect page fragments until aligned or end of SG list */
245 last_addr = first_addr + dma_len; 251 if (!IS_4K_ALIGNED(end_addr) && i < last_ent) {
246 252 new_chunk = 0;
247 end_aligned = !(last_addr & ~MASK_4K); 253 continue;
248
249 /* continue to collect page fragments till aligned or SG ends */
250 while (!end_aligned && (i + 1 < data->dma_nents)) {
251 sg = sg_next(sg);
252 i++;
253 dma_len = ib_sg_dma_len(ibdev, sg);
254 total_sz += dma_len;
255 last_addr = ib_sg_dma_address(ibdev, sg) + dma_len;
256 end_aligned = !(last_addr & ~MASK_4K);
257 } 254 }
258 255 new_chunk = 1;
259 /* handle the 1st page in the 1st DMA element */ 256
260 if (cur_page == 0) { 257 /* address of the first page in the contiguous chunk;
261 page = first_addr & MASK_4K; 258 masking relevant for the very first SG entry,
262 page_vec->pages[cur_page] = page; 259 which might be unaligned */
263 cur_page++; 260 page = chunk_start & MASK_4K;
261 do {
262 page_vec->pages[cur_page++] = page;
264 page += SIZE_4K; 263 page += SIZE_4K;
265 } else 264 } while (page < end_addr);
266 page = first_addr;
267
268 for (; page < last_addr; page += SIZE_4K) {
269 page_vec->pages[cur_page] = page;
270 cur_page++;
271 }
272
273 } 265 }
266
274 page_vec->data_size = total_sz; 267 page_vec->data_size = total_sz;
275 iser_dbg("page_vec->data_size:%d cur_page %d\n", page_vec->data_size,cur_page); 268 iser_dbg("page_vec->data_size:%d cur_page %d\n", page_vec->data_size,cur_page);
276 return cur_page; 269 return cur_page;
277} 270}
278 271
279#define IS_4K_ALIGNED(addr) ((((unsigned long)addr) & ~MASK_4K) == 0)
280 272
281/** 273/**
282 * iser_data_buf_aligned_len - Tries to determine the maximal correctly aligned 274 * iser_data_buf_aligned_len - Tries to determine the maximal correctly aligned
@@ -284,42 +276,40 @@ static int iser_sg_to_page_vec(struct iser_data_buf *data,
284 * the number of entries which are aligned correctly. Supports the case where 276 * the number of entries which are aligned correctly. Supports the case where
285 * consecutive SG elements are actually fragments of the same physcial page. 277 * consecutive SG elements are actually fragments of the same physcial page.
286 */ 278 */
287static unsigned int iser_data_buf_aligned_len(struct iser_data_buf *data, 279static int iser_data_buf_aligned_len(struct iser_data_buf *data,
288 struct ib_device *ibdev) 280 struct ib_device *ibdev)
289{ 281{
290 struct scatterlist *sgl, *sg; 282 struct scatterlist *sgl, *sg, *next_sg = NULL;
291 u64 end_addr, next_addr; 283 u64 start_addr, end_addr;
292 int i, cnt; 284 int i, ret_len, start_check = 0;
293 unsigned int ret_len = 0; 285
286 if (data->dma_nents == 1)
287 return 1;
294 288
295 sgl = (struct scatterlist *)data->buf; 289 sgl = (struct scatterlist *)data->buf;
290 start_addr = ib_sg_dma_address(ibdev, sgl);
296 291
297 cnt = 0;
298 for_each_sg(sgl, sg, data->dma_nents, i) { 292 for_each_sg(sgl, sg, data->dma_nents, i) {
299 /* iser_dbg("Checking sg iobuf [%d]: phys=0x%08lX " 293 if (start_check && !IS_4K_ALIGNED(start_addr))
300 "offset: %ld sz: %ld\n", i, 294 break;
301 (unsigned long)sg_phys(sg), 295
302 (unsigned long)sg->offset, 296 next_sg = sg_next(sg);
303 (unsigned long)sg->length); */ 297 if (!next_sg)
304 end_addr = ib_sg_dma_address(ibdev, sg) + 298 break;
305 ib_sg_dma_len(ibdev, sg); 299
306 /* iser_dbg("Checking sg iobuf end address " 300 end_addr = start_addr + ib_sg_dma_len(ibdev, sg);
307 "0x%08lX\n", end_addr); */ 301 start_addr = ib_sg_dma_address(ibdev, next_sg);
308 if (i + 1 < data->dma_nents) { 302
309 next_addr = ib_sg_dma_address(ibdev, sg_next(sg)); 303 if (end_addr == start_addr) {
310 /* are i, i+1 fragments of the same page? */ 304 start_check = 0;
311 if (end_addr == next_addr) { 305 continue;
312 cnt++; 306 } else
313 continue; 307 start_check = 1;
314 } else if (!IS_4K_ALIGNED(end_addr)) { 308
315 ret_len = cnt + 1; 309 if (!IS_4K_ALIGNED(end_addr))
316 break; 310 break;
317 }
318 }
319 cnt++;
320 } 311 }
321 if (i == data->dma_nents) 312 ret_len = (next_sg) ? i : i+1;
322 ret_len = cnt; /* loop ended */
323 iser_dbg("Found %d aligned entries out of %d in sg:0x%p\n", 313 iser_dbg("Found %d aligned entries out of %d in sg:0x%p\n",
324 ret_len, data->dma_nents, data); 314 ret_len, data->dma_nents, data);
325 return ret_len; 315 return ret_len;
diff --git a/drivers/input/evdev.c b/drivers/input/evdev.c
index dee6706038aa..258c639571b5 100644
--- a/drivers/input/evdev.c
+++ b/drivers/input/evdev.c
@@ -59,7 +59,8 @@ static void evdev_pass_event(struct evdev_client *client,
59 client->head &= EVDEV_BUFFER_SIZE - 1; 59 client->head &= EVDEV_BUFFER_SIZE - 1;
60 spin_unlock(&client->buffer_lock); 60 spin_unlock(&client->buffer_lock);
61 61
62 kill_fasync(&client->fasync, SIGIO, POLL_IN); 62 if (event->type == EV_SYN)
63 kill_fasync(&client->fasync, SIGIO, POLL_IN);
63} 64}
64 65
65/* 66/*
diff --git a/drivers/input/ff-memless.c b/drivers/input/ff-memless.c
index b483b2995fa9..f967008f332e 100644
--- a/drivers/input/ff-memless.c
+++ b/drivers/input/ff-memless.c
@@ -221,11 +221,27 @@ static int get_compatible_type(struct ff_device *ff, int effect_type)
221} 221}
222 222
223/* 223/*
224 * Only left/right direction should be used (under/over 0x8000) for
225 * forward/reverse motor direction (to keep calculation fast & simple).
226 */
227static u16 ml_calculate_direction(u16 direction, u16 force,
228 u16 new_direction, u16 new_force)
229{
230 if (!force)
231 return new_direction;
232 if (!new_force)
233 return direction;
234 return (((u32)(direction >> 1) * force +
235 (new_direction >> 1) * new_force) /
236 (force + new_force)) << 1;
237}
238
239/*
224 * Combine two effects and apply gain. 240 * Combine two effects and apply gain.
225 */ 241 */
226static void ml_combine_effects(struct ff_effect *effect, 242static void ml_combine_effects(struct ff_effect *effect,
227 struct ml_effect_state *state, 243 struct ml_effect_state *state,
228 unsigned int gain) 244 int gain)
229{ 245{
230 struct ff_effect *new = state->effect; 246 struct ff_effect *new = state->effect;
231 unsigned int strong, weak, i; 247 unsigned int strong, weak, i;
@@ -252,8 +268,21 @@ static void ml_combine_effects(struct ff_effect *effect,
252 break; 268 break;
253 269
254 case FF_RUMBLE: 270 case FF_RUMBLE:
255 strong = new->u.rumble.strong_magnitude * gain / 0xffff; 271 strong = (u32)new->u.rumble.strong_magnitude * gain / 0xffff;
256 weak = new->u.rumble.weak_magnitude * gain / 0xffff; 272 weak = (u32)new->u.rumble.weak_magnitude * gain / 0xffff;
273
274 if (effect->u.rumble.strong_magnitude + strong)
275 effect->direction = ml_calculate_direction(
276 effect->direction,
277 effect->u.rumble.strong_magnitude,
278 new->direction, strong);
279 else if (effect->u.rumble.weak_magnitude + weak)
280 effect->direction = ml_calculate_direction(
281 effect->direction,
282 effect->u.rumble.weak_magnitude,
283 new->direction, weak);
284 else
285 effect->direction = 0;
257 effect->u.rumble.strong_magnitude = 286 effect->u.rumble.strong_magnitude =
258 min(strong + effect->u.rumble.strong_magnitude, 287 min(strong + effect->u.rumble.strong_magnitude,
259 0xffffU); 288 0xffffU);
@@ -268,6 +297,13 @@ static void ml_combine_effects(struct ff_effect *effect,
268 /* here we also scale it 0x7fff => 0xffff */ 297 /* here we also scale it 0x7fff => 0xffff */
269 i = i * gain / 0x7fff; 298 i = i * gain / 0x7fff;
270 299
300 if (effect->u.rumble.strong_magnitude + i)
301 effect->direction = ml_calculate_direction(
302 effect->direction,
303 effect->u.rumble.strong_magnitude,
304 new->direction, i);
305 else
306 effect->direction = 0;
271 effect->u.rumble.strong_magnitude = 307 effect->u.rumble.strong_magnitude =
272 min(i + effect->u.rumble.strong_magnitude, 0xffffU); 308 min(i + effect->u.rumble.strong_magnitude, 0xffffU);
273 effect->u.rumble.weak_magnitude = 309 effect->u.rumble.weak_magnitude =
@@ -411,8 +447,6 @@ static int ml_ff_playback(struct input_dev *dev, int effect_id, int value)
411 msecs_to_jiffies(state->effect->replay.length); 447 msecs_to_jiffies(state->effect->replay.length);
412 state->adj_at = state->play_at; 448 state->adj_at = state->play_at;
413 449
414 ml_schedule_timer(ml);
415
416 } else { 450 } else {
417 debug("initiated stop"); 451 debug("initiated stop");
418 452
@@ -420,10 +454,10 @@ static int ml_ff_playback(struct input_dev *dev, int effect_id, int value)
420 __set_bit(FF_EFFECT_ABORTING, &state->flags); 454 __set_bit(FF_EFFECT_ABORTING, &state->flags);
421 else 455 else
422 __clear_bit(FF_EFFECT_STARTED, &state->flags); 456 __clear_bit(FF_EFFECT_STARTED, &state->flags);
423
424 ml_play_effects(ml);
425 } 457 }
426 458
459 ml_play_effects(ml);
460
427 return 0; 461 return 0;
428} 462}
429 463
diff --git a/drivers/input/input-polldev.c b/drivers/input/input-polldev.c
index aa6713b4a988..291d9393d359 100644
--- a/drivers/input/input-polldev.c
+++ b/drivers/input/input-polldev.c
@@ -100,6 +100,12 @@ static void input_close_polled_device(struct input_dev *input)
100 struct input_polled_dev *dev = input_get_drvdata(input); 100 struct input_polled_dev *dev = input_get_drvdata(input);
101 101
102 cancel_delayed_work_sync(&dev->work); 102 cancel_delayed_work_sync(&dev->work);
103 /*
104 * Clean up work struct to remove references to the workqueue.
105 * It may be destroyed by the next call. This causes problems
106 * at next device open-close in case of poll_interval == 0.
107 */
108 INIT_DELAYED_WORK(&dev->work, dev->work.work.func);
103 input_polldev_stop_workqueue(); 109 input_polldev_stop_workqueue();
104 110
105 if (dev->close) 111 if (dev->close)
diff --git a/drivers/input/input.c b/drivers/input/input.c
index 5c16001959cc..86cb2d2196ff 100644
--- a/drivers/input/input.c
+++ b/drivers/input/input.c
@@ -24,6 +24,7 @@
24#include <linux/mutex.h> 24#include <linux/mutex.h>
25#include <linux/rcupdate.h> 25#include <linux/rcupdate.h>
26#include <linux/smp_lock.h> 26#include <linux/smp_lock.h>
27#include "input-compat.h"
27 28
28MODULE_AUTHOR("Vojtech Pavlik <vojtech@suse.cz>"); 29MODULE_AUTHOR("Vojtech Pavlik <vojtech@suse.cz>");
29MODULE_DESCRIPTION("Input core"); 30MODULE_DESCRIPTION("Input core");
@@ -45,6 +46,7 @@ static unsigned int input_abs_bypass_init_data[] __initdata = {
45 ABS_MT_TOOL_TYPE, 46 ABS_MT_TOOL_TYPE,
46 ABS_MT_BLOB_ID, 47 ABS_MT_BLOB_ID,
47 ABS_MT_TRACKING_ID, 48 ABS_MT_TRACKING_ID,
49 ABS_MT_PRESSURE,
48 0 50 0
49}; 51};
50static unsigned long input_abs_bypass[BITS_TO_LONGS(ABS_CNT)]; 52static unsigned long input_abs_bypass[BITS_TO_LONGS(ABS_CNT)];
@@ -296,9 +298,15 @@ static void input_handle_event(struct input_dev *dev,
296 * @value: value of the event 298 * @value: value of the event
297 * 299 *
298 * This function should be used by drivers implementing various input 300 * This function should be used by drivers implementing various input
299 * devices. See also input_inject_event(). 301 * devices to report input events. See also input_inject_event().
302 *
303 * NOTE: input_event() may be safely used right after input device was
304 * allocated with input_allocate_device(), even before it is registered
305 * with input_register_device(), but the event will not reach any of the
306 * input handlers. Such early invocation of input_event() may be used
307 * to 'seed' initial state of a switch or initial position of absolute
308 * axis, etc.
300 */ 309 */
301
302void input_event(struct input_dev *dev, 310void input_event(struct input_dev *dev,
303 unsigned int type, unsigned int code, int value) 311 unsigned int type, unsigned int code, int value)
304{ 312{
@@ -758,6 +766,40 @@ static int input_attach_handler(struct input_dev *dev, struct input_handler *han
758 return error; 766 return error;
759} 767}
760 768
769#ifdef CONFIG_COMPAT
770
771static int input_bits_to_string(char *buf, int buf_size,
772 unsigned long bits, bool skip_empty)
773{
774 int len = 0;
775
776 if (INPUT_COMPAT_TEST) {
777 u32 dword = bits >> 32;
778 if (dword || !skip_empty)
779 len += snprintf(buf, buf_size, "%x ", dword);
780
781 dword = bits & 0xffffffffUL;
782 if (dword || !skip_empty || len)
783 len += snprintf(buf + len, max(buf_size - len, 0),
784 "%x", dword);
785 } else {
786 if (bits || !skip_empty)
787 len += snprintf(buf, buf_size, "%lx", bits);
788 }
789
790 return len;
791}
792
793#else /* !CONFIG_COMPAT */
794
795static int input_bits_to_string(char *buf, int buf_size,
796 unsigned long bits, bool skip_empty)
797{
798 return bits || !skip_empty ?
799 snprintf(buf, buf_size, "%lx", bits) : 0;
800}
801
802#endif
761 803
762#ifdef CONFIG_PROC_FS 804#ifdef CONFIG_PROC_FS
763 805
@@ -826,14 +868,25 @@ static void input_seq_print_bitmap(struct seq_file *seq, const char *name,
826 unsigned long *bitmap, int max) 868 unsigned long *bitmap, int max)
827{ 869{
828 int i; 870 int i;
829 871 bool skip_empty = true;
830 for (i = BITS_TO_LONGS(max) - 1; i > 0; i--) 872 char buf[18];
831 if (bitmap[i])
832 break;
833 873
834 seq_printf(seq, "B: %s=", name); 874 seq_printf(seq, "B: %s=", name);
835 for (; i >= 0; i--) 875
836 seq_printf(seq, "%lx%s", bitmap[i], i > 0 ? " " : ""); 876 for (i = BITS_TO_LONGS(max) - 1; i >= 0; i--) {
877 if (input_bits_to_string(buf, sizeof(buf),
878 bitmap[i], skip_empty)) {
879 skip_empty = false;
880 seq_printf(seq, "%s%s", buf, i > 0 ? " " : "");
881 }
882 }
883
884 /*
885 * If no output was produced print a single 0.
886 */
887 if (skip_empty)
888 seq_puts(seq, "0");
889
837 seq_putc(seq, '\n'); 890 seq_putc(seq, '\n');
838} 891}
839 892
@@ -1122,14 +1175,23 @@ static int input_print_bitmap(char *buf, int buf_size, unsigned long *bitmap,
1122{ 1175{
1123 int i; 1176 int i;
1124 int len = 0; 1177 int len = 0;
1178 bool skip_empty = true;
1179
1180 for (i = BITS_TO_LONGS(max) - 1; i >= 0; i--) {
1181 len += input_bits_to_string(buf + len, max(buf_size - len, 0),
1182 bitmap[i], skip_empty);
1183 if (len) {
1184 skip_empty = false;
1185 if (i > 0)
1186 len += snprintf(buf + len, max(buf_size - len, 0), " ");
1187 }
1188 }
1125 1189
1126 for (i = BITS_TO_LONGS(max) - 1; i > 0; i--) 1190 /*
1127 if (bitmap[i]) 1191 * If no output was produced print a single 0.
1128 break; 1192 */
1129 1193 if (len == 0)
1130 for (; i >= 0; i--) 1194 len = snprintf(buf, buf_size, "%d", 0);
1131 len += snprintf(buf + len, max(buf_size - len, 0),
1132 "%lx%s", bitmap[i], i > 0 ? " " : "");
1133 1195
1134 if (add_cr) 1196 if (add_cr)
1135 len += snprintf(buf + len, max(buf_size - len, 0), "\n"); 1197 len += snprintf(buf + len, max(buf_size - len, 0), "\n");
@@ -1144,7 +1206,8 @@ static ssize_t input_dev_show_cap_##bm(struct device *dev, \
1144{ \ 1206{ \
1145 struct input_dev *input_dev = to_input_dev(dev); \ 1207 struct input_dev *input_dev = to_input_dev(dev); \
1146 int len = input_print_bitmap(buf, PAGE_SIZE, \ 1208 int len = input_print_bitmap(buf, PAGE_SIZE, \
1147 input_dev->bm##bit, ev##_MAX, 1); \ 1209 input_dev->bm##bit, ev##_MAX, \
1210 true); \
1148 return min_t(int, len, PAGE_SIZE); \ 1211 return min_t(int, len, PAGE_SIZE); \
1149} \ 1212} \
1150static DEVICE_ATTR(bm, S_IRUGO, input_dev_show_cap_##bm, NULL) 1213static DEVICE_ATTR(bm, S_IRUGO, input_dev_show_cap_##bm, NULL)
@@ -1208,7 +1271,7 @@ static int input_add_uevent_bm_var(struct kobj_uevent_env *env,
1208 1271
1209 len = input_print_bitmap(&env->buf[env->buflen - 1], 1272 len = input_print_bitmap(&env->buf[env->buflen - 1],
1210 sizeof(env->buf) - env->buflen, 1273 sizeof(env->buf) - env->buflen,
1211 bitmap, max, 0); 1274 bitmap, max, false);
1212 if (len >= (sizeof(env->buf) - env->buflen)) 1275 if (len >= (sizeof(env->buf) - env->buflen))
1213 return -ENOMEM; 1276 return -ENOMEM;
1214 1277
diff --git a/drivers/input/joystick/gf2k.c b/drivers/input/joystick/gf2k.c
index 67c207f5b1a1..45ac70eae0aa 100644
--- a/drivers/input/joystick/gf2k.c
+++ b/drivers/input/joystick/gf2k.c
@@ -277,7 +277,7 @@ static int gf2k_connect(struct gameport *gameport, struct gameport_driver *drv)
277 } 277 }
278 278
279#ifdef RESET_WORKS 279#ifdef RESET_WORKS
280 if ((gf2k->id != (GB(19,2,0) | GB(15,3,2) | GB(12,3,5))) || 280 if ((gf2k->id != (GB(19,2,0) | GB(15,3,2) | GB(12,3,5))) &&
281 (gf2k->id != (GB(31,2,0) | GB(27,3,2) | GB(24,3,5)))) { 281 (gf2k->id != (GB(31,2,0) | GB(27,3,2) | GB(24,3,5)))) {
282 err = -ENODEV; 282 err = -ENODEV;
283 goto fail2; 283 goto fail2;
diff --git a/drivers/input/joystick/iforce/iforce-main.c b/drivers/input/joystick/iforce/iforce-main.c
index f6c688cae334..b1edd778639c 100644
--- a/drivers/input/joystick/iforce/iforce-main.c
+++ b/drivers/input/joystick/iforce/iforce-main.c
@@ -210,7 +210,7 @@ static int iforce_open(struct input_dev *dev)
210 return 0; 210 return 0;
211} 211}
212 212
213static void iforce_release(struct input_dev *dev) 213static void iforce_close(struct input_dev *dev)
214{ 214{
215 struct iforce *iforce = input_get_drvdata(dev); 215 struct iforce *iforce = input_get_drvdata(dev);
216 int i; 216 int i;
@@ -228,30 +228,17 @@ static void iforce_release(struct input_dev *dev)
228 228
229 /* Disable force feedback playback */ 229 /* Disable force feedback playback */
230 iforce_send_packet(iforce, FF_CMD_ENABLE, "\001"); 230 iforce_send_packet(iforce, FF_CMD_ENABLE, "\001");
231 /* Wait for the command to complete */
232 wait_event_interruptible(iforce->wait,
233 !test_bit(IFORCE_XMIT_RUNNING, iforce->xmit_flags));
231 } 234 }
232 235
233 switch (iforce->bus) { 236 switch (iforce->bus) {
234#ifdef CONFIG_JOYSTICK_IFORCE_USB 237#ifdef CONFIG_JOYSTICK_IFORCE_USB
235 case IFORCE_USB:
236 usb_kill_urb(iforce->irq);
237
238 /* The device was unplugged before the file
239 * was released */
240 if (iforce->usbdev == NULL) {
241 iforce_delete_device(iforce);
242 kfree(iforce);
243 }
244 break;
245#endif
246 }
247}
248
249void iforce_delete_device(struct iforce *iforce)
250{
251 switch (iforce->bus) {
252#ifdef CONFIG_JOYSTICK_IFORCE_USB
253 case IFORCE_USB: 238 case IFORCE_USB:
254 iforce_usb_delete(iforce); 239 usb_kill_urb(iforce->irq);
240 usb_kill_urb(iforce->out);
241 usb_kill_urb(iforce->ctrl);
255 break; 242 break;
256#endif 243#endif
257#ifdef CONFIG_JOYSTICK_IFORCE_232 244#ifdef CONFIG_JOYSTICK_IFORCE_232
@@ -303,7 +290,7 @@ int iforce_init_device(struct iforce *iforce)
303 290
304 input_dev->name = "Unknown I-Force device"; 291 input_dev->name = "Unknown I-Force device";
305 input_dev->open = iforce_open; 292 input_dev->open = iforce_open;
306 input_dev->close = iforce_release; 293 input_dev->close = iforce_close;
307 294
308/* 295/*
309 * On-device memory allocation. 296 * On-device memory allocation.
diff --git a/drivers/input/joystick/iforce/iforce-usb.c b/drivers/input/joystick/iforce/iforce-usb.c
index 9f289d8f52c6..b41303d3ec54 100644
--- a/drivers/input/joystick/iforce/iforce-usb.c
+++ b/drivers/input/joystick/iforce/iforce-usb.c
@@ -109,6 +109,7 @@ static void iforce_usb_out(struct urb *urb)
109 struct iforce *iforce = urb->context; 109 struct iforce *iforce = urb->context;
110 110
111 if (urb->status) { 111 if (urb->status) {
112 clear_bit(IFORCE_XMIT_RUNNING, iforce->xmit_flags);
112 dbg("urb->status %d, exiting", urb->status); 113 dbg("urb->status %d, exiting", urb->status);
113 return; 114 return;
114 } 115 }
@@ -186,33 +187,19 @@ fail:
186 return err; 187 return err;
187} 188}
188 189
189/* Called by iforce_delete() */
190void iforce_usb_delete(struct iforce* iforce)
191{
192 usb_kill_urb(iforce->irq);
193 usb_kill_urb(iforce->out);
194 usb_kill_urb(iforce->ctrl);
195
196 usb_free_urb(iforce->irq);
197 usb_free_urb(iforce->out);
198 usb_free_urb(iforce->ctrl);
199}
200
201static void iforce_usb_disconnect(struct usb_interface *intf) 190static void iforce_usb_disconnect(struct usb_interface *intf)
202{ 191{
203 struct iforce *iforce = usb_get_intfdata(intf); 192 struct iforce *iforce = usb_get_intfdata(intf);
204 int open = 0; /* FIXME! iforce->dev.handle->open; */
205 193
206 usb_set_intfdata(intf, NULL); 194 usb_set_intfdata(intf, NULL);
207 if (iforce) {
208 iforce->usbdev = NULL;
209 input_unregister_device(iforce->dev);
210 195
211 if (!open) { 196 input_unregister_device(iforce->dev);
212 iforce_delete_device(iforce); 197
213 kfree(iforce); 198 usb_free_urb(iforce->irq);
214 } 199 usb_free_urb(iforce->out);
215 } 200 usb_free_urb(iforce->ctrl);
201
202 kfree(iforce);
216} 203}
217 204
218static struct usb_device_id iforce_usb_ids [] = { 205static struct usb_device_id iforce_usb_ids [] = {
diff --git a/drivers/input/joystick/iforce/iforce.h b/drivers/input/joystick/iforce/iforce.h
index f2d91f4028ca..9f494b75848a 100644
--- a/drivers/input/joystick/iforce/iforce.h
+++ b/drivers/input/joystick/iforce/iforce.h
@@ -150,11 +150,9 @@ void iforce_serial_xmit(struct iforce *iforce);
150 150
151/* iforce-usb.c */ 151/* iforce-usb.c */
152void iforce_usb_xmit(struct iforce *iforce); 152void iforce_usb_xmit(struct iforce *iforce);
153void iforce_usb_delete(struct iforce *iforce);
154 153
155/* iforce-main.c */ 154/* iforce-main.c */
156int iforce_init_device(struct iforce *iforce); 155int iforce_init_device(struct iforce *iforce);
157void iforce_delete_device(struct iforce *iforce);
158 156
159/* iforce-packets.c */ 157/* iforce-packets.c */
160int iforce_control_playback(struct iforce*, u16 id, unsigned int); 158int iforce_control_playback(struct iforce*, u16 id, unsigned int);
diff --git a/drivers/input/joystick/xpad.c b/drivers/input/joystick/xpad.c
index 482cb1204e43..8a28fb7846dc 100644
--- a/drivers/input/joystick/xpad.c
+++ b/drivers/input/joystick/xpad.c
@@ -446,7 +446,7 @@ static void xpad_irq_in(struct urb *urb)
446 } 446 }
447 447
448exit: 448exit:
449 retval = usb_submit_urb (urb, GFP_ATOMIC); 449 retval = usb_submit_urb(urb, GFP_ATOMIC);
450 if (retval) 450 if (retval)
451 err ("%s - usb_submit_urb failed with result %d", 451 err ("%s - usb_submit_urb failed with result %d",
452 __func__, retval); 452 __func__, retval);
@@ -571,7 +571,7 @@ static int xpad_play_effect(struct input_dev *dev, void *data,
571 xpad->odata[6] = 0x00; 571 xpad->odata[6] = 0x00;
572 xpad->odata[7] = 0x00; 572 xpad->odata[7] = 0x00;
573 xpad->irq_out->transfer_buffer_length = 8; 573 xpad->irq_out->transfer_buffer_length = 8;
574 usb_submit_urb(xpad->irq_out, GFP_KERNEL); 574 usb_submit_urb(xpad->irq_out, GFP_ATOMIC);
575 } 575 }
576 576
577 return 0; 577 return 0;
diff --git a/drivers/input/keyboard/atkbd.c b/drivers/input/keyboard/atkbd.c
index a3573570c52f..7b4056292eaf 100644
--- a/drivers/input/keyboard/atkbd.c
+++ b/drivers/input/keyboard/atkbd.c
@@ -134,7 +134,8 @@ static const unsigned short atkbd_unxlate_table[128] = {
134#define ATKBD_CMD_GETID 0x02f2 134#define ATKBD_CMD_GETID 0x02f2
135#define ATKBD_CMD_SETREP 0x10f3 135#define ATKBD_CMD_SETREP 0x10f3
136#define ATKBD_CMD_ENABLE 0x00f4 136#define ATKBD_CMD_ENABLE 0x00f4
137#define ATKBD_CMD_RESET_DIS 0x00f5 137#define ATKBD_CMD_RESET_DIS 0x00f5 /* Reset to defaults and disable */
138#define ATKBD_CMD_RESET_DEF 0x00f6 /* Reset to defaults */
138#define ATKBD_CMD_SETALL_MBR 0x00fa 139#define ATKBD_CMD_SETALL_MBR 0x00fa
139#define ATKBD_CMD_RESET_BAT 0x02ff 140#define ATKBD_CMD_RESET_BAT 0x02ff
140#define ATKBD_CMD_RESEND 0x00fe 141#define ATKBD_CMD_RESEND 0x00fe
@@ -224,8 +225,10 @@ struct atkbd {
224 225
225 struct delayed_work event_work; 226 struct delayed_work event_work;
226 unsigned long event_jiffies; 227 unsigned long event_jiffies;
227 struct mutex event_mutex;
228 unsigned long event_mask; 228 unsigned long event_mask;
229
230 /* Serializes reconnect(), attr->set() and event work */
231 struct mutex mutex;
229}; 232};
230 233
231/* 234/*
@@ -576,7 +579,7 @@ static void atkbd_event_work(struct work_struct *work)
576{ 579{
577 struct atkbd *atkbd = container_of(work, struct atkbd, event_work.work); 580 struct atkbd *atkbd = container_of(work, struct atkbd, event_work.work);
578 581
579 mutex_lock(&atkbd->event_mutex); 582 mutex_lock(&atkbd->mutex);
580 583
581 if (!atkbd->enabled) { 584 if (!atkbd->enabled) {
582 /* 585 /*
@@ -595,7 +598,7 @@ static void atkbd_event_work(struct work_struct *work)
595 atkbd_set_repeat_rate(atkbd); 598 atkbd_set_repeat_rate(atkbd);
596 } 599 }
597 600
598 mutex_unlock(&atkbd->event_mutex); 601 mutex_unlock(&atkbd->mutex);
599} 602}
600 603
601/* 604/*
@@ -611,7 +614,7 @@ static void atkbd_schedule_event_work(struct atkbd *atkbd, int event_bit)
611 614
612 atkbd->event_jiffies = jiffies; 615 atkbd->event_jiffies = jiffies;
613 set_bit(event_bit, &atkbd->event_mask); 616 set_bit(event_bit, &atkbd->event_mask);
614 wmb(); 617 mb();
615 schedule_delayed_work(&atkbd->event_work, delay); 618 schedule_delayed_work(&atkbd->event_work, delay);
616} 619}
617 620
@@ -836,7 +839,7 @@ static void atkbd_cleanup(struct serio *serio)
836 struct atkbd *atkbd = serio_get_drvdata(serio); 839 struct atkbd *atkbd = serio_get_drvdata(serio);
837 840
838 atkbd_disable(atkbd); 841 atkbd_disable(atkbd);
839 ps2_command(&atkbd->ps2dev, NULL, ATKBD_CMD_RESET_BAT); 842 ps2_command(&atkbd->ps2dev, NULL, ATKBD_CMD_RESET_DEF);
840} 843}
841 844
842 845
@@ -848,13 +851,20 @@ static void atkbd_disconnect(struct serio *serio)
848{ 851{
849 struct atkbd *atkbd = serio_get_drvdata(serio); 852 struct atkbd *atkbd = serio_get_drvdata(serio);
850 853
854 sysfs_remove_group(&serio->dev.kobj, &atkbd_attribute_group);
855
851 atkbd_disable(atkbd); 856 atkbd_disable(atkbd);
852 857
853 /* make sure we don't have a command in flight */ 858 input_unregister_device(atkbd->dev);
859
860 /*
861 * Make sure we don't have a command in flight.
862 * Note that since atkbd->enabled is false event work will keep
863 * rescheduling itself until it gets canceled and will not try
864 * accessing freed input device or serio port.
865 */
854 cancel_delayed_work_sync(&atkbd->event_work); 866 cancel_delayed_work_sync(&atkbd->event_work);
855 867
856 sysfs_remove_group(&serio->dev.kobj, &atkbd_attribute_group);
857 input_unregister_device(atkbd->dev);
858 serio_close(serio); 868 serio_close(serio);
859 serio_set_drvdata(serio, NULL); 869 serio_set_drvdata(serio, NULL);
860 kfree(atkbd); 870 kfree(atkbd);
@@ -1086,7 +1096,7 @@ static int atkbd_connect(struct serio *serio, struct serio_driver *drv)
1086 atkbd->dev = dev; 1096 atkbd->dev = dev;
1087 ps2_init(&atkbd->ps2dev, serio); 1097 ps2_init(&atkbd->ps2dev, serio);
1088 INIT_DELAYED_WORK(&atkbd->event_work, atkbd_event_work); 1098 INIT_DELAYED_WORK(&atkbd->event_work, atkbd_event_work);
1089 mutex_init(&atkbd->event_mutex); 1099 mutex_init(&atkbd->mutex);
1090 1100
1091 switch (serio->id.type) { 1101 switch (serio->id.type) {
1092 1102
@@ -1159,19 +1169,23 @@ static int atkbd_reconnect(struct serio *serio)
1159{ 1169{
1160 struct atkbd *atkbd = serio_get_drvdata(serio); 1170 struct atkbd *atkbd = serio_get_drvdata(serio);
1161 struct serio_driver *drv = serio->drv; 1171 struct serio_driver *drv = serio->drv;
1172 int retval = -1;
1162 1173
1163 if (!atkbd || !drv) { 1174 if (!atkbd || !drv) {
1164 printk(KERN_DEBUG "atkbd: reconnect request, but serio is disconnected, ignoring...\n"); 1175 printk(KERN_DEBUG "atkbd: reconnect request, but serio is disconnected, ignoring...\n");
1165 return -1; 1176 return -1;
1166 } 1177 }
1167 1178
1179 mutex_lock(&atkbd->mutex);
1180
1168 atkbd_disable(atkbd); 1181 atkbd_disable(atkbd);
1169 1182
1170 if (atkbd->write) { 1183 if (atkbd->write) {
1171 if (atkbd_probe(atkbd)) 1184 if (atkbd_probe(atkbd))
1172 return -1; 1185 goto out;
1186
1173 if (atkbd->set != atkbd_select_set(atkbd, atkbd->set, atkbd->extra)) 1187 if (atkbd->set != atkbd_select_set(atkbd, atkbd->set, atkbd->extra))
1174 return -1; 1188 goto out;
1175 1189
1176 atkbd_activate(atkbd); 1190 atkbd_activate(atkbd);
1177 1191
@@ -1189,8 +1203,11 @@ static int atkbd_reconnect(struct serio *serio)
1189 } 1203 }
1190 1204
1191 atkbd_enable(atkbd); 1205 atkbd_enable(atkbd);
1206 retval = 0;
1192 1207
1193 return 0; 1208 out:
1209 mutex_unlock(&atkbd->mutex);
1210 return retval;
1194} 1211}
1195 1212
1196static struct serio_device_id atkbd_serio_ids[] = { 1213static struct serio_device_id atkbd_serio_ids[] = {
@@ -1234,47 +1251,28 @@ static ssize_t atkbd_attr_show_helper(struct device *dev, char *buf,
1234 ssize_t (*handler)(struct atkbd *, char *)) 1251 ssize_t (*handler)(struct atkbd *, char *))
1235{ 1252{
1236 struct serio *serio = to_serio_port(dev); 1253 struct serio *serio = to_serio_port(dev);
1237 int retval; 1254 struct atkbd *atkbd = serio_get_drvdata(serio);
1238
1239 retval = serio_pin_driver(serio);
1240 if (retval)
1241 return retval;
1242
1243 if (serio->drv != &atkbd_drv) {
1244 retval = -ENODEV;
1245 goto out;
1246 }
1247
1248 retval = handler((struct atkbd *)serio_get_drvdata(serio), buf);
1249 1255
1250out: 1256 return handler(atkbd, buf);
1251 serio_unpin_driver(serio);
1252 return retval;
1253} 1257}
1254 1258
1255static ssize_t atkbd_attr_set_helper(struct device *dev, const char *buf, size_t count, 1259static ssize_t atkbd_attr_set_helper(struct device *dev, const char *buf, size_t count,
1256 ssize_t (*handler)(struct atkbd *, const char *, size_t)) 1260 ssize_t (*handler)(struct atkbd *, const char *, size_t))
1257{ 1261{
1258 struct serio *serio = to_serio_port(dev); 1262 struct serio *serio = to_serio_port(dev);
1259 struct atkbd *atkbd; 1263 struct atkbd *atkbd = serio_get_drvdata(serio);
1260 int retval; 1264 int retval;
1261 1265
1262 retval = serio_pin_driver(serio); 1266 retval = mutex_lock_interruptible(&atkbd->mutex);
1263 if (retval) 1267 if (retval)
1264 return retval; 1268 return retval;
1265 1269
1266 if (serio->drv != &atkbd_drv) {
1267 retval = -ENODEV;
1268 goto out;
1269 }
1270
1271 atkbd = serio_get_drvdata(serio);
1272 atkbd_disable(atkbd); 1270 atkbd_disable(atkbd);
1273 retval = handler(atkbd, buf, count); 1271 retval = handler(atkbd, buf, count);
1274 atkbd_enable(atkbd); 1272 atkbd_enable(atkbd);
1275 1273
1276out: 1274 mutex_unlock(&atkbd->mutex);
1277 serio_unpin_driver(serio); 1275
1278 return retval; 1276 return retval;
1279} 1277}
1280 1278
diff --git a/drivers/input/keyboard/davinci_keyscan.c b/drivers/input/keyboard/davinci_keyscan.c
index 6e52d855f637..d410d7a52f1d 100644
--- a/drivers/input/keyboard/davinci_keyscan.c
+++ b/drivers/input/keyboard/davinci_keyscan.c
@@ -174,6 +174,14 @@ static int __init davinci_ks_probe(struct platform_device *pdev)
174 struct davinci_ks_platform_data *pdata = pdev->dev.platform_data; 174 struct davinci_ks_platform_data *pdata = pdev->dev.platform_data;
175 int error, i; 175 int error, i;
176 176
177 if (pdata->device_enable) {
178 error = pdata->device_enable(dev);
179 if (error < 0) {
180 dev_dbg(dev, "device enable function failed\n");
181 return error;
182 }
183 }
184
177 if (!pdata->keymap) { 185 if (!pdata->keymap) {
178 dev_dbg(dev, "no keymap from pdata\n"); 186 dev_dbg(dev, "no keymap from pdata\n");
179 return -EINVAL; 187 return -EINVAL;
diff --git a/drivers/input/keyboard/ep93xx_keypad.c b/drivers/input/keyboard/ep93xx_keypad.c
index 181d30e3018e..e45740429f7e 100644
--- a/drivers/input/keyboard/ep93xx_keypad.c
+++ b/drivers/input/keyboard/ep93xx_keypad.c
@@ -22,11 +22,11 @@
22 22
23#include <linux/platform_device.h> 23#include <linux/platform_device.h>
24#include <linux/interrupt.h> 24#include <linux/interrupt.h>
25#include <linux/input.h>
26#include <linux/clk.h> 25#include <linux/clk.h>
26#include <linux/io.h>
27#include <linux/input/matrix_keypad.h>
27 28
28#include <mach/hardware.h> 29#include <mach/hardware.h>
29#include <mach/gpio.h>
30#include <mach/ep93xx_keypad.h> 30#include <mach/ep93xx_keypad.h>
31 31
32/* 32/*
@@ -60,38 +60,37 @@
60#define KEY_REG_KEY1_MASK (0x0000003f) 60#define KEY_REG_KEY1_MASK (0x0000003f)
61#define KEY_REG_KEY1_SHIFT (0) 61#define KEY_REG_KEY1_SHIFT (0)
62 62
63#define keypad_readl(off) __raw_readl(keypad->mmio_base + (off)) 63#define EP93XX_MATRIX_SIZE (EP93XX_MATRIX_ROWS * EP93XX_MATRIX_COLS)
64#define keypad_writel(v, off) __raw_writel((v), keypad->mmio_base + (off))
65
66#define MAX_MATRIX_KEY_NUM (MAX_MATRIX_KEY_ROWS * MAX_MATRIX_KEY_COLS)
67 64
68struct ep93xx_keypad { 65struct ep93xx_keypad {
69 struct ep93xx_keypad_platform_data *pdata; 66 struct ep93xx_keypad_platform_data *pdata;
70
71 struct clk *clk;
72 struct input_dev *input_dev; 67 struct input_dev *input_dev;
68 struct clk *clk;
69
73 void __iomem *mmio_base; 70 void __iomem *mmio_base;
74 71
75 int irq; 72 unsigned int matrix_keycodes[EP93XX_MATRIX_SIZE];
76 int enabled;
77 73
78 int key1; 74 int key1;
79 int key2; 75 int key2;
80 76
81 unsigned int matrix_keycodes[MAX_MATRIX_KEY_NUM]; 77 int irq;
78
79 bool enabled;
82}; 80};
83 81
84static void ep93xx_keypad_build_keycode(struct ep93xx_keypad *keypad) 82static void ep93xx_keypad_build_keycode(struct ep93xx_keypad *keypad)
85{ 83{
86 struct ep93xx_keypad_platform_data *pdata = keypad->pdata; 84 struct ep93xx_keypad_platform_data *pdata = keypad->pdata;
87 struct input_dev *input_dev = keypad->input_dev; 85 struct input_dev *input_dev = keypad->input_dev;
86 unsigned int *key;
88 int i; 87 int i;
89 88
90 for (i = 0; i < pdata->matrix_key_map_size; i++) { 89 key = &pdata->matrix_key_map[0];
91 unsigned int key = pdata->matrix_key_map[i]; 90 for (i = 0; i < pdata->matrix_key_map_size; i++, key++) {
92 int row = (key >> 28) & 0xf; 91 int row = KEY_ROW(*key);
93 int col = (key >> 24) & 0xf; 92 int col = KEY_COL(*key);
94 int code = key & 0xffffff; 93 int code = KEY_VAL(*key);
95 94
96 keypad->matrix_keycodes[(row << 3) + col] = code; 95 keypad->matrix_keycodes[(row << 3) + col] = code;
97 __set_bit(code, input_dev->keybit); 96 __set_bit(code, input_dev->keybit);
@@ -102,9 +101,11 @@ static irqreturn_t ep93xx_keypad_irq_handler(int irq, void *dev_id)
102{ 101{
103 struct ep93xx_keypad *keypad = dev_id; 102 struct ep93xx_keypad *keypad = dev_id;
104 struct input_dev *input_dev = keypad->input_dev; 103 struct input_dev *input_dev = keypad->input_dev;
105 unsigned int status = keypad_readl(KEY_REG); 104 unsigned int status;
106 int keycode, key1, key2; 105 int keycode, key1, key2;
107 106
107 status = __raw_readl(keypad->mmio_base + KEY_REG);
108
108 keycode = (status & KEY_REG_KEY1_MASK) >> KEY_REG_KEY1_SHIFT; 109 keycode = (status & KEY_REG_KEY1_MASK) >> KEY_REG_KEY1_SHIFT;
109 key1 = keypad->matrix_keycodes[keycode]; 110 key1 = keypad->matrix_keycodes[keycode];
110 111
@@ -152,7 +153,10 @@ static void ep93xx_keypad_config(struct ep93xx_keypad *keypad)
152 struct ep93xx_keypad_platform_data *pdata = keypad->pdata; 153 struct ep93xx_keypad_platform_data *pdata = keypad->pdata;
153 unsigned int val = 0; 154 unsigned int val = 0;
154 155
155 clk_set_rate(keypad->clk, pdata->flags & EP93XX_KEYPAD_KDIV); 156 if (pdata->flags & EP93XX_KEYPAD_KDIV)
157 clk_set_rate(keypad->clk, EP93XX_KEYTCHCLK_DIV4);
158 else
159 clk_set_rate(keypad->clk, EP93XX_KEYTCHCLK_DIV16);
156 160
157 if (pdata->flags & EP93XX_KEYPAD_DISABLE_3_KEY) 161 if (pdata->flags & EP93XX_KEYPAD_DISABLE_3_KEY)
158 val |= KEY_INIT_DIS3KY; 162 val |= KEY_INIT_DIS3KY;
@@ -167,7 +171,7 @@ static void ep93xx_keypad_config(struct ep93xx_keypad *keypad)
167 171
168 val |= ((pdata->prescale << KEY_INIT_PRSCL_SHIFT) & KEY_INIT_PRSCL_MASK); 172 val |= ((pdata->prescale << KEY_INIT_PRSCL_SHIFT) & KEY_INIT_PRSCL_MASK);
169 173
170 keypad_writel(val, KEY_INIT); 174 __raw_writel(val, keypad->mmio_base + KEY_INIT);
171} 175}
172 176
173static int ep93xx_keypad_open(struct input_dev *pdev) 177static int ep93xx_keypad_open(struct input_dev *pdev)
@@ -177,7 +181,7 @@ static int ep93xx_keypad_open(struct input_dev *pdev)
177 if (!keypad->enabled) { 181 if (!keypad->enabled) {
178 ep93xx_keypad_config(keypad); 182 ep93xx_keypad_config(keypad);
179 clk_enable(keypad->clk); 183 clk_enable(keypad->clk);
180 keypad->enabled = 1; 184 keypad->enabled = true;
181 } 185 }
182 186
183 return 0; 187 return 0;
@@ -189,7 +193,7 @@ static void ep93xx_keypad_close(struct input_dev *pdev)
189 193
190 if (keypad->enabled) { 194 if (keypad->enabled) {
191 clk_disable(keypad->clk); 195 clk_disable(keypad->clk);
192 keypad->enabled = 0; 196 keypad->enabled = false;
193 } 197 }
194} 198}
195 199
@@ -211,7 +215,7 @@ static int ep93xx_keypad_suspend(struct platform_device *pdev,
211 215
212 if (keypad->enabled) { 216 if (keypad->enabled) {
213 clk_disable(keypad->clk); 217 clk_disable(keypad->clk);
214 keypad->enabled = 0; 218 keypad->enabled = false;
215 } 219 }
216 220
217 mutex_unlock(&input_dev->mutex); 221 mutex_unlock(&input_dev->mutex);
@@ -236,7 +240,7 @@ static int ep93xx_keypad_resume(struct platform_device *pdev)
236 if (!keypad->enabled) { 240 if (!keypad->enabled) {
237 ep93xx_keypad_config(keypad); 241 ep93xx_keypad_config(keypad);
238 clk_enable(keypad->clk); 242 clk_enable(keypad->clk);
239 keypad->enabled = 1; 243 keypad->enabled = true;
240 } 244 }
241 } 245 }
242 246
@@ -252,88 +256,56 @@ static int ep93xx_keypad_resume(struct platform_device *pdev)
252static int __devinit ep93xx_keypad_probe(struct platform_device *pdev) 256static int __devinit ep93xx_keypad_probe(struct platform_device *pdev)
253{ 257{
254 struct ep93xx_keypad *keypad; 258 struct ep93xx_keypad *keypad;
255 struct ep93xx_keypad_platform_data *pdata = pdev->dev.platform_data;
256 struct input_dev *input_dev; 259 struct input_dev *input_dev;
257 struct resource *res; 260 struct resource *res;
258 int irq, err, i, gpio; 261 int err;
259
260 if (!pdata ||
261 !pdata->matrix_key_rows ||
262 pdata->matrix_key_rows > MAX_MATRIX_KEY_ROWS ||
263 !pdata->matrix_key_cols ||
264 pdata->matrix_key_cols > MAX_MATRIX_KEY_COLS) {
265 dev_err(&pdev->dev, "invalid or missing platform data\n");
266 return -EINVAL;
267 }
268 262
269 keypad = kzalloc(sizeof(struct ep93xx_keypad), GFP_KERNEL); 263 keypad = kzalloc(sizeof(struct ep93xx_keypad), GFP_KERNEL);
270 if (!keypad) { 264 if (!keypad)
271 dev_err(&pdev->dev, "failed to allocate driver data\n");
272 return -ENOMEM; 265 return -ENOMEM;
273 }
274 266
275 keypad->pdata = pdata; 267 keypad->pdata = pdev->dev.platform_data;
268 if (!keypad->pdata) {
269 err = -EINVAL;
270 goto failed_free;
271 }
276 272
277 irq = platform_get_irq(pdev, 0); 273 keypad->irq = platform_get_irq(pdev, 0);
278 if (irq < 0) { 274 if (!keypad->irq) {
279 dev_err(&pdev->dev, "failed to get keypad irq\n");
280 err = -ENXIO; 275 err = -ENXIO;
281 goto failed_free; 276 goto failed_free;
282 } 277 }
283 278
284 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 279 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
285 if (!res) { 280 if (!res) {
286 dev_err(&pdev->dev, "failed to get I/O memory\n");
287 err = -ENXIO; 281 err = -ENXIO;
288 goto failed_free; 282 goto failed_free;
289 } 283 }
290 284
291 res = request_mem_region(res->start, resource_size(res), pdev->name); 285 res = request_mem_region(res->start, resource_size(res), pdev->name);
292 if (!res) { 286 if (!res) {
293 dev_err(&pdev->dev, "failed to request I/O memory\n");
294 err = -EBUSY; 287 err = -EBUSY;
295 goto failed_free; 288 goto failed_free;
296 } 289 }
297 290
298 keypad->mmio_base = ioremap(res->start, resource_size(res)); 291 keypad->mmio_base = ioremap(res->start, resource_size(res));
299 if (keypad->mmio_base == NULL) { 292 if (keypad->mmio_base == NULL) {
300 dev_err(&pdev->dev, "failed to remap I/O memory\n");
301 err = -ENXIO; 293 err = -ENXIO;
302 goto failed_free_mem; 294 goto failed_free_mem;
303 } 295 }
304 296
305 /* Request the needed GPIO's */ 297 err = ep93xx_keypad_acquire_gpio(pdev);
306 gpio = EP93XX_GPIO_LINE_ROW0; 298 if (err)
307 for (i = 0; i < keypad->pdata->matrix_key_rows; i++, gpio++) { 299 goto failed_free_io;
308 err = gpio_request(gpio, pdev->name);
309 if (err) {
310 dev_err(&pdev->dev, "failed to request gpio-%d\n",
311 gpio);
312 goto failed_free_rows;
313 }
314 }
315
316 gpio = EP93XX_GPIO_LINE_COL0;
317 for (i = 0; i < keypad->pdata->matrix_key_cols; i++, gpio++) {
318 err = gpio_request(gpio, pdev->name);
319 if (err) {
320 dev_err(&pdev->dev, "failed to request gpio-%d\n",
321 gpio);
322 goto failed_free_cols;
323 }
324 }
325 300
326 keypad->clk = clk_get(&pdev->dev, "key_clk"); 301 keypad->clk = clk_get(&pdev->dev, NULL);
327 if (IS_ERR(keypad->clk)) { 302 if (IS_ERR(keypad->clk)) {
328 dev_err(&pdev->dev, "failed to get keypad clock\n");
329 err = PTR_ERR(keypad->clk); 303 err = PTR_ERR(keypad->clk);
330 goto failed_free_io; 304 goto failed_free_gpio;
331 } 305 }
332 306
333 /* Create and register the input driver */
334 input_dev = input_allocate_device(); 307 input_dev = input_allocate_device();
335 if (!input_dev) { 308 if (!input_dev) {
336 dev_err(&pdev->dev, "failed to allocate input device\n");
337 err = -ENOMEM; 309 err = -ENOMEM;
338 goto failed_put_clk; 310 goto failed_put_clk;
339 } 311 }
@@ -358,44 +330,29 @@ static int __devinit ep93xx_keypad_probe(struct platform_device *pdev)
358 ep93xx_keypad_build_keycode(keypad); 330 ep93xx_keypad_build_keycode(keypad);
359 platform_set_drvdata(pdev, keypad); 331 platform_set_drvdata(pdev, keypad);
360 332
361 err = request_irq(irq, ep93xx_keypad_irq_handler, IRQF_DISABLED, 333 err = request_irq(keypad->irq, ep93xx_keypad_irq_handler,
362 pdev->name, keypad); 334 IRQF_DISABLED, pdev->name, keypad);
363 if (err) { 335 if (err)
364 dev_err(&pdev->dev, "failed to request IRQ\n");
365 goto failed_free_dev; 336 goto failed_free_dev;
366 }
367
368 keypad->irq = irq;
369 337
370 /* Register the input device */
371 err = input_register_device(input_dev); 338 err = input_register_device(input_dev);
372 if (err) { 339 if (err)
373 dev_err(&pdev->dev, "failed to register input device\n");
374 goto failed_free_irq; 340 goto failed_free_irq;
375 }
376 341
377 device_init_wakeup(&pdev->dev, 1); 342 device_init_wakeup(&pdev->dev, 1);
378 343
379 return 0; 344 return 0;
380 345
381failed_free_irq: 346failed_free_irq:
382 free_irq(irq, pdev); 347 free_irq(keypad->irq, pdev);
383 platform_set_drvdata(pdev, NULL); 348 platform_set_drvdata(pdev, NULL);
384failed_free_dev: 349failed_free_dev:
385 input_free_device(input_dev); 350 input_free_device(input_dev);
386failed_put_clk: 351failed_put_clk:
387 clk_put(keypad->clk); 352 clk_put(keypad->clk);
353failed_free_gpio:
354 ep93xx_keypad_release_gpio(pdev);
388failed_free_io: 355failed_free_io:
389 i = keypad->pdata->matrix_key_cols - 1;
390 gpio = EP93XX_GPIO_LINE_COL0 + i;
391failed_free_cols:
392 for ( ; i >= 0; i--, gpio--)
393 gpio_free(gpio);
394 i = keypad->pdata->matrix_key_rows - 1;
395 gpio = EP93XX_GPIO_LINE_ROW0 + i;
396failed_free_rows:
397 for ( ; i >= 0; i--, gpio--)
398 gpio_free(gpio);
399 iounmap(keypad->mmio_base); 356 iounmap(keypad->mmio_base);
400failed_free_mem: 357failed_free_mem:
401 release_mem_region(res->start, resource_size(res)); 358 release_mem_region(res->start, resource_size(res));
@@ -408,7 +365,6 @@ static int __devexit ep93xx_keypad_remove(struct platform_device *pdev)
408{ 365{
409 struct ep93xx_keypad *keypad = platform_get_drvdata(pdev); 366 struct ep93xx_keypad *keypad = platform_get_drvdata(pdev);
410 struct resource *res; 367 struct resource *res;
411 int i, gpio;
412 368
413 free_irq(keypad->irq, pdev); 369 free_irq(keypad->irq, pdev);
414 370
@@ -420,15 +376,7 @@ static int __devexit ep93xx_keypad_remove(struct platform_device *pdev)
420 376
421 input_unregister_device(keypad->input_dev); 377 input_unregister_device(keypad->input_dev);
422 378
423 i = keypad->pdata->matrix_key_cols - 1; 379 ep93xx_keypad_release_gpio(pdev);
424 gpio = EP93XX_GPIO_LINE_COL0 + i;
425 for ( ; i >= 0; i--, gpio--)
426 gpio_free(gpio);
427
428 i = keypad->pdata->matrix_key_rows - 1;
429 gpio = EP93XX_GPIO_LINE_ROW0 + i;
430 for ( ; i >= 0; i--, gpio--)
431 gpio_free(gpio);
432 380
433 iounmap(keypad->mmio_base); 381 iounmap(keypad->mmio_base);
434 382
diff --git a/drivers/input/keyboard/matrix_keypad.c b/drivers/input/keyboard/matrix_keypad.c
index 34f4a29d4973..d3c8b61a941d 100644
--- a/drivers/input/keyboard/matrix_keypad.c
+++ b/drivers/input/keyboard/matrix_keypad.c
@@ -29,11 +29,13 @@ struct matrix_keypad {
29 unsigned short *keycodes; 29 unsigned short *keycodes;
30 unsigned int row_shift; 30 unsigned int row_shift;
31 31
32 DECLARE_BITMAP(disabled_gpios, MATRIX_MAX_ROWS);
33
32 uint32_t last_key_state[MATRIX_MAX_COLS]; 34 uint32_t last_key_state[MATRIX_MAX_COLS];
33 struct delayed_work work; 35 struct delayed_work work;
36 spinlock_t lock;
34 bool scan_pending; 37 bool scan_pending;
35 bool stopped; 38 bool stopped;
36 spinlock_t lock;
37}; 39};
38 40
39/* 41/*
@@ -222,9 +224,16 @@ static int matrix_keypad_suspend(struct device *dev)
222 224
223 matrix_keypad_stop(keypad->input_dev); 225 matrix_keypad_stop(keypad->input_dev);
224 226
225 if (device_may_wakeup(&pdev->dev)) 227 if (device_may_wakeup(&pdev->dev)) {
226 for (i = 0; i < pdata->num_row_gpios; i++) 228 for (i = 0; i < pdata->num_row_gpios; i++) {
227 enable_irq_wake(gpio_to_irq(pdata->row_gpios[i])); 229 if (!test_bit(i, keypad->disabled_gpios)) {
230 unsigned int gpio = pdata->row_gpios[i];
231
232 if (enable_irq_wake(gpio_to_irq(gpio)) == 0)
233 __set_bit(i, keypad->disabled_gpios);
234 }
235 }
236 }
228 237
229 return 0; 238 return 0;
230} 239}
@@ -236,9 +245,15 @@ static int matrix_keypad_resume(struct device *dev)
236 const struct matrix_keypad_platform_data *pdata = keypad->pdata; 245 const struct matrix_keypad_platform_data *pdata = keypad->pdata;
237 int i; 246 int i;
238 247
239 if (device_may_wakeup(&pdev->dev)) 248 if (device_may_wakeup(&pdev->dev)) {
240 for (i = 0; i < pdata->num_row_gpios; i++) 249 for (i = 0; i < pdata->num_row_gpios; i++) {
241 disable_irq_wake(gpio_to_irq(pdata->row_gpios[i])); 250 if (test_and_clear_bit(i, keypad->disabled_gpios)) {
251 unsigned int gpio = pdata->row_gpios[i];
252
253 disable_irq_wake(gpio_to_irq(gpio));
254 }
255 }
256 }
242 257
243 matrix_keypad_start(keypad->input_dev); 258 matrix_keypad_start(keypad->input_dev);
244 259
diff --git a/drivers/input/keyboard/twl4030_keypad.c b/drivers/input/keyboard/twl4030_keypad.c
index eeaa7acb9cfc..21d6184efa96 100644
--- a/drivers/input/keyboard/twl4030_keypad.c
+++ b/drivers/input/keyboard/twl4030_keypad.c
@@ -253,14 +253,6 @@ static irqreturn_t do_kp_irq(int irq, void *_kp)
253 u8 reg; 253 u8 reg;
254 int ret; 254 int ret;
255 255
256#ifdef CONFIG_LOCKDEP
257 /* WORKAROUND for lockdep forcing IRQF_DISABLED on us, which
258 * we don't want and can't tolerate. Although it might be
259 * friendlier not to borrow this thread context...
260 */
261 local_irq_enable();
262#endif
263
264 /* Read & Clear TWL4030 pending interrupt */ 256 /* Read & Clear TWL4030 pending interrupt */
265 ret = twl4030_kpread(kp, &reg, KEYP_ISR1, 1); 257 ret = twl4030_kpread(kp, &reg, KEYP_ISR1, 1);
266 258
@@ -403,7 +395,8 @@ static int __devinit twl4030_kp_probe(struct platform_device *pdev)
403 * 395 *
404 * NOTE: we assume this host is wired to TWL4040 INT1, not INT2 ... 396 * NOTE: we assume this host is wired to TWL4040 INT1, not INT2 ...
405 */ 397 */
406 error = request_irq(kp->irq, do_kp_irq, 0, pdev->name, kp); 398 error = request_threaded_irq(kp->irq, NULL, do_kp_irq,
399 0, pdev->name, kp);
407 if (error) { 400 if (error) {
408 dev_info(kp->dbg_dev, "request_irq failed for irq no=%d\n", 401 dev_info(kp->dbg_dev, "request_irq failed for irq no=%d\n",
409 kp->irq); 402 kp->irq);
diff --git a/drivers/input/misc/twl4030-pwrbutton.c b/drivers/input/misc/twl4030-pwrbutton.c
index bdde5c889035..e9069b87fde2 100644
--- a/drivers/input/misc/twl4030-pwrbutton.c
+++ b/drivers/input/misc/twl4030-pwrbutton.c
@@ -39,18 +39,8 @@ static irqreturn_t powerbutton_irq(int irq, void *_pwr)
39 int err; 39 int err;
40 u8 value; 40 u8 value;
41 41
42#ifdef CONFIG_LOCKDEP
43 /* WORKAROUND for lockdep forcing IRQF_DISABLED on us, which
44 * we don't want and can't tolerate since this is a threaded
45 * IRQ and can sleep due to the i2c reads it has to issue.
46 * Although it might be friendlier not to borrow this thread
47 * context...
48 */
49 local_irq_enable();
50#endif
51
52 err = twl_i2c_read_u8(TWL4030_MODULE_PM_MASTER, &value, 42 err = twl_i2c_read_u8(TWL4030_MODULE_PM_MASTER, &value,
53 STS_HW_CONDITIONS); 43 STS_HW_CONDITIONS);
54 if (!err) { 44 if (!err) {
55 input_report_key(pwr, KEY_POWER, value & PWR_PWRON_IRQ); 45 input_report_key(pwr, KEY_POWER, value & PWR_PWRON_IRQ);
56 input_sync(pwr); 46 input_sync(pwr);
@@ -80,7 +70,7 @@ static int __devinit twl4030_pwrbutton_probe(struct platform_device *pdev)
80 pwr->phys = "twl4030_pwrbutton/input0"; 70 pwr->phys = "twl4030_pwrbutton/input0";
81 pwr->dev.parent = &pdev->dev; 71 pwr->dev.parent = &pdev->dev;
82 72
83 err = request_irq(irq, powerbutton_irq, 73 err = request_threaded_irq(irq, NULL, powerbutton_irq,
84 IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING, 74 IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING,
85 "twl4030_pwrbutton", pwr); 75 "twl4030_pwrbutton", pwr);
86 if (err < 0) { 76 if (err < 0) {
diff --git a/drivers/input/misc/winbond-cir.c b/drivers/input/misc/winbond-cir.c
index 33309fe44e20..c8f5a9a3fa14 100644
--- a/drivers/input/misc/winbond-cir.c
+++ b/drivers/input/misc/winbond-cir.c
@@ -768,7 +768,7 @@ wbcir_parse_rc6(struct device *dev, struct wbcir_data *data)
768 return; 768 return;
769 } 769 }
770 770
771 dev_info(dev, "IR-RC6 ad 0x%02X cm 0x%02X cu 0x%04X " 771 dev_dbg(dev, "IR-RC6 ad 0x%02X cm 0x%02X cu 0x%04X "
772 "toggle %u mode %u scan 0x%08X\n", 772 "toggle %u mode %u scan 0x%08X\n",
773 address, 773 address,
774 command, 774 command,
diff --git a/drivers/input/misc/wistron_btns.c b/drivers/input/misc/wistron_btns.c
index 38da6ab04384..c0afb71a3a6d 100644
--- a/drivers/input/misc/wistron_btns.c
+++ b/drivers/input/misc/wistron_btns.c
@@ -1328,7 +1328,7 @@ static struct platform_driver wistron_driver = {
1328 .driver = { 1328 .driver = {
1329 .name = "wistron-bios", 1329 .name = "wistron-bios",
1330 .owner = THIS_MODULE, 1330 .owner = THIS_MODULE,
1331#if CONFIG_PM 1331#ifdef CONFIG_PM
1332 .pm = &wistron_pm_ops, 1332 .pm = &wistron_pm_ops,
1333#endif 1333#endif
1334 }, 1334 },
diff --git a/drivers/input/mouse/Kconfig b/drivers/input/mouse/Kconfig
index 3feeb3af8abd..c714ca2407f8 100644
--- a/drivers/input/mouse/Kconfig
+++ b/drivers/input/mouse/Kconfig
@@ -70,7 +70,7 @@ config MOUSE_PS2_SYNAPTICS
70config MOUSE_PS2_LIFEBOOK 70config MOUSE_PS2_LIFEBOOK
71 bool "Fujitsu Lifebook PS/2 mouse protocol extension" if EMBEDDED 71 bool "Fujitsu Lifebook PS/2 mouse protocol extension" if EMBEDDED
72 default y 72 default y
73 depends on MOUSE_PS2 && X86 73 depends on MOUSE_PS2 && X86 && DMI
74 help 74 help
75 Say Y here if you have a Fujitsu B-series Lifebook PS/2 75 Say Y here if you have a Fujitsu B-series Lifebook PS/2
76 TouchScreen connected to your system. 76 TouchScreen connected to your system.
diff --git a/drivers/input/mouse/alps.c b/drivers/input/mouse/alps.c
index a3f492a50850..f93c2c0daf1f 100644
--- a/drivers/input/mouse/alps.c
+++ b/drivers/input/mouse/alps.c
@@ -5,6 +5,7 @@
5 * Copyright (c) 2003-2005 Peter Osterlund <petero2@telia.com> 5 * Copyright (c) 2003-2005 Peter Osterlund <petero2@telia.com>
6 * Copyright (c) 2004 Dmitry Torokhov <dtor@mail.ru> 6 * Copyright (c) 2004 Dmitry Torokhov <dtor@mail.ru>
7 * Copyright (c) 2005 Vojtech Pavlik <vojtech@suse.cz> 7 * Copyright (c) 2005 Vojtech Pavlik <vojtech@suse.cz>
8 * Copyright (c) 2009 Sebastian Kapfer <sebastian_kapfer@gmx.net>
8 * 9 *
9 * ALPS detection, tap switching and status querying info is taken from 10 * ALPS detection, tap switching and status querying info is taken from
10 * tpconfig utility (by C. Scott Ananian and Bruce Kall). 11 * tpconfig utility (by C. Scott Ananian and Bruce Kall).
@@ -28,7 +29,6 @@
28#define dbg(format, arg...) do {} while (0) 29#define dbg(format, arg...) do {} while (0)
29#endif 30#endif
30 31
31
32#define ALPS_OLDPROTO 0x01 /* old style input */ 32#define ALPS_OLDPROTO 0x01 /* old style input */
33#define ALPS_DUALPOINT 0x02 /* touchpad has trackstick */ 33#define ALPS_DUALPOINT 0x02 /* touchpad has trackstick */
34#define ALPS_PASS 0x04 /* device has a pass-through port */ 34#define ALPS_PASS 0x04 /* device has a pass-through port */
@@ -37,7 +37,8 @@
37#define ALPS_FW_BK_1 0x10 /* front & back buttons present */ 37#define ALPS_FW_BK_1 0x10 /* front & back buttons present */
38#define ALPS_FW_BK_2 0x20 /* front & back buttons present */ 38#define ALPS_FW_BK_2 0x20 /* front & back buttons present */
39#define ALPS_FOUR_BUTTONS 0x40 /* 4 direction button present */ 39#define ALPS_FOUR_BUTTONS 0x40 /* 4 direction button present */
40 40#define ALPS_PS2_INTERLEAVED 0x80 /* 3-byte PS/2 packet interleaved with
41 6-byte ALPS packet */
41 42
42static const struct alps_model_info alps_model_data[] = { 43static const struct alps_model_info alps_model_data[] = {
43 { { 0x32, 0x02, 0x14 }, 0xf8, 0xf8, ALPS_PASS | ALPS_DUALPOINT }, /* Toshiba Salellite Pro M10 */ 44 { { 0x32, 0x02, 0x14 }, 0xf8, 0xf8, ALPS_PASS | ALPS_DUALPOINT }, /* Toshiba Salellite Pro M10 */
@@ -58,7 +59,9 @@ static const struct alps_model_info alps_model_data[] = {
58 { { 0x20, 0x02, 0x0e }, 0xf8, 0xf8, ALPS_PASS | ALPS_DUALPOINT }, /* XXX */ 59 { { 0x20, 0x02, 0x0e }, 0xf8, 0xf8, ALPS_PASS | ALPS_DUALPOINT }, /* XXX */
59 { { 0x22, 0x02, 0x0a }, 0xf8, 0xf8, ALPS_PASS | ALPS_DUALPOINT }, 60 { { 0x22, 0x02, 0x0a }, 0xf8, 0xf8, ALPS_PASS | ALPS_DUALPOINT },
60 { { 0x22, 0x02, 0x14 }, 0xff, 0xff, ALPS_PASS | ALPS_DUALPOINT }, /* Dell Latitude D600 */ 61 { { 0x22, 0x02, 0x14 }, 0xff, 0xff, ALPS_PASS | ALPS_DUALPOINT }, /* Dell Latitude D600 */
61 { { 0x62, 0x02, 0x14 }, 0xcf, 0xcf, ALPS_PASS | ALPS_DUALPOINT }, /* Dell Latitude E6500 */ 62 /* Dell Latitude E5500, E6400, E6500, Precision M4400 */
63 { { 0x62, 0x02, 0x14 }, 0xcf, 0xcf,
64 ALPS_PASS | ALPS_DUALPOINT | ALPS_PS2_INTERLEAVED },
62 { { 0x73, 0x02, 0x50 }, 0xcf, 0xcf, ALPS_FOUR_BUTTONS }, /* Dell Vostro 1400 */ 65 { { 0x73, 0x02, 0x50 }, 0xcf, 0xcf, ALPS_FOUR_BUTTONS }, /* Dell Vostro 1400 */
63}; 66};
64 67
@@ -69,20 +72,88 @@ static const struct alps_model_info alps_model_data[] = {
69 */ 72 */
70 73
71/* 74/*
72 * ALPS abolute Mode - new format 75 * PS/2 packet format
76 *
77 * byte 0: 0 0 YSGN XSGN 1 M R L
78 * byte 1: X7 X6 X5 X4 X3 X2 X1 X0
79 * byte 2: Y7 Y6 Y5 Y4 Y3 Y2 Y1 Y0
80 *
81 * Note that the device never signals overflow condition.
82 *
83 * ALPS absolute Mode - new format
73 * 84 *
74 * byte 0: 1 ? ? ? 1 ? ? ? 85 * byte 0: 1 ? ? ? 1 ? ? ?
75 * byte 1: 0 x6 x5 x4 x3 x2 x1 x0 86 * byte 1: 0 x6 x5 x4 x3 x2 x1 x0
76 * byte 2: 0 x10 x9 x8 x7 ? fin ges 87 * byte 2: 0 x10 x9 x8 x7 ? fin ges
77 * byte 3: 0 y9 y8 y7 1 M R L 88 * byte 3: 0 y9 y8 y7 1 M R L
78 * byte 4: 0 y6 y5 y4 y3 y2 y1 y0 89 * byte 4: 0 y6 y5 y4 y3 y2 y1 y0
79 * byte 5: 0 z6 z5 z4 z3 z2 z1 z0 90 * byte 5: 0 z6 z5 z4 z3 z2 z1 z0
80 * 91 *
92 * Dualpoint device -- interleaved packet format
93 *
94 * byte 0: 1 1 0 0 1 1 1 1
95 * byte 1: 0 x6 x5 x4 x3 x2 x1 x0
96 * byte 2: 0 x10 x9 x8 x7 0 fin ges
97 * byte 3: 0 0 YSGN XSGN 1 1 1 1
98 * byte 4: X7 X6 X5 X4 X3 X2 X1 X0
99 * byte 5: Y7 Y6 Y5 Y4 Y3 Y2 Y1 Y0
100 * byte 6: 0 y9 y8 y7 1 m r l
101 * byte 7: 0 y6 y5 y4 y3 y2 y1 y0
102 * byte 8: 0 z6 z5 z4 z3 z2 z1 z0
103 *
104 * CAPITALS = stick, miniscules = touchpad
105 *
81 * ?'s can have different meanings on different models, 106 * ?'s can have different meanings on different models,
82 * such as wheel rotation, extra buttons, stick buttons 107 * such as wheel rotation, extra buttons, stick buttons
83 * on a dualpoint, etc. 108 * on a dualpoint, etc.
84 */ 109 */
85 110
111static bool alps_is_valid_first_byte(const struct alps_model_info *model,
112 unsigned char data)
113{
114 return (data & model->mask0) == model->byte0;
115}
116
117static void alps_report_buttons(struct psmouse *psmouse,
118 struct input_dev *dev1, struct input_dev *dev2,
119 int left, int right, int middle)
120{
121 struct alps_data *priv = psmouse->private;
122 const struct alps_model_info *model = priv->i;
123
124 if (model->flags & ALPS_PS2_INTERLEAVED) {
125 struct input_dev *dev;
126
127 /*
128 * If shared button has already been reported on the
129 * other device (dev2) then this event should be also
130 * sent through that device.
131 */
132 dev = test_bit(BTN_LEFT, dev2->key) ? dev2 : dev1;
133 input_report_key(dev, BTN_LEFT, left);
134
135 dev = test_bit(BTN_RIGHT, dev2->key) ? dev2 : dev1;
136 input_report_key(dev, BTN_RIGHT, right);
137
138 dev = test_bit(BTN_MIDDLE, dev2->key) ? dev2 : dev1;
139 input_report_key(dev, BTN_MIDDLE, middle);
140
141 /*
142 * Sync the _other_ device now, we'll do the first
143 * device later once we report the rest of the events.
144 */
145 input_sync(dev2);
146 } else {
147 /*
148 * For devices with non-interleaved packets we know what
149 * device buttons belong to so we can simply report them.
150 */
151 input_report_key(dev1, BTN_LEFT, left);
152 input_report_key(dev1, BTN_RIGHT, right);
153 input_report_key(dev1, BTN_MIDDLE, middle);
154 }
155}
156
86static void alps_process_packet(struct psmouse *psmouse) 157static void alps_process_packet(struct psmouse *psmouse)
87{ 158{
88 struct alps_data *priv = psmouse->private; 159 struct alps_data *priv = psmouse->private;
@@ -93,18 +164,6 @@ static void alps_process_packet(struct psmouse *psmouse)
93 int x, y, z, ges, fin, left, right, middle; 164 int x, y, z, ges, fin, left, right, middle;
94 int back = 0, forward = 0; 165 int back = 0, forward = 0;
95 166
96 if ((packet[0] & 0xc8) == 0x08) { /* 3-byte PS/2 packet */
97 input_report_key(dev2, BTN_LEFT, packet[0] & 1);
98 input_report_key(dev2, BTN_RIGHT, packet[0] & 2);
99 input_report_key(dev2, BTN_MIDDLE, packet[0] & 4);
100 input_report_rel(dev2, REL_X,
101 packet[1] ? packet[1] - ((packet[0] << 4) & 0x100) : 0);
102 input_report_rel(dev2, REL_Y,
103 packet[2] ? ((packet[0] << 3) & 0x100) - packet[2] : 0);
104 input_sync(dev2);
105 return;
106 }
107
108 if (model->flags & ALPS_OLDPROTO) { 167 if (model->flags & ALPS_OLDPROTO) {
109 left = packet[2] & 0x10; 168 left = packet[2] & 0x10;
110 right = packet[2] & 0x08; 169 right = packet[2] & 0x08;
@@ -140,18 +199,13 @@ static void alps_process_packet(struct psmouse *psmouse)
140 input_report_rel(dev2, REL_X, (x > 383 ? (x - 768) : x)); 199 input_report_rel(dev2, REL_X, (x > 383 ? (x - 768) : x));
141 input_report_rel(dev2, REL_Y, -(y > 255 ? (y - 512) : y)); 200 input_report_rel(dev2, REL_Y, -(y > 255 ? (y - 512) : y));
142 201
143 input_report_key(dev2, BTN_LEFT, left); 202 alps_report_buttons(psmouse, dev2, dev, left, right, middle);
144 input_report_key(dev2, BTN_RIGHT, right);
145 input_report_key(dev2, BTN_MIDDLE, middle);
146 203
147 input_sync(dev);
148 input_sync(dev2); 204 input_sync(dev2);
149 return; 205 return;
150 } 206 }
151 207
152 input_report_key(dev, BTN_LEFT, left); 208 alps_report_buttons(psmouse, dev, dev2, left, right, middle);
153 input_report_key(dev, BTN_RIGHT, right);
154 input_report_key(dev, BTN_MIDDLE, middle);
155 209
156 /* Convert hardware tap to a reasonable Z value */ 210 /* Convert hardware tap to a reasonable Z value */
157 if (ges && !fin) 211 if (ges && !fin)
@@ -202,25 +256,168 @@ static void alps_process_packet(struct psmouse *psmouse)
202 input_sync(dev); 256 input_sync(dev);
203} 257}
204 258
259static void alps_report_bare_ps2_packet(struct psmouse *psmouse,
260 unsigned char packet[],
261 bool report_buttons)
262{
263 struct alps_data *priv = psmouse->private;
264 struct input_dev *dev2 = priv->dev2;
265
266 if (report_buttons)
267 alps_report_buttons(psmouse, dev2, psmouse->dev,
268 packet[0] & 1, packet[0] & 2, packet[0] & 4);
269
270 input_report_rel(dev2, REL_X,
271 packet[1] ? packet[1] - ((packet[0] << 4) & 0x100) : 0);
272 input_report_rel(dev2, REL_Y,
273 packet[2] ? ((packet[0] << 3) & 0x100) - packet[2] : 0);
274
275 input_sync(dev2);
276}
277
278static psmouse_ret_t alps_handle_interleaved_ps2(struct psmouse *psmouse)
279{
280 struct alps_data *priv = psmouse->private;
281
282 if (psmouse->pktcnt < 6)
283 return PSMOUSE_GOOD_DATA;
284
285 if (psmouse->pktcnt == 6) {
286 /*
287 * Start a timer to flush the packet if it ends up last
288 * 6-byte packet in the stream. Timer needs to fire
289 * psmouse core times out itself. 20 ms should be enough
290 * to decide if we are getting more data or not.
291 */
292 mod_timer(&priv->timer, jiffies + msecs_to_jiffies(20));
293 return PSMOUSE_GOOD_DATA;
294 }
295
296 del_timer(&priv->timer);
297
298 if (psmouse->packet[6] & 0x80) {
299
300 /*
301 * Highest bit is set - that means we either had
302 * complete ALPS packet and this is start of the
303 * next packet or we got garbage.
304 */
305
306 if (((psmouse->packet[3] |
307 psmouse->packet[4] |
308 psmouse->packet[5]) & 0x80) ||
309 (!alps_is_valid_first_byte(priv->i, psmouse->packet[6]))) {
310 dbg("refusing packet %x %x %x %x "
311 "(suspected interleaved ps/2)\n",
312 psmouse->packet[3], psmouse->packet[4],
313 psmouse->packet[5], psmouse->packet[6]);
314 return PSMOUSE_BAD_DATA;
315 }
316
317 alps_process_packet(psmouse);
318
319 /* Continue with the next packet */
320 psmouse->packet[0] = psmouse->packet[6];
321 psmouse->pktcnt = 1;
322
323 } else {
324
325 /*
326 * High bit is 0 - that means that we indeed got a PS/2
327 * packet in the middle of ALPS packet.
328 *
329 * There is also possibility that we got 6-byte ALPS
330 * packet followed by 3-byte packet from trackpoint. We
331 * can not distinguish between these 2 scenarios but
332 * becase the latter is unlikely to happen in course of
333 * normal operation (user would need to press all
334 * buttons on the pad and start moving trackpoint
335 * without touching the pad surface) we assume former.
336 * Even if we are wrong the wost thing that would happen
337 * the cursor would jump but we should not get protocol
338 * desynchronization.
339 */
340
341 alps_report_bare_ps2_packet(psmouse, &psmouse->packet[3],
342 false);
343
344 /*
345 * Continue with the standard ALPS protocol handling,
346 * but make sure we won't process it as an interleaved
347 * packet again, which may happen if all buttons are
348 * pressed. To avoid this let's reset the 4th bit which
349 * is normally 1.
350 */
351 psmouse->packet[3] = psmouse->packet[6] & 0xf7;
352 psmouse->pktcnt = 4;
353 }
354
355 return PSMOUSE_GOOD_DATA;
356}
357
358static void alps_flush_packet(unsigned long data)
359{
360 struct psmouse *psmouse = (struct psmouse *)data;
361
362 serio_pause_rx(psmouse->ps2dev.serio);
363
364 if (psmouse->pktcnt == 6) {
365
366 /*
367 * We did not any more data in reasonable amount of time.
368 * Validate the last 3 bytes and process as a standard
369 * ALPS packet.
370 */
371 if ((psmouse->packet[3] |
372 psmouse->packet[4] |
373 psmouse->packet[5]) & 0x80) {
374 dbg("refusing packet %x %x %x "
375 "(suspected interleaved ps/2)\n",
376 psmouse->packet[3], psmouse->packet[4],
377 psmouse->packet[5]);
378 } else {
379 alps_process_packet(psmouse);
380 }
381 psmouse->pktcnt = 0;
382 }
383
384 serio_continue_rx(psmouse->ps2dev.serio);
385}
386
205static psmouse_ret_t alps_process_byte(struct psmouse *psmouse) 387static psmouse_ret_t alps_process_byte(struct psmouse *psmouse)
206{ 388{
207 struct alps_data *priv = psmouse->private; 389 struct alps_data *priv = psmouse->private;
390 const struct alps_model_info *model = priv->i;
208 391
209 if ((psmouse->packet[0] & 0xc8) == 0x08) { /* PS/2 packet */ 392 if ((psmouse->packet[0] & 0xc8) == 0x08) { /* PS/2 packet */
210 if (psmouse->pktcnt == 3) { 393 if (psmouse->pktcnt == 3) {
211 alps_process_packet(psmouse); 394 alps_report_bare_ps2_packet(psmouse, psmouse->packet,
395 true);
212 return PSMOUSE_FULL_PACKET; 396 return PSMOUSE_FULL_PACKET;
213 } 397 }
214 return PSMOUSE_GOOD_DATA; 398 return PSMOUSE_GOOD_DATA;
215 } 399 }
216 400
217 if ((psmouse->packet[0] & priv->i->mask0) != priv->i->byte0) 401 /* Check for PS/2 packet stuffed in the middle of ALPS packet. */
402
403 if ((model->flags & ALPS_PS2_INTERLEAVED) &&
404 psmouse->pktcnt >= 4 && (psmouse->packet[3] & 0x0f) == 0x0f) {
405 return alps_handle_interleaved_ps2(psmouse);
406 }
407
408 if (!alps_is_valid_first_byte(model, psmouse->packet[0])) {
409 dbg("refusing packet[0] = %x (mask0 = %x, byte0 = %x)\n",
410 psmouse->packet[0], model->mask0, model->byte0);
218 return PSMOUSE_BAD_DATA; 411 return PSMOUSE_BAD_DATA;
412 }
219 413
220 /* Bytes 2 - 6 should have 0 in the highest bit */ 414 /* Bytes 2 - 6 should have 0 in the highest bit */
221 if (psmouse->pktcnt >= 2 && psmouse->pktcnt <= 6 && 415 if (psmouse->pktcnt >= 2 && psmouse->pktcnt <= 6 &&
222 (psmouse->packet[psmouse->pktcnt - 1] & 0x80)) 416 (psmouse->packet[psmouse->pktcnt - 1] & 0x80)) {
417 dbg("refusing packet[%i] = %x\n",
418 psmouse->pktcnt - 1, psmouse->packet[psmouse->pktcnt - 1]);
223 return PSMOUSE_BAD_DATA; 419 return PSMOUSE_BAD_DATA;
420 }
224 421
225 if (psmouse->pktcnt == 6) { 422 if (psmouse->pktcnt == 6) {
226 alps_process_packet(psmouse); 423 alps_process_packet(psmouse);
@@ -459,6 +656,7 @@ static void alps_disconnect(struct psmouse *psmouse)
459 struct alps_data *priv = psmouse->private; 656 struct alps_data *priv = psmouse->private;
460 657
461 psmouse_reset(psmouse); 658 psmouse_reset(psmouse);
659 del_timer_sync(&priv->timer);
462 input_unregister_device(priv->dev2); 660 input_unregister_device(priv->dev2);
463 kfree(priv); 661 kfree(priv);
464} 662}
@@ -476,6 +674,8 @@ int alps_init(struct psmouse *psmouse)
476 goto init_fail; 674 goto init_fail;
477 675
478 priv->dev2 = dev2; 676 priv->dev2 = dev2;
677 setup_timer(&priv->timer, alps_flush_packet, (unsigned long)psmouse);
678
479 psmouse->private = priv; 679 psmouse->private = priv;
480 680
481 model = alps_get_model(psmouse, &version); 681 model = alps_get_model(psmouse, &version);
@@ -487,6 +687,17 @@ int alps_init(struct psmouse *psmouse)
487 if (alps_hw_init(psmouse)) 687 if (alps_hw_init(psmouse))
488 goto init_fail; 688 goto init_fail;
489 689
690 /*
691 * Undo part of setup done for us by psmouse core since touchpad
692 * is not a relative device.
693 */
694 __clear_bit(EV_REL, dev1->evbit);
695 __clear_bit(REL_X, dev1->relbit);
696 __clear_bit(REL_Y, dev1->relbit);
697
698 /*
699 * Now set up our capabilities.
700 */
490 dev1->evbit[BIT_WORD(EV_KEY)] |= BIT_MASK(EV_KEY); 701 dev1->evbit[BIT_WORD(EV_KEY)] |= BIT_MASK(EV_KEY);
491 dev1->keybit[BIT_WORD(BTN_TOUCH)] |= BIT_MASK(BTN_TOUCH); 702 dev1->keybit[BIT_WORD(BTN_TOUCH)] |= BIT_MASK(BTN_TOUCH);
492 dev1->keybit[BIT_WORD(BTN_TOOL_FINGER)] |= BIT_MASK(BTN_TOOL_FINGER); 703 dev1->keybit[BIT_WORD(BTN_TOOL_FINGER)] |= BIT_MASK(BTN_TOOL_FINGER);
diff --git a/drivers/input/mouse/alps.h b/drivers/input/mouse/alps.h
index bc87936fee1a..904ed8b3c8be 100644
--- a/drivers/input/mouse/alps.h
+++ b/drivers/input/mouse/alps.h
@@ -23,6 +23,7 @@ struct alps_data {
23 char phys[32]; /* Phys */ 23 char phys[32]; /* Phys */
24 const struct alps_model_info *i;/* Info */ 24 const struct alps_model_info *i;/* Info */
25 int prev_fin; /* Finger bit from previous packet */ 25 int prev_fin; /* Finger bit from previous packet */
26 struct timer_list timer;
26}; 27};
27 28
28#ifdef CONFIG_MOUSE_PS2_ALPS 29#ifdef CONFIG_MOUSE_PS2_ALPS
diff --git a/drivers/input/mouse/bcm5974.c b/drivers/input/mouse/bcm5974.c
index 0d1d33468b43..4f8fe0886b2a 100644
--- a/drivers/input/mouse/bcm5974.c
+++ b/drivers/input/mouse/bcm5974.c
@@ -139,6 +139,7 @@ struct tp_finger {
139/* trackpad finger data size, empirically at least ten fingers */ 139/* trackpad finger data size, empirically at least ten fingers */
140#define SIZEOF_FINGER sizeof(struct tp_finger) 140#define SIZEOF_FINGER sizeof(struct tp_finger)
141#define SIZEOF_ALL_FINGERS (16 * SIZEOF_FINGER) 141#define SIZEOF_ALL_FINGERS (16 * SIZEOF_FINGER)
142#define MAX_FINGER_ORIENTATION 16384
142 143
143/* device-specific parameters */ 144/* device-specific parameters */
144struct bcm5974_param { 145struct bcm5974_param {
@@ -284,6 +285,26 @@ static void setup_events_to_report(struct input_dev *input_dev,
284 input_set_abs_params(input_dev, ABS_Y, 285 input_set_abs_params(input_dev, ABS_Y,
285 0, cfg->y.dim, cfg->y.fuzz, 0); 286 0, cfg->y.dim, cfg->y.fuzz, 0);
286 287
288 /* finger touch area */
289 input_set_abs_params(input_dev, ABS_MT_TOUCH_MAJOR,
290 cfg->w.devmin, cfg->w.devmax, 0, 0);
291 input_set_abs_params(input_dev, ABS_MT_TOUCH_MINOR,
292 cfg->w.devmin, cfg->w.devmax, 0, 0);
293 /* finger approach area */
294 input_set_abs_params(input_dev, ABS_MT_WIDTH_MAJOR,
295 cfg->w.devmin, cfg->w.devmax, 0, 0);
296 input_set_abs_params(input_dev, ABS_MT_WIDTH_MINOR,
297 cfg->w.devmin, cfg->w.devmax, 0, 0);
298 /* finger orientation */
299 input_set_abs_params(input_dev, ABS_MT_ORIENTATION,
300 -MAX_FINGER_ORIENTATION,
301 MAX_FINGER_ORIENTATION, 0, 0);
302 /* finger position */
303 input_set_abs_params(input_dev, ABS_MT_POSITION_X,
304 cfg->x.devmin, cfg->x.devmax, 0, 0);
305 input_set_abs_params(input_dev, ABS_MT_POSITION_Y,
306 cfg->y.devmin, cfg->y.devmax, 0, 0);
307
287 __set_bit(EV_KEY, input_dev->evbit); 308 __set_bit(EV_KEY, input_dev->evbit);
288 __set_bit(BTN_TOUCH, input_dev->keybit); 309 __set_bit(BTN_TOUCH, input_dev->keybit);
289 __set_bit(BTN_TOOL_FINGER, input_dev->keybit); 310 __set_bit(BTN_TOOL_FINGER, input_dev->keybit);
@@ -310,13 +331,29 @@ static int report_bt_state(struct bcm5974 *dev, int size)
310 return 0; 331 return 0;
311} 332}
312 333
334static void report_finger_data(struct input_dev *input,
335 const struct bcm5974_config *cfg,
336 const struct tp_finger *f)
337{
338 input_report_abs(input, ABS_MT_TOUCH_MAJOR, raw2int(f->force_major));
339 input_report_abs(input, ABS_MT_TOUCH_MINOR, raw2int(f->force_minor));
340 input_report_abs(input, ABS_MT_WIDTH_MAJOR, raw2int(f->size_major));
341 input_report_abs(input, ABS_MT_WIDTH_MINOR, raw2int(f->size_minor));
342 input_report_abs(input, ABS_MT_ORIENTATION,
343 MAX_FINGER_ORIENTATION - raw2int(f->orientation));
344 input_report_abs(input, ABS_MT_POSITION_X, raw2int(f->abs_x));
345 input_report_abs(input, ABS_MT_POSITION_Y,
346 cfg->y.devmin + cfg->y.devmax - raw2int(f->abs_y));
347 input_mt_sync(input);
348}
349
313/* report trackpad data as logical trackpad state */ 350/* report trackpad data as logical trackpad state */
314static int report_tp_state(struct bcm5974 *dev, int size) 351static int report_tp_state(struct bcm5974 *dev, int size)
315{ 352{
316 const struct bcm5974_config *c = &dev->cfg; 353 const struct bcm5974_config *c = &dev->cfg;
317 const struct tp_finger *f; 354 const struct tp_finger *f;
318 struct input_dev *input = dev->input; 355 struct input_dev *input = dev->input;
319 int raw_p, raw_w, raw_x, raw_y, raw_n; 356 int raw_p, raw_w, raw_x, raw_y, raw_n, i;
320 int ptest, origin, ibt = 0, nmin = 0, nmax = 0; 357 int ptest, origin, ibt = 0, nmin = 0, nmax = 0;
321 int abs_p = 0, abs_w = 0, abs_x = 0, abs_y = 0; 358 int abs_p = 0, abs_w = 0, abs_x = 0, abs_y = 0;
322 359
@@ -329,6 +366,11 @@ static int report_tp_state(struct bcm5974 *dev, int size)
329 366
330 /* always track the first finger; when detached, start over */ 367 /* always track the first finger; when detached, start over */
331 if (raw_n) { 368 if (raw_n) {
369
370 /* report raw trackpad data */
371 for (i = 0; i < raw_n; i++)
372 report_finger_data(input, c, &f[i]);
373
332 raw_p = raw2int(f->force_major); 374 raw_p = raw2int(f->force_major);
333 raw_w = raw2int(f->size_major); 375 raw_w = raw2int(f->size_major);
334 raw_x = raw2int(f->abs_x); 376 raw_x = raw2int(f->abs_x);
diff --git a/drivers/input/mouse/hgpk.c b/drivers/input/mouse/hgpk.c
index b146237266d8..90be30e93556 100644
--- a/drivers/input/mouse/hgpk.c
+++ b/drivers/input/mouse/hgpk.c
@@ -427,7 +427,6 @@ static void hgpk_recalib_work(struct work_struct *work)
427 427
428static int hgpk_register(struct psmouse *psmouse) 428static int hgpk_register(struct psmouse *psmouse)
429{ 429{
430 struct input_dev *dev = psmouse->dev;
431 int err; 430 int err;
432 431
433 /* register handlers */ 432 /* register handlers */
diff --git a/drivers/input/mouse/lifebook.c b/drivers/input/mouse/lifebook.c
index 2e6bdfea0165..7c1d7d420ae3 100644
--- a/drivers/input/mouse/lifebook.c
+++ b/drivers/input/mouse/lifebook.c
@@ -44,7 +44,6 @@ static int lifebook_set_6byte_proto(const struct dmi_system_id *d)
44} 44}
45 45
46static const struct dmi_system_id __initconst lifebook_dmi_table[] = { 46static const struct dmi_system_id __initconst lifebook_dmi_table[] = {
47#if defined(CONFIG_DMI) && defined(CONFIG_X86)
48 { 47 {
49 /* FLORA-ie 55mi */ 48 /* FLORA-ie 55mi */
50 .matches = { 49 .matches = {
@@ -54,6 +53,12 @@ static const struct dmi_system_id __initconst lifebook_dmi_table[] = {
54 { 53 {
55 /* LifeBook B */ 54 /* LifeBook B */
56 .matches = { 55 .matches = {
56 DMI_MATCH(DMI_PRODUCT_NAME, "Lifebook B Series"),
57 },
58 },
59 {
60 /* LifeBook B */
61 .matches = {
57 DMI_MATCH(DMI_PRODUCT_NAME, "LifeBook B Series"), 62 DMI_MATCH(DMI_PRODUCT_NAME, "LifeBook B Series"),
58 }, 63 },
59 }, 64 },
@@ -118,7 +123,6 @@ static const struct dmi_system_id __initconst lifebook_dmi_table[] = {
118 }, 123 },
119 }, 124 },
120 { } 125 { }
121#endif
122}; 126};
123 127
124void __init lifebook_module_init(void) 128void __init lifebook_module_init(void)
diff --git a/drivers/input/mouse/psmouse-base.c b/drivers/input/mouse/psmouse-base.c
index fd0bc094616a..d8c0c8d6992c 100644
--- a/drivers/input/mouse/psmouse-base.c
+++ b/drivers/input/mouse/psmouse-base.c
@@ -627,8 +627,15 @@ static int psmouse_extensions(struct psmouse *psmouse,
627 synaptics_hardware = true; 627 synaptics_hardware = true;
628 628
629 if (max_proto > PSMOUSE_IMEX) { 629 if (max_proto > PSMOUSE_IMEX) {
630 if (!set_properties || synaptics_init(psmouse) == 0) 630/*
631 * Try activating protocol, but check if support is enabled first, since
632 * we try detecting Synaptics even when protocol is disabled.
633 */
634 if (synaptics_supported() &&
635 (!set_properties || synaptics_init(psmouse) == 0)) {
631 return PSMOUSE_SYNAPTICS; 636 return PSMOUSE_SYNAPTICS;
637 }
638
632/* 639/*
633 * Some Synaptics touchpads can emulate extended protocols (like IMPS/2). 640 * Some Synaptics touchpads can emulate extended protocols (like IMPS/2).
634 * Unfortunately Logitech/Genius probes confuse some firmware versions so 641 * Unfortunately Logitech/Genius probes confuse some firmware versions so
@@ -683,19 +690,6 @@ static int psmouse_extensions(struct psmouse *psmouse,
683 max_proto = PSMOUSE_IMEX; 690 max_proto = PSMOUSE_IMEX;
684 } 691 }
685 692
686/*
687 * Try Finger Sensing Pad
688 */
689 if (max_proto > PSMOUSE_IMEX) {
690 if (fsp_detect(psmouse, set_properties) == 0) {
691 if (!set_properties || fsp_init(psmouse) == 0)
692 return PSMOUSE_FSP;
693/*
694 * Init failed, try basic relative protocols
695 */
696 max_proto = PSMOUSE_IMEX;
697 }
698 }
699 693
700 if (max_proto > PSMOUSE_IMEX) { 694 if (max_proto > PSMOUSE_IMEX) {
701 if (genius_detect(psmouse, set_properties) == 0) 695 if (genius_detect(psmouse, set_properties) == 0)
@@ -712,6 +706,21 @@ static int psmouse_extensions(struct psmouse *psmouse,
712 } 706 }
713 707
714/* 708/*
709 * Try Finger Sensing Pad. We do it here because its probe upsets
710 * Trackpoint devices (causing TP_READ_ID command to time out).
711 */
712 if (max_proto > PSMOUSE_IMEX) {
713 if (fsp_detect(psmouse, set_properties) == 0) {
714 if (!set_properties || fsp_init(psmouse) == 0)
715 return PSMOUSE_FSP;
716/*
717 * Init failed, try basic relative protocols
718 */
719 max_proto = PSMOUSE_IMEX;
720 }
721 }
722
723/*
715 * Reset to defaults in case the device got confused by extended 724 * Reset to defaults in case the device got confused by extended
716 * protocol probes. Note that we follow up with full reset because 725 * protocol probes. Note that we follow up with full reset because
717 * some mice put themselves to sleep when they see PSMOUSE_RESET_DIS. 726 * some mice put themselves to sleep when they see PSMOUSE_RESET_DIS.
@@ -1132,12 +1141,22 @@ static void psmouse_cleanup(struct serio *serio)
1132 psmouse_deactivate(parent); 1141 psmouse_deactivate(parent);
1133 } 1142 }
1134 1143
1135 psmouse_deactivate(psmouse); 1144 psmouse_set_state(psmouse, PSMOUSE_INITIALIZING);
1145
1146 /*
1147 * Disable stream mode so cleanup routine can proceed undisturbed.
1148 */
1149 if (ps2_command(&psmouse->ps2dev, NULL, PSMOUSE_CMD_DISABLE))
1150 printk(KERN_WARNING "psmouse.c: Failed to disable mouse on %s\n",
1151 psmouse->ps2dev.serio->phys);
1136 1152
1137 if (psmouse->cleanup) 1153 if (psmouse->cleanup)
1138 psmouse->cleanup(psmouse); 1154 psmouse->cleanup(psmouse);
1139 1155
1140 psmouse_reset(psmouse); 1156/*
1157 * Reset the mouse to defaults (bare PS/2 protocol).
1158 */
1159 ps2_command(&psmouse->ps2dev, NULL, PSMOUSE_CMD_RESET_DIS);
1141 1160
1142/* 1161/*
1143 * Some boxes, such as HP nx7400, get terribly confused if mouse 1162 * Some boxes, such as HP nx7400, get terribly confused if mouse
@@ -1447,24 +1466,10 @@ ssize_t psmouse_attr_show_helper(struct device *dev, struct device_attribute *de
1447 struct serio *serio = to_serio_port(dev); 1466 struct serio *serio = to_serio_port(dev);
1448 struct psmouse_attribute *attr = to_psmouse_attr(devattr); 1467 struct psmouse_attribute *attr = to_psmouse_attr(devattr);
1449 struct psmouse *psmouse; 1468 struct psmouse *psmouse;
1450 int retval;
1451
1452 retval = serio_pin_driver(serio);
1453 if (retval)
1454 return retval;
1455
1456 if (serio->drv != &psmouse_drv) {
1457 retval = -ENODEV;
1458 goto out;
1459 }
1460 1469
1461 psmouse = serio_get_drvdata(serio); 1470 psmouse = serio_get_drvdata(serio);
1462 1471
1463 retval = attr->show(psmouse, attr->data, buf); 1472 return attr->show(psmouse, attr->data, buf);
1464
1465out:
1466 serio_unpin_driver(serio);
1467 return retval;
1468} 1473}
1469 1474
1470ssize_t psmouse_attr_set_helper(struct device *dev, struct device_attribute *devattr, 1475ssize_t psmouse_attr_set_helper(struct device *dev, struct device_attribute *devattr,
@@ -1475,18 +1480,9 @@ ssize_t psmouse_attr_set_helper(struct device *dev, struct device_attribute *dev
1475 struct psmouse *psmouse, *parent = NULL; 1480 struct psmouse *psmouse, *parent = NULL;
1476 int retval; 1481 int retval;
1477 1482
1478 retval = serio_pin_driver(serio);
1479 if (retval)
1480 return retval;
1481
1482 if (serio->drv != &psmouse_drv) {
1483 retval = -ENODEV;
1484 goto out_unpin;
1485 }
1486
1487 retval = mutex_lock_interruptible(&psmouse_mutex); 1483 retval = mutex_lock_interruptible(&psmouse_mutex);
1488 if (retval) 1484 if (retval)
1489 goto out_unpin; 1485 goto out;
1490 1486
1491 psmouse = serio_get_drvdata(serio); 1487 psmouse = serio_get_drvdata(serio);
1492 1488
@@ -1516,8 +1512,7 @@ ssize_t psmouse_attr_set_helper(struct device *dev, struct device_attribute *dev
1516 1512
1517 out_unlock: 1513 out_unlock:
1518 mutex_unlock(&psmouse_mutex); 1514 mutex_unlock(&psmouse_mutex);
1519 out_unpin: 1515 out:
1520 serio_unpin_driver(serio);
1521 return retval; 1516 return retval;
1522} 1517}
1523 1518
@@ -1579,9 +1574,7 @@ static ssize_t psmouse_attr_set_protocol(struct psmouse *psmouse, void *data, co
1579 } 1574 }
1580 1575
1581 mutex_unlock(&psmouse_mutex); 1576 mutex_unlock(&psmouse_mutex);
1582 serio_unpin_driver(serio);
1583 serio_unregister_child_port(serio); 1577 serio_unregister_child_port(serio);
1584 serio_pin_driver_uninterruptible(serio);
1585 mutex_lock(&psmouse_mutex); 1578 mutex_lock(&psmouse_mutex);
1586 1579
1587 if (serio->drv != &psmouse_drv) { 1580 if (serio->drv != &psmouse_drv) {
diff --git a/drivers/input/mouse/sentelic.c b/drivers/input/mouse/sentelic.c
index 77b9fd0b3fbf..81a6b81cb2fe 100644
--- a/drivers/input/mouse/sentelic.c
+++ b/drivers/input/mouse/sentelic.c
@@ -2,7 +2,7 @@
2 * Finger Sensing Pad PS/2 mouse driver. 2 * Finger Sensing Pad PS/2 mouse driver.
3 * 3 *
4 * Copyright (C) 2005-2007 Asia Vital Components Co., Ltd. 4 * Copyright (C) 2005-2007 Asia Vital Components Co., Ltd.
5 * Copyright (C) 2005-2009 Tai-hwa Liang, Sentelic Corporation. 5 * Copyright (C) 2005-2010 Tai-hwa Liang, Sentelic Corporation.
6 * 6 *
7 * This program is free software; you can redistribute it and/or 7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License 8 * modify it under the terms of the GNU General Public License
@@ -658,9 +658,9 @@ static psmouse_ret_t fsp_process_byte(struct psmouse *psmouse)
658 if (packet[3] & BIT(1)) 658 if (packet[3] & BIT(1))
659 button_status |= 0x0f; /* wheel up */ 659 button_status |= 0x0f; /* wheel up */
660 if (packet[3] & BIT(2)) 660 if (packet[3] & BIT(2))
661 button_status |= BIT(5);/* horizontal left */ 661 button_status |= BIT(4);/* horizontal left */
662 if (packet[3] & BIT(3)) 662 if (packet[3] & BIT(3))
663 button_status |= BIT(4);/* horizontal right */ 663 button_status |= BIT(5);/* horizontal right */
664 /* push back to packet queue */ 664 /* push back to packet queue */
665 if (button_status != 0) 665 if (button_status != 0)
666 packet[3] = button_status; 666 packet[3] = button_status;
diff --git a/drivers/input/mouse/synaptics.c b/drivers/input/mouse/synaptics.c
index 05689e732191..d3f5243fa093 100644
--- a/drivers/input/mouse/synaptics.c
+++ b/drivers/input/mouse/synaptics.c
@@ -743,6 +743,11 @@ int synaptics_init(struct psmouse *psmouse)
743 return -1; 743 return -1;
744} 744}
745 745
746bool synaptics_supported(void)
747{
748 return true;
749}
750
746#else /* CONFIG_MOUSE_PS2_SYNAPTICS */ 751#else /* CONFIG_MOUSE_PS2_SYNAPTICS */
747 752
748void __init synaptics_module_init(void) 753void __init synaptics_module_init(void)
@@ -754,5 +759,10 @@ int synaptics_init(struct psmouse *psmouse)
754 return -ENOSYS; 759 return -ENOSYS;
755} 760}
756 761
762bool synaptics_supported(void)
763{
764 return false;
765}
766
757#endif /* CONFIG_MOUSE_PS2_SYNAPTICS */ 767#endif /* CONFIG_MOUSE_PS2_SYNAPTICS */
758 768
diff --git a/drivers/input/mouse/synaptics.h b/drivers/input/mouse/synaptics.h
index 838e7f2c9b30..f0f40a331dc8 100644
--- a/drivers/input/mouse/synaptics.h
+++ b/drivers/input/mouse/synaptics.h
@@ -109,5 +109,6 @@ void synaptics_module_init(void);
109int synaptics_detect(struct psmouse *psmouse, bool set_properties); 109int synaptics_detect(struct psmouse *psmouse, bool set_properties);
110int synaptics_init(struct psmouse *psmouse); 110int synaptics_init(struct psmouse *psmouse);
111void synaptics_reset(struct psmouse *psmouse); 111void synaptics_reset(struct psmouse *psmouse);
112bool synaptics_supported(void);
112 113
113#endif /* _SYNAPTICS_H */ 114#endif /* _SYNAPTICS_H */
diff --git a/drivers/input/serio/altera_ps2.c b/drivers/input/serio/altera_ps2.c
index f479ea50919f..320b7ca48bf8 100644
--- a/drivers/input/serio/altera_ps2.c
+++ b/drivers/input/serio/altera_ps2.c
@@ -79,11 +79,11 @@ static void altera_ps2_close(struct serio *io)
79/* 79/*
80 * Add one device to this driver. 80 * Add one device to this driver.
81 */ 81 */
82static int altera_ps2_probe(struct platform_device *pdev) 82static int __devinit altera_ps2_probe(struct platform_device *pdev)
83{ 83{
84 struct ps2if *ps2if; 84 struct ps2if *ps2if;
85 struct serio *serio; 85 struct serio *serio;
86 int error; 86 int error, irq;
87 87
88 ps2if = kzalloc(sizeof(struct ps2if), GFP_KERNEL); 88 ps2if = kzalloc(sizeof(struct ps2if), GFP_KERNEL);
89 serio = kzalloc(sizeof(struct serio), GFP_KERNEL); 89 serio = kzalloc(sizeof(struct serio), GFP_KERNEL);
@@ -108,11 +108,13 @@ static int altera_ps2_probe(struct platform_device *pdev)
108 goto err_free_mem; 108 goto err_free_mem;
109 } 109 }
110 110
111 ps2if->irq = platform_get_irq(pdev, 0); 111
112 if (ps2if->irq < 0) { 112 irq = platform_get_irq(pdev, 0);
113 if (irq < 0) {
113 error = -ENXIO; 114 error = -ENXIO;
114 goto err_free_mem; 115 goto err_free_mem;
115 } 116 }
117 ps2if->irq = irq;
116 118
117 if (!request_mem_region(ps2if->iomem_res->start, 119 if (!request_mem_region(ps2if->iomem_res->start,
118 resource_size(ps2if->iomem_res), pdev->name)) { 120 resource_size(ps2if->iomem_res), pdev->name)) {
@@ -155,7 +157,7 @@ static int altera_ps2_probe(struct platform_device *pdev)
155/* 157/*
156 * Remove one device from this driver. 158 * Remove one device from this driver.
157 */ 159 */
158static int altera_ps2_remove(struct platform_device *pdev) 160static int __devexit altera_ps2_remove(struct platform_device *pdev)
159{ 161{
160 struct ps2if *ps2if = platform_get_drvdata(pdev); 162 struct ps2if *ps2if = platform_get_drvdata(pdev);
161 163
@@ -175,9 +177,10 @@ static int altera_ps2_remove(struct platform_device *pdev)
175 */ 177 */
176static struct platform_driver altera_ps2_driver = { 178static struct platform_driver altera_ps2_driver = {
177 .probe = altera_ps2_probe, 179 .probe = altera_ps2_probe,
178 .remove = altera_ps2_remove, 180 .remove = __devexit_p(altera_ps2_remove),
179 .driver = { 181 .driver = {
180 .name = DRV_NAME, 182 .name = DRV_NAME,
183 .owner = THIS_MODULE,
181 }, 184 },
182}; 185};
183 186
diff --git a/drivers/input/serio/ambakmi.c b/drivers/input/serio/ambakmi.c
index 89b394183a75..92563a681d65 100644
--- a/drivers/input/serio/ambakmi.c
+++ b/drivers/input/serio/ambakmi.c
@@ -107,7 +107,7 @@ static void amba_kmi_close(struct serio *io)
107 clk_disable(kmi->clk); 107 clk_disable(kmi->clk);
108} 108}
109 109
110static int amba_kmi_probe(struct amba_device *dev, struct amba_id *id) 110static int __devinit amba_kmi_probe(struct amba_device *dev, struct amba_id *id)
111{ 111{
112 struct amba_kmi_port *kmi; 112 struct amba_kmi_port *kmi;
113 struct serio *io; 113 struct serio *io;
@@ -134,7 +134,7 @@ static int amba_kmi_probe(struct amba_device *dev, struct amba_id *id)
134 io->port_data = kmi; 134 io->port_data = kmi;
135 io->dev.parent = &dev->dev; 135 io->dev.parent = &dev->dev;
136 136
137 kmi->io = io; 137 kmi->io = io;
138 kmi->base = ioremap(dev->res.start, resource_size(&dev->res)); 138 kmi->base = ioremap(dev->res.start, resource_size(&dev->res));
139 if (!kmi->base) { 139 if (!kmi->base) {
140 ret = -ENOMEM; 140 ret = -ENOMEM;
@@ -162,7 +162,7 @@ static int amba_kmi_probe(struct amba_device *dev, struct amba_id *id)
162 return ret; 162 return ret;
163} 163}
164 164
165static int amba_kmi_remove(struct amba_device *dev) 165static int __devexit amba_kmi_remove(struct amba_device *dev)
166{ 166{
167 struct amba_kmi_port *kmi = amba_get_drvdata(dev); 167 struct amba_kmi_port *kmi = amba_get_drvdata(dev);
168 168
@@ -197,10 +197,11 @@ static struct amba_id amba_kmi_idtable[] = {
197static struct amba_driver ambakmi_driver = { 197static struct amba_driver ambakmi_driver = {
198 .drv = { 198 .drv = {
199 .name = "kmi-pl050", 199 .name = "kmi-pl050",
200 .owner = THIS_MODULE,
200 }, 201 },
201 .id_table = amba_kmi_idtable, 202 .id_table = amba_kmi_idtable,
202 .probe = amba_kmi_probe, 203 .probe = amba_kmi_probe,
203 .remove = amba_kmi_remove, 204 .remove = __devexit_p(amba_kmi_remove),
204 .resume = amba_kmi_resume, 205 .resume = amba_kmi_resume,
205}; 206};
206 207
diff --git a/drivers/input/serio/at32psif.c b/drivers/input/serio/at32psif.c
index a6fb7a3dcc46..b54452a8c771 100644
--- a/drivers/input/serio/at32psif.c
+++ b/drivers/input/serio/at32psif.c
@@ -137,7 +137,7 @@ static int psif_write(struct serio *io, unsigned char val)
137 spin_lock_irqsave(&psif->lock, flags); 137 spin_lock_irqsave(&psif->lock, flags);
138 138
139 while (!(psif_readl(psif, SR) & PSIF_BIT(TXEMPTY)) && timeout--) 139 while (!(psif_readl(psif, SR) & PSIF_BIT(TXEMPTY)) && timeout--)
140 msleep(10); 140 udelay(50);
141 141
142 if (timeout >= 0) { 142 if (timeout >= 0) {
143 psif_writel(psif, THR, val); 143 psif_writel(psif, THR, val);
@@ -352,6 +352,7 @@ static struct platform_driver psif_driver = {
352 .remove = __exit_p(psif_remove), 352 .remove = __exit_p(psif_remove),
353 .driver = { 353 .driver = {
354 .name = "atmel_psif", 354 .name = "atmel_psif",
355 .owner = THIS_MODULE,
355 }, 356 },
356 .suspend = psif_suspend, 357 .suspend = psif_suspend,
357 .resume = psif_resume, 358 .resume = psif_resume,
diff --git a/drivers/input/serio/gscps2.c b/drivers/input/serio/gscps2.c
index bd0f92d9f40f..06addfa7cc47 100644
--- a/drivers/input/serio/gscps2.c
+++ b/drivers/input/serio/gscps2.c
@@ -6,7 +6,7 @@
6 * Copyright (c) 2002 Thibaut Varene <varenet@parisc-linux.org> 6 * Copyright (c) 2002 Thibaut Varene <varenet@parisc-linux.org>
7 * 7 *
8 * Pieces of code based on linux-2.4's hp_mouse.c & hp_keyb.c 8 * Pieces of code based on linux-2.4's hp_mouse.c & hp_keyb.c
9 * Copyright (c) 1999 Alex deVries <alex@onefishtwo.ca> 9 * Copyright (c) 1999 Alex deVries <alex@onefishtwo.ca>
10 * Copyright (c) 1999-2000 Philipp Rumpf <prumpf@tux.org> 10 * Copyright (c) 1999-2000 Philipp Rumpf <prumpf@tux.org>
11 * Copyright (c) 2000 Xavier Debacker <debackex@esiee.fr> 11 * Copyright (c) 2000 Xavier Debacker <debackex@esiee.fr>
12 * Copyright (c) 2000-2001 Thomas Marteau <marteaut@esiee.fr> 12 * Copyright (c) 2000-2001 Thomas Marteau <marteaut@esiee.fr>
@@ -326,7 +326,7 @@ static void gscps2_close(struct serio *port)
326 * @return: success/error report 326 * @return: success/error report
327 */ 327 */
328 328
329static int __init gscps2_probe(struct parisc_device *dev) 329static int __devinit gscps2_probe(struct parisc_device *dev)
330{ 330{
331 struct gscps2port *ps2port; 331 struct gscps2port *ps2port;
332 struct serio *serio; 332 struct serio *serio;
@@ -443,7 +443,7 @@ static struct parisc_driver parisc_ps2_driver = {
443 .name = "gsc_ps2", 443 .name = "gsc_ps2",
444 .id_table = gscps2_device_tbl, 444 .id_table = gscps2_device_tbl,
445 .probe = gscps2_probe, 445 .probe = gscps2_probe,
446 .remove = gscps2_remove, 446 .remove = __devexit_p(gscps2_remove),
447}; 447};
448 448
449static int __init gscps2_init(void) 449static int __init gscps2_init(void)
diff --git a/drivers/input/serio/hil_mlc.c b/drivers/input/serio/hil_mlc.c
index 7ba9f2b2c041..6cd03ebaf5fb 100644
--- a/drivers/input/serio/hil_mlc.c
+++ b/drivers/input/serio/hil_mlc.c
@@ -993,10 +993,8 @@ int hil_mlc_unregister(hil_mlc *mlc)
993 993
994static int __init hil_mlc_init(void) 994static int __init hil_mlc_init(void)
995{ 995{
996 init_timer(&hil_mlcs_kicker); 996 setup_timer(&hil_mlcs_kicker, &hil_mlcs_timer, 0);
997 hil_mlcs_kicker.expires = jiffies + HZ; 997 mod_timer(&hil_mlcs_kicker, jiffies + HZ);
998 hil_mlcs_kicker.function = &hil_mlcs_timer;
999 add_timer(&hil_mlcs_kicker);
1000 998
1001 tasklet_enable(&hil_mlcs_tasklet); 999 tasklet_enable(&hil_mlcs_tasklet);
1002 1000
@@ -1005,7 +1003,7 @@ static int __init hil_mlc_init(void)
1005 1003
1006static void __exit hil_mlc_exit(void) 1004static void __exit hil_mlc_exit(void)
1007{ 1005{
1008 del_timer(&hil_mlcs_kicker); 1006 del_timer_sync(&hil_mlcs_kicker);
1009 1007
1010 tasklet_disable(&hil_mlcs_tasklet); 1008 tasklet_disable(&hil_mlcs_tasklet);
1011 tasklet_kill(&hil_mlcs_tasklet); 1009 tasklet_kill(&hil_mlcs_tasklet);
diff --git a/drivers/input/serio/i8042-x86ia64io.h b/drivers/input/serio/i8042-x86ia64io.h
index 7fbffe431bc5..2a5982e532f8 100644
--- a/drivers/input/serio/i8042-x86ia64io.h
+++ b/drivers/input/serio/i8042-x86ia64io.h
@@ -158,6 +158,14 @@ static const struct dmi_system_id __initconst i8042_dmi_noloop_table[] = {
158 }, 158 },
159 }, 159 },
160 { 160 {
161 /* Gigabyte M1022M netbook */
162 .matches = {
163 DMI_MATCH(DMI_BOARD_VENDOR, "Gigabyte Technology Co.,Ltd."),
164 DMI_MATCH(DMI_BOARD_NAME, "M1022E"),
165 DMI_MATCH(DMI_BOARD_VERSION, "1.02"),
166 },
167 },
168 {
161 .matches = { 169 .matches = {
162 DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"), 170 DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
163 DMI_MATCH(DMI_PRODUCT_NAME, "HP Pavilion dv9700"), 171 DMI_MATCH(DMI_PRODUCT_NAME, "HP Pavilion dv9700"),
@@ -516,6 +524,13 @@ static const struct dmi_system_id __initconst i8042_dmi_laptop_table[] = {
516 */ 524 */
517static const struct dmi_system_id __initconst i8042_dmi_dritek_table[] = { 525static const struct dmi_system_id __initconst i8042_dmi_dritek_table[] = {
518 { 526 {
527 /* Acer Aspire 5610 */
528 .matches = {
529 DMI_MATCH(DMI_SYS_VENDOR, "Acer"),
530 DMI_MATCH(DMI_PRODUCT_NAME, "Aspire 5610"),
531 },
532 },
533 {
519 /* Acer Aspire 5630 */ 534 /* Acer Aspire 5630 */
520 .matches = { 535 .matches = {
521 DMI_MATCH(DMI_SYS_VENDOR, "Acer"), 536 DMI_MATCH(DMI_SYS_VENDOR, "Acer"),
diff --git a/drivers/input/serio/i8042.c b/drivers/input/serio/i8042.c
index 1df02d25aca5..b54aee7cd9e3 100644
--- a/drivers/input/serio/i8042.c
+++ b/drivers/input/serio/i8042.c
@@ -126,6 +126,8 @@ static unsigned char i8042_suppress_kbd_ack;
126static struct platform_device *i8042_platform_device; 126static struct platform_device *i8042_platform_device;
127 127
128static irqreturn_t i8042_interrupt(int irq, void *dev_id); 128static irqreturn_t i8042_interrupt(int irq, void *dev_id);
129static bool (*i8042_platform_filter)(unsigned char data, unsigned char str,
130 struct serio *serio);
129 131
130void i8042_lock_chip(void) 132void i8042_lock_chip(void)
131{ 133{
@@ -139,6 +141,48 @@ void i8042_unlock_chip(void)
139} 141}
140EXPORT_SYMBOL(i8042_unlock_chip); 142EXPORT_SYMBOL(i8042_unlock_chip);
141 143
144int i8042_install_filter(bool (*filter)(unsigned char data, unsigned char str,
145 struct serio *serio))
146{
147 unsigned long flags;
148 int ret = 0;
149
150 spin_lock_irqsave(&i8042_lock, flags);
151
152 if (i8042_platform_filter) {
153 ret = -EBUSY;
154 goto out;
155 }
156
157 i8042_platform_filter = filter;
158
159out:
160 spin_unlock_irqrestore(&i8042_lock, flags);
161 return ret;
162}
163EXPORT_SYMBOL(i8042_install_filter);
164
165int i8042_remove_filter(bool (*filter)(unsigned char data, unsigned char str,
166 struct serio *port))
167{
168 unsigned long flags;
169 int ret = 0;
170
171 spin_lock_irqsave(&i8042_lock, flags);
172
173 if (i8042_platform_filter != filter) {
174 ret = -EINVAL;
175 goto out;
176 }
177
178 i8042_platform_filter = NULL;
179
180out:
181 spin_unlock_irqrestore(&i8042_lock, flags);
182 return ret;
183}
184EXPORT_SYMBOL(i8042_remove_filter);
185
142/* 186/*
143 * The i8042_wait_read() and i8042_wait_write functions wait for the i8042 to 187 * The i8042_wait_read() and i8042_wait_write functions wait for the i8042 to
144 * be ready for reading values from it / writing values to it. 188 * be ready for reading values from it / writing values to it.
@@ -369,6 +413,31 @@ static void i8042_stop(struct serio *serio)
369} 413}
370 414
371/* 415/*
416 * i8042_filter() filters out unwanted bytes from the input data stream.
417 * It is called from i8042_interrupt and thus is running with interrupts
418 * off and i8042_lock held.
419 */
420static bool i8042_filter(unsigned char data, unsigned char str,
421 struct serio *serio)
422{
423 if (unlikely(i8042_suppress_kbd_ack)) {
424 if ((~str & I8042_STR_AUXDATA) &&
425 (data == 0xfa || data == 0xfe)) {
426 i8042_suppress_kbd_ack--;
427 dbg("Extra keyboard ACK - filtered out\n");
428 return true;
429 }
430 }
431
432 if (i8042_platform_filter && i8042_platform_filter(data, str, serio)) {
433 dbg("Filtered out by platfrom filter\n");
434 return true;
435 }
436
437 return false;
438}
439
440/*
372 * i8042_interrupt() is the most important function in this driver - 441 * i8042_interrupt() is the most important function in this driver -
373 * it handles the interrupts from the i8042, and sends incoming bytes 442 * it handles the interrupts from the i8042, and sends incoming bytes
374 * to the upper layers. 443 * to the upper layers.
@@ -377,13 +446,16 @@ static void i8042_stop(struct serio *serio)
377static irqreturn_t i8042_interrupt(int irq, void *dev_id) 446static irqreturn_t i8042_interrupt(int irq, void *dev_id)
378{ 447{
379 struct i8042_port *port; 448 struct i8042_port *port;
449 struct serio *serio;
380 unsigned long flags; 450 unsigned long flags;
381 unsigned char str, data; 451 unsigned char str, data;
382 unsigned int dfl; 452 unsigned int dfl;
383 unsigned int port_no; 453 unsigned int port_no;
454 bool filtered;
384 int ret = 1; 455 int ret = 1;
385 456
386 spin_lock_irqsave(&i8042_lock, flags); 457 spin_lock_irqsave(&i8042_lock, flags);
458
387 str = i8042_read_status(); 459 str = i8042_read_status();
388 if (unlikely(~str & I8042_STR_OBF)) { 460 if (unlikely(~str & I8042_STR_OBF)) {
389 spin_unlock_irqrestore(&i8042_lock, flags); 461 spin_unlock_irqrestore(&i8042_lock, flags);
@@ -391,8 +463,8 @@ static irqreturn_t i8042_interrupt(int irq, void *dev_id)
391 ret = 0; 463 ret = 0;
392 goto out; 464 goto out;
393 } 465 }
466
394 data = i8042_read_data(); 467 data = i8042_read_data();
395 spin_unlock_irqrestore(&i8042_lock, flags);
396 468
397 if (i8042_mux_present && (str & I8042_STR_AUXDATA)) { 469 if (i8042_mux_present && (str & I8042_STR_AUXDATA)) {
398 static unsigned long last_transmit; 470 static unsigned long last_transmit;
@@ -441,21 +513,19 @@ static irqreturn_t i8042_interrupt(int irq, void *dev_id)
441 } 513 }
442 514
443 port = &i8042_ports[port_no]; 515 port = &i8042_ports[port_no];
516 serio = port->exists ? port->serio : NULL;
444 517
445 dbg("%02x <- i8042 (interrupt, %d, %d%s%s)", 518 dbg("%02x <- i8042 (interrupt, %d, %d%s%s)",
446 data, port_no, irq, 519 data, port_no, irq,
447 dfl & SERIO_PARITY ? ", bad parity" : "", 520 dfl & SERIO_PARITY ? ", bad parity" : "",
448 dfl & SERIO_TIMEOUT ? ", timeout" : ""); 521 dfl & SERIO_TIMEOUT ? ", timeout" : "");
449 522
450 if (unlikely(i8042_suppress_kbd_ack)) 523 filtered = i8042_filter(data, str, serio);
451 if (port_no == I8042_KBD_PORT_NO && 524
452 (data == 0xfa || data == 0xfe)) { 525 spin_unlock_irqrestore(&i8042_lock, flags);
453 i8042_suppress_kbd_ack--;
454 goto out;
455 }
456 526
457 if (likely(port->exists)) 527 if (likely(port->exists && !filtered))
458 serio_interrupt(port->serio, data, dfl); 528 serio_interrupt(serio, data, dfl);
459 529
460 out: 530 out:
461 return IRQ_RETVAL(ret); 531 return IRQ_RETVAL(ret);
@@ -1091,9 +1161,17 @@ static int i8042_pm_restore(struct device *dev)
1091 return 0; 1161 return 0;
1092} 1162}
1093 1163
1164static int i8042_pm_thaw(struct device *dev)
1165{
1166 i8042_interrupt(0, NULL);
1167
1168 return 0;
1169}
1170
1094static const struct dev_pm_ops i8042_pm_ops = { 1171static const struct dev_pm_ops i8042_pm_ops = {
1095 .suspend = i8042_pm_reset, 1172 .suspend = i8042_pm_reset,
1096 .resume = i8042_pm_restore, 1173 .resume = i8042_pm_restore,
1174 .thaw = i8042_pm_thaw,
1097 .poweroff = i8042_pm_reset, 1175 .poweroff = i8042_pm_reset,
1098 .restore = i8042_pm_restore, 1176 .restore = i8042_pm_restore,
1099}; 1177};
diff --git a/drivers/input/serio/sa1111ps2.c b/drivers/input/serio/sa1111ps2.c
index f412c69478a8..d55874e5d1c2 100644
--- a/drivers/input/serio/sa1111ps2.c
+++ b/drivers/input/serio/sa1111ps2.c
@@ -180,8 +180,8 @@ static void __devinit ps2_clear_input(struct ps2if *ps2if)
180 } 180 }
181} 181}
182 182
183static inline unsigned int 183static unsigned int __devinit ps2_test_one(struct ps2if *ps2if,
184ps2_test_one(struct ps2if *ps2if, unsigned int mask) 184 unsigned int mask)
185{ 185{
186 unsigned int val; 186 unsigned int val;
187 187
@@ -197,7 +197,7 @@ ps2_test_one(struct ps2if *ps2if, unsigned int mask)
197 * Test the keyboard interface. We basically check to make sure that 197 * Test the keyboard interface. We basically check to make sure that
198 * we can drive each line to the keyboard independently of each other. 198 * we can drive each line to the keyboard independently of each other.
199 */ 199 */
200static int __init ps2_test(struct ps2if *ps2if) 200static int __devinit ps2_test(struct ps2if *ps2if)
201{ 201{
202 unsigned int stat; 202 unsigned int stat;
203 int ret = 0; 203 int ret = 0;
@@ -312,7 +312,7 @@ static int __devinit ps2_probe(struct sa1111_dev *dev)
312/* 312/*
313 * Remove one device from this driver. 313 * Remove one device from this driver.
314 */ 314 */
315static int ps2_remove(struct sa1111_dev *dev) 315static int __devexit ps2_remove(struct sa1111_dev *dev)
316{ 316{
317 struct ps2if *ps2if = sa1111_get_drvdata(dev); 317 struct ps2if *ps2if = sa1111_get_drvdata(dev);
318 318
@@ -335,7 +335,7 @@ static struct sa1111_driver ps2_driver = {
335 }, 335 },
336 .devid = SA1111_DEVID_PS2, 336 .devid = SA1111_DEVID_PS2,
337 .probe = ps2_probe, 337 .probe = ps2_probe,
338 .remove = ps2_remove, 338 .remove = __devexit_p(ps2_remove),
339}; 339};
340 340
341static int __init ps2_init(void) 341static int __init ps2_init(void)
diff --git a/drivers/input/serio/serio.c b/drivers/input/serio/serio.c
index 0236f0d5fd91..e0f30186d513 100644
--- a/drivers/input/serio/serio.c
+++ b/drivers/input/serio/serio.c
@@ -284,13 +284,7 @@ static void serio_handle_event(void)
284 284
285 mutex_lock(&serio_mutex); 285 mutex_lock(&serio_mutex);
286 286
287 /* 287 while ((event = serio_get_event())) {
288 * Note that we handle only one event here to give swsusp
289 * a chance to freeze kseriod thread. Serio events should
290 * be pretty rare so we are not concerned about taking
291 * performance hit.
292 */
293 if ((event = serio_get_event())) {
294 288
295 switch (event->type) { 289 switch (event->type) {
296 case SERIO_REGISTER_PORT: 290 case SERIO_REGISTER_PORT:
@@ -380,10 +374,9 @@ static struct serio *serio_get_pending_child(struct serio *parent)
380 374
381static int serio_thread(void *nothing) 375static int serio_thread(void *nothing)
382{ 376{
383 set_freezable();
384 do { 377 do {
385 serio_handle_event(); 378 serio_handle_event();
386 wait_event_freezable(serio_wait, 379 wait_event_interruptible(serio_wait,
387 kthread_should_stop() || !list_empty(&serio_event_list)); 380 kthread_should_stop() || !list_empty(&serio_event_list));
388 } while (!kthread_should_stop()); 381 } while (!kthread_should_stop());
389 382
diff --git a/drivers/input/tablet/wacom.h b/drivers/input/tablet/wacom.h
index 9114ae1c7488..16310f368dab 100644
--- a/drivers/input/tablet/wacom.h
+++ b/drivers/input/tablet/wacom.h
@@ -1,7 +1,7 @@
1/* 1/*
2 * drivers/input/tablet/wacom.h 2 * drivers/input/tablet/wacom.h
3 * 3 *
4 * USB Wacom Graphire and Wacom Intuos tablet support 4 * USB Wacom tablet support
5 * 5 *
6 * Copyright (c) 2000-2004 Vojtech Pavlik <vojtech@ucw.cz> 6 * Copyright (c) 2000-2004 Vojtech Pavlik <vojtech@ucw.cz>
7 * Copyright (c) 2000 Andreas Bach Aaen <abach@stofanet.dk> 7 * Copyright (c) 2000 Andreas Bach Aaen <abach@stofanet.dk>
@@ -69,6 +69,9 @@
69 * v1.49 (pc) - Added support for USB Tablet PC (0x90, 0x93, and 0x9A) 69 * v1.49 (pc) - Added support for USB Tablet PC (0x90, 0x93, and 0x9A)
70 * v1.50 (pc) - Fixed a TabletPC touch bug in 2.6.28 70 * v1.50 (pc) - Fixed a TabletPC touch bug in 2.6.28
71 * v1.51 (pc) - Added support for Intuos4 71 * v1.51 (pc) - Added support for Intuos4
72 * v1.52 (pc) - Query Wacom data upon system resume
73 * - add defines for features->type
74 * - add new devices (0x9F, 0xE2, and 0XE3)
72 */ 75 */
73 76
74/* 77/*
@@ -89,9 +92,9 @@
89/* 92/*
90 * Version Information 93 * Version Information
91 */ 94 */
92#define DRIVER_VERSION "v1.51" 95#define DRIVER_VERSION "v1.52"
93#define DRIVER_AUTHOR "Vojtech Pavlik <vojtech@ucw.cz>" 96#define DRIVER_AUTHOR "Vojtech Pavlik <vojtech@ucw.cz>"
94#define DRIVER_DESC "USB Wacom Graphire and Wacom Intuos tablet driver" 97#define DRIVER_DESC "USB Wacom tablet driver"
95#define DRIVER_LICENSE "GPL" 98#define DRIVER_LICENSE "GPL"
96 99
97MODULE_AUTHOR(DRIVER_AUTHOR); 100MODULE_AUTHOR(DRIVER_AUTHOR);
@@ -133,6 +136,8 @@ extern void input_dev_i4s(struct input_dev *input_dev, struct wacom_wac *wacom_w
133extern void input_dev_i4(struct input_dev *input_dev, struct wacom_wac *wacom_wac); 136extern void input_dev_i4(struct input_dev *input_dev, struct wacom_wac *wacom_wac);
134extern void input_dev_pl(struct input_dev *input_dev, struct wacom_wac *wacom_wac); 137extern void input_dev_pl(struct input_dev *input_dev, struct wacom_wac *wacom_wac);
135extern void input_dev_pt(struct input_dev *input_dev, struct wacom_wac *wacom_wac); 138extern void input_dev_pt(struct input_dev *input_dev, struct wacom_wac *wacom_wac);
139extern void input_dev_tpc(struct input_dev *input_dev, struct wacom_wac *wacom_wac);
140extern void input_dev_tpc2fg(struct input_dev *input_dev, struct wacom_wac *wacom_wac);
136extern void input_dev_mo(struct input_dev *input_dev, struct wacom_wac *wacom_wac); 141extern void input_dev_mo(struct input_dev *input_dev, struct wacom_wac *wacom_wac);
137extern void input_dev_bee(struct input_dev *input_dev, struct wacom_wac *wacom_wac); 142extern void input_dev_bee(struct input_dev *input_dev, struct wacom_wac *wacom_wac);
138extern __u16 wacom_le16_to_cpu(unsigned char *data); 143extern __u16 wacom_le16_to_cpu(unsigned char *data);
diff --git a/drivers/input/tablet/wacom_sys.c b/drivers/input/tablet/wacom_sys.c
index ea30c983a33e..072f33b3b2b0 100644
--- a/drivers/input/tablet/wacom_sys.c
+++ b/drivers/input/tablet/wacom_sys.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * drivers/input/tablet/wacom_sys.c 2 * drivers/input/tablet/wacom_sys.c
3 * 3 *
4 * USB Wacom Graphire and Wacom Intuos tablet support - system specific code 4 * USB Wacom tablet support - system specific code
5 */ 5 */
6 6
7/* 7/*
@@ -209,6 +209,7 @@ void input_dev_g(struct input_dev *input_dev, struct wacom_wac *wacom_wac)
209 input_dev->keybit[BIT_WORD(BTN_MOUSE)] |= BIT_MASK(BTN_LEFT) | 209 input_dev->keybit[BIT_WORD(BTN_MOUSE)] |= BIT_MASK(BTN_LEFT) |
210 BIT_MASK(BTN_RIGHT) | BIT_MASK(BTN_MIDDLE); 210 BIT_MASK(BTN_RIGHT) | BIT_MASK(BTN_MIDDLE);
211 input_dev->keybit[BIT_WORD(BTN_DIGI)] |= BIT_MASK(BTN_TOOL_RUBBER) | 211 input_dev->keybit[BIT_WORD(BTN_DIGI)] |= BIT_MASK(BTN_TOOL_RUBBER) |
212 BIT_MASK(BTN_TOOL_PEN) | BIT_MASK(BTN_STYLUS) |
212 BIT_MASK(BTN_TOOL_MOUSE) | BIT_MASK(BTN_STYLUS2); 213 BIT_MASK(BTN_TOOL_MOUSE) | BIT_MASK(BTN_STYLUS2);
213 input_set_abs_params(input_dev, ABS_DISTANCE, 0, wacom_wac->features->distance_max, 0, 0); 214 input_set_abs_params(input_dev, ABS_DISTANCE, 0, wacom_wac->features->distance_max, 0, 0);
214} 215}
@@ -256,6 +257,7 @@ void input_dev_i(struct input_dev *input_dev, struct wacom_wac *wacom_wac)
256 BIT_MASK(BTN_RIGHT) | BIT_MASK(BTN_MIDDLE) | 257 BIT_MASK(BTN_RIGHT) | BIT_MASK(BTN_MIDDLE) |
257 BIT_MASK(BTN_SIDE) | BIT_MASK(BTN_EXTRA); 258 BIT_MASK(BTN_SIDE) | BIT_MASK(BTN_EXTRA);
258 input_dev->keybit[BIT_WORD(BTN_DIGI)] |= BIT_MASK(BTN_TOOL_RUBBER) | 259 input_dev->keybit[BIT_WORD(BTN_DIGI)] |= BIT_MASK(BTN_TOOL_RUBBER) |
260 BIT_MASK(BTN_TOOL_PEN) | BIT_MASK(BTN_STYLUS) |
259 BIT_MASK(BTN_TOOL_MOUSE) | BIT_MASK(BTN_TOOL_BRUSH) | 261 BIT_MASK(BTN_TOOL_MOUSE) | BIT_MASK(BTN_TOOL_BRUSH) |
260 BIT_MASK(BTN_TOOL_PENCIL) | BIT_MASK(BTN_TOOL_AIRBRUSH) | 262 BIT_MASK(BTN_TOOL_PENCIL) | BIT_MASK(BTN_TOOL_AIRBRUSH) |
261 BIT_MASK(BTN_TOOL_LENS) | BIT_MASK(BTN_STYLUS2); 263 BIT_MASK(BTN_TOOL_LENS) | BIT_MASK(BTN_STYLUS2);
@@ -269,7 +271,8 @@ void input_dev_i(struct input_dev *input_dev, struct wacom_wac *wacom_wac)
269 271
270void input_dev_pl(struct input_dev *input_dev, struct wacom_wac *wacom_wac) 272void input_dev_pl(struct input_dev *input_dev, struct wacom_wac *wacom_wac)
271{ 273{
272 input_dev->keybit[BIT_WORD(BTN_DIGI)] |= BIT_MASK(BTN_STYLUS2); 274 input_dev->keybit[BIT_WORD(BTN_DIGI)] |= BIT_MASK(BTN_TOOL_PEN) |
275 BIT_MASK(BTN_STYLUS) | BIT_MASK(BTN_STYLUS2);
273} 276}
274 277
275void input_dev_pt(struct input_dev *input_dev, struct wacom_wac *wacom_wac) 278void input_dev_pt(struct input_dev *input_dev, struct wacom_wac *wacom_wac)
@@ -277,12 +280,32 @@ void input_dev_pt(struct input_dev *input_dev, struct wacom_wac *wacom_wac)
277 input_dev->keybit[BIT_WORD(BTN_DIGI)] |= BIT_MASK(BTN_TOOL_RUBBER); 280 input_dev->keybit[BIT_WORD(BTN_DIGI)] |= BIT_MASK(BTN_TOOL_RUBBER);
278} 281}
279 282
283void input_dev_tpc(struct input_dev *input_dev, struct wacom_wac *wacom_wac)
284{
285 if (wacom_wac->features->device_type == BTN_TOOL_DOUBLETAP ||
286 wacom_wac->features->device_type == BTN_TOOL_TRIPLETAP) {
287 input_set_abs_params(input_dev, ABS_RX, 0, wacom_wac->features->x_phy, 0, 0);
288 input_set_abs_params(input_dev, ABS_RY, 0, wacom_wac->features->y_phy, 0, 0);
289 input_dev->keybit[BIT_WORD(BTN_DIGI)] |= BIT_MASK(BTN_TOOL_DOUBLETAP);
290 }
291}
292
293void input_dev_tpc2fg(struct input_dev *input_dev, struct wacom_wac *wacom_wac)
294{
295 if (wacom_wac->features->device_type == BTN_TOOL_TRIPLETAP) {
296 input_dev->keybit[BIT_WORD(BTN_DIGI)] |= BIT_MASK(BTN_TOOL_TRIPLETAP);
297 input_dev->evbit[0] |= BIT_MASK(EV_MSC);
298 input_dev->mscbit[0] |= BIT_MASK(MSC_SERIAL);
299 }
300}
301
280static int wacom_parse_hid(struct usb_interface *intf, struct hid_descriptor *hid_desc, 302static int wacom_parse_hid(struct usb_interface *intf, struct hid_descriptor *hid_desc,
281 struct wacom_wac *wacom_wac) 303 struct wacom_features *features)
282{ 304{
283 struct usb_device *dev = interface_to_usbdev(intf); 305 struct usb_device *dev = interface_to_usbdev(intf);
284 struct wacom_features *features = wacom_wac->features; 306 char limit = 0;
285 char limit = 0, result = 0; 307 /* result has to be defined as int for some devices */
308 int result = 0;
286 int i = 0, usage = WCM_UNDEFINED, finger = 0, pen = 0; 309 int i = 0, usage = WCM_UNDEFINED, finger = 0, pen = 0;
287 unsigned char *report; 310 unsigned char *report;
288 311
@@ -328,13 +351,24 @@ static int wacom_parse_hid(struct usb_interface *intf, struct hid_descriptor *hi
328 case HID_USAGE_X: 351 case HID_USAGE_X:
329 if (usage == WCM_DESKTOP) { 352 if (usage == WCM_DESKTOP) {
330 if (finger) { 353 if (finger) {
331 features->touch_x_max = 354 features->device_type = BTN_TOOL_DOUBLETAP;
332 features->touch_y_max = 355 if (features->type == TABLETPC2FG) {
333 wacom_le16_to_cpu(&report[i + 3]); 356 /* need to reset back */
357 features->pktlen = WACOM_PKGLEN_TPC2FG;
358 features->device_type = BTN_TOOL_TRIPLETAP;
359 }
334 features->x_max = 360 features->x_max =
361 wacom_le16_to_cpu(&report[i + 3]);
362 features->x_phy =
335 wacom_le16_to_cpu(&report[i + 6]); 363 wacom_le16_to_cpu(&report[i + 6]);
336 i += 7; 364 features->unit = report[i + 9];
365 features->unitExpo = report[i + 11];
366 i += 12;
337 } else if (pen) { 367 } else if (pen) {
368 /* penabled only accepts exact bytes of data */
369 if (features->type == TABLETPC2FG)
370 features->pktlen = WACOM_PKGLEN_PENABLED;
371 features->device_type = BTN_TOOL_PEN;
338 features->x_max = 372 features->x_max =
339 wacom_le16_to_cpu(&report[i + 3]); 373 wacom_le16_to_cpu(&report[i + 3]);
340 i += 4; 374 i += 4;
@@ -350,10 +384,35 @@ static int wacom_parse_hid(struct usb_interface *intf, struct hid_descriptor *hi
350 break; 384 break;
351 385
352 case HID_USAGE_Y: 386 case HID_USAGE_Y:
353 if (usage == WCM_DESKTOP) 387 if (usage == WCM_DESKTOP) {
354 features->y_max = 388 if (finger) {
355 wacom_le16_to_cpu(&report[i + 3]); 389 features->device_type = BTN_TOOL_DOUBLETAP;
356 i += 4; 390 if (features->type == TABLETPC2FG) {
391 /* need to reset back */
392 features->pktlen = WACOM_PKGLEN_TPC2FG;
393 features->device_type = BTN_TOOL_TRIPLETAP;
394 features->y_max =
395 wacom_le16_to_cpu(&report[i + 3]);
396 features->y_phy =
397 wacom_le16_to_cpu(&report[i + 6]);
398 i += 7;
399 } else {
400 features->y_max =
401 features->x_max;
402 features->y_phy =
403 wacom_le16_to_cpu(&report[i + 3]);
404 i += 4;
405 }
406 } else if (pen) {
407 /* penabled only accepts exact bytes of data */
408 if (features->type == TABLETPC2FG)
409 features->pktlen = WACOM_PKGLEN_PENABLED;
410 features->device_type = BTN_TOOL_PEN;
411 features->y_max =
412 wacom_le16_to_cpu(&report[i + 3]);
413 i += 4;
414 }
415 }
357 break; 416 break;
358 417
359 case HID_USAGE_FINGER: 418 case HID_USAGE_FINGER:
@@ -376,7 +435,7 @@ static int wacom_parse_hid(struct usb_interface *intf, struct hid_descriptor *hi
376 break; 435 break;
377 436
378 case HID_COLLECTION: 437 case HID_COLLECTION:
379 /* reset UsagePage ans Finger */ 438 /* reset UsagePage and Finger */
380 finger = usage = 0; 439 finger = usage = 0;
381 break; 440 break;
382 } 441 }
@@ -388,43 +447,92 @@ static int wacom_parse_hid(struct usb_interface *intf, struct hid_descriptor *hi
388 return result; 447 return result;
389} 448}
390 449
391static int wacom_query_tablet_data(struct usb_interface *intf) 450static int wacom_query_tablet_data(struct usb_interface *intf, struct wacom_features *features)
392{ 451{
393 unsigned char *rep_data; 452 unsigned char *rep_data;
394 int limit = 0; 453 int limit = 0, report_id = 2;
395 int error; 454 int error = -ENOMEM;
396 455
397 rep_data = kmalloc(2, GFP_KERNEL); 456 rep_data = kmalloc(2, GFP_KERNEL);
398 if (!rep_data) 457 if (!rep_data)
399 return -ENOMEM; 458 return error;
400 459
401 do { 460 /* ask to report tablet data if it is 2FGT or not a Tablet PC */
402 rep_data[0] = 2; 461 if (features->device_type == BTN_TOOL_TRIPLETAP) {
403 rep_data[1] = 2; 462 do {
404 error = usb_set_report(intf, WAC_HID_FEATURE_REPORT, 463 rep_data[0] = 3;
405 2, rep_data, 2); 464 rep_data[1] = 4;
406 if (error >= 0) 465 report_id = 3;
407 error = usb_get_report(intf, 466 error = usb_set_report(intf, WAC_HID_FEATURE_REPORT,
408 WAC_HID_FEATURE_REPORT, 2, 467 report_id, rep_data, 2);
409 rep_data, 2); 468 if (error >= 0)
410 } while ((error < 0 || rep_data[1] != 2) && limit++ < 5); 469 error = usb_get_report(intf,
470 WAC_HID_FEATURE_REPORT, report_id,
471 rep_data, 3);
472 } while ((error < 0 || rep_data[1] != 4) && limit++ < 5);
473 } else if (features->type != TABLETPC && features->type != TABLETPC2FG) {
474 do {
475 rep_data[0] = 2;
476 rep_data[1] = 2;
477 error = usb_set_report(intf, WAC_HID_FEATURE_REPORT,
478 report_id, rep_data, 2);
479 if (error >= 0)
480 error = usb_get_report(intf,
481 WAC_HID_FEATURE_REPORT, report_id,
482 rep_data, 2);
483 } while ((error < 0 || rep_data[1] != 2) && limit++ < 5);
484 }
411 485
412 kfree(rep_data); 486 kfree(rep_data);
413 487
414 return error < 0 ? error : 0; 488 return error < 0 ? error : 0;
415} 489}
416 490
491static int wacom_retrieve_hid_descriptor(struct usb_interface *intf,
492 struct wacom_features *features)
493{
494 int error = 0;
495 struct usb_host_interface *interface = intf->cur_altsetting;
496 struct hid_descriptor *hid_desc;
497
498 /* default device to penabled */
499 features->device_type = BTN_TOOL_PEN;
500
501 /* only Tablet PCs need to retrieve the info */
502 if ((features->type != TABLETPC) && (features->type != TABLETPC2FG))
503 goto out;
504
505 if (usb_get_extra_descriptor(interface, HID_DEVICET_HID, &hid_desc)) {
506 if (usb_get_extra_descriptor(&interface->endpoint[0],
507 HID_DEVICET_REPORT, &hid_desc)) {
508 printk("wacom: can not retrieve extra class descriptor\n");
509 error = 1;
510 goto out;
511 }
512 }
513 error = wacom_parse_hid(intf, hid_desc, features);
514 if (error)
515 goto out;
516
517 /* touch device found but size is not defined. use default */
518 if (features->device_type == BTN_TOOL_DOUBLETAP && !features->x_max) {
519 features->x_max = 1023;
520 features->y_max = 1023;
521 }
522
523 out:
524 return error;
525}
526
417static int wacom_probe(struct usb_interface *intf, const struct usb_device_id *id) 527static int wacom_probe(struct usb_interface *intf, const struct usb_device_id *id)
418{ 528{
419 struct usb_device *dev = interface_to_usbdev(intf); 529 struct usb_device *dev = interface_to_usbdev(intf);
420 struct usb_host_interface *interface = intf->cur_altsetting;
421 struct usb_endpoint_descriptor *endpoint; 530 struct usb_endpoint_descriptor *endpoint;
422 struct wacom *wacom; 531 struct wacom *wacom;
423 struct wacom_wac *wacom_wac; 532 struct wacom_wac *wacom_wac;
424 struct wacom_features *features; 533 struct wacom_features *features;
425 struct input_dev *input_dev; 534 struct input_dev *input_dev;
426 int error = -ENOMEM; 535 int error = -ENOMEM;
427 struct hid_descriptor *hid_desc;
428 536
429 wacom = kzalloc(sizeof(struct wacom), GFP_KERNEL); 537 wacom = kzalloc(sizeof(struct wacom), GFP_KERNEL);
430 wacom_wac = kzalloc(sizeof(struct wacom_wac), GFP_KERNEL); 538 wacom_wac = kzalloc(sizeof(struct wacom_wac), GFP_KERNEL);
@@ -432,7 +540,7 @@ static int wacom_probe(struct usb_interface *intf, const struct usb_device_id *i
432 if (!wacom || !input_dev || !wacom_wac) 540 if (!wacom || !input_dev || !wacom_wac)
433 goto fail1; 541 goto fail1;
434 542
435 wacom_wac->data = usb_buffer_alloc(dev, 10, GFP_KERNEL, &wacom->data_dma); 543 wacom_wac->data = usb_buffer_alloc(dev, WACOM_PKGLEN_MAX, GFP_KERNEL, &wacom->data_dma);
436 if (!wacom_wac->data) 544 if (!wacom_wac->data)
437 goto fail1; 545 goto fail1;
438 546
@@ -448,7 +556,7 @@ static int wacom_probe(struct usb_interface *intf, const struct usb_device_id *i
448 strlcat(wacom->phys, "/input0", sizeof(wacom->phys)); 556 strlcat(wacom->phys, "/input0", sizeof(wacom->phys));
449 557
450 wacom_wac->features = features = get_wacom_feature(id); 558 wacom_wac->features = features = get_wacom_feature(id);
451 BUG_ON(features->pktlen > 10); 559 BUG_ON(features->pktlen > WACOM_PKGLEN_MAX);
452 560
453 input_dev->name = wacom_wac->features->name; 561 input_dev->name = wacom_wac->features->name;
454 wacom->wacom_wac = wacom_wac; 562 wacom->wacom_wac = wacom_wac;
@@ -463,47 +571,24 @@ static int wacom_probe(struct usb_interface *intf, const struct usb_device_id *i
463 571
464 endpoint = &intf->cur_altsetting->endpoint[0].desc; 572 endpoint = &intf->cur_altsetting->endpoint[0].desc;
465 573
466 /* Initialize touch_x_max and touch_y_max in case it is not defined */ 574 /* Retrieve the physical and logical size for OEM devices */
467 if (wacom_wac->features->type == TABLETPC) { 575 error = wacom_retrieve_hid_descriptor(intf, features);
468 features->touch_x_max = 1023; 576 if (error)
469 features->touch_y_max = 1023; 577 goto fail2;
470 } else {
471 features->touch_x_max = 0;
472 features->touch_y_max = 0;
473 }
474
475 /* TabletPC need to retrieve the physical and logical maximum from report descriptor */
476 if (wacom_wac->features->type == TABLETPC) {
477 if (usb_get_extra_descriptor(interface, HID_DEVICET_HID, &hid_desc)) {
478 if (usb_get_extra_descriptor(&interface->endpoint[0],
479 HID_DEVICET_REPORT, &hid_desc)) {
480 printk("wacom: can not retrive extra class descriptor\n");
481 goto fail2;
482 }
483 }
484 error = wacom_parse_hid(intf, hid_desc, wacom_wac);
485 if (error)
486 goto fail2;
487 }
488 578
489 input_dev->evbit[0] |= BIT_MASK(EV_KEY) | BIT_MASK(EV_ABS); 579 input_dev->evbit[0] |= BIT_MASK(EV_KEY) | BIT_MASK(EV_ABS);
490 input_dev->keybit[BIT_WORD(BTN_DIGI)] |= BIT_MASK(BTN_TOOL_PEN) | 580 input_dev->keybit[BIT_WORD(BTN_DIGI)] |= BIT_MASK(BTN_TOUCH);
491 BIT_MASK(BTN_TOUCH) | BIT_MASK(BTN_STYLUS); 581
492 input_set_abs_params(input_dev, ABS_X, 0, features->x_max, 4, 0); 582 input_set_abs_params(input_dev, ABS_X, 0, features->x_max, 4, 0);
493 input_set_abs_params(input_dev, ABS_Y, 0, features->y_max, 4, 0); 583 input_set_abs_params(input_dev, ABS_Y, 0, features->y_max, 4, 0);
494 input_set_abs_params(input_dev, ABS_PRESSURE, 0, features->pressure_max, 0, 0); 584 input_set_abs_params(input_dev, ABS_PRESSURE, 0, features->pressure_max, 0, 0);
495 if (features->type == TABLETPC) {
496 input_dev->keybit[BIT_WORD(BTN_DIGI)] |= BIT_MASK(BTN_TOOL_DOUBLETAP);
497 input_set_abs_params(input_dev, ABS_RX, 0, features->touch_x_max, 4, 0);
498 input_set_abs_params(input_dev, ABS_RY, 0, features->touch_y_max, 4, 0);
499 }
500 input_dev->absbit[BIT_WORD(ABS_MISC)] |= BIT_MASK(ABS_MISC); 585 input_dev->absbit[BIT_WORD(ABS_MISC)] |= BIT_MASK(ABS_MISC);
501 586
502 wacom_init_input_dev(input_dev, wacom_wac); 587 wacom_init_input_dev(input_dev, wacom_wac);
503 588
504 usb_fill_int_urb(wacom->irq, dev, 589 usb_fill_int_urb(wacom->irq, dev,
505 usb_rcvintpipe(dev, endpoint->bEndpointAddress), 590 usb_rcvintpipe(dev, endpoint->bEndpointAddress),
506 wacom_wac->data, wacom_wac->features->pktlen, 591 wacom_wac->data, features->pktlen,
507 wacom_sys_irq, wacom, endpoint->bInterval); 592 wacom_sys_irq, wacom, endpoint->bInterval);
508 wacom->irq->transfer_dma = wacom->data_dma; 593 wacom->irq->transfer_dma = wacom->data_dma;
509 wacom->irq->transfer_flags |= URB_NO_TRANSFER_DMA_MAP; 594 wacom->irq->transfer_flags |= URB_NO_TRANSFER_DMA_MAP;
@@ -512,18 +597,14 @@ static int wacom_probe(struct usb_interface *intf, const struct usb_device_id *i
512 if (error) 597 if (error)
513 goto fail3; 598 goto fail3;
514 599
515 /* 600 /* Note that if query fails it is not a hard failure */
516 * Ask the tablet to report tablet data if it is not a Tablet PC. 601 wacom_query_tablet_data(intf, features);
517 * Note that if query fails it is not a hard failure.
518 */
519 if (wacom_wac->features->type != TABLETPC)
520 wacom_query_tablet_data(intf);
521 602
522 usb_set_intfdata(intf, wacom); 603 usb_set_intfdata(intf, wacom);
523 return 0; 604 return 0;
524 605
525 fail3: usb_free_urb(wacom->irq); 606 fail3: usb_free_urb(wacom->irq);
526 fail2: usb_buffer_free(dev, 10, wacom_wac->data, wacom->data_dma); 607 fail2: usb_buffer_free(dev, WACOM_PKGLEN_MAX, wacom_wac->data, wacom->data_dma);
527 fail1: input_free_device(input_dev); 608 fail1: input_free_device(input_dev);
528 kfree(wacom); 609 kfree(wacom);
529 kfree(wacom_wac); 610 kfree(wacom_wac);
@@ -539,7 +620,7 @@ static void wacom_disconnect(struct usb_interface *intf)
539 usb_kill_urb(wacom->irq); 620 usb_kill_urb(wacom->irq);
540 input_unregister_device(wacom->dev); 621 input_unregister_device(wacom->dev);
541 usb_free_urb(wacom->irq); 622 usb_free_urb(wacom->irq);
542 usb_buffer_free(interface_to_usbdev(intf), 10, 623 usb_buffer_free(interface_to_usbdev(intf), WACOM_PKGLEN_MAX,
543 wacom->wacom_wac->data, wacom->data_dma); 624 wacom->wacom_wac->data, wacom->data_dma);
544 kfree(wacom->wacom_wac); 625 kfree(wacom->wacom_wac);
545 kfree(wacom); 626 kfree(wacom);
@@ -559,12 +640,16 @@ static int wacom_suspend(struct usb_interface *intf, pm_message_t message)
559static int wacom_resume(struct usb_interface *intf) 640static int wacom_resume(struct usb_interface *intf)
560{ 641{
561 struct wacom *wacom = usb_get_intfdata(intf); 642 struct wacom *wacom = usb_get_intfdata(intf);
643 struct wacom_features *features = wacom->wacom_wac->features;
562 int rv; 644 int rv;
563 645
564 mutex_lock(&wacom->lock); 646 mutex_lock(&wacom->lock);
565 if (wacom->open) 647 if (wacom->open) {
566 rv = usb_submit_urb(wacom->irq, GFP_NOIO); 648 rv = usb_submit_urb(wacom->irq, GFP_NOIO);
567 else 649 /* switch to wacom mode if needed */
650 if (!wacom_retrieve_hid_descriptor(intf, features))
651 wacom_query_tablet_data(intf, features);
652 } else
568 rv = 0; 653 rv = 0;
569 mutex_unlock(&wacom->lock); 654 mutex_unlock(&wacom->lock);
570 655
diff --git a/drivers/input/tablet/wacom_wac.c b/drivers/input/tablet/wacom_wac.c
index c896d6a21b7e..1056f149fe31 100644
--- a/drivers/input/tablet/wacom_wac.c
+++ b/drivers/input/tablet/wacom_wac.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * drivers/input/tablet/wacom_wac.c 2 * drivers/input/tablet/wacom_wac.c
3 * 3 *
4 * USB Wacom Graphire and Wacom Intuos tablet support - Wacom specific code 4 * USB Wacom tablet support - Wacom specific code
5 * 5 *
6 */ 6 */
7 7
@@ -58,16 +58,15 @@ static int wacom_pl_irq(struct wacom_wac *wacom, void *wcombo)
58 unsigned char *data = wacom->data; 58 unsigned char *data = wacom->data;
59 int prox, pressure; 59 int prox, pressure;
60 60
61 if (data[0] != 2) { 61 if (data[0] != WACOM_REPORT_PENABLED) {
62 dbg("wacom_pl_irq: received unknown report #%d", data[0]); 62 dbg("wacom_pl_irq: received unknown report #%d", data[0]);
63 return 0; 63 return 0;
64 } 64 }
65 65
66 prox = data[1] & 0x40; 66 prox = data[1] & 0x40;
67 67
68 wacom->id[0] = ERASER_DEVICE_ID;
69 if (prox) { 68 if (prox) {
70 69 wacom->id[0] = ERASER_DEVICE_ID;
71 pressure = (signed char)((data[7] << 1) | ((data[4] >> 2) & 1)); 70 pressure = (signed char)((data[7] << 1) | ((data[4] >> 2) & 1));
72 if (wacom->features->pressure_max > 255) 71 if (wacom->features->pressure_max > 255)
73 pressure = (pressure << 1) | ((data[4] >> 6) & 1); 72 pressure = (pressure << 1) | ((data[4] >> 6) & 1);
@@ -128,7 +127,7 @@ static int wacom_ptu_irq(struct wacom_wac *wacom, void *wcombo)
128{ 127{
129 unsigned char *data = wacom->data; 128 unsigned char *data = wacom->data;
130 129
131 if (data[0] != 2) { 130 if (data[0] != WACOM_REPORT_PENABLED) {
132 printk(KERN_INFO "wacom_ptu_irq: received unknown report #%d\n", data[0]); 131 printk(KERN_INFO "wacom_ptu_irq: received unknown report #%d\n", data[0]);
133 return 0; 132 return 0;
134 } 133 }
@@ -155,14 +154,16 @@ static int wacom_graphire_irq(struct wacom_wac *wacom, void *wcombo)
155{ 154{
156 unsigned char *data = wacom->data; 155 unsigned char *data = wacom->data;
157 int x, y, rw; 156 int x, y, rw;
157 static int penData = 0;
158 158
159 if (data[0] != 2) { 159 if (data[0] != WACOM_REPORT_PENABLED) {
160 dbg("wacom_graphire_irq: received unknown report #%d", data[0]); 160 dbg("wacom_graphire_irq: received unknown report #%d", data[0]);
161 return 0; 161 return 0;
162 } 162 }
163 163
164 if (data[1] & 0x80) { 164 if (data[1] & 0x80) {
165 /* in prox and not a pad data */ 165 /* in prox and not a pad data */
166 penData = 1;
166 167
167 switch ((data[1] >> 5) & 3) { 168 switch ((data[1] >> 5) & 3) {
168 169
@@ -232,7 +233,11 @@ static int wacom_graphire_irq(struct wacom_wac *wacom, void *wcombo)
232 switch (wacom->features->type) { 233 switch (wacom->features->type) {
233 case WACOM_G4: 234 case WACOM_G4:
234 if (data[7] & 0xf8) { 235 if (data[7] & 0xf8) {
235 wacom_input_sync(wcombo); /* sync last event */ 236 if (penData) {
237 wacom_input_sync(wcombo); /* sync last event */
238 if (!wacom->id[0])
239 penData = 0;
240 }
236 wacom->id[1] = PAD_DEVICE_ID; 241 wacom->id[1] = PAD_DEVICE_ID;
237 wacom_report_key(wcombo, BTN_0, (data[7] & 0x40)); 242 wacom_report_key(wcombo, BTN_0, (data[7] & 0x40));
238 wacom_report_key(wcombo, BTN_4, (data[7] & 0x80)); 243 wacom_report_key(wcombo, BTN_4, (data[7] & 0x80));
@@ -242,10 +247,15 @@ static int wacom_graphire_irq(struct wacom_wac *wacom, void *wcombo)
242 wacom_report_abs(wcombo, ABS_MISC, wacom->id[1]); 247 wacom_report_abs(wcombo, ABS_MISC, wacom->id[1]);
243 wacom_input_event(wcombo, EV_MSC, MSC_SERIAL, 0xf0); 248 wacom_input_event(wcombo, EV_MSC, MSC_SERIAL, 0xf0);
244 } else if (wacom->id[1]) { 249 } else if (wacom->id[1]) {
245 wacom_input_sync(wcombo); /* sync last event */ 250 if (penData) {
251 wacom_input_sync(wcombo); /* sync last event */
252 if (!wacom->id[0])
253 penData = 0;
254 }
246 wacom->id[1] = 0; 255 wacom->id[1] = 0;
247 wacom_report_key(wcombo, BTN_0, (data[7] & 0x40)); 256 wacom_report_key(wcombo, BTN_0, (data[7] & 0x40));
248 wacom_report_key(wcombo, BTN_4, (data[7] & 0x80)); 257 wacom_report_key(wcombo, BTN_4, (data[7] & 0x80));
258 wacom_report_rel(wcombo, REL_WHEEL, 0);
249 wacom_report_key(wcombo, BTN_TOOL_FINGER, 0); 259 wacom_report_key(wcombo, BTN_TOOL_FINGER, 0);
250 wacom_report_abs(wcombo, ABS_MISC, 0); 260 wacom_report_abs(wcombo, ABS_MISC, 0);
251 wacom_input_event(wcombo, EV_MSC, MSC_SERIAL, 0xf0); 261 wacom_input_event(wcombo, EV_MSC, MSC_SERIAL, 0xf0);
@@ -253,7 +263,11 @@ static int wacom_graphire_irq(struct wacom_wac *wacom, void *wcombo)
253 break; 263 break;
254 case WACOM_MO: 264 case WACOM_MO:
255 if ((data[7] & 0xf8) || (data[8] & 0xff)) { 265 if ((data[7] & 0xf8) || (data[8] & 0xff)) {
256 wacom_input_sync(wcombo); /* sync last event */ 266 if (penData) {
267 wacom_input_sync(wcombo); /* sync last event */
268 if (!wacom->id[0])
269 penData = 0;
270 }
257 wacom->id[1] = PAD_DEVICE_ID; 271 wacom->id[1] = PAD_DEVICE_ID;
258 wacom_report_key(wcombo, BTN_0, (data[7] & 0x08)); 272 wacom_report_key(wcombo, BTN_0, (data[7] & 0x08));
259 wacom_report_key(wcombo, BTN_1, (data[7] & 0x20)); 273 wacom_report_key(wcombo, BTN_1, (data[7] & 0x20));
@@ -264,7 +278,11 @@ static int wacom_graphire_irq(struct wacom_wac *wacom, void *wcombo)
264 wacom_report_abs(wcombo, ABS_MISC, wacom->id[1]); 278 wacom_report_abs(wcombo, ABS_MISC, wacom->id[1]);
265 wacom_input_event(wcombo, EV_MSC, MSC_SERIAL, 0xf0); 279 wacom_input_event(wcombo, EV_MSC, MSC_SERIAL, 0xf0);
266 } else if (wacom->id[1]) { 280 } else if (wacom->id[1]) {
267 wacom_input_sync(wcombo); /* sync last event */ 281 if (penData) {
282 wacom_input_sync(wcombo); /* sync last event */
283 if (!wacom->id[0])
284 penData = 0;
285 }
268 wacom->id[1] = 0; 286 wacom->id[1] = 0;
269 wacom_report_key(wcombo, BTN_0, (data[7] & 0x08)); 287 wacom_report_key(wcombo, BTN_0, (data[7] & 0x08));
270 wacom_report_key(wcombo, BTN_1, (data[7] & 0x20)); 288 wacom_report_key(wcombo, BTN_1, (data[7] & 0x20));
@@ -432,7 +450,8 @@ static int wacom_intuos_irq(struct wacom_wac *wacom, void *wcombo)
432 unsigned int t; 450 unsigned int t;
433 int idx = 0, result; 451 int idx = 0, result;
434 452
435 if (data[0] != 2 && data[0] != 5 && data[0] != 6 && data[0] != 12) { 453 if (data[0] != WACOM_REPORT_PENABLED && data[0] != WACOM_REPORT_INTUOSREAD
454 && data[0] != WACOM_REPORT_INTUOSWRITE && data[0] != WACOM_REPORT_INTUOSPAD) {
436 dbg("wacom_intuos_irq: received unknown report #%d", data[0]); 455 dbg("wacom_intuos_irq: received unknown report #%d", data[0]);
437 return 0; 456 return 0;
438 } 457 }
@@ -442,7 +461,7 @@ static int wacom_intuos_irq(struct wacom_wac *wacom, void *wcombo)
442 idx = data[1] & 0x01; 461 idx = data[1] & 0x01;
443 462
444 /* pad packets. Works as a second tool and is always in prox */ 463 /* pad packets. Works as a second tool and is always in prox */
445 if (data[0] == 12) { 464 if (data[0] == WACOM_REPORT_INTUOSPAD) {
446 /* initiate the pad as a device */ 465 /* initiate the pad as a device */
447 if (wacom->tool[1] != BTN_TOOL_FINGER) 466 if (wacom->tool[1] != BTN_TOOL_FINGER)
448 wacom->tool[1] = BTN_TOOL_FINGER; 467 wacom->tool[1] = BTN_TOOL_FINGER;
@@ -608,95 +627,163 @@ static int wacom_intuos_irq(struct wacom_wac *wacom, void *wcombo)
608 return 1; 627 return 1;
609} 628}
610 629
630
631static void wacom_tpc_finger_in(struct wacom_wac *wacom, void *wcombo, char *data, int idx)
632{
633 wacom_report_abs(wcombo, ABS_X,
634 (data[2 + idx * 2] & 0xff) | ((data[3 + idx * 2] & 0x7f) << 8));
635 wacom_report_abs(wcombo, ABS_Y,
636 (data[6 + idx * 2] & 0xff) | ((data[7 + idx * 2] & 0x7f) << 8));
637 wacom_report_abs(wcombo, ABS_MISC, wacom->id[0]);
638 wacom_report_key(wcombo, wacom->tool[idx], 1);
639 if (idx)
640 wacom_input_event(wcombo, EV_MSC, MSC_SERIAL, 0xf0);
641 else
642 wacom_report_key(wcombo, BTN_TOUCH, 1);
643}
644
645static void wacom_tpc_touch_out(struct wacom_wac *wacom, void *wcombo, int idx)
646{
647 wacom_report_abs(wcombo, ABS_X, 0);
648 wacom_report_abs(wcombo, ABS_Y, 0);
649 wacom_report_abs(wcombo, ABS_MISC, 0);
650 wacom_report_key(wcombo, wacom->tool[idx], 0);
651 if (idx)
652 wacom_input_event(wcombo, EV_MSC, MSC_SERIAL, 0xf0);
653 else
654 wacom_report_key(wcombo, BTN_TOUCH, 0);
655 return;
656}
657
658static void wacom_tpc_touch_in(struct wacom_wac *wacom, void *wcombo)
659{
660 char *data = wacom->data;
661 struct urb *urb = ((struct wacom_combo *)wcombo)->urb;
662 static int firstFinger = 0;
663 static int secondFinger = 0;
664
665 wacom->tool[0] = BTN_TOOL_DOUBLETAP;
666 wacom->id[0] = TOUCH_DEVICE_ID;
667 wacom->tool[1] = BTN_TOOL_TRIPLETAP;
668
669 if (urb->actual_length != WACOM_PKGLEN_TPC1FG) {
670 switch (data[0]) {
671 case WACOM_REPORT_TPC1FG:
672 wacom_report_abs(wcombo, ABS_X, wacom_le16_to_cpu(&data[2]));
673 wacom_report_abs(wcombo, ABS_Y, wacom_le16_to_cpu(&data[4]));
674 wacom_report_abs(wcombo, ABS_PRESSURE, wacom_le16_to_cpu(&data[6]));
675 wacom_report_key(wcombo, BTN_TOUCH, wacom_le16_to_cpu(&data[6]));
676 wacom_report_abs(wcombo, ABS_MISC, wacom->id[0]);
677 wacom_report_key(wcombo, wacom->tool[0], 1);
678 break;
679 case WACOM_REPORT_TPC2FG:
680 /* keep this byte to send proper out-prox event */
681 wacom->id[1] = data[1] & 0x03;
682
683 if (data[1] & 0x01) {
684 wacom_tpc_finger_in(wacom, wcombo, data, 0);
685 firstFinger = 1;
686 } else if (firstFinger) {
687 wacom_tpc_touch_out(wacom, wcombo, 0);
688 }
689
690 if (data[1] & 0x02) {
691 /* sync first finger data */
692 if (firstFinger)
693 wacom_input_sync(wcombo);
694
695 wacom_tpc_finger_in(wacom, wcombo, data, 1);
696 secondFinger = 1;
697 } else if (secondFinger) {
698 /* sync first finger data */
699 if (firstFinger)
700 wacom_input_sync(wcombo);
701
702 wacom_tpc_touch_out(wacom, wcombo, 1);
703 secondFinger = 0;
704 }
705 if (!(data[1] & 0x01))
706 firstFinger = 0;
707 break;
708 }
709 } else {
710 wacom_report_abs(wcombo, ABS_X, wacom_le16_to_cpu(&data[1]));
711 wacom_report_abs(wcombo, ABS_Y, wacom_le16_to_cpu(&data[3]));
712 wacom_report_key(wcombo, BTN_TOUCH, 1);
713 wacom_report_abs(wcombo, ABS_MISC, wacom->id[0]);
714 wacom_report_key(wcombo, wacom->tool[0], 1);
715 }
716 return;
717}
718
611static int wacom_tpc_irq(struct wacom_wac *wacom, void *wcombo) 719static int wacom_tpc_irq(struct wacom_wac *wacom, void *wcombo)
612{ 720{
613 char *data = wacom->data; 721 char *data = wacom->data;
614 int prox = 0, pressure; 722 int prox = 0, pressure, idx = -1;
615 static int stylusInProx, touchInProx = 1, touchOut; 723 static int stylusInProx, touchInProx = 1, touchOut;
616 struct urb *urb = ((struct wacom_combo *)wcombo)->urb; 724 struct urb *urb = ((struct wacom_combo *)wcombo)->urb;
617 725
618 dbg("wacom_tpc_irq: received report #%d", data[0]); 726 dbg("wacom_tpc_irq: received report #%d", data[0]);
619 727
620 if (urb->actual_length == 5 || data[0] == 6) { /* Touch data */ 728 if (urb->actual_length == WACOM_PKGLEN_TPC1FG || /* single touch */
621 if (urb->actual_length == 5) { /* with touch */ 729 data[0] == WACOM_REPORT_TPC1FG || /* single touch */
622 prox = data[0] & 0x03; 730 data[0] == WACOM_REPORT_TPC2FG) { /* 2FG touch */
731 if (urb->actual_length == WACOM_PKGLEN_TPC1FG) { /* with touch */
732 prox = data[0] & 0x01;
623 } else { /* with capacity */ 733 } else { /* with capacity */
624 prox = data[1] & 0x03; 734 if (data[0] == WACOM_REPORT_TPC1FG)
735 /* single touch */
736 prox = data[1] & 0x01;
737 else
738 /* 2FG touch data */
739 prox = data[1] & 0x03;
625 } 740 }
626 741
627 if (!stylusInProx) { /* stylus not in prox */ 742 if (!stylusInProx) { /* stylus not in prox */
628 if (prox) { 743 if (prox) {
629 if (touchInProx) { 744 if (touchInProx) {
630 wacom->tool[1] = BTN_TOOL_DOUBLETAP; 745 wacom_tpc_touch_in(wacom, wcombo);
631 wacom->id[0] = TOUCH_DEVICE_ID;
632 if (urb->actual_length != 5) {
633 wacom_report_abs(wcombo, ABS_X, wacom_le16_to_cpu(&data[2]));
634 wacom_report_abs(wcombo, ABS_Y, wacom_le16_to_cpu(&data[4]));
635 wacom_report_abs(wcombo, ABS_PRESSURE, wacom_le16_to_cpu(&data[6]));
636 wacom_report_key(wcombo, BTN_TOUCH, wacom_le16_to_cpu(&data[6]));
637 } else {
638 wacom_report_abs(wcombo, ABS_X, wacom_le16_to_cpu(&data[1]));
639 wacom_report_abs(wcombo, ABS_Y, wacom_le16_to_cpu(&data[3]));
640 wacom_report_key(wcombo, BTN_TOUCH, 1);
641 }
642 wacom_report_abs(wcombo, ABS_MISC, wacom->id[0]);
643 wacom_report_key(wcombo, wacom->tool[1], prox & 0x01);
644 touchOut = 1; 746 touchOut = 1;
645 return 1; 747 return 1;
646 } 748 }
647 } else { 749 } else {
648 wacom_report_abs(wcombo, ABS_MISC, wacom->id[0]); 750 /* 2FGT out-prox */
649 wacom_report_key(wcombo, wacom->tool[1], prox & 0x01); 751 if (data[0] == WACOM_REPORT_TPC2FG) {
650 wacom_report_key(wcombo, BTN_TOUCH, 0); 752 idx = (wacom->id[1] & 0x01) - 1;
753 if (idx == 0) {
754 wacom_tpc_touch_out(wacom, wcombo, idx);
755 /* sync first finger event */
756 if (wacom->id[1] & 0x02)
757 wacom_input_sync(wcombo);
758 }
759 idx = (wacom->id[1] & 0x02) - 1;
760 if (idx == 1)
761 wacom_tpc_touch_out(wacom, wcombo, idx);
762 } else /* one finger touch */
763 wacom_tpc_touch_out(wacom, wcombo, 0);
651 touchOut = 0; 764 touchOut = 0;
652 touchInProx = 1; 765 touchInProx = 1;
653 return 1; 766 return 1;
654 } 767 }
655 } else if (touchOut || !prox) { /* force touch out-prox */ 768 } else if (touchOut || !prox) { /* force touch out-prox */
656 wacom_report_abs(wcombo, ABS_MISC, TOUCH_DEVICE_ID); 769 wacom_tpc_touch_out(wacom, wcombo, 0);
657 wacom_report_key(wcombo, wacom->tool[1], 0);
658 wacom_report_key(wcombo, BTN_TOUCH, 0);
659 touchOut = 0; 770 touchOut = 0;
660 touchInProx = 1; 771 touchInProx = 1;
661 return 1; 772 return 1;
662 } 773 }
663 } else if (data[0] == 2) { /* Penabled */ 774 } else if (data[0] == WACOM_REPORT_PENABLED) { /* Penabled */
664 prox = data[1] & 0x20; 775 prox = data[1] & 0x20;
665 776
666 touchInProx = 0; 777 touchInProx = 0;
667 778
668 wacom->id[0] = ERASER_DEVICE_ID;
669
670 /*
671 * if going from out of proximity into proximity select between the eraser
672 * and the pen based on the state of the stylus2 button, choose eraser if
673 * pressed else choose pen. if not a proximity change from out to in, send
674 * an out of proximity for previous tool then a in for new tool.
675 */
676 if (prox) { /* in prox */ 779 if (prox) { /* in prox */
677 if (!wacom->tool[0]) { 780 if (!wacom->id[0]) {
678 /* Going into proximity select tool */ 781 /* Going into proximity select tool */
679 wacom->tool[1] = (data[1] & 0x08) ? BTN_TOOL_RUBBER : BTN_TOOL_PEN; 782 wacom->tool[0] = (data[1] & 0x0c) ? BTN_TOOL_RUBBER : BTN_TOOL_PEN;
680 if (wacom->tool[1] == BTN_TOOL_PEN) 783 if (wacom->tool[0] == BTN_TOOL_PEN)
681 wacom->id[0] = STYLUS_DEVICE_ID; 784 wacom->id[0] = STYLUS_DEVICE_ID;
682 } else if (wacom->tool[1] == BTN_TOOL_RUBBER && !(data[1] & 0x08)) { 785 else
683 /* 786 wacom->id[0] = ERASER_DEVICE_ID;
684 * was entered with stylus2 pressed
685 * report out proximity for previous tool
686 */
687 wacom_report_abs(wcombo, ABS_MISC, wacom->id[0]);
688 wacom_report_key(wcombo, wacom->tool[1], 0);
689 wacom_input_sync(wcombo);
690
691 /* set new tool */
692 wacom->tool[1] = BTN_TOOL_PEN;
693 wacom->id[0] = STYLUS_DEVICE_ID;
694 return 0;
695 }
696 if (wacom->tool[1] != BTN_TOOL_RUBBER) {
697 /* Unknown tool selected default to pen tool */
698 wacom->tool[1] = BTN_TOOL_PEN;
699 wacom->id[0] = STYLUS_DEVICE_ID;
700 } 787 }
701 wacom_report_key(wcombo, BTN_STYLUS, data[1] & 0x02); 788 wacom_report_key(wcombo, BTN_STYLUS, data[1] & 0x02);
702 wacom_report_key(wcombo, BTN_STYLUS2, data[1] & 0x10); 789 wacom_report_key(wcombo, BTN_STYLUS2, data[1] & 0x10);
@@ -706,17 +793,21 @@ static int wacom_tpc_irq(struct wacom_wac *wacom, void *wcombo)
706 if (pressure < 0) 793 if (pressure < 0)
707 pressure = wacom->features->pressure_max + pressure + 1; 794 pressure = wacom->features->pressure_max + pressure + 1;
708 wacom_report_abs(wcombo, ABS_PRESSURE, pressure); 795 wacom_report_abs(wcombo, ABS_PRESSURE, pressure);
709 wacom_report_key(wcombo, BTN_TOUCH, pressure); 796 wacom_report_key(wcombo, BTN_TOUCH, data[1] & 0x05);
710 } else { 797 } else {
798 wacom_report_abs(wcombo, ABS_X, 0);
799 wacom_report_abs(wcombo, ABS_Y, 0);
711 wacom_report_abs(wcombo, ABS_PRESSURE, 0); 800 wacom_report_abs(wcombo, ABS_PRESSURE, 0);
712 wacom_report_key(wcombo, BTN_STYLUS, 0); 801 wacom_report_key(wcombo, BTN_STYLUS, 0);
713 wacom_report_key(wcombo, BTN_STYLUS2, 0); 802 wacom_report_key(wcombo, BTN_STYLUS2, 0);
714 wacom_report_key(wcombo, BTN_TOUCH, 0); 803 wacom_report_key(wcombo, BTN_TOUCH, 0);
804 wacom->id[0] = 0;
805 /* pen is out so touch can be enabled now */
806 touchInProx = 1;
715 } 807 }
716 wacom_report_key(wcombo, wacom->tool[1], prox); 808 wacom_report_key(wcombo, wacom->tool[0], prox);
717 wacom_report_abs(wcombo, ABS_MISC, wacom->id[0]); 809 wacom_report_abs(wcombo, ABS_MISC, wacom->id[0]);
718 stylusInProx = prox; 810 stylusInProx = prox;
719 wacom->tool[0] = prox;
720 return 1; 811 return 1;
721 } 812 }
722 return 0; 813 return 0;
@@ -751,6 +842,7 @@ int wacom_wac_irq(struct wacom_wac *wacom_wac, void *wcombo)
751 return wacom_intuos_irq(wacom_wac, wcombo); 842 return wacom_intuos_irq(wacom_wac, wcombo);
752 843
753 case TABLETPC: 844 case TABLETPC:
845 case TABLETPC2FG:
754 return wacom_tpc_irq(wacom_wac, wcombo); 846 return wacom_tpc_irq(wacom_wac, wcombo);
755 847
756 default: 848 default:
@@ -791,9 +883,17 @@ void wacom_init_input_dev(struct input_dev *input_dev, struct wacom_wac *wacom_w
791 input_dev_i4s(input_dev, wacom_wac); 883 input_dev_i4s(input_dev, wacom_wac);
792 input_dev_i(input_dev, wacom_wac); 884 input_dev_i(input_dev, wacom_wac);
793 break; 885 break;
886 case TABLETPC2FG:
887 input_dev_tpc2fg(input_dev, wacom_wac);
888 /* fall through */
889 case TABLETPC:
890 input_dev_tpc(input_dev, wacom_wac);
891 if (wacom_wac->features->device_type != BTN_TOOL_PEN)
892 break; /* no need to process stylus stuff */
893
894 /* fall through */
794 case PL: 895 case PL:
795 case PTU: 896 case PTU:
796 case TABLETPC:
797 input_dev_pl(input_dev, wacom_wac); 897 input_dev_pl(input_dev, wacom_wac);
798 /* fall through */ 898 /* fall through */
799 case PENPARTNER: 899 case PENPARTNER:
@@ -804,66 +904,69 @@ void wacom_init_input_dev(struct input_dev *input_dev, struct wacom_wac *wacom_w
804} 904}
805 905
806static struct wacom_features wacom_features[] = { 906static struct wacom_features wacom_features[] = {
807 { "Wacom Penpartner", 7, 5040, 3780, 255, 0, PENPARTNER }, 907 { "Wacom Penpartner", WACOM_PKGLEN_PENPRTN, 5040, 3780, 255, 0, PENPARTNER },
808 { "Wacom Graphire", 8, 10206, 7422, 511, 63, GRAPHIRE }, 908 { "Wacom Graphire", WACOM_PKGLEN_GRAPHIRE, 10206, 7422, 511, 63, GRAPHIRE },
809 { "Wacom Graphire2 4x5", 8, 10206, 7422, 511, 63, GRAPHIRE }, 909 { "Wacom Graphire2 4x5", WACOM_PKGLEN_GRAPHIRE, 10206, 7422, 511, 63, GRAPHIRE },
810 { "Wacom Graphire2 5x7", 8, 13918, 10206, 511, 63, GRAPHIRE }, 910 { "Wacom Graphire2 5x7", WACOM_PKGLEN_GRAPHIRE, 13918, 10206, 511, 63, GRAPHIRE },
811 { "Wacom Graphire3", 8, 10208, 7424, 511, 63, GRAPHIRE }, 911 { "Wacom Graphire3", WACOM_PKGLEN_GRAPHIRE, 10208, 7424, 511, 63, GRAPHIRE },
812 { "Wacom Graphire3 6x8", 8, 16704, 12064, 511, 63, GRAPHIRE }, 912 { "Wacom Graphire3 6x8", WACOM_PKGLEN_GRAPHIRE, 16704, 12064, 511, 63, GRAPHIRE },
813 { "Wacom Graphire4 4x5", 8, 10208, 7424, 511, 63, WACOM_G4 }, 913 { "Wacom Graphire4 4x5", WACOM_PKGLEN_GRAPHIRE, 10208, 7424, 511, 63, WACOM_G4 },
814 { "Wacom Graphire4 6x8", 8, 16704, 12064, 511, 63, WACOM_G4 }, 914 { "Wacom Graphire4 6x8", WACOM_PKGLEN_GRAPHIRE, 16704, 12064, 511, 63, WACOM_G4 },
815 { "Wacom BambooFun 4x5", 9, 14760, 9225, 511, 63, WACOM_MO }, 915 { "Wacom BambooFun 4x5", WACOM_PKGLEN_BBFUN, 14760, 9225, 511, 63, WACOM_MO },
816 { "Wacom BambooFun 6x8", 9, 21648, 13530, 511, 63, WACOM_MO }, 916 { "Wacom BambooFun 6x8", WACOM_PKGLEN_BBFUN, 21648, 13530, 511, 63, WACOM_MO },
817 { "Wacom Bamboo1 Medium",8, 16704, 12064, 511, 63, GRAPHIRE }, 917 { "Wacom Bamboo1 Medium", WACOM_PKGLEN_GRAPHIRE, 16704, 12064, 511, 63, GRAPHIRE },
818 { "Wacom Volito", 8, 5104, 3712, 511, 63, GRAPHIRE }, 918 { "Wacom Volito", WACOM_PKGLEN_GRAPHIRE, 5104, 3712, 511, 63, GRAPHIRE },
819 { "Wacom PenStation2", 8, 3250, 2320, 255, 63, GRAPHIRE }, 919 { "Wacom PenStation2", WACOM_PKGLEN_GRAPHIRE, 3250, 2320, 255, 63, GRAPHIRE },
820 { "Wacom Volito2 4x5", 8, 5104, 3712, 511, 63, GRAPHIRE }, 920 { "Wacom Volito2 4x5", WACOM_PKGLEN_GRAPHIRE, 5104, 3712, 511, 63, GRAPHIRE },
821 { "Wacom Volito2 2x3", 8, 3248, 2320, 511, 63, GRAPHIRE }, 921 { "Wacom Volito2 2x3", WACOM_PKGLEN_GRAPHIRE, 3248, 2320, 511, 63, GRAPHIRE },
822 { "Wacom PenPartner2", 8, 3250, 2320, 511, 63, GRAPHIRE }, 922 { "Wacom PenPartner2", WACOM_PKGLEN_GRAPHIRE, 3250, 2320, 511, 63, GRAPHIRE },
823 { "Wacom Bamboo", 9, 14760, 9225, 511, 63, WACOM_MO }, 923 { "Wacom Bamboo", WACOM_PKGLEN_BBFUN, 14760, 9225, 511, 63, WACOM_MO },
824 { "Wacom Bamboo1", 8, 5104, 3712, 511, 63, GRAPHIRE }, 924 { "Wacom Bamboo1", WACOM_PKGLEN_GRAPHIRE, 5104, 3712, 511, 63, GRAPHIRE },
825 { "Wacom Intuos 4x5", 10, 12700, 10600, 1023, 31, INTUOS }, 925 { "Wacom Intuos 4x5", WACOM_PKGLEN_INTUOS, 12700, 10600, 1023, 31, INTUOS },
826 { "Wacom Intuos 6x8", 10, 20320, 16240, 1023, 31, INTUOS }, 926 { "Wacom Intuos 6x8", WACOM_PKGLEN_INTUOS, 20320, 16240, 1023, 31, INTUOS },
827 { "Wacom Intuos 9x12", 10, 30480, 24060, 1023, 31, INTUOS }, 927 { "Wacom Intuos 9x12", WACOM_PKGLEN_INTUOS, 30480, 24060, 1023, 31, INTUOS },
828 { "Wacom Intuos 12x12", 10, 30480, 31680, 1023, 31, INTUOS }, 928 { "Wacom Intuos 12x12", WACOM_PKGLEN_INTUOS, 30480, 31680, 1023, 31, INTUOS },
829 { "Wacom Intuos 12x18", 10, 45720, 31680, 1023, 31, INTUOS }, 929 { "Wacom Intuos 12x18", WACOM_PKGLEN_INTUOS, 45720, 31680, 1023, 31, INTUOS },
830 { "Wacom PL400", 8, 5408, 4056, 255, 0, PL }, 930 { "Wacom PL400", WACOM_PKGLEN_GRAPHIRE, 5408, 4056, 255, 0, PL },
831 { "Wacom PL500", 8, 6144, 4608, 255, 0, PL }, 931 { "Wacom PL500", WACOM_PKGLEN_GRAPHIRE, 6144, 4608, 255, 0, PL },
832 { "Wacom PL600", 8, 6126, 4604, 255, 0, PL }, 932 { "Wacom PL600", WACOM_PKGLEN_GRAPHIRE, 6126, 4604, 255, 0, PL },
833 { "Wacom PL600SX", 8, 6260, 5016, 255, 0, PL }, 933 { "Wacom PL600SX", WACOM_PKGLEN_GRAPHIRE, 6260, 5016, 255, 0, PL },
834 { "Wacom PL550", 8, 6144, 4608, 511, 0, PL }, 934 { "Wacom PL550", WACOM_PKGLEN_GRAPHIRE, 6144, 4608, 511, 0, PL },
835 { "Wacom PL800", 8, 7220, 5780, 511, 0, PL }, 935 { "Wacom PL800", WACOM_PKGLEN_GRAPHIRE, 7220, 5780, 511, 0, PL },
836 { "Wacom PL700", 8, 6758, 5406, 511, 0, PL }, 936 { "Wacom PL700", WACOM_PKGLEN_GRAPHIRE, 6758, 5406, 511, 0, PL },
837 { "Wacom PL510", 8, 6282, 4762, 511, 0, PL }, 937 { "Wacom PL510", WACOM_PKGLEN_GRAPHIRE, 6282, 4762, 511, 0, PL },
838 { "Wacom DTU710", 8, 34080, 27660, 511, 0, PL }, 938 { "Wacom DTU710", WACOM_PKGLEN_GRAPHIRE, 34080, 27660, 511, 0, PL },
839 { "Wacom DTF521", 8, 6282, 4762, 511, 0, PL }, 939 { "Wacom DTF521", WACOM_PKGLEN_GRAPHIRE, 6282, 4762, 511, 0, PL },
840 { "Wacom DTF720", 8, 6858, 5506, 511, 0, PL }, 940 { "Wacom DTF720", WACOM_PKGLEN_GRAPHIRE, 6858, 5506, 511, 0, PL },
841 { "Wacom DTF720a", 8, 6858, 5506, 511, 0, PL }, 941 { "Wacom DTF720a", WACOM_PKGLEN_GRAPHIRE, 6858, 5506, 511, 0, PL },
842 { "Wacom Cintiq Partner",8, 20480, 15360, 511, 0, PTU }, 942 { "Wacom Cintiq Partner", WACOM_PKGLEN_GRAPHIRE, 20480, 15360, 511, 0, PTU },
843 { "Wacom Intuos2 4x5", 10, 12700, 10600, 1023, 31, INTUOS }, 943 { "Wacom Intuos2 4x5", WACOM_PKGLEN_INTUOS, 12700, 10600, 1023, 31, INTUOS },
844 { "Wacom Intuos2 6x8", 10, 20320, 16240, 1023, 31, INTUOS }, 944 { "Wacom Intuos2 6x8", WACOM_PKGLEN_INTUOS, 20320, 16240, 1023, 31, INTUOS },
845 { "Wacom Intuos2 9x12", 10, 30480, 24060, 1023, 31, INTUOS }, 945 { "Wacom Intuos2 9x12", WACOM_PKGLEN_INTUOS, 30480, 24060, 1023, 31, INTUOS },
846 { "Wacom Intuos2 12x12", 10, 30480, 31680, 1023, 31, INTUOS }, 946 { "Wacom Intuos2 12x12", WACOM_PKGLEN_INTUOS, 30480, 31680, 1023, 31, INTUOS },
847 { "Wacom Intuos2 12x18", 10, 45720, 31680, 1023, 31, INTUOS }, 947 { "Wacom Intuos2 12x18", WACOM_PKGLEN_INTUOS, 45720, 31680, 1023, 31, INTUOS },
848 { "Wacom Intuos3 4x5", 10, 25400, 20320, 1023, 63, INTUOS3S }, 948 { "Wacom Intuos3 4x5", WACOM_PKGLEN_INTUOS, 25400, 20320, 1023, 63, INTUOS3S },
849 { "Wacom Intuos3 6x8", 10, 40640, 30480, 1023, 63, INTUOS3 }, 949 { "Wacom Intuos3 6x8", WACOM_PKGLEN_INTUOS, 40640, 30480, 1023, 63, INTUOS3 },
850 { "Wacom Intuos3 9x12", 10, 60960, 45720, 1023, 63, INTUOS3 }, 950 { "Wacom Intuos3 9x12", WACOM_PKGLEN_INTUOS, 60960, 45720, 1023, 63, INTUOS3 },
851 { "Wacom Intuos3 12x12", 10, 60960, 60960, 1023, 63, INTUOS3L }, 951 { "Wacom Intuos3 12x12", WACOM_PKGLEN_INTUOS, 60960, 60960, 1023, 63, INTUOS3L },
852 { "Wacom Intuos3 12x19", 10, 97536, 60960, 1023, 63, INTUOS3L }, 952 { "Wacom Intuos3 12x19", WACOM_PKGLEN_INTUOS, 97536, 60960, 1023, 63, INTUOS3L },
853 { "Wacom Intuos3 6x11", 10, 54204, 31750, 1023, 63, INTUOS3 }, 953 { "Wacom Intuos3 6x11", WACOM_PKGLEN_INTUOS, 54204, 31750, 1023, 63, INTUOS3 },
854 { "Wacom Intuos3 4x6", 10, 31496, 19685, 1023, 63, INTUOS3S }, 954 { "Wacom Intuos3 4x6", WACOM_PKGLEN_INTUOS, 31496, 19685, 1023, 63, INTUOS3S },
855 { "Wacom Intuos4 4x6", 10, 31496, 19685, 2047, 63, INTUOS4S }, 955 { "Wacom Intuos4 4x6", WACOM_PKGLEN_INTUOS, 31496, 19685, 2047, 63, INTUOS4S },
856 { "Wacom Intuos4 6x9", 10, 44704, 27940, 2047, 63, INTUOS4 }, 956 { "Wacom Intuos4 6x9", WACOM_PKGLEN_INTUOS, 44704, 27940, 2047, 63, INTUOS4 },
857 { "Wacom Intuos4 8x13", 10, 65024, 40640, 2047, 63, INTUOS4L }, 957 { "Wacom Intuos4 8x13", WACOM_PKGLEN_INTUOS, 65024, 40640, 2047, 63, INTUOS4L },
858 { "Wacom Intuos4 12x19", 10, 97536, 60960, 2047, 63, INTUOS4L }, 958 { "Wacom Intuos4 12x19", WACOM_PKGLEN_INTUOS, 97536, 60960, 2047, 63, INTUOS4L },
859 { "Wacom Cintiq 21UX", 10, 87200, 65600, 1023, 63, CINTIQ }, 959 { "Wacom Cintiq 21UX", WACOM_PKGLEN_INTUOS, 87200, 65600, 1023, 63, CINTIQ },
860 { "Wacom Cintiq 20WSX", 10, 86680, 54180, 1023, 63, WACOM_BEE }, 960 { "Wacom Cintiq 20WSX", WACOM_PKGLEN_INTUOS, 86680, 54180, 1023, 63, WACOM_BEE },
861 { "Wacom Cintiq 12WX", 10, 53020, 33440, 1023, 63, WACOM_BEE }, 961 { "Wacom Cintiq 12WX", WACOM_PKGLEN_INTUOS, 53020, 33440, 1023, 63, WACOM_BEE },
862 { "Wacom DTU1931", 8, 37832, 30305, 511, 0, PL }, 962 { "Wacom DTU1931", WACOM_PKGLEN_GRAPHIRE, 37832, 30305, 511, 0, PL },
863 { "Wacom ISDv4 90", 8, 26202, 16325, 255, 0, TABLETPC }, 963 { "Wacom ISDv4 90", WACOM_PKGLEN_GRAPHIRE, 26202, 16325, 255, 0, TABLETPC },
864 { "Wacom ISDv4 93", 8, 26202, 16325, 255, 0, TABLETPC }, 964 { "Wacom ISDv4 93", WACOM_PKGLEN_GRAPHIRE, 26202, 16325, 255, 0, TABLETPC },
865 { "Wacom ISDv4 9A", 8, 26202, 16325, 255, 0, TABLETPC }, 965 { "Wacom ISDv4 9A", WACOM_PKGLEN_GRAPHIRE, 26202, 16325, 255, 0, TABLETPC },
866 { "Wacom Intuos2 6x8", 10, 20320, 16240, 1023, 31, INTUOS }, 966 { "Wacom ISDv4 9F", WACOM_PKGLEN_PENABLED, 26202, 16325, 255, 0, TABLETPC },
967 { "Wacom ISDv4 E2", WACOM_PKGLEN_TPC2FG, 26202, 16325, 255, 0, TABLETPC2FG },
968 { "Wacom ISDv4 E3", WACOM_PKGLEN_TPC2FG, 26202, 16325, 255, 0, TABLETPC2FG },
969 { "Wacom Intuos2 6x8", WACOM_PKGLEN_INTUOS, 20320, 16240, 1023, 31, INTUOS },
867 { } 970 { }
868}; 971};
869 972
@@ -927,6 +1030,9 @@ static struct usb_device_id wacom_ids[] = {
927 { USB_DEVICE(USB_VENDOR_ID_WACOM, 0x90) }, 1030 { USB_DEVICE(USB_VENDOR_ID_WACOM, 0x90) },
928 { USB_DEVICE(USB_VENDOR_ID_WACOM, 0x93) }, 1031 { USB_DEVICE(USB_VENDOR_ID_WACOM, 0x93) },
929 { USB_DEVICE(USB_VENDOR_ID_WACOM, 0x9A) }, 1032 { USB_DEVICE(USB_VENDOR_ID_WACOM, 0x9A) },
1033 { USB_DEVICE(USB_VENDOR_ID_WACOM, 0x9F) },
1034 { USB_DEVICE(USB_VENDOR_ID_WACOM, 0xE2) },
1035 { USB_DEVICE(USB_VENDOR_ID_WACOM, 0xE3) },
930 { USB_DEVICE(USB_VENDOR_ID_WACOM, 0x47) }, 1036 { USB_DEVICE(USB_VENDOR_ID_WACOM, 0x47) },
931 { } 1037 { }
932}; 1038};
diff --git a/drivers/input/tablet/wacom_wac.h b/drivers/input/tablet/wacom_wac.h
index c10235aba7e5..ee01e1902785 100644
--- a/drivers/input/tablet/wacom_wac.h
+++ b/drivers/input/tablet/wacom_wac.h
@@ -9,12 +9,33 @@
9#ifndef WACOM_WAC_H 9#ifndef WACOM_WAC_H
10#define WACOM_WAC_H 10#define WACOM_WAC_H
11 11
12/* maximum packet length for USB devices */
13#define WACOM_PKGLEN_MAX 32
14
15/* packet length for individual models */
16#define WACOM_PKGLEN_PENPRTN 7
17#define WACOM_PKGLEN_GRAPHIRE 8
18#define WACOM_PKGLEN_BBFUN 9
19#define WACOM_PKGLEN_INTUOS 10
20#define WACOM_PKGLEN_PENABLED 8
21#define WACOM_PKGLEN_TPC1FG 5
22#define WACOM_PKGLEN_TPC2FG 14
23
24/* device IDs */
12#define STYLUS_DEVICE_ID 0x02 25#define STYLUS_DEVICE_ID 0x02
13#define TOUCH_DEVICE_ID 0x03 26#define TOUCH_DEVICE_ID 0x03
14#define CURSOR_DEVICE_ID 0x06 27#define CURSOR_DEVICE_ID 0x06
15#define ERASER_DEVICE_ID 0x0A 28#define ERASER_DEVICE_ID 0x0A
16#define PAD_DEVICE_ID 0x0F 29#define PAD_DEVICE_ID 0x0F
17 30
31/* wacom data packet report IDs */
32#define WACOM_REPORT_PENABLED 2
33#define WACOM_REPORT_INTUOSREAD 5
34#define WACOM_REPORT_INTUOSWRITE 6
35#define WACOM_REPORT_INTUOSPAD 12
36#define WACOM_REPORT_TPC1FG 6
37#define WACOM_REPORT_TPC2FG 13
38
18enum { 39enum {
19 PENPARTNER = 0, 40 PENPARTNER = 0,
20 GRAPHIRE, 41 GRAPHIRE,
@@ -32,6 +53,7 @@ enum {
32 WACOM_BEE, 53 WACOM_BEE,
33 WACOM_MO, 54 WACOM_MO,
34 TABLETPC, 55 TABLETPC,
56 TABLETPC2FG,
35 MAX_TYPE 57 MAX_TYPE
36}; 58};
37 59
@@ -43,8 +65,11 @@ struct wacom_features {
43 int pressure_max; 65 int pressure_max;
44 int distance_max; 66 int distance_max;
45 int type; 67 int type;
46 int touch_x_max; 68 int device_type;
47 int touch_y_max; 69 int x_phy;
70 int y_phy;
71 unsigned char unit;
72 unsigned char unitExpo;
48}; 73};
49 74
50struct wacom_wac { 75struct wacom_wac {
diff --git a/drivers/input/touchscreen/Kconfig b/drivers/input/touchscreen/Kconfig
index 32fc8ba039aa..dfafc76da4fb 100644
--- a/drivers/input/touchscreen/Kconfig
+++ b/drivers/input/touchscreen/Kconfig
@@ -450,6 +450,18 @@ config TOUCHSCREEN_USB_COMPOSITE
450 To compile this driver as a module, choose M here: the 450 To compile this driver as a module, choose M here: the
451 module will be called usbtouchscreen. 451 module will be called usbtouchscreen.
452 452
453config TOUCHSCREEN_MC13783
454 tristate "Freescale MC13783 touchscreen input driver"
455 depends on MFD_MC13783
456 help
457 Say Y here if you have an Freescale MC13783 PMIC on your
458 board and want to use its touchscreen
459
460 If unsure, say N.
461
462 To compile this driver as a module, choose M here: the
463 module will be called mc13783_ts.
464
453config TOUCHSCREEN_USB_EGALAX 465config TOUCHSCREEN_USB_EGALAX
454 default y 466 default y
455 bool "eGalax, eTurboTouch CT-410/510/700 device support" if EMBEDDED 467 bool "eGalax, eTurboTouch CT-410/510/700 device support" if EMBEDDED
diff --git a/drivers/input/touchscreen/Makefile b/drivers/input/touchscreen/Makefile
index f1f59c9e1211..d61a3b4def9a 100644
--- a/drivers/input/touchscreen/Makefile
+++ b/drivers/input/touchscreen/Makefile
@@ -18,6 +18,7 @@ obj-$(CONFIG_TOUCHSCREEN_EETI) += eeti_ts.o
18obj-$(CONFIG_TOUCHSCREEN_ELO) += elo.o 18obj-$(CONFIG_TOUCHSCREEN_ELO) += elo.o
19obj-$(CONFIG_TOUCHSCREEN_FUJITSU) += fujitsu_ts.o 19obj-$(CONFIG_TOUCHSCREEN_FUJITSU) += fujitsu_ts.o
20obj-$(CONFIG_TOUCHSCREEN_INEXIO) += inexio.o 20obj-$(CONFIG_TOUCHSCREEN_INEXIO) += inexio.o
21obj-$(CONFIG_TOUCHSCREEN_MC13783) += mc13783_ts.o
21obj-$(CONFIG_TOUCHSCREEN_MCS5000) += mcs5000_ts.o 22obj-$(CONFIG_TOUCHSCREEN_MCS5000) += mcs5000_ts.o
22obj-$(CONFIG_TOUCHSCREEN_MIGOR) += migor_ts.o 23obj-$(CONFIG_TOUCHSCREEN_MIGOR) += migor_ts.o
23obj-$(CONFIG_TOUCHSCREEN_MTOUCH) += mtouch.o 24obj-$(CONFIG_TOUCHSCREEN_MTOUCH) += mtouch.o
diff --git a/drivers/input/touchscreen/ad7879.c b/drivers/input/touchscreen/ad7879.c
index c21e6d3a8844..794d070c6900 100644
--- a/drivers/input/touchscreen/ad7879.c
+++ b/drivers/input/touchscreen/ad7879.c
@@ -47,6 +47,7 @@
47#include <linux/workqueue.h> 47#include <linux/workqueue.h>
48#include <linux/spi/spi.h> 48#include <linux/spi/spi.h>
49#include <linux/i2c.h> 49#include <linux/i2c.h>
50#include <linux/gpio.h>
50 51
51#include <linux/spi/ad7879.h> 52#include <linux/spi/ad7879.h>
52 53
@@ -132,7 +133,9 @@ struct ad7879 {
132 struct input_dev *input; 133 struct input_dev *input;
133 struct work_struct work; 134 struct work_struct work;
134 struct timer_list timer; 135 struct timer_list timer;
135 136#ifdef CONFIG_GPIOLIB
137 struct gpio_chip gc;
138#endif
136 struct mutex mutex; 139 struct mutex mutex;
137 unsigned disabled:1; /* P: mutex */ 140 unsigned disabled:1; /* P: mutex */
138 141
@@ -150,11 +153,9 @@ struct ad7879 {
150 u8 median; 153 u8 median;
151 u16 x_plate_ohms; 154 u16 x_plate_ohms;
152 u16 pressure_max; 155 u16 pressure_max;
153 u16 gpio_init;
154 u16 cmd_crtl1; 156 u16 cmd_crtl1;
155 u16 cmd_crtl2; 157 u16 cmd_crtl2;
156 u16 cmd_crtl3; 158 u16 cmd_crtl3;
157 unsigned gpio:1;
158}; 159};
159 160
160static int ad7879_read(bus_device *, u8); 161static int ad7879_read(bus_device *, u8);
@@ -237,24 +238,6 @@ static irqreturn_t ad7879_irq(int irq, void *handle)
237 238
238static void ad7879_setup(struct ad7879 *ts) 239static void ad7879_setup(struct ad7879 *ts)
239{ 240{
240 ts->cmd_crtl3 = AD7879_YPLUS_BIT |
241 AD7879_XPLUS_BIT |
242 AD7879_Z2_BIT |
243 AD7879_Z1_BIT |
244 AD7879_TEMPMASK_BIT |
245 AD7879_AUXVBATMASK_BIT |
246 AD7879_GPIOALERTMASK_BIT;
247
248 ts->cmd_crtl2 = AD7879_PM(AD7879_PM_DYN) | AD7879_DFR |
249 AD7879_AVG(ts->averaging) |
250 AD7879_MFS(ts->median) |
251 AD7879_FCD(ts->first_conversion_delay) |
252 ts->gpio_init;
253
254 ts->cmd_crtl1 = AD7879_MODE_INT | AD7879_MODE_SEQ1 |
255 AD7879_ACQ(ts->acquisition_time) |
256 AD7879_TMR(ts->pen_down_acc_interval);
257
258 ad7879_write(ts->bus, AD7879_REG_CTRL2, ts->cmd_crtl2); 241 ad7879_write(ts->bus, AD7879_REG_CTRL2, ts->cmd_crtl2);
259 ad7879_write(ts->bus, AD7879_REG_CTRL3, ts->cmd_crtl3); 242 ad7879_write(ts->bus, AD7879_REG_CTRL3, ts->cmd_crtl3);
260 ad7879_write(ts->bus, AD7879_REG_CTRL1, ts->cmd_crtl1); 243 ad7879_write(ts->bus, AD7879_REG_CTRL1, ts->cmd_crtl1);
@@ -324,48 +307,132 @@ static ssize_t ad7879_disable_store(struct device *dev,
324 307
325static DEVICE_ATTR(disable, 0664, ad7879_disable_show, ad7879_disable_store); 308static DEVICE_ATTR(disable, 0664, ad7879_disable_show, ad7879_disable_store);
326 309
327static ssize_t ad7879_gpio_show(struct device *dev, 310static struct attribute *ad7879_attributes[] = {
328 struct device_attribute *attr, char *buf) 311 &dev_attr_disable.attr,
312 NULL
313};
314
315static const struct attribute_group ad7879_attr_group = {
316 .attrs = ad7879_attributes,
317};
318
319#ifdef CONFIG_GPIOLIB
320static int ad7879_gpio_direction_input(struct gpio_chip *chip,
321 unsigned gpio)
329{ 322{
330 struct ad7879 *ts = dev_get_drvdata(dev); 323 struct ad7879 *ts = container_of(chip, struct ad7879, gc);
324 int err;
331 325
332 return sprintf(buf, "%u\n", ts->gpio); 326 mutex_lock(&ts->mutex);
327 ts->cmd_crtl2 |= AD7879_GPIO_EN | AD7879_GPIODIR | AD7879_GPIOPOL;
328 err = ad7879_write(ts->bus, AD7879_REG_CTRL2, ts->cmd_crtl2);
329 mutex_unlock(&ts->mutex);
330
331 return err;
333} 332}
334 333
335static ssize_t ad7879_gpio_store(struct device *dev, 334static int ad7879_gpio_direction_output(struct gpio_chip *chip,
336 struct device_attribute *attr, 335 unsigned gpio, int level)
337 const char *buf, size_t count)
338{ 336{
339 struct ad7879 *ts = dev_get_drvdata(dev); 337 struct ad7879 *ts = container_of(chip, struct ad7879, gc);
340 unsigned long val; 338 int err;
341 int error;
342 339
343 error = strict_strtoul(buf, 10, &val); 340 mutex_lock(&ts->mutex);
344 if (error) 341 ts->cmd_crtl2 &= ~AD7879_GPIODIR;
345 return error; 342 ts->cmd_crtl2 |= AD7879_GPIO_EN | AD7879_GPIOPOL;
343 if (level)
344 ts->cmd_crtl2 |= AD7879_GPIO_DATA;
345 else
346 ts->cmd_crtl2 &= ~AD7879_GPIO_DATA;
347
348 err = ad7879_write(ts->bus, AD7879_REG_CTRL2, ts->cmd_crtl2);
349 mutex_unlock(&ts->mutex);
350
351 return err;
352}
353
354static int ad7879_gpio_get_value(struct gpio_chip *chip, unsigned gpio)
355{
356 struct ad7879 *ts = container_of(chip, struct ad7879, gc);
357 u16 val;
346 358
347 mutex_lock(&ts->mutex); 359 mutex_lock(&ts->mutex);
348 ts->gpio = !!val; 360 val = ad7879_read(ts->bus, AD7879_REG_CTRL2);
349 error = ad7879_write(ts->bus, AD7879_REG_CTRL2,
350 ts->gpio ?
351 ts->cmd_crtl2 & ~AD7879_GPIO_DATA :
352 ts->cmd_crtl2 | AD7879_GPIO_DATA);
353 mutex_unlock(&ts->mutex); 361 mutex_unlock(&ts->mutex);
354 362
355 return error ? : count; 363 return !!(val & AD7879_GPIO_DATA);
356} 364}
357 365
358static DEVICE_ATTR(gpio, 0664, ad7879_gpio_show, ad7879_gpio_store); 366static void ad7879_gpio_set_value(struct gpio_chip *chip,
367 unsigned gpio, int value)
368{
369 struct ad7879 *ts = container_of(chip, struct ad7879, gc);
359 370
360static struct attribute *ad7879_attributes[] = { 371 mutex_lock(&ts->mutex);
361 &dev_attr_disable.attr, 372 if (value)
362 &dev_attr_gpio.attr, 373 ts->cmd_crtl2 |= AD7879_GPIO_DATA;
363 NULL 374 else
364}; 375 ts->cmd_crtl2 &= ~AD7879_GPIO_DATA;
365 376
366static const struct attribute_group ad7879_attr_group = { 377 ad7879_write(ts->bus, AD7879_REG_CTRL2, ts->cmd_crtl2);
367 .attrs = ad7879_attributes, 378 mutex_unlock(&ts->mutex);
368}; 379}
380
381static int __devinit ad7879_gpio_add(struct device *dev)
382{
383 struct ad7879 *ts = dev_get_drvdata(dev);
384 struct ad7879_platform_data *pdata = dev->platform_data;
385 int ret = 0;
386
387 if (pdata->gpio_export) {
388 ts->gc.direction_input = ad7879_gpio_direction_input;
389 ts->gc.direction_output = ad7879_gpio_direction_output;
390 ts->gc.get = ad7879_gpio_get_value;
391 ts->gc.set = ad7879_gpio_set_value;
392 ts->gc.can_sleep = 1;
393 ts->gc.base = pdata->gpio_base;
394 ts->gc.ngpio = 1;
395 ts->gc.label = "AD7879-GPIO";
396 ts->gc.owner = THIS_MODULE;
397 ts->gc.dev = dev;
398
399 ret = gpiochip_add(&ts->gc);
400 if (ret)
401 dev_err(dev, "failed to register gpio %d\n",
402 ts->gc.base);
403 }
404
405 return ret;
406}
407
408/*
409 * We mark ad7879_gpio_remove inline so there is a chance the code
410 * gets discarded when not needed. We can't do __devinit/__devexit
411 * markup since it is used in both probe and remove methods.
412 */
413static inline void ad7879_gpio_remove(struct device *dev)
414{
415 struct ad7879 *ts = dev_get_drvdata(dev);
416 struct ad7879_platform_data *pdata = dev->platform_data;
417 int ret;
418
419 if (pdata->gpio_export) {
420 ret = gpiochip_remove(&ts->gc);
421 if (ret)
422 dev_err(dev, "failed to remove gpio %d\n",
423 ts->gc.base);
424 }
425}
426#else
427static inline int ad7879_gpio_add(struct device *dev)
428{
429 return 0;
430}
431
432static inline void ad7879_gpio_remove(struct device *dev)
433{
434}
435#endif
369 436
370static int __devinit ad7879_construct(bus_device *bus, struct ad7879 *ts) 437static int __devinit ad7879_construct(bus_device *bus, struct ad7879 *ts)
371{ 438{
@@ -403,12 +470,6 @@ static int __devinit ad7879_construct(bus_device *bus, struct ad7879 *ts)
403 ts->pen_down_acc_interval = pdata->pen_down_acc_interval; 470 ts->pen_down_acc_interval = pdata->pen_down_acc_interval;
404 ts->median = pdata->median; 471 ts->median = pdata->median;
405 472
406 if (pdata->gpio_output)
407 ts->gpio_init = AD7879_GPIO_EN |
408 (pdata->gpio_default ? 0 : AD7879_GPIO_DATA);
409 else
410 ts->gpio_init = AD7879_GPIO_EN | AD7879_GPIODIR;
411
412 snprintf(ts->phys, sizeof(ts->phys), "%s/input0", dev_name(&bus->dev)); 473 snprintf(ts->phys, sizeof(ts->phys), "%s/input0", dev_name(&bus->dev));
413 474
414 input_dev->name = "AD7879 Touchscreen"; 475 input_dev->name = "AD7879 Touchscreen";
@@ -446,6 +507,23 @@ static int __devinit ad7879_construct(bus_device *bus, struct ad7879 *ts)
446 goto err_free_mem; 507 goto err_free_mem;
447 } 508 }
448 509
510 ts->cmd_crtl3 = AD7879_YPLUS_BIT |
511 AD7879_XPLUS_BIT |
512 AD7879_Z2_BIT |
513 AD7879_Z1_BIT |
514 AD7879_TEMPMASK_BIT |
515 AD7879_AUXVBATMASK_BIT |
516 AD7879_GPIOALERTMASK_BIT;
517
518 ts->cmd_crtl2 = AD7879_PM(AD7879_PM_DYN) | AD7879_DFR |
519 AD7879_AVG(ts->averaging) |
520 AD7879_MFS(ts->median) |
521 AD7879_FCD(ts->first_conversion_delay);
522
523 ts->cmd_crtl1 = AD7879_MODE_INT | AD7879_MODE_SEQ1 |
524 AD7879_ACQ(ts->acquisition_time) |
525 AD7879_TMR(ts->pen_down_acc_interval);
526
449 ad7879_setup(ts); 527 ad7879_setup(ts);
450 528
451 err = request_irq(bus->irq, ad7879_irq, 529 err = request_irq(bus->irq, ad7879_irq,
@@ -460,15 +538,21 @@ static int __devinit ad7879_construct(bus_device *bus, struct ad7879 *ts)
460 if (err) 538 if (err)
461 goto err_free_irq; 539 goto err_free_irq;
462 540
463 err = input_register_device(input_dev); 541 err = ad7879_gpio_add(&bus->dev);
464 if (err) 542 if (err)
465 goto err_remove_attr; 543 goto err_remove_attr;
466 544
545 err = input_register_device(input_dev);
546 if (err)
547 goto err_remove_gpio;
548
467 dev_info(&bus->dev, "Rev.%d touchscreen, irq %d\n", 549 dev_info(&bus->dev, "Rev.%d touchscreen, irq %d\n",
468 revid >> 8, bus->irq); 550 revid >> 8, bus->irq);
469 551
470 return 0; 552 return 0;
471 553
554err_remove_gpio:
555 ad7879_gpio_remove(&bus->dev);
472err_remove_attr: 556err_remove_attr:
473 sysfs_remove_group(&bus->dev.kobj, &ad7879_attr_group); 557 sysfs_remove_group(&bus->dev.kobj, &ad7879_attr_group);
474err_free_irq: 558err_free_irq:
@@ -481,6 +565,7 @@ err_free_mem:
481 565
482static int __devexit ad7879_destroy(bus_device *bus, struct ad7879 *ts) 566static int __devexit ad7879_destroy(bus_device *bus, struct ad7879 *ts)
483{ 567{
568 ad7879_gpio_remove(&bus->dev);
484 ad7879_disable(ts); 569 ad7879_disable(ts);
485 sysfs_remove_group(&ts->bus->dev.kobj, &ad7879_attr_group); 570 sysfs_remove_group(&ts->bus->dev.kobj, &ad7879_attr_group);
486 free_irq(ts->bus->irq, ts); 571 free_irq(ts->bus->irq, ts);
diff --git a/drivers/input/touchscreen/mc13783_ts.c b/drivers/input/touchscreen/mc13783_ts.c
new file mode 100644
index 000000000000..be115b3b65eb
--- /dev/null
+++ b/drivers/input/touchscreen/mc13783_ts.c
@@ -0,0 +1,258 @@
1/*
2 * Driver for the Freescale Semiconductor MC13783 touchscreen.
3 *
4 * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved.
5 * Copyright (C) 2009 Sascha Hauer, Pengutronix
6 *
7 * Initial development of this code was funded by
8 * Phytec Messtechnik GmbH, http://www.phytec.de/
9 *
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License version 2 as published by
12 * the Free Software Foundation.
13 */
14#include <linux/platform_device.h>
15#include <linux/mfd/mc13783.h>
16#include <linux/kernel.h>
17#include <linux/module.h>
18#include <linux/input.h>
19#include <linux/sched.h>
20#include <linux/init.h>
21
22#define MC13783_TS_NAME "mc13783-ts"
23
24#define DEFAULT_SAMPLE_TOLERANCE 300
25
26static unsigned int sample_tolerance = DEFAULT_SAMPLE_TOLERANCE;
27module_param(sample_tolerance, uint, S_IRUGO | S_IWUSR);
28MODULE_PARM_DESC(sample_tolerance,
29 "If the minimal and maximal value read out for one axis (out "
30 "of three) differ by this value (default: "
31 __stringify(DEFAULT_SAMPLE_TOLERANCE) ") or more, the reading "
32 "is supposed to be wrong and is discarded. Set to 0 to "
33 "disable this check.");
34
35struct mc13783_ts_priv {
36 struct input_dev *idev;
37 struct mc13783 *mc13783;
38 struct delayed_work work;
39 struct workqueue_struct *workq;
40 unsigned int sample[4];
41};
42
43static irqreturn_t mc13783_ts_handler(int irq, void *data)
44{
45 struct mc13783_ts_priv *priv = data;
46
47 mc13783_ackirq(priv->mc13783, irq);
48
49 /*
50 * Kick off reading coordinates. Note that if work happens already
51 * be queued for future execution (it rearms itself) it will not
52 * be rescheduled for immediate execution here. However the rearm
53 * delay is HZ / 50 which is acceptable.
54 */
55 queue_delayed_work(priv->workq, &priv->work, 0);
56
57 return IRQ_HANDLED;
58}
59
60#define sort3(a0, a1, a2) ({ \
61 if (a0 > a1) \
62 swap(a0, a1); \
63 if (a1 > a2) \
64 swap(a1, a2); \
65 if (a0 > a1) \
66 swap(a0, a1); \
67 })
68
69static void mc13783_ts_report_sample(struct mc13783_ts_priv *priv)
70{
71 struct input_dev *idev = priv->idev;
72 int x0, x1, x2, y0, y1, y2;
73 int cr0, cr1;
74
75 /*
76 * the values are 10-bit wide only, but the two least significant
77 * bits are for future 12 bit use and reading yields 0
78 */
79 x0 = priv->sample[0] & 0xfff;
80 x1 = priv->sample[1] & 0xfff;
81 x2 = priv->sample[2] & 0xfff;
82 y0 = priv->sample[3] & 0xfff;
83 y1 = (priv->sample[0] >> 12) & 0xfff;
84 y2 = (priv->sample[1] >> 12) & 0xfff;
85 cr0 = (priv->sample[2] >> 12) & 0xfff;
86 cr1 = (priv->sample[3] >> 12) & 0xfff;
87
88 dev_dbg(&idev->dev,
89 "x: (% 4d,% 4d,% 4d) y: (% 4d, % 4d,% 4d) cr: (% 4d, % 4d)\n",
90 x0, x1, x2, y0, y1, y2, cr0, cr1);
91
92 sort3(x0, x1, x2);
93 sort3(y0, y1, y2);
94
95 cr0 = (cr0 + cr1) / 2;
96
97 if (!cr0 || !sample_tolerance ||
98 (x2 - x0 < sample_tolerance &&
99 y2 - y0 < sample_tolerance)) {
100 /* report the median coordinate and average pressure */
101 if (cr0) {
102 input_report_abs(idev, ABS_X, x1);
103 input_report_abs(idev, ABS_Y, y1);
104
105 dev_dbg(&idev->dev, "report (%d, %d, %d)\n",
106 x1, y1, 0x1000 - cr0);
107 queue_delayed_work(priv->workq, &priv->work, HZ / 50);
108 } else
109 dev_dbg(&idev->dev, "report release\n");
110
111 input_report_abs(idev, ABS_PRESSURE,
112 cr0 ? 0x1000 - cr0 : cr0);
113 input_report_key(idev, BTN_TOUCH, cr0);
114 input_sync(idev);
115 } else
116 dev_dbg(&idev->dev, "discard event\n");
117}
118
119static void mc13783_ts_work(struct work_struct *work)
120{
121 struct mc13783_ts_priv *priv =
122 container_of(work, struct mc13783_ts_priv, work.work);
123 unsigned int mode = MC13783_ADC_MODE_TS;
124 unsigned int channel = 12;
125
126 if (mc13783_adc_do_conversion(priv->mc13783,
127 mode, channel, priv->sample) == 0)
128 mc13783_ts_report_sample(priv);
129}
130
131static int mc13783_ts_open(struct input_dev *dev)
132{
133 struct mc13783_ts_priv *priv = input_get_drvdata(dev);
134 int ret;
135
136 mc13783_lock(priv->mc13783);
137
138 mc13783_ackirq(priv->mc13783, MC13783_IRQ_TS);
139
140 ret = mc13783_irq_request(priv->mc13783, MC13783_IRQ_TS,
141 mc13783_ts_handler, MC13783_TS_NAME, priv);
142 if (ret)
143 goto out;
144
145 ret = mc13783_reg_rmw(priv->mc13783, MC13783_ADC0,
146 MC13783_ADC0_TSMOD_MASK, MC13783_ADC0_TSMOD0);
147 if (ret)
148 mc13783_irq_free(priv->mc13783, MC13783_IRQ_TS, priv);
149out:
150 mc13783_unlock(priv->mc13783);
151 return ret;
152}
153
154static void mc13783_ts_close(struct input_dev *dev)
155{
156 struct mc13783_ts_priv *priv = input_get_drvdata(dev);
157
158 mc13783_lock(priv->mc13783);
159 mc13783_reg_rmw(priv->mc13783, MC13783_ADC0,
160 MC13783_ADC0_TSMOD_MASK, 0);
161 mc13783_irq_free(priv->mc13783, MC13783_IRQ_TS, priv);
162 mc13783_unlock(priv->mc13783);
163
164 cancel_delayed_work_sync(&priv->work);
165}
166
167static int __init mc13783_ts_probe(struct platform_device *pdev)
168{
169 struct mc13783_ts_priv *priv;
170 struct input_dev *idev;
171 int ret = -ENOMEM;
172
173 priv = kzalloc(sizeof(*priv), GFP_KERNEL);
174 idev = input_allocate_device();
175 if (!priv || !idev)
176 goto err_free_mem;
177
178 INIT_DELAYED_WORK(&priv->work, mc13783_ts_work);
179 priv->mc13783 = dev_get_drvdata(pdev->dev.parent);
180 priv->idev = idev;
181
182 /*
183 * We need separate workqueue because mc13783_adc_do_conversion
184 * uses keventd and thus would deadlock.
185 */
186 priv->workq = create_singlethread_workqueue("mc13783_ts");
187 if (!priv->workq)
188 goto err_free_mem;
189
190 idev->name = MC13783_TS_NAME;
191 idev->dev.parent = &pdev->dev;
192
193 idev->evbit[0] = BIT_MASK(EV_KEY) | BIT_MASK(EV_ABS);
194 idev->keybit[BIT_WORD(BTN_TOUCH)] = BIT_MASK(BTN_TOUCH);
195 input_set_abs_params(idev, ABS_X, 0, 0xfff, 0, 0);
196 input_set_abs_params(idev, ABS_Y, 0, 0xfff, 0, 0);
197 input_set_abs_params(idev, ABS_PRESSURE, 0, 0xfff, 0, 0);
198
199 idev->open = mc13783_ts_open;
200 idev->close = mc13783_ts_close;
201
202 input_set_drvdata(idev, priv);
203
204 ret = input_register_device(priv->idev);
205 if (ret) {
206 dev_err(&pdev->dev,
207 "register input device failed with %d\n", ret);
208 goto err_destroy_wq;
209 }
210
211 platform_set_drvdata(pdev, priv);
212 return 0;
213
214err_destroy_wq:
215 destroy_workqueue(priv->workq);
216err_free_mem:
217 input_free_device(idev);
218 kfree(priv);
219 return ret;
220}
221
222static int __devexit mc13783_ts_remove(struct platform_device *pdev)
223{
224 struct mc13783_ts_priv *priv = platform_get_drvdata(pdev);
225
226 platform_set_drvdata(pdev, NULL);
227
228 destroy_workqueue(priv->workq);
229 input_unregister_device(priv->idev);
230 kfree(priv);
231
232 return 0;
233}
234
235static struct platform_driver mc13783_ts_driver = {
236 .remove = __devexit_p(mc13783_ts_remove),
237 .driver = {
238 .owner = THIS_MODULE,
239 .name = MC13783_TS_NAME,
240 },
241};
242
243static int __init mc13783_ts_init(void)
244{
245 return platform_driver_probe(&mc13783_ts_driver, &mc13783_ts_probe);
246}
247module_init(mc13783_ts_init);
248
249static void __exit mc13783_ts_exit(void)
250{
251 platform_driver_unregister(&mc13783_ts_driver);
252}
253module_exit(mc13783_ts_exit);
254
255MODULE_DESCRIPTION("MC13783 input touchscreen driver");
256MODULE_AUTHOR("Sascha Hauer <s.hauer@pengutronix.de>");
257MODULE_LICENSE("GPL v2");
258MODULE_ALIAS("platform:" MC13783_TS_NAME);
diff --git a/drivers/input/touchscreen/usbtouchscreen.c b/drivers/input/touchscreen/usbtouchscreen.c
index 09a5e7341bd5..5256123a5228 100644
--- a/drivers/input/touchscreen/usbtouchscreen.c
+++ b/drivers/input/touchscreen/usbtouchscreen.c
@@ -618,8 +618,8 @@ static int idealtek_read_data(struct usbtouch_usb *dev, unsigned char *pkt)
618#ifdef CONFIG_TOUCHSCREEN_USB_GENERAL_TOUCH 618#ifdef CONFIG_TOUCHSCREEN_USB_GENERAL_TOUCH
619static int general_touch_read_data(struct usbtouch_usb *dev, unsigned char *pkt) 619static int general_touch_read_data(struct usbtouch_usb *dev, unsigned char *pkt)
620{ 620{
621 dev->x = ((pkt[2] & 0x0F) << 8) | pkt[1] ; 621 dev->x = (pkt[2] << 8) | pkt[1];
622 dev->y = ((pkt[4] & 0x0F) << 8) | pkt[3] ; 622 dev->y = (pkt[4] << 8) | pkt[3];
623 dev->press = pkt[5] & 0xff; 623 dev->press = pkt[5] & 0xff;
624 dev->touch = pkt[0] & 0x01; 624 dev->touch = pkt[0] & 0x01;
625 625
@@ -809,9 +809,9 @@ static struct usbtouch_device_info usbtouch_dev_info[] = {
809#ifdef CONFIG_TOUCHSCREEN_USB_GENERAL_TOUCH 809#ifdef CONFIG_TOUCHSCREEN_USB_GENERAL_TOUCH
810 [DEVTYPE_GENERAL_TOUCH] = { 810 [DEVTYPE_GENERAL_TOUCH] = {
811 .min_xc = 0x0, 811 .min_xc = 0x0,
812 .max_xc = 0x0500, 812 .max_xc = 0x7fff,
813 .min_yc = 0x0, 813 .min_yc = 0x0,
814 .max_yc = 0x0500, 814 .max_yc = 0x7fff,
815 .rept_size = 7, 815 .rept_size = 7,
816 .read_data = general_touch_read_data, 816 .read_data = general_touch_read_data,
817 }, 817 },
diff --git a/drivers/isdn/hardware/mISDN/hfcmulti.c b/drivers/isdn/hardware/mISDN/hfcmulti.c
index a6624ad252c5..1a1420d7a828 100644
--- a/drivers/isdn/hardware/mISDN/hfcmulti.c
+++ b/drivers/isdn/hardware/mISDN/hfcmulti.c
@@ -3152,7 +3152,7 @@ static void
3152hfcmulti_pcm(struct hfc_multi *hc, int ch, int slot_tx, int bank_tx, 3152hfcmulti_pcm(struct hfc_multi *hc, int ch, int slot_tx, int bank_tx,
3153 int slot_rx, int bank_rx) 3153 int slot_rx, int bank_rx)
3154{ 3154{
3155 if (slot_rx < 0 || slot_rx < 0 || bank_tx < 0 || bank_rx < 0) { 3155 if (slot_tx < 0 || slot_rx < 0 || bank_tx < 0 || bank_rx < 0) {
3156 /* disable PCM */ 3156 /* disable PCM */
3157 mode_hfcmulti(hc, ch, hc->chan[ch].protocol, -1, 0, -1, 0); 3157 mode_hfcmulti(hc, ch, hc->chan[ch].protocol, -1, 0, -1, 0);
3158 return; 3158 return;
diff --git a/drivers/isdn/mISDN/l1oip_core.c b/drivers/isdn/mISDN/l1oip_core.c
index 7e5f30dbc0a0..f1e8af54dff0 100644
--- a/drivers/isdn/mISDN/l1oip_core.c
+++ b/drivers/isdn/mISDN/l1oip_core.c
@@ -661,7 +661,7 @@ l1oip_socket_thread(void *data)
661 size_t recvbuf_size = 1500; 661 size_t recvbuf_size = 1500;
662 int recvlen; 662 int recvlen;
663 struct socket *socket = NULL; 663 struct socket *socket = NULL;
664 DECLARE_COMPLETION(wait); 664 DECLARE_COMPLETION_ONSTACK(wait);
665 665
666 /* allocate buffer memory */ 666 /* allocate buffer memory */
667 recvbuf = kmalloc(recvbuf_size, GFP_KERNEL); 667 recvbuf = kmalloc(recvbuf_size, GFP_KERNEL);
diff --git a/drivers/leds/Kconfig b/drivers/leds/Kconfig
index e4f599f20e38..8a0e1ec95e4a 100644
--- a/drivers/leds/Kconfig
+++ b/drivers/leds/Kconfig
@@ -229,6 +229,12 @@ config LEDS_PWM
229 help 229 help
230 This option enables support for pwm driven LEDs 230 This option enables support for pwm driven LEDs
231 231
232config LEDS_REGULATOR
233 tristate "REGULATOR driven LED support"
234 depends on LEDS_CLASS && REGULATOR
235 help
236 This option enables support for regulator driven LEDs.
237
232config LEDS_BD2802 238config LEDS_BD2802
233 tristate "LED driver for BD2802 RGB LED" 239 tristate "LED driver for BD2802 RGB LED"
234 depends on LEDS_CLASS && I2C 240 depends on LEDS_CLASS && I2C
@@ -236,6 +242,33 @@ config LEDS_BD2802
236 This option enables support for BD2802GU RGB LED driver chips 242 This option enables support for BD2802GU RGB LED driver chips
237 accessed via the I2C bus. 243 accessed via the I2C bus.
238 244
245config LEDS_INTEL_SS4200
246 tristate "LED driver for Intel NAS SS4200 series"
247 depends on LEDS_CLASS && PCI && DMI
248 help
249 This option enables support for the Intel SS4200 series of
250 Network Attached Storage servers. You may control the hard
251 drive or power LEDs on the front panel. Using this driver
252 can stop the front LED from blinking after startup.
253
254config LEDS_LT3593
255 tristate "LED driver for LT3593 controllers"
256 depends on LEDS_CLASS && GENERIC_GPIO
257 help
258 This option enables support for LEDs driven by a Linear Technology
259 LT3593 controller. This controller uses a special one-wire pulse
260 coding protocol to set the brightness.
261
262config LEDS_ADP5520
263 tristate "LED Support for ADP5520/ADP5501 PMIC"
264 depends on LEDS_CLASS && PMIC_ADP5520
265 help
266 This option enables support for on-chip LED drivers found
267 on Analog Devices ADP5520/ADP5501 PMICs.
268
269 To compile this driver as a module, choose M here: the module will
270 be called leds-adp5520.
271
239comment "LED Triggers" 272comment "LED Triggers"
240 273
241config LEDS_TRIGGERS 274config LEDS_TRIGGERS
diff --git a/drivers/leds/Makefile b/drivers/leds/Makefile
index 46d72704d606..9e63869d7c0d 100644
--- a/drivers/leds/Makefile
+++ b/drivers/leds/Makefile
@@ -29,6 +29,10 @@ obj-$(CONFIG_LEDS_DA903X) += leds-da903x.o
29obj-$(CONFIG_LEDS_WM831X_STATUS) += leds-wm831x-status.o 29obj-$(CONFIG_LEDS_WM831X_STATUS) += leds-wm831x-status.o
30obj-$(CONFIG_LEDS_WM8350) += leds-wm8350.o 30obj-$(CONFIG_LEDS_WM8350) += leds-wm8350.o
31obj-$(CONFIG_LEDS_PWM) += leds-pwm.o 31obj-$(CONFIG_LEDS_PWM) += leds-pwm.o
32obj-$(CONFIG_LEDS_REGULATOR) += leds-regulator.o
33obj-$(CONFIG_LEDS_INTEL_SS4200) += leds-ss4200.o
34obj-$(CONFIG_LEDS_LT3593) += leds-lt3593.o
35obj-$(CONFIG_LEDS_ADP5520) += leds-adp5520.o
32 36
33# LED SPI Drivers 37# LED SPI Drivers
34obj-$(CONFIG_LEDS_DAC124S085) += leds-dac124s085.o 38obj-$(CONFIG_LEDS_DAC124S085) += leds-dac124s085.o
diff --git a/drivers/leds/leds-adp5520.c b/drivers/leds/leds-adp5520.c
new file mode 100644
index 000000000000..a8f315902131
--- /dev/null
+++ b/drivers/leds/leds-adp5520.c
@@ -0,0 +1,230 @@
1/*
2 * LEDs driver for Analog Devices ADP5520/ADP5501 MFD PMICs
3 *
4 * Copyright 2009 Analog Devices Inc.
5 *
6 * Loosely derived from leds-da903x:
7 * Copyright (C) 2008 Compulab, Ltd.
8 * Mike Rapoport <mike@compulab.co.il>
9 *
10 * Copyright (C) 2006-2008 Marvell International Ltd.
11 * Eric Miao <eric.miao@marvell.com>
12 *
13 * Licensed under the GPL-2 or later.
14 */
15
16#include <linux/module.h>
17#include <linux/kernel.h>
18#include <linux/init.h>
19#include <linux/platform_device.h>
20#include <linux/leds.h>
21#include <linux/workqueue.h>
22#include <linux/mfd/adp5520.h>
23
24struct adp5520_led {
25 struct led_classdev cdev;
26 struct work_struct work;
27 struct device *master;
28 enum led_brightness new_brightness;
29 int id;
30 int flags;
31};
32
33static void adp5520_led_work(struct work_struct *work)
34{
35 struct adp5520_led *led = container_of(work, struct adp5520_led, work);
36 adp5520_write(led->master, ADP5520_LED1_CURRENT + led->id - 1,
37 led->new_brightness >> 2);
38}
39
40static void adp5520_led_set(struct led_classdev *led_cdev,
41 enum led_brightness value)
42{
43 struct adp5520_led *led;
44
45 led = container_of(led_cdev, struct adp5520_led, cdev);
46 led->new_brightness = value;
47 schedule_work(&led->work);
48}
49
50static int adp5520_led_setup(struct adp5520_led *led)
51{
52 struct device *dev = led->master;
53 int flags = led->flags;
54 int ret = 0;
55
56 switch (led->id) {
57 case FLAG_ID_ADP5520_LED1_ADP5501_LED0:
58 ret |= adp5520_set_bits(dev, ADP5520_LED_TIME,
59 (flags >> ADP5520_FLAG_OFFT_SHIFT) &
60 ADP5520_FLAG_OFFT_MASK);
61 ret |= adp5520_set_bits(dev, ADP5520_LED_CONTROL,
62 ADP5520_LED1_EN);
63 break;
64 case FLAG_ID_ADP5520_LED2_ADP5501_LED1:
65 ret |= adp5520_set_bits(dev, ADP5520_LED_TIME,
66 ((flags >> ADP5520_FLAG_OFFT_SHIFT) &
67 ADP5520_FLAG_OFFT_MASK) << 2);
68 ret |= adp5520_clr_bits(dev, ADP5520_LED_CONTROL,
69 ADP5520_R3_MODE);
70 ret |= adp5520_set_bits(dev, ADP5520_LED_CONTROL,
71 ADP5520_LED2_EN);
72 break;
73 case FLAG_ID_ADP5520_LED3_ADP5501_LED2:
74 ret |= adp5520_set_bits(dev, ADP5520_LED_TIME,
75 ((flags >> ADP5520_FLAG_OFFT_SHIFT) &
76 ADP5520_FLAG_OFFT_MASK) << 4);
77 ret |= adp5520_clr_bits(dev, ADP5520_LED_CONTROL,
78 ADP5520_C3_MODE);
79 ret |= adp5520_set_bits(dev, ADP5520_LED_CONTROL,
80 ADP5520_LED3_EN);
81 break;
82 }
83
84 return ret;
85}
86
87static int __devinit adp5520_led_prepare(struct platform_device *pdev)
88{
89 struct adp5520_leds_platform_data *pdata = pdev->dev.platform_data;
90 struct device *dev = pdev->dev.parent;
91 int ret = 0;
92
93 ret |= adp5520_write(dev, ADP5520_LED1_CURRENT, 0);
94 ret |= adp5520_write(dev, ADP5520_LED2_CURRENT, 0);
95 ret |= adp5520_write(dev, ADP5520_LED3_CURRENT, 0);
96 ret |= adp5520_write(dev, ADP5520_LED_TIME, pdata->led_on_time << 6);
97 ret |= adp5520_write(dev, ADP5520_LED_FADE, FADE_VAL(pdata->fade_in,
98 pdata->fade_out));
99
100 return ret;
101}
102
103static int __devinit adp5520_led_probe(struct platform_device *pdev)
104{
105 struct adp5520_leds_platform_data *pdata = pdev->dev.platform_data;
106 struct adp5520_led *led, *led_dat;
107 struct led_info *cur_led;
108 int ret, i;
109
110 if (pdata == NULL) {
111 dev_err(&pdev->dev, "missing platform data\n");
112 return -ENODEV;
113 }
114
115 if (pdata->num_leds > ADP5520_01_MAXLEDS) {
116 dev_err(&pdev->dev, "can't handle more than %d LEDS\n",
117 ADP5520_01_MAXLEDS);
118 return -EFAULT;
119 }
120
121 led = kzalloc(sizeof(*led) * pdata->num_leds, GFP_KERNEL);
122 if (led == NULL) {
123 dev_err(&pdev->dev, "failed to alloc memory\n");
124 return -ENOMEM;
125 }
126
127 ret = adp5520_led_prepare(pdev);
128
129 if (ret) {
130 dev_err(&pdev->dev, "failed to write\n");
131 goto err_free;
132 }
133
134 for (i = 0; i < pdata->num_leds; ++i) {
135 cur_led = &pdata->leds[i];
136 led_dat = &led[i];
137
138 led_dat->cdev.name = cur_led->name;
139 led_dat->cdev.default_trigger = cur_led->default_trigger;
140 led_dat->cdev.brightness_set = adp5520_led_set;
141 led_dat->cdev.brightness = LED_OFF;
142
143 if (cur_led->flags & ADP5520_FLAG_LED_MASK)
144 led_dat->flags = cur_led->flags;
145 else
146 led_dat->flags = i + 1;
147
148 led_dat->id = led_dat->flags & ADP5520_FLAG_LED_MASK;
149
150 led_dat->master = pdev->dev.parent;
151 led_dat->new_brightness = LED_OFF;
152
153 INIT_WORK(&led_dat->work, adp5520_led_work);
154
155 ret = led_classdev_register(led_dat->master, &led_dat->cdev);
156 if (ret) {
157 dev_err(&pdev->dev, "failed to register LED %d\n",
158 led_dat->id);
159 goto err;
160 }
161
162 ret = adp5520_led_setup(led_dat);
163 if (ret) {
164 dev_err(&pdev->dev, "failed to write\n");
165 i++;
166 goto err;
167 }
168 }
169
170 platform_set_drvdata(pdev, led);
171 return 0;
172
173err:
174 if (i > 0) {
175 for (i = i - 1; i >= 0; i--) {
176 led_classdev_unregister(&led[i].cdev);
177 cancel_work_sync(&led[i].work);
178 }
179 }
180
181err_free:
182 kfree(led);
183 return ret;
184}
185
186static int __devexit adp5520_led_remove(struct platform_device *pdev)
187{
188 struct adp5520_leds_platform_data *pdata = pdev->dev.platform_data;
189 struct adp5520_led *led;
190 int i;
191
192 led = platform_get_drvdata(pdev);
193
194 adp5520_clr_bits(led->master, ADP5520_LED_CONTROL,
195 ADP5520_LED1_EN | ADP5520_LED2_EN | ADP5520_LED3_EN);
196
197 for (i = 0; i < pdata->num_leds; i++) {
198 led_classdev_unregister(&led[i].cdev);
199 cancel_work_sync(&led[i].work);
200 }
201
202 kfree(led);
203 return 0;
204}
205
206static struct platform_driver adp5520_led_driver = {
207 .driver = {
208 .name = "adp5520-led",
209 .owner = THIS_MODULE,
210 },
211 .probe = adp5520_led_probe,
212 .remove = __devexit_p(adp5520_led_remove),
213};
214
215static int __init adp5520_led_init(void)
216{
217 return platform_driver_register(&adp5520_led_driver);
218}
219module_init(adp5520_led_init);
220
221static void __exit adp5520_led_exit(void)
222{
223 platform_driver_unregister(&adp5520_led_driver);
224}
225module_exit(adp5520_led_exit);
226
227MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>");
228MODULE_DESCRIPTION("LEDS ADP5520(01) Driver");
229MODULE_LICENSE("GPL");
230MODULE_ALIAS("platform:adp5520-led");
diff --git a/drivers/leds/leds-alix2.c b/drivers/leds/leds-alix2.c
index 731d4eef3425..f59ffadf5125 100644
--- a/drivers/leds/leds-alix2.c
+++ b/drivers/leds/leds-alix2.c
@@ -11,11 +11,24 @@
11#include <linux/module.h> 11#include <linux/module.h>
12#include <linux/platform_device.h> 12#include <linux/platform_device.h>
13#include <linux/string.h> 13#include <linux/string.h>
14#include <linux/pci.h>
14 15
15static int force = 0; 16static int force = 0;
16module_param(force, bool, 0444); 17module_param(force, bool, 0444);
17MODULE_PARM_DESC(force, "Assume system has ALIX.2/ALIX.3 style LEDs"); 18MODULE_PARM_DESC(force, "Assume system has ALIX.2/ALIX.3 style LEDs");
18 19
20#define MSR_LBAR_GPIO 0x5140000C
21#define CS5535_GPIO_SIZE 256
22
23static u32 gpio_base;
24
25static struct pci_device_id divil_pci[] = {
26 { PCI_DEVICE(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_CS5535_ISA) },
27 { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_CS5536_ISA) },
28 { } /* NULL entry */
29};
30MODULE_DEVICE_TABLE(pci, divil_pci);
31
19struct alix_led { 32struct alix_led {
20 struct led_classdev cdev; 33 struct led_classdev cdev;
21 unsigned short port; 34 unsigned short port;
@@ -30,9 +43,9 @@ static void alix_led_set(struct led_classdev *led_cdev,
30 container_of(led_cdev, struct alix_led, cdev); 43 container_of(led_cdev, struct alix_led, cdev);
31 44
32 if (brightness) 45 if (brightness)
33 outl(led_dev->on_value, led_dev->port); 46 outl(led_dev->on_value, gpio_base + led_dev->port);
34 else 47 else
35 outl(led_dev->off_value, led_dev->port); 48 outl(led_dev->off_value, gpio_base + led_dev->port);
36} 49}
37 50
38static struct alix_led alix_leds[] = { 51static struct alix_led alix_leds[] = {
@@ -41,7 +54,7 @@ static struct alix_led alix_leds[] = {
41 .name = "alix:1", 54 .name = "alix:1",
42 .brightness_set = alix_led_set, 55 .brightness_set = alix_led_set,
43 }, 56 },
44 .port = 0x6100, 57 .port = 0x00,
45 .on_value = 1 << 22, 58 .on_value = 1 << 22,
46 .off_value = 1 << 6, 59 .off_value = 1 << 6,
47 }, 60 },
@@ -50,7 +63,7 @@ static struct alix_led alix_leds[] = {
50 .name = "alix:2", 63 .name = "alix:2",
51 .brightness_set = alix_led_set, 64 .brightness_set = alix_led_set,
52 }, 65 },
53 .port = 0x6180, 66 .port = 0x80,
54 .on_value = 1 << 25, 67 .on_value = 1 << 25,
55 .off_value = 1 << 9, 68 .off_value = 1 << 9,
56 }, 69 },
@@ -59,7 +72,7 @@ static struct alix_led alix_leds[] = {
59 .name = "alix:3", 72 .name = "alix:3",
60 .brightness_set = alix_led_set, 73 .brightness_set = alix_led_set,
61 }, 74 },
62 .port = 0x6180, 75 .port = 0x80,
63 .on_value = 1 << 27, 76 .on_value = 1 << 27,
64 .off_value = 1 << 11, 77 .off_value = 1 << 11,
65 }, 78 },
@@ -101,64 +114,104 @@ static struct platform_driver alix_led_driver = {
101 }, 114 },
102}; 115};
103 116
104static int __init alix_present(void) 117static int __init alix_present(unsigned long bios_phys,
118 const char *alix_sig,
119 size_t alix_sig_len)
105{ 120{
106 const unsigned long bios_phys = 0x000f0000;
107 const size_t bios_len = 0x00010000; 121 const size_t bios_len = 0x00010000;
108 const char alix_sig[] = "PC Engines ALIX.";
109 const size_t alix_sig_len = sizeof(alix_sig) - 1;
110
111 const char *bios_virt; 122 const char *bios_virt;
112 const char *scan_end; 123 const char *scan_end;
113 const char *p; 124 const char *p;
114 int ret = 0; 125 char name[64];
115 126
116 if (force) { 127 if (force) {
117 printk(KERN_NOTICE "%s: forced to skip BIOS test, " 128 printk(KERN_NOTICE "%s: forced to skip BIOS test, "
118 "assume system has ALIX.2 style LEDs\n", 129 "assume system has ALIX.2 style LEDs\n",
119 KBUILD_MODNAME); 130 KBUILD_MODNAME);
120 ret = 1; 131 return 1;
121 goto out;
122 } 132 }
123 133
124 bios_virt = phys_to_virt(bios_phys); 134 bios_virt = phys_to_virt(bios_phys);
125 scan_end = bios_virt + bios_len - (alix_sig_len + 2); 135 scan_end = bios_virt + bios_len - (alix_sig_len + 2);
126 for (p = bios_virt; p < scan_end; p++) { 136 for (p = bios_virt; p < scan_end; p++) {
127 const char *tail; 137 const char *tail;
138 char *a;
128 139
129 if (memcmp(p, alix_sig, alix_sig_len) != 0) { 140 if (memcmp(p, alix_sig, alix_sig_len) != 0)
130 continue; 141 continue;
131 } 142
143 memcpy(name, p, sizeof(name));
144
145 /* remove the first \0 character from string */
146 a = strchr(name, '\0');
147 if (a)
148 *a = ' ';
149
150 /* cut the string at a newline */
151 a = strchr(name, '\r');
152 if (a)
153 *a = '\0';
132 154
133 tail = p + alix_sig_len; 155 tail = p + alix_sig_len;
134 if ((tail[0] == '2' || tail[0] == '3') && tail[1] == '\0') { 156 if ((tail[0] == '2' || tail[0] == '3')) {
135 printk(KERN_INFO 157 printk(KERN_INFO
136 "%s: system is recognized as \"%s\"\n", 158 "%s: system is recognized as \"%s\"\n",
137 KBUILD_MODNAME, p); 159 KBUILD_MODNAME, name);
138 ret = 1; 160 return 1;
139 break;
140 } 161 }
141 } 162 }
142 163
143out: 164 return 0;
144 return ret;
145} 165}
146 166
147static struct platform_device *pdev; 167static struct platform_device *pdev;
148 168
149static int __init alix_led_init(void) 169static int __init alix_pci_led_init(void)
150{ 170{
151 int ret; 171 u32 low, hi;
152 172
153 if (!alix_present()) { 173 if (pci_dev_present(divil_pci) == 0) {
154 ret = -ENODEV; 174 printk(KERN_WARNING KBUILD_MODNAME": DIVIL not found\n");
155 goto out; 175 return -ENODEV;
156 } 176 }
157 177
158 /* enable output on GPIO for LED 1,2,3 */ 178 /* Grab the GPIO I/O range */
159 outl(1 << 6, 0x6104); 179 rdmsr(MSR_LBAR_GPIO, low, hi);
160 outl(1 << 9, 0x6184); 180
161 outl(1 << 11, 0x6184); 181 /* Check the mask and whether GPIO is enabled (sanity check) */
182 if (hi != 0x0000f001) {
183 printk(KERN_WARNING KBUILD_MODNAME": GPIO not enabled\n");
184 return -ENODEV;
185 }
186
187 /* Mask off the IO base address */
188 gpio_base = low & 0x0000ff00;
189
190 if (!request_region(gpio_base, CS5535_GPIO_SIZE, KBUILD_MODNAME)) {
191 printk(KERN_ERR KBUILD_MODNAME": can't allocate I/O for GPIO\n");
192 return -ENODEV;
193 }
194
195 /* Set GPIO function to output */
196 outl(1 << 6, gpio_base + 0x04);
197 outl(1 << 9, gpio_base + 0x84);
198 outl(1 << 11, gpio_base + 0x84);
199
200 return 0;
201}
202
203static int __init alix_led_init(void)
204{
205 int ret = -ENODEV;
206 const char tinybios_sig[] = "PC Engines ALIX.";
207 const char coreboot_sig[] = "PC Engines\0ALIX.";
208
209 if (alix_present(0xf0000, tinybios_sig, sizeof(tinybios_sig) - 1) ||
210 alix_present(0x500, coreboot_sig, sizeof(coreboot_sig) - 1))
211 ret = alix_pci_led_init();
212
213 if (ret < 0)
214 return ret;
162 215
163 pdev = platform_device_register_simple(KBUILD_MODNAME, -1, NULL, 0); 216 pdev = platform_device_register_simple(KBUILD_MODNAME, -1, NULL, 0);
164 if (!IS_ERR(pdev)) { 217 if (!IS_ERR(pdev)) {
@@ -168,7 +221,6 @@ static int __init alix_led_init(void)
168 } else 221 } else
169 ret = PTR_ERR(pdev); 222 ret = PTR_ERR(pdev);
170 223
171out:
172 return ret; 224 return ret;
173} 225}
174 226
@@ -176,6 +228,7 @@ static void __exit alix_led_exit(void)
176{ 228{
177 platform_device_unregister(pdev); 229 platform_device_unregister(pdev);
178 platform_driver_unregister(&alix_led_driver); 230 platform_driver_unregister(&alix_led_driver);
231 release_region(gpio_base, CS5535_GPIO_SIZE);
179} 232}
180 233
181module_init(alix_led_init); 234module_init(alix_led_init);
diff --git a/drivers/leds/leds-cobalt-qube.c b/drivers/leds/leds-cobalt-qube.c
index 8816806accd2..da5fb016b1a5 100644
--- a/drivers/leds/leds-cobalt-qube.c
+++ b/drivers/leds/leds-cobalt-qube.c
@@ -31,7 +31,7 @@ static struct led_classdev qube_front_led = {
31 .name = "qube::front", 31 .name = "qube::front",
32 .brightness = LED_FULL, 32 .brightness = LED_FULL,
33 .brightness_set = qube_front_led_set, 33 .brightness_set = qube_front_led_set,
34 .default_trigger = "ide-disk", 34 .default_trigger = "default-on",
35}; 35};
36 36
37static int __devinit cobalt_qube_led_probe(struct platform_device *pdev) 37static int __devinit cobalt_qube_led_probe(struct platform_device *pdev)
@@ -43,7 +43,7 @@ static int __devinit cobalt_qube_led_probe(struct platform_device *pdev)
43 if (!res) 43 if (!res)
44 return -EBUSY; 44 return -EBUSY;
45 45
46 led_port = ioremap(res->start, res->end - res->start + 1); 46 led_port = ioremap(res->start, resource_size(res));
47 if (!led_port) 47 if (!led_port)
48 return -ENOMEM; 48 return -ENOMEM;
49 49
diff --git a/drivers/leds/leds-cobalt-raq.c b/drivers/leds/leds-cobalt-raq.c
index defc212105f3..438d48384636 100644
--- a/drivers/leds/leds-cobalt-raq.c
+++ b/drivers/leds/leds-cobalt-raq.c
@@ -84,7 +84,7 @@ static int __devinit cobalt_raq_led_probe(struct platform_device *pdev)
84 if (!res) 84 if (!res)
85 return -EBUSY; 85 return -EBUSY;
86 86
87 led_port = ioremap(res->start, res->end - res->start + 1); 87 led_port = ioremap(res->start, resource_size(res));
88 if (!led_port) 88 if (!led_port)
89 return -ENOMEM; 89 return -ENOMEM;
90 90
diff --git a/drivers/leds/leds-lt3593.c b/drivers/leds/leds-lt3593.c
new file mode 100644
index 000000000000..fee40a841959
--- /dev/null
+++ b/drivers/leds/leds-lt3593.c
@@ -0,0 +1,217 @@
1/*
2 * LEDs driver for LT3593 controllers
3 *
4 * See the datasheet at http://cds.linear.com/docs/Datasheet/3593f.pdf
5 *
6 * Copyright (c) 2009 Daniel Mack <daniel@caiaq.de>
7 *
8 * Based on leds-gpio.c,
9 *
10 * Copyright (C) 2007 8D Technologies inc.
11 * Raphael Assenat <raph@8d.com>
12 * Copyright (C) 2008 Freescale Semiconductor, Inc.
13 *
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License version 2 as
16 * published by the Free Software Foundation.
17 */
18
19#include <linux/kernel.h>
20#include <linux/init.h>
21#include <linux/platform_device.h>
22#include <linux/leds.h>
23#include <linux/workqueue.h>
24#include <linux/delay.h>
25#include <linux/gpio.h>
26
27struct lt3593_led_data {
28 struct led_classdev cdev;
29 unsigned gpio;
30 struct work_struct work;
31 u8 new_level;
32};
33
34static void lt3593_led_work(struct work_struct *work)
35{
36 int pulses;
37 struct lt3593_led_data *led_dat =
38 container_of(work, struct lt3593_led_data, work);
39
40 /*
41 * The LT3593 resets its internal current level register to the maximum
42 * level on the first falling edge on the control pin. Each following
43 * falling edge decreases the current level by 625uA. Up to 32 pulses
44 * can be sent, so the maximum power reduction is 20mA.
45 * After a timeout of 128us, the value is taken from the register and
46 * applied is to the output driver.
47 */
48
49 if (led_dat->new_level == 0) {
50 gpio_set_value_cansleep(led_dat->gpio, 0);
51 return;
52 }
53
54 pulses = 32 - (led_dat->new_level * 32) / 255;
55
56 if (pulses == 0) {
57 gpio_set_value_cansleep(led_dat->gpio, 0);
58 mdelay(1);
59 gpio_set_value_cansleep(led_dat->gpio, 1);
60 return;
61 }
62
63 gpio_set_value_cansleep(led_dat->gpio, 1);
64
65 while (pulses--) {
66 gpio_set_value_cansleep(led_dat->gpio, 0);
67 udelay(1);
68 gpio_set_value_cansleep(led_dat->gpio, 1);
69 udelay(1);
70 }
71}
72
73static void lt3593_led_set(struct led_classdev *led_cdev,
74 enum led_brightness value)
75{
76 struct lt3593_led_data *led_dat =
77 container_of(led_cdev, struct lt3593_led_data, cdev);
78
79 led_dat->new_level = value;
80 schedule_work(&led_dat->work);
81}
82
83static int __devinit create_lt3593_led(const struct gpio_led *template,
84 struct lt3593_led_data *led_dat, struct device *parent)
85{
86 int ret, state;
87
88 /* skip leds on GPIOs that aren't available */
89 if (!gpio_is_valid(template->gpio)) {
90 printk(KERN_INFO "%s: skipping unavailable LT3593 LED at gpio %d (%s)\n",
91 KBUILD_MODNAME, template->gpio, template->name);
92 return 0;
93 }
94
95 ret = gpio_request(template->gpio, template->name);
96 if (ret < 0)
97 return ret;
98
99 led_dat->cdev.name = template->name;
100 led_dat->cdev.default_trigger = template->default_trigger;
101 led_dat->gpio = template->gpio;
102
103 led_dat->cdev.brightness_set = lt3593_led_set;
104
105 state = (template->default_state == LEDS_GPIO_DEFSTATE_ON);
106 led_dat->cdev.brightness = state ? LED_FULL : LED_OFF;
107
108 if (!template->retain_state_suspended)
109 led_dat->cdev.flags |= LED_CORE_SUSPENDRESUME;
110
111 ret = gpio_direction_output(led_dat->gpio, state);
112 if (ret < 0)
113 goto err;
114
115 INIT_WORK(&led_dat->work, lt3593_led_work);
116
117 ret = led_classdev_register(parent, &led_dat->cdev);
118 if (ret < 0)
119 goto err;
120
121 printk(KERN_INFO "%s: registered LT3593 LED '%s' at GPIO %d\n",
122 KBUILD_MODNAME, template->name, template->gpio);
123
124 return 0;
125
126err:
127 gpio_free(led_dat->gpio);
128 return ret;
129}
130
131static void delete_lt3593_led(struct lt3593_led_data *led)
132{
133 if (!gpio_is_valid(led->gpio))
134 return;
135
136 led_classdev_unregister(&led->cdev);
137 cancel_work_sync(&led->work);
138 gpio_free(led->gpio);
139}
140
141static int __devinit lt3593_led_probe(struct platform_device *pdev)
142{
143 struct gpio_led_platform_data *pdata = pdev->dev.platform_data;
144 struct lt3593_led_data *leds_data;
145 int i, ret = 0;
146
147 if (!pdata)
148 return -EBUSY;
149
150 leds_data = kzalloc(sizeof(struct lt3593_led_data) * pdata->num_leds,
151 GFP_KERNEL);
152 if (!leds_data)
153 return -ENOMEM;
154
155 for (i = 0; i < pdata->num_leds; i++) {
156 ret = create_lt3593_led(&pdata->leds[i], &leds_data[i],
157 &pdev->dev);
158 if (ret < 0)
159 goto err;
160 }
161
162 platform_set_drvdata(pdev, leds_data);
163
164 return 0;
165
166err:
167 for (i = i - 1; i >= 0; i--)
168 delete_lt3593_led(&leds_data[i]);
169
170 kfree(leds_data);
171
172 return ret;
173}
174
175static int __devexit lt3593_led_remove(struct platform_device *pdev)
176{
177 int i;
178 struct gpio_led_platform_data *pdata = pdev->dev.platform_data;
179 struct lt3593_led_data *leds_data;
180
181 leds_data = platform_get_drvdata(pdev);
182
183 for (i = 0; i < pdata->num_leds; i++)
184 delete_lt3593_led(&leds_data[i]);
185
186 kfree(leds_data);
187
188 return 0;
189}
190
191static struct platform_driver lt3593_led_driver = {
192 .probe = lt3593_led_probe,
193 .remove = __devexit_p(lt3593_led_remove),
194 .driver = {
195 .name = "leds-lt3593",
196 .owner = THIS_MODULE,
197 },
198};
199
200MODULE_ALIAS("platform:leds-lt3593");
201
202static int __init lt3593_led_init(void)
203{
204 return platform_driver_register(&lt3593_led_driver);
205}
206
207static void __exit lt3593_led_exit(void)
208{
209 platform_driver_unregister(&lt3593_led_driver);
210}
211
212module_init(lt3593_led_init);
213module_exit(lt3593_led_exit);
214
215MODULE_AUTHOR("Daniel Mack <daniel@caiaq.de>");
216MODULE_DESCRIPTION("LED driver for LT3593 controllers");
217MODULE_LICENSE("GPL");
diff --git a/drivers/leds/leds-pwm.c b/drivers/leds/leds-pwm.c
index cdfdc8714e10..88b1dd091cfb 100644
--- a/drivers/leds/leds-pwm.c
+++ b/drivers/leds/leds-pwm.c
@@ -27,7 +27,6 @@ struct led_pwm_data {
27 struct pwm_device *pwm; 27 struct pwm_device *pwm;
28 unsigned int active_low; 28 unsigned int active_low;
29 unsigned int period; 29 unsigned int period;
30 unsigned int max_brightness;
31}; 30};
32 31
33static void led_pwm_set(struct led_classdev *led_cdev, 32static void led_pwm_set(struct led_classdev *led_cdev,
@@ -35,7 +34,7 @@ static void led_pwm_set(struct led_classdev *led_cdev,
35{ 34{
36 struct led_pwm_data *led_dat = 35 struct led_pwm_data *led_dat =
37 container_of(led_cdev, struct led_pwm_data, cdev); 36 container_of(led_cdev, struct led_pwm_data, cdev);
38 unsigned int max = led_dat->max_brightness; 37 unsigned int max = led_dat->cdev.max_brightness;
39 unsigned int period = led_dat->period; 38 unsigned int period = led_dat->period;
40 39
41 if (brightness == 0) { 40 if (brightness == 0) {
@@ -77,10 +76,10 @@ static int led_pwm_probe(struct platform_device *pdev)
77 led_dat->cdev.name = cur_led->name; 76 led_dat->cdev.name = cur_led->name;
78 led_dat->cdev.default_trigger = cur_led->default_trigger; 77 led_dat->cdev.default_trigger = cur_led->default_trigger;
79 led_dat->active_low = cur_led->active_low; 78 led_dat->active_low = cur_led->active_low;
80 led_dat->max_brightness = cur_led->max_brightness;
81 led_dat->period = cur_led->pwm_period_ns; 79 led_dat->period = cur_led->pwm_period_ns;
82 led_dat->cdev.brightness_set = led_pwm_set; 80 led_dat->cdev.brightness_set = led_pwm_set;
83 led_dat->cdev.brightness = LED_OFF; 81 led_dat->cdev.brightness = LED_OFF;
82 led_dat->cdev.max_brightness = cur_led->max_brightness;
84 led_dat->cdev.flags |= LED_CORE_SUSPENDRESUME; 83 led_dat->cdev.flags |= LED_CORE_SUSPENDRESUME;
85 84
86 ret = led_classdev_register(&pdev->dev, &led_dat->cdev); 85 ret = led_classdev_register(&pdev->dev, &led_dat->cdev);
diff --git a/drivers/leds/leds-regulator.c b/drivers/leds/leds-regulator.c
new file mode 100644
index 000000000000..7f00de3ef922
--- /dev/null
+++ b/drivers/leds/leds-regulator.c
@@ -0,0 +1,242 @@
1/*
2 * leds-regulator.c - LED class driver for regulator driven LEDs.
3 *
4 * Copyright (C) 2009 Antonio Ospite <ospite@studenti.unina.it>
5 *
6 * Inspired by leds-wm8350 driver.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12 */
13
14#include <linux/module.h>
15#include <linux/err.h>
16#include <linux/workqueue.h>
17#include <linux/leds.h>
18#include <linux/leds-regulator.h>
19#include <linux/platform_device.h>
20#include <linux/regulator/consumer.h>
21
22#define to_regulator_led(led_cdev) \
23 container_of(led_cdev, struct regulator_led, cdev)
24
25struct regulator_led {
26 struct led_classdev cdev;
27 enum led_brightness value;
28 int enabled;
29 struct mutex mutex;
30 struct work_struct work;
31
32 struct regulator *vcc;
33};
34
35static inline int led_regulator_get_max_brightness(struct regulator *supply)
36{
37 int ret;
38 int voltage = regulator_list_voltage(supply, 0);
39
40 if (voltage <= 0)
41 return 1;
42
43 /* even if regulator can't change voltages,
44 * we still assume it can change status
45 * and the LED can be turned on and off.
46 */
47 ret = regulator_set_voltage(supply, voltage, voltage);
48 if (ret < 0)
49 return 1;
50
51 return regulator_count_voltages(supply);
52}
53
54static int led_regulator_get_voltage(struct regulator *supply,
55 enum led_brightness brightness)
56{
57 if (brightness == 0)
58 return -EINVAL;
59
60 return regulator_list_voltage(supply, brightness - 1);
61}
62
63
64static void regulator_led_enable(struct regulator_led *led)
65{
66 int ret;
67
68 if (led->enabled)
69 return;
70
71 ret = regulator_enable(led->vcc);
72 if (ret != 0) {
73 dev_err(led->cdev.dev, "Failed to enable vcc: %d\n", ret);
74 return;
75 }
76
77 led->enabled = 1;
78}
79
80static void regulator_led_disable(struct regulator_led *led)
81{
82 int ret;
83
84 if (!led->enabled)
85 return;
86
87 ret = regulator_disable(led->vcc);
88 if (ret != 0) {
89 dev_err(led->cdev.dev, "Failed to disable vcc: %d\n", ret);
90 return;
91 }
92
93 led->enabled = 0;
94}
95
96static void regulator_led_set_value(struct regulator_led *led)
97{
98 int voltage;
99 int ret;
100
101 mutex_lock(&led->mutex);
102
103 if (led->value == LED_OFF) {
104 regulator_led_disable(led);
105 goto out;
106 }
107
108 if (led->cdev.max_brightness > 1) {
109 voltage = led_regulator_get_voltage(led->vcc, led->value);
110 dev_dbg(led->cdev.dev, "brightness: %d voltage: %d\n",
111 led->value, voltage);
112
113 ret = regulator_set_voltage(led->vcc, voltage, voltage);
114 if (ret != 0)
115 dev_err(led->cdev.dev, "Failed to set voltage %d: %d\n",
116 voltage, ret);
117 }
118
119 regulator_led_enable(led);
120
121out:
122 mutex_unlock(&led->mutex);
123}
124
125static void led_work(struct work_struct *work)
126{
127 struct regulator_led *led;
128
129 led = container_of(work, struct regulator_led, work);
130 regulator_led_set_value(led);
131}
132
133static void regulator_led_brightness_set(struct led_classdev *led_cdev,
134 enum led_brightness value)
135{
136 struct regulator_led *led = to_regulator_led(led_cdev);
137
138 led->value = value;
139 schedule_work(&led->work);
140}
141
142static int __devinit regulator_led_probe(struct platform_device *pdev)
143{
144 struct led_regulator_platform_data *pdata = pdev->dev.platform_data;
145 struct regulator_led *led;
146 struct regulator *vcc;
147 int ret = 0;
148
149 if (pdata == NULL) {
150 dev_err(&pdev->dev, "no platform data\n");
151 return -ENODEV;
152 }
153
154 vcc = regulator_get_exclusive(&pdev->dev, "vled");
155 if (IS_ERR(vcc)) {
156 dev_err(&pdev->dev, "Cannot get vcc for %s\n", pdata->name);
157 return PTR_ERR(vcc);
158 }
159
160 led = kzalloc(sizeof(*led), GFP_KERNEL);
161 if (led == NULL) {
162 ret = -ENOMEM;
163 goto err_vcc;
164 }
165
166 led->cdev.max_brightness = led_regulator_get_max_brightness(vcc);
167 if (pdata->brightness > led->cdev.max_brightness) {
168 dev_err(&pdev->dev, "Invalid default brightness %d\n",
169 pdata->brightness);
170 ret = -EINVAL;
171 goto err_led;
172 }
173 led->value = pdata->brightness;
174
175 led->cdev.brightness_set = regulator_led_brightness_set;
176 led->cdev.name = pdata->name;
177 led->cdev.flags |= LED_CORE_SUSPENDRESUME;
178 led->vcc = vcc;
179
180 mutex_init(&led->mutex);
181 INIT_WORK(&led->work, led_work);
182
183 platform_set_drvdata(pdev, led);
184
185 ret = led_classdev_register(&pdev->dev, &led->cdev);
186 if (ret < 0) {
187 cancel_work_sync(&led->work);
188 goto err_led;
189 }
190
191 /* to expose the default value to userspace */
192 led->cdev.brightness = led->value;
193
194 /* Set the default led status */
195 regulator_led_set_value(led);
196
197 return 0;
198
199err_led:
200 kfree(led);
201err_vcc:
202 regulator_put(vcc);
203 return ret;
204}
205
206static int __devexit regulator_led_remove(struct platform_device *pdev)
207{
208 struct regulator_led *led = platform_get_drvdata(pdev);
209
210 led_classdev_unregister(&led->cdev);
211 cancel_work_sync(&led->work);
212 regulator_led_disable(led);
213 regulator_put(led->vcc);
214 kfree(led);
215 return 0;
216}
217
218static struct platform_driver regulator_led_driver = {
219 .driver = {
220 .name = "leds-regulator",
221 .owner = THIS_MODULE,
222 },
223 .probe = regulator_led_probe,
224 .remove = __devexit_p(regulator_led_remove),
225};
226
227static int __init regulator_led_init(void)
228{
229 return platform_driver_register(&regulator_led_driver);
230}
231module_init(regulator_led_init);
232
233static void __exit regulator_led_exit(void)
234{
235 platform_driver_unregister(&regulator_led_driver);
236}
237module_exit(regulator_led_exit);
238
239MODULE_AUTHOR("Antonio Ospite <ospite@studenti.unina.it>");
240MODULE_DESCRIPTION("Regulator driven LED driver");
241MODULE_LICENSE("GPL");
242MODULE_ALIAS("platform:leds-regulator");
diff --git a/drivers/leds/leds-ss4200.c b/drivers/leds/leds-ss4200.c
new file mode 100644
index 000000000000..97f04984c1ca
--- /dev/null
+++ b/drivers/leds/leds-ss4200.c
@@ -0,0 +1,556 @@
1/*
2 * SS4200-E Hardware API
3 * Copyright (c) 2009, Intel Corporation.
4 * Copyright IBM Corporation, 2009
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
14 *
15 * You should have received a copy of the GNU General Public License along with
16 * this program; if not, write to the Free Software Foundation, Inc.,
17 * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Author: Dave Hansen <dave@sr71.net>
20 */
21
22#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
23
24#include <linux/dmi.h>
25#include <linux/init.h>
26#include <linux/ioport.h>
27#include <linux/kernel.h>
28#include <linux/leds.h>
29#include <linux/module.h>
30#include <linux/pci.h>
31#include <linux/types.h>
32#include <linux/uaccess.h>
33
34MODULE_AUTHOR("Rodney Girod <rgirod@confocus.com>, Dave Hansen <dave@sr71.net>");
35MODULE_DESCRIPTION("Intel NAS/Home Server ICH7 GPIO Driver");
36MODULE_LICENSE("GPL");
37
38/*
39 * ICH7 LPC/GPIO PCI Config register offsets
40 */
41#define PMBASE 0x040
42#define GPIO_BASE 0x048
43#define GPIO_CTRL 0x04c
44#define GPIO_EN 0x010
45
46/*
47 * The ICH7 GPIO register block is 64 bytes in size.
48 */
49#define ICH7_GPIO_SIZE 64
50
51/*
52 * Define register offsets within the ICH7 register block.
53 */
54#define GPIO_USE_SEL 0x000
55#define GP_IO_SEL 0x004
56#define GP_LVL 0x00c
57#define GPO_BLINK 0x018
58#define GPI_INV 0x030
59#define GPIO_USE_SEL2 0x034
60#define GP_IO_SEL2 0x038
61#define GP_LVL2 0x03c
62
63/*
64 * PCI ID of the Intel ICH7 LPC Device within which the GPIO block lives.
65 */
66static struct pci_device_id ich7_lpc_pci_id[] =
67{
68 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH7_0) },
69 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH7_1) },
70 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH7_30) },
71 { } /* NULL entry */
72};
73
74MODULE_DEVICE_TABLE(pci, ich7_lpc_pci_id);
75
76static int __init ss4200_led_dmi_callback(const struct dmi_system_id *id)
77{
78 pr_info("detected '%s'\n", id->ident);
79 return 1;
80}
81
82static unsigned int __initdata nodetect;
83module_param_named(nodetect, nodetect, bool, 0);
84MODULE_PARM_DESC(nodetect, "Skip DMI-based hardware detection");
85
86/*
87 * struct nas_led_whitelist - List of known good models
88 *
89 * Contains the known good models this driver is compatible with.
90 * When adding a new model try to be as strict as possible. This
91 * makes it possible to keep the false positives (the model is
92 * detected as working, but in reality it is not) as low as
93 * possible.
94 */
95static struct dmi_system_id __initdata nas_led_whitelist[] = {
96 {
97 .callback = ss4200_led_dmi_callback,
98 .ident = "Intel SS4200-E",
99 .matches = {
100 DMI_MATCH(DMI_SYS_VENDOR, "Intel"),
101 DMI_MATCH(DMI_PRODUCT_NAME, "SS4200-E"),
102 DMI_MATCH(DMI_PRODUCT_VERSION, "1.00.00")
103 }
104 },
105};
106
107/*
108 * Base I/O address assigned to the Power Management register block
109 */
110static u32 g_pm_io_base;
111
112/*
113 * Base I/O address assigned to the ICH7 GPIO register block
114 */
115static u32 nas_gpio_io_base;
116
117/*
118 * When we successfully register a region, we are returned a resource.
119 * We use these to identify which regions we need to release on our way
120 * back out.
121 */
122static struct resource *gp_gpio_resource;
123
124struct nasgpio_led {
125 char *name;
126 u32 gpio_bit;
127 struct led_classdev led_cdev;
128};
129
130/*
131 * gpio_bit(s) are the ICH7 GPIO bit assignments
132 */
133static struct nasgpio_led nasgpio_leds[] = {
134 { .name = "hdd1:blue:sata", .gpio_bit = 0 },
135 { .name = "hdd1:amber:sata", .gpio_bit = 1 },
136 { .name = "hdd2:blue:sata", .gpio_bit = 2 },
137 { .name = "hdd2:amber:sata", .gpio_bit = 3 },
138 { .name = "hdd3:blue:sata", .gpio_bit = 4 },
139 { .name = "hdd3:amber:sata", .gpio_bit = 5 },
140 { .name = "hdd4:blue:sata", .gpio_bit = 6 },
141 { .name = "hdd4:amber:sata", .gpio_bit = 7 },
142 { .name = "power:blue:power", .gpio_bit = 27},
143 { .name = "power:amber:power", .gpio_bit = 28},
144};
145
146#define NAS_RECOVERY 0x00000400 /* GPIO10 */
147
148static struct nasgpio_led *
149led_classdev_to_nasgpio_led(struct led_classdev *led_cdev)
150{
151 return container_of(led_cdev, struct nasgpio_led, led_cdev);
152}
153
154static struct nasgpio_led *get_led_named(char *name)
155{
156 int i;
157 for (i = 0; i < ARRAY_SIZE(nasgpio_leds); i++) {
158 if (strcmp(nasgpio_leds[i].name, name))
159 continue;
160 return &nasgpio_leds[i];
161 }
162 return NULL;
163}
164
165/*
166 * This protects access to the gpio ports.
167 */
168static DEFINE_SPINLOCK(nasgpio_gpio_lock);
169
170/*
171 * There are two gpio ports, one for blinking and the other
172 * for power. @port tells us if we're doing blinking or
173 * power control.
174 *
175 * Caller must hold nasgpio_gpio_lock
176 */
177static void __nasgpio_led_set_attr(struct led_classdev *led_cdev,
178 u32 port, u32 value)
179{
180 struct nasgpio_led *led = led_classdev_to_nasgpio_led(led_cdev);
181 u32 gpio_out;
182
183 gpio_out = inl(nas_gpio_io_base + port);
184 if (value)
185 gpio_out |= (1<<led->gpio_bit);
186 else
187 gpio_out &= ~(1<<led->gpio_bit);
188
189 outl(gpio_out, nas_gpio_io_base + port);
190}
191
192static void nasgpio_led_set_attr(struct led_classdev *led_cdev,
193 u32 port, u32 value)
194{
195 spin_lock(&nasgpio_gpio_lock);
196 __nasgpio_led_set_attr(led_cdev, port, value);
197 spin_unlock(&nasgpio_gpio_lock);
198}
199
200u32 nasgpio_led_get_attr(struct led_classdev *led_cdev, u32 port)
201{
202 struct nasgpio_led *led = led_classdev_to_nasgpio_led(led_cdev);
203 u32 gpio_in;
204
205 spin_lock(&nasgpio_gpio_lock);
206 gpio_in = inl(nas_gpio_io_base + port);
207 spin_unlock(&nasgpio_gpio_lock);
208 if (gpio_in & (1<<led->gpio_bit))
209 return 1;
210 return 0;
211}
212
213/*
214 * There is actual brightness control in the hardware,
215 * but it is via smbus commands and not implemented
216 * in this driver.
217 */
218static void nasgpio_led_set_brightness(struct led_classdev *led_cdev,
219 enum led_brightness brightness)
220{
221 u32 setting = 0;
222 if (brightness >= LED_HALF)
223 setting = 1;
224 /*
225 * Hold the lock across both operations. This ensures
226 * consistency so that both the "turn off blinking"
227 * and "turn light off" operations complete as a set.
228 */
229 spin_lock(&nasgpio_gpio_lock);
230 /*
231 * LED class documentation asks that past blink state
232 * be disabled when brightness is turned to zero.
233 */
234 if (brightness == 0)
235 __nasgpio_led_set_attr(led_cdev, GPO_BLINK, 0);
236 __nasgpio_led_set_attr(led_cdev, GP_LVL, setting);
237 spin_unlock(&nasgpio_gpio_lock);
238}
239
240static int nasgpio_led_set_blink(struct led_classdev *led_cdev,
241 unsigned long *delay_on,
242 unsigned long *delay_off)
243{
244 u32 setting = 1;
245 if (!(*delay_on == 0 && *delay_off == 0) &&
246 !(*delay_on == 500 && *delay_off == 500))
247 return -EINVAL;
248 /*
249 * These are very approximate.
250 */
251 *delay_on = 500;
252 *delay_off = 500;
253
254 nasgpio_led_set_attr(led_cdev, GPO_BLINK, setting);
255
256 return 0;
257}
258
259
260/*
261 * Initialize the ICH7 GPIO registers for NAS usage. The BIOS should have
262 * already taken care of this, but we will do so in a non destructive manner
263 * so that we have what we need whether the BIOS did it or not.
264 */
265static int __devinit ich7_gpio_init(struct device *dev)
266{
267 int i;
268 u32 config_data = 0;
269 u32 all_nas_led = 0;
270
271 for (i = 0; i < ARRAY_SIZE(nasgpio_leds); i++)
272 all_nas_led |= (1<<nasgpio_leds[i].gpio_bit);
273
274 spin_lock(&nasgpio_gpio_lock);
275 /*
276 * We need to enable all of the GPIO lines used by the NAS box,
277 * so we will read the current Use Selection and add our usage
278 * to it. This should be benign with regard to the original
279 * BIOS configuration.
280 */
281 config_data = inl(nas_gpio_io_base + GPIO_USE_SEL);
282 dev_dbg(dev, ": Data read from GPIO_USE_SEL = 0x%08x\n", config_data);
283 config_data |= all_nas_led + NAS_RECOVERY;
284 outl(config_data, nas_gpio_io_base + GPIO_USE_SEL);
285 config_data = inl(nas_gpio_io_base + GPIO_USE_SEL);
286 dev_dbg(dev, ": GPIO_USE_SEL = 0x%08x\n\n", config_data);
287
288 /*
289 * The LED GPIO outputs need to be configured for output, so we
290 * will ensure that all LED lines are cleared for output and the
291 * RECOVERY line ready for input. This too should be benign with
292 * regard to BIOS configuration.
293 */
294 config_data = inl(nas_gpio_io_base + GP_IO_SEL);
295 dev_dbg(dev, ": Data read from GP_IO_SEL = 0x%08x\n",
296 config_data);
297 config_data &= ~all_nas_led;
298 config_data |= NAS_RECOVERY;
299 outl(config_data, nas_gpio_io_base + GP_IO_SEL);
300 config_data = inl(nas_gpio_io_base + GP_IO_SEL);
301 dev_dbg(dev, ": GP_IO_SEL = 0x%08x\n", config_data);
302
303 /*
304 * In our final system, the BIOS will initialize the state of all
305 * of the LEDs. For now, we turn them all off (or Low).
306 */
307 config_data = inl(nas_gpio_io_base + GP_LVL);
308 dev_dbg(dev, ": Data read from GP_LVL = 0x%08x\n", config_data);
309 /*
310 * In our final system, the BIOS will initialize the blink state of all
311 * of the LEDs. For now, we turn blink off for all of them.
312 */
313 config_data = inl(nas_gpio_io_base + GPO_BLINK);
314 dev_dbg(dev, ": Data read from GPO_BLINK = 0x%08x\n", config_data);
315
316 /*
317 * At this moment, I am unsure if anything needs to happen with GPI_INV
318 */
319 config_data = inl(nas_gpio_io_base + GPI_INV);
320 dev_dbg(dev, ": Data read from GPI_INV = 0x%08x\n", config_data);
321
322 spin_unlock(&nasgpio_gpio_lock);
323 return 0;
324}
325
326static void ich7_lpc_cleanup(struct device *dev)
327{
328 /*
329 * If we were given exclusive use of the GPIO
330 * I/O Address range, we must return it.
331 */
332 if (gp_gpio_resource) {
333 dev_dbg(dev, ": Releasing GPIO I/O addresses\n");
334 release_region(nas_gpio_io_base, ICH7_GPIO_SIZE);
335 gp_gpio_resource = NULL;
336 }
337}
338
339/*
340 * The OS has determined that the LPC of the Intel ICH7 Southbridge is present
341 * so we can retrive the required operational information and prepare the GPIO.
342 */
343static struct pci_dev *nas_gpio_pci_dev;
344static int __devinit ich7_lpc_probe(struct pci_dev *dev,
345 const struct pci_device_id *id)
346{
347 int status;
348 u32 gc = 0;
349
350 status = pci_enable_device(dev);
351 if (status) {
352 dev_err(&dev->dev, "pci_enable_device failed\n");
353 return -EIO;
354 }
355
356 nas_gpio_pci_dev = dev;
357 status = pci_read_config_dword(dev, PMBASE, &g_pm_io_base);
358 if (status)
359 goto out;
360 g_pm_io_base &= 0x00000ff80;
361
362 status = pci_read_config_dword(dev, GPIO_CTRL, &gc);
363 if (!(GPIO_EN & gc)) {
364 status = -EEXIST;
365 dev_info(&dev->dev,
366 "ERROR: The LPC GPIO Block has not been enabled.\n");
367 goto out;
368 }
369
370 status = pci_read_config_dword(dev, GPIO_BASE, &nas_gpio_io_base);
371 if (0 > status) {
372 dev_info(&dev->dev, "Unable to read GPIOBASE.\n");
373 goto out;
374 }
375 dev_dbg(&dev->dev, ": GPIOBASE = 0x%08x\n", nas_gpio_io_base);
376 nas_gpio_io_base &= 0x00000ffc0;
377
378 /*
379 * Insure that we have exclusive access to the GPIO I/O address range.
380 */
381 gp_gpio_resource = request_region(nas_gpio_io_base, ICH7_GPIO_SIZE,
382 KBUILD_MODNAME);
383 if (NULL == gp_gpio_resource) {
384 dev_info(&dev->dev,
385 "ERROR Unable to register GPIO I/O addresses.\n");
386 status = -1;
387 goto out;
388 }
389
390 /*
391 * Initialize the GPIO for NAS/Home Server Use
392 */
393 ich7_gpio_init(&dev->dev);
394
395out:
396 if (status) {
397 ich7_lpc_cleanup(&dev->dev);
398 pci_disable_device(dev);
399 }
400 return status;
401}
402
403static void ich7_lpc_remove(struct pci_dev *dev)
404{
405 ich7_lpc_cleanup(&dev->dev);
406 pci_disable_device(dev);
407}
408
409/*
410 * pci_driver structure passed to the PCI modules
411 */
412static struct pci_driver nas_gpio_pci_driver = {
413 .name = KBUILD_MODNAME,
414 .id_table = ich7_lpc_pci_id,
415 .probe = ich7_lpc_probe,
416 .remove = ich7_lpc_remove,
417};
418
419static struct led_classdev *get_classdev_for_led_nr(int nr)
420{
421 struct nasgpio_led *nas_led = &nasgpio_leds[nr];
422 struct led_classdev *led = &nas_led->led_cdev;
423 return led;
424}
425
426
427static void set_power_light_amber_noblink(void)
428{
429 struct nasgpio_led *amber = get_led_named("power:amber:power");
430 struct nasgpio_led *blue = get_led_named("power:blue:power");
431
432 if (!amber || !blue)
433 return;
434 /*
435 * LED_OFF implies disabling future blinking
436 */
437 pr_debug("setting blue off and amber on\n");
438
439 nasgpio_led_set_brightness(&blue->led_cdev, LED_OFF);
440 nasgpio_led_set_brightness(&amber->led_cdev, LED_FULL);
441}
442
443static ssize_t nas_led_blink_show(struct device *dev,
444 struct device_attribute *attr, char *buf)
445{
446 struct led_classdev *led = dev_get_drvdata(dev);
447 int blinking = 0;
448 if (nasgpio_led_get_attr(led, GPO_BLINK))
449 blinking = 1;
450 return sprintf(buf, "%u\n", blinking);
451}
452
453static ssize_t nas_led_blink_store(struct device *dev,
454 struct device_attribute *attr,
455 const char *buf, size_t size)
456{
457 int ret;
458 struct led_classdev *led = dev_get_drvdata(dev);
459 unsigned long blink_state;
460
461 ret = strict_strtoul(buf, 10, &blink_state);
462 if (ret)
463 return ret;
464
465 nasgpio_led_set_attr(led, GPO_BLINK, blink_state);
466
467 return size;
468}
469
470static DEVICE_ATTR(blink, 0644, nas_led_blink_show, nas_led_blink_store);
471
472static int register_nasgpio_led(int led_nr)
473{
474 int ret;
475 struct nasgpio_led *nas_led = &nasgpio_leds[led_nr];
476 struct led_classdev *led = get_classdev_for_led_nr(led_nr);
477
478 led->name = nas_led->name;
479 led->brightness = LED_OFF;
480 if (nasgpio_led_get_attr(led, GP_LVL))
481 led->brightness = LED_FULL;
482 led->brightness_set = nasgpio_led_set_brightness;
483 led->blink_set = nasgpio_led_set_blink;
484 ret = led_classdev_register(&nas_gpio_pci_dev->dev, led);
485 if (ret)
486 return ret;
487 ret = device_create_file(led->dev, &dev_attr_blink);
488 if (ret)
489 led_classdev_unregister(led);
490 return ret;
491}
492
493static void unregister_nasgpio_led(int led_nr)
494{
495 struct led_classdev *led = get_classdev_for_led_nr(led_nr);
496 led_classdev_unregister(led);
497 device_remove_file(led->dev, &dev_attr_blink);
498}
499/*
500 * module load/initialization
501 */
502static int __init nas_gpio_init(void)
503{
504 int i;
505 int ret = 0;
506 int nr_devices = 0;
507
508 nr_devices = dmi_check_system(nas_led_whitelist);
509 if (nodetect) {
510 pr_info("skipping hardware autodetection\n");
511 pr_info("Please send 'dmidecode' output to dave@sr71.net\n");
512 nr_devices++;
513 }
514
515 if (nr_devices <= 0) {
516 pr_info("no LED devices found\n");
517 return -ENODEV;
518 }
519
520 pr_info("registering PCI driver\n");
521 ret = pci_register_driver(&nas_gpio_pci_driver);
522 if (ret)
523 return ret;
524 for (i = 0; i < ARRAY_SIZE(nasgpio_leds); i++) {
525 ret = register_nasgpio_led(i);
526 if (ret)
527 goto out_err;
528 }
529 /*
530 * When the system powers on, the BIOS leaves the power
531 * light blue and blinking. This will turn it solid
532 * amber once the driver is loaded.
533 */
534 set_power_light_amber_noblink();
535 return 0;
536out_err:
537 for (; i >= 0; i--)
538 unregister_nasgpio_led(i);
539 pci_unregister_driver(&nas_gpio_pci_driver);
540 return ret;
541}
542
543/*
544 * module unload
545 */
546static void __exit nas_gpio_exit(void)
547{
548 int i;
549 pr_info("Unregistering driver\n");
550 for (i = 0; i < ARRAY_SIZE(nasgpio_leds); i++)
551 unregister_nasgpio_led(i);
552 pci_unregister_driver(&nas_gpio_pci_driver);
553}
554
555module_init(nas_gpio_init);
556module_exit(nas_gpio_exit);
diff --git a/drivers/lguest/segments.c b/drivers/lguest/segments.c
index 951c57b0a7e0..ede46581351a 100644
--- a/drivers/lguest/segments.c
+++ b/drivers/lguest/segments.c
@@ -179,8 +179,10 @@ void load_guest_gdt_entry(struct lg_cpu *cpu, u32 num, u32 lo, u32 hi)
179 * We assume the Guest has the same number of GDT entries as the 179 * We assume the Guest has the same number of GDT entries as the
180 * Host, otherwise we'd have to dynamically allocate the Guest GDT. 180 * Host, otherwise we'd have to dynamically allocate the Guest GDT.
181 */ 181 */
182 if (num >= ARRAY_SIZE(cpu->arch.gdt)) 182 if (num >= ARRAY_SIZE(cpu->arch.gdt)) {
183 kill_guest(cpu, "too many gdt entries %i", num); 183 kill_guest(cpu, "too many gdt entries %i", num);
184 return;
185 }
184 186
185 /* Set it up, then fix it. */ 187 /* Set it up, then fix it. */
186 cpu->arch.gdt[num].a = lo; 188 cpu->arch.gdt[num].a = lo;
diff --git a/drivers/macintosh/smu.c b/drivers/macintosh/smu.c
index 96faa799b82a..f96feeb6b9ce 100644
--- a/drivers/macintosh/smu.c
+++ b/drivers/macintosh/smu.c
@@ -660,7 +660,7 @@ static int smu_platform_probe(struct of_device* dev,
660 return 0; 660 return 0;
661} 661}
662 662
663static struct of_device_id smu_platform_match[] = 663static const struct of_device_id smu_platform_match[] =
664{ 664{
665 { 665 {
666 .type = "smu", 666 .type = "smu",
diff --git a/drivers/macintosh/therm_pm72.c b/drivers/macintosh/therm_pm72.c
index ea32c7e5a9af..454bc501df3c 100644
--- a/drivers/macintosh/therm_pm72.c
+++ b/drivers/macintosh/therm_pm72.c
@@ -2211,7 +2211,7 @@ static int fcu_of_remove(struct of_device* dev)
2211 return 0; 2211 return 0;
2212} 2212}
2213 2213
2214static struct of_device_id fcu_match[] = 2214static const struct of_device_id fcu_match[] =
2215{ 2215{
2216 { 2216 {
2217 .type = "fcu", 2217 .type = "fcu",
diff --git a/drivers/macintosh/therm_windtunnel.c b/drivers/macintosh/therm_windtunnel.c
index 3fbe41b0ac07..ba48fd76396e 100644
--- a/drivers/macintosh/therm_windtunnel.c
+++ b/drivers/macintosh/therm_windtunnel.c
@@ -457,7 +457,7 @@ therm_of_remove( struct of_device *dev )
457 return 0; 457 return 0;
458} 458}
459 459
460static struct of_device_id therm_of_match[] = {{ 460static const struct of_device_id therm_of_match[] = {{
461 .name = "fan", 461 .name = "fan",
462 .compatible = "adm1030" 462 .compatible = "adm1030"
463 }, {} 463 }, {}
diff --git a/drivers/md/dm-log-userspace-transfer.c b/drivers/md/dm-log-userspace-transfer.c
index 54abf9e303b7..f1c8cae70b4b 100644
--- a/drivers/md/dm-log-userspace-transfer.c
+++ b/drivers/md/dm-log-userspace-transfer.c
@@ -172,11 +172,15 @@ int dm_consult_userspace(const char *uuid, uint64_t luid, int request_type,
172{ 172{
173 int r = 0; 173 int r = 0;
174 size_t dummy = 0; 174 size_t dummy = 0;
175 int overhead_size = 175 int overhead_size = sizeof(struct dm_ulog_request) + sizeof(struct cn_msg);
176 sizeof(struct dm_ulog_request *) + sizeof(struct cn_msg);
177 struct dm_ulog_request *tfr = prealloced_ulog_tfr; 176 struct dm_ulog_request *tfr = prealloced_ulog_tfr;
178 struct receiving_pkg pkg; 177 struct receiving_pkg pkg;
179 178
179 /*
180 * Given the space needed to hold the 'struct cn_msg' and
181 * 'struct dm_ulog_request' - do we have enough payload
182 * space remaining?
183 */
180 if (data_size > (DM_ULOG_PREALLOCED_SIZE - overhead_size)) { 184 if (data_size > (DM_ULOG_PREALLOCED_SIZE - overhead_size)) {
181 DMINFO("Size of tfr exceeds preallocated size"); 185 DMINFO("Size of tfr exceeds preallocated size");
182 return -EINVAL; 186 return -EINVAL;
@@ -191,7 +195,7 @@ resend:
191 */ 195 */
192 mutex_lock(&dm_ulog_lock); 196 mutex_lock(&dm_ulog_lock);
193 197
194 memset(tfr, 0, DM_ULOG_PREALLOCED_SIZE - overhead_size); 198 memset(tfr, 0, DM_ULOG_PREALLOCED_SIZE - sizeof(struct cn_msg));
195 memcpy(tfr->uuid, uuid, DM_UUID_LEN); 199 memcpy(tfr->uuid, uuid, DM_UUID_LEN);
196 tfr->luid = luid; 200 tfr->luid = luid;
197 tfr->seq = dm_ulog_seq++; 201 tfr->seq = dm_ulog_seq++;
diff --git a/drivers/md/dm-raid1.c b/drivers/md/dm-raid1.c
index ad779bd13aec..6c1046df81f6 100644
--- a/drivers/md/dm-raid1.c
+++ b/drivers/md/dm-raid1.c
@@ -724,7 +724,7 @@ static void do_writes(struct mirror_set *ms, struct bio_list *writes)
724 /* 724 /*
725 * Dispatch io. 725 * Dispatch io.
726 */ 726 */
727 if (unlikely(ms->log_failure)) { 727 if (unlikely(ms->log_failure) && errors_handled(ms)) {
728 spin_lock_irq(&ms->lock); 728 spin_lock_irq(&ms->lock);
729 bio_list_merge(&ms->failures, &sync); 729 bio_list_merge(&ms->failures, &sync);
730 spin_unlock_irq(&ms->lock); 730 spin_unlock_irq(&ms->lock);
diff --git a/drivers/md/dm-region-hash.c b/drivers/md/dm-region-hash.c
index 5f19ceb6fe91..168bd38f5006 100644
--- a/drivers/md/dm-region-hash.c
+++ b/drivers/md/dm-region-hash.c
@@ -660,10 +660,9 @@ void dm_rh_recovery_end(struct dm_region *reg, int success)
660 spin_lock_irq(&rh->region_lock); 660 spin_lock_irq(&rh->region_lock);
661 if (success) 661 if (success)
662 list_add(&reg->list, &reg->rh->recovered_regions); 662 list_add(&reg->list, &reg->rh->recovered_regions);
663 else { 663 else
664 reg->state = DM_RH_NOSYNC;
665 list_add(&reg->list, &reg->rh->failed_recovered_regions); 664 list_add(&reg->list, &reg->rh->failed_recovered_regions);
666 } 665
667 spin_unlock_irq(&rh->region_lock); 666 spin_unlock_irq(&rh->region_lock);
668 667
669 rh->wakeup_workers(rh->context); 668 rh->wakeup_workers(rh->context);
diff --git a/drivers/md/dm-snap-persistent.c b/drivers/md/dm-snap-persistent.c
index 7d08879689ac..c097d8a4823d 100644
--- a/drivers/md/dm-snap-persistent.c
+++ b/drivers/md/dm-snap-persistent.c
@@ -254,7 +254,7 @@ static int chunk_io(struct pstore *ps, void *area, chunk_t chunk, int rw,
254 * Issue the synchronous I/O from a different thread 254 * Issue the synchronous I/O from a different thread
255 * to avoid generic_make_request recursion. 255 * to avoid generic_make_request recursion.
256 */ 256 */
257 INIT_WORK(&req.work, do_metadata); 257 INIT_WORK_ON_STACK(&req.work, do_metadata);
258 queue_work(ps->metadata_wq, &req.work); 258 queue_work(ps->metadata_wq, &req.work);
259 flush_workqueue(ps->metadata_wq); 259 flush_workqueue(ps->metadata_wq);
260 260
diff --git a/drivers/md/dm-stripe.c b/drivers/md/dm-stripe.c
index e0efc1adcaff..bd58703ee8f6 100644
--- a/drivers/md/dm-stripe.c
+++ b/drivers/md/dm-stripe.c
@@ -110,7 +110,7 @@ static int stripe_ctr(struct dm_target *ti, unsigned int argc, char **argv)
110 } 110 }
111 111
112 stripes = simple_strtoul(argv[0], &end, 10); 112 stripes = simple_strtoul(argv[0], &end, 10);
113 if (*end) { 113 if (!stripes || *end) {
114 ti->error = "Invalid stripe count"; 114 ti->error = "Invalid stripe count";
115 return -EINVAL; 115 return -EINVAL;
116 } 116 }
diff --git a/drivers/md/dm-sysfs.c b/drivers/md/dm-sysfs.c
index f53392df7b97..f91b40942e07 100644
--- a/drivers/md/dm-sysfs.c
+++ b/drivers/md/dm-sysfs.c
@@ -80,20 +80,12 @@ static struct sysfs_ops dm_sysfs_ops = {
80}; 80};
81 81
82/* 82/*
83 * The sysfs structure is embedded in md struct, nothing to do here
84 */
85static void dm_sysfs_release(struct kobject *kobj)
86{
87}
88
89/*
90 * dm kobject is embedded in mapped_device structure 83 * dm kobject is embedded in mapped_device structure
91 * no need to define release function here 84 * no need to define release function here
92 */ 85 */
93static struct kobj_type dm_ktype = { 86static struct kobj_type dm_ktype = {
94 .sysfs_ops = &dm_sysfs_ops, 87 .sysfs_ops = &dm_sysfs_ops,
95 .default_attrs = dm_attrs, 88 .default_attrs = dm_attrs,
96 .release = dm_sysfs_release
97}; 89};
98 90
99/* 91/*
diff --git a/drivers/md/dm-table.c b/drivers/md/dm-table.c
index be625475cf6d..4b22feb01a0c 100644
--- a/drivers/md/dm-table.c
+++ b/drivers/md/dm-table.c
@@ -503,16 +503,15 @@ int dm_set_device_limits(struct dm_target *ti, struct dm_dev *dev,
503 return 0; 503 return 0;
504 } 504 }
505 505
506 if (blk_stack_limits(limits, &q->limits, start << 9) < 0) 506 if (bdev_stack_limits(limits, bdev, start) < 0)
507 DMWARN("%s: target device %s is misaligned: " 507 DMWARN("%s: adding target device %s caused an alignment inconsistency: "
508 "physical_block_size=%u, logical_block_size=%u, " 508 "physical_block_size=%u, logical_block_size=%u, "
509 "alignment_offset=%u, start=%llu", 509 "alignment_offset=%u, start=%llu",
510 dm_device_name(ti->table->md), bdevname(bdev, b), 510 dm_device_name(ti->table->md), bdevname(bdev, b),
511 q->limits.physical_block_size, 511 q->limits.physical_block_size,
512 q->limits.logical_block_size, 512 q->limits.logical_block_size,
513 q->limits.alignment_offset, 513 q->limits.alignment_offset,
514 (unsigned long long) start << 9); 514 (unsigned long long) start << SECTOR_SHIFT);
515
516 515
517 /* 516 /*
518 * Check if merge fn is supported. 517 * Check if merge fn is supported.
@@ -1026,9 +1025,9 @@ combine_limits:
1026 * for the table. 1025 * for the table.
1027 */ 1026 */
1028 if (blk_stack_limits(limits, &ti_limits, 0) < 0) 1027 if (blk_stack_limits(limits, &ti_limits, 0) < 0)
1029 DMWARN("%s: target device " 1028 DMWARN("%s: adding target device "
1030 "(start sect %llu len %llu) " 1029 "(start sect %llu len %llu) "
1031 "is misaligned", 1030 "caused an alignment inconsistency",
1032 dm_device_name(table->md), 1031 dm_device_name(table->md),
1033 (unsigned long long) ti->begin, 1032 (unsigned long long) ti->begin,
1034 (unsigned long long) ti->len); 1033 (unsigned long long) ti->len);
@@ -1080,15 +1079,6 @@ void dm_table_set_restrictions(struct dm_table *t, struct request_queue *q,
1080 struct queue_limits *limits) 1079 struct queue_limits *limits)
1081{ 1080{
1082 /* 1081 /*
1083 * Each target device in the table has a data area that should normally
1084 * be aligned such that the DM device's alignment_offset is 0.
1085 * FIXME: Propagate alignment_offsets up the stack and warn of
1086 * sub-optimal or inconsistent settings.
1087 */
1088 limits->alignment_offset = 0;
1089 limits->misaligned = 0;
1090
1091 /*
1092 * Copy table's limits to the DM device's request_queue 1082 * Copy table's limits to the DM device's request_queue
1093 */ 1083 */
1094 q->limits = *limits; 1084 q->limits = *limits;
diff --git a/drivers/md/dm.c b/drivers/md/dm.c
index 3167480b532c..aa4e2aa86d49 100644
--- a/drivers/md/dm.c
+++ b/drivers/md/dm.c
@@ -1595,10 +1595,15 @@ static int dm_prep_fn(struct request_queue *q, struct request *rq)
1595 return BLKPREP_OK; 1595 return BLKPREP_OK;
1596} 1596}
1597 1597
1598static void map_request(struct dm_target *ti, struct request *clone, 1598/*
1599 struct mapped_device *md) 1599 * Returns:
1600 * 0 : the request has been processed (not requeued)
1601 * !0 : the request has been requeued
1602 */
1603static int map_request(struct dm_target *ti, struct request *clone,
1604 struct mapped_device *md)
1600{ 1605{
1601 int r; 1606 int r, requeued = 0;
1602 struct dm_rq_target_io *tio = clone->end_io_data; 1607 struct dm_rq_target_io *tio = clone->end_io_data;
1603 1608
1604 /* 1609 /*
@@ -1625,6 +1630,7 @@ static void map_request(struct dm_target *ti, struct request *clone,
1625 case DM_MAPIO_REQUEUE: 1630 case DM_MAPIO_REQUEUE:
1626 /* The target wants to requeue the I/O */ 1631 /* The target wants to requeue the I/O */
1627 dm_requeue_unmapped_request(clone); 1632 dm_requeue_unmapped_request(clone);
1633 requeued = 1;
1628 break; 1634 break;
1629 default: 1635 default:
1630 if (r > 0) { 1636 if (r > 0) {
@@ -1636,6 +1642,8 @@ static void map_request(struct dm_target *ti, struct request *clone,
1636 dm_kill_unmapped_request(clone, r); 1642 dm_kill_unmapped_request(clone, r);
1637 break; 1643 break;
1638 } 1644 }
1645
1646 return requeued;
1639} 1647}
1640 1648
1641/* 1649/*
@@ -1677,12 +1685,17 @@ static void dm_request_fn(struct request_queue *q)
1677 atomic_inc(&md->pending[rq_data_dir(clone)]); 1685 atomic_inc(&md->pending[rq_data_dir(clone)]);
1678 1686
1679 spin_unlock(q->queue_lock); 1687 spin_unlock(q->queue_lock);
1680 map_request(ti, clone, md); 1688 if (map_request(ti, clone, md))
1689 goto requeued;
1690
1681 spin_lock_irq(q->queue_lock); 1691 spin_lock_irq(q->queue_lock);
1682 } 1692 }
1683 1693
1684 goto out; 1694 goto out;
1685 1695
1696requeued:
1697 spin_lock_irq(q->queue_lock);
1698
1686plug_and_out: 1699plug_and_out:
1687 if (!elv_queue_empty(q)) 1700 if (!elv_queue_empty(q))
1688 /* Some requests still remain, retry later */ 1701 /* Some requests still remain, retry later */
diff --git a/drivers/md/md.c b/drivers/md/md.c
index f4f5f82f9f53..a20a71e5efd3 100644
--- a/drivers/md/md.c
+++ b/drivers/md/md.c
@@ -386,7 +386,9 @@ static void mddev_put(mddev_t *mddev)
386 if (!atomic_dec_and_lock(&mddev->active, &all_mddevs_lock)) 386 if (!atomic_dec_and_lock(&mddev->active, &all_mddevs_lock))
387 return; 387 return;
388 if (!mddev->raid_disks && list_empty(&mddev->disks) && 388 if (!mddev->raid_disks && list_empty(&mddev->disks) &&
389 !mddev->hold_active) { 389 mddev->ctime == 0 && !mddev->hold_active) {
390 /* Array is not configured at all, and not held active,
391 * so destroy it */
390 list_del(&mddev->all_mddevs); 392 list_del(&mddev->all_mddevs);
391 if (mddev->gendisk) { 393 if (mddev->gendisk) {
392 /* we did a probe so need to clean up. 394 /* we did a probe so need to clean up.
@@ -4073,8 +4075,10 @@ static void mddev_delayed_delete(struct work_struct *ws)
4073{ 4075{
4074 mddev_t *mddev = container_of(ws, mddev_t, del_work); 4076 mddev_t *mddev = container_of(ws, mddev_t, del_work);
4075 4077
4076 if (mddev->private == &md_redundancy_group) { 4078 if (mddev->private) {
4077 sysfs_remove_group(&mddev->kobj, &md_redundancy_group); 4079 sysfs_remove_group(&mddev->kobj, &md_redundancy_group);
4080 if (mddev->private != (void*)1)
4081 sysfs_remove_group(&mddev->kobj, mddev->private);
4078 if (mddev->sysfs_action) 4082 if (mddev->sysfs_action)
4079 sysfs_put(mddev->sysfs_action); 4083 sysfs_put(mddev->sysfs_action);
4080 mddev->sysfs_action = NULL; 4084 mddev->sysfs_action = NULL;
@@ -4285,10 +4289,7 @@ static int do_md_run(mddev_t * mddev)
4285 sysfs_notify_dirent(rdev->sysfs_state); 4289 sysfs_notify_dirent(rdev->sysfs_state);
4286 } 4290 }
4287 4291
4288 md_probe(mddev->unit, NULL, NULL);
4289 disk = mddev->gendisk; 4292 disk = mddev->gendisk;
4290 if (!disk)
4291 return -ENOMEM;
4292 4293
4293 spin_lock(&pers_lock); 4294 spin_lock(&pers_lock);
4294 pers = find_pers(mddev->level, mddev->clevel); 4295 pers = find_pers(mddev->level, mddev->clevel);
@@ -4355,7 +4356,7 @@ static int do_md_run(mddev_t * mddev)
4355 mddev->barriers_work = 1; 4356 mddev->barriers_work = 1;
4356 mddev->ok_start_degraded = start_dirty_degraded; 4357 mddev->ok_start_degraded = start_dirty_degraded;
4357 4358
4358 if (start_readonly) 4359 if (start_readonly && mddev->ro == 0)
4359 mddev->ro = 2; /* read-only, but switch on first write */ 4360 mddev->ro = 2; /* read-only, but switch on first write */
4360 4361
4361 err = mddev->pers->run(mddev); 4362 err = mddev->pers->run(mddev);
@@ -4419,33 +4420,6 @@ static int do_md_run(mddev_t * mddev)
4419 4420
4420 set_capacity(disk, mddev->array_sectors); 4421 set_capacity(disk, mddev->array_sectors);
4421 4422
4422 /* If there is a partially-recovered drive we need to
4423 * start recovery here. If we leave it to md_check_recovery,
4424 * it will remove the drives and not do the right thing
4425 */
4426 if (mddev->degraded && !mddev->sync_thread) {
4427 int spares = 0;
4428 list_for_each_entry(rdev, &mddev->disks, same_set)
4429 if (rdev->raid_disk >= 0 &&
4430 !test_bit(In_sync, &rdev->flags) &&
4431 !test_bit(Faulty, &rdev->flags))
4432 /* complete an interrupted recovery */
4433 spares++;
4434 if (spares && mddev->pers->sync_request) {
4435 mddev->recovery = 0;
4436 set_bit(MD_RECOVERY_RUNNING, &mddev->recovery);
4437 mddev->sync_thread = md_register_thread(md_do_sync,
4438 mddev,
4439 "resync");
4440 if (!mddev->sync_thread) {
4441 printk(KERN_ERR "%s: could not start resync"
4442 " thread...\n",
4443 mdname(mddev));
4444 /* leave the spares where they are, it shouldn't hurt */
4445 mddev->recovery = 0;
4446 }
4447 }
4448 }
4449 md_wakeup_thread(mddev->thread); 4423 md_wakeup_thread(mddev->thread);
4450 md_wakeup_thread(mddev->sync_thread); /* possibly kick off a reshape */ 4424 md_wakeup_thread(mddev->sync_thread); /* possibly kick off a reshape */
4451 4425
@@ -4555,8 +4529,8 @@ static int do_md_stop(mddev_t * mddev, int mode, int is_open)
4555 mddev->queue->unplug_fn = NULL; 4529 mddev->queue->unplug_fn = NULL;
4556 mddev->queue->backing_dev_info.congested_fn = NULL; 4530 mddev->queue->backing_dev_info.congested_fn = NULL;
4557 module_put(mddev->pers->owner); 4531 module_put(mddev->pers->owner);
4558 if (mddev->pers->sync_request) 4532 if (mddev->pers->sync_request && mddev->private == NULL)
4559 mddev->private = &md_redundancy_group; 4533 mddev->private = (void*)1;
4560 mddev->pers = NULL; 4534 mddev->pers = NULL;
4561 /* tell userspace to handle 'inactive' */ 4535 /* tell userspace to handle 'inactive' */
4562 sysfs_notify_dirent(mddev->sysfs_state); 4536 sysfs_notify_dirent(mddev->sysfs_state);
@@ -4603,9 +4577,6 @@ out:
4603 } 4577 }
4604 mddev->bitmap_info.offset = 0; 4578 mddev->bitmap_info.offset = 0;
4605 4579
4606 /* make sure all md_delayed_delete calls have finished */
4607 flush_scheduled_work();
4608
4609 export_array(mddev); 4580 export_array(mddev);
4610 4581
4611 mddev->array_sectors = 0; 4582 mddev->array_sectors = 0;
@@ -5262,6 +5233,10 @@ static int set_array_info(mddev_t * mddev, mdu_array_info_t *info)
5262 mddev->minor_version = info->minor_version; 5233 mddev->minor_version = info->minor_version;
5263 mddev->patch_version = info->patch_version; 5234 mddev->patch_version = info->patch_version;
5264 mddev->persistent = !info->not_persistent; 5235 mddev->persistent = !info->not_persistent;
5236 /* ensure mddev_put doesn't delete this now that there
5237 * is some minimal configuration.
5238 */
5239 mddev->ctime = get_seconds();
5265 return 0; 5240 return 0;
5266 } 5241 }
5267 mddev->major_version = MD_MAJOR_VERSION; 5242 mddev->major_version = MD_MAJOR_VERSION;
@@ -6494,10 +6469,11 @@ void md_do_sync(mddev_t *mddev)
6494 mddev->curr_resync = 2; 6469 mddev->curr_resync = 2;
6495 6470
6496 try_again: 6471 try_again:
6497 if (kthread_should_stop()) { 6472 if (kthread_should_stop())
6498 set_bit(MD_RECOVERY_INTR, &mddev->recovery); 6473 set_bit(MD_RECOVERY_INTR, &mddev->recovery);
6474
6475 if (test_bit(MD_RECOVERY_INTR, &mddev->recovery))
6499 goto skip; 6476 goto skip;
6500 }
6501 for_each_mddev(mddev2, tmp) { 6477 for_each_mddev(mddev2, tmp) {
6502 if (mddev2 == mddev) 6478 if (mddev2 == mddev)
6503 continue; 6479 continue;
diff --git a/drivers/md/raid5.c b/drivers/md/raid5.c
index e84204eb12df..ceb24afdc147 100644
--- a/drivers/md/raid5.c
+++ b/drivers/md/raid5.c
@@ -5136,9 +5136,8 @@ static int stop(mddev_t *mddev)
5136 mddev->thread = NULL; 5136 mddev->thread = NULL;
5137 mddev->queue->backing_dev_info.congested_fn = NULL; 5137 mddev->queue->backing_dev_info.congested_fn = NULL;
5138 blk_sync_queue(mddev->queue); /* the unplug fn references 'conf'*/ 5138 blk_sync_queue(mddev->queue); /* the unplug fn references 'conf'*/
5139 sysfs_remove_group(&mddev->kobj, &raid5_attrs_group);
5140 free_conf(conf); 5139 free_conf(conf);
5141 mddev->private = NULL; 5140 mddev->private = &raid5_attrs_group;
5142 return 0; 5141 return 0;
5143} 5142}
5144 5143
@@ -5464,11 +5463,11 @@ static int raid5_start_reshape(mddev_t *mddev)
5464 !test_bit(Faulty, &rdev->flags)) { 5463 !test_bit(Faulty, &rdev->flags)) {
5465 if (raid5_add_disk(mddev, rdev) == 0) { 5464 if (raid5_add_disk(mddev, rdev) == 0) {
5466 char nm[20]; 5465 char nm[20];
5467 if (rdev->raid_disk >= conf->previous_raid_disks) 5466 if (rdev->raid_disk >= conf->previous_raid_disks) {
5468 set_bit(In_sync, &rdev->flags); 5467 set_bit(In_sync, &rdev->flags);
5469 else 5468 added_devices++;
5469 } else
5470 rdev->recovery_offset = 0; 5470 rdev->recovery_offset = 0;
5471 added_devices++;
5472 sprintf(nm, "rd%d", rdev->raid_disk); 5471 sprintf(nm, "rd%d", rdev->raid_disk);
5473 if (sysfs_create_link(&mddev->kobj, 5472 if (sysfs_create_link(&mddev->kobj,
5474 &rdev->kobj, nm)) 5473 &rdev->kobj, nm))
@@ -5480,9 +5479,12 @@ static int raid5_start_reshape(mddev_t *mddev)
5480 break; 5479 break;
5481 } 5480 }
5482 5481
5482 /* When a reshape changes the number of devices, ->degraded
5483 * is measured against the large of the pre and post number of
5484 * devices.*/
5483 if (mddev->delta_disks > 0) { 5485 if (mddev->delta_disks > 0) {
5484 spin_lock_irqsave(&conf->device_lock, flags); 5486 spin_lock_irqsave(&conf->device_lock, flags);
5485 mddev->degraded = (conf->raid_disks - conf->previous_raid_disks) 5487 mddev->degraded += (conf->raid_disks - conf->previous_raid_disks)
5486 - added_devices; 5488 - added_devices;
5487 spin_unlock_irqrestore(&conf->device_lock, flags); 5489 spin_unlock_irqrestore(&conf->device_lock, flags);
5488 } 5490 }
diff --git a/drivers/media/IR/ir-keytable.c b/drivers/media/IR/ir-keytable.c
index bff7a5356037..b521ed9d6e2e 100644
--- a/drivers/media/IR/ir-keytable.c
+++ b/drivers/media/IR/ir-keytable.c
@@ -13,7 +13,7 @@
13 */ 13 */
14 14
15 15
16#include <linux/usb/input.h> 16#include <linux/input.h>
17#include <media/ir-common.h> 17#include <media/ir-common.h>
18 18
19#define IR_TAB_MIN_SIZE 32 19#define IR_TAB_MIN_SIZE 32
diff --git a/drivers/media/common/saa7146_video.c b/drivers/media/common/saa7146_video.c
index becbaadb3b77..5ed75263340a 100644
--- a/drivers/media/common/saa7146_video.c
+++ b/drivers/media/common/saa7146_video.c
@@ -1333,9 +1333,9 @@ static void buffer_release(struct videobuf_queue *q, struct videobuf_buffer *vb)
1333 1333
1334 DEB_CAP(("vbuf:%p\n",vb)); 1334 DEB_CAP(("vbuf:%p\n",vb));
1335 1335
1336 release_all_pagetables(dev, buf);
1337
1338 saa7146_dma_free(dev,q,buf); 1336 saa7146_dma_free(dev,q,buf);
1337
1338 release_all_pagetables(dev, buf);
1339} 1339}
1340 1340
1341static struct videobuf_queue_ops video_qops = { 1341static struct videobuf_queue_ops video_qops = {
diff --git a/drivers/media/common/tuners/tda8290.c b/drivers/media/common/tuners/tda8290.c
index c190b0dedee4..2833137fa819 100644
--- a/drivers/media/common/tuners/tda8290.c
+++ b/drivers/media/common/tuners/tda8290.c
@@ -144,7 +144,8 @@ static void set_audio(struct dvb_frontend *fe,
144 } 144 }
145 145
146 if (params->mode == V4L2_TUNER_RADIO) { 146 if (params->mode == V4L2_TUNER_RADIO) {
147 priv->tda8290_easy_mode = 0x01; /* Start with MN values */ 147 /* Set TDA8295 to FM radio; Start TDA8290 with MN values */
148 priv->tda8290_easy_mode = (priv->ver & TDA8295) ? 0x80 : 0x01;
148 tuner_dbg("setting to radio FM\n"); 149 tuner_dbg("setting to radio FM\n");
149 } else { 150 } else {
150 tuner_dbg("setting tda829x to system %s\n", mode); 151 tuner_dbg("setting tda829x to system %s\n", mode);
@@ -672,16 +673,19 @@ static int tda8290_probe(struct tuner_i2c_props *i2c_props)
672static int tda8295_probe(struct tuner_i2c_props *i2c_props) 673static int tda8295_probe(struct tuner_i2c_props *i2c_props)
673{ 674{
674#define TDA8295_ID 0x8a 675#define TDA8295_ID 0x8a
676#define TDA8295C2_ID 0x8b
675 unsigned char tda8295_id[] = { 0x2f, 0x00 }; 677 unsigned char tda8295_id[] = { 0x2f, 0x00 };
676 678
677 /* detect tda8295 */ 679 /* detect tda8295 */
678 tuner_i2c_xfer_send(i2c_props, &tda8295_id[0], 1); 680 tuner_i2c_xfer_send(i2c_props, &tda8295_id[0], 1);
679 tuner_i2c_xfer_recv(i2c_props, &tda8295_id[1], 1); 681 tuner_i2c_xfer_recv(i2c_props, &tda8295_id[1], 1);
680 682
681 if (tda8295_id[1] == TDA8295_ID) { 683 if ((tda8295_id[1] & 0xfe) == TDA8295_ID) {
682 if (debug) 684 if (debug)
683 printk(KERN_DEBUG "%s: tda8295 detected @ %d-%04x\n", 685 printk(KERN_DEBUG "%s: %s detected @ %d-%04x\n",
684 __func__, i2c_adapter_id(i2c_props->adap), 686 __func__, (tda8295_id[1] == TDA8295_ID) ?
687 "tda8295c1" : "tda8295c2",
688 i2c_adapter_id(i2c_props->adap),
685 i2c_props->addr); 689 i2c_props->addr);
686 return 0; 690 return 0;
687 } 691 }
diff --git a/drivers/media/dvb/Kconfig b/drivers/media/dvb/Kconfig
index 35d0817126e9..cf8f65f309da 100644
--- a/drivers/media/dvb/Kconfig
+++ b/drivers/media/dvb/Kconfig
@@ -72,6 +72,10 @@ comment "Supported Earthsoft PT1 Adapters"
72 depends on DVB_CORE && PCI && I2C 72 depends on DVB_CORE && PCI && I2C
73source "drivers/media/dvb/pt1/Kconfig" 73source "drivers/media/dvb/pt1/Kconfig"
74 74
75comment "Supported Mantis Adapters"
76 depends on DVB_CORE && PCI && I2C
77 source "drivers/media/dvb/mantis/Kconfig"
78
75comment "Supported DVB Frontends" 79comment "Supported DVB Frontends"
76 depends on DVB_CORE 80 depends on DVB_CORE
77source "drivers/media/dvb/frontends/Kconfig" 81source "drivers/media/dvb/frontends/Kconfig"
diff --git a/drivers/media/dvb/Makefile b/drivers/media/dvb/Makefile
index 16d262ddb45d..c12922c3659b 100644
--- a/drivers/media/dvb/Makefile
+++ b/drivers/media/dvb/Makefile
@@ -2,6 +2,18 @@
2# Makefile for the kernel multimedia device drivers. 2# Makefile for the kernel multimedia device drivers.
3# 3#
4 4
5obj-y := dvb-core/ frontends/ ttpci/ ttusb-dec/ ttusb-budget/ b2c2/ bt8xx/ dvb-usb/ pluto2/ siano/ dm1105/ pt1/ 5obj-y := dvb-core/ \
6 frontends/ \
7 ttpci/ \
8 ttusb-dec/ \
9 ttusb-budget/ \
10 b2c2/ \
11 bt8xx/ \
12 dvb-usb/ \
13 pluto2/ \
14 siano/ \
15 dm1105/ \
16 pt1/ \
17 mantis/
6 18
7obj-$(CONFIG_DVB_FIREDTV) += firewire/ 19obj-$(CONFIG_DVB_FIREDTV) += firewire/
diff --git a/drivers/media/dvb/dvb-core/dmxdev.c b/drivers/media/dvb/dvb-core/dmxdev.c
index c37790ad92d0..9ddc57909d49 100644
--- a/drivers/media/dvb/dvb-core/dmxdev.c
+++ b/drivers/media/dvb/dvb-core/dmxdev.c
@@ -761,7 +761,6 @@ static int dvb_demux_open(struct inode *inode, struct file *file)
761 dvb_ringbuffer_init(&dmxdevfilter->buffer, NULL, 8192); 761 dvb_ringbuffer_init(&dmxdevfilter->buffer, NULL, 8192);
762 dmxdevfilter->type = DMXDEV_TYPE_NONE; 762 dmxdevfilter->type = DMXDEV_TYPE_NONE;
763 dvb_dmxdev_filter_state_set(dmxdevfilter, DMXDEV_STATE_ALLOCATED); 763 dvb_dmxdev_filter_state_set(dmxdevfilter, DMXDEV_STATE_ALLOCATED);
764 INIT_LIST_HEAD(&dmxdevfilter->feed.ts);
765 init_timer(&dmxdevfilter->timer); 764 init_timer(&dmxdevfilter->timer);
766 765
767 dvbdev->users++; 766 dvbdev->users++;
@@ -887,6 +886,7 @@ static int dvb_dmxdev_pes_filter_set(struct dmxdev *dmxdev,
887 dmxdevfilter->type = DMXDEV_TYPE_PES; 886 dmxdevfilter->type = DMXDEV_TYPE_PES;
888 memcpy(&dmxdevfilter->params, params, 887 memcpy(&dmxdevfilter->params, params,
889 sizeof(struct dmx_pes_filter_params)); 888 sizeof(struct dmx_pes_filter_params));
889 INIT_LIST_HEAD(&dmxdevfilter->feed.ts);
890 890
891 dvb_dmxdev_filter_state_set(dmxdevfilter, DMXDEV_STATE_SET); 891 dvb_dmxdev_filter_state_set(dmxdevfilter, DMXDEV_STATE_SET);
892 892
diff --git a/drivers/media/dvb/dvb-core/dvb_demux.c b/drivers/media/dvb/dvb-core/dvb_demux.c
index b78cfb7d1897..67f189b7aa1f 100644
--- a/drivers/media/dvb/dvb-core/dvb_demux.c
+++ b/drivers/media/dvb/dvb-core/dvb_demux.c
@@ -426,16 +426,7 @@ static void dvb_dmx_swfilter_packet(struct dvb_demux *demux, const u8 *buf)
426 }; 426 };
427 }; 427 };
428 428
429 if (dvb_demux_tscheck) { 429 if (demux->cnt_storage) {
430 if (!demux->cnt_storage)
431 demux->cnt_storage = vmalloc(MAX_PID + 1);
432
433 if (!demux->cnt_storage) {
434 printk(KERN_WARNING "Couldn't allocate memory for TS/TEI check. Disabling it\n");
435 dvb_demux_tscheck = 0;
436 goto no_dvb_demux_tscheck;
437 }
438
439 /* check pkt counter */ 430 /* check pkt counter */
440 if (pid < MAX_PID) { 431 if (pid < MAX_PID) {
441 if (buf[1] & 0x80) 432 if (buf[1] & 0x80)
@@ -454,7 +445,6 @@ static void dvb_dmx_swfilter_packet(struct dvb_demux *demux, const u8 *buf)
454 }; 445 };
455 /* end check */ 446 /* end check */
456 }; 447 };
457no_dvb_demux_tscheck:
458 448
459 list_for_each_entry(feed, &demux->feed_list, list_head) { 449 list_for_each_entry(feed, &demux->feed_list, list_head) {
460 if ((feed->pid != pid) && (feed->pid != 0x2000)) 450 if ((feed->pid != pid) && (feed->pid != 0x2000))
@@ -1246,6 +1236,7 @@ int dvb_dmx_init(struct dvb_demux *dvbdemux)
1246 dvbdemux->feed = vmalloc(dvbdemux->feednum * sizeof(struct dvb_demux_feed)); 1236 dvbdemux->feed = vmalloc(dvbdemux->feednum * sizeof(struct dvb_demux_feed));
1247 if (!dvbdemux->feed) { 1237 if (!dvbdemux->feed) {
1248 vfree(dvbdemux->filter); 1238 vfree(dvbdemux->filter);
1239 dvbdemux->filter = NULL;
1249 return -ENOMEM; 1240 return -ENOMEM;
1250 } 1241 }
1251 for (i = 0; i < dvbdemux->filternum; i++) { 1242 for (i = 0; i < dvbdemux->filternum; i++) {
@@ -1257,6 +1248,13 @@ int dvb_dmx_init(struct dvb_demux *dvbdemux)
1257 dvbdemux->feed[i].index = i; 1248 dvbdemux->feed[i].index = i;
1258 } 1249 }
1259 1250
1251 if (dvb_demux_tscheck) {
1252 dvbdemux->cnt_storage = vmalloc(MAX_PID + 1);
1253
1254 if (!dvbdemux->cnt_storage)
1255 printk(KERN_WARNING "Couldn't allocate memory for TS/TEI check. Disabling it\n");
1256 }
1257
1260 INIT_LIST_HEAD(&dvbdemux->frontend_list); 1258 INIT_LIST_HEAD(&dvbdemux->frontend_list);
1261 1259
1262 for (i = 0; i < DMX_TS_PES_OTHER; i++) { 1260 for (i = 0; i < DMX_TS_PES_OTHER; i++) {
diff --git a/drivers/media/dvb/dvb-usb/Kconfig b/drivers/media/dvb/dvb-usb/Kconfig
index 1b249897c9fb..465295b1d14b 100644
--- a/drivers/media/dvb/dvb-usb/Kconfig
+++ b/drivers/media/dvb/dvb-usb/Kconfig
@@ -112,11 +112,13 @@ config DVB_USB_CXUSB
112 select DVB_MT352 if !DVB_FE_CUSTOMISE 112 select DVB_MT352 if !DVB_FE_CUSTOMISE
113 select DVB_ZL10353 if !DVB_FE_CUSTOMISE 113 select DVB_ZL10353 if !DVB_FE_CUSTOMISE
114 select DVB_DIB7000P if !DVB_FE_CUSTOMISE 114 select DVB_DIB7000P if !DVB_FE_CUSTOMISE
115 select DVB_LGS8GL5 if !DVB_FE_CUSTOMISE
116 select DVB_TUNER_DIB0070 if !DVB_FE_CUSTOMISE 115 select DVB_TUNER_DIB0070 if !DVB_FE_CUSTOMISE
116 select DVB_ATBM8830 if !DVB_FE_CUSTOMISE
117 select DVB_LGS8GXX if !DVB_FE_CUSTOMISE
117 select MEDIA_TUNER_SIMPLE if !MEDIA_TUNER_CUSTOMISE 118 select MEDIA_TUNER_SIMPLE if !MEDIA_TUNER_CUSTOMISE
118 select MEDIA_TUNER_XC2028 if !MEDIA_TUNER_CUSTOMISE 119 select MEDIA_TUNER_XC2028 if !MEDIA_TUNER_CUSTOMISE
119 select MEDIA_TUNER_MXL5005S if !MEDIA_TUNER_CUSTOMISE 120 select MEDIA_TUNER_MXL5005S if !MEDIA_TUNER_CUSTOMISE
121 select MEDIA_TUNER_MAX2165 if !MEDIA_TUNER_CUSTOMISE
120 help 122 help
121 Say Y here to support the Conexant USB2.0 hybrid reference design. 123 Say Y here to support the Conexant USB2.0 hybrid reference design.
122 Currently, only DVB and ATSC modes are supported, analog mode 124 Currently, only DVB and ATSC modes are supported, analog mode
diff --git a/drivers/media/dvb/firewire/firedtv-fw.c b/drivers/media/dvb/firewire/firedtv-fw.c
index fe44789ab037..6223bf01efe9 100644
--- a/drivers/media/dvb/firewire/firedtv-fw.c
+++ b/drivers/media/dvb/firewire/firedtv-fw.c
@@ -202,14 +202,8 @@ static void handle_fcp(struct fw_card *card, struct fw_request *request,
202 unsigned long flags; 202 unsigned long flags;
203 int su; 203 int su;
204 204
205 if ((tcode != TCODE_WRITE_QUADLET_REQUEST && 205 if (length < 2 || (((u8 *)payload)[0] & 0xf0) != 0)
206 tcode != TCODE_WRITE_BLOCK_REQUEST) ||
207 offset != CSR_REGISTER_BASE + CSR_FCP_RESPONSE ||
208 length == 0 ||
209 (((u8 *)payload)[0] & 0xf0) != 0) {
210 fw_send_response(card, request, RCODE_TYPE_ERROR);
211 return; 206 return;
212 }
213 207
214 su = ((u8 *)payload)[1] & 0x7; 208 su = ((u8 *)payload)[1] & 0x7;
215 209
@@ -230,10 +224,8 @@ static void handle_fcp(struct fw_card *card, struct fw_request *request,
230 } 224 }
231 spin_unlock_irqrestore(&node_list_lock, flags); 225 spin_unlock_irqrestore(&node_list_lock, flags);
232 226
233 if (fdtv) { 227 if (fdtv)
234 avc_recv(fdtv, payload, length); 228 avc_recv(fdtv, payload, length);
235 fw_send_response(card, request, RCODE_COMPLETE);
236 }
237} 229}
238 230
239static struct fw_address_handler fcp_handler = { 231static struct fw_address_handler fcp_handler = {
diff --git a/drivers/media/dvb/frontends/Kconfig b/drivers/media/dvb/frontends/Kconfig
index a3b8b697349b..cd7f9b7cbffa 100644
--- a/drivers/media/dvb/frontends/Kconfig
+++ b/drivers/media/dvb/frontends/Kconfig
@@ -208,6 +208,14 @@ config DVB_DS3000
208 help 208 help
209 A DVB-S/S2 tuner module. Say Y when you want to support this frontend. 209 A DVB-S/S2 tuner module. Say Y when you want to support this frontend.
210 210
211config DVB_MB86A16
212 tristate "Fujitsu MB86A16 based"
213 depends on DVB_CORE && I2C
214 default m if DVB_FE_CUSTOMISE
215 help
216 A DVB-S/DSS Direct Conversion reveiver.
217 Say Y when you want to support this frontend.
218
211comment "DVB-T (terrestrial) frontends" 219comment "DVB-T (terrestrial) frontends"
212 depends on DVB_CORE 220 depends on DVB_CORE
213 221
@@ -587,6 +595,17 @@ config DVB_ATBM8830
587 help 595 help
588 A DMB-TH tuner module. Say Y when you want to support this frontend. 596 A DMB-TH tuner module. Say Y when you want to support this frontend.
589 597
598config DVB_TDA665x
599 tristate "TDA665x tuner"
600 depends on DVB_CORE && I2C
601 default m if DVB_FE_CUSTOMISE
602 help
603 Support for tuner modules based on Philips TDA6650/TDA6651 chips.
604 Say Y when you want to support this chip.
605
606 Currently supported tuners:
607 * Panasonic ENV57H12D5 (ET-50DT)
608
590comment "Tools to develop new frontends" 609comment "Tools to develop new frontends"
591 610
592config DVB_DUMMY_FE 611config DVB_DUMMY_FE
diff --git a/drivers/media/dvb/frontends/Makefile b/drivers/media/dvb/frontends/Makefile
index 47575cc7b699..874e8ada4d1d 100644
--- a/drivers/media/dvb/frontends/Makefile
+++ b/drivers/media/dvb/frontends/Makefile
@@ -64,6 +64,7 @@ obj-$(CONFIG_DVB_TDA10048) += tda10048.o
64obj-$(CONFIG_DVB_TUNER_CX24113) += cx24113.o 64obj-$(CONFIG_DVB_TUNER_CX24113) += cx24113.o
65obj-$(CONFIG_DVB_S5H1411) += s5h1411.o 65obj-$(CONFIG_DVB_S5H1411) += s5h1411.o
66obj-$(CONFIG_DVB_LGS8GL5) += lgs8gl5.o 66obj-$(CONFIG_DVB_LGS8GL5) += lgs8gl5.o
67obj-$(CONFIG_DVB_TDA665x) += tda665x.o
67obj-$(CONFIG_DVB_LGS8GXX) += lgs8gxx.o 68obj-$(CONFIG_DVB_LGS8GXX) += lgs8gxx.o
68obj-$(CONFIG_DVB_ATBM8830) += atbm8830.o 69obj-$(CONFIG_DVB_ATBM8830) += atbm8830.o
69obj-$(CONFIG_DVB_DUMMY_FE) += dvb_dummy_fe.o 70obj-$(CONFIG_DVB_DUMMY_FE) += dvb_dummy_fe.o
@@ -80,3 +81,4 @@ obj-$(CONFIG_DVB_STV6110x) += stv6110x.o
80obj-$(CONFIG_DVB_ISL6423) += isl6423.o 81obj-$(CONFIG_DVB_ISL6423) += isl6423.o
81obj-$(CONFIG_DVB_EC100) += ec100.o 82obj-$(CONFIG_DVB_EC100) += ec100.o
82obj-$(CONFIG_DVB_DS3000) += ds3000.o 83obj-$(CONFIG_DVB_DS3000) += ds3000.o
84obj-$(CONFIG_DVB_MB86A16) += mb86a16.o
diff --git a/drivers/media/dvb/frontends/dib8000.h b/drivers/media/dvb/frontends/dib8000.h
index d99619ae983c..b1ee20799639 100644
--- a/drivers/media/dvb/frontends/dib8000.h
+++ b/drivers/media/dvb/frontends/dib8000.h
@@ -100,7 +100,7 @@ static inline int dib8000_set_tune_state(struct dvb_frontend *fe, enum frontend_
100static inline enum frontend_tune_state dib8000_get_tune_state(struct dvb_frontend *fe) 100static inline enum frontend_tune_state dib8000_get_tune_state(struct dvb_frontend *fe)
101{ 101{
102 printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__); 102 printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
103 return CT_SHUTDOWN, 103 return CT_SHUTDOWN;
104} 104}
105static inline void dib8000_pwm_agc_reset(struct dvb_frontend *fe) 105static inline void dib8000_pwm_agc_reset(struct dvb_frontend *fe)
106{ 106{
diff --git a/drivers/media/dvb/frontends/l64781.c b/drivers/media/dvb/frontends/l64781.c
index 3051b64aa17c..445fa1068064 100644
--- a/drivers/media/dvb/frontends/l64781.c
+++ b/drivers/media/dvb/frontends/l64781.c
@@ -192,8 +192,8 @@ static int apply_frontend_param (struct dvb_frontend* fe, struct dvb_frontend_pa
192 spi_bias *= qam_tab[p->constellation]; 192 spi_bias *= qam_tab[p->constellation];
193 spi_bias /= p->code_rate_HP + 1; 193 spi_bias /= p->code_rate_HP + 1;
194 spi_bias /= (guard_tab[p->guard_interval] + 32); 194 spi_bias /= (guard_tab[p->guard_interval] + 32);
195 spi_bias *= 1000ULL; 195 spi_bias *= 1000;
196 spi_bias /= 1000ULL + ppm/1000; 196 spi_bias /= 1000 + ppm/1000;
197 spi_bias *= p->code_rate_HP; 197 spi_bias *= p->code_rate_HP;
198 198
199 val0x04 = (p->transmission_mode << 2) | p->guard_interval; 199 val0x04 = (p->transmission_mode << 2) | p->guard_interval;
diff --git a/drivers/media/dvb/frontends/lgdt3305.h b/drivers/media/dvb/frontends/lgdt3305.h
index 4fa6e52d1fe8..9cb11c9cae53 100644
--- a/drivers/media/dvb/frontends/lgdt3305.h
+++ b/drivers/media/dvb/frontends/lgdt3305.h
@@ -54,13 +54,13 @@ struct lgdt3305_config {
54 u16 usref_qam256; /* default: 0x2a80 */ 54 u16 usref_qam256; /* default: 0x2a80 */
55 55
56 /* disable i2c repeater - 0:repeater enabled 1:repeater disabled */ 56 /* disable i2c repeater - 0:repeater enabled 1:repeater disabled */
57 int deny_i2c_rptr:1; 57 unsigned int deny_i2c_rptr:1;
58 58
59 /* spectral inversion - 0:disabled 1:enabled */ 59 /* spectral inversion - 0:disabled 1:enabled */
60 int spectral_inversion:1; 60 unsigned int spectral_inversion:1;
61 61
62 /* use RF AGC loop - 0:disabled 1:enabled */ 62 /* use RF AGC loop - 0:disabled 1:enabled */
63 int rf_agc_loop:1; 63 unsigned int rf_agc_loop:1;
64 64
65 enum lgdt3305_mpeg_mode mpeg_mode; 65 enum lgdt3305_mpeg_mode mpeg_mode;
66 enum lgdt3305_tp_clock_edge tpclk_edge; 66 enum lgdt3305_tp_clock_edge tpclk_edge;
diff --git a/drivers/media/dvb/frontends/mb86a16.c b/drivers/media/dvb/frontends/mb86a16.c
new file mode 100644
index 000000000000..d05f7500e0c5
--- /dev/null
+++ b/drivers/media/dvb/frontends/mb86a16.c
@@ -0,0 +1,1878 @@
1/*
2 Fujitsu MB86A16 DVB-S/DSS DC Receiver driver
3
4 Copyright (C) Manu Abraham (abraham.manu@gmail.com)
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19*/
20
21#include <linux/init.h>
22#include <linux/kernel.h>
23#include <linux/module.h>
24#include <linux/moduleparam.h>
25
26#include "dvb_frontend.h"
27#include "mb86a16.h"
28#include "mb86a16_priv.h"
29
30unsigned int verbose = 5;
31module_param(verbose, int, 0644);
32
33#define ABS(x) ((x) < 0 ? (-x) : (x))
34
35struct mb86a16_state {
36 struct i2c_adapter *i2c_adap;
37 const struct mb86a16_config *config;
38 struct dvb_frontend frontend;
39
40 /* tuning parameters */
41 int frequency;
42 int srate;
43
44 /* Internal stuff */
45 int master_clk;
46 int deci;
47 int csel;
48 int rsel;
49};
50
51#define MB86A16_ERROR 0
52#define MB86A16_NOTICE 1
53#define MB86A16_INFO 2
54#define MB86A16_DEBUG 3
55
56#define dprintk(x, y, z, format, arg...) do { \
57 if (z) { \
58 if ((x > MB86A16_ERROR) && (x > y)) \
59 printk(KERN_ERR "%s: " format "\n", __func__, ##arg); \
60 else if ((x > MB86A16_NOTICE) && (x > y)) \
61 printk(KERN_NOTICE "%s: " format "\n", __func__, ##arg); \
62 else if ((x > MB86A16_INFO) && (x > y)) \
63 printk(KERN_INFO "%s: " format "\n", __func__, ##arg); \
64 else if ((x > MB86A16_DEBUG) && (x > y)) \
65 printk(KERN_DEBUG "%s: " format "\n", __func__, ##arg); \
66 } else { \
67 if (x > y) \
68 printk(format, ##arg); \
69 } \
70} while (0)
71
72#define TRACE_IN dprintk(verbose, MB86A16_DEBUG, 1, "-->()")
73#define TRACE_OUT dprintk(verbose, MB86A16_DEBUG, 1, "()-->")
74
75static int mb86a16_write(struct mb86a16_state *state, u8 reg, u8 val)
76{
77 int ret;
78 u8 buf[] = { reg, val };
79
80 struct i2c_msg msg = {
81 .addr = state->config->demod_address,
82 .flags = 0,
83 .buf = buf,
84 .len = 2
85 };
86
87 dprintk(verbose, MB86A16_DEBUG, 1,
88 "writing to [0x%02x],Reg[0x%02x],Data[0x%02x]",
89 state->config->demod_address, buf[0], buf[1]);
90
91 ret = i2c_transfer(state->i2c_adap, &msg, 1);
92
93 return (ret != 1) ? -EREMOTEIO : 0;
94}
95
96static int mb86a16_read(struct mb86a16_state *state, u8 reg, u8 *val)
97{
98 int ret;
99 u8 b0[] = { reg };
100 u8 b1[] = { 0 };
101
102 struct i2c_msg msg[] = {
103 {
104 .addr = state->config->demod_address,
105 .flags = 0,
106 .buf = b0,
107 .len = 1
108 }, {
109 .addr = state->config->demod_address,
110 .flags = I2C_M_RD,
111 .buf = b1,
112 .len = 1
113 }
114 };
115 ret = i2c_transfer(state->i2c_adap, msg, 2);
116 if (ret != 2) {
117 dprintk(verbose, MB86A16_ERROR, 1, "read error(reg=0x%02x, ret=0x%i)",
118 reg, ret);
119
120 return -EREMOTEIO;
121 }
122 *val = b1[0];
123
124 return ret;
125}
126
127static int CNTM_set(struct mb86a16_state *state,
128 unsigned char timint1,
129 unsigned char timint2,
130 unsigned char cnext)
131{
132 unsigned char val;
133
134 val = (timint1 << 4) | (timint2 << 2) | cnext;
135 if (mb86a16_write(state, MB86A16_CNTMR, val) < 0)
136 goto err;
137
138 return 0;
139
140err:
141 dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
142 return -EREMOTEIO;
143}
144
145static int smrt_set(struct mb86a16_state *state, int rate)
146{
147 int tmp ;
148 int m ;
149 unsigned char STOFS0, STOFS1;
150
151 m = 1 << state->deci;
152 tmp = (8192 * state->master_clk - 2 * m * rate * 8192 + state->master_clk / 2) / state->master_clk;
153
154 STOFS0 = tmp & 0x0ff;
155 STOFS1 = (tmp & 0xf00) >> 8;
156
157 if (mb86a16_write(state, MB86A16_SRATE1, (state->deci << 2) |
158 (state->csel << 1) |
159 state->rsel) < 0)
160 goto err;
161 if (mb86a16_write(state, MB86A16_SRATE2, STOFS0) < 0)
162 goto err;
163 if (mb86a16_write(state, MB86A16_SRATE3, STOFS1) < 0)
164 goto err;
165
166 return 0;
167err:
168 dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
169 return -1;
170}
171
172static int srst(struct mb86a16_state *state)
173{
174 if (mb86a16_write(state, MB86A16_RESET, 0x04) < 0)
175 goto err;
176
177 return 0;
178err:
179 dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
180 return -EREMOTEIO;
181
182}
183
184static int afcex_data_set(struct mb86a16_state *state,
185 unsigned char AFCEX_L,
186 unsigned char AFCEX_H)
187{
188 if (mb86a16_write(state, MB86A16_AFCEXL, AFCEX_L) < 0)
189 goto err;
190 if (mb86a16_write(state, MB86A16_AFCEXH, AFCEX_H) < 0)
191 goto err;
192
193 return 0;
194err:
195 dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
196
197 return -1;
198}
199
200static int afcofs_data_set(struct mb86a16_state *state,
201 unsigned char AFCEX_L,
202 unsigned char AFCEX_H)
203{
204 if (mb86a16_write(state, 0x58, AFCEX_L) < 0)
205 goto err;
206 if (mb86a16_write(state, 0x59, AFCEX_H) < 0)
207 goto err;
208
209 return 0;
210err:
211 dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
212 return -EREMOTEIO;
213}
214
215static int stlp_set(struct mb86a16_state *state,
216 unsigned char STRAS,
217 unsigned char STRBS)
218{
219 if (mb86a16_write(state, MB86A16_STRFILTCOEF1, (STRBS << 3) | (STRAS)) < 0)
220 goto err;
221
222 return 0;
223err:
224 dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
225 return -EREMOTEIO;
226}
227
228static int Vi_set(struct mb86a16_state *state, unsigned char ETH, unsigned char VIA)
229{
230 if (mb86a16_write(state, MB86A16_VISET2, 0x04) < 0)
231 goto err;
232 if (mb86a16_write(state, MB86A16_VISET3, 0xf5) < 0)
233 goto err;
234
235 return 0;
236err:
237 dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
238 return -EREMOTEIO;
239}
240
241static int initial_set(struct mb86a16_state *state)
242{
243 if (stlp_set(state, 5, 7))
244 goto err;
245
246 udelay(100);
247 if (afcex_data_set(state, 0, 0))
248 goto err;
249
250 udelay(100);
251 if (afcofs_data_set(state, 0, 0))
252 goto err;
253
254 udelay(100);
255 if (mb86a16_write(state, MB86A16_CRLFILTCOEF1, 0x16) < 0)
256 goto err;
257 if (mb86a16_write(state, 0x2f, 0x21) < 0)
258 goto err;
259 if (mb86a16_write(state, MB86A16_VIMAG, 0x38) < 0)
260 goto err;
261 if (mb86a16_write(state, MB86A16_FAGCS1, 0x00) < 0)
262 goto err;
263 if (mb86a16_write(state, MB86A16_FAGCS2, 0x1c) < 0)
264 goto err;
265 if (mb86a16_write(state, MB86A16_FAGCS3, 0x20) < 0)
266 goto err;
267 if (mb86a16_write(state, MB86A16_FAGCS4, 0x1e) < 0)
268 goto err;
269 if (mb86a16_write(state, MB86A16_FAGCS5, 0x23) < 0)
270 goto err;
271 if (mb86a16_write(state, 0x54, 0xff) < 0)
272 goto err;
273 if (mb86a16_write(state, MB86A16_TSOUT, 0x00) < 0)
274 goto err;
275
276 return 0;
277
278err:
279 dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
280 return -EREMOTEIO;
281}
282
283static int S01T_set(struct mb86a16_state *state,
284 unsigned char s1t,
285 unsigned s0t)
286{
287 if (mb86a16_write(state, 0x33, (s1t << 3) | s0t) < 0)
288 goto err;
289
290 return 0;
291err:
292 dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
293 return -EREMOTEIO;
294}
295
296
297static int EN_set(struct mb86a16_state *state,
298 int cren,
299 int afcen)
300{
301 unsigned char val;
302
303 val = 0x7a | (cren << 7) | (afcen << 2);
304 if (mb86a16_write(state, 0x49, val) < 0)
305 goto err;
306
307 return 0;
308err:
309 dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
310 return -EREMOTEIO;
311}
312
313static int AFCEXEN_set(struct mb86a16_state *state,
314 int afcexen,
315 int smrt)
316{
317 unsigned char AFCA ;
318
319 if (smrt > 18875)
320 AFCA = 4;
321 else if (smrt > 9375)
322 AFCA = 3;
323 else if (smrt > 2250)
324 AFCA = 2;
325 else
326 AFCA = 1;
327
328 if (mb86a16_write(state, 0x2a, 0x02 | (afcexen << 5) | (AFCA << 2)) < 0)
329 goto err;
330
331 return 0;
332
333err:
334 dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
335 return -EREMOTEIO;
336}
337
338static int DAGC_data_set(struct mb86a16_state *state,
339 unsigned char DAGCA,
340 unsigned char DAGCW)
341{
342 if (mb86a16_write(state, 0x2d, (DAGCA << 3) | DAGCW) < 0)
343 goto err;
344
345 return 0;
346
347err:
348 dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
349 return -EREMOTEIO;
350}
351
352static void smrt_info_get(struct mb86a16_state *state, int rate)
353{
354 if (rate >= 37501) {
355 state->deci = 0; state->csel = 0; state->rsel = 0;
356 } else if (rate >= 30001) {
357 state->deci = 0; state->csel = 0; state->rsel = 1;
358 } else if (rate >= 26251) {
359 state->deci = 0; state->csel = 1; state->rsel = 0;
360 } else if (rate >= 22501) {
361 state->deci = 0; state->csel = 1; state->rsel = 1;
362 } else if (rate >= 18751) {
363 state->deci = 1; state->csel = 0; state->rsel = 0;
364 } else if (rate >= 15001) {
365 state->deci = 1; state->csel = 0; state->rsel = 1;
366 } else if (rate >= 13126) {
367 state->deci = 1; state->csel = 1; state->rsel = 0;
368 } else if (rate >= 11251) {
369 state->deci = 1; state->csel = 1; state->rsel = 1;
370 } else if (rate >= 9376) {
371 state->deci = 2; state->csel = 0; state->rsel = 0;
372 } else if (rate >= 7501) {
373 state->deci = 2; state->csel = 0; state->rsel = 1;
374 } else if (rate >= 6563) {
375 state->deci = 2; state->csel = 1; state->rsel = 0;
376 } else if (rate >= 5626) {
377 state->deci = 2; state->csel = 1; state->rsel = 1;
378 } else if (rate >= 4688) {
379 state->deci = 3; state->csel = 0; state->rsel = 0;
380 } else if (rate >= 3751) {
381 state->deci = 3; state->csel = 0; state->rsel = 1;
382 } else if (rate >= 3282) {
383 state->deci = 3; state->csel = 1; state->rsel = 0;
384 } else if (rate >= 2814) {
385 state->deci = 3; state->csel = 1; state->rsel = 1;
386 } else if (rate >= 2344) {
387 state->deci = 4; state->csel = 0; state->rsel = 0;
388 } else if (rate >= 1876) {
389 state->deci = 4; state->csel = 0; state->rsel = 1;
390 } else if (rate >= 1641) {
391 state->deci = 4; state->csel = 1; state->rsel = 0;
392 } else if (rate >= 1407) {
393 state->deci = 4; state->csel = 1; state->rsel = 1;
394 } else if (rate >= 1172) {
395 state->deci = 5; state->csel = 0; state->rsel = 0;
396 } else if (rate >= 939) {
397 state->deci = 5; state->csel = 0; state->rsel = 1;
398 } else if (rate >= 821) {
399 state->deci = 5; state->csel = 1; state->rsel = 0;
400 } else {
401 state->deci = 5; state->csel = 1; state->rsel = 1;
402 }
403
404 if (state->csel == 0)
405 state->master_clk = 92000;
406 else
407 state->master_clk = 61333;
408
409}
410
411static int signal_det(struct mb86a16_state *state,
412 int smrt,
413 unsigned char *SIG)
414{
415
416 int ret ;
417 int smrtd ;
418 int wait_sym ;
419
420 u32 wait_t;
421 unsigned char S[3] ;
422 int i ;
423
424 if (*SIG > 45) {
425 if (CNTM_set(state, 2, 1, 2) < 0) {
426 dprintk(verbose, MB86A16_ERROR, 1, "CNTM set Error");
427 return -1;
428 }
429 wait_sym = 40000;
430 } else {
431 if (CNTM_set(state, 3, 1, 2) < 0) {
432 dprintk(verbose, MB86A16_ERROR, 1, "CNTM set Error");
433 return -1;
434 }
435 wait_sym = 80000;
436 }
437 for (i = 0; i < 3; i++) {
438 if (i == 0)
439 smrtd = smrt * 98 / 100;
440 else if (i == 1)
441 smrtd = smrt;
442 else
443 smrtd = smrt * 102 / 100;
444 smrt_info_get(state, smrtd);
445 smrt_set(state, smrtd);
446 srst(state);
447 wait_t = (wait_sym + 99 * smrtd / 100) / smrtd;
448 if (wait_t == 0)
449 wait_t = 1;
450 msleep_interruptible(10);
451 if (mb86a16_read(state, 0x37, &(S[i])) != 2) {
452 dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
453 return -EREMOTEIO;
454 }
455 }
456 if ((S[1] > S[0] * 112 / 100) &&
457 (S[1] > S[2] * 112 / 100)) {
458
459 ret = 1;
460 } else {
461 ret = 0;
462 }
463 *SIG = S[1];
464
465 if (CNTM_set(state, 0, 1, 2) < 0) {
466 dprintk(verbose, MB86A16_ERROR, 1, "CNTM set Error");
467 return -1;
468 }
469
470 return ret;
471}
472
473static int rf_val_set(struct mb86a16_state *state,
474 int f,
475 int smrt,
476 unsigned char R)
477{
478 unsigned char C, F, B;
479 int M;
480 unsigned char rf_val[5];
481 int ack = -1;
482
483 if (smrt > 37750)
484 C = 1;
485 else if (smrt > 18875)
486 C = 2;
487 else if (smrt > 5500)
488 C = 3;
489 else
490 C = 4;
491
492 if (smrt > 30500)
493 F = 3;
494 else if (smrt > 9375)
495 F = 1;
496 else if (smrt > 4625)
497 F = 0;
498 else
499 F = 2;
500
501 if (f < 1060)
502 B = 0;
503 else if (f < 1175)
504 B = 1;
505 else if (f < 1305)
506 B = 2;
507 else if (f < 1435)
508 B = 3;
509 else if (f < 1570)
510 B = 4;
511 else if (f < 1715)
512 B = 5;
513 else if (f < 1845)
514 B = 6;
515 else if (f < 1980)
516 B = 7;
517 else if (f < 2080)
518 B = 8;
519 else
520 B = 9;
521
522 M = f * (1 << R) / 2;
523
524 rf_val[0] = 0x01 | (C << 3) | (F << 1);
525 rf_val[1] = (R << 5) | ((M & 0x1f000) >> 12);
526 rf_val[2] = (M & 0x00ff0) >> 4;
527 rf_val[3] = ((M & 0x0000f) << 4) | B;
528
529 /* Frequency Set */
530 if (mb86a16_write(state, 0x21, rf_val[0]) < 0)
531 ack = 0;
532 if (mb86a16_write(state, 0x22, rf_val[1]) < 0)
533 ack = 0;
534 if (mb86a16_write(state, 0x23, rf_val[2]) < 0)
535 ack = 0;
536 if (mb86a16_write(state, 0x24, rf_val[3]) < 0)
537 ack = 0;
538 if (mb86a16_write(state, 0x25, 0x01) < 0)
539 ack = 0;
540 if (ack == 0) {
541 dprintk(verbose, MB86A16_ERROR, 1, "RF Setup - I2C transfer error");
542 return -EREMOTEIO;
543 }
544
545 return 0;
546}
547
548static int afcerr_chk(struct mb86a16_state *state)
549{
550 unsigned char AFCM_L, AFCM_H ;
551 int AFCM ;
552 int afcm, afcerr ;
553
554 if (mb86a16_read(state, 0x0e, &AFCM_L) != 2)
555 goto err;
556 if (mb86a16_read(state, 0x0f, &AFCM_H) != 2)
557 goto err;
558
559 AFCM = (AFCM_H << 8) + AFCM_L;
560
561 if (AFCM > 2048)
562 afcm = AFCM - 4096;
563 else
564 afcm = AFCM;
565 afcerr = afcm * state->master_clk / 8192;
566
567 return afcerr;
568
569err:
570 dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
571 return -EREMOTEIO;
572}
573
574static int dagcm_val_get(struct mb86a16_state *state)
575{
576 int DAGCM;
577 unsigned char DAGCM_H, DAGCM_L;
578
579 if (mb86a16_read(state, 0x45, &DAGCM_L) != 2)
580 goto err;
581 if (mb86a16_read(state, 0x46, &DAGCM_H) != 2)
582 goto err;
583
584 DAGCM = (DAGCM_H << 8) + DAGCM_L;
585
586 return DAGCM;
587
588err:
589 dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
590 return -EREMOTEIO;
591}
592
593static int mb86a16_read_status(struct dvb_frontend *fe, fe_status_t *status)
594{
595 u8 stat, stat2;
596 struct mb86a16_state *state = fe->demodulator_priv;
597
598 *status = 0;
599
600 if (mb86a16_read(state, MB86A16_SIG1, &stat) != 2)
601 goto err;
602 if (mb86a16_read(state, MB86A16_SIG2, &stat2) != 2)
603 goto err;
604 if ((stat > 25) && (stat2 > 25))
605 *status |= FE_HAS_SIGNAL;
606 if ((stat > 45) && (stat2 > 45))
607 *status |= FE_HAS_CARRIER;
608
609 if (mb86a16_read(state, MB86A16_STATUS, &stat) != 2)
610 goto err;
611
612 if (stat & 0x01)
613 *status |= FE_HAS_SYNC;
614 if (stat & 0x01)
615 *status |= FE_HAS_VITERBI;
616
617 if (mb86a16_read(state, MB86A16_FRAMESYNC, &stat) != 2)
618 goto err;
619
620 if ((stat & 0x0f) && (*status & FE_HAS_VITERBI))
621 *status |= FE_HAS_LOCK;
622
623 return 0;
624
625err:
626 dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
627 return -EREMOTEIO;
628}
629
630static int sync_chk(struct mb86a16_state *state,
631 unsigned char *VIRM)
632{
633 unsigned char val;
634 int sync;
635
636 if (mb86a16_read(state, 0x0d, &val) != 2)
637 goto err;
638
639 dprintk(verbose, MB86A16_INFO, 1, "Status = %02x,", val);
640 sync = val & 0x01;
641 *VIRM = (val & 0x1c) >> 2;
642
643 return sync;
644err:
645 dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
646 return -EREMOTEIO;
647
648}
649
650static int freqerr_chk(struct mb86a16_state *state,
651 int fTP,
652 int smrt,
653 int unit)
654{
655 unsigned char CRM, AFCML, AFCMH;
656 unsigned char temp1, temp2, temp3;
657 int crm, afcm, AFCM;
658 int crrerr, afcerr; /* kHz */
659 int frqerr; /* MHz */
660 int afcen, afcexen = 0;
661 int R, M, fOSC, fOSC_OFS;
662
663 if (mb86a16_read(state, 0x43, &CRM) != 2)
664 goto err;
665
666 if (CRM > 127)
667 crm = CRM - 256;
668 else
669 crm = CRM;
670
671 crrerr = smrt * crm / 256;
672 if (mb86a16_read(state, 0x49, &temp1) != 2)
673 goto err;
674
675 afcen = (temp1 & 0x04) >> 2;
676 if (afcen == 0) {
677 if (mb86a16_read(state, 0x2a, &temp1) != 2)
678 goto err;
679 afcexen = (temp1 & 0x20) >> 5;
680 }
681
682 if (afcen == 1) {
683 if (mb86a16_read(state, 0x0e, &AFCML) != 2)
684 goto err;
685 if (mb86a16_read(state, 0x0f, &AFCMH) != 2)
686 goto err;
687 } else if (afcexen == 1) {
688 if (mb86a16_read(state, 0x2b, &AFCML) != 2)
689 goto err;
690 if (mb86a16_read(state, 0x2c, &AFCMH) != 2)
691 goto err;
692 }
693 if ((afcen == 1) || (afcexen == 1)) {
694 smrt_info_get(state, smrt);
695 AFCM = ((AFCMH & 0x01) << 8) + AFCML;
696 if (AFCM > 255)
697 afcm = AFCM - 512;
698 else
699 afcm = AFCM;
700
701 afcerr = afcm * state->master_clk / 8192;
702 } else
703 afcerr = 0;
704
705 if (mb86a16_read(state, 0x22, &temp1) != 2)
706 goto err;
707 if (mb86a16_read(state, 0x23, &temp2) != 2)
708 goto err;
709 if (mb86a16_read(state, 0x24, &temp3) != 2)
710 goto err;
711
712 R = (temp1 & 0xe0) >> 5;
713 M = ((temp1 & 0x1f) << 12) + (temp2 << 4) + (temp3 >> 4);
714 if (R == 0)
715 fOSC = 2 * M;
716 else
717 fOSC = M;
718
719 fOSC_OFS = fOSC - fTP;
720
721 if (unit == 0) { /* MHz */
722 if (crrerr + afcerr + fOSC_OFS * 1000 >= 0)
723 frqerr = (crrerr + afcerr + fOSC_OFS * 1000 + 500) / 1000;
724 else
725 frqerr = (crrerr + afcerr + fOSC_OFS * 1000 - 500) / 1000;
726 } else { /* kHz */
727 frqerr = crrerr + afcerr + fOSC_OFS * 1000;
728 }
729
730 return frqerr;
731err:
732 dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
733 return -EREMOTEIO;
734}
735
736static unsigned char vco_dev_get(struct mb86a16_state *state, int smrt)
737{
738 unsigned char R;
739
740 if (smrt > 9375)
741 R = 0;
742 else
743 R = 1;
744
745 return R;
746}
747
748static void swp_info_get(struct mb86a16_state *state,
749 int fOSC_start,
750 int smrt,
751 int v, int R,
752 int swp_ofs,
753 int *fOSC,
754 int *afcex_freq,
755 unsigned char *AFCEX_L,
756 unsigned char *AFCEX_H)
757{
758 int AFCEX ;
759 int crnt_swp_freq ;
760
761 crnt_swp_freq = fOSC_start * 1000 + v * swp_ofs;
762
763 if (R == 0)
764 *fOSC = (crnt_swp_freq + 1000) / 2000 * 2;
765 else
766 *fOSC = (crnt_swp_freq + 500) / 1000;
767
768 if (*fOSC >= crnt_swp_freq)
769 *afcex_freq = *fOSC * 1000 - crnt_swp_freq;
770 else
771 *afcex_freq = crnt_swp_freq - *fOSC * 1000;
772
773 AFCEX = *afcex_freq * 8192 / state->master_clk;
774 *AFCEX_L = AFCEX & 0x00ff;
775 *AFCEX_H = (AFCEX & 0x0f00) >> 8;
776}
777
778
779static int swp_freq_calcuation(struct mb86a16_state *state, int i, int v, int *V, int vmax, int vmin,
780 int SIGMIN, int fOSC, int afcex_freq, int swp_ofs, unsigned char *SIG1)
781{
782 int swp_freq ;
783
784 if ((i % 2 == 1) && (v <= vmax)) {
785 /* positive v (case 1) */
786 if ((v - 1 == vmin) &&
787 (*(V + 30 + v) >= 0) &&
788 (*(V + 30 + v - 1) >= 0) &&
789 (*(V + 30 + v - 1) > *(V + 30 + v)) &&
790 (*(V + 30 + v - 1) > SIGMIN)) {
791
792 swp_freq = fOSC * 1000 + afcex_freq - swp_ofs;
793 *SIG1 = *(V + 30 + v - 1);
794 } else if ((v == vmax) &&
795 (*(V + 30 + v) >= 0) &&
796 (*(V + 30 + v - 1) >= 0) &&
797 (*(V + 30 + v) > *(V + 30 + v - 1)) &&
798 (*(V + 30 + v) > SIGMIN)) {
799 /* (case 2) */
800 swp_freq = fOSC * 1000 + afcex_freq;
801 *SIG1 = *(V + 30 + v);
802 } else if ((*(V + 30 + v) > 0) &&
803 (*(V + 30 + v - 1) > 0) &&
804 (*(V + 30 + v - 2) > 0) &&
805 (*(V + 30 + v - 3) > 0) &&
806 (*(V + 30 + v - 1) > *(V + 30 + v)) &&
807 (*(V + 30 + v - 2) > *(V + 30 + v - 3)) &&
808 ((*(V + 30 + v - 1) > SIGMIN) ||
809 (*(V + 30 + v - 2) > SIGMIN))) {
810 /* (case 3) */
811 if (*(V + 30 + v - 1) >= *(V + 30 + v - 2)) {
812 swp_freq = fOSC * 1000 + afcex_freq - swp_ofs;
813 *SIG1 = *(V + 30 + v - 1);
814 } else {
815 swp_freq = fOSC * 1000 + afcex_freq - swp_ofs * 2;
816 *SIG1 = *(V + 30 + v - 2);
817 }
818 } else if ((v == vmax) &&
819 (*(V + 30 + v) >= 0) &&
820 (*(V + 30 + v - 1) >= 0) &&
821 (*(V + 30 + v - 2) >= 0) &&
822 (*(V + 30 + v) > *(V + 30 + v - 2)) &&
823 (*(V + 30 + v - 1) > *(V + 30 + v - 2)) &&
824 ((*(V + 30 + v) > SIGMIN) ||
825 (*(V + 30 + v - 1) > SIGMIN))) {
826 /* (case 4) */
827 if (*(V + 30 + v) >= *(V + 30 + v - 1)) {
828 swp_freq = fOSC * 1000 + afcex_freq;
829 *SIG1 = *(V + 30 + v);
830 } else {
831 swp_freq = fOSC * 1000 + afcex_freq - swp_ofs;
832 *SIG1 = *(V + 30 + v - 1);
833 }
834 } else {
835 swp_freq = -1 ;
836 }
837 } else if ((i % 2 == 0) && (v >= vmin)) {
838 /* Negative v (case 1) */
839 if ((*(V + 30 + v) > 0) &&
840 (*(V + 30 + v + 1) > 0) &&
841 (*(V + 30 + v + 2) > 0) &&
842 (*(V + 30 + v + 1) > *(V + 30 + v)) &&
843 (*(V + 30 + v + 1) > *(V + 30 + v + 2)) &&
844 (*(V + 30 + v + 1) > SIGMIN)) {
845
846 swp_freq = fOSC * 1000 + afcex_freq + swp_ofs;
847 *SIG1 = *(V + 30 + v + 1);
848 } else if ((v + 1 == vmax) &&
849 (*(V + 30 + v) >= 0) &&
850 (*(V + 30 + v + 1) >= 0) &&
851 (*(V + 30 + v + 1) > *(V + 30 + v)) &&
852 (*(V + 30 + v + 1) > SIGMIN)) {
853 /* (case 2) */
854 swp_freq = fOSC * 1000 + afcex_freq + swp_ofs;
855 *SIG1 = *(V + 30 + v);
856 } else if ((v == vmin) &&
857 (*(V + 30 + v) > 0) &&
858 (*(V + 30 + v + 1) > 0) &&
859 (*(V + 30 + v + 2) > 0) &&
860 (*(V + 30 + v) > *(V + 30 + v + 1)) &&
861 (*(V + 30 + v) > *(V + 30 + v + 2)) &&
862 (*(V + 30 + v) > SIGMIN)) {
863 /* (case 3) */
864 swp_freq = fOSC * 1000 + afcex_freq;
865 *SIG1 = *(V + 30 + v);
866 } else if ((*(V + 30 + v) >= 0) &&
867 (*(V + 30 + v + 1) >= 0) &&
868 (*(V + 30 + v + 2) >= 0) &&
869 (*(V + 30 + v + 3) >= 0) &&
870 (*(V + 30 + v + 1) > *(V + 30 + v)) &&
871 (*(V + 30 + v + 2) > *(V + 30 + v + 3)) &&
872 ((*(V + 30 + v + 1) > SIGMIN) ||
873 (*(V + 30 + v + 2) > SIGMIN))) {
874 /* (case 4) */
875 if (*(V + 30 + v + 1) >= *(V + 30 + v + 2)) {
876 swp_freq = fOSC * 1000 + afcex_freq + swp_ofs;
877 *SIG1 = *(V + 30 + v + 1);
878 } else {
879 swp_freq = fOSC * 1000 + afcex_freq + swp_ofs * 2;
880 *SIG1 = *(V + 30 + v + 2);
881 }
882 } else if ((*(V + 30 + v) >= 0) &&
883 (*(V + 30 + v + 1) >= 0) &&
884 (*(V + 30 + v + 2) >= 0) &&
885 (*(V + 30 + v + 3) >= 0) &&
886 (*(V + 30 + v) > *(V + 30 + v + 2)) &&
887 (*(V + 30 + v + 1) > *(V + 30 + v + 2)) &&
888 (*(V + 30 + v) > *(V + 30 + v + 3)) &&
889 (*(V + 30 + v + 1) > *(V + 30 + v + 3)) &&
890 ((*(V + 30 + v) > SIGMIN) ||
891 (*(V + 30 + v + 1) > SIGMIN))) {
892 /* (case 5) */
893 if (*(V + 30 + v) >= *(V + 30 + v + 1)) {
894 swp_freq = fOSC * 1000 + afcex_freq;
895 *SIG1 = *(V + 30 + v);
896 } else {
897 swp_freq = fOSC * 1000 + afcex_freq + swp_ofs;
898 *SIG1 = *(V + 30 + v + 1);
899 }
900 } else if ((v + 2 == vmin) &&
901 (*(V + 30 + v) >= 0) &&
902 (*(V + 30 + v + 1) >= 0) &&
903 (*(V + 30 + v + 2) >= 0) &&
904 (*(V + 30 + v + 1) > *(V + 30 + v)) &&
905 (*(V + 30 + v + 2) > *(V + 30 + v)) &&
906 ((*(V + 30 + v + 1) > SIGMIN) ||
907 (*(V + 30 + v + 2) > SIGMIN))) {
908 /* (case 6) */
909 if (*(V + 30 + v + 1) >= *(V + 30 + v + 2)) {
910 swp_freq = fOSC * 1000 + afcex_freq + swp_ofs;
911 *SIG1 = *(V + 30 + v + 1);
912 } else {
913 swp_freq = fOSC * 1000 + afcex_freq + swp_ofs * 2;
914 *SIG1 = *(V + 30 + v + 2);
915 }
916 } else if ((vmax == 0) && (vmin == 0) && (*(V + 30 + v) > SIGMIN)) {
917 swp_freq = fOSC * 1000;
918 *SIG1 = *(V + 30 + v);
919 } else
920 swp_freq = -1;
921 } else
922 swp_freq = -1;
923
924 return swp_freq;
925}
926
927static void swp_info_get2(struct mb86a16_state *state,
928 int smrt,
929 int R,
930 int swp_freq,
931 int *afcex_freq,
932 int *fOSC,
933 unsigned char *AFCEX_L,
934 unsigned char *AFCEX_H)
935{
936 int AFCEX ;
937
938 if (R == 0)
939 *fOSC = (swp_freq + 1000) / 2000 * 2;
940 else
941 *fOSC = (swp_freq + 500) / 1000;
942
943 if (*fOSC >= swp_freq)
944 *afcex_freq = *fOSC * 1000 - swp_freq;
945 else
946 *afcex_freq = swp_freq - *fOSC * 1000;
947
948 AFCEX = *afcex_freq * 8192 / state->master_clk;
949 *AFCEX_L = AFCEX & 0x00ff;
950 *AFCEX_H = (AFCEX & 0x0f00) >> 8;
951}
952
953static void afcex_info_get(struct mb86a16_state *state,
954 int afcex_freq,
955 unsigned char *AFCEX_L,
956 unsigned char *AFCEX_H)
957{
958 int AFCEX ;
959
960 AFCEX = afcex_freq * 8192 / state->master_clk;
961 *AFCEX_L = AFCEX & 0x00ff;
962 *AFCEX_H = (AFCEX & 0x0f00) >> 8;
963}
964
965static int SEQ_set(struct mb86a16_state *state, unsigned char loop)
966{
967 /* SLOCK0 = 0 */
968 if (mb86a16_write(state, 0x32, 0x02 | (loop << 2)) < 0) {
969 dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
970 return -EREMOTEIO;
971 }
972
973 return 0;
974}
975
976static int iq_vt_set(struct mb86a16_state *state, unsigned char IQINV)
977{
978 /* Viterbi Rate, IQ Settings */
979 if (mb86a16_write(state, 0x06, 0xdf | (IQINV << 5)) < 0) {
980 dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
981 return -EREMOTEIO;
982 }
983
984 return 0;
985}
986
987static int FEC_srst(struct mb86a16_state *state)
988{
989 if (mb86a16_write(state, MB86A16_RESET, 0x02) < 0) {
990 dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
991 return -EREMOTEIO;
992 }
993
994 return 0;
995}
996
997static int S2T_set(struct mb86a16_state *state, unsigned char S2T)
998{
999 if (mb86a16_write(state, 0x34, 0x70 | S2T) < 0) {
1000 dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
1001 return -EREMOTEIO;
1002 }
1003
1004 return 0;
1005}
1006
1007static int S45T_set(struct mb86a16_state *state, unsigned char S4T, unsigned char S5T)
1008{
1009 if (mb86a16_write(state, 0x35, 0x00 | (S5T << 4) | S4T) < 0) {
1010 dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
1011 return -EREMOTEIO;
1012 }
1013
1014 return 0;
1015}
1016
1017
1018static int mb86a16_set_fe(struct mb86a16_state *state)
1019{
1020 u8 agcval, cnmval;
1021
1022 int i, j;
1023 int fOSC = 0;
1024 int fOSC_start = 0;
1025 int wait_t;
1026 int fcp;
1027 int swp_ofs;
1028 int V[60];
1029 u8 SIG1MIN;
1030
1031 unsigned char CREN, AFCEN, AFCEXEN;
1032 unsigned char SIG1;
1033 unsigned char TIMINT1, TIMINT2, TIMEXT;
1034 unsigned char S0T, S1T;
1035 unsigned char S2T;
1036/* unsigned char S2T, S3T; */
1037 unsigned char S4T, S5T;
1038 unsigned char AFCEX_L, AFCEX_H;
1039 unsigned char R;
1040 unsigned char VIRM;
1041 unsigned char ETH, VIA;
1042 unsigned char junk;
1043
1044 int loop;
1045 int ftemp;
1046 int v, vmax, vmin;
1047 int vmax_his, vmin_his;
1048 int swp_freq, prev_swp_freq[20];
1049 int prev_freq_num;
1050 int signal_dupl;
1051 int afcex_freq;
1052 int signal;
1053 int afcerr;
1054 int temp_freq, delta_freq;
1055 int dagcm[4];
1056 int smrt_d;
1057/* int freq_err; */
1058 int n;
1059 int ret = -1;
1060 int sync;
1061
1062 dprintk(verbose, MB86A16_INFO, 1, "freq=%d Mhz, symbrt=%d Ksps", state->frequency, state->srate);
1063
1064 fcp = 3000;
1065 swp_ofs = state->srate / 4;
1066
1067 for (i = 0; i < 60; i++)
1068 V[i] = -1;
1069
1070 for (i = 0; i < 20; i++)
1071 prev_swp_freq[i] = 0;
1072
1073 SIG1MIN = 25;
1074
1075 for (n = 0; ((n < 3) && (ret == -1)); n++) {
1076 SEQ_set(state, 0);
1077 iq_vt_set(state, 0);
1078
1079 CREN = 0;
1080 AFCEN = 0;
1081 AFCEXEN = 1;
1082 TIMINT1 = 0;
1083 TIMINT2 = 1;
1084 TIMEXT = 2;
1085 S1T = 0;
1086 S0T = 0;
1087
1088 if (initial_set(state) < 0) {
1089 dprintk(verbose, MB86A16_ERROR, 1, "initial set failed");
1090 return -1;
1091 }
1092 if (DAGC_data_set(state, 3, 2) < 0) {
1093 dprintk(verbose, MB86A16_ERROR, 1, "DAGC data set error");
1094 return -1;
1095 }
1096 if (EN_set(state, CREN, AFCEN) < 0) {
1097 dprintk(verbose, MB86A16_ERROR, 1, "EN set error");
1098 return -1; /* (0, 0) */
1099 }
1100 if (AFCEXEN_set(state, AFCEXEN, state->srate) < 0) {
1101 dprintk(verbose, MB86A16_ERROR, 1, "AFCEXEN set error");
1102 return -1; /* (1, smrt) = (1, symbolrate) */
1103 }
1104 if (CNTM_set(state, TIMINT1, TIMINT2, TIMEXT) < 0) {
1105 dprintk(verbose, MB86A16_ERROR, 1, "CNTM set error");
1106 return -1; /* (0, 1, 2) */
1107 }
1108 if (S01T_set(state, S1T, S0T) < 0) {
1109 dprintk(verbose, MB86A16_ERROR, 1, "S01T set error");
1110 return -1; /* (0, 0) */
1111 }
1112 smrt_info_get(state, state->srate);
1113 if (smrt_set(state, state->srate) < 0) {
1114 dprintk(verbose, MB86A16_ERROR, 1, "smrt info get error");
1115 return -1;
1116 }
1117
1118 R = vco_dev_get(state, state->srate);
1119 if (R == 1)
1120 fOSC_start = state->frequency;
1121
1122 else if (R == 0) {
1123 if (state->frequency % 2 == 0) {
1124 fOSC_start = state->frequency;
1125 } else {
1126 fOSC_start = state->frequency + 1;
1127 if (fOSC_start > 2150)
1128 fOSC_start = state->frequency - 1;
1129 }
1130 }
1131 loop = 1;
1132 ftemp = fOSC_start * 1000;
1133 vmax = 0 ;
1134 while (loop == 1) {
1135 ftemp = ftemp + swp_ofs;
1136 vmax++;
1137
1138 /* Upper bound */
1139 if (ftemp > 2150000) {
1140 loop = 0;
1141 vmax--;
1142 } else {
1143 if ((ftemp == 2150000) ||
1144 (ftemp - state->frequency * 1000 >= fcp + state->srate / 4))
1145 loop = 0;
1146 }
1147 }
1148
1149 loop = 1;
1150 ftemp = fOSC_start * 1000;
1151 vmin = 0 ;
1152 while (loop == 1) {
1153 ftemp = ftemp - swp_ofs;
1154 vmin--;
1155
1156 /* Lower bound */
1157 if (ftemp < 950000) {
1158 loop = 0;
1159 vmin++;
1160 } else {
1161 if ((ftemp == 950000) ||
1162 (state->frequency * 1000 - ftemp >= fcp + state->srate / 4))
1163 loop = 0;
1164 }
1165 }
1166
1167 wait_t = (8000 + state->srate / 2) / state->srate;
1168 if (wait_t == 0)
1169 wait_t = 1;
1170
1171 i = 0;
1172 j = 0;
1173 prev_freq_num = 0;
1174 loop = 1;
1175 signal = 0;
1176 vmax_his = 0;
1177 vmin_his = 0;
1178 v = 0;
1179
1180 while (loop == 1) {
1181 swp_info_get(state, fOSC_start, state->srate,
1182 v, R, swp_ofs, &fOSC,
1183 &afcex_freq, &AFCEX_L, &AFCEX_H);
1184
1185 udelay(100);
1186 if (rf_val_set(state, fOSC, state->srate, R) < 0) {
1187 dprintk(verbose, MB86A16_ERROR, 1, "rf val set error");
1188 return -1;
1189 }
1190 udelay(100);
1191 if (afcex_data_set(state, AFCEX_L, AFCEX_H) < 0) {
1192 dprintk(verbose, MB86A16_ERROR, 1, "afcex data set error");
1193 return -1;
1194 }
1195 if (srst(state) < 0) {
1196 dprintk(verbose, MB86A16_ERROR, 1, "srst error");
1197 return -1;
1198 }
1199 msleep_interruptible(wait_t);
1200
1201 if (mb86a16_read(state, 0x37, &SIG1) != 2) {
1202 dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
1203 return -1;
1204 }
1205 V[30 + v] = SIG1 ;
1206 swp_freq = swp_freq_calcuation(state, i, v, V, vmax, vmin,
1207 SIG1MIN, fOSC, afcex_freq,
1208 swp_ofs, &SIG1); /* changed */
1209
1210 signal_dupl = 0;
1211 for (j = 0; j < prev_freq_num; j++) {
1212 if ((ABS(prev_swp_freq[j] - swp_freq)) < (swp_ofs * 3 / 2)) {
1213 signal_dupl = 1;
1214 dprintk(verbose, MB86A16_INFO, 1, "Probably Duplicate Signal, j = %d", j);
1215 }
1216 }
1217 if ((signal_dupl == 0) && (swp_freq > 0) && (ABS(swp_freq - state->frequency * 1000) < fcp + state->srate / 6)) {
1218 dprintk(verbose, MB86A16_DEBUG, 1, "------ Signal detect ------ [swp_freq=[%07d, srate=%05d]]", swp_freq, state->srate);
1219 prev_swp_freq[prev_freq_num] = swp_freq;
1220 prev_freq_num++;
1221 swp_info_get2(state, state->srate, R, swp_freq,
1222 &afcex_freq, &fOSC,
1223 &AFCEX_L, &AFCEX_H);
1224
1225 if (rf_val_set(state, fOSC, state->srate, R) < 0) {
1226 dprintk(verbose, MB86A16_ERROR, 1, "rf val set error");
1227 return -1;
1228 }
1229 if (afcex_data_set(state, AFCEX_L, AFCEX_H) < 0) {
1230 dprintk(verbose, MB86A16_ERROR, 1, "afcex data set error");
1231 return -1;
1232 }
1233 signal = signal_det(state, state->srate, &SIG1);
1234 if (signal == 1) {
1235 dprintk(verbose, MB86A16_ERROR, 1, "***** Signal Found *****");
1236 loop = 0;
1237 } else {
1238 dprintk(verbose, MB86A16_ERROR, 1, "!!!!! No signal !!!!!, try again...");
1239 smrt_info_get(state, state->srate);
1240 if (smrt_set(state, state->srate) < 0) {
1241 dprintk(verbose, MB86A16_ERROR, 1, "smrt set error");
1242 return -1;
1243 }
1244 }
1245 }
1246 if (v > vmax)
1247 vmax_his = 1 ;
1248 if (v < vmin)
1249 vmin_his = 1 ;
1250 i++;
1251
1252 if ((i % 2 == 1) && (vmax_his == 1))
1253 i++;
1254 if ((i % 2 == 0) && (vmin_his == 1))
1255 i++;
1256
1257 if (i % 2 == 1)
1258 v = (i + 1) / 2;
1259 else
1260 v = -i / 2;
1261
1262 if ((vmax_his == 1) && (vmin_his == 1))
1263 loop = 0 ;
1264 }
1265
1266 if (signal == 1) {
1267 dprintk(verbose, MB86A16_INFO, 1, " Start Freq Error Check");
1268 S1T = 7 ;
1269 S0T = 1 ;
1270 CREN = 0 ;
1271 AFCEN = 1 ;
1272 AFCEXEN = 0 ;
1273
1274 if (S01T_set(state, S1T, S0T) < 0) {
1275 dprintk(verbose, MB86A16_ERROR, 1, "S01T set error");
1276 return -1;
1277 }
1278 smrt_info_get(state, state->srate);
1279 if (smrt_set(state, state->srate) < 0) {
1280 dprintk(verbose, MB86A16_ERROR, 1, "smrt set error");
1281 return -1;
1282 }
1283 if (EN_set(state, CREN, AFCEN) < 0) {
1284 dprintk(verbose, MB86A16_ERROR, 1, "EN set error");
1285 return -1;
1286 }
1287 if (AFCEXEN_set(state, AFCEXEN, state->srate) < 0) {
1288 dprintk(verbose, MB86A16_ERROR, 1, "AFCEXEN set error");
1289 return -1;
1290 }
1291 afcex_info_get(state, afcex_freq, &AFCEX_L, &AFCEX_H);
1292 if (afcofs_data_set(state, AFCEX_L, AFCEX_H) < 0) {
1293 dprintk(verbose, MB86A16_ERROR, 1, "AFCOFS data set error");
1294 return -1;
1295 }
1296 if (srst(state) < 0) {
1297 dprintk(verbose, MB86A16_ERROR, 1, "srst error");
1298 return -1;
1299 }
1300 /* delay 4~200 */
1301 wait_t = 200000 / state->master_clk + 200000 / state->srate;
1302 msleep(wait_t);
1303 afcerr = afcerr_chk(state);
1304 if (afcerr == -1)
1305 return -1;
1306
1307 swp_freq = fOSC * 1000 + afcerr ;
1308 AFCEXEN = 1 ;
1309 if (state->srate >= 1500)
1310 smrt_d = state->srate / 3;
1311 else
1312 smrt_d = state->srate / 2;
1313 smrt_info_get(state, smrt_d);
1314 if (smrt_set(state, smrt_d) < 0) {
1315 dprintk(verbose, MB86A16_ERROR, 1, "smrt set error");
1316 return -1;
1317 }
1318 if (AFCEXEN_set(state, AFCEXEN, smrt_d) < 0) {
1319 dprintk(verbose, MB86A16_ERROR, 1, "AFCEXEN set error");
1320 return -1;
1321 }
1322 R = vco_dev_get(state, smrt_d);
1323 if (DAGC_data_set(state, 2, 0) < 0) {
1324 dprintk(verbose, MB86A16_ERROR, 1, "DAGC data set error");
1325 return -1;
1326 }
1327 for (i = 0; i < 3; i++) {
1328 temp_freq = swp_freq + (i - 1) * state->srate / 8;
1329 swp_info_get2(state, smrt_d, R, temp_freq, &afcex_freq, &fOSC, &AFCEX_L, &AFCEX_H);
1330 if (rf_val_set(state, fOSC, smrt_d, R) < 0) {
1331 dprintk(verbose, MB86A16_ERROR, 1, "rf val set error");
1332 return -1;
1333 }
1334 if (afcex_data_set(state, AFCEX_L, AFCEX_H) < 0) {
1335 dprintk(verbose, MB86A16_ERROR, 1, "afcex data set error");
1336 return -1;
1337 }
1338 wait_t = 200000 / state->master_clk + 40000 / smrt_d;
1339 msleep(wait_t);
1340 dagcm[i] = dagcm_val_get(state);
1341 }
1342 if ((dagcm[0] > dagcm[1]) &&
1343 (dagcm[0] > dagcm[2]) &&
1344 (dagcm[0] - dagcm[1] > 2 * (dagcm[2] - dagcm[1]))) {
1345
1346 temp_freq = swp_freq - 2 * state->srate / 8;
1347 swp_info_get2(state, smrt_d, R, temp_freq, &afcex_freq, &fOSC, &AFCEX_L, &AFCEX_H);
1348 if (rf_val_set(state, fOSC, smrt_d, R) < 0) {
1349 dprintk(verbose, MB86A16_ERROR, 1, "rf val set error");
1350 return -1;
1351 }
1352 if (afcex_data_set(state, AFCEX_L, AFCEX_H) < 0) {
1353 dprintk(verbose, MB86A16_ERROR, 1, "afcex data set");
1354 return -1;
1355 }
1356 wait_t = 200000 / state->master_clk + 40000 / smrt_d;
1357 msleep(wait_t);
1358 dagcm[3] = dagcm_val_get(state);
1359 if (dagcm[3] > dagcm[1])
1360 delta_freq = (dagcm[2] - dagcm[0] + dagcm[1] - dagcm[3]) * state->srate / 300;
1361 else
1362 delta_freq = 0;
1363 } else if ((dagcm[2] > dagcm[1]) &&
1364 (dagcm[2] > dagcm[0]) &&
1365 (dagcm[2] - dagcm[1] > 2 * (dagcm[0] - dagcm[1]))) {
1366
1367 temp_freq = swp_freq + 2 * state->srate / 8;
1368 swp_info_get2(state, smrt_d, R, temp_freq, &afcex_freq, &fOSC, &AFCEX_L, &AFCEX_H);
1369 if (rf_val_set(state, fOSC, smrt_d, R) < 0) {
1370 dprintk(verbose, MB86A16_ERROR, 1, "rf val set");
1371 return -1;
1372 }
1373 if (afcex_data_set(state, AFCEX_L, AFCEX_H) < 0) {
1374 dprintk(verbose, MB86A16_ERROR, 1, "afcex data set");
1375 return -1;
1376 }
1377 wait_t = 200000 / state->master_clk + 40000 / smrt_d;
1378 msleep(wait_t);
1379 dagcm[3] = dagcm_val_get(state);
1380 if (dagcm[3] > dagcm[1])
1381 delta_freq = (dagcm[2] - dagcm[0] + dagcm[3] - dagcm[1]) * state->srate / 300;
1382 else
1383 delta_freq = 0 ;
1384
1385 } else {
1386 delta_freq = 0 ;
1387 }
1388 dprintk(verbose, MB86A16_INFO, 1, "SWEEP Frequency = %d", swp_freq);
1389 swp_freq += delta_freq;
1390 dprintk(verbose, MB86A16_INFO, 1, "Adjusting .., DELTA Freq = %d, SWEEP Freq=%d", delta_freq, swp_freq);
1391 if (ABS(state->frequency * 1000 - swp_freq) > 3800) {
1392 dprintk(verbose, MB86A16_INFO, 1, "NO -- SIGNAL !");
1393 } else {
1394
1395 S1T = 0;
1396 S0T = 3;
1397 CREN = 1;
1398 AFCEN = 0;
1399 AFCEXEN = 1;
1400
1401 if (S01T_set(state, S1T, S0T) < 0) {
1402 dprintk(verbose, MB86A16_ERROR, 1, "S01T set error");
1403 return -1;
1404 }
1405 if (DAGC_data_set(state, 0, 0) < 0) {
1406 dprintk(verbose, MB86A16_ERROR, 1, "DAGC data set error");
1407 return -1;
1408 }
1409 R = vco_dev_get(state, state->srate);
1410 smrt_info_get(state, state->srate);
1411 if (smrt_set(state, state->srate) < 0) {
1412 dprintk(verbose, MB86A16_ERROR, 1, "smrt set error");
1413 return -1;
1414 }
1415 if (EN_set(state, CREN, AFCEN) < 0) {
1416 dprintk(verbose, MB86A16_ERROR, 1, "EN set error");
1417 return -1;
1418 }
1419 if (AFCEXEN_set(state, AFCEXEN, state->srate) < 0) {
1420 dprintk(verbose, MB86A16_ERROR, 1, "AFCEXEN set error");
1421 return -1;
1422 }
1423 swp_info_get2(state, state->srate, R, swp_freq, &afcex_freq, &fOSC, &AFCEX_L, &AFCEX_H);
1424 if (rf_val_set(state, fOSC, state->srate, R) < 0) {
1425 dprintk(verbose, MB86A16_ERROR, 1, "rf val set error");
1426 return -1;
1427 }
1428 if (afcex_data_set(state, AFCEX_L, AFCEX_H) < 0) {
1429 dprintk(verbose, MB86A16_ERROR, 1, "afcex data set error");
1430 return -1;
1431 }
1432 if (srst(state) < 0) {
1433 dprintk(verbose, MB86A16_ERROR, 1, "srst error");
1434 return -1;
1435 }
1436 wait_t = 7 + (10000 + state->srate / 2) / state->srate;
1437 if (wait_t == 0)
1438 wait_t = 1;
1439 msleep_interruptible(wait_t);
1440 if (mb86a16_read(state, 0x37, &SIG1) != 2) {
1441 dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
1442 return -EREMOTEIO;
1443 }
1444
1445 if (SIG1 > 110) {
1446 S2T = 4; S4T = 1; S5T = 6; ETH = 4; VIA = 6;
1447 wait_t = 7 + (917504 + state->srate / 2) / state->srate;
1448 } else if (SIG1 > 105) {
1449 S2T = 4; S4T = 2; S5T = 8; ETH = 7; VIA = 2;
1450 wait_t = 7 + (1048576 + state->srate / 2) / state->srate;
1451 } else if (SIG1 > 85) {
1452 S2T = 5; S4T = 2; S5T = 8; ETH = 7; VIA = 2;
1453 wait_t = 7 + (1310720 + state->srate / 2) / state->srate;
1454 } else if (SIG1 > 65) {
1455 S2T = 6; S4T = 2; S5T = 8; ETH = 7; VIA = 2;
1456 wait_t = 7 + (1572864 + state->srate / 2) / state->srate;
1457 } else {
1458 S2T = 7; S4T = 2; S5T = 8; ETH = 7; VIA = 2;
1459 wait_t = 7 + (2097152 + state->srate / 2) / state->srate;
1460 }
1461 wait_t *= 2; /* FOS */
1462 S2T_set(state, S2T);
1463 S45T_set(state, S4T, S5T);
1464 Vi_set(state, ETH, VIA);
1465 srst(state);
1466 msleep_interruptible(wait_t);
1467 sync = sync_chk(state, &VIRM);
1468 dprintk(verbose, MB86A16_INFO, 1, "-------- Viterbi=[%d] SYNC=[%d] ---------", VIRM, sync);
1469 if (VIRM) {
1470 if (VIRM == 4) {
1471 /* 5/6 */
1472 if (SIG1 > 110)
1473 wait_t = (786432 + state->srate / 2) / state->srate;
1474 else
1475 wait_t = (1572864 + state->srate / 2) / state->srate;
1476 if (state->srate < 5000)
1477 /* FIXME ! , should be a long wait ! */
1478 msleep_interruptible(wait_t);
1479 else
1480 msleep_interruptible(wait_t);
1481
1482 if (sync_chk(state, &junk) == 0) {
1483 iq_vt_set(state, 1);
1484 FEC_srst(state);
1485 }
1486 }
1487 /* 1/2, 2/3, 3/4, 7/8 */
1488 if (SIG1 > 110)
1489 wait_t = (786432 + state->srate / 2) / state->srate;
1490 else
1491 wait_t = (1572864 + state->srate / 2) / state->srate;
1492 msleep_interruptible(wait_t);
1493 SEQ_set(state, 1);
1494 } else {
1495 dprintk(verbose, MB86A16_INFO, 1, "NO -- SYNC");
1496 SEQ_set(state, 1);
1497 ret = -1;
1498 }
1499 }
1500 } else {
1501 dprintk(verbose, MB86A16_INFO, 1, "NO -- SIGNAL");
1502 ret = -1;
1503 }
1504
1505 sync = sync_chk(state, &junk);
1506 if (sync) {
1507 dprintk(verbose, MB86A16_INFO, 1, "******* SYNC *******");
1508 freqerr_chk(state, state->frequency, state->srate, 1);
1509 ret = 0;
1510 break;
1511 }
1512 }
1513
1514 mb86a16_read(state, 0x15, &agcval);
1515 mb86a16_read(state, 0x26, &cnmval);
1516 dprintk(verbose, MB86A16_INFO, 1, "AGC = %02x CNM = %02x", agcval, cnmval);
1517
1518 return ret;
1519}
1520
1521static int mb86a16_send_diseqc_msg(struct dvb_frontend *fe,
1522 struct dvb_diseqc_master_cmd *cmd)
1523{
1524 struct mb86a16_state *state = fe->demodulator_priv;
1525 int i;
1526 u8 regs;
1527
1528 if (mb86a16_write(state, MB86A16_DCC1, MB86A16_DCC1_DISTA) < 0)
1529 goto err;
1530 if (mb86a16_write(state, MB86A16_DCCOUT, 0x00) < 0)
1531 goto err;
1532 if (mb86a16_write(state, MB86A16_TONEOUT2, 0x04) < 0)
1533 goto err;
1534
1535 regs = 0x18;
1536
1537 if (cmd->msg_len > 5 || cmd->msg_len < 4)
1538 return -EINVAL;
1539
1540 for (i = 0; i < cmd->msg_len; i++) {
1541 if (mb86a16_write(state, regs, cmd->msg[i]) < 0)
1542 goto err;
1543
1544 regs++;
1545 }
1546 i += 0x90;
1547
1548 msleep_interruptible(10);
1549
1550 if (mb86a16_write(state, MB86A16_DCC1, i) < 0)
1551 goto err;
1552 if (mb86a16_write(state, MB86A16_DCCOUT, MB86A16_DCCOUT_DISEN) < 0)
1553 goto err;
1554
1555 return 0;
1556
1557err:
1558 dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
1559 return -EREMOTEIO;
1560}
1561
1562static int mb86a16_send_diseqc_burst(struct dvb_frontend *fe, fe_sec_mini_cmd_t burst)
1563{
1564 struct mb86a16_state *state = fe->demodulator_priv;
1565
1566 switch (burst) {
1567 case SEC_MINI_A:
1568 if (mb86a16_write(state, MB86A16_DCC1, MB86A16_DCC1_DISTA |
1569 MB86A16_DCC1_TBEN |
1570 MB86A16_DCC1_TBO) < 0)
1571 goto err;
1572 if (mb86a16_write(state, MB86A16_DCCOUT, MB86A16_DCCOUT_DISEN) < 0)
1573 goto err;
1574 break;
1575 case SEC_MINI_B:
1576 if (mb86a16_write(state, MB86A16_DCC1, MB86A16_DCC1_DISTA |
1577 MB86A16_DCC1_TBEN) < 0)
1578 goto err;
1579 if (mb86a16_write(state, MB86A16_DCCOUT, MB86A16_DCCOUT_DISEN) < 0)
1580 goto err;
1581 break;
1582 }
1583
1584 return 0;
1585err:
1586 dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
1587 return -EREMOTEIO;
1588}
1589
1590static int mb86a16_set_tone(struct dvb_frontend *fe, fe_sec_tone_mode_t tone)
1591{
1592 struct mb86a16_state *state = fe->demodulator_priv;
1593
1594 switch (tone) {
1595 case SEC_TONE_ON:
1596 if (mb86a16_write(state, MB86A16_TONEOUT2, 0x00) < 0)
1597 goto err;
1598 if (mb86a16_write(state, MB86A16_DCC1, MB86A16_DCC1_DISTA |
1599 MB86A16_DCC1_CTOE) < 0)
1600
1601 goto err;
1602 if (mb86a16_write(state, MB86A16_DCCOUT, MB86A16_DCCOUT_DISEN) < 0)
1603 goto err;
1604 break;
1605 case SEC_TONE_OFF:
1606 if (mb86a16_write(state, MB86A16_TONEOUT2, 0x04) < 0)
1607 goto err;
1608 if (mb86a16_write(state, MB86A16_DCC1, MB86A16_DCC1_DISTA) < 0)
1609 goto err;
1610 if (mb86a16_write(state, MB86A16_DCCOUT, 0x00) < 0)
1611 goto err;
1612 break;
1613 default:
1614 return -EINVAL;
1615 }
1616 return 0;
1617
1618err:
1619 dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
1620 return -EREMOTEIO;
1621}
1622
1623static enum dvbfe_search mb86a16_search(struct dvb_frontend *fe,
1624 struct dvb_frontend_parameters *p)
1625{
1626 struct mb86a16_state *state = fe->demodulator_priv;
1627
1628 state->frequency = p->frequency / 1000;
1629 state->srate = p->u.qpsk.symbol_rate / 1000;
1630
1631 if (!mb86a16_set_fe(state)) {
1632 dprintk(verbose, MB86A16_ERROR, 1, "Succesfully acquired LOCK");
1633 return DVBFE_ALGO_SEARCH_SUCCESS;
1634 }
1635
1636 dprintk(verbose, MB86A16_ERROR, 1, "Lock acquisition failed!");
1637 return DVBFE_ALGO_SEARCH_FAILED;
1638}
1639
1640static void mb86a16_release(struct dvb_frontend *fe)
1641{
1642 struct mb86a16_state *state = fe->demodulator_priv;
1643 kfree(state);
1644}
1645
1646static int mb86a16_init(struct dvb_frontend *fe)
1647{
1648 return 0;
1649}
1650
1651static int mb86a16_sleep(struct dvb_frontend *fe)
1652{
1653 return 0;
1654}
1655
1656static int mb86a16_read_ber(struct dvb_frontend *fe, u32 *ber)
1657{
1658 u8 ber_mon, ber_tab, ber_lsb, ber_mid, ber_msb, ber_tim, ber_rst;
1659 u32 timer;
1660
1661 struct mb86a16_state *state = fe->demodulator_priv;
1662
1663 *ber = 0;
1664 if (mb86a16_read(state, MB86A16_BERMON, &ber_mon) != 2)
1665 goto err;
1666 if (mb86a16_read(state, MB86A16_BERTAB, &ber_tab) != 2)
1667 goto err;
1668 if (mb86a16_read(state, MB86A16_BERLSB, &ber_lsb) != 2)
1669 goto err;
1670 if (mb86a16_read(state, MB86A16_BERMID, &ber_mid) != 2)
1671 goto err;
1672 if (mb86a16_read(state, MB86A16_BERMSB, &ber_msb) != 2)
1673 goto err;
1674 /* BER monitor invalid when BER_EN = 0 */
1675 if (ber_mon & 0x04) {
1676 /* coarse, fast calculation */
1677 *ber = ber_tab & 0x1f;
1678 dprintk(verbose, MB86A16_DEBUG, 1, "BER coarse=[0x%02x]", *ber);
1679 if (ber_mon & 0x01) {
1680 /*
1681 * BER_SEL = 1, The monitored BER is the estimated
1682 * value with a Reed-Solomon decoder error amount at
1683 * the deinterleaver output.
1684 * monitored BER is expressed as a 20 bit output in total
1685 */
1686 ber_rst = ber_mon >> 3;
1687 *ber = (((ber_msb << 8) | ber_mid) << 8) | ber_lsb;
1688 if (ber_rst == 0)
1689 timer = 12500000;
1690 if (ber_rst == 1)
1691 timer = 25000000;
1692 if (ber_rst == 2)
1693 timer = 50000000;
1694 if (ber_rst == 3)
1695 timer = 100000000;
1696
1697 *ber /= timer;
1698 dprintk(verbose, MB86A16_DEBUG, 1, "BER fine=[0x%02x]", *ber);
1699 } else {
1700 /*
1701 * BER_SEL = 0, The monitored BER is the estimated
1702 * value with a Viterbi decoder error amount at the
1703 * QPSK demodulator output.
1704 * monitored BER is expressed as a 24 bit output in total
1705 */
1706 ber_tim = ber_mon >> 1;
1707 *ber = (((ber_msb << 8) | ber_mid) << 8) | ber_lsb;
1708 if (ber_tim == 0)
1709 timer = 16;
1710 if (ber_tim == 1)
1711 timer = 24;
1712
1713 *ber /= 2 ^ timer;
1714 dprintk(verbose, MB86A16_DEBUG, 1, "BER fine=[0x%02x]", *ber);
1715 }
1716 }
1717 return 0;
1718err:
1719 dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
1720 return -EREMOTEIO;
1721}
1722
1723static int mb86a16_read_signal_strength(struct dvb_frontend *fe, u16 *strength)
1724{
1725 u8 agcm = 0;
1726 struct mb86a16_state *state = fe->demodulator_priv;
1727
1728 *strength = 0;
1729 if (mb86a16_read(state, MB86A16_AGCM, &agcm) != 2) {
1730 dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
1731 return -EREMOTEIO;
1732 }
1733
1734 *strength = ((0xff - agcm) * 100) / 256;
1735 dprintk(verbose, MB86A16_DEBUG, 1, "Signal strength=[%d %%]", (u8) *strength);
1736 *strength = (0xffff - 0xff) + agcm;
1737
1738 return 0;
1739}
1740
1741struct cnr {
1742 u8 cn_reg;
1743 u8 cn_val;
1744};
1745
1746static const struct cnr cnr_tab[] = {
1747 { 35, 2 },
1748 { 40, 3 },
1749 { 50, 4 },
1750 { 60, 5 },
1751 { 70, 6 },
1752 { 80, 7 },
1753 { 92, 8 },
1754 { 103, 9 },
1755 { 115, 10 },
1756 { 138, 12 },
1757 { 162, 15 },
1758 { 180, 18 },
1759 { 185, 19 },
1760 { 189, 20 },
1761 { 195, 22 },
1762 { 199, 24 },
1763 { 201, 25 },
1764 { 202, 26 },
1765 { 203, 27 },
1766 { 205, 28 },
1767 { 208, 30 }
1768};
1769
1770static int mb86a16_read_snr(struct dvb_frontend *fe, u16 *snr)
1771{
1772 struct mb86a16_state *state = fe->demodulator_priv;
1773 int i = 0;
1774 int low_tide = 2, high_tide = 30, q_level;
1775 u8 cn;
1776
1777 *snr = 0;
1778 if (mb86a16_read(state, 0x26, &cn) != 2) {
1779 dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
1780 return -EREMOTEIO;
1781 }
1782
1783 for (i = 0; i < ARRAY_SIZE(cnr_tab); i++) {
1784 if (cn < cnr_tab[i].cn_reg) {
1785 *snr = cnr_tab[i].cn_val;
1786 break;
1787 }
1788 }
1789 q_level = (*snr * 100) / (high_tide - low_tide);
1790 dprintk(verbose, MB86A16_ERROR, 1, "SNR (Quality) = [%d dB], Level=%d %%", *snr, q_level);
1791 *snr = (0xffff - 0xff) + *snr;
1792
1793 return 0;
1794}
1795
1796static int mb86a16_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks)
1797{
1798 u8 dist;
1799 struct mb86a16_state *state = fe->demodulator_priv;
1800
1801 if (mb86a16_read(state, MB86A16_DISTMON, &dist) != 2) {
1802 dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
1803 return -EREMOTEIO;
1804 }
1805 *ucblocks = dist;
1806
1807 return 0;
1808}
1809
1810static enum dvbfe_algo mb86a16_frontend_algo(struct dvb_frontend *fe)
1811{
1812 return DVBFE_ALGO_CUSTOM;
1813}
1814
1815static struct dvb_frontend_ops mb86a16_ops = {
1816 .info = {
1817 .name = "Fujitsu MB86A16 DVB-S",
1818 .type = FE_QPSK,
1819 .frequency_min = 950000,
1820 .frequency_max = 2150000,
1821 .frequency_stepsize = 3000,
1822 .frequency_tolerance = 0,
1823 .symbol_rate_min = 1000000,
1824 .symbol_rate_max = 45000000,
1825 .symbol_rate_tolerance = 500,
1826 .caps = FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 |
1827 FE_CAN_FEC_3_4 | FE_CAN_FEC_5_6 |
1828 FE_CAN_FEC_7_8 | FE_CAN_QPSK |
1829 FE_CAN_FEC_AUTO
1830 },
1831 .release = mb86a16_release,
1832
1833 .get_frontend_algo = mb86a16_frontend_algo,
1834 .search = mb86a16_search,
1835 .read_status = mb86a16_read_status,
1836 .init = mb86a16_init,
1837 .sleep = mb86a16_sleep,
1838 .read_status = mb86a16_read_status,
1839
1840 .read_ber = mb86a16_read_ber,
1841 .read_signal_strength = mb86a16_read_signal_strength,
1842 .read_snr = mb86a16_read_snr,
1843 .read_ucblocks = mb86a16_read_ucblocks,
1844
1845 .diseqc_send_master_cmd = mb86a16_send_diseqc_msg,
1846 .diseqc_send_burst = mb86a16_send_diseqc_burst,
1847 .set_tone = mb86a16_set_tone,
1848};
1849
1850struct dvb_frontend *mb86a16_attach(const struct mb86a16_config *config,
1851 struct i2c_adapter *i2c_adap)
1852{
1853 u8 dev_id = 0;
1854 struct mb86a16_state *state = NULL;
1855
1856 state = kmalloc(sizeof(struct mb86a16_state), GFP_KERNEL);
1857 if (state == NULL)
1858 goto error;
1859
1860 state->config = config;
1861 state->i2c_adap = i2c_adap;
1862
1863 mb86a16_read(state, 0x7f, &dev_id);
1864 if (dev_id != 0xfe)
1865 goto error;
1866
1867 memcpy(&state->frontend.ops, &mb86a16_ops, sizeof(struct dvb_frontend_ops));
1868 state->frontend.demodulator_priv = state;
1869 state->frontend.ops.set_voltage = state->config->set_voltage;
1870
1871 return &state->frontend;
1872error:
1873 kfree(state);
1874 return NULL;
1875}
1876EXPORT_SYMBOL(mb86a16_attach);
1877MODULE_LICENSE("GPL");
1878MODULE_AUTHOR("Manu Abraham");
diff --git a/drivers/media/dvb/frontends/mb86a16.h b/drivers/media/dvb/frontends/mb86a16.h
new file mode 100644
index 000000000000..6ea8c376394f
--- /dev/null
+++ b/drivers/media/dvb/frontends/mb86a16.h
@@ -0,0 +1,52 @@
1/*
2 Fujitsu MB86A16 DVB-S/DSS DC Receiver driver
3
4 Copyright (C) Manu Abraham (abraham.manu@gmail.com)
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19*/
20
21#ifndef __MB86A16_H
22#define __MB86A16_H
23
24#include <linux/dvb/frontend.h>
25#include "dvb_frontend.h"
26
27
28struct mb86a16_config {
29 u8 demod_address;
30
31 int (*set_voltage)(struct dvb_frontend *fe, fe_sec_voltage_t voltage);
32};
33
34
35
36#if defined(CONFIG_DVB_MB86A16) || (defined(CONFIG_DVB_MB86A16_MODULE) && defined(MODULE))
37
38extern struct dvb_frontend *mb86a16_attach(const struct mb86a16_config *config,
39 struct i2c_adapter *i2c_adap);
40
41#else
42
43static inline struct dvb_frontend *mb86a16_attach(const struct mb86a16_config *config,
44 struct i2c_adapter *i2c_adap)
45{
46 printk(KERN_WARNING "%s: Driver disabled by Kconfig\n", __func__);
47 return NULL;
48}
49
50#endif /* CONFIG_DVB_MB86A16 */
51
52#endif /* __MB86A16_H */
diff --git a/drivers/media/dvb/frontends/mb86a16_priv.h b/drivers/media/dvb/frontends/mb86a16_priv.h
new file mode 100644
index 000000000000..360a35acfe84
--- /dev/null
+++ b/drivers/media/dvb/frontends/mb86a16_priv.h
@@ -0,0 +1,151 @@
1/*
2 Fujitsu MB86A16 DVB-S/DSS DC Receiver driver
3
4 Copyright (C) Manu Abraham (abraham.manu@gmail.com)
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19*/
20
21#ifndef __MB86A16_PRIV_H
22#define __MB86A16_PRIV_H
23
24#define MB86A16_TSOUT 0x00
25#define MB86A16_TSOUT_HIZSEL (0x01 << 5)
26#define MB86A16_TSOUT_HIZCNTI (0x01 << 4)
27#define MB86A16_TSOUT_MODE (0x01 << 3)
28#define MB86A16_TSOUT_ORDER (0x01 << 2)
29#define MB86A16_TSOUT_ERROR (0x01 << 1)
30#define Mb86A16_TSOUT_EDGE (0x01 << 0)
31
32#define MB86A16_FEC 0x01
33#define MB86A16_FEC_FSYNC (0x01 << 5)
34#define MB86A16_FEC_PCKB8 (0x01 << 4)
35#define MB86A16_FEC_DVDS (0x01 << 3)
36#define MB86A16_FEC_EREN (0x01 << 2)
37#define Mb86A16_FEC_RSEN (0x01 << 1)
38#define MB86A16_FEC_DIEN (0x01 << 0)
39
40#define MB86A16_AGC 0x02
41#define MB86A16_AGC_AGMD (0x01 << 6)
42#define MB86A16_AGC_AGCW (0x0f << 2)
43#define MB86A16_AGC_AGCP (0x01 << 1)
44#define MB86A16_AGC_AGCR (0x01 << 0)
45
46#define MB86A16_SRATE1 0x03
47#define MB86A16_SRATE1_DECI (0x07 << 2)
48#define MB86A16_SRATE1_CSEL (0x01 << 1)
49#define MB86A16_SRATE1_RSEL (0x01 << 0)
50
51#define MB86A16_SRATE2 0x04
52#define MB86A16_SRATE2_STOFSL (0xff << 0)
53
54#define MB86A16_SRATE3 0x05
55#define MB86A16_SRATE2_STOFSH (0xff << 0)
56
57#define MB86A16_VITERBI 0x06
58#define MB86A16_FRAMESYNC 0x07
59#define MB86A16_CRLFILTCOEF1 0x08
60#define MB86A16_CRLFILTCOEF2 0x09
61#define MB86A16_STRFILTCOEF1 0x0a
62#define MB86A16_STRFILTCOEF2 0x0b
63#define MB86A16_RESET 0x0c
64#define MB86A16_STATUS 0x0d
65#define MB86A16_AFCML 0x0e
66#define MB86A16_AFCMH 0x0f
67#define MB86A16_BERMON 0x10
68#define MB86A16_BERTAB 0x11
69#define MB86A16_BERLSB 0x12
70#define MB86A16_BERMID 0x13
71#define MB86A16_BERMSB 0x14
72#define MB86A16_AGCM 0x15
73
74#define MB86A16_DCC1 0x16
75#define MB86A16_DCC1_DISTA (0x01 << 7)
76#define MB86A16_DCC1_PRTY (0x01 << 6)
77#define MB86A16_DCC1_CTOE (0x01 << 5)
78#define MB86A16_DCC1_TBEN (0x01 << 4)
79#define MB86A16_DCC1_TBO (0x01 << 3)
80#define MB86A16_DCC1_NUM (0x07 << 0)
81
82#define MB86A16_DCC2 0x17
83#define MB86A16_DCC2_DCBST (0x01 << 0)
84
85#define MB86A16_DCC3 0x18
86#define MB86A16_DCC3_CODE0 (0xff << 0)
87
88#define MB86A16_DCC4 0x19
89#define MB86A16_DCC4_CODE1 (0xff << 0)
90
91#define MB86A16_DCC5 0x1a
92#define MB86A16_DCC5_CODE2 (0xff << 0)
93
94#define MB86A16_DCC6 0x1b
95#define MB86A16_DCC6_CODE3 (0xff << 0)
96
97#define MB86A16_DCC7 0x1c
98#define MB86A16_DCC7_CODE4 (0xff << 0)
99
100#define MB86A16_DCC8 0x1d
101#define MB86A16_DCC8_CODE5 (0xff << 0)
102
103#define MB86A16_DCCOUT 0x1e
104#define MB86A16_DCCOUT_DISEN (0x01 << 0)
105
106#define MB86A16_TONEOUT1 0x1f
107#define MB86A16_TONE_TDIVL (0xff << 0)
108
109#define MB86A16_TONEOUT2 0x20
110#define MB86A16_TONE_TMD (0x03 << 2)
111#define MB86A16_TONE_TDIVH (0x03 << 0)
112
113#define MB86A16_FREQ1 0x21
114#define MB86A16_FREQ2 0x22
115#define MB86A16_FREQ3 0x23
116#define MB86A16_FREQ4 0x24
117#define MB86A16_FREQSET 0x25
118#define MB86A16_CNM 0x26
119#define MB86A16_PORT0 0x27
120#define MB86A16_PORT1 0x28
121#define MB86A16_DRCFILT 0x29
122#define MB86A16_AFC 0x2a
123#define MB86A16_AFCEXL 0x2b
124#define MB86A16_AFCEXH 0x2c
125#define MB86A16_DAGC 0x2d
126#define MB86A16_SEQMODE 0x32
127#define MB86A16_S0S1T 0x33
128#define MB86A16_S2S3T 0x34
129#define MB86A16_S4S5T 0x35
130#define MB86A16_CNTMR 0x36
131#define MB86A16_SIG1 0x37
132#define MB86A16_SIG2 0x38
133#define MB86A16_VIMAG 0x39
134#define MB86A16_VISET1 0x3a
135#define MB86A16_VISET2 0x3b
136#define MB86A16_VISET3 0x3c
137#define MB86A16_FAGCS1 0x3d
138#define MB86A16_FAGCS2 0x3e
139#define MB86A16_FAGCS3 0x3f
140#define MB86A16_FAGCS4 0x40
141#define MB86A16_FAGCS5 0x41
142#define MB86A16_FAGCS6 0x42
143#define MB86A16_CRM 0x43
144#define MB86A16_STRM 0x44
145#define MB86A16_DAGCML 0x45
146#define MB86A16_DAGCMH 0x46
147#define MB86A16_QPSKTST 0x49
148#define MB86A16_DISTMON 0x52
149#define MB86A16_VERSION 0x7f
150
151#endif /* __MB86A16_PRIV_H */
diff --git a/drivers/media/dvb/frontends/tda10021.c b/drivers/media/dvb/frontends/tda10021.c
index 6c1dbf9288d8..6ca533ea0f0e 100644
--- a/drivers/media/dvb/frontends/tda10021.c
+++ b/drivers/media/dvb/frontends/tda10021.c
@@ -426,6 +426,10 @@ struct dvb_frontend* tda10021_attach(const struct tda1002x_config* config,
426 id = tda10021_readreg(state, 0x1a); 426 id = tda10021_readreg(state, 0x1a);
427 if ((id & 0xf0) != 0x70) goto error; 427 if ((id & 0xf0) != 0x70) goto error;
428 428
429 /* Don't claim TDA10023 */
430 if (id == 0x7d)
431 goto error;
432
429 printk("TDA10021: i2c-addr = 0x%02x, id = 0x%02x\n", 433 printk("TDA10021: i2c-addr = 0x%02x, id = 0x%02x\n",
430 state->config->demod_address, id); 434 state->config->demod_address, id);
431 435
diff --git a/drivers/media/dvb/frontends/tda665x.c b/drivers/media/dvb/frontends/tda665x.c
new file mode 100644
index 000000000000..87d52739c828
--- /dev/null
+++ b/drivers/media/dvb/frontends/tda665x.c
@@ -0,0 +1,257 @@
1/*
2 TDA665x tuner driver
3 Copyright (C) Manu Abraham (abraham.manu@gmail.com)
4
5 This program is free software; you can redistribute it and/or modify
6 it under the terms of the GNU General Public License as published by
7 the Free Software Foundation; either version 2 of the License, or
8 (at your option) any later version.
9
10 This program is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 GNU General Public License for more details.
14
15 You should have received a copy of the GNU General Public License
16 along with this program; if not, write to the Free Software
17 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
18*/
19
20#include <linux/init.h>
21#include <linux/kernel.h>
22#include <linux/module.h>
23
24#include "dvb_frontend.h"
25#include "tda665x.h"
26
27struct tda665x_state {
28 struct dvb_frontend *fe;
29 struct i2c_adapter *i2c;
30 const struct tda665x_config *config;
31
32 u32 frequency;
33 u32 bandwidth;
34};
35
36static int tda665x_read(struct tda665x_state *state, u8 *buf)
37{
38 const struct tda665x_config *config = state->config;
39 int err = 0;
40 struct i2c_msg msg = { .addr = config->addr, .flags = I2C_M_RD, .buf = buf, .len = 2 };
41
42 err = i2c_transfer(state->i2c, &msg, 1);
43 if (err != 1)
44 goto exit;
45
46 return err;
47exit:
48 printk(KERN_ERR "%s: I/O Error err=<%d>\n", __func__, err);
49 return err;
50}
51
52static int tda665x_write(struct tda665x_state *state, u8 *buf, u8 length)
53{
54 const struct tda665x_config *config = state->config;
55 int err = 0;
56 struct i2c_msg msg = { .addr = config->addr, .flags = 0, .buf = buf, .len = length };
57
58 err = i2c_transfer(state->i2c, &msg, 1);
59 if (err != 1)
60 goto exit;
61
62 return err;
63exit:
64 printk(KERN_ERR "%s: I/O Error err=<%d>\n", __func__, err);
65 return err;
66}
67
68static int tda665x_get_state(struct dvb_frontend *fe,
69 enum tuner_param param,
70 struct tuner_state *tstate)
71{
72 struct tda665x_state *state = fe->tuner_priv;
73 int err = 0;
74
75 switch (param) {
76 case DVBFE_TUNER_FREQUENCY:
77 tstate->frequency = state->frequency;
78 break;
79 case DVBFE_TUNER_BANDWIDTH:
80 break;
81 default:
82 printk(KERN_ERR "%s: Unknown parameter (param=%d)\n", __func__, param);
83 err = -EINVAL;
84 break;
85 }
86
87 return err;
88}
89
90static int tda665x_get_status(struct dvb_frontend *fe, u32 *status)
91{
92 struct tda665x_state *state = fe->tuner_priv;
93 u8 result = 0;
94 int err = 0;
95
96 *status = 0;
97
98 err = tda665x_read(state, &result);
99 if (err < 0)
100 goto exit;
101
102 if ((result >> 6) & 0x01) {
103 printk(KERN_DEBUG "%s: Tuner Phase Locked\n", __func__);
104 *status = 1;
105 }
106
107 return err;
108exit:
109 printk(KERN_ERR "%s: I/O Error\n", __func__);
110 return err;
111}
112
113static int tda665x_set_state(struct dvb_frontend *fe,
114 enum tuner_param param,
115 struct tuner_state *tstate)
116{
117 struct tda665x_state *state = fe->tuner_priv;
118 const struct tda665x_config *config = state->config;
119 u32 frequency, status = 0;
120 u8 buf[4];
121 int err = 0;
122
123 if (param & DVBFE_TUNER_FREQUENCY) {
124
125 frequency = tstate->frequency;
126 if ((frequency < config->frequency_max) || (frequency > config->frequency_min)) {
127 printk(KERN_ERR "%s: Frequency beyond limits, frequency=%d\n", __func__, frequency);
128 return -EINVAL;
129 }
130
131 frequency += config->frequency_offst;
132 frequency *= config->ref_multiplier;
133 frequency += config->ref_divider >> 1;
134 frequency /= config->ref_divider;
135
136 buf[0] = (u8) (frequency & 0x7f00) >> 8;
137 buf[1] = (u8) (frequency & 0x00ff) >> 0;
138 buf[2] = 0x80 | 0x40 | 0x02;
139 buf[3] = 0x00;
140
141 /* restore frequency */
142 frequency = tstate->frequency;
143
144 if (frequency < 153000000) {
145 /* VHF-L */
146 buf[3] |= 0x01; /* fc, Low Band, 47 - 153 MHz */
147 if (frequency < 68000000)
148 buf[3] |= 0x40; /* 83uA */
149 if (frequency < 1040000000)
150 buf[3] |= 0x60; /* 122uA */
151 if (frequency < 1250000000)
152 buf[3] |= 0x80; /* 163uA */
153 else
154 buf[3] |= 0xa0; /* 254uA */
155 } else if (frequency < 438000000) {
156 /* VHF-H */
157 buf[3] |= 0x02; /* fc, Mid Band, 153 - 438 MHz */
158 if (frequency < 230000000)
159 buf[3] |= 0x40;
160 if (frequency < 300000000)
161 buf[3] |= 0x60;
162 else
163 buf[3] |= 0x80;
164 } else {
165 /* UHF */
166 buf[3] |= 0x04; /* fc, High Band, 438 - 862 MHz */
167 if (frequency < 470000000)
168 buf[3] |= 0x60;
169 if (frequency < 526000000)
170 buf[3] |= 0x80;
171 else
172 buf[3] |= 0xa0;
173 }
174
175 /* Set params */
176 err = tda665x_write(state, buf, 5);
177 if (err < 0)
178 goto exit;
179
180 /* sleep for some time */
181 printk(KERN_DEBUG "%s: Waiting to Phase LOCK\n", __func__);
182 msleep(20);
183 /* check status */
184 err = tda665x_get_status(fe, &status);
185 if (err < 0)
186 goto exit;
187
188 if (status == 1) {
189 printk(KERN_DEBUG "%s: Tuner Phase locked: status=%d\n", __func__, status);
190 state->frequency = frequency; /* cache successful state */
191 } else {
192 printk(KERN_ERR "%s: No Phase lock: status=%d\n", __func__, status);
193 }
194 } else {
195 printk(KERN_ERR "%s: Unknown parameter (param=%d)\n", __func__, param);
196 return -EINVAL;
197 }
198
199 return 0;
200exit:
201 printk(KERN_ERR "%s: I/O Error\n", __func__);
202 return err;
203}
204
205static int tda665x_release(struct dvb_frontend *fe)
206{
207 struct tda665x_state *state = fe->tuner_priv;
208
209 fe->tuner_priv = NULL;
210 kfree(state);
211 return 0;
212}
213
214static struct dvb_tuner_ops tda665x_ops = {
215
216 .set_state = tda665x_set_state,
217 .get_state = tda665x_get_state,
218 .get_status = tda665x_get_status,
219 .release = tda665x_release
220};
221
222struct dvb_frontend *tda665x_attach(struct dvb_frontend *fe,
223 const struct tda665x_config *config,
224 struct i2c_adapter *i2c)
225{
226 struct tda665x_state *state = NULL;
227 struct dvb_tuner_info *info;
228
229 state = kzalloc(sizeof(struct tda665x_state), GFP_KERNEL);
230 if (state == NULL)
231 goto exit;
232
233 state->config = config;
234 state->i2c = i2c;
235 state->fe = fe;
236 fe->tuner_priv = state;
237 fe->ops.tuner_ops = tda665x_ops;
238 info = &fe->ops.tuner_ops.info;
239
240 memcpy(info->name, config->name, sizeof(config->name));
241 info->frequency_min = config->frequency_min;
242 info->frequency_max = config->frequency_max;
243 info->frequency_step = config->frequency_offst;
244
245 printk(KERN_DEBUG "%s: Attaching TDA665x (%s) tuner\n", __func__, info->name);
246
247 return fe;
248
249exit:
250 kfree(state);
251 return NULL;
252}
253EXPORT_SYMBOL(tda665x_attach);
254
255MODULE_DESCRIPTION("TDA665x driver");
256MODULE_AUTHOR("Manu Abraham");
257MODULE_LICENSE("GPL");
diff --git a/drivers/media/dvb/frontends/tda665x.h b/drivers/media/dvb/frontends/tda665x.h
new file mode 100644
index 000000000000..ec7927aa75ae
--- /dev/null
+++ b/drivers/media/dvb/frontends/tda665x.h
@@ -0,0 +1,52 @@
1/*
2 TDA665x tuner driver
3 Copyright (C) Manu Abraham (abraham.manu@gmail.com)
4
5 This program is free software; you can redistribute it and/or modify
6 it under the terms of the GNU General Public License as published by
7 the Free Software Foundation; either version 2 of the License, or
8 (at your option) any later version.
9
10 This program is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 GNU General Public License for more details.
14
15 You should have received a copy of the GNU General Public License
16 along with this program; if not, write to the Free Software
17 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
18*/
19
20#ifndef __TDA665x_H
21#define __TDA665x_H
22
23struct tda665x_config {
24 char name[128];
25
26 u8 addr;
27 u32 frequency_min;
28 u32 frequency_max;
29 u32 frequency_offst;
30 u32 ref_multiplier;
31 u32 ref_divider;
32};
33
34#if defined(CONFIG_DVB_TDA665x) || (defined(CONFIG_DVB_TDA665x_MODULE) && defined(MODULE))
35
36extern struct dvb_frontend *tda665x_attach(struct dvb_frontend *fe,
37 const struct tda665x_config *config,
38 struct i2c_adapter *i2c);
39
40#else
41
42static inline struct dvb_frontend *tda665x_attach(struct dvb_frontend *fe,
43 const struct tda665x_config *config,
44 struct i2c_adapter *i2c)
45{
46 printk(KERN_WARNING "%s: Driver disabled by Kconfig\n", __func__);
47 return NULL;
48}
49
50#endif /* CONFIG_DVB_TDA665x */
51
52#endif /* __TDA665x_H */
diff --git a/drivers/media/dvb/mantis/Kconfig b/drivers/media/dvb/mantis/Kconfig
new file mode 100644
index 000000000000..f7b72a32adf3
--- /dev/null
+++ b/drivers/media/dvb/mantis/Kconfig
@@ -0,0 +1,32 @@
1config MANTIS_CORE
2 tristate "Mantis/Hopper PCI bridge based devices"
3 depends on PCI && I2C && INPUT
4
5 help
6 Support for PCI cards based on the Mantis and Hopper PCi bridge.
7
8 Say Y if you own such a device and want to use it.
9
10config DVB_MANTIS
11 tristate "MANTIS based cards"
12 depends on MANTIS_CORE && DVB_CORE && PCI && I2C
13 select DVB_MB86A16
14 select DVB_ZL10353
15 select DVB_STV0299
16 select DVB_PLL
17 help
18 Support for PCI cards based on the Mantis PCI bridge.
19 Say Y when you have a Mantis based DVB card and want to use it.
20
21 If unsure say N.
22
23config DVB_HOPPER
24 tristate "HOPPER based cards"
25 depends on MANTIS_CORE && DVB_CORE && PCI && I2C
26 select DVB_ZL10353
27 select DVB_PLL
28 help
29 Support for PCI cards based on the Hopper PCI bridge.
30 Say Y when you have a Hopper based DVB card and want to use it.
31
32 If unsure say N
diff --git a/drivers/media/dvb/mantis/Makefile b/drivers/media/dvb/mantis/Makefile
new file mode 100644
index 000000000000..98dc5cd258ac
--- /dev/null
+++ b/drivers/media/dvb/mantis/Makefile
@@ -0,0 +1,28 @@
1mantis_core-objs := mantis_ioc.o \
2 mantis_uart.o \
3 mantis_dma.o \
4 mantis_pci.o \
5 mantis_i2c.o \
6 mantis_dvb.o \
7 mantis_evm.o \
8 mantis_hif.o \
9 mantis_ca.o \
10 mantis_pcmcia.o \
11 mantis_input.o
12
13mantis-objs := mantis_cards.o \
14 mantis_vp1033.o \
15 mantis_vp1034.o \
16 mantis_vp1041.o \
17 mantis_vp2033.o \
18 mantis_vp2040.o \
19 mantis_vp3030.o
20
21hopper-objs := hopper_cards.o \
22 hopper_vp3028.o
23
24obj-$(CONFIG_MANTIS_CORE) += mantis_core.o
25obj-$(CONFIG_DVB_MANTIS) += mantis.o
26obj-$(CONFIG_DVB_HOPPER) += hopper.o
27
28EXTRA_CFLAGS = -Idrivers/media/dvb/dvb-core/ -Idrivers/media/dvb/frontends/
diff --git a/drivers/media/dvb/mantis/hopper_cards.c b/drivers/media/dvb/mantis/hopper_cards.c
new file mode 100644
index 000000000000..d073c61e3c0d
--- /dev/null
+++ b/drivers/media/dvb/mantis/hopper_cards.c
@@ -0,0 +1,275 @@
1/*
2 Hopper PCI bridge driver
3
4 Copyright (C) Manu Abraham (abraham.manu@gmail.com)
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19*/
20
21#include <linux/module.h>
22#include <linux/moduleparam.h>
23#include <linux/kernel.h>
24#include <linux/pci.h>
25#include <asm/irq.h>
26#include <linux/interrupt.h>
27
28#include "dmxdev.h"
29#include "dvbdev.h"
30#include "dvb_demux.h"
31#include "dvb_frontend.h"
32#include "dvb_net.h"
33
34#include "mantis_common.h"
35#include "hopper_vp3028.h"
36#include "mantis_dma.h"
37#include "mantis_dvb.h"
38#include "mantis_uart.h"
39#include "mantis_ioc.h"
40#include "mantis_pci.h"
41#include "mantis_i2c.h"
42#include "mantis_reg.h"
43
44static unsigned int verbose;
45module_param(verbose, int, 0644);
46MODULE_PARM_DESC(verbose, "verbose startup messages, default is 1 (yes)");
47
48#define DRIVER_NAME "Hopper"
49
50static char *label[10] = {
51 "DMA",
52 "IRQ-0",
53 "IRQ-1",
54 "OCERR",
55 "PABRT",
56 "RIPRR",
57 "PPERR",
58 "FTRGT",
59 "RISCI",
60 "RACK"
61};
62
63static int devs;
64
65static irqreturn_t hopper_irq_handler(int irq, void *dev_id)
66{
67 u32 stat = 0, mask = 0, lstat = 0, mstat = 0;
68 u32 rst_stat = 0, rst_mask = 0;
69
70 struct mantis_pci *mantis;
71 struct mantis_ca *ca;
72
73 mantis = (struct mantis_pci *) dev_id;
74 if (unlikely(mantis == NULL)) {
75 dprintk(MANTIS_ERROR, 1, "Mantis == NULL");
76 return IRQ_NONE;
77 }
78 ca = mantis->mantis_ca;
79
80 stat = mmread(MANTIS_INT_STAT);
81 mask = mmread(MANTIS_INT_MASK);
82 mstat = lstat = stat & ~MANTIS_INT_RISCSTAT;
83 if (!(stat & mask))
84 return IRQ_NONE;
85
86 rst_mask = MANTIS_GPIF_WRACK |
87 MANTIS_GPIF_OTHERR |
88 MANTIS_SBUF_WSTO |
89 MANTIS_GPIF_EXTIRQ;
90
91 rst_stat = mmread(MANTIS_GPIF_STATUS);
92 rst_stat &= rst_mask;
93 mmwrite(rst_stat, MANTIS_GPIF_STATUS);
94
95 mantis->mantis_int_stat = stat;
96 mantis->mantis_int_mask = mask;
97 dprintk(MANTIS_DEBUG, 0, "\n-- Stat=<%02x> Mask=<%02x> --", stat, mask);
98 if (stat & MANTIS_INT_RISCEN) {
99 dprintk(MANTIS_DEBUG, 0, "<%s>", label[0]);
100 }
101 if (stat & MANTIS_INT_IRQ0) {
102 dprintk(MANTIS_DEBUG, 0, "<%s>", label[1]);
103 mantis->gpif_status = rst_stat;
104 wake_up(&ca->hif_write_wq);
105 schedule_work(&ca->hif_evm_work);
106 }
107 if (stat & MANTIS_INT_IRQ1) {
108 dprintk(MANTIS_DEBUG, 0, "<%s>", label[2]);
109 schedule_work(&mantis->uart_work);
110 }
111 if (stat & MANTIS_INT_OCERR) {
112 dprintk(MANTIS_DEBUG, 0, "<%s>", label[3]);
113 }
114 if (stat & MANTIS_INT_PABORT) {
115 dprintk(MANTIS_DEBUG, 0, "<%s>", label[4]);
116 }
117 if (stat & MANTIS_INT_RIPERR) {
118 dprintk(MANTIS_DEBUG, 0, "<%s>", label[5]);
119 }
120 if (stat & MANTIS_INT_PPERR) {
121 dprintk(MANTIS_DEBUG, 0, "<%s>", label[6]);
122 }
123 if (stat & MANTIS_INT_FTRGT) {
124 dprintk(MANTIS_DEBUG, 0, "<%s>", label[7]);
125 }
126 if (stat & MANTIS_INT_RISCI) {
127 dprintk(MANTIS_DEBUG, 0, "<%s>", label[8]);
128 mantis->finished_block = (stat & MANTIS_INT_RISCSTAT) >> 28;
129 tasklet_schedule(&mantis->tasklet);
130 }
131 if (stat & MANTIS_INT_I2CDONE) {
132 dprintk(MANTIS_DEBUG, 0, "<%s>", label[9]);
133 wake_up(&mantis->i2c_wq);
134 }
135 mmwrite(stat, MANTIS_INT_STAT);
136 stat &= ~(MANTIS_INT_RISCEN | MANTIS_INT_I2CDONE |
137 MANTIS_INT_I2CRACK | MANTIS_INT_PCMCIA7 |
138 MANTIS_INT_PCMCIA6 | MANTIS_INT_PCMCIA5 |
139 MANTIS_INT_PCMCIA4 | MANTIS_INT_PCMCIA3 |
140 MANTIS_INT_PCMCIA2 | MANTIS_INT_PCMCIA1 |
141 MANTIS_INT_PCMCIA0 | MANTIS_INT_IRQ1 |
142 MANTIS_INT_IRQ0 | MANTIS_INT_OCERR |
143 MANTIS_INT_PABORT | MANTIS_INT_RIPERR |
144 MANTIS_INT_PPERR | MANTIS_INT_FTRGT |
145 MANTIS_INT_RISCI);
146
147 if (stat)
148 dprintk(MANTIS_DEBUG, 0, "<Unknown> Stat=<%02x> Mask=<%02x>", stat, mask);
149
150 dprintk(MANTIS_DEBUG, 0, "\n");
151 return IRQ_HANDLED;
152}
153
154static int __devinit hopper_pci_probe(struct pci_dev *pdev, const struct pci_device_id *pci_id)
155{
156 struct mantis_pci *mantis;
157 struct mantis_hwconfig *config;
158 int err = 0;
159
160 mantis = kzalloc(sizeof(struct mantis_pci), GFP_KERNEL);
161 if (mantis == NULL) {
162 printk(KERN_ERR "%s ERROR: Out of memory\n", __func__);
163 err = -ENOMEM;
164 goto fail0;
165 }
166
167 mantis->num = devs;
168 mantis->verbose = verbose;
169 mantis->pdev = pdev;
170 config = (struct mantis_hwconfig *) pci_id->driver_data;
171 config->irq_handler = &hopper_irq_handler;
172 mantis->hwconfig = config;
173
174 err = mantis_pci_init(mantis);
175 if (err) {
176 dprintk(MANTIS_ERROR, 1, "ERROR: Mantis PCI initialization failed <%d>", err);
177 goto fail1;
178 }
179
180 err = mantis_stream_control(mantis, STREAM_TO_HIF);
181 if (err < 0) {
182 dprintk(MANTIS_ERROR, 1, "ERROR: Mantis stream control failed <%d>", err);
183 goto fail1;
184 }
185
186 err = mantis_i2c_init(mantis);
187 if (err < 0) {
188 dprintk(MANTIS_ERROR, 1, "ERROR: Mantis I2C initialization failed <%d>", err);
189 goto fail2;
190 }
191
192 err = mantis_get_mac(mantis);
193 if (err < 0) {
194 dprintk(MANTIS_ERROR, 1, "ERROR: Mantis MAC address read failed <%d>", err);
195 goto fail2;
196 }
197
198 err = mantis_dma_init(mantis);
199 if (err < 0) {
200 dprintk(MANTIS_ERROR, 1, "ERROR: Mantis DMA initialization failed <%d>", err);
201 goto fail3;
202 }
203
204 err = mantis_dvb_init(mantis);
205 if (err < 0) {
206 dprintk(MANTIS_ERROR, 1, "ERROR: Mantis DVB initialization failed <%d>", err);
207 goto fail4;
208 }
209 devs++;
210
211 return err;
212
213fail4:
214 dprintk(MANTIS_ERROR, 1, "ERROR: Mantis DMA exit! <%d>", err);
215 mantis_dma_exit(mantis);
216
217fail3:
218 dprintk(MANTIS_ERROR, 1, "ERROR: Mantis I2C exit! <%d>", err);
219 mantis_i2c_exit(mantis);
220
221fail2:
222 dprintk(MANTIS_ERROR, 1, "ERROR: Mantis PCI exit! <%d>", err);
223 mantis_pci_exit(mantis);
224
225fail1:
226 dprintk(MANTIS_ERROR, 1, "ERROR: Mantis free! <%d>", err);
227 kfree(mantis);
228
229fail0:
230 return err;
231}
232
233static void __devexit hopper_pci_remove(struct pci_dev *pdev)
234{
235 struct mantis_pci *mantis = pci_get_drvdata(pdev);
236
237 if (mantis) {
238 mantis_dvb_exit(mantis);
239 mantis_dma_exit(mantis);
240 mantis_i2c_exit(mantis);
241 mantis_pci_exit(mantis);
242 kfree(mantis);
243 }
244 return;
245
246}
247
248static struct pci_device_id hopper_pci_table[] = {
249 MAKE_ENTRY(TWINHAN_TECHNOLOGIES, MANTIS_VP_3028_DVB_T, &vp3028_config),
250 { }
251};
252
253static struct pci_driver hopper_pci_driver = {
254 .name = DRIVER_NAME,
255 .id_table = hopper_pci_table,
256 .probe = hopper_pci_probe,
257 .remove = hopper_pci_remove,
258};
259
260static int __devinit hopper_init(void)
261{
262 return pci_register_driver(&hopper_pci_driver);
263}
264
265static void __devexit hopper_exit(void)
266{
267 return pci_unregister_driver(&hopper_pci_driver);
268}
269
270module_init(hopper_init);
271module_exit(hopper_exit);
272
273MODULE_DESCRIPTION("HOPPER driver");
274MODULE_AUTHOR("Manu Abraham");
275MODULE_LICENSE("GPL");
diff --git a/drivers/media/dvb/mantis/hopper_vp3028.c b/drivers/media/dvb/mantis/hopper_vp3028.c
new file mode 100644
index 000000000000..96674c78e86b
--- /dev/null
+++ b/drivers/media/dvb/mantis/hopper_vp3028.c
@@ -0,0 +1,88 @@
1/*
2 Hopper VP-3028 driver
3
4 Copyright (C) Manu Abraham (abraham.manu@gmail.com)
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19*/
20
21#include <linux/signal.h>
22#include <linux/sched.h>
23#include <linux/interrupt.h>
24
25#include "dmxdev.h"
26#include "dvbdev.h"
27#include "dvb_demux.h"
28#include "dvb_frontend.h"
29#include "dvb_net.h"
30
31#include "zl10353.h"
32#include "mantis_common.h"
33#include "mantis_ioc.h"
34#include "mantis_dvb.h"
35#include "hopper_vp3028.h"
36
37struct zl10353_config hopper_vp3028_config = {
38 .demod_address = 0x0f,
39};
40
41#define MANTIS_MODEL_NAME "VP-3028"
42#define MANTIS_DEV_TYPE "DVB-T"
43
44static int vp3028_frontend_init(struct mantis_pci *mantis, struct dvb_frontend *fe)
45{
46 struct i2c_adapter *adapter = &mantis->adapter;
47 struct mantis_hwconfig *config = mantis->hwconfig;
48 int err = 0;
49
50 gpio_set_bits(mantis, config->reset, 0);
51 msleep(100);
52 err = mantis_frontend_power(mantis, POWER_ON);
53 msleep(100);
54 gpio_set_bits(mantis, config->reset, 1);
55
56 err = mantis_frontend_power(mantis, POWER_ON);
57 if (err == 0) {
58 msleep(250);
59 dprintk(MANTIS_ERROR, 1, "Probing for 10353 (DVB-T)");
60 fe = zl10353_attach(&hopper_vp3028_config, adapter);
61
62 if (!fe)
63 return -1;
64 } else {
65 dprintk(MANTIS_ERROR, 1, "Frontend on <%s> POWER ON failed! <%d>",
66 adapter->name,
67 err);
68
69 return -EIO;
70 }
71 dprintk(MANTIS_ERROR, 1, "Done!");
72
73 return 0;
74}
75
76struct mantis_hwconfig vp3028_config = {
77 .model_name = MANTIS_MODEL_NAME,
78 .dev_type = MANTIS_DEV_TYPE,
79 .ts_size = MANTIS_TS_188,
80
81 .baud_rate = MANTIS_BAUD_9600,
82 .parity = MANTIS_PARITY_NONE,
83 .bytes = 0,
84
85 .frontend_init = vp3028_frontend_init,
86 .power = GPIF_A00,
87 .reset = GPIF_A03,
88};
diff --git a/drivers/media/dvb/mantis/hopper_vp3028.h b/drivers/media/dvb/mantis/hopper_vp3028.h
new file mode 100644
index 000000000000..57239498bc87
--- /dev/null
+++ b/drivers/media/dvb/mantis/hopper_vp3028.h
@@ -0,0 +1,30 @@
1/*
2 Hopper VP-3028 driver
3
4 Copyright (C) Manu Abraham (abraham.manu@gmail.com)
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19*/
20
21#ifndef __MANTIS_VP3028_H
22#define __MANTIS_VP3028_H
23
24#include "mantis_common.h"
25
26#define MANTIS_VP_3028_DVB_T 0x0028
27
28extern struct mantis_hwconfig vp3028_config;
29
30#endif /* __MANTIS_VP3028_H */
diff --git a/drivers/media/dvb/mantis/mantis_ca.c b/drivers/media/dvb/mantis/mantis_ca.c
new file mode 100644
index 000000000000..403ce043d00e
--- /dev/null
+++ b/drivers/media/dvb/mantis/mantis_ca.c
@@ -0,0 +1,207 @@
1/*
2 Mantis PCI bridge driver
3
4 Copyright (C) Manu Abraham (abraham.manu@gmail.com)
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19*/
20
21#include <linux/signal.h>
22#include <linux/sched.h>
23#include <linux/interrupt.h>
24
25#include "dmxdev.h"
26#include "dvbdev.h"
27#include "dvb_demux.h"
28#include "dvb_frontend.h"
29#include "dvb_net.h"
30
31#include "mantis_common.h"
32#include "mantis_link.h"
33#include "mantis_hif.h"
34#include "mantis_reg.h"
35
36#include "mantis_ca.h"
37
38static int mantis_ca_read_attr_mem(struct dvb_ca_en50221 *en50221, int slot, int addr)
39{
40 struct mantis_ca *ca = en50221->data;
41 struct mantis_pci *mantis = ca->ca_priv;
42
43 dprintk(MANTIS_DEBUG, 1, "Slot(%d): Request Attribute Mem Read", slot);
44
45 if (slot != 0)
46 return -EINVAL;
47
48 return mantis_hif_read_mem(ca, addr);
49}
50
51static int mantis_ca_write_attr_mem(struct dvb_ca_en50221 *en50221, int slot, int addr, u8 data)
52{
53 struct mantis_ca *ca = en50221->data;
54 struct mantis_pci *mantis = ca->ca_priv;
55
56 dprintk(MANTIS_DEBUG, 1, "Slot(%d): Request Attribute Mem Write", slot);
57
58 if (slot != 0)
59 return -EINVAL;
60
61 return mantis_hif_write_mem(ca, addr, data);
62}
63
64static int mantis_ca_read_cam_ctl(struct dvb_ca_en50221 *en50221, int slot, u8 addr)
65{
66 struct mantis_ca *ca = en50221->data;
67 struct mantis_pci *mantis = ca->ca_priv;
68
69 dprintk(MANTIS_DEBUG, 1, "Slot(%d): Request CAM control Read", slot);
70
71 if (slot != 0)
72 return -EINVAL;
73
74 return mantis_hif_read_iom(ca, addr);
75}
76
77static int mantis_ca_write_cam_ctl(struct dvb_ca_en50221 *en50221, int slot, u8 addr, u8 data)
78{
79 struct mantis_ca *ca = en50221->data;
80 struct mantis_pci *mantis = ca->ca_priv;
81
82 dprintk(MANTIS_DEBUG, 1, "Slot(%d): Request CAM control Write", slot);
83
84 if (slot != 0)
85 return -EINVAL;
86
87 return mantis_hif_write_iom(ca, addr, data);
88}
89
90static int mantis_ca_slot_reset(struct dvb_ca_en50221 *en50221, int slot)
91{
92 struct mantis_ca *ca = en50221->data;
93 struct mantis_pci *mantis = ca->ca_priv;
94
95 dprintk(MANTIS_DEBUG, 1, "Slot(%d): Slot RESET", slot);
96 udelay(500); /* Wait.. */
97 mmwrite(0xda, MANTIS_PCMCIA_RESET); /* Leading edge assert */
98 udelay(500);
99 mmwrite(0x00, MANTIS_PCMCIA_RESET); /* Trailing edge deassert */
100 msleep(1000);
101 dvb_ca_en50221_camready_irq(&ca->en50221, 0);
102
103 return 0;
104}
105
106static int mantis_ca_slot_shutdown(struct dvb_ca_en50221 *en50221, int slot)
107{
108 struct mantis_ca *ca = en50221->data;
109 struct mantis_pci *mantis = ca->ca_priv;
110
111 dprintk(MANTIS_DEBUG, 1, "Slot(%d): Slot shutdown", slot);
112
113 return 0;
114}
115
116static int mantis_ts_control(struct dvb_ca_en50221 *en50221, int slot)
117{
118 struct mantis_ca *ca = en50221->data;
119 struct mantis_pci *mantis = ca->ca_priv;
120
121 dprintk(MANTIS_DEBUG, 1, "Slot(%d): TS control", slot);
122/* mantis_set_direction(mantis, 1); */ /* Enable TS through CAM */
123
124 return 0;
125}
126
127static int mantis_slot_status(struct dvb_ca_en50221 *en50221, int slot, int open)
128{
129 struct mantis_ca *ca = en50221->data;
130 struct mantis_pci *mantis = ca->ca_priv;
131
132 dprintk(MANTIS_DEBUG, 1, "Slot(%d): Poll Slot status", slot);
133
134 if (ca->slot_state == MODULE_INSERTED) {
135 dprintk(MANTIS_DEBUG, 1, "CA Module present and ready");
136 return DVB_CA_EN50221_POLL_CAM_PRESENT | DVB_CA_EN50221_POLL_CAM_READY;
137 } else {
138 dprintk(MANTIS_DEBUG, 1, "CA Module not present or not ready");
139 }
140
141 return 0;
142}
143
144int mantis_ca_init(struct mantis_pci *mantis)
145{
146 struct dvb_adapter *dvb_adapter = &mantis->dvb_adapter;
147 struct mantis_ca *ca;
148 int ca_flags = 0, result;
149
150 dprintk(MANTIS_DEBUG, 1, "Initializing Mantis CA");
151 ca = kzalloc(sizeof(struct mantis_ca), GFP_KERNEL);
152 if (!ca) {
153 dprintk(MANTIS_ERROR, 1, "Out of memory!, exiting ..");
154 result = -ENOMEM;
155 goto err;
156 }
157
158 ca->ca_priv = mantis;
159 mantis->mantis_ca = ca;
160 ca_flags = DVB_CA_EN50221_FLAG_IRQ_CAMCHANGE;
161 /* register CA interface */
162 ca->en50221.owner = THIS_MODULE;
163 ca->en50221.read_attribute_mem = mantis_ca_read_attr_mem;
164 ca->en50221.write_attribute_mem = mantis_ca_write_attr_mem;
165 ca->en50221.read_cam_control = mantis_ca_read_cam_ctl;
166 ca->en50221.write_cam_control = mantis_ca_write_cam_ctl;
167 ca->en50221.slot_reset = mantis_ca_slot_reset;
168 ca->en50221.slot_shutdown = mantis_ca_slot_shutdown;
169 ca->en50221.slot_ts_enable = mantis_ts_control;
170 ca->en50221.poll_slot_status = mantis_slot_status;
171 ca->en50221.data = ca;
172
173 mutex_init(&ca->ca_lock);
174
175 init_waitqueue_head(&ca->hif_data_wq);
176 init_waitqueue_head(&ca->hif_opdone_wq);
177 init_waitqueue_head(&ca->hif_write_wq);
178
179 dprintk(MANTIS_ERROR, 1, "Registering EN50221 device");
180 result = dvb_ca_en50221_init(dvb_adapter, &ca->en50221, ca_flags, 1);
181 if (result != 0) {
182 dprintk(MANTIS_ERROR, 1, "EN50221: Initialization failed <%d>", result);
183 goto err;
184 }
185 dprintk(MANTIS_ERROR, 1, "Registered EN50221 device");
186 mantis_evmgr_init(ca);
187 return 0;
188err:
189 kfree(ca);
190 return result;
191}
192EXPORT_SYMBOL_GPL(mantis_ca_init);
193
194void mantis_ca_exit(struct mantis_pci *mantis)
195{
196 struct mantis_ca *ca = mantis->mantis_ca;
197
198 dprintk(MANTIS_DEBUG, 1, "Mantis CA exit");
199
200 mantis_evmgr_exit(ca);
201 dprintk(MANTIS_ERROR, 1, "Unregistering EN50221 device");
202 if (ca)
203 dvb_ca_en50221_release(&ca->en50221);
204
205 kfree(ca);
206}
207EXPORT_SYMBOL_GPL(mantis_ca_exit);
diff --git a/drivers/media/dvb/mantis/mantis_ca.h b/drivers/media/dvb/mantis/mantis_ca.h
new file mode 100644
index 000000000000..dc63e55f7eca
--- /dev/null
+++ b/drivers/media/dvb/mantis/mantis_ca.h
@@ -0,0 +1,27 @@
1/*
2 Mantis PCI bridge driver
3
4 Copyright (C) Manu Abraham (abraham.manu@gmail.com)
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19*/
20
21#ifndef __MANTIS_CA_H
22#define __MANTIS_CA_H
23
24extern int mantis_ca_init(struct mantis_pci *mantis);
25extern void mantis_ca_exit(struct mantis_pci *mantis);
26
27#endif /* __MANTIS_CA_H */
diff --git a/drivers/media/dvb/mantis/mantis_cards.c b/drivers/media/dvb/mantis/mantis_cards.c
new file mode 100644
index 000000000000..16f1708fd3bc
--- /dev/null
+++ b/drivers/media/dvb/mantis/mantis_cards.c
@@ -0,0 +1,305 @@
1/*
2 Mantis PCI bridge driver
3
4 Copyright (C) Manu Abraham (abraham.manu@gmail.com)
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19*/
20
21#include <linux/module.h>
22#include <linux/moduleparam.h>
23#include <linux/kernel.h>
24#include <linux/pci.h>
25#include <asm/irq.h>
26#include <linux/interrupt.h>
27
28#include "dmxdev.h"
29#include "dvbdev.h"
30#include "dvb_demux.h"
31#include "dvb_frontend.h"
32#include "dvb_net.h"
33
34#include "mantis_common.h"
35
36#include "mantis_vp1033.h"
37#include "mantis_vp1034.h"
38#include "mantis_vp1041.h"
39#include "mantis_vp2033.h"
40#include "mantis_vp2040.h"
41#include "mantis_vp3030.h"
42
43#include "mantis_dma.h"
44#include "mantis_ca.h"
45#include "mantis_dvb.h"
46#include "mantis_uart.h"
47#include "mantis_ioc.h"
48#include "mantis_pci.h"
49#include "mantis_i2c.h"
50#include "mantis_reg.h"
51
52static unsigned int verbose;
53module_param(verbose, int, 0644);
54MODULE_PARM_DESC(verbose, "verbose startup messages, default is 1 (yes)");
55
56static int devs;
57
58#define DRIVER_NAME "Mantis"
59
60static char *label[10] = {
61 "DMA",
62 "IRQ-0",
63 "IRQ-1",
64 "OCERR",
65 "PABRT",
66 "RIPRR",
67 "PPERR",
68 "FTRGT",
69 "RISCI",
70 "RACK"
71};
72
73static irqreturn_t mantis_irq_handler(int irq, void *dev_id)
74{
75 u32 stat = 0, mask = 0, lstat = 0, mstat = 0;
76 u32 rst_stat = 0, rst_mask = 0;
77
78 struct mantis_pci *mantis;
79 struct mantis_ca *ca;
80
81 mantis = (struct mantis_pci *) dev_id;
82 if (unlikely(mantis == NULL)) {
83 dprintk(MANTIS_ERROR, 1, "Mantis == NULL");
84 return IRQ_NONE;
85 }
86 ca = mantis->mantis_ca;
87
88 stat = mmread(MANTIS_INT_STAT);
89 mask = mmread(MANTIS_INT_MASK);
90 mstat = lstat = stat & ~MANTIS_INT_RISCSTAT;
91 if (!(stat & mask))
92 return IRQ_NONE;
93
94 rst_mask = MANTIS_GPIF_WRACK |
95 MANTIS_GPIF_OTHERR |
96 MANTIS_SBUF_WSTO |
97 MANTIS_GPIF_EXTIRQ;
98
99 rst_stat = mmread(MANTIS_GPIF_STATUS);
100 rst_stat &= rst_mask;
101 mmwrite(rst_stat, MANTIS_GPIF_STATUS);
102
103 mantis->mantis_int_stat = stat;
104 mantis->mantis_int_mask = mask;
105 dprintk(MANTIS_DEBUG, 0, "\n-- Stat=<%02x> Mask=<%02x> --", stat, mask);
106 if (stat & MANTIS_INT_RISCEN) {
107 dprintk(MANTIS_DEBUG, 0, "<%s>", label[0]);
108 }
109 if (stat & MANTIS_INT_IRQ0) {
110 dprintk(MANTIS_DEBUG, 0, "<%s>", label[1]);
111 mantis->gpif_status = rst_stat;
112 wake_up(&ca->hif_write_wq);
113 schedule_work(&ca->hif_evm_work);
114 }
115 if (stat & MANTIS_INT_IRQ1) {
116 dprintk(MANTIS_DEBUG, 0, "<%s>", label[2]);
117 schedule_work(&mantis->uart_work);
118 }
119 if (stat & MANTIS_INT_OCERR) {
120 dprintk(MANTIS_DEBUG, 0, "<%s>", label[3]);
121 }
122 if (stat & MANTIS_INT_PABORT) {
123 dprintk(MANTIS_DEBUG, 0, "<%s>", label[4]);
124 }
125 if (stat & MANTIS_INT_RIPERR) {
126 dprintk(MANTIS_DEBUG, 0, "<%s>", label[5]);
127 }
128 if (stat & MANTIS_INT_PPERR) {
129 dprintk(MANTIS_DEBUG, 0, "<%s>", label[6]);
130 }
131 if (stat & MANTIS_INT_FTRGT) {
132 dprintk(MANTIS_DEBUG, 0, "<%s>", label[7]);
133 }
134 if (stat & MANTIS_INT_RISCI) {
135 dprintk(MANTIS_DEBUG, 0, "<%s>", label[8]);
136 mantis->finished_block = (stat & MANTIS_INT_RISCSTAT) >> 28;
137 tasklet_schedule(&mantis->tasklet);
138 }
139 if (stat & MANTIS_INT_I2CDONE) {
140 dprintk(MANTIS_DEBUG, 0, "<%s>", label[9]);
141 wake_up(&mantis->i2c_wq);
142 }
143 mmwrite(stat, MANTIS_INT_STAT);
144 stat &= ~(MANTIS_INT_RISCEN | MANTIS_INT_I2CDONE |
145 MANTIS_INT_I2CRACK | MANTIS_INT_PCMCIA7 |
146 MANTIS_INT_PCMCIA6 | MANTIS_INT_PCMCIA5 |
147 MANTIS_INT_PCMCIA4 | MANTIS_INT_PCMCIA3 |
148 MANTIS_INT_PCMCIA2 | MANTIS_INT_PCMCIA1 |
149 MANTIS_INT_PCMCIA0 | MANTIS_INT_IRQ1 |
150 MANTIS_INT_IRQ0 | MANTIS_INT_OCERR |
151 MANTIS_INT_PABORT | MANTIS_INT_RIPERR |
152 MANTIS_INT_PPERR | MANTIS_INT_FTRGT |
153 MANTIS_INT_RISCI);
154
155 if (stat)
156 dprintk(MANTIS_DEBUG, 0, "<Unknown> Stat=<%02x> Mask=<%02x>", stat, mask);
157
158 dprintk(MANTIS_DEBUG, 0, "\n");
159 return IRQ_HANDLED;
160}
161
162static int __devinit mantis_pci_probe(struct pci_dev *pdev, const struct pci_device_id *pci_id)
163{
164 struct mantis_pci *mantis;
165 struct mantis_hwconfig *config;
166 int err = 0;
167
168 mantis = kzalloc(sizeof(struct mantis_pci), GFP_KERNEL);
169 if (mantis == NULL) {
170 printk(KERN_ERR "%s ERROR: Out of memory\n", __func__);
171 err = -ENOMEM;
172 goto fail0;
173 }
174
175 mantis->num = devs;
176 mantis->verbose = verbose;
177 mantis->pdev = pdev;
178 config = (struct mantis_hwconfig *) pci_id->driver_data;
179 config->irq_handler = &mantis_irq_handler;
180 mantis->hwconfig = config;
181
182 err = mantis_pci_init(mantis);
183 if (err) {
184 dprintk(MANTIS_ERROR, 1, "ERROR: Mantis PCI initialization failed <%d>", err);
185 goto fail1;
186 }
187
188 err = mantis_stream_control(mantis, STREAM_TO_HIF);
189 if (err < 0) {
190 dprintk(MANTIS_ERROR, 1, "ERROR: Mantis stream control failed <%d>", err);
191 goto fail1;
192 }
193
194 err = mantis_i2c_init(mantis);
195 if (err < 0) {
196 dprintk(MANTIS_ERROR, 1, "ERROR: Mantis I2C initialization failed <%d>", err);
197 goto fail2;
198 }
199
200 err = mantis_get_mac(mantis);
201 if (err < 0) {
202 dprintk(MANTIS_ERROR, 1, "ERROR: Mantis MAC address read failed <%d>", err);
203 goto fail2;
204 }
205
206 err = mantis_dma_init(mantis);
207 if (err < 0) {
208 dprintk(MANTIS_ERROR, 1, "ERROR: Mantis DMA initialization failed <%d>", err);
209 goto fail3;
210 }
211
212 err = mantis_dvb_init(mantis);
213 if (err < 0) {
214 dprintk(MANTIS_ERROR, 1, "ERROR: Mantis DVB initialization failed <%d>", err);
215 goto fail4;
216 }
217 err = mantis_uart_init(mantis);
218 if (err < 0) {
219 dprintk(MANTIS_ERROR, 1, "ERROR: Mantis UART initialization failed <%d>", err);
220 goto fail6;
221 }
222
223 devs++;
224
225 return err;
226
227
228 dprintk(MANTIS_ERROR, 1, "ERROR: Mantis UART exit! <%d>", err);
229 mantis_uart_exit(mantis);
230
231fail6:
232fail4:
233 dprintk(MANTIS_ERROR, 1, "ERROR: Mantis DMA exit! <%d>", err);
234 mantis_dma_exit(mantis);
235
236fail3:
237 dprintk(MANTIS_ERROR, 1, "ERROR: Mantis I2C exit! <%d>", err);
238 mantis_i2c_exit(mantis);
239
240fail2:
241 dprintk(MANTIS_ERROR, 1, "ERROR: Mantis PCI exit! <%d>", err);
242 mantis_pci_exit(mantis);
243
244fail1:
245 dprintk(MANTIS_ERROR, 1, "ERROR: Mantis free! <%d>", err);
246 kfree(mantis);
247
248fail0:
249 return err;
250}
251
252static void __devexit mantis_pci_remove(struct pci_dev *pdev)
253{
254 struct mantis_pci *mantis = pci_get_drvdata(pdev);
255
256 if (mantis) {
257
258 mantis_uart_exit(mantis);
259 mantis_dvb_exit(mantis);
260 mantis_dma_exit(mantis);
261 mantis_i2c_exit(mantis);
262 mantis_pci_exit(mantis);
263 kfree(mantis);
264 }
265 return;
266}
267
268static struct pci_device_id mantis_pci_table[] = {
269 MAKE_ENTRY(TWINHAN_TECHNOLOGIES, MANTIS_VP_1033_DVB_S, &vp1033_config),
270 MAKE_ENTRY(TWINHAN_TECHNOLOGIES, MANTIS_VP_1034_DVB_S, &vp1034_config),
271 MAKE_ENTRY(TWINHAN_TECHNOLOGIES, MANTIS_VP_1041_DVB_S2, &vp1041_config),
272 MAKE_ENTRY(TECHNISAT, SKYSTAR_HD2_10, &vp1041_config),
273 MAKE_ENTRY(TECHNISAT, SKYSTAR_HD2_20, &vp1041_config),
274 MAKE_ENTRY(TERRATEC, CINERGY_S2_PCI_HD, &vp1041_config),
275 MAKE_ENTRY(TWINHAN_TECHNOLOGIES, MANTIS_VP_2033_DVB_C, &vp2033_config),
276 MAKE_ENTRY(TWINHAN_TECHNOLOGIES, MANTIS_VP_2040_DVB_C, &vp2040_config),
277 MAKE_ENTRY(TECHNISAT, CABLESTAR_HD2, &vp2040_config),
278 MAKE_ENTRY(TERRATEC, CINERGY_C, &vp2033_config),
279 MAKE_ENTRY(TWINHAN_TECHNOLOGIES, MANTIS_VP_3030_DVB_T, &vp3030_config),
280 { }
281};
282
283static struct pci_driver mantis_pci_driver = {
284 .name = DRIVER_NAME,
285 .id_table = mantis_pci_table,
286 .probe = mantis_pci_probe,
287 .remove = mantis_pci_remove,
288};
289
290static int __devinit mantis_init(void)
291{
292 return pci_register_driver(&mantis_pci_driver);
293}
294
295static void __devexit mantis_exit(void)
296{
297 return pci_unregister_driver(&mantis_pci_driver);
298}
299
300module_init(mantis_init);
301module_exit(mantis_exit);
302
303MODULE_DESCRIPTION("MANTIS driver");
304MODULE_AUTHOR("Manu Abraham");
305MODULE_LICENSE("GPL");
diff --git a/drivers/media/dvb/mantis/mantis_common.h b/drivers/media/dvb/mantis/mantis_common.h
new file mode 100644
index 000000000000..d0b645a483c9
--- /dev/null
+++ b/drivers/media/dvb/mantis/mantis_common.h
@@ -0,0 +1,179 @@
1/*
2 Mantis PCI bridge driver
3
4 Copyright (C) Manu Abraham (abraham.manu@gmail.com)
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19*/
20
21#ifndef __MANTIS_COMMON_H
22#define __MANTIS_COMMON_H
23
24#include <linux/mutex.h>
25#include <linux/workqueue.h>
26
27#include "mantis_uart.h"
28
29#include "mantis_link.h"
30
31#define MANTIS_ERROR 0
32#define MANTIS_NOTICE 1
33#define MANTIS_INFO 2
34#define MANTIS_DEBUG 3
35#define MANTIS_TMG 9
36
37#define dprintk(y, z, format, arg...) do { \
38 if (z) { \
39 if ((mantis->verbose > MANTIS_ERROR) && (mantis->verbose > y)) \
40 printk(KERN_ERR "%s (%d): " format "\n" , __func__ , mantis->num , ##arg); \
41 else if ((mantis->verbose > MANTIS_NOTICE) && (mantis->verbose > y)) \
42 printk(KERN_NOTICE "%s (%d): " format "\n" , __func__ , mantis->num , ##arg); \
43 else if ((mantis->verbose > MANTIS_INFO) && (mantis->verbose > y)) \
44 printk(KERN_INFO "%s (%d): " format "\n" , __func__ , mantis->num , ##arg); \
45 else if ((mantis->verbose > MANTIS_DEBUG) && (mantis->verbose > y)) \
46 printk(KERN_DEBUG "%s (%d): " format "\n" , __func__ , mantis->num , ##arg); \
47 else if ((mantis->verbose > MANTIS_TMG) && (mantis->verbose > y)) \
48 printk(KERN_DEBUG "%s (%d): " format "\n" , __func__ , mantis->num , ##arg); \
49 } else { \
50 if (mantis->verbose > y) \
51 printk(format , ##arg); \
52 } \
53} while(0)
54
55#define mwrite(dat, addr) writel((dat), addr)
56#define mread(addr) readl(addr)
57
58#define mmwrite(dat, addr) mwrite((dat), (mantis->mmio + (addr)))
59#define mmread(addr) mread(mantis->mmio + (addr))
60
61#define MANTIS_TS_188 0
62#define MANTIS_TS_204 1
63
64#define TWINHAN_TECHNOLOGIES 0x1822
65#define MANTIS 0x4e35
66
67#define TECHNISAT 0x1ae4
68#define TERRATEC 0x153b
69
70#define MAKE_ENTRY(__subven, __subdev, __configptr) { \
71 .vendor = TWINHAN_TECHNOLOGIES, \
72 .device = MANTIS, \
73 .subvendor = (__subven), \
74 .subdevice = (__subdev), \
75 .driver_data = (unsigned long) (__configptr) \
76}
77
78enum mantis_i2c_mode {
79 MANTIS_PAGE_MODE = 0,
80 MANTIS_BYTE_MODE,
81};
82
83struct mantis_pci;
84
85struct mantis_hwconfig {
86 char *model_name;
87 char *dev_type;
88 u32 ts_size;
89
90 enum mantis_baud baud_rate;
91 enum mantis_parity parity;
92 u32 bytes;
93
94 irqreturn_t (*irq_handler)(int irq, void *dev_id);
95 int (*frontend_init)(struct mantis_pci *mantis, struct dvb_frontend *fe);
96
97 u8 power;
98 u8 reset;
99
100 enum mantis_i2c_mode i2c_mode;
101};
102
103struct mantis_pci {
104 unsigned int verbose;
105
106 /* PCI stuff */
107 u16 vendor_id;
108 u16 device_id;
109 u16 subsystem_vendor;
110 u16 subsystem_device;
111
112 u8 latency;
113
114 struct pci_dev *pdev;
115
116 unsigned long mantis_addr;
117 void __iomem *mmio;
118
119 u8 irq;
120 u8 revision;
121
122 unsigned int num;
123
124 /* RISC Core */
125 u32 finished_block;
126 u32 last_block;
127 u32 line_bytes;
128 u32 line_count;
129 u32 risc_pos;
130 u8 *buf_cpu;
131 dma_addr_t buf_dma;
132 u32 *risc_cpu;
133 dma_addr_t risc_dma;
134
135 struct tasklet_struct tasklet;
136
137 struct i2c_adapter adapter;
138 int i2c_rc;
139 wait_queue_head_t i2c_wq;
140 struct mutex i2c_lock;
141
142 /* DVB stuff */
143 struct dvb_adapter dvb_adapter;
144 struct dvb_frontend *fe;
145 struct dvb_demux demux;
146 struct dmxdev dmxdev;
147 struct dmx_frontend fe_hw;
148 struct dmx_frontend fe_mem;
149 struct dvb_net dvbnet;
150
151 u8 feeds;
152
153 struct mantis_hwconfig *hwconfig;
154
155 u32 mantis_int_stat;
156 u32 mantis_int_mask;
157
158 /* board specific */
159 u8 mac_address[8];
160 u32 sub_vendor_id;
161 u32 sub_device_id;
162
163 /* A12 A13 A14 */
164 u32 gpio_status;
165
166 u32 gpif_status;
167
168 struct mantis_ca *mantis_ca;
169
170 wait_queue_head_t uart_wq;
171 struct work_struct uart_work;
172 spinlock_t uart_lock;
173
174 struct input_dev *rc;
175};
176
177#define MANTIS_HIF_STATUS (mantis->gpio_status)
178
179#endif /* __MANTIS_COMMON_H */
diff --git a/drivers/media/dvb/mantis/mantis_core.c b/drivers/media/dvb/mantis/mantis_core.c
new file mode 100644
index 000000000000..8113b23ce448
--- /dev/null
+++ b/drivers/media/dvb/mantis/mantis_core.c
@@ -0,0 +1,238 @@
1/*
2 Mantis PCI bridge driver
3
4 Copyright (C) Manu Abraham (abraham.manu@gmail.com)
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19*/
20
21#include "mantis_common.h"
22#include "mantis_core.h"
23#include "mantis_vp1033.h"
24#include "mantis_vp1034.h"
25#include "mantis_vp1041.h"
26#include "mantis_vp2033.h"
27#include "mantis_vp2040.h"
28#include "mantis_vp3030.h"
29
30static int read_eeprom_byte(struct mantis_pci *mantis, u8 *data, u8 length)
31{
32 int err;
33 struct i2c_msg msg[] = {
34 {
35 .addr = 0x50,
36 .flags = 0,
37 .buf = data,
38 .len = 1
39 }, {
40 .addr = 0x50,
41 .flags = I2C_M_RD,
42 .buf = data,
43 .len = length
44 },
45 };
46
47 err = i2c_transfer(&mantis->adapter, msg, 2);
48 if (err < 0) {
49 dprintk(verbose, MANTIS_ERROR, 1,
50 "ERROR: i2c read: < err=%i d0=0x%02x d1=0x%02x >",
51 err, data[0], data[1]);
52
53 return err;
54 }
55
56 return 0;
57}
58
59static int write_eeprom_byte(struct mantis_pci *mantis, u8 *data, u8 length)
60{
61 int err;
62
63 struct i2c_msg msg = {
64 .addr = 0x50,
65 .flags = 0,
66 .buf = data,
67 .len = length
68 };
69
70 err = i2c_transfer(&mantis->adapter, &msg, 1);
71 if (err < 0) {
72 dprintk(verbose, MANTIS_ERROR, 1,
73 "ERROR: i2c write: < err=%i length=0x%02x d0=0x%02x, d1=0x%02x >",
74 err, length, data[0], data[1]);
75
76 return err;
77 }
78
79 return 0;
80}
81
82static int get_mac_address(struct mantis_pci *mantis)
83{
84 int err;
85
86 mantis->mac_address[0] = 0x08;
87 err = read_eeprom_byte(mantis, &mantis->mac_address[0], 6);
88 if (err < 0) {
89 dprintk(verbose, MANTIS_ERROR, 1, "Mantis EEPROM read error");
90
91 return err;
92 }
93 dprintk(verbose, MANTIS_ERROR, 0,
94 " MAC Address=[%02x:%02x:%02x:%02x:%02x:%02x]\n",
95 mantis->mac_address[0], mantis->mac_address[1],
96 mantis->mac_address[2], mantis->mac_address[3],
97 mantis->mac_address[4], mantis->mac_address[5]);
98
99 return 0;
100}
101
102#define MANTIS_MODEL_UNKNOWN "UNKNOWN"
103#define MANTIS_DEV_UNKNOWN "UNKNOWN"
104
105struct mantis_hwconfig unknown_device = {
106 .model_name = MANTIS_MODEL_UNKNOWN,
107 .dev_type = MANTIS_DEV_UNKNOWN,
108};
109
110static void mantis_load_config(struct mantis_pci *mantis)
111{
112 switch (mantis->subsystem_device) {
113 case MANTIS_VP_1033_DVB_S: /* VP-1033 */
114 mantis->hwconfig = &vp1033_mantis_config;
115 break;
116 case MANTIS_VP_1034_DVB_S: /* VP-1034 */
117 mantis->hwconfig = &vp1034_mantis_config;
118 break;
119 case MANTIS_VP_1041_DVB_S2: /* VP-1041 */
120 case TECHNISAT_SKYSTAR_HD2:
121 mantis->hwconfig = &vp1041_mantis_config;
122 break;
123 case MANTIS_VP_2033_DVB_C: /* VP-2033 */
124 mantis->hwconfig = &vp2033_mantis_config;
125 break;
126 case MANTIS_VP_2040_DVB_C: /* VP-2040 */
127 case TERRATEC_CINERGY_C_PCI: /* VP-2040 clone */
128 case TECHNISAT_CABLESTAR_HD2:
129 mantis->hwconfig = &vp2040_mantis_config;
130 break;
131 case MANTIS_VP_3030_DVB_T: /* VP-3030 */
132 mantis->hwconfig = &vp3030_mantis_config;
133 break;
134 default:
135 mantis->hwconfig = &unknown_device;
136 break;
137 }
138}
139
140int mantis_core_init(struct mantis_pci *mantis)
141{
142 int err = 0;
143
144 mantis_load_config(mantis);
145 dprintk(verbose, MANTIS_ERROR, 0, "found a %s PCI %s device on (%02x:%02x.%x),\n",
146 mantis->hwconfig->model_name, mantis->hwconfig->dev_type,
147 mantis->pdev->bus->number, PCI_SLOT(mantis->pdev->devfn), PCI_FUNC(mantis->pdev->devfn));
148 dprintk(verbose, MANTIS_ERROR, 0, " Mantis Rev %d [%04x:%04x], ",
149 mantis->revision,
150 mantis->subsystem_vendor, mantis->subsystem_device);
151 dprintk(verbose, MANTIS_ERROR, 0,
152 "irq: %d, latency: %d\n memory: 0x%lx, mmio: 0x%p\n",
153 mantis->pdev->irq, mantis->latency,
154 mantis->mantis_addr, mantis->mantis_mmio);
155
156 err = mantis_i2c_init(mantis);
157 if (err < 0) {
158 dprintk(verbose, MANTIS_ERROR, 1, "Mantis I2C init failed");
159 return err;
160 }
161 err = get_mac_address(mantis);
162 if (err < 0) {
163 dprintk(verbose, MANTIS_ERROR, 1, "get MAC address failed");
164 return err;
165 }
166 err = mantis_dma_init(mantis);
167 if (err < 0) {
168 dprintk(verbose, MANTIS_ERROR, 1, "Mantis DMA init failed");
169 return err;
170 }
171 err = mantis_dvb_init(mantis);
172 if (err < 0) {
173 dprintk(verbose, MANTIS_DEBUG, 1, "Mantis DVB init failed");
174 return err;
175 }
176 err = mantis_uart_init(mantis);
177 if (err < 0) {
178 dprintk(verbose, MANTIS_DEBUG, 1, "Mantis UART init failed");
179 return err;
180 }
181
182 return 0;
183}
184
185int mantis_core_exit(struct mantis_pci *mantis)
186{
187 mantis_dma_stop(mantis);
188 dprintk(verbose, MANTIS_ERROR, 1, "DMA engine stopping");
189
190 mantis_uart_exit(mantis);
191 dprintk(verbose, MANTIS_ERROR, 1, "UART exit failed");
192
193 if (mantis_dma_exit(mantis) < 0)
194 dprintk(verbose, MANTIS_ERROR, 1, "DMA exit failed");
195 if (mantis_dvb_exit(mantis) < 0)
196 dprintk(verbose, MANTIS_ERROR, 1, "DVB exit failed");
197 if (mantis_i2c_exit(mantis) < 0)
198 dprintk(verbose, MANTIS_ERROR, 1, "I2C adapter delete.. failed");
199
200 return 0;
201}
202
203/* Turn the given bit on or off. */
204void gpio_set_bits(struct mantis_pci *mantis, u32 bitpos, u8 value)
205{
206 u32 cur;
207
208 cur = mmread(MANTIS_GPIF_ADDR);
209 if (value)
210 mantis->gpio_status = cur | (1 << bitpos);
211 else
212 mantis->gpio_status = cur & (~(1 << bitpos));
213
214 mmwrite(mantis->gpio_status, MANTIS_GPIF_ADDR);
215 mmwrite(0x00, MANTIS_GPIF_DOUT);
216 udelay(100);
217}
218
219/* direction = 0 , no CI passthrough ; 1 , CI passthrough */
220void mantis_set_direction(struct mantis_pci *mantis, int direction)
221{
222 u32 reg;
223
224 reg = mmread(0x28);
225 dprintk(verbose, MANTIS_DEBUG, 1, "TS direction setup");
226 if (direction == 0x01) {
227 /* to CI */
228 reg |= 0x04;
229 mmwrite(reg, 0x28);
230 reg &= 0xff - 0x04;
231 mmwrite(reg, 0x28);
232 } else {
233 reg &= 0xff - 0x04;
234 mmwrite(reg, 0x28);
235 reg |= 0x04;
236 mmwrite(reg, 0x28);
237 }
238}
diff --git a/drivers/media/dvb/mantis/mantis_core.h b/drivers/media/dvb/mantis/mantis_core.h
new file mode 100644
index 000000000000..833ee42e694e
--- /dev/null
+++ b/drivers/media/dvb/mantis/mantis_core.h
@@ -0,0 +1,57 @@
1/*
2 Mantis PCI bridge driver
3
4 Copyright (C) Manu Abraham (abraham.manu@gmail.com)
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19*/
20
21#ifndef __MANTIS_CORE_H
22#define __MANTIS_CORE_H
23
24#include "mantis_common.h"
25
26
27#define FE_TYPE_SAT 0
28#define FE_TYPE_CAB 1
29#define FE_TYPE_TER 2
30
31#define FE_TYPE_TS204 0
32#define FE_TYPE_TS188 1
33
34
35struct vendorname {
36 u8 *sub_vendor_name;
37 u32 sub_vendor_id;
38};
39
40struct devicetype {
41 u8 *sub_device_name;
42 u32 sub_device_id;
43 u8 device_type;
44 u32 type_flags;
45};
46
47
48extern int mantis_dma_init(struct mantis_pci *mantis);
49extern int mantis_dma_exit(struct mantis_pci *mantis);
50extern void mantis_dma_start(struct mantis_pci *mantis);
51extern void mantis_dma_stop(struct mantis_pci *mantis);
52extern int mantis_i2c_init(struct mantis_pci *mantis);
53extern int mantis_i2c_exit(struct mantis_pci *mantis);
54extern int mantis_core_init(struct mantis_pci *mantis);
55extern int mantis_core_exit(struct mantis_pci *mantis);
56
57#endif /* __MANTIS_CORE_H */
diff --git a/drivers/media/dvb/mantis/mantis_dma.c b/drivers/media/dvb/mantis/mantis_dma.c
new file mode 100644
index 000000000000..46202a4012aa
--- /dev/null
+++ b/drivers/media/dvb/mantis/mantis_dma.c
@@ -0,0 +1,256 @@
1/*
2 Mantis PCI bridge driver
3
4 Copyright (C) Manu Abraham (abraham.manu@gmail.com)
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19*/
20
21#include <linux/kernel.h>
22#include <asm/page.h>
23#include <linux/vmalloc.h>
24#include <linux/pci.h>
25
26#include <asm/irq.h>
27#include <linux/signal.h>
28#include <linux/sched.h>
29#include <linux/interrupt.h>
30
31#include "dmxdev.h"
32#include "dvbdev.h"
33#include "dvb_demux.h"
34#include "dvb_frontend.h"
35#include "dvb_net.h"
36
37#include "mantis_common.h"
38#include "mantis_reg.h"
39#include "mantis_dma.h"
40
41#define RISC_WRITE (0x01 << 28)
42#define RISC_JUMP (0x07 << 28)
43#define RISC_IRQ (0x01 << 24)
44
45#define RISC_STATUS(status) ((((~status) & 0x0f) << 20) | ((status & 0x0f) << 16))
46#define RISC_FLUSH() (mantis->risc_pos = 0)
47#define RISC_INSTR(opcode) (mantis->risc_cpu[mantis->risc_pos++] = cpu_to_le32(opcode))
48
49#define MANTIS_BUF_SIZE (64 * 1024)
50#define MANTIS_BLOCK_BYTES (MANTIS_BUF_SIZE >> 4)
51#define MANTIS_BLOCK_COUNT (1 << 4)
52#define MANTIS_RISC_SIZE PAGE_SIZE
53
54int mantis_dma_exit(struct mantis_pci *mantis)
55{
56 if (mantis->buf_cpu) {
57 dprintk(MANTIS_ERROR, 1,
58 "DMA=0x%lx cpu=0x%p size=%d",
59 (unsigned long) mantis->buf_dma,
60 mantis->buf_cpu,
61 MANTIS_BUF_SIZE);
62
63 pci_free_consistent(mantis->pdev, MANTIS_BUF_SIZE,
64 mantis->buf_cpu, mantis->buf_dma);
65
66 mantis->buf_cpu = NULL;
67 }
68 if (mantis->risc_cpu) {
69 dprintk(MANTIS_ERROR, 1,
70 "RISC=0x%lx cpu=0x%p size=%lx",
71 (unsigned long) mantis->risc_dma,
72 mantis->risc_cpu,
73 MANTIS_RISC_SIZE);
74
75 pci_free_consistent(mantis->pdev, MANTIS_RISC_SIZE,
76 mantis->risc_cpu, mantis->risc_dma);
77
78 mantis->risc_cpu = NULL;
79 }
80
81 return 0;
82}
83EXPORT_SYMBOL_GPL(mantis_dma_exit);
84
85static inline int mantis_alloc_buffers(struct mantis_pci *mantis)
86{
87 if (!mantis->buf_cpu) {
88 mantis->buf_cpu = pci_alloc_consistent(mantis->pdev,
89 MANTIS_BUF_SIZE,
90 &mantis->buf_dma);
91 if (!mantis->buf_cpu) {
92 dprintk(MANTIS_ERROR, 1,
93 "DMA buffer allocation failed");
94
95 goto err;
96 }
97 dprintk(MANTIS_ERROR, 1,
98 "DMA=0x%lx cpu=0x%p size=%d",
99 (unsigned long) mantis->buf_dma,
100 mantis->buf_cpu, MANTIS_BUF_SIZE);
101 }
102 if (!mantis->risc_cpu) {
103 mantis->risc_cpu = pci_alloc_consistent(mantis->pdev,
104 MANTIS_RISC_SIZE,
105 &mantis->risc_dma);
106
107 if (!mantis->risc_cpu) {
108 dprintk(MANTIS_ERROR, 1,
109 "RISC program allocation failed");
110
111 mantis_dma_exit(mantis);
112
113 goto err;
114 }
115 dprintk(MANTIS_ERROR, 1,
116 "RISC=0x%lx cpu=0x%p size=%lx",
117 (unsigned long) mantis->risc_dma,
118 mantis->risc_cpu, MANTIS_RISC_SIZE);
119 }
120
121 return 0;
122err:
123 dprintk(MANTIS_ERROR, 1, "Out of memory (?) .....");
124 return -ENOMEM;
125}
126
127static inline int mantis_calc_lines(struct mantis_pci *mantis)
128{
129 mantis->line_bytes = MANTIS_BLOCK_BYTES;
130 mantis->line_count = MANTIS_BLOCK_COUNT;
131
132 while (mantis->line_bytes > 4095) {
133 mantis->line_bytes >>= 1;
134 mantis->line_count <<= 1;
135 }
136
137 dprintk(MANTIS_DEBUG, 1, "Mantis RISC block bytes=[%d], line bytes=[%d], line count=[%d]",
138 MANTIS_BLOCK_BYTES, mantis->line_bytes, mantis->line_count);
139
140 if (mantis->line_count > 255) {
141 dprintk(MANTIS_ERROR, 1, "Buffer size error");
142 return -EINVAL;
143 }
144
145 return 0;
146}
147
148int mantis_dma_init(struct mantis_pci *mantis)
149{
150 int err = 0;
151
152 dprintk(MANTIS_DEBUG, 1, "Mantis DMA init");
153 if (mantis_alloc_buffers(mantis) < 0) {
154 dprintk(MANTIS_ERROR, 1, "Error allocating DMA buffer");
155
156 /* Stop RISC Engine */
157 mmwrite(0, MANTIS_DMA_CTL);
158
159 goto err;
160 }
161 err = mantis_calc_lines(mantis);
162 if (err < 0) {
163 dprintk(MANTIS_ERROR, 1, "Mantis calc lines failed");
164
165 goto err;
166 }
167
168 return 0;
169err:
170 return err;
171}
172EXPORT_SYMBOL_GPL(mantis_dma_init);
173
174static inline void mantis_risc_program(struct mantis_pci *mantis)
175{
176 u32 buf_pos = 0;
177 u32 line;
178
179 dprintk(MANTIS_DEBUG, 1, "Mantis create RISC program");
180 RISC_FLUSH();
181
182 dprintk(MANTIS_DEBUG, 1, "risc len lines %u, bytes per line %u",
183 mantis->line_count, mantis->line_bytes);
184
185 for (line = 0; line < mantis->line_count; line++) {
186 dprintk(MANTIS_DEBUG, 1, "RISC PROG line=[%d]", line);
187 if (!(buf_pos % MANTIS_BLOCK_BYTES)) {
188 RISC_INSTR(RISC_WRITE |
189 RISC_IRQ |
190 RISC_STATUS(((buf_pos / MANTIS_BLOCK_BYTES) +
191 (MANTIS_BLOCK_COUNT - 1)) %
192 MANTIS_BLOCK_COUNT) |
193 mantis->line_bytes);
194 } else {
195 RISC_INSTR(RISC_WRITE | mantis->line_bytes);
196 }
197 RISC_INSTR(mantis->buf_dma + buf_pos);
198 buf_pos += mantis->line_bytes;
199 }
200 RISC_INSTR(RISC_JUMP);
201 RISC_INSTR(mantis->risc_dma);
202}
203
204void mantis_dma_start(struct mantis_pci *mantis)
205{
206 dprintk(MANTIS_DEBUG, 1, "Mantis Start DMA engine");
207
208 mantis_risc_program(mantis);
209 mmwrite(mantis->risc_dma, MANTIS_RISC_START);
210 mmwrite(mmread(MANTIS_GPIF_ADDR) | MANTIS_GPIF_HIFRDWRN, MANTIS_GPIF_ADDR);
211
212 mmwrite(0, MANTIS_DMA_CTL);
213 mantis->last_block = mantis->finished_block = 0;
214
215 mmwrite(mmread(MANTIS_INT_MASK) | MANTIS_INT_RISCI, MANTIS_INT_MASK);
216
217 mmwrite(MANTIS_FIFO_EN | MANTIS_DCAP_EN
218 | MANTIS_RISC_EN, MANTIS_DMA_CTL);
219
220}
221
222void mantis_dma_stop(struct mantis_pci *mantis)
223{
224 u32 stat = 0, mask = 0;
225
226 stat = mmread(MANTIS_INT_STAT);
227 mask = mmread(MANTIS_INT_MASK);
228 dprintk(MANTIS_DEBUG, 1, "Mantis Stop DMA engine");
229
230 mmwrite((mmread(MANTIS_GPIF_ADDR) & (~(MANTIS_GPIF_HIFRDWRN))), MANTIS_GPIF_ADDR);
231
232 mmwrite((mmread(MANTIS_DMA_CTL) & ~(MANTIS_FIFO_EN |
233 MANTIS_DCAP_EN |
234 MANTIS_RISC_EN)), MANTIS_DMA_CTL);
235
236 mmwrite(mmread(MANTIS_INT_STAT), MANTIS_INT_STAT);
237
238 mmwrite(mmread(MANTIS_INT_MASK) & ~(MANTIS_INT_RISCI |
239 MANTIS_INT_RISCEN), MANTIS_INT_MASK);
240}
241
242
243void mantis_dma_xfer(unsigned long data)
244{
245 struct mantis_pci *mantis = (struct mantis_pci *) data;
246 struct mantis_hwconfig *config = mantis->hwconfig;
247
248 while (mantis->last_block != mantis->finished_block) {
249 dprintk(MANTIS_DEBUG, 1, "last block=[%d] finished block=[%d]",
250 mantis->last_block, mantis->finished_block);
251
252 (config->ts_size ? dvb_dmx_swfilter_204 : dvb_dmx_swfilter)
253 (&mantis->demux, &mantis->buf_cpu[mantis->last_block * MANTIS_BLOCK_BYTES], MANTIS_BLOCK_BYTES);
254 mantis->last_block = (mantis->last_block + 1) % MANTIS_BLOCK_COUNT;
255 }
256}
diff --git a/drivers/media/dvb/mantis/mantis_dma.h b/drivers/media/dvb/mantis/mantis_dma.h
new file mode 100644
index 000000000000..6be00fa82094
--- /dev/null
+++ b/drivers/media/dvb/mantis/mantis_dma.h
@@ -0,0 +1,30 @@
1/*
2 Mantis PCI bridge driver
3
4 Copyright (C) Manu Abraham (abraham.manu@gmail.com)
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19*/
20
21#ifndef __MANTIS_DMA_H
22#define __MANTIS_DMA_H
23
24extern int mantis_dma_init(struct mantis_pci *mantis);
25extern int mantis_dma_exit(struct mantis_pci *mantis);
26extern void mantis_dma_start(struct mantis_pci *mantis);
27extern void mantis_dma_stop(struct mantis_pci *mantis);
28extern void mantis_dma_xfer(unsigned long data);
29
30#endif /* __MANTIS_DMA_H */
diff --git a/drivers/media/dvb/mantis/mantis_dvb.c b/drivers/media/dvb/mantis/mantis_dvb.c
new file mode 100644
index 000000000000..99d82eec3b03
--- /dev/null
+++ b/drivers/media/dvb/mantis/mantis_dvb.c
@@ -0,0 +1,296 @@
1/*
2 Mantis PCI bridge driver
3 Copyright (C) Manu Abraham (abraham.manu@gmail.com)
4
5 This program is free software; you can redistribute it and/or modify
6 it under the terms of the GNU General Public License as published by
7 the Free Software Foundation; either version 2 of the License, or
8 (at your option) any later version.
9
10 This program is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 GNU General Public License for more details.
14
15 You should have received a copy of the GNU General Public License
16 along with this program; if not, write to the Free Software
17 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
18*/
19
20#include <linux/kernel.h>
21#include <linux/bitops.h>
22
23#include <linux/signal.h>
24#include <linux/sched.h>
25#include <linux/interrupt.h>
26#include <linux/pci.h>
27#include <linux/i2c.h>
28
29#include "dmxdev.h"
30#include "dvbdev.h"
31#include "dvb_demux.h"
32#include "dvb_frontend.h"
33#include "dvb_net.h"
34
35#include "mantis_common.h"
36#include "mantis_dma.h"
37#include "mantis_ca.h"
38#include "mantis_ioc.h"
39#include "mantis_dvb.h"
40
41DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
42
43int mantis_frontend_power(struct mantis_pci *mantis, enum mantis_power power)
44{
45 struct mantis_hwconfig *config = mantis->hwconfig;
46
47 switch (power) {
48 case POWER_ON:
49 dprintk(MANTIS_DEBUG, 1, "Power ON");
50 gpio_set_bits(mantis, config->power, POWER_ON);
51 msleep(100);
52 gpio_set_bits(mantis, config->power, POWER_ON);
53 msleep(100);
54 break;
55
56 case POWER_OFF:
57 dprintk(MANTIS_DEBUG, 1, "Power OFF");
58 gpio_set_bits(mantis, config->power, POWER_OFF);
59 msleep(100);
60 break;
61
62 default:
63 dprintk(MANTIS_DEBUG, 1, "Unknown state <%02x>", power);
64 return -1;
65 }
66
67 return 0;
68}
69EXPORT_SYMBOL_GPL(mantis_frontend_power);
70
71void mantis_frontend_soft_reset(struct mantis_pci *mantis)
72{
73 struct mantis_hwconfig *config = mantis->hwconfig;
74
75 dprintk(MANTIS_DEBUG, 1, "Frontend RESET");
76 gpio_set_bits(mantis, config->reset, 0);
77 msleep(100);
78 gpio_set_bits(mantis, config->reset, 0);
79 msleep(100);
80 gpio_set_bits(mantis, config->reset, 1);
81 msleep(100);
82 gpio_set_bits(mantis, config->reset, 1);
83 msleep(100);
84
85 return;
86}
87EXPORT_SYMBOL_GPL(mantis_frontend_soft_reset);
88
89static int mantis_frontend_shutdown(struct mantis_pci *mantis)
90{
91 int err;
92
93 mantis_frontend_soft_reset(mantis);
94 err = mantis_frontend_power(mantis, POWER_OFF);
95 if (err != 0) {
96 dprintk(MANTIS_ERROR, 1, "Frontend POWER OFF failed! <%d>", err);
97 return 1;
98 }
99
100 return 0;
101}
102
103static int mantis_dvb_start_feed(struct dvb_demux_feed *dvbdmxfeed)
104{
105 struct dvb_demux *dvbdmx = dvbdmxfeed->demux;
106 struct mantis_pci *mantis = dvbdmx->priv;
107
108 dprintk(MANTIS_DEBUG, 1, "Mantis DVB Start feed");
109 if (!dvbdmx->dmx.frontend) {
110 dprintk(MANTIS_DEBUG, 1, "no frontend ?");
111 return -EINVAL;
112 }
113
114 mantis->feeds++;
115 dprintk(MANTIS_DEBUG, 1, "mantis start feed, feeds=%d", mantis->feeds);
116
117 if (mantis->feeds == 1) {
118 dprintk(MANTIS_DEBUG, 1, "mantis start feed & dma");
119 mantis_dma_start(mantis);
120 }
121
122 return mantis->feeds;
123}
124
125static int mantis_dvb_stop_feed(struct dvb_demux_feed *dvbdmxfeed)
126{
127 struct dvb_demux *dvbdmx = dvbdmxfeed->demux;
128 struct mantis_pci *mantis = dvbdmx->priv;
129
130 dprintk(MANTIS_DEBUG, 1, "Mantis DVB Stop feed");
131 if (!dvbdmx->dmx.frontend) {
132 dprintk(MANTIS_DEBUG, 1, "no frontend ?");
133 return -EINVAL;
134 }
135
136 mantis->feeds--;
137 if (mantis->feeds == 0) {
138 dprintk(MANTIS_DEBUG, 1, "mantis stop feed and dma");
139 mantis_dma_stop(mantis);
140 }
141
142 return 0;
143}
144
145int __devinit mantis_dvb_init(struct mantis_pci *mantis)
146{
147 struct mantis_hwconfig *config = mantis->hwconfig;
148 int result = -1;
149
150 dprintk(MANTIS_DEBUG, 1, "dvb_register_adapter");
151
152 result = dvb_register_adapter(&mantis->dvb_adapter,
153 "Mantis DVB adapter",
154 THIS_MODULE,
155 &mantis->pdev->dev,
156 adapter_nr);
157
158 if (result < 0) {
159
160 dprintk(MANTIS_ERROR, 1, "Error registering adapter");
161 return -ENODEV;
162 }
163
164 mantis->dvb_adapter.priv = mantis;
165 mantis->demux.dmx.capabilities = DMX_TS_FILTERING |
166 DMX_SECTION_FILTERING |
167 DMX_MEMORY_BASED_FILTERING;
168
169 mantis->demux.priv = mantis;
170 mantis->demux.filternum = 256;
171 mantis->demux.feednum = 256;
172 mantis->demux.start_feed = mantis_dvb_start_feed;
173 mantis->demux.stop_feed = mantis_dvb_stop_feed;
174 mantis->demux.write_to_decoder = NULL;
175
176 dprintk(MANTIS_DEBUG, 1, "dvb_dmx_init");
177 result = dvb_dmx_init(&mantis->demux);
178 if (result < 0) {
179 dprintk(MANTIS_ERROR, 1, "dvb_dmx_init failed, ERROR=%d", result);
180
181 goto err0;
182 }
183
184 mantis->dmxdev.filternum = 256;
185 mantis->dmxdev.demux = &mantis->demux.dmx;
186 mantis->dmxdev.capabilities = 0;
187 dprintk(MANTIS_DEBUG, 1, "dvb_dmxdev_init");
188
189 result = dvb_dmxdev_init(&mantis->dmxdev, &mantis->dvb_adapter);
190 if (result < 0) {
191
192 dprintk(MANTIS_ERROR, 1, "dvb_dmxdev_init failed, ERROR=%d", result);
193 goto err1;
194 }
195
196 mantis->fe_hw.source = DMX_FRONTEND_0;
197 result = mantis->demux.dmx.add_frontend(&mantis->demux.dmx, &mantis->fe_hw);
198 if (result < 0) {
199
200 dprintk(MANTIS_ERROR, 1, "dvb_dmx_init failed, ERROR=%d", result);
201 goto err2;
202 }
203
204 mantis->fe_mem.source = DMX_MEMORY_FE;
205 result = mantis->demux.dmx.add_frontend(&mantis->demux.dmx, &mantis->fe_mem);
206 if (result < 0) {
207 dprintk(MANTIS_ERROR, 1, "dvb_dmx_init failed, ERROR=%d", result);
208 goto err3;
209 }
210
211 result = mantis->demux.dmx.connect_frontend(&mantis->demux.dmx, &mantis->fe_hw);
212 if (result < 0) {
213 dprintk(MANTIS_ERROR, 1, "dvb_dmx_init failed, ERROR=%d", result);
214 goto err4;
215 }
216
217 dvb_net_init(&mantis->dvb_adapter, &mantis->dvbnet, &mantis->demux.dmx);
218 tasklet_init(&mantis->tasklet, mantis_dma_xfer, (unsigned long) mantis);
219 if (mantis->hwconfig) {
220 result = config->frontend_init(mantis, mantis->fe);
221 if (result < 0) {
222 dprintk(MANTIS_ERROR, 1, "!!! NO Frontends found !!!");
223 goto err5;
224 } else {
225 if (mantis->fe == NULL) {
226 dprintk(MANTIS_ERROR, 1, "FE <NULL>");
227 goto err5;
228 }
229
230 if (dvb_register_frontend(&mantis->dvb_adapter, mantis->fe)) {
231 dprintk(MANTIS_ERROR, 1, "ERROR: Frontend registration failed");
232
233 if (mantis->fe->ops.release)
234 mantis->fe->ops.release(mantis->fe);
235
236 mantis->fe = NULL;
237 goto err5;
238 }
239 }
240 }
241
242 return 0;
243
244 /* Error conditions .. */
245err5:
246 tasklet_kill(&mantis->tasklet);
247 dvb_net_release(&mantis->dvbnet);
248 dvb_unregister_frontend(mantis->fe);
249 dvb_frontend_detach(mantis->fe);
250err4:
251 mantis->demux.dmx.remove_frontend(&mantis->demux.dmx, &mantis->fe_mem);
252
253err3:
254 mantis->demux.dmx.remove_frontend(&mantis->demux.dmx, &mantis->fe_hw);
255
256err2:
257 dvb_dmxdev_release(&mantis->dmxdev);
258
259err1:
260 dvb_dmx_release(&mantis->demux);
261
262err0:
263 dvb_unregister_adapter(&mantis->dvb_adapter);
264
265 return result;
266}
267EXPORT_SYMBOL_GPL(mantis_dvb_init);
268
269int __devexit mantis_dvb_exit(struct mantis_pci *mantis)
270{
271 int err;
272
273 if (mantis->fe) {
274 /* mantis_ca_exit(mantis); */
275 err = mantis_frontend_shutdown(mantis);
276 if (err != 0)
277 dprintk(MANTIS_ERROR, 1, "Frontend exit while POWER ON! <%d>", err);
278 dvb_unregister_frontend(mantis->fe);
279 dvb_frontend_detach(mantis->fe);
280 }
281
282 tasklet_kill(&mantis->tasklet);
283 dvb_net_release(&mantis->dvbnet);
284
285 mantis->demux.dmx.remove_frontend(&mantis->demux.dmx, &mantis->fe_mem);
286 mantis->demux.dmx.remove_frontend(&mantis->demux.dmx, &mantis->fe_hw);
287
288 dvb_dmxdev_release(&mantis->dmxdev);
289 dvb_dmx_release(&mantis->demux);
290
291 dprintk(MANTIS_DEBUG, 1, "dvb_unregister_adapter");
292 dvb_unregister_adapter(&mantis->dvb_adapter);
293
294 return 0;
295}
296EXPORT_SYMBOL_GPL(mantis_dvb_exit);
diff --git a/drivers/media/dvb/mantis/mantis_dvb.h b/drivers/media/dvb/mantis/mantis_dvb.h
new file mode 100644
index 000000000000..464199db304e
--- /dev/null
+++ b/drivers/media/dvb/mantis/mantis_dvb.h
@@ -0,0 +1,35 @@
1/*
2 Mantis PCI bridge driver
3
4 Copyright (C) Manu Abraham (abraham.manu@gmail.com)
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19*/
20
21#ifndef __MANTIS_DVB_H
22#define __MANTIS_DVB_H
23
24enum mantis_power {
25 POWER_OFF = 0,
26 POWER_ON = 1
27};
28
29extern int mantis_frontend_power(struct mantis_pci *mantis, enum mantis_power power);
30extern void mantis_frontend_soft_reset(struct mantis_pci *mantis);
31
32extern int mantis_dvb_init(struct mantis_pci *mantis);
33extern int mantis_dvb_exit(struct mantis_pci *mantis);
34
35#endif /* __MANTIS_DVB_H */
diff --git a/drivers/media/dvb/mantis/mantis_evm.c b/drivers/media/dvb/mantis/mantis_evm.c
new file mode 100644
index 000000000000..a7b369a439d6
--- /dev/null
+++ b/drivers/media/dvb/mantis/mantis_evm.c
@@ -0,0 +1,117 @@
1/*
2 Mantis PCI bridge driver
3
4 Copyright (C) Manu Abraham (abraham.manu@gmail.com)
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19*/
20
21#include <linux/kernel.h>
22
23#include <linux/signal.h>
24#include <linux/sched.h>
25#include <linux/interrupt.h>
26
27#include "dmxdev.h"
28#include "dvbdev.h"
29#include "dvb_demux.h"
30#include "dvb_frontend.h"
31#include "dvb_net.h"
32
33#include "mantis_common.h"
34#include "mantis_link.h"
35#include "mantis_hif.h"
36#include "mantis_reg.h"
37
38static void mantis_hifevm_work(struct work_struct *work)
39{
40 struct mantis_ca *ca = container_of(work, struct mantis_ca, hif_evm_work);
41 struct mantis_pci *mantis = ca->ca_priv;
42
43 u32 gpif_stat, gpif_mask;
44
45 gpif_stat = mmread(MANTIS_GPIF_STATUS);
46 gpif_mask = mmread(MANTIS_GPIF_IRQCFG);
47
48 if (gpif_stat & MANTIS_GPIF_DETSTAT) {
49 if (gpif_stat & MANTIS_CARD_PLUGIN) {
50 dprintk(MANTIS_DEBUG, 1, "Event Mgr: Adapter(%d) Slot(0): CAM Plugin", mantis->num);
51 mmwrite(0xdada0000, MANTIS_CARD_RESET);
52 mantis_event_cam_plugin(ca);
53 dvb_ca_en50221_camchange_irq(&ca->en50221,
54 0,
55 DVB_CA_EN50221_CAMCHANGE_INSERTED);
56 }
57 } else {
58 if (gpif_stat & MANTIS_CARD_PLUGOUT) {
59 dprintk(MANTIS_DEBUG, 1, "Event Mgr: Adapter(%d) Slot(0): CAM Unplug", mantis->num);
60 mmwrite(0xdada0000, MANTIS_CARD_RESET);
61 mantis_event_cam_unplug(ca);
62 dvb_ca_en50221_camchange_irq(&ca->en50221,
63 0,
64 DVB_CA_EN50221_CAMCHANGE_REMOVED);
65 }
66 }
67
68 if (mantis->gpif_status & MANTIS_GPIF_EXTIRQ)
69 dprintk(MANTIS_DEBUG, 1, "Event Mgr: Adapter(%d) Slot(0): Ext IRQ", mantis->num);
70
71 if (mantis->gpif_status & MANTIS_SBUF_WSTO)
72 dprintk(MANTIS_DEBUG, 1, "Event Mgr: Adapter(%d) Slot(0): Smart Buffer Timeout", mantis->num);
73
74 if (mantis->gpif_status & MANTIS_GPIF_OTHERR)
75 dprintk(MANTIS_DEBUG, 1, "Event Mgr: Adapter(%d) Slot(0): Alignment Error", mantis->num);
76
77 if (gpif_stat & MANTIS_SBUF_OVFLW)
78 dprintk(MANTIS_DEBUG, 1, "Event Mgr: Adapter(%d) Slot(0): Smart Buffer Overflow", mantis->num);
79
80 if (gpif_stat & MANTIS_GPIF_BRRDY)
81 dprintk(MANTIS_DEBUG, 1, "Event Mgr: Adapter(%d) Slot(0): Smart Buffer Read Ready", mantis->num);
82
83 if (gpif_stat & MANTIS_GPIF_INTSTAT)
84 dprintk(MANTIS_DEBUG, 1, "Event Mgr: Adapter(%d) Slot(0): GPIF IRQ", mantis->num);
85
86 if (gpif_stat & MANTIS_SBUF_EMPTY)
87 dprintk(MANTIS_DEBUG, 1, "Event Mgr: Adapter(%d) Slot(0): Smart Buffer Empty", mantis->num);
88
89 if (gpif_stat & MANTIS_SBUF_OPDONE) {
90 dprintk(MANTIS_DEBUG, 1, "Event Mgr: Adapter(%d) Slot(0): Smart Buffer operation complete", mantis->num);
91 ca->sbuf_status = MANTIS_SBUF_DATA_AVAIL;
92 ca->hif_event = MANTIS_SBUF_OPDONE;
93 wake_up(&ca->hif_opdone_wq);
94 }
95}
96
97int mantis_evmgr_init(struct mantis_ca *ca)
98{
99 struct mantis_pci *mantis = ca->ca_priv;
100
101 dprintk(MANTIS_DEBUG, 1, "Initializing Mantis Host I/F Event manager");
102 INIT_WORK(&ca->hif_evm_work, mantis_hifevm_work);
103 mantis_pcmcia_init(ca);
104 schedule_work(&ca->hif_evm_work);
105 mantis_hif_init(ca);
106 return 0;
107}
108
109void mantis_evmgr_exit(struct mantis_ca *ca)
110{
111 struct mantis_pci *mantis = ca->ca_priv;
112
113 dprintk(MANTIS_DEBUG, 1, "Mantis Host I/F Event manager exiting");
114 flush_scheduled_work();
115 mantis_hif_exit(ca);
116 mantis_pcmcia_exit(ca);
117}
diff --git a/drivers/media/dvb/mantis/mantis_hif.c b/drivers/media/dvb/mantis/mantis_hif.c
new file mode 100644
index 000000000000..7477dac628b4
--- /dev/null
+++ b/drivers/media/dvb/mantis/mantis_hif.c
@@ -0,0 +1,240 @@
1/*
2 Mantis PCI bridge driver
3
4 Copyright (C) Manu Abraham (abraham.manu@gmail.com)
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19*/
20
21#include <linux/kernel.h>
22#include <linux/signal.h>
23#include <linux/sched.h>
24
25#include <linux/signal.h>
26#include <linux/sched.h>
27#include <linux/interrupt.h>
28
29#include "dmxdev.h"
30#include "dvbdev.h"
31#include "dvb_demux.h"
32#include "dvb_frontend.h"
33#include "dvb_net.h"
34
35#include "mantis_common.h"
36
37#include "mantis_hif.h"
38#include "mantis_link.h" /* temporary due to physical layer stuff */
39
40#include "mantis_reg.h"
41
42
43static int mantis_hif_sbuf_opdone_wait(struct mantis_ca *ca)
44{
45 struct mantis_pci *mantis = ca->ca_priv;
46 int rc = 0;
47
48 if (wait_event_timeout(ca->hif_opdone_wq,
49 ca->hif_event & MANTIS_SBUF_OPDONE,
50 msecs_to_jiffies(500)) == -ERESTARTSYS) {
51
52 dprintk(MANTIS_ERROR, 1, "Adapter(%d) Slot(0): Smart buffer operation timeout !", mantis->num);
53 rc = -EREMOTEIO;
54 }
55 dprintk(MANTIS_DEBUG, 1, "Smart Buffer Operation complete");
56 ca->hif_event &= ~MANTIS_SBUF_OPDONE;
57 return rc;
58}
59
60static int mantis_hif_write_wait(struct mantis_ca *ca)
61{
62 struct mantis_pci *mantis = ca->ca_priv;
63 u32 opdone = 0, timeout = 0;
64 int rc = 0;
65
66 if (wait_event_timeout(ca->hif_write_wq,
67 mantis->gpif_status & MANTIS_GPIF_WRACK,
68 msecs_to_jiffies(500)) == -ERESTARTSYS) {
69
70 dprintk(MANTIS_ERROR, 1, "Adapter(%d) Slot(0): Write ACK timed out !", mantis->num);
71 rc = -EREMOTEIO;
72 }
73 dprintk(MANTIS_DEBUG, 1, "Write Acknowledged");
74 mantis->gpif_status &= ~MANTIS_GPIF_WRACK;
75 while (!opdone) {
76 opdone = (mmread(MANTIS_GPIF_STATUS) & MANTIS_SBUF_OPDONE);
77 udelay(500);
78 timeout++;
79 if (timeout > 100) {
80 dprintk(MANTIS_ERROR, 1, "Adater(%d) Slot(0): Write operation timed out!", mantis->num);
81 rc = -ETIMEDOUT;
82 break;
83 }
84 }
85 dprintk(MANTIS_DEBUG, 1, "HIF Write success");
86 return rc;
87}
88
89
90int mantis_hif_read_mem(struct mantis_ca *ca, u32 addr)
91{
92 struct mantis_pci *mantis = ca->ca_priv;
93 u32 hif_addr = 0, data, count = 4;
94
95 dprintk(MANTIS_DEBUG, 1, "Adapter(%d) Slot(0): Request HIF Mem Read", mantis->num);
96 mutex_lock(&ca->ca_lock);
97 hif_addr &= ~MANTIS_GPIF_PCMCIAREG;
98 hif_addr &= ~MANTIS_GPIF_PCMCIAIOM;
99 hif_addr |= MANTIS_HIF_STATUS;
100 hif_addr |= addr;
101
102 mmwrite(hif_addr, MANTIS_GPIF_BRADDR);
103 mmwrite(count, MANTIS_GPIF_BRBYTES);
104 udelay(20);
105 mmwrite(hif_addr | MANTIS_GPIF_HIFRDWRN, MANTIS_GPIF_ADDR);
106
107 if (mantis_hif_sbuf_opdone_wait(ca) != 0) {
108 dprintk(MANTIS_ERROR, 1, "Adapter(%d) Slot(0): GPIF Smart Buffer operation failed", mantis->num);
109 mutex_unlock(&ca->ca_lock);
110 return -EREMOTEIO;
111 }
112 data = mmread(MANTIS_GPIF_DIN);
113 mutex_unlock(&ca->ca_lock);
114 dprintk(MANTIS_DEBUG, 1, "Mem Read: 0x%02x", data);
115 return (data >> 24) & 0xff;
116}
117
118int mantis_hif_write_mem(struct mantis_ca *ca, u32 addr, u8 data)
119{
120 struct mantis_slot *slot = ca->slot;
121 struct mantis_pci *mantis = ca->ca_priv;
122 u32 hif_addr = 0;
123
124 dprintk(MANTIS_DEBUG, 1, "Adapter(%d) Slot(0): Request HIF Mem Write", mantis->num);
125 mutex_lock(&ca->ca_lock);
126 hif_addr &= ~MANTIS_GPIF_HIFRDWRN;
127 hif_addr &= ~MANTIS_GPIF_PCMCIAREG;
128 hif_addr &= ~MANTIS_GPIF_PCMCIAIOM;
129 hif_addr |= MANTIS_HIF_STATUS;
130 hif_addr |= addr;
131
132 mmwrite(slot->slave_cfg, MANTIS_GPIF_CFGSLA); /* Slot0 alone for now */
133 mmwrite(hif_addr, MANTIS_GPIF_ADDR);
134 mmwrite(data, MANTIS_GPIF_DOUT);
135
136 if (mantis_hif_write_wait(ca) != 0) {
137 dprintk(MANTIS_ERROR, 1, "Adapter(%d) Slot(0): HIF Smart Buffer operation failed", mantis->num);
138 mutex_unlock(&ca->ca_lock);
139 return -EREMOTEIO;
140 }
141 dprintk(MANTIS_DEBUG, 1, "Mem Write: (0x%02x to 0x%02x)", data, addr);
142 mutex_unlock(&ca->ca_lock);
143
144 return 0;
145}
146
147int mantis_hif_read_iom(struct mantis_ca *ca, u32 addr)
148{
149 struct mantis_pci *mantis = ca->ca_priv;
150 u32 data, hif_addr = 0;
151
152 dprintk(MANTIS_DEBUG, 1, "Adapter(%d) Slot(0): Request HIF I/O Read", mantis->num);
153 mutex_lock(&ca->ca_lock);
154 hif_addr &= ~MANTIS_GPIF_PCMCIAREG;
155 hif_addr |= MANTIS_GPIF_PCMCIAIOM;
156 hif_addr |= MANTIS_HIF_STATUS;
157 hif_addr |= addr;
158
159 mmwrite(hif_addr, MANTIS_GPIF_BRADDR);
160 mmwrite(1, MANTIS_GPIF_BRBYTES);
161 udelay(20);
162 mmwrite(hif_addr | MANTIS_GPIF_HIFRDWRN, MANTIS_GPIF_ADDR);
163
164 if (mantis_hif_sbuf_opdone_wait(ca) != 0) {
165 dprintk(MANTIS_ERROR, 1, "Adapter(%d) Slot(0): HIF Smart Buffer operation failed", mantis->num);
166 mutex_unlock(&ca->ca_lock);
167 return -EREMOTEIO;
168 }
169 data = mmread(MANTIS_GPIF_DIN);
170 dprintk(MANTIS_DEBUG, 1, "I/O Read: 0x%02x", data);
171 udelay(50);
172 mutex_unlock(&ca->ca_lock);
173
174 return (u8) data;
175}
176
177int mantis_hif_write_iom(struct mantis_ca *ca, u32 addr, u8 data)
178{
179 struct mantis_pci *mantis = ca->ca_priv;
180 u32 hif_addr = 0;
181
182 dprintk(MANTIS_DEBUG, 1, "Adapter(%d) Slot(0): Request HIF I/O Write", mantis->num);
183 mutex_lock(&ca->ca_lock);
184 hif_addr &= ~MANTIS_GPIF_PCMCIAREG;
185 hif_addr &= ~MANTIS_GPIF_HIFRDWRN;
186 hif_addr |= MANTIS_GPIF_PCMCIAIOM;
187 hif_addr |= MANTIS_HIF_STATUS;
188 hif_addr |= addr;
189
190 mmwrite(hif_addr, MANTIS_GPIF_ADDR);
191 mmwrite(data, MANTIS_GPIF_DOUT);
192
193 if (mantis_hif_write_wait(ca) != 0) {
194 dprintk(MANTIS_ERROR, 1, "Adapter(%d) Slot(0): HIF Smart Buffer operation failed", mantis->num);
195 mutex_unlock(&ca->ca_lock);
196 return -EREMOTEIO;
197 }
198 dprintk(MANTIS_DEBUG, 1, "I/O Write: (0x%02x to 0x%02x)", data, addr);
199 mutex_unlock(&ca->ca_lock);
200 udelay(50);
201
202 return 0;
203}
204
205int mantis_hif_init(struct mantis_ca *ca)
206{
207 struct mantis_slot *slot = ca->slot;
208 struct mantis_pci *mantis = ca->ca_priv;
209 u32 irqcfg;
210
211 slot[0].slave_cfg = 0x70773028;
212 dprintk(MANTIS_ERROR, 1, "Adapter(%d) Initializing Mantis Host Interface", mantis->num);
213
214 mutex_lock(&ca->ca_lock);
215 irqcfg = mmread(MANTIS_GPIF_IRQCFG);
216 irqcfg = MANTIS_MASK_BRRDY |
217 MANTIS_MASK_WRACK |
218 MANTIS_MASK_EXTIRQ |
219 MANTIS_MASK_WSTO |
220 MANTIS_MASK_OTHERR |
221 MANTIS_MASK_OVFLW;
222
223 mmwrite(irqcfg, MANTIS_GPIF_IRQCFG);
224 mutex_unlock(&ca->ca_lock);
225
226 return 0;
227}
228
229void mantis_hif_exit(struct mantis_ca *ca)
230{
231 struct mantis_pci *mantis = ca->ca_priv;
232 u32 irqcfg;
233
234 dprintk(MANTIS_ERROR, 1, "Adapter(%d) Exiting Mantis Host Interface", mantis->num);
235 mutex_lock(&ca->ca_lock);
236 irqcfg = mmread(MANTIS_GPIF_IRQCFG);
237 irqcfg &= ~MANTIS_MASK_BRRDY;
238 mmwrite(irqcfg, MANTIS_GPIF_IRQCFG);
239 mutex_unlock(&ca->ca_lock);
240}
diff --git a/drivers/media/dvb/mantis/mantis_hif.h b/drivers/media/dvb/mantis/mantis_hif.h
new file mode 100644
index 000000000000..9094f9ed2362
--- /dev/null
+++ b/drivers/media/dvb/mantis/mantis_hif.h
@@ -0,0 +1,29 @@
1/*
2 Mantis PCI bridge driver
3
4 Copyright (C) Manu Abraham (abraham.manu@gmail.com)
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19*/
20
21#ifndef __MANTIS_HIF_H
22#define __MANTIS_HIF_H
23
24#define MANTIS_HIF_MEMRD 1
25#define MANTIS_HIF_MEMWR 2
26#define MANTIS_HIF_IOMRD 3
27#define MANTIS_HIF_IOMWR 4
28
29#endif /* __MANTIS_HIF_H */
diff --git a/drivers/media/dvb/mantis/mantis_i2c.c b/drivers/media/dvb/mantis/mantis_i2c.c
new file mode 100644
index 000000000000..7870bcf9689a
--- /dev/null
+++ b/drivers/media/dvb/mantis/mantis_i2c.c
@@ -0,0 +1,267 @@
1/*
2 Mantis PCI bridge driver
3
4 Copyright (C) Manu Abraham (abraham.manu@gmail.com)
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19*/
20
21#include <asm/io.h>
22#include <linux/ioport.h>
23#include <linux/pci.h>
24#include <linux/i2c.h>
25
26#include "dmxdev.h"
27#include "dvbdev.h"
28#include "dvb_demux.h"
29#include "dvb_frontend.h"
30#include "dvb_net.h"
31
32#include "mantis_common.h"
33#include "mantis_reg.h"
34#include "mantis_i2c.h"
35
36#define TRIALS 10000
37
38static int mantis_i2c_read(struct mantis_pci *mantis, const struct i2c_msg *msg)
39{
40 u32 rxd, i, stat, trials;
41
42 dprintk(MANTIS_INFO, 0, " %s: Address=[0x%02x] <R>[ ",
43 __func__, msg->addr);
44
45 for (i = 0; i < msg->len; i++) {
46 rxd = (msg->addr << 25) | (1 << 24)
47 | MANTIS_I2C_RATE_3
48 | MANTIS_I2C_STOP
49 | MANTIS_I2C_PGMODE;
50
51 if (i == (msg->len - 1))
52 rxd &= ~MANTIS_I2C_STOP;
53
54 mmwrite(MANTIS_INT_I2CDONE, MANTIS_INT_STAT);
55 mmwrite(rxd, MANTIS_I2CDATA_CTL);
56
57 /* wait for xfer completion */
58 for (trials = 0; trials < TRIALS; trials++) {
59 stat = mmread(MANTIS_INT_STAT);
60 if (stat & MANTIS_INT_I2CDONE)
61 break;
62 }
63
64 dprintk(MANTIS_TMG, 0, "I2CDONE: trials=%d\n", trials);
65
66 /* wait for xfer completion */
67 for (trials = 0; trials < TRIALS; trials++) {
68 stat = mmread(MANTIS_INT_STAT);
69 if (stat & MANTIS_INT_I2CRACK)
70 break;
71 }
72
73 dprintk(MANTIS_TMG, 0, "I2CRACK: trials=%d\n", trials);
74
75 rxd = mmread(MANTIS_I2CDATA_CTL);
76 msg->buf[i] = (u8)((rxd >> 8) & 0xFF);
77 dprintk(MANTIS_INFO, 0, "%02x ", msg->buf[i]);
78 }
79 dprintk(MANTIS_INFO, 0, "]\n");
80
81 return 0;
82}
83
84static int mantis_i2c_write(struct mantis_pci *mantis, const struct i2c_msg *msg)
85{
86 int i;
87 u32 txd = 0, stat, trials;
88
89 dprintk(MANTIS_INFO, 0, " %s: Address=[0x%02x] <W>[ ",
90 __func__, msg->addr);
91
92 for (i = 0; i < msg->len; i++) {
93 dprintk(MANTIS_INFO, 0, "%02x ", msg->buf[i]);
94 txd = (msg->addr << 25) | (msg->buf[i] << 8)
95 | MANTIS_I2C_RATE_3
96 | MANTIS_I2C_STOP
97 | MANTIS_I2C_PGMODE;
98
99 if (i == (msg->len - 1))
100 txd &= ~MANTIS_I2C_STOP;
101
102 mmwrite(MANTIS_INT_I2CDONE, MANTIS_INT_STAT);
103 mmwrite(txd, MANTIS_I2CDATA_CTL);
104
105 /* wait for xfer completion */
106 for (trials = 0; trials < TRIALS; trials++) {
107 stat = mmread(MANTIS_INT_STAT);
108 if (stat & MANTIS_INT_I2CDONE)
109 break;
110 }
111
112 dprintk(MANTIS_TMG, 0, "I2CDONE: trials=%d\n", trials);
113
114 /* wait for xfer completion */
115 for (trials = 0; trials < TRIALS; trials++) {
116 stat = mmread(MANTIS_INT_STAT);
117 if (stat & MANTIS_INT_I2CRACK)
118 break;
119 }
120
121 dprintk(MANTIS_TMG, 0, "I2CRACK: trials=%d\n", trials);
122 }
123 dprintk(MANTIS_INFO, 0, "]\n");
124
125 return 0;
126}
127
128static int mantis_i2c_xfer(struct i2c_adapter *adapter, struct i2c_msg *msgs, int num)
129{
130 int ret = 0, i = 0, trials;
131 u32 stat, data, txd;
132 struct mantis_pci *mantis;
133 struct mantis_hwconfig *config;
134
135 mantis = i2c_get_adapdata(adapter);
136 BUG_ON(!mantis);
137 config = mantis->hwconfig;
138 BUG_ON(!config);
139
140 dprintk(MANTIS_DEBUG, 1, "Messages:%d", num);
141 mutex_lock(&mantis->i2c_lock);
142
143 while (i < num) {
144 /* Byte MODE */
145 if ((config->i2c_mode & MANTIS_BYTE_MODE) &&
146 ((i + 1) < num) &&
147 (msgs[i].len < 2) &&
148 (msgs[i + 1].len < 2) &&
149 (msgs[i + 1].flags & I2C_M_RD)) {
150
151 dprintk(MANTIS_DEBUG, 0, " Byte MODE:\n");
152
153 /* Read operation */
154 txd = msgs[i].addr << 25 | (0x1 << 24)
155 | (msgs[i].buf[0] << 16)
156 | MANTIS_I2C_RATE_3;
157
158 mmwrite(txd, MANTIS_I2CDATA_CTL);
159 /* wait for xfer completion */
160 for (trials = 0; trials < TRIALS; trials++) {
161 stat = mmread(MANTIS_INT_STAT);
162 if (stat & MANTIS_INT_I2CDONE)
163 break;
164 }
165
166 /* check for xfer completion */
167 if (stat & MANTIS_INT_I2CDONE) {
168 /* check xfer was acknowledged */
169 if (stat & MANTIS_INT_I2CRACK) {
170 data = mmread(MANTIS_I2CDATA_CTL);
171 msgs[i + 1].buf[0] = (data >> 8) & 0xff;
172 dprintk(MANTIS_DEBUG, 0, " Byte <%d> RXD=0x%02x [%02x]\n", 0x0, data, msgs[i + 1].buf[0]);
173 } else {
174 /* I/O error */
175 dprintk(MANTIS_ERROR, 1, " I/O error, LINE:%d", __LINE__);
176 ret = -EIO;
177 break;
178 }
179 } else {
180 /* I/O error */
181 dprintk(MANTIS_ERROR, 1, " I/O error, LINE:%d", __LINE__);
182 ret = -EIO;
183 break;
184 }
185 i += 2; /* Write/Read operation in one go */
186 }
187
188 if (i < num) {
189 if (msgs[i].flags & I2C_M_RD)
190 ret = mantis_i2c_read(mantis, &msgs[i]);
191 else
192 ret = mantis_i2c_write(mantis, &msgs[i]);
193
194 i++;
195 if (ret < 0)
196 goto bail_out;
197 }
198
199 }
200
201 mutex_unlock(&mantis->i2c_lock);
202
203 return num;
204
205bail_out:
206 mutex_unlock(&mantis->i2c_lock);
207 return ret;
208}
209
210static u32 mantis_i2c_func(struct i2c_adapter *adapter)
211{
212 return I2C_FUNC_SMBUS_EMUL;
213}
214
215static struct i2c_algorithm mantis_algo = {
216 .master_xfer = mantis_i2c_xfer,
217 .functionality = mantis_i2c_func,
218};
219
220int __devinit mantis_i2c_init(struct mantis_pci *mantis)
221{
222 u32 intstat, intmask;
223 struct i2c_adapter *i2c_adapter = &mantis->adapter;
224 struct pci_dev *pdev = mantis->pdev;
225
226 init_waitqueue_head(&mantis->i2c_wq);
227 mutex_init(&mantis->i2c_lock);
228 strncpy(i2c_adapter->name, "Mantis I2C", sizeof(i2c_adapter->name));
229 i2c_set_adapdata(i2c_adapter, mantis);
230
231 i2c_adapter->owner = THIS_MODULE;
232 i2c_adapter->class = I2C_CLASS_TV_DIGITAL;
233 i2c_adapter->algo = &mantis_algo;
234 i2c_adapter->algo_data = NULL;
235 i2c_adapter->timeout = 500;
236 i2c_adapter->retries = 3;
237 i2c_adapter->dev.parent = &pdev->dev;
238
239 mantis->i2c_rc = i2c_add_adapter(i2c_adapter);
240 if (mantis->i2c_rc < 0)
241 return mantis->i2c_rc;
242
243 dprintk(MANTIS_DEBUG, 1, "Initializing I2C ..");
244
245 intstat = mmread(MANTIS_INT_STAT);
246 intmask = mmread(MANTIS_INT_MASK);
247 mmwrite(intstat, MANTIS_INT_STAT);
248 dprintk(MANTIS_DEBUG, 1, "Disabling I2C interrupt");
249 intmask = mmread(MANTIS_INT_MASK);
250 mmwrite((intmask & ~MANTIS_INT_I2CDONE), MANTIS_INT_MASK);
251
252 return 0;
253}
254EXPORT_SYMBOL_GPL(mantis_i2c_init);
255
256int mantis_i2c_exit(struct mantis_pci *mantis)
257{
258 u32 intmask;
259
260 dprintk(MANTIS_DEBUG, 1, "Disabling I2C interrupt");
261 intmask = mmread(MANTIS_INT_MASK);
262 mmwrite((intmask & ~MANTIS_INT_I2CDONE), MANTIS_INT_MASK);
263
264 dprintk(MANTIS_DEBUG, 1, "Removing I2C adapter");
265 return i2c_del_adapter(&mantis->adapter);
266}
267EXPORT_SYMBOL_GPL(mantis_i2c_exit);
diff --git a/drivers/media/dvb/mantis/mantis_i2c.h b/drivers/media/dvb/mantis/mantis_i2c.h
new file mode 100644
index 000000000000..1342df2faed8
--- /dev/null
+++ b/drivers/media/dvb/mantis/mantis_i2c.h
@@ -0,0 +1,30 @@
1/*
2 Mantis PCI bridge driver
3
4 Copyright (C) Manu Abraham (abraham.manu@gmail.com)
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19*/
20
21#ifndef __MANTIS_I2C_H
22#define __MANTIS_I2C_H
23
24#define I2C_STOP (1 << 0)
25#define I2C_READ (1 << 1)
26
27extern int mantis_i2c_init(struct mantis_pci *mantis);
28extern int mantis_i2c_exit(struct mantis_pci *mantis);
29
30#endif /* __MANTIS_I2C_H */
diff --git a/drivers/media/dvb/mantis/mantis_input.c b/drivers/media/dvb/mantis/mantis_input.c
new file mode 100644
index 000000000000..6a9df779441f
--- /dev/null
+++ b/drivers/media/dvb/mantis/mantis_input.c
@@ -0,0 +1,148 @@
1/*
2 Mantis PCI bridge driver
3
4 Copyright (C) Manu Abraham (abraham.manu@gmail.com)
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19*/
20
21#include <linux/input.h>
22#include <media/ir-common.h>
23#include <linux/pci.h>
24
25#include "dmxdev.h"
26#include "dvbdev.h"
27#include "dvb_demux.h"
28#include "dvb_frontend.h"
29#include "dvb_net.h"
30
31#include "mantis_common.h"
32#include "mantis_reg.h"
33#include "mantis_uart.h"
34
35static struct ir_scancode mantis_ir_table[] = {
36 { 0x29, KEY_POWER },
37 { 0x28, KEY_FAVORITES },
38 { 0x30, KEY_TEXT },
39 { 0x17, KEY_INFO }, /* Preview */
40 { 0x23, KEY_EPG },
41 { 0x3b, KEY_F22 }, /* Record List */
42 { 0x3c, KEY_1 },
43 { 0x3e, KEY_2 },
44 { 0x39, KEY_3 },
45 { 0x36, KEY_4 },
46 { 0x22, KEY_5 },
47 { 0x20, KEY_6 },
48 { 0x32, KEY_7 },
49 { 0x26, KEY_8 },
50 { 0x24, KEY_9 },
51 { 0x2a, KEY_0 },
52
53 { 0x33, KEY_CANCEL },
54 { 0x2c, KEY_BACK },
55 { 0x15, KEY_CLEAR },
56 { 0x3f, KEY_TAB },
57 { 0x10, KEY_ENTER },
58 { 0x14, KEY_UP },
59 { 0x0d, KEY_RIGHT },
60 { 0x0e, KEY_DOWN },
61 { 0x11, KEY_LEFT },
62
63 { 0x21, KEY_VOLUMEUP },
64 { 0x35, KEY_VOLUMEDOWN },
65 { 0x3d, KEY_CHANNELDOWN },
66 { 0x3a, KEY_CHANNELUP },
67 { 0x2e, KEY_RECORD },
68 { 0x2b, KEY_PLAY },
69 { 0x13, KEY_PAUSE },
70 { 0x25, KEY_STOP },
71
72 { 0x1f, KEY_REWIND },
73 { 0x2d, KEY_FASTFORWARD },
74 { 0x1e, KEY_PREVIOUS }, /* Replay |< */
75 { 0x1d, KEY_NEXT }, /* Skip >| */
76
77 { 0x0b, KEY_CAMERA }, /* Capture */
78 { 0x0f, KEY_LANGUAGE }, /* SAP */
79 { 0x18, KEY_MODE }, /* PIP */
80 { 0x12, KEY_ZOOM }, /* Full screen */
81 { 0x1c, KEY_SUBTITLE },
82 { 0x2f, KEY_MUTE },
83 { 0x16, KEY_F20 }, /* L/R */
84 { 0x38, KEY_F21 }, /* Hibernate */
85
86 { 0x37, KEY_SWITCHVIDEOMODE }, /* A/V */
87 { 0x31, KEY_AGAIN }, /* Recall */
88 { 0x1a, KEY_KPPLUS }, /* Zoom+ */
89 { 0x19, KEY_KPMINUS }, /* Zoom- */
90 { 0x27, KEY_RED },
91 { 0x0C, KEY_GREEN },
92 { 0x01, KEY_YELLOW },
93 { 0x00, KEY_BLUE },
94};
95
96struct ir_scancode_table ir_mantis = {
97 .scan = mantis_ir_table,
98 .size = ARRAY_SIZE(mantis_ir_table),
99};
100EXPORT_SYMBOL_GPL(ir_mantis);
101
102int mantis_input_init(struct mantis_pci *mantis)
103{
104 struct input_dev *rc;
105 struct ir_input_state rc_state;
106 char name[80], dev[80];
107 int err;
108
109 rc = input_allocate_device();
110 if (!rc) {
111 dprintk(MANTIS_ERROR, 1, "Input device allocate failed");
112 return -ENOMEM;
113 }
114
115 sprintf(name, "Mantis %s IR receiver", mantis->hwconfig->model_name);
116 sprintf(dev, "pci-%s/ir0", pci_name(mantis->pdev));
117
118 rc->name = name;
119 rc->phys = dev;
120
121 ir_input_init(rc, &rc_state, IR_TYPE_OTHER);
122
123 rc->id.bustype = BUS_PCI;
124 rc->id.vendor = mantis->vendor_id;
125 rc->id.product = mantis->device_id;
126 rc->id.version = 1;
127 rc->dev = mantis->pdev->dev;
128
129 err = ir_input_register(rc, &ir_mantis);
130 if (err) {
131 dprintk(MANTIS_ERROR, 1, "IR device registration failed, ret = %d", err);
132 input_free_device(rc);
133 return -ENODEV;
134 }
135
136 mantis->rc = rc;
137
138 return 0;
139}
140
141int mantis_exit(struct mantis_pci *mantis)
142{
143 struct input_dev *rc = mantis->rc;
144
145 ir_input_unregister(rc);
146
147 return 0;
148}
diff --git a/drivers/media/dvb/mantis/mantis_ioc.c b/drivers/media/dvb/mantis/mantis_ioc.c
new file mode 100644
index 000000000000..de148ded52d8
--- /dev/null
+++ b/drivers/media/dvb/mantis/mantis_ioc.c
@@ -0,0 +1,130 @@
1/*
2 Mantis PCI bridge driver
3
4 Copyright (C) Manu Abraham (abraham.manu@gmail.com)
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19*/
20
21#include <linux/kernel.h>
22#include <linux/i2c.h>
23
24#include <linux/signal.h>
25#include <linux/sched.h>
26#include <linux/interrupt.h>
27
28#include "dmxdev.h"
29#include "dvbdev.h"
30#include "dvb_demux.h"
31#include "dvb_frontend.h"
32#include "dvb_net.h"
33
34#include "mantis_common.h"
35#include "mantis_reg.h"
36#include "mantis_ioc.h"
37
38static int read_eeprom_bytes(struct mantis_pci *mantis, u8 reg, u8 *data, u8 length)
39{
40 struct i2c_adapter *adapter = &mantis->adapter;
41 int err;
42 u8 buf = reg;
43
44 struct i2c_msg msg[] = {
45 { .addr = 0x50, .flags = 0, .buf = &buf, .len = 1 },
46 { .addr = 0x50, .flags = I2C_M_RD, .buf = data, .len = length },
47 };
48
49 err = i2c_transfer(adapter, msg, 2);
50 if (err < 0) {
51 dprintk(MANTIS_ERROR, 1, "ERROR: i2c read: < err=%i d0=0x%02x d1=0x%02x >",
52 err, data[0], data[1]);
53
54 return err;
55 }
56
57 return 0;
58}
59int mantis_get_mac(struct mantis_pci *mantis)
60{
61 int err;
62 u8 mac_addr[6] = {0};
63
64 err = read_eeprom_bytes(mantis, 0x08, mac_addr, 6);
65 if (err < 0) {
66 dprintk(MANTIS_ERROR, 1, "ERROR: Mantis EEPROM read error <%d>", err);
67
68 return err;
69 }
70
71 dprintk(MANTIS_ERROR, 0,
72 " MAC Address=[%02x:%02x:%02x:%02x:%02x:%02x]\n",
73 mac_addr[0],
74 mac_addr[1],
75 mac_addr[2],
76 mac_addr[3],
77 mac_addr[4],
78 mac_addr[5]);
79
80 return 0;
81}
82EXPORT_SYMBOL_GPL(mantis_get_mac);
83
84/* Turn the given bit on or off. */
85void gpio_set_bits(struct mantis_pci *mantis, u32 bitpos, u8 value)
86{
87 u32 cur;
88
89 dprintk(MANTIS_DEBUG, 1, "Set Bit <%d> to <%d>", bitpos, value);
90 cur = mmread(MANTIS_GPIF_ADDR);
91 if (value)
92 mantis->gpio_status = cur | (1 << bitpos);
93 else
94 mantis->gpio_status = cur & (~(1 << bitpos));
95
96 dprintk(MANTIS_DEBUG, 1, "GPIO Value <%02x>", mantis->gpio_status);
97 mmwrite(mantis->gpio_status, MANTIS_GPIF_ADDR);
98 mmwrite(0x00, MANTIS_GPIF_DOUT);
99}
100EXPORT_SYMBOL_GPL(gpio_set_bits);
101
102int mantis_stream_control(struct mantis_pci *mantis, enum mantis_stream_control stream_ctl)
103{
104 u32 reg;
105
106 reg = mmread(MANTIS_CONTROL);
107 switch (stream_ctl) {
108 case STREAM_TO_HIF:
109 dprintk(MANTIS_DEBUG, 1, "Set stream to HIF");
110 reg &= 0xff - MANTIS_BYPASS;
111 mmwrite(reg, MANTIS_CONTROL);
112 reg |= MANTIS_BYPASS;
113 mmwrite(reg, MANTIS_CONTROL);
114 break;
115
116 case STREAM_TO_CAM:
117 dprintk(MANTIS_DEBUG, 1, "Set stream to CAM");
118 reg |= MANTIS_BYPASS;
119 mmwrite(reg, MANTIS_CONTROL);
120 reg &= 0xff - MANTIS_BYPASS;
121 mmwrite(reg, MANTIS_CONTROL);
122 break;
123 default:
124 dprintk(MANTIS_ERROR, 1, "Unknown MODE <%02x>", stream_ctl);
125 return -1;
126 }
127
128 return 0;
129}
130EXPORT_SYMBOL_GPL(mantis_stream_control);
diff --git a/drivers/media/dvb/mantis/mantis_ioc.h b/drivers/media/dvb/mantis/mantis_ioc.h
new file mode 100644
index 000000000000..188fe5a81614
--- /dev/null
+++ b/drivers/media/dvb/mantis/mantis_ioc.h
@@ -0,0 +1,51 @@
1/*
2 Mantis PCI bridge driver
3
4 Copyright (C) Manu Abraham (abraham.manu@gmail.com)
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19*/
20
21#ifndef __MANTIS_IOC_H
22#define __MANTIS_IOC_H
23
24#define GPIF_A00 0x00
25#define GPIF_A01 0x01
26#define GPIF_A02 0x02
27#define GPIF_A03 0x03
28#define GPIF_A04 0x04
29#define GPIF_A05 0x05
30#define GPIF_A06 0x06
31#define GPIF_A07 0x07
32#define GPIF_A08 0x08
33#define GPIF_A09 0x09
34#define GPIF_A10 0x0a
35#define GPIF_A11 0x0b
36
37#define GPIF_A12 0x0c
38#define GPIF_A13 0x0d
39#define GPIF_A14 0x0e
40
41enum mantis_stream_control {
42 STREAM_TO_HIF = 0,
43 STREAM_TO_CAM
44};
45
46extern int mantis_get_mac(struct mantis_pci *mantis);
47extern void gpio_set_bits(struct mantis_pci *mantis, u32 bitpos, u8 value);
48
49extern int mantis_stream_control(struct mantis_pci *mantis, enum mantis_stream_control stream_ctl);
50
51#endif /* __MANTIS_IOC_H */
diff --git a/drivers/media/dvb/mantis/mantis_link.h b/drivers/media/dvb/mantis/mantis_link.h
new file mode 100644
index 000000000000..2a814774a001
--- /dev/null
+++ b/drivers/media/dvb/mantis/mantis_link.h
@@ -0,0 +1,83 @@
1/*
2 Mantis PCI bridge driver
3
4 Copyright (C) Manu Abraham (abraham.manu@gmail.com)
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19*/
20
21#ifndef __MANTIS_LINK_H
22#define __MANTIS_LINK_H
23
24#include <linux/mutex.h>
25#include <linux/workqueue.h>
26#include "dvb_ca_en50221.h"
27
28enum mantis_sbuf_status {
29 MANTIS_SBUF_DATA_AVAIL = 1,
30 MANTIS_SBUF_DATA_EMPTY = 2,
31 MANTIS_SBUF_DATA_OVFLW = 3
32};
33
34struct mantis_slot {
35 u32 timeout;
36 u32 slave_cfg;
37 u32 bar;
38};
39
40/* Physical layer */
41enum mantis_slot_state {
42 MODULE_INSERTED = 3,
43 MODULE_XTRACTED = 4
44};
45
46struct mantis_ca {
47 struct mantis_slot slot[4];
48
49 struct work_struct hif_evm_work;
50
51 u32 hif_event;
52 wait_queue_head_t hif_opdone_wq;
53 wait_queue_head_t hif_brrdyw_wq;
54 wait_queue_head_t hif_data_wq;
55 wait_queue_head_t hif_write_wq; /* HIF Write op */
56
57 enum mantis_sbuf_status sbuf_status;
58
59 enum mantis_slot_state slot_state;
60
61 void *ca_priv;
62
63 struct dvb_ca_en50221 en50221;
64 struct mutex ca_lock;
65};
66
67/* CA */
68extern void mantis_event_cam_plugin(struct mantis_ca *ca);
69extern void mantis_event_cam_unplug(struct mantis_ca *ca);
70extern int mantis_pcmcia_init(struct mantis_ca *ca);
71extern void mantis_pcmcia_exit(struct mantis_ca *ca);
72extern int mantis_evmgr_init(struct mantis_ca *ca);
73extern void mantis_evmgr_exit(struct mantis_ca *ca);
74
75/* HIF */
76extern int mantis_hif_init(struct mantis_ca *ca);
77extern void mantis_hif_exit(struct mantis_ca *ca);
78extern int mantis_hif_read_mem(struct mantis_ca *ca, u32 addr);
79extern int mantis_hif_write_mem(struct mantis_ca *ca, u32 addr, u8 data);
80extern int mantis_hif_read_iom(struct mantis_ca *ca, u32 addr);
81extern int mantis_hif_write_iom(struct mantis_ca *ca, u32 addr, u8 data);
82
83#endif /* __MANTIS_LINK_H */
diff --git a/drivers/media/dvb/mantis/mantis_pci.c b/drivers/media/dvb/mantis/mantis_pci.c
new file mode 100644
index 000000000000..6c7534af6b44
--- /dev/null
+++ b/drivers/media/dvb/mantis/mantis_pci.c
@@ -0,0 +1,177 @@
1/*
2 Mantis PCI bridge driver
3
4 Copyright (C) Manu Abraham (abraham.manu@gmail.com)
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19*/
20
21#include <linux/module.h>
22#include <linux/moduleparam.h>
23#include <linux/kernel.h>
24#include <asm/io.h>
25#include <asm/pgtable.h>
26#include <asm/page.h>
27#include <linux/kmod.h>
28#include <linux/vmalloc.h>
29#include <linux/init.h>
30#include <linux/device.h>
31#include <linux/pci.h>
32
33#include <asm/irq.h>
34#include <linux/signal.h>
35#include <linux/sched.h>
36#include <linux/interrupt.h>
37
38#include "dmxdev.h"
39#include "dvbdev.h"
40#include "dvb_demux.h"
41#include "dvb_frontend.h"
42#include "dvb_net.h"
43
44#include <asm/irq.h>
45#include <linux/signal.h>
46#include <linux/sched.h>
47#include <linux/interrupt.h>
48
49#include "mantis_common.h"
50#include "mantis_reg.h"
51#include "mantis_pci.h"
52
53#define DRIVER_NAME "Mantis Core"
54
55int __devinit mantis_pci_init(struct mantis_pci *mantis)
56{
57 u8 revision, latency;
58 struct mantis_hwconfig *config = mantis->hwconfig;
59 struct pci_dev *pdev = mantis->pdev;
60 int err, ret = 0;
61
62 dprintk(MANTIS_ERROR, 0, "found a %s PCI %s device on (%02x:%02x.%x),\n",
63 config->model_name,
64 config->dev_type,
65 mantis->pdev->bus->number,
66 PCI_SLOT(mantis->pdev->devfn),
67 PCI_FUNC(mantis->pdev->devfn));
68
69 err = pci_enable_device(pdev);
70 if (err != 0) {
71 ret = -ENODEV;
72 dprintk(MANTIS_ERROR, 1, "ERROR: PCI enable failed <%i>", err);
73 goto fail0;
74 }
75
76 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
77 if (err != 0) {
78 dprintk(MANTIS_ERROR, 1, "ERROR: Unable to obtain 32 bit DMA <%i>", err);
79 ret = -ENOMEM;
80 goto fail1;
81 }
82
83 pci_set_master(pdev);
84
85 if (!request_mem_region(pci_resource_start(pdev, 0),
86 pci_resource_len(pdev, 0),
87 DRIVER_NAME)) {
88
89 dprintk(MANTIS_ERROR, 1, "ERROR: BAR0 Request failed !");
90 ret = -ENODEV;
91 goto fail1;
92 }
93
94 mantis->mmio = ioremap(pci_resource_start(pdev, 0),
95 pci_resource_len(pdev, 0));
96
97 if (!mantis->mmio) {
98 dprintk(MANTIS_ERROR, 1, "ERROR: BAR0 remap failed !");
99 ret = -ENODEV;
100 goto fail2;
101 }
102
103 pci_read_config_byte(pdev, PCI_LATENCY_TIMER, &latency);
104 pci_read_config_byte(pdev, PCI_CLASS_REVISION, &revision);
105 mantis->latency = latency;
106 mantis->revision = revision;
107
108 dprintk(MANTIS_ERROR, 0, " Mantis Rev %d [%04x:%04x], ",
109 mantis->revision,
110 mantis->pdev->subsystem_vendor,
111 mantis->pdev->subsystem_device);
112
113 dprintk(MANTIS_ERROR, 0,
114 "irq: %d, latency: %d\n memory: 0x%lx, mmio: 0x%p\n",
115 mantis->pdev->irq,
116 mantis->latency,
117 mantis->mantis_addr,
118 mantis->mmio);
119
120 err = request_irq(pdev->irq,
121 config->irq_handler,
122 IRQF_SHARED,
123 DRIVER_NAME,
124 mantis);
125
126 if (err != 0) {
127
128 dprintk(MANTIS_ERROR, 1, "ERROR: IRQ registration failed ! <%d>", err);
129 ret = -ENODEV;
130 goto fail3;
131 }
132
133 pci_set_drvdata(pdev, mantis);
134 return ret;
135
136 /* Error conditions */
137fail3:
138 dprintk(MANTIS_ERROR, 1, "ERROR: <%d> I/O unmap", ret);
139 if (mantis->mmio)
140 iounmap(mantis->mmio);
141
142fail2:
143 dprintk(MANTIS_ERROR, 1, "ERROR: <%d> releasing regions", ret);
144 release_mem_region(pci_resource_start(pdev, 0),
145 pci_resource_len(pdev, 0));
146
147fail1:
148 dprintk(MANTIS_ERROR, 1, "ERROR: <%d> disabling device", ret);
149 pci_disable_device(pdev);
150
151fail0:
152 dprintk(MANTIS_ERROR, 1, "ERROR: <%d> exiting", ret);
153 pci_set_drvdata(pdev, NULL);
154 return ret;
155}
156EXPORT_SYMBOL_GPL(mantis_pci_init);
157
158void mantis_pci_exit(struct mantis_pci *mantis)
159{
160 struct pci_dev *pdev = mantis->pdev;
161
162 dprintk(MANTIS_NOTICE, 1, " mem: 0x%p", mantis->mmio);
163 free_irq(pdev->irq, mantis);
164 if (mantis->mmio) {
165 iounmap(mantis->mmio);
166 release_mem_region(pci_resource_start(pdev, 0),
167 pci_resource_len(pdev, 0));
168 }
169
170 pci_disable_device(pdev);
171 pci_set_drvdata(pdev, NULL);
172}
173EXPORT_SYMBOL_GPL(mantis_pci_exit);
174
175MODULE_DESCRIPTION("Mantis PCI DTV bridge driver");
176MODULE_AUTHOR("Manu Abraham");
177MODULE_LICENSE("GPL");
diff --git a/drivers/media/dvb/mantis/mantis_pci.h b/drivers/media/dvb/mantis/mantis_pci.h
new file mode 100644
index 000000000000..65f004519086
--- /dev/null
+++ b/drivers/media/dvb/mantis/mantis_pci.h
@@ -0,0 +1,27 @@
1/*
2 Mantis PCI bridge driver
3
4 Copyright (C) Manu Abraham (abraham.manu@gmail.com)
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19*/
20
21#ifndef __MANTIS_PCI_H
22#define __MANTIS_PCI_H
23
24extern int mantis_pci_init(struct mantis_pci *mantis);
25extern void mantis_pci_exit(struct mantis_pci *mantis);
26
27#endif /* __MANTIS_PCI_H */
diff --git a/drivers/media/dvb/mantis/mantis_pcmcia.c b/drivers/media/dvb/mantis/mantis_pcmcia.c
new file mode 100644
index 000000000000..5cb545b913f6
--- /dev/null
+++ b/drivers/media/dvb/mantis/mantis_pcmcia.c
@@ -0,0 +1,120 @@
1/*
2 Mantis PCI bridge driver
3
4 Copyright (C) Manu Abraham (abraham.manu@gmail.com)
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19*/
20
21#include <linux/kernel.h>
22
23#include <linux/signal.h>
24#include <linux/sched.h>
25#include <linux/interrupt.h>
26
27#include "dmxdev.h"
28#include "dvbdev.h"
29#include "dvb_demux.h"
30#include "dvb_frontend.h"
31#include "dvb_net.h"
32
33#include "mantis_common.h"
34#include "mantis_link.h" /* temporary due to physical layer stuff */
35#include "mantis_reg.h"
36
37/*
38 * If Slot state is already PLUG_IN event and we are called
39 * again, definitely it is jitter alone
40 */
41void mantis_event_cam_plugin(struct mantis_ca *ca)
42{
43 struct mantis_pci *mantis = ca->ca_priv;
44
45 u32 gpif_irqcfg;
46
47 if (ca->slot_state == MODULE_XTRACTED) {
48 dprintk(MANTIS_DEBUG, 1, "Event: CAM Plugged IN: Adapter(%d) Slot(0)", mantis->num);
49 udelay(50);
50 mmwrite(0xda000000, MANTIS_CARD_RESET);
51 gpif_irqcfg = mmread(MANTIS_GPIF_IRQCFG);
52 gpif_irqcfg |= MANTIS_MASK_PLUGOUT;
53 gpif_irqcfg &= ~MANTIS_MASK_PLUGIN;
54 mmwrite(gpif_irqcfg, MANTIS_GPIF_IRQCFG);
55 udelay(500);
56 ca->slot_state = MODULE_INSERTED;
57 }
58 udelay(100);
59}
60
61/*
62 * If Slot state is already UN_PLUG event and we are called
63 * again, definitely it is jitter alone
64 */
65void mantis_event_cam_unplug(struct mantis_ca *ca)
66{
67 struct mantis_pci *mantis = ca->ca_priv;
68
69 u32 gpif_irqcfg;
70
71 if (ca->slot_state == MODULE_INSERTED) {
72 dprintk(MANTIS_DEBUG, 1, "Event: CAM Unplugged: Adapter(%d) Slot(0)", mantis->num);
73 udelay(50);
74 mmwrite(0x00da0000, MANTIS_CARD_RESET);
75 gpif_irqcfg = mmread(MANTIS_GPIF_IRQCFG);
76 gpif_irqcfg |= MANTIS_MASK_PLUGIN;
77 gpif_irqcfg &= ~MANTIS_MASK_PLUGOUT;
78 mmwrite(gpif_irqcfg, MANTIS_GPIF_IRQCFG);
79 udelay(500);
80 ca->slot_state = MODULE_XTRACTED;
81 }
82 udelay(100);
83}
84
85int mantis_pcmcia_init(struct mantis_ca *ca)
86{
87 struct mantis_pci *mantis = ca->ca_priv;
88
89 u32 gpif_stat, card_stat;
90
91 mmwrite(mmread(MANTIS_INT_MASK) | MANTIS_INT_IRQ0, MANTIS_INT_MASK);
92 gpif_stat = mmread(MANTIS_GPIF_STATUS);
93 card_stat = mmread(MANTIS_GPIF_IRQCFG);
94
95 if (gpif_stat & MANTIS_GPIF_DETSTAT) {
96 dprintk(MANTIS_DEBUG, 1, "CAM found on Adapter(%d) Slot(0)", mantis->num);
97 mmwrite(card_stat | MANTIS_MASK_PLUGOUT, MANTIS_GPIF_IRQCFG);
98 ca->slot_state = MODULE_INSERTED;
99 dvb_ca_en50221_camchange_irq(&ca->en50221,
100 0,
101 DVB_CA_EN50221_CAMCHANGE_INSERTED);
102 } else {
103 dprintk(MANTIS_DEBUG, 1, "Empty Slot on Adapter(%d) Slot(0)", mantis->num);
104 mmwrite(card_stat | MANTIS_MASK_PLUGIN, MANTIS_GPIF_IRQCFG);
105 ca->slot_state = MODULE_XTRACTED;
106 dvb_ca_en50221_camchange_irq(&ca->en50221,
107 0,
108 DVB_CA_EN50221_CAMCHANGE_REMOVED);
109 }
110
111 return 0;
112}
113
114void mantis_pcmcia_exit(struct mantis_ca *ca)
115{
116 struct mantis_pci *mantis = ca->ca_priv;
117
118 mmwrite(mmread(MANTIS_GPIF_STATUS) & (~MANTIS_CARD_PLUGOUT | ~MANTIS_CARD_PLUGIN), MANTIS_GPIF_STATUS);
119 mmwrite(mmread(MANTIS_INT_MASK) & ~MANTIS_INT_IRQ0, MANTIS_INT_MASK);
120}
diff --git a/drivers/media/dvb/mantis/mantis_reg.h b/drivers/media/dvb/mantis/mantis_reg.h
new file mode 100644
index 000000000000..7761f9dc7fe0
--- /dev/null
+++ b/drivers/media/dvb/mantis/mantis_reg.h
@@ -0,0 +1,197 @@
1/*
2 Mantis PCI bridge driver
3
4 Copyright (C) Manu Abraham (abraham.manu@gmail.com)
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19*/
20
21#ifndef __MANTIS_REG_H
22#define __MANTIS_REG_H
23
24/* Interrupts */
25#define MANTIS_INT_STAT 0x00
26#define MANTIS_INT_MASK 0x04
27
28#define MANTIS_INT_RISCSTAT (0x0f << 28)
29#define MANTIS_INT_RISCEN (0x01 << 27)
30#define MANTIS_INT_I2CRACK (0x01 << 26)
31
32/* #define MANTIS_INT_GPIF (0xff << 12) */
33
34#define MANTIS_INT_PCMCIA7 (0x01 << 19)
35#define MANTIS_INT_PCMCIA6 (0x01 << 18)
36#define MANTIS_INT_PCMCIA5 (0x01 << 17)
37#define MANTIS_INT_PCMCIA4 (0x01 << 16)
38#define MANTIS_INT_PCMCIA3 (0x01 << 15)
39#define MANTIS_INT_PCMCIA2 (0x01 << 14)
40#define MANTIS_INT_PCMCIA1 (0x01 << 13)
41#define MANTIS_INT_PCMCIA0 (0x01 << 12)
42#define MANTIS_INT_IRQ1 (0x01 << 11)
43#define MANTIS_INT_IRQ0 (0x01 << 10)
44#define MANTIS_INT_OCERR (0x01 << 8)
45#define MANTIS_INT_PABORT (0x01 << 7)
46#define MANTIS_INT_RIPERR (0x01 << 6)
47#define MANTIS_INT_PPERR (0x01 << 5)
48#define MANTIS_INT_FTRGT (0x01 << 3)
49#define MANTIS_INT_RISCI (0x01 << 1)
50#define MANTIS_INT_I2CDONE (0x01 << 0)
51
52/* DMA */
53#define MANTIS_DMA_CTL 0x08
54#define MANTIS_GPIF_RD (0xff << 24)
55#define MANTIS_GPIF_WR (0xff << 16)
56#define MANTIS_CPU_DO (0x01 << 10)
57#define MANTIS_DRV_DO (0x01 << 9)
58#define MANTIS_I2C_RD (0x01 << 7)
59#define MANTIS_I2C_WR (0x01 << 6)
60#define MANTIS_DCAP_MODE (0x01 << 5)
61#define MANTIS_FIFO_TP_4 (0x00 << 3)
62#define MANTIS_FIFO_TP_8 (0x01 << 3)
63#define MANTIS_FIFO_TP_16 (0x02 << 3)
64#define MANTIS_FIFO_EN (0x01 << 2)
65#define MANTIS_DCAP_EN (0x01 << 1)
66#define MANTIS_RISC_EN (0x01 << 0)
67
68/* DEBUG */
69#define MANTIS_DEBUGREG 0x0c
70#define MANTIS_DATINV (0x0e << 7)
71#define MANTIS_TOP_DEBUGSEL (0x07 << 4)
72#define MANTIS_PCMCIA_DEBUGSEL (0x0f << 0)
73
74#define MANTIS_RISC_START 0x10
75#define MANTIS_RISC_PC 0x14
76
77/* I2C */
78#define MANTIS_I2CDATA_CTL 0x18
79#define MANTIS_I2C_RATE_1 (0x00 << 6)
80#define MANTIS_I2C_RATE_2 (0x01 << 6)
81#define MANTIS_I2C_RATE_3 (0x02 << 6)
82#define MANTIS_I2C_RATE_4 (0x03 << 6)
83#define MANTIS_I2C_STOP (0x01 << 5)
84#define MANTIS_I2C_PGMODE (0x01 << 3)
85
86/* DATA */
87#define MANTIS_CMD_DATA_R1 0x20
88#define MANTIS_CMD_DATA_3 (0xff << 24)
89#define MANTIS_CMD_DATA_2 (0xff << 16)
90#define MANTIS_CMD_DATA_1 (0xff << 8)
91#define MANTIS_CMD_DATA_0 (0xff << 0)
92
93#define MANTIS_CMD_DATA_R2 0x24
94#define MANTIS_CMD_DATA_7 (0xff << 24)
95#define MANTIS_CMD_DATA_6 (0xff << 16)
96#define MANTIS_CMD_DATA_5 (0xff << 8)
97#define MANTIS_CMD_DATA_4 (0xff << 0)
98
99#define MANTIS_CONTROL 0x28
100#define MANTIS_DET (0x01 << 7)
101#define MANTIS_DAT_CF_EN (0x01 << 6)
102#define MANTIS_ACS (0x03 << 4)
103#define MANTIS_VCCEN (0x01 << 3)
104#define MANTIS_BYPASS (0x01 << 2)
105#define MANTIS_MRST (0x01 << 1)
106#define MANTIS_CRST_INT (0x01 << 0)
107
108#define MANTIS_GPIF_CFGSLA 0x84
109#define MANTIS_GPIF_WAITSMPL (0x07 << 28)
110#define MANTIS_GPIF_BYTEADDRSUB (0x01 << 25)
111#define MANTIS_GPIF_WAITPOL (0x01 << 24)
112#define MANTIS_GPIF_NCDELAY (0x07 << 20)
113#define MANTIS_GPIF_RW2CSDELAY (0x07 << 16)
114#define MANTIS_GPIF_SLFTIMEDMODE (0x01 << 15)
115#define MANTIS_GPIF_SLFTIMEDDELY (0x7f << 8)
116#define MANTIS_GPIF_DEVTYPE (0x07 << 4)
117#define MANTIS_GPIF_BIGENDIAN (0x01 << 3)
118#define MANTIS_GPIF_FETCHCMD (0x03 << 1)
119#define MANTIS_GPIF_HWORDDEV (0x01 << 0)
120
121#define MANTIS_GPIF_WSTOPER 0x90
122#define MANTIS_GPIF_WSTOPERWREN3 (0x01 << 31)
123#define MANTIS_GPIF_PARBOOTN (0x01 << 29)
124#define MANTIS_GPIF_WSTOPERSLID3 (0x1f << 24)
125#define MANTIS_GPIF_WSTOPERWREN2 (0x01 << 23)
126#define MANTIS_GPIF_WSTOPERSLID2 (0x1f << 16)
127#define MANTIS_GPIF_WSTOPERWREN1 (0x01 << 15)
128#define MANTIS_GPIF_WSTOPERSLID1 (0x1f << 8)
129#define MANTIS_GPIF_WSTOPERWREN0 (0x01 << 7)
130#define MANTIS_GPIF_WSTOPERSLID0 (0x1f << 0)
131
132#define MANTIS_GPIF_CS2RW 0x94
133#define MANTIS_GPIF_CS2RWWREN3 (0x01 << 31)
134#define MANTIS_GPIF_CS2RWDELY3 (0x3f << 24)
135#define MANTIS_GPIF_CS2RWWREN2 (0x01 << 23)
136#define MANTIS_GPIF_CS2RWDELY2 (0x3f << 16)
137#define MANTIS_GPIF_CS2RWWREN1 (0x01 << 15)
138#define MANTIS_GPIF_CS2RWDELY1 (0x3f << 8)
139#define MANTIS_GPIF_CS2RWWREN0 (0x01 << 7)
140#define MANTIS_GPIF_CS2RWDELY0 (0x3f << 0)
141
142#define MANTIS_GPIF_IRQCFG 0x98
143#define MANTIS_GPIF_IRQPOL (0x01 << 8)
144#define MANTIS_MASK_WRACK (0x01 << 7)
145#define MANTIS_MASK_BRRDY (0x01 << 6)
146#define MANTIS_MASK_OVFLW (0x01 << 5)
147#define MANTIS_MASK_OTHERR (0x01 << 4)
148#define MANTIS_MASK_WSTO (0x01 << 3)
149#define MANTIS_MASK_EXTIRQ (0x01 << 2)
150#define MANTIS_MASK_PLUGIN (0x01 << 1)
151#define MANTIS_MASK_PLUGOUT (0x01 << 0)
152
153#define MANTIS_GPIF_STATUS 0x9c
154#define MANTIS_SBUF_KILLOP (0x01 << 15)
155#define MANTIS_SBUF_OPDONE (0x01 << 14)
156#define MANTIS_SBUF_EMPTY (0x01 << 13)
157#define MANTIS_GPIF_DETSTAT (0x01 << 9)
158#define MANTIS_GPIF_INTSTAT (0x01 << 8)
159#define MANTIS_GPIF_WRACK (0x01 << 7)
160#define MANTIS_GPIF_BRRDY (0x01 << 6)
161#define MANTIS_SBUF_OVFLW (0x01 << 5)
162#define MANTIS_GPIF_OTHERR (0x01 << 4)
163#define MANTIS_SBUF_WSTO (0x01 << 3)
164#define MANTIS_GPIF_EXTIRQ (0x01 << 2)
165#define MANTIS_CARD_PLUGIN (0x01 << 1)
166#define MANTIS_CARD_PLUGOUT (0x01 << 0)
167
168#define MANTIS_GPIF_BRADDR 0xa0
169#define MANTIS_GPIF_PCMCIAREG (0x01 << 27)
170#define MANTIS_GPIF_PCMCIAIOM (0x01 << 26)
171#define MANTIS_GPIF_BR_ADDR (0xfffffff << 0)
172
173#define MANTIS_GPIF_BRBYTES 0xa4
174#define MANTIS_GPIF_BRCNT (0xfff << 0)
175
176#define MANTIS_PCMCIA_RESET 0xa8
177#define MANTIS_PCMCIA_RSTVAL (0xff << 0)
178
179#define MANTIS_CARD_RESET 0xac
180
181#define MANTIS_GPIF_ADDR 0xb0
182#define MANTIS_GPIF_HIFRDWRN (0x01 << 31)
183#define MANTIS_GPIF_PCMCIAREG (0x01 << 27)
184#define MANTIS_GPIF_PCMCIAIOM (0x01 << 26)
185#define MANTIS_GPIF_HIFADDR (0xfffffff << 0)
186
187#define MANTIS_GPIF_DOUT 0xb4
188#define MANTIS_GPIF_HIFDOUT (0xfffffff << 0)
189
190#define MANTIS_GPIF_DIN 0xb8
191#define MANTIS_GPIF_HIFDIN (0xfffffff << 0)
192
193#define MANTIS_GPIF_SPARE 0xbc
194#define MANTIS_GPIF_LOGICRD (0xffff << 16)
195#define MANTIS_GPIF_LOGICRW (0xffff << 0)
196
197#endif /* __MANTIS_REG_H */
diff --git a/drivers/media/dvb/mantis/mantis_uart.c b/drivers/media/dvb/mantis/mantis_uart.c
new file mode 100644
index 000000000000..7d2f2398fa8b
--- /dev/null
+++ b/drivers/media/dvb/mantis/mantis_uart.c
@@ -0,0 +1,186 @@
1/*
2 Mantis PCI bridge driver
3
4 Copyright (C) Manu Abraham (abraham.manu@gmail.com)
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19*/
20
21#include <linux/kernel.h>
22#include <linux/spinlock.h>
23
24#include <linux/signal.h>
25#include <linux/sched.h>
26#include <linux/interrupt.h>
27
28#include "dmxdev.h"
29#include "dvbdev.h"
30#include "dvb_demux.h"
31#include "dvb_frontend.h"
32#include "dvb_net.h"
33
34#include "mantis_common.h"
35#include "mantis_reg.h"
36#include "mantis_uart.h"
37
38struct mantis_uart_params {
39 enum mantis_baud baud_rate;
40 enum mantis_parity parity;
41};
42
43static struct {
44 char string[7];
45} rates[5] = {
46 { "9600" },
47 { "19200" },
48 { "38400" },
49 { "57600" },
50 { "115200" }
51};
52
53static struct {
54 char string[5];
55} parity[3] = {
56 { "NONE" },
57 { "ODD" },
58 { "EVEN" }
59};
60
61#define UART_MAX_BUF 16
62
63int mantis_uart_read(struct mantis_pci *mantis, u8 *data)
64{
65 struct mantis_hwconfig *config = mantis->hwconfig;
66 u32 stat = 0, i;
67
68 /* get data */
69 for (i = 0; i < (config->bytes + 1); i++) {
70
71 stat = mmread(MANTIS_UART_STAT);
72
73 if (stat & MANTIS_UART_RXFIFO_FULL) {
74 dprintk(MANTIS_ERROR, 1, "RX Fifo FULL");
75 }
76 data[i] = mmread(MANTIS_UART_RXD) & 0x3f;
77
78 dprintk(MANTIS_DEBUG, 1, "Reading ... <%02x>", data[i] & 0x3f);
79
80 if (data[i] & (1 << 7)) {
81 dprintk(MANTIS_ERROR, 1, "UART framing error");
82 return -EINVAL;
83 }
84 if (data[i] & (1 << 6)) {
85 dprintk(MANTIS_ERROR, 1, "UART parity error");
86 return -EINVAL;
87 }
88 }
89
90 return 0;
91}
92
93static void mantis_uart_work(struct work_struct *work)
94{
95 struct mantis_pci *mantis = container_of(work, struct mantis_pci, uart_work);
96 struct mantis_hwconfig *config = mantis->hwconfig;
97 u8 buf[16];
98 int i;
99
100 mantis_uart_read(mantis, buf);
101
102 for (i = 0; i < (config->bytes + 1); i++)
103 dprintk(MANTIS_INFO, 1, "UART BUF:%d <%02x> ", i, buf[i]);
104
105 dprintk(MANTIS_DEBUG, 0, "\n");
106}
107
108static int mantis_uart_setup(struct mantis_pci *mantis,
109 struct mantis_uart_params *params)
110{
111 u32 reg;
112
113 mmwrite((mmread(MANTIS_UART_CTL) | (params->parity & 0x3)), MANTIS_UART_CTL);
114
115 reg = mmread(MANTIS_UART_BAUD);
116
117 switch (params->baud_rate) {
118 case MANTIS_BAUD_9600:
119 reg |= 0xd8;
120 break;
121 case MANTIS_BAUD_19200:
122 reg |= 0x6c;
123 break;
124 case MANTIS_BAUD_38400:
125 reg |= 0x36;
126 break;
127 case MANTIS_BAUD_57600:
128 reg |= 0x23;
129 break;
130 case MANTIS_BAUD_115200:
131 reg |= 0x11;
132 break;
133 default:
134 return -EINVAL;
135 }
136
137 mmwrite(reg, MANTIS_UART_BAUD);
138
139 return 0;
140}
141
142int mantis_uart_init(struct mantis_pci *mantis)
143{
144 struct mantis_hwconfig *config = mantis->hwconfig;
145 struct mantis_uart_params params;
146
147 /* default parity: */
148 params.baud_rate = config->baud_rate;
149 params.parity = config->parity;
150 dprintk(MANTIS_INFO, 1, "Initializing UART @ %sbps parity:%s",
151 rates[params.baud_rate].string,
152 parity[params.parity].string);
153
154 init_waitqueue_head(&mantis->uart_wq);
155 spin_lock_init(&mantis->uart_lock);
156
157 INIT_WORK(&mantis->uart_work, mantis_uart_work);
158
159 /* disable interrupt */
160 mmwrite(mmread(MANTIS_UART_CTL) & 0xffef, MANTIS_UART_CTL);
161
162 mantis_uart_setup(mantis, &params);
163
164 /* default 1 byte */
165 mmwrite((mmread(MANTIS_UART_BAUD) | (config->bytes << 8)), MANTIS_UART_BAUD);
166
167 /* flush buffer */
168 mmwrite((mmread(MANTIS_UART_CTL) | MANTIS_UART_RXFLUSH), MANTIS_UART_CTL);
169
170 /* enable interrupt */
171 mmwrite(mmread(MANTIS_INT_MASK) | 0x800, MANTIS_INT_MASK);
172 mmwrite(mmread(MANTIS_UART_CTL) | MANTIS_UART_RXINT, MANTIS_UART_CTL);
173
174 schedule_work(&mantis->uart_work);
175 dprintk(MANTIS_DEBUG, 1, "UART succesfully initialized");
176
177 return 0;
178}
179EXPORT_SYMBOL_GPL(mantis_uart_init);
180
181void mantis_uart_exit(struct mantis_pci *mantis)
182{
183 /* disable interrupt */
184 mmwrite(mmread(MANTIS_UART_CTL) & 0xffef, MANTIS_UART_CTL);
185}
186EXPORT_SYMBOL_GPL(mantis_uart_exit);
diff --git a/drivers/media/dvb/mantis/mantis_uart.h b/drivers/media/dvb/mantis/mantis_uart.h
new file mode 100644
index 000000000000..ffb62a0a5a13
--- /dev/null
+++ b/drivers/media/dvb/mantis/mantis_uart.h
@@ -0,0 +1,58 @@
1/*
2 Mantis PCI bridge driver
3
4 Copyright (C) Manu Abraham (abraham.manu@gmail.com)
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19*/
20
21#ifndef __MANTIS_UART_H
22#define __MANTIS_UART_H
23
24#define MANTIS_UART_CTL 0xe0
25#define MANTIS_UART_RXINT (1 << 4)
26#define MANTIS_UART_RXFLUSH (1 << 2)
27
28#define MANTIS_UART_RXD 0xe8
29#define MANTIS_UART_BAUD 0xec
30
31#define MANTIS_UART_STAT 0xf0
32#define MANTIS_UART_RXFIFO_DATA (1 << 7)
33#define MANTIS_UART_RXFIFO_EMPTY (1 << 6)
34#define MANTIS_UART_RXFIFO_FULL (1 << 3)
35#define MANTIS_UART_FRAME_ERR (1 << 2)
36#define MANTIS_UART_PARITY_ERR (1 << 1)
37#define MANTIS_UART_RXTHRESH_INT (1 << 0)
38
39enum mantis_baud {
40 MANTIS_BAUD_9600 = 0,
41 MANTIS_BAUD_19200,
42 MANTIS_BAUD_38400,
43 MANTIS_BAUD_57600,
44 MANTIS_BAUD_115200
45};
46
47enum mantis_parity {
48 MANTIS_PARITY_NONE = 0,
49 MANTIS_PARITY_EVEN,
50 MANTIS_PARITY_ODD,
51};
52
53struct mantis_pci;
54
55extern int mantis_uart_init(struct mantis_pci *mantis);
56extern void mantis_uart_exit(struct mantis_pci *mantis);
57
58#endif /* __MANTIS_UART_H */
diff --git a/drivers/media/dvb/mantis/mantis_vp1033.c b/drivers/media/dvb/mantis/mantis_vp1033.c
new file mode 100644
index 000000000000..4a723bda0031
--- /dev/null
+++ b/drivers/media/dvb/mantis/mantis_vp1033.c
@@ -0,0 +1,212 @@
1/*
2 Mantis VP-1033 driver
3
4 Copyright (C) Manu Abraham (abraham.manu@gmail.com)
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19*/
20
21#include <linux/signal.h>
22#include <linux/sched.h>
23#include <linux/interrupt.h>
24
25#include "dmxdev.h"
26#include "dvbdev.h"
27#include "dvb_demux.h"
28#include "dvb_frontend.h"
29#include "dvb_net.h"
30
31#include "stv0299.h"
32#include "mantis_common.h"
33#include "mantis_ioc.h"
34#include "mantis_dvb.h"
35#include "mantis_vp1033.h"
36#include "mantis_reg.h"
37
38u8 lgtdqcs001f_inittab[] = {
39 0x01, 0x15,
40 0x02, 0x00,
41 0x03, 0x00,
42 0x04, 0x2a,
43 0x05, 0x85,
44 0x06, 0x02,
45 0x07, 0x00,
46 0x08, 0x00,
47 0x0c, 0x01,
48 0x0d, 0x81,
49 0x0e, 0x44,
50 0x0f, 0x94,
51 0x10, 0x3c,
52 0x11, 0x84,
53 0x12, 0xb9,
54 0x13, 0xb5,
55 0x14, 0x4f,
56 0x15, 0xc9,
57 0x16, 0x80,
58 0x17, 0x36,
59 0x18, 0xfb,
60 0x19, 0xcf,
61 0x1a, 0xbc,
62 0x1c, 0x2b,
63 0x1d, 0x27,
64 0x1e, 0x00,
65 0x1f, 0x0b,
66 0x20, 0xa1,
67 0x21, 0x60,
68 0x22, 0x00,
69 0x23, 0x00,
70 0x28, 0x00,
71 0x29, 0x28,
72 0x2a, 0x14,
73 0x2b, 0x0f,
74 0x2c, 0x09,
75 0x2d, 0x05,
76 0x31, 0x1f,
77 0x32, 0x19,
78 0x33, 0xfc,
79 0x34, 0x13,
80 0xff, 0xff,
81};
82
83#define MANTIS_MODEL_NAME "VP-1033"
84#define MANTIS_DEV_TYPE "DVB-S/DSS"
85
86int lgtdqcs001f_tuner_set(struct dvb_frontend *fe,
87 struct dvb_frontend_parameters *params)
88{
89 struct mantis_pci *mantis = fe->dvb->priv;
90 struct i2c_adapter *adapter = &mantis->adapter;
91
92 u8 buf[4];
93 u32 div;
94
95
96 struct i2c_msg msg = {.addr = 0x61, .flags = 0, .buf = buf, .len = sizeof(buf)};
97
98 div = params->frequency / 250;
99
100 buf[0] = (div >> 8) & 0x7f;
101 buf[1] = div & 0xff;
102 buf[2] = 0x83;
103 buf[3] = 0xc0;
104
105 if (params->frequency < 1531000)
106 buf[3] |= 0x04;
107 else
108 buf[3] &= ~0x04;
109 if (i2c_transfer(adapter, &msg, 1) < 0) {
110 dprintk(MANTIS_ERROR, 1, "Write: I2C Transfer failed");
111 return -EIO;
112 }
113 msleep_interruptible(100);
114
115 return 0;
116}
117
118int lgtdqcs001f_set_symbol_rate(struct dvb_frontend *fe,
119 u32 srate, u32 ratio)
120{
121 u8 aclk = 0;
122 u8 bclk = 0;
123
124 if (srate < 1500000) {
125 aclk = 0xb7;
126 bclk = 0x47;
127 } else if (srate < 3000000) {
128 aclk = 0xb7;
129 bclk = 0x4b;
130 } else if (srate < 7000000) {
131 aclk = 0xb7;
132 bclk = 0x4f;
133 } else if (srate < 14000000) {
134 aclk = 0xb7;
135 bclk = 0x53;
136 } else if (srate < 30000000) {
137 aclk = 0xb6;
138 bclk = 0x53;
139 } else if (srate < 45000000) {
140 aclk = 0xb4;
141 bclk = 0x51;
142 }
143 stv0299_writereg(fe, 0x13, aclk);
144 stv0299_writereg(fe, 0x14, bclk);
145
146 stv0299_writereg(fe, 0x1f, (ratio >> 16) & 0xff);
147 stv0299_writereg(fe, 0x20, (ratio >> 8) & 0xff);
148 stv0299_writereg(fe, 0x21, ratio & 0xf0);
149
150 return 0;
151}
152
153struct stv0299_config lgtdqcs001f_config = {
154 .demod_address = 0x68,
155 .inittab = lgtdqcs001f_inittab,
156 .mclk = 88000000UL,
157 .invert = 0,
158 .skip_reinit = 0,
159 .volt13_op0_op1 = STV0299_VOLT13_OP0,
160 .min_delay_ms = 100,
161 .set_symbol_rate = lgtdqcs001f_set_symbol_rate,
162};
163
164static int vp1033_frontend_init(struct mantis_pci *mantis, struct dvb_frontend *fe)
165{
166 struct i2c_adapter *adapter = &mantis->adapter;
167
168 int err = 0;
169
170 err = mantis_frontend_power(mantis, POWER_ON);
171 if (err == 0) {
172 mantis_frontend_soft_reset(mantis);
173 msleep(250);
174
175 dprintk(MANTIS_ERROR, 1, "Probing for STV0299 (DVB-S)");
176 fe = stv0299_attach(&lgtdqcs001f_config, adapter);
177
178 if (fe) {
179 fe->ops.tuner_ops.set_params = lgtdqcs001f_tuner_set;
180 dprintk(MANTIS_ERROR, 1, "found STV0299 DVB-S frontend @ 0x%02x",
181 lgtdqcs001f_config.demod_address);
182
183 dprintk(MANTIS_ERROR, 1, "Mantis DVB-S STV0299 frontend attach success");
184 } else {
185 return -1;
186 }
187 } else {
188 dprintk(MANTIS_ERROR, 1, "Frontend on <%s> POWER ON failed! <%d>",
189 adapter->name,
190 err);
191
192 return -EIO;
193 }
194 mantis->fe = fe;
195 dprintk(MANTIS_ERROR, 1, "Done!");
196
197 return 0;
198}
199
200struct mantis_hwconfig vp1033_config = {
201 .model_name = MANTIS_MODEL_NAME,
202 .dev_type = MANTIS_DEV_TYPE,
203 .ts_size = MANTIS_TS_204,
204
205 .baud_rate = MANTIS_BAUD_9600,
206 .parity = MANTIS_PARITY_NONE,
207 .bytes = 0,
208
209 .frontend_init = vp1033_frontend_init,
210 .power = GPIF_A12,
211 .reset = GPIF_A13,
212};
diff --git a/drivers/media/dvb/mantis/mantis_vp1033.h b/drivers/media/dvb/mantis/mantis_vp1033.h
new file mode 100644
index 000000000000..7daaa1bf127d
--- /dev/null
+++ b/drivers/media/dvb/mantis/mantis_vp1033.h
@@ -0,0 +1,30 @@
1/*
2 Mantis VP-1033 driver
3
4 Copyright (C) Manu Abraham (abraham.manu@gmail.com)
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19*/
20
21#ifndef __MANTIS_VP1033_H
22#define __MANTIS_VP1033_H
23
24#include "mantis_common.h"
25
26#define MANTIS_VP_1033_DVB_S 0x0016
27
28extern struct mantis_hwconfig vp1033_config;
29
30#endif /* __MANTIS_VP1033_H */
diff --git a/drivers/media/dvb/mantis/mantis_vp1034.c b/drivers/media/dvb/mantis/mantis_vp1034.c
new file mode 100644
index 000000000000..8e6ae558ee57
--- /dev/null
+++ b/drivers/media/dvb/mantis/mantis_vp1034.c
@@ -0,0 +1,119 @@
1/*
2 Mantis VP-1034 driver
3
4 Copyright (C) Manu Abraham (abraham.manu@gmail.com)
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19*/
20
21#include <linux/signal.h>
22#include <linux/sched.h>
23#include <linux/interrupt.h>
24
25#include "dmxdev.h"
26#include "dvbdev.h"
27#include "dvb_demux.h"
28#include "dvb_frontend.h"
29#include "dvb_net.h"
30
31#include "mb86a16.h"
32#include "mantis_common.h"
33#include "mantis_ioc.h"
34#include "mantis_dvb.h"
35#include "mantis_vp1034.h"
36#include "mantis_reg.h"
37
38struct mb86a16_config vp1034_mb86a16_config = {
39 .demod_address = 0x08,
40 .set_voltage = vp1034_set_voltage,
41};
42
43#define MANTIS_MODEL_NAME "VP-1034"
44#define MANTIS_DEV_TYPE "DVB-S/DSS"
45
46int vp1034_set_voltage(struct dvb_frontend *fe, fe_sec_voltage_t voltage)
47{
48 struct mantis_pci *mantis = fe->dvb->priv;
49
50 switch (voltage) {
51 case SEC_VOLTAGE_13:
52 dprintk(MANTIS_ERROR, 1, "Polarization=[13V]");
53 gpio_set_bits(mantis, 13, 1);
54 gpio_set_bits(mantis, 14, 0);
55 break;
56 case SEC_VOLTAGE_18:
57 dprintk(MANTIS_ERROR, 1, "Polarization=[18V]");
58 gpio_set_bits(mantis, 13, 1);
59 gpio_set_bits(mantis, 14, 1);
60 break;
61 case SEC_VOLTAGE_OFF:
62 dprintk(MANTIS_ERROR, 1, "Frontend (dummy) POWERDOWN");
63 break;
64 default:
65 dprintk(MANTIS_ERROR, 1, "Invalid = (%d)", (u32) voltage);
66 return -EINVAL;
67 }
68 mmwrite(0x00, MANTIS_GPIF_DOUT);
69
70 return 0;
71}
72
73static int vp1034_frontend_init(struct mantis_pci *mantis, struct dvb_frontend *fe)
74{
75 struct i2c_adapter *adapter = &mantis->adapter;
76
77 int err = 0;
78
79 err = mantis_frontend_power(mantis, POWER_ON);
80 if (err == 0) {
81 mantis_frontend_soft_reset(mantis);
82 msleep(250);
83
84 dprintk(MANTIS_ERROR, 1, "Probing for MB86A16 (DVB-S/DSS)");
85 fe = mb86a16_attach(&vp1034_mb86a16_config, adapter);
86 if (fe) {
87 dprintk(MANTIS_ERROR, 1,
88 "found MB86A16 DVB-S/DSS frontend @0x%02x",
89 vp1034_mb86a16_config.demod_address);
90
91 } else {
92 return -1;
93 }
94 } else {
95 dprintk(MANTIS_ERROR, 1, "Frontend on <%s> POWER ON failed! <%d>",
96 adapter->name,
97 err);
98
99 return -EIO;
100 }
101 mantis->fe = fe;
102 dprintk(MANTIS_ERROR, 1, "Done!");
103
104 return 0;
105}
106
107struct mantis_hwconfig vp1034_config = {
108 .model_name = MANTIS_MODEL_NAME,
109 .dev_type = MANTIS_DEV_TYPE,
110 .ts_size = MANTIS_TS_204,
111
112 .baud_rate = MANTIS_BAUD_9600,
113 .parity = MANTIS_PARITY_NONE,
114 .bytes = 0,
115
116 .frontend_init = vp1034_frontend_init,
117 .power = GPIF_A12,
118 .reset = GPIF_A13,
119};
diff --git a/drivers/media/dvb/mantis/mantis_vp1034.h b/drivers/media/dvb/mantis/mantis_vp1034.h
new file mode 100644
index 000000000000..323f38ef8e3d
--- /dev/null
+++ b/drivers/media/dvb/mantis/mantis_vp1034.h
@@ -0,0 +1,33 @@
1/*
2 Mantis VP-1034 driver
3
4 Copyright (C) Manu Abraham (abraham.manu@gmail.com)
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19*/
20
21#ifndef __MANTIS_VP1034_H
22#define __MANTIS_VP1034_H
23
24#include "dvb_frontend.h"
25#include "mantis_common.h"
26
27
28#define MANTIS_VP_1034_DVB_S 0x0014
29
30extern struct mantis_hwconfig vp1034_config;
31extern int vp1034_set_voltage(struct dvb_frontend *fe, fe_sec_voltage_t voltage);
32
33#endif /* __MANTIS_VP1034_H */
diff --git a/drivers/media/dvb/mantis/mantis_vp1041.c b/drivers/media/dvb/mantis/mantis_vp1041.c
new file mode 100644
index 000000000000..515346dd31d0
--- /dev/null
+++ b/drivers/media/dvb/mantis/mantis_vp1041.c
@@ -0,0 +1,358 @@
1/*
2 Mantis VP-1041 driver
3
4 Copyright (C) Manu Abraham (abraham.manu@gmail.com)
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19*/
20
21#include <linux/signal.h>
22#include <linux/sched.h>
23#include <linux/interrupt.h>
24
25#include "dmxdev.h"
26#include "dvbdev.h"
27#include "dvb_demux.h"
28#include "dvb_frontend.h"
29#include "dvb_net.h"
30
31#include "mantis_common.h"
32#include "mantis_ioc.h"
33#include "mantis_dvb.h"
34#include "mantis_vp1041.h"
35#include "stb0899_reg.h"
36#include "stb0899_drv.h"
37#include "stb0899_cfg.h"
38#include "stb6100_cfg.h"
39#include "stb6100.h"
40#include "lnbp21.h"
41
42#define MANTIS_MODEL_NAME "VP-1041"
43#define MANTIS_DEV_TYPE "DSS/DVB-S/DVB-S2"
44
45static const struct stb0899_s1_reg vp1041_stb0899_s1_init_1[] = {
46
47 /* 0x0000000b, *//* SYSREG */
48 { STB0899_DEV_ID , 0x30 },
49 { STB0899_DISCNTRL1 , 0x32 },
50 { STB0899_DISCNTRL2 , 0x80 },
51 { STB0899_DISRX_ST0 , 0x04 },
52 { STB0899_DISRX_ST1 , 0x00 },
53 { STB0899_DISPARITY , 0x00 },
54 { STB0899_DISFIFO , 0x00 },
55 { STB0899_DISSTATUS , 0x20 },
56 { STB0899_DISF22 , 0x99 },
57 { STB0899_DISF22RX , 0xa8 },
58 /* SYSREG ? */
59 { STB0899_ACRPRESC , 0x11 },
60 { STB0899_ACRDIV1 , 0x0a },
61 { STB0899_ACRDIV2 , 0x05 },
62 { STB0899_DACR1 , 0x00 },
63 { STB0899_DACR2 , 0x00 },
64 { STB0899_OUTCFG , 0x00 },
65 { STB0899_MODECFG , 0x00 },
66 { STB0899_IRQSTATUS_3 , 0xfe },
67 { STB0899_IRQSTATUS_2 , 0x03 },
68 { STB0899_IRQSTATUS_1 , 0x7c },
69 { STB0899_IRQSTATUS_0 , 0xf4 },
70 { STB0899_IRQMSK_3 , 0xf3 },
71 { STB0899_IRQMSK_2 , 0xfc },
72 { STB0899_IRQMSK_1 , 0xff },
73 { STB0899_IRQMSK_0 , 0xff },
74 { STB0899_IRQCFG , 0x00 },
75 { STB0899_I2CCFG , 0x88 },
76 { STB0899_I2CRPT , 0x58 },
77 { STB0899_IOPVALUE5 , 0x00 },
78 { STB0899_IOPVALUE4 , 0x33 },
79 { STB0899_IOPVALUE3 , 0x6d },
80 { STB0899_IOPVALUE2 , 0x90 },
81 { STB0899_IOPVALUE1 , 0x60 },
82 { STB0899_IOPVALUE0 , 0x00 },
83 { STB0899_GPIO00CFG , 0x82 },
84 { STB0899_GPIO01CFG , 0x82 },
85 { STB0899_GPIO02CFG , 0x82 },
86 { STB0899_GPIO03CFG , 0x82 },
87 { STB0899_GPIO04CFG , 0x82 },
88 { STB0899_GPIO05CFG , 0x82 },
89 { STB0899_GPIO06CFG , 0x82 },
90 { STB0899_GPIO07CFG , 0x82 },
91 { STB0899_GPIO08CFG , 0x82 },
92 { STB0899_GPIO09CFG , 0x82 },
93 { STB0899_GPIO10CFG , 0x82 },
94 { STB0899_GPIO11CFG , 0x82 },
95 { STB0899_GPIO12CFG , 0x82 },
96 { STB0899_GPIO13CFG , 0x82 },
97 { STB0899_GPIO14CFG , 0x82 },
98 { STB0899_GPIO15CFG , 0x82 },
99 { STB0899_GPIO16CFG , 0x82 },
100 { STB0899_GPIO17CFG , 0x82 },
101 { STB0899_GPIO18CFG , 0x82 },
102 { STB0899_GPIO19CFG , 0x82 },
103 { STB0899_GPIO20CFG , 0x82 },
104 { STB0899_SDATCFG , 0xb8 },
105 { STB0899_SCLTCFG , 0xba },
106 { STB0899_AGCRFCFG , 0x1c }, /* 0x11 */
107 { STB0899_GPIO22 , 0x82 }, /* AGCBB2CFG */
108 { STB0899_GPIO21 , 0x91 }, /* AGCBB1CFG */
109 { STB0899_DIRCLKCFG , 0x82 },
110 { STB0899_CLKOUT27CFG , 0x7e },
111 { STB0899_STDBYCFG , 0x82 },
112 { STB0899_CS0CFG , 0x82 },
113 { STB0899_CS1CFG , 0x82 },
114 { STB0899_DISEQCOCFG , 0x20 },
115 { STB0899_GPIO32CFG , 0x82 },
116 { STB0899_GPIO33CFG , 0x82 },
117 { STB0899_GPIO34CFG , 0x82 },
118 { STB0899_GPIO35CFG , 0x82 },
119 { STB0899_GPIO36CFG , 0x82 },
120 { STB0899_GPIO37CFG , 0x82 },
121 { STB0899_GPIO38CFG , 0x82 },
122 { STB0899_GPIO39CFG , 0x82 },
123 { STB0899_NCOARSE , 0x17 }, /* 0x15 = 27 Mhz Clock, F/3 = 198MHz, F/6 = 99MHz */
124 { STB0899_SYNTCTRL , 0x02 }, /* 0x00 = CLK from CLKI, 0x02 = CLK from XTALI */
125 { STB0899_FILTCTRL , 0x00 },
126 { STB0899_SYSCTRL , 0x01 },
127 { STB0899_STOPCLK1 , 0x20 },
128 { STB0899_STOPCLK2 , 0x00 },
129 { STB0899_INTBUFSTATUS , 0x00 },
130 { STB0899_INTBUFCTRL , 0x0a },
131 { 0xffff , 0xff },
132};
133
134static const struct stb0899_s1_reg vp1041_stb0899_s1_init_3[] = {
135 { STB0899_DEMOD , 0x00 },
136 { STB0899_RCOMPC , 0xc9 },
137 { STB0899_AGC1CN , 0x01 },
138 { STB0899_AGC1REF , 0x10 },
139 { STB0899_RTC , 0x23 },
140 { STB0899_TMGCFG , 0x4e },
141 { STB0899_AGC2REF , 0x34 },
142 { STB0899_TLSR , 0x84 },
143 { STB0899_CFD , 0xf7 },
144 { STB0899_ACLC , 0x87 },
145 { STB0899_BCLC , 0x94 },
146 { STB0899_EQON , 0x41 },
147 { STB0899_LDT , 0xf1 },
148 { STB0899_LDT2 , 0xe3 },
149 { STB0899_EQUALREF , 0xb4 },
150 { STB0899_TMGRAMP , 0x10 },
151 { STB0899_TMGTHD , 0x30 },
152 { STB0899_IDCCOMP , 0xfd },
153 { STB0899_QDCCOMP , 0xff },
154 { STB0899_POWERI , 0x0c },
155 { STB0899_POWERQ , 0x0f },
156 { STB0899_RCOMP , 0x6c },
157 { STB0899_AGCIQIN , 0x80 },
158 { STB0899_AGC2I1 , 0x06 },
159 { STB0899_AGC2I2 , 0x00 },
160 { STB0899_TLIR , 0x30 },
161 { STB0899_RTF , 0x7f },
162 { STB0899_DSTATUS , 0x00 },
163 { STB0899_LDI , 0xbc },
164 { STB0899_CFRM , 0xea },
165 { STB0899_CFRL , 0x31 },
166 { STB0899_NIRM , 0x2b },
167 { STB0899_NIRL , 0x80 },
168 { STB0899_ISYMB , 0x1d },
169 { STB0899_QSYMB , 0xa6 },
170 { STB0899_SFRH , 0x2f },
171 { STB0899_SFRM , 0x68 },
172 { STB0899_SFRL , 0x40 },
173 { STB0899_SFRUPH , 0x2f },
174 { STB0899_SFRUPM , 0x68 },
175 { STB0899_SFRUPL , 0x40 },
176 { STB0899_EQUAI1 , 0x02 },
177 { STB0899_EQUAQ1 , 0xff },
178 { STB0899_EQUAI2 , 0x04 },
179 { STB0899_EQUAQ2 , 0x05 },
180 { STB0899_EQUAI3 , 0x02 },
181 { STB0899_EQUAQ3 , 0xfd },
182 { STB0899_EQUAI4 , 0x03 },
183 { STB0899_EQUAQ4 , 0x07 },
184 { STB0899_EQUAI5 , 0x08 },
185 { STB0899_EQUAQ5 , 0xf5 },
186 { STB0899_DSTATUS2 , 0x00 },
187 { STB0899_VSTATUS , 0x00 },
188 { STB0899_VERROR , 0x86 },
189 { STB0899_IQSWAP , 0x2a },
190 { STB0899_ECNT1M , 0x00 },
191 { STB0899_ECNT1L , 0x00 },
192 { STB0899_ECNT2M , 0x00 },
193 { STB0899_ECNT2L , 0x00 },
194 { STB0899_ECNT3M , 0x0a },
195 { STB0899_ECNT3L , 0xad },
196 { STB0899_FECAUTO1 , 0x06 },
197 { STB0899_FECM , 0x01 },
198 { STB0899_VTH12 , 0xb0 },
199 { STB0899_VTH23 , 0x7a },
200 { STB0899_VTH34 , 0x58 },
201 { STB0899_VTH56 , 0x38 },
202 { STB0899_VTH67 , 0x34 },
203 { STB0899_VTH78 , 0x24 },
204 { STB0899_PRVIT , 0xff },
205 { STB0899_VITSYNC , 0x19 },
206 { STB0899_RSULC , 0xb1 }, /* DVB = 0xb1, DSS = 0xa1 */
207 { STB0899_TSULC , 0x42 },
208 { STB0899_RSLLC , 0x41 },
209 { STB0899_TSLPL , 0x12 },
210 { STB0899_TSCFGH , 0x0c },
211 { STB0899_TSCFGM , 0x00 },
212 { STB0899_TSCFGL , 0x00 },
213 { STB0899_TSOUT , 0x69 }, /* 0x0d for CAM */
214 { STB0899_RSSYNCDEL , 0x00 },
215 { STB0899_TSINHDELH , 0x02 },
216 { STB0899_TSINHDELM , 0x00 },
217 { STB0899_TSINHDELL , 0x00 },
218 { STB0899_TSLLSTKM , 0x1b },
219 { STB0899_TSLLSTKL , 0xb3 },
220 { STB0899_TSULSTKM , 0x00 },
221 { STB0899_TSULSTKL , 0x00 },
222 { STB0899_PCKLENUL , 0xbc },
223 { STB0899_PCKLENLL , 0xcc },
224 { STB0899_RSPCKLEN , 0xbd },
225 { STB0899_TSSTATUS , 0x90 },
226 { STB0899_ERRCTRL1 , 0xb6 },
227 { STB0899_ERRCTRL2 , 0x95 },
228 { STB0899_ERRCTRL3 , 0x8d },
229 { STB0899_DMONMSK1 , 0x27 },
230 { STB0899_DMONMSK0 , 0x03 },
231 { STB0899_DEMAPVIT , 0x5c },
232 { STB0899_PLPARM , 0x19 },
233 { STB0899_PDELCTRL , 0x48 },
234 { STB0899_PDELCTRL2 , 0x00 },
235 { STB0899_BBHCTRL1 , 0x00 },
236 { STB0899_BBHCTRL2 , 0x00 },
237 { STB0899_HYSTTHRESH , 0x77 },
238 { STB0899_MATCSTM , 0x00 },
239 { STB0899_MATCSTL , 0x00 },
240 { STB0899_UPLCSTM , 0x00 },
241 { STB0899_UPLCSTL , 0x00 },
242 { STB0899_DFLCSTM , 0x00 },
243 { STB0899_DFLCSTL , 0x00 },
244 { STB0899_SYNCCST , 0x00 },
245 { STB0899_SYNCDCSTM , 0x00 },
246 { STB0899_SYNCDCSTL , 0x00 },
247 { STB0899_ISI_ENTRY , 0x00 },
248 { STB0899_ISI_BIT_EN , 0x00 },
249 { STB0899_MATSTRM , 0xf0 },
250 { STB0899_MATSTRL , 0x02 },
251 { STB0899_UPLSTRM , 0x45 },
252 { STB0899_UPLSTRL , 0x60 },
253 { STB0899_DFLSTRM , 0xe3 },
254 { STB0899_DFLSTRL , 0x00 },
255 { STB0899_SYNCSTR , 0x47 },
256 { STB0899_SYNCDSTRM , 0x05 },
257 { STB0899_SYNCDSTRL , 0x18 },
258 { STB0899_CFGPDELSTATUS1 , 0x19 },
259 { STB0899_CFGPDELSTATUS2 , 0x2b },
260 { STB0899_BBFERRORM , 0x00 },
261 { STB0899_BBFERRORL , 0x01 },
262 { STB0899_UPKTERRORM , 0x00 },
263 { STB0899_UPKTERRORL , 0x00 },
264 { 0xffff , 0xff },
265};
266
267struct stb0899_config vp1041_stb0899_config = {
268 .init_dev = vp1041_stb0899_s1_init_1,
269 .init_s2_demod = stb0899_s2_init_2,
270 .init_s1_demod = vp1041_stb0899_s1_init_3,
271 .init_s2_fec = stb0899_s2_init_4,
272 .init_tst = stb0899_s1_init_5,
273
274 .demod_address = 0x68, /* 0xd0 >> 1 */
275
276 .xtal_freq = 27000000,
277 .inversion = IQ_SWAP_ON, /* 1 */
278
279 .lo_clk = 76500000,
280 .hi_clk = 99000000,
281
282 .esno_ave = STB0899_DVBS2_ESNO_AVE,
283 .esno_quant = STB0899_DVBS2_ESNO_QUANT,
284 .avframes_coarse = STB0899_DVBS2_AVFRAMES_COARSE,
285 .avframes_fine = STB0899_DVBS2_AVFRAMES_FINE,
286 .miss_threshold = STB0899_DVBS2_MISS_THRESHOLD,
287 .uwp_threshold_acq = STB0899_DVBS2_UWP_THRESHOLD_ACQ,
288 .uwp_threshold_track = STB0899_DVBS2_UWP_THRESHOLD_TRACK,
289 .uwp_threshold_sof = STB0899_DVBS2_UWP_THRESHOLD_SOF,
290 .sof_search_timeout = STB0899_DVBS2_SOF_SEARCH_TIMEOUT,
291
292 .btr_nco_bits = STB0899_DVBS2_BTR_NCO_BITS,
293 .btr_gain_shift_offset = STB0899_DVBS2_BTR_GAIN_SHIFT_OFFSET,
294 .crl_nco_bits = STB0899_DVBS2_CRL_NCO_BITS,
295 .ldpc_max_iter = STB0899_DVBS2_LDPC_MAX_ITER,
296
297 .tuner_get_frequency = stb6100_get_frequency,
298 .tuner_set_frequency = stb6100_set_frequency,
299 .tuner_set_bandwidth = stb6100_set_bandwidth,
300 .tuner_get_bandwidth = stb6100_get_bandwidth,
301 .tuner_set_rfsiggain = NULL,
302};
303
304struct stb6100_config vp1041_stb6100_config = {
305 .tuner_address = 0x60,
306 .refclock = 27000000,
307};
308
309static int vp1041_frontend_init(struct mantis_pci *mantis, struct dvb_frontend *fe)
310{
311 struct i2c_adapter *adapter = &mantis->adapter;
312
313 int err = 0;
314
315 err = mantis_frontend_power(mantis, POWER_ON);
316 if (err == 0) {
317 mantis_frontend_soft_reset(mantis);
318 msleep(250);
319 mantis->fe = stb0899_attach(&vp1041_stb0899_config, adapter);
320 if (mantis->fe) {
321 dprintk(MANTIS_ERROR, 1,
322 "found STB0899 DVB-S/DVB-S2 frontend @0x%02x",
323 vp1041_stb0899_config.demod_address);
324
325 if (stb6100_attach(mantis->fe, &vp1041_stb6100_config, adapter)) {
326 if (!lnbp21_attach(mantis->fe, adapter, 0, 0))
327 dprintk(MANTIS_ERROR, 1, "No LNBP21 found!");
328 }
329 } else {
330 return -EREMOTEIO;
331 }
332 } else {
333 dprintk(MANTIS_ERROR, 1, "Frontend on <%s> POWER ON failed! <%d>",
334 adapter->name,
335 err);
336
337 return -EIO;
338 }
339
340
341 dprintk(MANTIS_ERROR, 1, "Done!");
342
343 return 0;
344}
345
346struct mantis_hwconfig vp1041_config = {
347 .model_name = MANTIS_MODEL_NAME,
348 .dev_type = MANTIS_DEV_TYPE,
349 .ts_size = MANTIS_TS_188,
350
351 .baud_rate = MANTIS_BAUD_9600,
352 .parity = MANTIS_PARITY_NONE,
353 .bytes = 0,
354
355 .frontend_init = vp1041_frontend_init,
356 .power = GPIF_A12,
357 .reset = GPIF_A13,
358};
diff --git a/drivers/media/dvb/mantis/mantis_vp1041.h b/drivers/media/dvb/mantis/mantis_vp1041.h
new file mode 100644
index 000000000000..1ae5b3de8081
--- /dev/null
+++ b/drivers/media/dvb/mantis/mantis_vp1041.h
@@ -0,0 +1,33 @@
1/*
2 Mantis VP-1041 driver
3
4 Copyright (C) Manu Abraham (abraham.manu@gmail.com)
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19*/
20
21#ifndef __MANTIS_VP1041_H
22#define __MANTIS_VP1041_H
23
24#include "mantis_common.h"
25
26#define MANTIS_VP_1041_DVB_S2 0x0031
27#define SKYSTAR_HD2_10 0x0001
28#define SKYSTAR_HD2_20 0x0003
29#define CINERGY_S2_PCI_HD 0x1179
30
31extern struct mantis_hwconfig vp1041_config;
32
33#endif /* __MANTIS_VP1041_H */
diff --git a/drivers/media/dvb/mantis/mantis_vp2033.c b/drivers/media/dvb/mantis/mantis_vp2033.c
new file mode 100644
index 000000000000..10ce81790a8c
--- /dev/null
+++ b/drivers/media/dvb/mantis/mantis_vp2033.c
@@ -0,0 +1,187 @@
1/*
2 Mantis VP-2033 driver
3
4 Copyright (C) Manu Abraham (abraham.manu@gmail.com)
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19*/
20
21#include <linux/signal.h>
22#include <linux/sched.h>
23#include <linux/interrupt.h>
24
25#include "dmxdev.h"
26#include "dvbdev.h"
27#include "dvb_demux.h"
28#include "dvb_frontend.h"
29#include "dvb_net.h"
30
31#include "tda1002x.h"
32#include "mantis_common.h"
33#include "mantis_ioc.h"
34#include "mantis_dvb.h"
35#include "mantis_vp2033.h"
36
37#define MANTIS_MODEL_NAME "VP-2033"
38#define MANTIS_DEV_TYPE "DVB-C"
39
40struct tda1002x_config vp2033_tda1002x_cu1216_config = {
41 .demod_address = 0x18 >> 1,
42 .invert = 1,
43};
44
45struct tda10023_config vp2033_tda10023_cu1216_config = {
46 .demod_address = 0x18 >> 1,
47 .invert = 1,
48};
49
50static u8 read_pwm(struct mantis_pci *mantis)
51{
52 struct i2c_adapter *adapter = &mantis->adapter;
53
54 u8 b = 0xff;
55 u8 pwm;
56 struct i2c_msg msg[] = {
57 {.addr = 0x50, .flags = 0, .buf = &b, .len = 1},
58 {.addr = 0x50, .flags = I2C_M_RD, .buf = &pwm, .len = 1}
59 };
60
61 if ((i2c_transfer(adapter, msg, 2) != 2)
62 || (pwm == 0xff))
63 pwm = 0x48;
64
65 return pwm;
66}
67
68static int tda1002x_cu1216_tuner_set(struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
69{
70 struct mantis_pci *mantis = fe->dvb->priv;
71 struct i2c_adapter *adapter = &mantis->adapter;
72
73 u8 buf[6];
74 struct i2c_msg msg = {.addr = 0x60, .flags = 0, .buf = buf, .len = sizeof(buf)};
75 int i;
76
77#define CU1216_IF 36125000
78#define TUNER_MUL 62500
79
80 u32 div = (params->frequency + CU1216_IF + TUNER_MUL / 2) / TUNER_MUL;
81
82 buf[0] = (div >> 8) & 0x7f;
83 buf[1] = div & 0xff;
84 buf[2] = 0xce;
85 buf[3] = (params->frequency < 150000000 ? 0x01 :
86 params->frequency < 445000000 ? 0x02 : 0x04);
87 buf[4] = 0xde;
88 buf[5] = 0x20;
89
90 if (fe->ops.i2c_gate_ctrl)
91 fe->ops.i2c_gate_ctrl(fe, 1);
92
93 if (i2c_transfer(adapter, &msg, 1) != 1)
94 return -EIO;
95
96 /* wait for the pll lock */
97 msg.flags = I2C_M_RD;
98 msg.len = 1;
99 for (i = 0; i < 20; i++) {
100 if (fe->ops.i2c_gate_ctrl)
101 fe->ops.i2c_gate_ctrl(fe, 1);
102
103 if (i2c_transfer(adapter, &msg, 1) == 1 && (buf[0] & 0x40))
104 break;
105
106 msleep(10);
107 }
108
109 /* switch the charge pump to the lower current */
110 msg.flags = 0;
111 msg.len = 2;
112 msg.buf = &buf[2];
113 buf[2] &= ~0x40;
114 if (fe->ops.i2c_gate_ctrl)
115 fe->ops.i2c_gate_ctrl(fe, 1);
116
117 if (i2c_transfer(adapter, &msg, 1) != 1)
118 return -EIO;
119
120 return 0;
121}
122
123static int vp2033_frontend_init(struct mantis_pci *mantis, struct dvb_frontend *fe)
124{
125 struct i2c_adapter *adapter = &mantis->adapter;
126
127 int err = 0;
128
129 err = mantis_frontend_power(mantis, POWER_ON);
130 if (err == 0) {
131 mantis_frontend_soft_reset(mantis);
132 msleep(250);
133
134 dprintk(MANTIS_ERROR, 1, "Probing for CU1216 (DVB-C)");
135 fe = tda10021_attach(&vp2033_tda1002x_cu1216_config,
136 adapter,
137 read_pwm(mantis));
138
139 if (fe) {
140 dprintk(MANTIS_ERROR, 1,
141 "found Philips CU1216 DVB-C frontend (TDA10021) @ 0x%02x",
142 vp2033_tda1002x_cu1216_config.demod_address);
143 } else {
144 fe = tda10023_attach(&vp2033_tda10023_cu1216_config,
145 adapter,
146 read_pwm(mantis));
147
148 if (fe) {
149 dprintk(MANTIS_ERROR, 1,
150 "found Philips CU1216 DVB-C frontend (TDA10023) @ 0x%02x",
151 vp2033_tda1002x_cu1216_config.demod_address);
152 }
153 }
154
155 if (fe) {
156 fe->ops.tuner_ops.set_params = tda1002x_cu1216_tuner_set;
157 dprintk(MANTIS_ERROR, 1, "Mantis DVB-C Philips CU1216 frontend attach success");
158 } else {
159 return -1;
160 }
161 } else {
162 dprintk(MANTIS_ERROR, 1, "Frontend on <%s> POWER ON failed! <%d>",
163 adapter->name,
164 err);
165
166 return -EIO;
167 }
168
169 mantis->fe = fe;
170 dprintk(MANTIS_DEBUG, 1, "Done!");
171
172 return 0;
173}
174
175struct mantis_hwconfig vp2033_config = {
176 .model_name = MANTIS_MODEL_NAME,
177 .dev_type = MANTIS_DEV_TYPE,
178 .ts_size = MANTIS_TS_204,
179
180 .baud_rate = MANTIS_BAUD_9600,
181 .parity = MANTIS_PARITY_NONE,
182 .bytes = 0,
183
184 .frontend_init = vp2033_frontend_init,
185 .power = GPIF_A12,
186 .reset = GPIF_A13,
187};
diff --git a/drivers/media/dvb/mantis/mantis_vp2033.h b/drivers/media/dvb/mantis/mantis_vp2033.h
new file mode 100644
index 000000000000..c55242b79d54
--- /dev/null
+++ b/drivers/media/dvb/mantis/mantis_vp2033.h
@@ -0,0 +1,30 @@
1/*
2 Mantis VP-2033 driver
3
4 Copyright (C) Manu Abraham (abraham.manu@gmail.com)
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19*/
20
21#ifndef __MANTIS_VP2033_H
22#define __MANTIS_VP2033_H
23
24#include "mantis_common.h"
25
26#define MANTIS_VP_2033_DVB_C 0x0008
27
28extern struct mantis_hwconfig vp2033_config;
29
30#endif /* __MANTIS_VP2033_H */
diff --git a/drivers/media/dvb/mantis/mantis_vp2040.c b/drivers/media/dvb/mantis/mantis_vp2040.c
new file mode 100644
index 000000000000..a7ca233e800b
--- /dev/null
+++ b/drivers/media/dvb/mantis/mantis_vp2040.c
@@ -0,0 +1,186 @@
1/*
2 Mantis VP-2040 driver
3
4 Copyright (C) Manu Abraham (abraham.manu@gmail.com)
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19*/
20
21#include <linux/signal.h>
22#include <linux/sched.h>
23#include <linux/interrupt.h>
24
25#include "dmxdev.h"
26#include "dvbdev.h"
27#include "dvb_demux.h"
28#include "dvb_frontend.h"
29#include "dvb_net.h"
30
31#include "tda1002x.h"
32#include "mantis_common.h"
33#include "mantis_ioc.h"
34#include "mantis_dvb.h"
35#include "mantis_vp2040.h"
36
37#define MANTIS_MODEL_NAME "VP-2040"
38#define MANTIS_DEV_TYPE "DVB-C"
39
40struct tda1002x_config vp2040_tda1002x_cu1216_config = {
41 .demod_address = 0x18 >> 1,
42 .invert = 1,
43};
44
45struct tda10023_config vp2040_tda10023_cu1216_config = {
46 .demod_address = 0x18 >> 1,
47 .invert = 1,
48};
49
50static int tda1002x_cu1216_tuner_set(struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
51{
52 struct mantis_pci *mantis = fe->dvb->priv;
53 struct i2c_adapter *adapter = &mantis->adapter;
54
55 u8 buf[6];
56 struct i2c_msg msg = {.addr = 0x60, .flags = 0, .buf = buf, .len = sizeof(buf)};
57 int i;
58
59#define CU1216_IF 36125000
60#define TUNER_MUL 62500
61
62 u32 div = (params->frequency + CU1216_IF + TUNER_MUL / 2) / TUNER_MUL;
63
64 buf[0] = (div >> 8) & 0x7f;
65 buf[1] = div & 0xff;
66 buf[2] = 0xce;
67 buf[3] = (params->frequency < 150000000 ? 0x01 :
68 params->frequency < 445000000 ? 0x02 : 0x04);
69 buf[4] = 0xde;
70 buf[5] = 0x20;
71
72 if (fe->ops.i2c_gate_ctrl)
73 fe->ops.i2c_gate_ctrl(fe, 1);
74
75 if (i2c_transfer(adapter, &msg, 1) != 1)
76 return -EIO;
77
78 /* wait for the pll lock */
79 msg.flags = I2C_M_RD;
80 msg.len = 1;
81 for (i = 0; i < 20; i++) {
82 if (fe->ops.i2c_gate_ctrl)
83 fe->ops.i2c_gate_ctrl(fe, 1);
84
85 if (i2c_transfer(adapter, &msg, 1) == 1 && (buf[0] & 0x40))
86 break;
87
88 msleep(10);
89 }
90
91 /* switch the charge pump to the lower current */
92 msg.flags = 0;
93 msg.len = 2;
94 msg.buf = &buf[2];
95 buf[2] &= ~0x40;
96 if (fe->ops.i2c_gate_ctrl)
97 fe->ops.i2c_gate_ctrl(fe, 1);
98
99 if (i2c_transfer(adapter, &msg, 1) != 1)
100 return -EIO;
101
102 return 0;
103}
104
105static u8 read_pwm(struct mantis_pci *mantis)
106{
107 struct i2c_adapter *adapter = &mantis->adapter;
108
109 u8 b = 0xff;
110 u8 pwm;
111 struct i2c_msg msg[] = {
112 {.addr = 0x50, .flags = 0, .buf = &b, .len = 1},
113 {.addr = 0x50, .flags = I2C_M_RD, .buf = &pwm, .len = 1}
114 };
115
116 if ((i2c_transfer(adapter, msg, 2) != 2)
117 || (pwm == 0xff))
118 pwm = 0x48;
119
120 return pwm;
121}
122
123static int vp2040_frontend_init(struct mantis_pci *mantis, struct dvb_frontend *fe)
124{
125 struct i2c_adapter *adapter = &mantis->adapter;
126
127 int err = 0;
128
129 err = mantis_frontend_power(mantis, POWER_ON);
130 if (err == 0) {
131 mantis_frontend_soft_reset(mantis);
132 msleep(250);
133
134 dprintk(MANTIS_ERROR, 1, "Probing for CU1216 (DVB-C)");
135 fe = tda10021_attach(&vp2040_tda1002x_cu1216_config,
136 adapter,
137 read_pwm(mantis));
138
139 if (fe) {
140 dprintk(MANTIS_ERROR, 1,
141 "found Philips CU1216 DVB-C frontend (TDA10021) @ 0x%02x",
142 vp2040_tda1002x_cu1216_config.demod_address);
143 } else {
144 fe = tda10023_attach(&vp2040_tda10023_cu1216_config,
145 adapter,
146 read_pwm(mantis));
147
148 if (fe) {
149 dprintk(MANTIS_ERROR, 1,
150 "found Philips CU1216 DVB-C frontend (TDA10023) @ 0x%02x",
151 vp2040_tda1002x_cu1216_config.demod_address);
152 }
153 }
154
155 if (fe) {
156 fe->ops.tuner_ops.set_params = tda1002x_cu1216_tuner_set;
157 dprintk(MANTIS_ERROR, 1, "Mantis DVB-C Philips CU1216 frontend attach success");
158 } else {
159 return -1;
160 }
161 } else {
162 dprintk(MANTIS_ERROR, 1, "Frontend on <%s> POWER ON failed! <%d>",
163 adapter->name,
164 err);
165
166 return -EIO;
167 }
168 mantis->fe = fe;
169 dprintk(MANTIS_DEBUG, 1, "Done!");
170
171 return 0;
172}
173
174struct mantis_hwconfig vp2040_config = {
175 .model_name = MANTIS_MODEL_NAME,
176 .dev_type = MANTIS_DEV_TYPE,
177 .ts_size = MANTIS_TS_204,
178
179 .baud_rate = MANTIS_BAUD_9600,
180 .parity = MANTIS_PARITY_NONE,
181 .bytes = 0,
182
183 .frontend_init = vp2040_frontend_init,
184 .power = GPIF_A12,
185 .reset = GPIF_A13,
186};
diff --git a/drivers/media/dvb/mantis/mantis_vp2040.h b/drivers/media/dvb/mantis/mantis_vp2040.h
new file mode 100644
index 000000000000..d125e219b685
--- /dev/null
+++ b/drivers/media/dvb/mantis/mantis_vp2040.h
@@ -0,0 +1,32 @@
1/*
2 Mantis VP-2040 driver
3
4 Copyright (C) Manu Abraham (abraham.manu@gmail.com)
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19*/
20
21#ifndef __MANTIS_VP2040_H
22#define __MANTIS_VP2040_H
23
24#include "mantis_common.h"
25
26#define MANTIS_VP_2040_DVB_C 0x0043
27#define CINERGY_C 0x1178
28#define CABLESTAR_HD2 0x0002
29
30extern struct mantis_hwconfig vp2040_config;
31
32#endif /* __MANTIS_VP2040_H */
diff --git a/drivers/media/dvb/mantis/mantis_vp3028.c b/drivers/media/dvb/mantis/mantis_vp3028.c
new file mode 100644
index 000000000000..4155c838a18a
--- /dev/null
+++ b/drivers/media/dvb/mantis/mantis_vp3028.c
@@ -0,0 +1,38 @@
1/*
2 Mantis VP-3028 driver
3
4 Copyright (C) Manu Abraham (abraham.manu@gmail.com)
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19*/
20
21#include "mantis_common.h"
22#include "mantis_vp3028.h"
23
24struct zl10353_config mantis_vp3028_config = {
25 .demod_address = 0x0f,
26};
27
28#define MANTIS_MODEL_NAME "VP-3028"
29#define MANTIS_DEV_TYPE "DVB-T"
30
31struct mantis_hwconfig vp3028_mantis_config = {
32 .model_name = MANTIS_MODEL_NAME,
33 .dev_type = MANTIS_DEV_TYPE,
34 .ts_size = MANTIS_TS_188,
35 .baud_rate = MANTIS_BAUD_9600,
36 .parity = MANTIS_PARITY_NONE,
37 .bytes = 0,
38};
diff --git a/drivers/media/dvb/mantis/mantis_vp3028.h b/drivers/media/dvb/mantis/mantis_vp3028.h
new file mode 100644
index 000000000000..b07be6adc522
--- /dev/null
+++ b/drivers/media/dvb/mantis/mantis_vp3028.h
@@ -0,0 +1,33 @@
1/*
2 Mantis VP-3028 driver
3
4 Copyright (C) Manu Abraham (abraham.manu@gmail.com)
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19*/
20
21#ifndef __MANTIS_VP3028_H
22#define __MANTIS_VP3028_H
23
24#include "dvb_frontend.h"
25#include "mantis_common.h"
26#include "zl10353.h"
27
28#define MANTIS_VP_3028_DVB_T 0x0028
29
30extern struct zl10353_config mantis_vp3028_config;
31extern struct mantis_hwconfig vp3028_mantis_config;
32
33#endif /* __MANTIS_VP3028_H */
diff --git a/drivers/media/dvb/mantis/mantis_vp3030.c b/drivers/media/dvb/mantis/mantis_vp3030.c
new file mode 100644
index 000000000000..1f4334214953
--- /dev/null
+++ b/drivers/media/dvb/mantis/mantis_vp3030.c
@@ -0,0 +1,105 @@
1/*
2 Mantis VP-3030 driver
3
4 Copyright (C) Manu Abraham (abraham.manu@gmail.com)
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19*/
20
21#include <linux/signal.h>
22#include <linux/sched.h>
23#include <linux/interrupt.h>
24
25#include "dmxdev.h"
26#include "dvbdev.h"
27#include "dvb_demux.h"
28#include "dvb_frontend.h"
29#include "dvb_net.h"
30
31#include "zl10353.h"
32#include "tda665x.h"
33#include "mantis_common.h"
34#include "mantis_ioc.h"
35#include "mantis_dvb.h"
36#include "mantis_vp3030.h"
37
38struct zl10353_config mantis_vp3030_config = {
39 .demod_address = 0x0f,
40};
41
42struct tda665x_config env57h12d5_config = {
43 .name = "ENV57H12D5 (ET-50DT)",
44 .addr = 0x60,
45 .frequency_min = 47000000,
46 .frequency_max = 862000000,
47 .frequency_offst = 3616667,
48 .ref_multiplier = 6, /* 1/6 MHz */
49 .ref_divider = 100000, /* 1/6 MHz */
50};
51
52#define MANTIS_MODEL_NAME "VP-3030"
53#define MANTIS_DEV_TYPE "DVB-T"
54
55
56static int vp3030_frontend_init(struct mantis_pci *mantis, struct dvb_frontend *fe)
57{
58 struct i2c_adapter *adapter = &mantis->adapter;
59 struct mantis_hwconfig *config = mantis->hwconfig;
60 int err = 0;
61
62 gpio_set_bits(mantis, config->reset, 0);
63 msleep(100);
64 err = mantis_frontend_power(mantis, POWER_ON);
65 msleep(100);
66 gpio_set_bits(mantis, config->reset, 1);
67
68 if (err == 0) {
69 msleep(250);
70 dprintk(MANTIS_ERROR, 1, "Probing for 10353 (DVB-T)");
71 fe = zl10353_attach(&mantis_vp3030_config, adapter);
72
73 if (!fe)
74 return -1;
75
76 tda665x_attach(fe, &env57h12d5_config, adapter);
77 } else {
78 dprintk(MANTIS_ERROR, 1, "Frontend on <%s> POWER ON failed! <%d>",
79 adapter->name,
80 err);
81
82 return -EIO;
83
84 }
85 mantis->fe = fe;
86 dprintk(MANTIS_ERROR, 1, "Done!");
87
88 return 0;
89}
90
91struct mantis_hwconfig vp3030_config = {
92 .model_name = MANTIS_MODEL_NAME,
93 .dev_type = MANTIS_DEV_TYPE,
94 .ts_size = MANTIS_TS_188,
95
96 .baud_rate = MANTIS_BAUD_9600,
97 .parity = MANTIS_PARITY_NONE,
98 .bytes = 0,
99
100 .frontend_init = vp3030_frontend_init,
101 .power = GPIF_A12,
102 .reset = GPIF_A13,
103
104 .i2c_mode = MANTIS_BYTE_MODE
105};
diff --git a/drivers/media/dvb/mantis/mantis_vp3030.h b/drivers/media/dvb/mantis/mantis_vp3030.h
new file mode 100644
index 000000000000..5f12c4266277
--- /dev/null
+++ b/drivers/media/dvb/mantis/mantis_vp3030.h
@@ -0,0 +1,30 @@
1/*
2 Mantis VP-3030 driver
3
4 Copyright (C) Manu Abraham (abraham.manu@gmail.com)
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19*/
20
21#ifndef __MANTIS_VP3030_H
22#define __MANTIS_VP3030_H
23
24#include "mantis_common.h"
25
26#define MANTIS_VP_3030_DVB_T 0x0024
27
28extern struct mantis_hwconfig vp3030_config;
29
30#endif /* __MANTIS_VP3030_H */
diff --git a/drivers/media/video/bt8xx/bttv-driver.c b/drivers/media/video/bt8xx/bttv-driver.c
index 3182a406bdd1..ae08b077fd04 100644
--- a/drivers/media/video/bt8xx/bttv-driver.c
+++ b/drivers/media/video/bt8xx/bttv-driver.c
@@ -4461,6 +4461,7 @@ static int __devinit bttv_probe(struct pci_dev *dev,
4461 request_modules(btv); 4461 request_modules(btv);
4462 } 4462 }
4463 4463
4464 init_bttv_i2c_ir(btv);
4464 bttv_input_init(btv); 4465 bttv_input_init(btv);
4465 4466
4466 /* everything is fine */ 4467 /* everything is fine */
diff --git a/drivers/media/video/bt8xx/bttv-i2c.c b/drivers/media/video/bt8xx/bttv-i2c.c
index 63aa31a041e8..407fa61e4cda 100644
--- a/drivers/media/video/bt8xx/bttv-i2c.c
+++ b/drivers/media/video/bt8xx/bttv-i2c.c
@@ -388,7 +388,12 @@ int __devinit init_bttv_i2c(struct bttv *btv)
388 if (0 == btv->i2c_rc && i2c_scan) 388 if (0 == btv->i2c_rc && i2c_scan)
389 do_i2c_scan(btv->c.v4l2_dev.name, &btv->i2c_client); 389 do_i2c_scan(btv->c.v4l2_dev.name, &btv->i2c_client);
390 390
391 /* Instantiate the IR receiver device, if present */ 391 return btv->i2c_rc;
392}
393
394/* Instantiate the I2C IR receiver device, if present */
395void __devinit init_bttv_i2c_ir(struct bttv *btv)
396{
392 if (0 == btv->i2c_rc) { 397 if (0 == btv->i2c_rc) {
393 struct i2c_board_info info; 398 struct i2c_board_info info;
394 /* The external IR receiver is at i2c address 0x34 (0x35 for 399 /* The external IR receiver is at i2c address 0x34 (0x35 for
@@ -408,7 +413,6 @@ int __devinit init_bttv_i2c(struct bttv *btv)
408 strlcpy(info.type, "ir_video", I2C_NAME_SIZE); 413 strlcpy(info.type, "ir_video", I2C_NAME_SIZE);
409 i2c_new_probed_device(&btv->c.i2c_adap, &info, addr_list); 414 i2c_new_probed_device(&btv->c.i2c_adap, &info, addr_list);
410 } 415 }
411 return btv->i2c_rc;
412} 416}
413 417
414int __devexit fini_bttv_i2c(struct bttv *btv) 418int __devexit fini_bttv_i2c(struct bttv *btv)
diff --git a/drivers/media/video/bt8xx/bttvp.h b/drivers/media/video/bt8xx/bttvp.h
index a1d0e9c9f286..6cccc2a17eee 100644
--- a/drivers/media/video/bt8xx/bttvp.h
+++ b/drivers/media/video/bt8xx/bttvp.h
@@ -279,6 +279,7 @@ extern unsigned int bttv_debug;
279extern unsigned int bttv_gpio; 279extern unsigned int bttv_gpio;
280extern void bttv_gpio_tracking(struct bttv *btv, char *comment); 280extern void bttv_gpio_tracking(struct bttv *btv, char *comment);
281extern int init_bttv_i2c(struct bttv *btv); 281extern int init_bttv_i2c(struct bttv *btv);
282extern void init_bttv_i2c_ir(struct bttv *btv);
282extern int fini_bttv_i2c(struct bttv *btv); 283extern int fini_bttv_i2c(struct bttv *btv);
283 284
284#define bttv_printk if (bttv_verbose) printk 285#define bttv_printk if (bttv_verbose) printk
diff --git a/drivers/media/video/cx23885/cx23888-ir.c b/drivers/media/video/cx23885/cx23888-ir.c
index 3ccc8afeccf3..2bf57a4527d3 100644
--- a/drivers/media/video/cx23885/cx23888-ir.c
+++ b/drivers/media/video/cx23885/cx23888-ir.c
@@ -124,15 +124,12 @@ struct cx23888_ir_state {
124 atomic_t rxclk_divider; 124 atomic_t rxclk_divider;
125 atomic_t rx_invert; 125 atomic_t rx_invert;
126 126
127 struct kfifo *rx_kfifo; 127 struct kfifo rx_kfifo;
128 spinlock_t rx_kfifo_lock; 128 spinlock_t rx_kfifo_lock;
129 129
130 struct v4l2_subdev_ir_parameters tx_params; 130 struct v4l2_subdev_ir_parameters tx_params;
131 struct mutex tx_params_lock; 131 struct mutex tx_params_lock;
132 atomic_t txclk_divider; 132 atomic_t txclk_divider;
133
134 struct kfifo *tx_kfifo;
135 spinlock_t tx_kfifo_lock;
136}; 133};
137 134
138static inline struct cx23888_ir_state *to_state(struct v4l2_subdev *sd) 135static inline struct cx23888_ir_state *to_state(struct v4l2_subdev *sd)
@@ -522,6 +519,7 @@ static int cx23888_ir_irq_handler(struct v4l2_subdev *sd, u32 status,
522{ 519{
523 struct cx23888_ir_state *state = to_state(sd); 520 struct cx23888_ir_state *state = to_state(sd);
524 struct cx23885_dev *dev = state->dev; 521 struct cx23885_dev *dev = state->dev;
522 unsigned long flags;
525 523
526 u32 cntrl = cx23888_ir_read4(dev, CX23888_IR_CNTRL_REG); 524 u32 cntrl = cx23888_ir_read4(dev, CX23888_IR_CNTRL_REG);
527 u32 irqen = cx23888_ir_read4(dev, CX23888_IR_IRQEN_REG); 525 u32 irqen = cx23888_ir_read4(dev, CX23888_IR_IRQEN_REG);
@@ -594,8 +592,9 @@ static int cx23888_ir_irq_handler(struct v4l2_subdev *sd, u32 status,
594 if (i == 0) 592 if (i == 0)
595 break; 593 break;
596 j = i * sizeof(u32); 594 j = i * sizeof(u32);
597 k = kfifo_put(state->rx_kfifo, 595 k = kfifo_in_locked(&state->rx_kfifo,
598 (unsigned char *) rx_data, j); 596 (unsigned char *) rx_data, j,
597 &state->rx_kfifo_lock);
599 if (k != j) 598 if (k != j)
600 kror++; /* rx_kfifo over run */ 599 kror++; /* rx_kfifo over run */
601 } 600 }
@@ -631,8 +630,11 @@ static int cx23888_ir_irq_handler(struct v4l2_subdev *sd, u32 status,
631 cx23888_ir_write4(dev, CX23888_IR_CNTRL_REG, cntrl); 630 cx23888_ir_write4(dev, CX23888_IR_CNTRL_REG, cntrl);
632 *handled = true; 631 *handled = true;
633 } 632 }
634 if (kfifo_len(state->rx_kfifo) >= CX23888_IR_RX_KFIFO_SIZE / 2) 633
634 spin_lock_irqsave(&state->rx_kfifo_lock, flags);
635 if (kfifo_len(&state->rx_kfifo) >= CX23888_IR_RX_KFIFO_SIZE / 2)
635 events |= V4L2_SUBDEV_IR_RX_FIFO_SERVICE_REQ; 636 events |= V4L2_SUBDEV_IR_RX_FIFO_SERVICE_REQ;
637 spin_unlock_irqrestore(&state->rx_kfifo_lock, flags);
636 638
637 if (events) 639 if (events)
638 v4l2_subdev_notify(sd, V4L2_SUBDEV_IR_RX_NOTIFY, &events); 640 v4l2_subdev_notify(sd, V4L2_SUBDEV_IR_RX_NOTIFY, &events);
@@ -657,7 +659,7 @@ static int cx23888_ir_rx_read(struct v4l2_subdev *sd, u8 *buf, size_t count,
657 return 0; 659 return 0;
658 } 660 }
659 661
660 n = kfifo_get(state->rx_kfifo, buf, n); 662 n = kfifo_out_locked(&state->rx_kfifo, buf, n, &state->rx_kfifo_lock);
661 663
662 n /= sizeof(u32); 664 n /= sizeof(u32);
663 *num = n * sizeof(u32); 665 *num = n * sizeof(u32);
@@ -785,7 +787,12 @@ static int cx23888_ir_rx_s_parameters(struct v4l2_subdev *sd,
785 o->interrupt_enable = p->interrupt_enable; 787 o->interrupt_enable = p->interrupt_enable;
786 o->enable = p->enable; 788 o->enable = p->enable;
787 if (p->enable) { 789 if (p->enable) {
788 kfifo_reset(state->rx_kfifo); 790 unsigned long flags;
791
792 spin_lock_irqsave(&state->rx_kfifo_lock, flags);
793 kfifo_reset(&state->rx_kfifo);
794 /* reset tx_fifo too if there is one... */
795 spin_unlock_irqrestore(&state->rx_kfifo_lock, flags);
789 if (p->interrupt_enable) 796 if (p->interrupt_enable)
790 irqenable_rx(dev, IRQEN_RSE | IRQEN_RTE | IRQEN_ROE); 797 irqenable_rx(dev, IRQEN_RSE | IRQEN_RTE | IRQEN_ROE);
791 control_rx_enable(dev, p->enable); 798 control_rx_enable(dev, p->enable);
@@ -892,7 +899,6 @@ static int cx23888_ir_tx_s_parameters(struct v4l2_subdev *sd,
892 o->interrupt_enable = p->interrupt_enable; 899 o->interrupt_enable = p->interrupt_enable;
893 o->enable = p->enable; 900 o->enable = p->enable;
894 if (p->enable) { 901 if (p->enable) {
895 kfifo_reset(state->tx_kfifo);
896 if (p->interrupt_enable) 902 if (p->interrupt_enable)
897 irqenable_tx(dev, IRQEN_TSE); 903 irqenable_tx(dev, IRQEN_TSE);
898 control_tx_enable(dev, p->enable); 904 control_tx_enable(dev, p->enable);
@@ -1168,18 +1174,8 @@ int cx23888_ir_probe(struct cx23885_dev *dev)
1168 return -ENOMEM; 1174 return -ENOMEM;
1169 1175
1170 spin_lock_init(&state->rx_kfifo_lock); 1176 spin_lock_init(&state->rx_kfifo_lock);
1171 state->rx_kfifo = kfifo_alloc(CX23888_IR_RX_KFIFO_SIZE, GFP_KERNEL, 1177 if (kfifo_alloc(&state->rx_kfifo, CX23888_IR_RX_KFIFO_SIZE, GFP_KERNEL))
1172 &state->rx_kfifo_lock);
1173 if (state->rx_kfifo == NULL)
1174 return -ENOMEM;
1175
1176 spin_lock_init(&state->tx_kfifo_lock);
1177 state->tx_kfifo = kfifo_alloc(CX23888_IR_TX_KFIFO_SIZE, GFP_KERNEL,
1178 &state->tx_kfifo_lock);
1179 if (state->tx_kfifo == NULL) {
1180 kfifo_free(state->rx_kfifo);
1181 return -ENOMEM; 1178 return -ENOMEM;
1182 }
1183 1179
1184 state->dev = dev; 1180 state->dev = dev;
1185 state->id = V4L2_IDENT_CX23888_IR; 1181 state->id = V4L2_IDENT_CX23888_IR;
@@ -1211,8 +1207,7 @@ int cx23888_ir_probe(struct cx23885_dev *dev)
1211 sizeof(struct v4l2_subdev_ir_parameters)); 1207 sizeof(struct v4l2_subdev_ir_parameters));
1212 v4l2_subdev_call(sd, ir, tx_s_parameters, &default_params); 1208 v4l2_subdev_call(sd, ir, tx_s_parameters, &default_params);
1213 } else { 1209 } else {
1214 kfifo_free(state->rx_kfifo); 1210 kfifo_free(&state->rx_kfifo);
1215 kfifo_free(state->tx_kfifo);
1216 } 1211 }
1217 return ret; 1212 return ret;
1218} 1213}
@@ -1231,8 +1226,7 @@ int cx23888_ir_remove(struct cx23885_dev *dev)
1231 1226
1232 state = to_state(sd); 1227 state = to_state(sd);
1233 v4l2_device_unregister_subdev(sd); 1228 v4l2_device_unregister_subdev(sd);
1234 kfifo_free(state->rx_kfifo); 1229 kfifo_free(&state->rx_kfifo);
1235 kfifo_free(state->tx_kfifo);
1236 kfree(state); 1230 kfree(state);
1237 /* Nothing more to free() as state held the actual v4l2_subdev object */ 1231 /* Nothing more to free() as state held the actual v4l2_subdev object */
1238 return 0; 1232 return 0;
diff --git a/drivers/media/video/gspca/gspca.c b/drivers/media/video/gspca/gspca.c
index e930a67d526b..bd6214d4ab3b 100644
--- a/drivers/media/video/gspca/gspca.c
+++ b/drivers/media/video/gspca/gspca.c
@@ -1815,6 +1815,8 @@ static int vidioc_qbuf(struct file *file, void *priv,
1815 /* put the buffer in the 'queued' queue */ 1815 /* put the buffer in the 'queued' queue */
1816 i = gspca_dev->fr_q; 1816 i = gspca_dev->fr_q;
1817 gspca_dev->fr_queue[i] = index; 1817 gspca_dev->fr_queue[i] = index;
1818 if (gspca_dev->fr_i == i)
1819 gspca_dev->cur_frame = frame;
1818 gspca_dev->fr_q = (i + 1) % gspca_dev->nframes; 1820 gspca_dev->fr_q = (i + 1) % gspca_dev->nframes;
1819 PDEBUG(D_FRAM, "qbuf q:%d i:%d o:%d", 1821 PDEBUG(D_FRAM, "qbuf q:%d i:%d o:%d",
1820 gspca_dev->fr_q, 1822 gspca_dev->fr_q,
diff --git a/drivers/media/video/gspca/m5602/m5602_s5k4aa.c b/drivers/media/video/gspca/m5602/m5602_s5k4aa.c
index aa2f3c7e2cb5..1b536f7d30cf 100644
--- a/drivers/media/video/gspca/m5602/m5602_s5k4aa.c
+++ b/drivers/media/video/gspca/m5602/m5602_s5k4aa.c
@@ -48,6 +48,12 @@ static
48 DMI_MATCH(DMI_PRODUCT_NAME, "AMILO Xa 2528") 48 DMI_MATCH(DMI_PRODUCT_NAME, "AMILO Xa 2528")
49 } 49 }
50 }, { 50 }, {
51 .ident = "Fujitsu-Siemens Amilo Xi 2428",
52 .matches = {
53 DMI_MATCH(DMI_SYS_VENDOR, "FUJITSU SIEMENS"),
54 DMI_MATCH(DMI_PRODUCT_NAME, "AMILO Xi 2428")
55 }
56 }, {
51 .ident = "Fujitsu-Siemens Amilo Xi 2528", 57 .ident = "Fujitsu-Siemens Amilo Xi 2528",
52 .matches = { 58 .matches = {
53 DMI_MATCH(DMI_SYS_VENDOR, "FUJITSU SIEMENS"), 59 DMI_MATCH(DMI_SYS_VENDOR, "FUJITSU SIEMENS"),
diff --git a/drivers/media/video/gspca/ov534.c b/drivers/media/video/gspca/ov534.c
index 4dbb882c83dc..0a6b8f07a69d 100644
--- a/drivers/media/video/gspca/ov534.c
+++ b/drivers/media/video/gspca/ov534.c
@@ -1533,7 +1533,7 @@ static void setexposure_96(struct gspca_dev *gspca_dev)
1533static void setsharpness_96(struct gspca_dev *gspca_dev) 1533static void setsharpness_96(struct gspca_dev *gspca_dev)
1534{ 1534{
1535 struct sd *sd = (struct sd *) gspca_dev; 1535 struct sd *sd = (struct sd *) gspca_dev;
1536 u8 val; 1536 s8 val;
1537 1537
1538 val = sd->sharpness; 1538 val = sd->sharpness;
1539 if (val < 0) { /* auto */ 1539 if (val < 0) { /* auto */
diff --git a/drivers/media/video/gspca/sn9c20x.c b/drivers/media/video/gspca/sn9c20x.c
index 4cff8035614f..0ca1c06652b1 100644
--- a/drivers/media/video/gspca/sn9c20x.c
+++ b/drivers/media/video/gspca/sn9c20x.c
@@ -2319,7 +2319,7 @@ static void do_autogain(struct gspca_dev *gspca_dev, u16 avg_lum)
2319 } 2319 }
2320 } 2320 }
2321 if (avg_lum > MAX_AVG_LUM) { 2321 if (avg_lum > MAX_AVG_LUM) {
2322 if (sd->gain - 1 >= 0) { 2322 if (sd->gain >= 1) {
2323 sd->gain--; 2323 sd->gain--;
2324 set_gain(gspca_dev); 2324 set_gain(gspca_dev);
2325 } 2325 }
diff --git a/drivers/media/video/gspca/stv06xx/stv06xx_vv6410.h b/drivers/media/video/gspca/stv06xx/stv06xx_vv6410.h
index 487d40555343..96c61926d372 100644
--- a/drivers/media/video/gspca/stv06xx/stv06xx_vv6410.h
+++ b/drivers/media/video/gspca/stv06xx/stv06xx_vv6410.h
@@ -228,6 +228,7 @@ static const struct stv_init stv_bridge_init[] = {
228 /* This reg is written twice. Some kind of reset? */ 228 /* This reg is written twice. Some kind of reset? */
229 {NULL, 0x1620, 0x80}, 229 {NULL, 0x1620, 0x80},
230 {NULL, 0x1620, 0x00}, 230 {NULL, 0x1620, 0x00},
231 {NULL, 0x1443, 0x00},
231 {NULL, 0x1423, 0x04}, 232 {NULL, 0x1423, 0x04},
232 {x1500, 0x1500, ARRAY_SIZE(x1500)}, 233 {x1500, 0x1500, ARRAY_SIZE(x1500)},
233 {x1536, 0x1536, ARRAY_SIZE(x1536)}, 234 {x1536, 0x1536, ARRAY_SIZE(x1536)},
diff --git a/drivers/media/video/gspca/sunplus.c b/drivers/media/video/gspca/sunplus.c
index 716df6b15fc5..306b7d75b4aa 100644
--- a/drivers/media/video/gspca/sunplus.c
+++ b/drivers/media/video/gspca/sunplus.c
@@ -709,7 +709,7 @@ static void spca504B_SetSizeType(struct gspca_dev *gspca_dev)
709 spca504B_PollingDataReady(gspca_dev); 709 spca504B_PollingDataReady(gspca_dev);
710 710
711 /* Init the cam width height with some values get on init ? */ 711 /* Init the cam width height with some values get on init ? */
712 reg_w_riv(gspca_dev, 0x31, 0, 0x04); 712 reg_w_riv(gspca_dev, 0x31, 0x0004, 0x00);
713 spca504B_WaitCmdStatus(gspca_dev); 713 spca504B_WaitCmdStatus(gspca_dev);
714 spca504B_PollingDataReady(gspca_dev); 714 spca504B_PollingDataReady(gspca_dev);
715 break; 715 break;
@@ -807,14 +807,14 @@ static void init_ctl_reg(struct gspca_dev *gspca_dev)
807 default: 807 default:
808/* case BRIDGE_SPCA533: */ 808/* case BRIDGE_SPCA533: */
809/* case BRIDGE_SPCA504B: */ 809/* case BRIDGE_SPCA504B: */
810 reg_w_riv(gspca_dev, 0, 0x00, 0x21ad); /* hue */ 810 reg_w_riv(gspca_dev, 0, 0x21ad, 0x00); /* hue */
811 reg_w_riv(gspca_dev, 0, 0x01, 0x21ac); /* sat/hue */ 811 reg_w_riv(gspca_dev, 0, 0x21ac, 0x01); /* sat/hue */
812 reg_w_riv(gspca_dev, 0, 0x00, 0x21a3); /* gamma */ 812 reg_w_riv(gspca_dev, 0, 0x21a3, 0x00); /* gamma */
813 break; 813 break;
814 case BRIDGE_SPCA536: 814 case BRIDGE_SPCA536:
815 reg_w_riv(gspca_dev, 0, 0x40, 0x20f5); 815 reg_w_riv(gspca_dev, 0, 0x20f5, 0x40);
816 reg_w_riv(gspca_dev, 0, 0x01, 0x20f4); 816 reg_w_riv(gspca_dev, 0, 0x20f4, 0x01);
817 reg_w_riv(gspca_dev, 0, 0x00, 0x2089); 817 reg_w_riv(gspca_dev, 0, 0x2089, 0x00);
818 break; 818 break;
819 } 819 }
820 if (pollreg) 820 if (pollreg)
@@ -887,11 +887,11 @@ static int sd_init(struct gspca_dev *gspca_dev)
887 switch (sd->bridge) { 887 switch (sd->bridge) {
888 case BRIDGE_SPCA504B: 888 case BRIDGE_SPCA504B:
889 reg_w_riv(gspca_dev, 0x1d, 0x00, 0); 889 reg_w_riv(gspca_dev, 0x1d, 0x00, 0);
890 reg_w_riv(gspca_dev, 0, 0x01, 0x2306); 890 reg_w_riv(gspca_dev, 0x00, 0x2306, 0x01);
891 reg_w_riv(gspca_dev, 0, 0x00, 0x0d04); 891 reg_w_riv(gspca_dev, 0x00, 0x0d04, 0x00);
892 reg_w_riv(gspca_dev, 0, 0x00, 0x2000); 892 reg_w_riv(gspca_dev, 0x00, 0x2000, 0x00);
893 reg_w_riv(gspca_dev, 0, 0x13, 0x2301); 893 reg_w_riv(gspca_dev, 0x00, 0x2301, 0x13);
894 reg_w_riv(gspca_dev, 0, 0x00, 0x2306); 894 reg_w_riv(gspca_dev, 0x00, 0x2306, 0x00);
895 /* fall thru */ 895 /* fall thru */
896 case BRIDGE_SPCA533: 896 case BRIDGE_SPCA533:
897 spca504B_PollingDataReady(gspca_dev); 897 spca504B_PollingDataReady(gspca_dev);
@@ -1000,7 +1000,7 @@ static int sd_start(struct gspca_dev *gspca_dev)
1000 spca504B_WaitCmdStatus(gspca_dev); 1000 spca504B_WaitCmdStatus(gspca_dev);
1001 break; 1001 break;
1002 default: 1002 default:
1003 reg_w_riv(gspca_dev, 0x31, 0, 0x04); 1003 reg_w_riv(gspca_dev, 0x31, 0x0004, 0x00);
1004 spca504B_WaitCmdStatus(gspca_dev); 1004 spca504B_WaitCmdStatus(gspca_dev);
1005 spca504B_PollingDataReady(gspca_dev); 1005 spca504B_PollingDataReady(gspca_dev);
1006 break; 1006 break;
diff --git a/drivers/media/video/gspca/vc032x.c b/drivers/media/video/gspca/vc032x.c
index c090efcd8045..71921c878424 100644
--- a/drivers/media/video/gspca/vc032x.c
+++ b/drivers/media/video/gspca/vc032x.c
@@ -3009,6 +3009,10 @@ static void sd_pkt_scan(struct gspca_dev *gspca_dev,
3009 int l; 3009 int l;
3010 3010
3011 frame = gspca_get_i_frame(gspca_dev); 3011 frame = gspca_get_i_frame(gspca_dev);
3012 if (frame == NULL) {
3013 gspca_dev->last_packet_type = DISCARD_PACKET;
3014 return;
3015 }
3012 l = frame->data_end - frame->data; 3016 l = frame->data_end - frame->data;
3013 if (len > frame->v4l2_buf.length - l) 3017 if (len > frame->v4l2_buf.length - l)
3014 len = frame->v4l2_buf.length - l; 3018 len = frame->v4l2_buf.length - l;
diff --git a/drivers/media/video/meye.c b/drivers/media/video/meye.c
index 6ffa64cd1c6d..b421858ccf90 100644
--- a/drivers/media/video/meye.c
+++ b/drivers/media/video/meye.c
@@ -800,8 +800,8 @@ again:
800 return IRQ_HANDLED; 800 return IRQ_HANDLED;
801 801
802 if (meye.mchip_mode == MCHIP_HIC_MODE_CONT_OUT) { 802 if (meye.mchip_mode == MCHIP_HIC_MODE_CONT_OUT) {
803 if (kfifo_get(meye.grabq, (unsigned char *)&reqnr, 803 if (kfifo_out_locked(&meye.grabq, (unsigned char *)&reqnr,
804 sizeof(int)) != sizeof(int)) { 804 sizeof(int), &meye.grabq_lock) != sizeof(int)) {
805 mchip_free_frame(); 805 mchip_free_frame();
806 return IRQ_HANDLED; 806 return IRQ_HANDLED;
807 } 807 }
@@ -811,7 +811,8 @@ again:
811 meye.grab_buffer[reqnr].state = MEYE_BUF_DONE; 811 meye.grab_buffer[reqnr].state = MEYE_BUF_DONE;
812 do_gettimeofday(&meye.grab_buffer[reqnr].timestamp); 812 do_gettimeofday(&meye.grab_buffer[reqnr].timestamp);
813 meye.grab_buffer[reqnr].sequence = sequence++; 813 meye.grab_buffer[reqnr].sequence = sequence++;
814 kfifo_put(meye.doneq, (unsigned char *)&reqnr, sizeof(int)); 814 kfifo_in_locked(&meye.doneq, (unsigned char *)&reqnr,
815 sizeof(int), &meye.doneq_lock);
815 wake_up_interruptible(&meye.proc_list); 816 wake_up_interruptible(&meye.proc_list);
816 } else { 817 } else {
817 int size; 818 int size;
@@ -820,8 +821,8 @@ again:
820 mchip_free_frame(); 821 mchip_free_frame();
821 goto again; 822 goto again;
822 } 823 }
823 if (kfifo_get(meye.grabq, (unsigned char *)&reqnr, 824 if (kfifo_out_locked(&meye.grabq, (unsigned char *)&reqnr,
824 sizeof(int)) != sizeof(int)) { 825 sizeof(int), &meye.grabq_lock) != sizeof(int)) {
825 mchip_free_frame(); 826 mchip_free_frame();
826 goto again; 827 goto again;
827 } 828 }
@@ -831,7 +832,8 @@ again:
831 meye.grab_buffer[reqnr].state = MEYE_BUF_DONE; 832 meye.grab_buffer[reqnr].state = MEYE_BUF_DONE;
832 do_gettimeofday(&meye.grab_buffer[reqnr].timestamp); 833 do_gettimeofday(&meye.grab_buffer[reqnr].timestamp);
833 meye.grab_buffer[reqnr].sequence = sequence++; 834 meye.grab_buffer[reqnr].sequence = sequence++;
834 kfifo_put(meye.doneq, (unsigned char *)&reqnr, sizeof(int)); 835 kfifo_in_locked(&meye.doneq, (unsigned char *)&reqnr,
836 sizeof(int), &meye.doneq_lock);
835 wake_up_interruptible(&meye.proc_list); 837 wake_up_interruptible(&meye.proc_list);
836 } 838 }
837 mchip_free_frame(); 839 mchip_free_frame();
@@ -859,8 +861,8 @@ static int meye_open(struct file *file)
859 861
860 for (i = 0; i < MEYE_MAX_BUFNBRS; i++) 862 for (i = 0; i < MEYE_MAX_BUFNBRS; i++)
861 meye.grab_buffer[i].state = MEYE_BUF_UNUSED; 863 meye.grab_buffer[i].state = MEYE_BUF_UNUSED;
862 kfifo_reset(meye.grabq); 864 kfifo_reset(&meye.grabq);
863 kfifo_reset(meye.doneq); 865 kfifo_reset(&meye.doneq);
864 return 0; 866 return 0;
865} 867}
866 868
@@ -933,7 +935,8 @@ static int meyeioc_qbuf_capt(int *nb)
933 mchip_cont_compression_start(); 935 mchip_cont_compression_start();
934 936
935 meye.grab_buffer[*nb].state = MEYE_BUF_USING; 937 meye.grab_buffer[*nb].state = MEYE_BUF_USING;
936 kfifo_put(meye.grabq, (unsigned char *)nb, sizeof(int)); 938 kfifo_in_locked(&meye.grabq, (unsigned char *)nb, sizeof(int),
939 &meye.grabq_lock);
937 mutex_unlock(&meye.lock); 940 mutex_unlock(&meye.lock);
938 941
939 return 0; 942 return 0;
@@ -965,7 +968,9 @@ static int meyeioc_sync(struct file *file, void *fh, int *i)
965 /* fall through */ 968 /* fall through */
966 case MEYE_BUF_DONE: 969 case MEYE_BUF_DONE:
967 meye.grab_buffer[*i].state = MEYE_BUF_UNUSED; 970 meye.grab_buffer[*i].state = MEYE_BUF_UNUSED;
968 kfifo_get(meye.doneq, (unsigned char *)&unused, sizeof(int)); 971 if (kfifo_out_locked(&meye.doneq, (unsigned char *)&unused,
972 sizeof(int), &meye.doneq_lock) != sizeof(int))
973 break;
969 } 974 }
970 *i = meye.grab_buffer[*i].size; 975 *i = meye.grab_buffer[*i].size;
971 mutex_unlock(&meye.lock); 976 mutex_unlock(&meye.lock);
@@ -1452,7 +1457,8 @@ static int vidioc_qbuf(struct file *file, void *fh, struct v4l2_buffer *buf)
1452 buf->flags |= V4L2_BUF_FLAG_QUEUED; 1457 buf->flags |= V4L2_BUF_FLAG_QUEUED;
1453 buf->flags &= ~V4L2_BUF_FLAG_DONE; 1458 buf->flags &= ~V4L2_BUF_FLAG_DONE;
1454 meye.grab_buffer[buf->index].state = MEYE_BUF_USING; 1459 meye.grab_buffer[buf->index].state = MEYE_BUF_USING;
1455 kfifo_put(meye.grabq, (unsigned char *)&buf->index, sizeof(int)); 1460 kfifo_in_locked(&meye.grabq, (unsigned char *)&buf->index,
1461 sizeof(int), &meye.grabq_lock);
1456 mutex_unlock(&meye.lock); 1462 mutex_unlock(&meye.lock);
1457 1463
1458 return 0; 1464 return 0;
@@ -1467,19 +1473,19 @@ static int vidioc_dqbuf(struct file *file, void *fh, struct v4l2_buffer *buf)
1467 1473
1468 mutex_lock(&meye.lock); 1474 mutex_lock(&meye.lock);
1469 1475
1470 if (kfifo_len(meye.doneq) == 0 && file->f_flags & O_NONBLOCK) { 1476 if (kfifo_len(&meye.doneq) == 0 && file->f_flags & O_NONBLOCK) {
1471 mutex_unlock(&meye.lock); 1477 mutex_unlock(&meye.lock);
1472 return -EAGAIN; 1478 return -EAGAIN;
1473 } 1479 }
1474 1480
1475 if (wait_event_interruptible(meye.proc_list, 1481 if (wait_event_interruptible(meye.proc_list,
1476 kfifo_len(meye.doneq) != 0) < 0) { 1482 kfifo_len(&meye.doneq) != 0) < 0) {
1477 mutex_unlock(&meye.lock); 1483 mutex_unlock(&meye.lock);
1478 return -EINTR; 1484 return -EINTR;
1479 } 1485 }
1480 1486
1481 if (!kfifo_get(meye.doneq, (unsigned char *)&reqnr, 1487 if (!kfifo_out_locked(&meye.doneq, (unsigned char *)&reqnr,
1482 sizeof(int))) { 1488 sizeof(int), &meye.doneq_lock)) {
1483 mutex_unlock(&meye.lock); 1489 mutex_unlock(&meye.lock);
1484 return -EBUSY; 1490 return -EBUSY;
1485 } 1491 }
@@ -1529,8 +1535,8 @@ static int vidioc_streamoff(struct file *file, void *fh, enum v4l2_buf_type i)
1529{ 1535{
1530 mutex_lock(&meye.lock); 1536 mutex_lock(&meye.lock);
1531 mchip_hic_stop(); 1537 mchip_hic_stop();
1532 kfifo_reset(meye.grabq); 1538 kfifo_reset(&meye.grabq);
1533 kfifo_reset(meye.doneq); 1539 kfifo_reset(&meye.doneq);
1534 1540
1535 for (i = 0; i < MEYE_MAX_BUFNBRS; i++) 1541 for (i = 0; i < MEYE_MAX_BUFNBRS; i++)
1536 meye.grab_buffer[i].state = MEYE_BUF_UNUSED; 1542 meye.grab_buffer[i].state = MEYE_BUF_UNUSED;
@@ -1572,7 +1578,7 @@ static unsigned int meye_poll(struct file *file, poll_table *wait)
1572 1578
1573 mutex_lock(&meye.lock); 1579 mutex_lock(&meye.lock);
1574 poll_wait(file, &meye.proc_list, wait); 1580 poll_wait(file, &meye.proc_list, wait);
1575 if (kfifo_len(meye.doneq)) 1581 if (kfifo_len(&meye.doneq))
1576 res = POLLIN | POLLRDNORM; 1582 res = POLLIN | POLLRDNORM;
1577 mutex_unlock(&meye.lock); 1583 mutex_unlock(&meye.lock);
1578 return res; 1584 return res;
@@ -1745,16 +1751,14 @@ static int __devinit meye_probe(struct pci_dev *pcidev,
1745 } 1751 }
1746 1752
1747 spin_lock_init(&meye.grabq_lock); 1753 spin_lock_init(&meye.grabq_lock);
1748 meye.grabq = kfifo_alloc(sizeof(int) * MEYE_MAX_BUFNBRS, GFP_KERNEL, 1754 if (kfifo_alloc(&meye.grabq, sizeof(int) * MEYE_MAX_BUFNBRS,
1749 &meye.grabq_lock); 1755 GFP_KERNEL)) {
1750 if (IS_ERR(meye.grabq)) {
1751 printk(KERN_ERR "meye: fifo allocation failed\n"); 1756 printk(KERN_ERR "meye: fifo allocation failed\n");
1752 goto outkfifoalloc1; 1757 goto outkfifoalloc1;
1753 } 1758 }
1754 spin_lock_init(&meye.doneq_lock); 1759 spin_lock_init(&meye.doneq_lock);
1755 meye.doneq = kfifo_alloc(sizeof(int) * MEYE_MAX_BUFNBRS, GFP_KERNEL, 1760 if (kfifo_alloc(&meye.doneq, sizeof(int) * MEYE_MAX_BUFNBRS,
1756 &meye.doneq_lock); 1761 GFP_KERNEL)) {
1757 if (IS_ERR(meye.doneq)) {
1758 printk(KERN_ERR "meye: fifo allocation failed\n"); 1762 printk(KERN_ERR "meye: fifo allocation failed\n");
1759 goto outkfifoalloc2; 1763 goto outkfifoalloc2;
1760 } 1764 }
@@ -1868,9 +1872,9 @@ outregions:
1868outenabledev: 1872outenabledev:
1869 sony_pic_camera_command(SONY_PIC_COMMAND_SETCAMERA, 0); 1873 sony_pic_camera_command(SONY_PIC_COMMAND_SETCAMERA, 0);
1870outsonypienable: 1874outsonypienable:
1871 kfifo_free(meye.doneq); 1875 kfifo_free(&meye.doneq);
1872outkfifoalloc2: 1876outkfifoalloc2:
1873 kfifo_free(meye.grabq); 1877 kfifo_free(&meye.grabq);
1874outkfifoalloc1: 1878outkfifoalloc1:
1875 vfree(meye.grab_temp); 1879 vfree(meye.grab_temp);
1876outvmalloc: 1880outvmalloc:
@@ -1901,8 +1905,8 @@ static void __devexit meye_remove(struct pci_dev *pcidev)
1901 1905
1902 sony_pic_camera_command(SONY_PIC_COMMAND_SETCAMERA, 0); 1906 sony_pic_camera_command(SONY_PIC_COMMAND_SETCAMERA, 0);
1903 1907
1904 kfifo_free(meye.doneq); 1908 kfifo_free(&meye.doneq);
1905 kfifo_free(meye.grabq); 1909 kfifo_free(&meye.grabq);
1906 1910
1907 vfree(meye.grab_temp); 1911 vfree(meye.grab_temp);
1908 1912
diff --git a/drivers/media/video/meye.h b/drivers/media/video/meye.h
index 5f70a106ba2b..1321ad5d6597 100644
--- a/drivers/media/video/meye.h
+++ b/drivers/media/video/meye.h
@@ -303,9 +303,9 @@ struct meye {
303 struct meye_grab_buffer grab_buffer[MEYE_MAX_BUFNBRS]; 303 struct meye_grab_buffer grab_buffer[MEYE_MAX_BUFNBRS];
304 int vma_use_count[MEYE_MAX_BUFNBRS]; /* mmap count */ 304 int vma_use_count[MEYE_MAX_BUFNBRS]; /* mmap count */
305 struct mutex lock; /* mutex for open/mmap... */ 305 struct mutex lock; /* mutex for open/mmap... */
306 struct kfifo *grabq; /* queue for buffers to be grabbed */ 306 struct kfifo grabq; /* queue for buffers to be grabbed */
307 spinlock_t grabq_lock; /* lock protecting the queue */ 307 spinlock_t grabq_lock; /* lock protecting the queue */
308 struct kfifo *doneq; /* queue for grabbed buffers */ 308 struct kfifo doneq; /* queue for grabbed buffers */
309 spinlock_t doneq_lock; /* lock protecting the queue */ 309 spinlock_t doneq_lock; /* lock protecting the queue */
310 wait_queue_head_t proc_list; /* wait queue */ 310 wait_queue_head_t proc_list; /* wait queue */
311 struct video_device *video_dev; /* video device parameters */ 311 struct video_device *video_dev; /* video device parameters */
diff --git a/drivers/media/video/mt9t112.c b/drivers/media/video/mt9t112.c
index fc4dd6045720..7438f8d775ba 100644
--- a/drivers/media/video/mt9t112.c
+++ b/drivers/media/video/mt9t112.c
@@ -514,7 +514,7 @@ static int mt9t112_init_pll(const struct i2c_client *client)
514 /* poll to verify out of standby. Must Poll this bit */ 514 /* poll to verify out of standby. Must Poll this bit */
515 for (i = 0; i < 100; i++) { 515 for (i = 0; i < 100; i++) {
516 mt9t112_reg_read(data, client, 0x0018); 516 mt9t112_reg_read(data, client, 0x0018);
517 if (0x4000 & data) 517 if (!(0x4000 & data))
518 break; 518 break;
519 519
520 mdelay(10); 520 mdelay(10);
diff --git a/drivers/media/video/mx1_camera.c b/drivers/media/video/mx1_camera.c
index 2ba14fb5b031..c167cc3de492 100644
--- a/drivers/media/video/mx1_camera.c
+++ b/drivers/media/video/mx1_camera.c
@@ -718,7 +718,7 @@ static int __init mx1_camera_probe(struct platform_device *pdev)
718 718
719 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 719 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
720 irq = platform_get_irq(pdev, 0); 720 irq = platform_get_irq(pdev, 0);
721 if (!res || !irq) { 721 if (!res || (int)irq <= 0) {
722 err = -ENODEV; 722 err = -ENODEV;
723 goto exit; 723 goto exit;
724 } 724 }
diff --git a/drivers/media/video/pwc/pwc-ctrl.c b/drivers/media/video/pwc/pwc-ctrl.c
index 50b415e07eda..f7f7e04cf485 100644
--- a/drivers/media/video/pwc/pwc-ctrl.c
+++ b/drivers/media/video/pwc/pwc-ctrl.c
@@ -753,7 +753,7 @@ int pwc_set_shutter_speed(struct pwc_device *pdev, int mode, int value)
753 buf[0] = 0xff; /* fixed */ 753 buf[0] = 0xff; /* fixed */
754 754
755 ret = send_control_msg(pdev, 755 ret = send_control_msg(pdev,
756 SET_LUM_CTL, SHUTTER_MODE_FORMATTER, &buf, sizeof(buf)); 756 SET_LUM_CTL, SHUTTER_MODE_FORMATTER, &buf, 1);
757 757
758 if (!mode && ret >= 0) { 758 if (!mode && ret >= 0) {
759 if (value < 0) 759 if (value < 0)
diff --git a/drivers/media/video/rj54n1cb0c.c b/drivers/media/video/rj54n1cb0c.c
index 7e42989ce0e4..805226e0d9c1 100644
--- a/drivers/media/video/rj54n1cb0c.c
+++ b/drivers/media/video/rj54n1cb0c.c
@@ -563,7 +563,7 @@ static int rj54n1_s_crop(struct v4l2_subdev *sd, struct v4l2_crop *a)
563 struct i2c_client *client = sd->priv; 563 struct i2c_client *client = sd->priv;
564 struct rj54n1 *rj54n1 = to_rj54n1(client); 564 struct rj54n1 *rj54n1 = to_rj54n1(client);
565 struct v4l2_rect *rect = &a->c; 565 struct v4l2_rect *rect = &a->c;
566 unsigned int dummy, output_w, output_h, 566 unsigned int dummy = 0, output_w, output_h,
567 input_w = rect->width, input_h = rect->height; 567 input_w = rect->width, input_h = rect->height;
568 int ret; 568 int ret;
569 569
diff --git a/drivers/media/video/saa7134/saa7134-core.c b/drivers/media/video/saa7134/saa7134-core.c
index 9f85e917f9f3..a7ad7810fddc 100644
--- a/drivers/media/video/saa7134/saa7134-core.c
+++ b/drivers/media/video/saa7134/saa7134-core.c
@@ -420,19 +420,6 @@ int saa7134_set_dmabits(struct saa7134_dev *dev)
420 ctrl |= SAA7134_MAIN_CTRL_TE5; 420 ctrl |= SAA7134_MAIN_CTRL_TE5;
421 irq |= SAA7134_IRQ1_INTE_RA2_1 | 421 irq |= SAA7134_IRQ1_INTE_RA2_1 |
422 SAA7134_IRQ1_INTE_RA2_0; 422 SAA7134_IRQ1_INTE_RA2_0;
423
424 /* dma: setup channel 5 (= TS) */
425
426 saa_writeb(SAA7134_TS_DMA0, (dev->ts.nr_packets - 1) & 0xff);
427 saa_writeb(SAA7134_TS_DMA1,
428 ((dev->ts.nr_packets - 1) >> 8) & 0xff);
429 /* TSNOPIT=0, TSCOLAP=0 */
430 saa_writeb(SAA7134_TS_DMA2,
431 (((dev->ts.nr_packets - 1) >> 16) & 0x3f) | 0x00);
432 saa_writel(SAA7134_RS_PITCH(5), TS_PACKET_SIZE);
433 saa_writel(SAA7134_RS_CONTROL(5), SAA7134_RS_CONTROL_BURST_16 |
434 SAA7134_RS_CONTROL_ME |
435 (dev->ts.pt_ts.dma >> 12));
436 } 423 }
437 424
438 /* set task conditions + field handling */ 425 /* set task conditions + field handling */
diff --git a/drivers/media/video/saa7134/saa7134-empress.c b/drivers/media/video/saa7134/saa7134-empress.c
index 7dfecfc6017c..ee5bff02a92c 100644
--- a/drivers/media/video/saa7134/saa7134-empress.c
+++ b/drivers/media/video/saa7134/saa7134-empress.c
@@ -93,9 +93,9 @@ static int ts_open(struct file *file)
93 dprintk("open dev=%s\n", video_device_node_name(vdev)); 93 dprintk("open dev=%s\n", video_device_node_name(vdev));
94 err = -EBUSY; 94 err = -EBUSY;
95 if (!mutex_trylock(&dev->empress_tsq.vb_lock)) 95 if (!mutex_trylock(&dev->empress_tsq.vb_lock))
96 goto done; 96 return err;
97 if (atomic_read(&dev->empress_users)) 97 if (atomic_read(&dev->empress_users))
98 goto done_up; 98 goto done;
99 99
100 /* Unmute audio */ 100 /* Unmute audio */
101 saa_writeb(SAA7134_AUDIO_MUTE_CTRL, 101 saa_writeb(SAA7134_AUDIO_MUTE_CTRL,
@@ -105,10 +105,8 @@ static int ts_open(struct file *file)
105 file->private_data = dev; 105 file->private_data = dev;
106 err = 0; 106 err = 0;
107 107
108done_up:
109 mutex_unlock(&dev->empress_tsq.vb_lock);
110done: 108done:
111 unlock_kernel(); 109 mutex_unlock(&dev->empress_tsq.vb_lock);
112 return err; 110 return err;
113} 111}
114 112
diff --git a/drivers/media/video/saa7134/saa7134-ts.c b/drivers/media/video/saa7134/saa7134-ts.c
index 03488ba4c99c..b9817d74943f 100644
--- a/drivers/media/video/saa7134/saa7134-ts.c
+++ b/drivers/media/video/saa7134/saa7134-ts.c
@@ -250,6 +250,19 @@ int saa7134_ts_start(struct saa7134_dev *dev)
250 250
251 BUG_ON(dev->ts_started); 251 BUG_ON(dev->ts_started);
252 252
253 /* dma: setup channel 5 (= TS) */
254 saa_writeb(SAA7134_TS_DMA0, (dev->ts.nr_packets - 1) & 0xff);
255 saa_writeb(SAA7134_TS_DMA1,
256 ((dev->ts.nr_packets - 1) >> 8) & 0xff);
257 /* TSNOPIT=0, TSCOLAP=0 */
258 saa_writeb(SAA7134_TS_DMA2,
259 (((dev->ts.nr_packets - 1) >> 16) & 0x3f) | 0x00);
260 saa_writel(SAA7134_RS_PITCH(5), TS_PACKET_SIZE);
261 saa_writel(SAA7134_RS_CONTROL(5), SAA7134_RS_CONTROL_BURST_16 |
262 SAA7134_RS_CONTROL_ME |
263 (dev->ts.pt_ts.dma >> 12));
264
265 /* reset hardware TS buffers */
253 saa_writeb(SAA7134_TS_SERIAL1, 0x00); 266 saa_writeb(SAA7134_TS_SERIAL1, 0x00);
254 saa_writeb(SAA7134_TS_SERIAL1, 0x03); 267 saa_writeb(SAA7134_TS_SERIAL1, 0x03);
255 saa_writeb(SAA7134_TS_SERIAL1, 0x00); 268 saa_writeb(SAA7134_TS_SERIAL1, 0x00);
diff --git a/drivers/media/video/sh_mobile_ceu_camera.c b/drivers/media/video/sh_mobile_ceu_camera.c
index d69363f0d8c9..f09c7140d6b2 100644
--- a/drivers/media/video/sh_mobile_ceu_camera.c
+++ b/drivers/media/video/sh_mobile_ceu_camera.c
@@ -1827,7 +1827,7 @@ static int __devinit sh_mobile_ceu_probe(struct platform_device *pdev)
1827 1827
1828 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 1828 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1829 irq = platform_get_irq(pdev, 0); 1829 irq = platform_get_irq(pdev, 0);
1830 if (!res || !irq) { 1830 if (!res || (int)irq <= 0) {
1831 dev_err(&pdev->dev, "Not enough CEU platform resources.\n"); 1831 dev_err(&pdev->dev, "Not enough CEU platform resources.\n");
1832 err = -ENODEV; 1832 err = -ENODEV;
1833 goto exit; 1833 goto exit;
diff --git a/drivers/media/video/uvc/uvc_ctrl.c b/drivers/media/video/uvc/uvc_ctrl.c
index 0469d7a876a8..ec8ef8c5560a 100644
--- a/drivers/media/video/uvc/uvc_ctrl.c
+++ b/drivers/media/video/uvc/uvc_ctrl.c
@@ -1393,7 +1393,7 @@ uvc_ctrl_prune_entity(struct uvc_device *dev, struct uvc_entity *entity)
1393 size = entity->processing.bControlSize; 1393 size = entity->processing.bControlSize;
1394 1394
1395 for (i = 0; i < ARRAY_SIZE(blacklist); ++i) { 1395 for (i = 0; i < ARRAY_SIZE(blacklist); ++i) {
1396 if (!usb_match_id(dev->intf, &blacklist[i].id)) 1396 if (!usb_match_one_id(dev->intf, &blacklist[i].id))
1397 continue; 1397 continue;
1398 1398
1399 if (blacklist[i].index >= 8 * size || 1399 if (blacklist[i].index >= 8 * size ||
diff --git a/drivers/media/video/uvc/uvc_queue.c b/drivers/media/video/uvc/uvc_queue.c
index f854698c4061..ea11839cba4a 100644
--- a/drivers/media/video/uvc/uvc_queue.c
+++ b/drivers/media/video/uvc/uvc_queue.c
@@ -59,9 +59,9 @@
59 * returns immediately. 59 * returns immediately.
60 * 60 *
61 * When the buffer is full, the completion handler removes it from the irq 61 * When the buffer is full, the completion handler removes it from the irq
62 * queue, marks it as ready (UVC_BUF_STATE_DONE) and wakes its wait queue. 62 * queue, marks it as done (UVC_BUF_STATE_DONE) and wakes its wait queue.
63 * At that point, any process waiting on the buffer will be woken up. If a 63 * At that point, any process waiting on the buffer will be woken up. If a
64 * process tries to dequeue a buffer after it has been marked ready, the 64 * process tries to dequeue a buffer after it has been marked done, the
65 * dequeing will succeed immediately. 65 * dequeing will succeed immediately.
66 * 66 *
67 * 2. Buffers are queued, user is waiting on a buffer and the device gets 67 * 2. Buffers are queued, user is waiting on a buffer and the device gets
@@ -201,6 +201,7 @@ static void __uvc_query_buffer(struct uvc_buffer *buf,
201 break; 201 break;
202 case UVC_BUF_STATE_QUEUED: 202 case UVC_BUF_STATE_QUEUED:
203 case UVC_BUF_STATE_ACTIVE: 203 case UVC_BUF_STATE_ACTIVE:
204 case UVC_BUF_STATE_READY:
204 v4l2_buf->flags |= V4L2_BUF_FLAG_QUEUED; 205 v4l2_buf->flags |= V4L2_BUF_FLAG_QUEUED;
205 break; 206 break;
206 case UVC_BUF_STATE_IDLE: 207 case UVC_BUF_STATE_IDLE:
@@ -295,13 +296,15 @@ static int uvc_queue_waiton(struct uvc_buffer *buf, int nonblocking)
295{ 296{
296 if (nonblocking) { 297 if (nonblocking) {
297 return (buf->state != UVC_BUF_STATE_QUEUED && 298 return (buf->state != UVC_BUF_STATE_QUEUED &&
298 buf->state != UVC_BUF_STATE_ACTIVE) 299 buf->state != UVC_BUF_STATE_ACTIVE &&
300 buf->state != UVC_BUF_STATE_READY)
299 ? 0 : -EAGAIN; 301 ? 0 : -EAGAIN;
300 } 302 }
301 303
302 return wait_event_interruptible(buf->wait, 304 return wait_event_interruptible(buf->wait,
303 buf->state != UVC_BUF_STATE_QUEUED && 305 buf->state != UVC_BUF_STATE_QUEUED &&
304 buf->state != UVC_BUF_STATE_ACTIVE); 306 buf->state != UVC_BUF_STATE_ACTIVE &&
307 buf->state != UVC_BUF_STATE_READY);
305} 308}
306 309
307/* 310/*
@@ -348,6 +351,7 @@ int uvc_dequeue_buffer(struct uvc_video_queue *queue,
348 case UVC_BUF_STATE_IDLE: 351 case UVC_BUF_STATE_IDLE:
349 case UVC_BUF_STATE_QUEUED: 352 case UVC_BUF_STATE_QUEUED:
350 case UVC_BUF_STATE_ACTIVE: 353 case UVC_BUF_STATE_ACTIVE:
354 case UVC_BUF_STATE_READY:
351 default: 355 default:
352 uvc_trace(UVC_TRACE_CAPTURE, "[E] Invalid buffer state %u " 356 uvc_trace(UVC_TRACE_CAPTURE, "[E] Invalid buffer state %u "
353 "(driver bug?).\n", buf->state); 357 "(driver bug?).\n", buf->state);
@@ -489,6 +493,7 @@ struct uvc_buffer *uvc_queue_next_buffer(struct uvc_video_queue *queue,
489 493
490 spin_lock_irqsave(&queue->irqlock, flags); 494 spin_lock_irqsave(&queue->irqlock, flags);
491 list_del(&buf->queue); 495 list_del(&buf->queue);
496 buf->state = UVC_BUF_STATE_DONE;
492 if (!list_empty(&queue->irqqueue)) 497 if (!list_empty(&queue->irqqueue))
493 nextbuf = list_first_entry(&queue->irqqueue, struct uvc_buffer, 498 nextbuf = list_first_entry(&queue->irqqueue, struct uvc_buffer,
494 queue); 499 queue);
diff --git a/drivers/media/video/uvc/uvc_video.c b/drivers/media/video/uvc/uvc_video.c
index 9a9802830d41..7dcf534a0cf3 100644
--- a/drivers/media/video/uvc/uvc_video.c
+++ b/drivers/media/video/uvc/uvc_video.c
@@ -441,7 +441,7 @@ static int uvc_video_decode_start(struct uvc_streaming *stream,
441 if (fid != stream->last_fid && buf->buf.bytesused != 0) { 441 if (fid != stream->last_fid && buf->buf.bytesused != 0) {
442 uvc_trace(UVC_TRACE_FRAME, "Frame complete (FID bit " 442 uvc_trace(UVC_TRACE_FRAME, "Frame complete (FID bit "
443 "toggled).\n"); 443 "toggled).\n");
444 buf->state = UVC_BUF_STATE_DONE; 444 buf->state = UVC_BUF_STATE_READY;
445 return -EAGAIN; 445 return -EAGAIN;
446 } 446 }
447 447
@@ -470,7 +470,7 @@ static void uvc_video_decode_data(struct uvc_streaming *stream,
470 /* Complete the current frame if the buffer size was exceeded. */ 470 /* Complete the current frame if the buffer size was exceeded. */
471 if (len > maxlen) { 471 if (len > maxlen) {
472 uvc_trace(UVC_TRACE_FRAME, "Frame complete (overflow).\n"); 472 uvc_trace(UVC_TRACE_FRAME, "Frame complete (overflow).\n");
473 buf->state = UVC_BUF_STATE_DONE; 473 buf->state = UVC_BUF_STATE_READY;
474 } 474 }
475} 475}
476 476
@@ -482,7 +482,7 @@ static void uvc_video_decode_end(struct uvc_streaming *stream,
482 uvc_trace(UVC_TRACE_FRAME, "Frame complete (EOF found).\n"); 482 uvc_trace(UVC_TRACE_FRAME, "Frame complete (EOF found).\n");
483 if (data[0] == len) 483 if (data[0] == len)
484 uvc_trace(UVC_TRACE_FRAME, "EOF in empty payload.\n"); 484 uvc_trace(UVC_TRACE_FRAME, "EOF in empty payload.\n");
485 buf->state = UVC_BUF_STATE_DONE; 485 buf->state = UVC_BUF_STATE_READY;
486 if (stream->dev->quirks & UVC_QUIRK_STREAM_NO_FID) 486 if (stream->dev->quirks & UVC_QUIRK_STREAM_NO_FID)
487 stream->last_fid ^= UVC_STREAM_FID; 487 stream->last_fid ^= UVC_STREAM_FID;
488 } 488 }
@@ -568,8 +568,7 @@ static void uvc_video_decode_isoc(struct urb *urb, struct uvc_streaming *stream,
568 uvc_video_decode_end(stream, buf, mem, 568 uvc_video_decode_end(stream, buf, mem,
569 urb->iso_frame_desc[i].actual_length); 569 urb->iso_frame_desc[i].actual_length);
570 570
571 if (buf->state == UVC_BUF_STATE_DONE || 571 if (buf->state == UVC_BUF_STATE_READY)
572 buf->state == UVC_BUF_STATE_ERROR)
573 buf = uvc_queue_next_buffer(&stream->queue, buf); 572 buf = uvc_queue_next_buffer(&stream->queue, buf);
574 } 573 }
575} 574}
@@ -627,8 +626,7 @@ static void uvc_video_decode_bulk(struct urb *urb, struct uvc_streaming *stream,
627 if (!stream->bulk.skip_payload && buf != NULL) { 626 if (!stream->bulk.skip_payload && buf != NULL) {
628 uvc_video_decode_end(stream, buf, stream->bulk.header, 627 uvc_video_decode_end(stream, buf, stream->bulk.header,
629 stream->bulk.payload_size); 628 stream->bulk.payload_size);
630 if (buf->state == UVC_BUF_STATE_DONE || 629 if (buf->state == UVC_BUF_STATE_READY)
631 buf->state == UVC_BUF_STATE_ERROR)
632 buf = uvc_queue_next_buffer(&stream->queue, 630 buf = uvc_queue_next_buffer(&stream->queue,
633 buf); 631 buf);
634 } 632 }
@@ -669,7 +667,7 @@ static void uvc_video_encode_bulk(struct urb *urb, struct uvc_streaming *stream,
669 stream->bulk.payload_size == stream->bulk.max_payload_size) { 667 stream->bulk.payload_size == stream->bulk.max_payload_size) {
670 if (buf->buf.bytesused == stream->queue.buf_used) { 668 if (buf->buf.bytesused == stream->queue.buf_used) {
671 stream->queue.buf_used = 0; 669 stream->queue.buf_used = 0;
672 buf->state = UVC_BUF_STATE_DONE; 670 buf->state = UVC_BUF_STATE_READY;
673 uvc_queue_next_buffer(&stream->queue, buf); 671 uvc_queue_next_buffer(&stream->queue, buf);
674 stream->last_fid ^= UVC_STREAM_FID; 672 stream->last_fid ^= UVC_STREAM_FID;
675 } 673 }
@@ -924,10 +922,8 @@ static int uvc_init_video_bulk(struct uvc_streaming *stream,
924static int uvc_init_video(struct uvc_streaming *stream, gfp_t gfp_flags) 922static int uvc_init_video(struct uvc_streaming *stream, gfp_t gfp_flags)
925{ 923{
926 struct usb_interface *intf = stream->intf; 924 struct usb_interface *intf = stream->intf;
927 struct usb_host_interface *alts; 925 struct usb_host_endpoint *ep;
928 struct usb_host_endpoint *ep = NULL; 926 unsigned int i;
929 int intfnum = stream->intfnum;
930 unsigned int bandwidth, psize, i;
931 int ret; 927 int ret;
932 928
933 stream->last_fid = -1; 929 stream->last_fid = -1;
@@ -936,6 +932,12 @@ static int uvc_init_video(struct uvc_streaming *stream, gfp_t gfp_flags)
936 stream->bulk.payload_size = 0; 932 stream->bulk.payload_size = 0;
937 933
938 if (intf->num_altsetting > 1) { 934 if (intf->num_altsetting > 1) {
935 struct usb_host_endpoint *best_ep = NULL;
936 unsigned int best_psize = 3 * 1024;
937 unsigned int bandwidth;
938 unsigned int uninitialized_var(altsetting);
939 int intfnum = stream->intfnum;
940
939 /* Isochronous endpoint, select the alternate setting. */ 941 /* Isochronous endpoint, select the alternate setting. */
940 bandwidth = stream->ctrl.dwMaxPayloadTransferSize; 942 bandwidth = stream->ctrl.dwMaxPayloadTransferSize;
941 943
@@ -949,6 +951,9 @@ static int uvc_init_video(struct uvc_streaming *stream, gfp_t gfp_flags)
949 } 951 }
950 952
951 for (i = 0; i < intf->num_altsetting; ++i) { 953 for (i = 0; i < intf->num_altsetting; ++i) {
954 struct usb_host_interface *alts;
955 unsigned int psize;
956
952 alts = &intf->altsetting[i]; 957 alts = &intf->altsetting[i];
953 ep = uvc_find_endpoint(alts, 958 ep = uvc_find_endpoint(alts,
954 stream->header.bEndpointAddress); 959 stream->header.bEndpointAddress);
@@ -958,21 +963,27 @@ static int uvc_init_video(struct uvc_streaming *stream, gfp_t gfp_flags)
958 /* Check if the bandwidth is high enough. */ 963 /* Check if the bandwidth is high enough. */
959 psize = le16_to_cpu(ep->desc.wMaxPacketSize); 964 psize = le16_to_cpu(ep->desc.wMaxPacketSize);
960 psize = (psize & 0x07ff) * (1 + ((psize >> 11) & 3)); 965 psize = (psize & 0x07ff) * (1 + ((psize >> 11) & 3));
961 if (psize >= bandwidth) 966 if (psize >= bandwidth && psize <= best_psize) {
962 break; 967 altsetting = i;
968 best_psize = psize;
969 best_ep = ep;
970 }
963 } 971 }
964 972
965 if (i >= intf->num_altsetting) { 973 if (best_ep == NULL) {
966 uvc_trace(UVC_TRACE_VIDEO, "No fast enough alt setting " 974 uvc_trace(UVC_TRACE_VIDEO, "No fast enough alt setting "
967 "for requested bandwidth.\n"); 975 "for requested bandwidth.\n");
968 return -EIO; 976 return -EIO;
969 } 977 }
970 978
971 ret = usb_set_interface(stream->dev->udev, intfnum, i); 979 uvc_trace(UVC_TRACE_VIDEO, "Selecting alternate setting %u "
980 "(%u B/frame bandwidth).\n", altsetting, best_psize);
981
982 ret = usb_set_interface(stream->dev->udev, intfnum, altsetting);
972 if (ret < 0) 983 if (ret < 0)
973 return ret; 984 return ret;
974 985
975 ret = uvc_init_video_isoc(stream, ep, gfp_flags); 986 ret = uvc_init_video_isoc(stream, best_ep, gfp_flags);
976 } else { 987 } else {
977 /* Bulk endpoint, proceed to URB initialization. */ 988 /* Bulk endpoint, proceed to URB initialization. */
978 ep = uvc_find_endpoint(&intf->altsetting[0], 989 ep = uvc_find_endpoint(&intf->altsetting[0],
diff --git a/drivers/media/video/uvc/uvcvideo.h b/drivers/media/video/uvc/uvcvideo.h
index 7ec9a04ced50..2337585001ea 100644
--- a/drivers/media/video/uvc/uvcvideo.h
+++ b/drivers/media/video/uvc/uvcvideo.h
@@ -365,8 +365,9 @@ enum uvc_buffer_state {
365 UVC_BUF_STATE_IDLE = 0, 365 UVC_BUF_STATE_IDLE = 0,
366 UVC_BUF_STATE_QUEUED = 1, 366 UVC_BUF_STATE_QUEUED = 1,
367 UVC_BUF_STATE_ACTIVE = 2, 367 UVC_BUF_STATE_ACTIVE = 2,
368 UVC_BUF_STATE_DONE = 3, 368 UVC_BUF_STATE_READY = 3,
369 UVC_BUF_STATE_ERROR = 4, 369 UVC_BUF_STATE_DONE = 4,
370 UVC_BUF_STATE_ERROR = 5,
370}; 371};
371 372
372struct uvc_buffer { 373struct uvc_buffer {
diff --git a/drivers/message/fusion/mptbase.c b/drivers/message/fusion/mptbase.c
index 610e914abe6c..44d2037e9e56 100644
--- a/drivers/message/fusion/mptbase.c
+++ b/drivers/message/fusion/mptbase.c
@@ -1587,7 +1587,7 @@ mpt_mapresources(MPT_ADAPTER *ioc)
1587{ 1587{
1588 u8 __iomem *mem; 1588 u8 __iomem *mem;
1589 int ii; 1589 int ii;
1590 unsigned long mem_phys; 1590 resource_size_t mem_phys;
1591 unsigned long port; 1591 unsigned long port;
1592 u32 msize; 1592 u32 msize;
1593 u32 psize; 1593 u32 psize;
@@ -1677,8 +1677,8 @@ mpt_mapresources(MPT_ADAPTER *ioc)
1677 return -EINVAL; 1677 return -EINVAL;
1678 } 1678 }
1679 ioc->memmap = mem; 1679 ioc->memmap = mem;
1680 dinitprintk(ioc, printk(MYIOC_s_INFO_FMT "mem = %p, mem_phys = %lx\n", 1680 dinitprintk(ioc, printk(MYIOC_s_INFO_FMT "mem = %p, mem_phys = %llx\n",
1681 ioc->name, mem, mem_phys)); 1681 ioc->name, mem, (unsigned long long)mem_phys));
1682 1682
1683 ioc->mem_phys = mem_phys; 1683 ioc->mem_phys = mem_phys;
1684 ioc->chip = (SYSIF_REGS __iomem *)mem; 1684 ioc->chip = (SYSIF_REGS __iomem *)mem;
@@ -4330,6 +4330,8 @@ initChainBuffers(MPT_ADAPTER *ioc)
4330 4330
4331 if (ioc->bus_type == SPI) 4331 if (ioc->bus_type == SPI)
4332 num_chain *= MPT_SCSI_CAN_QUEUE; 4332 num_chain *= MPT_SCSI_CAN_QUEUE;
4333 else if (ioc->bus_type == SAS)
4334 num_chain *= MPT_SAS_CAN_QUEUE;
4333 else 4335 else
4334 num_chain *= MPT_FC_CAN_QUEUE; 4336 num_chain *= MPT_FC_CAN_QUEUE;
4335 4337
diff --git a/drivers/message/fusion/mptscsih.c b/drivers/message/fusion/mptscsih.c
index 57752751712b..81279b3d694c 100644
--- a/drivers/message/fusion/mptscsih.c
+++ b/drivers/message/fusion/mptscsih.c
@@ -1796,7 +1796,7 @@ mptscsih_abort(struct scsi_cmnd * SCpnt)
1796 dtmprintk(ioc, printk(MYIOC_s_DEBUG_FMT "task abort: " 1796 dtmprintk(ioc, printk(MYIOC_s_DEBUG_FMT "task abort: "
1797 "Command not in the active list! (sc=%p)\n", ioc->name, 1797 "Command not in the active list! (sc=%p)\n", ioc->name,
1798 SCpnt)); 1798 SCpnt));
1799 retval = 0; 1799 retval = SUCCESS;
1800 goto out; 1800 goto out;
1801 } 1801 }
1802 1802
diff --git a/drivers/message/i2o/i2o_config.c b/drivers/message/i2o/i2o_config.c
index efba7021948a..3d5f40cd69df 100644
--- a/drivers/message/i2o/i2o_config.c
+++ b/drivers/message/i2o/i2o_config.c
@@ -40,8 +40,7 @@
40 40
41#define SG_TABLESIZE 30 41#define SG_TABLESIZE 30
42 42
43static int i2o_cfg_ioctl(struct inode *, struct file *, unsigned int, 43static long i2o_cfg_ioctl(struct file *, unsigned int, unsigned long);
44 unsigned long);
45 44
46static spinlock_t i2o_config_lock; 45static spinlock_t i2o_config_lock;
47 46
@@ -751,7 +750,7 @@ static long i2o_cfg_compat_ioctl(struct file *file, unsigned cmd,
751 lock_kernel(); 750 lock_kernel();
752 switch (cmd) { 751 switch (cmd) {
753 case I2OGETIOPS: 752 case I2OGETIOPS:
754 ret = i2o_cfg_ioctl(NULL, file, cmd, arg); 753 ret = i2o_cfg_ioctl(file, cmd, arg);
755 break; 754 break;
756 case I2OPASSTHRU32: 755 case I2OPASSTHRU32:
757 ret = i2o_cfg_passthru32(file, cmd, arg); 756 ret = i2o_cfg_passthru32(file, cmd, arg);
@@ -984,11 +983,11 @@ out:
984/* 983/*
985 * IOCTL Handler 984 * IOCTL Handler
986 */ 985 */
987static int i2o_cfg_ioctl(struct inode *inode, struct file *fp, unsigned int cmd, 986static long i2o_cfg_ioctl(struct file *fp, unsigned int cmd, unsigned long arg)
988 unsigned long arg)
989{ 987{
990 int ret; 988 int ret;
991 989
990 lock_kernel();
992 switch (cmd) { 991 switch (cmd) {
993 case I2OGETIOPS: 992 case I2OGETIOPS:
994 ret = i2o_cfg_getiops(arg); 993 ret = i2o_cfg_getiops(arg);
@@ -1044,7 +1043,7 @@ static int i2o_cfg_ioctl(struct inode *inode, struct file *fp, unsigned int cmd,
1044 osm_debug("unknown ioctl called!\n"); 1043 osm_debug("unknown ioctl called!\n");
1045 ret = -EINVAL; 1044 ret = -EINVAL;
1046 } 1045 }
1047 1046 unlock_kernel();
1048 return ret; 1047 return ret;
1049} 1048}
1050 1049
@@ -1118,7 +1117,7 @@ static int cfg_release(struct inode *inode, struct file *file)
1118static const struct file_operations config_fops = { 1117static const struct file_operations config_fops = {
1119 .owner = THIS_MODULE, 1118 .owner = THIS_MODULE,
1120 .llseek = no_llseek, 1119 .llseek = no_llseek,
1121 .ioctl = i2o_cfg_ioctl, 1120 .unlocked_ioctl = i2o_cfg_ioctl,
1122#ifdef CONFIG_COMPAT 1121#ifdef CONFIG_COMPAT
1123 .compat_ioctl = i2o_cfg_compat_ioctl, 1122 .compat_ioctl = i2o_cfg_compat_ioctl,
1124#endif 1123#endif
diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile
index ca2f2c4ff05e..e09eb4870db6 100644
--- a/drivers/mfd/Makefile
+++ b/drivers/mfd/Makefile
@@ -3,7 +3,7 @@
3# 3#
4 4
5obj-$(CONFIG_MFD_SM501) += sm501.o 5obj-$(CONFIG_MFD_SM501) += sm501.o
6obj-$(CONFIG_MFD_ASIC3) += asic3.o 6obj-$(CONFIG_MFD_ASIC3) += asic3.o tmio_core.o
7obj-$(CONFIG_MFD_SH_MOBILE_SDHI) += sh_mobile_sdhi.o 7obj-$(CONFIG_MFD_SH_MOBILE_SDHI) += sh_mobile_sdhi.o
8 8
9obj-$(CONFIG_HTC_EGPIO) += htc-egpio.o 9obj-$(CONFIG_HTC_EGPIO) += htc-egpio.o
@@ -11,9 +11,9 @@ obj-$(CONFIG_HTC_PASIC3) += htc-pasic3.o
11 11
12obj-$(CONFIG_MFD_DM355EVM_MSP) += dm355evm_msp.o 12obj-$(CONFIG_MFD_DM355EVM_MSP) += dm355evm_msp.o
13 13
14obj-$(CONFIG_MFD_T7L66XB) += t7l66xb.o 14obj-$(CONFIG_MFD_T7L66XB) += t7l66xb.o tmio_core.o
15obj-$(CONFIG_MFD_TC6387XB) += tc6387xb.o 15obj-$(CONFIG_MFD_TC6387XB) += tc6387xb.o tmio_core.o
16obj-$(CONFIG_MFD_TC6393XB) += tc6393xb.o 16obj-$(CONFIG_MFD_TC6393XB) += tc6393xb.o tmio_core.o
17 17
18obj-$(CONFIG_MFD_WM8400) += wm8400-core.o 18obj-$(CONFIG_MFD_WM8400) += wm8400-core.o
19wm831x-objs := wm831x-core.o wm831x-irq.o wm831x-otp.o 19wm831x-objs := wm831x-core.o wm831x-irq.o wm831x-otp.o
diff --git a/drivers/mfd/asic3.c b/drivers/mfd/asic3.c
index e22128c3e9a8..95c1e6bd1729 100644
--- a/drivers/mfd/asic3.c
+++ b/drivers/mfd/asic3.c
@@ -80,6 +80,7 @@ struct asic3 {
80 u16 irq_bothedge[4]; 80 u16 irq_bothedge[4];
81 struct gpio_chip gpio; 81 struct gpio_chip gpio;
82 struct device *dev; 82 struct device *dev;
83 void __iomem *tmio_cnf;
83 84
84 struct asic3_clk clocks[ARRAY_SIZE(asic3_clk_init)]; 85 struct asic3_clk clocks[ARRAY_SIZE(asic3_clk_init)];
85}; 86};
@@ -685,8 +686,24 @@ static struct mfd_cell asic3_cell_ds1wm = {
685 .resources = ds1wm_resources, 686 .resources = ds1wm_resources,
686}; 687};
687 688
689static void asic3_mmc_pwr(struct platform_device *pdev, int state)
690{
691 struct asic3 *asic = dev_get_drvdata(pdev->dev.parent);
692
693 tmio_core_mmc_pwr(asic->tmio_cnf, 1 - asic->bus_shift, state);
694}
695
696static void asic3_mmc_clk_div(struct platform_device *pdev, int state)
697{
698 struct asic3 *asic = dev_get_drvdata(pdev->dev.parent);
699
700 tmio_core_mmc_clk_div(asic->tmio_cnf, 1 - asic->bus_shift, state);
701}
702
688static struct tmio_mmc_data asic3_mmc_data = { 703static struct tmio_mmc_data asic3_mmc_data = {
689 .hclk = 24576000, 704 .hclk = 24576000,
705 .set_pwr = asic3_mmc_pwr,
706 .set_clk_div = asic3_mmc_clk_div,
690}; 707};
691 708
692static struct resource asic3_mmc_resources[] = { 709static struct resource asic3_mmc_resources[] = {
@@ -696,11 +713,6 @@ static struct resource asic3_mmc_resources[] = {
696 .flags = IORESOURCE_MEM, 713 .flags = IORESOURCE_MEM,
697 }, 714 },
698 { 715 {
699 .start = ASIC3_SD_CONFIG_BASE,
700 .end = ASIC3_SD_CONFIG_BASE + 0x1ff,
701 .flags = IORESOURCE_MEM,
702 },
703 {
704 .start = 0, 716 .start = 0,
705 .end = 0, 717 .end = 0,
706 .flags = IORESOURCE_IRQ, 718 .flags = IORESOURCE_IRQ,
@@ -743,6 +755,10 @@ static int asic3_mmc_enable(struct platform_device *pdev)
743 asic3_set_register(asic, ASIC3_OFFSET(SDHWCTRL, SDCONF), 755 asic3_set_register(asic, ASIC3_OFFSET(SDHWCTRL, SDCONF),
744 ASIC3_SDHWCTRL_SDPWR, 1); 756 ASIC3_SDHWCTRL_SDPWR, 1);
745 757
758 /* ASIC3_SD_CTRL_BASE assumes 32-bit addressing, TMIO is 16-bit */
759 tmio_core_mmc_enable(asic->tmio_cnf, 1 - asic->bus_shift,
760 ASIC3_SD_CTRL_BASE >> 1);
761
746 return 0; 762 return 0;
747} 763}
748 764
@@ -797,10 +813,15 @@ static int __init asic3_mfd_probe(struct platform_device *pdev,
797 asic3_cell_ds1wm.data_size = sizeof(asic3_cell_ds1wm); 813 asic3_cell_ds1wm.data_size = sizeof(asic3_cell_ds1wm);
798 814
799 /* MMC */ 815 /* MMC */
816 asic->tmio_cnf = ioremap((ASIC3_SD_CONFIG_BASE >> asic->bus_shift) +
817 mem_sdio->start, 0x400 >> asic->bus_shift);
818 if (!asic->tmio_cnf) {
819 ret = -ENOMEM;
820 dev_dbg(asic->dev, "Couldn't ioremap SD_CONFIG\n");
821 goto out;
822 }
800 asic3_mmc_resources[0].start >>= asic->bus_shift; 823 asic3_mmc_resources[0].start >>= asic->bus_shift;
801 asic3_mmc_resources[0].end >>= asic->bus_shift; 824 asic3_mmc_resources[0].end >>= asic->bus_shift;
802 asic3_mmc_resources[1].start >>= asic->bus_shift;
803 asic3_mmc_resources[1].end >>= asic->bus_shift;
804 825
805 asic3_cell_mmc.platform_data = &asic3_cell_mmc; 826 asic3_cell_mmc.platform_data = &asic3_cell_mmc;
806 asic3_cell_mmc.data_size = sizeof(asic3_cell_mmc); 827 asic3_cell_mmc.data_size = sizeof(asic3_cell_mmc);
@@ -820,7 +841,10 @@ static int __init asic3_mfd_probe(struct platform_device *pdev,
820 841
821static void asic3_mfd_remove(struct platform_device *pdev) 842static void asic3_mfd_remove(struct platform_device *pdev)
822{ 843{
844 struct asic3 *asic = platform_get_drvdata(pdev);
845
823 mfd_remove_devices(&pdev->dev); 846 mfd_remove_devices(&pdev->dev);
847 iounmap(asic->tmio_cnf);
824} 848}
825 849
826/* Core */ 850/* Core */
diff --git a/drivers/mfd/mc13783-core.c b/drivers/mfd/mc13783-core.c
index a1ade2324ea9..735c8a4d164f 100644
--- a/drivers/mfd/mc13783-core.c
+++ b/drivers/mfd/mc13783-core.c
@@ -619,6 +619,8 @@ err_revision:
619 } 619 }
620 /* This should go away (END) */ 620 /* This should go away (END) */
621 621
622 mc13783_unlock(mc13783);
623
622 if (pdata->flags & MC13783_USE_ADC) 624 if (pdata->flags & MC13783_USE_ADC)
623 mc13783_add_subdevice(mc13783, "mc13783-adc"); 625 mc13783_add_subdevice(mc13783, "mc13783-adc");
624 626
@@ -641,8 +643,6 @@ err_revision:
641 if (pdata->flags & MC13783_USE_TOUCHSCREEN) 643 if (pdata->flags & MC13783_USE_TOUCHSCREEN)
642 mc13783_add_subdevice(mc13783, "mc13783-ts"); 644 mc13783_add_subdevice(mc13783, "mc13783-ts");
643 645
644 mc13783_unlock(mc13783);
645
646 return 0; 646 return 0;
647} 647}
648 648
diff --git a/drivers/mfd/t7l66xb.c b/drivers/mfd/t7l66xb.c
index 0a255c1f1ce7..bcf4687d4af5 100644
--- a/drivers/mfd/t7l66xb.c
+++ b/drivers/mfd/t7l66xb.c
@@ -38,6 +38,19 @@ enum {
38 T7L66XB_CELL_MMC, 38 T7L66XB_CELL_MMC,
39}; 39};
40 40
41static const struct resource t7l66xb_mmc_resources[] = {
42 {
43 .start = 0x800,
44 .end = 0x9ff,
45 .flags = IORESOURCE_MEM,
46 },
47 {
48 .start = IRQ_T7L66XB_MMC,
49 .end = IRQ_T7L66XB_MMC,
50 .flags = IORESOURCE_IRQ,
51 },
52};
53
41#define SCR_REVID 0x08 /* b Revision ID */ 54#define SCR_REVID 0x08 /* b Revision ID */
42#define SCR_IMR 0x42 /* b Interrupt Mask */ 55#define SCR_IMR 0x42 /* b Interrupt Mask */
43#define SCR_DEV_CTL 0xe0 /* b Device control */ 56#define SCR_DEV_CTL 0xe0 /* b Device control */
@@ -83,6 +96,9 @@ static int t7l66xb_mmc_enable(struct platform_device *mmc)
83 96
84 spin_unlock_irqrestore(&t7l66xb->lock, flags); 97 spin_unlock_irqrestore(&t7l66xb->lock, flags);
85 98
99 tmio_core_mmc_enable(t7l66xb->scr + 0x200, 0,
100 t7l66xb_mmc_resources[0].start & 0xfffe);
101
86 return 0; 102 return 0;
87} 103}
88 104
@@ -106,28 +122,28 @@ static int t7l66xb_mmc_disable(struct platform_device *mmc)
106 return 0; 122 return 0;
107} 123}
108 124
125static void t7l66xb_mmc_pwr(struct platform_device *mmc, int state)
126{
127 struct platform_device *dev = to_platform_device(mmc->dev.parent);
128 struct t7l66xb *t7l66xb = platform_get_drvdata(dev);
129
130 tmio_core_mmc_pwr(t7l66xb->scr + 0x200, 0, state);
131}
132
133static void t7l66xb_mmc_clk_div(struct platform_device *mmc, int state)
134{
135 struct platform_device *dev = to_platform_device(mmc->dev.parent);
136 struct t7l66xb *t7l66xb = platform_get_drvdata(dev);
137
138 tmio_core_mmc_clk_div(t7l66xb->scr + 0x200, 0, state);
139}
140
109/*--------------------------------------------------------------------------*/ 141/*--------------------------------------------------------------------------*/
110 142
111static struct tmio_mmc_data t7166xb_mmc_data = { 143static struct tmio_mmc_data t7166xb_mmc_data = {
112 .hclk = 24000000, 144 .hclk = 24000000,
113}; 145 .set_pwr = t7l66xb_mmc_pwr,
114 146 .set_clk_div = t7l66xb_mmc_clk_div,
115static const struct resource t7l66xb_mmc_resources[] = {
116 {
117 .start = 0x800,
118 .end = 0x9ff,
119 .flags = IORESOURCE_MEM,
120 },
121 {
122 .start = 0x200,
123 .end = 0x2ff,
124 .flags = IORESOURCE_MEM,
125 },
126 {
127 .start = IRQ_T7L66XB_MMC,
128 .end = IRQ_T7L66XB_MMC,
129 .flags = IORESOURCE_IRQ,
130 },
131}; 147};
132 148
133static const struct resource t7l66xb_nand_resources[] = { 149static const struct resource t7l66xb_nand_resources[] = {
@@ -282,6 +298,9 @@ static int t7l66xb_resume(struct platform_device *dev)
282 if (pdata && pdata->resume) 298 if (pdata && pdata->resume)
283 pdata->resume(dev); 299 pdata->resume(dev);
284 300
301 tmio_core_mmc_enable(t7l66xb->scr + 0x200, 0,
302 t7l66xb_mmc_resources[0].start & 0xfffe);
303
285 return 0; 304 return 0;
286} 305}
287#else 306#else
diff --git a/drivers/mfd/tc6387xb.c b/drivers/mfd/tc6387xb.c
index 3280ab33f88a..5c7f04343d5c 100644
--- a/drivers/mfd/tc6387xb.c
+++ b/drivers/mfd/tc6387xb.c
@@ -22,28 +22,52 @@ enum {
22 TC6387XB_CELL_MMC, 22 TC6387XB_CELL_MMC,
23}; 23};
24 24
25struct tc6387xb {
26 void __iomem *scr;
27 struct clk *clk32k;
28 struct resource rscr;
29};
30
31static struct resource tc6387xb_mmc_resources[] = {
32 {
33 .start = 0x800,
34 .end = 0x9ff,
35 .flags = IORESOURCE_MEM,
36 },
37 {
38 .start = 0,
39 .end = 0,
40 .flags = IORESOURCE_IRQ,
41 },
42};
43
44/*--------------------------------------------------------------------------*/
45
25#ifdef CONFIG_PM 46#ifdef CONFIG_PM
26static int tc6387xb_suspend(struct platform_device *dev, pm_message_t state) 47static int tc6387xb_suspend(struct platform_device *dev, pm_message_t state)
27{ 48{
28 struct clk *clk32k = platform_get_drvdata(dev); 49 struct tc6387xb *tc6387xb = platform_get_drvdata(dev);
29 struct tc6387xb_platform_data *pdata = dev->dev.platform_data; 50 struct tc6387xb_platform_data *pdata = dev->dev.platform_data;
30 51
31 if (pdata && pdata->suspend) 52 if (pdata && pdata->suspend)
32 pdata->suspend(dev); 53 pdata->suspend(dev);
33 clk_disable(clk32k); 54 clk_disable(tc6387xb->clk32k);
34 55
35 return 0; 56 return 0;
36} 57}
37 58
38static int tc6387xb_resume(struct platform_device *dev) 59static int tc6387xb_resume(struct platform_device *dev)
39{ 60{
40 struct clk *clk32k = platform_get_drvdata(dev); 61 struct tc6387xb *tc6387xb = platform_get_drvdata(dev);
41 struct tc6387xb_platform_data *pdata = dev->dev.platform_data; 62 struct tc6387xb_platform_data *pdata = dev->dev.platform_data;
42 63
43 clk_enable(clk32k); 64 clk_enable(tc6387xb->clk32k);
44 if (pdata && pdata->resume) 65 if (pdata && pdata->resume)
45 pdata->resume(dev); 66 pdata->resume(dev);
46 67
68 tmio_core_mmc_resume(tc6387xb->scr + 0x200, 0,
69 tc6387xb_mmc_resources[0].start & 0xfffe);
70
47 return 0; 71 return 0;
48} 72}
49#else 73#else
@@ -53,12 +77,32 @@ static int tc6387xb_resume(struct platform_device *dev)
53 77
54/*--------------------------------------------------------------------------*/ 78/*--------------------------------------------------------------------------*/
55 79
80static void tc6387xb_mmc_pwr(struct platform_device *mmc, int state)
81{
82 struct platform_device *dev = to_platform_device(mmc->dev.parent);
83 struct tc6387xb *tc6387xb = platform_get_drvdata(dev);
84
85 tmio_core_mmc_pwr(tc6387xb->scr + 0x200, 0, state);
86}
87
88static void tc6387xb_mmc_clk_div(struct platform_device *mmc, int state)
89{
90 struct platform_device *dev = to_platform_device(mmc->dev.parent);
91 struct tc6387xb *tc6387xb = platform_get_drvdata(dev);
92
93 tmio_core_mmc_clk_div(tc6387xb->scr + 0x200, 0, state);
94}
95
96
56static int tc6387xb_mmc_enable(struct platform_device *mmc) 97static int tc6387xb_mmc_enable(struct platform_device *mmc)
57{ 98{
58 struct platform_device *dev = to_platform_device(mmc->dev.parent); 99 struct platform_device *dev = to_platform_device(mmc->dev.parent);
59 struct clk *clk32k = platform_get_drvdata(dev); 100 struct tc6387xb *tc6387xb = platform_get_drvdata(dev);
60 101
61 clk_enable(clk32k); 102 clk_enable(tc6387xb->clk32k);
103
104 tmio_core_mmc_enable(tc6387xb->scr + 0x200, 0,
105 tc6387xb_mmc_resources[0].start & 0xfffe);
62 106
63 return 0; 107 return 0;
64} 108}
@@ -66,36 +110,20 @@ static int tc6387xb_mmc_enable(struct platform_device *mmc)
66static int tc6387xb_mmc_disable(struct platform_device *mmc) 110static int tc6387xb_mmc_disable(struct platform_device *mmc)
67{ 111{
68 struct platform_device *dev = to_platform_device(mmc->dev.parent); 112 struct platform_device *dev = to_platform_device(mmc->dev.parent);
69 struct clk *clk32k = platform_get_drvdata(dev); 113 struct tc6387xb *tc6387xb = platform_get_drvdata(dev);
70 114
71 clk_disable(clk32k); 115 clk_disable(tc6387xb->clk32k);
72 116
73 return 0; 117 return 0;
74} 118}
75 119
76/*--------------------------------------------------------------------------*/
77
78static struct tmio_mmc_data tc6387xb_mmc_data = { 120static struct tmio_mmc_data tc6387xb_mmc_data = {
79 .hclk = 24000000, 121 .hclk = 24000000,
122 .set_pwr = tc6387xb_mmc_pwr,
123 .set_clk_div = tc6387xb_mmc_clk_div,
80}; 124};
81 125
82static struct resource tc6387xb_mmc_resources[] = { 126/*--------------------------------------------------------------------------*/
83 {
84 .start = 0x800,
85 .end = 0x9ff,
86 .flags = IORESOURCE_MEM,
87 },
88 {
89 .start = 0x200,
90 .end = 0x2ff,
91 .flags = IORESOURCE_MEM,
92 },
93 {
94 .start = 0,
95 .end = 0,
96 .flags = IORESOURCE_IRQ,
97 },
98};
99 127
100static struct mfd_cell tc6387xb_cells[] = { 128static struct mfd_cell tc6387xb_cells[] = {
101 [TC6387XB_CELL_MMC] = { 129 [TC6387XB_CELL_MMC] = {
@@ -111,8 +139,9 @@ static struct mfd_cell tc6387xb_cells[] = {
111static int tc6387xb_probe(struct platform_device *dev) 139static int tc6387xb_probe(struct platform_device *dev)
112{ 140{
113 struct tc6387xb_platform_data *pdata = dev->dev.platform_data; 141 struct tc6387xb_platform_data *pdata = dev->dev.platform_data;
114 struct resource *iomem; 142 struct resource *iomem, *rscr;
115 struct clk *clk32k; 143 struct clk *clk32k;
144 struct tc6387xb *tc6387xb;
116 int irq, ret; 145 int irq, ret;
117 146
118 iomem = platform_get_resource(dev, IORESOURCE_MEM, 0); 147 iomem = platform_get_resource(dev, IORESOURCE_MEM, 0);
@@ -120,18 +149,40 @@ static int tc6387xb_probe(struct platform_device *dev)
120 return -EINVAL; 149 return -EINVAL;
121 } 150 }
122 151
152 tc6387xb = kzalloc(sizeof *tc6387xb, GFP_KERNEL);
153 if (!tc6387xb)
154 return -ENOMEM;
155
123 ret = platform_get_irq(dev, 0); 156 ret = platform_get_irq(dev, 0);
124 if (ret >= 0) 157 if (ret >= 0)
125 irq = ret; 158 irq = ret;
126 else 159 else
127 goto err_resource; 160 goto err_no_irq;
128 161
129 clk32k = clk_get(&dev->dev, "CLK_CK32K"); 162 clk32k = clk_get(&dev->dev, "CLK_CK32K");
130 if (IS_ERR(clk32k)) { 163 if (IS_ERR(clk32k)) {
131 ret = PTR_ERR(clk32k); 164 ret = PTR_ERR(clk32k);
165 goto err_no_clk;
166 }
167
168 rscr = &tc6387xb->rscr;
169 rscr->name = "tc6387xb-core";
170 rscr->start = iomem->start;
171 rscr->end = iomem->start + 0xff;
172 rscr->flags = IORESOURCE_MEM;
173
174 ret = request_resource(iomem, rscr);
175 if (ret)
132 goto err_resource; 176 goto err_resource;
177
178 tc6387xb->scr = ioremap(rscr->start, rscr->end - rscr->start + 1);
179 if (!tc6387xb->scr) {
180 ret = -ENOMEM;
181 goto err_ioremap;
133 } 182 }
134 platform_set_drvdata(dev, clk32k); 183
184 tc6387xb->clk32k = clk32k;
185 platform_set_drvdata(dev, tc6387xb);
135 186
136 if (pdata && pdata->enable) 187 if (pdata && pdata->enable)
137 pdata->enable(dev); 188 pdata->enable(dev);
@@ -149,8 +200,13 @@ static int tc6387xb_probe(struct platform_device *dev)
149 if (!ret) 200 if (!ret)
150 return 0; 201 return 0;
151 202
152 clk_put(clk32k); 203err_ioremap:
204 release_resource(&tc6387xb->rscr);
153err_resource: 205err_resource:
206 clk_put(clk32k);
207err_no_clk:
208err_no_irq:
209 kfree(tc6387xb);
154 return ret; 210 return ret;
155} 211}
156 212
@@ -195,3 +251,4 @@ MODULE_DESCRIPTION("Toshiba TC6387XB core driver");
195MODULE_LICENSE("GPL v2"); 251MODULE_LICENSE("GPL v2");
196MODULE_AUTHOR("Ian Molton"); 252MODULE_AUTHOR("Ian Molton");
197MODULE_ALIAS("platform:tc6387xb"); 253MODULE_ALIAS("platform:tc6387xb");
254
diff --git a/drivers/mfd/tc6393xb.c b/drivers/mfd/tc6393xb.c
index 1429a7341a9a..4bc5a08a2b09 100644
--- a/drivers/mfd/tc6393xb.c
+++ b/drivers/mfd/tc6393xb.c
@@ -136,10 +136,6 @@ static int tc6393xb_nand_enable(struct platform_device *nand)
136 return 0; 136 return 0;
137} 137}
138 138
139static struct tmio_mmc_data tc6393xb_mmc_data = {
140 .hclk = 24000000,
141};
142
143static struct resource __devinitdata tc6393xb_nand_resources[] = { 139static struct resource __devinitdata tc6393xb_nand_resources[] = {
144 { 140 {
145 .start = 0x1000, 141 .start = 0x1000,
@@ -165,11 +161,6 @@ static struct resource __devinitdata tc6393xb_mmc_resources[] = {
165 .flags = IORESOURCE_MEM, 161 .flags = IORESOURCE_MEM,
166 }, 162 },
167 { 163 {
168 .start = 0x200,
169 .end = 0x2ff,
170 .flags = IORESOURCE_MEM,
171 },
172 {
173 .start = IRQ_TC6393_MMC, 164 .start = IRQ_TC6393_MMC,
174 .end = IRQ_TC6393_MMC, 165 .end = IRQ_TC6393_MMC,
175 .flags = IORESOURCE_IRQ, 166 .flags = IORESOURCE_IRQ,
@@ -346,6 +337,50 @@ int tc6393xb_lcd_mode(struct platform_device *fb,
346} 337}
347EXPORT_SYMBOL(tc6393xb_lcd_mode); 338EXPORT_SYMBOL(tc6393xb_lcd_mode);
348 339
340static int tc6393xb_mmc_enable(struct platform_device *mmc)
341{
342 struct platform_device *dev = to_platform_device(mmc->dev.parent);
343 struct tc6393xb *tc6393xb = platform_get_drvdata(dev);
344
345 tmio_core_mmc_enable(tc6393xb->scr + 0x200, 0,
346 tc6393xb_mmc_resources[0].start & 0xfffe);
347
348 return 0;
349}
350
351static int tc6393xb_mmc_resume(struct platform_device *mmc)
352{
353 struct platform_device *dev = to_platform_device(mmc->dev.parent);
354 struct tc6393xb *tc6393xb = platform_get_drvdata(dev);
355
356 tmio_core_mmc_resume(tc6393xb->scr + 0x200, 0,
357 tc6393xb_mmc_resources[0].start & 0xfffe);
358
359 return 0;
360}
361
362static void tc6393xb_mmc_pwr(struct platform_device *mmc, int state)
363{
364 struct platform_device *dev = to_platform_device(mmc->dev.parent);
365 struct tc6393xb *tc6393xb = platform_get_drvdata(dev);
366
367 tmio_core_mmc_pwr(tc6393xb->scr + 0x200, 0, state);
368}
369
370static void tc6393xb_mmc_clk_div(struct platform_device *mmc, int state)
371{
372 struct platform_device *dev = to_platform_device(mmc->dev.parent);
373 struct tc6393xb *tc6393xb = platform_get_drvdata(dev);
374
375 tmio_core_mmc_clk_div(tc6393xb->scr + 0x200, 0, state);
376}
377
378static struct tmio_mmc_data tc6393xb_mmc_data = {
379 .hclk = 24000000,
380 .set_pwr = tc6393xb_mmc_pwr,
381 .set_clk_div = tc6393xb_mmc_clk_div,
382};
383
349static struct mfd_cell __devinitdata tc6393xb_cells[] = { 384static struct mfd_cell __devinitdata tc6393xb_cells[] = {
350 [TC6393XB_CELL_NAND] = { 385 [TC6393XB_CELL_NAND] = {
351 .name = "tmio-nand", 386 .name = "tmio-nand",
@@ -355,6 +390,8 @@ static struct mfd_cell __devinitdata tc6393xb_cells[] = {
355 }, 390 },
356 [TC6393XB_CELL_MMC] = { 391 [TC6393XB_CELL_MMC] = {
357 .name = "tmio-mmc", 392 .name = "tmio-mmc",
393 .enable = tc6393xb_mmc_enable,
394 .resume = tc6393xb_mmc_resume,
358 .driver_data = &tc6393xb_mmc_data, 395 .driver_data = &tc6393xb_mmc_data,
359 .num_resources = ARRAY_SIZE(tc6393xb_mmc_resources), 396 .num_resources = ARRAY_SIZE(tc6393xb_mmc_resources),
360 .resources = tc6393xb_mmc_resources, 397 .resources = tc6393xb_mmc_resources,
@@ -836,3 +873,4 @@ MODULE_LICENSE("GPL v2");
836MODULE_AUTHOR("Ian Molton, Dmitry Baryshkov and Dirk Opfer"); 873MODULE_AUTHOR("Ian Molton, Dmitry Baryshkov and Dirk Opfer");
837MODULE_DESCRIPTION("tc6393xb Toshiba Mobile IO Controller"); 874MODULE_DESCRIPTION("tc6393xb Toshiba Mobile IO Controller");
838MODULE_ALIAS("platform:tc6393xb"); 875MODULE_ALIAS("platform:tc6393xb");
876
diff --git a/drivers/mfd/tmio_core.c b/drivers/mfd/tmio_core.c
new file mode 100644
index 000000000000..eddc19ae464b
--- /dev/null
+++ b/drivers/mfd/tmio_core.c
@@ -0,0 +1,52 @@
1/*
2 * Copyright(c) 2009 Ian Molton <spyro@f2s.com>
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8
9#include <linux/mfd/tmio.h>
10
11int tmio_core_mmc_enable(void __iomem *cnf, int shift, unsigned long base)
12{
13 /* Enable the MMC/SD Control registers */
14 sd_config_write16(cnf, shift, CNF_CMD, SDCREN);
15 sd_config_write32(cnf, shift, CNF_CTL_BASE, base & 0xfffe);
16
17 /* Disable SD power during suspend */
18 sd_config_write8(cnf, shift, CNF_PWR_CTL_3, 0x01);
19
20 /* The below is required but why? FIXME */
21 sd_config_write8(cnf, shift, CNF_STOP_CLK_CTL, 0x1f);
22
23 /* Power down SD bus */
24 sd_config_write8(cnf, shift, CNF_PWR_CTL_2, 0x00);
25
26 return 0;
27}
28EXPORT_SYMBOL(tmio_core_mmc_enable);
29
30int tmio_core_mmc_resume(void __iomem *cnf, int shift, unsigned long base)
31{
32
33 /* Enable the MMC/SD Control registers */
34 sd_config_write16(cnf, shift, CNF_CMD, SDCREN);
35 sd_config_write32(cnf, shift, CNF_CTL_BASE, base & 0xfffe);
36
37 return 0;
38}
39EXPORT_SYMBOL(tmio_core_mmc_resume);
40
41void tmio_core_mmc_pwr(void __iomem *cnf, int shift, int state)
42{
43 sd_config_write8(cnf, shift, CNF_PWR_CTL_2, state ? 0x02 : 0x00);
44}
45EXPORT_SYMBOL(tmio_core_mmc_pwr);
46
47void tmio_core_mmc_clk_div(void __iomem *cnf, int shift, int state)
48{
49 sd_config_write8(cnf, shift, CNF_SD_CLK_MODE, state ? 1 : 0);
50}
51EXPORT_SYMBOL(tmio_core_mmc_clk_div);
52
diff --git a/drivers/mfd/twl4030-irq.c b/drivers/mfd/twl4030-irq.c
index 20d29bafc9f5..9df9a5ad38f9 100644
--- a/drivers/mfd/twl4030-irq.c
+++ b/drivers/mfd/twl4030-irq.c
@@ -568,12 +568,12 @@ static void twl4030_sih_do_edge(struct work_struct *work)
568 568
569 bytes[byte] &= ~(0x03 << off); 569 bytes[byte] &= ~(0x03 << off);
570 570
571 spin_lock_irq(&d->lock); 571 raw_spin_lock_irq(&d->lock);
572 if (d->status & IRQ_TYPE_EDGE_RISING) 572 if (d->status & IRQ_TYPE_EDGE_RISING)
573 bytes[byte] |= BIT(off + 1); 573 bytes[byte] |= BIT(off + 1);
574 if (d->status & IRQ_TYPE_EDGE_FALLING) 574 if (d->status & IRQ_TYPE_EDGE_FALLING)
575 bytes[byte] |= BIT(off + 0); 575 bytes[byte] |= BIT(off + 0);
576 spin_unlock_irq(&d->lock); 576 raw_spin_unlock_irq(&d->lock);
577 577
578 edge_change &= ~BIT(i); 578 edge_change &= ~BIT(i);
579 } 579 }
diff --git a/drivers/mfd/wm8350-core.c b/drivers/mfd/wm8350-core.c
index 8485a7018060..9a970bd68775 100644
--- a/drivers/mfd/wm8350-core.c
+++ b/drivers/mfd/wm8350-core.c
@@ -134,8 +134,7 @@ static inline int is_reg_locked(struct wm8350 *wm8350, u8 reg)
134 wm8350->reg_cache[WM8350_SECURITY] == WM8350_UNLOCK_KEY) 134 wm8350->reg_cache[WM8350_SECURITY] == WM8350_UNLOCK_KEY)
135 return 0; 135 return 0;
136 136
137 if ((reg == WM8350_GPIO_CONFIGURATION_I_O) || 137 if ((reg >= WM8350_GPIO_FUNCTION_SELECT_1 &&
138 (reg >= WM8350_GPIO_FUNCTION_SELECT_1 &&
139 reg <= WM8350_GPIO_FUNCTION_SELECT_4) || 138 reg <= WM8350_GPIO_FUNCTION_SELECT_4) ||
140 (reg >= WM8350_BATTERY_CHARGER_CONTROL_1 && 139 (reg >= WM8350_BATTERY_CHARGER_CONTROL_1 &&
141 reg <= WM8350_BATTERY_CHARGER_CONTROL_3)) 140 reg <= WM8350_BATTERY_CHARGER_CONTROL_3))
diff --git a/drivers/mfd/wm8350-irq.c b/drivers/mfd/wm8350-irq.c
index c8df547c4747..9025f29e2707 100644
--- a/drivers/mfd/wm8350-irq.c
+++ b/drivers/mfd/wm8350-irq.c
@@ -434,7 +434,7 @@ int wm8350_register_irq(struct wm8350 *wm8350, int irq,
434 irq_handler_t handler, unsigned long flags, 434 irq_handler_t handler, unsigned long flags,
435 const char *name, void *data) 435 const char *name, void *data)
436{ 436{
437 if (irq < 0 || irq > WM8350_NUM_IRQ || !handler) 437 if (irq < 0 || irq >= WM8350_NUM_IRQ || !handler)
438 return -EINVAL; 438 return -EINVAL;
439 439
440 if (wm8350->irq[irq].handler) 440 if (wm8350->irq[irq].handler)
@@ -453,7 +453,7 @@ EXPORT_SYMBOL_GPL(wm8350_register_irq);
453 453
454int wm8350_free_irq(struct wm8350 *wm8350, int irq) 454int wm8350_free_irq(struct wm8350 *wm8350, int irq)
455{ 455{
456 if (irq < 0 || irq > WM8350_NUM_IRQ) 456 if (irq < 0 || irq >= WM8350_NUM_IRQ)
457 return -EINVAL; 457 return -EINVAL;
458 458
459 wm8350_mask_irq(wm8350, irq); 459 wm8350_mask_irq(wm8350, irq);
diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig
index 59f4ba1b7034..e3551d20464f 100644
--- a/drivers/misc/Kconfig
+++ b/drivers/misc/Kconfig
@@ -203,6 +203,7 @@ config CS5535_MFGPT
203 203
204config CS5535_MFGPT_DEFAULT_IRQ 204config CS5535_MFGPT_DEFAULT_IRQ
205 int 205 int
206 depends on CS5535_MFGPT
206 default 7 207 default 7
207 help 208 help
208 MFGPTs on the CS5535 require an interrupt. The selected IRQ 209 MFGPTs on the CS5535 require an interrupt. The selected IRQ
@@ -248,19 +249,6 @@ config SGI_GRU_DEBUG
248 This option enables addition debugging code for the SGI GRU driver. If 249 This option enables addition debugging code for the SGI GRU driver. If
249 you are unsure, say N. 250 you are unsure, say N.
250 251
251config DELL_LAPTOP
252 tristate "Dell Laptop Extras (EXPERIMENTAL)"
253 depends on X86
254 depends on DCDBAS
255 depends on EXPERIMENTAL
256 depends on BACKLIGHT_CLASS_DEVICE
257 depends on RFKILL
258 depends on POWER_SUPPLY
259 default n
260 ---help---
261 This driver adds support for rfkill and backlight control to Dell
262 laptops.
263
264config ISL29003 252config ISL29003
265 tristate "Intersil ISL29003 ambient light sensor" 253 tristate "Intersil ISL29003 ambient light sensor"
266 depends on I2C && SYSFS 254 depends on I2C && SYSFS
diff --git a/drivers/misc/enclosure.c b/drivers/misc/enclosure.c
index e9eae4a78402..1eac626e710a 100644
--- a/drivers/misc/enclosure.c
+++ b/drivers/misc/enclosure.c
@@ -391,6 +391,7 @@ static const char *const enclosure_status [] = {
391 [ENCLOSURE_STATUS_NOT_INSTALLED] = "not installed", 391 [ENCLOSURE_STATUS_NOT_INSTALLED] = "not installed",
392 [ENCLOSURE_STATUS_UNKNOWN] = "unknown", 392 [ENCLOSURE_STATUS_UNKNOWN] = "unknown",
393 [ENCLOSURE_STATUS_UNAVAILABLE] = "unavailable", 393 [ENCLOSURE_STATUS_UNAVAILABLE] = "unavailable",
394 [ENCLOSURE_STATUS_MAX] = NULL,
394}; 395};
395 396
396static const char *const enclosure_type [] = { 397static const char *const enclosure_type [] = {
diff --git a/drivers/mmc/card/block.c b/drivers/mmc/card/block.c
index 85f0e8cd875b..1f552c6e7579 100644
--- a/drivers/mmc/card/block.c
+++ b/drivers/mmc/card/block.c
@@ -85,7 +85,14 @@ static void mmc_blk_put(struct mmc_blk_data *md)
85 mutex_lock(&open_lock); 85 mutex_lock(&open_lock);
86 md->usage--; 86 md->usage--;
87 if (md->usage == 0) { 87 if (md->usage == 0) {
88 int devmaj = MAJOR(disk_devt(md->disk));
88 int devidx = MINOR(disk_devt(md->disk)) >> MMC_SHIFT; 89 int devidx = MINOR(disk_devt(md->disk)) >> MMC_SHIFT;
90
91 if (!devmaj)
92 devidx = md->disk->first_minor >> MMC_SHIFT;
93
94 blk_cleanup_queue(md->queue.queue);
95
89 __clear_bit(devidx, dev_use); 96 __clear_bit(devidx, dev_use);
90 97
91 put_disk(md->disk); 98 put_disk(md->disk);
@@ -613,6 +620,7 @@ static int mmc_blk_probe(struct mmc_card *card)
613 return 0; 620 return 0;
614 621
615 out: 622 out:
623 mmc_cleanup_queue(&md->queue);
616 mmc_blk_put(md); 624 mmc_blk_put(md);
617 625
618 return err; 626 return err;
diff --git a/drivers/mmc/card/mmc_test.c b/drivers/mmc/card/mmc_test.c
index b9f1e84897cc..e7f8027165e6 100644
--- a/drivers/mmc/card/mmc_test.c
+++ b/drivers/mmc/card/mmc_test.c
@@ -74,6 +74,9 @@ static void mmc_test_prepare_mrq(struct mmc_test_card *test,
74 } 74 }
75 75
76 mrq->cmd->arg = dev_addr; 76 mrq->cmd->arg = dev_addr;
77 if (!mmc_card_blockaddr(test->card))
78 mrq->cmd->arg <<= 9;
79
77 mrq->cmd->flags = MMC_RSP_R1 | MMC_CMD_ADTC; 80 mrq->cmd->flags = MMC_RSP_R1 | MMC_CMD_ADTC;
78 81
79 if (blocks == 1) 82 if (blocks == 1)
@@ -190,7 +193,7 @@ static int __mmc_test_prepare(struct mmc_test_card *test, int write)
190 } 193 }
191 194
192 for (i = 0;i < BUFFER_SIZE / 512;i++) { 195 for (i = 0;i < BUFFER_SIZE / 512;i++) {
193 ret = mmc_test_buffer_transfer(test, test->buffer, i * 512, 512, 1); 196 ret = mmc_test_buffer_transfer(test, test->buffer, i, 512, 1);
194 if (ret) 197 if (ret)
195 return ret; 198 return ret;
196 } 199 }
@@ -219,7 +222,7 @@ static int mmc_test_cleanup(struct mmc_test_card *test)
219 memset(test->buffer, 0, 512); 222 memset(test->buffer, 0, 512);
220 223
221 for (i = 0;i < BUFFER_SIZE / 512;i++) { 224 for (i = 0;i < BUFFER_SIZE / 512;i++) {
222 ret = mmc_test_buffer_transfer(test, test->buffer, i * 512, 512, 1); 225 ret = mmc_test_buffer_transfer(test, test->buffer, i, 512, 1);
223 if (ret) 226 if (ret)
224 return ret; 227 return ret;
225 } 228 }
@@ -426,7 +429,7 @@ static int mmc_test_transfer(struct mmc_test_card *test,
426 for (i = 0;i < sectors;i++) { 429 for (i = 0;i < sectors;i++) {
427 ret = mmc_test_buffer_transfer(test, 430 ret = mmc_test_buffer_transfer(test,
428 test->buffer + i * 512, 431 test->buffer + i * 512,
429 dev_addr + i * 512, 512, 0); 432 dev_addr + i, 512, 0);
430 if (ret) 433 if (ret)
431 return ret; 434 return ret;
432 } 435 }
diff --git a/drivers/mmc/card/queue.c b/drivers/mmc/card/queue.c
index 49e582356c65..c5a7a855f4b1 100644
--- a/drivers/mmc/card/queue.c
+++ b/drivers/mmc/card/queue.c
@@ -90,9 +90,10 @@ static void mmc_request(struct request_queue *q)
90 struct request *req; 90 struct request *req;
91 91
92 if (!mq) { 92 if (!mq) {
93 printk(KERN_ERR "MMC: killing requests for dead queue\n"); 93 while ((req = blk_fetch_request(q)) != NULL) {
94 while ((req = blk_fetch_request(q)) != NULL) 94 req->cmd_flags |= REQ_QUIET;
95 __blk_end_request_all(req, -EIO); 95 __blk_end_request_all(req, -EIO);
96 }
96 return; 97 return;
97 } 98 }
98 99
@@ -223,17 +224,18 @@ void mmc_cleanup_queue(struct mmc_queue *mq)
223 struct request_queue *q = mq->queue; 224 struct request_queue *q = mq->queue;
224 unsigned long flags; 225 unsigned long flags;
225 226
226 /* Mark that we should start throwing out stragglers */
227 spin_lock_irqsave(q->queue_lock, flags);
228 q->queuedata = NULL;
229 spin_unlock_irqrestore(q->queue_lock, flags);
230
231 /* Make sure the queue isn't suspended, as that will deadlock */ 227 /* Make sure the queue isn't suspended, as that will deadlock */
232 mmc_queue_resume(mq); 228 mmc_queue_resume(mq);
233 229
234 /* Then terminate our worker thread */ 230 /* Then terminate our worker thread */
235 kthread_stop(mq->thread); 231 kthread_stop(mq->thread);
236 232
233 /* Empty the queue */
234 spin_lock_irqsave(q->queue_lock, flags);
235 q->queuedata = NULL;
236 blk_start_queue(q);
237 spin_unlock_irqrestore(q->queue_lock, flags);
238
237 if (mq->bounce_sg) 239 if (mq->bounce_sg)
238 kfree(mq->bounce_sg); 240 kfree(mq->bounce_sg);
239 mq->bounce_sg = NULL; 241 mq->bounce_sg = NULL;
@@ -245,8 +247,6 @@ void mmc_cleanup_queue(struct mmc_queue *mq)
245 kfree(mq->bounce_buf); 247 kfree(mq->bounce_buf);
246 mq->bounce_buf = NULL; 248 mq->bounce_buf = NULL;
247 249
248 blk_cleanup_queue(mq->queue);
249
250 mq->card = NULL; 250 mq->card = NULL;
251} 251}
252EXPORT_SYMBOL(mmc_cleanup_queue); 252EXPORT_SYMBOL(mmc_cleanup_queue);
diff --git a/drivers/mmc/core/mmc.c b/drivers/mmc/core/mmc.c
index c11189446a1f..0eac6c814904 100644
--- a/drivers/mmc/core/mmc.c
+++ b/drivers/mmc/core/mmc.c
@@ -207,7 +207,7 @@ static int mmc_read_ext_csd(struct mmc_card *card)
207 } 207 }
208 208
209 card->ext_csd.rev = ext_csd[EXT_CSD_REV]; 209 card->ext_csd.rev = ext_csd[EXT_CSD_REV];
210 if (card->ext_csd.rev > 3) { 210 if (card->ext_csd.rev > 5) {
211 printk(KERN_ERR "%s: unrecognised EXT_CSD structure " 211 printk(KERN_ERR "%s: unrecognised EXT_CSD structure "
212 "version %d\n", mmc_hostname(card->host), 212 "version %d\n", mmc_hostname(card->host),
213 card->ext_csd.rev); 213 card->ext_csd.rev);
diff --git a/drivers/mmc/core/sdio.c b/drivers/mmc/core/sdio.c
index cdb845b68ab5..06b64085a355 100644
--- a/drivers/mmc/core/sdio.c
+++ b/drivers/mmc/core/sdio.c
@@ -516,7 +516,8 @@ int mmc_attach_sdio(struct mmc_host *host, u32 ocr)
516 * The number of functions on the card is encoded inside 516 * The number of functions on the card is encoded inside
517 * the ocr. 517 * the ocr.
518 */ 518 */
519 card->sdio_funcs = funcs = (ocr & 0x70000000) >> 28; 519 funcs = (ocr & 0x70000000) >> 28;
520 card->sdio_funcs = 0;
520 521
521 /* 522 /*
522 * If needed, disconnect card detection pull-up resistor. 523 * If needed, disconnect card detection pull-up resistor.
@@ -528,7 +529,7 @@ int mmc_attach_sdio(struct mmc_host *host, u32 ocr)
528 /* 529 /*
529 * Initialize (but don't add) all present functions. 530 * Initialize (but don't add) all present functions.
530 */ 531 */
531 for (i = 0;i < funcs;i++) { 532 for (i = 0; i < funcs; i++, card->sdio_funcs++) {
532 err = sdio_init_func(host->card, i + 1); 533 err = sdio_init_func(host->card, i + 1);
533 if (err) 534 if (err)
534 goto remove; 535 goto remove;
diff --git a/drivers/mmc/core/sdio_bus.c b/drivers/mmc/core/sdio_bus.c
index d37464e296a5..9e060c87e64d 100644
--- a/drivers/mmc/core/sdio_bus.c
+++ b/drivers/mmc/core/sdio_bus.c
@@ -248,12 +248,15 @@ int sdio_add_func(struct sdio_func *func)
248/* 248/*
249 * Unregister a SDIO function with the driver model, and 249 * Unregister a SDIO function with the driver model, and
250 * (eventually) free it. 250 * (eventually) free it.
251 * This function can be called through error paths where sdio_add_func() was
252 * never executed (because a failure occurred at an earlier point).
251 */ 253 */
252void sdio_remove_func(struct sdio_func *func) 254void sdio_remove_func(struct sdio_func *func)
253{ 255{
254 if (sdio_func_present(func)) 256 if (!sdio_func_present(func))
255 device_del(&func->dev); 257 return;
256 258
259 device_del(&func->dev);
257 put_device(&func->dev); 260 put_device(&func->dev);
258} 261}
259 262
diff --git a/drivers/mmc/host/Kconfig b/drivers/mmc/host/Kconfig
index 9d405b181781..ce1d28884e29 100644
--- a/drivers/mmc/host/Kconfig
+++ b/drivers/mmc/host/Kconfig
@@ -44,6 +44,19 @@ config MMC_SDHCI_IO_ACCESSORS
44 This is silent Kconfig symbol that is selected by the drivers that 44 This is silent Kconfig symbol that is selected by the drivers that
45 need to overwrite SDHCI IO memory accessors. 45 need to overwrite SDHCI IO memory accessors.
46 46
47config MMC_SDHCI_BIG_ENDIAN_32BIT_BYTE_SWAPPER
48 bool
49 select MMC_SDHCI_IO_ACCESSORS
50 help
51 This option is selected by drivers running on big endian hosts
52 and performing I/O to a SDHCI controller through a bus that
53 implements a hardware byte swapper using a 32-bit datum.
54 This endian mapping mode is called "data invariance" and
55 has the effect of scrambling the addresses and formats of data
56 accessed in sizes other than the datum size.
57
58 This is the case for the Freescale eSDHC and Nintendo Wii SDHCI.
59
47config MMC_SDHCI_PCI 60config MMC_SDHCI_PCI
48 tristate "SDHCI support on PCI bus" 61 tristate "SDHCI support on PCI bus"
49 depends on MMC_SDHCI && PCI 62 depends on MMC_SDHCI && PCI
@@ -75,11 +88,29 @@ config MMC_RICOH_MMC
75config MMC_SDHCI_OF 88config MMC_SDHCI_OF
76 tristate "SDHCI support on OpenFirmware platforms" 89 tristate "SDHCI support on OpenFirmware platforms"
77 depends on MMC_SDHCI && PPC_OF 90 depends on MMC_SDHCI && PPC_OF
78 select MMC_SDHCI_IO_ACCESSORS
79 help 91 help
80 This selects the OF support for Secure Digital Host Controller 92 This selects the OF support for Secure Digital Host Controller
81 Interfaces. So far, only the Freescale eSDHC controller is known 93 Interfaces.
82 to exist on OF platforms. 94
95 If unsure, say N.
96
97config MMC_SDHCI_OF_ESDHC
98 bool "SDHCI OF support for the Freescale eSDHC controller"
99 depends on MMC_SDHCI_OF
100 select MMC_SDHCI_BIG_ENDIAN_32BIT_BYTE_SWAPPER
101 help
102 This selects the Freescale eSDHC controller support.
103
104 If unsure, say N.
105
106config MMC_SDHCI_OF_HLWD
107 bool "SDHCI OF support for the Nintendo Wii SDHCI controllers"
108 depends on MMC_SDHCI_OF
109 select MMC_SDHCI_BIG_ENDIAN_32BIT_BYTE_SWAPPER
110 help
111 This selects the Secure Digital Host Controller Interface (SDHCI)
112 found in the "Hollywood" chipset of the Nintendo Wii video game
113 console.
83 114
84 If unsure, say N. 115 If unsure, say N.
85 116
diff --git a/drivers/mmc/host/Makefile b/drivers/mmc/host/Makefile
index ded4d8cdd9d7..3d253dd4240f 100644
--- a/drivers/mmc/host/Makefile
+++ b/drivers/mmc/host/Makefile
@@ -13,7 +13,6 @@ obj-$(CONFIG_MMC_MXC) += mxcmmc.o
13obj-$(CONFIG_MMC_SDHCI) += sdhci.o 13obj-$(CONFIG_MMC_SDHCI) += sdhci.o
14obj-$(CONFIG_MMC_SDHCI_PCI) += sdhci-pci.o 14obj-$(CONFIG_MMC_SDHCI_PCI) += sdhci-pci.o
15obj-$(CONFIG_MMC_RICOH_MMC) += ricoh_mmc.o 15obj-$(CONFIG_MMC_RICOH_MMC) += ricoh_mmc.o
16obj-$(CONFIG_MMC_SDHCI_OF) += sdhci-of.o
17obj-$(CONFIG_MMC_SDHCI_PLTFM) += sdhci-pltfm.o 16obj-$(CONFIG_MMC_SDHCI_PLTFM) += sdhci-pltfm.o
18obj-$(CONFIG_MMC_SDHCI_S3C) += sdhci-s3c.o 17obj-$(CONFIG_MMC_SDHCI_S3C) += sdhci-s3c.o
19obj-$(CONFIG_MMC_WBSD) += wbsd.o 18obj-$(CONFIG_MMC_WBSD) += wbsd.o
@@ -37,6 +36,11 @@ obj-$(CONFIG_MMC_CB710) += cb710-mmc.o
37obj-$(CONFIG_MMC_VIA_SDMMC) += via-sdmmc.o 36obj-$(CONFIG_MMC_VIA_SDMMC) += via-sdmmc.o
38obj-$(CONFIG_SDH_BFIN) += bfin_sdh.o 37obj-$(CONFIG_SDH_BFIN) += bfin_sdh.o
39 38
39obj-$(CONFIG_MMC_SDHCI_OF) += sdhci-of.o
40sdhci-of-y := sdhci-of-core.o
41sdhci-of-$(CONFIG_MMC_SDHCI_OF_ESDHC) += sdhci-of-esdhc.o
42sdhci-of-$(CONFIG_MMC_SDHCI_OF_HLWD) += sdhci-of-hlwd.o
43
40ifeq ($(CONFIG_CB710_DEBUG),y) 44ifeq ($(CONFIG_CB710_DEBUG),y)
41 CFLAGS-cb710-mmc += -DDEBUG 45 CFLAGS-cb710-mmc += -DDEBUG
42endif 46endif
diff --git a/drivers/mmc/host/sdhci-of.c b/drivers/mmc/host/sdhci-of-core.c
index 01ab916c2802..55e33135edb4 100644
--- a/drivers/mmc/host/sdhci-of.c
+++ b/drivers/mmc/host/sdhci-of-core.c
@@ -22,62 +22,37 @@
22#include <linux/of_platform.h> 22#include <linux/of_platform.h>
23#include <linux/mmc/host.h> 23#include <linux/mmc/host.h>
24#include <asm/machdep.h> 24#include <asm/machdep.h>
25#include "sdhci-of.h"
25#include "sdhci.h" 26#include "sdhci.h"
26 27
27struct sdhci_of_data { 28#ifdef CONFIG_MMC_SDHCI_BIG_ENDIAN_32BIT_BYTE_SWAPPER
28 unsigned int quirks;
29 struct sdhci_ops ops;
30};
31
32struct sdhci_of_host {
33 unsigned int clock;
34 u16 xfer_mode_shadow;
35};
36 29
37/* 30/*
38 * Ops and quirks for the Freescale eSDHC controller. 31 * These accessors are designed for big endian hosts doing I/O to
32 * little endian controllers incorporating a 32-bit hardware byte swapper.
39 */ 33 */
40 34
41#define ESDHC_DMA_SYSCTL 0x40c 35u32 sdhci_be32bs_readl(struct sdhci_host *host, int reg)
42#define ESDHC_DMA_SNOOP 0x00000040
43
44#define ESDHC_SYSTEM_CONTROL 0x2c
45#define ESDHC_CLOCK_MASK 0x0000fff0
46#define ESDHC_PREDIV_SHIFT 8
47#define ESDHC_DIVIDER_SHIFT 4
48#define ESDHC_CLOCK_PEREN 0x00000004
49#define ESDHC_CLOCK_HCKEN 0x00000002
50#define ESDHC_CLOCK_IPGEN 0x00000001
51
52#define ESDHC_HOST_CONTROL_RES 0x05
53
54static u32 esdhc_readl(struct sdhci_host *host, int reg)
55{ 36{
56 return in_be32(host->ioaddr + reg); 37 return in_be32(host->ioaddr + reg);
57} 38}
58 39
59static u16 esdhc_readw(struct sdhci_host *host, int reg) 40u16 sdhci_be32bs_readw(struct sdhci_host *host, int reg)
60{ 41{
61 u16 ret; 42 return in_be16(host->ioaddr + (reg ^ 0x2));
62
63 if (unlikely(reg == SDHCI_HOST_VERSION))
64 ret = in_be16(host->ioaddr + reg);
65 else
66 ret = in_be16(host->ioaddr + (reg ^ 0x2));
67 return ret;
68} 43}
69 44
70static u8 esdhc_readb(struct sdhci_host *host, int reg) 45u8 sdhci_be32bs_readb(struct sdhci_host *host, int reg)
71{ 46{
72 return in_8(host->ioaddr + (reg ^ 0x3)); 47 return in_8(host->ioaddr + (reg ^ 0x3));
73} 48}
74 49
75static void esdhc_writel(struct sdhci_host *host, u32 val, int reg) 50void sdhci_be32bs_writel(struct sdhci_host *host, u32 val, int reg)
76{ 51{
77 out_be32(host->ioaddr + reg, val); 52 out_be32(host->ioaddr + reg, val);
78} 53}
79 54
80static void esdhc_writew(struct sdhci_host *host, u16 val, int reg) 55void sdhci_be32bs_writew(struct sdhci_host *host, u16 val, int reg)
81{ 56{
82 struct sdhci_of_host *of_host = sdhci_priv(host); 57 struct sdhci_of_host *of_host = sdhci_priv(host);
83 int base = reg & ~0x3; 58 int base = reg & ~0x3;
@@ -92,106 +67,21 @@ static void esdhc_writew(struct sdhci_host *host, u16 val, int reg)
92 of_host->xfer_mode_shadow = val; 67 of_host->xfer_mode_shadow = val;
93 return; 68 return;
94 case SDHCI_COMMAND: 69 case SDHCI_COMMAND:
95 esdhc_writel(host, val << 16 | of_host->xfer_mode_shadow, 70 sdhci_be32bs_writel(host, val << 16 | of_host->xfer_mode_shadow,
96 SDHCI_TRANSFER_MODE); 71 SDHCI_TRANSFER_MODE);
97 return; 72 return;
98 case SDHCI_BLOCK_SIZE:
99 /*
100 * Two last DMA bits are reserved, and first one is used for
101 * non-standard blksz of 4096 bytes that we don't support
102 * yet. So clear the DMA boundary bits.
103 */
104 val &= ~SDHCI_MAKE_BLKSZ(0x7, 0);
105 /* fall through */
106 } 73 }
107 clrsetbits_be32(host->ioaddr + base, 0xffff << shift, val << shift); 74 clrsetbits_be32(host->ioaddr + base, 0xffff << shift, val << shift);
108} 75}
109 76
110static void esdhc_writeb(struct sdhci_host *host, u8 val, int reg) 77void sdhci_be32bs_writeb(struct sdhci_host *host, u8 val, int reg)
111{ 78{
112 int base = reg & ~0x3; 79 int base = reg & ~0x3;
113 int shift = (reg & 0x3) * 8; 80 int shift = (reg & 0x3) * 8;
114 81
115 /* Prevent SDHCI core from writing reserved bits (e.g. HISPD). */
116 if (reg == SDHCI_HOST_CONTROL)
117 val &= ~ESDHC_HOST_CONTROL_RES;
118
119 clrsetbits_be32(host->ioaddr + base , 0xff << shift, val << shift); 82 clrsetbits_be32(host->ioaddr + base , 0xff << shift, val << shift);
120} 83}
121 84#endif /* CONFIG_MMC_SDHCI_BIG_ENDIAN_32BIT_BYTE_SWAPPER */
122static void esdhc_set_clock(struct sdhci_host *host, unsigned int clock)
123{
124 int pre_div = 2;
125 int div = 1;
126
127 clrbits32(host->ioaddr + ESDHC_SYSTEM_CONTROL, ESDHC_CLOCK_IPGEN |
128 ESDHC_CLOCK_HCKEN | ESDHC_CLOCK_PEREN | ESDHC_CLOCK_MASK);
129
130 if (clock == 0)
131 goto out;
132
133 while (host->max_clk / pre_div / 16 > clock && pre_div < 256)
134 pre_div *= 2;
135
136 while (host->max_clk / pre_div / div > clock && div < 16)
137 div++;
138
139 dev_dbg(mmc_dev(host->mmc), "desired SD clock: %d, actual: %d\n",
140 clock, host->max_clk / pre_div / div);
141
142 pre_div >>= 1;
143 div--;
144
145 setbits32(host->ioaddr + ESDHC_SYSTEM_CONTROL, ESDHC_CLOCK_IPGEN |
146 ESDHC_CLOCK_HCKEN | ESDHC_CLOCK_PEREN |
147 div << ESDHC_DIVIDER_SHIFT | pre_div << ESDHC_PREDIV_SHIFT);
148 mdelay(100);
149out:
150 host->clock = clock;
151}
152
153static int esdhc_enable_dma(struct sdhci_host *host)
154{
155 setbits32(host->ioaddr + ESDHC_DMA_SYSCTL, ESDHC_DMA_SNOOP);
156 return 0;
157}
158
159static unsigned int esdhc_get_max_clock(struct sdhci_host *host)
160{
161 struct sdhci_of_host *of_host = sdhci_priv(host);
162
163 return of_host->clock;
164}
165
166static unsigned int esdhc_get_min_clock(struct sdhci_host *host)
167{
168 struct sdhci_of_host *of_host = sdhci_priv(host);
169
170 return of_host->clock / 256 / 16;
171}
172
173static struct sdhci_of_data sdhci_esdhc = {
174 .quirks = SDHCI_QUIRK_FORCE_BLK_SZ_2048 |
175 SDHCI_QUIRK_BROKEN_CARD_DETECTION |
176 SDHCI_QUIRK_NO_BUSY_IRQ |
177 SDHCI_QUIRK_NONSTANDARD_CLOCK |
178 SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK |
179 SDHCI_QUIRK_PIO_NEEDS_DELAY |
180 SDHCI_QUIRK_RESTORE_IRQS_AFTER_RESET |
181 SDHCI_QUIRK_NO_CARD_NO_RESET,
182 .ops = {
183 .readl = esdhc_readl,
184 .readw = esdhc_readw,
185 .readb = esdhc_readb,
186 .writel = esdhc_writel,
187 .writew = esdhc_writew,
188 .writeb = esdhc_writeb,
189 .set_clock = esdhc_set_clock,
190 .enable_dma = esdhc_enable_dma,
191 .get_max_clock = esdhc_get_max_clock,
192 .get_min_clock = esdhc_get_min_clock,
193 },
194};
195 85
196#ifdef CONFIG_PM 86#ifdef CONFIG_PM
197 87
@@ -301,9 +191,14 @@ static int __devexit sdhci_of_remove(struct of_device *ofdev)
301} 191}
302 192
303static const struct of_device_id sdhci_of_match[] = { 193static const struct of_device_id sdhci_of_match[] = {
194#ifdef CONFIG_MMC_SDHCI_OF_ESDHC
304 { .compatible = "fsl,mpc8379-esdhc", .data = &sdhci_esdhc, }, 195 { .compatible = "fsl,mpc8379-esdhc", .data = &sdhci_esdhc, },
305 { .compatible = "fsl,mpc8536-esdhc", .data = &sdhci_esdhc, }, 196 { .compatible = "fsl,mpc8536-esdhc", .data = &sdhci_esdhc, },
306 { .compatible = "fsl,esdhc", .data = &sdhci_esdhc, }, 197 { .compatible = "fsl,esdhc", .data = &sdhci_esdhc, },
198#endif
199#ifdef CONFIG_MMC_SDHCI_OF_HLWD
200 { .compatible = "nintendo,hollywood-sdhci", .data = &sdhci_hlwd, },
201#endif
307 { .compatible = "generic-sdhci", }, 202 { .compatible = "generic-sdhci", },
308 {}, 203 {},
309}; 204};
diff --git a/drivers/mmc/host/sdhci-of-esdhc.c b/drivers/mmc/host/sdhci-of-esdhc.c
new file mode 100644
index 000000000000..d5b11a17e648
--- /dev/null
+++ b/drivers/mmc/host/sdhci-of-esdhc.c
@@ -0,0 +1,143 @@
1/*
2 * Freescale eSDHC controller driver.
3 *
4 * Copyright (c) 2007 Freescale Semiconductor, Inc.
5 * Copyright (c) 2009 MontaVista Software, Inc.
6 *
7 * Authors: Xiaobo Xie <X.Xie@freescale.com>
8 * Anton Vorontsov <avorontsov@ru.mvista.com>
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or (at
13 * your option) any later version.
14 */
15
16#include <linux/io.h>
17#include <linux/delay.h>
18#include <linux/mmc/host.h>
19#include "sdhci-of.h"
20#include "sdhci.h"
21
22/*
23 * Ops and quirks for the Freescale eSDHC controller.
24 */
25
26#define ESDHC_DMA_SYSCTL 0x40c
27#define ESDHC_DMA_SNOOP 0x00000040
28
29#define ESDHC_SYSTEM_CONTROL 0x2c
30#define ESDHC_CLOCK_MASK 0x0000fff0
31#define ESDHC_PREDIV_SHIFT 8
32#define ESDHC_DIVIDER_SHIFT 4
33#define ESDHC_CLOCK_PEREN 0x00000004
34#define ESDHC_CLOCK_HCKEN 0x00000002
35#define ESDHC_CLOCK_IPGEN 0x00000001
36
37#define ESDHC_HOST_CONTROL_RES 0x05
38
39static u16 esdhc_readw(struct sdhci_host *host, int reg)
40{
41 u16 ret;
42
43 if (unlikely(reg == SDHCI_HOST_VERSION))
44 ret = in_be16(host->ioaddr + reg);
45 else
46 ret = sdhci_be32bs_readw(host, reg);
47 return ret;
48}
49
50static void esdhc_writew(struct sdhci_host *host, u16 val, int reg)
51{
52 if (reg == SDHCI_BLOCK_SIZE) {
53 /*
54 * Two last DMA bits are reserved, and first one is used for
55 * non-standard blksz of 4096 bytes that we don't support
56 * yet. So clear the DMA boundary bits.
57 */
58 val &= ~SDHCI_MAKE_BLKSZ(0x7, 0);
59 }
60 sdhci_be32bs_writew(host, val, reg);
61}
62
63static void esdhc_writeb(struct sdhci_host *host, u8 val, int reg)
64{
65 /* Prevent SDHCI core from writing reserved bits (e.g. HISPD). */
66 if (reg == SDHCI_HOST_CONTROL)
67 val &= ~ESDHC_HOST_CONTROL_RES;
68 sdhci_be32bs_writeb(host, val, reg);
69}
70
71static void esdhc_set_clock(struct sdhci_host *host, unsigned int clock)
72{
73 int pre_div = 2;
74 int div = 1;
75
76 clrbits32(host->ioaddr + ESDHC_SYSTEM_CONTROL, ESDHC_CLOCK_IPGEN |
77 ESDHC_CLOCK_HCKEN | ESDHC_CLOCK_PEREN | ESDHC_CLOCK_MASK);
78
79 if (clock == 0)
80 goto out;
81
82 while (host->max_clk / pre_div / 16 > clock && pre_div < 256)
83 pre_div *= 2;
84
85 while (host->max_clk / pre_div / div > clock && div < 16)
86 div++;
87
88 dev_dbg(mmc_dev(host->mmc), "desired SD clock: %d, actual: %d\n",
89 clock, host->max_clk / pre_div / div);
90
91 pre_div >>= 1;
92 div--;
93
94 setbits32(host->ioaddr + ESDHC_SYSTEM_CONTROL, ESDHC_CLOCK_IPGEN |
95 ESDHC_CLOCK_HCKEN | ESDHC_CLOCK_PEREN |
96 div << ESDHC_DIVIDER_SHIFT | pre_div << ESDHC_PREDIV_SHIFT);
97 mdelay(100);
98out:
99 host->clock = clock;
100}
101
102static int esdhc_enable_dma(struct sdhci_host *host)
103{
104 setbits32(host->ioaddr + ESDHC_DMA_SYSCTL, ESDHC_DMA_SNOOP);
105 return 0;
106}
107
108static unsigned int esdhc_get_max_clock(struct sdhci_host *host)
109{
110 struct sdhci_of_host *of_host = sdhci_priv(host);
111
112 return of_host->clock;
113}
114
115static unsigned int esdhc_get_min_clock(struct sdhci_host *host)
116{
117 struct sdhci_of_host *of_host = sdhci_priv(host);
118
119 return of_host->clock / 256 / 16;
120}
121
122struct sdhci_of_data sdhci_esdhc = {
123 .quirks = SDHCI_QUIRK_FORCE_BLK_SZ_2048 |
124 SDHCI_QUIRK_BROKEN_CARD_DETECTION |
125 SDHCI_QUIRK_NO_BUSY_IRQ |
126 SDHCI_QUIRK_NONSTANDARD_CLOCK |
127 SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK |
128 SDHCI_QUIRK_PIO_NEEDS_DELAY |
129 SDHCI_QUIRK_RESTORE_IRQS_AFTER_RESET |
130 SDHCI_QUIRK_NO_CARD_NO_RESET,
131 .ops = {
132 .readl = sdhci_be32bs_readl,
133 .readw = esdhc_readw,
134 .readb = sdhci_be32bs_readb,
135 .writel = sdhci_be32bs_writel,
136 .writew = esdhc_writew,
137 .writeb = esdhc_writeb,
138 .set_clock = esdhc_set_clock,
139 .enable_dma = esdhc_enable_dma,
140 .get_max_clock = esdhc_get_max_clock,
141 .get_min_clock = esdhc_get_min_clock,
142 },
143};
diff --git a/drivers/mmc/host/sdhci-of-hlwd.c b/drivers/mmc/host/sdhci-of-hlwd.c
new file mode 100644
index 000000000000..35117f3ed757
--- /dev/null
+++ b/drivers/mmc/host/sdhci-of-hlwd.c
@@ -0,0 +1,65 @@
1/*
2 * drivers/mmc/host/sdhci-of-hlwd.c
3 *
4 * Nintendo Wii Secure Digital Host Controller Interface.
5 * Copyright (C) 2009 The GameCube Linux Team
6 * Copyright (C) 2009 Albert Herranz
7 *
8 * Based on sdhci-of-esdhc.c
9 *
10 * Copyright (c) 2007 Freescale Semiconductor, Inc.
11 * Copyright (c) 2009 MontaVista Software, Inc.
12 *
13 * Authors: Xiaobo Xie <X.Xie@freescale.com>
14 * Anton Vorontsov <avorontsov@ru.mvista.com>
15 *
16 * This program is free software; you can redistribute it and/or modify
17 * it under the terms of the GNU General Public License as published by
18 * the Free Software Foundation; either version 2 of the License, or (at
19 * your option) any later version.
20 */
21
22#include <linux/delay.h>
23#include <linux/mmc/host.h>
24#include "sdhci-of.h"
25#include "sdhci.h"
26
27/*
28 * Ops and quirks for the Nintendo Wii SDHCI controllers.
29 */
30
31/*
32 * We need a small delay after each write, or things go horribly wrong.
33 */
34#define SDHCI_HLWD_WRITE_DELAY 5 /* usecs */
35
36static void sdhci_hlwd_writel(struct sdhci_host *host, u32 val, int reg)
37{
38 sdhci_be32bs_writel(host, val, reg);
39 udelay(SDHCI_HLWD_WRITE_DELAY);
40}
41
42static void sdhci_hlwd_writew(struct sdhci_host *host, u16 val, int reg)
43{
44 sdhci_be32bs_writew(host, val, reg);
45 udelay(SDHCI_HLWD_WRITE_DELAY);
46}
47
48static void sdhci_hlwd_writeb(struct sdhci_host *host, u8 val, int reg)
49{
50 sdhci_be32bs_writeb(host, val, reg);
51 udelay(SDHCI_HLWD_WRITE_DELAY);
52}
53
54struct sdhci_of_data sdhci_hlwd = {
55 .quirks = SDHCI_QUIRK_32BIT_DMA_ADDR |
56 SDHCI_QUIRK_32BIT_DMA_SIZE,
57 .ops = {
58 .readl = sdhci_be32bs_readl,
59 .readw = sdhci_be32bs_readw,
60 .readb = sdhci_be32bs_readb,
61 .writel = sdhci_hlwd_writel,
62 .writew = sdhci_hlwd_writew,
63 .writeb = sdhci_hlwd_writeb,
64 },
65};
diff --git a/drivers/mmc/host/sdhci-of.h b/drivers/mmc/host/sdhci-of.h
new file mode 100644
index 000000000000..ad09ad9915d8
--- /dev/null
+++ b/drivers/mmc/host/sdhci-of.h
@@ -0,0 +1,42 @@
1/*
2 * OpenFirmware bindings for Secure Digital Host Controller Interface.
3 *
4 * Copyright (c) 2007 Freescale Semiconductor, Inc.
5 * Copyright (c) 2009 MontaVista Software, Inc.
6 *
7 * Authors: Xiaobo Xie <X.Xie@freescale.com>
8 * Anton Vorontsov <avorontsov@ru.mvista.com>
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or (at
13 * your option) any later version.
14 */
15
16#ifndef __SDHCI_OF_H
17#define __SDHCI_OF_H
18
19#include <linux/types.h>
20#include "sdhci.h"
21
22struct sdhci_of_data {
23 unsigned int quirks;
24 struct sdhci_ops ops;
25};
26
27struct sdhci_of_host {
28 unsigned int clock;
29 u16 xfer_mode_shadow;
30};
31
32extern u32 sdhci_be32bs_readl(struct sdhci_host *host, int reg);
33extern u16 sdhci_be32bs_readw(struct sdhci_host *host, int reg);
34extern u8 sdhci_be32bs_readb(struct sdhci_host *host, int reg);
35extern void sdhci_be32bs_writel(struct sdhci_host *host, u32 val, int reg);
36extern void sdhci_be32bs_writew(struct sdhci_host *host, u16 val, int reg);
37extern void sdhci_be32bs_writeb(struct sdhci_host *host, u8 val, int reg);
38
39extern struct sdhci_of_data sdhci_esdhc;
40extern struct sdhci_of_data sdhci_hlwd;
41
42#endif /* __SDHCI_OF_H */
diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h
index ce5f1d73dc04..842f46f94284 100644
--- a/drivers/mmc/host/sdhci.h
+++ b/drivers/mmc/host/sdhci.h
@@ -8,6 +8,8 @@
8 * the Free Software Foundation; either version 2 of the License, or (at 8 * the Free Software Foundation; either version 2 of the License, or (at
9 * your option) any later version. 9 * your option) any later version.
10 */ 10 */
11#ifndef __SDHCI_H
12#define __SDHCI_H
11 13
12#include <linux/scatterlist.h> 14#include <linux/scatterlist.h>
13#include <linux/compiler.h> 15#include <linux/compiler.h>
@@ -408,3 +410,5 @@ extern void sdhci_remove_host(struct sdhci_host *host, int dead);
408extern int sdhci_suspend_host(struct sdhci_host *host, pm_message_t state); 410extern int sdhci_suspend_host(struct sdhci_host *host, pm_message_t state);
409extern int sdhci_resume_host(struct sdhci_host *host); 411extern int sdhci_resume_host(struct sdhci_host *host);
410#endif 412#endif
413
414#endif /* __SDHCI_H */
diff --git a/drivers/mmc/host/tmio_mmc.c b/drivers/mmc/host/tmio_mmc.c
index 7cccc8523747..e22c3fa3516a 100644
--- a/drivers/mmc/host/tmio_mmc.c
+++ b/drivers/mmc/host/tmio_mmc.c
@@ -46,7 +46,9 @@ static void tmio_mmc_set_clock(struct tmio_mmc_host *host, int new_clock)
46 clk |= 0x100; 46 clk |= 0x100;
47 } 47 }
48 48
49 sd_config_write8(host, CNF_SD_CLK_MODE, clk >> 22); 49 if (host->set_clk_div)
50 host->set_clk_div(host->pdev, (clk>>22) & 1);
51
50 sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, clk & 0x1ff); 52 sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, clk & 0x1ff);
51} 53}
52 54
@@ -427,12 +429,13 @@ static void tmio_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
427 /* Power sequence - OFF -> ON -> UP */ 429 /* Power sequence - OFF -> ON -> UP */
428 switch (ios->power_mode) { 430 switch (ios->power_mode) {
429 case MMC_POWER_OFF: /* power down SD bus */ 431 case MMC_POWER_OFF: /* power down SD bus */
430 sd_config_write8(host, CNF_PWR_CTL_2, 0x00); 432 if (host->set_pwr)
433 host->set_pwr(host->pdev, 0);
431 tmio_mmc_clk_stop(host); 434 tmio_mmc_clk_stop(host);
432 break; 435 break;
433 case MMC_POWER_ON: /* power up SD bus */ 436 case MMC_POWER_ON: /* power up SD bus */
434 437 if (host->set_pwr)
435 sd_config_write8(host, CNF_PWR_CTL_2, 0x02); 438 host->set_pwr(host->pdev, 1);
436 break; 439 break;
437 case MMC_POWER_UP: /* start bus clock */ 440 case MMC_POWER_UP: /* start bus clock */
438 tmio_mmc_clk_start(host); 441 tmio_mmc_clk_start(host);
@@ -485,21 +488,15 @@ static int tmio_mmc_resume(struct platform_device *dev)
485{ 488{
486 struct mfd_cell *cell = (struct mfd_cell *)dev->dev.platform_data; 489 struct mfd_cell *cell = (struct mfd_cell *)dev->dev.platform_data;
487 struct mmc_host *mmc = platform_get_drvdata(dev); 490 struct mmc_host *mmc = platform_get_drvdata(dev);
488 struct tmio_mmc_host *host = mmc_priv(mmc);
489 int ret = 0; 491 int ret = 0;
490 492
491 /* Tell the MFD core we are ready to be enabled */ 493 /* Tell the MFD core we are ready to be enabled */
492 if (cell->enable) { 494 if (cell->resume) {
493 ret = cell->enable(dev); 495 ret = cell->resume(dev);
494 if (ret) 496 if (ret)
495 goto out; 497 goto out;
496 } 498 }
497 499
498 /* Enable the MMC/SD Control registers */
499 sd_config_write16(host, CNF_CMD, SDCREN);
500 sd_config_write32(host, CNF_CTL_BASE,
501 (dev->resource[0].start >> host->bus_shift) & 0xfffe);
502
503 mmc_resume_host(mmc); 500 mmc_resume_host(mmc);
504 501
505out: 502out:
@@ -514,17 +511,16 @@ static int __devinit tmio_mmc_probe(struct platform_device *dev)
514{ 511{
515 struct mfd_cell *cell = (struct mfd_cell *)dev->dev.platform_data; 512 struct mfd_cell *cell = (struct mfd_cell *)dev->dev.platform_data;
516 struct tmio_mmc_data *pdata; 513 struct tmio_mmc_data *pdata;
517 struct resource *res_ctl, *res_cnf; 514 struct resource *res_ctl;
518 struct tmio_mmc_host *host; 515 struct tmio_mmc_host *host;
519 struct mmc_host *mmc; 516 struct mmc_host *mmc;
520 int ret = -EINVAL; 517 int ret = -EINVAL;
521 518
522 if (dev->num_resources != 3) 519 if (dev->num_resources != 2)
523 goto out; 520 goto out;
524 521
525 res_ctl = platform_get_resource(dev, IORESOURCE_MEM, 0); 522 res_ctl = platform_get_resource(dev, IORESOURCE_MEM, 0);
526 res_cnf = platform_get_resource(dev, IORESOURCE_MEM, 1); 523 if (!res_ctl)
527 if (!res_ctl || !res_cnf)
528 goto out; 524 goto out;
529 525
530 pdata = cell->driver_data; 526 pdata = cell->driver_data;
@@ -539,8 +535,12 @@ static int __devinit tmio_mmc_probe(struct platform_device *dev)
539 535
540 host = mmc_priv(mmc); 536 host = mmc_priv(mmc);
541 host->mmc = mmc; 537 host->mmc = mmc;
538 host->pdev = dev;
542 platform_set_drvdata(dev, mmc); 539 platform_set_drvdata(dev, mmc);
543 540
541 host->set_pwr = pdata->set_pwr;
542 host->set_clk_div = pdata->set_clk_div;
543
544 /* SD control register space size is 0x200, 0x400 for bus_shift=1 */ 544 /* SD control register space size is 0x200, 0x400 for bus_shift=1 */
545 host->bus_shift = resource_size(res_ctl) >> 10; 545 host->bus_shift = resource_size(res_ctl) >> 10;
546 546
@@ -548,10 +548,6 @@ static int __devinit tmio_mmc_probe(struct platform_device *dev)
548 if (!host->ctl) 548 if (!host->ctl)
549 goto host_free; 549 goto host_free;
550 550
551 host->cnf = ioremap(res_cnf->start, resource_size(res_cnf));
552 if (!host->cnf)
553 goto unmap_ctl;
554
555 mmc->ops = &tmio_mmc_ops; 551 mmc->ops = &tmio_mmc_ops;
556 mmc->caps = MMC_CAP_4_BIT_DATA; 552 mmc->caps = MMC_CAP_4_BIT_DATA;
557 mmc->f_max = pdata->hclk; 553 mmc->f_max = pdata->hclk;
@@ -562,23 +558,9 @@ static int __devinit tmio_mmc_probe(struct platform_device *dev)
562 if (cell->enable) { 558 if (cell->enable) {
563 ret = cell->enable(dev); 559 ret = cell->enable(dev);
564 if (ret) 560 if (ret)
565 goto unmap_cnf; 561 goto unmap_ctl;
566 } 562 }
567 563
568 /* Enable the MMC/SD Control registers */
569 sd_config_write16(host, CNF_CMD, SDCREN);
570 sd_config_write32(host, CNF_CTL_BASE,
571 (dev->resource[0].start >> host->bus_shift) & 0xfffe);
572
573 /* Disable SD power during suspend */
574 sd_config_write8(host, CNF_PWR_CTL_3, 0x01);
575
576 /* The below is required but why? FIXME */
577 sd_config_write8(host, CNF_STOP_CLK_CTL, 0x1f);
578
579 /* Power down SD bus*/
580 sd_config_write8(host, CNF_PWR_CTL_2, 0x00);
581
582 tmio_mmc_clk_stop(host); 564 tmio_mmc_clk_stop(host);
583 reset(host); 565 reset(host);
584 566
@@ -586,14 +568,14 @@ static int __devinit tmio_mmc_probe(struct platform_device *dev)
586 if (ret >= 0) 568 if (ret >= 0)
587 host->irq = ret; 569 host->irq = ret;
588 else 570 else
589 goto unmap_cnf; 571 goto unmap_ctl;
590 572
591 disable_mmc_irqs(host, TMIO_MASK_ALL); 573 disable_mmc_irqs(host, TMIO_MASK_ALL);
592 574
593 ret = request_irq(host->irq, tmio_mmc_irq, IRQF_DISABLED | 575 ret = request_irq(host->irq, tmio_mmc_irq, IRQF_DISABLED |
594 IRQF_TRIGGER_FALLING, dev_name(&dev->dev), host); 576 IRQF_TRIGGER_FALLING, dev_name(&dev->dev), host);
595 if (ret) 577 if (ret)
596 goto unmap_cnf; 578 goto unmap_ctl;
597 579
598 mmc_add_host(mmc); 580 mmc_add_host(mmc);
599 581
@@ -605,8 +587,6 @@ static int __devinit tmio_mmc_probe(struct platform_device *dev)
605 587
606 return 0; 588 return 0;
607 589
608unmap_cnf:
609 iounmap(host->cnf);
610unmap_ctl: 590unmap_ctl:
611 iounmap(host->ctl); 591 iounmap(host->ctl);
612host_free: 592host_free:
@@ -626,7 +606,6 @@ static int __devexit tmio_mmc_remove(struct platform_device *dev)
626 mmc_remove_host(mmc); 606 mmc_remove_host(mmc);
627 free_irq(host->irq, host); 607 free_irq(host->irq, host);
628 iounmap(host->ctl); 608 iounmap(host->ctl);
629 iounmap(host->cnf);
630 mmc_free_host(mmc); 609 mmc_free_host(mmc);
631 } 610 }
632 611
diff --git a/drivers/mmc/host/tmio_mmc.h b/drivers/mmc/host/tmio_mmc.h
index 9fa998594974..692dc23363b9 100644
--- a/drivers/mmc/host/tmio_mmc.h
+++ b/drivers/mmc/host/tmio_mmc.h
@@ -11,26 +11,6 @@
11 11
12#include <linux/highmem.h> 12#include <linux/highmem.h>
13 13
14#define CNF_CMD 0x04
15#define CNF_CTL_BASE 0x10
16#define CNF_INT_PIN 0x3d
17#define CNF_STOP_CLK_CTL 0x40
18#define CNF_GCLK_CTL 0x41
19#define CNF_SD_CLK_MODE 0x42
20#define CNF_PIN_STATUS 0x44
21#define CNF_PWR_CTL_1 0x48
22#define CNF_PWR_CTL_2 0x49
23#define CNF_PWR_CTL_3 0x4a
24#define CNF_CARD_DETECT_MODE 0x4c
25#define CNF_SD_SLOT 0x50
26#define CNF_EXT_GCLK_CTL_1 0xf0
27#define CNF_EXT_GCLK_CTL_2 0xf1
28#define CNF_EXT_GCLK_CTL_3 0xf9
29#define CNF_SD_LED_EN_1 0xfa
30#define CNF_SD_LED_EN_2 0xfe
31
32#define SDCREN 0x2 /* Enable access to MMC CTL regs. (flag in COMMAND_REG)*/
33
34#define CTL_SD_CMD 0x00 14#define CTL_SD_CMD 0x00
35#define CTL_ARG_REG 0x04 15#define CTL_ARG_REG 0x04
36#define CTL_STOP_INTERNAL_ACTION 0x08 16#define CTL_STOP_INTERNAL_ACTION 0x08
@@ -110,7 +90,6 @@
110 90
111 91
112struct tmio_mmc_host { 92struct tmio_mmc_host {
113 void __iomem *cnf;
114 void __iomem *ctl; 93 void __iomem *ctl;
115 unsigned long bus_shift; 94 unsigned long bus_shift;
116 struct mmc_command *cmd; 95 struct mmc_command *cmd;
@@ -119,10 +98,16 @@ struct tmio_mmc_host {
119 struct mmc_host *mmc; 98 struct mmc_host *mmc;
120 int irq; 99 int irq;
121 100
101 /* Callbacks for clock / power control */
102 void (*set_pwr)(struct platform_device *host, int state);
103 void (*set_clk_div)(struct platform_device *host, int state);
104
122 /* pio related stuff */ 105 /* pio related stuff */
123 struct scatterlist *sg_ptr; 106 struct scatterlist *sg_ptr;
124 unsigned int sg_len; 107 unsigned int sg_len;
125 unsigned int sg_off; 108 unsigned int sg_off;
109
110 struct platform_device *pdev;
126}; 111};
127 112
128#include <linux/io.h> 113#include <linux/io.h>
@@ -163,25 +148,6 @@ static inline void sd_ctrl_write32(struct tmio_mmc_host *host, int addr,
163 writew(val >> 16, host->ctl + ((addr + 2) << host->bus_shift)); 148 writew(val >> 16, host->ctl + ((addr + 2) << host->bus_shift));
164} 149}
165 150
166static inline void sd_config_write8(struct tmio_mmc_host *host, int addr,
167 u8 val)
168{
169 writeb(val, host->cnf + (addr << host->bus_shift));
170}
171
172static inline void sd_config_write16(struct tmio_mmc_host *host, int addr,
173 u16 val)
174{
175 writew(val, host->cnf + (addr << host->bus_shift));
176}
177
178static inline void sd_config_write32(struct tmio_mmc_host *host, int addr,
179 u32 val)
180{
181 writew(val, host->cnf + (addr << host->bus_shift));
182 writew(val >> 16, host->cnf + ((addr + 2) << host->bus_shift));
183}
184
185#include <linux/scatterlist.h> 151#include <linux/scatterlist.h>
186#include <linux/blkdev.h> 152#include <linux/blkdev.h>
187 153
diff --git a/drivers/mtd/maps/Kconfig b/drivers/mtd/maps/Kconfig
index 4c364d44ad59..2de0cc823d60 100644
--- a/drivers/mtd/maps/Kconfig
+++ b/drivers/mtd/maps/Kconfig
@@ -549,4 +549,21 @@ config MTD_VMU
549 To build this as a module select M here, the module will be called 549 To build this as a module select M here, the module will be called
550 vmu-flash. 550 vmu-flash.
551 551
552config MTD_PISMO
553 tristate "MTD discovery driver for PISMO modules"
554 depends on I2C
555 depends on ARCH_VERSATILE
556 help
557 This driver allows for discovery of PISMO modules - see
558 <http://www.pismoworld.org/>. These are small modules containing
559 up to five memory devices (eg, SRAM, flash, DOC) described by an
560 I2C EEPROM.
561
562 This driver does not create any MTD maps itself; instead it
563 creates MTD physmap and MTD SRAM platform devices. If you
564 enable this option, you should consider enabling MTD_PHYSMAP
565 and/or MTD_PLATRAM according to the devices on your module.
566
567 When built as a module, it will be called pismo.ko
568
552endmenu 569endmenu
diff --git a/drivers/mtd/maps/pismo.c b/drivers/mtd/maps/pismo.c
new file mode 100644
index 000000000000..c48cad271f5d
--- /dev/null
+++ b/drivers/mtd/maps/pismo.c
@@ -0,0 +1,320 @@
1/*
2 * PISMO memory driver - http://www.pismoworld.org/
3 *
4 * For ARM Realview and Versatile platforms
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License.
9 */
10#include <linux/init.h>
11#include <linux/module.h>
12#include <linux/i2c.h>
13#include <linux/platform_device.h>
14#include <linux/spinlock.h>
15#include <linux/mutex.h>
16#include <linux/mtd/physmap.h>
17#include <linux/mtd/plat-ram.h>
18#include <linux/mtd/pismo.h>
19
20#define PISMO_NUM_CS 5
21
22struct pismo_cs_block {
23 u8 type;
24 u8 width;
25 __le16 access;
26 __le32 size;
27 u32 reserved[2];
28 char device[32];
29} __packed;
30
31struct pismo_eeprom {
32 struct pismo_cs_block cs[PISMO_NUM_CS];
33 char board[15];
34 u8 sum;
35} __packed;
36
37struct pismo_mem {
38 phys_addr_t base;
39 u32 size;
40 u16 access;
41 u8 width;
42 u8 type;
43};
44
45struct pismo_data {
46 struct i2c_client *client;
47 void (*vpp)(void *, int);
48 void *vpp_data;
49 struct platform_device *dev[PISMO_NUM_CS];
50};
51
52/* FIXME: set_vpp could do with a better calling convention */
53static struct pismo_data *vpp_pismo;
54static DEFINE_MUTEX(pismo_mutex);
55
56static int pismo_setvpp_probe_fix(struct pismo_data *pismo)
57{
58 mutex_lock(&pismo_mutex);
59 if (vpp_pismo) {
60 mutex_unlock(&pismo_mutex);
61 kfree(pismo);
62 return -EBUSY;
63 }
64 vpp_pismo = pismo;
65 mutex_unlock(&pismo_mutex);
66 return 0;
67}
68
69static void pismo_setvpp_remove_fix(struct pismo_data *pismo)
70{
71 mutex_lock(&pismo_mutex);
72 if (vpp_pismo == pismo)
73 vpp_pismo = NULL;
74 mutex_unlock(&pismo_mutex);
75}
76
77static void pismo_set_vpp(struct map_info *map, int on)
78{
79 struct pismo_data *pismo = vpp_pismo;
80
81 pismo->vpp(pismo->vpp_data, on);
82}
83/* end of hack */
84
85
86static unsigned int __devinit pismo_width_to_bytes(unsigned int width)
87{
88 width &= 15;
89 if (width > 2)
90 return 0;
91 return 1 << width;
92}
93
94static int __devinit pismo_eeprom_read(struct i2c_client *client, void *buf,
95 u8 addr, size_t size)
96{
97 int ret;
98 struct i2c_msg msg[] = {
99 {
100 .addr = client->addr,
101 .len = sizeof(addr),
102 .buf = &addr,
103 }, {
104 .addr = client->addr,
105 .flags = I2C_M_RD,
106 .len = size,
107 .buf = buf,
108 },
109 };
110
111 ret = i2c_transfer(client->adapter, msg, ARRAY_SIZE(msg));
112
113 return ret == ARRAY_SIZE(msg) ? size : -EIO;
114}
115
116static int __devinit pismo_add_device(struct pismo_data *pismo, int i,
117 struct pismo_mem *region, const char *name, void *pdata, size_t psize)
118{
119 struct platform_device *dev;
120 struct resource res = { };
121 phys_addr_t base = region.base;
122 int ret;
123
124 if (base == ~0)
125 return -ENXIO;
126
127 res.start = base;
128 res.end = base + region->size - 1;
129 res.flags = IORESOURCE_MEM;
130
131 dev = platform_device_alloc(name, i);
132 if (!dev)
133 return -ENOMEM;
134 dev->dev.parent = &pismo->client->dev;
135
136 do {
137 ret = platform_device_add_resources(dev, &res, 1);
138 if (ret)
139 break;
140
141 ret = platform_device_add_data(dev, pdata, psize);
142 if (ret)
143 break;
144
145 ret = platform_device_add(dev);
146 if (ret)
147 break;
148
149 pismo->dev[i] = dev;
150 return 0;
151 } while (0);
152
153 platform_device_put(dev);
154 return ret;
155}
156
157static int __devinit pismo_add_nor(struct pismo_data *pismo, int i,
158 struct pismo_mem *region)
159{
160 struct physmap_flash_data data = {
161 .width = region->width,
162 };
163
164 if (pismo->vpp)
165 data.set_vpp = pismo_set_vpp;
166
167 return pismo_add_device(pismo, i, region, "physmap-flash",
168 &data, sizeof(data));
169}
170
171static int __devinit pismo_add_sram(struct pismo_data *pismo, int i,
172 struct pismo_mem *region)
173{
174 struct platdata_mtd_ram data = {
175 .bankwidth = region->width,
176 };
177
178 return pismo_add_device(pismo, i, region, "mtd-ram",
179 &data, sizeof(data));
180}
181
182static void __devinit pismo_add_one(struct pismo_data *pismo, int i,
183 const struct pismo_cs_block *cs, phys_addr_t base)
184{
185 struct device *dev = &pismo->client->dev;
186 struct pismo_mem region;
187
188 region.base = base;
189 region.type = cs->type;
190 region.width = pismo_width_to_bytes(cs->width);
191 region.access = le16_to_cpu(cs->access);
192 region.size = le32_to_cpu(cs->size);
193
194 if (region.width == 0) {
195 dev_err(dev, "cs%u: bad width: %02x, ignoring\n", i, cs->width);
196 return;
197 }
198
199 /*
200 * FIXME: may need to the platforms memory controller here, but at
201 * the moment we assume that it has already been correctly setup.
202 * The memory controller can also tell us the base address as well.
203 */
204
205 dev_info(dev, "cs%u: %.32s: type %02x access %u00ps size %uK\n",
206 i, cs->device, region.type, region.access, region.size / 1024);
207
208 switch (region.type) {
209 case 0:
210 break;
211 case 1:
212 /* static DOC */
213 break;
214 case 2:
215 /* static NOR */
216 pismo_add_nor(pismo, i, &region);
217 break;
218 case 3:
219 /* static RAM */
220 pismo_add_sram(pismo, i, &region);
221 break;
222 }
223}
224
225static int __devexit pismo_remove(struct i2c_client *client)
226{
227 struct pismo_data *pismo = i2c_get_clientdata(client);
228 int i;
229
230 for (i = 0; i < ARRAY_SIZE(pismo->dev); i++)
231 platform_device_unregister(pismo->dev[i]);
232
233 /* FIXME: set_vpp needs saner arguments */
234 pismo_setvpp_remove_fix(pismo);
235
236 kfree(pismo);
237
238 return 0;
239}
240
241static int __devinit pismo_probe(struct i2c_client *client,
242 const struct i2c_device_id *id)
243{
244 struct i2c_adapter *adapter = to_i2c_adapter(client->dev.parent);
245 struct pismo_pdata *pdata = client->dev.platform_data;
246 struct pismo_eeprom eeprom;
247 struct pismo_data *pismo;
248 int ret, i;
249
250 if (!i2c_check_functionality(adapter, I2C_FUNC_I2C)) {
251 dev_err(&client->dev, "functionality mismatch\n");
252 return -EIO;
253 }
254
255 pismo = kzalloc(sizeof(*pismo), GFP_KERNEL);
256 if (!pismo)
257 return -ENOMEM;
258
259 /* FIXME: set_vpp needs saner arguments */
260 ret = pismo_setvpp_probe_fix(pismo);
261 if (ret)
262 return ret;
263
264 pismo->client = client;
265 if (pdata) {
266 pismo->vpp = pdata->set_vpp;
267 pismo->vpp_data = pdata->vpp_data;
268 }
269 i2c_set_clientdata(client, pismo);
270
271 ret = pismo_eeprom_read(client, &eeprom, 0, sizeof(eeprom));
272 if (ret < 0) {
273 dev_err(&client->dev, "error reading EEPROM: %d\n", ret);
274 return ret;
275 }
276
277 dev_info(&client->dev, "%.15s board found\n", eeprom.board);
278
279 for (i = 0; i < ARRAY_SIZE(eeprom.cs); i++)
280 if (eeprom.cs[i].type != 0xff)
281 pismo_add_one(pismo, i, &eeprom.cs[i],
282 pdata->cs_addrs[i]);
283
284 return 0;
285}
286
287static const struct i2c_device_id pismo_id[] = {
288 { "pismo" },
289 { },
290};
291MODULE_DEVICE_TABLE(i2c, pismo_id);
292
293static struct i2c_driver pismo_driver = {
294 .driver = {
295 .name = "pismo",
296 .owner = THIS_MODULE,
297 },
298 .probe = pismo_probe,
299 .remove = __devexit_p(pismo_remove),
300 .id_table = pismo_id,
301};
302
303static int __init pismo_init(void)
304{
305 BUILD_BUG_ON(sizeof(struct pismo_cs_block) != 48);
306 BUILD_BUG_ON(sizeof(struct pismo_eeprom) != 256);
307
308 return i2c_add_driver(&pismo_driver);
309}
310module_init(pismo_init);
311
312static void __exit pismo_exit(void)
313{
314 i2c_del_driver(&pismo_driver);
315}
316module_exit(pismo_exit);
317
318MODULE_AUTHOR("Russell King <linux@arm.linux.org.uk>");
319MODULE_DESCRIPTION("PISMO memory driver");
320MODULE_LICENSE("GPL");
diff --git a/drivers/mtd/maps/pxa2xx-flash.c b/drivers/mtd/maps/pxa2xx-flash.c
index 74fa075c838a..b13f6417b5b2 100644
--- a/drivers/mtd/maps/pxa2xx-flash.c
+++ b/drivers/mtd/maps/pxa2xx-flash.c
@@ -20,14 +20,23 @@
20 20
21#include <asm/io.h> 21#include <asm/io.h>
22#include <mach/hardware.h> 22#include <mach/hardware.h>
23#include <asm/cacheflush.h>
24 23
25#include <asm/mach/flash.h> 24#include <asm/mach/flash.h>
26 25
26#define CACHELINESIZE 32
27
27static void pxa2xx_map_inval_cache(struct map_info *map, unsigned long from, 28static void pxa2xx_map_inval_cache(struct map_info *map, unsigned long from,
28 ssize_t len) 29 ssize_t len)
29{ 30{
30 flush_ioremap_region(map->phys, map->cached, from, len); 31 unsigned long start = (unsigned long)map->cached + from;
32 unsigned long end = start + len;
33
34 start &= ~(CACHELINESIZE - 1);
35 while (start < end) {
36 /* invalidate D cache line */
37 asm volatile ("mcr p15, 0, %0, c7, c6, 1" : : "r" (start));
38 start += CACHELINESIZE;
39 }
31} 40}
32 41
33struct pxa2xx_flash_info { 42struct pxa2xx_flash_info {
diff --git a/drivers/mtd/nand/Kconfig b/drivers/mtd/nand/Kconfig
index c89aaab15712..7a67218e86fc 100644
--- a/drivers/mtd/nand/Kconfig
+++ b/drivers/mtd/nand/Kconfig
@@ -289,14 +289,6 @@ config MTD_NAND_SHARPSL
289 tristate "Support for NAND Flash on Sharp SL Series (C7xx + others)" 289 tristate "Support for NAND Flash on Sharp SL Series (C7xx + others)"
290 depends on ARCH_PXA 290 depends on ARCH_PXA
291 291
292config MTD_NAND_BASLER_EXCITE
293 tristate "Support for NAND Flash on Basler eXcite"
294 depends on BASLER_EXCITE
295 help
296 This enables the driver for the NAND flash device found on the
297 Basler eXcite Smart Camera. If built as a module, the driver
298 will be named excite_nandflash.
299
300config MTD_NAND_CAFE 292config MTD_NAND_CAFE
301 tristate "NAND support for OLPC CAFÉ chip" 293 tristate "NAND support for OLPC CAFÉ chip"
302 depends on PCI 294 depends on PCI
diff --git a/drivers/mtd/nand/Makefile b/drivers/mtd/nand/Makefile
index d9257961a6ee..f39d0b6ed42c 100644
--- a/drivers/mtd/nand/Makefile
+++ b/drivers/mtd/nand/Makefile
@@ -27,7 +27,6 @@ obj-$(CONFIG_MTD_NAND_ATMEL) += atmel_nand.o
27obj-$(CONFIG_MTD_NAND_GPIO) += gpio.o 27obj-$(CONFIG_MTD_NAND_GPIO) += gpio.o
28obj-$(CONFIG_MTD_NAND_OMAP2) += omap2.o 28obj-$(CONFIG_MTD_NAND_OMAP2) += omap2.o
29obj-$(CONFIG_MTD_NAND_CM_X270) += cmx270_nand.o 29obj-$(CONFIG_MTD_NAND_CM_X270) += cmx270_nand.o
30obj-$(CONFIG_MTD_NAND_BASLER_EXCITE) += excite_nandflash.o
31obj-$(CONFIG_MTD_NAND_PXA3xx) += pxa3xx_nand.o 30obj-$(CONFIG_MTD_NAND_PXA3xx) += pxa3xx_nand.o
32obj-$(CONFIG_MTD_NAND_TMIO) += tmio_nand.o 31obj-$(CONFIG_MTD_NAND_TMIO) += tmio_nand.o
33obj-$(CONFIG_MTD_NAND_PLATFORM) += plat_nand.o 32obj-$(CONFIG_MTD_NAND_PLATFORM) += plat_nand.o
diff --git a/drivers/mtd/nand/excite_nandflash.c b/drivers/mtd/nand/excite_nandflash.c
deleted file mode 100644
index af6a6a5399e1..000000000000
--- a/drivers/mtd/nand/excite_nandflash.c
+++ /dev/null
@@ -1,248 +0,0 @@
1/*
2* Copyright (C) 2005 - 2007 by Basler Vision Technologies AG
3* Author: Thomas Koeller <thomas.koeller.qbaslerweb.com>
4* Original code by Thies Moeller <thies.moeller@baslerweb.com>
5*
6* This program is free software; you can redistribute it and/or modify
7* it under the terms of the GNU General Public License as published by
8* the Free Software Foundation; either version 2 of the License, or
9* (at your option) any later version.
10*
11* This program is distributed in the hope that it will be useful,
12* but WITHOUT ANY WARRANTY; without even the implied warranty of
13* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14* GNU General Public License for more details.
15*
16* You should have received a copy of the GNU General Public License
17* along with this program; if not, write to the Free Software
18* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19*/
20
21#include <linux/module.h>
22#include <linux/types.h>
23#include <linux/init.h>
24#include <linux/kernel.h>
25#include <linux/string.h>
26#include <linux/ioport.h>
27#include <linux/platform_device.h>
28#include <linux/delay.h>
29#include <linux/err.h>
30
31#include <linux/mtd/mtd.h>
32#include <linux/mtd/nand.h>
33#include <linux/mtd/nand_ecc.h>
34#include <linux/mtd/partitions.h>
35
36#include <asm/io.h>
37#include <asm/rm9k-ocd.h>
38
39#include <excite_nandflash.h>
40
41#define EXCITE_NANDFLASH_VERSION "0.1"
42
43/* I/O register offsets */
44#define EXCITE_NANDFLASH_DATA_BYTE 0x00
45#define EXCITE_NANDFLASH_STATUS_BYTE 0x0c
46#define EXCITE_NANDFLASH_ADDR_BYTE 0x10
47#define EXCITE_NANDFLASH_CMD_BYTE 0x14
48
49/* prefix for debug output */
50static const char module_id[] = "excite_nandflash";
51
52/*
53 * partition definition
54 */
55static const struct mtd_partition partition_info[] = {
56 {
57 .name = "eXcite RootFS",
58 .offset = 0,
59 .size = MTDPART_SIZ_FULL
60 }
61};
62
63static inline const struct resource *
64excite_nand_get_resource(struct platform_device *d, unsigned long flags,
65 const char *basename)
66{
67 char buf[80];
68
69 if (snprintf(buf, sizeof buf, "%s_%u", basename, d->id) >= sizeof buf)
70 return NULL;
71 return platform_get_resource_byname(d, flags, buf);
72}
73
74static inline void __iomem *
75excite_nand_map_regs(struct platform_device *d, const char *basename)
76{
77 void *result = NULL;
78 const struct resource *const r =
79 excite_nand_get_resource(d, IORESOURCE_MEM, basename);
80
81 if (r)
82 result = ioremap_nocache(r->start, r->end + 1 - r->start);
83 return result;
84}
85
86/* controller and mtd information */
87struct excite_nand_drvdata {
88 struct mtd_info board_mtd;
89 struct nand_chip board_chip;
90 void __iomem *regs;
91 void __iomem *tgt;
92};
93
94/* Control function */
95static void excite_nand_control(struct mtd_info *mtd, int cmd,
96 unsigned int ctrl)
97{
98 struct excite_nand_drvdata * const d =
99 container_of(mtd, struct excite_nand_drvdata, board_mtd);
100
101 switch (ctrl) {
102 case NAND_CTRL_CHANGE | NAND_CTRL_CLE:
103 d->tgt = d->regs + EXCITE_NANDFLASH_CMD_BYTE;
104 break;
105 case NAND_CTRL_CHANGE | NAND_CTRL_ALE:
106 d->tgt = d->regs + EXCITE_NANDFLASH_ADDR_BYTE;
107 break;
108 case NAND_CTRL_CHANGE | NAND_NCE:
109 d->tgt = d->regs + EXCITE_NANDFLASH_DATA_BYTE;
110 break;
111 }
112
113 if (cmd != NAND_CMD_NONE)
114 __raw_writeb(cmd, d->tgt);
115}
116
117/* Return 0 if flash is busy, 1 if ready */
118static int excite_nand_devready(struct mtd_info *mtd)
119{
120 struct excite_nand_drvdata * const drvdata =
121 container_of(mtd, struct excite_nand_drvdata, board_mtd);
122
123 return __raw_readb(drvdata->regs + EXCITE_NANDFLASH_STATUS_BYTE);
124}
125
126/*
127 * Called by device layer to remove the driver.
128 * The binding to the mtd and all allocated
129 * resources are released.
130 */
131static int __devexit excite_nand_remove(struct platform_device *dev)
132{
133 struct excite_nand_drvdata * const this = platform_get_drvdata(dev);
134
135 platform_set_drvdata(dev, NULL);
136
137 if (unlikely(!this)) {
138 printk(KERN_ERR "%s: called %s without private data!!",
139 module_id, __func__);
140 return -EINVAL;
141 }
142
143 /* first thing we need to do is release our mtd
144 * then go through freeing the resource used
145 */
146 nand_release(&this->board_mtd);
147
148 /* free the common resources */
149 iounmap(this->regs);
150 kfree(this);
151
152 DEBUG(MTD_DEBUG_LEVEL1, "%s: removed\n", module_id);
153 return 0;
154}
155
156/*
157 * Called by device layer when it finds a device matching
158 * one our driver can handle. This code checks to see if
159 * it can allocate all necessary resources then calls the
160 * nand layer to look for devices.
161*/
162static int __init excite_nand_probe(struct platform_device *pdev)
163{
164 struct excite_nand_drvdata *drvdata; /* private driver data */
165 struct nand_chip *board_chip; /* private flash chip data */
166 struct mtd_info *board_mtd; /* mtd info for this board */
167 int scan_res;
168
169 drvdata = kzalloc(sizeof(*drvdata), GFP_KERNEL);
170 if (unlikely(!drvdata)) {
171 printk(KERN_ERR "%s: no memory for drvdata\n",
172 module_id);
173 return -ENOMEM;
174 }
175
176 /* bind private data into driver */
177 platform_set_drvdata(pdev, drvdata);
178
179 /* allocate and map the resource */
180 drvdata->regs =
181 excite_nand_map_regs(pdev, EXCITE_NANDFLASH_RESOURCE_REGS);
182
183 if (unlikely(!drvdata->regs)) {
184 printk(KERN_ERR "%s: cannot reserve register region\n",
185 module_id);
186 kfree(drvdata);
187 return -ENXIO;
188 }
189
190 drvdata->tgt = drvdata->regs + EXCITE_NANDFLASH_DATA_BYTE;
191
192 /* initialise our chip */
193 board_chip = &drvdata->board_chip;
194 board_chip->IO_ADDR_R = board_chip->IO_ADDR_W =
195 drvdata->regs + EXCITE_NANDFLASH_DATA_BYTE;
196 board_chip->cmd_ctrl = excite_nand_control;
197 board_chip->dev_ready = excite_nand_devready;
198 board_chip->chip_delay = 25;
199 board_chip->ecc.mode = NAND_ECC_SOFT;
200
201 /* link chip to mtd */
202 board_mtd = &drvdata->board_mtd;
203 board_mtd->priv = board_chip;
204
205 DEBUG(MTD_DEBUG_LEVEL2, "%s: device scan\n", module_id);
206 scan_res = nand_scan(&drvdata->board_mtd, 1);
207
208 if (likely(!scan_res)) {
209 DEBUG(MTD_DEBUG_LEVEL2, "%s: register partitions\n", module_id);
210 add_mtd_partitions(&drvdata->board_mtd, partition_info,
211 ARRAY_SIZE(partition_info));
212 } else {
213 iounmap(drvdata->regs);
214 kfree(drvdata);
215 printk(KERN_ERR "%s: device scan failed\n", module_id);
216 return -EIO;
217 }
218 return 0;
219}
220
221static struct platform_driver excite_nand_driver = {
222 .driver = {
223 .name = "excite_nand",
224 .owner = THIS_MODULE,
225 },
226 .probe = excite_nand_probe,
227 .remove = __devexit_p(excite_nand_remove)
228};
229
230static int __init excite_nand_init(void)
231{
232 pr_info("Basler eXcite nand flash driver Version "
233 EXCITE_NANDFLASH_VERSION "\n");
234 return platform_driver_register(&excite_nand_driver);
235}
236
237static void __exit excite_nand_exit(void)
238{
239 platform_driver_unregister(&excite_nand_driver);
240}
241
242module_init(excite_nand_init);
243module_exit(excite_nand_exit);
244
245MODULE_AUTHOR("Thomas Koeller <thomas.koeller@baslerweb.com>");
246MODULE_DESCRIPTION("Basler eXcite NAND-Flash driver");
247MODULE_LICENSE("GPL");
248MODULE_VERSION(EXCITE_NANDFLASH_VERSION)
diff --git a/drivers/mtd/tests/mtd_readtest.c b/drivers/mtd/tests/mtd_readtest.c
index 79fc4530987b..25c5dd03a837 100644
--- a/drivers/mtd/tests/mtd_readtest.c
+++ b/drivers/mtd/tests/mtd_readtest.c
@@ -147,6 +147,10 @@ static int scan_for_bad_eraseblocks(void)
147 } 147 }
148 memset(bbt, 0 , ebcnt); 148 memset(bbt, 0 , ebcnt);
149 149
150 /* NOR flash does not implement block_isbad */
151 if (mtd->block_isbad == NULL)
152 return 0;
153
150 printk(PRINT_PREF "scanning for bad eraseblocks\n"); 154 printk(PRINT_PREF "scanning for bad eraseblocks\n");
151 for (i = 0; i < ebcnt; ++i) { 155 for (i = 0; i < ebcnt; ++i) {
152 bbt[i] = is_block_bad(i) ? 1 : 0; 156 bbt[i] = is_block_bad(i) ? 1 : 0;
@@ -184,7 +188,7 @@ static int __init mtd_readtest_init(void)
184 tmp = mtd->size; 188 tmp = mtd->size;
185 do_div(tmp, mtd->erasesize); 189 do_div(tmp, mtd->erasesize);
186 ebcnt = tmp; 190 ebcnt = tmp;
187 pgcnt = mtd->erasesize / mtd->writesize; 191 pgcnt = mtd->erasesize / pgsize;
188 192
189 printk(PRINT_PREF "MTD device size %llu, eraseblock size %u, " 193 printk(PRINT_PREF "MTD device size %llu, eraseblock size %u, "
190 "page size %u, count of eraseblocks %u, pages per " 194 "page size %u, count of eraseblocks %u, pages per "
diff --git a/drivers/mtd/tests/mtd_speedtest.c b/drivers/mtd/tests/mtd_speedtest.c
index 141363a7e805..7fbb51d4eabe 100644
--- a/drivers/mtd/tests/mtd_speedtest.c
+++ b/drivers/mtd/tests/mtd_speedtest.c
@@ -301,6 +301,10 @@ static int scan_for_bad_eraseblocks(void)
301 } 301 }
302 memset(bbt, 0 , ebcnt); 302 memset(bbt, 0 , ebcnt);
303 303
304 /* NOR flash does not implement block_isbad */
305 if (mtd->block_isbad == NULL)
306 goto out;
307
304 printk(PRINT_PREF "scanning for bad eraseblocks\n"); 308 printk(PRINT_PREF "scanning for bad eraseblocks\n");
305 for (i = 0; i < ebcnt; ++i) { 309 for (i = 0; i < ebcnt; ++i) {
306 bbt[i] = is_block_bad(i) ? 1 : 0; 310 bbt[i] = is_block_bad(i) ? 1 : 0;
@@ -309,6 +313,7 @@ static int scan_for_bad_eraseblocks(void)
309 cond_resched(); 313 cond_resched();
310 } 314 }
311 printk(PRINT_PREF "scanned %d eraseblocks, %d are bad\n", i, bad); 315 printk(PRINT_PREF "scanned %d eraseblocks, %d are bad\n", i, bad);
316out:
312 goodebcnt = ebcnt - bad; 317 goodebcnt = ebcnt - bad;
313 return 0; 318 return 0;
314} 319}
@@ -340,7 +345,7 @@ static int __init mtd_speedtest_init(void)
340 tmp = mtd->size; 345 tmp = mtd->size;
341 do_div(tmp, mtd->erasesize); 346 do_div(tmp, mtd->erasesize);
342 ebcnt = tmp; 347 ebcnt = tmp;
343 pgcnt = mtd->erasesize / mtd->writesize; 348 pgcnt = mtd->erasesize / pgsize;
344 349
345 printk(PRINT_PREF "MTD device size %llu, eraseblock size %u, " 350 printk(PRINT_PREF "MTD device size %llu, eraseblock size %u, "
346 "page size %u, count of eraseblocks %u, pages per " 351 "page size %u, count of eraseblocks %u, pages per "
diff --git a/drivers/mtd/tests/mtd_stresstest.c b/drivers/mtd/tests/mtd_stresstest.c
index 63920476b57a..a99d3cd737d8 100644
--- a/drivers/mtd/tests/mtd_stresstest.c
+++ b/drivers/mtd/tests/mtd_stresstest.c
@@ -227,6 +227,10 @@ static int scan_for_bad_eraseblocks(void)
227 } 227 }
228 memset(bbt, 0 , ebcnt); 228 memset(bbt, 0 , ebcnt);
229 229
230 /* NOR flash does not implement block_isbad */
231 if (mtd->block_isbad == NULL)
232 return 0;
233
230 printk(PRINT_PREF "scanning for bad eraseblocks\n"); 234 printk(PRINT_PREF "scanning for bad eraseblocks\n");
231 for (i = 0; i < ebcnt; ++i) { 235 for (i = 0; i < ebcnt; ++i) {
232 bbt[i] = is_block_bad(i) ? 1 : 0; 236 bbt[i] = is_block_bad(i) ? 1 : 0;
@@ -265,7 +269,7 @@ static int __init mtd_stresstest_init(void)
265 tmp = mtd->size; 269 tmp = mtd->size;
266 do_div(tmp, mtd->erasesize); 270 do_div(tmp, mtd->erasesize);
267 ebcnt = tmp; 271 ebcnt = tmp;
268 pgcnt = mtd->erasesize / mtd->writesize; 272 pgcnt = mtd->erasesize / pgsize;
269 273
270 printk(PRINT_PREF "MTD device size %llu, eraseblock size %u, " 274 printk(PRINT_PREF "MTD device size %llu, eraseblock size %u, "
271 "page size %u, count of eraseblocks %u, pages per " 275 "page size %u, count of eraseblocks %u, pages per "
diff --git a/drivers/mtd/ubi/cdev.c b/drivers/mtd/ubi/cdev.c
index f237ddbb2713..111ea41c4ecd 100644
--- a/drivers/mtd/ubi/cdev.c
+++ b/drivers/mtd/ubi/cdev.c
@@ -853,7 +853,6 @@ static long ubi_cdev_ioctl(struct file *file, unsigned int cmd,
853 break; 853 break;
854 } 854 }
855 855
856 req.name[req.name_len] = '\0';
857 err = verify_mkvol_req(ubi, &req); 856 err = verify_mkvol_req(ubi, &req);
858 if (err) 857 if (err)
859 break; 858 break;
diff --git a/drivers/mtd/ubi/kapi.c b/drivers/mtd/ubi/kapi.c
index 277786ebaa2c..1361574e2b00 100644
--- a/drivers/mtd/ubi/kapi.c
+++ b/drivers/mtd/ubi/kapi.c
@@ -291,8 +291,7 @@ EXPORT_SYMBOL_GPL(ubi_open_volume_nm);
291 */ 291 */
292struct ubi_volume_desc *ubi_open_volume_path(const char *pathname, int mode) 292struct ubi_volume_desc *ubi_open_volume_path(const char *pathname, int mode)
293{ 293{
294 int error, ubi_num, vol_id; 294 int error, ubi_num, vol_id, mod;
295 struct ubi_volume_desc *ret;
296 struct inode *inode; 295 struct inode *inode;
297 struct path path; 296 struct path path;
298 297
@@ -306,16 +305,16 @@ struct ubi_volume_desc *ubi_open_volume_path(const char *pathname, int mode)
306 return ERR_PTR(error); 305 return ERR_PTR(error);
307 306
308 inode = path.dentry->d_inode; 307 inode = path.dentry->d_inode;
308 mod = inode->i_mode;
309 ubi_num = ubi_major2num(imajor(inode)); 309 ubi_num = ubi_major2num(imajor(inode));
310 vol_id = iminor(inode) - 1; 310 vol_id = iminor(inode) - 1;
311 path_put(&path);
311 312
313 if (!S_ISCHR(mod))
314 return ERR_PTR(-EINVAL);
312 if (vol_id >= 0 && ubi_num >= 0) 315 if (vol_id >= 0 && ubi_num >= 0)
313 ret = ubi_open_volume(ubi_num, vol_id, mode); 316 return ubi_open_volume(ubi_num, vol_id, mode);
314 else 317 return ERR_PTR(-ENODEV);
315 ret = ERR_PTR(-ENODEV);
316
317 path_put(&path);
318 return ret;
319} 318}
320EXPORT_SYMBOL_GPL(ubi_open_volume_path); 319EXPORT_SYMBOL_GPL(ubi_open_volume_path);
321 320
diff --git a/drivers/mtd/ubi/upd.c b/drivers/mtd/ubi/upd.c
index c1d7b880c795..425bf5a3edd4 100644
--- a/drivers/mtd/ubi/upd.c
+++ b/drivers/mtd/ubi/upd.c
@@ -155,6 +155,7 @@ int ubi_start_update(struct ubi_device *ubi, struct ubi_volume *vol,
155 if (err) 155 if (err)
156 return err; 156 return err;
157 vol->updating = 0; 157 vol->updating = 0;
158 return 0;
158 } 159 }
159 160
160 vol->upd_buf = vmalloc(ubi->leb_size); 161 vol->upd_buf = vmalloc(ubi->leb_size);
diff --git a/drivers/mtd/ubi/vtbl.c b/drivers/mtd/ubi/vtbl.c
index 1afc61e7455d..40044028d682 100644
--- a/drivers/mtd/ubi/vtbl.c
+++ b/drivers/mtd/ubi/vtbl.c
@@ -566,6 +566,7 @@ static int init_volumes(struct ubi_device *ubi, const struct ubi_scan_info *si,
566 vol->reserved_pebs = be32_to_cpu(vtbl[i].reserved_pebs); 566 vol->reserved_pebs = be32_to_cpu(vtbl[i].reserved_pebs);
567 vol->alignment = be32_to_cpu(vtbl[i].alignment); 567 vol->alignment = be32_to_cpu(vtbl[i].alignment);
568 vol->data_pad = be32_to_cpu(vtbl[i].data_pad); 568 vol->data_pad = be32_to_cpu(vtbl[i].data_pad);
569 vol->upd_marker = vtbl[i].upd_marker;
569 vol->vol_type = vtbl[i].vol_type == UBI_VID_DYNAMIC ? 570 vol->vol_type = vtbl[i].vol_type == UBI_VID_DYNAMIC ?
570 UBI_DYNAMIC_VOLUME : UBI_STATIC_VOLUME; 571 UBI_DYNAMIC_VOLUME : UBI_STATIC_VOLUME;
571 vol->name_len = be16_to_cpu(vtbl[i].name_len); 572 vol->name_len = be16_to_cpu(vtbl[i].name_len);
diff --git a/drivers/net/3c507.c b/drivers/net/3c507.c
index fbc231153e55..77cf0901a441 100644
--- a/drivers/net/3c507.c
+++ b/drivers/net/3c507.c
@@ -56,6 +56,7 @@ static const char version[] =
56#include <linux/errno.h> 56#include <linux/errno.h>
57#include <linux/netdevice.h> 57#include <linux/netdevice.h>
58#include <linux/etherdevice.h> 58#include <linux/etherdevice.h>
59#include <linux/if_ether.h>
59#include <linux/skbuff.h> 60#include <linux/skbuff.h>
60#include <linux/slab.h> 61#include <linux/slab.h>
61#include <linux/init.h> 62#include <linux/init.h>
@@ -734,8 +735,7 @@ static void init_82586_mem(struct net_device *dev)
734 memcpy_toio(lp->base, init_words + 5, sizeof(init_words) - 10); 735 memcpy_toio(lp->base, init_words + 5, sizeof(init_words) - 10);
735 736
736 /* Fill in the station address. */ 737 /* Fill in the station address. */
737 memcpy_toio(lp->base+SA_OFFSET, dev->dev_addr, 738 memcpy_toio(lp->base+SA_OFFSET, dev->dev_addr, ETH_ALEN);
738 sizeof(dev->dev_addr));
739 739
740 /* The Tx-block list is written as needed. We just set up the values. */ 740 /* The Tx-block list is written as needed. We just set up the values. */
741 lp->tx_cmd_link = IDLELOOP + 4; 741 lp->tx_cmd_link = IDLELOOP + 4;
diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig
index a5be9ac6405c..dd9a09c72dff 100644
--- a/drivers/net/Kconfig
+++ b/drivers/net/Kconfig
@@ -1953,6 +1953,8 @@ config BCM63XX_ENET
1953 1953
1954source "drivers/net/fs_enet/Kconfig" 1954source "drivers/net/fs_enet/Kconfig"
1955 1955
1956source "drivers/net/octeon/Kconfig"
1957
1956endif # NET_ETHERNET 1958endif # NET_ETHERNET
1957 1959
1958# 1960#
@@ -2344,6 +2346,7 @@ config GELIC_NET
2344 2346
2345config GELIC_WIRELESS 2347config GELIC_WIRELESS
2346 bool "PS3 Wireless support" 2348 bool "PS3 Wireless support"
2349 depends on WLAN
2347 depends on GELIC_NET 2350 depends on GELIC_NET
2348 select WIRELESS_EXT 2351 select WIRELESS_EXT
2349 help 2352 help
@@ -2356,6 +2359,7 @@ config GELIC_WIRELESS
2356config GELIC_WIRELESS_OLD_PSK_INTERFACE 2359config GELIC_WIRELESS_OLD_PSK_INTERFACE
2357 bool "PS3 Wireless private PSK interface (OBSOLETE)" 2360 bool "PS3 Wireless private PSK interface (OBSOLETE)"
2358 depends on GELIC_WIRELESS 2361 depends on GELIC_WIRELESS
2362 select WEXT_PRIV
2359 help 2363 help
2360 This option retains the obsolete private interface to pass 2364 This option retains the obsolete private interface to pass
2361 the PSK from user space programs to the driver. The PSK 2365 the PSK from user space programs to the driver. The PSK
diff --git a/drivers/net/Makefile b/drivers/net/Makefile
index 246323d7f161..ad1346dd9da9 100644
--- a/drivers/net/Makefile
+++ b/drivers/net/Makefile
@@ -285,3 +285,5 @@ obj-$(CONFIG_VIRTIO_NET) += virtio_net.o
285obj-$(CONFIG_SFC) += sfc/ 285obj-$(CONFIG_SFC) += sfc/
286 286
287obj-$(CONFIG_WIMAX) += wimax/ 287obj-$(CONFIG_WIMAX) += wimax/
288
289obj-$(CONFIG_OCTEON_MGMT_ETHERNET) += octeon/
diff --git a/drivers/net/arm/Kconfig b/drivers/net/arm/Kconfig
index c37ee9e6b67b..39e1c0d39476 100644
--- a/drivers/net/arm/Kconfig
+++ b/drivers/net/arm/Kconfig
@@ -68,6 +68,7 @@ config W90P910_ETH
68 tristate "Nuvoton w90p910 Ethernet support" 68 tristate "Nuvoton w90p910 Ethernet support"
69 depends on ARM && ARCH_W90X900 69 depends on ARM && ARCH_W90X900
70 select PHYLIB 70 select PHYLIB
71 select MII
71 help 72 help
72 Say Y here if you want to use built-in Ethernet ports 73 Say Y here if you want to use built-in Ethernet ports
73 on w90p910 processor. 74 on w90p910 processor.
diff --git a/drivers/net/atarilance.c b/drivers/net/atarilance.c
index c5721cb38265..cc9ed8643910 100644
--- a/drivers/net/atarilance.c
+++ b/drivers/net/atarilance.c
@@ -663,7 +663,7 @@ static int lance_open( struct net_device *dev )
663 while (--i > 0) 663 while (--i > 0)
664 if (DREG & CSR0_IDON) 664 if (DREG & CSR0_IDON)
665 break; 665 break;
666 if (i < 0 || (DREG & CSR0_ERR)) { 666 if (i <= 0 || (DREG & CSR0_ERR)) {
667 DPRINTK( 2, ( "lance_open(): opening %s failed, i=%d, csr0=%04x\n", 667 DPRINTK( 2, ( "lance_open(): opening %s failed, i=%d, csr0=%04x\n",
668 dev->name, i, DREG )); 668 dev->name, i, DREG ));
669 DREG = CSR0_STOP; 669 DREG = CSR0_STOP;
diff --git a/drivers/net/atlx/atl2.c b/drivers/net/atlx/atl2.c
index c0451d75cdcf..ec52529394ad 100644
--- a/drivers/net/atlx/atl2.c
+++ b/drivers/net/atlx/atl2.c
@@ -1959,12 +1959,15 @@ static int atl2_get_eeprom(struct net_device *netdev,
1959 return -ENOMEM; 1959 return -ENOMEM;
1960 1960
1961 for (i = first_dword; i < last_dword; i++) { 1961 for (i = first_dword; i < last_dword; i++) {
1962 if (!atl2_read_eeprom(hw, i*4, &(eeprom_buff[i-first_dword]))) 1962 if (!atl2_read_eeprom(hw, i*4, &(eeprom_buff[i-first_dword]))) {
1963 return -EIO; 1963 ret_val = -EIO;
1964 goto free;
1965 }
1964 } 1966 }
1965 1967
1966 memcpy(bytes, (u8 *)eeprom_buff + (eeprom->offset & 3), 1968 memcpy(bytes, (u8 *)eeprom_buff + (eeprom->offset & 3),
1967 eeprom->len); 1969 eeprom->len);
1970free:
1968 kfree(eeprom_buff); 1971 kfree(eeprom_buff);
1969 1972
1970 return ret_val; 1973 return ret_val;
diff --git a/drivers/net/ax88796.c b/drivers/net/ax88796.c
index 62d9c9cc5671..1dd4403247ca 100644
--- a/drivers/net/ax88796.c
+++ b/drivers/net/ax88796.c
@@ -921,7 +921,7 @@ static int ax_probe(struct platform_device *pdev)
921 size = (res->end - res->start) + 1; 921 size = (res->end - res->start) + 1;
922 922
923 ax->mem2 = request_mem_region(res->start, size, pdev->name); 923 ax->mem2 = request_mem_region(res->start, size, pdev->name);
924 if (ax->mem == NULL) { 924 if (ax->mem2 == NULL) {
925 dev_err(&pdev->dev, "cannot reserve registers\n"); 925 dev_err(&pdev->dev, "cannot reserve registers\n");
926 ret = -ENXIO; 926 ret = -ENXIO;
927 goto exit_mem1; 927 goto exit_mem1;
diff --git a/drivers/net/bcm63xx_enet.c b/drivers/net/bcm63xx_enet.c
index 1f6c5486d715..0bd47d32ec42 100644
--- a/drivers/net/bcm63xx_enet.c
+++ b/drivers/net/bcm63xx_enet.c
@@ -1245,9 +1245,15 @@ static void bcm_enet_get_drvinfo(struct net_device *netdev,
1245 drvinfo->n_stats = BCM_ENET_STATS_LEN; 1245 drvinfo->n_stats = BCM_ENET_STATS_LEN;
1246} 1246}
1247 1247
1248static int bcm_enet_get_stats_count(struct net_device *netdev) 1248static int bcm_enet_get_sset_count(struct net_device *netdev,
1249 int string_set)
1249{ 1250{
1250 return BCM_ENET_STATS_LEN; 1251 switch (string_set) {
1252 case ETH_SS_STATS:
1253 return BCM_ENET_STATS_LEN;
1254 default:
1255 return -EINVAL;
1256 }
1251} 1257}
1252 1258
1253static void bcm_enet_get_strings(struct net_device *netdev, 1259static void bcm_enet_get_strings(struct net_device *netdev,
@@ -1473,7 +1479,7 @@ static int bcm_enet_set_pauseparam(struct net_device *dev,
1473 1479
1474static struct ethtool_ops bcm_enet_ethtool_ops = { 1480static struct ethtool_ops bcm_enet_ethtool_ops = {
1475 .get_strings = bcm_enet_get_strings, 1481 .get_strings = bcm_enet_get_strings,
1476 .get_stats_count = bcm_enet_get_stats_count, 1482 .get_sset_count = bcm_enet_get_sset_count,
1477 .get_ethtool_stats = bcm_enet_get_ethtool_stats, 1483 .get_ethtool_stats = bcm_enet_get_ethtool_stats,
1478 .get_settings = bcm_enet_get_settings, 1484 .get_settings = bcm_enet_get_settings,
1479 .set_settings = bcm_enet_set_settings, 1485 .set_settings = bcm_enet_set_settings,
diff --git a/drivers/net/benet/be.h b/drivers/net/benet/be.h
index 9e56014d27ed..5bc74590c73e 100644
--- a/drivers/net/benet/be.h
+++ b/drivers/net/benet/be.h
@@ -275,8 +275,14 @@ struct be_adapter {
275 u32 tx_fc; /* Tx flow control */ 275 u32 tx_fc; /* Tx flow control */
276 int link_speed; 276 int link_speed;
277 u8 port_type; 277 u8 port_type;
278 u8 transceiver;
279 u8 generation; /* BladeEngine ASIC generation */
278}; 280};
279 281
282/* BladeEngine Generation numbers */
283#define BE_GEN2 2
284#define BE_GEN3 3
285
280extern const struct ethtool_ops be_ethtool_ops; 286extern const struct ethtool_ops be_ethtool_ops;
281 287
282#define drvr_stats(adapter) (&adapter->stats.drvr_stats) 288#define drvr_stats(adapter) (&adapter->stats.drvr_stats)
diff --git a/drivers/net/benet/be_cmds.c b/drivers/net/benet/be_cmds.c
index 1b68bd98dc0c..006cb2efcd22 100644
--- a/drivers/net/benet/be_cmds.c
+++ b/drivers/net/benet/be_cmds.c
@@ -286,7 +286,7 @@ static void be_wrb_hdr_prepare(struct be_mcc_wrb *wrb, int payload_len,
286 MCC_WRB_SGE_CNT_SHIFT; 286 MCC_WRB_SGE_CNT_SHIFT;
287 wrb->payload_length = payload_len; 287 wrb->payload_length = payload_len;
288 wrb->tag0 = opcode; 288 wrb->tag0 = opcode;
289 be_dws_cpu_to_le(wrb, 20); 289 be_dws_cpu_to_le(wrb, 8);
290} 290}
291 291
292/* Don't touch the hdr after it's prepared */ 292/* Don't touch the hdr after it's prepared */
@@ -296,6 +296,7 @@ static void be_cmd_hdr_prepare(struct be_cmd_req_hdr *req_hdr,
296 req_hdr->opcode = opcode; 296 req_hdr->opcode = opcode;
297 req_hdr->subsystem = subsystem; 297 req_hdr->subsystem = subsystem;
298 req_hdr->request_length = cpu_to_le32(cmd_len - sizeof(*req_hdr)); 298 req_hdr->request_length = cpu_to_le32(cmd_len - sizeof(*req_hdr));
299 req_hdr->version = 0;
299} 300}
300 301
301static void be_cmd_page_addrs_prepare(struct phys_addr *pages, u32 max_pages, 302static void be_cmd_page_addrs_prepare(struct phys_addr *pages, u32 max_pages,
@@ -1479,6 +1480,41 @@ err:
1479 return status; 1480 return status;
1480} 1481}
1481 1482
1483int be_cmd_set_loopback(struct be_adapter *adapter, u8 port_num,
1484 u8 loopback_type, u8 enable)
1485{
1486 struct be_mcc_wrb *wrb;
1487 struct be_cmd_req_set_lmode *req;
1488 int status;
1489
1490 spin_lock_bh(&adapter->mcc_lock);
1491
1492 wrb = wrb_from_mccq(adapter);
1493 if (!wrb) {
1494 status = -EBUSY;
1495 goto err;
1496 }
1497
1498 req = embedded_payload(wrb);
1499
1500 be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0,
1501 OPCODE_LOWLEVEL_SET_LOOPBACK_MODE);
1502
1503 be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_LOWLEVEL,
1504 OPCODE_LOWLEVEL_SET_LOOPBACK_MODE,
1505 sizeof(*req));
1506
1507 req->src_port = port_num;
1508 req->dest_port = port_num;
1509 req->loopback_type = loopback_type;
1510 req->loopback_state = enable;
1511
1512 status = be_mcc_notify_wait(adapter);
1513err:
1514 spin_unlock_bh(&adapter->mcc_lock);
1515 return status;
1516}
1517
1482int be_cmd_loopback_test(struct be_adapter *adapter, u32 port_num, 1518int be_cmd_loopback_test(struct be_adapter *adapter, u32 port_num,
1483 u32 loopback_type, u32 pkt_size, u32 num_pkts, u64 pattern) 1519 u32 loopback_type, u32 pkt_size, u32 num_pkts, u64 pattern)
1484{ 1520{
@@ -1501,6 +1537,7 @@ int be_cmd_loopback_test(struct be_adapter *adapter, u32 port_num,
1501 1537
1502 be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_LOWLEVEL, 1538 be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_LOWLEVEL,
1503 OPCODE_LOWLEVEL_LOOPBACK_TEST, sizeof(*req)); 1539 OPCODE_LOWLEVEL_LOOPBACK_TEST, sizeof(*req));
1540 req->hdr.timeout = 4;
1504 1541
1505 req->pattern = cpu_to_le64(pattern); 1542 req->pattern = cpu_to_le64(pattern);
1506 req->src_port = cpu_to_le32(port_num); 1543 req->src_port = cpu_to_le32(port_num);
diff --git a/drivers/net/benet/be_cmds.h b/drivers/net/benet/be_cmds.h
index 92b87ef156ed..13b33c841083 100644
--- a/drivers/net/benet/be_cmds.h
+++ b/drivers/net/benet/be_cmds.h
@@ -155,6 +155,7 @@ struct be_mcc_mailbox {
155 155
156#define OPCODE_LOWLEVEL_HOST_DDR_DMA 17 156#define OPCODE_LOWLEVEL_HOST_DDR_DMA 17
157#define OPCODE_LOWLEVEL_LOOPBACK_TEST 18 157#define OPCODE_LOWLEVEL_LOOPBACK_TEST 18
158#define OPCODE_LOWLEVEL_SET_LOOPBACK_MODE 19
158 159
159struct be_cmd_req_hdr { 160struct be_cmd_req_hdr {
160 u8 opcode; /* dword 0 */ 161 u8 opcode; /* dword 0 */
@@ -163,7 +164,8 @@ struct be_cmd_req_hdr {
163 u8 domain; /* dword 0 */ 164 u8 domain; /* dword 0 */
164 u32 timeout; /* dword 1 */ 165 u32 timeout; /* dword 1 */
165 u32 request_length; /* dword 2 */ 166 u32 request_length; /* dword 2 */
166 u32 rsvd; /* dword 3 */ 167 u8 version; /* dword 3 */
168 u8 rsvd[3]; /* dword 3 */
167}; 169};
168 170
169#define RESP_HDR_INFO_OPCODE_SHIFT 0 /* bits 0 - 7 */ 171#define RESP_HDR_INFO_OPCODE_SHIFT 0 /* bits 0 - 7 */
@@ -821,6 +823,19 @@ struct be_cmd_resp_loopback_test {
821 u32 ticks_compl; 823 u32 ticks_compl;
822}; 824};
823 825
826struct be_cmd_req_set_lmode {
827 struct be_cmd_req_hdr hdr;
828 u8 src_port;
829 u8 dest_port;
830 u8 loopback_type;
831 u8 loopback_state;
832};
833
834struct be_cmd_resp_set_lmode {
835 struct be_cmd_resp_hdr resp_hdr;
836 u8 rsvd0[4];
837};
838
824/********************** DDR DMA test *********************/ 839/********************** DDR DMA test *********************/
825struct be_cmd_req_ddrdma_test { 840struct be_cmd_req_ddrdma_test {
826 struct be_cmd_req_hdr hdr; 841 struct be_cmd_req_hdr hdr;
@@ -912,3 +927,5 @@ extern int be_cmd_loopback_test(struct be_adapter *adapter, u32 port_num,
912 u32 num_pkts, u64 pattern); 927 u32 num_pkts, u64 pattern);
913extern int be_cmd_ddr_dma_test(struct be_adapter *adapter, u64 pattern, 928extern int be_cmd_ddr_dma_test(struct be_adapter *adapter, u64 pattern,
914 u32 byte_cnt, struct be_dma_mem *cmd); 929 u32 byte_cnt, struct be_dma_mem *cmd);
930extern int be_cmd_set_loopback(struct be_adapter *adapter, u8 port_num,
931 u8 loopback_type, u8 enable);
diff --git a/drivers/net/benet/be_ethtool.c b/drivers/net/benet/be_ethtool.c
index 298b92cbd689..5d001c4deac1 100644
--- a/drivers/net/benet/be_ethtool.c
+++ b/drivers/net/benet/be_ethtool.c
@@ -118,6 +118,7 @@ static const char et_self_tests[][ETH_GSTRING_LEN] = {
118#define BE_MAC_LOOPBACK 0x0 118#define BE_MAC_LOOPBACK 0x0
119#define BE_PHY_LOOPBACK 0x1 119#define BE_PHY_LOOPBACK 0x1
120#define BE_ONE_PORT_EXT_LOOPBACK 0x2 120#define BE_ONE_PORT_EXT_LOOPBACK 0x2
121#define BE_NO_LOOPBACK 0xff
121 122
122static void 123static void
123be_get_drvinfo(struct net_device *netdev, struct ethtool_drvinfo *drvinfo) 124be_get_drvinfo(struct net_device *netdev, struct ethtool_drvinfo *drvinfo)
@@ -339,28 +340,50 @@ static int be_get_settings(struct net_device *netdev, struct ethtool_cmd *ecmd)
339 340
340 status = be_cmd_read_port_type(adapter, adapter->port_num, 341 status = be_cmd_read_port_type(adapter, adapter->port_num,
341 &connector); 342 &connector);
342 switch (connector) { 343 if (!status) {
343 case 7: 344 switch (connector) {
344 ecmd->port = PORT_FIBRE; 345 case 7:
345 break; 346 ecmd->port = PORT_FIBRE;
346 default: 347 ecmd->transceiver = XCVR_EXTERNAL;
347 ecmd->port = PORT_TP; 348 break;
348 break; 349 case 0:
350 ecmd->port = PORT_TP;
351 ecmd->transceiver = XCVR_EXTERNAL;
352 break;
353 default:
354 ecmd->port = PORT_TP;
355 ecmd->transceiver = XCVR_INTERNAL;
356 break;
357 }
358 } else {
359 ecmd->port = PORT_AUI;
360 ecmd->transceiver = XCVR_INTERNAL;
349 } 361 }
350 362
351 /* Save for future use */ 363 /* Save for future use */
352 adapter->link_speed = ecmd->speed; 364 adapter->link_speed = ecmd->speed;
353 adapter->port_type = ecmd->port; 365 adapter->port_type = ecmd->port;
366 adapter->transceiver = ecmd->transceiver;
354 } else { 367 } else {
355 ecmd->speed = adapter->link_speed; 368 ecmd->speed = adapter->link_speed;
356 ecmd->port = adapter->port_type; 369 ecmd->port = adapter->port_type;
370 ecmd->transceiver = adapter->transceiver;
357 } 371 }
358 372
359 ecmd->duplex = DUPLEX_FULL; 373 ecmd->duplex = DUPLEX_FULL;
360 ecmd->autoneg = AUTONEG_DISABLE; 374 ecmd->autoneg = AUTONEG_DISABLE;
361 ecmd->supported = (SUPPORTED_10000baseT_Full | SUPPORTED_TP);
362 ecmd->phy_address = adapter->port_num; 375 ecmd->phy_address = adapter->port_num;
363 ecmd->transceiver = XCVR_INTERNAL; 376 switch (ecmd->port) {
377 case PORT_FIBRE:
378 ecmd->supported = (SUPPORTED_10000baseT_Full | SUPPORTED_FIBRE);
379 break;
380 case PORT_TP:
381 ecmd->supported = (SUPPORTED_10000baseT_Full | SUPPORTED_TP);
382 break;
383 case PORT_AUI:
384 ecmd->supported = (SUPPORTED_10000baseT_Full | SUPPORTED_AUI);
385 break;
386 }
364 387
365 return 0; 388 return 0;
366} 389}
@@ -489,6 +512,19 @@ err:
489 return ret; 512 return ret;
490} 513}
491 514
515static u64 be_loopback_test(struct be_adapter *adapter, u8 loopback_type,
516 u64 *status)
517{
518 be_cmd_set_loopback(adapter, adapter->port_num,
519 loopback_type, 1);
520 *status = be_cmd_loopback_test(adapter, adapter->port_num,
521 loopback_type, 1500,
522 2, 0xabc);
523 be_cmd_set_loopback(adapter, adapter->port_num,
524 BE_NO_LOOPBACK, 1);
525 return *status;
526}
527
492static void 528static void
493be_self_test(struct net_device *netdev, struct ethtool_test *test, u64 *data) 529be_self_test(struct net_device *netdev, struct ethtool_test *test, u64 *data)
494{ 530{
@@ -497,23 +533,18 @@ be_self_test(struct net_device *netdev, struct ethtool_test *test, u64 *data)
497 memset(data, 0, sizeof(u64) * ETHTOOL_TESTS_NUM); 533 memset(data, 0, sizeof(u64) * ETHTOOL_TESTS_NUM);
498 534
499 if (test->flags & ETH_TEST_FL_OFFLINE) { 535 if (test->flags & ETH_TEST_FL_OFFLINE) {
500 data[0] = be_cmd_loopback_test(adapter, adapter->port_num, 536 if (be_loopback_test(adapter, BE_MAC_LOOPBACK,
501 BE_MAC_LOOPBACK, 1500, 537 &data[0]) != 0) {
502 2, 0xabc);
503 if (data[0] != 0)
504 test->flags |= ETH_TEST_FL_FAILED; 538 test->flags |= ETH_TEST_FL_FAILED;
505 539 }
506 data[1] = be_cmd_loopback_test(adapter, adapter->port_num, 540 if (be_loopback_test(adapter, BE_PHY_LOOPBACK,
507 BE_PHY_LOOPBACK, 1500, 541 &data[1]) != 0) {
508 2, 0xabc);
509 if (data[1] != 0)
510 test->flags |= ETH_TEST_FL_FAILED; 542 test->flags |= ETH_TEST_FL_FAILED;
511 543 }
512 data[2] = be_cmd_loopback_test(adapter, adapter->port_num, 544 if (be_loopback_test(adapter, BE_ONE_PORT_EXT_LOOPBACK,
513 BE_ONE_PORT_EXT_LOOPBACK, 545 &data[2]) != 0) {
514 1500, 2, 0xabc);
515 if (data[2] != 0)
516 test->flags |= ETH_TEST_FL_FAILED; 546 test->flags |= ETH_TEST_FL_FAILED;
547 }
517 548
518 data[3] = be_test_ddr_dma(adapter); 549 data[3] = be_test_ddr_dma(adapter);
519 if (data[3] != 0) 550 if (data[3] != 0)
diff --git a/drivers/net/benet/be_main.c b/drivers/net/benet/be_main.c
index 3a1f7902c16d..626b76c0ebc7 100644
--- a/drivers/net/benet/be_main.c
+++ b/drivers/net/benet/be_main.c
@@ -910,7 +910,7 @@ static inline struct page *be_alloc_pages(u32 size)
910static void be_post_rx_frags(struct be_adapter *adapter) 910static void be_post_rx_frags(struct be_adapter *adapter)
911{ 911{
912 struct be_rx_page_info *page_info_tbl = adapter->rx_obj.page_info_tbl; 912 struct be_rx_page_info *page_info_tbl = adapter->rx_obj.page_info_tbl;
913 struct be_rx_page_info *page_info = NULL; 913 struct be_rx_page_info *page_info = NULL, *prev_page_info = NULL;
914 struct be_queue_info *rxq = &adapter->rx_obj.q; 914 struct be_queue_info *rxq = &adapter->rx_obj.q;
915 struct page *pagep = NULL; 915 struct page *pagep = NULL;
916 struct be_eth_rx_d *rxd; 916 struct be_eth_rx_d *rxd;
@@ -941,7 +941,6 @@ static void be_post_rx_frags(struct be_adapter *adapter)
941 rxd = queue_head_node(rxq); 941 rxd = queue_head_node(rxq);
942 rxd->fragpa_lo = cpu_to_le32(frag_dmaaddr & 0xFFFFFFFF); 942 rxd->fragpa_lo = cpu_to_le32(frag_dmaaddr & 0xFFFFFFFF);
943 rxd->fragpa_hi = cpu_to_le32(upper_32_bits(frag_dmaaddr)); 943 rxd->fragpa_hi = cpu_to_le32(upper_32_bits(frag_dmaaddr));
944 queue_head_inc(rxq);
945 944
946 /* Any space left in the current big page for another frag? */ 945 /* Any space left in the current big page for another frag? */
947 if ((page_offset + rx_frag_size + rx_frag_size) > 946 if ((page_offset + rx_frag_size + rx_frag_size) >
@@ -949,10 +948,13 @@ static void be_post_rx_frags(struct be_adapter *adapter)
949 pagep = NULL; 948 pagep = NULL;
950 page_info->last_page_user = true; 949 page_info->last_page_user = true;
951 } 950 }
951
952 prev_page_info = page_info;
953 queue_head_inc(rxq);
952 page_info = &page_info_tbl[rxq->head]; 954 page_info = &page_info_tbl[rxq->head];
953 } 955 }
954 if (pagep) 956 if (pagep)
955 page_info->last_page_user = true; 957 prev_page_info->last_page_user = true;
956 958
957 if (posted) { 959 if (posted) {
958 atomic_add(posted, &rxq->used); 960 atomic_add(posted, &rxq->used);
@@ -1348,7 +1350,7 @@ static irqreturn_t be_intx(int irq, void *dev)
1348 int isr; 1350 int isr;
1349 1351
1350 isr = ioread32(adapter->csr + CEV_ISR0_OFFSET + 1352 isr = ioread32(adapter->csr + CEV_ISR0_OFFSET +
1351 be_pci_func(adapter) * CEV_ISR_SIZE); 1353 (adapter->tx_eq.q.id/ 8) * CEV_ISR_SIZE);
1352 if (!isr) 1354 if (!isr)
1353 return IRQ_NONE; 1355 return IRQ_NONE;
1354 1356
@@ -2049,6 +2051,7 @@ static void be_unmap_pci_bars(struct be_adapter *adapter)
2049static int be_map_pci_bars(struct be_adapter *adapter) 2051static int be_map_pci_bars(struct be_adapter *adapter)
2050{ 2052{
2051 u8 __iomem *addr; 2053 u8 __iomem *addr;
2054 int pcicfg_reg;
2052 2055
2053 addr = ioremap_nocache(pci_resource_start(adapter->pdev, 2), 2056 addr = ioremap_nocache(pci_resource_start(adapter->pdev, 2),
2054 pci_resource_len(adapter->pdev, 2)); 2057 pci_resource_len(adapter->pdev, 2));
@@ -2062,8 +2065,13 @@ static int be_map_pci_bars(struct be_adapter *adapter)
2062 goto pci_map_err; 2065 goto pci_map_err;
2063 adapter->db = addr; 2066 adapter->db = addr;
2064 2067
2065 addr = ioremap_nocache(pci_resource_start(adapter->pdev, 1), 2068 if (adapter->generation == BE_GEN2)
2066 pci_resource_len(adapter->pdev, 1)); 2069 pcicfg_reg = 1;
2070 else
2071 pcicfg_reg = 0;
2072
2073 addr = ioremap_nocache(pci_resource_start(adapter->pdev, pcicfg_reg),
2074 pci_resource_len(adapter->pdev, pcicfg_reg));
2067 if (addr == NULL) 2075 if (addr == NULL)
2068 goto pci_map_err; 2076 goto pci_map_err;
2069 adapter->pcicfg = addr; 2077 adapter->pcicfg = addr;
@@ -2160,6 +2168,7 @@ static int be_stats_init(struct be_adapter *adapter)
2160 cmd->va = pci_alloc_consistent(adapter->pdev, cmd->size, &cmd->dma); 2168 cmd->va = pci_alloc_consistent(adapter->pdev, cmd->size, &cmd->dma);
2161 if (cmd->va == NULL) 2169 if (cmd->va == NULL)
2162 return -1; 2170 return -1;
2171 memset(cmd->va, 0, cmd->size);
2163 return 0; 2172 return 0;
2164} 2173}
2165 2174
@@ -2238,6 +2247,20 @@ static int __devinit be_probe(struct pci_dev *pdev,
2238 goto rel_reg; 2247 goto rel_reg;
2239 } 2248 }
2240 adapter = netdev_priv(netdev); 2249 adapter = netdev_priv(netdev);
2250
2251 switch (pdev->device) {
2252 case BE_DEVICE_ID1:
2253 case OC_DEVICE_ID1:
2254 adapter->generation = BE_GEN2;
2255 break;
2256 case BE_DEVICE_ID2:
2257 case OC_DEVICE_ID2:
2258 adapter->generation = BE_GEN3;
2259 break;
2260 default:
2261 adapter->generation = 0;
2262 }
2263
2241 adapter->pdev = pdev; 2264 adapter->pdev = pdev;
2242 pci_set_drvdata(pdev, adapter); 2265 pci_set_drvdata(pdev, adapter);
2243 adapter->netdev = netdev; 2266 adapter->netdev = netdev;
diff --git a/drivers/net/bfin_mac.c b/drivers/net/bfin_mac.c
index 8ffea3990d07..0b23bc4f56c6 100644
--- a/drivers/net/bfin_mac.c
+++ b/drivers/net/bfin_mac.c
@@ -33,6 +33,7 @@
33#include <asm/dma.h> 33#include <asm/dma.h>
34#include <linux/dma-mapping.h> 34#include <linux/dma-mapping.h>
35 35
36#include <asm/dpmc.h>
36#include <asm/blackfin.h> 37#include <asm/blackfin.h>
37#include <asm/cacheflush.h> 38#include <asm/cacheflush.h>
38#include <asm/portmux.h> 39#include <asm/portmux.h>
@@ -386,8 +387,8 @@ static int mii_probe(struct net_device *dev)
386 u32 sclk, mdc_div; 387 u32 sclk, mdc_div;
387 388
388 /* Enable PHY output early */ 389 /* Enable PHY output early */
389 if (!(bfin_read_VR_CTL() & PHYCLKOE)) 390 if (!(bfin_read_VR_CTL() & CLKBUFOE))
390 bfin_write_VR_CTL(bfin_read_VR_CTL() | PHYCLKOE); 391 bfin_write_VR_CTL(bfin_read_VR_CTL() | CLKBUFOE);
391 392
392 sclk = get_sclk(); 393 sclk = get_sclk();
393 mdc_div = ((sclk / MDC_CLK) / 2) - 1; 394 mdc_div = ((sclk / MDC_CLK) / 2) - 1;
diff --git a/drivers/net/bnx2.c b/drivers/net/bnx2.c
index 4bfc80812926..65df1de447e4 100644
--- a/drivers/net/bnx2.c
+++ b/drivers/net/bnx2.c
@@ -653,12 +653,20 @@ static void
653bnx2_netif_stop(struct bnx2 *bp) 653bnx2_netif_stop(struct bnx2 *bp)
654{ 654{
655 bnx2_cnic_stop(bp); 655 bnx2_cnic_stop(bp);
656 bnx2_disable_int_sync(bp);
657 if (netif_running(bp->dev)) { 656 if (netif_running(bp->dev)) {
657 int i;
658
658 bnx2_napi_disable(bp); 659 bnx2_napi_disable(bp);
659 netif_tx_disable(bp->dev); 660 netif_tx_disable(bp->dev);
660 bp->dev->trans_start = jiffies; /* prevent tx timeout */ 661 /* prevent tx timeout */
662 for (i = 0; i < bp->dev->num_tx_queues; i++) {
663 struct netdev_queue *txq;
664
665 txq = netdev_get_tx_queue(bp->dev, i);
666 txq->trans_start = jiffies;
667 }
661 } 668 }
669 bnx2_disable_int_sync(bp);
662} 670}
663 671
664static void 672static void
diff --git a/drivers/net/bnx2x_main.c b/drivers/net/bnx2x_main.c
index 77ba13520d87..306c2b8165e2 100644
--- a/drivers/net/bnx2x_main.c
+++ b/drivers/net/bnx2x_main.c
@@ -7593,6 +7593,8 @@ static int bnx2x_nic_load(struct bnx2x *bp, int load_mode)
7593 if (bp->cnic_eth_dev.drv_state & CNIC_DRV_STATE_REGD) { 7593 if (bp->cnic_eth_dev.drv_state & CNIC_DRV_STATE_REGD) {
7594 bnx2x_set_iscsi_eth_mac_addr(bp, 1); 7594 bnx2x_set_iscsi_eth_mac_addr(bp, 1);
7595 bp->cnic_flags |= BNX2X_CNIC_FLAG_MAC_SET; 7595 bp->cnic_flags |= BNX2X_CNIC_FLAG_MAC_SET;
7596 bnx2x_init_sb(bp, bp->cnic_sb, bp->cnic_sb_mapping,
7597 CNIC_SB_ID(bp));
7596 } 7598 }
7597 mutex_unlock(&bp->cnic_mutex); 7599 mutex_unlock(&bp->cnic_mutex);
7598#endif 7600#endif
diff --git a/drivers/net/bonding/bond_3ad.c b/drivers/net/bonding/bond_3ad.c
index d69e6838f21e..822f586d72af 100644
--- a/drivers/net/bonding/bond_3ad.c
+++ b/drivers/net/bonding/bond_3ad.c
@@ -20,6 +20,8 @@
20 * 20 *
21 */ 21 */
22 22
23#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
24
23#include <linux/skbuff.h> 25#include <linux/skbuff.h>
24#include <linux/if_ether.h> 26#include <linux/if_ether.h>
25#include <linux/netdevice.h> 27#include <linux/netdevice.h>
@@ -352,7 +354,8 @@ static u16 __get_link_speed(struct port *port)
352 } 354 }
353 } 355 }
354 356
355 pr_debug("Port %d Received link speed %d update from adapter\n", port->actor_port_number, speed); 357 pr_debug("Port %d Received link speed %d update from adapter\n",
358 port->actor_port_number, speed);
356 return speed; 359 return speed;
357} 360}
358 361
@@ -378,12 +381,14 @@ static u8 __get_duplex(struct port *port)
378 switch (slave->duplex) { 381 switch (slave->duplex) {
379 case DUPLEX_FULL: 382 case DUPLEX_FULL:
380 retval=0x1; 383 retval=0x1;
381 pr_debug("Port %d Received status full duplex update from adapter\n", port->actor_port_number); 384 pr_debug("Port %d Received status full duplex update from adapter\n",
385 port->actor_port_number);
382 break; 386 break;
383 case DUPLEX_HALF: 387 case DUPLEX_HALF:
384 default: 388 default:
385 retval=0x0; 389 retval=0x0;
386 pr_debug("Port %d Received status NOT full duplex update from adapter\n", port->actor_port_number); 390 pr_debug("Port %d Received status NOT full duplex update from adapter\n",
391 port->actor_port_number);
387 break; 392 break;
388 } 393 }
389 } 394 }
@@ -980,7 +985,9 @@ static void ad_mux_machine(struct port *port)
980 985
981 // check if the state machine was changed 986 // check if the state machine was changed
982 if (port->sm_mux_state != last_state) { 987 if (port->sm_mux_state != last_state) {
983 pr_debug("Mux Machine: Port=%d, Last State=%d, Curr State=%d\n", port->actor_port_number, last_state, port->sm_mux_state); 988 pr_debug("Mux Machine: Port=%d, Last State=%d, Curr State=%d\n",
989 port->actor_port_number, last_state,
990 port->sm_mux_state);
984 switch (port->sm_mux_state) { 991 switch (port->sm_mux_state) {
985 case AD_MUX_DETACHED: 992 case AD_MUX_DETACHED:
986 __detach_bond_from_agg(port); 993 __detach_bond_from_agg(port);
@@ -1079,7 +1086,9 @@ static void ad_rx_machine(struct lacpdu *lacpdu, struct port *port)
1079 1086
1080 // check if the State machine was changed or new lacpdu arrived 1087 // check if the State machine was changed or new lacpdu arrived
1081 if ((port->sm_rx_state != last_state) || (lacpdu)) { 1088 if ((port->sm_rx_state != last_state) || (lacpdu)) {
1082 pr_debug("Rx Machine: Port=%d, Last State=%d, Curr State=%d\n", port->actor_port_number, last_state, port->sm_rx_state); 1089 pr_debug("Rx Machine: Port=%d, Last State=%d, Curr State=%d\n",
1090 port->actor_port_number, last_state,
1091 port->sm_rx_state);
1083 switch (port->sm_rx_state) { 1092 switch (port->sm_rx_state) {
1084 case AD_RX_INITIALIZE: 1093 case AD_RX_INITIALIZE:
1085 if (!(port->actor_oper_port_key & AD_DUPLEX_KEY_BITS)) { 1094 if (!(port->actor_oper_port_key & AD_DUPLEX_KEY_BITS)) {
@@ -1126,9 +1135,8 @@ static void ad_rx_machine(struct lacpdu *lacpdu, struct port *port)
1126 // detect loopback situation 1135 // detect loopback situation
1127 if (!MAC_ADDRESS_COMPARE(&(lacpdu->actor_system), &(port->actor_system))) { 1136 if (!MAC_ADDRESS_COMPARE(&(lacpdu->actor_system), &(port->actor_system))) {
1128 // INFO_RECEIVED_LOOPBACK_FRAMES 1137 // INFO_RECEIVED_LOOPBACK_FRAMES
1129 pr_err(DRV_NAME ": %s: An illegal loopback occurred on " 1138 pr_err("%s: An illegal loopback occurred on adapter (%s).\n"
1130 "adapter (%s). Check the configuration to verify that all " 1139 "Check the configuration to verify that all adapters are connected to 802.3ad compliant switch ports\n",
1131 "Adapters are connected to 802.3ad compliant switch ports\n",
1132 port->slave->dev->master->name, port->slave->dev->name); 1140 port->slave->dev->master->name, port->slave->dev->name);
1133 __release_rx_machine_lock(port); 1141 __release_rx_machine_lock(port);
1134 return; 1142 return;
@@ -1166,7 +1174,8 @@ static void ad_tx_machine(struct port *port)
1166 __update_lacpdu_from_port(port); 1174 __update_lacpdu_from_port(port);
1167 1175
1168 if (ad_lacpdu_send(port) >= 0) { 1176 if (ad_lacpdu_send(port) >= 0) {
1169 pr_debug("Sent LACPDU on port %d\n", port->actor_port_number); 1177 pr_debug("Sent LACPDU on port %d\n",
1178 port->actor_port_number);
1170 1179
1171 /* mark ntt as false, so it will not be sent again until 1180 /* mark ntt as false, so it will not be sent again until
1172 demanded */ 1181 demanded */
@@ -1241,7 +1250,9 @@ static void ad_periodic_machine(struct port *port)
1241 1250
1242 // check if the state machine was changed 1251 // check if the state machine was changed
1243 if (port->sm_periodic_state != last_state) { 1252 if (port->sm_periodic_state != last_state) {
1244 pr_debug("Periodic Machine: Port=%d, Last State=%d, Curr State=%d\n", port->actor_port_number, last_state, port->sm_periodic_state); 1253 pr_debug("Periodic Machine: Port=%d, Last State=%d, Curr State=%d\n",
1254 port->actor_port_number, last_state,
1255 port->sm_periodic_state);
1245 switch (port->sm_periodic_state) { 1256 switch (port->sm_periodic_state) {
1246 case AD_NO_PERIODIC: 1257 case AD_NO_PERIODIC:
1247 port->sm_periodic_timer_counter = 0; // zero timer 1258 port->sm_periodic_timer_counter = 0; // zero timer
@@ -1298,7 +1309,9 @@ static void ad_port_selection_logic(struct port *port)
1298 port->next_port_in_aggregator=NULL; 1309 port->next_port_in_aggregator=NULL;
1299 port->actor_port_aggregator_identifier=0; 1310 port->actor_port_aggregator_identifier=0;
1300 1311
1301 pr_debug("Port %d left LAG %d\n", port->actor_port_number, temp_aggregator->aggregator_identifier); 1312 pr_debug("Port %d left LAG %d\n",
1313 port->actor_port_number,
1314 temp_aggregator->aggregator_identifier);
1302 // if the aggregator is empty, clear its parameters, and set it ready to be attached 1315 // if the aggregator is empty, clear its parameters, and set it ready to be attached
1303 if (!temp_aggregator->lag_ports) { 1316 if (!temp_aggregator->lag_ports) {
1304 ad_clear_agg(temp_aggregator); 1317 ad_clear_agg(temp_aggregator);
@@ -1307,9 +1320,7 @@ static void ad_port_selection_logic(struct port *port)
1307 } 1320 }
1308 } 1321 }
1309 if (!curr_port) { // meaning: the port was related to an aggregator but was not on the aggregator port list 1322 if (!curr_port) { // meaning: the port was related to an aggregator but was not on the aggregator port list
1310 pr_warning(DRV_NAME ": %s: Warning: Port %d (on %s) " 1323 pr_warning("%s: Warning: Port %d (on %s) was related to aggregator %d but was not on its port list\n",
1311 "was related to aggregator %d but was not "
1312 "on its port list\n",
1313 port->slave->dev->master->name, 1324 port->slave->dev->master->name,
1314 port->actor_port_number, 1325 port->actor_port_number,
1315 port->slave->dev->name, 1326 port->slave->dev->name,
@@ -1343,7 +1354,9 @@ static void ad_port_selection_logic(struct port *port)
1343 port->next_port_in_aggregator=aggregator->lag_ports; 1354 port->next_port_in_aggregator=aggregator->lag_ports;
1344 port->aggregator->num_of_ports++; 1355 port->aggregator->num_of_ports++;
1345 aggregator->lag_ports=port; 1356 aggregator->lag_ports=port;
1346 pr_debug("Port %d joined LAG %d(existing LAG)\n", port->actor_port_number, port->aggregator->aggregator_identifier); 1357 pr_debug("Port %d joined LAG %d(existing LAG)\n",
1358 port->actor_port_number,
1359 port->aggregator->aggregator_identifier);
1347 1360
1348 // mark this port as selected 1361 // mark this port as selected
1349 port->sm_vars |= AD_PORT_SELECTED; 1362 port->sm_vars |= AD_PORT_SELECTED;
@@ -1380,10 +1393,11 @@ static void ad_port_selection_logic(struct port *port)
1380 // mark this port as selected 1393 // mark this port as selected
1381 port->sm_vars |= AD_PORT_SELECTED; 1394 port->sm_vars |= AD_PORT_SELECTED;
1382 1395
1383 pr_debug("Port %d joined LAG %d(new LAG)\n", port->actor_port_number, port->aggregator->aggregator_identifier); 1396 pr_debug("Port %d joined LAG %d(new LAG)\n",
1397 port->actor_port_number,
1398 port->aggregator->aggregator_identifier);
1384 } else { 1399 } else {
1385 pr_err(DRV_NAME ": %s: Port %d (on %s) did not find " 1400 pr_err("%s: Port %d (on %s) did not find a suitable aggregator\n",
1386 "a suitable aggregator\n",
1387 port->slave->dev->master->name, 1401 port->slave->dev->master->name,
1388 port->actor_port_number, port->slave->dev->name); 1402 port->actor_port_number, port->slave->dev->name);
1389 } 1403 }
@@ -1460,8 +1474,7 @@ static struct aggregator *ad_agg_selection_test(struct aggregator *best,
1460 break; 1474 break;
1461 1475
1462 default: 1476 default:
1463 pr_warning(DRV_NAME 1477 pr_warning("%s: Impossible agg select mode %d\n",
1464 ": %s: Impossible agg select mode %d\n",
1465 curr->slave->dev->master->name, 1478 curr->slave->dev->master->name,
1466 __get_agg_selection_mode(curr->lag_ports)); 1479 __get_agg_selection_mode(curr->lag_ports));
1467 break; 1480 break;
@@ -1546,40 +1559,38 @@ static void ad_agg_selection_logic(struct aggregator *agg)
1546 // if there is new best aggregator, activate it 1559 // if there is new best aggregator, activate it
1547 if (best) { 1560 if (best) {
1548 pr_debug("best Agg=%d; P=%d; a k=%d; p k=%d; Ind=%d; Act=%d\n", 1561 pr_debug("best Agg=%d; P=%d; a k=%d; p k=%d; Ind=%d; Act=%d\n",
1549 best->aggregator_identifier, best->num_of_ports, 1562 best->aggregator_identifier, best->num_of_ports,
1550 best->actor_oper_aggregator_key, 1563 best->actor_oper_aggregator_key,
1551 best->partner_oper_aggregator_key, 1564 best->partner_oper_aggregator_key,
1552 best->is_individual, best->is_active); 1565 best->is_individual, best->is_active);
1553 pr_debug("best ports %p slave %p %s\n", 1566 pr_debug("best ports %p slave %p %s\n",
1554 best->lag_ports, best->slave, 1567 best->lag_ports, best->slave,
1555 best->slave ? best->slave->dev->name : "NULL"); 1568 best->slave ? best->slave->dev->name : "NULL");
1556 1569
1557 for (agg = __get_first_agg(best->lag_ports); agg; 1570 for (agg = __get_first_agg(best->lag_ports); agg;
1558 agg = __get_next_agg(agg)) { 1571 agg = __get_next_agg(agg)) {
1559 1572
1560 pr_debug("Agg=%d; P=%d; a k=%d; p k=%d; Ind=%d; Act=%d\n", 1573 pr_debug("Agg=%d; P=%d; a k=%d; p k=%d; Ind=%d; Act=%d\n",
1561 agg->aggregator_identifier, agg->num_of_ports, 1574 agg->aggregator_identifier, agg->num_of_ports,
1562 agg->actor_oper_aggregator_key, 1575 agg->actor_oper_aggregator_key,
1563 agg->partner_oper_aggregator_key, 1576 agg->partner_oper_aggregator_key,
1564 agg->is_individual, agg->is_active); 1577 agg->is_individual, agg->is_active);
1565 } 1578 }
1566 1579
1567 // check if any partner replys 1580 // check if any partner replys
1568 if (best->is_individual) { 1581 if (best->is_individual) {
1569 pr_warning(DRV_NAME ": %s: Warning: No 802.3ad" 1582 pr_warning("%s: Warning: No 802.3ad response from the link partner for any adapters in the bond\n",
1570 " response from the link partner for any" 1583 best->slave ? best->slave->dev->master->name : "NULL");
1571 " adapters in the bond\n",
1572 best->slave->dev->master->name);
1573 } 1584 }
1574 1585
1575 best->is_active = 1; 1586 best->is_active = 1;
1576 pr_debug("LAG %d chosen as the active LAG\n", 1587 pr_debug("LAG %d chosen as the active LAG\n",
1577 best->aggregator_identifier); 1588 best->aggregator_identifier);
1578 pr_debug("Agg=%d; P=%d; a k=%d; p k=%d; Ind=%d; Act=%d\n", 1589 pr_debug("Agg=%d; P=%d; a k=%d; p k=%d; Ind=%d; Act=%d\n",
1579 best->aggregator_identifier, best->num_of_ports, 1590 best->aggregator_identifier, best->num_of_ports,
1580 best->actor_oper_aggregator_key, 1591 best->actor_oper_aggregator_key,
1581 best->partner_oper_aggregator_key, 1592 best->partner_oper_aggregator_key,
1582 best->is_individual, best->is_active); 1593 best->is_individual, best->is_active);
1583 1594
1584 // disable the ports that were related to the former active_aggregator 1595 // disable the ports that were related to the former active_aggregator
1585 if (active) { 1596 if (active) {
@@ -1633,7 +1644,8 @@ static void ad_clear_agg(struct aggregator *aggregator)
1633 aggregator->lag_ports = NULL; 1644 aggregator->lag_ports = NULL;
1634 aggregator->is_active = 0; 1645 aggregator->is_active = 0;
1635 aggregator->num_of_ports = 0; 1646 aggregator->num_of_ports = 0;
1636 pr_debug("LAG %d was cleared\n", aggregator->aggregator_identifier); 1647 pr_debug("LAG %d was cleared\n",
1648 aggregator->aggregator_identifier);
1637 } 1649 }
1638} 1650}
1639 1651
@@ -1728,7 +1740,9 @@ static void ad_initialize_port(struct port *port, int lacp_fast)
1728static void ad_enable_collecting_distributing(struct port *port) 1740static void ad_enable_collecting_distributing(struct port *port)
1729{ 1741{
1730 if (port->aggregator->is_active) { 1742 if (port->aggregator->is_active) {
1731 pr_debug("Enabling port %d(LAG %d)\n", port->actor_port_number, port->aggregator->aggregator_identifier); 1743 pr_debug("Enabling port %d(LAG %d)\n",
1744 port->actor_port_number,
1745 port->aggregator->aggregator_identifier);
1732 __enable_port(port); 1746 __enable_port(port);
1733 } 1747 }
1734} 1748}
@@ -1741,7 +1755,9 @@ static void ad_enable_collecting_distributing(struct port *port)
1741static void ad_disable_collecting_distributing(struct port *port) 1755static void ad_disable_collecting_distributing(struct port *port)
1742{ 1756{
1743 if (port->aggregator && MAC_ADDRESS_COMPARE(&(port->aggregator->partner_system), &(null_mac_addr))) { 1757 if (port->aggregator && MAC_ADDRESS_COMPARE(&(port->aggregator->partner_system), &(null_mac_addr))) {
1744 pr_debug("Disabling port %d(LAG %d)\n", port->actor_port_number, port->aggregator->aggregator_identifier); 1758 pr_debug("Disabling port %d(LAG %d)\n",
1759 port->actor_port_number,
1760 port->aggregator->aggregator_identifier);
1745 __disable_port(port); 1761 __disable_port(port);
1746 } 1762 }
1747} 1763}
@@ -1779,7 +1795,8 @@ static void ad_marker_info_send(struct port *port)
1779 1795
1780 // send the marker information 1796 // send the marker information
1781 if (ad_marker_send(port, &marker) >= 0) { 1797 if (ad_marker_send(port, &marker) >= 0) {
1782 pr_debug("Sent Marker Information on port %d\n", port->actor_port_number); 1798 pr_debug("Sent Marker Information on port %d\n",
1799 port->actor_port_number);
1783 } 1800 }
1784} 1801}
1785#endif 1802#endif
@@ -1803,7 +1820,8 @@ static void ad_marker_info_received(struct bond_marker *marker_info,
1803 // send the marker response 1820 // send the marker response
1804 1821
1805 if (ad_marker_send(port, &marker) >= 0) { 1822 if (ad_marker_send(port, &marker) >= 0) {
1806 pr_debug("Sent Marker Response on port %d\n", port->actor_port_number); 1823 pr_debug("Sent Marker Response on port %d\n",
1824 port->actor_port_number);
1807 } 1825 }
1808} 1826}
1809 1827
@@ -1889,8 +1907,7 @@ int bond_3ad_bind_slave(struct slave *slave)
1889 struct aggregator *aggregator; 1907 struct aggregator *aggregator;
1890 1908
1891 if (bond == NULL) { 1909 if (bond == NULL) {
1892 pr_err(DRV_NAME ": %s: The slave %s is not attached to " 1910 pr_err("%s: The slave %s is not attached to its bond\n",
1893 "its bond\n",
1894 slave->dev->master->name, slave->dev->name); 1911 slave->dev->master->name, slave->dev->name);
1895 return -1; 1912 return -1;
1896 } 1913 }
@@ -1966,13 +1983,13 @@ void bond_3ad_unbind_slave(struct slave *slave)
1966 1983
1967 // if slave is null, the whole port is not initialized 1984 // if slave is null, the whole port is not initialized
1968 if (!port->slave) { 1985 if (!port->slave) {
1969 pr_warning(DRV_NAME ": Warning: %s: Trying to " 1986 pr_warning("Warning: %s: Trying to unbind an uninitialized port on %s\n",
1970 "unbind an uninitialized port on %s\n",
1971 slave->dev->master->name, slave->dev->name); 1987 slave->dev->master->name, slave->dev->name);
1972 return; 1988 return;
1973 } 1989 }
1974 1990
1975 pr_debug("Unbinding Link Aggregation Group %d\n", aggregator->aggregator_identifier); 1991 pr_debug("Unbinding Link Aggregation Group %d\n",
1992 aggregator->aggregator_identifier);
1976 1993
1977 /* Tell the partner that this port is not suitable for aggregation */ 1994 /* Tell the partner that this port is not suitable for aggregation */
1978 port->actor_oper_port_state &= ~AD_STATE_AGGREGATION; 1995 port->actor_oper_port_state &= ~AD_STATE_AGGREGATION;
@@ -1996,10 +2013,12 @@ void bond_3ad_unbind_slave(struct slave *slave)
1996 // if new aggregator found, copy the aggregator's parameters 2013 // if new aggregator found, copy the aggregator's parameters
1997 // and connect the related lag_ports to the new aggregator 2014 // and connect the related lag_ports to the new aggregator
1998 if ((new_aggregator) && ((!new_aggregator->lag_ports) || ((new_aggregator->lag_ports == port) && !new_aggregator->lag_ports->next_port_in_aggregator))) { 2015 if ((new_aggregator) && ((!new_aggregator->lag_ports) || ((new_aggregator->lag_ports == port) && !new_aggregator->lag_ports->next_port_in_aggregator))) {
1999 pr_debug("Some port(s) related to LAG %d - replaceing with LAG %d\n", aggregator->aggregator_identifier, new_aggregator->aggregator_identifier); 2016 pr_debug("Some port(s) related to LAG %d - replaceing with LAG %d\n",
2017 aggregator->aggregator_identifier,
2018 new_aggregator->aggregator_identifier);
2000 2019
2001 if ((new_aggregator->lag_ports == port) && new_aggregator->is_active) { 2020 if ((new_aggregator->lag_ports == port) && new_aggregator->is_active) {
2002 pr_info(DRV_NAME ": %s: Removing an active aggregator\n", 2021 pr_info("%s: Removing an active aggregator\n",
2003 aggregator->slave->dev->master->name); 2022 aggregator->slave->dev->master->name);
2004 // select new active aggregator 2023 // select new active aggregator
2005 select_new_active_agg = 1; 2024 select_new_active_agg = 1;
@@ -2030,8 +2049,7 @@ void bond_3ad_unbind_slave(struct slave *slave)
2030 ad_agg_selection_logic(__get_first_agg(port)); 2049 ad_agg_selection_logic(__get_first_agg(port));
2031 } 2050 }
2032 } else { 2051 } else {
2033 pr_warning(DRV_NAME ": %s: Warning: unbinding aggregator, " 2052 pr_warning("%s: Warning: unbinding aggregator, and could not find a new aggregator for its ports\n",
2034 "and could not find a new aggregator for its ports\n",
2035 slave->dev->master->name); 2053 slave->dev->master->name);
2036 } 2054 }
2037 } else { // in case that the only port related to this aggregator is the one we want to remove 2055 } else { // in case that the only port related to this aggregator is the one we want to remove
@@ -2039,7 +2057,7 @@ void bond_3ad_unbind_slave(struct slave *slave)
2039 // clear the aggregator 2057 // clear the aggregator
2040 ad_clear_agg(aggregator); 2058 ad_clear_agg(aggregator);
2041 if (select_new_active_agg) { 2059 if (select_new_active_agg) {
2042 pr_info(DRV_NAME ": %s: Removing an active aggregator\n", 2060 pr_info("%s: Removing an active aggregator\n",
2043 slave->dev->master->name); 2061 slave->dev->master->name);
2044 // select new active aggregator 2062 // select new active aggregator
2045 ad_agg_selection_logic(__get_first_agg(port)); 2063 ad_agg_selection_logic(__get_first_agg(port));
@@ -2066,7 +2084,7 @@ void bond_3ad_unbind_slave(struct slave *slave)
2066 // clear the aggregator 2084 // clear the aggregator
2067 ad_clear_agg(temp_aggregator); 2085 ad_clear_agg(temp_aggregator);
2068 if (select_new_active_agg) { 2086 if (select_new_active_agg) {
2069 pr_info(DRV_NAME ": %s: Removing an active aggregator\n", 2087 pr_info("%s: Removing an active aggregator\n",
2070 slave->dev->master->name); 2088 slave->dev->master->name);
2071 // select new active aggregator 2089 // select new active aggregator
2072 ad_agg_selection_logic(__get_first_agg(port)); 2090 ad_agg_selection_logic(__get_first_agg(port));
@@ -2115,8 +2133,8 @@ void bond_3ad_state_machine_handler(struct work_struct *work)
2115 // select the active aggregator for the bond 2133 // select the active aggregator for the bond
2116 if ((port = __get_first_port(bond))) { 2134 if ((port = __get_first_port(bond))) {
2117 if (!port->slave) { 2135 if (!port->slave) {
2118 pr_warning(DRV_NAME ": %s: Warning: bond's first port is " 2136 pr_warning("%s: Warning: bond's first port is uninitialized\n",
2119 "uninitialized\n", bond->dev->name); 2137 bond->dev->name);
2120 goto re_arm; 2138 goto re_arm;
2121 } 2139 }
2122 2140
@@ -2129,8 +2147,8 @@ void bond_3ad_state_machine_handler(struct work_struct *work)
2129 // for each port run the state machines 2147 // for each port run the state machines
2130 for (port = __get_first_port(bond); port; port = __get_next_port(port)) { 2148 for (port = __get_first_port(bond); port; port = __get_next_port(port)) {
2131 if (!port->slave) { 2149 if (!port->slave) {
2132 pr_warning(DRV_NAME ": %s: Warning: Found an uninitialized " 2150 pr_warning("%s: Warning: Found an uninitialized port\n",
2133 "port\n", bond->dev->name); 2151 bond->dev->name);
2134 goto re_arm; 2152 goto re_arm;
2135 } 2153 }
2136 2154
@@ -2171,15 +2189,15 @@ static void bond_3ad_rx_indication(struct lacpdu *lacpdu, struct slave *slave, u
2171 port = &(SLAVE_AD_INFO(slave).port); 2189 port = &(SLAVE_AD_INFO(slave).port);
2172 2190
2173 if (!port->slave) { 2191 if (!port->slave) {
2174 pr_warning(DRV_NAME ": %s: Warning: port of slave %s " 2192 pr_warning("%s: Warning: port of slave %s is uninitialized\n",
2175 "is uninitialized\n",
2176 slave->dev->name, slave->dev->master->name); 2193 slave->dev->name, slave->dev->master->name);
2177 return; 2194 return;
2178 } 2195 }
2179 2196
2180 switch (lacpdu->subtype) { 2197 switch (lacpdu->subtype) {
2181 case AD_TYPE_LACPDU: 2198 case AD_TYPE_LACPDU:
2182 pr_debug("Received LACPDU on port %d\n", port->actor_port_number); 2199 pr_debug("Received LACPDU on port %d\n",
2200 port->actor_port_number);
2183 ad_rx_machine(lacpdu, port); 2201 ad_rx_machine(lacpdu, port);
2184 break; 2202 break;
2185 2203
@@ -2188,17 +2206,20 @@ static void bond_3ad_rx_indication(struct lacpdu *lacpdu, struct slave *slave, u
2188 2206
2189 switch (((struct bond_marker *)lacpdu)->tlv_type) { 2207 switch (((struct bond_marker *)lacpdu)->tlv_type) {
2190 case AD_MARKER_INFORMATION_SUBTYPE: 2208 case AD_MARKER_INFORMATION_SUBTYPE:
2191 pr_debug("Received Marker Information on port %d\n", port->actor_port_number); 2209 pr_debug("Received Marker Information on port %d\n",
2210 port->actor_port_number);
2192 ad_marker_info_received((struct bond_marker *)lacpdu, port); 2211 ad_marker_info_received((struct bond_marker *)lacpdu, port);
2193 break; 2212 break;
2194 2213
2195 case AD_MARKER_RESPONSE_SUBTYPE: 2214 case AD_MARKER_RESPONSE_SUBTYPE:
2196 pr_debug("Received Marker Response on port %d\n", port->actor_port_number); 2215 pr_debug("Received Marker Response on port %d\n",
2216 port->actor_port_number);
2197 ad_marker_response_received((struct bond_marker *)lacpdu, port); 2217 ad_marker_response_received((struct bond_marker *)lacpdu, port);
2198 break; 2218 break;
2199 2219
2200 default: 2220 default:
2201 pr_debug("Received an unknown Marker subtype on slot %d\n", port->actor_port_number); 2221 pr_debug("Received an unknown Marker subtype on slot %d\n",
2222 port->actor_port_number);
2202 } 2223 }
2203 } 2224 }
2204 } 2225 }
@@ -2218,8 +2239,7 @@ void bond_3ad_adapter_speed_changed(struct slave *slave)
2218 2239
2219 // if slave is null, the whole port is not initialized 2240 // if slave is null, the whole port is not initialized
2220 if (!port->slave) { 2241 if (!port->slave) {
2221 pr_warning(DRV_NAME ": Warning: %s: speed " 2242 pr_warning("Warning: %s: speed changed for uninitialized port on %s\n",
2222 "changed for uninitialized port on %s\n",
2223 slave->dev->master->name, slave->dev->name); 2243 slave->dev->master->name, slave->dev->name);
2224 return; 2244 return;
2225 } 2245 }
@@ -2246,8 +2266,7 @@ void bond_3ad_adapter_duplex_changed(struct slave *slave)
2246 2266
2247 // if slave is null, the whole port is not initialized 2267 // if slave is null, the whole port is not initialized
2248 if (!port->slave) { 2268 if (!port->slave) {
2249 pr_warning(DRV_NAME ": %s: Warning: duplex changed " 2269 pr_warning("%s: Warning: duplex changed for uninitialized port on %s\n",
2250 "for uninitialized port on %s\n",
2251 slave->dev->master->name, slave->dev->name); 2270 slave->dev->master->name, slave->dev->name);
2252 return; 2271 return;
2253 } 2272 }
@@ -2275,8 +2294,7 @@ void bond_3ad_handle_link_change(struct slave *slave, char link)
2275 2294
2276 // if slave is null, the whole port is not initialized 2295 // if slave is null, the whole port is not initialized
2277 if (!port->slave) { 2296 if (!port->slave) {
2278 pr_warning(DRV_NAME ": Warning: %s: link status changed for " 2297 pr_warning("Warning: %s: link status changed for uninitialized port on %s\n",
2279 "uninitialized port on %s\n",
2280 slave->dev->master->name, slave->dev->name); 2298 slave->dev->master->name, slave->dev->name);
2281 return; 2299 return;
2282 } 2300 }
@@ -2381,8 +2399,8 @@ int bond_3ad_xmit_xor(struct sk_buff *skb, struct net_device *dev)
2381 } 2399 }
2382 2400
2383 if (bond_3ad_get_active_agg_info(bond, &ad_info)) { 2401 if (bond_3ad_get_active_agg_info(bond, &ad_info)) {
2384 pr_debug(DRV_NAME ": %s: Error: " 2402 pr_debug("%s: Error: bond_3ad_get_active_agg_info failed\n",
2385 "bond_3ad_get_active_agg_info failed\n", dev->name); 2403 dev->name);
2386 goto out; 2404 goto out;
2387 } 2405 }
2388 2406
@@ -2391,8 +2409,7 @@ int bond_3ad_xmit_xor(struct sk_buff *skb, struct net_device *dev)
2391 2409
2392 if (slaves_in_agg == 0) { 2410 if (slaves_in_agg == 0) {
2393 /*the aggregator is empty*/ 2411 /*the aggregator is empty*/
2394 pr_debug(DRV_NAME ": %s: Error: active aggregator is empty\n", 2412 pr_debug("%s: Error: active aggregator is empty\n", dev->name);
2395 dev->name);
2396 goto out; 2413 goto out;
2397 } 2414 }
2398 2415
@@ -2410,8 +2427,8 @@ int bond_3ad_xmit_xor(struct sk_buff *skb, struct net_device *dev)
2410 } 2427 }
2411 2428
2412 if (slave_agg_no >= 0) { 2429 if (slave_agg_no >= 0) {
2413 pr_err(DRV_NAME ": %s: Error: Couldn't find a slave to tx on " 2430 pr_err("%s: Error: Couldn't find a slave to tx on for aggregator ID %d\n",
2414 "for aggregator ID %d\n", dev->name, agg_id); 2431 dev->name, agg_id);
2415 goto out; 2432 goto out;
2416 } 2433 }
2417 2434
diff --git a/drivers/net/bonding/bond_alb.c b/drivers/net/bonding/bond_alb.c
index 00ab51ef3129..40fdc41446cc 100644
--- a/drivers/net/bonding/bond_alb.c
+++ b/drivers/net/bonding/bond_alb.c
@@ -20,6 +20,8 @@
20 * 20 *
21 */ 21 */
22 22
23#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
24
23#include <linux/skbuff.h> 25#include <linux/skbuff.h>
24#include <linux/netdevice.h> 26#include <linux/netdevice.h>
25#include <linux/etherdevice.h> 27#include <linux/etherdevice.h>
@@ -201,8 +203,7 @@ static int tlb_initialize(struct bonding *bond)
201 203
202 new_hashtbl = kzalloc(size, GFP_KERNEL); 204 new_hashtbl = kzalloc(size, GFP_KERNEL);
203 if (!new_hashtbl) { 205 if (!new_hashtbl) {
204 pr_err(DRV_NAME 206 pr_err("%s: Error: Failed to allocate TLB hash table\n",
205 ": %s: Error: Failed to allocate TLB hash table\n",
206 bond->dev->name); 207 bond->dev->name);
207 return -1; 208 return -1;
208 } 209 }
@@ -514,8 +515,7 @@ static void rlb_update_client(struct rlb_client_info *client_info)
514 client_info->slave->dev->dev_addr, 515 client_info->slave->dev->dev_addr,
515 client_info->mac_dst); 516 client_info->mac_dst);
516 if (!skb) { 517 if (!skb) {
517 pr_err(DRV_NAME 518 pr_err("%s: Error: failed to create an ARP packet\n",
518 ": %s: Error: failed to create an ARP packet\n",
519 client_info->slave->dev->master->name); 519 client_info->slave->dev->master->name);
520 continue; 520 continue;
521 } 521 }
@@ -525,8 +525,7 @@ static void rlb_update_client(struct rlb_client_info *client_info)
525 if (client_info->tag) { 525 if (client_info->tag) {
526 skb = vlan_put_tag(skb, client_info->vlan_id); 526 skb = vlan_put_tag(skb, client_info->vlan_id);
527 if (!skb) { 527 if (!skb) {
528 pr_err(DRV_NAME 528 pr_err("%s: Error: failed to insert VLAN tag\n",
529 ": %s: Error: failed to insert VLAN tag\n",
530 client_info->slave->dev->master->name); 529 client_info->slave->dev->master->name);
531 continue; 530 continue;
532 } 531 }
@@ -609,9 +608,7 @@ static void rlb_req_update_subnet_clients(struct bonding *bond, __be32 src_ip)
609 client_info = &(bond_info->rx_hashtbl[hash_index]); 608 client_info = &(bond_info->rx_hashtbl[hash_index]);
610 609
611 if (!client_info->slave) { 610 if (!client_info->slave) {
612 pr_err(DRV_NAME 611 pr_err("%s: Error: found a client with no channel in the client's hash table\n",
613 ": %s: Error: found a client with no channel in "
614 "the client's hash table\n",
615 bond->dev->name); 612 bond->dev->name);
616 continue; 613 continue;
617 } 614 }
@@ -806,8 +803,7 @@ static int rlb_initialize(struct bonding *bond)
806 803
807 new_hashtbl = kmalloc(size, GFP_KERNEL); 804 new_hashtbl = kmalloc(size, GFP_KERNEL);
808 if (!new_hashtbl) { 805 if (!new_hashtbl) {
809 pr_err(DRV_NAME 806 pr_err("%s: Error: Failed to allocate RLB hash table\n",
810 ": %s: Error: Failed to allocate RLB hash table\n",
811 bond->dev->name); 807 bond->dev->name);
812 return -1; 808 return -1;
813 } 809 }
@@ -928,8 +924,7 @@ static void alb_send_learning_packets(struct slave *slave, u8 mac_addr[])
928 924
929 skb = vlan_put_tag(skb, vlan->vlan_id); 925 skb = vlan_put_tag(skb, vlan->vlan_id);
930 if (!skb) { 926 if (!skb) {
931 pr_err(DRV_NAME 927 pr_err("%s: Error: failed to insert VLAN tag\n",
932 ": %s: Error: failed to insert VLAN tag\n",
933 bond->dev->name); 928 bond->dev->name);
934 continue; 929 continue;
935 } 930 }
@@ -958,11 +953,8 @@ static int alb_set_slave_mac_addr(struct slave *slave, u8 addr[], int hw)
958 memcpy(s_addr.sa_data, addr, dev->addr_len); 953 memcpy(s_addr.sa_data, addr, dev->addr_len);
959 s_addr.sa_family = dev->type; 954 s_addr.sa_family = dev->type;
960 if (dev_set_mac_address(dev, &s_addr)) { 955 if (dev_set_mac_address(dev, &s_addr)) {
961 pr_err(DRV_NAME 956 pr_err("%s: Error: dev_set_mac_address of dev %s failed!\n"
962 ": %s: Error: dev_set_mac_address of dev %s failed! ALB " 957 "ALB mode requires that the base driver support setting the hw address also when the network device's interface is open\n",
963 "mode requires that the base driver support setting "
964 "the hw address also when the network device's "
965 "interface is open\n",
966 dev->master->name, dev->name); 958 dev->master->name, dev->name);
967 return -EOPNOTSUPP; 959 return -EOPNOTSUPP;
968 } 960 }
@@ -1169,18 +1161,12 @@ static int alb_handle_addr_collision_on_attach(struct bonding *bond, struct slav
1169 alb_set_slave_mac_addr(slave, free_mac_slave->perm_hwaddr, 1161 alb_set_slave_mac_addr(slave, free_mac_slave->perm_hwaddr,
1170 bond->alb_info.rlb_enabled); 1162 bond->alb_info.rlb_enabled);
1171 1163
1172 pr_warning(DRV_NAME 1164 pr_warning("%s: Warning: the hw address of slave %s is in use by the bond; giving it the hw address of %s\n",
1173 ": %s: Warning: the hw address of slave %s is "
1174 "in use by the bond; giving it the hw address "
1175 "of %s\n",
1176 bond->dev->name, slave->dev->name, 1165 bond->dev->name, slave->dev->name,
1177 free_mac_slave->dev->name); 1166 free_mac_slave->dev->name);
1178 1167
1179 } else if (has_bond_addr) { 1168 } else if (has_bond_addr) {
1180 pr_err(DRV_NAME 1169 pr_err("%s: Error: the hw address of slave %s is in use by the bond; couldn't find a slave with a free hw address to give it (this should not have happened)\n",
1181 ": %s: Error: the hw address of slave %s is in use by the "
1182 "bond; couldn't find a slave with a free hw address to "
1183 "give it (this should not have happened)\n",
1184 bond->dev->name, slave->dev->name); 1170 bond->dev->name, slave->dev->name);
1185 return -EFAULT; 1171 return -EFAULT;
1186 } 1172 }
diff --git a/drivers/net/bonding/bond_ipv6.c b/drivers/net/bonding/bond_ipv6.c
index b72e1dc8cf8f..6dd64cf3cb76 100644
--- a/drivers/net/bonding/bond_ipv6.c
+++ b/drivers/net/bonding/bond_ipv6.c
@@ -20,6 +20,8 @@
20 * 20 *
21 */ 21 */
22 22
23#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
24
23#include <linux/types.h> 25#include <linux/types.h>
24#include <linux/if_vlan.h> 26#include <linux/if_vlan.h>
25#include <net/ipv6.h> 27#include <net/ipv6.h>
@@ -74,20 +76,20 @@ static void bond_na_send(struct net_device *slave_dev,
74 addrconf_addr_solict_mult(daddr, &mcaddr); 76 addrconf_addr_solict_mult(daddr, &mcaddr);
75 77
76 pr_debug("ipv6 na on slave %s: dest %pI6, src %pI6\n", 78 pr_debug("ipv6 na on slave %s: dest %pI6, src %pI6\n",
77 slave_dev->name, &mcaddr, daddr); 79 slave_dev->name, &mcaddr, daddr);
78 80
79 skb = ndisc_build_skb(slave_dev, &mcaddr, daddr, &icmp6h, daddr, 81 skb = ndisc_build_skb(slave_dev, &mcaddr, daddr, &icmp6h, daddr,
80 ND_OPT_TARGET_LL_ADDR); 82 ND_OPT_TARGET_LL_ADDR);
81 83
82 if (!skb) { 84 if (!skb) {
83 pr_err(DRV_NAME ": NA packet allocation failed\n"); 85 pr_err("NA packet allocation failed\n");
84 return; 86 return;
85 } 87 }
86 88
87 if (vlan_id) { 89 if (vlan_id) {
88 skb = vlan_put_tag(skb, vlan_id); 90 skb = vlan_put_tag(skb, vlan_id);
89 if (!skb) { 91 if (!skb) {
90 pr_err(DRV_NAME ": failed to insert VLAN tag\n"); 92 pr_err("failed to insert VLAN tag\n");
91 return; 93 return;
92 } 94 }
93 } 95 }
@@ -109,8 +111,8 @@ void bond_send_unsolicited_na(struct bonding *bond)
109 struct inet6_dev *idev; 111 struct inet6_dev *idev;
110 int is_router; 112 int is_router;
111 113
112 pr_debug("bond_send_unsol_na: bond %s slave %s\n", bond->dev->name, 114 pr_debug("%s: bond %s slave %s\n", bond->dev->name,
113 slave ? slave->dev->name : "NULL"); 115 __func__, slave ? slave->dev->name : "NULL");
114 116
115 if (!slave || !bond->send_unsol_na || 117 if (!slave || !bond->send_unsol_na ||
116 test_bit(__LINK_STATE_LINKWATCH_PENDING, &slave->dev->state)) 118 test_bit(__LINK_STATE_LINKWATCH_PENDING, &slave->dev->state))
diff --git a/drivers/net/bonding/bond_main.c b/drivers/net/bonding/bond_main.c
index af9b9c4eb496..efa0e41bf3ec 100644
--- a/drivers/net/bonding/bond_main.c
+++ b/drivers/net/bonding/bond_main.c
@@ -31,6 +31,8 @@
31 * 31 *
32 */ 32 */
33 33
34#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
35
34#include <linux/kernel.h> 36#include <linux/kernel.h>
35#include <linux/module.h> 37#include <linux/module.h>
36#include <linux/types.h> 38#include <linux/types.h>
@@ -260,7 +262,7 @@ static int bond_add_vlan(struct bonding *bond, unsigned short vlan_id)
260 struct vlan_entry *vlan; 262 struct vlan_entry *vlan;
261 263
262 pr_debug("bond: %s, vlan id %d\n", 264 pr_debug("bond: %s, vlan id %d\n",
263 (bond ? bond->dev->name : "None"), vlan_id); 265 (bond ? bond->dev->name : "None"), vlan_id);
264 266
265 vlan = kzalloc(sizeof(struct vlan_entry), GFP_KERNEL); 267 vlan = kzalloc(sizeof(struct vlan_entry), GFP_KERNEL);
266 if (!vlan) 268 if (!vlan)
@@ -303,8 +305,8 @@ static int bond_del_vlan(struct bonding *bond, unsigned short vlan_id)
303 if (bond_is_lb(bond)) 305 if (bond_is_lb(bond))
304 bond_alb_clear_vlan(bond, vlan_id); 306 bond_alb_clear_vlan(bond, vlan_id);
305 307
306 pr_debug("removed VLAN ID %d from bond %s\n", vlan_id, 308 pr_debug("removed VLAN ID %d from bond %s\n",
307 bond->dev->name); 309 vlan_id, bond->dev->name);
308 310
309 kfree(vlan); 311 kfree(vlan);
310 312
@@ -323,8 +325,8 @@ static int bond_del_vlan(struct bonding *bond, unsigned short vlan_id)
323 } 325 }
324 } 326 }
325 327
326 pr_debug("couldn't find VLAN ID %d in bond %s\n", vlan_id, 328 pr_debug("couldn't find VLAN ID %d in bond %s\n",
327 bond->dev->name); 329 vlan_id, bond->dev->name);
328 330
329out: 331out:
330 write_unlock_bh(&bond->lock); 332 write_unlock_bh(&bond->lock);
@@ -348,7 +350,7 @@ static int bond_has_challenged_slaves(struct bonding *bond)
348 bond_for_each_slave(bond, slave, i) { 350 bond_for_each_slave(bond, slave, i) {
349 if (slave->dev->features & NETIF_F_VLAN_CHALLENGED) { 351 if (slave->dev->features & NETIF_F_VLAN_CHALLENGED) {
350 pr_debug("found VLAN challenged slave - %s\n", 352 pr_debug("found VLAN challenged slave - %s\n",
351 slave->dev->name); 353 slave->dev->name);
352 return 1; 354 return 1;
353 } 355 }
354 } 356 }
@@ -499,8 +501,7 @@ static void bond_vlan_rx_add_vid(struct net_device *bond_dev, uint16_t vid)
499 501
500 res = bond_add_vlan(bond, vid); 502 res = bond_add_vlan(bond, vid);
501 if (res) { 503 if (res) {
502 pr_err(DRV_NAME 504 pr_err("%s: Error: Failed to add vlan id %d\n",
503 ": %s: Error: Failed to add vlan id %d\n",
504 bond_dev->name, vid); 505 bond_dev->name, vid);
505 } 506 }
506} 507}
@@ -534,8 +535,7 @@ static void bond_vlan_rx_kill_vid(struct net_device *bond_dev, uint16_t vid)
534 535
535 res = bond_del_vlan(bond, vid); 536 res = bond_del_vlan(bond, vid);
536 if (res) { 537 if (res) {
537 pr_err(DRV_NAME 538 pr_err("%s: Error: Failed to remove vlan id %d\n",
538 ": %s: Error: Failed to remove vlan id %d\n",
539 bond_dev->name, vid); 539 bond_dev->name, vid);
540 } 540 }
541} 541}
@@ -1053,8 +1053,7 @@ static void bond_do_fail_over_mac(struct bonding *bond,
1053 1053
1054 rv = dev_set_mac_address(new_active->dev, &saddr); 1054 rv = dev_set_mac_address(new_active->dev, &saddr);
1055 if (rv) { 1055 if (rv) {
1056 pr_err(DRV_NAME 1056 pr_err("%s: Error %d setting MAC of slave %s\n",
1057 ": %s: Error %d setting MAC of slave %s\n",
1058 bond->dev->name, -rv, new_active->dev->name); 1057 bond->dev->name, -rv, new_active->dev->name);
1059 goto out; 1058 goto out;
1060 } 1059 }
@@ -1067,16 +1066,14 @@ static void bond_do_fail_over_mac(struct bonding *bond,
1067 1066
1068 rv = dev_set_mac_address(old_active->dev, &saddr); 1067 rv = dev_set_mac_address(old_active->dev, &saddr);
1069 if (rv) 1068 if (rv)
1070 pr_err(DRV_NAME 1069 pr_err("%s: Error %d setting MAC of slave %s\n",
1071 ": %s: Error %d setting MAC of slave %s\n",
1072 bond->dev->name, -rv, new_active->dev->name); 1070 bond->dev->name, -rv, new_active->dev->name);
1073out: 1071out:
1074 read_lock(&bond->lock); 1072 read_lock(&bond->lock);
1075 write_lock_bh(&bond->curr_slave_lock); 1073 write_lock_bh(&bond->curr_slave_lock);
1076 break; 1074 break;
1077 default: 1075 default:
1078 pr_err(DRV_NAME 1076 pr_err("%s: bond_do_fail_over_mac impossible: bad policy %d\n",
1079 ": %s: bond_do_fail_over_mac impossible: bad policy %d\n",
1080 bond->dev->name, bond->params.fail_over_mac); 1077 bond->dev->name, bond->params.fail_over_mac);
1081 break; 1078 break;
1082 } 1079 }
@@ -1178,11 +1175,9 @@ void bond_change_active_slave(struct bonding *bond, struct slave *new_active)
1178 1175
1179 if (new_active->link == BOND_LINK_BACK) { 1176 if (new_active->link == BOND_LINK_BACK) {
1180 if (USES_PRIMARY(bond->params.mode)) { 1177 if (USES_PRIMARY(bond->params.mode)) {
1181 pr_info(DRV_NAME 1178 pr_info("%s: making interface %s the new active one %d ms earlier.\n",
1182 ": %s: making interface %s the new " 1179 bond->dev->name, new_active->dev->name,
1183 "active one %d ms earlier.\n", 1180 (bond->params.updelay - new_active->delay) * bond->params.miimon);
1184 bond->dev->name, new_active->dev->name,
1185 (bond->params.updelay - new_active->delay) * bond->params.miimon);
1186 } 1181 }
1187 1182
1188 new_active->delay = 0; 1183 new_active->delay = 0;
@@ -1195,10 +1190,8 @@ void bond_change_active_slave(struct bonding *bond, struct slave *new_active)
1195 bond_alb_handle_link_change(bond, new_active, BOND_LINK_UP); 1190 bond_alb_handle_link_change(bond, new_active, BOND_LINK_UP);
1196 } else { 1191 } else {
1197 if (USES_PRIMARY(bond->params.mode)) { 1192 if (USES_PRIMARY(bond->params.mode)) {
1198 pr_info(DRV_NAME 1193 pr_info("%s: making interface %s the new active one.\n",
1199 ": %s: making interface %s the new " 1194 bond->dev->name, new_active->dev->name);
1200 "active one.\n",
1201 bond->dev->name, new_active->dev->name);
1202 } 1195 }
1203 } 1196 }
1204 } 1197 }
@@ -1268,13 +1261,11 @@ void bond_select_active_slave(struct bonding *bond)
1268 return; 1261 return;
1269 1262
1270 if (netif_carrier_ok(bond->dev)) { 1263 if (netif_carrier_ok(bond->dev)) {
1271 pr_info(DRV_NAME 1264 pr_info("%s: first active interface up!\n",
1272 ": %s: first active interface up!\n", 1265 bond->dev->name);
1273 bond->dev->name);
1274 } else { 1266 } else {
1275 pr_info(DRV_NAME ": %s: " 1267 pr_info("%s: now running without any active interface !\n",
1276 "now running without any active interface !\n", 1268 bond->dev->name);
1277 bond->dev->name);
1278 } 1269 }
1279 } 1270 }
1280} 1271}
@@ -1423,16 +1414,14 @@ int bond_enslave(struct net_device *bond_dev, struct net_device *slave_dev)
1423 1414
1424 if (!bond->params.use_carrier && slave_dev->ethtool_ops == NULL && 1415 if (!bond->params.use_carrier && slave_dev->ethtool_ops == NULL &&
1425 slave_ops->ndo_do_ioctl == NULL) { 1416 slave_ops->ndo_do_ioctl == NULL) {
1426 pr_warning(DRV_NAME 1417 pr_warning("%s: Warning: no link monitoring support for %s\n",
1427 ": %s: Warning: no link monitoring support for %s\n", 1418 bond_dev->name, slave_dev->name);
1428 bond_dev->name, slave_dev->name);
1429 } 1419 }
1430 1420
1431 /* bond must be initialized by bond_open() before enslaving */ 1421 /* bond must be initialized by bond_open() before enslaving */
1432 if (!(bond_dev->flags & IFF_UP)) { 1422 if (!(bond_dev->flags & IFF_UP)) {
1433 pr_warning(DRV_NAME 1423 pr_warning("%s: master_dev is not up in bond_enslave\n",
1434 " %s: master_dev is not up in bond_enslave\n", 1424 bond_dev->name);
1435 bond_dev->name);
1436 } 1425 }
1437 1426
1438 /* already enslaved */ 1427 /* already enslaved */
@@ -1446,19 +1435,13 @@ int bond_enslave(struct net_device *bond_dev, struct net_device *slave_dev)
1446 if (slave_dev->features & NETIF_F_VLAN_CHALLENGED) { 1435 if (slave_dev->features & NETIF_F_VLAN_CHALLENGED) {
1447 pr_debug("%s: NETIF_F_VLAN_CHALLENGED\n", slave_dev->name); 1436 pr_debug("%s: NETIF_F_VLAN_CHALLENGED\n", slave_dev->name);
1448 if (!list_empty(&bond->vlan_list)) { 1437 if (!list_empty(&bond->vlan_list)) {
1449 pr_err(DRV_NAME 1438 pr_err("%s: Error: cannot enslave VLAN challenged slave %s on VLAN enabled bond %s\n",
1450 ": %s: Error: cannot enslave VLAN " 1439 bond_dev->name, slave_dev->name, bond_dev->name);
1451 "challenged slave %s on VLAN enabled "
1452 "bond %s\n", bond_dev->name, slave_dev->name,
1453 bond_dev->name);
1454 return -EPERM; 1440 return -EPERM;
1455 } else { 1441 } else {
1456 pr_warning(DRV_NAME 1442 pr_warning("%s: Warning: enslaved VLAN challenged slave %s. Adding VLANs will be blocked as long as %s is part of bond %s\n",
1457 ": %s: Warning: enslaved VLAN challenged " 1443 bond_dev->name, slave_dev->name,
1458 "slave %s. Adding VLANs will be blocked as " 1444 slave_dev->name, bond_dev->name);
1459 "long as %s is part of bond %s\n",
1460 bond_dev->name, slave_dev->name, slave_dev->name,
1461 bond_dev->name);
1462 bond_dev->features |= NETIF_F_VLAN_CHALLENGED; 1445 bond_dev->features |= NETIF_F_VLAN_CHALLENGED;
1463 } 1446 }
1464 } else { 1447 } else {
@@ -1478,8 +1461,7 @@ int bond_enslave(struct net_device *bond_dev, struct net_device *slave_dev)
1478 * enslaving it; the old ifenslave will not. 1461 * enslaving it; the old ifenslave will not.
1479 */ 1462 */
1480 if ((slave_dev->flags & IFF_UP)) { 1463 if ((slave_dev->flags & IFF_UP)) {
1481 pr_err(DRV_NAME ": %s is up. " 1464 pr_err("%s is up. This may be due to an out of date ifenslave.\n",
1482 "This may be due to an out of date ifenslave.\n",
1483 slave_dev->name); 1465 slave_dev->name);
1484 res = -EPERM; 1466 res = -EPERM;
1485 goto err_undo_flags; 1467 goto err_undo_flags;
@@ -1495,7 +1477,8 @@ int bond_enslave(struct net_device *bond_dev, struct net_device *slave_dev)
1495 if (bond->slave_cnt == 0) { 1477 if (bond->slave_cnt == 0) {
1496 if (bond_dev->type != slave_dev->type) { 1478 if (bond_dev->type != slave_dev->type) {
1497 pr_debug("%s: change device type from %d to %d\n", 1479 pr_debug("%s: change device type from %d to %d\n",
1498 bond_dev->name, bond_dev->type, slave_dev->type); 1480 bond_dev->name,
1481 bond_dev->type, slave_dev->type);
1499 1482
1500 netdev_bonding_change(bond_dev, NETDEV_BONDING_OLDTYPE); 1483 netdev_bonding_change(bond_dev, NETDEV_BONDING_OLDTYPE);
1501 1484
@@ -1507,28 +1490,21 @@ int bond_enslave(struct net_device *bond_dev, struct net_device *slave_dev)
1507 netdev_bonding_change(bond_dev, NETDEV_BONDING_NEWTYPE); 1490 netdev_bonding_change(bond_dev, NETDEV_BONDING_NEWTYPE);
1508 } 1491 }
1509 } else if (bond_dev->type != slave_dev->type) { 1492 } else if (bond_dev->type != slave_dev->type) {
1510 pr_err(DRV_NAME ": %s ether type (%d) is different " 1493 pr_err("%s ether type (%d) is different from other slaves (%d), can not enslave it.\n",
1511 "from other slaves (%d), can not enslave it.\n", 1494 slave_dev->name,
1512 slave_dev->name, 1495 slave_dev->type, bond_dev->type);
1513 slave_dev->type, bond_dev->type); 1496 res = -EINVAL;
1514 res = -EINVAL; 1497 goto err_undo_flags;
1515 goto err_undo_flags;
1516 } 1498 }
1517 1499
1518 if (slave_ops->ndo_set_mac_address == NULL) { 1500 if (slave_ops->ndo_set_mac_address == NULL) {
1519 if (bond->slave_cnt == 0) { 1501 if (bond->slave_cnt == 0) {
1520 pr_warning(DRV_NAME 1502 pr_warning("%s: Warning: The first slave device specified does not support setting the MAC address. Setting fail_over_mac to active.",
1521 ": %s: Warning: The first slave device " 1503 bond_dev->name);
1522 "specified does not support setting the MAC "
1523 "address. Setting fail_over_mac to active.",
1524 bond_dev->name);
1525 bond->params.fail_over_mac = BOND_FOM_ACTIVE; 1504 bond->params.fail_over_mac = BOND_FOM_ACTIVE;
1526 } else if (bond->params.fail_over_mac != BOND_FOM_ACTIVE) { 1505 } else if (bond->params.fail_over_mac != BOND_FOM_ACTIVE) {
1527 pr_err(DRV_NAME 1506 pr_err("%s: Error: The slave device specified does not support setting the MAC address, but fail_over_mac is not set to active.\n",
1528 ": %s: Error: The slave device specified " 1507 bond_dev->name);
1529 "does not support setting the MAC address, "
1530 "but fail_over_mac is not set to active.\n"
1531 , bond_dev->name);
1532 res = -EOPNOTSUPP; 1508 res = -EOPNOTSUPP;
1533 goto err_undo_flags; 1509 goto err_undo_flags;
1534 } 1510 }
@@ -1655,22 +1631,12 @@ int bond_enslave(struct net_device *bond_dev, struct net_device *slave_dev)
1655 * supported); thus, we don't need to change 1631 * supported); thus, we don't need to change
1656 * the messages for netif_carrier. 1632 * the messages for netif_carrier.
1657 */ 1633 */
1658 pr_warning(DRV_NAME 1634 pr_warning("%s: Warning: MII and ETHTOOL support not available for interface %s, and arp_interval/arp_ip_target module parameters not specified, thus bonding will not detect link failures! see bonding.txt for details.\n",
1659 ": %s: Warning: MII and ETHTOOL support not "
1660 "available for interface %s, and "
1661 "arp_interval/arp_ip_target module parameters "
1662 "not specified, thus bonding will not detect "
1663 "link failures! see bonding.txt for details.\n",
1664 bond_dev->name, slave_dev->name); 1635 bond_dev->name, slave_dev->name);
1665 } else if (link_reporting == -1) { 1636 } else if (link_reporting == -1) {
1666 /* unable get link status using mii/ethtool */ 1637 /* unable get link status using mii/ethtool */
1667 pr_warning(DRV_NAME 1638 pr_warning("%s: Warning: can't get link status from interface %s; the network driver associated with this interface does not support MII or ETHTOOL link status reporting, thus miimon has no effect on this interface.\n",
1668 ": %s: Warning: can't get link status from " 1639 bond_dev->name, slave_dev->name);
1669 "interface %s; the network driver associated "
1670 "with this interface does not support MII or "
1671 "ETHTOOL link status reporting, thus miimon "
1672 "has no effect on this interface.\n",
1673 bond_dev->name, slave_dev->name);
1674 } 1640 }
1675 } 1641 }
1676 1642
@@ -1678,34 +1644,27 @@ int bond_enslave(struct net_device *bond_dev, struct net_device *slave_dev)
1678 if (!bond->params.miimon || 1644 if (!bond->params.miimon ||
1679 (bond_check_dev_link(bond, slave_dev, 0) == BMSR_LSTATUS)) { 1645 (bond_check_dev_link(bond, slave_dev, 0) == BMSR_LSTATUS)) {
1680 if (bond->params.updelay) { 1646 if (bond->params.updelay) {
1681 pr_debug("Initial state of slave_dev is " 1647 pr_debug("Initial state of slave_dev is BOND_LINK_BACK\n");
1682 "BOND_LINK_BACK\n");
1683 new_slave->link = BOND_LINK_BACK; 1648 new_slave->link = BOND_LINK_BACK;
1684 new_slave->delay = bond->params.updelay; 1649 new_slave->delay = bond->params.updelay;
1685 } else { 1650 } else {
1686 pr_debug("Initial state of slave_dev is " 1651 pr_debug("Initial state of slave_dev is BOND_LINK_UP\n");
1687 "BOND_LINK_UP\n");
1688 new_slave->link = BOND_LINK_UP; 1652 new_slave->link = BOND_LINK_UP;
1689 } 1653 }
1690 new_slave->jiffies = jiffies; 1654 new_slave->jiffies = jiffies;
1691 } else { 1655 } else {
1692 pr_debug("Initial state of slave_dev is " 1656 pr_debug("Initial state of slave_dev is BOND_LINK_DOWN\n");
1693 "BOND_LINK_DOWN\n");
1694 new_slave->link = BOND_LINK_DOWN; 1657 new_slave->link = BOND_LINK_DOWN;
1695 } 1658 }
1696 1659
1697 if (bond_update_speed_duplex(new_slave) && 1660 if (bond_update_speed_duplex(new_slave) &&
1698 (new_slave->link != BOND_LINK_DOWN)) { 1661 (new_slave->link != BOND_LINK_DOWN)) {
1699 pr_warning(DRV_NAME 1662 pr_warning("%s: Warning: failed to get speed and duplex from %s, assumed to be 100Mb/sec and Full.\n",
1700 ": %s: Warning: failed to get speed and duplex from %s, " 1663 bond_dev->name, new_slave->dev->name);
1701 "assumed to be 100Mb/sec and Full.\n",
1702 bond_dev->name, new_slave->dev->name);
1703 1664
1704 if (bond->params.mode == BOND_MODE_8023AD) { 1665 if (bond->params.mode == BOND_MODE_8023AD) {
1705 pr_warning(DRV_NAME 1666 pr_warning("%s: Warning: Operation of 802.3ad mode requires ETHTOOL support in base driver for proper aggregator selection.\n",
1706 ": %s: Warning: Operation of 802.3ad mode requires ETHTOOL " 1667 bond_dev->name);
1707 "support in base driver for proper aggregator "
1708 "selection.\n", bond_dev->name);
1709 } 1668 }
1710 } 1669 }
1711 1670
@@ -1777,11 +1736,10 @@ int bond_enslave(struct net_device *bond_dev, struct net_device *slave_dev)
1777 if (res) 1736 if (res)
1778 goto err_close; 1737 goto err_close;
1779 1738
1780 pr_info(DRV_NAME 1739 pr_info("%s: enslaving %s as a%s interface with a%s link.\n",
1781 ": %s: enslaving %s as a%s interface with a%s link.\n", 1740 bond_dev->name, slave_dev->name,
1782 bond_dev->name, slave_dev->name, 1741 new_slave->state == BOND_STATE_ACTIVE ? "n active" : " backup",
1783 new_slave->state == BOND_STATE_ACTIVE ? "n active" : " backup", 1742 new_slave->link != BOND_LINK_DOWN ? "n up" : " down");
1784 new_slave->link != BOND_LINK_DOWN ? "n up" : " down");
1785 1743
1786 /* enslave is successful */ 1744 /* enslave is successful */
1787 return 0; 1745 return 0;
@@ -1833,8 +1791,7 @@ int bond_release(struct net_device *bond_dev, struct net_device *slave_dev)
1833 /* slave is not a slave or master is not master of this slave */ 1791 /* slave is not a slave or master is not master of this slave */
1834 if (!(slave_dev->flags & IFF_SLAVE) || 1792 if (!(slave_dev->flags & IFF_SLAVE) ||
1835 (slave_dev->master != bond_dev)) { 1793 (slave_dev->master != bond_dev)) {
1836 pr_err(DRV_NAME 1794 pr_err("%s: Error: cannot release %s.\n",
1837 ": %s: Error: cannot release %s.\n",
1838 bond_dev->name, slave_dev->name); 1795 bond_dev->name, slave_dev->name);
1839 return -EINVAL; 1796 return -EINVAL;
1840 } 1797 }
@@ -1844,9 +1801,8 @@ int bond_release(struct net_device *bond_dev, struct net_device *slave_dev)
1844 slave = bond_get_slave_by_dev(bond, slave_dev); 1801 slave = bond_get_slave_by_dev(bond, slave_dev);
1845 if (!slave) { 1802 if (!slave) {
1846 /* not a slave of this bond */ 1803 /* not a slave of this bond */
1847 pr_info(DRV_NAME 1804 pr_info("%s: %s not enslaved\n",
1848 ": %s: %s not enslaved\n", 1805 bond_dev->name, slave_dev->name);
1849 bond_dev->name, slave_dev->name);
1850 write_unlock_bh(&bond->lock); 1806 write_unlock_bh(&bond->lock);
1851 return -EINVAL; 1807 return -EINVAL;
1852 } 1808 }
@@ -1854,14 +1810,10 @@ int bond_release(struct net_device *bond_dev, struct net_device *slave_dev)
1854 if (!bond->params.fail_over_mac) { 1810 if (!bond->params.fail_over_mac) {
1855 if (!compare_ether_addr(bond_dev->dev_addr, slave->perm_hwaddr) && 1811 if (!compare_ether_addr(bond_dev->dev_addr, slave->perm_hwaddr) &&
1856 bond->slave_cnt > 1) 1812 bond->slave_cnt > 1)
1857 pr_warning(DRV_NAME 1813 pr_warning("%s: Warning: the permanent HWaddr of %s - %pM - is still in use by %s. Set the HWaddr of %s to a different address to avoid conflicts.\n",
1858 ": %s: Warning: the permanent HWaddr of %s - " 1814 bond_dev->name, slave_dev->name,
1859 "%pM - is still in use by %s. " 1815 slave->perm_hwaddr,
1860 "Set the HWaddr of %s to a different address " 1816 bond_dev->name, slave_dev->name);
1861 "to avoid conflicts.\n",
1862 bond_dev->name, slave_dev->name,
1863 slave->perm_hwaddr,
1864 bond_dev->name, slave_dev->name);
1865 } 1817 }
1866 1818
1867 /* Inform AD package of unbinding of slave. */ 1819 /* Inform AD package of unbinding of slave. */
@@ -1872,12 +1824,10 @@ int bond_release(struct net_device *bond_dev, struct net_device *slave_dev)
1872 bond_3ad_unbind_slave(slave); 1824 bond_3ad_unbind_slave(slave);
1873 } 1825 }
1874 1826
1875 pr_info(DRV_NAME 1827 pr_info("%s: releasing %s interface %s\n",
1876 ": %s: releasing %s interface %s\n", 1828 bond_dev->name,
1877 bond_dev->name, 1829 (slave->state == BOND_STATE_ACTIVE) ? "active" : "backup",
1878 (slave->state == BOND_STATE_ACTIVE) 1830 slave_dev->name);
1879 ? "active" : "backup",
1880 slave_dev->name);
1881 1831
1882 oldcurrent = bond->curr_active_slave; 1832 oldcurrent = bond->curr_active_slave;
1883 1833
@@ -1934,21 +1884,15 @@ int bond_release(struct net_device *bond_dev, struct net_device *slave_dev)
1934 if (list_empty(&bond->vlan_list)) { 1884 if (list_empty(&bond->vlan_list)) {
1935 bond_dev->features |= NETIF_F_VLAN_CHALLENGED; 1885 bond_dev->features |= NETIF_F_VLAN_CHALLENGED;
1936 } else { 1886 } else {
1937 pr_warning(DRV_NAME 1887 pr_warning("%s: Warning: clearing HW address of %s while it still has VLANs.\n",
1938 ": %s: Warning: clearing HW address of %s while it " 1888 bond_dev->name, bond_dev->name);
1939 "still has VLANs.\n", 1889 pr_warning("%s: When re-adding slaves, make sure the bond's HW address matches its VLANs'.\n",
1940 bond_dev->name, bond_dev->name); 1890 bond_dev->name);
1941 pr_warning(DRV_NAME
1942 ": %s: When re-adding slaves, make sure the bond's "
1943 "HW address matches its VLANs'.\n",
1944 bond_dev->name);
1945 } 1891 }
1946 } else if ((bond_dev->features & NETIF_F_VLAN_CHALLENGED) && 1892 } else if ((bond_dev->features & NETIF_F_VLAN_CHALLENGED) &&
1947 !bond_has_challenged_slaves(bond)) { 1893 !bond_has_challenged_slaves(bond)) {
1948 pr_info(DRV_NAME 1894 pr_info("%s: last VLAN challenged slave %s left bond %s. VLAN blocking is removed\n",
1949 ": %s: last VLAN challenged slave %s " 1895 bond_dev->name, slave_dev->name, bond_dev->name);
1950 "left bond %s. VLAN blocking is removed\n",
1951 bond_dev->name, slave_dev->name, bond_dev->name);
1952 bond_dev->features &= ~NETIF_F_VLAN_CHALLENGED; 1896 bond_dev->features &= ~NETIF_F_VLAN_CHALLENGED;
1953 } 1897 }
1954 1898
@@ -2011,8 +1955,8 @@ int bond_release_and_destroy(struct net_device *bond_dev,
2011 1955
2012 ret = bond_release(bond_dev, slave_dev); 1956 ret = bond_release(bond_dev, slave_dev);
2013 if ((ret == 0) && (bond->slave_cnt == 0)) { 1957 if ((ret == 0) && (bond->slave_cnt == 0)) {
2014 pr_info(DRV_NAME ": %s: destroying bond %s.\n", 1958 pr_info("%s: destroying bond %s.\n",
2015 bond_dev->name, bond_dev->name); 1959 bond_dev->name, bond_dev->name);
2016 unregister_netdevice(bond_dev); 1960 unregister_netdevice(bond_dev);
2017 } 1961 }
2018 return ret; 1962 return ret;
@@ -2116,19 +2060,13 @@ static int bond_release_all(struct net_device *bond_dev)
2116 if (list_empty(&bond->vlan_list)) 2060 if (list_empty(&bond->vlan_list))
2117 bond_dev->features |= NETIF_F_VLAN_CHALLENGED; 2061 bond_dev->features |= NETIF_F_VLAN_CHALLENGED;
2118 else { 2062 else {
2119 pr_warning(DRV_NAME 2063 pr_warning("%s: Warning: clearing HW address of %s while it still has VLANs.\n",
2120 ": %s: Warning: clearing HW address of %s while it " 2064 bond_dev->name, bond_dev->name);
2121 "still has VLANs.\n", 2065 pr_warning("%s: When re-adding slaves, make sure the bond's HW address matches its VLANs'.\n",
2122 bond_dev->name, bond_dev->name); 2066 bond_dev->name);
2123 pr_warning(DRV_NAME
2124 ": %s: When re-adding slaves, make sure the bond's "
2125 "HW address matches its VLANs'.\n",
2126 bond_dev->name);
2127 } 2067 }
2128 2068
2129 pr_info(DRV_NAME 2069 pr_info("%s: released all slaves\n", bond_dev->name);
2130 ": %s: released all slaves\n",
2131 bond_dev->name);
2132 2070
2133out: 2071out:
2134 write_unlock_bh(&bond->lock); 2072 write_unlock_bh(&bond->lock);
@@ -2254,16 +2192,14 @@ static int bond_miimon_inspect(struct bonding *bond)
2254 slave->link = BOND_LINK_FAIL; 2192 slave->link = BOND_LINK_FAIL;
2255 slave->delay = bond->params.downdelay; 2193 slave->delay = bond->params.downdelay;
2256 if (slave->delay) { 2194 if (slave->delay) {
2257 pr_info(DRV_NAME 2195 pr_info("%s: link status down for %sinterface %s, disabling it in %d ms.\n",
2258 ": %s: link status down for %s" 2196 bond->dev->name,
2259 "interface %s, disabling it in %d ms.\n", 2197 (bond->params.mode ==
2260 bond->dev->name, 2198 BOND_MODE_ACTIVEBACKUP) ?
2261 (bond->params.mode == 2199 ((slave->state == BOND_STATE_ACTIVE) ?
2262 BOND_MODE_ACTIVEBACKUP) ? 2200 "active " : "backup ") : "",
2263 ((slave->state == BOND_STATE_ACTIVE) ? 2201 slave->dev->name,
2264 "active " : "backup ") : "", 2202 bond->params.downdelay * bond->params.miimon);
2265 slave->dev->name,
2266 bond->params.downdelay * bond->params.miimon);
2267 } 2203 }
2268 /*FALLTHRU*/ 2204 /*FALLTHRU*/
2269 case BOND_LINK_FAIL: 2205 case BOND_LINK_FAIL:
@@ -2273,13 +2209,11 @@ static int bond_miimon_inspect(struct bonding *bond)
2273 */ 2209 */
2274 slave->link = BOND_LINK_UP; 2210 slave->link = BOND_LINK_UP;
2275 slave->jiffies = jiffies; 2211 slave->jiffies = jiffies;
2276 pr_info(DRV_NAME 2212 pr_info("%s: link status up again after %d ms for interface %s.\n",
2277 ": %s: link status up again after %d " 2213 bond->dev->name,
2278 "ms for interface %s.\n", 2214 (bond->params.downdelay - slave->delay) *
2279 bond->dev->name, 2215 bond->params.miimon,
2280 (bond->params.downdelay - slave->delay) * 2216 slave->dev->name);
2281 bond->params.miimon,
2282 slave->dev->name);
2283 continue; 2217 continue;
2284 } 2218 }
2285 2219
@@ -2300,25 +2234,21 @@ static int bond_miimon_inspect(struct bonding *bond)
2300 slave->delay = bond->params.updelay; 2234 slave->delay = bond->params.updelay;
2301 2235
2302 if (slave->delay) { 2236 if (slave->delay) {
2303 pr_info(DRV_NAME 2237 pr_info("%s: link status up for interface %s, enabling it in %d ms.\n",
2304 ": %s: link status up for " 2238 bond->dev->name, slave->dev->name,
2305 "interface %s, enabling it in %d ms.\n", 2239 ignore_updelay ? 0 :
2306 bond->dev->name, slave->dev->name, 2240 bond->params.updelay *
2307 ignore_updelay ? 0 : 2241 bond->params.miimon);
2308 bond->params.updelay *
2309 bond->params.miimon);
2310 } 2242 }
2311 /*FALLTHRU*/ 2243 /*FALLTHRU*/
2312 case BOND_LINK_BACK: 2244 case BOND_LINK_BACK:
2313 if (!link_state) { 2245 if (!link_state) {
2314 slave->link = BOND_LINK_DOWN; 2246 slave->link = BOND_LINK_DOWN;
2315 pr_info(DRV_NAME 2247 pr_info("%s: link status down again after %d ms for interface %s.\n",
2316 ": %s: link status down again after %d " 2248 bond->dev->name,
2317 "ms for interface %s.\n", 2249 (bond->params.updelay - slave->delay) *
2318 bond->dev->name, 2250 bond->params.miimon,
2319 (bond->params.updelay - slave->delay) * 2251 slave->dev->name);
2320 bond->params.miimon,
2321 slave->dev->name);
2322 2252
2323 continue; 2253 continue;
2324 } 2254 }
@@ -2366,10 +2296,8 @@ static void bond_miimon_commit(struct bonding *bond)
2366 slave->state = BOND_STATE_BACKUP; 2296 slave->state = BOND_STATE_BACKUP;
2367 } 2297 }
2368 2298
2369 pr_info(DRV_NAME 2299 pr_info("%s: link status definitely up for interface %s.\n",
2370 ": %s: link status definitely " 2300 bond->dev->name, slave->dev->name);
2371 "up for interface %s.\n",
2372 bond->dev->name, slave->dev->name);
2373 2301
2374 /* notify ad that the link status has changed */ 2302 /* notify ad that the link status has changed */
2375 if (bond->params.mode == BOND_MODE_8023AD) 2303 if (bond->params.mode == BOND_MODE_8023AD)
@@ -2395,10 +2323,8 @@ static void bond_miimon_commit(struct bonding *bond)
2395 bond->params.mode == BOND_MODE_8023AD) 2323 bond->params.mode == BOND_MODE_8023AD)
2396 bond_set_slave_inactive_flags(slave); 2324 bond_set_slave_inactive_flags(slave);
2397 2325
2398 pr_info(DRV_NAME 2326 pr_info("%s: link status definitely down for interface %s, disabling it\n",
2399 ": %s: link status definitely down for " 2327 bond->dev->name, slave->dev->name);
2400 "interface %s, disabling it\n",
2401 bond->dev->name, slave->dev->name);
2402 2328
2403 if (bond->params.mode == BOND_MODE_8023AD) 2329 if (bond->params.mode == BOND_MODE_8023AD)
2404 bond_3ad_handle_link_change(slave, 2330 bond_3ad_handle_link_change(slave,
@@ -2414,8 +2340,7 @@ static void bond_miimon_commit(struct bonding *bond)
2414 continue; 2340 continue;
2415 2341
2416 default: 2342 default:
2417 pr_err(DRV_NAME 2343 pr_err("%s: invalid new link %d on slave %s\n",
2418 ": %s: invalid new link %d on slave %s\n",
2419 bond->dev->name, slave->new_link, 2344 bond->dev->name, slave->new_link,
2420 slave->dev->name); 2345 slave->dev->name);
2421 slave->new_link = BOND_LINK_NOCHANGE; 2346 slave->new_link = BOND_LINK_NOCHANGE;
@@ -2534,19 +2459,19 @@ static void bond_arp_send(struct net_device *slave_dev, int arp_op, __be32 dest_
2534 struct sk_buff *skb; 2459 struct sk_buff *skb;
2535 2460
2536 pr_debug("arp %d on slave %s: dst %x src %x vid %d\n", arp_op, 2461 pr_debug("arp %d on slave %s: dst %x src %x vid %d\n", arp_op,
2537 slave_dev->name, dest_ip, src_ip, vlan_id); 2462 slave_dev->name, dest_ip, src_ip, vlan_id);
2538 2463
2539 skb = arp_create(arp_op, ETH_P_ARP, dest_ip, slave_dev, src_ip, 2464 skb = arp_create(arp_op, ETH_P_ARP, dest_ip, slave_dev, src_ip,
2540 NULL, slave_dev->dev_addr, NULL); 2465 NULL, slave_dev->dev_addr, NULL);
2541 2466
2542 if (!skb) { 2467 if (!skb) {
2543 pr_err(DRV_NAME ": ARP packet allocation failed\n"); 2468 pr_err("ARP packet allocation failed\n");
2544 return; 2469 return;
2545 } 2470 }
2546 if (vlan_id) { 2471 if (vlan_id) {
2547 skb = vlan_put_tag(skb, vlan_id); 2472 skb = vlan_put_tag(skb, vlan_id);
2548 if (!skb) { 2473 if (!skb) {
2549 pr_err(DRV_NAME ": failed to insert VLAN tag\n"); 2474 pr_err("failed to insert VLAN tag\n");
2550 return; 2475 return;
2551 } 2476 }
2552 } 2477 }
@@ -2586,9 +2511,8 @@ static void bond_arp_send_all(struct bonding *bond, struct slave *slave)
2586 rv = ip_route_output_key(dev_net(bond->dev), &rt, &fl); 2511 rv = ip_route_output_key(dev_net(bond->dev), &rt, &fl);
2587 if (rv) { 2512 if (rv) {
2588 if (net_ratelimit()) { 2513 if (net_ratelimit()) {
2589 pr_warning(DRV_NAME 2514 pr_warning("%s: no route to arp_ip_target %pI4\n",
2590 ": %s: no route to arp_ip_target %pI4\n", 2515 bond->dev->name, &fl.fl4_dst);
2591 bond->dev->name, &fl.fl4_dst);
2592 } 2516 }
2593 continue; 2517 continue;
2594 } 2518 }
@@ -2623,10 +2547,9 @@ static void bond_arp_send_all(struct bonding *bond, struct slave *slave)
2623 } 2547 }
2624 2548
2625 if (net_ratelimit()) { 2549 if (net_ratelimit()) {
2626 pr_warning(DRV_NAME 2550 pr_warning("%s: no path to arp_ip_target %pI4 via rt.dev %s\n",
2627 ": %s: no path to arp_ip_target %pI4 via rt.dev %s\n", 2551 bond->dev->name, &fl.fl4_dst,
2628 bond->dev->name, &fl.fl4_dst, 2552 rt->u.dst.dev ? rt->u.dst.dev->name : "NULL");
2629 rt->u.dst.dev ? rt->u.dst.dev->name : "NULL");
2630 } 2553 }
2631 ip_rt_put(rt); 2554 ip_rt_put(rt);
2632 } 2555 }
@@ -2644,8 +2567,8 @@ static void bond_send_gratuitous_arp(struct bonding *bond)
2644 struct vlan_entry *vlan; 2567 struct vlan_entry *vlan;
2645 struct net_device *vlan_dev; 2568 struct net_device *vlan_dev;
2646 2569
2647 pr_debug("bond_send_grat_arp: bond %s slave %s\n", bond->dev->name, 2570 pr_debug("bond_send_grat_arp: bond %s slave %s\n",
2648 slave ? slave->dev->name : "NULL"); 2571 bond->dev->name, slave ? slave->dev->name : "NULL");
2649 2572
2650 if (!slave || !bond->send_grat_arp || 2573 if (!slave || !bond->send_grat_arp ||
2651 test_bit(__LINK_STATE_LINKWATCH_PENDING, &slave->dev->state)) 2574 test_bit(__LINK_STATE_LINKWATCH_PENDING, &slave->dev->state))
@@ -2674,7 +2597,8 @@ static void bond_validate_arp(struct bonding *bond, struct slave *slave, __be32
2674 2597
2675 for (i = 0; (i < BOND_MAX_ARP_TARGETS) && targets[i]; i++) { 2598 for (i = 0; (i < BOND_MAX_ARP_TARGETS) && targets[i]; i++) {
2676 pr_debug("bva: sip %pI4 tip %pI4 t[%d] %pI4 bhti(tip) %d\n", 2599 pr_debug("bva: sip %pI4 tip %pI4 t[%d] %pI4 bhti(tip) %d\n",
2677 &sip, &tip, i, &targets[i], bond_has_this_ip(bond, tip)); 2600 &sip, &tip, i, &targets[i],
2601 bond_has_this_ip(bond, tip));
2678 if (sip == targets[i]) { 2602 if (sip == targets[i]) {
2679 if (bond_has_this_ip(bond, tip)) 2603 if (bond_has_this_ip(bond, tip))
2680 slave->last_arp_rx = jiffies; 2604 slave->last_arp_rx = jiffies;
@@ -2698,8 +2622,8 @@ static int bond_arp_rcv(struct sk_buff *skb, struct net_device *dev, struct pack
2698 read_lock(&bond->lock); 2622 read_lock(&bond->lock);
2699 2623
2700 pr_debug("bond_arp_rcv: bond %s skb->dev %s orig_dev %s\n", 2624 pr_debug("bond_arp_rcv: bond %s skb->dev %s orig_dev %s\n",
2701 bond->dev->name, skb->dev ? skb->dev->name : "NULL", 2625 bond->dev->name, skb->dev ? skb->dev->name : "NULL",
2702 orig_dev ? orig_dev->name : "NULL"); 2626 orig_dev ? orig_dev->name : "NULL");
2703 2627
2704 slave = bond_get_slave_by_dev(bond, orig_dev); 2628 slave = bond_get_slave_by_dev(bond, orig_dev);
2705 if (!slave || !slave_do_arp_validate(bond, slave)) 2629 if (!slave || !slave_do_arp_validate(bond, slave))
@@ -2724,9 +2648,9 @@ static int bond_arp_rcv(struct sk_buff *skb, struct net_device *dev, struct pack
2724 memcpy(&tip, arp_ptr, 4); 2648 memcpy(&tip, arp_ptr, 4);
2725 2649
2726 pr_debug("bond_arp_rcv: %s %s/%d av %d sv %d sip %pI4 tip %pI4\n", 2650 pr_debug("bond_arp_rcv: %s %s/%d av %d sv %d sip %pI4 tip %pI4\n",
2727 bond->dev->name, slave->dev->name, slave->state, 2651 bond->dev->name, slave->dev->name, slave->state,
2728 bond->params.arp_validate, slave_do_arp_validate(bond, slave), 2652 bond->params.arp_validate, slave_do_arp_validate(bond, slave),
2729 &sip, &tip); 2653 &sip, &tip);
2730 2654
2731 /* 2655 /*
2732 * Backup slaves won't see the ARP reply, but do come through 2656 * Backup slaves won't see the ARP reply, but do come through
@@ -2800,17 +2724,14 @@ void bond_loadbalance_arp_mon(struct work_struct *work)
2800 * is closed. 2724 * is closed.
2801 */ 2725 */
2802 if (!oldcurrent) { 2726 if (!oldcurrent) {
2803 pr_info(DRV_NAME 2727 pr_info("%s: link status definitely up for interface %s, ",
2804 ": %s: link status definitely " 2728 bond->dev->name,
2805 "up for interface %s, ", 2729 slave->dev->name);
2806 bond->dev->name,
2807 slave->dev->name);
2808 do_failover = 1; 2730 do_failover = 1;
2809 } else { 2731 } else {
2810 pr_info(DRV_NAME 2732 pr_info("%s: interface %s is now up\n",
2811 ": %s: interface %s is now up\n", 2733 bond->dev->name,
2812 bond->dev->name, 2734 slave->dev->name);
2813 slave->dev->name);
2814 } 2735 }
2815 } 2736 }
2816 } else { 2737 } else {
@@ -2829,10 +2750,9 @@ void bond_loadbalance_arp_mon(struct work_struct *work)
2829 if (slave->link_failure_count < UINT_MAX) 2750 if (slave->link_failure_count < UINT_MAX)
2830 slave->link_failure_count++; 2751 slave->link_failure_count++;
2831 2752
2832 pr_info(DRV_NAME 2753 pr_info("%s: interface %s is now down.\n",
2833 ": %s: interface %s is now down.\n", 2754 bond->dev->name,
2834 bond->dev->name, 2755 slave->dev->name);
2835 slave->dev->name);
2836 2756
2837 if (slave == oldcurrent) 2757 if (slave == oldcurrent)
2838 do_failover = 1; 2758 do_failover = 1;
@@ -2965,9 +2885,7 @@ static void bond_ab_arp_commit(struct bonding *bond, int delta_in_ticks)
2965 slave->link = BOND_LINK_UP; 2885 slave->link = BOND_LINK_UP;
2966 bond->current_arp_slave = NULL; 2886 bond->current_arp_slave = NULL;
2967 2887
2968 pr_info(DRV_NAME 2888 pr_info("%s: link status definitely up for interface %s.\n",
2969 ": %s: link status definitely "
2970 "up for interface %s.\n",
2971 bond->dev->name, slave->dev->name); 2889 bond->dev->name, slave->dev->name);
2972 2890
2973 if (!bond->curr_active_slave || 2891 if (!bond->curr_active_slave ||
@@ -2985,9 +2903,7 @@ static void bond_ab_arp_commit(struct bonding *bond, int delta_in_ticks)
2985 slave->link = BOND_LINK_DOWN; 2903 slave->link = BOND_LINK_DOWN;
2986 bond_set_slave_inactive_flags(slave); 2904 bond_set_slave_inactive_flags(slave);
2987 2905
2988 pr_info(DRV_NAME 2906 pr_info("%s: link status definitely down for interface %s, disabling it\n",
2989 ": %s: link status definitely down for "
2990 "interface %s, disabling it\n",
2991 bond->dev->name, slave->dev->name); 2907 bond->dev->name, slave->dev->name);
2992 2908
2993 if (slave == bond->curr_active_slave) { 2909 if (slave == bond->curr_active_slave) {
@@ -2998,8 +2914,7 @@ static void bond_ab_arp_commit(struct bonding *bond, int delta_in_ticks)
2998 continue; 2914 continue;
2999 2915
3000 default: 2916 default:
3001 pr_err(DRV_NAME 2917 pr_err("%s: impossible: new_link %d on slave %s\n",
3002 ": %s: impossible: new_link %d on slave %s\n",
3003 bond->dev->name, slave->new_link, 2918 bond->dev->name, slave->new_link,
3004 slave->dev->name); 2919 slave->dev->name);
3005 continue; 2920 continue;
@@ -3028,9 +2943,9 @@ static void bond_ab_arp_probe(struct bonding *bond)
3028 read_lock(&bond->curr_slave_lock); 2943 read_lock(&bond->curr_slave_lock);
3029 2944
3030 if (bond->current_arp_slave && bond->curr_active_slave) 2945 if (bond->current_arp_slave && bond->curr_active_slave)
3031 pr_info(DRV_NAME "PROBE: c_arp %s && cas %s BAD\n", 2946 pr_info("PROBE: c_arp %s && cas %s BAD\n",
3032 bond->current_arp_slave->dev->name, 2947 bond->current_arp_slave->dev->name,
3033 bond->curr_active_slave->dev->name); 2948 bond->curr_active_slave->dev->name);
3034 2949
3035 if (bond->curr_active_slave) { 2950 if (bond->curr_active_slave) {
3036 bond_arp_send_all(bond, bond->curr_active_slave); 2951 bond_arp_send_all(bond, bond->curr_active_slave);
@@ -3078,9 +2993,8 @@ static void bond_ab_arp_probe(struct bonding *bond)
3078 2993
3079 bond_set_slave_inactive_flags(slave); 2994 bond_set_slave_inactive_flags(slave);
3080 2995
3081 pr_info(DRV_NAME 2996 pr_info("%s: backup interface %s is now down.\n",
3082 ": %s: backup interface %s is now down.\n", 2997 bond->dev->name, slave->dev->name);
3083 bond->dev->name, slave->dev->name);
3084 } 2998 }
3085 } 2999 }
3086} 3000}
@@ -3360,9 +3274,8 @@ static void bond_create_proc_entry(struct bonding *bond)
3360 S_IRUGO, bn->proc_dir, 3274 S_IRUGO, bn->proc_dir,
3361 &bond_info_fops, bond); 3275 &bond_info_fops, bond);
3362 if (bond->proc_entry == NULL) 3276 if (bond->proc_entry == NULL)
3363 pr_warning(DRV_NAME 3277 pr_warning("Warning: Cannot create /proc/net/%s/%s\n",
3364 ": Warning: Cannot create /proc/net/%s/%s\n", 3278 DRV_NAME, bond_dev->name);
3365 DRV_NAME, bond_dev->name);
3366 else 3279 else
3367 memcpy(bond->proc_file_name, bond_dev->name, IFNAMSIZ); 3280 memcpy(bond->proc_file_name, bond_dev->name, IFNAMSIZ);
3368 } 3281 }
@@ -3388,9 +3301,8 @@ static void bond_create_proc_dir(struct bond_net *bn)
3388 if (!bn->proc_dir) { 3301 if (!bn->proc_dir) {
3389 bn->proc_dir = proc_mkdir(DRV_NAME, bn->net->proc_net); 3302 bn->proc_dir = proc_mkdir(DRV_NAME, bn->net->proc_net);
3390 if (!bn->proc_dir) 3303 if (!bn->proc_dir)
3391 pr_warning(DRV_NAME 3304 pr_warning("Warning: cannot create /proc/net/%s\n",
3392 ": Warning: cannot create /proc/net/%s\n", 3305 DRV_NAME);
3393 DRV_NAME);
3394 } 3306 }
3395} 3307}
3396 3308
@@ -3539,8 +3451,8 @@ static int bond_netdev_event(struct notifier_block *this,
3539 struct net_device *event_dev = (struct net_device *)ptr; 3451 struct net_device *event_dev = (struct net_device *)ptr;
3540 3452
3541 pr_debug("event_dev: %s, event: %lx\n", 3453 pr_debug("event_dev: %s, event: %lx\n",
3542 (event_dev ? event_dev->name : "None"), 3454 event_dev ? event_dev->name : "None",
3543 event); 3455 event);
3544 3456
3545 if (!(event_dev->priv_flags & IFF_BONDING)) 3457 if (!(event_dev->priv_flags & IFF_BONDING))
3546 return NOTIFY_DONE; 3458 return NOTIFY_DONE;
@@ -3727,7 +3639,7 @@ static int bond_open(struct net_device *bond_dev)
3727 */ 3639 */
3728 if (bond_alb_initialize(bond, (bond->params.mode == BOND_MODE_ALB))) { 3640 if (bond_alb_initialize(bond, (bond->params.mode == BOND_MODE_ALB))) {
3729 /* something went wrong - fail the open operation */ 3641 /* something went wrong - fail the open operation */
3730 return -1; 3642 return -ENOMEM;
3731 } 3643 }
3732 3644
3733 INIT_DELAYED_WORK(&bond->alb_work, bond_alb_monitor); 3645 INIT_DELAYED_WORK(&bond->alb_work, bond_alb_monitor);
@@ -3875,8 +3787,7 @@ static int bond_do_ioctl(struct net_device *bond_dev, struct ifreq *ifr, int cmd
3875 struct mii_ioctl_data *mii = NULL; 3787 struct mii_ioctl_data *mii = NULL;
3876 int res = 0; 3788 int res = 0;
3877 3789
3878 pr_debug("bond_ioctl: master=%s, cmd=%d\n", 3790 pr_debug("bond_ioctl: master=%s, cmd=%d\n", bond_dev->name, cmd);
3879 bond_dev->name, cmd);
3880 3791
3881 switch (cmd) { 3792 switch (cmd) {
3882 case SIOCGMIIPHY: 3793 case SIOCGMIIPHY:
@@ -3945,12 +3856,12 @@ static int bond_do_ioctl(struct net_device *bond_dev, struct ifreq *ifr, int cmd
3945 3856
3946 slave_dev = dev_get_by_name(dev_net(bond_dev), ifr->ifr_slave); 3857 slave_dev = dev_get_by_name(dev_net(bond_dev), ifr->ifr_slave);
3947 3858
3948 pr_debug("slave_dev=%p: \n", slave_dev); 3859 pr_debug("slave_dev=%p:\n", slave_dev);
3949 3860
3950 if (!slave_dev) 3861 if (!slave_dev)
3951 res = -ENODEV; 3862 res = -ENODEV;
3952 else { 3863 else {
3953 pr_debug("slave_dev->name=%s: \n", slave_dev->name); 3864 pr_debug("slave_dev->name=%s:\n", slave_dev->name);
3954 switch (cmd) { 3865 switch (cmd) {
3955 case BOND_ENSLAVE_OLD: 3866 case BOND_ENSLAVE_OLD:
3956 case SIOCBONDENSLAVE: 3867 case SIOCBONDENSLAVE:
@@ -4059,7 +3970,7 @@ static int bond_change_mtu(struct net_device *bond_dev, int new_mtu)
4059 int i; 3970 int i;
4060 3971
4061 pr_debug("bond=%p, name=%s, new_mtu=%d\n", bond, 3972 pr_debug("bond=%p, name=%s, new_mtu=%d\n", bond,
4062 (bond_dev ? bond_dev->name : "None"), new_mtu); 3973 (bond_dev ? bond_dev->name : "None"), new_mtu);
4063 3974
4064 /* Can't hold bond->lock with bh disabled here since 3975 /* Can't hold bond->lock with bh disabled here since
4065 * some base drivers panic. On the other hand we can't 3976 * some base drivers panic. On the other hand we can't
@@ -4077,8 +3988,10 @@ static int bond_change_mtu(struct net_device *bond_dev, int new_mtu)
4077 */ 3988 */
4078 3989
4079 bond_for_each_slave(bond, slave, i) { 3990 bond_for_each_slave(bond, slave, i) {
4080 pr_debug("s %p s->p %p c_m %p\n", slave, 3991 pr_debug("s %p s->p %p c_m %p\n",
4081 slave->prev, slave->dev->netdev_ops->ndo_change_mtu); 3992 slave,
3993 slave->prev,
3994 slave->dev->netdev_ops->ndo_change_mtu);
4082 3995
4083 res = dev_set_mtu(slave->dev, new_mtu); 3996 res = dev_set_mtu(slave->dev, new_mtu);
4084 3997
@@ -4108,8 +4021,8 @@ unwind:
4108 4021
4109 tmp_res = dev_set_mtu(slave->dev, bond_dev->mtu); 4022 tmp_res = dev_set_mtu(slave->dev, bond_dev->mtu);
4110 if (tmp_res) { 4023 if (tmp_res) {
4111 pr_debug("unwind err %d dev %s\n", tmp_res, 4024 pr_debug("unwind err %d dev %s\n",
4112 slave->dev->name); 4025 tmp_res, slave->dev->name);
4113 } 4026 }
4114 } 4027 }
4115 4028
@@ -4135,7 +4048,8 @@ static int bond_set_mac_address(struct net_device *bond_dev, void *addr)
4135 return bond_alb_set_mac_address(bond_dev, addr); 4048 return bond_alb_set_mac_address(bond_dev, addr);
4136 4049
4137 4050
4138 pr_debug("bond=%p, name=%s\n", bond, (bond_dev ? bond_dev->name : "None")); 4051 pr_debug("bond=%p, name=%s\n",
4052 bond, bond_dev ? bond_dev->name : "None");
4139 4053
4140 /* 4054 /*
4141 * If fail_over_mac is set to active, do nothing and return 4055 * If fail_over_mac is set to active, do nothing and return
@@ -4200,8 +4114,8 @@ unwind:
4200 4114
4201 tmp_res = dev_set_mac_address(slave->dev, &tmp_sa); 4115 tmp_res = dev_set_mac_address(slave->dev, &tmp_sa);
4202 if (tmp_res) { 4116 if (tmp_res) {
4203 pr_debug("unwind err %d dev %s\n", tmp_res, 4117 pr_debug("unwind err %d dev %s\n",
4204 slave->dev->name); 4118 tmp_res, slave->dev->name);
4205 } 4119 }
4206 } 4120 }
4207 4121
@@ -4357,9 +4271,7 @@ static int bond_xmit_broadcast(struct sk_buff *skb, struct net_device *bond_dev)
4357 if (tx_dev) { 4271 if (tx_dev) {
4358 struct sk_buff *skb2 = skb_clone(skb, GFP_ATOMIC); 4272 struct sk_buff *skb2 = skb_clone(skb, GFP_ATOMIC);
4359 if (!skb2) { 4273 if (!skb2) {
4360 pr_err(DRV_NAME 4274 pr_err("%s: Error: bond_xmit_broadcast(): skb_clone() failed\n",
4361 ": %s: Error: bond_xmit_broadcast(): "
4362 "skb_clone() failed\n",
4363 bond_dev->name); 4275 bond_dev->name);
4364 continue; 4276 continue;
4365 } 4277 }
@@ -4425,8 +4337,8 @@ static netdev_tx_t bond_start_xmit(struct sk_buff *skb, struct net_device *dev)
4425 return bond_alb_xmit(skb, dev); 4337 return bond_alb_xmit(skb, dev);
4426 default: 4338 default:
4427 /* Should never happen, mode already checked */ 4339 /* Should never happen, mode already checked */
4428 pr_err(DRV_NAME ": %s: Error: Unknown bonding mode %d\n", 4340 pr_err("%s: Error: Unknown bonding mode %d\n",
4429 dev->name, bond->params.mode); 4341 dev->name, bond->params.mode);
4430 WARN_ON_ONCE(1); 4342 WARN_ON_ONCE(1);
4431 dev_kfree_skb(skb); 4343 dev_kfree_skb(skb);
4432 return NETDEV_TX_OK; 4344 return NETDEV_TX_OK;
@@ -4462,10 +4374,8 @@ void bond_set_mode_ops(struct bonding *bond, int mode)
4462 break; 4374 break;
4463 default: 4375 default:
4464 /* Should never happen, mode already checked */ 4376 /* Should never happen, mode already checked */
4465 pr_err(DRV_NAME 4377 pr_err("%s: Error: Unknown bonding mode %d\n",
4466 ": %s: Error: Unknown bonding mode %d\n", 4378 bond_dev->name, mode);
4467 bond_dev->name,
4468 mode);
4469 break; 4379 break;
4470 } 4380 }
4471} 4381}
@@ -4650,8 +4560,7 @@ static int bond_check_params(struct bond_params *params)
4650 if (mode) { 4560 if (mode) {
4651 bond_mode = bond_parse_parm(mode, bond_mode_tbl); 4561 bond_mode = bond_parse_parm(mode, bond_mode_tbl);
4652 if (bond_mode == -1) { 4562 if (bond_mode == -1) {
4653 pr_err(DRV_NAME 4563 pr_err("Error: Invalid bonding mode \"%s\"\n",
4654 ": Error: Invalid bonding mode \"%s\"\n",
4655 mode == NULL ? "NULL" : mode); 4564 mode == NULL ? "NULL" : mode);
4656 return -EINVAL; 4565 return -EINVAL;
4657 } 4566 }
@@ -4660,16 +4569,13 @@ static int bond_check_params(struct bond_params *params)
4660 if (xmit_hash_policy) { 4569 if (xmit_hash_policy) {
4661 if ((bond_mode != BOND_MODE_XOR) && 4570 if ((bond_mode != BOND_MODE_XOR) &&
4662 (bond_mode != BOND_MODE_8023AD)) { 4571 (bond_mode != BOND_MODE_8023AD)) {
4663 pr_info(DRV_NAME 4572 pr_info("xmit_hash_policy param is irrelevant in mode %s\n",
4664 ": xmit_hash_policy param is irrelevant in"
4665 " mode %s\n",
4666 bond_mode_name(bond_mode)); 4573 bond_mode_name(bond_mode));
4667 } else { 4574 } else {
4668 xmit_hashtype = bond_parse_parm(xmit_hash_policy, 4575 xmit_hashtype = bond_parse_parm(xmit_hash_policy,
4669 xmit_hashtype_tbl); 4576 xmit_hashtype_tbl);
4670 if (xmit_hashtype == -1) { 4577 if (xmit_hashtype == -1) {
4671 pr_err(DRV_NAME 4578 pr_err("Error: Invalid xmit_hash_policy \"%s\"\n",
4672 ": Error: Invalid xmit_hash_policy \"%s\"\n",
4673 xmit_hash_policy == NULL ? "NULL" : 4579 xmit_hash_policy == NULL ? "NULL" :
4674 xmit_hash_policy); 4580 xmit_hash_policy);
4675 return -EINVAL; 4581 return -EINVAL;
@@ -4679,14 +4585,12 @@ static int bond_check_params(struct bond_params *params)
4679 4585
4680 if (lacp_rate) { 4586 if (lacp_rate) {
4681 if (bond_mode != BOND_MODE_8023AD) { 4587 if (bond_mode != BOND_MODE_8023AD) {
4682 pr_info(DRV_NAME 4588 pr_info("lacp_rate param is irrelevant in mode %s\n",
4683 ": lacp_rate param is irrelevant in mode %s\n", 4589 bond_mode_name(bond_mode));
4684 bond_mode_name(bond_mode));
4685 } else { 4590 } else {
4686 lacp_fast = bond_parse_parm(lacp_rate, bond_lacp_tbl); 4591 lacp_fast = bond_parse_parm(lacp_rate, bond_lacp_tbl);
4687 if (lacp_fast == -1) { 4592 if (lacp_fast == -1) {
4688 pr_err(DRV_NAME 4593 pr_err("Error: Invalid lacp rate \"%s\"\n",
4689 ": Error: Invalid lacp rate \"%s\"\n",
4690 lacp_rate == NULL ? "NULL" : lacp_rate); 4594 lacp_rate == NULL ? "NULL" : lacp_rate);
4691 return -EINVAL; 4595 return -EINVAL;
4692 } 4596 }
@@ -4696,82 +4600,64 @@ static int bond_check_params(struct bond_params *params)
4696 if (ad_select) { 4600 if (ad_select) {
4697 params->ad_select = bond_parse_parm(ad_select, ad_select_tbl); 4601 params->ad_select = bond_parse_parm(ad_select, ad_select_tbl);
4698 if (params->ad_select == -1) { 4602 if (params->ad_select == -1) {
4699 pr_err(DRV_NAME 4603 pr_err("Error: Invalid ad_select \"%s\"\n",
4700 ": Error: Invalid ad_select \"%s\"\n",
4701 ad_select == NULL ? "NULL" : ad_select); 4604 ad_select == NULL ? "NULL" : ad_select);
4702 return -EINVAL; 4605 return -EINVAL;
4703 } 4606 }
4704 4607
4705 if (bond_mode != BOND_MODE_8023AD) { 4608 if (bond_mode != BOND_MODE_8023AD) {
4706 pr_warning(DRV_NAME 4609 pr_warning("ad_select param only affects 802.3ad mode\n");
4707 ": ad_select param only affects 802.3ad mode\n");
4708 } 4610 }
4709 } else { 4611 } else {
4710 params->ad_select = BOND_AD_STABLE; 4612 params->ad_select = BOND_AD_STABLE;
4711 } 4613 }
4712 4614
4713 if (max_bonds < 0) { 4615 if (max_bonds < 0) {
4714 pr_warning(DRV_NAME 4616 pr_warning("Warning: max_bonds (%d) not in range %d-%d, so it was reset to BOND_DEFAULT_MAX_BONDS (%d)\n",
4715 ": Warning: max_bonds (%d) not in range %d-%d, so it " 4617 max_bonds, 0, INT_MAX, BOND_DEFAULT_MAX_BONDS);
4716 "was reset to BOND_DEFAULT_MAX_BONDS (%d)\n",
4717 max_bonds, 0, INT_MAX, BOND_DEFAULT_MAX_BONDS);
4718 max_bonds = BOND_DEFAULT_MAX_BONDS; 4618 max_bonds = BOND_DEFAULT_MAX_BONDS;
4719 } 4619 }
4720 4620
4721 if (miimon < 0) { 4621 if (miimon < 0) {
4722 pr_warning(DRV_NAME 4622 pr_warning("Warning: miimon module parameter (%d), not in range 0-%d, so it was reset to %d\n",
4723 ": Warning: miimon module parameter (%d), " 4623 miimon, INT_MAX, BOND_LINK_MON_INTERV);
4724 "not in range 0-%d, so it was reset to %d\n",
4725 miimon, INT_MAX, BOND_LINK_MON_INTERV);
4726 miimon = BOND_LINK_MON_INTERV; 4624 miimon = BOND_LINK_MON_INTERV;
4727 } 4625 }
4728 4626
4729 if (updelay < 0) { 4627 if (updelay < 0) {
4730 pr_warning(DRV_NAME 4628 pr_warning("Warning: updelay module parameter (%d), not in range 0-%d, so it was reset to 0\n",
4731 ": Warning: updelay module parameter (%d), " 4629 updelay, INT_MAX);
4732 "not in range 0-%d, so it was reset to 0\n",
4733 updelay, INT_MAX);
4734 updelay = 0; 4630 updelay = 0;
4735 } 4631 }
4736 4632
4737 if (downdelay < 0) { 4633 if (downdelay < 0) {
4738 pr_warning(DRV_NAME 4634 pr_warning("Warning: downdelay module parameter (%d), not in range 0-%d, so it was reset to 0\n",
4739 ": Warning: downdelay module parameter (%d), " 4635 downdelay, INT_MAX);
4740 "not in range 0-%d, so it was reset to 0\n",
4741 downdelay, INT_MAX);
4742 downdelay = 0; 4636 downdelay = 0;
4743 } 4637 }
4744 4638
4745 if ((use_carrier != 0) && (use_carrier != 1)) { 4639 if ((use_carrier != 0) && (use_carrier != 1)) {
4746 pr_warning(DRV_NAME 4640 pr_warning("Warning: use_carrier module parameter (%d), not of valid value (0/1), so it was set to 1\n",
4747 ": Warning: use_carrier module parameter (%d), " 4641 use_carrier);
4748 "not of valid value (0/1), so it was set to 1\n",
4749 use_carrier);
4750 use_carrier = 1; 4642 use_carrier = 1;
4751 } 4643 }
4752 4644
4753 if (num_grat_arp < 0 || num_grat_arp > 255) { 4645 if (num_grat_arp < 0 || num_grat_arp > 255) {
4754 pr_warning(DRV_NAME 4646 pr_warning("Warning: num_grat_arp (%d) not in range 0-255 so it was reset to 1 \n",
4755 ": Warning: num_grat_arp (%d) not in range 0-255 so it " 4647 num_grat_arp);
4756 "was reset to 1 \n", num_grat_arp);
4757 num_grat_arp = 1; 4648 num_grat_arp = 1;
4758 } 4649 }
4759 4650
4760 if (num_unsol_na < 0 || num_unsol_na > 255) { 4651 if (num_unsol_na < 0 || num_unsol_na > 255) {
4761 pr_warning(DRV_NAME 4652 pr_warning("Warning: num_unsol_na (%d) not in range 0-255 so it was reset to 1 \n",
4762 ": Warning: num_unsol_na (%d) not in range 0-255 so it " 4653 num_unsol_na);
4763 "was reset to 1 \n", num_unsol_na);
4764 num_unsol_na = 1; 4654 num_unsol_na = 1;
4765 } 4655 }
4766 4656
4767 /* reset values for 802.3ad */ 4657 /* reset values for 802.3ad */
4768 if (bond_mode == BOND_MODE_8023AD) { 4658 if (bond_mode == BOND_MODE_8023AD) {
4769 if (!miimon) { 4659 if (!miimon) {
4770 pr_warning(DRV_NAME 4660 pr_warning("Warning: miimon must be specified, otherwise bonding will not detect link failure, speed and duplex which are essential for 802.3ad operation\n");
4771 ": Warning: miimon must be specified, "
4772 "otherwise bonding will not detect link "
4773 "failure, speed and duplex which are "
4774 "essential for 802.3ad operation\n");
4775 pr_warning("Forcing miimon to 100msec\n"); 4661 pr_warning("Forcing miimon to 100msec\n");
4776 miimon = 100; 4662 miimon = 100;
4777 } 4663 }
@@ -4781,24 +4667,15 @@ static int bond_check_params(struct bond_params *params)
4781 if ((bond_mode == BOND_MODE_TLB) || 4667 if ((bond_mode == BOND_MODE_TLB) ||
4782 (bond_mode == BOND_MODE_ALB)) { 4668 (bond_mode == BOND_MODE_ALB)) {
4783 if (!miimon) { 4669 if (!miimon) {
4784 pr_warning(DRV_NAME 4670 pr_warning("Warning: miimon must be specified, otherwise bonding will not detect link failure and link speed which are essential for TLB/ALB load balancing\n");
4785 ": Warning: miimon must be specified, "
4786 "otherwise bonding will not detect link "
4787 "failure and link speed which are essential "
4788 "for TLB/ALB load balancing\n");
4789 pr_warning("Forcing miimon to 100msec\n"); 4671 pr_warning("Forcing miimon to 100msec\n");
4790 miimon = 100; 4672 miimon = 100;
4791 } 4673 }
4792 } 4674 }
4793 4675
4794 if (bond_mode == BOND_MODE_ALB) { 4676 if (bond_mode == BOND_MODE_ALB) {
4795 pr_notice(DRV_NAME 4677 pr_notice("In ALB mode you might experience client disconnections upon reconnection of a link if the bonding module updelay parameter (%d msec) is incompatible with the forwarding delay time of the switch\n",
4796 ": In ALB mode you might experience client " 4678 updelay);
4797 "disconnections upon reconnection of a link if the "
4798 "bonding module updelay parameter (%d msec) is "
4799 "incompatible with the forwarding delay time of the "
4800 "switch\n",
4801 updelay);
4802 } 4679 }
4803 4680
4804 if (!miimon) { 4681 if (!miimon) {
@@ -4806,49 +4683,37 @@ static int bond_check_params(struct bond_params *params)
4806 /* just warn the user the up/down delay will have 4683 /* just warn the user the up/down delay will have
4807 * no effect since miimon is zero... 4684 * no effect since miimon is zero...
4808 */ 4685 */
4809 pr_warning(DRV_NAME 4686 pr_warning("Warning: miimon module parameter not set and updelay (%d) or downdelay (%d) module parameter is set; updelay and downdelay have no effect unless miimon is set\n",
4810 ": Warning: miimon module parameter not set " 4687 updelay, downdelay);
4811 "and updelay (%d) or downdelay (%d) module "
4812 "parameter is set; updelay and downdelay have "
4813 "no effect unless miimon is set\n",
4814 updelay, downdelay);
4815 } 4688 }
4816 } else { 4689 } else {
4817 /* don't allow arp monitoring */ 4690 /* don't allow arp monitoring */
4818 if (arp_interval) { 4691 if (arp_interval) {
4819 pr_warning(DRV_NAME 4692 pr_warning("Warning: miimon (%d) and arp_interval (%d) can't be used simultaneously, disabling ARP monitoring\n",
4820 ": Warning: miimon (%d) and arp_interval (%d) " 4693 miimon, arp_interval);
4821 "can't be used simultaneously, disabling ARP "
4822 "monitoring\n",
4823 miimon, arp_interval);
4824 arp_interval = 0; 4694 arp_interval = 0;
4825 } 4695 }
4826 4696
4827 if ((updelay % miimon) != 0) { 4697 if ((updelay % miimon) != 0) {
4828 pr_warning(DRV_NAME 4698 pr_warning("Warning: updelay (%d) is not a multiple of miimon (%d), updelay rounded to %d ms\n",
4829 ": Warning: updelay (%d) is not a multiple " 4699 updelay, miimon,
4830 "of miimon (%d), updelay rounded to %d ms\n", 4700 (updelay / miimon) * miimon);
4831 updelay, miimon, (updelay / miimon) * miimon);
4832 } 4701 }
4833 4702
4834 updelay /= miimon; 4703 updelay /= miimon;
4835 4704
4836 if ((downdelay % miimon) != 0) { 4705 if ((downdelay % miimon) != 0) {
4837 pr_warning(DRV_NAME 4706 pr_warning("Warning: downdelay (%d) is not a multiple of miimon (%d), downdelay rounded to %d ms\n",
4838 ": Warning: downdelay (%d) is not a multiple " 4707 downdelay, miimon,
4839 "of miimon (%d), downdelay rounded to %d ms\n", 4708 (downdelay / miimon) * miimon);
4840 downdelay, miimon,
4841 (downdelay / miimon) * miimon);
4842 } 4709 }
4843 4710
4844 downdelay /= miimon; 4711 downdelay /= miimon;
4845 } 4712 }
4846 4713
4847 if (arp_interval < 0) { 4714 if (arp_interval < 0) {
4848 pr_warning(DRV_NAME 4715 pr_warning("Warning: arp_interval module parameter (%d) , not in range 0-%d, so it was reset to %d\n",
4849 ": Warning: arp_interval module parameter (%d) " 4716 arp_interval, INT_MAX, BOND_LINK_ARP_INTERV);
4850 ", not in range 0-%d, so it was reset to %d\n",
4851 arp_interval, INT_MAX, BOND_LINK_ARP_INTERV);
4852 arp_interval = BOND_LINK_ARP_INTERV; 4717 arp_interval = BOND_LINK_ARP_INTERV;
4853 } 4718 }
4854 4719
@@ -4858,10 +4723,8 @@ static int bond_check_params(struct bond_params *params)
4858 /* not complete check, but should be good enough to 4723 /* not complete check, but should be good enough to
4859 catch mistakes */ 4724 catch mistakes */
4860 if (!isdigit(arp_ip_target[arp_ip_count][0])) { 4725 if (!isdigit(arp_ip_target[arp_ip_count][0])) {
4861 pr_warning(DRV_NAME 4726 pr_warning("Warning: bad arp_ip_target module parameter (%s), ARP monitoring will not be performed\n",
4862 ": Warning: bad arp_ip_target module parameter " 4727 arp_ip_target[arp_ip_count]);
4863 "(%s), ARP monitoring will not be performed\n",
4864 arp_ip_target[arp_ip_count]);
4865 arp_interval = 0; 4728 arp_interval = 0;
4866 } else { 4729 } else {
4867 __be32 ip = in_aton(arp_ip_target[arp_ip_count]); 4730 __be32 ip = in_aton(arp_ip_target[arp_ip_count]);
@@ -4871,31 +4734,25 @@ static int bond_check_params(struct bond_params *params)
4871 4734
4872 if (arp_interval && !arp_ip_count) { 4735 if (arp_interval && !arp_ip_count) {
4873 /* don't allow arping if no arp_ip_target given... */ 4736 /* don't allow arping if no arp_ip_target given... */
4874 pr_warning(DRV_NAME 4737 pr_warning("Warning: arp_interval module parameter (%d) specified without providing an arp_ip_target parameter, arp_interval was reset to 0\n",
4875 ": Warning: arp_interval module parameter (%d) " 4738 arp_interval);
4876 "specified without providing an arp_ip_target "
4877 "parameter, arp_interval was reset to 0\n",
4878 arp_interval);
4879 arp_interval = 0; 4739 arp_interval = 0;
4880 } 4740 }
4881 4741
4882 if (arp_validate) { 4742 if (arp_validate) {
4883 if (bond_mode != BOND_MODE_ACTIVEBACKUP) { 4743 if (bond_mode != BOND_MODE_ACTIVEBACKUP) {
4884 pr_err(DRV_NAME 4744 pr_err("arp_validate only supported in active-backup mode\n");
4885 ": arp_validate only supported in active-backup mode\n");
4886 return -EINVAL; 4745 return -EINVAL;
4887 } 4746 }
4888 if (!arp_interval) { 4747 if (!arp_interval) {
4889 pr_err(DRV_NAME 4748 pr_err("arp_validate requires arp_interval\n");
4890 ": arp_validate requires arp_interval\n");
4891 return -EINVAL; 4749 return -EINVAL;
4892 } 4750 }
4893 4751
4894 arp_validate_value = bond_parse_parm(arp_validate, 4752 arp_validate_value = bond_parse_parm(arp_validate,
4895 arp_validate_tbl); 4753 arp_validate_tbl);
4896 if (arp_validate_value == -1) { 4754 if (arp_validate_value == -1) {
4897 pr_err(DRV_NAME 4755 pr_err("Error: invalid arp_validate \"%s\"\n",
4898 ": Error: invalid arp_validate \"%s\"\n",
4899 arp_validate == NULL ? "NULL" : arp_validate); 4756 arp_validate == NULL ? "NULL" : arp_validate);
4900 return -EINVAL; 4757 return -EINVAL;
4901 } 4758 }
@@ -4903,17 +4760,14 @@ static int bond_check_params(struct bond_params *params)
4903 arp_validate_value = 0; 4760 arp_validate_value = 0;
4904 4761
4905 if (miimon) { 4762 if (miimon) {
4906 pr_info(DRV_NAME 4763 pr_info("MII link monitoring set to %d ms\n", miimon);
4907 ": MII link monitoring set to %d ms\n",
4908 miimon);
4909 } else if (arp_interval) { 4764 } else if (arp_interval) {
4910 int i; 4765 int i;
4911 4766
4912 pr_info(DRV_NAME ": ARP monitoring set to %d ms," 4767 pr_info("ARP monitoring set to %d ms, validate %s, with %d target(s):",
4913 " validate %s, with %d target(s):", 4768 arp_interval,
4914 arp_interval, 4769 arp_validate_tbl[arp_validate_value].modename,
4915 arp_validate_tbl[arp_validate_value].modename, 4770 arp_ip_count);
4916 arp_ip_count);
4917 4771
4918 for (i = 0; i < arp_ip_count; i++) 4772 for (i = 0; i < arp_ip_count; i++)
4919 pr_info(" %s", arp_ip_target[i]); 4773 pr_info(" %s", arp_ip_target[i]);
@@ -4924,21 +4778,15 @@ static int bond_check_params(struct bond_params *params)
4924 /* miimon and arp_interval not set, we need one so things 4778 /* miimon and arp_interval not set, we need one so things
4925 * work as expected, see bonding.txt for details 4779 * work as expected, see bonding.txt for details
4926 */ 4780 */
4927 pr_warning(DRV_NAME 4781 pr_warning("Warning: either miimon or arp_interval and arp_ip_target module parameters must be specified, otherwise bonding will not detect link failures! see bonding.txt for details.\n");
4928 ": Warning: either miimon or arp_interval and "
4929 "arp_ip_target module parameters must be specified, "
4930 "otherwise bonding will not detect link failures! see "
4931 "bonding.txt for details.\n");
4932 } 4782 }
4933 4783
4934 if (primary && !USES_PRIMARY(bond_mode)) { 4784 if (primary && !USES_PRIMARY(bond_mode)) {
4935 /* currently, using a primary only makes sense 4785 /* currently, using a primary only makes sense
4936 * in active backup, TLB or ALB modes 4786 * in active backup, TLB or ALB modes
4937 */ 4787 */
4938 pr_warning(DRV_NAME 4788 pr_warning("Warning: %s primary device specified but has no effect in %s mode\n",
4939 ": Warning: %s primary device specified but has no " 4789 primary, bond_mode_name(bond_mode));
4940 "effect in %s mode\n",
4941 primary, bond_mode_name(bond_mode));
4942 primary = NULL; 4790 primary = NULL;
4943 } 4791 }
4944 4792
@@ -4946,8 +4794,7 @@ static int bond_check_params(struct bond_params *params)
4946 primary_reselect_value = bond_parse_parm(primary_reselect, 4794 primary_reselect_value = bond_parse_parm(primary_reselect,
4947 pri_reselect_tbl); 4795 pri_reselect_tbl);
4948 if (primary_reselect_value == -1) { 4796 if (primary_reselect_value == -1) {
4949 pr_err(DRV_NAME 4797 pr_err("Error: Invalid primary_reselect \"%s\"\n",
4950 ": Error: Invalid primary_reselect \"%s\"\n",
4951 primary_reselect == 4798 primary_reselect ==
4952 NULL ? "NULL" : primary_reselect); 4799 NULL ? "NULL" : primary_reselect);
4953 return -EINVAL; 4800 return -EINVAL;
@@ -4960,16 +4807,13 @@ static int bond_check_params(struct bond_params *params)
4960 fail_over_mac_value = bond_parse_parm(fail_over_mac, 4807 fail_over_mac_value = bond_parse_parm(fail_over_mac,
4961 fail_over_mac_tbl); 4808 fail_over_mac_tbl);
4962 if (fail_over_mac_value == -1) { 4809 if (fail_over_mac_value == -1) {
4963 pr_err(DRV_NAME 4810 pr_err("Error: invalid fail_over_mac \"%s\"\n",
4964 ": Error: invalid fail_over_mac \"%s\"\n",
4965 arp_validate == NULL ? "NULL" : arp_validate); 4811 arp_validate == NULL ? "NULL" : arp_validate);
4966 return -EINVAL; 4812 return -EINVAL;
4967 } 4813 }
4968 4814
4969 if (bond_mode != BOND_MODE_ACTIVEBACKUP) 4815 if (bond_mode != BOND_MODE_ACTIVEBACKUP)
4970 pr_warning(DRV_NAME 4816 pr_warning("Warning: fail_over_mac only affects active-backup mode.\n");
4971 ": Warning: fail_over_mac only affects "
4972 "active-backup mode.\n");
4973 } else { 4817 } else {
4974 fail_over_mac_value = BOND_FOM_NONE; 4818 fail_over_mac_value = BOND_FOM_NONE;
4975 } 4819 }
@@ -5076,8 +4920,7 @@ int bond_create(struct net *net, const char *name)
5076 bond_dev = alloc_netdev(sizeof(struct bonding), name ? name : "", 4920 bond_dev = alloc_netdev(sizeof(struct bonding), name ? name : "",
5077 bond_setup); 4921 bond_setup);
5078 if (!bond_dev) { 4922 if (!bond_dev) {
5079 pr_err(DRV_NAME ": %s: eek! can't alloc netdev!\n", 4923 pr_err("%s: eek! can't alloc netdev!\n", name);
5080 name);
5081 res = -ENOMEM; 4924 res = -ENOMEM;
5082 goto out; 4925 goto out;
5083 } 4926 }
diff --git a/drivers/net/bonding/bond_sysfs.c b/drivers/net/bonding/bond_sysfs.c
index 4e00b4f83641..5acd557cea9b 100644
--- a/drivers/net/bonding/bond_sysfs.c
+++ b/drivers/net/bonding/bond_sysfs.c
@@ -19,6 +19,9 @@
19 * file called LICENSE. 19 * file called LICENSE.
20 * 20 *
21 */ 21 */
22
23#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
24
22#include <linux/kernel.h> 25#include <linux/kernel.h>
23#include <linux/module.h> 26#include <linux/module.h>
24#include <linux/device.h> 27#include <linux/device.h>
@@ -109,11 +112,10 @@ static ssize_t bonding_store_bonds(struct class *cls,
109 goto err_no_cmd; 112 goto err_no_cmd;
110 113
111 if (command[0] == '+') { 114 if (command[0] == '+') {
112 pr_info(DRV_NAME 115 pr_info("%s is being created...\n", ifname);
113 ": %s is being created...\n", ifname);
114 rv = bond_create(net, ifname); 116 rv = bond_create(net, ifname);
115 if (rv) { 117 if (rv) {
116 pr_info(DRV_NAME ": Bond creation failed.\n"); 118 pr_info("Bond creation failed.\n");
117 res = rv; 119 res = rv;
118 } 120 }
119 } else if (command[0] == '-') { 121 } else if (command[0] == '-') {
@@ -122,12 +124,10 @@ static ssize_t bonding_store_bonds(struct class *cls,
122 rtnl_lock(); 124 rtnl_lock();
123 bond_dev = bond_get_by_name(net, ifname); 125 bond_dev = bond_get_by_name(net, ifname);
124 if (bond_dev) { 126 if (bond_dev) {
125 pr_info(DRV_NAME ": %s is being deleted...\n", 127 pr_info("%s is being deleted...\n", ifname);
126 ifname);
127 unregister_netdevice(bond_dev); 128 unregister_netdevice(bond_dev);
128 } else { 129 } else {
129 pr_err(DRV_NAME ": unable to delete non-existent %s\n", 130 pr_err("unable to delete non-existent %s\n", ifname);
130 ifname);
131 res = -ENODEV; 131 res = -ENODEV;
132 } 132 }
133 rtnl_unlock(); 133 rtnl_unlock();
@@ -140,8 +140,7 @@ static ssize_t bonding_store_bonds(struct class *cls,
140 return res; 140 return res;
141 141
142err_no_cmd: 142err_no_cmd:
143 pr_err(DRV_NAME ": no command found in bonding_masters." 143 pr_err("no command found in bonding_masters. Use +ifname or -ifname.\n");
144 " Use +ifname or -ifname.\n");
145 return -EPERM; 144 return -EPERM;
146} 145}
147 146
@@ -225,8 +224,8 @@ static ssize_t bonding_store_slaves(struct device *d,
225 224
226 /* Quick sanity check -- is the bond interface up? */ 225 /* Quick sanity check -- is the bond interface up? */
227 if (!(bond->dev->flags & IFF_UP)) { 226 if (!(bond->dev->flags & IFF_UP)) {
228 pr_warning(DRV_NAME ": %s: doing slave updates when " 227 pr_warning("%s: doing slave updates when interface is down.\n",
229 "interface is down.\n", bond->dev->name); 228 bond->dev->name);
230 } 229 }
231 230
232 /* Note: We can't hold bond->lock here, as bond_create grabs it. */ 231 /* Note: We can't hold bond->lock here, as bond_create grabs it. */
@@ -247,17 +246,14 @@ static ssize_t bonding_store_slaves(struct device *d,
247 246
248 dev = __dev_get_by_name(dev_net(bond->dev), ifname); 247 dev = __dev_get_by_name(dev_net(bond->dev), ifname);
249 if (!dev) { 248 if (!dev) {
250 pr_info(DRV_NAME 249 pr_info("%s: Interface %s does not exist!\n",
251 ": %s: Interface %s does not exist!\n", 250 bond->dev->name, ifname);
252 bond->dev->name, ifname);
253 ret = -ENODEV; 251 ret = -ENODEV;
254 goto out; 252 goto out;
255 } 253 }
256 254
257 if (dev->flags & IFF_UP) { 255 if (dev->flags & IFF_UP) {
258 pr_err(DRV_NAME 256 pr_err("%s: Error: Unable to enslave %s because it is already up.\n",
259 ": %s: Error: Unable to enslave %s "
260 "because it is already up.\n",
261 bond->dev->name, dev->name); 257 bond->dev->name, dev->name);
262 ret = -EPERM; 258 ret = -EPERM;
263 goto out; 259 goto out;
@@ -266,8 +262,7 @@ static ssize_t bonding_store_slaves(struct device *d,
266 read_lock(&bond->lock); 262 read_lock(&bond->lock);
267 bond_for_each_slave(bond, slave, i) 263 bond_for_each_slave(bond, slave, i)
268 if (slave->dev == dev) { 264 if (slave->dev == dev) {
269 pr_err(DRV_NAME 265 pr_err("%s: Interface %s is already enslaved!\n",
270 ": %s: Interface %s is already enslaved!\n",
271 bond->dev->name, ifname); 266 bond->dev->name, ifname);
272 ret = -EPERM; 267 ret = -EPERM;
273 read_unlock(&bond->lock); 268 read_unlock(&bond->lock);
@@ -275,8 +270,7 @@ static ssize_t bonding_store_slaves(struct device *d,
275 } 270 }
276 read_unlock(&bond->lock); 271 read_unlock(&bond->lock);
277 272
278 pr_info(DRV_NAME ": %s: Adding slave %s.\n", 273 pr_info("%s: Adding slave %s.\n", bond->dev->name, ifname);
279 bond->dev->name, ifname);
280 274
281 /* If this is the first slave, then we need to set 275 /* If this is the first slave, then we need to set
282 the master's hardware address to be the same as the 276 the master's hardware address to be the same as the
@@ -313,7 +307,7 @@ static ssize_t bonding_store_slaves(struct device *d,
313 break; 307 break;
314 } 308 }
315 if (dev) { 309 if (dev) {
316 pr_info(DRV_NAME ": %s: Removing slave %s\n", 310 pr_info("%s: Removing slave %s\n",
317 bond->dev->name, dev->name); 311 bond->dev->name, dev->name);
318 res = bond_release(bond->dev, dev); 312 res = bond_release(bond->dev, dev);
319 if (res) { 313 if (res) {
@@ -323,16 +317,16 @@ static ssize_t bonding_store_slaves(struct device *d,
323 /* set the slave MTU to the default */ 317 /* set the slave MTU to the default */
324 dev_set_mtu(dev, original_mtu); 318 dev_set_mtu(dev, original_mtu);
325 } else { 319 } else {
326 pr_err(DRV_NAME ": unable to remove non-existent" 320 pr_err("unable to remove non-existent slave %s for bond %s.\n",
327 " slave %s for bond %s.\n", 321 ifname, bond->dev->name);
328 ifname, bond->dev->name);
329 ret = -ENODEV; 322 ret = -ENODEV;
330 } 323 }
331 goto out; 324 goto out;
332 } 325 }
333 326
334err_no_cmd: 327err_no_cmd:
335 pr_err(DRV_NAME ": no command found in slaves file for bond %s. Use +ifname or -ifname.\n", bond->dev->name); 328 pr_err("no command found in slaves file for bond %s. Use +ifname or -ifname.\n",
329 bond->dev->name);
336 ret = -EPERM; 330 ret = -EPERM;
337 331
338out: 332out:
@@ -365,18 +359,16 @@ static ssize_t bonding_store_mode(struct device *d,
365 struct bonding *bond = to_bond(d); 359 struct bonding *bond = to_bond(d);
366 360
367 if (bond->dev->flags & IFF_UP) { 361 if (bond->dev->flags & IFF_UP) {
368 pr_err(DRV_NAME ": unable to update mode of %s" 362 pr_err("unable to update mode of %s because interface is up.\n",
369 " because interface is up.\n", bond->dev->name); 363 bond->dev->name);
370 ret = -EPERM; 364 ret = -EPERM;
371 goto out; 365 goto out;
372 } 366 }
373 367
374 new_value = bond_parse_parm(buf, bond_mode_tbl); 368 new_value = bond_parse_parm(buf, bond_mode_tbl);
375 if (new_value < 0) { 369 if (new_value < 0) {
376 pr_err(DRV_NAME 370 pr_err("%s: Ignoring invalid mode value %.*s.\n",
377 ": %s: Ignoring invalid mode value %.*s.\n", 371 bond->dev->name, (int)strlen(buf) - 1, buf);
378 bond->dev->name,
379 (int)strlen(buf) - 1, buf);
380 ret = -EINVAL; 372 ret = -EINVAL;
381 goto out; 373 goto out;
382 } else { 374 } else {
@@ -388,8 +380,8 @@ static ssize_t bonding_store_mode(struct device *d,
388 380
389 bond->params.mode = new_value; 381 bond->params.mode = new_value;
390 bond_set_mode_ops(bond, bond->params.mode); 382 bond_set_mode_ops(bond, bond->params.mode);
391 pr_info(DRV_NAME ": %s: setting mode to %s (%d).\n", 383 pr_info("%s: setting mode to %s (%d).\n",
392 bond->dev->name, bond_mode_tbl[new_value].modename, 384 bond->dev->name, bond_mode_tbl[new_value].modename,
393 new_value); 385 new_value);
394 } 386 }
395out: 387out:
@@ -421,8 +413,7 @@ static ssize_t bonding_store_xmit_hash(struct device *d,
421 struct bonding *bond = to_bond(d); 413 struct bonding *bond = to_bond(d);
422 414
423 if (bond->dev->flags & IFF_UP) { 415 if (bond->dev->flags & IFF_UP) {
424 pr_err(DRV_NAME 416 pr_err("%s: Interface is up. Unable to update xmit policy.\n",
425 "%s: Interface is up. Unable to update xmit policy.\n",
426 bond->dev->name); 417 bond->dev->name);
427 ret = -EPERM; 418 ret = -EPERM;
428 goto out; 419 goto out;
@@ -430,8 +421,7 @@ static ssize_t bonding_store_xmit_hash(struct device *d,
430 421
431 new_value = bond_parse_parm(buf, xmit_hashtype_tbl); 422 new_value = bond_parse_parm(buf, xmit_hashtype_tbl);
432 if (new_value < 0) { 423 if (new_value < 0) {
433 pr_err(DRV_NAME 424 pr_err("%s: Ignoring invalid xmit hash policy value %.*s.\n",
434 ": %s: Ignoring invalid xmit hash policy value %.*s.\n",
435 bond->dev->name, 425 bond->dev->name,
436 (int)strlen(buf) - 1, buf); 426 (int)strlen(buf) - 1, buf);
437 ret = -EINVAL; 427 ret = -EINVAL;
@@ -439,7 +429,7 @@ static ssize_t bonding_store_xmit_hash(struct device *d,
439 } else { 429 } else {
440 bond->params.xmit_policy = new_value; 430 bond->params.xmit_policy = new_value;
441 bond_set_mode_ops(bond, bond->params.mode); 431 bond_set_mode_ops(bond, bond->params.mode);
442 pr_info(DRV_NAME ": %s: setting xmit hash policy to %s (%d).\n", 432 pr_info("%s: setting xmit hash policy to %s (%d).\n",
443 bond->dev->name, 433 bond->dev->name,
444 xmit_hashtype_tbl[new_value].modename, new_value); 434 xmit_hashtype_tbl[new_value].modename, new_value);
445 } 435 }
@@ -472,20 +462,18 @@ static ssize_t bonding_store_arp_validate(struct device *d,
472 462
473 new_value = bond_parse_parm(buf, arp_validate_tbl); 463 new_value = bond_parse_parm(buf, arp_validate_tbl);
474 if (new_value < 0) { 464 if (new_value < 0) {
475 pr_err(DRV_NAME 465 pr_err("%s: Ignoring invalid arp_validate value %s\n",
476 ": %s: Ignoring invalid arp_validate value %s\n",
477 bond->dev->name, buf); 466 bond->dev->name, buf);
478 return -EINVAL; 467 return -EINVAL;
479 } 468 }
480 if (new_value && (bond->params.mode != BOND_MODE_ACTIVEBACKUP)) { 469 if (new_value && (bond->params.mode != BOND_MODE_ACTIVEBACKUP)) {
481 pr_err(DRV_NAME 470 pr_err("%s: arp_validate only supported in active-backup mode.\n",
482 ": %s: arp_validate only supported in active-backup mode.\n",
483 bond->dev->name); 471 bond->dev->name);
484 return -EINVAL; 472 return -EINVAL;
485 } 473 }
486 pr_info(DRV_NAME ": %s: setting arp_validate to %s (%d).\n", 474 pr_info("%s: setting arp_validate to %s (%d).\n",
487 bond->dev->name, arp_validate_tbl[new_value].modename, 475 bond->dev->name, arp_validate_tbl[new_value].modename,
488 new_value); 476 new_value);
489 477
490 if (!bond->params.arp_validate && new_value) 478 if (!bond->params.arp_validate && new_value)
491 bond_register_arp(bond); 479 bond_register_arp(bond);
@@ -523,24 +511,22 @@ static ssize_t bonding_store_fail_over_mac(struct device *d,
523 struct bonding *bond = to_bond(d); 511 struct bonding *bond = to_bond(d);
524 512
525 if (bond->slave_cnt != 0) { 513 if (bond->slave_cnt != 0) {
526 pr_err(DRV_NAME 514 pr_err("%s: Can't alter fail_over_mac with slaves in bond.\n",
527 ": %s: Can't alter fail_over_mac with slaves in bond.\n",
528 bond->dev->name); 515 bond->dev->name);
529 return -EPERM; 516 return -EPERM;
530 } 517 }
531 518
532 new_value = bond_parse_parm(buf, fail_over_mac_tbl); 519 new_value = bond_parse_parm(buf, fail_over_mac_tbl);
533 if (new_value < 0) { 520 if (new_value < 0) {
534 pr_err(DRV_NAME 521 pr_err("%s: Ignoring invalid fail_over_mac value %s.\n",
535 ": %s: Ignoring invalid fail_over_mac value %s.\n",
536 bond->dev->name, buf); 522 bond->dev->name, buf);
537 return -EINVAL; 523 return -EINVAL;
538 } 524 }
539 525
540 bond->params.fail_over_mac = new_value; 526 bond->params.fail_over_mac = new_value;
541 pr_info(DRV_NAME ": %s: Setting fail_over_mac to %s (%d).\n", 527 pr_info("%s: Setting fail_over_mac to %s (%d).\n",
542 bond->dev->name, fail_over_mac_tbl[new_value].modename, 528 bond->dev->name, fail_over_mac_tbl[new_value].modename,
543 new_value); 529 new_value);
544 530
545 return count; 531 return count;
546} 532}
@@ -571,31 +557,26 @@ static ssize_t bonding_store_arp_interval(struct device *d,
571 struct bonding *bond = to_bond(d); 557 struct bonding *bond = to_bond(d);
572 558
573 if (sscanf(buf, "%d", &new_value) != 1) { 559 if (sscanf(buf, "%d", &new_value) != 1) {
574 pr_err(DRV_NAME 560 pr_err("%s: no arp_interval value specified.\n",
575 ": %s: no arp_interval value specified.\n",
576 bond->dev->name); 561 bond->dev->name);
577 ret = -EINVAL; 562 ret = -EINVAL;
578 goto out; 563 goto out;
579 } 564 }
580 if (new_value < 0) { 565 if (new_value < 0) {
581 pr_err(DRV_NAME 566 pr_err("%s: Invalid arp_interval value %d not in range 1-%d; rejected.\n",
582 ": %s: Invalid arp_interval value %d not in range 1-%d; rejected.\n",
583 bond->dev->name, new_value, INT_MAX); 567 bond->dev->name, new_value, INT_MAX);
584 ret = -EINVAL; 568 ret = -EINVAL;
585 goto out; 569 goto out;
586 } 570 }
587 571
588 pr_info(DRV_NAME 572 pr_info("%s: Setting ARP monitoring interval to %d.\n",
589 ": %s: Setting ARP monitoring interval to %d.\n", 573 bond->dev->name, new_value);
590 bond->dev->name, new_value);
591 bond->params.arp_interval = new_value; 574 bond->params.arp_interval = new_value;
592 if (bond->params.arp_interval) 575 if (bond->params.arp_interval)
593 bond->dev->priv_flags |= IFF_MASTER_ARPMON; 576 bond->dev->priv_flags |= IFF_MASTER_ARPMON;
594 if (bond->params.miimon) { 577 if (bond->params.miimon) {
595 pr_info(DRV_NAME 578 pr_info("%s: ARP monitoring cannot be used with MII monitoring. %s Disabling MII monitoring.\n",
596 ": %s: ARP monitoring cannot be used with MII monitoring. " 579 bond->dev->name, bond->dev->name);
597 "%s Disabling MII monitoring.\n",
598 bond->dev->name, bond->dev->name);
599 bond->params.miimon = 0; 580 bond->params.miimon = 0;
600 if (delayed_work_pending(&bond->mii_work)) { 581 if (delayed_work_pending(&bond->mii_work)) {
601 cancel_delayed_work(&bond->mii_work); 582 cancel_delayed_work(&bond->mii_work);
@@ -603,10 +584,8 @@ static ssize_t bonding_store_arp_interval(struct device *d,
603 } 584 }
604 } 585 }
605 if (!bond->params.arp_targets[0]) { 586 if (!bond->params.arp_targets[0]) {
606 pr_info(DRV_NAME 587 pr_info("%s: ARP monitoring has been set up, but no ARP targets have been specified.\n",
607 ": %s: ARP monitoring has been set up, " 588 bond->dev->name);
608 "but no ARP targets have been specified.\n",
609 bond->dev->name);
610 } 589 }
611 if (bond->dev->flags & IFF_UP) { 590 if (bond->dev->flags & IFF_UP) {
612 /* If the interface is up, we may need to fire off 591 /* If the interface is up, we may need to fire off
@@ -666,8 +645,7 @@ static ssize_t bonding_store_arp_targets(struct device *d,
666 /* look for adds */ 645 /* look for adds */
667 if (buf[0] == '+') { 646 if (buf[0] == '+') {
668 if ((newtarget == 0) || (newtarget == htonl(INADDR_BROADCAST))) { 647 if ((newtarget == 0) || (newtarget == htonl(INADDR_BROADCAST))) {
669 pr_err(DRV_NAME 648 pr_err("%s: invalid ARP target %pI4 specified for addition\n",
670 ": %s: invalid ARP target %pI4 specified for addition\n",
671 bond->dev->name, &newtarget); 649 bond->dev->name, &newtarget);
672 ret = -EINVAL; 650 ret = -EINVAL;
673 goto out; 651 goto out;
@@ -675,23 +653,20 @@ static ssize_t bonding_store_arp_targets(struct device *d,
675 /* look for an empty slot to put the target in, and check for dupes */ 653 /* look for an empty slot to put the target in, and check for dupes */
676 for (i = 0; (i < BOND_MAX_ARP_TARGETS) && !done; i++) { 654 for (i = 0; (i < BOND_MAX_ARP_TARGETS) && !done; i++) {
677 if (targets[i] == newtarget) { /* duplicate */ 655 if (targets[i] == newtarget) { /* duplicate */
678 pr_err(DRV_NAME 656 pr_err("%s: ARP target %pI4 is already present\n",
679 ": %s: ARP target %pI4 is already present\n",
680 bond->dev->name, &newtarget); 657 bond->dev->name, &newtarget);
681 ret = -EINVAL; 658 ret = -EINVAL;
682 goto out; 659 goto out;
683 } 660 }
684 if (targets[i] == 0) { 661 if (targets[i] == 0) {
685 pr_info(DRV_NAME 662 pr_info("%s: adding ARP target %pI4.\n",
686 ": %s: adding ARP target %pI4.\n", 663 bond->dev->name, &newtarget);
687 bond->dev->name, &newtarget);
688 done = 1; 664 done = 1;
689 targets[i] = newtarget; 665 targets[i] = newtarget;
690 } 666 }
691 } 667 }
692 if (!done) { 668 if (!done) {
693 pr_err(DRV_NAME 669 pr_err("%s: ARP target table is full!\n",
694 ": %s: ARP target table is full!\n",
695 bond->dev->name); 670 bond->dev->name);
696 ret = -EINVAL; 671 ret = -EINVAL;
697 goto out; 672 goto out;
@@ -699,8 +674,7 @@ static ssize_t bonding_store_arp_targets(struct device *d,
699 674
700 } else if (buf[0] == '-') { 675 } else if (buf[0] == '-') {
701 if ((newtarget == 0) || (newtarget == htonl(INADDR_BROADCAST))) { 676 if ((newtarget == 0) || (newtarget == htonl(INADDR_BROADCAST))) {
702 pr_err(DRV_NAME 677 pr_err("%s: invalid ARP target %pI4 specified for removal\n",
703 ": %s: invalid ARP target %pI4 specified for removal\n",
704 bond->dev->name, &newtarget); 678 bond->dev->name, &newtarget);
705 ret = -EINVAL; 679 ret = -EINVAL;
706 goto out; 680 goto out;
@@ -709,9 +683,8 @@ static ssize_t bonding_store_arp_targets(struct device *d,
709 for (i = 0; (i < BOND_MAX_ARP_TARGETS) && !done; i++) { 683 for (i = 0; (i < BOND_MAX_ARP_TARGETS) && !done; i++) {
710 if (targets[i] == newtarget) { 684 if (targets[i] == newtarget) {
711 int j; 685 int j;
712 pr_info(DRV_NAME 686 pr_info("%s: removing ARP target %pI4.\n",
713 ": %s: removing ARP target %pI4.\n", 687 bond->dev->name, &newtarget);
714 bond->dev->name, &newtarget);
715 for (j = i; (j < (BOND_MAX_ARP_TARGETS-1)) && targets[j+1]; j++) 688 for (j = i; (j < (BOND_MAX_ARP_TARGETS-1)) && targets[j+1]; j++)
716 targets[j] = targets[j+1]; 689 targets[j] = targets[j+1];
717 690
@@ -720,16 +693,14 @@ static ssize_t bonding_store_arp_targets(struct device *d,
720 } 693 }
721 } 694 }
722 if (!done) { 695 if (!done) {
723 pr_info(DRV_NAME 696 pr_info("%s: unable to remove nonexistent ARP target %pI4.\n",
724 ": %s: unable to remove nonexistent ARP target %pI4.\n", 697 bond->dev->name, &newtarget);
725 bond->dev->name, &newtarget);
726 ret = -EINVAL; 698 ret = -EINVAL;
727 goto out; 699 goto out;
728 } 700 }
729 } else { 701 } else {
730 pr_err(DRV_NAME ": no command found in arp_ip_targets file" 702 pr_err("no command found in arp_ip_targets file for bond %s. Use +<addr> or -<addr>.\n",
731 " for bond %s. Use +<addr> or -<addr>.\n", 703 bond->dev->name);
732 bond->dev->name);
733 ret = -EPERM; 704 ret = -EPERM;
734 goto out; 705 goto out;
735 } 706 }
@@ -761,41 +732,34 @@ static ssize_t bonding_store_downdelay(struct device *d,
761 struct bonding *bond = to_bond(d); 732 struct bonding *bond = to_bond(d);
762 733
763 if (!(bond->params.miimon)) { 734 if (!(bond->params.miimon)) {
764 pr_err(DRV_NAME 735 pr_err("%s: Unable to set down delay as MII monitoring is disabled\n",
765 ": %s: Unable to set down delay as MII monitoring is disabled\n",
766 bond->dev->name); 736 bond->dev->name);
767 ret = -EPERM; 737 ret = -EPERM;
768 goto out; 738 goto out;
769 } 739 }
770 740
771 if (sscanf(buf, "%d", &new_value) != 1) { 741 if (sscanf(buf, "%d", &new_value) != 1) {
772 pr_err(DRV_NAME 742 pr_err("%s: no down delay value specified.\n", bond->dev->name);
773 ": %s: no down delay value specified.\n",
774 bond->dev->name);
775 ret = -EINVAL; 743 ret = -EINVAL;
776 goto out; 744 goto out;
777 } 745 }
778 if (new_value < 0) { 746 if (new_value < 0) {
779 pr_err(DRV_NAME 747 pr_err("%s: Invalid down delay value %d not in range %d-%d; rejected.\n",
780 ": %s: Invalid down delay value %d not in range %d-%d; rejected.\n",
781 bond->dev->name, new_value, 1, INT_MAX); 748 bond->dev->name, new_value, 1, INT_MAX);
782 ret = -EINVAL; 749 ret = -EINVAL;
783 goto out; 750 goto out;
784 } else { 751 } else {
785 if ((new_value % bond->params.miimon) != 0) { 752 if ((new_value % bond->params.miimon) != 0) {
786 pr_warning(DRV_NAME 753 pr_warning("%s: Warning: down delay (%d) is not a multiple of miimon (%d), delay rounded to %d ms\n",
787 ": %s: Warning: down delay (%d) is not a "
788 "multiple of miimon (%d), delay rounded "
789 "to %d ms\n",
790 bond->dev->name, new_value, 754 bond->dev->name, new_value,
791 bond->params.miimon, 755 bond->params.miimon,
792 (new_value / bond->params.miimon) * 756 (new_value / bond->params.miimon) *
793 bond->params.miimon); 757 bond->params.miimon);
794 } 758 }
795 bond->params.downdelay = new_value / bond->params.miimon; 759 bond->params.downdelay = new_value / bond->params.miimon;
796 pr_info(DRV_NAME ": %s: Setting down delay to %d.\n", 760 pr_info("%s: Setting down delay to %d.\n",
797 bond->dev->name, 761 bond->dev->name,
798 bond->params.downdelay * bond->params.miimon); 762 bond->params.downdelay * bond->params.miimon);
799 763
800 } 764 }
801 765
@@ -823,41 +787,35 @@ static ssize_t bonding_store_updelay(struct device *d,
823 struct bonding *bond = to_bond(d); 787 struct bonding *bond = to_bond(d);
824 788
825 if (!(bond->params.miimon)) { 789 if (!(bond->params.miimon)) {
826 pr_err(DRV_NAME 790 pr_err("%s: Unable to set up delay as MII monitoring is disabled\n",
827 ": %s: Unable to set up delay as MII monitoring is disabled\n",
828 bond->dev->name); 791 bond->dev->name);
829 ret = -EPERM; 792 ret = -EPERM;
830 goto out; 793 goto out;
831 } 794 }
832 795
833 if (sscanf(buf, "%d", &new_value) != 1) { 796 if (sscanf(buf, "%d", &new_value) != 1) {
834 pr_err(DRV_NAME 797 pr_err("%s: no up delay value specified.\n",
835 ": %s: no up delay value specified.\n",
836 bond->dev->name); 798 bond->dev->name);
837 ret = -EINVAL; 799 ret = -EINVAL;
838 goto out; 800 goto out;
839 } 801 }
840 if (new_value < 0) { 802 if (new_value < 0) {
841 pr_err(DRV_NAME 803 pr_err("%s: Invalid down delay value %d not in range %d-%d; rejected.\n",
842 ": %s: Invalid down delay value %d not in range %d-%d; rejected.\n",
843 bond->dev->name, new_value, 1, INT_MAX); 804 bond->dev->name, new_value, 1, INT_MAX);
844 ret = -EINVAL; 805 ret = -EINVAL;
845 goto out; 806 goto out;
846 } else { 807 } else {
847 if ((new_value % bond->params.miimon) != 0) { 808 if ((new_value % bond->params.miimon) != 0) {
848 pr_warning(DRV_NAME 809 pr_warning("%s: Warning: up delay (%d) is not a multiple of miimon (%d), updelay rounded to %d ms\n",
849 ": %s: Warning: up delay (%d) is not a "
850 "multiple of miimon (%d), updelay rounded "
851 "to %d ms\n",
852 bond->dev->name, new_value, 810 bond->dev->name, new_value,
853 bond->params.miimon, 811 bond->params.miimon,
854 (new_value / bond->params.miimon) * 812 (new_value / bond->params.miimon) *
855 bond->params.miimon); 813 bond->params.miimon);
856 } 814 }
857 bond->params.updelay = new_value / bond->params.miimon; 815 bond->params.updelay = new_value / bond->params.miimon;
858 pr_info(DRV_NAME ": %s: Setting up delay to %d.\n", 816 pr_info("%s: Setting up delay to %d.\n",
859 bond->dev->name, bond->params.updelay * bond->params.miimon); 817 bond->dev->name,
860 818 bond->params.updelay * bond->params.miimon);
861 } 819 }
862 820
863out: 821out:
@@ -889,16 +847,14 @@ static ssize_t bonding_store_lacp(struct device *d,
889 struct bonding *bond = to_bond(d); 847 struct bonding *bond = to_bond(d);
890 848
891 if (bond->dev->flags & IFF_UP) { 849 if (bond->dev->flags & IFF_UP) {
892 pr_err(DRV_NAME 850 pr_err("%s: Unable to update LACP rate because interface is up.\n",
893 ": %s: Unable to update LACP rate because interface is up.\n",
894 bond->dev->name); 851 bond->dev->name);
895 ret = -EPERM; 852 ret = -EPERM;
896 goto out; 853 goto out;
897 } 854 }
898 855
899 if (bond->params.mode != BOND_MODE_8023AD) { 856 if (bond->params.mode != BOND_MODE_8023AD) {
900 pr_err(DRV_NAME 857 pr_err("%s: Unable to update LACP rate because bond is not in 802.3ad mode.\n",
901 ": %s: Unable to update LACP rate because bond is not in 802.3ad mode.\n",
902 bond->dev->name); 858 bond->dev->name);
903 ret = -EPERM; 859 ret = -EPERM;
904 goto out; 860 goto out;
@@ -908,12 +864,11 @@ static ssize_t bonding_store_lacp(struct device *d,
908 864
909 if ((new_value == 1) || (new_value == 0)) { 865 if ((new_value == 1) || (new_value == 0)) {
910 bond->params.lacp_fast = new_value; 866 bond->params.lacp_fast = new_value;
911 pr_info(DRV_NAME ": %s: Setting LACP rate to %s (%d).\n", 867 pr_info("%s: Setting LACP rate to %s (%d).\n",
912 bond->dev->name, bond_lacp_tbl[new_value].modename, 868 bond->dev->name, bond_lacp_tbl[new_value].modename,
913 new_value); 869 new_value);
914 } else { 870 } else {
915 pr_err(DRV_NAME 871 pr_err("%s: Ignoring invalid LACP rate value %.*s.\n",
916 ": %s: Ignoring invalid LACP rate value %.*s.\n",
917 bond->dev->name, (int)strlen(buf) - 1, buf); 872 bond->dev->name, (int)strlen(buf) - 1, buf);
918 ret = -EINVAL; 873 ret = -EINVAL;
919 } 874 }
@@ -943,9 +898,8 @@ static ssize_t bonding_store_ad_select(struct device *d,
943 struct bonding *bond = to_bond(d); 898 struct bonding *bond = to_bond(d);
944 899
945 if (bond->dev->flags & IFF_UP) { 900 if (bond->dev->flags & IFF_UP) {
946 pr_err(DRV_NAME 901 pr_err("%s: Unable to update ad_select because interface is up.\n",
947 ": %s: Unable to update ad_select because interface " 902 bond->dev->name);
948 "is up.\n", bond->dev->name);
949 ret = -EPERM; 903 ret = -EPERM;
950 goto out; 904 goto out;
951 } 905 }
@@ -954,13 +908,11 @@ static ssize_t bonding_store_ad_select(struct device *d,
954 908
955 if (new_value != -1) { 909 if (new_value != -1) {
956 bond->params.ad_select = new_value; 910 bond->params.ad_select = new_value;
957 pr_info(DRV_NAME 911 pr_info("%s: Setting ad_select to %s (%d).\n",
958 ": %s: Setting ad_select to %s (%d).\n", 912 bond->dev->name, ad_select_tbl[new_value].modename,
959 bond->dev->name, ad_select_tbl[new_value].modename, 913 new_value);
960 new_value);
961 } else { 914 } else {
962 pr_err(DRV_NAME 915 pr_err("%s: Ignoring invalid ad_select value %.*s.\n",
963 ": %s: Ignoring invalid ad_select value %.*s.\n",
964 bond->dev->name, (int)strlen(buf) - 1, buf); 916 bond->dev->name, (int)strlen(buf) - 1, buf);
965 ret = -EINVAL; 917 ret = -EINVAL;
966 } 918 }
@@ -990,15 +942,13 @@ static ssize_t bonding_store_n_grat_arp(struct device *d,
990 struct bonding *bond = to_bond(d); 942 struct bonding *bond = to_bond(d);
991 943
992 if (sscanf(buf, "%d", &new_value) != 1) { 944 if (sscanf(buf, "%d", &new_value) != 1) {
993 pr_err(DRV_NAME 945 pr_err("%s: no num_grat_arp value specified.\n",
994 ": %s: no num_grat_arp value specified.\n",
995 bond->dev->name); 946 bond->dev->name);
996 ret = -EINVAL; 947 ret = -EINVAL;
997 goto out; 948 goto out;
998 } 949 }
999 if (new_value < 0 || new_value > 255) { 950 if (new_value < 0 || new_value > 255) {
1000 pr_err(DRV_NAME 951 pr_err("%s: Invalid num_grat_arp value %d not in range 0-255; rejected.\n",
1001 ": %s: Invalid num_grat_arp value %d not in range 0-255; rejected.\n",
1002 bond->dev->name, new_value); 952 bond->dev->name, new_value);
1003 ret = -EINVAL; 953 ret = -EINVAL;
1004 goto out; 954 goto out;
@@ -1031,16 +981,14 @@ static ssize_t bonding_store_n_unsol_na(struct device *d,
1031 struct bonding *bond = to_bond(d); 981 struct bonding *bond = to_bond(d);
1032 982
1033 if (sscanf(buf, "%d", &new_value) != 1) { 983 if (sscanf(buf, "%d", &new_value) != 1) {
1034 pr_err(DRV_NAME 984 pr_err("%s: no num_unsol_na value specified.\n",
1035 ": %s: no num_unsol_na value specified.\n",
1036 bond->dev->name); 985 bond->dev->name);
1037 ret = -EINVAL; 986 ret = -EINVAL;
1038 goto out; 987 goto out;
1039 } 988 }
1040 989
1041 if (new_value < 0 || new_value > 255) { 990 if (new_value < 0 || new_value > 255) {
1042 pr_err(DRV_NAME 991 pr_err("%s: Invalid num_unsol_na value %d not in range 0-255; rejected.\n",
1043 ": %s: Invalid num_unsol_na value %d not in range 0-255; rejected.\n",
1044 bond->dev->name, new_value); 992 bond->dev->name, new_value);
1045 ret = -EINVAL; 993 ret = -EINVAL;
1046 goto out; 994 goto out;
@@ -1075,40 +1023,31 @@ static ssize_t bonding_store_miimon(struct device *d,
1075 struct bonding *bond = to_bond(d); 1023 struct bonding *bond = to_bond(d);
1076 1024
1077 if (sscanf(buf, "%d", &new_value) != 1) { 1025 if (sscanf(buf, "%d", &new_value) != 1) {
1078 pr_err(DRV_NAME 1026 pr_err("%s: no miimon value specified.\n",
1079 ": %s: no miimon value specified.\n",
1080 bond->dev->name); 1027 bond->dev->name);
1081 ret = -EINVAL; 1028 ret = -EINVAL;
1082 goto out; 1029 goto out;
1083 } 1030 }
1084 if (new_value < 0) { 1031 if (new_value < 0) {
1085 pr_err(DRV_NAME 1032 pr_err("%s: Invalid miimon value %d not in range %d-%d; rejected.\n",
1086 ": %s: Invalid miimon value %d not in range %d-%d; rejected.\n",
1087 bond->dev->name, new_value, 1, INT_MAX); 1033 bond->dev->name, new_value, 1, INT_MAX);
1088 ret = -EINVAL; 1034 ret = -EINVAL;
1089 goto out; 1035 goto out;
1090 } else { 1036 } else {
1091 pr_info(DRV_NAME 1037 pr_info("%s: Setting MII monitoring interval to %d.\n",
1092 ": %s: Setting MII monitoring interval to %d.\n", 1038 bond->dev->name, new_value);
1093 bond->dev->name, new_value);
1094 bond->params.miimon = new_value; 1039 bond->params.miimon = new_value;
1095 if (bond->params.updelay) 1040 if (bond->params.updelay)
1096 pr_info(DRV_NAME 1041 pr_info("%s: Note: Updating updelay (to %d) since it is a multiple of the miimon value.\n",
1097 ": %s: Note: Updating updelay (to %d) " 1042 bond->dev->name,
1098 "since it is a multiple of the miimon value.\n", 1043 bond->params.updelay * bond->params.miimon);
1099 bond->dev->name,
1100 bond->params.updelay * bond->params.miimon);
1101 if (bond->params.downdelay) 1044 if (bond->params.downdelay)
1102 pr_info(DRV_NAME 1045 pr_info("%s: Note: Updating downdelay (to %d) since it is a multiple of the miimon value.\n",
1103 ": %s: Note: Updating downdelay (to %d) " 1046 bond->dev->name,
1104 "since it is a multiple of the miimon value.\n", 1047 bond->params.downdelay * bond->params.miimon);
1105 bond->dev->name,
1106 bond->params.downdelay * bond->params.miimon);
1107 if (bond->params.arp_interval) { 1048 if (bond->params.arp_interval) {
1108 pr_info(DRV_NAME 1049 pr_info("%s: MII monitoring cannot be used with ARP monitoring. Disabling ARP monitoring...\n",
1109 ": %s: MII monitoring cannot be used with " 1050 bond->dev->name);
1110 "ARP monitoring. Disabling ARP monitoring...\n",
1111 bond->dev->name);
1112 bond->params.arp_interval = 0; 1051 bond->params.arp_interval = 0;
1113 bond->dev->priv_flags &= ~IFF_MASTER_ARPMON; 1052 bond->dev->priv_flags &= ~IFF_MASTER_ARPMON;
1114 if (bond->params.arp_validate) { 1053 if (bond->params.arp_validate) {
@@ -1176,17 +1115,15 @@ static ssize_t bonding_store_primary(struct device *d,
1176 write_lock_bh(&bond->curr_slave_lock); 1115 write_lock_bh(&bond->curr_slave_lock);
1177 1116
1178 if (!USES_PRIMARY(bond->params.mode)) { 1117 if (!USES_PRIMARY(bond->params.mode)) {
1179 pr_info(DRV_NAME 1118 pr_info("%s: Unable to set primary slave; %s is in mode %d\n",
1180 ": %s: Unable to set primary slave; %s is in mode %d\n", 1119 bond->dev->name, bond->dev->name, bond->params.mode);
1181 bond->dev->name, bond->dev->name, bond->params.mode);
1182 } else { 1120 } else {
1183 bond_for_each_slave(bond, slave, i) { 1121 bond_for_each_slave(bond, slave, i) {
1184 if (strnicmp 1122 if (strnicmp
1185 (slave->dev->name, buf, 1123 (slave->dev->name, buf,
1186 strlen(slave->dev->name)) == 0) { 1124 strlen(slave->dev->name)) == 0) {
1187 pr_info(DRV_NAME 1125 pr_info("%s: Setting %s as primary slave.\n",
1188 ": %s: Setting %s as primary slave.\n", 1126 bond->dev->name, slave->dev->name);
1189 bond->dev->name, slave->dev->name);
1190 bond->primary_slave = slave; 1127 bond->primary_slave = slave;
1191 strcpy(bond->params.primary, slave->dev->name); 1128 strcpy(bond->params.primary, slave->dev->name);
1192 bond_select_active_slave(bond); 1129 bond_select_active_slave(bond);
@@ -1197,15 +1134,13 @@ static ssize_t bonding_store_primary(struct device *d,
1197 /* if we got here, then we didn't match the name of any slave */ 1134 /* if we got here, then we didn't match the name of any slave */
1198 1135
1199 if (strlen(buf) == 0 || buf[0] == '\n') { 1136 if (strlen(buf) == 0 || buf[0] == '\n') {
1200 pr_info(DRV_NAME 1137 pr_info("%s: Setting primary slave to None.\n",
1201 ": %s: Setting primary slave to None.\n", 1138 bond->dev->name);
1202 bond->dev->name);
1203 bond->primary_slave = NULL; 1139 bond->primary_slave = NULL;
1204 bond_select_active_slave(bond); 1140 bond_select_active_slave(bond);
1205 } else { 1141 } else {
1206 pr_info(DRV_NAME 1142 pr_info("%s: Unable to set %.*s as primary slave as it is not a slave.\n",
1207 ": %s: Unable to set %.*s as primary slave as it is not a slave.\n", 1143 bond->dev->name, (int)strlen(buf) - 1, buf);
1208 bond->dev->name, (int)strlen(buf) - 1, buf);
1209 } 1144 }
1210 } 1145 }
1211out: 1146out:
@@ -1244,8 +1179,7 @@ static ssize_t bonding_store_primary_reselect(struct device *d,
1244 1179
1245 new_value = bond_parse_parm(buf, pri_reselect_tbl); 1180 new_value = bond_parse_parm(buf, pri_reselect_tbl);
1246 if (new_value < 0) { 1181 if (new_value < 0) {
1247 pr_err(DRV_NAME 1182 pr_err("%s: Ignoring invalid primary_reselect value %.*s.\n",
1248 ": %s: Ignoring invalid primary_reselect value %.*s.\n",
1249 bond->dev->name, 1183 bond->dev->name,
1250 (int) strlen(buf) - 1, buf); 1184 (int) strlen(buf) - 1, buf);
1251 ret = -EINVAL; 1185 ret = -EINVAL;
@@ -1253,7 +1187,7 @@ static ssize_t bonding_store_primary_reselect(struct device *d,
1253 } 1187 }
1254 1188
1255 bond->params.primary_reselect = new_value; 1189 bond->params.primary_reselect = new_value;
1256 pr_info(DRV_NAME ": %s: setting primary_reselect to %s (%d).\n", 1190 pr_info("%s: setting primary_reselect to %s (%d).\n",
1257 bond->dev->name, pri_reselect_tbl[new_value].modename, 1191 bond->dev->name, pri_reselect_tbl[new_value].modename,
1258 new_value); 1192 new_value);
1259 1193
@@ -1291,20 +1225,18 @@ static ssize_t bonding_store_carrier(struct device *d,
1291 1225
1292 1226
1293 if (sscanf(buf, "%d", &new_value) != 1) { 1227 if (sscanf(buf, "%d", &new_value) != 1) {
1294 pr_err(DRV_NAME 1228 pr_err("%s: no use_carrier value specified.\n",
1295 ": %s: no use_carrier value specified.\n",
1296 bond->dev->name); 1229 bond->dev->name);
1297 ret = -EINVAL; 1230 ret = -EINVAL;
1298 goto out; 1231 goto out;
1299 } 1232 }
1300 if ((new_value == 0) || (new_value == 1)) { 1233 if ((new_value == 0) || (new_value == 1)) {
1301 bond->params.use_carrier = new_value; 1234 bond->params.use_carrier = new_value;
1302 pr_info(DRV_NAME ": %s: Setting use_carrier to %d.\n", 1235 pr_info("%s: Setting use_carrier to %d.\n",
1303 bond->dev->name, new_value); 1236 bond->dev->name, new_value);
1304 } else { 1237 } else {
1305 pr_info(DRV_NAME 1238 pr_info("%s: Ignoring invalid use_carrier value %d.\n",
1306 ": %s: Ignoring invalid use_carrier value %d.\n", 1239 bond->dev->name, new_value);
1307 bond->dev->name, new_value);
1308 } 1240 }
1309out: 1241out:
1310 return count; 1242 return count;
@@ -1349,8 +1281,7 @@ static ssize_t bonding_store_active_slave(struct device *d,
1349 write_lock_bh(&bond->curr_slave_lock); 1281 write_lock_bh(&bond->curr_slave_lock);
1350 1282
1351 if (!USES_PRIMARY(bond->params.mode)) 1283 if (!USES_PRIMARY(bond->params.mode))
1352 pr_info(DRV_NAME ": %s: Unable to change active slave;" 1284 pr_info("%s: Unable to change active slave; %s is in mode %d\n",
1353 " %s is in mode %d\n",
1354 bond->dev->name, bond->dev->name, bond->params.mode); 1285 bond->dev->name, bond->dev->name, bond->params.mode);
1355 else { 1286 else {
1356 bond_for_each_slave(bond, slave, i) { 1287 bond_for_each_slave(bond, slave, i) {
@@ -1361,9 +1292,9 @@ static ssize_t bonding_store_active_slave(struct device *d,
1361 new_active = slave; 1292 new_active = slave;
1362 if (new_active == old_active) { 1293 if (new_active == old_active) {
1363 /* do nothing */ 1294 /* do nothing */
1364 pr_info(DRV_NAME 1295 pr_info("%s: %s is already the current active slave.\n",
1365 ": %s: %s is already the current active slave.\n", 1296 bond->dev->name,
1366 bond->dev->name, slave->dev->name); 1297 slave->dev->name);
1367 goto out; 1298 goto out;
1368 } 1299 }
1369 else { 1300 else {
@@ -1371,16 +1302,15 @@ static ssize_t bonding_store_active_slave(struct device *d,
1371 (old_active) && 1302 (old_active) &&
1372 (new_active->link == BOND_LINK_UP) && 1303 (new_active->link == BOND_LINK_UP) &&
1373 IS_UP(new_active->dev)) { 1304 IS_UP(new_active->dev)) {
1374 pr_info(DRV_NAME 1305 pr_info("%s: Setting %s as active slave.\n",
1375 ": %s: Setting %s as active slave.\n", 1306 bond->dev->name,
1376 bond->dev->name, slave->dev->name); 1307 slave->dev->name);
1377 bond_change_active_slave(bond, new_active); 1308 bond_change_active_slave(bond, new_active);
1378 } 1309 }
1379 else { 1310 else {
1380 pr_info(DRV_NAME 1311 pr_info("%s: Could not set %s as active slave; either %s is down or the link is down.\n",
1381 ": %s: Could not set %s as active slave; " 1312 bond->dev->name,
1382 "either %s is down or the link is down.\n", 1313 slave->dev->name,
1383 bond->dev->name, slave->dev->name,
1384 slave->dev->name); 1314 slave->dev->name);
1385 } 1315 }
1386 goto out; 1316 goto out;
@@ -1391,14 +1321,12 @@ static ssize_t bonding_store_active_slave(struct device *d,
1391 /* if we got here, then we didn't match the name of any slave */ 1321 /* if we got here, then we didn't match the name of any slave */
1392 1322
1393 if (strlen(buf) == 0 || buf[0] == '\n') { 1323 if (strlen(buf) == 0 || buf[0] == '\n') {
1394 pr_info(DRV_NAME 1324 pr_info("%s: Setting active slave to None.\n",
1395 ": %s: Setting active slave to None.\n",
1396 bond->dev->name); 1325 bond->dev->name);
1397 bond->primary_slave = NULL; 1326 bond->primary_slave = NULL;
1398 bond_select_active_slave(bond); 1327 bond_select_active_slave(bond);
1399 } else { 1328 } else {
1400 pr_info(DRV_NAME ": %s: Unable to set %.*s" 1329 pr_info("%s: Unable to set %.*s as active slave as it is not a slave.\n",
1401 " as active slave as it is not a slave.\n",
1402 bond->dev->name, (int)strlen(buf) - 1, buf); 1330 bond->dev->name, (int)strlen(buf) - 1, buf);
1403 } 1331 }
1404 } 1332 }
@@ -1600,8 +1528,7 @@ int bond_create_sysfs(void)
1600 /* Is someone being kinky and naming a device bonding_master? */ 1528 /* Is someone being kinky and naming a device bonding_master? */
1601 if (__dev_get_by_name(&init_net, 1529 if (__dev_get_by_name(&init_net,
1602 class_attr_bonding_masters.attr.name)) 1530 class_attr_bonding_masters.attr.name))
1603 pr_err("network device named %s already " 1531 pr_err("network device named %s already exists in sysfs",
1604 "exists in sysfs",
1605 class_attr_bonding_masters.attr.name); 1532 class_attr_bonding_masters.attr.name);
1606 ret = 0; 1533 ret = 0;
1607 } 1534 }
diff --git a/drivers/net/can/Kconfig b/drivers/net/can/Kconfig
index 8c485aad1b94..05b751719bd5 100644
--- a/drivers/net/can/Kconfig
+++ b/drivers/net/can/Kconfig
@@ -50,7 +50,7 @@ config CAN_TI_HECC
50 50
51config CAN_MCP251X 51config CAN_MCP251X
52 tristate "Microchip MCP251x SPI CAN controllers" 52 tristate "Microchip MCP251x SPI CAN controllers"
53 depends on CAN_DEV && SPI 53 depends on CAN_DEV && SPI && HAS_DMA
54 ---help--- 54 ---help---
55 Driver for the Microchip MCP251x SPI CAN controllers. 55 Driver for the Microchip MCP251x SPI CAN controllers.
56 56
diff --git a/drivers/net/can/at91_can.c b/drivers/net/can/at91_can.c
index cbe3fce53e3b..166cc7e579c0 100644
--- a/drivers/net/can/at91_can.c
+++ b/drivers/net/can/at91_can.c
@@ -474,7 +474,7 @@ static void at91_read_mb(struct net_device *dev, unsigned int mb,
474 reg_msr = at91_read(priv, AT91_MSR(mb)); 474 reg_msr = at91_read(priv, AT91_MSR(mb));
475 if (reg_msr & AT91_MSR_MRTR) 475 if (reg_msr & AT91_MSR_MRTR)
476 cf->can_id |= CAN_RTR_FLAG; 476 cf->can_id |= CAN_RTR_FLAG;
477 cf->can_dlc = min_t(__u8, (reg_msr >> 16) & 0xf, 8); 477 cf->can_dlc = get_can_dlc((reg_msr >> 16) & 0xf);
478 478
479 *(u32 *)(cf->data + 0) = at91_read(priv, AT91_MDL(mb)); 479 *(u32 *)(cf->data + 0) = at91_read(priv, AT91_MDL(mb));
480 *(u32 *)(cf->data + 4) = at91_read(priv, AT91_MDH(mb)); 480 *(u32 *)(cf->data + 4) = at91_read(priv, AT91_MDH(mb));
@@ -1037,7 +1037,7 @@ static int __init at91_can_probe(struct platform_device *pdev)
1037 1037
1038 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 1038 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1039 irq = platform_get_irq(pdev, 0); 1039 irq = platform_get_irq(pdev, 0);
1040 if (!res || !irq) { 1040 if (!res || irq <= 0) {
1041 err = -ENODEV; 1041 err = -ENODEV;
1042 goto exit_put; 1042 goto exit_put;
1043 } 1043 }
diff --git a/drivers/net/can/bfin_can.c b/drivers/net/can/bfin_can.c
index c7fc1de28173..0ec1524523cc 100644
--- a/drivers/net/can/bfin_can.c
+++ b/drivers/net/can/bfin_can.c
@@ -392,7 +392,7 @@ static void bfin_can_rx(struct net_device *dev, u16 isrc)
392 cf->can_id |= CAN_RTR_FLAG; 392 cf->can_id |= CAN_RTR_FLAG;
393 393
394 /* get data length code */ 394 /* get data length code */
395 cf->can_dlc = bfin_read16(&reg->chl[obj].dlc); 395 cf->can_dlc = get_can_dlc(bfin_read16(&reg->chl[obj].dlc) & 0xF);
396 396
397 /* get payload */ 397 /* get payload */
398 for (i = 0; i < 8; i += 2) { 398 for (i = 0; i < 8; i += 2) {
diff --git a/drivers/net/can/mcp251x.c b/drivers/net/can/mcp251x.c
index 78b1b69b2921..1a72ca066a17 100644
--- a/drivers/net/can/mcp251x.c
+++ b/drivers/net/can/mcp251x.c
@@ -403,9 +403,8 @@ static void mcp251x_hw_rx_frame(struct spi_device *spi, u8 *buf,
403 403
404 for (i = 1; i < RXBDAT_OFF; i++) 404 for (i = 1; i < RXBDAT_OFF; i++)
405 buf[i] = mcp251x_read_reg(spi, RXBCTRL(buf_idx) + i); 405 buf[i] = mcp251x_read_reg(spi, RXBCTRL(buf_idx) + i);
406 len = buf[RXBDLC_OFF] & RXBDLC_LEN_MASK; 406
407 if (len > 8) 407 len = get_can_dlc(buf[RXBDLC_OFF] & RXBDLC_LEN_MASK);
408 len = 8;
409 for (; i < (RXBDAT_OFF + len); i++) 408 for (; i < (RXBDAT_OFF + len); i++)
410 buf[i] = mcp251x_read_reg(spi, RXBCTRL(buf_idx) + i); 409 buf[i] = mcp251x_read_reg(spi, RXBCTRL(buf_idx) + i);
411 } else { 410 } else {
@@ -455,13 +454,7 @@ static void mcp251x_hw_rx(struct spi_device *spi, int buf_idx)
455 (buf[RXBSIDL_OFF] >> RXBSIDL_SHIFT); 454 (buf[RXBSIDL_OFF] >> RXBSIDL_SHIFT);
456 } 455 }
457 /* Data length */ 456 /* Data length */
458 frame->can_dlc = buf[RXBDLC_OFF] & RXBDLC_LEN_MASK; 457 frame->can_dlc = get_can_dlc(buf[RXBDLC_OFF] & RXBDLC_LEN_MASK);
459 if (frame->can_dlc > 8) {
460 dev_warn(&spi->dev, "invalid frame recevied\n");
461 priv->net->stats.rx_errors++;
462 dev_kfree_skb(skb);
463 return;
464 }
465 memcpy(frame->data, buf + RXBDAT_OFF, frame->can_dlc); 458 memcpy(frame->data, buf + RXBDAT_OFF, frame->can_dlc);
466 459
467 priv->net->stats.rx_packets++; 460 priv->net->stats.rx_packets++;
@@ -997,7 +990,7 @@ static int __devinit mcp251x_can_probe(struct spi_device *spi)
997 goto error_tx_buf; 990 goto error_tx_buf;
998 } 991 }
999 priv->spi_rx_buf = kmalloc(SPI_TRANSFER_BUF_LEN, GFP_KERNEL); 992 priv->spi_rx_buf = kmalloc(SPI_TRANSFER_BUF_LEN, GFP_KERNEL);
1000 if (!priv->spi_tx_buf) { 993 if (!priv->spi_rx_buf) {
1001 ret = -ENOMEM; 994 ret = -ENOMEM;
1002 goto error_rx_buf; 995 goto error_rx_buf;
1003 } 996 }
diff --git a/drivers/net/can/mscan/mscan.c b/drivers/net/can/mscan/mscan.c
index bb06dfb58f25..07346f880ca6 100644
--- a/drivers/net/can/mscan/mscan.c
+++ b/drivers/net/can/mscan/mscan.c
@@ -297,7 +297,8 @@ static void mscan_get_rx_frame(struct net_device *dev, struct can_frame *frame)
297 frame->can_id |= can_id >> 1; 297 frame->can_id |= can_id >> 1;
298 if (can_id & 1) 298 if (can_id & 1)
299 frame->can_id |= CAN_RTR_FLAG; 299 frame->can_id |= CAN_RTR_FLAG;
300 frame->can_dlc = in_8(&regs->rx.dlr) & 0xf; 300
301 frame->can_dlc = get_can_dlc(in_8(&regs->rx.dlr) & 0xf);
301 302
302 if (!(frame->can_id & CAN_RTR_FLAG)) { 303 if (!(frame->can_id & CAN_RTR_FLAG)) {
303 void __iomem *data = &regs->rx.dsr1_0; 304 void __iomem *data = &regs->rx.dsr1_0;
diff --git a/drivers/net/can/sja1000/sja1000.c b/drivers/net/can/sja1000/sja1000.c
index b4ba88a31075..542a4f7255b4 100644
--- a/drivers/net/can/sja1000/sja1000.c
+++ b/drivers/net/can/sja1000/sja1000.c
@@ -293,15 +293,14 @@ static void sja1000_rx(struct net_device *dev)
293 uint8_t fi; 293 uint8_t fi;
294 uint8_t dreg; 294 uint8_t dreg;
295 canid_t id; 295 canid_t id;
296 uint8_t dlc;
297 int i; 296 int i;
298 297
298 /* create zero'ed CAN frame buffer */
299 skb = alloc_can_skb(dev, &cf); 299 skb = alloc_can_skb(dev, &cf);
300 if (skb == NULL) 300 if (skb == NULL)
301 return; 301 return;
302 302
303 fi = priv->read_reg(priv, REG_FI); 303 fi = priv->read_reg(priv, REG_FI);
304 dlc = fi & 0x0F;
305 304
306 if (fi & FI_FF) { 305 if (fi & FI_FF) {
307 /* extended frame format (EFF) */ 306 /* extended frame format (EFF) */
@@ -318,16 +317,15 @@ static void sja1000_rx(struct net_device *dev)
318 | (priv->read_reg(priv, REG_ID2) >> 5); 317 | (priv->read_reg(priv, REG_ID2) >> 5);
319 } 318 }
320 319
321 if (fi & FI_RTR) 320 if (fi & FI_RTR) {
322 id |= CAN_RTR_FLAG; 321 id |= CAN_RTR_FLAG;
322 } else {
323 cf->can_dlc = get_can_dlc(fi & 0x0F);
324 for (i = 0; i < cf->can_dlc; i++)
325 cf->data[i] = priv->read_reg(priv, dreg++);
326 }
323 327
324 cf->can_id = id; 328 cf->can_id = id;
325 cf->can_dlc = dlc;
326 for (i = 0; i < dlc; i++)
327 cf->data[i] = priv->read_reg(priv, dreg++);
328
329 while (i < 8)
330 cf->data[i++] = 0;
331 329
332 /* release receive buffer */ 330 /* release receive buffer */
333 priv->write_reg(priv, REG_CMR, CMD_RRB); 331 priv->write_reg(priv, REG_CMR, CMD_RRB);
@@ -335,7 +333,7 @@ static void sja1000_rx(struct net_device *dev)
335 netif_rx(skb); 333 netif_rx(skb);
336 334
337 stats->rx_packets++; 335 stats->rx_packets++;
338 stats->rx_bytes += dlc; 336 stats->rx_bytes += cf->can_dlc;
339} 337}
340 338
341static int sja1000_err(struct net_device *dev, uint8_t isrc, uint8_t status) 339static int sja1000_err(struct net_device *dev, uint8_t isrc, uint8_t status)
diff --git a/drivers/net/can/ti_hecc.c b/drivers/net/can/ti_hecc.c
index 07e8016b17ec..5c993c2da528 100644
--- a/drivers/net/can/ti_hecc.c
+++ b/drivers/net/can/ti_hecc.c
@@ -552,7 +552,7 @@ static int ti_hecc_rx_pkt(struct ti_hecc_priv *priv, int mbxno)
552 data = hecc_read_mbx(priv, mbxno, HECC_CANMCF); 552 data = hecc_read_mbx(priv, mbxno, HECC_CANMCF);
553 if (data & HECC_CANMCF_RTR) 553 if (data & HECC_CANMCF_RTR)
554 cf->can_id |= CAN_RTR_FLAG; 554 cf->can_id |= CAN_RTR_FLAG;
555 cf->can_dlc = data & 0xF; 555 cf->can_dlc = get_can_dlc(data & 0xF);
556 data = hecc_read_mbx(priv, mbxno, HECC_CANMDL); 556 data = hecc_read_mbx(priv, mbxno, HECC_CANMDL);
557 *(u32 *)(cf->data) = cpu_to_be32(data); 557 *(u32 *)(cf->data) = cpu_to_be32(data);
558 if (cf->can_dlc > 4) { 558 if (cf->can_dlc > 4) {
diff --git a/drivers/net/can/usb/ems_usb.c b/drivers/net/can/usb/ems_usb.c
index 591eb0eb1c2b..efbb05c71bf4 100644
--- a/drivers/net/can/usb/ems_usb.c
+++ b/drivers/net/can/usb/ems_usb.c
@@ -316,7 +316,7 @@ static void ems_usb_rx_can_msg(struct ems_usb *dev, struct ems_cpc_msg *msg)
316 return; 316 return;
317 317
318 cf->can_id = le32_to_cpu(msg->msg.can_msg.id); 318 cf->can_id = le32_to_cpu(msg->msg.can_msg.id);
319 cf->can_dlc = min_t(u8, msg->msg.can_msg.length, 8); 319 cf->can_dlc = get_can_dlc(msg->msg.can_msg.length & 0xF);
320 320
321 if (msg->type == CPC_MSG_TYPE_EXT_CAN_FRAME || 321 if (msg->type == CPC_MSG_TYPE_EXT_CAN_FRAME ||
322 msg->type == CPC_MSG_TYPE_EXT_RTR_FRAME) 322 msg->type == CPC_MSG_TYPE_EXT_RTR_FRAME)
diff --git a/drivers/net/cpmac.c b/drivers/net/cpmac.c
index 678222389407..8d0be26f94e3 100644
--- a/drivers/net/cpmac.c
+++ b/drivers/net/cpmac.c
@@ -1163,7 +1163,7 @@ static int __devinit cpmac_probe(struct platform_device *pdev)
1163 priv->dev = dev; 1163 priv->dev = dev;
1164 priv->ring_size = 64; 1164 priv->ring_size = 64;
1165 priv->msg_enable = netif_msg_init(debug_level, 0xff); 1165 priv->msg_enable = netif_msg_init(debug_level, 0xff);
1166 memcpy(dev->dev_addr, pdata->dev_addr, sizeof(dev->dev_addr)); 1166 memcpy(dev->dev_addr, pdata->dev_addr, sizeof(pdata->dev_addr));
1167 1167
1168 snprintf(priv->phy_name, MII_BUS_ID_SIZE, PHY_ID_FMT, mdio_bus_id, phy_id); 1168 snprintf(priv->phy_name, MII_BUS_ID_SIZE, PHY_ID_FMT, mdio_bus_id, phy_id);
1169 1169
diff --git a/drivers/net/cs89x0.c b/drivers/net/cs89x0.c
index af9321617ce4..0e79cef95c0a 100644
--- a/drivers/net/cs89x0.c
+++ b/drivers/net/cs89x0.c
@@ -1325,8 +1325,7 @@ net_open(struct net_device *dev)
1325 write_irq(dev, lp->chip_type, dev->irq); 1325 write_irq(dev, lp->chip_type, dev->irq);
1326 ret = request_irq(dev->irq, net_interrupt, 0, dev->name, dev); 1326 ret = request_irq(dev->irq, net_interrupt, 0, dev->name, dev);
1327 if (ret) { 1327 if (ret) {
1328 if (net_debug) 1328 printk(KERN_ERR "cs89x0: request_irq(%d) failed\n", dev->irq);
1329 printk(KERN_DEBUG "cs89x0: request_irq(%d) failed\n", dev->irq);
1330 goto bad_out; 1329 goto bad_out;
1331 } 1330 }
1332 } 1331 }
diff --git a/drivers/net/cxgb3/sge.c b/drivers/net/cxgb3/sge.c
index bdbd14727e4b..318a018ca7c5 100644
--- a/drivers/net/cxgb3/sge.c
+++ b/drivers/net/cxgb3/sge.c
@@ -2079,6 +2079,7 @@ static void lro_add_page(struct adapter *adap, struct sge_qset *qs,
2079 struct sge_fl *fl, int len, int complete) 2079 struct sge_fl *fl, int len, int complete)
2080{ 2080{
2081 struct rx_sw_desc *sd = &fl->sdesc[fl->cidx]; 2081 struct rx_sw_desc *sd = &fl->sdesc[fl->cidx];
2082 struct port_info *pi = netdev_priv(qs->netdev);
2082 struct sk_buff *skb = NULL; 2083 struct sk_buff *skb = NULL;
2083 struct cpl_rx_pkt *cpl; 2084 struct cpl_rx_pkt *cpl;
2084 struct skb_frag_struct *rx_frag; 2085 struct skb_frag_struct *rx_frag;
@@ -2116,11 +2117,18 @@ static void lro_add_page(struct adapter *adap, struct sge_qset *qs,
2116 2117
2117 if (!nr_frags) { 2118 if (!nr_frags) {
2118 offset = 2 + sizeof(struct cpl_rx_pkt); 2119 offset = 2 + sizeof(struct cpl_rx_pkt);
2119 qs->lro_va = sd->pg_chunk.va + 2; 2120 cpl = qs->lro_va = sd->pg_chunk.va + 2;
2120 }
2121 len -= offset;
2122 2121
2123 prefetch(qs->lro_va); 2122 if ((pi->rx_offload & T3_RX_CSUM) &&
2123 cpl->csum_valid && cpl->csum == htons(0xffff)) {
2124 skb->ip_summed = CHECKSUM_UNNECESSARY;
2125 qs->port_stats[SGE_PSTAT_RX_CSUM_GOOD]++;
2126 } else
2127 skb->ip_summed = CHECKSUM_NONE;
2128 } else
2129 cpl = qs->lro_va;
2130
2131 len -= offset;
2124 2132
2125 rx_frag += nr_frags; 2133 rx_frag += nr_frags;
2126 rx_frag->page = sd->pg_chunk.page; 2134 rx_frag->page = sd->pg_chunk.page;
@@ -2136,12 +2144,8 @@ static void lro_add_page(struct adapter *adap, struct sge_qset *qs,
2136 return; 2144 return;
2137 2145
2138 skb_record_rx_queue(skb, qs - &adap->sge.qs[0]); 2146 skb_record_rx_queue(skb, qs - &adap->sge.qs[0]);
2139 skb->ip_summed = CHECKSUM_UNNECESSARY;
2140 cpl = qs->lro_va;
2141 2147
2142 if (unlikely(cpl->vlan_valid)) { 2148 if (unlikely(cpl->vlan_valid)) {
2143 struct net_device *dev = qs->netdev;
2144 struct port_info *pi = netdev_priv(dev);
2145 struct vlan_group *grp = pi->vlan_grp; 2149 struct vlan_group *grp = pi->vlan_grp;
2146 2150
2147 if (likely(grp != NULL)) { 2151 if (likely(grp != NULL)) {
diff --git a/drivers/net/davinci_emac.c b/drivers/net/davinci_emac.c
index 8edac8915ea8..33c4fe26178c 100644
--- a/drivers/net/davinci_emac.c
+++ b/drivers/net/davinci_emac.c
@@ -2272,7 +2272,7 @@ static int emac_mii_reset(struct mii_bus *bus)
2272 unsigned int clk_div; 2272 unsigned int clk_div;
2273 int mdio_bus_freq = emac_bus_frequency; 2273 int mdio_bus_freq = emac_bus_frequency;
2274 2274
2275 if (mdio_max_freq & mdio_bus_freq) 2275 if (mdio_max_freq && mdio_bus_freq)
2276 clk_div = ((mdio_bus_freq / mdio_max_freq) - 1); 2276 clk_div = ((mdio_bus_freq / mdio_max_freq) - 1);
2277 else 2277 else
2278 clk_div = 0xFF; 2278 clk_div = 0xFF;
@@ -2711,6 +2711,8 @@ static int __devinit davinci_emac_probe(struct platform_device *pdev)
2711 SET_ETHTOOL_OPS(ndev, &ethtool_ops); 2711 SET_ETHTOOL_OPS(ndev, &ethtool_ops);
2712 netif_napi_add(ndev, &priv->napi, emac_poll, EMAC_POLL_WEIGHT); 2712 netif_napi_add(ndev, &priv->napi, emac_poll, EMAC_POLL_WEIGHT);
2713 2713
2714 clk_enable(emac_clk);
2715
2714 /* register the network device */ 2716 /* register the network device */
2715 SET_NETDEV_DEV(ndev, &pdev->dev); 2717 SET_NETDEV_DEV(ndev, &pdev->dev);
2716 rc = register_netdev(ndev); 2718 rc = register_netdev(ndev);
@@ -2720,7 +2722,6 @@ static int __devinit davinci_emac_probe(struct platform_device *pdev)
2720 goto netdev_reg_err; 2722 goto netdev_reg_err;
2721 } 2723 }
2722 2724
2723 clk_enable(emac_clk);
2724 2725
2725 /* MII/Phy intialisation, mdio bus registration */ 2726 /* MII/Phy intialisation, mdio bus registration */
2726 emac_mii = mdiobus_alloc(); 2727 emac_mii = mdiobus_alloc();
@@ -2760,6 +2761,7 @@ mdiobus_quit:
2760 2761
2761netdev_reg_err: 2762netdev_reg_err:
2762mdio_alloc_err: 2763mdio_alloc_err:
2764 clk_disable(emac_clk);
2763no_irq_res: 2765no_irq_res:
2764 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 2766 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2765 release_mem_region(res->start, res->end - res->start + 1); 2767 release_mem_region(res->start, res->end - res->start + 1);
diff --git a/drivers/net/e100.c b/drivers/net/e100.c
index 929701ca07d3..839fb2b136d3 100644
--- a/drivers/net/e100.c
+++ b/drivers/net/e100.c
@@ -1829,6 +1829,7 @@ static int e100_alloc_cbs(struct nic *nic)
1829 &nic->cbs_dma_addr); 1829 &nic->cbs_dma_addr);
1830 if (!nic->cbs) 1830 if (!nic->cbs)
1831 return -ENOMEM; 1831 return -ENOMEM;
1832 memset(nic->cbs, 0, count * sizeof(struct cb));
1832 1833
1833 for (cb = nic->cbs, i = 0; i < count; cb++, i++) { 1834 for (cb = nic->cbs, i = 0; i < count; cb++, i++) {
1834 cb->next = (i + 1 < count) ? cb + 1 : nic->cbs; 1835 cb->next = (i + 1 < count) ? cb + 1 : nic->cbs;
@@ -1837,7 +1838,6 @@ static int e100_alloc_cbs(struct nic *nic)
1837 cb->dma_addr = nic->cbs_dma_addr + i * sizeof(struct cb); 1838 cb->dma_addr = nic->cbs_dma_addr + i * sizeof(struct cb);
1838 cb->link = cpu_to_le32(nic->cbs_dma_addr + 1839 cb->link = cpu_to_le32(nic->cbs_dma_addr +
1839 ((i+1) % count) * sizeof(struct cb)); 1840 ((i+1) % count) * sizeof(struct cb));
1840 cb->skb = NULL;
1841 } 1841 }
1842 1842
1843 nic->cb_to_use = nic->cb_to_send = nic->cb_to_clean = nic->cbs; 1843 nic->cb_to_use = nic->cb_to_send = nic->cb_to_clean = nic->cbs;
diff --git a/drivers/net/e1000/e1000.h b/drivers/net/e1000/e1000.h
index 2a567df3ea71..e8932db7ee77 100644
--- a/drivers/net/e1000/e1000.h
+++ b/drivers/net/e1000/e1000.h
@@ -326,6 +326,8 @@ struct e1000_adapter {
326 /* for ioport free */ 326 /* for ioport free */
327 int bars; 327 int bars;
328 int need_ioport; 328 int need_ioport;
329
330 bool discarding;
329}; 331};
330 332
331enum e1000_state_t { 333enum e1000_state_t {
diff --git a/drivers/net/e1000/e1000_main.c b/drivers/net/e1000/e1000_main.c
index 7e855f9bbd97..765543663a4f 100644
--- a/drivers/net/e1000/e1000_main.c
+++ b/drivers/net/e1000/e1000_main.c
@@ -1698,18 +1698,6 @@ static void e1000_setup_rctl(struct e1000_adapter *adapter)
1698 rctl &= ~E1000_RCTL_SZ_4096; 1698 rctl &= ~E1000_RCTL_SZ_4096;
1699 rctl |= E1000_RCTL_BSEX; 1699 rctl |= E1000_RCTL_BSEX;
1700 switch (adapter->rx_buffer_len) { 1700 switch (adapter->rx_buffer_len) {
1701 case E1000_RXBUFFER_256:
1702 rctl |= E1000_RCTL_SZ_256;
1703 rctl &= ~E1000_RCTL_BSEX;
1704 break;
1705 case E1000_RXBUFFER_512:
1706 rctl |= E1000_RCTL_SZ_512;
1707 rctl &= ~E1000_RCTL_BSEX;
1708 break;
1709 case E1000_RXBUFFER_1024:
1710 rctl |= E1000_RCTL_SZ_1024;
1711 rctl &= ~E1000_RCTL_BSEX;
1712 break;
1713 case E1000_RXBUFFER_2048: 1701 case E1000_RXBUFFER_2048:
1714 default: 1702 default:
1715 rctl |= E1000_RCTL_SZ_2048; 1703 rctl |= E1000_RCTL_SZ_2048;
@@ -2802,13 +2790,13 @@ static int e1000_tx_map(struct e1000_adapter *adapter,
2802dma_error: 2790dma_error:
2803 dev_err(&pdev->dev, "TX DMA map failed\n"); 2791 dev_err(&pdev->dev, "TX DMA map failed\n");
2804 buffer_info->dma = 0; 2792 buffer_info->dma = 0;
2805 count--; 2793 if (count)
2806
2807 while (count >= 0) {
2808 count--; 2794 count--;
2809 i--; 2795
2810 if (i < 0) 2796 while (count--) {
2797 if (i==0)
2811 i += tx_ring->count; 2798 i += tx_ring->count;
2799 i--;
2812 buffer_info = &tx_ring->buffer_info[i]; 2800 buffer_info = &tx_ring->buffer_info[i];
2813 e1000_unmap_and_free_tx_resource(adapter, buffer_info); 2801 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
2814 } 2802 }
@@ -3176,13 +3164,7 @@ static int e1000_change_mtu(struct net_device *netdev, int new_mtu)
3176 * however with the new *_jumbo_rx* routines, jumbo receives will use 3164 * however with the new *_jumbo_rx* routines, jumbo receives will use
3177 * fragmented skbs */ 3165 * fragmented skbs */
3178 3166
3179 if (max_frame <= E1000_RXBUFFER_256) 3167 if (max_frame <= E1000_RXBUFFER_2048)
3180 adapter->rx_buffer_len = E1000_RXBUFFER_256;
3181 else if (max_frame <= E1000_RXBUFFER_512)
3182 adapter->rx_buffer_len = E1000_RXBUFFER_512;
3183 else if (max_frame <= E1000_RXBUFFER_1024)
3184 adapter->rx_buffer_len = E1000_RXBUFFER_1024;
3185 else if (max_frame <= E1000_RXBUFFER_2048)
3186 adapter->rx_buffer_len = E1000_RXBUFFER_2048; 3168 adapter->rx_buffer_len = E1000_RXBUFFER_2048;
3187 else 3169 else
3188#if (PAGE_SIZE >= E1000_RXBUFFER_16384) 3170#if (PAGE_SIZE >= E1000_RXBUFFER_16384)
@@ -3850,13 +3832,22 @@ static bool e1000_clean_rx_irq(struct e1000_adapter *adapter,
3850 3832
3851 length = le16_to_cpu(rx_desc->length); 3833 length = le16_to_cpu(rx_desc->length);
3852 /* !EOP means multiple descriptors were used to store a single 3834 /* !EOP means multiple descriptors were used to store a single
3853 * packet, also make sure the frame isn't just CRC only */ 3835 * packet, if thats the case we need to toss it. In fact, we
3854 if (unlikely(!(status & E1000_RXD_STAT_EOP) || (length <= 4))) { 3836 * to toss every packet with the EOP bit clear and the next
3837 * frame that _does_ have the EOP bit set, as it is by
3838 * definition only a frame fragment
3839 */
3840 if (unlikely(!(status & E1000_RXD_STAT_EOP)))
3841 adapter->discarding = true;
3842
3843 if (adapter->discarding) {
3855 /* All receives must fit into a single buffer */ 3844 /* All receives must fit into a single buffer */
3856 E1000_DBG("%s: Receive packet consumed multiple" 3845 E1000_DBG("%s: Receive packet consumed multiple"
3857 " buffers\n", netdev->name); 3846 " buffers\n", netdev->name);
3858 /* recycle */ 3847 /* recycle */
3859 buffer_info->skb = skb; 3848 buffer_info->skb = skb;
3849 if (status & E1000_RXD_STAT_EOP)
3850 adapter->discarding = false;
3860 goto next_desc; 3851 goto next_desc;
3861 } 3852 }
3862 3853
@@ -4015,11 +4006,21 @@ check_page:
4015 } 4006 }
4016 } 4007 }
4017 4008
4018 if (!buffer_info->dma) 4009 if (!buffer_info->dma) {
4019 buffer_info->dma = pci_map_page(pdev, 4010 buffer_info->dma = pci_map_page(pdev,
4020 buffer_info->page, 0, 4011 buffer_info->page, 0,
4021 buffer_info->length, 4012 buffer_info->length,
4022 PCI_DMA_FROMDEVICE); 4013 PCI_DMA_FROMDEVICE);
4014 if (pci_dma_mapping_error(pdev, buffer_info->dma)) {
4015 put_page(buffer_info->page);
4016 dev_kfree_skb(skb);
4017 buffer_info->page = NULL;
4018 buffer_info->skb = NULL;
4019 buffer_info->dma = 0;
4020 adapter->alloc_rx_buff_failed++;
4021 break; /* while !buffer_info->skb */
4022 }
4023 }
4023 4024
4024 rx_desc = E1000_RX_DESC(*rx_ring, i); 4025 rx_desc = E1000_RX_DESC(*rx_ring, i);
4025 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma); 4026 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
@@ -4110,6 +4111,13 @@ map_skb:
4110 skb->data, 4111 skb->data,
4111 buffer_info->length, 4112 buffer_info->length,
4112 PCI_DMA_FROMDEVICE); 4113 PCI_DMA_FROMDEVICE);
4114 if (pci_dma_mapping_error(pdev, buffer_info->dma)) {
4115 dev_kfree_skb(skb);
4116 buffer_info->skb = NULL;
4117 buffer_info->dma = 0;
4118 adapter->alloc_rx_buff_failed++;
4119 break; /* while !buffer_info->skb */
4120 }
4113 4121
4114 /* 4122 /*
4115 * XXX if it was allocated cleanly it will never map to a 4123 * XXX if it was allocated cleanly it will never map to a
diff --git a/drivers/net/e1000e/82571.c b/drivers/net/e1000e/82571.c
index c1a42cfc80ba..02d67d047d96 100644
--- a/drivers/net/e1000e/82571.c
+++ b/drivers/net/e1000e/82571.c
@@ -237,6 +237,8 @@ static s32 e1000_init_mac_params_82571(struct e1000_adapter *adapter)
237 /* Set if manageability features are enabled. */ 237 /* Set if manageability features are enabled. */
238 mac->arc_subsystem_valid = (er32(FWSM) & E1000_FWSM_MODE_MASK) 238 mac->arc_subsystem_valid = (er32(FWSM) & E1000_FWSM_MODE_MASK)
239 ? true : false; 239 ? true : false;
240 /* Adaptive IFS supported */
241 mac->adaptive_ifs = true;
240 242
241 /* check for link */ 243 /* check for link */
242 switch (hw->phy.media_type) { 244 switch (hw->phy.media_type) {
@@ -1290,7 +1292,6 @@ static s32 e1000_setup_link_82571(struct e1000_hw *hw)
1290static s32 e1000_setup_copper_link_82571(struct e1000_hw *hw) 1292static s32 e1000_setup_copper_link_82571(struct e1000_hw *hw)
1291{ 1293{
1292 u32 ctrl; 1294 u32 ctrl;
1293 u32 led_ctrl;
1294 s32 ret_val; 1295 s32 ret_val;
1295 1296
1296 ctrl = er32(CTRL); 1297 ctrl = er32(CTRL);
@@ -1305,11 +1306,6 @@ static s32 e1000_setup_copper_link_82571(struct e1000_hw *hw)
1305 break; 1306 break;
1306 case e1000_phy_igp_2: 1307 case e1000_phy_igp_2:
1307 ret_val = e1000e_copper_link_setup_igp(hw); 1308 ret_val = e1000e_copper_link_setup_igp(hw);
1308 /* Setup activity LED */
1309 led_ctrl = er32(LEDCTL);
1310 led_ctrl &= IGP_ACTIVITY_LED_MASK;
1311 led_ctrl |= (IGP_ACTIVITY_LED_ENABLE | IGP_LED3_MODE);
1312 ew32(LEDCTL, led_ctrl);
1313 break; 1309 break;
1314 default: 1310 default:
1315 return -E1000_ERR_PHY; 1311 return -E1000_ERR_PHY;
diff --git a/drivers/net/e1000e/e1000.h b/drivers/net/e1000e/e1000.h
index cebbd9079d53..d236efaf7478 100644
--- a/drivers/net/e1000e/e1000.h
+++ b/drivers/net/e1000e/e1000.h
@@ -421,6 +421,7 @@ struct e1000_info {
421/* CRC Stripping defines */ 421/* CRC Stripping defines */
422#define FLAG2_CRC_STRIPPING (1 << 0) 422#define FLAG2_CRC_STRIPPING (1 << 0)
423#define FLAG2_HAS_PHY_WAKEUP (1 << 1) 423#define FLAG2_HAS_PHY_WAKEUP (1 << 1)
424#define FLAG2_IS_DISCARDING (1 << 2)
424 425
425#define E1000_RX_DESC_PS(R, i) \ 426#define E1000_RX_DESC_PS(R, i) \
426 (&(((union e1000_rx_desc_packet_split *)((R).desc))[i])) 427 (&(((union e1000_rx_desc_packet_split *)((R).desc))[i]))
@@ -582,7 +583,6 @@ extern s32 e1000_read_phy_reg_hv_locked(struct e1000_hw *hw, u32 offset,
582extern s32 e1000_write_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 data); 583extern s32 e1000_write_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 data);
583extern s32 e1000_write_phy_reg_hv_locked(struct e1000_hw *hw, u32 offset, 584extern s32 e1000_write_phy_reg_hv_locked(struct e1000_hw *hw, u32 offset,
584 u16 data); 585 u16 data);
585extern s32 e1000_set_mdio_slow_mode_hv(struct e1000_hw *hw, bool slow);
586extern s32 e1000_link_stall_workaround_hv(struct e1000_hw *hw); 586extern s32 e1000_link_stall_workaround_hv(struct e1000_hw *hw);
587extern s32 e1000_copper_link_setup_82577(struct e1000_hw *hw); 587extern s32 e1000_copper_link_setup_82577(struct e1000_hw *hw);
588extern s32 e1000_check_polarity_82577(struct e1000_hw *hw); 588extern s32 e1000_check_polarity_82577(struct e1000_hw *hw);
diff --git a/drivers/net/e1000e/es2lan.c b/drivers/net/e1000e/es2lan.c
index 3028f23da891..e2aa3b788564 100644
--- a/drivers/net/e1000e/es2lan.c
+++ b/drivers/net/e1000e/es2lan.c
@@ -224,6 +224,8 @@ static s32 e1000_init_mac_params_80003es2lan(struct e1000_adapter *adapter)
224 /* Set if manageability features are enabled. */ 224 /* Set if manageability features are enabled. */
225 mac->arc_subsystem_valid = (er32(FWSM) & E1000_FWSM_MODE_MASK) 225 mac->arc_subsystem_valid = (er32(FWSM) & E1000_FWSM_MODE_MASK)
226 ? true : false; 226 ? true : false;
227 /* Adaptive IFS not supported */
228 mac->adaptive_ifs = false;
227 229
228 /* check for link */ 230 /* check for link */
229 switch (hw->phy.media_type) { 231 switch (hw->phy.media_type) {
diff --git a/drivers/net/e1000e/hw.h b/drivers/net/e1000e/hw.h
index 2784cf44a6f3..eccf29b75c41 100644
--- a/drivers/net/e1000e/hw.h
+++ b/drivers/net/e1000e/hw.h
@@ -818,6 +818,7 @@ struct e1000_mac_info {
818 818
819 u8 forced_speed_duplex; 819 u8 forced_speed_duplex;
820 820
821 bool adaptive_ifs;
821 bool arc_subsystem_valid; 822 bool arc_subsystem_valid;
822 bool autoneg; 823 bool autoneg;
823 bool autoneg_failed; 824 bool autoneg_failed;
diff --git a/drivers/net/e1000e/ich8lan.c b/drivers/net/e1000e/ich8lan.c
index 9b09246af064..8b6ecd127889 100644
--- a/drivers/net/e1000e/ich8lan.c
+++ b/drivers/net/e1000e/ich8lan.c
@@ -138,6 +138,10 @@
138#define E1000_NVM_K1_CONFIG 0x1B /* NVM K1 Config Word */ 138#define E1000_NVM_K1_CONFIG 0x1B /* NVM K1 Config Word */
139#define E1000_NVM_K1_ENABLE 0x1 /* NVM Enable K1 bit */ 139#define E1000_NVM_K1_ENABLE 0x1 /* NVM Enable K1 bit */
140 140
141/* KMRN Mode Control */
142#define HV_KMRN_MODE_CTRL PHY_REG(769, 16)
143#define HV_KMRN_MDIO_SLOW 0x0400
144
141/* ICH GbE Flash Hardware Sequencing Flash Status Register bit breakdown */ 145/* ICH GbE Flash Hardware Sequencing Flash Status Register bit breakdown */
142/* Offset 04h HSFSTS */ 146/* Offset 04h HSFSTS */
143union ich8_hws_flash_status { 147union ich8_hws_flash_status {
@@ -219,6 +223,7 @@ static s32 e1000_set_lplu_state_pchlan(struct e1000_hw *hw, bool active);
219static void e1000_power_down_phy_copper_ich8lan(struct e1000_hw *hw); 223static void e1000_power_down_phy_copper_ich8lan(struct e1000_hw *hw);
220static void e1000_lan_init_done_ich8lan(struct e1000_hw *hw); 224static void e1000_lan_init_done_ich8lan(struct e1000_hw *hw);
221static s32 e1000_k1_gig_workaround_hv(struct e1000_hw *hw, bool link); 225static s32 e1000_k1_gig_workaround_hv(struct e1000_hw *hw, bool link);
226static s32 e1000_set_mdio_slow_mode_hv(struct e1000_hw *hw);
222 227
223static inline u16 __er16flash(struct e1000_hw *hw, unsigned long reg) 228static inline u16 __er16flash(struct e1000_hw *hw, unsigned long reg)
224{ 229{
@@ -270,7 +275,21 @@ static s32 e1000_init_phy_params_pchlan(struct e1000_hw *hw)
270 phy->autoneg_mask = AUTONEG_ADVERTISE_SPEED_DEFAULT; 275 phy->autoneg_mask = AUTONEG_ADVERTISE_SPEED_DEFAULT;
271 276
272 phy->id = e1000_phy_unknown; 277 phy->id = e1000_phy_unknown;
273 e1000e_get_phy_id(hw); 278 ret_val = e1000e_get_phy_id(hw);
279 if (ret_val)
280 goto out;
281 if ((phy->id == 0) || (phy->id == PHY_REVISION_MASK)) {
282 /*
283 * In case the PHY needs to be in mdio slow mode (eg. 82577),
284 * set slow mode and try to get the PHY id again.
285 */
286 ret_val = e1000_set_mdio_slow_mode_hv(hw);
287 if (ret_val)
288 goto out;
289 ret_val = e1000e_get_phy_id(hw);
290 if (ret_val)
291 goto out;
292 }
274 phy->type = e1000e_get_phy_type_from_id(phy->id); 293 phy->type = e1000e_get_phy_type_from_id(phy->id);
275 294
276 switch (phy->type) { 295 switch (phy->type) {
@@ -292,6 +311,7 @@ static s32 e1000_init_phy_params_pchlan(struct e1000_hw *hw)
292 break; 311 break;
293 } 312 }
294 313
314out:
295 return ret_val; 315 return ret_val;
296} 316}
297 317
@@ -454,6 +474,8 @@ static s32 e1000_init_mac_params_ich8lan(struct e1000_adapter *adapter)
454 mac->rar_entry_count--; 474 mac->rar_entry_count--;
455 /* Set if manageability features are enabled. */ 475 /* Set if manageability features are enabled. */
456 mac->arc_subsystem_valid = true; 476 mac->arc_subsystem_valid = true;
477 /* Adaptive IFS supported */
478 mac->adaptive_ifs = true;
457 479
458 /* LED operations */ 480 /* LED operations */
459 switch (mac->type) { 481 switch (mac->type) {
@@ -1074,16 +1096,44 @@ out:
1074 1096
1075 1097
1076/** 1098/**
1099 * e1000_set_mdio_slow_mode_hv - Set slow MDIO access mode
1100 * @hw: pointer to the HW structure
1101 **/
1102static s32 e1000_set_mdio_slow_mode_hv(struct e1000_hw *hw)
1103{
1104 s32 ret_val;
1105 u16 data;
1106
1107 ret_val = e1e_rphy(hw, HV_KMRN_MODE_CTRL, &data);
1108 if (ret_val)
1109 return ret_val;
1110
1111 data |= HV_KMRN_MDIO_SLOW;
1112
1113 ret_val = e1e_wphy(hw, HV_KMRN_MODE_CTRL, data);
1114
1115 return ret_val;
1116}
1117
1118/**
1077 * e1000_hv_phy_workarounds_ich8lan - A series of Phy workarounds to be 1119 * e1000_hv_phy_workarounds_ich8lan - A series of Phy workarounds to be
1078 * done after every PHY reset. 1120 * done after every PHY reset.
1079 **/ 1121 **/
1080static s32 e1000_hv_phy_workarounds_ich8lan(struct e1000_hw *hw) 1122static s32 e1000_hv_phy_workarounds_ich8lan(struct e1000_hw *hw)
1081{ 1123{
1082 s32 ret_val = 0; 1124 s32 ret_val = 0;
1125 u16 phy_data;
1083 1126
1084 if (hw->mac.type != e1000_pchlan) 1127 if (hw->mac.type != e1000_pchlan)
1085 return ret_val; 1128 return ret_val;
1086 1129
1130 /* Set MDIO slow mode before any other MDIO access */
1131 if (hw->phy.type == e1000_phy_82577) {
1132 ret_val = e1000_set_mdio_slow_mode_hv(hw);
1133 if (ret_val)
1134 goto out;
1135 }
1136
1087 if (((hw->phy.type == e1000_phy_82577) && 1137 if (((hw->phy.type == e1000_phy_82577) &&
1088 ((hw->phy.revision == 1) || (hw->phy.revision == 2))) || 1138 ((hw->phy.revision == 1) || (hw->phy.revision == 2))) ||
1089 ((hw->phy.type == e1000_phy_82578) && (hw->phy.revision == 1))) { 1139 ((hw->phy.type == e1000_phy_82578) && (hw->phy.revision == 1))) {
@@ -1116,16 +1166,32 @@ static s32 e1000_hv_phy_workarounds_ich8lan(struct e1000_hw *hw)
1116 1166
1117 hw->phy.addr = 1; 1167 hw->phy.addr = 1;
1118 ret_val = e1000e_write_phy_reg_mdic(hw, IGP01E1000_PHY_PAGE_SELECT, 0); 1168 ret_val = e1000e_write_phy_reg_mdic(hw, IGP01E1000_PHY_PAGE_SELECT, 0);
1169 hw->phy.ops.release(hw);
1119 if (ret_val) 1170 if (ret_val)
1120 goto out; 1171 goto out;
1121 hw->phy.ops.release(hw);
1122 1172
1123 /* 1173 /*
1124 * Configure the K1 Si workaround during phy reset assuming there is 1174 * Configure the K1 Si workaround during phy reset assuming there is
1125 * link so that it disables K1 if link is in 1Gbps. 1175 * link so that it disables K1 if link is in 1Gbps.
1126 */ 1176 */
1127 ret_val = e1000_k1_gig_workaround_hv(hw, true); 1177 ret_val = e1000_k1_gig_workaround_hv(hw, true);
1178 if (ret_val)
1179 goto out;
1128 1180
1181 /* Workaround for link disconnects on a busy hub in half duplex */
1182 ret_val = hw->phy.ops.acquire(hw);
1183 if (ret_val)
1184 goto out;
1185 ret_val = hw->phy.ops.read_reg_locked(hw,
1186 PHY_REG(BM_PORT_CTRL_PAGE, 17),
1187 &phy_data);
1188 if (ret_val)
1189 goto release;
1190 ret_val = hw->phy.ops.write_reg_locked(hw,
1191 PHY_REG(BM_PORT_CTRL_PAGE, 17),
1192 phy_data & 0x00FF);
1193release:
1194 hw->phy.ops.release(hw);
1129out: 1195out:
1130 return ret_val; 1196 return ret_val;
1131} 1197}
@@ -1182,6 +1248,7 @@ static s32 e1000_phy_hw_reset_ich8lan(struct e1000_hw *hw)
1182 /* Allow time for h/w to get to a quiescent state after reset */ 1248 /* Allow time for h/w to get to a quiescent state after reset */
1183 mdelay(10); 1249 mdelay(10);
1184 1250
1251 /* Perform any necessary post-reset workarounds */
1185 if (hw->mac.type == e1000_pchlan) { 1252 if (hw->mac.type == e1000_pchlan) {
1186 ret_val = e1000_hv_phy_workarounds_ich8lan(hw); 1253 ret_val = e1000_hv_phy_workarounds_ich8lan(hw);
1187 if (ret_val) 1254 if (ret_val)
@@ -2482,6 +2549,10 @@ static s32 e1000_reset_hw_ich8lan(struct e1000_hw *hw)
2482 if (!ret_val) 2549 if (!ret_val)
2483 e1000_release_swflag_ich8lan(hw); 2550 e1000_release_swflag_ich8lan(hw);
2484 2551
2552 /* Perform any necessary post-reset workarounds */
2553 if (hw->mac.type == e1000_pchlan)
2554 ret_val = e1000_hv_phy_workarounds_ich8lan(hw);
2555
2485 if (ctrl & E1000_CTRL_PHY_RST) 2556 if (ctrl & E1000_CTRL_PHY_RST)
2486 ret_val = hw->phy.ops.get_cfg_done(hw); 2557 ret_val = hw->phy.ops.get_cfg_done(hw);
2487 2558
@@ -2526,9 +2597,6 @@ static s32 e1000_reset_hw_ich8lan(struct e1000_hw *hw)
2526 kab |= E1000_KABGTXD_BGSQLBIAS; 2597 kab |= E1000_KABGTXD_BGSQLBIAS;
2527 ew32(KABGTXD, kab); 2598 ew32(KABGTXD, kab);
2528 2599
2529 if (hw->mac.type == e1000_pchlan)
2530 ret_val = e1000_hv_phy_workarounds_ich8lan(hw);
2531
2532out: 2600out:
2533 return ret_val; 2601 return ret_val;
2534} 2602}
diff --git a/drivers/net/e1000e/lib.c b/drivers/net/e1000e/lib.c
index a86c17548c1e..2fa9b36a2c5a 100644
--- a/drivers/net/e1000e/lib.c
+++ b/drivers/net/e1000e/lib.c
@@ -125,6 +125,7 @@ void e1000_write_vfta_generic(struct e1000_hw *hw, u32 offset, u32 value)
125void e1000e_init_rx_addrs(struct e1000_hw *hw, u16 rar_count) 125void e1000e_init_rx_addrs(struct e1000_hw *hw, u16 rar_count)
126{ 126{
127 u32 i; 127 u32 i;
128 u8 mac_addr[ETH_ALEN] = {0};
128 129
129 /* Setup the receive address */ 130 /* Setup the receive address */
130 e_dbg("Programming MAC Address into RAR[0]\n"); 131 e_dbg("Programming MAC Address into RAR[0]\n");
@@ -133,12 +134,8 @@ void e1000e_init_rx_addrs(struct e1000_hw *hw, u16 rar_count)
133 134
134 /* Zero out the other (rar_entry_count - 1) receive addresses */ 135 /* Zero out the other (rar_entry_count - 1) receive addresses */
135 e_dbg("Clearing RAR[1-%u]\n", rar_count-1); 136 e_dbg("Clearing RAR[1-%u]\n", rar_count-1);
136 for (i = 1; i < rar_count; i++) { 137 for (i = 1; i < rar_count; i++)
137 E1000_WRITE_REG_ARRAY(hw, E1000_RA, (i << 1), 0); 138 e1000e_rar_set(hw, mac_addr, i);
138 e1e_flush();
139 E1000_WRITE_REG_ARRAY(hw, E1000_RA, ((i << 1) + 1), 0);
140 e1e_flush();
141 }
142} 139}
143 140
144/** 141/**
@@ -164,10 +161,19 @@ void e1000e_rar_set(struct e1000_hw *hw, u8 *addr, u32 index)
164 161
165 rar_high = ((u32) addr[4] | ((u32) addr[5] << 8)); 162 rar_high = ((u32) addr[4] | ((u32) addr[5] << 8));
166 163
167 rar_high |= E1000_RAH_AV; 164 /* If MAC address zero, no need to set the AV bit */
165 if (rar_low || rar_high)
166 rar_high |= E1000_RAH_AV;
168 167
169 E1000_WRITE_REG_ARRAY(hw, E1000_RA, (index << 1), rar_low); 168 /*
170 E1000_WRITE_REG_ARRAY(hw, E1000_RA, ((index << 1) + 1), rar_high); 169 * Some bridges will combine consecutive 32-bit writes into
170 * a single burst write, which will malfunction on some parts.
171 * The flushes avoid this.
172 */
173 ew32(RAL(index), rar_low);
174 e1e_flush();
175 ew32(RAH(index), rar_high);
176 e1e_flush();
171} 177}
172 178
173/** 179/**
@@ -1609,6 +1615,11 @@ void e1000e_reset_adaptive(struct e1000_hw *hw)
1609{ 1615{
1610 struct e1000_mac_info *mac = &hw->mac; 1616 struct e1000_mac_info *mac = &hw->mac;
1611 1617
1618 if (!mac->adaptive_ifs) {
1619 e_dbg("Not in Adaptive IFS mode!\n");
1620 goto out;
1621 }
1622
1612 mac->current_ifs_val = 0; 1623 mac->current_ifs_val = 0;
1613 mac->ifs_min_val = IFS_MIN; 1624 mac->ifs_min_val = IFS_MIN;
1614 mac->ifs_max_val = IFS_MAX; 1625 mac->ifs_max_val = IFS_MAX;
@@ -1617,6 +1628,8 @@ void e1000e_reset_adaptive(struct e1000_hw *hw)
1617 1628
1618 mac->in_ifs_mode = false; 1629 mac->in_ifs_mode = false;
1619 ew32(AIT, 0); 1630 ew32(AIT, 0);
1631out:
1632 return;
1620} 1633}
1621 1634
1622/** 1635/**
@@ -1630,6 +1643,11 @@ void e1000e_update_adaptive(struct e1000_hw *hw)
1630{ 1643{
1631 struct e1000_mac_info *mac = &hw->mac; 1644 struct e1000_mac_info *mac = &hw->mac;
1632 1645
1646 if (!mac->adaptive_ifs) {
1647 e_dbg("Not in Adaptive IFS mode!\n");
1648 goto out;
1649 }
1650
1633 if ((mac->collision_delta * mac->ifs_ratio) > mac->tx_packet_delta) { 1651 if ((mac->collision_delta * mac->ifs_ratio) > mac->tx_packet_delta) {
1634 if (mac->tx_packet_delta > MIN_NUM_XMITS) { 1652 if (mac->tx_packet_delta > MIN_NUM_XMITS) {
1635 mac->in_ifs_mode = true; 1653 mac->in_ifs_mode = true;
@@ -1650,6 +1668,8 @@ void e1000e_update_adaptive(struct e1000_hw *hw)
1650 ew32(AIT, 0); 1668 ew32(AIT, 0);
1651 } 1669 }
1652 } 1670 }
1671out:
1672 return;
1653} 1673}
1654 1674
1655/** 1675/**
@@ -2287,10 +2307,12 @@ bool e1000e_enable_tx_pkt_filtering(struct e1000_hw *hw)
2287 s32 ret_val, hdr_csum, csum; 2307 s32 ret_val, hdr_csum, csum;
2288 u8 i, len; 2308 u8 i, len;
2289 2309
2310 hw->mac.tx_pkt_filtering = true;
2311
2290 /* No manageability, no filtering */ 2312 /* No manageability, no filtering */
2291 if (!e1000e_check_mng_mode(hw)) { 2313 if (!e1000e_check_mng_mode(hw)) {
2292 hw->mac.tx_pkt_filtering = false; 2314 hw->mac.tx_pkt_filtering = false;
2293 return 0; 2315 goto out;
2294 } 2316 }
2295 2317
2296 /* 2318 /*
@@ -2298,9 +2320,9 @@ bool e1000e_enable_tx_pkt_filtering(struct e1000_hw *hw)
2298 * reason, disable filtering. 2320 * reason, disable filtering.
2299 */ 2321 */
2300 ret_val = e1000_mng_enable_host_if(hw); 2322 ret_val = e1000_mng_enable_host_if(hw);
2301 if (ret_val != 0) { 2323 if (ret_val) {
2302 hw->mac.tx_pkt_filtering = false; 2324 hw->mac.tx_pkt_filtering = false;
2303 return ret_val; 2325 goto out;
2304 } 2326 }
2305 2327
2306 /* Read in the header. Length and offset are in dwords. */ 2328 /* Read in the header. Length and offset are in dwords. */
@@ -2319,17 +2341,17 @@ bool e1000e_enable_tx_pkt_filtering(struct e1000_hw *hw)
2319 */ 2341 */
2320 if ((hdr_csum != csum) || (hdr->signature != E1000_IAMT_SIGNATURE)) { 2342 if ((hdr_csum != csum) || (hdr->signature != E1000_IAMT_SIGNATURE)) {
2321 hw->mac.tx_pkt_filtering = true; 2343 hw->mac.tx_pkt_filtering = true;
2322 return 1; 2344 goto out;
2323 } 2345 }
2324 2346
2325 /* Cookie area is valid, make the final check for filtering. */ 2347 /* Cookie area is valid, make the final check for filtering. */
2326 if (!(hdr->status & E1000_MNG_DHCP_COOKIE_STATUS_PARSING)) { 2348 if (!(hdr->status & E1000_MNG_DHCP_COOKIE_STATUS_PARSING)) {
2327 hw->mac.tx_pkt_filtering = false; 2349 hw->mac.tx_pkt_filtering = false;
2328 return 0; 2350 goto out;
2329 } 2351 }
2330 2352
2331 hw->mac.tx_pkt_filtering = true; 2353out:
2332 return 1; 2354 return hw->mac.tx_pkt_filtering;
2333} 2355}
2334 2356
2335/** 2357/**
diff --git a/drivers/net/e1000e/netdev.c b/drivers/net/e1000e/netdev.c
index 762b697ce731..57f149b75fbe 100644
--- a/drivers/net/e1000e/netdev.c
+++ b/drivers/net/e1000e/netdev.c
@@ -450,13 +450,23 @@ static bool e1000_clean_rx_irq(struct e1000_adapter *adapter,
450 450
451 length = le16_to_cpu(rx_desc->length); 451 length = le16_to_cpu(rx_desc->length);
452 452
453 /* !EOP means multiple descriptors were used to store a single 453 /*
454 * packet, also make sure the frame isn't just CRC only */ 454 * !EOP means multiple descriptors were used to store a single
455 if (!(status & E1000_RXD_STAT_EOP) || (length <= 4)) { 455 * packet, if that's the case we need to toss it. In fact, we
456 * need to toss every packet with the EOP bit clear and the
457 * next frame that _does_ have the EOP bit set, as it is by
458 * definition only a frame fragment
459 */
460 if (unlikely(!(status & E1000_RXD_STAT_EOP)))
461 adapter->flags2 |= FLAG2_IS_DISCARDING;
462
463 if (adapter->flags2 & FLAG2_IS_DISCARDING) {
456 /* All receives must fit into a single buffer */ 464 /* All receives must fit into a single buffer */
457 e_dbg("Receive packet consumed multiple buffers\n"); 465 e_dbg("Receive packet consumed multiple buffers\n");
458 /* recycle */ 466 /* recycle */
459 buffer_info->skb = skb; 467 buffer_info->skb = skb;
468 if (status & E1000_RXD_STAT_EOP)
469 adapter->flags2 &= ~FLAG2_IS_DISCARDING;
460 goto next_desc; 470 goto next_desc;
461 } 471 }
462 472
@@ -745,10 +755,16 @@ static bool e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
745 PCI_DMA_FROMDEVICE); 755 PCI_DMA_FROMDEVICE);
746 buffer_info->dma = 0; 756 buffer_info->dma = 0;
747 757
748 if (!(staterr & E1000_RXD_STAT_EOP)) { 758 /* see !EOP comment in other rx routine */
759 if (!(staterr & E1000_RXD_STAT_EOP))
760 adapter->flags2 |= FLAG2_IS_DISCARDING;
761
762 if (adapter->flags2 & FLAG2_IS_DISCARDING) {
749 e_dbg("Packet Split buffers didn't pick up the full " 763 e_dbg("Packet Split buffers didn't pick up the full "
750 "packet\n"); 764 "packet\n");
751 dev_kfree_skb_irq(skb); 765 dev_kfree_skb_irq(skb);
766 if (staterr & E1000_RXD_STAT_EOP)
767 adapter->flags2 &= ~FLAG2_IS_DISCARDING;
752 goto next_desc; 768 goto next_desc;
753 } 769 }
754 770
@@ -1118,6 +1134,7 @@ static void e1000_clean_rx_ring(struct e1000_adapter *adapter)
1118 1134
1119 rx_ring->next_to_clean = 0; 1135 rx_ring->next_to_clean = 0;
1120 rx_ring->next_to_use = 0; 1136 rx_ring->next_to_use = 0;
1137 adapter->flags2 &= ~FLAG2_IS_DISCARDING;
1121 1138
1122 writel(0, adapter->hw.hw_addr + rx_ring->head); 1139 writel(0, adapter->hw.hw_addr + rx_ring->head);
1123 writel(0, adapter->hw.hw_addr + rx_ring->tail); 1140 writel(0, adapter->hw.hw_addr + rx_ring->tail);
@@ -2333,18 +2350,6 @@ static void e1000_setup_rctl(struct e1000_adapter *adapter)
2333 rctl &= ~E1000_RCTL_SZ_4096; 2350 rctl &= ~E1000_RCTL_SZ_4096;
2334 rctl |= E1000_RCTL_BSEX; 2351 rctl |= E1000_RCTL_BSEX;
2335 switch (adapter->rx_buffer_len) { 2352 switch (adapter->rx_buffer_len) {
2336 case 256:
2337 rctl |= E1000_RCTL_SZ_256;
2338 rctl &= ~E1000_RCTL_BSEX;
2339 break;
2340 case 512:
2341 rctl |= E1000_RCTL_SZ_512;
2342 rctl &= ~E1000_RCTL_BSEX;
2343 break;
2344 case 1024:
2345 rctl |= E1000_RCTL_SZ_1024;
2346 rctl &= ~E1000_RCTL_BSEX;
2347 break;
2348 case 2048: 2353 case 2048:
2349 default: 2354 default:
2350 rctl |= E1000_RCTL_SZ_2048; 2355 rctl |= E1000_RCTL_SZ_2048;
@@ -3315,24 +3320,24 @@ void e1000e_update_stats(struct e1000_adapter *adapter)
3315 if ((hw->phy.type == e1000_phy_82578) || 3320 if ((hw->phy.type == e1000_phy_82578) ||
3316 (hw->phy.type == e1000_phy_82577)) { 3321 (hw->phy.type == e1000_phy_82577)) {
3317 e1e_rphy(hw, HV_SCC_UPPER, &phy_data); 3322 e1e_rphy(hw, HV_SCC_UPPER, &phy_data);
3318 e1e_rphy(hw, HV_SCC_LOWER, &phy_data); 3323 if (!e1e_rphy(hw, HV_SCC_LOWER, &phy_data))
3319 adapter->stats.scc += phy_data; 3324 adapter->stats.scc += phy_data;
3320 3325
3321 e1e_rphy(hw, HV_ECOL_UPPER, &phy_data); 3326 e1e_rphy(hw, HV_ECOL_UPPER, &phy_data);
3322 e1e_rphy(hw, HV_ECOL_LOWER, &phy_data); 3327 if (!e1e_rphy(hw, HV_ECOL_LOWER, &phy_data))
3323 adapter->stats.ecol += phy_data; 3328 adapter->stats.ecol += phy_data;
3324 3329
3325 e1e_rphy(hw, HV_MCC_UPPER, &phy_data); 3330 e1e_rphy(hw, HV_MCC_UPPER, &phy_data);
3326 e1e_rphy(hw, HV_MCC_LOWER, &phy_data); 3331 if (!e1e_rphy(hw, HV_MCC_LOWER, &phy_data))
3327 adapter->stats.mcc += phy_data; 3332 adapter->stats.mcc += phy_data;
3328 3333
3329 e1e_rphy(hw, HV_LATECOL_UPPER, &phy_data); 3334 e1e_rphy(hw, HV_LATECOL_UPPER, &phy_data);
3330 e1e_rphy(hw, HV_LATECOL_LOWER, &phy_data); 3335 if (!e1e_rphy(hw, HV_LATECOL_LOWER, &phy_data))
3331 adapter->stats.latecol += phy_data; 3336 adapter->stats.latecol += phy_data;
3332 3337
3333 e1e_rphy(hw, HV_DC_UPPER, &phy_data); 3338 e1e_rphy(hw, HV_DC_UPPER, &phy_data);
3334 e1e_rphy(hw, HV_DC_LOWER, &phy_data); 3339 if (!e1e_rphy(hw, HV_DC_LOWER, &phy_data))
3335 adapter->stats.dc += phy_data; 3340 adapter->stats.dc += phy_data;
3336 } else { 3341 } else {
3337 adapter->stats.scc += er32(SCC); 3342 adapter->stats.scc += er32(SCC);
3338 adapter->stats.ecol += er32(ECOL); 3343 adapter->stats.ecol += er32(ECOL);
@@ -3360,8 +3365,8 @@ void e1000e_update_stats(struct e1000_adapter *adapter)
3360 if ((hw->phy.type == e1000_phy_82578) || 3365 if ((hw->phy.type == e1000_phy_82578) ||
3361 (hw->phy.type == e1000_phy_82577)) { 3366 (hw->phy.type == e1000_phy_82577)) {
3362 e1e_rphy(hw, HV_COLC_UPPER, &phy_data); 3367 e1e_rphy(hw, HV_COLC_UPPER, &phy_data);
3363 e1e_rphy(hw, HV_COLC_LOWER, &phy_data); 3368 if (!e1e_rphy(hw, HV_COLC_LOWER, &phy_data))
3364 hw->mac.collision_delta = phy_data; 3369 hw->mac.collision_delta = phy_data;
3365 } else { 3370 } else {
3366 hw->mac.collision_delta = er32(COLC); 3371 hw->mac.collision_delta = er32(COLC);
3367 } 3372 }
@@ -3372,8 +3377,8 @@ void e1000e_update_stats(struct e1000_adapter *adapter)
3372 if ((hw->phy.type == e1000_phy_82578) || 3377 if ((hw->phy.type == e1000_phy_82578) ||
3373 (hw->phy.type == e1000_phy_82577)) { 3378 (hw->phy.type == e1000_phy_82577)) {
3374 e1e_rphy(hw, HV_TNCRS_UPPER, &phy_data); 3379 e1e_rphy(hw, HV_TNCRS_UPPER, &phy_data);
3375 e1e_rphy(hw, HV_TNCRS_LOWER, &phy_data); 3380 if (!e1e_rphy(hw, HV_TNCRS_LOWER, &phy_data))
3376 adapter->stats.tncrs += phy_data; 3381 adapter->stats.tncrs += phy_data;
3377 } else { 3382 } else {
3378 if ((hw->mac.type != e1000_82574) && 3383 if ((hw->mac.type != e1000_82574) &&
3379 (hw->mac.type != e1000_82583)) 3384 (hw->mac.type != e1000_82583))
@@ -3781,7 +3786,7 @@ static int e1000_tso(struct e1000_adapter *adapter,
3781 0, IPPROTO_TCP, 0); 3786 0, IPPROTO_TCP, 0);
3782 cmd_length = E1000_TXD_CMD_IP; 3787 cmd_length = E1000_TXD_CMD_IP;
3783 ipcse = skb_transport_offset(skb) - 1; 3788 ipcse = skb_transport_offset(skb) - 1;
3784 } else if (skb_shinfo(skb)->gso_type == SKB_GSO_TCPV6) { 3789 } else if (skb_is_gso_v6(skb)) {
3785 ipv6_hdr(skb)->payload_len = 0; 3790 ipv6_hdr(skb)->payload_len = 0;
3786 tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr, 3791 tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
3787 &ipv6_hdr(skb)->daddr, 3792 &ipv6_hdr(skb)->daddr,
@@ -3962,13 +3967,13 @@ static int e1000_tx_map(struct e1000_adapter *adapter,
3962dma_error: 3967dma_error:
3963 dev_err(&pdev->dev, "TX DMA map failed\n"); 3968 dev_err(&pdev->dev, "TX DMA map failed\n");
3964 buffer_info->dma = 0; 3969 buffer_info->dma = 0;
3965 count--; 3970 if (count)
3966
3967 while (count >= 0) {
3968 count--; 3971 count--;
3969 i--; 3972
3970 if (i < 0) 3973 while (count--) {
3974 if (i==0)
3971 i += tx_ring->count; 3975 i += tx_ring->count;
3976 i--;
3972 buffer_info = &tx_ring->buffer_info[i]; 3977 buffer_info = &tx_ring->buffer_info[i];
3973 e1000_put_txbuf(adapter, buffer_info);; 3978 e1000_put_txbuf(adapter, buffer_info);;
3974 } 3979 }
@@ -4317,13 +4322,7 @@ static int e1000_change_mtu(struct net_device *netdev, int new_mtu)
4317 * fragmented skbs 4322 * fragmented skbs
4318 */ 4323 */
4319 4324
4320 if (max_frame <= 256) 4325 if (max_frame <= 2048)
4321 adapter->rx_buffer_len = 256;
4322 else if (max_frame <= 512)
4323 adapter->rx_buffer_len = 512;
4324 else if (max_frame <= 1024)
4325 adapter->rx_buffer_len = 1024;
4326 else if (max_frame <= 2048)
4327 adapter->rx_buffer_len = 2048; 4326 adapter->rx_buffer_len = 2048;
4328 else 4327 else
4329 adapter->rx_buffer_len = 4096; 4328 adapter->rx_buffer_len = 4096;
@@ -4674,6 +4673,7 @@ static int e1000_resume(struct pci_dev *pdev)
4674 4673
4675 pci_set_power_state(pdev, PCI_D0); 4674 pci_set_power_state(pdev, PCI_D0);
4676 pci_restore_state(pdev); 4675 pci_restore_state(pdev);
4676 pci_save_state(pdev);
4677 e1000e_disable_l1aspm(pdev); 4677 e1000e_disable_l1aspm(pdev);
4678 4678
4679 err = pci_enable_device_mem(pdev); 4679 err = pci_enable_device_mem(pdev);
@@ -4825,6 +4825,7 @@ static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
4825 } else { 4825 } else {
4826 pci_set_master(pdev); 4826 pci_set_master(pdev);
4827 pci_restore_state(pdev); 4827 pci_restore_state(pdev);
4828 pci_save_state(pdev);
4828 4829
4829 pci_enable_wake(pdev, PCI_D3hot, 0); 4830 pci_enable_wake(pdev, PCI_D3hot, 0);
4830 pci_enable_wake(pdev, PCI_D3cold, 0); 4831 pci_enable_wake(pdev, PCI_D3cold, 0);
diff --git a/drivers/net/e1000e/phy.c b/drivers/net/e1000e/phy.c
index 55a2c0acfee7..7f3ceb9dad6a 100644
--- a/drivers/net/e1000e/phy.c
+++ b/drivers/net/e1000e/phy.c
@@ -152,32 +152,9 @@ s32 e1000e_get_phy_id(struct e1000_hw *hw)
152 if (phy->id != 0 && phy->id != PHY_REVISION_MASK) 152 if (phy->id != 0 && phy->id != PHY_REVISION_MASK)
153 goto out; 153 goto out;
154 154
155 /*
156 * If the PHY ID is still unknown, we may have an 82577
157 * without link. We will try again after setting Slow MDIC
158 * mode. No harm in trying again in this case since the PHY
159 * ID is unknown at this point anyway.
160 */
161 ret_val = phy->ops.acquire(hw);
162 if (ret_val)
163 goto out;
164 ret_val = e1000_set_mdio_slow_mode_hv(hw, true);
165 if (ret_val)
166 goto out;
167 phy->ops.release(hw);
168
169 retry_count++; 155 retry_count++;
170 } 156 }
171out: 157out:
172 /* Revert to MDIO fast mode, if applicable */
173 if (retry_count) {
174 ret_val = phy->ops.acquire(hw);
175 if (ret_val)
176 return ret_val;
177 ret_val = e1000_set_mdio_slow_mode_hv(hw, false);
178 phy->ops.release(hw);
179 }
180
181 return ret_val; 158 return ret_val;
182} 159}
183 160
@@ -2791,38 +2768,6 @@ static s32 e1000_set_d0_lplu_state(struct e1000_hw *hw, bool active)
2791} 2768}
2792 2769
2793/** 2770/**
2794 * e1000_set_mdio_slow_mode_hv - Set slow MDIO access mode
2795 * @hw: pointer to the HW structure
2796 * @slow: true for slow mode, false for normal mode
2797 *
2798 * Assumes semaphore already acquired.
2799 **/
2800s32 e1000_set_mdio_slow_mode_hv(struct e1000_hw *hw, bool slow)
2801{
2802 s32 ret_val = 0;
2803 u16 data = 0;
2804
2805 /* Set MDIO mode - page 769, register 16: 0x2580==slow, 0x2180==fast */
2806 hw->phy.addr = 1;
2807 ret_val = e1000e_write_phy_reg_mdic(hw, IGP01E1000_PHY_PAGE_SELECT,
2808 (BM_PORT_CTRL_PAGE << IGP_PAGE_SHIFT));
2809 if (ret_val)
2810 goto out;
2811
2812 ret_val = e1000e_write_phy_reg_mdic(hw, BM_CS_CTRL1,
2813 (0x2180 | (slow << 10)));
2814 if (ret_val)
2815 goto out;
2816
2817 /* dummy read when reverting to fast mode - throw away result */
2818 if (!slow)
2819 ret_val = e1000e_read_phy_reg_mdic(hw, BM_CS_CTRL1, &data);
2820
2821out:
2822 return ret_val;
2823}
2824
2825/**
2826 * __e1000_read_phy_reg_hv - Read HV PHY register 2771 * __e1000_read_phy_reg_hv - Read HV PHY register
2827 * @hw: pointer to the HW structure 2772 * @hw: pointer to the HW structure
2828 * @offset: register offset to be read 2773 * @offset: register offset to be read
@@ -2839,7 +2784,6 @@ static s32 __e1000_read_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 *data,
2839 s32 ret_val; 2784 s32 ret_val;
2840 u16 page = BM_PHY_REG_PAGE(offset); 2785 u16 page = BM_PHY_REG_PAGE(offset);
2841 u16 reg = BM_PHY_REG_NUM(offset); 2786 u16 reg = BM_PHY_REG_NUM(offset);
2842 bool in_slow_mode = false;
2843 2787
2844 if (!locked) { 2788 if (!locked) {
2845 ret_val = hw->phy.ops.acquire(hw); 2789 ret_val = hw->phy.ops.acquire(hw);
@@ -2847,16 +2791,6 @@ static s32 __e1000_read_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 *data,
2847 return ret_val; 2791 return ret_val;
2848 } 2792 }
2849 2793
2850 /* Workaround failure in MDIO access while cable is disconnected */
2851 if ((hw->phy.type == e1000_phy_82577) &&
2852 !(er32(STATUS) & E1000_STATUS_LU)) {
2853 ret_val = e1000_set_mdio_slow_mode_hv(hw, true);
2854 if (ret_val)
2855 goto out;
2856
2857 in_slow_mode = true;
2858 }
2859
2860 /* Page 800 works differently than the rest so it has its own func */ 2794 /* Page 800 works differently than the rest so it has its own func */
2861 if (page == BM_WUC_PAGE) { 2795 if (page == BM_WUC_PAGE) {
2862 ret_val = e1000_access_phy_wakeup_reg_bm(hw, offset, 2796 ret_val = e1000_access_phy_wakeup_reg_bm(hw, offset,
@@ -2893,10 +2827,6 @@ static s32 __e1000_read_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 *data,
2893 ret_val = e1000e_read_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & reg, 2827 ret_val = e1000e_read_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & reg,
2894 data); 2828 data);
2895out: 2829out:
2896 /* Revert to MDIO fast mode, if applicable */
2897 if ((hw->phy.type == e1000_phy_82577) && in_slow_mode)
2898 ret_val |= e1000_set_mdio_slow_mode_hv(hw, false);
2899
2900 if (!locked) 2830 if (!locked)
2901 hw->phy.ops.release(hw); 2831 hw->phy.ops.release(hw);
2902 2832
@@ -2948,7 +2878,6 @@ static s32 __e1000_write_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 data,
2948 s32 ret_val; 2878 s32 ret_val;
2949 u16 page = BM_PHY_REG_PAGE(offset); 2879 u16 page = BM_PHY_REG_PAGE(offset);
2950 u16 reg = BM_PHY_REG_NUM(offset); 2880 u16 reg = BM_PHY_REG_NUM(offset);
2951 bool in_slow_mode = false;
2952 2881
2953 if (!locked) { 2882 if (!locked) {
2954 ret_val = hw->phy.ops.acquire(hw); 2883 ret_val = hw->phy.ops.acquire(hw);
@@ -2956,16 +2885,6 @@ static s32 __e1000_write_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 data,
2956 return ret_val; 2885 return ret_val;
2957 } 2886 }
2958 2887
2959 /* Workaround failure in MDIO access while cable is disconnected */
2960 if ((hw->phy.type == e1000_phy_82577) &&
2961 !(er32(STATUS) & E1000_STATUS_LU)) {
2962 ret_val = e1000_set_mdio_slow_mode_hv(hw, true);
2963 if (ret_val)
2964 goto out;
2965
2966 in_slow_mode = true;
2967 }
2968
2969 /* Page 800 works differently than the rest so it has its own func */ 2888 /* Page 800 works differently than the rest so it has its own func */
2970 if (page == BM_WUC_PAGE) { 2889 if (page == BM_WUC_PAGE) {
2971 ret_val = e1000_access_phy_wakeup_reg_bm(hw, offset, 2890 ret_val = e1000_access_phy_wakeup_reg_bm(hw, offset,
@@ -3019,10 +2938,6 @@ static s32 __e1000_write_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 data,
3019 data); 2938 data);
3020 2939
3021out: 2940out:
3022 /* Revert to MDIO fast mode, if applicable */
3023 if ((hw->phy.type == e1000_phy_82577) && in_slow_mode)
3024 ret_val |= e1000_set_mdio_slow_mode_hv(hw, false);
3025
3026 if (!locked) 2941 if (!locked)
3027 hw->phy.ops.release(hw); 2942 hw->phy.ops.release(hw);
3028 2943
diff --git a/drivers/net/fsl_pq_mdio.c b/drivers/net/fsl_pq_mdio.c
index 25fabb3eedc5..d5160edf2fcf 100644
--- a/drivers/net/fsl_pq_mdio.c
+++ b/drivers/net/fsl_pq_mdio.c
@@ -46,6 +46,11 @@
46#include "gianfar.h" 46#include "gianfar.h"
47#include "fsl_pq_mdio.h" 47#include "fsl_pq_mdio.h"
48 48
49struct fsl_pq_mdio_priv {
50 void __iomem *map;
51 struct fsl_pq_mdio __iomem *regs;
52};
53
49/* 54/*
50 * Write value to the PHY at mii_id at register regnum, 55 * Write value to the PHY at mii_id at register regnum,
51 * on the bus attached to the local interface, which may be different from the 56 * on the bus attached to the local interface, which may be different from the
@@ -105,7 +110,9 @@ int fsl_pq_local_mdio_read(struct fsl_pq_mdio __iomem *regs,
105 110
106static struct fsl_pq_mdio __iomem *fsl_pq_mdio_get_regs(struct mii_bus *bus) 111static struct fsl_pq_mdio __iomem *fsl_pq_mdio_get_regs(struct mii_bus *bus)
107{ 112{
108 return (void __iomem __force *)bus->priv; 113 struct fsl_pq_mdio_priv *priv = bus->priv;
114
115 return priv->regs;
109} 116}
110 117
111/* 118/*
@@ -266,6 +273,7 @@ static int fsl_pq_mdio_probe(struct of_device *ofdev,
266{ 273{
267 struct device_node *np = ofdev->node; 274 struct device_node *np = ofdev->node;
268 struct device_node *tbi; 275 struct device_node *tbi;
276 struct fsl_pq_mdio_priv *priv;
269 struct fsl_pq_mdio __iomem *regs = NULL; 277 struct fsl_pq_mdio __iomem *regs = NULL;
270 void __iomem *map; 278 void __iomem *map;
271 u32 __iomem *tbipa; 279 u32 __iomem *tbipa;
@@ -274,14 +282,19 @@ static int fsl_pq_mdio_probe(struct of_device *ofdev,
274 u64 addr = 0, size = 0; 282 u64 addr = 0, size = 0;
275 int err = 0; 283 int err = 0;
276 284
285 priv = kzalloc(sizeof(*priv), GFP_KERNEL);
286 if (!priv)
287 return -ENOMEM;
288
277 new_bus = mdiobus_alloc(); 289 new_bus = mdiobus_alloc();
278 if (NULL == new_bus) 290 if (NULL == new_bus)
279 return -ENOMEM; 291 goto err_free_priv;
280 292
281 new_bus->name = "Freescale PowerQUICC MII Bus", 293 new_bus->name = "Freescale PowerQUICC MII Bus",
282 new_bus->read = &fsl_pq_mdio_read, 294 new_bus->read = &fsl_pq_mdio_read,
283 new_bus->write = &fsl_pq_mdio_write, 295 new_bus->write = &fsl_pq_mdio_write,
284 new_bus->reset = &fsl_pq_mdio_reset, 296 new_bus->reset = &fsl_pq_mdio_reset,
297 new_bus->priv = priv;
285 fsl_pq_mdio_bus_name(new_bus->id, np); 298 fsl_pq_mdio_bus_name(new_bus->id, np);
286 299
287 /* Set the PHY base address */ 300 /* Set the PHY base address */
@@ -291,6 +304,7 @@ static int fsl_pq_mdio_probe(struct of_device *ofdev,
291 err = -ENOMEM; 304 err = -ENOMEM;
292 goto err_free_bus; 305 goto err_free_bus;
293 } 306 }
307 priv->map = map;
294 308
295 if (of_device_is_compatible(np, "fsl,gianfar-mdio") || 309 if (of_device_is_compatible(np, "fsl,gianfar-mdio") ||
296 of_device_is_compatible(np, "fsl,gianfar-tbi") || 310 of_device_is_compatible(np, "fsl,gianfar-tbi") ||
@@ -298,8 +312,7 @@ static int fsl_pq_mdio_probe(struct of_device *ofdev,
298 of_device_is_compatible(np, "ucc_geth_phy")) 312 of_device_is_compatible(np, "ucc_geth_phy"))
299 map -= offsetof(struct fsl_pq_mdio, miimcfg); 313 map -= offsetof(struct fsl_pq_mdio, miimcfg);
300 regs = map; 314 regs = map;
301 315 priv->regs = regs;
302 new_bus->priv = (void __force *)regs;
303 316
304 new_bus->irq = kcalloc(PHY_MAX_ADDR, sizeof(int), GFP_KERNEL); 317 new_bus->irq = kcalloc(PHY_MAX_ADDR, sizeof(int), GFP_KERNEL);
305 318
@@ -392,10 +405,11 @@ static int fsl_pq_mdio_probe(struct of_device *ofdev,
392err_free_irqs: 405err_free_irqs:
393 kfree(new_bus->irq); 406 kfree(new_bus->irq);
394err_unmap_regs: 407err_unmap_regs:
395 iounmap(regs); 408 iounmap(priv->map);
396err_free_bus: 409err_free_bus:
397 kfree(new_bus); 410 kfree(new_bus);
398 411err_free_priv:
412 kfree(priv);
399 return err; 413 return err;
400} 414}
401 415
@@ -404,14 +418,16 @@ static int fsl_pq_mdio_remove(struct of_device *ofdev)
404{ 418{
405 struct device *device = &ofdev->dev; 419 struct device *device = &ofdev->dev;
406 struct mii_bus *bus = dev_get_drvdata(device); 420 struct mii_bus *bus = dev_get_drvdata(device);
421 struct fsl_pq_mdio_priv *priv = bus->priv;
407 422
408 mdiobus_unregister(bus); 423 mdiobus_unregister(bus);
409 424
410 dev_set_drvdata(device, NULL); 425 dev_set_drvdata(device, NULL);
411 426
412 iounmap(fsl_pq_mdio_get_regs(bus)); 427 iounmap(priv->map);
413 bus->priv = NULL; 428 bus->priv = NULL;
414 mdiobus_free(bus); 429 mdiobus_free(bus);
430 kfree(priv);
415 431
416 return 0; 432 return 0;
417} 433}
diff --git a/drivers/net/gianfar.c b/drivers/net/gianfar.c
index 6850dc0a7b91..8bd3c9f17532 100644
--- a/drivers/net/gianfar.c
+++ b/drivers/net/gianfar.c
@@ -143,7 +143,6 @@ void gfar_start(struct net_device *dev);
143static void gfar_clear_exact_match(struct net_device *dev); 143static void gfar_clear_exact_match(struct net_device *dev);
144static void gfar_set_mac_for_addr(struct net_device *dev, int num, u8 *addr); 144static void gfar_set_mac_for_addr(struct net_device *dev, int num, u8 *addr);
145static int gfar_ioctl(struct net_device *dev, struct ifreq *rq, int cmd); 145static int gfar_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
146u16 gfar_select_queue(struct net_device *dev, struct sk_buff *skb);
147 146
148MODULE_AUTHOR("Freescale Semiconductor, Inc"); 147MODULE_AUTHOR("Freescale Semiconductor, Inc");
149MODULE_DESCRIPTION("Gianfar Ethernet Driver"); 148MODULE_DESCRIPTION("Gianfar Ethernet Driver");
@@ -357,8 +356,11 @@ static void gfar_init_mac(struct net_device *ndev)
357 /* Configure the coalescing support */ 356 /* Configure the coalescing support */
358 gfar_configure_coalescing(priv, 0xFF, 0xFF); 357 gfar_configure_coalescing(priv, 0xFF, 0xFF);
359 358
360 if (priv->rx_filer_enable) 359 if (priv->rx_filer_enable) {
361 rctrl |= RCTRL_FILREN; 360 rctrl |= RCTRL_FILREN;
361 /* Program the RIR0 reg with the required distribution */
362 gfar_write(&regs->rir0, DEFAULT_RIR0);
363 }
362 364
363 if (priv->rx_csum_enable) 365 if (priv->rx_csum_enable)
364 rctrl |= RCTRL_CHECKSUMMING; 366 rctrl |= RCTRL_CHECKSUMMING;
@@ -414,6 +416,36 @@ static void gfar_init_mac(struct net_device *ndev)
414 gfar_write(&regs->fifo_tx_starve_shutoff, priv->fifo_starve_off); 416 gfar_write(&regs->fifo_tx_starve_shutoff, priv->fifo_starve_off);
415} 417}
416 418
419static struct net_device_stats *gfar_get_stats(struct net_device *dev)
420{
421 struct gfar_private *priv = netdev_priv(dev);
422 struct netdev_queue *txq;
423 unsigned long rx_packets = 0, rx_bytes = 0, rx_dropped = 0;
424 unsigned long tx_packets = 0, tx_bytes = 0;
425 int i = 0;
426
427 for (i = 0; i < priv->num_rx_queues; i++) {
428 rx_packets += priv->rx_queue[i]->stats.rx_packets;
429 rx_bytes += priv->rx_queue[i]->stats.rx_bytes;
430 rx_dropped += priv->rx_queue[i]->stats.rx_dropped;
431 }
432
433 dev->stats.rx_packets = rx_packets;
434 dev->stats.rx_bytes = rx_bytes;
435 dev->stats.rx_dropped = rx_dropped;
436
437 for (i = 0; i < priv->num_tx_queues; i++) {
438 txq = netdev_get_tx_queue(dev, i);
439 tx_bytes += txq->tx_bytes;
440 tx_packets += txq->tx_packets;
441 }
442
443 dev->stats.tx_bytes = tx_bytes;
444 dev->stats.tx_packets = tx_packets;
445
446 return &dev->stats;
447}
448
417static const struct net_device_ops gfar_netdev_ops = { 449static const struct net_device_ops gfar_netdev_ops = {
418 .ndo_open = gfar_enet_open, 450 .ndo_open = gfar_enet_open,
419 .ndo_start_xmit = gfar_start_xmit, 451 .ndo_start_xmit = gfar_start_xmit,
@@ -422,7 +454,7 @@ static const struct net_device_ops gfar_netdev_ops = {
422 .ndo_set_multicast_list = gfar_set_multi, 454 .ndo_set_multicast_list = gfar_set_multi,
423 .ndo_tx_timeout = gfar_timeout, 455 .ndo_tx_timeout = gfar_timeout,
424 .ndo_do_ioctl = gfar_ioctl, 456 .ndo_do_ioctl = gfar_ioctl,
425 .ndo_select_queue = gfar_select_queue, 457 .ndo_get_stats = gfar_get_stats,
426 .ndo_vlan_rx_register = gfar_vlan_rx_register, 458 .ndo_vlan_rx_register = gfar_vlan_rx_register,
427 .ndo_set_mac_address = eth_mac_addr, 459 .ndo_set_mac_address = eth_mac_addr,
428 .ndo_validate_addr = eth_validate_addr, 460 .ndo_validate_addr = eth_validate_addr,
@@ -472,10 +504,6 @@ static inline int gfar_uses_fcb(struct gfar_private *priv)
472 return priv->vlgrp || priv->rx_csum_enable; 504 return priv->vlgrp || priv->rx_csum_enable;
473} 505}
474 506
475u16 gfar_select_queue(struct net_device *dev, struct sk_buff *skb)
476{
477 return skb_get_queue_mapping(skb);
478}
479static void free_tx_pointers(struct gfar_private *priv) 507static void free_tx_pointers(struct gfar_private *priv)
480{ 508{
481 int i = 0; 509 int i = 0;
@@ -1022,6 +1050,9 @@ static int gfar_probe(struct of_device *ofdev,
1022 priv->rx_queue[i]->rxic = DEFAULT_RXIC; 1050 priv->rx_queue[i]->rxic = DEFAULT_RXIC;
1023 } 1051 }
1024 1052
1053 /* enable filer if using multiple RX queues*/
1054 if(priv->num_rx_queues > 1)
1055 priv->rx_filer_enable = 1;
1025 /* Enable most messages by default */ 1056 /* Enable most messages by default */
1026 priv->msg_enable = (NETIF_MSG_IFUP << 1 ) - 1; 1057 priv->msg_enable = (NETIF_MSG_IFUP << 1 ) - 1;
1027 1058
@@ -1937,7 +1968,8 @@ static int gfar_start_xmit(struct sk_buff *skb, struct net_device *dev)
1937 } 1968 }
1938 1969
1939 /* Update transmit stats */ 1970 /* Update transmit stats */
1940 dev->stats.tx_bytes += skb->len; 1971 txq->tx_bytes += skb->len;
1972 txq->tx_packets ++;
1941 1973
1942 txbdp = txbdp_start = tx_queue->cur_tx; 1974 txbdp = txbdp_start = tx_queue->cur_tx;
1943 1975
@@ -2295,8 +2327,6 @@ static int gfar_clean_tx_ring(struct gfar_priv_tx_q *tx_queue)
2295 tx_queue->skb_dirtytx = skb_dirtytx; 2327 tx_queue->skb_dirtytx = skb_dirtytx;
2296 tx_queue->dirty_tx = bdp; 2328 tx_queue->dirty_tx = bdp;
2297 2329
2298 dev->stats.tx_packets += howmany;
2299
2300 return howmany; 2330 return howmany;
2301} 2331}
2302 2332
@@ -2434,10 +2464,11 @@ static int gfar_process_frame(struct net_device *dev, struct sk_buff *skb,
2434 fcb = (struct rxfcb *)skb->data; 2464 fcb = (struct rxfcb *)skb->data;
2435 2465
2436 /* Remove the FCB from the skb */ 2466 /* Remove the FCB from the skb */
2437 skb_set_queue_mapping(skb, fcb->rq);
2438 /* Remove the padded bytes, if there are any */ 2467 /* Remove the padded bytes, if there are any */
2439 if (amount_pull) 2468 if (amount_pull) {
2469 skb_record_rx_queue(skb, fcb->rq);
2440 skb_pull(skb, amount_pull); 2470 skb_pull(skb, amount_pull);
2471 }
2441 2472
2442 if (priv->rx_csum_enable) 2473 if (priv->rx_csum_enable)
2443 gfar_rx_checksum(skb, fcb); 2474 gfar_rx_checksum(skb, fcb);
@@ -2510,22 +2541,22 @@ int gfar_clean_rx_ring(struct gfar_priv_rx_q *rx_queue, int rx_work_limit)
2510 } 2541 }
2511 } else { 2542 } else {
2512 /* Increment the number of packets */ 2543 /* Increment the number of packets */
2513 dev->stats.rx_packets++; 2544 rx_queue->stats.rx_packets++;
2514 howmany++; 2545 howmany++;
2515 2546
2516 if (likely(skb)) { 2547 if (likely(skb)) {
2517 pkt_len = bdp->length - ETH_FCS_LEN; 2548 pkt_len = bdp->length - ETH_FCS_LEN;
2518 /* Remove the FCS from the packet length */ 2549 /* Remove the FCS from the packet length */
2519 skb_put(skb, pkt_len); 2550 skb_put(skb, pkt_len);
2520 dev->stats.rx_bytes += pkt_len; 2551 rx_queue->stats.rx_bytes += pkt_len;
2521 2552 skb_record_rx_queue(skb, rx_queue->qindex);
2522 gfar_process_frame(dev, skb, amount_pull); 2553 gfar_process_frame(dev, skb, amount_pull);
2523 2554
2524 } else { 2555 } else {
2525 if (netif_msg_rx_err(priv)) 2556 if (netif_msg_rx_err(priv))
2526 printk(KERN_WARNING 2557 printk(KERN_WARNING
2527 "%s: Missing skb!\n", dev->name); 2558 "%s: Missing skb!\n", dev->name);
2528 dev->stats.rx_dropped++; 2559 rx_queue->stats.rx_dropped++;
2529 priv->extra_stats.rx_skbmissing++; 2560 priv->extra_stats.rx_skbmissing++;
2530 } 2561 }
2531 2562
diff --git a/drivers/net/gianfar.h b/drivers/net/gianfar.h
index cbb451011cb5..3d72dc43dca5 100644
--- a/drivers/net/gianfar.h
+++ b/drivers/net/gianfar.h
@@ -333,7 +333,7 @@ extern const char gfar_driver_version[];
333#define IMASK_BSY 0x20000000 333#define IMASK_BSY 0x20000000
334#define IMASK_EBERR 0x10000000 334#define IMASK_EBERR 0x10000000
335#define IMASK_MSRO 0x04000000 335#define IMASK_MSRO 0x04000000
336#define IMASK_GRSC 0x02000000 336#define IMASK_GTSC 0x02000000
337#define IMASK_BABT 0x01000000 337#define IMASK_BABT 0x01000000
338#define IMASK_TXC 0x00800000 338#define IMASK_TXC 0x00800000
339#define IMASK_TXEEN 0x00400000 339#define IMASK_TXEEN 0x00400000
@@ -344,7 +344,7 @@ extern const char gfar_driver_version[];
344#define IMASK_XFUN 0x00010000 344#define IMASK_XFUN 0x00010000
345#define IMASK_RXB0 0x00008000 345#define IMASK_RXB0 0x00008000
346#define IMASK_MAG 0x00000800 346#define IMASK_MAG 0x00000800
347#define IMASK_GTSC 0x00000100 347#define IMASK_GRSC 0x00000100
348#define IMASK_RXFEN0 0x00000080 348#define IMASK_RXFEN0 0x00000080
349#define IMASK_FIR 0x00000008 349#define IMASK_FIR 0x00000008
350#define IMASK_FIQ 0x00000004 350#define IMASK_FIQ 0x00000004
@@ -401,6 +401,10 @@ extern const char gfar_driver_version[];
401#define FPR_FILER_MASK 0xFFFFFFFF 401#define FPR_FILER_MASK 0xFFFFFFFF
402#define MAX_FILER_IDX 0xFF 402#define MAX_FILER_IDX 0xFF
403 403
404/* This default RIR value directly corresponds
405 * to the 3-bit hash value generated */
406#define DEFAULT_RIR0 0x05397700
407
404/* RQFCR register bits */ 408/* RQFCR register bits */
405#define RQFCR_GPI 0x80000000 409#define RQFCR_GPI 0x80000000
406#define RQFCR_HASHTBL_Q 0x00000000 410#define RQFCR_HASHTBL_Q 0x00000000
@@ -936,6 +940,15 @@ struct gfar_priv_tx_q {
936 unsigned short txtime; 940 unsigned short txtime;
937}; 941};
938 942
943/*
944 * Per RX queue stats
945 */
946struct rx_q_stats {
947 unsigned long rx_packets;
948 unsigned long rx_bytes;
949 unsigned long rx_dropped;
950};
951
939/** 952/**
940 * struct gfar_priv_rx_q - per rx queue structure 953 * struct gfar_priv_rx_q - per rx queue structure
941 * @rxlock: per queue rx spin lock 954 * @rxlock: per queue rx spin lock
@@ -958,6 +971,7 @@ struct gfar_priv_rx_q {
958 struct rxbd8 *cur_rx; 971 struct rxbd8 *cur_rx;
959 struct net_device *dev; 972 struct net_device *dev;
960 struct gfar_priv_grp *grp; 973 struct gfar_priv_grp *grp;
974 struct rx_q_stats stats;
961 u16 skb_currx; 975 u16 skb_currx;
962 u16 qindex; 976 u16 qindex;
963 unsigned int rx_ring_size; 977 unsigned int rx_ring_size;
diff --git a/drivers/net/hamradio/bpqether.c b/drivers/net/hamradio/bpqether.c
index ae5f11c8fc13..bdadf3e23c94 100644
--- a/drivers/net/hamradio/bpqether.c
+++ b/drivers/net/hamradio/bpqether.c
@@ -248,6 +248,7 @@ static netdev_tx_t bpq_xmit(struct sk_buff *skb, struct net_device *dev)
248{ 248{
249 unsigned char *ptr; 249 unsigned char *ptr;
250 struct bpqdev *bpq; 250 struct bpqdev *bpq;
251 struct net_device *orig_dev;
251 int size; 252 int size;
252 253
253 /* 254 /*
@@ -282,8 +283,9 @@ static netdev_tx_t bpq_xmit(struct sk_buff *skb, struct net_device *dev)
282 283
283 bpq = netdev_priv(dev); 284 bpq = netdev_priv(dev);
284 285
286 orig_dev = dev;
285 if ((dev = bpq_get_ether_dev(dev)) == NULL) { 287 if ((dev = bpq_get_ether_dev(dev)) == NULL) {
286 dev->stats.tx_dropped++; 288 orig_dev->stats.tx_dropped++;
287 kfree_skb(skb); 289 kfree_skb(skb);
288 return NETDEV_TX_OK; 290 return NETDEV_TX_OK;
289 } 291 }
diff --git a/drivers/net/ibmlana.c b/drivers/net/ibmlana.c
index 090a6d3af112..052c74091d91 100644
--- a/drivers/net/ibmlana.c
+++ b/drivers/net/ibmlana.c
@@ -87,6 +87,7 @@ History:
87#include <linux/module.h> 87#include <linux/module.h>
88#include <linux/netdevice.h> 88#include <linux/netdevice.h>
89#include <linux/etherdevice.h> 89#include <linux/etherdevice.h>
90#include <linux/if_ether.h>
90#include <linux/skbuff.h> 91#include <linux/skbuff.h>
91#include <linux/bitops.h> 92#include <linux/bitops.h>
92 93
@@ -988,7 +989,7 @@ static int __devinit ibmlana_init_one(struct device *kdev)
988 989
989 /* copy out MAC address */ 990 /* copy out MAC address */
990 991
991 for (z = 0; z < sizeof(dev->dev_addr); z++) 992 for (z = 0; z < ETH_ALEN; z++)
992 dev->dev_addr[z] = inb(dev->base_addr + MACADDRPROM + z); 993 dev->dev_addr[z] = inb(dev->base_addr + MACADDRPROM + z);
993 994
994 /* print config */ 995 /* print config */
diff --git a/drivers/net/igb/e1000_82575.c b/drivers/net/igb/e1000_82575.c
index e8e9e9194a88..c505b50d1fa3 100644
--- a/drivers/net/igb/e1000_82575.c
+++ b/drivers/net/igb/e1000_82575.c
@@ -1096,9 +1096,7 @@ static s32 igb_setup_serdes_link_82575(struct e1000_hw *hw)
1096 hw_dbg("Configuring Autoneg:PCS_LCTL=0x%08X\n", reg); 1096 hw_dbg("Configuring Autoneg:PCS_LCTL=0x%08X\n", reg);
1097 } else { 1097 } else {
1098 /* Set PCS register for forced link */ 1098 /* Set PCS register for forced link */
1099 reg |= E1000_PCS_LCTL_FSD | /* Force Speed */ 1099 reg |= E1000_PCS_LCTL_FSD; /* Force Speed */
1100 E1000_PCS_LCTL_FORCE_LINK | /* Force Link */
1101 E1000_PCS_LCTL_FLV_LINK_UP; /* Force link value up */
1102 1100
1103 hw_dbg("Configuring Forced Link:PCS_LCTL=0x%08X\n", reg); 1101 hw_dbg("Configuring Forced Link:PCS_LCTL=0x%08X\n", reg);
1104 } 1102 }
diff --git a/drivers/net/igb/e1000_phy.c b/drivers/net/igb/e1000_phy.c
index 5c9d73e9bb8d..3670a66401b8 100644
--- a/drivers/net/igb/e1000_phy.c
+++ b/drivers/net/igb/e1000_phy.c
@@ -457,15 +457,6 @@ s32 igb_copper_link_setup_82580(struct e1000_hw *hw)
457 phy_data |= I82580_CFG_ENABLE_DOWNSHIFT; 457 phy_data |= I82580_CFG_ENABLE_DOWNSHIFT;
458 458
459 ret_val = phy->ops.write_reg(hw, I82580_CFG_REG, phy_data); 459 ret_val = phy->ops.write_reg(hw, I82580_CFG_REG, phy_data);
460 if (ret_val)
461 goto out;
462
463 /* Set number of link attempts before downshift */
464 ret_val = phy->ops.read_reg(hw, I82580_CTRL_REG, &phy_data);
465 if (ret_val)
466 goto out;
467 phy_data &= ~I82580_CTRL_DOWNSHIFT_MASK;
468 ret_val = phy->ops.write_reg(hw, I82580_CTRL_REG, phy_data);
469 460
470out: 461out:
471 return ret_val; 462 return ret_val;
diff --git a/drivers/net/igb/igb_ethtool.c b/drivers/net/igb/igb_ethtool.c
index ac9d5272650d..f771a6c08777 100644
--- a/drivers/net/igb/igb_ethtool.c
+++ b/drivers/net/igb/igb_ethtool.c
@@ -1795,7 +1795,7 @@ static int igb_wol_exclusion(struct igb_adapter *adapter,
1795 /* dual port cards only support WoL on port A from now on 1795 /* dual port cards only support WoL on port A from now on
1796 * unless it was enabled in the eeprom for port B 1796 * unless it was enabled in the eeprom for port B
1797 * so exclude FUNC_1 ports from having WoL enabled */ 1797 * so exclude FUNC_1 ports from having WoL enabled */
1798 if (rd32(E1000_STATUS) & E1000_STATUS_FUNC_1 && 1798 if ((rd32(E1000_STATUS) & E1000_STATUS_FUNC_MASK) &&
1799 !adapter->eeprom_wol) { 1799 !adapter->eeprom_wol) {
1800 wol->supported = 0; 1800 wol->supported = 0;
1801 break; 1801 break;
diff --git a/drivers/net/igb/igb_main.c b/drivers/net/igb/igb_main.c
index 78963a0e128d..c881347cb26d 100644
--- a/drivers/net/igb/igb_main.c
+++ b/drivers/net/igb/igb_main.c
@@ -421,6 +421,8 @@ static void igb_assign_vector(struct igb_q_vector *q_vector, int msix_vector)
421 msixbm = E1000_EICR_RX_QUEUE0 << rx_queue; 421 msixbm = E1000_EICR_RX_QUEUE0 << rx_queue;
422 if (tx_queue > IGB_N0_QUEUE) 422 if (tx_queue > IGB_N0_QUEUE)
423 msixbm |= E1000_EICR_TX_QUEUE0 << tx_queue; 423 msixbm |= E1000_EICR_TX_QUEUE0 << tx_queue;
424 if (!adapter->msix_entries && msix_vector == 0)
425 msixbm |= E1000_EIMS_OTHER;
424 array_wr32(E1000_MSIXBM(0), msix_vector, msixbm); 426 array_wr32(E1000_MSIXBM(0), msix_vector, msixbm);
425 q_vector->eims_value = msixbm; 427 q_vector->eims_value = msixbm;
426 break; 428 break;
@@ -877,7 +879,6 @@ static int igb_request_irq(struct igb_adapter *adapter)
877{ 879{
878 struct net_device *netdev = adapter->netdev; 880 struct net_device *netdev = adapter->netdev;
879 struct pci_dev *pdev = adapter->pdev; 881 struct pci_dev *pdev = adapter->pdev;
880 struct e1000_hw *hw = &adapter->hw;
881 int err = 0; 882 int err = 0;
882 883
883 if (adapter->msix_entries) { 884 if (adapter->msix_entries) {
@@ -909,20 +910,7 @@ static int igb_request_irq(struct igb_adapter *adapter)
909 igb_setup_all_tx_resources(adapter); 910 igb_setup_all_tx_resources(adapter);
910 igb_setup_all_rx_resources(adapter); 911 igb_setup_all_rx_resources(adapter);
911 } else { 912 } else {
912 switch (hw->mac.type) { 913 igb_assign_vector(adapter->q_vector[0], 0);
913 case e1000_82575:
914 wr32(E1000_MSIXBM(0),
915 (E1000_EICR_RX_QUEUE0 |
916 E1000_EICR_TX_QUEUE0 |
917 E1000_EIMS_OTHER));
918 break;
919 case e1000_82580:
920 case e1000_82576:
921 wr32(E1000_IVAR0, E1000_IVAR_VALID);
922 break;
923 default:
924 break;
925 }
926 } 914 }
927 915
928 if (adapter->flags & IGB_FLAG_HAS_MSI) { 916 if (adapter->flags & IGB_FLAG_HAS_MSI) {
@@ -1140,6 +1128,8 @@ int igb_up(struct igb_adapter *adapter)
1140 } 1128 }
1141 if (adapter->msix_entries) 1129 if (adapter->msix_entries)
1142 igb_configure_msix(adapter); 1130 igb_configure_msix(adapter);
1131 else
1132 igb_assign_vector(adapter->q_vector[0], 0);
1143 1133
1144 /* Clear any pending interrupts. */ 1134 /* Clear any pending interrupts. */
1145 rd32(E1000_ICR); 1135 rd32(E1000_ICR);
@@ -1306,13 +1296,8 @@ void igb_reset(struct igb_adapter *adapter)
1306 hwm = min(((pba << 10) * 9 / 10), 1296 hwm = min(((pba << 10) * 9 / 10),
1307 ((pba << 10) - 2 * adapter->max_frame_size)); 1297 ((pba << 10) - 2 * adapter->max_frame_size));
1308 1298
1309 if (mac->type < e1000_82576) { 1299 fc->high_water = hwm & 0xFFF0; /* 16-byte granularity */
1310 fc->high_water = hwm & 0xFFF8; /* 8-byte granularity */ 1300 fc->low_water = fc->high_water - 16;
1311 fc->low_water = fc->high_water - 8;
1312 } else {
1313 fc->high_water = hwm & 0xFFF0; /* 16-byte granularity */
1314 fc->low_water = fc->high_water - 16;
1315 }
1316 fc->pause_time = 0xFFFF; 1301 fc->pause_time = 0xFFFF;
1317 fc->send_xon = 1; 1302 fc->send_xon = 1;
1318 fc->current_mode = fc->requested_mode; 1303 fc->current_mode = fc->requested_mode;
@@ -3427,7 +3412,7 @@ static inline int igb_tso_adv(struct igb_ring *tx_ring,
3427 iph->daddr, 0, 3412 iph->daddr, 0,
3428 IPPROTO_TCP, 3413 IPPROTO_TCP,
3429 0); 3414 0);
3430 } else if (skb_shinfo(skb)->gso_type == SKB_GSO_TCPV6) { 3415 } else if (skb_is_gso_v6(skb)) {
3431 ipv6_hdr(skb)->payload_len = 0; 3416 ipv6_hdr(skb)->payload_len = 0;
3432 tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr, 3417 tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
3433 &ipv6_hdr(skb)->daddr, 3418 &ipv6_hdr(skb)->daddr,
@@ -3589,6 +3574,7 @@ static inline int igb_tx_map_adv(struct igb_ring *tx_ring, struct sk_buff *skb,
3589 for (f = 0; f < skb_shinfo(skb)->nr_frags; f++) { 3574 for (f = 0; f < skb_shinfo(skb)->nr_frags; f++) {
3590 struct skb_frag_struct *frag; 3575 struct skb_frag_struct *frag;
3591 3576
3577 count++;
3592 i++; 3578 i++;
3593 if (i == tx_ring->count) 3579 if (i == tx_ring->count)
3594 i = 0; 3580 i = 0;
@@ -3610,7 +3596,6 @@ static inline int igb_tx_map_adv(struct igb_ring *tx_ring, struct sk_buff *skb,
3610 if (pci_dma_mapping_error(pdev, buffer_info->dma)) 3596 if (pci_dma_mapping_error(pdev, buffer_info->dma))
3611 goto dma_error; 3597 goto dma_error;
3612 3598
3613 count++;
3614 } 3599 }
3615 3600
3616 tx_ring->buffer_info[i].skb = skb; 3601 tx_ring->buffer_info[i].skb = skb;
diff --git a/drivers/net/igbvf/netdev.c b/drivers/net/igbvf/netdev.c
index e9dd95f136aa..2aa71a766c35 100644
--- a/drivers/net/igbvf/netdev.c
+++ b/drivers/net/igbvf/netdev.c
@@ -1963,7 +1963,7 @@ static int igbvf_tso(struct igbvf_adapter *adapter,
1963 iph->daddr, 0, 1963 iph->daddr, 0,
1964 IPPROTO_TCP, 1964 IPPROTO_TCP,
1965 0); 1965 0);
1966 } else if (skb_shinfo(skb)->gso_type == SKB_GSO_TCPV6) { 1966 } else if (skb_is_gso_v6(skb)) {
1967 ipv6_hdr(skb)->payload_len = 0; 1967 ipv6_hdr(skb)->payload_len = 0;
1968 tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr, 1968 tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
1969 &ipv6_hdr(skb)->daddr, 1969 &ipv6_hdr(skb)->daddr,
@@ -2117,6 +2117,7 @@ static inline int igbvf_tx_map_adv(struct igbvf_adapter *adapter,
2117 /* set time_stamp *before* dma to help avoid a possible race */ 2117 /* set time_stamp *before* dma to help avoid a possible race */
2118 buffer_info->time_stamp = jiffies; 2118 buffer_info->time_stamp = jiffies;
2119 buffer_info->next_to_watch = i; 2119 buffer_info->next_to_watch = i;
2120 buffer_info->mapped_as_page = false;
2120 buffer_info->dma = pci_map_single(pdev, skb->data, len, 2121 buffer_info->dma = pci_map_single(pdev, skb->data, len,
2121 PCI_DMA_TODEVICE); 2122 PCI_DMA_TODEVICE);
2122 if (pci_dma_mapping_error(pdev, buffer_info->dma)) 2123 if (pci_dma_mapping_error(pdev, buffer_info->dma))
@@ -2126,6 +2127,7 @@ static inline int igbvf_tx_map_adv(struct igbvf_adapter *adapter,
2126 for (f = 0; f < skb_shinfo(skb)->nr_frags; f++) { 2127 for (f = 0; f < skb_shinfo(skb)->nr_frags; f++) {
2127 struct skb_frag_struct *frag; 2128 struct skb_frag_struct *frag;
2128 2129
2130 count++;
2129 i++; 2131 i++;
2130 if (i == tx_ring->count) 2132 if (i == tx_ring->count)
2131 i = 0; 2133 i = 0;
@@ -2146,7 +2148,6 @@ static inline int igbvf_tx_map_adv(struct igbvf_adapter *adapter,
2146 PCI_DMA_TODEVICE); 2148 PCI_DMA_TODEVICE);
2147 if (pci_dma_mapping_error(pdev, buffer_info->dma)) 2149 if (pci_dma_mapping_error(pdev, buffer_info->dma))
2148 goto dma_error; 2150 goto dma_error;
2149 count++;
2150 } 2151 }
2151 2152
2152 tx_ring->buffer_info[i].skb = skb; 2153 tx_ring->buffer_info[i].skb = skb;
@@ -2163,14 +2164,14 @@ dma_error:
2163 buffer_info->length = 0; 2164 buffer_info->length = 0;
2164 buffer_info->next_to_watch = 0; 2165 buffer_info->next_to_watch = 0;
2165 buffer_info->mapped_as_page = false; 2166 buffer_info->mapped_as_page = false;
2166 count--; 2167 if (count)
2168 count--;
2167 2169
2168 /* clear timestamp and dma mappings for remaining portion of packet */ 2170 /* clear timestamp and dma mappings for remaining portion of packet */
2169 while (count >= 0) { 2171 while (count--) {
2170 count--; 2172 if (i==0)
2171 i--;
2172 if (i < 0)
2173 i += tx_ring->count; 2173 i += tx_ring->count;
2174 i--;
2174 buffer_info = &tx_ring->buffer_info[i]; 2175 buffer_info = &tx_ring->buffer_info[i];
2175 igbvf_put_txbuf(adapter, buffer_info); 2176 igbvf_put_txbuf(adapter, buffer_info);
2176 } 2177 }
@@ -2763,7 +2764,8 @@ static int __devinit igbvf_probe(struct pci_dev *pdev,
2763 err = hw->mac.ops.reset_hw(hw); 2764 err = hw->mac.ops.reset_hw(hw);
2764 if (err) { 2765 if (err) {
2765 dev_info(&pdev->dev, 2766 dev_info(&pdev->dev,
2766 "PF still in reset state, assigning new address\n"); 2767 "PF still in reset state, assigning new address."
2768 " Is the PF interface up?\n");
2767 random_ether_addr(hw->mac.addr); 2769 random_ether_addr(hw->mac.addr);
2768 } else { 2770 } else {
2769 err = hw->mac.ops.read_mac_addr(hw); 2771 err = hw->mac.ops.read_mac_addr(hw);
diff --git a/drivers/net/ixgb/ixgb_main.c b/drivers/net/ixgb/ixgb_main.c
index bcd0f01d5feb..593d1a4f217c 100644
--- a/drivers/net/ixgb/ixgb_main.c
+++ b/drivers/net/ixgb/ixgb_main.c
@@ -1363,13 +1363,13 @@ ixgb_tx_map(struct ixgb_adapter *adapter, struct sk_buff *skb,
1363dma_error: 1363dma_error:
1364 dev_err(&pdev->dev, "TX DMA map failed\n"); 1364 dev_err(&pdev->dev, "TX DMA map failed\n");
1365 buffer_info->dma = 0; 1365 buffer_info->dma = 0;
1366 count--; 1366 if (count)
1367
1368 while (count >= 0) {
1369 count--; 1367 count--;
1370 i--; 1368
1371 if (i < 0) 1369 while (count--) {
1370 if (i==0)
1372 i += tx_ring->count; 1371 i += tx_ring->count;
1372 i--;
1373 buffer_info = &tx_ring->buffer_info[i]; 1373 buffer_info = &tx_ring->buffer_info[i];
1374 ixgb_unmap_and_free_tx_resource(adapter, buffer_info); 1374 ixgb_unmap_and_free_tx_resource(adapter, buffer_info);
1375 } 1375 }
diff --git a/drivers/net/ixgbe/Makefile b/drivers/net/ixgbe/Makefile
index 21b41f42b61c..bfef0ebcba9a 100644
--- a/drivers/net/ixgbe/Makefile
+++ b/drivers/net/ixgbe/Makefile
@@ -1,7 +1,7 @@
1################################################################################ 1################################################################################
2# 2#
3# Intel 10 Gigabit PCI Express Linux driver 3# Intel 10 Gigabit PCI Express Linux driver
4# Copyright(c) 1999 - 2009 Intel Corporation. 4# Copyright(c) 1999 - 2010 Intel Corporation.
5# 5#
6# This program is free software; you can redistribute it and/or modify it 6# This program is free software; you can redistribute it and/or modify it
7# under the terms and conditions of the GNU General Public License, 7# under the terms and conditions of the GNU General Public License,
diff --git a/drivers/net/ixgbe/ixgbe.h b/drivers/net/ixgbe/ixgbe.h
index 8da8eb535084..303e7bd39b67 100644
--- a/drivers/net/ixgbe/ixgbe.h
+++ b/drivers/net/ixgbe/ixgbe.h
@@ -1,7 +1,7 @@
1/******************************************************************************* 1/*******************************************************************************
2 2
3 Intel 10 Gigabit PCI Express Linux driver 3 Intel 10 Gigabit PCI Express Linux driver
4 Copyright(c) 1999 - 2009 Intel Corporation. 4 Copyright(c) 1999 - 2010 Intel Corporation.
5 5
6 This program is free software; you can redistribute it and/or modify it 6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License, 7 under the terms and conditions of the GNU General Public License,
diff --git a/drivers/net/ixgbe/ixgbe_82598.c b/drivers/net/ixgbe/ixgbe_82598.c
index e2d5343f1275..35a06b47587b 100644
--- a/drivers/net/ixgbe/ixgbe_82598.c
+++ b/drivers/net/ixgbe/ixgbe_82598.c
@@ -1,7 +1,7 @@
1/******************************************************************************* 1/*******************************************************************************
2 2
3 Intel 10 Gigabit PCI Express Linux driver 3 Intel 10 Gigabit PCI Express Linux driver
4 Copyright(c) 1999 - 2009 Intel Corporation. 4 Copyright(c) 1999 - 2010 Intel Corporation.
5 5
6 This program is free software; you can redistribute it and/or modify it 6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License, 7 under the terms and conditions of the GNU General Public License,
@@ -357,12 +357,34 @@ static s32 ixgbe_fc_enable_82598(struct ixgbe_hw *hw, s32 packetbuf_num)
357 u32 fctrl_reg; 357 u32 fctrl_reg;
358 u32 rmcs_reg; 358 u32 rmcs_reg;
359 u32 reg; 359 u32 reg;
360 u32 link_speed = 0;
361 bool link_up;
360 362
361#ifdef CONFIG_DCB 363#ifdef CONFIG_DCB
362 if (hw->fc.requested_mode == ixgbe_fc_pfc) 364 if (hw->fc.requested_mode == ixgbe_fc_pfc)
363 goto out; 365 goto out;
364 366
365#endif /* CONFIG_DCB */ 367#endif /* CONFIG_DCB */
368 /*
369 * On 82598 having Rx FC on causes resets while doing 1G
370 * so if it's on turn it off once we know link_speed. For
371 * more details see 82598 Specification update.
372 */
373 hw->mac.ops.check_link(hw, &link_speed, &link_up, false);
374 if (link_up && link_speed == IXGBE_LINK_SPEED_1GB_FULL) {
375 switch (hw->fc.requested_mode) {
376 case ixgbe_fc_full:
377 hw->fc.requested_mode = ixgbe_fc_tx_pause;
378 break;
379 case ixgbe_fc_rx_pause:
380 hw->fc.requested_mode = ixgbe_fc_none;
381 break;
382 default:
383 /* no change */
384 break;
385 }
386 }
387
366 /* Negotiate the fc mode to use */ 388 /* Negotiate the fc mode to use */
367 ret_val = ixgbe_fc_autoneg(hw); 389 ret_val = ixgbe_fc_autoneg(hw);
368 if (ret_val) 390 if (ret_val)
@@ -510,6 +532,40 @@ static s32 ixgbe_start_mac_link_82598(struct ixgbe_hw *hw,
510} 532}
511 533
512/** 534/**
535 * ixgbe_validate_link_ready - Function looks for phy link
536 * @hw: pointer to hardware structure
537 *
538 * Function indicates success when phy link is available. If phy is not ready
539 * within 5 seconds of MAC indicating link, the function returns error.
540 **/
541static s32 ixgbe_validate_link_ready(struct ixgbe_hw *hw)
542{
543 u32 timeout;
544 u16 an_reg;
545
546 if (hw->device_id != IXGBE_DEV_ID_82598AT2)
547 return 0;
548
549 for (timeout = 0;
550 timeout < IXGBE_VALIDATE_LINK_READY_TIMEOUT; timeout++) {
551 hw->phy.ops.read_reg(hw, MDIO_STAT1, MDIO_MMD_AN, &an_reg);
552
553 if ((an_reg & MDIO_AN_STAT1_COMPLETE) &&
554 (an_reg & MDIO_STAT1_LSTATUS))
555 break;
556
557 msleep(100);
558 }
559
560 if (timeout == IXGBE_VALIDATE_LINK_READY_TIMEOUT) {
561 hw_dbg(hw, "Link was indicated but link is down\n");
562 return IXGBE_ERR_LINK_SETUP;
563 }
564
565 return 0;
566}
567
568/**
513 * ixgbe_check_mac_link_82598 - Get link/speed status 569 * ixgbe_check_mac_link_82598 - Get link/speed status
514 * @hw: pointer to hardware structure 570 * @hw: pointer to hardware structure
515 * @speed: pointer to link speed 571 * @speed: pointer to link speed
@@ -589,6 +645,10 @@ static s32 ixgbe_check_mac_link_82598(struct ixgbe_hw *hw,
589 else 645 else
590 *speed = IXGBE_LINK_SPEED_1GB_FULL; 646 *speed = IXGBE_LINK_SPEED_1GB_FULL;
591 647
648 if ((hw->device_id == IXGBE_DEV_ID_82598AT2) && (*link_up == true) &&
649 (ixgbe_validate_link_ready(hw) != 0))
650 *link_up = false;
651
592 /* if link is down, zero out the current_mode */ 652 /* if link is down, zero out the current_mode */
593 if (*link_up == false) { 653 if (*link_up == false) {
594 hw->fc.current_mode = ixgbe_fc_none; 654 hw->fc.current_mode = ixgbe_fc_none;
diff --git a/drivers/net/ixgbe/ixgbe_82599.c b/drivers/net/ixgbe/ixgbe_82599.c
index 538340527aa6..b49bd6b9feb7 100644
--- a/drivers/net/ixgbe/ixgbe_82599.c
+++ b/drivers/net/ixgbe/ixgbe_82599.c
@@ -1,7 +1,7 @@
1/******************************************************************************* 1/*******************************************************************************
2 2
3 Intel 10 Gigabit PCI Express Linux driver 3 Intel 10 Gigabit PCI Express Linux driver
4 Copyright(c) 1999 - 2009 Intel Corporation. 4 Copyright(c) 1999 - 2010 Intel Corporation.
5 5
6 This program is free software; you can redistribute it and/or modify it 6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License, 7 under the terms and conditions of the GNU General Public License,
diff --git a/drivers/net/ixgbe/ixgbe_common.c b/drivers/net/ixgbe/ixgbe_common.c
index 688b8ca5da32..21f158f79dd0 100644
--- a/drivers/net/ixgbe/ixgbe_common.c
+++ b/drivers/net/ixgbe/ixgbe_common.c
@@ -1,7 +1,7 @@
1/******************************************************************************* 1/*******************************************************************************
2 2
3 Intel 10 Gigabit PCI Express Linux driver 3 Intel 10 Gigabit PCI Express Linux driver
4 Copyright(c) 1999 - 2009 Intel Corporation. 4 Copyright(c) 1999 - 2010 Intel Corporation.
5 5
6 This program is free software; you can redistribute it and/or modify it 6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License, 7 under the terms and conditions of the GNU General Public License,
diff --git a/drivers/net/ixgbe/ixgbe_common.h b/drivers/net/ixgbe/ixgbe_common.h
index 27f3214bed2e..dfff0ffaa502 100644
--- a/drivers/net/ixgbe/ixgbe_common.h
+++ b/drivers/net/ixgbe/ixgbe_common.h
@@ -1,7 +1,7 @@
1/******************************************************************************* 1/*******************************************************************************
2 2
3 Intel 10 Gigabit PCI Express Linux driver 3 Intel 10 Gigabit PCI Express Linux driver
4 Copyright(c) 1999 - 2009 Intel Corporation. 4 Copyright(c) 1999 - 2010 Intel Corporation.
5 5
6 This program is free software; you can redistribute it and/or modify it 6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License, 7 under the terms and conditions of the GNU General Public License,
diff --git a/drivers/net/ixgbe/ixgbe_dcb.c b/drivers/net/ixgbe/ixgbe_dcb.c
index a1562287342f..9aea4f04bbd2 100644
--- a/drivers/net/ixgbe/ixgbe_dcb.c
+++ b/drivers/net/ixgbe/ixgbe_dcb.c
@@ -1,7 +1,7 @@
1/******************************************************************************* 1/*******************************************************************************
2 2
3 Intel 10 Gigabit PCI Express Linux driver 3 Intel 10 Gigabit PCI Express Linux driver
4 Copyright(c) 1999 - 2009 Intel Corporation. 4 Copyright(c) 1999 - 2010 Intel Corporation.
5 5
6 This program is free software; you can redistribute it and/or modify it 6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License, 7 under the terms and conditions of the GNU General Public License,
diff --git a/drivers/net/ixgbe/ixgbe_dcb.h b/drivers/net/ixgbe/ixgbe_dcb.h
index 64a9fa15c059..5caafd4afbc3 100644
--- a/drivers/net/ixgbe/ixgbe_dcb.h
+++ b/drivers/net/ixgbe/ixgbe_dcb.h
@@ -1,7 +1,7 @@
1/******************************************************************************* 1/*******************************************************************************
2 2
3 Intel 10 Gigabit PCI Express Linux driver 3 Intel 10 Gigabit PCI Express Linux driver
4 Copyright(c) 1999 - 2009 Intel Corporation. 4 Copyright(c) 1999 - 2010 Intel Corporation.
5 5
6 This program is free software; you can redistribute it and/or modify it 6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License, 7 under the terms and conditions of the GNU General Public License,
diff --git a/drivers/net/ixgbe/ixgbe_dcb_82598.c b/drivers/net/ixgbe/ixgbe_dcb_82598.c
index f30263898ebc..f0e9279d4669 100644
--- a/drivers/net/ixgbe/ixgbe_dcb_82598.c
+++ b/drivers/net/ixgbe/ixgbe_dcb_82598.c
@@ -1,7 +1,7 @@
1/******************************************************************************* 1/*******************************************************************************
2 2
3 Intel 10 Gigabit PCI Express Linux driver 3 Intel 10 Gigabit PCI Express Linux driver
4 Copyright(c) 1999 - 2009 Intel Corporation. 4 Copyright(c) 1999 - 2010 Intel Corporation.
5 5
6 This program is free software; you can redistribute it and/or modify it 6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License, 7 under the terms and conditions of the GNU General Public License,
diff --git a/drivers/net/ixgbe/ixgbe_dcb_82598.h b/drivers/net/ixgbe/ixgbe_dcb_82598.h
index ebbe53c352a7..cc728fa092e2 100644
--- a/drivers/net/ixgbe/ixgbe_dcb_82598.h
+++ b/drivers/net/ixgbe/ixgbe_dcb_82598.h
@@ -1,7 +1,7 @@
1/******************************************************************************* 1/*******************************************************************************
2 2
3 Intel 10 Gigabit PCI Express Linux driver 3 Intel 10 Gigabit PCI Express Linux driver
4 Copyright(c) 1999 - 2009 Intel Corporation. 4 Copyright(c) 1999 - 2010 Intel Corporation.
5 5
6 This program is free software; you can redistribute it and/or modify it 6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License, 7 under the terms and conditions of the GNU General Public License,
diff --git a/drivers/net/ixgbe/ixgbe_dcb_82599.c b/drivers/net/ixgbe/ixgbe_dcb_82599.c
index ec8a252636d3..4f7a26ab411e 100644
--- a/drivers/net/ixgbe/ixgbe_dcb_82599.c
+++ b/drivers/net/ixgbe/ixgbe_dcb_82599.c
@@ -1,7 +1,7 @@
1/******************************************************************************* 1/*******************************************************************************
2 2
3 Intel 10 Gigabit PCI Express Linux driver 3 Intel 10 Gigabit PCI Express Linux driver
4 Copyright(c) 1999 - 2009 Intel Corporation. 4 Copyright(c) 1999 - 2010 Intel Corporation.
5 5
6 This program is free software; you can redistribute it and/or modify it 6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License, 7 under the terms and conditions of the GNU General Public License,
diff --git a/drivers/net/ixgbe/ixgbe_dcb_82599.h b/drivers/net/ixgbe/ixgbe_dcb_82599.h
index 9e5e2827e4af..0f3f791e1e1d 100644
--- a/drivers/net/ixgbe/ixgbe_dcb_82599.h
+++ b/drivers/net/ixgbe/ixgbe_dcb_82599.h
@@ -1,7 +1,7 @@
1/******************************************************************************* 1/*******************************************************************************
2 2
3 Intel 10 Gigabit PCI Express Linux driver 3 Intel 10 Gigabit PCI Express Linux driver
4 Copyright(c) 1999 - 2009 Intel Corporation. 4 Copyright(c) 1999 - 2010 Intel Corporation.
5 5
6 This program is free software; you can redistribute it and/or modify it 6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License, 7 under the terms and conditions of the GNU General Public License,
diff --git a/drivers/net/ixgbe/ixgbe_dcb_nl.c b/drivers/net/ixgbe/ixgbe_dcb_nl.c
index 3c7a79a7d7c6..dd4883f642be 100644
--- a/drivers/net/ixgbe/ixgbe_dcb_nl.c
+++ b/drivers/net/ixgbe/ixgbe_dcb_nl.c
@@ -1,7 +1,7 @@
1/******************************************************************************* 1/*******************************************************************************
2 2
3 Intel 10 Gigabit PCI Express Linux driver 3 Intel 10 Gigabit PCI Express Linux driver
4 Copyright(c) 1999 - 2009 Intel Corporation. 4 Copyright(c) 1999 - 2010 Intel Corporation.
5 5
6 This program is free software; you can redistribute it and/or modify it 6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License, 7 under the terms and conditions of the GNU General Public License,
@@ -223,7 +223,7 @@ static void ixgbe_dcbnl_set_pg_bwg_cfg_tx(struct net_device *netdev, int bwg_id,
223 223
224 if (adapter->temp_dcb_cfg.bw_percentage[0][bwg_id] != 224 if (adapter->temp_dcb_cfg.bw_percentage[0][bwg_id] !=
225 adapter->dcb_cfg.bw_percentage[0][bwg_id]) { 225 adapter->dcb_cfg.bw_percentage[0][bwg_id]) {
226 adapter->dcb_set_bitmap |= BIT_PG_RX; 226 adapter->dcb_set_bitmap |= BIT_PG_TX;
227 adapter->dcb_set_bitmap |= BIT_RESETLINK; 227 adapter->dcb_set_bitmap |= BIT_RESETLINK;
228 } 228 }
229} 229}
@@ -341,6 +341,12 @@ static u8 ixgbe_dcbnl_set_all(struct net_device *netdev)
341 if (!adapter->dcb_set_bitmap) 341 if (!adapter->dcb_set_bitmap)
342 return DCB_NO_HW_CHG; 342 return DCB_NO_HW_CHG;
343 343
344 ret = ixgbe_copy_dcb_cfg(&adapter->temp_dcb_cfg, &adapter->dcb_cfg,
345 adapter->ring_feature[RING_F_DCB].indices);
346
347 if (ret)
348 return DCB_NO_HW_CHG;
349
344 /* 350 /*
345 * Only take down the adapter if the configuration change 351 * Only take down the adapter if the configuration change
346 * requires a reset. 352 * requires a reset.
@@ -359,14 +365,6 @@ static u8 ixgbe_dcbnl_set_all(struct net_device *netdev)
359 } 365 }
360 } 366 }
361 367
362 ret = ixgbe_copy_dcb_cfg(&adapter->temp_dcb_cfg, &adapter->dcb_cfg,
363 adapter->ring_feature[RING_F_DCB].indices);
364 if (ret) {
365 if (adapter->dcb_set_bitmap & BIT_RESETLINK)
366 clear_bit(__IXGBE_RESETTING, &adapter->state);
367 return DCB_NO_HW_CHG;
368 }
369
370 if (adapter->dcb_cfg.pfc_mode_enable) { 368 if (adapter->dcb_cfg.pfc_mode_enable) {
371 if ((adapter->hw.mac.type != ixgbe_mac_82598EB) && 369 if ((adapter->hw.mac.type != ixgbe_mac_82598EB) &&
372 (adapter->hw.fc.current_mode != ixgbe_fc_pfc)) 370 (adapter->hw.fc.current_mode != ixgbe_fc_pfc))
diff --git a/drivers/net/ixgbe/ixgbe_ethtool.c b/drivers/net/ixgbe/ixgbe_ethtool.c
index 0bd49d3b9f65..d77961fc75f9 100644
--- a/drivers/net/ixgbe/ixgbe_ethtool.c
+++ b/drivers/net/ixgbe/ixgbe_ethtool.c
@@ -1,7 +1,7 @@
1/******************************************************************************* 1/*******************************************************************************
2 2
3 Intel 10 Gigabit PCI Express Linux driver 3 Intel 10 Gigabit PCI Express Linux driver
4 Copyright(c) 1999 - 2009 Intel Corporation. 4 Copyright(c) 1999 - 2010 Intel Corporation.
5 5
6 This program is free software; you can redistribute it and/or modify it 6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License, 7 under the terms and conditions of the GNU General Public License,
diff --git a/drivers/net/ixgbe/ixgbe_fcoe.c b/drivers/net/ixgbe/ixgbe_fcoe.c
index da32a108a7b4..e9a20c88c155 100644
--- a/drivers/net/ixgbe/ixgbe_fcoe.c
+++ b/drivers/net/ixgbe/ixgbe_fcoe.c
@@ -1,7 +1,7 @@
1/******************************************************************************* 1/*******************************************************************************
2 2
3 Intel 10 Gigabit PCI Express Linux driver 3 Intel 10 Gigabit PCI Express Linux driver
4 Copyright(c) 1999 - 2009 Intel Corporation. 4 Copyright(c) 1999 - 2010 Intel Corporation.
5 5
6 This program is free software; you can redistribute it and/or modify it 6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License, 7 under the terms and conditions of the GNU General Public License,
diff --git a/drivers/net/ixgbe/ixgbe_fcoe.h b/drivers/net/ixgbe/ixgbe_fcoe.h
index de8ff53187da..abf4b2b3f252 100644
--- a/drivers/net/ixgbe/ixgbe_fcoe.h
+++ b/drivers/net/ixgbe/ixgbe_fcoe.h
@@ -1,7 +1,7 @@
1/******************************************************************************* 1/*******************************************************************************
2 2
3 Intel 10 Gigabit PCI Express Linux driver 3 Intel 10 Gigabit PCI Express Linux driver
4 Copyright(c) 1999 - 2009 Intel Corporation. 4 Copyright(c) 1999 - 2010 Intel Corporation.
5 5
6 This program is free software; you can redistribute it and/or modify it 6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License, 7 under the terms and conditions of the GNU General Public License,
diff --git a/drivers/net/ixgbe/ixgbe_main.c b/drivers/net/ixgbe/ixgbe_main.c
index 35ea8c93fd80..951b73cf5ca2 100644
--- a/drivers/net/ixgbe/ixgbe_main.c
+++ b/drivers/net/ixgbe/ixgbe_main.c
@@ -1,7 +1,7 @@
1/******************************************************************************* 1/*******************************************************************************
2 2
3 Intel 10 Gigabit PCI Express Linux driver 3 Intel 10 Gigabit PCI Express Linux driver
4 Copyright(c) 1999 - 2009 Intel Corporation. 4 Copyright(c) 1999 - 2010 Intel Corporation.
5 5
6 This program is free software; you can redistribute it and/or modify it 6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License, 7 under the terms and conditions of the GNU General Public License,
@@ -52,7 +52,7 @@ static const char ixgbe_driver_string[] =
52 52
53#define DRV_VERSION "2.0.44-k2" 53#define DRV_VERSION "2.0.44-k2"
54const char ixgbe_driver_version[] = DRV_VERSION; 54const char ixgbe_driver_version[] = DRV_VERSION;
55static char ixgbe_copyright[] = "Copyright (c) 1999-2009 Intel Corporation."; 55static char ixgbe_copyright[] = "Copyright (c) 1999-2010 Intel Corporation.";
56 56
57static const struct ixgbe_info *ixgbe_info_tbl[] = { 57static const struct ixgbe_info *ixgbe_info_tbl[] = {
58 [board_82598] = &ixgbe_82598_info, 58 [board_82598] = &ixgbe_82598_info,
@@ -262,10 +262,12 @@ static inline bool ixgbe_tx_is_paused(struct ixgbe_adapter *adapter,
262 int reg_idx = tx_ring->reg_idx; 262 int reg_idx = tx_ring->reg_idx;
263 int dcb_i = adapter->ring_feature[RING_F_DCB].indices; 263 int dcb_i = adapter->ring_feature[RING_F_DCB].indices;
264 264
265 if (adapter->hw.mac.type == ixgbe_mac_82598EB) { 265 switch (adapter->hw.mac.type) {
266 case ixgbe_mac_82598EB:
266 tc = reg_idx >> 2; 267 tc = reg_idx >> 2;
267 txoff = IXGBE_TFCS_TXOFF0; 268 txoff = IXGBE_TFCS_TXOFF0;
268 } else if (adapter->hw.mac.type == ixgbe_mac_82599EB) { 269 break;
270 case ixgbe_mac_82599EB:
269 tc = 0; 271 tc = 0;
270 txoff = IXGBE_TFCS_TXOFF; 272 txoff = IXGBE_TFCS_TXOFF;
271 if (dcb_i == 8) { 273 if (dcb_i == 8) {
@@ -284,6 +286,9 @@ static inline bool ixgbe_tx_is_paused(struct ixgbe_adapter *adapter,
284 tc += (reg_idx - 96) >> 4; 286 tc += (reg_idx - 96) >> 4;
285 } 287 }
286 } 288 }
289 break;
290 default:
291 tc = 0;
287 } 292 }
288 txoff <<= tc; 293 txoff <<= tc;
289 } 294 }
@@ -4373,6 +4378,11 @@ static int ixgbe_resume(struct pci_dev *pdev)
4373 4378
4374 pci_set_power_state(pdev, PCI_D0); 4379 pci_set_power_state(pdev, PCI_D0);
4375 pci_restore_state(pdev); 4380 pci_restore_state(pdev);
4381 /*
4382 * pci_restore_state clears dev->state_saved so call
4383 * pci_save_state to restore it.
4384 */
4385 pci_save_state(pdev);
4376 4386
4377 err = pci_enable_device_mem(pdev); 4387 err = pci_enable_device_mem(pdev);
4378 if (err) { 4388 if (err) {
@@ -4511,6 +4521,7 @@ void ixgbe_update_stats(struct ixgbe_adapter *adapter)
4511 struct ixgbe_hw *hw = &adapter->hw; 4521 struct ixgbe_hw *hw = &adapter->hw;
4512 u64 total_mpc = 0; 4522 u64 total_mpc = 0;
4513 u32 i, missed_rx = 0, mpc, bprc, lxon, lxoff, xon_off_tot; 4523 u32 i, missed_rx = 0, mpc, bprc, lxon, lxoff, xon_off_tot;
4524 u64 non_eop_descs = 0, restart_queue = 0;
4514 4525
4515 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED) { 4526 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED) {
4516 u64 rsc_count = 0; 4527 u64 rsc_count = 0;
@@ -4528,10 +4539,12 @@ void ixgbe_update_stats(struct ixgbe_adapter *adapter)
4528 4539
4529 /* gather some stats to the adapter struct that are per queue */ 4540 /* gather some stats to the adapter struct that are per queue */
4530 for (i = 0; i < adapter->num_tx_queues; i++) 4541 for (i = 0; i < adapter->num_tx_queues; i++)
4531 adapter->restart_queue += adapter->tx_ring[i].restart_queue; 4542 restart_queue += adapter->tx_ring[i].restart_queue;
4543 adapter->restart_queue = restart_queue;
4532 4544
4533 for (i = 0; i < adapter->num_rx_queues; i++) 4545 for (i = 0; i < adapter->num_rx_queues; i++)
4534 adapter->non_eop_descs += adapter->tx_ring[i].non_eop_descs; 4546 non_eop_descs += adapter->rx_ring[i].non_eop_descs;
4547 adapter->non_eop_descs = non_eop_descs;
4535 4548
4536 adapter->stats.crcerrs += IXGBE_READ_REG(hw, IXGBE_CRCERRS); 4549 adapter->stats.crcerrs += IXGBE_READ_REG(hw, IXGBE_CRCERRS);
4537 for (i = 0; i < 8; i++) { 4550 for (i = 0; i < 8; i++) {
@@ -4915,7 +4928,7 @@ static int ixgbe_tso(struct ixgbe_adapter *adapter,
4915 iph->daddr, 0, 4928 iph->daddr, 0,
4916 IPPROTO_TCP, 4929 IPPROTO_TCP,
4917 0); 4930 0);
4918 } else if (skb_shinfo(skb)->gso_type == SKB_GSO_TCPV6) { 4931 } else if (skb_is_gso_v6(skb)) {
4919 ipv6_hdr(skb)->payload_len = 0; 4932 ipv6_hdr(skb)->payload_len = 0;
4920 tcp_hdr(skb)->check = 4933 tcp_hdr(skb)->check =
4921 ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr, 4934 ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
@@ -5003,7 +5016,18 @@ static bool ixgbe_tx_csum(struct ixgbe_adapter *adapter,
5003 IXGBE_ADVTXD_DTYP_CTXT); 5016 IXGBE_ADVTXD_DTYP_CTXT);
5004 5017
5005 if (skb->ip_summed == CHECKSUM_PARTIAL) { 5018 if (skb->ip_summed == CHECKSUM_PARTIAL) {
5006 switch (skb->protocol) { 5019 __be16 protocol;
5020
5021 if (skb->protocol == cpu_to_be16(ETH_P_8021Q)) {
5022 const struct vlan_ethhdr *vhdr =
5023 (const struct vlan_ethhdr *)skb->data;
5024
5025 protocol = vhdr->h_vlan_encapsulated_proto;
5026 } else {
5027 protocol = skb->protocol;
5028 }
5029
5030 switch (protocol) {
5007 case cpu_to_be16(ETH_P_IP): 5031 case cpu_to_be16(ETH_P_IP):
5008 type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_IPV4; 5032 type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_IPV4;
5009 if (ip_hdr(skb)->protocol == IPPROTO_TCP) 5033 if (ip_hdr(skb)->protocol == IPPROTO_TCP)
@@ -5143,19 +5167,19 @@ dma_error:
5143 tx_buffer_info->dma = 0; 5167 tx_buffer_info->dma = 0;
5144 tx_buffer_info->time_stamp = 0; 5168 tx_buffer_info->time_stamp = 0;
5145 tx_buffer_info->next_to_watch = 0; 5169 tx_buffer_info->next_to_watch = 0;
5146 count--; 5170 if (count)
5171 count--;
5147 5172
5148 /* clear timestamp and dma mappings for remaining portion of packet */ 5173 /* clear timestamp and dma mappings for remaining portion of packet */
5149 while (count >= 0) { 5174 while (count--) {
5150 count--; 5175 if (i==0)
5151 i--;
5152 if (i < 0)
5153 i += tx_ring->count; 5176 i += tx_ring->count;
5177 i--;
5154 tx_buffer_info = &tx_ring->tx_buffer_info[i]; 5178 tx_buffer_info = &tx_ring->tx_buffer_info[i];
5155 ixgbe_unmap_and_free_tx_resource(adapter, tx_buffer_info); 5179 ixgbe_unmap_and_free_tx_resource(adapter, tx_buffer_info);
5156 } 5180 }
5157 5181
5158 return count; 5182 return 0;
5159} 5183}
5160 5184
5161static void ixgbe_tx_queue(struct ixgbe_adapter *adapter, 5185static void ixgbe_tx_queue(struct ixgbe_adapter *adapter,
@@ -5305,8 +5329,11 @@ static u16 ixgbe_select_queue(struct net_device *dev, struct sk_buff *skb)
5305 struct ixgbe_adapter *adapter = netdev_priv(dev); 5329 struct ixgbe_adapter *adapter = netdev_priv(dev);
5306 int txq = smp_processor_id(); 5330 int txq = smp_processor_id();
5307 5331
5308 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) 5332 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
5333 while (unlikely(txq >= dev->real_num_tx_queues))
5334 txq -= dev->real_num_tx_queues;
5309 return txq; 5335 return txq;
5336 }
5310 5337
5311#ifdef IXGBE_FCOE 5338#ifdef IXGBE_FCOE
5312 if ((adapter->flags & IXGBE_FLAG_FCOE_ENABLED) && 5339 if ((adapter->flags & IXGBE_FLAG_FCOE_ENABLED) &&
@@ -5552,6 +5579,10 @@ static void ixgbe_netpoll(struct net_device *netdev)
5552 struct ixgbe_adapter *adapter = netdev_priv(netdev); 5579 struct ixgbe_adapter *adapter = netdev_priv(netdev);
5553 int i; 5580 int i;
5554 5581
5582 /* if interface is down do nothing */
5583 if (test_bit(__IXGBE_DOWN, &adapter->state))
5584 return;
5585
5555 adapter->flags |= IXGBE_FLAG_IN_NETPOLL; 5586 adapter->flags |= IXGBE_FLAG_IN_NETPOLL;
5556 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) { 5587 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
5557 int num_q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS; 5588 int num_q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
@@ -5732,6 +5763,10 @@ static int __devinit ixgbe_probe(struct pci_dev *pdev,
5732 if (err) 5763 if (err)
5733 goto err_sw_init; 5764 goto err_sw_init;
5734 5765
5766 /* Make it possible the adapter to be woken up via WOL */
5767 if (adapter->hw.mac.type == ixgbe_mac_82599EB)
5768 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
5769
5735 /* 5770 /*
5736 * If there is a fan on this device and it has failed log the 5771 * If there is a fan on this device and it has failed log the
5737 * failure. 5772 * failure.
diff --git a/drivers/net/ixgbe/ixgbe_phy.c b/drivers/net/ixgbe/ixgbe_phy.c
index 9ecad17522c3..1c1efd386956 100644
--- a/drivers/net/ixgbe/ixgbe_phy.c
+++ b/drivers/net/ixgbe/ixgbe_phy.c
@@ -1,7 +1,7 @@
1/******************************************************************************* 1/*******************************************************************************
2 2
3 Intel 10 Gigabit PCI Express Linux driver 3 Intel 10 Gigabit PCI Express Linux driver
4 Copyright(c) 1999 - 2009 Intel Corporation. 4 Copyright(c) 1999 - 2010 Intel Corporation.
5 5
6 This program is free software; you can redistribute it and/or modify it 6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License, 7 under the terms and conditions of the GNU General Public License,
diff --git a/drivers/net/ixgbe/ixgbe_phy.h b/drivers/net/ixgbe/ixgbe_phy.h
index 9b700f5bf1ed..9cf5f3b4cc5d 100644
--- a/drivers/net/ixgbe/ixgbe_phy.h
+++ b/drivers/net/ixgbe/ixgbe_phy.h
@@ -1,7 +1,7 @@
1/******************************************************************************* 1/*******************************************************************************
2 2
3 Intel 10 Gigabit PCI Express Linux driver 3 Intel 10 Gigabit PCI Express Linux driver
4 Copyright(c) 1999 - 2009 Intel Corporation. 4 Copyright(c) 1999 - 2010 Intel Corporation.
5 5
6 This program is free software; you can redistribute it and/or modify it 6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License, 7 under the terms and conditions of the GNU General Public License,
diff --git a/drivers/net/ixgbe/ixgbe_type.h b/drivers/net/ixgbe/ixgbe_type.h
index f3e8d52610b7..9eafddfa1b97 100644
--- a/drivers/net/ixgbe/ixgbe_type.h
+++ b/drivers/net/ixgbe/ixgbe_type.h
@@ -1,7 +1,7 @@
1/******************************************************************************* 1/*******************************************************************************
2 2
3 Intel 10 Gigabit PCI Express Linux driver 3 Intel 10 Gigabit PCI Express Linux driver
4 Copyright(c) 1999 - 2009 Intel Corporation. 4 Copyright(c) 1999 - 2010 Intel Corporation.
5 5
6 This program is free software; you can redistribute it and/or modify it 6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License, 7 under the terms and conditions of the GNU General Public License,
@@ -841,6 +841,8 @@
841#define IXGBE_MPVC 0x04318 841#define IXGBE_MPVC 0x04318
842#define IXGBE_SGMIIC 0x04314 842#define IXGBE_SGMIIC 0x04314
843 843
844#define IXGBE_VALIDATE_LINK_READY_TIMEOUT 50
845
844/* Omer CORECTL */ 846/* Omer CORECTL */
845#define IXGBE_CORECTL 0x014F00 847#define IXGBE_CORECTL 0x014F00
846/* BARCTRL */ 848/* BARCTRL */
diff --git a/drivers/net/ks8851_mll.c b/drivers/net/ks8851_mll.c
index c146304d8d6c..c0ceebccaa49 100644
--- a/drivers/net/ks8851_mll.c
+++ b/drivers/net/ks8851_mll.c
@@ -854,8 +854,8 @@ static void ks_update_link_status(struct net_device *netdev, struct ks_net *ks)
854 854
855static irqreturn_t ks_irq(int irq, void *pw) 855static irqreturn_t ks_irq(int irq, void *pw)
856{ 856{
857 struct ks_net *ks = pw; 857 struct net_device *netdev = pw;
858 struct net_device *netdev = ks->netdev; 858 struct ks_net *ks = netdev_priv(netdev);
859 u16 status; 859 u16 status;
860 860
861 /*this should be the first in IRQ handler */ 861 /*this should be the first in IRQ handler */
diff --git a/drivers/net/ll_temac_main.c b/drivers/net/ll_temac_main.c
index 336e7c7a9275..a8522bd73ae7 100644
--- a/drivers/net/ll_temac_main.c
+++ b/drivers/net/ll_temac_main.c
@@ -134,7 +134,7 @@ static int temac_dma_bd_init(struct net_device *ndev)
134 struct sk_buff *skb; 134 struct sk_buff *skb;
135 int i; 135 int i;
136 136
137 lp->rx_skb = kzalloc(sizeof(struct sk_buff)*RX_BD_NUM, GFP_KERNEL); 137 lp->rx_skb = kzalloc(sizeof(*lp->rx_skb) * RX_BD_NUM, GFP_KERNEL);
138 /* allocate the tx and rx ring buffer descriptors. */ 138 /* allocate the tx and rx ring buffer descriptors. */
139 /* returns a virtual addres and a physical address. */ 139 /* returns a virtual addres and a physical address. */
140 lp->tx_bd_v = dma_alloc_coherent(ndev->dev.parent, 140 lp->tx_bd_v = dma_alloc_coherent(ndev->dev.parent,
diff --git a/drivers/net/mlx4/fw.c b/drivers/net/mlx4/fw.c
index 3c16602172fc..04f42ae1eda0 100644
--- a/drivers/net/mlx4/fw.c
+++ b/drivers/net/mlx4/fw.c
@@ -90,6 +90,7 @@ static void dump_dev_cap_flags(struct mlx4_dev *dev, u32 flags)
90 [ 9] = "Q_Key violation counter", 90 [ 9] = "Q_Key violation counter",
91 [10] = "VMM", 91 [10] = "VMM",
92 [12] = "DPDP", 92 [12] = "DPDP",
93 [15] = "Big LSO headers",
93 [16] = "MW support", 94 [16] = "MW support",
94 [17] = "APM support", 95 [17] = "APM support",
95 [18] = "Atomic ops support", 96 [18] = "Atomic ops support",
@@ -235,7 +236,7 @@ int mlx4_QUERY_DEV_CAP(struct mlx4_dev *dev, struct mlx4_dev_cap *dev_cap)
235 MLX4_GET(field, outbox, QUERY_DEV_CAP_MAX_MPT_OFFSET); 236 MLX4_GET(field, outbox, QUERY_DEV_CAP_MAX_MPT_OFFSET);
236 dev_cap->max_mpts = 1 << (field & 0x3f); 237 dev_cap->max_mpts = 1 << (field & 0x3f);
237 MLX4_GET(field, outbox, QUERY_DEV_CAP_RSVD_EQ_OFFSET); 238 MLX4_GET(field, outbox, QUERY_DEV_CAP_RSVD_EQ_OFFSET);
238 dev_cap->reserved_eqs = 1 << (field & 0xf); 239 dev_cap->reserved_eqs = field & 0xf;
239 MLX4_GET(field, outbox, QUERY_DEV_CAP_MAX_EQ_OFFSET); 240 MLX4_GET(field, outbox, QUERY_DEV_CAP_MAX_EQ_OFFSET);
240 dev_cap->max_eqs = 1 << (field & 0xf); 241 dev_cap->max_eqs = 1 << (field & 0xf);
241 MLX4_GET(field, outbox, QUERY_DEV_CAP_RSVD_MTT_OFFSET); 242 MLX4_GET(field, outbox, QUERY_DEV_CAP_RSVD_MTT_OFFSET);
diff --git a/drivers/net/mlx4/main.c b/drivers/net/mlx4/main.c
index 291a505fd4fc..3cf56d90d859 100644
--- a/drivers/net/mlx4/main.c
+++ b/drivers/net/mlx4/main.c
@@ -1174,7 +1174,7 @@ static int __mlx4_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
1174 return 0; 1174 return 0;
1175 1175
1176err_port: 1176err_port:
1177 for (port = 1; port <= dev->caps.num_ports; port++) 1177 for (--port; port >= 1; --port)
1178 mlx4_cleanup_port_info(&priv->port[port]); 1178 mlx4_cleanup_port_info(&priv->port[port]);
1179 1179
1180 mlx4_cleanup_mcg_table(dev); 1180 mlx4_cleanup_mcg_table(dev);
diff --git a/drivers/net/mlx4/sense.c b/drivers/net/mlx4/sense.c
index f36ae691cab3..015fbe785c13 100644
--- a/drivers/net/mlx4/sense.c
+++ b/drivers/net/mlx4/sense.c
@@ -53,7 +53,7 @@ static int mlx4_SENSE_PORT(struct mlx4_dev *dev, int port,
53 53
54 if (out_param > 2) { 54 if (out_param > 2) {
55 mlx4_err(dev, "Sense returned illegal value: 0x%llx\n", out_param); 55 mlx4_err(dev, "Sense returned illegal value: 0x%llx\n", out_param);
56 return EINVAL; 56 return -EINVAL;
57 } 57 }
58 58
59 *type = out_param; 59 *type = out_param;
diff --git a/drivers/net/mv643xx_eth.c b/drivers/net/mv643xx_eth.c
index 1405a170bb43..af67af55efe7 100644
--- a/drivers/net/mv643xx_eth.c
+++ b/drivers/net/mv643xx_eth.c
@@ -656,6 +656,7 @@ static int rxq_refill(struct rx_queue *rxq, int budget)
656 struct sk_buff *skb; 656 struct sk_buff *skb;
657 int rx; 657 int rx;
658 struct rx_desc *rx_desc; 658 struct rx_desc *rx_desc;
659 int size;
659 660
660 skb = __skb_dequeue(&mp->rx_recycle); 661 skb = __skb_dequeue(&mp->rx_recycle);
661 if (skb == NULL) 662 if (skb == NULL)
@@ -678,10 +679,11 @@ static int rxq_refill(struct rx_queue *rxq, int budget)
678 679
679 rx_desc = rxq->rx_desc_area + rx; 680 rx_desc = rxq->rx_desc_area + rx;
680 681
682 size = skb->end - skb->data;
681 rx_desc->buf_ptr = dma_map_single(mp->dev->dev.parent, 683 rx_desc->buf_ptr = dma_map_single(mp->dev->dev.parent,
682 skb->data, mp->skb_size, 684 skb->data, size,
683 DMA_FROM_DEVICE); 685 DMA_FROM_DEVICE);
684 rx_desc->buf_size = mp->skb_size; 686 rx_desc->buf_size = size;
685 rxq->rx_skb[rx] = skb; 687 rxq->rx_skb[rx] = skb;
686 wmb(); 688 wmb();
687 rx_desc->cmd_sts = BUFFER_OWNED_BY_DMA | RX_ENABLE_INTERRUPT; 689 rx_desc->cmd_sts = BUFFER_OWNED_BY_DMA | RX_ENABLE_INTERRUPT;
diff --git a/drivers/net/netxen/netxen_nic.h b/drivers/net/netxen/netxen_nic.h
index 76cd1f3e9fc8..9bc5bd1d538a 100644
--- a/drivers/net/netxen/netxen_nic.h
+++ b/drivers/net/netxen/netxen_nic.h
@@ -53,8 +53,8 @@
53 53
54#define _NETXEN_NIC_LINUX_MAJOR 4 54#define _NETXEN_NIC_LINUX_MAJOR 4
55#define _NETXEN_NIC_LINUX_MINOR 0 55#define _NETXEN_NIC_LINUX_MINOR 0
56#define _NETXEN_NIC_LINUX_SUBVERSION 65 56#define _NETXEN_NIC_LINUX_SUBVERSION 72
57#define NETXEN_NIC_LINUX_VERSIONID "4.0.65" 57#define NETXEN_NIC_LINUX_VERSIONID "4.0.72"
58 58
59#define NETXEN_VERSION_CODE(a, b, c) (((a) << 24) + ((b) << 16) + (c)) 59#define NETXEN_VERSION_CODE(a, b, c) (((a) << 24) + ((b) << 16) + (c))
60#define _major(v) (((v) >> 24) & 0xff) 60#define _major(v) (((v) >> 24) & 0xff)
diff --git a/drivers/net/netxen/netxen_nic_ethtool.c b/drivers/net/netxen/netxen_nic_ethtool.c
index ddd704ae0188..542f408333ff 100644
--- a/drivers/net/netxen/netxen_nic_ethtool.c
+++ b/drivers/net/netxen/netxen_nic_ethtool.c
@@ -66,7 +66,7 @@ static const char netxen_nic_gstrings_test[][ETH_GSTRING_LEN] = {
66 66
67#define NETXEN_NIC_TEST_LEN ARRAY_SIZE(netxen_nic_gstrings_test) 67#define NETXEN_NIC_TEST_LEN ARRAY_SIZE(netxen_nic_gstrings_test)
68 68
69#define NETXEN_NIC_REGS_COUNT 42 69#define NETXEN_NIC_REGS_COUNT 30
70#define NETXEN_NIC_REGS_LEN (NETXEN_NIC_REGS_COUNT * sizeof(__le32)) 70#define NETXEN_NIC_REGS_LEN (NETXEN_NIC_REGS_COUNT * sizeof(__le32))
71#define NETXEN_MAX_EEPROM_LEN 1024 71#define NETXEN_MAX_EEPROM_LEN 1024
72 72
@@ -312,150 +312,91 @@ static int netxen_nic_get_regs_len(struct net_device *dev)
312 return NETXEN_NIC_REGS_LEN; 312 return NETXEN_NIC_REGS_LEN;
313} 313}
314 314
315struct netxen_niu_regs {
316 __u32 reg[NETXEN_NIC_REGS_COUNT];
317};
318
319static struct netxen_niu_regs niu_registers[] = {
320 {
321 /* GB Mode */
322 {
323 NETXEN_NIU_GB_SERDES_RESET,
324 NETXEN_NIU_GB0_MII_MODE,
325 NETXEN_NIU_GB1_MII_MODE,
326 NETXEN_NIU_GB2_MII_MODE,
327 NETXEN_NIU_GB3_MII_MODE,
328 NETXEN_NIU_GB0_GMII_MODE,
329 NETXEN_NIU_GB1_GMII_MODE,
330 NETXEN_NIU_GB2_GMII_MODE,
331 NETXEN_NIU_GB3_GMII_MODE,
332 NETXEN_NIU_REMOTE_LOOPBACK,
333 NETXEN_NIU_GB0_HALF_DUPLEX,
334 NETXEN_NIU_GB1_HALF_DUPLEX,
335 NETXEN_NIU_RESET_SYS_FIFOS,
336 NETXEN_NIU_GB_CRC_DROP,
337 NETXEN_NIU_GB_DROP_WRONGADDR,
338 NETXEN_NIU_TEST_MUX_CTL,
339
340 NETXEN_NIU_GB_MAC_CONFIG_0(0),
341 NETXEN_NIU_GB_MAC_CONFIG_1(0),
342 NETXEN_NIU_GB_HALF_DUPLEX_CTRL(0),
343 NETXEN_NIU_GB_MAX_FRAME_SIZE(0),
344 NETXEN_NIU_GB_TEST_REG(0),
345 NETXEN_NIU_GB_MII_MGMT_CONFIG(0),
346 NETXEN_NIU_GB_MII_MGMT_COMMAND(0),
347 NETXEN_NIU_GB_MII_MGMT_ADDR(0),
348 NETXEN_NIU_GB_MII_MGMT_CTRL(0),
349 NETXEN_NIU_GB_MII_MGMT_STATUS(0),
350 NETXEN_NIU_GB_MII_MGMT_INDICATE(0),
351 NETXEN_NIU_GB_INTERFACE_CTRL(0),
352 NETXEN_NIU_GB_INTERFACE_STATUS(0),
353 NETXEN_NIU_GB_STATION_ADDR_0(0),
354 NETXEN_NIU_GB_STATION_ADDR_1(0),
355 -1,
356 }
357 },
358 {
359 /* XG Mode */
360 {
361 NETXEN_NIU_XG_SINGLE_TERM,
362 NETXEN_NIU_XG_DRIVE_HI,
363 NETXEN_NIU_XG_DRIVE_LO,
364 NETXEN_NIU_XG_DTX,
365 NETXEN_NIU_XG_DEQ,
366 NETXEN_NIU_XG_WORD_ALIGN,
367 NETXEN_NIU_XG_RESET,
368 NETXEN_NIU_XG_POWER_DOWN,
369 NETXEN_NIU_XG_RESET_PLL,
370 NETXEN_NIU_XG_SERDES_LOOPBACK,
371 NETXEN_NIU_XG_DO_BYTE_ALIGN,
372 NETXEN_NIU_XG_TX_ENABLE,
373 NETXEN_NIU_XG_RX_ENABLE,
374 NETXEN_NIU_XG_STATUS,
375 NETXEN_NIU_XG_PAUSE_THRESHOLD,
376 NETXEN_NIU_XGE_CONFIG_0,
377 NETXEN_NIU_XGE_CONFIG_1,
378 NETXEN_NIU_XGE_IPG,
379 NETXEN_NIU_XGE_STATION_ADDR_0_HI,
380 NETXEN_NIU_XGE_STATION_ADDR_0_1,
381 NETXEN_NIU_XGE_STATION_ADDR_1_LO,
382 NETXEN_NIU_XGE_STATUS,
383 NETXEN_NIU_XGE_MAX_FRAME_SIZE,
384 NETXEN_NIU_XGE_PAUSE_FRAME_VALUE,
385 NETXEN_NIU_XGE_TX_BYTE_CNT,
386 NETXEN_NIU_XGE_TX_FRAME_CNT,
387 NETXEN_NIU_XGE_RX_BYTE_CNT,
388 NETXEN_NIU_XGE_RX_FRAME_CNT,
389 NETXEN_NIU_XGE_AGGR_ERROR_CNT,
390 NETXEN_NIU_XGE_MULTICAST_FRAME_CNT,
391 NETXEN_NIU_XGE_UNICAST_FRAME_CNT,
392 NETXEN_NIU_XGE_CRC_ERROR_CNT,
393 NETXEN_NIU_XGE_OVERSIZE_FRAME_ERR,
394 NETXEN_NIU_XGE_UNDERSIZE_FRAME_ERR,
395 NETXEN_NIU_XGE_LOCAL_ERROR_CNT,
396 NETXEN_NIU_XGE_REMOTE_ERROR_CNT,
397 NETXEN_NIU_XGE_CONTROL_CHAR_CNT,
398 NETXEN_NIU_XGE_PAUSE_FRAME_CNT,
399 -1,
400 }
401 }
402};
403
404static void 315static void
405netxen_nic_get_regs(struct net_device *dev, struct ethtool_regs *regs, void *p) 316netxen_nic_get_regs(struct net_device *dev, struct ethtool_regs *regs, void *p)
406{ 317{
407 struct netxen_adapter *adapter = netdev_priv(dev); 318 struct netxen_adapter *adapter = netdev_priv(dev);
408 __u32 mode, *regs_buff = p; 319 struct netxen_recv_context *recv_ctx = &adapter->recv_ctx;
409 int i, window; 320 struct nx_host_sds_ring *sds_ring;
321 u32 *regs_buff = p;
322 int ring, i = 0;
323 int port = adapter->physical_port;
410 324
411 memset(p, 0, NETXEN_NIC_REGS_LEN); 325 memset(p, 0, NETXEN_NIC_REGS_LEN);
326
412 regs->version = (1 << 24) | (adapter->ahw.revision_id << 16) | 327 regs->version = (1 << 24) | (adapter->ahw.revision_id << 16) |
413 (adapter->pdev)->device; 328 (adapter->pdev)->device;
414 /* which mode */
415 regs_buff[0] = NXRD32(adapter, NETXEN_NIU_MODE);
416 mode = regs_buff[0];
417
418 /* Common registers to all the modes */
419 regs_buff[2] = NXRD32(adapter, NETXEN_NIU_STRAP_VALUE_SAVE_HIGHER);
420 /* GB/XGB Mode */
421 mode = (mode / 2) - 1;
422 window = 0;
423 if (mode <= 1) {
424 for (i = 3; niu_registers[mode].reg[i - 3] != -1; i++) {
425 /* GB: port specific registers */
426 if (mode == 0 && i >= 19)
427 window = adapter->physical_port *
428 NETXEN_NIC_PORT_WINDOW;
429
430 regs_buff[i] = NXRD32(adapter,
431 niu_registers[mode].reg[i - 3] + window);
432 }
433 329
330 if (adapter->is_up != NETXEN_ADAPTER_UP_MAGIC)
331 return;
332
333 regs_buff[i++] = NXRD32(adapter, CRB_CMDPEG_STATE);
334 regs_buff[i++] = NXRD32(adapter, CRB_RCVPEG_STATE);
335 regs_buff[i++] = NXRD32(adapter, CRB_FW_CAPABILITIES_1);
336 regs_buff[i++] = NXRDIO(adapter, adapter->crb_int_state_reg);
337 regs_buff[i++] = NXRD32(adapter, NX_CRB_DEV_REF_COUNT);
338 regs_buff[i++] = NXRD32(adapter, NX_CRB_DEV_STATE);
339 regs_buff[i++] = NXRD32(adapter, NETXEN_PEG_ALIVE_COUNTER);
340 regs_buff[i++] = NXRD32(adapter, NETXEN_PEG_HALT_STATUS1);
341 regs_buff[i++] = NXRD32(adapter, NETXEN_PEG_HALT_STATUS2);
342
343 regs_buff[i++] = NXRD32(adapter, NETXEN_CRB_PEG_NET_0+0x3c);
344 regs_buff[i++] = NXRD32(adapter, NETXEN_CRB_PEG_NET_1+0x3c);
345 regs_buff[i++] = NXRD32(adapter, NETXEN_CRB_PEG_NET_2+0x3c);
346 regs_buff[i++] = NXRD32(adapter, NETXEN_CRB_PEG_NET_3+0x3c);
347
348 if (NX_IS_REVISION_P3(adapter->ahw.revision_id)) {
349
350 regs_buff[i++] = NXRD32(adapter, NETXEN_CRB_PEG_NET_4+0x3c);
351 i += 2;
352
353 regs_buff[i++] = NXRD32(adapter, CRB_XG_STATE_P3);
354 regs_buff[i++] = le32_to_cpu(*(adapter->tx_ring->hw_consumer));
355
356 } else {
357 i++;
358
359 regs_buff[i++] = NXRD32(adapter,
360 NETXEN_NIU_XGE_CONFIG_0+(0x10000*port));
361 regs_buff[i++] = NXRD32(adapter,
362 NETXEN_NIU_XGE_CONFIG_1+(0x10000*port));
363
364 regs_buff[i++] = NXRD32(adapter, CRB_XG_STATE);
365 regs_buff[i++] = NXRDIO(adapter,
366 adapter->tx_ring->crb_cmd_consumer);
367 }
368
369 regs_buff[i++] = NXRDIO(adapter, adapter->tx_ring->crb_cmd_producer);
370
371 regs_buff[i++] = NXRDIO(adapter,
372 recv_ctx->rds_rings[0].crb_rcv_producer);
373 regs_buff[i++] = NXRDIO(adapter,
374 recv_ctx->rds_rings[1].crb_rcv_producer);
375
376 regs_buff[i++] = adapter->max_sds_rings;
377
378 for (ring = 0; ring < adapter->max_sds_rings; ring++) {
379 sds_ring = &(recv_ctx->sds_rings[ring]);
380 regs_buff[i++] = NXRDIO(adapter,
381 sds_ring->crb_sts_consumer);
434 } 382 }
435} 383}
436 384
437static u32 netxen_nic_test_link(struct net_device *dev) 385static u32 netxen_nic_test_link(struct net_device *dev)
438{ 386{
439 struct netxen_adapter *adapter = netdev_priv(dev); 387 struct netxen_adapter *adapter = netdev_priv(dev);
440 __u32 status; 388 u32 val, port;
441 int val;
442 389
443 /* read which mode */ 390 port = adapter->physical_port;
444 if (adapter->ahw.port_type == NETXEN_NIC_GBE) { 391 if (NX_IS_REVISION_P3(adapter->ahw.revision_id)) {
445 if (adapter->phy_read && 392 val = NXRD32(adapter, CRB_XG_STATE_P3);
446 adapter->phy_read(adapter, 393 val = XG_LINK_STATE_P3(adapter->ahw.pci_func, val);
447 NETXEN_NIU_GB_MII_MGMT_ADDR_PHY_STATUS, 394 return (val == XG_LINK_UP_P3) ? 0 : 1;
448 &status) != 0) 395 } else {
449 return -EIO;
450 else {
451 val = netxen_get_phy_link(status);
452 return !val;
453 }
454 } else if (adapter->ahw.port_type == NETXEN_NIC_XGBE) {
455 val = NXRD32(adapter, CRB_XG_STATE); 396 val = NXRD32(adapter, CRB_XG_STATE);
397 val = (val >> port*8) & 0xff;
456 return (val == XG_LINK_UP) ? 0 : 1; 398 return (val == XG_LINK_UP) ? 0 : 1;
457 } 399 }
458 return -EIO;
459} 400}
460 401
461static int 402static int
diff --git a/drivers/net/netxen/netxen_nic_hw.c b/drivers/net/netxen/netxen_nic_hw.c
index 2e364fee3cbb..85e28e60ecf1 100644
--- a/drivers/net/netxen/netxen_nic_hw.c
+++ b/drivers/net/netxen/netxen_nic_hw.c
@@ -345,8 +345,7 @@ netxen_pcie_sem_lock(struct netxen_adapter *adapter, int sem, u32 id_reg)
345void 345void
346netxen_pcie_sem_unlock(struct netxen_adapter *adapter, int sem) 346netxen_pcie_sem_unlock(struct netxen_adapter *adapter, int sem)
347{ 347{
348 int val; 348 NXRD32(adapter, NETXEN_PCIE_REG(PCIE_SEM_UNLOCK(sem)));
349 val = NXRD32(adapter, NETXEN_PCIE_REG(PCIE_SEM_UNLOCK(sem)));
350} 349}
351 350
352int netxen_niu_xg_init_port(struct netxen_adapter *adapter, int port) 351int netxen_niu_xg_init_port(struct netxen_adapter *adapter, int port)
@@ -691,6 +690,9 @@ void netxen_p3_nic_set_multi(struct net_device *netdev)
691 struct list_head *head; 690 struct list_head *head;
692 nx_mac_list_t *cur; 691 nx_mac_list_t *cur;
693 692
693 if (adapter->is_up != NETXEN_ADAPTER_UP_MAGIC)
694 return;
695
694 list_splice_tail_init(&adapter->mac_list, &del_list); 696 list_splice_tail_init(&adapter->mac_list, &del_list);
695 697
696 nx_p3_nic_add_mac(adapter, adapter->mac_addr, &del_list); 698 nx_p3_nic_add_mac(adapter, adapter->mac_addr, &del_list);
diff --git a/drivers/net/netxen/netxen_nic_init.c b/drivers/net/netxen/netxen_nic_init.c
index 02f8d4b4db63..64cff68d372c 100644
--- a/drivers/net/netxen/netxen_nic_init.c
+++ b/drivers/net/netxen/netxen_nic_init.c
@@ -184,6 +184,8 @@ skip_rds:
184 184
185 tx_ring = adapter->tx_ring; 185 tx_ring = adapter->tx_ring;
186 vfree(tx_ring->cmd_buf_arr); 186 vfree(tx_ring->cmd_buf_arr);
187 kfree(tx_ring);
188 adapter->tx_ring = NULL;
187} 189}
188 190
189int netxen_alloc_sw_resources(struct netxen_adapter *adapter) 191int netxen_alloc_sw_resources(struct netxen_adapter *adapter)
@@ -782,7 +784,7 @@ netxen_need_fw_reset(struct netxen_adapter *adapter)
782 if (NXRD32(adapter, CRB_CMDPEG_STATE) == PHAN_INITIALIZE_FAILED) 784 if (NXRD32(adapter, CRB_CMDPEG_STATE) == PHAN_INITIALIZE_FAILED)
783 return 1; 785 return 1;
784 786
785 old_count = count = NXRD32(adapter, NETXEN_PEG_ALIVE_COUNTER); 787 old_count = NXRD32(adapter, NETXEN_PEG_ALIVE_COUNTER);
786 788
787 for (i = 0; i < 10; i++) { 789 for (i = 0; i < 10; i++) {
788 790
diff --git a/drivers/net/netxen/netxen_nic_main.c b/drivers/net/netxen/netxen_nic_main.c
index f4996846a234..24279e6e55f5 100644
--- a/drivers/net/netxen/netxen_nic_main.c
+++ b/drivers/net/netxen/netxen_nic_main.c
@@ -57,7 +57,9 @@ static int use_msi = 1;
57 57
58static int use_msi_x = 1; 58static int use_msi_x = 1;
59 59
60static unsigned long auto_fw_reset = AUTO_FW_RESET_ENABLED; 60static int auto_fw_reset = AUTO_FW_RESET_ENABLED;
61module_param(auto_fw_reset, int, 0644);
62MODULE_PARM_DESC(auto_fw_reset,"Auto firmware reset (0=disabled, 1=enabled");
61 63
62static int __devinit netxen_nic_probe(struct pci_dev *pdev, 64static int __devinit netxen_nic_probe(struct pci_dev *pdev,
63 const struct pci_device_id *ent); 65 const struct pci_device_id *ent);
@@ -338,7 +340,7 @@ netxen_check_hw_init(struct netxen_adapter *adapter, int first_boot)
338 if (!(first_boot & 0x4)) { 340 if (!(first_boot & 0x4)) {
339 first_boot |= 0x4; 341 first_boot |= 0x4;
340 NXWR32(adapter, NETXEN_PCIE_REG(0x4), first_boot); 342 NXWR32(adapter, NETXEN_PCIE_REG(0x4), first_boot);
341 first_boot = NXRD32(adapter, NETXEN_PCIE_REG(0x4)); 343 NXRD32(adapter, NETXEN_PCIE_REG(0x4));
342 } 344 }
343 345
344 /* This is the first boot after power up */ 346 /* This is the first boot after power up */
@@ -1896,12 +1898,8 @@ static void netxen_nic_handle_phy_intr(struct netxen_adapter *adapter)
1896 linkup = (val == XG_LINK_UP_P3); 1898 linkup = (val == XG_LINK_UP_P3);
1897 } else { 1899 } else {
1898 val = NXRD32(adapter, CRB_XG_STATE); 1900 val = NXRD32(adapter, CRB_XG_STATE);
1899 if (adapter->ahw.port_type == NETXEN_NIC_GBE) 1901 val = (val >> port*8) & 0xff;
1900 linkup = (val >> port) & 1; 1902 linkup = (val == XG_LINK_UP);
1901 else {
1902 val = (val >> port*8) & 0xff;
1903 linkup = (val == XG_LINK_UP);
1904 }
1905 } 1903 }
1906 1904
1907 netxen_advert_link_change(adapter, linkup); 1905 netxen_advert_link_change(adapter, linkup);
@@ -1943,7 +1941,7 @@ static void netxen_tx_timeout_task(struct work_struct *work)
1943 netif_wake_queue(adapter->netdev); 1941 netif_wake_queue(adapter->netdev);
1944 1942
1945 clear_bit(__NX_RESETTING, &adapter->state); 1943 clear_bit(__NX_RESETTING, &adapter->state);
1946 1944 return;
1947 } else { 1945 } else {
1948 clear_bit(__NX_RESETTING, &adapter->state); 1946 clear_bit(__NX_RESETTING, &adapter->state);
1949 if (!netxen_nic_reset_context(adapter)) { 1947 if (!netxen_nic_reset_context(adapter)) {
@@ -2242,7 +2240,9 @@ netxen_detach_work(struct work_struct *work)
2242 2240
2243 netxen_nic_down(adapter, netdev); 2241 netxen_nic_down(adapter, netdev);
2244 2242
2243 rtnl_lock();
2245 netxen_nic_detach(adapter); 2244 netxen_nic_detach(adapter);
2245 rtnl_unlock();
2246 2246
2247 status = NXRD32(adapter, NETXEN_PEG_HALT_STATUS1); 2247 status = NXRD32(adapter, NETXEN_PEG_HALT_STATUS1);
2248 2248
@@ -2534,42 +2534,6 @@ static struct bin_attribute bin_attr_mem = {
2534 .write = netxen_sysfs_write_mem, 2534 .write = netxen_sysfs_write_mem,
2535}; 2535};
2536 2536
2537#ifdef CONFIG_MODULES
2538static ssize_t
2539netxen_store_auto_fw_reset(struct module_attribute *mattr,
2540 struct module *mod, const char *buf, size_t count)
2541
2542{
2543 unsigned long new;
2544
2545 if (strict_strtoul(buf, 16, &new))
2546 return -EINVAL;
2547
2548 if ((new == AUTO_FW_RESET_ENABLED) || (new == AUTO_FW_RESET_DISABLED)) {
2549 auto_fw_reset = new;
2550 return count;
2551 }
2552
2553 return -EINVAL;
2554}
2555
2556static ssize_t
2557netxen_show_auto_fw_reset(struct module_attribute *mattr,
2558 struct module *mod, char *buf)
2559
2560{
2561 if (auto_fw_reset == AUTO_FW_RESET_ENABLED)
2562 return sprintf(buf, "enabled\n");
2563 else
2564 return sprintf(buf, "disabled\n");
2565}
2566
2567static struct module_attribute mod_attr_fw_reset = {
2568 .attr = {.name = "auto_fw_reset", .mode = (S_IRUGO | S_IWUSR)},
2569 .show = netxen_show_auto_fw_reset,
2570 .store = netxen_store_auto_fw_reset,
2571};
2572#endif
2573 2537
2574static void 2538static void
2575netxen_create_sysfs_entries(struct netxen_adapter *adapter) 2539netxen_create_sysfs_entries(struct netxen_adapter *adapter)
@@ -2775,23 +2739,12 @@ static struct pci_driver netxen_driver = {
2775 2739
2776static int __init netxen_init_module(void) 2740static int __init netxen_init_module(void)
2777{ 2741{
2778#ifdef CONFIG_MODULES
2779 struct module *mod = THIS_MODULE;
2780#endif
2781
2782 printk(KERN_INFO "%s\n", netxen_nic_driver_string); 2742 printk(KERN_INFO "%s\n", netxen_nic_driver_string);
2783 2743
2784#ifdef CONFIG_INET 2744#ifdef CONFIG_INET
2785 register_netdevice_notifier(&netxen_netdev_cb); 2745 register_netdevice_notifier(&netxen_netdev_cb);
2786 register_inetaddr_notifier(&netxen_inetaddr_cb); 2746 register_inetaddr_notifier(&netxen_inetaddr_cb);
2787#endif 2747#endif
2788
2789#ifdef CONFIG_MODULES
2790 if (sysfs_create_file(&mod->mkobj.kobj, &mod_attr_fw_reset.attr))
2791 printk(KERN_ERR "%s: Failed to create auto_fw_reset "
2792 "sysfs entry.", netxen_nic_driver_name);
2793#endif
2794
2795 return pci_register_driver(&netxen_driver); 2748 return pci_register_driver(&netxen_driver);
2796} 2749}
2797 2750
@@ -2799,12 +2752,6 @@ module_init(netxen_init_module);
2799 2752
2800static void __exit netxen_exit_module(void) 2753static void __exit netxen_exit_module(void)
2801{ 2754{
2802#ifdef CONFIG_MODULES
2803 struct module *mod = THIS_MODULE;
2804
2805 sysfs_remove_file(&mod->mkobj.kobj, &mod_attr_fw_reset.attr);
2806#endif
2807
2808 pci_unregister_driver(&netxen_driver); 2755 pci_unregister_driver(&netxen_driver);
2809 2756
2810#ifdef CONFIG_INET 2757#ifdef CONFIG_INET
diff --git a/drivers/net/niu.c b/drivers/net/niu.c
index 8ce58c4c7dd3..2aed2b382c40 100644
--- a/drivers/net/niu.c
+++ b/drivers/net/niu.c
@@ -2844,7 +2844,7 @@ static int tcam_wait_bit(struct niu *np, u64 bit)
2844 break; 2844 break;
2845 udelay(1); 2845 udelay(1);
2846 } 2846 }
2847 if (limit < 0) 2847 if (limit <= 0)
2848 return -ENODEV; 2848 return -ENODEV;
2849 2849
2850 return 0; 2850 return 0;
diff --git a/drivers/net/octeon/Kconfig b/drivers/net/octeon/Kconfig
new file mode 100644
index 000000000000..1e56bbf3f5c0
--- /dev/null
+++ b/drivers/net/octeon/Kconfig
@@ -0,0 +1,10 @@
1config OCTEON_MGMT_ETHERNET
2 tristate "Octeon Management port ethernet driver (CN5XXX, CN6XXX)"
3 depends on CPU_CAVIUM_OCTEON
4 select PHYLIB
5 select MDIO_OCTEON
6 default y
7 help
8 This option enables the ethernet driver for the management
9 port on Cavium Networks' Octeon CN57XX, CN56XX, CN55XX,
10 CN54XX, CN52XX, and CN6XXX chips.
diff --git a/drivers/net/octeon/Makefile b/drivers/net/octeon/Makefile
new file mode 100644
index 000000000000..906edecacfd3
--- /dev/null
+++ b/drivers/net/octeon/Makefile
@@ -0,0 +1,2 @@
1
2obj-$(CONFIG_OCTEON_MGMT_ETHERNET) += octeon_mgmt.o
diff --git a/drivers/net/octeon/octeon_mgmt.c b/drivers/net/octeon/octeon_mgmt.c
new file mode 100644
index 000000000000..050538bf155a
--- /dev/null
+++ b/drivers/net/octeon/octeon_mgmt.c
@@ -0,0 +1,1176 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2009 Cavium Networks
7 */
8
9#include <linux/capability.h>
10#include <linux/dma-mapping.h>
11#include <linux/init.h>
12#include <linux/platform_device.h>
13#include <linux/netdevice.h>
14#include <linux/etherdevice.h>
15#include <linux/if_vlan.h>
16#include <linux/phy.h>
17#include <linux/spinlock.h>
18
19#include <asm/octeon/octeon.h>
20#include <asm/octeon/cvmx-mixx-defs.h>
21#include <asm/octeon/cvmx-agl-defs.h>
22
23#define DRV_NAME "octeon_mgmt"
24#define DRV_VERSION "2.0"
25#define DRV_DESCRIPTION \
26 "Cavium Networks Octeon MII (management) port Network Driver"
27
28#define OCTEON_MGMT_NAPI_WEIGHT 16
29
30/*
31 * Ring sizes that are powers of two allow for more efficient modulo
32 * opertions.
33 */
34#define OCTEON_MGMT_RX_RING_SIZE 512
35#define OCTEON_MGMT_TX_RING_SIZE 128
36
37/* Allow 8 bytes for vlan and FCS. */
38#define OCTEON_MGMT_RX_HEADROOM (ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN)
39
40union mgmt_port_ring_entry {
41 u64 d64;
42 struct {
43 u64 reserved_62_63:2;
44 /* Length of the buffer/packet in bytes */
45 u64 len:14;
46 /* For TX, signals that the packet should be timestamped */
47 u64 tstamp:1;
48 /* The RX error code */
49 u64 code:7;
50#define RING_ENTRY_CODE_DONE 0xf
51#define RING_ENTRY_CODE_MORE 0x10
52 /* Physical address of the buffer */
53 u64 addr:40;
54 } s;
55};
56
57struct octeon_mgmt {
58 struct net_device *netdev;
59 int port;
60 int irq;
61 u64 *tx_ring;
62 dma_addr_t tx_ring_handle;
63 unsigned int tx_next;
64 unsigned int tx_next_clean;
65 unsigned int tx_current_fill;
66 /* The tx_list lock also protects the ring related variables */
67 struct sk_buff_head tx_list;
68
69 /* RX variables only touched in napi_poll. No locking necessary. */
70 u64 *rx_ring;
71 dma_addr_t rx_ring_handle;
72 unsigned int rx_next;
73 unsigned int rx_next_fill;
74 unsigned int rx_current_fill;
75 struct sk_buff_head rx_list;
76
77 spinlock_t lock;
78 unsigned int last_duplex;
79 unsigned int last_link;
80 struct device *dev;
81 struct napi_struct napi;
82 struct tasklet_struct tx_clean_tasklet;
83 struct phy_device *phydev;
84};
85
86static void octeon_mgmt_set_rx_irq(struct octeon_mgmt *p, int enable)
87{
88 int port = p->port;
89 union cvmx_mixx_intena mix_intena;
90 unsigned long flags;
91
92 spin_lock_irqsave(&p->lock, flags);
93 mix_intena.u64 = cvmx_read_csr(CVMX_MIXX_INTENA(port));
94 mix_intena.s.ithena = enable ? 1 : 0;
95 cvmx_write_csr(CVMX_MIXX_INTENA(port), mix_intena.u64);
96 spin_unlock_irqrestore(&p->lock, flags);
97}
98
99static void octeon_mgmt_set_tx_irq(struct octeon_mgmt *p, int enable)
100{
101 int port = p->port;
102 union cvmx_mixx_intena mix_intena;
103 unsigned long flags;
104
105 spin_lock_irqsave(&p->lock, flags);
106 mix_intena.u64 = cvmx_read_csr(CVMX_MIXX_INTENA(port));
107 mix_intena.s.othena = enable ? 1 : 0;
108 cvmx_write_csr(CVMX_MIXX_INTENA(port), mix_intena.u64);
109 spin_unlock_irqrestore(&p->lock, flags);
110}
111
112static inline void octeon_mgmt_enable_rx_irq(struct octeon_mgmt *p)
113{
114 octeon_mgmt_set_rx_irq(p, 1);
115}
116
117static inline void octeon_mgmt_disable_rx_irq(struct octeon_mgmt *p)
118{
119 octeon_mgmt_set_rx_irq(p, 0);
120}
121
122static inline void octeon_mgmt_enable_tx_irq(struct octeon_mgmt *p)
123{
124 octeon_mgmt_set_tx_irq(p, 1);
125}
126
127static inline void octeon_mgmt_disable_tx_irq(struct octeon_mgmt *p)
128{
129 octeon_mgmt_set_tx_irq(p, 0);
130}
131
132static unsigned int ring_max_fill(unsigned int ring_size)
133{
134 return ring_size - 8;
135}
136
137static unsigned int ring_size_to_bytes(unsigned int ring_size)
138{
139 return ring_size * sizeof(union mgmt_port_ring_entry);
140}
141
142static void octeon_mgmt_rx_fill_ring(struct net_device *netdev)
143{
144 struct octeon_mgmt *p = netdev_priv(netdev);
145 int port = p->port;
146
147 while (p->rx_current_fill < ring_max_fill(OCTEON_MGMT_RX_RING_SIZE)) {
148 unsigned int size;
149 union mgmt_port_ring_entry re;
150 struct sk_buff *skb;
151
152 /* CN56XX pass 1 needs 8 bytes of padding. */
153 size = netdev->mtu + OCTEON_MGMT_RX_HEADROOM + 8 + NET_IP_ALIGN;
154
155 skb = netdev_alloc_skb(netdev, size);
156 if (!skb)
157 break;
158 skb_reserve(skb, NET_IP_ALIGN);
159 __skb_queue_tail(&p->rx_list, skb);
160
161 re.d64 = 0;
162 re.s.len = size;
163 re.s.addr = dma_map_single(p->dev, skb->data,
164 size,
165 DMA_FROM_DEVICE);
166
167 /* Put it in the ring. */
168 p->rx_ring[p->rx_next_fill] = re.d64;
169 dma_sync_single_for_device(p->dev, p->rx_ring_handle,
170 ring_size_to_bytes(OCTEON_MGMT_RX_RING_SIZE),
171 DMA_BIDIRECTIONAL);
172 p->rx_next_fill =
173 (p->rx_next_fill + 1) % OCTEON_MGMT_RX_RING_SIZE;
174 p->rx_current_fill++;
175 /* Ring the bell. */
176 cvmx_write_csr(CVMX_MIXX_IRING2(port), 1);
177 }
178}
179
180static void octeon_mgmt_clean_tx_buffers(struct octeon_mgmt *p)
181{
182 int port = p->port;
183 union cvmx_mixx_orcnt mix_orcnt;
184 union mgmt_port_ring_entry re;
185 struct sk_buff *skb;
186 int cleaned = 0;
187 unsigned long flags;
188
189 mix_orcnt.u64 = cvmx_read_csr(CVMX_MIXX_ORCNT(port));
190 while (mix_orcnt.s.orcnt) {
191 dma_sync_single_for_cpu(p->dev, p->tx_ring_handle,
192 ring_size_to_bytes(OCTEON_MGMT_TX_RING_SIZE),
193 DMA_BIDIRECTIONAL);
194
195 spin_lock_irqsave(&p->tx_list.lock, flags);
196
197 re.d64 = p->tx_ring[p->tx_next_clean];
198 p->tx_next_clean =
199 (p->tx_next_clean + 1) % OCTEON_MGMT_TX_RING_SIZE;
200 skb = __skb_dequeue(&p->tx_list);
201
202 mix_orcnt.u64 = 0;
203 mix_orcnt.s.orcnt = 1;
204
205 /* Acknowledge to hardware that we have the buffer. */
206 cvmx_write_csr(CVMX_MIXX_ORCNT(port), mix_orcnt.u64);
207 p->tx_current_fill--;
208
209 spin_unlock_irqrestore(&p->tx_list.lock, flags);
210
211 dma_unmap_single(p->dev, re.s.addr, re.s.len,
212 DMA_TO_DEVICE);
213 dev_kfree_skb_any(skb);
214 cleaned++;
215
216 mix_orcnt.u64 = cvmx_read_csr(CVMX_MIXX_ORCNT(port));
217 }
218
219 if (cleaned && netif_queue_stopped(p->netdev))
220 netif_wake_queue(p->netdev);
221}
222
223static void octeon_mgmt_clean_tx_tasklet(unsigned long arg)
224{
225 struct octeon_mgmt *p = (struct octeon_mgmt *)arg;
226 octeon_mgmt_clean_tx_buffers(p);
227 octeon_mgmt_enable_tx_irq(p);
228}
229
230static void octeon_mgmt_update_rx_stats(struct net_device *netdev)
231{
232 struct octeon_mgmt *p = netdev_priv(netdev);
233 int port = p->port;
234 unsigned long flags;
235 u64 drop, bad;
236
237 /* These reads also clear the count registers. */
238 drop = cvmx_read_csr(CVMX_AGL_GMX_RXX_STATS_PKTS_DRP(port));
239 bad = cvmx_read_csr(CVMX_AGL_GMX_RXX_STATS_PKTS_BAD(port));
240
241 if (drop || bad) {
242 /* Do an atomic update. */
243 spin_lock_irqsave(&p->lock, flags);
244 netdev->stats.rx_errors += bad;
245 netdev->stats.rx_dropped += drop;
246 spin_unlock_irqrestore(&p->lock, flags);
247 }
248}
249
250static void octeon_mgmt_update_tx_stats(struct net_device *netdev)
251{
252 struct octeon_mgmt *p = netdev_priv(netdev);
253 int port = p->port;
254 unsigned long flags;
255
256 union cvmx_agl_gmx_txx_stat0 s0;
257 union cvmx_agl_gmx_txx_stat1 s1;
258
259 /* These reads also clear the count registers. */
260 s0.u64 = cvmx_read_csr(CVMX_AGL_GMX_TXX_STAT0(port));
261 s1.u64 = cvmx_read_csr(CVMX_AGL_GMX_TXX_STAT1(port));
262
263 if (s0.s.xsdef || s0.s.xscol || s1.s.scol || s1.s.mcol) {
264 /* Do an atomic update. */
265 spin_lock_irqsave(&p->lock, flags);
266 netdev->stats.tx_errors += s0.s.xsdef + s0.s.xscol;
267 netdev->stats.collisions += s1.s.scol + s1.s.mcol;
268 spin_unlock_irqrestore(&p->lock, flags);
269 }
270}
271
272/*
273 * Dequeue a receive skb and its corresponding ring entry. The ring
274 * entry is returned, *pskb is updated to point to the skb.
275 */
276static u64 octeon_mgmt_dequeue_rx_buffer(struct octeon_mgmt *p,
277 struct sk_buff **pskb)
278{
279 union mgmt_port_ring_entry re;
280
281 dma_sync_single_for_cpu(p->dev, p->rx_ring_handle,
282 ring_size_to_bytes(OCTEON_MGMT_RX_RING_SIZE),
283 DMA_BIDIRECTIONAL);
284
285 re.d64 = p->rx_ring[p->rx_next];
286 p->rx_next = (p->rx_next + 1) % OCTEON_MGMT_RX_RING_SIZE;
287 p->rx_current_fill--;
288 *pskb = __skb_dequeue(&p->rx_list);
289
290 dma_unmap_single(p->dev, re.s.addr,
291 ETH_FRAME_LEN + OCTEON_MGMT_RX_HEADROOM,
292 DMA_FROM_DEVICE);
293
294 return re.d64;
295}
296
297
298static int octeon_mgmt_receive_one(struct octeon_mgmt *p)
299{
300 int port = p->port;
301 struct net_device *netdev = p->netdev;
302 union cvmx_mixx_ircnt mix_ircnt;
303 union mgmt_port_ring_entry re;
304 struct sk_buff *skb;
305 struct sk_buff *skb2;
306 struct sk_buff *skb_new;
307 union mgmt_port_ring_entry re2;
308 int rc = 1;
309
310
311 re.d64 = octeon_mgmt_dequeue_rx_buffer(p, &skb);
312 if (likely(re.s.code == RING_ENTRY_CODE_DONE)) {
313 /* A good packet, send it up. */
314 skb_put(skb, re.s.len);
315good:
316 skb->protocol = eth_type_trans(skb, netdev);
317 netdev->stats.rx_packets++;
318 netdev->stats.rx_bytes += skb->len;
319 netdev->last_rx = jiffies;
320 netif_receive_skb(skb);
321 rc = 0;
322 } else if (re.s.code == RING_ENTRY_CODE_MORE) {
323 /*
324 * Packet split across skbs. This can happen if we
325 * increase the MTU. Buffers that are already in the
326 * rx ring can then end up being too small. As the rx
327 * ring is refilled, buffers sized for the new MTU
328 * will be used and we should go back to the normal
329 * non-split case.
330 */
331 skb_put(skb, re.s.len);
332 do {
333 re2.d64 = octeon_mgmt_dequeue_rx_buffer(p, &skb2);
334 if (re2.s.code != RING_ENTRY_CODE_MORE
335 && re2.s.code != RING_ENTRY_CODE_DONE)
336 goto split_error;
337 skb_put(skb2, re2.s.len);
338 skb_new = skb_copy_expand(skb, 0, skb2->len,
339 GFP_ATOMIC);
340 if (!skb_new)
341 goto split_error;
342 if (skb_copy_bits(skb2, 0, skb_tail_pointer(skb_new),
343 skb2->len))
344 goto split_error;
345 skb_put(skb_new, skb2->len);
346 dev_kfree_skb_any(skb);
347 dev_kfree_skb_any(skb2);
348 skb = skb_new;
349 } while (re2.s.code == RING_ENTRY_CODE_MORE);
350 goto good;
351 } else {
352 /* Some other error, discard it. */
353 dev_kfree_skb_any(skb);
354 /*
355 * Error statistics are accumulated in
356 * octeon_mgmt_update_rx_stats.
357 */
358 }
359 goto done;
360split_error:
361 /* Discard the whole mess. */
362 dev_kfree_skb_any(skb);
363 dev_kfree_skb_any(skb2);
364 while (re2.s.code == RING_ENTRY_CODE_MORE) {
365 re2.d64 = octeon_mgmt_dequeue_rx_buffer(p, &skb2);
366 dev_kfree_skb_any(skb2);
367 }
368 netdev->stats.rx_errors++;
369
370done:
371 /* Tell the hardware we processed a packet. */
372 mix_ircnt.u64 = 0;
373 mix_ircnt.s.ircnt = 1;
374 cvmx_write_csr(CVMX_MIXX_IRCNT(port), mix_ircnt.u64);
375 return rc;
376
377}
378
379static int octeon_mgmt_receive_packets(struct octeon_mgmt *p, int budget)
380{
381 int port = p->port;
382 unsigned int work_done = 0;
383 union cvmx_mixx_ircnt mix_ircnt;
384 int rc;
385
386
387 mix_ircnt.u64 = cvmx_read_csr(CVMX_MIXX_IRCNT(port));
388 while (work_done < budget && mix_ircnt.s.ircnt) {
389
390 rc = octeon_mgmt_receive_one(p);
391 if (!rc)
392 work_done++;
393
394 /* Check for more packets. */
395 mix_ircnt.u64 = cvmx_read_csr(CVMX_MIXX_IRCNT(port));
396 }
397
398 octeon_mgmt_rx_fill_ring(p->netdev);
399
400 return work_done;
401}
402
403static int octeon_mgmt_napi_poll(struct napi_struct *napi, int budget)
404{
405 struct octeon_mgmt *p = container_of(napi, struct octeon_mgmt, napi);
406 struct net_device *netdev = p->netdev;
407 unsigned int work_done = 0;
408
409 work_done = octeon_mgmt_receive_packets(p, budget);
410
411 if (work_done < budget) {
412 /* We stopped because no more packets were available. */
413 napi_complete(napi);
414 octeon_mgmt_enable_rx_irq(p);
415 }
416 octeon_mgmt_update_rx_stats(netdev);
417
418 return work_done;
419}
420
421/* Reset the hardware to clean state. */
422static void octeon_mgmt_reset_hw(struct octeon_mgmt *p)
423{
424 union cvmx_mixx_ctl mix_ctl;
425 union cvmx_mixx_bist mix_bist;
426 union cvmx_agl_gmx_bist agl_gmx_bist;
427
428 mix_ctl.u64 = 0;
429 cvmx_write_csr(CVMX_MIXX_CTL(p->port), mix_ctl.u64);
430 do {
431 mix_ctl.u64 = cvmx_read_csr(CVMX_MIXX_CTL(p->port));
432 } while (mix_ctl.s.busy);
433 mix_ctl.s.reset = 1;
434 cvmx_write_csr(CVMX_MIXX_CTL(p->port), mix_ctl.u64);
435 cvmx_read_csr(CVMX_MIXX_CTL(p->port));
436 cvmx_wait(64);
437
438 mix_bist.u64 = cvmx_read_csr(CVMX_MIXX_BIST(p->port));
439 if (mix_bist.u64)
440 dev_warn(p->dev, "MIX failed BIST (0x%016llx)\n",
441 (unsigned long long)mix_bist.u64);
442
443 agl_gmx_bist.u64 = cvmx_read_csr(CVMX_AGL_GMX_BIST);
444 if (agl_gmx_bist.u64)
445 dev_warn(p->dev, "AGL failed BIST (0x%016llx)\n",
446 (unsigned long long)agl_gmx_bist.u64);
447}
448
449struct octeon_mgmt_cam_state {
450 u64 cam[6];
451 u64 cam_mask;
452 int cam_index;
453};
454
455static void octeon_mgmt_cam_state_add(struct octeon_mgmt_cam_state *cs,
456 unsigned char *addr)
457{
458 int i;
459
460 for (i = 0; i < 6; i++)
461 cs->cam[i] |= (u64)addr[i] << (8 * (cs->cam_index));
462 cs->cam_mask |= (1ULL << cs->cam_index);
463 cs->cam_index++;
464}
465
466static void octeon_mgmt_set_rx_filtering(struct net_device *netdev)
467{
468 struct octeon_mgmt *p = netdev_priv(netdev);
469 int port = p->port;
470 int i;
471 union cvmx_agl_gmx_rxx_adr_ctl adr_ctl;
472 union cvmx_agl_gmx_prtx_cfg agl_gmx_prtx;
473 unsigned long flags;
474 unsigned int prev_packet_enable;
475 unsigned int cam_mode = 1; /* 1 - Accept on CAM match */
476 unsigned int multicast_mode = 1; /* 1 - Reject all multicast. */
477 struct octeon_mgmt_cam_state cam_state;
478 struct dev_addr_list *list;
479 struct list_head *pos;
480 int available_cam_entries;
481
482 memset(&cam_state, 0, sizeof(cam_state));
483
484 if ((netdev->flags & IFF_PROMISC) || netdev->dev_addrs.count > 7) {
485 cam_mode = 0;
486 available_cam_entries = 8;
487 } else {
488 /*
489 * One CAM entry for the primary address, leaves seven
490 * for the secondary addresses.
491 */
492 available_cam_entries = 7 - netdev->dev_addrs.count;
493 }
494
495 if (netdev->flags & IFF_MULTICAST) {
496 if (cam_mode == 0 || (netdev->flags & IFF_ALLMULTI)
497 || netdev->mc_count > available_cam_entries)
498 multicast_mode = 2; /* 1 - Accept all multicast. */
499 else
500 multicast_mode = 0; /* 0 - Use CAM. */
501 }
502
503 if (cam_mode == 1) {
504 /* Add primary address. */
505 octeon_mgmt_cam_state_add(&cam_state, netdev->dev_addr);
506 list_for_each(pos, &netdev->dev_addrs.list) {
507 struct netdev_hw_addr *hw_addr;
508 hw_addr = list_entry(pos, struct netdev_hw_addr, list);
509 octeon_mgmt_cam_state_add(&cam_state, hw_addr->addr);
510 list = list->next;
511 }
512 }
513 if (multicast_mode == 0) {
514 i = netdev->mc_count;
515 list = netdev->mc_list;
516 while (i--) {
517 octeon_mgmt_cam_state_add(&cam_state, list->da_addr);
518 list = list->next;
519 }
520 }
521
522
523 spin_lock_irqsave(&p->lock, flags);
524
525 /* Disable packet I/O. */
526 agl_gmx_prtx.u64 = cvmx_read_csr(CVMX_AGL_GMX_PRTX_CFG(port));
527 prev_packet_enable = agl_gmx_prtx.s.en;
528 agl_gmx_prtx.s.en = 0;
529 cvmx_write_csr(CVMX_AGL_GMX_PRTX_CFG(port), agl_gmx_prtx.u64);
530
531
532 adr_ctl.u64 = 0;
533 adr_ctl.s.cam_mode = cam_mode;
534 adr_ctl.s.mcst = multicast_mode;
535 adr_ctl.s.bcst = 1; /* Allow broadcast */
536
537 cvmx_write_csr(CVMX_AGL_GMX_RXX_ADR_CTL(port), adr_ctl.u64);
538
539 cvmx_write_csr(CVMX_AGL_GMX_RXX_ADR_CAM0(port), cam_state.cam[0]);
540 cvmx_write_csr(CVMX_AGL_GMX_RXX_ADR_CAM1(port), cam_state.cam[1]);
541 cvmx_write_csr(CVMX_AGL_GMX_RXX_ADR_CAM2(port), cam_state.cam[2]);
542 cvmx_write_csr(CVMX_AGL_GMX_RXX_ADR_CAM3(port), cam_state.cam[3]);
543 cvmx_write_csr(CVMX_AGL_GMX_RXX_ADR_CAM4(port), cam_state.cam[4]);
544 cvmx_write_csr(CVMX_AGL_GMX_RXX_ADR_CAM5(port), cam_state.cam[5]);
545 cvmx_write_csr(CVMX_AGL_GMX_RXX_ADR_CAM_EN(port), cam_state.cam_mask);
546
547 /* Restore packet I/O. */
548 agl_gmx_prtx.s.en = prev_packet_enable;
549 cvmx_write_csr(CVMX_AGL_GMX_PRTX_CFG(port), agl_gmx_prtx.u64);
550
551 spin_unlock_irqrestore(&p->lock, flags);
552}
553
554static int octeon_mgmt_set_mac_address(struct net_device *netdev, void *addr)
555{
556 struct sockaddr *sa = addr;
557
558 if (!is_valid_ether_addr(sa->sa_data))
559 return -EADDRNOTAVAIL;
560
561 memcpy(netdev->dev_addr, sa->sa_data, ETH_ALEN);
562
563 octeon_mgmt_set_rx_filtering(netdev);
564
565 return 0;
566}
567
568static int octeon_mgmt_change_mtu(struct net_device *netdev, int new_mtu)
569{
570 struct octeon_mgmt *p = netdev_priv(netdev);
571 int port = p->port;
572 int size_without_fcs = new_mtu + OCTEON_MGMT_RX_HEADROOM;
573
574 /*
575 * Limit the MTU to make sure the ethernet packets are between
576 * 64 bytes and 16383 bytes.
577 */
578 if (size_without_fcs < 64 || size_without_fcs > 16383) {
579 dev_warn(p->dev, "MTU must be between %d and %d.\n",
580 64 - OCTEON_MGMT_RX_HEADROOM,
581 16383 - OCTEON_MGMT_RX_HEADROOM);
582 return -EINVAL;
583 }
584
585 netdev->mtu = new_mtu;
586
587 cvmx_write_csr(CVMX_AGL_GMX_RXX_FRM_MAX(port), size_without_fcs);
588 cvmx_write_csr(CVMX_AGL_GMX_RXX_JABBER(port),
589 (size_without_fcs + 7) & 0xfff8);
590
591 return 0;
592}
593
594static irqreturn_t octeon_mgmt_interrupt(int cpl, void *dev_id)
595{
596 struct net_device *netdev = dev_id;
597 struct octeon_mgmt *p = netdev_priv(netdev);
598 int port = p->port;
599 union cvmx_mixx_isr mixx_isr;
600
601 mixx_isr.u64 = cvmx_read_csr(CVMX_MIXX_ISR(port));
602
603 /* Clear any pending interrupts */
604 cvmx_write_csr(CVMX_MIXX_ISR(port),
605 cvmx_read_csr(CVMX_MIXX_ISR(port)));
606 cvmx_read_csr(CVMX_MIXX_ISR(port));
607
608 if (mixx_isr.s.irthresh) {
609 octeon_mgmt_disable_rx_irq(p);
610 napi_schedule(&p->napi);
611 }
612 if (mixx_isr.s.orthresh) {
613 octeon_mgmt_disable_tx_irq(p);
614 tasklet_schedule(&p->tx_clean_tasklet);
615 }
616
617 return IRQ_HANDLED;
618}
619
620static int octeon_mgmt_ioctl(struct net_device *netdev,
621 struct ifreq *rq, int cmd)
622{
623 struct octeon_mgmt *p = netdev_priv(netdev);
624
625 if (!netif_running(netdev))
626 return -EINVAL;
627
628 if (!p->phydev)
629 return -EINVAL;
630
631 return phy_mii_ioctl(p->phydev, if_mii(rq), cmd);
632}
633
634static void octeon_mgmt_adjust_link(struct net_device *netdev)
635{
636 struct octeon_mgmt *p = netdev_priv(netdev);
637 int port = p->port;
638 union cvmx_agl_gmx_prtx_cfg prtx_cfg;
639 unsigned long flags;
640 int link_changed = 0;
641
642 spin_lock_irqsave(&p->lock, flags);
643 if (p->phydev->link) {
644 if (!p->last_link)
645 link_changed = 1;
646 if (p->last_duplex != p->phydev->duplex) {
647 p->last_duplex = p->phydev->duplex;
648 prtx_cfg.u64 =
649 cvmx_read_csr(CVMX_AGL_GMX_PRTX_CFG(port));
650 prtx_cfg.s.duplex = p->phydev->duplex;
651 cvmx_write_csr(CVMX_AGL_GMX_PRTX_CFG(port),
652 prtx_cfg.u64);
653 }
654 } else {
655 if (p->last_link)
656 link_changed = -1;
657 }
658 p->last_link = p->phydev->link;
659 spin_unlock_irqrestore(&p->lock, flags);
660
661 if (link_changed != 0) {
662 if (link_changed > 0) {
663 netif_carrier_on(netdev);
664 pr_info("%s: Link is up - %d/%s\n", netdev->name,
665 p->phydev->speed,
666 DUPLEX_FULL == p->phydev->duplex ?
667 "Full" : "Half");
668 } else {
669 netif_carrier_off(netdev);
670 pr_info("%s: Link is down\n", netdev->name);
671 }
672 }
673}
674
675static int octeon_mgmt_init_phy(struct net_device *netdev)
676{
677 struct octeon_mgmt *p = netdev_priv(netdev);
678 char phy_id[20];
679
680 if (octeon_is_simulation()) {
681 /* No PHYs in the simulator. */
682 netif_carrier_on(netdev);
683 return 0;
684 }
685
686 snprintf(phy_id, sizeof(phy_id), PHY_ID_FMT, "0", p->port);
687
688 p->phydev = phy_connect(netdev, phy_id, octeon_mgmt_adjust_link, 0,
689 PHY_INTERFACE_MODE_MII);
690
691 if (IS_ERR(p->phydev)) {
692 p->phydev = NULL;
693 return -1;
694 }
695
696 phy_start_aneg(p->phydev);
697
698 return 0;
699}
700
701static int octeon_mgmt_open(struct net_device *netdev)
702{
703 struct octeon_mgmt *p = netdev_priv(netdev);
704 int port = p->port;
705 union cvmx_mixx_ctl mix_ctl;
706 union cvmx_agl_gmx_inf_mode agl_gmx_inf_mode;
707 union cvmx_mixx_oring1 oring1;
708 union cvmx_mixx_iring1 iring1;
709 union cvmx_agl_gmx_prtx_cfg prtx_cfg;
710 union cvmx_agl_gmx_rxx_frm_ctl rxx_frm_ctl;
711 union cvmx_mixx_irhwm mix_irhwm;
712 union cvmx_mixx_orhwm mix_orhwm;
713 union cvmx_mixx_intena mix_intena;
714 struct sockaddr sa;
715
716 /* Allocate ring buffers. */
717 p->tx_ring = kzalloc(ring_size_to_bytes(OCTEON_MGMT_TX_RING_SIZE),
718 GFP_KERNEL);
719 if (!p->tx_ring)
720 return -ENOMEM;
721 p->tx_ring_handle =
722 dma_map_single(p->dev, p->tx_ring,
723 ring_size_to_bytes(OCTEON_MGMT_TX_RING_SIZE),
724 DMA_BIDIRECTIONAL);
725 p->tx_next = 0;
726 p->tx_next_clean = 0;
727 p->tx_current_fill = 0;
728
729
730 p->rx_ring = kzalloc(ring_size_to_bytes(OCTEON_MGMT_RX_RING_SIZE),
731 GFP_KERNEL);
732 if (!p->rx_ring)
733 goto err_nomem;
734 p->rx_ring_handle =
735 dma_map_single(p->dev, p->rx_ring,
736 ring_size_to_bytes(OCTEON_MGMT_RX_RING_SIZE),
737 DMA_BIDIRECTIONAL);
738
739 p->rx_next = 0;
740 p->rx_next_fill = 0;
741 p->rx_current_fill = 0;
742
743 octeon_mgmt_reset_hw(p);
744
745 mix_ctl.u64 = cvmx_read_csr(CVMX_MIXX_CTL(port));
746
747 /* Bring it out of reset if needed. */
748 if (mix_ctl.s.reset) {
749 mix_ctl.s.reset = 0;
750 cvmx_write_csr(CVMX_MIXX_CTL(port), mix_ctl.u64);
751 do {
752 mix_ctl.u64 = cvmx_read_csr(CVMX_MIXX_CTL(port));
753 } while (mix_ctl.s.reset);
754 }
755
756 agl_gmx_inf_mode.u64 = 0;
757 agl_gmx_inf_mode.s.en = 1;
758 cvmx_write_csr(CVMX_AGL_GMX_INF_MODE, agl_gmx_inf_mode.u64);
759
760 oring1.u64 = 0;
761 oring1.s.obase = p->tx_ring_handle >> 3;
762 oring1.s.osize = OCTEON_MGMT_TX_RING_SIZE;
763 cvmx_write_csr(CVMX_MIXX_ORING1(port), oring1.u64);
764
765 iring1.u64 = 0;
766 iring1.s.ibase = p->rx_ring_handle >> 3;
767 iring1.s.isize = OCTEON_MGMT_RX_RING_SIZE;
768 cvmx_write_csr(CVMX_MIXX_IRING1(port), iring1.u64);
769
770 /* Disable packet I/O. */
771 prtx_cfg.u64 = cvmx_read_csr(CVMX_AGL_GMX_PRTX_CFG(port));
772 prtx_cfg.s.en = 0;
773 cvmx_write_csr(CVMX_AGL_GMX_PRTX_CFG(port), prtx_cfg.u64);
774
775 memcpy(sa.sa_data, netdev->dev_addr, ETH_ALEN);
776 octeon_mgmt_set_mac_address(netdev, &sa);
777
778 octeon_mgmt_change_mtu(netdev, netdev->mtu);
779
780 /*
781 * Enable the port HW. Packets are not allowed until
782 * cvmx_mgmt_port_enable() is called.
783 */
784 mix_ctl.u64 = 0;
785 mix_ctl.s.crc_strip = 1; /* Strip the ending CRC */
786 mix_ctl.s.en = 1; /* Enable the port */
787 mix_ctl.s.nbtarb = 0; /* Arbitration mode */
788 /* MII CB-request FIFO programmable high watermark */
789 mix_ctl.s.mrq_hwm = 1;
790 cvmx_write_csr(CVMX_MIXX_CTL(port), mix_ctl.u64);
791
792 if (OCTEON_IS_MODEL(OCTEON_CN56XX_PASS1_X)
793 || OCTEON_IS_MODEL(OCTEON_CN52XX_PASS1_X)) {
794 /*
795 * Force compensation values, as they are not
796 * determined properly by HW
797 */
798 union cvmx_agl_gmx_drv_ctl drv_ctl;
799
800 drv_ctl.u64 = cvmx_read_csr(CVMX_AGL_GMX_DRV_CTL);
801 if (port) {
802 drv_ctl.s.byp_en1 = 1;
803 drv_ctl.s.nctl1 = 6;
804 drv_ctl.s.pctl1 = 6;
805 } else {
806 drv_ctl.s.byp_en = 1;
807 drv_ctl.s.nctl = 6;
808 drv_ctl.s.pctl = 6;
809 }
810 cvmx_write_csr(CVMX_AGL_GMX_DRV_CTL, drv_ctl.u64);
811 }
812
813 octeon_mgmt_rx_fill_ring(netdev);
814
815 /* Clear statistics. */
816 /* Clear on read. */
817 cvmx_write_csr(CVMX_AGL_GMX_RXX_STATS_CTL(port), 1);
818 cvmx_write_csr(CVMX_AGL_GMX_RXX_STATS_PKTS_DRP(port), 0);
819 cvmx_write_csr(CVMX_AGL_GMX_RXX_STATS_PKTS_BAD(port), 0);
820
821 cvmx_write_csr(CVMX_AGL_GMX_TXX_STATS_CTL(port), 1);
822 cvmx_write_csr(CVMX_AGL_GMX_TXX_STAT0(port), 0);
823 cvmx_write_csr(CVMX_AGL_GMX_TXX_STAT1(port), 0);
824
825 /* Clear any pending interrupts */
826 cvmx_write_csr(CVMX_MIXX_ISR(port), cvmx_read_csr(CVMX_MIXX_ISR(port)));
827
828 if (request_irq(p->irq, octeon_mgmt_interrupt, 0, netdev->name,
829 netdev)) {
830 dev_err(p->dev, "request_irq(%d) failed.\n", p->irq);
831 goto err_noirq;
832 }
833
834 /* Interrupt every single RX packet */
835 mix_irhwm.u64 = 0;
836 mix_irhwm.s.irhwm = 0;
837 cvmx_write_csr(CVMX_MIXX_IRHWM(port), mix_irhwm.u64);
838
839 /* Interrupt when we have 5 or more packets to clean. */
840 mix_orhwm.u64 = 0;
841 mix_orhwm.s.orhwm = 5;
842 cvmx_write_csr(CVMX_MIXX_ORHWM(port), mix_orhwm.u64);
843
844 /* Enable receive and transmit interrupts */
845 mix_intena.u64 = 0;
846 mix_intena.s.ithena = 1;
847 mix_intena.s.othena = 1;
848 cvmx_write_csr(CVMX_MIXX_INTENA(port), mix_intena.u64);
849
850
851 /* Enable packet I/O. */
852
853 rxx_frm_ctl.u64 = 0;
854 rxx_frm_ctl.s.pre_align = 1;
855 /*
856 * When set, disables the length check for non-min sized pkts
857 * with padding in the client data.
858 */
859 rxx_frm_ctl.s.pad_len = 1;
860 /* When set, disables the length check for VLAN pkts */
861 rxx_frm_ctl.s.vlan_len = 1;
862 /* When set, PREAMBLE checking is less strict */
863 rxx_frm_ctl.s.pre_free = 1;
864 /* Control Pause Frames can match station SMAC */
865 rxx_frm_ctl.s.ctl_smac = 0;
866 /* Control Pause Frames can match globally assign Multicast address */
867 rxx_frm_ctl.s.ctl_mcst = 1;
868 /* Forward pause information to TX block */
869 rxx_frm_ctl.s.ctl_bck = 1;
870 /* Drop Control Pause Frames */
871 rxx_frm_ctl.s.ctl_drp = 1;
872 /* Strip off the preamble */
873 rxx_frm_ctl.s.pre_strp = 1;
874 /*
875 * This port is configured to send PREAMBLE+SFD to begin every
876 * frame. GMX checks that the PREAMBLE is sent correctly.
877 */
878 rxx_frm_ctl.s.pre_chk = 1;
879 cvmx_write_csr(CVMX_AGL_GMX_RXX_FRM_CTL(port), rxx_frm_ctl.u64);
880
881 /* Enable the AGL block */
882 agl_gmx_inf_mode.u64 = 0;
883 agl_gmx_inf_mode.s.en = 1;
884 cvmx_write_csr(CVMX_AGL_GMX_INF_MODE, agl_gmx_inf_mode.u64);
885
886 /* Configure the port duplex and enables */
887 prtx_cfg.u64 = cvmx_read_csr(CVMX_AGL_GMX_PRTX_CFG(port));
888 prtx_cfg.s.tx_en = 1;
889 prtx_cfg.s.rx_en = 1;
890 prtx_cfg.s.en = 1;
891 p->last_duplex = 1;
892 prtx_cfg.s.duplex = p->last_duplex;
893 cvmx_write_csr(CVMX_AGL_GMX_PRTX_CFG(port), prtx_cfg.u64);
894
895 p->last_link = 0;
896 netif_carrier_off(netdev);
897
898 if (octeon_mgmt_init_phy(netdev)) {
899 dev_err(p->dev, "Cannot initialize PHY.\n");
900 goto err_noirq;
901 }
902
903 netif_wake_queue(netdev);
904 napi_enable(&p->napi);
905
906 return 0;
907err_noirq:
908 octeon_mgmt_reset_hw(p);
909 dma_unmap_single(p->dev, p->rx_ring_handle,
910 ring_size_to_bytes(OCTEON_MGMT_RX_RING_SIZE),
911 DMA_BIDIRECTIONAL);
912 kfree(p->rx_ring);
913err_nomem:
914 dma_unmap_single(p->dev, p->tx_ring_handle,
915 ring_size_to_bytes(OCTEON_MGMT_TX_RING_SIZE),
916 DMA_BIDIRECTIONAL);
917 kfree(p->tx_ring);
918 return -ENOMEM;
919}
920
921static int octeon_mgmt_stop(struct net_device *netdev)
922{
923 struct octeon_mgmt *p = netdev_priv(netdev);
924
925 napi_disable(&p->napi);
926 netif_stop_queue(netdev);
927
928 if (p->phydev)
929 phy_disconnect(p->phydev);
930
931 netif_carrier_off(netdev);
932
933 octeon_mgmt_reset_hw(p);
934
935
936 free_irq(p->irq, netdev);
937
938 /* dma_unmap is a nop on Octeon, so just free everything. */
939 skb_queue_purge(&p->tx_list);
940 skb_queue_purge(&p->rx_list);
941
942 dma_unmap_single(p->dev, p->rx_ring_handle,
943 ring_size_to_bytes(OCTEON_MGMT_RX_RING_SIZE),
944 DMA_BIDIRECTIONAL);
945 kfree(p->rx_ring);
946
947 dma_unmap_single(p->dev, p->tx_ring_handle,
948 ring_size_to_bytes(OCTEON_MGMT_TX_RING_SIZE),
949 DMA_BIDIRECTIONAL);
950 kfree(p->tx_ring);
951
952
953 return 0;
954}
955
956static int octeon_mgmt_xmit(struct sk_buff *skb, struct net_device *netdev)
957{
958 struct octeon_mgmt *p = netdev_priv(netdev);
959 int port = p->port;
960 union mgmt_port_ring_entry re;
961 unsigned long flags;
962
963 re.d64 = 0;
964 re.s.len = skb->len;
965 re.s.addr = dma_map_single(p->dev, skb->data,
966 skb->len,
967 DMA_TO_DEVICE);
968
969 spin_lock_irqsave(&p->tx_list.lock, flags);
970
971 if (unlikely(p->tx_current_fill >=
972 ring_max_fill(OCTEON_MGMT_TX_RING_SIZE))) {
973 spin_unlock_irqrestore(&p->tx_list.lock, flags);
974
975 dma_unmap_single(p->dev, re.s.addr, re.s.len,
976 DMA_TO_DEVICE);
977
978 netif_stop_queue(netdev);
979 return NETDEV_TX_BUSY;
980 }
981
982 __skb_queue_tail(&p->tx_list, skb);
983
984 /* Put it in the ring. */
985 p->tx_ring[p->tx_next] = re.d64;
986 p->tx_next = (p->tx_next + 1) % OCTEON_MGMT_TX_RING_SIZE;
987 p->tx_current_fill++;
988
989 spin_unlock_irqrestore(&p->tx_list.lock, flags);
990
991 dma_sync_single_for_device(p->dev, p->tx_ring_handle,
992 ring_size_to_bytes(OCTEON_MGMT_TX_RING_SIZE),
993 DMA_BIDIRECTIONAL);
994
995 netdev->stats.tx_packets++;
996 netdev->stats.tx_bytes += skb->len;
997
998 /* Ring the bell. */
999 cvmx_write_csr(CVMX_MIXX_ORING2(port), 1);
1000
1001 netdev->trans_start = jiffies;
1002 octeon_mgmt_clean_tx_buffers(p);
1003 octeon_mgmt_update_tx_stats(netdev);
1004 return NETDEV_TX_OK;
1005}
1006
1007#ifdef CONFIG_NET_POLL_CONTROLLER
1008static void octeon_mgmt_poll_controller(struct net_device *netdev)
1009{
1010 struct octeon_mgmt *p = netdev_priv(netdev);
1011
1012 octeon_mgmt_receive_packets(p, 16);
1013 octeon_mgmt_update_rx_stats(netdev);
1014 return;
1015}
1016#endif
1017
1018static void octeon_mgmt_get_drvinfo(struct net_device *netdev,
1019 struct ethtool_drvinfo *info)
1020{
1021 strncpy(info->driver, DRV_NAME, sizeof(info->driver));
1022 strncpy(info->version, DRV_VERSION, sizeof(info->version));
1023 strncpy(info->fw_version, "N/A", sizeof(info->fw_version));
1024 strncpy(info->bus_info, "N/A", sizeof(info->bus_info));
1025 info->n_stats = 0;
1026 info->testinfo_len = 0;
1027 info->regdump_len = 0;
1028 info->eedump_len = 0;
1029}
1030
1031static int octeon_mgmt_get_settings(struct net_device *netdev,
1032 struct ethtool_cmd *cmd)
1033{
1034 struct octeon_mgmt *p = netdev_priv(netdev);
1035
1036 if (p->phydev)
1037 return phy_ethtool_gset(p->phydev, cmd);
1038
1039 return -EINVAL;
1040}
1041
1042static int octeon_mgmt_set_settings(struct net_device *netdev,
1043 struct ethtool_cmd *cmd)
1044{
1045 struct octeon_mgmt *p = netdev_priv(netdev);
1046
1047 if (!capable(CAP_NET_ADMIN))
1048 return -EPERM;
1049
1050 if (p->phydev)
1051 return phy_ethtool_sset(p->phydev, cmd);
1052
1053 return -EINVAL;
1054}
1055
1056static const struct ethtool_ops octeon_mgmt_ethtool_ops = {
1057 .get_drvinfo = octeon_mgmt_get_drvinfo,
1058 .get_link = ethtool_op_get_link,
1059 .get_settings = octeon_mgmt_get_settings,
1060 .set_settings = octeon_mgmt_set_settings
1061};
1062
1063static const struct net_device_ops octeon_mgmt_ops = {
1064 .ndo_open = octeon_mgmt_open,
1065 .ndo_stop = octeon_mgmt_stop,
1066 .ndo_start_xmit = octeon_mgmt_xmit,
1067 .ndo_set_rx_mode = octeon_mgmt_set_rx_filtering,
1068 .ndo_set_multicast_list = octeon_mgmt_set_rx_filtering,
1069 .ndo_set_mac_address = octeon_mgmt_set_mac_address,
1070 .ndo_do_ioctl = octeon_mgmt_ioctl,
1071 .ndo_change_mtu = octeon_mgmt_change_mtu,
1072#ifdef CONFIG_NET_POLL_CONTROLLER
1073 .ndo_poll_controller = octeon_mgmt_poll_controller,
1074#endif
1075};
1076
1077static int __init octeon_mgmt_probe(struct platform_device *pdev)
1078{
1079 struct resource *res_irq;
1080 struct net_device *netdev;
1081 struct octeon_mgmt *p;
1082 int i;
1083
1084 netdev = alloc_etherdev(sizeof(struct octeon_mgmt));
1085 if (netdev == NULL)
1086 return -ENOMEM;
1087
1088 dev_set_drvdata(&pdev->dev, netdev);
1089 p = netdev_priv(netdev);
1090 netif_napi_add(netdev, &p->napi, octeon_mgmt_napi_poll,
1091 OCTEON_MGMT_NAPI_WEIGHT);
1092
1093 p->netdev = netdev;
1094 p->dev = &pdev->dev;
1095
1096 p->port = pdev->id;
1097 snprintf(netdev->name, IFNAMSIZ, "mgmt%d", p->port);
1098
1099 res_irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
1100 if (!res_irq)
1101 goto err;
1102
1103 p->irq = res_irq->start;
1104 spin_lock_init(&p->lock);
1105
1106 skb_queue_head_init(&p->tx_list);
1107 skb_queue_head_init(&p->rx_list);
1108 tasklet_init(&p->tx_clean_tasklet,
1109 octeon_mgmt_clean_tx_tasklet, (unsigned long)p);
1110
1111 netdev->netdev_ops = &octeon_mgmt_ops;
1112 netdev->ethtool_ops = &octeon_mgmt_ethtool_ops;
1113
1114
1115 /* The mgmt ports get the first N MACs. */
1116 for (i = 0; i < 6; i++)
1117 netdev->dev_addr[i] = octeon_bootinfo->mac_addr_base[i];
1118 netdev->dev_addr[5] += p->port;
1119
1120 if (p->port >= octeon_bootinfo->mac_addr_count)
1121 dev_err(&pdev->dev,
1122 "Error %s: Using MAC outside of the assigned range: "
1123 "%02x:%02x:%02x:%02x:%02x:%02x\n", netdev->name,
1124 netdev->dev_addr[0], netdev->dev_addr[1],
1125 netdev->dev_addr[2], netdev->dev_addr[3],
1126 netdev->dev_addr[4], netdev->dev_addr[5]);
1127
1128 if (register_netdev(netdev))
1129 goto err;
1130
1131 dev_info(&pdev->dev, "Version " DRV_VERSION "\n");
1132 return 0;
1133err:
1134 free_netdev(netdev);
1135 return -ENOENT;
1136}
1137
1138static int __exit octeon_mgmt_remove(struct platform_device *pdev)
1139{
1140 struct net_device *netdev = dev_get_drvdata(&pdev->dev);
1141
1142 unregister_netdev(netdev);
1143 free_netdev(netdev);
1144 return 0;
1145}
1146
1147static struct platform_driver octeon_mgmt_driver = {
1148 .driver = {
1149 .name = "octeon_mgmt",
1150 .owner = THIS_MODULE,
1151 },
1152 .probe = octeon_mgmt_probe,
1153 .remove = __exit_p(octeon_mgmt_remove),
1154};
1155
1156extern void octeon_mdiobus_force_mod_depencency(void);
1157
1158static int __init octeon_mgmt_mod_init(void)
1159{
1160 /* Force our mdiobus driver module to be loaded first. */
1161 octeon_mdiobus_force_mod_depencency();
1162 return platform_driver_register(&octeon_mgmt_driver);
1163}
1164
1165static void __exit octeon_mgmt_mod_exit(void)
1166{
1167 platform_driver_unregister(&octeon_mgmt_driver);
1168}
1169
1170module_init(octeon_mgmt_mod_init);
1171module_exit(octeon_mgmt_mod_exit);
1172
1173MODULE_DESCRIPTION(DRV_DESCRIPTION);
1174MODULE_AUTHOR("David Daney");
1175MODULE_LICENSE("GPL");
1176MODULE_VERSION(DRV_VERSION);
diff --git a/drivers/net/pcmcia/3c574_cs.c b/drivers/net/pcmcia/3c574_cs.c
index 17a27225cc98..98938ea9e0bd 100644
--- a/drivers/net/pcmcia/3c574_cs.c
+++ b/drivers/net/pcmcia/3c574_cs.c
@@ -912,7 +912,11 @@ static void media_check(unsigned long arg)
912 if ((inw(ioaddr + EL3_STATUS) & IntLatch) && (inb(ioaddr + Timer) == 0xff)) { 912 if ((inw(ioaddr + EL3_STATUS) & IntLatch) && (inb(ioaddr + Timer) == 0xff)) {
913 if (!lp->fast_poll) 913 if (!lp->fast_poll)
914 printk(KERN_INFO "%s: interrupt(s) dropped!\n", dev->name); 914 printk(KERN_INFO "%s: interrupt(s) dropped!\n", dev->name);
915
916 local_irq_save(flags);
915 el3_interrupt(dev->irq, dev); 917 el3_interrupt(dev->irq, dev);
918 local_irq_restore(flags);
919
916 lp->fast_poll = HZ; 920 lp->fast_poll = HZ;
917 } 921 }
918 if (lp->fast_poll) { 922 if (lp->fast_poll) {
diff --git a/drivers/net/pcmcia/3c589_cs.c b/drivers/net/pcmcia/3c589_cs.c
index 6f8d7e2e5922..322e11df0097 100644
--- a/drivers/net/pcmcia/3c589_cs.c
+++ b/drivers/net/pcmcia/3c589_cs.c
@@ -711,7 +711,11 @@ static void media_check(unsigned long arg)
711 (inb(ioaddr + EL3_TIMER) == 0xff)) { 711 (inb(ioaddr + EL3_TIMER) == 0xff)) {
712 if (!lp->fast_poll) 712 if (!lp->fast_poll)
713 printk(KERN_WARNING "%s: interrupt(s) dropped!\n", dev->name); 713 printk(KERN_WARNING "%s: interrupt(s) dropped!\n", dev->name);
714
715 local_irq_save(flags);
714 el3_interrupt(dev->irq, dev); 716 el3_interrupt(dev->irq, dev);
717 local_irq_restore(flags);
718
715 lp->fast_poll = HZ; 719 lp->fast_poll = HZ;
716 } 720 }
717 if (lp->fast_poll) { 721 if (lp->fast_poll) {
diff --git a/drivers/net/pcmcia/fmvj18x_cs.c b/drivers/net/pcmcia/fmvj18x_cs.c
index 813aca3fc433..7b17404d0858 100644
--- a/drivers/net/pcmcia/fmvj18x_cs.c
+++ b/drivers/net/pcmcia/fmvj18x_cs.c
@@ -717,6 +717,7 @@ static struct pcmcia_device_id fmvj18x_ids[] = {
717 PCMCIA_PFC_DEVICE_PROD_ID12(0, "NEC", "PK-UG-J001" ,0x18df0ba0 ,0x831b1064), 717 PCMCIA_PFC_DEVICE_PROD_ID12(0, "NEC", "PK-UG-J001" ,0x18df0ba0 ,0x831b1064),
718 PCMCIA_PFC_DEVICE_MANF_CARD(0, 0x0105, 0x0d0a), 718 PCMCIA_PFC_DEVICE_MANF_CARD(0, 0x0105, 0x0d0a),
719 PCMCIA_PFC_DEVICE_MANF_CARD(0, 0x0105, 0x0e0a), 719 PCMCIA_PFC_DEVICE_MANF_CARD(0, 0x0105, 0x0e0a),
720 PCMCIA_PFC_DEVICE_MANF_CARD(0, 0x0032, 0x0e01),
720 PCMCIA_PFC_DEVICE_MANF_CARD(0, 0x0032, 0x0a05), 721 PCMCIA_PFC_DEVICE_MANF_CARD(0, 0x0032, 0x0a05),
721 PCMCIA_PFC_DEVICE_MANF_CARD(0, 0x0032, 0x1101), 722 PCMCIA_PFC_DEVICE_MANF_CARD(0, 0x0032, 0x1101),
722 PCMCIA_DEVICE_NULL, 723 PCMCIA_DEVICE_NULL,
diff --git a/drivers/net/pcmcia/nmclan_cs.c b/drivers/net/pcmcia/nmclan_cs.c
index 8a5ae3b182ed..12e3233868e9 100644
--- a/drivers/net/pcmcia/nmclan_cs.c
+++ b/drivers/net/pcmcia/nmclan_cs.c
@@ -1402,7 +1402,6 @@ static void BuildLAF(int *ladrf, int *adr)
1402 for (i = 0; i < 8; i++) 1402 for (i = 0; i < 8; i++)
1403 printk(KERN_CONT " %02X", ladrf[i]); 1403 printk(KERN_CONT " %02X", ladrf[i]);
1404 printk(KERN_CONT "\n"); 1404 printk(KERN_CONT "\n");
1405 }
1406#endif 1405#endif
1407} /* BuildLAF */ 1406} /* BuildLAF */
1408 1407
diff --git a/drivers/net/pcmcia/pcnet_cs.c b/drivers/net/pcmcia/pcnet_cs.c
index 92ed3fbf89a5..776cad2f5715 100644
--- a/drivers/net/pcmcia/pcnet_cs.c
+++ b/drivers/net/pcmcia/pcnet_cs.c
@@ -1741,7 +1741,7 @@ static struct pcmcia_device_id pcnet_ids[] = {
1741 PCMCIA_MFC_DEVICE_CIS_PROD_ID4(0, "NSC MF LAN/Modem", 0x58fc6056, "cis/DP83903.cis"), 1741 PCMCIA_MFC_DEVICE_CIS_PROD_ID4(0, "NSC MF LAN/Modem", 0x58fc6056, "cis/DP83903.cis"),
1742 PCMCIA_MFC_DEVICE_CIS_MANF_CARD(0, 0x0175, 0x0000, "cis/DP83903.cis"), 1742 PCMCIA_MFC_DEVICE_CIS_MANF_CARD(0, 0x0175, 0x0000, "cis/DP83903.cis"),
1743 PCMCIA_DEVICE_CIS_MANF_CARD(0xc00f, 0x0002, "cis/LA-PCM.cis"), 1743 PCMCIA_DEVICE_CIS_MANF_CARD(0xc00f, 0x0002, "cis/LA-PCM.cis"),
1744 PCMCIA_DEVICE_CIS_PROD_ID12("KTI", "PE520 PLUS", 0xad180345, 0x9d58d392, "PE520.cis"), 1744 PCMCIA_DEVICE_CIS_PROD_ID12("KTI", "PE520 PLUS", 0xad180345, 0x9d58d392, "cis/PE520.cis"),
1745 PCMCIA_DEVICE_CIS_PROD_ID12("NDC", "Ethernet", 0x01c43ae1, 0x00b2e941, "cis/NE2K.cis"), 1745 PCMCIA_DEVICE_CIS_PROD_ID12("NDC", "Ethernet", 0x01c43ae1, 0x00b2e941, "cis/NE2K.cis"),
1746 PCMCIA_DEVICE_CIS_PROD_ID12("PMX ", "PE-200", 0x34f3f1c8, 0x10b59f8c, "cis/PE-200.cis"), 1746 PCMCIA_DEVICE_CIS_PROD_ID12("PMX ", "PE-200", 0x34f3f1c8, 0x10b59f8c, "cis/PE-200.cis"),
1747 PCMCIA_DEVICE_CIS_PROD_ID12("TAMARACK", "Ethernet", 0xcf434fba, 0x00b2e941, "cis/tamarack.cis"), 1747 PCMCIA_DEVICE_CIS_PROD_ID12("TAMARACK", "Ethernet", 0xcf434fba, 0x00b2e941, "cis/tamarack.cis"),
@@ -1754,7 +1754,7 @@ MODULE_DEVICE_TABLE(pcmcia, pcnet_ids);
1754MODULE_FIRMWARE("cis/PCMLM28.cis"); 1754MODULE_FIRMWARE("cis/PCMLM28.cis");
1755MODULE_FIRMWARE("cis/DP83903.cis"); 1755MODULE_FIRMWARE("cis/DP83903.cis");
1756MODULE_FIRMWARE("cis/LA-PCM.cis"); 1756MODULE_FIRMWARE("cis/LA-PCM.cis");
1757MODULE_FIRMWARE("PE520.cis"); 1757MODULE_FIRMWARE("cis/PE520.cis");
1758MODULE_FIRMWARE("cis/NE2K.cis"); 1758MODULE_FIRMWARE("cis/NE2K.cis");
1759MODULE_FIRMWARE("cis/PE-200.cis"); 1759MODULE_FIRMWARE("cis/PE-200.cis");
1760MODULE_FIRMWARE("cis/tamarack.cis"); 1760MODULE_FIRMWARE("cis/tamarack.cis");
diff --git a/drivers/net/pcnet32.c b/drivers/net/pcnet32.c
index dcc67a35e8f2..e154677ff706 100644
--- a/drivers/net/pcnet32.c
+++ b/drivers/net/pcnet32.c
@@ -45,6 +45,7 @@ static const char *const version =
45#include <linux/crc32.h> 45#include <linux/crc32.h>
46#include <linux/netdevice.h> 46#include <linux/netdevice.h>
47#include <linux/etherdevice.h> 47#include <linux/etherdevice.h>
48#include <linux/if_ether.h>
48#include <linux/skbuff.h> 49#include <linux/skbuff.h>
49#include <linux/spinlock.h> 50#include <linux/spinlock.h>
50#include <linux/moduleparam.h> 51#include <linux/moduleparam.h>
@@ -1765,7 +1766,7 @@ pcnet32_probe1(unsigned long ioaddr, int shared, struct pci_dev *pdev)
1765 1766
1766 /* if the ethernet address is not valid, force to 00:00:00:00:00:00 */ 1767 /* if the ethernet address is not valid, force to 00:00:00:00:00:00 */
1767 if (!is_valid_ether_addr(dev->perm_addr)) 1768 if (!is_valid_ether_addr(dev->perm_addr))
1768 memset(dev->dev_addr, 0, sizeof(dev->dev_addr)); 1769 memset(dev->dev_addr, 0, ETH_ALEN);
1769 1770
1770 if (pcnet32_debug & NETIF_MSG_PROBE) { 1771 if (pcnet32_debug & NETIF_MSG_PROBE) {
1771 printk(" %pM", dev->dev_addr); 1772 printk(" %pM", dev->dev_addr);
diff --git a/drivers/net/phy/Kconfig b/drivers/net/phy/Kconfig
index d5d8e1c5bc91..fc5938ba3d78 100644
--- a/drivers/net/phy/Kconfig
+++ b/drivers/net/phy/Kconfig
@@ -115,4 +115,15 @@ config MDIO_GPIO
115 To compile this driver as a module, choose M here: the module 115 To compile this driver as a module, choose M here: the module
116 will be called mdio-gpio. 116 will be called mdio-gpio.
117 117
118config MDIO_OCTEON
119 tristate "Support for MDIO buses on Octeon SOCs"
120 depends on CPU_CAVIUM_OCTEON
121 default y
122 help
123
124 This module provides a driver for the Octeon MDIO busses.
125 It is required by the Octeon Ethernet device drivers.
126
127 If in doubt, say Y.
128
118endif # PHYLIB 129endif # PHYLIB
diff --git a/drivers/net/phy/Makefile b/drivers/net/phy/Makefile
index edfaac48cbd5..1342585af381 100644
--- a/drivers/net/phy/Makefile
+++ b/drivers/net/phy/Makefile
@@ -20,3 +20,4 @@ obj-$(CONFIG_MDIO_BITBANG) += mdio-bitbang.o
20obj-$(CONFIG_MDIO_GPIO) += mdio-gpio.o 20obj-$(CONFIG_MDIO_GPIO) += mdio-gpio.o
21obj-$(CONFIG_NATIONAL_PHY) += national.o 21obj-$(CONFIG_NATIONAL_PHY) += national.o
22obj-$(CONFIG_STE10XP) += ste10Xp.o 22obj-$(CONFIG_STE10XP) += ste10Xp.o
23obj-$(CONFIG_MDIO_OCTEON) += mdio-octeon.o
diff --git a/drivers/net/phy/broadcom.c b/drivers/net/phy/broadcom.c
index f63c96a4ecb4..33c4b12a63ba 100644
--- a/drivers/net/phy/broadcom.c
+++ b/drivers/net/phy/broadcom.c
@@ -326,12 +326,13 @@ error:
326 326
327static void bcm54xx_adjust_rxrefclk(struct phy_device *phydev) 327static void bcm54xx_adjust_rxrefclk(struct phy_device *phydev)
328{ 328{
329 u32 val, orig; 329 u32 orig;
330 int val;
330 bool clk125en = true; 331 bool clk125en = true;
331 332
332 /* Abort if we are using an untested phy. */ 333 /* Abort if we are using an untested phy. */
333 if (BRCM_PHY_MODEL(phydev) != PHY_ID_BCM57780 || 334 if (BRCM_PHY_MODEL(phydev) != PHY_ID_BCM57780 &&
334 BRCM_PHY_MODEL(phydev) != PHY_ID_BCM50610 || 335 BRCM_PHY_MODEL(phydev) != PHY_ID_BCM50610 &&
335 BRCM_PHY_MODEL(phydev) != PHY_ID_BCM50610M) 336 BRCM_PHY_MODEL(phydev) != PHY_ID_BCM50610M)
336 return; 337 return;
337 338
diff --git a/drivers/net/phy/mdio-octeon.c b/drivers/net/phy/mdio-octeon.c
new file mode 100644
index 000000000000..61a4461cbda5
--- /dev/null
+++ b/drivers/net/phy/mdio-octeon.c
@@ -0,0 +1,180 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2009 Cavium Networks
7 */
8
9#include <linux/init.h>
10#include <linux/module.h>
11#include <linux/platform_device.h>
12#include <linux/phy.h>
13
14#include <asm/octeon/octeon.h>
15#include <asm/octeon/cvmx-smix-defs.h>
16
17#define DRV_VERSION "1.0"
18#define DRV_DESCRIPTION "Cavium Networks Octeon SMI/MDIO driver"
19
20struct octeon_mdiobus {
21 struct mii_bus *mii_bus;
22 int unit;
23 int phy_irq[PHY_MAX_ADDR];
24};
25
26static int octeon_mdiobus_read(struct mii_bus *bus, int phy_id, int regnum)
27{
28 struct octeon_mdiobus *p = bus->priv;
29 union cvmx_smix_cmd smi_cmd;
30 union cvmx_smix_rd_dat smi_rd;
31 int timeout = 1000;
32
33 smi_cmd.u64 = 0;
34 smi_cmd.s.phy_op = 1; /* MDIO_CLAUSE_22_READ */
35 smi_cmd.s.phy_adr = phy_id;
36 smi_cmd.s.reg_adr = regnum;
37 cvmx_write_csr(CVMX_SMIX_CMD(p->unit), smi_cmd.u64);
38
39 do {
40 /*
41 * Wait 1000 clocks so we don't saturate the RSL bus
42 * doing reads.
43 */
44 cvmx_wait(1000);
45 smi_rd.u64 = cvmx_read_csr(CVMX_SMIX_RD_DAT(p->unit));
46 } while (smi_rd.s.pending && --timeout);
47
48 if (smi_rd.s.val)
49 return smi_rd.s.dat;
50 else
51 return -EIO;
52}
53
54static int octeon_mdiobus_write(struct mii_bus *bus, int phy_id,
55 int regnum, u16 val)
56{
57 struct octeon_mdiobus *p = bus->priv;
58 union cvmx_smix_cmd smi_cmd;
59 union cvmx_smix_wr_dat smi_wr;
60 int timeout = 1000;
61
62 smi_wr.u64 = 0;
63 smi_wr.s.dat = val;
64 cvmx_write_csr(CVMX_SMIX_WR_DAT(p->unit), smi_wr.u64);
65
66 smi_cmd.u64 = 0;
67 smi_cmd.s.phy_op = 0; /* MDIO_CLAUSE_22_WRITE */
68 smi_cmd.s.phy_adr = phy_id;
69 smi_cmd.s.reg_adr = regnum;
70 cvmx_write_csr(CVMX_SMIX_CMD(p->unit), smi_cmd.u64);
71
72 do {
73 /*
74 * Wait 1000 clocks so we don't saturate the RSL bus
75 * doing reads.
76 */
77 cvmx_wait(1000);
78 smi_wr.u64 = cvmx_read_csr(CVMX_SMIX_WR_DAT(p->unit));
79 } while (smi_wr.s.pending && --timeout);
80
81 if (timeout <= 0)
82 return -EIO;
83
84 return 0;
85}
86
87static int __init octeon_mdiobus_probe(struct platform_device *pdev)
88{
89 struct octeon_mdiobus *bus;
90 int i;
91 int err = -ENOENT;
92
93 bus = devm_kzalloc(&pdev->dev, sizeof(*bus), GFP_KERNEL);
94 if (!bus)
95 return -ENOMEM;
96
97 /* The platform_device id is our unit number. */
98 bus->unit = pdev->id;
99
100 bus->mii_bus = mdiobus_alloc();
101
102 if (!bus->mii_bus)
103 goto err;
104
105 /*
106 * Standard Octeon evaluation boards don't support phy
107 * interrupts, we need to poll.
108 */
109 for (i = 0; i < PHY_MAX_ADDR; i++)
110 bus->phy_irq[i] = PHY_POLL;
111
112 bus->mii_bus->priv = bus;
113 bus->mii_bus->irq = bus->phy_irq;
114 bus->mii_bus->name = "mdio-octeon";
115 snprintf(bus->mii_bus->id, MII_BUS_ID_SIZE, "%x", bus->unit);
116 bus->mii_bus->parent = &pdev->dev;
117
118 bus->mii_bus->read = octeon_mdiobus_read;
119 bus->mii_bus->write = octeon_mdiobus_write;
120
121 dev_set_drvdata(&pdev->dev, bus);
122
123 err = mdiobus_register(bus->mii_bus);
124 if (err)
125 goto err_register;
126
127 dev_info(&pdev->dev, "Version " DRV_VERSION "\n");
128
129 return 0;
130err_register:
131 mdiobus_free(bus->mii_bus);
132
133err:
134 devm_kfree(&pdev->dev, bus);
135 return err;
136}
137
138static int __exit octeon_mdiobus_remove(struct platform_device *pdev)
139{
140 struct octeon_mdiobus *bus;
141
142 bus = dev_get_drvdata(&pdev->dev);
143
144 mdiobus_unregister(bus->mii_bus);
145 mdiobus_free(bus->mii_bus);
146 return 0;
147}
148
149static struct platform_driver octeon_mdiobus_driver = {
150 .driver = {
151 .name = "mdio-octeon",
152 .owner = THIS_MODULE,
153 },
154 .probe = octeon_mdiobus_probe,
155 .remove = __exit_p(octeon_mdiobus_remove),
156};
157
158void octeon_mdiobus_force_mod_depencency(void)
159{
160 /* Let ethernet drivers force us to be loaded. */
161}
162EXPORT_SYMBOL(octeon_mdiobus_force_mod_depencency);
163
164static int __init octeon_mdiobus_mod_init(void)
165{
166 return platform_driver_register(&octeon_mdiobus_driver);
167}
168
169static void __exit octeon_mdiobus_mod_exit(void)
170{
171 platform_driver_unregister(&octeon_mdiobus_driver);
172}
173
174module_init(octeon_mdiobus_mod_init);
175module_exit(octeon_mdiobus_mod_exit);
176
177MODULE_DESCRIPTION(DRV_DESCRIPTION);
178MODULE_VERSION(DRV_VERSION);
179MODULE_AUTHOR("David Daney");
180MODULE_LICENSE("GPL");
diff --git a/drivers/net/phy/mdio_bus.c b/drivers/net/phy/mdio_bus.c
index bd4e8d72dc08..e17b70291bbc 100644
--- a/drivers/net/phy/mdio_bus.c
+++ b/drivers/net/phy/mdio_bus.c
@@ -264,6 +264,8 @@ static int mdio_bus_match(struct device *dev, struct device_driver *drv)
264 (phydev->phy_id & phydrv->phy_id_mask)); 264 (phydev->phy_id & phydrv->phy_id_mask));
265} 265}
266 266
267#ifdef CONFIG_PM
268
267static bool mdio_bus_phy_may_suspend(struct phy_device *phydev) 269static bool mdio_bus_phy_may_suspend(struct phy_device *phydev)
268{ 270{
269 struct device_driver *drv = phydev->dev.driver; 271 struct device_driver *drv = phydev->dev.driver;
@@ -295,34 +297,88 @@ static bool mdio_bus_phy_may_suspend(struct phy_device *phydev)
295 return true; 297 return true;
296} 298}
297 299
298/* Suspend and resume. Copied from platform_suspend and 300static int mdio_bus_suspend(struct device *dev)
299 * platform_resume
300 */
301static int mdio_bus_suspend(struct device * dev, pm_message_t state)
302{ 301{
303 struct phy_driver *phydrv = to_phy_driver(dev->driver); 302 struct phy_driver *phydrv = to_phy_driver(dev->driver);
304 struct phy_device *phydev = to_phy_device(dev); 303 struct phy_device *phydev = to_phy_device(dev);
305 304
305 /*
306 * We must stop the state machine manually, otherwise it stops out of
307 * control, possibly with the phydev->lock held. Upon resume, netdev
308 * may call phy routines that try to grab the same lock, and that may
309 * lead to a deadlock.
310 */
311 if (phydev->attached_dev)
312 phy_stop_machine(phydev);
313
306 if (!mdio_bus_phy_may_suspend(phydev)) 314 if (!mdio_bus_phy_may_suspend(phydev))
307 return 0; 315 return 0;
316
308 return phydrv->suspend(phydev); 317 return phydrv->suspend(phydev);
309} 318}
310 319
311static int mdio_bus_resume(struct device * dev) 320static int mdio_bus_resume(struct device *dev)
312{ 321{
313 struct phy_driver *phydrv = to_phy_driver(dev->driver); 322 struct phy_driver *phydrv = to_phy_driver(dev->driver);
314 struct phy_device *phydev = to_phy_device(dev); 323 struct phy_device *phydev = to_phy_device(dev);
324 int ret;
315 325
316 if (!mdio_bus_phy_may_suspend(phydev)) 326 if (!mdio_bus_phy_may_suspend(phydev))
327 goto no_resume;
328
329 ret = phydrv->resume(phydev);
330 if (ret < 0)
331 return ret;
332
333no_resume:
334 if (phydev->attached_dev)
335 phy_start_machine(phydev, NULL);
336
337 return 0;
338}
339
340static int mdio_bus_restore(struct device *dev)
341{
342 struct phy_device *phydev = to_phy_device(dev);
343 struct net_device *netdev = phydev->attached_dev;
344 int ret;
345
346 if (!netdev)
317 return 0; 347 return 0;
318 return phydrv->resume(phydev); 348
349 ret = phy_init_hw(phydev);
350 if (ret < 0)
351 return ret;
352
353 /* The PHY needs to renegotiate. */
354 phydev->link = 0;
355 phydev->state = PHY_UP;
356
357 phy_start_machine(phydev, NULL);
358
359 return 0;
319} 360}
320 361
362static struct dev_pm_ops mdio_bus_pm_ops = {
363 .suspend = mdio_bus_suspend,
364 .resume = mdio_bus_resume,
365 .freeze = mdio_bus_suspend,
366 .thaw = mdio_bus_resume,
367 .restore = mdio_bus_restore,
368};
369
370#define MDIO_BUS_PM_OPS (&mdio_bus_pm_ops)
371
372#else
373
374#define MDIO_BUS_PM_OPS NULL
375
376#endif /* CONFIG_PM */
377
321struct bus_type mdio_bus_type = { 378struct bus_type mdio_bus_type = {
322 .name = "mdio_bus", 379 .name = "mdio_bus",
323 .match = mdio_bus_match, 380 .match = mdio_bus_match,
324 .suspend = mdio_bus_suspend, 381 .pm = MDIO_BUS_PM_OPS,
325 .resume = mdio_bus_resume,
326}; 382};
327EXPORT_SYMBOL(mdio_bus_type); 383EXPORT_SYMBOL(mdio_bus_type);
328 384
diff --git a/drivers/net/phy/phy.c b/drivers/net/phy/phy.c
index b0e9f9c51721..0295097d6c44 100644
--- a/drivers/net/phy/phy.c
+++ b/drivers/net/phy/phy.c
@@ -410,7 +410,6 @@ EXPORT_SYMBOL(phy_start_aneg);
410 410
411 411
412static void phy_change(struct work_struct *work); 412static void phy_change(struct work_struct *work);
413static void phy_state_machine(struct work_struct *work);
414 413
415/** 414/**
416 * phy_start_machine - start PHY state machine tracking 415 * phy_start_machine - start PHY state machine tracking
@@ -430,7 +429,6 @@ void phy_start_machine(struct phy_device *phydev,
430{ 429{
431 phydev->adjust_state = handler; 430 phydev->adjust_state = handler;
432 431
433 INIT_DELAYED_WORK(&phydev->state_queue, phy_state_machine);
434 schedule_delayed_work(&phydev->state_queue, HZ); 432 schedule_delayed_work(&phydev->state_queue, HZ);
435} 433}
436 434
@@ -761,7 +759,7 @@ EXPORT_SYMBOL(phy_start);
761 * phy_state_machine - Handle the state machine 759 * phy_state_machine - Handle the state machine
762 * @work: work_struct that describes the work to be done 760 * @work: work_struct that describes the work to be done
763 */ 761 */
764static void phy_state_machine(struct work_struct *work) 762void phy_state_machine(struct work_struct *work)
765{ 763{
766 struct delayed_work *dwork = to_delayed_work(work); 764 struct delayed_work *dwork = to_delayed_work(work);
767 struct phy_device *phydev = 765 struct phy_device *phydev =
diff --git a/drivers/net/phy/phy_device.c b/drivers/net/phy/phy_device.c
index b10fedd82143..adbc0fded130 100644
--- a/drivers/net/phy/phy_device.c
+++ b/drivers/net/phy/phy_device.c
@@ -177,6 +177,7 @@ struct phy_device* phy_device_create(struct mii_bus *bus, int addr, int phy_id)
177 dev->state = PHY_DOWN; 177 dev->state = PHY_DOWN;
178 178
179 mutex_init(&dev->lock); 179 mutex_init(&dev->lock);
180 INIT_DELAYED_WORK(&dev->state_queue, phy_state_machine);
180 181
181 return dev; 182 return dev;
182} 183}
@@ -378,6 +379,20 @@ void phy_disconnect(struct phy_device *phydev)
378} 379}
379EXPORT_SYMBOL(phy_disconnect); 380EXPORT_SYMBOL(phy_disconnect);
380 381
382int phy_init_hw(struct phy_device *phydev)
383{
384 int ret;
385
386 if (!phydev->drv || !phydev->drv->config_init)
387 return 0;
388
389 ret = phy_scan_fixups(phydev);
390 if (ret < 0)
391 return ret;
392
393 return phydev->drv->config_init(phydev);
394}
395
381/** 396/**
382 * phy_attach_direct - attach a network device to a given PHY device pointer 397 * phy_attach_direct - attach a network device to a given PHY device pointer
383 * @dev: network device to attach 398 * @dev: network device to attach
@@ -425,21 +440,7 @@ int phy_attach_direct(struct net_device *dev, struct phy_device *phydev,
425 /* Do initial configuration here, now that 440 /* Do initial configuration here, now that
426 * we have certain key parameters 441 * we have certain key parameters
427 * (dev_flags and interface) */ 442 * (dev_flags and interface) */
428 if (phydev->drv->config_init) { 443 return phy_init_hw(phydev);
429 int err;
430
431 err = phy_scan_fixups(phydev);
432
433 if (err < 0)
434 return err;
435
436 err = phydev->drv->config_init(phydev);
437
438 if (err < 0)
439 return err;
440 }
441
442 return 0;
443} 444}
444EXPORT_SYMBOL(phy_attach_direct); 445EXPORT_SYMBOL(phy_attach_direct);
445 446
diff --git a/drivers/net/qlge/qlge_main.c b/drivers/net/qlge/qlge_main.c
index 707b391afa02..894a7c84faef 100644
--- a/drivers/net/qlge/qlge_main.c
+++ b/drivers/net/qlge/qlge_main.c
@@ -4119,7 +4119,7 @@ static int __devinit ql_init_device(struct pci_dev *pdev,
4119 err = pcie_set_readrq(pdev, 4096); 4119 err = pcie_set_readrq(pdev, 4096);
4120 if (err) { 4120 if (err) {
4121 dev_err(&pdev->dev, "Set readrq failed.\n"); 4121 dev_err(&pdev->dev, "Set readrq failed.\n");
4122 goto err_out; 4122 goto err_out1;
4123 } 4123 }
4124 4124
4125 err = pci_request_regions(pdev, DRV_NAME); 4125 err = pci_request_regions(pdev, DRV_NAME);
@@ -4140,7 +4140,7 @@ static int __devinit ql_init_device(struct pci_dev *pdev,
4140 4140
4141 if (err) { 4141 if (err) {
4142 dev_err(&pdev->dev, "No usable DMA configuration.\n"); 4142 dev_err(&pdev->dev, "No usable DMA configuration.\n");
4143 goto err_out; 4143 goto err_out2;
4144 } 4144 }
4145 4145
4146 /* Set PCIe reset type for EEH to fundamental. */ 4146 /* Set PCIe reset type for EEH to fundamental. */
@@ -4152,7 +4152,7 @@ static int __devinit ql_init_device(struct pci_dev *pdev,
4152 if (!qdev->reg_base) { 4152 if (!qdev->reg_base) {
4153 dev_err(&pdev->dev, "Register mapping failed.\n"); 4153 dev_err(&pdev->dev, "Register mapping failed.\n");
4154 err = -ENOMEM; 4154 err = -ENOMEM;
4155 goto err_out; 4155 goto err_out2;
4156 } 4156 }
4157 4157
4158 qdev->doorbell_area_size = pci_resource_len(pdev, 3); 4158 qdev->doorbell_area_size = pci_resource_len(pdev, 3);
@@ -4162,14 +4162,14 @@ static int __devinit ql_init_device(struct pci_dev *pdev,
4162 if (!qdev->doorbell_area) { 4162 if (!qdev->doorbell_area) {
4163 dev_err(&pdev->dev, "Doorbell register mapping failed.\n"); 4163 dev_err(&pdev->dev, "Doorbell register mapping failed.\n");
4164 err = -ENOMEM; 4164 err = -ENOMEM;
4165 goto err_out; 4165 goto err_out2;
4166 } 4166 }
4167 4167
4168 err = ql_get_board_info(qdev); 4168 err = ql_get_board_info(qdev);
4169 if (err) { 4169 if (err) {
4170 dev_err(&pdev->dev, "Register access failed.\n"); 4170 dev_err(&pdev->dev, "Register access failed.\n");
4171 err = -EIO; 4171 err = -EIO;
4172 goto err_out; 4172 goto err_out2;
4173 } 4173 }
4174 qdev->msg_enable = netif_msg_init(debug, default_msg); 4174 qdev->msg_enable = netif_msg_init(debug, default_msg);
4175 spin_lock_init(&qdev->hw_lock); 4175 spin_lock_init(&qdev->hw_lock);
@@ -4179,7 +4179,7 @@ static int __devinit ql_init_device(struct pci_dev *pdev,
4179 err = qdev->nic_ops->get_flash(qdev); 4179 err = qdev->nic_ops->get_flash(qdev);
4180 if (err) { 4180 if (err) {
4181 dev_err(&pdev->dev, "Invalid FLASH.\n"); 4181 dev_err(&pdev->dev, "Invalid FLASH.\n");
4182 goto err_out; 4182 goto err_out2;
4183 } 4183 }
4184 4184
4185 memcpy(ndev->perm_addr, ndev->dev_addr, ndev->addr_len); 4185 memcpy(ndev->perm_addr, ndev->dev_addr, ndev->addr_len);
@@ -4212,8 +4212,9 @@ static int __devinit ql_init_device(struct pci_dev *pdev,
4212 DRV_NAME, DRV_VERSION); 4212 DRV_NAME, DRV_VERSION);
4213 } 4213 }
4214 return 0; 4214 return 0;
4215err_out: 4215err_out2:
4216 ql_release_all(pdev); 4216 ql_release_all(pdev);
4217err_out1:
4217 pci_disable_device(pdev); 4218 pci_disable_device(pdev);
4218 return err; 4219 return err;
4219} 4220}
diff --git a/drivers/net/rrunner.c b/drivers/net/rrunner.c
index 20a71749154a..1c257098d0a6 100644
--- a/drivers/net/rrunner.c
+++ b/drivers/net/rrunner.c
@@ -1293,7 +1293,7 @@ static void rr_dump(struct net_device *dev)
1293 1293
1294 printk("Error code 0x%x\n", readl(&regs->Fail1)); 1294 printk("Error code 0x%x\n", readl(&regs->Fail1));
1295 1295
1296 index = (((readl(&regs->EvtPrd) >> 8) & 0xff ) - 1) % EVT_RING_ENTRIES; 1296 index = (((readl(&regs->EvtPrd) >> 8) & 0xff) - 1) % TX_RING_ENTRIES;
1297 cons = rrpriv->dirty_tx; 1297 cons = rrpriv->dirty_tx;
1298 printk("TX ring index %i, TX consumer %i\n", 1298 printk("TX ring index %i, TX consumer %i\n",
1299 index, cons); 1299 index, cons);
diff --git a/drivers/net/s2io.c b/drivers/net/s2io.c
index cc4218667cba..3c4836d0898f 100644
--- a/drivers/net/s2io.c
+++ b/drivers/net/s2io.c
@@ -3421,7 +3421,7 @@ static int wait_for_cmd_complete(void __iomem *addr, u64 busy_bit,
3421 break; 3421 break;
3422 } 3422 }
3423 } else { 3423 } else {
3424 if (!(val64 & busy_bit)) { 3424 if (val64 & busy_bit) {
3425 ret = SUCCESS; 3425 ret = SUCCESS;
3426 break; 3426 break;
3427 } 3427 }
diff --git a/drivers/net/sfc/efx.c b/drivers/net/sfc/efx.c
index f983e3b507cc..46997e177ee3 100644
--- a/drivers/net/sfc/efx.c
+++ b/drivers/net/sfc/efx.c
@@ -741,14 +741,14 @@ static int efx_probe_port(struct efx_nic *efx)
741 741
742 EFX_LOG(efx, "create port\n"); 742 EFX_LOG(efx, "create port\n");
743 743
744 if (phy_flash_cfg)
745 efx->phy_mode = PHY_MODE_SPECIAL;
746
744 /* Connect up MAC/PHY operations table */ 747 /* Connect up MAC/PHY operations table */
745 rc = efx->type->probe_port(efx); 748 rc = efx->type->probe_port(efx);
746 if (rc) 749 if (rc)
747 goto err; 750 goto err;
748 751
749 if (phy_flash_cfg)
750 efx->phy_mode = PHY_MODE_SPECIAL;
751
752 /* Sanity check MAC address */ 752 /* Sanity check MAC address */
753 if (is_valid_ether_addr(efx->mac_address)) { 753 if (is_valid_ether_addr(efx->mac_address)) {
754 memcpy(efx->net_dev->dev_addr, efx->mac_address, ETH_ALEN); 754 memcpy(efx->net_dev->dev_addr, efx->mac_address, ETH_ALEN);
@@ -2284,6 +2284,7 @@ static int __devinit efx_pci_probe(struct pci_dev *pci_dev,
2284 fail2: 2284 fail2:
2285 efx_fini_struct(efx); 2285 efx_fini_struct(efx);
2286 fail1: 2286 fail1:
2287 WARN_ON(rc > 0);
2287 EFX_LOG(efx, "initialisation failed. rc=%d\n", rc); 2288 EFX_LOG(efx, "initialisation failed. rc=%d\n", rc);
2288 free_netdev(net_dev); 2289 free_netdev(net_dev);
2289 return rc; 2290 return rc;
diff --git a/drivers/net/sfc/falcon.c b/drivers/net/sfc/falcon.c
index 17afcd26e870..9d009c46e962 100644
--- a/drivers/net/sfc/falcon.c
+++ b/drivers/net/sfc/falcon.c
@@ -925,6 +925,7 @@ static int falcon_probe_port(struct efx_nic *efx)
925 925
926static void falcon_remove_port(struct efx_nic *efx) 926static void falcon_remove_port(struct efx_nic *efx)
927{ 927{
928 efx->phy_op->remove(efx);
928 efx_nic_free_buffer(efx, &efx->stats_buffer); 929 efx_nic_free_buffer(efx, &efx->stats_buffer);
929} 930}
930 931
diff --git a/drivers/net/sfc/falcon_boards.c b/drivers/net/sfc/falcon_boards.c
index bf0b96af5334..5712fddd72f2 100644
--- a/drivers/net/sfc/falcon_boards.c
+++ b/drivers/net/sfc/falcon_boards.c
@@ -29,6 +29,15 @@
29#define FALCON_BOARD_SFN4111T 0x51 29#define FALCON_BOARD_SFN4111T 0x51
30#define FALCON_BOARD_SFN4112F 0x52 30#define FALCON_BOARD_SFN4112F 0x52
31 31
32/* Board temperature is about 15°C above ambient when air flow is
33 * limited. */
34#define FALCON_BOARD_TEMP_BIAS 15
35
36/* SFC4000 datasheet says: 'The maximum permitted junction temperature
37 * is 125°C; the thermal design of the environment for the SFC4000
38 * should aim to keep this well below 100°C.' */
39#define FALCON_JUNC_TEMP_MAX 90
40
32/***************************************************************************** 41/*****************************************************************************
33 * Support for LM87 sensor chip used on several boards 42 * Support for LM87 sensor chip used on several boards
34 */ 43 */
@@ -548,16 +557,16 @@ fail_hwmon:
548static u8 sfe4002_lm87_channel = 0x03; /* use AIN not FAN inputs */ 557static u8 sfe4002_lm87_channel = 0x03; /* use AIN not FAN inputs */
549 558
550static const u8 sfe4002_lm87_regs[] = { 559static const u8 sfe4002_lm87_regs[] = {
551 LM87_IN_LIMITS(0, 0x83, 0x91), /* 2.5V: 1.8V +/- 5% */ 560 LM87_IN_LIMITS(0, 0x7c, 0x99), /* 2.5V: 1.8V +/- 10% */
552 LM87_IN_LIMITS(1, 0x51, 0x5a), /* Vccp1: 1.2V +/- 5% */ 561 LM87_IN_LIMITS(1, 0x4c, 0x5e), /* Vccp1: 1.2V +/- 10% */
553 LM87_IN_LIMITS(2, 0xb6, 0xca), /* 3.3V: 3.3V +/- 5% */ 562 LM87_IN_LIMITS(2, 0xac, 0xd4), /* 3.3V: 3.3V +/- 10% */
554 LM87_IN_LIMITS(3, 0xb0, 0xc9), /* 5V: 4.6-5.2V */ 563 LM87_IN_LIMITS(3, 0xac, 0xd4), /* 5V: 5.0V +/- 10% */
555 LM87_IN_LIMITS(4, 0xb0, 0xe0), /* 12V: 11-14V */ 564 LM87_IN_LIMITS(4, 0xac, 0xe0), /* 12V: 10.8-14V */
556 LM87_IN_LIMITS(5, 0x44, 0x4b), /* Vccp2: 1.0V +/- 5% */ 565 LM87_IN_LIMITS(5, 0x3f, 0x4f), /* Vccp2: 1.0V +/- 10% */
557 LM87_AIN_LIMITS(0, 0xa0, 0xb2), /* AIN1: 1.66V +/- 5% */ 566 LM87_AIN_LIMITS(0, 0x98, 0xbb), /* AIN1: 1.66V +/- 10% */
558 LM87_AIN_LIMITS(1, 0x91, 0xa1), /* AIN2: 1.5V +/- 5% */ 567 LM87_AIN_LIMITS(1, 0x8a, 0xa9), /* AIN2: 1.5V +/- 10% */
559 LM87_TEMP_INT_LIMITS(10, 60), /* board */ 568 LM87_TEMP_INT_LIMITS(0, 80 + FALCON_BOARD_TEMP_BIAS),
560 LM87_TEMP_EXT1_LIMITS(10, 70), /* Falcon */ 569 LM87_TEMP_EXT1_LIMITS(0, FALCON_JUNC_TEMP_MAX),
561 0 570 0
562}; 571};
563 572
@@ -619,14 +628,14 @@ static int sfe4002_init(struct efx_nic *efx)
619static u8 sfn4112f_lm87_channel = 0x03; /* use AIN not FAN inputs */ 628static u8 sfn4112f_lm87_channel = 0x03; /* use AIN not FAN inputs */
620 629
621static const u8 sfn4112f_lm87_regs[] = { 630static const u8 sfn4112f_lm87_regs[] = {
622 LM87_IN_LIMITS(0, 0x83, 0x91), /* 2.5V: 1.8V +/- 5% */ 631 LM87_IN_LIMITS(0, 0x7c, 0x99), /* 2.5V: 1.8V +/- 10% */
623 LM87_IN_LIMITS(1, 0x51, 0x5a), /* Vccp1: 1.2V +/- 5% */ 632 LM87_IN_LIMITS(1, 0x4c, 0x5e), /* Vccp1: 1.2V +/- 10% */
624 LM87_IN_LIMITS(2, 0xb6, 0xca), /* 3.3V: 3.3V +/- 5% */ 633 LM87_IN_LIMITS(2, 0xac, 0xd4), /* 3.3V: 3.3V +/- 10% */
625 LM87_IN_LIMITS(4, 0xb0, 0xe0), /* 12V: 11-14V */ 634 LM87_IN_LIMITS(4, 0xac, 0xe0), /* 12V: 10.8-14V */
626 LM87_IN_LIMITS(5, 0x44, 0x4b), /* Vccp2: 1.0V +/- 5% */ 635 LM87_IN_LIMITS(5, 0x3f, 0x4f), /* Vccp2: 1.0V +/- 10% */
627 LM87_AIN_LIMITS(1, 0x91, 0xa1), /* AIN2: 1.5V +/- 5% */ 636 LM87_AIN_LIMITS(1, 0x8a, 0xa9), /* AIN2: 1.5V +/- 10% */
628 LM87_TEMP_INT_LIMITS(10, 60), /* board */ 637 LM87_TEMP_INT_LIMITS(0, 60 + FALCON_BOARD_TEMP_BIAS),
629 LM87_TEMP_EXT1_LIMITS(10, 70), /* Falcon */ 638 LM87_TEMP_EXT1_LIMITS(0, FALCON_JUNC_TEMP_MAX),
630 0 639 0
631}; 640};
632 641
diff --git a/drivers/net/sfc/falcon_xmac.c b/drivers/net/sfc/falcon_xmac.c
index 3da933f8f079..8ccab2c67a20 100644
--- a/drivers/net/sfc/falcon_xmac.c
+++ b/drivers/net/sfc/falcon_xmac.c
@@ -111,16 +111,12 @@ static void falcon_mask_status_intr(struct efx_nic *efx, bool enable)
111 efx_writeo(efx, &reg, FR_AB_XM_MGT_INT_MASK); 111 efx_writeo(efx, &reg, FR_AB_XM_MGT_INT_MASK);
112} 112}
113 113
114/* Get status of XAUI link */ 114static bool falcon_xgxs_link_ok(struct efx_nic *efx)
115static bool falcon_xaui_link_ok(struct efx_nic *efx)
116{ 115{
117 efx_oword_t reg; 116 efx_oword_t reg;
118 bool align_done, link_ok = false; 117 bool align_done, link_ok = false;
119 int sync_status; 118 int sync_status;
120 119
121 if (LOOPBACK_INTERNAL(efx))
122 return true;
123
124 /* Read link status */ 120 /* Read link status */
125 efx_reado(efx, &reg, FR_AB_XX_CORE_STAT); 121 efx_reado(efx, &reg, FR_AB_XX_CORE_STAT);
126 122
@@ -135,14 +131,24 @@ static bool falcon_xaui_link_ok(struct efx_nic *efx)
135 EFX_SET_OWORD_FIELD(reg, FRF_AB_XX_DISPERR, FFE_AB_XX_STAT_ALL_LANES); 131 EFX_SET_OWORD_FIELD(reg, FRF_AB_XX_DISPERR, FFE_AB_XX_STAT_ALL_LANES);
136 efx_writeo(efx, &reg, FR_AB_XX_CORE_STAT); 132 efx_writeo(efx, &reg, FR_AB_XX_CORE_STAT);
137 133
138 /* If the link is up, then check the phy side of the xaui link */
139 if (efx->link_state.up && link_ok)
140 if (efx->mdio.mmds & (1 << MDIO_MMD_PHYXS))
141 link_ok = efx_mdio_phyxgxs_lane_sync(efx);
142
143 return link_ok; 134 return link_ok;
144} 135}
145 136
137static bool falcon_xmac_link_ok(struct efx_nic *efx)
138{
139 /*
140 * Check MAC's XGXS link status except when using XGMII loopback
141 * which bypasses the XGXS block.
142 * If possible, check PHY's XGXS link status except when using
143 * MAC loopback.
144 */
145 return (efx->loopback_mode == LOOPBACK_XGMII ||
146 falcon_xgxs_link_ok(efx)) &&
147 (!(efx->mdio.mmds & (1 << MDIO_MMD_PHYXS)) ||
148 LOOPBACK_INTERNAL(efx) ||
149 efx_mdio_phyxgxs_lane_sync(efx));
150}
151
146void falcon_reconfigure_xmac_core(struct efx_nic *efx) 152void falcon_reconfigure_xmac_core(struct efx_nic *efx)
147{ 153{
148 unsigned int max_frame_len; 154 unsigned int max_frame_len;
@@ -245,9 +251,9 @@ static void falcon_reconfigure_xgxs_core(struct efx_nic *efx)
245 251
246 252
247/* Try to bring up the Falcon side of the Falcon-Phy XAUI link */ 253/* Try to bring up the Falcon side of the Falcon-Phy XAUI link */
248static bool falcon_check_xaui_link_up(struct efx_nic *efx, int tries) 254static bool falcon_xmac_link_ok_retry(struct efx_nic *efx, int tries)
249{ 255{
250 bool mac_up = falcon_xaui_link_ok(efx); 256 bool mac_up = falcon_xmac_link_ok(efx);
251 257
252 if (LOOPBACK_MASK(efx) & LOOPBACKS_EXTERNAL(efx) & LOOPBACKS_WS || 258 if (LOOPBACK_MASK(efx) & LOOPBACKS_EXTERNAL(efx) & LOOPBACKS_WS ||
253 efx_phy_mode_disabled(efx->phy_mode)) 259 efx_phy_mode_disabled(efx->phy_mode))
@@ -261,7 +267,7 @@ static bool falcon_check_xaui_link_up(struct efx_nic *efx, int tries)
261 falcon_reset_xaui(efx); 267 falcon_reset_xaui(efx);
262 udelay(200); 268 udelay(200);
263 269
264 mac_up = falcon_xaui_link_ok(efx); 270 mac_up = falcon_xmac_link_ok(efx);
265 --tries; 271 --tries;
266 } 272 }
267 273
@@ -272,7 +278,7 @@ static bool falcon_check_xaui_link_up(struct efx_nic *efx, int tries)
272 278
273static bool falcon_xmac_check_fault(struct efx_nic *efx) 279static bool falcon_xmac_check_fault(struct efx_nic *efx)
274{ 280{
275 return !falcon_check_xaui_link_up(efx, 5); 281 return !falcon_xmac_link_ok_retry(efx, 5);
276} 282}
277 283
278static int falcon_reconfigure_xmac(struct efx_nic *efx) 284static int falcon_reconfigure_xmac(struct efx_nic *efx)
@@ -284,7 +290,7 @@ static int falcon_reconfigure_xmac(struct efx_nic *efx)
284 290
285 falcon_reconfigure_mac_wrapper(efx); 291 falcon_reconfigure_mac_wrapper(efx);
286 292
287 efx->xmac_poll_required = !falcon_check_xaui_link_up(efx, 5); 293 efx->xmac_poll_required = !falcon_xmac_link_ok_retry(efx, 5);
288 falcon_mask_status_intr(efx, true); 294 falcon_mask_status_intr(efx, true);
289 295
290 return 0; 296 return 0;
@@ -357,7 +363,7 @@ void falcon_poll_xmac(struct efx_nic *efx)
357 return; 363 return;
358 364
359 falcon_mask_status_intr(efx, false); 365 falcon_mask_status_intr(efx, false);
360 efx->xmac_poll_required = !falcon_check_xaui_link_up(efx, 1); 366 efx->xmac_poll_required = !falcon_xmac_link_ok_retry(efx, 1);
361 falcon_mask_status_intr(efx, true); 367 falcon_mask_status_intr(efx, true);
362} 368}
363 369
diff --git a/drivers/net/sfc/mcdi.c b/drivers/net/sfc/mcdi.c
index 683353b904c7..f66b3da6ddff 100644
--- a/drivers/net/sfc/mcdi.c
+++ b/drivers/net/sfc/mcdi.c
@@ -127,7 +127,7 @@ static int efx_mcdi_poll(struct efx_nic *efx)
127 efx_dword_t reg; 127 efx_dword_t reg;
128 128
129 /* Check for a reboot atomically with respect to efx_mcdi_copyout() */ 129 /* Check for a reboot atomically with respect to efx_mcdi_copyout() */
130 rc = efx_mcdi_poll_reboot(efx); 130 rc = -efx_mcdi_poll_reboot(efx);
131 if (rc) 131 if (rc)
132 goto out; 132 goto out;
133 133
@@ -142,8 +142,9 @@ static int efx_mcdi_poll(struct efx_nic *efx)
142 if (spins != 0) { 142 if (spins != 0) {
143 --spins; 143 --spins;
144 udelay(1); 144 udelay(1);
145 } else 145 } else {
146 schedule(); 146 schedule_timeout_uninterruptible(1);
147 }
147 148
148 time = get_seconds(); 149 time = get_seconds();
149 150
@@ -803,7 +804,7 @@ int efx_mcdi_nvram_read(struct efx_nic *efx, unsigned int type,
803 loff_t offset, u8 *buffer, size_t length) 804 loff_t offset, u8 *buffer, size_t length)
804{ 805{
805 u8 inbuf[MC_CMD_NVRAM_READ_IN_LEN]; 806 u8 inbuf[MC_CMD_NVRAM_READ_IN_LEN];
806 u8 outbuf[MC_CMD_NVRAM_READ_OUT_LEN(length)]; 807 u8 outbuf[MC_CMD_NVRAM_READ_OUT_LEN(EFX_MCDI_NVRAM_LEN_MAX)];
807 size_t outlen; 808 size_t outlen;
808 int rc; 809 int rc;
809 810
@@ -827,7 +828,7 @@ fail:
827int efx_mcdi_nvram_write(struct efx_nic *efx, unsigned int type, 828int efx_mcdi_nvram_write(struct efx_nic *efx, unsigned int type,
828 loff_t offset, const u8 *buffer, size_t length) 829 loff_t offset, const u8 *buffer, size_t length)
829{ 830{
830 u8 inbuf[MC_CMD_NVRAM_WRITE_IN_LEN(length)]; 831 u8 inbuf[MC_CMD_NVRAM_WRITE_IN_LEN(EFX_MCDI_NVRAM_LEN_MAX)];
831 int rc; 832 int rc;
832 833
833 MCDI_SET_DWORD(inbuf, NVRAM_WRITE_IN_TYPE, type); 834 MCDI_SET_DWORD(inbuf, NVRAM_WRITE_IN_TYPE, type);
@@ -837,7 +838,8 @@ int efx_mcdi_nvram_write(struct efx_nic *efx, unsigned int type,
837 838
838 BUILD_BUG_ON(MC_CMD_NVRAM_WRITE_OUT_LEN != 0); 839 BUILD_BUG_ON(MC_CMD_NVRAM_WRITE_OUT_LEN != 0);
839 840
840 rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_WRITE, inbuf, sizeof(inbuf), 841 rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_WRITE, inbuf,
842 ALIGN(MC_CMD_NVRAM_WRITE_IN_LEN(length), 4),
841 NULL, 0, NULL); 843 NULL, 0, NULL);
842 if (rc) 844 if (rc)
843 goto fail; 845 goto fail;
diff --git a/drivers/net/sfc/mcdi.h b/drivers/net/sfc/mcdi.h
index de916728c2e3..10ce98f4c0fb 100644
--- a/drivers/net/sfc/mcdi.h
+++ b/drivers/net/sfc/mcdi.h
@@ -111,6 +111,7 @@ extern int efx_mcdi_nvram_read(struct efx_nic *efx, unsigned int type,
111extern int efx_mcdi_nvram_write(struct efx_nic *efx, unsigned int type, 111extern int efx_mcdi_nvram_write(struct efx_nic *efx, unsigned int type,
112 loff_t offset, const u8 *buffer, 112 loff_t offset, const u8 *buffer,
113 size_t length); 113 size_t length);
114#define EFX_MCDI_NVRAM_LEN_MAX 128
114extern int efx_mcdi_nvram_erase(struct efx_nic *efx, unsigned int type, 115extern int efx_mcdi_nvram_erase(struct efx_nic *efx, unsigned int type,
115 loff_t offset, size_t length); 116 loff_t offset, size_t length);
116extern int efx_mcdi_nvram_update_finish(struct efx_nic *efx, 117extern int efx_mcdi_nvram_update_finish(struct efx_nic *efx,
diff --git a/drivers/net/sfc/mcdi_pcol.h b/drivers/net/sfc/mcdi_pcol.h
index 2a85360a46f0..73e71f420624 100644
--- a/drivers/net/sfc/mcdi_pcol.h
+++ b/drivers/net/sfc/mcdi_pcol.h
@@ -1090,8 +1090,10 @@
1090#define MC_CMD_MAC_RX_LANES01_DISP_ERR 57 1090#define MC_CMD_MAC_RX_LANES01_DISP_ERR 57
1091#define MC_CMD_MAC_RX_LANES23_DISP_ERR 58 1091#define MC_CMD_MAC_RX_LANES23_DISP_ERR 58
1092#define MC_CMD_MAC_RX_MATCH_FAULT 59 1092#define MC_CMD_MAC_RX_MATCH_FAULT 59
1093#define MC_CMD_GMAC_DMABUF_START 64
1094#define MC_CMD_GMAC_DMABUF_END 95
1093/* Insert new members here. */ 1095/* Insert new members here. */
1094#define MC_CMD_MAC_GENERATION_END 60 1096#define MC_CMD_MAC_GENERATION_END 96
1095#define MC_CMD_MAC_NSTATS (MC_CMD_MAC_GENERATION_END+1) 1097#define MC_CMD_MAC_NSTATS (MC_CMD_MAC_GENERATION_END+1)
1096 1098
1097/* MC_CMD_MAC_STATS: 1099/* MC_CMD_MAC_STATS:
diff --git a/drivers/net/sfc/mcdi_phy.c b/drivers/net/sfc/mcdi_phy.c
index 0e1bcc5a0d52..eb694af7a473 100644
--- a/drivers/net/sfc/mcdi_phy.c
+++ b/drivers/net/sfc/mcdi_phy.c
@@ -304,31 +304,47 @@ static u32 mcdi_to_ethtool_media(u32 media)
304 304
305static int efx_mcdi_phy_probe(struct efx_nic *efx) 305static int efx_mcdi_phy_probe(struct efx_nic *efx)
306{ 306{
307 struct efx_mcdi_phy_cfg *phy_cfg; 307 struct efx_mcdi_phy_cfg *phy_data;
308 u8 outbuf[MC_CMD_GET_LINK_OUT_LEN];
309 u32 caps;
308 int rc; 310 int rc;
309 311
310 /* TODO: Move phy_data initialisation to 312 /* Initialise and populate phy_data */
311 * phy_op->probe/remove, rather than init/fini */ 313 phy_data = kzalloc(sizeof(*phy_data), GFP_KERNEL);
312 phy_cfg = kzalloc(sizeof(*phy_cfg), GFP_KERNEL); 314 if (phy_data == NULL)
313 if (phy_cfg == NULL) { 315 return -ENOMEM;
314 rc = -ENOMEM; 316
315 goto fail_alloc; 317 rc = efx_mcdi_get_phy_cfg(efx, phy_data);
316 }
317 rc = efx_mcdi_get_phy_cfg(efx, phy_cfg);
318 if (rc != 0) 318 if (rc != 0)
319 goto fail; 319 goto fail;
320 320
321 efx->phy_type = phy_cfg->type; 321 /* Read initial link advertisement */
322 BUILD_BUG_ON(MC_CMD_GET_LINK_IN_LEN != 0);
323 rc = efx_mcdi_rpc(efx, MC_CMD_GET_LINK, NULL, 0,
324 outbuf, sizeof(outbuf), NULL);
325 if (rc)
326 goto fail;
327
328 /* Fill out nic state */
329 efx->phy_data = phy_data;
330 efx->phy_type = phy_data->type;
322 331
323 efx->mdio_bus = phy_cfg->channel; 332 efx->mdio_bus = phy_data->channel;
324 efx->mdio.prtad = phy_cfg->port; 333 efx->mdio.prtad = phy_data->port;
325 efx->mdio.mmds = phy_cfg->mmd_mask & ~(1 << MC_CMD_MMD_CLAUSE22); 334 efx->mdio.mmds = phy_data->mmd_mask & ~(1 << MC_CMD_MMD_CLAUSE22);
326 efx->mdio.mode_support = 0; 335 efx->mdio.mode_support = 0;
327 if (phy_cfg->mmd_mask & (1 << MC_CMD_MMD_CLAUSE22)) 336 if (phy_data->mmd_mask & (1 << MC_CMD_MMD_CLAUSE22))
328 efx->mdio.mode_support |= MDIO_SUPPORTS_C22; 337 efx->mdio.mode_support |= MDIO_SUPPORTS_C22;
329 if (phy_cfg->mmd_mask & ~(1 << MC_CMD_MMD_CLAUSE22)) 338 if (phy_data->mmd_mask & ~(1 << MC_CMD_MMD_CLAUSE22))
330 efx->mdio.mode_support |= MDIO_SUPPORTS_C45 | MDIO_EMULATE_C22; 339 efx->mdio.mode_support |= MDIO_SUPPORTS_C45 | MDIO_EMULATE_C22;
331 340
341 caps = MCDI_DWORD(outbuf, GET_LINK_OUT_CAP);
342 if (caps & (1 << MC_CMD_PHY_CAP_AN_LBN))
343 efx->link_advertising =
344 mcdi_to_ethtool_cap(phy_data->media, caps);
345 else
346 phy_data->forced_cap = caps;
347
332 /* Assert that we can map efx -> mcdi loopback modes */ 348 /* Assert that we can map efx -> mcdi loopback modes */
333 BUILD_BUG_ON(LOOPBACK_NONE != MC_CMD_LOOPBACK_NONE); 349 BUILD_BUG_ON(LOOPBACK_NONE != MC_CMD_LOOPBACK_NONE);
334 BUILD_BUG_ON(LOOPBACK_DATA != MC_CMD_LOOPBACK_DATA); 350 BUILD_BUG_ON(LOOPBACK_DATA != MC_CMD_LOOPBACK_DATA);
@@ -365,46 +381,6 @@ static int efx_mcdi_phy_probe(struct efx_nic *efx)
365 * but by convention we don't */ 381 * but by convention we don't */
366 efx->loopback_modes &= ~(1 << LOOPBACK_NONE); 382 efx->loopback_modes &= ~(1 << LOOPBACK_NONE);
367 383
368 kfree(phy_cfg);
369
370 return 0;
371
372fail:
373 kfree(phy_cfg);
374fail_alloc:
375 return rc;
376}
377
378static int efx_mcdi_phy_init(struct efx_nic *efx)
379{
380 struct efx_mcdi_phy_cfg *phy_data;
381 u8 outbuf[MC_CMD_GET_LINK_OUT_LEN];
382 u32 caps;
383 int rc;
384
385 phy_data = kzalloc(sizeof(*phy_data), GFP_KERNEL);
386 if (phy_data == NULL)
387 return -ENOMEM;
388
389 rc = efx_mcdi_get_phy_cfg(efx, phy_data);
390 if (rc != 0)
391 goto fail;
392
393 efx->phy_data = phy_data;
394
395 BUILD_BUG_ON(MC_CMD_GET_LINK_IN_LEN != 0);
396 rc = efx_mcdi_rpc(efx, MC_CMD_GET_LINK, NULL, 0,
397 outbuf, sizeof(outbuf), NULL);
398 if (rc)
399 goto fail;
400
401 caps = MCDI_DWORD(outbuf, GET_LINK_OUT_CAP);
402 if (caps & (1 << MC_CMD_PHY_CAP_AN_LBN))
403 efx->link_advertising =
404 mcdi_to_ethtool_cap(phy_data->media, caps);
405 else
406 phy_data->forced_cap = caps;
407
408 return 0; 384 return 0;
409 385
410fail: 386fail:
@@ -504,7 +480,7 @@ static bool efx_mcdi_phy_poll(struct efx_nic *efx)
504 return !efx_link_state_equal(&efx->link_state, &old_state); 480 return !efx_link_state_equal(&efx->link_state, &old_state);
505} 481}
506 482
507static void efx_mcdi_phy_fini(struct efx_nic *efx) 483static void efx_mcdi_phy_remove(struct efx_nic *efx)
508{ 484{
509 struct efx_mcdi_phy_data *phy_data = efx->phy_data; 485 struct efx_mcdi_phy_data *phy_data = efx->phy_data;
510 486
@@ -586,10 +562,11 @@ static int efx_mcdi_phy_set_settings(struct efx_nic *efx, struct ethtool_cmd *ec
586 562
587struct efx_phy_operations efx_mcdi_phy_ops = { 563struct efx_phy_operations efx_mcdi_phy_ops = {
588 .probe = efx_mcdi_phy_probe, 564 .probe = efx_mcdi_phy_probe,
589 .init = efx_mcdi_phy_init, 565 .init = efx_port_dummy_op_int,
590 .reconfigure = efx_mcdi_phy_reconfigure, 566 .reconfigure = efx_mcdi_phy_reconfigure,
591 .poll = efx_mcdi_phy_poll, 567 .poll = efx_mcdi_phy_poll,
592 .fini = efx_mcdi_phy_fini, 568 .fini = efx_port_dummy_op_void,
569 .remove = efx_mcdi_phy_remove,
593 .get_settings = efx_mcdi_phy_get_settings, 570 .get_settings = efx_mcdi_phy_get_settings,
594 .set_settings = efx_mcdi_phy_set_settings, 571 .set_settings = efx_mcdi_phy_set_settings,
595 .run_tests = NULL, 572 .run_tests = NULL,
diff --git a/drivers/net/sfc/mtd.c b/drivers/net/sfc/mtd.c
index 3a464529a46b..407bbaddfea6 100644
--- a/drivers/net/sfc/mtd.c
+++ b/drivers/net/sfc/mtd.c
@@ -23,7 +23,6 @@
23#include "mcdi_pcol.h" 23#include "mcdi_pcol.h"
24 24
25#define EFX_SPI_VERIFY_BUF_LEN 16 25#define EFX_SPI_VERIFY_BUF_LEN 16
26#define EFX_MCDI_CHUNK_LEN 128
27 26
28struct efx_mtd_partition { 27struct efx_mtd_partition {
29 struct mtd_info mtd; 28 struct mtd_info mtd;
@@ -428,7 +427,7 @@ static int siena_mtd_read(struct mtd_info *mtd, loff_t start,
428 int rc = 0; 427 int rc = 0;
429 428
430 while (offset < end) { 429 while (offset < end) {
431 chunk = min_t(size_t, end - offset, EFX_MCDI_CHUNK_LEN); 430 chunk = min_t(size_t, end - offset, EFX_MCDI_NVRAM_LEN_MAX);
432 rc = efx_mcdi_nvram_read(efx, part->mcdi.nvram_type, offset, 431 rc = efx_mcdi_nvram_read(efx, part->mcdi.nvram_type, offset,
433 buffer, chunk); 432 buffer, chunk);
434 if (rc) 433 if (rc)
@@ -491,7 +490,7 @@ static int siena_mtd_write(struct mtd_info *mtd, loff_t start,
491 } 490 }
492 491
493 while (offset < end) { 492 while (offset < end) {
494 chunk = min_t(size_t, end - offset, EFX_MCDI_CHUNK_LEN); 493 chunk = min_t(size_t, end - offset, EFX_MCDI_NVRAM_LEN_MAX);
495 rc = efx_mcdi_nvram_write(efx, part->mcdi.nvram_type, offset, 494 rc = efx_mcdi_nvram_write(efx, part->mcdi.nvram_type, offset,
496 buffer, chunk); 495 buffer, chunk);
497 if (rc) 496 if (rc)
diff --git a/drivers/net/sfc/net_driver.h b/drivers/net/sfc/net_driver.h
index 34c381f009b7..d5aab5b3fa06 100644
--- a/drivers/net/sfc/net_driver.h
+++ b/drivers/net/sfc/net_driver.h
@@ -524,6 +524,7 @@ struct efx_phy_operations {
524 int (*probe) (struct efx_nic *efx); 524 int (*probe) (struct efx_nic *efx);
525 int (*init) (struct efx_nic *efx); 525 int (*init) (struct efx_nic *efx);
526 void (*fini) (struct efx_nic *efx); 526 void (*fini) (struct efx_nic *efx);
527 void (*remove) (struct efx_nic *efx);
527 int (*reconfigure) (struct efx_nic *efx); 528 int (*reconfigure) (struct efx_nic *efx);
528 bool (*poll) (struct efx_nic *efx); 529 bool (*poll) (struct efx_nic *efx);
529 void (*get_settings) (struct efx_nic *efx, 530 void (*get_settings) (struct efx_nic *efx,
diff --git a/drivers/net/sfc/nic.c b/drivers/net/sfc/nic.c
index a577be227862..db44224ed2ca 100644
--- a/drivers/net/sfc/nic.c
+++ b/drivers/net/sfc/nic.c
@@ -1576,6 +1576,8 @@ void efx_nic_init_common(struct efx_nic *efx)
1576 EFX_SET_OWORD_FIELD(temp, FRF_AZ_TX_SOFT_EVT_EN, 1); 1576 EFX_SET_OWORD_FIELD(temp, FRF_AZ_TX_SOFT_EVT_EN, 1);
1577 /* Prefetch threshold 2 => fetch when descriptor cache half empty */ 1577 /* Prefetch threshold 2 => fetch when descriptor cache half empty */
1578 EFX_SET_OWORD_FIELD(temp, FRF_AZ_TX_PREF_THRESHOLD, 2); 1578 EFX_SET_OWORD_FIELD(temp, FRF_AZ_TX_PREF_THRESHOLD, 2);
1579 /* Disable hardware watchdog which can misfire */
1580 EFX_SET_OWORD_FIELD(temp, FRF_AZ_TX_PREF_WD_TMR, 0x3fffff);
1579 /* Squash TX of packets of 16 bytes or less */ 1581 /* Squash TX of packets of 16 bytes or less */
1580 if (efx_nic_rev(efx) >= EFX_REV_FALCON_B0) 1582 if (efx_nic_rev(efx) >= EFX_REV_FALCON_B0)
1581 EFX_SET_OWORD_FIELD(temp, FRF_BZ_TX_FLUSH_MIN_LEN_EN, 1); 1583 EFX_SET_OWORD_FIELD(temp, FRF_BZ_TX_FLUSH_MIN_LEN_EN, 1);
diff --git a/drivers/net/sfc/qt202x_phy.c b/drivers/net/sfc/qt202x_phy.c
index 3800fc791b2f..67eec7a6e487 100644
--- a/drivers/net/sfc/qt202x_phy.c
+++ b/drivers/net/sfc/qt202x_phy.c
@@ -33,6 +33,9 @@
33#define PCS_FW_HEARTBEAT_REG 0xd7ee 33#define PCS_FW_HEARTBEAT_REG 0xd7ee
34#define PCS_FW_HEARTB_LBN 0 34#define PCS_FW_HEARTB_LBN 0
35#define PCS_FW_HEARTB_WIDTH 8 35#define PCS_FW_HEARTB_WIDTH 8
36#define PCS_FW_PRODUCT_CODE_1 0xd7f0
37#define PCS_FW_VERSION_1 0xd7f3
38#define PCS_FW_BUILD_1 0xd7f6
36#define PCS_UC8051_STATUS_REG 0xd7fd 39#define PCS_UC8051_STATUS_REG 0xd7fd
37#define PCS_UC_STATUS_LBN 0 40#define PCS_UC_STATUS_LBN 0
38#define PCS_UC_STATUS_WIDTH 8 41#define PCS_UC_STATUS_WIDTH 8
@@ -52,14 +55,24 @@ void falcon_qt202x_set_led(struct efx_nic *p, int led, int mode)
52 55
53struct qt202x_phy_data { 56struct qt202x_phy_data {
54 enum efx_phy_mode phy_mode; 57 enum efx_phy_mode phy_mode;
58 bool bug17190_in_bad_state;
59 unsigned long bug17190_timer;
60 u32 firmware_ver;
55}; 61};
56 62
57#define QT2022C2_MAX_RESET_TIME 500 63#define QT2022C2_MAX_RESET_TIME 500
58#define QT2022C2_RESET_WAIT 10 64#define QT2022C2_RESET_WAIT 10
59 65
60static int qt2025c_wait_reset(struct efx_nic *efx) 66#define QT2025C_MAX_HEARTB_TIME (5 * HZ)
67#define QT2025C_HEARTB_WAIT 100
68#define QT2025C_MAX_FWSTART_TIME (25 * HZ / 10)
69#define QT2025C_FWSTART_WAIT 100
70
71#define BUG17190_INTERVAL (2 * HZ)
72
73static int qt2025c_wait_heartbeat(struct efx_nic *efx)
61{ 74{
62 unsigned long timeout = jiffies + 10 * HZ; 75 unsigned long timeout = jiffies + QT2025C_MAX_HEARTB_TIME;
63 int reg, old_counter = 0; 76 int reg, old_counter = 0;
64 77
65 /* Wait for firmware heartbeat to start */ 78 /* Wait for firmware heartbeat to start */
@@ -74,11 +87,25 @@ static int qt2025c_wait_reset(struct efx_nic *efx)
74 old_counter = counter; 87 old_counter = counter;
75 else if (counter != old_counter) 88 else if (counter != old_counter)
76 break; 89 break;
77 if (time_after(jiffies, timeout)) 90 if (time_after(jiffies, timeout)) {
91 /* Some cables have EEPROMs that conflict with the
92 * PHY's on-board EEPROM so it cannot load firmware */
93 EFX_ERR(efx, "If an SFP+ direct attach cable is"
94 " connected, please check that it complies"
95 " with the SFP+ specification\n");
78 return -ETIMEDOUT; 96 return -ETIMEDOUT;
79 msleep(10); 97 }
98 msleep(QT2025C_HEARTB_WAIT);
80 } 99 }
81 100
101 return 0;
102}
103
104static int qt2025c_wait_fw_status_good(struct efx_nic *efx)
105{
106 unsigned long timeout = jiffies + QT2025C_MAX_FWSTART_TIME;
107 int reg;
108
82 /* Wait for firmware status to look good */ 109 /* Wait for firmware status to look good */
83 for (;;) { 110 for (;;) {
84 reg = efx_mdio_read(efx, MDIO_MMD_PCS, PCS_UC8051_STATUS_REG); 111 reg = efx_mdio_read(efx, MDIO_MMD_PCS, PCS_UC8051_STATUS_REG);
@@ -90,7 +117,178 @@ static int qt2025c_wait_reset(struct efx_nic *efx)
90 break; 117 break;
91 if (time_after(jiffies, timeout)) 118 if (time_after(jiffies, timeout))
92 return -ETIMEDOUT; 119 return -ETIMEDOUT;
120 msleep(QT2025C_FWSTART_WAIT);
121 }
122
123 return 0;
124}
125
126static void qt2025c_restart_firmware(struct efx_nic *efx)
127{
128 /* Restart microcontroller execution of firmware from RAM */
129 efx_mdio_write(efx, 3, 0xe854, 0x00c0);
130 efx_mdio_write(efx, 3, 0xe854, 0x0040);
131 msleep(50);
132}
133
134static int qt2025c_wait_reset(struct efx_nic *efx)
135{
136 int rc;
137
138 rc = qt2025c_wait_heartbeat(efx);
139 if (rc != 0)
140 return rc;
141
142 rc = qt2025c_wait_fw_status_good(efx);
143 if (rc == -ETIMEDOUT) {
144 /* Bug 17689: occasionally heartbeat starts but firmware status
145 * code never progresses beyond 0x00. Try again, once, after
146 * restarting execution of the firmware image. */
147 EFX_LOG(efx, "bashing QT2025C microcontroller\n");
148 qt2025c_restart_firmware(efx);
149 rc = qt2025c_wait_heartbeat(efx);
150 if (rc != 0)
151 return rc;
152 rc = qt2025c_wait_fw_status_good(efx);
153 }
154
155 return rc;
156}
157
158static void qt2025c_firmware_id(struct efx_nic *efx)
159{
160 struct qt202x_phy_data *phy_data = efx->phy_data;
161 u8 firmware_id[9];
162 size_t i;
163
164 for (i = 0; i < sizeof(firmware_id); i++)
165 firmware_id[i] = efx_mdio_read(efx, MDIO_MMD_PCS,
166 PCS_FW_PRODUCT_CODE_1 + i);
167 EFX_INFO(efx, "QT2025C firmware %xr%d v%d.%d.%d.%d [20%02d-%02d-%02d]\n",
168 (firmware_id[0] << 8) | firmware_id[1], firmware_id[2],
169 firmware_id[3] >> 4, firmware_id[3] & 0xf,
170 firmware_id[4], firmware_id[5],
171 firmware_id[6], firmware_id[7], firmware_id[8]);
172 phy_data->firmware_ver = ((firmware_id[3] & 0xf0) << 20) |
173 ((firmware_id[3] & 0x0f) << 16) |
174 (firmware_id[4] << 8) | firmware_id[5];
175}
176
177static void qt2025c_bug17190_workaround(struct efx_nic *efx)
178{
179 struct qt202x_phy_data *phy_data = efx->phy_data;
180
181 /* The PHY can get stuck in a state where it reports PHY_XS and PMA/PMD
182 * layers up, but PCS down (no block_lock). If we notice this state
183 * persisting for a couple of seconds, we switch PMA/PMD loopback
184 * briefly on and then off again, which is normally sufficient to
185 * recover it.
186 */
187 if (efx->link_state.up ||
188 !efx_mdio_links_ok(efx, MDIO_DEVS_PMAPMD | MDIO_DEVS_PHYXS)) {
189 phy_data->bug17190_in_bad_state = false;
190 return;
191 }
192
193 if (!phy_data->bug17190_in_bad_state) {
194 phy_data->bug17190_in_bad_state = true;
195 phy_data->bug17190_timer = jiffies + BUG17190_INTERVAL;
196 return;
197 }
198
199 if (time_after_eq(jiffies, phy_data->bug17190_timer)) {
200 EFX_LOG(efx, "bashing QT2025C PMA/PMD\n");
201 efx_mdio_set_flag(efx, MDIO_MMD_PMAPMD, MDIO_CTRL1,
202 MDIO_PMA_CTRL1_LOOPBACK, true);
93 msleep(100); 203 msleep(100);
204 efx_mdio_set_flag(efx, MDIO_MMD_PMAPMD, MDIO_CTRL1,
205 MDIO_PMA_CTRL1_LOOPBACK, false);
206 phy_data->bug17190_timer = jiffies + BUG17190_INTERVAL;
207 }
208}
209
210static int qt2025c_select_phy_mode(struct efx_nic *efx)
211{
212 struct qt202x_phy_data *phy_data = efx->phy_data;
213 struct falcon_board *board = falcon_board(efx);
214 int reg, rc, i;
215 uint16_t phy_op_mode;
216
217 /* Only 2.0.1.0+ PHY firmware supports the more optimal SFP+
218 * Self-Configure mode. Don't attempt any switching if we encounter
219 * older firmware. */
220 if (phy_data->firmware_ver < 0x02000100)
221 return 0;
222
223 /* In general we will get optimal behaviour in "SFP+ Self-Configure"
224 * mode; however, that powers down most of the PHY when no module is
225 * present, so we must use a different mode (any fixed mode will do)
226 * to be sure that loopbacks will work. */
227 phy_op_mode = (efx->loopback_mode == LOOPBACK_NONE) ? 0x0038 : 0x0020;
228
229 /* Only change mode if really necessary */
230 reg = efx_mdio_read(efx, 1, 0xc319);
231 if ((reg & 0x0038) == phy_op_mode)
232 return 0;
233 EFX_LOG(efx, "Switching PHY to mode 0x%04x\n", phy_op_mode);
234
235 /* This sequence replicates the register writes configured in the boot
236 * EEPROM (including the differences between board revisions), except
237 * that the operating mode is changed, and the PHY is prevented from
238 * unnecessarily reloading the main firmware image again. */
239 efx_mdio_write(efx, 1, 0xc300, 0x0000);
240 /* (Note: this portion of the boot EEPROM sequence, which bit-bashes 9
241 * STOPs onto the firmware/module I2C bus to reset it, varies across
242 * board revisions, as the bus is connected to different GPIO/LED
243 * outputs on the PHY.) */
244 if (board->major == 0 && board->minor < 2) {
245 efx_mdio_write(efx, 1, 0xc303, 0x4498);
246 for (i = 0; i < 9; i++) {
247 efx_mdio_write(efx, 1, 0xc303, 0x4488);
248 efx_mdio_write(efx, 1, 0xc303, 0x4480);
249 efx_mdio_write(efx, 1, 0xc303, 0x4490);
250 efx_mdio_write(efx, 1, 0xc303, 0x4498);
251 }
252 } else {
253 efx_mdio_write(efx, 1, 0xc303, 0x0920);
254 efx_mdio_write(efx, 1, 0xd008, 0x0004);
255 for (i = 0; i < 9; i++) {
256 efx_mdio_write(efx, 1, 0xc303, 0x0900);
257 efx_mdio_write(efx, 1, 0xd008, 0x0005);
258 efx_mdio_write(efx, 1, 0xc303, 0x0920);
259 efx_mdio_write(efx, 1, 0xd008, 0x0004);
260 }
261 efx_mdio_write(efx, 1, 0xc303, 0x4900);
262 }
263 efx_mdio_write(efx, 1, 0xc303, 0x4900);
264 efx_mdio_write(efx, 1, 0xc302, 0x0004);
265 efx_mdio_write(efx, 1, 0xc316, 0x0013);
266 efx_mdio_write(efx, 1, 0xc318, 0x0054);
267 efx_mdio_write(efx, 1, 0xc319, phy_op_mode);
268 efx_mdio_write(efx, 1, 0xc31a, 0x0098);
269 efx_mdio_write(efx, 3, 0x0026, 0x0e00);
270 efx_mdio_write(efx, 3, 0x0027, 0x0013);
271 efx_mdio_write(efx, 3, 0x0028, 0xa528);
272 efx_mdio_write(efx, 1, 0xd006, 0x000a);
273 efx_mdio_write(efx, 1, 0xd007, 0x0009);
274 efx_mdio_write(efx, 1, 0xd008, 0x0004);
275 /* This additional write is not present in the boot EEPROM. It
276 * prevents the PHY's internal boot ROM doing another pointless (and
277 * slow) reload of the firmware image (the microcontroller's code
278 * memory is not affected by the microcontroller reset). */
279 efx_mdio_write(efx, 1, 0xc317, 0x00ff);
280 efx_mdio_write(efx, 1, 0xc300, 0x0002);
281 msleep(20);
282
283 /* Restart microcontroller execution of firmware from RAM */
284 qt2025c_restart_firmware(efx);
285
286 /* Wait for the microcontroller to be ready again */
287 rc = qt2025c_wait_reset(efx);
288 if (rc < 0) {
289 EFX_ERR(efx, "PHY microcontroller reset during mode switch "
290 "timed out\n");
291 return rc;
94 } 292 }
95 293
96 return 0; 294 return 0;
@@ -120,15 +318,9 @@ static int qt202x_reset_phy(struct efx_nic *efx)
120 /* Wait 250ms for the PHY to complete bootup */ 318 /* Wait 250ms for the PHY to complete bootup */
121 msleep(250); 319 msleep(250);
122 320
123 /* Check that all the MMDs we expect are present and responding. We
124 * expect faults on some if the link is down, but not on the PHY XS */
125 rc = efx_mdio_check_mmds(efx, QT202X_REQUIRED_DEVS, MDIO_DEVS_PHYXS);
126 if (rc < 0)
127 goto fail;
128
129 falcon_board(efx)->type->init_phy(efx); 321 falcon_board(efx)->type->init_phy(efx);
130 322
131 return rc; 323 return 0;
132 324
133 fail: 325 fail:
134 EFX_ERR(efx, "PHY reset timed out\n"); 326 EFX_ERR(efx, "PHY reset timed out\n");
@@ -137,6 +329,16 @@ static int qt202x_reset_phy(struct efx_nic *efx)
137 329
138static int qt202x_phy_probe(struct efx_nic *efx) 330static int qt202x_phy_probe(struct efx_nic *efx)
139{ 331{
332 struct qt202x_phy_data *phy_data;
333
334 phy_data = kzalloc(sizeof(struct qt202x_phy_data), GFP_KERNEL);
335 if (!phy_data)
336 return -ENOMEM;
337 efx->phy_data = phy_data;
338 phy_data->phy_mode = efx->phy_mode;
339 phy_data->bug17190_in_bad_state = false;
340 phy_data->bug17190_timer = 0;
341
140 efx->mdio.mmds = QT202X_REQUIRED_DEVS; 342 efx->mdio.mmds = QT202X_REQUIRED_DEVS;
141 efx->mdio.mode_support = MDIO_SUPPORTS_C45 | MDIO_EMULATE_C22; 343 efx->mdio.mode_support = MDIO_SUPPORTS_C45 | MDIO_EMULATE_C22;
142 efx->loopback_modes = QT202X_LOOPBACKS | FALCON_XMAC_LOOPBACKS; 344 efx->loopback_modes = QT202X_LOOPBACKS | FALCON_XMAC_LOOPBACKS;
@@ -145,7 +347,6 @@ static int qt202x_phy_probe(struct efx_nic *efx)
145 347
146static int qt202x_phy_init(struct efx_nic *efx) 348static int qt202x_phy_init(struct efx_nic *efx)
147{ 349{
148 struct qt202x_phy_data *phy_data;
149 u32 devid; 350 u32 devid;
150 int rc; 351 int rc;
151 352
@@ -155,17 +356,14 @@ static int qt202x_phy_init(struct efx_nic *efx)
155 return rc; 356 return rc;
156 } 357 }
157 358
158 phy_data = kzalloc(sizeof(struct qt202x_phy_data), GFP_KERNEL);
159 if (!phy_data)
160 return -ENOMEM;
161 efx->phy_data = phy_data;
162
163 devid = efx_mdio_read_id(efx, MDIO_MMD_PHYXS); 359 devid = efx_mdio_read_id(efx, MDIO_MMD_PHYXS);
164 EFX_INFO(efx, "PHY ID reg %x (OUI %06x model %02x revision %x)\n", 360 EFX_INFO(efx, "PHY ID reg %x (OUI %06x model %02x revision %x)\n",
165 devid, efx_mdio_id_oui(devid), efx_mdio_id_model(devid), 361 devid, efx_mdio_id_oui(devid), efx_mdio_id_model(devid),
166 efx_mdio_id_rev(devid)); 362 efx_mdio_id_rev(devid));
167 363
168 phy_data->phy_mode = efx->phy_mode; 364 if (efx->phy_type == PHY_TYPE_QT2025C)
365 qt2025c_firmware_id(efx);
366
169 return 0; 367 return 0;
170} 368}
171 369
@@ -183,6 +381,9 @@ static bool qt202x_phy_poll(struct efx_nic *efx)
183 efx->link_state.fd = true; 381 efx->link_state.fd = true;
184 efx->link_state.fc = efx->wanted_fc; 382 efx->link_state.fc = efx->wanted_fc;
185 383
384 if (efx->phy_type == PHY_TYPE_QT2025C)
385 qt2025c_bug17190_workaround(efx);
386
186 return efx->link_state.up != was_up; 387 return efx->link_state.up != was_up;
187} 388}
188 389
@@ -191,6 +392,10 @@ static int qt202x_phy_reconfigure(struct efx_nic *efx)
191 struct qt202x_phy_data *phy_data = efx->phy_data; 392 struct qt202x_phy_data *phy_data = efx->phy_data;
192 393
193 if (efx->phy_type == PHY_TYPE_QT2025C) { 394 if (efx->phy_type == PHY_TYPE_QT2025C) {
395 int rc = qt2025c_select_phy_mode(efx);
396 if (rc)
397 return rc;
398
194 /* There are several different register bits which can 399 /* There are several different register bits which can
195 * disable TX (and save power) on direct-attach cables 400 * disable TX (and save power) on direct-attach cables
196 * or optical transceivers, varying somewhat between 401 * or optical transceivers, varying somewhat between
@@ -224,7 +429,7 @@ static void qt202x_phy_get_settings(struct efx_nic *efx, struct ethtool_cmd *ecm
224 mdio45_ethtool_gset(&efx->mdio, ecmd); 429 mdio45_ethtool_gset(&efx->mdio, ecmd);
225} 430}
226 431
227static void qt202x_phy_fini(struct efx_nic *efx) 432static void qt202x_phy_remove(struct efx_nic *efx)
228{ 433{
229 /* Free the context block */ 434 /* Free the context block */
230 kfree(efx->phy_data); 435 kfree(efx->phy_data);
@@ -236,7 +441,8 @@ struct efx_phy_operations falcon_qt202x_phy_ops = {
236 .init = qt202x_phy_init, 441 .init = qt202x_phy_init,
237 .reconfigure = qt202x_phy_reconfigure, 442 .reconfigure = qt202x_phy_reconfigure,
238 .poll = qt202x_phy_poll, 443 .poll = qt202x_phy_poll,
239 .fini = qt202x_phy_fini, 444 .fini = efx_port_dummy_op_void,
445 .remove = qt202x_phy_remove,
240 .get_settings = qt202x_phy_get_settings, 446 .get_settings = qt202x_phy_get_settings,
241 .set_settings = efx_mdio_set_settings, 447 .set_settings = efx_mdio_set_settings,
242}; 448};
diff --git a/drivers/net/sfc/selftest.c b/drivers/net/sfc/selftest.c
index 14949bb303a0..250c8827b842 100644
--- a/drivers/net/sfc/selftest.c
+++ b/drivers/net/sfc/selftest.c
@@ -47,7 +47,7 @@ static const unsigned char payload_source[ETH_ALEN] = {
47 0x00, 0x0f, 0x53, 0x1b, 0x1b, 0x1b, 47 0x00, 0x0f, 0x53, 0x1b, 0x1b, 0x1b,
48}; 48};
49 49
50static const char *payload_msg = 50static const char payload_msg[] =
51 "Hello world! This is an Efx loopback test in progress!"; 51 "Hello world! This is an Efx loopback test in progress!";
52 52
53/** 53/**
@@ -79,10 +79,14 @@ struct efx_loopback_state {
79static int efx_test_mdio(struct efx_nic *efx, struct efx_self_tests *tests) 79static int efx_test_mdio(struct efx_nic *efx, struct efx_self_tests *tests)
80{ 80{
81 int rc = 0; 81 int rc = 0;
82 int devad = __ffs(efx->mdio.mmds); 82 int devad;
83 u16 physid1, physid2; 83 u16 physid1, physid2;
84 84
85 if (efx->phy_type == PHY_TYPE_NONE) 85 if (efx->mdio.mode_support & MDIO_SUPPORTS_C45)
86 devad = __ffs(efx->mdio.mmds);
87 else if (efx->mdio.mode_support & MDIO_SUPPORTS_C22)
88 devad = MDIO_DEVAD_NONE;
89 else
86 return 0; 90 return 0;
87 91
88 mutex_lock(&efx->mac_lock); 92 mutex_lock(&efx->mac_lock);
diff --git a/drivers/net/sfc/siena.c b/drivers/net/sfc/siena.c
index de07a4f031b2..f8c6771e66d8 100644
--- a/drivers/net/sfc/siena.c
+++ b/drivers/net/sfc/siena.c
@@ -133,6 +133,7 @@ static int siena_probe_port(struct efx_nic *efx)
133 133
134void siena_remove_port(struct efx_nic *efx) 134void siena_remove_port(struct efx_nic *efx)
135{ 135{
136 efx->phy_op->remove(efx);
136 efx_nic_free_buffer(efx, &efx->stats_buffer); 137 efx_nic_free_buffer(efx, &efx->stats_buffer);
137} 138}
138 139
diff --git a/drivers/net/sfc/tenxpress.c b/drivers/net/sfc/tenxpress.c
index ca11572a49a9..3009c297c135 100644
--- a/drivers/net/sfc/tenxpress.c
+++ b/drivers/net/sfc/tenxpress.c
@@ -202,10 +202,14 @@ static ssize_t set_phy_short_reach(struct device *dev,
202 int rc; 202 int rc;
203 203
204 rtnl_lock(); 204 rtnl_lock();
205 efx_mdio_set_flag(efx, MDIO_MMD_PMAPMD, MDIO_PMA_10GBT_TXPWR, 205 if (efx->state != STATE_RUNNING) {
206 MDIO_PMA_10GBT_TXPWR_SHORT, 206 rc = -EBUSY;
207 count != 0 && *buf != '0'); 207 } else {
208 rc = efx_reconfigure_port(efx); 208 efx_mdio_set_flag(efx, MDIO_MMD_PMAPMD, MDIO_PMA_10GBT_TXPWR,
209 MDIO_PMA_10GBT_TXPWR_SHORT,
210 count != 0 && *buf != '0');
211 rc = efx_reconfigure_port(efx);
212 }
209 rtnl_unlock(); 213 rtnl_unlock();
210 214
211 return rc < 0 ? rc : (ssize_t)count; 215 return rc < 0 ? rc : (ssize_t)count;
@@ -298,36 +302,62 @@ static int tenxpress_init(struct efx_nic *efx)
298 return 0; 302 return 0;
299} 303}
300 304
301static int sfx7101_phy_probe(struct efx_nic *efx) 305static int tenxpress_phy_probe(struct efx_nic *efx)
302{ 306{
303 efx->mdio.mmds = TENXPRESS_REQUIRED_DEVS; 307 struct tenxpress_phy_data *phy_data;
304 efx->mdio.mode_support = MDIO_SUPPORTS_C45 | MDIO_EMULATE_C22; 308 int rc;
305 efx->loopback_modes = SFX7101_LOOPBACKS | FALCON_XMAC_LOOPBACKS; 309
306 return 0; 310 /* Allocate phy private storage */
307} 311 phy_data = kzalloc(sizeof(*phy_data), GFP_KERNEL);
312 if (!phy_data)
313 return -ENOMEM;
314 efx->phy_data = phy_data;
315 phy_data->phy_mode = efx->phy_mode;
316
317 /* Create any special files */
318 if (efx->phy_type == PHY_TYPE_SFT9001B) {
319 rc = device_create_file(&efx->pci_dev->dev,
320 &dev_attr_phy_short_reach);
321 if (rc)
322 goto fail;
323 }
324
325 if (efx->phy_type == PHY_TYPE_SFX7101) {
326 efx->mdio.mmds = TENXPRESS_REQUIRED_DEVS;
327 efx->mdio.mode_support = MDIO_SUPPORTS_C45;
328
329 efx->loopback_modes = SFX7101_LOOPBACKS | FALCON_XMAC_LOOPBACKS;
330
331 efx->link_advertising = (ADVERTISED_TP | ADVERTISED_Autoneg |
332 ADVERTISED_10000baseT_Full);
333 } else {
334 efx->mdio.mmds = TENXPRESS_REQUIRED_DEVS;
335 efx->mdio.mode_support = MDIO_SUPPORTS_C45 | MDIO_EMULATE_C22;
336
337 efx->loopback_modes = (SFT9001_LOOPBACKS |
338 FALCON_XMAC_LOOPBACKS |
339 FALCON_GMAC_LOOPBACKS);
340
341 efx->link_advertising = (ADVERTISED_TP | ADVERTISED_Autoneg |
342 ADVERTISED_10000baseT_Full |
343 ADVERTISED_1000baseT_Full |
344 ADVERTISED_100baseT_Full);
345 }
308 346
309static int sft9001_phy_probe(struct efx_nic *efx)
310{
311 efx->mdio.mmds = TENXPRESS_REQUIRED_DEVS;
312 efx->mdio.mode_support = MDIO_SUPPORTS_C45 | MDIO_EMULATE_C22;
313 efx->loopback_modes = (SFT9001_LOOPBACKS | FALCON_XMAC_LOOPBACKS |
314 FALCON_GMAC_LOOPBACKS);
315 return 0; 347 return 0;
348
349fail:
350 kfree(efx->phy_data);
351 efx->phy_data = NULL;
352 return rc;
316} 353}
317 354
318static int tenxpress_phy_init(struct efx_nic *efx) 355static int tenxpress_phy_init(struct efx_nic *efx)
319{ 356{
320 struct tenxpress_phy_data *phy_data; 357 int rc;
321 int rc = 0;
322 358
323 falcon_board(efx)->type->init_phy(efx); 359 falcon_board(efx)->type->init_phy(efx);
324 360
325 phy_data = kzalloc(sizeof(*phy_data), GFP_KERNEL);
326 if (!phy_data)
327 return -ENOMEM;
328 efx->phy_data = phy_data;
329 phy_data->phy_mode = efx->phy_mode;
330
331 if (!(efx->phy_mode & PHY_MODE_SPECIAL)) { 361 if (!(efx->phy_mode & PHY_MODE_SPECIAL)) {
332 if (efx->phy_type == PHY_TYPE_SFT9001A) { 362 if (efx->phy_type == PHY_TYPE_SFT9001A) {
333 int reg; 363 int reg;
@@ -341,44 +371,27 @@ static int tenxpress_phy_init(struct efx_nic *efx)
341 371
342 rc = efx_mdio_wait_reset_mmds(efx, TENXPRESS_REQUIRED_DEVS); 372 rc = efx_mdio_wait_reset_mmds(efx, TENXPRESS_REQUIRED_DEVS);
343 if (rc < 0) 373 if (rc < 0)
344 goto fail; 374 return rc;
345 375
346 rc = efx_mdio_check_mmds(efx, TENXPRESS_REQUIRED_DEVS, 0); 376 rc = efx_mdio_check_mmds(efx, TENXPRESS_REQUIRED_DEVS, 0);
347 if (rc < 0) 377 if (rc < 0)
348 goto fail; 378 return rc;
349 } 379 }
350 380
351 rc = tenxpress_init(efx); 381 rc = tenxpress_init(efx);
352 if (rc < 0) 382 if (rc < 0)
353 goto fail; 383 return rc;
354 384
355 /* Initialise advertising flags */ 385 /* Reinitialise flow control settings */
356 efx->link_advertising = (ADVERTISED_TP | ADVERTISED_Autoneg |
357 ADVERTISED_10000baseT_Full);
358 if (efx->phy_type != PHY_TYPE_SFX7101)
359 efx->link_advertising |= (ADVERTISED_1000baseT_Full |
360 ADVERTISED_100baseT_Full);
361 efx_link_set_wanted_fc(efx, efx->wanted_fc); 386 efx_link_set_wanted_fc(efx, efx->wanted_fc);
362 efx_mdio_an_reconfigure(efx); 387 efx_mdio_an_reconfigure(efx);
363 388
364 if (efx->phy_type == PHY_TYPE_SFT9001B) {
365 rc = device_create_file(&efx->pci_dev->dev,
366 &dev_attr_phy_short_reach);
367 if (rc)
368 goto fail;
369 }
370
371 schedule_timeout_uninterruptible(HZ / 5); /* 200ms */ 389 schedule_timeout_uninterruptible(HZ / 5); /* 200ms */
372 390
373 /* Let XGXS and SerDes out of reset */ 391 /* Let XGXS and SerDes out of reset */
374 falcon_reset_xaui(efx); 392 falcon_reset_xaui(efx);
375 393
376 return 0; 394 return 0;
377
378 fail:
379 kfree(efx->phy_data);
380 efx->phy_data = NULL;
381 return rc;
382} 395}
383 396
384/* Perform a "special software reset" on the PHY. The caller is 397/* Perform a "special software reset" on the PHY. The caller is
@@ -589,25 +602,26 @@ static bool tenxpress_phy_poll(struct efx_nic *efx)
589 return !efx_link_state_equal(&efx->link_state, &old_state); 602 return !efx_link_state_equal(&efx->link_state, &old_state);
590} 603}
591 604
592static void tenxpress_phy_fini(struct efx_nic *efx) 605static void sfx7101_phy_fini(struct efx_nic *efx)
593{ 606{
594 int reg; 607 int reg;
595 608
609 /* Power down the LNPGA */
610 reg = (1 << PMA_PMD_LNPGA_POWERDOWN_LBN);
611 efx_mdio_write(efx, MDIO_MMD_PMAPMD, PMA_PMD_XCONTROL_REG, reg);
612
613 /* Waiting here ensures that the board fini, which can turn
614 * off the power to the PHY, won't get run until the LNPGA
615 * powerdown has been given long enough to complete. */
616 schedule_timeout_uninterruptible(LNPGA_PDOWN_WAIT); /* 200 ms */
617}
618
619static void tenxpress_phy_remove(struct efx_nic *efx)
620{
596 if (efx->phy_type == PHY_TYPE_SFT9001B) 621 if (efx->phy_type == PHY_TYPE_SFT9001B)
597 device_remove_file(&efx->pci_dev->dev, 622 device_remove_file(&efx->pci_dev->dev,
598 &dev_attr_phy_short_reach); 623 &dev_attr_phy_short_reach);
599 624
600 if (efx->phy_type == PHY_TYPE_SFX7101) {
601 /* Power down the LNPGA */
602 reg = (1 << PMA_PMD_LNPGA_POWERDOWN_LBN);
603 efx_mdio_write(efx, MDIO_MMD_PMAPMD, PMA_PMD_XCONTROL_REG, reg);
604
605 /* Waiting here ensures that the board fini, which can turn
606 * off the power to the PHY, won't get run until the LNPGA
607 * powerdown has been given long enough to complete. */
608 schedule_timeout_uninterruptible(LNPGA_PDOWN_WAIT); /* 200 ms */
609 }
610
611 kfree(efx->phy_data); 625 kfree(efx->phy_data);
612 efx->phy_data = NULL; 626 efx->phy_data = NULL;
613} 627}
@@ -819,11 +833,12 @@ static void sft9001_set_npage_adv(struct efx_nic *efx, u32 advertising)
819} 833}
820 834
821struct efx_phy_operations falcon_sfx7101_phy_ops = { 835struct efx_phy_operations falcon_sfx7101_phy_ops = {
822 .probe = sfx7101_phy_probe, 836 .probe = tenxpress_phy_probe,
823 .init = tenxpress_phy_init, 837 .init = tenxpress_phy_init,
824 .reconfigure = tenxpress_phy_reconfigure, 838 .reconfigure = tenxpress_phy_reconfigure,
825 .poll = tenxpress_phy_poll, 839 .poll = tenxpress_phy_poll,
826 .fini = tenxpress_phy_fini, 840 .fini = sfx7101_phy_fini,
841 .remove = tenxpress_phy_remove,
827 .get_settings = tenxpress_get_settings, 842 .get_settings = tenxpress_get_settings,
828 .set_settings = tenxpress_set_settings, 843 .set_settings = tenxpress_set_settings,
829 .set_npage_adv = sfx7101_set_npage_adv, 844 .set_npage_adv = sfx7101_set_npage_adv,
@@ -832,11 +847,12 @@ struct efx_phy_operations falcon_sfx7101_phy_ops = {
832}; 847};
833 848
834struct efx_phy_operations falcon_sft9001_phy_ops = { 849struct efx_phy_operations falcon_sft9001_phy_ops = {
835 .probe = sft9001_phy_probe, 850 .probe = tenxpress_phy_probe,
836 .init = tenxpress_phy_init, 851 .init = tenxpress_phy_init,
837 .reconfigure = tenxpress_phy_reconfigure, 852 .reconfigure = tenxpress_phy_reconfigure,
838 .poll = tenxpress_phy_poll, 853 .poll = tenxpress_phy_poll,
839 .fini = tenxpress_phy_fini, 854 .fini = efx_port_dummy_op_void,
855 .remove = tenxpress_phy_remove,
840 .get_settings = tenxpress_get_settings, 856 .get_settings = tenxpress_get_settings,
841 .set_settings = tenxpress_set_settings, 857 .set_settings = tenxpress_set_settings,
842 .set_npage_adv = sft9001_set_npage_adv, 858 .set_npage_adv = sft9001_set_npage_adv,
diff --git a/drivers/net/sfc/tx.c b/drivers/net/sfc/tx.c
index e669f94e821b..a8b70ef6d817 100644
--- a/drivers/net/sfc/tx.c
+++ b/drivers/net/sfc/tx.c
@@ -821,8 +821,6 @@ static void efx_enqueue_unwind(struct efx_tx_queue *tx_queue)
821 EFX_TXQ_MASK]; 821 EFX_TXQ_MASK];
822 efx_tsoh_free(tx_queue, buffer); 822 efx_tsoh_free(tx_queue, buffer);
823 EFX_BUG_ON_PARANOID(buffer->skb); 823 EFX_BUG_ON_PARANOID(buffer->skb);
824 buffer->len = 0;
825 buffer->continuation = true;
826 if (buffer->unmap_len) { 824 if (buffer->unmap_len) {
827 unmap_addr = (buffer->dma_addr + buffer->len - 825 unmap_addr = (buffer->dma_addr + buffer->len -
828 buffer->unmap_len); 826 buffer->unmap_len);
@@ -836,6 +834,8 @@ static void efx_enqueue_unwind(struct efx_tx_queue *tx_queue)
836 PCI_DMA_TODEVICE); 834 PCI_DMA_TODEVICE);
837 buffer->unmap_len = 0; 835 buffer->unmap_len = 0;
838 } 836 }
837 buffer->len = 0;
838 buffer->continuation = true;
839 } 839 }
840} 840}
841 841
diff --git a/drivers/net/sh_eth.c b/drivers/net/sh_eth.c
index c88bc1013047..7402b858cab7 100644
--- a/drivers/net/sh_eth.c
+++ b/drivers/net/sh_eth.c
@@ -84,6 +84,8 @@ static struct sh_eth_cpu_data sh_eth_my_cpu_data = {
84 .mpr = 1, 84 .mpr = 1,
85 .tpauser = 1, 85 .tpauser = 1,
86 .hw_swap = 1, 86 .hw_swap = 1,
87 .rpadir = 1,
88 .rpadir_value = 0x00020000, /* NET_IP_ALIGN assumed to be 2 */
87}; 89};
88 90
89#elif defined(CONFIG_CPU_SUBTYPE_SH7763) 91#elif defined(CONFIG_CPU_SUBTYPE_SH7763)
@@ -108,7 +110,7 @@ static void sh_eth_reset(struct net_device *ndev)
108 mdelay(1); 110 mdelay(1);
109 cnt--; 111 cnt--;
110 } 112 }
111 if (cnt < 0) 113 if (cnt == 0)
112 printk(KERN_ERR "Device reset fail\n"); 114 printk(KERN_ERR "Device reset fail\n");
113 115
114 /* Table Init */ 116 /* Table Init */
@@ -175,7 +177,6 @@ static struct sh_eth_cpu_data sh_eth_my_cpu_data = {
175 .tpauser = 1, 177 .tpauser = 1,
176 .bculr = 1, 178 .bculr = 1,
177 .hw_swap = 1, 179 .hw_swap = 1,
178 .rpadir = 1,
179 .no_trimd = 1, 180 .no_trimd = 1,
180 .no_ade = 1, 181 .no_ade = 1,
181}; 182};
@@ -501,6 +502,8 @@ static int sh_eth_ring_init(struct net_device *ndev)
501 */ 502 */
502 mdp->rx_buf_sz = (ndev->mtu <= 1492 ? PKT_BUF_SZ : 503 mdp->rx_buf_sz = (ndev->mtu <= 1492 ? PKT_BUF_SZ :
503 (((ndev->mtu + 26 + 7) & ~7) + 2 + 16)); 504 (((ndev->mtu + 26 + 7) & ~7) + 2 + 16));
505 if (mdp->cd->rpadir)
506 mdp->rx_buf_sz += NET_IP_ALIGN;
504 507
505 /* Allocate RX and TX skb rings */ 508 /* Allocate RX and TX skb rings */
506 mdp->rx_skbuff = kmalloc(sizeof(*mdp->rx_skbuff) * RX_RING_SIZE, 509 mdp->rx_skbuff = kmalloc(sizeof(*mdp->rx_skbuff) * RX_RING_SIZE,
@@ -715,6 +718,8 @@ static int sh_eth_rx(struct net_device *ndev)
715 pkt_len + 2); 718 pkt_len + 2);
716 skb = mdp->rx_skbuff[entry]; 719 skb = mdp->rx_skbuff[entry];
717 mdp->rx_skbuff[entry] = NULL; 720 mdp->rx_skbuff[entry] = NULL;
721 if (mdp->cd->rpadir)
722 skb_reserve(skb, NET_IP_ALIGN);
718 skb_put(skb, pkt_len); 723 skb_put(skb, pkt_len);
719 skb->protocol = eth_type_trans(skb, ndev); 724 skb->protocol = eth_type_trans(skb, ndev);
720 netif_rx(skb); 725 netif_rx(skb);
diff --git a/drivers/net/sky2.c b/drivers/net/sky2.c
index 89a05d674ddc..67249c3c9f50 100644
--- a/drivers/net/sky2.c
+++ b/drivers/net/sky2.c
@@ -1025,11 +1025,8 @@ static void sky2_prefetch_init(struct sky2_hw *hw, u32 qaddr,
1025static inline struct sky2_tx_le *get_tx_le(struct sky2_port *sky2, u16 *slot) 1025static inline struct sky2_tx_le *get_tx_le(struct sky2_port *sky2, u16 *slot)
1026{ 1026{
1027 struct sky2_tx_le *le = sky2->tx_le + *slot; 1027 struct sky2_tx_le *le = sky2->tx_le + *slot;
1028 struct tx_ring_info *re = sky2->tx_ring + *slot;
1029 1028
1030 *slot = RING_NEXT(*slot, sky2->tx_ring_size); 1029 *slot = RING_NEXT(*slot, sky2->tx_ring_size);
1031 re->flags = 0;
1032 re->skb = NULL;
1033 le->ctrl = 0; 1030 le->ctrl = 0;
1034 return le; 1031 return le;
1035} 1032}
@@ -1622,8 +1619,7 @@ static unsigned tx_le_req(const struct sk_buff *skb)
1622 return count; 1619 return count;
1623} 1620}
1624 1621
1625static void sky2_tx_unmap(struct pci_dev *pdev, 1622static void sky2_tx_unmap(struct pci_dev *pdev, struct tx_ring_info *re)
1626 const struct tx_ring_info *re)
1627{ 1623{
1628 if (re->flags & TX_MAP_SINGLE) 1624 if (re->flags & TX_MAP_SINGLE)
1629 pci_unmap_single(pdev, pci_unmap_addr(re, mapaddr), 1625 pci_unmap_single(pdev, pci_unmap_addr(re, mapaddr),
@@ -1633,6 +1629,7 @@ static void sky2_tx_unmap(struct pci_dev *pdev,
1633 pci_unmap_page(pdev, pci_unmap_addr(re, mapaddr), 1629 pci_unmap_page(pdev, pci_unmap_addr(re, mapaddr),
1634 pci_unmap_len(re, maplen), 1630 pci_unmap_len(re, maplen),
1635 PCI_DMA_TODEVICE); 1631 PCI_DMA_TODEVICE);
1632 re->flags = 0;
1636} 1633}
1637 1634
1638/* 1635/*
@@ -1839,6 +1836,7 @@ static void sky2_tx_complete(struct sky2_port *sky2, u16 done)
1839 dev->stats.tx_packets++; 1836 dev->stats.tx_packets++;
1840 dev->stats.tx_bytes += skb->len; 1837 dev->stats.tx_bytes += skb->len;
1841 1838
1839 re->skb = NULL;
1842 dev_kfree_skb_any(skb); 1840 dev_kfree_skb_any(skb);
1843 1841
1844 sky2->tx_next = RING_NEXT(idx, sky2->tx_ring_size); 1842 sky2->tx_next = RING_NEXT(idx, sky2->tx_ring_size);
@@ -1848,7 +1846,8 @@ static void sky2_tx_complete(struct sky2_port *sky2, u16 done)
1848 sky2->tx_cons = idx; 1846 sky2->tx_cons = idx;
1849 smp_mb(); 1847 smp_mb();
1850 1848
1851 if (tx_avail(sky2) > MAX_SKB_TX_LE + 4) 1849 /* Wake unless it's detached, and called e.g. from sky2_down() */
1850 if (tx_avail(sky2) > MAX_SKB_TX_LE + 4 && netif_device_present(dev))
1852 netif_wake_queue(dev); 1851 netif_wake_queue(dev);
1853} 1852}
1854 1853
@@ -3240,6 +3239,27 @@ static inline u8 sky2_wol_supported(const struct sky2_hw *hw)
3240 return sky2_is_copper(hw) ? (WAKE_PHY | WAKE_MAGIC) : 0; 3239 return sky2_is_copper(hw) ? (WAKE_PHY | WAKE_MAGIC) : 0;
3241} 3240}
3242 3241
3242static void sky2_hw_set_wol(struct sky2_hw *hw)
3243{
3244 int wol = 0;
3245 int i;
3246
3247 for (i = 0; i < hw->ports; i++) {
3248 struct net_device *dev = hw->dev[i];
3249 struct sky2_port *sky2 = netdev_priv(dev);
3250
3251 if (sky2->wol)
3252 wol = 1;
3253 }
3254
3255 if (hw->chip_id == CHIP_ID_YUKON_EC_U ||
3256 hw->chip_id == CHIP_ID_YUKON_EX ||
3257 hw->chip_id == CHIP_ID_YUKON_FE_P)
3258 sky2_write32(hw, B0_CTST, wol ? Y2_HW_WOL_ON : Y2_HW_WOL_OFF);
3259
3260 device_set_wakeup_enable(&hw->pdev->dev, wol);
3261}
3262
3243static void sky2_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol) 3263static void sky2_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
3244{ 3264{
3245 const struct sky2_port *sky2 = netdev_priv(dev); 3265 const struct sky2_port *sky2 = netdev_priv(dev);
@@ -3259,13 +3279,7 @@ static int sky2_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
3259 3279
3260 sky2->wol = wol->wolopts; 3280 sky2->wol = wol->wolopts;
3261 3281
3262 if (hw->chip_id == CHIP_ID_YUKON_EC_U || 3282 sky2_hw_set_wol(hw);
3263 hw->chip_id == CHIP_ID_YUKON_EX ||
3264 hw->chip_id == CHIP_ID_YUKON_FE_P)
3265 sky2_write32(hw, B0_CTST, sky2->wol
3266 ? Y2_HW_WOL_ON : Y2_HW_WOL_OFF);
3267
3268 device_set_wakeup_enable(&hw->pdev->dev, sky2->wol);
3269 3283
3270 if (!netif_running(dev)) 3284 if (!netif_running(dev))
3271 sky2_wol_init(sky2); 3285 sky2_wol_init(sky2);
@@ -4530,7 +4544,7 @@ static const char *sky2_name(u8 chipid, char *buf, int sz)
4530 "Optima", /* 0xbc */ 4544 "Optima", /* 0xbc */
4531 }; 4545 };
4532 4546
4533 if (chipid >= CHIP_ID_YUKON_XL && chipid < CHIP_ID_YUKON_OPT) 4547 if (chipid >= CHIP_ID_YUKON_XL && chipid <= CHIP_ID_YUKON_OPT)
4534 strncpy(buf, name[chipid - CHIP_ID_YUKON_XL], sz); 4548 strncpy(buf, name[chipid - CHIP_ID_YUKON_XL], sz);
4535 else 4549 else
4536 snprintf(buf, sz, "(chip %#x)", chipid); 4550 snprintf(buf, sz, "(chip %#x)", chipid);
@@ -4697,6 +4711,7 @@ static int __devinit sky2_probe(struct pci_dev *pdev,
4697 INIT_WORK(&hw->restart_work, sky2_restart); 4711 INIT_WORK(&hw->restart_work, sky2_restart);
4698 4712
4699 pci_set_drvdata(pdev, hw); 4713 pci_set_drvdata(pdev, hw);
4714 pdev->d3_delay = 150;
4700 4715
4701 return 0; 4716 return 0;
4702 4717
diff --git a/drivers/net/starfire.c b/drivers/net/starfire.c
index 95db60adde41..f9521136a869 100644
--- a/drivers/net/starfire.c
+++ b/drivers/net/starfire.c
@@ -1063,7 +1063,7 @@ static int netdev_open(struct net_device *dev)
1063 if (retval) { 1063 if (retval) {
1064 printk(KERN_ERR "starfire: Failed to load firmware \"%s\"\n", 1064 printk(KERN_ERR "starfire: Failed to load firmware \"%s\"\n",
1065 FIRMWARE_RX); 1065 FIRMWARE_RX);
1066 return retval; 1066 goto out_init;
1067 } 1067 }
1068 if (fw_rx->size % 4) { 1068 if (fw_rx->size % 4) {
1069 printk(KERN_ERR "starfire: bogus length %zu in \"%s\"\n", 1069 printk(KERN_ERR "starfire: bogus length %zu in \"%s\"\n",
@@ -1108,6 +1108,9 @@ out_tx:
1108 release_firmware(fw_tx); 1108 release_firmware(fw_tx);
1109out_rx: 1109out_rx:
1110 release_firmware(fw_rx); 1110 release_firmware(fw_rx);
1111out_init:
1112 if (retval)
1113 netdev_close(dev);
1111 return retval; 1114 return retval;
1112} 1115}
1113 1116
diff --git a/drivers/net/tc35815.c b/drivers/net/tc35815.c
index 75a669d48e5e..d71c1976072e 100644
--- a/drivers/net/tc35815.c
+++ b/drivers/net/tc35815.c
@@ -1437,7 +1437,6 @@ static int tc35815_do_interrupt(struct net_device *dev, u32 status, int limit)
1437 /* Transmit complete. */ 1437 /* Transmit complete. */
1438 lp->lstats.tx_ints++; 1438 lp->lstats.tx_ints++;
1439 tc35815_txdone(dev); 1439 tc35815_txdone(dev);
1440 netif_wake_queue(dev);
1441 if (ret < 0) 1440 if (ret < 0)
1442 ret = 0; 1441 ret = 0;
1443 } 1442 }
diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c
index 3a74d2168598..7f82b0238e08 100644
--- a/drivers/net/tg3.c
+++ b/drivers/net/tg3.c
@@ -4,7 +4,7 @@
4 * Copyright (C) 2001, 2002, 2003, 2004 David S. Miller (davem@redhat.com) 4 * Copyright (C) 2001, 2002, 2003, 2004 David S. Miller (davem@redhat.com)
5 * Copyright (C) 2001, 2002, 2003 Jeff Garzik (jgarzik@pobox.com) 5 * Copyright (C) 2001, 2002, 2003 Jeff Garzik (jgarzik@pobox.com)
6 * Copyright (C) 2004 Sun Microsystems Inc. 6 * Copyright (C) 2004 Sun Microsystems Inc.
7 * Copyright (C) 2005-2009 Broadcom Corporation. 7 * Copyright (C) 2005-2010 Broadcom Corporation.
8 * 8 *
9 * Firmware is: 9 * Firmware is:
10 * Derived from proprietary unpublished source code, 10 * Derived from proprietary unpublished source code,
@@ -68,8 +68,8 @@
68 68
69#define DRV_MODULE_NAME "tg3" 69#define DRV_MODULE_NAME "tg3"
70#define PFX DRV_MODULE_NAME ": " 70#define PFX DRV_MODULE_NAME ": "
71#define DRV_MODULE_VERSION "3.105" 71#define DRV_MODULE_VERSION "3.106"
72#define DRV_MODULE_RELDATE "December 2, 2009" 72#define DRV_MODULE_RELDATE "January 12, 2010"
73 73
74#define TG3_DEF_MAC_MODE 0 74#define TG3_DEF_MAC_MODE 0
75#define TG3_DEF_RX_MODE 0 75#define TG3_DEF_RX_MODE 0
@@ -1037,7 +1037,11 @@ static void tg3_mdio_start(struct tg3 *tp)
1037 else 1037 else
1038 tp->phy_addr = 1; 1038 tp->phy_addr = 1;
1039 1039
1040 is_serdes = tr32(SG_DIG_STATUS) & SG_DIG_IS_SERDES; 1040 if (tp->pci_chip_rev_id != CHIPREV_ID_5717_A0)
1041 is_serdes = tr32(SG_DIG_STATUS) & SG_DIG_IS_SERDES;
1042 else
1043 is_serdes = tr32(TG3_CPMU_PHY_STRAP) &
1044 TG3_CPMU_PHY_STRAP_IS_SERDES;
1041 if (is_serdes) 1045 if (is_serdes)
1042 tp->phy_addr += 7; 1046 tp->phy_addr += 7;
1043 } else 1047 } else
@@ -4693,8 +4697,9 @@ next_pkt:
4693 (*post_ptr)++; 4697 (*post_ptr)++;
4694 4698
4695 if (unlikely(rx_std_posted >= tp->rx_std_max_post)) { 4699 if (unlikely(rx_std_posted >= tp->rx_std_max_post)) {
4696 u32 idx = *post_ptr % TG3_RX_RING_SIZE; 4700 tpr->rx_std_prod_idx = std_prod_idx % TG3_RX_RING_SIZE;
4697 tw32_rx_mbox(TG3_RX_STD_PROD_IDX_REG, idx); 4701 tw32_rx_mbox(TG3_RX_STD_PROD_IDX_REG,
4702 tpr->rx_std_prod_idx);
4698 work_mask &= ~RXD_OPAQUE_RING_STD; 4703 work_mask &= ~RXD_OPAQUE_RING_STD;
4699 rx_std_posted = 0; 4704 rx_std_posted = 0;
4700 } 4705 }
@@ -7742,7 +7747,7 @@ static int tg3_reset_hw(struct tg3 *tp, int reset_phy)
7742 ((u64) tpr->rx_std_mapping >> 32)); 7747 ((u64) tpr->rx_std_mapping >> 32));
7743 tw32(RCVDBDI_STD_BD + TG3_BDINFO_HOST_ADDR + TG3_64BIT_REG_LOW, 7748 tw32(RCVDBDI_STD_BD + TG3_BDINFO_HOST_ADDR + TG3_64BIT_REG_LOW,
7744 ((u64) tpr->rx_std_mapping & 0xffffffff)); 7749 ((u64) tpr->rx_std_mapping & 0xffffffff));
7745 if (!(tp->tg3_flags3 & TG3_FLG3_5755_PLUS)) 7750 if (GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5717)
7746 tw32(RCVDBDI_STD_BD + TG3_BDINFO_NIC_ADDR, 7751 tw32(RCVDBDI_STD_BD + TG3_BDINFO_NIC_ADDR,
7747 NIC_SRAM_RX_BUFFER_DESC); 7752 NIC_SRAM_RX_BUFFER_DESC);
7748 7753
@@ -12122,7 +12127,8 @@ static void __devinit tg3_get_eeprom_hw_cfg(struct tg3 *tp)
12122 12127
12123 tp->phy_id = eeprom_phy_id; 12128 tp->phy_id = eeprom_phy_id;
12124 if (eeprom_phy_serdes) { 12129 if (eeprom_phy_serdes) {
12125 if (tp->tg3_flags2 & TG3_FLG2_5780_CLASS) 12130 if ((tp->tg3_flags2 & TG3_FLG2_5780_CLASS) ||
12131 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717)
12126 tp->tg3_flags2 |= TG3_FLG2_MII_SERDES; 12132 tp->tg3_flags2 |= TG3_FLG2_MII_SERDES;
12127 else 12133 else
12128 tp->tg3_flags2 |= TG3_FLG2_PHY_SERDES; 12134 tp->tg3_flags2 |= TG3_FLG2_PHY_SERDES;
@@ -13384,6 +13390,11 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
13384 if (err) 13390 if (err)
13385 return err; 13391 return err;
13386 13392
13393 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 &&
13394 (tp->pci_chip_rev_id != CHIPREV_ID_5717_A0 ||
13395 (tp->tg3_flags2 & TG3_FLG2_MII_SERDES)))
13396 return -ENOTSUPP;
13397
13387 /* Initialize data/descriptor byte/word swapping. */ 13398 /* Initialize data/descriptor byte/word swapping. */
13388 val = tr32(GRC_MODE); 13399 val = tr32(GRC_MODE);
13389 val &= GRC_MODE_HOST_STACKUP; 13400 val &= GRC_MODE_HOST_STACKUP;
diff --git a/drivers/net/tg3.h b/drivers/net/tg3.h
index cd30889650f8..8a167912902b 100644
--- a/drivers/net/tg3.h
+++ b/drivers/net/tg3.h
@@ -4,6 +4,7 @@
4 * Copyright (C) 2001, 2002, 2003, 2004 David S. Miller (davem@redhat.com) 4 * Copyright (C) 2001, 2002, 2003, 2004 David S. Miller (davem@redhat.com)
5 * Copyright (C) 2001 Jeff Garzik (jgarzik@pobox.com) 5 * Copyright (C) 2001 Jeff Garzik (jgarzik@pobox.com)
6 * Copyright (C) 2004 Sun Microsystems Inc. 6 * Copyright (C) 2004 Sun Microsystems Inc.
7 * Copyright (C) 2007-2010 Broadcom Corporation.
7 */ 8 */
8 9
9#ifndef _T3_H 10#ifndef _T3_H
@@ -1054,6 +1055,8 @@
1054#define CPMU_MUTEX_REQ_DRIVER 0x00001000 1055#define CPMU_MUTEX_REQ_DRIVER 0x00001000
1055#define TG3_CPMU_MUTEX_GNT 0x00003660 1056#define TG3_CPMU_MUTEX_GNT 0x00003660
1056#define CPMU_MUTEX_GNT_DRIVER 0x00001000 1057#define CPMU_MUTEX_GNT_DRIVER 0x00001000
1058#define TG3_CPMU_PHY_STRAP 0x00003664
1059#define TG3_CPMU_PHY_STRAP_IS_SERDES 0x00000020
1057/* 0x3664 --> 0x3800 unused */ 1060/* 0x3664 --> 0x3800 unused */
1058 1061
1059/* Mbuf cluster free registers */ 1062/* Mbuf cluster free registers */
diff --git a/drivers/net/tulip/Kconfig b/drivers/net/tulip/Kconfig
index 1cc8cf4425d1..516713fa0a05 100644
--- a/drivers/net/tulip/Kconfig
+++ b/drivers/net/tulip/Kconfig
@@ -101,6 +101,10 @@ config TULIP_NAPI_HW_MITIGATION
101 101
102 If in doubt, say Y. 102 If in doubt, say Y.
103 103
104config TULIP_DM910X
105 def_bool y
106 depends on TULIP && SPARC
107
104config DE4X5 108config DE4X5
105 tristate "Generic DECchip & DIGITAL EtherWORKS PCI/EISA" 109 tristate "Generic DECchip & DIGITAL EtherWORKS PCI/EISA"
106 depends on PCI || EISA 110 depends on PCI || EISA
diff --git a/drivers/net/tulip/dmfe.c b/drivers/net/tulip/dmfe.c
index ad63621913c3..6f44ebf58910 100644
--- a/drivers/net/tulip/dmfe.c
+++ b/drivers/net/tulip/dmfe.c
@@ -92,6 +92,10 @@
92#include <asm/uaccess.h> 92#include <asm/uaccess.h>
93#include <asm/irq.h> 93#include <asm/irq.h>
94 94
95#ifdef CONFIG_TULIP_DM910X
96#include <linux/of.h>
97#endif
98
95 99
96/* Board/System/Debug information/definition ---------------- */ 100/* Board/System/Debug information/definition ---------------- */
97#define PCI_DM9132_ID 0x91321282 /* Davicom DM9132 ID */ 101#define PCI_DM9132_ID 0x91321282 /* Davicom DM9132 ID */
@@ -377,6 +381,23 @@ static int __devinit dmfe_init_one (struct pci_dev *pdev,
377 if (!printed_version++) 381 if (!printed_version++)
378 printk(version); 382 printk(version);
379 383
384 /*
385 * SPARC on-board DM910x chips should be handled by the main
386 * tulip driver, except for early DM9100s.
387 */
388#ifdef CONFIG_TULIP_DM910X
389 if ((ent->driver_data == PCI_DM9100_ID && pdev->revision >= 0x30) ||
390 ent->driver_data == PCI_DM9102_ID) {
391 struct device_node *dp = pci_device_to_OF_node(pdev);
392
393 if (dp && of_get_property(dp, "local-mac-address", NULL)) {
394 printk(KERN_INFO DRV_NAME
395 ": skipping on-board DM910x (use tulip)\n");
396 return -ENODEV;
397 }
398 }
399#endif
400
380 /* Init network device */ 401 /* Init network device */
381 dev = alloc_etherdev(sizeof(*db)); 402 dev = alloc_etherdev(sizeof(*db));
382 if (dev == NULL) 403 if (dev == NULL)
diff --git a/drivers/net/tulip/tulip_core.c b/drivers/net/tulip/tulip_core.c
index 0fa3140d65bf..20696b5d60a5 100644
--- a/drivers/net/tulip/tulip_core.c
+++ b/drivers/net/tulip/tulip_core.c
@@ -196,9 +196,13 @@ struct tulip_chip_table tulip_tbl[] = {
196 | HAS_NWAY | HAS_PCI_MWI, tulip_timer, tulip_media_task }, 196 | HAS_NWAY | HAS_PCI_MWI, tulip_timer, tulip_media_task },
197 197
198 /* DM910X */ 198 /* DM910X */
199#ifdef CONFIG_TULIP_DM910X
199 { "Davicom DM9102/DM9102A", 128, 0x0001ebef, 200 { "Davicom DM9102/DM9102A", 128, 0x0001ebef,
200 HAS_MII | HAS_MEDIA_TABLE | CSR12_IN_SROM | HAS_ACPI, 201 HAS_MII | HAS_MEDIA_TABLE | CSR12_IN_SROM | HAS_ACPI,
201 tulip_timer, tulip_media_task }, 202 tulip_timer, tulip_media_task },
203#else
204 { NULL },
205#endif
202 206
203 /* RS7112 */ 207 /* RS7112 */
204 { "Conexant LANfinity", 256, 0x0001ebef, 208 { "Conexant LANfinity", 256, 0x0001ebef,
@@ -228,8 +232,10 @@ static struct pci_device_id tulip_pci_tbl[] = {
228 { 0x1259, 0xa120, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET }, 232 { 0x1259, 0xa120, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
229 { 0x11F6, 0x9881, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMPEX9881 }, 233 { 0x11F6, 0x9881, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMPEX9881 },
230 { 0x8086, 0x0039, PCI_ANY_ID, PCI_ANY_ID, 0, 0, I21145 }, 234 { 0x8086, 0x0039, PCI_ANY_ID, PCI_ANY_ID, 0, 0, I21145 },
235#ifdef CONFIG_TULIP_DM910X
231 { 0x1282, 0x9100, PCI_ANY_ID, PCI_ANY_ID, 0, 0, DM910X }, 236 { 0x1282, 0x9100, PCI_ANY_ID, PCI_ANY_ID, 0, 0, DM910X },
232 { 0x1282, 0x9102, PCI_ANY_ID, PCI_ANY_ID, 0, 0, DM910X }, 237 { 0x1282, 0x9102, PCI_ANY_ID, PCI_ANY_ID, 0, 0, DM910X },
238#endif
233 { 0x1113, 0x1216, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET }, 239 { 0x1113, 0x1216, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
234 { 0x1113, 0x1217, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MX98715 }, 240 { 0x1113, 0x1217, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MX98715 },
235 { 0x1113, 0x9511, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET }, 241 { 0x1113, 0x9511, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
@@ -243,6 +249,7 @@ static struct pci_device_id tulip_pci_tbl[] = {
243 { 0x17B3, 0xAB08, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET }, 249 { 0x17B3, 0xAB08, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
244 { 0x10b7, 0x9300, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET }, /* 3Com 3CSOHO100B-TX */ 250 { 0x10b7, 0x9300, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET }, /* 3Com 3CSOHO100B-TX */
245 { 0x14ea, 0xab08, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET }, /* Planex FNW-3602-TX */ 251 { 0x14ea, 0xab08, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET }, /* Planex FNW-3602-TX */
252 { 0x1414, 0x0001, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET }, /* Microsoft MN-120 */
246 { 0x1414, 0x0002, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET }, 253 { 0x1414, 0x0002, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
247 { } /* terminate list */ 254 { } /* terminate list */
248}; 255};
@@ -1299,18 +1306,30 @@ static int __devinit tulip_init_one (struct pci_dev *pdev,
1299 } 1306 }
1300 1307
1301 /* 1308 /*
1302 * Early DM9100's need software CRC and the DMFE driver 1309 * DM910x chips should be handled by the dmfe driver, except
1310 * on-board chips on SPARC systems. Also, early DM9100s need
1311 * software CRC which only the dmfe driver supports.
1303 */ 1312 */
1304 1313
1305 if (pdev->vendor == 0x1282 && pdev->device == 0x9100) 1314#ifdef CONFIG_TULIP_DM910X
1306 { 1315 if (chip_idx == DM910X) {
1307 /* Read Chip revision */ 1316 struct device_node *dp;
1308 if (pdev->revision < 0x30) 1317
1309 { 1318 if (pdev->vendor == 0x1282 && pdev->device == 0x9100 &&
1310 printk(KERN_ERR PFX "skipping early DM9100 with Crc bug (use dmfe)\n"); 1319 pdev->revision < 0x30) {
1320 printk(KERN_INFO PFX
1321 "skipping early DM9100 with Crc bug (use dmfe)\n");
1322 return -ENODEV;
1323 }
1324
1325 dp = pci_device_to_OF_node(pdev);
1326 if (!(dp && of_get_property(dp, "local-mac-address", NULL))) {
1327 printk(KERN_INFO PFX
1328 "skipping DM910x expansion card (use dmfe)\n");
1311 return -ENODEV; 1329 return -ENODEV;
1312 } 1330 }
1313 } 1331 }
1332#endif
1314 1333
1315 /* 1334 /*
1316 * Looks for early PCI chipsets where people report hangs 1335 * Looks for early PCI chipsets where people report hangs
diff --git a/drivers/net/tun.c b/drivers/net/tun.c
index 01e99f22210e..2834a01bae24 100644
--- a/drivers/net/tun.c
+++ b/drivers/net/tun.c
@@ -849,13 +849,13 @@ static void tun_sock_write_space(struct sock *sk)
849 if (sk->sk_sleep && waitqueue_active(sk->sk_sleep)) 849 if (sk->sk_sleep && waitqueue_active(sk->sk_sleep))
850 wake_up_interruptible_sync(sk->sk_sleep); 850 wake_up_interruptible_sync(sk->sk_sleep);
851 851
852 tun = container_of(sk, struct tun_sock, sk)->tun; 852 tun = tun_sk(sk)->tun;
853 kill_fasync(&tun->fasync, SIGIO, POLL_OUT); 853 kill_fasync(&tun->fasync, SIGIO, POLL_OUT);
854} 854}
855 855
856static void tun_sock_destruct(struct sock *sk) 856static void tun_sock_destruct(struct sock *sk)
857{ 857{
858 free_netdev(container_of(sk, struct tun_sock, sk)->tun->dev); 858 free_netdev(tun_sk(sk)->tun->dev);
859} 859}
860 860
861static struct proto tun_proto = { 861static struct proto tun_proto = {
@@ -990,7 +990,7 @@ static int tun_set_iff(struct net *net, struct file *file, struct ifreq *ifr)
990 sk->sk_write_space = tun_sock_write_space; 990 sk->sk_write_space = tun_sock_write_space;
991 sk->sk_sndbuf = INT_MAX; 991 sk->sk_sndbuf = INT_MAX;
992 992
993 container_of(sk, struct tun_sock, sk)->tun = tun; 993 tun_sk(sk)->tun = tun;
994 994
995 security_tun_dev_post_create(sk); 995 security_tun_dev_post_create(sk);
996 996
diff --git a/drivers/net/ucc_geth.c b/drivers/net/ucc_geth.c
index afaf088b72ea..eb8fe7e16c6c 100644
--- a/drivers/net/ucc_geth.c
+++ b/drivers/net/ucc_geth.c
@@ -1563,7 +1563,10 @@ static int ugeth_disable(struct ucc_geth_private *ugeth, enum comm_dir mode)
1563 1563
1564static void ugeth_quiesce(struct ucc_geth_private *ugeth) 1564static void ugeth_quiesce(struct ucc_geth_private *ugeth)
1565{ 1565{
1566 /* Wait for and prevent any further xmits. */ 1566 /* Prevent any further xmits, plus detach the device. */
1567 netif_device_detach(ugeth->ndev);
1568
1569 /* Wait for any current xmits to finish. */
1567 netif_tx_disable(ugeth->ndev); 1570 netif_tx_disable(ugeth->ndev);
1568 1571
1569 /* Disable the interrupt to avoid NAPI rescheduling. */ 1572 /* Disable the interrupt to avoid NAPI rescheduling. */
@@ -1577,7 +1580,7 @@ static void ugeth_activate(struct ucc_geth_private *ugeth)
1577{ 1580{
1578 napi_enable(&ugeth->napi); 1581 napi_enable(&ugeth->napi);
1579 enable_irq(ugeth->ug_info->uf_info.irq); 1582 enable_irq(ugeth->ug_info->uf_info.irq);
1580 netif_tx_wake_all_queues(ugeth->ndev); 1583 netif_device_attach(ugeth->ndev);
1581} 1584}
1582 1585
1583/* Called every time the controller might need to be made 1586/* Called every time the controller might need to be made
@@ -1648,25 +1651,28 @@ static void adjust_link(struct net_device *dev)
1648 ugeth->oldspeed = phydev->speed; 1651 ugeth->oldspeed = phydev->speed;
1649 } 1652 }
1650 1653
1651 /*
1652 * To change the MAC configuration we need to disable the
1653 * controller. To do so, we have to either grab ugeth->lock,
1654 * which is a bad idea since 'graceful stop' commands might
1655 * take quite a while, or we can quiesce driver's activity.
1656 */
1657 ugeth_quiesce(ugeth);
1658 ugeth_disable(ugeth, COMM_DIR_RX_AND_TX);
1659
1660 out_be32(&ug_regs->maccfg2, tempval);
1661 out_be32(&uf_regs->upsmr, upsmr);
1662
1663 ugeth_enable(ugeth, COMM_DIR_RX_AND_TX);
1664 ugeth_activate(ugeth);
1665
1666 if (!ugeth->oldlink) { 1654 if (!ugeth->oldlink) {
1667 new_state = 1; 1655 new_state = 1;
1668 ugeth->oldlink = 1; 1656 ugeth->oldlink = 1;
1669 } 1657 }
1658
1659 if (new_state) {
1660 /*
1661 * To change the MAC configuration we need to disable
1662 * the controller. To do so, we have to either grab
1663 * ugeth->lock, which is a bad idea since 'graceful
1664 * stop' commands might take quite a while, or we can
1665 * quiesce driver's activity.
1666 */
1667 ugeth_quiesce(ugeth);
1668 ugeth_disable(ugeth, COMM_DIR_RX_AND_TX);
1669
1670 out_be32(&ug_regs->maccfg2, tempval);
1671 out_be32(&uf_regs->upsmr, upsmr);
1672
1673 ugeth_enable(ugeth, COMM_DIR_RX_AND_TX);
1674 ugeth_activate(ugeth);
1675 }
1670 } else if (ugeth->oldlink) { 1676 } else if (ugeth->oldlink) {
1671 new_state = 1; 1677 new_state = 1;
1672 ugeth->oldlink = 0; 1678 ugeth->oldlink = 0;
@@ -3273,13 +3279,12 @@ static int ucc_geth_tx(struct net_device *dev, u8 txQ)
3273 /* Handle the transmitted buffer and release */ 3279 /* Handle the transmitted buffer and release */
3274 /* the BD to be used with the current frame */ 3280 /* the BD to be used with the current frame */
3275 3281
3276 if ((bd == ugeth->txBd[txQ]) && (netif_queue_stopped(dev) == 0)) 3282 skb = ugeth->tx_skbuff[txQ][ugeth->skb_dirtytx[txQ]];
3283 if (!skb)
3277 break; 3284 break;
3278 3285
3279 dev->stats.tx_packets++; 3286 dev->stats.tx_packets++;
3280 3287
3281 skb = ugeth->tx_skbuff[txQ][ugeth->skb_dirtytx[txQ]];
3282
3283 if (skb_queue_len(&ugeth->rx_recycle) < RX_BD_RING_LEN && 3288 if (skb_queue_len(&ugeth->rx_recycle) < RX_BD_RING_LEN &&
3284 skb_recycle_check(skb, 3289 skb_recycle_check(skb,
3285 ugeth->ug_info->uf_info.max_rx_buf_length + 3290 ugeth->ug_info->uf_info.max_rx_buf_length +
@@ -3601,6 +3606,7 @@ static int ucc_geth_suspend(struct of_device *ofdev, pm_message_t state)
3601 if (!netif_running(ndev)) 3606 if (!netif_running(ndev))
3602 return 0; 3607 return 0;
3603 3608
3609 netif_device_detach(ndev);
3604 napi_disable(&ugeth->napi); 3610 napi_disable(&ugeth->napi);
3605 3611
3606 /* 3612 /*
@@ -3659,7 +3665,7 @@ static int ucc_geth_resume(struct of_device *ofdev)
3659 phy_start(ugeth->phydev); 3665 phy_start(ugeth->phydev);
3660 3666
3661 napi_enable(&ugeth->napi); 3667 napi_enable(&ugeth->napi);
3662 netif_start_queue(ndev); 3668 netif_device_attach(ndev);
3663 3669
3664 return 0; 3670 return 0;
3665} 3671}
diff --git a/drivers/net/ucc_geth.h b/drivers/net/ucc_geth.h
index a007e2acf651..ef1fbeb11c6e 100644
--- a/drivers/net/ucc_geth.h
+++ b/drivers/net/ucc_geth.h
@@ -838,13 +838,13 @@ struct ucc_geth_hardware_statistics {
838 using the maximum is 838 using the maximum is
839 easier */ 839 easier */
840#define UCC_GETH_SEND_QUEUE_QUEUE_DESCRIPTOR_ALIGNMENT 32 840#define UCC_GETH_SEND_QUEUE_QUEUE_DESCRIPTOR_ALIGNMENT 32
841#define UCC_GETH_SCHEDULER_ALIGNMENT 4 /* This is a guess */ 841#define UCC_GETH_SCHEDULER_ALIGNMENT 8 /* This is a guess */
842#define UCC_GETH_TX_STATISTICS_ALIGNMENT 4 /* This is a guess */ 842#define UCC_GETH_TX_STATISTICS_ALIGNMENT 4 /* This is a guess */
843#define UCC_GETH_RX_STATISTICS_ALIGNMENT 4 /* This is a guess */ 843#define UCC_GETH_RX_STATISTICS_ALIGNMENT 4 /* This is a guess */
844#define UCC_GETH_RX_INTERRUPT_COALESCING_ALIGNMENT 64 844#define UCC_GETH_RX_INTERRUPT_COALESCING_ALIGNMENT 64
845#define UCC_GETH_RX_BD_QUEUES_ALIGNMENT 8 /* This is a guess */ 845#define UCC_GETH_RX_BD_QUEUES_ALIGNMENT 8 /* This is a guess */
846#define UCC_GETH_RX_PREFETCHED_BDS_ALIGNMENT 128 /* This is a guess */ 846#define UCC_GETH_RX_PREFETCHED_BDS_ALIGNMENT 128 /* This is a guess */
847#define UCC_GETH_RX_EXTENDED_FILTERING_GLOBAL_PARAMETERS_ALIGNMENT 4 /* This 847#define UCC_GETH_RX_EXTENDED_FILTERING_GLOBAL_PARAMETERS_ALIGNMENT 8 /* This
848 is a 848 is a
849 guess 849 guess
850 */ 850 */
@@ -899,16 +899,17 @@ struct ucc_geth_hardware_statistics {
899#define UCC_GETH_UTFS_INIT 512 /* Tx virtual FIFO size 899#define UCC_GETH_UTFS_INIT 512 /* Tx virtual FIFO size
900 */ 900 */
901#define UCC_GETH_UTFET_INIT 256 /* 1/2 utfs */ 901#define UCC_GETH_UTFET_INIT 256 /* 1/2 utfs */
902#define UCC_GETH_UTFTT_INIT 128 902#define UCC_GETH_UTFTT_INIT 512
903/* Gigabit Ethernet (1000 Mbps) */ 903/* Gigabit Ethernet (1000 Mbps) */
904#define UCC_GETH_URFS_GIGA_INIT 4096/*2048*/ /* Rx virtual 904#define UCC_GETH_URFS_GIGA_INIT 4096/*2048*/ /* Rx virtual
905 FIFO size */ 905 FIFO size */
906#define UCC_GETH_URFET_GIGA_INIT 2048/*1024*/ /* 1/2 urfs */ 906#define UCC_GETH_URFET_GIGA_INIT 2048/*1024*/ /* 1/2 urfs */
907#define UCC_GETH_URFSET_GIGA_INIT 3072/*1536*/ /* 3/4 urfs */ 907#define UCC_GETH_URFSET_GIGA_INIT 3072/*1536*/ /* 3/4 urfs */
908#define UCC_GETH_UTFS_GIGA_INIT 8192/*2048*/ /* Tx virtual 908#define UCC_GETH_UTFS_GIGA_INIT 4096/*2048*/ /* Tx virtual
909 FIFO size */
910#define UCC_GETH_UTFET_GIGA_INIT 2048/*1024*/ /* 1/2 utfs */
911#define UCC_GETH_UTFTT_GIGA_INIT 4096/*0x40*/ /* Tx virtual
909 FIFO size */ 912 FIFO size */
910#define UCC_GETH_UTFET_GIGA_INIT 4096/*1024*/ /* 1/2 utfs */
911#define UCC_GETH_UTFTT_GIGA_INIT 0x400/*0x40*/ /* */
912 913
913#define UCC_GETH_REMODER_INIT 0 /* bits that must be 914#define UCC_GETH_REMODER_INIT 0 /* bits that must be
914 set */ 915 set */
diff --git a/drivers/net/usb/cdc_ether.c b/drivers/net/usb/cdc_ether.c
index 21e183a83b99..5f3b9eaeb04f 100644
--- a/drivers/net/usb/cdc_ether.c
+++ b/drivers/net/usb/cdc_ether.c
@@ -419,7 +419,7 @@ static int cdc_manage_power(struct usbnet *dev, int on)
419 419
420static const struct driver_info cdc_info = { 420static const struct driver_info cdc_info = {
421 .description = "CDC Ethernet Device", 421 .description = "CDC Ethernet Device",
422 .flags = FLAG_ETHER | FLAG_LINK_INTR, 422 .flags = FLAG_ETHER,
423 // .check_connect = cdc_check_connect, 423 // .check_connect = cdc_check_connect,
424 .bind = cdc_bind, 424 .bind = cdc_bind,
425 .unbind = usbnet_cdc_unbind, 425 .unbind = usbnet_cdc_unbind,
@@ -584,6 +584,11 @@ static const struct usb_device_id products [] = {
584 USB_CDC_SUBCLASS_MDLM, USB_CDC_PROTO_NONE), 584 USB_CDC_SUBCLASS_MDLM, USB_CDC_PROTO_NONE),
585 .driver_info = (unsigned long) &mbm_info, 585 .driver_info = (unsigned long) &mbm_info,
586}, { 586}, {
587 /* Ericsson C3607w ver 2 */
588 USB_DEVICE_AND_INTERFACE_INFO(0x0bdb, 0x190b, USB_CLASS_COMM,
589 USB_CDC_SUBCLASS_MDLM, USB_CDC_PROTO_NONE),
590 .driver_info = (unsigned long) &mbm_info,
591}, {
587 /* Toshiba F3507g */ 592 /* Toshiba F3507g */
588 USB_DEVICE_AND_INTERFACE_INFO(0x0930, 0x130b, USB_CLASS_COMM, 593 USB_DEVICE_AND_INTERFACE_INFO(0x0930, 0x130b, USB_CLASS_COMM,
589 USB_CDC_SUBCLASS_MDLM, USB_CDC_PROTO_NONE), 594 USB_CDC_SUBCLASS_MDLM, USB_CDC_PROTO_NONE),
diff --git a/drivers/net/usb/hso.c b/drivers/net/usb/hso.c
index f78f0903b073..6895f1531238 100644
--- a/drivers/net/usb/hso.c
+++ b/drivers/net/usb/hso.c
@@ -286,6 +286,7 @@ struct hso_device {
286 u8 usb_gone; 286 u8 usb_gone;
287 struct work_struct async_get_intf; 287 struct work_struct async_get_intf;
288 struct work_struct async_put_intf; 288 struct work_struct async_put_intf;
289 struct work_struct reset_device;
289 290
290 struct usb_device *usb; 291 struct usb_device *usb;
291 struct usb_interface *interface; 292 struct usb_interface *interface;
@@ -332,7 +333,8 @@ static void hso_kick_transmit(struct hso_serial *serial);
332/* Helper functions */ 333/* Helper functions */
333static int hso_mux_submit_intr_urb(struct hso_shared_int *mux_int, 334static int hso_mux_submit_intr_urb(struct hso_shared_int *mux_int,
334 struct usb_device *usb, gfp_t gfp); 335 struct usb_device *usb, gfp_t gfp);
335static void log_usb_status(int status, const char *function); 336static void handle_usb_error(int status, const char *function,
337 struct hso_device *hso_dev);
336static struct usb_endpoint_descriptor *hso_get_ep(struct usb_interface *intf, 338static struct usb_endpoint_descriptor *hso_get_ep(struct usb_interface *intf,
337 int type, int dir); 339 int type, int dir);
338static int hso_get_mux_ports(struct usb_interface *intf, unsigned char *ports); 340static int hso_get_mux_ports(struct usb_interface *intf, unsigned char *ports);
@@ -350,6 +352,7 @@ static void async_put_intf(struct work_struct *data);
350static int hso_put_activity(struct hso_device *hso_dev); 352static int hso_put_activity(struct hso_device *hso_dev);
351static int hso_get_activity(struct hso_device *hso_dev); 353static int hso_get_activity(struct hso_device *hso_dev);
352static void tiocmget_intr_callback(struct urb *urb); 354static void tiocmget_intr_callback(struct urb *urb);
355static void reset_device(struct work_struct *data);
353/*****************************************************************************/ 356/*****************************************************************************/
354/* Helping functions */ 357/* Helping functions */
355/*****************************************************************************/ 358/*****************************************************************************/
@@ -461,10 +464,17 @@ static const struct usb_device_id hso_ids[] = {
461 {USB_DEVICE(0x0af0, 0x7501)}, /* GTM 382 */ 464 {USB_DEVICE(0x0af0, 0x7501)}, /* GTM 382 */
462 {USB_DEVICE(0x0af0, 0x7601)}, /* GE40x */ 465 {USB_DEVICE(0x0af0, 0x7601)}, /* GE40x */
463 {USB_DEVICE(0x0af0, 0x7701)}, 466 {USB_DEVICE(0x0af0, 0x7701)},
467 {USB_DEVICE(0x0af0, 0x7706)},
464 {USB_DEVICE(0x0af0, 0x7801)}, 468 {USB_DEVICE(0x0af0, 0x7801)},
465 {USB_DEVICE(0x0af0, 0x7901)}, 469 {USB_DEVICE(0x0af0, 0x7901)},
470 {USB_DEVICE(0x0af0, 0x7A01)},
471 {USB_DEVICE(0x0af0, 0x7A05)},
466 {USB_DEVICE(0x0af0, 0x8200)}, 472 {USB_DEVICE(0x0af0, 0x8200)},
467 {USB_DEVICE(0x0af0, 0x8201)}, 473 {USB_DEVICE(0x0af0, 0x8201)},
474 {USB_DEVICE(0x0af0, 0x8300)},
475 {USB_DEVICE(0x0af0, 0x8302)},
476 {USB_DEVICE(0x0af0, 0x8304)},
477 {USB_DEVICE(0x0af0, 0x8400)},
468 {USB_DEVICE(0x0af0, 0xd035)}, 478 {USB_DEVICE(0x0af0, 0xd035)},
469 {USB_DEVICE(0x0af0, 0xd055)}, 479 {USB_DEVICE(0x0af0, 0xd055)},
470 {USB_DEVICE(0x0af0, 0xd155)}, 480 {USB_DEVICE(0x0af0, 0xd155)},
@@ -473,6 +483,8 @@ static const struct usb_device_id hso_ids[] = {
473 {USB_DEVICE(0x0af0, 0xd157)}, 483 {USB_DEVICE(0x0af0, 0xd157)},
474 {USB_DEVICE(0x0af0, 0xd257)}, 484 {USB_DEVICE(0x0af0, 0xd257)},
475 {USB_DEVICE(0x0af0, 0xd357)}, 485 {USB_DEVICE(0x0af0, 0xd357)},
486 {USB_DEVICE(0x0af0, 0xd058)},
487 {USB_DEVICE(0x0af0, 0xc100)},
476 {} 488 {}
477}; 489};
478MODULE_DEVICE_TABLE(usb, hso_ids); 490MODULE_DEVICE_TABLE(usb, hso_ids);
@@ -655,8 +667,8 @@ static void set_serial_by_index(unsigned index, struct hso_serial *serial)
655 spin_unlock_irqrestore(&serial_table_lock, flags); 667 spin_unlock_irqrestore(&serial_table_lock, flags);
656} 668}
657 669
658/* log a meaningful explanation of an USB status */ 670static void handle_usb_error(int status, const char *function,
659static void log_usb_status(int status, const char *function) 671 struct hso_device *hso_dev)
660{ 672{
661 char *explanation; 673 char *explanation;
662 674
@@ -685,10 +697,20 @@ static void log_usb_status(int status, const char *function)
685 case -EMSGSIZE: 697 case -EMSGSIZE:
686 explanation = "internal error"; 698 explanation = "internal error";
687 break; 699 break;
700 case -EILSEQ:
701 case -EPROTO:
702 case -ETIME:
703 case -ETIMEDOUT:
704 explanation = "protocol error";
705 if (hso_dev)
706 schedule_work(&hso_dev->reset_device);
707 break;
688 default: 708 default:
689 explanation = "unknown status"; 709 explanation = "unknown status";
690 break; 710 break;
691 } 711 }
712
713 /* log a meaningful explanation of an USB status */
692 D1("%s: received USB status - %s (%d)", function, explanation, status); 714 D1("%s: received USB status - %s (%d)", function, explanation, status);
693} 715}
694 716
@@ -762,7 +784,7 @@ static void write_bulk_callback(struct urb *urb)
762 /* log status, but don't act on it, we don't need to resubmit anything 784 /* log status, but don't act on it, we don't need to resubmit anything
763 * anyhow */ 785 * anyhow */
764 if (status) 786 if (status)
765 log_usb_status(status, __func__); 787 handle_usb_error(status, __func__, odev->parent);
766 788
767 hso_put_activity(odev->parent); 789 hso_put_activity(odev->parent);
768 790
@@ -806,7 +828,7 @@ static netdev_tx_t hso_net_start_xmit(struct sk_buff *skb,
806 result = usb_submit_urb(odev->mux_bulk_tx_urb, GFP_ATOMIC); 828 result = usb_submit_urb(odev->mux_bulk_tx_urb, GFP_ATOMIC);
807 if (result) { 829 if (result) {
808 dev_warn(&odev->parent->interface->dev, 830 dev_warn(&odev->parent->interface->dev,
809 "failed mux_bulk_tx_urb %d", result); 831 "failed mux_bulk_tx_urb %d\n", result);
810 net->stats.tx_errors++; 832 net->stats.tx_errors++;
811 netif_start_queue(net); 833 netif_start_queue(net);
812 } else { 834 } else {
@@ -998,7 +1020,7 @@ static void read_bulk_callback(struct urb *urb)
998 1020
999 /* is al ok? (Filip: Who's Al ?) */ 1021 /* is al ok? (Filip: Who's Al ?) */
1000 if (status) { 1022 if (status) {
1001 log_usb_status(status, __func__); 1023 handle_usb_error(status, __func__, odev->parent);
1002 return; 1024 return;
1003 } 1025 }
1004 1026
@@ -1019,7 +1041,8 @@ static void read_bulk_callback(struct urb *urb)
1019 if (odev->parent->port_spec & HSO_INFO_CRC_BUG) { 1041 if (odev->parent->port_spec & HSO_INFO_CRC_BUG) {
1020 u32 rest; 1042 u32 rest;
1021 u8 crc_check[4] = { 0xDE, 0xAD, 0xBE, 0xEF }; 1043 u8 crc_check[4] = { 0xDE, 0xAD, 0xBE, 0xEF };
1022 rest = urb->actual_length % odev->in_endp->wMaxPacketSize; 1044 rest = urb->actual_length %
1045 le16_to_cpu(odev->in_endp->wMaxPacketSize);
1023 if (((rest == 5) || (rest == 6)) && 1046 if (((rest == 5) || (rest == 6)) &&
1024 !memcmp(((u8 *) urb->transfer_buffer) + 1047 !memcmp(((u8 *) urb->transfer_buffer) +
1025 urb->actual_length - 4, crc_check, 4)) { 1048 urb->actual_length - 4, crc_check, 4)) {
@@ -1053,7 +1076,7 @@ static void read_bulk_callback(struct urb *urb)
1053 result = usb_submit_urb(urb, GFP_ATOMIC); 1076 result = usb_submit_urb(urb, GFP_ATOMIC);
1054 if (result) 1077 if (result)
1055 dev_warn(&odev->parent->interface->dev, 1078 dev_warn(&odev->parent->interface->dev,
1056 "%s failed submit mux_bulk_rx_urb %d", __func__, 1079 "%s failed submit mux_bulk_rx_urb %d\n", __func__,
1057 result); 1080 result);
1058} 1081}
1059 1082
@@ -1207,7 +1230,7 @@ static void hso_std_serial_read_bulk_callback(struct urb *urb)
1207 D1("serial == NULL"); 1230 D1("serial == NULL");
1208 return; 1231 return;
1209 } else if (status) { 1232 } else if (status) {
1210 log_usb_status(status, __func__); 1233 handle_usb_error(status, __func__, serial->parent);
1211 return; 1234 return;
1212 } 1235 }
1213 1236
@@ -1225,7 +1248,7 @@ static void hso_std_serial_read_bulk_callback(struct urb *urb)
1225 u8 crc_check[4] = { 0xDE, 0xAD, 0xBE, 0xEF }; 1248 u8 crc_check[4] = { 0xDE, 0xAD, 0xBE, 0xEF };
1226 rest = 1249 rest =
1227 urb->actual_length % 1250 urb->actual_length %
1228 serial->in_endp->wMaxPacketSize; 1251 le16_to_cpu(serial->in_endp->wMaxPacketSize);
1229 if (((rest == 5) || (rest == 6)) && 1252 if (((rest == 5) || (rest == 6)) &&
1230 !memcmp(((u8 *) urb->transfer_buffer) + 1253 !memcmp(((u8 *) urb->transfer_buffer) +
1231 urb->actual_length - 4, crc_check, 4)) { 1254 urb->actual_length - 4, crc_check, 4)) {
@@ -1513,7 +1536,7 @@ static void tiocmget_intr_callback(struct urb *urb)
1513 if (!serial) 1536 if (!serial)
1514 return; 1537 return;
1515 if (status) { 1538 if (status) {
1516 log_usb_status(status, __func__); 1539 handle_usb_error(status, __func__, serial->parent);
1517 return; 1540 return;
1518 } 1541 }
1519 tiocmget = serial->tiocmget; 1542 tiocmget = serial->tiocmget;
@@ -1700,6 +1723,10 @@ static int hso_serial_tiocmset(struct tty_struct *tty, struct file *file,
1700 D1("no tty structures"); 1723 D1("no tty structures");
1701 return -EINVAL; 1724 return -EINVAL;
1702 } 1725 }
1726
1727 if ((serial->parent->port_spec & HSO_PORT_MASK) != HSO_PORT_MODEM)
1728 return -EINVAL;
1729
1703 if_num = serial->parent->interface->altsetting->desc.bInterfaceNumber; 1730 if_num = serial->parent->interface->altsetting->desc.bInterfaceNumber;
1704 1731
1705 spin_lock_irqsave(&serial->serial_lock, flags); 1732 spin_lock_irqsave(&serial->serial_lock, flags);
@@ -1838,7 +1865,7 @@ static int mux_device_request(struct hso_serial *serial, u8 type, u16 port,
1838 result = usb_submit_urb(ctrl_urb, GFP_ATOMIC); 1865 result = usb_submit_urb(ctrl_urb, GFP_ATOMIC);
1839 if (result) { 1866 if (result) {
1840 dev_err(&ctrl_urb->dev->dev, 1867 dev_err(&ctrl_urb->dev->dev,
1841 "%s failed submit ctrl_urb %d type %d", __func__, 1868 "%s failed submit ctrl_urb %d type %d\n", __func__,
1842 result, type); 1869 result, type);
1843 return result; 1870 return result;
1844 } 1871 }
@@ -1888,7 +1915,7 @@ static void intr_callback(struct urb *urb)
1888 1915
1889 /* status check */ 1916 /* status check */
1890 if (status) { 1917 if (status) {
1891 log_usb_status(status, __func__); 1918 handle_usb_error(status, __func__, NULL);
1892 return; 1919 return;
1893 } 1920 }
1894 D4("\n--- Got intr callback 0x%02X ---", status); 1921 D4("\n--- Got intr callback 0x%02X ---", status);
@@ -1905,18 +1932,18 @@ static void intr_callback(struct urb *urb)
1905 if (serial != NULL) { 1932 if (serial != NULL) {
1906 D1("Pending read interrupt on port %d\n", i); 1933 D1("Pending read interrupt on port %d\n", i);
1907 spin_lock(&serial->serial_lock); 1934 spin_lock(&serial->serial_lock);
1908 if (serial->rx_state == RX_IDLE) { 1935 if (serial->rx_state == RX_IDLE &&
1936 serial->open_count > 0) {
1909 /* Setup and send a ctrl req read on 1937 /* Setup and send a ctrl req read on
1910 * port i */ 1938 * port i */
1911 if (!serial->rx_urb_filled[0]) { 1939 if (!serial->rx_urb_filled[0]) {
1912 serial->rx_state = RX_SENT; 1940 serial->rx_state = RX_SENT;
1913 hso_mux_serial_read(serial); 1941 hso_mux_serial_read(serial);
1914 } else 1942 } else
1915 serial->rx_state = RX_PENDING; 1943 serial->rx_state = RX_PENDING;
1916
1917 } else { 1944 } else {
1918 D1("Already pending a read on " 1945 D1("Already a read pending on "
1919 "port %d\n", i); 1946 "port %d or port not open\n", i);
1920 } 1947 }
1921 spin_unlock(&serial->serial_lock); 1948 spin_unlock(&serial->serial_lock);
1922 } 1949 }
@@ -1958,7 +1985,7 @@ static void hso_std_serial_write_bulk_callback(struct urb *urb)
1958 tty = tty_kref_get(serial->tty); 1985 tty = tty_kref_get(serial->tty);
1959 spin_unlock(&serial->serial_lock); 1986 spin_unlock(&serial->serial_lock);
1960 if (status) { 1987 if (status) {
1961 log_usb_status(status, __func__); 1988 handle_usb_error(status, __func__, serial->parent);
1962 tty_kref_put(tty); 1989 tty_kref_put(tty);
1963 return; 1990 return;
1964 } 1991 }
@@ -2014,7 +2041,7 @@ static void ctrl_callback(struct urb *urb)
2014 tty = tty_kref_get(serial->tty); 2041 tty = tty_kref_get(serial->tty);
2015 spin_unlock(&serial->serial_lock); 2042 spin_unlock(&serial->serial_lock);
2016 if (status) { 2043 if (status) {
2017 log_usb_status(status, __func__); 2044 handle_usb_error(status, __func__, serial->parent);
2018 tty_kref_put(tty); 2045 tty_kref_put(tty);
2019 return; 2046 return;
2020 } 2047 }
@@ -2358,12 +2385,12 @@ static int hso_serial_common_create(struct hso_serial *serial, int num_urbs,
2358 serial->tx_data_length = tx_size; 2385 serial->tx_data_length = tx_size;
2359 serial->tx_data = kzalloc(serial->tx_data_length, GFP_KERNEL); 2386 serial->tx_data = kzalloc(serial->tx_data_length, GFP_KERNEL);
2360 if (!serial->tx_data) { 2387 if (!serial->tx_data) {
2361 dev_err(dev, "%s - Out of memory", __func__); 2388 dev_err(dev, "%s - Out of memory\n", __func__);
2362 goto exit; 2389 goto exit;
2363 } 2390 }
2364 serial->tx_buffer = kzalloc(serial->tx_data_length, GFP_KERNEL); 2391 serial->tx_buffer = kzalloc(serial->tx_data_length, GFP_KERNEL);
2365 if (!serial->tx_buffer) { 2392 if (!serial->tx_buffer) {
2366 dev_err(dev, "%s - Out of memory", __func__); 2393 dev_err(dev, "%s - Out of memory\n", __func__);
2367 goto exit; 2394 goto exit;
2368 } 2395 }
2369 2396
@@ -2391,6 +2418,7 @@ static struct hso_device *hso_create_device(struct usb_interface *intf,
2391 2418
2392 INIT_WORK(&hso_dev->async_get_intf, async_get_intf); 2419 INIT_WORK(&hso_dev->async_get_intf, async_get_intf);
2393 INIT_WORK(&hso_dev->async_put_intf, async_put_intf); 2420 INIT_WORK(&hso_dev->async_put_intf, async_put_intf);
2421 INIT_WORK(&hso_dev->reset_device, reset_device);
2394 2422
2395 return hso_dev; 2423 return hso_dev;
2396} 2424}
@@ -2831,13 +2859,14 @@ struct hso_shared_int *hso_create_shared_int(struct usb_interface *interface)
2831 2859
2832 mux->shared_intr_urb = usb_alloc_urb(0, GFP_KERNEL); 2860 mux->shared_intr_urb = usb_alloc_urb(0, GFP_KERNEL);
2833 if (!mux->shared_intr_urb) { 2861 if (!mux->shared_intr_urb) {
2834 dev_err(&interface->dev, "Could not allocate intr urb?"); 2862 dev_err(&interface->dev, "Could not allocate intr urb?\n");
2835 goto exit; 2863 goto exit;
2836 } 2864 }
2837 mux->shared_intr_buf = kzalloc(mux->intr_endp->wMaxPacketSize, 2865 mux->shared_intr_buf =
2838 GFP_KERNEL); 2866 kzalloc(le16_to_cpu(mux->intr_endp->wMaxPacketSize),
2867 GFP_KERNEL);
2839 if (!mux->shared_intr_buf) { 2868 if (!mux->shared_intr_buf) {
2840 dev_err(&interface->dev, "Could not allocate intr buf?"); 2869 dev_err(&interface->dev, "Could not allocate intr buf?\n");
2841 goto exit; 2870 goto exit;
2842 } 2871 }
2843 2872
@@ -3132,6 +3161,26 @@ out:
3132 return result; 3161 return result;
3133} 3162}
3134 3163
3164static void reset_device(struct work_struct *data)
3165{
3166 struct hso_device *hso_dev =
3167 container_of(data, struct hso_device, reset_device);
3168 struct usb_device *usb = hso_dev->usb;
3169 int result;
3170
3171 if (hso_dev->usb_gone) {
3172 D1("No reset during disconnect\n");
3173 } else {
3174 result = usb_lock_device_for_reset(usb, hso_dev->interface);
3175 if (result < 0)
3176 D1("unable to lock device for reset: %d\n", result);
3177 else {
3178 usb_reset_device(usb);
3179 usb_unlock_device(usb);
3180 }
3181 }
3182}
3183
3135static void hso_serial_ref_free(struct kref *ref) 3184static void hso_serial_ref_free(struct kref *ref)
3136{ 3185{
3137 struct hso_device *hso_dev = container_of(ref, struct hso_device, ref); 3186 struct hso_device *hso_dev = container_of(ref, struct hso_device, ref);
@@ -3232,13 +3281,13 @@ static int hso_mux_submit_intr_urb(struct hso_shared_int *shared_int,
3232 usb_rcvintpipe(usb, 3281 usb_rcvintpipe(usb,
3233 shared_int->intr_endp->bEndpointAddress & 0x7F), 3282 shared_int->intr_endp->bEndpointAddress & 0x7F),
3234 shared_int->shared_intr_buf, 3283 shared_int->shared_intr_buf,
3235 shared_int->intr_endp->wMaxPacketSize, 3284 1,
3236 intr_callback, shared_int, 3285 intr_callback, shared_int,
3237 shared_int->intr_endp->bInterval); 3286 shared_int->intr_endp->bInterval);
3238 3287
3239 result = usb_submit_urb(shared_int->shared_intr_urb, gfp); 3288 result = usb_submit_urb(shared_int->shared_intr_urb, gfp);
3240 if (result) 3289 if (result)
3241 dev_warn(&usb->dev, "%s failed mux_intr_urb %d", __func__, 3290 dev_warn(&usb->dev, "%s failed mux_intr_urb %d\n", __func__,
3242 result); 3291 result);
3243 3292
3244 return result; 3293 return result;
diff --git a/drivers/net/usb/rtl8150.c b/drivers/net/usb/rtl8150.c
index b091e20ca167..fd19db0d2504 100644
--- a/drivers/net/usb/rtl8150.c
+++ b/drivers/net/usb/rtl8150.c
@@ -270,7 +270,7 @@ static int read_mii_word(rtl8150_t * dev, u8 phy, __u8 indx, u16 * reg)
270 get_registers(dev, PHYCNT, 1, data); 270 get_registers(dev, PHYCNT, 1, data);
271 } while ((data[0] & PHY_GO) && (i++ < MII_TIMEOUT)); 271 } while ((data[0] & PHY_GO) && (i++ < MII_TIMEOUT));
272 272
273 if (i < MII_TIMEOUT) { 273 if (i <= MII_TIMEOUT) {
274 get_registers(dev, PHYDAT, 2, data); 274 get_registers(dev, PHYDAT, 2, data);
275 *reg = data[0] | (data[1] << 8); 275 *reg = data[0] | (data[1] << 8);
276 return 0; 276 return 0;
@@ -295,7 +295,7 @@ static int write_mii_word(rtl8150_t * dev, u8 phy, __u8 indx, u16 reg)
295 get_registers(dev, PHYCNT, 1, data); 295 get_registers(dev, PHYCNT, 1, data);
296 } while ((data[0] & PHY_GO) && (i++ < MII_TIMEOUT)); 296 } while ((data[0] & PHY_GO) && (i++ < MII_TIMEOUT));
297 297
298 if (i < MII_TIMEOUT) 298 if (i <= MII_TIMEOUT)
299 return 0; 299 return 0;
300 else 300 else
301 return 1; 301 return 1;
@@ -324,7 +324,7 @@ static int rtl8150_set_mac_address(struct net_device *netdev, void *p)
324 dbg("%02X:", netdev->dev_addr[i]); 324 dbg("%02X:", netdev->dev_addr[i]);
325 dbg("%02X\n", netdev->dev_addr[i]); 325 dbg("%02X\n", netdev->dev_addr[i]);
326 /* Set the IDR registers. */ 326 /* Set the IDR registers. */
327 set_registers(dev, IDR, sizeof(netdev->dev_addr), netdev->dev_addr); 327 set_registers(dev, IDR, netdev->addr_len, netdev->dev_addr);
328#ifdef EEPROM_WRITE 328#ifdef EEPROM_WRITE
329 { 329 {
330 u8 cr; 330 u8 cr;
diff --git a/drivers/net/via-rhine.c b/drivers/net/via-rhine.c
index 593e01f64e9b..611b80435955 100644
--- a/drivers/net/via-rhine.c
+++ b/drivers/net/via-rhine.c
@@ -102,6 +102,7 @@ static const int multicast_filter_limit = 32;
102#include <linux/ethtool.h> 102#include <linux/ethtool.h>
103#include <linux/crc32.h> 103#include <linux/crc32.h>
104#include <linux/bitops.h> 104#include <linux/bitops.h>
105#include <linux/workqueue.h>
105#include <asm/processor.h> /* Processor type for cache alignment. */ 106#include <asm/processor.h> /* Processor type for cache alignment. */
106#include <asm/io.h> 107#include <asm/io.h>
107#include <asm/irq.h> 108#include <asm/irq.h>
@@ -389,6 +390,7 @@ struct rhine_private {
389 struct net_device *dev; 390 struct net_device *dev;
390 struct napi_struct napi; 391 struct napi_struct napi;
391 spinlock_t lock; 392 spinlock_t lock;
393 struct work_struct reset_task;
392 394
393 /* Frequently used values: keep some adjacent for cache effect. */ 395 /* Frequently used values: keep some adjacent for cache effect. */
394 u32 quirks; 396 u32 quirks;
@@ -407,6 +409,7 @@ struct rhine_private {
407static int mdio_read(struct net_device *dev, int phy_id, int location); 409static int mdio_read(struct net_device *dev, int phy_id, int location);
408static void mdio_write(struct net_device *dev, int phy_id, int location, int value); 410static void mdio_write(struct net_device *dev, int phy_id, int location, int value);
409static int rhine_open(struct net_device *dev); 411static int rhine_open(struct net_device *dev);
412static void rhine_reset_task(struct work_struct *work);
410static void rhine_tx_timeout(struct net_device *dev); 413static void rhine_tx_timeout(struct net_device *dev);
411static netdev_tx_t rhine_start_tx(struct sk_buff *skb, 414static netdev_tx_t rhine_start_tx(struct sk_buff *skb,
412 struct net_device *dev); 415 struct net_device *dev);
@@ -775,6 +778,8 @@ static int __devinit rhine_init_one(struct pci_dev *pdev,
775 dev->irq = pdev->irq; 778 dev->irq = pdev->irq;
776 779
777 spin_lock_init(&rp->lock); 780 spin_lock_init(&rp->lock);
781 INIT_WORK(&rp->reset_task, rhine_reset_task);
782
778 rp->mii_if.dev = dev; 783 rp->mii_if.dev = dev;
779 rp->mii_if.mdio_read = mdio_read; 784 rp->mii_if.mdio_read = mdio_read;
780 rp->mii_if.mdio_write = mdio_write; 785 rp->mii_if.mdio_write = mdio_write;
@@ -1179,22 +1184,18 @@ static int rhine_open(struct net_device *dev)
1179 return 0; 1184 return 0;
1180} 1185}
1181 1186
1182static void rhine_tx_timeout(struct net_device *dev) 1187static void rhine_reset_task(struct work_struct *work)
1183{ 1188{
1184 struct rhine_private *rp = netdev_priv(dev); 1189 struct rhine_private *rp = container_of(work, struct rhine_private,
1185 void __iomem *ioaddr = rp->base; 1190 reset_task);
1186 1191 struct net_device *dev = rp->dev;
1187 printk(KERN_WARNING "%s: Transmit timed out, status %4.4x, PHY status "
1188 "%4.4x, resetting...\n",
1189 dev->name, ioread16(ioaddr + IntrStatus),
1190 mdio_read(dev, rp->mii_if.phy_id, MII_BMSR));
1191 1192
1192 /* protect against concurrent rx interrupts */ 1193 /* protect against concurrent rx interrupts */
1193 disable_irq(rp->pdev->irq); 1194 disable_irq(rp->pdev->irq);
1194 1195
1195 napi_disable(&rp->napi); 1196 napi_disable(&rp->napi);
1196 1197
1197 spin_lock(&rp->lock); 1198 spin_lock_bh(&rp->lock);
1198 1199
1199 /* clear all descriptors */ 1200 /* clear all descriptors */
1200 free_tbufs(dev); 1201 free_tbufs(dev);
@@ -1206,7 +1207,7 @@ static void rhine_tx_timeout(struct net_device *dev)
1206 rhine_chip_reset(dev); 1207 rhine_chip_reset(dev);
1207 init_registers(dev); 1208 init_registers(dev);
1208 1209
1209 spin_unlock(&rp->lock); 1210 spin_unlock_bh(&rp->lock);
1210 enable_irq(rp->pdev->irq); 1211 enable_irq(rp->pdev->irq);
1211 1212
1212 dev->trans_start = jiffies; 1213 dev->trans_start = jiffies;
@@ -1214,6 +1215,19 @@ static void rhine_tx_timeout(struct net_device *dev)
1214 netif_wake_queue(dev); 1215 netif_wake_queue(dev);
1215} 1216}
1216 1217
1218static void rhine_tx_timeout(struct net_device *dev)
1219{
1220 struct rhine_private *rp = netdev_priv(dev);
1221 void __iomem *ioaddr = rp->base;
1222
1223 printk(KERN_WARNING "%s: Transmit timed out, status %4.4x, PHY status "
1224 "%4.4x, resetting...\n",
1225 dev->name, ioread16(ioaddr + IntrStatus),
1226 mdio_read(dev, rp->mii_if.phy_id, MII_BMSR));
1227
1228 schedule_work(&rp->reset_task);
1229}
1230
1217static netdev_tx_t rhine_start_tx(struct sk_buff *skb, 1231static netdev_tx_t rhine_start_tx(struct sk_buff *skb,
1218 struct net_device *dev) 1232 struct net_device *dev)
1219{ 1233{
@@ -1830,10 +1844,11 @@ static int rhine_close(struct net_device *dev)
1830 struct rhine_private *rp = netdev_priv(dev); 1844 struct rhine_private *rp = netdev_priv(dev);
1831 void __iomem *ioaddr = rp->base; 1845 void __iomem *ioaddr = rp->base;
1832 1846
1833 spin_lock_irq(&rp->lock);
1834
1835 netif_stop_queue(dev);
1836 napi_disable(&rp->napi); 1847 napi_disable(&rp->napi);
1848 cancel_work_sync(&rp->reset_task);
1849 netif_stop_queue(dev);
1850
1851 spin_lock_irq(&rp->lock);
1837 1852
1838 if (debug > 1) 1853 if (debug > 1)
1839 printk(KERN_DEBUG "%s: Shutting down ethercard, " 1854 printk(KERN_DEBUG "%s: Shutting down ethercard, "
diff --git a/drivers/net/via-velocity.c b/drivers/net/via-velocity.c
index 4ceb441f2687..317aa34b21cf 100644
--- a/drivers/net/via-velocity.c
+++ b/drivers/net/via-velocity.c
@@ -1877,13 +1877,12 @@ static void velocity_error(struct velocity_info *vptr, int status)
1877/** 1877/**
1878 * tx_srv - transmit interrupt service 1878 * tx_srv - transmit interrupt service
1879 * @vptr; Velocity 1879 * @vptr; Velocity
1880 * @status:
1881 * 1880 *
1882 * Scan the queues looking for transmitted packets that 1881 * Scan the queues looking for transmitted packets that
1883 * we can complete and clean up. Update any statistics as 1882 * we can complete and clean up. Update any statistics as
1884 * necessary/ 1883 * necessary/
1885 */ 1884 */
1886static int velocity_tx_srv(struct velocity_info *vptr, u32 status) 1885static int velocity_tx_srv(struct velocity_info *vptr)
1887{ 1886{
1888 struct tx_desc *td; 1887 struct tx_desc *td;
1889 int qnum; 1888 int qnum;
@@ -2090,14 +2089,12 @@ static int velocity_receive_frame(struct velocity_info *vptr, int idx)
2090/** 2089/**
2091 * velocity_rx_srv - service RX interrupt 2090 * velocity_rx_srv - service RX interrupt
2092 * @vptr: velocity 2091 * @vptr: velocity
2093 * @status: adapter status (unused)
2094 * 2092 *
2095 * Walk the receive ring of the velocity adapter and remove 2093 * Walk the receive ring of the velocity adapter and remove
2096 * any received packets from the receive queue. Hand the ring 2094 * any received packets from the receive queue. Hand the ring
2097 * slots back to the adapter for reuse. 2095 * slots back to the adapter for reuse.
2098 */ 2096 */
2099static int velocity_rx_srv(struct velocity_info *vptr, int status, 2097static int velocity_rx_srv(struct velocity_info *vptr, int budget_left)
2100 int budget_left)
2101{ 2098{
2102 struct net_device_stats *stats = &vptr->dev->stats; 2099 struct net_device_stats *stats = &vptr->dev->stats;
2103 int rd_curr = vptr->rx.curr; 2100 int rd_curr = vptr->rx.curr;
@@ -2151,32 +2148,24 @@ static int velocity_poll(struct napi_struct *napi, int budget)
2151 struct velocity_info *vptr = container_of(napi, 2148 struct velocity_info *vptr = container_of(napi,
2152 struct velocity_info, napi); 2149 struct velocity_info, napi);
2153 unsigned int rx_done; 2150 unsigned int rx_done;
2154 u32 isr_status; 2151 unsigned long flags;
2155
2156 spin_lock(&vptr->lock);
2157 isr_status = mac_read_isr(vptr->mac_regs);
2158
2159 /* Ack the interrupt */
2160 mac_write_isr(vptr->mac_regs, isr_status);
2161 if (isr_status & (~(ISR_PRXI | ISR_PPRXI | ISR_PTXI | ISR_PPTXI)))
2162 velocity_error(vptr, isr_status);
2163 2152
2153 spin_lock_irqsave(&vptr->lock, flags);
2164 /* 2154 /*
2165 * Do rx and tx twice for performance (taken from the VIA 2155 * Do rx and tx twice for performance (taken from the VIA
2166 * out-of-tree driver). 2156 * out-of-tree driver).
2167 */ 2157 */
2168 rx_done = velocity_rx_srv(vptr, isr_status, budget / 2); 2158 rx_done = velocity_rx_srv(vptr, budget / 2);
2169 velocity_tx_srv(vptr, isr_status); 2159 velocity_tx_srv(vptr);
2170 rx_done += velocity_rx_srv(vptr, isr_status, budget - rx_done); 2160 rx_done += velocity_rx_srv(vptr, budget - rx_done);
2171 velocity_tx_srv(vptr, isr_status); 2161 velocity_tx_srv(vptr);
2172
2173 spin_unlock(&vptr->lock);
2174 2162
2175 /* If budget not fully consumed, exit the polling mode */ 2163 /* If budget not fully consumed, exit the polling mode */
2176 if (rx_done < budget) { 2164 if (rx_done < budget) {
2177 napi_complete(napi); 2165 napi_complete(napi);
2178 mac_enable_int(vptr->mac_regs); 2166 mac_enable_int(vptr->mac_regs);
2179 } 2167 }
2168 spin_unlock_irqrestore(&vptr->lock, flags);
2180 2169
2181 return rx_done; 2170 return rx_done;
2182} 2171}
@@ -2206,10 +2195,17 @@ static irqreturn_t velocity_intr(int irq, void *dev_instance)
2206 return IRQ_NONE; 2195 return IRQ_NONE;
2207 } 2196 }
2208 2197
2198 /* Ack the interrupt */
2199 mac_write_isr(vptr->mac_regs, isr_status);
2200
2209 if (likely(napi_schedule_prep(&vptr->napi))) { 2201 if (likely(napi_schedule_prep(&vptr->napi))) {
2210 mac_disable_int(vptr->mac_regs); 2202 mac_disable_int(vptr->mac_regs);
2211 __napi_schedule(&vptr->napi); 2203 __napi_schedule(&vptr->napi);
2212 } 2204 }
2205
2206 if (isr_status & (~(ISR_PRXI | ISR_PPRXI | ISR_PTXI | ISR_PPTXI)))
2207 velocity_error(vptr, isr_status);
2208
2213 spin_unlock(&vptr->lock); 2209 spin_unlock(&vptr->lock);
2214 2210
2215 return IRQ_HANDLED; 2211 return IRQ_HANDLED;
@@ -2237,8 +2233,6 @@ static int velocity_open(struct net_device *dev)
2237 /* Ensure chip is running */ 2233 /* Ensure chip is running */
2238 pci_set_power_state(vptr->pdev, PCI_D0); 2234 pci_set_power_state(vptr->pdev, PCI_D0);
2239 2235
2240 velocity_give_many_rx_descs(vptr);
2241
2242 velocity_init_registers(vptr, VELOCITY_INIT_COLD); 2236 velocity_init_registers(vptr, VELOCITY_INIT_COLD);
2243 2237
2244 ret = request_irq(vptr->pdev->irq, velocity_intr, IRQF_SHARED, 2238 ret = request_irq(vptr->pdev->irq, velocity_intr, IRQF_SHARED,
@@ -2250,6 +2244,8 @@ static int velocity_open(struct net_device *dev)
2250 goto out; 2244 goto out;
2251 } 2245 }
2252 2246
2247 velocity_give_many_rx_descs(vptr);
2248
2253 mac_enable_int(vptr->mac_regs); 2249 mac_enable_int(vptr->mac_regs);
2254 netif_start_queue(dev); 2250 netif_start_queue(dev);
2255 napi_enable(&vptr->napi); 2251 napi_enable(&vptr->napi);
@@ -2339,10 +2335,10 @@ static int velocity_change_mtu(struct net_device *dev, int new_mtu)
2339 2335
2340 dev->mtu = new_mtu; 2336 dev->mtu = new_mtu;
2341 2337
2342 velocity_give_many_rx_descs(vptr);
2343
2344 velocity_init_registers(vptr, VELOCITY_INIT_COLD); 2338 velocity_init_registers(vptr, VELOCITY_INIT_COLD);
2345 2339
2340 velocity_give_many_rx_descs(vptr);
2341
2346 mac_enable_int(vptr->mac_regs); 2342 mac_enable_int(vptr->mac_regs);
2347 netif_start_queue(dev); 2343 netif_start_queue(dev);
2348 2344
@@ -3100,7 +3096,7 @@ static int velocity_resume(struct pci_dev *pdev)
3100 velocity_init_registers(vptr, VELOCITY_INIT_WOL); 3096 velocity_init_registers(vptr, VELOCITY_INIT_WOL);
3101 mac_disable_int(vptr->mac_regs); 3097 mac_disable_int(vptr->mac_regs);
3102 3098
3103 velocity_tx_srv(vptr, 0); 3099 velocity_tx_srv(vptr);
3104 3100
3105 for (i = 0; i < vptr->tx.numq; i++) { 3101 for (i = 0; i < vptr->tx.numq; i++) {
3106 if (vptr->tx.used[i]) 3102 if (vptr->tx.used[i])
@@ -3344,6 +3340,7 @@ static int velocity_set_coalesce(struct net_device *dev,
3344{ 3340{
3345 struct velocity_info *vptr = netdev_priv(dev); 3341 struct velocity_info *vptr = netdev_priv(dev);
3346 int max_us = 0x3f * 64; 3342 int max_us = 0x3f * 64;
3343 unsigned long flags;
3347 3344
3348 /* 6 bits of */ 3345 /* 6 bits of */
3349 if (ecmd->tx_coalesce_usecs > max_us) 3346 if (ecmd->tx_coalesce_usecs > max_us)
@@ -3365,6 +3362,7 @@ static int velocity_set_coalesce(struct net_device *dev,
3365 ecmd->tx_coalesce_usecs); 3362 ecmd->tx_coalesce_usecs);
3366 3363
3367 /* Setup the interrupt suppression and queue timers */ 3364 /* Setup the interrupt suppression and queue timers */
3365 spin_lock_irqsave(&vptr->lock, flags);
3368 mac_disable_int(vptr->mac_regs); 3366 mac_disable_int(vptr->mac_regs);
3369 setup_adaptive_interrupts(vptr); 3367 setup_adaptive_interrupts(vptr);
3370 setup_queue_timers(vptr); 3368 setup_queue_timers(vptr);
@@ -3372,6 +3370,7 @@ static int velocity_set_coalesce(struct net_device *dev,
3372 mac_write_int_mask(vptr->int_mask, vptr->mac_regs); 3370 mac_write_int_mask(vptr->int_mask, vptr->mac_regs);
3373 mac_clear_isr(vptr->mac_regs); 3371 mac_clear_isr(vptr->mac_regs);
3374 mac_enable_int(vptr->mac_regs); 3372 mac_enable_int(vptr->mac_regs);
3373 spin_unlock_irqrestore(&vptr->lock, flags);
3375 3374
3376 return 0; 3375 return 0;
3377} 3376}
diff --git a/drivers/net/virtio_net.c b/drivers/net/virtio_net.c
index c708ecc3cb2e..9ead30bd00c4 100644
--- a/drivers/net/virtio_net.c
+++ b/drivers/net/virtio_net.c
@@ -395,8 +395,7 @@ static void refill_work(struct work_struct *work)
395 395
396 vi = container_of(work, struct virtnet_info, refill.work); 396 vi = container_of(work, struct virtnet_info, refill.work);
397 napi_disable(&vi->napi); 397 napi_disable(&vi->napi);
398 try_fill_recv(vi, GFP_KERNEL); 398 still_empty = !try_fill_recv(vi, GFP_KERNEL);
399 still_empty = (vi->num == 0);
400 napi_enable(&vi->napi); 399 napi_enable(&vi->napi);
401 400
402 /* In theory, this can happen: if we don't get any buffers in 401 /* In theory, this can happen: if we don't get any buffers in
diff --git a/drivers/net/vxge/vxge-main.c b/drivers/net/vxge/vxge-main.c
index f1c4b2a1e867..b9685e82f7b6 100644
--- a/drivers/net/vxge/vxge-main.c
+++ b/drivers/net/vxge/vxge-main.c
@@ -310,7 +310,7 @@ static int vxge_rx_map(void *dtrh, struct vxge_ring *ring)
310 dma_addr = pci_map_single(ring->pdev, rx_priv->skb_data, 310 dma_addr = pci_map_single(ring->pdev, rx_priv->skb_data,
311 rx_priv->data_size, PCI_DMA_FROMDEVICE); 311 rx_priv->data_size, PCI_DMA_FROMDEVICE);
312 312
313 if (dma_addr == 0) { 313 if (unlikely(pci_dma_mapping_error(ring->pdev, dma_addr))) {
314 ring->stats.pci_map_fail++; 314 ring->stats.pci_map_fail++;
315 return -EIO; 315 return -EIO;
316 } 316 }
@@ -4087,21 +4087,21 @@ vxge_probe(struct pci_dev *pdev, const struct pci_device_id *pre)
4087 goto _exit0; 4087 goto _exit0;
4088 } 4088 }
4089 4089
4090 if (!pci_set_dma_mask(pdev, 0xffffffffffffffffULL)) { 4090 if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(64))) {
4091 vxge_debug_ll_config(VXGE_TRACE, 4091 vxge_debug_ll_config(VXGE_TRACE,
4092 "%s : using 64bit DMA", __func__); 4092 "%s : using 64bit DMA", __func__);
4093 4093
4094 high_dma = 1; 4094 high_dma = 1;
4095 4095
4096 if (pci_set_consistent_dma_mask(pdev, 4096 if (pci_set_consistent_dma_mask(pdev,
4097 0xffffffffffffffffULL)) { 4097 DMA_BIT_MASK(64))) {
4098 vxge_debug_init(VXGE_ERR, 4098 vxge_debug_init(VXGE_ERR,
4099 "%s : unable to obtain 64bit DMA for " 4099 "%s : unable to obtain 64bit DMA for "
4100 "consistent allocations", __func__); 4100 "consistent allocations", __func__);
4101 ret = -ENOMEM; 4101 ret = -ENOMEM;
4102 goto _exit1; 4102 goto _exit1;
4103 } 4103 }
4104 } else if (!pci_set_dma_mask(pdev, 0xffffffffUL)) { 4104 } else if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))) {
4105 vxge_debug_ll_config(VXGE_TRACE, 4105 vxge_debug_ll_config(VXGE_TRACE,
4106 "%s : using 32bit DMA", __func__); 4106 "%s : using 32bit DMA", __func__);
4107 } else { 4107 } else {
diff --git a/drivers/net/wimax/i2400m/i2400m-usb.h b/drivers/net/wimax/i2400m/i2400m-usb.h
index 5cc0f279417e..2d7c96d7e865 100644
--- a/drivers/net/wimax/i2400m/i2400m-usb.h
+++ b/drivers/net/wimax/i2400m/i2400m-usb.h
@@ -151,6 +151,7 @@ enum {
151 151
152 /* Device IDs */ 152 /* Device IDs */
153 USB_DEVICE_ID_I6050 = 0x0186, 153 USB_DEVICE_ID_I6050 = 0x0186,
154 USB_DEVICE_ID_I6050_2 = 0x0188,
154}; 155};
155 156
156 157
@@ -234,6 +235,7 @@ struct i2400mu {
234 u8 rx_size_auto_shrink; 235 u8 rx_size_auto_shrink;
235 236
236 struct dentry *debugfs_dentry; 237 struct dentry *debugfs_dentry;
238 unsigned i6050:1; /* 1 if this is a 6050 based SKU */
237}; 239};
238 240
239 241
diff --git a/drivers/net/wimax/i2400m/usb.c b/drivers/net/wimax/i2400m/usb.c
index 3b48681f8a0d..98f4f8c5fb68 100644
--- a/drivers/net/wimax/i2400m/usb.c
+++ b/drivers/net/wimax/i2400m/usb.c
@@ -478,7 +478,16 @@ int i2400mu_probe(struct usb_interface *iface,
478 i2400m->bus_bm_wait_for_ack = i2400mu_bus_bm_wait_for_ack; 478 i2400m->bus_bm_wait_for_ack = i2400mu_bus_bm_wait_for_ack;
479 i2400m->bus_bm_mac_addr_impaired = 0; 479 i2400m->bus_bm_mac_addr_impaired = 0;
480 480
481 if (id->idProduct == USB_DEVICE_ID_I6050) { 481 switch (id->idProduct) {
482 case USB_DEVICE_ID_I6050:
483 case USB_DEVICE_ID_I6050_2:
484 i2400mu->i6050 = 1;
485 break;
486 default:
487 break;
488 }
489
490 if (i2400mu->i6050) {
482 i2400m->bus_fw_names = i2400mu_bus_fw_names_6050; 491 i2400m->bus_fw_names = i2400mu_bus_fw_names_6050;
483 i2400mu->endpoint_cfg.bulk_out = 0; 492 i2400mu->endpoint_cfg.bulk_out = 0;
484 i2400mu->endpoint_cfg.notification = 3; 493 i2400mu->endpoint_cfg.notification = 3;
@@ -719,6 +728,7 @@ int i2400mu_post_reset(struct usb_interface *iface)
719static 728static
720struct usb_device_id i2400mu_id_table[] = { 729struct usb_device_id i2400mu_id_table[] = {
721 { USB_DEVICE(0x8086, USB_DEVICE_ID_I6050) }, 730 { USB_DEVICE(0x8086, USB_DEVICE_ID_I6050) },
731 { USB_DEVICE(0x8086, USB_DEVICE_ID_I6050_2) },
722 { USB_DEVICE(0x8086, 0x0181) }, 732 { USB_DEVICE(0x8086, 0x0181) },
723 { USB_DEVICE(0x8086, 0x1403) }, 733 { USB_DEVICE(0x8086, 0x1403) },
724 { USB_DEVICE(0x8086, 0x1405) }, 734 { USB_DEVICE(0x8086, 0x1405) },
diff --git a/drivers/net/wireless/ath/ath5k/base.c b/drivers/net/wireless/ath/ath5k/base.c
index a4c086f069b1..e63b7c40d0ee 100644
--- a/drivers/net/wireless/ath/ath5k/base.c
+++ b/drivers/net/wireless/ath/ath5k/base.c
@@ -1903,17 +1903,6 @@ accept:
1903 rxs->noise = sc->ah->ah_noise_floor; 1903 rxs->noise = sc->ah->ah_noise_floor;
1904 rxs->signal = rxs->noise + rs.rs_rssi; 1904 rxs->signal = rxs->noise + rs.rs_rssi;
1905 1905
1906 /* An rssi of 35 indicates you should be able use
1907 * 54 Mbps reliably. A more elaborate scheme can be used
1908 * here but it requires a map of SNR/throughput for each
1909 * possible mode used */
1910 rxs->qual = rs.rs_rssi * 100 / 35;
1911
1912 /* rssi can be more than 35 though, anything above that
1913 * should be considered at 100% */
1914 if (rxs->qual > 100)
1915 rxs->qual = 100;
1916
1917 rxs->antenna = rs.rs_antenna; 1906 rxs->antenna = rs.rs_antenna;
1918 rxs->rate_idx = ath5k_hw_to_driver_rix(sc, rs.rs_rate); 1907 rxs->rate_idx = ath5k_hw_to_driver_rix(sc, rs.rs_rate);
1919 rxs->flag |= ath5k_rx_decrypted(sc, ds, skb, &rs); 1908 rxs->flag |= ath5k_rx_decrypted(sc, ds, skb, &rs);
@@ -2381,6 +2370,9 @@ ath5k_init(struct ath5k_softc *sc)
2381 */ 2370 */
2382 ath5k_stop_locked(sc); 2371 ath5k_stop_locked(sc);
2383 2372
2373 /* Set PHY calibration interval */
2374 ah->ah_cal_intval = ath5k_calinterval;
2375
2384 /* 2376 /*
2385 * The basic interface to setting the hardware in a good 2377 * The basic interface to setting the hardware in a good
2386 * state is ``reset''. On return the hardware is known to 2378 * state is ``reset''. On return the hardware is known to
@@ -2408,10 +2400,6 @@ ath5k_init(struct ath5k_softc *sc)
2408 2400
2409 /* Set ack to be sent at low bit-rates */ 2401 /* Set ack to be sent at low bit-rates */
2410 ath5k_hw_set_ack_bitrate_high(ah, false); 2402 ath5k_hw_set_ack_bitrate_high(ah, false);
2411
2412 /* Set PHY calibration inteval */
2413 ah->ah_cal_intval = ath5k_calinterval;
2414
2415 ret = 0; 2403 ret = 0;
2416done: 2404done:
2417 mmiowb(); 2405 mmiowb();
diff --git a/drivers/net/wireless/ath/ath5k/eeprom.c b/drivers/net/wireless/ath/ath5k/eeprom.c
index 5d1c8677f180..6a3f4da7fb48 100644
--- a/drivers/net/wireless/ath/ath5k/eeprom.c
+++ b/drivers/net/wireless/ath/ath5k/eeprom.c
@@ -97,7 +97,7 @@ ath5k_eeprom_init_header(struct ath5k_hw *ah)
97 struct ath5k_eeprom_info *ee = &ah->ah_capabilities.cap_eeprom; 97 struct ath5k_eeprom_info *ee = &ah->ah_capabilities.cap_eeprom;
98 int ret; 98 int ret;
99 u16 val; 99 u16 val;
100 u32 cksum, offset; 100 u32 cksum, offset, eep_max = AR5K_EEPROM_INFO_MAX;
101 101
102 /* 102 /*
103 * Read values from EEPROM and store them in the capability structure 103 * Read values from EEPROM and store them in the capability structure
@@ -116,12 +116,38 @@ ath5k_eeprom_init_header(struct ath5k_hw *ah)
116 * Validate the checksum of the EEPROM date. There are some 116 * Validate the checksum of the EEPROM date. There are some
117 * devices with invalid EEPROMs. 117 * devices with invalid EEPROMs.
118 */ 118 */
119 for (cksum = 0, offset = 0; offset < AR5K_EEPROM_INFO_MAX; offset++) { 119 AR5K_EEPROM_READ(AR5K_EEPROM_SIZE_UPPER, val);
120 if (val) {
121 eep_max = (val & AR5K_EEPROM_SIZE_UPPER_MASK) <<
122 AR5K_EEPROM_SIZE_ENDLOC_SHIFT;
123 AR5K_EEPROM_READ(AR5K_EEPROM_SIZE_LOWER, val);
124 eep_max = (eep_max | val) - AR5K_EEPROM_INFO_BASE;
125
126 /*
127 * Fail safe check to prevent stupid loops due
128 * to busted EEPROMs. XXX: This value is likely too
129 * big still, waiting on a better value.
130 */
131 if (eep_max > (3 * AR5K_EEPROM_INFO_MAX)) {
132 ATH5K_ERR(ah->ah_sc, "Invalid max custom EEPROM size: "
133 "%d (0x%04x) max expected: %d (0x%04x)\n",
134 eep_max, eep_max,
135 3 * AR5K_EEPROM_INFO_MAX,
136 3 * AR5K_EEPROM_INFO_MAX);
137 return -EIO;
138 }
139 }
140
141 for (cksum = 0, offset = 0; offset < eep_max; offset++) {
120 AR5K_EEPROM_READ(AR5K_EEPROM_INFO(offset), val); 142 AR5K_EEPROM_READ(AR5K_EEPROM_INFO(offset), val);
121 cksum ^= val; 143 cksum ^= val;
122 } 144 }
123 if (cksum != AR5K_EEPROM_INFO_CKSUM) { 145 if (cksum != AR5K_EEPROM_INFO_CKSUM) {
124 ATH5K_ERR(ah->ah_sc, "Invalid EEPROM checksum 0x%04x\n", cksum); 146 ATH5K_ERR(ah->ah_sc, "Invalid EEPROM "
147 "checksum: 0x%04x eep_max: 0x%04x (%s)\n",
148 cksum, eep_max,
149 eep_max == AR5K_EEPROM_INFO_MAX ?
150 "default size" : "custom size");
125 return -EIO; 151 return -EIO;
126 } 152 }
127 153
diff --git a/drivers/net/wireless/ath/ath5k/eeprom.h b/drivers/net/wireless/ath/ath5k/eeprom.h
index 0123f3521a0b..473a483bb9c3 100644
--- a/drivers/net/wireless/ath/ath5k/eeprom.h
+++ b/drivers/net/wireless/ath/ath5k/eeprom.h
@@ -37,6 +37,14 @@
37#define AR5K_EEPROM_RFKILL_POLARITY_S 1 37#define AR5K_EEPROM_RFKILL_POLARITY_S 1
38 38
39#define AR5K_EEPROM_REG_DOMAIN 0x00bf /* EEPROM regdom */ 39#define AR5K_EEPROM_REG_DOMAIN 0x00bf /* EEPROM regdom */
40
41/* FLASH(EEPROM) Defines for AR531X chips */
42#define AR5K_EEPROM_SIZE_LOWER 0x1b /* size info -- lower */
43#define AR5K_EEPROM_SIZE_UPPER 0x1c /* size info -- upper */
44#define AR5K_EEPROM_SIZE_UPPER_MASK 0xfff0
45#define AR5K_EEPROM_SIZE_UPPER_SHIFT 4
46#define AR5K_EEPROM_SIZE_ENDLOC_SHIFT 12
47
40#define AR5K_EEPROM_CHECKSUM 0x00c0 /* EEPROM checksum */ 48#define AR5K_EEPROM_CHECKSUM 0x00c0 /* EEPROM checksum */
41#define AR5K_EEPROM_INFO_BASE 0x00c0 /* EEPROM header */ 49#define AR5K_EEPROM_INFO_BASE 0x00c0 /* EEPROM header */
42#define AR5K_EEPROM_INFO_MAX (0x400 - AR5K_EEPROM_INFO_BASE) 50#define AR5K_EEPROM_INFO_MAX (0x400 - AR5K_EEPROM_INFO_BASE)
diff --git a/drivers/net/wireless/ath/ath9k/Kconfig b/drivers/net/wireless/ath/ath9k/Kconfig
index 03a1106ad725..5774cea23a3b 100644
--- a/drivers/net/wireless/ath/ath9k/Kconfig
+++ b/drivers/net/wireless/ath/ath9k/Kconfig
@@ -25,7 +25,7 @@ config ATH9K
25 25
26config ATH9K_DEBUGFS 26config ATH9K_DEBUGFS
27 bool "Atheros ath9k debugging" 27 bool "Atheros ath9k debugging"
28 depends on ATH9K 28 depends on ATH9K && DEBUG_FS
29 ---help--- 29 ---help---
30 Say Y, if you need access to ath9k's statistics for 30 Say Y, if you need access to ath9k's statistics for
31 interrupts, rate control, etc. 31 interrupts, rate control, etc.
diff --git a/drivers/net/wireless/ath/ath9k/ath9k.h b/drivers/net/wireless/ath/ath9k/ath9k.h
index e2cef2ff5d8f..1597a42731ed 100644
--- a/drivers/net/wireless/ath/ath9k/ath9k.h
+++ b/drivers/net/wireless/ath/ath9k/ath9k.h
@@ -33,11 +33,11 @@ struct ath_node;
33 33
34/* Macro to expand scalars to 64-bit objects */ 34/* Macro to expand scalars to 64-bit objects */
35 35
36#define ito64(x) (sizeof(x) == 8) ? \ 36#define ito64(x) (sizeof(x) == 1) ? \
37 (((unsigned long long int)(x)) & (0xff)) : \ 37 (((unsigned long long int)(x)) & (0xff)) : \
38 (sizeof(x) == 16) ? \ 38 (sizeof(x) == 2) ? \
39 (((unsigned long long int)(x)) & 0xffff) : \ 39 (((unsigned long long int)(x)) & 0xffff) : \
40 ((sizeof(x) == 32) ? \ 40 ((sizeof(x) == 4) ? \
41 (((unsigned long long int)(x)) & 0xffffffff) : \ 41 (((unsigned long long int)(x)) & 0xffffffff) : \
42 (unsigned long long int)(x)) 42 (unsigned long long int)(x))
43 43
diff --git a/drivers/net/wireless/ath/ath9k/hw.c b/drivers/net/wireless/ath/ath9k/hw.c
index 2ec61f08cfdb..ae371448b5a0 100644
--- a/drivers/net/wireless/ath/ath9k/hw.c
+++ b/drivers/net/wireless/ath/ath9k/hw.c
@@ -855,12 +855,11 @@ static void ath9k_hw_init_mode_gain_regs(struct ath_hw *ah)
855 } 855 }
856} 856}
857 857
858static void ath9k_hw_init_11a_eeprom_fix(struct ath_hw *ah) 858static void ath9k_hw_init_eeprom_fix(struct ath_hw *ah)
859{ 859{
860 u32 i, j; 860 u32 i, j;
861 861
862 if ((ah->hw_version.devid == AR9280_DEVID_PCI) && 862 if (ah->hw_version.devid == AR9280_DEVID_PCI) {
863 test_bit(ATH9K_MODE_11A, ah->caps.wireless_modes)) {
864 863
865 /* EEPROM Fixup */ 864 /* EEPROM Fixup */
866 for (i = 0; i < ah->iniModes.ia_rows; i++) { 865 for (i = 0; i < ah->iniModes.ia_rows; i++) {
@@ -980,7 +979,7 @@ int ath9k_hw_init(struct ath_hw *ah)
980 if (r) 979 if (r)
981 return r; 980 return r;
982 981
983 ath9k_hw_init_11a_eeprom_fix(ah); 982 ath9k_hw_init_eeprom_fix(ah);
984 983
985 r = ath9k_hw_init_macaddr(ah); 984 r = ath9k_hw_init_macaddr(ah);
986 if (r) { 985 if (r) {
diff --git a/drivers/net/wireless/ath/ath9k/mac.c b/drivers/net/wireless/ath/ath9k/mac.c
index 71b84d91dcff..efc420cd42bf 100644
--- a/drivers/net/wireless/ath/ath9k/mac.c
+++ b/drivers/net/wireless/ath/ath9k/mac.c
@@ -186,7 +186,7 @@ bool ath9k_hw_stoptxdma(struct ath_hw *ah, u32 q)
186 wait = wait_time; 186 wait = wait_time;
187 while (ath9k_hw_numtxpending(ah, q)) { 187 while (ath9k_hw_numtxpending(ah, q)) {
188 if ((--wait) == 0) { 188 if ((--wait) == 0) {
189 ath_print(common, ATH_DBG_QUEUE, 189 ath_print(common, ATH_DBG_FATAL,
190 "Failed to stop TX DMA in 100 " 190 "Failed to stop TX DMA in 100 "
191 "msec after killing last frame\n"); 191 "msec after killing last frame\n");
192 break; 192 break;
diff --git a/drivers/net/wireless/ath/ath9k/mac.h b/drivers/net/wireless/ath/ath9k/mac.h
index 0c87771383f0..e185479e295e 100644
--- a/drivers/net/wireless/ath/ath9k/mac.h
+++ b/drivers/net/wireless/ath/ath9k/mac.h
@@ -77,6 +77,9 @@
77#define ATH9K_TXERR_XTXOP 0x08 77#define ATH9K_TXERR_XTXOP 0x08
78#define ATH9K_TXERR_TIMER_EXPIRED 0x10 78#define ATH9K_TXERR_TIMER_EXPIRED 0x10
79#define ATH9K_TX_ACKED 0x20 79#define ATH9K_TX_ACKED 0x20
80#define ATH9K_TXERR_MASK \
81 (ATH9K_TXERR_XRETRY | ATH9K_TXERR_FILT | ATH9K_TXERR_FIFO | \
82 ATH9K_TXERR_XTXOP | ATH9K_TXERR_TIMER_EXPIRED)
80 83
81#define ATH9K_TX_BA 0x01 84#define ATH9K_TX_BA 0x01
82#define ATH9K_TX_PWRMGMT 0x02 85#define ATH9K_TX_PWRMGMT 0x02
diff --git a/drivers/net/wireless/ath/ath9k/main.c b/drivers/net/wireless/ath/ath9k/main.c
index c48743452515..643bea35686f 100644
--- a/drivers/net/wireless/ath/ath9k/main.c
+++ b/drivers/net/wireless/ath/ath9k/main.c
@@ -1973,6 +1973,9 @@ int ath_reset(struct ath_softc *sc, bool retry_tx)
1973 struct ieee80211_hw *hw = sc->hw; 1973 struct ieee80211_hw *hw = sc->hw;
1974 int r; 1974 int r;
1975 1975
1976 /* Stop ANI */
1977 del_timer_sync(&common->ani.timer);
1978
1976 ath9k_hw_set_interrupts(ah, 0); 1979 ath9k_hw_set_interrupts(ah, 0);
1977 ath_drain_all_txq(sc, retry_tx); 1980 ath_drain_all_txq(sc, retry_tx);
1978 ath_stoprecv(sc); 1981 ath_stoprecv(sc);
@@ -2014,6 +2017,9 @@ int ath_reset(struct ath_softc *sc, bool retry_tx)
2014 } 2017 }
2015 } 2018 }
2016 2019
2020 /* Start ANI */
2021 ath_start_ani(common);
2022
2017 return r; 2023 return r;
2018} 2024}
2019 2025
@@ -2508,6 +2514,9 @@ static void ath9k_stop(struct ieee80211_hw *hw)
2508 return; /* another wiphy still in use */ 2514 return; /* another wiphy still in use */
2509 } 2515 }
2510 2516
2517 /* Ensure HW is awake when we try to shut it down. */
2518 ath9k_ps_wakeup(sc);
2519
2511 if (ah->btcoex_hw.enabled) { 2520 if (ah->btcoex_hw.enabled) {
2512 ath9k_hw_btcoex_disable(ah); 2521 ath9k_hw_btcoex_disable(ah);
2513 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE) 2522 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
@@ -2528,6 +2537,9 @@ static void ath9k_stop(struct ieee80211_hw *hw)
2528 /* disable HAL and put h/w to sleep */ 2537 /* disable HAL and put h/w to sleep */
2529 ath9k_hw_disable(ah); 2538 ath9k_hw_disable(ah);
2530 ath9k_hw_configpcipowersave(ah, 1, 1); 2539 ath9k_hw_configpcipowersave(ah, 1, 1);
2540 ath9k_ps_restore(sc);
2541
2542 /* Finally, put the chip in FULL SLEEP mode */
2531 ath9k_setpower(sc, ATH9K_PM_FULL_SLEEP); 2543 ath9k_setpower(sc, ATH9K_PM_FULL_SLEEP);
2532 2544
2533 sc->sc_flags |= SC_OP_INVALID; 2545 sc->sc_flags |= SC_OP_INVALID;
@@ -2641,10 +2653,12 @@ static void ath9k_remove_interface(struct ieee80211_hw *hw,
2641 if ((sc->sc_ah->opmode == NL80211_IFTYPE_AP) || 2653 if ((sc->sc_ah->opmode == NL80211_IFTYPE_AP) ||
2642 (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC) || 2654 (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC) ||
2643 (sc->sc_ah->opmode == NL80211_IFTYPE_MESH_POINT)) { 2655 (sc->sc_ah->opmode == NL80211_IFTYPE_MESH_POINT)) {
2656 ath9k_ps_wakeup(sc);
2644 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq); 2657 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
2645 ath_beacon_return(sc, avp); 2658 ath9k_ps_restore(sc);
2646 } 2659 }
2647 2660
2661 ath_beacon_return(sc, avp);
2648 sc->sc_flags &= ~SC_OP_BEACONS; 2662 sc->sc_flags &= ~SC_OP_BEACONS;
2649 2663
2650 for (i = 0; i < ARRAY_SIZE(sc->beacon.bslot); i++) { 2664 for (i = 0; i < ARRAY_SIZE(sc->beacon.bslot); i++) {
@@ -3091,15 +3105,21 @@ static int ath9k_ampdu_action(struct ieee80211_hw *hw,
3091 case IEEE80211_AMPDU_RX_STOP: 3105 case IEEE80211_AMPDU_RX_STOP:
3092 break; 3106 break;
3093 case IEEE80211_AMPDU_TX_START: 3107 case IEEE80211_AMPDU_TX_START:
3108 ath9k_ps_wakeup(sc);
3094 ath_tx_aggr_start(sc, sta, tid, ssn); 3109 ath_tx_aggr_start(sc, sta, tid, ssn);
3095 ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid); 3110 ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
3111 ath9k_ps_restore(sc);
3096 break; 3112 break;
3097 case IEEE80211_AMPDU_TX_STOP: 3113 case IEEE80211_AMPDU_TX_STOP:
3114 ath9k_ps_wakeup(sc);
3098 ath_tx_aggr_stop(sc, sta, tid); 3115 ath_tx_aggr_stop(sc, sta, tid);
3099 ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid); 3116 ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
3117 ath9k_ps_restore(sc);
3100 break; 3118 break;
3101 case IEEE80211_AMPDU_TX_OPERATIONAL: 3119 case IEEE80211_AMPDU_TX_OPERATIONAL:
3120 ath9k_ps_wakeup(sc);
3102 ath_tx_aggr_resume(sc, sta, tid); 3121 ath_tx_aggr_resume(sc, sta, tid);
3122 ath9k_ps_restore(sc);
3103 break; 3123 break;
3104 default: 3124 default:
3105 ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_FATAL, 3125 ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_FATAL,
diff --git a/drivers/net/wireless/ath/ath9k/pci.c b/drivers/net/wireless/ath/ath9k/pci.c
index 5321f735e5a0..f7af5ea54753 100644
--- a/drivers/net/wireless/ath/ath9k/pci.c
+++ b/drivers/net/wireless/ath/ath9k/pci.c
@@ -96,7 +96,7 @@ static void ath_pci_bt_coex_prep(struct ath_common *common)
96 pci_write_config_byte(pdev, ATH_PCIE_CAP_LINK_CTRL, aspm); 96 pci_write_config_byte(pdev, ATH_PCIE_CAP_LINK_CTRL, aspm);
97} 97}
98 98
99const static struct ath_bus_ops ath_pci_bus_ops = { 99static const struct ath_bus_ops ath_pci_bus_ops = {
100 .read_cachesize = ath_pci_read_cachesize, 100 .read_cachesize = ath_pci_read_cachesize,
101 .cleanup = ath_pci_cleanup, 101 .cleanup = ath_pci_cleanup,
102 .eeprom_read = ath_pci_eeprom_read, 102 .eeprom_read = ath_pci_eeprom_read,
diff --git a/drivers/net/wireless/ath/ath9k/xmit.c b/drivers/net/wireless/ath/ath9k/xmit.c
index 2a11cc57ceea..29bf33692f71 100644
--- a/drivers/net/wireless/ath/ath9k/xmit.c
+++ b/drivers/net/wireless/ath/ath9k/xmit.c
@@ -1108,11 +1108,11 @@ void ath_drain_all_txq(struct ath_softc *sc, bool retry_tx)
1108 if (npend) { 1108 if (npend) {
1109 int r; 1109 int r;
1110 1110
1111 ath_print(common, ATH_DBG_XMIT, 1111 ath_print(common, ATH_DBG_FATAL,
1112 "Unable to stop TxDMA. Reset HAL!\n"); 1112 "Unable to stop TxDMA. Reset HAL!\n");
1113 1113
1114 spin_lock_bh(&sc->sc_resetlock); 1114 spin_lock_bh(&sc->sc_resetlock);
1115 r = ath9k_hw_reset(ah, sc->sc_ah->curchan, true); 1115 r = ath9k_hw_reset(ah, sc->sc_ah->curchan, false);
1116 if (r) 1116 if (r)
1117 ath_print(common, ATH_DBG_FATAL, 1117 ath_print(common, ATH_DBG_FATAL,
1118 "Unable to reset hardware; reset status %d\n", 1118 "Unable to reset hardware; reset status %d\n",
@@ -1414,17 +1414,9 @@ static void assign_aggr_tid_seqno(struct sk_buff *skb,
1414 * For HT capable stations, we save tidno for later use. 1414 * For HT capable stations, we save tidno for later use.
1415 * We also override seqno set by upper layer with the one 1415 * We also override seqno set by upper layer with the one
1416 * in tx aggregation state. 1416 * in tx aggregation state.
1417 *
1418 * If fragmentation is on, the sequence number is
1419 * not overridden, since it has been
1420 * incremented by the fragmentation routine.
1421 *
1422 * FIXME: check if the fragmentation threshold exceeds
1423 * IEEE80211 max.
1424 */ 1417 */
1425 tid = ATH_AN_2_TID(an, bf->bf_tidno); 1418 tid = ATH_AN_2_TID(an, bf->bf_tidno);
1426 hdr->seq_ctrl = cpu_to_le16(tid->seq_next << 1419 hdr->seq_ctrl = cpu_to_le16(tid->seq_next << IEEE80211_SEQ_SEQ_SHIFT);
1427 IEEE80211_SEQ_SEQ_SHIFT);
1428 bf->bf_seqno = tid->seq_next; 1420 bf->bf_seqno = tid->seq_next;
1429 INCR(tid->seq_next, IEEE80211_SEQ_MAX); 1421 INCR(tid->seq_next, IEEE80211_SEQ_MAX);
1430} 1422}
@@ -1623,7 +1615,7 @@ static int ath_tx_setup_buffer(struct ieee80211_hw *hw, struct ath_buf *bf,
1623 bf->bf_frmlen -= padsize; 1615 bf->bf_frmlen -= padsize;
1624 } 1616 }
1625 1617
1626 if (conf_is_ht(&hw->conf) && !is_pae(skb)) 1618 if (conf_is_ht(&hw->conf))
1627 bf->bf_state.bf_type |= BUF_HT; 1619 bf->bf_state.bf_type |= BUF_HT;
1628 1620
1629 bf->bf_flags = setup_tx_flags(sc, skb, txctl->txq); 1621 bf->bf_flags = setup_tx_flags(sc, skb, txctl->txq);
@@ -1636,7 +1628,8 @@ static int ath_tx_setup_buffer(struct ieee80211_hw *hw, struct ath_buf *bf,
1636 bf->bf_keyix = ATH9K_TXKEYIX_INVALID; 1628 bf->bf_keyix = ATH9K_TXKEYIX_INVALID;
1637 } 1629 }
1638 1630
1639 if (ieee80211_is_data_qos(fc) && (sc->sc_flags & SC_OP_TXAGGR)) 1631 if (ieee80211_is_data_qos(fc) && bf_isht(bf) &&
1632 (sc->sc_flags & SC_OP_TXAGGR))
1640 assign_aggr_tid_seqno(skb, bf); 1633 assign_aggr_tid_seqno(skb, bf);
1641 1634
1642 bf->bf_mpdu = skb; 1635 bf->bf_mpdu = skb;
@@ -1708,7 +1701,7 @@ static void ath_tx_start_dma(struct ath_softc *sc, struct ath_buf *bf,
1708 goto tx_done; 1701 goto tx_done;
1709 } 1702 }
1710 1703
1711 if (tx_info->flags & IEEE80211_TX_CTL_AMPDU) { 1704 if ((tx_info->flags & IEEE80211_TX_CTL_AMPDU) && !is_pae(skb)) {
1712 /* 1705 /*
1713 * Try aggregation if it's a unicast data frame 1706 * Try aggregation if it's a unicast data frame
1714 * and the destination is HT capable. 1707 * and the destination is HT capable.
@@ -1780,7 +1773,8 @@ void ath_tx_cabq(struct ieee80211_hw *hw, struct sk_buff *skb)
1780 struct ath_wiphy *aphy = hw->priv; 1773 struct ath_wiphy *aphy = hw->priv;
1781 struct ath_softc *sc = aphy->sc; 1774 struct ath_softc *sc = aphy->sc;
1782 struct ath_common *common = ath9k_hw_common(sc->sc_ah); 1775 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1783 int hdrlen, padsize; 1776 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
1777 int padpos, padsize;
1784 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); 1778 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
1785 struct ath_tx_control txctl; 1779 struct ath_tx_control txctl;
1786 1780
@@ -1792,7 +1786,6 @@ void ath_tx_cabq(struct ieee80211_hw *hw, struct sk_buff *skb)
1792 * BSSes. 1786 * BSSes.
1793 */ 1787 */
1794 if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) { 1788 if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
1795 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
1796 if (info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT) 1789 if (info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT)
1797 sc->tx.seq_no += 0x10; 1790 sc->tx.seq_no += 0x10;
1798 hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG); 1791 hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
@@ -1800,9 +1793,9 @@ void ath_tx_cabq(struct ieee80211_hw *hw, struct sk_buff *skb)
1800 } 1793 }
1801 1794
1802 /* Add the padding after the header if this is not already done */ 1795 /* Add the padding after the header if this is not already done */
1803 hdrlen = ieee80211_get_hdrlen_from_skb(skb); 1796 padpos = ath9k_cmn_padpos(hdr->frame_control);
1804 if (hdrlen & 3) { 1797 padsize = padpos & 3;
1805 padsize = hdrlen % 4; 1798 if (padsize && skb->len>padpos) {
1806 if (skb_headroom(skb) < padsize) { 1799 if (skb_headroom(skb) < padsize) {
1807 ath_print(common, ATH_DBG_XMIT, 1800 ath_print(common, ATH_DBG_XMIT,
1808 "TX CABQ padding failed\n"); 1801 "TX CABQ padding failed\n");
@@ -1810,7 +1803,7 @@ void ath_tx_cabq(struct ieee80211_hw *hw, struct sk_buff *skb)
1810 return; 1803 return;
1811 } 1804 }
1812 skb_push(skb, padsize); 1805 skb_push(skb, padsize);
1813 memmove(skb->data, skb->data + padsize, hdrlen); 1806 memmove(skb->data, skb->data + padsize, padpos);
1814 } 1807 }
1815 1808
1816 txctl.txq = sc->beacon.cabq; 1809 txctl.txq = sc->beacon.cabq;
@@ -1838,7 +1831,8 @@ static void ath_tx_complete(struct ath_softc *sc, struct sk_buff *skb,
1838 struct ieee80211_hw *hw = sc->hw; 1831 struct ieee80211_hw *hw = sc->hw;
1839 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb); 1832 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
1840 struct ath_common *common = ath9k_hw_common(sc->sc_ah); 1833 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1841 int hdrlen, padsize; 1834 struct ieee80211_hdr * hdr = (struct ieee80211_hdr *)skb->data;
1835 int padpos, padsize;
1842 1836
1843 ath_print(common, ATH_DBG_XMIT, "TX complete: skb: %p\n", skb); 1837 ath_print(common, ATH_DBG_XMIT, "TX complete: skb: %p\n", skb);
1844 1838
@@ -1853,14 +1847,14 @@ static void ath_tx_complete(struct ath_softc *sc, struct sk_buff *skb,
1853 tx_info->flags |= IEEE80211_TX_STAT_ACK; 1847 tx_info->flags |= IEEE80211_TX_STAT_ACK;
1854 } 1848 }
1855 1849
1856 hdrlen = ieee80211_get_hdrlen_from_skb(skb); 1850 padpos = ath9k_cmn_padpos(hdr->frame_control);
1857 padsize = hdrlen & 3; 1851 padsize = padpos & 3;
1858 if (padsize && hdrlen >= 24) { 1852 if (padsize && skb->len>padpos+padsize) {
1859 /* 1853 /*
1860 * Remove MAC header padding before giving the frame back to 1854 * Remove MAC header padding before giving the frame back to
1861 * mac80211. 1855 * mac80211.
1862 */ 1856 */
1863 memmove(skb->data + padsize, skb->data, hdrlen); 1857 memmove(skb->data + padsize, skb->data, padpos);
1864 skb_pull(skb, padsize); 1858 skb_pull(skb, padsize);
1865 } 1859 }
1866 1860
@@ -2078,7 +2072,7 @@ static void ath_tx_processq(struct ath_softc *sc, struct ath_txq *txq)
2078 &txq->axq_q, lastbf->list.prev); 2072 &txq->axq_q, lastbf->list.prev);
2079 2073
2080 txq->axq_depth--; 2074 txq->axq_depth--;
2081 txok = !(ds->ds_txstat.ts_status & ATH9K_TXERR_FILT); 2075 txok = !(ds->ds_txstat.ts_status & ATH9K_TXERR_MASK);
2082 txq->axq_tx_inprogress = false; 2076 txq->axq_tx_inprogress = false;
2083 spin_unlock_bh(&txq->axq_lock); 2077 spin_unlock_bh(&txq->axq_lock);
2084 2078
diff --git a/drivers/net/wireless/b43/b43.h b/drivers/net/wireless/b43/b43.h
index fe3bf9491997..c484cc253892 100644
--- a/drivers/net/wireless/b43/b43.h
+++ b/drivers/net/wireless/b43/b43.h
@@ -115,6 +115,7 @@
115#define B43_MMIO_TSF_2 0x636 /* core rev < 3 only */ 115#define B43_MMIO_TSF_2 0x636 /* core rev < 3 only */
116#define B43_MMIO_TSF_3 0x638 /* core rev < 3 only */ 116#define B43_MMIO_TSF_3 0x638 /* core rev < 3 only */
117#define B43_MMIO_RNG 0x65A 117#define B43_MMIO_RNG 0x65A
118#define B43_MMIO_IFSSLOT 0x684 /* Interframe slot time */
118#define B43_MMIO_IFSCTL 0x688 /* Interframe space control */ 119#define B43_MMIO_IFSCTL 0x688 /* Interframe space control */
119#define B43_MMIO_IFSCTL_USE_EDCF 0x0004 120#define B43_MMIO_IFSCTL_USE_EDCF 0x0004
120#define B43_MMIO_POWERUP_DELAY 0x6A8 121#define B43_MMIO_POWERUP_DELAY 0x6A8
diff --git a/drivers/net/wireless/b43/dma.c b/drivers/net/wireless/b43/dma.c
index 027be275e035..88d1fd02d40a 100644
--- a/drivers/net/wireless/b43/dma.c
+++ b/drivers/net/wireless/b43/dma.c
@@ -383,160 +383,44 @@ static inline
383 } 383 }
384} 384}
385 385
386/* Check if a DMA region fits the device constraints.
387 * Returns true, if the region is OK for usage with this device. */
388static inline bool b43_dma_address_ok(struct b43_dmaring *ring,
389 dma_addr_t addr, size_t size)
390{
391 switch (ring->type) {
392 case B43_DMA_30BIT:
393 if ((u64)addr + size > (1ULL << 30))
394 return 0;
395 break;
396 case B43_DMA_32BIT:
397 if ((u64)addr + size > (1ULL << 32))
398 return 0;
399 break;
400 case B43_DMA_64BIT:
401 /* Currently we can't have addresses beyond
402 * 64bit in the kernel. */
403 break;
404 }
405 return 1;
406}
407
408#define is_4k_aligned(addr) (((u64)(addr) & 0x0FFFull) == 0)
409#define is_8k_aligned(addr) (((u64)(addr) & 0x1FFFull) == 0)
410
411static void b43_unmap_and_free_ringmem(struct b43_dmaring *ring, void *base,
412 dma_addr_t dmaaddr, size_t size)
413{
414 ssb_dma_unmap_single(ring->dev->dev, dmaaddr, size, DMA_TO_DEVICE);
415 free_pages((unsigned long)base, get_order(size));
416}
417
418static void * __b43_get_and_map_ringmem(struct b43_dmaring *ring,
419 dma_addr_t *dmaaddr, size_t size,
420 gfp_t gfp_flags)
421{
422 void *base;
423
424 base = (void *)__get_free_pages(gfp_flags, get_order(size));
425 if (!base)
426 return NULL;
427 memset(base, 0, size);
428 *dmaaddr = ssb_dma_map_single(ring->dev->dev, base, size,
429 DMA_TO_DEVICE);
430 if (ssb_dma_mapping_error(ring->dev->dev, *dmaaddr)) {
431 free_pages((unsigned long)base, get_order(size));
432 return NULL;
433 }
434
435 return base;
436}
437
438static void * b43_get_and_map_ringmem(struct b43_dmaring *ring,
439 dma_addr_t *dmaaddr, size_t size)
440{
441 void *base;
442
443 base = __b43_get_and_map_ringmem(ring, dmaaddr, size,
444 GFP_KERNEL);
445 if (!base) {
446 b43err(ring->dev->wl, "Failed to allocate or map pages "
447 "for DMA ringmemory\n");
448 return NULL;
449 }
450 if (!b43_dma_address_ok(ring, *dmaaddr, size)) {
451 /* The memory does not fit our device constraints.
452 * Retry with GFP_DMA set to get lower memory. */
453 b43_unmap_and_free_ringmem(ring, base, *dmaaddr, size);
454 base = __b43_get_and_map_ringmem(ring, dmaaddr, size,
455 GFP_KERNEL | GFP_DMA);
456 if (!base) {
457 b43err(ring->dev->wl, "Failed to allocate or map pages "
458 "in the GFP_DMA region for DMA ringmemory\n");
459 return NULL;
460 }
461 if (!b43_dma_address_ok(ring, *dmaaddr, size)) {
462 b43_unmap_and_free_ringmem(ring, base, *dmaaddr, size);
463 b43err(ring->dev->wl, "Failed to allocate DMA "
464 "ringmemory that fits device constraints\n");
465 return NULL;
466 }
467 }
468 /* We expect the memory to be 4k aligned, at least. */
469 if (B43_WARN_ON(!is_4k_aligned(*dmaaddr))) {
470 b43_unmap_and_free_ringmem(ring, base, *dmaaddr, size);
471 return NULL;
472 }
473
474 return base;
475}
476
477static int alloc_ringmemory(struct b43_dmaring *ring) 386static int alloc_ringmemory(struct b43_dmaring *ring)
478{ 387{
479 unsigned int required; 388 gfp_t flags = GFP_KERNEL;
480 void *base; 389
481 dma_addr_t dmaaddr; 390 /* The specs call for 4K buffers for 30- and 32-bit DMA with 4K
482 391 * alignment and 8K buffers for 64-bit DMA with 8K alignment. Testing
483 /* There are several requirements to the descriptor ring memory: 392 * has shown that 4K is sufficient for the latter as long as the buffer
484 * - The memory region needs to fit the address constraints for the 393 * does not cross an 8K boundary.
485 * device (same as for frame buffers). 394 *
486 * - For 30/32bit DMA devices, the descriptor ring must be 4k aligned. 395 * For unknown reasons - possibly a hardware error - the BCM4311 rev
487 * - For 64bit DMA devices, the descriptor ring must be 8k aligned. 396 * 02, which uses 64-bit DMA, needs the ring buffer in very low memory,
397 * which accounts for the GFP_DMA flag below.
398 *
399 * The flags here must match the flags in free_ringmemory below!
488 */ 400 */
489
490 if (ring->type == B43_DMA_64BIT) 401 if (ring->type == B43_DMA_64BIT)
491 required = ring->nr_slots * sizeof(struct b43_dmadesc64); 402 flags |= GFP_DMA;
492 else 403 ring->descbase = ssb_dma_alloc_consistent(ring->dev->dev,
493 required = ring->nr_slots * sizeof(struct b43_dmadesc32); 404 B43_DMA_RINGMEMSIZE,
494 if (B43_WARN_ON(required > 0x1000)) 405 &(ring->dmabase), flags);
406 if (!ring->descbase) {
407 b43err(ring->dev->wl, "DMA ringmemory allocation failed\n");
495 return -ENOMEM; 408 return -ENOMEM;
496
497 ring->alloc_descsize = 0x1000;
498 base = b43_get_and_map_ringmem(ring, &dmaaddr, ring->alloc_descsize);
499 if (!base)
500 return -ENOMEM;
501 ring->alloc_descbase = base;
502 ring->alloc_dmabase = dmaaddr;
503
504 if ((ring->type != B43_DMA_64BIT) || is_8k_aligned(dmaaddr)) {
505 /* We're on <=32bit DMA, or we already got 8k aligned memory.
506 * That's all we need, so we're fine. */
507 ring->descbase = base;
508 ring->dmabase = dmaaddr;
509 return 0;
510 }
511 b43_unmap_and_free_ringmem(ring, base, dmaaddr, ring->alloc_descsize);
512
513 /* Ok, we failed at the 8k alignment requirement.
514 * Try to force-align the memory region now. */
515 ring->alloc_descsize = 0x2000;
516 base = b43_get_and_map_ringmem(ring, &dmaaddr, ring->alloc_descsize);
517 if (!base)
518 return -ENOMEM;
519 ring->alloc_descbase = base;
520 ring->alloc_dmabase = dmaaddr;
521
522 if (is_8k_aligned(dmaaddr)) {
523 /* We're already 8k aligned. That Ok, too. */
524 ring->descbase = base;
525 ring->dmabase = dmaaddr;
526 return 0;
527 } 409 }
528 /* Force-align it to 8k */ 410 memset(ring->descbase, 0, B43_DMA_RINGMEMSIZE);
529 ring->descbase = (void *)((u8 *)base + 0x1000);
530 ring->dmabase = dmaaddr + 0x1000;
531 B43_WARN_ON(!is_8k_aligned(ring->dmabase));
532 411
533 return 0; 412 return 0;
534} 413}
535 414
536static void free_ringmemory(struct b43_dmaring *ring) 415static void free_ringmemory(struct b43_dmaring *ring)
537{ 416{
538 b43_unmap_and_free_ringmem(ring, ring->alloc_descbase, 417 gfp_t flags = GFP_KERNEL;
539 ring->alloc_dmabase, ring->alloc_descsize); 418
419 if (ring->type == B43_DMA_64BIT)
420 flags |= GFP_DMA;
421
422 ssb_dma_free_consistent(ring->dev->dev, B43_DMA_RINGMEMSIZE,
423 ring->descbase, ring->dmabase, flags);
540} 424}
541 425
542/* Reset the RX DMA channel */ 426/* Reset the RX DMA channel */
@@ -646,14 +530,29 @@ static bool b43_dma_mapping_error(struct b43_dmaring *ring,
646 if (unlikely(ssb_dma_mapping_error(ring->dev->dev, addr))) 530 if (unlikely(ssb_dma_mapping_error(ring->dev->dev, addr)))
647 return 1; 531 return 1;
648 532
649 if (!b43_dma_address_ok(ring, addr, buffersize)) { 533 switch (ring->type) {
650 /* We can't support this address. Unmap it again. */ 534 case B43_DMA_30BIT:
651 unmap_descbuffer(ring, addr, buffersize, dma_to_device); 535 if ((u64)addr + buffersize > (1ULL << 30))
652 return 1; 536 goto address_error;
537 break;
538 case B43_DMA_32BIT:
539 if ((u64)addr + buffersize > (1ULL << 32))
540 goto address_error;
541 break;
542 case B43_DMA_64BIT:
543 /* Currently we can't have addresses beyond
544 * 64bit in the kernel. */
545 break;
653 } 546 }
654 547
655 /* The address is OK. */ 548 /* The address is OK. */
656 return 0; 549 return 0;
550
551address_error:
552 /* We can't support this address. Unmap it again. */
553 unmap_descbuffer(ring, addr, buffersize, dma_to_device);
554
555 return 1;
657} 556}
658 557
659static bool b43_rx_buffer_is_poisoned(struct b43_dmaring *ring, struct sk_buff *skb) 558static bool b43_rx_buffer_is_poisoned(struct b43_dmaring *ring, struct sk_buff *skb)
@@ -715,9 +614,6 @@ static int setup_rx_descbuffer(struct b43_dmaring *ring,
715 meta->dmaaddr = dmaaddr; 614 meta->dmaaddr = dmaaddr;
716 ring->ops->fill_descriptor(ring, desc, dmaaddr, 615 ring->ops->fill_descriptor(ring, desc, dmaaddr,
717 ring->rx_buffersize, 0, 0, 0); 616 ring->rx_buffersize, 0, 0, 0);
718 ssb_dma_sync_single_for_device(ring->dev->dev,
719 ring->alloc_dmabase,
720 ring->alloc_descsize, DMA_TO_DEVICE);
721 617
722 return 0; 618 return 0;
723} 619}
@@ -1354,9 +1250,6 @@ static int dma_tx_fragment(struct b43_dmaring *ring,
1354 } 1250 }
1355 /* Now transfer the whole frame. */ 1251 /* Now transfer the whole frame. */
1356 wmb(); 1252 wmb();
1357 ssb_dma_sync_single_for_device(ring->dev->dev,
1358 ring->alloc_dmabase,
1359 ring->alloc_descsize, DMA_TO_DEVICE);
1360 ops->poke_tx(ring, next_slot(ring, slot)); 1253 ops->poke_tx(ring, next_slot(ring, slot));
1361 return 0; 1254 return 0;
1362 1255
diff --git a/drivers/net/wireless/b43/dma.h b/drivers/net/wireless/b43/dma.h
index e607b392314c..f7ab37c4cdbc 100644
--- a/drivers/net/wireless/b43/dma.h
+++ b/drivers/net/wireless/b43/dma.h
@@ -157,6 +157,7 @@ struct b43_dmadesc_generic {
157} __attribute__ ((__packed__)); 157} __attribute__ ((__packed__));
158 158
159/* Misc DMA constants */ 159/* Misc DMA constants */
160#define B43_DMA_RINGMEMSIZE PAGE_SIZE
160#define B43_DMA0_RX_FRAMEOFFSET 30 161#define B43_DMA0_RX_FRAMEOFFSET 30
161 162
162/* DMA engine tuning knobs */ 163/* DMA engine tuning knobs */
@@ -246,12 +247,6 @@ struct b43_dmaring {
246 /* The QOS priority assigned to this ring. Only used for TX rings. 247 /* The QOS priority assigned to this ring. Only used for TX rings.
247 * This is the mac80211 "queue" value. */ 248 * This is the mac80211 "queue" value. */
248 u8 queue_prio; 249 u8 queue_prio;
249 /* Pointers and size of the originally allocated and mapped memory
250 * region for the descriptor ring. */
251 void *alloc_descbase;
252 dma_addr_t alloc_dmabase;
253 unsigned int alloc_descsize;
254 /* Pointer to our wireless device. */
255 struct b43_wldev *dev; 250 struct b43_wldev *dev;
256#ifdef CONFIG_B43_DEBUG 251#ifdef CONFIG_B43_DEBUG
257 /* Maximum number of used slots. */ 252 /* Maximum number of used slots. */
diff --git a/drivers/net/wireless/b43/main.c b/drivers/net/wireless/b43/main.c
index 4c41cfe44f26..490fb45d1d05 100644
--- a/drivers/net/wireless/b43/main.c
+++ b/drivers/net/wireless/b43/main.c
@@ -628,10 +628,17 @@ static void b43_upload_card_macaddress(struct b43_wldev *dev)
628static void b43_set_slot_time(struct b43_wldev *dev, u16 slot_time) 628static void b43_set_slot_time(struct b43_wldev *dev, u16 slot_time)
629{ 629{
630 /* slot_time is in usec. */ 630 /* slot_time is in usec. */
631 if (dev->phy.type != B43_PHYTYPE_G) 631 /* This test used to exit for all but a G PHY. */
632 if (b43_current_band(dev->wl) == IEEE80211_BAND_5GHZ)
632 return; 633 return;
633 b43_write16(dev, 0x684, 510 + slot_time); 634 b43_write16(dev, B43_MMIO_IFSSLOT, 510 + slot_time);
634 b43_shm_write16(dev, B43_SHM_SHARED, 0x0010, slot_time); 635 /* Shared memory location 0x0010 is the slot time and should be
636 * set to slot_time; however, this register is initially 0 and changing
637 * the value adversely affects the transmit rate for BCM4311
638 * devices. Until this behavior is unterstood, delete this step
639 *
640 * b43_shm_write16(dev, B43_SHM_SHARED, 0x0010, slot_time);
641 */
635} 642}
636 643
637static void b43_short_slot_timing_enable(struct b43_wldev *dev) 644static void b43_short_slot_timing_enable(struct b43_wldev *dev)
diff --git a/drivers/net/wireless/iwlwifi/iwl-3945.c b/drivers/net/wireless/iwlwifi/iwl-3945.c
index 7da1dab933d9..234891d8cc10 100644
--- a/drivers/net/wireless/iwlwifi/iwl-3945.c
+++ b/drivers/net/wireless/iwlwifi/iwl-3945.c
@@ -681,19 +681,13 @@ static void iwl3945_rx_reply_rx(struct iwl_priv *priv,
681 snr = rx_stats_sig_avg / rx_stats_noise_diff; 681 snr = rx_stats_sig_avg / rx_stats_noise_diff;
682 rx_status.noise = rx_status.signal - 682 rx_status.noise = rx_status.signal -
683 iwl3945_calc_db_from_ratio(snr); 683 iwl3945_calc_db_from_ratio(snr);
684 rx_status.qual = iwl3945_calc_sig_qual(rx_status.signal,
685 rx_status.noise);
686
687 /* If noise info not available, calculate signal quality indicator (%)
688 * using just the dBm signal level. */
689 } else { 684 } else {
690 rx_status.noise = priv->last_rx_noise; 685 rx_status.noise = priv->last_rx_noise;
691 rx_status.qual = iwl3945_calc_sig_qual(rx_status.signal, 0);
692 } 686 }
693 687
694 688
695 IWL_DEBUG_STATS(priv, "Rssi %d noise %d qual %d sig_avg %d noise_diff %d\n", 689 IWL_DEBUG_STATS(priv, "Rssi %d noise %d sig_avg %d noise_diff %d\n",
696 rx_status.signal, rx_status.noise, rx_status.qual, 690 rx_status.signal, rx_status.noise,
697 rx_stats_sig_avg, rx_stats_noise_diff); 691 rx_stats_sig_avg, rx_stats_noise_diff);
698 692
699 header = (struct ieee80211_hdr *)IWL_RX_DATA(pkt); 693 header = (struct ieee80211_hdr *)IWL_RX_DATA(pkt);
@@ -1835,8 +1829,7 @@ static int iwl3945_send_rxon_assoc(struct iwl_priv *priv)
1835 rc = -EIO; 1829 rc = -EIO;
1836 } 1830 }
1837 1831
1838 priv->alloc_rxb_page--; 1832 iwl_free_pages(priv, cmd.reply_page);
1839 free_pages(cmd.reply_page, priv->hw_params.rx_page_order);
1840 1833
1841 return rc; 1834 return rc;
1842} 1835}
@@ -2836,6 +2829,7 @@ static struct iwl_cfg iwl3945_bg_cfg = {
2836 .use_isr_legacy = true, 2829 .use_isr_legacy = true,
2837 .ht_greenfield_support = false, 2830 .ht_greenfield_support = false,
2838 .led_compensation = 64, 2831 .led_compensation = 64,
2832 .broken_powersave = true,
2839}; 2833};
2840 2834
2841static struct iwl_cfg iwl3945_abg_cfg = { 2835static struct iwl_cfg iwl3945_abg_cfg = {
@@ -2852,6 +2846,7 @@ static struct iwl_cfg iwl3945_abg_cfg = {
2852 .use_isr_legacy = true, 2846 .use_isr_legacy = true,
2853 .ht_greenfield_support = false, 2847 .ht_greenfield_support = false,
2854 .led_compensation = 64, 2848 .led_compensation = 64,
2849 .broken_powersave = true,
2855}; 2850};
2856 2851
2857struct pci_device_id iwl3945_hw_card_ids[] = { 2852struct pci_device_id iwl3945_hw_card_ids[] = {
diff --git a/drivers/net/wireless/iwlwifi/iwl-3945.h b/drivers/net/wireless/iwlwifi/iwl-3945.h
index ecc23ec1f6a4..531fa125f5a6 100644
--- a/drivers/net/wireless/iwlwifi/iwl-3945.h
+++ b/drivers/net/wireless/iwlwifi/iwl-3945.h
@@ -222,7 +222,6 @@ struct iwl3945_ibss_seq {
222 * 222 *
223 *****************************************************************************/ 223 *****************************************************************************/
224extern int iwl3945_calc_db_from_ratio(int sig_ratio); 224extern int iwl3945_calc_db_from_ratio(int sig_ratio);
225extern int iwl3945_calc_sig_qual(int rssi_dbm, int noise_dbm);
226extern void iwl3945_rx_replenish(void *data); 225extern void iwl3945_rx_replenish(void *data);
227extern void iwl3945_rx_queue_reset(struct iwl_priv *priv, struct iwl_rx_queue *rxq); 226extern void iwl3945_rx_queue_reset(struct iwl_priv *priv, struct iwl_rx_queue *rxq);
228extern unsigned int iwl3945_fill_beacon_frame(struct iwl_priv *priv, 227extern unsigned int iwl3945_fill_beacon_frame(struct iwl_priv *priv,
diff --git a/drivers/net/wireless/iwlwifi/iwl-4965.c b/drivers/net/wireless/iwlwifi/iwl-4965.c
index 386513b601f5..31462813bac0 100644
--- a/drivers/net/wireless/iwlwifi/iwl-4965.c
+++ b/drivers/net/wireless/iwlwifi/iwl-4965.c
@@ -1204,7 +1204,7 @@ static int iwl4965_fill_txpower_tbl(struct iwl_priv *priv, u8 band, u16 channel,
1204 iwl4965_interpolate_chan(priv, channel, &ch_eeprom_info); 1204 iwl4965_interpolate_chan(priv, channel, &ch_eeprom_info);
1205 1205
1206 /* calculate tx gain adjustment based on power supply voltage */ 1206 /* calculate tx gain adjustment based on power supply voltage */
1207 voltage = priv->calib_info->voltage; 1207 voltage = le16_to_cpu(priv->calib_info->voltage);
1208 init_voltage = (s32)le32_to_cpu(priv->card_alive_init.voltage); 1208 init_voltage = (s32)le32_to_cpu(priv->card_alive_init.voltage);
1209 voltage_compensation = 1209 voltage_compensation =
1210 iwl4965_get_voltage_compensation(voltage, init_voltage); 1210 iwl4965_get_voltage_compensation(voltage, init_voltage);
@@ -1961,7 +1961,7 @@ static void iwl4965_rx_reply_tx(struct iwl_priv *priv,
1961 struct ieee80211_tx_info *info; 1961 struct ieee80211_tx_info *info;
1962 struct iwl4965_tx_resp *tx_resp = (void *)&pkt->u.raw[0]; 1962 struct iwl4965_tx_resp *tx_resp = (void *)&pkt->u.raw[0];
1963 u32 status = le32_to_cpu(tx_resp->u.status); 1963 u32 status = le32_to_cpu(tx_resp->u.status);
1964 int tid = MAX_TID_COUNT; 1964 int uninitialized_var(tid);
1965 int sta_id; 1965 int sta_id;
1966 int freed; 1966 int freed;
1967 u8 *qc = NULL; 1967 u8 *qc = NULL;
@@ -2008,7 +2008,7 @@ static void iwl4965_rx_reply_tx(struct iwl_priv *priv,
2008 IWL_DEBUG_TX_REPLY(priv, "Retry scheduler reclaim scd_ssn " 2008 IWL_DEBUG_TX_REPLY(priv, "Retry scheduler reclaim scd_ssn "
2009 "%d index %d\n", scd_ssn , index); 2009 "%d index %d\n", scd_ssn , index);
2010 freed = iwl_tx_queue_reclaim(priv, txq_id, index); 2010 freed = iwl_tx_queue_reclaim(priv, txq_id, index);
2011 priv->stations[sta_id].tid[tid].tfds_in_queue -= freed; 2011 iwl_free_tfds_in_queue(priv, sta_id, tid, freed);
2012 2012
2013 if (priv->mac80211_registered && 2013 if (priv->mac80211_registered &&
2014 (iwl_queue_space(&txq->q) > txq->q.low_mark) && 2014 (iwl_queue_space(&txq->q) > txq->q.low_mark) &&
diff --git a/drivers/net/wireless/iwlwifi/iwl-5000-hw.h b/drivers/net/wireless/iwlwifi/iwl-5000-hw.h
index 4ef6804a455a..bc056e9ab85f 100644
--- a/drivers/net/wireless/iwlwifi/iwl-5000-hw.h
+++ b/drivers/net/wireless/iwlwifi/iwl-5000-hw.h
@@ -92,11 +92,15 @@
92 92
93static inline s32 iwl_temp_calib_to_offset(struct iwl_priv *priv) 93static inline s32 iwl_temp_calib_to_offset(struct iwl_priv *priv)
94{ 94{
95 u16 *temp_calib = (u16 *)iwl_eeprom_query_addr(priv, 95 u16 temperature, voltage;
96 EEPROM_5000_TEMPERATURE); 96 __le16 *temp_calib =
97 /* offset = temperature - voltage / coef */ 97 (__le16 *)iwl_eeprom_query_addr(priv, EEPROM_5000_TEMPERATURE);
98 s32 offset = (s32)(temp_calib[0] - temp_calib[1] / IWL_5150_VOLTAGE_TO_TEMPERATURE_COEFF); 98
99 return offset; 99 temperature = le16_to_cpu(temp_calib[0]);
100 voltage = le16_to_cpu(temp_calib[1]);
101
102 /* offset = temp - volt / coeff */
103 return (s32)(temperature - voltage / IWL_5150_VOLTAGE_TO_TEMPERATURE_COEFF);
100} 104}
101 105
102/* Fixed (non-configurable) rx data from phy */ 106/* Fixed (non-configurable) rx data from phy */
diff --git a/drivers/net/wireless/iwlwifi/iwl-5000.c b/drivers/net/wireless/iwlwifi/iwl-5000.c
index e2f8615c8c9b..cffaae772d51 100644
--- a/drivers/net/wireless/iwlwifi/iwl-5000.c
+++ b/drivers/net/wireless/iwlwifi/iwl-5000.c
@@ -333,14 +333,15 @@ static void iwl5000_set_ct_threshold(struct iwl_priv *priv)
333static int iwl5000_set_Xtal_calib(struct iwl_priv *priv) 333static int iwl5000_set_Xtal_calib(struct iwl_priv *priv)
334{ 334{
335 struct iwl_calib_xtal_freq_cmd cmd; 335 struct iwl_calib_xtal_freq_cmd cmd;
336 u16 *xtal_calib = (u16 *)iwl_eeprom_query_addr(priv, EEPROM_5000_XTAL); 336 __le16 *xtal_calib =
337 (__le16 *)iwl_eeprom_query_addr(priv, EEPROM_5000_XTAL);
337 338
338 cmd.hdr.op_code = IWL_PHY_CALIBRATE_CRYSTAL_FRQ_CMD; 339 cmd.hdr.op_code = IWL_PHY_CALIBRATE_CRYSTAL_FRQ_CMD;
339 cmd.hdr.first_group = 0; 340 cmd.hdr.first_group = 0;
340 cmd.hdr.groups_num = 1; 341 cmd.hdr.groups_num = 1;
341 cmd.hdr.data_valid = 1; 342 cmd.hdr.data_valid = 1;
342 cmd.cap_pin1 = (u8)xtal_calib[0]; 343 cmd.cap_pin1 = le16_to_cpu(xtal_calib[0]);
343 cmd.cap_pin2 = (u8)xtal_calib[1]; 344 cmd.cap_pin2 = le16_to_cpu(xtal_calib[1]);
344 return iwl_calib_set(&priv->calib_results[IWL_CALIB_XTAL], 345 return iwl_calib_set(&priv->calib_results[IWL_CALIB_XTAL],
345 (u8 *)&cmd, sizeof(cmd)); 346 (u8 *)&cmd, sizeof(cmd));
346} 347}
@@ -1124,7 +1125,7 @@ static void iwl5000_rx_reply_tx(struct iwl_priv *priv,
1124 scd_ssn , index, txq_id, txq->swq_id); 1125 scd_ssn , index, txq_id, txq->swq_id);
1125 1126
1126 freed = iwl_tx_queue_reclaim(priv, txq_id, index); 1127 freed = iwl_tx_queue_reclaim(priv, txq_id, index);
1127 priv->stations[sta_id].tid[tid].tfds_in_queue -= freed; 1128 iwl_free_tfds_in_queue(priv, sta_id, tid, freed);
1128 1129
1129 if (priv->mac80211_registered && 1130 if (priv->mac80211_registered &&
1130 (iwl_queue_space(&txq->q) > txq->q.low_mark) && 1131 (iwl_queue_space(&txq->q) > txq->q.low_mark) &&
@@ -1152,16 +1153,14 @@ static void iwl5000_rx_reply_tx(struct iwl_priv *priv,
1152 tx_resp->failure_frame); 1153 tx_resp->failure_frame);
1153 1154
1154 freed = iwl_tx_queue_reclaim(priv, txq_id, index); 1155 freed = iwl_tx_queue_reclaim(priv, txq_id, index);
1155 if (ieee80211_is_data_qos(tx_resp->frame_ctrl)) 1156 iwl_free_tfds_in_queue(priv, sta_id, tid, freed);
1156 priv->stations[sta_id].tid[tid].tfds_in_queue -= freed;
1157 1157
1158 if (priv->mac80211_registered && 1158 if (priv->mac80211_registered &&
1159 (iwl_queue_space(&txq->q) > txq->q.low_mark)) 1159 (iwl_queue_space(&txq->q) > txq->q.low_mark))
1160 iwl_wake_queue(priv, txq_id); 1160 iwl_wake_queue(priv, txq_id);
1161 } 1161 }
1162 1162
1163 if (ieee80211_is_data_qos(tx_resp->frame_ctrl)) 1163 iwl_txq_check_empty(priv, sta_id, tid, txq_id);
1164 iwl_txq_check_empty(priv, sta_id, tid, txq_id);
1165 1164
1166 if (iwl_check_bits(status, TX_ABORT_REQUIRED_MSK)) 1165 if (iwl_check_bits(status, TX_ABORT_REQUIRED_MSK))
1167 IWL_ERR(priv, "TODO: Implement Tx ABORT REQUIRED!!!\n"); 1166 IWL_ERR(priv, "TODO: Implement Tx ABORT REQUIRED!!!\n");
@@ -1597,6 +1596,7 @@ struct iwl_cfg iwl5300_agn_cfg = {
1597 .use_bsm = false, 1596 .use_bsm = false,
1598 .ht_greenfield_support = true, 1597 .ht_greenfield_support = true,
1599 .led_compensation = 51, 1598 .led_compensation = 51,
1599 .use_rts_for_ht = true, /* use rts/cts protection */
1600 .chain_noise_num_beacons = IWL_CAL_NUM_BEACONS, 1600 .chain_noise_num_beacons = IWL_CAL_NUM_BEACONS,
1601 .sm_ps_mode = WLAN_HT_CAP_SM_PS_DISABLED, 1601 .sm_ps_mode = WLAN_HT_CAP_SM_PS_DISABLED,
1602}; 1602};
@@ -1621,6 +1621,7 @@ struct iwl_cfg iwl5100_bgn_cfg = {
1621 .use_bsm = false, 1621 .use_bsm = false,
1622 .ht_greenfield_support = true, 1622 .ht_greenfield_support = true,
1623 .led_compensation = 51, 1623 .led_compensation = 51,
1624 .use_rts_for_ht = true, /* use rts/cts protection */
1624 .chain_noise_num_beacons = IWL_CAL_NUM_BEACONS, 1625 .chain_noise_num_beacons = IWL_CAL_NUM_BEACONS,
1625}; 1626};
1626 1627
@@ -1666,6 +1667,7 @@ struct iwl_cfg iwl5100_agn_cfg = {
1666 .use_bsm = false, 1667 .use_bsm = false,
1667 .ht_greenfield_support = true, 1668 .ht_greenfield_support = true,
1668 .led_compensation = 51, 1669 .led_compensation = 51,
1670 .use_rts_for_ht = true, /* use rts/cts protection */
1669 .chain_noise_num_beacons = IWL_CAL_NUM_BEACONS, 1671 .chain_noise_num_beacons = IWL_CAL_NUM_BEACONS,
1670 .sm_ps_mode = WLAN_HT_CAP_SM_PS_DISABLED, 1672 .sm_ps_mode = WLAN_HT_CAP_SM_PS_DISABLED,
1671}; 1673};
@@ -1690,6 +1692,7 @@ struct iwl_cfg iwl5350_agn_cfg = {
1690 .use_bsm = false, 1692 .use_bsm = false,
1691 .ht_greenfield_support = true, 1693 .ht_greenfield_support = true,
1692 .led_compensation = 51, 1694 .led_compensation = 51,
1695 .use_rts_for_ht = true, /* use rts/cts protection */
1693 .chain_noise_num_beacons = IWL_CAL_NUM_BEACONS, 1696 .chain_noise_num_beacons = IWL_CAL_NUM_BEACONS,
1694 .sm_ps_mode = WLAN_HT_CAP_SM_PS_DISABLED, 1697 .sm_ps_mode = WLAN_HT_CAP_SM_PS_DISABLED,
1695}; 1698};
@@ -1714,6 +1717,7 @@ struct iwl_cfg iwl5150_agn_cfg = {
1714 .use_bsm = false, 1717 .use_bsm = false,
1715 .ht_greenfield_support = true, 1718 .ht_greenfield_support = true,
1716 .led_compensation = 51, 1719 .led_compensation = 51,
1720 .use_rts_for_ht = true, /* use rts/cts protection */
1717 .chain_noise_num_beacons = IWL_CAL_NUM_BEACONS, 1721 .chain_noise_num_beacons = IWL_CAL_NUM_BEACONS,
1718 .sm_ps_mode = WLAN_HT_CAP_SM_PS_DISABLED, 1722 .sm_ps_mode = WLAN_HT_CAP_SM_PS_DISABLED,
1719}; 1723};
diff --git a/drivers/net/wireless/iwlwifi/iwl-agn-rs.c b/drivers/net/wireless/iwlwifi/iwl-agn-rs.c
index fe511cbf012e..b93e49158196 100644
--- a/drivers/net/wireless/iwlwifi/iwl-agn-rs.c
+++ b/drivers/net/wireless/iwlwifi/iwl-agn-rs.c
@@ -150,7 +150,7 @@ static s32 expected_tpt_mimo3_40MHz[4][IWL_RATE_COUNT] = {
150}; 150};
151 151
152/* mbps, mcs */ 152/* mbps, mcs */
153const static struct iwl_rate_mcs_info iwl_rate_mcs[IWL_RATE_COUNT] = { 153static const struct iwl_rate_mcs_info iwl_rate_mcs[IWL_RATE_COUNT] = {
154 { "1", "BPSK DSSS"}, 154 { "1", "BPSK DSSS"},
155 { "2", "QPSK DSSS"}, 155 { "2", "QPSK DSSS"},
156 {"5.5", "BPSK CCK"}, 156 {"5.5", "BPSK CCK"},
diff --git a/drivers/net/wireless/iwlwifi/iwl-agn.c b/drivers/net/wireless/iwlwifi/iwl-agn.c
index b8377efb3ba7..1c9866daf815 100644
--- a/drivers/net/wireless/iwlwifi/iwl-agn.c
+++ b/drivers/net/wireless/iwlwifi/iwl-agn.c
@@ -1842,7 +1842,7 @@ void iwl_dump_nic_event_log(struct iwl_priv *priv, bool full_log)
1842 } 1842 }
1843 1843
1844#ifdef CONFIG_IWLWIFI_DEBUG 1844#ifdef CONFIG_IWLWIFI_DEBUG
1845 if (!(iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS)) 1845 if (!(iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS) && !full_log)
1846 size = (size > DEFAULT_DUMP_EVENT_LOG_ENTRIES) 1846 size = (size > DEFAULT_DUMP_EVENT_LOG_ENTRIES)
1847 ? DEFAULT_DUMP_EVENT_LOG_ENTRIES : size; 1847 ? DEFAULT_DUMP_EVENT_LOG_ENTRIES : size;
1848#else 1848#else
@@ -3173,7 +3173,6 @@ static int iwl_init_drv(struct iwl_priv *priv)
3173 3173
3174 priv->ibss_beacon = NULL; 3174 priv->ibss_beacon = NULL;
3175 3175
3176 spin_lock_init(&priv->lock);
3177 spin_lock_init(&priv->sta_lock); 3176 spin_lock_init(&priv->sta_lock);
3178 spin_lock_init(&priv->hcmd_lock); 3177 spin_lock_init(&priv->hcmd_lock);
3179 3178
@@ -3361,10 +3360,11 @@ static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
3361 (unsigned long long) pci_resource_len(pdev, 0)); 3360 (unsigned long long) pci_resource_len(pdev, 0));
3362 IWL_DEBUG_INFO(priv, "pci_resource_base = %p\n", priv->hw_base); 3361 IWL_DEBUG_INFO(priv, "pci_resource_base = %p\n", priv->hw_base);
3363 3362
3364 /* this spin lock will be used in apm_ops.init and EEPROM access 3363 /* these spin locks will be used in apm_ops.init and EEPROM access
3365 * we should init now 3364 * we should init now
3366 */ 3365 */
3367 spin_lock_init(&priv->reg_lock); 3366 spin_lock_init(&priv->reg_lock);
3367 spin_lock_init(&priv->lock);
3368 iwl_hw_detect(priv); 3368 iwl_hw_detect(priv);
3369 IWL_INFO(priv, "Detected Intel Wireless WiFi Link %s REV=0x%X\n", 3369 IWL_INFO(priv, "Detected Intel Wireless WiFi Link %s REV=0x%X\n",
3370 priv->cfg->name, priv->hw_rev); 3370 priv->cfg->name, priv->hw_rev);
diff --git a/drivers/net/wireless/iwlwifi/iwl-core.c b/drivers/net/wireless/iwlwifi/iwl-core.c
index 574d36658702..f36f804804fc 100644
--- a/drivers/net/wireless/iwlwifi/iwl-core.c
+++ b/drivers/net/wireless/iwlwifi/iwl-core.c
@@ -2344,6 +2344,21 @@ static void iwl_ht_conf(struct iwl_priv *priv,
2344 IWL_DEBUG_MAC80211(priv, "leave\n"); 2344 IWL_DEBUG_MAC80211(priv, "leave\n");
2345} 2345}
2346 2346
2347static inline void iwl_set_no_assoc(struct iwl_priv *priv)
2348{
2349 priv->assoc_id = 0;
2350 iwl_led_disassociate(priv);
2351 /*
2352 * inform the ucode that there is no longer an
2353 * association and that no more packets should be
2354 * sent
2355 */
2356 priv->staging_rxon.filter_flags &=
2357 ~RXON_FILTER_ASSOC_MSK;
2358 priv->staging_rxon.assoc_id = 0;
2359 iwlcore_commit_rxon(priv);
2360}
2361
2347#define IWL_DELAY_NEXT_SCAN_AFTER_ASSOC (HZ*6) 2362#define IWL_DELAY_NEXT_SCAN_AFTER_ASSOC (HZ*6)
2348void iwl_bss_info_changed(struct ieee80211_hw *hw, 2363void iwl_bss_info_changed(struct ieee80211_hw *hw,
2349 struct ieee80211_vif *vif, 2364 struct ieee80211_vif *vif,
@@ -2475,20 +2490,8 @@ void iwl_bss_info_changed(struct ieee80211_hw *hw,
2475 IWL_DELAY_NEXT_SCAN_AFTER_ASSOC; 2490 IWL_DELAY_NEXT_SCAN_AFTER_ASSOC;
2476 if (!iwl_is_rfkill(priv)) 2491 if (!iwl_is_rfkill(priv))
2477 priv->cfg->ops->lib->post_associate(priv); 2492 priv->cfg->ops->lib->post_associate(priv);
2478 } else { 2493 } else
2479 priv->assoc_id = 0; 2494 iwl_set_no_assoc(priv);
2480 iwl_led_disassociate(priv);
2481
2482 /*
2483 * inform the ucode that there is no longer an
2484 * association and that no more packets should be
2485 * send
2486 */
2487 priv->staging_rxon.filter_flags &=
2488 ~RXON_FILTER_ASSOC_MSK;
2489 priv->staging_rxon.assoc_id = 0;
2490 iwlcore_commit_rxon(priv);
2491 }
2492 } 2495 }
2493 2496
2494 if (changes && iwl_is_associated(priv) && priv->assoc_id) { 2497 if (changes && iwl_is_associated(priv) && priv->assoc_id) {
@@ -2503,12 +2506,14 @@ void iwl_bss_info_changed(struct ieee80211_hw *hw,
2503 } 2506 }
2504 } 2507 }
2505 2508
2506 if ((changes & BSS_CHANGED_BEACON_ENABLED) && 2509 if (changes & BSS_CHANGED_BEACON_ENABLED) {
2507 vif->bss_conf.enable_beacon) { 2510 if (vif->bss_conf.enable_beacon) {
2508 memcpy(priv->staging_rxon.bssid_addr, 2511 memcpy(priv->staging_rxon.bssid_addr,
2509 bss_conf->bssid, ETH_ALEN); 2512 bss_conf->bssid, ETH_ALEN);
2510 memcpy(priv->bssid, bss_conf->bssid, ETH_ALEN); 2513 memcpy(priv->bssid, bss_conf->bssid, ETH_ALEN);
2511 iwlcore_config_ap(priv); 2514 iwlcore_config_ap(priv);
2515 } else
2516 iwl_set_no_assoc(priv);
2512 } 2517 }
2513 2518
2514 mutex_unlock(&priv->mutex); 2519 mutex_unlock(&priv->mutex);
@@ -2740,6 +2745,7 @@ int iwl_mac_config(struct ieee80211_hw *hw, u32 changed)
2740 priv->staging_rxon.flags = 0; 2745 priv->staging_rxon.flags = 0;
2741 2746
2742 iwl_set_rxon_channel(priv, conf->channel); 2747 iwl_set_rxon_channel(priv, conf->channel);
2748 iwl_set_rxon_ht(priv, ht_conf);
2743 2749
2744 iwl_set_flags_for_band(priv, conf->channel->band); 2750 iwl_set_flags_for_band(priv, conf->channel->band);
2745 spin_unlock_irqrestore(&priv->lock, flags); 2751 spin_unlock_irqrestore(&priv->lock, flags);
diff --git a/drivers/net/wireless/iwlwifi/iwl-core.h b/drivers/net/wireless/iwlwifi/iwl-core.h
index 675b7df632fc..b69e972671b2 100644
--- a/drivers/net/wireless/iwlwifi/iwl-core.h
+++ b/drivers/net/wireless/iwlwifi/iwl-core.h
@@ -63,7 +63,7 @@
63#ifndef __iwl_core_h__ 63#ifndef __iwl_core_h__
64#define __iwl_core_h__ 64#define __iwl_core_h__
65 65
66#include <linux/utsrelease.h> 66#include <generated/utsrelease.h>
67 67
68/************************ 68/************************
69 * forward declarations * 69 * forward declarations *
@@ -446,6 +446,8 @@ void iwl_hw_txq_ctx_free(struct iwl_priv *priv);
446int iwl_hw_tx_queue_init(struct iwl_priv *priv, 446int iwl_hw_tx_queue_init(struct iwl_priv *priv,
447 struct iwl_tx_queue *txq); 447 struct iwl_tx_queue *txq);
448int iwl_txq_update_write_ptr(struct iwl_priv *priv, struct iwl_tx_queue *txq); 448int iwl_txq_update_write_ptr(struct iwl_priv *priv, struct iwl_tx_queue *txq);
449void iwl_free_tfds_in_queue(struct iwl_priv *priv,
450 int sta_id, int tid, int freed);
449int iwl_tx_queue_init(struct iwl_priv *priv, struct iwl_tx_queue *txq, 451int iwl_tx_queue_init(struct iwl_priv *priv, struct iwl_tx_queue *txq,
450 int slots_num, u32 txq_id); 452 int slots_num, u32 txq_id);
451void iwl_tx_queue_free(struct iwl_priv *priv, int txq_id); 453void iwl_tx_queue_free(struct iwl_priv *priv, int txq_id);
diff --git a/drivers/net/wireless/iwlwifi/iwl-csr.h b/drivers/net/wireless/iwlwifi/iwl-csr.h
index a7bfae01f19b..1ec8cb4d5eae 100644
--- a/drivers/net/wireless/iwlwifi/iwl-csr.h
+++ b/drivers/net/wireless/iwlwifi/iwl-csr.h
@@ -77,8 +77,7 @@
77 * The MAC (uCode processor, etc.) does not need to be powered up for accessing 77 * The MAC (uCode processor, etc.) does not need to be powered up for accessing
78 * the CSR registers. 78 * the CSR registers.
79 * 79 *
80 * NOTE: Newer devices using one-time-programmable (OTP) memory 80 * NOTE: Device does need to be awake in order to read this memory
81 * require device to be awake in order to read this memory
82 * via CSR_EEPROM and CSR_OTP registers 81 * via CSR_EEPROM and CSR_OTP registers
83 */ 82 */
84#define CSR_BASE (0x000) 83#define CSR_BASE (0x000)
@@ -111,9 +110,8 @@
111/* 110/*
112 * EEPROM and OTP (one-time-programmable) memory reads 111 * EEPROM and OTP (one-time-programmable) memory reads
113 * 112 *
114 * NOTE: For (newer) devices using OTP, device must be awake, initialized via 113 * NOTE: Device must be awake, initialized via apm_ops.init(),
115 * apm_ops.init() in order to read. Older devices (3945/4965/5000) 114 * in order to read.
116 * use EEPROM and do not require this.
117 */ 115 */
118#define CSR_EEPROM_REG (CSR_BASE+0x02c) 116#define CSR_EEPROM_REG (CSR_BASE+0x02c)
119#define CSR_EEPROM_GP (CSR_BASE+0x030) 117#define CSR_EEPROM_GP (CSR_BASE+0x030)
diff --git a/drivers/net/wireless/iwlwifi/iwl-dev.h b/drivers/net/wireless/iwlwifi/iwl-dev.h
index 2673e9a4db92..3822cf53e368 100644
--- a/drivers/net/wireless/iwlwifi/iwl-dev.h
+++ b/drivers/net/wireless/iwlwifi/iwl-dev.h
@@ -711,7 +711,7 @@ extern void iwl_txq_ctx_stop(struct iwl_priv *priv);
711extern int iwl_queue_space(const struct iwl_queue *q); 711extern int iwl_queue_space(const struct iwl_queue *q);
712static inline int iwl_queue_used(const struct iwl_queue *q, int i) 712static inline int iwl_queue_used(const struct iwl_queue *q, int i)
713{ 713{
714 return q->write_ptr > q->read_ptr ? 714 return q->write_ptr >= q->read_ptr ?
715 (i >= q->read_ptr && i < q->write_ptr) : 715 (i >= q->read_ptr && i < q->write_ptr) :
716 !(i < q->read_ptr && i >= q->write_ptr); 716 !(i < q->read_ptr && i >= q->write_ptr);
717} 717}
@@ -1168,7 +1168,7 @@ struct iwl_priv {
1168 u32 last_beacon_time; 1168 u32 last_beacon_time;
1169 u64 last_tsf; 1169 u64 last_tsf;
1170 1170
1171 /* eeprom */ 1171 /* eeprom -- this is in the card's little endian byte order */
1172 u8 *eeprom; 1172 u8 *eeprom;
1173 int nvm_device_type; 1173 int nvm_device_type;
1174 struct iwl_eeprom_calib_info *calib_info; 1174 struct iwl_eeprom_calib_info *calib_info;
@@ -1353,4 +1353,15 @@ static inline int is_channel_ibss(const struct iwl_channel_info *ch)
1353 return ((ch->flags & EEPROM_CHANNEL_IBSS)) ? 1 : 0; 1353 return ((ch->flags & EEPROM_CHANNEL_IBSS)) ? 1 : 0;
1354} 1354}
1355 1355
1356static inline void __iwl_free_pages(struct iwl_priv *priv, struct page *page)
1357{
1358 __free_pages(page, priv->hw_params.rx_page_order);
1359 priv->alloc_rxb_page--;
1360}
1361
1362static inline void iwl_free_pages(struct iwl_priv *priv, unsigned long page)
1363{
1364 free_pages(page, priv->hw_params.rx_page_order);
1365 priv->alloc_rxb_page--;
1366}
1356#endif /* __iwl_dev_h__ */ 1367#endif /* __iwl_dev_h__ */
diff --git a/drivers/net/wireless/iwlwifi/iwl-devtrace.c b/drivers/net/wireless/iwlwifi/iwl-devtrace.c
index e7d88d1da15d..83cc4e500a96 100644
--- a/drivers/net/wireless/iwlwifi/iwl-devtrace.c
+++ b/drivers/net/wireless/iwlwifi/iwl-devtrace.c
@@ -1,3 +1,29 @@
1/******************************************************************************
2 *
3 * Copyright(c) 2009 - 2010 Intel Corporation. All rights reserved.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
17 *
18 * The full GNU General Public License is included in this distribution in the
19 * file called LICENSE.
20 *
21 * Contact Information:
22 * Intel Linux Wireless <ilw@linux.intel.com>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
24 *
25 *****************************************************************************/
26
1#include <linux/module.h> 27#include <linux/module.h>
2 28
3/* sparse doesn't like tracepoint macros */ 29/* sparse doesn't like tracepoint macros */
diff --git a/drivers/net/wireless/iwlwifi/iwl-devtrace.h b/drivers/net/wireless/iwlwifi/iwl-devtrace.h
index 21361968ab7e..d9c7363b1bbb 100644
--- a/drivers/net/wireless/iwlwifi/iwl-devtrace.h
+++ b/drivers/net/wireless/iwlwifi/iwl-devtrace.h
@@ -1,3 +1,29 @@
1/******************************************************************************
2 *
3 * Copyright(c) 2009 - 2010 Intel Corporation. All rights reserved.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
17 *
18 * The full GNU General Public License is included in this distribution in the
19 * file called LICENSE.
20 *
21 * Contact Information:
22 * Intel Linux Wireless <ilw@linux.intel.com>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
24 *
25 *****************************************************************************/
26
1#if !defined(__IWLWIFI_DEVICE_TRACE) || defined(TRACE_HEADER_MULTI_READ) 27#if !defined(__IWLWIFI_DEVICE_TRACE) || defined(TRACE_HEADER_MULTI_READ)
2#define __IWLWIFI_DEVICE_TRACE 28#define __IWLWIFI_DEVICE_TRACE
3 29
diff --git a/drivers/net/wireless/iwlwifi/iwl-eeprom.c b/drivers/net/wireless/iwlwifi/iwl-eeprom.c
index 3946e5c03f81..4a30969689ff 100644
--- a/drivers/net/wireless/iwlwifi/iwl-eeprom.c
+++ b/drivers/net/wireless/iwlwifi/iwl-eeprom.c
@@ -370,7 +370,7 @@ static int iwl_init_otp_access(struct iwl_priv *priv)
370 return ret; 370 return ret;
371} 371}
372 372
373static int iwl_read_otp_word(struct iwl_priv *priv, u16 addr, u16 *eeprom_data) 373static int iwl_read_otp_word(struct iwl_priv *priv, u16 addr, __le16 *eeprom_data)
374{ 374{
375 int ret = 0; 375 int ret = 0;
376 u32 r; 376 u32 r;
@@ -404,7 +404,7 @@ static int iwl_read_otp_word(struct iwl_priv *priv, u16 addr, u16 *eeprom_data)
404 CSR_OTP_GP_REG_ECC_CORR_STATUS_MSK); 404 CSR_OTP_GP_REG_ECC_CORR_STATUS_MSK);
405 IWL_ERR(priv, "Correctable OTP ECC error, continue read\n"); 405 IWL_ERR(priv, "Correctable OTP ECC error, continue read\n");
406 } 406 }
407 *eeprom_data = le16_to_cpu((__force __le16)(r >> 16)); 407 *eeprom_data = cpu_to_le16(r >> 16);
408 return 0; 408 return 0;
409} 409}
410 410
@@ -413,7 +413,8 @@ static int iwl_read_otp_word(struct iwl_priv *priv, u16 addr, u16 *eeprom_data)
413 */ 413 */
414static bool iwl_is_otp_empty(struct iwl_priv *priv) 414static bool iwl_is_otp_empty(struct iwl_priv *priv)
415{ 415{
416 u16 next_link_addr = 0, link_value; 416 u16 next_link_addr = 0;
417 __le16 link_value;
417 bool is_empty = false; 418 bool is_empty = false;
418 419
419 /* locate the beginning of OTP link list */ 420 /* locate the beginning of OTP link list */
@@ -443,7 +444,8 @@ static bool iwl_is_otp_empty(struct iwl_priv *priv)
443static int iwl_find_otp_image(struct iwl_priv *priv, 444static int iwl_find_otp_image(struct iwl_priv *priv,
444 u16 *validblockaddr) 445 u16 *validblockaddr)
445{ 446{
446 u16 next_link_addr = 0, link_value = 0, valid_addr; 447 u16 next_link_addr = 0, valid_addr;
448 __le16 link_value = 0;
447 int usedblocks = 0; 449 int usedblocks = 0;
448 450
449 /* set addressing mode to absolute to traverse the link list */ 451 /* set addressing mode to absolute to traverse the link list */
@@ -463,7 +465,7 @@ static int iwl_find_otp_image(struct iwl_priv *priv,
463 * check for more block on the link list 465 * check for more block on the link list
464 */ 466 */
465 valid_addr = next_link_addr; 467 valid_addr = next_link_addr;
466 next_link_addr = link_value * sizeof(u16); 468 next_link_addr = le16_to_cpu(link_value) * sizeof(u16);
467 IWL_DEBUG_INFO(priv, "OTP blocks %d addr 0x%x\n", 469 IWL_DEBUG_INFO(priv, "OTP blocks %d addr 0x%x\n",
468 usedblocks, next_link_addr); 470 usedblocks, next_link_addr);
469 if (iwl_read_otp_word(priv, next_link_addr, &link_value)) 471 if (iwl_read_otp_word(priv, next_link_addr, &link_value))
@@ -497,7 +499,7 @@ static int iwl_find_otp_image(struct iwl_priv *priv,
497 */ 499 */
498int iwl_eeprom_init(struct iwl_priv *priv) 500int iwl_eeprom_init(struct iwl_priv *priv)
499{ 501{
500 u16 *e; 502 __le16 *e;
501 u32 gp = iwl_read32(priv, CSR_EEPROM_GP); 503 u32 gp = iwl_read32(priv, CSR_EEPROM_GP);
502 int sz; 504 int sz;
503 int ret; 505 int ret;
@@ -516,12 +518,9 @@ int iwl_eeprom_init(struct iwl_priv *priv)
516 ret = -ENOMEM; 518 ret = -ENOMEM;
517 goto alloc_err; 519 goto alloc_err;
518 } 520 }
519 e = (u16 *)priv->eeprom; 521 e = (__le16 *)priv->eeprom;
520 522
521 if (priv->nvm_device_type == NVM_DEVICE_TYPE_OTP) { 523 priv->cfg->ops->lib->apm_ops.init(priv);
522 /* OTP reads require powered-up chip */
523 priv->cfg->ops->lib->apm_ops.init(priv);
524 }
525 524
526 ret = priv->cfg->ops->lib->eeprom_ops.verify_signature(priv); 525 ret = priv->cfg->ops->lib->eeprom_ops.verify_signature(priv);
527 if (ret < 0) { 526 if (ret < 0) {
@@ -562,7 +561,7 @@ int iwl_eeprom_init(struct iwl_priv *priv)
562 } 561 }
563 for (addr = validblockaddr; addr < validblockaddr + sz; 562 for (addr = validblockaddr; addr < validblockaddr + sz;
564 addr += sizeof(u16)) { 563 addr += sizeof(u16)) {
565 u16 eeprom_data; 564 __le16 eeprom_data;
566 565
567 ret = iwl_read_otp_word(priv, addr, &eeprom_data); 566 ret = iwl_read_otp_word(priv, addr, &eeprom_data);
568 if (ret) 567 if (ret)
@@ -570,13 +569,6 @@ int iwl_eeprom_init(struct iwl_priv *priv)
570 e[cache_addr / 2] = eeprom_data; 569 e[cache_addr / 2] = eeprom_data;
571 cache_addr += sizeof(u16); 570 cache_addr += sizeof(u16);
572 } 571 }
573
574 /*
575 * Now that OTP reads are complete, reset chip to save
576 * power until we load uCode during "up".
577 */
578 priv->cfg->ops->lib->apm_ops.stop(priv);
579
580 } else { 572 } else {
581 /* eeprom is an array of 16bit values */ 573 /* eeprom is an array of 16bit values */
582 for (addr = 0; addr < sz; addr += sizeof(u16)) { 574 for (addr = 0; addr < sz; addr += sizeof(u16)) {
@@ -594,7 +586,7 @@ int iwl_eeprom_init(struct iwl_priv *priv)
594 goto done; 586 goto done;
595 } 587 }
596 r = _iwl_read_direct32(priv, CSR_EEPROM_REG); 588 r = _iwl_read_direct32(priv, CSR_EEPROM_REG);
597 e[addr / 2] = le16_to_cpu((__force __le16)(r >> 16)); 589 e[addr / 2] = cpu_to_le16(r >> 16);
598 } 590 }
599 } 591 }
600 ret = 0; 592 ret = 0;
@@ -603,6 +595,8 @@ done:
603err: 595err:
604 if (ret) 596 if (ret)
605 iwl_eeprom_free(priv); 597 iwl_eeprom_free(priv);
598 /* Reset chip to save power until we load uCode during "up". */
599 priv->cfg->ops->lib->apm_ops.stop(priv);
606alloc_err: 600alloc_err:
607 return ret; 601 return ret;
608} 602}
@@ -755,7 +749,8 @@ static int iwl_mod_ht40_chan_info(struct iwl_priv *priv,
755 ch_info->ht40_eeprom = *eeprom_ch; 749 ch_info->ht40_eeprom = *eeprom_ch;
756 ch_info->ht40_max_power_avg = eeprom_ch->max_power_avg; 750 ch_info->ht40_max_power_avg = eeprom_ch->max_power_avg;
757 ch_info->ht40_flags = eeprom_ch->flags; 751 ch_info->ht40_flags = eeprom_ch->flags;
758 ch_info->ht40_extension_channel &= ~clear_ht40_extension_channel; 752 if (eeprom_ch->flags & EEPROM_CHANNEL_VALID)
753 ch_info->ht40_extension_channel &= ~clear_ht40_extension_channel;
759 754
760 return 0; 755 return 0;
761} 756}
diff --git a/drivers/net/wireless/iwlwifi/iwl-eeprom.h b/drivers/net/wireless/iwlwifi/iwl-eeprom.h
index 5cd2b66bbe45..0cd9c02ee044 100644
--- a/drivers/net/wireless/iwlwifi/iwl-eeprom.h
+++ b/drivers/net/wireless/iwlwifi/iwl-eeprom.h
@@ -137,7 +137,7 @@ struct iwl_eeprom_channel {
137 * 137 *
138 */ 138 */
139struct iwl_eeprom_enhanced_txpwr { 139struct iwl_eeprom_enhanced_txpwr {
140 u16 common; 140 __le16 common;
141 s8 chain_a_max; 141 s8 chain_a_max;
142 s8 chain_b_max; 142 s8 chain_b_max;
143 s8 chain_c_max; 143 s8 chain_c_max;
@@ -360,7 +360,7 @@ struct iwl_eeprom_calib_subband_info {
360struct iwl_eeprom_calib_info { 360struct iwl_eeprom_calib_info {
361 u8 saturation_power24; /* half-dBm (e.g. "34" = 17 dBm) */ 361 u8 saturation_power24; /* half-dBm (e.g. "34" = 17 dBm) */
362 u8 saturation_power52; /* half-dBm */ 362 u8 saturation_power52; /* half-dBm */
363 s16 voltage; /* signed */ 363 __le16 voltage; /* signed */
364 struct iwl_eeprom_calib_subband_info 364 struct iwl_eeprom_calib_subband_info
365 band_info[EEPROM_TX_POWER_BANDS]; 365 band_info[EEPROM_TX_POWER_BANDS];
366} __attribute__ ((packed)); 366} __attribute__ ((packed));
diff --git a/drivers/net/wireless/iwlwifi/iwl-hcmd.c b/drivers/net/wireless/iwlwifi/iwl-hcmd.c
index a23165948202..30e9ea6d54ec 100644
--- a/drivers/net/wireless/iwlwifi/iwl-hcmd.c
+++ b/drivers/net/wireless/iwlwifi/iwl-hcmd.c
@@ -234,7 +234,7 @@ cancel:
234 } 234 }
235fail: 235fail:
236 if (cmd->reply_page) { 236 if (cmd->reply_page) {
237 free_pages(cmd->reply_page, priv->hw_params.rx_page_order); 237 iwl_free_pages(priv, cmd->reply_page);
238 cmd->reply_page = 0; 238 cmd->reply_page = 0;
239 } 239 }
240out: 240out:
diff --git a/drivers/net/wireless/iwlwifi/iwl-rx.c b/drivers/net/wireless/iwlwifi/iwl-rx.c
index 6090bc15a6d5..2dbce85404aa 100644
--- a/drivers/net/wireless/iwlwifi/iwl-rx.c
+++ b/drivers/net/wireless/iwlwifi/iwl-rx.c
@@ -345,10 +345,8 @@ void iwl_rx_queue_free(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
345 pci_unmap_page(priv->pci_dev, rxq->pool[i].page_dma, 345 pci_unmap_page(priv->pci_dev, rxq->pool[i].page_dma,
346 PAGE_SIZE << priv->hw_params.rx_page_order, 346 PAGE_SIZE << priv->hw_params.rx_page_order,
347 PCI_DMA_FROMDEVICE); 347 PCI_DMA_FROMDEVICE);
348 __free_pages(rxq->pool[i].page, 348 __iwl_free_pages(priv, rxq->pool[i].page);
349 priv->hw_params.rx_page_order);
350 rxq->pool[i].page = NULL; 349 rxq->pool[i].page = NULL;
351 priv->alloc_rxb_page--;
352 } 350 }
353 } 351 }
354 352
@@ -416,9 +414,7 @@ void iwl_rx_queue_reset(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
416 pci_unmap_page(priv->pci_dev, rxq->pool[i].page_dma, 414 pci_unmap_page(priv->pci_dev, rxq->pool[i].page_dma,
417 PAGE_SIZE << priv->hw_params.rx_page_order, 415 PAGE_SIZE << priv->hw_params.rx_page_order,
418 PCI_DMA_FROMDEVICE); 416 PCI_DMA_FROMDEVICE);
419 priv->alloc_rxb_page--; 417 __iwl_free_pages(priv, rxq->pool[i].page);
420 __free_pages(rxq->pool[i].page,
421 priv->hw_params.rx_page_order);
422 rxq->pool[i].page = NULL; 418 rxq->pool[i].page = NULL;
423 } 419 }
424 list_add_tail(&rxq->pool[i].list, &rxq->rx_used); 420 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
@@ -654,47 +650,6 @@ void iwl_reply_statistics(struct iwl_priv *priv,
654} 650}
655EXPORT_SYMBOL(iwl_reply_statistics); 651EXPORT_SYMBOL(iwl_reply_statistics);
656 652
657#define PERFECT_RSSI (-20) /* dBm */
658#define WORST_RSSI (-95) /* dBm */
659#define RSSI_RANGE (PERFECT_RSSI - WORST_RSSI)
660
661/* Calculate an indication of rx signal quality (a percentage, not dBm!).
662 * See http://www.ces.clemson.edu/linux/signal_quality.shtml for info
663 * about formulas used below. */
664static int iwl_calc_sig_qual(int rssi_dbm, int noise_dbm)
665{
666 int sig_qual;
667 int degradation = PERFECT_RSSI - rssi_dbm;
668
669 /* If we get a noise measurement, use signal-to-noise ratio (SNR)
670 * as indicator; formula is (signal dbm - noise dbm).
671 * SNR at or above 40 is a great signal (100%).
672 * Below that, scale to fit SNR of 0 - 40 dB within 0 - 100% indicator.
673 * Weakest usable signal is usually 10 - 15 dB SNR. */
674 if (noise_dbm) {
675 if (rssi_dbm - noise_dbm >= 40)
676 return 100;
677 else if (rssi_dbm < noise_dbm)
678 return 0;
679 sig_qual = ((rssi_dbm - noise_dbm) * 5) / 2;
680
681 /* Else use just the signal level.
682 * This formula is a least squares fit of data points collected and
683 * compared with a reference system that had a percentage (%) display
684 * for signal quality. */
685 } else
686 sig_qual = (100 * (RSSI_RANGE * RSSI_RANGE) - degradation *
687 (15 * RSSI_RANGE + 62 * degradation)) /
688 (RSSI_RANGE * RSSI_RANGE);
689
690 if (sig_qual > 100)
691 sig_qual = 100;
692 else if (sig_qual < 1)
693 sig_qual = 0;
694
695 return sig_qual;
696}
697
698/* Calc max signal level (dBm) among 3 possible receivers */ 653/* Calc max signal level (dBm) among 3 possible receivers */
699static inline int iwl_calc_rssi(struct iwl_priv *priv, 654static inline int iwl_calc_rssi(struct iwl_priv *priv,
700 struct iwl_rx_phy_res *rx_resp) 655 struct iwl_rx_phy_res *rx_resp)
@@ -973,7 +928,10 @@ static void iwl_pass_packet_to_mac80211(struct iwl_priv *priv,
973 if (ieee80211_is_mgmt(fc) || 928 if (ieee80211_is_mgmt(fc) ||
974 ieee80211_has_protected(fc) || 929 ieee80211_has_protected(fc) ||
975 ieee80211_has_morefrags(fc) || 930 ieee80211_has_morefrags(fc) ||
976 le16_to_cpu(hdr->seq_ctrl) & IEEE80211_SCTL_FRAG) 931 le16_to_cpu(hdr->seq_ctrl) & IEEE80211_SCTL_FRAG ||
932 (ieee80211_is_data_qos(fc) &&
933 *ieee80211_get_qos_ctl(hdr) &
934 IEEE80211_QOS_CONTROL_A_MSDU_PRESENT))
977 ret = skb_linearize(skb); 935 ret = skb_linearize(skb);
978 else 936 else
979 ret = __pskb_pull_tail(skb, min_t(u16, IWL_LINK_HDR_MAX, len)) ? 937 ret = __pskb_pull_tail(skb, min_t(u16, IWL_LINK_HDR_MAX, len)) ?
@@ -1105,11 +1063,8 @@ void iwl_rx_reply_rx(struct iwl_priv *priv,
1105 if (iwl_is_associated(priv) && 1063 if (iwl_is_associated(priv) &&
1106 !test_bit(STATUS_SCANNING, &priv->status)) { 1064 !test_bit(STATUS_SCANNING, &priv->status)) {
1107 rx_status.noise = priv->last_rx_noise; 1065 rx_status.noise = priv->last_rx_noise;
1108 rx_status.qual = iwl_calc_sig_qual(rx_status.signal,
1109 rx_status.noise);
1110 } else { 1066 } else {
1111 rx_status.noise = IWL_NOISE_MEAS_NOT_AVAILABLE; 1067 rx_status.noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
1112 rx_status.qual = iwl_calc_sig_qual(rx_status.signal, 0);
1113 } 1068 }
1114 1069
1115 /* Reset beacon noise level if not associated. */ 1070 /* Reset beacon noise level if not associated. */
@@ -1122,8 +1077,8 @@ void iwl_rx_reply_rx(struct iwl_priv *priv,
1122 iwl_dbg_report_frame(priv, phy_res, len, header, 1); 1077 iwl_dbg_report_frame(priv, phy_res, len, header, 1);
1123#endif 1078#endif
1124 iwl_dbg_log_rx_data_frame(priv, len, header); 1079 iwl_dbg_log_rx_data_frame(priv, len, header);
1125 IWL_DEBUG_STATS_LIMIT(priv, "Rssi %d, noise %d, qual %d, TSF %llu\n", 1080 IWL_DEBUG_STATS_LIMIT(priv, "Rssi %d, noise %d, TSF %llu\n",
1126 rx_status.signal, rx_status.noise, rx_status.qual, 1081 rx_status.signal, rx_status.noise,
1127 (unsigned long long)rx_status.mactime); 1082 (unsigned long long)rx_status.mactime);
1128 1083
1129 /* 1084 /*
diff --git a/drivers/net/wireless/iwlwifi/iwl-scan.c b/drivers/net/wireless/iwlwifi/iwl-scan.c
index a2b2b8315ff9..fa1c89ba6459 100644
--- a/drivers/net/wireless/iwlwifi/iwl-scan.c
+++ b/drivers/net/wireless/iwlwifi/iwl-scan.c
@@ -144,8 +144,7 @@ static int iwl_send_scan_abort(struct iwl_priv *priv)
144 clear_bit(STATUS_SCAN_HW, &priv->status); 144 clear_bit(STATUS_SCAN_HW, &priv->status);
145 } 145 }
146 146
147 priv->alloc_rxb_page--; 147 iwl_free_pages(priv, cmd.reply_page);
148 free_pages(cmd.reply_page, priv->hw_params.rx_page_order);
149 148
150 return ret; 149 return ret;
151} 150}
diff --git a/drivers/net/wireless/iwlwifi/iwl-sta.c b/drivers/net/wireless/iwlwifi/iwl-sta.c
index cd6a6901216e..90fbdb25399e 100644
--- a/drivers/net/wireless/iwlwifi/iwl-sta.c
+++ b/drivers/net/wireless/iwlwifi/iwl-sta.c
@@ -164,9 +164,7 @@ int iwl_send_add_sta(struct iwl_priv *priv,
164 break; 164 break;
165 } 165 }
166 } 166 }
167 167 iwl_free_pages(priv, cmd.reply_page);
168 priv->alloc_rxb_page--;
169 free_pages(cmd.reply_page, priv->hw_params.rx_page_order);
170 168
171 return ret; 169 return ret;
172} 170}
@@ -299,7 +297,7 @@ u8 iwl_add_station(struct iwl_priv *priv, const u8 *addr, bool is_ap, u8 flags,
299} 297}
300EXPORT_SYMBOL(iwl_add_station); 298EXPORT_SYMBOL(iwl_add_station);
301 299
302static void iwl_sta_ucode_deactivate(struct iwl_priv *priv, const char *addr) 300static void iwl_sta_ucode_deactivate(struct iwl_priv *priv, const u8 *addr)
303{ 301{
304 unsigned long flags; 302 unsigned long flags;
305 u8 sta_id = iwl_find_station(priv, addr); 303 u8 sta_id = iwl_find_station(priv, addr);
@@ -326,7 +324,7 @@ static void iwl_remove_sta_callback(struct iwl_priv *priv,
326{ 324{
327 struct iwl_rem_sta_cmd *rm_sta = 325 struct iwl_rem_sta_cmd *rm_sta =
328 (struct iwl_rem_sta_cmd *)cmd->cmd.payload; 326 (struct iwl_rem_sta_cmd *)cmd->cmd.payload;
329 const char *addr = rm_sta->addr; 327 const u8 *addr = rm_sta->addr;
330 328
331 if (pkt->hdr.flags & IWL_CMD_FAILED_MSK) { 329 if (pkt->hdr.flags & IWL_CMD_FAILED_MSK) {
332 IWL_ERR(priv, "Bad return from REPLY_REMOVE_STA (0x%08X)\n", 330 IWL_ERR(priv, "Bad return from REPLY_REMOVE_STA (0x%08X)\n",
@@ -391,9 +389,7 @@ static int iwl_send_remove_station(struct iwl_priv *priv, const u8 *addr,
391 break; 389 break;
392 } 390 }
393 } 391 }
394 392 iwl_free_pages(priv, cmd.reply_page);
395 priv->alloc_rxb_page--;
396 free_pages(cmd.reply_page, priv->hw_params.rx_page_order);
397 393
398 return ret; 394 return ret;
399} 395}
diff --git a/drivers/net/wireless/iwlwifi/iwl-tx.c b/drivers/net/wireless/iwlwifi/iwl-tx.c
index 00da5e152d46..8f4071562857 100644
--- a/drivers/net/wireless/iwlwifi/iwl-tx.c
+++ b/drivers/net/wireless/iwlwifi/iwl-tx.c
@@ -120,6 +120,20 @@ int iwl_txq_update_write_ptr(struct iwl_priv *priv, struct iwl_tx_queue *txq)
120EXPORT_SYMBOL(iwl_txq_update_write_ptr); 120EXPORT_SYMBOL(iwl_txq_update_write_ptr);
121 121
122 122
123void iwl_free_tfds_in_queue(struct iwl_priv *priv,
124 int sta_id, int tid, int freed)
125{
126 if (priv->stations[sta_id].tid[tid].tfds_in_queue >= freed)
127 priv->stations[sta_id].tid[tid].tfds_in_queue -= freed;
128 else {
129 IWL_ERR(priv, "free more than tfds_in_queue (%u:%d)\n",
130 priv->stations[sta_id].tid[tid].tfds_in_queue,
131 freed);
132 priv->stations[sta_id].tid[tid].tfds_in_queue = 0;
133 }
134}
135EXPORT_SYMBOL(iwl_free_tfds_in_queue);
136
123/** 137/**
124 * iwl_tx_queue_free - Deallocate DMA queue. 138 * iwl_tx_queue_free - Deallocate DMA queue.
125 * @txq: Transmit queue to deallocate. 139 * @txq: Transmit queue to deallocate.
@@ -407,13 +421,14 @@ void iwl_hw_txq_ctx_free(struct iwl_priv *priv)
407 int txq_id; 421 int txq_id;
408 422
409 /* Tx queues */ 423 /* Tx queues */
410 if (priv->txq) 424 if (priv->txq) {
411 for (txq_id = 0; txq_id < priv->hw_params.max_txq_num; 425 for (txq_id = 0; txq_id < priv->hw_params.max_txq_num;
412 txq_id++) 426 txq_id++)
413 if (txq_id == IWL_CMD_QUEUE_NUM) 427 if (txq_id == IWL_CMD_QUEUE_NUM)
414 iwl_cmd_queue_free(priv); 428 iwl_cmd_queue_free(priv);
415 else 429 else
416 iwl_tx_queue_free(priv, txq_id); 430 iwl_tx_queue_free(priv, txq_id);
431 }
417 iwl_free_dma_ptr(priv, &priv->kw); 432 iwl_free_dma_ptr(priv, &priv->kw);
418 433
419 iwl_free_dma_ptr(priv, &priv->scd_bc_tbls); 434 iwl_free_dma_ptr(priv, &priv->scd_bc_tbls);
@@ -1130,6 +1145,7 @@ int iwl_tx_queue_reclaim(struct iwl_priv *priv, int txq_id, int index)
1130 struct iwl_queue *q = &txq->q; 1145 struct iwl_queue *q = &txq->q;
1131 struct iwl_tx_info *tx_info; 1146 struct iwl_tx_info *tx_info;
1132 int nfreed = 0; 1147 int nfreed = 0;
1148 struct ieee80211_hdr *hdr;
1133 1149
1134 if ((index >= q->n_bd) || (iwl_queue_used(q, index) == 0)) { 1150 if ((index >= q->n_bd) || (iwl_queue_used(q, index) == 0)) {
1135 IWL_ERR(priv, "Read index for DMA queue txq id (%d), index %d, " 1151 IWL_ERR(priv, "Read index for DMA queue txq id (%d), index %d, "
@@ -1144,13 +1160,16 @@ int iwl_tx_queue_reclaim(struct iwl_priv *priv, int txq_id, int index)
1144 1160
1145 tx_info = &txq->txb[txq->q.read_ptr]; 1161 tx_info = &txq->txb[txq->q.read_ptr];
1146 iwl_tx_status(priv, tx_info->skb[0]); 1162 iwl_tx_status(priv, tx_info->skb[0]);
1163
1164 hdr = (struct ieee80211_hdr *)tx_info->skb[0]->data;
1165 if (hdr && ieee80211_is_data_qos(hdr->frame_control))
1166 nfreed++;
1147 tx_info->skb[0] = NULL; 1167 tx_info->skb[0] = NULL;
1148 1168
1149 if (priv->cfg->ops->lib->txq_inval_byte_cnt_tbl) 1169 if (priv->cfg->ops->lib->txq_inval_byte_cnt_tbl)
1150 priv->cfg->ops->lib->txq_inval_byte_cnt_tbl(priv, txq); 1170 priv->cfg->ops->lib->txq_inval_byte_cnt_tbl(priv, txq);
1151 1171
1152 priv->cfg->ops->lib->txq_free_tfd(priv, txq); 1172 priv->cfg->ops->lib->txq_free_tfd(priv, txq);
1153 nfreed++;
1154 } 1173 }
1155 return nfreed; 1174 return nfreed;
1156} 1175}
@@ -1558,7 +1577,7 @@ void iwl_rx_reply_compressed_ba(struct iwl_priv *priv,
1558 if (txq->q.read_ptr != (ba_resp_scd_ssn & 0xff)) { 1577 if (txq->q.read_ptr != (ba_resp_scd_ssn & 0xff)) {
1559 /* calculate mac80211 ampdu sw queue to wake */ 1578 /* calculate mac80211 ampdu sw queue to wake */
1560 int freed = iwl_tx_queue_reclaim(priv, scd_flow, index); 1579 int freed = iwl_tx_queue_reclaim(priv, scd_flow, index);
1561 priv->stations[sta_id].tid[tid].tfds_in_queue -= freed; 1580 iwl_free_tfds_in_queue(priv, sta_id, tid, freed);
1562 1581
1563 if ((iwl_queue_space(&txq->q) > txq->q.low_mark) && 1582 if ((iwl_queue_space(&txq->q) > txq->q.low_mark) &&
1564 priv->mac80211_registered && 1583 priv->mac80211_registered &&
diff --git a/drivers/net/wireless/iwlwifi/iwl3945-base.c b/drivers/net/wireless/iwlwifi/iwl3945-base.c
index 2a28a1f8b1fe..f8e4e4b18d02 100644
--- a/drivers/net/wireless/iwlwifi/iwl3945-base.c
+++ b/drivers/net/wireless/iwlwifi/iwl3945-base.c
@@ -548,6 +548,9 @@ static int iwl3945_tx_skb(struct iwl_priv *priv, struct sk_buff *skb)
548 txq = &priv->txq[txq_id]; 548 txq = &priv->txq[txq_id];
549 q = &txq->q; 549 q = &txq->q;
550 550
551 if ((iwl_queue_space(q) < q->high_mark))
552 goto drop;
553
551 spin_lock_irqsave(&priv->lock, flags); 554 spin_lock_irqsave(&priv->lock, flags);
552 555
553 idx = get_cmd_index(q, q->write_ptr, 0); 556 idx = get_cmd_index(q, q->write_ptr, 0);
@@ -812,7 +815,7 @@ static int iwl3945_get_measurement(struct iwl_priv *priv,
812 break; 815 break;
813 } 816 }
814 817
815 free_pages(cmd.reply_page, priv->hw_params.rx_page_order); 818 iwl_free_pages(priv, cmd.reply_page);
816 819
817 return rc; 820 return rc;
818} 821}
@@ -1198,9 +1201,7 @@ void iwl3945_rx_queue_reset(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
1198 pci_unmap_page(priv->pci_dev, rxq->pool[i].page_dma, 1201 pci_unmap_page(priv->pci_dev, rxq->pool[i].page_dma,
1199 PAGE_SIZE << priv->hw_params.rx_page_order, 1202 PAGE_SIZE << priv->hw_params.rx_page_order,
1200 PCI_DMA_FROMDEVICE); 1203 PCI_DMA_FROMDEVICE);
1201 priv->alloc_rxb_page--; 1204 __iwl_free_pages(priv, rxq->pool[i].page);
1202 __free_pages(rxq->pool[i].page,
1203 priv->hw_params.rx_page_order);
1204 rxq->pool[i].page = NULL; 1205 rxq->pool[i].page = NULL;
1205 } 1206 }
1206 list_add_tail(&rxq->pool[i].list, &rxq->rx_used); 1207 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
@@ -1247,10 +1248,8 @@ static void iwl3945_rx_queue_free(struct iwl_priv *priv, struct iwl_rx_queue *rx
1247 pci_unmap_page(priv->pci_dev, rxq->pool[i].page_dma, 1248 pci_unmap_page(priv->pci_dev, rxq->pool[i].page_dma,
1248 PAGE_SIZE << priv->hw_params.rx_page_order, 1249 PAGE_SIZE << priv->hw_params.rx_page_order,
1249 PCI_DMA_FROMDEVICE); 1250 PCI_DMA_FROMDEVICE);
1250 __free_pages(rxq->pool[i].page, 1251 __iwl_free_pages(priv, rxq->pool[i].page);
1251 priv->hw_params.rx_page_order);
1252 rxq->pool[i].page = NULL; 1252 rxq->pool[i].page = NULL;
1253 priv->alloc_rxb_page--;
1254 } 1253 }
1255 } 1254 }
1256 1255
@@ -1300,47 +1299,6 @@ int iwl3945_calc_db_from_ratio(int sig_ratio)
1300 return (int)ratio2dB[sig_ratio]; 1299 return (int)ratio2dB[sig_ratio];
1301} 1300}
1302 1301
1303#define PERFECT_RSSI (-20) /* dBm */
1304#define WORST_RSSI (-95) /* dBm */
1305#define RSSI_RANGE (PERFECT_RSSI - WORST_RSSI)
1306
1307/* Calculate an indication of rx signal quality (a percentage, not dBm!).
1308 * See http://www.ces.clemson.edu/linux/signal_quality.shtml for info
1309 * about formulas used below. */
1310int iwl3945_calc_sig_qual(int rssi_dbm, int noise_dbm)
1311{
1312 int sig_qual;
1313 int degradation = PERFECT_RSSI - rssi_dbm;
1314
1315 /* If we get a noise measurement, use signal-to-noise ratio (SNR)
1316 * as indicator; formula is (signal dbm - noise dbm).
1317 * SNR at or above 40 is a great signal (100%).
1318 * Below that, scale to fit SNR of 0 - 40 dB within 0 - 100% indicator.
1319 * Weakest usable signal is usually 10 - 15 dB SNR. */
1320 if (noise_dbm) {
1321 if (rssi_dbm - noise_dbm >= 40)
1322 return 100;
1323 else if (rssi_dbm < noise_dbm)
1324 return 0;
1325 sig_qual = ((rssi_dbm - noise_dbm) * 5) / 2;
1326
1327 /* Else use just the signal level.
1328 * This formula is a least squares fit of data points collected and
1329 * compared with a reference system that had a percentage (%) display
1330 * for signal quality. */
1331 } else
1332 sig_qual = (100 * (RSSI_RANGE * RSSI_RANGE) - degradation *
1333 (15 * RSSI_RANGE + 62 * degradation)) /
1334 (RSSI_RANGE * RSSI_RANGE);
1335
1336 if (sig_qual > 100)
1337 sig_qual = 100;
1338 else if (sig_qual < 1)
1339 sig_qual = 0;
1340
1341 return sig_qual;
1342}
1343
1344/** 1302/**
1345 * iwl3945_rx_handle - Main entry function for receiving responses from uCode 1303 * iwl3945_rx_handle - Main entry function for receiving responses from uCode
1346 * 1304 *
@@ -1688,7 +1646,7 @@ void iwl3945_dump_nic_event_log(struct iwl_priv *priv, bool full_log)
1688 } 1646 }
1689 1647
1690#ifdef CONFIG_IWLWIFI_DEBUG 1648#ifdef CONFIG_IWLWIFI_DEBUG
1691 if (!(iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS)) 1649 if (!(iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS) && !full_log)
1692 size = (size > DEFAULT_IWL3945_DUMP_EVENT_LOG_ENTRIES) 1650 size = (size > DEFAULT_IWL3945_DUMP_EVENT_LOG_ENTRIES)
1693 ? DEFAULT_IWL3945_DUMP_EVENT_LOG_ENTRIES : size; 1651 ? DEFAULT_IWL3945_DUMP_EVENT_LOG_ENTRIES : size;
1694#else 1652#else
@@ -3867,7 +3825,6 @@ static int iwl3945_init_drv(struct iwl_priv *priv)
3867 priv->retry_rate = 1; 3825 priv->retry_rate = 1;
3868 priv->ibss_beacon = NULL; 3826 priv->ibss_beacon = NULL;
3869 3827
3870 spin_lock_init(&priv->lock);
3871 spin_lock_init(&priv->sta_lock); 3828 spin_lock_init(&priv->sta_lock);
3872 spin_lock_init(&priv->hcmd_lock); 3829 spin_lock_init(&priv->hcmd_lock);
3873 3830
@@ -3936,9 +3893,11 @@ static int iwl3945_setup_mac(struct iwl_priv *priv)
3936 /* Tell mac80211 our characteristics */ 3893 /* Tell mac80211 our characteristics */
3937 hw->flags = IEEE80211_HW_SIGNAL_DBM | 3894 hw->flags = IEEE80211_HW_SIGNAL_DBM |
3938 IEEE80211_HW_NOISE_DBM | 3895 IEEE80211_HW_NOISE_DBM |
3939 IEEE80211_HW_SPECTRUM_MGMT | 3896 IEEE80211_HW_SPECTRUM_MGMT;
3940 IEEE80211_HW_SUPPORTS_PS | 3897
3941 IEEE80211_HW_SUPPORTS_DYNAMIC_PS; 3898 if (!priv->cfg->broken_powersave)
3899 hw->flags |= IEEE80211_HW_SUPPORTS_PS |
3900 IEEE80211_HW_SUPPORTS_DYNAMIC_PS;
3942 3901
3943 hw->wiphy->interface_modes = 3902 hw->wiphy->interface_modes =
3944 BIT(NL80211_IFTYPE_STATION) | 3903 BIT(NL80211_IFTYPE_STATION) |
@@ -4057,10 +4016,11 @@ static int iwl3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *e
4057 * PCI Tx retries from interfering with C3 CPU state */ 4016 * PCI Tx retries from interfering with C3 CPU state */
4058 pci_write_config_byte(pdev, 0x41, 0x00); 4017 pci_write_config_byte(pdev, 0x41, 0x00);
4059 4018
4060 /* this spin lock will be used in apm_ops.init and EEPROM access 4019 /* these spin locks will be used in apm_ops.init and EEPROM access
4061 * we should init now 4020 * we should init now
4062 */ 4021 */
4063 spin_lock_init(&priv->reg_lock); 4022 spin_lock_init(&priv->reg_lock);
4023 spin_lock_init(&priv->lock);
4064 4024
4065 /*********************** 4025 /***********************
4066 * 4. Read EEPROM 4026 * 4. Read EEPROM
diff --git a/drivers/net/wireless/iwmc3200wifi/commands.c b/drivers/net/wireless/iwmc3200wifi/commands.c
index 777584d76a88..1e41ad0fcad5 100644
--- a/drivers/net/wireless/iwmc3200wifi/commands.c
+++ b/drivers/net/wireless/iwmc3200wifi/commands.c
@@ -973,6 +973,10 @@ int iwm_send_pmkid_update(struct iwm_priv *iwm,
973 973
974 memset(&update, 0, sizeof(struct iwm_umac_pmkid_update)); 974 memset(&update, 0, sizeof(struct iwm_umac_pmkid_update));
975 975
976 update.hdr.oid = UMAC_WIFI_IF_CMD_PMKID_UPDATE;
977 update.hdr.buf_size = cpu_to_le16(sizeof(struct iwm_umac_pmkid_update) -
978 sizeof(struct iwm_umac_wifi_if));
979
976 update.command = cpu_to_le32(command); 980 update.command = cpu_to_le32(command);
977 if (pmksa->bssid) 981 if (pmksa->bssid)
978 memcpy(&update.bssid, pmksa->bssid, ETH_ALEN); 982 memcpy(&update.bssid, pmksa->bssid, ETH_ALEN);
diff --git a/drivers/net/wireless/iwmc3200wifi/commands.h b/drivers/net/wireless/iwmc3200wifi/commands.h
index 06af0552cd75..3dfd9f0e9003 100644
--- a/drivers/net/wireless/iwmc3200wifi/commands.h
+++ b/drivers/net/wireless/iwmc3200wifi/commands.h
@@ -463,6 +463,7 @@ struct iwm_umac_cmd_stop_resume_tx {
463#define IWM_CMD_PMKID_FLUSH 3 463#define IWM_CMD_PMKID_FLUSH 3
464 464
465struct iwm_umac_pmkid_update { 465struct iwm_umac_pmkid_update {
466 struct iwm_umac_wifi_if hdr;
466 __le32 command; 467 __le32 command;
467 u8 bssid[ETH_ALEN]; 468 u8 bssid[ETH_ALEN];
468 __le16 reserved; 469 __le16 reserved;
diff --git a/drivers/net/wireless/iwmc3200wifi/iwm.h b/drivers/net/wireless/iwmc3200wifi/iwm.h
index 5a26bb05a33a..842811142bef 100644
--- a/drivers/net/wireless/iwmc3200wifi/iwm.h
+++ b/drivers/net/wireless/iwmc3200wifi/iwm.h
@@ -268,7 +268,7 @@ struct iwm_priv {
268 268
269 struct sk_buff_head rx_list; 269 struct sk_buff_head rx_list;
270 struct list_head rx_tickets; 270 struct list_head rx_tickets;
271 struct list_head rx_packets[IWM_RX_ID_HASH]; 271 struct list_head rx_packets[IWM_RX_ID_HASH + 1];
272 struct workqueue_struct *rx_wq; 272 struct workqueue_struct *rx_wq;
273 struct work_struct rx_worker; 273 struct work_struct rx_worker;
274 274
@@ -349,7 +349,7 @@ int iwm_up(struct iwm_priv *iwm);
349int iwm_down(struct iwm_priv *iwm); 349int iwm_down(struct iwm_priv *iwm);
350 350
351/* TX API */ 351/* TX API */
352u16 iwm_tid_to_queue(u16 tid); 352int iwm_tid_to_queue(u16 tid);
353void iwm_tx_credit_inc(struct iwm_priv *iwm, int id, int total_freed_pages); 353void iwm_tx_credit_inc(struct iwm_priv *iwm, int id, int total_freed_pages);
354void iwm_tx_worker(struct work_struct *work); 354void iwm_tx_worker(struct work_struct *work);
355int iwm_xmit_frame(struct sk_buff *skb, struct net_device *netdev); 355int iwm_xmit_frame(struct sk_buff *skb, struct net_device *netdev);
diff --git a/drivers/net/wireless/iwmc3200wifi/netdev.c b/drivers/net/wireless/iwmc3200wifi/netdev.c
index e4f0f8705f65..c4c0d23c63ec 100644
--- a/drivers/net/wireless/iwmc3200wifi/netdev.c
+++ b/drivers/net/wireless/iwmc3200wifi/netdev.c
@@ -76,7 +76,7 @@ static int iwm_stop(struct net_device *ndev)
76 */ 76 */
77static const u16 iwm_1d_to_queue[8] = { 1, 0, 0, 1, 2, 2, 3, 3 }; 77static const u16 iwm_1d_to_queue[8] = { 1, 0, 0, 1, 2, 2, 3, 3 };
78 78
79u16 iwm_tid_to_queue(u16 tid) 79int iwm_tid_to_queue(u16 tid)
80{ 80{
81 if (tid > IWM_UMAC_TID_NR - 2) 81 if (tid > IWM_UMAC_TID_NR - 2)
82 return -EINVAL; 82 return -EINVAL;
diff --git a/drivers/net/wireless/iwmc3200wifi/rx.c b/drivers/net/wireless/iwmc3200wifi/rx.c
index 1c57c1f72cba..f727b4a83196 100644
--- a/drivers/net/wireless/iwmc3200wifi/rx.c
+++ b/drivers/net/wireless/iwmc3200wifi/rx.c
@@ -794,7 +794,7 @@ static int iwm_mlme_update_bss_table(struct iwm_priv *iwm, u8 *buf,
794 } 794 }
795 795
796 bss->bss = kzalloc(bss_len, GFP_KERNEL); 796 bss->bss = kzalloc(bss_len, GFP_KERNEL);
797 if (!bss) { 797 if (!bss->bss) {
798 kfree(bss); 798 kfree(bss);
799 IWM_ERR(iwm, "Couldn't allocate bss\n"); 799 IWM_ERR(iwm, "Couldn't allocate bss\n");
800 return -ENOMEM; 800 return -ENOMEM;
@@ -1126,7 +1126,7 @@ static int iwm_ntf_stop_resume_tx(struct iwm_priv *iwm, u8 *buf,
1126 1126
1127 if (!stop) { 1127 if (!stop) {
1128 struct iwm_tx_queue *txq; 1128 struct iwm_tx_queue *txq;
1129 u16 queue = iwm_tid_to_queue(bit); 1129 int queue = iwm_tid_to_queue(bit);
1130 1130
1131 if (queue < 0) 1131 if (queue < 0)
1132 continue; 1132 continue;
diff --git a/drivers/net/wireless/libertas/cmd.c b/drivers/net/wireless/libertas/cmd.c
index b9b371bfa30f..42611bea76a3 100644
--- a/drivers/net/wireless/libertas/cmd.c
+++ b/drivers/net/wireless/libertas/cmd.c
@@ -1365,7 +1365,7 @@ static void lbs_send_confirmsleep(struct lbs_private *priv)
1365 priv->dnld_sent = DNLD_RES_RECEIVED; 1365 priv->dnld_sent = DNLD_RES_RECEIVED;
1366 1366
1367 /* If nothing to do, go back to sleep (?) */ 1367 /* If nothing to do, go back to sleep (?) */
1368 if (!__kfifo_len(priv->event_fifo) && !priv->resp_len[priv->resp_idx]) 1368 if (!kfifo_len(&priv->event_fifo) && !priv->resp_len[priv->resp_idx])
1369 priv->psstate = PS_STATE_SLEEP; 1369 priv->psstate = PS_STATE_SLEEP;
1370 1370
1371 spin_unlock_irqrestore(&priv->driver_lock, flags); 1371 spin_unlock_irqrestore(&priv->driver_lock, flags);
@@ -1439,7 +1439,7 @@ void lbs_ps_confirm_sleep(struct lbs_private *priv)
1439 } 1439 }
1440 1440
1441 /* Pending events or command responses? */ 1441 /* Pending events or command responses? */
1442 if (__kfifo_len(priv->event_fifo) || priv->resp_len[priv->resp_idx]) { 1442 if (kfifo_len(&priv->event_fifo) || priv->resp_len[priv->resp_idx]) {
1443 allowed = 0; 1443 allowed = 0;
1444 lbs_deb_host("pending events or command responses\n"); 1444 lbs_deb_host("pending events or command responses\n");
1445 } 1445 }
diff --git a/drivers/net/wireless/libertas/dev.h b/drivers/net/wireless/libertas/dev.h
index 6a8d2b291d8c..05bb298dfae9 100644
--- a/drivers/net/wireless/libertas/dev.h
+++ b/drivers/net/wireless/libertas/dev.h
@@ -10,7 +10,7 @@
10#include "scan.h" 10#include "scan.h"
11#include "assoc.h" 11#include "assoc.h"
12 12
13 13#include <linux/kfifo.h>
14 14
15/** sleep_params */ 15/** sleep_params */
16struct sleep_params { 16struct sleep_params {
@@ -120,7 +120,7 @@ struct lbs_private {
120 u32 resp_len[2]; 120 u32 resp_len[2];
121 121
122 /* Events sent from hardware to driver */ 122 /* Events sent from hardware to driver */
123 struct kfifo *event_fifo; 123 struct kfifo event_fifo;
124 124
125 /** thread to service interrupts */ 125 /** thread to service interrupts */
126 struct task_struct *main_thread; 126 struct task_struct *main_thread;
diff --git a/drivers/net/wireless/libertas/main.c b/drivers/net/wireless/libertas/main.c
index db38a5a719fa..c2975c8e2f21 100644
--- a/drivers/net/wireless/libertas/main.c
+++ b/drivers/net/wireless/libertas/main.c
@@ -459,7 +459,7 @@ static int lbs_thread(void *data)
459 else if (!list_empty(&priv->cmdpendingq) && 459 else if (!list_empty(&priv->cmdpendingq) &&
460 !(priv->wakeup_dev_required)) 460 !(priv->wakeup_dev_required))
461 shouldsleep = 0; /* We have a command to send */ 461 shouldsleep = 0; /* We have a command to send */
462 else if (__kfifo_len(priv->event_fifo)) 462 else if (kfifo_len(&priv->event_fifo))
463 shouldsleep = 0; /* We have an event to process */ 463 shouldsleep = 0; /* We have an event to process */
464 else 464 else
465 shouldsleep = 1; /* No command */ 465 shouldsleep = 1; /* No command */
@@ -511,10 +511,13 @@ static int lbs_thread(void *data)
511 511
512 /* Process hardware events, e.g. card removed, link lost */ 512 /* Process hardware events, e.g. card removed, link lost */
513 spin_lock_irq(&priv->driver_lock); 513 spin_lock_irq(&priv->driver_lock);
514 while (__kfifo_len(priv->event_fifo)) { 514 while (kfifo_len(&priv->event_fifo)) {
515 u32 event; 515 u32 event;
516 __kfifo_get(priv->event_fifo, (unsigned char *) &event, 516
517 sizeof(event)); 517 if (kfifo_out(&priv->event_fifo,
518 (unsigned char *) &event, sizeof(event)) !=
519 sizeof(event))
520 break;
518 spin_unlock_irq(&priv->driver_lock); 521 spin_unlock_irq(&priv->driver_lock);
519 lbs_process_event(priv, event); 522 lbs_process_event(priv, event);
520 spin_lock_irq(&priv->driver_lock); 523 spin_lock_irq(&priv->driver_lock);
@@ -883,10 +886,9 @@ static int lbs_init_adapter(struct lbs_private *priv)
883 priv->resp_len[0] = priv->resp_len[1] = 0; 886 priv->resp_len[0] = priv->resp_len[1] = 0;
884 887
885 /* Create the event FIFO */ 888 /* Create the event FIFO */
886 priv->event_fifo = kfifo_alloc(sizeof(u32) * 16, GFP_KERNEL, NULL); 889 ret = kfifo_alloc(&priv->event_fifo, sizeof(u32) * 16, GFP_KERNEL);
887 if (IS_ERR(priv->event_fifo)) { 890 if (ret) {
888 lbs_pr_err("Out of memory allocating event FIFO buffer\n"); 891 lbs_pr_err("Out of memory allocating event FIFO buffer\n");
889 ret = -ENOMEM;
890 goto out; 892 goto out;
891 } 893 }
892 894
@@ -901,8 +903,7 @@ static void lbs_free_adapter(struct lbs_private *priv)
901 lbs_deb_enter(LBS_DEB_MAIN); 903 lbs_deb_enter(LBS_DEB_MAIN);
902 904
903 lbs_free_cmd_buffer(priv); 905 lbs_free_cmd_buffer(priv);
904 if (priv->event_fifo) 906 kfifo_free(&priv->event_fifo);
905 kfifo_free(priv->event_fifo);
906 del_timer(&priv->command_timer); 907 del_timer(&priv->command_timer);
907 del_timer(&priv->auto_deepsleep_timer); 908 del_timer(&priv->auto_deepsleep_timer);
908 kfree(priv->networks); 909 kfree(priv->networks);
@@ -1177,7 +1178,7 @@ void lbs_queue_event(struct lbs_private *priv, u32 event)
1177 if (priv->psstate == PS_STATE_SLEEP) 1178 if (priv->psstate == PS_STATE_SLEEP)
1178 priv->psstate = PS_STATE_AWAKE; 1179 priv->psstate = PS_STATE_AWAKE;
1179 1180
1180 __kfifo_put(priv->event_fifo, (unsigned char *) &event, sizeof(u32)); 1181 kfifo_in(&priv->event_fifo, (unsigned char *) &event, sizeof(u32));
1181 1182
1182 wake_up_interruptible(&priv->waitq); 1183 wake_up_interruptible(&priv->waitq);
1183 1184
diff --git a/drivers/net/wireless/libertas/mesh.c b/drivers/net/wireless/libertas/mesh.c
index 2f91c9b808af..92b7a357a5e4 100644
--- a/drivers/net/wireless/libertas/mesh.c
+++ b/drivers/net/wireless/libertas/mesh.c
@@ -2,6 +2,7 @@
2#include <linux/delay.h> 2#include <linux/delay.h>
3#include <linux/etherdevice.h> 3#include <linux/etherdevice.h>
4#include <linux/netdevice.h> 4#include <linux/netdevice.h>
5#include <linux/if_ether.h>
5#include <linux/if_arp.h> 6#include <linux/if_arp.h>
6#include <linux/kthread.h> 7#include <linux/kthread.h>
7#include <linux/kfifo.h> 8#include <linux/kfifo.h>
@@ -351,8 +352,7 @@ int lbs_add_mesh(struct lbs_private *priv)
351 352
352 mesh_dev->netdev_ops = &mesh_netdev_ops; 353 mesh_dev->netdev_ops = &mesh_netdev_ops;
353 mesh_dev->ethtool_ops = &lbs_ethtool_ops; 354 mesh_dev->ethtool_ops = &lbs_ethtool_ops;
354 memcpy(mesh_dev->dev_addr, priv->dev->dev_addr, 355 memcpy(mesh_dev->dev_addr, priv->dev->dev_addr, ETH_ALEN);
355 sizeof(priv->dev->dev_addr));
356 356
357 SET_NETDEV_DEV(priv->mesh_dev, priv->dev->dev.parent); 357 SET_NETDEV_DEV(priv->mesh_dev, priv->dev->dev.parent);
358 358
diff --git a/drivers/net/wireless/libertas/scan.c b/drivers/net/wireless/libertas/scan.c
index c6a6c042b82f..b0b1c7841500 100644
--- a/drivers/net/wireless/libertas/scan.c
+++ b/drivers/net/wireless/libertas/scan.c
@@ -567,11 +567,8 @@ int lbs_scan_networks(struct lbs_private *priv, int full_scan)
567 chan_count = lbs_scan_create_channel_list(priv, chan_list); 567 chan_count = lbs_scan_create_channel_list(priv, chan_list);
568 568
569 netif_stop_queue(priv->dev); 569 netif_stop_queue(priv->dev);
570 netif_carrier_off(priv->dev); 570 if (priv->mesh_dev)
571 if (priv->mesh_dev) {
572 netif_stop_queue(priv->mesh_dev); 571 netif_stop_queue(priv->mesh_dev);
573 netif_carrier_off(priv->mesh_dev);
574 }
575 572
576 /* Prepare to continue an interrupted scan */ 573 /* Prepare to continue an interrupted scan */
577 lbs_deb_scan("chan_count %d, scan_channel %d\n", 574 lbs_deb_scan("chan_count %d, scan_channel %d\n",
@@ -635,16 +632,13 @@ out2:
635 priv->scan_channel = 0; 632 priv->scan_channel = 0;
636 633
637out: 634out:
638 if (priv->connect_status == LBS_CONNECTED) { 635 if (priv->connect_status == LBS_CONNECTED && !priv->tx_pending_len)
639 netif_carrier_on(priv->dev); 636 netif_wake_queue(priv->dev);
640 if (!priv->tx_pending_len) 637
641 netif_wake_queue(priv->dev); 638 if (priv->mesh_dev && (priv->mesh_connect_status == LBS_CONNECTED) &&
642 } 639 !priv->tx_pending_len)
643 if (priv->mesh_dev && (priv->mesh_connect_status == LBS_CONNECTED)) { 640 netif_wake_queue(priv->mesh_dev);
644 netif_carrier_on(priv->mesh_dev); 641
645 if (!priv->tx_pending_len)
646 netif_wake_queue(priv->mesh_dev);
647 }
648 kfree(chan_list); 642 kfree(chan_list);
649 643
650 lbs_deb_leave_args(LBS_DEB_SCAN, "ret %d", ret); 644 lbs_deb_leave_args(LBS_DEB_SCAN, "ret %d", ret);
diff --git a/drivers/net/wireless/libertas/wext.c b/drivers/net/wireless/libertas/wext.c
index a8eb9e1fcf36..4b1aab593a84 100644
--- a/drivers/net/wireless/libertas/wext.c
+++ b/drivers/net/wireless/libertas/wext.c
@@ -2025,10 +2025,8 @@ static int lbs_get_essid(struct net_device *dev, struct iw_request_info *info,
2025 if (priv->connect_status == LBS_CONNECTED) { 2025 if (priv->connect_status == LBS_CONNECTED) {
2026 memcpy(extra, priv->curbssparams.ssid, 2026 memcpy(extra, priv->curbssparams.ssid,
2027 priv->curbssparams.ssid_len); 2027 priv->curbssparams.ssid_len);
2028 extra[priv->curbssparams.ssid_len] = '\0';
2029 } else { 2028 } else {
2030 memset(extra, 0, 32); 2029 memset(extra, 0, 32);
2031 extra[priv->curbssparams.ssid_len] = '\0';
2032 } 2030 }
2033 /* 2031 /*
2034 * If none, we may want to get the one that was set 2032 * If none, we may want to get the one that was set
diff --git a/drivers/net/wireless/libertas_tf/main.c b/drivers/net/wireless/libertas_tf/main.c
index 019431d2f8a9..26a1abd5bb03 100644
--- a/drivers/net/wireless/libertas_tf/main.c
+++ b/drivers/net/wireless/libertas_tf/main.c
@@ -495,7 +495,6 @@ int lbtf_rx(struct lbtf_private *priv, struct sk_buff *skb)
495 stats.band = IEEE80211_BAND_2GHZ; 495 stats.band = IEEE80211_BAND_2GHZ;
496 stats.signal = prxpd->snr; 496 stats.signal = prxpd->snr;
497 stats.noise = prxpd->nf; 497 stats.noise = prxpd->nf;
498 stats.qual = prxpd->snr - prxpd->nf;
499 /* Marvell rate index has a hole at value 4 */ 498 /* Marvell rate index has a hole at value 4 */
500 if (prxpd->rx_rate > 4) 499 if (prxpd->rx_rate > 4)
501 --prxpd->rx_rate; 500 --prxpd->rx_rate;
diff --git a/drivers/net/wireless/mwl8k.c b/drivers/net/wireless/mwl8k.c
index 59d49159cf2a..59f92105b0c2 100644
--- a/drivers/net/wireless/mwl8k.c
+++ b/drivers/net/wireless/mwl8k.c
@@ -3157,8 +3157,10 @@ static void mwl8k_configure_filter(struct ieee80211_hw *hw,
3157 /* Clear unsupported feature flags */ 3157 /* Clear unsupported feature flags */
3158 *total_flags &= FIF_ALLMULTI | FIF_BCN_PRBRESP_PROMISC; 3158 *total_flags &= FIF_ALLMULTI | FIF_BCN_PRBRESP_PROMISC;
3159 3159
3160 if (mwl8k_fw_lock(hw)) 3160 if (mwl8k_fw_lock(hw)) {
3161 kfree(cmd);
3161 return; 3162 return;
3163 }
3162 3164
3163 if (priv->sniffer_enabled) { 3165 if (priv->sniffer_enabled) {
3164 mwl8k_enable_sniffer(hw, 0); 3166 mwl8k_enable_sniffer(hw, 0);
diff --git a/drivers/net/wireless/orinoco/wext.c b/drivers/net/wireless/orinoco/wext.c
index 7698fdd6a3a2..31ca241f7753 100644
--- a/drivers/net/wireless/orinoco/wext.c
+++ b/drivers/net/wireless/orinoco/wext.c
@@ -23,7 +23,7 @@
23#define MAX_RID_LEN 1024 23#define MAX_RID_LEN 1024
24 24
25/* Helper routine to record keys 25/* Helper routine to record keys
26 * Do not call from interrupt context */ 26 * It is called under orinoco_lock so it may not sleep */
27static int orinoco_set_key(struct orinoco_private *priv, int index, 27static int orinoco_set_key(struct orinoco_private *priv, int index,
28 enum orinoco_alg alg, const u8 *key, int key_len, 28 enum orinoco_alg alg, const u8 *key, int key_len,
29 const u8 *seq, int seq_len) 29 const u8 *seq, int seq_len)
@@ -32,14 +32,14 @@ static int orinoco_set_key(struct orinoco_private *priv, int index,
32 kzfree(priv->keys[index].seq); 32 kzfree(priv->keys[index].seq);
33 33
34 if (key_len) { 34 if (key_len) {
35 priv->keys[index].key = kzalloc(key_len, GFP_KERNEL); 35 priv->keys[index].key = kzalloc(key_len, GFP_ATOMIC);
36 if (!priv->keys[index].key) 36 if (!priv->keys[index].key)
37 goto nomem; 37 goto nomem;
38 } else 38 } else
39 priv->keys[index].key = NULL; 39 priv->keys[index].key = NULL;
40 40
41 if (seq_len) { 41 if (seq_len) {
42 priv->keys[index].seq = kzalloc(seq_len, GFP_KERNEL); 42 priv->keys[index].seq = kzalloc(seq_len, GFP_ATOMIC);
43 if (!priv->keys[index].seq) 43 if (!priv->keys[index].seq)
44 goto free_key; 44 goto free_key;
45 } else 45 } else
diff --git a/drivers/net/wireless/p54/p54pci.c b/drivers/net/wireless/p54/p54pci.c
index a15962a19b2a..a72f7c2577de 100644
--- a/drivers/net/wireless/p54/p54pci.c
+++ b/drivers/net/wireless/p54/p54pci.c
@@ -197,6 +197,14 @@ static void p54p_check_rx_ring(struct ieee80211_hw *dev, u32 *index,
197 i %= ring_limit; 197 i %= ring_limit;
198 continue; 198 continue;
199 } 199 }
200
201 if (unlikely(len > priv->common.rx_mtu)) {
202 if (net_ratelimit())
203 dev_err(&priv->pdev->dev, "rx'd frame size "
204 "exceeds length threshold.\n");
205
206 len = priv->common.rx_mtu;
207 }
200 skb_put(skb, len); 208 skb_put(skb, len);
201 209
202 if (p54_rx(dev, skb)) { 210 if (p54_rx(dev, skb)) {
diff --git a/drivers/net/wireless/rt2x00/rt2800.h b/drivers/net/wireless/rt2x00/rt2800.h
index c5fe867665e6..1a7eae357fef 100644
--- a/drivers/net/wireless/rt2x00/rt2800.h
+++ b/drivers/net/wireless/rt2x00/rt2800.h
@@ -1323,7 +1323,7 @@
1323#define PAIRWISE_KEY_ENTRY(__idx) \ 1323#define PAIRWISE_KEY_ENTRY(__idx) \
1324 ( PAIRWISE_KEY_TABLE_BASE + ((__idx) * sizeof(struct hw_key_entry)) ) 1324 ( PAIRWISE_KEY_TABLE_BASE + ((__idx) * sizeof(struct hw_key_entry)) )
1325#define MAC_IVEIV_ENTRY(__idx) \ 1325#define MAC_IVEIV_ENTRY(__idx) \
1326 ( MAC_IVEIV_TABLE_BASE + ((__idx) & sizeof(struct mac_iveiv_entry)) ) 1326 ( MAC_IVEIV_TABLE_BASE + ((__idx) * sizeof(struct mac_iveiv_entry)) )
1327#define MAC_WCID_ATTR_ENTRY(__idx) \ 1327#define MAC_WCID_ATTR_ENTRY(__idx) \
1328 ( MAC_WCID_ATTRIBUTE_BASE + ((__idx) * sizeof(u32)) ) 1328 ( MAC_WCID_ATTRIBUTE_BASE + ((__idx) * sizeof(u32)) )
1329#define SHARED_KEY_ENTRY(__idx) \ 1329#define SHARED_KEY_ENTRY(__idx) \
diff --git a/drivers/net/wireless/rt2x00/rt2800lib.c b/drivers/net/wireless/rt2x00/rt2800lib.c
index eb1e1d00bec3..9deae41cb784 100644
--- a/drivers/net/wireless/rt2x00/rt2800lib.c
+++ b/drivers/net/wireless/rt2x00/rt2800lib.c
@@ -37,7 +37,7 @@
37#include <linux/module.h> 37#include <linux/module.h>
38 38
39#include "rt2x00.h" 39#include "rt2x00.h"
40#ifdef CONFIG_RT2800USB 40#if defined(CONFIG_RT2800USB) || defined(CONFIG_RT2800USB_MODULE)
41#include "rt2x00usb.h" 41#include "rt2x00usb.h"
42#endif 42#endif
43#include "rt2800lib.h" 43#include "rt2800lib.h"
@@ -340,7 +340,7 @@ static int rt2800_blink_set(struct led_classdev *led_cdev,
340 rt2x00_set_field32(&reg, LED_CFG_OFF_PERIOD, *delay_off); 340 rt2x00_set_field32(&reg, LED_CFG_OFF_PERIOD, *delay_off);
341 rt2x00_set_field32(&reg, LED_CFG_SLOW_BLINK_PERIOD, 3); 341 rt2x00_set_field32(&reg, LED_CFG_SLOW_BLINK_PERIOD, 3);
342 rt2x00_set_field32(&reg, LED_CFG_R_LED_MODE, 3); 342 rt2x00_set_field32(&reg, LED_CFG_R_LED_MODE, 3);
343 rt2x00_set_field32(&reg, LED_CFG_G_LED_MODE, 12); 343 rt2x00_set_field32(&reg, LED_CFG_G_LED_MODE, 3);
344 rt2x00_set_field32(&reg, LED_CFG_Y_LED_MODE, 3); 344 rt2x00_set_field32(&reg, LED_CFG_Y_LED_MODE, 3);
345 rt2x00_set_field32(&reg, LED_CFG_LED_POLAR, 1); 345 rt2x00_set_field32(&reg, LED_CFG_LED_POLAR, 1);
346 rt2800_register_write(led->rt2x00dev, LED_CFG, reg); 346 rt2800_register_write(led->rt2x00dev, LED_CFG, reg);
@@ -1121,7 +1121,7 @@ int rt2800_init_registers(struct rt2x00_dev *rt2x00dev)
1121 1121
1122 if (rt2x00_intf_is_usb(rt2x00dev)) { 1122 if (rt2x00_intf_is_usb(rt2x00dev)) {
1123 rt2800_register_write(rt2x00dev, USB_DMA_CFG, 0x00000000); 1123 rt2800_register_write(rt2x00dev, USB_DMA_CFG, 0x00000000);
1124#ifdef CONFIG_RT2800USB 1124#if defined(CONFIG_RT2800USB) || defined(CONFIG_RT2800USB_MODULE)
1125 rt2x00usb_vendor_request_sw(rt2x00dev, USB_DEVICE_MODE, 0, 1125 rt2x00usb_vendor_request_sw(rt2x00dev, USB_DEVICE_MODE, 0,
1126 USB_MODE_RESET, REGISTER_TIMEOUT); 1126 USB_MODE_RESET, REGISTER_TIMEOUT);
1127#endif 1127#endif
@@ -2022,6 +2022,12 @@ int rt2800_probe_hw_mode(struct rt2x00_dev *rt2x00dev)
2022 u16 eeprom; 2022 u16 eeprom;
2023 2023
2024 /* 2024 /*
2025 * Disable powersaving as default on PCI devices.
2026 */
2027 if (rt2x00_intf_is_pci(rt2x00dev))
2028 rt2x00dev->hw->wiphy->flags &= ~WIPHY_FLAG_PS_ON_BY_DEFAULT;
2029
2030 /*
2025 * Initialize all hw fields. 2031 * Initialize all hw fields.
2026 */ 2032 */
2027 rt2x00dev->hw->flags = 2033 rt2x00dev->hw->flags =
@@ -2074,8 +2080,7 @@ int rt2800_probe_hw_mode(struct rt2x00_dev *rt2x00dev)
2074 IEEE80211_HT_CAP_SGI_20 | 2080 IEEE80211_HT_CAP_SGI_20 |
2075 IEEE80211_HT_CAP_SGI_40 | 2081 IEEE80211_HT_CAP_SGI_40 |
2076 IEEE80211_HT_CAP_TX_STBC | 2082 IEEE80211_HT_CAP_TX_STBC |
2077 IEEE80211_HT_CAP_RX_STBC | 2083 IEEE80211_HT_CAP_RX_STBC;
2078 IEEE80211_HT_CAP_PSMP_SUPPORT;
2079 spec->ht.ampdu_factor = 3; 2084 spec->ht.ampdu_factor = 3;
2080 spec->ht.ampdu_density = 4; 2085 spec->ht.ampdu_density = 4;
2081 spec->ht.mcs.tx_params = 2086 spec->ht.mcs.tx_params =
@@ -2140,8 +2145,8 @@ static void rt2800_get_tkip_seq(struct ieee80211_hw *hw, u8 hw_key_idx,
2140 rt2800_register_multiread(rt2x00dev, offset, 2145 rt2800_register_multiread(rt2x00dev, offset,
2141 &iveiv_entry, sizeof(iveiv_entry)); 2146 &iveiv_entry, sizeof(iveiv_entry));
2142 2147
2143 memcpy(&iveiv_entry.iv[0], iv16, sizeof(iv16)); 2148 memcpy(iv16, &iveiv_entry.iv[0], sizeof(*iv16));
2144 memcpy(&iveiv_entry.iv[4], iv32, sizeof(iv32)); 2149 memcpy(iv32, &iveiv_entry.iv[4], sizeof(*iv32));
2145} 2150}
2146 2151
2147static int rt2800_set_rts_threshold(struct ieee80211_hw *hw, u32 value) 2152static int rt2800_set_rts_threshold(struct ieee80211_hw *hw, u32 value)
diff --git a/drivers/net/wireless/rt2x00/rt2800usb.c b/drivers/net/wireless/rt2x00/rt2800usb.c
index af85d18cdbe7..ab95346cf6a3 100644
--- a/drivers/net/wireless/rt2x00/rt2800usb.c
+++ b/drivers/net/wireless/rt2x00/rt2800usb.c
@@ -922,6 +922,7 @@ static struct usb_device_id rt2800usb_device_table[] = {
922 { USB_DEVICE(0x1737, 0x0070), USB_DEVICE_DATA(&rt2800usb_ops) }, 922 { USB_DEVICE(0x1737, 0x0070), USB_DEVICE_DATA(&rt2800usb_ops) },
923 { USB_DEVICE(0x1737, 0x0071), USB_DEVICE_DATA(&rt2800usb_ops) }, 923 { USB_DEVICE(0x1737, 0x0071), USB_DEVICE_DATA(&rt2800usb_ops) },
924 { USB_DEVICE(0x1737, 0x0077), USB_DEVICE_DATA(&rt2800usb_ops) }, 924 { USB_DEVICE(0x1737, 0x0077), USB_DEVICE_DATA(&rt2800usb_ops) },
925 { USB_DEVICE(0x1737, 0x0079), USB_DEVICE_DATA(&rt2800usb_ops) },
925 /* Logitec */ 926 /* Logitec */
926 { USB_DEVICE(0x0789, 0x0162), USB_DEVICE_DATA(&rt2800usb_ops) }, 927 { USB_DEVICE(0x0789, 0x0162), USB_DEVICE_DATA(&rt2800usb_ops) },
927 { USB_DEVICE(0x0789, 0x0163), USB_DEVICE_DATA(&rt2800usb_ops) }, 928 { USB_DEVICE(0x0789, 0x0163), USB_DEVICE_DATA(&rt2800usb_ops) },
diff --git a/drivers/net/wireless/rt2x00/rt2x00.h b/drivers/net/wireless/rt2x00/rt2x00.h
index 4d841c07c970..dcfc8c25d1a7 100644
--- a/drivers/net/wireless/rt2x00/rt2x00.h
+++ b/drivers/net/wireless/rt2x00/rt2x00.h
@@ -113,6 +113,12 @@
113 ( ((unsigned long)((__skb)->data + (__header))) & 3 ) 113 ( ((unsigned long)((__skb)->data + (__header))) & 3 )
114 114
115/* 115/*
116 * Constants for extra TX headroom for alignment purposes.
117 */
118#define RT2X00_ALIGN_SIZE 4 /* Only whole frame needs alignment */
119#define RT2X00_L2PAD_SIZE 8 /* Both header & payload need alignment */
120
121/*
116 * Standard timing and size defines. 122 * Standard timing and size defines.
117 * These values should follow the ieee80211 specifications. 123 * These values should follow the ieee80211 specifications.
118 */ 124 */
diff --git a/drivers/net/wireless/rt2x00/rt2x00dev.c b/drivers/net/wireless/rt2x00/rt2x00dev.c
index 06c43ca39bf8..265e66dba552 100644
--- a/drivers/net/wireless/rt2x00/rt2x00dev.c
+++ b/drivers/net/wireless/rt2x00/rt2x00dev.c
@@ -686,7 +686,17 @@ static int rt2x00lib_probe_hw(struct rt2x00_dev *rt2x00dev)
686 /* 686 /*
687 * Initialize extra TX headroom required. 687 * Initialize extra TX headroom required.
688 */ 688 */
689 rt2x00dev->hw->extra_tx_headroom = rt2x00dev->ops->extra_tx_headroom; 689 rt2x00dev->hw->extra_tx_headroom =
690 max_t(unsigned int, IEEE80211_TX_STATUS_HEADROOM,
691 rt2x00dev->ops->extra_tx_headroom);
692
693 /*
694 * Take TX headroom required for alignment into account.
695 */
696 if (test_bit(DRIVER_REQUIRE_L2PAD, &rt2x00dev->flags))
697 rt2x00dev->hw->extra_tx_headroom += RT2X00_L2PAD_SIZE;
698 else if (test_bit(DRIVER_REQUIRE_DMA, &rt2x00dev->flags))
699 rt2x00dev->hw->extra_tx_headroom += RT2X00_ALIGN_SIZE;
690 700
691 /* 701 /*
692 * Register HW. 702 * Register HW.
diff --git a/drivers/net/wireless/rt2x00/rt2x00queue.c b/drivers/net/wireless/rt2x00/rt2x00queue.c
index 239afc7a9c0b..9915a09141ef 100644
--- a/drivers/net/wireless/rt2x00/rt2x00queue.c
+++ b/drivers/net/wireless/rt2x00/rt2x00queue.c
@@ -104,7 +104,7 @@ void rt2x00queue_map_txskb(struct rt2x00_dev *rt2x00dev, struct sk_buff *skb)
104 * is also mapped to the DMA so it can be used for transfering 104 * is also mapped to the DMA so it can be used for transfering
105 * additional descriptor information to the hardware. 105 * additional descriptor information to the hardware.
106 */ 106 */
107 skb_push(skb, rt2x00dev->hw->extra_tx_headroom); 107 skb_push(skb, rt2x00dev->ops->extra_tx_headroom);
108 108
109 skbdesc->skb_dma = 109 skbdesc->skb_dma =
110 dma_map_single(rt2x00dev->dev, skb->data, skb->len, DMA_TO_DEVICE); 110 dma_map_single(rt2x00dev->dev, skb->data, skb->len, DMA_TO_DEVICE);
@@ -112,7 +112,7 @@ void rt2x00queue_map_txskb(struct rt2x00_dev *rt2x00dev, struct sk_buff *skb)
112 /* 112 /*
113 * Restore data pointer to original location again. 113 * Restore data pointer to original location again.
114 */ 114 */
115 skb_pull(skb, rt2x00dev->hw->extra_tx_headroom); 115 skb_pull(skb, rt2x00dev->ops->extra_tx_headroom);
116 116
117 skbdesc->flags |= SKBDESC_DMA_MAPPED_TX; 117 skbdesc->flags |= SKBDESC_DMA_MAPPED_TX;
118} 118}
@@ -134,7 +134,7 @@ void rt2x00queue_unmap_skb(struct rt2x00_dev *rt2x00dev, struct sk_buff *skb)
134 * by the driver, but it was actually mapped to DMA. 134 * by the driver, but it was actually mapped to DMA.
135 */ 135 */
136 dma_unmap_single(rt2x00dev->dev, skbdesc->skb_dma, 136 dma_unmap_single(rt2x00dev->dev, skbdesc->skb_dma,
137 skb->len + rt2x00dev->hw->extra_tx_headroom, 137 skb->len + rt2x00dev->ops->extra_tx_headroom,
138 DMA_TO_DEVICE); 138 DMA_TO_DEVICE);
139 skbdesc->flags &= ~SKBDESC_DMA_MAPPED_TX; 139 skbdesc->flags &= ~SKBDESC_DMA_MAPPED_TX;
140 } 140 }
diff --git a/drivers/net/wireless/rt2x00/rt61pci.c b/drivers/net/wireless/rt2x00/rt61pci.c
index 687e17dc2e9f..0ca589306d71 100644
--- a/drivers/net/wireless/rt2x00/rt61pci.c
+++ b/drivers/net/wireless/rt2x00/rt61pci.c
@@ -2539,6 +2539,11 @@ static int rt61pci_probe_hw_mode(struct rt2x00_dev *rt2x00dev)
2539 unsigned int i; 2539 unsigned int i;
2540 2540
2541 /* 2541 /*
2542 * Disable powersaving as default.
2543 */
2544 rt2x00dev->hw->wiphy->flags &= ~WIPHY_FLAG_PS_ON_BY_DEFAULT;
2545
2546 /*
2542 * Initialize all hw fields. 2547 * Initialize all hw fields.
2543 */ 2548 */
2544 rt2x00dev->hw->flags = 2549 rt2x00dev->hw->flags =
diff --git a/drivers/net/wireless/rtl818x/rtl8180_dev.c b/drivers/net/wireless/rtl818x/rtl8180_dev.c
index a1a3dd15c664..8a40a1439984 100644
--- a/drivers/net/wireless/rtl818x/rtl8180_dev.c
+++ b/drivers/net/wireless/rtl818x/rtl8180_dev.c
@@ -132,7 +132,6 @@ static void rtl8180_handle_rx(struct ieee80211_hw *dev)
132 132
133 rx_status.antenna = (flags2 >> 15) & 1; 133 rx_status.antenna = (flags2 >> 15) & 1;
134 /* TODO: improve signal/rssi reporting */ 134 /* TODO: improve signal/rssi reporting */
135 rx_status.qual = flags2 & 0xFF;
136 rx_status.signal = (flags2 >> 8) & 0x7F; 135 rx_status.signal = (flags2 >> 8) & 0x7F;
137 /* XXX: is this correct? */ 136 /* XXX: is this correct? */
138 rx_status.rate_idx = (flags >> 20) & 0xF; 137 rx_status.rate_idx = (flags >> 20) & 0xF;
diff --git a/drivers/net/wireless/rtl818x/rtl8187_dev.c b/drivers/net/wireless/rtl818x/rtl8187_dev.c
index bc5726dd5fe4..7ba3052b0708 100644
--- a/drivers/net/wireless/rtl818x/rtl8187_dev.c
+++ b/drivers/net/wireless/rtl818x/rtl8187_dev.c
@@ -65,6 +65,7 @@ static struct usb_device_id rtl8187_table[] __devinitdata = {
65 /* Sitecom */ 65 /* Sitecom */
66 {USB_DEVICE(0x0df6, 0x000d), .driver_info = DEVICE_RTL8187}, 66 {USB_DEVICE(0x0df6, 0x000d), .driver_info = DEVICE_RTL8187},
67 {USB_DEVICE(0x0df6, 0x0028), .driver_info = DEVICE_RTL8187B}, 67 {USB_DEVICE(0x0df6, 0x0028), .driver_info = DEVICE_RTL8187B},
68 {USB_DEVICE(0x0df6, 0x0029), .driver_info = DEVICE_RTL8187B},
68 /* Sphairon Access Systems GmbH */ 69 /* Sphairon Access Systems GmbH */
69 {USB_DEVICE(0x114B, 0x0150), .driver_info = DEVICE_RTL8187}, 70 {USB_DEVICE(0x114B, 0x0150), .driver_info = DEVICE_RTL8187},
70 /* Dick Smith Electronics */ 71 /* Dick Smith Electronics */
diff --git a/drivers/net/wireless/wl12xx/wl1251_boot.c b/drivers/net/wireless/wl12xx/wl1251_boot.c
index 2e733e7bdfd4..28a808674080 100644
--- a/drivers/net/wireless/wl12xx/wl1251_boot.c
+++ b/drivers/net/wireless/wl12xx/wl1251_boot.c
@@ -256,7 +256,7 @@ int wl1251_boot_run_firmware(struct wl1251 *wl)
256 } 256 }
257 } 257 }
258 258
259 if (loop >= INIT_LOOP) { 259 if (loop > INIT_LOOP) {
260 wl1251_error("timeout waiting for the hardware to " 260 wl1251_error("timeout waiting for the hardware to "
261 "complete initialization"); 261 "complete initialization");
262 return -EIO; 262 return -EIO;
diff --git a/drivers/net/wireless/wl12xx/wl1271_cmd.c b/drivers/net/wireless/wl12xx/wl1271_cmd.c
index 886a9bc39cc1..c3385b3d246c 100644
--- a/drivers/net/wireless/wl12xx/wl1271_cmd.c
+++ b/drivers/net/wireless/wl12xx/wl1271_cmd.c
@@ -777,7 +777,7 @@ out:
777 return ret; 777 return ret;
778} 778}
779 779
780static int wl1271_build_basic_rates(char *rates, u8 band) 780static int wl1271_build_basic_rates(u8 *rates, u8 band)
781{ 781{
782 u8 index = 0; 782 u8 index = 0;
783 783
@@ -804,7 +804,7 @@ static int wl1271_build_basic_rates(char *rates, u8 band)
804 return index; 804 return index;
805} 805}
806 806
807static int wl1271_build_extended_rates(char *rates, u8 band) 807static int wl1271_build_extended_rates(u8 *rates, u8 band)
808{ 808{
809 u8 index = 0; 809 u8 index = 0;
810 810
diff --git a/drivers/net/wireless/zd1211rw/zd_chip.c b/drivers/net/wireless/zd1211rw/zd_chip.c
index dfa1b9bc22c8..7ca95c414fa8 100644
--- a/drivers/net/wireless/zd1211rw/zd_chip.c
+++ b/drivers/net/wireless/zd1211rw/zd_chip.c
@@ -1325,151 +1325,11 @@ int zd_chip_set_basic_rates(struct zd_chip *chip, u16 cr_rates)
1325 return r; 1325 return r;
1326} 1326}
1327 1327
1328static int ofdm_qual_db(u8 status_quality, u8 zd_rate, unsigned int size)
1329{
1330 static const u16 constants[] = {
1331 715, 655, 585, 540, 470, 410, 360, 315,
1332 270, 235, 205, 175, 150, 125, 105, 85,
1333 65, 50, 40, 25, 15
1334 };
1335
1336 int i;
1337 u32 x;
1338
1339 /* It seems that their quality parameter is somehow per signal
1340 * and is now transferred per bit.
1341 */
1342 switch (zd_rate) {
1343 case ZD_OFDM_RATE_6M:
1344 case ZD_OFDM_RATE_12M:
1345 case ZD_OFDM_RATE_24M:
1346 size *= 2;
1347 break;
1348 case ZD_OFDM_RATE_9M:
1349 case ZD_OFDM_RATE_18M:
1350 case ZD_OFDM_RATE_36M:
1351 case ZD_OFDM_RATE_54M:
1352 size *= 4;
1353 size /= 3;
1354 break;
1355 case ZD_OFDM_RATE_48M:
1356 size *= 3;
1357 size /= 2;
1358 break;
1359 default:
1360 return -EINVAL;
1361 }
1362
1363 x = (10000 * status_quality)/size;
1364 for (i = 0; i < ARRAY_SIZE(constants); i++) {
1365 if (x > constants[i])
1366 break;
1367 }
1368
1369 switch (zd_rate) {
1370 case ZD_OFDM_RATE_6M:
1371 case ZD_OFDM_RATE_9M:
1372 i += 3;
1373 break;
1374 case ZD_OFDM_RATE_12M:
1375 case ZD_OFDM_RATE_18M:
1376 i += 5;
1377 break;
1378 case ZD_OFDM_RATE_24M:
1379 case ZD_OFDM_RATE_36M:
1380 i += 9;
1381 break;
1382 case ZD_OFDM_RATE_48M:
1383 case ZD_OFDM_RATE_54M:
1384 i += 15;
1385 break;
1386 default:
1387 return -EINVAL;
1388 }
1389
1390 return i;
1391}
1392
1393static int ofdm_qual_percent(u8 status_quality, u8 zd_rate, unsigned int size)
1394{
1395 int r;
1396
1397 r = ofdm_qual_db(status_quality, zd_rate, size);
1398 ZD_ASSERT(r >= 0);
1399 if (r < 0)
1400 r = 0;
1401
1402 r = (r * 100)/29;
1403 return r <= 100 ? r : 100;
1404}
1405
1406static unsigned int log10times100(unsigned int x)
1407{
1408 static const u8 log10[] = {
1409 0,
1410 0, 30, 47, 60, 69, 77, 84, 90, 95, 100,
1411 104, 107, 111, 114, 117, 120, 123, 125, 127, 130,
1412 132, 134, 136, 138, 139, 141, 143, 144, 146, 147,
1413 149, 150, 151, 153, 154, 155, 156, 157, 159, 160,
1414 161, 162, 163, 164, 165, 166, 167, 168, 169, 169,
1415 170, 171, 172, 173, 174, 174, 175, 176, 177, 177,
1416 178, 179, 179, 180, 181, 181, 182, 183, 183, 184,
1417 185, 185, 186, 186, 187, 188, 188, 189, 189, 190,
1418 190, 191, 191, 192, 192, 193, 193, 194, 194, 195,
1419 195, 196, 196, 197, 197, 198, 198, 199, 199, 200,
1420 200, 200, 201, 201, 202, 202, 202, 203, 203, 204,
1421 204, 204, 205, 205, 206, 206, 206, 207, 207, 207,
1422 208, 208, 208, 209, 209, 210, 210, 210, 211, 211,
1423 211, 212, 212, 212, 213, 213, 213, 213, 214, 214,
1424 214, 215, 215, 215, 216, 216, 216, 217, 217, 217,
1425 217, 218, 218, 218, 219, 219, 219, 219, 220, 220,
1426 220, 220, 221, 221, 221, 222, 222, 222, 222, 223,
1427 223, 223, 223, 224, 224, 224, 224,
1428 };
1429
1430 return x < ARRAY_SIZE(log10) ? log10[x] : 225;
1431}
1432
1433enum {
1434 MAX_CCK_EVM_DB = 45,
1435};
1436
1437static int cck_evm_db(u8 status_quality)
1438{
1439 return (20 * log10times100(status_quality)) / 100;
1440}
1441
1442static int cck_snr_db(u8 status_quality)
1443{
1444 int r = MAX_CCK_EVM_DB - cck_evm_db(status_quality);
1445 ZD_ASSERT(r >= 0);
1446 return r;
1447}
1448
1449static int cck_qual_percent(u8 status_quality)
1450{
1451 int r;
1452
1453 r = cck_snr_db(status_quality);
1454 r = (100*r)/17;
1455 return r <= 100 ? r : 100;
1456}
1457
1458static inline u8 zd_rate_from_ofdm_plcp_header(const void *rx_frame) 1328static inline u8 zd_rate_from_ofdm_plcp_header(const void *rx_frame)
1459{ 1329{
1460 return ZD_OFDM | zd_ofdm_plcp_header_rate(rx_frame); 1330 return ZD_OFDM | zd_ofdm_plcp_header_rate(rx_frame);
1461} 1331}
1462 1332
1463u8 zd_rx_qual_percent(const void *rx_frame, unsigned int size,
1464 const struct rx_status *status)
1465{
1466 return (status->frame_status&ZD_RX_OFDM) ?
1467 ofdm_qual_percent(status->signal_quality_ofdm,
1468 zd_rate_from_ofdm_plcp_header(rx_frame),
1469 size) :
1470 cck_qual_percent(status->signal_quality_cck);
1471}
1472
1473/** 1333/**
1474 * zd_rx_rate - report zd-rate 1334 * zd_rx_rate - report zd-rate
1475 * @rx_frame - received frame 1335 * @rx_frame - received frame
diff --git a/drivers/net/wireless/zd1211rw/zd_chip.h b/drivers/net/wireless/zd1211rw/zd_chip.h
index 9fd8f3508d66..f8bbf7d302ae 100644
--- a/drivers/net/wireless/zd1211rw/zd_chip.h
+++ b/drivers/net/wireless/zd1211rw/zd_chip.h
@@ -929,9 +929,6 @@ static inline int zd_get_beacon_interval(struct zd_chip *chip, u32 *interval)
929 929
930struct rx_status; 930struct rx_status;
931 931
932u8 zd_rx_qual_percent(const void *rx_frame, unsigned int size,
933 const struct rx_status *status);
934
935u8 zd_rx_rate(const void *rx_frame, const struct rx_status *status); 932u8 zd_rx_rate(const void *rx_frame, const struct rx_status *status);
936 933
937struct zd_mc_hash { 934struct zd_mc_hash {
diff --git a/drivers/net/wireless/zd1211rw/zd_mac.c b/drivers/net/wireless/zd1211rw/zd_mac.c
index cf51e8f8174b..f14deb0c8514 100644
--- a/drivers/net/wireless/zd1211rw/zd_mac.c
+++ b/drivers/net/wireless/zd1211rw/zd_mac.c
@@ -828,9 +828,6 @@ int zd_mac_rx(struct ieee80211_hw *hw, const u8 *buffer, unsigned int length)
828 stats.freq = zd_channels[_zd_chip_get_channel(&mac->chip) - 1].center_freq; 828 stats.freq = zd_channels[_zd_chip_get_channel(&mac->chip) - 1].center_freq;
829 stats.band = IEEE80211_BAND_2GHZ; 829 stats.band = IEEE80211_BAND_2GHZ;
830 stats.signal = status->signal_strength; 830 stats.signal = status->signal_strength;
831 stats.qual = zd_rx_qual_percent(buffer,
832 length - sizeof(struct rx_status),
833 status);
834 831
835 rate = zd_rx_rate(buffer, status); 832 rate = zd_rx_rate(buffer, status);
836 833
@@ -990,12 +987,13 @@ static void zd_op_configure_filter(struct ieee80211_hw *hw,
990 changed_flags &= SUPPORTED_FIF_FLAGS; 987 changed_flags &= SUPPORTED_FIF_FLAGS;
991 *new_flags &= SUPPORTED_FIF_FLAGS; 988 *new_flags &= SUPPORTED_FIF_FLAGS;
992 989
993 /* changed_flags is always populated but this driver 990 /*
994 * doesn't support all FIF flags so its possible we don't 991 * If multicast parameter (as returned by zd_op_prepare_multicast)
995 * need to do anything */ 992 * has changed, no bit in changed_flags is set. To handle this
996 if (!changed_flags) 993 * situation, we do not return if changed_flags is 0. If we do so,
997 return; 994 * we will have some issue with IPv6 which uses multicast for link
998 995 * layer address resolution.
996 */
999 if (*new_flags & (FIF_PROMISC_IN_BSS | FIF_ALLMULTI)) 997 if (*new_flags & (FIF_PROMISC_IN_BSS | FIF_ALLMULTI))
1000 zd_mc_add_all(&hash); 998 zd_mc_add_all(&hash);
1001 999
diff --git a/drivers/net/wireless/zd1211rw/zd_usb.c b/drivers/net/wireless/zd1211rw/zd_usb.c
index ac19ecd19cfe..72d3e437e190 100644
--- a/drivers/net/wireless/zd1211rw/zd_usb.c
+++ b/drivers/net/wireless/zd1211rw/zd_usb.c
@@ -62,6 +62,7 @@ static struct usb_device_id usb_ids[] = {
62 { USB_DEVICE(0x6891, 0xa727), .driver_info = DEVICE_ZD1211 }, 62 { USB_DEVICE(0x6891, 0xa727), .driver_info = DEVICE_ZD1211 },
63 /* ZD1211B */ 63 /* ZD1211B */
64 { USB_DEVICE(0x0053, 0x5301), .driver_info = DEVICE_ZD1211B }, 64 { USB_DEVICE(0x0053, 0x5301), .driver_info = DEVICE_ZD1211B },
65 { USB_DEVICE(0x0409, 0x0248), .driver_info = DEVICE_ZD1211B },
65 { USB_DEVICE(0x0411, 0x00da), .driver_info = DEVICE_ZD1211B }, 66 { USB_DEVICE(0x0411, 0x00da), .driver_info = DEVICE_ZD1211B },
66 { USB_DEVICE(0x0471, 0x1236), .driver_info = DEVICE_ZD1211B }, 67 { USB_DEVICE(0x0471, 0x1236), .driver_info = DEVICE_ZD1211B },
67 { USB_DEVICE(0x0471, 0x1237), .driver_info = DEVICE_ZD1211B }, 68 { USB_DEVICE(0x0471, 0x1237), .driver_info = DEVICE_ZD1211B },
diff --git a/drivers/pci/hotplug/acpiphp_glue.c b/drivers/pci/hotplug/acpiphp_glue.c
index 8e952fdab764..cb2fd01eddae 100644
--- a/drivers/pci/hotplug/acpiphp_glue.c
+++ b/drivers/pci/hotplug/acpiphp_glue.c
@@ -720,12 +720,6 @@ static int acpiphp_bus_add(struct acpiphp_func *func)
720 -ret_val); 720 -ret_val);
721 goto acpiphp_bus_add_out; 721 goto acpiphp_bus_add_out;
722 } 722 }
723 /*
724 * try to start anyway. We could have failed to add
725 * simply because this bus had previously been added
726 * on another add. Don't bother with the return value
727 * we just keep going.
728 */
729 ret_val = acpi_bus_start(device); 723 ret_val = acpi_bus_start(device);
730 724
731acpiphp_bus_add_out: 725acpiphp_bus_add_out:
diff --git a/drivers/pci/hotplug/shpchp.h b/drivers/pci/hotplug/shpchp.h
index bd588eb8e922..8e210cd76e55 100644
--- a/drivers/pci/hotplug/shpchp.h
+++ b/drivers/pci/hotplug/shpchp.h
@@ -121,7 +121,7 @@ struct controller {
121#define PCI_DEVICE_ID_AMD_GOLAM_7450 0x7450 121#define PCI_DEVICE_ID_AMD_GOLAM_7450 0x7450
122#define PCI_DEVICE_ID_AMD_POGO_7458 0x7458 122#define PCI_DEVICE_ID_AMD_POGO_7458 0x7458
123 123
124/* AMD PCIX bridge registers */ 124/* AMD PCI-X bridge registers */
125#define PCIX_MEM_BASE_LIMIT_OFFSET 0x1C 125#define PCIX_MEM_BASE_LIMIT_OFFSET 0x1C
126#define PCIX_MISCII_OFFSET 0x48 126#define PCIX_MISCII_OFFSET 0x48
127#define PCIX_MISC_BRIDGE_ERRORS_OFFSET 0x80 127#define PCIX_MISC_BRIDGE_ERRORS_OFFSET 0x80
diff --git a/drivers/pci/intel-iommu.c b/drivers/pci/intel-iommu.c
index e56f9bed6f2b..417312528ddf 100644
--- a/drivers/pci/intel-iommu.c
+++ b/drivers/pci/intel-iommu.c
@@ -305,7 +305,7 @@ struct device_domain_info {
305 int segment; /* PCI domain */ 305 int segment; /* PCI domain */
306 u8 bus; /* PCI bus number */ 306 u8 bus; /* PCI bus number */
307 u8 devfn; /* PCI devfn number */ 307 u8 devfn; /* PCI devfn number */
308 struct pci_dev *dev; /* it's NULL for PCIE-to-PCI bridge */ 308 struct pci_dev *dev; /* it's NULL for PCIe-to-PCI bridge */
309 struct intel_iommu *iommu; /* IOMMU used by this device */ 309 struct intel_iommu *iommu; /* IOMMU used by this device */
310 struct dmar_domain *domain; /* pointer to domain */ 310 struct dmar_domain *domain; /* pointer to domain */
311}; 311};
@@ -1604,7 +1604,7 @@ domain_context_mapping(struct dmar_domain *domain, struct pci_dev *pdev,
1604 return ret; 1604 return ret;
1605 parent = parent->bus->self; 1605 parent = parent->bus->self;
1606 } 1606 }
1607 if (pci_is_pcie(tmp)) /* this is a PCIE-to-PCI bridge */ 1607 if (pci_is_pcie(tmp)) /* this is a PCIe-to-PCI bridge */
1608 return domain_context_mapping_one(domain, 1608 return domain_context_mapping_one(domain,
1609 pci_domain_nr(tmp->subordinate), 1609 pci_domain_nr(tmp->subordinate),
1610 tmp->subordinate->number, 0, 1610 tmp->subordinate->number, 0,
@@ -3325,7 +3325,7 @@ static void iommu_detach_dependent_devices(struct intel_iommu *iommu,
3325 parent->devfn); 3325 parent->devfn);
3326 parent = parent->bus->self; 3326 parent = parent->bus->self;
3327 } 3327 }
3328 if (pci_is_pcie(tmp)) /* this is a PCIE-to-PCI bridge */ 3328 if (pci_is_pcie(tmp)) /* this is a PCIe-to-PCI bridge */
3329 iommu_detach_dev(iommu, 3329 iommu_detach_dev(iommu,
3330 tmp->subordinate->number, 0); 3330 tmp->subordinate->number, 0);
3331 else /* this is a legacy PCI bridge */ 3331 else /* this is a legacy PCI bridge */
diff --git a/drivers/pci/intr_remapping.c b/drivers/pci/intr_remapping.c
index 8b65a489581b..95b849130ad4 100644
--- a/drivers/pci/intr_remapping.c
+++ b/drivers/pci/intr_remapping.c
@@ -528,7 +528,7 @@ int set_msi_sid(struct irte *irte, struct pci_dev *dev)
528 528
529 bridge = pci_find_upstream_pcie_bridge(dev); 529 bridge = pci_find_upstream_pcie_bridge(dev);
530 if (bridge) { 530 if (bridge) {
531 if (pci_is_pcie(bridge))/* this is a PCIE-to-PCI/PCIX bridge */ 531 if (pci_is_pcie(bridge))/* this is a PCIe-to-PCI/PCIX bridge */
532 set_irte_sid(irte, SVT_VERIFY_BUS, SQ_ALL_16, 532 set_irte_sid(irte, SVT_VERIFY_BUS, SQ_ALL_16,
533 (bridge->bus->number << 8) | dev->bus->number); 533 (bridge->bus->number << 8) | dev->bus->number);
534 else /* this is a legacy PCI bridge */ 534 else /* this is a legacy PCI bridge */
diff --git a/drivers/pci/pci-acpi.c b/drivers/pci/pci-acpi.c
index cc617ddd33d0..7e2829538a4c 100644
--- a/drivers/pci/pci-acpi.c
+++ b/drivers/pci/pci-acpi.c
@@ -112,11 +112,7 @@ static bool acpi_pci_can_wakeup(struct pci_dev *dev)
112static void acpi_pci_propagate_wakeup_enable(struct pci_bus *bus, bool enable) 112static void acpi_pci_propagate_wakeup_enable(struct pci_bus *bus, bool enable)
113{ 113{
114 while (bus->parent) { 114 while (bus->parent) {
115 struct pci_dev *bridge = bus->self; 115 if (!acpi_pm_device_sleep_wake(&bus->self->dev, enable))
116 int ret;
117
118 ret = acpi_pm_device_sleep_wake(&bridge->dev, enable);
119 if (!ret || pci_is_pcie(bridge))
120 return; 116 return;
121 bus = bus->parent; 117 bus = bus->parent;
122 } 118 }
@@ -131,9 +127,7 @@ static int acpi_pci_sleep_wake(struct pci_dev *dev, bool enable)
131 if (acpi_pci_can_wakeup(dev)) 127 if (acpi_pci_can_wakeup(dev))
132 return acpi_pm_device_sleep_wake(&dev->dev, enable); 128 return acpi_pm_device_sleep_wake(&dev->dev, enable);
133 129
134 if (!pci_is_pcie(dev)) 130 acpi_pci_propagate_wakeup_enable(dev->bus, enable);
135 acpi_pci_propagate_wakeup_enable(dev->bus, enable);
136
137 return 0; 131 return 0;
138} 132}
139 133
diff --git a/drivers/pci/pci-sysfs.c b/drivers/pci/pci-sysfs.c
index c5df94e86678..807224ec8351 100644
--- a/drivers/pci/pci-sysfs.c
+++ b/drivers/pci/pci-sysfs.c
@@ -75,7 +75,8 @@ static ssize_t local_cpus_show(struct device *dev,
75 int len; 75 int len;
76 76
77#ifdef CONFIG_NUMA 77#ifdef CONFIG_NUMA
78 mask = cpumask_of_node(dev_to_node(dev)); 78 mask = (dev_to_node(dev) == -1) ? cpu_online_mask :
79 cpumask_of_node(dev_to_node(dev));
79#else 80#else
80 mask = cpumask_of_pcibus(to_pci_dev(dev)->bus); 81 mask = cpumask_of_pcibus(to_pci_dev(dev)->bus);
81#endif 82#endif
@@ -93,7 +94,8 @@ static ssize_t local_cpulist_show(struct device *dev,
93 int len; 94 int len;
94 95
95#ifdef CONFIG_NUMA 96#ifdef CONFIG_NUMA
96 mask = cpumask_of_node(dev_to_node(dev)); 97 mask = (dev_to_node(dev) == -1) ? cpu_online_mask :
98 cpumask_of_node(dev_to_node(dev));
97#else 99#else
98 mask = cpumask_of_pcibus(to_pci_dev(dev)->bus); 100 mask = cpumask_of_pcibus(to_pci_dev(dev)->bus);
99#endif 101#endif
diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
index 0bc27e059019..315fea47e784 100644
--- a/drivers/pci/pci.c
+++ b/drivers/pci/pci.c
@@ -29,7 +29,17 @@ const char *pci_power_names[] = {
29}; 29};
30EXPORT_SYMBOL_GPL(pci_power_names); 30EXPORT_SYMBOL_GPL(pci_power_names);
31 31
32unsigned int pci_pm_d3_delay = PCI_PM_D3_WAIT; 32unsigned int pci_pm_d3_delay;
33
34static void pci_dev_d3_sleep(struct pci_dev *dev)
35{
36 unsigned int delay = dev->d3_delay;
37
38 if (delay < pci_pm_d3_delay)
39 delay = pci_pm_d3_delay;
40
41 msleep(delay);
42}
33 43
34#ifdef CONFIG_PCI_DOMAINS 44#ifdef CONFIG_PCI_DOMAINS
35int pci_domains_supported = 1; 45int pci_domains_supported = 1;
@@ -522,7 +532,7 @@ static int pci_raw_set_power_state(struct pci_dev *dev, pci_power_t state)
522 /* Mandatory power management transition delays */ 532 /* Mandatory power management transition delays */
523 /* see PCI PM 1.1 5.6.1 table 18 */ 533 /* see PCI PM 1.1 5.6.1 table 18 */
524 if (state == PCI_D3hot || dev->current_state == PCI_D3hot) 534 if (state == PCI_D3hot || dev->current_state == PCI_D3hot)
525 msleep(pci_pm_d3_delay); 535 pci_dev_d3_sleep(dev);
526 else if (state == PCI_D2 || dev->current_state == PCI_D2) 536 else if (state == PCI_D2 || dev->current_state == PCI_D2)
527 udelay(PCI_PM_D2_DELAY); 537 udelay(PCI_PM_D2_DELAY);
528 538
@@ -1153,11 +1163,11 @@ pci_disable_device(struct pci_dev *dev)
1153 1163
1154/** 1164/**
1155 * pcibios_set_pcie_reset_state - set reset state for device dev 1165 * pcibios_set_pcie_reset_state - set reset state for device dev
1156 * @dev: the PCI-E device reset 1166 * @dev: the PCIe device reset
1157 * @state: Reset state to enter into 1167 * @state: Reset state to enter into
1158 * 1168 *
1159 * 1169 *
1160 * Sets the PCI-E reset state for the device. This is the default 1170 * Sets the PCIe reset state for the device. This is the default
1161 * implementation. Architecture implementations can override this. 1171 * implementation. Architecture implementations can override this.
1162 */ 1172 */
1163int __attribute__ ((weak)) pcibios_set_pcie_reset_state(struct pci_dev *dev, 1173int __attribute__ ((weak)) pcibios_set_pcie_reset_state(struct pci_dev *dev,
@@ -1168,7 +1178,7 @@ int __attribute__ ((weak)) pcibios_set_pcie_reset_state(struct pci_dev *dev,
1168 1178
1169/** 1179/**
1170 * pci_set_pcie_reset_state - set reset state for device dev 1180 * pci_set_pcie_reset_state - set reset state for device dev
1171 * @dev: the PCI-E device reset 1181 * @dev: the PCIe device reset
1172 * @state: Reset state to enter into 1182 * @state: Reset state to enter into
1173 * 1183 *
1174 * 1184 *
@@ -1409,6 +1419,7 @@ void pci_pm_init(struct pci_dev *dev)
1409 } 1419 }
1410 1420
1411 dev->pm_cap = pm; 1421 dev->pm_cap = pm;
1422 dev->d3_delay = PCI_PM_D3_WAIT;
1412 1423
1413 dev->d1_support = false; 1424 dev->d1_support = false;
1414 dev->d2_support = false; 1425 dev->d2_support = false;
@@ -2247,12 +2258,12 @@ static int pci_pm_reset(struct pci_dev *dev, int probe)
2247 csr &= ~PCI_PM_CTRL_STATE_MASK; 2258 csr &= ~PCI_PM_CTRL_STATE_MASK;
2248 csr |= PCI_D3hot; 2259 csr |= PCI_D3hot;
2249 pci_write_config_word(dev, dev->pm_cap + PCI_PM_CTRL, csr); 2260 pci_write_config_word(dev, dev->pm_cap + PCI_PM_CTRL, csr);
2250 msleep(pci_pm_d3_delay); 2261 pci_dev_d3_sleep(dev);
2251 2262
2252 csr &= ~PCI_PM_CTRL_STATE_MASK; 2263 csr &= ~PCI_PM_CTRL_STATE_MASK;
2253 csr |= PCI_D0; 2264 csr |= PCI_D0;
2254 pci_write_config_word(dev, dev->pm_cap + PCI_PM_CTRL, csr); 2265 pci_write_config_word(dev, dev->pm_cap + PCI_PM_CTRL, csr);
2255 msleep(pci_pm_d3_delay); 2266 pci_dev_d3_sleep(dev);
2256 2267
2257 return 0; 2268 return 0;
2258} 2269}
@@ -2296,6 +2307,10 @@ static int pci_dev_reset(struct pci_dev *dev, int probe)
2296 down(&dev->dev.sem); 2307 down(&dev->dev.sem);
2297 } 2308 }
2298 2309
2310 rc = pci_dev_specific_reset(dev, probe);
2311 if (rc != -ENOTTY)
2312 goto done;
2313
2299 rc = pcie_flr(dev, probe); 2314 rc = pcie_flr(dev, probe);
2300 if (rc != -ENOTTY) 2315 if (rc != -ENOTTY)
2301 goto done; 2316 goto done;
@@ -2779,6 +2794,11 @@ int __attribute__ ((weak)) pci_ext_cfg_avail(struct pci_dev *dev)
2779 return 1; 2794 return 1;
2780} 2795}
2781 2796
2797void __weak pci_fixup_cardbus(struct pci_bus *bus)
2798{
2799}
2800EXPORT_SYMBOL(pci_fixup_cardbus);
2801
2782static int __init pci_setup(char *str) 2802static int __init pci_setup(char *str)
2783{ 2803{
2784 while (str) { 2804 while (str) {
diff --git a/drivers/pci/pci.h b/drivers/pci/pci.h
index 33ed8e0aba1e..fbd0e3adbca3 100644
--- a/drivers/pci/pci.h
+++ b/drivers/pci/pci.h
@@ -313,4 +313,12 @@ static inline int pci_resource_alignment(struct pci_dev *dev,
313 313
314extern void pci_enable_acs(struct pci_dev *dev); 314extern void pci_enable_acs(struct pci_dev *dev);
315 315
316struct pci_dev_reset_methods {
317 u16 vendor;
318 u16 device;
319 int (*reset)(struct pci_dev *dev, int probe);
320};
321
322extern int pci_dev_specific_reset(struct pci_dev *dev, int probe);
323
316#endif /* DRIVERS_PCI_H */ 324#endif /* DRIVERS_PCI_H */
diff --git a/drivers/pci/pcie/aer/Kconfig.debug b/drivers/pci/pcie/aer/Kconfig.debug
index b8c925c1f6aa..9142949734f5 100644
--- a/drivers/pci/pcie/aer/Kconfig.debug
+++ b/drivers/pci/pcie/aer/Kconfig.debug
@@ -3,14 +3,14 @@
3# 3#
4 4
5config PCIEAER_INJECT 5config PCIEAER_INJECT
6 tristate "PCIE AER error injector support" 6 tristate "PCIe AER error injector support"
7 depends on PCIEAER 7 depends on PCIEAER
8 default n 8 default n
9 help 9 help
10 This enables PCI Express Root Port Advanced Error Reporting 10 This enables PCI Express Root Port Advanced Error Reporting
11 (AER) software error injector. 11 (AER) software error injector.
12 12
13 Debuging PCIE AER code is quite difficult because it is hard 13 Debugging PCIe AER code is quite difficult because it is hard
14 to trigger various real hardware errors. Software based 14 to trigger various real hardware errors. Software based
15 error injection can fake almost all kinds of errors with the 15 error injection can fake almost all kinds of errors with the
16 help of a user space helper tool aer-inject, which can be 16 help of a user space helper tool aer-inject, which can be
diff --git a/drivers/pci/pcie/aer/aer_inject.c b/drivers/pci/pcie/aer/aer_inject.c
index 7fcd5331b14c..223052b73563 100644
--- a/drivers/pci/pcie/aer/aer_inject.c
+++ b/drivers/pci/pcie/aer/aer_inject.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * PCIE AER software error injection support. 2 * PCIe AER software error injection support.
3 * 3 *
4 * Debuging PCIE AER code is quite difficult because it is hard to 4 * Debuging PCIe AER code is quite difficult because it is hard to
5 * trigger various real hardware errors. Software based error 5 * trigger various real hardware errors. Software based error
6 * injection can fake almost all kinds of errors with the help of a 6 * injection can fake almost all kinds of errors with the help of a
7 * user space helper tool aer-inject, which can be gotten from: 7 * user space helper tool aer-inject, which can be gotten from:
@@ -321,7 +321,7 @@ static int aer_inject(struct aer_error_inj *einj)
321 unsigned long flags; 321 unsigned long flags;
322 unsigned int devfn = PCI_DEVFN(einj->dev, einj->fn); 322 unsigned int devfn = PCI_DEVFN(einj->dev, einj->fn);
323 int pos_cap_err, rp_pos_cap_err; 323 int pos_cap_err, rp_pos_cap_err;
324 u32 sever; 324 u32 sever, cor_mask, uncor_mask;
325 int ret = 0; 325 int ret = 0;
326 326
327 dev = pci_get_domain_bus_and_slot((int)einj->domain, einj->bus, devfn); 327 dev = pci_get_domain_bus_and_slot((int)einj->domain, einj->bus, devfn);
@@ -339,6 +339,9 @@ static int aer_inject(struct aer_error_inj *einj)
339 goto out_put; 339 goto out_put;
340 } 340 }
341 pci_read_config_dword(dev, pos_cap_err + PCI_ERR_UNCOR_SEVER, &sever); 341 pci_read_config_dword(dev, pos_cap_err + PCI_ERR_UNCOR_SEVER, &sever);
342 pci_read_config_dword(dev, pos_cap_err + PCI_ERR_COR_MASK, &cor_mask);
343 pci_read_config_dword(dev, pos_cap_err + PCI_ERR_UNCOR_MASK,
344 &uncor_mask);
342 345
343 rp_pos_cap_err = pci_find_ext_capability(rpdev, PCI_EXT_CAP_ID_ERR); 346 rp_pos_cap_err = pci_find_ext_capability(rpdev, PCI_EXT_CAP_ID_ERR);
344 if (!rp_pos_cap_err) { 347 if (!rp_pos_cap_err) {
@@ -374,6 +377,21 @@ static int aer_inject(struct aer_error_inj *einj)
374 err->header_log2 = einj->header_log2; 377 err->header_log2 = einj->header_log2;
375 err->header_log3 = einj->header_log3; 378 err->header_log3 = einj->header_log3;
376 379
380 if (einj->cor_status && !(einj->cor_status & ~cor_mask)) {
381 ret = -EINVAL;
382 printk(KERN_WARNING "The correctable error(s) is masked "
383 "by device\n");
384 spin_unlock_irqrestore(&inject_lock, flags);
385 goto out_put;
386 }
387 if (einj->uncor_status && !(einj->uncor_status & ~uncor_mask)) {
388 ret = -EINVAL;
389 printk(KERN_WARNING "The uncorrectable error(s) is masked "
390 "by device\n");
391 spin_unlock_irqrestore(&inject_lock, flags);
392 goto out_put;
393 }
394
377 rperr = __find_aer_error_by_dev(rpdev); 395 rperr = __find_aer_error_by_dev(rpdev);
378 if (!rperr) { 396 if (!rperr) {
379 rperr = rperr_alloc; 397 rperr = rperr_alloc;
@@ -413,8 +431,14 @@ static int aer_inject(struct aer_error_inj *einj)
413 if (ret) 431 if (ret)
414 goto out_put; 432 goto out_put;
415 433
416 if (find_aer_device(rpdev, &edev)) 434 if (find_aer_device(rpdev, &edev)) {
435 if (!get_service_data(edev)) {
436 printk(KERN_WARNING "AER service is not initialized\n");
437 ret = -EINVAL;
438 goto out_put;
439 }
417 aer_irq(-1, edev); 440 aer_irq(-1, edev);
441 }
418 else 442 else
419 ret = -EINVAL; 443 ret = -EINVAL;
420out_put: 444out_put:
@@ -484,5 +508,5 @@ static void __exit aer_inject_exit(void)
484module_init(aer_inject_init); 508module_init(aer_inject_init);
485module_exit(aer_inject_exit); 509module_exit(aer_inject_exit);
486 510
487MODULE_DESCRIPTION("PCIE AER software error injector"); 511MODULE_DESCRIPTION("PCIe AER software error injector");
488MODULE_LICENSE("GPL"); 512MODULE_LICENSE("GPL");
diff --git a/drivers/pci/pcie/aer/aerdrv.c b/drivers/pci/pcie/aer/aerdrv.c
index 97a345927b55..21f215f4daa3 100644
--- a/drivers/pci/pcie/aer/aerdrv.c
+++ b/drivers/pci/pcie/aer/aerdrv.c
@@ -155,7 +155,7 @@ static struct aer_rpc *aer_alloc_rpc(struct pcie_device *dev)
155 mutex_init(&rpc->rpc_mutex); 155 mutex_init(&rpc->rpc_mutex);
156 init_waitqueue_head(&rpc->wait_release); 156 init_waitqueue_head(&rpc->wait_release);
157 157
158 /* Use PCIE bus function to store rpc into PCIE device */ 158 /* Use PCIe bus function to store rpc into PCIe device */
159 set_service_data(dev, rpc); 159 set_service_data(dev, rpc);
160 160
161 return rpc; 161 return rpc;
diff --git a/drivers/pci/pcie/aer/aerdrv_acpi.c b/drivers/pci/pcie/aer/aerdrv_acpi.c
index 8edb2f300e8f..04814087658d 100644
--- a/drivers/pci/pcie/aer/aerdrv_acpi.c
+++ b/drivers/pci/pcie/aer/aerdrv_acpi.c
@@ -24,7 +24,7 @@
24 * 24 *
25 * @return: Zero on success. Nonzero otherwise. 25 * @return: Zero on success. Nonzero otherwise.
26 * 26 *
27 * Invoked when PCIE bus loads AER service driver. To avoid conflict with 27 * Invoked when PCIe bus loads AER service driver. To avoid conflict with
28 * BIOS AER support requires BIOS to yield AER control to OS native driver. 28 * BIOS AER support requires BIOS to yield AER control to OS native driver.
29 **/ 29 **/
30int aer_osc_setup(struct pcie_device *pciedev) 30int aer_osc_setup(struct pcie_device *pciedev)
diff --git a/drivers/pci/pcie/aer/aerdrv_core.c b/drivers/pci/pcie/aer/aerdrv_core.c
index ae672ca80333..c843a799814d 100644
--- a/drivers/pci/pcie/aer/aerdrv_core.c
+++ b/drivers/pci/pcie/aer/aerdrv_core.c
@@ -587,7 +587,7 @@ static void handle_error_source(struct pcie_device *aerdev,
587 * aer_enable_rootport - enable Root Port's interrupts when receiving messages 587 * aer_enable_rootport - enable Root Port's interrupts when receiving messages
588 * @rpc: pointer to a Root Port data structure 588 * @rpc: pointer to a Root Port data structure
589 * 589 *
590 * Invoked when PCIE bus loads AER service driver. 590 * Invoked when PCIe bus loads AER service driver.
591 */ 591 */
592void aer_enable_rootport(struct aer_rpc *rpc) 592void aer_enable_rootport(struct aer_rpc *rpc)
593{ 593{
@@ -597,7 +597,7 @@ void aer_enable_rootport(struct aer_rpc *rpc)
597 u32 reg32; 597 u32 reg32;
598 598
599 pos = pci_pcie_cap(pdev); 599 pos = pci_pcie_cap(pdev);
600 /* Clear PCIE Capability's Device Status */ 600 /* Clear PCIe Capability's Device Status */
601 pci_read_config_word(pdev, pos+PCI_EXP_DEVSTA, &reg16); 601 pci_read_config_word(pdev, pos+PCI_EXP_DEVSTA, &reg16);
602 pci_write_config_word(pdev, pos+PCI_EXP_DEVSTA, reg16); 602 pci_write_config_word(pdev, pos+PCI_EXP_DEVSTA, reg16);
603 603
@@ -631,7 +631,7 @@ void aer_enable_rootport(struct aer_rpc *rpc)
631 * disable_root_aer - disable Root Port's interrupts when receiving messages 631 * disable_root_aer - disable Root Port's interrupts when receiving messages
632 * @rpc: pointer to a Root Port data structure 632 * @rpc: pointer to a Root Port data structure
633 * 633 *
634 * Invoked when PCIE bus unloads AER service driver. 634 * Invoked when PCIe bus unloads AER service driver.
635 */ 635 */
636static void disable_root_aer(struct aer_rpc *rpc) 636static void disable_root_aer(struct aer_rpc *rpc)
637{ 637{
diff --git a/drivers/pci/pcie/aer/aerdrv_errprint.c b/drivers/pci/pcie/aer/aerdrv_errprint.c
index 44acde72294f..9d3e4c8d0184 100644
--- a/drivers/pci/pcie/aer/aerdrv_errprint.c
+++ b/drivers/pci/pcie/aer/aerdrv_errprint.c
@@ -184,7 +184,7 @@ void aer_print_error(struct pci_dev *dev, struct aer_err_info *info)
184 184
185 if (info->status == 0) { 185 if (info->status == 0) {
186 AER_PR(info, dev, 186 AER_PR(info, dev,
187 "PCIE Bus Error: severity=%s, type=Unaccessible, " 187 "PCIe Bus Error: severity=%s, type=Unaccessible, "
188 "id=%04x(Unregistered Agent ID)\n", 188 "id=%04x(Unregistered Agent ID)\n",
189 aer_error_severity_string[info->severity], id); 189 aer_error_severity_string[info->severity], id);
190 } else { 190 } else {
@@ -194,7 +194,7 @@ void aer_print_error(struct pci_dev *dev, struct aer_err_info *info)
194 agent = AER_GET_AGENT(info->severity, info->status); 194 agent = AER_GET_AGENT(info->severity, info->status);
195 195
196 AER_PR(info, dev, 196 AER_PR(info, dev,
197 "PCIE Bus Error: severity=%s, type=%s, id=%04x(%s)\n", 197 "PCIe Bus Error: severity=%s, type=%s, id=%04x(%s)\n",
198 aer_error_severity_string[info->severity], 198 aer_error_severity_string[info->severity],
199 aer_error_layer[layer], id, aer_agent_string[agent]); 199 aer_error_layer[layer], id, aer_agent_string[agent]);
200 200
diff --git a/drivers/pci/pcie/aspm.c b/drivers/pci/pcie/aspm.c
index 5a01fc7fbf05..be53d98fa384 100644
--- a/drivers/pci/pcie/aspm.c
+++ b/drivers/pci/pcie/aspm.c
@@ -1,6 +1,6 @@
1/* 1/*
2 * File: drivers/pci/pcie/aspm.c 2 * File: drivers/pci/pcie/aspm.c
3 * Enabling PCIE link L0s/L1 state and Clock Power Management 3 * Enabling PCIe link L0s/L1 state and Clock Power Management
4 * 4 *
5 * Copyright (C) 2007 Intel 5 * Copyright (C) 2007 Intel
6 * Copyright (C) Zhang Yanmin (yanmin.zhang@intel.com) 6 * Copyright (C) Zhang Yanmin (yanmin.zhang@intel.com)
@@ -499,7 +499,7 @@ static int pcie_aspm_sanity_check(struct pci_dev *pdev)
499 int pos; 499 int pos;
500 u32 reg32; 500 u32 reg32;
501 /* 501 /*
502 * Some functions in a slot might not all be PCIE functions, 502 * Some functions in a slot might not all be PCIe functions,
503 * very strange. Disable ASPM for the whole slot 503 * very strange. Disable ASPM for the whole slot
504 */ 504 */
505 list_for_each_entry(child, &pdev->subordinate->devices, bus_list) { 505 list_for_each_entry(child, &pdev->subordinate->devices, bus_list) {
diff --git a/drivers/pci/pcie/portdrv_core.c b/drivers/pci/pcie/portdrv_core.c
index 413262eb95b7..b174188ac121 100644
--- a/drivers/pci/pcie/portdrv_core.c
+++ b/drivers/pci/pcie/portdrv_core.c
@@ -27,7 +27,7 @@
27 */ 27 */
28static void release_pcie_device(struct device *dev) 28static void release_pcie_device(struct device *dev)
29{ 29{
30 kfree(to_pcie_device(dev)); 30 kfree(to_pcie_device(dev));
31} 31}
32 32
33/** 33/**
@@ -346,12 +346,11 @@ static int suspend_iter(struct device *dev, void *data)
346{ 346{
347 struct pcie_port_service_driver *service_driver; 347 struct pcie_port_service_driver *service_driver;
348 348
349 if ((dev->bus == &pcie_port_bus_type) && 349 if ((dev->bus == &pcie_port_bus_type) && dev->driver) {
350 (dev->driver)) { 350 service_driver = to_service_driver(dev->driver);
351 service_driver = to_service_driver(dev->driver); 351 if (service_driver->suspend)
352 if (service_driver->suspend) 352 service_driver->suspend(to_pcie_device(dev));
353 service_driver->suspend(to_pcie_device(dev)); 353 }
354 }
355 return 0; 354 return 0;
356} 355}
357 356
@@ -494,6 +493,7 @@ int pcie_port_service_register(struct pcie_port_service_driver *new)
494 493
495 return driver_register(&new->driver); 494 return driver_register(&new->driver);
496} 495}
496EXPORT_SYMBOL(pcie_port_service_register);
497 497
498/** 498/**
499 * pcie_port_service_unregister - unregister PCI Express port service driver 499 * pcie_port_service_unregister - unregister PCI Express port service driver
@@ -503,6 +503,4 @@ void pcie_port_service_unregister(struct pcie_port_service_driver *drv)
503{ 503{
504 driver_unregister(&drv->driver); 504 driver_unregister(&drv->driver);
505} 505}
506
507EXPORT_SYMBOL(pcie_port_service_register);
508EXPORT_SYMBOL(pcie_port_service_unregister); 506EXPORT_SYMBOL(pcie_port_service_unregister);
diff --git a/drivers/pci/pcie/portdrv_pci.c b/drivers/pci/pcie/portdrv_pci.c
index a49452e2aed9..13c8972886e6 100644
--- a/drivers/pci/pcie/portdrv_pci.c
+++ b/drivers/pci/pcie/portdrv_pci.c
@@ -24,7 +24,7 @@
24 */ 24 */
25#define DRIVER_VERSION "v1.0" 25#define DRIVER_VERSION "v1.0"
26#define DRIVER_AUTHOR "tom.l.nguyen@intel.com" 26#define DRIVER_AUTHOR "tom.l.nguyen@intel.com"
27#define DRIVER_DESC "PCIE Port Bus Driver" 27#define DRIVER_DESC "PCIe Port Bus Driver"
28MODULE_AUTHOR(DRIVER_AUTHOR); 28MODULE_AUTHOR(DRIVER_AUTHOR);
29MODULE_DESCRIPTION(DRIVER_DESC); 29MODULE_DESCRIPTION(DRIVER_DESC);
30MODULE_LICENSE("GPL"); 30MODULE_LICENSE("GPL");
@@ -63,7 +63,7 @@ static const struct dev_pm_ops pcie_portdrv_pm_ops = {
63 * pcie_portdrv_probe - Probe PCI-Express port devices 63 * pcie_portdrv_probe - Probe PCI-Express port devices
64 * @dev: PCI-Express port device being probed 64 * @dev: PCI-Express port device being probed
65 * 65 *
66 * If detected invokes the pcie_port_device_register() method for 66 * If detected invokes the pcie_port_device_register() method for
67 * this port device. 67 * this port device.
68 * 68 *
69 */ 69 */
@@ -78,7 +78,7 @@ static int __devinit pcie_portdrv_probe(struct pci_dev *dev,
78 (dev->pcie_type != PCI_EXP_TYPE_DOWNSTREAM))) 78 (dev->pcie_type != PCI_EXP_TYPE_DOWNSTREAM)))
79 return -ENODEV; 79 return -ENODEV;
80 80
81 if (!dev->irq && dev->pin) { 81 if (!dev->irq && dev->pin) {
82 dev_warn(&dev->dev, "device [%04x:%04x] has invalid IRQ; " 82 dev_warn(&dev->dev, "device [%04x:%04x] has invalid IRQ; "
83 "check vendor BIOS\n", dev->vendor, dev->device); 83 "check vendor BIOS\n", dev->vendor, dev->device);
84 } 84 }
@@ -91,7 +91,7 @@ static int __devinit pcie_portdrv_probe(struct pci_dev *dev,
91 return 0; 91 return 0;
92} 92}
93 93
94static void pcie_portdrv_remove (struct pci_dev *dev) 94static void pcie_portdrv_remove(struct pci_dev *dev)
95{ 95{
96 pcie_port_device_remove(dev); 96 pcie_port_device_remove(dev);
97 pci_disable_device(dev); 97 pci_disable_device(dev);
@@ -129,14 +129,13 @@ static int error_detected_iter(struct device *device, void *data)
129static pci_ers_result_t pcie_portdrv_error_detected(struct pci_dev *dev, 129static pci_ers_result_t pcie_portdrv_error_detected(struct pci_dev *dev,
130 enum pci_channel_state error) 130 enum pci_channel_state error)
131{ 131{
132 struct aer_broadcast_data result_data = 132 struct aer_broadcast_data data = {error, PCI_ERS_RESULT_CAN_RECOVER};
133 {error, PCI_ERS_RESULT_CAN_RECOVER}; 133 int ret;
134 int retval;
135 134
136 /* can not fail */ 135 /* can not fail */
137 retval = device_for_each_child(&dev->dev, &result_data, error_detected_iter); 136 ret = device_for_each_child(&dev->dev, &data, error_detected_iter);
138 137
139 return result_data.result; 138 return data.result;
140} 139}
141 140
142static int mmio_enabled_iter(struct device *device, void *data) 141static int mmio_enabled_iter(struct device *device, void *data)
@@ -290,7 +289,7 @@ static int __init pcie_portdrv_init(void)
290 return retval; 289 return retval;
291} 290}
292 291
293static void __exit pcie_portdrv_exit(void) 292static void __exit pcie_portdrv_exit(void)
294{ 293{
295 pci_unregister_driver(&pcie_portdriver); 294 pci_unregister_driver(&pcie_portdriver);
296 pcie_port_bus_unregister(); 295 pcie_port_bus_unregister();
diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
index 98ffb2de22e9..446e4a94d7d3 100644
--- a/drivers/pci/probe.c
+++ b/drivers/pci/probe.c
@@ -681,7 +681,7 @@ static void pci_read_irq(struct pci_dev *dev)
681 dev->irq = irq; 681 dev->irq = irq;
682} 682}
683 683
684static void set_pcie_port_type(struct pci_dev *pdev) 684void set_pcie_port_type(struct pci_dev *pdev)
685{ 685{
686 int pos; 686 int pos;
687 u16 reg16; 687 u16 reg16;
@@ -695,7 +695,7 @@ static void set_pcie_port_type(struct pci_dev *pdev)
695 pdev->pcie_type = (reg16 & PCI_EXP_FLAGS_TYPE) >> 4; 695 pdev->pcie_type = (reg16 & PCI_EXP_FLAGS_TYPE) >> 4;
696} 696}
697 697
698static void set_pcie_hotplug_bridge(struct pci_dev *pdev) 698void set_pcie_hotplug_bridge(struct pci_dev *pdev)
699{ 699{
700 int pos; 700 int pos;
701 u16 reg16; 701 u16 reg16;
diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
index 7cfa7c38d318..d58b94030ef3 100644
--- a/drivers/pci/quirks.c
+++ b/drivers/pci/quirks.c
@@ -338,6 +338,23 @@ static void __devinit quirk_s3_64M(struct pci_dev *dev)
338DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_S3, PCI_DEVICE_ID_S3_868, quirk_s3_64M); 338DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_S3, PCI_DEVICE_ID_S3_868, quirk_s3_64M);
339DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_S3, PCI_DEVICE_ID_S3_968, quirk_s3_64M); 339DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_S3, PCI_DEVICE_ID_S3_968, quirk_s3_64M);
340 340
341/*
342 * Some CS5536 BIOSes (for example, the Soekris NET5501 board w/ comBIOS
343 * ver. 1.33 20070103) don't set the correct ISA PCI region header info.
344 * BAR0 should be 8 bytes; instead, it may be set to something like 8k
345 * (which conflicts w/ BAR1's memory range).
346 */
347static void __devinit quirk_cs5536_vsa(struct pci_dev *dev)
348{
349 if (pci_resource_len(dev, 0) != 8) {
350 struct resource *res = &dev->resource[0];
351 res->end = res->start + 8 - 1;
352 dev_info(&dev->dev, "CS5536 ISA bridge bug detected "
353 "(incorrect header); workaround applied.\n");
354 }
355}
356DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_CS5536_ISA, quirk_cs5536_vsa);
357
341static void __devinit quirk_io_region(struct pci_dev *dev, unsigned region, 358static void __devinit quirk_io_region(struct pci_dev *dev, unsigned region,
342 unsigned size, int nr, const char *name) 359 unsigned size, int nr, const char *name)
343{ 360{
@@ -2629,14 +2646,86 @@ static int __init pci_apply_final_quirks(void)
2629 if (!pci_cache_line_size) { 2646 if (!pci_cache_line_size) {
2630 printk(KERN_DEBUG "PCI: CLS %u bytes, default %u\n", 2647 printk(KERN_DEBUG "PCI: CLS %u bytes, default %u\n",
2631 cls << 2, pci_dfl_cache_line_size << 2); 2648 cls << 2, pci_dfl_cache_line_size << 2);
2632 pci_cache_line_size = cls; 2649 pci_cache_line_size = cls ? cls : pci_dfl_cache_line_size;
2633 } 2650 }
2634 2651
2635 return 0; 2652 return 0;
2636} 2653}
2637 2654
2638fs_initcall_sync(pci_apply_final_quirks); 2655fs_initcall_sync(pci_apply_final_quirks);
2656
2657/*
2658 * Followings are device-specific reset methods which can be used to
2659 * reset a single function if other methods (e.g. FLR, PM D0->D3) are
2660 * not available.
2661 */
2662static int reset_intel_generic_dev(struct pci_dev *dev, int probe)
2663{
2664 int pos;
2665
2666 /* only implement PCI_CLASS_SERIAL_USB at present */
2667 if (dev->class == PCI_CLASS_SERIAL_USB) {
2668 pos = pci_find_capability(dev, PCI_CAP_ID_VNDR);
2669 if (!pos)
2670 return -ENOTTY;
2671
2672 if (probe)
2673 return 0;
2674
2675 pci_write_config_byte(dev, pos + 0x4, 1);
2676 msleep(100);
2677
2678 return 0;
2679 } else {
2680 return -ENOTTY;
2681 }
2682}
2683
2684static int reset_intel_82599_sfp_virtfn(struct pci_dev *dev, int probe)
2685{
2686 int pos;
2687
2688 pos = pci_find_capability(dev, PCI_CAP_ID_EXP);
2689 if (!pos)
2690 return -ENOTTY;
2691
2692 if (probe)
2693 return 0;
2694
2695 pci_write_config_word(dev, pos + PCI_EXP_DEVCTL,
2696 PCI_EXP_DEVCTL_BCR_FLR);
2697 msleep(100);
2698
2699 return 0;
2700}
2701
2702#define PCI_DEVICE_ID_INTEL_82599_SFP_VF 0x10ed
2703
2704static const struct pci_dev_reset_methods pci_dev_reset_methods[] = {
2705 { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82599_SFP_VF,
2706 reset_intel_82599_sfp_virtfn },
2707 { PCI_VENDOR_ID_INTEL, PCI_ANY_ID,
2708 reset_intel_generic_dev },
2709 { 0 }
2710};
2711
2712int pci_dev_specific_reset(struct pci_dev *dev, int probe)
2713{
2714 const struct pci_dev_reset_methods *i;
2715
2716 for (i = pci_dev_reset_methods; i->reset; i++) {
2717 if ((i->vendor == dev->vendor ||
2718 i->vendor == (u16)PCI_ANY_ID) &&
2719 (i->device == dev->device ||
2720 i->device == (u16)PCI_ANY_ID))
2721 return i->reset(dev, probe);
2722 }
2723
2724 return -ENOTTY;
2725}
2726
2639#else 2727#else
2640void pci_fixup_device(enum pci_fixup_pass pass, struct pci_dev *dev) {} 2728void pci_fixup_device(enum pci_fixup_pass pass, struct pci_dev *dev) {}
2729int pci_dev_specific_reset(struct pci_dev *dev, int probe) { return -ENOTTY; }
2641#endif 2730#endif
2642EXPORT_SYMBOL(pci_fixup_device); 2731EXPORT_SYMBOL(pci_fixup_device);
diff --git a/drivers/pci/search.c b/drivers/pci/search.c
index 6dae87143258..4a471dc4f4b9 100644
--- a/drivers/pci/search.c
+++ b/drivers/pci/search.c
@@ -15,9 +15,9 @@
15 15
16DECLARE_RWSEM(pci_bus_sem); 16DECLARE_RWSEM(pci_bus_sem);
17/* 17/*
18 * find the upstream PCIE-to-PCI bridge of a PCI device 18 * find the upstream PCIe-to-PCI bridge of a PCI device
19 * if the device is PCIE, return NULL 19 * if the device is PCIE, return NULL
20 * if the device isn't connected to a PCIE bridge (that is its parent is a 20 * if the device isn't connected to a PCIe bridge (that is its parent is a
21 * legacy PCI bridge and the bridge is directly connected to bus 0), return its 21 * legacy PCI bridge and the bridge is directly connected to bus 0), return its
22 * parent 22 * parent
23 */ 23 */
@@ -37,7 +37,7 @@ pci_find_upstream_pcie_bridge(struct pci_dev *pdev)
37 tmp = pdev; 37 tmp = pdev;
38 continue; 38 continue;
39 } 39 }
40 /* PCI device should connect to a PCIE bridge */ 40 /* PCI device should connect to a PCIe bridge */
41 if (pdev->pcie_type != PCI_EXP_TYPE_PCI_BRIDGE) { 41 if (pdev->pcie_type != PCI_EXP_TYPE_PCI_BRIDGE) {
42 /* Busted hardware? */ 42 /* Busted hardware? */
43 WARN_ON_ONCE(1); 43 WARN_ON_ONCE(1);
diff --git a/drivers/pcmcia/cardbus.c b/drivers/pcmcia/cardbus.c
index cdf50f3bc2df..d99f846451a3 100644
--- a/drivers/pcmcia/cardbus.c
+++ b/drivers/pcmcia/cardbus.c
@@ -222,7 +222,7 @@ int __ref cb_alloc(struct pcmcia_socket *s)
222 unsigned int max, pass; 222 unsigned int max, pass;
223 223
224 s->functions = pci_scan_slot(bus, PCI_DEVFN(0, 0)); 224 s->functions = pci_scan_slot(bus, PCI_DEVFN(0, 0));
225/* pcibios_fixup_bus(bus); */ 225 pci_fixup_cardbus(bus);
226 226
227 max = bus->secondary; 227 max = bus->secondary;
228 for (pass = 0; pass < 2; pass++) 228 for (pass = 0; pass < 2; pass++)
diff --git a/drivers/pcmcia/pxa2xx_base.c b/drivers/pcmcia/pxa2xx_base.c
index 3aabf1e37988..76e640bccde8 100644
--- a/drivers/pcmcia/pxa2xx_base.c
+++ b/drivers/pcmcia/pxa2xx_base.c
@@ -291,7 +291,7 @@ static int pxa2xx_drv_pcmcia_probe(struct platform_device *dev)
291 skt->nr = ops->first + i; 291 skt->nr = ops->first + i;
292 skt->ops = ops; 292 skt->ops = ops;
293 skt->socket.owner = ops->owner; 293 skt->socket.owner = ops->owner;
294 skt->socket.dev.parent = dev; 294 skt->socket.dev.parent = &dev->dev;
295 skt->socket.pci_irq = NO_IRQ; 295 skt->socket.pci_irq = NO_IRQ;
296 296
297 ret = pxa2xx_drv_pcmcia_add_one(skt); 297 ret = pxa2xx_drv_pcmcia_add_one(skt);
@@ -304,8 +304,8 @@ static int pxa2xx_drv_pcmcia_probe(struct platform_device *dev)
304 soc_pcmcia_remove_one(&sinfo->skt[i]); 304 soc_pcmcia_remove_one(&sinfo->skt[i]);
305 kfree(sinfo); 305 kfree(sinfo);
306 } else { 306 } else {
307 pxa2xx_configure_sockets(dev); 307 pxa2xx_configure_sockets(&dev->dev);
308 dev_set_drvdata(dev, sinfo); 308 dev_set_drvdata(&dev->dev, sinfo);
309 } 309 }
310 310
311 return ret; 311 return ret;
diff --git a/drivers/platform/x86/Kconfig b/drivers/platform/x86/Kconfig
index 55ca39dea42e..f526e735c5ab 100644
--- a/drivers/platform/x86/Kconfig
+++ b/drivers/platform/x86/Kconfig
@@ -231,8 +231,36 @@ config THINKPAD_ACPI
231 231
232 This driver was formerly known as ibm-acpi. 232 This driver was formerly known as ibm-acpi.
233 233
234 Extra functionality will be available if the rfkill (CONFIG_RFKILL)
235 and/or ALSA (CONFIG_SND) subsystems are available in the kernel.
236 Note that if you want ThinkPad-ACPI to be built-in instead of
237 modular, ALSA and rfkill will also have to be built-in.
238
234 If you have an IBM or Lenovo ThinkPad laptop, say Y or M here. 239 If you have an IBM or Lenovo ThinkPad laptop, say Y or M here.
235 240
241config THINKPAD_ACPI_ALSA_SUPPORT
242 bool "Console audio control ALSA interface"
243 depends on THINKPAD_ACPI
244 depends on SND
245 depends on SND = y || THINKPAD_ACPI = SND
246 default y
247 ---help---
248 Enables monitoring of the built-in console audio output control
249 (headphone and speakers), which is operated by the mute and (in
250 some ThinkPad models) volume hotkeys.
251
252 If this option is enabled, ThinkPad-ACPI will export an ALSA card
253 with a single read-only mixer control, which should be used for
254 on-screen-display feedback purposes by the Desktop Environment.
255
256 Optionally, the driver will also allow software control (the
257 ALSA mixer will be made read-write). Please refer to the driver
258 documentation for details.
259
260 All IBM models have both volume and mute control. Newer Lenovo
261 models only have mute control (the volume hotkeys are just normal
262 keys and volume control is done through the main HDA mixer).
263
236config THINKPAD_ACPI_DEBUGFACILITIES 264config THINKPAD_ACPI_DEBUGFACILITIES
237 bool "Maintainer debug facilities" 265 bool "Maintainer debug facilities"
238 depends on THINKPAD_ACPI 266 depends on THINKPAD_ACPI
@@ -334,6 +362,9 @@ config EEEPC_LAPTOP
334 depends on HOTPLUG_PCI 362 depends on HOTPLUG_PCI
335 select BACKLIGHT_CLASS_DEVICE 363 select BACKLIGHT_CLASS_DEVICE
336 select HWMON 364 select HWMON
365 select LEDS_CLASS
366 select NEW_LEDS
367 select INPUT_SPARSEKMAP
337 ---help--- 368 ---help---
338 This driver supports the Fn-Fx keys on Eee PC laptops. 369 This driver supports the Fn-Fx keys on Eee PC laptops.
339 370
@@ -365,6 +396,18 @@ config ACPI_WMI
365 It is safe to enable this driver even if your DSDT doesn't define 396 It is safe to enable this driver even if your DSDT doesn't define
366 any ACPI-WMI devices. 397 any ACPI-WMI devices.
367 398
399config MSI_WMI
400 tristate "MSI WMI extras"
401 depends on ACPI_WMI
402 depends on INPUT
403 depends on BACKLIGHT_CLASS_DEVICE
404 select INPUT_SPARSEKMAP
405 help
406 Say Y here if you want to support WMI-based hotkeys on MSI laptops.
407
408 To compile this driver as a module, choose M here: the module will
409 be called msi-wmi.
410
368config ACPI_ASUS 411config ACPI_ASUS
369 tristate "ASUS/Medion Laptop Extras (DEPRECATED)" 412 tristate "ASUS/Medion Laptop Extras (DEPRECATED)"
370 depends on ACPI 413 depends on ACPI
@@ -435,4 +478,31 @@ config ACPI_TOSHIBA
435 478
436 If you have a legacy free Toshiba laptop (such as the Libretto L1 479 If you have a legacy free Toshiba laptop (such as the Libretto L1
437 series), say Y. 480 series), say Y.
481
482config TOSHIBA_BT_RFKILL
483 tristate "Toshiba Bluetooth RFKill switch support"
484 depends on ACPI
485 ---help---
486 This driver adds support for Bluetooth events for the RFKill
487 switch on modern Toshiba laptops with full ACPI support and
488 an RFKill switch.
489
490 This driver handles RFKill events for the TOS6205 Bluetooth,
491 and re-enables it when the switch is set back to the 'on'
492 position.
493
494 If you have a modern Toshiba laptop with a Bluetooth and an
495 RFKill switch (such as the Portege R500), say Y.
496
497config ACPI_CMPC
498 tristate "CMPC Laptop Extras"
499 depends on X86 && ACPI
500 select INPUT
501 select BACKLIGHT_CLASS_DEVICE
502 default n
503 help
504 Support for Intel Classmate PC ACPI devices, including some
505 keys as input device, backlight device, tablet and accelerometer
506 devices.
507
438endif # X86_PLATFORM_DEVICES 508endif # X86_PLATFORM_DEVICES
diff --git a/drivers/platform/x86/Makefile b/drivers/platform/x86/Makefile
index d1c16210a512..9cd9fa0a27e6 100644
--- a/drivers/platform/x86/Makefile
+++ b/drivers/platform/x86/Makefile
@@ -5,6 +5,7 @@
5obj-$(CONFIG_ASUS_LAPTOP) += asus-laptop.o 5obj-$(CONFIG_ASUS_LAPTOP) += asus-laptop.o
6obj-$(CONFIG_EEEPC_LAPTOP) += eeepc-laptop.o 6obj-$(CONFIG_EEEPC_LAPTOP) += eeepc-laptop.o
7obj-$(CONFIG_MSI_LAPTOP) += msi-laptop.o 7obj-$(CONFIG_MSI_LAPTOP) += msi-laptop.o
8obj-$(CONFIG_ACPI_CMPC) += classmate-laptop.o
8obj-$(CONFIG_COMPAL_LAPTOP) += compal-laptop.o 9obj-$(CONFIG_COMPAL_LAPTOP) += compal-laptop.o
9obj-$(CONFIG_DELL_LAPTOP) += dell-laptop.o 10obj-$(CONFIG_DELL_LAPTOP) += dell-laptop.o
10obj-$(CONFIG_DELL_WMI) += dell-wmi.o 11obj-$(CONFIG_DELL_WMI) += dell-wmi.o
@@ -18,6 +19,8 @@ obj-$(CONFIG_FUJITSU_LAPTOP) += fujitsu-laptop.o
18obj-$(CONFIG_PANASONIC_LAPTOP) += panasonic-laptop.o 19obj-$(CONFIG_PANASONIC_LAPTOP) += panasonic-laptop.o
19obj-$(CONFIG_INTEL_MENLOW) += intel_menlow.o 20obj-$(CONFIG_INTEL_MENLOW) += intel_menlow.o
20obj-$(CONFIG_ACPI_WMI) += wmi.o 21obj-$(CONFIG_ACPI_WMI) += wmi.o
22obj-$(CONFIG_MSI_WMI) += msi-wmi.o
21obj-$(CONFIG_ACPI_ASUS) += asus_acpi.o 23obj-$(CONFIG_ACPI_ASUS) += asus_acpi.o
22obj-$(CONFIG_TOPSTAR_LAPTOP) += topstar-laptop.o 24obj-$(CONFIG_TOPSTAR_LAPTOP) += topstar-laptop.o
23obj-$(CONFIG_ACPI_TOSHIBA) += toshiba_acpi.o 25obj-$(CONFIG_ACPI_TOSHIBA) += toshiba_acpi.o
26obj-$(CONFIG_TOSHIBA_BT_RFKILL) += toshiba_bluetooth.o
diff --git a/drivers/platform/x86/acer-wmi.c b/drivers/platform/x86/acer-wmi.c
index 454970d2d701..226b3e93498c 100644
--- a/drivers/platform/x86/acer-wmi.c
+++ b/drivers/platform/x86/acer-wmi.c
@@ -96,9 +96,6 @@ struct acer_quirks {
96MODULE_ALIAS("wmi:67C3371D-95A3-4C37-BB61-DD47B491DAAB"); 96MODULE_ALIAS("wmi:67C3371D-95A3-4C37-BB61-DD47B491DAAB");
97MODULE_ALIAS("wmi:6AF4F258-B401-42fd-BE91-3D4AC2D7C0D3"); 97MODULE_ALIAS("wmi:6AF4F258-B401-42fd-BE91-3D4AC2D7C0D3");
98 98
99/* Temporary workaround until the WMI sysfs interface goes in */
100MODULE_ALIAS("dmi:*:*Acer*:*:");
101
102/* 99/*
103 * Interface capability flags 100 * Interface capability flags
104 */ 101 */
@@ -937,7 +934,7 @@ static int __devinit acer_backlight_init(struct device *dev)
937 acer_backlight_device = bd; 934 acer_backlight_device = bd;
938 935
939 bd->props.power = FB_BLANK_UNBLANK; 936 bd->props.power = FB_BLANK_UNBLANK;
940 bd->props.brightness = max_brightness; 937 bd->props.brightness = read_brightness(bd);
941 bd->props.max_brightness = max_brightness; 938 bd->props.max_brightness = max_brightness;
942 backlight_update_status(bd); 939 backlight_update_status(bd);
943 return 0; 940 return 0;
diff --git a/drivers/platform/x86/acerhdf.c b/drivers/platform/x86/acerhdf.c
index be27aa47e810..7b2384d674d0 100644
--- a/drivers/platform/x86/acerhdf.c
+++ b/drivers/platform/x86/acerhdf.c
@@ -52,7 +52,7 @@
52 */ 52 */
53#undef START_IN_KERNEL_MODE 53#undef START_IN_KERNEL_MODE
54 54
55#define DRV_VER "0.5.18" 55#define DRV_VER "0.5.22"
56 56
57/* 57/*
58 * According to the Atom N270 datasheet, 58 * According to the Atom N270 datasheet,
@@ -112,12 +112,14 @@ module_param_string(force_product, force_product, 16, 0);
112MODULE_PARM_DESC(force_product, "Force BIOS product and omit BIOS check"); 112MODULE_PARM_DESC(force_product, "Force BIOS product and omit BIOS check");
113 113
114/* 114/*
115 * cmd_off: to switch the fan completely off / to check if the fan is off 115 * cmd_off: to switch the fan completely off
116 * chk_off: to check if the fan is off
116 * cmd_auto: to set the BIOS in control of the fan. The BIOS regulates then 117 * cmd_auto: to set the BIOS in control of the fan. The BIOS regulates then
117 * the fan speed depending on the temperature 118 * the fan speed depending on the temperature
118 */ 119 */
119struct fancmd { 120struct fancmd {
120 u8 cmd_off; 121 u8 cmd_off;
122 u8 chk_off;
121 u8 cmd_auto; 123 u8 cmd_auto;
122}; 124};
123 125
@@ -134,32 +136,47 @@ struct bios_settings_t {
134/* Register addresses and values for different BIOS versions */ 136/* Register addresses and values for different BIOS versions */
135static const struct bios_settings_t bios_tbl[] = { 137static const struct bios_settings_t bios_tbl[] = {
136 /* AOA110 */ 138 /* AOA110 */
137 {"Acer", "AOA110", "v0.3109", 0x55, 0x58, {0x1f, 0x00} }, 139 {"Acer", "AOA110", "v0.3109", 0x55, 0x58, {0x1f, 0x1f, 0x00} },
138 {"Acer", "AOA110", "v0.3114", 0x55, 0x58, {0x1f, 0x00} }, 140 {"Acer", "AOA110", "v0.3114", 0x55, 0x58, {0x1f, 0x1f, 0x00} },
139 {"Acer", "AOA110", "v0.3301", 0x55, 0x58, {0xaf, 0x00} }, 141 {"Acer", "AOA110", "v0.3301", 0x55, 0x58, {0xaf, 0xaf, 0x00} },
140 {"Acer", "AOA110", "v0.3304", 0x55, 0x58, {0xaf, 0x00} }, 142 {"Acer", "AOA110", "v0.3304", 0x55, 0x58, {0xaf, 0xaf, 0x00} },
141 {"Acer", "AOA110", "v0.3305", 0x55, 0x58, {0xaf, 0x00} }, 143 {"Acer", "AOA110", "v0.3305", 0x55, 0x58, {0xaf, 0xaf, 0x00} },
142 {"Acer", "AOA110", "v0.3307", 0x55, 0x58, {0xaf, 0x00} }, 144 {"Acer", "AOA110", "v0.3307", 0x55, 0x58, {0xaf, 0xaf, 0x00} },
143 {"Acer", "AOA110", "v0.3308", 0x55, 0x58, {0x21, 0x00} }, 145 {"Acer", "AOA110", "v0.3308", 0x55, 0x58, {0x21, 0x21, 0x00} },
144 {"Acer", "AOA110", "v0.3309", 0x55, 0x58, {0x21, 0x00} }, 146 {"Acer", "AOA110", "v0.3309", 0x55, 0x58, {0x21, 0x21, 0x00} },
145 {"Acer", "AOA110", "v0.3310", 0x55, 0x58, {0x21, 0x00} }, 147 {"Acer", "AOA110", "v0.3310", 0x55, 0x58, {0x21, 0x21, 0x00} },
146 /* AOA150 */ 148 /* AOA150 */
147 {"Acer", "AOA150", "v0.3114", 0x55, 0x58, {0x20, 0x00} }, 149 {"Acer", "AOA150", "v0.3114", 0x55, 0x58, {0x20, 0x20, 0x00} },
148 {"Acer", "AOA150", "v0.3301", 0x55, 0x58, {0x20, 0x00} }, 150 {"Acer", "AOA150", "v0.3301", 0x55, 0x58, {0x20, 0x20, 0x00} },
149 {"Acer", "AOA150", "v0.3304", 0x55, 0x58, {0x20, 0x00} }, 151 {"Acer", "AOA150", "v0.3304", 0x55, 0x58, {0x20, 0x20, 0x00} },
150 {"Acer", "AOA150", "v0.3305", 0x55, 0x58, {0x20, 0x00} }, 152 {"Acer", "AOA150", "v0.3305", 0x55, 0x58, {0x20, 0x20, 0x00} },
151 {"Acer", "AOA150", "v0.3307", 0x55, 0x58, {0x20, 0x00} }, 153 {"Acer", "AOA150", "v0.3307", 0x55, 0x58, {0x20, 0x20, 0x00} },
152 {"Acer", "AOA150", "v0.3308", 0x55, 0x58, {0x20, 0x00} }, 154 {"Acer", "AOA150", "v0.3308", 0x55, 0x58, {0x20, 0x20, 0x00} },
153 {"Acer", "AOA150", "v0.3309", 0x55, 0x58, {0x20, 0x00} }, 155 {"Acer", "AOA150", "v0.3309", 0x55, 0x58, {0x20, 0x20, 0x00} },
154 {"Acer", "AOA150", "v0.3310", 0x55, 0x58, {0x20, 0x00} }, 156 {"Acer", "AOA150", "v0.3310", 0x55, 0x58, {0x20, 0x20, 0x00} },
155 /* special BIOS / other */ 157 /* Acer 1410 */
156 {"Gateway", "AOA110", "v0.3103", 0x55, 0x58, {0x21, 0x00} }, 158 {"Acer", "Aspire 1410", "v0.3120", 0x55, 0x58, {0x9e, 0x9e, 0x00} },
157 {"Gateway", "AOA150", "v0.3103", 0x55, 0x58, {0x20, 0x00} }, 159 {"Acer", "Aspire 1410", "v1.3303", 0x55, 0x58, {0x9e, 0x9e, 0x00} },
158 {"Packard Bell", "DOA150", "v0.3104", 0x55, 0x58, {0x21, 0x00} }, 160 /* Acer 1810xx */
159 {"Packard Bell", "AOA110", "v0.3105", 0x55, 0x58, {0x21, 0x00} }, 161 {"Acer", "Aspire 1810TZ", "v0.3120", 0x55, 0x58, {0x9e, 0x9e, 0x00} },
160 {"Packard Bell", "AOA150", "v0.3105", 0x55, 0x58, {0x20, 0x00} }, 162 {"Acer", "Aspire 1810T", "v0.3120", 0x55, 0x58, {0x9e, 0x9e, 0x00} },
163 {"Acer", "Aspire 1810T", "v1.3303", 0x55, 0x58, {0x9e, 0x9e, 0x00} },
164 {"Acer", "Aspire 1810TZ", "v1.3303", 0x55, 0x58, {0x9e, 0x9e, 0x00} },
165 /* Gateway */
166 {"Gateway", "AOA110", "v0.3103", 0x55, 0x58, {0x21, 0x21, 0x00} },
167 {"Gateway", "AOA150", "v0.3103", 0x55, 0x58, {0x20, 0x20, 0x00} },
168 {"Gateway", "LT31", "v1.3103", 0x55, 0x58, {0x10, 0x0f, 0x00} },
169 {"Gateway", "LT31", "v1.3201", 0x55, 0x58, {0x10, 0x0f, 0x00} },
170 {"Gateway", "LT31", "v1.3302", 0x55, 0x58, {0x10, 0x0f, 0x00} },
171 /* Packard Bell */
172 {"Packard Bell", "DOA150", "v0.3104", 0x55, 0x58, {0x21, 0x21, 0x00} },
173 {"Packard Bell", "DOA150", "v0.3105", 0x55, 0x58, {0x20, 0x20, 0x00} },
174 {"Packard Bell", "AOA110", "v0.3105", 0x55, 0x58, {0x21, 0x21, 0x00} },
175 {"Packard Bell", "AOA150", "v0.3105", 0x55, 0x58, {0x20, 0x20, 0x00} },
176 {"Packard Bell", "DOTMU", "v1.3303", 0x55, 0x58, {0x9e, 0x9e, 0x00} },
177 {"Packard Bell", "DOTMU", "v0.3120", 0x55, 0x58, {0x9e, 0x9e, 0x00} },
161 /* pewpew-terminator */ 178 /* pewpew-terminator */
162 {"", "", "", 0, 0, {0, 0} } 179 {"", "", "", 0, 0, {0, 0, 0} }
163}; 180};
164 181
165static const struct bios_settings_t *bios_cfg __read_mostly; 182static const struct bios_settings_t *bios_cfg __read_mostly;
@@ -183,7 +200,7 @@ static int acerhdf_get_fanstate(int *state)
183 if (ec_read(bios_cfg->fanreg, &fan)) 200 if (ec_read(bios_cfg->fanreg, &fan))
184 return -EINVAL; 201 return -EINVAL;
185 202
186 if (fan != bios_cfg->cmd.cmd_off) 203 if (fan != bios_cfg->cmd.chk_off)
187 *state = ACERHDF_FAN_AUTO; 204 *state = ACERHDF_FAN_AUTO;
188 else 205 else
189 *state = ACERHDF_FAN_OFF; 206 *state = ACERHDF_FAN_OFF;
@@ -475,13 +492,26 @@ static struct platform_driver acerhdf_driver = {
475 .remove = acerhdf_remove, 492 .remove = acerhdf_remove,
476}; 493};
477 494
495/* checks if str begins with start */
496static int str_starts_with(const char *str, const char *start)
497{
498 unsigned long str_len = 0, start_len = 0;
499
500 str_len = strlen(str);
501 start_len = strlen(start);
502
503 if (str_len >= start_len &&
504 !strncmp(str, start, start_len))
505 return 1;
506
507 return 0;
508}
478 509
479/* check hardware */ 510/* check hardware */
480static int acerhdf_check_hardware(void) 511static int acerhdf_check_hardware(void)
481{ 512{
482 char const *vendor, *version, *product; 513 char const *vendor, *version, *product;
483 int i; 514 const struct bios_settings_t *bt = NULL;
484 unsigned long prod_len = 0;
485 515
486 /* get BIOS data */ 516 /* get BIOS data */
487 vendor = dmi_get_system_info(DMI_SYS_VENDOR); 517 vendor = dmi_get_system_info(DMI_SYS_VENDOR);
@@ -503,20 +533,20 @@ static int acerhdf_check_hardware(void)
503 kernelmode = 0; 533 kernelmode = 0;
504 } 534 }
505 535
506 prod_len = strlen(product);
507
508 if (verbose) 536 if (verbose)
509 pr_info("BIOS info: %s %s, product: %s\n", 537 pr_info("BIOS info: %s %s, product: %s\n",
510 vendor, version, product); 538 vendor, version, product);
511 539
512 /* search BIOS version and vendor in BIOS settings table */ 540 /* search BIOS version and vendor in BIOS settings table */
513 for (i = 0; bios_tbl[i].version[0]; i++) { 541 for (bt = bios_tbl; bt->vendor[0]; bt++) {
514 if (strlen(bios_tbl[i].product) >= prod_len && 542 /*
515 !strncmp(bios_tbl[i].product, product, 543 * check if actual hardware BIOS vendor, product and version
516 strlen(bios_tbl[i].product)) && 544 * IDs start with the strings of BIOS table entry
517 !strcmp(bios_tbl[i].vendor, vendor) && 545 */
518 !strcmp(bios_tbl[i].version, version)) { 546 if (str_starts_with(vendor, bt->vendor) &&
519 bios_cfg = &bios_tbl[i]; 547 str_starts_with(product, bt->product) &&
548 str_starts_with(version, bt->version)) {
549 bios_cfg = bt;
520 break; 550 break;
521 } 551 }
522 } 552 }
@@ -629,9 +659,14 @@ static void __exit acerhdf_exit(void)
629MODULE_LICENSE("GPL"); 659MODULE_LICENSE("GPL");
630MODULE_AUTHOR("Peter Feuerer"); 660MODULE_AUTHOR("Peter Feuerer");
631MODULE_DESCRIPTION("Aspire One temperature and fan driver"); 661MODULE_DESCRIPTION("Aspire One temperature and fan driver");
632MODULE_ALIAS("dmi:*:*Acer*:*:"); 662MODULE_ALIAS("dmi:*:*Acer*:pnAOA*:");
633MODULE_ALIAS("dmi:*:*Gateway*:*:"); 663MODULE_ALIAS("dmi:*:*Acer*:pnAspire 1410*:");
634MODULE_ALIAS("dmi:*:*Packard Bell*:*:"); 664MODULE_ALIAS("dmi:*:*Acer*:pnAspire 1810*:");
665MODULE_ALIAS("dmi:*:*Gateway*:pnAOA*:");
666MODULE_ALIAS("dmi:*:*Gateway*:pnLT31*:");
667MODULE_ALIAS("dmi:*:*Packard Bell*:pnAOA*:");
668MODULE_ALIAS("dmi:*:*Packard Bell*:pnDOA*:");
669MODULE_ALIAS("dmi:*:*Packard Bell*:pnDOTMU*:");
635 670
636module_init(acerhdf_init); 671module_init(acerhdf_init);
637module_exit(acerhdf_exit); 672module_exit(acerhdf_exit);
diff --git a/drivers/platform/x86/asus-laptop.c b/drivers/platform/x86/asus-laptop.c
index b39d2bb3e75b..61a1c7503658 100644
--- a/drivers/platform/x86/asus-laptop.c
+++ b/drivers/platform/x86/asus-laptop.c
@@ -221,6 +221,7 @@ static struct asus_hotk *hotk;
221 */ 221 */
222static const struct acpi_device_id asus_device_ids[] = { 222static const struct acpi_device_id asus_device_ids[] = {
223 {"ATK0100", 0}, 223 {"ATK0100", 0},
224 {"ATK0101", 0},
224 {"", 0}, 225 {"", 0},
225}; 226};
226MODULE_DEVICE_TABLE(acpi, asus_device_ids); 227MODULE_DEVICE_TABLE(acpi, asus_device_ids);
@@ -232,6 +233,7 @@ static void asus_hotk_notify(struct acpi_device *device, u32 event);
232static struct acpi_driver asus_hotk_driver = { 233static struct acpi_driver asus_hotk_driver = {
233 .name = ASUS_HOTK_NAME, 234 .name = ASUS_HOTK_NAME,
234 .class = ASUS_HOTK_CLASS, 235 .class = ASUS_HOTK_CLASS,
236 .owner = THIS_MODULE,
235 .ids = asus_device_ids, 237 .ids = asus_device_ids,
236 .flags = ACPI_DRIVER_ALL_NOTIFY_EVENTS, 238 .flags = ACPI_DRIVER_ALL_NOTIFY_EVENTS,
237 .ops = { 239 .ops = {
@@ -293,6 +295,11 @@ struct key_entry {
293enum { KE_KEY, KE_END }; 295enum { KE_KEY, KE_END };
294 296
295static struct key_entry asus_keymap[] = { 297static struct key_entry asus_keymap[] = {
298 {KE_KEY, 0x02, KEY_SCREENLOCK},
299 {KE_KEY, 0x05, KEY_WLAN},
300 {KE_KEY, 0x08, KEY_F13},
301 {KE_KEY, 0x17, KEY_ZOOM},
302 {KE_KEY, 0x1f, KEY_BATTERY},
296 {KE_KEY, 0x30, KEY_VOLUMEUP}, 303 {KE_KEY, 0x30, KEY_VOLUMEUP},
297 {KE_KEY, 0x31, KEY_VOLUMEDOWN}, 304 {KE_KEY, 0x31, KEY_VOLUMEDOWN},
298 {KE_KEY, 0x32, KEY_MUTE}, 305 {KE_KEY, 0x32, KEY_MUTE},
@@ -312,8 +319,11 @@ static struct key_entry asus_keymap[] = {
312 {KE_KEY, 0x5F, KEY_WLAN}, 319 {KE_KEY, 0x5F, KEY_WLAN},
313 {KE_KEY, 0x60, KEY_SWITCHVIDEOMODE}, 320 {KE_KEY, 0x60, KEY_SWITCHVIDEOMODE},
314 {KE_KEY, 0x61, KEY_SWITCHVIDEOMODE}, 321 {KE_KEY, 0x61, KEY_SWITCHVIDEOMODE},
315 {KE_KEY, 0x6B, BTN_TOUCH}, /* Lock Mouse */ 322 {KE_KEY, 0x62, KEY_SWITCHVIDEOMODE},
323 {KE_KEY, 0x63, KEY_SWITCHVIDEOMODE},
324 {KE_KEY, 0x6B, KEY_F13}, /* Lock Touchpad */
316 {KE_KEY, 0x82, KEY_CAMERA}, 325 {KE_KEY, 0x82, KEY_CAMERA},
326 {KE_KEY, 0x88, KEY_WLAN },
317 {KE_KEY, 0x8A, KEY_PROG1}, 327 {KE_KEY, 0x8A, KEY_PROG1},
318 {KE_KEY, 0x95, KEY_MEDIA}, 328 {KE_KEY, 0x95, KEY_MEDIA},
319 {KE_KEY, 0x99, KEY_PHONE}, 329 {KE_KEY, 0x99, KEY_PHONE},
@@ -1240,9 +1250,6 @@ static int asus_hotk_add(struct acpi_device *device)
1240{ 1250{
1241 int result; 1251 int result;
1242 1252
1243 if (!device)
1244 return -EINVAL;
1245
1246 pr_notice("Asus Laptop Support version %s\n", 1253 pr_notice("Asus Laptop Support version %s\n",
1247 ASUS_LAPTOP_VERSION); 1254 ASUS_LAPTOP_VERSION);
1248 1255
@@ -1283,8 +1290,8 @@ static int asus_hotk_add(struct acpi_device *device)
1283 hotk->ledd_status = 0xFFF; 1290 hotk->ledd_status = 0xFFF;
1284 1291
1285 /* Set initial values of light sensor and level */ 1292 /* Set initial values of light sensor and level */
1286 hotk->light_switch = 1; /* Default to light sensor disabled */ 1293 hotk->light_switch = 0; /* Default to light sensor disabled */
1287 hotk->light_level = 0; /* level 5 for sensor sensitivity */ 1294 hotk->light_level = 5; /* level 5 for sensor sensitivity */
1288 1295
1289 if (ls_switch_handle) 1296 if (ls_switch_handle)
1290 set_light_sens_switch(hotk->light_switch); 1297 set_light_sens_switch(hotk->light_switch);
@@ -1306,9 +1313,6 @@ end:
1306 1313
1307static int asus_hotk_remove(struct acpi_device *device, int type) 1314static int asus_hotk_remove(struct acpi_device *device, int type)
1308{ 1315{
1309 if (!device || !acpi_driver_data(device))
1310 return -EINVAL;
1311
1312 kfree(hotk->name); 1316 kfree(hotk->name);
1313 kfree(hotk); 1317 kfree(hotk);
1314 1318
@@ -1444,9 +1448,6 @@ static int __init asus_laptop_init(void)
1444{ 1448{
1445 int result; 1449 int result;
1446 1450
1447 if (acpi_disabled)
1448 return -ENODEV;
1449
1450 result = acpi_bus_register_driver(&asus_hotk_driver); 1451 result = acpi_bus_register_driver(&asus_hotk_driver);
1451 if (result < 0) 1452 if (result < 0)
1452 return result; 1453 return result;
diff --git a/drivers/platform/x86/asus_acpi.c b/drivers/platform/x86/asus_acpi.c
index ddf5240ade8c..c1d2aeeea948 100644
--- a/drivers/platform/x86/asus_acpi.c
+++ b/drivers/platform/x86/asus_acpi.c
@@ -35,6 +35,7 @@
35#include <linux/init.h> 35#include <linux/init.h>
36#include <linux/types.h> 36#include <linux/types.h>
37#include <linux/proc_fs.h> 37#include <linux/proc_fs.h>
38#include <linux/seq_file.h>
38#include <linux/backlight.h> 39#include <linux/backlight.h>
39#include <acpi/acpi_drivers.h> 40#include <acpi/acpi_drivers.h>
40#include <acpi/acpi_bus.h> 41#include <acpi/acpi_bus.h>
@@ -466,6 +467,7 @@ MODULE_DEVICE_TABLE(acpi, asus_device_ids);
466static struct acpi_driver asus_hotk_driver = { 467static struct acpi_driver asus_hotk_driver = {
467 .name = "asus_acpi", 468 .name = "asus_acpi",
468 .class = ACPI_HOTK_CLASS, 469 .class = ACPI_HOTK_CLASS,
470 .owner = THIS_MODULE,
469 .ids = asus_device_ids, 471 .ids = asus_device_ids,
470 .flags = ACPI_DRIVER_ALL_NOTIFY_EVENTS, 472 .flags = ACPI_DRIVER_ALL_NOTIFY_EVENTS,
471 .ops = { 473 .ops = {
@@ -512,26 +514,12 @@ static int read_acpi_int(acpi_handle handle, const char *method, int *val)
512 return (status == AE_OK) && (out_obj.type == ACPI_TYPE_INTEGER); 514 return (status == AE_OK) && (out_obj.type == ACPI_TYPE_INTEGER);
513} 515}
514 516
515/* 517static int asus_info_proc_show(struct seq_file *m, void *v)
516 * We write our info in page, we begin at offset off and cannot write more
517 * than count bytes. We set eof to 1 if we handle those 2 values. We return the
518 * number of bytes written in page
519 */
520static int
521proc_read_info(char *page, char **start, off_t off, int count, int *eof,
522 void *data)
523{ 518{
524 int len = 0;
525 int temp; 519 int temp;
526 char buf[16]; /* enough for all info */
527 /*
528 * We use the easy way, we don't care of off and count,
529 * so we don't set eof to 1
530 */
531 520
532 len += sprintf(page, ACPI_HOTK_NAME " " ASUS_ACPI_VERSION "\n"); 521 seq_printf(m, ACPI_HOTK_NAME " " ASUS_ACPI_VERSION "\n");
533 len += sprintf(page + len, "Model reference : %s\n", 522 seq_printf(m, "Model reference : %s\n", hotk->methods->name);
534 hotk->methods->name);
535 /* 523 /*
536 * The SFUN method probably allows the original driver to get the list 524 * The SFUN method probably allows the original driver to get the list
537 * of features supported by a given model. For now, 0x0100 or 0x0800 525 * of features supported by a given model. For now, 0x0100 or 0x0800
@@ -539,8 +527,7 @@ proc_read_info(char *page, char **start, off_t off, int count, int *eof,
539 * The significance of others is yet to be found. 527 * The significance of others is yet to be found.
540 */ 528 */
541 if (read_acpi_int(hotk->handle, "SFUN", &temp)) 529 if (read_acpi_int(hotk->handle, "SFUN", &temp))
542 len += 530 seq_printf(m, "SFUN value : 0x%04x\n", temp);
543 sprintf(page + len, "SFUN value : 0x%04x\n", temp);
544 /* 531 /*
545 * Another value for userspace: the ASYM method returns 0x02 for 532 * Another value for userspace: the ASYM method returns 0x02 for
546 * battery low and 0x04 for battery critical, its readings tend to be 533 * battery low and 0x04 for battery critical, its readings tend to be
@@ -549,30 +536,34 @@ proc_read_info(char *page, char **start, off_t off, int count, int *eof,
549 * silently ignored. 536 * silently ignored.
550 */ 537 */
551 if (read_acpi_int(hotk->handle, "ASYM", &temp)) 538 if (read_acpi_int(hotk->handle, "ASYM", &temp))
552 len += 539 seq_printf(m, "ASYM value : 0x%04x\n", temp);
553 sprintf(page + len, "ASYM value : 0x%04x\n", temp);
554 if (asus_info) { 540 if (asus_info) {
555 snprintf(buf, 16, "%d", asus_info->length); 541 seq_printf(m, "DSDT length : %d\n", asus_info->length);
556 len += sprintf(page + len, "DSDT length : %s\n", buf); 542 seq_printf(m, "DSDT checksum : %d\n", asus_info->checksum);
557 snprintf(buf, 16, "%d", asus_info->checksum); 543 seq_printf(m, "DSDT revision : %d\n", asus_info->revision);
558 len += sprintf(page + len, "DSDT checksum : %s\n", buf); 544 seq_printf(m, "OEM id : %.*s\n", ACPI_OEM_ID_SIZE, asus_info->oem_id);
559 snprintf(buf, 16, "%d", asus_info->revision); 545 seq_printf(m, "OEM table id : %.*s\n", ACPI_OEM_TABLE_ID_SIZE, asus_info->oem_table_id);
560 len += sprintf(page + len, "DSDT revision : %s\n", buf); 546 seq_printf(m, "OEM revision : 0x%x\n", asus_info->oem_revision);
561 snprintf(buf, 7, "%s", asus_info->oem_id); 547 seq_printf(m, "ASL comp vendor id : %.*s\n", ACPI_NAME_SIZE, asus_info->asl_compiler_id);
562 len += sprintf(page + len, "OEM id : %s\n", buf); 548 seq_printf(m, "ASL comp revision : 0x%x\n", asus_info->asl_compiler_revision);
563 snprintf(buf, 9, "%s", asus_info->oem_table_id);
564 len += sprintf(page + len, "OEM table id : %s\n", buf);
565 snprintf(buf, 16, "%x", asus_info->oem_revision);
566 len += sprintf(page + len, "OEM revision : 0x%s\n", buf);
567 snprintf(buf, 5, "%s", asus_info->asl_compiler_id);
568 len += sprintf(page + len, "ASL comp vendor id : %s\n", buf);
569 snprintf(buf, 16, "%x", asus_info->asl_compiler_revision);
570 len += sprintf(page + len, "ASL comp revision : 0x%s\n", buf);
571 } 549 }
572 550
573 return len; 551 return 0;
552}
553
554static int asus_info_proc_open(struct inode *inode, struct file *file)
555{
556 return single_open(file, asus_info_proc_show, NULL);
574} 557}
575 558
559static const struct file_operations asus_info_proc_fops = {
560 .owner = THIS_MODULE,
561 .open = asus_info_proc_open,
562 .read = seq_read,
563 .llseek = seq_lseek,
564 .release = single_release,
565};
566
576/* 567/*
577 * /proc handlers 568 * /proc handlers
578 * We write our info in page, we begin at offset off and cannot write more 569 * We write our info in page, we begin at offset off and cannot write more
@@ -638,34 +629,48 @@ write_led(const char __user *buffer, unsigned long count,
638/* 629/*
639 * Proc handlers for MLED 630 * Proc handlers for MLED
640 */ 631 */
641static int 632static int mled_proc_show(struct seq_file *m, void *v)
642proc_read_mled(char *page, char **start, off_t off, int count, int *eof,
643 void *data)
644{ 633{
645 return sprintf(page, "%d\n", 634 seq_printf(m, "%d\n", read_led(hotk->methods->mled_status, MLED_ON));
646 read_led(hotk->methods->mled_status, MLED_ON)); 635 return 0;
647} 636}
648 637
649static int 638static int mled_proc_open(struct inode *inode, struct file *file)
650proc_write_mled(struct file *file, const char __user *buffer, 639{
651 unsigned long count, void *data) 640 return single_open(file, mled_proc_show, NULL);
641}
642
643static ssize_t mled_proc_write(struct file *file, const char __user *buffer,
644 size_t count, loff_t *pos)
652{ 645{
653 return write_led(buffer, count, hotk->methods->mt_mled, MLED_ON, 1); 646 return write_led(buffer, count, hotk->methods->mt_mled, MLED_ON, 1);
654} 647}
655 648
649static const struct file_operations mled_proc_fops = {
650 .owner = THIS_MODULE,
651 .open = mled_proc_open,
652 .read = seq_read,
653 .llseek = seq_lseek,
654 .release = single_release,
655 .write = mled_proc_write,
656};
657
656/* 658/*
657 * Proc handlers for LED display 659 * Proc handlers for LED display
658 */ 660 */
659static int 661static int ledd_proc_show(struct seq_file *m, void *v)
660proc_read_ledd(char *page, char **start, off_t off, int count, int *eof,
661 void *data)
662{ 662{
663 return sprintf(page, "0x%08x\n", hotk->ledd_status); 663 seq_printf(m, "0x%08x\n", hotk->ledd_status);
664 return 0;
664} 665}
665 666
666static int 667static int ledd_proc_open(struct inode *inode, struct file *file)
667proc_write_ledd(struct file *file, const char __user *buffer, 668{
668 unsigned long count, void *data) 669 return single_open(file, ledd_proc_show, NULL);
670}
671
672static ssize_t ledd_proc_write(struct file *file, const char __user *buffer,
673 size_t count, loff_t *pos)
669{ 674{
670 int rv, value; 675 int rv, value;
671 676
@@ -681,61 +686,104 @@ proc_write_ledd(struct file *file, const char __user *buffer,
681 return rv; 686 return rv;
682} 687}
683 688
689static const struct file_operations ledd_proc_fops = {
690 .owner = THIS_MODULE,
691 .open = ledd_proc_open,
692 .read = seq_read,
693 .llseek = seq_lseek,
694 .release = single_release,
695 .write = ledd_proc_write,
696};
697
684/* 698/*
685 * Proc handlers for WLED 699 * Proc handlers for WLED
686 */ 700 */
687static int 701static int wled_proc_show(struct seq_file *m, void *v)
688proc_read_wled(char *page, char **start, off_t off, int count, int *eof,
689 void *data)
690{ 702{
691 return sprintf(page, "%d\n", 703 seq_printf(m, "%d\n", read_led(hotk->methods->wled_status, WLED_ON));
692 read_led(hotk->methods->wled_status, WLED_ON)); 704 return 0;
693} 705}
694 706
695static int 707static int wled_proc_open(struct inode *inode, struct file *file)
696proc_write_wled(struct file *file, const char __user *buffer, 708{
697 unsigned long count, void *data) 709 return single_open(file, wled_proc_show, NULL);
710}
711
712static ssize_t wled_proc_write(struct file *file, const char __user *buffer,
713 size_t count, loff_t *pos)
698{ 714{
699 return write_led(buffer, count, hotk->methods->mt_wled, WLED_ON, 0); 715 return write_led(buffer, count, hotk->methods->mt_wled, WLED_ON, 0);
700} 716}
701 717
718static const struct file_operations wled_proc_fops = {
719 .owner = THIS_MODULE,
720 .open = wled_proc_open,
721 .read = seq_read,
722 .llseek = seq_lseek,
723 .release = single_release,
724 .write = wled_proc_write,
725};
726
702/* 727/*
703 * Proc handlers for Bluetooth 728 * Proc handlers for Bluetooth
704 */ 729 */
705static int 730static int bluetooth_proc_show(struct seq_file *m, void *v)
706proc_read_bluetooth(char *page, char **start, off_t off, int count, int *eof,
707 void *data)
708{ 731{
709 return sprintf(page, "%d\n", read_led(hotk->methods->bt_status, BT_ON)); 732 seq_printf(m, "%d\n", read_led(hotk->methods->bt_status, BT_ON));
733 return 0;
710} 734}
711 735
712static int 736static int bluetooth_proc_open(struct inode *inode, struct file *file)
713proc_write_bluetooth(struct file *file, const char __user *buffer, 737{
714 unsigned long count, void *data) 738 return single_open(file, bluetooth_proc_show, NULL);
739}
740
741static ssize_t bluetooth_proc_write(struct file *file,
742 const char __user *buffer, size_t count, loff_t *pos)
715{ 743{
716 /* Note: mt_bt_switch controls both internal Bluetooth adapter's 744 /* Note: mt_bt_switch controls both internal Bluetooth adapter's
717 presence and its LED */ 745 presence and its LED */
718 return write_led(buffer, count, hotk->methods->mt_bt_switch, BT_ON, 0); 746 return write_led(buffer, count, hotk->methods->mt_bt_switch, BT_ON, 0);
719} 747}
720 748
749static const struct file_operations bluetooth_proc_fops = {
750 .owner = THIS_MODULE,
751 .open = bluetooth_proc_open,
752 .read = seq_read,
753 .llseek = seq_lseek,
754 .release = single_release,
755 .write = bluetooth_proc_write,
756};
757
721/* 758/*
722 * Proc handlers for TLED 759 * Proc handlers for TLED
723 */ 760 */
724static int 761static int tled_proc_show(struct seq_file *m, void *v)
725proc_read_tled(char *page, char **start, off_t off, int count, int *eof,
726 void *data)
727{ 762{
728 return sprintf(page, "%d\n", 763 seq_printf(m, "%d\n", read_led(hotk->methods->tled_status, TLED_ON));
729 read_led(hotk->methods->tled_status, TLED_ON)); 764 return 0;
730} 765}
731 766
732static int 767static int tled_proc_open(struct inode *inode, struct file *file)
733proc_write_tled(struct file *file, const char __user *buffer, 768{
734 unsigned long count, void *data) 769 return single_open(file, tled_proc_show, NULL);
770}
771
772static ssize_t tled_proc_write(struct file *file, const char __user *buffer,
773 size_t count, loff_t *pos)
735{ 774{
736 return write_led(buffer, count, hotk->methods->mt_tled, TLED_ON, 0); 775 return write_led(buffer, count, hotk->methods->mt_tled, TLED_ON, 0);
737} 776}
738 777
778static const struct file_operations tled_proc_fops = {
779 .owner = THIS_MODULE,
780 .open = tled_proc_open,
781 .read = seq_read,
782 .llseek = seq_lseek,
783 .release = single_release,
784 .write = tled_proc_write,
785};
786
739static int get_lcd_state(void) 787static int get_lcd_state(void)
740{ 788{
741 int lcd = 0; 789 int lcd = 0;
@@ -828,16 +876,19 @@ static int set_lcd_state(int value)
828 876
829} 877}
830 878
831static int 879static int lcd_proc_show(struct seq_file *m, void *v)
832proc_read_lcd(char *page, char **start, off_t off, int count, int *eof,
833 void *data)
834{ 880{
835 return sprintf(page, "%d\n", get_lcd_state()); 881 seq_printf(m, "%d\n", get_lcd_state());
882 return 0;
836} 883}
837 884
838static int 885static int lcd_proc_open(struct inode *inode, struct file *file)
839proc_write_lcd(struct file *file, const char __user *buffer, 886{
840 unsigned long count, void *data) 887 return single_open(file, lcd_proc_show, NULL);
888}
889
890static ssize_t lcd_proc_write(struct file *file, const char __user *buffer,
891 size_t count, loff_t *pos)
841{ 892{
842 int rv, value; 893 int rv, value;
843 894
@@ -847,6 +898,15 @@ proc_write_lcd(struct file *file, const char __user *buffer,
847 return rv; 898 return rv;
848} 899}
849 900
901static const struct file_operations lcd_proc_fops = {
902 .owner = THIS_MODULE,
903 .open = lcd_proc_open,
904 .read = seq_read,
905 .llseek = seq_lseek,
906 .release = single_release,
907 .write = lcd_proc_write,
908};
909
850static int read_brightness(struct backlight_device *bd) 910static int read_brightness(struct backlight_device *bd)
851{ 911{
852 int value; 912 int value;
@@ -906,16 +966,19 @@ static int set_brightness_status(struct backlight_device *bd)
906 return set_brightness(bd->props.brightness); 966 return set_brightness(bd->props.brightness);
907} 967}
908 968
909static int 969static int brn_proc_show(struct seq_file *m, void *v)
910proc_read_brn(char *page, char **start, off_t off, int count, int *eof,
911 void *data)
912{ 970{
913 return sprintf(page, "%d\n", read_brightness(NULL)); 971 seq_printf(m, "%d\n", read_brightness(NULL));
972 return 0;
914} 973}
915 974
916static int 975static int brn_proc_open(struct inode *inode, struct file *file)
917proc_write_brn(struct file *file, const char __user *buffer, 976{
918 unsigned long count, void *data) 977 return single_open(file, brn_proc_show, NULL);
978}
979
980static ssize_t brn_proc_write(struct file *file, const char __user *buffer,
981 size_t count, loff_t *pos)
919{ 982{
920 int rv, value; 983 int rv, value;
921 984
@@ -928,6 +991,15 @@ proc_write_brn(struct file *file, const char __user *buffer,
928 return rv; 991 return rv;
929} 992}
930 993
994static const struct file_operations brn_proc_fops = {
995 .owner = THIS_MODULE,
996 .open = brn_proc_open,
997 .read = seq_read,
998 .llseek = seq_lseek,
999 .release = single_release,
1000 .write = brn_proc_write,
1001};
1002
931static void set_display(int value) 1003static void set_display(int value)
932{ 1004{
933 /* no sanity check needed for now */ 1005 /* no sanity check needed for now */
@@ -941,9 +1013,7 @@ static void set_display(int value)
941 * Now, *this* one could be more user-friendly, but so far, no-one has 1013 * Now, *this* one could be more user-friendly, but so far, no-one has
942 * complained. The significance of bits is the same as in proc_write_disp() 1014 * complained. The significance of bits is the same as in proc_write_disp()
943 */ 1015 */
944static int 1016static int disp_proc_show(struct seq_file *m, void *v)
945proc_read_disp(char *page, char **start, off_t off, int count, int *eof,
946 void *data)
947{ 1017{
948 int value = 0; 1018 int value = 0;
949 1019
@@ -951,7 +1021,13 @@ proc_read_disp(char *page, char **start, off_t off, int count, int *eof,
951 printk(KERN_WARNING 1021 printk(KERN_WARNING
952 "Asus ACPI: Error reading display status\n"); 1022 "Asus ACPI: Error reading display status\n");
953 value &= 0x07; /* needed for some models, shouldn't hurt others */ 1023 value &= 0x07; /* needed for some models, shouldn't hurt others */
954 return sprintf(page, "%d\n", value); 1024 seq_printf(m, "%d\n", value);
1025 return 0;
1026}
1027
1028static int disp_proc_open(struct inode *inode, struct file *file)
1029{
1030 return single_open(file, disp_proc_show, NULL);
955} 1031}
956 1032
957/* 1033/*
@@ -960,9 +1036,8 @@ proc_read_disp(char *page, char **start, off_t off, int count, int *eof,
960 * (bitwise) of these will suffice. I never actually tested 3 displays hooked 1036 * (bitwise) of these will suffice. I never actually tested 3 displays hooked
961 * up simultaneously, so be warned. See the acpi4asus README for more info. 1037 * up simultaneously, so be warned. See the acpi4asus README for more info.
962 */ 1038 */
963static int 1039static ssize_t disp_proc_write(struct file *file, const char __user *buffer,
964proc_write_disp(struct file *file, const char __user *buffer, 1040 size_t count, loff_t *pos)
965 unsigned long count, void *data)
966{ 1041{
967 int rv, value; 1042 int rv, value;
968 1043
@@ -972,25 +1047,27 @@ proc_write_disp(struct file *file, const char __user *buffer,
972 return rv; 1047 return rv;
973} 1048}
974 1049
975typedef int (proc_readfunc) (char *page, char **start, off_t off, int count, 1050static const struct file_operations disp_proc_fops = {
976 int *eof, void *data); 1051 .owner = THIS_MODULE,
977typedef int (proc_writefunc) (struct file *file, const char __user *buffer, 1052 .open = disp_proc_open,
978 unsigned long count, void *data); 1053 .read = seq_read,
1054 .llseek = seq_lseek,
1055 .release = single_release,
1056 .write = disp_proc_write,
1057};
979 1058
980static int 1059static int
981asus_proc_add(char *name, proc_writefunc *writefunc, 1060asus_proc_add(char *name, const struct file_operations *proc_fops, mode_t mode,
982 proc_readfunc *readfunc, mode_t mode,
983 struct acpi_device *device) 1061 struct acpi_device *device)
984{ 1062{
985 struct proc_dir_entry *proc = 1063 struct proc_dir_entry *proc;
986 create_proc_entry(name, mode, acpi_device_dir(device)); 1064
1065 proc = proc_create_data(name, mode, acpi_device_dir(device),
1066 proc_fops, acpi_driver_data(device));
987 if (!proc) { 1067 if (!proc) {
988 printk(KERN_WARNING " Unable to create %s fs entry\n", name); 1068 printk(KERN_WARNING " Unable to create %s fs entry\n", name);
989 return -1; 1069 return -1;
990 } 1070 }
991 proc->write_proc = writefunc;
992 proc->read_proc = readfunc;
993 proc->data = acpi_driver_data(device);
994 proc->uid = asus_uid; 1071 proc->uid = asus_uid;
995 proc->gid = asus_gid; 1072 proc->gid = asus_gid;
996 return 0; 1073 return 0;
@@ -1019,10 +1096,9 @@ static int asus_hotk_add_fs(struct acpi_device *device)
1019 if (!acpi_device_dir(device)) 1096 if (!acpi_device_dir(device))
1020 return -ENODEV; 1097 return -ENODEV;
1021 1098
1022 proc = create_proc_entry(PROC_INFO, mode, acpi_device_dir(device)); 1099 proc = proc_create(PROC_INFO, mode, acpi_device_dir(device),
1100 &asus_info_proc_fops);
1023 if (proc) { 1101 if (proc) {
1024 proc->read_proc = proc_read_info;
1025 proc->data = acpi_driver_data(device);
1026 proc->uid = asus_uid; 1102 proc->uid = asus_uid;
1027 proc->gid = asus_gid; 1103 proc->gid = asus_gid;
1028 } else { 1104 } else {
@@ -1031,28 +1107,23 @@ static int asus_hotk_add_fs(struct acpi_device *device)
1031 } 1107 }
1032 1108
1033 if (hotk->methods->mt_wled) { 1109 if (hotk->methods->mt_wled) {
1034 asus_proc_add(PROC_WLED, &proc_write_wled, &proc_read_wled, 1110 asus_proc_add(PROC_WLED, &wled_proc_fops, mode, device);
1035 mode, device);
1036 } 1111 }
1037 1112
1038 if (hotk->methods->mt_ledd) { 1113 if (hotk->methods->mt_ledd) {
1039 asus_proc_add(PROC_LEDD, &proc_write_ledd, &proc_read_ledd, 1114 asus_proc_add(PROC_LEDD, &ledd_proc_fops, mode, device);
1040 mode, device);
1041 } 1115 }
1042 1116
1043 if (hotk->methods->mt_mled) { 1117 if (hotk->methods->mt_mled) {
1044 asus_proc_add(PROC_MLED, &proc_write_mled, &proc_read_mled, 1118 asus_proc_add(PROC_MLED, &mled_proc_fops, mode, device);
1045 mode, device);
1046 } 1119 }
1047 1120
1048 if (hotk->methods->mt_tled) { 1121 if (hotk->methods->mt_tled) {
1049 asus_proc_add(PROC_TLED, &proc_write_tled, &proc_read_tled, 1122 asus_proc_add(PROC_TLED, &tled_proc_fops, mode, device);
1050 mode, device);
1051 } 1123 }
1052 1124
1053 if (hotk->methods->mt_bt_switch) { 1125 if (hotk->methods->mt_bt_switch) {
1054 asus_proc_add(PROC_BT, &proc_write_bluetooth, 1126 asus_proc_add(PROC_BT, &bluetooth_proc_fops, mode, device);
1055 &proc_read_bluetooth, mode, device);
1056 } 1127 }
1057 1128
1058 /* 1129 /*
@@ -1060,19 +1131,16 @@ static int asus_hotk_add_fs(struct acpi_device *device)
1060 * accessible from the keyboard 1131 * accessible from the keyboard
1061 */ 1132 */
1062 if (hotk->methods->mt_lcd_switch && hotk->methods->lcd_status) { 1133 if (hotk->methods->mt_lcd_switch && hotk->methods->lcd_status) {
1063 asus_proc_add(PROC_LCD, &proc_write_lcd, &proc_read_lcd, mode, 1134 asus_proc_add(PROC_LCD, &lcd_proc_fops, mode, device);
1064 device);
1065 } 1135 }
1066 1136
1067 if ((hotk->methods->brightness_up && hotk->methods->brightness_down) || 1137 if ((hotk->methods->brightness_up && hotk->methods->brightness_down) ||
1068 (hotk->methods->brightness_get && hotk->methods->brightness_set)) { 1138 (hotk->methods->brightness_get && hotk->methods->brightness_set)) {
1069 asus_proc_add(PROC_BRN, &proc_write_brn, &proc_read_brn, mode, 1139 asus_proc_add(PROC_BRN, &brn_proc_fops, mode, device);
1070 device);
1071 } 1140 }
1072 1141
1073 if (hotk->methods->display_set) { 1142 if (hotk->methods->display_set) {
1074 asus_proc_add(PROC_DISP, &proc_write_disp, &proc_read_disp, 1143 asus_proc_add(PROC_DISP, &disp_proc_fops, mode, device);
1075 mode, device);
1076 } 1144 }
1077 1145
1078 return 0; 1146 return 0;
@@ -1334,9 +1402,6 @@ static int asus_hotk_add(struct acpi_device *device)
1334 acpi_status status = AE_OK; 1402 acpi_status status = AE_OK;
1335 int result; 1403 int result;
1336 1404
1337 if (!device)
1338 return -EINVAL;
1339
1340 printk(KERN_NOTICE "Asus Laptop ACPI Extras version %s\n", 1405 printk(KERN_NOTICE "Asus Laptop ACPI Extras version %s\n",
1341 ASUS_ACPI_VERSION); 1406 ASUS_ACPI_VERSION);
1342 1407
@@ -1392,9 +1457,6 @@ end:
1392 1457
1393static int asus_hotk_remove(struct acpi_device *device, int type) 1458static int asus_hotk_remove(struct acpi_device *device, int type)
1394{ 1459{
1395 if (!device || !acpi_driver_data(device))
1396 return -EINVAL;
1397
1398 asus_hotk_remove_fs(device); 1460 asus_hotk_remove_fs(device);
1399 1461
1400 kfree(hotk); 1462 kfree(hotk);
@@ -1422,21 +1484,17 @@ static int __init asus_acpi_init(void)
1422{ 1484{
1423 int result; 1485 int result;
1424 1486
1425 if (acpi_disabled) 1487 result = acpi_bus_register_driver(&asus_hotk_driver);
1426 return -ENODEV; 1488 if (result < 0)
1489 return result;
1427 1490
1428 asus_proc_dir = proc_mkdir(PROC_ASUS, acpi_root_dir); 1491 asus_proc_dir = proc_mkdir(PROC_ASUS, acpi_root_dir);
1429 if (!asus_proc_dir) { 1492 if (!asus_proc_dir) {
1430 printk(KERN_ERR "Asus ACPI: Unable to create /proc entry\n"); 1493 printk(KERN_ERR "Asus ACPI: Unable to create /proc entry\n");
1494 acpi_bus_unregister_driver(&asus_hotk_driver);
1431 return -ENODEV; 1495 return -ENODEV;
1432 } 1496 }
1433 1497
1434 result = acpi_bus_register_driver(&asus_hotk_driver);
1435 if (result < 0) {
1436 remove_proc_entry(PROC_ASUS, acpi_root_dir);
1437 return result;
1438 }
1439
1440 /* 1498 /*
1441 * This is a bit of a kludge. We only want this module loaded 1499 * This is a bit of a kludge. We only want this module loaded
1442 * for ASUS systems, but there's currently no way to probe the 1500 * for ASUS systems, but there's currently no way to probe the
diff --git a/drivers/platform/x86/classmate-laptop.c b/drivers/platform/x86/classmate-laptop.c
new file mode 100644
index 000000000000..ed90082cdf1d
--- /dev/null
+++ b/drivers/platform/x86/classmate-laptop.c
@@ -0,0 +1,609 @@
1/*
2 * Copyright (C) 2009 Thadeu Lima de Souza Cascardo <cascardo@holoscopio.com>
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License along
15 * with this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
17 */
18
19
20#include <linux/init.h>
21#include <linux/module.h>
22#include <linux/workqueue.h>
23#include <acpi/acpi_drivers.h>
24#include <linux/backlight.h>
25#include <linux/input.h>
26
27MODULE_LICENSE("GPL");
28
29
30struct cmpc_accel {
31 int sensitivity;
32};
33
34#define CMPC_ACCEL_SENSITIVITY_DEFAULT 5
35
36
37/*
38 * Generic input device code.
39 */
40
41typedef void (*input_device_init)(struct input_dev *dev);
42
43static int cmpc_add_acpi_notify_device(struct acpi_device *acpi, char *name,
44 input_device_init idev_init)
45{
46 struct input_dev *inputdev;
47 int error;
48
49 inputdev = input_allocate_device();
50 if (!inputdev)
51 return -ENOMEM;
52 inputdev->name = name;
53 inputdev->dev.parent = &acpi->dev;
54 idev_init(inputdev);
55 error = input_register_device(inputdev);
56 if (error) {
57 input_free_device(inputdev);
58 return error;
59 }
60 dev_set_drvdata(&acpi->dev, inputdev);
61 return 0;
62}
63
64static int cmpc_remove_acpi_notify_device(struct acpi_device *acpi)
65{
66 struct input_dev *inputdev = dev_get_drvdata(&acpi->dev);
67 input_unregister_device(inputdev);
68 return 0;
69}
70
71/*
72 * Accelerometer code.
73 */
74static acpi_status cmpc_start_accel(acpi_handle handle)
75{
76 union acpi_object param[2];
77 struct acpi_object_list input;
78 acpi_status status;
79
80 param[0].type = ACPI_TYPE_INTEGER;
81 param[0].integer.value = 0x3;
82 param[1].type = ACPI_TYPE_INTEGER;
83 input.count = 2;
84 input.pointer = param;
85 status = acpi_evaluate_object(handle, "ACMD", &input, NULL);
86 return status;
87}
88
89static acpi_status cmpc_stop_accel(acpi_handle handle)
90{
91 union acpi_object param[2];
92 struct acpi_object_list input;
93 acpi_status status;
94
95 param[0].type = ACPI_TYPE_INTEGER;
96 param[0].integer.value = 0x4;
97 param[1].type = ACPI_TYPE_INTEGER;
98 input.count = 2;
99 input.pointer = param;
100 status = acpi_evaluate_object(handle, "ACMD", &input, NULL);
101 return status;
102}
103
104static acpi_status cmpc_accel_set_sensitivity(acpi_handle handle, int val)
105{
106 union acpi_object param[2];
107 struct acpi_object_list input;
108
109 param[0].type = ACPI_TYPE_INTEGER;
110 param[0].integer.value = 0x02;
111 param[1].type = ACPI_TYPE_INTEGER;
112 param[1].integer.value = val;
113 input.count = 2;
114 input.pointer = param;
115 return acpi_evaluate_object(handle, "ACMD", &input, NULL);
116}
117
118static acpi_status cmpc_get_accel(acpi_handle handle,
119 unsigned char *x,
120 unsigned char *y,
121 unsigned char *z)
122{
123 union acpi_object param[2];
124 struct acpi_object_list input;
125 struct acpi_buffer output = { ACPI_ALLOCATE_BUFFER, 0 };
126 unsigned char *locs;
127 acpi_status status;
128
129 param[0].type = ACPI_TYPE_INTEGER;
130 param[0].integer.value = 0x01;
131 param[1].type = ACPI_TYPE_INTEGER;
132 input.count = 2;
133 input.pointer = param;
134 status = acpi_evaluate_object(handle, "ACMD", &input, &output);
135 if (ACPI_SUCCESS(status)) {
136 union acpi_object *obj;
137 obj = output.pointer;
138 locs = obj->buffer.pointer;
139 *x = locs[0];
140 *y = locs[1];
141 *z = locs[2];
142 kfree(output.pointer);
143 }
144 return status;
145}
146
147static void cmpc_accel_handler(struct acpi_device *dev, u32 event)
148{
149 if (event == 0x81) {
150 unsigned char x, y, z;
151 acpi_status status;
152
153 status = cmpc_get_accel(dev->handle, &x, &y, &z);
154 if (ACPI_SUCCESS(status)) {
155 struct input_dev *inputdev = dev_get_drvdata(&dev->dev);
156
157 input_report_abs(inputdev, ABS_X, x);
158 input_report_abs(inputdev, ABS_Y, y);
159 input_report_abs(inputdev, ABS_Z, z);
160 input_sync(inputdev);
161 }
162 }
163}
164
165static ssize_t cmpc_accel_sensitivity_show(struct device *dev,
166 struct device_attribute *attr,
167 char *buf)
168{
169 struct acpi_device *acpi;
170 struct input_dev *inputdev;
171 struct cmpc_accel *accel;
172
173 acpi = to_acpi_device(dev);
174 inputdev = dev_get_drvdata(&acpi->dev);
175 accel = dev_get_drvdata(&inputdev->dev);
176
177 return sprintf(buf, "%d\n", accel->sensitivity);
178}
179
180static ssize_t cmpc_accel_sensitivity_store(struct device *dev,
181 struct device_attribute *attr,
182 const char *buf, size_t count)
183{
184 struct acpi_device *acpi;
185 struct input_dev *inputdev;
186 struct cmpc_accel *accel;
187 unsigned long sensitivity;
188 int r;
189
190 acpi = to_acpi_device(dev);
191 inputdev = dev_get_drvdata(&acpi->dev);
192 accel = dev_get_drvdata(&inputdev->dev);
193
194 r = strict_strtoul(buf, 0, &sensitivity);
195 if (r)
196 return r;
197
198 accel->sensitivity = sensitivity;
199 cmpc_accel_set_sensitivity(acpi->handle, sensitivity);
200
201 return strnlen(buf, count);
202}
203
204struct device_attribute cmpc_accel_sensitivity_attr = {
205 .attr = { .name = "sensitivity", .mode = 0660 },
206 .show = cmpc_accel_sensitivity_show,
207 .store = cmpc_accel_sensitivity_store
208};
209
210static int cmpc_accel_open(struct input_dev *input)
211{
212 struct acpi_device *acpi;
213
214 acpi = to_acpi_device(input->dev.parent);
215 if (ACPI_SUCCESS(cmpc_start_accel(acpi->handle)))
216 return 0;
217 return -EIO;
218}
219
220static void cmpc_accel_close(struct input_dev *input)
221{
222 struct acpi_device *acpi;
223
224 acpi = to_acpi_device(input->dev.parent);
225 cmpc_stop_accel(acpi->handle);
226}
227
228static void cmpc_accel_idev_init(struct input_dev *inputdev)
229{
230 set_bit(EV_ABS, inputdev->evbit);
231 input_set_abs_params(inputdev, ABS_X, 0, 255, 8, 0);
232 input_set_abs_params(inputdev, ABS_Y, 0, 255, 8, 0);
233 input_set_abs_params(inputdev, ABS_Z, 0, 255, 8, 0);
234 inputdev->open = cmpc_accel_open;
235 inputdev->close = cmpc_accel_close;
236}
237
238static int cmpc_accel_add(struct acpi_device *acpi)
239{
240 int error;
241 struct input_dev *inputdev;
242 struct cmpc_accel *accel;
243
244 accel = kmalloc(sizeof(*accel), GFP_KERNEL);
245 if (!accel)
246 return -ENOMEM;
247
248 accel->sensitivity = CMPC_ACCEL_SENSITIVITY_DEFAULT;
249 cmpc_accel_set_sensitivity(acpi->handle, accel->sensitivity);
250
251 error = device_create_file(&acpi->dev, &cmpc_accel_sensitivity_attr);
252 if (error)
253 goto failed_file;
254
255 error = cmpc_add_acpi_notify_device(acpi, "cmpc_accel",
256 cmpc_accel_idev_init);
257 if (error)
258 goto failed_input;
259
260 inputdev = dev_get_drvdata(&acpi->dev);
261 dev_set_drvdata(&inputdev->dev, accel);
262
263 return 0;
264
265failed_input:
266 device_remove_file(&acpi->dev, &cmpc_accel_sensitivity_attr);
267failed_file:
268 kfree(accel);
269 return error;
270}
271
272static int cmpc_accel_remove(struct acpi_device *acpi, int type)
273{
274 struct input_dev *inputdev;
275 struct cmpc_accel *accel;
276
277 inputdev = dev_get_drvdata(&acpi->dev);
278 accel = dev_get_drvdata(&inputdev->dev);
279
280 device_remove_file(&acpi->dev, &cmpc_accel_sensitivity_attr);
281 return cmpc_remove_acpi_notify_device(acpi);
282}
283
284static const struct acpi_device_id cmpc_accel_device_ids[] = {
285 {"ACCE0000", 0},
286 {"", 0}
287};
288MODULE_DEVICE_TABLE(acpi, cmpc_accel_device_ids);
289
290static struct acpi_driver cmpc_accel_acpi_driver = {
291 .owner = THIS_MODULE,
292 .name = "cmpc_accel",
293 .class = "cmpc_accel",
294 .ids = cmpc_accel_device_ids,
295 .ops = {
296 .add = cmpc_accel_add,
297 .remove = cmpc_accel_remove,
298 .notify = cmpc_accel_handler,
299 }
300};
301
302
303/*
304 * Tablet mode code.
305 */
306static acpi_status cmpc_get_tablet(acpi_handle handle,
307 unsigned long long *value)
308{
309 union acpi_object param;
310 struct acpi_object_list input;
311 unsigned long long output;
312 acpi_status status;
313
314 param.type = ACPI_TYPE_INTEGER;
315 param.integer.value = 0x01;
316 input.count = 1;
317 input.pointer = &param;
318 status = acpi_evaluate_integer(handle, "TCMD", &input, &output);
319 if (ACPI_SUCCESS(status))
320 *value = output;
321 return status;
322}
323
324static void cmpc_tablet_handler(struct acpi_device *dev, u32 event)
325{
326 unsigned long long val = 0;
327 struct input_dev *inputdev = dev_get_drvdata(&dev->dev);
328
329 if (event == 0x81) {
330 if (ACPI_SUCCESS(cmpc_get_tablet(dev->handle, &val)))
331 input_report_switch(inputdev, SW_TABLET_MODE, !val);
332 }
333}
334
335static void cmpc_tablet_idev_init(struct input_dev *inputdev)
336{
337 unsigned long long val = 0;
338 struct acpi_device *acpi;
339
340 set_bit(EV_SW, inputdev->evbit);
341 set_bit(SW_TABLET_MODE, inputdev->swbit);
342
343 acpi = to_acpi_device(inputdev->dev.parent);
344 if (ACPI_SUCCESS(cmpc_get_tablet(acpi->handle, &val)))
345 input_report_switch(inputdev, SW_TABLET_MODE, !val);
346}
347
348static int cmpc_tablet_add(struct acpi_device *acpi)
349{
350 return cmpc_add_acpi_notify_device(acpi, "cmpc_tablet",
351 cmpc_tablet_idev_init);
352}
353
354static int cmpc_tablet_remove(struct acpi_device *acpi, int type)
355{
356 return cmpc_remove_acpi_notify_device(acpi);
357}
358
359static int cmpc_tablet_resume(struct acpi_device *acpi)
360{
361 struct input_dev *inputdev = dev_get_drvdata(&acpi->dev);
362 unsigned long long val = 0;
363 if (ACPI_SUCCESS(cmpc_get_tablet(acpi->handle, &val)))
364 input_report_switch(inputdev, SW_TABLET_MODE, !val);
365 return 0;
366}
367
368static const struct acpi_device_id cmpc_tablet_device_ids[] = {
369 {"TBLT0000", 0},
370 {"", 0}
371};
372MODULE_DEVICE_TABLE(acpi, cmpc_tablet_device_ids);
373
374static struct acpi_driver cmpc_tablet_acpi_driver = {
375 .owner = THIS_MODULE,
376 .name = "cmpc_tablet",
377 .class = "cmpc_tablet",
378 .ids = cmpc_tablet_device_ids,
379 .ops = {
380 .add = cmpc_tablet_add,
381 .remove = cmpc_tablet_remove,
382 .resume = cmpc_tablet_resume,
383 .notify = cmpc_tablet_handler,
384 }
385};
386
387
388/*
389 * Backlight code.
390 */
391
392static acpi_status cmpc_get_brightness(acpi_handle handle,
393 unsigned long long *value)
394{
395 union acpi_object param;
396 struct acpi_object_list input;
397 unsigned long long output;
398 acpi_status status;
399
400 param.type = ACPI_TYPE_INTEGER;
401 param.integer.value = 0xC0;
402 input.count = 1;
403 input.pointer = &param;
404 status = acpi_evaluate_integer(handle, "GRDI", &input, &output);
405 if (ACPI_SUCCESS(status))
406 *value = output;
407 return status;
408}
409
410static acpi_status cmpc_set_brightness(acpi_handle handle,
411 unsigned long long value)
412{
413 union acpi_object param[2];
414 struct acpi_object_list input;
415 acpi_status status;
416 unsigned long long output;
417
418 param[0].type = ACPI_TYPE_INTEGER;
419 param[0].integer.value = 0xC0;
420 param[1].type = ACPI_TYPE_INTEGER;
421 param[1].integer.value = value;
422 input.count = 2;
423 input.pointer = param;
424 status = acpi_evaluate_integer(handle, "GWRI", &input, &output);
425 return status;
426}
427
428static int cmpc_bl_get_brightness(struct backlight_device *bd)
429{
430 acpi_status status;
431 acpi_handle handle;
432 unsigned long long brightness;
433
434 handle = bl_get_data(bd);
435 status = cmpc_get_brightness(handle, &brightness);
436 if (ACPI_SUCCESS(status))
437 return brightness;
438 else
439 return -1;
440}
441
442static int cmpc_bl_update_status(struct backlight_device *bd)
443{
444 acpi_status status;
445 acpi_handle handle;
446
447 handle = bl_get_data(bd);
448 status = cmpc_set_brightness(handle, bd->props.brightness);
449 if (ACPI_SUCCESS(status))
450 return 0;
451 else
452 return -1;
453}
454
455static struct backlight_ops cmpc_bl_ops = {
456 .get_brightness = cmpc_bl_get_brightness,
457 .update_status = cmpc_bl_update_status
458};
459
460static int cmpc_bl_add(struct acpi_device *acpi)
461{
462 struct backlight_device *bd;
463
464 bd = backlight_device_register("cmpc_bl", &acpi->dev,
465 acpi->handle, &cmpc_bl_ops);
466 bd->props.max_brightness = 7;
467 dev_set_drvdata(&acpi->dev, bd);
468 return 0;
469}
470
471static int cmpc_bl_remove(struct acpi_device *acpi, int type)
472{
473 struct backlight_device *bd;
474
475 bd = dev_get_drvdata(&acpi->dev);
476 backlight_device_unregister(bd);
477 return 0;
478}
479
480static const struct acpi_device_id cmpc_device_ids[] = {
481 {"IPML200", 0},
482 {"", 0}
483};
484MODULE_DEVICE_TABLE(acpi, cmpc_device_ids);
485
486static struct acpi_driver cmpc_bl_acpi_driver = {
487 .owner = THIS_MODULE,
488 .name = "cmpc",
489 .class = "cmpc",
490 .ids = cmpc_device_ids,
491 .ops = {
492 .add = cmpc_bl_add,
493 .remove = cmpc_bl_remove
494 }
495};
496
497
498/*
499 * Extra keys code.
500 */
501static int cmpc_keys_codes[] = {
502 KEY_UNKNOWN,
503 KEY_WLAN,
504 KEY_SWITCHVIDEOMODE,
505 KEY_BRIGHTNESSDOWN,
506 KEY_BRIGHTNESSUP,
507 KEY_VENDOR,
508 KEY_MAX
509};
510
511static void cmpc_keys_handler(struct acpi_device *dev, u32 event)
512{
513 struct input_dev *inputdev;
514 int code = KEY_MAX;
515
516 if ((event & 0x0F) < ARRAY_SIZE(cmpc_keys_codes))
517 code = cmpc_keys_codes[event & 0x0F];
518 inputdev = dev_get_drvdata(&dev->dev);;
519 input_report_key(inputdev, code, !(event & 0x10));
520}
521
522static void cmpc_keys_idev_init(struct input_dev *inputdev)
523{
524 int i;
525
526 set_bit(EV_KEY, inputdev->evbit);
527 for (i = 0; cmpc_keys_codes[i] != KEY_MAX; i++)
528 set_bit(cmpc_keys_codes[i], inputdev->keybit);
529}
530
531static int cmpc_keys_add(struct acpi_device *acpi)
532{
533 return cmpc_add_acpi_notify_device(acpi, "cmpc_keys",
534 cmpc_keys_idev_init);
535}
536
537static int cmpc_keys_remove(struct acpi_device *acpi, int type)
538{
539 return cmpc_remove_acpi_notify_device(acpi);
540}
541
542static const struct acpi_device_id cmpc_keys_device_ids[] = {
543 {"FnBT0000", 0},
544 {"", 0}
545};
546MODULE_DEVICE_TABLE(acpi, cmpc_keys_device_ids);
547
548static struct acpi_driver cmpc_keys_acpi_driver = {
549 .owner = THIS_MODULE,
550 .name = "cmpc_keys",
551 .class = "cmpc_keys",
552 .ids = cmpc_keys_device_ids,
553 .ops = {
554 .add = cmpc_keys_add,
555 .remove = cmpc_keys_remove,
556 .notify = cmpc_keys_handler,
557 }
558};
559
560
561/*
562 * General init/exit code.
563 */
564
565static int cmpc_init(void)
566{
567 int r;
568
569 r = acpi_bus_register_driver(&cmpc_keys_acpi_driver);
570 if (r)
571 goto failed_keys;
572
573 r = acpi_bus_register_driver(&cmpc_bl_acpi_driver);
574 if (r)
575 goto failed_bl;
576
577 r = acpi_bus_register_driver(&cmpc_tablet_acpi_driver);
578 if (r)
579 goto failed_tablet;
580
581 r = acpi_bus_register_driver(&cmpc_accel_acpi_driver);
582 if (r)
583 goto failed_accel;
584
585 return r;
586
587failed_accel:
588 acpi_bus_unregister_driver(&cmpc_tablet_acpi_driver);
589
590failed_tablet:
591 acpi_bus_unregister_driver(&cmpc_bl_acpi_driver);
592
593failed_bl:
594 acpi_bus_unregister_driver(&cmpc_keys_acpi_driver);
595
596failed_keys:
597 return r;
598}
599
600static void cmpc_exit(void)
601{
602 acpi_bus_unregister_driver(&cmpc_accel_acpi_driver);
603 acpi_bus_unregister_driver(&cmpc_tablet_acpi_driver);
604 acpi_bus_unregister_driver(&cmpc_bl_acpi_driver);
605 acpi_bus_unregister_driver(&cmpc_keys_acpi_driver);
606}
607
608module_init(cmpc_init);
609module_exit(cmpc_exit);
diff --git a/drivers/platform/x86/compal-laptop.c b/drivers/platform/x86/compal-laptop.c
index 11003bba10d3..1a387e79f719 100644
--- a/drivers/platform/x86/compal-laptop.c
+++ b/drivers/platform/x86/compal-laptop.c
@@ -51,7 +51,6 @@
51#include <linux/dmi.h> 51#include <linux/dmi.h>
52#include <linux/backlight.h> 52#include <linux/backlight.h>
53#include <linux/platform_device.h> 53#include <linux/platform_device.h>
54#include <linux/autoconf.h>
55 54
56#define COMPAL_DRIVER_VERSION "0.2.6" 55#define COMPAL_DRIVER_VERSION "0.2.6"
57 56
diff --git a/drivers/platform/x86/dell-laptop.c b/drivers/platform/x86/dell-laptop.c
index 74909c4aaeea..3780994dc8f2 100644
--- a/drivers/platform/x86/dell-laptop.c
+++ b/drivers/platform/x86/dell-laptop.c
@@ -58,6 +58,14 @@ static int da_command_code;
58static int da_num_tokens; 58static int da_num_tokens;
59static struct calling_interface_token *da_tokens; 59static struct calling_interface_token *da_tokens;
60 60
61static struct platform_driver platform_driver = {
62 .driver = {
63 .name = "dell-laptop",
64 .owner = THIS_MODULE,
65 }
66};
67
68static struct platform_device *platform_device;
61static struct backlight_device *dell_backlight_device; 69static struct backlight_device *dell_backlight_device;
62static struct rfkill *wifi_rfkill; 70static struct rfkill *wifi_rfkill;
63static struct rfkill *bluetooth_rfkill; 71static struct rfkill *bluetooth_rfkill;
@@ -74,7 +82,7 @@ static const struct dmi_system_id __initdata dell_device_table[] = {
74 { } 82 { }
75}; 83};
76 84
77static void parse_da_table(const struct dmi_header *dm) 85static void __init parse_da_table(const struct dmi_header *dm)
78{ 86{
79 /* Final token is a terminator, so we don't want to copy it */ 87 /* Final token is a terminator, so we don't want to copy it */
80 int tokens = (dm->length-11)/sizeof(struct calling_interface_token)-1; 88 int tokens = (dm->length-11)/sizeof(struct calling_interface_token)-1;
@@ -103,7 +111,7 @@ static void parse_da_table(const struct dmi_header *dm)
103 da_num_tokens += tokens; 111 da_num_tokens += tokens;
104} 112}
105 113
106static void find_tokens(const struct dmi_header *dm, void *dummy) 114static void __init find_tokens(const struct dmi_header *dm, void *dummy)
107{ 115{
108 switch (dm->type) { 116 switch (dm->type) {
109 case 0xd4: /* Indexed IO */ 117 case 0xd4: /* Indexed IO */
@@ -197,8 +205,8 @@ static void dell_rfkill_query(struct rfkill *rfkill, void *data)
197 dell_send_request(&buffer, 17, 11); 205 dell_send_request(&buffer, 17, 11);
198 status = buffer.output[1]; 206 status = buffer.output[1];
199 207
200 if (status & BIT(bit)) 208 rfkill_set_sw_state(rfkill, !!(status & BIT(bit)));
201 rfkill_set_hw_state(rfkill, !!(status & BIT(16))); 209 rfkill_set_hw_state(rfkill, !(status & BIT(16)));
202} 210}
203 211
204static const struct rfkill_ops dell_rfkill_ops = { 212static const struct rfkill_ops dell_rfkill_ops = {
@@ -206,7 +214,7 @@ static const struct rfkill_ops dell_rfkill_ops = {
206 .query = dell_rfkill_query, 214 .query = dell_rfkill_query,
207}; 215};
208 216
209static int dell_setup_rfkill(void) 217static int __init dell_setup_rfkill(void)
210{ 218{
211 struct calling_interface_buffer buffer; 219 struct calling_interface_buffer buffer;
212 int status; 220 int status;
@@ -217,7 +225,8 @@ static int dell_setup_rfkill(void)
217 status = buffer.output[1]; 225 status = buffer.output[1];
218 226
219 if ((status & (1<<2|1<<8)) == (1<<2|1<<8)) { 227 if ((status & (1<<2|1<<8)) == (1<<2|1<<8)) {
220 wifi_rfkill = rfkill_alloc("dell-wifi", NULL, RFKILL_TYPE_WLAN, 228 wifi_rfkill = rfkill_alloc("dell-wifi", &platform_device->dev,
229 RFKILL_TYPE_WLAN,
221 &dell_rfkill_ops, (void *) 1); 230 &dell_rfkill_ops, (void *) 1);
222 if (!wifi_rfkill) { 231 if (!wifi_rfkill) {
223 ret = -ENOMEM; 232 ret = -ENOMEM;
@@ -229,7 +238,8 @@ static int dell_setup_rfkill(void)
229 } 238 }
230 239
231 if ((status & (1<<3|1<<9)) == (1<<3|1<<9)) { 240 if ((status & (1<<3|1<<9)) == (1<<3|1<<9)) {
232 bluetooth_rfkill = rfkill_alloc("dell-bluetooth", NULL, 241 bluetooth_rfkill = rfkill_alloc("dell-bluetooth",
242 &platform_device->dev,
233 RFKILL_TYPE_BLUETOOTH, 243 RFKILL_TYPE_BLUETOOTH,
234 &dell_rfkill_ops, (void *) 2); 244 &dell_rfkill_ops, (void *) 2);
235 if (!bluetooth_rfkill) { 245 if (!bluetooth_rfkill) {
@@ -242,7 +252,9 @@ static int dell_setup_rfkill(void)
242 } 252 }
243 253
244 if ((status & (1<<4|1<<10)) == (1<<4|1<<10)) { 254 if ((status & (1<<4|1<<10)) == (1<<4|1<<10)) {
245 wwan_rfkill = rfkill_alloc("dell-wwan", NULL, RFKILL_TYPE_WWAN, 255 wwan_rfkill = rfkill_alloc("dell-wwan",
256 &platform_device->dev,
257 RFKILL_TYPE_WWAN,
246 &dell_rfkill_ops, (void *) 3); 258 &dell_rfkill_ops, (void *) 3);
247 if (!wwan_rfkill) { 259 if (!wwan_rfkill) {
248 ret = -ENOMEM; 260 ret = -ENOMEM;
@@ -268,6 +280,22 @@ err_wifi:
268 return ret; 280 return ret;
269} 281}
270 282
283static void dell_cleanup_rfkill(void)
284{
285 if (wifi_rfkill) {
286 rfkill_unregister(wifi_rfkill);
287 rfkill_destroy(wifi_rfkill);
288 }
289 if (bluetooth_rfkill) {
290 rfkill_unregister(bluetooth_rfkill);
291 rfkill_destroy(bluetooth_rfkill);
292 }
293 if (wwan_rfkill) {
294 rfkill_unregister(wwan_rfkill);
295 rfkill_destroy(wwan_rfkill);
296 }
297}
298
271static int dell_send_intensity(struct backlight_device *bd) 299static int dell_send_intensity(struct backlight_device *bd)
272{ 300{
273 struct calling_interface_buffer buffer; 301 struct calling_interface_buffer buffer;
@@ -326,11 +354,23 @@ static int __init dell_init(void)
326 return -ENODEV; 354 return -ENODEV;
327 } 355 }
328 356
357 ret = platform_driver_register(&platform_driver);
358 if (ret)
359 goto fail_platform_driver;
360 platform_device = platform_device_alloc("dell-laptop", -1);
361 if (!platform_device) {
362 ret = -ENOMEM;
363 goto fail_platform_device1;
364 }
365 ret = platform_device_add(platform_device);
366 if (ret)
367 goto fail_platform_device2;
368
329 ret = dell_setup_rfkill(); 369 ret = dell_setup_rfkill();
330 370
331 if (ret) { 371 if (ret) {
332 printk(KERN_WARNING "dell-laptop: Unable to setup rfkill\n"); 372 printk(KERN_WARNING "dell-laptop: Unable to setup rfkill\n");
333 goto out; 373 goto fail_rfkill;
334 } 374 }
335 375
336#ifdef CONFIG_ACPI 376#ifdef CONFIG_ACPI
@@ -352,13 +392,13 @@ static int __init dell_init(void)
352 if (max_intensity) { 392 if (max_intensity) {
353 dell_backlight_device = backlight_device_register( 393 dell_backlight_device = backlight_device_register(
354 "dell_backlight", 394 "dell_backlight",
355 NULL, NULL, 395 &platform_device->dev, NULL,
356 &dell_ops); 396 &dell_ops);
357 397
358 if (IS_ERR(dell_backlight_device)) { 398 if (IS_ERR(dell_backlight_device)) {
359 ret = PTR_ERR(dell_backlight_device); 399 ret = PTR_ERR(dell_backlight_device);
360 dell_backlight_device = NULL; 400 dell_backlight_device = NULL;
361 goto out; 401 goto fail_backlight;
362 } 402 }
363 403
364 dell_backlight_device->props.max_brightness = max_intensity; 404 dell_backlight_device->props.max_brightness = max_intensity;
@@ -368,13 +408,16 @@ static int __init dell_init(void)
368 } 408 }
369 409
370 return 0; 410 return 0;
371out: 411
372 if (wifi_rfkill) 412fail_backlight:
373 rfkill_unregister(wifi_rfkill); 413 dell_cleanup_rfkill();
374 if (bluetooth_rfkill) 414fail_rfkill:
375 rfkill_unregister(bluetooth_rfkill); 415 platform_device_del(platform_device);
376 if (wwan_rfkill) 416fail_platform_device2:
377 rfkill_unregister(wwan_rfkill); 417 platform_device_put(platform_device);
418fail_platform_device1:
419 platform_driver_unregister(&platform_driver);
420fail_platform_driver:
378 kfree(da_tokens); 421 kfree(da_tokens);
379 return ret; 422 return ret;
380} 423}
@@ -382,12 +425,7 @@ out:
382static void __exit dell_exit(void) 425static void __exit dell_exit(void)
383{ 426{
384 backlight_device_unregister(dell_backlight_device); 427 backlight_device_unregister(dell_backlight_device);
385 if (wifi_rfkill) 428 dell_cleanup_rfkill();
386 rfkill_unregister(wifi_rfkill);
387 if (bluetooth_rfkill)
388 rfkill_unregister(bluetooth_rfkill);
389 if (wwan_rfkill)
390 rfkill_unregister(wwan_rfkill);
391} 429}
392 430
393module_init(dell_init); 431module_init(dell_init);
diff --git a/drivers/platform/x86/dell-wmi.c b/drivers/platform/x86/dell-wmi.c
index 0f900cc9fa7a..1b1dddbd5744 100644
--- a/drivers/platform/x86/dell-wmi.c
+++ b/drivers/platform/x86/dell-wmi.c
@@ -31,6 +31,7 @@
31#include <acpi/acpi_drivers.h> 31#include <acpi/acpi_drivers.h>
32#include <linux/acpi.h> 32#include <linux/acpi.h>
33#include <linux/string.h> 33#include <linux/string.h>
34#include <linux/dmi.h>
34 35
35MODULE_AUTHOR("Matthew Garrett <mjg@redhat.com>"); 36MODULE_AUTHOR("Matthew Garrett <mjg@redhat.com>");
36MODULE_DESCRIPTION("Dell laptop WMI hotkeys driver"); 37MODULE_DESCRIPTION("Dell laptop WMI hotkeys driver");
@@ -38,6 +39,8 @@ MODULE_LICENSE("GPL");
38 39
39#define DELL_EVENT_GUID "9DBB5994-A997-11DA-B012-B622A1EF5492" 40#define DELL_EVENT_GUID "9DBB5994-A997-11DA-B012-B622A1EF5492"
40 41
42static int acpi_video;
43
41MODULE_ALIAS("wmi:"DELL_EVENT_GUID); 44MODULE_ALIAS("wmi:"DELL_EVENT_GUID);
42 45
43struct key_entry { 46struct key_entry {
@@ -54,7 +57,7 @@ enum { KE_KEY, KE_SW, KE_IGNORE, KE_END };
54 * via the keyboard controller so should not be sent again. 57 * via the keyboard controller so should not be sent again.
55 */ 58 */
56 59
57static struct key_entry dell_wmi_keymap[] = { 60static struct key_entry dell_legacy_wmi_keymap[] = {
58 {KE_KEY, 0xe045, KEY_PROG1}, 61 {KE_KEY, 0xe045, KEY_PROG1},
59 {KE_KEY, 0xe009, KEY_EJECTCD}, 62 {KE_KEY, 0xe009, KEY_EJECTCD},
60 63
@@ -72,7 +75,7 @@ static struct key_entry dell_wmi_keymap[] = {
72 75
73 /* The next device is at offset 6, the active devices are at 76 /* The next device is at offset 6, the active devices are at
74 offset 8 and the attached devices at offset 10 */ 77 offset 8 and the attached devices at offset 10 */
75 {KE_KEY, 0xe00b, KEY_DISPLAYTOGGLE}, 78 {KE_KEY, 0xe00b, KEY_SWITCHVIDEOMODE},
76 79
77 {KE_IGNORE, 0xe00c, KEY_KBDILLUMTOGGLE}, 80 {KE_IGNORE, 0xe00c, KEY_KBDILLUMTOGGLE},
78 81
@@ -96,6 +99,47 @@ static struct key_entry dell_wmi_keymap[] = {
96 {KE_END, 0} 99 {KE_END, 0}
97}; 100};
98 101
102static bool dell_new_hk_type;
103
104struct dell_new_keymap_entry {
105 u16 scancode;
106 u16 keycode;
107};
108
109struct dell_hotkey_table {
110 struct dmi_header header;
111 struct dell_new_keymap_entry keymap[];
112
113};
114
115static struct key_entry *dell_new_wmi_keymap;
116
117static u16 bios_to_linux_keycode[256] = {
118
119 KEY_MEDIA, KEY_NEXTSONG, KEY_PLAYPAUSE, KEY_PREVIOUSSONG,
120 KEY_STOPCD, KEY_UNKNOWN, KEY_UNKNOWN, KEY_UNKNOWN,
121 KEY_WWW, KEY_UNKNOWN, KEY_VOLUMEDOWN, KEY_MUTE,
122 KEY_VOLUMEUP, KEY_UNKNOWN, KEY_BATTERY, KEY_EJECTCD,
123 KEY_UNKNOWN, KEY_SLEEP, KEY_PROG1, KEY_BRIGHTNESSDOWN,
124 KEY_BRIGHTNESSUP, KEY_UNKNOWN, KEY_KBDILLUMTOGGLE,
125 KEY_UNKNOWN, KEY_SWITCHVIDEOMODE, KEY_UNKNOWN, KEY_UNKNOWN,
126 KEY_SWITCHVIDEOMODE, KEY_UNKNOWN, KEY_UNKNOWN, KEY_PROG2,
127 KEY_UNKNOWN, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
128 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
129 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
130 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
131 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
132 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
133 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
134 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
135 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
136 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
137 KEY_PROG3
138};
139
140
141static struct key_entry *dell_wmi_keymap = dell_legacy_wmi_keymap;
142
99static struct input_dev *dell_wmi_input_dev; 143static struct input_dev *dell_wmi_input_dev;
100 144
101static struct key_entry *dell_wmi_get_entry_by_scancode(int code) 145static struct key_entry *dell_wmi_get_entry_by_scancode(int code)
@@ -158,30 +202,90 @@ static void dell_wmi_notify(u32 value, void *context)
158 struct acpi_buffer response = { ACPI_ALLOCATE_BUFFER, NULL }; 202 struct acpi_buffer response = { ACPI_ALLOCATE_BUFFER, NULL };
159 static struct key_entry *key; 203 static struct key_entry *key;
160 union acpi_object *obj; 204 union acpi_object *obj;
205 acpi_status status;
161 206
162 wmi_get_event_data(value, &response); 207 status = wmi_get_event_data(value, &response);
208 if (status != AE_OK) {
209 printk(KERN_INFO "dell-wmi: bad event status 0x%x\n", status);
210 return;
211 }
163 212
164 obj = (union acpi_object *)response.pointer; 213 obj = (union acpi_object *)response.pointer;
165 214
166 if (obj && obj->type == ACPI_TYPE_BUFFER) { 215 if (obj && obj->type == ACPI_TYPE_BUFFER) {
167 int *buffer = (int *)obj->buffer.pointer; 216 int reported_key;
168 /* 217 u16 *buffer_entry = (u16 *)obj->buffer.pointer;
169 * The upper bytes of the event may contain 218 if (dell_new_hk_type && (buffer_entry[1] != 0x10)) {
170 * additional information, so mask them off for the 219 printk(KERN_INFO "dell-wmi: Received unknown WMI event"
171 * scancode lookup 220 " (0x%x)\n", buffer_entry[1]);
172 */ 221 return;
173 key = dell_wmi_get_entry_by_scancode(buffer[1] & 0xFFFF); 222 }
174 if (key) { 223
224 if (dell_new_hk_type)
225 reported_key = (int)buffer_entry[2];
226 else
227 reported_key = (int)buffer_entry[1] & 0xffff;
228
229 key = dell_wmi_get_entry_by_scancode(reported_key);
230
231 if (!key) {
232 printk(KERN_INFO "dell-wmi: Unknown key %x pressed\n",
233 reported_key);
234 } else if ((key->keycode == KEY_BRIGHTNESSUP ||
235 key->keycode == KEY_BRIGHTNESSDOWN) && acpi_video) {
236 /* Don't report brightness notifications that will also
237 * come via ACPI */
238 return;
239 } else {
175 input_report_key(dell_wmi_input_dev, key->keycode, 1); 240 input_report_key(dell_wmi_input_dev, key->keycode, 1);
176 input_sync(dell_wmi_input_dev); 241 input_sync(dell_wmi_input_dev);
177 input_report_key(dell_wmi_input_dev, key->keycode, 0); 242 input_report_key(dell_wmi_input_dev, key->keycode, 0);
178 input_sync(dell_wmi_input_dev); 243 input_sync(dell_wmi_input_dev);
179 } else if (buffer[1] & 0xFFFF) 244 }
180 printk(KERN_INFO "dell-wmi: Unknown key %x pressed\n", 245 }
181 buffer[1] & 0xFFFF); 246 kfree(obj);
247}
248
249
250static void setup_new_hk_map(const struct dmi_header *dm)
251{
252
253 int i;
254 int hotkey_num = (dm->length-4)/sizeof(struct dell_new_keymap_entry);
255 struct dell_hotkey_table *table =
256 container_of(dm, struct dell_hotkey_table, header);
257
258 dell_new_wmi_keymap = kzalloc((hotkey_num+1) *
259 sizeof(struct key_entry), GFP_KERNEL);
260
261 for (i = 0; i < hotkey_num; i++) {
262 dell_new_wmi_keymap[i].type = KE_KEY;
263 dell_new_wmi_keymap[i].code = table->keymap[i].scancode;
264 dell_new_wmi_keymap[i].keycode =
265 (table->keymap[i].keycode > 255) ? 0 :
266 bios_to_linux_keycode[table->keymap[i].keycode];
267 }
268
269 dell_new_wmi_keymap[i].type = KE_END;
270 dell_new_wmi_keymap[i].code = 0;
271 dell_new_wmi_keymap[i].keycode = 0;
272
273 dell_wmi_keymap = dell_new_wmi_keymap;
274
275}
276
277
278static void find_hk_type(const struct dmi_header *dm, void *dummy)
279{
280
281 if ((dm->type == 0xb2) && (dm->length > 6)) {
282 dell_new_hk_type = true;
283 setup_new_hk_map(dm);
182 } 284 }
285
183} 286}
184 287
288
185static int __init dell_wmi_input_setup(void) 289static int __init dell_wmi_input_setup(void)
186{ 290{
187 struct key_entry *key; 291 struct key_entry *key;
@@ -224,34 +328,37 @@ static int __init dell_wmi_input_setup(void)
224static int __init dell_wmi_init(void) 328static int __init dell_wmi_init(void)
225{ 329{
226 int err; 330 int err;
331 acpi_status status;
227 332
228 if (wmi_has_guid(DELL_EVENT_GUID)) { 333 if (!wmi_has_guid(DELL_EVENT_GUID)) {
229 err = dell_wmi_input_setup(); 334 printk(KERN_WARNING "dell-wmi: No known WMI GUID found\n");
335 return -ENODEV;
336 }
230 337
231 if (err) 338 dmi_walk(find_hk_type, NULL);
232 return err; 339 acpi_video = acpi_video_backlight_support();
233 340
234 err = wmi_install_notify_handler(DELL_EVENT_GUID, 341 err = dell_wmi_input_setup();
235 dell_wmi_notify, NULL); 342 if (err)
236 if (err) { 343 return err;
237 input_unregister_device(dell_wmi_input_dev);
238 printk(KERN_ERR "dell-wmi: Unable to register"
239 " notify handler - %d\n", err);
240 return err;
241 }
242 344
243 } else 345 status = wmi_install_notify_handler(DELL_EVENT_GUID,
244 printk(KERN_WARNING "dell-wmi: No known WMI GUID found\n"); 346 dell_wmi_notify, NULL);
347 if (ACPI_FAILURE(status)) {
348 input_unregister_device(dell_wmi_input_dev);
349 printk(KERN_ERR
350 "dell-wmi: Unable to register notify handler - %d\n",
351 status);
352 return -ENODEV;
353 }
245 354
246 return 0; 355 return 0;
247} 356}
248 357
249static void __exit dell_wmi_exit(void) 358static void __exit dell_wmi_exit(void)
250{ 359{
251 if (wmi_has_guid(DELL_EVENT_GUID)) { 360 wmi_remove_notify_handler(DELL_EVENT_GUID);
252 wmi_remove_notify_handler(DELL_EVENT_GUID); 361 input_unregister_device(dell_wmi_input_dev);
253 input_unregister_device(dell_wmi_input_dev);
254 }
255} 362}
256 363
257module_init(dell_wmi_init); 364module_init(dell_wmi_init);
diff --git a/drivers/platform/x86/eeepc-laptop.c b/drivers/platform/x86/eeepc-laptop.c
index e647a856b9bf..e2be6bb33d92 100644
--- a/drivers/platform/x86/eeepc-laptop.c
+++ b/drivers/platform/x86/eeepc-laptop.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * eepc-laptop.c - Asus Eee PC extras 2 * eeepc-laptop.c - Asus Eee PC extras
3 * 3 *
4 * Based on asus_acpi.c as patched for the Eee PC by Asus: 4 * Based on asus_acpi.c as patched for the Eee PC by Asus:
5 * ftp://ftp.asus.com/pub/ASUS/EeePC/701/ASUS_ACPI_071126.rar 5 * ftp://ftp.asus.com/pub/ASUS/EeePC/701/ASUS_ACPI_071126.rar
@@ -31,23 +31,36 @@
31#include <acpi/acpi_bus.h> 31#include <acpi/acpi_bus.h>
32#include <linux/uaccess.h> 32#include <linux/uaccess.h>
33#include <linux/input.h> 33#include <linux/input.h>
34#include <linux/input/sparse-keymap.h>
34#include <linux/rfkill.h> 35#include <linux/rfkill.h>
35#include <linux/pci.h> 36#include <linux/pci.h>
36#include <linux/pci_hotplug.h> 37#include <linux/pci_hotplug.h>
38#include <linux/leds.h>
39#include <linux/dmi.h>
37 40
38#define EEEPC_LAPTOP_VERSION "0.1" 41#define EEEPC_LAPTOP_VERSION "0.1"
42#define EEEPC_LAPTOP_NAME "Eee PC Hotkey Driver"
43#define EEEPC_LAPTOP_FILE "eeepc"
39 44
40#define EEEPC_HOTK_NAME "Eee PC Hotkey Driver" 45#define EEEPC_ACPI_CLASS "hotkey"
41#define EEEPC_HOTK_FILE "eeepc" 46#define EEEPC_ACPI_DEVICE_NAME "Hotkey"
42#define EEEPC_HOTK_CLASS "hotkey" 47#define EEEPC_ACPI_HID "ASUS010"
43#define EEEPC_HOTK_DEVICE_NAME "Hotkey"
44#define EEEPC_HOTK_HID "ASUS010"
45 48
49MODULE_AUTHOR("Corentin Chary, Eric Cooper");
50MODULE_DESCRIPTION(EEEPC_LAPTOP_NAME);
51MODULE_LICENSE("GPL");
52
53static bool hotplug_disabled;
54
55module_param(hotplug_disabled, bool, 0644);
56MODULE_PARM_DESC(hotplug_disabled,
57 "Disable hotplug for wireless device. "
58 "If your laptop need that, please report to "
59 "acpi4asus-user@lists.sourceforge.net.");
46 60
47/* 61/*
48 * Definitions for Asus EeePC 62 * Definitions for Asus EeePC
49 */ 63 */
50#define NOTIFY_WLAN_ON 0x10
51#define NOTIFY_BRN_MIN 0x20 64#define NOTIFY_BRN_MIN 0x20
52#define NOTIFY_BRN_MAX 0x2f 65#define NOTIFY_BRN_MAX 0x2f
53 66
@@ -117,145 +130,64 @@ static const char *cm_setv[] = {
117 NULL, NULL, "PBPS", "TPDS" 130 NULL, NULL, "PBPS", "TPDS"
118}; 131};
119 132
120#define EEEPC_EC "\\_SB.PCI0.SBRG.EC0." 133static const struct key_entry eeepc_keymap[] = {
121 134 { KE_KEY, 0x10, { KEY_WLAN } },
122#define EEEPC_EC_FAN_PWM EEEPC_EC "SC02" /* Fan PWM duty cycle (%) */ 135 { KE_KEY, 0x11, { KEY_WLAN } },
123#define EEEPC_EC_SC02 0x63 136 { KE_KEY, 0x12, { KEY_PROG1 } },
124#define EEEPC_EC_FAN_HRPM EEEPC_EC "SC05" /* High byte, fan speed (RPM) */ 137 { KE_KEY, 0x13, { KEY_MUTE } },
125#define EEEPC_EC_FAN_LRPM EEEPC_EC "SC06" /* Low byte, fan speed (RPM) */ 138 { KE_KEY, 0x14, { KEY_VOLUMEDOWN } },
126#define EEEPC_EC_FAN_CTRL EEEPC_EC "SFB3" /* Byte containing SF25 */ 139 { KE_KEY, 0x15, { KEY_VOLUMEUP } },
127#define EEEPC_EC_SFB3 0xD3 140 { KE_KEY, 0x16, { KEY_DISPLAY_OFF } },
141 { KE_KEY, 0x1a, { KEY_COFFEE } },
142 { KE_KEY, 0x1b, { KEY_ZOOM } },
143 { KE_KEY, 0x1c, { KEY_PROG2 } },
144 { KE_KEY, 0x1d, { KEY_PROG3 } },
145 { KE_KEY, NOTIFY_BRN_MIN, { KEY_BRIGHTNESSDOWN } },
146 { KE_KEY, NOTIFY_BRN_MAX, { KEY_BRIGHTNESSUP } },
147 { KE_KEY, 0x30, { KEY_SWITCHVIDEOMODE } },
148 { KE_KEY, 0x31, { KEY_SWITCHVIDEOMODE } },
149 { KE_KEY, 0x32, { KEY_SWITCHVIDEOMODE } },
150 { KE_KEY, 0x37, { KEY_F13 } }, /* Disable Touchpad */
151 { KE_KEY, 0x38, { KEY_F14 } },
152 { KE_END, 0 },
153};
128 154
129/* 155/*
130 * This is the main structure, we can use it to store useful information 156 * This is the main structure, we can use it to store useful information
131 * about the hotk device
132 */ 157 */
133struct eeepc_hotk { 158struct eeepc_laptop {
134 struct acpi_device *device; /* the device we are in */ 159 acpi_handle handle; /* the handle of the acpi device */
135 acpi_handle handle; /* the handle of the hotk device */
136 u32 cm_supported; /* the control methods supported 160 u32 cm_supported; /* the control methods supported
137 by this BIOS */ 161 by this BIOS */
138 uint init_flag; /* Init flags */ 162 bool cpufv_disabled;
163 bool hotplug_disabled;
139 u16 event_count[128]; /* count for each event */ 164 u16 event_count[128]; /* count for each event */
165
166 struct platform_device *platform_device;
167 struct device *hwmon_device;
168 struct backlight_device *backlight_device;
169
140 struct input_dev *inputdev; 170 struct input_dev *inputdev;
141 u16 *keycode_map; 171 struct key_entry *keymap;
172
142 struct rfkill *wlan_rfkill; 173 struct rfkill *wlan_rfkill;
143 struct rfkill *bluetooth_rfkill; 174 struct rfkill *bluetooth_rfkill;
144 struct rfkill *wwan3g_rfkill; 175 struct rfkill *wwan3g_rfkill;
145 struct rfkill *wimax_rfkill; 176 struct rfkill *wimax_rfkill;
177
146 struct hotplug_slot *hotplug_slot; 178 struct hotplug_slot *hotplug_slot;
147 struct mutex hotplug_lock; 179 struct mutex hotplug_lock;
148};
149
150/* The actual device the driver binds to */
151static struct eeepc_hotk *ehotk;
152
153/* Platform device/driver */
154static int eeepc_hotk_thaw(struct device *device);
155static int eeepc_hotk_restore(struct device *device);
156
157static const struct dev_pm_ops eeepc_pm_ops = {
158 .thaw = eeepc_hotk_thaw,
159 .restore = eeepc_hotk_restore,
160};
161
162static struct platform_driver platform_driver = {
163 .driver = {
164 .name = EEEPC_HOTK_FILE,
165 .owner = THIS_MODULE,
166 .pm = &eeepc_pm_ops,
167 }
168};
169
170static struct platform_device *platform_device;
171
172struct key_entry {
173 char type;
174 u8 code;
175 u16 keycode;
176};
177
178enum { KE_KEY, KE_END };
179
180static struct key_entry eeepc_keymap[] = {
181 /* Sleep already handled via generic ACPI code */
182 {KE_KEY, 0x10, KEY_WLAN },
183 {KE_KEY, 0x11, KEY_WLAN },
184 {KE_KEY, 0x12, KEY_PROG1 },
185 {KE_KEY, 0x13, KEY_MUTE },
186 {KE_KEY, 0x14, KEY_VOLUMEDOWN },
187 {KE_KEY, 0x15, KEY_VOLUMEUP },
188 {KE_KEY, 0x1a, KEY_COFFEE },
189 {KE_KEY, 0x1b, KEY_ZOOM },
190 {KE_KEY, 0x1c, KEY_PROG2 },
191 {KE_KEY, 0x1d, KEY_PROG3 },
192 {KE_KEY, NOTIFY_BRN_MIN, KEY_BRIGHTNESSDOWN },
193 {KE_KEY, NOTIFY_BRN_MIN + 2, KEY_BRIGHTNESSUP },
194 {KE_KEY, 0x30, KEY_SWITCHVIDEOMODE },
195 {KE_KEY, 0x31, KEY_SWITCHVIDEOMODE },
196 {KE_KEY, 0x32, KEY_SWITCHVIDEOMODE },
197 {KE_END, 0},
198};
199
200/*
201 * The hotkey driver declaration
202 */
203static int eeepc_hotk_add(struct acpi_device *device);
204static int eeepc_hotk_remove(struct acpi_device *device, int type);
205static void eeepc_hotk_notify(struct acpi_device *device, u32 event);
206
207static const struct acpi_device_id eeepc_device_ids[] = {
208 {EEEPC_HOTK_HID, 0},
209 {"", 0},
210};
211MODULE_DEVICE_TABLE(acpi, eeepc_device_ids);
212
213static struct acpi_driver eeepc_hotk_driver = {
214 .name = EEEPC_HOTK_NAME,
215 .class = EEEPC_HOTK_CLASS,
216 .ids = eeepc_device_ids,
217 .flags = ACPI_DRIVER_ALL_NOTIFY_EVENTS,
218 .ops = {
219 .add = eeepc_hotk_add,
220 .remove = eeepc_hotk_remove,
221 .notify = eeepc_hotk_notify,
222 },
223};
224 180
225/* PCI hotplug ops */ 181 struct led_classdev tpd_led;
226static int eeepc_get_adapter_status(struct hotplug_slot *slot, u8 *value); 182 int tpd_led_wk;
227 183 struct workqueue_struct *led_workqueue;
228static struct hotplug_slot_ops eeepc_hotplug_slot_ops = { 184 struct work_struct tpd_led_work;
229 .owner = THIS_MODULE,
230 .get_adapter_status = eeepc_get_adapter_status,
231 .get_power_status = eeepc_get_adapter_status,
232}; 185};
233 186
234/* The backlight device /sys/class/backlight */
235static struct backlight_device *eeepc_backlight_device;
236
237/* The hwmon device */
238static struct device *eeepc_hwmon_device;
239
240/*
241 * The backlight class declaration
242 */
243static int read_brightness(struct backlight_device *bd);
244static int update_bl_status(struct backlight_device *bd);
245static struct backlight_ops eeepcbl_ops = {
246 .get_brightness = read_brightness,
247 .update_status = update_bl_status,
248};
249
250MODULE_AUTHOR("Corentin Chary, Eric Cooper");
251MODULE_DESCRIPTION(EEEPC_HOTK_NAME);
252MODULE_LICENSE("GPL");
253
254/* 187/*
255 * ACPI Helpers 188 * ACPI Helpers
256 */ 189 */
257static int write_acpi_int(acpi_handle handle, const char *method, int val, 190static int write_acpi_int(acpi_handle handle, const char *method, int val)
258 struct acpi_buffer *output)
259{ 191{
260 struct acpi_object_list params; 192 struct acpi_object_list params;
261 union acpi_object in_obj; 193 union acpi_object in_obj;
@@ -266,7 +198,7 @@ static int write_acpi_int(acpi_handle handle, const char *method, int val,
266 in_obj.type = ACPI_TYPE_INTEGER; 198 in_obj.type = ACPI_TYPE_INTEGER;
267 in_obj.integer.value = val; 199 in_obj.integer.value = val;
268 200
269 status = acpi_evaluate_object(handle, (char *)method, &params, output); 201 status = acpi_evaluate_object(handle, (char *)method, &params, NULL);
270 return (status == AE_OK ? 0 : -1); 202 return (status == AE_OK ? 0 : -1);
271} 203}
272 204
@@ -285,81 +217,56 @@ static int read_acpi_int(acpi_handle handle, const char *method, int *val)
285 } 217 }
286} 218}
287 219
288static int set_acpi(int cm, int value) 220static int set_acpi(struct eeepc_laptop *eeepc, int cm, int value)
289{ 221{
290 if (ehotk->cm_supported & (0x1 << cm)) { 222 const char *method = cm_setv[cm];
291 const char *method = cm_setv[cm];
292 if (method == NULL)
293 return -ENODEV;
294 if (write_acpi_int(ehotk->handle, method, value, NULL))
295 pr_warning("Error writing %s\n", method);
296 }
297 return 0;
298}
299
300static int get_acpi(int cm)
301{
302 int value = -ENODEV;
303 if ((ehotk->cm_supported & (0x1 << cm))) {
304 const char *method = cm_getv[cm];
305 if (method == NULL)
306 return -ENODEV;
307 if (read_acpi_int(ehotk->handle, method, &value))
308 pr_warning("Error reading %s\n", method);
309 }
310 return value;
311}
312 223
313/* 224 if (method == NULL)
314 * Backlight 225 return -ENODEV;
315 */ 226 if ((eeepc->cm_supported & (0x1 << cm)) == 0)
316static int read_brightness(struct backlight_device *bd) 227 return -ENODEV;
317{
318 return get_acpi(CM_ASL_PANELBRIGHT);
319}
320 228
321static int set_brightness(struct backlight_device *bd, int value) 229 if (write_acpi_int(eeepc->handle, method, value))
322{ 230 pr_warning("Error writing %s\n", method);
323 value = max(0, min(15, value)); 231 return 0;
324 return set_acpi(CM_ASL_PANELBRIGHT, value);
325} 232}
326 233
327static int update_bl_status(struct backlight_device *bd) 234static int get_acpi(struct eeepc_laptop *eeepc, int cm)
328{ 235{
329 return set_brightness(bd, bd->props.brightness); 236 const char *method = cm_getv[cm];
330} 237 int value;
331 238
332/* 239 if (method == NULL)
333 * Rfkill helpers 240 return -ENODEV;
334 */ 241 if ((eeepc->cm_supported & (0x1 << cm)) == 0)
242 return -ENODEV;
335 243
336static bool eeepc_wlan_rfkill_blocked(void) 244 if (read_acpi_int(eeepc->handle, method, &value))
337{ 245 pr_warning("Error reading %s\n", method);
338 if (get_acpi(CM_ASL_WLAN) == 1) 246 return value;
339 return false;
340 return true;
341} 247}
342 248
343static int eeepc_rfkill_set(void *data, bool blocked) 249static int acpi_setter_handle(struct eeepc_laptop *eeepc, int cm,
250 acpi_handle *handle)
344{ 251{
345 unsigned long asl = (unsigned long)data; 252 const char *method = cm_setv[cm];
346 return set_acpi(asl, !blocked); 253 acpi_status status;
347}
348 254
349static const struct rfkill_ops eeepc_rfkill_ops = { 255 if (method == NULL)
350 .set_block = eeepc_rfkill_set, 256 return -ENODEV;
351}; 257 if ((eeepc->cm_supported & (0x1 << cm)) == 0)
258 return -ENODEV;
352 259
353static void __devinit eeepc_enable_camera(void) 260 status = acpi_get_handle(eeepc->handle, (char *)method,
354{ 261 handle);
355 /* 262 if (status != AE_OK) {
356 * If the following call to set_acpi() fails, it's because there's no 263 pr_warning("Error finding %s\n", method);
357 * camera so we can ignore the error. 264 return -ENODEV;
358 */ 265 }
359 if (get_acpi(CM_ASL_CAMERA) == 0) 266 return 0;
360 set_acpi(CM_ASL_CAMERA, 1);
361} 267}
362 268
269
363/* 270/*
364 * Sys helpers 271 * Sys helpers
365 */ 272 */
@@ -372,60 +279,63 @@ static int parse_arg(const char *buf, unsigned long count, int *val)
372 return count; 279 return count;
373} 280}
374 281
375static ssize_t store_sys_acpi(int cm, const char *buf, size_t count) 282static ssize_t store_sys_acpi(struct device *dev, int cm,
283 const char *buf, size_t count)
376{ 284{
285 struct eeepc_laptop *eeepc = dev_get_drvdata(dev);
377 int rv, value; 286 int rv, value;
378 287
379 rv = parse_arg(buf, count, &value); 288 rv = parse_arg(buf, count, &value);
380 if (rv > 0) 289 if (rv > 0)
381 value = set_acpi(cm, value); 290 value = set_acpi(eeepc, cm, value);
382 if (value < 0) 291 if (value < 0)
383 return value; 292 return -EIO;
384 return rv; 293 return rv;
385} 294}
386 295
387static ssize_t show_sys_acpi(int cm, char *buf) 296static ssize_t show_sys_acpi(struct device *dev, int cm, char *buf)
388{ 297{
389 int value = get_acpi(cm); 298 struct eeepc_laptop *eeepc = dev_get_drvdata(dev);
299 int value = get_acpi(eeepc, cm);
390 300
391 if (value < 0) 301 if (value < 0)
392 return value; 302 return -EIO;
393 return sprintf(buf, "%d\n", value); 303 return sprintf(buf, "%d\n", value);
394} 304}
395 305
396#define EEEPC_CREATE_DEVICE_ATTR(_name, _cm) \ 306#define EEEPC_CREATE_DEVICE_ATTR(_name, _mode, _cm) \
397 static ssize_t show_##_name(struct device *dev, \ 307 static ssize_t show_##_name(struct device *dev, \
398 struct device_attribute *attr, \ 308 struct device_attribute *attr, \
399 char *buf) \ 309 char *buf) \
400 { \ 310 { \
401 return show_sys_acpi(_cm, buf); \ 311 return show_sys_acpi(dev, _cm, buf); \
402 } \ 312 } \
403 static ssize_t store_##_name(struct device *dev, \ 313 static ssize_t store_##_name(struct device *dev, \
404 struct device_attribute *attr, \ 314 struct device_attribute *attr, \
405 const char *buf, size_t count) \ 315 const char *buf, size_t count) \
406 { \ 316 { \
407 return store_sys_acpi(_cm, buf, count); \ 317 return store_sys_acpi(dev, _cm, buf, count); \
408 } \ 318 } \
409 static struct device_attribute dev_attr_##_name = { \ 319 static struct device_attribute dev_attr_##_name = { \
410 .attr = { \ 320 .attr = { \
411 .name = __stringify(_name), \ 321 .name = __stringify(_name), \
412 .mode = 0644 }, \ 322 .mode = _mode }, \
413 .show = show_##_name, \ 323 .show = show_##_name, \
414 .store = store_##_name, \ 324 .store = store_##_name, \
415 } 325 }
416 326
417EEEPC_CREATE_DEVICE_ATTR(camera, CM_ASL_CAMERA); 327EEEPC_CREATE_DEVICE_ATTR(camera, 0644, CM_ASL_CAMERA);
418EEEPC_CREATE_DEVICE_ATTR(cardr, CM_ASL_CARDREADER); 328EEEPC_CREATE_DEVICE_ATTR(cardr, 0644, CM_ASL_CARDREADER);
419EEEPC_CREATE_DEVICE_ATTR(disp, CM_ASL_DISPLAYSWITCH); 329EEEPC_CREATE_DEVICE_ATTR(disp, 0200, CM_ASL_DISPLAYSWITCH);
420 330
421struct eeepc_cpufv { 331struct eeepc_cpufv {
422 int num; 332 int num;
423 int cur; 333 int cur;
424}; 334};
425 335
426static int get_cpufv(struct eeepc_cpufv *c) 336static int get_cpufv(struct eeepc_laptop *eeepc, struct eeepc_cpufv *c)
427{ 337{
428 c->cur = get_acpi(CM_ASL_CPUFV); 338 c->cur = get_acpi(eeepc, CM_ASL_CPUFV);
429 c->num = (c->cur >> 8) & 0xff; 339 c->num = (c->cur >> 8) & 0xff;
430 c->cur &= 0xff; 340 c->cur &= 0xff;
431 if (c->cur < 0 || c->num <= 0 || c->num > 12) 341 if (c->cur < 0 || c->num <= 0 || c->num > 12)
@@ -437,11 +347,12 @@ static ssize_t show_available_cpufv(struct device *dev,
437 struct device_attribute *attr, 347 struct device_attribute *attr,
438 char *buf) 348 char *buf)
439{ 349{
350 struct eeepc_laptop *eeepc = dev_get_drvdata(dev);
440 struct eeepc_cpufv c; 351 struct eeepc_cpufv c;
441 int i; 352 int i;
442 ssize_t len = 0; 353 ssize_t len = 0;
443 354
444 if (get_cpufv(&c)) 355 if (get_cpufv(eeepc, &c))
445 return -ENODEV; 356 return -ENODEV;
446 for (i = 0; i < c.num; i++) 357 for (i = 0; i < c.num; i++)
447 len += sprintf(buf + len, "%d ", i); 358 len += sprintf(buf + len, "%d ", i);
@@ -453,9 +364,10 @@ static ssize_t show_cpufv(struct device *dev,
453 struct device_attribute *attr, 364 struct device_attribute *attr,
454 char *buf) 365 char *buf)
455{ 366{
367 struct eeepc_laptop *eeepc = dev_get_drvdata(dev);
456 struct eeepc_cpufv c; 368 struct eeepc_cpufv c;
457 369
458 if (get_cpufv(&c)) 370 if (get_cpufv(eeepc, &c))
459 return -ENODEV; 371 return -ENODEV;
460 return sprintf(buf, "%#x\n", (c.num << 8) | c.cur); 372 return sprintf(buf, "%#x\n", (c.num << 8) | c.cur);
461} 373}
@@ -464,20 +376,58 @@ static ssize_t store_cpufv(struct device *dev,
464 struct device_attribute *attr, 376 struct device_attribute *attr,
465 const char *buf, size_t count) 377 const char *buf, size_t count)
466{ 378{
379 struct eeepc_laptop *eeepc = dev_get_drvdata(dev);
467 struct eeepc_cpufv c; 380 struct eeepc_cpufv c;
468 int rv, value; 381 int rv, value;
469 382
470 if (get_cpufv(&c)) 383 if (eeepc->cpufv_disabled)
384 return -EPERM;
385 if (get_cpufv(eeepc, &c))
471 return -ENODEV; 386 return -ENODEV;
472 rv = parse_arg(buf, count, &value); 387 rv = parse_arg(buf, count, &value);
473 if (rv < 0) 388 if (rv < 0)
474 return rv; 389 return rv;
475 if (!rv || value < 0 || value >= c.num) 390 if (!rv || value < 0 || value >= c.num)
476 return -EINVAL; 391 return -EINVAL;
477 set_acpi(CM_ASL_CPUFV, value); 392 set_acpi(eeepc, CM_ASL_CPUFV, value);
478 return rv; 393 return rv;
479} 394}
480 395
396static ssize_t show_cpufv_disabled(struct device *dev,
397 struct device_attribute *attr,
398 char *buf)
399{
400 struct eeepc_laptop *eeepc = dev_get_drvdata(dev);
401
402 return sprintf(buf, "%d\n", eeepc->cpufv_disabled);
403}
404
405static ssize_t store_cpufv_disabled(struct device *dev,
406 struct device_attribute *attr,
407 const char *buf, size_t count)
408{
409 struct eeepc_laptop *eeepc = dev_get_drvdata(dev);
410 int rv, value;
411
412 rv = parse_arg(buf, count, &value);
413 if (rv < 0)
414 return rv;
415
416 switch (value) {
417 case 0:
418 if (eeepc->cpufv_disabled)
419 pr_warning("cpufv enabled (not officially supported "
420 "on this model)\n");
421 eeepc->cpufv_disabled = false;
422 return rv;
423 case 1:
424 return -EPERM;
425 default:
426 return -EINVAL;
427 }
428}
429
430
481static struct device_attribute dev_attr_cpufv = { 431static struct device_attribute dev_attr_cpufv = {
482 .attr = { 432 .attr = {
483 .name = "cpufv", 433 .name = "cpufv",
@@ -493,12 +443,22 @@ static struct device_attribute dev_attr_available_cpufv = {
493 .show = show_available_cpufv 443 .show = show_available_cpufv
494}; 444};
495 445
446static struct device_attribute dev_attr_cpufv_disabled = {
447 .attr = {
448 .name = "cpufv_disabled",
449 .mode = 0644 },
450 .show = show_cpufv_disabled,
451 .store = store_cpufv_disabled
452};
453
454
496static struct attribute *platform_attributes[] = { 455static struct attribute *platform_attributes[] = {
497 &dev_attr_camera.attr, 456 &dev_attr_camera.attr,
498 &dev_attr_cardr.attr, 457 &dev_attr_cardr.attr,
499 &dev_attr_disp.attr, 458 &dev_attr_disp.attr,
500 &dev_attr_cpufv.attr, 459 &dev_attr_cpufv.attr,
501 &dev_attr_available_cpufv.attr, 460 &dev_attr_available_cpufv.attr,
461 &dev_attr_cpufv_disabled.attr,
502 NULL 462 NULL
503}; 463};
504 464
@@ -506,156 +466,125 @@ static struct attribute_group platform_attribute_group = {
506 .attrs = platform_attributes 466 .attrs = platform_attributes
507}; 467};
508 468
509/* 469static int eeepc_platform_init(struct eeepc_laptop *eeepc)
510 * Hotkey functions
511 */
512static struct key_entry *eepc_get_entry_by_scancode(int code)
513{ 470{
514 struct key_entry *key; 471 int result;
515
516 for (key = eeepc_keymap; key->type != KE_END; key++)
517 if (code == key->code)
518 return key;
519 472
520 return NULL; 473 eeepc->platform_device = platform_device_alloc(EEEPC_LAPTOP_FILE, -1);
521} 474 if (!eeepc->platform_device)
475 return -ENOMEM;
476 platform_set_drvdata(eeepc->platform_device, eeepc);
522 477
523static struct key_entry *eepc_get_entry_by_keycode(int code) 478 result = platform_device_add(eeepc->platform_device);
524{ 479 if (result)
525 struct key_entry *key; 480 goto fail_platform_device;
526 481
527 for (key = eeepc_keymap; key->type != KE_END; key++) 482 result = sysfs_create_group(&eeepc->platform_device->dev.kobj,
528 if (code == key->keycode && key->type == KE_KEY) 483 &platform_attribute_group);
529 return key; 484 if (result)
485 goto fail_sysfs;
486 return 0;
530 487
531 return NULL; 488fail_sysfs:
489 platform_device_del(eeepc->platform_device);
490fail_platform_device:
491 platform_device_put(eeepc->platform_device);
492 return result;
532} 493}
533 494
534static int eeepc_getkeycode(struct input_dev *dev, int scancode, int *keycode) 495static void eeepc_platform_exit(struct eeepc_laptop *eeepc)
535{ 496{
536 struct key_entry *key = eepc_get_entry_by_scancode(scancode); 497 sysfs_remove_group(&eeepc->platform_device->dev.kobj,
498 &platform_attribute_group);
499 platform_device_unregister(eeepc->platform_device);
500}
537 501
538 if (key && key->type == KE_KEY) { 502/*
539 *keycode = key->keycode; 503 * LEDs
540 return 0; 504 */
541 } 505/*
506 * These functions actually update the LED's, and are called from a
507 * workqueue. By doing this as separate work rather than when the LED
508 * subsystem asks, we avoid messing with the Asus ACPI stuff during a
509 * potentially bad time, such as a timer interrupt.
510 */
511static void tpd_led_update(struct work_struct *work)
512 {
513 struct eeepc_laptop *eeepc;
542 514
543 return -EINVAL; 515 eeepc = container_of(work, struct eeepc_laptop, tpd_led_work);
516
517 set_acpi(eeepc, CM_ASL_TPD, eeepc->tpd_led_wk);
544} 518}
545 519
546static int eeepc_setkeycode(struct input_dev *dev, int scancode, int keycode) 520static void tpd_led_set(struct led_classdev *led_cdev,
521 enum led_brightness value)
547{ 522{
548 struct key_entry *key; 523 struct eeepc_laptop *eeepc;
549 int old_keycode;
550 524
551 if (keycode < 0 || keycode > KEY_MAX) 525 eeepc = container_of(led_cdev, struct eeepc_laptop, tpd_led);
552 return -EINVAL;
553 526
554 key = eepc_get_entry_by_scancode(scancode); 527 eeepc->tpd_led_wk = (value > 0) ? 1 : 0;
555 if (key && key->type == KE_KEY) { 528 queue_work(eeepc->led_workqueue, &eeepc->tpd_led_work);
556 old_keycode = key->keycode;
557 key->keycode = keycode;
558 set_bit(keycode, dev->keybit);
559 if (!eepc_get_entry_by_keycode(old_keycode))
560 clear_bit(old_keycode, dev->keybit);
561 return 0;
562 }
563
564 return -EINVAL;
565} 529}
566 530
567static void cmsg_quirk(int cm, const char *name) 531static int eeepc_led_init(struct eeepc_laptop *eeepc)
568{ 532{
569 int dummy; 533 int rv;
570 534
571 /* Some BIOSes do not report cm although it is avaliable. 535 if (get_acpi(eeepc, CM_ASL_TPD) == -ENODEV)
572 Check if cm_getv[cm] works and, if yes, assume cm should be set. */ 536 return 0;
573 if (!(ehotk->cm_supported & (1 << cm))
574 && !read_acpi_int(ehotk->handle, cm_getv[cm], &dummy)) {
575 pr_info("%s (%x) not reported by BIOS,"
576 " enabling anyway\n", name, 1 << cm);
577 ehotk->cm_supported |= 1 << cm;
578 }
579}
580 537
581static void cmsg_quirks(void) 538 eeepc->led_workqueue = create_singlethread_workqueue("led_workqueue");
582{ 539 if (!eeepc->led_workqueue)
583 cmsg_quirk(CM_ASL_LID, "LID"); 540 return -ENOMEM;
584 cmsg_quirk(CM_ASL_TYPE, "TYPE"); 541 INIT_WORK(&eeepc->tpd_led_work, tpd_led_update);
585 cmsg_quirk(CM_ASL_PANELPOWER, "PANELPOWER");
586 cmsg_quirk(CM_ASL_TPD, "TPD");
587}
588 542
589static int eeepc_hotk_check(void) 543 eeepc->tpd_led.name = "eeepc::touchpad";
590{ 544 eeepc->tpd_led.brightness_set = tpd_led_set;
591 struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL }; 545 eeepc->tpd_led.max_brightness = 1;
592 int result;
593 546
594 result = acpi_bus_get_status(ehotk->device); 547 rv = led_classdev_register(&eeepc->platform_device->dev,
595 if (result) 548 &eeepc->tpd_led);
596 return result; 549 if (rv) {
597 if (ehotk->device->status.present) { 550 destroy_workqueue(eeepc->led_workqueue);
598 if (write_acpi_int(ehotk->handle, "INIT", ehotk->init_flag, 551 return rv;
599 &buffer)) {
600 pr_err("Hotkey initialization failed\n");
601 return -ENODEV;
602 } else {
603 pr_notice("Hotkey init flags 0x%x\n", ehotk->init_flag);
604 }
605 /* get control methods supported */
606 if (read_acpi_int(ehotk->handle, "CMSG"
607 , &ehotk->cm_supported)) {
608 pr_err("Get control methods supported failed\n");
609 return -ENODEV;
610 } else {
611 cmsg_quirks();
612 pr_info("Get control methods supported: 0x%x\n",
613 ehotk->cm_supported);
614 }
615 } else {
616 pr_err("Hotkey device not present, aborting\n");
617 return -EINVAL;
618 } 552 }
553
619 return 0; 554 return 0;
620} 555}
621 556
622static int notify_brn(void) 557static void eeepc_led_exit(struct eeepc_laptop *eeepc)
623{ 558{
624 /* returns the *previous* brightness, or -1 */ 559 if (eeepc->tpd_led.dev)
625 struct backlight_device *bd = eeepc_backlight_device; 560 led_classdev_unregister(&eeepc->tpd_led);
626 if (bd) { 561 if (eeepc->led_workqueue)
627 int old = bd->props.brightness; 562 destroy_workqueue(eeepc->led_workqueue);
628 backlight_force_update(bd, BACKLIGHT_UPDATE_HOTKEY);
629 return old;
630 }
631 return -1;
632} 563}
633 564
634static int eeepc_get_adapter_status(struct hotplug_slot *hotplug_slot,
635 u8 *value)
636{
637 int val = get_acpi(CM_ASL_WLAN);
638
639 if (val == 1 || val == 0)
640 *value = val;
641 else
642 return -EINVAL;
643 565
644 return 0; 566/*
567 * PCI hotplug (for wlan rfkill)
568 */
569static bool eeepc_wlan_rfkill_blocked(struct eeepc_laptop *eeepc)
570{
571 if (get_acpi(eeepc, CM_ASL_WLAN) == 1)
572 return false;
573 return true;
645} 574}
646 575
647static void eeepc_rfkill_hotplug(void) 576static void eeepc_rfkill_hotplug(struct eeepc_laptop *eeepc)
648{ 577{
649 struct pci_dev *dev; 578 struct pci_dev *dev;
650 struct pci_bus *bus; 579 struct pci_bus *bus;
651 bool blocked = eeepc_wlan_rfkill_blocked(); 580 bool blocked = eeepc_wlan_rfkill_blocked(eeepc);
652 581
653 if (ehotk->wlan_rfkill) 582 if (eeepc->wlan_rfkill)
654 rfkill_set_sw_state(ehotk->wlan_rfkill, blocked); 583 rfkill_set_sw_state(eeepc->wlan_rfkill, blocked);
655 584
656 mutex_lock(&ehotk->hotplug_lock); 585 mutex_lock(&eeepc->hotplug_lock);
657 586
658 if (ehotk->hotplug_slot) { 587 if (eeepc->hotplug_slot) {
659 bus = pci_find_bus(0, 1); 588 bus = pci_find_bus(0, 1);
660 if (!bus) { 589 if (!bus) {
661 pr_warning("Unable to find PCI bus 1?\n"); 590 pr_warning("Unable to find PCI bus 1?\n");
@@ -685,69 +614,23 @@ static void eeepc_rfkill_hotplug(void)
685 } 614 }
686 615
687out_unlock: 616out_unlock:
688 mutex_unlock(&ehotk->hotplug_lock); 617 mutex_unlock(&eeepc->hotplug_lock);
689} 618}
690 619
691static void eeepc_rfkill_notify(acpi_handle handle, u32 event, void *data) 620static void eeepc_rfkill_notify(acpi_handle handle, u32 event, void *data)
692{ 621{
622 struct eeepc_laptop *eeepc = data;
623
693 if (event != ACPI_NOTIFY_BUS_CHECK) 624 if (event != ACPI_NOTIFY_BUS_CHECK)
694 return; 625 return;
695 626
696 eeepc_rfkill_hotplug(); 627 eeepc_rfkill_hotplug(eeepc);
697}
698
699static void eeepc_hotk_notify(struct acpi_device *device, u32 event)
700{
701 static struct key_entry *key;
702 u16 count;
703 int brn = -ENODEV;
704
705 if (!ehotk)
706 return;
707 if (event > ACPI_MAX_SYS_NOTIFY)
708 return;
709 if (event >= NOTIFY_BRN_MIN && event <= NOTIFY_BRN_MAX)
710 brn = notify_brn();
711 count = ehotk->event_count[event % 128]++;
712 acpi_bus_generate_proc_event(ehotk->device, event, count);
713 acpi_bus_generate_netlink_event(ehotk->device->pnp.device_class,
714 dev_name(&ehotk->device->dev), event,
715 count);
716 if (ehotk->inputdev) {
717 if (brn != -ENODEV) {
718 /* brightness-change events need special
719 * handling for conversion to key events
720 */
721 if (brn < 0)
722 brn = event;
723 else
724 brn += NOTIFY_BRN_MIN;
725 if (event < brn)
726 event = NOTIFY_BRN_MIN; /* brightness down */
727 else if (event > brn)
728 event = NOTIFY_BRN_MIN + 2; /* ... up */
729 else
730 event = NOTIFY_BRN_MIN + 1; /* ... unchanged */
731 }
732 key = eepc_get_entry_by_scancode(event);
733 if (key) {
734 switch (key->type) {
735 case KE_KEY:
736 input_report_key(ehotk->inputdev, key->keycode,
737 1);
738 input_sync(ehotk->inputdev);
739 input_report_key(ehotk->inputdev, key->keycode,
740 0);
741 input_sync(ehotk->inputdev);
742 break;
743 }
744 }
745 }
746} 628}
747 629
748static int eeepc_register_rfkill_notifier(char *node) 630static int eeepc_register_rfkill_notifier(struct eeepc_laptop *eeepc,
631 char *node)
749{ 632{
750 acpi_status status = AE_OK; 633 acpi_status status;
751 acpi_handle handle; 634 acpi_handle handle;
752 635
753 status = acpi_get_handle(NULL, node, &handle); 636 status = acpi_get_handle(NULL, node, &handle);
@@ -756,7 +639,7 @@ static int eeepc_register_rfkill_notifier(char *node)
756 status = acpi_install_notify_handler(handle, 639 status = acpi_install_notify_handler(handle,
757 ACPI_SYSTEM_NOTIFY, 640 ACPI_SYSTEM_NOTIFY,
758 eeepc_rfkill_notify, 641 eeepc_rfkill_notify,
759 NULL); 642 eeepc);
760 if (ACPI_FAILURE(status)) 643 if (ACPI_FAILURE(status))
761 pr_warning("Failed to register notify on %s\n", node); 644 pr_warning("Failed to register notify on %s\n", node);
762 } else 645 } else
@@ -765,7 +648,8 @@ static int eeepc_register_rfkill_notifier(char *node)
765 return 0; 648 return 0;
766} 649}
767 650
768static void eeepc_unregister_rfkill_notifier(char *node) 651static void eeepc_unregister_rfkill_notifier(struct eeepc_laptop *eeepc,
652 char *node)
769{ 653{
770 acpi_status status = AE_OK; 654 acpi_status status = AE_OK;
771 acpi_handle handle; 655 acpi_handle handle;
@@ -782,13 +666,33 @@ static void eeepc_unregister_rfkill_notifier(char *node)
782 } 666 }
783} 667}
784 668
669static int eeepc_get_adapter_status(struct hotplug_slot *hotplug_slot,
670 u8 *value)
671{
672 struct eeepc_laptop *eeepc = hotplug_slot->private;
673 int val = get_acpi(eeepc, CM_ASL_WLAN);
674
675 if (val == 1 || val == 0)
676 *value = val;
677 else
678 return -EINVAL;
679
680 return 0;
681}
682
785static void eeepc_cleanup_pci_hotplug(struct hotplug_slot *hotplug_slot) 683static void eeepc_cleanup_pci_hotplug(struct hotplug_slot *hotplug_slot)
786{ 684{
787 kfree(hotplug_slot->info); 685 kfree(hotplug_slot->info);
788 kfree(hotplug_slot); 686 kfree(hotplug_slot);
789} 687}
790 688
791static int eeepc_setup_pci_hotplug(void) 689static struct hotplug_slot_ops eeepc_hotplug_slot_ops = {
690 .owner = THIS_MODULE,
691 .get_adapter_status = eeepc_get_adapter_status,
692 .get_power_status = eeepc_get_adapter_status,
693};
694
695static int eeepc_setup_pci_hotplug(struct eeepc_laptop *eeepc)
792{ 696{
793 int ret = -ENOMEM; 697 int ret = -ENOMEM;
794 struct pci_bus *bus = pci_find_bus(0, 1); 698 struct pci_bus *bus = pci_find_bus(0, 1);
@@ -798,22 +702,22 @@ static int eeepc_setup_pci_hotplug(void)
798 return -ENODEV; 702 return -ENODEV;
799 } 703 }
800 704
801 ehotk->hotplug_slot = kzalloc(sizeof(struct hotplug_slot), GFP_KERNEL); 705 eeepc->hotplug_slot = kzalloc(sizeof(struct hotplug_slot), GFP_KERNEL);
802 if (!ehotk->hotplug_slot) 706 if (!eeepc->hotplug_slot)
803 goto error_slot; 707 goto error_slot;
804 708
805 ehotk->hotplug_slot->info = kzalloc(sizeof(struct hotplug_slot_info), 709 eeepc->hotplug_slot->info = kzalloc(sizeof(struct hotplug_slot_info),
806 GFP_KERNEL); 710 GFP_KERNEL);
807 if (!ehotk->hotplug_slot->info) 711 if (!eeepc->hotplug_slot->info)
808 goto error_info; 712 goto error_info;
809 713
810 ehotk->hotplug_slot->private = ehotk; 714 eeepc->hotplug_slot->private = eeepc;
811 ehotk->hotplug_slot->release = &eeepc_cleanup_pci_hotplug; 715 eeepc->hotplug_slot->release = &eeepc_cleanup_pci_hotplug;
812 ehotk->hotplug_slot->ops = &eeepc_hotplug_slot_ops; 716 eeepc->hotplug_slot->ops = &eeepc_hotplug_slot_ops;
813 eeepc_get_adapter_status(ehotk->hotplug_slot, 717 eeepc_get_adapter_status(eeepc->hotplug_slot,
814 &ehotk->hotplug_slot->info->adapter_status); 718 &eeepc->hotplug_slot->info->adapter_status);
815 719
816 ret = pci_hp_register(ehotk->hotplug_slot, bus, 0, "eeepc-wifi"); 720 ret = pci_hp_register(eeepc->hotplug_slot, bus, 0, "eeepc-wifi");
817 if (ret) { 721 if (ret) {
818 pr_err("Unable to register hotplug slot - %d\n", ret); 722 pr_err("Unable to register hotplug slot - %d\n", ret);
819 goto error_register; 723 goto error_register;
@@ -822,17 +726,159 @@ static int eeepc_setup_pci_hotplug(void)
822 return 0; 726 return 0;
823 727
824error_register: 728error_register:
825 kfree(ehotk->hotplug_slot->info); 729 kfree(eeepc->hotplug_slot->info);
826error_info: 730error_info:
827 kfree(ehotk->hotplug_slot); 731 kfree(eeepc->hotplug_slot);
828 ehotk->hotplug_slot = NULL; 732 eeepc->hotplug_slot = NULL;
829error_slot: 733error_slot:
830 return ret; 734 return ret;
831} 735}
832 736
737/*
738 * Rfkill devices
739 */
740static int eeepc_rfkill_set(void *data, bool blocked)
741{
742 acpi_handle handle = data;
743
744 return write_acpi_int(handle, NULL, !blocked);
745}
746
747static const struct rfkill_ops eeepc_rfkill_ops = {
748 .set_block = eeepc_rfkill_set,
749};
750
751static int eeepc_new_rfkill(struct eeepc_laptop *eeepc,
752 struct rfkill **rfkill,
753 const char *name,
754 enum rfkill_type type, int cm)
755{
756 acpi_handle handle;
757 int result;
758
759 result = acpi_setter_handle(eeepc, cm, &handle);
760 if (result < 0)
761 return result;
762
763 *rfkill = rfkill_alloc(name, &eeepc->platform_device->dev, type,
764 &eeepc_rfkill_ops, handle);
765
766 if (!*rfkill)
767 return -EINVAL;
768
769 rfkill_init_sw_state(*rfkill, get_acpi(eeepc, cm) != 1);
770 result = rfkill_register(*rfkill);
771 if (result) {
772 rfkill_destroy(*rfkill);
773 *rfkill = NULL;
774 return result;
775 }
776 return 0;
777}
778
779static void eeepc_rfkill_exit(struct eeepc_laptop *eeepc)
780{
781 eeepc_unregister_rfkill_notifier(eeepc, "\\_SB.PCI0.P0P5");
782 eeepc_unregister_rfkill_notifier(eeepc, "\\_SB.PCI0.P0P6");
783 eeepc_unregister_rfkill_notifier(eeepc, "\\_SB.PCI0.P0P7");
784 if (eeepc->wlan_rfkill) {
785 rfkill_unregister(eeepc->wlan_rfkill);
786 rfkill_destroy(eeepc->wlan_rfkill);
787 eeepc->wlan_rfkill = NULL;
788 }
789 /*
790 * Refresh pci hotplug in case the rfkill state was changed after
791 * eeepc_unregister_rfkill_notifier()
792 */
793 eeepc_rfkill_hotplug(eeepc);
794 if (eeepc->hotplug_slot)
795 pci_hp_deregister(eeepc->hotplug_slot);
796
797 if (eeepc->bluetooth_rfkill) {
798 rfkill_unregister(eeepc->bluetooth_rfkill);
799 rfkill_destroy(eeepc->bluetooth_rfkill);
800 eeepc->bluetooth_rfkill = NULL;
801 }
802 if (eeepc->wwan3g_rfkill) {
803 rfkill_unregister(eeepc->wwan3g_rfkill);
804 rfkill_destroy(eeepc->wwan3g_rfkill);
805 eeepc->wwan3g_rfkill = NULL;
806 }
807 if (eeepc->wimax_rfkill) {
808 rfkill_unregister(eeepc->wimax_rfkill);
809 rfkill_destroy(eeepc->wimax_rfkill);
810 eeepc->wimax_rfkill = NULL;
811 }
812}
813
814static int eeepc_rfkill_init(struct eeepc_laptop *eeepc)
815{
816 int result = 0;
817
818 mutex_init(&eeepc->hotplug_lock);
819
820 result = eeepc_new_rfkill(eeepc, &eeepc->wlan_rfkill,
821 "eeepc-wlan", RFKILL_TYPE_WLAN,
822 CM_ASL_WLAN);
823
824 if (result && result != -ENODEV)
825 goto exit;
826
827 result = eeepc_new_rfkill(eeepc, &eeepc->bluetooth_rfkill,
828 "eeepc-bluetooth", RFKILL_TYPE_BLUETOOTH,
829 CM_ASL_BLUETOOTH);
830
831 if (result && result != -ENODEV)
832 goto exit;
833
834 result = eeepc_new_rfkill(eeepc, &eeepc->wwan3g_rfkill,
835 "eeepc-wwan3g", RFKILL_TYPE_WWAN,
836 CM_ASL_3G);
837
838 if (result && result != -ENODEV)
839 goto exit;
840
841 result = eeepc_new_rfkill(eeepc, &eeepc->wimax_rfkill,
842 "eeepc-wimax", RFKILL_TYPE_WIMAX,
843 CM_ASL_WIMAX);
844
845 if (result && result != -ENODEV)
846 goto exit;
847
848 if (eeepc->hotplug_disabled)
849 return 0;
850
851 result = eeepc_setup_pci_hotplug(eeepc);
852 /*
853 * If we get -EBUSY then something else is handling the PCI hotplug -
854 * don't fail in this case
855 */
856 if (result == -EBUSY)
857 result = 0;
858
859 eeepc_register_rfkill_notifier(eeepc, "\\_SB.PCI0.P0P5");
860 eeepc_register_rfkill_notifier(eeepc, "\\_SB.PCI0.P0P6");
861 eeepc_register_rfkill_notifier(eeepc, "\\_SB.PCI0.P0P7");
862 /*
863 * Refresh pci hotplug in case the rfkill state was changed during
864 * setup.
865 */
866 eeepc_rfkill_hotplug(eeepc);
867
868exit:
869 if (result && result != -ENODEV)
870 eeepc_rfkill_exit(eeepc);
871 return result;
872}
873
874/*
875 * Platform driver - hibernate/resume callbacks
876 */
833static int eeepc_hotk_thaw(struct device *device) 877static int eeepc_hotk_thaw(struct device *device)
834{ 878{
835 if (ehotk->wlan_rfkill) { 879 struct eeepc_laptop *eeepc = dev_get_drvdata(device);
880
881 if (eeepc->wlan_rfkill) {
836 bool wlan; 882 bool wlan;
837 883
838 /* 884 /*
@@ -840,8 +886,8 @@ static int eeepc_hotk_thaw(struct device *device)
840 * during suspend. Normally it restores it on resume, but 886 * during suspend. Normally it restores it on resume, but
841 * we should kick it ourselves in case hibernation is aborted. 887 * we should kick it ourselves in case hibernation is aborted.
842 */ 888 */
843 wlan = get_acpi(CM_ASL_WLAN); 889 wlan = get_acpi(eeepc, CM_ASL_WLAN);
844 set_acpi(CM_ASL_WLAN, wlan); 890 set_acpi(eeepc, CM_ASL_WLAN, wlan);
845 } 891 }
846 892
847 return 0; 893 return 0;
@@ -849,70 +895,96 @@ static int eeepc_hotk_thaw(struct device *device)
849 895
850static int eeepc_hotk_restore(struct device *device) 896static int eeepc_hotk_restore(struct device *device)
851{ 897{
898 struct eeepc_laptop *eeepc = dev_get_drvdata(device);
899
852 /* Refresh both wlan rfkill state and pci hotplug */ 900 /* Refresh both wlan rfkill state and pci hotplug */
853 if (ehotk->wlan_rfkill) 901 if (eeepc->wlan_rfkill)
854 eeepc_rfkill_hotplug(); 902 eeepc_rfkill_hotplug(eeepc);
855 903
856 if (ehotk->bluetooth_rfkill) 904 if (eeepc->bluetooth_rfkill)
857 rfkill_set_sw_state(ehotk->bluetooth_rfkill, 905 rfkill_set_sw_state(eeepc->bluetooth_rfkill,
858 get_acpi(CM_ASL_BLUETOOTH) != 1); 906 get_acpi(eeepc, CM_ASL_BLUETOOTH) != 1);
859 if (ehotk->wwan3g_rfkill) 907 if (eeepc->wwan3g_rfkill)
860 rfkill_set_sw_state(ehotk->wwan3g_rfkill, 908 rfkill_set_sw_state(eeepc->wwan3g_rfkill,
861 get_acpi(CM_ASL_3G) != 1); 909 get_acpi(eeepc, CM_ASL_3G) != 1);
862 if (ehotk->wimax_rfkill) 910 if (eeepc->wimax_rfkill)
863 rfkill_set_sw_state(ehotk->wimax_rfkill, 911 rfkill_set_sw_state(eeepc->wimax_rfkill,
864 get_acpi(CM_ASL_WIMAX) != 1); 912 get_acpi(eeepc, CM_ASL_WIMAX) != 1);
865 913
866 return 0; 914 return 0;
867} 915}
868 916
917static const struct dev_pm_ops eeepc_pm_ops = {
918 .thaw = eeepc_hotk_thaw,
919 .restore = eeepc_hotk_restore,
920};
921
922static struct platform_driver platform_driver = {
923 .driver = {
924 .name = EEEPC_LAPTOP_FILE,
925 .owner = THIS_MODULE,
926 .pm = &eeepc_pm_ops,
927 }
928};
929
869/* 930/*
870 * Hwmon 931 * Hwmon device
871 */ 932 */
933
934#define EEEPC_EC_SC00 0x61
935#define EEEPC_EC_FAN_PWM (EEEPC_EC_SC00 + 2) /* Fan PWM duty cycle (%) */
936#define EEEPC_EC_FAN_HRPM (EEEPC_EC_SC00 + 5) /* High byte, fan speed (RPM) */
937#define EEEPC_EC_FAN_LRPM (EEEPC_EC_SC00 + 6) /* Low byte, fan speed (RPM) */
938
939#define EEEPC_EC_SFB0 0xD0
940#define EEEPC_EC_FAN_CTRL (EEEPC_EC_SFB0 + 3) /* Byte containing SF25 */
941
872static int eeepc_get_fan_pwm(void) 942static int eeepc_get_fan_pwm(void)
873{ 943{
874 int value = 0; 944 u8 value = 0;
875 945
876 read_acpi_int(NULL, EEEPC_EC_FAN_PWM, &value); 946 ec_read(EEEPC_EC_FAN_PWM, &value);
877 value = value * 255 / 100; 947 return value * 255 / 100;
878 return (value);
879} 948}
880 949
881static void eeepc_set_fan_pwm(int value) 950static void eeepc_set_fan_pwm(int value)
882{ 951{
883 value = SENSORS_LIMIT(value, 0, 255); 952 value = SENSORS_LIMIT(value, 0, 255);
884 value = value * 100 / 255; 953 value = value * 100 / 255;
885 ec_write(EEEPC_EC_SC02, value); 954 ec_write(EEEPC_EC_FAN_PWM, value);
886} 955}
887 956
888static int eeepc_get_fan_rpm(void) 957static int eeepc_get_fan_rpm(void)
889{ 958{
890 int high = 0; 959 u8 high = 0;
891 int low = 0; 960 u8 low = 0;
892 961
893 read_acpi_int(NULL, EEEPC_EC_FAN_HRPM, &high); 962 ec_read(EEEPC_EC_FAN_HRPM, &high);
894 read_acpi_int(NULL, EEEPC_EC_FAN_LRPM, &low); 963 ec_read(EEEPC_EC_FAN_LRPM, &low);
895 return (high << 8 | low); 964 return high << 8 | low;
896} 965}
897 966
898static int eeepc_get_fan_ctrl(void) 967static int eeepc_get_fan_ctrl(void)
899{ 968{
900 int value = 0; 969 u8 value = 0;
901 970
902 read_acpi_int(NULL, EEEPC_EC_FAN_CTRL, &value); 971 ec_read(EEEPC_EC_FAN_CTRL, &value);
903 return ((value & 0x02 ? 1 : 0)); 972 if (value & 0x02)
973 return 1; /* manual */
974 else
975 return 2; /* automatic */
904} 976}
905 977
906static void eeepc_set_fan_ctrl(int manual) 978static void eeepc_set_fan_ctrl(int manual)
907{ 979{
908 int value = 0; 980 u8 value = 0;
909 981
910 read_acpi_int(NULL, EEEPC_EC_FAN_CTRL, &value); 982 ec_read(EEEPC_EC_FAN_CTRL, &value);
911 if (manual) 983 if (manual == 1)
912 value |= 0x02; 984 value |= 0x02;
913 else 985 else
914 value &= ~0x02; 986 value &= ~0x02;
915 ec_write(EEEPC_EC_SFB3, value); 987 ec_write(EEEPC_EC_FAN_CTRL, value);
916} 988}
917 989
918static ssize_t store_sys_hwmon(void (*set)(int), const char *buf, size_t count) 990static ssize_t store_sys_hwmon(void (*set)(int), const char *buf, size_t count)
@@ -970,348 +1042,461 @@ static struct attribute_group hwmon_attribute_group = {
970 .attrs = hwmon_attributes 1042 .attrs = hwmon_attributes
971}; 1043};
972 1044
973/* 1045static void eeepc_hwmon_exit(struct eeepc_laptop *eeepc)
974 * exit/init
975 */
976static void eeepc_backlight_exit(void)
977{ 1046{
978 if (eeepc_backlight_device) 1047 struct device *hwmon;
979 backlight_device_unregister(eeepc_backlight_device); 1048
980 eeepc_backlight_device = NULL; 1049 hwmon = eeepc->hwmon_device;
1050 if (!hwmon)
1051 return;
1052 sysfs_remove_group(&hwmon->kobj,
1053 &hwmon_attribute_group);
1054 hwmon_device_unregister(hwmon);
1055 eeepc->hwmon_device = NULL;
981} 1056}
982 1057
983static void eeepc_rfkill_exit(void) 1058static int eeepc_hwmon_init(struct eeepc_laptop *eeepc)
984{ 1059{
985 eeepc_unregister_rfkill_notifier("\\_SB.PCI0.P0P5"); 1060 struct device *hwmon;
986 eeepc_unregister_rfkill_notifier("\\_SB.PCI0.P0P6"); 1061 int result;
987 eeepc_unregister_rfkill_notifier("\\_SB.PCI0.P0P7"); 1062
988 if (ehotk->wlan_rfkill) { 1063 hwmon = hwmon_device_register(&eeepc->platform_device->dev);
989 rfkill_unregister(ehotk->wlan_rfkill); 1064 if (IS_ERR(hwmon)) {
990 rfkill_destroy(ehotk->wlan_rfkill); 1065 pr_err("Could not register eeepc hwmon device\n");
991 ehotk->wlan_rfkill = NULL; 1066 eeepc->hwmon_device = NULL;
992 } 1067 return PTR_ERR(hwmon);
993 /*
994 * Refresh pci hotplug in case the rfkill state was changed after
995 * eeepc_unregister_rfkill_notifier()
996 */
997 eeepc_rfkill_hotplug();
998 if (ehotk->hotplug_slot)
999 pci_hp_deregister(ehotk->hotplug_slot);
1000
1001 if (ehotk->bluetooth_rfkill) {
1002 rfkill_unregister(ehotk->bluetooth_rfkill);
1003 rfkill_destroy(ehotk->bluetooth_rfkill);
1004 ehotk->bluetooth_rfkill = NULL;
1005 }
1006 if (ehotk->wwan3g_rfkill) {
1007 rfkill_unregister(ehotk->wwan3g_rfkill);
1008 rfkill_destroy(ehotk->wwan3g_rfkill);
1009 ehotk->wwan3g_rfkill = NULL;
1010 }
1011 if (ehotk->wimax_rfkill) {
1012 rfkill_unregister(ehotk->wimax_rfkill);
1013 rfkill_destroy(ehotk->wimax_rfkill);
1014 ehotk->wimax_rfkill = NULL;
1015 } 1068 }
1069 eeepc->hwmon_device = hwmon;
1070 result = sysfs_create_group(&hwmon->kobj,
1071 &hwmon_attribute_group);
1072 if (result)
1073 eeepc_hwmon_exit(eeepc);
1074 return result;
1016} 1075}
1017 1076
1018static void eeepc_input_exit(void) 1077/*
1078 * Backlight device
1079 */
1080static int read_brightness(struct backlight_device *bd)
1019{ 1081{
1020 if (ehotk->inputdev) 1082 struct eeepc_laptop *eeepc = bl_get_data(bd);
1021 input_unregister_device(ehotk->inputdev); 1083
1084 return get_acpi(eeepc, CM_ASL_PANELBRIGHT);
1022} 1085}
1023 1086
1024static void eeepc_hwmon_exit(void) 1087static int set_brightness(struct backlight_device *bd, int value)
1025{ 1088{
1026 struct device *hwmon; 1089 struct eeepc_laptop *eeepc = bl_get_data(bd);
1027 1090
1028 hwmon = eeepc_hwmon_device; 1091 return set_acpi(eeepc, CM_ASL_PANELBRIGHT, value);
1029 if (!hwmon)
1030 return ;
1031 sysfs_remove_group(&hwmon->kobj,
1032 &hwmon_attribute_group);
1033 hwmon_device_unregister(hwmon);
1034 eeepc_hwmon_device = NULL;
1035} 1092}
1036 1093
1037static int eeepc_new_rfkill(struct rfkill **rfkill, 1094static int update_bl_status(struct backlight_device *bd)
1038 const char *name, struct device *dev,
1039 enum rfkill_type type, int cm)
1040{ 1095{
1041 int result; 1096 return set_brightness(bd, bd->props.brightness);
1097}
1042 1098
1043 result = get_acpi(cm); 1099static struct backlight_ops eeepcbl_ops = {
1044 if (result < 0) 1100 .get_brightness = read_brightness,
1045 return result; 1101 .update_status = update_bl_status,
1102};
1046 1103
1047 *rfkill = rfkill_alloc(name, dev, type, 1104static int eeepc_backlight_notify(struct eeepc_laptop *eeepc)
1048 &eeepc_rfkill_ops, (void *)(unsigned long)cm); 1105{
1106 struct backlight_device *bd = eeepc->backlight_device;
1107 int old = bd->props.brightness;
1049 1108
1050 if (!*rfkill) 1109 backlight_force_update(bd, BACKLIGHT_UPDATE_HOTKEY);
1051 return -EINVAL;
1052 1110
1053 rfkill_init_sw_state(*rfkill, get_acpi(cm) != 1); 1111 return old;
1054 result = rfkill_register(*rfkill); 1112}
1055 if (result) { 1113
1056 rfkill_destroy(*rfkill); 1114static int eeepc_backlight_init(struct eeepc_laptop *eeepc)
1057 *rfkill = NULL; 1115{
1058 return result; 1116 struct backlight_device *bd;
1117
1118 bd = backlight_device_register(EEEPC_LAPTOP_FILE,
1119 &eeepc->platform_device->dev,
1120 eeepc, &eeepcbl_ops);
1121 if (IS_ERR(bd)) {
1122 pr_err("Could not register eeepc backlight device\n");
1123 eeepc->backlight_device = NULL;
1124 return PTR_ERR(bd);
1059 } 1125 }
1126 eeepc->backlight_device = bd;
1127 bd->props.max_brightness = 15;
1128 bd->props.brightness = read_brightness(bd);
1129 bd->props.power = FB_BLANK_UNBLANK;
1130 backlight_update_status(bd);
1060 return 0; 1131 return 0;
1061} 1132}
1062 1133
1134static void eeepc_backlight_exit(struct eeepc_laptop *eeepc)
1135{
1136 if (eeepc->backlight_device)
1137 backlight_device_unregister(eeepc->backlight_device);
1138 eeepc->backlight_device = NULL;
1139}
1140
1063 1141
1064static int eeepc_rfkill_init(struct device *dev) 1142/*
1143 * Input device (i.e. hotkeys)
1144 */
1145static int eeepc_input_init(struct eeepc_laptop *eeepc)
1065{ 1146{
1066 int result = 0; 1147 struct input_dev *input;
1148 int error;
1149
1150 input = input_allocate_device();
1151 if (!input) {
1152 pr_info("Unable to allocate input device\n");
1153 return -ENOMEM;
1154 }
1067 1155
1068 mutex_init(&ehotk->hotplug_lock); 1156 input->name = "Asus EeePC extra buttons";
1157 input->phys = EEEPC_LAPTOP_FILE "/input0";
1158 input->id.bustype = BUS_HOST;
1159 input->dev.parent = &eeepc->platform_device->dev;
1069 1160
1070 result = eeepc_new_rfkill(&ehotk->wlan_rfkill, 1161 error = sparse_keymap_setup(input, eeepc_keymap, NULL);
1071 "eeepc-wlan", dev, 1162 if (error) {
1072 RFKILL_TYPE_WLAN, CM_ASL_WLAN); 1163 pr_err("Unable to setup input device keymap\n");
1164 goto err_free_dev;
1165 }
1073 1166
1074 if (result && result != -ENODEV) 1167 error = input_register_device(input);
1075 goto exit; 1168 if (error) {
1169 pr_err("Unable to register input device\n");
1170 goto err_free_keymap;
1171 }
1076 1172
1077 result = eeepc_new_rfkill(&ehotk->bluetooth_rfkill, 1173 eeepc->inputdev = input;
1078 "eeepc-bluetooth", dev, 1174 return 0;
1079 RFKILL_TYPE_BLUETOOTH, CM_ASL_BLUETOOTH);
1080 1175
1081 if (result && result != -ENODEV) 1176 err_free_keymap:
1082 goto exit; 1177 sparse_keymap_free(input);
1178 err_free_dev:
1179 input_free_device(input);
1180 return error;
1181}
1083 1182
1084 result = eeepc_new_rfkill(&ehotk->wwan3g_rfkill, 1183static void eeepc_input_exit(struct eeepc_laptop *eeepc)
1085 "eeepc-wwan3g", dev, 1184{
1086 RFKILL_TYPE_WWAN, CM_ASL_3G); 1185 if (eeepc->inputdev) {
1186 input_unregister_device(eeepc->inputdev);
1187 kfree(eeepc->keymap);
1188 }
1189}
1087 1190
1088 if (result && result != -ENODEV) 1191/*
1089 goto exit; 1192 * ACPI driver
1193 */
1194static void eeepc_acpi_notify(struct acpi_device *device, u32 event)
1195{
1196 struct eeepc_laptop *eeepc = acpi_driver_data(device);
1197 u16 count;
1090 1198
1091 result = eeepc_new_rfkill(&ehotk->wimax_rfkill, 1199 if (event > ACPI_MAX_SYS_NOTIFY)
1092 "eeepc-wimax", dev, 1200 return;
1093 RFKILL_TYPE_WIMAX, CM_ASL_WIMAX); 1201 count = eeepc->event_count[event % 128]++;
1202 acpi_bus_generate_proc_event(device, event, count);
1203 acpi_bus_generate_netlink_event(device->pnp.device_class,
1204 dev_name(&device->dev), event,
1205 count);
1094 1206
1095 if (result && result != -ENODEV) 1207 /* Brightness events are special */
1096 goto exit; 1208 if (event >= NOTIFY_BRN_MIN && event <= NOTIFY_BRN_MAX) {
1209
1210 /* Ignore them completely if the acpi video driver is used */
1211 if (eeepc->backlight_device != NULL) {
1212 int old_brightness, new_brightness;
1213
1214 /* Update the backlight device. */
1215 old_brightness = eeepc_backlight_notify(eeepc);
1216
1217 /* Convert event to keypress (obsolescent hack) */
1218 new_brightness = event - NOTIFY_BRN_MIN;
1219
1220 if (new_brightness < old_brightness) {
1221 event = NOTIFY_BRN_MIN; /* brightness down */
1222 } else if (new_brightness > old_brightness) {
1223 event = NOTIFY_BRN_MAX; /* brightness up */
1224 } else {
1225 /*
1226 * no change in brightness - already at min/max,
1227 * event will be desired value (or else ignored)
1228 */
1229 }
1230 sparse_keymap_report_event(eeepc->inputdev, event,
1231 1, true);
1232 }
1233 } else {
1234 /* Everything else is a bona-fide keypress event */
1235 sparse_keymap_report_event(eeepc->inputdev, event, 1, true);
1236 }
1237}
1238
1239static void eeepc_dmi_check(struct eeepc_laptop *eeepc)
1240{
1241 const char *model;
1242
1243 model = dmi_get_system_info(DMI_PRODUCT_NAME);
1244 if (!model)
1245 return;
1097 1246
1098 result = eeepc_setup_pci_hotplug();
1099 /* 1247 /*
1100 * If we get -EBUSY then something else is handling the PCI hotplug - 1248 * Blacklist for setting cpufv (cpu speed).
1101 * don't fail in this case 1249 *
1250 * EeePC 4G ("701") implements CFVS, but it is not supported
1251 * by the pre-installed OS, and the original option to change it
1252 * in the BIOS setup screen was removed in later versions.
1253 *
1254 * Judging by the lack of "Super Hybrid Engine" on Asus product pages,
1255 * this applies to all "701" models (4G/4G Surf/2G Surf).
1256 *
1257 * So Asus made a deliberate decision not to support it on this model.
1258 * We have several reports that using it can cause the system to hang
1259 *
1260 * The hang has also been reported on a "702" (Model name "8G"?).
1261 *
1262 * We avoid dmi_check_system() / dmi_match(), because they use
1263 * substring matching. We don't want to affect the "701SD"
1264 * and "701SDX" models, because they do support S.H.E.
1102 */ 1265 */
1103 if (result == -EBUSY) 1266 if (strcmp(model, "701") == 0 || strcmp(model, "702") == 0) {
1104 result = 0; 1267 eeepc->cpufv_disabled = true;
1268 pr_info("model %s does not officially support setting cpu "
1269 "speed\n", model);
1270 pr_info("cpufv disabled to avoid instability\n");
1271 }
1105 1272
1106 eeepc_register_rfkill_notifier("\\_SB.PCI0.P0P5");
1107 eeepc_register_rfkill_notifier("\\_SB.PCI0.P0P6");
1108 eeepc_register_rfkill_notifier("\\_SB.PCI0.P0P7");
1109 /* 1273 /*
1110 * Refresh pci hotplug in case the rfkill state was changed during 1274 * Blacklist for wlan hotplug
1111 * setup. 1275 *
1276 * Eeepc 1005HA doesn't work like others models and don't need the
1277 * hotplug code. In fact, current hotplug code seems to unplug another
1278 * device...
1112 */ 1279 */
1113 eeepc_rfkill_hotplug(); 1280 if (strcmp(model, "1005HA") == 0 || strcmp(model, "1201N") == 0) {
1114 1281 eeepc->hotplug_disabled = true;
1115exit: 1282 pr_info("wlan hotplug disabled\n");
1116 if (result && result != -ENODEV) 1283 }
1117 eeepc_rfkill_exit();
1118 return result;
1119} 1284}
1120 1285
1121static int eeepc_backlight_init(struct device *dev) 1286static void cmsg_quirk(struct eeepc_laptop *eeepc, int cm, const char *name)
1122{ 1287{
1123 struct backlight_device *bd; 1288 int dummy;
1124 1289
1125 bd = backlight_device_register(EEEPC_HOTK_FILE, dev, 1290 /* Some BIOSes do not report cm although it is avaliable.
1126 NULL, &eeepcbl_ops); 1291 Check if cm_getv[cm] works and, if yes, assume cm should be set. */
1127 if (IS_ERR(bd)) { 1292 if (!(eeepc->cm_supported & (1 << cm))
1128 pr_err("Could not register eeepc backlight device\n"); 1293 && !read_acpi_int(eeepc->handle, cm_getv[cm], &dummy)) {
1129 eeepc_backlight_device = NULL; 1294 pr_info("%s (%x) not reported by BIOS,"
1130 return PTR_ERR(bd); 1295 " enabling anyway\n", name, 1 << cm);
1296 eeepc->cm_supported |= 1 << cm;
1131 } 1297 }
1132 eeepc_backlight_device = bd;
1133 bd->props.max_brightness = 15;
1134 bd->props.brightness = read_brightness(NULL);
1135 bd->props.power = FB_BLANK_UNBLANK;
1136 backlight_update_status(bd);
1137 return 0;
1138} 1298}
1139 1299
1140static int eeepc_hwmon_init(struct device *dev) 1300static void cmsg_quirks(struct eeepc_laptop *eeepc)
1141{ 1301{
1142 struct device *hwmon; 1302 cmsg_quirk(eeepc, CM_ASL_LID, "LID");
1143 int result; 1303 cmsg_quirk(eeepc, CM_ASL_TYPE, "TYPE");
1144 1304 cmsg_quirk(eeepc, CM_ASL_PANELPOWER, "PANELPOWER");
1145 hwmon = hwmon_device_register(dev); 1305 cmsg_quirk(eeepc, CM_ASL_TPD, "TPD");
1146 if (IS_ERR(hwmon)) {
1147 pr_err("Could not register eeepc hwmon device\n");
1148 eeepc_hwmon_device = NULL;
1149 return PTR_ERR(hwmon);
1150 }
1151 eeepc_hwmon_device = hwmon;
1152 result = sysfs_create_group(&hwmon->kobj,
1153 &hwmon_attribute_group);
1154 if (result)
1155 eeepc_hwmon_exit();
1156 return result;
1157} 1306}
1158 1307
1159static int eeepc_input_init(struct device *dev) 1308static int eeepc_acpi_init(struct eeepc_laptop *eeepc,
1309 struct acpi_device *device)
1160{ 1310{
1161 const struct key_entry *key; 1311 unsigned int init_flags;
1162 int result; 1312 int result;
1163 1313
1164 ehotk->inputdev = input_allocate_device(); 1314 result = acpi_bus_get_status(device);
1165 if (!ehotk->inputdev) { 1315 if (result)
1166 pr_info("Unable to allocate input device\n"); 1316 return result;
1167 return -ENOMEM; 1317 if (!device->status.present) {
1318 pr_err("Hotkey device not present, aborting\n");
1319 return -ENODEV;
1168 } 1320 }
1169 ehotk->inputdev->name = "Asus EeePC extra buttons"; 1321
1170 ehotk->inputdev->dev.parent = dev; 1322 init_flags = DISABLE_ASL_WLAN | DISABLE_ASL_DISPLAYSWITCH;
1171 ehotk->inputdev->phys = EEEPC_HOTK_FILE "/input0"; 1323 pr_notice("Hotkey init flags 0x%x\n", init_flags);
1172 ehotk->inputdev->id.bustype = BUS_HOST; 1324
1173 ehotk->inputdev->getkeycode = eeepc_getkeycode; 1325 if (write_acpi_int(eeepc->handle, "INIT", init_flags)) {
1174 ehotk->inputdev->setkeycode = eeepc_setkeycode; 1326 pr_err("Hotkey initialization failed\n");
1175 1327 return -ENODEV;
1176 for (key = eeepc_keymap; key->type != KE_END; key++) {
1177 switch (key->type) {
1178 case KE_KEY:
1179 set_bit(EV_KEY, ehotk->inputdev->evbit);
1180 set_bit(key->keycode, ehotk->inputdev->keybit);
1181 break;
1182 }
1183 } 1328 }
1184 result = input_register_device(ehotk->inputdev); 1329
1185 if (result) { 1330 /* get control methods supported */
1186 pr_info("Unable to register input device\n"); 1331 if (read_acpi_int(eeepc->handle, "CMSG", &eeepc->cm_supported)) {
1187 input_free_device(ehotk->inputdev); 1332 pr_err("Get control methods supported failed\n");
1188 return result; 1333 return -ENODEV;
1189 } 1334 }
1335 cmsg_quirks(eeepc);
1336 pr_info("Get control methods supported: 0x%x\n", eeepc->cm_supported);
1337
1190 return 0; 1338 return 0;
1191} 1339}
1192 1340
1193static int __devinit eeepc_hotk_add(struct acpi_device *device) 1341static void __devinit eeepc_enable_camera(struct eeepc_laptop *eeepc)
1194{ 1342{
1195 struct device *dev; 1343 /*
1344 * If the following call to set_acpi() fails, it's because there's no
1345 * camera so we can ignore the error.
1346 */
1347 if (get_acpi(eeepc, CM_ASL_CAMERA) == 0)
1348 set_acpi(eeepc, CM_ASL_CAMERA, 1);
1349}
1350
1351static bool eeepc_device_present;
1352
1353static int __devinit eeepc_acpi_add(struct acpi_device *device)
1354{
1355 struct eeepc_laptop *eeepc;
1196 int result; 1356 int result;
1197 1357
1198 if (!device) 1358 pr_notice(EEEPC_LAPTOP_NAME "\n");
1199 return -EINVAL; 1359 eeepc = kzalloc(sizeof(struct eeepc_laptop), GFP_KERNEL);
1200 pr_notice(EEEPC_HOTK_NAME "\n"); 1360 if (!eeepc)
1201 ehotk = kzalloc(sizeof(struct eeepc_hotk), GFP_KERNEL);
1202 if (!ehotk)
1203 return -ENOMEM; 1361 return -ENOMEM;
1204 ehotk->init_flag = DISABLE_ASL_WLAN | DISABLE_ASL_DISPLAYSWITCH; 1362 eeepc->handle = device->handle;
1205 ehotk->handle = device->handle; 1363 strcpy(acpi_device_name(device), EEEPC_ACPI_DEVICE_NAME);
1206 strcpy(acpi_device_name(device), EEEPC_HOTK_DEVICE_NAME); 1364 strcpy(acpi_device_class(device), EEEPC_ACPI_CLASS);
1207 strcpy(acpi_device_class(device), EEEPC_HOTK_CLASS); 1365 device->driver_data = eeepc;
1208 device->driver_data = ehotk;
1209 ehotk->device = device;
1210
1211 result = eeepc_hotk_check();
1212 if (result)
1213 goto fail_platform_driver;
1214 eeepc_enable_camera();
1215 1366
1216 /* Register platform stuff */ 1367 eeepc->hotplug_disabled = hotplug_disabled;
1217 result = platform_driver_register(&platform_driver); 1368
1218 if (result) 1369 eeepc_dmi_check(eeepc);
1219 goto fail_platform_driver; 1370
1220 platform_device = platform_device_alloc(EEEPC_HOTK_FILE, -1); 1371 result = eeepc_acpi_init(eeepc, device);
1221 if (!platform_device) {
1222 result = -ENOMEM;
1223 goto fail_platform_device1;
1224 }
1225 result = platform_device_add(platform_device);
1226 if (result)
1227 goto fail_platform_device2;
1228 result = sysfs_create_group(&platform_device->dev.kobj,
1229 &platform_attribute_group);
1230 if (result) 1372 if (result)
1231 goto fail_sysfs; 1373 goto fail_platform;
1374 eeepc_enable_camera(eeepc);
1232 1375
1233 dev = &platform_device->dev; 1376 /*
1377 * Register the platform device first. It is used as a parent for the
1378 * sub-devices below.
1379 *
1380 * Note that if there are multiple instances of this ACPI device it
1381 * will bail out, because the platform device is registered with a
1382 * fixed name. Of course it doesn't make sense to have more than one,
1383 * and machine-specific scripts find the fixed name convenient. But
1384 * It's also good for us to exclude multiple instances because both
1385 * our hwmon and our wlan rfkill subdevice use global ACPI objects
1386 * (the EC and the wlan PCI slot respectively).
1387 */
1388 result = eeepc_platform_init(eeepc);
1389 if (result)
1390 goto fail_platform;
1234 1391
1235 if (!acpi_video_backlight_support()) { 1392 if (!acpi_video_backlight_support()) {
1236 result = eeepc_backlight_init(dev); 1393 result = eeepc_backlight_init(eeepc);
1237 if (result) 1394 if (result)
1238 goto fail_backlight; 1395 goto fail_backlight;
1239 } else 1396 } else
1240 pr_info("Backlight controlled by ACPI video " 1397 pr_info("Backlight controlled by ACPI video driver\n");
1241 "driver\n");
1242 1398
1243 result = eeepc_input_init(dev); 1399 result = eeepc_input_init(eeepc);
1244 if (result) 1400 if (result)
1245 goto fail_input; 1401 goto fail_input;
1246 1402
1247 result = eeepc_hwmon_init(dev); 1403 result = eeepc_hwmon_init(eeepc);
1248 if (result) 1404 if (result)
1249 goto fail_hwmon; 1405 goto fail_hwmon;
1250 1406
1251 result = eeepc_rfkill_init(dev); 1407 result = eeepc_led_init(eeepc);
1408 if (result)
1409 goto fail_led;
1410
1411 result = eeepc_rfkill_init(eeepc);
1252 if (result) 1412 if (result)
1253 goto fail_rfkill; 1413 goto fail_rfkill;
1254 1414
1415 eeepc_device_present = true;
1255 return 0; 1416 return 0;
1256 1417
1257fail_rfkill: 1418fail_rfkill:
1258 eeepc_hwmon_exit(); 1419 eeepc_led_exit(eeepc);
1420fail_led:
1421 eeepc_hwmon_exit(eeepc);
1259fail_hwmon: 1422fail_hwmon:
1260 eeepc_input_exit(); 1423 eeepc_input_exit(eeepc);
1261fail_input: 1424fail_input:
1262 eeepc_backlight_exit(); 1425 eeepc_backlight_exit(eeepc);
1263fail_backlight: 1426fail_backlight:
1264 sysfs_remove_group(&platform_device->dev.kobj, 1427 eeepc_platform_exit(eeepc);
1265 &platform_attribute_group); 1428fail_platform:
1266fail_sysfs: 1429 kfree(eeepc);
1267 platform_device_del(platform_device);
1268fail_platform_device2:
1269 platform_device_put(platform_device);
1270fail_platform_device1:
1271 platform_driver_unregister(&platform_driver);
1272fail_platform_driver:
1273 kfree(ehotk);
1274 1430
1275 return result; 1431 return result;
1276} 1432}
1277 1433
1278static int eeepc_hotk_remove(struct acpi_device *device, int type) 1434static int eeepc_acpi_remove(struct acpi_device *device, int type)
1279{ 1435{
1280 if (!device || !acpi_driver_data(device)) 1436 struct eeepc_laptop *eeepc = acpi_driver_data(device);
1281 return -EINVAL;
1282 1437
1283 eeepc_backlight_exit(); 1438 eeepc_backlight_exit(eeepc);
1284 eeepc_rfkill_exit(); 1439 eeepc_rfkill_exit(eeepc);
1285 eeepc_input_exit(); 1440 eeepc_input_exit(eeepc);
1286 eeepc_hwmon_exit(); 1441 eeepc_hwmon_exit(eeepc);
1287 sysfs_remove_group(&platform_device->dev.kobj, 1442 eeepc_led_exit(eeepc);
1288 &platform_attribute_group); 1443 eeepc_platform_exit(eeepc);
1289 platform_device_unregister(platform_device);
1290 platform_driver_unregister(&platform_driver);
1291 1444
1292 kfree(ehotk); 1445 kfree(eeepc);
1293 return 0; 1446 return 0;
1294} 1447}
1295 1448
1449
1450static const struct acpi_device_id eeepc_device_ids[] = {
1451 {EEEPC_ACPI_HID, 0},
1452 {"", 0},
1453};
1454MODULE_DEVICE_TABLE(acpi, eeepc_device_ids);
1455
1456static struct acpi_driver eeepc_acpi_driver = {
1457 .name = EEEPC_LAPTOP_NAME,
1458 .class = EEEPC_ACPI_CLASS,
1459 .owner = THIS_MODULE,
1460 .ids = eeepc_device_ids,
1461 .flags = ACPI_DRIVER_ALL_NOTIFY_EVENTS,
1462 .ops = {
1463 .add = eeepc_acpi_add,
1464 .remove = eeepc_acpi_remove,
1465 .notify = eeepc_acpi_notify,
1466 },
1467};
1468
1469
1296static int __init eeepc_laptop_init(void) 1470static int __init eeepc_laptop_init(void)
1297{ 1471{
1298 int result; 1472 int result;
1299 1473
1300 if (acpi_disabled) 1474 result = platform_driver_register(&platform_driver);
1301 return -ENODEV;
1302 result = acpi_bus_register_driver(&eeepc_hotk_driver);
1303 if (result < 0) 1475 if (result < 0)
1304 return result; 1476 return result;
1305 if (!ehotk) { 1477
1306 acpi_bus_unregister_driver(&eeepc_hotk_driver); 1478 result = acpi_bus_register_driver(&eeepc_acpi_driver);
1307 return -ENODEV; 1479 if (result < 0)
1480 goto fail_acpi_driver;
1481
1482 if (!eeepc_device_present) {
1483 result = -ENODEV;
1484 goto fail_no_device;
1308 } 1485 }
1486
1309 return 0; 1487 return 0;
1488
1489fail_no_device:
1490 acpi_bus_unregister_driver(&eeepc_acpi_driver);
1491fail_acpi_driver:
1492 platform_driver_unregister(&platform_driver);
1493 return result;
1310} 1494}
1311 1495
1312static void __exit eeepc_laptop_exit(void) 1496static void __exit eeepc_laptop_exit(void)
1313{ 1497{
1314 acpi_bus_unregister_driver(&eeepc_hotk_driver); 1498 acpi_bus_unregister_driver(&eeepc_acpi_driver);
1499 platform_driver_unregister(&platform_driver);
1315} 1500}
1316 1501
1317module_init(eeepc_laptop_init); 1502module_init(eeepc_laptop_init);
diff --git a/drivers/platform/x86/fujitsu-laptop.c b/drivers/platform/x86/fujitsu-laptop.c
index bcd4ba8be7db..5f3320d468f6 100644
--- a/drivers/platform/x86/fujitsu-laptop.c
+++ b/drivers/platform/x86/fujitsu-laptop.c
@@ -164,7 +164,7 @@ struct fujitsu_hotkey_t {
164 struct input_dev *input; 164 struct input_dev *input;
165 char phys[32]; 165 char phys[32];
166 struct platform_device *pf_device; 166 struct platform_device *pf_device;
167 struct kfifo *fifo; 167 struct kfifo fifo;
168 spinlock_t fifo_lock; 168 spinlock_t fifo_lock;
169 int rfkill_supported; 169 int rfkill_supported;
170 int rfkill_state; 170 int rfkill_state;
@@ -376,8 +376,8 @@ static int get_lcd_level(void)
376 376
377 status = 377 status =
378 acpi_evaluate_integer(fujitsu->acpi_handle, "GBLL", NULL, &state); 378 acpi_evaluate_integer(fujitsu->acpi_handle, "GBLL", NULL, &state);
379 if (status < 0) 379 if (ACPI_FAILURE(status))
380 return status; 380 return 0;
381 381
382 fujitsu->brightness_level = state & 0x0fffffff; 382 fujitsu->brightness_level = state & 0x0fffffff;
383 383
@@ -398,8 +398,8 @@ static int get_max_brightness(void)
398 398
399 status = 399 status =
400 acpi_evaluate_integer(fujitsu->acpi_handle, "RBLL", NULL, &state); 400 acpi_evaluate_integer(fujitsu->acpi_handle, "RBLL", NULL, &state);
401 if (status < 0) 401 if (ACPI_FAILURE(status))
402 return status; 402 return -1;
403 403
404 fujitsu->max_brightness = state; 404 fujitsu->max_brightness = state;
405 405
@@ -824,12 +824,10 @@ static int acpi_fujitsu_hotkey_add(struct acpi_device *device)
824 824
825 /* kfifo */ 825 /* kfifo */
826 spin_lock_init(&fujitsu_hotkey->fifo_lock); 826 spin_lock_init(&fujitsu_hotkey->fifo_lock);
827 fujitsu_hotkey->fifo = 827 error = kfifo_alloc(&fujitsu_hotkey->fifo, RINGBUFFERSIZE * sizeof(int),
828 kfifo_alloc(RINGBUFFERSIZE * sizeof(int), GFP_KERNEL, 828 GFP_KERNEL);
829 &fujitsu_hotkey->fifo_lock); 829 if (error) {
830 if (IS_ERR(fujitsu_hotkey->fifo)) {
831 printk(KERN_ERR "kfifo_alloc failed\n"); 830 printk(KERN_ERR "kfifo_alloc failed\n");
832 error = PTR_ERR(fujitsu_hotkey->fifo);
833 goto err_stop; 831 goto err_stop;
834 } 832 }
835 833
@@ -934,7 +932,7 @@ err_unregister_input_dev:
934err_free_input_dev: 932err_free_input_dev:
935 input_free_device(input); 933 input_free_device(input);
936err_free_fifo: 934err_free_fifo:
937 kfifo_free(fujitsu_hotkey->fifo); 935 kfifo_free(&fujitsu_hotkey->fifo);
938err_stop: 936err_stop:
939 return result; 937 return result;
940} 938}
@@ -956,7 +954,7 @@ static int acpi_fujitsu_hotkey_remove(struct acpi_device *device, int type)
956 954
957 input_free_device(input); 955 input_free_device(input);
958 956
959 kfifo_free(fujitsu_hotkey->fifo); 957 kfifo_free(&fujitsu_hotkey->fifo);
960 958
961 fujitsu_hotkey->acpi_handle = NULL; 959 fujitsu_hotkey->acpi_handle = NULL;
962 960
@@ -1008,9 +1006,10 @@ static void acpi_fujitsu_hotkey_notify(struct acpi_device *device, u32 event)
1008 vdbg_printk(FUJLAPTOP_DBG_TRACE, 1006 vdbg_printk(FUJLAPTOP_DBG_TRACE,
1009 "Push keycode into ringbuffer [%d]\n", 1007 "Push keycode into ringbuffer [%d]\n",
1010 keycode); 1008 keycode);
1011 status = kfifo_put(fujitsu_hotkey->fifo, 1009 status = kfifo_in_locked(&fujitsu_hotkey->fifo,
1012 (unsigned char *)&keycode, 1010 (unsigned char *)&keycode,
1013 sizeof(keycode)); 1011 sizeof(keycode),
1012 &fujitsu_hotkey->fifo_lock);
1014 if (status != sizeof(keycode)) { 1013 if (status != sizeof(keycode)) {
1015 vdbg_printk(FUJLAPTOP_DBG_WARN, 1014 vdbg_printk(FUJLAPTOP_DBG_WARN,
1016 "Could not push keycode [0x%x]\n", 1015 "Could not push keycode [0x%x]\n",
@@ -1021,11 +1020,12 @@ static void acpi_fujitsu_hotkey_notify(struct acpi_device *device, u32 event)
1021 } 1020 }
1022 } else if (keycode == 0) { 1021 } else if (keycode == 0) {
1023 while ((status = 1022 while ((status =
1024 kfifo_get 1023 kfifo_out_locked(
1025 (fujitsu_hotkey->fifo, (unsigned char *) 1024 &fujitsu_hotkey->fifo,
1026 &keycode_r, 1025 (unsigned char *) &keycode_r,
1027 sizeof 1026 sizeof(keycode_r),
1028 (keycode_r))) == sizeof(keycode_r)) { 1027 &fujitsu_hotkey->fifo_lock))
1028 == sizeof(keycode_r)) {
1029 input_report_key(input, keycode_r, 0); 1029 input_report_key(input, keycode_r, 0);
1030 input_sync(input); 1030 input_sync(input);
1031 vdbg_printk(FUJLAPTOP_DBG_TRACE, 1031 vdbg_printk(FUJLAPTOP_DBG_TRACE,
diff --git a/drivers/platform/x86/hp-wmi.c b/drivers/platform/x86/hp-wmi.c
index f00a71c58e69..ad4c414dbfbc 100644
--- a/drivers/platform/x86/hp-wmi.c
+++ b/drivers/platform/x86/hp-wmi.c
@@ -51,6 +51,12 @@ MODULE_ALIAS("wmi:5FB7F034-2C63-45e9-BE91-3D44E2C707E4");
51#define HPWMI_WIRELESS_QUERY 0x5 51#define HPWMI_WIRELESS_QUERY 0x5
52#define HPWMI_HOTKEY_QUERY 0xc 52#define HPWMI_HOTKEY_QUERY 0xc
53 53
54enum hp_wmi_radio {
55 HPWMI_WIFI = 0,
56 HPWMI_BLUETOOTH = 1,
57 HPWMI_WWAN = 2,
58};
59
54static int __init hp_wmi_bios_setup(struct platform_device *device); 60static int __init hp_wmi_bios_setup(struct platform_device *device);
55static int __exit hp_wmi_bios_remove(struct platform_device *device); 61static int __exit hp_wmi_bios_remove(struct platform_device *device);
56static int hp_wmi_resume_handler(struct device *device); 62static int hp_wmi_resume_handler(struct device *device);
@@ -128,10 +134,15 @@ static int hp_wmi_perform_query(int query, int write, int value)
128 134
129 obj = output.pointer; 135 obj = output.pointer;
130 136
131 if (!obj || obj->type != ACPI_TYPE_BUFFER) 137 if (!obj)
132 return -EINVAL; 138 return -EINVAL;
139 else if (obj->type != ACPI_TYPE_BUFFER) {
140 kfree(obj);
141 return -EINVAL;
142 }
133 143
134 bios_return = *((struct bios_return *)obj->buffer.pointer); 144 bios_return = *((struct bios_return *)obj->buffer.pointer);
145 kfree(obj);
135 if (bios_return.return_code > 0) 146 if (bios_return.return_code > 0)
136 return bios_return.return_code * -1; 147 return bios_return.return_code * -1;
137 else 148 else
@@ -175,8 +186,8 @@ static int hp_wmi_tablet_state(void)
175 186
176static int hp_wmi_set_block(void *data, bool blocked) 187static int hp_wmi_set_block(void *data, bool blocked)
177{ 188{
178 unsigned long b = (unsigned long) data; 189 enum hp_wmi_radio r = (enum hp_wmi_radio) data;
179 int query = BIT(b + 8) | ((!blocked) << b); 190 int query = BIT(r + 8) | ((!blocked) << r);
180 191
181 return hp_wmi_perform_query(HPWMI_WIRELESS_QUERY, 1, query); 192 return hp_wmi_perform_query(HPWMI_WIRELESS_QUERY, 1, query);
182} 193}
@@ -185,31 +196,23 @@ static const struct rfkill_ops hp_wmi_rfkill_ops = {
185 .set_block = hp_wmi_set_block, 196 .set_block = hp_wmi_set_block,
186}; 197};
187 198
188static bool hp_wmi_wifi_state(void) 199static bool hp_wmi_get_sw_state(enum hp_wmi_radio r)
189{
190 int wireless = hp_wmi_perform_query(HPWMI_WIRELESS_QUERY, 0, 0);
191
192 if (wireless & 0x100)
193 return false;
194 else
195 return true;
196}
197
198static bool hp_wmi_bluetooth_state(void)
199{ 200{
200 int wireless = hp_wmi_perform_query(HPWMI_WIRELESS_QUERY, 0, 0); 201 int wireless = hp_wmi_perform_query(HPWMI_WIRELESS_QUERY, 0, 0);
202 int mask = 0x200 << (r * 8);
201 203
202 if (wireless & 0x10000) 204 if (wireless & mask)
203 return false; 205 return false;
204 else 206 else
205 return true; 207 return true;
206} 208}
207 209
208static bool hp_wmi_wwan_state(void) 210static bool hp_wmi_get_hw_state(enum hp_wmi_radio r)
209{ 211{
210 int wireless = hp_wmi_perform_query(HPWMI_WIRELESS_QUERY, 0, 0); 212 int wireless = hp_wmi_perform_query(HPWMI_WIRELESS_QUERY, 0, 0);
213 int mask = 0x800 << (r * 8);
211 214
212 if (wireless & 0x1000000) 215 if (wireless & mask)
213 return false; 216 return false;
214 else 217 else
215 return true; 218 return true;
@@ -334,49 +337,62 @@ static void hp_wmi_notify(u32 value, void *context)
334 struct acpi_buffer response = { ACPI_ALLOCATE_BUFFER, NULL }; 337 struct acpi_buffer response = { ACPI_ALLOCATE_BUFFER, NULL };
335 static struct key_entry *key; 338 static struct key_entry *key;
336 union acpi_object *obj; 339 union acpi_object *obj;
340 int eventcode;
341 acpi_status status;
337 342
338 wmi_get_event_data(value, &response); 343 status = wmi_get_event_data(value, &response);
344 if (status != AE_OK) {
345 printk(KERN_INFO "hp-wmi: bad event status 0x%x\n", status);
346 return;
347 }
339 348
340 obj = (union acpi_object *)response.pointer; 349 obj = (union acpi_object *)response.pointer;
341 350
342 if (obj && obj->type == ACPI_TYPE_BUFFER && obj->buffer.length == 8) { 351 if (!obj || obj->type != ACPI_TYPE_BUFFER || obj->buffer.length != 8) {
343 int eventcode = *((u8 *) obj->buffer.pointer); 352 printk(KERN_INFO "HP WMI: Unknown response received\n");
344 if (eventcode == 0x4) 353 kfree(obj);
345 eventcode = hp_wmi_perform_query(HPWMI_HOTKEY_QUERY, 0, 354 return;
346 0); 355 }
347 key = hp_wmi_get_entry_by_scancode(eventcode); 356
348 if (key) { 357 eventcode = *((u8 *) obj->buffer.pointer);
349 switch (key->type) { 358 kfree(obj);
350 case KE_KEY: 359 if (eventcode == 0x4)
351 input_report_key(hp_wmi_input_dev, 360 eventcode = hp_wmi_perform_query(HPWMI_HOTKEY_QUERY, 0,
352 key->keycode, 1); 361 0);
353 input_sync(hp_wmi_input_dev); 362 key = hp_wmi_get_entry_by_scancode(eventcode);
354 input_report_key(hp_wmi_input_dev, 363 if (key) {
355 key->keycode, 0); 364 switch (key->type) {
356 input_sync(hp_wmi_input_dev); 365 case KE_KEY:
357 break; 366 input_report_key(hp_wmi_input_dev,
358 } 367 key->keycode, 1);
359 } else if (eventcode == 0x1) { 368 input_sync(hp_wmi_input_dev);
360 input_report_switch(hp_wmi_input_dev, SW_DOCK, 369 input_report_key(hp_wmi_input_dev,
361 hp_wmi_dock_state()); 370 key->keycode, 0);
362 input_report_switch(hp_wmi_input_dev, SW_TABLET_MODE,
363 hp_wmi_tablet_state());
364 input_sync(hp_wmi_input_dev); 371 input_sync(hp_wmi_input_dev);
365 } else if (eventcode == 0x5) { 372 break;
366 if (wifi_rfkill) 373 }
367 rfkill_set_sw_state(wifi_rfkill, 374 } else if (eventcode == 0x1) {
368 hp_wmi_wifi_state()); 375 input_report_switch(hp_wmi_input_dev, SW_DOCK,
369 if (bluetooth_rfkill) 376 hp_wmi_dock_state());
370 rfkill_set_sw_state(bluetooth_rfkill, 377 input_report_switch(hp_wmi_input_dev, SW_TABLET_MODE,
371 hp_wmi_bluetooth_state()); 378 hp_wmi_tablet_state());
372 if (wwan_rfkill) 379 input_sync(hp_wmi_input_dev);
373 rfkill_set_sw_state(wwan_rfkill, 380 } else if (eventcode == 0x5) {
374 hp_wmi_wwan_state()); 381 if (wifi_rfkill)
375 } else 382 rfkill_set_states(wifi_rfkill,
376 printk(KERN_INFO "HP WMI: Unknown key pressed - %x\n", 383 hp_wmi_get_sw_state(HPWMI_WIFI),
377 eventcode); 384 hp_wmi_get_hw_state(HPWMI_WIFI));
385 if (bluetooth_rfkill)
386 rfkill_set_states(bluetooth_rfkill,
387 hp_wmi_get_sw_state(HPWMI_BLUETOOTH),
388 hp_wmi_get_hw_state(HPWMI_BLUETOOTH));
389 if (wwan_rfkill)
390 rfkill_set_states(wwan_rfkill,
391 hp_wmi_get_sw_state(HPWMI_WWAN),
392 hp_wmi_get_hw_state(HPWMI_WWAN));
378 } else 393 } else
379 printk(KERN_INFO "HP WMI: Unknown response received\n"); 394 printk(KERN_INFO "HP WMI: Unknown key pressed - %x\n",
395 eventcode);
380} 396}
381 397
382static int __init hp_wmi_input_setup(void) 398static int __init hp_wmi_input_setup(void)
@@ -455,7 +471,11 @@ static int __init hp_wmi_bios_setup(struct platform_device *device)
455 wifi_rfkill = rfkill_alloc("hp-wifi", &device->dev, 471 wifi_rfkill = rfkill_alloc("hp-wifi", &device->dev,
456 RFKILL_TYPE_WLAN, 472 RFKILL_TYPE_WLAN,
457 &hp_wmi_rfkill_ops, 473 &hp_wmi_rfkill_ops,
458 (void *) 0); 474 (void *) HPWMI_WIFI);
475 rfkill_init_sw_state(wifi_rfkill,
476 hp_wmi_get_sw_state(HPWMI_WIFI));
477 rfkill_set_hw_state(wifi_rfkill,
478 hp_wmi_get_hw_state(HPWMI_WIFI));
459 err = rfkill_register(wifi_rfkill); 479 err = rfkill_register(wifi_rfkill);
460 if (err) 480 if (err)
461 goto register_wifi_error; 481 goto register_wifi_error;
@@ -465,7 +485,11 @@ static int __init hp_wmi_bios_setup(struct platform_device *device)
465 bluetooth_rfkill = rfkill_alloc("hp-bluetooth", &device->dev, 485 bluetooth_rfkill = rfkill_alloc("hp-bluetooth", &device->dev,
466 RFKILL_TYPE_BLUETOOTH, 486 RFKILL_TYPE_BLUETOOTH,
467 &hp_wmi_rfkill_ops, 487 &hp_wmi_rfkill_ops,
468 (void *) 1); 488 (void *) HPWMI_BLUETOOTH);
489 rfkill_init_sw_state(bluetooth_rfkill,
490 hp_wmi_get_sw_state(HPWMI_BLUETOOTH));
491 rfkill_set_hw_state(bluetooth_rfkill,
492 hp_wmi_get_hw_state(HPWMI_BLUETOOTH));
469 err = rfkill_register(bluetooth_rfkill); 493 err = rfkill_register(bluetooth_rfkill);
470 if (err) 494 if (err)
471 goto register_bluetooth_error; 495 goto register_bluetooth_error;
@@ -475,7 +499,11 @@ static int __init hp_wmi_bios_setup(struct platform_device *device)
475 wwan_rfkill = rfkill_alloc("hp-wwan", &device->dev, 499 wwan_rfkill = rfkill_alloc("hp-wwan", &device->dev,
476 RFKILL_TYPE_WWAN, 500 RFKILL_TYPE_WWAN,
477 &hp_wmi_rfkill_ops, 501 &hp_wmi_rfkill_ops,
478 (void *) 2); 502 (void *) HPWMI_WWAN);
503 rfkill_init_sw_state(wwan_rfkill,
504 hp_wmi_get_sw_state(HPWMI_WWAN));
505 rfkill_set_hw_state(wwan_rfkill,
506 hp_wmi_get_hw_state(HPWMI_WWAN));
479 err = rfkill_register(wwan_rfkill); 507 err = rfkill_register(wwan_rfkill);
480 if (err) 508 if (err)
481 goto register_wwan_err; 509 goto register_wwan_err;
@@ -533,6 +561,19 @@ static int hp_wmi_resume_handler(struct device *device)
533 input_sync(hp_wmi_input_dev); 561 input_sync(hp_wmi_input_dev);
534 } 562 }
535 563
564 if (wifi_rfkill)
565 rfkill_set_states(wifi_rfkill,
566 hp_wmi_get_sw_state(HPWMI_WIFI),
567 hp_wmi_get_hw_state(HPWMI_WIFI));
568 if (bluetooth_rfkill)
569 rfkill_set_states(bluetooth_rfkill,
570 hp_wmi_get_sw_state(HPWMI_BLUETOOTH),
571 hp_wmi_get_hw_state(HPWMI_BLUETOOTH));
572 if (wwan_rfkill)
573 rfkill_set_states(wwan_rfkill,
574 hp_wmi_get_sw_state(HPWMI_WWAN),
575 hp_wmi_get_hw_state(HPWMI_WWAN));
576
536 return 0; 577 return 0;
537} 578}
538 579
@@ -543,7 +584,7 @@ static int __init hp_wmi_init(void)
543 if (wmi_has_guid(HPWMI_EVENT_GUID)) { 584 if (wmi_has_guid(HPWMI_EVENT_GUID)) {
544 err = wmi_install_notify_handler(HPWMI_EVENT_GUID, 585 err = wmi_install_notify_handler(HPWMI_EVENT_GUID,
545 hp_wmi_notify, NULL); 586 hp_wmi_notify, NULL);
546 if (!err) 587 if (ACPI_SUCCESS(err))
547 hp_wmi_input_setup(); 588 hp_wmi_input_setup();
548 } 589 }
549 590
diff --git a/drivers/platform/x86/msi-wmi.c b/drivers/platform/x86/msi-wmi.c
new file mode 100644
index 000000000000..f5f70d4c6913
--- /dev/null
+++ b/drivers/platform/x86/msi-wmi.c
@@ -0,0 +1,288 @@
1/*
2 * MSI WMI hotkeys
3 *
4 * Copyright (C) 2009 Novell <trenn@suse.de>
5 *
6 * Most stuff taken over from hp-wmi
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 */
22
23
24#include <linux/kernel.h>
25#include <linux/input.h>
26#include <linux/input/sparse-keymap.h>
27#include <linux/acpi.h>
28#include <linux/backlight.h>
29
30MODULE_AUTHOR("Thomas Renninger <trenn@suse.de>");
31MODULE_DESCRIPTION("MSI laptop WMI hotkeys driver");
32MODULE_LICENSE("GPL");
33
34MODULE_ALIAS("wmi:551A1F84-FBDD-4125-91DB-3EA8F44F1D45");
35MODULE_ALIAS("wmi:B6F3EEF2-3D2F-49DC-9DE3-85BCE18C62F2");
36
37#define DRV_NAME "msi-wmi"
38#define DRV_PFX DRV_NAME ": "
39
40#define MSIWMI_BIOS_GUID "551A1F84-FBDD-4125-91DB-3EA8F44F1D45"
41#define MSIWMI_EVENT_GUID "B6F3EEF2-3D2F-49DC-9DE3-85BCE18C62F2"
42
43#define dprintk(msg...) pr_debug(DRV_PFX msg)
44
45#define KEYCODE_BASE 0xD0
46#define MSI_WMI_BRIGHTNESSUP KEYCODE_BASE
47#define MSI_WMI_BRIGHTNESSDOWN (KEYCODE_BASE + 1)
48#define MSI_WMI_VOLUMEUP (KEYCODE_BASE + 2)
49#define MSI_WMI_VOLUMEDOWN (KEYCODE_BASE + 3)
50static struct key_entry msi_wmi_keymap[] = {
51 { KE_KEY, MSI_WMI_BRIGHTNESSUP, {KEY_BRIGHTNESSUP} },
52 { KE_KEY, MSI_WMI_BRIGHTNESSDOWN, {KEY_BRIGHTNESSDOWN} },
53 { KE_KEY, MSI_WMI_VOLUMEUP, {KEY_VOLUMEUP} },
54 { KE_KEY, MSI_WMI_VOLUMEDOWN, {KEY_VOLUMEDOWN} },
55 { KE_END, 0}
56};
57static ktime_t last_pressed[ARRAY_SIZE(msi_wmi_keymap) - 1];
58
59struct backlight_device *backlight;
60
61static int backlight_map[] = { 0x00, 0x33, 0x66, 0x99, 0xCC, 0xFF };
62
63static struct input_dev *msi_wmi_input_dev;
64
65static int msi_wmi_query_block(int instance, int *ret)
66{
67 acpi_status status;
68 union acpi_object *obj;
69
70 struct acpi_buffer output = { ACPI_ALLOCATE_BUFFER, NULL };
71
72 status = wmi_query_block(MSIWMI_BIOS_GUID, instance, &output);
73
74 obj = output.pointer;
75
76 if (!obj || obj->type != ACPI_TYPE_INTEGER) {
77 if (obj) {
78 printk(KERN_ERR DRV_PFX "query block returned object "
79 "type: %d - buffer length:%d\n", obj->type,
80 obj->type == ACPI_TYPE_BUFFER ?
81 obj->buffer.length : 0);
82 }
83 kfree(obj);
84 return -EINVAL;
85 }
86 *ret = obj->integer.value;
87 kfree(obj);
88 return 0;
89}
90
91static int msi_wmi_set_block(int instance, int value)
92{
93 acpi_status status;
94
95 struct acpi_buffer input = { sizeof(int), &value };
96
97 dprintk("Going to set block of instance: %d - value: %d\n",
98 instance, value);
99
100 status = wmi_set_block(MSIWMI_BIOS_GUID, instance, &input);
101
102 return ACPI_SUCCESS(status) ? 0 : 1;
103}
104
105static int bl_get(struct backlight_device *bd)
106{
107 int level, err, ret;
108
109 /* Instance 1 is "get backlight", cmp with DSDT */
110 err = msi_wmi_query_block(1, &ret);
111 if (err) {
112 printk(KERN_ERR DRV_PFX "Could not query backlight: %d\n", err);
113 return -EINVAL;
114 }
115 dprintk("Get: Query block returned: %d\n", ret);
116 for (level = 0; level < ARRAY_SIZE(backlight_map); level++) {
117 if (backlight_map[level] == ret) {
118 dprintk("Current backlight level: 0x%X - index: %d\n",
119 backlight_map[level], level);
120 break;
121 }
122 }
123 if (level == ARRAY_SIZE(backlight_map)) {
124 printk(KERN_ERR DRV_PFX "get: Invalid brightness value: 0x%X\n",
125 ret);
126 return -EINVAL;
127 }
128 return level;
129}
130
131static int bl_set_status(struct backlight_device *bd)
132{
133 int bright = bd->props.brightness;
134 if (bright >= ARRAY_SIZE(backlight_map) || bright < 0)
135 return -EINVAL;
136
137 /* Instance 0 is "set backlight" */
138 return msi_wmi_set_block(0, backlight_map[bright]);
139}
140
141static struct backlight_ops msi_backlight_ops = {
142 .get_brightness = bl_get,
143 .update_status = bl_set_status,
144};
145
146static void msi_wmi_notify(u32 value, void *context)
147{
148 struct acpi_buffer response = { ACPI_ALLOCATE_BUFFER, NULL };
149 static struct key_entry *key;
150 union acpi_object *obj;
151 ktime_t cur;
152 acpi_status status;
153
154 status = wmi_get_event_data(value, &response);
155 if (status != AE_OK) {
156 printk(KERN_INFO DRV_PFX "bad event status 0x%x\n", status);
157 return;
158 }
159
160 obj = (union acpi_object *)response.pointer;
161
162 if (obj && obj->type == ACPI_TYPE_INTEGER) {
163 int eventcode = obj->integer.value;
164 dprintk("Eventcode: 0x%x\n", eventcode);
165 key = sparse_keymap_entry_from_scancode(msi_wmi_input_dev,
166 eventcode);
167 if (key) {
168 ktime_t diff;
169 cur = ktime_get_real();
170 diff = ktime_sub(cur, last_pressed[key->code -
171 KEYCODE_BASE]);
172 /* Ignore event if the same event happened in a 50 ms
173 timeframe -> Key press may result in 10-20 GPEs */
174 if (ktime_to_us(diff) < 1000 * 50) {
175 dprintk("Suppressed key event 0x%X - "
176 "Last press was %lld us ago\n",
177 key->code, ktime_to_us(diff));
178 return;
179 }
180 last_pressed[key->code - KEYCODE_BASE] = cur;
181
182 if (key->type == KE_KEY &&
183 /* Brightness is served via acpi video driver */
184 (!acpi_video_backlight_support() ||
185 (key->code != MSI_WMI_BRIGHTNESSUP &&
186 key->code != MSI_WMI_BRIGHTNESSDOWN))) {
187 dprintk("Send key: 0x%X - "
188 "Input layer keycode: %d\n", key->code,
189 key->keycode);
190 sparse_keymap_report_entry(msi_wmi_input_dev,
191 key, 1, true);
192 }
193 } else
194 printk(KERN_INFO "Unknown key pressed - %x\n",
195 eventcode);
196 } else
197 printk(KERN_INFO DRV_PFX "Unknown event received\n");
198 kfree(response.pointer);
199}
200
201static int __init msi_wmi_input_setup(void)
202{
203 int err;
204
205 msi_wmi_input_dev = input_allocate_device();
206 if (!msi_wmi_input_dev)
207 return -ENOMEM;
208
209 msi_wmi_input_dev->name = "MSI WMI hotkeys";
210 msi_wmi_input_dev->phys = "wmi/input0";
211 msi_wmi_input_dev->id.bustype = BUS_HOST;
212
213 err = sparse_keymap_setup(msi_wmi_input_dev, msi_wmi_keymap, NULL);
214 if (err)
215 goto err_free_dev;
216
217 err = input_register_device(msi_wmi_input_dev);
218
219 if (err)
220 goto err_free_keymap;
221
222 memset(last_pressed, 0, sizeof(last_pressed));
223
224 return 0;
225
226err_free_keymap:
227 sparse_keymap_free(msi_wmi_input_dev);
228err_free_dev:
229 input_free_device(msi_wmi_input_dev);
230 return err;
231}
232
233static int __init msi_wmi_init(void)
234{
235 int err;
236
237 if (!wmi_has_guid(MSIWMI_EVENT_GUID)) {
238 printk(KERN_ERR
239 "This machine doesn't have MSI-hotkeys through WMI\n");
240 return -ENODEV;
241 }
242 err = wmi_install_notify_handler(MSIWMI_EVENT_GUID,
243 msi_wmi_notify, NULL);
244 if (ACPI_FAILURE(err))
245 return -EINVAL;
246
247 err = msi_wmi_input_setup();
248 if (err)
249 goto err_uninstall_notifier;
250
251 if (!acpi_video_backlight_support()) {
252 backlight = backlight_device_register(DRV_NAME,
253 NULL, NULL, &msi_backlight_ops);
254 if (IS_ERR(backlight))
255 goto err_free_input;
256
257 backlight->props.max_brightness = ARRAY_SIZE(backlight_map) - 1;
258 err = bl_get(NULL);
259 if (err < 0)
260 goto err_free_backlight;
261
262 backlight->props.brightness = err;
263 }
264 dprintk("Event handler installed\n");
265
266 return 0;
267
268err_free_backlight:
269 backlight_device_unregister(backlight);
270err_free_input:
271 input_unregister_device(msi_wmi_input_dev);
272err_uninstall_notifier:
273 wmi_remove_notify_handler(MSIWMI_EVENT_GUID);
274 return err;
275}
276
277static void __exit msi_wmi_exit(void)
278{
279 if (wmi_has_guid(MSIWMI_EVENT_GUID)) {
280 wmi_remove_notify_handler(MSIWMI_EVENT_GUID);
281 sparse_keymap_free(msi_wmi_input_dev);
282 input_unregister_device(msi_wmi_input_dev);
283 backlight_device_unregister(backlight);
284 }
285}
286
287module_init(msi_wmi_init);
288module_exit(msi_wmi_exit);
diff --git a/drivers/platform/x86/sony-laptop.c b/drivers/platform/x86/sony-laptop.c
index 7a2cc8a5c975..3f71a605a492 100644
--- a/drivers/platform/x86/sony-laptop.c
+++ b/drivers/platform/x86/sony-laptop.c
@@ -131,6 +131,7 @@ enum sony_nc_rfkill {
131 N_SONY_RFKILL, 131 N_SONY_RFKILL,
132}; 132};
133 133
134static int sony_rfkill_handle;
134static struct rfkill *sony_rfkill_devices[N_SONY_RFKILL]; 135static struct rfkill *sony_rfkill_devices[N_SONY_RFKILL];
135static int sony_rfkill_address[N_SONY_RFKILL] = {0x300, 0x500, 0x700, 0x900}; 136static int sony_rfkill_address[N_SONY_RFKILL] = {0x300, 0x500, 0x700, 0x900};
136static void sony_nc_rfkill_update(void); 137static void sony_nc_rfkill_update(void);
@@ -142,7 +143,7 @@ struct sony_laptop_input_s {
142 atomic_t users; 143 atomic_t users;
143 struct input_dev *jog_dev; 144 struct input_dev *jog_dev;
144 struct input_dev *key_dev; 145 struct input_dev *key_dev;
145 struct kfifo *fifo; 146 struct kfifo fifo;
146 spinlock_t fifo_lock; 147 spinlock_t fifo_lock;
147 struct workqueue_struct *wq; 148 struct workqueue_struct *wq;
148}; 149};
@@ -232,6 +233,7 @@ static int sony_laptop_input_index[] = {
232 56, /* 69 SONYPI_EVENT_VOLUME_INC_PRESSED */ 233 56, /* 69 SONYPI_EVENT_VOLUME_INC_PRESSED */
233 57, /* 70 SONYPI_EVENT_VOLUME_DEC_PRESSED */ 234 57, /* 70 SONYPI_EVENT_VOLUME_DEC_PRESSED */
234 -1, /* 71 SONYPI_EVENT_BRIGHTNESS_PRESSED */ 235 -1, /* 71 SONYPI_EVENT_BRIGHTNESS_PRESSED */
236 58, /* 72 SONYPI_EVENT_MEDIA_PRESSED */
235}; 237};
236 238
237static int sony_laptop_input_keycode_map[] = { 239static int sony_laptop_input_keycode_map[] = {
@@ -293,6 +295,7 @@ static int sony_laptop_input_keycode_map[] = {
293 KEY_F15, /* 55 SONYPI_EVENT_SETTINGKEY_PRESSED */ 295 KEY_F15, /* 55 SONYPI_EVENT_SETTINGKEY_PRESSED */
294 KEY_VOLUMEUP, /* 56 SONYPI_EVENT_VOLUME_INC_PRESSED */ 296 KEY_VOLUMEUP, /* 56 SONYPI_EVENT_VOLUME_INC_PRESSED */
295 KEY_VOLUMEDOWN, /* 57 SONYPI_EVENT_VOLUME_DEC_PRESSED */ 297 KEY_VOLUMEDOWN, /* 57 SONYPI_EVENT_VOLUME_DEC_PRESSED */
298 KEY_MEDIA, /* 58 SONYPI_EVENT_MEDIA_PRESSED */
296}; 299};
297 300
298/* release buttons after a short delay if pressed */ 301/* release buttons after a short delay if pressed */
@@ -300,8 +303,9 @@ static void do_sony_laptop_release_key(struct work_struct *work)
300{ 303{
301 struct sony_laptop_keypress kp; 304 struct sony_laptop_keypress kp;
302 305
303 while (kfifo_get(sony_laptop_input.fifo, (unsigned char *)&kp, 306 while (kfifo_out_locked(&sony_laptop_input.fifo, (unsigned char *)&kp,
304 sizeof(kp)) == sizeof(kp)) { 307 sizeof(kp), &sony_laptop_input.fifo_lock)
308 == sizeof(kp)) {
305 msleep(10); 309 msleep(10);
306 input_report_key(kp.dev, kp.key, 0); 310 input_report_key(kp.dev, kp.key, 0);
307 input_sync(kp.dev); 311 input_sync(kp.dev);
@@ -362,8 +366,9 @@ static void sony_laptop_report_input_event(u8 event)
362 /* we emit the scancode so we can always remap the key */ 366 /* we emit the scancode so we can always remap the key */
363 input_event(kp.dev, EV_MSC, MSC_SCAN, event); 367 input_event(kp.dev, EV_MSC, MSC_SCAN, event);
364 input_sync(kp.dev); 368 input_sync(kp.dev);
365 kfifo_put(sony_laptop_input.fifo, 369 kfifo_in_locked(&sony_laptop_input.fifo,
366 (unsigned char *)&kp, sizeof(kp)); 370 (unsigned char *)&kp, sizeof(kp),
371 &sony_laptop_input.fifo_lock);
367 372
368 if (!work_pending(&sony_laptop_release_key_work)) 373 if (!work_pending(&sony_laptop_release_key_work))
369 queue_work(sony_laptop_input.wq, 374 queue_work(sony_laptop_input.wq,
@@ -385,12 +390,10 @@ static int sony_laptop_setup_input(struct acpi_device *acpi_device)
385 390
386 /* kfifo */ 391 /* kfifo */
387 spin_lock_init(&sony_laptop_input.fifo_lock); 392 spin_lock_init(&sony_laptop_input.fifo_lock);
388 sony_laptop_input.fifo = 393 error =
389 kfifo_alloc(SONY_LAPTOP_BUF_SIZE, GFP_KERNEL, 394 kfifo_alloc(&sony_laptop_input.fifo, SONY_LAPTOP_BUF_SIZE, GFP_KERNEL);
390 &sony_laptop_input.fifo_lock); 395 if (error) {
391 if (IS_ERR(sony_laptop_input.fifo)) {
392 printk(KERN_ERR DRV_PFX "kfifo_alloc failed\n"); 396 printk(KERN_ERR DRV_PFX "kfifo_alloc failed\n");
393 error = PTR_ERR(sony_laptop_input.fifo);
394 goto err_dec_users; 397 goto err_dec_users;
395 } 398 }
396 399
@@ -474,7 +477,7 @@ err_destroy_wq:
474 destroy_workqueue(sony_laptop_input.wq); 477 destroy_workqueue(sony_laptop_input.wq);
475 478
476err_free_kfifo: 479err_free_kfifo:
477 kfifo_free(sony_laptop_input.fifo); 480 kfifo_free(&sony_laptop_input.fifo);
478 481
479err_dec_users: 482err_dec_users:
480 atomic_dec(&sony_laptop_input.users); 483 atomic_dec(&sony_laptop_input.users);
@@ -500,7 +503,7 @@ static void sony_laptop_remove_input(void)
500 } 503 }
501 504
502 destroy_workqueue(sony_laptop_input.wq); 505 destroy_workqueue(sony_laptop_input.wq);
503 kfifo_free(sony_laptop_input.fifo); 506 kfifo_free(&sony_laptop_input.fifo);
504} 507}
505 508
506/*********** Platform Device ***********/ 509/*********** Platform Device ***********/
@@ -890,6 +893,8 @@ static struct sony_nc_event sony_100_events[] = {
890 { 0x0C, SONYPI_EVENT_FNKEY_RELEASED }, 893 { 0x0C, SONYPI_EVENT_FNKEY_RELEASED },
891 { 0x9f, SONYPI_EVENT_CD_EJECT_PRESSED }, 894 { 0x9f, SONYPI_EVENT_CD_EJECT_PRESSED },
892 { 0x1f, SONYPI_EVENT_ANYBUTTON_RELEASED }, 895 { 0x1f, SONYPI_EVENT_ANYBUTTON_RELEASED },
896 { 0xa1, SONYPI_EVENT_MEDIA_PRESSED },
897 { 0x21, SONYPI_EVENT_ANYBUTTON_RELEASED },
893 { 0, 0 }, 898 { 0, 0 },
894}; 899};
895 900
@@ -961,7 +966,7 @@ static void sony_nc_notify(struct acpi_device *device, u32 event)
961 else 966 else
962 sony_laptop_report_input_event(ev); 967 sony_laptop_report_input_event(ev);
963 } 968 }
964 } else if (sony_find_snc_handle(0x124) == ev) { 969 } else if (sony_find_snc_handle(sony_rfkill_handle) == ev) {
965 sony_nc_rfkill_update(); 970 sony_nc_rfkill_update();
966 return; 971 return;
967 } 972 }
@@ -1067,7 +1072,7 @@ static int sony_nc_rfkill_set(void *data, bool blocked)
1067 if (!blocked) 1072 if (!blocked)
1068 argument |= 0xff0000; 1073 argument |= 0xff0000;
1069 1074
1070 return sony_call_snc_handle(0x124, argument, &result); 1075 return sony_call_snc_handle(sony_rfkill_handle, argument, &result);
1071} 1076}
1072 1077
1073static const struct rfkill_ops sony_rfkill_ops = { 1078static const struct rfkill_ops sony_rfkill_ops = {
@@ -1110,7 +1115,7 @@ static int sony_nc_setup_rfkill(struct acpi_device *device,
1110 if (!rfk) 1115 if (!rfk)
1111 return -ENOMEM; 1116 return -ENOMEM;
1112 1117
1113 sony_call_snc_handle(0x124, 0x200, &result); 1118 sony_call_snc_handle(sony_rfkill_handle, 0x200, &result);
1114 hwblock = !(result & 0x1); 1119 hwblock = !(result & 0x1);
1115 rfkill_set_hw_state(rfk, hwblock); 1120 rfkill_set_hw_state(rfk, hwblock);
1116 1121
@@ -1129,7 +1134,7 @@ static void sony_nc_rfkill_update()
1129 int result; 1134 int result;
1130 bool hwblock; 1135 bool hwblock;
1131 1136
1132 sony_call_snc_handle(0x124, 0x200, &result); 1137 sony_call_snc_handle(sony_rfkill_handle, 0x200, &result);
1133 hwblock = !(result & 0x1); 1138 hwblock = !(result & 0x1);
1134 1139
1135 for (i = 0; i < N_SONY_RFKILL; i++) { 1140 for (i = 0; i < N_SONY_RFKILL; i++) {
@@ -1145,36 +1150,82 @@ static void sony_nc_rfkill_update()
1145 continue; 1150 continue;
1146 } 1151 }
1147 1152
1148 sony_call_snc_handle(0x124, argument, &result); 1153 sony_call_snc_handle(sony_rfkill_handle, argument, &result);
1149 rfkill_set_states(sony_rfkill_devices[i], 1154 rfkill_set_states(sony_rfkill_devices[i],
1150 !(result & 0xf), false); 1155 !(result & 0xf), false);
1151 } 1156 }
1152} 1157}
1153 1158
1154static int sony_nc_rfkill_setup(struct acpi_device *device) 1159static void sony_nc_rfkill_setup(struct acpi_device *device)
1155{ 1160{
1156 int result, ret; 1161 int offset;
1162 u8 dev_code, i;
1163 acpi_status status;
1164 struct acpi_object_list params;
1165 union acpi_object in_obj;
1166 union acpi_object *device_enum;
1167 struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL };
1157 1168
1158 if (sony_find_snc_handle(0x124) == -1) 1169 offset = sony_find_snc_handle(0x124);
1159 return -1; 1170 if (offset == -1) {
1171 offset = sony_find_snc_handle(0x135);
1172 if (offset == -1)
1173 return;
1174 else
1175 sony_rfkill_handle = 0x135;
1176 } else
1177 sony_rfkill_handle = 0x124;
1178 dprintk("Found rkfill handle: 0x%.4x\n", sony_rfkill_handle);
1160 1179
1161 ret = sony_call_snc_handle(0x124, 0xb00, &result); 1180 /* need to read the whole buffer returned by the acpi call to SN06
1162 if (ret) { 1181 * here otherwise we may miss some features
1163 printk(KERN_INFO DRV_PFX 1182 */
1164 "Unable to enumerate rfkill devices: %x\n", ret); 1183 params.count = 1;
1165 return ret; 1184 params.pointer = &in_obj;
1185 in_obj.type = ACPI_TYPE_INTEGER;
1186 in_obj.integer.value = offset;
1187 status = acpi_evaluate_object(sony_nc_acpi_handle, "SN06", &params,
1188 &buffer);
1189 if (ACPI_FAILURE(status)) {
1190 dprintk("Radio device enumeration failed\n");
1191 return;
1166 } 1192 }
1167 1193
1168 if (result & 0x1) 1194 device_enum = (union acpi_object *) buffer.pointer;
1169 sony_nc_setup_rfkill(device, SONY_WIFI); 1195 if (!device_enum || device_enum->type != ACPI_TYPE_BUFFER) {
1170 if (result & 0x2) 1196 printk(KERN_ERR "Invalid SN06 return object 0x%.2x\n",
1171 sony_nc_setup_rfkill(device, SONY_BLUETOOTH); 1197 device_enum->type);
1172 if (result & 0x1c) 1198 goto out_no_enum;
1173 sony_nc_setup_rfkill(device, SONY_WWAN); 1199 }
1174 if (result & 0x20)
1175 sony_nc_setup_rfkill(device, SONY_WIMAX);
1176 1200
1177 return 0; 1201 /* the buffer is filled with magic numbers describing the devices
1202 * available, 0xff terminates the enumeration
1203 */
1204 for (i = 0; i < device_enum->buffer.length; i++) {
1205
1206 dev_code = *(device_enum->buffer.pointer + i);
1207 if (dev_code == 0xff)
1208 break;
1209
1210 dprintk("Radio devices, looking at 0x%.2x\n", dev_code);
1211
1212 if (dev_code == 0 && !sony_rfkill_devices[SONY_WIFI])
1213 sony_nc_setup_rfkill(device, SONY_WIFI);
1214
1215 if (dev_code == 0x10 && !sony_rfkill_devices[SONY_BLUETOOTH])
1216 sony_nc_setup_rfkill(device, SONY_BLUETOOTH);
1217
1218 if ((0xf0 & dev_code) == 0x20 &&
1219 !sony_rfkill_devices[SONY_WWAN])
1220 sony_nc_setup_rfkill(device, SONY_WWAN);
1221
1222 if (dev_code == 0x30 && !sony_rfkill_devices[SONY_WIMAX])
1223 sony_nc_setup_rfkill(device, SONY_WIMAX);
1224 }
1225
1226out_no_enum:
1227 kfree(buffer.pointer);
1228 return;
1178} 1229}
1179 1230
1180static int sony_nc_add(struct acpi_device *device) 1231static int sony_nc_add(struct acpi_device *device)
@@ -2079,7 +2130,7 @@ static struct attribute_group spic_attribute_group = {
2079 2130
2080struct sonypi_compat_s { 2131struct sonypi_compat_s {
2081 struct fasync_struct *fifo_async; 2132 struct fasync_struct *fifo_async;
2082 struct kfifo *fifo; 2133 struct kfifo fifo;
2083 spinlock_t fifo_lock; 2134 spinlock_t fifo_lock;
2084 wait_queue_head_t fifo_proc_list; 2135 wait_queue_head_t fifo_proc_list;
2085 atomic_t open_count; 2136 atomic_t open_count;
@@ -2104,12 +2155,12 @@ static int sonypi_misc_open(struct inode *inode, struct file *file)
2104 /* Flush input queue on first open */ 2155 /* Flush input queue on first open */
2105 unsigned long flags; 2156 unsigned long flags;
2106 2157
2107 spin_lock_irqsave(sonypi_compat.fifo->lock, flags); 2158 spin_lock_irqsave(&sonypi_compat.fifo_lock, flags);
2108 2159
2109 if (atomic_inc_return(&sonypi_compat.open_count) == 1) 2160 if (atomic_inc_return(&sonypi_compat.open_count) == 1)
2110 __kfifo_reset(sonypi_compat.fifo); 2161 kfifo_reset(&sonypi_compat.fifo);
2111 2162
2112 spin_unlock_irqrestore(sonypi_compat.fifo->lock, flags); 2163 spin_unlock_irqrestore(&sonypi_compat.fifo_lock, flags);
2113 2164
2114 return 0; 2165 return 0;
2115} 2166}
@@ -2120,17 +2171,18 @@ static ssize_t sonypi_misc_read(struct file *file, char __user *buf,
2120 ssize_t ret; 2171 ssize_t ret;
2121 unsigned char c; 2172 unsigned char c;
2122 2173
2123 if ((kfifo_len(sonypi_compat.fifo) == 0) && 2174 if ((kfifo_len(&sonypi_compat.fifo) == 0) &&
2124 (file->f_flags & O_NONBLOCK)) 2175 (file->f_flags & O_NONBLOCK))
2125 return -EAGAIN; 2176 return -EAGAIN;
2126 2177
2127 ret = wait_event_interruptible(sonypi_compat.fifo_proc_list, 2178 ret = wait_event_interruptible(sonypi_compat.fifo_proc_list,
2128 kfifo_len(sonypi_compat.fifo) != 0); 2179 kfifo_len(&sonypi_compat.fifo) != 0);
2129 if (ret) 2180 if (ret)
2130 return ret; 2181 return ret;
2131 2182
2132 while (ret < count && 2183 while (ret < count &&
2133 (kfifo_get(sonypi_compat.fifo, &c, sizeof(c)) == sizeof(c))) { 2184 (kfifo_out_locked(&sonypi_compat.fifo, &c, sizeof(c),
2185 &sonypi_compat.fifo_lock) == sizeof(c))) {
2134 if (put_user(c, buf++)) 2186 if (put_user(c, buf++))
2135 return -EFAULT; 2187 return -EFAULT;
2136 ret++; 2188 ret++;
@@ -2147,7 +2199,7 @@ static ssize_t sonypi_misc_read(struct file *file, char __user *buf,
2147static unsigned int sonypi_misc_poll(struct file *file, poll_table *wait) 2199static unsigned int sonypi_misc_poll(struct file *file, poll_table *wait)
2148{ 2200{
2149 poll_wait(file, &sonypi_compat.fifo_proc_list, wait); 2201 poll_wait(file, &sonypi_compat.fifo_proc_list, wait);
2150 if (kfifo_len(sonypi_compat.fifo)) 2202 if (kfifo_len(&sonypi_compat.fifo))
2151 return POLLIN | POLLRDNORM; 2203 return POLLIN | POLLRDNORM;
2152 return 0; 2204 return 0;
2153} 2205}
@@ -2309,7 +2361,8 @@ static struct miscdevice sonypi_misc_device = {
2309 2361
2310static void sonypi_compat_report_event(u8 event) 2362static void sonypi_compat_report_event(u8 event)
2311{ 2363{
2312 kfifo_put(sonypi_compat.fifo, (unsigned char *)&event, sizeof(event)); 2364 kfifo_in_locked(&sonypi_compat.fifo, (unsigned char *)&event,
2365 sizeof(event), &sonypi_compat.fifo_lock);
2313 kill_fasync(&sonypi_compat.fifo_async, SIGIO, POLL_IN); 2366 kill_fasync(&sonypi_compat.fifo_async, SIGIO, POLL_IN);
2314 wake_up_interruptible(&sonypi_compat.fifo_proc_list); 2367 wake_up_interruptible(&sonypi_compat.fifo_proc_list);
2315} 2368}
@@ -2319,11 +2372,11 @@ static int sonypi_compat_init(void)
2319 int error; 2372 int error;
2320 2373
2321 spin_lock_init(&sonypi_compat.fifo_lock); 2374 spin_lock_init(&sonypi_compat.fifo_lock);
2322 sonypi_compat.fifo = kfifo_alloc(SONY_LAPTOP_BUF_SIZE, GFP_KERNEL, 2375 error =
2323 &sonypi_compat.fifo_lock); 2376 kfifo_alloc(&sonypi_compat.fifo, SONY_LAPTOP_BUF_SIZE, GFP_KERNEL);
2324 if (IS_ERR(sonypi_compat.fifo)) { 2377 if (error) {
2325 printk(KERN_ERR DRV_PFX "kfifo_alloc failed\n"); 2378 printk(KERN_ERR DRV_PFX "kfifo_alloc failed\n");
2326 return PTR_ERR(sonypi_compat.fifo); 2379 return error;
2327 } 2380 }
2328 2381
2329 init_waitqueue_head(&sonypi_compat.fifo_proc_list); 2382 init_waitqueue_head(&sonypi_compat.fifo_proc_list);
@@ -2342,14 +2395,14 @@ static int sonypi_compat_init(void)
2342 return 0; 2395 return 0;
2343 2396
2344err_free_kfifo: 2397err_free_kfifo:
2345 kfifo_free(sonypi_compat.fifo); 2398 kfifo_free(&sonypi_compat.fifo);
2346 return error; 2399 return error;
2347} 2400}
2348 2401
2349static void sonypi_compat_exit(void) 2402static void sonypi_compat_exit(void)
2350{ 2403{
2351 misc_deregister(&sonypi_misc_device); 2404 misc_deregister(&sonypi_misc_device);
2352 kfifo_free(sonypi_compat.fifo); 2405 kfifo_free(&sonypi_compat.fifo);
2353} 2406}
2354#else 2407#else
2355static int sonypi_compat_init(void) { return 0; } 2408static int sonypi_compat_init(void) { return 0; }
diff --git a/drivers/platform/x86/tc1100-wmi.c b/drivers/platform/x86/tc1100-wmi.c
index 44166003d4ef..dd33b51c3486 100644
--- a/drivers/platform/x86/tc1100-wmi.c
+++ b/drivers/platform/x86/tc1100-wmi.c
@@ -47,22 +47,6 @@ MODULE_DESCRIPTION("HP Compaq TC1100 Tablet WMI Extras");
47MODULE_LICENSE("GPL"); 47MODULE_LICENSE("GPL");
48MODULE_ALIAS("wmi:C364AC71-36DB-495A-8494-B439D472A505"); 48MODULE_ALIAS("wmi:C364AC71-36DB-495A-8494-B439D472A505");
49 49
50static int tc1100_probe(struct platform_device *device);
51static int tc1100_remove(struct platform_device *device);
52static int tc1100_suspend(struct platform_device *device, pm_message_t state);
53static int tc1100_resume(struct platform_device *device);
54
55static struct platform_driver tc1100_driver = {
56 .driver = {
57 .name = "tc1100-wmi",
58 .owner = THIS_MODULE,
59 },
60 .probe = tc1100_probe,
61 .remove = tc1100_remove,
62 .suspend = tc1100_suspend,
63 .resume = tc1100_resume,
64};
65
66static struct platform_device *tc1100_device; 50static struct platform_device *tc1100_device;
67 51
68struct tc1100_data { 52struct tc1100_data {
@@ -183,51 +167,35 @@ static DEVICE_ATTR(value, S_IWUGO | S_IRUGO | S_IWUSR, \
183show_set_bool(wireless, TC1100_INSTANCE_WIRELESS); 167show_set_bool(wireless, TC1100_INSTANCE_WIRELESS);
184show_set_bool(jogdial, TC1100_INSTANCE_JOGDIAL); 168show_set_bool(jogdial, TC1100_INSTANCE_JOGDIAL);
185 169
186static void remove_fs(void) 170static struct attribute *tc1100_attributes[] = {
187{ 171 &dev_attr_wireless.attr,
188 device_remove_file(&tc1100_device->dev, &dev_attr_wireless); 172 &dev_attr_jogdial.attr,
189 device_remove_file(&tc1100_device->dev, &dev_attr_jogdial); 173 NULL
190} 174};
191
192static int add_fs(void)
193{
194 int ret;
195
196 ret = device_create_file(&tc1100_device->dev, &dev_attr_wireless);
197 if (ret)
198 goto add_sysfs_error;
199
200 ret = device_create_file(&tc1100_device->dev, &dev_attr_jogdial);
201 if (ret)
202 goto add_sysfs_error;
203
204 return ret;
205 175
206add_sysfs_error: 176static struct attribute_group tc1100_attribute_group = {
207 remove_fs(); 177 .attrs = tc1100_attributes,
208 return ret; 178};
209}
210 179
211/* -------------------------------------------------------------------------- 180/* --------------------------------------------------------------------------
212 Driver Model 181 Driver Model
213 -------------------------------------------------------------------------- */ 182 -------------------------------------------------------------------------- */
214 183
215static int tc1100_probe(struct platform_device *device) 184static int __init tc1100_probe(struct platform_device *device)
216{ 185{
217 int result = 0; 186 return sysfs_create_group(&device->dev.kobj, &tc1100_attribute_group);
218
219 result = add_fs();
220 return result;
221} 187}
222 188
223 189
224static int tc1100_remove(struct platform_device *device) 190static int __devexit tc1100_remove(struct platform_device *device)
225{ 191{
226 remove_fs(); 192 sysfs_remove_group(&device->dev.kobj, &tc1100_attribute_group);
193
227 return 0; 194 return 0;
228} 195}
229 196
230static int tc1100_suspend(struct platform_device *dev, pm_message_t state) 197#ifdef CONFIG_PM
198static int tc1100_suspend(struct device *dev)
231{ 199{
232 int ret; 200 int ret;
233 201
@@ -239,10 +207,10 @@ static int tc1100_suspend(struct platform_device *dev, pm_message_t state)
239 if (ret) 207 if (ret)
240 return ret; 208 return ret;
241 209
242 return ret; 210 return 0;
243} 211}
244 212
245static int tc1100_resume(struct platform_device *dev) 213static int tc1100_resume(struct device *dev)
246{ 214{
247 int ret; 215 int ret;
248 216
@@ -254,34 +222,61 @@ static int tc1100_resume(struct platform_device *dev)
254 if (ret) 222 if (ret)
255 return ret; 223 return ret;
256 224
257 return ret; 225 return 0;
258} 226}
259 227
228static const struct dev_pm_ops tc1100_pm_ops = {
229 .suspend = tc1100_suspend,
230 .resume = tc1100_resume,
231 .freeze = tc1100_suspend,
232 .restore = tc1100_resume,
233};
234#endif
235
236static struct platform_driver tc1100_driver = {
237 .driver = {
238 .name = "tc1100-wmi",
239 .owner = THIS_MODULE,
240#ifdef CONFIG_PM
241 .pm = &tc1100_pm_ops,
242#endif
243 },
244 .remove = __devexit_p(tc1100_remove),
245};
246
260static int __init tc1100_init(void) 247static int __init tc1100_init(void)
261{ 248{
262 int result = 0; 249 int error;
263 250
264 if (!wmi_has_guid(GUID)) 251 if (!wmi_has_guid(GUID))
265 return -ENODEV; 252 return -ENODEV;
266 253
267 result = platform_driver_register(&tc1100_driver);
268 if (result)
269 return result;
270
271 tc1100_device = platform_device_alloc("tc1100-wmi", -1); 254 tc1100_device = platform_device_alloc("tc1100-wmi", -1);
272 platform_device_add(tc1100_device); 255 if (!tc1100_device)
256 return -ENOMEM;
257
258 error = platform_device_add(tc1100_device);
259 if (error)
260 goto err_device_put;
261
262 error = platform_driver_probe(&tc1100_driver, tc1100_probe);
263 if (error)
264 goto err_device_del;
273 265
274 printk(TC1100_INFO "HP Compaq TC1100 Tablet WMI Extras loaded\n"); 266 printk(TC1100_INFO "HP Compaq TC1100 Tablet WMI Extras loaded\n");
267 return 0;
275 268
276 return result; 269 err_device_del:
270 platform_device_del(tc1100_device);
271 err_device_put:
272 platform_device_put(tc1100_device);
273 return error;
277} 274}
278 275
279static void __exit tc1100_exit(void) 276static void __exit tc1100_exit(void)
280{ 277{
281 platform_device_del(tc1100_device); 278 platform_device_unregister(tc1100_device);
282 platform_driver_unregister(&tc1100_driver); 279 platform_driver_unregister(&tc1100_driver);
283
284 printk(TC1100_INFO "HP Compaq TC1100 Tablet WMI Extras unloaded\n");
285} 280}
286 281
287module_init(tc1100_init); 282module_init(tc1100_init);
diff --git a/drivers/platform/x86/thinkpad_acpi.c b/drivers/platform/x86/thinkpad_acpi.c
index cf61d6a8ef6f..eb603f1d55ca 100644
--- a/drivers/platform/x86/thinkpad_acpi.c
+++ b/drivers/platform/x86/thinkpad_acpi.c
@@ -21,8 +21,8 @@
21 * 02110-1301, USA. 21 * 02110-1301, USA.
22 */ 22 */
23 23
24#define TPACPI_VERSION "0.23" 24#define TPACPI_VERSION "0.24"
25#define TPACPI_SYSFS_VERSION 0x020500 25#define TPACPI_SYSFS_VERSION 0x020700
26 26
27/* 27/*
28 * Changelog: 28 * Changelog:
@@ -61,6 +61,7 @@
61 61
62#include <linux/nvram.h> 62#include <linux/nvram.h>
63#include <linux/proc_fs.h> 63#include <linux/proc_fs.h>
64#include <linux/seq_file.h>
64#include <linux/sysfs.h> 65#include <linux/sysfs.h>
65#include <linux/backlight.h> 66#include <linux/backlight.h>
66#include <linux/fb.h> 67#include <linux/fb.h>
@@ -76,6 +77,10 @@
76#include <linux/jiffies.h> 77#include <linux/jiffies.h>
77#include <linux/workqueue.h> 78#include <linux/workqueue.h>
78 79
80#include <sound/core.h>
81#include <sound/control.h>
82#include <sound/initval.h>
83
79#include <acpi/acpi_drivers.h> 84#include <acpi/acpi_drivers.h>
80 85
81#include <linux/pci_ids.h> 86#include <linux/pci_ids.h>
@@ -231,6 +236,7 @@ enum tpacpi_hkey_event_t {
231#define TPACPI_DBG_HKEY 0x0008 236#define TPACPI_DBG_HKEY 0x0008
232#define TPACPI_DBG_FAN 0x0010 237#define TPACPI_DBG_FAN 0x0010
233#define TPACPI_DBG_BRGHT 0x0020 238#define TPACPI_DBG_BRGHT 0x0020
239#define TPACPI_DBG_MIXER 0x0040
234 240
235#define onoff(status, bit) ((status) & (1 << (bit)) ? "on" : "off") 241#define onoff(status, bit) ((status) & (1 << (bit)) ? "on" : "off")
236#define enabled(status, bit) ((status) & (1 << (bit)) ? "enabled" : "disabled") 242#define enabled(status, bit) ((status) & (1 << (bit)) ? "enabled" : "disabled")
@@ -256,7 +262,7 @@ struct tp_acpi_drv_struct {
256struct ibm_struct { 262struct ibm_struct {
257 char *name; 263 char *name;
258 264
259 int (*read) (char *); 265 int (*read) (struct seq_file *);
260 int (*write) (char *); 266 int (*write) (char *);
261 void (*exit) (void); 267 void (*exit) (void);
262 void (*resume) (void); 268 void (*resume) (void);
@@ -298,6 +304,7 @@ static struct {
298 u32 fan_ctrl_status_undef:1; 304 u32 fan_ctrl_status_undef:1;
299 u32 second_fan:1; 305 u32 second_fan:1;
300 u32 beep_needs_two_args:1; 306 u32 beep_needs_two_args:1;
307 u32 mixer_no_level_control:1;
301 u32 input_device_registered:1; 308 u32 input_device_registered:1;
302 u32 platform_drv_registered:1; 309 u32 platform_drv_registered:1;
303 u32 platform_drv_attrs_registered:1; 310 u32 platform_drv_attrs_registered:1;
@@ -309,6 +316,7 @@ static struct {
309 316
310static struct { 317static struct {
311 u16 hotkey_mask_ff:1; 318 u16 hotkey_mask_ff:1;
319 u16 volume_ctrl_forbidden:1;
312} tp_warned; 320} tp_warned;
313 321
314struct thinkpad_id_data { 322struct thinkpad_id_data {
@@ -425,6 +433,12 @@ static void tpacpi_log_usertask(const char * const what)
425 .ec = TPACPI_MATCH_ANY, \ 433 .ec = TPACPI_MATCH_ANY, \
426 .quirks = (__quirk) } 434 .quirks = (__quirk) }
427 435
436#define TPACPI_QEC_LNV(__id1, __id2, __quirk) \
437 { .vendor = PCI_VENDOR_ID_LENOVO, \
438 .bios = TPACPI_MATCH_ANY, \
439 .ec = TPID(__id1, __id2), \
440 .quirks = (__quirk) }
441
428struct tpacpi_quirk { 442struct tpacpi_quirk {
429 unsigned int vendor; 443 unsigned int vendor;
430 u16 bios; 444 u16 bios;
@@ -776,36 +790,25 @@ static int __init register_tpacpi_subdriver(struct ibm_struct *ibm)
776 **************************************************************************** 790 ****************************************************************************
777 ****************************************************************************/ 791 ****************************************************************************/
778 792
779static int dispatch_procfs_read(char *page, char **start, off_t off, 793static int dispatch_proc_show(struct seq_file *m, void *v)
780 int count, int *eof, void *data)
781{ 794{
782 struct ibm_struct *ibm = data; 795 struct ibm_struct *ibm = m->private;
783 int len;
784 796
785 if (!ibm || !ibm->read) 797 if (!ibm || !ibm->read)
786 return -EINVAL; 798 return -EINVAL;
799 return ibm->read(m);
800}
787 801
788 len = ibm->read(page); 802static int dispatch_proc_open(struct inode *inode, struct file *file)
789 if (len < 0) 803{
790 return len; 804 return single_open(file, dispatch_proc_show, PDE(inode)->data);
791
792 if (len <= off + count)
793 *eof = 1;
794 *start = page + off;
795 len -= off;
796 if (len > count)
797 len = count;
798 if (len < 0)
799 len = 0;
800
801 return len;
802} 805}
803 806
804static int dispatch_procfs_write(struct file *file, 807static ssize_t dispatch_proc_write(struct file *file,
805 const char __user *userbuf, 808 const char __user *userbuf,
806 unsigned long count, void *data) 809 size_t count, loff_t *pos)
807{ 810{
808 struct ibm_struct *ibm = data; 811 struct ibm_struct *ibm = PDE(file->f_path.dentry->d_inode)->data;
809 char *kernbuf; 812 char *kernbuf;
810 int ret; 813 int ret;
811 814
@@ -834,6 +837,15 @@ static int dispatch_procfs_write(struct file *file,
834 return ret; 837 return ret;
835} 838}
836 839
840static const struct file_operations dispatch_proc_fops = {
841 .owner = THIS_MODULE,
842 .open = dispatch_proc_open,
843 .read = seq_read,
844 .llseek = seq_lseek,
845 .release = single_release,
846 .write = dispatch_proc_write,
847};
848
837static char *next_cmd(char **cmds) 849static char *next_cmd(char **cmds)
838{ 850{
839 char *start = *cmds; 851 char *start = *cmds;
@@ -1261,6 +1273,7 @@ static int __init tpacpi_new_rfkill(const enum tpacpi_rfk_id id,
1261 struct tpacpi_rfk *atp_rfk; 1273 struct tpacpi_rfk *atp_rfk;
1262 int res; 1274 int res;
1263 bool sw_state = false; 1275 bool sw_state = false;
1276 bool hw_state;
1264 int sw_status; 1277 int sw_status;
1265 1278
1266 BUG_ON(id >= TPACPI_RFK_SW_MAX || tpacpi_rfkill_switches[id]); 1279 BUG_ON(id >= TPACPI_RFK_SW_MAX || tpacpi_rfkill_switches[id]);
@@ -1295,7 +1308,8 @@ static int __init tpacpi_new_rfkill(const enum tpacpi_rfk_id id,
1295 rfkill_init_sw_state(atp_rfk->rfkill, sw_state); 1308 rfkill_init_sw_state(atp_rfk->rfkill, sw_state);
1296 } 1309 }
1297 } 1310 }
1298 rfkill_set_hw_state(atp_rfk->rfkill, tpacpi_rfk_check_hwblock_state()); 1311 hw_state = tpacpi_rfk_check_hwblock_state();
1312 rfkill_set_hw_state(atp_rfk->rfkill, hw_state);
1299 1313
1300 res = rfkill_register(atp_rfk->rfkill); 1314 res = rfkill_register(atp_rfk->rfkill);
1301 if (res < 0) { 1315 if (res < 0) {
@@ -1308,6 +1322,9 @@ static int __init tpacpi_new_rfkill(const enum tpacpi_rfk_id id,
1308 } 1322 }
1309 1323
1310 tpacpi_rfkill_switches[id] = atp_rfk; 1324 tpacpi_rfkill_switches[id] = atp_rfk;
1325
1326 printk(TPACPI_INFO "rfkill switch %s: radio is %sblocked\n",
1327 name, (sw_state || hw_state) ? "" : "un");
1311 return 0; 1328 return 0;
1312} 1329}
1313 1330
@@ -1380,12 +1397,10 @@ static ssize_t tpacpi_rfk_sysfs_enable_store(const enum tpacpi_rfk_id id,
1380} 1397}
1381 1398
1382/* procfs -------------------------------------------------------------- */ 1399/* procfs -------------------------------------------------------------- */
1383static int tpacpi_rfk_procfs_read(const enum tpacpi_rfk_id id, char *p) 1400static int tpacpi_rfk_procfs_read(const enum tpacpi_rfk_id id, struct seq_file *m)
1384{ 1401{
1385 int len = 0;
1386
1387 if (id >= TPACPI_RFK_SW_MAX) 1402 if (id >= TPACPI_RFK_SW_MAX)
1388 len += sprintf(p + len, "status:\t\tnot supported\n"); 1403 seq_printf(m, "status:\t\tnot supported\n");
1389 else { 1404 else {
1390 int status; 1405 int status;
1391 1406
@@ -1399,13 +1414,13 @@ static int tpacpi_rfk_procfs_read(const enum tpacpi_rfk_id id, char *p)
1399 return status; 1414 return status;
1400 } 1415 }
1401 1416
1402 len += sprintf(p + len, "status:\t\t%s\n", 1417 seq_printf(m, "status:\t\t%s\n",
1403 (status == TPACPI_RFK_RADIO_ON) ? 1418 (status == TPACPI_RFK_RADIO_ON) ?
1404 "enabled" : "disabled"); 1419 "enabled" : "disabled");
1405 len += sprintf(p + len, "commands:\tenable, disable\n"); 1420 seq_printf(m, "commands:\tenable, disable\n");
1406 } 1421 }
1407 1422
1408 return len; 1423 return 0;
1409} 1424}
1410 1425
1411static int tpacpi_rfk_procfs_write(const enum tpacpi_rfk_id id, char *buf) 1426static int tpacpi_rfk_procfs_write(const enum tpacpi_rfk_id id, char *buf)
@@ -1776,7 +1791,7 @@ static const struct tpacpi_quirk tpacpi_bios_version_qtable[] __initconst = {
1776 1791
1777 TPV_QL1('7', '9', 'E', '3', '5', '0'), /* T60/p */ 1792 TPV_QL1('7', '9', 'E', '3', '5', '0'), /* T60/p */
1778 TPV_QL1('7', 'C', 'D', '2', '2', '2'), /* R60, R60i */ 1793 TPV_QL1('7', 'C', 'D', '2', '2', '2'), /* R60, R60i */
1779 TPV_QL0('7', 'E', 'D', '0'), /* R60e, R60i */ 1794 TPV_QL1('7', 'E', 'D', '0', '1', '5'), /* R60e, R60i */
1780 1795
1781 /* BIOS FW BIOS VERS EC FW EC VERS */ 1796 /* BIOS FW BIOS VERS EC FW EC VERS */
1782 TPV_QI2('1', 'W', '9', '0', '1', 'V', '2', '8'), /* R50e (1) */ 1797 TPV_QI2('1', 'W', '9', '0', '1', 'V', '2', '8'), /* R50e (1) */
@@ -1792,8 +1807,8 @@ static const struct tpacpi_quirk tpacpi_bios_version_qtable[] __initconst = {
1792 TPV_QI1('7', '4', '6', '4', '2', '7'), /* X41 (0) */ 1807 TPV_QI1('7', '4', '6', '4', '2', '7'), /* X41 (0) */
1793 TPV_QI1('7', '5', '6', '0', '2', '0'), /* X41t (0) */ 1808 TPV_QI1('7', '5', '6', '0', '2', '0'), /* X41t (0) */
1794 1809
1795 TPV_QL0('7', 'B', 'D', '7'), /* X60/s */ 1810 TPV_QL1('7', 'B', 'D', '7', '4', '0'), /* X60/s */
1796 TPV_QL0('7', 'J', '3', '0'), /* X60t */ 1811 TPV_QL1('7', 'J', '3', '0', '1', '3'), /* X60t */
1797 1812
1798 /* (0) - older versions lack DMI EC fw string and functionality */ 1813 /* (0) - older versions lack DMI EC fw string and functionality */
1799 /* (1) - older versions known to lack functionality */ 1814 /* (1) - older versions known to lack functionality */
@@ -1883,14 +1898,11 @@ static int __init thinkpad_acpi_driver_init(struct ibm_init_struct *iibm)
1883 return 0; 1898 return 0;
1884} 1899}
1885 1900
1886static int thinkpad_acpi_driver_read(char *p) 1901static int thinkpad_acpi_driver_read(struct seq_file *m)
1887{ 1902{
1888 int len = 0; 1903 seq_printf(m, "driver:\t\t%s\n", TPACPI_DESC);
1889 1904 seq_printf(m, "version:\t%s\n", TPACPI_VERSION);
1890 len += sprintf(p + len, "driver:\t\t%s\n", TPACPI_DESC); 1905 return 0;
1891 len += sprintf(p + len, "version:\t%s\n", TPACPI_VERSION);
1892
1893 return len;
1894} 1906}
1895 1907
1896static struct ibm_struct thinkpad_acpi_driver_data = { 1908static struct ibm_struct thinkpad_acpi_driver_data = {
@@ -2186,7 +2198,8 @@ static int hotkey_mask_set(u32 mask)
2186 fwmask, hotkey_acpi_mask); 2198 fwmask, hotkey_acpi_mask);
2187 } 2199 }
2188 2200
2189 hotkey_mask_warn_incomplete_mask(); 2201 if (tpacpi_lifecycle != TPACPI_LIFE_EXITING)
2202 hotkey_mask_warn_incomplete_mask();
2190 2203
2191 return rc; 2204 return rc;
2192} 2205}
@@ -3182,6 +3195,8 @@ static int __init hotkey_init(struct ibm_init_struct *iibm)
3182 int res, i; 3195 int res, i;
3183 int status; 3196 int status;
3184 int hkeyv; 3197 int hkeyv;
3198 bool radiosw_state = false;
3199 bool tabletsw_state = false;
3185 3200
3186 unsigned long quirks; 3201 unsigned long quirks;
3187 3202
@@ -3287,6 +3302,7 @@ static int __init hotkey_init(struct ibm_init_struct *iibm)
3287#ifdef CONFIG_THINKPAD_ACPI_DEBUGFACILITIES 3302#ifdef CONFIG_THINKPAD_ACPI_DEBUGFACILITIES
3288 if (dbg_wlswemul) { 3303 if (dbg_wlswemul) {
3289 tp_features.hotkey_wlsw = 1; 3304 tp_features.hotkey_wlsw = 1;
3305 radiosw_state = !!tpacpi_wlsw_emulstate;
3290 printk(TPACPI_INFO 3306 printk(TPACPI_INFO
3291 "radio switch emulation enabled\n"); 3307 "radio switch emulation enabled\n");
3292 } else 3308 } else
@@ -3294,6 +3310,7 @@ static int __init hotkey_init(struct ibm_init_struct *iibm)
3294 /* Not all thinkpads have a hardware radio switch */ 3310 /* Not all thinkpads have a hardware radio switch */
3295 if (acpi_evalf(hkey_handle, &status, "WLSW", "qd")) { 3311 if (acpi_evalf(hkey_handle, &status, "WLSW", "qd")) {
3296 tp_features.hotkey_wlsw = 1; 3312 tp_features.hotkey_wlsw = 1;
3313 radiosw_state = !!status;
3297 printk(TPACPI_INFO 3314 printk(TPACPI_INFO
3298 "radio switch found; radios are %s\n", 3315 "radio switch found; radios are %s\n",
3299 enabled(status, 0)); 3316 enabled(status, 0));
@@ -3305,11 +3322,11 @@ static int __init hotkey_init(struct ibm_init_struct *iibm)
3305 /* For X41t, X60t, X61t Tablets... */ 3322 /* For X41t, X60t, X61t Tablets... */
3306 if (!res && acpi_evalf(hkey_handle, &status, "MHKG", "qd")) { 3323 if (!res && acpi_evalf(hkey_handle, &status, "MHKG", "qd")) {
3307 tp_features.hotkey_tablet = 1; 3324 tp_features.hotkey_tablet = 1;
3325 tabletsw_state = !!(status & TP_HOTKEY_TABLET_MASK);
3308 printk(TPACPI_INFO 3326 printk(TPACPI_INFO
3309 "possible tablet mode switch found; " 3327 "possible tablet mode switch found; "
3310 "ThinkPad in %s mode\n", 3328 "ThinkPad in %s mode\n",
3311 (status & TP_HOTKEY_TABLET_MASK)? 3329 (tabletsw_state) ? "tablet" : "laptop");
3312 "tablet" : "laptop");
3313 res = add_to_attr_set(hotkey_dev_attributes, 3330 res = add_to_attr_set(hotkey_dev_attributes,
3314 &dev_attr_hotkey_tablet_mode.attr); 3331 &dev_attr_hotkey_tablet_mode.attr);
3315 } 3332 }
@@ -3344,16 +3361,14 @@ static int __init hotkey_init(struct ibm_init_struct *iibm)
3344 TPACPI_HOTKEY_MAP_SIZE); 3361 TPACPI_HOTKEY_MAP_SIZE);
3345 } 3362 }
3346 3363
3347 set_bit(EV_KEY, tpacpi_inputdev->evbit); 3364 input_set_capability(tpacpi_inputdev, EV_MSC, MSC_SCAN);
3348 set_bit(EV_MSC, tpacpi_inputdev->evbit);
3349 set_bit(MSC_SCAN, tpacpi_inputdev->mscbit);
3350 tpacpi_inputdev->keycodesize = TPACPI_HOTKEY_MAP_TYPESIZE; 3365 tpacpi_inputdev->keycodesize = TPACPI_HOTKEY_MAP_TYPESIZE;
3351 tpacpi_inputdev->keycodemax = TPACPI_HOTKEY_MAP_LEN; 3366 tpacpi_inputdev->keycodemax = TPACPI_HOTKEY_MAP_LEN;
3352 tpacpi_inputdev->keycode = hotkey_keycode_map; 3367 tpacpi_inputdev->keycode = hotkey_keycode_map;
3353 for (i = 0; i < TPACPI_HOTKEY_MAP_LEN; i++) { 3368 for (i = 0; i < TPACPI_HOTKEY_MAP_LEN; i++) {
3354 if (hotkey_keycode_map[i] != KEY_RESERVED) { 3369 if (hotkey_keycode_map[i] != KEY_RESERVED) {
3355 set_bit(hotkey_keycode_map[i], 3370 input_set_capability(tpacpi_inputdev, EV_KEY,
3356 tpacpi_inputdev->keybit); 3371 hotkey_keycode_map[i]);
3357 } else { 3372 } else {
3358 if (i < sizeof(hotkey_reserved_mask)*8) 3373 if (i < sizeof(hotkey_reserved_mask)*8)
3359 hotkey_reserved_mask |= 1 << i; 3374 hotkey_reserved_mask |= 1 << i;
@@ -3361,12 +3376,14 @@ static int __init hotkey_init(struct ibm_init_struct *iibm)
3361 } 3376 }
3362 3377
3363 if (tp_features.hotkey_wlsw) { 3378 if (tp_features.hotkey_wlsw) {
3364 set_bit(EV_SW, tpacpi_inputdev->evbit); 3379 input_set_capability(tpacpi_inputdev, EV_SW, SW_RFKILL_ALL);
3365 set_bit(SW_RFKILL_ALL, tpacpi_inputdev->swbit); 3380 input_report_switch(tpacpi_inputdev,
3381 SW_RFKILL_ALL, radiosw_state);
3366 } 3382 }
3367 if (tp_features.hotkey_tablet) { 3383 if (tp_features.hotkey_tablet) {
3368 set_bit(EV_SW, tpacpi_inputdev->evbit); 3384 input_set_capability(tpacpi_inputdev, EV_SW, SW_TABLET_MODE);
3369 set_bit(SW_TABLET_MODE, tpacpi_inputdev->swbit); 3385 input_report_switch(tpacpi_inputdev,
3386 SW_TABLET_MODE, tabletsw_state);
3370 } 3387 }
3371 3388
3372 /* Do not issue duplicate brightness change events to 3389 /* Do not issue duplicate brightness change events to
@@ -3433,8 +3450,6 @@ static int __init hotkey_init(struct ibm_init_struct *iibm)
3433 tpacpi_inputdev->close = &hotkey_inputdev_close; 3450 tpacpi_inputdev->close = &hotkey_inputdev_close;
3434 3451
3435 hotkey_poll_setup_safe(true); 3452 hotkey_poll_setup_safe(true);
3436 tpacpi_send_radiosw_update();
3437 tpacpi_input_send_tabletsw();
3438 3453
3439 return 0; 3454 return 0;
3440 3455
@@ -3542,49 +3557,57 @@ static bool hotkey_notify_usrevent(const u32 hkey,
3542 } 3557 }
3543} 3558}
3544 3559
3560static void thermal_dump_all_sensors(void);
3561
3545static bool hotkey_notify_thermal(const u32 hkey, 3562static bool hotkey_notify_thermal(const u32 hkey,
3546 bool *send_acpi_ev, 3563 bool *send_acpi_ev,
3547 bool *ignore_acpi_ev) 3564 bool *ignore_acpi_ev)
3548{ 3565{
3566 bool known = true;
3567
3549 /* 0x6000-0x6FFF: thermal alarms */ 3568 /* 0x6000-0x6FFF: thermal alarms */
3550 *send_acpi_ev = true; 3569 *send_acpi_ev = true;
3551 *ignore_acpi_ev = false; 3570 *ignore_acpi_ev = false;
3552 3571
3553 switch (hkey) { 3572 switch (hkey) {
3573 case TP_HKEY_EV_THM_TABLE_CHANGED:
3574 printk(TPACPI_INFO
3575 "EC reports that Thermal Table has changed\n");
3576 /* recommended action: do nothing, we don't have
3577 * Lenovo ATM information */
3578 return true;
3554 case TP_HKEY_EV_ALARM_BAT_HOT: 3579 case TP_HKEY_EV_ALARM_BAT_HOT:
3555 printk(TPACPI_CRIT 3580 printk(TPACPI_CRIT
3556 "THERMAL ALARM: battery is too hot!\n"); 3581 "THERMAL ALARM: battery is too hot!\n");
3557 /* recommended action: warn user through gui */ 3582 /* recommended action: warn user through gui */
3558 return true; 3583 break;
3559 case TP_HKEY_EV_ALARM_BAT_XHOT: 3584 case TP_HKEY_EV_ALARM_BAT_XHOT:
3560 printk(TPACPI_ALERT 3585 printk(TPACPI_ALERT
3561 "THERMAL EMERGENCY: battery is extremely hot!\n"); 3586 "THERMAL EMERGENCY: battery is extremely hot!\n");
3562 /* recommended action: immediate sleep/hibernate */ 3587 /* recommended action: immediate sleep/hibernate */
3563 return true; 3588 break;
3564 case TP_HKEY_EV_ALARM_SENSOR_HOT: 3589 case TP_HKEY_EV_ALARM_SENSOR_HOT:
3565 printk(TPACPI_CRIT 3590 printk(TPACPI_CRIT
3566 "THERMAL ALARM: " 3591 "THERMAL ALARM: "
3567 "a sensor reports something is too hot!\n"); 3592 "a sensor reports something is too hot!\n");
3568 /* recommended action: warn user through gui, that */ 3593 /* recommended action: warn user through gui, that */
3569 /* some internal component is too hot */ 3594 /* some internal component is too hot */
3570 return true; 3595 break;
3571 case TP_HKEY_EV_ALARM_SENSOR_XHOT: 3596 case TP_HKEY_EV_ALARM_SENSOR_XHOT:
3572 printk(TPACPI_ALERT 3597 printk(TPACPI_ALERT
3573 "THERMAL EMERGENCY: " 3598 "THERMAL EMERGENCY: "
3574 "a sensor reports something is extremely hot!\n"); 3599 "a sensor reports something is extremely hot!\n");
3575 /* recommended action: immediate sleep/hibernate */ 3600 /* recommended action: immediate sleep/hibernate */
3576 return true; 3601 break;
3577 case TP_HKEY_EV_THM_TABLE_CHANGED:
3578 printk(TPACPI_INFO
3579 "EC reports that Thermal Table has changed\n");
3580 /* recommended action: do nothing, we don't have
3581 * Lenovo ATM information */
3582 return true;
3583 default: 3602 default:
3584 printk(TPACPI_ALERT 3603 printk(TPACPI_ALERT
3585 "THERMAL ALERT: unknown thermal alarm received\n"); 3604 "THERMAL ALERT: unknown thermal alarm received\n");
3586 return false; 3605 known = false;
3587 } 3606 }
3607
3608 thermal_dump_all_sensors();
3609
3610 return known;
3588} 3611}
3589 3612
3590static void hotkey_notify(struct ibm_struct *ibm, u32 event) 3613static void hotkey_notify(struct ibm_struct *ibm, u32 event)
@@ -3727,14 +3750,13 @@ static void hotkey_resume(void)
3727} 3750}
3728 3751
3729/* procfs -------------------------------------------------------------- */ 3752/* procfs -------------------------------------------------------------- */
3730static int hotkey_read(char *p) 3753static int hotkey_read(struct seq_file *m)
3731{ 3754{
3732 int res, status; 3755 int res, status;
3733 int len = 0;
3734 3756
3735 if (!tp_features.hotkey) { 3757 if (!tp_features.hotkey) {
3736 len += sprintf(p + len, "status:\t\tnot supported\n"); 3758 seq_printf(m, "status:\t\tnot supported\n");
3737 return len; 3759 return 0;
3738 } 3760 }
3739 3761
3740 if (mutex_lock_killable(&hotkey_mutex)) 3762 if (mutex_lock_killable(&hotkey_mutex))
@@ -3746,17 +3768,16 @@ static int hotkey_read(char *p)
3746 if (res) 3768 if (res)
3747 return res; 3769 return res;
3748 3770
3749 len += sprintf(p + len, "status:\t\t%s\n", enabled(status, 0)); 3771 seq_printf(m, "status:\t\t%s\n", enabled(status, 0));
3750 if (hotkey_all_mask) { 3772 if (hotkey_all_mask) {
3751 len += sprintf(p + len, "mask:\t\t0x%08x\n", hotkey_user_mask); 3773 seq_printf(m, "mask:\t\t0x%08x\n", hotkey_user_mask);
3752 len += sprintf(p + len, 3774 seq_printf(m, "commands:\tenable, disable, reset, <mask>\n");
3753 "commands:\tenable, disable, reset, <mask>\n");
3754 } else { 3775 } else {
3755 len += sprintf(p + len, "mask:\t\tnot supported\n"); 3776 seq_printf(m, "mask:\t\tnot supported\n");
3756 len += sprintf(p + len, "commands:\tenable, disable, reset\n"); 3777 seq_printf(m, "commands:\tenable, disable, reset\n");
3757 } 3778 }
3758 3779
3759 return len; 3780 return 0;
3760} 3781}
3761 3782
3762static void hotkey_enabledisable_warn(bool enable) 3783static void hotkey_enabledisable_warn(bool enable)
@@ -3863,15 +3884,6 @@ enum {
3863 3884
3864#define TPACPI_RFK_BLUETOOTH_SW_NAME "tpacpi_bluetooth_sw" 3885#define TPACPI_RFK_BLUETOOTH_SW_NAME "tpacpi_bluetooth_sw"
3865 3886
3866static void bluetooth_suspend(pm_message_t state)
3867{
3868 /* Try to make sure radio will resume powered off */
3869 if (!acpi_evalf(NULL, NULL, "\\BLTH", "vd",
3870 TP_ACPI_BLTH_PWR_OFF_ON_RESUME))
3871 vdbg_printk(TPACPI_DBG_RFKILL,
3872 "bluetooth power down on resume request failed\n");
3873}
3874
3875static int bluetooth_get_status(void) 3887static int bluetooth_get_status(void)
3876{ 3888{
3877 int status; 3889 int status;
@@ -3905,10 +3917,9 @@ static int bluetooth_set_status(enum tpacpi_rfkill_state state)
3905#endif 3917#endif
3906 3918
3907 /* We make sure to keep TP_ACPI_BLUETOOTH_RESUMECTRL off */ 3919 /* We make sure to keep TP_ACPI_BLUETOOTH_RESUMECTRL off */
3920 status = TP_ACPI_BLUETOOTH_RESUMECTRL;
3908 if (state == TPACPI_RFK_RADIO_ON) 3921 if (state == TPACPI_RFK_RADIO_ON)
3909 status = TP_ACPI_BLUETOOTH_RADIOSSW; 3922 status |= TP_ACPI_BLUETOOTH_RADIOSSW;
3910 else
3911 status = 0;
3912 3923
3913 if (!acpi_evalf(hkey_handle, NULL, "SBDC", "vd", status)) 3924 if (!acpi_evalf(hkey_handle, NULL, "SBDC", "vd", status))
3914 return -EIO; 3925 return -EIO;
@@ -4032,9 +4043,9 @@ static int __init bluetooth_init(struct ibm_init_struct *iibm)
4032} 4043}
4033 4044
4034/* procfs -------------------------------------------------------------- */ 4045/* procfs -------------------------------------------------------------- */
4035static int bluetooth_read(char *p) 4046static int bluetooth_read(struct seq_file *m)
4036{ 4047{
4037 return tpacpi_rfk_procfs_read(TPACPI_RFK_BLUETOOTH_SW_ID, p); 4048 return tpacpi_rfk_procfs_read(TPACPI_RFK_BLUETOOTH_SW_ID, m);
4038} 4049}
4039 4050
4040static int bluetooth_write(char *buf) 4051static int bluetooth_write(char *buf)
@@ -4047,7 +4058,6 @@ static struct ibm_struct bluetooth_driver_data = {
4047 .read = bluetooth_read, 4058 .read = bluetooth_read,
4048 .write = bluetooth_write, 4059 .write = bluetooth_write,
4049 .exit = bluetooth_exit, 4060 .exit = bluetooth_exit,
4050 .suspend = bluetooth_suspend,
4051 .shutdown = bluetooth_shutdown, 4061 .shutdown = bluetooth_shutdown,
4052}; 4062};
4053 4063
@@ -4065,15 +4075,6 @@ enum {
4065 4075
4066#define TPACPI_RFK_WWAN_SW_NAME "tpacpi_wwan_sw" 4076#define TPACPI_RFK_WWAN_SW_NAME "tpacpi_wwan_sw"
4067 4077
4068static void wan_suspend(pm_message_t state)
4069{
4070 /* Try to make sure radio will resume powered off */
4071 if (!acpi_evalf(NULL, NULL, "\\WGSV", "qvd",
4072 TP_ACPI_WGSV_PWR_OFF_ON_RESUME))
4073 vdbg_printk(TPACPI_DBG_RFKILL,
4074 "WWAN power down on resume request failed\n");
4075}
4076
4077static int wan_get_status(void) 4078static int wan_get_status(void)
4078{ 4079{
4079 int status; 4080 int status;
@@ -4106,11 +4107,10 @@ static int wan_set_status(enum tpacpi_rfkill_state state)
4106 } 4107 }
4107#endif 4108#endif
4108 4109
4109 /* We make sure to keep TP_ACPI_WANCARD_RESUMECTRL off */ 4110 /* We make sure to set TP_ACPI_WANCARD_RESUMECTRL */
4111 status = TP_ACPI_WANCARD_RESUMECTRL;
4110 if (state == TPACPI_RFK_RADIO_ON) 4112 if (state == TPACPI_RFK_RADIO_ON)
4111 status = TP_ACPI_WANCARD_RADIOSSW; 4113 status |= TP_ACPI_WANCARD_RADIOSSW;
4112 else
4113 status = 0;
4114 4114
4115 if (!acpi_evalf(hkey_handle, NULL, "SWAN", "vd", status)) 4115 if (!acpi_evalf(hkey_handle, NULL, "SWAN", "vd", status))
4116 return -EIO; 4116 return -EIO;
@@ -4233,9 +4233,9 @@ static int __init wan_init(struct ibm_init_struct *iibm)
4233} 4233}
4234 4234
4235/* procfs -------------------------------------------------------------- */ 4235/* procfs -------------------------------------------------------------- */
4236static int wan_read(char *p) 4236static int wan_read(struct seq_file *m)
4237{ 4237{
4238 return tpacpi_rfk_procfs_read(TPACPI_RFK_WWAN_SW_ID, p); 4238 return tpacpi_rfk_procfs_read(TPACPI_RFK_WWAN_SW_ID, m);
4239} 4239}
4240 4240
4241static int wan_write(char *buf) 4241static int wan_write(char *buf)
@@ -4248,7 +4248,6 @@ static struct ibm_struct wan_driver_data = {
4248 .read = wan_read, 4248 .read = wan_read,
4249 .write = wan_write, 4249 .write = wan_write,
4250 .exit = wan_exit, 4250 .exit = wan_exit,
4251 .suspend = wan_suspend,
4252 .shutdown = wan_shutdown, 4251 .shutdown = wan_shutdown,
4253}; 4252};
4254 4253
@@ -4611,14 +4610,13 @@ static int video_expand_toggle(void)
4611 /* not reached */ 4610 /* not reached */
4612} 4611}
4613 4612
4614static int video_read(char *p) 4613static int video_read(struct seq_file *m)
4615{ 4614{
4616 int status, autosw; 4615 int status, autosw;
4617 int len = 0;
4618 4616
4619 if (video_supported == TPACPI_VIDEO_NONE) { 4617 if (video_supported == TPACPI_VIDEO_NONE) {
4620 len += sprintf(p + len, "status:\t\tnot supported\n"); 4618 seq_printf(m, "status:\t\tnot supported\n");
4621 return len; 4619 return 0;
4622 } 4620 }
4623 4621
4624 status = video_outputsw_get(); 4622 status = video_outputsw_get();
@@ -4629,20 +4627,20 @@ static int video_read(char *p)
4629 if (autosw < 0) 4627 if (autosw < 0)
4630 return autosw; 4628 return autosw;
4631 4629
4632 len += sprintf(p + len, "status:\t\tsupported\n"); 4630 seq_printf(m, "status:\t\tsupported\n");
4633 len += sprintf(p + len, "lcd:\t\t%s\n", enabled(status, 0)); 4631 seq_printf(m, "lcd:\t\t%s\n", enabled(status, 0));
4634 len += sprintf(p + len, "crt:\t\t%s\n", enabled(status, 1)); 4632 seq_printf(m, "crt:\t\t%s\n", enabled(status, 1));
4635 if (video_supported == TPACPI_VIDEO_NEW) 4633 if (video_supported == TPACPI_VIDEO_NEW)
4636 len += sprintf(p + len, "dvi:\t\t%s\n", enabled(status, 3)); 4634 seq_printf(m, "dvi:\t\t%s\n", enabled(status, 3));
4637 len += sprintf(p + len, "auto:\t\t%s\n", enabled(autosw, 0)); 4635 seq_printf(m, "auto:\t\t%s\n", enabled(autosw, 0));
4638 len += sprintf(p + len, "commands:\tlcd_enable, lcd_disable\n"); 4636 seq_printf(m, "commands:\tlcd_enable, lcd_disable\n");
4639 len += sprintf(p + len, "commands:\tcrt_enable, crt_disable\n"); 4637 seq_printf(m, "commands:\tcrt_enable, crt_disable\n");
4640 if (video_supported == TPACPI_VIDEO_NEW) 4638 if (video_supported == TPACPI_VIDEO_NEW)
4641 len += sprintf(p + len, "commands:\tdvi_enable, dvi_disable\n"); 4639 seq_printf(m, "commands:\tdvi_enable, dvi_disable\n");
4642 len += sprintf(p + len, "commands:\tauto_enable, auto_disable\n"); 4640 seq_printf(m, "commands:\tauto_enable, auto_disable\n");
4643 len += sprintf(p + len, "commands:\tvideo_switch, expand_toggle\n"); 4641 seq_printf(m, "commands:\tvideo_switch, expand_toggle\n");
4644 4642
4645 return len; 4643 return 0;
4646} 4644}
4647 4645
4648static int video_write(char *buf) 4646static int video_write(char *buf)
@@ -4834,25 +4832,24 @@ static void light_exit(void)
4834 flush_workqueue(tpacpi_wq); 4832 flush_workqueue(tpacpi_wq);
4835} 4833}
4836 4834
4837static int light_read(char *p) 4835static int light_read(struct seq_file *m)
4838{ 4836{
4839 int len = 0;
4840 int status; 4837 int status;
4841 4838
4842 if (!tp_features.light) { 4839 if (!tp_features.light) {
4843 len += sprintf(p + len, "status:\t\tnot supported\n"); 4840 seq_printf(m, "status:\t\tnot supported\n");
4844 } else if (!tp_features.light_status) { 4841 } else if (!tp_features.light_status) {
4845 len += sprintf(p + len, "status:\t\tunknown\n"); 4842 seq_printf(m, "status:\t\tunknown\n");
4846 len += sprintf(p + len, "commands:\ton, off\n"); 4843 seq_printf(m, "commands:\ton, off\n");
4847 } else { 4844 } else {
4848 status = light_get_status(); 4845 status = light_get_status();
4849 if (status < 0) 4846 if (status < 0)
4850 return status; 4847 return status;
4851 len += sprintf(p + len, "status:\t\t%s\n", onoff(status, 0)); 4848 seq_printf(m, "status:\t\t%s\n", onoff(status, 0));
4852 len += sprintf(p + len, "commands:\ton, off\n"); 4849 seq_printf(m, "commands:\ton, off\n");
4853 } 4850 }
4854 4851
4855 return len; 4852 return 0;
4856} 4853}
4857 4854
4858static int light_write(char *buf) 4855static int light_write(char *buf)
@@ -4930,20 +4927,18 @@ static void cmos_exit(void)
4930 device_remove_file(&tpacpi_pdev->dev, &dev_attr_cmos_command); 4927 device_remove_file(&tpacpi_pdev->dev, &dev_attr_cmos_command);
4931} 4928}
4932 4929
4933static int cmos_read(char *p) 4930static int cmos_read(struct seq_file *m)
4934{ 4931{
4935 int len = 0;
4936
4937 /* cmos not supported on 570, 600e/x, 770e, 770x, A21e, A2xm/p, 4932 /* cmos not supported on 570, 600e/x, 770e, 770x, A21e, A2xm/p,
4938 R30, R31, T20-22, X20-21 */ 4933 R30, R31, T20-22, X20-21 */
4939 if (!cmos_handle) 4934 if (!cmos_handle)
4940 len += sprintf(p + len, "status:\t\tnot supported\n"); 4935 seq_printf(m, "status:\t\tnot supported\n");
4941 else { 4936 else {
4942 len += sprintf(p + len, "status:\t\tsupported\n"); 4937 seq_printf(m, "status:\t\tsupported\n");
4943 len += sprintf(p + len, "commands:\t<cmd> (<cmd> is 0-21)\n"); 4938 seq_printf(m, "commands:\t<cmd> (<cmd> is 0-21)\n");
4944 } 4939 }
4945 4940
4946 return len; 4941 return 0;
4947} 4942}
4948 4943
4949static int cmos_write(char *buf) 4944static int cmos_write(char *buf)
@@ -5318,15 +5313,13 @@ static int __init led_init(struct ibm_init_struct *iibm)
5318 ((s) == TPACPI_LED_OFF ? "off" : \ 5313 ((s) == TPACPI_LED_OFF ? "off" : \
5319 ((s) == TPACPI_LED_ON ? "on" : "blinking")) 5314 ((s) == TPACPI_LED_ON ? "on" : "blinking"))
5320 5315
5321static int led_read(char *p) 5316static int led_read(struct seq_file *m)
5322{ 5317{
5323 int len = 0;
5324
5325 if (!led_supported) { 5318 if (!led_supported) {
5326 len += sprintf(p + len, "status:\t\tnot supported\n"); 5319 seq_printf(m, "status:\t\tnot supported\n");
5327 return len; 5320 return 0;
5328 } 5321 }
5329 len += sprintf(p + len, "status:\t\tsupported\n"); 5322 seq_printf(m, "status:\t\tsupported\n");
5330 5323
5331 if (led_supported == TPACPI_LED_570) { 5324 if (led_supported == TPACPI_LED_570) {
5332 /* 570 */ 5325 /* 570 */
@@ -5335,15 +5328,15 @@ static int led_read(char *p)
5335 status = led_get_status(i); 5328 status = led_get_status(i);
5336 if (status < 0) 5329 if (status < 0)
5337 return -EIO; 5330 return -EIO;
5338 len += sprintf(p + len, "%d:\t\t%s\n", 5331 seq_printf(m, "%d:\t\t%s\n",
5339 i, str_led_status(status)); 5332 i, str_led_status(status));
5340 } 5333 }
5341 } 5334 }
5342 5335
5343 len += sprintf(p + len, "commands:\t" 5336 seq_printf(m, "commands:\t"
5344 "<led> on, <led> off, <led> blink (<led> is 0-15)\n"); 5337 "<led> on, <led> off, <led> blink (<led> is 0-15)\n");
5345 5338
5346 return len; 5339 return 0;
5347} 5340}
5348 5341
5349static int led_write(char *buf) 5342static int led_write(char *buf)
@@ -5416,18 +5409,16 @@ static int __init beep_init(struct ibm_init_struct *iibm)
5416 return (beep_handle)? 0 : 1; 5409 return (beep_handle)? 0 : 1;
5417} 5410}
5418 5411
5419static int beep_read(char *p) 5412static int beep_read(struct seq_file *m)
5420{ 5413{
5421 int len = 0;
5422
5423 if (!beep_handle) 5414 if (!beep_handle)
5424 len += sprintf(p + len, "status:\t\tnot supported\n"); 5415 seq_printf(m, "status:\t\tnot supported\n");
5425 else { 5416 else {
5426 len += sprintf(p + len, "status:\t\tsupported\n"); 5417 seq_printf(m, "status:\t\tsupported\n");
5427 len += sprintf(p + len, "commands:\t<cmd> (<cmd> is 0-17)\n"); 5418 seq_printf(m, "commands:\t<cmd> (<cmd> is 0-17)\n");
5428 } 5419 }
5429 5420
5430 return len; 5421 return 0;
5431} 5422}
5432 5423
5433static int beep_write(char *buf) 5424static int beep_write(char *buf)
@@ -5480,8 +5471,11 @@ enum { /* TPACPI_THERMAL_TPEC_* */
5480 TP_EC_THERMAL_TMP0 = 0x78, /* ACPI EC regs TMP 0..7 */ 5471 TP_EC_THERMAL_TMP0 = 0x78, /* ACPI EC regs TMP 0..7 */
5481 TP_EC_THERMAL_TMP8 = 0xC0, /* ACPI EC regs TMP 8..15 */ 5472 TP_EC_THERMAL_TMP8 = 0xC0, /* ACPI EC regs TMP 8..15 */
5482 TP_EC_THERMAL_TMP_NA = -128, /* ACPI EC sensor not available */ 5473 TP_EC_THERMAL_TMP_NA = -128, /* ACPI EC sensor not available */
5474
5475 TPACPI_THERMAL_SENSOR_NA = -128000, /* Sensor not available */
5483}; 5476};
5484 5477
5478
5485#define TPACPI_MAX_THERMAL_SENSORS 16 /* Max thermal sensors supported */ 5479#define TPACPI_MAX_THERMAL_SENSORS 16 /* Max thermal sensors supported */
5486struct ibm_thermal_sensors_struct { 5480struct ibm_thermal_sensors_struct {
5487 s32 temp[TPACPI_MAX_THERMAL_SENSORS]; 5481 s32 temp[TPACPI_MAX_THERMAL_SENSORS];
@@ -5571,6 +5565,28 @@ static int thermal_get_sensors(struct ibm_thermal_sensors_struct *s)
5571 return n; 5565 return n;
5572} 5566}
5573 5567
5568static void thermal_dump_all_sensors(void)
5569{
5570 int n, i;
5571 struct ibm_thermal_sensors_struct t;
5572
5573 n = thermal_get_sensors(&t);
5574 if (n <= 0)
5575 return;
5576
5577 printk(TPACPI_NOTICE
5578 "temperatures (Celsius):");
5579
5580 for (i = 0; i < n; i++) {
5581 if (t.temp[i] != TPACPI_THERMAL_SENSOR_NA)
5582 printk(KERN_CONT " %d", (int)(t.temp[i] / 1000));
5583 else
5584 printk(KERN_CONT " N/A");
5585 }
5586
5587 printk(KERN_CONT "\n");
5588}
5589
5574/* sysfs temp##_input -------------------------------------------------- */ 5590/* sysfs temp##_input -------------------------------------------------- */
5575 5591
5576static ssize_t thermal_temp_input_show(struct device *dev, 5592static ssize_t thermal_temp_input_show(struct device *dev,
@@ -5586,7 +5602,7 @@ static ssize_t thermal_temp_input_show(struct device *dev,
5586 res = thermal_get_sensor(idx, &value); 5602 res = thermal_get_sensor(idx, &value);
5587 if (res) 5603 if (res)
5588 return res; 5604 return res;
5589 if (value == TP_EC_THERMAL_TMP_NA * 1000) 5605 if (value == TPACPI_THERMAL_SENSOR_NA)
5590 return -ENXIO; 5606 return -ENXIO;
5591 5607
5592 return snprintf(buf, PAGE_SIZE, "%d\n", value); 5608 return snprintf(buf, PAGE_SIZE, "%d\n", value);
@@ -5755,7 +5771,7 @@ static void thermal_exit(void)
5755 case TPACPI_THERMAL_ACPI_TMP07: 5771 case TPACPI_THERMAL_ACPI_TMP07:
5756 case TPACPI_THERMAL_ACPI_UPDT: 5772 case TPACPI_THERMAL_ACPI_UPDT:
5757 sysfs_remove_group(&tpacpi_sensors_pdev->dev.kobj, 5773 sysfs_remove_group(&tpacpi_sensors_pdev->dev.kobj,
5758 &thermal_temp_input16_group); 5774 &thermal_temp_input8_group);
5759 break; 5775 break;
5760 case TPACPI_THERMAL_NONE: 5776 case TPACPI_THERMAL_NONE:
5761 default: 5777 default:
@@ -5763,9 +5779,8 @@ static void thermal_exit(void)
5763 } 5779 }
5764} 5780}
5765 5781
5766static int thermal_read(char *p) 5782static int thermal_read(struct seq_file *m)
5767{ 5783{
5768 int len = 0;
5769 int n, i; 5784 int n, i;
5770 struct ibm_thermal_sensors_struct t; 5785 struct ibm_thermal_sensors_struct t;
5771 5786
@@ -5773,16 +5788,16 @@ static int thermal_read(char *p)
5773 if (unlikely(n < 0)) 5788 if (unlikely(n < 0))
5774 return n; 5789 return n;
5775 5790
5776 len += sprintf(p + len, "temperatures:\t"); 5791 seq_printf(m, "temperatures:\t");
5777 5792
5778 if (n > 0) { 5793 if (n > 0) {
5779 for (i = 0; i < (n - 1); i++) 5794 for (i = 0; i < (n - 1); i++)
5780 len += sprintf(p + len, "%d ", t.temp[i] / 1000); 5795 seq_printf(m, "%d ", t.temp[i] / 1000);
5781 len += sprintf(p + len, "%d\n", t.temp[i] / 1000); 5796 seq_printf(m, "%d\n", t.temp[i] / 1000);
5782 } else 5797 } else
5783 len += sprintf(p + len, "not supported\n"); 5798 seq_printf(m, "not supported\n");
5784 5799
5785 return len; 5800 return 0;
5786} 5801}
5787 5802
5788static struct ibm_struct thermal_driver_data = { 5803static struct ibm_struct thermal_driver_data = {
@@ -5797,39 +5812,38 @@ static struct ibm_struct thermal_driver_data = {
5797 5812
5798static u8 ecdump_regs[256]; 5813static u8 ecdump_regs[256];
5799 5814
5800static int ecdump_read(char *p) 5815static int ecdump_read(struct seq_file *m)
5801{ 5816{
5802 int len = 0;
5803 int i, j; 5817 int i, j;
5804 u8 v; 5818 u8 v;
5805 5819
5806 len += sprintf(p + len, "EC " 5820 seq_printf(m, "EC "
5807 " +00 +01 +02 +03 +04 +05 +06 +07" 5821 " +00 +01 +02 +03 +04 +05 +06 +07"
5808 " +08 +09 +0a +0b +0c +0d +0e +0f\n"); 5822 " +08 +09 +0a +0b +0c +0d +0e +0f\n");
5809 for (i = 0; i < 256; i += 16) { 5823 for (i = 0; i < 256; i += 16) {
5810 len += sprintf(p + len, "EC 0x%02x:", i); 5824 seq_printf(m, "EC 0x%02x:", i);
5811 for (j = 0; j < 16; j++) { 5825 for (j = 0; j < 16; j++) {
5812 if (!acpi_ec_read(i + j, &v)) 5826 if (!acpi_ec_read(i + j, &v))
5813 break; 5827 break;
5814 if (v != ecdump_regs[i + j]) 5828 if (v != ecdump_regs[i + j])
5815 len += sprintf(p + len, " *%02x", v); 5829 seq_printf(m, " *%02x", v);
5816 else 5830 else
5817 len += sprintf(p + len, " %02x", v); 5831 seq_printf(m, " %02x", v);
5818 ecdump_regs[i + j] = v; 5832 ecdump_regs[i + j] = v;
5819 } 5833 }
5820 len += sprintf(p + len, "\n"); 5834 seq_putc(m, '\n');
5821 if (j != 16) 5835 if (j != 16)
5822 break; 5836 break;
5823 } 5837 }
5824 5838
5825 /* These are way too dangerous to advertise openly... */ 5839 /* These are way too dangerous to advertise openly... */
5826#if 0 5840#if 0
5827 len += sprintf(p + len, "commands:\t0x<offset> 0x<value>" 5841 seq_printf(m, "commands:\t0x<offset> 0x<value>"
5828 " (<offset> is 00-ff, <value> is 00-ff)\n"); 5842 " (<offset> is 00-ff, <value> is 00-ff)\n");
5829 len += sprintf(p + len, "commands:\t0x<offset> <value> " 5843 seq_printf(m, "commands:\t0x<offset> <value> "
5830 " (<offset> is 00-ff, <value> is 0-255)\n"); 5844 " (<offset> is 00-ff, <value> is 0-255)\n");
5831#endif 5845#endif
5832 return len; 5846 return 0;
5833} 5847}
5834 5848
5835static int ecdump_write(char *buf) 5849static int ecdump_write(char *buf)
@@ -6092,6 +6106,12 @@ static int brightness_get(struct backlight_device *bd)
6092 return status & TP_EC_BACKLIGHT_LVLMSK; 6106 return status & TP_EC_BACKLIGHT_LVLMSK;
6093} 6107}
6094 6108
6109static void tpacpi_brightness_notify_change(void)
6110{
6111 backlight_force_update(ibm_backlight_device,
6112 BACKLIGHT_UPDATE_HOTKEY);
6113}
6114
6095static struct backlight_ops ibm_backlight_data = { 6115static struct backlight_ops ibm_backlight_data = {
6096 .get_brightness = brightness_get, 6116 .get_brightness = brightness_get,
6097 .update_status = brightness_update_status, 6117 .update_status = brightness_update_status,
@@ -6120,8 +6140,8 @@ static const struct tpacpi_quirk brightness_quirk_table[] __initconst = {
6120 6140
6121 /* Models with Intel Extreme Graphics 2 */ 6141 /* Models with Intel Extreme Graphics 2 */
6122 TPACPI_Q_IBM('1', 'U', TPACPI_BRGHT_Q_NOEC), 6142 TPACPI_Q_IBM('1', 'U', TPACPI_BRGHT_Q_NOEC),
6123 TPACPI_Q_IBM('1', 'V', TPACPI_BRGHT_Q_ASK|TPACPI_BRGHT_Q_NOEC), 6143 TPACPI_Q_IBM('1', 'V', TPACPI_BRGHT_Q_ASK|TPACPI_BRGHT_Q_EC),
6124 TPACPI_Q_IBM('1', 'W', TPACPI_BRGHT_Q_ASK|TPACPI_BRGHT_Q_NOEC), 6144 TPACPI_Q_IBM('1', 'W', TPACPI_BRGHT_Q_ASK|TPACPI_BRGHT_Q_EC),
6125 6145
6126 /* Models with Intel GMA900 */ 6146 /* Models with Intel GMA900 */
6127 TPACPI_Q_IBM('7', '0', TPACPI_BRGHT_Q_NOEC), /* T43, R52 */ 6147 TPACPI_Q_IBM('7', '0', TPACPI_BRGHT_Q_NOEC), /* T43, R52 */
@@ -6246,6 +6266,12 @@ static int __init brightness_init(struct ibm_init_struct *iibm)
6246 ibm_backlight_device->props.brightness = b & TP_EC_BACKLIGHT_LVLMSK; 6266 ibm_backlight_device->props.brightness = b & TP_EC_BACKLIGHT_LVLMSK;
6247 backlight_update_status(ibm_backlight_device); 6267 backlight_update_status(ibm_backlight_device);
6248 6268
6269 vdbg_printk(TPACPI_DBG_INIT | TPACPI_DBG_BRGHT,
6270 "brightness: registering brightness hotkeys "
6271 "as change notification\n");
6272 tpacpi_hotkey_driver_mask_set(hotkey_driver_mask
6273 | TP_ACPI_HKEY_BRGHTUP_MASK
6274 | TP_ACPI_HKEY_BRGHTDWN_MASK);;
6249 return 0; 6275 return 0;
6250} 6276}
6251 6277
@@ -6270,23 +6296,22 @@ static void brightness_exit(void)
6270 tpacpi_brightness_checkpoint_nvram(); 6296 tpacpi_brightness_checkpoint_nvram();
6271} 6297}
6272 6298
6273static int brightness_read(char *p) 6299static int brightness_read(struct seq_file *m)
6274{ 6300{
6275 int len = 0;
6276 int level; 6301 int level;
6277 6302
6278 level = brightness_get(NULL); 6303 level = brightness_get(NULL);
6279 if (level < 0) { 6304 if (level < 0) {
6280 len += sprintf(p + len, "level:\t\tunreadable\n"); 6305 seq_printf(m, "level:\t\tunreadable\n");
6281 } else { 6306 } else {
6282 len += sprintf(p + len, "level:\t\t%d\n", level); 6307 seq_printf(m, "level:\t\t%d\n", level);
6283 len += sprintf(p + len, "commands:\tup, down\n"); 6308 seq_printf(m, "commands:\tup, down\n");
6284 len += sprintf(p + len, "commands:\tlevel <level>" 6309 seq_printf(m, "commands:\tlevel <level>"
6285 " (<level> is 0-%d)\n", 6310 " (<level> is 0-%d)\n",
6286 (tp_features.bright_16levels) ? 15 : 7); 6311 (tp_features.bright_16levels) ? 15 : 7);
6287 } 6312 }
6288 6313
6289 return len; 6314 return 0;
6290} 6315}
6291 6316
6292static int brightness_write(char *buf) 6317static int brightness_write(char *buf)
@@ -6322,6 +6347,9 @@ static int brightness_write(char *buf)
6322 * Doing it this way makes the syscall restartable in case of EINTR 6347 * Doing it this way makes the syscall restartable in case of EINTR
6323 */ 6348 */
6324 rc = brightness_set(level); 6349 rc = brightness_set(level);
6350 if (!rc && ibm_backlight_device)
6351 backlight_force_update(ibm_backlight_device,
6352 BACKLIGHT_UPDATE_SYSFS);
6325 return (rc == -EINTR)? -ERESTARTSYS : rc; 6353 return (rc == -EINTR)? -ERESTARTSYS : rc;
6326} 6354}
6327 6355
@@ -6338,101 +6366,685 @@ static struct ibm_struct brightness_driver_data = {
6338 * Volume subdriver 6366 * Volume subdriver
6339 */ 6367 */
6340 6368
6341static int volume_offset = 0x30; 6369/*
6370 * IBM ThinkPads have a simple volume controller with MUTE gating.
6371 * Very early Lenovo ThinkPads follow the IBM ThinkPad spec.
6372 *
6373 * Since the *61 series (and probably also the later *60 series), Lenovo
6374 * ThinkPads only implement the MUTE gate.
6375 *
6376 * EC register 0x30
6377 * Bit 6: MUTE (1 mutes sound)
6378 * Bit 3-0: Volume
6379 * Other bits should be zero as far as we know.
6380 *
6381 * This is also stored in CMOS NVRAM, byte 0x60, bit 6 (MUTE), and
6382 * bits 3-0 (volume). Other bits in NVRAM may have other functions,
6383 * such as bit 7 which is used to detect repeated presses of MUTE,
6384 * and we leave them unchanged.
6385 */
6386
6387#ifdef CONFIG_THINKPAD_ACPI_ALSA_SUPPORT
6388
6389#define TPACPI_ALSA_DRVNAME "ThinkPad EC"
6390#define TPACPI_ALSA_SHRTNAME "ThinkPad Console Audio Control"
6391#define TPACPI_ALSA_MIXERNAME TPACPI_ALSA_SHRTNAME
6392
6393static int alsa_index = ~((1 << (SNDRV_CARDS - 3)) - 1); /* last three slots */
6394static char *alsa_id = "ThinkPadEC";
6395static int alsa_enable = SNDRV_DEFAULT_ENABLE1;
6396
6397struct tpacpi_alsa_data {
6398 struct snd_card *card;
6399 struct snd_ctl_elem_id *ctl_mute_id;
6400 struct snd_ctl_elem_id *ctl_vol_id;
6401};
6402
6403static struct snd_card *alsa_card;
6404
6405enum {
6406 TP_EC_AUDIO = 0x30,
6407
6408 /* TP_EC_AUDIO bits */
6409 TP_EC_AUDIO_MUTESW = 6,
6410
6411 /* TP_EC_AUDIO bitmasks */
6412 TP_EC_AUDIO_LVL_MSK = 0x0F,
6413 TP_EC_AUDIO_MUTESW_MSK = (1 << TP_EC_AUDIO_MUTESW),
6342 6414
6343static int volume_read(char *p) 6415 /* Maximum volume */
6416 TP_EC_VOLUME_MAX = 14,
6417};
6418
6419enum tpacpi_volume_access_mode {
6420 TPACPI_VOL_MODE_AUTO = 0, /* Not implemented yet */
6421 TPACPI_VOL_MODE_EC, /* Pure EC control */
6422 TPACPI_VOL_MODE_UCMS_STEP, /* UCMS step-based control: N/A */
6423 TPACPI_VOL_MODE_ECNVRAM, /* EC control w/ NVRAM store */
6424 TPACPI_VOL_MODE_MAX
6425};
6426
6427enum tpacpi_volume_capabilities {
6428 TPACPI_VOL_CAP_AUTO = 0, /* Use white/blacklist */
6429 TPACPI_VOL_CAP_VOLMUTE, /* Output vol and mute */
6430 TPACPI_VOL_CAP_MUTEONLY, /* Output mute only */
6431 TPACPI_VOL_CAP_MAX
6432};
6433
6434static enum tpacpi_volume_access_mode volume_mode =
6435 TPACPI_VOL_MODE_MAX;
6436
6437static enum tpacpi_volume_capabilities volume_capabilities;
6438static int volume_control_allowed;
6439
6440/*
6441 * Used to syncronize writers to TP_EC_AUDIO and
6442 * TP_NVRAM_ADDR_MIXER, as we need to do read-modify-write
6443 */
6444static struct mutex volume_mutex;
6445
6446static void tpacpi_volume_checkpoint_nvram(void)
6344{ 6447{
6345 int len = 0; 6448 u8 lec = 0;
6346 u8 level; 6449 u8 b_nvram;
6450 u8 ec_mask;
6451
6452 if (volume_mode != TPACPI_VOL_MODE_ECNVRAM)
6453 return;
6454 if (!volume_control_allowed)
6455 return;
6456
6457 vdbg_printk(TPACPI_DBG_MIXER,
6458 "trying to checkpoint mixer state to NVRAM...\n");
6459
6460 if (tp_features.mixer_no_level_control)
6461 ec_mask = TP_EC_AUDIO_MUTESW_MSK;
6462 else
6463 ec_mask = TP_EC_AUDIO_MUTESW_MSK | TP_EC_AUDIO_LVL_MSK;
6347 6464
6348 if (!acpi_ec_read(volume_offset, &level)) { 6465 if (mutex_lock_killable(&volume_mutex) < 0)
6349 len += sprintf(p + len, "level:\t\tunreadable\n"); 6466 return;
6467
6468 if (unlikely(!acpi_ec_read(TP_EC_AUDIO, &lec)))
6469 goto unlock;
6470 lec &= ec_mask;
6471 b_nvram = nvram_read_byte(TP_NVRAM_ADDR_MIXER);
6472
6473 if (lec != (b_nvram & ec_mask)) {
6474 /* NVRAM needs update */
6475 b_nvram &= ~ec_mask;
6476 b_nvram |= lec;
6477 nvram_write_byte(b_nvram, TP_NVRAM_ADDR_MIXER);
6478 dbg_printk(TPACPI_DBG_MIXER,
6479 "updated NVRAM mixer status to 0x%02x (0x%02x)\n",
6480 (unsigned int) lec, (unsigned int) b_nvram);
6350 } else { 6481 } else {
6351 len += sprintf(p + len, "level:\t\t%d\n", level & 0xf); 6482 vdbg_printk(TPACPI_DBG_MIXER,
6352 len += sprintf(p + len, "mute:\t\t%s\n", onoff(level, 6)); 6483 "NVRAM mixer status already is 0x%02x (0x%02x)\n",
6353 len += sprintf(p + len, "commands:\tup, down, mute\n"); 6484 (unsigned int) lec, (unsigned int) b_nvram);
6354 len += sprintf(p + len, "commands:\tlevel <level>"
6355 " (<level> is 0-15)\n");
6356 } 6485 }
6357 6486
6358 return len; 6487unlock:
6488 mutex_unlock(&volume_mutex);
6359} 6489}
6360 6490
6361static int volume_write(char *buf) 6491static int volume_get_status_ec(u8 *status)
6362{ 6492{
6363 int cmos_cmd, inc, i; 6493 u8 s;
6364 u8 level, mute;
6365 int new_level, new_mute;
6366 char *cmd;
6367 6494
6368 while ((cmd = next_cmd(&buf))) { 6495 if (!acpi_ec_read(TP_EC_AUDIO, &s))
6369 if (!acpi_ec_read(volume_offset, &level)) 6496 return -EIO;
6370 return -EIO;
6371 new_mute = mute = level & 0x40;
6372 new_level = level = level & 0xf;
6373 6497
6374 if (strlencmp(cmd, "up") == 0) { 6498 *status = s;
6375 if (mute)
6376 new_mute = 0;
6377 else
6378 new_level = level == 15 ? 15 : level + 1;
6379 } else if (strlencmp(cmd, "down") == 0) {
6380 if (mute)
6381 new_mute = 0;
6382 else
6383 new_level = level == 0 ? 0 : level - 1;
6384 } else if (sscanf(cmd, "level %d", &new_level) == 1 &&
6385 new_level >= 0 && new_level <= 15) {
6386 /* new_level set */
6387 } else if (strlencmp(cmd, "mute") == 0) {
6388 new_mute = 0x40;
6389 } else
6390 return -EINVAL;
6391 6499
6392 if (new_level != level) { 6500 dbg_printk(TPACPI_DBG_MIXER, "status 0x%02x\n", s);
6393 /* mute doesn't change */
6394 6501
6395 cmos_cmd = (new_level > level) ? 6502 return 0;
6396 TP_CMOS_VOLUME_UP : TP_CMOS_VOLUME_DOWN; 6503}
6397 inc = new_level > level ? 1 : -1;
6398 6504
6399 if (mute && (issue_thinkpad_cmos_command(cmos_cmd) || 6505static int volume_get_status(u8 *status)
6400 !acpi_ec_write(volume_offset, level))) 6506{
6401 return -EIO; 6507 return volume_get_status_ec(status);
6508}
6509
6510static int volume_set_status_ec(const u8 status)
6511{
6512 if (!acpi_ec_write(TP_EC_AUDIO, status))
6513 return -EIO;
6402 6514
6403 for (i = level; i != new_level; i += inc) 6515 dbg_printk(TPACPI_DBG_MIXER, "set EC mixer to 0x%02x\n", status);
6404 if (issue_thinkpad_cmos_command(cmos_cmd) ||
6405 !acpi_ec_write(volume_offset, i + inc))
6406 return -EIO;
6407 6516
6408 if (mute && 6517 return 0;
6409 (issue_thinkpad_cmos_command(TP_CMOS_VOLUME_MUTE) || 6518}
6410 !acpi_ec_write(volume_offset, new_level + mute))) { 6519
6411 return -EIO; 6520static int volume_set_status(const u8 status)
6412 } 6521{
6522 return volume_set_status_ec(status);
6523}
6524
6525static int volume_set_mute_ec(const bool mute)
6526{
6527 int rc;
6528 u8 s, n;
6529
6530 if (mutex_lock_killable(&volume_mutex) < 0)
6531 return -EINTR;
6532
6533 rc = volume_get_status_ec(&s);
6534 if (rc)
6535 goto unlock;
6536
6537 n = (mute) ? s | TP_EC_AUDIO_MUTESW_MSK :
6538 s & ~TP_EC_AUDIO_MUTESW_MSK;
6539
6540 if (n != s)
6541 rc = volume_set_status_ec(n);
6542
6543unlock:
6544 mutex_unlock(&volume_mutex);
6545 return rc;
6546}
6547
6548static int volume_set_mute(const bool mute)
6549{
6550 dbg_printk(TPACPI_DBG_MIXER, "trying to %smute\n",
6551 (mute) ? "" : "un");
6552 return volume_set_mute_ec(mute);
6553}
6554
6555static int volume_set_volume_ec(const u8 vol)
6556{
6557 int rc;
6558 u8 s, n;
6559
6560 if (vol > TP_EC_VOLUME_MAX)
6561 return -EINVAL;
6562
6563 if (mutex_lock_killable(&volume_mutex) < 0)
6564 return -EINTR;
6565
6566 rc = volume_get_status_ec(&s);
6567 if (rc)
6568 goto unlock;
6569
6570 n = (s & ~TP_EC_AUDIO_LVL_MSK) | vol;
6571
6572 if (n != s)
6573 rc = volume_set_status_ec(n);
6574
6575unlock:
6576 mutex_unlock(&volume_mutex);
6577 return rc;
6578}
6579
6580static int volume_set_volume(const u8 vol)
6581{
6582 dbg_printk(TPACPI_DBG_MIXER,
6583 "trying to set volume level to %hu\n", vol);
6584 return volume_set_volume_ec(vol);
6585}
6586
6587static void volume_alsa_notify_change(void)
6588{
6589 struct tpacpi_alsa_data *d;
6590
6591 if (alsa_card && alsa_card->private_data) {
6592 d = alsa_card->private_data;
6593 if (d->ctl_mute_id)
6594 snd_ctl_notify(alsa_card,
6595 SNDRV_CTL_EVENT_MASK_VALUE,
6596 d->ctl_mute_id);
6597 if (d->ctl_vol_id)
6598 snd_ctl_notify(alsa_card,
6599 SNDRV_CTL_EVENT_MASK_VALUE,
6600 d->ctl_vol_id);
6601 }
6602}
6603
6604static int volume_alsa_vol_info(struct snd_kcontrol *kcontrol,
6605 struct snd_ctl_elem_info *uinfo)
6606{
6607 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
6608 uinfo->count = 1;
6609 uinfo->value.integer.min = 0;
6610 uinfo->value.integer.max = TP_EC_VOLUME_MAX;
6611 return 0;
6612}
6613
6614static int volume_alsa_vol_get(struct snd_kcontrol *kcontrol,
6615 struct snd_ctl_elem_value *ucontrol)
6616{
6617 u8 s;
6618 int rc;
6619
6620 rc = volume_get_status(&s);
6621 if (rc < 0)
6622 return rc;
6623
6624 ucontrol->value.integer.value[0] = s & TP_EC_AUDIO_LVL_MSK;
6625 return 0;
6626}
6627
6628static int volume_alsa_vol_put(struct snd_kcontrol *kcontrol,
6629 struct snd_ctl_elem_value *ucontrol)
6630{
6631 return volume_set_volume(ucontrol->value.integer.value[0]);
6632}
6633
6634#define volume_alsa_mute_info snd_ctl_boolean_mono_info
6635
6636static int volume_alsa_mute_get(struct snd_kcontrol *kcontrol,
6637 struct snd_ctl_elem_value *ucontrol)
6638{
6639 u8 s;
6640 int rc;
6641
6642 rc = volume_get_status(&s);
6643 if (rc < 0)
6644 return rc;
6645
6646 ucontrol->value.integer.value[0] =
6647 (s & TP_EC_AUDIO_MUTESW_MSK) ? 0 : 1;
6648 return 0;
6649}
6650
6651static int volume_alsa_mute_put(struct snd_kcontrol *kcontrol,
6652 struct snd_ctl_elem_value *ucontrol)
6653{
6654 return volume_set_mute(!ucontrol->value.integer.value[0]);
6655}
6656
6657static struct snd_kcontrol_new volume_alsa_control_vol __devinitdata = {
6658 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
6659 .name = "Console Playback Volume",
6660 .index = 0,
6661 .access = SNDRV_CTL_ELEM_ACCESS_READ,
6662 .info = volume_alsa_vol_info,
6663 .get = volume_alsa_vol_get,
6664};
6665
6666static struct snd_kcontrol_new volume_alsa_control_mute __devinitdata = {
6667 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
6668 .name = "Console Playback Switch",
6669 .index = 0,
6670 .access = SNDRV_CTL_ELEM_ACCESS_READ,
6671 .info = volume_alsa_mute_info,
6672 .get = volume_alsa_mute_get,
6673};
6674
6675static void volume_suspend(pm_message_t state)
6676{
6677 tpacpi_volume_checkpoint_nvram();
6678}
6679
6680static void volume_resume(void)
6681{
6682 volume_alsa_notify_change();
6683}
6684
6685static void volume_shutdown(void)
6686{
6687 tpacpi_volume_checkpoint_nvram();
6688}
6689
6690static void volume_exit(void)
6691{
6692 if (alsa_card) {
6693 snd_card_free(alsa_card);
6694 alsa_card = NULL;
6695 }
6696
6697 tpacpi_volume_checkpoint_nvram();
6698}
6699
6700static int __init volume_create_alsa_mixer(void)
6701{
6702 struct snd_card *card;
6703 struct tpacpi_alsa_data *data;
6704 struct snd_kcontrol *ctl_vol;
6705 struct snd_kcontrol *ctl_mute;
6706 int rc;
6707
6708 rc = snd_card_create(alsa_index, alsa_id, THIS_MODULE,
6709 sizeof(struct tpacpi_alsa_data), &card);
6710 if (rc < 0 || !card) {
6711 printk(TPACPI_ERR
6712 "Failed to create ALSA card structures: %d\n", rc);
6713 return 1;
6714 }
6715
6716 BUG_ON(!card->private_data);
6717 data = card->private_data;
6718 data->card = card;
6719
6720 strlcpy(card->driver, TPACPI_ALSA_DRVNAME,
6721 sizeof(card->driver));
6722 strlcpy(card->shortname, TPACPI_ALSA_SHRTNAME,
6723 sizeof(card->shortname));
6724 snprintf(card->mixername, sizeof(card->mixername), "ThinkPad EC %s",
6725 (thinkpad_id.ec_version_str) ?
6726 thinkpad_id.ec_version_str : "(unknown)");
6727 snprintf(card->longname, sizeof(card->longname),
6728 "%s at EC reg 0x%02x, fw %s", card->shortname, TP_EC_AUDIO,
6729 (thinkpad_id.ec_version_str) ?
6730 thinkpad_id.ec_version_str : "unknown");
6731
6732 if (volume_control_allowed) {
6733 volume_alsa_control_vol.put = volume_alsa_vol_put;
6734 volume_alsa_control_vol.access =
6735 SNDRV_CTL_ELEM_ACCESS_READWRITE;
6736
6737 volume_alsa_control_mute.put = volume_alsa_mute_put;
6738 volume_alsa_control_mute.access =
6739 SNDRV_CTL_ELEM_ACCESS_READWRITE;
6740 }
6741
6742 if (!tp_features.mixer_no_level_control) {
6743 ctl_vol = snd_ctl_new1(&volume_alsa_control_vol, NULL);
6744 rc = snd_ctl_add(card, ctl_vol);
6745 if (rc < 0) {
6746 printk(TPACPI_ERR
6747 "Failed to create ALSA volume control: %d\n",
6748 rc);
6749 goto err_exit;
6413 } 6750 }
6751 data->ctl_vol_id = &ctl_vol->id;
6752 }
6414 6753
6415 if (new_mute != mute) { 6754 ctl_mute = snd_ctl_new1(&volume_alsa_control_mute, NULL);
6416 /* level doesn't change */ 6755 rc = snd_ctl_add(card, ctl_mute);
6756 if (rc < 0) {
6757 printk(TPACPI_ERR "Failed to create ALSA mute control: %d\n",
6758 rc);
6759 goto err_exit;
6760 }
6761 data->ctl_mute_id = &ctl_mute->id;
6417 6762
6418 cmos_cmd = (new_mute) ? 6763 snd_card_set_dev(card, &tpacpi_pdev->dev);
6419 TP_CMOS_VOLUME_MUTE : TP_CMOS_VOLUME_UP; 6764 rc = snd_card_register(card);
6765 if (rc < 0) {
6766 printk(TPACPI_ERR "Failed to register ALSA card: %d\n", rc);
6767 goto err_exit;
6768 }
6420 6769
6421 if (issue_thinkpad_cmos_command(cmos_cmd) || 6770 alsa_card = card;
6422 !acpi_ec_write(volume_offset, level + new_mute)) 6771 return 0;
6423 return -EIO; 6772
6773err_exit:
6774 snd_card_free(card);
6775 return 1;
6776}
6777
6778#define TPACPI_VOL_Q_MUTEONLY 0x0001 /* Mute-only control available */
6779#define TPACPI_VOL_Q_LEVEL 0x0002 /* Volume control available */
6780
6781static const struct tpacpi_quirk volume_quirk_table[] __initconst = {
6782 /* Whitelist volume level on all IBM by default */
6783 { .vendor = PCI_VENDOR_ID_IBM,
6784 .bios = TPACPI_MATCH_ANY,
6785 .ec = TPACPI_MATCH_ANY,
6786 .quirks = TPACPI_VOL_Q_LEVEL },
6787
6788 /* Lenovo models with volume control (needs confirmation) */
6789 TPACPI_QEC_LNV('7', 'C', TPACPI_VOL_Q_LEVEL), /* R60/i */
6790 TPACPI_QEC_LNV('7', 'E', TPACPI_VOL_Q_LEVEL), /* R60e/i */
6791 TPACPI_QEC_LNV('7', '9', TPACPI_VOL_Q_LEVEL), /* T60/p */
6792 TPACPI_QEC_LNV('7', 'B', TPACPI_VOL_Q_LEVEL), /* X60/s */
6793 TPACPI_QEC_LNV('7', 'J', TPACPI_VOL_Q_LEVEL), /* X60t */
6794 TPACPI_QEC_LNV('7', '7', TPACPI_VOL_Q_LEVEL), /* Z60 */
6795 TPACPI_QEC_LNV('7', 'F', TPACPI_VOL_Q_LEVEL), /* Z61 */
6796
6797 /* Whitelist mute-only on all Lenovo by default */
6798 { .vendor = PCI_VENDOR_ID_LENOVO,
6799 .bios = TPACPI_MATCH_ANY,
6800 .ec = TPACPI_MATCH_ANY,
6801 .quirks = TPACPI_VOL_Q_MUTEONLY }
6802};
6803
6804static int __init volume_init(struct ibm_init_struct *iibm)
6805{
6806 unsigned long quirks;
6807 int rc;
6808
6809 vdbg_printk(TPACPI_DBG_INIT, "initializing volume subdriver\n");
6810
6811 mutex_init(&volume_mutex);
6812
6813 /*
6814 * Check for module parameter bogosity, note that we
6815 * init volume_mode to TPACPI_VOL_MODE_MAX in order to be
6816 * able to detect "unspecified"
6817 */
6818 if (volume_mode > TPACPI_VOL_MODE_MAX)
6819 return -EINVAL;
6820
6821 if (volume_mode == TPACPI_VOL_MODE_UCMS_STEP) {
6822 printk(TPACPI_ERR
6823 "UCMS step volume mode not implemented, "
6824 "please contact %s\n", TPACPI_MAIL);
6825 return 1;
6826 }
6827
6828 if (volume_capabilities >= TPACPI_VOL_CAP_MAX)
6829 return -EINVAL;
6830
6831 /*
6832 * The ALSA mixer is our primary interface.
6833 * When disabled, don't install the subdriver at all
6834 */
6835 if (!alsa_enable) {
6836 vdbg_printk(TPACPI_DBG_INIT | TPACPI_DBG_MIXER,
6837 "ALSA mixer disabled by parameter, "
6838 "not loading volume subdriver...\n");
6839 return 1;
6840 }
6841
6842 quirks = tpacpi_check_quirks(volume_quirk_table,
6843 ARRAY_SIZE(volume_quirk_table));
6844
6845 switch (volume_capabilities) {
6846 case TPACPI_VOL_CAP_AUTO:
6847 if (quirks & TPACPI_VOL_Q_MUTEONLY)
6848 tp_features.mixer_no_level_control = 1;
6849 else if (quirks & TPACPI_VOL_Q_LEVEL)
6850 tp_features.mixer_no_level_control = 0;
6851 else
6852 return 1; /* no mixer */
6853 break;
6854 case TPACPI_VOL_CAP_VOLMUTE:
6855 tp_features.mixer_no_level_control = 0;
6856 break;
6857 case TPACPI_VOL_CAP_MUTEONLY:
6858 tp_features.mixer_no_level_control = 1;
6859 break;
6860 default:
6861 return 1;
6862 }
6863
6864 if (volume_capabilities != TPACPI_VOL_CAP_AUTO)
6865 dbg_printk(TPACPI_DBG_INIT | TPACPI_DBG_MIXER,
6866 "using user-supplied volume_capabilities=%d\n",
6867 volume_capabilities);
6868
6869 if (volume_mode == TPACPI_VOL_MODE_AUTO ||
6870 volume_mode == TPACPI_VOL_MODE_MAX) {
6871 volume_mode = TPACPI_VOL_MODE_ECNVRAM;
6872
6873 dbg_printk(TPACPI_DBG_INIT | TPACPI_DBG_MIXER,
6874 "driver auto-selected volume_mode=%d\n",
6875 volume_mode);
6876 } else {
6877 dbg_printk(TPACPI_DBG_INIT | TPACPI_DBG_MIXER,
6878 "using user-supplied volume_mode=%d\n",
6879 volume_mode);
6880 }
6881
6882 vdbg_printk(TPACPI_DBG_INIT | TPACPI_DBG_MIXER,
6883 "mute is supported, volume control is %s\n",
6884 str_supported(!tp_features.mixer_no_level_control));
6885
6886 rc = volume_create_alsa_mixer();
6887 if (rc) {
6888 printk(TPACPI_ERR
6889 "Could not create the ALSA mixer interface\n");
6890 return rc;
6891 }
6892
6893 printk(TPACPI_INFO
6894 "Console audio control enabled, mode: %s\n",
6895 (volume_control_allowed) ?
6896 "override (read/write)" :
6897 "monitor (read only)");
6898
6899 vdbg_printk(TPACPI_DBG_INIT | TPACPI_DBG_MIXER,
6900 "registering volume hotkeys as change notification\n");
6901 tpacpi_hotkey_driver_mask_set(hotkey_driver_mask
6902 | TP_ACPI_HKEY_VOLUP_MASK
6903 | TP_ACPI_HKEY_VOLDWN_MASK
6904 | TP_ACPI_HKEY_MUTE_MASK);
6905
6906 return 0;
6907}
6908
6909static int volume_read(struct seq_file *m)
6910{
6911 u8 status;
6912
6913 if (volume_get_status(&status) < 0) {
6914 seq_printf(m, "level:\t\tunreadable\n");
6915 } else {
6916 if (tp_features.mixer_no_level_control)
6917 seq_printf(m, "level:\t\tunsupported\n");
6918 else
6919 seq_printf(m, "level:\t\t%d\n",
6920 status & TP_EC_AUDIO_LVL_MSK);
6921
6922 seq_printf(m, "mute:\t\t%s\n",
6923 onoff(status, TP_EC_AUDIO_MUTESW));
6924
6925 if (volume_control_allowed) {
6926 seq_printf(m, "commands:\tunmute, mute\n");
6927 if (!tp_features.mixer_no_level_control) {
6928 seq_printf(m,
6929 "commands:\tup, down\n");
6930 seq_printf(m,
6931 "commands:\tlevel <level>"
6932 " (<level> is 0-%d)\n",
6933 TP_EC_VOLUME_MAX);
6934 }
6424 } 6935 }
6425 } 6936 }
6426 6937
6427 return 0; 6938 return 0;
6428} 6939}
6429 6940
6941static int volume_write(char *buf)
6942{
6943 u8 s;
6944 u8 new_level, new_mute;
6945 int l;
6946 char *cmd;
6947 int rc;
6948
6949 /*
6950 * We do allow volume control at driver startup, so that the
6951 * user can set initial state through the volume=... parameter hack.
6952 */
6953 if (!volume_control_allowed && tpacpi_lifecycle != TPACPI_LIFE_INIT) {
6954 if (unlikely(!tp_warned.volume_ctrl_forbidden)) {
6955 tp_warned.volume_ctrl_forbidden = 1;
6956 printk(TPACPI_NOTICE
6957 "Console audio control in monitor mode, "
6958 "changes are not allowed.\n");
6959 printk(TPACPI_NOTICE
6960 "Use the volume_control=1 module parameter "
6961 "to enable volume control\n");
6962 }
6963 return -EPERM;
6964 }
6965
6966 rc = volume_get_status(&s);
6967 if (rc < 0)
6968 return rc;
6969
6970 new_level = s & TP_EC_AUDIO_LVL_MSK;
6971 new_mute = s & TP_EC_AUDIO_MUTESW_MSK;
6972
6973 while ((cmd = next_cmd(&buf))) {
6974 if (!tp_features.mixer_no_level_control) {
6975 if (strlencmp(cmd, "up") == 0) {
6976 if (new_mute)
6977 new_mute = 0;
6978 else if (new_level < TP_EC_VOLUME_MAX)
6979 new_level++;
6980 continue;
6981 } else if (strlencmp(cmd, "down") == 0) {
6982 if (new_mute)
6983 new_mute = 0;
6984 else if (new_level > 0)
6985 new_level--;
6986 continue;
6987 } else if (sscanf(cmd, "level %u", &l) == 1 &&
6988 l >= 0 && l <= TP_EC_VOLUME_MAX) {
6989 new_level = l;
6990 continue;
6991 }
6992 }
6993 if (strlencmp(cmd, "mute") == 0)
6994 new_mute = TP_EC_AUDIO_MUTESW_MSK;
6995 else if (strlencmp(cmd, "unmute") == 0)
6996 new_mute = 0;
6997 else
6998 return -EINVAL;
6999 }
7000
7001 if (tp_features.mixer_no_level_control) {
7002 tpacpi_disclose_usertask("procfs volume", "%smute\n",
7003 new_mute ? "" : "un");
7004 rc = volume_set_mute(!!new_mute);
7005 } else {
7006 tpacpi_disclose_usertask("procfs volume",
7007 "%smute and set level to %d\n",
7008 new_mute ? "" : "un", new_level);
7009 rc = volume_set_status(new_mute | new_level);
7010 }
7011 volume_alsa_notify_change();
7012
7013 return (rc == -EINTR) ? -ERESTARTSYS : rc;
7014}
7015
6430static struct ibm_struct volume_driver_data = { 7016static struct ibm_struct volume_driver_data = {
6431 .name = "volume", 7017 .name = "volume",
6432 .read = volume_read, 7018 .read = volume_read,
6433 .write = volume_write, 7019 .write = volume_write,
7020 .exit = volume_exit,
7021 .suspend = volume_suspend,
7022 .resume = volume_resume,
7023 .shutdown = volume_shutdown,
6434}; 7024};
6435 7025
7026#else /* !CONFIG_THINKPAD_ACPI_ALSA_SUPPORT */
7027
7028#define alsa_card NULL
7029
7030static void inline volume_alsa_notify_change(void)
7031{
7032}
7033
7034static int __init volume_init(struct ibm_init_struct *iibm)
7035{
7036 printk(TPACPI_INFO
7037 "volume: disabled as there is no ALSA support in this kernel\n");
7038
7039 return 1;
7040}
7041
7042static struct ibm_struct volume_driver_data = {
7043 .name = "volume",
7044};
7045
7046#endif /* CONFIG_THINKPAD_ACPI_ALSA_SUPPORT */
7047
6436/************************************************************************* 7048/*************************************************************************
6437 * Fan subdriver 7049 * Fan subdriver
6438 */ 7050 */
@@ -7507,9 +8119,8 @@ static void fan_resume(void)
7507 } 8119 }
7508} 8120}
7509 8121
7510static int fan_read(char *p) 8122static int fan_read(struct seq_file *m)
7511{ 8123{
7512 int len = 0;
7513 int rc; 8124 int rc;
7514 u8 status; 8125 u8 status;
7515 unsigned int speed = 0; 8126 unsigned int speed = 0;
@@ -7521,7 +8132,7 @@ static int fan_read(char *p)
7521 if (rc < 0) 8132 if (rc < 0)
7522 return rc; 8133 return rc;
7523 8134
7524 len += sprintf(p + len, "status:\t\t%s\n" 8135 seq_printf(m, "status:\t\t%s\n"
7525 "level:\t\t%d\n", 8136 "level:\t\t%d\n",
7526 (status != 0) ? "enabled" : "disabled", status); 8137 (status != 0) ? "enabled" : "disabled", status);
7527 break; 8138 break;
@@ -7532,54 +8143,54 @@ static int fan_read(char *p)
7532 if (rc < 0) 8143 if (rc < 0)
7533 return rc; 8144 return rc;
7534 8145
7535 len += sprintf(p + len, "status:\t\t%s\n", 8146 seq_printf(m, "status:\t\t%s\n",
7536 (status != 0) ? "enabled" : "disabled"); 8147 (status != 0) ? "enabled" : "disabled");
7537 8148
7538 rc = fan_get_speed(&speed); 8149 rc = fan_get_speed(&speed);
7539 if (rc < 0) 8150 if (rc < 0)
7540 return rc; 8151 return rc;
7541 8152
7542 len += sprintf(p + len, "speed:\t\t%d\n", speed); 8153 seq_printf(m, "speed:\t\t%d\n", speed);
7543 8154
7544 if (status & TP_EC_FAN_FULLSPEED) 8155 if (status & TP_EC_FAN_FULLSPEED)
7545 /* Disengaged mode takes precedence */ 8156 /* Disengaged mode takes precedence */
7546 len += sprintf(p + len, "level:\t\tdisengaged\n"); 8157 seq_printf(m, "level:\t\tdisengaged\n");
7547 else if (status & TP_EC_FAN_AUTO) 8158 else if (status & TP_EC_FAN_AUTO)
7548 len += sprintf(p + len, "level:\t\tauto\n"); 8159 seq_printf(m, "level:\t\tauto\n");
7549 else 8160 else
7550 len += sprintf(p + len, "level:\t\t%d\n", status); 8161 seq_printf(m, "level:\t\t%d\n", status);
7551 break; 8162 break;
7552 8163
7553 case TPACPI_FAN_NONE: 8164 case TPACPI_FAN_NONE:
7554 default: 8165 default:
7555 len += sprintf(p + len, "status:\t\tnot supported\n"); 8166 seq_printf(m, "status:\t\tnot supported\n");
7556 } 8167 }
7557 8168
7558 if (fan_control_commands & TPACPI_FAN_CMD_LEVEL) { 8169 if (fan_control_commands & TPACPI_FAN_CMD_LEVEL) {
7559 len += sprintf(p + len, "commands:\tlevel <level>"); 8170 seq_printf(m, "commands:\tlevel <level>");
7560 8171
7561 switch (fan_control_access_mode) { 8172 switch (fan_control_access_mode) {
7562 case TPACPI_FAN_WR_ACPI_SFAN: 8173 case TPACPI_FAN_WR_ACPI_SFAN:
7563 len += sprintf(p + len, " (<level> is 0-7)\n"); 8174 seq_printf(m, " (<level> is 0-7)\n");
7564 break; 8175 break;
7565 8176
7566 default: 8177 default:
7567 len += sprintf(p + len, " (<level> is 0-7, " 8178 seq_printf(m, " (<level> is 0-7, "
7568 "auto, disengaged, full-speed)\n"); 8179 "auto, disengaged, full-speed)\n");
7569 break; 8180 break;
7570 } 8181 }
7571 } 8182 }
7572 8183
7573 if (fan_control_commands & TPACPI_FAN_CMD_ENABLE) 8184 if (fan_control_commands & TPACPI_FAN_CMD_ENABLE)
7574 len += sprintf(p + len, "commands:\tenable, disable\n" 8185 seq_printf(m, "commands:\tenable, disable\n"
7575 "commands:\twatchdog <timeout> (<timeout> " 8186 "commands:\twatchdog <timeout> (<timeout> "
7576 "is 0 (off), 1-120 (seconds))\n"); 8187 "is 0 (off), 1-120 (seconds))\n");
7577 8188
7578 if (fan_control_commands & TPACPI_FAN_CMD_SPEED) 8189 if (fan_control_commands & TPACPI_FAN_CMD_SPEED)
7579 len += sprintf(p + len, "commands:\tspeed <speed>" 8190 seq_printf(m, "commands:\tspeed <speed>"
7580 " (<speed> is 0-65535)\n"); 8191 " (<speed> is 0-65535)\n");
7581 8192
7582 return len; 8193 return 0;
7583} 8194}
7584 8195
7585static int fan_write_cmd_level(const char *cmd, int *rc) 8196static int fan_write_cmd_level(const char *cmd, int *rc)
@@ -7721,10 +8332,23 @@ static struct ibm_struct fan_driver_data = {
7721 */ 8332 */
7722static void tpacpi_driver_event(const unsigned int hkey_event) 8333static void tpacpi_driver_event(const unsigned int hkey_event)
7723{ 8334{
8335 if (ibm_backlight_device) {
8336 switch (hkey_event) {
8337 case TP_HKEY_EV_BRGHT_UP:
8338 case TP_HKEY_EV_BRGHT_DOWN:
8339 tpacpi_brightness_notify_change();
8340 }
8341 }
8342 if (alsa_card) {
8343 switch (hkey_event) {
8344 case TP_HKEY_EV_VOL_UP:
8345 case TP_HKEY_EV_VOL_DOWN:
8346 case TP_HKEY_EV_VOL_MUTE:
8347 volume_alsa_notify_change();
8348 }
8349 }
7724} 8350}
7725 8351
7726
7727
7728static void hotkey_driver_event(const unsigned int scancode) 8352static void hotkey_driver_event(const unsigned int scancode)
7729{ 8353{
7730 tpacpi_driver_event(TP_HKEY_EV_HOTKEY_BASE + scancode); 8354 tpacpi_driver_event(TP_HKEY_EV_HOTKEY_BASE + scancode);
@@ -7853,19 +8477,19 @@ static int __init ibm_init(struct ibm_init_struct *iibm)
7853 "%s installed\n", ibm->name); 8477 "%s installed\n", ibm->name);
7854 8478
7855 if (ibm->read) { 8479 if (ibm->read) {
7856 entry = create_proc_entry(ibm->name, 8480 mode_t mode;
7857 S_IFREG | S_IRUGO | S_IWUSR, 8481
7858 proc_dir); 8482 mode = S_IRUGO;
8483 if (ibm->write)
8484 mode |= S_IWUSR;
8485 entry = proc_create_data(ibm->name, mode, proc_dir,
8486 &dispatch_proc_fops, ibm);
7859 if (!entry) { 8487 if (!entry) {
7860 printk(TPACPI_ERR "unable to create proc entry %s\n", 8488 printk(TPACPI_ERR "unable to create proc entry %s\n",
7861 ibm->name); 8489 ibm->name);
7862 ret = -ENODEV; 8490 ret = -ENODEV;
7863 goto err_out; 8491 goto err_out;
7864 } 8492 }
7865 entry->data = ibm;
7866 entry->read_proc = &dispatch_procfs_read;
7867 if (ibm->write)
7868 entry->write_proc = &dispatch_procfs_write;
7869 ibm->flags.proc_created = 1; 8493 ibm->flags.proc_created = 1;
7870 } 8494 }
7871 8495
@@ -8077,6 +8701,7 @@ static struct ibm_init_struct ibms_init[] __initdata = {
8077 .data = &brightness_driver_data, 8701 .data = &brightness_driver_data,
8078 }, 8702 },
8079 { 8703 {
8704 .init = volume_init,
8080 .data = &volume_driver_data, 8705 .data = &volume_driver_data,
8081 }, 8706 },
8082 { 8707 {
@@ -8112,36 +8737,61 @@ static int __init set_ibm_param(const char *val, struct kernel_param *kp)
8112 return -EINVAL; 8737 return -EINVAL;
8113} 8738}
8114 8739
8115module_param(experimental, int, 0); 8740module_param(experimental, int, 0444);
8116MODULE_PARM_DESC(experimental, 8741MODULE_PARM_DESC(experimental,
8117 "Enables experimental features when non-zero"); 8742 "Enables experimental features when non-zero");
8118 8743
8119module_param_named(debug, dbg_level, uint, 0); 8744module_param_named(debug, dbg_level, uint, 0);
8120MODULE_PARM_DESC(debug, "Sets debug level bit-mask"); 8745MODULE_PARM_DESC(debug, "Sets debug level bit-mask");
8121 8746
8122module_param(force_load, bool, 0); 8747module_param(force_load, bool, 0444);
8123MODULE_PARM_DESC(force_load, 8748MODULE_PARM_DESC(force_load,
8124 "Attempts to load the driver even on a " 8749 "Attempts to load the driver even on a "
8125 "mis-identified ThinkPad when true"); 8750 "mis-identified ThinkPad when true");
8126 8751
8127module_param_named(fan_control, fan_control_allowed, bool, 0); 8752module_param_named(fan_control, fan_control_allowed, bool, 0444);
8128MODULE_PARM_DESC(fan_control, 8753MODULE_PARM_DESC(fan_control,
8129 "Enables setting fan parameters features when true"); 8754 "Enables setting fan parameters features when true");
8130 8755
8131module_param_named(brightness_mode, brightness_mode, uint, 0); 8756module_param_named(brightness_mode, brightness_mode, uint, 0444);
8132MODULE_PARM_DESC(brightness_mode, 8757MODULE_PARM_DESC(brightness_mode,
8133 "Selects brightness control strategy: " 8758 "Selects brightness control strategy: "
8134 "0=auto, 1=EC, 2=UCMS, 3=EC+NVRAM"); 8759 "0=auto, 1=EC, 2=UCMS, 3=EC+NVRAM");
8135 8760
8136module_param(brightness_enable, uint, 0); 8761module_param(brightness_enable, uint, 0444);
8137MODULE_PARM_DESC(brightness_enable, 8762MODULE_PARM_DESC(brightness_enable,
8138 "Enables backlight control when 1, disables when 0"); 8763 "Enables backlight control when 1, disables when 0");
8139 8764
8140module_param(hotkey_report_mode, uint, 0); 8765module_param(hotkey_report_mode, uint, 0444);
8141MODULE_PARM_DESC(hotkey_report_mode, 8766MODULE_PARM_DESC(hotkey_report_mode,
8142 "used for backwards compatibility with userspace, " 8767 "used for backwards compatibility with userspace, "
8143 "see documentation"); 8768 "see documentation");
8144 8769
8770#ifdef CONFIG_THINKPAD_ACPI_ALSA_SUPPORT
8771module_param_named(volume_mode, volume_mode, uint, 0444);
8772MODULE_PARM_DESC(volume_mode,
8773 "Selects volume control strategy: "
8774 "0=auto, 1=EC, 2=N/A, 3=EC+NVRAM");
8775
8776module_param_named(volume_capabilities, volume_capabilities, uint, 0444);
8777MODULE_PARM_DESC(volume_capabilities,
8778 "Selects the mixer capabilites: "
8779 "0=auto, 1=volume and mute, 2=mute only");
8780
8781module_param_named(volume_control, volume_control_allowed, bool, 0444);
8782MODULE_PARM_DESC(volume_control,
8783 "Enables software override for the console audio "
8784 "control when true");
8785
8786/* ALSA module API parameters */
8787module_param_named(index, alsa_index, int, 0444);
8788MODULE_PARM_DESC(index, "ALSA index for the ACPI EC Mixer");
8789module_param_named(id, alsa_id, charp, 0444);
8790MODULE_PARM_DESC(id, "ALSA id for the ACPI EC Mixer");
8791module_param_named(enable, alsa_enable, bool, 0444);
8792MODULE_PARM_DESC(enable, "Enable the ALSA interface for the ACPI EC Mixer");
8793#endif /* CONFIG_THINKPAD_ACPI_ALSA_SUPPORT */
8794
8145#define TPACPI_PARAM(feature) \ 8795#define TPACPI_PARAM(feature) \
8146 module_param_call(feature, set_ibm_param, NULL, NULL, 0); \ 8796 module_param_call(feature, set_ibm_param, NULL, NULL, 0); \
8147 MODULE_PARM_DESC(feature, "Simulates thinkpad-acpi procfs command " \ 8797 MODULE_PARM_DESC(feature, "Simulates thinkpad-acpi procfs command " \
@@ -8160,25 +8810,25 @@ TPACPI_PARAM(volume);
8160TPACPI_PARAM(fan); 8810TPACPI_PARAM(fan);
8161 8811
8162#ifdef CONFIG_THINKPAD_ACPI_DEBUGFACILITIES 8812#ifdef CONFIG_THINKPAD_ACPI_DEBUGFACILITIES
8163module_param(dbg_wlswemul, uint, 0); 8813module_param(dbg_wlswemul, uint, 0444);
8164MODULE_PARM_DESC(dbg_wlswemul, "Enables WLSW emulation"); 8814MODULE_PARM_DESC(dbg_wlswemul, "Enables WLSW emulation");
8165module_param_named(wlsw_state, tpacpi_wlsw_emulstate, bool, 0); 8815module_param_named(wlsw_state, tpacpi_wlsw_emulstate, bool, 0);
8166MODULE_PARM_DESC(wlsw_state, 8816MODULE_PARM_DESC(wlsw_state,
8167 "Initial state of the emulated WLSW switch"); 8817 "Initial state of the emulated WLSW switch");
8168 8818
8169module_param(dbg_bluetoothemul, uint, 0); 8819module_param(dbg_bluetoothemul, uint, 0444);
8170MODULE_PARM_DESC(dbg_bluetoothemul, "Enables bluetooth switch emulation"); 8820MODULE_PARM_DESC(dbg_bluetoothemul, "Enables bluetooth switch emulation");
8171module_param_named(bluetooth_state, tpacpi_bluetooth_emulstate, bool, 0); 8821module_param_named(bluetooth_state, tpacpi_bluetooth_emulstate, bool, 0);
8172MODULE_PARM_DESC(bluetooth_state, 8822MODULE_PARM_DESC(bluetooth_state,
8173 "Initial state of the emulated bluetooth switch"); 8823 "Initial state of the emulated bluetooth switch");
8174 8824
8175module_param(dbg_wwanemul, uint, 0); 8825module_param(dbg_wwanemul, uint, 0444);
8176MODULE_PARM_DESC(dbg_wwanemul, "Enables WWAN switch emulation"); 8826MODULE_PARM_DESC(dbg_wwanemul, "Enables WWAN switch emulation");
8177module_param_named(wwan_state, tpacpi_wwan_emulstate, bool, 0); 8827module_param_named(wwan_state, tpacpi_wwan_emulstate, bool, 0);
8178MODULE_PARM_DESC(wwan_state, 8828MODULE_PARM_DESC(wwan_state,
8179 "Initial state of the emulated WWAN switch"); 8829 "Initial state of the emulated WWAN switch");
8180 8830
8181module_param(dbg_uwbemul, uint, 0); 8831module_param(dbg_uwbemul, uint, 0444);
8182MODULE_PARM_DESC(dbg_uwbemul, "Enables UWB switch emulation"); 8832MODULE_PARM_DESC(dbg_uwbemul, "Enables UWB switch emulation");
8183module_param_named(uwb_state, tpacpi_uwb_emulstate, bool, 0); 8833module_param_named(uwb_state, tpacpi_uwb_emulstate, bool, 0);
8184MODULE_PARM_DESC(uwb_state, 8834MODULE_PARM_DESC(uwb_state,
@@ -8371,6 +9021,7 @@ static int __init thinkpad_acpi_module_init(void)
8371 PCI_VENDOR_ID_IBM; 9021 PCI_VENDOR_ID_IBM;
8372 tpacpi_inputdev->id.product = TPACPI_HKEY_INPUT_PRODUCT; 9022 tpacpi_inputdev->id.product = TPACPI_HKEY_INPUT_PRODUCT;
8373 tpacpi_inputdev->id.version = TPACPI_HKEY_INPUT_VERSION; 9023 tpacpi_inputdev->id.version = TPACPI_HKEY_INPUT_VERSION;
9024 tpacpi_inputdev->dev.parent = &tpacpi_pdev->dev;
8374 } 9025 }
8375 for (i = 0; i < ARRAY_SIZE(ibms_init); i++) { 9026 for (i = 0; i < ARRAY_SIZE(ibms_init); i++) {
8376 ret = ibm_init(&ibms_init[i]); 9027 ret = ibm_init(&ibms_init[i]);
diff --git a/drivers/platform/x86/toshiba_acpi.c b/drivers/platform/x86/toshiba_acpi.c
index 51c0a8bee414..77bf5d8f893a 100644
--- a/drivers/platform/x86/toshiba_acpi.c
+++ b/drivers/platform/x86/toshiba_acpi.c
@@ -42,6 +42,7 @@
42#include <linux/init.h> 42#include <linux/init.h>
43#include <linux/types.h> 43#include <linux/types.h>
44#include <linux/proc_fs.h> 44#include <linux/proc_fs.h>
45#include <linux/seq_file.h>
45#include <linux/backlight.h> 46#include <linux/backlight.h>
46#include <linux/platform_device.h> 47#include <linux/platform_device.h>
47#include <linux/rfkill.h> 48#include <linux/rfkill.h>
@@ -357,63 +358,6 @@ static int force_fan;
357static int last_key_event; 358static int last_key_event;
358static int key_event_valid; 359static int key_event_valid;
359 360
360typedef struct _ProcItem {
361 const char *name;
362 char *(*read_func) (char *);
363 unsigned long (*write_func) (const char *, unsigned long);
364} ProcItem;
365
366/* proc file handlers
367 */
368
369static int
370dispatch_read(char *page, char **start, off_t off, int count, int *eof,
371 ProcItem * item)
372{
373 char *p = page;
374 int len;
375
376 if (off == 0)
377 p = item->read_func(p);
378
379 /* ISSUE: I don't understand this code */
380 len = (p - page);
381 if (len <= off + count)
382 *eof = 1;
383 *start = page + off;
384 len -= off;
385 if (len > count)
386 len = count;
387 if (len < 0)
388 len = 0;
389 return len;
390}
391
392static int
393dispatch_write(struct file *file, const char __user * buffer,
394 unsigned long count, ProcItem * item)
395{
396 int result;
397 char *tmp_buffer;
398
399 /* Arg buffer points to userspace memory, which can't be accessed
400 * directly. Since we're making a copy, zero-terminate the
401 * destination so that sscanf can be used on it safely.
402 */
403 tmp_buffer = kmalloc(count + 1, GFP_KERNEL);
404 if (!tmp_buffer)
405 return -ENOMEM;
406
407 if (copy_from_user(tmp_buffer, buffer, count)) {
408 result = -EFAULT;
409 } else {
410 tmp_buffer[count] = 0;
411 result = item->write_func(tmp_buffer, count);
412 }
413 kfree(tmp_buffer);
414 return result;
415}
416
417static int get_lcd(struct backlight_device *bd) 361static int get_lcd(struct backlight_device *bd)
418{ 362{
419 u32 hci_result; 363 u32 hci_result;
@@ -426,19 +370,24 @@ static int get_lcd(struct backlight_device *bd)
426 return -EFAULT; 370 return -EFAULT;
427} 371}
428 372
429static char *read_lcd(char *p) 373static int lcd_proc_show(struct seq_file *m, void *v)
430{ 374{
431 int value = get_lcd(NULL); 375 int value = get_lcd(NULL);
432 376
433 if (value >= 0) { 377 if (value >= 0) {
434 p += sprintf(p, "brightness: %d\n", value); 378 seq_printf(m, "brightness: %d\n", value);
435 p += sprintf(p, "brightness_levels: %d\n", 379 seq_printf(m, "brightness_levels: %d\n",
436 HCI_LCD_BRIGHTNESS_LEVELS); 380 HCI_LCD_BRIGHTNESS_LEVELS);
437 } else { 381 } else {
438 printk(MY_ERR "Error reading LCD brightness\n"); 382 printk(MY_ERR "Error reading LCD brightness\n");
439 } 383 }
440 384
441 return p; 385 return 0;
386}
387
388static int lcd_proc_open(struct inode *inode, struct file *file)
389{
390 return single_open(file, lcd_proc_show, NULL);
442} 391}
443 392
444static int set_lcd(int value) 393static int set_lcd(int value)
@@ -458,12 +407,20 @@ static int set_lcd_status(struct backlight_device *bd)
458 return set_lcd(bd->props.brightness); 407 return set_lcd(bd->props.brightness);
459} 408}
460 409
461static unsigned long write_lcd(const char *buffer, unsigned long count) 410static ssize_t lcd_proc_write(struct file *file, const char __user *buf,
411 size_t count, loff_t *pos)
462{ 412{
413 char cmd[42];
414 size_t len;
463 int value; 415 int value;
464 int ret; 416 int ret;
465 417
466 if (sscanf(buffer, " brightness : %i", &value) == 1 && 418 len = min(count, sizeof(cmd) - 1);
419 if (copy_from_user(cmd, buf, len))
420 return -EFAULT;
421 cmd[len] = '\0';
422
423 if (sscanf(cmd, " brightness : %i", &value) == 1 &&
467 value >= 0 && value < HCI_LCD_BRIGHTNESS_LEVELS) { 424 value >= 0 && value < HCI_LCD_BRIGHTNESS_LEVELS) {
468 ret = set_lcd(value); 425 ret = set_lcd(value);
469 if (ret == 0) 426 if (ret == 0)
@@ -474,7 +431,16 @@ static unsigned long write_lcd(const char *buffer, unsigned long count)
474 return ret; 431 return ret;
475} 432}
476 433
477static char *read_video(char *p) 434static const struct file_operations lcd_proc_fops = {
435 .owner = THIS_MODULE,
436 .open = lcd_proc_open,
437 .read = seq_read,
438 .llseek = seq_lseek,
439 .release = single_release,
440 .write = lcd_proc_write,
441};
442
443static int video_proc_show(struct seq_file *m, void *v)
478{ 444{
479 u32 hci_result; 445 u32 hci_result;
480 u32 value; 446 u32 value;
@@ -484,18 +450,25 @@ static char *read_video(char *p)
484 int is_lcd = (value & HCI_VIDEO_OUT_LCD) ? 1 : 0; 450 int is_lcd = (value & HCI_VIDEO_OUT_LCD) ? 1 : 0;
485 int is_crt = (value & HCI_VIDEO_OUT_CRT) ? 1 : 0; 451 int is_crt = (value & HCI_VIDEO_OUT_CRT) ? 1 : 0;
486 int is_tv = (value & HCI_VIDEO_OUT_TV) ? 1 : 0; 452 int is_tv = (value & HCI_VIDEO_OUT_TV) ? 1 : 0;
487 p += sprintf(p, "lcd_out: %d\n", is_lcd); 453 seq_printf(m, "lcd_out: %d\n", is_lcd);
488 p += sprintf(p, "crt_out: %d\n", is_crt); 454 seq_printf(m, "crt_out: %d\n", is_crt);
489 p += sprintf(p, "tv_out: %d\n", is_tv); 455 seq_printf(m, "tv_out: %d\n", is_tv);
490 } else { 456 } else {
491 printk(MY_ERR "Error reading video out status\n"); 457 printk(MY_ERR "Error reading video out status\n");
492 } 458 }
493 459
494 return p; 460 return 0;
495} 461}
496 462
497static unsigned long write_video(const char *buffer, unsigned long count) 463static int video_proc_open(struct inode *inode, struct file *file)
498{ 464{
465 return single_open(file, video_proc_show, NULL);
466}
467
468static ssize_t video_proc_write(struct file *file, const char __user *buf,
469 size_t count, loff_t *pos)
470{
471 char *cmd, *buffer;
499 int value; 472 int value;
500 int remain = count; 473 int remain = count;
501 int lcd_out = -1; 474 int lcd_out = -1;
@@ -504,6 +477,17 @@ static unsigned long write_video(const char *buffer, unsigned long count)
504 u32 hci_result; 477 u32 hci_result;
505 u32 video_out; 478 u32 video_out;
506 479
480 cmd = kmalloc(count + 1, GFP_KERNEL);
481 if (!cmd)
482 return -ENOMEM;
483 if (copy_from_user(cmd, buf, count)) {
484 kfree(cmd);
485 return -EFAULT;
486 }
487 cmd[count] = '\0';
488
489 buffer = cmd;
490
507 /* scan expression. Multiple expressions may be delimited with ; 491 /* scan expression. Multiple expressions may be delimited with ;
508 * 492 *
509 * NOTE: to keep scanning simple, invalid fields are ignored 493 * NOTE: to keep scanning simple, invalid fields are ignored
@@ -523,6 +507,8 @@ static unsigned long write_video(const char *buffer, unsigned long count)
523 while (remain && *(buffer - 1) != ';'); 507 while (remain && *(buffer - 1) != ';');
524 } 508 }
525 509
510 kfree(cmd);
511
526 hci_read1(HCI_VIDEO_OUT, &video_out, &hci_result); 512 hci_read1(HCI_VIDEO_OUT, &video_out, &hci_result);
527 if (hci_result == HCI_SUCCESS) { 513 if (hci_result == HCI_SUCCESS) {
528 unsigned int new_video_out = video_out; 514 unsigned int new_video_out = video_out;
@@ -543,28 +529,50 @@ static unsigned long write_video(const char *buffer, unsigned long count)
543 return count; 529 return count;
544} 530}
545 531
546static char *read_fan(char *p) 532static const struct file_operations video_proc_fops = {
533 .owner = THIS_MODULE,
534 .open = video_proc_open,
535 .read = seq_read,
536 .llseek = seq_lseek,
537 .release = single_release,
538 .write = video_proc_write,
539};
540
541static int fan_proc_show(struct seq_file *m, void *v)
547{ 542{
548 u32 hci_result; 543 u32 hci_result;
549 u32 value; 544 u32 value;
550 545
551 hci_read1(HCI_FAN, &value, &hci_result); 546 hci_read1(HCI_FAN, &value, &hci_result);
552 if (hci_result == HCI_SUCCESS) { 547 if (hci_result == HCI_SUCCESS) {
553 p += sprintf(p, "running: %d\n", (value > 0)); 548 seq_printf(m, "running: %d\n", (value > 0));
554 p += sprintf(p, "force_on: %d\n", force_fan); 549 seq_printf(m, "force_on: %d\n", force_fan);
555 } else { 550 } else {
556 printk(MY_ERR "Error reading fan status\n"); 551 printk(MY_ERR "Error reading fan status\n");
557 } 552 }
558 553
559 return p; 554 return 0;
555}
556
557static int fan_proc_open(struct inode *inode, struct file *file)
558{
559 return single_open(file, fan_proc_show, NULL);
560} 560}
561 561
562static unsigned long write_fan(const char *buffer, unsigned long count) 562static ssize_t fan_proc_write(struct file *file, const char __user *buf,
563 size_t count, loff_t *pos)
563{ 564{
565 char cmd[42];
566 size_t len;
564 int value; 567 int value;
565 u32 hci_result; 568 u32 hci_result;
566 569
567 if (sscanf(buffer, " force_on : %i", &value) == 1 && 570 len = min(count, sizeof(cmd) - 1);
571 if (copy_from_user(cmd, buf, len))
572 return -EFAULT;
573 cmd[len] = '\0';
574
575 if (sscanf(cmd, " force_on : %i", &value) == 1 &&
568 value >= 0 && value <= 1) { 576 value >= 0 && value <= 1) {
569 hci_write1(HCI_FAN, value, &hci_result); 577 hci_write1(HCI_FAN, value, &hci_result);
570 if (hci_result != HCI_SUCCESS) 578 if (hci_result != HCI_SUCCESS)
@@ -578,7 +586,16 @@ static unsigned long write_fan(const char *buffer, unsigned long count)
578 return count; 586 return count;
579} 587}
580 588
581static char *read_keys(char *p) 589static const struct file_operations fan_proc_fops = {
590 .owner = THIS_MODULE,
591 .open = fan_proc_open,
592 .read = seq_read,
593 .llseek = seq_lseek,
594 .release = single_release,
595 .write = fan_proc_write,
596};
597
598static int keys_proc_show(struct seq_file *m, void *v)
582{ 599{
583 u32 hci_result; 600 u32 hci_result;
584 u32 value; 601 u32 value;
@@ -602,18 +619,30 @@ static char *read_keys(char *p)
602 } 619 }
603 } 620 }
604 621
605 p += sprintf(p, "hotkey_ready: %d\n", key_event_valid); 622 seq_printf(m, "hotkey_ready: %d\n", key_event_valid);
606 p += sprintf(p, "hotkey: 0x%04x\n", last_key_event); 623 seq_printf(m, "hotkey: 0x%04x\n", last_key_event);
624end:
625 return 0;
626}
607 627
608 end: 628static int keys_proc_open(struct inode *inode, struct file *file)
609 return p; 629{
630 return single_open(file, keys_proc_show, NULL);
610} 631}
611 632
612static unsigned long write_keys(const char *buffer, unsigned long count) 633static ssize_t keys_proc_write(struct file *file, const char __user *buf,
634 size_t count, loff_t *pos)
613{ 635{
636 char cmd[42];
637 size_t len;
614 int value; 638 int value;
615 639
616 if (sscanf(buffer, " hotkey_ready : %i", &value) == 1 && value == 0) { 640 len = min(count, sizeof(cmd) - 1);
641 if (copy_from_user(cmd, buf, len))
642 return -EFAULT;
643 cmd[len] = '\0';
644
645 if (sscanf(cmd, " hotkey_ready : %i", &value) == 1 && value == 0) {
617 key_event_valid = 0; 646 key_event_valid = 0;
618 } else { 647 } else {
619 return -EINVAL; 648 return -EINVAL;
@@ -622,52 +651,58 @@ static unsigned long write_keys(const char *buffer, unsigned long count)
622 return count; 651 return count;
623} 652}
624 653
625static char *read_version(char *p) 654static const struct file_operations keys_proc_fops = {
655 .owner = THIS_MODULE,
656 .open = keys_proc_open,
657 .read = seq_read,
658 .llseek = seq_lseek,
659 .release = single_release,
660 .write = keys_proc_write,
661};
662
663static int version_proc_show(struct seq_file *m, void *v)
626{ 664{
627 p += sprintf(p, "driver: %s\n", TOSHIBA_ACPI_VERSION); 665 seq_printf(m, "driver: %s\n", TOSHIBA_ACPI_VERSION);
628 p += sprintf(p, "proc_interface: %d\n", 666 seq_printf(m, "proc_interface: %d\n", PROC_INTERFACE_VERSION);
629 PROC_INTERFACE_VERSION); 667 return 0;
630 return p;
631} 668}
632 669
670static int version_proc_open(struct inode *inode, struct file *file)
671{
672 return single_open(file, version_proc_show, PDE(inode)->data);
673}
674
675static const struct file_operations version_proc_fops = {
676 .owner = THIS_MODULE,
677 .open = version_proc_open,
678 .read = seq_read,
679 .llseek = seq_lseek,
680 .release = single_release,
681};
682
633/* proc and module init 683/* proc and module init
634 */ 684 */
635 685
636#define PROC_TOSHIBA "toshiba" 686#define PROC_TOSHIBA "toshiba"
637 687
638static ProcItem proc_items[] = {
639 {"lcd", read_lcd, write_lcd},
640 {"video", read_video, write_video},
641 {"fan", read_fan, write_fan},
642 {"keys", read_keys, write_keys},
643 {"version", read_version, NULL},
644 {NULL}
645};
646
647static acpi_status __init add_device(void) 688static acpi_status __init add_device(void)
648{ 689{
649 struct proc_dir_entry *proc; 690 proc_create("lcd", S_IRUGO | S_IWUSR, toshiba_proc_dir, &lcd_proc_fops);
650 ProcItem *item; 691 proc_create("video", S_IRUGO | S_IWUSR, toshiba_proc_dir, &video_proc_fops);
651 692 proc_create("fan", S_IRUGO | S_IWUSR, toshiba_proc_dir, &fan_proc_fops);
652 for (item = proc_items; item->name; ++item) { 693 proc_create("keys", S_IRUGO | S_IWUSR, toshiba_proc_dir, &keys_proc_fops);
653 proc = create_proc_read_entry(item->name, 694 proc_create("version", S_IRUGO, toshiba_proc_dir, &version_proc_fops);
654 S_IFREG | S_IRUGO | S_IWUSR,
655 toshiba_proc_dir,
656 (read_proc_t *) dispatch_read,
657 item);
658 if (proc && item->write_func)
659 proc->write_proc = (write_proc_t *) dispatch_write;
660 }
661 695
662 return AE_OK; 696 return AE_OK;
663} 697}
664 698
665static acpi_status remove_device(void) 699static acpi_status remove_device(void)
666{ 700{
667 ProcItem *item; 701 remove_proc_entry("lcd", toshiba_proc_dir);
668 702 remove_proc_entry("video", toshiba_proc_dir);
669 for (item = proc_items; item->name; ++item) 703 remove_proc_entry("fan", toshiba_proc_dir);
670 remove_proc_entry(item->name, toshiba_proc_dir); 704 remove_proc_entry("keys", toshiba_proc_dir);
705 remove_proc_entry("version", toshiba_proc_dir);
671 return AE_OK; 706 return AE_OK;
672} 707}
673 708
diff --git a/drivers/platform/x86/toshiba_bluetooth.c b/drivers/platform/x86/toshiba_bluetooth.c
new file mode 100644
index 000000000000..a350418e87ea
--- /dev/null
+++ b/drivers/platform/x86/toshiba_bluetooth.c
@@ -0,0 +1,144 @@
1/*
2 * Toshiba Bluetooth Enable Driver
3 *
4 * Copyright (C) 2009 Jes Sorensen <Jes.Sorensen@gmail.com>
5 *
6 * Thanks to Matthew Garrett for background info on ACPI innards which
7 * normal people aren't meant to understand :-)
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 *
13 * Note the Toshiba Bluetooth RFKill switch seems to be a strange
14 * fish. It only provides a BT event when the switch is flipped to
15 * the 'on' position. When flipping it to 'off', the USB device is
16 * simply pulled away underneath us, without any BT event being
17 * delivered.
18 */
19
20#include <linux/kernel.h>
21#include <linux/module.h>
22#include <linux/init.h>
23#include <linux/types.h>
24#include <acpi/acpi_bus.h>
25#include <acpi/acpi_drivers.h>
26
27MODULE_AUTHOR("Jes Sorensen <Jes.Sorensen@gmail.com>");
28MODULE_DESCRIPTION("Toshiba Laptop ACPI Bluetooth Enable Driver");
29MODULE_LICENSE("GPL");
30
31
32static int toshiba_bt_rfkill_add(struct acpi_device *device);
33static int toshiba_bt_rfkill_remove(struct acpi_device *device, int type);
34static void toshiba_bt_rfkill_notify(struct acpi_device *device, u32 event);
35static int toshiba_bt_resume(struct acpi_device *device);
36
37static const struct acpi_device_id bt_device_ids[] = {
38 { "TOS6205", 0},
39 { "", 0},
40};
41MODULE_DEVICE_TABLE(acpi, bt_device_ids);
42
43static struct acpi_driver toshiba_bt_rfkill_driver = {
44 .name = "Toshiba BT",
45 .class = "Toshiba",
46 .ids = bt_device_ids,
47 .ops = {
48 .add = toshiba_bt_rfkill_add,
49 .remove = toshiba_bt_rfkill_remove,
50 .notify = toshiba_bt_rfkill_notify,
51 .resume = toshiba_bt_resume,
52 },
53 .owner = THIS_MODULE,
54};
55
56
57static int toshiba_bluetooth_enable(acpi_handle handle)
58{
59 acpi_status res1, res2;
60 acpi_integer result;
61
62 /*
63 * Query ACPI to verify RFKill switch is set to 'on'.
64 * If not, we return silently, no need to report it as
65 * an error.
66 */
67 res1 = acpi_evaluate_integer(handle, "BTST", NULL, &result);
68 if (ACPI_FAILURE(res1))
69 return res1;
70 if (!(result & 0x01))
71 return 0;
72
73 printk(KERN_INFO "toshiba_bluetooth: Re-enabling Toshiba Bluetooth\n");
74 res1 = acpi_evaluate_object(handle, "AUSB", NULL, NULL);
75 res2 = acpi_evaluate_object(handle, "BTPO", NULL, NULL);
76 if (!ACPI_FAILURE(res1) || !ACPI_FAILURE(res2))
77 return 0;
78
79 printk(KERN_WARNING "toshiba_bluetooth: Failed to re-enable "
80 "Toshiba Bluetooth\n");
81
82 return -ENODEV;
83}
84
85static void toshiba_bt_rfkill_notify(struct acpi_device *device, u32 event)
86{
87 toshiba_bluetooth_enable(device->handle);
88}
89
90static int toshiba_bt_resume(struct acpi_device *device)
91{
92 return toshiba_bluetooth_enable(device->handle);
93}
94
95static int toshiba_bt_rfkill_add(struct acpi_device *device)
96{
97 acpi_status status;
98 acpi_integer bt_present;
99 int result = -ENODEV;
100
101 /*
102 * Some Toshiba laptops may have a fake TOS6205 device in
103 * their ACPI BIOS, so query the _STA method to see if there
104 * is really anything there, before trying to enable it.
105 */
106 status = acpi_evaluate_integer(device->handle, "_STA", NULL,
107 &bt_present);
108
109 if (!ACPI_FAILURE(status) && bt_present) {
110 printk(KERN_INFO "Detected Toshiba ACPI Bluetooth device - "
111 "installing RFKill handler\n");
112 result = toshiba_bluetooth_enable(device->handle);
113 }
114
115 return result;
116}
117
118static int __init toshiba_bt_rfkill_init(void)
119{
120 int result;
121
122 result = acpi_bus_register_driver(&toshiba_bt_rfkill_driver);
123 if (result < 0) {
124 ACPI_DEBUG_PRINT((ACPI_DB_ERROR,
125 "Error registering driver\n"));
126 return result;
127 }
128
129 return 0;
130}
131
132static int toshiba_bt_rfkill_remove(struct acpi_device *device, int type)
133{
134 /* clean up */
135 return 0;
136}
137
138static void __exit toshiba_bt_rfkill_exit(void)
139{
140 acpi_bus_unregister_driver(&toshiba_bt_rfkill_driver);
141}
142
143module_init(toshiba_bt_rfkill_init);
144module_exit(toshiba_bt_rfkill_exit);
diff --git a/drivers/platform/x86/wmi.c b/drivers/platform/x86/wmi.c
index 177f8d767df4..b104302fea0a 100644
--- a/drivers/platform/x86/wmi.c
+++ b/drivers/platform/x86/wmi.c
@@ -30,6 +30,7 @@
30#include <linux/kernel.h> 30#include <linux/kernel.h>
31#include <linux/init.h> 31#include <linux/init.h>
32#include <linux/types.h> 32#include <linux/types.h>
33#include <linux/device.h>
33#include <linux/list.h> 34#include <linux/list.h>
34#include <linux/acpi.h> 35#include <linux/acpi.h>
35#include <acpi/acpi_bus.h> 36#include <acpi/acpi_bus.h>
@@ -65,6 +66,7 @@ struct wmi_block {
65 acpi_handle handle; 66 acpi_handle handle;
66 wmi_notify_handler handler; 67 wmi_notify_handler handler;
67 void *handler_data; 68 void *handler_data;
69 struct device *dev;
68}; 70};
69 71
70static struct wmi_block wmi_blocks; 72static struct wmi_block wmi_blocks;
@@ -195,6 +197,34 @@ static bool wmi_parse_guid(const u8 *src, u8 *dest)
195 return true; 197 return true;
196} 198}
197 199
200/*
201 * Convert a raw GUID to the ACII string representation
202 */
203static int wmi_gtoa(const char *in, char *out)
204{
205 int i;
206
207 for (i = 3; i >= 0; i--)
208 out += sprintf(out, "%02X", in[i] & 0xFF);
209
210 out += sprintf(out, "-");
211 out += sprintf(out, "%02X", in[5] & 0xFF);
212 out += sprintf(out, "%02X", in[4] & 0xFF);
213 out += sprintf(out, "-");
214 out += sprintf(out, "%02X", in[7] & 0xFF);
215 out += sprintf(out, "%02X", in[6] & 0xFF);
216 out += sprintf(out, "-");
217 out += sprintf(out, "%02X", in[8] & 0xFF);
218 out += sprintf(out, "%02X", in[9] & 0xFF);
219 out += sprintf(out, "-");
220
221 for (i = 10; i <= 15; i++)
222 out += sprintf(out, "%02X", in[i] & 0xFF);
223
224 out = '\0';
225 return 0;
226}
227
198static bool find_guid(const char *guid_string, struct wmi_block **out) 228static bool find_guid(const char *guid_string, struct wmi_block **out)
199{ 229{
200 char tmp[16], guid_input[16]; 230 char tmp[16], guid_input[16];
@@ -462,8 +492,7 @@ wmi_notify_handler handler, void *data)
462 if (!guid || !handler) 492 if (!guid || !handler)
463 return AE_BAD_PARAMETER; 493 return AE_BAD_PARAMETER;
464 494
465 find_guid(guid, &block); 495 if (!find_guid(guid, &block))
466 if (!block)
467 return AE_NOT_EXIST; 496 return AE_NOT_EXIST;
468 497
469 if (block->handler) 498 if (block->handler)
@@ -491,8 +520,7 @@ acpi_status wmi_remove_notify_handler(const char *guid)
491 if (!guid) 520 if (!guid)
492 return AE_BAD_PARAMETER; 521 return AE_BAD_PARAMETER;
493 522
494 find_guid(guid, &block); 523 if (!find_guid(guid, &block))
495 if (!block)
496 return AE_NOT_EXIST; 524 return AE_NOT_EXIST;
497 525
498 if (!block->handler) 526 if (!block->handler)
@@ -510,8 +538,8 @@ EXPORT_SYMBOL_GPL(wmi_remove_notify_handler);
510/** 538/**
511 * wmi_get_event_data - Get WMI data associated with an event 539 * wmi_get_event_data - Get WMI data associated with an event
512 * 540 *
513 * @event - Event to find 541 * @event: Event to find
514 * &out - Buffer to hold event data 542 * @out: Buffer to hold event data. out->pointer should be freed with kfree()
515 * 543 *
516 * Returns extra data associated with an event in WMI. 544 * Returns extra data associated with an event in WMI.
517 */ 545 */
@@ -555,6 +583,154 @@ bool wmi_has_guid(const char *guid_string)
555EXPORT_SYMBOL_GPL(wmi_has_guid); 583EXPORT_SYMBOL_GPL(wmi_has_guid);
556 584
557/* 585/*
586 * sysfs interface
587 */
588static ssize_t show_modalias(struct device *dev, struct device_attribute *attr,
589 char *buf)
590{
591 char guid_string[37];
592 struct wmi_block *wblock;
593
594 wblock = dev_get_drvdata(dev);
595 if (!wblock)
596 return -ENOMEM;
597
598 wmi_gtoa(wblock->gblock.guid, guid_string);
599
600 return sprintf(buf, "wmi:%s\n", guid_string);
601}
602static DEVICE_ATTR(modalias, S_IRUGO, show_modalias, NULL);
603
604static int wmi_dev_uevent(struct device *dev, struct kobj_uevent_env *env)
605{
606 char guid_string[37];
607
608 struct wmi_block *wblock;
609
610 if (add_uevent_var(env, "MODALIAS="))
611 return -ENOMEM;
612
613 wblock = dev_get_drvdata(dev);
614 if (!wblock)
615 return -ENOMEM;
616
617 wmi_gtoa(wblock->gblock.guid, guid_string);
618
619 strcpy(&env->buf[env->buflen - 1], "wmi:");
620 memcpy(&env->buf[env->buflen - 1 + 4], guid_string, 36);
621 env->buflen += 40;
622
623 return 0;
624}
625
626static void wmi_dev_free(struct device *dev)
627{
628 kfree(dev);
629}
630
631static struct class wmi_class = {
632 .name = "wmi",
633 .dev_release = wmi_dev_free,
634 .dev_uevent = wmi_dev_uevent,
635};
636
637static int wmi_create_devs(void)
638{
639 int result;
640 char guid_string[37];
641 struct guid_block *gblock;
642 struct wmi_block *wblock;
643 struct list_head *p;
644 struct device *guid_dev;
645
646 /* Create devices for all the GUIDs */
647 list_for_each(p, &wmi_blocks.list) {
648 wblock = list_entry(p, struct wmi_block, list);
649
650 guid_dev = kzalloc(sizeof(struct device), GFP_KERNEL);
651 if (!guid_dev)
652 return -ENOMEM;
653
654 wblock->dev = guid_dev;
655
656 guid_dev->class = &wmi_class;
657 dev_set_drvdata(guid_dev, wblock);
658
659 gblock = &wblock->gblock;
660
661 wmi_gtoa(gblock->guid, guid_string);
662 dev_set_name(guid_dev, guid_string);
663
664 result = device_register(guid_dev);
665 if (result)
666 return result;
667
668 result = device_create_file(guid_dev, &dev_attr_modalias);
669 if (result)
670 return result;
671 }
672
673 return 0;
674}
675
676static void wmi_remove_devs(void)
677{
678 struct guid_block *gblock;
679 struct wmi_block *wblock;
680 struct list_head *p;
681 struct device *guid_dev;
682
683 /* Delete devices for all the GUIDs */
684 list_for_each(p, &wmi_blocks.list) {
685 wblock = list_entry(p, struct wmi_block, list);
686
687 guid_dev = wblock->dev;
688 gblock = &wblock->gblock;
689
690 device_remove_file(guid_dev, &dev_attr_modalias);
691
692 device_unregister(guid_dev);
693 }
694}
695
696static void wmi_class_exit(void)
697{
698 wmi_remove_devs();
699 class_unregister(&wmi_class);
700}
701
702static int wmi_class_init(void)
703{
704 int ret;
705
706 ret = class_register(&wmi_class);
707 if (ret)
708 return ret;
709
710 ret = wmi_create_devs();
711 if (ret)
712 wmi_class_exit();
713
714 return ret;
715}
716
717static bool guid_already_parsed(const char *guid_string)
718{
719 struct guid_block *gblock;
720 struct wmi_block *wblock;
721 struct list_head *p;
722
723 list_for_each(p, &wmi_blocks.list) {
724 wblock = list_entry(p, struct wmi_block, list);
725 gblock = &wblock->gblock;
726
727 if (strncmp(gblock->guid, guid_string, 16) == 0)
728 return true;
729 }
730 return false;
731}
732
733/*
558 * Parse the _WDG method for the GUID data blocks 734 * Parse the _WDG method for the GUID data blocks
559 */ 735 */
560static __init acpi_status parse_wdg(acpi_handle handle) 736static __init acpi_status parse_wdg(acpi_handle handle)
@@ -563,6 +739,7 @@ static __init acpi_status parse_wdg(acpi_handle handle)
563 union acpi_object *obj; 739 union acpi_object *obj;
564 struct guid_block *gblock; 740 struct guid_block *gblock;
565 struct wmi_block *wblock; 741 struct wmi_block *wblock;
742 char guid_string[37];
566 acpi_status status; 743 acpi_status status;
567 u32 i, total; 744 u32 i, total;
568 745
@@ -585,6 +762,19 @@ static __init acpi_status parse_wdg(acpi_handle handle)
585 memcpy(gblock, obj->buffer.pointer, obj->buffer.length); 762 memcpy(gblock, obj->buffer.pointer, obj->buffer.length);
586 763
587 for (i = 0; i < total; i++) { 764 for (i = 0; i < total; i++) {
765 /*
766 Some WMI devices, like those for nVidia hooks, have a
767 duplicate GUID. It's not clear what we should do in this
768 case yet, so for now, we'll just ignore the duplicate.
769 Anyone who wants to add support for that device can come
770 up with a better workaround for the mess then.
771 */
772 if (guid_already_parsed(gblock[i].guid) == true) {
773 wmi_gtoa(gblock[i].guid, guid_string);
774 printk(KERN_INFO PREFIX "Skipping duplicate GUID %s\n",
775 guid_string);
776 continue;
777 }
588 wblock = kzalloc(sizeof(struct wmi_block), GFP_KERNEL); 778 wblock = kzalloc(sizeof(struct wmi_block), GFP_KERNEL);
589 if (!wblock) 779 if (!wblock)
590 return AE_NO_MEMORY; 780 return AE_NO_MEMORY;
@@ -709,10 +899,17 @@ static int __init acpi_wmi_init(void)
709 899
710 if (result < 0) { 900 if (result < 0) {
711 printk(KERN_INFO PREFIX "Error loading mapper\n"); 901 printk(KERN_INFO PREFIX "Error loading mapper\n");
712 } else { 902 return -ENODEV;
713 printk(KERN_INFO PREFIX "Mapper loaded\n"); 903 }
904
905 result = wmi_class_init();
906 if (result) {
907 acpi_bus_unregister_driver(&acpi_wmi_driver);
908 return result;
714 } 909 }
715 910
911 printk(KERN_INFO PREFIX "Mapper loaded\n");
912
716 return result; 913 return result;
717} 914}
718 915
@@ -721,6 +918,8 @@ static void __exit acpi_wmi_exit(void)
721 struct list_head *p, *tmp; 918 struct list_head *p, *tmp;
722 struct wmi_block *wblock; 919 struct wmi_block *wblock;
723 920
921 wmi_class_exit();
922
724 acpi_bus_unregister_driver(&acpi_wmi_driver); 923 acpi_bus_unregister_driver(&acpi_wmi_driver);
725 924
726 list_for_each_safe(p, tmp, &wmi_blocks.list) { 925 list_for_each_safe(p, tmp, &wmi_blocks.list) {
diff --git a/drivers/pnp/pnpacpi/core.c b/drivers/pnp/pnpacpi/core.c
index 83b8b5ac49c9..5314bf630bc4 100644
--- a/drivers/pnp/pnpacpi/core.c
+++ b/drivers/pnp/pnpacpi/core.c
@@ -80,7 +80,8 @@ static int pnpacpi_get_resources(struct pnp_dev *dev)
80 80
81static int pnpacpi_set_resources(struct pnp_dev *dev) 81static int pnpacpi_set_resources(struct pnp_dev *dev)
82{ 82{
83 acpi_handle handle = dev->data; 83 struct acpi_device *acpi_dev = dev->data;
84 acpi_handle handle = acpi_dev->handle;
84 struct acpi_buffer buffer; 85 struct acpi_buffer buffer;
85 int ret; 86 int ret;
86 87
@@ -103,7 +104,8 @@ static int pnpacpi_set_resources(struct pnp_dev *dev)
103 104
104static int pnpacpi_disable_resources(struct pnp_dev *dev) 105static int pnpacpi_disable_resources(struct pnp_dev *dev)
105{ 106{
106 acpi_handle handle = dev->data; 107 struct acpi_device *acpi_dev = dev->data;
108 acpi_handle handle = acpi_dev->handle;
107 int ret; 109 int ret;
108 110
109 dev_dbg(&dev->dev, "disable resources\n"); 111 dev_dbg(&dev->dev, "disable resources\n");
@@ -121,6 +123,8 @@ static int pnpacpi_disable_resources(struct pnp_dev *dev)
121#ifdef CONFIG_ACPI_SLEEP 123#ifdef CONFIG_ACPI_SLEEP
122static int pnpacpi_suspend(struct pnp_dev *dev, pm_message_t state) 124static int pnpacpi_suspend(struct pnp_dev *dev, pm_message_t state)
123{ 125{
126 struct acpi_device *acpi_dev = dev->data;
127 acpi_handle handle = acpi_dev->handle;
124 int power_state; 128 int power_state;
125 129
126 power_state = acpi_pm_device_sleep_state(&dev->dev, NULL); 130 power_state = acpi_pm_device_sleep_state(&dev->dev, NULL);
@@ -128,16 +132,19 @@ static int pnpacpi_suspend(struct pnp_dev *dev, pm_message_t state)
128 power_state = (state.event == PM_EVENT_ON) ? 132 power_state = (state.event == PM_EVENT_ON) ?
129 ACPI_STATE_D0 : ACPI_STATE_D3; 133 ACPI_STATE_D0 : ACPI_STATE_D3;
130 134
131 return acpi_bus_set_power((acpi_handle) dev->data, power_state); 135 return acpi_bus_set_power(handle, power_state);
132} 136}
133 137
134static int pnpacpi_resume(struct pnp_dev *dev) 138static int pnpacpi_resume(struct pnp_dev *dev)
135{ 139{
136 return acpi_bus_set_power((acpi_handle) dev->data, ACPI_STATE_D0); 140 struct acpi_device *acpi_dev = dev->data;
141 acpi_handle handle = acpi_dev->handle;
142
143 return acpi_bus_set_power(handle, ACPI_STATE_D0);
137} 144}
138#endif 145#endif
139 146
140static struct pnp_protocol pnpacpi_protocol = { 147struct pnp_protocol pnpacpi_protocol = {
141 .name = "Plug and Play ACPI", 148 .name = "Plug and Play ACPI",
142 .get = pnpacpi_get_resources, 149 .get = pnpacpi_get_resources,
143 .set = pnpacpi_set_resources, 150 .set = pnpacpi_set_resources,
@@ -147,6 +154,7 @@ static struct pnp_protocol pnpacpi_protocol = {
147 .resume = pnpacpi_resume, 154 .resume = pnpacpi_resume,
148#endif 155#endif
149}; 156};
157EXPORT_SYMBOL(pnpacpi_protocol);
150 158
151static int __init pnpacpi_add_device(struct acpi_device *device) 159static int __init pnpacpi_add_device(struct acpi_device *device)
152{ 160{
@@ -168,7 +176,7 @@ static int __init pnpacpi_add_device(struct acpi_device *device)
168 if (!dev) 176 if (!dev)
169 return -ENOMEM; 177 return -ENOMEM;
170 178
171 dev->data = device->handle; 179 dev->data = device;
172 /* .enabled means the device can decode the resources */ 180 /* .enabled means the device can decode the resources */
173 dev->active = device->status.enabled; 181 dev->active = device->status.enabled;
174 status = acpi_get_handle(device->handle, "_SRS", &temp); 182 status = acpi_get_handle(device->handle, "_SRS", &temp);
diff --git a/drivers/pnp/pnpacpi/rsparser.c b/drivers/pnp/pnpacpi/rsparser.c
index ef3a2cd3a7a0..5702b2c8691f 100644
--- a/drivers/pnp/pnpacpi/rsparser.c
+++ b/drivers/pnp/pnpacpi/rsparser.c
@@ -465,7 +465,8 @@ static acpi_status pnpacpi_allocated_resource(struct acpi_resource *res,
465 465
466int pnpacpi_parse_allocated_resource(struct pnp_dev *dev) 466int pnpacpi_parse_allocated_resource(struct pnp_dev *dev)
467{ 467{
468 acpi_handle handle = dev->data; 468 struct acpi_device *acpi_dev = dev->data;
469 acpi_handle handle = acpi_dev->handle;
469 acpi_status status; 470 acpi_status status;
470 471
471 pnp_dbg(&dev->dev, "parse allocated resources\n"); 472 pnp_dbg(&dev->dev, "parse allocated resources\n");
@@ -773,7 +774,8 @@ static __init acpi_status pnpacpi_option_resource(struct acpi_resource *res,
773 774
774int __init pnpacpi_parse_resource_option_data(struct pnp_dev *dev) 775int __init pnpacpi_parse_resource_option_data(struct pnp_dev *dev)
775{ 776{
776 acpi_handle handle = dev->data; 777 struct acpi_device *acpi_dev = dev->data;
778 acpi_handle handle = acpi_dev->handle;
777 acpi_status status; 779 acpi_status status;
778 struct acpipnp_parse_option_s parse_data; 780 struct acpipnp_parse_option_s parse_data;
779 781
@@ -845,7 +847,8 @@ static acpi_status pnpacpi_type_resources(struct acpi_resource *res, void *data)
845int pnpacpi_build_resource_template(struct pnp_dev *dev, 847int pnpacpi_build_resource_template(struct pnp_dev *dev,
846 struct acpi_buffer *buffer) 848 struct acpi_buffer *buffer)
847{ 849{
848 acpi_handle handle = dev->data; 850 struct acpi_device *acpi_dev = dev->data;
851 acpi_handle handle = acpi_dev->handle;
849 struct acpi_resource *resource; 852 struct acpi_resource *resource;
850 int res_cnt = 0; 853 int res_cnt = 0;
851 acpi_status status; 854 acpi_status status;
diff --git a/drivers/power/pmu_battery.c b/drivers/power/pmu_battery.c
index 9346a862f1f2..9c87ad564803 100644
--- a/drivers/power/pmu_battery.c
+++ b/drivers/power/pmu_battery.c
@@ -89,6 +89,8 @@ static int pmu_bat_get_property(struct power_supply *psy,
89 case POWER_SUPPLY_PROP_STATUS: 89 case POWER_SUPPLY_PROP_STATUS:
90 if (pbi->flags & PMU_BATT_CHARGING) 90 if (pbi->flags & PMU_BATT_CHARGING)
91 val->intval = POWER_SUPPLY_STATUS_CHARGING; 91 val->intval = POWER_SUPPLY_STATUS_CHARGING;
92 else if (pmu_power_flags & PMU_PWR_AC_PRESENT)
93 val->intval = POWER_SUPPLY_STATUS_FULL;
92 else 94 else
93 val->intval = POWER_SUPPLY_STATUS_DISCHARGING; 95 val->intval = POWER_SUPPLY_STATUS_DISCHARGING;
94 break; 96 break;
diff --git a/drivers/power/wm97xx_battery.c b/drivers/power/wm97xx_battery.c
index fa39e759a275..6ea3cb5837c7 100644
--- a/drivers/power/wm97xx_battery.c
+++ b/drivers/power/wm97xx_battery.c
@@ -175,8 +175,14 @@ static int __devinit wm97xx_bat_probe(struct platform_device *dev)
175 dev_err(&dev->dev, "Do not pass platform_data through " 175 dev_err(&dev->dev, "Do not pass platform_data through "
176 "wm97xx_bat_set_pdata!\n"); 176 "wm97xx_bat_set_pdata!\n");
177 return -EINVAL; 177 return -EINVAL;
178 } else 178 }
179 pdata = wmdata->batt_pdata; 179
180 if (!wmdata) {
181 dev_err(&dev->dev, "No platform data supplied\n");
182 return -EINVAL;
183 }
184
185 pdata = wmdata->batt_pdata;
180 186
181 if (dev->id != -1) 187 if (dev->id != -1)
182 return -EINVAL; 188 return -EINVAL;
diff --git a/drivers/regulator/88pm8607.c b/drivers/regulator/88pm8607.c
new file mode 100644
index 000000000000..04719551381b
--- /dev/null
+++ b/drivers/regulator/88pm8607.c
@@ -0,0 +1,685 @@
1/*
2 * Regulators driver for Marvell 88PM8607
3 *
4 * Copyright (C) 2009 Marvell International Ltd.
5 * Haojian Zhuang <haojian.zhuang@marvell.com>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11#include <linux/kernel.h>
12#include <linux/init.h>
13#include <linux/err.h>
14#include <linux/platform_device.h>
15#include <linux/regulator/driver.h>
16#include <linux/regulator/machine.h>
17#include <linux/mfd/88pm8607.h>
18
19struct pm8607_regulator_info {
20 struct regulator_desc desc;
21 struct pm8607_chip *chip;
22 struct regulator_dev *regulator;
23
24 int min_uV;
25 int max_uV;
26 int step_uV;
27 int vol_reg;
28 int vol_shift;
29 int vol_nbits;
30 int update_reg;
31 int update_bit;
32 int enable_reg;
33 int enable_bit;
34 int slope_double;
35};
36
37static inline int check_range(struct pm8607_regulator_info *info,
38 int min_uV, int max_uV)
39{
40 if (max_uV < info->min_uV || min_uV > info->max_uV || min_uV > max_uV)
41 return -EINVAL;
42
43 return 0;
44}
45
46static int pm8607_list_voltage(struct regulator_dev *rdev, unsigned index)
47{
48 struct pm8607_regulator_info *info = rdev_get_drvdata(rdev);
49 uint8_t chip_id = info->chip->chip_id;
50 int ret = -EINVAL;
51
52 switch (info->desc.id) {
53 case PM8607_ID_BUCK1:
54 ret = (index < 0x1d) ? (index * 25000 + 800000) :
55 ((index < 0x20) ? 1500000 :
56 ((index < 0x40) ? ((index - 0x20) * 25000) :
57 -EINVAL));
58 break;
59 case PM8607_ID_BUCK3:
60 ret = (index < 0x3d) ? (index * 25000) :
61 ((index < 0x40) ? 1500000 : -EINVAL);
62 if (ret < 0)
63 break;
64 if (info->slope_double)
65 ret <<= 1;
66 break;
67 case PM8607_ID_LDO1:
68 ret = (index == 0) ? 1800000 :
69 ((index == 1) ? 1200000 :
70 ((index == 2) ? 2800000 : -EINVAL));
71 break;
72 case PM8607_ID_LDO5:
73 ret = (index == 0) ? 2900000 :
74 ((index == 1) ? 3000000 :
75 ((index == 2) ? 3100000 : 3300000));
76 break;
77 case PM8607_ID_LDO7:
78 case PM8607_ID_LDO8:
79 ret = (index < 3) ? (index * 50000 + 1800000) :
80 ((index < 8) ? (index * 50000 + 2550000) :
81 -EINVAL);
82 break;
83 case PM8607_ID_LDO12:
84 ret = (index < 2) ? (index * 100000 + 1800000) :
85 ((index < 7) ? (index * 100000 + 2500000) :
86 ((index == 7) ? 3300000 : 1200000));
87 break;
88 case PM8607_ID_LDO2:
89 case PM8607_ID_LDO3:
90 case PM8607_ID_LDO9:
91 switch (chip_id) {
92 case PM8607_CHIP_A0:
93 case PM8607_CHIP_A1:
94 ret = (index < 3) ? (index * 50000 + 1800000) :
95 ((index < 8) ? (index * 50000 + 2550000) :
96 -EINVAL);
97 break;
98 case PM8607_CHIP_B0:
99 ret = (index < 3) ? (index * 50000 + 1800000) :
100 ((index < 7) ? (index * 50000 + 2550000) :
101 3300000);
102 break;
103 }
104 break;
105 case PM8607_ID_LDO4:
106 switch (chip_id) {
107 case PM8607_CHIP_A0:
108 case PM8607_CHIP_A1:
109 ret = (index < 3) ? (index * 50000 + 1800000) :
110 ((index < 8) ? (index * 50000 + 2550000) :
111 -EINVAL);
112 break;
113 case PM8607_CHIP_B0:
114 ret = (index < 3) ? (index * 50000 + 1800000) :
115 ((index < 6) ? (index * 50000 + 2550000) :
116 ((index == 6) ? 2900000 : 3300000));
117 break;
118 }
119 break;
120 case PM8607_ID_LDO6:
121 switch (chip_id) {
122 case PM8607_CHIP_A0:
123 case PM8607_CHIP_A1:
124 ret = (index < 3) ? (index * 50000 + 1800000) :
125 ((index < 8) ? (index * 50000 + 2450000) :
126 -EINVAL);
127 break;
128 case PM8607_CHIP_B0:
129 ret = (index < 2) ? (index * 50000 + 1800000) :
130 ((index < 7) ? (index * 50000 + 2500000) :
131 3300000);
132 break;
133 }
134 break;
135 case PM8607_ID_LDO10:
136 switch (chip_id) {
137 case PM8607_CHIP_A0:
138 case PM8607_CHIP_A1:
139 ret = (index < 3) ? (index * 50000 + 1800000) :
140 ((index < 8) ? (index * 50000 + 2550000) :
141 1200000);
142 break;
143 case PM8607_CHIP_B0:
144 ret = (index < 3) ? (index * 50000 + 1800000) :
145 ((index < 7) ? (index * 50000 + 2550000) :
146 ((index == 7) ? 3300000 : 1200000));
147 break;
148 }
149 break;
150 case PM8607_ID_LDO14:
151 switch (chip_id) {
152 case PM8607_CHIP_A0:
153 case PM8607_CHIP_A1:
154 ret = (index < 3) ? (index * 50000 + 1800000) :
155 ((index < 8) ? (index * 50000 + 2550000) :
156 -EINVAL);
157 break;
158 case PM8607_CHIP_B0:
159 ret = (index < 2) ? (index * 50000 + 1800000) :
160 ((index < 7) ? (index * 50000 + 2600000) :
161 3300000);
162 break;
163 }
164 break;
165 }
166 return ret;
167}
168
169static int choose_voltage(struct regulator_dev *rdev, int min_uV, int max_uV)
170{
171 struct pm8607_regulator_info *info = rdev_get_drvdata(rdev);
172 uint8_t chip_id = info->chip->chip_id;
173 int val = -ENOENT;
174 int ret;
175
176 switch (info->desc.id) {
177 case PM8607_ID_BUCK1:
178 if (min_uV >= 800000) /* 800mV ~ 1500mV / 25mV */
179 val = (min_uV - 775001) / 25000;
180 else { /* 25mV ~ 775mV / 25mV */
181 val = (min_uV + 249999) / 25000;
182 val += 32;
183 }
184 break;
185 case PM8607_ID_BUCK3:
186 if (info->slope_double)
187 min_uV = min_uV >> 1;
188 val = (min_uV + 249999) / 25000; /* 0mV ~ 1500mV / 25mV */
189
190 break;
191 case PM8607_ID_LDO1:
192 if (min_uV > 1800000)
193 val = 2;
194 else if (min_uV > 1200000)
195 val = 0;
196 else
197 val = 1;
198 break;
199 case PM8607_ID_LDO5:
200 if (min_uV > 3100000)
201 val = 3;
202 else /* 2900mV ~ 3100mV / 100mV */
203 val = (min_uV - 2800001) / 100000;
204 break;
205 case PM8607_ID_LDO7:
206 case PM8607_ID_LDO8:
207 if (min_uV < 2700000) { /* 1800mV ~ 1900mV / 50mV */
208 if (min_uV <= 1800000)
209 val = 0; /* 1800mv */
210 else if (min_uV <= 1900000)
211 val = (min_uV - 1750001) / 50000;
212 else
213 val = 3; /* 2700mV */
214 } else { /* 2700mV ~ 2900mV / 50mV */
215 if (min_uV <= 2900000) {
216 val = (min_uV - 2650001) / 50000;
217 val += 3;
218 } else
219 val = -EINVAL;
220 }
221 break;
222 case PM8607_ID_LDO10:
223 if (min_uV > 2850000)
224 val = 7;
225 else if (min_uV <= 1200000)
226 val = 8;
227 else if (min_uV < 2700000) /* 1800mV ~ 1900mV / 50mV */
228 val = (min_uV - 1750001) / 50000;
229 else { /* 2700mV ~ 2850mV / 50mV */
230 val = (min_uV - 2650001) / 50000;
231 val += 3;
232 }
233 break;
234 case PM8607_ID_LDO12:
235 if (min_uV < 2700000) { /* 1800mV ~ 1900mV / 100mV */
236 if (min_uV <= 1200000)
237 val = 8; /* 1200mV */
238 else if (min_uV <= 1800000)
239 val = 0; /* 1800mV */
240 else if (min_uV <= 1900000)
241 val = (min_uV - 1700001) / 100000;
242 else
243 val = 2; /* 2700mV */
244 } else { /* 2700mV ~ 3100mV / 100mV */
245 if (min_uV <= 3100000) {
246 val = (min_uV - 2600001) / 100000;
247 val += 2;
248 } else if (min_uV <= 3300000)
249 val = 7;
250 else
251 val = -EINVAL;
252 }
253 break;
254 case PM8607_ID_LDO2:
255 case PM8607_ID_LDO3:
256 case PM8607_ID_LDO9:
257 switch (chip_id) {
258 case PM8607_CHIP_A0:
259 case PM8607_CHIP_A1:
260 if (min_uV < 2700000) /* 1800mV ~ 1900mV / 50mV */
261 if (min_uV <= 1800000)
262 val = 0;
263 else if (min_uV <= 1900000)
264 val = (min_uV - 1750001) / 50000;
265 else
266 val = 3; /* 2700mV */
267 else { /* 2700mV ~ 2900mV / 50mV */
268 if (min_uV <= 2900000) {
269 val = (min_uV - 2650001) / 50000;
270 val += 3;
271 } else
272 val = -EINVAL;
273 }
274 break;
275 case PM8607_CHIP_B0:
276 if (min_uV < 2700000) { /* 1800mV ~ 1900mV / 50mV */
277 if (min_uV <= 1800000)
278 val = 0;
279 else if (min_uV <= 1900000)
280 val = (min_uV - 1750001) / 50000;
281 else
282 val = 3; /* 2700mV */
283 } else { /* 2700mV ~ 2850mV / 50mV */
284 if (min_uV <= 2850000) {
285 val = (min_uV - 2650001) / 50000;
286 val += 3;
287 } else if (min_uV <= 3300000)
288 val = 7;
289 else
290 val = -EINVAL;
291 }
292 break;
293 }
294 break;
295 case PM8607_ID_LDO4:
296 switch (chip_id) {
297 case PM8607_CHIP_A0:
298 case PM8607_CHIP_A1:
299 if (min_uV < 2700000) /* 1800mV ~ 1900mV / 50mV */
300 if (min_uV <= 1800000)
301 val = 0;
302 else if (min_uV <= 1900000)
303 val = (min_uV - 1750001) / 50000;
304 else
305 val = 3; /* 2700mV */
306 else { /* 2700mV ~ 2900mV / 50mV */
307 if (min_uV <= 2900000) {
308 val = (min_uV - 2650001) / 50000;
309 val += 3;
310 } else
311 val = -EINVAL;
312 }
313 break;
314 case PM8607_CHIP_B0:
315 if (min_uV < 2700000) { /* 1800mV ~ 1900mV / 50mV */
316 if (min_uV <= 1800000)
317 val = 0;
318 else if (min_uV <= 1900000)
319 val = (min_uV - 1750001) / 50000;
320 else
321 val = 3; /* 2700mV */
322 } else { /* 2700mV ~ 2800mV / 50mV */
323 if (min_uV <= 2850000) {
324 val = (min_uV - 2650001) / 50000;
325 val += 3;
326 } else if (min_uV <= 2900000)
327 val = 6;
328 else if (min_uV <= 3300000)
329 val = 7;
330 else
331 val = -EINVAL;
332 }
333 break;
334 }
335 break;
336 case PM8607_ID_LDO6:
337 switch (chip_id) {
338 case PM8607_CHIP_A0:
339 case PM8607_CHIP_A1:
340 if (min_uV < 2600000) { /* 1800mV ~ 1900mV / 50mV */
341 if (min_uV <= 1800000)
342 val = 0;
343 else if (min_uV <= 1900000)
344 val = (min_uV - 1750001) / 50000;
345 else
346 val = 3; /* 2600mV */
347 } else { /* 2600mV ~ 2800mV / 50mV */
348 if (min_uV <= 2800000) {
349 val = (min_uV - 2550001) / 50000;
350 val += 3;
351 } else
352 val = -EINVAL;
353 }
354 break;
355 case PM8607_CHIP_B0:
356 if (min_uV < 2600000) { /* 1800mV ~ 1850mV / 50mV */
357 if (min_uV <= 1800000)
358 val = 0;
359 else if (min_uV <= 1850000)
360 val = (min_uV - 1750001) / 50000;
361 else
362 val = 2; /* 2600mV */
363 } else { /* 2600mV ~ 2800mV / 50mV */
364 if (min_uV <= 2800000) {
365 val = (min_uV - 2550001) / 50000;
366 val += 2;
367 } else if (min_uV <= 3300000)
368 val = 7;
369 else
370 val = -EINVAL;
371 }
372 break;
373 }
374 break;
375 case PM8607_ID_LDO14:
376 switch (chip_id) {
377 case PM8607_CHIP_A0:
378 case PM8607_CHIP_A1:
379 if (min_uV < 2700000) { /* 1800mV ~ 1900mV / 50mV */
380 if (min_uV <= 1800000)
381 val = 0;
382 else if (min_uV <= 1900000)
383 val = (min_uV - 1750001) / 50000;
384 else
385 val = 3; /* 2700mV */
386 } else { /* 2700mV ~ 2900mV / 50mV */
387 if (min_uV <= 2900000) {
388 val = (min_uV - 2650001) / 50000;
389 val += 3;
390 } else
391 val = -EINVAL;
392 }
393 break;
394 case PM8607_CHIP_B0:
395 if (min_uV < 2700000) { /* 1800mV ~ 1850mV / 50mV */
396 if (min_uV <= 1800000)
397 val = 0;
398 else if (min_uV <= 1850000)
399 val = (min_uV - 1750001) / 50000;
400 else
401 val = 2; /* 2700mV */
402 } else { /* 2700mV ~ 2900mV / 50mV */
403 if (min_uV <= 2900000) {
404 val = (min_uV - 2650001) / 50000;
405 val += 2;
406 } else if (min_uV <= 3300000)
407 val = 7;
408 else
409 val = -EINVAL;
410 }
411 break;
412 }
413 break;
414 }
415 if (val >= 0) {
416 ret = pm8607_list_voltage(rdev, val);
417 if (ret > max_uV) {
418 pr_err("exceed voltage range (%d %d) uV",
419 min_uV, max_uV);
420 return -EINVAL;
421 }
422 } else
423 pr_err("invalid voltage range (%d %d) uV", min_uV, max_uV);
424 return val;
425}
426
427static int pm8607_set_voltage(struct regulator_dev *rdev,
428 int min_uV, int max_uV)
429{
430 struct pm8607_regulator_info *info = rdev_get_drvdata(rdev);
431 struct pm8607_chip *chip = info->chip;
432 uint8_t val, mask;
433 int ret;
434
435 if (check_range(info, min_uV, max_uV)) {
436 pr_err("invalid voltage range (%d, %d) uV\n", min_uV, max_uV);
437 return -EINVAL;
438 }
439
440 ret = choose_voltage(rdev, min_uV, max_uV);
441 if (ret < 0)
442 return -EINVAL;
443 val = (uint8_t)(ret << info->vol_shift);
444 mask = ((1 << info->vol_nbits) - 1) << info->vol_shift;
445
446 ret = pm8607_set_bits(chip, info->vol_reg, mask, val);
447 if (ret)
448 return ret;
449 switch (info->desc.id) {
450 case PM8607_ID_BUCK1:
451 case PM8607_ID_BUCK3:
452 ret = pm8607_set_bits(chip, info->update_reg,
453 1 << info->update_bit,
454 1 << info->update_bit);
455 break;
456 }
457 return ret;
458}
459
460static int pm8607_get_voltage(struct regulator_dev *rdev)
461{
462 struct pm8607_regulator_info *info = rdev_get_drvdata(rdev);
463 struct pm8607_chip *chip = info->chip;
464 uint8_t val, mask;
465 int ret;
466
467 ret = pm8607_reg_read(chip, info->vol_reg);
468 if (ret < 0)
469 return ret;
470
471 mask = ((1 << info->vol_nbits) - 1) << info->vol_shift;
472 val = ((unsigned char)ret & mask) >> info->vol_shift;
473
474 return pm8607_list_voltage(rdev, val);
475}
476
477static int pm8607_enable(struct regulator_dev *rdev)
478{
479 struct pm8607_regulator_info *info = rdev_get_drvdata(rdev);
480 struct pm8607_chip *chip = info->chip;
481
482 return pm8607_set_bits(chip, info->enable_reg,
483 1 << info->enable_bit,
484 1 << info->enable_bit);
485}
486
487static int pm8607_disable(struct regulator_dev *rdev)
488{
489 struct pm8607_regulator_info *info = rdev_get_drvdata(rdev);
490 struct pm8607_chip *chip = info->chip;
491
492 return pm8607_set_bits(chip, info->enable_reg,
493 1 << info->enable_bit, 0);
494}
495
496static int pm8607_is_enabled(struct regulator_dev *rdev)
497{
498 struct pm8607_regulator_info *info = rdev_get_drvdata(rdev);
499 struct pm8607_chip *chip = info->chip;
500 int ret;
501
502 ret = pm8607_reg_read(chip, info->enable_reg);
503 if (ret < 0)
504 return ret;
505
506 return !!((unsigned char)ret & (1 << info->enable_bit));
507}
508
509static struct regulator_ops pm8607_regulator_ops = {
510 .set_voltage = pm8607_set_voltage,
511 .get_voltage = pm8607_get_voltage,
512 .enable = pm8607_enable,
513 .disable = pm8607_disable,
514 .is_enabled = pm8607_is_enabled,
515};
516
517#define PM8607_DVC(_id, min, max, step, vreg, nbits, ureg, ubit, ereg, ebit) \
518{ \
519 .desc = { \
520 .name = "BUCK" #_id, \
521 .ops = &pm8607_regulator_ops, \
522 .type = REGULATOR_VOLTAGE, \
523 .id = PM8607_ID_BUCK##_id, \
524 .owner = THIS_MODULE, \
525 }, \
526 .min_uV = (min) * 1000, \
527 .max_uV = (max) * 1000, \
528 .step_uV = (step) * 1000, \
529 .vol_reg = PM8607_##vreg, \
530 .vol_shift = (0), \
531 .vol_nbits = (nbits), \
532 .update_reg = PM8607_##ureg, \
533 .update_bit = (ubit), \
534 .enable_reg = PM8607_##ereg, \
535 .enable_bit = (ebit), \
536 .slope_double = (0), \
537}
538
539#define PM8607_LDO(_id, min, max, step, vreg, shift, nbits, ereg, ebit) \
540{ \
541 .desc = { \
542 .name = "LDO" #_id, \
543 .ops = &pm8607_regulator_ops, \
544 .type = REGULATOR_VOLTAGE, \
545 .id = PM8607_ID_LDO##_id, \
546 .owner = THIS_MODULE, \
547 }, \
548 .min_uV = (min) * 1000, \
549 .max_uV = (max) * 1000, \
550 .step_uV = (step) * 1000, \
551 .vol_reg = PM8607_##vreg, \
552 .vol_shift = (shift), \
553 .vol_nbits = (nbits), \
554 .enable_reg = PM8607_##ereg, \
555 .enable_bit = (ebit), \
556 .slope_double = (0), \
557}
558
559static struct pm8607_regulator_info pm8607_regulator_info[] = {
560 PM8607_DVC(1, 0, 1500, 25, BUCK1, 6, GO, 0, SUPPLIES_EN11, 0),
561 PM8607_DVC(3, 0, 1500, 25, BUCK3, 6, GO, 2, SUPPLIES_EN11, 2),
562
563 PM8607_LDO(1 , 1200, 2800, 0, LDO1 , 0, 2, SUPPLIES_EN11, 3),
564 PM8607_LDO(2 , 1800, 3300, 0, LDO2 , 0, 3, SUPPLIES_EN11, 4),
565 PM8607_LDO(3 , 1800, 3300, 0, LDO3 , 0, 3, SUPPLIES_EN11, 5),
566 PM8607_LDO(4 , 1800, 3300, 0, LDO4 , 0, 3, SUPPLIES_EN11, 6),
567 PM8607_LDO(5 , 2900, 3300, 0, LDO5 , 0, 2, SUPPLIES_EN11, 7),
568 PM8607_LDO(6 , 1800, 3300, 0, LDO6 , 0, 3, SUPPLIES_EN12, 0),
569 PM8607_LDO(7 , 1800, 2900, 0, LDO7 , 0, 3, SUPPLIES_EN12, 1),
570 PM8607_LDO(8 , 1800, 2900, 0, LDO8 , 0, 3, SUPPLIES_EN12, 2),
571 PM8607_LDO(9 , 1800, 3300, 0, LDO9 , 0, 3, SUPPLIES_EN12, 3),
572 PM8607_LDO(10, 1200, 3300, 0, LDO10, 0, 4, SUPPLIES_EN11, 4),
573 PM8607_LDO(12, 1200, 3300, 0, LDO12, 0, 4, SUPPLIES_EN11, 5),
574 PM8607_LDO(14, 1800, 3300, 0, LDO14, 0, 3, SUPPLIES_EN11, 6),
575};
576
577static inline struct pm8607_regulator_info *find_regulator_info(int id)
578{
579 struct pm8607_regulator_info *info;
580 int i;
581
582 for (i = 0; i < ARRAY_SIZE(pm8607_regulator_info); i++) {
583 info = &pm8607_regulator_info[i];
584 if (info->desc.id == id)
585 return info;
586 }
587 return NULL;
588}
589
590static int __devinit pm8607_regulator_probe(struct platform_device *pdev)
591{
592 struct pm8607_chip *chip = dev_get_drvdata(pdev->dev.parent);
593 struct pm8607_platform_data *pdata = chip->dev->platform_data;
594 struct pm8607_regulator_info *info = NULL;
595
596 info = find_regulator_info(pdev->id);
597 if (info == NULL) {
598 dev_err(&pdev->dev, "invalid regulator ID specified\n");
599 return -EINVAL;
600 }
601
602 info->chip = chip;
603
604 info->regulator = regulator_register(&info->desc, &pdev->dev,
605 pdata->regulator[pdev->id], info);
606 if (IS_ERR(info->regulator)) {
607 dev_err(&pdev->dev, "failed to register regulator %s\n",
608 info->desc.name);
609 return PTR_ERR(info->regulator);
610 }
611
612 /* check DVC ramp slope double */
613 if (info->desc.id == PM8607_ID_BUCK3)
614 if (info->chip->buck3_double)
615 info->slope_double = 1;
616
617 platform_set_drvdata(pdev, info);
618 return 0;
619}
620
621static int __devexit pm8607_regulator_remove(struct platform_device *pdev)
622{
623 struct pm8607_regulator_info *info = platform_get_drvdata(pdev);
624
625 regulator_unregister(info->regulator);
626 return 0;
627}
628
629#define PM8607_REGULATOR_DRIVER(_name) \
630{ \
631 .driver = { \
632 .name = "88pm8607-" #_name, \
633 .owner = THIS_MODULE, \
634 }, \
635 .probe = pm8607_regulator_probe, \
636 .remove = __devexit_p(pm8607_regulator_remove), \
637}
638
639static struct platform_driver pm8607_regulator_driver[] = {
640 PM8607_REGULATOR_DRIVER(buck1),
641 PM8607_REGULATOR_DRIVER(buck2),
642 PM8607_REGULATOR_DRIVER(buck3),
643 PM8607_REGULATOR_DRIVER(ldo1),
644 PM8607_REGULATOR_DRIVER(ldo2),
645 PM8607_REGULATOR_DRIVER(ldo3),
646 PM8607_REGULATOR_DRIVER(ldo4),
647 PM8607_REGULATOR_DRIVER(ldo5),
648 PM8607_REGULATOR_DRIVER(ldo6),
649 PM8607_REGULATOR_DRIVER(ldo7),
650 PM8607_REGULATOR_DRIVER(ldo8),
651 PM8607_REGULATOR_DRIVER(ldo9),
652 PM8607_REGULATOR_DRIVER(ldo10),
653 PM8607_REGULATOR_DRIVER(ldo12),
654 PM8607_REGULATOR_DRIVER(ldo14),
655};
656
657static int __init pm8607_regulator_init(void)
658{
659 int i, count, ret;
660
661 count = ARRAY_SIZE(pm8607_regulator_driver);
662 for (i = 0; i < count; i++) {
663 ret = platform_driver_register(&pm8607_regulator_driver[i]);
664 if (ret != 0)
665 pr_err("Failed to register regulator driver: %d\n",
666 ret);
667 }
668 return 0;
669}
670subsys_initcall(pm8607_regulator_init);
671
672static void __exit pm8607_regulator_exit(void)
673{
674 int i, count;
675
676 count = ARRAY_SIZE(pm8607_regulator_driver);
677 for (i = 0; i < count; i++)
678 platform_driver_unregister(&pm8607_regulator_driver[i]);
679}
680module_exit(pm8607_regulator_exit);
681
682MODULE_LICENSE("GPL");
683MODULE_AUTHOR("Haojian Zhuang <haojian.zhuang@marvell.com>");
684MODULE_DESCRIPTION("Regulator Driver for Marvell 88PM8607 PMIC");
685MODULE_ALIAS("platform:88pm8607-regulator");
diff --git a/drivers/regulator/Kconfig b/drivers/regulator/Kconfig
index 7cfdd65bebb4..262f62eec837 100644
--- a/drivers/regulator/Kconfig
+++ b/drivers/regulator/Kconfig
@@ -69,6 +69,13 @@ config REGULATOR_MAX1586
69 regulator via I2C bus. The provided regulator is suitable 69 regulator via I2C bus. The provided regulator is suitable
70 for PXA27x chips to control VCC_CORE and VCC_USIM voltages. 70 for PXA27x chips to control VCC_CORE and VCC_USIM voltages.
71 71
72config REGULATOR_MAX8660
73 tristate "Maxim 8660/8661 voltage regulator"
74 depends on I2C
75 help
76 This driver controls a Maxim 8660/8661 voltage output
77 regulator via I2C bus.
78
72config REGULATOR_TWL4030 79config REGULATOR_TWL4030
73 bool "TI TWL4030/TWL5030/TWL6030/TPS695x0 PMIC" 80 bool "TI TWL4030/TWL5030/TWL6030/TPS695x0 PMIC"
74 depends on TWL4030_CORE 81 depends on TWL4030_CORE
@@ -157,5 +164,11 @@ config REGULATOR_TPS6507X
157 three step-down converters and two general-purpose LDO voltage regulators. 164 three step-down converters and two general-purpose LDO voltage regulators.
158 It supports TI's software based Class-2 SmartReflex implementation. 165 It supports TI's software based Class-2 SmartReflex implementation.
159 166
167config REGULATOR_88PM8607
168 bool "Marvell 88PM8607 Power regulators"
169 depends on MFD_88PM8607=y
170 help
171 This driver supports 88PM8607 voltage regulator chips.
172
160endif 173endif
161 174
diff --git a/drivers/regulator/Makefile b/drivers/regulator/Makefile
index 9ae3cc44e668..b3c806c79415 100644
--- a/drivers/regulator/Makefile
+++ b/drivers/regulator/Makefile
@@ -12,6 +12,7 @@ obj-$(CONFIG_REGULATOR_BQ24022) += bq24022.o
12obj-$(CONFIG_REGULATOR_LP3971) += lp3971.o 12obj-$(CONFIG_REGULATOR_LP3971) += lp3971.o
13obj-$(CONFIG_REGULATOR_MAX1586) += max1586.o 13obj-$(CONFIG_REGULATOR_MAX1586) += max1586.o
14obj-$(CONFIG_REGULATOR_TWL4030) += twl-regulator.o 14obj-$(CONFIG_REGULATOR_TWL4030) += twl-regulator.o
15obj-$(CONFIG_REGULATOR_MAX8660) += max8660.o
15obj-$(CONFIG_REGULATOR_WM831X) += wm831x-dcdc.o 16obj-$(CONFIG_REGULATOR_WM831X) += wm831x-dcdc.o
16obj-$(CONFIG_REGULATOR_WM831X) += wm831x-isink.o 17obj-$(CONFIG_REGULATOR_WM831X) += wm831x-isink.o
17obj-$(CONFIG_REGULATOR_WM831X) += wm831x-ldo.o 18obj-$(CONFIG_REGULATOR_WM831X) += wm831x-ldo.o
@@ -20,10 +21,11 @@ obj-$(CONFIG_REGULATOR_WM8400) += wm8400-regulator.o
20obj-$(CONFIG_REGULATOR_DA903X) += da903x.o 21obj-$(CONFIG_REGULATOR_DA903X) += da903x.o
21obj-$(CONFIG_REGULATOR_PCF50633) += pcf50633-regulator.o 22obj-$(CONFIG_REGULATOR_PCF50633) += pcf50633-regulator.o
22obj-$(CONFIG_REGULATOR_PCAP) += pcap-regulator.o 23obj-$(CONFIG_REGULATOR_PCAP) += pcap-regulator.o
23obj-$(CONFIG_REGULATOR_MC13783) += mc13783.o 24obj-$(CONFIG_REGULATOR_MC13783) += mc13783-regulator.o
24obj-$(CONFIG_REGULATOR_AB3100) += ab3100.o 25obj-$(CONFIG_REGULATOR_AB3100) += ab3100.o
25 26
26obj-$(CONFIG_REGULATOR_TPS65023) += tps65023-regulator.o 27obj-$(CONFIG_REGULATOR_TPS65023) += tps65023-regulator.o
27obj-$(CONFIG_REGULATOR_TPS6507X) += tps6507x-regulator.o 28obj-$(CONFIG_REGULATOR_TPS6507X) += tps6507x-regulator.o
29obj-$(CONFIG_REGULATOR_88PM8607) += 88pm8607.o
28 30
29ccflags-$(CONFIG_REGULATOR_DEBUG) += -DDEBUG 31ccflags-$(CONFIG_REGULATOR_DEBUG) += -DDEBUG
diff --git a/drivers/regulator/ab3100.c b/drivers/regulator/ab3100.c
index 49aeee823a25..b349db4504b7 100644
--- a/drivers/regulator/ab3100.c
+++ b/drivers/regulator/ab3100.c
@@ -81,7 +81,7 @@ static const u8 ab3100_reg_init_order[AB3100_NUM_REGULATORS+2] = {
81#define LDO_C_VOLTAGE 2650000 81#define LDO_C_VOLTAGE 2650000
82#define LDO_D_VOLTAGE 2650000 82#define LDO_D_VOLTAGE 2650000
83 83
84static const int const ldo_e_buck_typ_voltages[] = { 84static const int ldo_e_buck_typ_voltages[] = {
85 1800000, 85 1800000,
86 1400000, 86 1400000,
87 1300000, 87 1300000,
@@ -91,7 +91,7 @@ static const int const ldo_e_buck_typ_voltages[] = {
91 900000, 91 900000,
92}; 92};
93 93
94static const int const ldo_f_typ_voltages[] = { 94static const int ldo_f_typ_voltages[] = {
95 1800000, 95 1800000,
96 1400000, 96 1400000,
97 1300000, 97 1300000,
@@ -102,21 +102,21 @@ static const int const ldo_f_typ_voltages[] = {
102 2650000, 102 2650000,
103}; 103};
104 104
105static const int const ldo_g_typ_voltages[] = { 105static const int ldo_g_typ_voltages[] = {
106 2850000, 106 2850000,
107 2750000, 107 2750000,
108 1800000, 108 1800000,
109 1500000, 109 1500000,
110}; 110};
111 111
112static const int const ldo_h_typ_voltages[] = { 112static const int ldo_h_typ_voltages[] = {
113 2750000, 113 2750000,
114 1800000, 114 1800000,
115 1500000, 115 1500000,
116 1200000, 116 1200000,
117}; 117};
118 118
119static const int const ldo_k_typ_voltages[] = { 119static const int ldo_k_typ_voltages[] = {
120 2750000, 120 2750000,
121 1800000, 121 1800000,
122}; 122};
@@ -241,24 +241,12 @@ static int ab3100_disable_regulator(struct regulator_dev *reg)
241 * LDO D is a special regulator. When it is disabled, the entire 241 * LDO D is a special regulator. When it is disabled, the entire
242 * system is shut down. So this is handled specially. 242 * system is shut down. So this is handled specially.
243 */ 243 */
244 pr_info("Called ab3100_disable_regulator\n");
244 if (abreg->regreg == AB3100_LDO_D) { 245 if (abreg->regreg == AB3100_LDO_D) {
245 int i;
246
247 dev_info(&reg->dev, "disabling LDO D - shut down system\n"); 246 dev_info(&reg->dev, "disabling LDO D - shut down system\n");
248 /*
249 * Set regulators to default values, ignore any errors,
250 * we're going DOWN
251 */
252 for (i = 0; i < ARRAY_SIZE(ab3100_reg_init_order); i++) {
253 (void) ab3100_set_register_interruptible(abreg->ab3100,
254 ab3100_reg_init_order[i],
255 abreg->plfdata->reg_initvals[i]);
256 }
257
258 /* Setting LDO D to 0x00 cuts the power to the SoC */ 247 /* Setting LDO D to 0x00 cuts the power to the SoC */
259 return ab3100_set_register_interruptible(abreg->ab3100, 248 return ab3100_set_register_interruptible(abreg->ab3100,
260 AB3100_LDO_D, 0x00U); 249 AB3100_LDO_D, 0x00U);
261
262 } 250 }
263 251
264 /* 252 /*
@@ -607,13 +595,6 @@ static int __init ab3100_regulators_probe(struct platform_device *pdev)
607 } 595 }
608 } 596 }
609 597
610 if (err) {
611 dev_err(&pdev->dev,
612 "LDO D regulator initialization failed with error %d\n",
613 err);
614 return err;
615 }
616
617 /* Register the regulators */ 598 /* Register the regulators */
618 for (i = 0; i < AB3100_NUM_REGULATORS; i++) { 599 for (i = 0; i < AB3100_NUM_REGULATORS; i++) {
619 struct ab3100_regulator *reg = &ab3100_regulators[i]; 600 struct ab3100_regulator *reg = &ab3100_regulators[i];
@@ -688,7 +669,7 @@ static __init int ab3100_regulators_init(void)
688 669
689static __exit void ab3100_regulators_exit(void) 670static __exit void ab3100_regulators_exit(void)
690{ 671{
691 platform_driver_register(&ab3100_regulators_driver); 672 platform_driver_unregister(&ab3100_regulators_driver);
692} 673}
693 674
694subsys_initcall(ab3100_regulators_init); 675subsys_initcall(ab3100_regulators_init);
diff --git a/drivers/regulator/core.c b/drivers/regulator/core.c
index efe568deda12..b60a4c9f8f16 100644
--- a/drivers/regulator/core.c
+++ b/drivers/regulator/core.c
@@ -66,6 +66,16 @@ static unsigned int _regulator_get_mode(struct regulator_dev *rdev);
66static void _notifier_call_chain(struct regulator_dev *rdev, 66static void _notifier_call_chain(struct regulator_dev *rdev,
67 unsigned long event, void *data); 67 unsigned long event, void *data);
68 68
69static const char *rdev_get_name(struct regulator_dev *rdev)
70{
71 if (rdev->constraints && rdev->constraints->name)
72 return rdev->constraints->name;
73 else if (rdev->desc->name)
74 return rdev->desc->name;
75 else
76 return "";
77}
78
69/* gets the regulator for a given consumer device */ 79/* gets the regulator for a given consumer device */
70static struct regulator *get_device_regulator(struct device *dev) 80static struct regulator *get_device_regulator(struct device *dev)
71{ 81{
@@ -96,12 +106,12 @@ static int regulator_check_voltage(struct regulator_dev *rdev,
96 106
97 if (!rdev->constraints) { 107 if (!rdev->constraints) {
98 printk(KERN_ERR "%s: no constraints for %s\n", __func__, 108 printk(KERN_ERR "%s: no constraints for %s\n", __func__,
99 rdev->desc->name); 109 rdev_get_name(rdev));
100 return -ENODEV; 110 return -ENODEV;
101 } 111 }
102 if (!(rdev->constraints->valid_ops_mask & REGULATOR_CHANGE_VOLTAGE)) { 112 if (!(rdev->constraints->valid_ops_mask & REGULATOR_CHANGE_VOLTAGE)) {
103 printk(KERN_ERR "%s: operation not allowed for %s\n", 113 printk(KERN_ERR "%s: operation not allowed for %s\n",
104 __func__, rdev->desc->name); 114 __func__, rdev_get_name(rdev));
105 return -EPERM; 115 return -EPERM;
106 } 116 }
107 117
@@ -124,12 +134,12 @@ static int regulator_check_current_limit(struct regulator_dev *rdev,
124 134
125 if (!rdev->constraints) { 135 if (!rdev->constraints) {
126 printk(KERN_ERR "%s: no constraints for %s\n", __func__, 136 printk(KERN_ERR "%s: no constraints for %s\n", __func__,
127 rdev->desc->name); 137 rdev_get_name(rdev));
128 return -ENODEV; 138 return -ENODEV;
129 } 139 }
130 if (!(rdev->constraints->valid_ops_mask & REGULATOR_CHANGE_CURRENT)) { 140 if (!(rdev->constraints->valid_ops_mask & REGULATOR_CHANGE_CURRENT)) {
131 printk(KERN_ERR "%s: operation not allowed for %s\n", 141 printk(KERN_ERR "%s: operation not allowed for %s\n",
132 __func__, rdev->desc->name); 142 __func__, rdev_get_name(rdev));
133 return -EPERM; 143 return -EPERM;
134 } 144 }
135 145
@@ -159,17 +169,17 @@ static int regulator_check_mode(struct regulator_dev *rdev, int mode)
159 169
160 if (!rdev->constraints) { 170 if (!rdev->constraints) {
161 printk(KERN_ERR "%s: no constraints for %s\n", __func__, 171 printk(KERN_ERR "%s: no constraints for %s\n", __func__,
162 rdev->desc->name); 172 rdev_get_name(rdev));
163 return -ENODEV; 173 return -ENODEV;
164 } 174 }
165 if (!(rdev->constraints->valid_ops_mask & REGULATOR_CHANGE_MODE)) { 175 if (!(rdev->constraints->valid_ops_mask & REGULATOR_CHANGE_MODE)) {
166 printk(KERN_ERR "%s: operation not allowed for %s\n", 176 printk(KERN_ERR "%s: operation not allowed for %s\n",
167 __func__, rdev->desc->name); 177 __func__, rdev_get_name(rdev));
168 return -EPERM; 178 return -EPERM;
169 } 179 }
170 if (!(rdev->constraints->valid_modes_mask & mode)) { 180 if (!(rdev->constraints->valid_modes_mask & mode)) {
171 printk(KERN_ERR "%s: invalid mode %x for %s\n", 181 printk(KERN_ERR "%s: invalid mode %x for %s\n",
172 __func__, mode, rdev->desc->name); 182 __func__, mode, rdev_get_name(rdev));
173 return -EINVAL; 183 return -EINVAL;
174 } 184 }
175 return 0; 185 return 0;
@@ -180,12 +190,12 @@ static int regulator_check_drms(struct regulator_dev *rdev)
180{ 190{
181 if (!rdev->constraints) { 191 if (!rdev->constraints) {
182 printk(KERN_ERR "%s: no constraints for %s\n", __func__, 192 printk(KERN_ERR "%s: no constraints for %s\n", __func__,
183 rdev->desc->name); 193 rdev_get_name(rdev));
184 return -ENODEV; 194 return -ENODEV;
185 } 195 }
186 if (!(rdev->constraints->valid_ops_mask & REGULATOR_CHANGE_DRMS)) { 196 if (!(rdev->constraints->valid_ops_mask & REGULATOR_CHANGE_DRMS)) {
187 printk(KERN_ERR "%s: operation not allowed for %s\n", 197 printk(KERN_ERR "%s: operation not allowed for %s\n",
188 __func__, rdev->desc->name); 198 __func__, rdev_get_name(rdev));
189 return -EPERM; 199 return -EPERM;
190 } 200 }
191 return 0; 201 return 0;
@@ -230,16 +240,8 @@ static ssize_t regulator_name_show(struct device *dev,
230 struct device_attribute *attr, char *buf) 240 struct device_attribute *attr, char *buf)
231{ 241{
232 struct regulator_dev *rdev = dev_get_drvdata(dev); 242 struct regulator_dev *rdev = dev_get_drvdata(dev);
233 const char *name;
234 243
235 if (rdev->constraints && rdev->constraints->name) 244 return sprintf(buf, "%s\n", rdev_get_name(rdev));
236 name = rdev->constraints->name;
237 else if (rdev->desc->name)
238 name = rdev->desc->name;
239 else
240 name = "";
241
242 return sprintf(buf, "%s\n", name);
243} 245}
244 246
245static ssize_t regulator_print_opmode(char *buf, int mode) 247static ssize_t regulator_print_opmode(char *buf, int mode)
@@ -388,7 +390,7 @@ static ssize_t regulator_total_uA_show(struct device *dev,
388 390
389 mutex_lock(&rdev->mutex); 391 mutex_lock(&rdev->mutex);
390 list_for_each_entry(regulator, &rdev->consumer_list, list) 392 list_for_each_entry(regulator, &rdev->consumer_list, list)
391 uA += regulator->uA_load; 393 uA += regulator->uA_load;
392 mutex_unlock(&rdev->mutex); 394 mutex_unlock(&rdev->mutex);
393 return sprintf(buf, "%d\n", uA); 395 return sprintf(buf, "%d\n", uA);
394} 396}
@@ -563,7 +565,7 @@ static void drms_uA_update(struct regulator_dev *rdev)
563 565
564 /* calc total requested load */ 566 /* calc total requested load */
565 list_for_each_entry(sibling, &rdev->consumer_list, list) 567 list_for_each_entry(sibling, &rdev->consumer_list, list)
566 current_uA += sibling->uA_load; 568 current_uA += sibling->uA_load;
567 569
568 /* now get the optimum mode for our new total regulator load */ 570 /* now get the optimum mode for our new total regulator load */
569 mode = rdev->desc->ops->get_optimum_mode(rdev, input_uV, 571 mode = rdev->desc->ops->get_optimum_mode(rdev, input_uV,
@@ -579,10 +581,29 @@ static int suspend_set_state(struct regulator_dev *rdev,
579 struct regulator_state *rstate) 581 struct regulator_state *rstate)
580{ 582{
581 int ret = 0; 583 int ret = 0;
584 bool can_set_state;
582 585
583 /* enable & disable are mandatory for suspend control */ 586 can_set_state = rdev->desc->ops->set_suspend_enable &&
584 if (!rdev->desc->ops->set_suspend_enable || 587 rdev->desc->ops->set_suspend_disable;
585 !rdev->desc->ops->set_suspend_disable) { 588
589 /* If we have no suspend mode configration don't set anything;
590 * only warn if the driver actually makes the suspend mode
591 * configurable.
592 */
593 if (!rstate->enabled && !rstate->disabled) {
594 if (can_set_state)
595 printk(KERN_WARNING "%s: No configuration for %s\n",
596 __func__, rdev_get_name(rdev));
597 return 0;
598 }
599
600 if (rstate->enabled && rstate->disabled) {
601 printk(KERN_ERR "%s: invalid configuration for %s\n",
602 __func__, rdev_get_name(rdev));
603 return -EINVAL;
604 }
605
606 if (!can_set_state) {
586 printk(KERN_ERR "%s: no way to set suspend state\n", 607 printk(KERN_ERR "%s: no way to set suspend state\n",
587 __func__); 608 __func__);
588 return -EINVAL; 609 return -EINVAL;
@@ -640,26 +661,44 @@ static int suspend_prepare(struct regulator_dev *rdev, suspend_state_t state)
640static void print_constraints(struct regulator_dev *rdev) 661static void print_constraints(struct regulator_dev *rdev)
641{ 662{
642 struct regulation_constraints *constraints = rdev->constraints; 663 struct regulation_constraints *constraints = rdev->constraints;
643 char buf[80]; 664 char buf[80] = "";
644 int count; 665 int count = 0;
666 int ret;
645 667
646 if (rdev->desc->type == REGULATOR_VOLTAGE) { 668 if (constraints->min_uV && constraints->max_uV) {
647 if (constraints->min_uV == constraints->max_uV) 669 if (constraints->min_uV == constraints->max_uV)
648 count = sprintf(buf, "%d mV ", 670 count += sprintf(buf + count, "%d mV ",
649 constraints->min_uV / 1000); 671 constraints->min_uV / 1000);
650 else 672 else
651 count = sprintf(buf, "%d <--> %d mV ", 673 count += sprintf(buf + count, "%d <--> %d mV ",
652 constraints->min_uV / 1000, 674 constraints->min_uV / 1000,
653 constraints->max_uV / 1000); 675 constraints->max_uV / 1000);
654 } else { 676 }
677
678 if (!constraints->min_uV ||
679 constraints->min_uV != constraints->max_uV) {
680 ret = _regulator_get_voltage(rdev);
681 if (ret > 0)
682 count += sprintf(buf + count, "at %d mV ", ret / 1000);
683 }
684
685 if (constraints->min_uA && constraints->max_uA) {
655 if (constraints->min_uA == constraints->max_uA) 686 if (constraints->min_uA == constraints->max_uA)
656 count = sprintf(buf, "%d mA ", 687 count += sprintf(buf + count, "%d mA ",
657 constraints->min_uA / 1000); 688 constraints->min_uA / 1000);
658 else 689 else
659 count = sprintf(buf, "%d <--> %d mA ", 690 count += sprintf(buf + count, "%d <--> %d mA ",
660 constraints->min_uA / 1000, 691 constraints->min_uA / 1000,
661 constraints->max_uA / 1000); 692 constraints->max_uA / 1000);
662 } 693 }
694
695 if (!constraints->min_uA ||
696 constraints->min_uA != constraints->max_uA) {
697 ret = _regulator_get_current_limit(rdev);
698 if (ret > 0)
699 count += sprintf(buf + count, "at %d uA ", ret / 1000);
700 }
701
663 if (constraints->valid_modes_mask & REGULATOR_MODE_FAST) 702 if (constraints->valid_modes_mask & REGULATOR_MODE_FAST)
664 count += sprintf(buf + count, "fast "); 703 count += sprintf(buf + count, "fast ");
665 if (constraints->valid_modes_mask & REGULATOR_MODE_NORMAL) 704 if (constraints->valid_modes_mask & REGULATOR_MODE_NORMAL)
@@ -669,33 +708,30 @@ static void print_constraints(struct regulator_dev *rdev)
669 if (constraints->valid_modes_mask & REGULATOR_MODE_STANDBY) 708 if (constraints->valid_modes_mask & REGULATOR_MODE_STANDBY)
670 count += sprintf(buf + count, "standby"); 709 count += sprintf(buf + count, "standby");
671 710
672 printk(KERN_INFO "regulator: %s: %s\n", rdev->desc->name, buf); 711 printk(KERN_INFO "regulator: %s: %s\n", rdev_get_name(rdev), buf);
673} 712}
674 713
675/** 714static int machine_constraints_voltage(struct regulator_dev *rdev,
676 * set_machine_constraints - sets regulator constraints
677 * @rdev: regulator source
678 * @constraints: constraints to apply
679 *
680 * Allows platform initialisation code to define and constrain
681 * regulator circuits e.g. valid voltage/current ranges, etc. NOTE:
682 * Constraints *must* be set by platform code in order for some
683 * regulator operations to proceed i.e. set_voltage, set_current_limit,
684 * set_mode.
685 */
686static int set_machine_constraints(struct regulator_dev *rdev,
687 struct regulation_constraints *constraints) 715 struct regulation_constraints *constraints)
688{ 716{
689 int ret = 0;
690 const char *name;
691 struct regulator_ops *ops = rdev->desc->ops; 717 struct regulator_ops *ops = rdev->desc->ops;
718 const char *name = rdev_get_name(rdev);
719 int ret;
692 720
693 if (constraints->name) 721 /* do we need to apply the constraint voltage */
694 name = constraints->name; 722 if (rdev->constraints->apply_uV &&
695 else if (rdev->desc->name) 723 rdev->constraints->min_uV == rdev->constraints->max_uV &&
696 name = rdev->desc->name; 724 ops->set_voltage) {
697 else 725 ret = ops->set_voltage(rdev,
698 name = "regulator"; 726 rdev->constraints->min_uV, rdev->constraints->max_uV);
727 if (ret < 0) {
728 printk(KERN_ERR "%s: failed to apply %duV constraint to %s\n",
729 __func__,
730 rdev->constraints->min_uV, name);
731 rdev->constraints = NULL;
732 return ret;
733 }
734 }
699 735
700 /* constrain machine-level voltage specs to fit 736 /* constrain machine-level voltage specs to fit
701 * the actual range supported by this regulator. 737 * the actual range supported by this regulator.
@@ -719,14 +755,13 @@ static int set_machine_constraints(struct regulator_dev *rdev,
719 755
720 /* voltage constraints are optional */ 756 /* voltage constraints are optional */
721 if ((cmin == 0) && (cmax == 0)) 757 if ((cmin == 0) && (cmax == 0))
722 goto out; 758 return 0;
723 759
724 /* else require explicit machine-level constraints */ 760 /* else require explicit machine-level constraints */
725 if (cmin <= 0 || cmax <= 0 || cmax < cmin) { 761 if (cmin <= 0 || cmax <= 0 || cmax < cmin) {
726 pr_err("%s: %s '%s' voltage constraints\n", 762 pr_err("%s: %s '%s' voltage constraints\n",
727 __func__, "invalid", name); 763 __func__, "invalid", name);
728 ret = -EINVAL; 764 return -EINVAL;
729 goto out;
730 } 765 }
731 766
732 /* initial: [cmin..cmax] valid, [min_uV..max_uV] not */ 767 /* initial: [cmin..cmax] valid, [min_uV..max_uV] not */
@@ -748,8 +783,7 @@ static int set_machine_constraints(struct regulator_dev *rdev,
748 if (max_uV < min_uV) { 783 if (max_uV < min_uV) {
749 pr_err("%s: %s '%s' voltage constraints\n", 784 pr_err("%s: %s '%s' voltage constraints\n",
750 __func__, "unsupportable", name); 785 __func__, "unsupportable", name);
751 ret = -EINVAL; 786 return -EINVAL;
752 goto out;
753 } 787 }
754 788
755 /* use regulator's subset of machine constraints */ 789 /* use regulator's subset of machine constraints */
@@ -767,22 +801,34 @@ static int set_machine_constraints(struct regulator_dev *rdev,
767 } 801 }
768 } 802 }
769 803
804 return 0;
805}
806
807/**
808 * set_machine_constraints - sets regulator constraints
809 * @rdev: regulator source
810 * @constraints: constraints to apply
811 *
812 * Allows platform initialisation code to define and constrain
813 * regulator circuits e.g. valid voltage/current ranges, etc. NOTE:
814 * Constraints *must* be set by platform code in order for some
815 * regulator operations to proceed i.e. set_voltage, set_current_limit,
816 * set_mode.
817 */
818static int set_machine_constraints(struct regulator_dev *rdev,
819 struct regulation_constraints *constraints)
820{
821 int ret = 0;
822 const char *name;
823 struct regulator_ops *ops = rdev->desc->ops;
824
770 rdev->constraints = constraints; 825 rdev->constraints = constraints;
771 826
772 /* do we need to apply the constraint voltage */ 827 name = rdev_get_name(rdev);
773 if (rdev->constraints->apply_uV && 828
774 rdev->constraints->min_uV == rdev->constraints->max_uV && 829 ret = machine_constraints_voltage(rdev, constraints);
775 ops->set_voltage) { 830 if (ret != 0)
776 ret = ops->set_voltage(rdev, 831 goto out;
777 rdev->constraints->min_uV, rdev->constraints->max_uV);
778 if (ret < 0) {
779 printk(KERN_ERR "%s: failed to apply %duV constraint to %s\n",
780 __func__,
781 rdev->constraints->min_uV, name);
782 rdev->constraints = NULL;
783 goto out;
784 }
785 }
786 832
787 /* do we need to setup our suspend state */ 833 /* do we need to setup our suspend state */
788 if (constraints->initial_state) { 834 if (constraints->initial_state) {
@@ -903,7 +949,7 @@ static int set_consumer_device_supply(struct regulator_dev *rdev,
903 dev_name(&node->regulator->dev), 949 dev_name(&node->regulator->dev),
904 node->regulator->desc->name, 950 node->regulator->desc->name,
905 supply, 951 supply,
906 dev_name(&rdev->dev), rdev->desc->name); 952 dev_name(&rdev->dev), rdev_get_name(rdev));
907 return -EBUSY; 953 return -EBUSY;
908 } 954 }
909 955
@@ -1212,7 +1258,7 @@ static int _regulator_enable(struct regulator_dev *rdev)
1212 ret = _regulator_enable(rdev->supply); 1258 ret = _regulator_enable(rdev->supply);
1213 if (ret < 0) { 1259 if (ret < 0) {
1214 printk(KERN_ERR "%s: failed to enable %s: %d\n", 1260 printk(KERN_ERR "%s: failed to enable %s: %d\n",
1215 __func__, rdev->desc->name, ret); 1261 __func__, rdev_get_name(rdev), ret);
1216 return ret; 1262 return ret;
1217 } 1263 }
1218 } 1264 }
@@ -1238,7 +1284,7 @@ static int _regulator_enable(struct regulator_dev *rdev)
1238 } 1284 }
1239 } else if (ret < 0) { 1285 } else if (ret < 0) {
1240 printk(KERN_ERR "%s: is_enabled() failed for %s: %d\n", 1286 printk(KERN_ERR "%s: is_enabled() failed for %s: %d\n",
1241 __func__, rdev->desc->name, ret); 1287 __func__, rdev_get_name(rdev), ret);
1242 return ret; 1288 return ret;
1243 } 1289 }
1244 /* Fallthrough on positive return values - already enabled */ 1290 /* Fallthrough on positive return values - already enabled */
@@ -1279,7 +1325,7 @@ static int _regulator_disable(struct regulator_dev *rdev)
1279 1325
1280 if (WARN(rdev->use_count <= 0, 1326 if (WARN(rdev->use_count <= 0,
1281 "unbalanced disables for %s\n", 1327 "unbalanced disables for %s\n",
1282 rdev->desc->name)) 1328 rdev_get_name(rdev)))
1283 return -EIO; 1329 return -EIO;
1284 1330
1285 /* are we the last user and permitted to disable ? */ 1331 /* are we the last user and permitted to disable ? */
@@ -1292,7 +1338,7 @@ static int _regulator_disable(struct regulator_dev *rdev)
1292 ret = rdev->desc->ops->disable(rdev); 1338 ret = rdev->desc->ops->disable(rdev);
1293 if (ret < 0) { 1339 if (ret < 0) {
1294 printk(KERN_ERR "%s: failed to disable %s\n", 1340 printk(KERN_ERR "%s: failed to disable %s\n",
1295 __func__, rdev->desc->name); 1341 __func__, rdev_get_name(rdev));
1296 return ret; 1342 return ret;
1297 } 1343 }
1298 } 1344 }
@@ -1349,7 +1395,7 @@ static int _regulator_force_disable(struct regulator_dev *rdev)
1349 ret = rdev->desc->ops->disable(rdev); 1395 ret = rdev->desc->ops->disable(rdev);
1350 if (ret < 0) { 1396 if (ret < 0) {
1351 printk(KERN_ERR "%s: failed to force disable %s\n", 1397 printk(KERN_ERR "%s: failed to force disable %s\n",
1352 __func__, rdev->desc->name); 1398 __func__, rdev_get_name(rdev));
1353 return ret; 1399 return ret;
1354 } 1400 }
1355 /* notify other consumers that power has been forced off */ 1401 /* notify other consumers that power has been forced off */
@@ -1766,7 +1812,7 @@ int regulator_set_optimum_mode(struct regulator *regulator, int uA_load)
1766 output_uV = rdev->desc->ops->get_voltage(rdev); 1812 output_uV = rdev->desc->ops->get_voltage(rdev);
1767 if (output_uV <= 0) { 1813 if (output_uV <= 0) {
1768 printk(KERN_ERR "%s: invalid output voltage found for %s\n", 1814 printk(KERN_ERR "%s: invalid output voltage found for %s\n",
1769 __func__, rdev->desc->name); 1815 __func__, rdev_get_name(rdev));
1770 goto out; 1816 goto out;
1771 } 1817 }
1772 1818
@@ -1777,13 +1823,13 @@ int regulator_set_optimum_mode(struct regulator *regulator, int uA_load)
1777 input_uV = rdev->constraints->input_uV; 1823 input_uV = rdev->constraints->input_uV;
1778 if (input_uV <= 0) { 1824 if (input_uV <= 0) {
1779 printk(KERN_ERR "%s: invalid input voltage found for %s\n", 1825 printk(KERN_ERR "%s: invalid input voltage found for %s\n",
1780 __func__, rdev->desc->name); 1826 __func__, rdev_get_name(rdev));
1781 goto out; 1827 goto out;
1782 } 1828 }
1783 1829
1784 /* calc total requested load for this regulator */ 1830 /* calc total requested load for this regulator */
1785 list_for_each_entry(consumer, &rdev->consumer_list, list) 1831 list_for_each_entry(consumer, &rdev->consumer_list, list)
1786 total_uA_load += consumer->uA_load; 1832 total_uA_load += consumer->uA_load;
1787 1833
1788 mode = rdev->desc->ops->get_optimum_mode(rdev, 1834 mode = rdev->desc->ops->get_optimum_mode(rdev,
1789 input_uV, output_uV, 1835 input_uV, output_uV,
@@ -1791,7 +1837,7 @@ int regulator_set_optimum_mode(struct regulator *regulator, int uA_load)
1791 ret = regulator_check_mode(rdev, mode); 1837 ret = regulator_check_mode(rdev, mode);
1792 if (ret < 0) { 1838 if (ret < 0) {
1793 printk(KERN_ERR "%s: failed to get optimum mode for %s @" 1839 printk(KERN_ERR "%s: failed to get optimum mode for %s @"
1794 " %d uA %d -> %d uV\n", __func__, rdev->desc->name, 1840 " %d uA %d -> %d uV\n", __func__, rdev_get_name(rdev),
1795 total_uA_load, input_uV, output_uV); 1841 total_uA_load, input_uV, output_uV);
1796 goto out; 1842 goto out;
1797 } 1843 }
@@ -1799,7 +1845,7 @@ int regulator_set_optimum_mode(struct regulator *regulator, int uA_load)
1799 ret = rdev->desc->ops->set_mode(rdev, mode); 1845 ret = rdev->desc->ops->set_mode(rdev, mode);
1800 if (ret < 0) { 1846 if (ret < 0) {
1801 printk(KERN_ERR "%s: failed to set optimum mode %x for %s\n", 1847 printk(KERN_ERR "%s: failed to set optimum mode %x for %s\n",
1802 __func__, mode, rdev->desc->name); 1848 __func__, mode, rdev_get_name(rdev));
1803 goto out; 1849 goto out;
1804 } 1850 }
1805 ret = mode; 1851 ret = mode;
@@ -1852,9 +1898,9 @@ static void _notifier_call_chain(struct regulator_dev *rdev,
1852 1898
1853 /* now notify regulator we supply */ 1899 /* now notify regulator we supply */
1854 list_for_each_entry(_rdev, &rdev->supply_list, slist) { 1900 list_for_each_entry(_rdev, &rdev->supply_list, slist) {
1855 mutex_lock(&_rdev->mutex); 1901 mutex_lock(&_rdev->mutex);
1856 _notifier_call_chain(_rdev, event, data); 1902 _notifier_call_chain(_rdev, event, data);
1857 mutex_unlock(&_rdev->mutex); 1903 mutex_unlock(&_rdev->mutex);
1858 } 1904 }
1859} 1905}
1860 1906
@@ -1885,9 +1931,9 @@ int regulator_bulk_get(struct device *dev, int num_consumers,
1885 consumers[i].consumer = regulator_get(dev, 1931 consumers[i].consumer = regulator_get(dev,
1886 consumers[i].supply); 1932 consumers[i].supply);
1887 if (IS_ERR(consumers[i].consumer)) { 1933 if (IS_ERR(consumers[i].consumer)) {
1888 dev_err(dev, "Failed to get supply '%s'\n",
1889 consumers[i].supply);
1890 ret = PTR_ERR(consumers[i].consumer); 1934 ret = PTR_ERR(consumers[i].consumer);
1935 dev_err(dev, "Failed to get supply '%s': %d\n",
1936 consumers[i].supply, ret);
1891 consumers[i].consumer = NULL; 1937 consumers[i].consumer = NULL;
1892 goto err; 1938 goto err;
1893 } 1939 }
@@ -1930,8 +1976,8 @@ int regulator_bulk_enable(int num_consumers,
1930 return 0; 1976 return 0;
1931 1977
1932err: 1978err:
1933 printk(KERN_ERR "Failed to enable %s\n", consumers[i].supply); 1979 printk(KERN_ERR "Failed to enable %s: %d\n", consumers[i].supply, ret);
1934 for (i = 0; i < num_consumers; i++) 1980 for (--i; i >= 0; --i)
1935 regulator_disable(consumers[i].consumer); 1981 regulator_disable(consumers[i].consumer);
1936 1982
1937 return ret; 1983 return ret;
@@ -1965,8 +2011,9 @@ int regulator_bulk_disable(int num_consumers,
1965 return 0; 2011 return 0;
1966 2012
1967err: 2013err:
1968 printk(KERN_ERR "Failed to disable %s\n", consumers[i].supply); 2014 printk(KERN_ERR "Failed to disable %s: %d\n", consumers[i].supply,
1969 for (i = 0; i < num_consumers; i++) 2015 ret);
2016 for (--i; i >= 0; --i)
1970 regulator_enable(consumers[i].consumer); 2017 regulator_enable(consumers[i].consumer);
1971 2018
1972 return ret; 2019 return ret;
@@ -2316,7 +2363,7 @@ int regulator_suspend_prepare(suspend_state_t state)
2316 2363
2317 if (ret < 0) { 2364 if (ret < 0) {
2318 printk(KERN_ERR "%s: failed to prepare %s\n", 2365 printk(KERN_ERR "%s: failed to prepare %s\n",
2319 __func__, rdev->desc->name); 2366 __func__, rdev_get_name(rdev));
2320 goto out; 2367 goto out;
2321 } 2368 }
2322 } 2369 }
@@ -2429,12 +2476,7 @@ static int __init regulator_init_complete(void)
2429 ops = rdev->desc->ops; 2476 ops = rdev->desc->ops;
2430 c = rdev->constraints; 2477 c = rdev->constraints;
2431 2478
2432 if (c && c->name) 2479 name = rdev_get_name(rdev);
2433 name = c->name;
2434 else if (rdev->desc->name)
2435 name = rdev->desc->name;
2436 else
2437 name = "regulator";
2438 2480
2439 if (!ops->disable || (c && c->always_on)) 2481 if (!ops->disable || (c && c->always_on))
2440 continue; 2482 continue;
diff --git a/drivers/regulator/da903x.c b/drivers/regulator/da903x.c
index aa224d936e0d..f8c4661a7a81 100644
--- a/drivers/regulator/da903x.c
+++ b/drivers/regulator/da903x.c
@@ -331,7 +331,7 @@ static int da9034_get_ldo12_voltage(struct regulator_dev *rdev)
331static int da9034_list_ldo12_voltage(struct regulator_dev *rdev, 331static int da9034_list_ldo12_voltage(struct regulator_dev *rdev,
332 unsigned selector) 332 unsigned selector)
333{ 333{
334 if (selector > ARRAY_SIZE(da9034_ldo12_data)) 334 if (selector >= ARRAY_SIZE(da9034_ldo12_data))
335 return -EINVAL; 335 return -EINVAL;
336 return da9034_ldo12_data[selector] * 1000; 336 return da9034_ldo12_data[selector] * 1000;
337} 337}
diff --git a/drivers/regulator/lp3971.c b/drivers/regulator/lp3971.c
index 7803a320543b..4f33a0f4a179 100644
--- a/drivers/regulator/lp3971.c
+++ b/drivers/regulator/lp3971.c
@@ -183,7 +183,7 @@ static int lp3971_ldo_set_voltage(struct regulator_dev *dev,
183 if (vol_map[val] >= min_vol) 183 if (vol_map[val] >= min_vol)
184 break; 184 break;
185 185
186 if (vol_map[val] > max_vol) 186 if (val > LDO_VOL_MAX_IDX || vol_map[val] > max_vol)
187 return -EINVAL; 187 return -EINVAL;
188 188
189 return lp3971_set_bits(lp3971, LP3971_LDO_VOL_CONTR_REG(ldo), 189 return lp3971_set_bits(lp3971, LP3971_LDO_VOL_CONTR_REG(ldo),
@@ -272,7 +272,7 @@ static int lp3971_dcdc_set_voltage(struct regulator_dev *dev,
272 if (vol_map[val] >= min_vol) 272 if (vol_map[val] >= min_vol)
273 break; 273 break;
274 274
275 if (vol_map[val] > max_vol) 275 if (val > BUCK_TARGET_VOL_MAX_IDX || vol_map[val] > max_vol)
276 return -EINVAL; 276 return -EINVAL;
277 277
278 ret = lp3971_set_bits(lp3971, LP3971_BUCK_TARGET_VOL1_REG(buck), 278 ret = lp3971_set_bits(lp3971, LP3971_BUCK_TARGET_VOL1_REG(buck),
@@ -446,8 +446,8 @@ static int setup_regulators(struct lp3971 *lp3971,
446 lp3971->rdev[i] = regulator_register(&regulators[id], 446 lp3971->rdev[i] = regulator_register(&regulators[id],
447 lp3971->dev, pdata->regulators[i].initdata, lp3971); 447 lp3971->dev, pdata->regulators[i].initdata, lp3971);
448 448
449 err = IS_ERR(lp3971->rdev[i]); 449 if (IS_ERR(lp3971->rdev[i])) {
450 if (err) { 450 err = PTR_ERR(lp3971->rdev[i]);
451 dev_err(lp3971->dev, "regulator init failed: %d\n", 451 dev_err(lp3971->dev, "regulator init failed: %d\n",
452 err); 452 err);
453 goto error; 453 goto error;
diff --git a/drivers/regulator/max8660.c b/drivers/regulator/max8660.c
new file mode 100644
index 000000000000..acc2fb7b6087
--- /dev/null
+++ b/drivers/regulator/max8660.c
@@ -0,0 +1,510 @@
1/*
2 * max8660.c -- Voltage regulation for the Maxim 8660/8661
3 *
4 * based on max1586.c and wm8400-regulator.c
5 *
6 * Copyright (C) 2009 Wolfram Sang, Pengutronix e.K.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the Free
10 * Software Foundation; version 2 of the License.
11 *
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc., 59 Temple
19 * Place, Suite 330, Boston, MA 02111-1307 USA
20 *
21 * Some info:
22 *
23 * Datasheet: http://datasheets.maxim-ic.com/en/ds/MAX8660-MAX8661.pdf
24 *
25 * This chip is a bit nasty because it is a write-only device. Thus, the driver
26 * uses shadow registers to keep track of its values. The main problem appears
27 * to be the initialization: When Linux boots up, we cannot know if the chip is
28 * in the default state or not, so we would have to pass such information in
29 * platform_data. As this adds a bit of complexity to the driver, this is left
30 * out for now until it is really needed.
31 *
32 * [A|S|M]DTV1 registers are currently not used, but [A|S|M]DTV2.
33 *
34 * If the driver is feature complete, it might be worth to check if one set of
35 * functions for V3-V7 is sufficient. For maximum flexibility during
36 * development, they are separated for now.
37 *
38 */
39
40#include <linux/module.h>
41#include <linux/err.h>
42#include <linux/i2c.h>
43#include <linux/platform_device.h>
44#include <linux/regulator/driver.h>
45#include <linux/regulator/max8660.h>
46
47#define MAX8660_DCDC_MIN_UV 725000
48#define MAX8660_DCDC_MAX_UV 1800000
49#define MAX8660_DCDC_STEP 25000
50#define MAX8660_DCDC_MAX_SEL 0x2b
51
52#define MAX8660_LDO5_MIN_UV 1700000
53#define MAX8660_LDO5_MAX_UV 2000000
54#define MAX8660_LDO5_STEP 25000
55#define MAX8660_LDO5_MAX_SEL 0x0c
56
57#define MAX8660_LDO67_MIN_UV 1800000
58#define MAX8660_LDO67_MAX_UV 3300000
59#define MAX8660_LDO67_STEP 100000
60#define MAX8660_LDO67_MAX_SEL 0x0f
61
62enum {
63 MAX8660_OVER1,
64 MAX8660_OVER2,
65 MAX8660_VCC1,
66 MAX8660_ADTV1,
67 MAX8660_ADTV2,
68 MAX8660_SDTV1,
69 MAX8660_SDTV2,
70 MAX8660_MDTV1,
71 MAX8660_MDTV2,
72 MAX8660_L12VCR,
73 MAX8660_FPWM,
74 MAX8660_N_REGS, /* not a real register */
75};
76
77struct max8660 {
78 struct i2c_client *client;
79 u8 shadow_regs[MAX8660_N_REGS]; /* as chip is write only */
80 struct regulator_dev *rdev[];
81};
82
83static int max8660_write(struct max8660 *max8660, u8 reg, u8 mask, u8 val)
84{
85 static const u8 max8660_addresses[MAX8660_N_REGS] =
86 { 0x10, 0x12, 0x20, 0x23, 0x24, 0x29, 0x2a, 0x32, 0x33, 0x39, 0x80 };
87
88 int ret;
89 u8 reg_val = (max8660->shadow_regs[reg] & mask) | val;
90 dev_vdbg(&max8660->client->dev, "Writing reg %02x with %02x\n",
91 max8660_addresses[reg], reg_val);
92
93 ret = i2c_smbus_write_byte_data(max8660->client,
94 max8660_addresses[reg], reg_val);
95 if (ret == 0)
96 max8660->shadow_regs[reg] = reg_val;
97
98 return ret;
99}
100
101
102/*
103 * DCDC functions
104 */
105
106static int max8660_dcdc_is_enabled(struct regulator_dev *rdev)
107{
108 struct max8660 *max8660 = rdev_get_drvdata(rdev);
109 u8 val = max8660->shadow_regs[MAX8660_OVER1];
110 u8 mask = (rdev_get_id(rdev) == MAX8660_V3) ? 1 : 4;
111 return !!(val & mask);
112}
113
114static int max8660_dcdc_enable(struct regulator_dev *rdev)
115{
116 struct max8660 *max8660 = rdev_get_drvdata(rdev);
117 u8 bit = (rdev_get_id(rdev) == MAX8660_V3) ? 1 : 4;
118 return max8660_write(max8660, MAX8660_OVER1, 0xff, bit);
119}
120
121static int max8660_dcdc_disable(struct regulator_dev *rdev)
122{
123 struct max8660 *max8660 = rdev_get_drvdata(rdev);
124 u8 mask = (rdev_get_id(rdev) == MAX8660_V3) ? ~1 : ~4;
125 return max8660_write(max8660, MAX8660_OVER1, mask, 0);
126}
127
128static int max8660_dcdc_list(struct regulator_dev *rdev, unsigned selector)
129{
130 if (selector > MAX8660_DCDC_MAX_SEL)
131 return -EINVAL;
132 return MAX8660_DCDC_MIN_UV + selector * MAX8660_DCDC_STEP;
133}
134
135static int max8660_dcdc_get(struct regulator_dev *rdev)
136{
137 struct max8660 *max8660 = rdev_get_drvdata(rdev);
138 u8 reg = (rdev_get_id(rdev) == MAX8660_V3) ? MAX8660_ADTV2 : MAX8660_SDTV2;
139 u8 selector = max8660->shadow_regs[reg];
140 return MAX8660_DCDC_MIN_UV + selector * MAX8660_DCDC_STEP;
141}
142
143static int max8660_dcdc_set(struct regulator_dev *rdev, int min_uV, int max_uV)
144{
145 struct max8660 *max8660 = rdev_get_drvdata(rdev);
146 u8 reg, selector, bits;
147 int ret;
148
149 if (min_uV < MAX8660_DCDC_MIN_UV || min_uV > MAX8660_DCDC_MAX_UV)
150 return -EINVAL;
151 if (max_uV < MAX8660_DCDC_MIN_UV || max_uV > MAX8660_DCDC_MAX_UV)
152 return -EINVAL;
153
154 selector = (min_uV - (MAX8660_DCDC_MIN_UV - MAX8660_DCDC_STEP + 1))
155 / MAX8660_DCDC_STEP;
156
157 ret = max8660_dcdc_list(rdev, selector);
158 if (ret < 0 || ret > max_uV)
159 return -EINVAL;
160
161 reg = (rdev_get_id(rdev) == MAX8660_V3) ? MAX8660_ADTV2 : MAX8660_SDTV2;
162 ret = max8660_write(max8660, reg, 0, selector);
163 if (ret)
164 return ret;
165
166 /* Select target voltage register and activate regulation */
167 bits = (rdev_get_id(rdev) == MAX8660_V3) ? 0x03 : 0x30;
168 return max8660_write(max8660, MAX8660_VCC1, 0xff, bits);
169}
170
171static struct regulator_ops max8660_dcdc_ops = {
172 .is_enabled = max8660_dcdc_is_enabled,
173 .list_voltage = max8660_dcdc_list,
174 .set_voltage = max8660_dcdc_set,
175 .get_voltage = max8660_dcdc_get,
176};
177
178
179/*
180 * LDO5 functions
181 */
182
183static int max8660_ldo5_list(struct regulator_dev *rdev, unsigned selector)
184{
185 if (selector > MAX8660_LDO5_MAX_SEL)
186 return -EINVAL;
187 return MAX8660_LDO5_MIN_UV + selector * MAX8660_LDO5_STEP;
188}
189
190static int max8660_ldo5_get(struct regulator_dev *rdev)
191{
192 struct max8660 *max8660 = rdev_get_drvdata(rdev);
193 u8 selector = max8660->shadow_regs[MAX8660_MDTV2];
194
195 return MAX8660_LDO5_MIN_UV + selector * MAX8660_LDO5_STEP;
196}
197
198static int max8660_ldo5_set(struct regulator_dev *rdev, int min_uV, int max_uV)
199{
200 struct max8660 *max8660 = rdev_get_drvdata(rdev);
201 u8 selector;
202 int ret;
203
204 if (min_uV < MAX8660_LDO5_MIN_UV || min_uV > MAX8660_LDO5_MAX_UV)
205 return -EINVAL;
206 if (max_uV < MAX8660_LDO5_MIN_UV || max_uV > MAX8660_LDO5_MAX_UV)
207 return -EINVAL;
208
209 selector = (min_uV - (MAX8660_LDO5_MIN_UV - MAX8660_LDO5_STEP + 1))
210 / MAX8660_LDO5_STEP;
211 ret = max8660_ldo5_list(rdev, selector);
212 if (ret < 0 || ret > max_uV)
213 return -EINVAL;
214
215 ret = max8660_write(max8660, MAX8660_MDTV2, 0, selector);
216 if (ret)
217 return ret;
218
219 /* Select target voltage register and activate regulation */
220 return max8660_write(max8660, MAX8660_VCC1, 0xff, 0xc0);
221}
222
223static struct regulator_ops max8660_ldo5_ops = {
224 .list_voltage = max8660_ldo5_list,
225 .set_voltage = max8660_ldo5_set,
226 .get_voltage = max8660_ldo5_get,
227};
228
229
230/*
231 * LDO67 functions
232 */
233
234static int max8660_ldo67_is_enabled(struct regulator_dev *rdev)
235{
236 struct max8660 *max8660 = rdev_get_drvdata(rdev);
237 u8 val = max8660->shadow_regs[MAX8660_OVER2];
238 u8 mask = (rdev_get_id(rdev) == MAX8660_V6) ? 2 : 4;
239 return !!(val & mask);
240}
241
242static int max8660_ldo67_enable(struct regulator_dev *rdev)
243{
244 struct max8660 *max8660 = rdev_get_drvdata(rdev);
245 u8 bit = (rdev_get_id(rdev) == MAX8660_V6) ? 2 : 4;
246 return max8660_write(max8660, MAX8660_OVER2, 0xff, bit);
247}
248
249static int max8660_ldo67_disable(struct regulator_dev *rdev)
250{
251 struct max8660 *max8660 = rdev_get_drvdata(rdev);
252 u8 mask = (rdev_get_id(rdev) == MAX8660_V6) ? ~2 : ~4;
253 return max8660_write(max8660, MAX8660_OVER2, mask, 0);
254}
255
256static int max8660_ldo67_list(struct regulator_dev *rdev, unsigned selector)
257{
258 if (selector > MAX8660_LDO67_MAX_SEL)
259 return -EINVAL;
260 return MAX8660_LDO67_MIN_UV + selector * MAX8660_LDO67_STEP;
261}
262
263static int max8660_ldo67_get(struct regulator_dev *rdev)
264{
265 struct max8660 *max8660 = rdev_get_drvdata(rdev);
266 u8 shift = (rdev_get_id(rdev) == MAX8660_V6) ? 0 : 4;
267 u8 selector = (max8660->shadow_regs[MAX8660_L12VCR] >> shift) & 0xf;
268
269 return MAX8660_LDO67_MIN_UV + selector * MAX8660_LDO67_STEP;
270}
271
272static int max8660_ldo67_set(struct regulator_dev *rdev, int min_uV, int max_uV)
273{
274 struct max8660 *max8660 = rdev_get_drvdata(rdev);
275 u8 selector;
276 int ret;
277
278 if (min_uV < MAX8660_LDO67_MIN_UV || min_uV > MAX8660_LDO67_MAX_UV)
279 return -EINVAL;
280 if (max_uV < MAX8660_LDO67_MIN_UV || max_uV > MAX8660_LDO67_MAX_UV)
281 return -EINVAL;
282
283 selector = (min_uV - (MAX8660_LDO67_MIN_UV - MAX8660_LDO67_STEP + 1))
284 / MAX8660_LDO67_STEP;
285
286 ret = max8660_ldo67_list(rdev, selector);
287 if (ret < 0 || ret > max_uV)
288 return -EINVAL;
289
290 if (rdev_get_id(rdev) == MAX8660_V6)
291 return max8660_write(max8660, MAX8660_L12VCR, 0xf0, selector);
292 else
293 return max8660_write(max8660, MAX8660_L12VCR, 0x0f, selector << 4);
294}
295
296static struct regulator_ops max8660_ldo67_ops = {
297 .is_enabled = max8660_ldo67_is_enabled,
298 .enable = max8660_ldo67_enable,
299 .disable = max8660_ldo67_disable,
300 .list_voltage = max8660_ldo67_list,
301 .get_voltage = max8660_ldo67_get,
302 .set_voltage = max8660_ldo67_set,
303};
304
305static struct regulator_desc max8660_reg[] = {
306 {
307 .name = "V3(DCDC)",
308 .id = MAX8660_V3,
309 .ops = &max8660_dcdc_ops,
310 .type = REGULATOR_VOLTAGE,
311 .n_voltages = MAX8660_DCDC_MAX_SEL + 1,
312 .owner = THIS_MODULE,
313 },
314 {
315 .name = "V4(DCDC)",
316 .id = MAX8660_V4,
317 .ops = &max8660_dcdc_ops,
318 .type = REGULATOR_VOLTAGE,
319 .n_voltages = MAX8660_DCDC_MAX_SEL + 1,
320 .owner = THIS_MODULE,
321 },
322 {
323 .name = "V5(LDO)",
324 .id = MAX8660_V5,
325 .ops = &max8660_ldo5_ops,
326 .type = REGULATOR_VOLTAGE,
327 .n_voltages = MAX8660_LDO5_MAX_SEL + 1,
328 .owner = THIS_MODULE,
329 },
330 {
331 .name = "V6(LDO)",
332 .id = MAX8660_V6,
333 .ops = &max8660_ldo67_ops,
334 .type = REGULATOR_VOLTAGE,
335 .n_voltages = MAX8660_LDO67_MAX_SEL + 1,
336 .owner = THIS_MODULE,
337 },
338 {
339 .name = "V7(LDO)",
340 .id = MAX8660_V7,
341 .ops = &max8660_ldo67_ops,
342 .type = REGULATOR_VOLTAGE,
343 .n_voltages = MAX8660_LDO67_MAX_SEL + 1,
344 .owner = THIS_MODULE,
345 },
346};
347
348static int max8660_probe(struct i2c_client *client,
349 const struct i2c_device_id *i2c_id)
350{
351 struct regulator_dev **rdev;
352 struct max8660_platform_data *pdata = client->dev.platform_data;
353 struct max8660 *max8660;
354 int boot_on, i, id, ret = -EINVAL;
355
356 if (pdata->num_subdevs > MAX8660_V_END) {
357 dev_err(&client->dev, "Too much regulators found!\n");
358 goto out;
359 }
360
361 max8660 = kzalloc(sizeof(struct max8660) +
362 sizeof(struct regulator_dev *) * MAX8660_V_END,
363 GFP_KERNEL);
364 if (!max8660) {
365 ret = -ENOMEM;
366 goto out;
367 }
368
369 max8660->client = client;
370 rdev = max8660->rdev;
371
372 if (pdata->en34_is_high) {
373 /* Simulate always on */
374 max8660->shadow_regs[MAX8660_OVER1] = 5;
375 } else {
376 /* Otherwise devices can be toggled via software */
377 max8660_dcdc_ops.enable = max8660_dcdc_enable;
378 max8660_dcdc_ops.disable = max8660_dcdc_disable;
379 }
380
381 /*
382 * First, set up shadow registers to prevent glitches. As some
383 * registers are shared between regulators, everything must be properly
384 * set up for all regulators in advance.
385 */
386 max8660->shadow_regs[MAX8660_ADTV1] =
387 max8660->shadow_regs[MAX8660_ADTV2] =
388 max8660->shadow_regs[MAX8660_SDTV1] =
389 max8660->shadow_regs[MAX8660_SDTV2] = 0x1b;
390 max8660->shadow_regs[MAX8660_MDTV1] =
391 max8660->shadow_regs[MAX8660_MDTV2] = 0x04;
392
393 for (i = 0; i < pdata->num_subdevs; i++) {
394
395 if (!pdata->subdevs[i].platform_data)
396 goto err_free;
397
398 boot_on = pdata->subdevs[i].platform_data->constraints.boot_on;
399
400 switch (pdata->subdevs[i].id) {
401 case MAX8660_V3:
402 if (boot_on)
403 max8660->shadow_regs[MAX8660_OVER1] |= 1;
404 break;
405
406 case MAX8660_V4:
407 if (boot_on)
408 max8660->shadow_regs[MAX8660_OVER1] |= 4;
409 break;
410
411 case MAX8660_V5:
412 break;
413
414 case MAX8660_V6:
415 if (boot_on)
416 max8660->shadow_regs[MAX8660_OVER2] |= 2;
417 break;
418
419 case MAX8660_V7:
420 if (!strcmp(i2c_id->name, "max8661")) {
421 dev_err(&client->dev, "Regulator not on this chip!\n");
422 goto err_free;
423 }
424
425 if (boot_on)
426 max8660->shadow_regs[MAX8660_OVER2] |= 4;
427 break;
428
429 default:
430 dev_err(&client->dev, "invalid regulator %s\n",
431 pdata->subdevs[i].name);
432 goto err_free;
433 }
434 }
435
436 /* Finally register devices */
437 for (i = 0; i < pdata->num_subdevs; i++) {
438
439 id = pdata->subdevs[i].id;
440
441 rdev[i] = regulator_register(&max8660_reg[id], &client->dev,
442 pdata->subdevs[i].platform_data,
443 max8660);
444 if (IS_ERR(rdev[i])) {
445 ret = PTR_ERR(rdev[i]);
446 dev_err(&client->dev, "failed to register %s\n",
447 max8660_reg[id].name);
448 goto err_unregister;
449 }
450 }
451
452 i2c_set_clientdata(client, rdev);
453 dev_info(&client->dev, "Maxim 8660/8661 regulator driver loaded\n");
454 return 0;
455
456err_unregister:
457 while (--i >= 0)
458 regulator_unregister(rdev[i]);
459err_free:
460 kfree(max8660);
461out:
462 return ret;
463}
464
465static int max8660_remove(struct i2c_client *client)
466{
467 struct regulator_dev **rdev = i2c_get_clientdata(client);
468 int i;
469
470 for (i = 0; i < MAX8660_V_END; i++)
471 if (rdev[i])
472 regulator_unregister(rdev[i]);
473 kfree(rdev);
474 i2c_set_clientdata(client, NULL);
475
476 return 0;
477}
478
479static const struct i2c_device_id max8660_id[] = {
480 { "max8660", 0 },
481 { "max8661", 0 },
482 { }
483};
484MODULE_DEVICE_TABLE(i2c, max8660_id);
485
486static struct i2c_driver max8660_driver = {
487 .probe = max8660_probe,
488 .remove = max8660_remove,
489 .driver = {
490 .name = "max8660",
491 },
492 .id_table = max8660_id,
493};
494
495static int __init max8660_init(void)
496{
497 return i2c_add_driver(&max8660_driver);
498}
499subsys_initcall(max8660_init);
500
501static void __exit max8660_exit(void)
502{
503 i2c_del_driver(&max8660_driver);
504}
505module_exit(max8660_exit);
506
507/* Module information */
508MODULE_DESCRIPTION("MAXIM 8660/8661 voltage regulator driver");
509MODULE_AUTHOR("Wolfram Sang");
510MODULE_LICENSE("GPL v2");
diff --git a/drivers/regulator/mc13783-regulator.c b/drivers/regulator/mc13783-regulator.c
new file mode 100644
index 000000000000..39c495300045
--- /dev/null
+++ b/drivers/regulator/mc13783-regulator.c
@@ -0,0 +1,245 @@
1/*
2 * Regulator Driver for Freescale MC13783 PMIC
3 *
4 * Copyright (C) 2008 Sascha Hauer, Pengutronix <s.hauer@pengutronix.de>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#include <linux/mfd/mc13783.h>
12#include <linux/regulator/machine.h>
13#include <linux/regulator/driver.h>
14#include <linux/platform_device.h>
15#include <linux/kernel.h>
16#include <linux/init.h>
17#include <linux/err.h>
18
19#define MC13783_REG_SWITCHERS4 28
20#define MC13783_REG_SWITCHERS4_PLLEN (1 << 18)
21
22#define MC13783_REG_SWITCHERS5 29
23#define MC13783_REG_SWITCHERS5_SW3EN (1 << 20)
24
25#define MC13783_REG_REGULATORMODE0 32
26#define MC13783_REG_REGULATORMODE0_VAUDIOEN (1 << 0)
27#define MC13783_REG_REGULATORMODE0_VIOHIEN (1 << 3)
28#define MC13783_REG_REGULATORMODE0_VIOLOEN (1 << 6)
29#define MC13783_REG_REGULATORMODE0_VDIGEN (1 << 9)
30#define MC13783_REG_REGULATORMODE0_VGENEN (1 << 12)
31#define MC13783_REG_REGULATORMODE0_VRFDIGEN (1 << 15)
32#define MC13783_REG_REGULATORMODE0_VRFREFEN (1 << 18)
33#define MC13783_REG_REGULATORMODE0_VRFCPEN (1 << 21)
34
35#define MC13783_REG_REGULATORMODE1 33
36#define MC13783_REG_REGULATORMODE1_VSIMEN (1 << 0)
37#define MC13783_REG_REGULATORMODE1_VESIMEN (1 << 3)
38#define MC13783_REG_REGULATORMODE1_VCAMEN (1 << 6)
39#define MC13783_REG_REGULATORMODE1_VRFBGEN (1 << 9)
40#define MC13783_REG_REGULATORMODE1_VVIBEN (1 << 11)
41#define MC13783_REG_REGULATORMODE1_VRF1EN (1 << 12)
42#define MC13783_REG_REGULATORMODE1_VRF2EN (1 << 15)
43#define MC13783_REG_REGULATORMODE1_VMMC1EN (1 << 18)
44#define MC13783_REG_REGULATORMODE1_VMMC2EN (1 << 21)
45
46#define MC13783_REG_POWERMISC 34
47#define MC13783_REG_POWERMISC_GPO1EN (1 << 6)
48#define MC13783_REG_POWERMISC_GPO2EN (1 << 8)
49#define MC13783_REG_POWERMISC_GPO3EN (1 << 10)
50#define MC13783_REG_POWERMISC_GPO4EN (1 << 12)
51
52struct mc13783_regulator {
53 struct regulator_desc desc;
54 int reg;
55 int enable_bit;
56};
57
58static struct regulator_ops mc13783_regulator_ops;
59
60#define MC13783_DEFINE(prefix, _name, _reg) \
61 [MC13783_ ## prefix ## _ ## _name] = { \
62 .desc = { \
63 .name = #prefix "_" #_name, \
64 .ops = &mc13783_regulator_ops, \
65 .type = REGULATOR_VOLTAGE, \
66 .id = MC13783_ ## prefix ## _ ## _name, \
67 .owner = THIS_MODULE, \
68 }, \
69 .reg = MC13783_REG_ ## _reg, \
70 .enable_bit = MC13783_REG_ ## _reg ## _ ## _name ## EN, \
71 }
72
73#define MC13783_DEFINE_SW(_name, _reg) MC13783_DEFINE(SW, _name, _reg)
74#define MC13783_DEFINE_REGU(_name, _reg) MC13783_DEFINE(REGU, _name, _reg)
75
76static struct mc13783_regulator mc13783_regulators[] = {
77 MC13783_DEFINE_SW(SW3, SWITCHERS5),
78 MC13783_DEFINE_SW(PLL, SWITCHERS4),
79
80 MC13783_DEFINE_REGU(VAUDIO, REGULATORMODE0),
81 MC13783_DEFINE_REGU(VIOHI, REGULATORMODE0),
82 MC13783_DEFINE_REGU(VIOLO, REGULATORMODE0),
83 MC13783_DEFINE_REGU(VDIG, REGULATORMODE0),
84 MC13783_DEFINE_REGU(VGEN, REGULATORMODE0),
85 MC13783_DEFINE_REGU(VRFDIG, REGULATORMODE0),
86 MC13783_DEFINE_REGU(VRFREF, REGULATORMODE0),
87 MC13783_DEFINE_REGU(VRFCP, REGULATORMODE0),
88 MC13783_DEFINE_REGU(VSIM, REGULATORMODE1),
89 MC13783_DEFINE_REGU(VESIM, REGULATORMODE1),
90 MC13783_DEFINE_REGU(VCAM, REGULATORMODE1),
91 MC13783_DEFINE_REGU(VRFBG, REGULATORMODE1),
92 MC13783_DEFINE_REGU(VVIB, REGULATORMODE1),
93 MC13783_DEFINE_REGU(VRF1, REGULATORMODE1),
94 MC13783_DEFINE_REGU(VRF2, REGULATORMODE1),
95 MC13783_DEFINE_REGU(VMMC1, REGULATORMODE1),
96 MC13783_DEFINE_REGU(VMMC2, REGULATORMODE1),
97 MC13783_DEFINE_REGU(GPO1, POWERMISC),
98 MC13783_DEFINE_REGU(GPO2, POWERMISC),
99 MC13783_DEFINE_REGU(GPO3, POWERMISC),
100 MC13783_DEFINE_REGU(GPO4, POWERMISC),
101};
102
103struct mc13783_regulator_priv {
104 struct mc13783 *mc13783;
105 struct regulator_dev *regulators[];
106};
107
108static int mc13783_regulator_enable(struct regulator_dev *rdev)
109{
110 struct mc13783_regulator_priv *priv = rdev_get_drvdata(rdev);
111 int id = rdev_get_id(rdev);
112 int ret;
113
114 dev_dbg(rdev_get_dev(rdev), "%s id: %d\n", __func__, id);
115
116 mc13783_lock(priv->mc13783);
117 ret = mc13783_reg_rmw(priv->mc13783, mc13783_regulators[id].reg,
118 mc13783_regulators[id].enable_bit,
119 mc13783_regulators[id].enable_bit);
120 mc13783_unlock(priv->mc13783);
121
122 return ret;
123}
124
125static int mc13783_regulator_disable(struct regulator_dev *rdev)
126{
127 struct mc13783_regulator_priv *priv = rdev_get_drvdata(rdev);
128 int id = rdev_get_id(rdev);
129 int ret;
130
131 dev_dbg(rdev_get_dev(rdev), "%s id: %d\n", __func__, id);
132
133 mc13783_lock(priv->mc13783);
134 ret = mc13783_reg_rmw(priv->mc13783, mc13783_regulators[id].reg,
135 mc13783_regulators[id].enable_bit, 0);
136 mc13783_unlock(priv->mc13783);
137
138 return ret;
139}
140
141static int mc13783_regulator_is_enabled(struct regulator_dev *rdev)
142{
143 struct mc13783_regulator_priv *priv = rdev_get_drvdata(rdev);
144 int ret, id = rdev_get_id(rdev);
145 unsigned int val;
146
147 mc13783_lock(priv->mc13783);
148 ret = mc13783_reg_read(priv->mc13783, mc13783_regulators[id].reg, &val);
149 mc13783_unlock(priv->mc13783);
150
151 if (ret)
152 return ret;
153
154 return (val & mc13783_regulators[id].enable_bit) != 0;
155}
156
157static struct regulator_ops mc13783_regulator_ops = {
158 .enable = mc13783_regulator_enable,
159 .disable = mc13783_regulator_disable,
160 .is_enabled = mc13783_regulator_is_enabled,
161};
162
163static int __devinit mc13783_regulator_probe(struct platform_device *pdev)
164{
165 struct mc13783_regulator_priv *priv;
166 struct mc13783 *mc13783 = dev_get_drvdata(pdev->dev.parent);
167 struct mc13783_regulator_platform_data *pdata =
168 dev_get_platdata(&pdev->dev);
169 struct mc13783_regulator_init_data *init_data;
170 int i, ret;
171
172 dev_dbg(&pdev->dev, "mc13783_regulator_probe id %d\n", pdev->id);
173
174 priv = kzalloc(sizeof(*priv) +
175 pdata->num_regulators * sizeof(priv->regulators[0]),
176 GFP_KERNEL);
177 if (!priv)
178 return -ENOMEM;
179
180 priv->mc13783 = mc13783;
181
182 for (i = 0; i < pdata->num_regulators; i++) {
183 init_data = &pdata->regulators[i];
184 priv->regulators[i] = regulator_register(
185 &mc13783_regulators[init_data->id].desc,
186 &pdev->dev, init_data->init_data, priv);
187
188 if (IS_ERR(priv->regulators[i])) {
189 dev_err(&pdev->dev, "failed to register regulator %s\n",
190 mc13783_regulators[i].desc.name);
191 ret = PTR_ERR(priv->regulators[i]);
192 goto err;
193 }
194 }
195
196 platform_set_drvdata(pdev, priv);
197
198 return 0;
199err:
200 while (--i >= 0)
201 regulator_unregister(priv->regulators[i]);
202
203 kfree(priv);
204
205 return ret;
206}
207
208static int __devexit mc13783_regulator_remove(struct platform_device *pdev)
209{
210 struct mc13783_regulator_priv *priv = platform_get_drvdata(pdev);
211 struct mc13783_regulator_platform_data *pdata =
212 dev_get_platdata(&pdev->dev);
213 int i;
214
215 for (i = 0; i < pdata->num_regulators; i++)
216 regulator_unregister(priv->regulators[i]);
217
218 return 0;
219}
220
221static struct platform_driver mc13783_regulator_driver = {
222 .driver = {
223 .name = "mc13783-regulator",
224 .owner = THIS_MODULE,
225 },
226 .remove = __devexit_p(mc13783_regulator_remove),
227 .probe = mc13783_regulator_probe,
228};
229
230static int __init mc13783_regulator_init(void)
231{
232 return platform_driver_register(&mc13783_regulator_driver);
233}
234subsys_initcall(mc13783_regulator_init);
235
236static void __exit mc13783_regulator_exit(void)
237{
238 platform_driver_unregister(&mc13783_regulator_driver);
239}
240module_exit(mc13783_regulator_exit);
241
242MODULE_LICENSE("GPL v2");
243MODULE_AUTHOR("Sascha Hauer <s.hauer@pengutronix.de");
244MODULE_DESCRIPTION("Regulator Driver for Freescale MC13783 PMIC");
245MODULE_ALIAS("platform:mc13783-regulator");
diff --git a/drivers/regulator/mc13783.c b/drivers/regulator/mc13783.c
deleted file mode 100644
index 710211f67449..000000000000
--- a/drivers/regulator/mc13783.c
+++ /dev/null
@@ -1,410 +0,0 @@
1/*
2 * Regulator Driver for Freescale MC13783 PMIC
3 *
4 * Copyright (C) 2008 Sascha Hauer, Pengutronix <s.hauer@pengutronix.de>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#include <linux/mfd/mc13783-private.h>
12#include <linux/regulator/machine.h>
13#include <linux/regulator/driver.h>
14#include <linux/platform_device.h>
15#include <linux/mfd/mc13783.h>
16#include <linux/kernel.h>
17#include <linux/init.h>
18#include <linux/err.h>
19
20struct mc13783_regulator {
21 struct regulator_desc desc;
22 int reg;
23 int enable_bit;
24};
25
26static struct regulator_ops mc13783_regulator_ops;
27
28static struct mc13783_regulator mc13783_regulators[] = {
29 [MC13783_SW_SW3] = {
30 .desc = {
31 .name = "SW_SW3",
32 .ops = &mc13783_regulator_ops,
33 .type = REGULATOR_VOLTAGE,
34 .id = MC13783_SW_SW3,
35 .owner = THIS_MODULE,
36 },
37 .reg = MC13783_REG_SWITCHERS_5,
38 .enable_bit = MC13783_SWCTRL_SW3_EN,
39 },
40 [MC13783_SW_PLL] = {
41 .desc = {
42 .name = "SW_PLL",
43 .ops = &mc13783_regulator_ops,
44 .type = REGULATOR_VOLTAGE,
45 .id = MC13783_SW_PLL,
46 .owner = THIS_MODULE,
47 },
48 .reg = MC13783_REG_SWITCHERS_4,
49 .enable_bit = MC13783_SWCTRL_PLL_EN,
50 },
51 [MC13783_REGU_VAUDIO] = {
52 .desc = {
53 .name = "REGU_VAUDIO",
54 .ops = &mc13783_regulator_ops,
55 .type = REGULATOR_VOLTAGE,
56 .id = MC13783_REGU_VAUDIO,
57 .owner = THIS_MODULE,
58 },
59 .reg = MC13783_REG_REGULATOR_MODE_0,
60 .enable_bit = MC13783_REGCTRL_VAUDIO_EN,
61 },
62 [MC13783_REGU_VIOHI] = {
63 .desc = {
64 .name = "REGU_VIOHI",
65 .ops = &mc13783_regulator_ops,
66 .type = REGULATOR_VOLTAGE,
67 .id = MC13783_REGU_VIOHI,
68 .owner = THIS_MODULE,
69 },
70 .reg = MC13783_REG_REGULATOR_MODE_0,
71 .enable_bit = MC13783_REGCTRL_VIOHI_EN,
72 },
73 [MC13783_REGU_VIOLO] = {
74 .desc = {
75 .name = "REGU_VIOLO",
76 .ops = &mc13783_regulator_ops,
77 .type = REGULATOR_VOLTAGE,
78 .id = MC13783_REGU_VIOLO,
79 .owner = THIS_MODULE,
80 },
81 .reg = MC13783_REG_REGULATOR_MODE_0,
82 .enable_bit = MC13783_REGCTRL_VIOLO_EN,
83 },
84 [MC13783_REGU_VDIG] = {
85 .desc = {
86 .name = "REGU_VDIG",
87 .ops = &mc13783_regulator_ops,
88 .type = REGULATOR_VOLTAGE,
89 .id = MC13783_REGU_VDIG,
90 .owner = THIS_MODULE,
91 },
92 .reg = MC13783_REG_REGULATOR_MODE_0,
93 .enable_bit = MC13783_REGCTRL_VDIG_EN,
94 },
95 [MC13783_REGU_VGEN] = {
96 .desc = {
97 .name = "REGU_VGEN",
98 .ops = &mc13783_regulator_ops,
99 .type = REGULATOR_VOLTAGE,
100 .id = MC13783_REGU_VGEN,
101 .owner = THIS_MODULE,
102 },
103 .reg = MC13783_REG_REGULATOR_MODE_0,
104 .enable_bit = MC13783_REGCTRL_VGEN_EN,
105 },
106 [MC13783_REGU_VRFDIG] = {
107 .desc = {
108 .name = "REGU_VRFDIG",
109 .ops = &mc13783_regulator_ops,
110 .type = REGULATOR_VOLTAGE,
111 .id = MC13783_REGU_VRFDIG,
112 .owner = THIS_MODULE,
113 },
114 .reg = MC13783_REG_REGULATOR_MODE_0,
115 .enable_bit = MC13783_REGCTRL_VRFDIG_EN,
116 },
117 [MC13783_REGU_VRFREF] = {
118 .desc = {
119 .name = "REGU_VRFREF",
120 .ops = &mc13783_regulator_ops,
121 .type = REGULATOR_VOLTAGE,
122 .id = MC13783_REGU_VRFREF,
123 .owner = THIS_MODULE,
124 },
125 .reg = MC13783_REG_REGULATOR_MODE_0,
126 .enable_bit = MC13783_REGCTRL_VRFREF_EN,
127 },
128 [MC13783_REGU_VRFCP] = {
129 .desc = {
130 .name = "REGU_VRFCP",
131 .ops = &mc13783_regulator_ops,
132 .type = REGULATOR_VOLTAGE,
133 .id = MC13783_REGU_VRFCP,
134 .owner = THIS_MODULE,
135 },
136 .reg = MC13783_REG_REGULATOR_MODE_0,
137 .enable_bit = MC13783_REGCTRL_VRFCP_EN,
138 },
139 [MC13783_REGU_VSIM] = {
140 .desc = {
141 .name = "REGU_VSIM",
142 .ops = &mc13783_regulator_ops,
143 .type = REGULATOR_VOLTAGE,
144 .id = MC13783_REGU_VSIM,
145 .owner = THIS_MODULE,
146 },
147 .reg = MC13783_REG_REGULATOR_MODE_1,
148 .enable_bit = MC13783_REGCTRL_VSIM_EN,
149 },
150 [MC13783_REGU_VESIM] = {
151 .desc = {
152 .name = "REGU_VESIM",
153 .ops = &mc13783_regulator_ops,
154 .type = REGULATOR_VOLTAGE,
155 .id = MC13783_REGU_VESIM,
156 .owner = THIS_MODULE,
157 },
158 .reg = MC13783_REG_REGULATOR_MODE_1,
159 .enable_bit = MC13783_REGCTRL_VESIM_EN,
160 },
161 [MC13783_REGU_VCAM] = {
162 .desc = {
163 .name = "REGU_VCAM",
164 .ops = &mc13783_regulator_ops,
165 .type = REGULATOR_VOLTAGE,
166 .id = MC13783_REGU_VCAM,
167 .owner = THIS_MODULE,
168 },
169 .reg = MC13783_REG_REGULATOR_MODE_1,
170 .enable_bit = MC13783_REGCTRL_VCAM_EN,
171 },
172 [MC13783_REGU_VRFBG] = {
173 .desc = {
174 .name = "REGU_VRFBG",
175 .ops = &mc13783_regulator_ops,
176 .type = REGULATOR_VOLTAGE,
177 .id = MC13783_REGU_VRFBG,
178 .owner = THIS_MODULE,
179 },
180 .reg = MC13783_REG_REGULATOR_MODE_1,
181 .enable_bit = MC13783_REGCTRL_VRFBG_EN,
182 },
183 [MC13783_REGU_VVIB] = {
184 .desc = {
185 .name = "REGU_VVIB",
186 .ops = &mc13783_regulator_ops,
187 .type = REGULATOR_VOLTAGE,
188 .id = MC13783_REGU_VVIB,
189 .owner = THIS_MODULE,
190 },
191 .reg = MC13783_REG_REGULATOR_MODE_1,
192 .enable_bit = MC13783_REGCTRL_VVIB_EN,
193 },
194 [MC13783_REGU_VRF1] = {
195 .desc = {
196 .name = "REGU_VRF1",
197 .ops = &mc13783_regulator_ops,
198 .type = REGULATOR_VOLTAGE,
199 .id = MC13783_REGU_VRF1,
200 .owner = THIS_MODULE,
201 },
202 .reg = MC13783_REG_REGULATOR_MODE_1,
203 .enable_bit = MC13783_REGCTRL_VRF1_EN,
204 },
205 [MC13783_REGU_VRF2] = {
206 .desc = {
207 .name = "REGU_VRF2",
208 .ops = &mc13783_regulator_ops,
209 .type = REGULATOR_VOLTAGE,
210 .id = MC13783_REGU_VRF2,
211 .owner = THIS_MODULE,
212 },
213 .reg = MC13783_REG_REGULATOR_MODE_1,
214 .enable_bit = MC13783_REGCTRL_VRF2_EN,
215 },
216 [MC13783_REGU_VMMC1] = {
217 .desc = {
218 .name = "REGU_VMMC1",
219 .ops = &mc13783_regulator_ops,
220 .type = REGULATOR_VOLTAGE,
221 .id = MC13783_REGU_VMMC1,
222 .owner = THIS_MODULE,
223 },
224 .reg = MC13783_REG_REGULATOR_MODE_1,
225 .enable_bit = MC13783_REGCTRL_VMMC1_EN,
226 },
227 [MC13783_REGU_VMMC2] = {
228 .desc = {
229 .name = "REGU_VMMC2",
230 .ops = &mc13783_regulator_ops,
231 .type = REGULATOR_VOLTAGE,
232 .id = MC13783_REGU_VMMC2,
233 .owner = THIS_MODULE,
234 },
235 .reg = MC13783_REG_REGULATOR_MODE_1,
236 .enable_bit = MC13783_REGCTRL_VMMC2_EN,
237 },
238 [MC13783_REGU_GPO1] = {
239 .desc = {
240 .name = "REGU_GPO1",
241 .ops = &mc13783_regulator_ops,
242 .type = REGULATOR_VOLTAGE,
243 .id = MC13783_REGU_GPO1,
244 .owner = THIS_MODULE,
245 },
246 .reg = MC13783_REG_POWER_MISCELLANEOUS,
247 .enable_bit = MC13783_REGCTRL_GPO1_EN,
248 },
249 [MC13783_REGU_GPO2] = {
250 .desc = {
251 .name = "REGU_GPO2",
252 .ops = &mc13783_regulator_ops,
253 .type = REGULATOR_VOLTAGE,
254 .id = MC13783_REGU_GPO2,
255 .owner = THIS_MODULE,
256 },
257 .reg = MC13783_REG_POWER_MISCELLANEOUS,
258 .enable_bit = MC13783_REGCTRL_GPO2_EN,
259 },
260 [MC13783_REGU_GPO3] = {
261 .desc = {
262 .name = "REGU_GPO3",
263 .ops = &mc13783_regulator_ops,
264 .type = REGULATOR_VOLTAGE,
265 .id = MC13783_REGU_GPO3,
266 .owner = THIS_MODULE,
267 },
268 .reg = MC13783_REG_POWER_MISCELLANEOUS,
269 .enable_bit = MC13783_REGCTRL_GPO3_EN,
270 },
271 [MC13783_REGU_GPO4] = {
272 .desc = {
273 .name = "REGU_GPO4",
274 .ops = &mc13783_regulator_ops,
275 .type = REGULATOR_VOLTAGE,
276 .id = MC13783_REGU_GPO4,
277 .owner = THIS_MODULE,
278 },
279 .reg = MC13783_REG_POWER_MISCELLANEOUS,
280 .enable_bit = MC13783_REGCTRL_GPO4_EN,
281 },
282};
283
284struct mc13783_priv {
285 struct regulator_desc desc[ARRAY_SIZE(mc13783_regulators)];
286 struct mc13783 *mc13783;
287 struct regulator_dev *regulators[0];
288};
289
290static int mc13783_enable(struct regulator_dev *rdev)
291{
292 struct mc13783_priv *priv = rdev_get_drvdata(rdev);
293 int id = rdev_get_id(rdev);
294
295 dev_dbg(rdev_get_dev(rdev), "%s id: %d\n", __func__, id);
296
297 return mc13783_set_bits(priv->mc13783, mc13783_regulators[id].reg,
298 mc13783_regulators[id].enable_bit,
299 mc13783_regulators[id].enable_bit);
300}
301
302static int mc13783_disable(struct regulator_dev *rdev)
303{
304 struct mc13783_priv *priv = rdev_get_drvdata(rdev);
305 int id = rdev_get_id(rdev);
306
307 dev_dbg(rdev_get_dev(rdev), "%s id: %d\n", __func__, id);
308
309 return mc13783_set_bits(priv->mc13783, mc13783_regulators[id].reg,
310 mc13783_regulators[id].enable_bit, 0);
311}
312
313static int mc13783_is_enabled(struct regulator_dev *rdev)
314{
315 struct mc13783_priv *priv = rdev_get_drvdata(rdev);
316 int ret, id = rdev_get_id(rdev);
317 unsigned int val;
318
319 ret = mc13783_reg_read(priv->mc13783, mc13783_regulators[id].reg, &val);
320 if (ret)
321 return ret;
322
323 return (val & mc13783_regulators[id].enable_bit) != 0;
324}
325
326static struct regulator_ops mc13783_regulator_ops = {
327 .enable = mc13783_enable,
328 .disable = mc13783_disable,
329 .is_enabled = mc13783_is_enabled,
330};
331
332static int __devinit mc13783_regulator_probe(struct platform_device *pdev)
333{
334 struct mc13783_priv *priv;
335 struct mc13783 *mc13783 = dev_get_drvdata(pdev->dev.parent);
336 struct mc13783_regulator_init_data *init_data;
337 int i, ret;
338
339 dev_dbg(&pdev->dev, "mc13783_regulator_probe id %d\n", pdev->id);
340
341 priv = kzalloc(sizeof(*priv) + mc13783->num_regulators * sizeof(void *),
342 GFP_KERNEL);
343 if (!priv)
344 return -ENOMEM;
345
346 priv->mc13783 = mc13783;
347
348 for (i = 0; i < mc13783->num_regulators; i++) {
349 init_data = &mc13783->regulators[i];
350 priv->regulators[i] = regulator_register(
351 &mc13783_regulators[init_data->id].desc,
352 &pdev->dev, init_data->init_data, priv);
353
354 if (IS_ERR(priv->regulators[i])) {
355 dev_err(&pdev->dev, "failed to register regulator %s\n",
356 mc13783_regulators[i].desc.name);
357 ret = PTR_ERR(priv->regulators[i]);
358 goto err;
359 }
360 }
361
362 platform_set_drvdata(pdev, priv);
363
364 return 0;
365err:
366 while (--i >= 0)
367 regulator_unregister(priv->regulators[i]);
368
369 kfree(priv);
370
371 return ret;
372}
373
374static int __devexit mc13783_regulator_remove(struct platform_device *pdev)
375{
376 struct mc13783_priv *priv = platform_get_drvdata(pdev);
377 struct mc13783 *mc13783 = priv->mc13783;
378 int i;
379
380 for (i = 0; i < mc13783->num_regulators; i++)
381 regulator_unregister(priv->regulators[i]);
382
383 return 0;
384}
385
386static struct platform_driver mc13783_regulator_driver = {
387 .driver = {
388 .name = "mc13783-regulator",
389 .owner = THIS_MODULE,
390 },
391 .remove = __devexit_p(mc13783_regulator_remove),
392};
393
394static int __init mc13783_regulator_init(void)
395{
396 return platform_driver_probe(&mc13783_regulator_driver,
397 mc13783_regulator_probe);
398}
399subsys_initcall(mc13783_regulator_init);
400
401static void __exit mc13783_regulator_exit(void)
402{
403 platform_driver_unregister(&mc13783_regulator_driver);
404}
405module_exit(mc13783_regulator_exit);
406
407MODULE_LICENSE("GPL");
408MODULE_AUTHOR("Sascha Hauer <s.hauer@pengutronix.de");
409MODULE_DESCRIPTION("Regulator Driver for Freescale MC13783 PMIC");
410MODULE_ALIAS("platform:mc13783-regulator");
diff --git a/drivers/regulator/twl-regulator.c b/drivers/regulator/twl-regulator.c
index 7ea1c3a31081..7e674859bd59 100644
--- a/drivers/regulator/twl-regulator.c
+++ b/drivers/regulator/twl-regulator.c
@@ -12,6 +12,7 @@
12#include <linux/module.h> 12#include <linux/module.h>
13#include <linux/init.h> 13#include <linux/init.h>
14#include <linux/err.h> 14#include <linux/err.h>
15#include <linux/delay.h>
15#include <linux/platform_device.h> 16#include <linux/platform_device.h>
16#include <linux/regulator/driver.h> 17#include <linux/regulator/driver.h>
17#include <linux/regulator/machine.h> 18#include <linux/regulator/machine.h>
@@ -40,6 +41,12 @@ struct twlreg_info {
40 u8 table_len; 41 u8 table_len;
41 const u16 *table; 42 const u16 *table;
42 43
44 /* regulator specific turn-on delay */
45 u16 delay;
46
47 /* State REMAP default configuration */
48 u8 remap;
49
43 /* chip constraints on regulator behavior */ 50 /* chip constraints on regulator behavior */
44 u16 min_mV; 51 u16 min_mV;
45 52
@@ -128,6 +135,7 @@ static int twlreg_enable(struct regulator_dev *rdev)
128{ 135{
129 struct twlreg_info *info = rdev_get_drvdata(rdev); 136 struct twlreg_info *info = rdev_get_drvdata(rdev);
130 int grp; 137 int grp;
138 int ret;
131 139
132 grp = twlreg_read(info, TWL_MODULE_PM_RECEIVER, VREG_GRP); 140 grp = twlreg_read(info, TWL_MODULE_PM_RECEIVER, VREG_GRP);
133 if (grp < 0) 141 if (grp < 0)
@@ -138,7 +146,11 @@ static int twlreg_enable(struct regulator_dev *rdev)
138 else 146 else
139 grp |= P1_GRP_6030; 147 grp |= P1_GRP_6030;
140 148
141 return twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_GRP, grp); 149 ret = twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_GRP, grp);
150
151 udelay(info->delay);
152
153 return ret;
142} 154}
143 155
144static int twlreg_disable(struct regulator_dev *rdev) 156static int twlreg_disable(struct regulator_dev *rdev)
@@ -151,9 +163,9 @@ static int twlreg_disable(struct regulator_dev *rdev)
151 return grp; 163 return grp;
152 164
153 if (twl_class_is_4030()) 165 if (twl_class_is_4030())
154 grp &= ~P1_GRP_4030; 166 grp &= ~(P1_GRP_4030 | P2_GRP_4030 | P3_GRP_4030);
155 else 167 else
156 grp &= ~P1_GRP_6030; 168 grp &= ~(P1_GRP_6030 | P2_GRP_6030 | P3_GRP_6030);
157 169
158 return twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_GRP, grp); 170 return twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_GRP, grp);
159} 171}
@@ -294,6 +306,18 @@ static const u16 VSIM_VSEL_table[] = {
294static const u16 VDAC_VSEL_table[] = { 306static const u16 VDAC_VSEL_table[] = {
295 1200, 1300, 1800, 1800, 307 1200, 1300, 1800, 1800,
296}; 308};
309static const u16 VDD1_VSEL_table[] = {
310 800, 1450,
311};
312static const u16 VDD2_VSEL_table[] = {
313 800, 1450, 1500,
314};
315static const u16 VIO_VSEL_table[] = {
316 1800, 1850,
317};
318static const u16 VINTANA2_VSEL_table[] = {
319 2500, 2750,
320};
297static const u16 VAUX1_6030_VSEL_table[] = { 321static const u16 VAUX1_6030_VSEL_table[] = {
298 1000, 1300, 1800, 2500, 322 1000, 1300, 1800, 2500,
299 2800, 2900, 3000, 3000, 323 2800, 2900, 3000, 3000,
@@ -414,20 +438,30 @@ static struct regulator_ops twlfixed_ops = {
414 438
415/*----------------------------------------------------------------------*/ 439/*----------------------------------------------------------------------*/
416 440
417#define TWL4030_ADJUSTABLE_LDO(label, offset, num) \ 441#define TWL4030_ADJUSTABLE_LDO(label, offset, num, turnon_delay, remap_conf) \
418 TWL_ADJUSTABLE_LDO(label, offset, num, TWL4030) 442 TWL_ADJUSTABLE_LDO(label, offset, num, turnon_delay, \
419#define TWL4030_FIXED_LDO(label, offset, mVolts, num) \ 443 remap_conf, TWL4030)
420 TWL_FIXED_LDO(label, offset, mVolts, num, TWL4030) 444#define TWL4030_FIXED_LDO(label, offset, mVolts, num, turnon_delay, \
421#define TWL6030_ADJUSTABLE_LDO(label, offset, num) \ 445 remap_conf) \
422 TWL_ADJUSTABLE_LDO(label, offset, num, TWL6030) 446 TWL_FIXED_LDO(label, offset, mVolts, num, turnon_delay, \
423#define TWL6030_FIXED_LDO(label, offset, mVolts, num) \ 447 remap_conf, TWL4030)
424 TWL_FIXED_LDO(label, offset, mVolts, num, TWL6030) 448#define TWL6030_ADJUSTABLE_LDO(label, offset, num, turnon_delay, \
425 449 remap_conf) \
426#define TWL_ADJUSTABLE_LDO(label, offset, num, family) { \ 450 TWL_ADJUSTABLE_LDO(label, offset, num, turnon_delay, \
451 remap_conf, TWL6030)
452#define TWL6030_FIXED_LDO(label, offset, mVolts, num, turnon_delay, \
453 remap_conf) \
454 TWL_FIXED_LDO(label, offset, mVolts, num, turnon_delay, \
455 remap_conf, TWL6030)
456
457#define TWL_ADJUSTABLE_LDO(label, offset, num, turnon_delay, remap_conf, \
458 family) { \
427 .base = offset, \ 459 .base = offset, \
428 .id = num, \ 460 .id = num, \
429 .table_len = ARRAY_SIZE(label##_VSEL_table), \ 461 .table_len = ARRAY_SIZE(label##_VSEL_table), \
430 .table = label##_VSEL_table, \ 462 .table = label##_VSEL_table, \
463 .delay = turnon_delay, \
464 .remap = remap_conf, \
431 .desc = { \ 465 .desc = { \
432 .name = #label, \ 466 .name = #label, \
433 .id = family##_REG_##label, \ 467 .id = family##_REG_##label, \
@@ -438,10 +472,13 @@ static struct regulator_ops twlfixed_ops = {
438 }, \ 472 }, \
439 } 473 }
440 474
441#define TWL_FIXED_LDO(label, offset, mVolts, num, family) { \ 475#define TWL_FIXED_LDO(label, offset, mVolts, num, turnon_delay, remap_conf, \
476 family) { \
442 .base = offset, \ 477 .base = offset, \
443 .id = num, \ 478 .id = num, \
444 .min_mV = mVolts, \ 479 .min_mV = mVolts, \
480 .delay = turnon_delay, \
481 .remap = remap_conf, \
445 .desc = { \ 482 .desc = { \
446 .name = #label, \ 483 .name = #label, \
447 .id = family##_REG_##label, \ 484 .id = family##_REG_##label, \
@@ -457,43 +494,41 @@ static struct regulator_ops twlfixed_ops = {
457 * software control over them after boot. 494 * software control over them after boot.
458 */ 495 */
459static struct twlreg_info twl_regs[] = { 496static struct twlreg_info twl_regs[] = {
460 TWL4030_ADJUSTABLE_LDO(VAUX1, 0x17, 1), 497 TWL4030_ADJUSTABLE_LDO(VAUX1, 0x17, 1, 100, 0x08),
461 TWL4030_ADJUSTABLE_LDO(VAUX2_4030, 0x1b, 2), 498 TWL4030_ADJUSTABLE_LDO(VAUX2_4030, 0x1b, 2, 100, 0x08),
462 TWL4030_ADJUSTABLE_LDO(VAUX2, 0x1b, 2), 499 TWL4030_ADJUSTABLE_LDO(VAUX2, 0x1b, 2, 100, 0x08),
463 TWL4030_ADJUSTABLE_LDO(VAUX3, 0x1f, 3), 500 TWL4030_ADJUSTABLE_LDO(VAUX3, 0x1f, 3, 100, 0x08),
464 TWL4030_ADJUSTABLE_LDO(VAUX4, 0x23, 4), 501 TWL4030_ADJUSTABLE_LDO(VAUX4, 0x23, 4, 100, 0x08),
465 TWL4030_ADJUSTABLE_LDO(VMMC1, 0x27, 5), 502 TWL4030_ADJUSTABLE_LDO(VMMC1, 0x27, 5, 100, 0x08),
466 TWL4030_ADJUSTABLE_LDO(VMMC2, 0x2b, 6), 503 TWL4030_ADJUSTABLE_LDO(VMMC2, 0x2b, 6, 100, 0x08),
467 /* 504 TWL4030_ADJUSTABLE_LDO(VPLL1, 0x2f, 7, 100, 0x00),
468 TWL4030_ADJUSTABLE_LDO(VPLL1, 0x2f, 7), 505 TWL4030_ADJUSTABLE_LDO(VPLL2, 0x33, 8, 100, 0x08),
469 */ 506 TWL4030_ADJUSTABLE_LDO(VSIM, 0x37, 9, 100, 0x00),
470 TWL4030_ADJUSTABLE_LDO(VPLL2, 0x33, 8), 507 TWL4030_ADJUSTABLE_LDO(VDAC, 0x3b, 10, 100, 0x08),
471 TWL4030_ADJUSTABLE_LDO(VSIM, 0x37, 9), 508 TWL4030_FIXED_LDO(VINTANA1, 0x3f, 1500, 11, 100, 0x08),
472 TWL4030_ADJUSTABLE_LDO(VDAC, 0x3b, 10), 509 TWL4030_ADJUSTABLE_LDO(VINTANA2, 0x43, 12, 100, 0x08),
473 /* 510 TWL4030_FIXED_LDO(VINTDIG, 0x47, 1500, 13, 100, 0x08),
474 TWL4030_ADJUSTABLE_LDO(VINTANA1, 0x3f, 11), 511 TWL4030_ADJUSTABLE_LDO(VIO, 0x4b, 14, 1000, 0x08),
475 TWL4030_ADJUSTABLE_LDO(VINTANA2, 0x43, 12), 512 TWL4030_ADJUSTABLE_LDO(VDD1, 0x55, 15, 1000, 0x08),
476 TWL4030_ADJUSTABLE_LDO(VINTDIG, 0x47, 13), 513 TWL4030_ADJUSTABLE_LDO(VDD2, 0x63, 16, 1000, 0x08),
477 TWL4030_SMPS(VIO, 0x4b, 14), 514 TWL4030_FIXED_LDO(VUSB1V5, 0x71, 1500, 17, 100, 0x08),
478 TWL4030_SMPS(VDD1, 0x55, 15), 515 TWL4030_FIXED_LDO(VUSB1V8, 0x74, 1800, 18, 100, 0x08),
479 TWL4030_SMPS(VDD2, 0x63, 16), 516 TWL4030_FIXED_LDO(VUSB3V1, 0x77, 3100, 19, 150, 0x08),
480 */
481 TWL4030_FIXED_LDO(VUSB1V5, 0x71, 1500, 17),
482 TWL4030_FIXED_LDO(VUSB1V8, 0x74, 1800, 18),
483 TWL4030_FIXED_LDO(VUSB3V1, 0x77, 3100, 19),
484 /* VUSBCP is managed *only* by the USB subchip */ 517 /* VUSBCP is managed *only* by the USB subchip */
485 518
486 /* 6030 REG with base as PMC Slave Misc : 0x0030 */ 519 /* 6030 REG with base as PMC Slave Misc : 0x0030 */
487 TWL6030_ADJUSTABLE_LDO(VAUX1_6030, 0x54, 1), 520 /* Turnon-delay and remap configuration values for 6030 are not
488 TWL6030_ADJUSTABLE_LDO(VAUX2_6030, 0x58, 2), 521 verified since the specification is not public */
489 TWL6030_ADJUSTABLE_LDO(VAUX3_6030, 0x5c, 3), 522 TWL6030_ADJUSTABLE_LDO(VAUX1_6030, 0x54, 1, 0, 0x08),
490 TWL6030_ADJUSTABLE_LDO(VMMC, 0x68, 4), 523 TWL6030_ADJUSTABLE_LDO(VAUX2_6030, 0x58, 2, 0, 0x08),
491 TWL6030_ADJUSTABLE_LDO(VPP, 0x6c, 5), 524 TWL6030_ADJUSTABLE_LDO(VAUX3_6030, 0x5c, 3, 0, 0x08),
492 TWL6030_ADJUSTABLE_LDO(VUSIM, 0x74, 7), 525 TWL6030_ADJUSTABLE_LDO(VMMC, 0x68, 4, 0, 0x08),
493 TWL6030_FIXED_LDO(VANA, 0x50, 2100, 15), 526 TWL6030_ADJUSTABLE_LDO(VPP, 0x6c, 5, 0, 0x08),
494 TWL6030_FIXED_LDO(VCXIO, 0x60, 1800, 16), 527 TWL6030_ADJUSTABLE_LDO(VUSIM, 0x74, 7, 0, 0x08),
495 TWL6030_FIXED_LDO(VDAC, 0x64, 1800, 17), 528 TWL6030_FIXED_LDO(VANA, 0x50, 2100, 15, 0, 0x08),
496 TWL6030_FIXED_LDO(VUSB, 0x70, 3300, 18) 529 TWL6030_FIXED_LDO(VCXIO, 0x60, 1800, 16, 0, 0x08),
530 TWL6030_FIXED_LDO(VDAC, 0x64, 1800, 17, 0, 0x08),
531 TWL6030_FIXED_LDO(VUSB, 0x70, 3300, 18, 0, 0x08)
497}; 532};
498 533
499static int twlreg_probe(struct platform_device *pdev) 534static int twlreg_probe(struct platform_device *pdev)
@@ -525,6 +560,19 @@ static int twlreg_probe(struct platform_device *pdev)
525 c->valid_ops_mask &= REGULATOR_CHANGE_VOLTAGE 560 c->valid_ops_mask &= REGULATOR_CHANGE_VOLTAGE
526 | REGULATOR_CHANGE_MODE 561 | REGULATOR_CHANGE_MODE
527 | REGULATOR_CHANGE_STATUS; 562 | REGULATOR_CHANGE_STATUS;
563 switch (pdev->id) {
564 case TWL4030_REG_VIO:
565 case TWL4030_REG_VDD1:
566 case TWL4030_REG_VDD2:
567 case TWL4030_REG_VPLL1:
568 case TWL4030_REG_VINTANA1:
569 case TWL4030_REG_VINTANA2:
570 case TWL4030_REG_VINTDIG:
571 c->always_on = true;
572 break;
573 default:
574 break;
575 }
528 576
529 rdev = regulator_register(&info->desc, &pdev->dev, initdata, info); 577 rdev = regulator_register(&info->desc, &pdev->dev, initdata, info);
530 if (IS_ERR(rdev)) { 578 if (IS_ERR(rdev)) {
@@ -534,6 +582,9 @@ static int twlreg_probe(struct platform_device *pdev)
534 } 582 }
535 platform_set_drvdata(pdev, rdev); 583 platform_set_drvdata(pdev, rdev);
536 584
585 twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_REMAP,
586 info->remap);
587
537 /* NOTE: many regulators support short-circuit IRQs (presentable 588 /* NOTE: many regulators support short-circuit IRQs (presentable
538 * as REGULATOR_OVER_CURRENT notifications?) configured via: 589 * as REGULATOR_OVER_CURRENT notifications?) configured via:
539 * - SC_CONFIG 590 * - SC_CONFIG
diff --git a/drivers/regulator/wm831x-dcdc.c b/drivers/regulator/wm831x-dcdc.c
index 2eefc1a0cf08..0a6577577e8d 100644
--- a/drivers/regulator/wm831x-dcdc.c
+++ b/drivers/regulator/wm831x-dcdc.c
@@ -19,6 +19,8 @@
19#include <linux/i2c.h> 19#include <linux/i2c.h>
20#include <linux/platform_device.h> 20#include <linux/platform_device.h>
21#include <linux/regulator/driver.h> 21#include <linux/regulator/driver.h>
22#include <linux/regulator/machine.h>
23#include <linux/gpio.h>
22 24
23#include <linux/mfd/wm831x/core.h> 25#include <linux/mfd/wm831x/core.h>
24#include <linux/mfd/wm831x/regulator.h> 26#include <linux/mfd/wm831x/regulator.h>
@@ -39,6 +41,7 @@
39#define WM831X_DCDC_CONTROL_2 1 41#define WM831X_DCDC_CONTROL_2 1
40#define WM831X_DCDC_ON_CONFIG 2 42#define WM831X_DCDC_ON_CONFIG 2
41#define WM831X_DCDC_SLEEP_CONTROL 3 43#define WM831X_DCDC_SLEEP_CONTROL 3
44#define WM831X_DCDC_DVS_CONTROL 4
42 45
43/* 46/*
44 * Shared 47 * Shared
@@ -50,6 +53,10 @@ struct wm831x_dcdc {
50 int base; 53 int base;
51 struct wm831x *wm831x; 54 struct wm831x *wm831x;
52 struct regulator_dev *regulator; 55 struct regulator_dev *regulator;
56 int dvs_gpio;
57 int dvs_gpio_state;
58 int on_vsel;
59 int dvs_vsel;
53}; 60};
54 61
55static int wm831x_dcdc_is_enabled(struct regulator_dev *rdev) 62static int wm831x_dcdc_is_enabled(struct regulator_dev *rdev)
@@ -240,11 +247,9 @@ static int wm831x_buckv_list_voltage(struct regulator_dev *rdev,
240 return -EINVAL; 247 return -EINVAL;
241} 248}
242 249
243static int wm831x_buckv_set_voltage_int(struct regulator_dev *rdev, int reg, 250static int wm831x_buckv_select_min_voltage(struct regulator_dev *rdev,
244 int min_uV, int max_uV) 251 int min_uV, int max_uV)
245{ 252{
246 struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
247 struct wm831x *wm831x = dcdc->wm831x;
248 u16 vsel; 253 u16 vsel;
249 254
250 if (min_uV < 600000) 255 if (min_uV < 600000)
@@ -257,39 +262,126 @@ static int wm831x_buckv_set_voltage_int(struct regulator_dev *rdev, int reg,
257 if (wm831x_buckv_list_voltage(rdev, vsel) > max_uV) 262 if (wm831x_buckv_list_voltage(rdev, vsel) > max_uV)
258 return -EINVAL; 263 return -EINVAL;
259 264
260 return wm831x_set_bits(wm831x, reg, WM831X_DC1_ON_VSEL_MASK, vsel); 265 return vsel;
266}
267
268static int wm831x_buckv_select_max_voltage(struct regulator_dev *rdev,
269 int min_uV, int max_uV)
270{
271 u16 vsel;
272
273 if (max_uV < 600000 || max_uV > 1800000)
274 return -EINVAL;
275
276 vsel = ((max_uV - 600000) / 12500) + 8;
277
278 if (wm831x_buckv_list_voltage(rdev, vsel) < min_uV ||
279 wm831x_buckv_list_voltage(rdev, vsel) < max_uV)
280 return -EINVAL;
281
282 return vsel;
283}
284
285static int wm831x_buckv_set_dvs(struct regulator_dev *rdev, int state)
286{
287 struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
288
289 if (state == dcdc->dvs_gpio_state)
290 return 0;
291
292 dcdc->dvs_gpio_state = state;
293 gpio_set_value(dcdc->dvs_gpio, state);
294
295 /* Should wait for DVS state change to be asserted if we have
296 * a GPIO for it, for now assume the device is configured
297 * for the fastest possible transition.
298 */
299
300 return 0;
261} 301}
262 302
263static int wm831x_buckv_set_voltage(struct regulator_dev *rdev, 303static int wm831x_buckv_set_voltage(struct regulator_dev *rdev,
264 int min_uV, int max_uV) 304 int min_uV, int max_uV)
265{ 305{
266 struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev); 306 struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
267 u16 reg = dcdc->base + WM831X_DCDC_ON_CONFIG; 307 struct wm831x *wm831x = dcdc->wm831x;
308 int on_reg = dcdc->base + WM831X_DCDC_ON_CONFIG;
309 int dvs_reg = dcdc->base + WM831X_DCDC_DVS_CONTROL;
310 int vsel, ret;
311
312 vsel = wm831x_buckv_select_min_voltage(rdev, min_uV, max_uV);
313 if (vsel < 0)
314 return vsel;
315
316 /* If this value is already set then do a GPIO update if we can */
317 if (dcdc->dvs_gpio && dcdc->on_vsel == vsel)
318 return wm831x_buckv_set_dvs(rdev, 0);
319
320 if (dcdc->dvs_gpio && dcdc->dvs_vsel == vsel)
321 return wm831x_buckv_set_dvs(rdev, 1);
322
323 /* Always set the ON status to the minimum voltage */
324 ret = wm831x_set_bits(wm831x, on_reg, WM831X_DC1_ON_VSEL_MASK, vsel);
325 if (ret < 0)
326 return ret;
327 dcdc->on_vsel = vsel;
328
329 if (!dcdc->dvs_gpio)
330 return ret;
331
332 /* Kick the voltage transition now */
333 ret = wm831x_buckv_set_dvs(rdev, 0);
334 if (ret < 0)
335 return ret;
336
337 /* Set the high voltage as the DVS voltage. This is optimised
338 * for CPUfreq usage, most processors will keep the maximum
339 * voltage constant and lower the minimum with the frequency. */
340 vsel = wm831x_buckv_select_max_voltage(rdev, min_uV, max_uV);
341 if (vsel < 0) {
342 /* This should never happen - at worst the same vsel
343 * should be chosen */
344 WARN_ON(vsel < 0);
345 return 0;
346 }
347
348 /* Don't bother if it's the same VSEL we're already using */
349 if (vsel == dcdc->on_vsel)
350 return 0;
268 351
269 return wm831x_buckv_set_voltage_int(rdev, reg, min_uV, max_uV); 352 ret = wm831x_set_bits(wm831x, dvs_reg, WM831X_DC1_DVS_VSEL_MASK, vsel);
353 if (ret == 0)
354 dcdc->dvs_vsel = vsel;
355 else
356 dev_warn(wm831x->dev, "Failed to set DCDC DVS VSEL: %d\n",
357 ret);
358
359 return 0;
270} 360}
271 361
272static int wm831x_buckv_set_suspend_voltage(struct regulator_dev *rdev, 362static int wm831x_buckv_set_suspend_voltage(struct regulator_dev *rdev,
273 int uV) 363 int uV)
274{ 364{
275 struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev); 365 struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
366 struct wm831x *wm831x = dcdc->wm831x;
276 u16 reg = dcdc->base + WM831X_DCDC_SLEEP_CONTROL; 367 u16 reg = dcdc->base + WM831X_DCDC_SLEEP_CONTROL;
368 int vsel;
369
370 vsel = wm831x_buckv_select_min_voltage(rdev, uV, uV);
371 if (vsel < 0)
372 return vsel;
277 373
278 return wm831x_buckv_set_voltage_int(rdev, reg, uV, uV); 374 return wm831x_set_bits(wm831x, reg, WM831X_DC1_SLP_VSEL_MASK, vsel);
279} 375}
280 376
281static int wm831x_buckv_get_voltage(struct regulator_dev *rdev) 377static int wm831x_buckv_get_voltage(struct regulator_dev *rdev)
282{ 378{
283 struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev); 379 struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
284 struct wm831x *wm831x = dcdc->wm831x;
285 u16 reg = dcdc->base + WM831X_DCDC_ON_CONFIG;
286 int val;
287 380
288 val = wm831x_reg_read(wm831x, reg); 381 if (dcdc->dvs_gpio && dcdc->dvs_gpio_state)
289 if (val < 0) 382 return wm831x_buckv_list_voltage(rdev, dcdc->dvs_vsel);
290 return val; 383 else
291 384 return wm831x_buckv_list_voltage(rdev, dcdc->on_vsel);
292 return wm831x_buckv_list_voltage(rdev, val & WM831X_DC1_ON_VSEL_MASK);
293} 385}
294 386
295/* Current limit options */ 387/* Current limit options */
@@ -346,6 +438,64 @@ static struct regulator_ops wm831x_buckv_ops = {
346 .set_suspend_mode = wm831x_dcdc_set_suspend_mode, 438 .set_suspend_mode = wm831x_dcdc_set_suspend_mode,
347}; 439};
348 440
441/*
442 * Set up DVS control. We just log errors since we can still run
443 * (with reduced performance) if we fail.
444 */
445static __devinit void wm831x_buckv_dvs_init(struct wm831x_dcdc *dcdc,
446 struct wm831x_buckv_pdata *pdata)
447{
448 struct wm831x *wm831x = dcdc->wm831x;
449 int ret;
450 u16 ctrl;
451
452 if (!pdata || !pdata->dvs_gpio)
453 return;
454
455 switch (pdata->dvs_control_src) {
456 case 1:
457 ctrl = 2 << WM831X_DC1_DVS_SRC_SHIFT;
458 break;
459 case 2:
460 ctrl = 3 << WM831X_DC1_DVS_SRC_SHIFT;
461 break;
462 default:
463 dev_err(wm831x->dev, "Invalid DVS control source %d for %s\n",
464 pdata->dvs_control_src, dcdc->name);
465 return;
466 }
467
468 ret = wm831x_set_bits(wm831x, dcdc->base + WM831X_DCDC_DVS_CONTROL,
469 WM831X_DC1_DVS_SRC_MASK, ctrl);
470 if (ret < 0) {
471 dev_err(wm831x->dev, "Failed to set %s DVS source: %d\n",
472 dcdc->name, ret);
473 return;
474 }
475
476 ret = gpio_request(pdata->dvs_gpio, "DCDC DVS");
477 if (ret < 0) {
478 dev_err(wm831x->dev, "Failed to get %s DVS GPIO: %d\n",
479 dcdc->name, ret);
480 return;
481 }
482
483 /* gpiolib won't let us read the GPIO status so pick the higher
484 * of the two existing voltages so we take it as platform data.
485 */
486 dcdc->dvs_gpio_state = pdata->dvs_init_state;
487
488 ret = gpio_direction_output(pdata->dvs_gpio, dcdc->dvs_gpio_state);
489 if (ret < 0) {
490 dev_err(wm831x->dev, "Failed to enable %s DVS GPIO: %d\n",
491 dcdc->name, ret);
492 gpio_free(pdata->dvs_gpio);
493 return;
494 }
495
496 dcdc->dvs_gpio = pdata->dvs_gpio;
497}
498
349static __devinit int wm831x_buckv_probe(struct platform_device *pdev) 499static __devinit int wm831x_buckv_probe(struct platform_device *pdev)
350{ 500{
351 struct wm831x *wm831x = dev_get_drvdata(pdev->dev.parent); 501 struct wm831x *wm831x = dev_get_drvdata(pdev->dev.parent);
@@ -384,6 +534,23 @@ static __devinit int wm831x_buckv_probe(struct platform_device *pdev)
384 dcdc->desc.ops = &wm831x_buckv_ops; 534 dcdc->desc.ops = &wm831x_buckv_ops;
385 dcdc->desc.owner = THIS_MODULE; 535 dcdc->desc.owner = THIS_MODULE;
386 536
537 ret = wm831x_reg_read(wm831x, dcdc->base + WM831X_DCDC_ON_CONFIG);
538 if (ret < 0) {
539 dev_err(wm831x->dev, "Failed to read ON VSEL: %d\n", ret);
540 goto err;
541 }
542 dcdc->on_vsel = ret & WM831X_DC1_ON_VSEL_MASK;
543
544 ret = wm831x_reg_read(wm831x, dcdc->base + WM831X_DCDC_ON_CONFIG);
545 if (ret < 0) {
546 dev_err(wm831x->dev, "Failed to read DVS VSEL: %d\n", ret);
547 goto err;
548 }
549 dcdc->dvs_vsel = ret & WM831X_DC1_DVS_VSEL_MASK;
550
551 if (pdata->dcdc[id])
552 wm831x_buckv_dvs_init(dcdc, pdata->dcdc[id]->driver_data);
553
387 dcdc->regulator = regulator_register(&dcdc->desc, &pdev->dev, 554 dcdc->regulator = regulator_register(&dcdc->desc, &pdev->dev,
388 pdata->dcdc[id], dcdc); 555 pdata->dcdc[id], dcdc);
389 if (IS_ERR(dcdc->regulator)) { 556 if (IS_ERR(dcdc->regulator)) {
@@ -422,6 +589,8 @@ err_uv:
422err_regulator: 589err_regulator:
423 regulator_unregister(dcdc->regulator); 590 regulator_unregister(dcdc->regulator);
424err: 591err:
592 if (dcdc->dvs_gpio)
593 gpio_free(dcdc->dvs_gpio);
425 kfree(dcdc); 594 kfree(dcdc);
426 return ret; 595 return ret;
427} 596}
@@ -434,6 +603,8 @@ static __devexit int wm831x_buckv_remove(struct platform_device *pdev)
434 wm831x_free_irq(wm831x, platform_get_irq_byname(pdev, "HC"), dcdc); 603 wm831x_free_irq(wm831x, platform_get_irq_byname(pdev, "HC"), dcdc);
435 wm831x_free_irq(wm831x, platform_get_irq_byname(pdev, "UV"), dcdc); 604 wm831x_free_irq(wm831x, platform_get_irq_byname(pdev, "UV"), dcdc);
436 regulator_unregister(dcdc->regulator); 605 regulator_unregister(dcdc->regulator);
606 if (dcdc->dvs_gpio)
607 gpio_free(dcdc->dvs_gpio);
437 kfree(dcdc); 608 kfree(dcdc);
438 609
439 return 0; 610 return 0;
diff --git a/drivers/regulator/wm831x-ldo.c b/drivers/regulator/wm831x-ldo.c
index 902db56ce099..61e02ac2fda3 100644
--- a/drivers/regulator/wm831x-ldo.c
+++ b/drivers/regulator/wm831x-ldo.c
@@ -470,7 +470,7 @@ static unsigned int wm831x_aldo_get_mode(struct regulator_dev *rdev)
470 struct wm831x_ldo *ldo = rdev_get_drvdata(rdev); 470 struct wm831x_ldo *ldo = rdev_get_drvdata(rdev);
471 struct wm831x *wm831x = ldo->wm831x; 471 struct wm831x *wm831x = ldo->wm831x;
472 int on_reg = ldo->base + WM831X_LDO_ON_CONTROL; 472 int on_reg = ldo->base + WM831X_LDO_ON_CONTROL;
473 unsigned int ret; 473 int ret;
474 474
475 ret = wm831x_reg_read(wm831x, on_reg); 475 ret = wm831x_reg_read(wm831x, on_reg);
476 if (ret < 0) 476 if (ret < 0)
diff --git a/drivers/regulator/wm8350-regulator.c b/drivers/regulator/wm8350-regulator.c
index 1bbff099a546..e7b89e704af6 100644
--- a/drivers/regulator/wm8350-regulator.c
+++ b/drivers/regulator/wm8350-regulator.c
@@ -1504,7 +1504,8 @@ int wm8350_register_led(struct wm8350 *wm8350, int lednum, int dcdc, int isink,
1504 led->isink_init.consumer_supplies = &led->isink_consumer; 1504 led->isink_init.consumer_supplies = &led->isink_consumer;
1505 led->isink_init.constraints.min_uA = 0; 1505 led->isink_init.constraints.min_uA = 0;
1506 led->isink_init.constraints.max_uA = pdata->max_uA; 1506 led->isink_init.constraints.max_uA = pdata->max_uA;
1507 led->isink_init.constraints.valid_ops_mask = REGULATOR_CHANGE_CURRENT; 1507 led->isink_init.constraints.valid_ops_mask
1508 = REGULATOR_CHANGE_CURRENT | REGULATOR_CHANGE_STATUS;
1508 led->isink_init.constraints.valid_modes_mask = REGULATOR_MODE_NORMAL; 1509 led->isink_init.constraints.valid_modes_mask = REGULATOR_MODE_NORMAL;
1509 ret = wm8350_register_regulator(wm8350, isink, &led->isink_init); 1510 ret = wm8350_register_regulator(wm8350, isink, &led->isink_init);
1510 if (ret != 0) { 1511 if (ret != 0) {
@@ -1517,6 +1518,7 @@ int wm8350_register_led(struct wm8350 *wm8350, int lednum, int dcdc, int isink,
1517 led->dcdc_init.num_consumer_supplies = 1; 1518 led->dcdc_init.num_consumer_supplies = 1;
1518 led->dcdc_init.consumer_supplies = &led->dcdc_consumer; 1519 led->dcdc_init.consumer_supplies = &led->dcdc_consumer;
1519 led->dcdc_init.constraints.valid_modes_mask = REGULATOR_MODE_NORMAL; 1520 led->dcdc_init.constraints.valid_modes_mask = REGULATOR_MODE_NORMAL;
1521 led->dcdc_init.constraints.valid_ops_mask = REGULATOR_CHANGE_STATUS;
1520 ret = wm8350_register_regulator(wm8350, dcdc, &led->dcdc_init); 1522 ret = wm8350_register_regulator(wm8350, dcdc, &led->dcdc_init);
1521 if (ret != 0) { 1523 if (ret != 0) {
1522 platform_device_put(pdev); 1524 platform_device_put(pdev);
diff --git a/drivers/rtc/rtc-cmos.c b/drivers/rtc/rtc-cmos.c
index eb154dc57164..e9aa814ddd23 100644
--- a/drivers/rtc/rtc-cmos.c
+++ b/drivers/rtc/rtc-cmos.c
@@ -686,7 +686,8 @@ cmos_do_probe(struct device *dev, struct resource *ports, int rtc_irq)
686 */ 686 */
687#if defined(CONFIG_ATARI) 687#if defined(CONFIG_ATARI)
688 address_space = 64; 688 address_space = 64;
689#elif defined(__i386__) || defined(__x86_64__) || defined(__arm__) || defined(__sparc__) 689#elif defined(__i386__) || defined(__x86_64__) || defined(__arm__) \
690 || defined(__sparc__) || defined(__mips__)
690 address_space = 128; 691 address_space = 128;
691#else 692#else
692#warning Assuming 128 bytes of RTC+NVRAM address space, not 64 bytes. 693#warning Assuming 128 bytes of RTC+NVRAM address space, not 64 bytes.
@@ -1095,9 +1096,9 @@ static int cmos_pnp_resume(struct pnp_dev *pnp)
1095#define cmos_pnp_resume NULL 1096#define cmos_pnp_resume NULL
1096#endif 1097#endif
1097 1098
1098static void cmos_pnp_shutdown(struct device *pdev) 1099static void cmos_pnp_shutdown(struct pnp_dev *pnp)
1099{ 1100{
1100 if (system_state == SYSTEM_POWER_OFF && !cmos_poweroff(pdev)) 1101 if (system_state == SYSTEM_POWER_OFF && !cmos_poweroff(&pnp->dev))
1101 return; 1102 return;
1102 1103
1103 cmos_do_shutdown(); 1104 cmos_do_shutdown();
@@ -1116,15 +1117,12 @@ static struct pnp_driver cmos_pnp_driver = {
1116 .id_table = rtc_ids, 1117 .id_table = rtc_ids,
1117 .probe = cmos_pnp_probe, 1118 .probe = cmos_pnp_probe,
1118 .remove = __exit_p(cmos_pnp_remove), 1119 .remove = __exit_p(cmos_pnp_remove),
1120 .shutdown = cmos_pnp_shutdown,
1119 1121
1120 /* flag ensures resume() gets called, and stops syslog spam */ 1122 /* flag ensures resume() gets called, and stops syslog spam */
1121 .flags = PNP_DRIVER_RES_DO_NOT_CHANGE, 1123 .flags = PNP_DRIVER_RES_DO_NOT_CHANGE,
1122 .suspend = cmos_pnp_suspend, 1124 .suspend = cmos_pnp_suspend,
1123 .resume = cmos_pnp_resume, 1125 .resume = cmos_pnp_resume,
1124 .driver = {
1125 .name = (char *)driver_name,
1126 .shutdown = cmos_pnp_shutdown,
1127 }
1128}; 1126};
1129 1127
1130#endif /* CONFIG_PNP */ 1128#endif /* CONFIG_PNP */
diff --git a/drivers/rtc/rtc-ds1305.c b/drivers/rtc/rtc-ds1305.c
index 259db7f3535b..9630e7d3314e 100644
--- a/drivers/rtc/rtc-ds1305.c
+++ b/drivers/rtc/rtc-ds1305.c
@@ -778,6 +778,8 @@ static int __devinit ds1305_probe(struct spi_device *spi)
778 spi->irq, status); 778 spi->irq, status);
779 goto fail1; 779 goto fail1;
780 } 780 }
781
782 device_set_wakeup_capable(&spi->dev, 1);
781 } 783 }
782 784
783 /* export NVRAM */ 785 /* export NVRAM */
diff --git a/drivers/rtc/rtc-ds1307.c b/drivers/rtc/rtc-ds1307.c
index 8a99da6f2f24..c4ec5c158aa1 100644
--- a/drivers/rtc/rtc-ds1307.c
+++ b/drivers/rtc/rtc-ds1307.c
@@ -881,6 +881,8 @@ read_rtc:
881 "unable to request IRQ!\n"); 881 "unable to request IRQ!\n");
882 goto exit_irq; 882 goto exit_irq;
883 } 883 }
884
885 device_set_wakeup_capable(&client->dev, 1);
884 set_bit(HAS_ALARM, &ds1307->flags); 886 set_bit(HAS_ALARM, &ds1307->flags);
885 dev_dbg(&client->dev, "got IRQ %d\n", client->irq); 887 dev_dbg(&client->dev, "got IRQ %d\n", client->irq);
886 } 888 }
diff --git a/drivers/rtc/rtc-ds1374.c b/drivers/rtc/rtc-ds1374.c
index 713f7bf5afb3..5317bbcbc7a0 100644
--- a/drivers/rtc/rtc-ds1374.c
+++ b/drivers/rtc/rtc-ds1374.c
@@ -383,6 +383,8 @@ static int ds1374_probe(struct i2c_client *client,
383 dev_err(&client->dev, "unable to request IRQ\n"); 383 dev_err(&client->dev, "unable to request IRQ\n");
384 goto out_free; 384 goto out_free;
385 } 385 }
386
387 device_set_wakeup_capable(&client->dev, 1);
386 } 388 }
387 389
388 ds1374->rtc = rtc_device_register(client->name, &client->dev, 390 ds1374->rtc = rtc_device_register(client->name, &client->dev,
diff --git a/drivers/rtc/rtc-fm3130.c b/drivers/rtc/rtc-fm3130.c
index 3a7be11cc6b9..812c66755083 100644
--- a/drivers/rtc/rtc-fm3130.c
+++ b/drivers/rtc/rtc-fm3130.c
@@ -376,20 +376,22 @@ static int __devinit fm3130_probe(struct i2c_client *client,
376 } 376 }
377 377
378 /* Disabling calibration mode */ 378 /* Disabling calibration mode */
379 if (fm3130->regs[FM3130_RTC_CONTROL] & FM3130_RTC_CONTROL_BIT_CAL) 379 if (fm3130->regs[FM3130_RTC_CONTROL] & FM3130_RTC_CONTROL_BIT_CAL) {
380 i2c_smbus_write_byte_data(client, FM3130_RTC_CONTROL, 380 i2c_smbus_write_byte_data(client, FM3130_RTC_CONTROL,
381 fm3130->regs[FM3130_RTC_CONTROL] & 381 fm3130->regs[FM3130_RTC_CONTROL] &
382 ~(FM3130_RTC_CONTROL_BIT_CAL)); 382 ~(FM3130_RTC_CONTROL_BIT_CAL));
383 dev_warn(&client->dev, "Disabling calibration mode!\n"); 383 dev_warn(&client->dev, "Disabling calibration mode!\n");
384 }
384 385
385 /* Disabling read and write modes */ 386 /* Disabling read and write modes */
386 if (fm3130->regs[FM3130_RTC_CONTROL] & FM3130_RTC_CONTROL_BIT_WRITE || 387 if (fm3130->regs[FM3130_RTC_CONTROL] & FM3130_RTC_CONTROL_BIT_WRITE ||
387 fm3130->regs[FM3130_RTC_CONTROL] & FM3130_RTC_CONTROL_BIT_READ) 388 fm3130->regs[FM3130_RTC_CONTROL] & FM3130_RTC_CONTROL_BIT_READ) {
388 i2c_smbus_write_byte_data(client, FM3130_RTC_CONTROL, 389 i2c_smbus_write_byte_data(client, FM3130_RTC_CONTROL,
389 fm3130->regs[FM3130_RTC_CONTROL] & 390 fm3130->regs[FM3130_RTC_CONTROL] &
390 ~(FM3130_RTC_CONTROL_BIT_READ | 391 ~(FM3130_RTC_CONTROL_BIT_READ |
391 FM3130_RTC_CONTROL_BIT_WRITE)); 392 FM3130_RTC_CONTROL_BIT_WRITE));
392 dev_warn(&client->dev, "Disabling READ or WRITE mode!\n"); 393 dev_warn(&client->dev, "Disabling READ or WRITE mode!\n");
394 }
393 395
394 /* oscillator off? turn it on, so clock can tick. */ 396 /* oscillator off? turn it on, so clock can tick. */
395 if (fm3130->regs[FM3130_CAL_CONTROL] & FM3130_CAL_CONTROL_BIT_nOSCEN) 397 if (fm3130->regs[FM3130_CAL_CONTROL] & FM3130_CAL_CONTROL_BIT_nOSCEN)
diff --git a/drivers/s390/block/dasd.c b/drivers/s390/block/dasd.c
index fdb2e7c14506..5905936c7c60 100644
--- a/drivers/s390/block/dasd.c
+++ b/drivers/s390/block/dasd.c
@@ -1004,8 +1004,8 @@ static void dasd_handle_killed_request(struct ccw_device *cdev,
1004 if (device == NULL || 1004 if (device == NULL ||
1005 device != dasd_device_from_cdev_locked(cdev) || 1005 device != dasd_device_from_cdev_locked(cdev) ||
1006 strncmp(device->discipline->ebcname, (char *) &cqr->magic, 4)) { 1006 strncmp(device->discipline->ebcname, (char *) &cqr->magic, 4)) {
1007 DBF_DEV_EVENT(DBF_DEBUG, device, "invalid device in request: " 1007 DBF_EVENT_DEVID(DBF_DEBUG, cdev, "%s",
1008 "bus_id %s", dev_name(&cdev->dev)); 1008 "invalid device in request");
1009 return; 1009 return;
1010 } 1010 }
1011 1011
@@ -1078,8 +1078,8 @@ void dasd_int_handler(struct ccw_device *cdev, unsigned long intparm,
1078 device = (struct dasd_device *) cqr->startdev; 1078 device = (struct dasd_device *) cqr->startdev;
1079 if (!device || 1079 if (!device ||
1080 strncmp(device->discipline->ebcname, (char *) &cqr->magic, 4)) { 1080 strncmp(device->discipline->ebcname, (char *) &cqr->magic, 4)) {
1081 DBF_DEV_EVENT(DBF_DEBUG, device, "invalid device in request: " 1081 DBF_EVENT_DEVID(DBF_DEBUG, cdev, "%s",
1082 "bus_id %s", dev_name(&cdev->dev)); 1082 "invalid device in request");
1083 return; 1083 return;
1084 } 1084 }
1085 1085
diff --git a/drivers/s390/block/dasd_alias.c b/drivers/s390/block/dasd_alias.c
index fd1231738ef4..148b1dd24070 100644
--- a/drivers/s390/block/dasd_alias.c
+++ b/drivers/s390/block/dasd_alias.c
@@ -218,7 +218,7 @@ int dasd_alias_make_device_known_to_lcu(struct dasd_device *device)
218 spin_unlock_irqrestore(&aliastree.lock, flags); 218 spin_unlock_irqrestore(&aliastree.lock, flags);
219 newlcu = _allocate_lcu(uid); 219 newlcu = _allocate_lcu(uid);
220 if (IS_ERR(newlcu)) 220 if (IS_ERR(newlcu))
221 return PTR_ERR(lcu); 221 return PTR_ERR(newlcu);
222 spin_lock_irqsave(&aliastree.lock, flags); 222 spin_lock_irqsave(&aliastree.lock, flags);
223 lcu = _find_lcu(server, uid); 223 lcu = _find_lcu(server, uid);
224 if (!lcu) { 224 if (!lcu) {
diff --git a/drivers/s390/block/dasd_diag.c b/drivers/s390/block/dasd_diag.c
index f64d0db881b4..6e14863f5c70 100644
--- a/drivers/s390/block/dasd_diag.c
+++ b/drivers/s390/block/dasd_diag.c
@@ -8,7 +8,7 @@
8 * 8 *
9 */ 9 */
10 10
11#define KMSG_COMPONENT "dasd-diag" 11#define KMSG_COMPONENT "dasd"
12 12
13#include <linux/stddef.h> 13#include <linux/stddef.h>
14#include <linux/kernel.h> 14#include <linux/kernel.h>
@@ -146,16 +146,16 @@ dasd_diag_erp(struct dasd_device *device)
146 rc = mdsk_init_io(device, device->block->bp_block, 0, NULL); 146 rc = mdsk_init_io(device, device->block->bp_block, 0, NULL);
147 if (rc == 4) { 147 if (rc == 4) {
148 if (!(device->features & DASD_FEATURE_READONLY)) { 148 if (!(device->features & DASD_FEATURE_READONLY)) {
149 dev_warn(&device->cdev->dev, 149 pr_warning("%s: The access mode of a DIAG device "
150 "The access mode of a DIAG device changed" 150 "changed to read-only\n",
151 " to read-only"); 151 dev_name(&device->cdev->dev));
152 device->features |= DASD_FEATURE_READONLY; 152 device->features |= DASD_FEATURE_READONLY;
153 } 153 }
154 rc = 0; 154 rc = 0;
155 } 155 }
156 if (rc) 156 if (rc)
157 dev_warn(&device->cdev->dev, "DIAG ERP failed with " 157 pr_warning("%s: DIAG ERP failed with "
158 "rc=%d\n", rc); 158 "rc=%d\n", dev_name(&device->cdev->dev), rc);
159} 159}
160 160
161/* Start a given request at the device. Return zero on success, non-zero 161/* Start a given request at the device. Return zero on success, non-zero
@@ -371,8 +371,9 @@ dasd_diag_check_device(struct dasd_device *device)
371 private->pt_block = 2; 371 private->pt_block = 2;
372 break; 372 break;
373 default: 373 default:
374 dev_warn(&device->cdev->dev, "Device type %d is not supported " 374 pr_warning("%s: Device type %d is not supported "
375 "in DIAG mode\n", private->rdc_data.vdev_class); 375 "in DIAG mode\n", dev_name(&device->cdev->dev),
376 private->rdc_data.vdev_class);
376 rc = -EOPNOTSUPP; 377 rc = -EOPNOTSUPP;
377 goto out; 378 goto out;
378 } 379 }
@@ -413,8 +414,8 @@ dasd_diag_check_device(struct dasd_device *device)
413 private->iob.flaga = DASD_DIAG_FLAGA_DEFAULT; 414 private->iob.flaga = DASD_DIAG_FLAGA_DEFAULT;
414 rc = dia250(&private->iob, RW_BIO); 415 rc = dia250(&private->iob, RW_BIO);
415 if (rc == 3) { 416 if (rc == 3) {
416 dev_warn(&device->cdev->dev, 417 pr_warning("%s: A 64-bit DIAG call failed\n",
417 "A 64-bit DIAG call failed\n"); 418 dev_name(&device->cdev->dev));
418 rc = -EOPNOTSUPP; 419 rc = -EOPNOTSUPP;
419 goto out_label; 420 goto out_label;
420 } 421 }
@@ -423,8 +424,9 @@ dasd_diag_check_device(struct dasd_device *device)
423 break; 424 break;
424 } 425 }
425 if (bsize > PAGE_SIZE) { 426 if (bsize > PAGE_SIZE) {
426 dev_warn(&device->cdev->dev, "Accessing the DASD failed because" 427 pr_warning("%s: Accessing the DASD failed because of an "
427 " of an incorrect format (rc=%d)\n", rc); 428 "incorrect format (rc=%d)\n",
429 dev_name(&device->cdev->dev), rc);
428 rc = -EIO; 430 rc = -EIO;
429 goto out_label; 431 goto out_label;
430 } 432 }
@@ -442,18 +444,18 @@ dasd_diag_check_device(struct dasd_device *device)
442 block->s2b_shift++; 444 block->s2b_shift++;
443 rc = mdsk_init_io(device, block->bp_block, 0, NULL); 445 rc = mdsk_init_io(device, block->bp_block, 0, NULL);
444 if (rc && (rc != 4)) { 446 if (rc && (rc != 4)) {
445 dev_warn(&device->cdev->dev, "DIAG initialization " 447 pr_warning("%s: DIAG initialization failed with rc=%d\n",
446 "failed with rc=%d\n", rc); 448 dev_name(&device->cdev->dev), rc);
447 rc = -EIO; 449 rc = -EIO;
448 } else { 450 } else {
449 if (rc == 4) 451 if (rc == 4)
450 device->features |= DASD_FEATURE_READONLY; 452 device->features |= DASD_FEATURE_READONLY;
451 dev_info(&device->cdev->dev, 453 pr_info("%s: New DASD with %ld byte/block, total size %ld "
452 "New DASD with %ld byte/block, total size %ld KB%s\n", 454 "KB%s\n", dev_name(&device->cdev->dev),
453 (unsigned long) block->bp_block, 455 (unsigned long) block->bp_block,
454 (unsigned long) (block->blocks << 456 (unsigned long) (block->blocks <<
455 block->s2b_shift) >> 1, 457 block->s2b_shift) >> 1,
456 (rc == 4) ? ", read-only device" : ""); 458 (rc == 4) ? ", read-only device" : "");
457 rc = 0; 459 rc = 0;
458 } 460 }
459out_label: 461out_label:
diff --git a/drivers/s390/block/dasd_eckd.c b/drivers/s390/block/dasd_eckd.c
index 5819dc02a143..1cca21aafaba 100644
--- a/drivers/s390/block/dasd_eckd.c
+++ b/drivers/s390/block/dasd_eckd.c
@@ -23,6 +23,7 @@
23#include <asm/debug.h> 23#include <asm/debug.h>
24#include <asm/idals.h> 24#include <asm/idals.h>
25#include <asm/ebcdic.h> 25#include <asm/ebcdic.h>
26#include <asm/compat.h>
26#include <asm/io.h> 27#include <asm/io.h>
27#include <asm/uaccess.h> 28#include <asm/uaccess.h>
28#include <asm/cio.h> 29#include <asm/cio.h>
@@ -2844,13 +2845,16 @@ static int dasd_symm_io(struct dasd_device *device, void __user *argp)
2844 rc = -EFAULT; 2845 rc = -EFAULT;
2845 if (copy_from_user(&usrparm, argp, sizeof(usrparm))) 2846 if (copy_from_user(&usrparm, argp, sizeof(usrparm)))
2846 goto out; 2847 goto out;
2847#ifndef CONFIG_64BIT 2848 if (is_compat_task() || sizeof(long) == 4) {
2848 /* Make sure pointers are sane even on 31 bit. */ 2849 /* Make sure pointers are sane even on 31 bit. */
2849 if ((usrparm.psf_data >> 32) != 0 || (usrparm.rssd_result >> 32) != 0) {
2850 rc = -EINVAL; 2850 rc = -EINVAL;
2851 goto out; 2851 if ((usrparm.psf_data >> 32) != 0)
2852 goto out;
2853 if ((usrparm.rssd_result >> 32) != 0)
2854 goto out;
2855 usrparm.psf_data &= 0x7fffffffULL;
2856 usrparm.rssd_result &= 0x7fffffffULL;
2852 } 2857 }
2853#endif
2854 /* alloc I/O data area */ 2858 /* alloc I/O data area */
2855 psf_data = kzalloc(usrparm.psf_data_len, GFP_KERNEL | GFP_DMA); 2859 psf_data = kzalloc(usrparm.psf_data_len, GFP_KERNEL | GFP_DMA);
2856 rssd_result = kzalloc(usrparm.rssd_result_len, GFP_KERNEL | GFP_DMA); 2860 rssd_result = kzalloc(usrparm.rssd_result_len, GFP_KERNEL | GFP_DMA);
@@ -3029,7 +3033,7 @@ static void dasd_eckd_dump_sense_ccw(struct dasd_device *device,
3029 len += sprintf(page + len, KERN_ERR PRINTK_HEADER 3033 len += sprintf(page + len, KERN_ERR PRINTK_HEADER
3030 " in req: %p CS: 0x%02X DS: 0x%02X CC: 0x%02X RC: %d\n", 3034 " in req: %p CS: 0x%02X DS: 0x%02X CC: 0x%02X RC: %d\n",
3031 req, scsw_cstat(&irb->scsw), scsw_dstat(&irb->scsw), 3035 req, scsw_cstat(&irb->scsw), scsw_dstat(&irb->scsw),
3032 scsw_cc(&irb->scsw), req->intrc); 3036 scsw_cc(&irb->scsw), req ? req->intrc : 0);
3033 len += sprintf(page + len, KERN_ERR PRINTK_HEADER 3037 len += sprintf(page + len, KERN_ERR PRINTK_HEADER
3034 " device %s: Failing CCW: %p\n", 3038 " device %s: Failing CCW: %p\n",
3035 dev_name(&device->cdev->dev), 3039 dev_name(&device->cdev->dev),
diff --git a/drivers/s390/block/dasd_ioctl.c b/drivers/s390/block/dasd_ioctl.c
index 478bcdb90b6f..7039d9cf0fb4 100644
--- a/drivers/s390/block/dasd_ioctl.c
+++ b/drivers/s390/block/dasd_ioctl.c
@@ -17,7 +17,7 @@
17#include <linux/fs.h> 17#include <linux/fs.h>
18#include <linux/blkpg.h> 18#include <linux/blkpg.h>
19#include <linux/smp_lock.h> 19#include <linux/smp_lock.h>
20 20#include <asm/compat.h>
21#include <asm/ccwdev.h> 21#include <asm/ccwdev.h>
22#include <asm/cmb.h> 22#include <asm/cmb.h>
23#include <asm/uaccess.h> 23#include <asm/uaccess.h>
@@ -260,7 +260,7 @@ static int dasd_ioctl_information(struct dasd_block *block,
260 struct ccw_dev_id dev_id; 260 struct ccw_dev_id dev_id;
261 261
262 base = block->base; 262 base = block->base;
263 if (!base->discipline->fill_info) 263 if (!base->discipline || !base->discipline->fill_info)
264 return -EINVAL; 264 return -EINVAL;
265 265
266 dasd_info = kzalloc(sizeof(struct dasd_information2_t), GFP_KERNEL); 266 dasd_info = kzalloc(sizeof(struct dasd_information2_t), GFP_KERNEL);
@@ -303,10 +303,7 @@ static int dasd_ioctl_information(struct dasd_block *block,
303 dasd_info->features |= 303 dasd_info->features |=
304 ((base->features & DASD_FEATURE_READONLY) != 0); 304 ((base->features & DASD_FEATURE_READONLY) != 0);
305 305
306 if (base->discipline) 306 memcpy(dasd_info->type, base->discipline->name, 4);
307 memcpy(dasd_info->type, base->discipline->name, 4);
308 else
309 memcpy(dasd_info->type, "none", 4);
310 307
311 if (block->request_queue->request_fn) { 308 if (block->request_queue->request_fn) {
312 struct list_head *l; 309 struct list_head *l;
@@ -358,9 +355,8 @@ dasd_ioctl_set_ro(struct block_device *bdev, void __user *argp)
358} 355}
359 356
360static int dasd_ioctl_readall_cmb(struct dasd_block *block, unsigned int cmd, 357static int dasd_ioctl_readall_cmb(struct dasd_block *block, unsigned int cmd,
361 unsigned long arg) 358 struct cmbdata __user *argp)
362{ 359{
363 struct cmbdata __user *argp = (void __user *) arg;
364 size_t size = _IOC_SIZE(cmd); 360 size_t size = _IOC_SIZE(cmd);
365 struct cmbdata data; 361 struct cmbdata data;
366 int ret; 362 int ret;
@@ -376,7 +372,12 @@ dasd_do_ioctl(struct block_device *bdev, fmode_t mode,
376 unsigned int cmd, unsigned long arg) 372 unsigned int cmd, unsigned long arg)
377{ 373{
378 struct dasd_block *block = bdev->bd_disk->private_data; 374 struct dasd_block *block = bdev->bd_disk->private_data;
379 void __user *argp = (void __user *)arg; 375 void __user *argp;
376
377 if (is_compat_task())
378 argp = compat_ptr(arg);
379 else
380 argp = (void __user *)arg;
380 381
381 if (!block) 382 if (!block)
382 return -ENODEV; 383 return -ENODEV;
@@ -414,7 +415,7 @@ dasd_do_ioctl(struct block_device *bdev, fmode_t mode,
414 case BIODASDCMFDISABLE: 415 case BIODASDCMFDISABLE:
415 return disable_cmf(block->base->cdev); 416 return disable_cmf(block->base->cdev);
416 case BIODASDREADALLCMB: 417 case BIODASDREADALLCMB:
417 return dasd_ioctl_readall_cmb(block, cmd, arg); 418 return dasd_ioctl_readall_cmb(block, cmd, argp);
418 default: 419 default:
419 /* if the discipline has an ioctl method try it. */ 420 /* if the discipline has an ioctl method try it. */
420 if (block->base->discipline->ioctl) { 421 if (block->base->discipline->ioctl) {
diff --git a/drivers/s390/block/dasd_proc.c b/drivers/s390/block/dasd_proc.c
index 6315fbd8e68b..71f95f54866f 100644
--- a/drivers/s390/block/dasd_proc.c
+++ b/drivers/s390/block/dasd_proc.c
@@ -72,7 +72,7 @@ dasd_devices_show(struct seq_file *m, void *v)
72 /* Print device number. */ 72 /* Print device number. */
73 seq_printf(m, "%s", dev_name(&device->cdev->dev)); 73 seq_printf(m, "%s", dev_name(&device->cdev->dev));
74 /* Print discipline string. */ 74 /* Print discipline string. */
75 if (device != NULL && device->discipline != NULL) 75 if (device->discipline != NULL)
76 seq_printf(m, "(%s)", device->discipline->name); 76 seq_printf(m, "(%s)", device->discipline->name);
77 else 77 else
78 seq_printf(m, "(none)"); 78 seq_printf(m, "(none)");
@@ -92,10 +92,7 @@ dasd_devices_show(struct seq_file *m, void *v)
92 substr = (device->features & DASD_FEATURE_READONLY) ? "(ro)" : " "; 92 substr = (device->features & DASD_FEATURE_READONLY) ? "(ro)" : " ";
93 seq_printf(m, "%4s: ", substr); 93 seq_printf(m, "%4s: ", substr);
94 /* Print device status information. */ 94 /* Print device status information. */
95 switch ((device != NULL) ? device->state : -1) { 95 switch (device->state) {
96 case -1:
97 seq_printf(m, "unknown");
98 break;
99 case DASD_STATE_NEW: 96 case DASD_STATE_NEW:
100 seq_printf(m, "new"); 97 seq_printf(m, "new");
101 break; 98 break;
diff --git a/drivers/s390/char/con3215.c b/drivers/s390/char/con3215.c
index 9d61683b5633..59ec073724bf 100644
--- a/drivers/s390/char/con3215.c
+++ b/drivers/s390/char/con3215.c
@@ -1037,22 +1037,6 @@ static void tty3215_flush_buffer(struct tty_struct *tty)
1037} 1037}
1038 1038
1039/* 1039/*
1040 * Currently we don't have any io controls for 3215 ttys
1041 */
1042static int tty3215_ioctl(struct tty_struct *tty, struct file * file,
1043 unsigned int cmd, unsigned long arg)
1044{
1045 if (tty->flags & (1 << TTY_IO_ERROR))
1046 return -EIO;
1047
1048 switch (cmd) {
1049 default:
1050 return -ENOIOCTLCMD;
1051 }
1052 return 0;
1053}
1054
1055/*
1056 * Disable reading from a 3215 tty 1040 * Disable reading from a 3215 tty
1057 */ 1041 */
1058static void tty3215_throttle(struct tty_struct * tty) 1042static void tty3215_throttle(struct tty_struct * tty)
@@ -1117,7 +1101,6 @@ static const struct tty_operations tty3215_ops = {
1117 .write_room = tty3215_write_room, 1101 .write_room = tty3215_write_room,
1118 .chars_in_buffer = tty3215_chars_in_buffer, 1102 .chars_in_buffer = tty3215_chars_in_buffer,
1119 .flush_buffer = tty3215_flush_buffer, 1103 .flush_buffer = tty3215_flush_buffer,
1120 .ioctl = tty3215_ioctl,
1121 .throttle = tty3215_throttle, 1104 .throttle = tty3215_throttle,
1122 .unthrottle = tty3215_unthrottle, 1105 .unthrottle = tty3215_unthrottle,
1123 .stop = tty3215_stop, 1106 .stop = tty3215_stop,
diff --git a/drivers/s390/char/fs3270.c b/drivers/s390/char/fs3270.c
index 28e4649fa9e4..31c59b0d6df0 100644
--- a/drivers/s390/char/fs3270.c
+++ b/drivers/s390/char/fs3270.c
@@ -15,6 +15,7 @@
15#include <linux/types.h> 15#include <linux/types.h>
16#include <linux/smp_lock.h> 16#include <linux/smp_lock.h>
17 17
18#include <asm/compat.h>
18#include <asm/ccwdev.h> 19#include <asm/ccwdev.h>
19#include <asm/cio.h> 20#include <asm/cio.h>
20#include <asm/ebcdic.h> 21#include <asm/ebcdic.h>
@@ -322,6 +323,7 @@ fs3270_write(struct file *filp, const char __user *data, size_t count, loff_t *o
322static long 323static long
323fs3270_ioctl(struct file *filp, unsigned int cmd, unsigned long arg) 324fs3270_ioctl(struct file *filp, unsigned int cmd, unsigned long arg)
324{ 325{
326 char __user *argp;
325 struct fs3270 *fp; 327 struct fs3270 *fp;
326 struct raw3270_iocb iocb; 328 struct raw3270_iocb iocb;
327 int rc; 329 int rc;
@@ -329,6 +331,10 @@ fs3270_ioctl(struct file *filp, unsigned int cmd, unsigned long arg)
329 fp = filp->private_data; 331 fp = filp->private_data;
330 if (!fp) 332 if (!fp)
331 return -ENODEV; 333 return -ENODEV;
334 if (is_compat_task())
335 argp = compat_ptr(arg);
336 else
337 argp = (char __user *)arg;
332 rc = 0; 338 rc = 0;
333 mutex_lock(&fs3270_mutex); 339 mutex_lock(&fs3270_mutex);
334 switch (cmd) { 340 switch (cmd) {
@@ -339,10 +345,10 @@ fs3270_ioctl(struct file *filp, unsigned int cmd, unsigned long arg)
339 fp->write_command = arg; 345 fp->write_command = arg;
340 break; 346 break;
341 case TUBGETI: 347 case TUBGETI:
342 rc = put_user(fp->read_command, (char __user *) arg); 348 rc = put_user(fp->read_command, argp);
343 break; 349 break;
344 case TUBGETO: 350 case TUBGETO:
345 rc = put_user(fp->write_command,(char __user *) arg); 351 rc = put_user(fp->write_command, argp);
346 break; 352 break;
347 case TUBGETMOD: 353 case TUBGETMOD:
348 iocb.model = fp->view.model; 354 iocb.model = fp->view.model;
@@ -351,8 +357,7 @@ fs3270_ioctl(struct file *filp, unsigned int cmd, unsigned long arg)
351 iocb.pf_cnt = 24; 357 iocb.pf_cnt = 24;
352 iocb.re_cnt = 20; 358 iocb.re_cnt = 20;
353 iocb.map = 0; 359 iocb.map = 0;
354 if (copy_to_user((char __user *) arg, &iocb, 360 if (copy_to_user(argp, &iocb, sizeof(struct raw3270_iocb)))
355 sizeof(struct raw3270_iocb)))
356 rc = -EFAULT; 361 rc = -EFAULT;
357 break; 362 break;
358 } 363 }
@@ -467,7 +472,7 @@ fs3270_open(struct inode *inode, struct file *filp)
467 if (IS_ERR(ib)) { 472 if (IS_ERR(ib)) {
468 raw3270_put_view(&fp->view); 473 raw3270_put_view(&fp->view);
469 raw3270_del_view(&fp->view); 474 raw3270_del_view(&fp->view);
470 rc = PTR_ERR(fp); 475 rc = PTR_ERR(ib);
471 goto out; 476 goto out;
472 } 477 }
473 fp->rdbuf = ib; 478 fp->rdbuf = ib;
@@ -511,8 +516,8 @@ static const struct file_operations fs3270_fops = {
511 .write = fs3270_write, /* write */ 516 .write = fs3270_write, /* write */
512 .unlocked_ioctl = fs3270_ioctl, /* ioctl */ 517 .unlocked_ioctl = fs3270_ioctl, /* ioctl */
513 .compat_ioctl = fs3270_ioctl, /* ioctl */ 518 .compat_ioctl = fs3270_ioctl, /* ioctl */
514 .open = fs3270_open, /* open */ 519 .open = fs3270_open, /* open */
515 .release = fs3270_close, /* release */ 520 .release = fs3270_close, /* release */
516}; 521};
517 522
518/* 523/*
diff --git a/drivers/s390/char/sclp_vt220.c b/drivers/s390/char/sclp_vt220.c
index b9d2a007e93b..3796ffdb8479 100644
--- a/drivers/s390/char/sclp_vt220.c
+++ b/drivers/s390/char/sclp_vt220.c
@@ -495,6 +495,10 @@ sclp_vt220_open(struct tty_struct *tty, struct file *filp)
495 if (tty->driver_data == NULL) 495 if (tty->driver_data == NULL)
496 return -ENOMEM; 496 return -ENOMEM;
497 tty->low_latency = 0; 497 tty->low_latency = 0;
498 if (!tty->winsize.ws_row && !tty->winsize.ws_col) {
499 tty->winsize.ws_row = 24;
500 tty->winsize.ws_col = 80;
501 }
498 } 502 }
499 return 0; 503 return 0;
500} 504}
diff --git a/drivers/s390/char/tape_34xx.c b/drivers/s390/char/tape_34xx.c
index 3657fe103c27..cb70fa1cf539 100644
--- a/drivers/s390/char/tape_34xx.c
+++ b/drivers/s390/char/tape_34xx.c
@@ -9,6 +9,7 @@
9 */ 9 */
10 10
11#define KMSG_COMPONENT "tape_34xx" 11#define KMSG_COMPONENT "tape_34xx"
12#define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
12 13
13#include <linux/module.h> 14#include <linux/module.h>
14#include <linux/init.h> 15#include <linux/init.h>
diff --git a/drivers/s390/char/tape_3590.c b/drivers/s390/char/tape_3590.c
index 0c72aadb8391..9821c5886613 100644
--- a/drivers/s390/char/tape_3590.c
+++ b/drivers/s390/char/tape_3590.c
@@ -9,6 +9,7 @@
9 */ 9 */
10 10
11#define KMSG_COMPONENT "tape_3590" 11#define KMSG_COMPONENT "tape_3590"
12#define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
12 13
13#include <linux/module.h> 14#include <linux/module.h>
14#include <linux/init.h> 15#include <linux/init.h>
@@ -136,7 +137,7 @@ static void int_to_ext_kekl(struct tape3592_kekl *in,
136 out->type_on_tape = TAPE390_KEKL_TYPE_LABEL; 137 out->type_on_tape = TAPE390_KEKL_TYPE_LABEL;
137 memcpy(out->label, in->label, sizeof(in->label)); 138 memcpy(out->label, in->label, sizeof(in->label));
138 EBCASC(out->label, sizeof(in->label)); 139 EBCASC(out->label, sizeof(in->label));
139 strstrip(out->label); 140 strim(out->label);
140} 141}
141 142
142static void int_to_ext_kekl_pair(struct tape3592_kekl_pair *in, 143static void int_to_ext_kekl_pair(struct tape3592_kekl_pair *in,
diff --git a/drivers/s390/char/tape_block.c b/drivers/s390/char/tape_block.c
index 4799cc2f73c3..8d3d720737da 100644
--- a/drivers/s390/char/tape_block.c
+++ b/drivers/s390/char/tape_block.c
@@ -11,6 +11,7 @@
11 */ 11 */
12 12
13#define KMSG_COMPONENT "tape" 13#define KMSG_COMPONENT "tape"
14#define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
14 15
15#include <linux/fs.h> 16#include <linux/fs.h>
16#include <linux/module.h> 17#include <linux/module.h>
@@ -45,8 +46,6 @@
45 */ 46 */
46static int tapeblock_open(struct block_device *, fmode_t); 47static int tapeblock_open(struct block_device *, fmode_t);
47static int tapeblock_release(struct gendisk *, fmode_t); 48static int tapeblock_release(struct gendisk *, fmode_t);
48static int tapeblock_ioctl(struct block_device *, fmode_t, unsigned int,
49 unsigned long);
50static int tapeblock_medium_changed(struct gendisk *); 49static int tapeblock_medium_changed(struct gendisk *);
51static int tapeblock_revalidate_disk(struct gendisk *); 50static int tapeblock_revalidate_disk(struct gendisk *);
52 51
@@ -54,7 +53,6 @@ static const struct block_device_operations tapeblock_fops = {
54 .owner = THIS_MODULE, 53 .owner = THIS_MODULE,
55 .open = tapeblock_open, 54 .open = tapeblock_open,
56 .release = tapeblock_release, 55 .release = tapeblock_release,
57 .ioctl = tapeblock_ioctl,
58 .media_changed = tapeblock_medium_changed, 56 .media_changed = tapeblock_medium_changed,
59 .revalidate_disk = tapeblock_revalidate_disk, 57 .revalidate_disk = tapeblock_revalidate_disk,
60}; 58};
@@ -415,42 +413,6 @@ tapeblock_release(struct gendisk *disk, fmode_t mode)
415} 413}
416 414
417/* 415/*
418 * Support of some generic block device IOCTLs.
419 */
420static int
421tapeblock_ioctl(
422 struct block_device * bdev,
423 fmode_t mode,
424 unsigned int command,
425 unsigned long arg
426) {
427 int rc;
428 int minor;
429 struct gendisk *disk = bdev->bd_disk;
430 struct tape_device *device;
431
432 rc = 0;
433 BUG_ON(!disk);
434 device = disk->private_data;
435 BUG_ON(!device);
436 minor = MINOR(bdev->bd_dev);
437
438 DBF_LH(6, "tapeblock_ioctl(0x%0x)\n", command);
439 DBF_LH(6, "device = %d:%d\n", tapeblock_major, minor);
440
441 switch (command) {
442 /* Refuse some IOCTL calls without complaining (mount). */
443 case 0x5310: /* CDROMMULTISESSION */
444 rc = -EINVAL;
445 break;
446 default:
447 rc = -EINVAL;
448 }
449
450 return rc;
451}
452
453/*
454 * Initialize block device frontend. 416 * Initialize block device frontend.
455 */ 417 */
456int 418int
diff --git a/drivers/s390/char/tape_char.c b/drivers/s390/char/tape_char.c
index 23d773a0d113..539045acaad4 100644
--- a/drivers/s390/char/tape_char.c
+++ b/drivers/s390/char/tape_char.c
@@ -10,11 +10,15 @@
10 * Martin Schwidefsky <schwidefsky@de.ibm.com> 10 * Martin Schwidefsky <schwidefsky@de.ibm.com>
11 */ 11 */
12 12
13#define KMSG_COMPONENT "tape"
14#define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
15
13#include <linux/module.h> 16#include <linux/module.h>
14#include <linux/types.h> 17#include <linux/types.h>
15#include <linux/proc_fs.h> 18#include <linux/proc_fs.h>
16#include <linux/mtio.h> 19#include <linux/mtio.h>
17#include <linux/smp_lock.h> 20#include <linux/smp_lock.h>
21#include <linux/compat.h>
18 22
19#include <asm/uaccess.h> 23#include <asm/uaccess.h>
20 24
@@ -34,8 +38,9 @@ static ssize_t tapechar_write(struct file *, const char __user *, size_t, loff_t
34static int tapechar_open(struct inode *,struct file *); 38static int tapechar_open(struct inode *,struct file *);
35static int tapechar_release(struct inode *,struct file *); 39static int tapechar_release(struct inode *,struct file *);
36static long tapechar_ioctl(struct file *, unsigned int, unsigned long); 40static long tapechar_ioctl(struct file *, unsigned int, unsigned long);
37static long tapechar_compat_ioctl(struct file *, unsigned int, 41#ifdef CONFIG_COMPAT
38 unsigned long); 42static long tapechar_compat_ioctl(struct file *, unsigned int, unsigned long);
43#endif
39 44
40static const struct file_operations tape_fops = 45static const struct file_operations tape_fops =
41{ 46{
@@ -43,7 +48,9 @@ static const struct file_operations tape_fops =
43 .read = tapechar_read, 48 .read = tapechar_read,
44 .write = tapechar_write, 49 .write = tapechar_write,
45 .unlocked_ioctl = tapechar_ioctl, 50 .unlocked_ioctl = tapechar_ioctl,
51#ifdef CONFIG_COMPAT
46 .compat_ioctl = tapechar_compat_ioctl, 52 .compat_ioctl = tapechar_compat_ioctl,
53#endif
47 .open = tapechar_open, 54 .open = tapechar_open,
48 .release = tapechar_release, 55 .release = tapechar_release,
49}; 56};
@@ -454,15 +461,22 @@ tapechar_ioctl(struct file *filp, unsigned int no, unsigned long data)
454 return rc; 461 return rc;
455} 462}
456 463
464#ifdef CONFIG_COMPAT
457static long 465static long
458tapechar_compat_ioctl(struct file *filp, unsigned int no, unsigned long data) 466tapechar_compat_ioctl(struct file *filp, unsigned int no, unsigned long data)
459{ 467{
460 struct tape_device *device = filp->private_data; 468 struct tape_device *device = filp->private_data;
461 int rval = -ENOIOCTLCMD; 469 int rval = -ENOIOCTLCMD;
470 unsigned long argp;
462 471
472 /* The 'arg' argument of any ioctl function may only be used for
473 * pointers because of the compat pointer conversion.
474 * Consider this when adding new ioctls.
475 */
476 argp = (unsigned long) compat_ptr(data);
463 if (device->discipline->ioctl_fn) { 477 if (device->discipline->ioctl_fn) {
464 mutex_lock(&device->mutex); 478 mutex_lock(&device->mutex);
465 rval = device->discipline->ioctl_fn(device, no, data); 479 rval = device->discipline->ioctl_fn(device, no, argp);
466 mutex_unlock(&device->mutex); 480 mutex_unlock(&device->mutex);
467 if (rval == -EINVAL) 481 if (rval == -EINVAL)
468 rval = -ENOIOCTLCMD; 482 rval = -ENOIOCTLCMD;
@@ -470,6 +484,7 @@ tapechar_compat_ioctl(struct file *filp, unsigned int no, unsigned long data)
470 484
471 return rval; 485 return rval;
472} 486}
487#endif /* CONFIG_COMPAT */
473 488
474/* 489/*
475 * Initialize character device frontend. 490 * Initialize character device frontend.
diff --git a/drivers/s390/char/tape_class.c b/drivers/s390/char/tape_class.c
index ddc914ccea8f..b2864e3edb6d 100644
--- a/drivers/s390/char/tape_class.c
+++ b/drivers/s390/char/tape_class.c
@@ -7,6 +7,10 @@
7 * Author: Stefan Bader <shbader@de.ibm.com> 7 * Author: Stefan Bader <shbader@de.ibm.com>
8 * Based on simple class device code by Greg K-H 8 * Based on simple class device code by Greg K-H
9 */ 9 */
10
11#define KMSG_COMPONENT "tape"
12#define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
13
10#include "tape_class.h" 14#include "tape_class.h"
11 15
12MODULE_AUTHOR("Stefan Bader <shbader@de.ibm.com>"); 16MODULE_AUTHOR("Stefan Bader <shbader@de.ibm.com>");
diff --git a/drivers/s390/char/tape_core.c b/drivers/s390/char/tape_core.c
index f5d6802dc5da..81b094e480e6 100644
--- a/drivers/s390/char/tape_core.c
+++ b/drivers/s390/char/tape_core.c
@@ -12,6 +12,8 @@
12 */ 12 */
13 13
14#define KMSG_COMPONENT "tape" 14#define KMSG_COMPONENT "tape"
15#define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
16
15#include <linux/module.h> 17#include <linux/module.h>
16#include <linux/init.h> // for kernel parameters 18#include <linux/init.h> // for kernel parameters
17#include <linux/kmod.h> // for requesting modules 19#include <linux/kmod.h> // for requesting modules
diff --git a/drivers/s390/char/tape_proc.c b/drivers/s390/char/tape_proc.c
index ebd820ccfb24..0ceb37984f77 100644
--- a/drivers/s390/char/tape_proc.c
+++ b/drivers/s390/char/tape_proc.c
@@ -11,6 +11,9 @@
11 * PROCFS Functions 11 * PROCFS Functions
12 */ 12 */
13 13
14#define KMSG_COMPONENT "tape"
15#define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
16
14#include <linux/module.h> 17#include <linux/module.h>
15#include <linux/vmalloc.h> 18#include <linux/vmalloc.h>
16#include <linux/seq_file.h> 19#include <linux/seq_file.h>
diff --git a/drivers/s390/char/tape_std.c b/drivers/s390/char/tape_std.c
index 750354ad16e5..03f07e5dd6e9 100644
--- a/drivers/s390/char/tape_std.c
+++ b/drivers/s390/char/tape_std.c
@@ -11,6 +11,9 @@
11 * Stefan Bader <shbader@de.ibm.com> 11 * Stefan Bader <shbader@de.ibm.com>
12 */ 12 */
13 13
14#define KMSG_COMPONENT "tape"
15#define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
16
14#include <linux/stddef.h> 17#include <linux/stddef.h>
15#include <linux/kernel.h> 18#include <linux/kernel.h>
16#include <linux/bio.h> 19#include <linux/bio.h>
diff --git a/drivers/s390/char/vmcp.c b/drivers/s390/char/vmcp.c
index a6087cec55b4..921dcda77676 100644
--- a/drivers/s390/char/vmcp.c
+++ b/drivers/s390/char/vmcp.c
@@ -19,6 +19,7 @@
19#include <linux/kernel.h> 19#include <linux/kernel.h>
20#include <linux/miscdevice.h> 20#include <linux/miscdevice.h>
21#include <linux/module.h> 21#include <linux/module.h>
22#include <asm/compat.h>
22#include <asm/cpcmd.h> 23#include <asm/cpcmd.h>
23#include <asm/debug.h> 24#include <asm/debug.h>
24#include <asm/uaccess.h> 25#include <asm/uaccess.h>
@@ -139,21 +140,26 @@ vmcp_write(struct file *file, const char __user *buff, size_t count,
139static long vmcp_ioctl(struct file *file, unsigned int cmd, unsigned long arg) 140static long vmcp_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
140{ 141{
141 struct vmcp_session *session; 142 struct vmcp_session *session;
143 int __user *argp;
142 int temp; 144 int temp;
143 145
144 session = (struct vmcp_session *)file->private_data; 146 session = (struct vmcp_session *)file->private_data;
147 if (is_compat_task())
148 argp = compat_ptr(arg);
149 else
150 argp = (int __user *)arg;
145 if (mutex_lock_interruptible(&session->mutex)) 151 if (mutex_lock_interruptible(&session->mutex))
146 return -ERESTARTSYS; 152 return -ERESTARTSYS;
147 switch (cmd) { 153 switch (cmd) {
148 case VMCP_GETCODE: 154 case VMCP_GETCODE:
149 temp = session->resp_code; 155 temp = session->resp_code;
150 mutex_unlock(&session->mutex); 156 mutex_unlock(&session->mutex);
151 return put_user(temp, (int __user *)arg); 157 return put_user(temp, argp);
152 case VMCP_SETBUF: 158 case VMCP_SETBUF:
153 free_pages((unsigned long)session->response, 159 free_pages((unsigned long)session->response,
154 get_order(session->bufsize)); 160 get_order(session->bufsize));
155 session->response=NULL; 161 session->response=NULL;
156 temp = get_user(session->bufsize, (int __user *)arg); 162 temp = get_user(session->bufsize, argp);
157 if (get_order(session->bufsize) > 8) { 163 if (get_order(session->bufsize) > 8) {
158 session->bufsize = PAGE_SIZE; 164 session->bufsize = PAGE_SIZE;
159 temp = -EINVAL; 165 temp = -EINVAL;
@@ -163,7 +169,7 @@ static long vmcp_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
163 case VMCP_GETSIZE: 169 case VMCP_GETSIZE:
164 temp = session->resp_size; 170 temp = session->resp_size;
165 mutex_unlock(&session->mutex); 171 mutex_unlock(&session->mutex);
166 return put_user(temp, (int __user *)arg); 172 return put_user(temp, argp);
167 default: 173 default:
168 mutex_unlock(&session->mutex); 174 mutex_unlock(&session->mutex);
169 return -ENOIOCTLCMD; 175 return -ENOIOCTLCMD;
diff --git a/drivers/s390/cio/Makefile b/drivers/s390/cio/Makefile
index d033414f7599..e1b700a19648 100644
--- a/drivers/s390/cio/Makefile
+++ b/drivers/s390/cio/Makefile
@@ -10,5 +10,5 @@ obj-y += ccw_device.o cmf.o
10obj-$(CONFIG_CHSC_SCH) += chsc_sch.o 10obj-$(CONFIG_CHSC_SCH) += chsc_sch.o
11obj-$(CONFIG_CCWGROUP) += ccwgroup.o 11obj-$(CONFIG_CCWGROUP) += ccwgroup.o
12 12
13qdio-objs := qdio_main.o qdio_thinint.o qdio_debug.o qdio_perf.o qdio_setup.o 13qdio-objs := qdio_main.o qdio_thinint.o qdio_debug.o qdio_setup.o
14obj-$(CONFIG_QDIO) += qdio.o 14obj-$(CONFIG_QDIO) += qdio.o
diff --git a/drivers/s390/cio/ccwreq.c b/drivers/s390/cio/ccwreq.c
index 9509e3860934..7a28a3029a3f 100644
--- a/drivers/s390/cio/ccwreq.c
+++ b/drivers/s390/cio/ccwreq.c
@@ -49,7 +49,6 @@ static u16 ccwreq_next_path(struct ccw_device *cdev)
49 */ 49 */
50static void ccwreq_stop(struct ccw_device *cdev, int rc) 50static void ccwreq_stop(struct ccw_device *cdev, int rc)
51{ 51{
52 struct subchannel *sch = to_subchannel(cdev->dev.parent);
53 struct ccw_request *req = &cdev->private->req; 52 struct ccw_request *req = &cdev->private->req;
54 53
55 if (req->done) 54 if (req->done)
@@ -57,7 +56,6 @@ static void ccwreq_stop(struct ccw_device *cdev, int rc)
57 req->done = 1; 56 req->done = 1;
58 ccw_device_set_timeout(cdev, 0); 57 ccw_device_set_timeout(cdev, 0);
59 memset(&cdev->private->irb, 0, sizeof(struct irb)); 58 memset(&cdev->private->irb, 0, sizeof(struct irb));
60 sch->lpm = sch->schib.pmcw.pam;
61 if (rc && rc != -ENODEV && req->drc) 59 if (rc && rc != -ENODEV && req->drc)
62 rc = req->drc; 60 rc = req->drc;
63 req->callback(cdev, req->data, rc); 61 req->callback(cdev, req->data, rc);
@@ -80,7 +78,6 @@ static void ccwreq_do(struct ccw_device *cdev)
80 continue; 78 continue;
81 } 79 }
82 /* Perform start function. */ 80 /* Perform start function. */
83 sch->lpm = 0xff;
84 memset(&cdev->private->irb, 0, sizeof(struct irb)); 81 memset(&cdev->private->irb, 0, sizeof(struct irb));
85 rc = cio_start(sch, cp, (u8) req->mask); 82 rc = cio_start(sch, cp, (u8) req->mask);
86 if (rc == 0) { 83 if (rc == 0) {
diff --git a/drivers/s390/cio/chsc_sch.c b/drivers/s390/cio/chsc_sch.c
index cc5144b6f9d9..c84ac9443079 100644
--- a/drivers/s390/cio/chsc_sch.c
+++ b/drivers/s390/cio/chsc_sch.c
@@ -12,6 +12,7 @@
12#include <linux/uaccess.h> 12#include <linux/uaccess.h>
13#include <linux/miscdevice.h> 13#include <linux/miscdevice.h>
14 14
15#include <asm/compat.h>
15#include <asm/cio.h> 16#include <asm/cio.h>
16#include <asm/chsc.h> 17#include <asm/chsc.h>
17#include <asm/isc.h> 18#include <asm/isc.h>
@@ -770,24 +771,30 @@ out_free:
770static long chsc_ioctl(struct file *filp, unsigned int cmd, 771static long chsc_ioctl(struct file *filp, unsigned int cmd,
771 unsigned long arg) 772 unsigned long arg)
772{ 773{
774 void __user *argp;
775
773 CHSC_MSG(2, "chsc_ioctl called, cmd=%x\n", cmd); 776 CHSC_MSG(2, "chsc_ioctl called, cmd=%x\n", cmd);
777 if (is_compat_task())
778 argp = compat_ptr(arg);
779 else
780 argp = (void __user *)arg;
774 switch (cmd) { 781 switch (cmd) {
775 case CHSC_START: 782 case CHSC_START:
776 return chsc_ioctl_start((void __user *)arg); 783 return chsc_ioctl_start(argp);
777 case CHSC_INFO_CHANNEL_PATH: 784 case CHSC_INFO_CHANNEL_PATH:
778 return chsc_ioctl_info_channel_path((void __user *)arg); 785 return chsc_ioctl_info_channel_path(argp);
779 case CHSC_INFO_CU: 786 case CHSC_INFO_CU:
780 return chsc_ioctl_info_cu((void __user *)arg); 787 return chsc_ioctl_info_cu(argp);
781 case CHSC_INFO_SCH_CU: 788 case CHSC_INFO_SCH_CU:
782 return chsc_ioctl_info_sch_cu((void __user *)arg); 789 return chsc_ioctl_info_sch_cu(argp);
783 case CHSC_INFO_CI: 790 case CHSC_INFO_CI:
784 return chsc_ioctl_conf_info((void __user *)arg); 791 return chsc_ioctl_conf_info(argp);
785 case CHSC_INFO_CCL: 792 case CHSC_INFO_CCL:
786 return chsc_ioctl_conf_comp_list((void __user *)arg); 793 return chsc_ioctl_conf_comp_list(argp);
787 case CHSC_INFO_CPD: 794 case CHSC_INFO_CPD:
788 return chsc_ioctl_chpd((void __user *)arg); 795 return chsc_ioctl_chpd(argp);
789 case CHSC_INFO_DCAL: 796 case CHSC_INFO_DCAL:
790 return chsc_ioctl_dcal((void __user *)arg); 797 return chsc_ioctl_dcal(argp);
791 default: /* unknown ioctl number */ 798 default: /* unknown ioctl number */
792 return -ENOIOCTLCMD; 799 return -ENOIOCTLCMD;
793 } 800 }
diff --git a/drivers/s390/cio/device.c b/drivers/s390/cio/device.c
index 73901c9e260f..a6c7d5426fb2 100644
--- a/drivers/s390/cio/device.c
+++ b/drivers/s390/cio/device.c
@@ -1519,6 +1519,7 @@ static int ccw_device_console_enable(struct ccw_device *cdev,
1519 sch->driver = &io_subchannel_driver; 1519 sch->driver = &io_subchannel_driver;
1520 /* Initialize the ccw_device structure. */ 1520 /* Initialize the ccw_device structure. */
1521 cdev->dev.parent= &sch->dev; 1521 cdev->dev.parent= &sch->dev;
1522 sch_set_cdev(sch, cdev);
1522 io_subchannel_recog(cdev, sch); 1523 io_subchannel_recog(cdev, sch);
1523 /* Now wait for the async. recognition to come to an end. */ 1524 /* Now wait for the async. recognition to come to an end. */
1524 spin_lock_irq(cdev->ccwlock); 1525 spin_lock_irq(cdev->ccwlock);
diff --git a/drivers/s390/cio/device_pgid.c b/drivers/s390/cio/device_pgid.c
index aad188e43b4f..6facb5499a65 100644
--- a/drivers/s390/cio/device_pgid.c
+++ b/drivers/s390/cio/device_pgid.c
@@ -142,7 +142,7 @@ static void spid_do(struct ccw_device *cdev)
142 u8 fn; 142 u8 fn;
143 143
144 /* Use next available path that is not already in correct state. */ 144 /* Use next available path that is not already in correct state. */
145 req->lpm = lpm_adjust(req->lpm, sch->schib.pmcw.pam & ~sch->vpm); 145 req->lpm = lpm_adjust(req->lpm, cdev->private->pgid_todo_mask);
146 if (!req->lpm) 146 if (!req->lpm)
147 goto out_nopath; 147 goto out_nopath;
148 /* Channel program setup. */ 148 /* Channel program setup. */
@@ -254,15 +254,15 @@ static void pgid_analyze(struct ccw_device *cdev, struct pgid **p,
254 *p = first; 254 *p = first;
255} 255}
256 256
257static u8 pgid_to_vpm(struct ccw_device *cdev) 257static u8 pgid_to_donepm(struct ccw_device *cdev)
258{ 258{
259 struct subchannel *sch = to_subchannel(cdev->dev.parent); 259 struct subchannel *sch = to_subchannel(cdev->dev.parent);
260 struct pgid *pgid; 260 struct pgid *pgid;
261 int i; 261 int i;
262 int lpm; 262 int lpm;
263 u8 vpm = 0; 263 u8 donepm = 0;
264 264
265 /* Set VPM bits for paths which are already in the target state. */ 265 /* Set bits for paths which are already in the target state. */
266 for (i = 0; i < 8; i++) { 266 for (i = 0; i < 8; i++) {
267 lpm = 0x80 >> i; 267 lpm = 0x80 >> i;
268 if ((cdev->private->pgid_valid_mask & lpm) == 0) 268 if ((cdev->private->pgid_valid_mask & lpm) == 0)
@@ -282,10 +282,10 @@ static u8 pgid_to_vpm(struct ccw_device *cdev)
282 if (pgid->inf.ps.state3 != SNID_STATE3_SINGLE_PATH) 282 if (pgid->inf.ps.state3 != SNID_STATE3_SINGLE_PATH)
283 continue; 283 continue;
284 } 284 }
285 vpm |= lpm; 285 donepm |= lpm;
286 } 286 }
287 287
288 return vpm; 288 return donepm;
289} 289}
290 290
291static void pgid_fill(struct ccw_device *cdev, struct pgid *pgid) 291static void pgid_fill(struct ccw_device *cdev, struct pgid *pgid)
@@ -307,6 +307,7 @@ static void snid_done(struct ccw_device *cdev, int rc)
307 int mismatch = 0; 307 int mismatch = 0;
308 int reserved = 0; 308 int reserved = 0;
309 int reset = 0; 309 int reset = 0;
310 u8 donepm;
310 311
311 if (rc) 312 if (rc)
312 goto out; 313 goto out;
@@ -316,18 +317,20 @@ static void snid_done(struct ccw_device *cdev, int rc)
316 else if (mismatch) 317 else if (mismatch)
317 rc = -EOPNOTSUPP; 318 rc = -EOPNOTSUPP;
318 else { 319 else {
319 sch->vpm = pgid_to_vpm(cdev); 320 donepm = pgid_to_donepm(cdev);
321 sch->vpm = donepm & sch->opm;
322 cdev->private->pgid_todo_mask &= ~donepm;
320 pgid_fill(cdev, pgid); 323 pgid_fill(cdev, pgid);
321 } 324 }
322out: 325out:
323 CIO_MSG_EVENT(2, "snid: device 0.%x.%04x: rc=%d pvm=%02x vpm=%02x " 326 CIO_MSG_EVENT(2, "snid: device 0.%x.%04x: rc=%d pvm=%02x vpm=%02x "
324 "mism=%d rsvd=%d reset=%d\n", id->ssid, id->devno, rc, 327 "todo=%02x mism=%d rsvd=%d reset=%d\n", id->ssid,
325 cdev->private->pgid_valid_mask, sch->vpm, mismatch, 328 id->devno, rc, cdev->private->pgid_valid_mask, sch->vpm,
326 reserved, reset); 329 cdev->private->pgid_todo_mask, mismatch, reserved, reset);
327 switch (rc) { 330 switch (rc) {
328 case 0: 331 case 0:
329 /* Anything left to do? */ 332 /* Anything left to do? */
330 if (sch->vpm == sch->schib.pmcw.pam) { 333 if (cdev->private->pgid_todo_mask == 0) {
331 verify_done(cdev, sch->vpm == 0 ? -EACCES : 0); 334 verify_done(cdev, sch->vpm == 0 ? -EACCES : 0);
332 return; 335 return;
333 } 336 }
@@ -411,6 +414,7 @@ static void verify_start(struct ccw_device *cdev)
411 struct ccw_dev_id *devid = &cdev->private->dev_id; 414 struct ccw_dev_id *devid = &cdev->private->dev_id;
412 415
413 sch->vpm = 0; 416 sch->vpm = 0;
417 sch->lpm = sch->schib.pmcw.pam;
414 /* Initialize request data. */ 418 /* Initialize request data. */
415 memset(req, 0, sizeof(*req)); 419 memset(req, 0, sizeof(*req));
416 req->timeout = PGID_TIMEOUT; 420 req->timeout = PGID_TIMEOUT;
@@ -442,11 +446,14 @@ static void verify_start(struct ccw_device *cdev)
442 */ 446 */
443void ccw_device_verify_start(struct ccw_device *cdev) 447void ccw_device_verify_start(struct ccw_device *cdev)
444{ 448{
449 struct subchannel *sch = to_subchannel(cdev->dev.parent);
450
445 CIO_TRACE_EVENT(4, "vrfy"); 451 CIO_TRACE_EVENT(4, "vrfy");
446 CIO_HEX_EVENT(4, &cdev->private->dev_id, sizeof(cdev->private->dev_id)); 452 CIO_HEX_EVENT(4, &cdev->private->dev_id, sizeof(cdev->private->dev_id));
447 /* Initialize PGID data. */ 453 /* Initialize PGID data. */
448 memset(cdev->private->pgid, 0, sizeof(cdev->private->pgid)); 454 memset(cdev->private->pgid, 0, sizeof(cdev->private->pgid));
449 cdev->private->pgid_valid_mask = 0; 455 cdev->private->pgid_valid_mask = 0;
456 cdev->private->pgid_todo_mask = sch->schib.pmcw.pam;
450 /* 457 /*
451 * Initialize pathgroup and multipath state with target values. 458 * Initialize pathgroup and multipath state with target values.
452 * They may change in the course of path verification. 459 * They may change in the course of path verification.
diff --git a/drivers/s390/cio/fcx.c b/drivers/s390/cio/fcx.c
index 61677dfbdc9b..ca5e9bb9d458 100644
--- a/drivers/s390/cio/fcx.c
+++ b/drivers/s390/cio/fcx.c
@@ -163,7 +163,7 @@ void tcw_finalize(struct tcw *tcw, int num_tidaws)
163 /* Add tcat to tccb. */ 163 /* Add tcat to tccb. */
164 tccb = tcw_get_tccb(tcw); 164 tccb = tcw_get_tccb(tcw);
165 tcat = (struct tccb_tcat *) &tccb->tca[tca_size(tccb)]; 165 tcat = (struct tccb_tcat *) &tccb->tca[tca_size(tccb)];
166 memset(tcat, 0, sizeof(tcat)); 166 memset(tcat, 0, sizeof(*tcat));
167 /* Calculate tcw input/output count and tcat transport count. */ 167 /* Calculate tcw input/output count and tcat transport count. */
168 count = calc_dcw_count(tccb); 168 count = calc_dcw_count(tccb);
169 if (tcw->w && (tcw->flags & TCW_FLAGS_OUTPUT_TIDA)) 169 if (tcw->w && (tcw->flags & TCW_FLAGS_OUTPUT_TIDA))
@@ -269,7 +269,7 @@ EXPORT_SYMBOL(tccb_init);
269 */ 269 */
270void tsb_init(struct tsb *tsb) 270void tsb_init(struct tsb *tsb)
271{ 271{
272 memset(tsb, 0, sizeof(tsb)); 272 memset(tsb, 0, sizeof(*tsb));
273} 273}
274EXPORT_SYMBOL(tsb_init); 274EXPORT_SYMBOL(tsb_init);
275 275
diff --git a/drivers/s390/cio/io_sch.h b/drivers/s390/cio/io_sch.h
index d72ae4c93af9..b9ce712a7f25 100644
--- a/drivers/s390/cio/io_sch.h
+++ b/drivers/s390/cio/io_sch.h
@@ -150,6 +150,7 @@ struct ccw_device_private {
150 struct ccw_request req; /* internal I/O request */ 150 struct ccw_request req; /* internal I/O request */
151 int iretry; 151 int iretry;
152 u8 pgid_valid_mask; /* mask of valid PGIDs */ 152 u8 pgid_valid_mask; /* mask of valid PGIDs */
153 u8 pgid_todo_mask; /* mask of PGIDs to be adjusted */
153 struct { 154 struct {
154 unsigned int fast:1; /* post with "channel end" */ 155 unsigned int fast:1; /* post with "channel end" */
155 unsigned int repall:1; /* report every interrupt status */ 156 unsigned int repall:1; /* report every interrupt status */
diff --git a/drivers/s390/cio/qdio.h b/drivers/s390/cio/qdio.h
index ff7748a9199d..44f2f6a97f33 100644
--- a/drivers/s390/cio/qdio.h
+++ b/drivers/s390/cio/qdio.h
@@ -182,6 +182,34 @@ struct scssc_area {
182 u32:32; 182 u32:32;
183} __attribute__ ((packed)); 183} __attribute__ ((packed));
184 184
185struct qdio_dev_perf_stat {
186 unsigned int adapter_int;
187 unsigned int qdio_int;
188 unsigned int pci_request_int;
189
190 unsigned int tasklet_inbound;
191 unsigned int tasklet_inbound_resched;
192 unsigned int tasklet_inbound_resched2;
193 unsigned int tasklet_outbound;
194
195 unsigned int siga_read;
196 unsigned int siga_write;
197 unsigned int siga_sync;
198
199 unsigned int inbound_call;
200 unsigned int inbound_handler;
201 unsigned int stop_polling;
202 unsigned int inbound_queue_full;
203 unsigned int outbound_call;
204 unsigned int outbound_handler;
205 unsigned int fast_requeue;
206 unsigned int target_full;
207 unsigned int eqbs;
208 unsigned int eqbs_partial;
209 unsigned int sqbs;
210 unsigned int sqbs_partial;
211};
212
185struct qdio_input_q { 213struct qdio_input_q {
186 /* input buffer acknowledgement flag */ 214 /* input buffer acknowledgement flag */
187 int polling; 215 int polling;
@@ -269,6 +297,7 @@ struct qdio_irq {
269 u32 *dsci; /* address of device state change indicator */ 297 u32 *dsci; /* address of device state change indicator */
270 struct ccw_device *cdev; 298 struct ccw_device *cdev;
271 struct dentry *debugfs_dev; 299 struct dentry *debugfs_dev;
300 struct dentry *debugfs_perf;
272 301
273 unsigned long int_parm; 302 unsigned long int_parm;
274 struct subchannel_id schid; 303 struct subchannel_id schid;
@@ -286,9 +315,10 @@ struct qdio_irq {
286 struct ciw aqueue; 315 struct ciw aqueue;
287 316
288 struct qdio_ssqd_desc ssqd_desc; 317 struct qdio_ssqd_desc ssqd_desc;
289
290 void (*orig_handler) (struct ccw_device *, unsigned long, struct irb *); 318 void (*orig_handler) (struct ccw_device *, unsigned long, struct irb *);
291 319
320 struct qdio_dev_perf_stat perf_stat;
321 int perf_stat_enabled;
292 /* 322 /*
293 * Warning: Leave these members together at the end so they won't be 323 * Warning: Leave these members together at the end so they won't be
294 * cleared in qdio_setup_irq. 324 * cleared in qdio_setup_irq.
@@ -311,6 +341,10 @@ struct qdio_irq {
311 (irq->qib.qfmt == QDIO_IQDIO_QFMT || \ 341 (irq->qib.qfmt == QDIO_IQDIO_QFMT || \
312 css_general_characteristics.aif_osa) 342 css_general_characteristics.aif_osa)
313 343
344#define qperf(qdev,attr) qdev->perf_stat.attr
345#define qperf_inc(q,attr) if (q->irq_ptr->perf_stat_enabled) \
346 q->irq_ptr->perf_stat.attr++
347
314/* the highest iqdio queue is used for multicast */ 348/* the highest iqdio queue is used for multicast */
315static inline int multicast_outbound(struct qdio_q *q) 349static inline int multicast_outbound(struct qdio_q *q)
316{ 350{
diff --git a/drivers/s390/cio/qdio_debug.c b/drivers/s390/cio/qdio_debug.c
index 76769978285f..f49761ff9a00 100644
--- a/drivers/s390/cio/qdio_debug.c
+++ b/drivers/s390/cio/qdio_debug.c
@@ -55,13 +55,11 @@ static int qstat_show(struct seq_file *m, void *v)
55 if (!q) 55 if (!q)
56 return 0; 56 return 0;
57 57
58 seq_printf(m, "device state indicator: %d\n", *(u32 *)q->irq_ptr->dsci); 58 seq_printf(m, "DSCI: %d nr_used: %d\n",
59 seq_printf(m, "nr_used: %d\n", atomic_read(&q->nr_buf_used)); 59 *(u32 *)q->irq_ptr->dsci, atomic_read(&q->nr_buf_used));
60 seq_printf(m, "ftc: %d\n", q->first_to_check); 60 seq_printf(m, "ftc: %d last_move: %d\n", q->first_to_check, q->last_move);
61 seq_printf(m, "last_move: %d\n", q->last_move); 61 seq_printf(m, "polling: %d ack start: %d ack count: %d\n",
62 seq_printf(m, "polling: %d\n", q->u.in.polling); 62 q->u.in.polling, q->u.in.ack_start, q->u.in.ack_count);
63 seq_printf(m, "ack start: %d\n", q->u.in.ack_start);
64 seq_printf(m, "ack count: %d\n", q->u.in.ack_count);
65 seq_printf(m, "slsb buffer states:\n"); 63 seq_printf(m, "slsb buffer states:\n");
66 seq_printf(m, "|0 |8 |16 |24 |32 |40 |48 |56 63|\n"); 64 seq_printf(m, "|0 |8 |16 |24 |32 |40 |48 |56 63|\n");
67 65
@@ -110,7 +108,6 @@ static ssize_t qstat_seq_write(struct file *file, const char __user *buf,
110 108
111 if (!q) 109 if (!q)
112 return 0; 110 return 0;
113
114 if (q->is_input_q) 111 if (q->is_input_q)
115 xchg(q->irq_ptr->dsci, 1); 112 xchg(q->irq_ptr->dsci, 1);
116 local_bh_disable(); 113 local_bh_disable();
@@ -134,6 +131,98 @@ static const struct file_operations debugfs_fops = {
134 .release = single_release, 131 .release = single_release,
135}; 132};
136 133
134static char *qperf_names[] = {
135 "Assumed adapter interrupts",
136 "QDIO interrupts",
137 "Requested PCIs",
138 "Inbound tasklet runs",
139 "Inbound tasklet resched",
140 "Inbound tasklet resched2",
141 "Outbound tasklet runs",
142 "SIGA read",
143 "SIGA write",
144 "SIGA sync",
145 "Inbound calls",
146 "Inbound handler",
147 "Inbound stop_polling",
148 "Inbound queue full",
149 "Outbound calls",
150 "Outbound handler",
151 "Outbound fast_requeue",
152 "Outbound target_full",
153 "QEBSM eqbs",
154 "QEBSM eqbs partial",
155 "QEBSM sqbs",
156 "QEBSM sqbs partial"
157};
158
159static int qperf_show(struct seq_file *m, void *v)
160{
161 struct qdio_irq *irq_ptr = m->private;
162 unsigned int *stat;
163 int i;
164
165 if (!irq_ptr)
166 return 0;
167 if (!irq_ptr->perf_stat_enabled) {
168 seq_printf(m, "disabled\n");
169 return 0;
170 }
171 stat = (unsigned int *)&irq_ptr->perf_stat;
172
173 for (i = 0; i < ARRAY_SIZE(qperf_names); i++)
174 seq_printf(m, "%26s:\t%u\n",
175 qperf_names[i], *(stat + i));
176 return 0;
177}
178
179static ssize_t qperf_seq_write(struct file *file, const char __user *ubuf,
180 size_t count, loff_t *off)
181{
182 struct seq_file *seq = file->private_data;
183 struct qdio_irq *irq_ptr = seq->private;
184 unsigned long val;
185 char buf[8];
186 int ret;
187
188 if (!irq_ptr)
189 return 0;
190 if (count >= sizeof(buf))
191 return -EINVAL;
192 if (copy_from_user(&buf, ubuf, count))
193 return -EFAULT;
194 buf[count] = 0;
195
196 ret = strict_strtoul(buf, 10, &val);
197 if (ret < 0)
198 return ret;
199
200 switch (val) {
201 case 0:
202 irq_ptr->perf_stat_enabled = 0;
203 memset(&irq_ptr->perf_stat, 0, sizeof(irq_ptr->perf_stat));
204 break;
205 case 1:
206 irq_ptr->perf_stat_enabled = 1;
207 break;
208 }
209 return count;
210}
211
212static int qperf_seq_open(struct inode *inode, struct file *filp)
213{
214 return single_open(filp, qperf_show,
215 filp->f_path.dentry->d_inode->i_private);
216}
217
218static struct file_operations debugfs_perf_fops = {
219 .owner = THIS_MODULE,
220 .open = qperf_seq_open,
221 .read = seq_read,
222 .write = qperf_seq_write,
223 .llseek = seq_lseek,
224 .release = single_release,
225};
137static void setup_debugfs_entry(struct qdio_q *q, struct ccw_device *cdev) 226static void setup_debugfs_entry(struct qdio_q *q, struct ccw_device *cdev)
138{ 227{
139 char name[QDIO_DEBUGFS_NAME_LEN]; 228 char name[QDIO_DEBUGFS_NAME_LEN];
@@ -156,6 +245,14 @@ void qdio_setup_debug_entries(struct qdio_irq *irq_ptr, struct ccw_device *cdev)
156 debugfs_root); 245 debugfs_root);
157 if (IS_ERR(irq_ptr->debugfs_dev)) 246 if (IS_ERR(irq_ptr->debugfs_dev))
158 irq_ptr->debugfs_dev = NULL; 247 irq_ptr->debugfs_dev = NULL;
248
249 irq_ptr->debugfs_perf = debugfs_create_file("statistics",
250 S_IFREG | S_IRUGO | S_IWUSR,
251 irq_ptr->debugfs_dev, irq_ptr,
252 &debugfs_perf_fops);
253 if (IS_ERR(irq_ptr->debugfs_perf))
254 irq_ptr->debugfs_perf = NULL;
255
159 for_each_input_queue(irq_ptr, q, i) 256 for_each_input_queue(irq_ptr, q, i)
160 setup_debugfs_entry(q, cdev); 257 setup_debugfs_entry(q, cdev);
161 for_each_output_queue(irq_ptr, q, i) 258 for_each_output_queue(irq_ptr, q, i)
@@ -171,6 +268,7 @@ void qdio_shutdown_debug_entries(struct qdio_irq *irq_ptr, struct ccw_device *cd
171 debugfs_remove(q->debugfs_q); 268 debugfs_remove(q->debugfs_q);
172 for_each_output_queue(irq_ptr, q, i) 269 for_each_output_queue(irq_ptr, q, i)
173 debugfs_remove(q->debugfs_q); 270 debugfs_remove(q->debugfs_q);
271 debugfs_remove(irq_ptr->debugfs_perf);
174 debugfs_remove(irq_ptr->debugfs_dev); 272 debugfs_remove(irq_ptr->debugfs_dev);
175} 273}
176 274
diff --git a/drivers/s390/cio/qdio_main.c b/drivers/s390/cio/qdio_main.c
index 4be6e84b9599..62b654af9237 100644
--- a/drivers/s390/cio/qdio_main.c
+++ b/drivers/s390/cio/qdio_main.c
@@ -22,7 +22,6 @@
22#include "device.h" 22#include "device.h"
23#include "qdio.h" 23#include "qdio.h"
24#include "qdio_debug.h" 24#include "qdio_debug.h"
25#include "qdio_perf.h"
26 25
27MODULE_AUTHOR("Utz Bacher <utz.bacher@de.ibm.com>,"\ 26MODULE_AUTHOR("Utz Bacher <utz.bacher@de.ibm.com>,"\
28 "Jan Glauber <jang@linux.vnet.ibm.com>"); 27 "Jan Glauber <jang@linux.vnet.ibm.com>");
@@ -126,7 +125,7 @@ static int qdio_do_eqbs(struct qdio_q *q, unsigned char *state,
126 int rc; 125 int rc;
127 126
128 BUG_ON(!q->irq_ptr->sch_token); 127 BUG_ON(!q->irq_ptr->sch_token);
129 qdio_perf_stat_inc(&perf_stats.debug_eqbs_all); 128 qperf_inc(q, eqbs);
130 129
131 if (!q->is_input_q) 130 if (!q->is_input_q)
132 nr += q->irq_ptr->nr_input_qs; 131 nr += q->irq_ptr->nr_input_qs;
@@ -139,7 +138,7 @@ again:
139 * buffers later. 138 * buffers later.
140 */ 139 */
141 if ((ccq == 96) && (count != tmp_count)) { 140 if ((ccq == 96) && (count != tmp_count)) {
142 qdio_perf_stat_inc(&perf_stats.debug_eqbs_incomplete); 141 qperf_inc(q, eqbs_partial);
143 return (count - tmp_count); 142 return (count - tmp_count);
144 } 143 }
145 144
@@ -182,7 +181,7 @@ static int qdio_do_sqbs(struct qdio_q *q, unsigned char state, int start,
182 return 0; 181 return 0;
183 182
184 BUG_ON(!q->irq_ptr->sch_token); 183 BUG_ON(!q->irq_ptr->sch_token);
185 qdio_perf_stat_inc(&perf_stats.debug_sqbs_all); 184 qperf_inc(q, sqbs);
186 185
187 if (!q->is_input_q) 186 if (!q->is_input_q)
188 nr += q->irq_ptr->nr_input_qs; 187 nr += q->irq_ptr->nr_input_qs;
@@ -191,7 +190,7 @@ again:
191 rc = qdio_check_ccq(q, ccq); 190 rc = qdio_check_ccq(q, ccq);
192 if (rc == 1) { 191 if (rc == 1) {
193 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "SQBS again:%2d", ccq); 192 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "SQBS again:%2d", ccq);
194 qdio_perf_stat_inc(&perf_stats.debug_sqbs_incomplete); 193 qperf_inc(q, sqbs_partial);
195 goto again; 194 goto again;
196 } 195 }
197 if (rc < 0) { 196 if (rc < 0) {
@@ -285,7 +284,7 @@ static inline int qdio_siga_sync(struct qdio_q *q, unsigned int output,
285 return 0; 284 return 0;
286 285
287 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "siga-s:%1d", q->nr); 286 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "siga-s:%1d", q->nr);
288 qdio_perf_stat_inc(&perf_stats.siga_sync); 287 qperf_inc(q, siga_sync);
289 288
290 cc = do_siga_sync(q->irq_ptr->schid, output, input); 289 cc = do_siga_sync(q->irq_ptr->schid, output, input);
291 if (cc) 290 if (cc)
@@ -350,7 +349,7 @@ static inline int qdio_siga_input(struct qdio_q *q)
350 int cc; 349 int cc;
351 350
352 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "siga-r:%1d", q->nr); 351 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "siga-r:%1d", q->nr);
353 qdio_perf_stat_inc(&perf_stats.siga_in); 352 qperf_inc(q, siga_read);
354 353
355 cc = do_siga_input(q->irq_ptr->schid, q->mask); 354 cc = do_siga_input(q->irq_ptr->schid, q->mask);
356 if (cc) 355 if (cc)
@@ -382,7 +381,7 @@ static inline void qdio_stop_polling(struct qdio_q *q)
382 return; 381 return;
383 382
384 q->u.in.polling = 0; 383 q->u.in.polling = 0;
385 qdio_perf_stat_inc(&perf_stats.debug_stop_polling); 384 qperf_inc(q, stop_polling);
386 385
387 /* show the card that we are not polling anymore */ 386 /* show the card that we are not polling anymore */
388 if (is_qebsm(q)) { 387 if (is_qebsm(q)) {
@@ -400,7 +399,7 @@ static void announce_buffer_error(struct qdio_q *q, int count)
400 /* special handling for no target buffer empty */ 399 /* special handling for no target buffer empty */
401 if ((!q->is_input_q && 400 if ((!q->is_input_q &&
402 (q->sbal[q->first_to_check]->element[15].flags & 0xff) == 0x10)) { 401 (q->sbal[q->first_to_check]->element[15].flags & 0xff) == 0x10)) {
403 qdio_perf_stat_inc(&perf_stats.outbound_target_full); 402 qperf_inc(q, target_full);
404 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "OUTFULL FTC:%02x", 403 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "OUTFULL FTC:%02x",
405 q->first_to_check); 404 q->first_to_check);
406 return; 405 return;
@@ -486,7 +485,8 @@ static int get_inbound_buffer_frontier(struct qdio_q *q)
486 case SLSB_P_INPUT_PRIMED: 485 case SLSB_P_INPUT_PRIMED:
487 inbound_primed(q, count); 486 inbound_primed(q, count);
488 q->first_to_check = add_buf(q->first_to_check, count); 487 q->first_to_check = add_buf(q->first_to_check, count);
489 atomic_sub(count, &q->nr_buf_used); 488 if (atomic_sub(count, &q->nr_buf_used) == 0)
489 qperf_inc(q, inbound_queue_full);
490 break; 490 break;
491 case SLSB_P_INPUT_ERROR: 491 case SLSB_P_INPUT_ERROR:
492 announce_buffer_error(q, count); 492 announce_buffer_error(q, count);
@@ -531,7 +531,7 @@ static inline int qdio_inbound_q_done(struct qdio_q *q)
531 qdio_siga_sync_q(q); 531 qdio_siga_sync_q(q);
532 get_buf_state(q, q->first_to_check, &state, 0); 532 get_buf_state(q, q->first_to_check, &state, 0);
533 533
534 if (state == SLSB_P_INPUT_PRIMED) 534 if (state == SLSB_P_INPUT_PRIMED || state == SLSB_P_INPUT_ERROR)
535 /* more work coming */ 535 /* more work coming */
536 return 0; 536 return 0;
537 537
@@ -566,9 +566,10 @@ static void qdio_kick_handler(struct qdio_q *q)
566 count = sub_buf(end, start); 566 count = sub_buf(end, start);
567 567
568 if (q->is_input_q) { 568 if (q->is_input_q) {
569 qdio_perf_stat_inc(&perf_stats.inbound_handler); 569 qperf_inc(q, inbound_handler);
570 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "kih s:%02x c:%02x", start, count); 570 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "kih s:%02x c:%02x", start, count);
571 } else 571 } else
572 qperf_inc(q, outbound_handler);
572 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "koh: s:%02x c:%02x", 573 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "koh: s:%02x c:%02x",
573 start, count); 574 start, count);
574 575
@@ -582,24 +583,28 @@ static void qdio_kick_handler(struct qdio_q *q)
582 583
583static void __qdio_inbound_processing(struct qdio_q *q) 584static void __qdio_inbound_processing(struct qdio_q *q)
584{ 585{
585 qdio_perf_stat_inc(&perf_stats.tasklet_inbound); 586 qperf_inc(q, tasklet_inbound);
586again: 587again:
587 if (!qdio_inbound_q_moved(q)) 588 if (!qdio_inbound_q_moved(q))
588 return; 589 return;
589 590
590 qdio_kick_handler(q); 591 qdio_kick_handler(q);
591 592
592 if (!qdio_inbound_q_done(q)) 593 if (!qdio_inbound_q_done(q)) {
593 /* means poll time is not yet over */ 594 /* means poll time is not yet over */
595 qperf_inc(q, tasklet_inbound_resched);
594 goto again; 596 goto again;
597 }
595 598
596 qdio_stop_polling(q); 599 qdio_stop_polling(q);
597 /* 600 /*
598 * We need to check again to not lose initiative after 601 * We need to check again to not lose initiative after
599 * resetting the ACK state. 602 * resetting the ACK state.
600 */ 603 */
601 if (!qdio_inbound_q_done(q)) 604 if (!qdio_inbound_q_done(q)) {
605 qperf_inc(q, tasklet_inbound_resched2);
602 goto again; 606 goto again;
607 }
603} 608}
604 609
605void qdio_inbound_processing(unsigned long data) 610void qdio_inbound_processing(unsigned long data)
@@ -687,7 +692,7 @@ static int qdio_kick_outbound_q(struct qdio_q *q)
687 return 0; 692 return 0;
688 693
689 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "siga-w:%1d", q->nr); 694 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "siga-w:%1d", q->nr);
690 qdio_perf_stat_inc(&perf_stats.siga_out); 695 qperf_inc(q, siga_write);
691 696
692 cc = qdio_siga_output(q, &busy_bit); 697 cc = qdio_siga_output(q, &busy_bit);
693 switch (cc) { 698 switch (cc) {
@@ -710,7 +715,7 @@ static int qdio_kick_outbound_q(struct qdio_q *q)
710 715
711static void __qdio_outbound_processing(struct qdio_q *q) 716static void __qdio_outbound_processing(struct qdio_q *q)
712{ 717{
713 qdio_perf_stat_inc(&perf_stats.tasklet_outbound); 718 qperf_inc(q, tasklet_outbound);
714 BUG_ON(atomic_read(&q->nr_buf_used) < 0); 719 BUG_ON(atomic_read(&q->nr_buf_used) < 0);
715 720
716 if (qdio_outbound_q_moved(q)) 721 if (qdio_outbound_q_moved(q))
@@ -738,12 +743,9 @@ static void __qdio_outbound_processing(struct qdio_q *q)
738 */ 743 */
739 if (qdio_outbound_q_done(q)) 744 if (qdio_outbound_q_done(q))
740 del_timer(&q->u.out.timer); 745 del_timer(&q->u.out.timer);
741 else { 746 else
742 if (!timer_pending(&q->u.out.timer)) { 747 if (!timer_pending(&q->u.out.timer))
743 mod_timer(&q->u.out.timer, jiffies + 10 * HZ); 748 mod_timer(&q->u.out.timer, jiffies + 10 * HZ);
744 qdio_perf_stat_inc(&perf_stats.debug_tl_out_timer);
745 }
746 }
747 return; 749 return;
748 750
749sched: 751sched:
@@ -783,7 +785,7 @@ static inline void qdio_check_outbound_after_thinint(struct qdio_q *q)
783 785
784static void __tiqdio_inbound_processing(struct qdio_q *q) 786static void __tiqdio_inbound_processing(struct qdio_q *q)
785{ 787{
786 qdio_perf_stat_inc(&perf_stats.thinint_inbound); 788 qperf_inc(q, tasklet_inbound);
787 qdio_sync_after_thinint(q); 789 qdio_sync_after_thinint(q);
788 790
789 /* 791 /*
@@ -798,7 +800,7 @@ static void __tiqdio_inbound_processing(struct qdio_q *q)
798 qdio_kick_handler(q); 800 qdio_kick_handler(q);
799 801
800 if (!qdio_inbound_q_done(q)) { 802 if (!qdio_inbound_q_done(q)) {
801 qdio_perf_stat_inc(&perf_stats.thinint_inbound_loop); 803 qperf_inc(q, tasklet_inbound_resched);
802 if (likely(q->irq_ptr->state != QDIO_IRQ_STATE_STOPPED)) { 804 if (likely(q->irq_ptr->state != QDIO_IRQ_STATE_STOPPED)) {
803 tasklet_schedule(&q->tasklet); 805 tasklet_schedule(&q->tasklet);
804 return; 806 return;
@@ -811,7 +813,7 @@ static void __tiqdio_inbound_processing(struct qdio_q *q)
811 * resetting the ACK state. 813 * resetting the ACK state.
812 */ 814 */
813 if (!qdio_inbound_q_done(q)) { 815 if (!qdio_inbound_q_done(q)) {
814 qdio_perf_stat_inc(&perf_stats.thinint_inbound_loop2); 816 qperf_inc(q, tasklet_inbound_resched2);
815 if (likely(q->irq_ptr->state != QDIO_IRQ_STATE_STOPPED)) 817 if (likely(q->irq_ptr->state != QDIO_IRQ_STATE_STOPPED))
816 tasklet_schedule(&q->tasklet); 818 tasklet_schedule(&q->tasklet);
817 } 819 }
@@ -850,8 +852,6 @@ static void qdio_int_handler_pci(struct qdio_irq *irq_ptr)
850 if (unlikely(irq_ptr->state == QDIO_IRQ_STATE_STOPPED)) 852 if (unlikely(irq_ptr->state == QDIO_IRQ_STATE_STOPPED))
851 return; 853 return;
852 854
853 qdio_perf_stat_inc(&perf_stats.pci_int);
854
855 for_each_input_queue(irq_ptr, q, i) 855 for_each_input_queue(irq_ptr, q, i)
856 tasklet_schedule(&q->tasklet); 856 tasklet_schedule(&q->tasklet);
857 857
@@ -922,8 +922,6 @@ void qdio_int_handler(struct ccw_device *cdev, unsigned long intparm,
922 struct qdio_irq *irq_ptr = cdev->private->qdio_data; 922 struct qdio_irq *irq_ptr = cdev->private->qdio_data;
923 int cstat, dstat; 923 int cstat, dstat;
924 924
925 qdio_perf_stat_inc(&perf_stats.qdio_int);
926
927 if (!intparm || !irq_ptr) { 925 if (!intparm || !irq_ptr) {
928 DBF_ERROR("qint:%4x", cdev->private->schid.sch_no); 926 DBF_ERROR("qint:%4x", cdev->private->schid.sch_no);
929 return; 927 return;
@@ -962,6 +960,8 @@ void qdio_int_handler(struct ccw_device *cdev, unsigned long intparm,
962 qdio_handle_activate_check(cdev, intparm, cstat, 960 qdio_handle_activate_check(cdev, intparm, cstat,
963 dstat); 961 dstat);
964 break; 962 break;
963 case QDIO_IRQ_STATE_STOPPED:
964 break;
965 default: 965 default:
966 WARN_ON(1); 966 WARN_ON(1);
967 } 967 }
@@ -1382,6 +1382,8 @@ static int handle_inbound(struct qdio_q *q, unsigned int callflags,
1382{ 1382{
1383 int used, diff; 1383 int used, diff;
1384 1384
1385 qperf_inc(q, inbound_call);
1386
1385 if (!q->u.in.polling) 1387 if (!q->u.in.polling)
1386 goto set; 1388 goto set;
1387 1389
@@ -1437,14 +1439,16 @@ static int handle_outbound(struct qdio_q *q, unsigned int callflags,
1437 unsigned char state; 1439 unsigned char state;
1438 int used, rc = 0; 1440 int used, rc = 0;
1439 1441
1440 qdio_perf_stat_inc(&perf_stats.outbound_handler); 1442 qperf_inc(q, outbound_call);
1441 1443
1442 count = set_buf_states(q, bufnr, SLSB_CU_OUTPUT_PRIMED, count); 1444 count = set_buf_states(q, bufnr, SLSB_CU_OUTPUT_PRIMED, count);
1443 used = atomic_add_return(count, &q->nr_buf_used); 1445 used = atomic_add_return(count, &q->nr_buf_used);
1444 BUG_ON(used > QDIO_MAX_BUFFERS_PER_Q); 1446 BUG_ON(used > QDIO_MAX_BUFFERS_PER_Q);
1445 1447
1446 if (callflags & QDIO_FLAG_PCI_OUT) 1448 if (callflags & QDIO_FLAG_PCI_OUT) {
1447 q->u.out.pci_out_enabled = 1; 1449 q->u.out.pci_out_enabled = 1;
1450 qperf_inc(q, pci_request_int);
1451 }
1448 else 1452 else
1449 q->u.out.pci_out_enabled = 0; 1453 q->u.out.pci_out_enabled = 0;
1450 1454
@@ -1483,7 +1487,7 @@ static int handle_outbound(struct qdio_q *q, unsigned int callflags,
1483 if (state != SLSB_CU_OUTPUT_PRIMED) 1487 if (state != SLSB_CU_OUTPUT_PRIMED)
1484 rc = qdio_kick_outbound_q(q); 1488 rc = qdio_kick_outbound_q(q);
1485 else 1489 else
1486 qdio_perf_stat_inc(&perf_stats.fast_requeue); 1490 qperf_inc(q, fast_requeue);
1487 1491
1488out: 1492out:
1489 tasklet_schedule(&q->tasklet); 1493 tasklet_schedule(&q->tasklet);
@@ -1539,16 +1543,11 @@ static int __init init_QDIO(void)
1539 rc = qdio_debug_init(); 1543 rc = qdio_debug_init();
1540 if (rc) 1544 if (rc)
1541 goto out_ti; 1545 goto out_ti;
1542 rc = qdio_setup_perf_stats();
1543 if (rc)
1544 goto out_debug;
1545 rc = tiqdio_register_thinints(); 1546 rc = tiqdio_register_thinints();
1546 if (rc) 1547 if (rc)
1547 goto out_perf; 1548 goto out_debug;
1548 return 0; 1549 return 0;
1549 1550
1550out_perf:
1551 qdio_remove_perf_stats();
1552out_debug: 1551out_debug:
1553 qdio_debug_exit(); 1552 qdio_debug_exit();
1554out_ti: 1553out_ti:
@@ -1562,7 +1561,6 @@ static void __exit exit_QDIO(void)
1562{ 1561{
1563 tiqdio_unregister_thinints(); 1562 tiqdio_unregister_thinints();
1564 tiqdio_free_memory(); 1563 tiqdio_free_memory();
1565 qdio_remove_perf_stats();
1566 qdio_debug_exit(); 1564 qdio_debug_exit();
1567 qdio_setup_exit(); 1565 qdio_setup_exit();
1568} 1566}
diff --git a/drivers/s390/cio/qdio_perf.c b/drivers/s390/cio/qdio_perf.c
deleted file mode 100644
index 968e3c7c2632..000000000000
--- a/drivers/s390/cio/qdio_perf.c
+++ /dev/null
@@ -1,147 +0,0 @@
1/*
2 * drivers/s390/cio/qdio_perf.c
3 *
4 * Copyright IBM Corp. 2008
5 *
6 * Author: Jan Glauber (jang@linux.vnet.ibm.com)
7 */
8#include <linux/kernel.h>
9#include <linux/proc_fs.h>
10#include <linux/seq_file.h>
11#include <asm/ccwdev.h>
12
13#include "cio.h"
14#include "css.h"
15#include "device.h"
16#include "ioasm.h"
17#include "chsc.h"
18#include "qdio_debug.h"
19#include "qdio_perf.h"
20
21int qdio_performance_stats;
22struct qdio_perf_stats perf_stats;
23
24#ifdef CONFIG_PROC_FS
25static struct proc_dir_entry *qdio_perf_pde;
26#endif
27
28/*
29 * procfs functions
30 */
31static int qdio_perf_proc_show(struct seq_file *m, void *v)
32{
33 seq_printf(m, "Number of qdio interrupts\t\t\t: %li\n",
34 (long)atomic_long_read(&perf_stats.qdio_int));
35 seq_printf(m, "Number of PCI interrupts\t\t\t: %li\n",
36 (long)atomic_long_read(&perf_stats.pci_int));
37 seq_printf(m, "Number of adapter interrupts\t\t\t: %li\n",
38 (long)atomic_long_read(&perf_stats.thin_int));
39 seq_printf(m, "\n");
40 seq_printf(m, "Inbound tasklet runs\t\t\t\t: %li\n",
41 (long)atomic_long_read(&perf_stats.tasklet_inbound));
42 seq_printf(m, "Outbound tasklet runs\t\t\t\t: %li\n",
43 (long)atomic_long_read(&perf_stats.tasklet_outbound));
44 seq_printf(m, "Adapter interrupt tasklet runs/loops\t\t: %li/%li\n",
45 (long)atomic_long_read(&perf_stats.tasklet_thinint),
46 (long)atomic_long_read(&perf_stats.tasklet_thinint_loop));
47 seq_printf(m, "Adapter interrupt inbound tasklet runs/loops\t: %li/%li\n",
48 (long)atomic_long_read(&perf_stats.thinint_inbound),
49 (long)atomic_long_read(&perf_stats.thinint_inbound_loop));
50 seq_printf(m, "\n");
51 seq_printf(m, "Number of SIGA In issued\t\t\t: %li\n",
52 (long)atomic_long_read(&perf_stats.siga_in));
53 seq_printf(m, "Number of SIGA Out issued\t\t\t: %li\n",
54 (long)atomic_long_read(&perf_stats.siga_out));
55 seq_printf(m, "Number of SIGA Sync issued\t\t\t: %li\n",
56 (long)atomic_long_read(&perf_stats.siga_sync));
57 seq_printf(m, "\n");
58 seq_printf(m, "Number of inbound transfers\t\t\t: %li\n",
59 (long)atomic_long_read(&perf_stats.inbound_handler));
60 seq_printf(m, "Number of outbound transfers\t\t\t: %li\n",
61 (long)atomic_long_read(&perf_stats.outbound_handler));
62 seq_printf(m, "\n");
63 seq_printf(m, "Number of fast requeues (outg. SBAL w/o SIGA)\t: %li\n",
64 (long)atomic_long_read(&perf_stats.fast_requeue));
65 seq_printf(m, "Number of outbound target full condition\t: %li\n",
66 (long)atomic_long_read(&perf_stats.outbound_target_full));
67 seq_printf(m, "Number of outbound tasklet mod_timer calls\t: %li\n",
68 (long)atomic_long_read(&perf_stats.debug_tl_out_timer));
69 seq_printf(m, "Number of stop polling calls\t\t\t: %li\n",
70 (long)atomic_long_read(&perf_stats.debug_stop_polling));
71 seq_printf(m, "AI inbound tasklet loops after stop polling\t: %li\n",
72 (long)atomic_long_read(&perf_stats.thinint_inbound_loop2));
73 seq_printf(m, "QEBSM EQBS total/incomplete\t\t\t: %li/%li\n",
74 (long)atomic_long_read(&perf_stats.debug_eqbs_all),
75 (long)atomic_long_read(&perf_stats.debug_eqbs_incomplete));
76 seq_printf(m, "QEBSM SQBS total/incomplete\t\t\t: %li/%li\n",
77 (long)atomic_long_read(&perf_stats.debug_sqbs_all),
78 (long)atomic_long_read(&perf_stats.debug_sqbs_incomplete));
79 seq_printf(m, "\n");
80 return 0;
81}
82static int qdio_perf_seq_open(struct inode *inode, struct file *filp)
83{
84 return single_open(filp, qdio_perf_proc_show, NULL);
85}
86
87static const struct file_operations qdio_perf_proc_fops = {
88 .owner = THIS_MODULE,
89 .open = qdio_perf_seq_open,
90 .read = seq_read,
91 .llseek = seq_lseek,
92 .release = single_release,
93};
94
95/*
96 * sysfs functions
97 */
98static ssize_t qdio_perf_stats_show(struct bus_type *bus, char *buf)
99{
100 return sprintf(buf, "%i\n", qdio_performance_stats ? 1 : 0);
101}
102
103static ssize_t qdio_perf_stats_store(struct bus_type *bus,
104 const char *buf, size_t count)
105{
106 unsigned long i;
107
108 if (strict_strtoul(buf, 16, &i) != 0)
109 return -EINVAL;
110 if ((i != 0) && (i != 1))
111 return -EINVAL;
112 if (i == qdio_performance_stats)
113 return count;
114
115 qdio_performance_stats = i;
116 /* reset performance statistics */
117 if (i == 0)
118 memset(&perf_stats, 0, sizeof(struct qdio_perf_stats));
119 return count;
120}
121
122static BUS_ATTR(qdio_performance_stats, 0644, qdio_perf_stats_show,
123 qdio_perf_stats_store);
124
125int __init qdio_setup_perf_stats(void)
126{
127 int rc;
128
129 rc = bus_create_file(&ccw_bus_type, &bus_attr_qdio_performance_stats);
130 if (rc)
131 return rc;
132
133#ifdef CONFIG_PROC_FS
134 memset(&perf_stats, 0, sizeof(struct qdio_perf_stats));
135 qdio_perf_pde = proc_create("qdio_perf", S_IFREG | S_IRUGO,
136 NULL, &qdio_perf_proc_fops);
137#endif
138 return 0;
139}
140
141void qdio_remove_perf_stats(void)
142{
143#ifdef CONFIG_PROC_FS
144 remove_proc_entry("qdio_perf", NULL);
145#endif
146 bus_remove_file(&ccw_bus_type, &bus_attr_qdio_performance_stats);
147}
diff --git a/drivers/s390/cio/qdio_perf.h b/drivers/s390/cio/qdio_perf.h
deleted file mode 100644
index ff4504ce1e3c..000000000000
--- a/drivers/s390/cio/qdio_perf.h
+++ /dev/null
@@ -1,61 +0,0 @@
1/*
2 * drivers/s390/cio/qdio_perf.h
3 *
4 * Copyright IBM Corp. 2008
5 *
6 * Author: Jan Glauber (jang@linux.vnet.ibm.com)
7 */
8#ifndef QDIO_PERF_H
9#define QDIO_PERF_H
10
11#include <linux/types.h>
12#include <asm/atomic.h>
13
14struct qdio_perf_stats {
15 /* interrupt handler calls */
16 atomic_long_t qdio_int;
17 atomic_long_t pci_int;
18 atomic_long_t thin_int;
19
20 /* tasklet runs */
21 atomic_long_t tasklet_inbound;
22 atomic_long_t tasklet_outbound;
23 atomic_long_t tasklet_thinint;
24 atomic_long_t tasklet_thinint_loop;
25 atomic_long_t thinint_inbound;
26 atomic_long_t thinint_inbound_loop;
27 atomic_long_t thinint_inbound_loop2;
28
29 /* signal adapter calls */
30 atomic_long_t siga_out;
31 atomic_long_t siga_in;
32 atomic_long_t siga_sync;
33
34 /* misc */
35 atomic_long_t inbound_handler;
36 atomic_long_t outbound_handler;
37 atomic_long_t fast_requeue;
38 atomic_long_t outbound_target_full;
39
40 /* for debugging */
41 atomic_long_t debug_tl_out_timer;
42 atomic_long_t debug_stop_polling;
43 atomic_long_t debug_eqbs_all;
44 atomic_long_t debug_eqbs_incomplete;
45 atomic_long_t debug_sqbs_all;
46 atomic_long_t debug_sqbs_incomplete;
47};
48
49extern struct qdio_perf_stats perf_stats;
50extern int qdio_performance_stats;
51
52static inline void qdio_perf_stat_inc(atomic_long_t *count)
53{
54 if (qdio_performance_stats)
55 atomic_long_inc(count);
56}
57
58int qdio_setup_perf_stats(void);
59void qdio_remove_perf_stats(void);
60
61#endif
diff --git a/drivers/s390/cio/qdio_setup.c b/drivers/s390/cio/qdio_setup.c
index 18d54fc21ce9..8c2dea5fa2b4 100644
--- a/drivers/s390/cio/qdio_setup.c
+++ b/drivers/s390/cio/qdio_setup.c
@@ -48,7 +48,6 @@ static void set_impl_params(struct qdio_irq *irq_ptr,
48 if (!irq_ptr) 48 if (!irq_ptr)
49 return; 49 return;
50 50
51 WARN_ON((unsigned long)&irq_ptr->qib & 0xff);
52 irq_ptr->qib.pfmt = qib_param_field_format; 51 irq_ptr->qib.pfmt = qib_param_field_format;
53 if (qib_param_field) 52 if (qib_param_field)
54 memcpy(irq_ptr->qib.parm, qib_param_field, 53 memcpy(irq_ptr->qib.parm, qib_param_field,
@@ -82,14 +81,12 @@ static int __qdio_allocate_qs(struct qdio_q **irq_ptr_qs, int nr_queues)
82 q = kmem_cache_alloc(qdio_q_cache, GFP_KERNEL); 81 q = kmem_cache_alloc(qdio_q_cache, GFP_KERNEL);
83 if (!q) 82 if (!q)
84 return -ENOMEM; 83 return -ENOMEM;
85 WARN_ON((unsigned long)q & 0xff);
86 84
87 q->slib = (struct slib *) __get_free_page(GFP_KERNEL); 85 q->slib = (struct slib *) __get_free_page(GFP_KERNEL);
88 if (!q->slib) { 86 if (!q->slib) {
89 kmem_cache_free(qdio_q_cache, q); 87 kmem_cache_free(qdio_q_cache, q);
90 return -ENOMEM; 88 return -ENOMEM;
91 } 89 }
92 WARN_ON((unsigned long)q->slib & 0x7ff);
93 irq_ptr_qs[i] = q; 90 irq_ptr_qs[i] = q;
94 } 91 }
95 return 0; 92 return 0;
@@ -131,7 +128,7 @@ static void setup_storage_lists(struct qdio_q *q, struct qdio_irq *irq_ptr,
131 /* fill in sbal */ 128 /* fill in sbal */
132 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; j++) { 129 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; j++) {
133 q->sbal[j] = *sbals_array++; 130 q->sbal[j] = *sbals_array++;
134 WARN_ON((unsigned long)q->sbal[j] & 0xff); 131 BUG_ON((unsigned long)q->sbal[j] & 0xff);
135 } 132 }
136 133
137 /* fill in slib */ 134 /* fill in slib */
@@ -147,11 +144,6 @@ static void setup_storage_lists(struct qdio_q *q, struct qdio_irq *irq_ptr,
147 /* fill in sl */ 144 /* fill in sl */
148 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; j++) 145 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; j++)
149 q->sl->element[j].sbal = (unsigned long)q->sbal[j]; 146 q->sl->element[j].sbal = (unsigned long)q->sbal[j];
150
151 DBF_EVENT("sl-slsb-sbal");
152 DBF_HEX(q->sl, sizeof(void *));
153 DBF_HEX(&q->slsb, sizeof(void *));
154 DBF_HEX(q->sbal, sizeof(void *));
155} 147}
156 148
157static void setup_queues(struct qdio_irq *irq_ptr, 149static void setup_queues(struct qdio_irq *irq_ptr,
diff --git a/drivers/s390/cio/qdio_thinint.c b/drivers/s390/cio/qdio_thinint.c
index 981a77ea7ee2..091d904d3182 100644
--- a/drivers/s390/cio/qdio_thinint.c
+++ b/drivers/s390/cio/qdio_thinint.c
@@ -1,9 +1,7 @@
1/* 1/*
2 * linux/drivers/s390/cio/thinint_qdio.c 2 * linux/drivers/s390/cio/thinint_qdio.c
3 * 3 *
4 * thin interrupt support for qdio 4 * Copyright 2000,2009 IBM Corp.
5 *
6 * Copyright 2000-2008 IBM Corp.
7 * Author(s): Utz Bacher <utz.bacher@de.ibm.com> 5 * Author(s): Utz Bacher <utz.bacher@de.ibm.com>
8 * Cornelia Huck <cornelia.huck@de.ibm.com> 6 * Cornelia Huck <cornelia.huck@de.ibm.com>
9 * Jan Glauber <jang@linux.vnet.ibm.com> 7 * Jan Glauber <jang@linux.vnet.ibm.com>
@@ -19,7 +17,6 @@
19#include "ioasm.h" 17#include "ioasm.h"
20#include "qdio.h" 18#include "qdio.h"
21#include "qdio_debug.h" 19#include "qdio_debug.h"
22#include "qdio_perf.h"
23 20
24/* 21/*
25 * Restriction: only 63 iqdio subchannels would have its own indicator, 22 * Restriction: only 63 iqdio subchannels would have its own indicator,
@@ -132,8 +129,6 @@ static void tiqdio_thinint_handler(void *ind, void *drv_data)
132{ 129{
133 struct qdio_q *q; 130 struct qdio_q *q;
134 131
135 qdio_perf_stat_inc(&perf_stats.thin_int);
136
137 /* 132 /*
138 * SVS only when needed: issue SVS to benefit from iqdio interrupt 133 * SVS only when needed: issue SVS to benefit from iqdio interrupt
139 * avoidance (SVS clears adapter interrupt suppression overwrite) 134 * avoidance (SVS clears adapter interrupt suppression overwrite)
@@ -154,6 +149,7 @@ static void tiqdio_thinint_handler(void *ind, void *drv_data)
154 list_for_each_entry_rcu(q, &tiq_list, entry) 149 list_for_each_entry_rcu(q, &tiq_list, entry)
155 /* only process queues from changed sets */ 150 /* only process queues from changed sets */
156 if (*q->irq_ptr->dsci) { 151 if (*q->irq_ptr->dsci) {
152 qperf_inc(q, adapter_int);
157 153
158 /* only clear it if the indicator is non-shared */ 154 /* only clear it if the indicator is non-shared */
159 if (!shared_ind(q->irq_ptr)) 155 if (!shared_ind(q->irq_ptr))
diff --git a/drivers/s390/crypto/zcrypt_api.c b/drivers/s390/crypto/zcrypt_api.c
index 0d4d18bdd45c..c68be24e27d9 100644
--- a/drivers/s390/crypto/zcrypt_api.c
+++ b/drivers/s390/crypto/zcrypt_api.c
@@ -393,10 +393,12 @@ static long zcrypt_rsa_crt(struct ica_rsa_modexpo_crt *crt)
393 * u_mult_inv > 128 bytes. 393 * u_mult_inv > 128 bytes.
394 */ 394 */
395 if (copied == 0) { 395 if (copied == 0) {
396 int len; 396 unsigned int len;
397 spin_unlock_bh(&zcrypt_device_lock); 397 spin_unlock_bh(&zcrypt_device_lock);
398 /* len is max 256 / 2 - 120 = 8 */ 398 /* len is max 256 / 2 - 120 = 8 */
399 len = crt->inputdatalength / 2 - 120; 399 len = crt->inputdatalength / 2 - 120;
400 if (len > sizeof(z1))
401 return -EFAULT;
400 z1 = z2 = z3 = 0; 402 z1 = z2 = z3 = 0;
401 if (copy_from_user(&z1, crt->np_prime, len) || 403 if (copy_from_user(&z1, crt->np_prime, len) ||
402 copy_from_user(&z2, crt->bp_key, len) || 404 copy_from_user(&z2, crt->bp_key, len) ||
diff --git a/drivers/s390/crypto/zcrypt_pcicc.c b/drivers/s390/crypto/zcrypt_pcicc.c
index a23726a0735c..142f72a2ca5a 100644
--- a/drivers/s390/crypto/zcrypt_pcicc.c
+++ b/drivers/s390/crypto/zcrypt_pcicc.c
@@ -373,6 +373,8 @@ static int convert_type86(struct zcrypt_device *zdev,
373 zdev->max_mod_size = PCICC_MAX_MOD_SIZE_OLD; 373 zdev->max_mod_size = PCICC_MAX_MOD_SIZE_OLD;
374 return -EAGAIN; 374 return -EAGAIN;
375 } 375 }
376 if (service_rc == 8 && service_rs == 72)
377 return -EINVAL;
376 zdev->online = 0; 378 zdev->online = 0;
377 return -EAGAIN; /* repeat the request on a different device. */ 379 return -EAGAIN; /* repeat the request on a different device. */
378 } 380 }
diff --git a/drivers/s390/crypto/zcrypt_pcixcc.c b/drivers/s390/crypto/zcrypt_pcixcc.c
index 79c120578e61..68f3e6204db8 100644
--- a/drivers/s390/crypto/zcrypt_pcixcc.c
+++ b/drivers/s390/crypto/zcrypt_pcixcc.c
@@ -470,6 +470,8 @@ static int convert_type86_ica(struct zcrypt_device *zdev,
470 } 470 }
471 if (service_rc == 12 && service_rs == 769) 471 if (service_rc == 12 && service_rs == 769)
472 return -EINVAL; 472 return -EINVAL;
473 if (service_rc == 8 && service_rs == 72)
474 return -EINVAL;
473 zdev->online = 0; 475 zdev->online = 0;
474 return -EAGAIN; /* repeat the request on a different device. */ 476 return -EAGAIN; /* repeat the request on a different device. */
475 } 477 }
diff --git a/drivers/s390/net/claw.c b/drivers/s390/net/claw.c
index 3c77bfe0764c..147bb1a69aba 100644
--- a/drivers/s390/net/claw.c
+++ b/drivers/s390/net/claw.c
@@ -3398,7 +3398,7 @@ claw_init(void)
3398 goto out_err; 3398 goto out_err;
3399 } 3399 }
3400 CLAW_DBF_TEXT(2, setup, "init_mod"); 3400 CLAW_DBF_TEXT(2, setup, "init_mod");
3401 claw_root_dev = root_device_register("qeth"); 3401 claw_root_dev = root_device_register("claw");
3402 ret = IS_ERR(claw_root_dev) ? PTR_ERR(claw_root_dev) : 0; 3402 ret = IS_ERR(claw_root_dev) ? PTR_ERR(claw_root_dev) : 0;
3403 if (ret) 3403 if (ret)
3404 goto register_err; 3404 goto register_err;
diff --git a/drivers/s390/scsi/zfcp_cfdc.c b/drivers/s390/scsi/zfcp_cfdc.c
index f932400e980a..0eb6eefd2c1a 100644
--- a/drivers/s390/scsi/zfcp_cfdc.c
+++ b/drivers/s390/scsi/zfcp_cfdc.c
@@ -12,6 +12,7 @@
12 12
13#include <linux/types.h> 13#include <linux/types.h>
14#include <linux/miscdevice.h> 14#include <linux/miscdevice.h>
15#include <asm/compat.h>
15#include <asm/ccwdev.h> 16#include <asm/ccwdev.h>
16#include "zfcp_def.h" 17#include "zfcp_def.h"
17#include "zfcp_ext.h" 18#include "zfcp_ext.h"
@@ -163,7 +164,7 @@ static void zfcp_cfdc_req_to_sense(struct zfcp_cfdc_data *data,
163} 164}
164 165
165static long zfcp_cfdc_dev_ioctl(struct file *file, unsigned int command, 166static long zfcp_cfdc_dev_ioctl(struct file *file, unsigned int command,
166 unsigned long buffer) 167 unsigned long arg)
167{ 168{
168 struct zfcp_cfdc_data *data; 169 struct zfcp_cfdc_data *data;
169 struct zfcp_cfdc_data __user *data_user; 170 struct zfcp_cfdc_data __user *data_user;
@@ -175,7 +176,11 @@ static long zfcp_cfdc_dev_ioctl(struct file *file, unsigned int command,
175 if (command != ZFCP_CFDC_IOC) 176 if (command != ZFCP_CFDC_IOC)
176 return -ENOTTY; 177 return -ENOTTY;
177 178
178 data_user = (void __user *) buffer; 179 if (is_compat_task())
180 data_user = compat_ptr(arg);
181 else
182 data_user = (void __user *)arg;
183
179 if (!data_user) 184 if (!data_user)
180 return -EINVAL; 185 return -EINVAL;
181 186
diff --git a/drivers/s390/scsi/zfcp_dbf.c b/drivers/s390/scsi/zfcp_dbf.c
index 84450955ae11..7369c8911bcf 100644
--- a/drivers/s390/scsi/zfcp_dbf.c
+++ b/drivers/s390/scsi/zfcp_dbf.c
@@ -327,7 +327,7 @@ static void zfcp_dbf_hba_view_response(char **p,
327 break; 327 break;
328 zfcp_dbf_out(p, "scsi_cmnd", "0x%0Lx", r->u.fcp.cmnd); 328 zfcp_dbf_out(p, "scsi_cmnd", "0x%0Lx", r->u.fcp.cmnd);
329 zfcp_dbf_out(p, "scsi_serial", "0x%016Lx", r->u.fcp.serial); 329 zfcp_dbf_out(p, "scsi_serial", "0x%016Lx", r->u.fcp.serial);
330 p += sprintf(*p, "\n"); 330 *p += sprintf(*p, "\n");
331 break; 331 break;
332 332
333 case FSF_QTCB_OPEN_PORT_WITH_DID: 333 case FSF_QTCB_OPEN_PORT_WITH_DID:
diff --git a/drivers/s390/scsi/zfcp_ext.h b/drivers/s390/scsi/zfcp_ext.h
index 03dec832b465..66bdb34143cb 100644
--- a/drivers/s390/scsi/zfcp_ext.h
+++ b/drivers/s390/scsi/zfcp_ext.h
@@ -108,6 +108,7 @@ extern void zfcp_fc_wka_ports_force_offline(struct zfcp_fc_wka_ports *);
108extern int zfcp_fc_gs_setup(struct zfcp_adapter *); 108extern int zfcp_fc_gs_setup(struct zfcp_adapter *);
109extern void zfcp_fc_gs_destroy(struct zfcp_adapter *); 109extern void zfcp_fc_gs_destroy(struct zfcp_adapter *);
110extern int zfcp_fc_exec_bsg_job(struct fc_bsg_job *); 110extern int zfcp_fc_exec_bsg_job(struct fc_bsg_job *);
111extern int zfcp_fc_timeout_bsg_job(struct fc_bsg_job *);
111 112
112/* zfcp_fsf.c */ 113/* zfcp_fsf.c */
113extern int zfcp_fsf_open_port(struct zfcp_erp_action *); 114extern int zfcp_fsf_open_port(struct zfcp_erp_action *);
@@ -129,9 +130,9 @@ extern void zfcp_fsf_req_dismiss_all(struct zfcp_adapter *);
129extern int zfcp_fsf_status_read(struct zfcp_qdio *); 130extern int zfcp_fsf_status_read(struct zfcp_qdio *);
130extern int zfcp_status_read_refill(struct zfcp_adapter *adapter); 131extern int zfcp_status_read_refill(struct zfcp_adapter *adapter);
131extern int zfcp_fsf_send_ct(struct zfcp_fc_wka_port *, struct zfcp_fsf_ct_els *, 132extern int zfcp_fsf_send_ct(struct zfcp_fc_wka_port *, struct zfcp_fsf_ct_els *,
132 mempool_t *); 133 mempool_t *, unsigned int);
133extern int zfcp_fsf_send_els(struct zfcp_adapter *, u32, 134extern int zfcp_fsf_send_els(struct zfcp_adapter *, u32,
134 struct zfcp_fsf_ct_els *); 135 struct zfcp_fsf_ct_els *, unsigned int);
135extern int zfcp_fsf_send_fcp_command_task(struct zfcp_unit *, 136extern int zfcp_fsf_send_fcp_command_task(struct zfcp_unit *,
136 struct scsi_cmnd *); 137 struct scsi_cmnd *);
137extern void zfcp_fsf_req_free(struct zfcp_fsf_req *); 138extern void zfcp_fsf_req_free(struct zfcp_fsf_req *);
diff --git a/drivers/s390/scsi/zfcp_fc.c b/drivers/s390/scsi/zfcp_fc.c
index ac5e3b7a3576..271399f62f1b 100644
--- a/drivers/s390/scsi/zfcp_fc.c
+++ b/drivers/s390/scsi/zfcp_fc.c
@@ -258,7 +258,8 @@ static int zfcp_fc_ns_gid_pn_request(struct zfcp_port *port,
258 gid_pn->gid_pn_req.gid_pn.fn_wwpn = port->wwpn; 258 gid_pn->gid_pn_req.gid_pn.fn_wwpn = port->wwpn;
259 259
260 ret = zfcp_fsf_send_ct(&adapter->gs->ds, &gid_pn->ct, 260 ret = zfcp_fsf_send_ct(&adapter->gs->ds, &gid_pn->ct,
261 adapter->pool.gid_pn_req); 261 adapter->pool.gid_pn_req,
262 ZFCP_FC_CTELS_TMO);
262 if (!ret) { 263 if (!ret) {
263 wait_for_completion(&completion); 264 wait_for_completion(&completion);
264 zfcp_fc_ns_gid_pn_eval(gid_pn); 265 zfcp_fc_ns_gid_pn_eval(gid_pn);
@@ -421,7 +422,8 @@ static int zfcp_fc_adisc(struct zfcp_port *port)
421 hton24(adisc->adisc_req.adisc_port_id, 422 hton24(adisc->adisc_req.adisc_port_id,
422 fc_host_port_id(adapter->scsi_host)); 423 fc_host_port_id(adapter->scsi_host));
423 424
424 ret = zfcp_fsf_send_els(adapter, port->d_id, &adisc->els); 425 ret = zfcp_fsf_send_els(adapter, port->d_id, &adisc->els,
426 ZFCP_FC_CTELS_TMO);
425 if (ret) 427 if (ret)
426 kmem_cache_free(zfcp_data.adisc_cache, adisc); 428 kmem_cache_free(zfcp_data.adisc_cache, adisc);
427 429
@@ -532,7 +534,8 @@ static int zfcp_fc_send_gpn_ft(struct zfcp_fc_gpn_ft *gpn_ft,
532 ct->req = &gpn_ft->sg_req; 534 ct->req = &gpn_ft->sg_req;
533 ct->resp = gpn_ft->sg_resp; 535 ct->resp = gpn_ft->sg_resp;
534 536
535 ret = zfcp_fsf_send_ct(&adapter->gs->ds, ct, NULL); 537 ret = zfcp_fsf_send_ct(&adapter->gs->ds, ct, NULL,
538 ZFCP_FC_CTELS_TMO);
536 if (!ret) 539 if (!ret)
537 wait_for_completion(&completion); 540 wait_for_completion(&completion);
538 return ret; 541 return ret;
@@ -668,15 +671,52 @@ static void zfcp_fc_ct_els_job_handler(void *data)
668{ 671{
669 struct fc_bsg_job *job = data; 672 struct fc_bsg_job *job = data;
670 struct zfcp_fsf_ct_els *zfcp_ct_els = job->dd_data; 673 struct zfcp_fsf_ct_els *zfcp_ct_els = job->dd_data;
671 int status = zfcp_ct_els->status; 674 struct fc_bsg_reply *jr = job->reply;
672 int reply_status;
673 675
674 reply_status = status ? FC_CTELS_STATUS_REJECT : FC_CTELS_STATUS_OK; 676 jr->reply_payload_rcv_len = job->reply_payload.payload_len;
675 job->reply->reply_data.ctels_reply.status = reply_status; 677 jr->reply_data.ctels_reply.status = FC_CTELS_STATUS_OK;
676 job->reply->reply_payload_rcv_len = job->reply_payload.payload_len; 678 jr->result = zfcp_ct_els->status ? -EIO : 0;
677 job->job_done(job); 679 job->job_done(job);
678} 680}
679 681
682static struct zfcp_fc_wka_port *zfcp_fc_job_wka_port(struct fc_bsg_job *job)
683{
684 u32 preamble_word1;
685 u8 gs_type;
686 struct zfcp_adapter *adapter;
687
688 preamble_word1 = job->request->rqst_data.r_ct.preamble_word1;
689 gs_type = (preamble_word1 & 0xff000000) >> 24;
690
691 adapter = (struct zfcp_adapter *) job->shost->hostdata[0];
692
693 switch (gs_type) {
694 case FC_FST_ALIAS:
695 return &adapter->gs->as;
696 case FC_FST_MGMT:
697 return &adapter->gs->ms;
698 case FC_FST_TIME:
699 return &adapter->gs->ts;
700 break;
701 case FC_FST_DIR:
702 return &adapter->gs->ds;
703 break;
704 default:
705 return NULL;
706 }
707}
708
709static void zfcp_fc_ct_job_handler(void *data)
710{
711 struct fc_bsg_job *job = data;
712 struct zfcp_fc_wka_port *wka_port;
713
714 wka_port = zfcp_fc_job_wka_port(job);
715 zfcp_fc_wka_port_put(wka_port);
716
717 zfcp_fc_ct_els_job_handler(data);
718}
719
680static int zfcp_fc_exec_els_job(struct fc_bsg_job *job, 720static int zfcp_fc_exec_els_job(struct fc_bsg_job *job,
681 struct zfcp_adapter *adapter) 721 struct zfcp_adapter *adapter)
682{ 722{
@@ -695,43 +735,27 @@ static int zfcp_fc_exec_els_job(struct fc_bsg_job *job,
695 } else 735 } else
696 d_id = ntoh24(job->request->rqst_data.h_els.port_id); 736 d_id = ntoh24(job->request->rqst_data.h_els.port_id);
697 737
698 return zfcp_fsf_send_els(adapter, d_id, els); 738 els->handler = zfcp_fc_ct_els_job_handler;
739 return zfcp_fsf_send_els(adapter, d_id, els, job->req->timeout / HZ);
699} 740}
700 741
701static int zfcp_fc_exec_ct_job(struct fc_bsg_job *job, 742static int zfcp_fc_exec_ct_job(struct fc_bsg_job *job,
702 struct zfcp_adapter *adapter) 743 struct zfcp_adapter *adapter)
703{ 744{
704 int ret; 745 int ret;
705 u8 gs_type;
706 struct zfcp_fsf_ct_els *ct = job->dd_data; 746 struct zfcp_fsf_ct_els *ct = job->dd_data;
707 struct zfcp_fc_wka_port *wka_port; 747 struct zfcp_fc_wka_port *wka_port;
708 u32 preamble_word1;
709 748
710 preamble_word1 = job->request->rqst_data.r_ct.preamble_word1; 749 wka_port = zfcp_fc_job_wka_port(job);
711 gs_type = (preamble_word1 & 0xff000000) >> 24; 750 if (!wka_port)
712 751 return -EINVAL;
713 switch (gs_type) {
714 case FC_FST_ALIAS:
715 wka_port = &adapter->gs->as;
716 break;
717 case FC_FST_MGMT:
718 wka_port = &adapter->gs->ms;
719 break;
720 case FC_FST_TIME:
721 wka_port = &adapter->gs->ts;
722 break;
723 case FC_FST_DIR:
724 wka_port = &adapter->gs->ds;
725 break;
726 default:
727 return -EINVAL; /* no such service */
728 }
729 752
730 ret = zfcp_fc_wka_port_get(wka_port); 753 ret = zfcp_fc_wka_port_get(wka_port);
731 if (ret) 754 if (ret)
732 return ret; 755 return ret;
733 756
734 ret = zfcp_fsf_send_ct(wka_port, ct, NULL); 757 ct->handler = zfcp_fc_ct_job_handler;
758 ret = zfcp_fsf_send_ct(wka_port, ct, NULL, job->req->timeout / HZ);
735 if (ret) 759 if (ret)
736 zfcp_fc_wka_port_put(wka_port); 760 zfcp_fc_wka_port_put(wka_port);
737 761
@@ -752,7 +776,6 @@ int zfcp_fc_exec_bsg_job(struct fc_bsg_job *job)
752 776
753 ct_els->req = job->request_payload.sg_list; 777 ct_els->req = job->request_payload.sg_list;
754 ct_els->resp = job->reply_payload.sg_list; 778 ct_els->resp = job->reply_payload.sg_list;
755 ct_els->handler = zfcp_fc_ct_els_job_handler;
756 ct_els->handler_data = job; 779 ct_els->handler_data = job;
757 780
758 switch (job->request->msgcode) { 781 switch (job->request->msgcode) {
@@ -767,6 +790,12 @@ int zfcp_fc_exec_bsg_job(struct fc_bsg_job *job)
767 } 790 }
768} 791}
769 792
793int zfcp_fc_timeout_bsg_job(struct fc_bsg_job *job)
794{
795 /* hardware tracks timeout, reset bsg timeout to not interfere */
796 return -EAGAIN;
797}
798
770int zfcp_fc_gs_setup(struct zfcp_adapter *adapter) 799int zfcp_fc_gs_setup(struct zfcp_adapter *adapter)
771{ 800{
772 struct zfcp_fc_wka_ports *wka_ports; 801 struct zfcp_fc_wka_ports *wka_ports;
diff --git a/drivers/s390/scsi/zfcp_fc.h b/drivers/s390/scsi/zfcp_fc.h
index cb2a3669a384..0747b087390d 100644
--- a/drivers/s390/scsi/zfcp_fc.h
+++ b/drivers/s390/scsi/zfcp_fc.h
@@ -27,6 +27,8 @@
27#define ZFCP_FC_GPN_FT_MAX_ENT (ZFCP_FC_GPN_FT_NUM_BUFS * \ 27#define ZFCP_FC_GPN_FT_MAX_ENT (ZFCP_FC_GPN_FT_NUM_BUFS * \
28 (ZFCP_FC_GPN_FT_ENT_PAGE + 1)) 28 (ZFCP_FC_GPN_FT_ENT_PAGE + 1))
29 29
30#define ZFCP_FC_CTELS_TMO (2 * FC_DEF_R_A_TOV / 1000)
31
30/** 32/**
31 * struct zfcp_fc_gid_pn_req - container for ct header plus gid_pn request 33 * struct zfcp_fc_gid_pn_req - container for ct header plus gid_pn request
32 * @ct_hdr: FC GS common transport header 34 * @ct_hdr: FC GS common transport header
diff --git a/drivers/s390/scsi/zfcp_fsf.c b/drivers/s390/scsi/zfcp_fsf.c
index 482dcd97aa5d..e8fb4d9baa8b 100644
--- a/drivers/s390/scsi/zfcp_fsf.c
+++ b/drivers/s390/scsi/zfcp_fsf.c
@@ -1068,20 +1068,20 @@ static int zfcp_fsf_setup_ct_els_sbals(struct zfcp_fsf_req *req,
1068static int zfcp_fsf_setup_ct_els(struct zfcp_fsf_req *req, 1068static int zfcp_fsf_setup_ct_els(struct zfcp_fsf_req *req,
1069 struct scatterlist *sg_req, 1069 struct scatterlist *sg_req,
1070 struct scatterlist *sg_resp, 1070 struct scatterlist *sg_resp,
1071 int max_sbals) 1071 int max_sbals, unsigned int timeout)
1072{ 1072{
1073 int ret; 1073 int ret;
1074 unsigned int fcp_chan_timeout;
1075 1074
1076 ret = zfcp_fsf_setup_ct_els_sbals(req, sg_req, sg_resp, max_sbals); 1075 ret = zfcp_fsf_setup_ct_els_sbals(req, sg_req, sg_resp, max_sbals);
1077 if (ret) 1076 if (ret)
1078 return ret; 1077 return ret;
1079 1078
1080 /* common settings for ct/gs and els requests */ 1079 /* common settings for ct/gs and els requests */
1081 fcp_chan_timeout = 2 * FC_DEF_R_A_TOV / 1000; 1080 if (timeout > 255)
1081 timeout = 255; /* max value accepted by hardware */
1082 req->qtcb->bottom.support.service_class = FSF_CLASS_3; 1082 req->qtcb->bottom.support.service_class = FSF_CLASS_3;
1083 req->qtcb->bottom.support.timeout = fcp_chan_timeout; 1083 req->qtcb->bottom.support.timeout = timeout;
1084 zfcp_fsf_start_timer(req, (fcp_chan_timeout + 10) * HZ); 1084 zfcp_fsf_start_timer(req, (timeout + 10) * HZ);
1085 1085
1086 return 0; 1086 return 0;
1087} 1087}
@@ -1092,7 +1092,8 @@ static int zfcp_fsf_setup_ct_els(struct zfcp_fsf_req *req,
1092 * @pool: if non-null this mempool is used to allocate struct zfcp_fsf_req 1092 * @pool: if non-null this mempool is used to allocate struct zfcp_fsf_req
1093 */ 1093 */
1094int zfcp_fsf_send_ct(struct zfcp_fc_wka_port *wka_port, 1094int zfcp_fsf_send_ct(struct zfcp_fc_wka_port *wka_port,
1095 struct zfcp_fsf_ct_els *ct, mempool_t *pool) 1095 struct zfcp_fsf_ct_els *ct, mempool_t *pool,
1096 unsigned int timeout)
1096{ 1097{
1097 struct zfcp_qdio *qdio = wka_port->adapter->qdio; 1098 struct zfcp_qdio *qdio = wka_port->adapter->qdio;
1098 struct zfcp_fsf_req *req; 1099 struct zfcp_fsf_req *req;
@@ -1111,7 +1112,7 @@ int zfcp_fsf_send_ct(struct zfcp_fc_wka_port *wka_port,
1111 1112
1112 req->status |= ZFCP_STATUS_FSFREQ_CLEANUP; 1113 req->status |= ZFCP_STATUS_FSFREQ_CLEANUP;
1113 ret = zfcp_fsf_setup_ct_els(req, ct->req, ct->resp, 1114 ret = zfcp_fsf_setup_ct_els(req, ct->req, ct->resp,
1114 FSF_MAX_SBALS_PER_REQ); 1115 FSF_MAX_SBALS_PER_REQ, timeout);
1115 if (ret) 1116 if (ret)
1116 goto failed_send; 1117 goto failed_send;
1117 1118
@@ -1188,7 +1189,7 @@ skip_fsfstatus:
1188 * @els: pointer to struct zfcp_send_els with data for the command 1189 * @els: pointer to struct zfcp_send_els with data for the command
1189 */ 1190 */
1190int zfcp_fsf_send_els(struct zfcp_adapter *adapter, u32 d_id, 1191int zfcp_fsf_send_els(struct zfcp_adapter *adapter, u32 d_id,
1191 struct zfcp_fsf_ct_els *els) 1192 struct zfcp_fsf_ct_els *els, unsigned int timeout)
1192{ 1193{
1193 struct zfcp_fsf_req *req; 1194 struct zfcp_fsf_req *req;
1194 struct zfcp_qdio *qdio = adapter->qdio; 1195 struct zfcp_qdio *qdio = adapter->qdio;
@@ -1206,7 +1207,7 @@ int zfcp_fsf_send_els(struct zfcp_adapter *adapter, u32 d_id,
1206 } 1207 }
1207 1208
1208 req->status |= ZFCP_STATUS_FSFREQ_CLEANUP; 1209 req->status |= ZFCP_STATUS_FSFREQ_CLEANUP;
1209 ret = zfcp_fsf_setup_ct_els(req, els->req, els->resp, 2); 1210 ret = zfcp_fsf_setup_ct_els(req, els->req, els->resp, 2, timeout);
1210 1211
1211 if (ret) 1212 if (ret)
1212 goto failed_send; 1213 goto failed_send;
diff --git a/drivers/s390/scsi/zfcp_scsi.c b/drivers/s390/scsi/zfcp_scsi.c
index 771cc536a989..8e6fc68d6bd4 100644
--- a/drivers/s390/scsi/zfcp_scsi.c
+++ b/drivers/s390/scsi/zfcp_scsi.c
@@ -652,6 +652,7 @@ struct fc_function_template zfcp_transport_functions = {
652 .show_host_port_state = 1, 652 .show_host_port_state = 1,
653 .show_host_active_fc4s = 1, 653 .show_host_active_fc4s = 1,
654 .bsg_request = zfcp_fc_exec_bsg_job, 654 .bsg_request = zfcp_fc_exec_bsg_job,
655 .bsg_timeout = zfcp_fc_timeout_bsg_job,
655 /* no functions registered for following dynamic attributes but 656 /* no functions registered for following dynamic attributes but
656 directly set by LLDD */ 657 directly set by LLDD */
657 .show_host_port_type = 1, 658 .show_host_port_type = 1,
diff --git a/drivers/sbus/char/bbc_envctrl.c b/drivers/sbus/char/bbc_envctrl.c
index 7c815d3327f7..28d86f9df83c 100644
--- a/drivers/sbus/char/bbc_envctrl.c
+++ b/drivers/sbus/char/bbc_envctrl.c
@@ -522,6 +522,40 @@ static void attach_one_fan(struct bbc_i2c_bus *bp, struct of_device *op,
522 set_fan_speeds(fp); 522 set_fan_speeds(fp);
523} 523}
524 524
525static void destroy_one_temp(struct bbc_cpu_temperature *tp)
526{
527 bbc_i2c_detach(tp->client);
528 kfree(tp);
529}
530
531static void destroy_all_temps(struct bbc_i2c_bus *bp)
532{
533 struct bbc_cpu_temperature *tp, *tpos;
534
535 list_for_each_entry_safe(tp, tpos, &bp->temps, bp_list) {
536 list_del(&tp->bp_list);
537 list_del(&tp->glob_list);
538 destroy_one_temp(tp);
539 }
540}
541
542static void destroy_one_fan(struct bbc_fan_control *fp)
543{
544 bbc_i2c_detach(fp->client);
545 kfree(fp);
546}
547
548static void destroy_all_fans(struct bbc_i2c_bus *bp)
549{
550 struct bbc_fan_control *fp, *fpos;
551
552 list_for_each_entry_safe(fp, fpos, &bp->fans, bp_list) {
553 list_del(&fp->bp_list);
554 list_del(&fp->glob_list);
555 destroy_one_fan(fp);
556 }
557}
558
525int bbc_envctrl_init(struct bbc_i2c_bus *bp) 559int bbc_envctrl_init(struct bbc_i2c_bus *bp)
526{ 560{
527 struct of_device *op; 561 struct of_device *op;
@@ -541,6 +575,8 @@ int bbc_envctrl_init(struct bbc_i2c_bus *bp)
541 int err = PTR_ERR(kenvctrld_task); 575 int err = PTR_ERR(kenvctrld_task);
542 576
543 kenvctrld_task = NULL; 577 kenvctrld_task = NULL;
578 destroy_all_temps(bp);
579 destroy_all_fans(bp);
544 return err; 580 return err;
545 } 581 }
546 } 582 }
@@ -548,35 +584,11 @@ int bbc_envctrl_init(struct bbc_i2c_bus *bp)
548 return 0; 584 return 0;
549} 585}
550 586
551static void destroy_one_temp(struct bbc_cpu_temperature *tp)
552{
553 bbc_i2c_detach(tp->client);
554 kfree(tp);
555}
556
557static void destroy_one_fan(struct bbc_fan_control *fp)
558{
559 bbc_i2c_detach(fp->client);
560 kfree(fp);
561}
562
563void bbc_envctrl_cleanup(struct bbc_i2c_bus *bp) 587void bbc_envctrl_cleanup(struct bbc_i2c_bus *bp)
564{ 588{
565 struct bbc_cpu_temperature *tp, *tpos;
566 struct bbc_fan_control *fp, *fpos;
567
568 if (kenvctrld_task) 589 if (kenvctrld_task)
569 kthread_stop(kenvctrld_task); 590 kthread_stop(kenvctrld_task);
570 591
571 list_for_each_entry_safe(tp, tpos, &bp->temps, bp_list) { 592 destroy_all_temps(bp);
572 list_del(&tp->bp_list); 593 destroy_all_fans(bp);
573 list_del(&tp->glob_list);
574 destroy_one_temp(tp);
575 }
576
577 list_for_each_entry_safe(fp, fpos, &bp->fans, bp_list) {
578 list_del(&fp->bp_list);
579 list_del(&fp->glob_list);
580 destroy_one_fan(fp);
581 }
582} 594}
diff --git a/drivers/scsi/3w-9xxx.c b/drivers/scsi/3w-9xxx.c
index 3bf75924741f..84d3bbaa95e7 100644
--- a/drivers/scsi/3w-9xxx.c
+++ b/drivers/scsi/3w-9xxx.c
@@ -76,6 +76,7 @@
76 Fix bug in twa_get_param() on 4GB+. 76 Fix bug in twa_get_param() on 4GB+.
77 Use pci_resource_len() for ioremap(). 77 Use pci_resource_len() for ioremap().
78 2.26.02.012 - Add power management support. 78 2.26.02.012 - Add power management support.
79 2.26.02.013 - Fix bug in twa_load_sgl().
79*/ 80*/
80 81
81#include <linux/module.h> 82#include <linux/module.h>
@@ -100,7 +101,7 @@
100#include "3w-9xxx.h" 101#include "3w-9xxx.h"
101 102
102/* Globals */ 103/* Globals */
103#define TW_DRIVER_VERSION "2.26.02.012" 104#define TW_DRIVER_VERSION "2.26.02.013"
104static TW_Device_Extension *twa_device_extension_list[TW_MAX_SLOT]; 105static TW_Device_Extension *twa_device_extension_list[TW_MAX_SLOT];
105static unsigned int twa_device_extension_count; 106static unsigned int twa_device_extension_count;
106static int twa_major = -1; 107static int twa_major = -1;
@@ -1382,10 +1383,12 @@ static void twa_load_sgl(TW_Device_Extension *tw_dev, TW_Command_Full *full_comm
1382 newcommand = &full_command_packet->command.newcommand; 1383 newcommand = &full_command_packet->command.newcommand;
1383 newcommand->request_id__lunl = 1384 newcommand->request_id__lunl =
1384 cpu_to_le16(TW_REQ_LUN_IN(TW_LUN_OUT(newcommand->request_id__lunl), request_id)); 1385 cpu_to_le16(TW_REQ_LUN_IN(TW_LUN_OUT(newcommand->request_id__lunl), request_id));
1385 newcommand->sg_list[0].address = TW_CPU_TO_SGL(dma_handle + sizeof(TW_Ioctl_Buf_Apache) - 1); 1386 if (length) {
1386 newcommand->sg_list[0].length = cpu_to_le32(length); 1387 newcommand->sg_list[0].address = TW_CPU_TO_SGL(dma_handle + sizeof(TW_Ioctl_Buf_Apache) - 1);
1388 newcommand->sg_list[0].length = cpu_to_le32(length);
1389 }
1387 newcommand->sgl_entries__lunh = 1390 newcommand->sgl_entries__lunh =
1388 cpu_to_le16(TW_REQ_LUN_IN(TW_LUN_OUT(newcommand->sgl_entries__lunh), 1)); 1391 cpu_to_le16(TW_REQ_LUN_IN(TW_LUN_OUT(newcommand->sgl_entries__lunh), length ? 1 : 0));
1389 } else { 1392 } else {
1390 oldcommand = &full_command_packet->command.oldcommand; 1393 oldcommand = &full_command_packet->command.oldcommand;
1391 oldcommand->request_id = request_id; 1394 oldcommand->request_id = request_id;
diff --git a/drivers/scsi/Kconfig b/drivers/scsi/Kconfig
index 36900c71a592..9191d1ea6451 100644
--- a/drivers/scsi/Kconfig
+++ b/drivers/scsi/Kconfig
@@ -388,6 +388,16 @@ config BLK_DEV_3W_XXXX_RAID
388 Please read the comments at the top of 388 Please read the comments at the top of
389 <file:drivers/scsi/3w-xxxx.c>. 389 <file:drivers/scsi/3w-xxxx.c>.
390 390
391config SCSI_HPSA
392 tristate "HP Smart Array SCSI driver"
393 depends on PCI && SCSI
394 help
395 This driver supports HP Smart Array Controllers (circa 2009).
396 It is a SCSI alternative to the cciss driver, which is a block
397 driver. Anyone wishing to use HP Smart Array controllers who
398 would prefer the devices be presented to linux as SCSI devices,
399 rather than as generic block devices should say Y here.
400
391config SCSI_3W_9XXX 401config SCSI_3W_9XXX
392 tristate "3ware 9xxx SATA-RAID support" 402 tristate "3ware 9xxx SATA-RAID support"
393 depends on PCI && SCSI 403 depends on PCI && SCSI
diff --git a/drivers/scsi/Makefile b/drivers/scsi/Makefile
index 280d3c657d60..92a8c500b23d 100644
--- a/drivers/scsi/Makefile
+++ b/drivers/scsi/Makefile
@@ -91,6 +91,7 @@ obj-$(CONFIG_SCSI_BFA_FC) += bfa/
91obj-$(CONFIG_SCSI_PAS16) += pas16.o 91obj-$(CONFIG_SCSI_PAS16) += pas16.o
92obj-$(CONFIG_SCSI_T128) += t128.o 92obj-$(CONFIG_SCSI_T128) += t128.o
93obj-$(CONFIG_SCSI_DMX3191D) += dmx3191d.o 93obj-$(CONFIG_SCSI_DMX3191D) += dmx3191d.o
94obj-$(CONFIG_SCSI_HPSA) += hpsa.o
94obj-$(CONFIG_SCSI_DTC3280) += dtc.o 95obj-$(CONFIG_SCSI_DTC3280) += dtc.o
95obj-$(CONFIG_SCSI_SYM53C8XX_2) += sym53c8xx_2/ 96obj-$(CONFIG_SCSI_SYM53C8XX_2) += sym53c8xx_2/
96obj-$(CONFIG_SCSI_ZALON) += zalon7xx.o 97obj-$(CONFIG_SCSI_ZALON) += zalon7xx.o
diff --git a/drivers/scsi/aacraid/aachba.c b/drivers/scsi/aacraid/aachba.c
index 2a889853a106..7e26ebc26661 100644
--- a/drivers/scsi/aacraid/aachba.c
+++ b/drivers/scsi/aacraid/aachba.c
@@ -293,7 +293,10 @@ int aac_get_config_status(struct aac_dev *dev, int commit_flag)
293 status = -EINVAL; 293 status = -EINVAL;
294 } 294 }
295 } 295 }
296 aac_fib_complete(fibptr); 296 /* Do not set XferState to zero unless receives a response from F/W */
297 if (status >= 0)
298 aac_fib_complete(fibptr);
299
297 /* Send a CT_COMMIT_CONFIG to enable discovery of devices */ 300 /* Send a CT_COMMIT_CONFIG to enable discovery of devices */
298 if (status >= 0) { 301 if (status >= 0) {
299 if ((aac_commit == 1) || commit_flag) { 302 if ((aac_commit == 1) || commit_flag) {
@@ -310,13 +313,18 @@ int aac_get_config_status(struct aac_dev *dev, int commit_flag)
310 FsaNormal, 313 FsaNormal,
311 1, 1, 314 1, 1,
312 NULL, NULL); 315 NULL, NULL);
313 aac_fib_complete(fibptr); 316 /* Do not set XferState to zero unless
317 * receives a response from F/W */
318 if (status >= 0)
319 aac_fib_complete(fibptr);
314 } else if (aac_commit == 0) { 320 } else if (aac_commit == 0) {
315 printk(KERN_WARNING 321 printk(KERN_WARNING
316 "aac_get_config_status: Foreign device configurations are being ignored\n"); 322 "aac_get_config_status: Foreign device configurations are being ignored\n");
317 } 323 }
318 } 324 }
319 aac_fib_free(fibptr); 325 /* FIB should be freed only after getting the response from the F/W */
326 if (status != -ERESTARTSYS)
327 aac_fib_free(fibptr);
320 return status; 328 return status;
321} 329}
322 330
@@ -355,7 +363,9 @@ int aac_get_containers(struct aac_dev *dev)
355 maximum_num_containers = le32_to_cpu(dresp->ContainerSwitchEntries); 363 maximum_num_containers = le32_to_cpu(dresp->ContainerSwitchEntries);
356 aac_fib_complete(fibptr); 364 aac_fib_complete(fibptr);
357 } 365 }
358 aac_fib_free(fibptr); 366 /* FIB should be freed only after getting the response from the F/W */
367 if (status != -ERESTARTSYS)
368 aac_fib_free(fibptr);
359 369
360 if (maximum_num_containers < MAXIMUM_NUM_CONTAINERS) 370 if (maximum_num_containers < MAXIMUM_NUM_CONTAINERS)
361 maximum_num_containers = MAXIMUM_NUM_CONTAINERS; 371 maximum_num_containers = MAXIMUM_NUM_CONTAINERS;
@@ -1245,8 +1255,12 @@ int aac_get_adapter_info(struct aac_dev* dev)
1245 NULL); 1255 NULL);
1246 1256
1247 if (rcode < 0) { 1257 if (rcode < 0) {
1248 aac_fib_complete(fibptr); 1258 /* FIB should be freed only after
1249 aac_fib_free(fibptr); 1259 * getting the response from the F/W */
1260 if (rcode != -ERESTARTSYS) {
1261 aac_fib_complete(fibptr);
1262 aac_fib_free(fibptr);
1263 }
1250 return rcode; 1264 return rcode;
1251 } 1265 }
1252 memcpy(&dev->adapter_info, info, sizeof(*info)); 1266 memcpy(&dev->adapter_info, info, sizeof(*info));
@@ -1270,6 +1284,12 @@ int aac_get_adapter_info(struct aac_dev* dev)
1270 1284
1271 if (rcode >= 0) 1285 if (rcode >= 0)
1272 memcpy(&dev->supplement_adapter_info, sinfo, sizeof(*sinfo)); 1286 memcpy(&dev->supplement_adapter_info, sinfo, sizeof(*sinfo));
1287 if (rcode == -ERESTARTSYS) {
1288 fibptr = aac_fib_alloc(dev);
1289 if (!fibptr)
1290 return -ENOMEM;
1291 }
1292
1273 } 1293 }
1274 1294
1275 1295
@@ -1470,9 +1490,11 @@ int aac_get_adapter_info(struct aac_dev* dev)
1470 (dev->scsi_host_ptr->sg_tablesize * 8) + 112; 1490 (dev->scsi_host_ptr->sg_tablesize * 8) + 112;
1471 } 1491 }
1472 } 1492 }
1473 1493 /* FIB should be freed only after getting the response from the F/W */
1474 aac_fib_complete(fibptr); 1494 if (rcode != -ERESTARTSYS) {
1475 aac_fib_free(fibptr); 1495 aac_fib_complete(fibptr);
1496 aac_fib_free(fibptr);
1497 }
1476 1498
1477 return rcode; 1499 return rcode;
1478} 1500}
@@ -1633,6 +1655,7 @@ static int aac_read(struct scsi_cmnd * scsicmd)
1633 * Alocate and initialize a Fib 1655 * Alocate and initialize a Fib
1634 */ 1656 */
1635 if (!(cmd_fibcontext = aac_fib_alloc(dev))) { 1657 if (!(cmd_fibcontext = aac_fib_alloc(dev))) {
1658 printk(KERN_WARNING "aac_read: fib allocation failed\n");
1636 return -1; 1659 return -1;
1637 } 1660 }
1638 1661
@@ -1712,9 +1735,14 @@ static int aac_write(struct scsi_cmnd * scsicmd)
1712 * Allocate and initialize a Fib then setup a BlockWrite command 1735 * Allocate and initialize a Fib then setup a BlockWrite command
1713 */ 1736 */
1714 if (!(cmd_fibcontext = aac_fib_alloc(dev))) { 1737 if (!(cmd_fibcontext = aac_fib_alloc(dev))) {
1715 scsicmd->result = DID_ERROR << 16; 1738 /* FIB temporarily unavailable,not catastrophic failure */
1716 scsicmd->scsi_done(scsicmd); 1739
1717 return 0; 1740 /* scsicmd->result = DID_ERROR << 16;
1741 * scsicmd->scsi_done(scsicmd);
1742 * return 0;
1743 */
1744 printk(KERN_WARNING "aac_write: fib allocation failed\n");
1745 return -1;
1718 } 1746 }
1719 1747
1720 status = aac_adapter_write(cmd_fibcontext, scsicmd, lba, count, fua); 1748 status = aac_adapter_write(cmd_fibcontext, scsicmd, lba, count, fua);
diff --git a/drivers/scsi/aacraid/aacraid.h b/drivers/scsi/aacraid/aacraid.h
index 83986ed86556..619c02d9c862 100644
--- a/drivers/scsi/aacraid/aacraid.h
+++ b/drivers/scsi/aacraid/aacraid.h
@@ -12,7 +12,7 @@
12 *----------------------------------------------------------------------------*/ 12 *----------------------------------------------------------------------------*/
13 13
14#ifndef AAC_DRIVER_BUILD 14#ifndef AAC_DRIVER_BUILD
15# define AAC_DRIVER_BUILD 2461 15# define AAC_DRIVER_BUILD 24702
16# define AAC_DRIVER_BRANCH "-ms" 16# define AAC_DRIVER_BRANCH "-ms"
17#endif 17#endif
18#define MAXIMUM_NUM_CONTAINERS 32 18#define MAXIMUM_NUM_CONTAINERS 32
@@ -1036,6 +1036,9 @@ struct aac_dev
1036 u8 printf_enabled; 1036 u8 printf_enabled;
1037 u8 in_reset; 1037 u8 in_reset;
1038 u8 msi; 1038 u8 msi;
1039 int management_fib_count;
1040 spinlock_t manage_lock;
1041
1039}; 1042};
1040 1043
1041#define aac_adapter_interrupt(dev) \ 1044#define aac_adapter_interrupt(dev) \
diff --git a/drivers/scsi/aacraid/commctrl.c b/drivers/scsi/aacraid/commctrl.c
index 0391d759dfdb..9c0c91178538 100644
--- a/drivers/scsi/aacraid/commctrl.c
+++ b/drivers/scsi/aacraid/commctrl.c
@@ -153,7 +153,7 @@ cleanup:
153 fibptr->hw_fib_pa = hw_fib_pa; 153 fibptr->hw_fib_pa = hw_fib_pa;
154 fibptr->hw_fib_va = hw_fib; 154 fibptr->hw_fib_va = hw_fib;
155 } 155 }
156 if (retval != -EINTR) 156 if (retval != -ERESTARTSYS)
157 aac_fib_free(fibptr); 157 aac_fib_free(fibptr);
158 return retval; 158 return retval;
159} 159}
@@ -322,7 +322,7 @@ return_fib:
322 } 322 }
323 if (f.wait) { 323 if (f.wait) {
324 if(down_interruptible(&fibctx->wait_sem) < 0) { 324 if(down_interruptible(&fibctx->wait_sem) < 0) {
325 status = -EINTR; 325 status = -ERESTARTSYS;
326 } else { 326 } else {
327 /* Lock again and retry */ 327 /* Lock again and retry */
328 spin_lock_irqsave(&dev->fib_lock, flags); 328 spin_lock_irqsave(&dev->fib_lock, flags);
@@ -593,10 +593,10 @@ static int aac_send_raw_srb(struct aac_dev* dev, void __user * arg)
593 u64 addr; 593 u64 addr;
594 void* p; 594 void* p;
595 if (upsg->sg[i].count > 595 if (upsg->sg[i].count >
596 (dev->adapter_info.options & 596 ((dev->adapter_info.options &
597 AAC_OPT_NEW_COMM) ? 597 AAC_OPT_NEW_COMM) ?
598 (dev->scsi_host_ptr->max_sectors << 9) : 598 (dev->scsi_host_ptr->max_sectors << 9) :
599 65536) { 599 65536)) {
600 rcode = -EINVAL; 600 rcode = -EINVAL;
601 goto cleanup; 601 goto cleanup;
602 } 602 }
@@ -645,10 +645,10 @@ static int aac_send_raw_srb(struct aac_dev* dev, void __user * arg)
645 u64 addr; 645 u64 addr;
646 void* p; 646 void* p;
647 if (usg->sg[i].count > 647 if (usg->sg[i].count >
648 (dev->adapter_info.options & 648 ((dev->adapter_info.options &
649 AAC_OPT_NEW_COMM) ? 649 AAC_OPT_NEW_COMM) ?
650 (dev->scsi_host_ptr->max_sectors << 9) : 650 (dev->scsi_host_ptr->max_sectors << 9) :
651 65536) { 651 65536)) {
652 rcode = -EINVAL; 652 rcode = -EINVAL;
653 goto cleanup; 653 goto cleanup;
654 } 654 }
@@ -695,10 +695,10 @@ static int aac_send_raw_srb(struct aac_dev* dev, void __user * arg)
695 uintptr_t addr; 695 uintptr_t addr;
696 void* p; 696 void* p;
697 if (usg->sg[i].count > 697 if (usg->sg[i].count >
698 (dev->adapter_info.options & 698 ((dev->adapter_info.options &
699 AAC_OPT_NEW_COMM) ? 699 AAC_OPT_NEW_COMM) ?
700 (dev->scsi_host_ptr->max_sectors << 9) : 700 (dev->scsi_host_ptr->max_sectors << 9) :
701 65536) { 701 65536)) {
702 rcode = -EINVAL; 702 rcode = -EINVAL;
703 goto cleanup; 703 goto cleanup;
704 } 704 }
@@ -734,10 +734,10 @@ static int aac_send_raw_srb(struct aac_dev* dev, void __user * arg)
734 dma_addr_t addr; 734 dma_addr_t addr;
735 void* p; 735 void* p;
736 if (upsg->sg[i].count > 736 if (upsg->sg[i].count >
737 (dev->adapter_info.options & 737 ((dev->adapter_info.options &
738 AAC_OPT_NEW_COMM) ? 738 AAC_OPT_NEW_COMM) ?
739 (dev->scsi_host_ptr->max_sectors << 9) : 739 (dev->scsi_host_ptr->max_sectors << 9) :
740 65536) { 740 65536)) {
741 rcode = -EINVAL; 741 rcode = -EINVAL;
742 goto cleanup; 742 goto cleanup;
743 } 743 }
@@ -772,8 +772,8 @@ static int aac_send_raw_srb(struct aac_dev* dev, void __user * arg)
772 psg->count = cpu_to_le32(sg_indx+1); 772 psg->count = cpu_to_le32(sg_indx+1);
773 status = aac_fib_send(ScsiPortCommand, srbfib, actual_fibsize, FsaNormal, 1, 1, NULL, NULL); 773 status = aac_fib_send(ScsiPortCommand, srbfib, actual_fibsize, FsaNormal, 1, 1, NULL, NULL);
774 } 774 }
775 if (status == -EINTR) { 775 if (status == -ERESTARTSYS) {
776 rcode = -EINTR; 776 rcode = -ERESTARTSYS;
777 goto cleanup; 777 goto cleanup;
778 } 778 }
779 779
@@ -810,7 +810,7 @@ cleanup:
810 for(i=0; i <= sg_indx; i++){ 810 for(i=0; i <= sg_indx; i++){
811 kfree(sg_list[i]); 811 kfree(sg_list[i]);
812 } 812 }
813 if (rcode != -EINTR) { 813 if (rcode != -ERESTARTSYS) {
814 aac_fib_complete(srbfib); 814 aac_fib_complete(srbfib);
815 aac_fib_free(srbfib); 815 aac_fib_free(srbfib);
816 } 816 }
@@ -848,7 +848,7 @@ int aac_do_ioctl(struct aac_dev * dev, int cmd, void __user *arg)
848 */ 848 */
849 849
850 status = aac_dev_ioctl(dev, cmd, arg); 850 status = aac_dev_ioctl(dev, cmd, arg);
851 if(status != -ENOTTY) 851 if (status != -ENOTTY)
852 return status; 852 return status;
853 853
854 switch (cmd) { 854 switch (cmd) {
diff --git a/drivers/scsi/aacraid/comminit.c b/drivers/scsi/aacraid/comminit.c
index 666d5151d628..a7261486ccd4 100644
--- a/drivers/scsi/aacraid/comminit.c
+++ b/drivers/scsi/aacraid/comminit.c
@@ -194,7 +194,9 @@ int aac_send_shutdown(struct aac_dev * dev)
194 194
195 if (status >= 0) 195 if (status >= 0)
196 aac_fib_complete(fibctx); 196 aac_fib_complete(fibctx);
197 aac_fib_free(fibctx); 197 /* FIB should be freed only after getting the response from the F/W */
198 if (status != -ERESTARTSYS)
199 aac_fib_free(fibctx);
198 return status; 200 return status;
199} 201}
200 202
@@ -304,6 +306,8 @@ struct aac_dev *aac_init_adapter(struct aac_dev *dev)
304 /* 306 /*
305 * Check the preferred comm settings, defaults from template. 307 * Check the preferred comm settings, defaults from template.
306 */ 308 */
309 dev->management_fib_count = 0;
310 spin_lock_init(&dev->manage_lock);
307 dev->max_fib_size = sizeof(struct hw_fib); 311 dev->max_fib_size = sizeof(struct hw_fib);
308 dev->sg_tablesize = host->sg_tablesize = (dev->max_fib_size 312 dev->sg_tablesize = host->sg_tablesize = (dev->max_fib_size
309 - sizeof(struct aac_fibhdr) 313 - sizeof(struct aac_fibhdr)
diff --git a/drivers/scsi/aacraid/commsup.c b/drivers/scsi/aacraid/commsup.c
index 956261f25181..94d2954d79ae 100644
--- a/drivers/scsi/aacraid/commsup.c
+++ b/drivers/scsi/aacraid/commsup.c
@@ -189,7 +189,14 @@ struct fib *aac_fib_alloc(struct aac_dev *dev)
189 189
190void aac_fib_free(struct fib *fibptr) 190void aac_fib_free(struct fib *fibptr)
191{ 191{
192 unsigned long flags; 192 unsigned long flags, flagsv;
193
194 spin_lock_irqsave(&fibptr->event_lock, flagsv);
195 if (fibptr->done == 2) {
196 spin_unlock_irqrestore(&fibptr->event_lock, flagsv);
197 return;
198 }
199 spin_unlock_irqrestore(&fibptr->event_lock, flagsv);
193 200
194 spin_lock_irqsave(&fibptr->dev->fib_lock, flags); 201 spin_lock_irqsave(&fibptr->dev->fib_lock, flags);
195 if (unlikely(fibptr->flags & FIB_CONTEXT_FLAG_TIMED_OUT)) 202 if (unlikely(fibptr->flags & FIB_CONTEXT_FLAG_TIMED_OUT))
@@ -390,6 +397,8 @@ int aac_fib_send(u16 command, struct fib *fibptr, unsigned long size,
390 struct hw_fib * hw_fib = fibptr->hw_fib_va; 397 struct hw_fib * hw_fib = fibptr->hw_fib_va;
391 unsigned long flags = 0; 398 unsigned long flags = 0;
392 unsigned long qflags; 399 unsigned long qflags;
400 unsigned long mflags = 0;
401
393 402
394 if (!(hw_fib->header.XferState & cpu_to_le32(HostOwned))) 403 if (!(hw_fib->header.XferState & cpu_to_le32(HostOwned)))
395 return -EBUSY; 404 return -EBUSY;
@@ -471,9 +480,31 @@ int aac_fib_send(u16 command, struct fib *fibptr, unsigned long size,
471 if (!dev->queues) 480 if (!dev->queues)
472 return -EBUSY; 481 return -EBUSY;
473 482
474 if(wait) 483 if (wait) {
484
485 spin_lock_irqsave(&dev->manage_lock, mflags);
486 if (dev->management_fib_count >= AAC_NUM_MGT_FIB) {
487 printk(KERN_INFO "No management Fibs Available:%d\n",
488 dev->management_fib_count);
489 spin_unlock_irqrestore(&dev->manage_lock, mflags);
490 return -EBUSY;
491 }
492 dev->management_fib_count++;
493 spin_unlock_irqrestore(&dev->manage_lock, mflags);
475 spin_lock_irqsave(&fibptr->event_lock, flags); 494 spin_lock_irqsave(&fibptr->event_lock, flags);
476 aac_adapter_deliver(fibptr); 495 }
496
497 if (aac_adapter_deliver(fibptr) != 0) {
498 printk(KERN_ERR "aac_fib_send: returned -EBUSY\n");
499 if (wait) {
500 spin_unlock_irqrestore(&fibptr->event_lock, flags);
501 spin_lock_irqsave(&dev->manage_lock, mflags);
502 dev->management_fib_count--;
503 spin_unlock_irqrestore(&dev->manage_lock, mflags);
504 }
505 return -EBUSY;
506 }
507
477 508
478 /* 509 /*
479 * If the caller wanted us to wait for response wait now. 510 * If the caller wanted us to wait for response wait now.
@@ -516,14 +547,15 @@ int aac_fib_send(u16 command, struct fib *fibptr, unsigned long size,
516 udelay(5); 547 udelay(5);
517 } 548 }
518 } else if (down_interruptible(&fibptr->event_wait)) { 549 } else if (down_interruptible(&fibptr->event_wait)) {
519 fibptr->done = 2; 550 /* Do nothing ... satisfy
520 up(&fibptr->event_wait); 551 * down_interruptible must_check */
521 } 552 }
553
522 spin_lock_irqsave(&fibptr->event_lock, flags); 554 spin_lock_irqsave(&fibptr->event_lock, flags);
523 if ((fibptr->done == 0) || (fibptr->done == 2)) { 555 if (fibptr->done == 0) {
524 fibptr->done = 2; /* Tell interrupt we aborted */ 556 fibptr->done = 2; /* Tell interrupt we aborted */
525 spin_unlock_irqrestore(&fibptr->event_lock, flags); 557 spin_unlock_irqrestore(&fibptr->event_lock, flags);
526 return -EINTR; 558 return -ERESTARTSYS;
527 } 559 }
528 spin_unlock_irqrestore(&fibptr->event_lock, flags); 560 spin_unlock_irqrestore(&fibptr->event_lock, flags);
529 BUG_ON(fibptr->done == 0); 561 BUG_ON(fibptr->done == 0);
@@ -689,6 +721,7 @@ int aac_fib_adapter_complete(struct fib *fibptr, unsigned short size)
689 721
690int aac_fib_complete(struct fib *fibptr) 722int aac_fib_complete(struct fib *fibptr)
691{ 723{
724 unsigned long flags;
692 struct hw_fib * hw_fib = fibptr->hw_fib_va; 725 struct hw_fib * hw_fib = fibptr->hw_fib_va;
693 726
694 /* 727 /*
@@ -709,6 +742,13 @@ int aac_fib_complete(struct fib *fibptr)
709 * command is complete that we had sent to the adapter and this 742 * command is complete that we had sent to the adapter and this
710 * cdb could be reused. 743 * cdb could be reused.
711 */ 744 */
745 spin_lock_irqsave(&fibptr->event_lock, flags);
746 if (fibptr->done == 2) {
747 spin_unlock_irqrestore(&fibptr->event_lock, flags);
748 return 0;
749 }
750 spin_unlock_irqrestore(&fibptr->event_lock, flags);
751
712 if((hw_fib->header.XferState & cpu_to_le32(SentFromHost)) && 752 if((hw_fib->header.XferState & cpu_to_le32(SentFromHost)) &&
713 (hw_fib->header.XferState & cpu_to_le32(AdapterProcessed))) 753 (hw_fib->header.XferState & cpu_to_le32(AdapterProcessed)))
714 { 754 {
@@ -1355,7 +1395,10 @@ int aac_reset_adapter(struct aac_dev * aac, int forced)
1355 1395
1356 if (status >= 0) 1396 if (status >= 0)
1357 aac_fib_complete(fibctx); 1397 aac_fib_complete(fibctx);
1358 aac_fib_free(fibctx); 1398 /* FIB should be freed only after getting
1399 * the response from the F/W */
1400 if (status != -ERESTARTSYS)
1401 aac_fib_free(fibctx);
1359 } 1402 }
1360 } 1403 }
1361 1404
@@ -1759,6 +1802,7 @@ int aac_command_thread(void *data)
1759 struct fib *fibptr; 1802 struct fib *fibptr;
1760 1803
1761 if ((fibptr = aac_fib_alloc(dev))) { 1804 if ((fibptr = aac_fib_alloc(dev))) {
1805 int status;
1762 __le32 *info; 1806 __le32 *info;
1763 1807
1764 aac_fib_init(fibptr); 1808 aac_fib_init(fibptr);
@@ -1769,15 +1813,21 @@ int aac_command_thread(void *data)
1769 1813
1770 *info = cpu_to_le32(now.tv_sec); 1814 *info = cpu_to_le32(now.tv_sec);
1771 1815
1772 (void)aac_fib_send(SendHostTime, 1816 status = aac_fib_send(SendHostTime,
1773 fibptr, 1817 fibptr,
1774 sizeof(*info), 1818 sizeof(*info),
1775 FsaNormal, 1819 FsaNormal,
1776 1, 1, 1820 1, 1,
1777 NULL, 1821 NULL,
1778 NULL); 1822 NULL);
1779 aac_fib_complete(fibptr); 1823 /* Do not set XferState to zero unless
1780 aac_fib_free(fibptr); 1824 * receives a response from F/W */
1825 if (status >= 0)
1826 aac_fib_complete(fibptr);
1827 /* FIB should be freed only after
1828 * getting the response from the F/W */
1829 if (status != -ERESTARTSYS)
1830 aac_fib_free(fibptr);
1781 } 1831 }
1782 difference = (long)(unsigned)update_interval*HZ; 1832 difference = (long)(unsigned)update_interval*HZ;
1783 } else { 1833 } else {
diff --git a/drivers/scsi/aacraid/dpcsup.c b/drivers/scsi/aacraid/dpcsup.c
index abc9ef5d1b10..9c7408fe8c7d 100644
--- a/drivers/scsi/aacraid/dpcsup.c
+++ b/drivers/scsi/aacraid/dpcsup.c
@@ -57,9 +57,9 @@ unsigned int aac_response_normal(struct aac_queue * q)
57 struct hw_fib * hwfib; 57 struct hw_fib * hwfib;
58 struct fib * fib; 58 struct fib * fib;
59 int consumed = 0; 59 int consumed = 0;
60 unsigned long flags; 60 unsigned long flags, mflags;
61 61
62 spin_lock_irqsave(q->lock, flags); 62 spin_lock_irqsave(q->lock, flags);
63 /* 63 /*
64 * Keep pulling response QEs off the response queue and waking 64 * Keep pulling response QEs off the response queue and waking
65 * up the waiters until there are no more QEs. We then return 65 * up the waiters until there are no more QEs. We then return
@@ -125,12 +125,21 @@ unsigned int aac_response_normal(struct aac_queue * q)
125 } else { 125 } else {
126 unsigned long flagv; 126 unsigned long flagv;
127 spin_lock_irqsave(&fib->event_lock, flagv); 127 spin_lock_irqsave(&fib->event_lock, flagv);
128 if (!fib->done) 128 if (!fib->done) {
129 fib->done = 1; 129 fib->done = 1;
130 up(&fib->event_wait); 130 up(&fib->event_wait);
131 }
131 spin_unlock_irqrestore(&fib->event_lock, flagv); 132 spin_unlock_irqrestore(&fib->event_lock, flagv);
133
134 spin_lock_irqsave(&dev->manage_lock, mflags);
135 dev->management_fib_count--;
136 spin_unlock_irqrestore(&dev->manage_lock, mflags);
137
132 FIB_COUNTER_INCREMENT(aac_config.NormalRecved); 138 FIB_COUNTER_INCREMENT(aac_config.NormalRecved);
133 if (fib->done == 2) { 139 if (fib->done == 2) {
140 spin_lock_irqsave(&fib->event_lock, flagv);
141 fib->done = 0;
142 spin_unlock_irqrestore(&fib->event_lock, flagv);
134 aac_fib_complete(fib); 143 aac_fib_complete(fib);
135 aac_fib_free(fib); 144 aac_fib_free(fib);
136 } 145 }
@@ -232,6 +241,7 @@ unsigned int aac_command_normal(struct aac_queue *q)
232 241
233unsigned int aac_intr_normal(struct aac_dev * dev, u32 index) 242unsigned int aac_intr_normal(struct aac_dev * dev, u32 index)
234{ 243{
244 unsigned long mflags;
235 dprintk((KERN_INFO "aac_intr_normal(%p,%x)\n", dev, index)); 245 dprintk((KERN_INFO "aac_intr_normal(%p,%x)\n", dev, index));
236 if ((index & 0x00000002L)) { 246 if ((index & 0x00000002L)) {
237 struct hw_fib * hw_fib; 247 struct hw_fib * hw_fib;
@@ -320,11 +330,25 @@ unsigned int aac_intr_normal(struct aac_dev * dev, u32 index)
320 unsigned long flagv; 330 unsigned long flagv;
321 dprintk((KERN_INFO "event_wait up\n")); 331 dprintk((KERN_INFO "event_wait up\n"));
322 spin_lock_irqsave(&fib->event_lock, flagv); 332 spin_lock_irqsave(&fib->event_lock, flagv);
323 if (!fib->done) 333 if (!fib->done) {
324 fib->done = 1; 334 fib->done = 1;
325 up(&fib->event_wait); 335 up(&fib->event_wait);
336 }
326 spin_unlock_irqrestore(&fib->event_lock, flagv); 337 spin_unlock_irqrestore(&fib->event_lock, flagv);
338
339 spin_lock_irqsave(&dev->manage_lock, mflags);
340 dev->management_fib_count--;
341 spin_unlock_irqrestore(&dev->manage_lock, mflags);
342
327 FIB_COUNTER_INCREMENT(aac_config.NormalRecved); 343 FIB_COUNTER_INCREMENT(aac_config.NormalRecved);
344 if (fib->done == 2) {
345 spin_lock_irqsave(&fib->event_lock, flagv);
346 fib->done = 0;
347 spin_unlock_irqrestore(&fib->event_lock, flagv);
348 aac_fib_complete(fib);
349 aac_fib_free(fib);
350 }
351
328 } 352 }
329 return 0; 353 return 0;
330 } 354 }
diff --git a/drivers/scsi/aic7xxx/aic79xx_core.c b/drivers/scsi/aic7xxx/aic79xx_core.c
index 4d419c155ce9..78971db5b60e 100644
--- a/drivers/scsi/aic7xxx/aic79xx_core.c
+++ b/drivers/scsi/aic7xxx/aic79xx_core.c
@@ -3171,13 +3171,16 @@ ahd_handle_nonpkt_busfree(struct ahd_softc *ahd)
3171 tinfo->curr.transport_version = 2; 3171 tinfo->curr.transport_version = 2;
3172 tinfo->goal.transport_version = 2; 3172 tinfo->goal.transport_version = 2;
3173 tinfo->goal.ppr_options = 0; 3173 tinfo->goal.ppr_options = 0;
3174 /* 3174 if (scb != NULL) {
3175 * Remove any SCBs in the waiting for selection 3175 /*
3176 * queue that may also be for this target so 3176 * Remove any SCBs in the waiting
3177 * that command ordering is preserved. 3177 * for selection queue that may
3178 */ 3178 * also be for this target so that
3179 ahd_freeze_devq(ahd, scb); 3179 * command ordering is preserved.
3180 ahd_qinfifo_requeue_tail(ahd, scb); 3180 */
3181 ahd_freeze_devq(ahd, scb);
3182 ahd_qinfifo_requeue_tail(ahd, scb);
3183 }
3181 printerror = 0; 3184 printerror = 0;
3182 } 3185 }
3183 } else if (ahd_sent_msg(ahd, AHDMSG_EXT, MSG_EXT_WDTR, FALSE) 3186 } else if (ahd_sent_msg(ahd, AHDMSG_EXT, MSG_EXT_WDTR, FALSE)
@@ -3194,13 +3197,16 @@ ahd_handle_nonpkt_busfree(struct ahd_softc *ahd)
3194 MSG_EXT_WDTR_BUS_8_BIT, 3197 MSG_EXT_WDTR_BUS_8_BIT,
3195 AHD_TRANS_CUR|AHD_TRANS_GOAL, 3198 AHD_TRANS_CUR|AHD_TRANS_GOAL,
3196 /*paused*/TRUE); 3199 /*paused*/TRUE);
3197 /* 3200 if (scb != NULL) {
3198 * Remove any SCBs in the waiting for selection 3201 /*
3199 * queue that may also be for this target so that 3202 * Remove any SCBs in the waiting for
3200 * command ordering is preserved. 3203 * selection queue that may also be for
3201 */ 3204 * this target so that command ordering
3202 ahd_freeze_devq(ahd, scb); 3205 * is preserved.
3203 ahd_qinfifo_requeue_tail(ahd, scb); 3206 */
3207 ahd_freeze_devq(ahd, scb);
3208 ahd_qinfifo_requeue_tail(ahd, scb);
3209 }
3204 printerror = 0; 3210 printerror = 0;
3205 } else if (ahd_sent_msg(ahd, AHDMSG_EXT, MSG_EXT_SDTR, FALSE) 3211 } else if (ahd_sent_msg(ahd, AHDMSG_EXT, MSG_EXT_SDTR, FALSE)
3206 && ppr_busfree == 0) { 3212 && ppr_busfree == 0) {
@@ -3217,13 +3223,16 @@ ahd_handle_nonpkt_busfree(struct ahd_softc *ahd)
3217 /*ppr_options*/0, 3223 /*ppr_options*/0,
3218 AHD_TRANS_CUR|AHD_TRANS_GOAL, 3224 AHD_TRANS_CUR|AHD_TRANS_GOAL,
3219 /*paused*/TRUE); 3225 /*paused*/TRUE);
3220 /* 3226 if (scb != NULL) {
3221 * Remove any SCBs in the waiting for selection 3227 /*
3222 * queue that may also be for this target so that 3228 * Remove any SCBs in the waiting for
3223 * command ordering is preserved. 3229 * selection queue that may also be for
3224 */ 3230 * this target so that command ordering
3225 ahd_freeze_devq(ahd, scb); 3231 * is preserved.
3226 ahd_qinfifo_requeue_tail(ahd, scb); 3232 */
3233 ahd_freeze_devq(ahd, scb);
3234 ahd_qinfifo_requeue_tail(ahd, scb);
3235 }
3227 printerror = 0; 3236 printerror = 0;
3228 } else if ((ahd->msg_flags & MSG_FLAG_EXPECT_IDE_BUSFREE) != 0 3237 } else if ((ahd->msg_flags & MSG_FLAG_EXPECT_IDE_BUSFREE) != 0
3229 && ahd_sent_msg(ahd, AHDMSG_1B, 3238 && ahd_sent_msg(ahd, AHDMSG_1B,
@@ -3251,7 +3260,7 @@ ahd_handle_nonpkt_busfree(struct ahd_softc *ahd)
3251 * the message phases. We check it last in case we 3260 * the message phases. We check it last in case we
3252 * had to send some other message that caused a busfree. 3261 * had to send some other message that caused a busfree.
3253 */ 3262 */
3254 if (printerror != 0 3263 if (scb != NULL && printerror != 0
3255 && (lastphase == P_MESGIN || lastphase == P_MESGOUT) 3264 && (lastphase == P_MESGIN || lastphase == P_MESGOUT)
3256 && ((ahd->msg_flags & MSG_FLAG_EXPECT_PPR_BUSFREE) != 0)) { 3265 && ((ahd->msg_flags & MSG_FLAG_EXPECT_PPR_BUSFREE) != 0)) {
3257 3266
diff --git a/drivers/scsi/arm/fas216.c b/drivers/scsi/arm/fas216.c
index 477542602284..9e71ac611146 100644
--- a/drivers/scsi/arm/fas216.c
+++ b/drivers/scsi/arm/fas216.c
@@ -2516,7 +2516,7 @@ int fas216_eh_device_reset(struct scsi_cmnd *SCpnt)
2516 if (info->scsi.phase == PHASE_IDLE) 2516 if (info->scsi.phase == PHASE_IDLE)
2517 fas216_kick(info); 2517 fas216_kick(info);
2518 2518
2519 mod_timer(&info->eh_timer, 30 * HZ); 2519 mod_timer(&info->eh_timer, jiffies + 30 * HZ);
2520 spin_unlock_irqrestore(&info->host_lock, flags); 2520 spin_unlock_irqrestore(&info->host_lock, flags);
2521 2521
2522 /* 2522 /*
diff --git a/drivers/scsi/be2iscsi/be_cmds.c b/drivers/scsi/be2iscsi/be_cmds.c
index 698a527d6cca..f008708f1b08 100644
--- a/drivers/scsi/be2iscsi/be_cmds.c
+++ b/drivers/scsi/be2iscsi/be_cmds.c
@@ -135,11 +135,15 @@ int beiscsi_process_mcc(struct beiscsi_hba *phba)
135 while ((compl = be_mcc_compl_get(phba))) { 135 while ((compl = be_mcc_compl_get(phba))) {
136 if (compl->flags & CQE_FLAGS_ASYNC_MASK) { 136 if (compl->flags & CQE_FLAGS_ASYNC_MASK) {
137 /* Interpret flags as an async trailer */ 137 /* Interpret flags as an async trailer */
138 BUG_ON(!is_link_state_evt(compl->flags)); 138 if (is_link_state_evt(compl->flags))
139 /* Interpret compl as a async link evt */
140 beiscsi_async_link_state_process(phba,
141 (struct be_async_event_link_state *) compl);
142 else
143 SE_DEBUG(DBG_LVL_1,
144 " Unsupported Async Event, flags"
145 " = 0x%08x \n", compl->flags);
139 146
140 /* Interpret compl as a async link evt */
141 beiscsi_async_link_state_process(phba,
142 (struct be_async_event_link_state *) compl);
143 } else if (compl->flags & CQE_FLAGS_COMPLETED_MASK) { 147 } else if (compl->flags & CQE_FLAGS_COMPLETED_MASK) {
144 status = be_mcc_compl_process(ctrl, compl); 148 status = be_mcc_compl_process(ctrl, compl);
145 atomic_dec(&phba->ctrl.mcc_obj.q.used); 149 atomic_dec(&phba->ctrl.mcc_obj.q.used);
diff --git a/drivers/scsi/bnx2i/bnx2i.h b/drivers/scsi/bnx2i/bnx2i.h
index 2b973f3c2eb2..6cf9dc37d78b 100644
--- a/drivers/scsi/bnx2i/bnx2i.h
+++ b/drivers/scsi/bnx2i/bnx2i.h
@@ -684,6 +684,7 @@ extern unsigned int error_mask1, error_mask2;
684extern u64 iscsi_error_mask; 684extern u64 iscsi_error_mask;
685extern unsigned int en_tcp_dack; 685extern unsigned int en_tcp_dack;
686extern unsigned int event_coal_div; 686extern unsigned int event_coal_div;
687extern unsigned int event_coal_min;
687 688
688extern struct scsi_transport_template *bnx2i_scsi_xport_template; 689extern struct scsi_transport_template *bnx2i_scsi_xport_template;
689extern struct iscsi_transport bnx2i_iscsi_transport; 690extern struct iscsi_transport bnx2i_iscsi_transport;
diff --git a/drivers/scsi/bnx2i/bnx2i_hwi.c b/drivers/scsi/bnx2i/bnx2i_hwi.c
index 5c8d7630c13e..1af578dec276 100644
--- a/drivers/scsi/bnx2i/bnx2i_hwi.c
+++ b/drivers/scsi/bnx2i/bnx2i_hwi.c
@@ -133,20 +133,38 @@ void bnx2i_arm_cq_event_coalescing(struct bnx2i_endpoint *ep, u8 action)
133{ 133{
134 struct bnx2i_5771x_cq_db *cq_db; 134 struct bnx2i_5771x_cq_db *cq_db;
135 u16 cq_index; 135 u16 cq_index;
136 u16 next_index;
137 u32 num_active_cmds;
136 138
139
140 /* Coalesce CQ entries only on 10G devices */
137 if (!test_bit(BNX2I_NX2_DEV_57710, &ep->hba->cnic_dev_type)) 141 if (!test_bit(BNX2I_NX2_DEV_57710, &ep->hba->cnic_dev_type))
138 return; 142 return;
139 143
144 /* Do not update CQ DB multiple times before firmware writes
145 * '0xFFFF' to CQDB->SQN field. Deviation may cause spurious
146 * interrupts and other unwanted results
147 */
148 cq_db = (struct bnx2i_5771x_cq_db *) ep->qp.cq_pgtbl_virt;
149 if (cq_db->sqn[0] && cq_db->sqn[0] != 0xFFFF)
150 return;
151
140 if (action == CNIC_ARM_CQE) { 152 if (action == CNIC_ARM_CQE) {
141 cq_index = ep->qp.cqe_exp_seq_sn + 153 num_active_cmds = ep->num_active_cmds;
142 ep->num_active_cmds / event_coal_div; 154 if (num_active_cmds <= event_coal_min)
143 cq_index %= (ep->qp.cqe_size * 2 + 1); 155 next_index = 1;
144 if (!cq_index) { 156 else
157 next_index = event_coal_min +
158 (num_active_cmds - event_coal_min) / event_coal_div;
159 if (!next_index)
160 next_index = 1;
161 cq_index = ep->qp.cqe_exp_seq_sn + next_index - 1;
162 if (cq_index > ep->qp.cqe_size * 2)
163 cq_index -= ep->qp.cqe_size * 2;
164 if (!cq_index)
145 cq_index = 1; 165 cq_index = 1;
146 cq_db = (struct bnx2i_5771x_cq_db *) 166
147 ep->qp.cq_pgtbl_virt; 167 cq_db->sqn[0] = cq_index;
148 cq_db->sqn[0] = cq_index;
149 }
150 } 168 }
151} 169}
152 170
@@ -366,6 +384,7 @@ int bnx2i_send_iscsi_tmf(struct bnx2i_conn *bnx2i_conn,
366 struct bnx2i_cmd *bnx2i_cmd; 384 struct bnx2i_cmd *bnx2i_cmd;
367 struct bnx2i_tmf_request *tmfabort_wqe; 385 struct bnx2i_tmf_request *tmfabort_wqe;
368 u32 dword; 386 u32 dword;
387 u32 scsi_lun[2];
369 388
370 bnx2i_cmd = (struct bnx2i_cmd *)mtask->dd_data; 389 bnx2i_cmd = (struct bnx2i_cmd *)mtask->dd_data;
371 tmfabort_hdr = (struct iscsi_tm *)mtask->hdr; 390 tmfabort_hdr = (struct iscsi_tm *)mtask->hdr;
@@ -376,27 +395,35 @@ int bnx2i_send_iscsi_tmf(struct bnx2i_conn *bnx2i_conn,
376 tmfabort_wqe->op_attr = 0; 395 tmfabort_wqe->op_attr = 0;
377 tmfabort_wqe->op_attr = 396 tmfabort_wqe->op_attr =
378 ISCSI_TMF_REQUEST_ALWAYS_ONE | ISCSI_TM_FUNC_ABORT_TASK; 397 ISCSI_TMF_REQUEST_ALWAYS_ONE | ISCSI_TM_FUNC_ABORT_TASK;
379 tmfabort_wqe->lun[0] = be32_to_cpu(tmfabort_hdr->lun[0]);
380 tmfabort_wqe->lun[1] = be32_to_cpu(tmfabort_hdr->lun[1]);
381 398
382 tmfabort_wqe->itt = (mtask->itt | (ISCSI_TASK_TYPE_MPATH << 14)); 399 tmfabort_wqe->itt = (mtask->itt | (ISCSI_TASK_TYPE_MPATH << 14));
383 tmfabort_wqe->reserved2 = 0; 400 tmfabort_wqe->reserved2 = 0;
384 tmfabort_wqe->cmd_sn = be32_to_cpu(tmfabort_hdr->cmdsn); 401 tmfabort_wqe->cmd_sn = be32_to_cpu(tmfabort_hdr->cmdsn);
385 402
386 ctask = iscsi_itt_to_task(conn, tmfabort_hdr->rtt); 403 ctask = iscsi_itt_to_task(conn, tmfabort_hdr->rtt);
387 if (!ctask || ctask->sc) 404 if (!ctask || !ctask->sc)
388 /* 405 /*
389 * the iscsi layer must have completed the cmd while this 406 * the iscsi layer must have completed the cmd while this
390 * was starting up. 407 * was starting up.
408 *
409 * Note: In the case of a SCSI cmd timeout, the task's sc
410 * is still active; hence ctask->sc != 0
411 * In this case, the task must be aborted
391 */ 412 */
392 return 0; 413 return 0;
414
393 ref_sc = ctask->sc; 415 ref_sc = ctask->sc;
394 416
417 /* Retrieve LUN directly from the ref_sc */
418 int_to_scsilun(ref_sc->device->lun, (struct scsi_lun *) scsi_lun);
419 tmfabort_wqe->lun[0] = be32_to_cpu(scsi_lun[0]);
420 tmfabort_wqe->lun[1] = be32_to_cpu(scsi_lun[1]);
421
395 if (ref_sc->sc_data_direction == DMA_TO_DEVICE) 422 if (ref_sc->sc_data_direction == DMA_TO_DEVICE)
396 dword = (ISCSI_TASK_TYPE_WRITE << ISCSI_CMD_REQUEST_TYPE_SHIFT); 423 dword = (ISCSI_TASK_TYPE_WRITE << ISCSI_CMD_REQUEST_TYPE_SHIFT);
397 else 424 else
398 dword = (ISCSI_TASK_TYPE_READ << ISCSI_CMD_REQUEST_TYPE_SHIFT); 425 dword = (ISCSI_TASK_TYPE_READ << ISCSI_CMD_REQUEST_TYPE_SHIFT);
399 tmfabort_wqe->ref_itt = (dword | tmfabort_hdr->rtt); 426 tmfabort_wqe->ref_itt = (dword | (tmfabort_hdr->rtt & ISCSI_ITT_MASK));
400 tmfabort_wqe->ref_cmd_sn = be32_to_cpu(tmfabort_hdr->refcmdsn); 427 tmfabort_wqe->ref_cmd_sn = be32_to_cpu(tmfabort_hdr->refcmdsn);
401 428
402 tmfabort_wqe->bd_list_addr_lo = (u32) bnx2i_conn->hba->mp_bd_dma; 429 tmfabort_wqe->bd_list_addr_lo = (u32) bnx2i_conn->hba->mp_bd_dma;
diff --git a/drivers/scsi/bnx2i/bnx2i_init.c b/drivers/scsi/bnx2i/bnx2i_init.c
index 0c4210d48ee8..6d8172e781cf 100644
--- a/drivers/scsi/bnx2i/bnx2i_init.c
+++ b/drivers/scsi/bnx2i/bnx2i_init.c
@@ -17,8 +17,8 @@ static struct list_head adapter_list = LIST_HEAD_INIT(adapter_list);
17static u32 adapter_count; 17static u32 adapter_count;
18 18
19#define DRV_MODULE_NAME "bnx2i" 19#define DRV_MODULE_NAME "bnx2i"
20#define DRV_MODULE_VERSION "2.0.1e" 20#define DRV_MODULE_VERSION "2.1.0"
21#define DRV_MODULE_RELDATE "June 22, 2009" 21#define DRV_MODULE_RELDATE "Dec 06, 2009"
22 22
23static char version[] __devinitdata = 23static char version[] __devinitdata =
24 "Broadcom NetXtreme II iSCSI Driver " DRV_MODULE_NAME \ 24 "Broadcom NetXtreme II iSCSI Driver " DRV_MODULE_NAME \
@@ -32,6 +32,10 @@ MODULE_VERSION(DRV_MODULE_VERSION);
32 32
33static DEFINE_MUTEX(bnx2i_dev_lock); 33static DEFINE_MUTEX(bnx2i_dev_lock);
34 34
35unsigned int event_coal_min = 24;
36module_param(event_coal_min, int, 0664);
37MODULE_PARM_DESC(event_coal_min, "Event Coalescing Minimum Commands");
38
35unsigned int event_coal_div = 1; 39unsigned int event_coal_div = 1;
36module_param(event_coal_div, int, 0664); 40module_param(event_coal_div, int, 0664);
37MODULE_PARM_DESC(event_coal_div, "Event Coalescing Divide Factor"); 41MODULE_PARM_DESC(event_coal_div, "Event Coalescing Divide Factor");
@@ -83,8 +87,12 @@ void bnx2i_identify_device(struct bnx2i_hba *hba)
83 set_bit(BNX2I_NX2_DEV_5709, &hba->cnic_dev_type); 87 set_bit(BNX2I_NX2_DEV_5709, &hba->cnic_dev_type);
84 hba->mail_queue_access = BNX2I_MQ_BIN_MODE; 88 hba->mail_queue_access = BNX2I_MQ_BIN_MODE;
85 } else if (hba->pci_did == PCI_DEVICE_ID_NX2_57710 || 89 } else if (hba->pci_did == PCI_DEVICE_ID_NX2_57710 ||
86 hba->pci_did == PCI_DEVICE_ID_NX2_57711) 90 hba->pci_did == PCI_DEVICE_ID_NX2_57711 ||
91 hba->pci_did == PCI_DEVICE_ID_NX2_57711E)
87 set_bit(BNX2I_NX2_DEV_57710, &hba->cnic_dev_type); 92 set_bit(BNX2I_NX2_DEV_57710, &hba->cnic_dev_type);
93 else
94 printk(KERN_ALERT "bnx2i: unknown device, 0x%x\n",
95 hba->pci_did);
88} 96}
89 97
90 98
@@ -363,7 +371,7 @@ static int __init bnx2i_mod_init(void)
363 371
364 printk(KERN_INFO "%s", version); 372 printk(KERN_INFO "%s", version);
365 373
366 if (!is_power_of_2(sq_size)) 374 if (sq_size && !is_power_of_2(sq_size))
367 sq_size = roundup_pow_of_two(sq_size); 375 sq_size = roundup_pow_of_two(sq_size);
368 376
369 mutex_init(&bnx2i_dev_lock); 377 mutex_init(&bnx2i_dev_lock);
diff --git a/drivers/scsi/bnx2i/bnx2i_iscsi.c b/drivers/scsi/bnx2i/bnx2i_iscsi.c
index 132898c88d5e..33b2294625bb 100644
--- a/drivers/scsi/bnx2i/bnx2i_iscsi.c
+++ b/drivers/scsi/bnx2i/bnx2i_iscsi.c
@@ -485,7 +485,6 @@ static int bnx2i_setup_cmd_pool(struct bnx2i_hba *hba,
485 struct iscsi_task *task = session->cmds[i]; 485 struct iscsi_task *task = session->cmds[i];
486 struct bnx2i_cmd *cmd = task->dd_data; 486 struct bnx2i_cmd *cmd = task->dd_data;
487 487
488 /* Anil */
489 task->hdr = &cmd->hdr; 488 task->hdr = &cmd->hdr;
490 task->hdr_max = sizeof(struct iscsi_hdr); 489 task->hdr_max = sizeof(struct iscsi_hdr);
491 490
@@ -765,7 +764,6 @@ struct bnx2i_hba *bnx2i_alloc_hba(struct cnic_dev *cnic)
765 hba->pci_svid = hba->pcidev->subsystem_vendor; 764 hba->pci_svid = hba->pcidev->subsystem_vendor;
766 hba->pci_func = PCI_FUNC(hba->pcidev->devfn); 765 hba->pci_func = PCI_FUNC(hba->pcidev->devfn);
767 hba->pci_devno = PCI_SLOT(hba->pcidev->devfn); 766 hba->pci_devno = PCI_SLOT(hba->pcidev->devfn);
768 bnx2i_identify_device(hba);
769 767
770 bnx2i_identify_device(hba); 768 bnx2i_identify_device(hba);
771 bnx2i_setup_host_queue_size(hba, shost); 769 bnx2i_setup_host_queue_size(hba, shost);
diff --git a/drivers/scsi/cxgb3i/cxgb3i_offload.c b/drivers/scsi/cxgb3i/cxgb3i_offload.c
index c1d5be4adf9c..15a00e8b7122 100644
--- a/drivers/scsi/cxgb3i/cxgb3i_offload.c
+++ b/drivers/scsi/cxgb3i/cxgb3i_offload.c
@@ -291,7 +291,7 @@ static void act_open_req_arp_failure(struct t3cdev *dev, struct sk_buff *skb)
291 c3cn_hold(c3cn); 291 c3cn_hold(c3cn);
292 spin_lock_bh(&c3cn->lock); 292 spin_lock_bh(&c3cn->lock);
293 if (c3cn->state == C3CN_STATE_CONNECTING) 293 if (c3cn->state == C3CN_STATE_CONNECTING)
294 fail_act_open(c3cn, EHOSTUNREACH); 294 fail_act_open(c3cn, -EHOSTUNREACH);
295 spin_unlock_bh(&c3cn->lock); 295 spin_unlock_bh(&c3cn->lock);
296 c3cn_put(c3cn); 296 c3cn_put(c3cn);
297 __kfree_skb(skb); 297 __kfree_skb(skb);
@@ -792,18 +792,18 @@ static int act_open_rpl_status_to_errno(int status)
792{ 792{
793 switch (status) { 793 switch (status) {
794 case CPL_ERR_CONN_RESET: 794 case CPL_ERR_CONN_RESET:
795 return ECONNREFUSED; 795 return -ECONNREFUSED;
796 case CPL_ERR_ARP_MISS: 796 case CPL_ERR_ARP_MISS:
797 return EHOSTUNREACH; 797 return -EHOSTUNREACH;
798 case CPL_ERR_CONN_TIMEDOUT: 798 case CPL_ERR_CONN_TIMEDOUT:
799 return ETIMEDOUT; 799 return -ETIMEDOUT;
800 case CPL_ERR_TCAM_FULL: 800 case CPL_ERR_TCAM_FULL:
801 return ENOMEM; 801 return -ENOMEM;
802 case CPL_ERR_CONN_EXIST: 802 case CPL_ERR_CONN_EXIST:
803 cxgb3i_log_error("ACTIVE_OPEN_RPL: 4-tuple in use\n"); 803 cxgb3i_log_error("ACTIVE_OPEN_RPL: 4-tuple in use\n");
804 return EADDRINUSE; 804 return -EADDRINUSE;
805 default: 805 default:
806 return EIO; 806 return -EIO;
807 } 807 }
808} 808}
809 809
@@ -817,7 +817,7 @@ static void act_open_retry_timer(unsigned long data)
817 spin_lock_bh(&c3cn->lock); 817 spin_lock_bh(&c3cn->lock);
818 skb = alloc_skb(sizeof(struct cpl_act_open_req), GFP_ATOMIC); 818 skb = alloc_skb(sizeof(struct cpl_act_open_req), GFP_ATOMIC);
819 if (!skb) 819 if (!skb)
820 fail_act_open(c3cn, ENOMEM); 820 fail_act_open(c3cn, -ENOMEM);
821 else { 821 else {
822 skb->sk = (struct sock *)c3cn; 822 skb->sk = (struct sock *)c3cn;
823 set_arp_failure_handler(skb, act_open_req_arp_failure); 823 set_arp_failure_handler(skb, act_open_req_arp_failure);
@@ -966,14 +966,14 @@ static int abort_status_to_errno(struct s3_conn *c3cn, int abort_reason,
966 case CPL_ERR_BAD_SYN: /* fall through */ 966 case CPL_ERR_BAD_SYN: /* fall through */
967 case CPL_ERR_CONN_RESET: 967 case CPL_ERR_CONN_RESET:
968 return c3cn->state > C3CN_STATE_ESTABLISHED ? 968 return c3cn->state > C3CN_STATE_ESTABLISHED ?
969 EPIPE : ECONNRESET; 969 -EPIPE : -ECONNRESET;
970 case CPL_ERR_XMIT_TIMEDOUT: 970 case CPL_ERR_XMIT_TIMEDOUT:
971 case CPL_ERR_PERSIST_TIMEDOUT: 971 case CPL_ERR_PERSIST_TIMEDOUT:
972 case CPL_ERR_FINWAIT2_TIMEDOUT: 972 case CPL_ERR_FINWAIT2_TIMEDOUT:
973 case CPL_ERR_KEEPALIVE_TIMEDOUT: 973 case CPL_ERR_KEEPALIVE_TIMEDOUT:
974 return ETIMEDOUT; 974 return -ETIMEDOUT;
975 default: 975 default:
976 return EIO; 976 return -EIO;
977 } 977 }
978} 978}
979 979
@@ -1440,6 +1440,10 @@ void cxgb3i_c3cn_release(struct s3_conn *c3cn)
1440static int is_cxgb3_dev(struct net_device *dev) 1440static int is_cxgb3_dev(struct net_device *dev)
1441{ 1441{
1442 struct cxgb3i_sdev_data *cdata; 1442 struct cxgb3i_sdev_data *cdata;
1443 struct net_device *ndev = dev;
1444
1445 if (dev->priv_flags & IFF_802_1Q_VLAN)
1446 ndev = vlan_dev_real_dev(dev);
1443 1447
1444 write_lock(&cdata_rwlock); 1448 write_lock(&cdata_rwlock);
1445 list_for_each_entry(cdata, &cdata_list, list) { 1449 list_for_each_entry(cdata, &cdata_list, list) {
@@ -1447,7 +1451,7 @@ static int is_cxgb3_dev(struct net_device *dev)
1447 int i; 1451 int i;
1448 1452
1449 for (i = 0; i < ports->nports; i++) 1453 for (i = 0; i < ports->nports; i++)
1450 if (dev == ports->lldevs[i]) { 1454 if (ndev == ports->lldevs[i]) {
1451 write_unlock(&cdata_rwlock); 1455 write_unlock(&cdata_rwlock);
1452 return 1; 1456 return 1;
1453 } 1457 }
@@ -1563,9 +1567,29 @@ free_tid:
1563 s3_free_atid(cdev, c3cn->tid); 1567 s3_free_atid(cdev, c3cn->tid);
1564 c3cn->tid = 0; 1568 c3cn->tid = 0;
1565out_err: 1569out_err:
1566 return -1; 1570 return -EINVAL;
1567} 1571}
1568 1572
1573/**
1574 * cxgb3i_find_dev - find the interface associated with the given address
1575 * @ipaddr: ip address
1576 */
1577static struct net_device *
1578cxgb3i_find_dev(struct net_device *dev, __be32 ipaddr)
1579{
1580 struct flowi fl;
1581 int err;
1582 struct rtable *rt;
1583
1584 memset(&fl, 0, sizeof(fl));
1585 fl.nl_u.ip4_u.daddr = ipaddr;
1586
1587 err = ip_route_output_key(dev ? dev_net(dev) : &init_net, &rt, &fl);
1588 if (!err)
1589 return (&rt->u.dst)->dev;
1590
1591 return NULL;
1592}
1569 1593
1570/** 1594/**
1571 * cxgb3i_c3cn_connect - initiates an iscsi tcp connection to a given address 1595 * cxgb3i_c3cn_connect - initiates an iscsi tcp connection to a given address
@@ -1581,6 +1605,7 @@ int cxgb3i_c3cn_connect(struct net_device *dev, struct s3_conn *c3cn,
1581 struct cxgb3i_sdev_data *cdata; 1605 struct cxgb3i_sdev_data *cdata;
1582 struct t3cdev *cdev; 1606 struct t3cdev *cdev;
1583 __be32 sipv4; 1607 __be32 sipv4;
1608 struct net_device *dstdev;
1584 int err; 1609 int err;
1585 1610
1586 c3cn_conn_debug("c3cn 0x%p, dev 0x%p.\n", c3cn, dev); 1611 c3cn_conn_debug("c3cn 0x%p, dev 0x%p.\n", c3cn, dev);
@@ -1591,6 +1616,13 @@ int cxgb3i_c3cn_connect(struct net_device *dev, struct s3_conn *c3cn,
1591 c3cn->daddr.sin_port = usin->sin_port; 1616 c3cn->daddr.sin_port = usin->sin_port;
1592 c3cn->daddr.sin_addr.s_addr = usin->sin_addr.s_addr; 1617 c3cn->daddr.sin_addr.s_addr = usin->sin_addr.s_addr;
1593 1618
1619 dstdev = cxgb3i_find_dev(dev, usin->sin_addr.s_addr);
1620 if (!dstdev || !is_cxgb3_dev(dstdev))
1621 return -ENETUNREACH;
1622
1623 if (dstdev->priv_flags & IFF_802_1Q_VLAN)
1624 dev = dstdev;
1625
1594 rt = find_route(dev, c3cn->saddr.sin_addr.s_addr, 1626 rt = find_route(dev, c3cn->saddr.sin_addr.s_addr,
1595 c3cn->daddr.sin_addr.s_addr, 1627 c3cn->daddr.sin_addr.s_addr,
1596 c3cn->saddr.sin_port, 1628 c3cn->saddr.sin_port,
diff --git a/drivers/scsi/cxgb3i/cxgb3i_pdu.c b/drivers/scsi/cxgb3i/cxgb3i_pdu.c
index 709105071177..1fe3b0f1f3c9 100644
--- a/drivers/scsi/cxgb3i/cxgb3i_pdu.c
+++ b/drivers/scsi/cxgb3i/cxgb3i_pdu.c
@@ -388,8 +388,8 @@ int cxgb3i_conn_xmit_pdu(struct iscsi_task *task)
388 if (err > 0) { 388 if (err > 0) {
389 int pdulen = err; 389 int pdulen = err;
390 390
391 cxgb3i_tx_debug("task 0x%p, skb 0x%p, len %u/%u, rv %d.\n", 391 cxgb3i_tx_debug("task 0x%p, skb 0x%p, len %u/%u, rv %d.\n",
392 task, skb, skb->len, skb->data_len, err); 392 task, skb, skb->len, skb->data_len, err);
393 393
394 if (task->conn->hdrdgst_en) 394 if (task->conn->hdrdgst_en)
395 pdulen += ISCSI_DIGEST_SIZE; 395 pdulen += ISCSI_DIGEST_SIZE;
diff --git a/drivers/scsi/device_handler/scsi_dh_rdac.c b/drivers/scsi/device_handler/scsi_dh_rdac.c
index 47cfe1c49c3e..1a660191a905 100644
--- a/drivers/scsi/device_handler/scsi_dh_rdac.c
+++ b/drivers/scsi/device_handler/scsi_dh_rdac.c
@@ -748,6 +748,8 @@ static const struct scsi_dh_devlist rdac_dev_list[] = {
748 {"IBM", "1724"}, 748 {"IBM", "1724"},
749 {"IBM", "1726"}, 749 {"IBM", "1726"},
750 {"IBM", "1742"}, 750 {"IBM", "1742"},
751 {"IBM", "1745"},
752 {"IBM", "1746"},
751 {"IBM", "1814"}, 753 {"IBM", "1814"},
752 {"IBM", "1815"}, 754 {"IBM", "1815"},
753 {"IBM", "1818"}, 755 {"IBM", "1818"},
diff --git a/drivers/scsi/fcoe/fcoe.c b/drivers/scsi/fcoe/fcoe.c
index a30ffaa1222c..2f47ae7cce91 100644
--- a/drivers/scsi/fcoe/fcoe.c
+++ b/drivers/scsi/fcoe/fcoe.c
@@ -101,6 +101,8 @@ static int fcoe_cpu_callback(struct notifier_block *, unsigned long, void *);
101 101
102static int fcoe_create(const char *, struct kernel_param *); 102static int fcoe_create(const char *, struct kernel_param *);
103static int fcoe_destroy(const char *, struct kernel_param *); 103static int fcoe_destroy(const char *, struct kernel_param *);
104static int fcoe_enable(const char *, struct kernel_param *);
105static int fcoe_disable(const char *, struct kernel_param *);
104 106
105static struct fc_seq *fcoe_elsct_send(struct fc_lport *, 107static struct fc_seq *fcoe_elsct_send(struct fc_lport *,
106 u32 did, struct fc_frame *, 108 u32 did, struct fc_frame *,
@@ -115,10 +117,16 @@ static void fcoe_get_lesb(struct fc_lport *, struct fc_els_lesb *);
115 117
116module_param_call(create, fcoe_create, NULL, NULL, S_IWUSR); 118module_param_call(create, fcoe_create, NULL, NULL, S_IWUSR);
117__MODULE_PARM_TYPE(create, "string"); 119__MODULE_PARM_TYPE(create, "string");
118MODULE_PARM_DESC(create, "Create fcoe fcoe using net device passed in."); 120MODULE_PARM_DESC(create, " Creates fcoe instance on a ethernet interface");
119module_param_call(destroy, fcoe_destroy, NULL, NULL, S_IWUSR); 121module_param_call(destroy, fcoe_destroy, NULL, NULL, S_IWUSR);
120__MODULE_PARM_TYPE(destroy, "string"); 122__MODULE_PARM_TYPE(destroy, "string");
121MODULE_PARM_DESC(destroy, "Destroy fcoe fcoe"); 123MODULE_PARM_DESC(destroy, " Destroys fcoe instance on a ethernet interface");
124module_param_call(enable, fcoe_enable, NULL, NULL, S_IWUSR);
125__MODULE_PARM_TYPE(enable, "string");
126MODULE_PARM_DESC(enable, " Enables fcoe on a ethernet interface.");
127module_param_call(disable, fcoe_disable, NULL, NULL, S_IWUSR);
128__MODULE_PARM_TYPE(disable, "string");
129MODULE_PARM_DESC(disable, " Disables fcoe on a ethernet interface.");
122 130
123/* notification function for packets from net device */ 131/* notification function for packets from net device */
124static struct notifier_block fcoe_notifier = { 132static struct notifier_block fcoe_notifier = {
@@ -545,6 +553,23 @@ static void fcoe_queue_timer(ulong lport)
545} 553}
546 554
547/** 555/**
556 * fcoe_get_wwn() - Get the world wide name from LLD if it supports it
557 * @netdev: the associated net device
558 * @wwn: the output WWN
559 * @type: the type of WWN (WWPN or WWNN)
560 *
561 * Returns: 0 for success
562 */
563static int fcoe_get_wwn(struct net_device *netdev, u64 *wwn, int type)
564{
565 const struct net_device_ops *ops = netdev->netdev_ops;
566
567 if (ops->ndo_fcoe_get_wwn)
568 return ops->ndo_fcoe_get_wwn(netdev, wwn, type);
569 return -EINVAL;
570}
571
572/**
548 * fcoe_netdev_config() - Set up net devive for SW FCoE 573 * fcoe_netdev_config() - Set up net devive for SW FCoE
549 * @lport: The local port that is associated with the net device 574 * @lport: The local port that is associated with the net device
550 * @netdev: The associated net device 575 * @netdev: The associated net device
@@ -611,9 +636,13 @@ static int fcoe_netdev_config(struct fc_lport *lport, struct net_device *netdev)
611 */ 636 */
612 if (netdev->priv_flags & IFF_802_1Q_VLAN) 637 if (netdev->priv_flags & IFF_802_1Q_VLAN)
613 vid = vlan_dev_vlan_id(netdev); 638 vid = vlan_dev_vlan_id(netdev);
614 wwnn = fcoe_wwn_from_mac(fcoe->ctlr.ctl_src_addr, 1, 0); 639
640 if (fcoe_get_wwn(netdev, &wwnn, NETDEV_FCOE_WWNN))
641 wwnn = fcoe_wwn_from_mac(fcoe->ctlr.ctl_src_addr, 1, 0);
615 fc_set_wwnn(lport, wwnn); 642 fc_set_wwnn(lport, wwnn);
616 wwpn = fcoe_wwn_from_mac(fcoe->ctlr.ctl_src_addr, 2, vid); 643 if (fcoe_get_wwn(netdev, &wwpn, NETDEV_FCOE_WWPN))
644 wwpn = fcoe_wwn_from_mac(fcoe->ctlr.ctl_src_addr,
645 2, vid);
617 fc_set_wwpn(lport, wwpn); 646 fc_set_wwpn(lport, wwpn);
618 } 647 }
619 648
@@ -1231,7 +1260,7 @@ int fcoe_rcv(struct sk_buff *skb, struct net_device *netdev,
1231 "CPU.\n"); 1260 "CPU.\n");
1232 1261
1233 spin_unlock_bh(&fps->fcoe_rx_list.lock); 1262 spin_unlock_bh(&fps->fcoe_rx_list.lock);
1234 cpu = first_cpu(cpu_online_map); 1263 cpu = cpumask_first(cpu_online_mask);
1235 fps = &per_cpu(fcoe_percpu, cpu); 1264 fps = &per_cpu(fcoe_percpu, cpu);
1236 spin_lock_bh(&fps->fcoe_rx_list.lock); 1265 spin_lock_bh(&fps->fcoe_rx_list.lock);
1237 if (!fps->thread) { 1266 if (!fps->thread) {
@@ -1838,6 +1867,104 @@ static struct net_device *fcoe_if_to_netdev(const char *buffer)
1838} 1867}
1839 1868
1840/** 1869/**
1870 * fcoe_disable() - Disables a FCoE interface
1871 * @buffer: The name of the Ethernet interface to be disabled
1872 * @kp: The associated kernel parameter
1873 *
1874 * Called from sysfs.
1875 *
1876 * Returns: 0 for success
1877 */
1878static int fcoe_disable(const char *buffer, struct kernel_param *kp)
1879{
1880 struct fcoe_interface *fcoe;
1881 struct net_device *netdev;
1882 int rc = 0;
1883
1884 mutex_lock(&fcoe_config_mutex);
1885#ifdef CONFIG_FCOE_MODULE
1886 /*
1887 * Make sure the module has been initialized, and is not about to be
1888 * removed. Module paramter sysfs files are writable before the
1889 * module_init function is called and after module_exit.
1890 */
1891 if (THIS_MODULE->state != MODULE_STATE_LIVE) {
1892 rc = -ENODEV;
1893 goto out_nodev;
1894 }
1895#endif
1896
1897 netdev = fcoe_if_to_netdev(buffer);
1898 if (!netdev) {
1899 rc = -ENODEV;
1900 goto out_nodev;
1901 }
1902
1903 rtnl_lock();
1904 fcoe = fcoe_hostlist_lookup_port(netdev);
1905 rtnl_unlock();
1906
1907 if (fcoe)
1908 fc_fabric_logoff(fcoe->ctlr.lp);
1909 else
1910 rc = -ENODEV;
1911
1912 dev_put(netdev);
1913out_nodev:
1914 mutex_unlock(&fcoe_config_mutex);
1915 return rc;
1916}
1917
1918/**
1919 * fcoe_enable() - Enables a FCoE interface
1920 * @buffer: The name of the Ethernet interface to be enabled
1921 * @kp: The associated kernel parameter
1922 *
1923 * Called from sysfs.
1924 *
1925 * Returns: 0 for success
1926 */
1927static int fcoe_enable(const char *buffer, struct kernel_param *kp)
1928{
1929 struct fcoe_interface *fcoe;
1930 struct net_device *netdev;
1931 int rc = 0;
1932
1933 mutex_lock(&fcoe_config_mutex);
1934#ifdef CONFIG_FCOE_MODULE
1935 /*
1936 * Make sure the module has been initialized, and is not about to be
1937 * removed. Module paramter sysfs files are writable before the
1938 * module_init function is called and after module_exit.
1939 */
1940 if (THIS_MODULE->state != MODULE_STATE_LIVE) {
1941 rc = -ENODEV;
1942 goto out_nodev;
1943 }
1944#endif
1945
1946 netdev = fcoe_if_to_netdev(buffer);
1947 if (!netdev) {
1948 rc = -ENODEV;
1949 goto out_nodev;
1950 }
1951
1952 rtnl_lock();
1953 fcoe = fcoe_hostlist_lookup_port(netdev);
1954 rtnl_unlock();
1955
1956 if (fcoe)
1957 rc = fc_fabric_login(fcoe->ctlr.lp);
1958 else
1959 rc = -ENODEV;
1960
1961 dev_put(netdev);
1962out_nodev:
1963 mutex_unlock(&fcoe_config_mutex);
1964 return rc;
1965}
1966
1967/**
1841 * fcoe_destroy() - Destroy a FCoE interface 1968 * fcoe_destroy() - Destroy a FCoE interface
1842 * @buffer: The name of the Ethernet interface to be destroyed 1969 * @buffer: The name of the Ethernet interface to be destroyed
1843 * @kp: The associated kernel parameter 1970 * @kp: The associated kernel parameter
@@ -1882,6 +2009,8 @@ static int fcoe_destroy(const char *buffer, struct kernel_param *kp)
1882 fcoe_interface_cleanup(fcoe); 2009 fcoe_interface_cleanup(fcoe);
1883 rtnl_unlock(); 2010 rtnl_unlock();
1884 fcoe_if_destroy(fcoe->ctlr.lp); 2011 fcoe_if_destroy(fcoe->ctlr.lp);
2012 module_put(THIS_MODULE);
2013
1885out_putdev: 2014out_putdev:
1886 dev_put(netdev); 2015 dev_put(netdev);
1887out_nodev: 2016out_nodev:
@@ -1932,6 +2061,11 @@ static int fcoe_create(const char *buffer, struct kernel_param *kp)
1932 } 2061 }
1933#endif 2062#endif
1934 2063
2064 if (!try_module_get(THIS_MODULE)) {
2065 rc = -EINVAL;
2066 goto out_nomod;
2067 }
2068
1935 rtnl_lock(); 2069 rtnl_lock();
1936 netdev = fcoe_if_to_netdev(buffer); 2070 netdev = fcoe_if_to_netdev(buffer);
1937 if (!netdev) { 2071 if (!netdev) {
@@ -1972,17 +2106,24 @@ static int fcoe_create(const char *buffer, struct kernel_param *kp)
1972 if (!fcoe_link_ok(lport)) 2106 if (!fcoe_link_ok(lport))
1973 fcoe_ctlr_link_up(&fcoe->ctlr); 2107 fcoe_ctlr_link_up(&fcoe->ctlr);
1974 2108
1975 rc = 0;
1976out_free:
1977 /* 2109 /*
1978 * Release from init in fcoe_interface_create(), on success lport 2110 * Release from init in fcoe_interface_create(), on success lport
1979 * should be holding a reference taken in fcoe_if_create(). 2111 * should be holding a reference taken in fcoe_if_create().
1980 */ 2112 */
1981 fcoe_interface_put(fcoe); 2113 fcoe_interface_put(fcoe);
2114 dev_put(netdev);
2115 rtnl_unlock();
2116 mutex_unlock(&fcoe_config_mutex);
2117
2118 return 0;
2119out_free:
2120 fcoe_interface_put(fcoe);
1982out_putdev: 2121out_putdev:
1983 dev_put(netdev); 2122 dev_put(netdev);
1984out_nodev: 2123out_nodev:
1985 rtnl_unlock(); 2124 rtnl_unlock();
2125 module_put(THIS_MODULE);
2126out_nomod:
1986 mutex_unlock(&fcoe_config_mutex); 2127 mutex_unlock(&fcoe_config_mutex);
1987 return rc; 2128 return rc;
1988} 2129}
diff --git a/drivers/scsi/fcoe/libfcoe.c b/drivers/scsi/fcoe/libfcoe.c
index 9823291395ad..511cb6b371ee 100644
--- a/drivers/scsi/fcoe/libfcoe.c
+++ b/drivers/scsi/fcoe/libfcoe.c
@@ -1187,7 +1187,7 @@ static void fcoe_ctlr_timeout(unsigned long arg)
1187 next_timer = fip->ctlr_ka_time; 1187 next_timer = fip->ctlr_ka_time;
1188 1188
1189 if (time_after_eq(jiffies, fip->port_ka_time)) { 1189 if (time_after_eq(jiffies, fip->port_ka_time)) {
1190 fip->port_ka_time += jiffies + 1190 fip->port_ka_time = jiffies +
1191 msecs_to_jiffies(FIP_VN_KA_PERIOD); 1191 msecs_to_jiffies(FIP_VN_KA_PERIOD);
1192 fip->send_port_ka = 1; 1192 fip->send_port_ka = 1;
1193 } 1193 }
diff --git a/drivers/scsi/hpsa.c b/drivers/scsi/hpsa.c
new file mode 100644
index 000000000000..bb96fdd58e23
--- /dev/null
+++ b/drivers/scsi/hpsa.c
@@ -0,0 +1,3531 @@
1/*
2 * Disk Array driver for HP Smart Array SAS controllers
3 * Copyright 2000, 2009 Hewlett-Packard Development Company, L.P.
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; version 2 of the License.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
12 * NON INFRINGEMENT. See the GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
17 *
18 * Questions/Comments/Bugfixes to iss_storagedev@hp.com
19 *
20 */
21
22#include <linux/module.h>
23#include <linux/interrupt.h>
24#include <linux/types.h>
25#include <linux/pci.h>
26#include <linux/kernel.h>
27#include <linux/slab.h>
28#include <linux/delay.h>
29#include <linux/fs.h>
30#include <linux/timer.h>
31#include <linux/seq_file.h>
32#include <linux/init.h>
33#include <linux/spinlock.h>
34#include <linux/smp_lock.h>
35#include <linux/compat.h>
36#include <linux/blktrace_api.h>
37#include <linux/uaccess.h>
38#include <linux/io.h>
39#include <linux/dma-mapping.h>
40#include <linux/completion.h>
41#include <linux/moduleparam.h>
42#include <scsi/scsi.h>
43#include <scsi/scsi_cmnd.h>
44#include <scsi/scsi_device.h>
45#include <scsi/scsi_host.h>
46#include <linux/cciss_ioctl.h>
47#include <linux/string.h>
48#include <linux/bitmap.h>
49#include <asm/atomic.h>
50#include <linux/kthread.h>
51#include "hpsa_cmd.h"
52#include "hpsa.h"
53
54/* HPSA_DRIVER_VERSION must be 3 byte values (0-255) separated by '.' */
55#define HPSA_DRIVER_VERSION "1.0.0"
56#define DRIVER_NAME "HP HPSA Driver (v " HPSA_DRIVER_VERSION ")"
57
58/* How long to wait (in milliseconds) for board to go into simple mode */
59#define MAX_CONFIG_WAIT 30000
60#define MAX_IOCTL_CONFIG_WAIT 1000
61
62/*define how many times we will try a command because of bus resets */
63#define MAX_CMD_RETRIES 3
64
65/* Embedded module documentation macros - see modules.h */
66MODULE_AUTHOR("Hewlett-Packard Company");
67MODULE_DESCRIPTION("Driver for HP Smart Array Controller version " \
68 HPSA_DRIVER_VERSION);
69MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers");
70MODULE_VERSION(HPSA_DRIVER_VERSION);
71MODULE_LICENSE("GPL");
72
73static int hpsa_allow_any;
74module_param(hpsa_allow_any, int, S_IRUGO|S_IWUSR);
75MODULE_PARM_DESC(hpsa_allow_any,
76 "Allow hpsa driver to access unknown HP Smart Array hardware");
77
78/* define the PCI info for the cards we can control */
79static const struct pci_device_id hpsa_pci_device_id[] = {
80 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3223},
81 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3234},
82 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x323D},
83 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3241},
84 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3243},
85 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3245},
86 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3247},
87 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3249},
88 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324a},
89 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324b},
90 {PCI_VENDOR_ID_HP, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
91 PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0},
92 {0,}
93};
94
95MODULE_DEVICE_TABLE(pci, hpsa_pci_device_id);
96
97/* board_id = Subsystem Device ID & Vendor ID
98 * product = Marketing Name for the board
99 * access = Address of the struct of function pointers
100 */
101static struct board_type products[] = {
102 {0x3223103C, "Smart Array P800", &SA5_access},
103 {0x3234103C, "Smart Array P400", &SA5_access},
104 {0x323d103c, "Smart Array P700M", &SA5_access},
105 {0x3241103C, "Smart Array P212", &SA5_access},
106 {0x3243103C, "Smart Array P410", &SA5_access},
107 {0x3245103C, "Smart Array P410i", &SA5_access},
108 {0x3247103C, "Smart Array P411", &SA5_access},
109 {0x3249103C, "Smart Array P812", &SA5_access},
110 {0x324a103C, "Smart Array P712m", &SA5_access},
111 {0x324b103C, "Smart Array P711m", &SA5_access},
112 {0xFFFF103C, "Unknown Smart Array", &SA5_access},
113};
114
115static int number_of_controllers;
116
117static irqreturn_t do_hpsa_intr(int irq, void *dev_id);
118static int hpsa_ioctl(struct scsi_device *dev, int cmd, void *arg);
119static void start_io(struct ctlr_info *h);
120
121#ifdef CONFIG_COMPAT
122static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void *arg);
123#endif
124
125static void cmd_free(struct ctlr_info *h, struct CommandList *c);
126static void cmd_special_free(struct ctlr_info *h, struct CommandList *c);
127static struct CommandList *cmd_alloc(struct ctlr_info *h);
128static struct CommandList *cmd_special_alloc(struct ctlr_info *h);
129static void fill_cmd(struct CommandList *c, __u8 cmd, struct ctlr_info *h,
130 void *buff, size_t size, __u8 page_code, unsigned char *scsi3addr,
131 int cmd_type);
132
133static int hpsa_scsi_queue_command(struct scsi_cmnd *cmd,
134 void (*done)(struct scsi_cmnd *));
135
136static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd);
137static int hpsa_slave_alloc(struct scsi_device *sdev);
138static void hpsa_slave_destroy(struct scsi_device *sdev);
139
140static ssize_t raid_level_show(struct device *dev,
141 struct device_attribute *attr, char *buf);
142static ssize_t lunid_show(struct device *dev,
143 struct device_attribute *attr, char *buf);
144static ssize_t unique_id_show(struct device *dev,
145 struct device_attribute *attr, char *buf);
146static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno);
147static ssize_t host_store_rescan(struct device *dev,
148 struct device_attribute *attr, const char *buf, size_t count);
149static int check_for_unit_attention(struct ctlr_info *h,
150 struct CommandList *c);
151static void check_ioctl_unit_attention(struct ctlr_info *h,
152 struct CommandList *c);
153
154static DEVICE_ATTR(raid_level, S_IRUGO, raid_level_show, NULL);
155static DEVICE_ATTR(lunid, S_IRUGO, lunid_show, NULL);
156static DEVICE_ATTR(unique_id, S_IRUGO, unique_id_show, NULL);
157static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan);
158
159static struct device_attribute *hpsa_sdev_attrs[] = {
160 &dev_attr_raid_level,
161 &dev_attr_lunid,
162 &dev_attr_unique_id,
163 NULL,
164};
165
166static struct device_attribute *hpsa_shost_attrs[] = {
167 &dev_attr_rescan,
168 NULL,
169};
170
171static struct scsi_host_template hpsa_driver_template = {
172 .module = THIS_MODULE,
173 .name = "hpsa",
174 .proc_name = "hpsa",
175 .queuecommand = hpsa_scsi_queue_command,
176 .can_queue = 512,
177 .this_id = -1,
178 .sg_tablesize = MAXSGENTRIES,
179 .cmd_per_lun = 512,
180 .use_clustering = ENABLE_CLUSTERING,
181 .eh_device_reset_handler = hpsa_eh_device_reset_handler,
182 .ioctl = hpsa_ioctl,
183 .slave_alloc = hpsa_slave_alloc,
184 .slave_destroy = hpsa_slave_destroy,
185#ifdef CONFIG_COMPAT
186 .compat_ioctl = hpsa_compat_ioctl,
187#endif
188 .sdev_attrs = hpsa_sdev_attrs,
189 .shost_attrs = hpsa_shost_attrs,
190};
191
192static inline struct ctlr_info *sdev_to_hba(struct scsi_device *sdev)
193{
194 unsigned long *priv = shost_priv(sdev->host);
195 return (struct ctlr_info *) *priv;
196}
197
198static struct task_struct *hpsa_scan_thread;
199static DEFINE_MUTEX(hpsa_scan_mutex);
200static LIST_HEAD(hpsa_scan_q);
201static int hpsa_scan_func(void *data);
202
203/**
204 * add_to_scan_list() - add controller to rescan queue
205 * @h: Pointer to the controller.
206 *
207 * Adds the controller to the rescan queue if not already on the queue.
208 *
209 * returns 1 if added to the queue, 0 if skipped (could be on the
210 * queue already, or the controller could be initializing or shutting
211 * down).
212 **/
213static int add_to_scan_list(struct ctlr_info *h)
214{
215 struct ctlr_info *test_h;
216 int found = 0;
217 int ret = 0;
218
219 if (h->busy_initializing)
220 return 0;
221
222 /*
223 * If we don't get the lock, it means the driver is unloading
224 * and there's no point in scheduling a new scan.
225 */
226 if (!mutex_trylock(&h->busy_shutting_down))
227 return 0;
228
229 mutex_lock(&hpsa_scan_mutex);
230 list_for_each_entry(test_h, &hpsa_scan_q, scan_list) {
231 if (test_h == h) {
232 found = 1;
233 break;
234 }
235 }
236 if (!found && !h->busy_scanning) {
237 INIT_COMPLETION(h->scan_wait);
238 list_add_tail(&h->scan_list, &hpsa_scan_q);
239 ret = 1;
240 }
241 mutex_unlock(&hpsa_scan_mutex);
242 mutex_unlock(&h->busy_shutting_down);
243
244 return ret;
245}
246
247/**
248 * remove_from_scan_list() - remove controller from rescan queue
249 * @h: Pointer to the controller.
250 *
251 * Removes the controller from the rescan queue if present. Blocks if
252 * the controller is currently conducting a rescan. The controller
253 * can be in one of three states:
254 * 1. Doesn't need a scan
255 * 2. On the scan list, but not scanning yet (we remove it)
256 * 3. Busy scanning (and not on the list). In this case we want to wait for
257 * the scan to complete to make sure the scanning thread for this
258 * controller is completely idle.
259 **/
260static void remove_from_scan_list(struct ctlr_info *h)
261{
262 struct ctlr_info *test_h, *tmp_h;
263
264 mutex_lock(&hpsa_scan_mutex);
265 list_for_each_entry_safe(test_h, tmp_h, &hpsa_scan_q, scan_list) {
266 if (test_h == h) { /* state 2. */
267 list_del(&h->scan_list);
268 complete_all(&h->scan_wait);
269 mutex_unlock(&hpsa_scan_mutex);
270 return;
271 }
272 }
273 if (h->busy_scanning) { /* state 3. */
274 mutex_unlock(&hpsa_scan_mutex);
275 wait_for_completion(&h->scan_wait);
276 } else { /* state 1, nothing to do. */
277 mutex_unlock(&hpsa_scan_mutex);
278 }
279}
280
281/* hpsa_scan_func() - kernel thread used to rescan controllers
282 * @data: Ignored.
283 *
284 * A kernel thread used scan for drive topology changes on
285 * controllers. The thread processes only one controller at a time
286 * using a queue. Controllers are added to the queue using
287 * add_to_scan_list() and removed from the queue either after done
288 * processing or using remove_from_scan_list().
289 *
290 * returns 0.
291 **/
292static int hpsa_scan_func(__attribute__((unused)) void *data)
293{
294 struct ctlr_info *h;
295 int host_no;
296
297 while (1) {
298 set_current_state(TASK_INTERRUPTIBLE);
299 schedule();
300 if (kthread_should_stop())
301 break;
302
303 while (1) {
304 mutex_lock(&hpsa_scan_mutex);
305 if (list_empty(&hpsa_scan_q)) {
306 mutex_unlock(&hpsa_scan_mutex);
307 break;
308 }
309 h = list_entry(hpsa_scan_q.next, struct ctlr_info,
310 scan_list);
311 list_del(&h->scan_list);
312 h->busy_scanning = 1;
313 mutex_unlock(&hpsa_scan_mutex);
314 host_no = h->scsi_host ? h->scsi_host->host_no : -1;
315 hpsa_update_scsi_devices(h, host_no);
316 complete_all(&h->scan_wait);
317 mutex_lock(&hpsa_scan_mutex);
318 h->busy_scanning = 0;
319 mutex_unlock(&hpsa_scan_mutex);
320 }
321 }
322 return 0;
323}
324
325static int check_for_unit_attention(struct ctlr_info *h,
326 struct CommandList *c)
327{
328 if (c->err_info->SenseInfo[2] != UNIT_ATTENTION)
329 return 0;
330
331 switch (c->err_info->SenseInfo[12]) {
332 case STATE_CHANGED:
333 dev_warn(&h->pdev->dev, "hpsa%d: a state change "
334 "detected, command retried\n", h->ctlr);
335 break;
336 case LUN_FAILED:
337 dev_warn(&h->pdev->dev, "hpsa%d: LUN failure "
338 "detected, action required\n", h->ctlr);
339 break;
340 case REPORT_LUNS_CHANGED:
341 dev_warn(&h->pdev->dev, "hpsa%d: report LUN data "
342 "changed\n", h->ctlr);
343 /*
344 * Here, we could call add_to_scan_list and wake up the scan thread,
345 * except that it's quite likely that we will get more than one
346 * REPORT_LUNS_CHANGED condition in quick succession, which means
347 * that those which occur after the first one will likely happen
348 * *during* the hpsa_scan_thread's rescan. And the rescan code is not
349 * robust enough to restart in the middle, undoing what it has already
350 * done, and it's not clear that it's even possible to do this, since
351 * part of what it does is notify the SCSI mid layer, which starts
352 * doing it's own i/o to read partition tables and so on, and the
353 * driver doesn't have visibility to know what might need undoing.
354 * In any event, if possible, it is horribly complicated to get right
355 * so we just don't do it for now.
356 *
357 * Note: this REPORT_LUNS_CHANGED condition only occurs on the MSA2012.
358 */
359 break;
360 case POWER_OR_RESET:
361 dev_warn(&h->pdev->dev, "hpsa%d: a power on "
362 "or device reset detected\n", h->ctlr);
363 break;
364 case UNIT_ATTENTION_CLEARED:
365 dev_warn(&h->pdev->dev, "hpsa%d: unit attention "
366 "cleared by another initiator\n", h->ctlr);
367 break;
368 default:
369 dev_warn(&h->pdev->dev, "hpsa%d: unknown "
370 "unit attention detected\n", h->ctlr);
371 break;
372 }
373 return 1;
374}
375
376static ssize_t host_store_rescan(struct device *dev,
377 struct device_attribute *attr,
378 const char *buf, size_t count)
379{
380 struct ctlr_info *h;
381 struct Scsi_Host *shost = class_to_shost(dev);
382 unsigned long *priv = shost_priv(shost);
383 h = (struct ctlr_info *) *priv;
384 if (add_to_scan_list(h)) {
385 wake_up_process(hpsa_scan_thread);
386 wait_for_completion_interruptible(&h->scan_wait);
387 }
388 return count;
389}
390
391/* Enqueuing and dequeuing functions for cmdlists. */
392static inline void addQ(struct hlist_head *list, struct CommandList *c)
393{
394 hlist_add_head(&c->list, list);
395}
396
397static void enqueue_cmd_and_start_io(struct ctlr_info *h,
398 struct CommandList *c)
399{
400 unsigned long flags;
401 spin_lock_irqsave(&h->lock, flags);
402 addQ(&h->reqQ, c);
403 h->Qdepth++;
404 start_io(h);
405 spin_unlock_irqrestore(&h->lock, flags);
406}
407
408static inline void removeQ(struct CommandList *c)
409{
410 if (WARN_ON(hlist_unhashed(&c->list)))
411 return;
412 hlist_del_init(&c->list);
413}
414
415static inline int is_hba_lunid(unsigned char scsi3addr[])
416{
417 return memcmp(scsi3addr, RAID_CTLR_LUNID, 8) == 0;
418}
419
420static inline int is_logical_dev_addr_mode(unsigned char scsi3addr[])
421{
422 return (scsi3addr[3] & 0xC0) == 0x40;
423}
424
425static const char *raid_label[] = { "0", "4", "1(1+0)", "5", "5+1", "ADG",
426 "UNKNOWN"
427};
428#define RAID_UNKNOWN (ARRAY_SIZE(raid_label) - 1)
429
430static ssize_t raid_level_show(struct device *dev,
431 struct device_attribute *attr, char *buf)
432{
433 ssize_t l = 0;
434 int rlevel;
435 struct ctlr_info *h;
436 struct scsi_device *sdev;
437 struct hpsa_scsi_dev_t *hdev;
438 unsigned long flags;
439
440 sdev = to_scsi_device(dev);
441 h = sdev_to_hba(sdev);
442 spin_lock_irqsave(&h->lock, flags);
443 hdev = sdev->hostdata;
444 if (!hdev) {
445 spin_unlock_irqrestore(&h->lock, flags);
446 return -ENODEV;
447 }
448
449 /* Is this even a logical drive? */
450 if (!is_logical_dev_addr_mode(hdev->scsi3addr)) {
451 spin_unlock_irqrestore(&h->lock, flags);
452 l = snprintf(buf, PAGE_SIZE, "N/A\n");
453 return l;
454 }
455
456 rlevel = hdev->raid_level;
457 spin_unlock_irqrestore(&h->lock, flags);
458 if (rlevel < 0 || rlevel > RAID_UNKNOWN)
459 rlevel = RAID_UNKNOWN;
460 l = snprintf(buf, PAGE_SIZE, "RAID %s\n", raid_label[rlevel]);
461 return l;
462}
463
464static ssize_t lunid_show(struct device *dev,
465 struct device_attribute *attr, char *buf)
466{
467 struct ctlr_info *h;
468 struct scsi_device *sdev;
469 struct hpsa_scsi_dev_t *hdev;
470 unsigned long flags;
471 unsigned char lunid[8];
472
473 sdev = to_scsi_device(dev);
474 h = sdev_to_hba(sdev);
475 spin_lock_irqsave(&h->lock, flags);
476 hdev = sdev->hostdata;
477 if (!hdev) {
478 spin_unlock_irqrestore(&h->lock, flags);
479 return -ENODEV;
480 }
481 memcpy(lunid, hdev->scsi3addr, sizeof(lunid));
482 spin_unlock_irqrestore(&h->lock, flags);
483 return snprintf(buf, 20, "0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
484 lunid[0], lunid[1], lunid[2], lunid[3],
485 lunid[4], lunid[5], lunid[6], lunid[7]);
486}
487
488static ssize_t unique_id_show(struct device *dev,
489 struct device_attribute *attr, char *buf)
490{
491 struct ctlr_info *h;
492 struct scsi_device *sdev;
493 struct hpsa_scsi_dev_t *hdev;
494 unsigned long flags;
495 unsigned char sn[16];
496
497 sdev = to_scsi_device(dev);
498 h = sdev_to_hba(sdev);
499 spin_lock_irqsave(&h->lock, flags);
500 hdev = sdev->hostdata;
501 if (!hdev) {
502 spin_unlock_irqrestore(&h->lock, flags);
503 return -ENODEV;
504 }
505 memcpy(sn, hdev->device_id, sizeof(sn));
506 spin_unlock_irqrestore(&h->lock, flags);
507 return snprintf(buf, 16 * 2 + 2,
508 "%02X%02X%02X%02X%02X%02X%02X%02X"
509 "%02X%02X%02X%02X%02X%02X%02X%02X\n",
510 sn[0], sn[1], sn[2], sn[3],
511 sn[4], sn[5], sn[6], sn[7],
512 sn[8], sn[9], sn[10], sn[11],
513 sn[12], sn[13], sn[14], sn[15]);
514}
515
516static int hpsa_find_target_lun(struct ctlr_info *h,
517 unsigned char scsi3addr[], int bus, int *target, int *lun)
518{
519 /* finds an unused bus, target, lun for a new physical device
520 * assumes h->devlock is held
521 */
522 int i, found = 0;
523 DECLARE_BITMAP(lun_taken, HPSA_MAX_SCSI_DEVS_PER_HBA);
524
525 memset(&lun_taken[0], 0, HPSA_MAX_SCSI_DEVS_PER_HBA >> 3);
526
527 for (i = 0; i < h->ndevices; i++) {
528 if (h->dev[i]->bus == bus && h->dev[i]->target != -1)
529 set_bit(h->dev[i]->target, lun_taken);
530 }
531
532 for (i = 0; i < HPSA_MAX_SCSI_DEVS_PER_HBA; i++) {
533 if (!test_bit(i, lun_taken)) {
534 /* *bus = 1; */
535 *target = i;
536 *lun = 0;
537 found = 1;
538 break;
539 }
540 }
541 return !found;
542}
543
544/* Add an entry into h->dev[] array. */
545static int hpsa_scsi_add_entry(struct ctlr_info *h, int hostno,
546 struct hpsa_scsi_dev_t *device,
547 struct hpsa_scsi_dev_t *added[], int *nadded)
548{
549 /* assumes h->devlock is held */
550 int n = h->ndevices;
551 int i;
552 unsigned char addr1[8], addr2[8];
553 struct hpsa_scsi_dev_t *sd;
554
555 if (n >= HPSA_MAX_SCSI_DEVS_PER_HBA) {
556 dev_err(&h->pdev->dev, "too many devices, some will be "
557 "inaccessible.\n");
558 return -1;
559 }
560
561 /* physical devices do not have lun or target assigned until now. */
562 if (device->lun != -1)
563 /* Logical device, lun is already assigned. */
564 goto lun_assigned;
565
566 /* If this device a non-zero lun of a multi-lun device
567 * byte 4 of the 8-byte LUN addr will contain the logical
568 * unit no, zero otherise.
569 */
570 if (device->scsi3addr[4] == 0) {
571 /* This is not a non-zero lun of a multi-lun device */
572 if (hpsa_find_target_lun(h, device->scsi3addr,
573 device->bus, &device->target, &device->lun) != 0)
574 return -1;
575 goto lun_assigned;
576 }
577
578 /* This is a non-zero lun of a multi-lun device.
579 * Search through our list and find the device which
580 * has the same 8 byte LUN address, excepting byte 4.
581 * Assign the same bus and target for this new LUN.
582 * Use the logical unit number from the firmware.
583 */
584 memcpy(addr1, device->scsi3addr, 8);
585 addr1[4] = 0;
586 for (i = 0; i < n; i++) {
587 sd = h->dev[i];
588 memcpy(addr2, sd->scsi3addr, 8);
589 addr2[4] = 0;
590 /* differ only in byte 4? */
591 if (memcmp(addr1, addr2, 8) == 0) {
592 device->bus = sd->bus;
593 device->target = sd->target;
594 device->lun = device->scsi3addr[4];
595 break;
596 }
597 }
598 if (device->lun == -1) {
599 dev_warn(&h->pdev->dev, "physical device with no LUN=0,"
600 " suspect firmware bug or unsupported hardware "
601 "configuration.\n");
602 return -1;
603 }
604
605lun_assigned:
606
607 h->dev[n] = device;
608 h->ndevices++;
609 added[*nadded] = device;
610 (*nadded)++;
611
612 /* initially, (before registering with scsi layer) we don't
613 * know our hostno and we don't want to print anything first
614 * time anyway (the scsi layer's inquiries will show that info)
615 */
616 /* if (hostno != -1) */
617 dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d added.\n",
618 scsi_device_type(device->devtype), hostno,
619 device->bus, device->target, device->lun);
620 return 0;
621}
622
623/* Remove an entry from h->dev[] array. */
624static void hpsa_scsi_remove_entry(struct ctlr_info *h, int hostno, int entry,
625 struct hpsa_scsi_dev_t *removed[], int *nremoved)
626{
627 /* assumes h->devlock is held */
628 int i;
629 struct hpsa_scsi_dev_t *sd;
630
631 if (entry < 0 || entry >= HPSA_MAX_SCSI_DEVS_PER_HBA)
632 BUG();
633
634 sd = h->dev[entry];
635 removed[*nremoved] = h->dev[entry];
636 (*nremoved)++;
637
638 for (i = entry; i < h->ndevices-1; i++)
639 h->dev[i] = h->dev[i+1];
640 h->ndevices--;
641 dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d removed.\n",
642 scsi_device_type(sd->devtype), hostno, sd->bus, sd->target,
643 sd->lun);
644}
645
646#define SCSI3ADDR_EQ(a, b) ( \
647 (a)[7] == (b)[7] && \
648 (a)[6] == (b)[6] && \
649 (a)[5] == (b)[5] && \
650 (a)[4] == (b)[4] && \
651 (a)[3] == (b)[3] && \
652 (a)[2] == (b)[2] && \
653 (a)[1] == (b)[1] && \
654 (a)[0] == (b)[0])
655
656static void fixup_botched_add(struct ctlr_info *h,
657 struct hpsa_scsi_dev_t *added)
658{
659 /* called when scsi_add_device fails in order to re-adjust
660 * h->dev[] to match the mid layer's view.
661 */
662 unsigned long flags;
663 int i, j;
664
665 spin_lock_irqsave(&h->lock, flags);
666 for (i = 0; i < h->ndevices; i++) {
667 if (h->dev[i] == added) {
668 for (j = i; j < h->ndevices-1; j++)
669 h->dev[j] = h->dev[j+1];
670 h->ndevices--;
671 break;
672 }
673 }
674 spin_unlock_irqrestore(&h->lock, flags);
675 kfree(added);
676}
677
678static inline int device_is_the_same(struct hpsa_scsi_dev_t *dev1,
679 struct hpsa_scsi_dev_t *dev2)
680{
681 if ((is_logical_dev_addr_mode(dev1->scsi3addr) ||
682 (dev1->lun != -1 && dev2->lun != -1)) &&
683 dev1->devtype != 0x0C)
684 return (memcmp(dev1, dev2, sizeof(*dev1)) == 0);
685
686 /* we compare everything except lun and target as these
687 * are not yet assigned. Compare parts likely
688 * to differ first
689 */
690 if (memcmp(dev1->scsi3addr, dev2->scsi3addr,
691 sizeof(dev1->scsi3addr)) != 0)
692 return 0;
693 if (memcmp(dev1->device_id, dev2->device_id,
694 sizeof(dev1->device_id)) != 0)
695 return 0;
696 if (memcmp(dev1->model, dev2->model, sizeof(dev1->model)) != 0)
697 return 0;
698 if (memcmp(dev1->vendor, dev2->vendor, sizeof(dev1->vendor)) != 0)
699 return 0;
700 if (memcmp(dev1->revision, dev2->revision, sizeof(dev1->revision)) != 0)
701 return 0;
702 if (dev1->devtype != dev2->devtype)
703 return 0;
704 if (dev1->raid_level != dev2->raid_level)
705 return 0;
706 if (dev1->bus != dev2->bus)
707 return 0;
708 return 1;
709}
710
711/* Find needle in haystack. If exact match found, return DEVICE_SAME,
712 * and return needle location in *index. If scsi3addr matches, but not
713 * vendor, model, serial num, etc. return DEVICE_CHANGED, and return needle
714 * location in *index. If needle not found, return DEVICE_NOT_FOUND.
715 */
716static int hpsa_scsi_find_entry(struct hpsa_scsi_dev_t *needle,
717 struct hpsa_scsi_dev_t *haystack[], int haystack_size,
718 int *index)
719{
720 int i;
721#define DEVICE_NOT_FOUND 0
722#define DEVICE_CHANGED 1
723#define DEVICE_SAME 2
724 for (i = 0; i < haystack_size; i++) {
725 if (SCSI3ADDR_EQ(needle->scsi3addr, haystack[i]->scsi3addr)) {
726 *index = i;
727 if (device_is_the_same(needle, haystack[i]))
728 return DEVICE_SAME;
729 else
730 return DEVICE_CHANGED;
731 }
732 }
733 *index = -1;
734 return DEVICE_NOT_FOUND;
735}
736
737static int adjust_hpsa_scsi_table(struct ctlr_info *h, int hostno,
738 struct hpsa_scsi_dev_t *sd[], int nsds)
739{
740 /* sd contains scsi3 addresses and devtypes, and inquiry
741 * data. This function takes what's in sd to be the current
742 * reality and updates h->dev[] to reflect that reality.
743 */
744 int i, entry, device_change, changes = 0;
745 struct hpsa_scsi_dev_t *csd;
746 unsigned long flags;
747 struct hpsa_scsi_dev_t **added, **removed;
748 int nadded, nremoved;
749 struct Scsi_Host *sh = NULL;
750
751 added = kzalloc(sizeof(*added) * HPSA_MAX_SCSI_DEVS_PER_HBA,
752 GFP_KERNEL);
753 removed = kzalloc(sizeof(*removed) * HPSA_MAX_SCSI_DEVS_PER_HBA,
754 GFP_KERNEL);
755
756 if (!added || !removed) {
757 dev_warn(&h->pdev->dev, "out of memory in "
758 "adjust_hpsa_scsi_table\n");
759 goto free_and_out;
760 }
761
762 spin_lock_irqsave(&h->devlock, flags);
763
764 /* find any devices in h->dev[] that are not in
765 * sd[] and remove them from h->dev[], and for any
766 * devices which have changed, remove the old device
767 * info and add the new device info.
768 */
769 i = 0;
770 nremoved = 0;
771 nadded = 0;
772 while (i < h->ndevices) {
773 csd = h->dev[i];
774 device_change = hpsa_scsi_find_entry(csd, sd, nsds, &entry);
775 if (device_change == DEVICE_NOT_FOUND) {
776 changes++;
777 hpsa_scsi_remove_entry(h, hostno, i,
778 removed, &nremoved);
779 continue; /* remove ^^^, hence i not incremented */
780 } else if (device_change == DEVICE_CHANGED) {
781 changes++;
782 hpsa_scsi_remove_entry(h, hostno, i,
783 removed, &nremoved);
784 (void) hpsa_scsi_add_entry(h, hostno, sd[entry],
785 added, &nadded);
786 /* add can't fail, we just removed one. */
787 sd[entry] = NULL; /* prevent it from being freed */
788 }
789 i++;
790 }
791
792 /* Now, make sure every device listed in sd[] is also
793 * listed in h->dev[], adding them if they aren't found
794 */
795
796 for (i = 0; i < nsds; i++) {
797 if (!sd[i]) /* if already added above. */
798 continue;
799 device_change = hpsa_scsi_find_entry(sd[i], h->dev,
800 h->ndevices, &entry);
801 if (device_change == DEVICE_NOT_FOUND) {
802 changes++;
803 if (hpsa_scsi_add_entry(h, hostno, sd[i],
804 added, &nadded) != 0)
805 break;
806 sd[i] = NULL; /* prevent from being freed later. */
807 } else if (device_change == DEVICE_CHANGED) {
808 /* should never happen... */
809 changes++;
810 dev_warn(&h->pdev->dev,
811 "device unexpectedly changed.\n");
812 /* but if it does happen, we just ignore that device */
813 }
814 }
815 spin_unlock_irqrestore(&h->devlock, flags);
816
817 /* Don't notify scsi mid layer of any changes the first time through
818 * (or if there are no changes) scsi_scan_host will do it later the
819 * first time through.
820 */
821 if (hostno == -1 || !changes)
822 goto free_and_out;
823
824 sh = h->scsi_host;
825 /* Notify scsi mid layer of any removed devices */
826 for (i = 0; i < nremoved; i++) {
827 struct scsi_device *sdev =
828 scsi_device_lookup(sh, removed[i]->bus,
829 removed[i]->target, removed[i]->lun);
830 if (sdev != NULL) {
831 scsi_remove_device(sdev);
832 scsi_device_put(sdev);
833 } else {
834 /* We don't expect to get here.
835 * future cmds to this device will get selection
836 * timeout as if the device was gone.
837 */
838 dev_warn(&h->pdev->dev, "didn't find c%db%dt%dl%d "
839 " for removal.", hostno, removed[i]->bus,
840 removed[i]->target, removed[i]->lun);
841 }
842 kfree(removed[i]);
843 removed[i] = NULL;
844 }
845
846 /* Notify scsi mid layer of any added devices */
847 for (i = 0; i < nadded; i++) {
848 if (scsi_add_device(sh, added[i]->bus,
849 added[i]->target, added[i]->lun) == 0)
850 continue;
851 dev_warn(&h->pdev->dev, "scsi_add_device c%db%dt%dl%d failed, "
852 "device not added.\n", hostno, added[i]->bus,
853 added[i]->target, added[i]->lun);
854 /* now we have to remove it from h->dev,
855 * since it didn't get added to scsi mid layer
856 */
857 fixup_botched_add(h, added[i]);
858 }
859
860free_and_out:
861 kfree(added);
862 kfree(removed);
863 return 0;
864}
865
866/*
867 * Lookup bus/target/lun and retrun corresponding struct hpsa_scsi_dev_t *
868 * Assume's h->devlock is held.
869 */
870static struct hpsa_scsi_dev_t *lookup_hpsa_scsi_dev(struct ctlr_info *h,
871 int bus, int target, int lun)
872{
873 int i;
874 struct hpsa_scsi_dev_t *sd;
875
876 for (i = 0; i < h->ndevices; i++) {
877 sd = h->dev[i];
878 if (sd->bus == bus && sd->target == target && sd->lun == lun)
879 return sd;
880 }
881 return NULL;
882}
883
884/* link sdev->hostdata to our per-device structure. */
885static int hpsa_slave_alloc(struct scsi_device *sdev)
886{
887 struct hpsa_scsi_dev_t *sd;
888 unsigned long flags;
889 struct ctlr_info *h;
890
891 h = sdev_to_hba(sdev);
892 spin_lock_irqsave(&h->devlock, flags);
893 sd = lookup_hpsa_scsi_dev(h, sdev_channel(sdev),
894 sdev_id(sdev), sdev->lun);
895 if (sd != NULL)
896 sdev->hostdata = sd;
897 spin_unlock_irqrestore(&h->devlock, flags);
898 return 0;
899}
900
901static void hpsa_slave_destroy(struct scsi_device *sdev)
902{
903 return; /* nothing to do. */
904}
905
906static void hpsa_scsi_setup(struct ctlr_info *h)
907{
908 h->ndevices = 0;
909 h->scsi_host = NULL;
910 spin_lock_init(&h->devlock);
911 return;
912}
913
914static void complete_scsi_command(struct CommandList *cp,
915 int timeout, __u32 tag)
916{
917 struct scsi_cmnd *cmd;
918 struct ctlr_info *h;
919 struct ErrorInfo *ei;
920
921 unsigned char sense_key;
922 unsigned char asc; /* additional sense code */
923 unsigned char ascq; /* additional sense code qualifier */
924
925 ei = cp->err_info;
926 cmd = (struct scsi_cmnd *) cp->scsi_cmd;
927 h = cp->h;
928
929 scsi_dma_unmap(cmd); /* undo the DMA mappings */
930
931 cmd->result = (DID_OK << 16); /* host byte */
932 cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */
933 cmd->result |= (ei->ScsiStatus << 1);
934
935 /* copy the sense data whether we need to or not. */
936 memcpy(cmd->sense_buffer, ei->SenseInfo,
937 ei->SenseLen > SCSI_SENSE_BUFFERSIZE ?
938 SCSI_SENSE_BUFFERSIZE :
939 ei->SenseLen);
940 scsi_set_resid(cmd, ei->ResidualCnt);
941
942 if (ei->CommandStatus == 0) {
943 cmd->scsi_done(cmd);
944 cmd_free(h, cp);
945 return;
946 }
947
948 /* an error has occurred */
949 switch (ei->CommandStatus) {
950
951 case CMD_TARGET_STATUS:
952 if (ei->ScsiStatus) {
953 /* Get sense key */
954 sense_key = 0xf & ei->SenseInfo[2];
955 /* Get additional sense code */
956 asc = ei->SenseInfo[12];
957 /* Get addition sense code qualifier */
958 ascq = ei->SenseInfo[13];
959 }
960
961 if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) {
962 if (check_for_unit_attention(h, cp)) {
963 cmd->result = DID_SOFT_ERROR << 16;
964 break;
965 }
966 if (sense_key == ILLEGAL_REQUEST) {
967 /*
968 * SCSI REPORT_LUNS is commonly unsupported on
969 * Smart Array. Suppress noisy complaint.
970 */
971 if (cp->Request.CDB[0] == REPORT_LUNS)
972 break;
973
974 /* If ASC/ASCQ indicate Logical Unit
975 * Not Supported condition,
976 */
977 if ((asc == 0x25) && (ascq == 0x0)) {
978 dev_warn(&h->pdev->dev, "cp %p "
979 "has check condition\n", cp);
980 break;
981 }
982 }
983
984 if (sense_key == NOT_READY) {
985 /* If Sense is Not Ready, Logical Unit
986 * Not ready, Manual Intervention
987 * required
988 */
989 if ((asc == 0x04) && (ascq == 0x03)) {
990 cmd->result = DID_NO_CONNECT << 16;
991 dev_warn(&h->pdev->dev, "cp %p "
992 "has check condition: unit "
993 "not ready, manual "
994 "intervention required\n", cp);
995 break;
996 }
997 }
998
999
1000 /* Must be some other type of check condition */
1001 dev_warn(&h->pdev->dev, "cp %p has check condition: "
1002 "unknown type: "
1003 "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
1004 "Returning result: 0x%x, "
1005 "cmd=[%02x %02x %02x %02x %02x "
1006 "%02x %02x %02x %02x %02x]\n",
1007 cp, sense_key, asc, ascq,
1008 cmd->result,
1009 cmd->cmnd[0], cmd->cmnd[1],
1010 cmd->cmnd[2], cmd->cmnd[3],
1011 cmd->cmnd[4], cmd->cmnd[5],
1012 cmd->cmnd[6], cmd->cmnd[7],
1013 cmd->cmnd[8], cmd->cmnd[9]);
1014 break;
1015 }
1016
1017
1018 /* Problem was not a check condition
1019 * Pass it up to the upper layers...
1020 */
1021 if (ei->ScsiStatus) {
1022 dev_warn(&h->pdev->dev, "cp %p has status 0x%x "
1023 "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
1024 "Returning result: 0x%x\n",
1025 cp, ei->ScsiStatus,
1026 sense_key, asc, ascq,
1027 cmd->result);
1028 } else { /* scsi status is zero??? How??? */
1029 dev_warn(&h->pdev->dev, "cp %p SCSI status was 0. "
1030 "Returning no connection.\n", cp),
1031
1032 /* Ordinarily, this case should never happen,
1033 * but there is a bug in some released firmware
1034 * revisions that allows it to happen if, for
1035 * example, a 4100 backplane loses power and
1036 * the tape drive is in it. We assume that
1037 * it's a fatal error of some kind because we
1038 * can't show that it wasn't. We will make it
1039 * look like selection timeout since that is
1040 * the most common reason for this to occur,
1041 * and it's severe enough.
1042 */
1043
1044 cmd->result = DID_NO_CONNECT << 16;
1045 }
1046 break;
1047
1048 case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
1049 break;
1050 case CMD_DATA_OVERRUN:
1051 dev_warn(&h->pdev->dev, "cp %p has"
1052 " completed with data overrun "
1053 "reported\n", cp);
1054 break;
1055 case CMD_INVALID: {
1056 /* print_bytes(cp, sizeof(*cp), 1, 0);
1057 print_cmd(cp); */
1058 /* We get CMD_INVALID if you address a non-existent device
1059 * instead of a selection timeout (no response). You will
1060 * see this if you yank out a drive, then try to access it.
1061 * This is kind of a shame because it means that any other
1062 * CMD_INVALID (e.g. driver bug) will get interpreted as a
1063 * missing target. */
1064 cmd->result = DID_NO_CONNECT << 16;
1065 }
1066 break;
1067 case CMD_PROTOCOL_ERR:
1068 dev_warn(&h->pdev->dev, "cp %p has "
1069 "protocol error \n", cp);
1070 break;
1071 case CMD_HARDWARE_ERR:
1072 cmd->result = DID_ERROR << 16;
1073 dev_warn(&h->pdev->dev, "cp %p had hardware error\n", cp);
1074 break;
1075 case CMD_CONNECTION_LOST:
1076 cmd->result = DID_ERROR << 16;
1077 dev_warn(&h->pdev->dev, "cp %p had connection lost\n", cp);
1078 break;
1079 case CMD_ABORTED:
1080 cmd->result = DID_ABORT << 16;
1081 dev_warn(&h->pdev->dev, "cp %p was aborted with status 0x%x\n",
1082 cp, ei->ScsiStatus);
1083 break;
1084 case CMD_ABORT_FAILED:
1085 cmd->result = DID_ERROR << 16;
1086 dev_warn(&h->pdev->dev, "cp %p reports abort failed\n", cp);
1087 break;
1088 case CMD_UNSOLICITED_ABORT:
1089 cmd->result = DID_ABORT << 16;
1090 dev_warn(&h->pdev->dev, "cp %p aborted do to an unsolicited "
1091 "abort\n", cp);
1092 break;
1093 case CMD_TIMEOUT:
1094 cmd->result = DID_TIME_OUT << 16;
1095 dev_warn(&h->pdev->dev, "cp %p timedout\n", cp);
1096 break;
1097 default:
1098 cmd->result = DID_ERROR << 16;
1099 dev_warn(&h->pdev->dev, "cp %p returned unknown status %x\n",
1100 cp, ei->CommandStatus);
1101 }
1102 cmd->scsi_done(cmd);
1103 cmd_free(h, cp);
1104}
1105
1106static int hpsa_scsi_detect(struct ctlr_info *h)
1107{
1108 struct Scsi_Host *sh;
1109 int error;
1110
1111 sh = scsi_host_alloc(&hpsa_driver_template, sizeof(h));
1112 if (sh == NULL)
1113 goto fail;
1114
1115 sh->io_port = 0;
1116 sh->n_io_port = 0;
1117 sh->this_id = -1;
1118 sh->max_channel = 3;
1119 sh->max_cmd_len = MAX_COMMAND_SIZE;
1120 sh->max_lun = HPSA_MAX_LUN;
1121 sh->max_id = HPSA_MAX_LUN;
1122 h->scsi_host = sh;
1123 sh->hostdata[0] = (unsigned long) h;
1124 sh->irq = h->intr[SIMPLE_MODE_INT];
1125 sh->unique_id = sh->irq;
1126 error = scsi_add_host(sh, &h->pdev->dev);
1127 if (error)
1128 goto fail_host_put;
1129 scsi_scan_host(sh);
1130 return 0;
1131
1132 fail_host_put:
1133 dev_err(&h->pdev->dev, "hpsa_scsi_detect: scsi_add_host"
1134 " failed for controller %d\n", h->ctlr);
1135 scsi_host_put(sh);
1136 return -1;
1137 fail:
1138 dev_err(&h->pdev->dev, "hpsa_scsi_detect: scsi_host_alloc"
1139 " failed for controller %d\n", h->ctlr);
1140 return -1;
1141}
1142
1143static void hpsa_pci_unmap(struct pci_dev *pdev,
1144 struct CommandList *c, int sg_used, int data_direction)
1145{
1146 int i;
1147 union u64bit addr64;
1148
1149 for (i = 0; i < sg_used; i++) {
1150 addr64.val32.lower = c->SG[i].Addr.lower;
1151 addr64.val32.upper = c->SG[i].Addr.upper;
1152 pci_unmap_single(pdev, (dma_addr_t) addr64.val, c->SG[i].Len,
1153 data_direction);
1154 }
1155}
1156
1157static void hpsa_map_one(struct pci_dev *pdev,
1158 struct CommandList *cp,
1159 unsigned char *buf,
1160 size_t buflen,
1161 int data_direction)
1162{
1163 __u64 addr64;
1164
1165 if (buflen == 0 || data_direction == PCI_DMA_NONE) {
1166 cp->Header.SGList = 0;
1167 cp->Header.SGTotal = 0;
1168 return;
1169 }
1170
1171 addr64 = (__u64) pci_map_single(pdev, buf, buflen, data_direction);
1172 cp->SG[0].Addr.lower =
1173 (__u32) (addr64 & (__u64) 0x00000000FFFFFFFF);
1174 cp->SG[0].Addr.upper =
1175 (__u32) ((addr64 >> 32) & (__u64) 0x00000000FFFFFFFF);
1176 cp->SG[0].Len = buflen;
1177 cp->Header.SGList = (__u8) 1; /* no. SGs contig in this cmd */
1178 cp->Header.SGTotal = (__u16) 1; /* total sgs in this cmd list */
1179}
1180
1181static inline void hpsa_scsi_do_simple_cmd_core(struct ctlr_info *h,
1182 struct CommandList *c)
1183{
1184 DECLARE_COMPLETION_ONSTACK(wait);
1185
1186 c->waiting = &wait;
1187 enqueue_cmd_and_start_io(h, c);
1188 wait_for_completion(&wait);
1189}
1190
1191static void hpsa_scsi_do_simple_cmd_with_retry(struct ctlr_info *h,
1192 struct CommandList *c, int data_direction)
1193{
1194 int retry_count = 0;
1195
1196 do {
1197 memset(c->err_info, 0, sizeof(c->err_info));
1198 hpsa_scsi_do_simple_cmd_core(h, c);
1199 retry_count++;
1200 } while (check_for_unit_attention(h, c) && retry_count <= 3);
1201 hpsa_pci_unmap(h->pdev, c, 1, data_direction);
1202}
1203
1204static void hpsa_scsi_interpret_error(struct CommandList *cp)
1205{
1206 struct ErrorInfo *ei;
1207 struct device *d = &cp->h->pdev->dev;
1208
1209 ei = cp->err_info;
1210 switch (ei->CommandStatus) {
1211 case CMD_TARGET_STATUS:
1212 dev_warn(d, "cmd %p has completed with errors\n", cp);
1213 dev_warn(d, "cmd %p has SCSI Status = %x\n", cp,
1214 ei->ScsiStatus);
1215 if (ei->ScsiStatus == 0)
1216 dev_warn(d, "SCSI status is abnormally zero. "
1217 "(probably indicates selection timeout "
1218 "reported incorrectly due to a known "
1219 "firmware bug, circa July, 2001.)\n");
1220 break;
1221 case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
1222 dev_info(d, "UNDERRUN\n");
1223 break;
1224 case CMD_DATA_OVERRUN:
1225 dev_warn(d, "cp %p has completed with data overrun\n", cp);
1226 break;
1227 case CMD_INVALID: {
1228 /* controller unfortunately reports SCSI passthru's
1229 * to non-existent targets as invalid commands.
1230 */
1231 dev_warn(d, "cp %p is reported invalid (probably means "
1232 "target device no longer present)\n", cp);
1233 /* print_bytes((unsigned char *) cp, sizeof(*cp), 1, 0);
1234 print_cmd(cp); */
1235 }
1236 break;
1237 case CMD_PROTOCOL_ERR:
1238 dev_warn(d, "cp %p has protocol error \n", cp);
1239 break;
1240 case CMD_HARDWARE_ERR:
1241 /* cmd->result = DID_ERROR << 16; */
1242 dev_warn(d, "cp %p had hardware error\n", cp);
1243 break;
1244 case CMD_CONNECTION_LOST:
1245 dev_warn(d, "cp %p had connection lost\n", cp);
1246 break;
1247 case CMD_ABORTED:
1248 dev_warn(d, "cp %p was aborted\n", cp);
1249 break;
1250 case CMD_ABORT_FAILED:
1251 dev_warn(d, "cp %p reports abort failed\n", cp);
1252 break;
1253 case CMD_UNSOLICITED_ABORT:
1254 dev_warn(d, "cp %p aborted due to an unsolicited abort\n", cp);
1255 break;
1256 case CMD_TIMEOUT:
1257 dev_warn(d, "cp %p timed out\n", cp);
1258 break;
1259 default:
1260 dev_warn(d, "cp %p returned unknown status %x\n", cp,
1261 ei->CommandStatus);
1262 }
1263}
1264
1265static int hpsa_scsi_do_inquiry(struct ctlr_info *h, unsigned char *scsi3addr,
1266 unsigned char page, unsigned char *buf,
1267 unsigned char bufsize)
1268{
1269 int rc = IO_OK;
1270 struct CommandList *c;
1271 struct ErrorInfo *ei;
1272
1273 c = cmd_special_alloc(h);
1274
1275 if (c == NULL) { /* trouble... */
1276 dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
1277 return -1;
1278 }
1279
1280 fill_cmd(c, HPSA_INQUIRY, h, buf, bufsize, page, scsi3addr, TYPE_CMD);
1281 hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE);
1282 ei = c->err_info;
1283 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
1284 hpsa_scsi_interpret_error(c);
1285 rc = -1;
1286 }
1287 cmd_special_free(h, c);
1288 return rc;
1289}
1290
1291static int hpsa_send_reset(struct ctlr_info *h, unsigned char *scsi3addr)
1292{
1293 int rc = IO_OK;
1294 struct CommandList *c;
1295 struct ErrorInfo *ei;
1296
1297 c = cmd_special_alloc(h);
1298
1299 if (c == NULL) { /* trouble... */
1300 dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
1301 return -1;
1302 }
1303
1304 fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0, scsi3addr, TYPE_MSG);
1305 hpsa_scsi_do_simple_cmd_core(h, c);
1306 /* no unmap needed here because no data xfer. */
1307
1308 ei = c->err_info;
1309 if (ei->CommandStatus != 0) {
1310 hpsa_scsi_interpret_error(c);
1311 rc = -1;
1312 }
1313 cmd_special_free(h, c);
1314 return rc;
1315}
1316
1317static void hpsa_get_raid_level(struct ctlr_info *h,
1318 unsigned char *scsi3addr, unsigned char *raid_level)
1319{
1320 int rc;
1321 unsigned char *buf;
1322
1323 *raid_level = RAID_UNKNOWN;
1324 buf = kzalloc(64, GFP_KERNEL);
1325 if (!buf)
1326 return;
1327 rc = hpsa_scsi_do_inquiry(h, scsi3addr, 0xC1, buf, 64);
1328 if (rc == 0)
1329 *raid_level = buf[8];
1330 if (*raid_level > RAID_UNKNOWN)
1331 *raid_level = RAID_UNKNOWN;
1332 kfree(buf);
1333 return;
1334}
1335
1336/* Get the device id from inquiry page 0x83 */
1337static int hpsa_get_device_id(struct ctlr_info *h, unsigned char *scsi3addr,
1338 unsigned char *device_id, int buflen)
1339{
1340 int rc;
1341 unsigned char *buf;
1342
1343 if (buflen > 16)
1344 buflen = 16;
1345 buf = kzalloc(64, GFP_KERNEL);
1346 if (!buf)
1347 return -1;
1348 rc = hpsa_scsi_do_inquiry(h, scsi3addr, 0x83, buf, 64);
1349 if (rc == 0)
1350 memcpy(device_id, &buf[8], buflen);
1351 kfree(buf);
1352 return rc != 0;
1353}
1354
1355static int hpsa_scsi_do_report_luns(struct ctlr_info *h, int logical,
1356 struct ReportLUNdata *buf, int bufsize,
1357 int extended_response)
1358{
1359 int rc = IO_OK;
1360 struct CommandList *c;
1361 unsigned char scsi3addr[8];
1362 struct ErrorInfo *ei;
1363
1364 c = cmd_special_alloc(h);
1365 if (c == NULL) { /* trouble... */
1366 dev_err(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
1367 return -1;
1368 }
1369
1370 memset(&scsi3addr[0], 0, 8); /* address the controller */
1371
1372 fill_cmd(c, logical ? HPSA_REPORT_LOG : HPSA_REPORT_PHYS, h,
1373 buf, bufsize, 0, scsi3addr, TYPE_CMD);
1374 if (extended_response)
1375 c->Request.CDB[1] = extended_response;
1376 hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE);
1377 ei = c->err_info;
1378 if (ei->CommandStatus != 0 &&
1379 ei->CommandStatus != CMD_DATA_UNDERRUN) {
1380 hpsa_scsi_interpret_error(c);
1381 rc = -1;
1382 }
1383 cmd_special_free(h, c);
1384 return rc;
1385}
1386
1387static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h,
1388 struct ReportLUNdata *buf,
1389 int bufsize, int extended_response)
1390{
1391 return hpsa_scsi_do_report_luns(h, 0, buf, bufsize, extended_response);
1392}
1393
1394static inline int hpsa_scsi_do_report_log_luns(struct ctlr_info *h,
1395 struct ReportLUNdata *buf, int bufsize)
1396{
1397 return hpsa_scsi_do_report_luns(h, 1, buf, bufsize, 0);
1398}
1399
1400static inline void hpsa_set_bus_target_lun(struct hpsa_scsi_dev_t *device,
1401 int bus, int target, int lun)
1402{
1403 device->bus = bus;
1404 device->target = target;
1405 device->lun = lun;
1406}
1407
1408static int hpsa_update_device_info(struct ctlr_info *h,
1409 unsigned char scsi3addr[], struct hpsa_scsi_dev_t *this_device)
1410{
1411#define OBDR_TAPE_INQ_SIZE 49
1412 unsigned char *inq_buff = NULL;
1413
1414 inq_buff = kmalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL);
1415 if (!inq_buff)
1416 goto bail_out;
1417
1418 memset(inq_buff, 0, OBDR_TAPE_INQ_SIZE);
1419 /* Do an inquiry to the device to see what it is. */
1420 if (hpsa_scsi_do_inquiry(h, scsi3addr, 0, inq_buff,
1421 (unsigned char) OBDR_TAPE_INQ_SIZE) != 0) {
1422 /* Inquiry failed (msg printed already) */
1423 dev_err(&h->pdev->dev,
1424 "hpsa_update_device_info: inquiry failed\n");
1425 goto bail_out;
1426 }
1427
1428 /* As a side effect, record the firmware version number
1429 * if we happen to be talking to the RAID controller.
1430 */
1431 if (is_hba_lunid(scsi3addr))
1432 memcpy(h->firm_ver, &inq_buff[32], 4);
1433
1434 this_device->devtype = (inq_buff[0] & 0x1f);
1435 memcpy(this_device->scsi3addr, scsi3addr, 8);
1436 memcpy(this_device->vendor, &inq_buff[8],
1437 sizeof(this_device->vendor));
1438 memcpy(this_device->model, &inq_buff[16],
1439 sizeof(this_device->model));
1440 memcpy(this_device->revision, &inq_buff[32],
1441 sizeof(this_device->revision));
1442 memset(this_device->device_id, 0,
1443 sizeof(this_device->device_id));
1444 hpsa_get_device_id(h, scsi3addr, this_device->device_id,
1445 sizeof(this_device->device_id));
1446
1447 if (this_device->devtype == TYPE_DISK &&
1448 is_logical_dev_addr_mode(scsi3addr))
1449 hpsa_get_raid_level(h, scsi3addr, &this_device->raid_level);
1450 else
1451 this_device->raid_level = RAID_UNKNOWN;
1452
1453 kfree(inq_buff);
1454 return 0;
1455
1456bail_out:
1457 kfree(inq_buff);
1458 return 1;
1459}
1460
1461static unsigned char *msa2xxx_model[] = {
1462 "MSA2012",
1463 "MSA2024",
1464 "MSA2312",
1465 "MSA2324",
1466 NULL,
1467};
1468
1469static int is_msa2xxx(struct ctlr_info *h, struct hpsa_scsi_dev_t *device)
1470{
1471 int i;
1472
1473 for (i = 0; msa2xxx_model[i]; i++)
1474 if (strncmp(device->model, msa2xxx_model[i],
1475 strlen(msa2xxx_model[i])) == 0)
1476 return 1;
1477 return 0;
1478}
1479
1480/* Helper function to assign bus, target, lun mapping of devices.
1481 * Puts non-msa2xxx logical volumes on bus 0, msa2xxx logical
1482 * volumes on bus 1, physical devices on bus 2. and the hba on bus 3.
1483 * Logical drive target and lun are assigned at this time, but
1484 * physical device lun and target assignment are deferred (assigned
1485 * in hpsa_find_target_lun, called by hpsa_scsi_add_entry.)
1486 */
1487static void figure_bus_target_lun(struct ctlr_info *h,
1488 __u8 *lunaddrbytes, int *bus, int *target, int *lun,
1489 struct hpsa_scsi_dev_t *device)
1490{
1491
1492 __u32 lunid;
1493
1494 if (is_logical_dev_addr_mode(lunaddrbytes)) {
1495 /* logical device */
1496 memcpy(&lunid, lunaddrbytes, sizeof(lunid));
1497 lunid = le32_to_cpu(lunid);
1498
1499 if (is_msa2xxx(h, device)) {
1500 *bus = 1;
1501 *target = (lunid >> 16) & 0x3fff;
1502 *lun = lunid & 0x00ff;
1503 } else {
1504 *bus = 0;
1505 *lun = 0;
1506 *target = lunid & 0x3fff;
1507 }
1508 } else {
1509 /* physical device */
1510 if (is_hba_lunid(lunaddrbytes))
1511 *bus = 3;
1512 else
1513 *bus = 2;
1514 *target = -1;
1515 *lun = -1; /* we will fill these in later. */
1516 }
1517}
1518
1519/*
1520 * If there is no lun 0 on a target, linux won't find any devices.
1521 * For the MSA2xxx boxes, we have to manually detect the enclosure
1522 * which is at lun zero, as CCISS_REPORT_PHYSICAL_LUNS doesn't report
1523 * it for some reason. *tmpdevice is the target we're adding,
1524 * this_device is a pointer into the current element of currentsd[]
1525 * that we're building up in update_scsi_devices(), below.
1526 * lunzerobits is a bitmap that tracks which targets already have a
1527 * lun 0 assigned.
1528 * Returns 1 if an enclosure was added, 0 if not.
1529 */
1530static int add_msa2xxx_enclosure_device(struct ctlr_info *h,
1531 struct hpsa_scsi_dev_t *tmpdevice,
1532 struct hpsa_scsi_dev_t *this_device, __u8 *lunaddrbytes,
1533 int bus, int target, int lun, unsigned long lunzerobits[],
1534 int *nmsa2xxx_enclosures)
1535{
1536 unsigned char scsi3addr[8];
1537
1538 if (test_bit(target, lunzerobits))
1539 return 0; /* There is already a lun 0 on this target. */
1540
1541 if (!is_logical_dev_addr_mode(lunaddrbytes))
1542 return 0; /* It's the logical targets that may lack lun 0. */
1543
1544 if (!is_msa2xxx(h, tmpdevice))
1545 return 0; /* It's only the MSA2xxx that have this problem. */
1546
1547 if (lun == 0) /* if lun is 0, then obviously we have a lun 0. */
1548 return 0;
1549
1550 if (is_hba_lunid(scsi3addr))
1551 return 0; /* Don't add the RAID controller here. */
1552
1553#define MAX_MSA2XXX_ENCLOSURES 32
1554 if (*nmsa2xxx_enclosures >= MAX_MSA2XXX_ENCLOSURES) {
1555 dev_warn(&h->pdev->dev, "Maximum number of MSA2XXX "
1556 "enclosures exceeded. Check your hardware "
1557 "configuration.");
1558 return 0;
1559 }
1560
1561 memset(scsi3addr, 0, 8);
1562 scsi3addr[3] = target;
1563 if (hpsa_update_device_info(h, scsi3addr, this_device))
1564 return 0;
1565 (*nmsa2xxx_enclosures)++;
1566 hpsa_set_bus_target_lun(this_device, bus, target, 0);
1567 set_bit(target, lunzerobits);
1568 return 1;
1569}
1570
1571/*
1572 * Do CISS_REPORT_PHYS and CISS_REPORT_LOG. Data is returned in physdev,
1573 * logdev. The number of luns in physdev and logdev are returned in
1574 * *nphysicals and *nlogicals, respectively.
1575 * Returns 0 on success, -1 otherwise.
1576 */
1577static int hpsa_gather_lun_info(struct ctlr_info *h,
1578 int reportlunsize,
1579 struct ReportLUNdata *physdev, __u32 *nphysicals,
1580 struct ReportLUNdata *logdev, __u32 *nlogicals)
1581{
1582 if (hpsa_scsi_do_report_phys_luns(h, physdev, reportlunsize, 0)) {
1583 dev_err(&h->pdev->dev, "report physical LUNs failed.\n");
1584 return -1;
1585 }
1586 memcpy(nphysicals, &physdev->LUNListLength[0], sizeof(*nphysicals));
1587 *nphysicals = be32_to_cpu(*nphysicals) / 8;
1588#ifdef DEBUG
1589 dev_info(&h->pdev->dev, "number of physical luns is %d\n", *nphysicals);
1590#endif
1591 if (*nphysicals > HPSA_MAX_PHYS_LUN) {
1592 dev_warn(&h->pdev->dev, "maximum physical LUNs (%d) exceeded."
1593 " %d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
1594 *nphysicals - HPSA_MAX_PHYS_LUN);
1595 *nphysicals = HPSA_MAX_PHYS_LUN;
1596 }
1597 if (hpsa_scsi_do_report_log_luns(h, logdev, reportlunsize)) {
1598 dev_err(&h->pdev->dev, "report logical LUNs failed.\n");
1599 return -1;
1600 }
1601 memcpy(nlogicals, &logdev->LUNListLength[0], sizeof(*nlogicals));
1602 *nlogicals = be32_to_cpu(*nlogicals) / 8;
1603#ifdef DEBUG
1604 dev_info(&h->pdev->dev, "number of logical luns is %d\n", *nlogicals);
1605#endif
1606 /* Reject Logicals in excess of our max capability. */
1607 if (*nlogicals > HPSA_MAX_LUN) {
1608 dev_warn(&h->pdev->dev,
1609 "maximum logical LUNs (%d) exceeded. "
1610 "%d LUNs ignored.\n", HPSA_MAX_LUN,
1611 *nlogicals - HPSA_MAX_LUN);
1612 *nlogicals = HPSA_MAX_LUN;
1613 }
1614 if (*nlogicals + *nphysicals > HPSA_MAX_PHYS_LUN) {
1615 dev_warn(&h->pdev->dev,
1616 "maximum logical + physical LUNs (%d) exceeded. "
1617 "%d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
1618 *nphysicals + *nlogicals - HPSA_MAX_PHYS_LUN);
1619 *nlogicals = HPSA_MAX_PHYS_LUN - *nphysicals;
1620 }
1621 return 0;
1622}
1623
1624static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno)
1625{
1626 /* the idea here is we could get notified
1627 * that some devices have changed, so we do a report
1628 * physical luns and report logical luns cmd, and adjust
1629 * our list of devices accordingly.
1630 *
1631 * The scsi3addr's of devices won't change so long as the
1632 * adapter is not reset. That means we can rescan and
1633 * tell which devices we already know about, vs. new
1634 * devices, vs. disappearing devices.
1635 */
1636 struct ReportLUNdata *physdev_list = NULL;
1637 struct ReportLUNdata *logdev_list = NULL;
1638 unsigned char *inq_buff = NULL;
1639 __u32 nphysicals = 0;
1640 __u32 nlogicals = 0;
1641 __u32 ndev_allocated = 0;
1642 struct hpsa_scsi_dev_t **currentsd, *this_device, *tmpdevice;
1643 int ncurrent = 0;
1644 int reportlunsize = sizeof(*physdev_list) + HPSA_MAX_PHYS_LUN * 8;
1645 int i, nmsa2xxx_enclosures, ndevs_to_allocate;
1646 int bus, target, lun;
1647 DECLARE_BITMAP(lunzerobits, HPSA_MAX_TARGETS_PER_CTLR);
1648
1649 currentsd = kzalloc(sizeof(*currentsd) * HPSA_MAX_SCSI_DEVS_PER_HBA,
1650 GFP_KERNEL);
1651 physdev_list = kzalloc(reportlunsize, GFP_KERNEL);
1652 logdev_list = kzalloc(reportlunsize, GFP_KERNEL);
1653 inq_buff = kmalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL);
1654 tmpdevice = kzalloc(sizeof(*tmpdevice), GFP_KERNEL);
1655
1656 if (!currentsd || !physdev_list || !logdev_list ||
1657 !inq_buff || !tmpdevice) {
1658 dev_err(&h->pdev->dev, "out of memory\n");
1659 goto out;
1660 }
1661 memset(lunzerobits, 0, sizeof(lunzerobits));
1662
1663 if (hpsa_gather_lun_info(h, reportlunsize, physdev_list, &nphysicals,
1664 logdev_list, &nlogicals))
1665 goto out;
1666
1667 /* We might see up to 32 MSA2xxx enclosures, actually 8 of them
1668 * but each of them 4 times through different paths. The plus 1
1669 * is for the RAID controller.
1670 */
1671 ndevs_to_allocate = nphysicals + nlogicals + MAX_MSA2XXX_ENCLOSURES + 1;
1672
1673 /* Allocate the per device structures */
1674 for (i = 0; i < ndevs_to_allocate; i++) {
1675 currentsd[i] = kzalloc(sizeof(*currentsd[i]), GFP_KERNEL);
1676 if (!currentsd[i]) {
1677 dev_warn(&h->pdev->dev, "out of memory at %s:%d\n",
1678 __FILE__, __LINE__);
1679 goto out;
1680 }
1681 ndev_allocated++;
1682 }
1683
1684 /* adjust our table of devices */
1685 nmsa2xxx_enclosures = 0;
1686 for (i = 0; i < nphysicals + nlogicals + 1; i++) {
1687 __u8 *lunaddrbytes;
1688
1689 /* Figure out where the LUN ID info is coming from */
1690 if (i < nphysicals)
1691 lunaddrbytes = &physdev_list->LUN[i][0];
1692 else
1693 if (i < nphysicals + nlogicals)
1694 lunaddrbytes =
1695 &logdev_list->LUN[i-nphysicals][0];
1696 else /* jam in the RAID controller at the end */
1697 lunaddrbytes = RAID_CTLR_LUNID;
1698
1699 /* skip masked physical devices. */
1700 if (lunaddrbytes[3] & 0xC0 && i < nphysicals)
1701 continue;
1702
1703 /* Get device type, vendor, model, device id */
1704 if (hpsa_update_device_info(h, lunaddrbytes, tmpdevice))
1705 continue; /* skip it if we can't talk to it. */
1706 figure_bus_target_lun(h, lunaddrbytes, &bus, &target, &lun,
1707 tmpdevice);
1708 this_device = currentsd[ncurrent];
1709
1710 /*
1711 * For the msa2xxx boxes, we have to insert a LUN 0 which
1712 * doesn't show up in CCISS_REPORT_PHYSICAL data, but there
1713 * is nonetheless an enclosure device there. We have to
1714 * present that otherwise linux won't find anything if
1715 * there is no lun 0.
1716 */
1717 if (add_msa2xxx_enclosure_device(h, tmpdevice, this_device,
1718 lunaddrbytes, bus, target, lun, lunzerobits,
1719 &nmsa2xxx_enclosures)) {
1720 ncurrent++;
1721 this_device = currentsd[ncurrent];
1722 }
1723
1724 *this_device = *tmpdevice;
1725 hpsa_set_bus_target_lun(this_device, bus, target, lun);
1726
1727 switch (this_device->devtype) {
1728 case TYPE_ROM: {
1729 /* We don't *really* support actual CD-ROM devices,
1730 * just "One Button Disaster Recovery" tape drive
1731 * which temporarily pretends to be a CD-ROM drive.
1732 * So we check that the device is really an OBDR tape
1733 * device by checking for "$DR-10" in bytes 43-48 of
1734 * the inquiry data.
1735 */
1736 char obdr_sig[7];
1737#define OBDR_TAPE_SIG "$DR-10"
1738 strncpy(obdr_sig, &inq_buff[43], 6);
1739 obdr_sig[6] = '\0';
1740 if (strncmp(obdr_sig, OBDR_TAPE_SIG, 6) != 0)
1741 /* Not OBDR device, ignore it. */
1742 break;
1743 }
1744 ncurrent++;
1745 break;
1746 case TYPE_DISK:
1747 if (i < nphysicals)
1748 break;
1749 ncurrent++;
1750 break;
1751 case TYPE_TAPE:
1752 case TYPE_MEDIUM_CHANGER:
1753 ncurrent++;
1754 break;
1755 case TYPE_RAID:
1756 /* Only present the Smartarray HBA as a RAID controller.
1757 * If it's a RAID controller other than the HBA itself
1758 * (an external RAID controller, MSA500 or similar)
1759 * don't present it.
1760 */
1761 if (!is_hba_lunid(lunaddrbytes))
1762 break;
1763 ncurrent++;
1764 break;
1765 default:
1766 break;
1767 }
1768 if (ncurrent >= HPSA_MAX_SCSI_DEVS_PER_HBA)
1769 break;
1770 }
1771 adjust_hpsa_scsi_table(h, hostno, currentsd, ncurrent);
1772out:
1773 kfree(tmpdevice);
1774 for (i = 0; i < ndev_allocated; i++)
1775 kfree(currentsd[i]);
1776 kfree(currentsd);
1777 kfree(inq_buff);
1778 kfree(physdev_list);
1779 kfree(logdev_list);
1780 return;
1781}
1782
1783/* hpsa_scatter_gather takes a struct scsi_cmnd, (cmd), and does the pci
1784 * dma mapping and fills in the scatter gather entries of the
1785 * hpsa command, cp.
1786 */
1787static int hpsa_scatter_gather(struct pci_dev *pdev,
1788 struct CommandList *cp,
1789 struct scsi_cmnd *cmd)
1790{
1791 unsigned int len;
1792 struct scatterlist *sg;
1793 __u64 addr64;
1794 int use_sg, i;
1795
1796 BUG_ON(scsi_sg_count(cmd) > MAXSGENTRIES);
1797
1798 use_sg = scsi_dma_map(cmd);
1799 if (use_sg < 0)
1800 return use_sg;
1801
1802 if (!use_sg)
1803 goto sglist_finished;
1804
1805 scsi_for_each_sg(cmd, sg, use_sg, i) {
1806 addr64 = (__u64) sg_dma_address(sg);
1807 len = sg_dma_len(sg);
1808 cp->SG[i].Addr.lower =
1809 (__u32) (addr64 & (__u64) 0x00000000FFFFFFFF);
1810 cp->SG[i].Addr.upper =
1811 (__u32) ((addr64 >> 32) & (__u64) 0x00000000FFFFFFFF);
1812 cp->SG[i].Len = len;
1813 cp->SG[i].Ext = 0; /* we are not chaining */
1814 }
1815
1816sglist_finished:
1817
1818 cp->Header.SGList = (__u8) use_sg; /* no. SGs contig in this cmd */
1819 cp->Header.SGTotal = (__u16) use_sg; /* total sgs in this cmd list */
1820 return 0;
1821}
1822
1823
1824static int hpsa_scsi_queue_command(struct scsi_cmnd *cmd,
1825 void (*done)(struct scsi_cmnd *))
1826{
1827 struct ctlr_info *h;
1828 struct hpsa_scsi_dev_t *dev;
1829 unsigned char scsi3addr[8];
1830 struct CommandList *c;
1831 unsigned long flags;
1832
1833 /* Get the ptr to our adapter structure out of cmd->host. */
1834 h = sdev_to_hba(cmd->device);
1835 dev = cmd->device->hostdata;
1836 if (!dev) {
1837 cmd->result = DID_NO_CONNECT << 16;
1838 done(cmd);
1839 return 0;
1840 }
1841 memcpy(scsi3addr, dev->scsi3addr, sizeof(scsi3addr));
1842
1843 /* Need a lock as this is being allocated from the pool */
1844 spin_lock_irqsave(&h->lock, flags);
1845 c = cmd_alloc(h);
1846 spin_unlock_irqrestore(&h->lock, flags);
1847 if (c == NULL) { /* trouble... */
1848 dev_err(&h->pdev->dev, "cmd_alloc returned NULL!\n");
1849 return SCSI_MLQUEUE_HOST_BUSY;
1850 }
1851
1852 /* Fill in the command list header */
1853
1854 cmd->scsi_done = done; /* save this for use by completion code */
1855
1856 /* save c in case we have to abort it */
1857 cmd->host_scribble = (unsigned char *) c;
1858
1859 c->cmd_type = CMD_SCSI;
1860 c->scsi_cmd = cmd;
1861 c->Header.ReplyQueue = 0; /* unused in simple mode */
1862 memcpy(&c->Header.LUN.LunAddrBytes[0], &scsi3addr[0], 8);
1863 c->Header.Tag.lower = c->busaddr; /* Use k. address of cmd as tag */
1864
1865 /* Fill in the request block... */
1866
1867 c->Request.Timeout = 0;
1868 memset(c->Request.CDB, 0, sizeof(c->Request.CDB));
1869 BUG_ON(cmd->cmd_len > sizeof(c->Request.CDB));
1870 c->Request.CDBLen = cmd->cmd_len;
1871 memcpy(c->Request.CDB, cmd->cmnd, cmd->cmd_len);
1872 c->Request.Type.Type = TYPE_CMD;
1873 c->Request.Type.Attribute = ATTR_SIMPLE;
1874 switch (cmd->sc_data_direction) {
1875 case DMA_TO_DEVICE:
1876 c->Request.Type.Direction = XFER_WRITE;
1877 break;
1878 case DMA_FROM_DEVICE:
1879 c->Request.Type.Direction = XFER_READ;
1880 break;
1881 case DMA_NONE:
1882 c->Request.Type.Direction = XFER_NONE;
1883 break;
1884 case DMA_BIDIRECTIONAL:
1885 /* This can happen if a buggy application does a scsi passthru
1886 * and sets both inlen and outlen to non-zero. ( see
1887 * ../scsi/scsi_ioctl.c:scsi_ioctl_send_command() )
1888 */
1889
1890 c->Request.Type.Direction = XFER_RSVD;
1891 /* This is technically wrong, and hpsa controllers should
1892 * reject it with CMD_INVALID, which is the most correct
1893 * response, but non-fibre backends appear to let it
1894 * slide by, and give the same results as if this field
1895 * were set correctly. Either way is acceptable for
1896 * our purposes here.
1897 */
1898
1899 break;
1900
1901 default:
1902 dev_err(&h->pdev->dev, "unknown data direction: %d\n",
1903 cmd->sc_data_direction);
1904 BUG();
1905 break;
1906 }
1907
1908 if (hpsa_scatter_gather(h->pdev, c, cmd) < 0) { /* Fill SG list */
1909 cmd_free(h, c);
1910 return SCSI_MLQUEUE_HOST_BUSY;
1911 }
1912 enqueue_cmd_and_start_io(h, c);
1913 /* the cmd'll come back via intr handler in complete_scsi_command() */
1914 return 0;
1915}
1916
1917static void hpsa_unregister_scsi(struct ctlr_info *h)
1918{
1919 /* we are being forcibly unloaded, and may not refuse. */
1920 scsi_remove_host(h->scsi_host);
1921 scsi_host_put(h->scsi_host);
1922 h->scsi_host = NULL;
1923}
1924
1925static int hpsa_register_scsi(struct ctlr_info *h)
1926{
1927 int rc;
1928
1929 hpsa_update_scsi_devices(h, -1);
1930 rc = hpsa_scsi_detect(h);
1931 if (rc != 0)
1932 dev_err(&h->pdev->dev, "hpsa_register_scsi: failed"
1933 " hpsa_scsi_detect(), rc is %d\n", rc);
1934 return rc;
1935}
1936
1937static int wait_for_device_to_become_ready(struct ctlr_info *h,
1938 unsigned char lunaddr[])
1939{
1940 int rc = 0;
1941 int count = 0;
1942 int waittime = 1; /* seconds */
1943 struct CommandList *c;
1944
1945 c = cmd_special_alloc(h);
1946 if (!c) {
1947 dev_warn(&h->pdev->dev, "out of memory in "
1948 "wait_for_device_to_become_ready.\n");
1949 return IO_ERROR;
1950 }
1951
1952 /* Send test unit ready until device ready, or give up. */
1953 while (count < HPSA_TUR_RETRY_LIMIT) {
1954
1955 /* Wait for a bit. do this first, because if we send
1956 * the TUR right away, the reset will just abort it.
1957 */
1958 msleep(1000 * waittime);
1959 count++;
1960
1961 /* Increase wait time with each try, up to a point. */
1962 if (waittime < HPSA_MAX_WAIT_INTERVAL_SECS)
1963 waittime = waittime * 2;
1964
1965 /* Send the Test Unit Ready */
1966 fill_cmd(c, TEST_UNIT_READY, h, NULL, 0, 0, lunaddr, TYPE_CMD);
1967 hpsa_scsi_do_simple_cmd_core(h, c);
1968 /* no unmap needed here because no data xfer. */
1969
1970 if (c->err_info->CommandStatus == CMD_SUCCESS)
1971 break;
1972
1973 if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
1974 c->err_info->ScsiStatus == SAM_STAT_CHECK_CONDITION &&
1975 (c->err_info->SenseInfo[2] == NO_SENSE ||
1976 c->err_info->SenseInfo[2] == UNIT_ATTENTION))
1977 break;
1978
1979 dev_warn(&h->pdev->dev, "waiting %d secs "
1980 "for device to become ready.\n", waittime);
1981 rc = 1; /* device not ready. */
1982 }
1983
1984 if (rc)
1985 dev_warn(&h->pdev->dev, "giving up on device.\n");
1986 else
1987 dev_warn(&h->pdev->dev, "device is ready.\n");
1988
1989 cmd_special_free(h, c);
1990 return rc;
1991}
1992
1993/* Need at least one of these error handlers to keep ../scsi/hosts.c from
1994 * complaining. Doing a host- or bus-reset can't do anything good here.
1995 */
1996static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd)
1997{
1998 int rc;
1999 struct ctlr_info *h;
2000 struct hpsa_scsi_dev_t *dev;
2001
2002 /* find the controller to which the command to be aborted was sent */
2003 h = sdev_to_hba(scsicmd->device);
2004 if (h == NULL) /* paranoia */
2005 return FAILED;
2006 dev_warn(&h->pdev->dev, "resetting drive\n");
2007
2008 dev = scsicmd->device->hostdata;
2009 if (!dev) {
2010 dev_err(&h->pdev->dev, "hpsa_eh_device_reset_handler: "
2011 "device lookup failed.\n");
2012 return FAILED;
2013 }
2014 /* send a reset to the SCSI LUN which the command was sent to */
2015 rc = hpsa_send_reset(h, dev->scsi3addr);
2016 if (rc == 0 && wait_for_device_to_become_ready(h, dev->scsi3addr) == 0)
2017 return SUCCESS;
2018
2019 dev_warn(&h->pdev->dev, "resetting device failed.\n");
2020 return FAILED;
2021}
2022
2023/*
2024 * For operations that cannot sleep, a command block is allocated at init,
2025 * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track
2026 * which ones are free or in use. Lock must be held when calling this.
2027 * cmd_free() is the complement.
2028 */
2029static struct CommandList *cmd_alloc(struct ctlr_info *h)
2030{
2031 struct CommandList *c;
2032 int i;
2033 union u64bit temp64;
2034 dma_addr_t cmd_dma_handle, err_dma_handle;
2035
2036 do {
2037 i = find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds);
2038 if (i == h->nr_cmds)
2039 return NULL;
2040 } while (test_and_set_bit
2041 (i & (BITS_PER_LONG - 1),
2042 h->cmd_pool_bits + (i / BITS_PER_LONG)) != 0);
2043 c = h->cmd_pool + i;
2044 memset(c, 0, sizeof(*c));
2045 cmd_dma_handle = h->cmd_pool_dhandle
2046 + i * sizeof(*c);
2047 c->err_info = h->errinfo_pool + i;
2048 memset(c->err_info, 0, sizeof(*c->err_info));
2049 err_dma_handle = h->errinfo_pool_dhandle
2050 + i * sizeof(*c->err_info);
2051 h->nr_allocs++;
2052
2053 c->cmdindex = i;
2054
2055 INIT_HLIST_NODE(&c->list);
2056 c->busaddr = (__u32) cmd_dma_handle;
2057 temp64.val = (__u64) err_dma_handle;
2058 c->ErrDesc.Addr.lower = temp64.val32.lower;
2059 c->ErrDesc.Addr.upper = temp64.val32.upper;
2060 c->ErrDesc.Len = sizeof(*c->err_info);
2061
2062 c->h = h;
2063 return c;
2064}
2065
2066/* For operations that can wait for kmalloc to possibly sleep,
2067 * this routine can be called. Lock need not be held to call
2068 * cmd_special_alloc. cmd_special_free() is the complement.
2069 */
2070static struct CommandList *cmd_special_alloc(struct ctlr_info *h)
2071{
2072 struct CommandList *c;
2073 union u64bit temp64;
2074 dma_addr_t cmd_dma_handle, err_dma_handle;
2075
2076 c = pci_alloc_consistent(h->pdev, sizeof(*c), &cmd_dma_handle);
2077 if (c == NULL)
2078 return NULL;
2079 memset(c, 0, sizeof(*c));
2080
2081 c->cmdindex = -1;
2082
2083 c->err_info = pci_alloc_consistent(h->pdev, sizeof(*c->err_info),
2084 &err_dma_handle);
2085
2086 if (c->err_info == NULL) {
2087 pci_free_consistent(h->pdev,
2088 sizeof(*c), c, cmd_dma_handle);
2089 return NULL;
2090 }
2091 memset(c->err_info, 0, sizeof(*c->err_info));
2092
2093 INIT_HLIST_NODE(&c->list);
2094 c->busaddr = (__u32) cmd_dma_handle;
2095 temp64.val = (__u64) err_dma_handle;
2096 c->ErrDesc.Addr.lower = temp64.val32.lower;
2097 c->ErrDesc.Addr.upper = temp64.val32.upper;
2098 c->ErrDesc.Len = sizeof(*c->err_info);
2099
2100 c->h = h;
2101 return c;
2102}
2103
2104static void cmd_free(struct ctlr_info *h, struct CommandList *c)
2105{
2106 int i;
2107
2108 i = c - h->cmd_pool;
2109 clear_bit(i & (BITS_PER_LONG - 1),
2110 h->cmd_pool_bits + (i / BITS_PER_LONG));
2111 h->nr_frees++;
2112}
2113
2114static void cmd_special_free(struct ctlr_info *h, struct CommandList *c)
2115{
2116 union u64bit temp64;
2117
2118 temp64.val32.lower = c->ErrDesc.Addr.lower;
2119 temp64.val32.upper = c->ErrDesc.Addr.upper;
2120 pci_free_consistent(h->pdev, sizeof(*c->err_info),
2121 c->err_info, (dma_addr_t) temp64.val);
2122 pci_free_consistent(h->pdev, sizeof(*c),
2123 c, (dma_addr_t) c->busaddr);
2124}
2125
2126#ifdef CONFIG_COMPAT
2127
2128static int do_ioctl(struct scsi_device *dev, int cmd, void *arg)
2129{
2130 int ret;
2131
2132 lock_kernel();
2133 ret = hpsa_ioctl(dev, cmd, arg);
2134 unlock_kernel();
2135 return ret;
2136}
2137
2138static int hpsa_ioctl32_passthru(struct scsi_device *dev, int cmd, void *arg);
2139static int hpsa_ioctl32_big_passthru(struct scsi_device *dev,
2140 int cmd, void *arg);
2141
2142static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void *arg)
2143{
2144 switch (cmd) {
2145 case CCISS_GETPCIINFO:
2146 case CCISS_GETINTINFO:
2147 case CCISS_SETINTINFO:
2148 case CCISS_GETNODENAME:
2149 case CCISS_SETNODENAME:
2150 case CCISS_GETHEARTBEAT:
2151 case CCISS_GETBUSTYPES:
2152 case CCISS_GETFIRMVER:
2153 case CCISS_GETDRIVVER:
2154 case CCISS_REVALIDVOLS:
2155 case CCISS_DEREGDISK:
2156 case CCISS_REGNEWDISK:
2157 case CCISS_REGNEWD:
2158 case CCISS_RESCANDISK:
2159 case CCISS_GETLUNINFO:
2160 return do_ioctl(dev, cmd, arg);
2161
2162 case CCISS_PASSTHRU32:
2163 return hpsa_ioctl32_passthru(dev, cmd, arg);
2164 case CCISS_BIG_PASSTHRU32:
2165 return hpsa_ioctl32_big_passthru(dev, cmd, arg);
2166
2167 default:
2168 return -ENOIOCTLCMD;
2169 }
2170}
2171
2172static int hpsa_ioctl32_passthru(struct scsi_device *dev, int cmd, void *arg)
2173{
2174 IOCTL32_Command_struct __user *arg32 =
2175 (IOCTL32_Command_struct __user *) arg;
2176 IOCTL_Command_struct arg64;
2177 IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64));
2178 int err;
2179 u32 cp;
2180
2181 err = 0;
2182 err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
2183 sizeof(arg64.LUN_info));
2184 err |= copy_from_user(&arg64.Request, &arg32->Request,
2185 sizeof(arg64.Request));
2186 err |= copy_from_user(&arg64.error_info, &arg32->error_info,
2187 sizeof(arg64.error_info));
2188 err |= get_user(arg64.buf_size, &arg32->buf_size);
2189 err |= get_user(cp, &arg32->buf);
2190 arg64.buf = compat_ptr(cp);
2191 err |= copy_to_user(p, &arg64, sizeof(arg64));
2192
2193 if (err)
2194 return -EFAULT;
2195
2196 err = do_ioctl(dev, CCISS_PASSTHRU, (void *)p);
2197 if (err)
2198 return err;
2199 err |= copy_in_user(&arg32->error_info, &p->error_info,
2200 sizeof(arg32->error_info));
2201 if (err)
2202 return -EFAULT;
2203 return err;
2204}
2205
2206static int hpsa_ioctl32_big_passthru(struct scsi_device *dev,
2207 int cmd, void *arg)
2208{
2209 BIG_IOCTL32_Command_struct __user *arg32 =
2210 (BIG_IOCTL32_Command_struct __user *) arg;
2211 BIG_IOCTL_Command_struct arg64;
2212 BIG_IOCTL_Command_struct __user *p =
2213 compat_alloc_user_space(sizeof(arg64));
2214 int err;
2215 u32 cp;
2216
2217 err = 0;
2218 err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
2219 sizeof(arg64.LUN_info));
2220 err |= copy_from_user(&arg64.Request, &arg32->Request,
2221 sizeof(arg64.Request));
2222 err |= copy_from_user(&arg64.error_info, &arg32->error_info,
2223 sizeof(arg64.error_info));
2224 err |= get_user(arg64.buf_size, &arg32->buf_size);
2225 err |= get_user(arg64.malloc_size, &arg32->malloc_size);
2226 err |= get_user(cp, &arg32->buf);
2227 arg64.buf = compat_ptr(cp);
2228 err |= copy_to_user(p, &arg64, sizeof(arg64));
2229
2230 if (err)
2231 return -EFAULT;
2232
2233 err = do_ioctl(dev, CCISS_BIG_PASSTHRU, (void *)p);
2234 if (err)
2235 return err;
2236 err |= copy_in_user(&arg32->error_info, &p->error_info,
2237 sizeof(arg32->error_info));
2238 if (err)
2239 return -EFAULT;
2240 return err;
2241}
2242#endif
2243
2244static int hpsa_getpciinfo_ioctl(struct ctlr_info *h, void __user *argp)
2245{
2246 struct hpsa_pci_info pciinfo;
2247
2248 if (!argp)
2249 return -EINVAL;
2250 pciinfo.domain = pci_domain_nr(h->pdev->bus);
2251 pciinfo.bus = h->pdev->bus->number;
2252 pciinfo.dev_fn = h->pdev->devfn;
2253 pciinfo.board_id = h->board_id;
2254 if (copy_to_user(argp, &pciinfo, sizeof(pciinfo)))
2255 return -EFAULT;
2256 return 0;
2257}
2258
2259static int hpsa_getdrivver_ioctl(struct ctlr_info *h, void __user *argp)
2260{
2261 DriverVer_type DriverVer;
2262 unsigned char vmaj, vmin, vsubmin;
2263 int rc;
2264
2265 rc = sscanf(HPSA_DRIVER_VERSION, "%hhu.%hhu.%hhu",
2266 &vmaj, &vmin, &vsubmin);
2267 if (rc != 3) {
2268 dev_info(&h->pdev->dev, "driver version string '%s' "
2269 "unrecognized.", HPSA_DRIVER_VERSION);
2270 vmaj = 0;
2271 vmin = 0;
2272 vsubmin = 0;
2273 }
2274 DriverVer = (vmaj << 16) | (vmin << 8) | vsubmin;
2275 if (!argp)
2276 return -EINVAL;
2277 if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type)))
2278 return -EFAULT;
2279 return 0;
2280}
2281
2282static int hpsa_passthru_ioctl(struct ctlr_info *h, void __user *argp)
2283{
2284 IOCTL_Command_struct iocommand;
2285 struct CommandList *c;
2286 char *buff = NULL;
2287 union u64bit temp64;
2288
2289 if (!argp)
2290 return -EINVAL;
2291 if (!capable(CAP_SYS_RAWIO))
2292 return -EPERM;
2293 if (copy_from_user(&iocommand, argp, sizeof(iocommand)))
2294 return -EFAULT;
2295 if ((iocommand.buf_size < 1) &&
2296 (iocommand.Request.Type.Direction != XFER_NONE)) {
2297 return -EINVAL;
2298 }
2299 if (iocommand.buf_size > 0) {
2300 buff = kmalloc(iocommand.buf_size, GFP_KERNEL);
2301 if (buff == NULL)
2302 return -EFAULT;
2303 }
2304 if (iocommand.Request.Type.Direction == XFER_WRITE) {
2305 /* Copy the data into the buffer we created */
2306 if (copy_from_user(buff, iocommand.buf, iocommand.buf_size)) {
2307 kfree(buff);
2308 return -EFAULT;
2309 }
2310 } else
2311 memset(buff, 0, iocommand.buf_size);
2312 c = cmd_special_alloc(h);
2313 if (c == NULL) {
2314 kfree(buff);
2315 return -ENOMEM;
2316 }
2317 /* Fill in the command type */
2318 c->cmd_type = CMD_IOCTL_PEND;
2319 /* Fill in Command Header */
2320 c->Header.ReplyQueue = 0; /* unused in simple mode */
2321 if (iocommand.buf_size > 0) { /* buffer to fill */
2322 c->Header.SGList = 1;
2323 c->Header.SGTotal = 1;
2324 } else { /* no buffers to fill */
2325 c->Header.SGList = 0;
2326 c->Header.SGTotal = 0;
2327 }
2328 memcpy(&c->Header.LUN, &iocommand.LUN_info, sizeof(c->Header.LUN));
2329 /* use the kernel address the cmd block for tag */
2330 c->Header.Tag.lower = c->busaddr;
2331
2332 /* Fill in Request block */
2333 memcpy(&c->Request, &iocommand.Request,
2334 sizeof(c->Request));
2335
2336 /* Fill in the scatter gather information */
2337 if (iocommand.buf_size > 0) {
2338 temp64.val = pci_map_single(h->pdev, buff,
2339 iocommand.buf_size, PCI_DMA_BIDIRECTIONAL);
2340 c->SG[0].Addr.lower = temp64.val32.lower;
2341 c->SG[0].Addr.upper = temp64.val32.upper;
2342 c->SG[0].Len = iocommand.buf_size;
2343 c->SG[0].Ext = 0; /* we are not chaining*/
2344 }
2345 hpsa_scsi_do_simple_cmd_core(h, c);
2346 hpsa_pci_unmap(h->pdev, c, 1, PCI_DMA_BIDIRECTIONAL);
2347 check_ioctl_unit_attention(h, c);
2348
2349 /* Copy the error information out */
2350 memcpy(&iocommand.error_info, c->err_info,
2351 sizeof(iocommand.error_info));
2352 if (copy_to_user(argp, &iocommand, sizeof(iocommand))) {
2353 kfree(buff);
2354 cmd_special_free(h, c);
2355 return -EFAULT;
2356 }
2357
2358 if (iocommand.Request.Type.Direction == XFER_READ) {
2359 /* Copy the data out of the buffer we created */
2360 if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) {
2361 kfree(buff);
2362 cmd_special_free(h, c);
2363 return -EFAULT;
2364 }
2365 }
2366 kfree(buff);
2367 cmd_special_free(h, c);
2368 return 0;
2369}
2370
2371static int hpsa_big_passthru_ioctl(struct ctlr_info *h, void __user *argp)
2372{
2373 BIG_IOCTL_Command_struct *ioc;
2374 struct CommandList *c;
2375 unsigned char **buff = NULL;
2376 int *buff_size = NULL;
2377 union u64bit temp64;
2378 BYTE sg_used = 0;
2379 int status = 0;
2380 int i;
2381 __u32 left;
2382 __u32 sz;
2383 BYTE __user *data_ptr;
2384
2385 if (!argp)
2386 return -EINVAL;
2387 if (!capable(CAP_SYS_RAWIO))
2388 return -EPERM;
2389 ioc = (BIG_IOCTL_Command_struct *)
2390 kmalloc(sizeof(*ioc), GFP_KERNEL);
2391 if (!ioc) {
2392 status = -ENOMEM;
2393 goto cleanup1;
2394 }
2395 if (copy_from_user(ioc, argp, sizeof(*ioc))) {
2396 status = -EFAULT;
2397 goto cleanup1;
2398 }
2399 if ((ioc->buf_size < 1) &&
2400 (ioc->Request.Type.Direction != XFER_NONE)) {
2401 status = -EINVAL;
2402 goto cleanup1;
2403 }
2404 /* Check kmalloc limits using all SGs */
2405 if (ioc->malloc_size > MAX_KMALLOC_SIZE) {
2406 status = -EINVAL;
2407 goto cleanup1;
2408 }
2409 if (ioc->buf_size > ioc->malloc_size * MAXSGENTRIES) {
2410 status = -EINVAL;
2411 goto cleanup1;
2412 }
2413 buff = kzalloc(MAXSGENTRIES * sizeof(char *), GFP_KERNEL);
2414 if (!buff) {
2415 status = -ENOMEM;
2416 goto cleanup1;
2417 }
2418 buff_size = kmalloc(MAXSGENTRIES * sizeof(int), GFP_KERNEL);
2419 if (!buff_size) {
2420 status = -ENOMEM;
2421 goto cleanup1;
2422 }
2423 left = ioc->buf_size;
2424 data_ptr = ioc->buf;
2425 while (left) {
2426 sz = (left > ioc->malloc_size) ? ioc->malloc_size : left;
2427 buff_size[sg_used] = sz;
2428 buff[sg_used] = kmalloc(sz, GFP_KERNEL);
2429 if (buff[sg_used] == NULL) {
2430 status = -ENOMEM;
2431 goto cleanup1;
2432 }
2433 if (ioc->Request.Type.Direction == XFER_WRITE) {
2434 if (copy_from_user(buff[sg_used], data_ptr, sz)) {
2435 status = -ENOMEM;
2436 goto cleanup1;
2437 }
2438 } else
2439 memset(buff[sg_used], 0, sz);
2440 left -= sz;
2441 data_ptr += sz;
2442 sg_used++;
2443 }
2444 c = cmd_special_alloc(h);
2445 if (c == NULL) {
2446 status = -ENOMEM;
2447 goto cleanup1;
2448 }
2449 c->cmd_type = CMD_IOCTL_PEND;
2450 c->Header.ReplyQueue = 0;
2451
2452 if (ioc->buf_size > 0) {
2453 c->Header.SGList = sg_used;
2454 c->Header.SGTotal = sg_used;
2455 } else {
2456 c->Header.SGList = 0;
2457 c->Header.SGTotal = 0;
2458 }
2459 memcpy(&c->Header.LUN, &ioc->LUN_info, sizeof(c->Header.LUN));
2460 c->Header.Tag.lower = c->busaddr;
2461 memcpy(&c->Request, &ioc->Request, sizeof(c->Request));
2462 if (ioc->buf_size > 0) {
2463 int i;
2464 for (i = 0; i < sg_used; i++) {
2465 temp64.val = pci_map_single(h->pdev, buff[i],
2466 buff_size[i], PCI_DMA_BIDIRECTIONAL);
2467 c->SG[i].Addr.lower = temp64.val32.lower;
2468 c->SG[i].Addr.upper = temp64.val32.upper;
2469 c->SG[i].Len = buff_size[i];
2470 /* we are not chaining */
2471 c->SG[i].Ext = 0;
2472 }
2473 }
2474 hpsa_scsi_do_simple_cmd_core(h, c);
2475 hpsa_pci_unmap(h->pdev, c, sg_used, PCI_DMA_BIDIRECTIONAL);
2476 check_ioctl_unit_attention(h, c);
2477 /* Copy the error information out */
2478 memcpy(&ioc->error_info, c->err_info, sizeof(ioc->error_info));
2479 if (copy_to_user(argp, ioc, sizeof(*ioc))) {
2480 cmd_special_free(h, c);
2481 status = -EFAULT;
2482 goto cleanup1;
2483 }
2484 if (ioc->Request.Type.Direction == XFER_READ) {
2485 /* Copy the data out of the buffer we created */
2486 BYTE __user *ptr = ioc->buf;
2487 for (i = 0; i < sg_used; i++) {
2488 if (copy_to_user(ptr, buff[i], buff_size[i])) {
2489 cmd_special_free(h, c);
2490 status = -EFAULT;
2491 goto cleanup1;
2492 }
2493 ptr += buff_size[i];
2494 }
2495 }
2496 cmd_special_free(h, c);
2497 status = 0;
2498cleanup1:
2499 if (buff) {
2500 for (i = 0; i < sg_used; i++)
2501 kfree(buff[i]);
2502 kfree(buff);
2503 }
2504 kfree(buff_size);
2505 kfree(ioc);
2506 return status;
2507}
2508
2509static void check_ioctl_unit_attention(struct ctlr_info *h,
2510 struct CommandList *c)
2511{
2512 if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
2513 c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION)
2514 (void) check_for_unit_attention(h, c);
2515}
2516/*
2517 * ioctl
2518 */
2519static int hpsa_ioctl(struct scsi_device *dev, int cmd, void *arg)
2520{
2521 struct ctlr_info *h;
2522 void __user *argp = (void __user *)arg;
2523
2524 h = sdev_to_hba(dev);
2525
2526 switch (cmd) {
2527 case CCISS_DEREGDISK:
2528 case CCISS_REGNEWDISK:
2529 case CCISS_REGNEWD:
2530 hpsa_update_scsi_devices(h, dev->host->host_no);
2531 return 0;
2532 case CCISS_GETPCIINFO:
2533 return hpsa_getpciinfo_ioctl(h, argp);
2534 case CCISS_GETDRIVVER:
2535 return hpsa_getdrivver_ioctl(h, argp);
2536 case CCISS_PASSTHRU:
2537 return hpsa_passthru_ioctl(h, argp);
2538 case CCISS_BIG_PASSTHRU:
2539 return hpsa_big_passthru_ioctl(h, argp);
2540 default:
2541 return -ENOTTY;
2542 }
2543}
2544
2545static void fill_cmd(struct CommandList *c, __u8 cmd, struct ctlr_info *h,
2546 void *buff, size_t size, __u8 page_code, unsigned char *scsi3addr,
2547 int cmd_type)
2548{
2549 int pci_dir = XFER_NONE;
2550
2551 c->cmd_type = CMD_IOCTL_PEND;
2552 c->Header.ReplyQueue = 0;
2553 if (buff != NULL && size > 0) {
2554 c->Header.SGList = 1;
2555 c->Header.SGTotal = 1;
2556 } else {
2557 c->Header.SGList = 0;
2558 c->Header.SGTotal = 0;
2559 }
2560 c->Header.Tag.lower = c->busaddr;
2561 memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8);
2562
2563 c->Request.Type.Type = cmd_type;
2564 if (cmd_type == TYPE_CMD) {
2565 switch (cmd) {
2566 case HPSA_INQUIRY:
2567 /* are we trying to read a vital product page */
2568 if (page_code != 0) {
2569 c->Request.CDB[1] = 0x01;
2570 c->Request.CDB[2] = page_code;
2571 }
2572 c->Request.CDBLen = 6;
2573 c->Request.Type.Attribute = ATTR_SIMPLE;
2574 c->Request.Type.Direction = XFER_READ;
2575 c->Request.Timeout = 0;
2576 c->Request.CDB[0] = HPSA_INQUIRY;
2577 c->Request.CDB[4] = size & 0xFF;
2578 break;
2579 case HPSA_REPORT_LOG:
2580 case HPSA_REPORT_PHYS:
2581 /* Talking to controller so It's a physical command
2582 mode = 00 target = 0. Nothing to write.
2583 */
2584 c->Request.CDBLen = 12;
2585 c->Request.Type.Attribute = ATTR_SIMPLE;
2586 c->Request.Type.Direction = XFER_READ;
2587 c->Request.Timeout = 0;
2588 c->Request.CDB[0] = cmd;
2589 c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
2590 c->Request.CDB[7] = (size >> 16) & 0xFF;
2591 c->Request.CDB[8] = (size >> 8) & 0xFF;
2592 c->Request.CDB[9] = size & 0xFF;
2593 break;
2594
2595 case HPSA_READ_CAPACITY:
2596 c->Request.CDBLen = 10;
2597 c->Request.Type.Attribute = ATTR_SIMPLE;
2598 c->Request.Type.Direction = XFER_READ;
2599 c->Request.Timeout = 0;
2600 c->Request.CDB[0] = cmd;
2601 break;
2602 case HPSA_CACHE_FLUSH:
2603 c->Request.CDBLen = 12;
2604 c->Request.Type.Attribute = ATTR_SIMPLE;
2605 c->Request.Type.Direction = XFER_WRITE;
2606 c->Request.Timeout = 0;
2607 c->Request.CDB[0] = BMIC_WRITE;
2608 c->Request.CDB[6] = BMIC_CACHE_FLUSH;
2609 break;
2610 case TEST_UNIT_READY:
2611 c->Request.CDBLen = 6;
2612 c->Request.Type.Attribute = ATTR_SIMPLE;
2613 c->Request.Type.Direction = XFER_NONE;
2614 c->Request.Timeout = 0;
2615 break;
2616 default:
2617 dev_warn(&h->pdev->dev, "unknown command 0x%c\n", cmd);
2618 BUG();
2619 return;
2620 }
2621 } else if (cmd_type == TYPE_MSG) {
2622 switch (cmd) {
2623
2624 case HPSA_DEVICE_RESET_MSG:
2625 c->Request.CDBLen = 16;
2626 c->Request.Type.Type = 1; /* It is a MSG not a CMD */
2627 c->Request.Type.Attribute = ATTR_SIMPLE;
2628 c->Request.Type.Direction = XFER_NONE;
2629 c->Request.Timeout = 0; /* Don't time out */
2630 c->Request.CDB[0] = 0x01; /* RESET_MSG is 0x01 */
2631 c->Request.CDB[1] = 0x03; /* Reset target above */
2632 /* If bytes 4-7 are zero, it means reset the */
2633 /* LunID device */
2634 c->Request.CDB[4] = 0x00;
2635 c->Request.CDB[5] = 0x00;
2636 c->Request.CDB[6] = 0x00;
2637 c->Request.CDB[7] = 0x00;
2638 break;
2639
2640 default:
2641 dev_warn(&h->pdev->dev, "unknown message type %d\n",
2642 cmd);
2643 BUG();
2644 }
2645 } else {
2646 dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type);
2647 BUG();
2648 }
2649
2650 switch (c->Request.Type.Direction) {
2651 case XFER_READ:
2652 pci_dir = PCI_DMA_FROMDEVICE;
2653 break;
2654 case XFER_WRITE:
2655 pci_dir = PCI_DMA_TODEVICE;
2656 break;
2657 case XFER_NONE:
2658 pci_dir = PCI_DMA_NONE;
2659 break;
2660 default:
2661 pci_dir = PCI_DMA_BIDIRECTIONAL;
2662 }
2663
2664 hpsa_map_one(h->pdev, c, buff, size, pci_dir);
2665
2666 return;
2667}
2668
2669/*
2670 * Map (physical) PCI mem into (virtual) kernel space
2671 */
2672static void __iomem *remap_pci_mem(ulong base, ulong size)
2673{
2674 ulong page_base = ((ulong) base) & PAGE_MASK;
2675 ulong page_offs = ((ulong) base) - page_base;
2676 void __iomem *page_remapped = ioremap(page_base, page_offs + size);
2677
2678 return page_remapped ? (page_remapped + page_offs) : NULL;
2679}
2680
2681/* Takes cmds off the submission queue and sends them to the hardware,
2682 * then puts them on the queue of cmds waiting for completion.
2683 */
2684static void start_io(struct ctlr_info *h)
2685{
2686 struct CommandList *c;
2687
2688 while (!hlist_empty(&h->reqQ)) {
2689 c = hlist_entry(h->reqQ.first, struct CommandList, list);
2690 /* can't do anything if fifo is full */
2691 if ((h->access.fifo_full(h))) {
2692 dev_warn(&h->pdev->dev, "fifo full\n");
2693 break;
2694 }
2695
2696 /* Get the first entry from the Request Q */
2697 removeQ(c);
2698 h->Qdepth--;
2699
2700 /* Tell the controller execute command */
2701 h->access.submit_command(h, c);
2702
2703 /* Put job onto the completed Q */
2704 addQ(&h->cmpQ, c);
2705 }
2706}
2707
2708static inline unsigned long get_next_completion(struct ctlr_info *h)
2709{
2710 return h->access.command_completed(h);
2711}
2712
2713static inline int interrupt_pending(struct ctlr_info *h)
2714{
2715 return h->access.intr_pending(h);
2716}
2717
2718static inline long interrupt_not_for_us(struct ctlr_info *h)
2719{
2720 return ((h->access.intr_pending(h) == 0) ||
2721 (h->interrupts_enabled == 0));
2722}
2723
2724static inline int bad_tag(struct ctlr_info *h, __u32 tag_index,
2725 __u32 raw_tag)
2726{
2727 if (unlikely(tag_index >= h->nr_cmds)) {
2728 dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag);
2729 return 1;
2730 }
2731 return 0;
2732}
2733
2734static inline void finish_cmd(struct CommandList *c, __u32 raw_tag)
2735{
2736 removeQ(c);
2737 if (likely(c->cmd_type == CMD_SCSI))
2738 complete_scsi_command(c, 0, raw_tag);
2739 else if (c->cmd_type == CMD_IOCTL_PEND)
2740 complete(c->waiting);
2741}
2742
2743static irqreturn_t do_hpsa_intr(int irq, void *dev_id)
2744{
2745 struct ctlr_info *h = dev_id;
2746 struct CommandList *c;
2747 unsigned long flags;
2748 __u32 raw_tag, tag, tag_index;
2749 struct hlist_node *tmp;
2750
2751 if (interrupt_not_for_us(h))
2752 return IRQ_NONE;
2753 spin_lock_irqsave(&h->lock, flags);
2754 while (interrupt_pending(h)) {
2755 while ((raw_tag = get_next_completion(h)) != FIFO_EMPTY) {
2756 if (likely(HPSA_TAG_CONTAINS_INDEX(raw_tag))) {
2757 tag_index = HPSA_TAG_TO_INDEX(raw_tag);
2758 if (bad_tag(h, tag_index, raw_tag))
2759 return IRQ_HANDLED;
2760 c = h->cmd_pool + tag_index;
2761 finish_cmd(c, raw_tag);
2762 continue;
2763 }
2764 tag = HPSA_TAG_DISCARD_ERROR_BITS(raw_tag);
2765 c = NULL;
2766 hlist_for_each_entry(c, tmp, &h->cmpQ, list) {
2767 if (c->busaddr == tag) {
2768 finish_cmd(c, raw_tag);
2769 break;
2770 }
2771 }
2772 }
2773 }
2774 spin_unlock_irqrestore(&h->lock, flags);
2775 return IRQ_HANDLED;
2776}
2777
2778/* Send a message CDB to the firmware. */
2779static __devinit int hpsa_message(struct pci_dev *pdev, unsigned char opcode,
2780 unsigned char type)
2781{
2782 struct Command {
2783 struct CommandListHeader CommandHeader;
2784 struct RequestBlock Request;
2785 struct ErrDescriptor ErrorDescriptor;
2786 };
2787 struct Command *cmd;
2788 static const size_t cmd_sz = sizeof(*cmd) +
2789 sizeof(cmd->ErrorDescriptor);
2790 dma_addr_t paddr64;
2791 uint32_t paddr32, tag;
2792 void __iomem *vaddr;
2793 int i, err;
2794
2795 vaddr = pci_ioremap_bar(pdev, 0);
2796 if (vaddr == NULL)
2797 return -ENOMEM;
2798
2799 /* The Inbound Post Queue only accepts 32-bit physical addresses for the
2800 * CCISS commands, so they must be allocated from the lower 4GiB of
2801 * memory.
2802 */
2803 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
2804 if (err) {
2805 iounmap(vaddr);
2806 return -ENOMEM;
2807 }
2808
2809 cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64);
2810 if (cmd == NULL) {
2811 iounmap(vaddr);
2812 return -ENOMEM;
2813 }
2814
2815 /* This must fit, because of the 32-bit consistent DMA mask. Also,
2816 * although there's no guarantee, we assume that the address is at
2817 * least 4-byte aligned (most likely, it's page-aligned).
2818 */
2819 paddr32 = paddr64;
2820
2821 cmd->CommandHeader.ReplyQueue = 0;
2822 cmd->CommandHeader.SGList = 0;
2823 cmd->CommandHeader.SGTotal = 0;
2824 cmd->CommandHeader.Tag.lower = paddr32;
2825 cmd->CommandHeader.Tag.upper = 0;
2826 memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8);
2827
2828 cmd->Request.CDBLen = 16;
2829 cmd->Request.Type.Type = TYPE_MSG;
2830 cmd->Request.Type.Attribute = ATTR_HEADOFQUEUE;
2831 cmd->Request.Type.Direction = XFER_NONE;
2832 cmd->Request.Timeout = 0; /* Don't time out */
2833 cmd->Request.CDB[0] = opcode;
2834 cmd->Request.CDB[1] = type;
2835 memset(&cmd->Request.CDB[2], 0, 14); /* rest of the CDB is reserved */
2836 cmd->ErrorDescriptor.Addr.lower = paddr32 + sizeof(*cmd);
2837 cmd->ErrorDescriptor.Addr.upper = 0;
2838 cmd->ErrorDescriptor.Len = sizeof(struct ErrorInfo);
2839
2840 writel(paddr32, vaddr + SA5_REQUEST_PORT_OFFSET);
2841
2842 for (i = 0; i < HPSA_MSG_SEND_RETRY_LIMIT; i++) {
2843 tag = readl(vaddr + SA5_REPLY_PORT_OFFSET);
2844 if (HPSA_TAG_DISCARD_ERROR_BITS(tag) == paddr32)
2845 break;
2846 msleep(HPSA_MSG_SEND_RETRY_INTERVAL_MSECS);
2847 }
2848
2849 iounmap(vaddr);
2850
2851 /* we leak the DMA buffer here ... no choice since the controller could
2852 * still complete the command.
2853 */
2854 if (i == HPSA_MSG_SEND_RETRY_LIMIT) {
2855 dev_err(&pdev->dev, "controller message %02x:%02x timed out\n",
2856 opcode, type);
2857 return -ETIMEDOUT;
2858 }
2859
2860 pci_free_consistent(pdev, cmd_sz, cmd, paddr64);
2861
2862 if (tag & HPSA_ERROR_BIT) {
2863 dev_err(&pdev->dev, "controller message %02x:%02x failed\n",
2864 opcode, type);
2865 return -EIO;
2866 }
2867
2868 dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n",
2869 opcode, type);
2870 return 0;
2871}
2872
2873#define hpsa_soft_reset_controller(p) hpsa_message(p, 1, 0)
2874#define hpsa_noop(p) hpsa_message(p, 3, 0)
2875
2876static __devinit int hpsa_reset_msi(struct pci_dev *pdev)
2877{
2878/* the #defines are stolen from drivers/pci/msi.h. */
2879#define msi_control_reg(base) (base + PCI_MSI_FLAGS)
2880#define PCI_MSIX_FLAGS_ENABLE (1 << 15)
2881
2882 int pos;
2883 u16 control = 0;
2884
2885 pos = pci_find_capability(pdev, PCI_CAP_ID_MSI);
2886 if (pos) {
2887 pci_read_config_word(pdev, msi_control_reg(pos), &control);
2888 if (control & PCI_MSI_FLAGS_ENABLE) {
2889 dev_info(&pdev->dev, "resetting MSI\n");
2890 pci_write_config_word(pdev, msi_control_reg(pos),
2891 control & ~PCI_MSI_FLAGS_ENABLE);
2892 }
2893 }
2894
2895 pos = pci_find_capability(pdev, PCI_CAP_ID_MSIX);
2896 if (pos) {
2897 pci_read_config_word(pdev, msi_control_reg(pos), &control);
2898 if (control & PCI_MSIX_FLAGS_ENABLE) {
2899 dev_info(&pdev->dev, "resetting MSI-X\n");
2900 pci_write_config_word(pdev, msi_control_reg(pos),
2901 control & ~PCI_MSIX_FLAGS_ENABLE);
2902 }
2903 }
2904
2905 return 0;
2906}
2907
2908/* This does a hard reset of the controller using PCI power management
2909 * states.
2910 */
2911static __devinit int hpsa_hard_reset_controller(struct pci_dev *pdev)
2912{
2913 u16 pmcsr, saved_config_space[32];
2914 int i, pos;
2915
2916 dev_info(&pdev->dev, "using PCI PM to reset controller\n");
2917
2918 /* This is very nearly the same thing as
2919 *
2920 * pci_save_state(pci_dev);
2921 * pci_set_power_state(pci_dev, PCI_D3hot);
2922 * pci_set_power_state(pci_dev, PCI_D0);
2923 * pci_restore_state(pci_dev);
2924 *
2925 * but we can't use these nice canned kernel routines on
2926 * kexec, because they also check the MSI/MSI-X state in PCI
2927 * configuration space and do the wrong thing when it is
2928 * set/cleared. Also, the pci_save/restore_state functions
2929 * violate the ordering requirements for restoring the
2930 * configuration space from the CCISS document (see the
2931 * comment below). So we roll our own ....
2932 */
2933
2934 for (i = 0; i < 32; i++)
2935 pci_read_config_word(pdev, 2*i, &saved_config_space[i]);
2936
2937 pos = pci_find_capability(pdev, PCI_CAP_ID_PM);
2938 if (pos == 0) {
2939 dev_err(&pdev->dev,
2940 "hpsa_reset_controller: PCI PM not supported\n");
2941 return -ENODEV;
2942 }
2943
2944 /* Quoting from the Open CISS Specification: "The Power
2945 * Management Control/Status Register (CSR) controls the power
2946 * state of the device. The normal operating state is D0,
2947 * CSR=00h. The software off state is D3, CSR=03h. To reset
2948 * the controller, place the interface device in D3 then to
2949 * D0, this causes a secondary PCI reset which will reset the
2950 * controller."
2951 */
2952
2953 /* enter the D3hot power management state */
2954 pci_read_config_word(pdev, pos + PCI_PM_CTRL, &pmcsr);
2955 pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
2956 pmcsr |= PCI_D3hot;
2957 pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
2958
2959 msleep(500);
2960
2961 /* enter the D0 power management state */
2962 pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
2963 pmcsr |= PCI_D0;
2964 pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
2965
2966 msleep(500);
2967
2968 /* Restore the PCI configuration space. The Open CISS
2969 * Specification says, "Restore the PCI Configuration
2970 * Registers, offsets 00h through 60h. It is important to
2971 * restore the command register, 16-bits at offset 04h,
2972 * last. Do not restore the configuration status register,
2973 * 16-bits at offset 06h." Note that the offset is 2*i.
2974 */
2975 for (i = 0; i < 32; i++) {
2976 if (i == 2 || i == 3)
2977 continue;
2978 pci_write_config_word(pdev, 2*i, saved_config_space[i]);
2979 }
2980 wmb();
2981 pci_write_config_word(pdev, 4, saved_config_space[2]);
2982
2983 return 0;
2984}
2985
2986/*
2987 * We cannot read the structure directly, for portability we must use
2988 * the io functions.
2989 * This is for debug only.
2990 */
2991#ifdef HPSA_DEBUG
2992static void print_cfg_table(struct device *dev, struct CfgTable *tb)
2993{
2994 int i;
2995 char temp_name[17];
2996
2997 dev_info(dev, "Controller Configuration information\n");
2998 dev_info(dev, "------------------------------------\n");
2999 for (i = 0; i < 4; i++)
3000 temp_name[i] = readb(&(tb->Signature[i]));
3001 temp_name[4] = '\0';
3002 dev_info(dev, " Signature = %s\n", temp_name);
3003 dev_info(dev, " Spec Number = %d\n", readl(&(tb->SpecValence)));
3004 dev_info(dev, " Transport methods supported = 0x%x\n",
3005 readl(&(tb->TransportSupport)));
3006 dev_info(dev, " Transport methods active = 0x%x\n",
3007 readl(&(tb->TransportActive)));
3008 dev_info(dev, " Requested transport Method = 0x%x\n",
3009 readl(&(tb->HostWrite.TransportRequest)));
3010 dev_info(dev, " Coalesce Interrupt Delay = 0x%x\n",
3011 readl(&(tb->HostWrite.CoalIntDelay)));
3012 dev_info(dev, " Coalesce Interrupt Count = 0x%x\n",
3013 readl(&(tb->HostWrite.CoalIntCount)));
3014 dev_info(dev, " Max outstanding commands = 0x%d\n",
3015 readl(&(tb->CmdsOutMax)));
3016 dev_info(dev, " Bus Types = 0x%x\n", readl(&(tb->BusTypes)));
3017 for (i = 0; i < 16; i++)
3018 temp_name[i] = readb(&(tb->ServerName[i]));
3019 temp_name[16] = '\0';
3020 dev_info(dev, " Server Name = %s\n", temp_name);
3021 dev_info(dev, " Heartbeat Counter = 0x%x\n\n\n",
3022 readl(&(tb->HeartBeat)));
3023}
3024#endif /* HPSA_DEBUG */
3025
3026static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr)
3027{
3028 int i, offset, mem_type, bar_type;
3029
3030 if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */
3031 return 0;
3032 offset = 0;
3033 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
3034 bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE;
3035 if (bar_type == PCI_BASE_ADDRESS_SPACE_IO)
3036 offset += 4;
3037 else {
3038 mem_type = pci_resource_flags(pdev, i) &
3039 PCI_BASE_ADDRESS_MEM_TYPE_MASK;
3040 switch (mem_type) {
3041 case PCI_BASE_ADDRESS_MEM_TYPE_32:
3042 case PCI_BASE_ADDRESS_MEM_TYPE_1M:
3043 offset += 4; /* 32 bit */
3044 break;
3045 case PCI_BASE_ADDRESS_MEM_TYPE_64:
3046 offset += 8;
3047 break;
3048 default: /* reserved in PCI 2.2 */
3049 dev_warn(&pdev->dev,
3050 "base address is invalid\n");
3051 return -1;
3052 break;
3053 }
3054 }
3055 if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0)
3056 return i + 1;
3057 }
3058 return -1;
3059}
3060
3061/* If MSI/MSI-X is supported by the kernel we will try to enable it on
3062 * controllers that are capable. If not, we use IO-APIC mode.
3063 */
3064
3065static void __devinit hpsa_interrupt_mode(struct ctlr_info *h,
3066 struct pci_dev *pdev, __u32 board_id)
3067{
3068#ifdef CONFIG_PCI_MSI
3069 int err;
3070 struct msix_entry hpsa_msix_entries[4] = { {0, 0}, {0, 1},
3071 {0, 2}, {0, 3}
3072 };
3073
3074 /* Some boards advertise MSI but don't really support it */
3075 if ((board_id == 0x40700E11) ||
3076 (board_id == 0x40800E11) ||
3077 (board_id == 0x40820E11) || (board_id == 0x40830E11))
3078 goto default_int_mode;
3079 if (pci_find_capability(pdev, PCI_CAP_ID_MSIX)) {
3080 dev_info(&pdev->dev, "MSIX\n");
3081 err = pci_enable_msix(pdev, hpsa_msix_entries, 4);
3082 if (!err) {
3083 h->intr[0] = hpsa_msix_entries[0].vector;
3084 h->intr[1] = hpsa_msix_entries[1].vector;
3085 h->intr[2] = hpsa_msix_entries[2].vector;
3086 h->intr[3] = hpsa_msix_entries[3].vector;
3087 h->msix_vector = 1;
3088 return;
3089 }
3090 if (err > 0) {
3091 dev_warn(&pdev->dev, "only %d MSI-X vectors "
3092 "available\n", err);
3093 goto default_int_mode;
3094 } else {
3095 dev_warn(&pdev->dev, "MSI-X init failed %d\n",
3096 err);
3097 goto default_int_mode;
3098 }
3099 }
3100 if (pci_find_capability(pdev, PCI_CAP_ID_MSI)) {
3101 dev_info(&pdev->dev, "MSI\n");
3102 if (!pci_enable_msi(pdev))
3103 h->msi_vector = 1;
3104 else
3105 dev_warn(&pdev->dev, "MSI init failed\n");
3106 }
3107default_int_mode:
3108#endif /* CONFIG_PCI_MSI */
3109 /* if we get here we're going to use the default interrupt mode */
3110 h->intr[SIMPLE_MODE_INT] = pdev->irq;
3111 return;
3112}
3113
3114static int hpsa_pci_init(struct ctlr_info *h, struct pci_dev *pdev)
3115{
3116 ushort subsystem_vendor_id, subsystem_device_id, command;
3117 __u32 board_id, scratchpad = 0;
3118 __u64 cfg_offset;
3119 __u32 cfg_base_addr;
3120 __u64 cfg_base_addr_index;
3121 int i, prod_index, err;
3122
3123 subsystem_vendor_id = pdev->subsystem_vendor;
3124 subsystem_device_id = pdev->subsystem_device;
3125 board_id = (((__u32) (subsystem_device_id << 16) & 0xffff0000) |
3126 subsystem_vendor_id);
3127
3128 for (i = 0; i < ARRAY_SIZE(products); i++)
3129 if (board_id == products[i].board_id)
3130 break;
3131
3132 prod_index = i;
3133
3134 if (prod_index == ARRAY_SIZE(products)) {
3135 prod_index--;
3136 if (subsystem_vendor_id != PCI_VENDOR_ID_HP ||
3137 !hpsa_allow_any) {
3138 dev_warn(&pdev->dev, "unrecognized board ID:"
3139 " 0x%08lx, ignoring.\n",
3140 (unsigned long) board_id);
3141 return -ENODEV;
3142 }
3143 }
3144 /* check to see if controller has been disabled
3145 * BEFORE trying to enable it
3146 */
3147 (void)pci_read_config_word(pdev, PCI_COMMAND, &command);
3148 if (!(command & 0x02)) {
3149 dev_warn(&pdev->dev, "controller appears to be disabled\n");
3150 return -ENODEV;
3151 }
3152
3153 err = pci_enable_device(pdev);
3154 if (err) {
3155 dev_warn(&pdev->dev, "unable to enable PCI device\n");
3156 return err;
3157 }
3158
3159 err = pci_request_regions(pdev, "hpsa");
3160 if (err) {
3161 dev_err(&pdev->dev, "cannot obtain PCI resources, aborting\n");
3162 return err;
3163 }
3164
3165 /* If the kernel supports MSI/MSI-X we will try to enable that,
3166 * else we use the IO-APIC interrupt assigned to us by system ROM.
3167 */
3168 hpsa_interrupt_mode(h, pdev, board_id);
3169
3170 /* find the memory BAR */
3171 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
3172 if (pci_resource_flags(pdev, i) & IORESOURCE_MEM)
3173 break;
3174 }
3175 if (i == DEVICE_COUNT_RESOURCE) {
3176 dev_warn(&pdev->dev, "no memory BAR found\n");
3177 err = -ENODEV;
3178 goto err_out_free_res;
3179 }
3180
3181 h->paddr = pci_resource_start(pdev, i); /* addressing mode bits
3182 * already removed
3183 */
3184
3185 h->vaddr = remap_pci_mem(h->paddr, 0x250);
3186
3187 /* Wait for the board to become ready. */
3188 for (i = 0; i < HPSA_BOARD_READY_ITERATIONS; i++) {
3189 scratchpad = readl(h->vaddr + SA5_SCRATCHPAD_OFFSET);
3190 if (scratchpad == HPSA_FIRMWARE_READY)
3191 break;
3192 msleep(HPSA_BOARD_READY_POLL_INTERVAL_MSECS);
3193 }
3194 if (scratchpad != HPSA_FIRMWARE_READY) {
3195 dev_warn(&pdev->dev, "board not ready, timed out.\n");
3196 err = -ENODEV;
3197 goto err_out_free_res;
3198 }
3199
3200 /* get the address index number */
3201 cfg_base_addr = readl(h->vaddr + SA5_CTCFG_OFFSET);
3202 cfg_base_addr &= (__u32) 0x0000ffff;
3203 cfg_base_addr_index = find_PCI_BAR_index(pdev, cfg_base_addr);
3204 if (cfg_base_addr_index == -1) {
3205 dev_warn(&pdev->dev, "cannot find cfg_base_addr_index\n");
3206 err = -ENODEV;
3207 goto err_out_free_res;
3208 }
3209
3210 cfg_offset = readl(h->vaddr + SA5_CTMEM_OFFSET);
3211 h->cfgtable = remap_pci_mem(pci_resource_start(pdev,
3212 cfg_base_addr_index) + cfg_offset,
3213 sizeof(h->cfgtable));
3214 h->board_id = board_id;
3215
3216 /* Query controller for max supported commands: */
3217 h->max_commands = readl(&(h->cfgtable->CmdsOutMax));
3218
3219 h->product_name = products[prod_index].product_name;
3220 h->access = *(products[prod_index].access);
3221 /* Allow room for some ioctls */
3222 h->nr_cmds = h->max_commands - 4;
3223
3224 if ((readb(&h->cfgtable->Signature[0]) != 'C') ||
3225 (readb(&h->cfgtable->Signature[1]) != 'I') ||
3226 (readb(&h->cfgtable->Signature[2]) != 'S') ||
3227 (readb(&h->cfgtable->Signature[3]) != 'S')) {
3228 dev_warn(&pdev->dev, "not a valid CISS config table\n");
3229 err = -ENODEV;
3230 goto err_out_free_res;
3231 }
3232#ifdef CONFIG_X86
3233 {
3234 /* Need to enable prefetch in the SCSI core for 6400 in x86 */
3235 __u32 prefetch;
3236 prefetch = readl(&(h->cfgtable->SCSI_Prefetch));
3237 prefetch |= 0x100;
3238 writel(prefetch, &(h->cfgtable->SCSI_Prefetch));
3239 }
3240#endif
3241
3242 /* Disabling DMA prefetch for the P600
3243 * An ASIC bug may result in a prefetch beyond
3244 * physical memory.
3245 */
3246 if (board_id == 0x3225103C) {
3247 __u32 dma_prefetch;
3248 dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG);
3249 dma_prefetch |= 0x8000;
3250 writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG);
3251 }
3252
3253 h->max_commands = readl(&(h->cfgtable->CmdsOutMax));
3254 /* Update the field, and then ring the doorbell */
3255 writel(CFGTBL_Trans_Simple, &(h->cfgtable->HostWrite.TransportRequest));
3256 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
3257
3258 /* under certain very rare conditions, this can take awhile.
3259 * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right
3260 * as we enter this code.)
3261 */
3262 for (i = 0; i < MAX_CONFIG_WAIT; i++) {
3263 if (!(readl(h->vaddr + SA5_DOORBELL) & CFGTBL_ChangeReq))
3264 break;
3265 /* delay and try again */
3266 msleep(10);
3267 }
3268
3269#ifdef HPSA_DEBUG
3270 print_cfg_table(&pdev->dev, h->cfgtable);
3271#endif /* HPSA_DEBUG */
3272
3273 if (!(readl(&(h->cfgtable->TransportActive)) & CFGTBL_Trans_Simple)) {
3274 dev_warn(&pdev->dev, "unable to get board into simple mode\n");
3275 err = -ENODEV;
3276 goto err_out_free_res;
3277 }
3278 return 0;
3279
3280err_out_free_res:
3281 /*
3282 * Deliberately omit pci_disable_device(): it does something nasty to
3283 * Smart Array controllers that pci_enable_device does not undo
3284 */
3285 pci_release_regions(pdev);
3286 return err;
3287}
3288
3289static int __devinit hpsa_init_one(struct pci_dev *pdev,
3290 const struct pci_device_id *ent)
3291{
3292 int i;
3293 int dac;
3294 struct ctlr_info *h;
3295
3296 if (number_of_controllers == 0)
3297 printk(KERN_INFO DRIVER_NAME "\n");
3298 if (reset_devices) {
3299 /* Reset the controller with a PCI power-cycle */
3300 if (hpsa_hard_reset_controller(pdev) || hpsa_reset_msi(pdev))
3301 return -ENODEV;
3302
3303 /* Some devices (notably the HP Smart Array 5i Controller)
3304 need a little pause here */
3305 msleep(HPSA_POST_RESET_PAUSE_MSECS);
3306
3307 /* Now try to get the controller to respond to a no-op */
3308 for (i = 0; i < HPSA_POST_RESET_NOOP_RETRIES; i++) {
3309 if (hpsa_noop(pdev) == 0)
3310 break;
3311 else
3312 dev_warn(&pdev->dev, "no-op failed%s\n",
3313 (i < 11 ? "; re-trying" : ""));
3314 }
3315 }
3316
3317 BUILD_BUG_ON(sizeof(struct CommandList) % 8);
3318 h = kzalloc(sizeof(*h), GFP_KERNEL);
3319 if (!h)
3320 return -1;
3321
3322 h->busy_initializing = 1;
3323 INIT_HLIST_HEAD(&h->cmpQ);
3324 INIT_HLIST_HEAD(&h->reqQ);
3325 mutex_init(&h->busy_shutting_down);
3326 init_completion(&h->scan_wait);
3327 if (hpsa_pci_init(h, pdev) != 0)
3328 goto clean1;
3329
3330 sprintf(h->devname, "hpsa%d", number_of_controllers);
3331 h->ctlr = number_of_controllers;
3332 number_of_controllers++;
3333 h->pdev = pdev;
3334
3335 /* configure PCI DMA stuff */
3336 if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(64)))
3337 dac = 1;
3338 else if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32)))
3339 dac = 0;
3340 else {
3341 dev_err(&pdev->dev, "no suitable DMA available\n");
3342 goto clean1;
3343 }
3344
3345 /* make sure the board interrupts are off */
3346 h->access.set_intr_mask(h, HPSA_INTR_OFF);
3347 if (request_irq(h->intr[SIMPLE_MODE_INT], do_hpsa_intr,
3348 IRQF_DISABLED | IRQF_SHARED, h->devname, h)) {
3349 dev_err(&pdev->dev, "unable to get irq %d for %s\n",
3350 h->intr[SIMPLE_MODE_INT], h->devname);
3351 goto clean2;
3352 }
3353
3354 dev_info(&pdev->dev, "%s: <0x%x> at PCI %s IRQ %d%s using DAC\n",
3355 h->devname, pdev->device, pci_name(pdev),
3356 h->intr[SIMPLE_MODE_INT], dac ? "" : " not");
3357
3358 h->cmd_pool_bits =
3359 kmalloc(((h->nr_cmds + BITS_PER_LONG -
3360 1) / BITS_PER_LONG) * sizeof(unsigned long), GFP_KERNEL);
3361 h->cmd_pool = pci_alloc_consistent(h->pdev,
3362 h->nr_cmds * sizeof(*h->cmd_pool),
3363 &(h->cmd_pool_dhandle));
3364 h->errinfo_pool = pci_alloc_consistent(h->pdev,
3365 h->nr_cmds * sizeof(*h->errinfo_pool),
3366 &(h->errinfo_pool_dhandle));
3367 if ((h->cmd_pool_bits == NULL)
3368 || (h->cmd_pool == NULL)
3369 || (h->errinfo_pool == NULL)) {
3370 dev_err(&pdev->dev, "out of memory");
3371 goto clean4;
3372 }
3373 spin_lock_init(&h->lock);
3374
3375 pci_set_drvdata(pdev, h);
3376 memset(h->cmd_pool_bits, 0,
3377 ((h->nr_cmds + BITS_PER_LONG -
3378 1) / BITS_PER_LONG) * sizeof(unsigned long));
3379
3380 hpsa_scsi_setup(h);
3381
3382 /* Turn the interrupts on so we can service requests */
3383 h->access.set_intr_mask(h, HPSA_INTR_ON);
3384
3385 hpsa_register_scsi(h); /* hook ourselves into SCSI subsystem */
3386 h->busy_initializing = 0;
3387 return 1;
3388
3389clean4:
3390 kfree(h->cmd_pool_bits);
3391 if (h->cmd_pool)
3392 pci_free_consistent(h->pdev,
3393 h->nr_cmds * sizeof(struct CommandList),
3394 h->cmd_pool, h->cmd_pool_dhandle);
3395 if (h->errinfo_pool)
3396 pci_free_consistent(h->pdev,
3397 h->nr_cmds * sizeof(struct ErrorInfo),
3398 h->errinfo_pool,
3399 h->errinfo_pool_dhandle);
3400 free_irq(h->intr[SIMPLE_MODE_INT], h);
3401clean2:
3402clean1:
3403 h->busy_initializing = 0;
3404 kfree(h);
3405 return -1;
3406}
3407
3408static void hpsa_flush_cache(struct ctlr_info *h)
3409{
3410 char *flush_buf;
3411 struct CommandList *c;
3412
3413 flush_buf = kzalloc(4, GFP_KERNEL);
3414 if (!flush_buf)
3415 return;
3416
3417 c = cmd_special_alloc(h);
3418 if (!c) {
3419 dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
3420 goto out_of_memory;
3421 }
3422 fill_cmd(c, HPSA_CACHE_FLUSH, h, flush_buf, 4, 0,
3423 RAID_CTLR_LUNID, TYPE_CMD);
3424 hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_TODEVICE);
3425 if (c->err_info->CommandStatus != 0)
3426 dev_warn(&h->pdev->dev,
3427 "error flushing cache on controller\n");
3428 cmd_special_free(h, c);
3429out_of_memory:
3430 kfree(flush_buf);
3431}
3432
3433static void hpsa_shutdown(struct pci_dev *pdev)
3434{
3435 struct ctlr_info *h;
3436
3437 h = pci_get_drvdata(pdev);
3438 /* Turn board interrupts off and send the flush cache command
3439 * sendcmd will turn off interrupt, and send the flush...
3440 * To write all data in the battery backed cache to disks
3441 */
3442 hpsa_flush_cache(h);
3443 h->access.set_intr_mask(h, HPSA_INTR_OFF);
3444 free_irq(h->intr[2], h);
3445#ifdef CONFIG_PCI_MSI
3446 if (h->msix_vector)
3447 pci_disable_msix(h->pdev);
3448 else if (h->msi_vector)
3449 pci_disable_msi(h->pdev);
3450#endif /* CONFIG_PCI_MSI */
3451}
3452
3453static void __devexit hpsa_remove_one(struct pci_dev *pdev)
3454{
3455 struct ctlr_info *h;
3456
3457 if (pci_get_drvdata(pdev) == NULL) {
3458 dev_err(&pdev->dev, "unable to remove device \n");
3459 return;
3460 }
3461 h = pci_get_drvdata(pdev);
3462 mutex_lock(&h->busy_shutting_down);
3463 remove_from_scan_list(h);
3464 hpsa_unregister_scsi(h); /* unhook from SCSI subsystem */
3465 hpsa_shutdown(pdev);
3466 iounmap(h->vaddr);
3467 pci_free_consistent(h->pdev,
3468 h->nr_cmds * sizeof(struct CommandList),
3469 h->cmd_pool, h->cmd_pool_dhandle);
3470 pci_free_consistent(h->pdev,
3471 h->nr_cmds * sizeof(struct ErrorInfo),
3472 h->errinfo_pool, h->errinfo_pool_dhandle);
3473 kfree(h->cmd_pool_bits);
3474 /*
3475 * Deliberately omit pci_disable_device(): it does something nasty to
3476 * Smart Array controllers that pci_enable_device does not undo
3477 */
3478 pci_release_regions(pdev);
3479 pci_set_drvdata(pdev, NULL);
3480 mutex_unlock(&h->busy_shutting_down);
3481 kfree(h);
3482}
3483
3484static int hpsa_suspend(__attribute__((unused)) struct pci_dev *pdev,
3485 __attribute__((unused)) pm_message_t state)
3486{
3487 return -ENOSYS;
3488}
3489
3490static int hpsa_resume(__attribute__((unused)) struct pci_dev *pdev)
3491{
3492 return -ENOSYS;
3493}
3494
3495static struct pci_driver hpsa_pci_driver = {
3496 .name = "hpsa",
3497 .probe = hpsa_init_one,
3498 .remove = __devexit_p(hpsa_remove_one),
3499 .id_table = hpsa_pci_device_id, /* id_table */
3500 .shutdown = hpsa_shutdown,
3501 .suspend = hpsa_suspend,
3502 .resume = hpsa_resume,
3503};
3504
3505/*
3506 * This is it. Register the PCI driver information for the cards we control
3507 * the OS will call our registered routines when it finds one of our cards.
3508 */
3509static int __init hpsa_init(void)
3510{
3511 int err;
3512 /* Start the scan thread */
3513 hpsa_scan_thread = kthread_run(hpsa_scan_func, NULL, "hpsa_scan");
3514 if (IS_ERR(hpsa_scan_thread)) {
3515 err = PTR_ERR(hpsa_scan_thread);
3516 return -ENODEV;
3517 }
3518 err = pci_register_driver(&hpsa_pci_driver);
3519 if (err)
3520 kthread_stop(hpsa_scan_thread);
3521 return err;
3522}
3523
3524static void __exit hpsa_cleanup(void)
3525{
3526 pci_unregister_driver(&hpsa_pci_driver);
3527 kthread_stop(hpsa_scan_thread);
3528}
3529
3530module_init(hpsa_init);
3531module_exit(hpsa_cleanup);
diff --git a/drivers/scsi/hpsa.h b/drivers/scsi/hpsa.h
new file mode 100644
index 000000000000..6bd1949144b5
--- /dev/null
+++ b/drivers/scsi/hpsa.h
@@ -0,0 +1,273 @@
1/*
2 * Disk Array driver for HP Smart Array SAS controllers
3 * Copyright 2000, 2009 Hewlett-Packard Development Company, L.P.
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; version 2 of the License.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
12 * NON INFRINGEMENT. See the GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
17 *
18 * Questions/Comments/Bugfixes to iss_storagedev@hp.com
19 *
20 */
21#ifndef HPSA_H
22#define HPSA_H
23
24#include <scsi/scsicam.h>
25
26#define IO_OK 0
27#define IO_ERROR 1
28
29struct ctlr_info;
30
31struct access_method {
32 void (*submit_command)(struct ctlr_info *h,
33 struct CommandList *c);
34 void (*set_intr_mask)(struct ctlr_info *h, unsigned long val);
35 unsigned long (*fifo_full)(struct ctlr_info *h);
36 unsigned long (*intr_pending)(struct ctlr_info *h);
37 unsigned long (*command_completed)(struct ctlr_info *h);
38};
39
40struct hpsa_scsi_dev_t {
41 int devtype;
42 int bus, target, lun; /* as presented to the OS */
43 unsigned char scsi3addr[8]; /* as presented to the HW */
44#define RAID_CTLR_LUNID "\0\0\0\0\0\0\0\0"
45 unsigned char device_id[16]; /* from inquiry pg. 0x83 */
46 unsigned char vendor[8]; /* bytes 8-15 of inquiry data */
47 unsigned char model[16]; /* bytes 16-31 of inquiry data */
48 unsigned char revision[4]; /* bytes 32-35 of inquiry data */
49 unsigned char raid_level; /* from inquiry page 0xC1 */
50};
51
52struct ctlr_info {
53 int ctlr;
54 char devname[8];
55 char *product_name;
56 char firm_ver[4]; /* Firmware version */
57 struct pci_dev *pdev;
58 __u32 board_id;
59 void __iomem *vaddr;
60 unsigned long paddr;
61 int nr_cmds; /* Number of commands allowed on this controller */
62 struct CfgTable __iomem *cfgtable;
63 int interrupts_enabled;
64 int major;
65 int max_commands;
66 int commands_outstanding;
67 int max_outstanding; /* Debug */
68 int usage_count; /* number of opens all all minor devices */
69# define DOORBELL_INT 0
70# define PERF_MODE_INT 1
71# define SIMPLE_MODE_INT 2
72# define MEMQ_MODE_INT 3
73 unsigned int intr[4];
74 unsigned int msix_vector;
75 unsigned int msi_vector;
76 struct access_method access;
77
78 /* queue and queue Info */
79 struct hlist_head reqQ;
80 struct hlist_head cmpQ;
81 unsigned int Qdepth;
82 unsigned int maxQsinceinit;
83 unsigned int maxSG;
84 spinlock_t lock;
85
86 /* pointers to command and error info pool */
87 struct CommandList *cmd_pool;
88 dma_addr_t cmd_pool_dhandle;
89 struct ErrorInfo *errinfo_pool;
90 dma_addr_t errinfo_pool_dhandle;
91 unsigned long *cmd_pool_bits;
92 int nr_allocs;
93 int nr_frees;
94 int busy_initializing;
95 int busy_scanning;
96 struct mutex busy_shutting_down;
97 struct list_head scan_list;
98 struct completion scan_wait;
99
100 struct Scsi_Host *scsi_host;
101 spinlock_t devlock; /* to protect hba[ctlr]->dev[]; */
102 int ndevices; /* number of used elements in .dev[] array. */
103#define HPSA_MAX_SCSI_DEVS_PER_HBA 256
104 struct hpsa_scsi_dev_t *dev[HPSA_MAX_SCSI_DEVS_PER_HBA];
105};
106#define HPSA_ABORT_MSG 0
107#define HPSA_DEVICE_RESET_MSG 1
108#define HPSA_BUS_RESET_MSG 2
109#define HPSA_HOST_RESET_MSG 3
110#define HPSA_MSG_SEND_RETRY_LIMIT 10
111#define HPSA_MSG_SEND_RETRY_INTERVAL_MSECS 1000
112
113/* Maximum time in seconds driver will wait for command completions
114 * when polling before giving up.
115 */
116#define HPSA_MAX_POLL_TIME_SECS (20)
117
118/* During SCSI error recovery, HPSA_TUR_RETRY_LIMIT defines
119 * how many times to retry TEST UNIT READY on a device
120 * while waiting for it to become ready before giving up.
121 * HPSA_MAX_WAIT_INTERVAL_SECS is the max wait interval
122 * between sending TURs while waiting for a device
123 * to become ready.
124 */
125#define HPSA_TUR_RETRY_LIMIT (20)
126#define HPSA_MAX_WAIT_INTERVAL_SECS (30)
127
128/* HPSA_BOARD_READY_WAIT_SECS is how long to wait for a board
129 * to become ready, in seconds, before giving up on it.
130 * HPSA_BOARD_READY_POLL_INTERVAL_MSECS * is how long to wait
131 * between polling the board to see if it is ready, in
132 * milliseconds. HPSA_BOARD_READY_POLL_INTERVAL and
133 * HPSA_BOARD_READY_ITERATIONS are derived from those.
134 */
135#define HPSA_BOARD_READY_WAIT_SECS (120)
136#define HPSA_BOARD_READY_POLL_INTERVAL_MSECS (100)
137#define HPSA_BOARD_READY_POLL_INTERVAL \
138 ((HPSA_BOARD_READY_POLL_INTERVAL_MSECS * HZ) / 1000)
139#define HPSA_BOARD_READY_ITERATIONS \
140 ((HPSA_BOARD_READY_WAIT_SECS * 1000) / \
141 HPSA_BOARD_READY_POLL_INTERVAL_MSECS)
142#define HPSA_POST_RESET_PAUSE_MSECS (3000)
143#define HPSA_POST_RESET_NOOP_RETRIES (12)
144
145/* Defining the diffent access_menthods */
146/*
147 * Memory mapped FIFO interface (SMART 53xx cards)
148 */
149#define SA5_DOORBELL 0x20
150#define SA5_REQUEST_PORT_OFFSET 0x40
151#define SA5_REPLY_INTR_MASK_OFFSET 0x34
152#define SA5_REPLY_PORT_OFFSET 0x44
153#define SA5_INTR_STATUS 0x30
154#define SA5_SCRATCHPAD_OFFSET 0xB0
155
156#define SA5_CTCFG_OFFSET 0xB4
157#define SA5_CTMEM_OFFSET 0xB8
158
159#define SA5_INTR_OFF 0x08
160#define SA5B_INTR_OFF 0x04
161#define SA5_INTR_PENDING 0x08
162#define SA5B_INTR_PENDING 0x04
163#define FIFO_EMPTY 0xffffffff
164#define HPSA_FIRMWARE_READY 0xffff0000 /* value in scratchpad register */
165
166#define HPSA_ERROR_BIT 0x02
167#define HPSA_TAG_CONTAINS_INDEX(tag) ((tag) & 0x04)
168#define HPSA_TAG_TO_INDEX(tag) ((tag) >> 3)
169#define HPSA_TAG_DISCARD_ERROR_BITS(tag) ((tag) & ~3)
170
171#define HPSA_INTR_ON 1
172#define HPSA_INTR_OFF 0
173/*
174 Send the command to the hardware
175*/
176static void SA5_submit_command(struct ctlr_info *h,
177 struct CommandList *c)
178{
179#ifdef HPSA_DEBUG
180 printk(KERN_WARNING "hpsa: Sending %x - down to controller\n",
181 c->busaddr);
182#endif /* HPSA_DEBUG */
183 writel(c->busaddr, h->vaddr + SA5_REQUEST_PORT_OFFSET);
184 h->commands_outstanding++;
185 if (h->commands_outstanding > h->max_outstanding)
186 h->max_outstanding = h->commands_outstanding;
187}
188
189/*
190 * This card is the opposite of the other cards.
191 * 0 turns interrupts on...
192 * 0x08 turns them off...
193 */
194static void SA5_intr_mask(struct ctlr_info *h, unsigned long val)
195{
196 if (val) { /* Turn interrupts on */
197 h->interrupts_enabled = 1;
198 writel(0, h->vaddr + SA5_REPLY_INTR_MASK_OFFSET);
199 } else { /* Turn them off */
200 h->interrupts_enabled = 0;
201 writel(SA5_INTR_OFF,
202 h->vaddr + SA5_REPLY_INTR_MASK_OFFSET);
203 }
204}
205/*
206 * Returns true if fifo is full.
207 *
208 */
209static unsigned long SA5_fifo_full(struct ctlr_info *h)
210{
211 if (h->commands_outstanding >= h->max_commands)
212 return 1;
213 else
214 return 0;
215
216}
217/*
218 * returns value read from hardware.
219 * returns FIFO_EMPTY if there is nothing to read
220 */
221static unsigned long SA5_completed(struct ctlr_info *h)
222{
223 unsigned long register_value
224 = readl(h->vaddr + SA5_REPLY_PORT_OFFSET);
225
226 if (register_value != FIFO_EMPTY)
227 h->commands_outstanding--;
228
229#ifdef HPSA_DEBUG
230 if (register_value != FIFO_EMPTY)
231 printk(KERN_INFO "hpsa: Read %lx back from board\n",
232 register_value);
233 else
234 printk(KERN_INFO "hpsa: FIFO Empty read\n");
235#endif
236
237 return register_value;
238}
239/*
240 * Returns true if an interrupt is pending..
241 */
242static unsigned long SA5_intr_pending(struct ctlr_info *h)
243{
244 unsigned long register_value =
245 readl(h->vaddr + SA5_INTR_STATUS);
246#ifdef HPSA_DEBUG
247 printk(KERN_INFO "hpsa: intr_pending %lx\n", register_value);
248#endif /* HPSA_DEBUG */
249 if (register_value & SA5_INTR_PENDING)
250 return 1;
251 return 0 ;
252}
253
254
255static struct access_method SA5_access = {
256 SA5_submit_command,
257 SA5_intr_mask,
258 SA5_fifo_full,
259 SA5_intr_pending,
260 SA5_completed,
261};
262
263struct board_type {
264 __u32 board_id;
265 char *product_name;
266 struct access_method *access;
267};
268
269
270/* end of old hpsa_scsi.h file */
271
272#endif /* HPSA_H */
273
diff --git a/drivers/scsi/hpsa_cmd.h b/drivers/scsi/hpsa_cmd.h
new file mode 100644
index 000000000000..12d71387ed9a
--- /dev/null
+++ b/drivers/scsi/hpsa_cmd.h
@@ -0,0 +1,326 @@
1/*
2 * Disk Array driver for HP Smart Array SAS controllers
3 * Copyright 2000, 2009 Hewlett-Packard Development Company, L.P.
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; version 2 of the License.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
12 * NON INFRINGEMENT. See the GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
17 *
18 * Questions/Comments/Bugfixes to iss_storagedev@hp.com
19 *
20 */
21#ifndef HPSA_CMD_H
22#define HPSA_CMD_H
23
24/* general boundary defintions */
25#define SENSEINFOBYTES 32 /* may vary between hbas */
26#define MAXSGENTRIES 31
27#define MAXREPLYQS 256
28
29/* Command Status value */
30#define CMD_SUCCESS 0x0000
31#define CMD_TARGET_STATUS 0x0001
32#define CMD_DATA_UNDERRUN 0x0002
33#define CMD_DATA_OVERRUN 0x0003
34#define CMD_INVALID 0x0004
35#define CMD_PROTOCOL_ERR 0x0005
36#define CMD_HARDWARE_ERR 0x0006
37#define CMD_CONNECTION_LOST 0x0007
38#define CMD_ABORTED 0x0008
39#define CMD_ABORT_FAILED 0x0009
40#define CMD_UNSOLICITED_ABORT 0x000A
41#define CMD_TIMEOUT 0x000B
42#define CMD_UNABORTABLE 0x000C
43
44/* Unit Attentions ASC's as defined for the MSA2012sa */
45#define POWER_OR_RESET 0x29
46#define STATE_CHANGED 0x2a
47#define UNIT_ATTENTION_CLEARED 0x2f
48#define LUN_FAILED 0x3e
49#define REPORT_LUNS_CHANGED 0x3f
50
51/* Unit Attentions ASCQ's as defined for the MSA2012sa */
52
53 /* These ASCQ's defined for ASC = POWER_OR_RESET */
54#define POWER_ON_RESET 0x00
55#define POWER_ON_REBOOT 0x01
56#define SCSI_BUS_RESET 0x02
57#define MSA_TARGET_RESET 0x03
58#define CONTROLLER_FAILOVER 0x04
59#define TRANSCEIVER_SE 0x05
60#define TRANSCEIVER_LVD 0x06
61
62 /* These ASCQ's defined for ASC = STATE_CHANGED */
63#define RESERVATION_PREEMPTED 0x03
64#define ASYM_ACCESS_CHANGED 0x06
65#define LUN_CAPACITY_CHANGED 0x09
66
67/* transfer direction */
68#define XFER_NONE 0x00
69#define XFER_WRITE 0x01
70#define XFER_READ 0x02
71#define XFER_RSVD 0x03
72
73/* task attribute */
74#define ATTR_UNTAGGED 0x00
75#define ATTR_SIMPLE 0x04
76#define ATTR_HEADOFQUEUE 0x05
77#define ATTR_ORDERED 0x06
78#define ATTR_ACA 0x07
79
80/* cdb type */
81#define TYPE_CMD 0x00
82#define TYPE_MSG 0x01
83
84/* config space register offsets */
85#define CFG_VENDORID 0x00
86#define CFG_DEVICEID 0x02
87#define CFG_I2OBAR 0x10
88#define CFG_MEM1BAR 0x14
89
90/* i2o space register offsets */
91#define I2O_IBDB_SET 0x20
92#define I2O_IBDB_CLEAR 0x70
93#define I2O_INT_STATUS 0x30
94#define I2O_INT_MASK 0x34
95#define I2O_IBPOST_Q 0x40
96#define I2O_OBPOST_Q 0x44
97#define I2O_DMA1_CFG 0x214
98
99/* Configuration Table */
100#define CFGTBL_ChangeReq 0x00000001l
101#define CFGTBL_AccCmds 0x00000001l
102
103#define CFGTBL_Trans_Simple 0x00000002l
104
105#define CFGTBL_BusType_Ultra2 0x00000001l
106#define CFGTBL_BusType_Ultra3 0x00000002l
107#define CFGTBL_BusType_Fibre1G 0x00000100l
108#define CFGTBL_BusType_Fibre2G 0x00000200l
109struct vals32 {
110 __u32 lower;
111 __u32 upper;
112};
113
114union u64bit {
115 struct vals32 val32;
116 __u64 val;
117};
118
119/* FIXME this is a per controller value (barf!) */
120#define HPSA_MAX_TARGETS_PER_CTLR 16
121#define HPSA_MAX_LUN 256
122#define HPSA_MAX_PHYS_LUN 1024
123
124/* SCSI-3 Commands */
125#pragma pack(1)
126
127#define HPSA_INQUIRY 0x12
128struct InquiryData {
129 __u8 data_byte[36];
130};
131
132#define HPSA_REPORT_LOG 0xc2 /* Report Logical LUNs */
133#define HPSA_REPORT_PHYS 0xc3 /* Report Physical LUNs */
134struct ReportLUNdata {
135 __u8 LUNListLength[4];
136 __u32 reserved;
137 __u8 LUN[HPSA_MAX_LUN][8];
138};
139
140struct ReportExtendedLUNdata {
141 __u8 LUNListLength[4];
142 __u8 extended_response_flag;
143 __u8 reserved[3];
144 __u8 LUN[HPSA_MAX_LUN][24];
145};
146
147struct SenseSubsystem_info {
148 __u8 reserved[36];
149 __u8 portname[8];
150 __u8 reserved1[1108];
151};
152
153#define HPSA_READ_CAPACITY 0x25 /* Read Capacity */
154struct ReadCapdata {
155 __u8 total_size[4]; /* Total size in blocks */
156 __u8 block_size[4]; /* Size of blocks in bytes */
157};
158
159#if 0
160/* 12 byte commands not implemented in firmware yet. */
161#define HPSA_READ 0xa8
162#define HPSA_WRITE 0xaa
163#endif
164
165#define HPSA_READ 0x28 /* Read(10) */
166#define HPSA_WRITE 0x2a /* Write(10) */
167
168/* BMIC commands */
169#define BMIC_READ 0x26
170#define BMIC_WRITE 0x27
171#define BMIC_CACHE_FLUSH 0xc2
172#define HPSA_CACHE_FLUSH 0x01 /* C2 was already being used by HPSA */
173
174/* Command List Structure */
175union SCSI3Addr {
176 struct {
177 __u8 Dev;
178 __u8 Bus:6;
179 __u8 Mode:2; /* b00 */
180 } PeripDev;
181 struct {
182 __u8 DevLSB;
183 __u8 DevMSB:6;
184 __u8 Mode:2; /* b01 */
185 } LogDev;
186 struct {
187 __u8 Dev:5;
188 __u8 Bus:3;
189 __u8 Targ:6;
190 __u8 Mode:2; /* b10 */
191 } LogUnit;
192};
193
194struct PhysDevAddr {
195 __u32 TargetId:24;
196 __u32 Bus:6;
197 __u32 Mode:2;
198 /* 2 level target device addr */
199 union SCSI3Addr Target[2];
200};
201
202struct LogDevAddr {
203 __u32 VolId:30;
204 __u32 Mode:2;
205 __u8 reserved[4];
206};
207
208union LUNAddr {
209 __u8 LunAddrBytes[8];
210 union SCSI3Addr SCSI3Lun[4];
211 struct PhysDevAddr PhysDev;
212 struct LogDevAddr LogDev;
213};
214
215struct CommandListHeader {
216 __u8 ReplyQueue;
217 __u8 SGList;
218 __u16 SGTotal;
219 struct vals32 Tag;
220 union LUNAddr LUN;
221};
222
223struct RequestBlock {
224 __u8 CDBLen;
225 struct {
226 __u8 Type:3;
227 __u8 Attribute:3;
228 __u8 Direction:2;
229 } Type;
230 __u16 Timeout;
231 __u8 CDB[16];
232};
233
234struct ErrDescriptor {
235 struct vals32 Addr;
236 __u32 Len;
237};
238
239struct SGDescriptor {
240 struct vals32 Addr;
241 __u32 Len;
242 __u32 Ext;
243};
244
245union MoreErrInfo {
246 struct {
247 __u8 Reserved[3];
248 __u8 Type;
249 __u32 ErrorInfo;
250 } Common_Info;
251 struct {
252 __u8 Reserved[2];
253 __u8 offense_size; /* size of offending entry */
254 __u8 offense_num; /* byte # of offense 0-base */
255 __u32 offense_value;
256 } Invalid_Cmd;
257};
258struct ErrorInfo {
259 __u8 ScsiStatus;
260 __u8 SenseLen;
261 __u16 CommandStatus;
262 __u32 ResidualCnt;
263 union MoreErrInfo MoreErrInfo;
264 __u8 SenseInfo[SENSEINFOBYTES];
265};
266/* Command types */
267#define CMD_IOCTL_PEND 0x01
268#define CMD_SCSI 0x03
269
270struct ctlr_info; /* defined in hpsa.h */
271/* The size of this structure needs to be divisible by 8
272 * od on all architectures, because the controller uses 2
273 * lower bits of the address, and the driver uses 1 lower
274 * bit (3 bits total.)
275 */
276struct CommandList {
277 struct CommandListHeader Header;
278 struct RequestBlock Request;
279 struct ErrDescriptor ErrDesc;
280 struct SGDescriptor SG[MAXSGENTRIES];
281 /* information associated with the command */
282 __u32 busaddr; /* physical addr of this record */
283 struct ErrorInfo *err_info; /* pointer to the allocated mem */
284 struct ctlr_info *h;
285 int cmd_type;
286 long cmdindex;
287 struct hlist_node list;
288 struct CommandList *prev;
289 struct CommandList *next;
290 struct request *rq;
291 struct completion *waiting;
292 int retry_count;
293 void *scsi_cmd;
294};
295
296/* Configuration Table Structure */
297struct HostWrite {
298 __u32 TransportRequest;
299 __u32 Reserved;
300 __u32 CoalIntDelay;
301 __u32 CoalIntCount;
302};
303
304struct CfgTable {
305 __u8 Signature[4];
306 __u32 SpecValence;
307 __u32 TransportSupport;
308 __u32 TransportActive;
309 struct HostWrite HostWrite;
310 __u32 CmdsOutMax;
311 __u32 BusTypes;
312 __u32 Reserved;
313 __u8 ServerName[16];
314 __u32 HeartBeat;
315 __u32 SCSI_Prefetch;
316};
317
318struct hpsa_pci_info {
319 unsigned char bus;
320 unsigned char dev_fn;
321 unsigned short domain;
322 __u32 board_id;
323};
324
325#pragma pack()
326#endif /* HPSA_CMD_H */
diff --git a/drivers/scsi/ipr.c b/drivers/scsi/ipr.c
index 8643f5089361..9e52d16c7c39 100644
--- a/drivers/scsi/ipr.c
+++ b/drivers/scsi/ipr.c
@@ -6521,6 +6521,7 @@ static int ipr_reset_restore_cfg_space(struct ipr_cmnd *ipr_cmd)
6521 int rc; 6521 int rc;
6522 6522
6523 ENTER; 6523 ENTER;
6524 ioa_cfg->pdev->state_saved = true;
6524 rc = pci_restore_state(ioa_cfg->pdev); 6525 rc = pci_restore_state(ioa_cfg->pdev);
6525 6526
6526 if (rc != PCIBIOS_SUCCESSFUL) { 6527 if (rc != PCIBIOS_SUCCESSFUL) {
diff --git a/drivers/scsi/libfc/fc_exch.c b/drivers/scsi/libfc/fc_exch.c
index 19d711cb938c..7f4364770e4a 100644
--- a/drivers/scsi/libfc/fc_exch.c
+++ b/drivers/scsi/libfc/fc_exch.c
@@ -1890,7 +1890,7 @@ static struct fc_seq *fc_exch_seq_send(struct fc_lport *lport,
1890 fc_exch_setup_hdr(ep, fp, ep->f_ctl); 1890 fc_exch_setup_hdr(ep, fp, ep->f_ctl);
1891 sp->cnt++; 1891 sp->cnt++;
1892 1892
1893 if (ep->xid <= lport->lro_xid) 1893 if (ep->xid <= lport->lro_xid && fh->fh_r_ctl == FC_RCTL_DD_UNSOL_CMD)
1894 fc_fcp_ddp_setup(fr_fsp(fp), ep->xid); 1894 fc_fcp_ddp_setup(fr_fsp(fp), ep->xid);
1895 1895
1896 if (unlikely(lport->tt.frame_send(lport, fp))) 1896 if (unlikely(lport->tt.frame_send(lport, fp)))
diff --git a/drivers/scsi/libfc/fc_fcp.c b/drivers/scsi/libfc/fc_fcp.c
index c4b58d042f6f..6fde2fabfd9b 100644
--- a/drivers/scsi/libfc/fc_fcp.c
+++ b/drivers/scsi/libfc/fc_fcp.c
@@ -68,18 +68,20 @@ struct kmem_cache *scsi_pkt_cachep;
68 68
69/** 69/**
70 * struct fc_fcp_internal - FCP layer internal data 70 * struct fc_fcp_internal - FCP layer internal data
71 * @scsi_pkt_pool: Memory pool to draw FCP packets from 71 * @scsi_pkt_pool: Memory pool to draw FCP packets from
72 * @scsi_queue_lock: Protects the scsi_pkt_queue
72 * @scsi_pkt_queue: Current FCP packets 73 * @scsi_pkt_queue: Current FCP packets
73 * @last_can_queue_ramp_down_time: ramp down time 74 * @last_can_queue_ramp_down_time: ramp down time
74 * @last_can_queue_ramp_up_time: ramp up time 75 * @last_can_queue_ramp_up_time: ramp up time
75 * @max_can_queue: max can_queue size 76 * @max_can_queue: max can_queue size
76 */ 77 */
77struct fc_fcp_internal { 78struct fc_fcp_internal {
78 mempool_t *scsi_pkt_pool; 79 mempool_t *scsi_pkt_pool;
79 struct list_head scsi_pkt_queue; 80 spinlock_t scsi_queue_lock;
80 unsigned long last_can_queue_ramp_down_time; 81 struct list_head scsi_pkt_queue;
81 unsigned long last_can_queue_ramp_up_time; 82 unsigned long last_can_queue_ramp_down_time;
82 int max_can_queue; 83 unsigned long last_can_queue_ramp_up_time;
84 int max_can_queue;
83}; 85};
84 86
85#define fc_get_scsi_internal(x) ((struct fc_fcp_internal *)(x)->scsi_priv) 87#define fc_get_scsi_internal(x) ((struct fc_fcp_internal *)(x)->scsi_priv)
@@ -296,9 +298,6 @@ void fc_fcp_ddp_setup(struct fc_fcp_pkt *fsp, u16 xid)
296{ 298{
297 struct fc_lport *lport; 299 struct fc_lport *lport;
298 300
299 if (!fsp)
300 return;
301
302 lport = fsp->lp; 301 lport = fsp->lp;
303 if ((fsp->req_flags & FC_SRB_READ) && 302 if ((fsp->req_flags & FC_SRB_READ) &&
304 (lport->lro_enabled) && (lport->tt.ddp_setup)) { 303 (lport->lro_enabled) && (lport->tt.ddp_setup)) {
@@ -410,12 +409,14 @@ static inline struct fc_frame *fc_fcp_frame_alloc(struct fc_lport *lport,
410 unsigned long flags; 409 unsigned long flags;
411 410
412 fp = fc_frame_alloc(lport, len); 411 fp = fc_frame_alloc(lport, len);
413 if (!fp) { 412 if (likely(fp))
414 spin_lock_irqsave(lport->host->host_lock, flags); 413 return fp;
415 fc_fcp_can_queue_ramp_down(lport); 414
416 spin_unlock_irqrestore(lport->host->host_lock, flags); 415 /* error case */
417 } 416 spin_lock_irqsave(lport->host->host_lock, flags);
418 return fp; 417 fc_fcp_can_queue_ramp_down(lport);
418 spin_unlock_irqrestore(lport->host->host_lock, flags);
419 return NULL;
419} 420}
420 421
421/** 422/**
@@ -990,7 +991,7 @@ static void fc_fcp_cleanup_each_cmd(struct fc_lport *lport, unsigned int id,
990 struct scsi_cmnd *sc_cmd; 991 struct scsi_cmnd *sc_cmd;
991 unsigned long flags; 992 unsigned long flags;
992 993
993 spin_lock_irqsave(lport->host->host_lock, flags); 994 spin_lock_irqsave(&si->scsi_queue_lock, flags);
994restart: 995restart:
995 list_for_each_entry(fsp, &si->scsi_pkt_queue, list) { 996 list_for_each_entry(fsp, &si->scsi_pkt_queue, list) {
996 sc_cmd = fsp->cmd; 997 sc_cmd = fsp->cmd;
@@ -1001,7 +1002,7 @@ restart:
1001 continue; 1002 continue;
1002 1003
1003 fc_fcp_pkt_hold(fsp); 1004 fc_fcp_pkt_hold(fsp);
1004 spin_unlock_irqrestore(lport->host->host_lock, flags); 1005 spin_unlock_irqrestore(&si->scsi_queue_lock, flags);
1005 1006
1006 if (!fc_fcp_lock_pkt(fsp)) { 1007 if (!fc_fcp_lock_pkt(fsp)) {
1007 fc_fcp_cleanup_cmd(fsp, error); 1008 fc_fcp_cleanup_cmd(fsp, error);
@@ -1010,14 +1011,14 @@ restart:
1010 } 1011 }
1011 1012
1012 fc_fcp_pkt_release(fsp); 1013 fc_fcp_pkt_release(fsp);
1013 spin_lock_irqsave(lport->host->host_lock, flags); 1014 spin_lock_irqsave(&si->scsi_queue_lock, flags);
1014 /* 1015 /*
1015 * while we dropped the lock multiple pkts could 1016 * while we dropped the lock multiple pkts could
1016 * have been released, so we have to start over. 1017 * have been released, so we have to start over.
1017 */ 1018 */
1018 goto restart; 1019 goto restart;
1019 } 1020 }
1020 spin_unlock_irqrestore(lport->host->host_lock, flags); 1021 spin_unlock_irqrestore(&si->scsi_queue_lock, flags);
1021} 1022}
1022 1023
1023/** 1024/**
@@ -1035,11 +1036,12 @@ static void fc_fcp_abort_io(struct fc_lport *lport)
1035 * @fsp: The FCP packet to send 1036 * @fsp: The FCP packet to send
1036 * 1037 *
1037 * Return: Zero for success and -1 for failure 1038 * Return: Zero for success and -1 for failure
1038 * Locks: Called with the host lock and irqs disabled. 1039 * Locks: Called without locks held
1039 */ 1040 */
1040static int fc_fcp_pkt_send(struct fc_lport *lport, struct fc_fcp_pkt *fsp) 1041static int fc_fcp_pkt_send(struct fc_lport *lport, struct fc_fcp_pkt *fsp)
1041{ 1042{
1042 struct fc_fcp_internal *si = fc_get_scsi_internal(lport); 1043 struct fc_fcp_internal *si = fc_get_scsi_internal(lport);
1044 unsigned long flags;
1043 int rc; 1045 int rc;
1044 1046
1045 fsp->cmd->SCp.ptr = (char *)fsp; 1047 fsp->cmd->SCp.ptr = (char *)fsp;
@@ -1049,13 +1051,16 @@ static int fc_fcp_pkt_send(struct fc_lport *lport, struct fc_fcp_pkt *fsp)
1049 int_to_scsilun(fsp->cmd->device->lun, 1051 int_to_scsilun(fsp->cmd->device->lun,
1050 (struct scsi_lun *)fsp->cdb_cmd.fc_lun); 1052 (struct scsi_lun *)fsp->cdb_cmd.fc_lun);
1051 memcpy(fsp->cdb_cmd.fc_cdb, fsp->cmd->cmnd, fsp->cmd->cmd_len); 1053 memcpy(fsp->cdb_cmd.fc_cdb, fsp->cmd->cmnd, fsp->cmd->cmd_len);
1052 list_add_tail(&fsp->list, &si->scsi_pkt_queue);
1053 1054
1054 spin_unlock_irq(lport->host->host_lock); 1055 spin_lock_irqsave(&si->scsi_queue_lock, flags);
1056 list_add_tail(&fsp->list, &si->scsi_pkt_queue);
1057 spin_unlock_irqrestore(&si->scsi_queue_lock, flags);
1055 rc = lport->tt.fcp_cmd_send(lport, fsp, fc_fcp_recv); 1058 rc = lport->tt.fcp_cmd_send(lport, fsp, fc_fcp_recv);
1056 spin_lock_irq(lport->host->host_lock); 1059 if (unlikely(rc)) {
1057 if (rc) 1060 spin_lock_irqsave(&si->scsi_queue_lock, flags);
1058 list_del(&fsp->list); 1061 list_del(&fsp->list);
1062 spin_unlock_irqrestore(&si->scsi_queue_lock, flags);
1063 }
1059 1064
1060 return rc; 1065 return rc;
1061} 1066}
@@ -1752,6 +1757,7 @@ int fc_queuecommand(struct scsi_cmnd *sc_cmd, void (*done)(struct scsi_cmnd *))
1752 struct fcoe_dev_stats *stats; 1757 struct fcoe_dev_stats *stats;
1753 1758
1754 lport = shost_priv(sc_cmd->device->host); 1759 lport = shost_priv(sc_cmd->device->host);
1760 spin_unlock_irq(lport->host->host_lock);
1755 1761
1756 rval = fc_remote_port_chkready(rport); 1762 rval = fc_remote_port_chkready(rport);
1757 if (rval) { 1763 if (rval) {
@@ -1834,6 +1840,7 @@ int fc_queuecommand(struct scsi_cmnd *sc_cmd, void (*done)(struct scsi_cmnd *))
1834 rc = SCSI_MLQUEUE_HOST_BUSY; 1840 rc = SCSI_MLQUEUE_HOST_BUSY;
1835 } 1841 }
1836out: 1842out:
1843 spin_lock_irq(lport->host->host_lock);
1837 return rc; 1844 return rc;
1838} 1845}
1839EXPORT_SYMBOL(fc_queuecommand); 1846EXPORT_SYMBOL(fc_queuecommand);
@@ -1864,11 +1871,8 @@ static void fc_io_compl(struct fc_fcp_pkt *fsp)
1864 1871
1865 lport = fsp->lp; 1872 lport = fsp->lp;
1866 si = fc_get_scsi_internal(lport); 1873 si = fc_get_scsi_internal(lport);
1867 spin_lock_irqsave(lport->host->host_lock, flags); 1874 if (!fsp->cmd)
1868 if (!fsp->cmd) {
1869 spin_unlock_irqrestore(lport->host->host_lock, flags);
1870 return; 1875 return;
1871 }
1872 1876
1873 /* 1877 /*
1874 * if can_queue ramp down is done then try can_queue ramp up 1878 * if can_queue ramp down is done then try can_queue ramp up
@@ -1880,10 +1884,8 @@ static void fc_io_compl(struct fc_fcp_pkt *fsp)
1880 sc_cmd = fsp->cmd; 1884 sc_cmd = fsp->cmd;
1881 fsp->cmd = NULL; 1885 fsp->cmd = NULL;
1882 1886
1883 if (!sc_cmd->SCp.ptr) { 1887 if (!sc_cmd->SCp.ptr)
1884 spin_unlock_irqrestore(lport->host->host_lock, flags);
1885 return; 1888 return;
1886 }
1887 1889
1888 CMD_SCSI_STATUS(sc_cmd) = fsp->cdb_status; 1890 CMD_SCSI_STATUS(sc_cmd) = fsp->cdb_status;
1889 switch (fsp->status_code) { 1891 switch (fsp->status_code) {
@@ -1945,10 +1947,11 @@ static void fc_io_compl(struct fc_fcp_pkt *fsp)
1945 break; 1947 break;
1946 } 1948 }
1947 1949
1950 spin_lock_irqsave(&si->scsi_queue_lock, flags);
1948 list_del(&fsp->list); 1951 list_del(&fsp->list);
1952 spin_unlock_irqrestore(&si->scsi_queue_lock, flags);
1949 sc_cmd->SCp.ptr = NULL; 1953 sc_cmd->SCp.ptr = NULL;
1950 sc_cmd->scsi_done(sc_cmd); 1954 sc_cmd->scsi_done(sc_cmd);
1951 spin_unlock_irqrestore(lport->host->host_lock, flags);
1952 1955
1953 /* release ref from initial allocation in queue command */ 1956 /* release ref from initial allocation in queue command */
1954 fc_fcp_pkt_release(fsp); 1957 fc_fcp_pkt_release(fsp);
@@ -2216,6 +2219,7 @@ int fc_fcp_init(struct fc_lport *lport)
2216 lport->scsi_priv = si; 2219 lport->scsi_priv = si;
2217 si->max_can_queue = lport->host->can_queue; 2220 si->max_can_queue = lport->host->can_queue;
2218 INIT_LIST_HEAD(&si->scsi_pkt_queue); 2221 INIT_LIST_HEAD(&si->scsi_pkt_queue);
2222 spin_lock_init(&si->scsi_queue_lock);
2219 2223
2220 si->scsi_pkt_pool = mempool_create_slab_pool(2, scsi_pkt_cachep); 2224 si->scsi_pkt_pool = mempool_create_slab_pool(2, scsi_pkt_cachep);
2221 if (!si->scsi_pkt_pool) { 2225 if (!si->scsi_pkt_pool) {
diff --git a/drivers/scsi/libfc/fc_lport.c b/drivers/scsi/libfc/fc_lport.c
index 74338c83ad0a..7ec8ce75007c 100644
--- a/drivers/scsi/libfc/fc_lport.c
+++ b/drivers/scsi/libfc/fc_lport.c
@@ -537,7 +537,9 @@ int fc_fabric_login(struct fc_lport *lport)
537 int rc = -1; 537 int rc = -1;
538 538
539 mutex_lock(&lport->lp_mutex); 539 mutex_lock(&lport->lp_mutex);
540 if (lport->state == LPORT_ST_DISABLED) { 540 if (lport->state == LPORT_ST_DISABLED ||
541 lport->state == LPORT_ST_LOGO) {
542 fc_lport_state_enter(lport, LPORT_ST_RESET);
541 fc_lport_enter_reset(lport); 543 fc_lport_enter_reset(lport);
542 rc = 0; 544 rc = 0;
543 } 545 }
@@ -967,6 +969,9 @@ static void fc_lport_enter_reset(struct fc_lport *lport)
967 FC_LPORT_DBG(lport, "Entered RESET state from %s state\n", 969 FC_LPORT_DBG(lport, "Entered RESET state from %s state\n",
968 fc_lport_state(lport)); 970 fc_lport_state(lport));
969 971
972 if (lport->state == LPORT_ST_DISABLED || lport->state == LPORT_ST_LOGO)
973 return;
974
970 if (lport->vport) { 975 if (lport->vport) {
971 if (lport->link_up) 976 if (lport->link_up)
972 fc_vport_set_state(lport->vport, FC_VPORT_INITIALIZING); 977 fc_vport_set_state(lport->vport, FC_VPORT_INITIALIZING);
@@ -1795,7 +1800,8 @@ int fc_lport_bsg_request(struct fc_bsg_job *job)
1795 u32 did; 1800 u32 did;
1796 1801
1797 job->reply->reply_payload_rcv_len = 0; 1802 job->reply->reply_payload_rcv_len = 0;
1798 rsp->resid_len = job->reply_payload.payload_len; 1803 if (rsp)
1804 rsp->resid_len = job->reply_payload.payload_len;
1799 1805
1800 mutex_lock(&lport->lp_mutex); 1806 mutex_lock(&lport->lp_mutex);
1801 1807
diff --git a/drivers/scsi/libfc/fc_rport.c b/drivers/scsi/libfc/fc_rport.c
index 35ca0e72df46..97923bb07765 100644
--- a/drivers/scsi/libfc/fc_rport.c
+++ b/drivers/scsi/libfc/fc_rport.c
@@ -310,6 +310,7 @@ static void fc_rport_work(struct work_struct *work)
310 restart = 1; 310 restart = 1;
311 else 311 else
312 list_del(&rdata->peers); 312 list_del(&rdata->peers);
313 rdata->event = RPORT_EV_NONE;
313 mutex_unlock(&rdata->rp_mutex); 314 mutex_unlock(&rdata->rp_mutex);
314 mutex_unlock(&lport->disc.disc_mutex); 315 mutex_unlock(&lport->disc.disc_mutex);
315 } 316 }
@@ -622,7 +623,7 @@ static void fc_rport_plogi_resp(struct fc_seq *sp, struct fc_frame *fp,
622 623
623 tov = ntohl(plp->fl_csp.sp_e_d_tov); 624 tov = ntohl(plp->fl_csp.sp_e_d_tov);
624 if (ntohs(plp->fl_csp.sp_features) & FC_SP_FT_EDTR) 625 if (ntohs(plp->fl_csp.sp_features) & FC_SP_FT_EDTR)
625 tov /= 1000; 626 tov /= 1000000;
626 if (tov > rdata->e_d_tov) 627 if (tov > rdata->e_d_tov)
627 rdata->e_d_tov = tov; 628 rdata->e_d_tov = tov;
628 csp_seq = ntohs(plp->fl_csp.sp_tot_seq); 629 csp_seq = ntohs(plp->fl_csp.sp_tot_seq);
diff --git a/drivers/scsi/libiscsi.c b/drivers/scsi/libiscsi.c
index b7689f3d05f5..c28a712fd4db 100644
--- a/drivers/scsi/libiscsi.c
+++ b/drivers/scsi/libiscsi.c
@@ -517,7 +517,7 @@ static void iscsi_free_task(struct iscsi_task *task)
517 if (conn->login_task == task) 517 if (conn->login_task == task)
518 return; 518 return;
519 519
520 __kfifo_put(session->cmdpool.queue, (void*)&task, sizeof(void*)); 520 kfifo_in(&session->cmdpool.queue, (void*)&task, sizeof(void*));
521 521
522 if (sc) { 522 if (sc) {
523 task->sc = NULL; 523 task->sc = NULL;
@@ -737,7 +737,7 @@ __iscsi_conn_send_pdu(struct iscsi_conn *conn, struct iscsi_hdr *hdr,
737 BUG_ON(conn->c_stage == ISCSI_CONN_INITIAL_STAGE); 737 BUG_ON(conn->c_stage == ISCSI_CONN_INITIAL_STAGE);
738 BUG_ON(conn->c_stage == ISCSI_CONN_STOPPED); 738 BUG_ON(conn->c_stage == ISCSI_CONN_STOPPED);
739 739
740 if (!__kfifo_get(session->cmdpool.queue, 740 if (!kfifo_out(&session->cmdpool.queue,
741 (void*)&task, sizeof(void*))) 741 (void*)&task, sizeof(void*)))
742 return NULL; 742 return NULL;
743 } 743 }
@@ -1567,7 +1567,7 @@ static inline struct iscsi_task *iscsi_alloc_task(struct iscsi_conn *conn,
1567{ 1567{
1568 struct iscsi_task *task; 1568 struct iscsi_task *task;
1569 1569
1570 if (!__kfifo_get(conn->session->cmdpool.queue, 1570 if (!kfifo_out(&conn->session->cmdpool.queue,
1571 (void *) &task, sizeof(void *))) 1571 (void *) &task, sizeof(void *)))
1572 return NULL; 1572 return NULL;
1573 1573
@@ -2461,12 +2461,7 @@ iscsi_pool_init(struct iscsi_pool *q, int max, void ***items, int item_size)
2461 if (q->pool == NULL) 2461 if (q->pool == NULL)
2462 return -ENOMEM; 2462 return -ENOMEM;
2463 2463
2464 q->queue = kfifo_init((void*)q->pool, max * sizeof(void*), 2464 kfifo_init(&q->queue, (void*)q->pool, max * sizeof(void*));
2465 GFP_KERNEL, NULL);
2466 if (IS_ERR(q->queue)) {
2467 q->queue = NULL;
2468 goto enomem;
2469 }
2470 2465
2471 for (i = 0; i < max; i++) { 2466 for (i = 0; i < max; i++) {
2472 q->pool[i] = kzalloc(item_size, GFP_KERNEL); 2467 q->pool[i] = kzalloc(item_size, GFP_KERNEL);
@@ -2474,7 +2469,7 @@ iscsi_pool_init(struct iscsi_pool *q, int max, void ***items, int item_size)
2474 q->max = i; 2469 q->max = i;
2475 goto enomem; 2470 goto enomem;
2476 } 2471 }
2477 __kfifo_put(q->queue, (void*)&q->pool[i], sizeof(void*)); 2472 kfifo_in(&q->queue, (void*)&q->pool[i], sizeof(void*));
2478 } 2473 }
2479 2474
2480 if (items) { 2475 if (items) {
@@ -2497,7 +2492,6 @@ void iscsi_pool_free(struct iscsi_pool *q)
2497 for (i = 0; i < q->max; i++) 2492 for (i = 0; i < q->max; i++)
2498 kfree(q->pool[i]); 2493 kfree(q->pool[i]);
2499 kfree(q->pool); 2494 kfree(q->pool);
2500 kfree(q->queue);
2501} 2495}
2502EXPORT_SYMBOL_GPL(iscsi_pool_free); 2496EXPORT_SYMBOL_GPL(iscsi_pool_free);
2503 2497
@@ -2825,7 +2819,7 @@ iscsi_conn_setup(struct iscsi_cls_session *cls_session, int dd_size,
2825 2819
2826 /* allocate login_task used for the login/text sequences */ 2820 /* allocate login_task used for the login/text sequences */
2827 spin_lock_bh(&session->lock); 2821 spin_lock_bh(&session->lock);
2828 if (!__kfifo_get(session->cmdpool.queue, 2822 if (!kfifo_out(&session->cmdpool.queue,
2829 (void*)&conn->login_task, 2823 (void*)&conn->login_task,
2830 sizeof(void*))) { 2824 sizeof(void*))) {
2831 spin_unlock_bh(&session->lock); 2825 spin_unlock_bh(&session->lock);
@@ -2845,7 +2839,7 @@ iscsi_conn_setup(struct iscsi_cls_session *cls_session, int dd_size,
2845 return cls_conn; 2839 return cls_conn;
2846 2840
2847login_task_data_alloc_fail: 2841login_task_data_alloc_fail:
2848 __kfifo_put(session->cmdpool.queue, (void*)&conn->login_task, 2842 kfifo_in(&session->cmdpool.queue, (void*)&conn->login_task,
2849 sizeof(void*)); 2843 sizeof(void*));
2850login_task_alloc_fail: 2844login_task_alloc_fail:
2851 iscsi_destroy_conn(cls_conn); 2845 iscsi_destroy_conn(cls_conn);
@@ -2908,7 +2902,7 @@ void iscsi_conn_teardown(struct iscsi_cls_conn *cls_conn)
2908 free_pages((unsigned long) conn->data, 2902 free_pages((unsigned long) conn->data,
2909 get_order(ISCSI_DEF_MAX_RECV_SEG_LEN)); 2903 get_order(ISCSI_DEF_MAX_RECV_SEG_LEN));
2910 kfree(conn->persistent_address); 2904 kfree(conn->persistent_address);
2911 __kfifo_put(session->cmdpool.queue, (void*)&conn->login_task, 2905 kfifo_in(&session->cmdpool.queue, (void*)&conn->login_task,
2912 sizeof(void*)); 2906 sizeof(void*));
2913 if (session->leadconn == conn) 2907 if (session->leadconn == conn)
2914 session->leadconn = NULL; 2908 session->leadconn = NULL;
diff --git a/drivers/scsi/libiscsi_tcp.c b/drivers/scsi/libiscsi_tcp.c
index ca25ee5190b0..4ad87fd74ddd 100644
--- a/drivers/scsi/libiscsi_tcp.c
+++ b/drivers/scsi/libiscsi_tcp.c
@@ -445,15 +445,15 @@ void iscsi_tcp_cleanup_task(struct iscsi_task *task)
445 return; 445 return;
446 446
447 /* flush task's r2t queues */ 447 /* flush task's r2t queues */
448 while (__kfifo_get(tcp_task->r2tqueue, (void*)&r2t, sizeof(void*))) { 448 while (kfifo_out(&tcp_task->r2tqueue, (void*)&r2t, sizeof(void*))) {
449 __kfifo_put(tcp_task->r2tpool.queue, (void*)&r2t, 449 kfifo_in(&tcp_task->r2tpool.queue, (void*)&r2t,
450 sizeof(void*)); 450 sizeof(void*));
451 ISCSI_DBG_TCP(task->conn, "pending r2t dropped\n"); 451 ISCSI_DBG_TCP(task->conn, "pending r2t dropped\n");
452 } 452 }
453 453
454 r2t = tcp_task->r2t; 454 r2t = tcp_task->r2t;
455 if (r2t != NULL) { 455 if (r2t != NULL) {
456 __kfifo_put(tcp_task->r2tpool.queue, (void*)&r2t, 456 kfifo_in(&tcp_task->r2tpool.queue, (void*)&r2t,
457 sizeof(void*)); 457 sizeof(void*));
458 tcp_task->r2t = NULL; 458 tcp_task->r2t = NULL;
459 } 459 }
@@ -541,7 +541,7 @@ static int iscsi_tcp_r2t_rsp(struct iscsi_conn *conn, struct iscsi_task *task)
541 return 0; 541 return 0;
542 } 542 }
543 543
544 rc = __kfifo_get(tcp_task->r2tpool.queue, (void*)&r2t, sizeof(void*)); 544 rc = kfifo_out(&tcp_task->r2tpool.queue, (void*)&r2t, sizeof(void*));
545 if (!rc) { 545 if (!rc) {
546 iscsi_conn_printk(KERN_ERR, conn, "Could not allocate R2T. " 546 iscsi_conn_printk(KERN_ERR, conn, "Could not allocate R2T. "
547 "Target has sent more R2Ts than it " 547 "Target has sent more R2Ts than it "
@@ -554,7 +554,7 @@ static int iscsi_tcp_r2t_rsp(struct iscsi_conn *conn, struct iscsi_task *task)
554 if (r2t->data_length == 0) { 554 if (r2t->data_length == 0) {
555 iscsi_conn_printk(KERN_ERR, conn, 555 iscsi_conn_printk(KERN_ERR, conn,
556 "invalid R2T with zero data len\n"); 556 "invalid R2T with zero data len\n");
557 __kfifo_put(tcp_task->r2tpool.queue, (void*)&r2t, 557 kfifo_in(&tcp_task->r2tpool.queue, (void*)&r2t,
558 sizeof(void*)); 558 sizeof(void*));
559 return ISCSI_ERR_DATALEN; 559 return ISCSI_ERR_DATALEN;
560 } 560 }
@@ -570,7 +570,7 @@ static int iscsi_tcp_r2t_rsp(struct iscsi_conn *conn, struct iscsi_task *task)
570 "invalid R2T with data len %u at offset %u " 570 "invalid R2T with data len %u at offset %u "
571 "and total length %d\n", r2t->data_length, 571 "and total length %d\n", r2t->data_length,
572 r2t->data_offset, scsi_out(task->sc)->length); 572 r2t->data_offset, scsi_out(task->sc)->length);
573 __kfifo_put(tcp_task->r2tpool.queue, (void*)&r2t, 573 kfifo_in(&tcp_task->r2tpool.queue, (void*)&r2t,
574 sizeof(void*)); 574 sizeof(void*));
575 return ISCSI_ERR_DATALEN; 575 return ISCSI_ERR_DATALEN;
576 } 576 }
@@ -580,7 +580,7 @@ static int iscsi_tcp_r2t_rsp(struct iscsi_conn *conn, struct iscsi_task *task)
580 r2t->sent = 0; 580 r2t->sent = 0;
581 581
582 tcp_task->exp_datasn = r2tsn + 1; 582 tcp_task->exp_datasn = r2tsn + 1;
583 __kfifo_put(tcp_task->r2tqueue, (void*)&r2t, sizeof(void*)); 583 kfifo_in(&tcp_task->r2tqueue, (void*)&r2t, sizeof(void*));
584 conn->r2t_pdus_cnt++; 584 conn->r2t_pdus_cnt++;
585 585
586 iscsi_requeue_task(task); 586 iscsi_requeue_task(task);
@@ -951,7 +951,7 @@ int iscsi_tcp_task_init(struct iscsi_task *task)
951 return conn->session->tt->init_pdu(task, 0, task->data_count); 951 return conn->session->tt->init_pdu(task, 0, task->data_count);
952 } 952 }
953 953
954 BUG_ON(__kfifo_len(tcp_task->r2tqueue)); 954 BUG_ON(kfifo_len(&tcp_task->r2tqueue));
955 tcp_task->exp_datasn = 0; 955 tcp_task->exp_datasn = 0;
956 956
957 /* Prepare PDU, optionally w/ immediate data */ 957 /* Prepare PDU, optionally w/ immediate data */
@@ -982,7 +982,7 @@ static struct iscsi_r2t_info *iscsi_tcp_get_curr_r2t(struct iscsi_task *task)
982 if (r2t->data_length <= r2t->sent) { 982 if (r2t->data_length <= r2t->sent) {
983 ISCSI_DBG_TCP(task->conn, 983 ISCSI_DBG_TCP(task->conn,
984 " done with r2t %p\n", r2t); 984 " done with r2t %p\n", r2t);
985 __kfifo_put(tcp_task->r2tpool.queue, 985 kfifo_in(&tcp_task->r2tpool.queue,
986 (void *)&tcp_task->r2t, 986 (void *)&tcp_task->r2t,
987 sizeof(void *)); 987 sizeof(void *));
988 tcp_task->r2t = r2t = NULL; 988 tcp_task->r2t = r2t = NULL;
@@ -990,9 +990,12 @@ static struct iscsi_r2t_info *iscsi_tcp_get_curr_r2t(struct iscsi_task *task)
990 } 990 }
991 991
992 if (r2t == NULL) { 992 if (r2t == NULL) {
993 __kfifo_get(tcp_task->r2tqueue, 993 if (kfifo_out(&tcp_task->r2tqueue,
994 (void *)&tcp_task->r2t, sizeof(void *)); 994 (void *)&tcp_task->r2t, sizeof(void *)) !=
995 r2t = tcp_task->r2t; 995 sizeof(void *))
996 r2t = NULL;
997 else
998 r2t = tcp_task->r2t;
996 } 999 }
997 spin_unlock_bh(&session->lock); 1000 spin_unlock_bh(&session->lock);
998 } 1001 }
@@ -1127,9 +1130,8 @@ int iscsi_tcp_r2tpool_alloc(struct iscsi_session *session)
1127 } 1130 }
1128 1131
1129 /* R2T xmit queue */ 1132 /* R2T xmit queue */
1130 tcp_task->r2tqueue = kfifo_alloc( 1133 if (kfifo_alloc(&tcp_task->r2tqueue,
1131 session->max_r2t * 4 * sizeof(void*), GFP_KERNEL, NULL); 1134 session->max_r2t * 4 * sizeof(void*), GFP_KERNEL)) {
1132 if (tcp_task->r2tqueue == ERR_PTR(-ENOMEM)) {
1133 iscsi_pool_free(&tcp_task->r2tpool); 1135 iscsi_pool_free(&tcp_task->r2tpool);
1134 goto r2t_alloc_fail; 1136 goto r2t_alloc_fail;
1135 } 1137 }
@@ -1142,7 +1144,7 @@ r2t_alloc_fail:
1142 struct iscsi_task *task = session->cmds[i]; 1144 struct iscsi_task *task = session->cmds[i];
1143 struct iscsi_tcp_task *tcp_task = task->dd_data; 1145 struct iscsi_tcp_task *tcp_task = task->dd_data;
1144 1146
1145 kfifo_free(tcp_task->r2tqueue); 1147 kfifo_free(&tcp_task->r2tqueue);
1146 iscsi_pool_free(&tcp_task->r2tpool); 1148 iscsi_pool_free(&tcp_task->r2tpool);
1147 } 1149 }
1148 return -ENOMEM; 1150 return -ENOMEM;
@@ -1157,7 +1159,7 @@ void iscsi_tcp_r2tpool_free(struct iscsi_session *session)
1157 struct iscsi_task *task = session->cmds[i]; 1159 struct iscsi_task *task = session->cmds[i];
1158 struct iscsi_tcp_task *tcp_task = task->dd_data; 1160 struct iscsi_tcp_task *tcp_task = task->dd_data;
1159 1161
1160 kfifo_free(tcp_task->r2tqueue); 1162 kfifo_free(&tcp_task->r2tqueue);
1161 iscsi_pool_free(&tcp_task->r2tpool); 1163 iscsi_pool_free(&tcp_task->r2tpool);
1162 } 1164 }
1163} 1165}
diff --git a/drivers/scsi/libsrp.c b/drivers/scsi/libsrp.c
index 9ad38e81e343..ab19b3b4be52 100644
--- a/drivers/scsi/libsrp.c
+++ b/drivers/scsi/libsrp.c
@@ -58,19 +58,15 @@ static int srp_iu_pool_alloc(struct srp_queue *q, size_t max,
58 goto free_pool; 58 goto free_pool;
59 59
60 spin_lock_init(&q->lock); 60 spin_lock_init(&q->lock);
61 q->queue = kfifo_init((void *) q->pool, max * sizeof(void *), 61 kfifo_init(&q->queue, (void *) q->pool, max * sizeof(void *));
62 GFP_KERNEL, &q->lock);
63 if (IS_ERR(q->queue))
64 goto free_item;
65 62
66 for (i = 0, iue = q->items; i < max; i++) { 63 for (i = 0, iue = q->items; i < max; i++) {
67 __kfifo_put(q->queue, (void *) &iue, sizeof(void *)); 64 kfifo_in(&q->queue, (void *) &iue, sizeof(void *));
68 iue->sbuf = ring[i]; 65 iue->sbuf = ring[i];
69 iue++; 66 iue++;
70 } 67 }
71 return 0; 68 return 0;
72 69
73free_item:
74 kfree(q->items); 70 kfree(q->items);
75free_pool: 71free_pool:
76 kfree(q->pool); 72 kfree(q->pool);
@@ -167,7 +163,11 @@ struct iu_entry *srp_iu_get(struct srp_target *target)
167{ 163{
168 struct iu_entry *iue = NULL; 164 struct iu_entry *iue = NULL;
169 165
170 kfifo_get(target->iu_queue.queue, (void *) &iue, sizeof(void *)); 166 if (kfifo_out_locked(&target->iu_queue.queue, (void *) &iue,
167 sizeof(void *), &target->iu_queue.lock) != sizeof(void *)) {
168 WARN_ONCE(1, "unexpected fifo state");
169 return NULL;
170 }
171 if (!iue) 171 if (!iue)
172 return iue; 172 return iue;
173 iue->target = target; 173 iue->target = target;
@@ -179,7 +179,8 @@ EXPORT_SYMBOL_GPL(srp_iu_get);
179 179
180void srp_iu_put(struct iu_entry *iue) 180void srp_iu_put(struct iu_entry *iue)
181{ 181{
182 kfifo_put(iue->target->iu_queue.queue, (void *) &iue, sizeof(void *)); 182 kfifo_in_locked(&iue->target->iu_queue.queue, (void *) &iue,
183 sizeof(void *), &iue->target->iu_queue.lock);
183} 184}
184EXPORT_SYMBOL_GPL(srp_iu_put); 185EXPORT_SYMBOL_GPL(srp_iu_put);
185 186
diff --git a/drivers/scsi/lpfc/lpfc_els.c b/drivers/scsi/lpfc/lpfc_els.c
index ce522702a6c1..2cc39684ce97 100644
--- a/drivers/scsi/lpfc/lpfc_els.c
+++ b/drivers/scsi/lpfc/lpfc_els.c
@@ -4142,8 +4142,8 @@ lpfc_els_rcv_rscn(struct lpfc_vport *vport, struct lpfc_iocbq *cmdiocb,
4142 spin_lock_irq(shost->host_lock); 4142 spin_lock_irq(shost->host_lock);
4143 if (vport->fc_rscn_flush) { 4143 if (vport->fc_rscn_flush) {
4144 /* Another thread is walking fc_rscn_id_list on this vport */ 4144 /* Another thread is walking fc_rscn_id_list on this vport */
4145 spin_unlock_irq(shost->host_lock);
4146 vport->fc_flag |= FC_RSCN_DISCOVERY; 4145 vport->fc_flag |= FC_RSCN_DISCOVERY;
4146 spin_unlock_irq(shost->host_lock);
4147 /* Send back ACC */ 4147 /* Send back ACC */
4148 lpfc_els_rsp_acc(vport, ELS_CMD_ACC, cmdiocb, ndlp, NULL); 4148 lpfc_els_rsp_acc(vport, ELS_CMD_ACC, cmdiocb, ndlp, NULL);
4149 return 0; 4149 return 0;
@@ -5948,8 +5948,8 @@ lpfc_cmpl_reg_new_vport(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmb)
5948 lpfc_initial_fdisc(vport); 5948 lpfc_initial_fdisc(vport);
5949 break; 5949 break;
5950 } 5950 }
5951
5952 } else { 5951 } else {
5952 vport->vpi_state |= LPFC_VPI_REGISTERED;
5953 if (vport == phba->pport) 5953 if (vport == phba->pport)
5954 if (phba->sli_rev < LPFC_SLI_REV4) 5954 if (phba->sli_rev < LPFC_SLI_REV4)
5955 lpfc_issue_fabric_reglogin(vport); 5955 lpfc_issue_fabric_reglogin(vport);
diff --git a/drivers/scsi/lpfc/lpfc_hbadisc.c b/drivers/scsi/lpfc/lpfc_hbadisc.c
index 3b9424427652..2445e399fd60 100755..100644
--- a/drivers/scsi/lpfc/lpfc_hbadisc.c
+++ b/drivers/scsi/lpfc/lpfc_hbadisc.c
@@ -747,6 +747,10 @@ lpfc_linkdown(struct lpfc_hba *phba)
747 747
748 if (phba->link_state == LPFC_LINK_DOWN) 748 if (phba->link_state == LPFC_LINK_DOWN)
749 return 0; 749 return 0;
750
751 /* Block all SCSI stack I/Os */
752 lpfc_scsi_dev_block(phba);
753
750 spin_lock_irq(&phba->hbalock); 754 spin_lock_irq(&phba->hbalock);
751 phba->fcf.fcf_flag &= ~(FCF_AVAILABLE | FCF_DISCOVERED); 755 phba->fcf.fcf_flag &= ~(FCF_AVAILABLE | FCF_DISCOVERED);
752 if (phba->link_state > LPFC_LINK_DOWN) { 756 if (phba->link_state > LPFC_LINK_DOWN) {
@@ -1555,10 +1559,16 @@ lpfc_mbx_cmpl_read_fcf_record(struct lpfc_hba *phba, LPFC_MBOXQ_t *mboxq)
1555 * to book keeping the FCFIs can be used. 1559 * to book keeping the FCFIs can be used.
1556 */ 1560 */
1557 if (shdr_status || shdr_add_status) { 1561 if (shdr_status || shdr_add_status) {
1558 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, 1562 if (shdr_status == STATUS_FCF_TABLE_EMPTY) {
1559 "2521 READ_FCF_RECORD mailbox failed " 1563 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1560 "with status x%x add_status x%x, mbx\n", 1564 "2726 READ_FCF_RECORD Indicates empty "
1561 shdr_status, shdr_add_status); 1565 "FCF table.\n");
1566 } else {
1567 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
1568 "2521 READ_FCF_RECORD mailbox failed "
1569 "with status x%x add_status x%x, mbx\n",
1570 shdr_status, shdr_add_status);
1571 }
1562 goto out; 1572 goto out;
1563 } 1573 }
1564 /* Interpreting the returned information of FCF records */ 1574 /* Interpreting the returned information of FCF records */
@@ -1698,7 +1708,9 @@ lpfc_init_vpi_cmpl(struct lpfc_hba *phba, LPFC_MBOXQ_t *mboxq)
1698 lpfc_vport_set_state(vport, FC_VPORT_FAILED); 1708 lpfc_vport_set_state(vport, FC_VPORT_FAILED);
1699 return; 1709 return;
1700 } 1710 }
1711 spin_lock_irq(&phba->hbalock);
1701 vport->fc_flag &= ~FC_VPORT_NEEDS_INIT_VPI; 1712 vport->fc_flag &= ~FC_VPORT_NEEDS_INIT_VPI;
1713 spin_unlock_irq(&phba->hbalock);
1702 1714
1703 if (phba->link_flag & LS_NPIV_FAB_SUPPORTED) 1715 if (phba->link_flag & LS_NPIV_FAB_SUPPORTED)
1704 lpfc_initial_fdisc(vport); 1716 lpfc_initial_fdisc(vport);
@@ -2259,7 +2271,10 @@ lpfc_mbx_cmpl_unreg_vpi(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmb)
2259 mb->mbxStatus); 2271 mb->mbxStatus);
2260 break; 2272 break;
2261 } 2273 }
2274 spin_lock_irq(&phba->hbalock);
2262 vport->vpi_state &= ~LPFC_VPI_REGISTERED; 2275 vport->vpi_state &= ~LPFC_VPI_REGISTERED;
2276 vport->fc_flag |= FC_VPORT_NEEDS_REG_VPI;
2277 spin_unlock_irq(&phba->hbalock);
2263 vport->unreg_vpi_cmpl = VPORT_OK; 2278 vport->unreg_vpi_cmpl = VPORT_OK;
2264 mempool_free(pmb, phba->mbox_mem_pool); 2279 mempool_free(pmb, phba->mbox_mem_pool);
2265 /* 2280 /*
@@ -4475,8 +4490,10 @@ lpfc_unregister_unused_fcf(struct lpfc_hba *phba)
4475 (phba->sli3_options & LPFC_SLI3_NPIV_ENABLED)) 4490 (phba->sli3_options & LPFC_SLI3_NPIV_ENABLED))
4476 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) { 4491 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
4477 lpfc_mbx_unreg_vpi(vports[i]); 4492 lpfc_mbx_unreg_vpi(vports[i]);
4493 spin_lock_irq(&phba->hbalock);
4478 vports[i]->fc_flag |= FC_VPORT_NEEDS_INIT_VPI; 4494 vports[i]->fc_flag |= FC_VPORT_NEEDS_INIT_VPI;
4479 vports[i]->vpi_state &= ~LPFC_VPI_REGISTERED; 4495 vports[i]->vpi_state &= ~LPFC_VPI_REGISTERED;
4496 spin_unlock_irq(&phba->hbalock);
4480 } 4497 }
4481 lpfc_destroy_vport_work_array(phba, vports); 4498 lpfc_destroy_vport_work_array(phba, vports);
4482 4499
diff --git a/drivers/scsi/lpfc/lpfc_hw4.h b/drivers/scsi/lpfc/lpfc_hw4.h
index 1585148a17e5..8a2a1c5935c6 100644
--- a/drivers/scsi/lpfc/lpfc_hw4.h
+++ b/drivers/scsi/lpfc/lpfc_hw4.h
@@ -1013,7 +1013,7 @@ struct lpfc_mbx_wq_destroy {
1013}; 1013};
1014 1014
1015#define LPFC_HDR_BUF_SIZE 128 1015#define LPFC_HDR_BUF_SIZE 128
1016#define LPFC_DATA_BUF_SIZE 4096 1016#define LPFC_DATA_BUF_SIZE 2048
1017struct rq_context { 1017struct rq_context {
1018 uint32_t word0; 1018 uint32_t word0;
1019#define lpfc_rq_context_rq_size_SHIFT 16 1019#define lpfc_rq_context_rq_size_SHIFT 16
@@ -1371,6 +1371,7 @@ struct lpfc_mbx_query_fw_cfg {
1371#define STATUS_ERROR_ACITMAIN 0x2a 1371#define STATUS_ERROR_ACITMAIN 0x2a
1372#define STATUS_REBOOT_REQUIRED 0x2c 1372#define STATUS_REBOOT_REQUIRED 0x2c
1373#define STATUS_FCF_IN_USE 0x3a 1373#define STATUS_FCF_IN_USE 0x3a
1374#define STATUS_FCF_TABLE_EMPTY 0x43
1374 1375
1375struct lpfc_mbx_sli4_config { 1376struct lpfc_mbx_sli4_config {
1376 struct mbox_header header; 1377 struct mbox_header header;
diff --git a/drivers/scsi/lpfc/lpfc_init.c b/drivers/scsi/lpfc/lpfc_init.c
index 226920d15ea1..b8eb1b6e5e77 100644
--- a/drivers/scsi/lpfc/lpfc_init.c
+++ b/drivers/scsi/lpfc/lpfc_init.c
@@ -3006,6 +3006,7 @@ lpfc_sli4_async_fcoe_evt(struct lpfc_hba *phba,
3006 struct lpfc_vport *vport; 3006 struct lpfc_vport *vport;
3007 struct lpfc_nodelist *ndlp; 3007 struct lpfc_nodelist *ndlp;
3008 struct Scsi_Host *shost; 3008 struct Scsi_Host *shost;
3009 uint32_t link_state;
3009 3010
3010 phba->fc_eventTag = acqe_fcoe->event_tag; 3011 phba->fc_eventTag = acqe_fcoe->event_tag;
3011 phba->fcoe_eventtag = acqe_fcoe->event_tag; 3012 phba->fcoe_eventtag = acqe_fcoe->event_tag;
@@ -3052,9 +3053,12 @@ lpfc_sli4_async_fcoe_evt(struct lpfc_hba *phba,
3052 break; 3053 break;
3053 /* 3054 /*
3054 * Currently, driver support only one FCF - so treat this as 3055 * Currently, driver support only one FCF - so treat this as
3055 * a link down. 3056 * a link down, but save the link state because we don't want
3057 * it to be changed to Link Down unless it is already down.
3056 */ 3058 */
3059 link_state = phba->link_state;
3057 lpfc_linkdown(phba); 3060 lpfc_linkdown(phba);
3061 phba->link_state = link_state;
3058 /* Unregister FCF if no devices connected to it */ 3062 /* Unregister FCF if no devices connected to it */
3059 lpfc_unregister_unused_fcf(phba); 3063 lpfc_unregister_unused_fcf(phba);
3060 break; 3064 break;
@@ -4506,9 +4510,13 @@ lpfc_sli_pci_mem_setup(struct lpfc_hba *phba)
4506 pdev = phba->pcidev; 4510 pdev = phba->pcidev;
4507 4511
4508 /* Set the device DMA mask size */ 4512 /* Set the device DMA mask size */
4509 if (pci_set_dma_mask(pdev, DMA_BIT_MASK(64)) != 0) 4513 if (pci_set_dma_mask(pdev, DMA_BIT_MASK(64)) != 0
4510 if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0) 4514 || pci_set_consistent_dma_mask(pdev,DMA_BIT_MASK(64)) != 0) {
4515 if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0
4516 || pci_set_consistent_dma_mask(pdev,DMA_BIT_MASK(32)) != 0) {
4511 return error; 4517 return error;
4518 }
4519 }
4512 4520
4513 /* Get the bus address of Bar0 and Bar2 and the number of bytes 4521 /* Get the bus address of Bar0 and Bar2 and the number of bytes
4514 * required by each mapping. 4522 * required by each mapping.
@@ -6021,9 +6029,13 @@ lpfc_sli4_pci_mem_setup(struct lpfc_hba *phba)
6021 pdev = phba->pcidev; 6029 pdev = phba->pcidev;
6022 6030
6023 /* Set the device DMA mask size */ 6031 /* Set the device DMA mask size */
6024 if (pci_set_dma_mask(pdev, DMA_BIT_MASK(64)) != 0) 6032 if (pci_set_dma_mask(pdev, DMA_BIT_MASK(64)) != 0
6025 if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0) 6033 || pci_set_consistent_dma_mask(pdev,DMA_BIT_MASK(64)) != 0) {
6034 if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0
6035 || pci_set_consistent_dma_mask(pdev,DMA_BIT_MASK(32)) != 0) {
6026 return error; 6036 return error;
6037 }
6038 }
6027 6039
6028 /* Get the bus address of SLI4 device Bar0, Bar1, and Bar2 and the 6040 /* Get the bus address of SLI4 device Bar0, Bar1, and Bar2 and the
6029 * number of bytes required by each mapping. They are actually 6041 * number of bytes required by each mapping. They are actually
@@ -7218,8 +7230,6 @@ lpfc_prep_dev_for_perm_failure(struct lpfc_hba *phba)
7218{ 7230{
7219 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, 7231 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7220 "2711 PCI channel permanent disable for failure\n"); 7232 "2711 PCI channel permanent disable for failure\n");
7221 /* Block all SCSI devices' I/Os on the host */
7222 lpfc_scsi_dev_block(phba);
7223 /* Clean up all driver's outstanding SCSI I/Os */ 7233 /* Clean up all driver's outstanding SCSI I/Os */
7224 lpfc_sli_flush_fcp_rings(phba); 7234 lpfc_sli_flush_fcp_rings(phba);
7225} 7235}
@@ -7248,6 +7258,9 @@ lpfc_io_error_detected_s3(struct pci_dev *pdev, pci_channel_state_t state)
7248 struct Scsi_Host *shost = pci_get_drvdata(pdev); 7258 struct Scsi_Host *shost = pci_get_drvdata(pdev);
7249 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba; 7259 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
7250 7260
7261 /* Block all SCSI devices' I/Os on the host */
7262 lpfc_scsi_dev_block(phba);
7263
7251 switch (state) { 7264 switch (state) {
7252 case pci_channel_io_normal: 7265 case pci_channel_io_normal:
7253 /* Non-fatal error, prepare for recovery */ 7266 /* Non-fatal error, prepare for recovery */
@@ -7499,6 +7512,9 @@ lpfc_pci_probe_one_s4(struct pci_dev *pdev, const struct pci_device_id *pid)
7499 error = -ENODEV; 7512 error = -ENODEV;
7500 goto out_free_sysfs_attr; 7513 goto out_free_sysfs_attr;
7501 } 7514 }
7515 /* Default to single FCP EQ for non-MSI-X */
7516 if (phba->intr_type != MSIX)
7517 phba->cfg_fcp_eq_count = 1;
7502 /* Set up SLI-4 HBA */ 7518 /* Set up SLI-4 HBA */
7503 if (lpfc_sli4_hba_setup(phba)) { 7519 if (lpfc_sli4_hba_setup(phba)) {
7504 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, 7520 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
diff --git a/drivers/scsi/lpfc/lpfc_sli.c b/drivers/scsi/lpfc/lpfc_sli.c
index 7935667b81a5..589549b2bf0e 100644
--- a/drivers/scsi/lpfc/lpfc_sli.c
+++ b/drivers/scsi/lpfc/lpfc_sli.c
@@ -1383,7 +1383,7 @@ lpfc_sli_hbq_to_firmware_s4(struct lpfc_hba *phba, uint32_t hbqno,
1383/* HBQ for ELS and CT traffic. */ 1383/* HBQ for ELS and CT traffic. */
1384static struct lpfc_hbq_init lpfc_els_hbq = { 1384static struct lpfc_hbq_init lpfc_els_hbq = {
1385 .rn = 1, 1385 .rn = 1,
1386 .entry_count = 200, 1386 .entry_count = 256,
1387 .mask_count = 0, 1387 .mask_count = 0,
1388 .profile = 0, 1388 .profile = 0,
1389 .ring_mask = (1 << LPFC_ELS_RING), 1389 .ring_mask = (1 << LPFC_ELS_RING),
@@ -1482,8 +1482,11 @@ err:
1482int 1482int
1483lpfc_sli_hbqbuf_add_hbqs(struct lpfc_hba *phba, uint32_t qno) 1483lpfc_sli_hbqbuf_add_hbqs(struct lpfc_hba *phba, uint32_t qno)
1484{ 1484{
1485 return(lpfc_sli_hbqbuf_fill_hbqs(phba, qno, 1485 if (phba->sli_rev == LPFC_SLI_REV4)
1486 lpfc_hbq_defs[qno]->add_count)); 1486 return 0;
1487 else
1488 return lpfc_sli_hbqbuf_fill_hbqs(phba, qno,
1489 lpfc_hbq_defs[qno]->add_count);
1487} 1490}
1488 1491
1489/** 1492/**
@@ -1498,8 +1501,12 @@ lpfc_sli_hbqbuf_add_hbqs(struct lpfc_hba *phba, uint32_t qno)
1498static int 1501static int
1499lpfc_sli_hbqbuf_init_hbqs(struct lpfc_hba *phba, uint32_t qno) 1502lpfc_sli_hbqbuf_init_hbqs(struct lpfc_hba *phba, uint32_t qno)
1500{ 1503{
1501 return(lpfc_sli_hbqbuf_fill_hbqs(phba, qno, 1504 if (phba->sli_rev == LPFC_SLI_REV4)
1502 lpfc_hbq_defs[qno]->init_count)); 1505 return lpfc_sli_hbqbuf_fill_hbqs(phba, qno,
1506 lpfc_hbq_defs[qno]->entry_count);
1507 else
1508 return lpfc_sli_hbqbuf_fill_hbqs(phba, qno,
1509 lpfc_hbq_defs[qno]->init_count);
1503} 1510}
1504 1511
1505/** 1512/**
@@ -4110,6 +4117,7 @@ lpfc_sli4_read_rev(struct lpfc_hba *phba, LPFC_MBOXQ_t *mboxq,
4110 if (rc) { 4117 if (rc) {
4111 dma_free_coherent(&phba->pcidev->dev, dma_size, 4118 dma_free_coherent(&phba->pcidev->dev, dma_size,
4112 dmabuf->virt, dmabuf->phys); 4119 dmabuf->virt, dmabuf->phys);
4120 kfree(dmabuf);
4113 return -EIO; 4121 return -EIO;
4114 } 4122 }
4115 4123
@@ -5848,7 +5856,6 @@ lpfc_sli4_iocb2wqe(struct lpfc_hba *phba, struct lpfc_iocbq *iocbq,
5848 iocbq->iocb.un.ulpWord[3]); 5856 iocbq->iocb.un.ulpWord[3]);
5849 wqe->generic.word3 = 0; 5857 wqe->generic.word3 = 0;
5850 bf_set(wqe_rcvoxid, &wqe->generic, iocbq->iocb.ulpContext); 5858 bf_set(wqe_rcvoxid, &wqe->generic, iocbq->iocb.ulpContext);
5851 bf_set(wqe_xc, &wqe->generic, 1);
5852 /* The entire sequence is transmitted for this IOCB */ 5859 /* The entire sequence is transmitted for this IOCB */
5853 xmit_len = total_len; 5860 xmit_len = total_len;
5854 cmnd = CMD_XMIT_SEQUENCE64_CR; 5861 cmnd = CMD_XMIT_SEQUENCE64_CR;
@@ -10944,7 +10951,8 @@ lpfc_fc_frame_add(struct lpfc_vport *vport, struct hbq_dmabuf *dmabuf)
10944 return dmabuf; 10951 return dmabuf;
10945 } 10952 }
10946 temp_hdr = seq_dmabuf->hbuf.virt; 10953 temp_hdr = seq_dmabuf->hbuf.virt;
10947 if (new_hdr->fh_seq_cnt < temp_hdr->fh_seq_cnt) { 10954 if (be16_to_cpu(new_hdr->fh_seq_cnt) <
10955 be16_to_cpu(temp_hdr->fh_seq_cnt)) {
10948 list_del_init(&seq_dmabuf->hbuf.list); 10956 list_del_init(&seq_dmabuf->hbuf.list);
10949 list_add_tail(&dmabuf->hbuf.list, &vport->rcv_buffer_list); 10957 list_add_tail(&dmabuf->hbuf.list, &vport->rcv_buffer_list);
10950 list_add_tail(&dmabuf->dbuf.list, &seq_dmabuf->dbuf.list); 10958 list_add_tail(&dmabuf->dbuf.list, &seq_dmabuf->dbuf.list);
@@ -10955,6 +10963,11 @@ lpfc_fc_frame_add(struct lpfc_vport *vport, struct hbq_dmabuf *dmabuf)
10955 list_move_tail(&seq_dmabuf->hbuf.list, &vport->rcv_buffer_list); 10963 list_move_tail(&seq_dmabuf->hbuf.list, &vport->rcv_buffer_list);
10956 seq_dmabuf->time_stamp = jiffies; 10964 seq_dmabuf->time_stamp = jiffies;
10957 lpfc_update_rcv_time_stamp(vport); 10965 lpfc_update_rcv_time_stamp(vport);
10966 if (list_empty(&seq_dmabuf->dbuf.list)) {
10967 temp_hdr = dmabuf->hbuf.virt;
10968 list_add_tail(&dmabuf->dbuf.list, &seq_dmabuf->dbuf.list);
10969 return seq_dmabuf;
10970 }
10958 /* find the correct place in the sequence to insert this frame */ 10971 /* find the correct place in the sequence to insert this frame */
10959 list_for_each_entry_reverse(d_buf, &seq_dmabuf->dbuf.list, list) { 10972 list_for_each_entry_reverse(d_buf, &seq_dmabuf->dbuf.list, list) {
10960 temp_dmabuf = container_of(d_buf, struct hbq_dmabuf, dbuf); 10973 temp_dmabuf = container_of(d_buf, struct hbq_dmabuf, dbuf);
@@ -10963,7 +10976,8 @@ lpfc_fc_frame_add(struct lpfc_vport *vport, struct hbq_dmabuf *dmabuf)
10963 * If the frame's sequence count is greater than the frame on 10976 * If the frame's sequence count is greater than the frame on
10964 * the list then insert the frame right after this frame 10977 * the list then insert the frame right after this frame
10965 */ 10978 */
10966 if (new_hdr->fh_seq_cnt > temp_hdr->fh_seq_cnt) { 10979 if (be16_to_cpu(new_hdr->fh_seq_cnt) >
10980 be16_to_cpu(temp_hdr->fh_seq_cnt)) {
10967 list_add(&dmabuf->dbuf.list, &temp_dmabuf->dbuf.list); 10981 list_add(&dmabuf->dbuf.list, &temp_dmabuf->dbuf.list);
10968 return seq_dmabuf; 10982 return seq_dmabuf;
10969 } 10983 }
@@ -11210,7 +11224,7 @@ lpfc_seq_complete(struct hbq_dmabuf *dmabuf)
11210 seq_dmabuf = container_of(d_buf, struct hbq_dmabuf, dbuf); 11224 seq_dmabuf = container_of(d_buf, struct hbq_dmabuf, dbuf);
11211 hdr = (struct fc_frame_header *)seq_dmabuf->hbuf.virt; 11225 hdr = (struct fc_frame_header *)seq_dmabuf->hbuf.virt;
11212 /* If there is a hole in the sequence count then fail. */ 11226 /* If there is a hole in the sequence count then fail. */
11213 if (++seq_count != hdr->fh_seq_cnt) 11227 if (++seq_count != be16_to_cpu(hdr->fh_seq_cnt))
11214 return 0; 11228 return 0;
11215 fctl = (hdr->fh_f_ctl[0] << 16 | 11229 fctl = (hdr->fh_f_ctl[0] << 16 |
11216 hdr->fh_f_ctl[1] << 8 | 11230 hdr->fh_f_ctl[1] << 8 |
@@ -11242,6 +11256,7 @@ lpfc_prep_seq(struct lpfc_vport *vport, struct hbq_dmabuf *seq_dmabuf)
11242 struct lpfc_iocbq *first_iocbq, *iocbq; 11256 struct lpfc_iocbq *first_iocbq, *iocbq;
11243 struct fc_frame_header *fc_hdr; 11257 struct fc_frame_header *fc_hdr;
11244 uint32_t sid; 11258 uint32_t sid;
11259 struct ulp_bde64 *pbde;
11245 11260
11246 fc_hdr = (struct fc_frame_header *)seq_dmabuf->hbuf.virt; 11261 fc_hdr = (struct fc_frame_header *)seq_dmabuf->hbuf.virt;
11247 /* remove from receive buffer list */ 11262 /* remove from receive buffer list */
@@ -11283,8 +11298,9 @@ lpfc_prep_seq(struct lpfc_vport *vport, struct hbq_dmabuf *seq_dmabuf)
11283 if (!iocbq->context3) { 11298 if (!iocbq->context3) {
11284 iocbq->context3 = d_buf; 11299 iocbq->context3 = d_buf;
11285 iocbq->iocb.ulpBdeCount++; 11300 iocbq->iocb.ulpBdeCount++;
11286 iocbq->iocb.unsli3.rcvsli3.bde2.tus.f.bdeSize = 11301 pbde = (struct ulp_bde64 *)
11287 LPFC_DATA_BUF_SIZE; 11302 &iocbq->iocb.unsli3.sli3Words[4];
11303 pbde->tus.f.bdeSize = LPFC_DATA_BUF_SIZE;
11288 first_iocbq->iocb.unsli3.rcvsli3.acc_len += 11304 first_iocbq->iocb.unsli3.rcvsli3.acc_len +=
11289 bf_get(lpfc_rcqe_length, 11305 bf_get(lpfc_rcqe_length,
11290 &seq_dmabuf->cq_event.cqe.rcqe_cmpl); 11306 &seq_dmabuf->cq_event.cqe.rcqe_cmpl);
@@ -11401,15 +11417,9 @@ lpfc_sli4_handle_received_buffer(struct lpfc_hba *phba,
11401 return; 11417 return;
11402 } 11418 }
11403 /* If not last frame in sequence continue processing frames. */ 11419 /* If not last frame in sequence continue processing frames. */
11404 if (!lpfc_seq_complete(seq_dmabuf)) { 11420 if (!lpfc_seq_complete(seq_dmabuf))
11405 /*
11406 * When saving off frames post a new one and mark this
11407 * frame to be freed when it is finished.
11408 **/
11409 lpfc_sli_hbqbuf_fill_hbqs(phba, LPFC_ELS_HBQ, 1);
11410 dmabuf->tag = -1;
11411 return; 11421 return;
11412 } 11422
11413 /* Send the complete sequence to the upper layer protocol */ 11423 /* Send the complete sequence to the upper layer protocol */
11414 lpfc_sli4_send_seq_to_ulp(vport, seq_dmabuf); 11424 lpfc_sli4_send_seq_to_ulp(vport, seq_dmabuf);
11415} 11425}
diff --git a/drivers/scsi/lpfc/lpfc_sli4.h b/drivers/scsi/lpfc/lpfc_sli4.h
index 25d66d070cf8..44e5f574236b 100644
--- a/drivers/scsi/lpfc/lpfc_sli4.h
+++ b/drivers/scsi/lpfc/lpfc_sli4.h
@@ -28,7 +28,7 @@
28/* Multi-queue arrangement for fast-path FCP work queues */ 28/* Multi-queue arrangement for fast-path FCP work queues */
29#define LPFC_FN_EQN_MAX 8 29#define LPFC_FN_EQN_MAX 8
30#define LPFC_SP_EQN_DEF 1 30#define LPFC_SP_EQN_DEF 1
31#define LPFC_FP_EQN_DEF 1 31#define LPFC_FP_EQN_DEF 4
32#define LPFC_FP_EQN_MIN 1 32#define LPFC_FP_EQN_MIN 1
33#define LPFC_FP_EQN_MAX (LPFC_FN_EQN_MAX - LPFC_SP_EQN_DEF) 33#define LPFC_FP_EQN_MAX (LPFC_FN_EQN_MAX - LPFC_SP_EQN_DEF)
34 34
diff --git a/drivers/scsi/lpfc/lpfc_version.h b/drivers/scsi/lpfc/lpfc_version.h
index c7f3aed2aab8..792f72263f1a 100644
--- a/drivers/scsi/lpfc/lpfc_version.h
+++ b/drivers/scsi/lpfc/lpfc_version.h
@@ -18,7 +18,7 @@
18 * included with this package. * 18 * included with this package. *
19 *******************************************************************/ 19 *******************************************************************/
20 20
21#define LPFC_DRIVER_VERSION "8.3.6" 21#define LPFC_DRIVER_VERSION "8.3.7"
22#define LPFC_DRIVER_NAME "lpfc" 22#define LPFC_DRIVER_NAME "lpfc"
23#define LPFC_SP_DRIVER_HANDLER_NAME "lpfc:sp" 23#define LPFC_SP_DRIVER_HANDLER_NAME "lpfc:sp"
24#define LPFC_FP_DRIVER_HANDLER_NAME "lpfc:fp" 24#define LPFC_FP_DRIVER_HANDLER_NAME "lpfc:fp"
diff --git a/drivers/scsi/lpfc/lpfc_vport.c b/drivers/scsi/lpfc/lpfc_vport.c
index 7d6dd83d3592..e3c7fa642306 100644
--- a/drivers/scsi/lpfc/lpfc_vport.c
+++ b/drivers/scsi/lpfc/lpfc_vport.c
@@ -512,8 +512,10 @@ enable_vport(struct fc_vport *fc_vport)
512 return VPORT_OK; 512 return VPORT_OK;
513 } 513 }
514 514
515 spin_lock_irq(&phba->hbalock);
515 vport->load_flag |= FC_LOADING; 516 vport->load_flag |= FC_LOADING;
516 vport->fc_flag |= FC_VPORT_NEEDS_REG_VPI; 517 vport->fc_flag |= FC_VPORT_NEEDS_REG_VPI;
518 spin_unlock_irq(&phba->hbalock);
517 519
518 /* Use the Physical nodes Fabric NDLP to determine if the link is 520 /* Use the Physical nodes Fabric NDLP to determine if the link is
519 * up and ready to FDISC. 521 * up and ready to FDISC.
@@ -700,7 +702,7 @@ lpfc_vport_delete(struct fc_vport *fc_vport)
700 } 702 }
701 spin_unlock_irq(&phba->ndlp_lock); 703 spin_unlock_irq(&phba->ndlp_lock);
702 } 704 }
703 if (vport->vpi_state != LPFC_VPI_REGISTERED) 705 if (!(vport->vpi_state & LPFC_VPI_REGISTERED))
704 goto skip_logo; 706 goto skip_logo;
705 vport->unreg_vpi_cmpl = VPORT_INVAL; 707 vport->unreg_vpi_cmpl = VPORT_INVAL;
706 timeout = msecs_to_jiffies(phba->fc_ratov * 2000); 708 timeout = msecs_to_jiffies(phba->fc_ratov * 2000);
diff --git a/drivers/scsi/megaraid/megaraid_sas.c b/drivers/scsi/megaraid/megaraid_sas.c
index 134c63ef6d38..d9b8ca5116bc 100644
--- a/drivers/scsi/megaraid/megaraid_sas.c
+++ b/drivers/scsi/megaraid/megaraid_sas.c
@@ -2501,7 +2501,9 @@ static int megasas_init_mfi(struct megasas_instance *instance)
2501 instance->base_addr = pci_resource_start(instance->pdev, 0); 2501 instance->base_addr = pci_resource_start(instance->pdev, 0);
2502 } 2502 }
2503 2503
2504 if (pci_request_regions(instance->pdev, "megasas: LSI")) { 2504 if (pci_request_selected_regions(instance->pdev,
2505 pci_select_bars(instance->pdev, IORESOURCE_MEM),
2506 "megasas: LSI")) {
2505 printk(KERN_DEBUG "megasas: IO memory region busy!\n"); 2507 printk(KERN_DEBUG "megasas: IO memory region busy!\n");
2506 return -EBUSY; 2508 return -EBUSY;
2507 } 2509 }
@@ -2642,7 +2644,8 @@ static int megasas_init_mfi(struct megasas_instance *instance)
2642 iounmap(instance->reg_set); 2644 iounmap(instance->reg_set);
2643 2645
2644 fail_ioremap: 2646 fail_ioremap:
2645 pci_release_regions(instance->pdev); 2647 pci_release_selected_regions(instance->pdev,
2648 pci_select_bars(instance->pdev, IORESOURCE_MEM));
2646 2649
2647 return -EINVAL; 2650 return -EINVAL;
2648} 2651}
@@ -2662,7 +2665,8 @@ static void megasas_release_mfi(struct megasas_instance *instance)
2662 2665
2663 iounmap(instance->reg_set); 2666 iounmap(instance->reg_set);
2664 2667
2665 pci_release_regions(instance->pdev); 2668 pci_release_selected_regions(instance->pdev,
2669 pci_select_bars(instance->pdev, IORESOURCE_MEM));
2666} 2670}
2667 2671
2668/** 2672/**
@@ -2971,7 +2975,7 @@ megasas_probe_one(struct pci_dev *pdev, const struct pci_device_id *id)
2971 /* 2975 /*
2972 * PCI prepping: enable device set bus mastering and dma mask 2976 * PCI prepping: enable device set bus mastering and dma mask
2973 */ 2977 */
2974 rval = pci_enable_device(pdev); 2978 rval = pci_enable_device_mem(pdev);
2975 2979
2976 if (rval) { 2980 if (rval) {
2977 return rval; 2981 return rval;
@@ -3276,7 +3280,7 @@ megasas_resume(struct pci_dev *pdev)
3276 /* 3280 /*
3277 * PCI prepping: enable device set bus mastering and dma mask 3281 * PCI prepping: enable device set bus mastering and dma mask
3278 */ 3282 */
3279 rval = pci_enable_device(pdev); 3283 rval = pci_enable_device_mem(pdev);
3280 3284
3281 if (rval) { 3285 if (rval) {
3282 printk(KERN_ERR "megasas: Enable device failed\n"); 3286 printk(KERN_ERR "megasas: Enable device failed\n");
@@ -3777,6 +3781,7 @@ static int megasas_mgmt_compat_ioctl_fw(struct file *file, unsigned long arg)
3777 compat_alloc_user_space(sizeof(struct megasas_iocpacket)); 3781 compat_alloc_user_space(sizeof(struct megasas_iocpacket));
3778 int i; 3782 int i;
3779 int error = 0; 3783 int error = 0;
3784 compat_uptr_t ptr;
3780 3785
3781 if (clear_user(ioc, sizeof(*ioc))) 3786 if (clear_user(ioc, sizeof(*ioc)))
3782 return -EFAULT; 3787 return -EFAULT;
@@ -3789,9 +3794,22 @@ static int megasas_mgmt_compat_ioctl_fw(struct file *file, unsigned long arg)
3789 copy_in_user(&ioc->sge_count, &cioc->sge_count, sizeof(u32))) 3794 copy_in_user(&ioc->sge_count, &cioc->sge_count, sizeof(u32)))
3790 return -EFAULT; 3795 return -EFAULT;
3791 3796
3792 for (i = 0; i < MAX_IOCTL_SGE; i++) { 3797 /*
3793 compat_uptr_t ptr; 3798 * The sense_ptr is used in megasas_mgmt_fw_ioctl only when
3799 * sense_len is not null, so prepare the 64bit value under
3800 * the same condition.
3801 */
3802 if (ioc->sense_len) {
3803 void __user **sense_ioc_ptr =
3804 (void __user **)(ioc->frame.raw + ioc->sense_off);
3805 compat_uptr_t *sense_cioc_ptr =
3806 (compat_uptr_t *)(cioc->frame.raw + cioc->sense_off);
3807 if (get_user(ptr, sense_cioc_ptr) ||
3808 put_user(compat_ptr(ptr), sense_ioc_ptr))
3809 return -EFAULT;
3810 }
3794 3811
3812 for (i = 0; i < MAX_IOCTL_SGE; i++) {
3795 if (get_user(ptr, &cioc->sgl[i].iov_base) || 3813 if (get_user(ptr, &cioc->sgl[i].iov_base) ||
3796 put_user(compat_ptr(ptr), &ioc->sgl[i].iov_base) || 3814 put_user(compat_ptr(ptr), &ioc->sgl[i].iov_base) ||
3797 copy_in_user(&ioc->sgl[i].iov_len, 3815 copy_in_user(&ioc->sgl[i].iov_len,
@@ -4042,7 +4060,7 @@ megasas_aen_polling(struct work_struct *work)
4042} 4060}
4043 4061
4044 4062
4045static DRIVER_ATTR(poll_mode_io, S_IRUGO|S_IWUGO, 4063static DRIVER_ATTR(poll_mode_io, S_IRUGO|S_IWUSR,
4046 megasas_sysfs_show_poll_mode_io, 4064 megasas_sysfs_show_poll_mode_io,
4047 megasas_sysfs_set_poll_mode_io); 4065 megasas_sysfs_set_poll_mode_io);
4048 4066
diff --git a/drivers/scsi/mpt2sas/mpt2sas_base.c b/drivers/scsi/mpt2sas/mpt2sas_base.c
index 6422e258fd52..89d02401b9ec 100644
--- a/drivers/scsi/mpt2sas/mpt2sas_base.c
+++ b/drivers/scsi/mpt2sas/mpt2sas_base.c
@@ -3583,6 +3583,11 @@ mpt2sas_base_attach(struct MPT2SAS_ADAPTER *ioc)
3583 ioc->transport_cmds.status = MPT2_CMD_NOT_USED; 3583 ioc->transport_cmds.status = MPT2_CMD_NOT_USED;
3584 mutex_init(&ioc->transport_cmds.mutex); 3584 mutex_init(&ioc->transport_cmds.mutex);
3585 3585
3586 /* scsih internal command bits */
3587 ioc->scsih_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
3588 ioc->scsih_cmds.status = MPT2_CMD_NOT_USED;
3589 mutex_init(&ioc->scsih_cmds.mutex);
3590
3586 /* task management internal command bits */ 3591 /* task management internal command bits */
3587 ioc->tm_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL); 3592 ioc->tm_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
3588 ioc->tm_cmds.status = MPT2_CMD_NOT_USED; 3593 ioc->tm_cmds.status = MPT2_CMD_NOT_USED;
diff --git a/drivers/scsi/mvsas/mv_init.c b/drivers/scsi/mvsas/mv_init.c
index c790d45876c4..cae6b2cf492f 100644
--- a/drivers/scsi/mvsas/mv_init.c
+++ b/drivers/scsi/mvsas/mv_init.c
@@ -657,6 +657,7 @@ static struct pci_device_id __devinitdata mvs_pci_table[] = {
657 { PCI_VDEVICE(MARVELL, 0x9180), chip_9180 }, 657 { PCI_VDEVICE(MARVELL, 0x9180), chip_9180 },
658 { PCI_VDEVICE(ARECA, PCI_DEVICE_ID_ARECA_1300), chip_1300 }, 658 { PCI_VDEVICE(ARECA, PCI_DEVICE_ID_ARECA_1300), chip_1300 },
659 { PCI_VDEVICE(ARECA, PCI_DEVICE_ID_ARECA_1320), chip_1320 }, 659 { PCI_VDEVICE(ARECA, PCI_DEVICE_ID_ARECA_1320), chip_1320 },
660 { PCI_VDEVICE(ADAPTEC2, 0x0450), chip_6440 },
660 661
661 { } /* terminate list */ 662 { } /* terminate list */
662}; 663};
diff --git a/drivers/scsi/osd/osd_initiator.c b/drivers/scsi/osd/osd_initiator.c
index 950202a70bcf..24223473f573 100644
--- a/drivers/scsi/osd/osd_initiator.c
+++ b/drivers/scsi/osd/osd_initiator.c
@@ -432,30 +432,23 @@ static void _osd_free_seg(struct osd_request *or __unused,
432 seg->alloc_size = 0; 432 seg->alloc_size = 0;
433} 433}
434 434
435static void _put_request(struct request *rq , bool is_async) 435static void _put_request(struct request *rq)
436{ 436{
437 if (is_async) { 437 /*
438 WARN_ON(rq->bio); 438 * If osd_finalize_request() was called but the request was not
439 __blk_put_request(rq->q, rq); 439 * executed through the block layer, then we must release BIOs.
440 } else { 440 * TODO: Keep error code in or->async_error. Need to audit all
441 /* 441 * code paths.
442 * If osd_finalize_request() was called but the request was not 442 */
443 * executed through the block layer, then we must release BIOs. 443 if (unlikely(rq->bio))
444 * TODO: Keep error code in or->async_error. Need to audit all 444 blk_end_request(rq, -ENOMEM, blk_rq_bytes(rq));
445 * code paths. 445 else
446 */ 446 blk_put_request(rq);
447 if (unlikely(rq->bio))
448 blk_end_request(rq, -ENOMEM, blk_rq_bytes(rq));
449 else
450 blk_put_request(rq);
451 }
452} 447}
453 448
454void osd_end_request(struct osd_request *or) 449void osd_end_request(struct osd_request *or)
455{ 450{
456 struct request *rq = or->request; 451 struct request *rq = or->request;
457 /* IMPORTANT: make sure this agrees with osd_execute_request_async */
458 bool is_async = (or->request->end_io_data == or);
459 452
460 _osd_free_seg(or, &or->set_attr); 453 _osd_free_seg(or, &or->set_attr);
461 _osd_free_seg(or, &or->enc_get_attr); 454 _osd_free_seg(or, &or->enc_get_attr);
@@ -463,20 +456,34 @@ void osd_end_request(struct osd_request *or)
463 456
464 if (rq) { 457 if (rq) {
465 if (rq->next_rq) { 458 if (rq->next_rq) {
466 _put_request(rq->next_rq, is_async); 459 _put_request(rq->next_rq);
467 rq->next_rq = NULL; 460 rq->next_rq = NULL;
468 } 461 }
469 462
470 _put_request(rq, is_async); 463 _put_request(rq);
471 } 464 }
472 _osd_request_free(or); 465 _osd_request_free(or);
473} 466}
474EXPORT_SYMBOL(osd_end_request); 467EXPORT_SYMBOL(osd_end_request);
475 468
469static void _set_error_resid(struct osd_request *or, struct request *req,
470 int error)
471{
472 or->async_error = error;
473 or->req_errors = req->errors ? : error;
474 or->sense_len = req->sense_len;
475 if (or->out.req)
476 or->out.residual = or->out.req->resid_len;
477 if (or->in.req)
478 or->in.residual = or->in.req->resid_len;
479}
480
476int osd_execute_request(struct osd_request *or) 481int osd_execute_request(struct osd_request *or)
477{ 482{
478 return or->async_error = 483 int error = blk_execute_rq(or->request->q, NULL, or->request, 0);
479 blk_execute_rq(or->request->q, NULL, or->request, 0); 484
485 _set_error_resid(or, or->request, error);
486 return error;
480} 487}
481EXPORT_SYMBOL(osd_execute_request); 488EXPORT_SYMBOL(osd_execute_request);
482 489
@@ -484,15 +491,17 @@ static void osd_request_async_done(struct request *req, int error)
484{ 491{
485 struct osd_request *or = req->end_io_data; 492 struct osd_request *or = req->end_io_data;
486 493
487 or->async_error = error; 494 _set_error_resid(or, req, error);
488 495 if (req->next_rq) {
489 if (unlikely(error)) { 496 __blk_put_request(req->q, req->next_rq);
490 OSD_DEBUG("osd_request_async_done error recieved %d " 497 req->next_rq = NULL;
491 "errors 0x%x\n", error, req->errors);
492 if (!req->errors) /* don't miss out on this one */
493 req->errors = error;
494 } 498 }
495 499
500 __blk_put_request(req->q, req);
501 or->request = NULL;
502 or->in.req = NULL;
503 or->out.req = NULL;
504
496 if (or->async_done) 505 if (or->async_done)
497 or->async_done(or, or->async_private); 506 or->async_done(or, or->async_private);
498 else 507 else
@@ -1489,21 +1498,18 @@ int osd_req_decode_sense_full(struct osd_request *or,
1489#endif 1498#endif
1490 int ret; 1499 int ret;
1491 1500
1492 if (likely(!or->request->errors)) { 1501 if (likely(!or->req_errors))
1493 osi->out_resid = 0;
1494 osi->in_resid = 0;
1495 return 0; 1502 return 0;
1496 }
1497 1503
1498 osi = osi ? : &local_osi; 1504 osi = osi ? : &local_osi;
1499 memset(osi, 0, sizeof(*osi)); 1505 memset(osi, 0, sizeof(*osi));
1500 1506
1501 ssdb = or->request->sense; 1507 ssdb = (typeof(ssdb))or->sense;
1502 sense_len = or->request->sense_len; 1508 sense_len = or->sense_len;
1503 if ((sense_len < (int)sizeof(*ssdb) || !ssdb->sense_key)) { 1509 if ((sense_len < (int)sizeof(*ssdb) || !ssdb->sense_key)) {
1504 OSD_ERR("Block-layer returned error(0x%x) but " 1510 OSD_ERR("Block-layer returned error(0x%x) but "
1505 "sense_len(%u) || key(%d) is empty\n", 1511 "sense_len(%u) || key(%d) is empty\n",
1506 or->request->errors, sense_len, ssdb->sense_key); 1512 or->req_errors, sense_len, ssdb->sense_key);
1507 goto analyze; 1513 goto analyze;
1508 } 1514 }
1509 1515
@@ -1525,7 +1531,7 @@ int osd_req_decode_sense_full(struct osd_request *or,
1525 "additional_code=0x%x async_error=%d errors=0x%x\n", 1531 "additional_code=0x%x async_error=%d errors=0x%x\n",
1526 osi->key, original_sense_len, sense_len, 1532 osi->key, original_sense_len, sense_len,
1527 osi->additional_code, or->async_error, 1533 osi->additional_code, or->async_error,
1528 or->request->errors); 1534 or->req_errors);
1529 1535
1530 if (original_sense_len < sense_len) 1536 if (original_sense_len < sense_len)
1531 sense_len = original_sense_len; 1537 sense_len = original_sense_len;
@@ -1695,10 +1701,10 @@ analyze:
1695 ret = -EIO; 1701 ret = -EIO;
1696 } 1702 }
1697 1703
1698 if (or->out.req) 1704 if (!or->out.residual)
1699 osi->out_resid = or->out.req->resid_len ?: or->out.total_bytes; 1705 or->out.residual = or->out.total_bytes;
1700 if (or->in.req) 1706 if (!or->in.residual)
1701 osi->in_resid = or->in.req->resid_len ?: or->in.total_bytes; 1707 or->in.residual = or->in.total_bytes;
1702 1708
1703 return ret; 1709 return ret;
1704} 1710}
diff --git a/drivers/scsi/pm8001/pm8001_ctl.h b/drivers/scsi/pm8001/pm8001_ctl.h
index 22644de26399..63ad4aa0c422 100644
--- a/drivers/scsi/pm8001/pm8001_ctl.h
+++ b/drivers/scsi/pm8001/pm8001_ctl.h
@@ -45,16 +45,6 @@
45#define HEADER_LEN 28 45#define HEADER_LEN 28
46#define SIZE_OFFSET 16 46#define SIZE_OFFSET 16
47 47
48struct pm8001_ioctl_payload {
49 u32 signature;
50 u16 major_function;
51 u16 minor_function;
52 u16 length;
53 u16 status;
54 u16 offset;
55 u16 id;
56 u8 func_specific[1];
57};
58 48
59#define FLASH_OK 0x000000 49#define FLASH_OK 0x000000
60#define FAIL_OPEN_BIOS_FILE 0x000100 50#define FAIL_OPEN_BIOS_FILE 0x000100
diff --git a/drivers/scsi/pm8001/pm8001_hwi.c b/drivers/scsi/pm8001/pm8001_hwi.c
index a3de306b9045..9b44c6f1b10e 100644
--- a/drivers/scsi/pm8001/pm8001_hwi.c
+++ b/drivers/scsi/pm8001/pm8001_hwi.c
@@ -373,10 +373,7 @@ static int bar4_shift(struct pm8001_hba_info *pm8001_ha, u32 shiftValue)
373static void __devinit 373static void __devinit
374mpi_set_phys_g3_with_ssc(struct pm8001_hba_info *pm8001_ha, u32 SSCbit) 374mpi_set_phys_g3_with_ssc(struct pm8001_hba_info *pm8001_ha, u32 SSCbit)
375{ 375{
376 u32 offset; 376 u32 value, offset, i;
377 u32 value;
378 u32 i, j;
379 u32 bit_cnt;
380 377
381#define SAS2_SETTINGS_LOCAL_PHY_0_3_SHIFT_ADDR 0x00030000 378#define SAS2_SETTINGS_LOCAL_PHY_0_3_SHIFT_ADDR 0x00030000
382#define SAS2_SETTINGS_LOCAL_PHY_4_7_SHIFT_ADDR 0x00040000 379#define SAS2_SETTINGS_LOCAL_PHY_4_7_SHIFT_ADDR 0x00040000
@@ -392,55 +389,35 @@ mpi_set_phys_g3_with_ssc(struct pm8001_hba_info *pm8001_ha, u32 SSCbit)
392 */ 389 */
393 if (-1 == bar4_shift(pm8001_ha, SAS2_SETTINGS_LOCAL_PHY_0_3_SHIFT_ADDR)) 390 if (-1 == bar4_shift(pm8001_ha, SAS2_SETTINGS_LOCAL_PHY_0_3_SHIFT_ADDR))
394 return; 391 return;
395 /* set SSC bit of PHY 0 - 3 */ 392
396 for (i = 0; i < 4; i++) { 393 for (i = 0; i < 4; i++) {
397 offset = SAS2_SETTINGS_LOCAL_PHY_0_3_OFFSET + 0x4000 * i; 394 offset = SAS2_SETTINGS_LOCAL_PHY_0_3_OFFSET + 0x4000 * i;
398 value = pm8001_cr32(pm8001_ha, 2, offset); 395 pm8001_cw32(pm8001_ha, 2, offset, 0x80001501);
399 if (SSCbit) {
400 value |= 0x00000001 << PHY_G3_WITH_SSC_BIT_SHIFT;
401 value &= ~(0x00000001 << PHY_G3_WITHOUT_SSC_BIT_SHIFT);
402 } else {
403 value |= 0x00000001 << PHY_G3_WITHOUT_SSC_BIT_SHIFT;
404 value &= ~(0x00000001 << PHY_G3_WITH_SSC_BIT_SHIFT);
405 }
406 bit_cnt = 0;
407 for (j = 0; j < 31; j++)
408 if ((value >> j) & 0x00000001)
409 bit_cnt++;
410 if (bit_cnt % 2)
411 value &= ~(0x00000001 << SNW3_PHY_CAPABILITIES_PARITY);
412 else
413 value |= 0x00000001 << SNW3_PHY_CAPABILITIES_PARITY;
414
415 pm8001_cw32(pm8001_ha, 2, offset, value);
416 } 396 }
417
418 /* shift membase 3 for SAS2_SETTINGS_LOCAL_PHY 4 - 7 */ 397 /* shift membase 3 for SAS2_SETTINGS_LOCAL_PHY 4 - 7 */
419 if (-1 == bar4_shift(pm8001_ha, SAS2_SETTINGS_LOCAL_PHY_4_7_SHIFT_ADDR)) 398 if (-1 == bar4_shift(pm8001_ha, SAS2_SETTINGS_LOCAL_PHY_4_7_SHIFT_ADDR))
420 return; 399 return;
421
422 /* set SSC bit of PHY 4 - 7 */
423 for (i = 4; i < 8; i++) { 400 for (i = 4; i < 8; i++) {
424 offset = SAS2_SETTINGS_LOCAL_PHY_4_7_OFFSET + 0x4000 * (i-4); 401 offset = SAS2_SETTINGS_LOCAL_PHY_4_7_OFFSET + 0x4000 * (i-4);
425 value = pm8001_cr32(pm8001_ha, 2, offset); 402 pm8001_cw32(pm8001_ha, 2, offset, 0x80001501);
426 if (SSCbit) {
427 value |= 0x00000001 << PHY_G3_WITH_SSC_BIT_SHIFT;
428 value &= ~(0x00000001 << PHY_G3_WITHOUT_SSC_BIT_SHIFT);
429 } else {
430 value |= 0x00000001 << PHY_G3_WITHOUT_SSC_BIT_SHIFT;
431 value &= ~(0x00000001 << PHY_G3_WITH_SSC_BIT_SHIFT);
432 }
433 bit_cnt = 0;
434 for (j = 0; j < 31; j++)
435 if ((value >> j) & 0x00000001)
436 bit_cnt++;
437 if (bit_cnt % 2)
438 value &= ~(0x00000001 << SNW3_PHY_CAPABILITIES_PARITY);
439 else
440 value |= 0x00000001 << SNW3_PHY_CAPABILITIES_PARITY;
441
442 pm8001_cw32(pm8001_ha, 2, offset, value);
443 } 403 }
404 /*************************************************************
405 Change the SSC upspreading value to 0x0 so that upspreading is disabled.
406 Device MABC SMOD0 Controls
407 Address: (via MEMBASE-III):
408 Using shifted destination address 0x0_0000: with Offset 0xD8
409
410 31:28 R/W Reserved Do not change
411 27:24 R/W SAS_SMOD_SPRDUP 0000
412 23:20 R/W SAS_SMOD_SPRDDN 0000
413 19:0 R/W Reserved Do not change
414 Upon power-up this register will read as 0x8990c016,
415 and I would like you to change the SAS_SMOD_SPRDUP bits to 0b0000
416 so that the written value will be 0x8090c016.
417 This will ensure only down-spreading SSC is enabled on the SPC.
418 *************************************************************/
419 value = pm8001_cr32(pm8001_ha, 2, 0xd8);
420 pm8001_cw32(pm8001_ha, 2, 0xd8, 0x8000C016);
444 421
445 /*set the shifted destination address to 0x0 to avoid error operation */ 422 /*set the shifted destination address to 0x0 to avoid error operation */
446 bar4_shift(pm8001_ha, 0x0); 423 bar4_shift(pm8001_ha, 0x0);
@@ -1901,7 +1878,7 @@ mpi_sata_completion(struct pm8001_hba_info *pm8001_ha, void *piomb)
1901{ 1878{
1902 struct sas_task *t; 1879 struct sas_task *t;
1903 struct pm8001_ccb_info *ccb; 1880 struct pm8001_ccb_info *ccb;
1904 unsigned long flags; 1881 unsigned long flags = 0;
1905 u32 param; 1882 u32 param;
1906 u32 status; 1883 u32 status;
1907 u32 tag; 1884 u32 tag;
@@ -2040,7 +2017,9 @@ mpi_sata_completion(struct pm8001_hba_info *pm8001_ha, void *piomb)
2040 ts->stat = SAS_QUEUE_FULL; 2017 ts->stat = SAS_QUEUE_FULL;
2041 pm8001_ccb_task_free(pm8001_ha, t, ccb, tag); 2018 pm8001_ccb_task_free(pm8001_ha, t, ccb, tag);
2042 mb();/*in order to force CPU ordering*/ 2019 mb();/*in order to force CPU ordering*/
2020 spin_unlock_irqrestore(&pm8001_ha->lock, flags);
2043 t->task_done(t); 2021 t->task_done(t);
2022 spin_lock_irqsave(&pm8001_ha->lock, flags);
2044 return; 2023 return;
2045 } 2024 }
2046 break; 2025 break;
@@ -2058,7 +2037,9 @@ mpi_sata_completion(struct pm8001_hba_info *pm8001_ha, void *piomb)
2058 ts->stat = SAS_QUEUE_FULL; 2037 ts->stat = SAS_QUEUE_FULL;
2059 pm8001_ccb_task_free(pm8001_ha, t, ccb, tag); 2038 pm8001_ccb_task_free(pm8001_ha, t, ccb, tag);
2060 mb();/*ditto*/ 2039 mb();/*ditto*/
2040 spin_unlock_irqrestore(&pm8001_ha->lock, flags);
2061 t->task_done(t); 2041 t->task_done(t);
2042 spin_lock_irqsave(&pm8001_ha->lock, flags);
2062 return; 2043 return;
2063 } 2044 }
2064 break; 2045 break;
@@ -2084,7 +2065,9 @@ mpi_sata_completion(struct pm8001_hba_info *pm8001_ha, void *piomb)
2084 ts->stat = SAS_QUEUE_FULL; 2065 ts->stat = SAS_QUEUE_FULL;
2085 pm8001_ccb_task_free(pm8001_ha, t, ccb, tag); 2066 pm8001_ccb_task_free(pm8001_ha, t, ccb, tag);
2086 mb();/* ditto*/ 2067 mb();/* ditto*/
2068 spin_unlock_irqrestore(&pm8001_ha->lock, flags);
2087 t->task_done(t); 2069 t->task_done(t);
2070 spin_lock_irqsave(&pm8001_ha->lock, flags);
2088 return; 2071 return;
2089 } 2072 }
2090 break; 2073 break;
@@ -2149,7 +2132,9 @@ mpi_sata_completion(struct pm8001_hba_info *pm8001_ha, void *piomb)
2149 ts->stat = SAS_QUEUE_FULL; 2132 ts->stat = SAS_QUEUE_FULL;
2150 pm8001_ccb_task_free(pm8001_ha, t, ccb, tag); 2133 pm8001_ccb_task_free(pm8001_ha, t, ccb, tag);
2151 mb();/*ditto*/ 2134 mb();/*ditto*/
2135 spin_unlock_irqrestore(&pm8001_ha->lock, flags);
2152 t->task_done(t); 2136 t->task_done(t);
2137 spin_lock_irqsave(&pm8001_ha->lock, flags);
2153 return; 2138 return;
2154 } 2139 }
2155 break; 2140 break;
@@ -2171,7 +2156,9 @@ mpi_sata_completion(struct pm8001_hba_info *pm8001_ha, void *piomb)
2171 ts->stat = SAS_QUEUE_FULL; 2156 ts->stat = SAS_QUEUE_FULL;
2172 pm8001_ccb_task_free(pm8001_ha, t, ccb, tag); 2157 pm8001_ccb_task_free(pm8001_ha, t, ccb, tag);
2173 mb();/*ditto*/ 2158 mb();/*ditto*/
2159 spin_unlock_irqrestore(&pm8001_ha->lock, flags);
2174 t->task_done(t); 2160 t->task_done(t);
2161 spin_lock_irqsave(&pm8001_ha->lock, flags);
2175 return; 2162 return;
2176 } 2163 }
2177 break; 2164 break;
@@ -2200,11 +2187,20 @@ mpi_sata_completion(struct pm8001_hba_info *pm8001_ha, void *piomb)
2200 " resp 0x%x stat 0x%x but aborted by upper layer!\n", 2187 " resp 0x%x stat 0x%x but aborted by upper layer!\n",
2201 t, status, ts->resp, ts->stat)); 2188 t, status, ts->resp, ts->stat));
2202 pm8001_ccb_task_free(pm8001_ha, t, ccb, tag); 2189 pm8001_ccb_task_free(pm8001_ha, t, ccb, tag);
2203 } else { 2190 } else if (t->uldd_task) {
2204 spin_unlock_irqrestore(&t->task_state_lock, flags); 2191 spin_unlock_irqrestore(&t->task_state_lock, flags);
2205 pm8001_ccb_task_free(pm8001_ha, t, ccb, tag); 2192 pm8001_ccb_task_free(pm8001_ha, t, ccb, tag);
2206 mb();/* ditto */ 2193 mb();/* ditto */
2194 spin_unlock_irqrestore(&pm8001_ha->lock, flags);
2207 t->task_done(t); 2195 t->task_done(t);
2196 spin_lock_irqsave(&pm8001_ha->lock, flags);
2197 } else if (!t->uldd_task) {
2198 spin_unlock_irqrestore(&t->task_state_lock, flags);
2199 pm8001_ccb_task_free(pm8001_ha, t, ccb, tag);
2200 mb();/*ditto*/
2201 spin_unlock_irqrestore(&pm8001_ha->lock, flags);
2202 t->task_done(t);
2203 spin_lock_irqsave(&pm8001_ha->lock, flags);
2208 } 2204 }
2209} 2205}
2210 2206
@@ -2212,7 +2208,7 @@ mpi_sata_completion(struct pm8001_hba_info *pm8001_ha, void *piomb)
2212static void mpi_sata_event(struct pm8001_hba_info *pm8001_ha , void *piomb) 2208static void mpi_sata_event(struct pm8001_hba_info *pm8001_ha , void *piomb)
2213{ 2209{
2214 struct sas_task *t; 2210 struct sas_task *t;
2215 unsigned long flags; 2211 unsigned long flags = 0;
2216 struct task_status_struct *ts; 2212 struct task_status_struct *ts;
2217 struct pm8001_ccb_info *ccb; 2213 struct pm8001_ccb_info *ccb;
2218 struct pm8001_device *pm8001_dev; 2214 struct pm8001_device *pm8001_dev;
@@ -2292,7 +2288,9 @@ static void mpi_sata_event(struct pm8001_hba_info *pm8001_ha , void *piomb)
2292 ts->stat = SAS_QUEUE_FULL; 2288 ts->stat = SAS_QUEUE_FULL;
2293 pm8001_ccb_task_free(pm8001_ha, t, ccb, tag); 2289 pm8001_ccb_task_free(pm8001_ha, t, ccb, tag);
2294 mb();/*ditto*/ 2290 mb();/*ditto*/
2291 spin_unlock_irqrestore(&pm8001_ha->lock, flags);
2295 t->task_done(t); 2292 t->task_done(t);
2293 spin_lock_irqsave(&pm8001_ha->lock, flags);
2296 return; 2294 return;
2297 } 2295 }
2298 break; 2296 break;
@@ -2401,11 +2399,20 @@ static void mpi_sata_event(struct pm8001_hba_info *pm8001_ha , void *piomb)
2401 " resp 0x%x stat 0x%x but aborted by upper layer!\n", 2399 " resp 0x%x stat 0x%x but aborted by upper layer!\n",
2402 t, event, ts->resp, ts->stat)); 2400 t, event, ts->resp, ts->stat));
2403 pm8001_ccb_task_free(pm8001_ha, t, ccb, tag); 2401 pm8001_ccb_task_free(pm8001_ha, t, ccb, tag);
2404 } else { 2402 } else if (t->uldd_task) {
2405 spin_unlock_irqrestore(&t->task_state_lock, flags); 2403 spin_unlock_irqrestore(&t->task_state_lock, flags);
2406 pm8001_ccb_task_free(pm8001_ha, t, ccb, tag); 2404 pm8001_ccb_task_free(pm8001_ha, t, ccb, tag);
2407 mb();/* in order to force CPU ordering */ 2405 mb();/* ditto */
2406 spin_unlock_irqrestore(&pm8001_ha->lock, flags);
2408 t->task_done(t); 2407 t->task_done(t);
2408 spin_lock_irqsave(&pm8001_ha->lock, flags);
2409 } else if (!t->uldd_task) {
2410 spin_unlock_irqrestore(&t->task_state_lock, flags);
2411 pm8001_ccb_task_free(pm8001_ha, t, ccb, tag);
2412 mb();/*ditto*/
2413 spin_unlock_irqrestore(&pm8001_ha->lock, flags);
2414 t->task_done(t);
2415 spin_lock_irqsave(&pm8001_ha->lock, flags);
2409 } 2416 }
2410} 2417}
2411 2418
@@ -2876,15 +2883,20 @@ hw_event_sas_phy_up(struct pm8001_hba_info *pm8001_ha, void *piomb)
2876 le32_to_cpu(pPayload->lr_evt_status_phyid_portid); 2883 le32_to_cpu(pPayload->lr_evt_status_phyid_portid);
2877 u8 link_rate = 2884 u8 link_rate =
2878 (u8)((lr_evt_status_phyid_portid & 0xF0000000) >> 28); 2885 (u8)((lr_evt_status_phyid_portid & 0xF0000000) >> 28);
2886 u8 port_id = (u8)(lr_evt_status_phyid_portid & 0x0000000F);
2879 u8 phy_id = 2887 u8 phy_id =
2880 (u8)((lr_evt_status_phyid_portid & 0x000000F0) >> 4); 2888 (u8)((lr_evt_status_phyid_portid & 0x000000F0) >> 4);
2889 u32 npip_portstate = le32_to_cpu(pPayload->npip_portstate);
2890 u8 portstate = (u8)(npip_portstate & 0x0000000F);
2891 struct pm8001_port *port = &pm8001_ha->port[port_id];
2881 struct sas_ha_struct *sas_ha = pm8001_ha->sas; 2892 struct sas_ha_struct *sas_ha = pm8001_ha->sas;
2882 struct pm8001_phy *phy = &pm8001_ha->phy[phy_id]; 2893 struct pm8001_phy *phy = &pm8001_ha->phy[phy_id];
2883 unsigned long flags; 2894 unsigned long flags;
2884 u8 deviceType = pPayload->sas_identify.dev_type; 2895 u8 deviceType = pPayload->sas_identify.dev_type;
2885 2896 port->port_state = portstate;
2886 PM8001_MSG_DBG(pm8001_ha, 2897 PM8001_MSG_DBG(pm8001_ha,
2887 pm8001_printk("HW_EVENT_SAS_PHY_UP \n")); 2898 pm8001_printk("HW_EVENT_SAS_PHY_UP port id = %d, phy id = %d\n",
2899 port_id, phy_id));
2888 2900
2889 switch (deviceType) { 2901 switch (deviceType) {
2890 case SAS_PHY_UNUSED: 2902 case SAS_PHY_UNUSED:
@@ -2895,16 +2907,19 @@ hw_event_sas_phy_up(struct pm8001_hba_info *pm8001_ha, void *piomb)
2895 PM8001_MSG_DBG(pm8001_ha, pm8001_printk("end device.\n")); 2907 PM8001_MSG_DBG(pm8001_ha, pm8001_printk("end device.\n"));
2896 pm8001_chip_phy_ctl_req(pm8001_ha, phy_id, 2908 pm8001_chip_phy_ctl_req(pm8001_ha, phy_id,
2897 PHY_NOTIFY_ENABLE_SPINUP); 2909 PHY_NOTIFY_ENABLE_SPINUP);
2910 port->port_attached = 1;
2898 get_lrate_mode(phy, link_rate); 2911 get_lrate_mode(phy, link_rate);
2899 break; 2912 break;
2900 case SAS_EDGE_EXPANDER_DEVICE: 2913 case SAS_EDGE_EXPANDER_DEVICE:
2901 PM8001_MSG_DBG(pm8001_ha, 2914 PM8001_MSG_DBG(pm8001_ha,
2902 pm8001_printk("expander device.\n")); 2915 pm8001_printk("expander device.\n"));
2916 port->port_attached = 1;
2903 get_lrate_mode(phy, link_rate); 2917 get_lrate_mode(phy, link_rate);
2904 break; 2918 break;
2905 case SAS_FANOUT_EXPANDER_DEVICE: 2919 case SAS_FANOUT_EXPANDER_DEVICE:
2906 PM8001_MSG_DBG(pm8001_ha, 2920 PM8001_MSG_DBG(pm8001_ha,
2907 pm8001_printk("fanout expander device.\n")); 2921 pm8001_printk("fanout expander device.\n"));
2922 port->port_attached = 1;
2908 get_lrate_mode(phy, link_rate); 2923 get_lrate_mode(phy, link_rate);
2909 break; 2924 break;
2910 default: 2925 default:
@@ -2946,11 +2961,20 @@ hw_event_sata_phy_up(struct pm8001_hba_info *pm8001_ha, void *piomb)
2946 le32_to_cpu(pPayload->lr_evt_status_phyid_portid); 2961 le32_to_cpu(pPayload->lr_evt_status_phyid_portid);
2947 u8 link_rate = 2962 u8 link_rate =
2948 (u8)((lr_evt_status_phyid_portid & 0xF0000000) >> 28); 2963 (u8)((lr_evt_status_phyid_portid & 0xF0000000) >> 28);
2964 u8 port_id = (u8)(lr_evt_status_phyid_portid & 0x0000000F);
2949 u8 phy_id = 2965 u8 phy_id =
2950 (u8)((lr_evt_status_phyid_portid & 0x000000F0) >> 4); 2966 (u8)((lr_evt_status_phyid_portid & 0x000000F0) >> 4);
2967 u32 npip_portstate = le32_to_cpu(pPayload->npip_portstate);
2968 u8 portstate = (u8)(npip_portstate & 0x0000000F);
2969 struct pm8001_port *port = &pm8001_ha->port[port_id];
2951 struct sas_ha_struct *sas_ha = pm8001_ha->sas; 2970 struct sas_ha_struct *sas_ha = pm8001_ha->sas;
2952 struct pm8001_phy *phy = &pm8001_ha->phy[phy_id]; 2971 struct pm8001_phy *phy = &pm8001_ha->phy[phy_id];
2953 unsigned long flags; 2972 unsigned long flags;
2973 PM8001_MSG_DBG(pm8001_ha,
2974 pm8001_printk("HW_EVENT_SATA_PHY_UP port id = %d,"
2975 " phy id = %d\n", port_id, phy_id));
2976 port->port_state = portstate;
2977 port->port_attached = 1;
2954 get_lrate_mode(phy, link_rate); 2978 get_lrate_mode(phy, link_rate);
2955 phy->phy_type |= PORT_TYPE_SATA; 2979 phy->phy_type |= PORT_TYPE_SATA;
2956 phy->phy_attached = 1; 2980 phy->phy_attached = 1;
@@ -2984,7 +3008,13 @@ hw_event_phy_down(struct pm8001_hba_info *pm8001_ha, void *piomb)
2984 (u8)((lr_evt_status_phyid_portid & 0x000000F0) >> 4); 3008 (u8)((lr_evt_status_phyid_portid & 0x000000F0) >> 4);
2985 u32 npip_portstate = le32_to_cpu(pPayload->npip_portstate); 3009 u32 npip_portstate = le32_to_cpu(pPayload->npip_portstate);
2986 u8 portstate = (u8)(npip_portstate & 0x0000000F); 3010 u8 portstate = (u8)(npip_portstate & 0x0000000F);
2987 3011 struct pm8001_port *port = &pm8001_ha->port[port_id];
3012 struct pm8001_phy *phy = &pm8001_ha->phy[phy_id];
3013 port->port_state = portstate;
3014 phy->phy_type = 0;
3015 phy->identify.device_type = 0;
3016 phy->phy_attached = 0;
3017 memset(&phy->dev_sas_addr, 0, SAS_ADDR_SIZE);
2988 switch (portstate) { 3018 switch (portstate) {
2989 case PORT_VALID: 3019 case PORT_VALID:
2990 break; 3020 break;
@@ -2993,26 +3023,30 @@ hw_event_phy_down(struct pm8001_hba_info *pm8001_ha, void *piomb)
2993 pm8001_printk(" PortInvalid portID %d \n", port_id)); 3023 pm8001_printk(" PortInvalid portID %d \n", port_id));
2994 PM8001_MSG_DBG(pm8001_ha, 3024 PM8001_MSG_DBG(pm8001_ha,
2995 pm8001_printk(" Last phy Down and port invalid\n")); 3025 pm8001_printk(" Last phy Down and port invalid\n"));
3026 port->port_attached = 0;
2996 pm8001_hw_event_ack_req(pm8001_ha, 0, HW_EVENT_PHY_DOWN, 3027 pm8001_hw_event_ack_req(pm8001_ha, 0, HW_EVENT_PHY_DOWN,
2997 port_id, phy_id, 0, 0); 3028 port_id, phy_id, 0, 0);
2998 break; 3029 break;
2999 case PORT_IN_RESET: 3030 case PORT_IN_RESET:
3000 PM8001_MSG_DBG(pm8001_ha, 3031 PM8001_MSG_DBG(pm8001_ha,
3001 pm8001_printk(" PortInReset portID %d \n", port_id)); 3032 pm8001_printk(" Port In Reset portID %d \n", port_id));
3002 break; 3033 break;
3003 case PORT_NOT_ESTABLISHED: 3034 case PORT_NOT_ESTABLISHED:
3004 PM8001_MSG_DBG(pm8001_ha, 3035 PM8001_MSG_DBG(pm8001_ha,
3005 pm8001_printk(" phy Down and PORT_NOT_ESTABLISHED\n")); 3036 pm8001_printk(" phy Down and PORT_NOT_ESTABLISHED\n"));
3037 port->port_attached = 0;
3006 break; 3038 break;
3007 case PORT_LOSTCOMM: 3039 case PORT_LOSTCOMM:
3008 PM8001_MSG_DBG(pm8001_ha, 3040 PM8001_MSG_DBG(pm8001_ha,
3009 pm8001_printk(" phy Down and PORT_LOSTCOMM\n")); 3041 pm8001_printk(" phy Down and PORT_LOSTCOMM\n"));
3010 PM8001_MSG_DBG(pm8001_ha, 3042 PM8001_MSG_DBG(pm8001_ha,
3011 pm8001_printk(" Last phy Down and port invalid\n")); 3043 pm8001_printk(" Last phy Down and port invalid\n"));
3044 port->port_attached = 0;
3012 pm8001_hw_event_ack_req(pm8001_ha, 0, HW_EVENT_PHY_DOWN, 3045 pm8001_hw_event_ack_req(pm8001_ha, 0, HW_EVENT_PHY_DOWN,
3013 port_id, phy_id, 0, 0); 3046 port_id, phy_id, 0, 0);
3014 break; 3047 break;
3015 default: 3048 default:
3049 port->port_attached = 0;
3016 PM8001_MSG_DBG(pm8001_ha, 3050 PM8001_MSG_DBG(pm8001_ha,
3017 pm8001_printk(" phy Down and(default) = %x\n", 3051 pm8001_printk(" phy Down and(default) = %x\n",
3018 portstate)); 3052 portstate));
@@ -3770,7 +3804,8 @@ static int pm8001_chip_ssp_io_req(struct pm8001_hba_info *pm8001_ha,
3770 u32 opc = OPC_INB_SSPINIIOSTART; 3804 u32 opc = OPC_INB_SSPINIIOSTART;
3771 memset(&ssp_cmd, 0, sizeof(ssp_cmd)); 3805 memset(&ssp_cmd, 0, sizeof(ssp_cmd));
3772 memcpy(ssp_cmd.ssp_iu.lun, task->ssp_task.LUN, 8); 3806 memcpy(ssp_cmd.ssp_iu.lun, task->ssp_task.LUN, 8);
3773 ssp_cmd.dir_m_tlr = data_dir_flags[task->data_dir] << 8 | 0x0;/*0 for 3807 ssp_cmd.dir_m_tlr =
3808 cpu_to_le32(data_dir_flags[task->data_dir] << 8 | 0x0);/*0 for
3774 SAS 1.1 compatible TLR*/ 3809 SAS 1.1 compatible TLR*/
3775 ssp_cmd.data_len = cpu_to_le32(task->total_xfer_len); 3810 ssp_cmd.data_len = cpu_to_le32(task->total_xfer_len);
3776 ssp_cmd.device_id = cpu_to_le32(pm8001_dev->device_id); 3811 ssp_cmd.device_id = cpu_to_le32(pm8001_dev->device_id);
@@ -3841,7 +3876,7 @@ static int pm8001_chip_sata_req(struct pm8001_hba_info *pm8001_ha,
3841 } 3876 }
3842 } 3877 }
3843 if (task->ata_task.use_ncq && pm8001_get_ncq_tag(task, &hdr_tag)) 3878 if (task->ata_task.use_ncq && pm8001_get_ncq_tag(task, &hdr_tag))
3844 ncg_tag = cpu_to_le32(hdr_tag); 3879 ncg_tag = hdr_tag;
3845 dir = data_dir_flags[task->data_dir] << 8; 3880 dir = data_dir_flags[task->data_dir] << 8;
3846 sata_cmd.tag = cpu_to_le32(tag); 3881 sata_cmd.tag = cpu_to_le32(tag);
3847 sata_cmd.device_id = cpu_to_le32(pm8001_ha_dev->device_id); 3882 sata_cmd.device_id = cpu_to_le32(pm8001_ha_dev->device_id);
@@ -3986,7 +4021,7 @@ static int pm8001_chip_reg_dev_req(struct pm8001_hba_info *pm8001_ha,
3986 ((stp_sspsmp_sata & 0x03) * 0x10000000)); 4021 ((stp_sspsmp_sata & 0x03) * 0x10000000));
3987 payload.firstburstsize_ITNexustimeout = 4022 payload.firstburstsize_ITNexustimeout =
3988 cpu_to_le32(ITNT | (firstBurstSize * 0x10000)); 4023 cpu_to_le32(ITNT | (firstBurstSize * 0x10000));
3989 memcpy(&payload.sas_addr_hi, pm8001_dev->sas_device->sas_addr, 4024 memcpy(payload.sas_addr, pm8001_dev->sas_device->sas_addr,
3990 SAS_ADDR_SIZE); 4025 SAS_ADDR_SIZE);
3991 rc = mpi_build_cmd(pm8001_ha, circularQ, opc, &payload); 4026 rc = mpi_build_cmd(pm8001_ha, circularQ, opc, &payload);
3992 return rc; 4027 return rc;
@@ -4027,7 +4062,7 @@ static int pm8001_chip_phy_ctl_req(struct pm8001_hba_info *pm8001_ha,
4027 struct inbound_queue_table *circularQ; 4062 struct inbound_queue_table *circularQ;
4028 int ret; 4063 int ret;
4029 u32 opc = OPC_INB_LOCAL_PHY_CONTROL; 4064 u32 opc = OPC_INB_LOCAL_PHY_CONTROL;
4030 memset((u8 *)&payload, 0, sizeof(payload)); 4065 memset(&payload, 0, sizeof(payload));
4031 circularQ = &pm8001_ha->inbnd_q_tbl[0]; 4066 circularQ = &pm8001_ha->inbnd_q_tbl[0];
4032 payload.tag = 1; 4067 payload.tag = 1;
4033 payload.phyop_phyid = 4068 payload.phyop_phyid =
diff --git a/drivers/scsi/pm8001/pm8001_hwi.h b/drivers/scsi/pm8001/pm8001_hwi.h
index 96e4daa68b8f..833a5201eda4 100644
--- a/drivers/scsi/pm8001/pm8001_hwi.h
+++ b/drivers/scsi/pm8001/pm8001_hwi.h
@@ -242,8 +242,7 @@ struct reg_dev_req {
242 __le32 phyid_portid; 242 __le32 phyid_portid;
243 __le32 dtype_dlr_retry; 243 __le32 dtype_dlr_retry;
244 __le32 firstburstsize_ITNexustimeout; 244 __le32 firstburstsize_ITNexustimeout;
245 u32 sas_addr_hi; 245 u8 sas_addr[SAS_ADDR_SIZE];
246 u32 sas_addr_low;
247 __le32 upper_device_id; 246 __le32 upper_device_id;
248 u32 reserved[8]; 247 u32 reserved[8];
249} __attribute__((packed, aligned(4))); 248} __attribute__((packed, aligned(4)));
diff --git a/drivers/scsi/pm8001/pm8001_init.c b/drivers/scsi/pm8001/pm8001_init.c
index 42ebe725d5a5..c2f1032496cb 100644
--- a/drivers/scsi/pm8001/pm8001_init.c
+++ b/drivers/scsi/pm8001/pm8001_init.c
@@ -200,8 +200,13 @@ static int __devinit pm8001_alloc(struct pm8001_hba_info *pm8001_ha)
200{ 200{
201 int i; 201 int i;
202 spin_lock_init(&pm8001_ha->lock); 202 spin_lock_init(&pm8001_ha->lock);
203 for (i = 0; i < pm8001_ha->chip->n_phy; i++) 203 for (i = 0; i < pm8001_ha->chip->n_phy; i++) {
204 pm8001_phy_init(pm8001_ha, i); 204 pm8001_phy_init(pm8001_ha, i);
205 pm8001_ha->port[i].wide_port_phymap = 0;
206 pm8001_ha->port[i].port_attached = 0;
207 pm8001_ha->port[i].port_state = 0;
208 INIT_LIST_HEAD(&pm8001_ha->port[i].list);
209 }
205 210
206 pm8001_ha->tags = kzalloc(PM8001_MAX_CCB, GFP_KERNEL); 211 pm8001_ha->tags = kzalloc(PM8001_MAX_CCB, GFP_KERNEL);
207 if (!pm8001_ha->tags) 212 if (!pm8001_ha->tags)
@@ -511,19 +516,23 @@ static void pm8001_init_sas_add(struct pm8001_hba_info *pm8001_ha)
511 u8 i; 516 u8 i;
512#ifdef PM8001_READ_VPD 517#ifdef PM8001_READ_VPD
513 DECLARE_COMPLETION_ONSTACK(completion); 518 DECLARE_COMPLETION_ONSTACK(completion);
519 struct pm8001_ioctl_payload payload;
514 pm8001_ha->nvmd_completion = &completion; 520 pm8001_ha->nvmd_completion = &completion;
515 PM8001_CHIP_DISP->get_nvmd_req(pm8001_ha, 0, 0); 521 payload.minor_function = 0;
522 payload.length = 128;
523 payload.func_specific = kzalloc(128, GFP_KERNEL);
524 PM8001_CHIP_DISP->get_nvmd_req(pm8001_ha, &payload);
516 wait_for_completion(&completion); 525 wait_for_completion(&completion);
517 for (i = 0; i < pm8001_ha->chip->n_phy; i++) { 526 for (i = 0; i < pm8001_ha->chip->n_phy; i++) {
518 memcpy(&pm8001_ha->phy[i].dev_sas_addr, pm8001_ha->sas_addr, 527 memcpy(&pm8001_ha->phy[i].dev_sas_addr, pm8001_ha->sas_addr,
519 SAS_ADDR_SIZE); 528 SAS_ADDR_SIZE);
520 PM8001_INIT_DBG(pm8001_ha, 529 PM8001_INIT_DBG(pm8001_ha,
521 pm8001_printk("phy %d sas_addr = %x \n", i, 530 pm8001_printk("phy %d sas_addr = %016llx \n", i,
522 (u64)pm8001_ha->phy[i].dev_sas_addr)); 531 pm8001_ha->phy[i].dev_sas_addr));
523 } 532 }
524#else 533#else
525 for (i = 0; i < pm8001_ha->chip->n_phy; i++) { 534 for (i = 0; i < pm8001_ha->chip->n_phy; i++) {
526 pm8001_ha->phy[i].dev_sas_addr = 0x500e004010000004ULL; 535 pm8001_ha->phy[i].dev_sas_addr = 0x50010c600047f9d0ULL;
527 pm8001_ha->phy[i].dev_sas_addr = 536 pm8001_ha->phy[i].dev_sas_addr =
528 cpu_to_be64((u64) 537 cpu_to_be64((u64)
529 (*(u64 *)&pm8001_ha->phy[i].dev_sas_addr)); 538 (*(u64 *)&pm8001_ha->phy[i].dev_sas_addr));
diff --git a/drivers/scsi/pm8001/pm8001_sas.c b/drivers/scsi/pm8001/pm8001_sas.c
index 1f767a0e727a..7f9c83a76390 100644
--- a/drivers/scsi/pm8001/pm8001_sas.c
+++ b/drivers/scsi/pm8001/pm8001_sas.c
@@ -329,6 +329,23 @@ int pm8001_slave_configure(struct scsi_device *sdev)
329 } 329 }
330 return 0; 330 return 0;
331} 331}
332 /* Find the local port id that's attached to this device */
333static int sas_find_local_port_id(struct domain_device *dev)
334{
335 struct domain_device *pdev = dev->parent;
336
337 /* Directly attached device */
338 if (!pdev)
339 return dev->port->id;
340 while (pdev) {
341 struct domain_device *pdev_p = pdev->parent;
342 if (!pdev_p)
343 return pdev->port->id;
344 pdev = pdev->parent;
345 }
346 return 0;
347}
348
332/** 349/**
333 * pm8001_task_exec - queue the task(ssp, smp && ata) to the hardware. 350 * pm8001_task_exec - queue the task(ssp, smp && ata) to the hardware.
334 * @task: the task to be execute. 351 * @task: the task to be execute.
@@ -346,11 +363,12 @@ static int pm8001_task_exec(struct sas_task *task, const int num,
346 struct domain_device *dev = task->dev; 363 struct domain_device *dev = task->dev;
347 struct pm8001_hba_info *pm8001_ha; 364 struct pm8001_hba_info *pm8001_ha;
348 struct pm8001_device *pm8001_dev; 365 struct pm8001_device *pm8001_dev;
366 struct pm8001_port *port = NULL;
349 struct sas_task *t = task; 367 struct sas_task *t = task;
350 struct pm8001_ccb_info *ccb; 368 struct pm8001_ccb_info *ccb;
351 u32 tag = 0xdeadbeef, rc, n_elem = 0; 369 u32 tag = 0xdeadbeef, rc, n_elem = 0;
352 u32 n = num; 370 u32 n = num;
353 unsigned long flags = 0; 371 unsigned long flags = 0, flags_libsas = 0;
354 372
355 if (!dev->port) { 373 if (!dev->port) {
356 struct task_status_struct *tsm = &t->task_status; 374 struct task_status_struct *tsm = &t->task_status;
@@ -379,6 +397,35 @@ static int pm8001_task_exec(struct sas_task *task, const int num,
379 rc = SAS_PHY_DOWN; 397 rc = SAS_PHY_DOWN;
380 goto out_done; 398 goto out_done;
381 } 399 }
400 port = &pm8001_ha->port[sas_find_local_port_id(dev)];
401 if (!port->port_attached) {
402 if (sas_protocol_ata(t->task_proto)) {
403 struct task_status_struct *ts = &t->task_status;
404 ts->resp = SAS_TASK_UNDELIVERED;
405 ts->stat = SAS_PHY_DOWN;
406
407 spin_unlock_irqrestore(&pm8001_ha->lock, flags);
408 spin_unlock_irqrestore(dev->sata_dev.ap->lock,
409 flags_libsas);
410 t->task_done(t);
411 spin_lock_irqsave(dev->sata_dev.ap->lock,
412 flags_libsas);
413 spin_lock_irqsave(&pm8001_ha->lock, flags);
414 if (n > 1)
415 t = list_entry(t->list.next,
416 struct sas_task, list);
417 continue;
418 } else {
419 struct task_status_struct *ts = &t->task_status;
420 ts->resp = SAS_TASK_UNDELIVERED;
421 ts->stat = SAS_PHY_DOWN;
422 t->task_done(t);
423 if (n > 1)
424 t = list_entry(t->list.next,
425 struct sas_task, list);
426 continue;
427 }
428 }
382 rc = pm8001_tag_alloc(pm8001_ha, &tag); 429 rc = pm8001_tag_alloc(pm8001_ha, &tag);
383 if (rc) 430 if (rc)
384 goto err_out; 431 goto err_out;
@@ -569,11 +616,11 @@ static int pm8001_dev_found_notify(struct domain_device *dev)
569 spin_lock_irqsave(&pm8001_ha->lock, flags); 616 spin_lock_irqsave(&pm8001_ha->lock, flags);
570 617
571 pm8001_device = pm8001_alloc_dev(pm8001_ha); 618 pm8001_device = pm8001_alloc_dev(pm8001_ha);
572 pm8001_device->sas_device = dev;
573 if (!pm8001_device) { 619 if (!pm8001_device) {
574 res = -1; 620 res = -1;
575 goto found_out; 621 goto found_out;
576 } 622 }
623 pm8001_device->sas_device = dev;
577 dev->lldd_dev = pm8001_device; 624 dev->lldd_dev = pm8001_device;
578 pm8001_device->dev_type = dev->dev_type; 625 pm8001_device->dev_type = dev->dev_type;
579 pm8001_device->dcompletion = &completion; 626 pm8001_device->dcompletion = &completion;
@@ -609,7 +656,7 @@ static int pm8001_dev_found_notify(struct domain_device *dev)
609 wait_for_completion(&completion); 656 wait_for_completion(&completion);
610 if (dev->dev_type == SAS_END_DEV) 657 if (dev->dev_type == SAS_END_DEV)
611 msleep(50); 658 msleep(50);
612 pm8001_ha->flags = PM8001F_RUN_TIME ; 659 pm8001_ha->flags |= PM8001F_RUN_TIME ;
613 return 0; 660 return 0;
614found_out: 661found_out:
615 spin_unlock_irqrestore(&pm8001_ha->lock, flags); 662 spin_unlock_irqrestore(&pm8001_ha->lock, flags);
@@ -772,7 +819,7 @@ pm8001_exec_internal_task_abort(struct pm8001_hba_info *pm8001_ha,
772 task->task_done = pm8001_task_done; 819 task->task_done = pm8001_task_done;
773 task->timer.data = (unsigned long)task; 820 task->timer.data = (unsigned long)task;
774 task->timer.function = pm8001_tmf_timedout; 821 task->timer.function = pm8001_tmf_timedout;
775 task->timer.expires = jiffies + PM8001_TASK_TIMEOUT*HZ; 822 task->timer.expires = jiffies + PM8001_TASK_TIMEOUT * HZ;
776 add_timer(&task->timer); 823 add_timer(&task->timer);
777 824
778 res = pm8001_tag_alloc(pm8001_ha, &ccb_tag); 825 res = pm8001_tag_alloc(pm8001_ha, &ccb_tag);
@@ -897,6 +944,8 @@ int pm8001_I_T_nexus_reset(struct domain_device *dev)
897 944
898 if (dev_is_sata(dev)) { 945 if (dev_is_sata(dev)) {
899 DECLARE_COMPLETION_ONSTACK(completion_setstate); 946 DECLARE_COMPLETION_ONSTACK(completion_setstate);
947 if (scsi_is_sas_phy_local(phy))
948 return 0;
900 rc = sas_phy_reset(phy, 1); 949 rc = sas_phy_reset(phy, 1);
901 msleep(2000); 950 msleep(2000);
902 rc = pm8001_exec_internal_task_abort(pm8001_ha, pm8001_dev , 951 rc = pm8001_exec_internal_task_abort(pm8001_ha, pm8001_dev ,
diff --git a/drivers/scsi/pm8001/pm8001_sas.h b/drivers/scsi/pm8001/pm8001_sas.h
index 30f2ede55a75..8e38ca8cd101 100644
--- a/drivers/scsi/pm8001/pm8001_sas.h
+++ b/drivers/scsi/pm8001/pm8001_sas.h
@@ -59,11 +59,11 @@
59 59
60#define DRV_NAME "pm8001" 60#define DRV_NAME "pm8001"
61#define DRV_VERSION "0.1.36" 61#define DRV_VERSION "0.1.36"
62#define PM8001_FAIL_LOGGING 0x01 /* libsas EH function logging */ 62#define PM8001_FAIL_LOGGING 0x01 /* Error message logging */
63#define PM8001_INIT_LOGGING 0x02 /* driver init logging */ 63#define PM8001_INIT_LOGGING 0x02 /* driver init logging */
64#define PM8001_DISC_LOGGING 0x04 /* discovery layer logging */ 64#define PM8001_DISC_LOGGING 0x04 /* discovery layer logging */
65#define PM8001_IO_LOGGING 0x08 /* I/O path logging */ 65#define PM8001_IO_LOGGING 0x08 /* I/O path logging */
66#define PM8001_EH_LOGGING 0x10 /* Error message logging */ 66#define PM8001_EH_LOGGING 0x10 /* libsas EH function logging*/
67#define PM8001_IOCTL_LOGGING 0x20 /* IOCTL message logging */ 67#define PM8001_IOCTL_LOGGING 0x20 /* IOCTL message logging */
68#define PM8001_MSG_LOGGING 0x40 /* misc message logging */ 68#define PM8001_MSG_LOGGING 0x40 /* misc message logging */
69#define pm8001_printk(format, arg...) printk(KERN_INFO "%s %d:" format,\ 69#define pm8001_printk(format, arg...) printk(KERN_INFO "%s %d:" format,\
@@ -100,6 +100,7 @@ do { \
100 100
101#define PM8001_USE_TASKLET 101#define PM8001_USE_TASKLET
102#define PM8001_USE_MSIX 102#define PM8001_USE_MSIX
103#define PM8001_READ_VPD
103 104
104 105
105#define DEV_IS_EXPANDER(type) ((type == EDGE_DEV) || (type == FANOUT_DEV)) 106#define DEV_IS_EXPANDER(type) ((type == EDGE_DEV) || (type == FANOUT_DEV))
@@ -111,7 +112,22 @@ extern const struct pm8001_dispatch pm8001_8001_dispatch;
111struct pm8001_hba_info; 112struct pm8001_hba_info;
112struct pm8001_ccb_info; 113struct pm8001_ccb_info;
113struct pm8001_device; 114struct pm8001_device;
114struct pm8001_tmf_task; 115/* define task management IU */
116struct pm8001_tmf_task {
117 u8 tmf;
118 u32 tag_of_task_to_be_managed;
119};
120struct pm8001_ioctl_payload {
121 u32 signature;
122 u16 major_function;
123 u16 minor_function;
124 u16 length;
125 u16 status;
126 u16 offset;
127 u16 id;
128 u8 *func_specific;
129};
130
115struct pm8001_dispatch { 131struct pm8001_dispatch {
116 char *name; 132 char *name;
117 int (*chip_init)(struct pm8001_hba_info *pm8001_ha); 133 int (*chip_init)(struct pm8001_hba_info *pm8001_ha);
@@ -164,6 +180,10 @@ struct pm8001_chip_info {
164 180
165struct pm8001_port { 181struct pm8001_port {
166 struct asd_sas_port sas_port; 182 struct asd_sas_port sas_port;
183 u8 port_attached;
184 u8 wide_port_phymap;
185 u8 port_state;
186 struct list_head list;
167}; 187};
168 188
169struct pm8001_phy { 189struct pm8001_phy {
@@ -386,11 +406,7 @@ struct pm8001_fw_image_header {
386 __be32 startup_entry; 406 __be32 startup_entry;
387} __attribute__((packed, aligned(4))); 407} __attribute__((packed, aligned(4)));
388 408
389/* define task management IU */ 409
390struct pm8001_tmf_task {
391 u8 tmf;
392 u32 tag_of_task_to_be_managed;
393};
394/** 410/**
395 * FW Flash Update status values 411 * FW Flash Update status values
396 */ 412 */
diff --git a/drivers/scsi/pmcraid.c b/drivers/scsi/pmcraid.c
index 34c6b896a91b..b6f1ef954af1 100644
--- a/drivers/scsi/pmcraid.c
+++ b/drivers/scsi/pmcraid.c
@@ -1,7 +1,8 @@
1/* 1/*
2 * pmcraid.c -- driver for PMC Sierra MaxRAID controller adapters 2 * pmcraid.c -- driver for PMC Sierra MaxRAID controller adapters
3 * 3 *
4 * Written By: PMC Sierra Corporation 4 * Written By: Anil Ravindranath<anil_ravindranath@pmc-sierra.com>
5 * PMC-Sierra Inc
5 * 6 *
6 * Copyright (C) 2008, 2009 PMC Sierra Inc 7 * Copyright (C) 2008, 2009 PMC Sierra Inc
7 * 8 *
@@ -79,7 +80,7 @@ DECLARE_BITMAP(pmcraid_minor, PMCRAID_MAX_ADAPTERS);
79/* 80/*
80 * Module parameters 81 * Module parameters
81 */ 82 */
82MODULE_AUTHOR("PMC Sierra Corporation, anil_ravindranath@pmc-sierra.com"); 83MODULE_AUTHOR("Anil Ravindranath<anil_ravindranath@pmc-sierra.com>");
83MODULE_DESCRIPTION("PMC Sierra MaxRAID Controller Driver"); 84MODULE_DESCRIPTION("PMC Sierra MaxRAID Controller Driver");
84MODULE_LICENSE("GPL"); 85MODULE_LICENSE("GPL");
85MODULE_VERSION(PMCRAID_DRIVER_VERSION); 86MODULE_VERSION(PMCRAID_DRIVER_VERSION);
@@ -162,10 +163,10 @@ static int pmcraid_slave_alloc(struct scsi_device *scsi_dev)
162 spin_lock_irqsave(&pinstance->resource_lock, lock_flags); 163 spin_lock_irqsave(&pinstance->resource_lock, lock_flags);
163 list_for_each_entry(temp, &pinstance->used_res_q, queue) { 164 list_for_each_entry(temp, &pinstance->used_res_q, queue) {
164 165
165 /* do not expose VSETs with order-ids >= 240 */ 166 /* do not expose VSETs with order-ids > MAX_VSET_TARGETS */
166 if (RES_IS_VSET(temp->cfg_entry)) { 167 if (RES_IS_VSET(temp->cfg_entry)) {
167 target = temp->cfg_entry.unique_flags1; 168 target = temp->cfg_entry.unique_flags1;
168 if (target >= PMCRAID_MAX_VSET_TARGETS) 169 if (target > PMCRAID_MAX_VSET_TARGETS)
169 continue; 170 continue;
170 bus = PMCRAID_VSET_BUS_ID; 171 bus = PMCRAID_VSET_BUS_ID;
171 lun = 0; 172 lun = 0;
@@ -1210,7 +1211,7 @@ static int pmcraid_expose_resource(struct pmcraid_config_table_entry *cfgte)
1210 int retval = 0; 1211 int retval = 0;
1211 1212
1212 if (cfgte->resource_type == RES_TYPE_VSET) 1213 if (cfgte->resource_type == RES_TYPE_VSET)
1213 retval = ((cfgte->unique_flags1 & 0xFF) < 0xFE); 1214 retval = ((cfgte->unique_flags1 & 0x80) == 0);
1214 else if (cfgte->resource_type == RES_TYPE_GSCSI) 1215 else if (cfgte->resource_type == RES_TYPE_GSCSI)
1215 retval = (RES_BUS(cfgte->resource_address) != 1216 retval = (RES_BUS(cfgte->resource_address) !=
1216 PMCRAID_VIRTUAL_ENCL_BUS_ID); 1217 PMCRAID_VIRTUAL_ENCL_BUS_ID);
@@ -1361,6 +1362,7 @@ static int pmcraid_notify_aen(struct pmcraid_instance *pinstance, u8 type)
1361 * Return value: 1362 * Return value:
1362 * none 1363 * none
1363 */ 1364 */
1365
1364static void pmcraid_handle_config_change(struct pmcraid_instance *pinstance) 1366static void pmcraid_handle_config_change(struct pmcraid_instance *pinstance)
1365{ 1367{
1366 struct pmcraid_config_table_entry *cfg_entry; 1368 struct pmcraid_config_table_entry *cfg_entry;
@@ -1368,9 +1370,10 @@ static void pmcraid_handle_config_change(struct pmcraid_instance *pinstance)
1368 struct pmcraid_cmd *cmd; 1370 struct pmcraid_cmd *cmd;
1369 struct pmcraid_cmd *cfgcmd; 1371 struct pmcraid_cmd *cfgcmd;
1370 struct pmcraid_resource_entry *res = NULL; 1372 struct pmcraid_resource_entry *res = NULL;
1371 u32 new_entry = 1;
1372 unsigned long lock_flags; 1373 unsigned long lock_flags;
1373 unsigned long host_lock_flags; 1374 unsigned long host_lock_flags;
1375 u32 new_entry = 1;
1376 u32 hidden_entry = 0;
1374 int rc; 1377 int rc;
1375 1378
1376 ccn_hcam = (struct pmcraid_hcam_ccn *)pinstance->ccn.hcam; 1379 ccn_hcam = (struct pmcraid_hcam_ccn *)pinstance->ccn.hcam;
@@ -1406,9 +1409,15 @@ static void pmcraid_handle_config_change(struct pmcraid_instance *pinstance)
1406 } 1409 }
1407 1410
1408 /* If this resource is not going to be added to mid-layer, just notify 1411 /* If this resource is not going to be added to mid-layer, just notify
1409 * applications and return 1412 * applications and return. If this notification is about hiding a VSET
1413 * resource, check if it was exposed already.
1410 */ 1414 */
1411 if (!pmcraid_expose_resource(cfg_entry)) 1415 if (pinstance->ccn.hcam->notification_type ==
1416 NOTIFICATION_TYPE_ENTRY_CHANGED &&
1417 cfg_entry->resource_type == RES_TYPE_VSET &&
1418 cfg_entry->unique_flags1 & 0x80) {
1419 hidden_entry = 1;
1420 } else if (!pmcraid_expose_resource(cfg_entry))
1412 goto out_notify_apps; 1421 goto out_notify_apps;
1413 1422
1414 spin_lock_irqsave(&pinstance->resource_lock, lock_flags); 1423 spin_lock_irqsave(&pinstance->resource_lock, lock_flags);
@@ -1424,6 +1433,12 @@ static void pmcraid_handle_config_change(struct pmcraid_instance *pinstance)
1424 1433
1425 if (new_entry) { 1434 if (new_entry) {
1426 1435
1436 if (hidden_entry) {
1437 spin_unlock_irqrestore(&pinstance->resource_lock,
1438 lock_flags);
1439 goto out_notify_apps;
1440 }
1441
1427 /* If there are more number of resources than what driver can 1442 /* If there are more number of resources than what driver can
1428 * manage, do not notify the applications about the CCN. Just 1443 * manage, do not notify the applications about the CCN. Just
1429 * ignore this notifications and re-register the same HCAM 1444 * ignore this notifications and re-register the same HCAM
@@ -1454,8 +1469,9 @@ static void pmcraid_handle_config_change(struct pmcraid_instance *pinstance)
1454 sizeof(struct pmcraid_config_table_entry)); 1469 sizeof(struct pmcraid_config_table_entry));
1455 1470
1456 if (pinstance->ccn.hcam->notification_type == 1471 if (pinstance->ccn.hcam->notification_type ==
1457 NOTIFICATION_TYPE_ENTRY_DELETED) { 1472 NOTIFICATION_TYPE_ENTRY_DELETED || hidden_entry) {
1458 if (res->scsi_dev) { 1473 if (res->scsi_dev) {
1474 res->cfg_entry.unique_flags1 &= 0x7F;
1459 res->change_detected = RES_CHANGE_DEL; 1475 res->change_detected = RES_CHANGE_DEL;
1460 res->cfg_entry.resource_handle = 1476 res->cfg_entry.resource_handle =
1461 PMCRAID_INVALID_RES_HANDLE; 1477 PMCRAID_INVALID_RES_HANDLE;
@@ -2467,14 +2483,12 @@ static int pmcraid_error_handler(struct pmcraid_cmd *cmd)
2467 sense_copied = 1; 2483 sense_copied = 1;
2468 } 2484 }
2469 2485
2470 if (RES_IS_GSCSI(res->cfg_entry)) { 2486 if (RES_IS_GSCSI(res->cfg_entry))
2471 pmcraid_cancel_all(cmd, sense_copied); 2487 pmcraid_cancel_all(cmd, sense_copied);
2472 } else if (sense_copied) { 2488 else if (sense_copied)
2473 pmcraid_erp_done(cmd); 2489 pmcraid_erp_done(cmd);
2474 return 0; 2490 else
2475 } else {
2476 pmcraid_request_sense(cmd); 2491 pmcraid_request_sense(cmd);
2477 }
2478 2492
2479 return 1; 2493 return 1;
2480 2494
diff --git a/drivers/scsi/pmcraid.h b/drivers/scsi/pmcraid.h
index 2752b56cad56..92f89d50850c 100644
--- a/drivers/scsi/pmcraid.h
+++ b/drivers/scsi/pmcraid.h
@@ -1,6 +1,9 @@
1/* 1/*
2 * pmcraid.h -- PMC Sierra MaxRAID controller driver header file 2 * pmcraid.h -- PMC Sierra MaxRAID controller driver header file
3 * 3 *
4 * Written By: Anil Ravindranath<anil_ravindranath@pmc-sierra.com>
5 * PMC-Sierra Inc
6 *
4 * Copyright (C) 2008, 2009 PMC Sierra Inc. 7 * Copyright (C) 2008, 2009 PMC Sierra Inc.
5 * 8 *
6 * This program is free software; you can redistribute it and/or modify 9 * This program is free software; you can redistribute it and/or modify
@@ -106,7 +109,7 @@
106#define PMCRAID_VSET_LUN_ID 0x0 109#define PMCRAID_VSET_LUN_ID 0x0
107#define PMCRAID_PHYS_BUS_ID 0x0 110#define PMCRAID_PHYS_BUS_ID 0x0
108#define PMCRAID_VIRTUAL_ENCL_BUS_ID 0x8 111#define PMCRAID_VIRTUAL_ENCL_BUS_ID 0x8
109#define PMCRAID_MAX_VSET_TARGETS 240 112#define PMCRAID_MAX_VSET_TARGETS 0x7F
110#define PMCRAID_MAX_VSET_LUNS_PER_TARGET 8 113#define PMCRAID_MAX_VSET_LUNS_PER_TARGET 8
111 114
112#define PMCRAID_IOA_MAX_SECTORS 32767 115#define PMCRAID_IOA_MAX_SECTORS 32767
diff --git a/drivers/scsi/qla2xxx/qla_attr.c b/drivers/scsi/qla2xxx/qla_attr.c
index 21e2bc4d7401..3a9f5b288aee 100644
--- a/drivers/scsi/qla2xxx/qla_attr.c
+++ b/drivers/scsi/qla2xxx/qla_attr.c
@@ -232,6 +232,9 @@ qla2x00_sysfs_write_optrom_ctl(struct kobject *kobj,
232 if (off) 232 if (off)
233 return 0; 233 return 0;
234 234
235 if (unlikely(pci_channel_offline(ha->pdev)))
236 return 0;
237
235 if (sscanf(buf, "%d:%x:%x", &val, &start, &size) < 1) 238 if (sscanf(buf, "%d:%x:%x", &val, &start, &size) < 1)
236 return -EINVAL; 239 return -EINVAL;
237 if (start > ha->optrom_size) 240 if (start > ha->optrom_size)
@@ -379,6 +382,9 @@ qla2x00_sysfs_read_vpd(struct kobject *kobj,
379 struct device, kobj))); 382 struct device, kobj)));
380 struct qla_hw_data *ha = vha->hw; 383 struct qla_hw_data *ha = vha->hw;
381 384
385 if (unlikely(pci_channel_offline(ha->pdev)))
386 return 0;
387
382 if (!capable(CAP_SYS_ADMIN)) 388 if (!capable(CAP_SYS_ADMIN))
383 return 0; 389 return 0;
384 390
@@ -398,6 +404,9 @@ qla2x00_sysfs_write_vpd(struct kobject *kobj,
398 struct qla_hw_data *ha = vha->hw; 404 struct qla_hw_data *ha = vha->hw;
399 uint8_t *tmp_data; 405 uint8_t *tmp_data;
400 406
407 if (unlikely(pci_channel_offline(ha->pdev)))
408 return 0;
409
401 if (!capable(CAP_SYS_ADMIN) || off != 0 || count != ha->vpd_size || 410 if (!capable(CAP_SYS_ADMIN) || off != 0 || count != ha->vpd_size ||
402 !ha->isp_ops->write_nvram) 411 !ha->isp_ops->write_nvram)
403 return 0; 412 return 0;
@@ -1238,10 +1247,11 @@ qla2x00_fw_state_show(struct device *dev, struct device_attribute *attr,
1238 char *buf) 1247 char *buf)
1239{ 1248{
1240 scsi_qla_host_t *vha = shost_priv(class_to_shost(dev)); 1249 scsi_qla_host_t *vha = shost_priv(class_to_shost(dev));
1241 int rval; 1250 int rval = QLA_FUNCTION_FAILED;
1242 uint16_t state[5]; 1251 uint16_t state[5];
1243 1252
1244 rval = qla2x00_get_firmware_state(vha, state); 1253 if (!vha->hw->flags.eeh_busy)
1254 rval = qla2x00_get_firmware_state(vha, state);
1245 if (rval != QLA_SUCCESS) 1255 if (rval != QLA_SUCCESS)
1246 memset(state, -1, sizeof(state)); 1256 memset(state, -1, sizeof(state));
1247 1257
@@ -1452,10 +1462,13 @@ qla2x00_dev_loss_tmo_callbk(struct fc_rport *rport)
1452 if (!fcport) 1462 if (!fcport)
1453 return; 1463 return;
1454 1464
1455 if (unlikely(pci_channel_offline(fcport->vha->hw->pdev))) 1465 if (test_bit(ABORT_ISP_ACTIVE, &fcport->vha->dpc_flags))
1466 return;
1467
1468 if (unlikely(pci_channel_offline(fcport->vha->hw->pdev))) {
1456 qla2x00_abort_all_cmds(fcport->vha, DID_NO_CONNECT << 16); 1469 qla2x00_abort_all_cmds(fcport->vha, DID_NO_CONNECT << 16);
1457 else 1470 return;
1458 qla2x00_abort_fcport_cmds(fcport); 1471 }
1459 1472
1460 /* 1473 /*
1461 * Transport has effectively 'deleted' the rport, clear 1474 * Transport has effectively 'deleted' the rport, clear
@@ -1475,6 +1488,9 @@ qla2x00_terminate_rport_io(struct fc_rport *rport)
1475 if (!fcport) 1488 if (!fcport)
1476 return; 1489 return;
1477 1490
1491 if (test_bit(ABORT_ISP_ACTIVE, &fcport->vha->dpc_flags))
1492 return;
1493
1478 if (unlikely(pci_channel_offline(fcport->vha->hw->pdev))) { 1494 if (unlikely(pci_channel_offline(fcport->vha->hw->pdev))) {
1479 qla2x00_abort_all_cmds(fcport->vha, DID_NO_CONNECT << 16); 1495 qla2x00_abort_all_cmds(fcport->vha, DID_NO_CONNECT << 16);
1480 return; 1496 return;
@@ -1515,6 +1531,12 @@ qla2x00_get_fc_host_stats(struct Scsi_Host *shost)
1515 pfc_host_stat = &ha->fc_host_stat; 1531 pfc_host_stat = &ha->fc_host_stat;
1516 memset(pfc_host_stat, -1, sizeof(struct fc_host_statistics)); 1532 memset(pfc_host_stat, -1, sizeof(struct fc_host_statistics));
1517 1533
1534 if (test_bit(UNLOADING, &vha->dpc_flags))
1535 goto done;
1536
1537 if (unlikely(pci_channel_offline(ha->pdev)))
1538 goto done;
1539
1518 stats = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &stats_dma); 1540 stats = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &stats_dma);
1519 if (stats == NULL) { 1541 if (stats == NULL) {
1520 DEBUG2_3_11(printk("%s(%ld): Failed to allocate memory.\n", 1542 DEBUG2_3_11(printk("%s(%ld): Failed to allocate memory.\n",
diff --git a/drivers/scsi/qla2xxx/qla_dbg.h b/drivers/scsi/qla2xxx/qla_dbg.h
index f660dd70b72e..d6d9c86cb058 100644
--- a/drivers/scsi/qla2xxx/qla_dbg.h
+++ b/drivers/scsi/qla2xxx/qla_dbg.h
@@ -26,7 +26,7 @@
26/* #define QL_DEBUG_LEVEL_14 */ /* Output RSCN trace msgs */ 26/* #define QL_DEBUG_LEVEL_14 */ /* Output RSCN trace msgs */
27/* #define QL_DEBUG_LEVEL_15 */ /* Output NPIV trace msgs */ 27/* #define QL_DEBUG_LEVEL_15 */ /* Output NPIV trace msgs */
28/* #define QL_DEBUG_LEVEL_16 */ /* Output ISP84XX trace msgs */ 28/* #define QL_DEBUG_LEVEL_16 */ /* Output ISP84XX trace msgs */
29/* #define QL_DEBUG_LEVEL_17 */ /* Output MULTI-Q trace messages */ 29/* #define QL_DEBUG_LEVEL_17 */ /* Output EEH trace messages */
30 30
31/* 31/*
32* Macros use for debugging the driver. 32* Macros use for debugging the driver.
@@ -132,6 +132,13 @@
132#else 132#else
133#define DEBUG16(x) do {} while (0) 133#define DEBUG16(x) do {} while (0)
134#endif 134#endif
135
136#if defined(QL_DEBUG_LEVEL_17)
137#define DEBUG17(x) do {x;} while (0)
138#else
139#define DEBUG17(x) do {} while (0)
140#endif
141
135/* 142/*
136 * Firmware Dump structure definition 143 * Firmware Dump structure definition
137 */ 144 */
diff --git a/drivers/scsi/qla2xxx/qla_def.h b/drivers/scsi/qla2xxx/qla_def.h
index 6b9bf23c7735..1263d9796e89 100644
--- a/drivers/scsi/qla2xxx/qla_def.h
+++ b/drivers/scsi/qla2xxx/qla_def.h
@@ -1570,9 +1570,6 @@ typedef struct fc_port {
1570 struct fc_rport *rport, *drport; 1570 struct fc_rport *rport, *drport;
1571 u32 supported_classes; 1571 u32 supported_classes;
1572 1572
1573 unsigned long last_queue_full;
1574 unsigned long last_ramp_up;
1575
1576 uint16_t vp_idx; 1573 uint16_t vp_idx;
1577} fc_port_t; 1574} fc_port_t;
1578 1575
@@ -1589,8 +1586,7 @@ typedef struct fc_port {
1589 */ 1586 */
1590#define FCF_FABRIC_DEVICE BIT_0 1587#define FCF_FABRIC_DEVICE BIT_0
1591#define FCF_LOGIN_NEEDED BIT_1 1588#define FCF_LOGIN_NEEDED BIT_1
1592#define FCF_TAPE_PRESENT BIT_2 1589#define FCF_FCP2_DEVICE BIT_2
1593#define FCF_FCP2_DEVICE BIT_3
1594 1590
1595/* No loop ID flag. */ 1591/* No loop ID flag. */
1596#define FC_NO_LOOP_ID 0x1000 1592#define FC_NO_LOOP_ID 0x1000
@@ -2259,12 +2255,15 @@ struct qla_hw_data {
2259 uint32_t disable_serdes :1; 2255 uint32_t disable_serdes :1;
2260 uint32_t gpsc_supported :1; 2256 uint32_t gpsc_supported :1;
2261 uint32_t npiv_supported :1; 2257 uint32_t npiv_supported :1;
2258 uint32_t pci_channel_io_perm_failure :1;
2262 uint32_t fce_enabled :1; 2259 uint32_t fce_enabled :1;
2263 uint32_t fac_supported :1; 2260 uint32_t fac_supported :1;
2264 uint32_t chip_reset_done :1; 2261 uint32_t chip_reset_done :1;
2265 uint32_t port0 :1; 2262 uint32_t port0 :1;
2266 uint32_t running_gold_fw :1; 2263 uint32_t running_gold_fw :1;
2264 uint32_t eeh_busy :1;
2267 uint32_t cpu_affinity_enabled :1; 2265 uint32_t cpu_affinity_enabled :1;
2266 uint32_t disable_msix_handshake :1;
2268 } flags; 2267 } flags;
2269 2268
2270 /* This spinlock is used to protect "io transactions", you must 2269 /* This spinlock is used to protect "io transactions", you must
@@ -2387,6 +2386,7 @@ struct qla_hw_data {
2387#define IS_QLA81XX(ha) (IS_QLA8001(ha)) 2386#define IS_QLA81XX(ha) (IS_QLA8001(ha))
2388#define IS_QLA2XXX_MIDTYPE(ha) (IS_QLA24XX(ha) || IS_QLA84XX(ha) || \ 2387#define IS_QLA2XXX_MIDTYPE(ha) (IS_QLA24XX(ha) || IS_QLA84XX(ha) || \
2389 IS_QLA25XX(ha) || IS_QLA81XX(ha)) 2388 IS_QLA25XX(ha) || IS_QLA81XX(ha))
2389#define IS_MSIX_NACK_CAPABLE(ha) (IS_QLA81XX(ha))
2390#define IS_NOPOLLING_TYPE(ha) ((IS_QLA25XX(ha) || IS_QLA81XX(ha)) && \ 2390#define IS_NOPOLLING_TYPE(ha) ((IS_QLA25XX(ha) || IS_QLA81XX(ha)) && \
2391 (ha)->flags.msix_enabled) 2391 (ha)->flags.msix_enabled)
2392#define IS_FAC_REQUIRED(ha) (IS_QLA81XX(ha)) 2392#define IS_FAC_REQUIRED(ha) (IS_QLA81XX(ha))
diff --git a/drivers/scsi/qla2xxx/qla_gbl.h b/drivers/scsi/qla2xxx/qla_gbl.h
index e21851358509..8bc6f53691e9 100644
--- a/drivers/scsi/qla2xxx/qla_gbl.h
+++ b/drivers/scsi/qla2xxx/qla_gbl.h
@@ -72,8 +72,6 @@ extern int ql2xloginretrycount;
72extern int ql2xfdmienable; 72extern int ql2xfdmienable;
73extern int ql2xallocfwdump; 73extern int ql2xallocfwdump;
74extern int ql2xextended_error_logging; 74extern int ql2xextended_error_logging;
75extern int ql2xqfullrampup;
76extern int ql2xqfulltracking;
77extern int ql2xiidmaenable; 75extern int ql2xiidmaenable;
78extern int ql2xmaxqueues; 76extern int ql2xmaxqueues;
79extern int ql2xmultique_tag; 77extern int ql2xmultique_tag;
@@ -326,6 +324,7 @@ qla2x00_read_ram_word(scsi_qla_host_t *, uint32_t, uint32_t *);
326extern int 324extern int
327qla2x00_write_ram_word(scsi_qla_host_t *, uint32_t, uint32_t); 325qla2x00_write_ram_word(scsi_qla_host_t *, uint32_t, uint32_t);
328 326
327extern int qla2x00_get_data_rate(scsi_qla_host_t *);
329/* 328/*
330 * Global Function Prototypes in qla_isr.c source file. 329 * Global Function Prototypes in qla_isr.c source file.
331 */ 330 */
@@ -454,6 +453,5 @@ extern void qla24xx_wrt_req_reg(struct qla_hw_data *, uint16_t, uint16_t);
454extern void qla25xx_wrt_req_reg(struct qla_hw_data *, uint16_t, uint16_t); 453extern void qla25xx_wrt_req_reg(struct qla_hw_data *, uint16_t, uint16_t);
455extern void qla25xx_wrt_rsp_reg(struct qla_hw_data *, uint16_t, uint16_t); 454extern void qla25xx_wrt_rsp_reg(struct qla_hw_data *, uint16_t, uint16_t);
456extern void qla24xx_wrt_rsp_reg(struct qla_hw_data *, uint16_t, uint16_t); 455extern void qla24xx_wrt_rsp_reg(struct qla_hw_data *, uint16_t, uint16_t);
457extern struct scsi_qla_host * qla25xx_get_host(struct rsp_que *);
458 456
459#endif /* _QLA_GBL_H */ 457#endif /* _QLA_GBL_H */
diff --git a/drivers/scsi/qla2xxx/qla_init.c b/drivers/scsi/qla2xxx/qla_init.c
index b74924b279ef..3f8e8495b743 100644
--- a/drivers/scsi/qla2xxx/qla_init.c
+++ b/drivers/scsi/qla2xxx/qla_init.c
@@ -205,7 +205,7 @@ qla2x00_async_login_done(struct scsi_qla_host *vha, fc_port_t *fcport,
205 205
206 switch (data[0]) { 206 switch (data[0]) {
207 case MBS_COMMAND_COMPLETE: 207 case MBS_COMMAND_COMPLETE:
208 if (fcport->flags & FCF_TAPE_PRESENT) 208 if (fcport->flags & FCF_FCP2_DEVICE)
209 opts |= BIT_1; 209 opts |= BIT_1;
210 rval = qla2x00_get_port_database(vha, fcport, opts); 210 rval = qla2x00_get_port_database(vha, fcport, opts);
211 if (rval != QLA_SUCCESS) 211 if (rval != QLA_SUCCESS)
@@ -269,6 +269,8 @@ qla2x00_initialize_adapter(scsi_qla_host_t *vha)
269 vha->flags.online = 0; 269 vha->flags.online = 0;
270 ha->flags.chip_reset_done = 0; 270 ha->flags.chip_reset_done = 0;
271 vha->flags.reset_active = 0; 271 vha->flags.reset_active = 0;
272 ha->flags.pci_channel_io_perm_failure = 0;
273 ha->flags.eeh_busy = 0;
272 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME); 274 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
273 atomic_set(&vha->loop_state, LOOP_DOWN); 275 atomic_set(&vha->loop_state, LOOP_DOWN);
274 vha->device_flags = DFLG_NO_CABLE; 276 vha->device_flags = DFLG_NO_CABLE;
@@ -581,6 +583,9 @@ qla2x00_reset_chip(scsi_qla_host_t *vha)
581 uint32_t cnt; 583 uint32_t cnt;
582 uint16_t cmd; 584 uint16_t cmd;
583 585
586 if (unlikely(pci_channel_offline(ha->pdev)))
587 return;
588
584 ha->isp_ops->disable_intrs(ha); 589 ha->isp_ops->disable_intrs(ha);
585 590
586 spin_lock_irqsave(&ha->hardware_lock, flags); 591 spin_lock_irqsave(&ha->hardware_lock, flags);
@@ -786,6 +791,12 @@ void
786qla24xx_reset_chip(scsi_qla_host_t *vha) 791qla24xx_reset_chip(scsi_qla_host_t *vha)
787{ 792{
788 struct qla_hw_data *ha = vha->hw; 793 struct qla_hw_data *ha = vha->hw;
794
795 if (pci_channel_offline(ha->pdev) &&
796 ha->flags.pci_channel_io_perm_failure) {
797 return;
798 }
799
789 ha->isp_ops->disable_intrs(ha); 800 ha->isp_ops->disable_intrs(ha);
790 801
791 /* Perform RISC reset. */ 802 /* Perform RISC reset. */
@@ -1442,7 +1453,17 @@ qla24xx_config_rings(struct scsi_qla_host *vha)
1442 icb->firmware_options_2 |= 1453 icb->firmware_options_2 |=
1443 __constant_cpu_to_le32(BIT_18); 1454 __constant_cpu_to_le32(BIT_18);
1444 1455
1445 icb->firmware_options_2 &= __constant_cpu_to_le32(~BIT_22); 1456 /* Use Disable MSIX Handshake mode for capable adapters */
1457 if (IS_MSIX_NACK_CAPABLE(ha)) {
1458 icb->firmware_options_2 &=
1459 __constant_cpu_to_le32(~BIT_22);
1460 ha->flags.disable_msix_handshake = 1;
1461 qla_printk(KERN_INFO, ha,
1462 "MSIX Handshake Disable Mode turned on\n");
1463 } else {
1464 icb->firmware_options_2 |=
1465 __constant_cpu_to_le32(BIT_22);
1466 }
1446 icb->firmware_options_2 |= __constant_cpu_to_le32(BIT_23); 1467 icb->firmware_options_2 |= __constant_cpu_to_le32(BIT_23);
1447 1468
1448 WRT_REG_DWORD(&reg->isp25mq.req_q_in, 0); 1469 WRT_REG_DWORD(&reg->isp25mq.req_q_in, 0);
@@ -2256,6 +2277,8 @@ qla2x00_configure_loop(scsi_qla_host_t *vha)
2256 clear_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 2277 clear_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
2257 clear_bit(RSCN_UPDATE, &vha->dpc_flags); 2278 clear_bit(RSCN_UPDATE, &vha->dpc_flags);
2258 2279
2280 qla2x00_get_data_rate(vha);
2281
2259 /* Determine what we need to do */ 2282 /* Determine what we need to do */
2260 if (ha->current_topology == ISP_CFG_FL && 2283 if (ha->current_topology == ISP_CFG_FL &&
2261 (test_bit(LOCAL_LOOP_UPDATE, &flags))) { 2284 (test_bit(LOCAL_LOOP_UPDATE, &flags))) {
@@ -2703,7 +2726,7 @@ qla2x00_configure_fabric(scsi_qla_host_t *vha)
2703 2726
2704 /* 2727 /*
2705 * Logout all previous fabric devices marked lost, except 2728 * Logout all previous fabric devices marked lost, except
2706 * tape devices. 2729 * FCP2 devices.
2707 */ 2730 */
2708 list_for_each_entry(fcport, &vha->vp_fcports, list) { 2731 list_for_each_entry(fcport, &vha->vp_fcports, list) {
2709 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 2732 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
@@ -2716,7 +2739,7 @@ qla2x00_configure_fabric(scsi_qla_host_t *vha)
2716 qla2x00_mark_device_lost(vha, fcport, 2739 qla2x00_mark_device_lost(vha, fcport,
2717 ql2xplogiabsentdevice, 0); 2740 ql2xplogiabsentdevice, 0);
2718 if (fcport->loop_id != FC_NO_LOOP_ID && 2741 if (fcport->loop_id != FC_NO_LOOP_ID &&
2719 (fcport->flags & FCF_TAPE_PRESENT) == 0 && 2742 (fcport->flags & FCF_FCP2_DEVICE) == 0 &&
2720 fcport->port_type != FCT_INITIATOR && 2743 fcport->port_type != FCT_INITIATOR &&
2721 fcport->port_type != FCT_BROADCAST) { 2744 fcport->port_type != FCT_BROADCAST) {
2722 ha->isp_ops->fabric_logout(vha, 2745 ha->isp_ops->fabric_logout(vha,
@@ -2995,7 +3018,7 @@ qla2x00_find_all_fabric_devs(scsi_qla_host_t *vha,
2995 fcport->d_id.b24 = new_fcport->d_id.b24; 3018 fcport->d_id.b24 = new_fcport->d_id.b24;
2996 fcport->flags |= FCF_LOGIN_NEEDED; 3019 fcport->flags |= FCF_LOGIN_NEEDED;
2997 if (fcport->loop_id != FC_NO_LOOP_ID && 3020 if (fcport->loop_id != FC_NO_LOOP_ID &&
2998 (fcport->flags & FCF_TAPE_PRESENT) == 0 && 3021 (fcport->flags & FCF_FCP2_DEVICE) == 0 &&
2999 fcport->port_type != FCT_INITIATOR && 3022 fcport->port_type != FCT_INITIATOR &&
3000 fcport->port_type != FCT_BROADCAST) { 3023 fcport->port_type != FCT_BROADCAST) {
3001 ha->isp_ops->fabric_logout(vha, fcport->loop_id, 3024 ha->isp_ops->fabric_logout(vha, fcport->loop_id,
@@ -3249,9 +3272,9 @@ qla2x00_fabric_dev_login(scsi_qla_host_t *vha, fc_port_t *fcport,
3249 3272
3250 rval = qla2x00_fabric_login(vha, fcport, next_loopid); 3273 rval = qla2x00_fabric_login(vha, fcport, next_loopid);
3251 if (rval == QLA_SUCCESS) { 3274 if (rval == QLA_SUCCESS) {
3252 /* Send an ADISC to tape devices.*/ 3275 /* Send an ADISC to FCP2 devices.*/
3253 opts = 0; 3276 opts = 0;
3254 if (fcport->flags & FCF_TAPE_PRESENT) 3277 if (fcport->flags & FCF_FCP2_DEVICE)
3255 opts |= BIT_1; 3278 opts |= BIT_1;
3256 rval = qla2x00_get_port_database(vha, fcport, opts); 3279 rval = qla2x00_get_port_database(vha, fcport, opts);
3257 if (rval != QLA_SUCCESS) { 3280 if (rval != QLA_SUCCESS) {
@@ -3550,6 +3573,13 @@ qla2x00_abort_isp(scsi_qla_host_t *vha)
3550 /* Requeue all commands in outstanding command list. */ 3573 /* Requeue all commands in outstanding command list. */
3551 qla2x00_abort_all_cmds(vha, DID_RESET << 16); 3574 qla2x00_abort_all_cmds(vha, DID_RESET << 16);
3552 3575
3576 if (unlikely(pci_channel_offline(ha->pdev) &&
3577 ha->flags.pci_channel_io_perm_failure)) {
3578 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
3579 status = 0;
3580 return status;
3581 }
3582
3553 ha->isp_ops->get_flash_version(vha, req->ring); 3583 ha->isp_ops->get_flash_version(vha, req->ring);
3554 3584
3555 ha->isp_ops->nvram_config(vha); 3585 ha->isp_ops->nvram_config(vha);
@@ -4448,6 +4478,8 @@ qla2x00_try_to_stop_firmware(scsi_qla_host_t *vha)
4448 int ret, retries; 4478 int ret, retries;
4449 struct qla_hw_data *ha = vha->hw; 4479 struct qla_hw_data *ha = vha->hw;
4450 4480
4481 if (ha->flags.pci_channel_io_perm_failure)
4482 return;
4451 if (!IS_FWI2_CAPABLE(ha)) 4483 if (!IS_FWI2_CAPABLE(ha))
4452 return; 4484 return;
4453 if (!ha->fw_major_version) 4485 if (!ha->fw_major_version)
diff --git a/drivers/scsi/qla2xxx/qla_isr.c b/drivers/scsi/qla2xxx/qla_isr.c
index 804987397b77..6fc63b98818c 100644
--- a/drivers/scsi/qla2xxx/qla_isr.c
+++ b/drivers/scsi/qla2xxx/qla_isr.c
@@ -152,7 +152,7 @@ qla2300_intr_handler(int irq, void *dev_id)
152 for (iter = 50; iter--; ) { 152 for (iter = 50; iter--; ) {
153 stat = RD_REG_DWORD(&reg->u.isp2300.host_status); 153 stat = RD_REG_DWORD(&reg->u.isp2300.host_status);
154 if (stat & HSR_RISC_PAUSED) { 154 if (stat & HSR_RISC_PAUSED) {
155 if (pci_channel_offline(ha->pdev)) 155 if (unlikely(pci_channel_offline(ha->pdev)))
156 break; 156 break;
157 157
158 hccr = RD_REG_WORD(&reg->hccr); 158 hccr = RD_REG_WORD(&reg->hccr);
@@ -811,78 +811,6 @@ skip_rio:
811 qla2x00_alert_all_vps(rsp, mb); 811 qla2x00_alert_all_vps(rsp, mb);
812} 812}
813 813
814static void
815qla2x00_adjust_sdev_qdepth_up(struct scsi_device *sdev, void *data)
816{
817 fc_port_t *fcport = data;
818 struct scsi_qla_host *vha = fcport->vha;
819 struct qla_hw_data *ha = vha->hw;
820 struct req_que *req = NULL;
821
822 if (!ql2xqfulltracking)
823 return;
824
825 req = vha->req;
826 if (!req)
827 return;
828 if (req->max_q_depth <= sdev->queue_depth)
829 return;
830
831 if (sdev->ordered_tags)
832 scsi_adjust_queue_depth(sdev, MSG_ORDERED_TAG,
833 sdev->queue_depth + 1);
834 else
835 scsi_adjust_queue_depth(sdev, MSG_SIMPLE_TAG,
836 sdev->queue_depth + 1);
837
838 fcport->last_ramp_up = jiffies;
839
840 DEBUG2(qla_printk(KERN_INFO, ha,
841 "scsi(%ld:%d:%d:%d): Queue depth adjusted-up to %d.\n",
842 fcport->vha->host_no, sdev->channel, sdev->id, sdev->lun,
843 sdev->queue_depth));
844}
845
846static void
847qla2x00_adjust_sdev_qdepth_down(struct scsi_device *sdev, void *data)
848{
849 fc_port_t *fcport = data;
850
851 if (!scsi_track_queue_full(sdev, sdev->queue_depth - 1))
852 return;
853
854 DEBUG2(qla_printk(KERN_INFO, fcport->vha->hw,
855 "scsi(%ld:%d:%d:%d): Queue depth adjusted-down to %d.\n",
856 fcport->vha->host_no, sdev->channel, sdev->id, sdev->lun,
857 sdev->queue_depth));
858}
859
860static inline void
861qla2x00_ramp_up_queue_depth(scsi_qla_host_t *vha, struct req_que *req,
862 srb_t *sp)
863{
864 fc_port_t *fcport;
865 struct scsi_device *sdev;
866
867 if (!ql2xqfulltracking)
868 return;
869
870 sdev = sp->cmd->device;
871 if (sdev->queue_depth >= req->max_q_depth)
872 return;
873
874 fcport = sp->fcport;
875 if (time_before(jiffies,
876 fcport->last_ramp_up + ql2xqfullrampup * HZ))
877 return;
878 if (time_before(jiffies,
879 fcport->last_queue_full + ql2xqfullrampup * HZ))
880 return;
881
882 starget_for_each_device(sdev->sdev_target, fcport,
883 qla2x00_adjust_sdev_qdepth_up);
884}
885
886/** 814/**
887 * qla2x00_process_completed_request() - Process a Fast Post response. 815 * qla2x00_process_completed_request() - Process a Fast Post response.
888 * @ha: SCSI driver HA context 816 * @ha: SCSI driver HA context
@@ -913,8 +841,6 @@ qla2x00_process_completed_request(struct scsi_qla_host *vha,
913 841
914 /* Save ISP completion status */ 842 /* Save ISP completion status */
915 sp->cmd->result = DID_OK << 16; 843 sp->cmd->result = DID_OK << 16;
916
917 qla2x00_ramp_up_queue_depth(vha, req, sp);
918 qla2x00_sp_compl(ha, sp); 844 qla2x00_sp_compl(ha, sp);
919 } else { 845 } else {
920 DEBUG2(printk("scsi(%ld) Req:%d: Invalid ISP SCSI completion" 846 DEBUG2(printk("scsi(%ld) Req:%d: Invalid ISP SCSI completion"
@@ -1435,13 +1361,6 @@ qla2x00_status_entry(scsi_qla_host_t *vha, struct rsp_que *rsp, void *pkt)
1435 "scsi(%ld): QUEUE FULL status detected " 1361 "scsi(%ld): QUEUE FULL status detected "
1436 "0x%x-0x%x.\n", vha->host_no, comp_status, 1362 "0x%x-0x%x.\n", vha->host_no, comp_status,
1437 scsi_status)); 1363 scsi_status));
1438
1439 /* Adjust queue depth for all luns on the port. */
1440 if (!ql2xqfulltracking)
1441 break;
1442 fcport->last_queue_full = jiffies;
1443 starget_for_each_device(cp->device->sdev_target,
1444 fcport, qla2x00_adjust_sdev_qdepth_down);
1445 break; 1364 break;
1446 } 1365 }
1447 if (lscsi_status != SS_CHECK_CONDITION) 1366 if (lscsi_status != SS_CHECK_CONDITION)
@@ -1516,17 +1435,6 @@ qla2x00_status_entry(scsi_qla_host_t *vha, struct rsp_que *rsp, void *pkt)
1516 "scsi(%ld): QUEUE FULL status detected " 1435 "scsi(%ld): QUEUE FULL status detected "
1517 "0x%x-0x%x.\n", vha->host_no, comp_status, 1436 "0x%x-0x%x.\n", vha->host_no, comp_status,
1518 scsi_status)); 1437 scsi_status));
1519
1520 /*
1521 * Adjust queue depth for all luns on the
1522 * port.
1523 */
1524 if (!ql2xqfulltracking)
1525 break;
1526 fcport->last_queue_full = jiffies;
1527 starget_for_each_device(
1528 cp->device->sdev_target, fcport,
1529 qla2x00_adjust_sdev_qdepth_down);
1530 break; 1438 break;
1531 } 1439 }
1532 if (lscsi_status != SS_CHECK_CONDITION) 1440 if (lscsi_status != SS_CHECK_CONDITION)
@@ -1938,12 +1846,15 @@ qla24xx_intr_handler(int irq, void *dev_id)
1938 reg = &ha->iobase->isp24; 1846 reg = &ha->iobase->isp24;
1939 status = 0; 1847 status = 0;
1940 1848
1849 if (unlikely(pci_channel_offline(ha->pdev)))
1850 return IRQ_HANDLED;
1851
1941 spin_lock_irqsave(&ha->hardware_lock, flags); 1852 spin_lock_irqsave(&ha->hardware_lock, flags);
1942 vha = pci_get_drvdata(ha->pdev); 1853 vha = pci_get_drvdata(ha->pdev);
1943 for (iter = 50; iter--; ) { 1854 for (iter = 50; iter--; ) {
1944 stat = RD_REG_DWORD(&reg->host_status); 1855 stat = RD_REG_DWORD(&reg->host_status);
1945 if (stat & HSRX_RISC_PAUSED) { 1856 if (stat & HSRX_RISC_PAUSED) {
1946 if (pci_channel_offline(ha->pdev)) 1857 if (unlikely(pci_channel_offline(ha->pdev)))
1947 break; 1858 break;
1948 1859
1949 hccr = RD_REG_DWORD(&reg->hccr); 1860 hccr = RD_REG_DWORD(&reg->hccr);
@@ -2006,6 +1917,7 @@ qla24xx_msix_rsp_q(int irq, void *dev_id)
2006 struct rsp_que *rsp; 1917 struct rsp_que *rsp;
2007 struct device_reg_24xx __iomem *reg; 1918 struct device_reg_24xx __iomem *reg;
2008 struct scsi_qla_host *vha; 1919 struct scsi_qla_host *vha;
1920 unsigned long flags;
2009 1921
2010 rsp = (struct rsp_que *) dev_id; 1922 rsp = (struct rsp_que *) dev_id;
2011 if (!rsp) { 1923 if (!rsp) {
@@ -2016,15 +1928,15 @@ qla24xx_msix_rsp_q(int irq, void *dev_id)
2016 ha = rsp->hw; 1928 ha = rsp->hw;
2017 reg = &ha->iobase->isp24; 1929 reg = &ha->iobase->isp24;
2018 1930
2019 spin_lock_irq(&ha->hardware_lock); 1931 spin_lock_irqsave(&ha->hardware_lock, flags);
2020 1932
2021 vha = qla25xx_get_host(rsp); 1933 vha = pci_get_drvdata(ha->pdev);
2022 qla24xx_process_response_queue(vha, rsp); 1934 qla24xx_process_response_queue(vha, rsp);
2023 if (!ha->mqenable) { 1935 if (!ha->flags.disable_msix_handshake) {
2024 WRT_REG_DWORD(&reg->hccr, HCCRX_CLR_RISC_INT); 1936 WRT_REG_DWORD(&reg->hccr, HCCRX_CLR_RISC_INT);
2025 RD_REG_DWORD_RELAXED(&reg->hccr); 1937 RD_REG_DWORD_RELAXED(&reg->hccr);
2026 } 1938 }
2027 spin_unlock_irq(&ha->hardware_lock); 1939 spin_unlock_irqrestore(&ha->hardware_lock, flags);
2028 1940
2029 return IRQ_HANDLED; 1941 return IRQ_HANDLED;
2030} 1942}
@@ -2034,6 +1946,8 @@ qla25xx_msix_rsp_q(int irq, void *dev_id)
2034{ 1946{
2035 struct qla_hw_data *ha; 1947 struct qla_hw_data *ha;
2036 struct rsp_que *rsp; 1948 struct rsp_que *rsp;
1949 struct device_reg_24xx __iomem *reg;
1950 unsigned long flags;
2037 1951
2038 rsp = (struct rsp_que *) dev_id; 1952 rsp = (struct rsp_que *) dev_id;
2039 if (!rsp) { 1953 if (!rsp) {
@@ -2043,6 +1957,14 @@ qla25xx_msix_rsp_q(int irq, void *dev_id)
2043 } 1957 }
2044 ha = rsp->hw; 1958 ha = rsp->hw;
2045 1959
1960 /* Clear the interrupt, if enabled, for this response queue */
1961 if (rsp->options & ~BIT_6) {
1962 reg = &ha->iobase->isp24;
1963 spin_lock_irqsave(&ha->hardware_lock, flags);
1964 WRT_REG_DWORD(&reg->hccr, HCCRX_CLR_RISC_INT);
1965 RD_REG_DWORD_RELAXED(&reg->hccr);
1966 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1967 }
2046 queue_work_on((int) (rsp->id - 1), ha->wq, &rsp->q_work); 1968 queue_work_on((int) (rsp->id - 1), ha->wq, &rsp->q_work);
2047 1969
2048 return IRQ_HANDLED; 1970 return IRQ_HANDLED;
@@ -2059,6 +1981,7 @@ qla24xx_msix_default(int irq, void *dev_id)
2059 uint32_t stat; 1981 uint32_t stat;
2060 uint32_t hccr; 1982 uint32_t hccr;
2061 uint16_t mb[4]; 1983 uint16_t mb[4];
1984 unsigned long flags;
2062 1985
2063 rsp = (struct rsp_que *) dev_id; 1986 rsp = (struct rsp_que *) dev_id;
2064 if (!rsp) { 1987 if (!rsp) {
@@ -2070,12 +1993,12 @@ qla24xx_msix_default(int irq, void *dev_id)
2070 reg = &ha->iobase->isp24; 1993 reg = &ha->iobase->isp24;
2071 status = 0; 1994 status = 0;
2072 1995
2073 spin_lock_irq(&ha->hardware_lock); 1996 spin_lock_irqsave(&ha->hardware_lock, flags);
2074 vha = pci_get_drvdata(ha->pdev); 1997 vha = pci_get_drvdata(ha->pdev);
2075 do { 1998 do {
2076 stat = RD_REG_DWORD(&reg->host_status); 1999 stat = RD_REG_DWORD(&reg->host_status);
2077 if (stat & HSRX_RISC_PAUSED) { 2000 if (stat & HSRX_RISC_PAUSED) {
2078 if (pci_channel_offline(ha->pdev)) 2001 if (unlikely(pci_channel_offline(ha->pdev)))
2079 break; 2002 break;
2080 2003
2081 hccr = RD_REG_DWORD(&reg->hccr); 2004 hccr = RD_REG_DWORD(&reg->hccr);
@@ -2119,7 +2042,7 @@ qla24xx_msix_default(int irq, void *dev_id)
2119 } 2042 }
2120 WRT_REG_DWORD(&reg->hccr, HCCRX_CLR_RISC_INT); 2043 WRT_REG_DWORD(&reg->hccr, HCCRX_CLR_RISC_INT);
2121 } while (0); 2044 } while (0);
2122 spin_unlock_irq(&ha->hardware_lock); 2045 spin_unlock_irqrestore(&ha->hardware_lock, flags);
2123 2046
2124 if (test_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags) && 2047 if (test_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags) &&
2125 (status & MBX_INTERRUPT) && ha->flags.mbox_int) { 2048 (status & MBX_INTERRUPT) && ha->flags.mbox_int) {
@@ -2357,30 +2280,3 @@ int qla25xx_request_irq(struct rsp_que *rsp)
2357 msix->rsp = rsp; 2280 msix->rsp = rsp;
2358 return ret; 2281 return ret;
2359} 2282}
2360
2361struct scsi_qla_host *
2362qla25xx_get_host(struct rsp_que *rsp)
2363{
2364 srb_t *sp;
2365 struct qla_hw_data *ha = rsp->hw;
2366 struct scsi_qla_host *vha = NULL;
2367 struct sts_entry_24xx *pkt;
2368 struct req_que *req;
2369 uint16_t que;
2370 uint32_t handle;
2371
2372 pkt = (struct sts_entry_24xx *) rsp->ring_ptr;
2373 que = MSW(pkt->handle);
2374 handle = (uint32_t) LSW(pkt->handle);
2375 req = ha->req_q_map[que];
2376 if (handle < MAX_OUTSTANDING_COMMANDS) {
2377 sp = req->outstanding_cmds[handle];
2378 if (sp)
2379 return sp->fcport->vha;
2380 else
2381 goto base_que;
2382 }
2383base_que:
2384 vha = pci_get_drvdata(ha->pdev);
2385 return vha;
2386}
diff --git a/drivers/scsi/qla2xxx/qla_mbx.c b/drivers/scsi/qla2xxx/qla_mbx.c
index 05d595d9a7ef..056e4d4505f3 100644
--- a/drivers/scsi/qla2xxx/qla_mbx.c
+++ b/drivers/scsi/qla2xxx/qla_mbx.c
@@ -56,6 +56,12 @@ qla2x00_mailbox_command(scsi_qla_host_t *vha, mbx_cmd_t *mcp)
56 56
57 DEBUG11(printk("%s(%ld): entered.\n", __func__, base_vha->host_no)); 57 DEBUG11(printk("%s(%ld): entered.\n", __func__, base_vha->host_no));
58 58
59 if (ha->flags.pci_channel_io_perm_failure) {
60 DEBUG(printk("%s(%ld): Perm failure on EEH, timeout MBX "
61 "Exiting.\n", __func__, vha->host_no));
62 return QLA_FUNCTION_TIMEOUT;
63 }
64
59 /* 65 /*
60 * Wait for active mailbox commands to finish by waiting at most tov 66 * Wait for active mailbox commands to finish by waiting at most tov
61 * seconds. This is to serialize actual issuing of mailbox cmds during 67 * seconds. This is to serialize actual issuing of mailbox cmds during
@@ -154,10 +160,14 @@ qla2x00_mailbox_command(scsi_qla_host_t *vha, mbx_cmd_t *mcp)
154 /* Check for pending interrupts. */ 160 /* Check for pending interrupts. */
155 qla2x00_poll(ha->rsp_q_map[0]); 161 qla2x00_poll(ha->rsp_q_map[0]);
156 162
157 if (command != MBC_LOAD_RISC_RAM_EXTENDED && 163 if (!ha->flags.mbox_int &&
158 !ha->flags.mbox_int) 164 !(IS_QLA2200(ha) &&
165 command == MBC_LOAD_RISC_RAM_EXTENDED))
159 msleep(10); 166 msleep(10);
160 } /* while */ 167 } /* while */
168 DEBUG17(qla_printk(KERN_WARNING, ha,
169 "Waited %d sec\n",
170 (uint)((jiffies - (wait_time - (mcp->tov * HZ)))/HZ)));
161 } 171 }
162 172
163 /* Check whether we timed out */ 173 /* Check whether we timed out */
@@ -227,7 +237,8 @@ qla2x00_mailbox_command(scsi_qla_host_t *vha, mbx_cmd_t *mcp)
227 237
228 if (rval == QLA_FUNCTION_TIMEOUT && 238 if (rval == QLA_FUNCTION_TIMEOUT &&
229 mcp->mb[0] != MBC_GEN_SYSTEM_ERROR) { 239 mcp->mb[0] != MBC_GEN_SYSTEM_ERROR) {
230 if (!io_lock_on || (mcp->flags & IOCTL_CMD)) { 240 if (!io_lock_on || (mcp->flags & IOCTL_CMD) ||
241 ha->flags.eeh_busy) {
231 /* not in dpc. schedule it for dpc to take over. */ 242 /* not in dpc. schedule it for dpc to take over. */
232 DEBUG(printk("%s(%ld): timeout schedule " 243 DEBUG(printk("%s(%ld): timeout schedule "
233 "isp_abort_needed.\n", __func__, 244 "isp_abort_needed.\n", __func__,
@@ -237,7 +248,7 @@ qla2x00_mailbox_command(scsi_qla_host_t *vha, mbx_cmd_t *mcp)
237 base_vha->host_no)); 248 base_vha->host_no));
238 qla_printk(KERN_WARNING, ha, 249 qla_printk(KERN_WARNING, ha,
239 "Mailbox command timeout occurred. Scheduling ISP " 250 "Mailbox command timeout occurred. Scheduling ISP "
240 "abort.\n"); 251 "abort. eeh_busy: 0x%x\n", ha->flags.eeh_busy);
241 set_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags); 252 set_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags);
242 qla2xxx_wake_dpc(vha); 253 qla2xxx_wake_dpc(vha);
243 } else if (!abort_active) { 254 } else if (!abort_active) {
@@ -2530,6 +2541,9 @@ qla2x00_enable_eft_trace(scsi_qla_host_t *vha, dma_addr_t eft_dma,
2530 if (!IS_FWI2_CAPABLE(vha->hw)) 2541 if (!IS_FWI2_CAPABLE(vha->hw))
2531 return QLA_FUNCTION_FAILED; 2542 return QLA_FUNCTION_FAILED;
2532 2543
2544 if (unlikely(pci_channel_offline(vha->hw->pdev)))
2545 return QLA_FUNCTION_FAILED;
2546
2533 DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no)); 2547 DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
2534 2548
2535 mcp->mb[0] = MBC_TRACE_CONTROL; 2549 mcp->mb[0] = MBC_TRACE_CONTROL;
@@ -2565,6 +2579,9 @@ qla2x00_disable_eft_trace(scsi_qla_host_t *vha)
2565 if (!IS_FWI2_CAPABLE(vha->hw)) 2579 if (!IS_FWI2_CAPABLE(vha->hw))
2566 return QLA_FUNCTION_FAILED; 2580 return QLA_FUNCTION_FAILED;
2567 2581
2582 if (unlikely(pci_channel_offline(vha->hw->pdev)))
2583 return QLA_FUNCTION_FAILED;
2584
2568 DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no)); 2585 DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
2569 2586
2570 mcp->mb[0] = MBC_TRACE_CONTROL; 2587 mcp->mb[0] = MBC_TRACE_CONTROL;
@@ -2595,6 +2612,9 @@ qla2x00_enable_fce_trace(scsi_qla_host_t *vha, dma_addr_t fce_dma,
2595 if (!IS_QLA25XX(vha->hw) && !IS_QLA81XX(vha->hw)) 2612 if (!IS_QLA25XX(vha->hw) && !IS_QLA81XX(vha->hw))
2596 return QLA_FUNCTION_FAILED; 2613 return QLA_FUNCTION_FAILED;
2597 2614
2615 if (unlikely(pci_channel_offline(vha->hw->pdev)))
2616 return QLA_FUNCTION_FAILED;
2617
2598 DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no)); 2618 DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
2599 2619
2600 mcp->mb[0] = MBC_TRACE_CONTROL; 2620 mcp->mb[0] = MBC_TRACE_CONTROL;
@@ -2639,6 +2659,9 @@ qla2x00_disable_fce_trace(scsi_qla_host_t *vha, uint64_t *wr, uint64_t *rd)
2639 if (!IS_FWI2_CAPABLE(vha->hw)) 2659 if (!IS_FWI2_CAPABLE(vha->hw))
2640 return QLA_FUNCTION_FAILED; 2660 return QLA_FUNCTION_FAILED;
2641 2661
2662 if (unlikely(pci_channel_offline(vha->hw->pdev)))
2663 return QLA_FUNCTION_FAILED;
2664
2642 DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no)); 2665 DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
2643 2666
2644 mcp->mb[0] = MBC_TRACE_CONTROL; 2667 mcp->mb[0] = MBC_TRACE_CONTROL;
@@ -3643,3 +3666,36 @@ qla2x00_write_ram_word(scsi_qla_host_t *vha, uint32_t risc_addr, uint32_t data)
3643 3666
3644 return rval; 3667 return rval;
3645} 3668}
3669
3670int
3671qla2x00_get_data_rate(scsi_qla_host_t *vha)
3672{
3673 int rval;
3674 mbx_cmd_t mc;
3675 mbx_cmd_t *mcp = &mc;
3676 struct qla_hw_data *ha = vha->hw;
3677
3678 if (!IS_FWI2_CAPABLE(ha))
3679 return QLA_FUNCTION_FAILED;
3680
3681 DEBUG11(printk(KERN_INFO "%s(%ld): entered.\n", __func__, vha->host_no));
3682
3683 mcp->mb[0] = MBC_DATA_RATE;
3684 mcp->mb[1] = 0;
3685 mcp->out_mb = MBX_1|MBX_0;
3686 mcp->in_mb = MBX_2|MBX_1|MBX_0;
3687 mcp->tov = MBX_TOV_SECONDS;
3688 mcp->flags = 0;
3689 rval = qla2x00_mailbox_command(vha, mcp);
3690 if (rval != QLA_SUCCESS) {
3691 DEBUG2_3_11(printk(KERN_INFO "%s(%ld): failed=%x mb[0]=%x.\n",
3692 __func__, vha->host_no, rval, mcp->mb[0]));
3693 } else {
3694 DEBUG11(printk(KERN_INFO
3695 "%s(%ld): done.\n", __func__, vha->host_no));
3696 if (mcp->mb[1] != 0x7)
3697 ha->link_data_rate = mcp->mb[1];
3698 }
3699
3700 return rval;
3701}
diff --git a/drivers/scsi/qla2xxx/qla_mid.c b/drivers/scsi/qla2xxx/qla_mid.c
index a47d34308a3a..ff17dee28613 100644
--- a/drivers/scsi/qla2xxx/qla_mid.c
+++ b/drivers/scsi/qla2xxx/qla_mid.c
@@ -636,11 +636,15 @@ failed:
636 636
637static void qla_do_work(struct work_struct *work) 637static void qla_do_work(struct work_struct *work)
638{ 638{
639 unsigned long flags;
639 struct rsp_que *rsp = container_of(work, struct rsp_que, q_work); 640 struct rsp_que *rsp = container_of(work, struct rsp_que, q_work);
640 struct scsi_qla_host *vha; 641 struct scsi_qla_host *vha;
642 struct qla_hw_data *ha = rsp->hw;
641 643
642 vha = qla25xx_get_host(rsp); 644 spin_lock_irqsave(&rsp->hw->hardware_lock, flags);
645 vha = pci_get_drvdata(ha->pdev);
643 qla24xx_process_response_queue(vha, rsp); 646 qla24xx_process_response_queue(vha, rsp);
647 spin_unlock_irqrestore(&rsp->hw->hardware_lock, flags);
644} 648}
645 649
646/* create response queue */ 650/* create response queue */
@@ -696,6 +700,10 @@ qla25xx_create_rsp_que(struct qla_hw_data *ha, uint16_t options,
696 /* Use alternate PCI devfn */ 700 /* Use alternate PCI devfn */
697 if (LSB(rsp->rid)) 701 if (LSB(rsp->rid))
698 options |= BIT_5; 702 options |= BIT_5;
703 /* Enable MSIX handshake mode on for uncapable adapters */
704 if (!IS_MSIX_NACK_CAPABLE(ha))
705 options |= BIT_6;
706
699 rsp->options = options; 707 rsp->options = options;
700 rsp->id = que_id; 708 rsp->id = que_id;
701 reg = ISP_QUE_REG(ha, que_id); 709 reg = ISP_QUE_REG(ha, que_id);
diff --git a/drivers/scsi/qla2xxx/qla_os.c b/drivers/scsi/qla2xxx/qla_os.c
index 41669357b186..8529eb1f3cd4 100644
--- a/drivers/scsi/qla2xxx/qla_os.c
+++ b/drivers/scsi/qla2xxx/qla_os.c
@@ -78,21 +78,6 @@ module_param(ql2xmaxqdepth, int, S_IRUGO|S_IWUSR);
78MODULE_PARM_DESC(ql2xmaxqdepth, 78MODULE_PARM_DESC(ql2xmaxqdepth,
79 "Maximum queue depth to report for target devices."); 79 "Maximum queue depth to report for target devices.");
80 80
81int ql2xqfulltracking = 1;
82module_param(ql2xqfulltracking, int, S_IRUGO|S_IWUSR);
83MODULE_PARM_DESC(ql2xqfulltracking,
84 "Controls whether the driver tracks queue full status "
85 "returns and dynamically adjusts a scsi device's queue "
86 "depth. Default is 1, perform tracking. Set to 0 to "
87 "disable dynamic tracking and adjustment of queue depth.");
88
89int ql2xqfullrampup = 120;
90module_param(ql2xqfullrampup, int, S_IRUGO|S_IWUSR);
91MODULE_PARM_DESC(ql2xqfullrampup,
92 "Number of seconds to wait to begin to ramp-up the queue "
93 "depth for a device after a queue-full condition has been "
94 "detected. Default is 120 seconds.");
95
96int ql2xiidmaenable=1; 81int ql2xiidmaenable=1;
97module_param(ql2xiidmaenable, int, S_IRUGO|S_IRUSR); 82module_param(ql2xiidmaenable, int, S_IRUGO|S_IRUSR);
98MODULE_PARM_DESC(ql2xiidmaenable, 83MODULE_PARM_DESC(ql2xiidmaenable,
@@ -490,11 +475,11 @@ qla2xxx_queuecommand(struct scsi_cmnd *cmd, void (*done)(struct scsi_cmnd *))
490 srb_t *sp; 475 srb_t *sp;
491 int rval; 476 int rval;
492 477
493 if (unlikely(pci_channel_offline(ha->pdev))) { 478 if (ha->flags.eeh_busy) {
494 if (ha->pdev->error_state == pci_channel_io_frozen) 479 if (ha->flags.pci_channel_io_perm_failure)
495 cmd->result = DID_REQUEUE << 16;
496 else
497 cmd->result = DID_NO_CONNECT << 16; 480 cmd->result = DID_NO_CONNECT << 16;
481 else
482 cmd->result = DID_REQUEUE << 16;
498 goto qc24_fail_command; 483 goto qc24_fail_command;
499 } 484 }
500 485
@@ -567,8 +552,15 @@ qla2x00_eh_wait_on_command(struct scsi_cmnd *cmd)
567#define ABORT_POLLING_PERIOD 1000 552#define ABORT_POLLING_PERIOD 1000
568#define ABORT_WAIT_ITER ((10 * 1000) / (ABORT_POLLING_PERIOD)) 553#define ABORT_WAIT_ITER ((10 * 1000) / (ABORT_POLLING_PERIOD))
569 unsigned long wait_iter = ABORT_WAIT_ITER; 554 unsigned long wait_iter = ABORT_WAIT_ITER;
555 scsi_qla_host_t *vha = shost_priv(cmd->device->host);
556 struct qla_hw_data *ha = vha->hw;
570 int ret = QLA_SUCCESS; 557 int ret = QLA_SUCCESS;
571 558
559 if (unlikely(pci_channel_offline(ha->pdev)) || ha->flags.eeh_busy) {
560 DEBUG17(qla_printk(KERN_WARNING, ha, "return:eh_wait\n"));
561 return ret;
562 }
563
572 while (CMD_SP(cmd) && wait_iter--) { 564 while (CMD_SP(cmd) && wait_iter--) {
573 msleep(ABORT_POLLING_PERIOD); 565 msleep(ABORT_POLLING_PERIOD);
574 } 566 }
@@ -1196,7 +1188,6 @@ qla2xxx_slave_configure(struct scsi_device *sdev)
1196 scsi_qla_host_t *vha = shost_priv(sdev->host); 1188 scsi_qla_host_t *vha = shost_priv(sdev->host);
1197 struct qla_hw_data *ha = vha->hw; 1189 struct qla_hw_data *ha = vha->hw;
1198 struct fc_rport *rport = starget_to_rport(sdev->sdev_target); 1190 struct fc_rport *rport = starget_to_rport(sdev->sdev_target);
1199 fc_port_t *fcport = *(fc_port_t **)rport->dd_data;
1200 struct req_que *req = vha->req; 1191 struct req_que *req = vha->req;
1201 1192
1202 if (sdev->tagged_supported) 1193 if (sdev->tagged_supported)
@@ -1205,8 +1196,6 @@ qla2xxx_slave_configure(struct scsi_device *sdev)
1205 scsi_deactivate_tcq(sdev, req->max_q_depth); 1196 scsi_deactivate_tcq(sdev, req->max_q_depth);
1206 1197
1207 rport->dev_loss_tmo = ha->port_down_retry_count; 1198 rport->dev_loss_tmo = ha->port_down_retry_count;
1208 if (sdev->type == TYPE_TAPE)
1209 fcport->flags |= FCF_TAPE_PRESENT;
1210 1199
1211 return 0; 1200 return 0;
1212} 1201}
@@ -1217,13 +1206,61 @@ qla2xxx_slave_destroy(struct scsi_device *sdev)
1217 sdev->hostdata = NULL; 1206 sdev->hostdata = NULL;
1218} 1207}
1219 1208
1209static void qla2x00_handle_queue_full(struct scsi_device *sdev, int qdepth)
1210{
1211 fc_port_t *fcport = (struct fc_port *) sdev->hostdata;
1212
1213 if (!scsi_track_queue_full(sdev, qdepth))
1214 return;
1215
1216 DEBUG2(qla_printk(KERN_INFO, fcport->vha->hw,
1217 "scsi(%ld:%d:%d:%d): Queue depth adjusted-down to %d.\n",
1218 fcport->vha->host_no, sdev->channel, sdev->id, sdev->lun,
1219 sdev->queue_depth));
1220}
1221
1222static void qla2x00_adjust_sdev_qdepth_up(struct scsi_device *sdev, int qdepth)
1223{
1224 fc_port_t *fcport = sdev->hostdata;
1225 struct scsi_qla_host *vha = fcport->vha;
1226 struct qla_hw_data *ha = vha->hw;
1227 struct req_que *req = NULL;
1228
1229 req = vha->req;
1230 if (!req)
1231 return;
1232
1233 if (req->max_q_depth <= sdev->queue_depth || req->max_q_depth < qdepth)
1234 return;
1235
1236 if (sdev->ordered_tags)
1237 scsi_adjust_queue_depth(sdev, MSG_ORDERED_TAG, qdepth);
1238 else
1239 scsi_adjust_queue_depth(sdev, MSG_SIMPLE_TAG, qdepth);
1240
1241 DEBUG2(qla_printk(KERN_INFO, ha,
1242 "scsi(%ld:%d:%d:%d): Queue depth adjusted-up to %d.\n",
1243 fcport->vha->host_no, sdev->channel, sdev->id, sdev->lun,
1244 sdev->queue_depth));
1245}
1246
1220static int 1247static int
1221qla2x00_change_queue_depth(struct scsi_device *sdev, int qdepth, int reason) 1248qla2x00_change_queue_depth(struct scsi_device *sdev, int qdepth, int reason)
1222{ 1249{
1223 if (reason != SCSI_QDEPTH_DEFAULT) 1250 switch (reason) {
1224 return -EOPNOTSUPP; 1251 case SCSI_QDEPTH_DEFAULT:
1252 scsi_adjust_queue_depth(sdev, scsi_get_tag_type(sdev), qdepth);
1253 break;
1254 case SCSI_QDEPTH_QFULL:
1255 qla2x00_handle_queue_full(sdev, qdepth);
1256 break;
1257 case SCSI_QDEPTH_RAMP_UP:
1258 qla2x00_adjust_sdev_qdepth_up(sdev, qdepth);
1259 break;
1260 default:
1261 return EOPNOTSUPP;
1262 }
1225 1263
1226 scsi_adjust_queue_depth(sdev, scsi_get_tag_type(sdev), qdepth);
1227 return sdev->queue_depth; 1264 return sdev->queue_depth;
1228} 1265}
1229 1266
@@ -1777,6 +1814,13 @@ qla2x00_probe_one(struct pci_dev *pdev, const struct pci_device_id *id)
1777 1814
1778 /* Set ISP-type information. */ 1815 /* Set ISP-type information. */
1779 qla2x00_set_isp_flags(ha); 1816 qla2x00_set_isp_flags(ha);
1817
1818 /* Set EEH reset type to fundamental if required by hba */
1819 if ( IS_QLA24XX(ha) || IS_QLA25XX(ha) || IS_QLA81XX(ha)) {
1820 pdev->needs_freset = 1;
1821 pci_save_state(pdev);
1822 }
1823
1780 /* Configure PCI I/O space */ 1824 /* Configure PCI I/O space */
1781 ret = qla2x00_iospace_config(ha); 1825 ret = qla2x00_iospace_config(ha);
1782 if (ret) 1826 if (ret)
@@ -2003,13 +2047,13 @@ skip_dpc:
2003 DEBUG2(printk("DEBUG: detect hba %ld at address = %p\n", 2047 DEBUG2(printk("DEBUG: detect hba %ld at address = %p\n",
2004 base_vha->host_no, ha)); 2048 base_vha->host_no, ha));
2005 2049
2006 base_vha->flags.init_done = 1;
2007 base_vha->flags.online = 1;
2008
2009 ret = scsi_add_host(host, &pdev->dev); 2050 ret = scsi_add_host(host, &pdev->dev);
2010 if (ret) 2051 if (ret)
2011 goto probe_failed; 2052 goto probe_failed;
2012 2053
2054 base_vha->flags.init_done = 1;
2055 base_vha->flags.online = 1;
2056
2013 ha->isp_ops->enable_intrs(ha); 2057 ha->isp_ops->enable_intrs(ha);
2014 2058
2015 scsi_scan_host(host); 2059 scsi_scan_host(host);
@@ -2141,6 +2185,24 @@ qla2x00_free_device(scsi_qla_host_t *vha)
2141{ 2185{
2142 struct qla_hw_data *ha = vha->hw; 2186 struct qla_hw_data *ha = vha->hw;
2143 2187
2188 qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16);
2189
2190 /* Disable timer */
2191 if (vha->timer_active)
2192 qla2x00_stop_timer(vha);
2193
2194 /* Kill the kernel thread for this host */
2195 if (ha->dpc_thread) {
2196 struct task_struct *t = ha->dpc_thread;
2197
2198 /*
2199 * qla2xxx_wake_dpc checks for ->dpc_thread
2200 * so we need to zero it out.
2201 */
2202 ha->dpc_thread = NULL;
2203 kthread_stop(t);
2204 }
2205
2144 qla25xx_delete_queues(vha); 2206 qla25xx_delete_queues(vha);
2145 2207
2146 if (ha->flags.fce_enabled) 2208 if (ha->flags.fce_enabled)
@@ -2152,6 +2214,8 @@ qla2x00_free_device(scsi_qla_host_t *vha)
2152 /* Stop currently executing firmware. */ 2214 /* Stop currently executing firmware. */
2153 qla2x00_try_to_stop_firmware(vha); 2215 qla2x00_try_to_stop_firmware(vha);
2154 2216
2217 vha->flags.online = 0;
2218
2155 /* turn-off interrupts on the card */ 2219 /* turn-off interrupts on the card */
2156 if (ha->interrupts_on) 2220 if (ha->interrupts_on)
2157 ha->isp_ops->disable_intrs(ha); 2221 ha->isp_ops->disable_intrs(ha);
@@ -2738,7 +2802,7 @@ void qla2x00_relogin(struct scsi_qla_host *vha)
2738 2802
2739 fcport->login_retry--; 2803 fcport->login_retry--;
2740 if (fcport->flags & FCF_FABRIC_DEVICE) { 2804 if (fcport->flags & FCF_FABRIC_DEVICE) {
2741 if (fcport->flags & FCF_TAPE_PRESENT) 2805 if (fcport->flags & FCF_FCP2_DEVICE)
2742 ha->isp_ops->fabric_logout(vha, 2806 ha->isp_ops->fabric_logout(vha,
2743 fcport->loop_id, 2807 fcport->loop_id,
2744 fcport->d_id.b.domain, 2808 fcport->d_id.b.domain,
@@ -2826,6 +2890,13 @@ qla2x00_do_dpc(void *data)
2826 if (!base_vha->flags.init_done) 2890 if (!base_vha->flags.init_done)
2827 continue; 2891 continue;
2828 2892
2893 if (ha->flags.eeh_busy) {
2894 DEBUG17(qla_printk(KERN_WARNING, ha,
2895 "qla2x00_do_dpc: dpc_flags: %lx\n",
2896 base_vha->dpc_flags));
2897 continue;
2898 }
2899
2829 DEBUG3(printk("scsi(%ld): DPC handler\n", base_vha->host_no)); 2900 DEBUG3(printk("scsi(%ld): DPC handler\n", base_vha->host_no));
2830 2901
2831 ha->dpc_active = 1; 2902 ha->dpc_active = 1;
@@ -3016,8 +3087,13 @@ qla2x00_timer(scsi_qla_host_t *vha)
3016 int index; 3087 int index;
3017 srb_t *sp; 3088 srb_t *sp;
3018 int t; 3089 int t;
3090 uint16_t w;
3019 struct qla_hw_data *ha = vha->hw; 3091 struct qla_hw_data *ha = vha->hw;
3020 struct req_que *req; 3092 struct req_que *req;
3093
3094 /* Hardware read to raise pending EEH errors during mailbox waits. */
3095 if (!pci_channel_offline(ha->pdev))
3096 pci_read_config_word(ha->pdev, PCI_VENDOR_ID, &w);
3021 /* 3097 /*
3022 * Ports - Port down timer. 3098 * Ports - Port down timer.
3023 * 3099 *
@@ -3062,7 +3138,10 @@ qla2x00_timer(scsi_qla_host_t *vha)
3062 if (!IS_QLA2100(ha) && vha->link_down_timeout) 3138 if (!IS_QLA2100(ha) && vha->link_down_timeout)
3063 atomic_set(&vha->loop_state, LOOP_DEAD); 3139 atomic_set(&vha->loop_state, LOOP_DEAD);
3064 3140
3065 /* Schedule an ISP abort to return any tape commands. */ 3141 /*
3142 * Schedule an ISP abort to return any FCP2-device
3143 * commands.
3144 */
3066 /* NPIV - scan physical port only */ 3145 /* NPIV - scan physical port only */
3067 if (!vha->vp_idx) { 3146 if (!vha->vp_idx) {
3068 spin_lock_irqsave(&ha->hardware_lock, 3147 spin_lock_irqsave(&ha->hardware_lock,
@@ -3079,7 +3158,7 @@ qla2x00_timer(scsi_qla_host_t *vha)
3079 if (sp->ctx) 3158 if (sp->ctx)
3080 continue; 3159 continue;
3081 sfcp = sp->fcport; 3160 sfcp = sp->fcport;
3082 if (!(sfcp->flags & FCF_TAPE_PRESENT)) 3161 if (!(sfcp->flags & FCF_FCP2_DEVICE))
3083 continue; 3162 continue;
3084 3163
3085 set_bit(ISP_ABORT_NEEDED, 3164 set_bit(ISP_ABORT_NEEDED,
@@ -3219,16 +3298,23 @@ qla2x00_release_firmware(void)
3219static pci_ers_result_t 3298static pci_ers_result_t
3220qla2xxx_pci_error_detected(struct pci_dev *pdev, pci_channel_state_t state) 3299qla2xxx_pci_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
3221{ 3300{
3222 scsi_qla_host_t *base_vha = pci_get_drvdata(pdev); 3301 scsi_qla_host_t *vha = pci_get_drvdata(pdev);
3302 struct qla_hw_data *ha = vha->hw;
3303
3304 DEBUG2(qla_printk(KERN_WARNING, ha, "error_detected:state %x\n",
3305 state));
3223 3306
3224 switch (state) { 3307 switch (state) {
3225 case pci_channel_io_normal: 3308 case pci_channel_io_normal:
3309 ha->flags.eeh_busy = 0;
3226 return PCI_ERS_RESULT_CAN_RECOVER; 3310 return PCI_ERS_RESULT_CAN_RECOVER;
3227 case pci_channel_io_frozen: 3311 case pci_channel_io_frozen:
3312 ha->flags.eeh_busy = 1;
3228 pci_disable_device(pdev); 3313 pci_disable_device(pdev);
3229 return PCI_ERS_RESULT_NEED_RESET; 3314 return PCI_ERS_RESULT_NEED_RESET;
3230 case pci_channel_io_perm_failure: 3315 case pci_channel_io_perm_failure:
3231 qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16); 3316 ha->flags.pci_channel_io_perm_failure = 1;
3317 qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16);
3232 return PCI_ERS_RESULT_DISCONNECT; 3318 return PCI_ERS_RESULT_DISCONNECT;
3233 } 3319 }
3234 return PCI_ERS_RESULT_NEED_RESET; 3320 return PCI_ERS_RESULT_NEED_RESET;
@@ -3279,6 +3365,8 @@ qla2xxx_pci_slot_reset(struct pci_dev *pdev)
3279 struct qla_hw_data *ha = base_vha->hw; 3365 struct qla_hw_data *ha = base_vha->hw;
3280 int rc; 3366 int rc;
3281 3367
3368 DEBUG17(qla_printk(KERN_WARNING, ha, "slot_reset\n"));
3369
3282 if (ha->mem_only) 3370 if (ha->mem_only)
3283 rc = pci_enable_device_mem(pdev); 3371 rc = pci_enable_device_mem(pdev);
3284 else 3372 else
@@ -3287,19 +3375,33 @@ qla2xxx_pci_slot_reset(struct pci_dev *pdev)
3287 if (rc) { 3375 if (rc) {
3288 qla_printk(KERN_WARNING, ha, 3376 qla_printk(KERN_WARNING, ha,
3289 "Can't re-enable PCI device after reset.\n"); 3377 "Can't re-enable PCI device after reset.\n");
3290
3291 return ret; 3378 return ret;
3292 } 3379 }
3293 pci_set_master(pdev);
3294 3380
3295 if (ha->isp_ops->pci_config(base_vha)) 3381 if (ha->isp_ops->pci_config(base_vha))
3296 return ret; 3382 return ret;
3297 3383
3384#ifdef QL_DEBUG_LEVEL_17
3385 {
3386 uint8_t b;
3387 uint32_t i;
3388
3389 printk("slot_reset_1: ");
3390 for (i = 0; i < 256; i++) {
3391 pci_read_config_byte(ha->pdev, i, &b);
3392 printk("%s%02x", (i%16) ? " " : "\n", b);
3393 }
3394 printk("\n");
3395 }
3396#endif
3298 set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags); 3397 set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
3299 if (qla2x00_abort_isp(base_vha) == QLA_SUCCESS) 3398 if (qla2x00_abort_isp(base_vha) == QLA_SUCCESS)
3300 ret = PCI_ERS_RESULT_RECOVERED; 3399 ret = PCI_ERS_RESULT_RECOVERED;
3301 clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags); 3400 clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
3302 3401
3402 DEBUG17(qla_printk(KERN_WARNING, ha,
3403 "slot_reset-return:ret=%x\n", ret));
3404
3303 return ret; 3405 return ret;
3304} 3406}
3305 3407
@@ -3310,12 +3412,17 @@ qla2xxx_pci_resume(struct pci_dev *pdev)
3310 struct qla_hw_data *ha = base_vha->hw; 3412 struct qla_hw_data *ha = base_vha->hw;
3311 int ret; 3413 int ret;
3312 3414
3415 DEBUG17(qla_printk(KERN_WARNING, ha, "pci_resume\n"));
3416
3313 ret = qla2x00_wait_for_hba_online(base_vha); 3417 ret = qla2x00_wait_for_hba_online(base_vha);
3314 if (ret != QLA_SUCCESS) { 3418 if (ret != QLA_SUCCESS) {
3315 qla_printk(KERN_ERR, ha, 3419 qla_printk(KERN_ERR, ha,
3316 "the device failed to resume I/O " 3420 "the device failed to resume I/O "
3317 "from slot/link_reset"); 3421 "from slot/link_reset");
3318 } 3422 }
3423
3424 ha->flags.eeh_busy = 0;
3425
3319 pci_cleanup_aer_uncorrect_error_status(pdev); 3426 pci_cleanup_aer_uncorrect_error_status(pdev);
3320} 3427}
3321 3428
diff --git a/drivers/scsi/qla2xxx/qla_sup.c b/drivers/scsi/qla2xxx/qla_sup.c
index 010e69b29afe..371dc895972a 100644
--- a/drivers/scsi/qla2xxx/qla_sup.c
+++ b/drivers/scsi/qla2xxx/qla_sup.c
@@ -2292,11 +2292,14 @@ qla25xx_read_optrom_data(struct scsi_qla_host *vha, uint8_t *buf,
2292 uint32_t faddr, left, burst; 2292 uint32_t faddr, left, burst;
2293 struct qla_hw_data *ha = vha->hw; 2293 struct qla_hw_data *ha = vha->hw;
2294 2294
2295 if (IS_QLA25XX(ha) || IS_QLA81XX(ha))
2296 goto try_fast;
2295 if (offset & 0xfff) 2297 if (offset & 0xfff)
2296 goto slow_read; 2298 goto slow_read;
2297 if (length < OPTROM_BURST_SIZE) 2299 if (length < OPTROM_BURST_SIZE)
2298 goto slow_read; 2300 goto slow_read;
2299 2301
2302try_fast:
2300 optrom = dma_alloc_coherent(&ha->pdev->dev, OPTROM_BURST_SIZE, 2303 optrom = dma_alloc_coherent(&ha->pdev->dev, OPTROM_BURST_SIZE,
2301 &optrom_dma, GFP_KERNEL); 2304 &optrom_dma, GFP_KERNEL);
2302 if (!optrom) { 2305 if (!optrom) {
diff --git a/drivers/scsi/qla2xxx/qla_version.h b/drivers/scsi/qla2xxx/qla_version.h
index 807e0dbc67fa..ed36279a33c1 100644
--- a/drivers/scsi/qla2xxx/qla_version.h
+++ b/drivers/scsi/qla2xxx/qla_version.h
@@ -7,7 +7,7 @@
7/* 7/*
8 * Driver version 8 * Driver version
9 */ 9 */
10#define QLA2XXX_VERSION "8.03.01-k7" 10#define QLA2XXX_VERSION "8.03.01-k10"
11 11
12#define QLA_DRIVER_MAJOR_VER 8 12#define QLA_DRIVER_MAJOR_VER 8
13#define QLA_DRIVER_MINOR_VER 3 13#define QLA_DRIVER_MINOR_VER 3
diff --git a/drivers/scsi/scsi_lib.c b/drivers/scsi/scsi_lib.c
index e495d3813948..c6642423cc67 100644
--- a/drivers/scsi/scsi_lib.c
+++ b/drivers/scsi/scsi_lib.c
@@ -749,9 +749,9 @@ void scsi_io_completion(struct scsi_cmnd *cmd, unsigned int good_bytes)
749 */ 749 */
750 req->next_rq->resid_len = scsi_in(cmd)->resid; 750 req->next_rq->resid_len = scsi_in(cmd)->resid;
751 751
752 scsi_release_buffers(cmd);
752 blk_end_request_all(req, 0); 753 blk_end_request_all(req, 0);
753 754
754 scsi_release_buffers(cmd);
755 scsi_next_command(cmd); 755 scsi_next_command(cmd);
756 return; 756 return;
757 } 757 }
@@ -859,6 +859,7 @@ void scsi_io_completion(struct scsi_cmnd *cmd, unsigned int good_bytes)
859 case 0x07: /* operation in progress */ 859 case 0x07: /* operation in progress */
860 case 0x08: /* Long write in progress */ 860 case 0x08: /* Long write in progress */
861 case 0x09: /* self test in progress */ 861 case 0x09: /* self test in progress */
862 case 0x14: /* space allocation in progress */
862 action = ACTION_DELAYED_RETRY; 863 action = ACTION_DELAYED_RETRY;
863 break; 864 break;
864 default: 865 default:
diff --git a/drivers/scsi/scsi_transport_fc.c b/drivers/scsi/scsi_transport_fc.c
index 6531c91501be..653f22a8deb9 100644
--- a/drivers/scsi/scsi_transport_fc.c
+++ b/drivers/scsi/scsi_transport_fc.c
@@ -649,11 +649,22 @@ static __init int fc_transport_init(void)
649 return error; 649 return error;
650 error = transport_class_register(&fc_vport_class); 650 error = transport_class_register(&fc_vport_class);
651 if (error) 651 if (error)
652 return error; 652 goto unreg_host_class;
653 error = transport_class_register(&fc_rport_class); 653 error = transport_class_register(&fc_rport_class);
654 if (error) 654 if (error)
655 return error; 655 goto unreg_vport_class;
656 return transport_class_register(&fc_transport_class); 656 error = transport_class_register(&fc_transport_class);
657 if (error)
658 goto unreg_rport_class;
659 return 0;
660
661unreg_rport_class:
662 transport_class_unregister(&fc_rport_class);
663unreg_vport_class:
664 transport_class_unregister(&fc_vport_class);
665unreg_host_class:
666 transport_class_unregister(&fc_host_class);
667 return error;
657} 668}
658 669
659static void __exit fc_transport_exit(void) 670static void __exit fc_transport_exit(void)
@@ -3516,7 +3527,10 @@ fc_bsg_job_timeout(struct request *req)
3516 if (!done && i->f->bsg_timeout) { 3527 if (!done && i->f->bsg_timeout) {
3517 /* call LLDD to abort the i/o as it has timed out */ 3528 /* call LLDD to abort the i/o as it has timed out */
3518 err = i->f->bsg_timeout(job); 3529 err = i->f->bsg_timeout(job);
3519 if (err) 3530 if (err == -EAGAIN) {
3531 job->ref_cnt--;
3532 return BLK_EH_RESET_TIMER;
3533 } else if (err)
3520 printk(KERN_ERR "ERROR: FC BSG request timeout - LLD " 3534 printk(KERN_ERR "ERROR: FC BSG request timeout - LLD "
3521 "abort failed with status %d\n", err); 3535 "abort failed with status %d\n", err);
3522 } 3536 }
diff --git a/drivers/scsi/sd.c b/drivers/scsi/sd.c
index 9093c7261f33..255da53e5a01 100644
--- a/drivers/scsi/sd.c
+++ b/drivers/scsi/sd.c
@@ -264,6 +264,15 @@ sd_show_app_tag_own(struct device *dev, struct device_attribute *attr,
264 return snprintf(buf, 20, "%u\n", sdkp->ATO); 264 return snprintf(buf, 20, "%u\n", sdkp->ATO);
265} 265}
266 266
267static ssize_t
268sd_show_thin_provisioning(struct device *dev, struct device_attribute *attr,
269 char *buf)
270{
271 struct scsi_disk *sdkp = to_scsi_disk(dev);
272
273 return snprintf(buf, 20, "%u\n", sdkp->thin_provisioning);
274}
275
267static struct device_attribute sd_disk_attrs[] = { 276static struct device_attribute sd_disk_attrs[] = {
268 __ATTR(cache_type, S_IRUGO|S_IWUSR, sd_show_cache_type, 277 __ATTR(cache_type, S_IRUGO|S_IWUSR, sd_show_cache_type,
269 sd_store_cache_type), 278 sd_store_cache_type),
@@ -274,6 +283,7 @@ static struct device_attribute sd_disk_attrs[] = {
274 sd_store_manage_start_stop), 283 sd_store_manage_start_stop),
275 __ATTR(protection_type, S_IRUGO, sd_show_protection_type, NULL), 284 __ATTR(protection_type, S_IRUGO, sd_show_protection_type, NULL),
276 __ATTR(app_tag_own, S_IRUGO, sd_show_app_tag_own, NULL), 285 __ATTR(app_tag_own, S_IRUGO, sd_show_app_tag_own, NULL),
286 __ATTR(thin_provisioning, S_IRUGO, sd_show_thin_provisioning, NULL),
277 __ATTR_NULL, 287 __ATTR_NULL,
278}; 288};
279 289
@@ -399,6 +409,57 @@ static void sd_prot_op(struct scsi_cmnd *scmd, unsigned int dif)
399} 409}
400 410
401/** 411/**
412 * sd_prepare_discard - unmap blocks on thinly provisioned device
413 * @rq: Request to prepare
414 *
415 * Will issue either UNMAP or WRITE SAME(16) depending on preference
416 * indicated by target device.
417 **/
418static int sd_prepare_discard(struct request *rq)
419{
420 struct scsi_disk *sdkp = scsi_disk(rq->rq_disk);
421 struct bio *bio = rq->bio;
422 sector_t sector = bio->bi_sector;
423 unsigned int num = bio_sectors(bio);
424
425 if (sdkp->device->sector_size == 4096) {
426 sector >>= 3;
427 num >>= 3;
428 }
429
430 rq->cmd_type = REQ_TYPE_BLOCK_PC;
431 rq->timeout = SD_TIMEOUT;
432
433 memset(rq->cmd, 0, rq->cmd_len);
434
435 if (sdkp->unmap) {
436 char *buf = kmap_atomic(bio_page(bio), KM_USER0);
437
438 rq->cmd[0] = UNMAP;
439 rq->cmd[8] = 24;
440 rq->cmd_len = 10;
441
442 /* Ensure that data length matches payload */
443 rq->__data_len = bio->bi_size = bio->bi_io_vec->bv_len = 24;
444
445 put_unaligned_be16(6 + 16, &buf[0]);
446 put_unaligned_be16(16, &buf[2]);
447 put_unaligned_be64(sector, &buf[8]);
448 put_unaligned_be32(num, &buf[16]);
449
450 kunmap_atomic(buf, KM_USER0);
451 } else {
452 rq->cmd[0] = WRITE_SAME_16;
453 rq->cmd[1] = 0x8; /* UNMAP */
454 put_unaligned_be64(sector, &rq->cmd[2]);
455 put_unaligned_be32(num, &rq->cmd[10]);
456 rq->cmd_len = 16;
457 }
458
459 return BLKPREP_OK;
460}
461
462/**
402 * sd_init_command - build a scsi (read or write) command from 463 * sd_init_command - build a scsi (read or write) command from
403 * information in the request structure. 464 * information in the request structure.
404 * @SCpnt: pointer to mid-level's per scsi command structure that 465 * @SCpnt: pointer to mid-level's per scsi command structure that
@@ -418,6 +479,13 @@ static int sd_prep_fn(struct request_queue *q, struct request *rq)
418 int ret, host_dif; 479 int ret, host_dif;
419 unsigned char protect; 480 unsigned char protect;
420 481
482 /*
483 * Discard request come in as REQ_TYPE_FS but we turn them into
484 * block PC requests to make life easier.
485 */
486 if (blk_discard_rq(rq))
487 ret = sd_prepare_discard(rq);
488
421 if (rq->cmd_type == REQ_TYPE_BLOCK_PC) { 489 if (rq->cmd_type == REQ_TYPE_BLOCK_PC) {
422 ret = scsi_setup_blk_pc_cmnd(sdp, rq); 490 ret = scsi_setup_blk_pc_cmnd(sdp, rq);
423 goto out; 491 goto out;
@@ -1432,6 +1500,19 @@ static int read_capacity_16(struct scsi_disk *sdkp, struct scsi_device *sdp,
1432 sd_printk(KERN_NOTICE, sdkp, 1500 sd_printk(KERN_NOTICE, sdkp,
1433 "physical block alignment offset: %u\n", alignment); 1501 "physical block alignment offset: %u\n", alignment);
1434 1502
1503 if (buffer[14] & 0x80) { /* TPE */
1504 struct request_queue *q = sdp->request_queue;
1505
1506 sdkp->thin_provisioning = 1;
1507 q->limits.discard_granularity = sdkp->hw_sector_size;
1508 q->limits.max_discard_sectors = 0xffffffff;
1509
1510 if (buffer[14] & 0x40) /* TPRZ */
1511 q->limits.discard_zeroes_data = 1;
1512
1513 queue_flag_set_unlocked(QUEUE_FLAG_DISCARD, q);
1514 }
1515
1435 sdkp->capacity = lba + 1; 1516 sdkp->capacity = lba + 1;
1436 return sector_size; 1517 return sector_size;
1437} 1518}
@@ -1863,6 +1944,7 @@ void sd_read_app_tag_own(struct scsi_disk *sdkp, unsigned char *buffer)
1863 */ 1944 */
1864static void sd_read_block_limits(struct scsi_disk *sdkp) 1945static void sd_read_block_limits(struct scsi_disk *sdkp)
1865{ 1946{
1947 struct request_queue *q = sdkp->disk->queue;
1866 unsigned int sector_sz = sdkp->device->sector_size; 1948 unsigned int sector_sz = sdkp->device->sector_size;
1867 char *buffer; 1949 char *buffer;
1868 1950
@@ -1877,6 +1959,31 @@ static void sd_read_block_limits(struct scsi_disk *sdkp)
1877 blk_queue_io_opt(sdkp->disk->queue, 1959 blk_queue_io_opt(sdkp->disk->queue,
1878 get_unaligned_be32(&buffer[12]) * sector_sz); 1960 get_unaligned_be32(&buffer[12]) * sector_sz);
1879 1961
1962 /* Thin provisioning enabled and page length indicates TP support */
1963 if (sdkp->thin_provisioning && buffer[3] == 0x3c) {
1964 unsigned int lba_count, desc_count, granularity;
1965
1966 lba_count = get_unaligned_be32(&buffer[20]);
1967 desc_count = get_unaligned_be32(&buffer[24]);
1968
1969 if (lba_count) {
1970 q->limits.max_discard_sectors =
1971 lba_count * sector_sz >> 9;
1972
1973 if (desc_count)
1974 sdkp->unmap = 1;
1975 }
1976
1977 granularity = get_unaligned_be32(&buffer[28]);
1978
1979 if (granularity)
1980 q->limits.discard_granularity = granularity * sector_sz;
1981
1982 if (buffer[32] & 0x80)
1983 q->limits.discard_alignment =
1984 get_unaligned_be32(&buffer[32]) & ~(1 << 31);
1985 }
1986
1880 kfree(buffer); 1987 kfree(buffer);
1881} 1988}
1882 1989
diff --git a/drivers/scsi/sd.h b/drivers/scsi/sd.h
index e374804d26fb..43d3caf268ef 100644
--- a/drivers/scsi/sd.h
+++ b/drivers/scsi/sd.h
@@ -60,6 +60,8 @@ struct scsi_disk {
60 unsigned RCD : 1; /* state of disk RCD bit, unused */ 60 unsigned RCD : 1; /* state of disk RCD bit, unused */
61 unsigned DPOFUA : 1; /* state of disk DPOFUA bit */ 61 unsigned DPOFUA : 1; /* state of disk DPOFUA bit */
62 unsigned first_scan : 1; 62 unsigned first_scan : 1;
63 unsigned thin_provisioning : 1;
64 unsigned unmap : 1;
63}; 65};
64#define to_scsi_disk(obj) container_of(obj,struct scsi_disk,dev) 66#define to_scsi_disk(obj) container_of(obj,struct scsi_disk,dev)
65 67
diff --git a/drivers/scsi/st.c b/drivers/scsi/st.c
index ad59abb47722..d04ea9a6f673 100644
--- a/drivers/scsi/st.c
+++ b/drivers/scsi/st.c
@@ -552,13 +552,15 @@ st_do_scsi(struct st_request * SRpnt, struct scsi_tape * STp, unsigned char *cmd
552 SRpnt->waiting = waiting; 552 SRpnt->waiting = waiting;
553 553
554 if (STp->buffer->do_dio) { 554 if (STp->buffer->do_dio) {
555 mdata->page_order = 0;
555 mdata->nr_entries = STp->buffer->sg_segs; 556 mdata->nr_entries = STp->buffer->sg_segs;
556 mdata->pages = STp->buffer->mapped_pages; 557 mdata->pages = STp->buffer->mapped_pages;
557 } else { 558 } else {
559 mdata->page_order = STp->buffer->reserved_page_order;
558 mdata->nr_entries = 560 mdata->nr_entries =
559 DIV_ROUND_UP(bytes, PAGE_SIZE << mdata->page_order); 561 DIV_ROUND_UP(bytes, PAGE_SIZE << mdata->page_order);
560 STp->buffer->map_data.pages = STp->buffer->reserved_pages; 562 mdata->pages = STp->buffer->reserved_pages;
561 STp->buffer->map_data.offset = 0; 563 mdata->offset = 0;
562 } 564 }
563 565
564 memcpy(SRpnt->cmd, cmd, sizeof(SRpnt->cmd)); 566 memcpy(SRpnt->cmd, cmd, sizeof(SRpnt->cmd));
@@ -3719,7 +3721,7 @@ static int enlarge_buffer(struct st_buffer * STbuffer, int new_size, int need_dm
3719 priority |= __GFP_ZERO; 3721 priority |= __GFP_ZERO;
3720 3722
3721 if (STbuffer->frp_segs) { 3723 if (STbuffer->frp_segs) {
3722 order = STbuffer->map_data.page_order; 3724 order = STbuffer->reserved_page_order;
3723 b_size = PAGE_SIZE << order; 3725 b_size = PAGE_SIZE << order;
3724 } else { 3726 } else {
3725 for (b_size = PAGE_SIZE, order = 0; 3727 for (b_size = PAGE_SIZE, order = 0;
@@ -3752,7 +3754,7 @@ static int enlarge_buffer(struct st_buffer * STbuffer, int new_size, int need_dm
3752 segs++; 3754 segs++;
3753 } 3755 }
3754 STbuffer->b_data = page_address(STbuffer->reserved_pages[0]); 3756 STbuffer->b_data = page_address(STbuffer->reserved_pages[0]);
3755 STbuffer->map_data.page_order = order; 3757 STbuffer->reserved_page_order = order;
3756 3758
3757 return 1; 3759 return 1;
3758} 3760}
@@ -3765,7 +3767,7 @@ static void clear_buffer(struct st_buffer * st_bp)
3765 3767
3766 for (i=0; i < st_bp->frp_segs; i++) 3768 for (i=0; i < st_bp->frp_segs; i++)
3767 memset(page_address(st_bp->reserved_pages[i]), 0, 3769 memset(page_address(st_bp->reserved_pages[i]), 0,
3768 PAGE_SIZE << st_bp->map_data.page_order); 3770 PAGE_SIZE << st_bp->reserved_page_order);
3769 st_bp->cleared = 1; 3771 st_bp->cleared = 1;
3770} 3772}
3771 3773
@@ -3773,7 +3775,7 @@ static void clear_buffer(struct st_buffer * st_bp)
3773/* Release the extra buffer */ 3775/* Release the extra buffer */
3774static void normalize_buffer(struct st_buffer * STbuffer) 3776static void normalize_buffer(struct st_buffer * STbuffer)
3775{ 3777{
3776 int i, order = STbuffer->map_data.page_order; 3778 int i, order = STbuffer->reserved_page_order;
3777 3779
3778 for (i = 0; i < STbuffer->frp_segs; i++) { 3780 for (i = 0; i < STbuffer->frp_segs; i++) {
3779 __free_pages(STbuffer->reserved_pages[i], order); 3781 __free_pages(STbuffer->reserved_pages[i], order);
@@ -3781,7 +3783,7 @@ static void normalize_buffer(struct st_buffer * STbuffer)
3781 } 3783 }
3782 STbuffer->frp_segs = 0; 3784 STbuffer->frp_segs = 0;
3783 STbuffer->sg_segs = 0; 3785 STbuffer->sg_segs = 0;
3784 STbuffer->map_data.page_order = 0; 3786 STbuffer->reserved_page_order = 0;
3785 STbuffer->map_data.offset = 0; 3787 STbuffer->map_data.offset = 0;
3786} 3788}
3787 3789
@@ -3791,7 +3793,7 @@ static void normalize_buffer(struct st_buffer * STbuffer)
3791static int append_to_buffer(const char __user *ubp, struct st_buffer * st_bp, int do_count) 3793static int append_to_buffer(const char __user *ubp, struct st_buffer * st_bp, int do_count)
3792{ 3794{
3793 int i, cnt, res, offset; 3795 int i, cnt, res, offset;
3794 int length = PAGE_SIZE << st_bp->map_data.page_order; 3796 int length = PAGE_SIZE << st_bp->reserved_page_order;
3795 3797
3796 for (i = 0, offset = st_bp->buffer_bytes; 3798 for (i = 0, offset = st_bp->buffer_bytes;
3797 i < st_bp->frp_segs && offset >= length; i++) 3799 i < st_bp->frp_segs && offset >= length; i++)
@@ -3823,7 +3825,7 @@ static int append_to_buffer(const char __user *ubp, struct st_buffer * st_bp, in
3823static int from_buffer(struct st_buffer * st_bp, char __user *ubp, int do_count) 3825static int from_buffer(struct st_buffer * st_bp, char __user *ubp, int do_count)
3824{ 3826{
3825 int i, cnt, res, offset; 3827 int i, cnt, res, offset;
3826 int length = PAGE_SIZE << st_bp->map_data.page_order; 3828 int length = PAGE_SIZE << st_bp->reserved_page_order;
3827 3829
3828 for (i = 0, offset = st_bp->read_pointer; 3830 for (i = 0, offset = st_bp->read_pointer;
3829 i < st_bp->frp_segs && offset >= length; i++) 3831 i < st_bp->frp_segs && offset >= length; i++)
@@ -3856,7 +3858,7 @@ static void move_buffer_data(struct st_buffer * st_bp, int offset)
3856{ 3858{
3857 int src_seg, dst_seg, src_offset = 0, dst_offset; 3859 int src_seg, dst_seg, src_offset = 0, dst_offset;
3858 int count, total; 3860 int count, total;
3859 int length = PAGE_SIZE << st_bp->map_data.page_order; 3861 int length = PAGE_SIZE << st_bp->reserved_page_order;
3860 3862
3861 if (offset == 0) 3863 if (offset == 0)
3862 return; 3864 return;
@@ -4578,7 +4580,6 @@ static int sgl_map_user_pages(struct st_buffer *STbp,
4578 } 4580 }
4579 4581
4580 mdata->offset = uaddr & ~PAGE_MASK; 4582 mdata->offset = uaddr & ~PAGE_MASK;
4581 mdata->page_order = 0;
4582 STbp->mapped_pages = pages; 4583 STbp->mapped_pages = pages;
4583 4584
4584 return nr_pages; 4585 return nr_pages;
diff --git a/drivers/scsi/st.h b/drivers/scsi/st.h
index 544dc6b1f548..f91a67c6d968 100644
--- a/drivers/scsi/st.h
+++ b/drivers/scsi/st.h
@@ -46,6 +46,7 @@ struct st_buffer {
46 struct st_request *last_SRpnt; 46 struct st_request *last_SRpnt;
47 struct st_cmdstatus cmdstat; 47 struct st_cmdstatus cmdstat;
48 struct page **reserved_pages; 48 struct page **reserved_pages;
49 int reserved_page_order;
49 struct page **mapped_pages; 50 struct page **mapped_pages;
50 struct rq_map_data map_data; 51 struct rq_map_data map_data;
51 unsigned char *b_data; 52 unsigned char *b_data;
diff --git a/drivers/scsi/stex.c b/drivers/scsi/stex.c
index 3058bb1aff95..fd7b15be7640 100644
--- a/drivers/scsi/stex.c
+++ b/drivers/scsi/stex.c
@@ -623,6 +623,11 @@ stex_queuecommand(struct scsi_cmnd *cmd, void (* done)(struct scsi_cmnd *))
623 } 623 }
624 break; 624 break;
625 case INQUIRY: 625 case INQUIRY:
626 if (lun >= host->max_lun) {
627 cmd->result = DID_NO_CONNECT << 16;
628 done(cmd);
629 return 0;
630 }
626 if (id != host->max_id - 1) 631 if (id != host->max_id - 1)
627 break; 632 break;
628 if (!lun && !cmd->device->channel && 633 if (!lun && !cmd->device->channel &&
diff --git a/drivers/serial/21285.c b/drivers/serial/21285.c
index 1e3d19397a59..8681f1345056 100644
--- a/drivers/serial/21285.c
+++ b/drivers/serial/21285.c
@@ -58,7 +58,7 @@ static const char serial21285_name[] = "Footbridge UART";
58static void serial21285_stop_tx(struct uart_port *port) 58static void serial21285_stop_tx(struct uart_port *port)
59{ 59{
60 if (tx_enabled(port)) { 60 if (tx_enabled(port)) {
61 disable_irq(IRQ_CONTX); 61 disable_irq_nosync(IRQ_CONTX);
62 tx_enabled(port) = 0; 62 tx_enabled(port) = 0;
63 } 63 }
64} 64}
@@ -74,7 +74,7 @@ static void serial21285_start_tx(struct uart_port *port)
74static void serial21285_stop_rx(struct uart_port *port) 74static void serial21285_stop_rx(struct uart_port *port)
75{ 75{
76 if (rx_enabled(port)) { 76 if (rx_enabled(port)) {
77 disable_irq(IRQ_CONRX); 77 disable_irq_nosync(IRQ_CONRX);
78 rx_enabled(port) = 0; 78 rx_enabled(port) = 0;
79 } 79 }
80} 80}
diff --git a/drivers/serial/8250.c b/drivers/serial/8250.c
index c3e37c8e7e26..e9b15c3746fa 100644
--- a/drivers/serial/8250.c
+++ b/drivers/serial/8250.c
@@ -83,6 +83,9 @@ static unsigned int skip_txen_test; /* force skip of txen test at init time */
83 83
84#define PASS_LIMIT 256 84#define PASS_LIMIT 256
85 85
86#define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
87
88
86/* 89/*
87 * We default to IRQ0 for the "no irq" hack. Some 90 * We default to IRQ0 for the "no irq" hack. Some
88 * machine types want others as well - they're free 91 * machine types want others as well - they're free
@@ -1792,7 +1795,7 @@ static unsigned int serial8250_tx_empty(struct uart_port *port)
1792 up->lsr_saved_flags |= lsr & LSR_SAVE_FLAGS; 1795 up->lsr_saved_flags |= lsr & LSR_SAVE_FLAGS;
1793 spin_unlock_irqrestore(&up->port.lock, flags); 1796 spin_unlock_irqrestore(&up->port.lock, flags);
1794 1797
1795 return lsr & UART_LSR_TEMT ? TIOCSER_TEMT : 0; 1798 return (lsr & BOTH_EMPTY) == BOTH_EMPTY ? TIOCSER_TEMT : 0;
1796} 1799}
1797 1800
1798static unsigned int serial8250_get_mctrl(struct uart_port *port) 1801static unsigned int serial8250_get_mctrl(struct uart_port *port)
@@ -1850,8 +1853,6 @@ static void serial8250_break_ctl(struct uart_port *port, int break_state)
1850 spin_unlock_irqrestore(&up->port.lock, flags); 1853 spin_unlock_irqrestore(&up->port.lock, flags);
1851} 1854}
1852 1855
1853#define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
1854
1855/* 1856/*
1856 * Wait for transmitter & holding register to empty 1857 * Wait for transmitter & holding register to empty
1857 */ 1858 */
diff --git a/drivers/serial/8250_pnp.c b/drivers/serial/8250_pnp.c
index 36ede02ceacf..24485cc62ff8 100644
--- a/drivers/serial/8250_pnp.c
+++ b/drivers/serial/8250_pnp.c
@@ -328,15 +328,7 @@ static const struct pnp_device_id pnp_dev_table[] = {
328 /* U.S. Robotics 56K Voice INT PnP*/ 328 /* U.S. Robotics 56K Voice INT PnP*/
329 { "USR9190", 0 }, 329 { "USR9190", 0 },
330 /* Wacom tablets */ 330 /* Wacom tablets */
331 { "WACF004", 0 }, 331 { "WACFXXX", 0 },
332 { "WACF005", 0 },
333 { "WACF006", 0 },
334 { "WACF007", 0 },
335 { "WACF008", 0 },
336 { "WACF009", 0 },
337 { "WACF00A", 0 },
338 { "WACF00B", 0 },
339 { "WACF00C", 0 },
340 /* Compaq touchscreen */ 332 /* Compaq touchscreen */
341 { "FPI2002", 0 }, 333 { "FPI2002", 0 },
342 /* Fujitsu Stylistic touchscreens */ 334 /* Fujitsu Stylistic touchscreens */
@@ -354,6 +346,8 @@ static const struct pnp_device_id pnp_dev_table[] = {
354 { "FUJ02E5", 0 }, 346 { "FUJ02E5", 0 },
355 /* Fujitsu P-series tablet PC device */ 347 /* Fujitsu P-series tablet PC device */
356 { "FUJ02E6", 0 }, 348 { "FUJ02E6", 0 },
349 /* Fujitsu Wacom 2FGT Tablet PC device */
350 { "FUJ02E7", 0 },
357 /* 351 /*
358 * LG C1 EXPRESS DUAL (C1-PB11A3) touch screen (actually a FUJ02E6 in 352 * LG C1 EXPRESS DUAL (C1-PB11A3) touch screen (actually a FUJ02E6 in
359 * disguise) 353 * disguise)
diff --git a/drivers/serial/imx.c b/drivers/serial/imx.c
index 18130f11238e..60d665a17a88 100644
--- a/drivers/serial/imx.c
+++ b/drivers/serial/imx.c
@@ -1088,7 +1088,7 @@ imx_console_get_options(struct imx_port *sport, int *baud,
1088 int *parity, int *bits) 1088 int *parity, int *bits)
1089{ 1089{
1090 1090
1091 if ( readl(sport->port.membase + UCR1) | UCR1_UARTEN ) { 1091 if (readl(sport->port.membase + UCR1) & UCR1_UARTEN) {
1092 /* ok, the port was enabled */ 1092 /* ok, the port was enabled */
1093 unsigned int ucr2, ubir,ubmr, uartclk; 1093 unsigned int ucr2, ubir,ubmr, uartclk;
1094 unsigned int baud_raw; 1094 unsigned int baud_raw;
diff --git a/drivers/serial/pmac_zilog.c b/drivers/serial/pmac_zilog.c
index 0700cd10b97c..683e66f18e8c 100644
--- a/drivers/serial/pmac_zilog.c
+++ b/drivers/serial/pmac_zilog.c
@@ -411,6 +411,17 @@ static void pmz_transmit_chars(struct uart_pmac_port *uap)
411 goto ack_tx_int; 411 goto ack_tx_int;
412 } 412 }
413 413
414 /* Under some circumstances, we see interrupts reported for
415 * a closed channel. The interrupt mask in R1 is clear, but
416 * R3 still signals the interrupts and we see them when taking
417 * an interrupt for the other channel (this could be a qemu
418 * bug but since the ESCC doc doesn't specify precsiely whether
419 * R3 interrup status bits are masked by R1 interrupt enable
420 * bits, better safe than sorry). --BenH.
421 */
422 if (!ZS_IS_OPEN(uap))
423 goto ack_tx_int;
424
414 if (uap->port.x_char) { 425 if (uap->port.x_char) {
415 uap->flags |= PMACZILOG_FLAG_TX_ACTIVE; 426 uap->flags |= PMACZILOG_FLAG_TX_ACTIVE;
416 write_zsdata(uap, uap->port.x_char); 427 write_zsdata(uap, uap->port.x_char);
diff --git a/drivers/serial/serial_core.c b/drivers/serial/serial_core.c
index 047530b285bb..7f2830709512 100644
--- a/drivers/serial/serial_core.c
+++ b/drivers/serial/serial_core.c
@@ -385,13 +385,20 @@ uart_get_baud_rate(struct uart_port *port, struct ktermios *termios,
385 } 385 }
386 386
387 /* 387 /*
388 * As a last resort, if the quotient is zero, 388 * As a last resort, if the range cannot be met then clip to
389 * default to 9600 bps 389 * the nearest chip supported rate.
390 */ 390 */
391 if (!hung_up) 391 if (!hung_up) {
392 tty_termios_encode_baud_rate(termios, 9600, 9600); 392 if (baud <= min)
393 tty_termios_encode_baud_rate(termios,
394 min + 1, min + 1);
395 else
396 tty_termios_encode_baud_rate(termios,
397 max - 1, max - 1);
398 }
393 } 399 }
394 400 /* Should never happen */
401 WARN_ON(1);
395 return 0; 402 return 0;
396} 403}
397 404
@@ -2006,12 +2013,6 @@ int uart_suspend_port(struct uart_driver *drv, struct uart_port *uport)
2006 2013
2007 mutex_lock(&port->mutex); 2014 mutex_lock(&port->mutex);
2008 2015
2009 if (!console_suspend_enabled && uart_console(uport)) {
2010 /* we're going to avoid suspending serial console */
2011 mutex_unlock(&port->mutex);
2012 return 0;
2013 }
2014
2015 tty_dev = device_find_child(uport->dev, &match, serial_match_port); 2016 tty_dev = device_find_child(uport->dev, &match, serial_match_port);
2016 if (device_may_wakeup(tty_dev)) { 2017 if (device_may_wakeup(tty_dev)) {
2017 enable_irq_wake(uport->irq); 2018 enable_irq_wake(uport->irq);
@@ -2019,20 +2020,23 @@ int uart_suspend_port(struct uart_driver *drv, struct uart_port *uport)
2019 mutex_unlock(&port->mutex); 2020 mutex_unlock(&port->mutex);
2020 return 0; 2021 return 0;
2021 } 2022 }
2022 uport->suspended = 1; 2023 if (console_suspend_enabled || !uart_console(uport))
2024 uport->suspended = 1;
2023 2025
2024 if (port->flags & ASYNC_INITIALIZED) { 2026 if (port->flags & ASYNC_INITIALIZED) {
2025 const struct uart_ops *ops = uport->ops; 2027 const struct uart_ops *ops = uport->ops;
2026 int tries; 2028 int tries;
2027 2029
2028 set_bit(ASYNCB_SUSPENDED, &port->flags); 2030 if (console_suspend_enabled || !uart_console(uport)) {
2029 clear_bit(ASYNCB_INITIALIZED, &port->flags); 2031 set_bit(ASYNCB_SUSPENDED, &port->flags);
2032 clear_bit(ASYNCB_INITIALIZED, &port->flags);
2030 2033
2031 spin_lock_irq(&uport->lock); 2034 spin_lock_irq(&uport->lock);
2032 ops->stop_tx(uport); 2035 ops->stop_tx(uport);
2033 ops->set_mctrl(uport, 0); 2036 ops->set_mctrl(uport, 0);
2034 ops->stop_rx(uport); 2037 ops->stop_rx(uport);
2035 spin_unlock_irq(&uport->lock); 2038 spin_unlock_irq(&uport->lock);
2039 }
2036 2040
2037 /* 2041 /*
2038 * Wait for the transmitter to empty. 2042 * Wait for the transmitter to empty.
@@ -2047,16 +2051,18 @@ int uart_suspend_port(struct uart_driver *drv, struct uart_port *uport)
2047 drv->dev_name, 2051 drv->dev_name,
2048 drv->tty_driver->name_base + uport->line); 2052 drv->tty_driver->name_base + uport->line);
2049 2053
2050 ops->shutdown(uport); 2054 if (console_suspend_enabled || !uart_console(uport))
2055 ops->shutdown(uport);
2051 } 2056 }
2052 2057
2053 /* 2058 /*
2054 * Disable the console device before suspending. 2059 * Disable the console device before suspending.
2055 */ 2060 */
2056 if (uart_console(uport)) 2061 if (console_suspend_enabled && uart_console(uport))
2057 console_stop(uport->cons); 2062 console_stop(uport->cons);
2058 2063
2059 uart_change_pm(state, 3); 2064 if (console_suspend_enabled || !uart_console(uport))
2065 uart_change_pm(state, 3);
2060 2066
2061 mutex_unlock(&port->mutex); 2067 mutex_unlock(&port->mutex);
2062 2068
@@ -2073,29 +2079,6 @@ int uart_resume_port(struct uart_driver *drv, struct uart_port *uport)
2073 2079
2074 mutex_lock(&port->mutex); 2080 mutex_lock(&port->mutex);
2075 2081
2076 if (!console_suspend_enabled && uart_console(uport)) {
2077 /* no need to resume serial console, it wasn't suspended */
2078 /*
2079 * First try to use the console cflag setting.
2080 */
2081 memset(&termios, 0, sizeof(struct ktermios));
2082 termios.c_cflag = uport->cons->cflag;
2083 /*
2084 * If that's unset, use the tty termios setting.
2085 */
2086 if (termios.c_cflag == 0)
2087 termios = *state->port.tty->termios;
2088 else {
2089 termios.c_ispeed = termios.c_ospeed =
2090 tty_termios_input_baud_rate(&termios);
2091 termios.c_ispeed = termios.c_ospeed =
2092 tty_termios_baud_rate(&termios);
2093 }
2094 uport->ops->set_termios(uport, &termios, NULL);
2095 mutex_unlock(&port->mutex);
2096 return 0;
2097 }
2098
2099 tty_dev = device_find_child(uport->dev, &match, serial_match_port); 2082 tty_dev = device_find_child(uport->dev, &match, serial_match_port);
2100 if (!uport->suspended && device_may_wakeup(tty_dev)) { 2083 if (!uport->suspended && device_may_wakeup(tty_dev)) {
2101 disable_irq_wake(uport->irq); 2084 disable_irq_wake(uport->irq);
@@ -2121,21 +2104,23 @@ int uart_resume_port(struct uart_driver *drv, struct uart_port *uport)
2121 spin_lock_irq(&uport->lock); 2104 spin_lock_irq(&uport->lock);
2122 ops->set_mctrl(uport, 0); 2105 ops->set_mctrl(uport, 0);
2123 spin_unlock_irq(&uport->lock); 2106 spin_unlock_irq(&uport->lock);
2124 ret = ops->startup(uport); 2107 if (console_suspend_enabled || !uart_console(uport)) {
2125 if (ret == 0) { 2108 ret = ops->startup(uport);
2126 uart_change_speed(state, NULL); 2109 if (ret == 0) {
2127 spin_lock_irq(&uport->lock); 2110 uart_change_speed(state, NULL);
2128 ops->set_mctrl(uport, uport->mctrl); 2111 spin_lock_irq(&uport->lock);
2129 ops->start_tx(uport); 2112 ops->set_mctrl(uport, uport->mctrl);
2130 spin_unlock_irq(&uport->lock); 2113 ops->start_tx(uport);
2131 set_bit(ASYNCB_INITIALIZED, &port->flags); 2114 spin_unlock_irq(&uport->lock);
2132 } else { 2115 set_bit(ASYNCB_INITIALIZED, &port->flags);
2133 /* 2116 } else {
2134 * Failed to resume - maybe hardware went away? 2117 /*
2135 * Clear the "initialized" flag so we won't try 2118 * Failed to resume - maybe hardware went away?
2136 * to call the low level drivers shutdown method. 2119 * Clear the "initialized" flag so we won't try
2137 */ 2120 * to call the low level drivers shutdown method.
2138 uart_shutdown(state); 2121 */
2122 uart_shutdown(state);
2123 }
2139 } 2124 }
2140 2125
2141 clear_bit(ASYNCB_SUSPENDED, &port->flags); 2126 clear_bit(ASYNCB_SUSPENDED, &port->flags);
diff --git a/drivers/serial/serial_cs.c b/drivers/serial/serial_cs.c
index fc413f0f8dd2..95421fa3b304 100644
--- a/drivers/serial/serial_cs.c
+++ b/drivers/serial/serial_cs.c
@@ -146,7 +146,8 @@ static void quirk_wakeup_oxsemi(struct pcmcia_device *link)
146{ 146{
147 struct serial_info *info = link->priv; 147 struct serial_info *info = link->priv;
148 148
149 outb(12, info->c950ctrl + 1); 149 if (info->c950ctrl)
150 outb(12, info->c950ctrl + 1);
150} 151}
151 152
152/* request_region? oxsemi branch does no request_region too... */ 153/* request_region? oxsemi branch does no request_region too... */
@@ -757,6 +758,7 @@ static struct pcmcia_device_id serial_ids[] = {
757 PCMCIA_PFC_DEVICE_PROD_ID12(1, "PCMCIAs", "LanModem", 0xdcfe12d3, 0xc67c648f), 758 PCMCIA_PFC_DEVICE_PROD_ID12(1, "PCMCIAs", "LanModem", 0xdcfe12d3, 0xc67c648f),
758 PCMCIA_PFC_DEVICE_PROD_ID12(1, "TDK", "GlobalNetworker 3410/3412", 0x1eae9475, 0xd9a93bed), 759 PCMCIA_PFC_DEVICE_PROD_ID12(1, "TDK", "GlobalNetworker 3410/3412", 0x1eae9475, 0xd9a93bed),
759 PCMCIA_PFC_DEVICE_PROD_ID12(1, "Xircom", "CreditCard Ethernet+Modem II", 0x2e3ee845, 0xeca401bf), 760 PCMCIA_PFC_DEVICE_PROD_ID12(1, "Xircom", "CreditCard Ethernet+Modem II", 0x2e3ee845, 0xeca401bf),
761 PCMCIA_PFC_DEVICE_MANF_CARD(1, 0x0032, 0x0e01),
760 PCMCIA_PFC_DEVICE_MANF_CARD(1, 0x0032, 0x0a05), 762 PCMCIA_PFC_DEVICE_MANF_CARD(1, 0x0032, 0x0a05),
761 PCMCIA_PFC_DEVICE_MANF_CARD(1, 0x0032, 0x1101), 763 PCMCIA_PFC_DEVICE_MANF_CARD(1, 0x0032, 0x1101),
762 PCMCIA_MFC_DEVICE_MANF_CARD(0, 0x0104, 0x0070), 764 PCMCIA_MFC_DEVICE_MANF_CARD(0, 0x0104, 0x0070),
@@ -819,6 +821,7 @@ static struct pcmcia_device_id serial_ids[] = {
819 PCMCIA_MFC_DEVICE_CIS_MANF_CARD(1, 0x0101, 0x0035, "cis/3CXEM556.cis"), 821 PCMCIA_MFC_DEVICE_CIS_MANF_CARD(1, 0x0101, 0x0035, "cis/3CXEM556.cis"),
820 PCMCIA_MFC_DEVICE_CIS_MANF_CARD(1, 0x0101, 0x003d, "cis/3CXEM556.cis"), 822 PCMCIA_MFC_DEVICE_CIS_MANF_CARD(1, 0x0101, 0x003d, "cis/3CXEM556.cis"),
821 PCMCIA_DEVICE_CIS_PROD_ID12("Sierra Wireless", "AC850", 0xd85f6206, 0x42a2c018, "cis/SW_8xx_SER.cis"), /* Sierra Wireless AC850 3G Network Adapter R1 */ 823 PCMCIA_DEVICE_CIS_PROD_ID12("Sierra Wireless", "AC850", 0xd85f6206, 0x42a2c018, "cis/SW_8xx_SER.cis"), /* Sierra Wireless AC850 3G Network Adapter R1 */
824 PCMCIA_DEVICE_CIS_PROD_ID12("Sierra Wireless", "AC860", 0xd85f6206, 0x698f93db, "cis/SW_8xx_SER.cis"), /* Sierra Wireless AC860 3G Network Adapter R1 */
822 PCMCIA_DEVICE_CIS_PROD_ID12("Sierra Wireless", "AC710/AC750", 0xd85f6206, 0x761b11e0, "cis/SW_7xx_SER.cis"), /* Sierra Wireless AC710/AC750 GPRS Network Adapter R1 */ 825 PCMCIA_DEVICE_CIS_PROD_ID12("Sierra Wireless", "AC710/AC750", 0xd85f6206, 0x761b11e0, "cis/SW_7xx_SER.cis"), /* Sierra Wireless AC710/AC750 GPRS Network Adapter R1 */
823 PCMCIA_DEVICE_CIS_MANF_CARD(0x0192, 0xa555, "cis/SW_555_SER.cis"), /* Sierra Aircard 555 CDMA 1xrtt Modem -- pre update */ 826 PCMCIA_DEVICE_CIS_MANF_CARD(0x0192, 0xa555, "cis/SW_555_SER.cis"), /* Sierra Aircard 555 CDMA 1xrtt Modem -- pre update */
824 PCMCIA_DEVICE_CIS_MANF_CARD(0x013f, 0xa555, "cis/SW_555_SER.cis"), /* Sierra Aircard 555 CDMA 1xrtt Modem -- post update */ 827 PCMCIA_DEVICE_CIS_MANF_CARD(0x013f, 0xa555, "cis/SW_555_SER.cis"), /* Sierra Aircard 555 CDMA 1xrtt Modem -- post update */
@@ -827,7 +830,7 @@ static struct pcmcia_device_id serial_ids[] = {
827 PCMCIA_DEVICE_CIS_PROD_ID12("ADVANTECH", "COMpad-32/85B-4", 0x96913a85, 0xcec8f102, "cis/COMpad4.cis"), 830 PCMCIA_DEVICE_CIS_PROD_ID12("ADVANTECH", "COMpad-32/85B-4", 0x96913a85, 0xcec8f102, "cis/COMpad4.cis"),
828 PCMCIA_DEVICE_CIS_PROD_ID123("ADVANTECH", "COMpad-32/85", "1.0", 0x96913a85, 0x8fbe92ae, 0x0877b627, "cis/COMpad2.cis"), 831 PCMCIA_DEVICE_CIS_PROD_ID123("ADVANTECH", "COMpad-32/85", "1.0", 0x96913a85, 0x8fbe92ae, 0x0877b627, "cis/COMpad2.cis"),
829 PCMCIA_DEVICE_CIS_PROD_ID2("RS-COM 2P", 0xad20b156, "cis/RS-COM-2P.cis"), 832 PCMCIA_DEVICE_CIS_PROD_ID2("RS-COM 2P", 0xad20b156, "cis/RS-COM-2P.cis"),
830 PCMCIA_DEVICE_CIS_MANF_CARD(0x0013, 0x0000, "GLOBETROTTER.cis"), 833 PCMCIA_DEVICE_CIS_MANF_CARD(0x0013, 0x0000, "cis/GLOBETROTTER.cis"),
831 PCMCIA_DEVICE_PROD_ID12("ELAN DIGITAL SYSTEMS LTD, c1997.","SERIAL CARD: SL100 1.00.",0x19ca78af,0xf964f42b), 834 PCMCIA_DEVICE_PROD_ID12("ELAN DIGITAL SYSTEMS LTD, c1997.","SERIAL CARD: SL100 1.00.",0x19ca78af,0xf964f42b),
832 PCMCIA_DEVICE_PROD_ID12("ELAN DIGITAL SYSTEMS LTD, c1997.","SERIAL CARD: SL100",0x19ca78af,0x71d98e83), 835 PCMCIA_DEVICE_PROD_ID12("ELAN DIGITAL SYSTEMS LTD, c1997.","SERIAL CARD: SL100",0x19ca78af,0x71d98e83),
833 PCMCIA_DEVICE_PROD_ID12("ELAN DIGITAL SYSTEMS LTD, c1997.","SERIAL CARD: SL232 1.00.",0x19ca78af,0x69fb7490), 836 PCMCIA_DEVICE_PROD_ID12("ELAN DIGITAL SYSTEMS LTD, c1997.","SERIAL CARD: SL232 1.00.",0x19ca78af,0x69fb7490),
@@ -861,6 +864,18 @@ static struct pcmcia_device_id serial_ids[] = {
861}; 864};
862MODULE_DEVICE_TABLE(pcmcia, serial_ids); 865MODULE_DEVICE_TABLE(pcmcia, serial_ids);
863 866
867MODULE_FIRMWARE("cis/PCMLM28.cis");
868MODULE_FIRMWARE("cis/DP83903.cis");
869MODULE_FIRMWARE("cis/3CCFEM556.cis");
870MODULE_FIRMWARE("cis/3CXEM556.cis");
871MODULE_FIRMWARE("cis/SW_8xx_SER.cis");
872MODULE_FIRMWARE("cis/SW_7xx_SER.cis");
873MODULE_FIRMWARE("cis/SW_555_SER.cis");
874MODULE_FIRMWARE("cis/MT5634ZLX.cis");
875MODULE_FIRMWARE("cis/COMpad2.cis");
876MODULE_FIRMWARE("cis/COMpad4.cis");
877MODULE_FIRMWARE("cis/RS-COM-2P.cis");
878
864static struct pcmcia_driver serial_cs_driver = { 879static struct pcmcia_driver serial_cs_driver = {
865 .owner = THIS_MODULE, 880 .owner = THIS_MODULE,
866 .drv = { 881 .drv = {
diff --git a/drivers/serial/sh-sci.c b/drivers/serial/sh-sci.c
index 7e3f4ff58cfd..42f3333c4ad0 100644
--- a/drivers/serial/sh-sci.c
+++ b/drivers/serial/sh-sci.c
@@ -222,9 +222,9 @@ static inline void sci_init_pins(struct uart_port *port, unsigned int cflag)
222 Set SCP6MD1,0 = {01} (output) */ 222 Set SCP6MD1,0 = {01} (output) */
223 __raw_writew((data & 0x0fcf) | 0x1000, SCPCR); 223 __raw_writew((data & 0x0fcf) | 0x1000, SCPCR);
224 224
225 data = ctrl_inb(SCPDR); 225 data = __raw_readb(SCPDR);
226 /* Set /RTS2 (bit6) = 0 */ 226 /* Set /RTS2 (bit6) = 0 */
227 ctrl_outb(data & 0xbf, SCPDR); 227 __raw_writeb(data & 0xbf, SCPDR);
228 } 228 }
229} 229}
230#elif defined(CONFIG_CPU_SUBTYPE_SH7722) 230#elif defined(CONFIG_CPU_SUBTYPE_SH7722)
@@ -897,11 +897,21 @@ static void sci_shutdown(struct uart_port *port)
897static void sci_set_termios(struct uart_port *port, struct ktermios *termios, 897static void sci_set_termios(struct uart_port *port, struct ktermios *termios,
898 struct ktermios *old) 898 struct ktermios *old)
899{ 899{
900 unsigned int status, baud, smr_val; 900 unsigned int status, baud, smr_val, max_baud;
901 int t = -1; 901 int t = -1;
902 902
903 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16); 903 /*
904 if (likely(baud)) 904 * earlyprintk comes here early on with port->uartclk set to zero.
905 * the clock framework is not up and running at this point so here
906 * we assume that 115200 is the maximum baud rate. please note that
907 * the baud rate is not programmed during earlyprintk - it is assumed
908 * that the previous boot loader has enabled required clocks and
909 * setup the baud rate generator hardware for us already.
910 */
911 max_baud = port->uartclk ? port->uartclk / 16 : 115200;
912
913 baud = uart_get_baud_rate(port, termios, old, 0, max_baud);
914 if (likely(baud && port->uartclk))
905 t = SCBRR_VALUE(baud, port->uartclk); 915 t = SCBRR_VALUE(baud, port->uartclk);
906 916
907 do { 917 do {
@@ -1042,11 +1052,26 @@ static void __devinit sci_init_single(struct platform_device *dev,
1042 sci_port->port.ops = &sci_uart_ops; 1052 sci_port->port.ops = &sci_uart_ops;
1043 sci_port->port.iotype = UPIO_MEM; 1053 sci_port->port.iotype = UPIO_MEM;
1044 sci_port->port.line = index; 1054 sci_port->port.line = index;
1045 sci_port->port.fifosize = 1; 1055
1046 sci_port->iclk = p->clk ? clk_get(&dev->dev, p->clk) : NULL; 1056 switch (p->type) {
1047 sci_port->dclk = clk_get(&dev->dev, "peripheral_clk"); 1057 case PORT_SCIFA:
1048 sci_port->enable = sci_clk_enable; 1058 sci_port->port.fifosize = 64;
1049 sci_port->disable = sci_clk_disable; 1059 break;
1060 case PORT_SCIF:
1061 sci_port->port.fifosize = 16;
1062 break;
1063 default:
1064 sci_port->port.fifosize = 1;
1065 break;
1066 }
1067
1068 if (dev) {
1069 sci_port->iclk = p->clk ? clk_get(&dev->dev, p->clk) : NULL;
1070 sci_port->dclk = clk_get(&dev->dev, "peripheral_clk");
1071 sci_port->enable = sci_clk_enable;
1072 sci_port->disable = sci_clk_disable;
1073 sci_port->port.dev = &dev->dev;
1074 }
1050 1075
1051 sci_port->break_timer.data = (unsigned long)sci_port; 1076 sci_port->break_timer.data = (unsigned long)sci_port;
1052 sci_port->break_timer.function = sci_break_timer; 1077 sci_port->break_timer.function = sci_break_timer;
@@ -1057,7 +1082,6 @@ static void __devinit sci_init_single(struct platform_device *dev,
1057 1082
1058 sci_port->port.irq = p->irqs[SCIx_TXI_IRQ]; 1083 sci_port->port.irq = p->irqs[SCIx_TXI_IRQ];
1059 sci_port->port.flags = p->flags; 1084 sci_port->port.flags = p->flags;
1060 sci_port->port.dev = &dev->dev;
1061 sci_port->type = sci_port->port.type = p->type; 1085 sci_port->type = sci_port->port.type = p->type;
1062 1086
1063 memcpy(&sci_port->irqs, &p->irqs, sizeof(p->irqs)); 1087 memcpy(&sci_port->irqs, &p->irqs, sizeof(p->irqs));
@@ -1101,7 +1125,7 @@ static void serial_console_write(struct console *co, const char *s,
1101 sci_port->disable(port); 1125 sci_port->disable(port);
1102} 1126}
1103 1127
1104static int __init serial_console_setup(struct console *co, char *options) 1128static int __devinit serial_console_setup(struct console *co, char *options)
1105{ 1129{
1106 struct sci_port *sci_port; 1130 struct sci_port *sci_port;
1107 struct uart_port *port; 1131 struct uart_port *port;
@@ -1119,9 +1143,14 @@ static int __init serial_console_setup(struct console *co, char *options)
1119 if (co->index >= SCI_NPORTS) 1143 if (co->index >= SCI_NPORTS)
1120 co->index = 0; 1144 co->index = 0;
1121 1145
1122 sci_port = &sci_ports[co->index]; 1146 if (co->data) {
1123 port = &sci_port->port; 1147 port = co->data;
1124 co->data = port; 1148 sci_port = to_sci_port(port);
1149 } else {
1150 sci_port = &sci_ports[co->index];
1151 port = &sci_port->port;
1152 co->data = port;
1153 }
1125 1154
1126 /* 1155 /*
1127 * Also need to check port->type, we don't actually have any 1156 * Also need to check port->type, we don't actually have any
@@ -1165,6 +1194,15 @@ static int __init sci_console_init(void)
1165 return 0; 1194 return 0;
1166} 1195}
1167console_initcall(sci_console_init); 1196console_initcall(sci_console_init);
1197
1198static struct sci_port early_serial_port;
1199static struct console early_serial_console = {
1200 .name = "early_ttySC",
1201 .write = serial_console_write,
1202 .flags = CON_PRINTBUFFER,
1203};
1204static char early_serial_buf[32];
1205
1168#endif /* CONFIG_SERIAL_SH_SCI_CONSOLE */ 1206#endif /* CONFIG_SERIAL_SH_SCI_CONSOLE */
1169 1207
1170#if defined(CONFIG_SERIAL_SH_SCI_CONSOLE) 1208#if defined(CONFIG_SERIAL_SH_SCI_CONSOLE)
@@ -1250,6 +1288,21 @@ static int __devinit sci_probe(struct platform_device *dev)
1250 struct sh_sci_priv *priv; 1288 struct sh_sci_priv *priv;
1251 int i, ret = -EINVAL; 1289 int i, ret = -EINVAL;
1252 1290
1291#ifdef CONFIG_SERIAL_SH_SCI_CONSOLE
1292 if (is_early_platform_device(dev)) {
1293 if (dev->id == -1)
1294 return -ENOTSUPP;
1295 early_serial_console.index = dev->id;
1296 early_serial_console.data = &early_serial_port.port;
1297 sci_init_single(NULL, &early_serial_port, dev->id, p);
1298 serial_console_setup(&early_serial_console, early_serial_buf);
1299 if (!strstr(early_serial_buf, "keep"))
1300 early_serial_console.flags |= CON_BOOT;
1301 register_console(&early_serial_console);
1302 return 0;
1303 }
1304#endif
1305
1253 priv = kzalloc(sizeof(*priv), GFP_KERNEL); 1306 priv = kzalloc(sizeof(*priv), GFP_KERNEL);
1254 if (!priv) 1307 if (!priv)
1255 return -ENOMEM; 1308 return -ENOMEM;
@@ -1349,6 +1402,10 @@ static void __exit sci_exit(void)
1349 uart_unregister_driver(&sci_uart_driver); 1402 uart_unregister_driver(&sci_uart_driver);
1350} 1403}
1351 1404
1405#ifdef CONFIG_SERIAL_SH_SCI_CONSOLE
1406early_platform_init_buffer("earlyprintk", &sci_driver,
1407 early_serial_buf, ARRAY_SIZE(early_serial_buf));
1408#endif
1352module_init(sci_init); 1409module_init(sci_init);
1353module_exit(sci_exit); 1410module_exit(sci_exit);
1354 1411
diff --git a/drivers/serial/sh-sci.h b/drivers/serial/sh-sci.h
index a32094eeb42b..0efcded59ae6 100644
--- a/drivers/serial/sh-sci.h
+++ b/drivers/serial/sh-sci.h
@@ -517,20 +517,20 @@ static const struct __attribute__((packed)) {
517static inline int sci_rxd_in(struct uart_port *port) 517static inline int sci_rxd_in(struct uart_port *port)
518{ 518{
519 if (port->mapbase == 0xfffffe80) 519 if (port->mapbase == 0xfffffe80)
520 return ctrl_inb(SCPDR)&0x01 ? 1 : 0; /* SCI */ 520 return __raw_readb(SCPDR)&0x01 ? 1 : 0; /* SCI */
521 if (port->mapbase == 0xa4000150) 521 if (port->mapbase == 0xa4000150)
522 return ctrl_inb(SCPDR)&0x10 ? 1 : 0; /* SCIF */ 522 return __raw_readb(SCPDR)&0x10 ? 1 : 0; /* SCIF */
523 if (port->mapbase == 0xa4000140) 523 if (port->mapbase == 0xa4000140)
524 return ctrl_inb(SCPDR)&0x04 ? 1 : 0; /* IRDA */ 524 return __raw_readb(SCPDR)&0x04 ? 1 : 0; /* IRDA */
525 return 1; 525 return 1;
526} 526}
527#elif defined(CONFIG_CPU_SUBTYPE_SH7705) 527#elif defined(CONFIG_CPU_SUBTYPE_SH7705)
528static inline int sci_rxd_in(struct uart_port *port) 528static inline int sci_rxd_in(struct uart_port *port)
529{ 529{
530 if (port->mapbase == SCIF0) 530 if (port->mapbase == SCIF0)
531 return ctrl_inb(SCPDR)&0x04 ? 1 : 0; /* IRDA */ 531 return __raw_readb(SCPDR)&0x04 ? 1 : 0; /* IRDA */
532 if (port->mapbase == SCIF2) 532 if (port->mapbase == SCIF2)
533 return ctrl_inb(SCPDR)&0x10 ? 1 : 0; /* SCIF */ 533 return __raw_readb(SCPDR)&0x10 ? 1 : 0; /* SCIF */
534 return 1; 534 return 1;
535} 535}
536#elif defined(CONFIG_CPU_SUBTYPE_SH7710) || defined(CONFIG_CPU_SUBTYPE_SH7712) 536#elif defined(CONFIG_CPU_SUBTYPE_SH7710) || defined(CONFIG_CPU_SUBTYPE_SH7712)
@@ -557,68 +557,68 @@ static inline int sci_rxd_in(struct uart_port *port)
557static inline int sci_rxd_in(struct uart_port *port) 557static inline int sci_rxd_in(struct uart_port *port)
558{ 558{
559 if (port->mapbase == 0xffe00000) 559 if (port->mapbase == 0xffe00000)
560 return ctrl_inb(SCSPTR1)&0x01 ? 1 : 0; /* SCI */ 560 return __raw_readb(SCSPTR1)&0x01 ? 1 : 0; /* SCI */
561 if (port->mapbase == 0xffe80000) 561 if (port->mapbase == 0xffe80000)
562 return ctrl_inw(SCSPTR2)&0x0001 ? 1 : 0; /* SCIF */ 562 return __raw_readw(SCSPTR2)&0x0001 ? 1 : 0; /* SCIF */
563 return 1; 563 return 1;
564} 564}
565#elif defined(CONFIG_CPU_SUBTYPE_SH4_202) 565#elif defined(CONFIG_CPU_SUBTYPE_SH4_202)
566static inline int sci_rxd_in(struct uart_port *port) 566static inline int sci_rxd_in(struct uart_port *port)
567{ 567{
568 if (port->mapbase == 0xffe80000) 568 if (port->mapbase == 0xffe80000)
569 return ctrl_inw(SCSPTR2)&0x0001 ? 1 : 0; /* SCIF */ 569 return __raw_readw(SCSPTR2)&0x0001 ? 1 : 0; /* SCIF */
570 return 1; 570 return 1;
571} 571}
572#elif defined(CONFIG_CPU_SUBTYPE_SH7757) 572#elif defined(CONFIG_CPU_SUBTYPE_SH7757)
573static inline int sci_rxd_in(struct uart_port *port) 573static inline int sci_rxd_in(struct uart_port *port)
574{ 574{
575 if (port->mapbase == 0xfe4b0000) 575 if (port->mapbase == 0xfe4b0000)
576 return ctrl_inw(SCSPTR0) & 0x0001 ? 1 : 0; 576 return __raw_readw(SCSPTR0) & 0x0001 ? 1 : 0;
577 if (port->mapbase == 0xfe4c0000) 577 if (port->mapbase == 0xfe4c0000)
578 return ctrl_inw(SCSPTR1) & 0x0001 ? 1 : 0; 578 return __raw_readw(SCSPTR1) & 0x0001 ? 1 : 0;
579 if (port->mapbase == 0xfe4d0000) 579 if (port->mapbase == 0xfe4d0000)
580 return ctrl_inw(SCSPTR2) & 0x0001 ? 1 : 0; 580 return __raw_readw(SCSPTR2) & 0x0001 ? 1 : 0;
581} 581}
582#elif defined(CONFIG_CPU_SUBTYPE_SH7760) 582#elif defined(CONFIG_CPU_SUBTYPE_SH7760)
583static inline int sci_rxd_in(struct uart_port *port) 583static inline int sci_rxd_in(struct uart_port *port)
584{ 584{
585 if (port->mapbase == 0xfe600000) 585 if (port->mapbase == 0xfe600000)
586 return ctrl_inw(SCSPTR0) & 0x0001 ? 1 : 0; /* SCIF */ 586 return __raw_readw(SCSPTR0) & 0x0001 ? 1 : 0; /* SCIF */
587 if (port->mapbase == 0xfe610000) 587 if (port->mapbase == 0xfe610000)
588 return ctrl_inw(SCSPTR1) & 0x0001 ? 1 : 0; /* SCIF */ 588 return __raw_readw(SCSPTR1) & 0x0001 ? 1 : 0; /* SCIF */
589 if (port->mapbase == 0xfe620000) 589 if (port->mapbase == 0xfe620000)
590 return ctrl_inw(SCSPTR2) & 0x0001 ? 1 : 0; /* SCIF */ 590 return __raw_readw(SCSPTR2) & 0x0001 ? 1 : 0; /* SCIF */
591 return 1; 591 return 1;
592} 592}
593#elif defined(CONFIG_CPU_SUBTYPE_SH7343) 593#elif defined(CONFIG_CPU_SUBTYPE_SH7343)
594static inline int sci_rxd_in(struct uart_port *port) 594static inline int sci_rxd_in(struct uart_port *port)
595{ 595{
596 if (port->mapbase == 0xffe00000) 596 if (port->mapbase == 0xffe00000)
597 return ctrl_inw(SCSPTR0) & 0x0001 ? 1 : 0; /* SCIF */ 597 return __raw_readw(SCSPTR0) & 0x0001 ? 1 : 0; /* SCIF */
598 if (port->mapbase == 0xffe10000) 598 if (port->mapbase == 0xffe10000)
599 return ctrl_inw(SCSPTR1) & 0x0001 ? 1 : 0; /* SCIF */ 599 return __raw_readw(SCSPTR1) & 0x0001 ? 1 : 0; /* SCIF */
600 if (port->mapbase == 0xffe20000) 600 if (port->mapbase == 0xffe20000)
601 return ctrl_inw(SCSPTR2) & 0x0001 ? 1 : 0; /* SCIF */ 601 return __raw_readw(SCSPTR2) & 0x0001 ? 1 : 0; /* SCIF */
602 if (port->mapbase == 0xffe30000) 602 if (port->mapbase == 0xffe30000)
603 return ctrl_inw(SCSPTR3) & 0x0001 ? 1 : 0; /* SCIF */ 603 return __raw_readw(SCSPTR3) & 0x0001 ? 1 : 0; /* SCIF */
604 return 1; 604 return 1;
605} 605}
606#elif defined(CONFIG_CPU_SUBTYPE_SH7366) 606#elif defined(CONFIG_CPU_SUBTYPE_SH7366)
607static inline int sci_rxd_in(struct uart_port *port) 607static inline int sci_rxd_in(struct uart_port *port)
608{ 608{
609 if (port->mapbase == 0xffe00000) 609 if (port->mapbase == 0xffe00000)
610 return ctrl_inb(SCPDR0) & 0x0001 ? 1 : 0; /* SCIF0 */ 610 return __raw_readb(SCPDR0) & 0x0001 ? 1 : 0; /* SCIF0 */
611 return 1; 611 return 1;
612} 612}
613#elif defined(CONFIG_CPU_SUBTYPE_SH7722) 613#elif defined(CONFIG_CPU_SUBTYPE_SH7722)
614static inline int sci_rxd_in(struct uart_port *port) 614static inline int sci_rxd_in(struct uart_port *port)
615{ 615{
616 if (port->mapbase == 0xffe00000) 616 if (port->mapbase == 0xffe00000)
617 return ctrl_inb(PSDR) & 0x02 ? 1 : 0; /* SCIF0 */ 617 return __raw_readb(PSDR) & 0x02 ? 1 : 0; /* SCIF0 */
618 if (port->mapbase == 0xffe10000) 618 if (port->mapbase == 0xffe10000)
619 return ctrl_inb(PADR) & 0x40 ? 1 : 0; /* SCIF1 */ 619 return __raw_readb(PADR) & 0x40 ? 1 : 0; /* SCIF1 */
620 if (port->mapbase == 0xffe20000) 620 if (port->mapbase == 0xffe20000)
621 return ctrl_inb(PWDR) & 0x04 ? 1 : 0; /* SCIF2 */ 621 return __raw_readb(PWDR) & 0x04 ? 1 : 0; /* SCIF2 */
622 622
623 return 1; 623 return 1;
624} 624}
@@ -626,17 +626,17 @@ static inline int sci_rxd_in(struct uart_port *port)
626static inline int sci_rxd_in(struct uart_port *port) 626static inline int sci_rxd_in(struct uart_port *port)
627{ 627{
628 if (port->mapbase == 0xffe00000) 628 if (port->mapbase == 0xffe00000)
629 return ctrl_inb(SCSPTR0) & 0x0008 ? 1 : 0; /* SCIF0 */ 629 return __raw_readb(SCSPTR0) & 0x0008 ? 1 : 0; /* SCIF0 */
630 if (port->mapbase == 0xffe10000) 630 if (port->mapbase == 0xffe10000)
631 return ctrl_inb(SCSPTR1) & 0x0020 ? 1 : 0; /* SCIF1 */ 631 return __raw_readb(SCSPTR1) & 0x0020 ? 1 : 0; /* SCIF1 */
632 if (port->mapbase == 0xffe20000) 632 if (port->mapbase == 0xffe20000)
633 return ctrl_inb(SCSPTR2) & 0x0001 ? 1 : 0; /* SCIF2 */ 633 return __raw_readb(SCSPTR2) & 0x0001 ? 1 : 0; /* SCIF2 */
634 if (port->mapbase == 0xa4e30000) 634 if (port->mapbase == 0xa4e30000)
635 return ctrl_inb(SCSPTR3) & 0x0001 ? 1 : 0; /* SCIF3 */ 635 return __raw_readb(SCSPTR3) & 0x0001 ? 1 : 0; /* SCIF3 */
636 if (port->mapbase == 0xa4e40000) 636 if (port->mapbase == 0xa4e40000)
637 return ctrl_inb(SCSPTR4) & 0x0001 ? 1 : 0; /* SCIF4 */ 637 return __raw_readb(SCSPTR4) & 0x0001 ? 1 : 0; /* SCIF4 */
638 if (port->mapbase == 0xa4e50000) 638 if (port->mapbase == 0xa4e50000)
639 return ctrl_inb(SCSPTR5) & 0x0008 ? 1 : 0; /* SCIF5 */ 639 return __raw_readb(SCSPTR5) & 0x0008 ? 1 : 0; /* SCIF5 */
640 return 1; 640 return 1;
641} 641}
642#elif defined(CONFIG_CPU_SUBTYPE_SH7724) 642#elif defined(CONFIG_CPU_SUBTYPE_SH7724)
@@ -645,9 +645,9 @@ static inline int sci_rxd_in(struct uart_port *port)
645static inline int sci_rxd_in(struct uart_port *port) 645static inline int sci_rxd_in(struct uart_port *port)
646{ 646{
647 if (port->type == PORT_SCIF) 647 if (port->type == PORT_SCIF)
648 return ctrl_inw((port->mapbase + SCFSR)) & SCIF_BRK ? 1 : 0; 648 return __raw_readw((port->mapbase + SCFSR)) & SCIF_BRK ? 1 : 0;
649 if (port->type == PORT_SCIFA) 649 if (port->type == PORT_SCIFA)
650 return ctrl_inw((port->mapbase + SCASSR)) & SCIF_BRK ? 1 : 0; 650 return __raw_readw((port->mapbase + SCASSR)) & SCIF_BRK ? 1 : 0;
651 return 1; 651 return 1;
652} 652}
653#elif defined(CONFIG_CPU_SUBTYPE_SH5_101) || defined(CONFIG_CPU_SUBTYPE_SH5_103) 653#elif defined(CONFIG_CPU_SUBTYPE_SH5_101) || defined(CONFIG_CPU_SUBTYPE_SH5_103)
@@ -665,11 +665,11 @@ static inline int sci_rxd_in(struct uart_port *port)
665static inline int sci_rxd_in(struct uart_port *port) 665static inline int sci_rxd_in(struct uart_port *port)
666{ 666{
667 if (port->mapbase == 0xffe00000) 667 if (port->mapbase == 0xffe00000)
668 return ctrl_inw(SCSPTR0) & 0x0001 ? 1 : 0; /* SCIF */ 668 return __raw_readw(SCSPTR0) & 0x0001 ? 1 : 0; /* SCIF */
669 if (port->mapbase == 0xffe08000) 669 if (port->mapbase == 0xffe08000)
670 return ctrl_inw(SCSPTR1) & 0x0001 ? 1 : 0; /* SCIF */ 670 return __raw_readw(SCSPTR1) & 0x0001 ? 1 : 0; /* SCIF */
671 if (port->mapbase == 0xffe10000) 671 if (port->mapbase == 0xffe10000)
672 return ctrl_inw(SCSPTR2) & 0x0001 ? 1 : 0; /* SCIF/IRDA */ 672 return __raw_readw(SCSPTR2) & 0x0001 ? 1 : 0; /* SCIF/IRDA */
673 673
674 return 1; 674 return 1;
675} 675}
@@ -677,20 +677,20 @@ static inline int sci_rxd_in(struct uart_port *port)
677static inline int sci_rxd_in(struct uart_port *port) 677static inline int sci_rxd_in(struct uart_port *port)
678{ 678{
679 if (port->mapbase == 0xff923000) 679 if (port->mapbase == 0xff923000)
680 return ctrl_inw(SCSPTR0) & 0x0001 ? 1 : 0; /* SCIF */ 680 return __raw_readw(SCSPTR0) & 0x0001 ? 1 : 0; /* SCIF */
681 if (port->mapbase == 0xff924000) 681 if (port->mapbase == 0xff924000)
682 return ctrl_inw(SCSPTR1) & 0x0001 ? 1 : 0; /* SCIF */ 682 return __raw_readw(SCSPTR1) & 0x0001 ? 1 : 0; /* SCIF */
683 if (port->mapbase == 0xff925000) 683 if (port->mapbase == 0xff925000)
684 return ctrl_inw(SCSPTR2) & 0x0001 ? 1 : 0; /* SCIF */ 684 return __raw_readw(SCSPTR2) & 0x0001 ? 1 : 0; /* SCIF */
685 return 1; 685 return 1;
686} 686}
687#elif defined(CONFIG_CPU_SUBTYPE_SH7780) 687#elif defined(CONFIG_CPU_SUBTYPE_SH7780)
688static inline int sci_rxd_in(struct uart_port *port) 688static inline int sci_rxd_in(struct uart_port *port)
689{ 689{
690 if (port->mapbase == 0xffe00000) 690 if (port->mapbase == 0xffe00000)
691 return ctrl_inw(SCSPTR0) & 0x0001 ? 1 : 0; /* SCIF */ 691 return __raw_readw(SCSPTR0) & 0x0001 ? 1 : 0; /* SCIF */
692 if (port->mapbase == 0xffe10000) 692 if (port->mapbase == 0xffe10000)
693 return ctrl_inw(SCSPTR1) & 0x0001 ? 1 : 0; /* SCIF */ 693 return __raw_readw(SCSPTR1) & 0x0001 ? 1 : 0; /* SCIF */
694 return 1; 694 return 1;
695} 695}
696#elif defined(CONFIG_CPU_SUBTYPE_SH7785) || \ 696#elif defined(CONFIG_CPU_SUBTYPE_SH7785) || \
@@ -698,17 +698,17 @@ static inline int sci_rxd_in(struct uart_port *port)
698static inline int sci_rxd_in(struct uart_port *port) 698static inline int sci_rxd_in(struct uart_port *port)
699{ 699{
700 if (port->mapbase == 0xffea0000) 700 if (port->mapbase == 0xffea0000)
701 return ctrl_inw(SCSPTR0) & 0x0001 ? 1 : 0; /* SCIF */ 701 return __raw_readw(SCSPTR0) & 0x0001 ? 1 : 0; /* SCIF */
702 if (port->mapbase == 0xffeb0000) 702 if (port->mapbase == 0xffeb0000)
703 return ctrl_inw(SCSPTR1) & 0x0001 ? 1 : 0; /* SCIF */ 703 return __raw_readw(SCSPTR1) & 0x0001 ? 1 : 0; /* SCIF */
704 if (port->mapbase == 0xffec0000) 704 if (port->mapbase == 0xffec0000)
705 return ctrl_inw(SCSPTR2) & 0x0001 ? 1 : 0; /* SCIF */ 705 return __raw_readw(SCSPTR2) & 0x0001 ? 1 : 0; /* SCIF */
706 if (port->mapbase == 0xffed0000) 706 if (port->mapbase == 0xffed0000)
707 return ctrl_inw(SCSPTR3) & 0x0001 ? 1 : 0; /* SCIF */ 707 return __raw_readw(SCSPTR3) & 0x0001 ? 1 : 0; /* SCIF */
708 if (port->mapbase == 0xffee0000) 708 if (port->mapbase == 0xffee0000)
709 return ctrl_inw(SCSPTR4) & 0x0001 ? 1 : 0; /* SCIF */ 709 return __raw_readw(SCSPTR4) & 0x0001 ? 1 : 0; /* SCIF */
710 if (port->mapbase == 0xffef0000) 710 if (port->mapbase == 0xffef0000)
711 return ctrl_inw(SCSPTR5) & 0x0001 ? 1 : 0; /* SCIF */ 711 return __raw_readw(SCSPTR5) & 0x0001 ? 1 : 0; /* SCIF */
712 return 1; 712 return 1;
713} 713}
714#elif defined(CONFIG_CPU_SUBTYPE_SH7201) || \ 714#elif defined(CONFIG_CPU_SUBTYPE_SH7201) || \
@@ -718,22 +718,22 @@ static inline int sci_rxd_in(struct uart_port *port)
718static inline int sci_rxd_in(struct uart_port *port) 718static inline int sci_rxd_in(struct uart_port *port)
719{ 719{
720 if (port->mapbase == 0xfffe8000) 720 if (port->mapbase == 0xfffe8000)
721 return ctrl_inw(SCSPTR0) & 0x0001 ? 1 : 0; /* SCIF */ 721 return __raw_readw(SCSPTR0) & 0x0001 ? 1 : 0; /* SCIF */
722 if (port->mapbase == 0xfffe8800) 722 if (port->mapbase == 0xfffe8800)
723 return ctrl_inw(SCSPTR1) & 0x0001 ? 1 : 0; /* SCIF */ 723 return __raw_readw(SCSPTR1) & 0x0001 ? 1 : 0; /* SCIF */
724 if (port->mapbase == 0xfffe9000) 724 if (port->mapbase == 0xfffe9000)
725 return ctrl_inw(SCSPTR2) & 0x0001 ? 1 : 0; /* SCIF */ 725 return __raw_readw(SCSPTR2) & 0x0001 ? 1 : 0; /* SCIF */
726 if (port->mapbase == 0xfffe9800) 726 if (port->mapbase == 0xfffe9800)
727 return ctrl_inw(SCSPTR3) & 0x0001 ? 1 : 0; /* SCIF */ 727 return __raw_readw(SCSPTR3) & 0x0001 ? 1 : 0; /* SCIF */
728#if defined(CONFIG_CPU_SUBTYPE_SH7201) 728#if defined(CONFIG_CPU_SUBTYPE_SH7201)
729 if (port->mapbase == 0xfffeA000) 729 if (port->mapbase == 0xfffeA000)
730 return ctrl_inw(SCSPTR0) & 0x0001 ? 1 : 0; /* SCIF */ 730 return __raw_readw(SCSPTR0) & 0x0001 ? 1 : 0; /* SCIF */
731 if (port->mapbase == 0xfffeA800) 731 if (port->mapbase == 0xfffeA800)
732 return ctrl_inw(SCSPTR1) & 0x0001 ? 1 : 0; /* SCIF */ 732 return __raw_readw(SCSPTR1) & 0x0001 ? 1 : 0; /* SCIF */
733 if (port->mapbase == 0xfffeB000) 733 if (port->mapbase == 0xfffeB000)
734 return ctrl_inw(SCSPTR2) & 0x0001 ? 1 : 0; /* SCIF */ 734 return __raw_readw(SCSPTR2) & 0x0001 ? 1 : 0; /* SCIF */
735 if (port->mapbase == 0xfffeB800) 735 if (port->mapbase == 0xfffeB800)
736 return ctrl_inw(SCSPTR3) & 0x0001 ? 1 : 0; /* SCIF */ 736 return __raw_readw(SCSPTR3) & 0x0001 ? 1 : 0; /* SCIF */
737#endif 737#endif
738 return 1; 738 return 1;
739} 739}
@@ -741,24 +741,24 @@ static inline int sci_rxd_in(struct uart_port *port)
741static inline int sci_rxd_in(struct uart_port *port) 741static inline int sci_rxd_in(struct uart_port *port)
742{ 742{
743 if (port->mapbase == 0xf8400000) 743 if (port->mapbase == 0xf8400000)
744 return ctrl_inw(SCSPTR0) & 0x0001 ? 1 : 0; /* SCIF */ 744 return __raw_readw(SCSPTR0) & 0x0001 ? 1 : 0; /* SCIF */
745 if (port->mapbase == 0xf8410000) 745 if (port->mapbase == 0xf8410000)
746 return ctrl_inw(SCSPTR1) & 0x0001 ? 1 : 0; /* SCIF */ 746 return __raw_readw(SCSPTR1) & 0x0001 ? 1 : 0; /* SCIF */
747 if (port->mapbase == 0xf8420000) 747 if (port->mapbase == 0xf8420000)
748 return ctrl_inw(SCSPTR2) & 0x0001 ? 1 : 0; /* SCIF */ 748 return __raw_readw(SCSPTR2) & 0x0001 ? 1 : 0; /* SCIF */
749 return 1; 749 return 1;
750} 750}
751#elif defined(CONFIG_CPU_SUBTYPE_SHX3) 751#elif defined(CONFIG_CPU_SUBTYPE_SHX3)
752static inline int sci_rxd_in(struct uart_port *port) 752static inline int sci_rxd_in(struct uart_port *port)
753{ 753{
754 if (port->mapbase == 0xffc30000) 754 if (port->mapbase == 0xffc30000)
755 return ctrl_inw(SCSPTR0) & 0x0001 ? 1 : 0; /* SCIF */ 755 return __raw_readw(SCSPTR0) & 0x0001 ? 1 : 0; /* SCIF */
756 if (port->mapbase == 0xffc40000) 756 if (port->mapbase == 0xffc40000)
757 return ctrl_inw(SCSPTR1) & 0x0001 ? 1 : 0; /* SCIF */ 757 return __raw_readw(SCSPTR1) & 0x0001 ? 1 : 0; /* SCIF */
758 if (port->mapbase == 0xffc50000) 758 if (port->mapbase == 0xffc50000)
759 return ctrl_inw(SCSPTR2) & 0x0001 ? 1 : 0; /* SCIF */ 759 return __raw_readw(SCSPTR2) & 0x0001 ? 1 : 0; /* SCIF */
760 if (port->mapbase == 0xffc60000) 760 if (port->mapbase == 0xffc60000)
761 return ctrl_inw(SCSPTR3) & 0x0001 ? 1 : 0; /* SCIF */ 761 return __raw_readw(SCSPTR3) & 0x0001 ? 1 : 0; /* SCIF */
762 return 1; 762 return 1;
763} 763}
764#endif 764#endif
diff --git a/drivers/serial/uartlite.c b/drivers/serial/uartlite.c
index 377f2712289e..ab2ab3c81834 100644
--- a/drivers/serial/uartlite.c
+++ b/drivers/serial/uartlite.c
@@ -394,7 +394,7 @@ static void ulite_console_write(struct console *co, const char *s,
394 spin_unlock_irqrestore(&port->lock, flags); 394 spin_unlock_irqrestore(&port->lock, flags);
395} 395}
396 396
397static int __init ulite_console_setup(struct console *co, char *options) 397static int __devinit ulite_console_setup(struct console *co, char *options)
398{ 398{
399 struct uart_port *port; 399 struct uart_port *port;
400 int baud = 9600; 400 int baud = 9600;
diff --git a/drivers/sh/intc.c b/drivers/sh/intc.c
index a7e5c2e9986c..d5d7f23c19a5 100644
--- a/drivers/sh/intc.c
+++ b/drivers/sh/intc.c
@@ -806,6 +806,8 @@ static int intc_suspend(struct sys_device *dev, pm_message_t state)
806 if (d->state.event != PM_EVENT_FREEZE) 806 if (d->state.event != PM_EVENT_FREEZE)
807 break; 807 break;
808 for_each_irq_desc(irq, desc) { 808 for_each_irq_desc(irq, desc) {
809 if (desc->handle_irq == intc_redirect_irq)
810 continue;
809 if (desc->chip != &d->chip) 811 if (desc->chip != &d->chip)
810 continue; 812 continue;
811 if (desc->status & IRQ_DISABLED) 813 if (desc->status & IRQ_DISABLED)
diff --git a/drivers/sh/pfc.c b/drivers/sh/pfc.c
index 841ed5030c8f..082604edc4c2 100644
--- a/drivers/sh/pfc.c
+++ b/drivers/sh/pfc.c
@@ -71,7 +71,7 @@ static void gpio_write_bit(struct pinmux_data_reg *dr,
71 71
72 pos = dr->reg_width - (in_pos + 1); 72 pos = dr->reg_width - (in_pos + 1);
73 73
74 pr_debug("write_bit addr = %lx, value = %ld, pos = %ld, " 74 pr_debug("write_bit addr = %lx, value = %d, pos = %ld, "
75 "r_width = %ld\n", 75 "r_width = %ld\n",
76 dr->reg, !!value, pos, dr->reg_width); 76 dr->reg, !!value, pos, dr->reg_width);
77 77
diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
index 2d9d70359360..f55eb0107336 100644
--- a/drivers/spi/Kconfig
+++ b/drivers/spi/Kconfig
@@ -216,6 +216,17 @@ config SPI_S3C24XX
216 help 216 help
217 SPI driver for Samsung S3C24XX series ARM SoCs 217 SPI driver for Samsung S3C24XX series ARM SoCs
218 218
219config SPI_S3C24XX_FIQ
220 bool "S3C24XX driver with FIQ pseudo-DMA"
221 depends on SPI_S3C24XX
222 select FIQ
223 help
224 Enable FIQ support for the S3C24XX SPI driver to provide pseudo
225 DMA by using the fast-interrupt request framework, This allows
226 the driver to get DMA-like performance when there are either
227 no free DMA channels, or when doing transfers that required both
228 TX and RX data paths.
229
219config SPI_S3C24XX_GPIO 230config SPI_S3C24XX_GPIO
220 tristate "Samsung S3C24XX series SPI by GPIO" 231 tristate "Samsung S3C24XX series SPI by GPIO"
221 depends on ARCH_S3C2410 && EXPERIMENTAL 232 depends on ARCH_S3C2410 && EXPERIMENTAL
@@ -226,6 +237,13 @@ config SPI_S3C24XX_GPIO
226 the inbuilt hardware cannot provide the transfer mode, or 237 the inbuilt hardware cannot provide the transfer mode, or
227 where the board is using non hardware connected pins. 238 where the board is using non hardware connected pins.
228 239
240config SPI_S3C64XX
241 tristate "Samsung S3C64XX series type SPI"
242 depends on ARCH_S3C64XX && EXPERIMENTAL
243 select S3C64XX_DMA
244 help
245 SPI driver for Samsung S3C64XX and newer SoCs.
246
229config SPI_SH_MSIOF 247config SPI_SH_MSIOF
230 tristate "SuperH MSIOF SPI controller" 248 tristate "SuperH MSIOF SPI controller"
231 depends on SUPERH && HAVE_CLK 249 depends on SUPERH && HAVE_CLK
@@ -289,6 +307,16 @@ config SPI_NUC900
289# Add new SPI master controllers in alphabetical order above this line 307# Add new SPI master controllers in alphabetical order above this line
290# 308#
291 309
310config SPI_DESIGNWARE
311 bool "DesignWare SPI controller core support"
312 depends on SPI_MASTER
313 help
314 general driver for SPI controller core from DesignWare
315
316config SPI_DW_PCI
317 tristate "PCI interface driver for DW SPI core"
318 depends on SPI_DESIGNWARE && PCI
319
292# 320#
293# There are lots of SPI device types, with sensors and memory 321# There are lots of SPI device types, with sensors and memory
294# being probably the most widely used ones. 322# being probably the most widely used ones.
diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile
index ed8c1675b52f..f3d2810ba11c 100644
--- a/drivers/spi/Makefile
+++ b/drivers/spi/Makefile
@@ -16,6 +16,8 @@ obj-$(CONFIG_SPI_BFIN) += spi_bfin5xx.o
16obj-$(CONFIG_SPI_BITBANG) += spi_bitbang.o 16obj-$(CONFIG_SPI_BITBANG) += spi_bitbang.o
17obj-$(CONFIG_SPI_AU1550) += au1550_spi.o 17obj-$(CONFIG_SPI_AU1550) += au1550_spi.o
18obj-$(CONFIG_SPI_BUTTERFLY) += spi_butterfly.o 18obj-$(CONFIG_SPI_BUTTERFLY) += spi_butterfly.o
19obj-$(CONFIG_SPI_DESIGNWARE) += dw_spi.o
20obj-$(CONFIG_SPI_DW_PCI) += dw_spi_pci.o
19obj-$(CONFIG_SPI_GPIO) += spi_gpio.o 21obj-$(CONFIG_SPI_GPIO) += spi_gpio.o
20obj-$(CONFIG_SPI_IMX) += spi_imx.o 22obj-$(CONFIG_SPI_IMX) += spi_imx.o
21obj-$(CONFIG_SPI_LM70_LLP) += spi_lm70llp.o 23obj-$(CONFIG_SPI_LM70_LLP) += spi_lm70llp.o
@@ -30,7 +32,8 @@ obj-$(CONFIG_SPI_MPC52xx) += mpc52xx_spi.o
30obj-$(CONFIG_SPI_MPC8xxx) += spi_mpc8xxx.o 32obj-$(CONFIG_SPI_MPC8xxx) += spi_mpc8xxx.o
31obj-$(CONFIG_SPI_PPC4xx) += spi_ppc4xx.o 33obj-$(CONFIG_SPI_PPC4xx) += spi_ppc4xx.o
32obj-$(CONFIG_SPI_S3C24XX_GPIO) += spi_s3c24xx_gpio.o 34obj-$(CONFIG_SPI_S3C24XX_GPIO) += spi_s3c24xx_gpio.o
33obj-$(CONFIG_SPI_S3C24XX) += spi_s3c24xx.o 35obj-$(CONFIG_SPI_S3C24XX) += spi_s3c24xx_hw.o
36obj-$(CONFIG_SPI_S3C64XX) += spi_s3c64xx.o
34obj-$(CONFIG_SPI_TXX9) += spi_txx9.o 37obj-$(CONFIG_SPI_TXX9) += spi_txx9.o
35obj-$(CONFIG_SPI_XILINX) += xilinx_spi.o 38obj-$(CONFIG_SPI_XILINX) += xilinx_spi.o
36obj-$(CONFIG_SPI_XILINX_OF) += xilinx_spi_of.o 39obj-$(CONFIG_SPI_XILINX_OF) += xilinx_spi_of.o
@@ -39,6 +42,11 @@ obj-$(CONFIG_SPI_SH_SCI) += spi_sh_sci.o
39obj-$(CONFIG_SPI_SH_MSIOF) += spi_sh_msiof.o 42obj-$(CONFIG_SPI_SH_MSIOF) += spi_sh_msiof.o
40obj-$(CONFIG_SPI_STMP3XXX) += spi_stmp.o 43obj-$(CONFIG_SPI_STMP3XXX) += spi_stmp.o
41obj-$(CONFIG_SPI_NUC900) += spi_nuc900.o 44obj-$(CONFIG_SPI_NUC900) += spi_nuc900.o
45
46# special build for s3c24xx spi driver with fiq support
47spi_s3c24xx_hw-y := spi_s3c24xx.o
48spi_s3c24xx_hw-$(CONFIG_SPI_S3C24XX_FIQ) += spi_s3c24xx_fiq.o
49
42# ... add above this line ... 50# ... add above this line ...
43 51
44# SPI protocol drivers (device/link on bus) 52# SPI protocol drivers (device/link on bus)
diff --git a/drivers/spi/atmel_spi.c b/drivers/spi/atmel_spi.c
index f5b3fdbb1e27..d21c24eaf0a9 100644
--- a/drivers/spi/atmel_spi.c
+++ b/drivers/spi/atmel_spi.c
@@ -189,14 +189,14 @@ static void atmel_spi_next_xfer_data(struct spi_master *master,
189 189
190 /* use scratch buffer only when rx or tx data is unspecified */ 190 /* use scratch buffer only when rx or tx data is unspecified */
191 if (xfer->rx_buf) 191 if (xfer->rx_buf)
192 *rx_dma = xfer->rx_dma + xfer->len - len; 192 *rx_dma = xfer->rx_dma + xfer->len - *plen;
193 else { 193 else {
194 *rx_dma = as->buffer_dma; 194 *rx_dma = as->buffer_dma;
195 if (len > BUFFER_SIZE) 195 if (len > BUFFER_SIZE)
196 len = BUFFER_SIZE; 196 len = BUFFER_SIZE;
197 } 197 }
198 if (xfer->tx_buf) 198 if (xfer->tx_buf)
199 *tx_dma = xfer->tx_dma + xfer->len - len; 199 *tx_dma = xfer->tx_dma + xfer->len - *plen;
200 else { 200 else {
201 *tx_dma = as->buffer_dma; 201 *tx_dma = as->buffer_dma;
202 if (len > BUFFER_SIZE) 202 if (len > BUFFER_SIZE)
@@ -788,7 +788,7 @@ static int __init atmel_spi_probe(struct platform_device *pdev)
788 spin_lock_init(&as->lock); 788 spin_lock_init(&as->lock);
789 INIT_LIST_HEAD(&as->queue); 789 INIT_LIST_HEAD(&as->queue);
790 as->pdev = pdev; 790 as->pdev = pdev;
791 as->regs = ioremap(regs->start, (regs->end - regs->start) + 1); 791 as->regs = ioremap(regs->start, resource_size(regs));
792 if (!as->regs) 792 if (!as->regs)
793 goto out_free_buffer; 793 goto out_free_buffer;
794 as->irq = irq; 794 as->irq = irq;
diff --git a/drivers/spi/dw_spi.c b/drivers/spi/dw_spi.c
new file mode 100644
index 000000000000..31620fae77be
--- /dev/null
+++ b/drivers/spi/dw_spi.c
@@ -0,0 +1,944 @@
1/*
2 * dw_spi.c - Designware SPI core controller driver (refer pxa2xx_spi.c)
3 *
4 * Copyright (c) 2009, Intel Corporation.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
14 *
15 * You should have received a copy of the GNU General Public License along with
16 * this program; if not, write to the Free Software Foundation, Inc.,
17 * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18 */
19
20#include <linux/dma-mapping.h>
21#include <linux/interrupt.h>
22#include <linux/highmem.h>
23#include <linux/delay.h>
24
25#include <linux/spi/dw_spi.h>
26#include <linux/spi/spi.h>
27
28#ifdef CONFIG_DEBUG_FS
29#include <linux/debugfs.h>
30#endif
31
32#define START_STATE ((void *)0)
33#define RUNNING_STATE ((void *)1)
34#define DONE_STATE ((void *)2)
35#define ERROR_STATE ((void *)-1)
36
37#define QUEUE_RUNNING 0
38#define QUEUE_STOPPED 1
39
40#define MRST_SPI_DEASSERT 0
41#define MRST_SPI_ASSERT 1
42
43/* Slave spi_dev related */
44struct chip_data {
45 u16 cr0;
46 u8 cs; /* chip select pin */
47 u8 n_bytes; /* current is a 1/2/4 byte op */
48 u8 tmode; /* TR/TO/RO/EEPROM */
49 u8 type; /* SPI/SSP/MicroWire */
50
51 u8 poll_mode; /* 1 means use poll mode */
52
53 u32 dma_width;
54 u32 rx_threshold;
55 u32 tx_threshold;
56 u8 enable_dma;
57 u8 bits_per_word;
58 u16 clk_div; /* baud rate divider */
59 u32 speed_hz; /* baud rate */
60 int (*write)(struct dw_spi *dws);
61 int (*read)(struct dw_spi *dws);
62 void (*cs_control)(u32 command);
63};
64
65#ifdef CONFIG_DEBUG_FS
66static int spi_show_regs_open(struct inode *inode, struct file *file)
67{
68 file->private_data = inode->i_private;
69 return 0;
70}
71
72#define SPI_REGS_BUFSIZE 1024
73static ssize_t spi_show_regs(struct file *file, char __user *user_buf,
74 size_t count, loff_t *ppos)
75{
76 struct dw_spi *dws;
77 char *buf;
78 u32 len = 0;
79 ssize_t ret;
80
81 dws = file->private_data;
82
83 buf = kzalloc(SPI_REGS_BUFSIZE, GFP_KERNEL);
84 if (!buf)
85 return 0;
86
87 len += snprintf(buf + len, SPI_REGS_BUFSIZE - len,
88 "MRST SPI0 registers:\n");
89 len += snprintf(buf + len, SPI_REGS_BUFSIZE - len,
90 "=================================\n");
91 len += snprintf(buf + len, SPI_REGS_BUFSIZE - len,
92 "CTRL0: \t\t0x%08x\n", dw_readl(dws, ctrl0));
93 len += snprintf(buf + len, SPI_REGS_BUFSIZE - len,
94 "CTRL1: \t\t0x%08x\n", dw_readl(dws, ctrl1));
95 len += snprintf(buf + len, SPI_REGS_BUFSIZE - len,
96 "SSIENR: \t0x%08x\n", dw_readl(dws, ssienr));
97 len += snprintf(buf + len, SPI_REGS_BUFSIZE - len,
98 "SER: \t\t0x%08x\n", dw_readl(dws, ser));
99 len += snprintf(buf + len, SPI_REGS_BUFSIZE - len,
100 "BAUDR: \t\t0x%08x\n", dw_readl(dws, baudr));
101 len += snprintf(buf + len, SPI_REGS_BUFSIZE - len,
102 "TXFTLR: \t0x%08x\n", dw_readl(dws, txfltr));
103 len += snprintf(buf + len, SPI_REGS_BUFSIZE - len,
104 "RXFTLR: \t0x%08x\n", dw_readl(dws, rxfltr));
105 len += snprintf(buf + len, SPI_REGS_BUFSIZE - len,
106 "TXFLR: \t\t0x%08x\n", dw_readl(dws, txflr));
107 len += snprintf(buf + len, SPI_REGS_BUFSIZE - len,
108 "RXFLR: \t\t0x%08x\n", dw_readl(dws, rxflr));
109 len += snprintf(buf + len, SPI_REGS_BUFSIZE - len,
110 "SR: \t\t0x%08x\n", dw_readl(dws, sr));
111 len += snprintf(buf + len, SPI_REGS_BUFSIZE - len,
112 "IMR: \t\t0x%08x\n", dw_readl(dws, imr));
113 len += snprintf(buf + len, SPI_REGS_BUFSIZE - len,
114 "ISR: \t\t0x%08x\n", dw_readl(dws, isr));
115 len += snprintf(buf + len, SPI_REGS_BUFSIZE - len,
116 "DMACR: \t\t0x%08x\n", dw_readl(dws, dmacr));
117 len += snprintf(buf + len, SPI_REGS_BUFSIZE - len,
118 "DMATDLR: \t0x%08x\n", dw_readl(dws, dmatdlr));
119 len += snprintf(buf + len, SPI_REGS_BUFSIZE - len,
120 "DMARDLR: \t0x%08x\n", dw_readl(dws, dmardlr));
121 len += snprintf(buf + len, SPI_REGS_BUFSIZE - len,
122 "=================================\n");
123
124 ret = simple_read_from_buffer(user_buf, count, ppos, buf, len);
125 kfree(buf);
126 return ret;
127}
128
129static const struct file_operations mrst_spi_regs_ops = {
130 .owner = THIS_MODULE,
131 .open = spi_show_regs_open,
132 .read = spi_show_regs,
133};
134
135static int mrst_spi_debugfs_init(struct dw_spi *dws)
136{
137 dws->debugfs = debugfs_create_dir("mrst_spi", NULL);
138 if (!dws->debugfs)
139 return -ENOMEM;
140
141 debugfs_create_file("registers", S_IFREG | S_IRUGO,
142 dws->debugfs, (void *)dws, &mrst_spi_regs_ops);
143 return 0;
144}
145
146static void mrst_spi_debugfs_remove(struct dw_spi *dws)
147{
148 if (dws->debugfs)
149 debugfs_remove_recursive(dws->debugfs);
150}
151
152#else
153static inline int mrst_spi_debugfs_init(struct dw_spi *dws)
154{
155}
156
157static inline void mrst_spi_debugfs_remove(struct dw_spi *dws)
158{
159}
160#endif /* CONFIG_DEBUG_FS */
161
162static void wait_till_not_busy(struct dw_spi *dws)
163{
164 unsigned long end = jiffies + usecs_to_jiffies(1000);
165
166 while (time_before(jiffies, end)) {
167 if (!(dw_readw(dws, sr) & SR_BUSY))
168 return;
169 }
170 dev_err(&dws->master->dev,
171 "DW SPI: Stutus keeps busy for 1000us after a read/write!\n");
172}
173
174static void flush(struct dw_spi *dws)
175{
176 while (dw_readw(dws, sr) & SR_RF_NOT_EMPT)
177 dw_readw(dws, dr);
178
179 wait_till_not_busy(dws);
180}
181
182static void null_cs_control(u32 command)
183{
184}
185
186static int null_writer(struct dw_spi *dws)
187{
188 u8 n_bytes = dws->n_bytes;
189
190 if (!(dw_readw(dws, sr) & SR_TF_NOT_FULL)
191 || (dws->tx == dws->tx_end))
192 return 0;
193 dw_writew(dws, dr, 0);
194 dws->tx += n_bytes;
195
196 wait_till_not_busy(dws);
197 return 1;
198}
199
200static int null_reader(struct dw_spi *dws)
201{
202 u8 n_bytes = dws->n_bytes;
203
204 while ((dw_readw(dws, sr) & SR_RF_NOT_EMPT)
205 && (dws->rx < dws->rx_end)) {
206 dw_readw(dws, dr);
207 dws->rx += n_bytes;
208 }
209 wait_till_not_busy(dws);
210 return dws->rx == dws->rx_end;
211}
212
213static int u8_writer(struct dw_spi *dws)
214{
215 if (!(dw_readw(dws, sr) & SR_TF_NOT_FULL)
216 || (dws->tx == dws->tx_end))
217 return 0;
218
219 dw_writew(dws, dr, *(u8 *)(dws->tx));
220 ++dws->tx;
221
222 wait_till_not_busy(dws);
223 return 1;
224}
225
226static int u8_reader(struct dw_spi *dws)
227{
228 while ((dw_readw(dws, sr) & SR_RF_NOT_EMPT)
229 && (dws->rx < dws->rx_end)) {
230 *(u8 *)(dws->rx) = dw_readw(dws, dr);
231 ++dws->rx;
232 }
233
234 wait_till_not_busy(dws);
235 return dws->rx == dws->rx_end;
236}
237
238static int u16_writer(struct dw_spi *dws)
239{
240 if (!(dw_readw(dws, sr) & SR_TF_NOT_FULL)
241 || (dws->tx == dws->tx_end))
242 return 0;
243
244 dw_writew(dws, dr, *(u16 *)(dws->tx));
245 dws->tx += 2;
246
247 wait_till_not_busy(dws);
248 return 1;
249}
250
251static int u16_reader(struct dw_spi *dws)
252{
253 u16 temp;
254
255 while ((dw_readw(dws, sr) & SR_RF_NOT_EMPT)
256 && (dws->rx < dws->rx_end)) {
257 temp = dw_readw(dws, dr);
258 *(u16 *)(dws->rx) = temp;
259 dws->rx += 2;
260 }
261
262 wait_till_not_busy(dws);
263 return dws->rx == dws->rx_end;
264}
265
266static void *next_transfer(struct dw_spi *dws)
267{
268 struct spi_message *msg = dws->cur_msg;
269 struct spi_transfer *trans = dws->cur_transfer;
270
271 /* Move to next transfer */
272 if (trans->transfer_list.next != &msg->transfers) {
273 dws->cur_transfer =
274 list_entry(trans->transfer_list.next,
275 struct spi_transfer,
276 transfer_list);
277 return RUNNING_STATE;
278 } else
279 return DONE_STATE;
280}
281
282/*
283 * Note: first step is the protocol driver prepares
284 * a dma-capable memory, and this func just need translate
285 * the virt addr to physical
286 */
287static int map_dma_buffers(struct dw_spi *dws)
288{
289 if (!dws->cur_msg->is_dma_mapped || !dws->dma_inited
290 || !dws->cur_chip->enable_dma)
291 return 0;
292
293 if (dws->cur_transfer->tx_dma)
294 dws->tx_dma = dws->cur_transfer->tx_dma;
295
296 if (dws->cur_transfer->rx_dma)
297 dws->rx_dma = dws->cur_transfer->rx_dma;
298
299 return 1;
300}
301
302/* Caller already set message->status; dma and pio irqs are blocked */
303static void giveback(struct dw_spi *dws)
304{
305 struct spi_transfer *last_transfer;
306 unsigned long flags;
307 struct spi_message *msg;
308
309 spin_lock_irqsave(&dws->lock, flags);
310 msg = dws->cur_msg;
311 dws->cur_msg = NULL;
312 dws->cur_transfer = NULL;
313 dws->prev_chip = dws->cur_chip;
314 dws->cur_chip = NULL;
315 dws->dma_mapped = 0;
316 queue_work(dws->workqueue, &dws->pump_messages);
317 spin_unlock_irqrestore(&dws->lock, flags);
318
319 last_transfer = list_entry(msg->transfers.prev,
320 struct spi_transfer,
321 transfer_list);
322
323 if (!last_transfer->cs_change)
324 dws->cs_control(MRST_SPI_DEASSERT);
325
326 msg->state = NULL;
327 if (msg->complete)
328 msg->complete(msg->context);
329}
330
331static void int_error_stop(struct dw_spi *dws, const char *msg)
332{
333 /* Stop and reset hw */
334 flush(dws);
335 spi_enable_chip(dws, 0);
336
337 dev_err(&dws->master->dev, "%s\n", msg);
338 dws->cur_msg->state = ERROR_STATE;
339 tasklet_schedule(&dws->pump_transfers);
340}
341
342static void transfer_complete(struct dw_spi *dws)
343{
344 /* Update total byte transfered return count actual bytes read */
345 dws->cur_msg->actual_length += dws->len;
346
347 /* Move to next transfer */
348 dws->cur_msg->state = next_transfer(dws);
349
350 /* Handle end of message */
351 if (dws->cur_msg->state == DONE_STATE) {
352 dws->cur_msg->status = 0;
353 giveback(dws);
354 } else
355 tasklet_schedule(&dws->pump_transfers);
356}
357
358static irqreturn_t interrupt_transfer(struct dw_spi *dws)
359{
360 u16 irq_status, irq_mask = 0x3f;
361
362 irq_status = dw_readw(dws, isr) & irq_mask;
363 /* Error handling */
364 if (irq_status & (SPI_INT_TXOI | SPI_INT_RXOI | SPI_INT_RXUI)) {
365 dw_readw(dws, txoicr);
366 dw_readw(dws, rxoicr);
367 dw_readw(dws, rxuicr);
368 int_error_stop(dws, "interrupt_transfer: fifo overrun");
369 return IRQ_HANDLED;
370 }
371
372 /* INT comes from tx */
373 if (dws->tx && (irq_status & SPI_INT_TXEI)) {
374 while (dws->tx < dws->tx_end)
375 dws->write(dws);
376
377 if (dws->tx == dws->tx_end) {
378 spi_mask_intr(dws, SPI_INT_TXEI);
379 transfer_complete(dws);
380 }
381 }
382
383 /* INT comes from rx */
384 if (dws->rx && (irq_status & SPI_INT_RXFI)) {
385 if (dws->read(dws))
386 transfer_complete(dws);
387 }
388 return IRQ_HANDLED;
389}
390
391static irqreturn_t dw_spi_irq(int irq, void *dev_id)
392{
393 struct dw_spi *dws = dev_id;
394
395 if (!dws->cur_msg) {
396 spi_mask_intr(dws, SPI_INT_TXEI);
397 /* Never fail */
398 return IRQ_HANDLED;
399 }
400
401 return dws->transfer_handler(dws);
402}
403
404/* Must be called inside pump_transfers() */
405static void poll_transfer(struct dw_spi *dws)
406{
407 if (dws->tx) {
408 while (dws->write(dws))
409 dws->read(dws);
410 }
411
412 dws->read(dws);
413 transfer_complete(dws);
414}
415
416static void dma_transfer(struct dw_spi *dws, int cs_change)
417{
418}
419
420static void pump_transfers(unsigned long data)
421{
422 struct dw_spi *dws = (struct dw_spi *)data;
423 struct spi_message *message = NULL;
424 struct spi_transfer *transfer = NULL;
425 struct spi_transfer *previous = NULL;
426 struct spi_device *spi = NULL;
427 struct chip_data *chip = NULL;
428 u8 bits = 0;
429 u8 imask = 0;
430 u8 cs_change = 0;
431 u16 clk_div = 0;
432 u32 speed = 0;
433 u32 cr0 = 0;
434
435 /* Get current state information */
436 message = dws->cur_msg;
437 transfer = dws->cur_transfer;
438 chip = dws->cur_chip;
439 spi = message->spi;
440
441 if (message->state == ERROR_STATE) {
442 message->status = -EIO;
443 goto early_exit;
444 }
445
446 /* Handle end of message */
447 if (message->state == DONE_STATE) {
448 message->status = 0;
449 goto early_exit;
450 }
451
452 /* Delay if requested at end of transfer*/
453 if (message->state == RUNNING_STATE) {
454 previous = list_entry(transfer->transfer_list.prev,
455 struct spi_transfer,
456 transfer_list);
457 if (previous->delay_usecs)
458 udelay(previous->delay_usecs);
459 }
460
461 dws->n_bytes = chip->n_bytes;
462 dws->dma_width = chip->dma_width;
463 dws->cs_control = chip->cs_control;
464
465 dws->rx_dma = transfer->rx_dma;
466 dws->tx_dma = transfer->tx_dma;
467 dws->tx = (void *)transfer->tx_buf;
468 dws->tx_end = dws->tx + transfer->len;
469 dws->rx = transfer->rx_buf;
470 dws->rx_end = dws->rx + transfer->len;
471 dws->write = dws->tx ? chip->write : null_writer;
472 dws->read = dws->rx ? chip->read : null_reader;
473 dws->cs_change = transfer->cs_change;
474 dws->len = dws->cur_transfer->len;
475 if (chip != dws->prev_chip)
476 cs_change = 1;
477
478 cr0 = chip->cr0;
479
480 /* Handle per transfer options for bpw and speed */
481 if (transfer->speed_hz) {
482 speed = chip->speed_hz;
483
484 if (transfer->speed_hz != speed) {
485 speed = transfer->speed_hz;
486 if (speed > dws->max_freq) {
487 printk(KERN_ERR "MRST SPI0: unsupported"
488 "freq: %dHz\n", speed);
489 message->status = -EIO;
490 goto early_exit;
491 }
492
493 /* clk_div doesn't support odd number */
494 clk_div = dws->max_freq / speed;
495 clk_div = (clk_div >> 1) << 1;
496
497 chip->speed_hz = speed;
498 chip->clk_div = clk_div;
499 }
500 }
501 if (transfer->bits_per_word) {
502 bits = transfer->bits_per_word;
503
504 switch (bits) {
505 case 8:
506 dws->n_bytes = 1;
507 dws->dma_width = 1;
508 dws->read = (dws->read != null_reader) ?
509 u8_reader : null_reader;
510 dws->write = (dws->write != null_writer) ?
511 u8_writer : null_writer;
512 break;
513 case 16:
514 dws->n_bytes = 2;
515 dws->dma_width = 2;
516 dws->read = (dws->read != null_reader) ?
517 u16_reader : null_reader;
518 dws->write = (dws->write != null_writer) ?
519 u16_writer : null_writer;
520 break;
521 default:
522 printk(KERN_ERR "MRST SPI0: unsupported bits:"
523 "%db\n", bits);
524 message->status = -EIO;
525 goto early_exit;
526 }
527
528 cr0 = (bits - 1)
529 | (chip->type << SPI_FRF_OFFSET)
530 | (spi->mode << SPI_MODE_OFFSET)
531 | (chip->tmode << SPI_TMOD_OFFSET);
532 }
533 message->state = RUNNING_STATE;
534
535 /* Check if current transfer is a DMA transaction */
536 dws->dma_mapped = map_dma_buffers(dws);
537
538 if (!dws->dma_mapped && !chip->poll_mode) {
539 if (dws->rx)
540 imask |= SPI_INT_RXFI;
541 if (dws->tx)
542 imask |= SPI_INT_TXEI;
543 dws->transfer_handler = interrupt_transfer;
544 }
545
546 /*
547 * Reprogram registers only if
548 * 1. chip select changes
549 * 2. clk_div is changed
550 * 3. control value changes
551 */
552 if (dw_readw(dws, ctrl0) != cr0 || cs_change || clk_div) {
553 spi_enable_chip(dws, 0);
554
555 if (dw_readw(dws, ctrl0) != cr0)
556 dw_writew(dws, ctrl0, cr0);
557
558 /* Set the interrupt mask, for poll mode just diable all int */
559 spi_mask_intr(dws, 0xff);
560 if (!chip->poll_mode)
561 spi_umask_intr(dws, imask);
562
563 spi_set_clk(dws, clk_div ? clk_div : chip->clk_div);
564 spi_chip_sel(dws, spi->chip_select);
565 spi_enable_chip(dws, 1);
566
567 if (cs_change)
568 dws->prev_chip = chip;
569 }
570
571 if (dws->dma_mapped)
572 dma_transfer(dws, cs_change);
573
574 if (chip->poll_mode)
575 poll_transfer(dws);
576
577 return;
578
579early_exit:
580 giveback(dws);
581 return;
582}
583
584static void pump_messages(struct work_struct *work)
585{
586 struct dw_spi *dws =
587 container_of(work, struct dw_spi, pump_messages);
588 unsigned long flags;
589
590 /* Lock queue and check for queue work */
591 spin_lock_irqsave(&dws->lock, flags);
592 if (list_empty(&dws->queue) || dws->run == QUEUE_STOPPED) {
593 dws->busy = 0;
594 spin_unlock_irqrestore(&dws->lock, flags);
595 return;
596 }
597
598 /* Make sure we are not already running a message */
599 if (dws->cur_msg) {
600 spin_unlock_irqrestore(&dws->lock, flags);
601 return;
602 }
603
604 /* Extract head of queue */
605 dws->cur_msg = list_entry(dws->queue.next, struct spi_message, queue);
606 list_del_init(&dws->cur_msg->queue);
607
608 /* Initial message state*/
609 dws->cur_msg->state = START_STATE;
610 dws->cur_transfer = list_entry(dws->cur_msg->transfers.next,
611 struct spi_transfer,
612 transfer_list);
613 dws->cur_chip = spi_get_ctldata(dws->cur_msg->spi);
614
615 /* Mark as busy and launch transfers */
616 tasklet_schedule(&dws->pump_transfers);
617
618 dws->busy = 1;
619 spin_unlock_irqrestore(&dws->lock, flags);
620}
621
622/* spi_device use this to queue in their spi_msg */
623static int dw_spi_transfer(struct spi_device *spi, struct spi_message *msg)
624{
625 struct dw_spi *dws = spi_master_get_devdata(spi->master);
626 unsigned long flags;
627
628 spin_lock_irqsave(&dws->lock, flags);
629
630 if (dws->run == QUEUE_STOPPED) {
631 spin_unlock_irqrestore(&dws->lock, flags);
632 return -ESHUTDOWN;
633 }
634
635 msg->actual_length = 0;
636 msg->status = -EINPROGRESS;
637 msg->state = START_STATE;
638
639 list_add_tail(&msg->queue, &dws->queue);
640
641 if (dws->run == QUEUE_RUNNING && !dws->busy) {
642
643 if (dws->cur_transfer || dws->cur_msg)
644 queue_work(dws->workqueue,
645 &dws->pump_messages);
646 else {
647 /* If no other data transaction in air, just go */
648 spin_unlock_irqrestore(&dws->lock, flags);
649 pump_messages(&dws->pump_messages);
650 return 0;
651 }
652 }
653
654 spin_unlock_irqrestore(&dws->lock, flags);
655 return 0;
656}
657
658/* This may be called twice for each spi dev */
659static int dw_spi_setup(struct spi_device *spi)
660{
661 struct dw_spi_chip *chip_info = NULL;
662 struct chip_data *chip;
663
664 if (spi->bits_per_word != 8 && spi->bits_per_word != 16)
665 return -EINVAL;
666
667 /* Only alloc on first setup */
668 chip = spi_get_ctldata(spi);
669 if (!chip) {
670 chip = kzalloc(sizeof(struct chip_data), GFP_KERNEL);
671 if (!chip)
672 return -ENOMEM;
673
674 chip->cs_control = null_cs_control;
675 chip->enable_dma = 0;
676 }
677
678 /*
679 * Protocol drivers may change the chip settings, so...
680 * if chip_info exists, use it
681 */
682 chip_info = spi->controller_data;
683
684 /* chip_info doesn't always exist */
685 if (chip_info) {
686 if (chip_info->cs_control)
687 chip->cs_control = chip_info->cs_control;
688
689 chip->poll_mode = chip_info->poll_mode;
690 chip->type = chip_info->type;
691
692 chip->rx_threshold = 0;
693 chip->tx_threshold = 0;
694
695 chip->enable_dma = chip_info->enable_dma;
696 }
697
698 if (spi->bits_per_word <= 8) {
699 chip->n_bytes = 1;
700 chip->dma_width = 1;
701 chip->read = u8_reader;
702 chip->write = u8_writer;
703 } else if (spi->bits_per_word <= 16) {
704 chip->n_bytes = 2;
705 chip->dma_width = 2;
706 chip->read = u16_reader;
707 chip->write = u16_writer;
708 } else {
709 /* Never take >16b case for MRST SPIC */
710 dev_err(&spi->dev, "invalid wordsize\n");
711 return -EINVAL;
712 }
713 chip->bits_per_word = spi->bits_per_word;
714
715 chip->speed_hz = spi->max_speed_hz;
716 if (chip->speed_hz)
717 chip->clk_div = 25000000 / chip->speed_hz;
718 else
719 chip->clk_div = 8; /* default value */
720
721 chip->tmode = 0; /* Tx & Rx */
722 /* Default SPI mode is SCPOL = 0, SCPH = 0 */
723 chip->cr0 = (chip->bits_per_word - 1)
724 | (chip->type << SPI_FRF_OFFSET)
725 | (spi->mode << SPI_MODE_OFFSET)
726 | (chip->tmode << SPI_TMOD_OFFSET);
727
728 spi_set_ctldata(spi, chip);
729 return 0;
730}
731
732static void dw_spi_cleanup(struct spi_device *spi)
733{
734 struct chip_data *chip = spi_get_ctldata(spi);
735 kfree(chip);
736}
737
738static int __init init_queue(struct dw_spi *dws)
739{
740 INIT_LIST_HEAD(&dws->queue);
741 spin_lock_init(&dws->lock);
742
743 dws->run = QUEUE_STOPPED;
744 dws->busy = 0;
745
746 tasklet_init(&dws->pump_transfers,
747 pump_transfers, (unsigned long)dws);
748
749 INIT_WORK(&dws->pump_messages, pump_messages);
750 dws->workqueue = create_singlethread_workqueue(
751 dev_name(dws->master->dev.parent));
752 if (dws->workqueue == NULL)
753 return -EBUSY;
754
755 return 0;
756}
757
758static int start_queue(struct dw_spi *dws)
759{
760 unsigned long flags;
761
762 spin_lock_irqsave(&dws->lock, flags);
763
764 if (dws->run == QUEUE_RUNNING || dws->busy) {
765 spin_unlock_irqrestore(&dws->lock, flags);
766 return -EBUSY;
767 }
768
769 dws->run = QUEUE_RUNNING;
770 dws->cur_msg = NULL;
771 dws->cur_transfer = NULL;
772 dws->cur_chip = NULL;
773 dws->prev_chip = NULL;
774 spin_unlock_irqrestore(&dws->lock, flags);
775
776 queue_work(dws->workqueue, &dws->pump_messages);
777
778 return 0;
779}
780
781static int stop_queue(struct dw_spi *dws)
782{
783 unsigned long flags;
784 unsigned limit = 50;
785 int status = 0;
786
787 spin_lock_irqsave(&dws->lock, flags);
788 dws->run = QUEUE_STOPPED;
789 while (!list_empty(&dws->queue) && dws->busy && limit--) {
790 spin_unlock_irqrestore(&dws->lock, flags);
791 msleep(10);
792 spin_lock_irqsave(&dws->lock, flags);
793 }
794
795 if (!list_empty(&dws->queue) || dws->busy)
796 status = -EBUSY;
797 spin_unlock_irqrestore(&dws->lock, flags);
798
799 return status;
800}
801
802static int destroy_queue(struct dw_spi *dws)
803{
804 int status;
805
806 status = stop_queue(dws);
807 if (status != 0)
808 return status;
809 destroy_workqueue(dws->workqueue);
810 return 0;
811}
812
813/* Restart the controller, disable all interrupts, clean rx fifo */
814static void spi_hw_init(struct dw_spi *dws)
815{
816 spi_enable_chip(dws, 0);
817 spi_mask_intr(dws, 0xff);
818 spi_enable_chip(dws, 1);
819 flush(dws);
820}
821
822int __devinit dw_spi_add_host(struct dw_spi *dws)
823{
824 struct spi_master *master;
825 int ret;
826
827 BUG_ON(dws == NULL);
828
829 master = spi_alloc_master(dws->parent_dev, 0);
830 if (!master) {
831 ret = -ENOMEM;
832 goto exit;
833 }
834
835 dws->master = master;
836 dws->type = SSI_MOTO_SPI;
837 dws->prev_chip = NULL;
838 dws->dma_inited = 0;
839 dws->dma_addr = (dma_addr_t)(dws->paddr + 0x60);
840
841 ret = request_irq(dws->irq, dw_spi_irq, 0,
842 "dw_spi", dws);
843 if (ret < 0) {
844 dev_err(&master->dev, "can not get IRQ\n");
845 goto err_free_master;
846 }
847
848 master->mode_bits = SPI_CPOL | SPI_CPHA;
849 master->bus_num = dws->bus_num;
850 master->num_chipselect = dws->num_cs;
851 master->cleanup = dw_spi_cleanup;
852 master->setup = dw_spi_setup;
853 master->transfer = dw_spi_transfer;
854
855 dws->dma_inited = 0;
856
857 /* Basic HW init */
858 spi_hw_init(dws);
859
860 /* Initial and start queue */
861 ret = init_queue(dws);
862 if (ret) {
863 dev_err(&master->dev, "problem initializing queue\n");
864 goto err_diable_hw;
865 }
866 ret = start_queue(dws);
867 if (ret) {
868 dev_err(&master->dev, "problem starting queue\n");
869 goto err_diable_hw;
870 }
871
872 spi_master_set_devdata(master, dws);
873 ret = spi_register_master(master);
874 if (ret) {
875 dev_err(&master->dev, "problem registering spi master\n");
876 goto err_queue_alloc;
877 }
878
879 mrst_spi_debugfs_init(dws);
880 return 0;
881
882err_queue_alloc:
883 destroy_queue(dws);
884err_diable_hw:
885 spi_enable_chip(dws, 0);
886 free_irq(dws->irq, dws);
887err_free_master:
888 spi_master_put(master);
889exit:
890 return ret;
891}
892EXPORT_SYMBOL(dw_spi_add_host);
893
894void __devexit dw_spi_remove_host(struct dw_spi *dws)
895{
896 int status = 0;
897
898 if (!dws)
899 return;
900 mrst_spi_debugfs_remove(dws);
901
902 /* Remove the queue */
903 status = destroy_queue(dws);
904 if (status != 0)
905 dev_err(&dws->master->dev, "dw_spi_remove: workqueue will not "
906 "complete, message memory not freed\n");
907
908 spi_enable_chip(dws, 0);
909 /* Disable clk */
910 spi_set_clk(dws, 0);
911 free_irq(dws->irq, dws);
912
913 /* Disconnect from the SPI framework */
914 spi_unregister_master(dws->master);
915}
916
917int dw_spi_suspend_host(struct dw_spi *dws)
918{
919 int ret = 0;
920
921 ret = stop_queue(dws);
922 if (ret)
923 return ret;
924 spi_enable_chip(dws, 0);
925 spi_set_clk(dws, 0);
926 return ret;
927}
928EXPORT_SYMBOL(dw_spi_suspend_host);
929
930int dw_spi_resume_host(struct dw_spi *dws)
931{
932 int ret;
933
934 spi_hw_init(dws);
935 ret = start_queue(dws);
936 if (ret)
937 dev_err(&dws->master->dev, "fail to start queue (%d)\n", ret);
938 return ret;
939}
940EXPORT_SYMBOL(dw_spi_resume_host);
941
942MODULE_AUTHOR("Feng Tang <feng.tang@intel.com>");
943MODULE_DESCRIPTION("Driver for DesignWare SPI controller core");
944MODULE_LICENSE("GPL v2");
diff --git a/drivers/spi/dw_spi_pci.c b/drivers/spi/dw_spi_pci.c
new file mode 100644
index 000000000000..34ba69161734
--- /dev/null
+++ b/drivers/spi/dw_spi_pci.c
@@ -0,0 +1,169 @@
1/*
2 * mrst_spi_pci.c - PCI interface driver for DW SPI Core
3 *
4 * Copyright (c) 2009, Intel Corporation.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
14 *
15 * You should have received a copy of the GNU General Public License along
16 * with this program; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18 */
19
20#include <linux/interrupt.h>
21#include <linux/pci.h>
22#include <linux/spi/dw_spi.h>
23#include <linux/spi/spi.h>
24
25#define DRIVER_NAME "dw_spi_pci"
26
27struct dw_spi_pci {
28 struct pci_dev *pdev;
29 struct dw_spi dws;
30};
31
32static int __devinit spi_pci_probe(struct pci_dev *pdev,
33 const struct pci_device_id *ent)
34{
35 struct dw_spi_pci *dwpci;
36 struct dw_spi *dws;
37 int pci_bar = 0;
38 int ret;
39
40 printk(KERN_INFO "DW: found PCI SPI controller(ID: %04x:%04x)\n",
41 pdev->vendor, pdev->device);
42
43 ret = pci_enable_device(pdev);
44 if (ret)
45 return ret;
46
47 dwpci = kzalloc(sizeof(struct dw_spi_pci), GFP_KERNEL);
48 if (!dwpci) {
49 ret = -ENOMEM;
50 goto err_disable;
51 }
52
53 dwpci->pdev = pdev;
54 dws = &dwpci->dws;
55
56 /* Get basic io resource and map it */
57 dws->paddr = pci_resource_start(pdev, pci_bar);
58 dws->iolen = pci_resource_len(pdev, pci_bar);
59
60 ret = pci_request_region(pdev, pci_bar, dev_name(&pdev->dev));
61 if (ret)
62 goto err_kfree;
63
64 dws->regs = ioremap_nocache((unsigned long)dws->paddr,
65 pci_resource_len(pdev, pci_bar));
66 if (!dws->regs) {
67 ret = -ENOMEM;
68 goto err_release_reg;
69 }
70
71 dws->parent_dev = &pdev->dev;
72 dws->bus_num = 0;
73 dws->num_cs = 4;
74 dws->max_freq = 25000000; /* for Moorestwon */
75 dws->irq = pdev->irq;
76
77 ret = dw_spi_add_host(dws);
78 if (ret)
79 goto err_unmap;
80
81 /* PCI hook and SPI hook use the same drv data */
82 pci_set_drvdata(pdev, dwpci);
83 return 0;
84
85err_unmap:
86 iounmap(dws->regs);
87err_release_reg:
88 pci_release_region(pdev, pci_bar);
89err_kfree:
90 kfree(dwpci);
91err_disable:
92 pci_disable_device(pdev);
93 return ret;
94}
95
96static void __devexit spi_pci_remove(struct pci_dev *pdev)
97{
98 struct dw_spi_pci *dwpci = pci_get_drvdata(pdev);
99
100 pci_set_drvdata(pdev, NULL);
101 iounmap(dwpci->dws.regs);
102 pci_release_region(pdev, 0);
103 kfree(dwpci);
104 pci_disable_device(pdev);
105}
106
107#ifdef CONFIG_PM
108static int spi_suspend(struct pci_dev *pdev, pm_message_t state)
109{
110 struct dw_spi_pci *dwpci = pci_get_drvdata(pdev);
111 int ret;
112
113 ret = dw_spi_suspend_host(&dwpci->dws);
114 if (ret)
115 return ret;
116 pci_save_state(pdev);
117 pci_disable_device(pdev);
118 pci_set_power_state(pdev, pci_choose_state(pdev, state));
119 return ret;
120}
121
122static int spi_resume(struct pci_dev *pdev)
123{
124 struct dw_spi_pci *dwpci = pci_get_drvdata(pdev);
125 int ret;
126
127 pci_set_power_state(pdev, PCI_D0);
128 pci_restore_state(pdev);
129 ret = pci_enable_device(pdev);
130 if (ret)
131 return ret;
132 return dw_spi_resume_host(&dwpci->dws);
133}
134#else
135#define spi_suspend NULL
136#define spi_resume NULL
137#endif
138
139static const struct pci_device_id pci_ids[] __devinitdata = {
140 /* Intel Moorestown platform SPI controller 0 */
141 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x0800) },
142 {},
143};
144
145static struct pci_driver dw_spi_driver = {
146 .name = DRIVER_NAME,
147 .id_table = pci_ids,
148 .probe = spi_pci_probe,
149 .remove = __devexit_p(spi_pci_remove),
150 .suspend = spi_suspend,
151 .resume = spi_resume,
152};
153
154static int __init mrst_spi_init(void)
155{
156 return pci_register_driver(&dw_spi_driver);
157}
158
159static void __exit mrst_spi_exit(void)
160{
161 pci_unregister_driver(&dw_spi_driver);
162}
163
164module_init(mrst_spi_init);
165module_exit(mrst_spi_exit);
166
167MODULE_AUTHOR("Feng Tang <feng.tang@intel.com>");
168MODULE_DESCRIPTION("PCI interface driver for DW SPI Core");
169MODULE_LICENSE("GPL v2");
diff --git a/drivers/spi/spi_bfin5xx.c b/drivers/spi/spi_bfin5xx.c
index 73e24ef5a2f9..1d41058bbab2 100644
--- a/drivers/spi/spi_bfin5xx.c
+++ b/drivers/spi/spi_bfin5xx.c
@@ -1294,7 +1294,7 @@ static int __init bfin_spi_probe(struct platform_device *pdev)
1294 goto out_error_get_res; 1294 goto out_error_get_res;
1295 } 1295 }
1296 1296
1297 drv_data->regs_base = ioremap(res->start, (res->end - res->start + 1)); 1297 drv_data->regs_base = ioremap(res->start, resource_size(res));
1298 if (drv_data->regs_base == NULL) { 1298 if (drv_data->regs_base == NULL) {
1299 dev_err(dev, "Cannot map IO\n"); 1299 dev_err(dev, "Cannot map IO\n");
1300 status = -ENXIO; 1300 status = -ENXIO;
diff --git a/drivers/spi/spi_mpc8xxx.c b/drivers/spi/spi_mpc8xxx.c
index e9390d747bfc..1fb2a6ea328c 100644
--- a/drivers/spi/spi_mpc8xxx.c
+++ b/drivers/spi/spi_mpc8xxx.c
@@ -1013,7 +1013,7 @@ mpc8xxx_spi_probe(struct device *dev, struct resource *mem, unsigned int irq)
1013 1013
1014 init_completion(&mpc8xxx_spi->done); 1014 init_completion(&mpc8xxx_spi->done);
1015 1015
1016 mpc8xxx_spi->base = ioremap(mem->start, mem->end - mem->start + 1); 1016 mpc8xxx_spi->base = ioremap(mem->start, resource_size(mem));
1017 if (mpc8xxx_spi->base == NULL) { 1017 if (mpc8xxx_spi->base == NULL) {
1018 ret = -ENOMEM; 1018 ret = -ENOMEM;
1019 goto err_ioremap; 1019 goto err_ioremap;
diff --git a/drivers/spi/spi_s3c24xx.c b/drivers/spi/spi_s3c24xx.c
index 276591569c8b..c010733877ae 100644
--- a/drivers/spi/spi_s3c24xx.c
+++ b/drivers/spi/spi_s3c24xx.c
@@ -1,7 +1,7 @@
1/* linux/drivers/spi/spi_s3c24xx.c 1/* linux/drivers/spi/spi_s3c24xx.c
2 * 2 *
3 * Copyright (c) 2006 Ben Dooks 3 * Copyright (c) 2006 Ben Dooks
4 * Copyright (c) 2006 Simtec Electronics 4 * Copyright 2006-2009 Simtec Electronics
5 * Ben Dooks <ben@simtec.co.uk> 5 * Ben Dooks <ben@simtec.co.uk>
6 * 6 *
7 * This program is free software; you can redistribute it and/or modify 7 * This program is free software; you can redistribute it and/or modify
@@ -28,6 +28,11 @@
28#include <plat/regs-spi.h> 28#include <plat/regs-spi.h>
29#include <mach/spi.h> 29#include <mach/spi.h>
30 30
31#include <plat/fiq.h>
32#include <asm/fiq.h>
33
34#include "spi_s3c24xx_fiq.h"
35
31/** 36/**
32 * s3c24xx_spi_devstate - per device data 37 * s3c24xx_spi_devstate - per device data
33 * @hz: Last frequency calculated for @sppre field. 38 * @hz: Last frequency calculated for @sppre field.
@@ -42,6 +47,13 @@ struct s3c24xx_spi_devstate {
42 u8 sppre; 47 u8 sppre;
43}; 48};
44 49
50enum spi_fiq_mode {
51 FIQ_MODE_NONE = 0,
52 FIQ_MODE_TX = 1,
53 FIQ_MODE_RX = 2,
54 FIQ_MODE_TXRX = 3,
55};
56
45struct s3c24xx_spi { 57struct s3c24xx_spi {
46 /* bitbang has to be first */ 58 /* bitbang has to be first */
47 struct spi_bitbang bitbang; 59 struct spi_bitbang bitbang;
@@ -52,6 +64,11 @@ struct s3c24xx_spi {
52 int len; 64 int len;
53 int count; 65 int count;
54 66
67 struct fiq_handler fiq_handler;
68 enum spi_fiq_mode fiq_mode;
69 unsigned char fiq_inuse;
70 unsigned char fiq_claimed;
71
55 void (*set_cs)(struct s3c2410_spi_info *spi, 72 void (*set_cs)(struct s3c2410_spi_info *spi,
56 int cs, int pol); 73 int cs, int pol);
57 74
@@ -67,6 +84,7 @@ struct s3c24xx_spi {
67 struct s3c2410_spi_info *pdata; 84 struct s3c2410_spi_info *pdata;
68}; 85};
69 86
87
70#define SPCON_DEFAULT (S3C2410_SPCON_MSTR | S3C2410_SPCON_SMOD_INT) 88#define SPCON_DEFAULT (S3C2410_SPCON_MSTR | S3C2410_SPCON_SMOD_INT)
71#define SPPIN_DEFAULT (S3C2410_SPPIN_KEEP) 89#define SPPIN_DEFAULT (S3C2410_SPPIN_KEEP)
72 90
@@ -127,7 +145,7 @@ static int s3c24xx_spi_update_state(struct spi_device *spi,
127 } 145 }
128 146
129 if (spi->mode != cs->mode) { 147 if (spi->mode != cs->mode) {
130 u8 spcon = SPCON_DEFAULT; 148 u8 spcon = SPCON_DEFAULT | S3C2410_SPCON_ENSCK;
131 149
132 if (spi->mode & SPI_CPHA) 150 if (spi->mode & SPI_CPHA)
133 spcon |= S3C2410_SPCON_CPHA_FMTB; 151 spcon |= S3C2410_SPCON_CPHA_FMTB;
@@ -214,13 +232,196 @@ static inline unsigned int hw_txbyte(struct s3c24xx_spi *hw, int count)
214 return hw->tx ? hw->tx[count] : 0; 232 return hw->tx ? hw->tx[count] : 0;
215} 233}
216 234
235#ifdef CONFIG_SPI_S3C24XX_FIQ
236/* Support for FIQ based pseudo-DMA to improve the transfer speed.
237 *
238 * This code uses the assembly helper in spi_s3c24xx_spi.S which is
239 * used by the FIQ core to move data between main memory and the peripheral
240 * block. Since this is code running on the processor, there is no problem
241 * with cache coherency of the buffers, so we can use any buffer we like.
242 */
243
244/**
245 * struct spi_fiq_code - FIQ code and header
246 * @length: The length of the code fragment, excluding this header.
247 * @ack_offset: The offset from @data to the word to place the IRQ ACK bit at.
248 * @data: The code itself to install as a FIQ handler.
249 */
250struct spi_fiq_code {
251 u32 length;
252 u32 ack_offset;
253 u8 data[0];
254};
255
256extern struct spi_fiq_code s3c24xx_spi_fiq_txrx;
257extern struct spi_fiq_code s3c24xx_spi_fiq_tx;
258extern struct spi_fiq_code s3c24xx_spi_fiq_rx;
259
260/**
261 * ack_bit - turn IRQ into IRQ acknowledgement bit
262 * @irq: The interrupt number
263 *
264 * Returns the bit to write to the interrupt acknowledge register.
265 */
266static inline u32 ack_bit(unsigned int irq)
267{
268 return 1 << (irq - IRQ_EINT0);
269}
270
271/**
272 * s3c24xx_spi_tryfiq - attempt to claim and setup FIQ for transfer
273 * @hw: The hardware state.
274 *
275 * Claim the FIQ handler (only one can be active at any one time) and
276 * then setup the correct transfer code for this transfer.
277 *
278 * This call updates all the necessary state information if sucessful,
279 * so the caller does not need to do anything more than start the transfer
280 * as normal, since the IRQ will have been re-routed to the FIQ handler.
281*/
282void s3c24xx_spi_tryfiq(struct s3c24xx_spi *hw)
283{
284 struct pt_regs regs;
285 enum spi_fiq_mode mode;
286 struct spi_fiq_code *code;
287 int ret;
288
289 if (!hw->fiq_claimed) {
290 /* try and claim fiq if we haven't got it, and if not
291 * then return and simply use another transfer method */
292
293 ret = claim_fiq(&hw->fiq_handler);
294 if (ret)
295 return;
296 }
297
298 if (hw->tx && !hw->rx)
299 mode = FIQ_MODE_TX;
300 else if (hw->rx && !hw->tx)
301 mode = FIQ_MODE_RX;
302 else
303 mode = FIQ_MODE_TXRX;
304
305 regs.uregs[fiq_rspi] = (long)hw->regs;
306 regs.uregs[fiq_rrx] = (long)hw->rx;
307 regs.uregs[fiq_rtx] = (long)hw->tx + 1;
308 regs.uregs[fiq_rcount] = hw->len - 1;
309 regs.uregs[fiq_rirq] = (long)S3C24XX_VA_IRQ;
310
311 set_fiq_regs(&regs);
312
313 if (hw->fiq_mode != mode) {
314 u32 *ack_ptr;
315
316 hw->fiq_mode = mode;
317
318 switch (mode) {
319 case FIQ_MODE_TX:
320 code = &s3c24xx_spi_fiq_tx;
321 break;
322 case FIQ_MODE_RX:
323 code = &s3c24xx_spi_fiq_rx;
324 break;
325 case FIQ_MODE_TXRX:
326 code = &s3c24xx_spi_fiq_txrx;
327 break;
328 default:
329 code = NULL;
330 }
331
332 BUG_ON(!code);
333
334 ack_ptr = (u32 *)&code->data[code->ack_offset];
335 *ack_ptr = ack_bit(hw->irq);
336
337 set_fiq_handler(&code->data, code->length);
338 }
339
340 s3c24xx_set_fiq(hw->irq, true);
341
342 hw->fiq_mode = mode;
343 hw->fiq_inuse = 1;
344}
345
346/**
347 * s3c24xx_spi_fiqop - FIQ core code callback
348 * @pw: Data registered with the handler
349 * @release: Whether this is a release or a return.
350 *
351 * Called by the FIQ code when another module wants to use the FIQ, so
352 * return whether we are currently using this or not and then update our
353 * internal state.
354 */
355static int s3c24xx_spi_fiqop(void *pw, int release)
356{
357 struct s3c24xx_spi *hw = pw;
358 int ret = 0;
359
360 if (release) {
361 if (hw->fiq_inuse)
362 ret = -EBUSY;
363
364 /* note, we do not need to unroute the FIQ, as the FIQ
365 * vector code de-routes it to signal the end of transfer */
366
367 hw->fiq_mode = FIQ_MODE_NONE;
368 hw->fiq_claimed = 0;
369 } else {
370 hw->fiq_claimed = 1;
371 }
372
373 return ret;
374}
375
376/**
377 * s3c24xx_spi_initfiq - setup the information for the FIQ core
378 * @hw: The hardware state.
379 *
380 * Setup the fiq_handler block to pass to the FIQ core.
381 */
382static inline void s3c24xx_spi_initfiq(struct s3c24xx_spi *hw)
383{
384 hw->fiq_handler.dev_id = hw;
385 hw->fiq_handler.name = dev_name(hw->dev);
386 hw->fiq_handler.fiq_op = s3c24xx_spi_fiqop;
387}
388
389/**
390 * s3c24xx_spi_usefiq - return if we should be using FIQ.
391 * @hw: The hardware state.
392 *
393 * Return true if the platform data specifies whether this channel is
394 * allowed to use the FIQ.
395 */
396static inline bool s3c24xx_spi_usefiq(struct s3c24xx_spi *hw)
397{
398 return hw->pdata->use_fiq;
399}
400
401/**
402 * s3c24xx_spi_usingfiq - return if channel is using FIQ
403 * @spi: The hardware state.
404 *
405 * Return whether the channel is currently using the FIQ (separate from
406 * whether the FIQ is claimed).
407 */
408static inline bool s3c24xx_spi_usingfiq(struct s3c24xx_spi *spi)
409{
410 return spi->fiq_inuse;
411}
412#else
413
414static inline void s3c24xx_spi_initfiq(struct s3c24xx_spi *s) { }
415static inline void s3c24xx_spi_tryfiq(struct s3c24xx_spi *s) { }
416static inline bool s3c24xx_spi_usefiq(struct s3c24xx_spi *s) { return false; }
417static inline bool s3c24xx_spi_usingfiq(struct s3c24xx_spi *s) { return false; }
418
419#endif /* CONFIG_SPI_S3C24XX_FIQ */
420
217static int s3c24xx_spi_txrx(struct spi_device *spi, struct spi_transfer *t) 421static int s3c24xx_spi_txrx(struct spi_device *spi, struct spi_transfer *t)
218{ 422{
219 struct s3c24xx_spi *hw = to_hw(spi); 423 struct s3c24xx_spi *hw = to_hw(spi);
220 424
221 dev_dbg(&spi->dev, "txrx: tx %p, rx %p, len %d\n",
222 t->tx_buf, t->rx_buf, t->len);
223
224 hw->tx = t->tx_buf; 425 hw->tx = t->tx_buf;
225 hw->rx = t->rx_buf; 426 hw->rx = t->rx_buf;
226 hw->len = t->len; 427 hw->len = t->len;
@@ -228,11 +429,14 @@ static int s3c24xx_spi_txrx(struct spi_device *spi, struct spi_transfer *t)
228 429
229 init_completion(&hw->done); 430 init_completion(&hw->done);
230 431
432 hw->fiq_inuse = 0;
433 if (s3c24xx_spi_usefiq(hw) && t->len >= 3)
434 s3c24xx_spi_tryfiq(hw);
435
231 /* send the first byte */ 436 /* send the first byte */
232 writeb(hw_txbyte(hw, 0), hw->regs + S3C2410_SPTDAT); 437 writeb(hw_txbyte(hw, 0), hw->regs + S3C2410_SPTDAT);
233 438
234 wait_for_completion(&hw->done); 439 wait_for_completion(&hw->done);
235
236 return hw->count; 440 return hw->count;
237} 441}
238 442
@@ -254,17 +458,27 @@ static irqreturn_t s3c24xx_spi_irq(int irq, void *dev)
254 goto irq_done; 458 goto irq_done;
255 } 459 }
256 460
257 hw->count++; 461 if (!s3c24xx_spi_usingfiq(hw)) {
462 hw->count++;
258 463
259 if (hw->rx) 464 if (hw->rx)
260 hw->rx[count] = readb(hw->regs + S3C2410_SPRDAT); 465 hw->rx[count] = readb(hw->regs + S3C2410_SPRDAT);
261 466
262 count++; 467 count++;
468
469 if (count < hw->len)
470 writeb(hw_txbyte(hw, count), hw->regs + S3C2410_SPTDAT);
471 else
472 complete(&hw->done);
473 } else {
474 hw->count = hw->len;
475 hw->fiq_inuse = 0;
476
477 if (hw->rx)
478 hw->rx[hw->len-1] = readb(hw->regs + S3C2410_SPRDAT);
263 479
264 if (count < hw->len)
265 writeb(hw_txbyte(hw, count), hw->regs + S3C2410_SPTDAT);
266 else
267 complete(&hw->done); 480 complete(&hw->done);
481 }
268 482
269 irq_done: 483 irq_done:
270 return IRQ_HANDLED; 484 return IRQ_HANDLED;
@@ -322,6 +536,10 @@ static int __init s3c24xx_spi_probe(struct platform_device *pdev)
322 platform_set_drvdata(pdev, hw); 536 platform_set_drvdata(pdev, hw);
323 init_completion(&hw->done); 537 init_completion(&hw->done);
324 538
539 /* initialise fiq handler */
540
541 s3c24xx_spi_initfiq(hw);
542
325 /* setup the master state. */ 543 /* setup the master state. */
326 544
327 /* the spi->mode bits understood by this driver: */ 545 /* the spi->mode bits understood by this driver: */
diff --git a/drivers/spi/spi_s3c24xx_fiq.S b/drivers/spi/spi_s3c24xx_fiq.S
new file mode 100644
index 000000000000..3793cae361db
--- /dev/null
+++ b/drivers/spi/spi_s3c24xx_fiq.S
@@ -0,0 +1,116 @@
1/* linux/drivers/spi/spi_s3c24xx_fiq.S
2 *
3 * Copyright 2009 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 *
6 * S3C24XX SPI - FIQ pseudo-DMA transfer code
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#include <linux/linkage.h>
14#include <asm/assembler.h>
15
16#include <mach/map.h>
17#include <mach/regs-irq.h>
18#include <plat/regs-spi.h>
19
20#include "spi_s3c24xx_fiq.h"
21
22 .text
23
24 @ entry to these routines is as follows, with the register names
25 @ defined in fiq.h so that they can be shared with the C files which
26 @ setup the calling registers.
27 @
28 @ fiq_rirq The base of the IRQ registers to find S3C2410_SRCPND
29 @ fiq_rtmp Temporary register to hold tx/rx data
30 @ fiq_rspi The base of the SPI register block
31 @ fiq_rtx The tx buffer pointer
32 @ fiq_rrx The rx buffer pointer
33 @ fiq_rcount The number of bytes to move
34
35 @ each entry starts with a word entry of how long it is
36 @ and an offset to the irq acknowledgment word
37
38ENTRY(s3c24xx_spi_fiq_rx)
39s3c24xx_spi_fix_rx:
40 .word fiq_rx_end - fiq_rx_start
41 .word fiq_rx_irq_ack - fiq_rx_start
42fiq_rx_start:
43 ldr fiq_rtmp, fiq_rx_irq_ack
44 str fiq_rtmp, [ fiq_rirq, # S3C2410_SRCPND - S3C24XX_VA_IRQ ]
45
46 ldrb fiq_rtmp, [ fiq_rspi, # S3C2410_SPRDAT ]
47 strb fiq_rtmp, [ fiq_rrx ], #1
48
49 mov fiq_rtmp, #0xff
50 strb fiq_rtmp, [ fiq_rspi, # S3C2410_SPTDAT ]
51
52 subs fiq_rcount, fiq_rcount, #1
53 subnes pc, lr, #4 @@ return, still have work to do
54
55 @@ set IRQ controller so that next op will trigger IRQ
56 mov fiq_rtmp, #0
57 str fiq_rtmp, [ fiq_rirq, # S3C2410_INTMOD - S3C24XX_VA_IRQ ]
58 subs pc, lr, #4
59
60fiq_rx_irq_ack:
61 .word 0
62fiq_rx_end:
63
64ENTRY(s3c24xx_spi_fiq_txrx)
65s3c24xx_spi_fiq_txrx:
66 .word fiq_txrx_end - fiq_txrx_start
67 .word fiq_txrx_irq_ack - fiq_txrx_start
68fiq_txrx_start:
69
70 ldrb fiq_rtmp, [ fiq_rspi, # S3C2410_SPRDAT ]
71 strb fiq_rtmp, [ fiq_rrx ], #1
72
73 ldr fiq_rtmp, fiq_txrx_irq_ack
74 str fiq_rtmp, [ fiq_rirq, # S3C2410_SRCPND - S3C24XX_VA_IRQ ]
75
76 ldrb fiq_rtmp, [ fiq_rtx ], #1
77 strb fiq_rtmp, [ fiq_rspi, # S3C2410_SPTDAT ]
78
79 subs fiq_rcount, fiq_rcount, #1
80 subnes pc, lr, #4 @@ return, still have work to do
81
82 mov fiq_rtmp, #0
83 str fiq_rtmp, [ fiq_rirq, # S3C2410_INTMOD - S3C24XX_VA_IRQ ]
84 subs pc, lr, #4
85
86fiq_txrx_irq_ack:
87 .word 0
88
89fiq_txrx_end:
90
91ENTRY(s3c24xx_spi_fiq_tx)
92s3c24xx_spi_fix_tx:
93 .word fiq_tx_end - fiq_tx_start
94 .word fiq_tx_irq_ack - fiq_tx_start
95fiq_tx_start:
96 ldrb fiq_rtmp, [ fiq_rspi, # S3C2410_SPRDAT ]
97
98 ldr fiq_rtmp, fiq_tx_irq_ack
99 str fiq_rtmp, [ fiq_rirq, # S3C2410_SRCPND - S3C24XX_VA_IRQ ]
100
101 ldrb fiq_rtmp, [ fiq_rtx ], #1
102 strb fiq_rtmp, [ fiq_rspi, # S3C2410_SPTDAT ]
103
104 subs fiq_rcount, fiq_rcount, #1
105 subnes pc, lr, #4 @@ return, still have work to do
106
107 mov fiq_rtmp, #0
108 str fiq_rtmp, [ fiq_rirq, # S3C2410_INTMOD - S3C24XX_VA_IRQ ]
109 subs pc, lr, #4
110
111fiq_tx_irq_ack:
112 .word 0
113
114fiq_tx_end:
115
116 .end
diff --git a/drivers/spi/spi_s3c24xx_fiq.h b/drivers/spi/spi_s3c24xx_fiq.h
new file mode 100644
index 000000000000..a5950bb25b51
--- /dev/null
+++ b/drivers/spi/spi_s3c24xx_fiq.h
@@ -0,0 +1,26 @@
1/* linux/drivers/spi/spi_s3c24xx_fiq.h
2 *
3 * Copyright 2009 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 *
6 * S3C24XX SPI - FIQ pseudo-DMA transfer support
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13/* We have R8 through R13 to play with */
14
15#ifdef __ASSEMBLY__
16#define __REG_NR(x) r##x
17#else
18#define __REG_NR(x) (x)
19#endif
20
21#define fiq_rspi __REG_NR(8)
22#define fiq_rtmp __REG_NR(9)
23#define fiq_rrx __REG_NR(10)
24#define fiq_rtx __REG_NR(11)
25#define fiq_rcount __REG_NR(12)
26#define fiq_rirq __REG_NR(13)
diff --git a/drivers/spi/spi_s3c64xx.c b/drivers/spi/spi_s3c64xx.c
new file mode 100644
index 000000000000..88a456dba967
--- /dev/null
+++ b/drivers/spi/spi_s3c64xx.c
@@ -0,0 +1,1196 @@
1/* linux/drivers/spi/spi_s3c64xx.c
2 *
3 * Copyright (C) 2009 Samsung Electronics Ltd.
4 * Jaswinder Singh <jassi.brar@samsung.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19 */
20
21#include <linux/init.h>
22#include <linux/module.h>
23#include <linux/workqueue.h>
24#include <linux/delay.h>
25#include <linux/clk.h>
26#include <linux/dma-mapping.h>
27#include <linux/platform_device.h>
28#include <linux/spi/spi.h>
29
30#include <mach/dma.h>
31#include <plat/spi.h>
32
33/* Registers and bit-fields */
34
35#define S3C64XX_SPI_CH_CFG 0x00
36#define S3C64XX_SPI_CLK_CFG 0x04
37#define S3C64XX_SPI_MODE_CFG 0x08
38#define S3C64XX_SPI_SLAVE_SEL 0x0C
39#define S3C64XX_SPI_INT_EN 0x10
40#define S3C64XX_SPI_STATUS 0x14
41#define S3C64XX_SPI_TX_DATA 0x18
42#define S3C64XX_SPI_RX_DATA 0x1C
43#define S3C64XX_SPI_PACKET_CNT 0x20
44#define S3C64XX_SPI_PENDING_CLR 0x24
45#define S3C64XX_SPI_SWAP_CFG 0x28
46#define S3C64XX_SPI_FB_CLK 0x2C
47
48#define S3C64XX_SPI_CH_HS_EN (1<<6) /* High Speed Enable */
49#define S3C64XX_SPI_CH_SW_RST (1<<5)
50#define S3C64XX_SPI_CH_SLAVE (1<<4)
51#define S3C64XX_SPI_CPOL_L (1<<3)
52#define S3C64XX_SPI_CPHA_B (1<<2)
53#define S3C64XX_SPI_CH_RXCH_ON (1<<1)
54#define S3C64XX_SPI_CH_TXCH_ON (1<<0)
55
56#define S3C64XX_SPI_CLKSEL_SRCMSK (3<<9)
57#define S3C64XX_SPI_CLKSEL_SRCSHFT 9
58#define S3C64XX_SPI_ENCLK_ENABLE (1<<8)
59#define S3C64XX_SPI_PSR_MASK 0xff
60
61#define S3C64XX_SPI_MODE_CH_TSZ_BYTE (0<<29)
62#define S3C64XX_SPI_MODE_CH_TSZ_HALFWORD (1<<29)
63#define S3C64XX_SPI_MODE_CH_TSZ_WORD (2<<29)
64#define S3C64XX_SPI_MODE_CH_TSZ_MASK (3<<29)
65#define S3C64XX_SPI_MODE_BUS_TSZ_BYTE (0<<17)
66#define S3C64XX_SPI_MODE_BUS_TSZ_HALFWORD (1<<17)
67#define S3C64XX_SPI_MODE_BUS_TSZ_WORD (2<<17)
68#define S3C64XX_SPI_MODE_BUS_TSZ_MASK (3<<17)
69#define S3C64XX_SPI_MODE_RXDMA_ON (1<<2)
70#define S3C64XX_SPI_MODE_TXDMA_ON (1<<1)
71#define S3C64XX_SPI_MODE_4BURST (1<<0)
72
73#define S3C64XX_SPI_SLAVE_AUTO (1<<1)
74#define S3C64XX_SPI_SLAVE_SIG_INACT (1<<0)
75
76#define S3C64XX_SPI_ACT(c) writel(0, (c)->regs + S3C64XX_SPI_SLAVE_SEL)
77
78#define S3C64XX_SPI_DEACT(c) writel(S3C64XX_SPI_SLAVE_SIG_INACT, \
79 (c)->regs + S3C64XX_SPI_SLAVE_SEL)
80
81#define S3C64XX_SPI_INT_TRAILING_EN (1<<6)
82#define S3C64XX_SPI_INT_RX_OVERRUN_EN (1<<5)
83#define S3C64XX_SPI_INT_RX_UNDERRUN_EN (1<<4)
84#define S3C64XX_SPI_INT_TX_OVERRUN_EN (1<<3)
85#define S3C64XX_SPI_INT_TX_UNDERRUN_EN (1<<2)
86#define S3C64XX_SPI_INT_RX_FIFORDY_EN (1<<1)
87#define S3C64XX_SPI_INT_TX_FIFORDY_EN (1<<0)
88
89#define S3C64XX_SPI_ST_RX_OVERRUN_ERR (1<<5)
90#define S3C64XX_SPI_ST_RX_UNDERRUN_ERR (1<<4)
91#define S3C64XX_SPI_ST_TX_OVERRUN_ERR (1<<3)
92#define S3C64XX_SPI_ST_TX_UNDERRUN_ERR (1<<2)
93#define S3C64XX_SPI_ST_RX_FIFORDY (1<<1)
94#define S3C64XX_SPI_ST_TX_FIFORDY (1<<0)
95
96#define S3C64XX_SPI_PACKET_CNT_EN (1<<16)
97
98#define S3C64XX_SPI_PND_TX_UNDERRUN_CLR (1<<4)
99#define S3C64XX_SPI_PND_TX_OVERRUN_CLR (1<<3)
100#define S3C64XX_SPI_PND_RX_UNDERRUN_CLR (1<<2)
101#define S3C64XX_SPI_PND_RX_OVERRUN_CLR (1<<1)
102#define S3C64XX_SPI_PND_TRAILING_CLR (1<<0)
103
104#define S3C64XX_SPI_SWAP_RX_HALF_WORD (1<<7)
105#define S3C64XX_SPI_SWAP_RX_BYTE (1<<6)
106#define S3C64XX_SPI_SWAP_RX_BIT (1<<5)
107#define S3C64XX_SPI_SWAP_RX_EN (1<<4)
108#define S3C64XX_SPI_SWAP_TX_HALF_WORD (1<<3)
109#define S3C64XX_SPI_SWAP_TX_BYTE (1<<2)
110#define S3C64XX_SPI_SWAP_TX_BIT (1<<1)
111#define S3C64XX_SPI_SWAP_TX_EN (1<<0)
112
113#define S3C64XX_SPI_FBCLK_MSK (3<<0)
114
115#define S3C64XX_SPI_ST_TRLCNTZ(v, i) ((((v) >> (i)->rx_lvl_offset) & \
116 (((i)->fifo_lvl_mask + 1))) \
117 ? 1 : 0)
118
119#define S3C64XX_SPI_ST_TX_DONE(v, i) ((((v) >> (i)->rx_lvl_offset) & \
120 (((i)->fifo_lvl_mask + 1) << 1)) \
121 ? 1 : 0)
122#define TX_FIFO_LVL(v, i) (((v) >> 6) & (i)->fifo_lvl_mask)
123#define RX_FIFO_LVL(v, i) (((v) >> (i)->rx_lvl_offset) & (i)->fifo_lvl_mask)
124
125#define S3C64XX_SPI_MAX_TRAILCNT 0x3ff
126#define S3C64XX_SPI_TRAILCNT_OFF 19
127
128#define S3C64XX_SPI_TRAILCNT S3C64XX_SPI_MAX_TRAILCNT
129
130#define msecs_to_loops(t) (loops_per_jiffy / 1000 * HZ * t)
131
132#define SUSPND (1<<0)
133#define SPIBUSY (1<<1)
134#define RXBUSY (1<<2)
135#define TXBUSY (1<<3)
136
137/**
138 * struct s3c64xx_spi_driver_data - Runtime info holder for SPI driver.
139 * @clk: Pointer to the spi clock.
140 * @master: Pointer to the SPI Protocol master.
141 * @workqueue: Work queue for the SPI xfer requests.
142 * @cntrlr_info: Platform specific data for the controller this driver manages.
143 * @tgl_spi: Pointer to the last CS left untoggled by the cs_change hint.
144 * @work: Work
145 * @queue: To log SPI xfer requests.
146 * @lock: Controller specific lock.
147 * @state: Set of FLAGS to indicate status.
148 * @rx_dmach: Controller's DMA channel for Rx.
149 * @tx_dmach: Controller's DMA channel for Tx.
150 * @sfr_start: BUS address of SPI controller regs.
151 * @regs: Pointer to ioremap'ed controller registers.
152 * @xfer_completion: To indicate completion of xfer task.
153 * @cur_mode: Stores the active configuration of the controller.
154 * @cur_bpw: Stores the active bits per word settings.
155 * @cur_speed: Stores the active xfer clock speed.
156 */
157struct s3c64xx_spi_driver_data {
158 void __iomem *regs;
159 struct clk *clk;
160 struct platform_device *pdev;
161 struct spi_master *master;
162 struct workqueue_struct *workqueue;
163 struct s3c64xx_spi_cntrlr_info *cntrlr_info;
164 struct spi_device *tgl_spi;
165 struct work_struct work;
166 struct list_head queue;
167 spinlock_t lock;
168 enum dma_ch rx_dmach;
169 enum dma_ch tx_dmach;
170 unsigned long sfr_start;
171 struct completion xfer_completion;
172 unsigned state;
173 unsigned cur_mode, cur_bpw;
174 unsigned cur_speed;
175};
176
177static struct s3c2410_dma_client s3c64xx_spi_dma_client = {
178 .name = "samsung-spi-dma",
179};
180
181static void flush_fifo(struct s3c64xx_spi_driver_data *sdd)
182{
183 struct s3c64xx_spi_cntrlr_info *sci = sdd->cntrlr_info;
184 void __iomem *regs = sdd->regs;
185 unsigned long loops;
186 u32 val;
187
188 writel(0, regs + S3C64XX_SPI_PACKET_CNT);
189
190 val = readl(regs + S3C64XX_SPI_CH_CFG);
191 val |= S3C64XX_SPI_CH_SW_RST;
192 val &= ~S3C64XX_SPI_CH_HS_EN;
193 writel(val, regs + S3C64XX_SPI_CH_CFG);
194
195 /* Flush TxFIFO*/
196 loops = msecs_to_loops(1);
197 do {
198 val = readl(regs + S3C64XX_SPI_STATUS);
199 } while (TX_FIFO_LVL(val, sci) && loops--);
200
201 /* Flush RxFIFO*/
202 loops = msecs_to_loops(1);
203 do {
204 val = readl(regs + S3C64XX_SPI_STATUS);
205 if (RX_FIFO_LVL(val, sci))
206 readl(regs + S3C64XX_SPI_RX_DATA);
207 else
208 break;
209 } while (loops--);
210
211 val = readl(regs + S3C64XX_SPI_CH_CFG);
212 val &= ~S3C64XX_SPI_CH_SW_RST;
213 writel(val, regs + S3C64XX_SPI_CH_CFG);
214
215 val = readl(regs + S3C64XX_SPI_MODE_CFG);
216 val &= ~(S3C64XX_SPI_MODE_TXDMA_ON | S3C64XX_SPI_MODE_RXDMA_ON);
217 writel(val, regs + S3C64XX_SPI_MODE_CFG);
218
219 val = readl(regs + S3C64XX_SPI_CH_CFG);
220 val &= ~(S3C64XX_SPI_CH_RXCH_ON | S3C64XX_SPI_CH_TXCH_ON);
221 writel(val, regs + S3C64XX_SPI_CH_CFG);
222}
223
224static void enable_datapath(struct s3c64xx_spi_driver_data *sdd,
225 struct spi_device *spi,
226 struct spi_transfer *xfer, int dma_mode)
227{
228 struct s3c64xx_spi_cntrlr_info *sci = sdd->cntrlr_info;
229 void __iomem *regs = sdd->regs;
230 u32 modecfg, chcfg;
231
232 modecfg = readl(regs + S3C64XX_SPI_MODE_CFG);
233 modecfg &= ~(S3C64XX_SPI_MODE_TXDMA_ON | S3C64XX_SPI_MODE_RXDMA_ON);
234
235 chcfg = readl(regs + S3C64XX_SPI_CH_CFG);
236 chcfg &= ~S3C64XX_SPI_CH_TXCH_ON;
237
238 if (dma_mode) {
239 chcfg &= ~S3C64XX_SPI_CH_RXCH_ON;
240 } else {
241 /* Always shift in data in FIFO, even if xfer is Tx only,
242 * this helps setting PCKT_CNT value for generating clocks
243 * as exactly needed.
244 */
245 chcfg |= S3C64XX_SPI_CH_RXCH_ON;
246 writel(((xfer->len * 8 / sdd->cur_bpw) & 0xffff)
247 | S3C64XX_SPI_PACKET_CNT_EN,
248 regs + S3C64XX_SPI_PACKET_CNT);
249 }
250
251 if (xfer->tx_buf != NULL) {
252 sdd->state |= TXBUSY;
253 chcfg |= S3C64XX_SPI_CH_TXCH_ON;
254 if (dma_mode) {
255 modecfg |= S3C64XX_SPI_MODE_TXDMA_ON;
256 s3c2410_dma_config(sdd->tx_dmach, 1);
257 s3c2410_dma_enqueue(sdd->tx_dmach, (void *)sdd,
258 xfer->tx_dma, xfer->len);
259 s3c2410_dma_ctrl(sdd->tx_dmach, S3C2410_DMAOP_START);
260 } else {
261 unsigned char *buf = (unsigned char *) xfer->tx_buf;
262 int i = 0;
263 while (i < xfer->len)
264 writeb(buf[i++], regs + S3C64XX_SPI_TX_DATA);
265 }
266 }
267
268 if (xfer->rx_buf != NULL) {
269 sdd->state |= RXBUSY;
270
271 if (sci->high_speed && sdd->cur_speed >= 30000000UL
272 && !(sdd->cur_mode & SPI_CPHA))
273 chcfg |= S3C64XX_SPI_CH_HS_EN;
274
275 if (dma_mode) {
276 modecfg |= S3C64XX_SPI_MODE_RXDMA_ON;
277 chcfg |= S3C64XX_SPI_CH_RXCH_ON;
278 writel(((xfer->len * 8 / sdd->cur_bpw) & 0xffff)
279 | S3C64XX_SPI_PACKET_CNT_EN,
280 regs + S3C64XX_SPI_PACKET_CNT);
281 s3c2410_dma_config(sdd->rx_dmach, 1);
282 s3c2410_dma_enqueue(sdd->rx_dmach, (void *)sdd,
283 xfer->rx_dma, xfer->len);
284 s3c2410_dma_ctrl(sdd->rx_dmach, S3C2410_DMAOP_START);
285 }
286 }
287
288 writel(modecfg, regs + S3C64XX_SPI_MODE_CFG);
289 writel(chcfg, regs + S3C64XX_SPI_CH_CFG);
290}
291
292static inline void enable_cs(struct s3c64xx_spi_driver_data *sdd,
293 struct spi_device *spi)
294{
295 struct s3c64xx_spi_csinfo *cs;
296
297 if (sdd->tgl_spi != NULL) { /* If last device toggled after mssg */
298 if (sdd->tgl_spi != spi) { /* if last mssg on diff device */
299 /* Deselect the last toggled device */
300 cs = sdd->tgl_spi->controller_data;
301 cs->set_level(spi->mode & SPI_CS_HIGH ? 0 : 1);
302 }
303 sdd->tgl_spi = NULL;
304 }
305
306 cs = spi->controller_data;
307 cs->set_level(spi->mode & SPI_CS_HIGH ? 1 : 0);
308}
309
310static int wait_for_xfer(struct s3c64xx_spi_driver_data *sdd,
311 struct spi_transfer *xfer, int dma_mode)
312{
313 struct s3c64xx_spi_cntrlr_info *sci = sdd->cntrlr_info;
314 void __iomem *regs = sdd->regs;
315 unsigned long val;
316 int ms;
317
318 /* millisecs to xfer 'len' bytes @ 'cur_speed' */
319 ms = xfer->len * 8 * 1000 / sdd->cur_speed;
320 ms += 5; /* some tolerance */
321
322 if (dma_mode) {
323 val = msecs_to_jiffies(ms) + 10;
324 val = wait_for_completion_timeout(&sdd->xfer_completion, val);
325 } else {
326 val = msecs_to_loops(ms);
327 do {
328 val = readl(regs + S3C64XX_SPI_STATUS);
329 } while (RX_FIFO_LVL(val, sci) < xfer->len && --val);
330 }
331
332 if (!val)
333 return -EIO;
334
335 if (dma_mode) {
336 u32 status;
337
338 /*
339 * DmaTx returns after simply writing data in the FIFO,
340 * w/o waiting for real transmission on the bus to finish.
341 * DmaRx returns only after Dma read data from FIFO which
342 * needs bus transmission to finish, so we don't worry if
343 * Xfer involved Rx(with or without Tx).
344 */
345 if (xfer->rx_buf == NULL) {
346 val = msecs_to_loops(10);
347 status = readl(regs + S3C64XX_SPI_STATUS);
348 while ((TX_FIFO_LVL(status, sci)
349 || !S3C64XX_SPI_ST_TX_DONE(status, sci))
350 && --val) {
351 cpu_relax();
352 status = readl(regs + S3C64XX_SPI_STATUS);
353 }
354
355 if (!val)
356 return -EIO;
357 }
358 } else {
359 unsigned char *buf;
360 int i;
361
362 /* If it was only Tx */
363 if (xfer->rx_buf == NULL) {
364 sdd->state &= ~TXBUSY;
365 return 0;
366 }
367
368 i = 0;
369 buf = xfer->rx_buf;
370 while (i < xfer->len)
371 buf[i++] = readb(regs + S3C64XX_SPI_RX_DATA);
372
373 sdd->state &= ~RXBUSY;
374 }
375
376 return 0;
377}
378
379static inline void disable_cs(struct s3c64xx_spi_driver_data *sdd,
380 struct spi_device *spi)
381{
382 struct s3c64xx_spi_csinfo *cs = spi->controller_data;
383
384 if (sdd->tgl_spi == spi)
385 sdd->tgl_spi = NULL;
386
387 cs->set_level(spi->mode & SPI_CS_HIGH ? 0 : 1);
388}
389
390static void s3c64xx_spi_config(struct s3c64xx_spi_driver_data *sdd)
391{
392 struct s3c64xx_spi_cntrlr_info *sci = sdd->cntrlr_info;
393 void __iomem *regs = sdd->regs;
394 u32 val;
395
396 /* Disable Clock */
397 val = readl(regs + S3C64XX_SPI_CLK_CFG);
398 val &= ~S3C64XX_SPI_ENCLK_ENABLE;
399 writel(val, regs + S3C64XX_SPI_CLK_CFG);
400
401 /* Set Polarity and Phase */
402 val = readl(regs + S3C64XX_SPI_CH_CFG);
403 val &= ~(S3C64XX_SPI_CH_SLAVE |
404 S3C64XX_SPI_CPOL_L |
405 S3C64XX_SPI_CPHA_B);
406
407 if (sdd->cur_mode & SPI_CPOL)
408 val |= S3C64XX_SPI_CPOL_L;
409
410 if (sdd->cur_mode & SPI_CPHA)
411 val |= S3C64XX_SPI_CPHA_B;
412
413 writel(val, regs + S3C64XX_SPI_CH_CFG);
414
415 /* Set Channel & DMA Mode */
416 val = readl(regs + S3C64XX_SPI_MODE_CFG);
417 val &= ~(S3C64XX_SPI_MODE_BUS_TSZ_MASK
418 | S3C64XX_SPI_MODE_CH_TSZ_MASK);
419
420 switch (sdd->cur_bpw) {
421 case 32:
422 val |= S3C64XX_SPI_MODE_BUS_TSZ_WORD;
423 break;
424 case 16:
425 val |= S3C64XX_SPI_MODE_BUS_TSZ_HALFWORD;
426 break;
427 default:
428 val |= S3C64XX_SPI_MODE_BUS_TSZ_BYTE;
429 break;
430 }
431 val |= S3C64XX_SPI_MODE_CH_TSZ_BYTE; /* Always 8bits wide */
432
433 writel(val, regs + S3C64XX_SPI_MODE_CFG);
434
435 /* Configure Clock */
436 val = readl(regs + S3C64XX_SPI_CLK_CFG);
437 val &= ~S3C64XX_SPI_PSR_MASK;
438 val |= ((clk_get_rate(sci->src_clk) / sdd->cur_speed / 2 - 1)
439 & S3C64XX_SPI_PSR_MASK);
440 writel(val, regs + S3C64XX_SPI_CLK_CFG);
441
442 /* Enable Clock */
443 val = readl(regs + S3C64XX_SPI_CLK_CFG);
444 val |= S3C64XX_SPI_ENCLK_ENABLE;
445 writel(val, regs + S3C64XX_SPI_CLK_CFG);
446}
447
448void s3c64xx_spi_dma_rxcb(struct s3c2410_dma_chan *chan, void *buf_id,
449 int size, enum s3c2410_dma_buffresult res)
450{
451 struct s3c64xx_spi_driver_data *sdd = buf_id;
452 unsigned long flags;
453
454 spin_lock_irqsave(&sdd->lock, flags);
455
456 if (res == S3C2410_RES_OK)
457 sdd->state &= ~RXBUSY;
458 else
459 dev_err(&sdd->pdev->dev, "DmaAbrtRx-%d\n", size);
460
461 /* If the other done */
462 if (!(sdd->state & TXBUSY))
463 complete(&sdd->xfer_completion);
464
465 spin_unlock_irqrestore(&sdd->lock, flags);
466}
467
468void s3c64xx_spi_dma_txcb(struct s3c2410_dma_chan *chan, void *buf_id,
469 int size, enum s3c2410_dma_buffresult res)
470{
471 struct s3c64xx_spi_driver_data *sdd = buf_id;
472 unsigned long flags;
473
474 spin_lock_irqsave(&sdd->lock, flags);
475
476 if (res == S3C2410_RES_OK)
477 sdd->state &= ~TXBUSY;
478 else
479 dev_err(&sdd->pdev->dev, "DmaAbrtTx-%d \n", size);
480
481 /* If the other done */
482 if (!(sdd->state & RXBUSY))
483 complete(&sdd->xfer_completion);
484
485 spin_unlock_irqrestore(&sdd->lock, flags);
486}
487
488#define XFER_DMAADDR_INVALID DMA_BIT_MASK(32)
489
490static int s3c64xx_spi_map_mssg(struct s3c64xx_spi_driver_data *sdd,
491 struct spi_message *msg)
492{
493 struct device *dev = &sdd->pdev->dev;
494 struct spi_transfer *xfer;
495
496 if (msg->is_dma_mapped)
497 return 0;
498
499 /* First mark all xfer unmapped */
500 list_for_each_entry(xfer, &msg->transfers, transfer_list) {
501 xfer->rx_dma = XFER_DMAADDR_INVALID;
502 xfer->tx_dma = XFER_DMAADDR_INVALID;
503 }
504
505 /* Map until end or first fail */
506 list_for_each_entry(xfer, &msg->transfers, transfer_list) {
507
508 if (xfer->tx_buf != NULL) {
509 xfer->tx_dma = dma_map_single(dev, xfer->tx_buf,
510 xfer->len, DMA_TO_DEVICE);
511 if (dma_mapping_error(dev, xfer->tx_dma)) {
512 dev_err(dev, "dma_map_single Tx failed\n");
513 xfer->tx_dma = XFER_DMAADDR_INVALID;
514 return -ENOMEM;
515 }
516 }
517
518 if (xfer->rx_buf != NULL) {
519 xfer->rx_dma = dma_map_single(dev, xfer->rx_buf,
520 xfer->len, DMA_FROM_DEVICE);
521 if (dma_mapping_error(dev, xfer->rx_dma)) {
522 dev_err(dev, "dma_map_single Rx failed\n");
523 dma_unmap_single(dev, xfer->tx_dma,
524 xfer->len, DMA_TO_DEVICE);
525 xfer->tx_dma = XFER_DMAADDR_INVALID;
526 xfer->rx_dma = XFER_DMAADDR_INVALID;
527 return -ENOMEM;
528 }
529 }
530 }
531
532 return 0;
533}
534
535static void s3c64xx_spi_unmap_mssg(struct s3c64xx_spi_driver_data *sdd,
536 struct spi_message *msg)
537{
538 struct device *dev = &sdd->pdev->dev;
539 struct spi_transfer *xfer;
540
541 if (msg->is_dma_mapped)
542 return;
543
544 list_for_each_entry(xfer, &msg->transfers, transfer_list) {
545
546 if (xfer->rx_buf != NULL
547 && xfer->rx_dma != XFER_DMAADDR_INVALID)
548 dma_unmap_single(dev, xfer->rx_dma,
549 xfer->len, DMA_FROM_DEVICE);
550
551 if (xfer->tx_buf != NULL
552 && xfer->tx_dma != XFER_DMAADDR_INVALID)
553 dma_unmap_single(dev, xfer->tx_dma,
554 xfer->len, DMA_TO_DEVICE);
555 }
556}
557
558static void handle_msg(struct s3c64xx_spi_driver_data *sdd,
559 struct spi_message *msg)
560{
561 struct s3c64xx_spi_cntrlr_info *sci = sdd->cntrlr_info;
562 struct spi_device *spi = msg->spi;
563 struct s3c64xx_spi_csinfo *cs = spi->controller_data;
564 struct spi_transfer *xfer;
565 int status = 0, cs_toggle = 0;
566 u32 speed;
567 u8 bpw;
568
569 /* If Master's(controller) state differs from that needed by Slave */
570 if (sdd->cur_speed != spi->max_speed_hz
571 || sdd->cur_mode != spi->mode
572 || sdd->cur_bpw != spi->bits_per_word) {
573 sdd->cur_bpw = spi->bits_per_word;
574 sdd->cur_speed = spi->max_speed_hz;
575 sdd->cur_mode = spi->mode;
576 s3c64xx_spi_config(sdd);
577 }
578
579 /* Map all the transfers if needed */
580 if (s3c64xx_spi_map_mssg(sdd, msg)) {
581 dev_err(&spi->dev,
582 "Xfer: Unable to map message buffers!\n");
583 status = -ENOMEM;
584 goto out;
585 }
586
587 /* Configure feedback delay */
588 writel(cs->fb_delay & 0x3, sdd->regs + S3C64XX_SPI_FB_CLK);
589
590 list_for_each_entry(xfer, &msg->transfers, transfer_list) {
591
592 unsigned long flags;
593 int use_dma;
594
595 INIT_COMPLETION(sdd->xfer_completion);
596
597 /* Only BPW and Speed may change across transfers */
598 bpw = xfer->bits_per_word ? : spi->bits_per_word;
599 speed = xfer->speed_hz ? : spi->max_speed_hz;
600
601 if (bpw != sdd->cur_bpw || speed != sdd->cur_speed) {
602 sdd->cur_bpw = bpw;
603 sdd->cur_speed = speed;
604 s3c64xx_spi_config(sdd);
605 }
606
607 /* Polling method for xfers not bigger than FIFO capacity */
608 if (xfer->len <= ((sci->fifo_lvl_mask >> 1) + 1))
609 use_dma = 0;
610 else
611 use_dma = 1;
612
613 spin_lock_irqsave(&sdd->lock, flags);
614
615 /* Pending only which is to be done */
616 sdd->state &= ~RXBUSY;
617 sdd->state &= ~TXBUSY;
618
619 enable_datapath(sdd, spi, xfer, use_dma);
620
621 /* Slave Select */
622 enable_cs(sdd, spi);
623
624 /* Start the signals */
625 S3C64XX_SPI_ACT(sdd);
626
627 spin_unlock_irqrestore(&sdd->lock, flags);
628
629 status = wait_for_xfer(sdd, xfer, use_dma);
630
631 /* Quiese the signals */
632 S3C64XX_SPI_DEACT(sdd);
633
634 if (status) {
635 dev_err(&spi->dev, "I/O Error: \
636 rx-%d tx-%d res:rx-%c tx-%c len-%d\n",
637 xfer->rx_buf ? 1 : 0, xfer->tx_buf ? 1 : 0,
638 (sdd->state & RXBUSY) ? 'f' : 'p',
639 (sdd->state & TXBUSY) ? 'f' : 'p',
640 xfer->len);
641
642 if (use_dma) {
643 if (xfer->tx_buf != NULL
644 && (sdd->state & TXBUSY))
645 s3c2410_dma_ctrl(sdd->tx_dmach,
646 S3C2410_DMAOP_FLUSH);
647 if (xfer->rx_buf != NULL
648 && (sdd->state & RXBUSY))
649 s3c2410_dma_ctrl(sdd->rx_dmach,
650 S3C2410_DMAOP_FLUSH);
651 }
652
653 goto out;
654 }
655
656 if (xfer->delay_usecs)
657 udelay(xfer->delay_usecs);
658
659 if (xfer->cs_change) {
660 /* Hint that the next mssg is gonna be
661 for the same device */
662 if (list_is_last(&xfer->transfer_list,
663 &msg->transfers))
664 cs_toggle = 1;
665 else
666 disable_cs(sdd, spi);
667 }
668
669 msg->actual_length += xfer->len;
670
671 flush_fifo(sdd);
672 }
673
674out:
675 if (!cs_toggle || status)
676 disable_cs(sdd, spi);
677 else
678 sdd->tgl_spi = spi;
679
680 s3c64xx_spi_unmap_mssg(sdd, msg);
681
682 msg->status = status;
683
684 if (msg->complete)
685 msg->complete(msg->context);
686}
687
688static int acquire_dma(struct s3c64xx_spi_driver_data *sdd)
689{
690 if (s3c2410_dma_request(sdd->rx_dmach,
691 &s3c64xx_spi_dma_client, NULL) < 0) {
692 dev_err(&sdd->pdev->dev, "cannot get RxDMA\n");
693 return 0;
694 }
695 s3c2410_dma_set_buffdone_fn(sdd->rx_dmach, s3c64xx_spi_dma_rxcb);
696 s3c2410_dma_devconfig(sdd->rx_dmach, S3C2410_DMASRC_HW,
697 sdd->sfr_start + S3C64XX_SPI_RX_DATA);
698
699 if (s3c2410_dma_request(sdd->tx_dmach,
700 &s3c64xx_spi_dma_client, NULL) < 0) {
701 dev_err(&sdd->pdev->dev, "cannot get TxDMA\n");
702 s3c2410_dma_free(sdd->rx_dmach, &s3c64xx_spi_dma_client);
703 return 0;
704 }
705 s3c2410_dma_set_buffdone_fn(sdd->tx_dmach, s3c64xx_spi_dma_txcb);
706 s3c2410_dma_devconfig(sdd->tx_dmach, S3C2410_DMASRC_MEM,
707 sdd->sfr_start + S3C64XX_SPI_TX_DATA);
708
709 return 1;
710}
711
712static void s3c64xx_spi_work(struct work_struct *work)
713{
714 struct s3c64xx_spi_driver_data *sdd = container_of(work,
715 struct s3c64xx_spi_driver_data, work);
716 unsigned long flags;
717
718 /* Acquire DMA channels */
719 while (!acquire_dma(sdd))
720 msleep(10);
721
722 spin_lock_irqsave(&sdd->lock, flags);
723
724 while (!list_empty(&sdd->queue)
725 && !(sdd->state & SUSPND)) {
726
727 struct spi_message *msg;
728
729 msg = container_of(sdd->queue.next, struct spi_message, queue);
730
731 list_del_init(&msg->queue);
732
733 /* Set Xfer busy flag */
734 sdd->state |= SPIBUSY;
735
736 spin_unlock_irqrestore(&sdd->lock, flags);
737
738 handle_msg(sdd, msg);
739
740 spin_lock_irqsave(&sdd->lock, flags);
741
742 sdd->state &= ~SPIBUSY;
743 }
744
745 spin_unlock_irqrestore(&sdd->lock, flags);
746
747 /* Free DMA channels */
748 s3c2410_dma_free(sdd->tx_dmach, &s3c64xx_spi_dma_client);
749 s3c2410_dma_free(sdd->rx_dmach, &s3c64xx_spi_dma_client);
750}
751
752static int s3c64xx_spi_transfer(struct spi_device *spi,
753 struct spi_message *msg)
754{
755 struct s3c64xx_spi_driver_data *sdd;
756 unsigned long flags;
757
758 sdd = spi_master_get_devdata(spi->master);
759
760 spin_lock_irqsave(&sdd->lock, flags);
761
762 if (sdd->state & SUSPND) {
763 spin_unlock_irqrestore(&sdd->lock, flags);
764 return -ESHUTDOWN;
765 }
766
767 msg->status = -EINPROGRESS;
768 msg->actual_length = 0;
769
770 list_add_tail(&msg->queue, &sdd->queue);
771
772 queue_work(sdd->workqueue, &sdd->work);
773
774 spin_unlock_irqrestore(&sdd->lock, flags);
775
776 return 0;
777}
778
779/*
780 * Here we only check the validity of requested configuration
781 * and save the configuration in a local data-structure.
782 * The controller is actually configured only just before we
783 * get a message to transfer.
784 */
785static int s3c64xx_spi_setup(struct spi_device *spi)
786{
787 struct s3c64xx_spi_csinfo *cs = spi->controller_data;
788 struct s3c64xx_spi_driver_data *sdd;
789 struct s3c64xx_spi_cntrlr_info *sci;
790 struct spi_message *msg;
791 u32 psr, speed;
792 unsigned long flags;
793 int err = 0;
794
795 if (cs == NULL || cs->set_level == NULL) {
796 dev_err(&spi->dev, "No CS for SPI(%d)\n", spi->chip_select);
797 return -ENODEV;
798 }
799
800 sdd = spi_master_get_devdata(spi->master);
801 sci = sdd->cntrlr_info;
802
803 spin_lock_irqsave(&sdd->lock, flags);
804
805 list_for_each_entry(msg, &sdd->queue, queue) {
806 /* Is some mssg is already queued for this device */
807 if (msg->spi == spi) {
808 dev_err(&spi->dev,
809 "setup: attempt while mssg in queue!\n");
810 spin_unlock_irqrestore(&sdd->lock, flags);
811 return -EBUSY;
812 }
813 }
814
815 if (sdd->state & SUSPND) {
816 spin_unlock_irqrestore(&sdd->lock, flags);
817 dev_err(&spi->dev,
818 "setup: SPI-%d not active!\n", spi->master->bus_num);
819 return -ESHUTDOWN;
820 }
821
822 spin_unlock_irqrestore(&sdd->lock, flags);
823
824 if (spi->bits_per_word != 8
825 && spi->bits_per_word != 16
826 && spi->bits_per_word != 32) {
827 dev_err(&spi->dev, "setup: %dbits/wrd not supported!\n",
828 spi->bits_per_word);
829 err = -EINVAL;
830 goto setup_exit;
831 }
832
833 /* Check if we can provide the requested rate */
834 speed = clk_get_rate(sci->src_clk) / 2 / (0 + 1); /* Max possible */
835
836 if (spi->max_speed_hz > speed)
837 spi->max_speed_hz = speed;
838
839 psr = clk_get_rate(sci->src_clk) / 2 / spi->max_speed_hz - 1;
840 psr &= S3C64XX_SPI_PSR_MASK;
841 if (psr == S3C64XX_SPI_PSR_MASK)
842 psr--;
843
844 speed = clk_get_rate(sci->src_clk) / 2 / (psr + 1);
845 if (spi->max_speed_hz < speed) {
846 if (psr+1 < S3C64XX_SPI_PSR_MASK) {
847 psr++;
848 } else {
849 err = -EINVAL;
850 goto setup_exit;
851 }
852 }
853
854 speed = clk_get_rate(sci->src_clk) / 2 / (psr + 1);
855 if (spi->max_speed_hz >= speed)
856 spi->max_speed_hz = speed;
857 else
858 err = -EINVAL;
859
860setup_exit:
861
862 /* setup() returns with device de-selected */
863 disable_cs(sdd, spi);
864
865 return err;
866}
867
868static void s3c64xx_spi_hwinit(struct s3c64xx_spi_driver_data *sdd, int channel)
869{
870 struct s3c64xx_spi_cntrlr_info *sci = sdd->cntrlr_info;
871 void __iomem *regs = sdd->regs;
872 unsigned int val;
873
874 sdd->cur_speed = 0;
875
876 S3C64XX_SPI_DEACT(sdd);
877
878 /* Disable Interrupts - we use Polling if not DMA mode */
879 writel(0, regs + S3C64XX_SPI_INT_EN);
880
881 writel(sci->src_clk_nr << S3C64XX_SPI_CLKSEL_SRCSHFT,
882 regs + S3C64XX_SPI_CLK_CFG);
883 writel(0, regs + S3C64XX_SPI_MODE_CFG);
884 writel(0, regs + S3C64XX_SPI_PACKET_CNT);
885
886 /* Clear any irq pending bits */
887 writel(readl(regs + S3C64XX_SPI_PENDING_CLR),
888 regs + S3C64XX_SPI_PENDING_CLR);
889
890 writel(0, regs + S3C64XX_SPI_SWAP_CFG);
891
892 val = readl(regs + S3C64XX_SPI_MODE_CFG);
893 val &= ~S3C64XX_SPI_MODE_4BURST;
894 val &= ~(S3C64XX_SPI_MAX_TRAILCNT << S3C64XX_SPI_TRAILCNT_OFF);
895 val |= (S3C64XX_SPI_TRAILCNT << S3C64XX_SPI_TRAILCNT_OFF);
896 writel(val, regs + S3C64XX_SPI_MODE_CFG);
897
898 flush_fifo(sdd);
899}
900
901static int __init s3c64xx_spi_probe(struct platform_device *pdev)
902{
903 struct resource *mem_res, *dmatx_res, *dmarx_res;
904 struct s3c64xx_spi_driver_data *sdd;
905 struct s3c64xx_spi_cntrlr_info *sci;
906 struct spi_master *master;
907 int ret;
908
909 if (pdev->id < 0) {
910 dev_err(&pdev->dev,
911 "Invalid platform device id-%d\n", pdev->id);
912 return -ENODEV;
913 }
914
915 if (pdev->dev.platform_data == NULL) {
916 dev_err(&pdev->dev, "platform_data missing!\n");
917 return -ENODEV;
918 }
919
920 /* Check for availability of necessary resource */
921
922 dmatx_res = platform_get_resource(pdev, IORESOURCE_DMA, 0);
923 if (dmatx_res == NULL) {
924 dev_err(&pdev->dev, "Unable to get SPI-Tx dma resource\n");
925 return -ENXIO;
926 }
927
928 dmarx_res = platform_get_resource(pdev, IORESOURCE_DMA, 1);
929 if (dmarx_res == NULL) {
930 dev_err(&pdev->dev, "Unable to get SPI-Rx dma resource\n");
931 return -ENXIO;
932 }
933
934 mem_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
935 if (mem_res == NULL) {
936 dev_err(&pdev->dev, "Unable to get SPI MEM resource\n");
937 return -ENXIO;
938 }
939
940 master = spi_alloc_master(&pdev->dev,
941 sizeof(struct s3c64xx_spi_driver_data));
942 if (master == NULL) {
943 dev_err(&pdev->dev, "Unable to allocate SPI Master\n");
944 return -ENOMEM;
945 }
946
947 sci = pdev->dev.platform_data;
948
949 platform_set_drvdata(pdev, master);
950
951 sdd = spi_master_get_devdata(master);
952 sdd->master = master;
953 sdd->cntrlr_info = sci;
954 sdd->pdev = pdev;
955 sdd->sfr_start = mem_res->start;
956 sdd->tx_dmach = dmatx_res->start;
957 sdd->rx_dmach = dmarx_res->start;
958
959 sdd->cur_bpw = 8;
960
961 master->bus_num = pdev->id;
962 master->setup = s3c64xx_spi_setup;
963 master->transfer = s3c64xx_spi_transfer;
964 master->num_chipselect = sci->num_cs;
965 master->dma_alignment = 8;
966 /* the spi->mode bits understood by this driver: */
967 master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH;
968
969 if (request_mem_region(mem_res->start,
970 resource_size(mem_res), pdev->name) == NULL) {
971 dev_err(&pdev->dev, "Req mem region failed\n");
972 ret = -ENXIO;
973 goto err0;
974 }
975
976 sdd->regs = ioremap(mem_res->start, resource_size(mem_res));
977 if (sdd->regs == NULL) {
978 dev_err(&pdev->dev, "Unable to remap IO\n");
979 ret = -ENXIO;
980 goto err1;
981 }
982
983 if (sci->cfg_gpio == NULL || sci->cfg_gpio(pdev)) {
984 dev_err(&pdev->dev, "Unable to config gpio\n");
985 ret = -EBUSY;
986 goto err2;
987 }
988
989 /* Setup clocks */
990 sdd->clk = clk_get(&pdev->dev, "spi");
991 if (IS_ERR(sdd->clk)) {
992 dev_err(&pdev->dev, "Unable to acquire clock 'spi'\n");
993 ret = PTR_ERR(sdd->clk);
994 goto err3;
995 }
996
997 if (clk_enable(sdd->clk)) {
998 dev_err(&pdev->dev, "Couldn't enable clock 'spi'\n");
999 ret = -EBUSY;
1000 goto err4;
1001 }
1002
1003 if (sci->src_clk_nr == S3C64XX_SPI_SRCCLK_PCLK)
1004 sci->src_clk = sdd->clk;
1005 else
1006 sci->src_clk = clk_get(&pdev->dev, sci->src_clk_name);
1007 if (IS_ERR(sci->src_clk)) {
1008 dev_err(&pdev->dev,
1009 "Unable to acquire clock '%s'\n", sci->src_clk_name);
1010 ret = PTR_ERR(sci->src_clk);
1011 goto err5;
1012 }
1013
1014 if (sci->src_clk != sdd->clk && clk_enable(sci->src_clk)) {
1015 dev_err(&pdev->dev, "Couldn't enable clock '%s'\n",
1016 sci->src_clk_name);
1017 ret = -EBUSY;
1018 goto err6;
1019 }
1020
1021 sdd->workqueue = create_singlethread_workqueue(
1022 dev_name(master->dev.parent));
1023 if (sdd->workqueue == NULL) {
1024 dev_err(&pdev->dev, "Unable to create workqueue\n");
1025 ret = -ENOMEM;
1026 goto err7;
1027 }
1028
1029 /* Setup Deufult Mode */
1030 s3c64xx_spi_hwinit(sdd, pdev->id);
1031
1032 spin_lock_init(&sdd->lock);
1033 init_completion(&sdd->xfer_completion);
1034 INIT_WORK(&sdd->work, s3c64xx_spi_work);
1035 INIT_LIST_HEAD(&sdd->queue);
1036
1037 if (spi_register_master(master)) {
1038 dev_err(&pdev->dev, "cannot register SPI master\n");
1039 ret = -EBUSY;
1040 goto err8;
1041 }
1042
1043 dev_dbg(&pdev->dev, "Samsung SoC SPI Driver loaded for Bus SPI-%d \
1044 with %d Slaves attached\n",
1045 pdev->id, master->num_chipselect);
1046 dev_dbg(&pdev->dev, "\tIOmem=[0x%x-0x%x]\
1047 \tDMA=[Rx-%d, Tx-%d]\n",
1048 mem_res->end, mem_res->start,
1049 sdd->rx_dmach, sdd->tx_dmach);
1050
1051 return 0;
1052
1053err8:
1054 destroy_workqueue(sdd->workqueue);
1055err7:
1056 if (sci->src_clk != sdd->clk)
1057 clk_disable(sci->src_clk);
1058err6:
1059 if (sci->src_clk != sdd->clk)
1060 clk_put(sci->src_clk);
1061err5:
1062 clk_disable(sdd->clk);
1063err4:
1064 clk_put(sdd->clk);
1065err3:
1066err2:
1067 iounmap((void *) sdd->regs);
1068err1:
1069 release_mem_region(mem_res->start, resource_size(mem_res));
1070err0:
1071 platform_set_drvdata(pdev, NULL);
1072 spi_master_put(master);
1073
1074 return ret;
1075}
1076
1077static int s3c64xx_spi_remove(struct platform_device *pdev)
1078{
1079 struct spi_master *master = spi_master_get(platform_get_drvdata(pdev));
1080 struct s3c64xx_spi_driver_data *sdd = spi_master_get_devdata(master);
1081 struct s3c64xx_spi_cntrlr_info *sci = sdd->cntrlr_info;
1082 struct resource *mem_res;
1083 unsigned long flags;
1084
1085 spin_lock_irqsave(&sdd->lock, flags);
1086 sdd->state |= SUSPND;
1087 spin_unlock_irqrestore(&sdd->lock, flags);
1088
1089 while (sdd->state & SPIBUSY)
1090 msleep(10);
1091
1092 spi_unregister_master(master);
1093
1094 destroy_workqueue(sdd->workqueue);
1095
1096 if (sci->src_clk != sdd->clk)
1097 clk_disable(sci->src_clk);
1098
1099 if (sci->src_clk != sdd->clk)
1100 clk_put(sci->src_clk);
1101
1102 clk_disable(sdd->clk);
1103 clk_put(sdd->clk);
1104
1105 iounmap((void *) sdd->regs);
1106
1107 mem_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1108 release_mem_region(mem_res->start, resource_size(mem_res));
1109
1110 platform_set_drvdata(pdev, NULL);
1111 spi_master_put(master);
1112
1113 return 0;
1114}
1115
1116#ifdef CONFIG_PM
1117static int s3c64xx_spi_suspend(struct platform_device *pdev, pm_message_t state)
1118{
1119 struct spi_master *master = spi_master_get(platform_get_drvdata(pdev));
1120 struct s3c64xx_spi_driver_data *sdd = spi_master_get_devdata(master);
1121 struct s3c64xx_spi_cntrlr_info *sci = sdd->cntrlr_info;
1122 struct s3c64xx_spi_csinfo *cs;
1123 unsigned long flags;
1124
1125 spin_lock_irqsave(&sdd->lock, flags);
1126 sdd->state |= SUSPND;
1127 spin_unlock_irqrestore(&sdd->lock, flags);
1128
1129 while (sdd->state & SPIBUSY)
1130 msleep(10);
1131
1132 /* Disable the clock */
1133 if (sci->src_clk != sdd->clk)
1134 clk_disable(sci->src_clk);
1135
1136 clk_disable(sdd->clk);
1137
1138 sdd->cur_speed = 0; /* Output Clock is stopped */
1139
1140 return 0;
1141}
1142
1143static int s3c64xx_spi_resume(struct platform_device *pdev)
1144{
1145 struct spi_master *master = spi_master_get(platform_get_drvdata(pdev));
1146 struct s3c64xx_spi_driver_data *sdd = spi_master_get_devdata(master);
1147 struct s3c64xx_spi_cntrlr_info *sci = sdd->cntrlr_info;
1148 unsigned long flags;
1149
1150 sci->cfg_gpio(pdev);
1151
1152 /* Enable the clock */
1153 if (sci->src_clk != sdd->clk)
1154 clk_enable(sci->src_clk);
1155
1156 clk_enable(sdd->clk);
1157
1158 s3c64xx_spi_hwinit(sdd, pdev->id);
1159
1160 spin_lock_irqsave(&sdd->lock, flags);
1161 sdd->state &= ~SUSPND;
1162 spin_unlock_irqrestore(&sdd->lock, flags);
1163
1164 return 0;
1165}
1166#else
1167#define s3c64xx_spi_suspend NULL
1168#define s3c64xx_spi_resume NULL
1169#endif /* CONFIG_PM */
1170
1171static struct platform_driver s3c64xx_spi_driver = {
1172 .driver = {
1173 .name = "s3c64xx-spi",
1174 .owner = THIS_MODULE,
1175 },
1176 .remove = s3c64xx_spi_remove,
1177 .suspend = s3c64xx_spi_suspend,
1178 .resume = s3c64xx_spi_resume,
1179};
1180MODULE_ALIAS("platform:s3c64xx-spi");
1181
1182static int __init s3c64xx_spi_init(void)
1183{
1184 return platform_driver_probe(&s3c64xx_spi_driver, s3c64xx_spi_probe);
1185}
1186module_init(s3c64xx_spi_init);
1187
1188static void __exit s3c64xx_spi_exit(void)
1189{
1190 platform_driver_unregister(&s3c64xx_spi_driver);
1191}
1192module_exit(s3c64xx_spi_exit);
1193
1194MODULE_AUTHOR("Jaswinder Singh <jassi.brar@samsung.com>");
1195MODULE_DESCRIPTION("S3C64XX SPI Controller Driver");
1196MODULE_LICENSE("GPL");
diff --git a/drivers/spi/spi_sh_msiof.c b/drivers/spi/spi_sh_msiof.c
index 51e5e1dfa6e5..30973ec16a93 100644
--- a/drivers/spi/spi_sh_msiof.c
+++ b/drivers/spi/spi_sh_msiof.c
@@ -173,15 +173,12 @@ static void sh_msiof_spi_set_pin_regs(struct sh_msiof_spi_priv *p,
173 int edge; 173 int edge;
174 174
175 /* 175 /*
176 * CPOL CPHA TSCKIZ RSCKIZ TEDG REDG(!) 176 * CPOL CPHA TSCKIZ RSCKIZ TEDG REDG
177 * 0 0 10 10 1 0 177 * 0 0 10 10 1 1
178 * 0 1 10 10 0 1 178 * 0 1 10 10 0 0
179 * 1 0 11 11 0 1 179 * 1 0 11 11 0 0
180 * 1 1 11 11 1 0 180 * 1 1 11 11 1 1
181 *
182 * (!) Note: REDG is inverted recommended data sheet setting
183 */ 181 */
184
185 sh_msiof_write(p, FCTR, 0); 182 sh_msiof_write(p, FCTR, 0);
186 sh_msiof_write(p, TMDR1, 0xe2000005 | (lsb_first << 24)); 183 sh_msiof_write(p, TMDR1, 0xe2000005 | (lsb_first << 24));
187 sh_msiof_write(p, RMDR1, 0x22000005 | (lsb_first << 24)); 184 sh_msiof_write(p, RMDR1, 0x22000005 | (lsb_first << 24));
@@ -193,7 +190,7 @@ static void sh_msiof_spi_set_pin_regs(struct sh_msiof_spi_priv *p,
193 edge = cpol ? cpha : !cpha; 190 edge = cpol ? cpha : !cpha;
194 191
195 tmp |= edge << 27; /* TEDG */ 192 tmp |= edge << 27; /* TEDG */
196 tmp |= !edge << 26; /* REDG */ 193 tmp |= edge << 26; /* REDG */
197 tmp |= (tx_hi_z ? 2 : 0) << 22; /* TXDIZ */ 194 tmp |= (tx_hi_z ? 2 : 0) << 22; /* TXDIZ */
198 sh_msiof_write(p, CTR, tmp); 195 sh_msiof_write(p, CTR, tmp);
199} 196}
diff --git a/drivers/spi/spi_sh_sci.c b/drivers/spi/spi_sh_sci.c
index 7d36720eb982..a65c12ffa733 100644
--- a/drivers/spi/spi_sh_sci.c
+++ b/drivers/spi/spi_sh_sci.c
@@ -148,7 +148,7 @@ static int sh_sci_spi_probe(struct platform_device *dev)
148 ret = -ENOENT; 148 ret = -ENOENT;
149 goto err1; 149 goto err1;
150 } 150 }
151 sp->membase = ioremap(r->start, r->end - r->start + 1); 151 sp->membase = ioremap(r->start, resource_size(r));
152 if (!sp->membase) { 152 if (!sp->membase) {
153 ret = -ENXIO; 153 ret = -ENXIO;
154 goto err1; 154 goto err1;
diff --git a/drivers/spi/spi_txx9.c b/drivers/spi/spi_txx9.c
index 19f75627c3de..dfa024b633e1 100644
--- a/drivers/spi/spi_txx9.c
+++ b/drivers/spi/spi_txx9.c
@@ -375,12 +375,10 @@ static int __init txx9spi_probe(struct platform_device *dev)
375 res = platform_get_resource(dev, IORESOURCE_MEM, 0); 375 res = platform_get_resource(dev, IORESOURCE_MEM, 0);
376 if (!res) 376 if (!res)
377 goto exit_busy; 377 goto exit_busy;
378 if (!devm_request_mem_region(&dev->dev, 378 if (!devm_request_mem_region(&dev->dev, res->start, resource_size(res),
379 res->start, res->end - res->start + 1,
380 "spi_txx9")) 379 "spi_txx9"))
381 goto exit_busy; 380 goto exit_busy;
382 c->membase = devm_ioremap(&dev->dev, 381 c->membase = devm_ioremap(&dev->dev, res->start, resource_size(res));
383 res->start, res->end - res->start + 1);
384 if (!c->membase) 382 if (!c->membase)
385 goto exit_busy; 383 goto exit_busy;
386 384
diff --git a/drivers/spi/spidev.c b/drivers/spi/spidev.c
index 9c446e6003d5..ea1bec3c9a13 100644
--- a/drivers/spi/spidev.c
+++ b/drivers/spi/spidev.c
@@ -53,7 +53,7 @@
53#define SPIDEV_MAJOR 153 /* assigned */ 53#define SPIDEV_MAJOR 153 /* assigned */
54#define N_SPI_MINORS 32 /* ... up to 256 */ 54#define N_SPI_MINORS 32 /* ... up to 256 */
55 55
56static unsigned long minors[N_SPI_MINORS / BITS_PER_LONG]; 56static DECLARE_BITMAP(minors, N_SPI_MINORS);
57 57
58 58
59/* Bit masks for spi_device.mode management. Note that incorrect 59/* Bit masks for spi_device.mode management. Note that incorrect
@@ -558,7 +558,7 @@ static struct class *spidev_class;
558 558
559/*-------------------------------------------------------------------------*/ 559/*-------------------------------------------------------------------------*/
560 560
561static int spidev_probe(struct spi_device *spi) 561static int __devinit spidev_probe(struct spi_device *spi)
562{ 562{
563 struct spidev_data *spidev; 563 struct spidev_data *spidev;
564 int status; 564 int status;
@@ -607,7 +607,7 @@ static int spidev_probe(struct spi_device *spi)
607 return status; 607 return status;
608} 608}
609 609
610static int spidev_remove(struct spi_device *spi) 610static int __devexit spidev_remove(struct spi_device *spi)
611{ 611{
612 struct spidev_data *spidev = spi_get_drvdata(spi); 612 struct spidev_data *spidev = spi_get_drvdata(spi);
613 613
@@ -629,7 +629,7 @@ static int spidev_remove(struct spi_device *spi)
629 return 0; 629 return 0;
630} 630}
631 631
632static struct spi_driver spidev_spi = { 632static struct spi_driver spidev_spi_driver = {
633 .driver = { 633 .driver = {
634 .name = "spidev", 634 .name = "spidev",
635 .owner = THIS_MODULE, 635 .owner = THIS_MODULE,
@@ -661,14 +661,14 @@ static int __init spidev_init(void)
661 661
662 spidev_class = class_create(THIS_MODULE, "spidev"); 662 spidev_class = class_create(THIS_MODULE, "spidev");
663 if (IS_ERR(spidev_class)) { 663 if (IS_ERR(spidev_class)) {
664 unregister_chrdev(SPIDEV_MAJOR, spidev_spi.driver.name); 664 unregister_chrdev(SPIDEV_MAJOR, spidev_spi_driver.driver.name);
665 return PTR_ERR(spidev_class); 665 return PTR_ERR(spidev_class);
666 } 666 }
667 667
668 status = spi_register_driver(&spidev_spi); 668 status = spi_register_driver(&spidev_spi_driver);
669 if (status < 0) { 669 if (status < 0) {
670 class_destroy(spidev_class); 670 class_destroy(spidev_class);
671 unregister_chrdev(SPIDEV_MAJOR, spidev_spi.driver.name); 671 unregister_chrdev(SPIDEV_MAJOR, spidev_spi_driver.driver.name);
672 } 672 }
673 return status; 673 return status;
674} 674}
@@ -676,9 +676,9 @@ module_init(spidev_init);
676 676
677static void __exit spidev_exit(void) 677static void __exit spidev_exit(void)
678{ 678{
679 spi_unregister_driver(&spidev_spi); 679 spi_unregister_driver(&spidev_spi_driver);
680 class_destroy(spidev_class); 680 class_destroy(spidev_class);
681 unregister_chrdev(SPIDEV_MAJOR, spidev_spi.driver.name); 681 unregister_chrdev(SPIDEV_MAJOR, spidev_spi_driver.driver.name);
682} 682}
683module_exit(spidev_exit); 683module_exit(spidev_exit);
684 684
diff --git a/drivers/ssb/main.c b/drivers/ssb/main.c
index 5681ebed9c65..03dfd27c4bfb 100644
--- a/drivers/ssb/main.c
+++ b/drivers/ssb/main.c
@@ -494,8 +494,7 @@ static int ssb_devices_register(struct ssb_bus *bus)
494#endif 494#endif
495 break; 495 break;
496 case SSB_BUSTYPE_SDIO: 496 case SSB_BUSTYPE_SDIO:
497#ifdef CONFIG_SSB_SDIO 497#ifdef CONFIG_SSB_SDIOHOST
498 sdev->irq = bus->host_sdio->dev.irq;
499 dev->parent = &bus->host_sdio->dev; 498 dev->parent = &bus->host_sdio->dev;
500#endif 499#endif
501 break; 500 break;
diff --git a/drivers/staging/Kconfig b/drivers/staging/Kconfig
index 54e174d28234..fc2e963e65e9 100644
--- a/drivers/staging/Kconfig
+++ b/drivers/staging/Kconfig
@@ -87,8 +87,6 @@ source "drivers/staging/frontier/Kconfig"
87 87
88source "drivers/staging/dream/Kconfig" 88source "drivers/staging/dream/Kconfig"
89 89
90source "drivers/staging/dst/Kconfig"
91
92source "drivers/staging/pohmelfs/Kconfig" 90source "drivers/staging/pohmelfs/Kconfig"
93 91
94source "drivers/staging/b3dfg/Kconfig" 92source "drivers/staging/b3dfg/Kconfig"
@@ -99,7 +97,7 @@ source "drivers/staging/p9auth/Kconfig"
99 97
100source "drivers/staging/line6/Kconfig" 98source "drivers/staging/line6/Kconfig"
101 99
102source "drivers/gpu/drm/radeon/Kconfig" 100source "drivers/gpu/drm/vmwgfx/Kconfig"
103 101
104source "drivers/gpu/drm/nouveau/Kconfig" 102source "drivers/gpu/drm/nouveau/Kconfig"
105 103
@@ -143,5 +141,7 @@ source "drivers/staging/wavelan/Kconfig"
143 141
144source "drivers/staging/netwave/Kconfig" 142source "drivers/staging/netwave/Kconfig"
145 143
144source "drivers/staging/sm7xx/Kconfig"
145
146endif # !STAGING_EXCLUDE_BUILD 146endif # !STAGING_EXCLUDE_BUILD
147endif # STAGING 147endif # STAGING
diff --git a/drivers/staging/Makefile b/drivers/staging/Makefile
index 069864f4391e..b5e67b889f60 100644
--- a/drivers/staging/Makefile
+++ b/drivers/staging/Makefile
@@ -26,7 +26,6 @@ obj-$(CONFIG_RTL8192E) += rtl8192e/
26obj-$(CONFIG_INPUT_MIMIO) += mimio/ 26obj-$(CONFIG_INPUT_MIMIO) += mimio/
27obj-$(CONFIG_TRANZPORT) += frontier/ 27obj-$(CONFIG_TRANZPORT) += frontier/
28obj-$(CONFIG_DREAM) += dream/ 28obj-$(CONFIG_DREAM) += dream/
29obj-$(CONFIG_DST) += dst/
30obj-$(CONFIG_POHMELFS) += pohmelfs/ 29obj-$(CONFIG_POHMELFS) += pohmelfs/
31obj-$(CONFIG_B3DFG) += b3dfg/ 30obj-$(CONFIG_B3DFG) += b3dfg/
32obj-$(CONFIG_IDE_PHISON) += phison/ 31obj-$(CONFIG_IDE_PHISON) += phison/
@@ -53,3 +52,4 @@ obj-$(CONFIG_ARLAN) += arlan/
53obj-$(CONFIG_WAVELAN) += wavelan/ 52obj-$(CONFIG_WAVELAN) += wavelan/
54obj-$(CONFIG_PCMCIA_WAVELAN) += wavelan/ 53obj-$(CONFIG_PCMCIA_WAVELAN) += wavelan/
55obj-$(CONFIG_PCMCIA_NETWAVE) += netwave/ 54obj-$(CONFIG_PCMCIA_NETWAVE) += netwave/
55obj-$(CONFIG_FB_SM7XX) += sm7xx/
diff --git a/drivers/staging/asus_oled/asus_oled.c b/drivers/staging/asus_oled/asus_oled.c
index f4c26572c7df..43c57b7688ab 100644
--- a/drivers/staging/asus_oled/asus_oled.c
+++ b/drivers/staging/asus_oled/asus_oled.c
@@ -194,9 +194,11 @@ static ssize_t set_enabled(struct device *dev, struct device_attribute *attr,
194{ 194{
195 struct usb_interface *intf = to_usb_interface(dev); 195 struct usb_interface *intf = to_usb_interface(dev);
196 struct asus_oled_dev *odev = usb_get_intfdata(intf); 196 struct asus_oled_dev *odev = usb_get_intfdata(intf);
197 int temp = strict_strtoul(buf, 10, NULL); 197 unsigned long value;
198 if (strict_strtoul(buf, 10, &value))
199 return -EINVAL;
198 200
199 enable_oled(odev, temp); 201 enable_oled(odev, value);
200 202
201 return count; 203 return count;
202} 204}
@@ -207,10 +209,12 @@ static ssize_t class_set_enabled(struct device *device,
207{ 209{
208 struct asus_oled_dev *odev = 210 struct asus_oled_dev *odev =
209 (struct asus_oled_dev *) dev_get_drvdata(device); 211 (struct asus_oled_dev *) dev_get_drvdata(device);
212 unsigned long value;
210 213
211 int temp = strict_strtoul(buf, 10, NULL); 214 if (strict_strtoul(buf, 10, &value))
215 return -EINVAL;
212 216
213 enable_oled(odev, temp); 217 enable_oled(odev, value);
214 218
215 return count; 219 return count;
216} 220}
diff --git a/drivers/staging/batman-adv/Kconfig b/drivers/staging/batman-adv/Kconfig
index 7632f5760060..1d74dabf9511 100644
--- a/drivers/staging/batman-adv/Kconfig
+++ b/drivers/staging/batman-adv/Kconfig
@@ -4,6 +4,7 @@
4 4
5config BATMAN_ADV 5config BATMAN_ADV
6 tristate "B.A.T.M.A.N. Advanced Meshing Protocol" 6 tristate "B.A.T.M.A.N. Advanced Meshing Protocol"
7 depends on PROC_FS && PACKET
7 default n 8 default n
8 ---help--- 9 ---help---
9 10
diff --git a/drivers/staging/batman-adv/send.c b/drivers/staging/batman-adv/send.c
index d724798278d6..eb617508cca4 100644
--- a/drivers/staging/batman-adv/send.c
+++ b/drivers/staging/batman-adv/send.c
@@ -363,8 +363,10 @@ void add_bcast_packet_to_list(unsigned char *packet_buff, int packet_len)
363 return; 363 return;
364 364
365 forw_packet->packet_buff = kmalloc(packet_len, GFP_ATOMIC); 365 forw_packet->packet_buff = kmalloc(packet_len, GFP_ATOMIC);
366 if (!forw_packet->packet_buff) 366 if (!forw_packet->packet_buff) {
367 kfree(forw_packet);
367 return; 368 return;
369 }
368 370
369 forw_packet->packet_len = packet_len; 371 forw_packet->packet_len = packet_len;
370 memcpy(forw_packet->packet_buff, packet_buff, forw_packet->packet_len); 372 memcpy(forw_packet->packet_buff, packet_buff, forw_packet->packet_len);
diff --git a/drivers/staging/comedi/comedi.h b/drivers/staging/comedi/comedi.h
index ccc5cdc008c6..b559a9c2f857 100644
--- a/drivers/staging/comedi/comedi.h
+++ b/drivers/staging/comedi/comedi.h
@@ -451,7 +451,7 @@
451 451
452#define COMEDI_CB_EOS 1 /* end of scan */ 452#define COMEDI_CB_EOS 1 /* end of scan */
453#define COMEDI_CB_EOA 2 /* end of acquisition */ 453#define COMEDI_CB_EOA 2 /* end of acquisition */
454#define COMEDI_CB_BLOCK 4 /* DEPRECATED: convenient block size */ 454#define COMEDI_CB_BLOCK 4 /* data has arrived: wakes up read() / write() */
455#define COMEDI_CB_EOBUF 8 /* DEPRECATED: end of buffer */ 455#define COMEDI_CB_EOBUF 8 /* DEPRECATED: end of buffer */
456#define COMEDI_CB_ERROR 16 /* card error during acquisition */ 456#define COMEDI_CB_ERROR 16 /* card error during acquisition */
457#define COMEDI_CB_OVERFLOW 32 /* buffer overflow/underflow */ 457#define COMEDI_CB_OVERFLOW 32 /* buffer overflow/underflow */
diff --git a/drivers/staging/comedi/drivers/jr3_pci.c b/drivers/staging/comedi/drivers/jr3_pci.c
index 0d2c2eb23b23..bd397840dcba 100644
--- a/drivers/staging/comedi/drivers/jr3_pci.c
+++ b/drivers/staging/comedi/drivers/jr3_pci.c
@@ -849,8 +849,11 @@ static int jr3_pci_attach(struct comedi_device *dev,
849 } 849 }
850 850
851 devpriv->pci_enabled = 1; 851 devpriv->pci_enabled = 1;
852 devpriv->iobase = 852 devpriv->iobase = ioremap(pci_resource_start(card, 0),
853 ioremap(pci_resource_start(card, 0), sizeof(struct jr3_t)); 853 offsetof(struct jr3_t, channel[devpriv->n_channels]));
854 if (!devpriv->iobase)
855 return -ENOMEM;
856
854 result = alloc_subdevices(dev, devpriv->n_channels); 857 result = alloc_subdevices(dev, devpriv->n_channels);
855 if (result < 0) 858 if (result < 0)
856 goto out; 859 goto out;
diff --git a/drivers/staging/comedi/drivers/usbdux.c b/drivers/staging/comedi/drivers/usbdux.c
index 06c020466298..9a1b559c4b0d 100644
--- a/drivers/staging/comedi/drivers/usbdux.c
+++ b/drivers/staging/comedi/drivers/usbdux.c
@@ -1,4 +1,4 @@
1#define DRIVER_VERSION "v2.3" 1#define DRIVER_VERSION "v2.4"
2#define DRIVER_AUTHOR "Bernd Porr, BerndPorr@f2s.com" 2#define DRIVER_AUTHOR "Bernd Porr, BerndPorr@f2s.com"
3#define DRIVER_DESC "Stirling/ITL USB-DUX -- Bernd.Porr@f2s.com" 3#define DRIVER_DESC "Stirling/ITL USB-DUX -- Bernd.Porr@f2s.com"
4/* 4/*
@@ -81,6 +81,8 @@ sampling rate. If you sample two channels you get 4kHz and so on.
81 * 2.1: changed PWM API 81 * 2.1: changed PWM API
82 * 2.2: added firmware kernel request to fix an udev problem 82 * 2.2: added firmware kernel request to fix an udev problem
83 * 2.3: corrected a bug in bulk timeouts which were far too short 83 * 2.3: corrected a bug in bulk timeouts which were far too short
84 * 2.4: fixed a bug which causes the driver to hang when it ran out of data.
85 * Thanks to Jan-Matthias Braun and Ian to spot the bug and fix it.
84 * 86 *
85 */ 87 */
86 88
@@ -532,6 +534,7 @@ static void usbduxsub_ai_IsocIrq(struct urb *urb)
532 } 534 }
533 } 535 }
534 /* tell comedi that data is there */ 536 /* tell comedi that data is there */
537 s->async->events |= COMEDI_CB_BLOCK | COMEDI_CB_EOS;
535 comedi_event(this_usbduxsub->comedidev, s); 538 comedi_event(this_usbduxsub->comedidev, s);
536} 539}
537 540
diff --git a/drivers/staging/cx25821/cx25821-medusa-video.c b/drivers/staging/cx25821/cx25821-medusa-video.c
index e4df8134f059..1eb079b3d429 100644
--- a/drivers/staging/cx25821/cx25821-medusa-video.c
+++ b/drivers/staging/cx25821/cx25821-medusa-video.c
@@ -860,10 +860,8 @@ int medusa_video_init(struct cx25821_dev *dev)
860 860
861 ret_val = medusa_set_videostandard(dev); 861 ret_val = medusa_set_videostandard(dev);
862 862
863 if (ret_val < 0) { 863 if (ret_val < 0)
864 mutex_unlock(&dev->lock);
865 return -EINVAL; 864 return -EINVAL;
866 }
867 865
868 return 1; 866 return 1;
869} 867}
diff --git a/drivers/staging/dst/Kconfig b/drivers/staging/dst/Kconfig
deleted file mode 100644
index 448d342ac2a2..000000000000
--- a/drivers/staging/dst/Kconfig
+++ /dev/null
@@ -1,67 +0,0 @@
1config DST
2 tristate "Distributed storage"
3 depends on NET && CRYPTO && SYSFS && BLK_DEV
4 select CONNECTOR
5 ---help---
6 DST is a network block device storage, which can be used to organize
7 exported storage on the remote nodes into the local block device.
8
9 DST works on top of any network media and protocol; it is just a matter
10 of configuration utility to understand the correct addresses. The most
11 common example is TCP over IP, which allows to pass through firewalls and
12 create remote backup storage in a different datacenter. DST requires
13 single port to be enabled on the exporting node and outgoing connections
14 on the local node.
15
16 DST works with in-kernel client and server, which improves performance by
17 eliminating unneded data copies and by not depending on the version
18 of the external IO components. It requires userspace configuration utility
19 though.
20
21 DST uses transaction model, when each store has to be explicitly acked
22 from the remote node to be considered as successfully written. There
23 may be lots of in-flight transactions. When remote host does not ack
24 the transaction it will be resent predefined number of times with specified
25 timeouts between them. All those parameters are configurable. Transactions
26 are marked as failed after all resends complete unsuccessfully; having
27 long enough resend timeout and/or large number of resends allows not to
28 return error to the higher (FS usually) layer in case of short network
29 problems or remote node outages. In case of network RAID setup this means
30 that storage will not degrade until transactions are marked as failed, and
31 thus will not force checksum recalculation and data rebuild. In case of
32 connection failure DST will try to reconnect to the remote node automatically.
33 DST sends ping commands at idle time to detect if remote node is alive.
34
35 Because of transactional model it is possible to use zero-copy sending
36 without worry of data corruption (which in turn could be detected by the
37 strong checksums though).
38
39 DST may fully encrypt the data channel in case of untrusted channel and implement
40 strong checksum of the transferred data. It is possible to configure algorithms
41 and crypto keys; they should match on both sides of the network channel.
42 Crypto processing does not introduce noticeble performance overhead, since DST
43 uses configurable pool of threads to perform crypto processing.
44
45 DST utilizes memory pool model of all its transaction allocations (it is the
46 only additional allocation on the client) and server allocations (bio pools,
47 while pages are allocated from the slab).
48
49 At startup DST performs a simple negotiation with the export node to determine
50 access permissions and size of the exported storage. It can be extended if
51 new parameters should be autonegotiated.
52
53 DST carries block IO flags in the protocol, which allows to transparently implement
54 barriers and sync/flush operations. Those flags are used in the export node where
55 IO against the local storage is performed, which means that sync write will be sync
56 on the remote node too, which in turn improves data integrity and improved resistance
57 to errors and data corruption during power outages or storage damages.
58
59 Homepage: http://www.ioremap.net/projects/dst
60 Userspace configuration utility and the latest releases: http://www.ioremap.net/archive/dst/
61
62config DST_DEBUG
63 bool "DST debug"
64 depends on DST
65 ---help---
66 This option will enable HEAVY debugging of the DST.
67 Turn it on ONLY if you have to debug some really obscure problem.
diff --git a/drivers/staging/dst/Makefile b/drivers/staging/dst/Makefile
deleted file mode 100644
index 3a8b0cf9643e..000000000000
--- a/drivers/staging/dst/Makefile
+++ /dev/null
@@ -1,3 +0,0 @@
1obj-$(CONFIG_DST) += nst.o
2
3nst-y := dcore.o state.o export.o thread_pool.o crypto.o trans.o
diff --git a/drivers/staging/dst/crypto.c b/drivers/staging/dst/crypto.c
deleted file mode 100644
index 351295c97a4b..000000000000
--- a/drivers/staging/dst/crypto.c
+++ /dev/null
@@ -1,733 +0,0 @@
1/*
2 * 2007+ Copyright (c) Evgeniy Polyakov <zbr@ioremap.net>
3 * All rights reserved.
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 */
15
16#include <linux/bio.h>
17#include <linux/crypto.h>
18#include <linux/dst.h>
19#include <linux/kernel.h>
20#include <linux/scatterlist.h>
21#include <linux/slab.h>
22
23/*
24 * Tricky bastard, but IV can be more complex with time...
25 */
26static inline u64 dst_gen_iv(struct dst_trans *t)
27{
28 return t->gen;
29}
30
31/*
32 * Crypto machinery: hash/cipher support for the given crypto controls.
33 */
34static struct crypto_hash *dst_init_hash(struct dst_crypto_ctl *ctl, u8 *key)
35{
36 int err;
37 struct crypto_hash *hash;
38
39 hash = crypto_alloc_hash(ctl->hash_algo, 0, CRYPTO_ALG_ASYNC);
40 if (IS_ERR(hash)) {
41 err = PTR_ERR(hash);
42 dprintk("%s: failed to allocate hash '%s', err: %d.\n",
43 __func__, ctl->hash_algo, err);
44 goto err_out_exit;
45 }
46
47 ctl->crypto_attached_size = crypto_hash_digestsize(hash);
48
49 if (!ctl->hash_keysize)
50 return hash;
51
52 err = crypto_hash_setkey(hash, key, ctl->hash_keysize);
53 if (err) {
54 dprintk("%s: failed to set key for hash '%s', err: %d.\n",
55 __func__, ctl->hash_algo, err);
56 goto err_out_free;
57 }
58
59 return hash;
60
61err_out_free:
62 crypto_free_hash(hash);
63err_out_exit:
64 return ERR_PTR(err);
65}
66
67static struct crypto_ablkcipher *dst_init_cipher(struct dst_crypto_ctl *ctl,
68 u8 *key)
69{
70 int err = -EINVAL;
71 struct crypto_ablkcipher *cipher;
72
73 if (!ctl->cipher_keysize)
74 goto err_out_exit;
75
76 cipher = crypto_alloc_ablkcipher(ctl->cipher_algo, 0, 0);
77 if (IS_ERR(cipher)) {
78 err = PTR_ERR(cipher);
79 dprintk("%s: failed to allocate cipher '%s', err: %d.\n",
80 __func__, ctl->cipher_algo, err);
81 goto err_out_exit;
82 }
83
84 crypto_ablkcipher_clear_flags(cipher, ~0);
85
86 err = crypto_ablkcipher_setkey(cipher, key, ctl->cipher_keysize);
87 if (err) {
88 dprintk("%s: failed to set key for cipher '%s', err: %d.\n",
89 __func__, ctl->cipher_algo, err);
90 goto err_out_free;
91 }
92
93 return cipher;
94
95err_out_free:
96 crypto_free_ablkcipher(cipher);
97err_out_exit:
98 return ERR_PTR(err);
99}
100
101/*
102 * Crypto engine has a pool of pages to encrypt data into before sending
103 * it over the network. This pool is freed/allocated here.
104 */
105static void dst_crypto_pages_free(struct dst_crypto_engine *e)
106{
107 unsigned int i;
108
109 for (i = 0; i < e->page_num; ++i)
110 __free_page(e->pages[i]);
111 kfree(e->pages);
112}
113
114static int dst_crypto_pages_alloc(struct dst_crypto_engine *e, int num)
115{
116 int i;
117
118 e->pages = kmalloc(num * sizeof(struct page **), GFP_KERNEL);
119 if (!e->pages)
120 return -ENOMEM;
121
122 for (i = 0; i < num; ++i) {
123 e->pages[i] = alloc_page(GFP_KERNEL);
124 if (!e->pages[i])
125 goto err_out_free_pages;
126 }
127
128 e->page_num = num;
129 return 0;
130
131err_out_free_pages:
132 while (--i >= 0)
133 __free_page(e->pages[i]);
134
135 kfree(e->pages);
136 return -ENOMEM;
137}
138
139/*
140 * Initialize crypto engine for given node.
141 * Setup cipher/hash, keys, pool of threads and private data.
142 */
143static int dst_crypto_engine_init(struct dst_crypto_engine *e,
144 struct dst_node *n)
145{
146 int err;
147 struct dst_crypto_ctl *ctl = &n->crypto;
148
149 err = dst_crypto_pages_alloc(e, n->max_pages);
150 if (err)
151 goto err_out_exit;
152
153 e->size = PAGE_SIZE;
154 e->data = kmalloc(e->size, GFP_KERNEL);
155 if (!e->data) {
156 err = -ENOMEM;
157 goto err_out_free_pages;
158 }
159
160 if (ctl->hash_algo[0]) {
161 e->hash = dst_init_hash(ctl, n->hash_key);
162 if (IS_ERR(e->hash)) {
163 err = PTR_ERR(e->hash);
164 e->hash = NULL;
165 goto err_out_free;
166 }
167 }
168
169 if (ctl->cipher_algo[0]) {
170 e->cipher = dst_init_cipher(ctl, n->cipher_key);
171 if (IS_ERR(e->cipher)) {
172 err = PTR_ERR(e->cipher);
173 e->cipher = NULL;
174 goto err_out_free_hash;
175 }
176 }
177
178 return 0;
179
180err_out_free_hash:
181 crypto_free_hash(e->hash);
182err_out_free:
183 kfree(e->data);
184err_out_free_pages:
185 dst_crypto_pages_free(e);
186err_out_exit:
187 return err;
188}
189
190static void dst_crypto_engine_exit(struct dst_crypto_engine *e)
191{
192 if (e->hash)
193 crypto_free_hash(e->hash);
194 if (e->cipher)
195 crypto_free_ablkcipher(e->cipher);
196 dst_crypto_pages_free(e);
197 kfree(e->data);
198}
199
200/*
201 * Waiting for cipher processing to be completed.
202 */
203struct dst_crypto_completion {
204 struct completion complete;
205 int error;
206};
207
208static void dst_crypto_complete(struct crypto_async_request *req, int err)
209{
210 struct dst_crypto_completion *c = req->data;
211
212 if (err == -EINPROGRESS)
213 return;
214
215 dprintk("%s: req: %p, err: %d.\n", __func__, req, err);
216 c->error = err;
217 complete(&c->complete);
218}
219
220static int dst_crypto_process(struct ablkcipher_request *req,
221 struct scatterlist *sg_dst, struct scatterlist *sg_src,
222 void *iv, int enc, unsigned long timeout)
223{
224 struct dst_crypto_completion c;
225 int err;
226
227 init_completion(&c.complete);
228 c.error = -EINPROGRESS;
229
230 ablkcipher_request_set_callback(req, CRYPTO_TFM_REQ_MAY_BACKLOG,
231 dst_crypto_complete, &c);
232
233 ablkcipher_request_set_crypt(req, sg_src, sg_dst, sg_src->length, iv);
234
235 if (enc)
236 err = crypto_ablkcipher_encrypt(req);
237 else
238 err = crypto_ablkcipher_decrypt(req);
239
240 switch (err) {
241 case -EINPROGRESS:
242 case -EBUSY:
243 err = wait_for_completion_interruptible_timeout(&c.complete,
244 timeout);
245 if (!err)
246 err = -ETIMEDOUT;
247 else
248 err = c.error;
249 break;
250 default:
251 break;
252 }
253
254 return err;
255}
256
257/*
258 * DST uses generic iteration approach for data crypto processing.
259 * Single block IO request is switched into array of scatterlists,
260 * which are submitted to the crypto processing iterator.
261 *
262 * Input and output iterator initialization are different, since
263 * in output case we can not encrypt data in-place and need a
264 * temporary storage, which is then being sent to the remote peer.
265 */
266static int dst_trans_iter_out(struct bio *bio, struct dst_crypto_engine *e,
267 int (*iterator) (struct dst_crypto_engine *e,
268 struct scatterlist *dst,
269 struct scatterlist *src))
270{
271 struct bio_vec *bv;
272 int err, i;
273
274 sg_init_table(e->src, bio->bi_vcnt);
275 sg_init_table(e->dst, bio->bi_vcnt);
276
277 bio_for_each_segment(bv, bio, i) {
278 sg_set_page(&e->src[i], bv->bv_page, bv->bv_len, bv->bv_offset);
279 sg_set_page(&e->dst[i], e->pages[i], bv->bv_len, bv->bv_offset);
280
281 err = iterator(e, &e->dst[i], &e->src[i]);
282 if (err)
283 return err;
284 }
285
286 return 0;
287}
288
289static int dst_trans_iter_in(struct bio *bio, struct dst_crypto_engine *e,
290 int (*iterator) (struct dst_crypto_engine *e,
291 struct scatterlist *dst,
292 struct scatterlist *src))
293{
294 struct bio_vec *bv;
295 int err, i;
296
297 sg_init_table(e->src, bio->bi_vcnt);
298 sg_init_table(e->dst, bio->bi_vcnt);
299
300 bio_for_each_segment(bv, bio, i) {
301 sg_set_page(&e->src[i], bv->bv_page, bv->bv_len, bv->bv_offset);
302 sg_set_page(&e->dst[i], bv->bv_page, bv->bv_len, bv->bv_offset);
303
304 err = iterator(e, &e->dst[i], &e->src[i]);
305 if (err)
306 return err;
307 }
308
309 return 0;
310}
311
312static int dst_crypt_iterator(struct dst_crypto_engine *e,
313 struct scatterlist *sg_dst, struct scatterlist *sg_src)
314{
315 struct ablkcipher_request *req = e->data;
316 u8 iv[32];
317
318 memset(iv, 0, sizeof(iv));
319
320 memcpy(iv, &e->iv, sizeof(e->iv));
321
322 return dst_crypto_process(req, sg_dst, sg_src, iv, e->enc, e->timeout);
323}
324
325static int dst_crypt(struct dst_crypto_engine *e, struct bio *bio)
326{
327 struct ablkcipher_request *req = e->data;
328
329 memset(req, 0, sizeof(struct ablkcipher_request));
330 ablkcipher_request_set_tfm(req, e->cipher);
331
332 if (e->enc)
333 return dst_trans_iter_out(bio, e, dst_crypt_iterator);
334 else
335 return dst_trans_iter_in(bio, e, dst_crypt_iterator);
336}
337
338static int dst_hash_iterator(struct dst_crypto_engine *e,
339 struct scatterlist *sg_dst, struct scatterlist *sg_src)
340{
341 return crypto_hash_update(e->data, sg_src, sg_src->length);
342}
343
344static int dst_hash(struct dst_crypto_engine *e, struct bio *bio, void *dst)
345{
346 struct hash_desc *desc = e->data;
347 int err;
348
349 desc->tfm = e->hash;
350 desc->flags = 0;
351
352 err = crypto_hash_init(desc);
353 if (err)
354 return err;
355
356 err = dst_trans_iter_in(bio, e, dst_hash_iterator);
357 if (err)
358 return err;
359
360 err = crypto_hash_final(desc, dst);
361 if (err)
362 return err;
363
364 return 0;
365}
366
367/*
368 * Initialize/cleanup a crypto thread. The only thing it should
369 * do is to allocate a pool of pages as temporary storage.
370 * And to setup cipher and/or hash.
371 */
372static void *dst_crypto_thread_init(void *data)
373{
374 struct dst_node *n = data;
375 struct dst_crypto_engine *e;
376 int err = -ENOMEM;
377
378 e = kzalloc(sizeof(struct dst_crypto_engine), GFP_KERNEL);
379 if (!e)
380 goto err_out_exit;
381 e->src = kcalloc(2 * n->max_pages, sizeof(struct scatterlist),
382 GFP_KERNEL);
383 if (!e->src)
384 goto err_out_free;
385
386 e->dst = e->src + n->max_pages;
387
388 err = dst_crypto_engine_init(e, n);
389 if (err)
390 goto err_out_free_all;
391
392 return e;
393
394err_out_free_all:
395 kfree(e->src);
396err_out_free:
397 kfree(e);
398err_out_exit:
399 return ERR_PTR(err);
400}
401
402static void dst_crypto_thread_cleanup(void *private)
403{
404 struct dst_crypto_engine *e = private;
405
406 dst_crypto_engine_exit(e);
407 kfree(e->src);
408 kfree(e);
409}
410
411/*
412 * Initialize crypto engine for given node: store keys, create pool
413 * of threads, initialize each one.
414 *
415 * Each thread has unique ID, but 0 and 1 are reserved for receiving and
416 * accepting threads (if export node), so IDs could start from 2, but starting
417 * them from 10 allows easily understand what this thread is for.
418 */
419int dst_node_crypto_init(struct dst_node *n, struct dst_crypto_ctl *ctl)
420{
421 void *key = (ctl + 1);
422 int err = -ENOMEM, i;
423 char name[32];
424
425 if (ctl->hash_keysize) {
426 n->hash_key = kmalloc(ctl->hash_keysize, GFP_KERNEL);
427 if (!n->hash_key)
428 goto err_out_exit;
429 memcpy(n->hash_key, key, ctl->hash_keysize);
430 }
431
432 if (ctl->cipher_keysize) {
433 n->cipher_key = kmalloc(ctl->cipher_keysize, GFP_KERNEL);
434 if (!n->cipher_key)
435 goto err_out_free_hash;
436 memcpy(n->cipher_key, key, ctl->cipher_keysize);
437 }
438 memcpy(&n->crypto, ctl, sizeof(struct dst_crypto_ctl));
439
440 for (i = 0; i < ctl->thread_num; ++i) {
441 snprintf(name, sizeof(name), "%s-crypto-%d", n->name, i);
442 /* Unique ids... */
443 err = thread_pool_add_worker(n->pool, name, i + 10,
444 dst_crypto_thread_init, dst_crypto_thread_cleanup, n);
445 if (err)
446 goto err_out_free_threads;
447 }
448
449 return 0;
450
451err_out_free_threads:
452 while (--i >= 0)
453 thread_pool_del_worker_id(n->pool, i+10);
454
455 if (ctl->cipher_keysize)
456 kfree(n->cipher_key);
457 ctl->cipher_keysize = 0;
458err_out_free_hash:
459 if (ctl->hash_keysize)
460 kfree(n->hash_key);
461 ctl->hash_keysize = 0;
462err_out_exit:
463 return err;
464}
465
466void dst_node_crypto_exit(struct dst_node *n)
467{
468 struct dst_crypto_ctl *ctl = &n->crypto;
469
470 if (ctl->cipher_algo[0] || ctl->hash_algo[0]) {
471 kfree(n->hash_key);
472 kfree(n->cipher_key);
473 }
474}
475
476/*
477 * Thrad pool setup callback. Just stores a transaction in private data.
478 */
479static int dst_trans_crypto_setup(void *crypto_engine, void *trans)
480{
481 struct dst_crypto_engine *e = crypto_engine;
482
483 e->private = trans;
484 return 0;
485}
486
487#if 0
488static void dst_dump_bio(struct bio *bio)
489{
490 u8 *p;
491 struct bio_vec *bv;
492 int i;
493
494 bio_for_each_segment(bv, bio, i) {
495 dprintk("%s: %llu/%u: size: %u, offset: %u, data: ",
496 __func__, bio->bi_sector, bio->bi_size,
497 bv->bv_len, bv->bv_offset);
498
499 p = kmap(bv->bv_page) + bv->bv_offset;
500 for (i = 0; i < bv->bv_len; ++i)
501 printk(KERN_DEBUG "%02x ", p[i]);
502 kunmap(bv->bv_page);
503 printk("\n");
504 }
505}
506#endif
507
508/*
509 * Encrypt/hash data and send it to the network.
510 */
511static int dst_crypto_process_sending(struct dst_crypto_engine *e,
512 struct bio *bio, u8 *hash)
513{
514 int err;
515
516 if (e->cipher) {
517 err = dst_crypt(e, bio);
518 if (err)
519 goto err_out_exit;
520 }
521
522 if (e->hash) {
523 err = dst_hash(e, bio, hash);
524 if (err)
525 goto err_out_exit;
526
527#ifdef CONFIG_DST_DEBUG
528 {
529 unsigned int i;
530
531 /* dst_dump_bio(bio); */
532
533 printk(KERN_DEBUG "%s: bio: %llu/%u, rw: %lu, hash: ",
534 __func__, (u64)bio->bi_sector,
535 bio->bi_size, bio_data_dir(bio));
536 for (i = 0; i < crypto_hash_digestsize(e->hash); ++i)
537 printk("%02x ", hash[i]);
538 printk("\n");
539 }
540#endif
541 }
542
543 return 0;
544
545err_out_exit:
546 return err;
547}
548
549/*
550 * Check if received data is valid. Decipher if it is.
551 */
552static int dst_crypto_process_receiving(struct dst_crypto_engine *e,
553 struct bio *bio, u8 *hash, u8 *recv_hash)
554{
555 int err;
556
557 if (e->hash) {
558 int mismatch;
559
560 err = dst_hash(e, bio, hash);
561 if (err)
562 goto err_out_exit;
563
564 mismatch = !!memcmp(recv_hash, hash,
565 crypto_hash_digestsize(e->hash));
566#ifdef CONFIG_DST_DEBUG
567 /* dst_dump_bio(bio); */
568
569 printk(KERN_DEBUG "%s: bio: %llu/%u, rw: %lu, hash mismatch: %d",
570 __func__, (u64)bio->bi_sector, bio->bi_size,
571 bio_data_dir(bio), mismatch);
572 if (mismatch) {
573 unsigned int i;
574
575 printk(", recv/calc: ");
576 for (i = 0; i < crypto_hash_digestsize(e->hash); ++i)
577 printk("%02x/%02x ", recv_hash[i], hash[i]);
578
579 }
580 printk("\n");
581#endif
582 err = -1;
583 if (mismatch)
584 goto err_out_exit;
585 }
586
587 if (e->cipher) {
588 err = dst_crypt(e, bio);
589 if (err)
590 goto err_out_exit;
591 }
592
593 return 0;
594
595err_out_exit:
596 return err;
597}
598
599/*
600 * Thread pool callback to encrypt data and send it to the netowork.
601 */
602static int dst_trans_crypto_action(void *crypto_engine, void *schedule_data)
603{
604 struct dst_crypto_engine *e = crypto_engine;
605 struct dst_trans *t = schedule_data;
606 struct bio *bio = t->bio;
607 int err;
608
609 dprintk("%s: t: %p, gen: %llu, cipher: %p, hash: %p.\n",
610 __func__, t, t->gen, e->cipher, e->hash);
611
612 e->enc = t->enc;
613 e->iv = dst_gen_iv(t);
614
615 if (bio_data_dir(bio) == WRITE) {
616 err = dst_crypto_process_sending(e, bio, t->cmd.hash);
617 if (err)
618 goto err_out_exit;
619
620 if (e->hash) {
621 t->cmd.csize = crypto_hash_digestsize(e->hash);
622 t->cmd.size += t->cmd.csize;
623 }
624
625 return dst_trans_send(t);
626 } else {
627 u8 *hash = e->data + e->size/2;
628
629 err = dst_crypto_process_receiving(e, bio, hash, t->cmd.hash);
630 if (err)
631 goto err_out_exit;
632
633 dst_trans_remove(t);
634 dst_trans_put(t);
635 }
636
637 return 0;
638
639err_out_exit:
640 t->error = err;
641 dst_trans_put(t);
642 return err;
643}
644
645/*
646 * Schedule crypto processing for given transaction.
647 */
648int dst_trans_crypto(struct dst_trans *t)
649{
650 struct dst_node *n = t->n;
651 int err;
652
653 err = thread_pool_schedule(n->pool,
654 dst_trans_crypto_setup, dst_trans_crypto_action,
655 t, MAX_SCHEDULE_TIMEOUT);
656 if (err)
657 goto err_out_exit;
658
659 return 0;
660
661err_out_exit:
662 dst_trans_put(t);
663 return err;
664}
665
666/*
667 * Crypto machinery for the export node.
668 */
669static int dst_export_crypto_setup(void *crypto_engine, void *bio)
670{
671 struct dst_crypto_engine *e = crypto_engine;
672
673 e->private = bio;
674 return 0;
675}
676
677static int dst_export_crypto_action(void *crypto_engine, void *schedule_data)
678{
679 struct dst_crypto_engine *e = crypto_engine;
680 struct bio *bio = schedule_data;
681 struct dst_export_priv *p = bio->bi_private;
682 int err;
683
684 dprintk("%s: e: %p, data: %p, bio: %llu/%u, dir: %lu.\n",
685 __func__, e, e->data, (u64)bio->bi_sector,
686 bio->bi_size, bio_data_dir(bio));
687
688 e->enc = (bio_data_dir(bio) == READ);
689 e->iv = p->cmd.id;
690
691 if (bio_data_dir(bio) == WRITE) {
692 u8 *hash = e->data + e->size/2;
693
694 err = dst_crypto_process_receiving(e, bio, hash, p->cmd.hash);
695 if (err)
696 goto err_out_exit;
697
698 generic_make_request(bio);
699 } else {
700 err = dst_crypto_process_sending(e, bio, p->cmd.hash);
701 if (err)
702 goto err_out_exit;
703
704 if (e->hash) {
705 p->cmd.csize = crypto_hash_digestsize(e->hash);
706 p->cmd.size += p->cmd.csize;
707 }
708
709 err = dst_export_send_bio(bio);
710 }
711 return 0;
712
713err_out_exit:
714 bio_put(bio);
715 return err;
716}
717
718int dst_export_crypto(struct dst_node *n, struct bio *bio)
719{
720 int err;
721
722 err = thread_pool_schedule(n->pool,
723 dst_export_crypto_setup, dst_export_crypto_action,
724 bio, MAX_SCHEDULE_TIMEOUT);
725 if (err)
726 goto err_out_exit;
727
728 return 0;
729
730err_out_exit:
731 bio_put(bio);
732 return err;
733}
diff --git a/drivers/staging/dst/dcore.c b/drivers/staging/dst/dcore.c
deleted file mode 100644
index fd5bd0ea1e0d..000000000000
--- a/drivers/staging/dst/dcore.c
+++ /dev/null
@@ -1,1004 +0,0 @@
1/*
2 * 2007+ Copyright (c) Evgeniy Polyakov <zbr@ioremap.net>
3 * All rights reserved.
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 */
15
16#include <linux/module.h>
17#include <linux/kernel.h>
18#include <linux/blkdev.h>
19#include <linux/bio.h>
20#include <linux/buffer_head.h>
21#include <linux/connector.h>
22#include <linux/dst.h>
23#include <linux/device.h>
24#include <linux/jhash.h>
25#include <linux/idr.h>
26#include <linux/init.h>
27#include <linux/namei.h>
28#include <linux/slab.h>
29#include <linux/socket.h>
30
31#include <linux/in.h>
32#include <linux/in6.h>
33
34#include <net/sock.h>
35
36static int dst_major;
37
38static DEFINE_MUTEX(dst_hash_lock);
39static struct list_head *dst_hashtable;
40static unsigned int dst_hashtable_size = 128;
41module_param(dst_hashtable_size, uint, 0644);
42
43static char dst_name[] = "Dementianting goldfish";
44
45static DEFINE_IDR(dst_index_idr);
46static struct cb_id cn_dst_id = { CN_DST_IDX, CN_DST_VAL };
47
48/*
49 * DST sysfs tree for device called 'storage':
50 *
51 * /sys/bus/dst/devices/storage/
52 * /sys/bus/dst/devices/storage/type : 192.168.4.80:1025
53 * /sys/bus/dst/devices/storage/size : 800
54 * /sys/bus/dst/devices/storage/name : storage
55 */
56
57static int dst_dev_match(struct device *dev, struct device_driver *drv)
58{
59 return 1;
60}
61
62static struct bus_type dst_dev_bus_type = {
63 .name = "dst",
64 .match = &dst_dev_match,
65};
66
67static void dst_node_release(struct device *dev)
68{
69 struct dst_info *info = container_of(dev, struct dst_info, device);
70
71 kfree(info);
72}
73
74static struct device dst_node_dev = {
75 .bus = &dst_dev_bus_type,
76 .release = &dst_node_release
77};
78
79/*
80 * Setting size of the node after it was changed.
81 */
82static void dst_node_set_size(struct dst_node *n)
83{
84 struct block_device *bdev;
85
86 set_capacity(n->disk, n->size >> 9);
87
88 bdev = bdget_disk(n->disk, 0);
89 if (bdev) {
90 mutex_lock(&bdev->bd_inode->i_mutex);
91 i_size_write(bdev->bd_inode, n->size);
92 mutex_unlock(&bdev->bd_inode->i_mutex);
93 bdput(bdev);
94 }
95}
96
97/*
98 * Distributed storage request processing function.
99 */
100static int dst_request(struct request_queue *q, struct bio *bio)
101{
102 struct dst_node *n = q->queuedata;
103 int err = -EIO;
104
105 if (bio_empty_barrier(bio) && !blk_queue_discard(q)) {
106 /*
107 * This is a dirty^Wnice hack, but if we complete this
108 * operation with -EOPNOTSUPP like intended, XFS
109 * will stuck and freeze the machine. This may be
110 * not particulary XFS problem though, but it is the
111 * only FS which sends empty barrier at umount time
112 * I worked with.
113 *
114 * Empty barriers are not allowed anyway, see 51fd77bd9f512
115 * for example, although later it was changed to
116 * bio_rw_flagged(bio, BIO_RW_DISCARD) only, which does not
117 * work in this case.
118 */
119 /* err = -EOPNOTSUPP; */
120 err = 0;
121 goto end_io;
122 }
123
124 bio_get(bio);
125
126 return dst_process_bio(n, bio);
127
128end_io:
129 bio_endio(bio, err);
130 return err;
131}
132
133/*
134 * Open/close callbacks for appropriate block device.
135 */
136static int dst_bdev_open(struct block_device *bdev, fmode_t mode)
137{
138 struct dst_node *n = bdev->bd_disk->private_data;
139
140 dst_node_get(n);
141 return 0;
142}
143
144static int dst_bdev_release(struct gendisk *disk, fmode_t mode)
145{
146 struct dst_node *n = disk->private_data;
147
148 dst_node_put(n);
149 return 0;
150}
151
152static struct block_device_operations dst_blk_ops = {
153 .open = dst_bdev_open,
154 .release = dst_bdev_release,
155 .owner = THIS_MODULE,
156};
157
158/*
159 * Block layer binding - disk is created when array is fully configured
160 * by userspace request.
161 */
162static int dst_node_create_disk(struct dst_node *n)
163{
164 int err = -ENOMEM;
165 u32 index = 0;
166
167 n->queue = blk_init_queue(NULL, NULL);
168 if (!n->queue)
169 goto err_out_exit;
170
171 n->queue->queuedata = n;
172 blk_queue_make_request(n->queue, dst_request);
173 blk_queue_max_phys_segments(n->queue, n->max_pages);
174 blk_queue_max_hw_segments(n->queue, n->max_pages);
175
176 err = -ENOMEM;
177 n->disk = alloc_disk(1);
178 if (!n->disk)
179 goto err_out_free_queue;
180
181 if (!(n->state->permissions & DST_PERM_WRITE)) {
182 printk(KERN_INFO "DST node %s attached read-only.\n", n->name);
183 set_disk_ro(n->disk, 1);
184 }
185
186 if (!idr_pre_get(&dst_index_idr, GFP_KERNEL))
187 goto err_out_put;
188
189 mutex_lock(&dst_hash_lock);
190 err = idr_get_new(&dst_index_idr, NULL, &index);
191 mutex_unlock(&dst_hash_lock);
192 if (err)
193 goto err_out_put;
194
195 n->disk->major = dst_major;
196 n->disk->first_minor = index;
197 n->disk->fops = &dst_blk_ops;
198 n->disk->queue = n->queue;
199 n->disk->private_data = n;
200 snprintf(n->disk->disk_name, sizeof(n->disk->disk_name),
201 "dst-%s", n->name);
202
203 return 0;
204
205err_out_put:
206 put_disk(n->disk);
207err_out_free_queue:
208 blk_cleanup_queue(n->queue);
209err_out_exit:
210 return err;
211}
212
213/*
214 * Sysfs machinery: show device's size.
215 */
216static ssize_t dst_show_size(struct device *dev,
217 struct device_attribute *attr, char *buf)
218{
219 struct dst_info *info = container_of(dev, struct dst_info, device);
220
221 return sprintf(buf, "%llu\n", info->size);
222}
223
224/*
225 * Show local exported device.
226 */
227static ssize_t dst_show_local(struct device *dev,
228 struct device_attribute *attr, char *buf)
229{
230 struct dst_info *info = container_of(dev, struct dst_info, device);
231
232 return sprintf(buf, "%s\n", info->local);
233}
234
235/*
236 * Shows type of the remote node - device major/minor number
237 * for local nodes and address (af_inet ipv4/ipv6 only) for remote nodes.
238 */
239static ssize_t dst_show_type(struct device *dev,
240 struct device_attribute *attr, char *buf)
241{
242 struct dst_info *info = container_of(dev, struct dst_info, device);
243 int family = info->net.addr.sa_family;
244
245 if (family == AF_INET) {
246 struct sockaddr_in *sin = (struct sockaddr_in *)&info->net.addr;
247 return sprintf(buf, "%u.%u.%u.%u:%d\n",
248 NIPQUAD(sin->sin_addr.s_addr), ntohs(sin->sin_port));
249 } else if (family == AF_INET6) {
250 struct sockaddr_in6 *sin = (struct sockaddr_in6 *)
251 &info->net.addr;
252 return sprintf(buf,
253 "%pi6:%d\n",
254 &sin->sin6_addr, ntohs(sin->sin6_port));
255 } else {
256 int i, sz = PAGE_SIZE - 2; /* 0 symbol and '\n' below */
257 int size, addrlen = info->net.addr.sa_data_len;
258 unsigned char *a = (unsigned char *)&info->net.addr.sa_data;
259 char *buf_orig = buf;
260
261 size = snprintf(buf, sz, "family: %d, addrlen: %u, addr: ",
262 family, addrlen);
263 sz -= size;
264 buf += size;
265
266 for (i = 0; i < addrlen; ++i) {
267 if (sz < 3)
268 break;
269
270 size = snprintf(buf, sz, "%02x ", a[i]);
271 sz -= size;
272 buf += size;
273 }
274 buf += sprintf(buf, "\n");
275
276 return buf - buf_orig;
277 }
278 return 0;
279}
280
281static struct device_attribute dst_node_attrs[] = {
282 __ATTR(size, 0444, dst_show_size, NULL),
283 __ATTR(type, 0444, dst_show_type, NULL),
284 __ATTR(local, 0444, dst_show_local, NULL),
285};
286
287static int dst_create_node_attributes(struct dst_node *n)
288{
289 int err, i;
290
291 for (i = 0; i < ARRAY_SIZE(dst_node_attrs); ++i) {
292 err = device_create_file(&n->info->device,
293 &dst_node_attrs[i]);
294 if (err)
295 goto err_out_remove_all;
296 }
297 return 0;
298
299err_out_remove_all:
300 while (--i >= 0)
301 device_remove_file(&n->info->device,
302 &dst_node_attrs[i]);
303
304 return err;
305}
306
307static void dst_remove_node_attributes(struct dst_node *n)
308{
309 int i;
310
311 for (i = 0; i < ARRAY_SIZE(dst_node_attrs); ++i)
312 device_remove_file(&n->info->device,
313 &dst_node_attrs[i]);
314}
315
316/*
317 * Sysfs cleanup and initialization.
318 * Shows number of useful parameters.
319 */
320static void dst_node_sysfs_exit(struct dst_node *n)
321{
322 if (n->info) {
323 dst_remove_node_attributes(n);
324 device_unregister(&n->info->device);
325 n->info = NULL;
326 }
327}
328
329static int dst_node_sysfs_init(struct dst_node *n)
330{
331 int err;
332
333 n->info = kzalloc(sizeof(struct dst_info), GFP_KERNEL);
334 if (!n->info)
335 return -ENOMEM;
336
337 memcpy(&n->info->device, &dst_node_dev, sizeof(struct device));
338 n->info->size = n->size;
339
340 dev_set_name(&n->info->device, "dst-%s", n->name);
341 err = device_register(&n->info->device);
342 if (err) {
343 dprintk(KERN_ERR "Failed to register node '%s', err: %d.\n",
344 n->name, err);
345 goto err_out_exit;
346 }
347
348 dst_create_node_attributes(n);
349
350 return 0;
351
352err_out_exit:
353 kfree(n->info);
354 n->info = NULL;
355 return err;
356}
357
358/*
359 * DST node hash tables machinery.
360 */
361static inline unsigned int dst_hash(char *str, unsigned int size)
362{
363 return jhash(str, size, 0) % dst_hashtable_size;
364}
365
366static void dst_node_remove(struct dst_node *n)
367{
368 mutex_lock(&dst_hash_lock);
369 list_del_init(&n->node_entry);
370 mutex_unlock(&dst_hash_lock);
371}
372
373static void dst_node_add(struct dst_node *n)
374{
375 unsigned hash = dst_hash(n->name, sizeof(n->name));
376
377 mutex_lock(&dst_hash_lock);
378 list_add_tail(&n->node_entry, &dst_hashtable[hash]);
379 mutex_unlock(&dst_hash_lock);
380}
381
382/*
383 * Cleaning node when it is about to be freed.
384 * There are still users of the socket though,
385 * so connection cleanup should be protected.
386 */
387static void dst_node_cleanup(struct dst_node *n)
388{
389 struct dst_state *st = n->state;
390
391 if (!st)
392 return;
393
394 if (n->queue) {
395 blk_cleanup_queue(n->queue);
396
397 mutex_lock(&dst_hash_lock);
398 idr_remove(&dst_index_idr, n->disk->first_minor);
399 mutex_unlock(&dst_hash_lock);
400
401 put_disk(n->disk);
402 }
403
404 if (n->bdev) {
405 sync_blockdev(n->bdev);
406 blkdev_put(n->bdev, FMODE_READ|FMODE_WRITE);
407 }
408
409 dst_state_lock(st);
410 st->need_exit = 1;
411 dst_state_exit_connected(st);
412 dst_state_unlock(st);
413
414 wake_up(&st->thread_wait);
415
416 dst_state_put(st);
417 n->state = NULL;
418}
419
420/*
421 * Free security attributes attached to given node.
422 */
423static void dst_security_exit(struct dst_node *n)
424{
425 struct dst_secure *s, *tmp;
426
427 list_for_each_entry_safe(s, tmp, &n->security_list, sec_entry) {
428 list_del(&s->sec_entry);
429 kfree(s);
430 }
431}
432
433/*
434 * Free node when there are no more users.
435 * Actually node has to be freed on behalf od userspace process,
436 * since there are number of threads, which are embedded in the
437 * node, so they can not exit and free node from there, that is
438 * why there is a wakeup if reference counter is not equal to zero.
439 */
440void dst_node_put(struct dst_node *n)
441{
442 if (unlikely(!n))
443 return;
444
445 dprintk("%s: n: %p, refcnt: %d.\n",
446 __func__, n, atomic_read(&n->refcnt));
447
448 if (atomic_dec_and_test(&n->refcnt)) {
449 dst_node_remove(n);
450 n->trans_scan_timeout = 0;
451 dst_node_cleanup(n);
452 thread_pool_destroy(n->pool);
453 dst_node_sysfs_exit(n);
454 dst_node_crypto_exit(n);
455 dst_security_exit(n);
456 dst_node_trans_exit(n);
457
458 kfree(n);
459
460 dprintk("%s: freed n: %p.\n", __func__, n);
461 } else {
462 wake_up(&n->wait);
463 }
464}
465
466/*
467 * This function finds devices major/minor numbers for given pathname.
468 */
469static int dst_lookup_device(const char *path, dev_t *dev)
470{
471 int err;
472 struct nameidata nd;
473 struct inode *inode;
474
475 err = path_lookup(path, LOOKUP_FOLLOW, &nd);
476 if (err)
477 return err;
478
479 inode = nd.path.dentry->d_inode;
480 if (!inode) {
481 err = -ENOENT;
482 goto out;
483 }
484
485 if (!S_ISBLK(inode->i_mode)) {
486 err = -ENOTBLK;
487 goto out;
488 }
489
490 *dev = inode->i_rdev;
491
492out:
493 path_put(&nd.path);
494 return err;
495}
496
497/*
498 * Setting up export device: lookup by the name, get its size
499 * and setup listening socket, which will accept clients, which
500 * will submit IO for given storage.
501 */
502static int dst_setup_export(struct dst_node *n, struct dst_ctl *ctl,
503 struct dst_export_ctl *le)
504{
505 int err;
506 dev_t dev = 0; /* gcc likes to scream here */
507
508 snprintf(n->info->local, sizeof(n->info->local), "%s", le->device);
509
510 err = dst_lookup_device(le->device, &dev);
511 if (err)
512 return err;
513
514 n->bdev = open_by_devnum(dev, FMODE_READ|FMODE_WRITE);
515 if (!n->bdev)
516 return -ENODEV;
517
518 if (n->size != 0)
519 n->size = min_t(loff_t, n->bdev->bd_inode->i_size, n->size);
520 else
521 n->size = n->bdev->bd_inode->i_size;
522
523 n->info->size = n->size;
524 err = dst_node_init_listened(n, le);
525 if (err)
526 goto err_out_cleanup;
527
528 return 0;
529
530err_out_cleanup:
531 blkdev_put(n->bdev, FMODE_READ|FMODE_WRITE);
532 n->bdev = NULL;
533
534 return err;
535}
536
537/* Empty thread pool callbacks for the network processing threads. */
538static inline void *dst_thread_network_init(void *data)
539{
540 dprintk("%s: data: %p.\n", __func__, data);
541 return data;
542}
543
544static inline void dst_thread_network_cleanup(void *data)
545{
546 dprintk("%s: data: %p.\n", __func__, data);
547}
548
549/*
550 * Allocate DST node and initialize some of its parameters.
551 */
552static struct dst_node *dst_alloc_node(struct dst_ctl *ctl,
553 int (*start)(struct dst_node *),
554 int num)
555{
556 struct dst_node *n;
557 int err;
558
559 n = kzalloc(sizeof(struct dst_node), GFP_KERNEL);
560 if (!n)
561 return NULL;
562
563 INIT_LIST_HEAD(&n->node_entry);
564
565 INIT_LIST_HEAD(&n->security_list);
566 mutex_init(&n->security_lock);
567
568 init_waitqueue_head(&n->wait);
569
570 n->trans_scan_timeout = msecs_to_jiffies(ctl->trans_scan_timeout);
571 if (!n->trans_scan_timeout)
572 n->trans_scan_timeout = HZ;
573
574 n->trans_max_retries = ctl->trans_max_retries;
575 if (!n->trans_max_retries)
576 n->trans_max_retries = 10;
577
578 /*
579 * Pretty much arbitrary default numbers.
580 * 32 matches maximum number of pages in bio originated from ext3 (31).
581 */
582 n->max_pages = ctl->max_pages;
583 if (!n->max_pages)
584 n->max_pages = 32;
585
586 if (n->max_pages > 1024)
587 n->max_pages = 1024;
588
589 n->start = start;
590 n->size = ctl->size;
591
592 atomic_set(&n->refcnt, 1);
593 atomic_long_set(&n->gen, 0);
594 snprintf(n->name, sizeof(n->name), "%s", ctl->name);
595
596 err = dst_node_sysfs_init(n);
597 if (err)
598 goto err_out_free;
599
600 n->pool = thread_pool_create(num, n->name, dst_thread_network_init,
601 dst_thread_network_cleanup, n);
602 if (IS_ERR(n->pool)) {
603 err = PTR_ERR(n->pool);
604 goto err_out_sysfs_exit;
605 }
606
607 dprintk("%s: n: %p, name: %s.\n", __func__, n, n->name);
608
609 return n;
610
611err_out_sysfs_exit:
612 dst_node_sysfs_exit(n);
613err_out_free:
614 kfree(n);
615 return NULL;
616}
617
618/*
619 * Starting a node, connected to the remote server:
620 * register block device and initialize transaction mechanism.
621 * In revers order though.
622 *
623 * It will autonegotiate some parameters with the remote node
624 * and update local if needed.
625 *
626 * Transaction initialization should be the last thing before
627 * starting the node, since transaction should include not only
628 * block IO, but also crypto related data (if any), which are
629 * initialized separately.
630 */
631static int dst_start_remote(struct dst_node *n)
632{
633 int err;
634
635 err = dst_node_trans_init(n, sizeof(struct dst_trans));
636 if (err)
637 return err;
638
639 err = dst_node_create_disk(n);
640 if (err)
641 return err;
642
643 dst_node_set_size(n);
644 add_disk(n->disk);
645
646 dprintk("DST: started remote node '%s', minor: %d.\n",
647 n->name, n->disk->first_minor);
648
649 return 0;
650}
651
652/*
653 * Adding remote node and initialize connection.
654 */
655static int dst_add_remote(struct dst_node *n, struct dst_ctl *ctl,
656 void *data, unsigned int size)
657{
658 int err;
659 struct dst_network_ctl *rctl = data;
660
661 if (n)
662 return -EEXIST;
663
664 if (size != sizeof(struct dst_network_ctl))
665 return -EINVAL;
666
667 n = dst_alloc_node(ctl, dst_start_remote, 1);
668 if (!n)
669 return -ENOMEM;
670
671 memcpy(&n->info->net, rctl, sizeof(struct dst_network_ctl));
672 err = dst_node_init_connected(n, rctl);
673 if (err)
674 goto err_out_free;
675
676 dst_node_add(n);
677
678 return 0;
679
680err_out_free:
681 dst_node_put(n);
682 return err;
683}
684
685/*
686 * Adding export node: initializing block device and listening socket.
687 */
688static int dst_add_export(struct dst_node *n, struct dst_ctl *ctl,
689 void *data, unsigned int size)
690{
691 int err;
692 struct dst_export_ctl *le = data;
693
694 if (n)
695 return -EEXIST;
696
697 if (size != sizeof(struct dst_export_ctl))
698 return -EINVAL;
699
700 n = dst_alloc_node(ctl, dst_start_export, 2);
701 if (!n)
702 return -EINVAL;
703
704 err = dst_setup_export(n, ctl, le);
705 if (err)
706 goto err_out_free;
707
708 dst_node_add(n);
709
710 return 0;
711
712err_out_free:
713 dst_node_put(n);
714 return err;
715}
716
717static int dst_node_remove_unload(struct dst_node *n)
718{
719 printk(KERN_INFO "STOPPED name: '%s', size: %llu.\n",
720 n->name, n->size);
721
722 if (n->disk)
723 del_gendisk(n->disk);
724
725 dst_node_remove(n);
726 dst_node_sysfs_exit(n);
727
728 /*
729 * This is not a hack. Really.
730 * Node's reference counter allows to implement fine grained
731 * node freeing, but since all transactions (which hold node's
732 * reference counter) are processed in the dedicated thread,
733 * it is possible that reference will hit zero in that thread,
734 * so we will not be able to exit thread and cleanup the node.
735 *
736 * So, we remove disk, so no new activity is possible, and
737 * wait until all pending transaction are completed (either
738 * in receiving thread or by timeout in workqueue), in this
739 * case reference counter will be less or equal to 2 (once set in
740 * dst_alloc_node() and then in connector message parser;
741 * or when we force module unloading, and connector message
742 * parser does not hold a reference, in this case reference
743 * counter will be equal to 1),
744 * and subsequent dst_node_put() calls will free the node.
745 */
746 dprintk("%s: going to sleep with %d refcnt.\n",
747 __func__, atomic_read(&n->refcnt));
748 wait_event(n->wait, atomic_read(&n->refcnt) <= 2);
749
750 dst_node_put(n);
751 return 0;
752}
753
754/*
755 * Remove node from the hash table.
756 */
757static int dst_del_node(struct dst_node *n, struct dst_ctl *ctl,
758 void *data, unsigned int size)
759{
760 if (!n)
761 return -ENODEV;
762
763 return dst_node_remove_unload(n);
764}
765
766/*
767 * Initialize crypto processing for given node.
768 */
769static int dst_crypto_init(struct dst_node *n, struct dst_ctl *ctl,
770 void *data, unsigned int size)
771{
772 struct dst_crypto_ctl *crypto = data;
773
774 if (!n)
775 return -ENODEV;
776
777 if (size != sizeof(struct dst_crypto_ctl) + crypto->hash_keysize +
778 crypto->cipher_keysize)
779 return -EINVAL;
780
781 if (n->trans_cache)
782 return -EEXIST;
783
784 return dst_node_crypto_init(n, crypto);
785}
786
787/*
788 * Security attributes for given node.
789 */
790static int dst_security_init(struct dst_node *n, struct dst_ctl *ctl,
791 void *data, unsigned int size)
792{
793 struct dst_secure *s;
794
795 if (!n)
796 return -ENODEV;
797
798 if (size != sizeof(struct dst_secure_user))
799 return -EINVAL;
800
801 s = kmalloc(sizeof(struct dst_secure), GFP_KERNEL);
802 if (!s)
803 return -ENOMEM;
804
805 memcpy(&s->sec, data, size);
806
807 mutex_lock(&n->security_lock);
808 list_add_tail(&s->sec_entry, &n->security_list);
809 mutex_unlock(&n->security_lock);
810
811 return 0;
812}
813
814/*
815 * Kill'em all!
816 */
817static int dst_start_node(struct dst_node *n, struct dst_ctl *ctl,
818 void *data, unsigned int size)
819{
820 int err;
821
822 if (!n)
823 return -ENODEV;
824
825 if (n->trans_cache)
826 return 0;
827
828 err = n->start(n);
829 if (err)
830 return err;
831
832 printk(KERN_INFO "STARTED name: '%s', size: %llu.\n", n->name, n->size);
833 return 0;
834}
835
836typedef int (*dst_command_func)(struct dst_node *n, struct dst_ctl *ctl,
837 void *data, unsigned int size);
838
839/*
840 * List of userspace commands.
841 */
842static dst_command_func dst_commands[] = {
843 [DST_ADD_REMOTE] = &dst_add_remote,
844 [DST_ADD_EXPORT] = &dst_add_export,
845 [DST_DEL_NODE] = &dst_del_node,
846 [DST_CRYPTO] = &dst_crypto_init,
847 [DST_SECURITY] = &dst_security_init,
848 [DST_START] = &dst_start_node,
849};
850
851/*
852 * Configuration parser.
853 */
854static void cn_dst_callback(struct cn_msg *msg, struct netlink_skb_parms *nsp)
855{
856 struct dst_ctl *ctl;
857 int err;
858 struct dst_ctl_ack ack;
859 struct dst_node *n = NULL, *tmp;
860 unsigned int hash;
861
862 if (!cap_raised(nsp->eff_cap, CAP_SYS_ADMIN)) {
863 err = -EPERM;
864 goto out;
865 }
866
867 if (msg->len < sizeof(struct dst_ctl)) {
868 err = -EBADMSG;
869 goto out;
870 }
871
872 ctl = (struct dst_ctl *)msg->data;
873
874 if (ctl->cmd >= DST_CMD_MAX) {
875 err = -EINVAL;
876 goto out;
877 }
878 hash = dst_hash(ctl->name, sizeof(ctl->name));
879
880 mutex_lock(&dst_hash_lock);
881 list_for_each_entry(tmp, &dst_hashtable[hash], node_entry) {
882 if (!memcmp(tmp->name, ctl->name, sizeof(tmp->name))) {
883 n = tmp;
884 dst_node_get(n);
885 break;
886 }
887 }
888 mutex_unlock(&dst_hash_lock);
889
890 err = dst_commands[ctl->cmd](n, ctl, msg->data + sizeof(struct dst_ctl),
891 msg->len - sizeof(struct dst_ctl));
892
893 dst_node_put(n);
894out:
895 memcpy(&ack.msg, msg, sizeof(struct cn_msg));
896
897 ack.msg.ack = msg->ack + 1;
898 ack.msg.len = sizeof(struct dst_ctl_ack) - sizeof(struct cn_msg);
899
900 ack.error = err;
901
902 cn_netlink_send(&ack.msg, 0, GFP_KERNEL);
903}
904
905/*
906 * Global initialization: sysfs, hash table, block device registration,
907 * connector and various caches.
908 */
909static int __init dst_sysfs_init(void)
910{
911 return bus_register(&dst_dev_bus_type);
912}
913
914static void dst_sysfs_exit(void)
915{
916 bus_unregister(&dst_dev_bus_type);
917}
918
919static int __init dst_hashtable_init(void)
920{
921 unsigned int i;
922
923 dst_hashtable = kcalloc(dst_hashtable_size, sizeof(struct list_head),
924 GFP_KERNEL);
925 if (!dst_hashtable)
926 return -ENOMEM;
927
928 for (i = 0; i < dst_hashtable_size; ++i)
929 INIT_LIST_HEAD(&dst_hashtable[i]);
930
931 return 0;
932}
933
934static void dst_hashtable_exit(void)
935{
936 unsigned int i;
937 struct dst_node *n, *tmp;
938
939 for (i = 0; i < dst_hashtable_size; ++i) {
940 list_for_each_entry_safe(n, tmp, &dst_hashtable[i], node_entry) {
941 dst_node_remove_unload(n);
942 }
943 }
944
945 kfree(dst_hashtable);
946}
947
948static int __init dst_sys_init(void)
949{
950 int err = -ENOMEM;
951
952 err = dst_hashtable_init();
953 if (err)
954 goto err_out_exit;
955
956 err = dst_export_init();
957 if (err)
958 goto err_out_hashtable_exit;
959
960 err = register_blkdev(dst_major, DST_NAME);
961 if (err < 0)
962 goto err_out_export_exit;
963 if (err)
964 dst_major = err;
965
966 err = dst_sysfs_init();
967 if (err)
968 goto err_out_unregister;
969
970 err = cn_add_callback(&cn_dst_id, "DST", cn_dst_callback);
971 if (err)
972 goto err_out_sysfs_exit;
973
974 printk(KERN_INFO "Distributed storage, '%s' release.\n", dst_name);
975
976 return 0;
977
978err_out_sysfs_exit:
979 dst_sysfs_exit();
980err_out_unregister:
981 unregister_blkdev(dst_major, DST_NAME);
982err_out_export_exit:
983 dst_export_exit();
984err_out_hashtable_exit:
985 dst_hashtable_exit();
986err_out_exit:
987 return err;
988}
989
990static void __exit dst_sys_exit(void)
991{
992 cn_del_callback(&cn_dst_id);
993 unregister_blkdev(dst_major, DST_NAME);
994 dst_hashtable_exit();
995 dst_sysfs_exit();
996 dst_export_exit();
997}
998
999module_init(dst_sys_init);
1000module_exit(dst_sys_exit);
1001
1002MODULE_DESCRIPTION("Distributed storage");
1003MODULE_AUTHOR("Evgeniy Polyakov <zbr@ioremap.net>");
1004MODULE_LICENSE("GPL");
diff --git a/drivers/staging/dst/export.c b/drivers/staging/dst/export.c
deleted file mode 100644
index c324230e8b60..000000000000
--- a/drivers/staging/dst/export.c
+++ /dev/null
@@ -1,660 +0,0 @@
1/*
2 * 2007+ Copyright (c) Evgeniy Polyakov <zbr@ioremap.net>
3 * All rights reserved.
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 */
15
16#include <linux/blkdev.h>
17#include <linux/bio.h>
18#include <linux/dst.h>
19#include <linux/in.h>
20#include <linux/in6.h>
21#include <linux/poll.h>
22#include <linux/slab.h>
23#include <linux/socket.h>
24
25#include <net/sock.h>
26
27/*
28 * Export bioset is used for server block IO requests.
29 */
30static struct bio_set *dst_bio_set;
31
32int __init dst_export_init(void)
33{
34 int err = -ENOMEM;
35
36 dst_bio_set = bioset_create(32, sizeof(struct dst_export_priv));
37 if (!dst_bio_set)
38 goto err_out_exit;
39
40 return 0;
41
42err_out_exit:
43 return err;
44}
45
46void dst_export_exit(void)
47{
48 bioset_free(dst_bio_set);
49}
50
51/*
52 * When client connects and autonegotiates with the server node,
53 * its permissions are checked in a security attributes and sent
54 * back.
55 */
56static unsigned int dst_check_permissions(struct dst_state *main,
57 struct dst_state *st)
58{
59 struct dst_node *n = main->node;
60 struct dst_secure *sentry;
61 struct dst_secure_user *s;
62 struct saddr *sa = &st->ctl.addr;
63 unsigned int perm = 0;
64
65 mutex_lock(&n->security_lock);
66 list_for_each_entry(sentry, &n->security_list, sec_entry) {
67 s = &sentry->sec;
68
69 if (s->addr.sa_family != sa->sa_family)
70 continue;
71
72 if (s->addr.sa_data_len != sa->sa_data_len)
73 continue;
74
75 /*
76 * This '2' below is a port field. This may be very wrong to do
77 * in atalk for example though. If there will be any need
78 * to extent protocol to something else, I can create
79 * per-family helpers and use them instead of this memcmp.
80 */
81 if (memcmp(s->addr.sa_data + 2, sa->sa_data + 2,
82 sa->sa_data_len - 2))
83 continue;
84
85 perm = s->permissions;
86 }
87 mutex_unlock(&n->security_lock);
88
89 return perm;
90}
91
92/*
93 * Accept new client: allocate appropriate network state and check permissions.
94 */
95static struct dst_state *dst_accept_client(struct dst_state *st)
96{
97 unsigned int revents = 0;
98 unsigned int err_mask = POLLERR | POLLHUP | POLLRDHUP;
99 unsigned int mask = err_mask | POLLIN;
100 struct dst_node *n = st->node;
101 int err = 0;
102 struct socket *sock = NULL;
103 struct dst_state *new;
104
105 while (!err && !sock) {
106 revents = dst_state_poll(st);
107
108 if (!(revents & mask)) {
109 DEFINE_WAIT(wait);
110
111 for (;;) {
112 prepare_to_wait(&st->thread_wait,
113 &wait, TASK_INTERRUPTIBLE);
114 if (!n->trans_scan_timeout || st->need_exit)
115 break;
116
117 revents = dst_state_poll(st);
118
119 if (revents & mask)
120 break;
121
122 if (signal_pending(current))
123 break;
124
125 /*
126 * Magic HZ? Polling check above is not safe in
127 * all cases (like socket reset in BH context),
128 * so it is simpler just to postpone it to the
129 * process context instead of implementing
130 * special locking there.
131 */
132 schedule_timeout(HZ);
133 }
134 finish_wait(&st->thread_wait, &wait);
135 }
136
137 err = -ECONNRESET;
138 dst_state_lock(st);
139
140 dprintk("%s: st: %p, revents: %x [err: %d, in: %d].\n",
141 __func__, st, revents, revents & err_mask,
142 revents & POLLIN);
143
144 if (revents & err_mask) {
145 dprintk("%s: revents: %x, socket: %p, err: %d.\n",
146 __func__, revents, st->socket, err);
147 err = -ECONNRESET;
148 }
149
150 if (!n->trans_scan_timeout || st->need_exit)
151 err = -ENODEV;
152
153 if (st->socket && (revents & POLLIN))
154 err = kernel_accept(st->socket, &sock, 0);
155
156 dst_state_unlock(st);
157 }
158
159 if (err)
160 goto err_out_exit;
161
162 new = dst_state_alloc(st->node);
163 if (IS_ERR(new)) {
164 err = -ENOMEM;
165 goto err_out_release;
166 }
167 new->socket = sock;
168
169 new->ctl.addr.sa_data_len = sizeof(struct sockaddr);
170 err = kernel_getpeername(sock, (struct sockaddr *)&new->ctl.addr,
171 (int *)&new->ctl.addr.sa_data_len);
172 if (err)
173 goto err_out_put;
174
175 new->permissions = dst_check_permissions(st, new);
176 if (new->permissions == 0) {
177 err = -EPERM;
178 dst_dump_addr(sock, (struct sockaddr *)&new->ctl.addr,
179 "Client is not allowed to connect");
180 goto err_out_put;
181 }
182
183 err = dst_poll_init(new);
184 if (err)
185 goto err_out_put;
186
187 dst_dump_addr(sock, (struct sockaddr *)&new->ctl.addr,
188 "Connected client");
189
190 return new;
191
192err_out_put:
193 dst_state_put(new);
194err_out_release:
195 sock_release(sock);
196err_out_exit:
197 return ERR_PTR(err);
198}
199
200/*
201 * Each server's block request sometime finishes.
202 * Usually it happens in hard irq context of the appropriate controller,
203 * so to play good with all cases we just queue BIO into the queue
204 * and wake up processing thread, which gets completed request and
205 * send (encrypting if needed) it back to the client (if it was a read
206 * request), or sends back reply that writing successfully completed.
207 */
208static int dst_export_process_request_queue(struct dst_state *st)
209{
210 unsigned long flags;
211 struct dst_export_priv *p = NULL;
212 struct bio *bio;
213 int err = 0;
214
215 while (!list_empty(&st->request_list)) {
216 spin_lock_irqsave(&st->request_lock, flags);
217 if (!list_empty(&st->request_list)) {
218 p = list_first_entry(&st->request_list,
219 struct dst_export_priv, request_entry);
220 list_del(&p->request_entry);
221 }
222 spin_unlock_irqrestore(&st->request_lock, flags);
223
224 if (!p)
225 break;
226
227 bio = p->bio;
228
229 if (dst_need_crypto(st->node) && (bio_data_dir(bio) == READ))
230 err = dst_export_crypto(st->node, bio);
231 else
232 err = dst_export_send_bio(bio);
233
234 if (err)
235 break;
236 }
237
238 return err;
239}
240
241/*
242 * Cleanup export state.
243 * It has to wait until all requests are finished,
244 * and then free them all.
245 */
246static void dst_state_cleanup_export(struct dst_state *st)
247{
248 struct dst_export_priv *p;
249 unsigned long flags;
250
251 /*
252 * This loop waits for all pending bios to be completed and freed.
253 */
254 while (atomic_read(&st->refcnt) > 1) {
255 dprintk("%s: st: %p, refcnt: %d, list_empty: %d.\n",
256 __func__, st, atomic_read(&st->refcnt),
257 list_empty(&st->request_list));
258 wait_event_timeout(st->thread_wait,
259 (atomic_read(&st->refcnt) == 1) ||
260 !list_empty(&st->request_list),
261 HZ/2);
262
263 while (!list_empty(&st->request_list)) {
264 p = NULL;
265 spin_lock_irqsave(&st->request_lock, flags);
266 if (!list_empty(&st->request_list)) {
267 p = list_first_entry(&st->request_list,
268 struct dst_export_priv, request_entry);
269 list_del(&p->request_entry);
270 }
271 spin_unlock_irqrestore(&st->request_lock, flags);
272
273 if (p)
274 bio_put(p->bio);
275
276 dprintk("%s: st: %p, refcnt: %d, list_empty: %d, p: "
277 "%p.\n", __func__, st, atomic_read(&st->refcnt),
278 list_empty(&st->request_list), p);
279 }
280 }
281
282 dst_state_put(st);
283}
284
285/*
286 * Client accepting thread.
287 * Not only accepts new connection, but also schedules receiving thread
288 * and performs request completion described above.
289 */
290static int dst_accept(void *init_data, void *schedule_data)
291{
292 struct dst_state *main_st = schedule_data;
293 struct dst_node *n = init_data;
294 struct dst_state *st;
295 int err;
296
297 while (n->trans_scan_timeout && !main_st->need_exit) {
298 dprintk("%s: main_st: %p, n: %p.\n", __func__, main_st, n);
299 st = dst_accept_client(main_st);
300 if (IS_ERR(st))
301 continue;
302
303 err = dst_state_schedule_receiver(st);
304 if (!err) {
305 while (n->trans_scan_timeout) {
306 err = wait_event_interruptible_timeout(st->thread_wait,
307 !list_empty(&st->request_list) ||
308 !n->trans_scan_timeout ||
309 st->need_exit,
310 HZ);
311
312 if (!n->trans_scan_timeout || st->need_exit)
313 break;
314
315 if (list_empty(&st->request_list))
316 continue;
317
318 err = dst_export_process_request_queue(st);
319 if (err)
320 break;
321 }
322
323 st->need_exit = 1;
324 wake_up(&st->thread_wait);
325 }
326
327 dst_state_cleanup_export(st);
328 }
329
330 dprintk("%s: freeing listening socket st: %p.\n", __func__, main_st);
331
332 dst_state_lock(main_st);
333 dst_poll_exit(main_st);
334 dst_state_socket_release(main_st);
335 dst_state_unlock(main_st);
336 dst_state_put(main_st);
337 dprintk("%s: freed listening socket st: %p.\n", __func__, main_st);
338
339 return 0;
340}
341
342int dst_start_export(struct dst_node *n)
343{
344 if (list_empty(&n->security_list)) {
345 printk(KERN_ERR "You are trying to export node '%s' "
346 "without security attributes.\nNo clients will "
347 "be allowed to connect. Exiting.\n", n->name);
348 return -EINVAL;
349 }
350 return dst_node_trans_init(n, sizeof(struct dst_export_priv));
351}
352
353/*
354 * Initialize listening state and schedule accepting thread.
355 */
356int dst_node_init_listened(struct dst_node *n, struct dst_export_ctl *le)
357{
358 struct dst_state *st;
359 int err = -ENOMEM;
360 struct dst_network_ctl *ctl = &le->ctl;
361
362 memcpy(&n->info->net, ctl, sizeof(struct dst_network_ctl));
363
364 st = dst_state_alloc(n);
365 if (IS_ERR(st)) {
366 err = PTR_ERR(st);
367 goto err_out_exit;
368 }
369 memcpy(&st->ctl, ctl, sizeof(struct dst_network_ctl));
370
371 err = dst_state_socket_create(st);
372 if (err)
373 goto err_out_put;
374
375 st->socket->sk->sk_reuse = 1;
376
377 err = kernel_bind(st->socket, (struct sockaddr *)&ctl->addr,
378 ctl->addr.sa_data_len);
379 if (err)
380 goto err_out_socket_release;
381
382 err = kernel_listen(st->socket, 1024);
383 if (err)
384 goto err_out_socket_release;
385 n->state = st;
386
387 err = dst_poll_init(st);
388 if (err)
389 goto err_out_socket_release;
390
391 dst_state_get(st);
392
393 err = thread_pool_schedule(n->pool, dst_thread_setup,
394 dst_accept, st, MAX_SCHEDULE_TIMEOUT);
395 if (err)
396 goto err_out_poll_exit;
397
398 return 0;
399
400err_out_poll_exit:
401 dst_poll_exit(st);
402err_out_socket_release:
403 dst_state_socket_release(st);
404err_out_put:
405 dst_state_put(st);
406err_out_exit:
407 n->state = NULL;
408 return err;
409}
410
411/*
412 * Free bio and related private data.
413 * Also drop a reference counter for appropriate state,
414 * which waits when there are no more block IOs in-flight.
415 */
416static void dst_bio_destructor(struct bio *bio)
417{
418 struct bio_vec *bv;
419 struct dst_export_priv *priv = bio->bi_private;
420 int i;
421
422 bio_for_each_segment(bv, bio, i) {
423 if (!bv->bv_page)
424 break;
425
426 __free_page(bv->bv_page);
427 }
428
429 if (priv)
430 dst_state_put(priv->state);
431 bio_free(bio, dst_bio_set);
432}
433
434/*
435 * Block IO completion. Queue request to be sent back to
436 * the client (or just confirmation).
437 */
438static void dst_bio_end_io(struct bio *bio, int err)
439{
440 struct dst_export_priv *p = bio->bi_private;
441 struct dst_state *st = p->state;
442 unsigned long flags;
443
444 spin_lock_irqsave(&st->request_lock, flags);
445 list_add_tail(&p->request_entry, &st->request_list);
446 spin_unlock_irqrestore(&st->request_lock, flags);
447
448 wake_up(&st->thread_wait);
449}
450
451/*
452 * Allocate read request for the server.
453 */
454static int dst_export_read_request(struct bio *bio, unsigned int total_size)
455{
456 unsigned int size;
457 struct page *page;
458 int err;
459
460 while (total_size) {
461 err = -ENOMEM;
462 page = alloc_page(GFP_KERNEL);
463 if (!page)
464 goto err_out_exit;
465
466 size = min_t(unsigned int, PAGE_SIZE, total_size);
467
468 err = bio_add_page(bio, page, size, 0);
469 dprintk("%s: bio: %llu/%u, size: %u, err: %d.\n",
470 __func__, (u64)bio->bi_sector, bio->bi_size,
471 size, err);
472 if (err <= 0)
473 goto err_out_free_page;
474
475 total_size -= size;
476 }
477
478 return 0;
479
480err_out_free_page:
481 __free_page(page);
482err_out_exit:
483 return err;
484}
485
486/*
487 * Allocate write request for the server.
488 * Should not only get pages, but also read data from the network.
489 */
490static int dst_export_write_request(struct dst_state *st,
491 struct bio *bio, unsigned int total_size)
492{
493 unsigned int size;
494 struct page *page;
495 void *data;
496 int err;
497
498 while (total_size) {
499 err = -ENOMEM;
500 page = alloc_page(GFP_KERNEL);
501 if (!page)
502 goto err_out_exit;
503
504 data = kmap(page);
505 if (!data)
506 goto err_out_free_page;
507
508 size = min_t(unsigned int, PAGE_SIZE, total_size);
509
510 err = dst_data_recv(st, data, size);
511 if (err)
512 goto err_out_unmap_page;
513
514 err = bio_add_page(bio, page, size, 0);
515 if (err <= 0)
516 goto err_out_unmap_page;
517
518 kunmap(page);
519
520 total_size -= size;
521 }
522
523 return 0;
524
525err_out_unmap_page:
526 kunmap(page);
527err_out_free_page:
528 __free_page(page);
529err_out_exit:
530 return err;
531}
532
533/*
534 * Groovy, we've gotten an IO request from the client.
535 * Allocate BIO from the bioset, private data from the mempool
536 * and lots of pages for IO.
537 */
538int dst_process_io(struct dst_state *st)
539{
540 struct dst_node *n = st->node;
541 struct dst_cmd *cmd = st->data;
542 struct bio *bio;
543 struct dst_export_priv *priv;
544 int err = -ENOMEM;
545
546 if (unlikely(!n->bdev)) {
547 err = -EINVAL;
548 goto err_out_exit;
549 }
550
551 bio = bio_alloc_bioset(GFP_KERNEL,
552 PAGE_ALIGN(cmd->size) >> PAGE_SHIFT,
553 dst_bio_set);
554 if (!bio)
555 goto err_out_exit;
556
557 priv = (struct dst_export_priv *)(((void *)bio) -
558 sizeof (struct dst_export_priv));
559
560 priv->state = dst_state_get(st);
561 priv->bio = bio;
562
563 bio->bi_private = priv;
564 bio->bi_end_io = dst_bio_end_io;
565 bio->bi_destructor = dst_bio_destructor;
566 bio->bi_bdev = n->bdev;
567
568 /*
569 * Server side is only interested in two low bits:
570 * uptodate (set by itself actually) and rw block
571 */
572 bio->bi_flags |= cmd->flags & 3;
573
574 bio->bi_rw = cmd->rw;
575 bio->bi_size = 0;
576 bio->bi_sector = cmd->sector;
577
578 dst_bio_to_cmd(bio, &priv->cmd, DST_IO_RESPONSE, cmd->id);
579
580 priv->cmd.flags = 0;
581 priv->cmd.size = cmd->size;
582
583 if (bio_data_dir(bio) == WRITE) {
584 err = dst_recv_cdata(st, priv->cmd.hash);
585 if (err)
586 goto err_out_free;
587
588 err = dst_export_write_request(st, bio, cmd->size);
589 if (err)
590 goto err_out_free;
591
592 if (dst_need_crypto(n))
593 return dst_export_crypto(n, bio);
594 } else {
595 err = dst_export_read_request(bio, cmd->size);
596 if (err)
597 goto err_out_free;
598 }
599
600 dprintk("%s: bio: %llu/%u, rw: %lu, dir: %lu, flags: %lx, phys: %d.\n",
601 __func__, (u64)bio->bi_sector, bio->bi_size,
602 bio->bi_rw, bio_data_dir(bio),
603 bio->bi_flags, bio->bi_phys_segments);
604
605 generic_make_request(bio);
606
607 return 0;
608
609err_out_free:
610 bio_put(bio);
611err_out_exit:
612 return err;
613}
614
615/*
616 * Ok, block IO is ready, let's send it back to the client...
617 */
618int dst_export_send_bio(struct bio *bio)
619{
620 struct dst_export_priv *p = bio->bi_private;
621 struct dst_state *st = p->state;
622 struct dst_cmd *cmd = &p->cmd;
623 int err;
624
625 dprintk("%s: id: %llu, bio: %llu/%u, csize: %u, flags: %lu, rw: %lu.\n",
626 __func__, cmd->id, (u64)bio->bi_sector, bio->bi_size,
627 cmd->csize, bio->bi_flags, bio->bi_rw);
628
629 dst_convert_cmd(cmd);
630
631 dst_state_lock(st);
632 if (!st->socket) {
633 err = -ECONNRESET;
634 goto err_out_unlock;
635 }
636
637 if (bio_data_dir(bio) == WRITE) {
638 /* ... or just confirmation that writing has completed. */
639 cmd->size = cmd->csize = 0;
640 err = dst_data_send_header(st->socket, cmd,
641 sizeof(struct dst_cmd), 0);
642 if (err)
643 goto err_out_unlock;
644 } else {
645 err = dst_send_bio(st, cmd, bio);
646 if (err)
647 goto err_out_unlock;
648 }
649
650 dst_state_unlock(st);
651
652 bio_put(bio);
653 return 0;
654
655err_out_unlock:
656 dst_state_unlock(st);
657
658 bio_put(bio);
659 return err;
660}
diff --git a/drivers/staging/dst/state.c b/drivers/staging/dst/state.c
deleted file mode 100644
index 02a05e6c48c3..000000000000
--- a/drivers/staging/dst/state.c
+++ /dev/null
@@ -1,844 +0,0 @@
1/*
2 * 2007+ Copyright (c) Evgeniy Polyakov <zbr@ioremap.net>
3 * All rights reserved.
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 */
15
16#include <linux/buffer_head.h>
17#include <linux/blkdev.h>
18#include <linux/bio.h>
19#include <linux/connector.h>
20#include <linux/dst.h>
21#include <linux/device.h>
22#include <linux/in.h>
23#include <linux/in6.h>
24#include <linux/socket.h>
25#include <linux/slab.h>
26
27#include <net/sock.h>
28
29/*
30 * Polling machinery.
31 */
32
33struct dst_poll_helper {
34 poll_table pt;
35 struct dst_state *st;
36};
37
38static int dst_queue_wake(wait_queue_t *wait, unsigned mode,
39 int sync, void *key)
40{
41 struct dst_state *st = container_of(wait, struct dst_state, wait);
42
43 wake_up(&st->thread_wait);
44 return 1;
45}
46
47static void dst_queue_func(struct file *file, wait_queue_head_t *whead,
48 poll_table *pt)
49{
50 struct dst_state *st = container_of(pt, struct dst_poll_helper, pt)->st;
51
52 st->whead = whead;
53 init_waitqueue_func_entry(&st->wait, dst_queue_wake);
54 add_wait_queue(whead, &st->wait);
55}
56
57void dst_poll_exit(struct dst_state *st)
58{
59 if (st->whead) {
60 remove_wait_queue(st->whead, &st->wait);
61 st->whead = NULL;
62 }
63}
64
65int dst_poll_init(struct dst_state *st)
66{
67 struct dst_poll_helper ph;
68
69 ph.st = st;
70 init_poll_funcptr(&ph.pt, &dst_queue_func);
71
72 st->socket->ops->poll(NULL, st->socket, &ph.pt);
73 return 0;
74}
75
76/*
77 * Header receiving function - may block.
78 */
79static int dst_data_recv_header(struct socket *sock,
80 void *data, unsigned int size, int block)
81{
82 struct msghdr msg;
83 struct kvec iov;
84 int err;
85
86 iov.iov_base = data;
87 iov.iov_len = size;
88
89 msg.msg_iov = (struct iovec *)&iov;
90 msg.msg_iovlen = 1;
91 msg.msg_name = NULL;
92 msg.msg_namelen = 0;
93 msg.msg_control = NULL;
94 msg.msg_controllen = 0;
95 msg.msg_flags = (block) ? MSG_WAITALL : MSG_DONTWAIT;
96
97 err = kernel_recvmsg(sock, &msg, &iov, 1, iov.iov_len,
98 msg.msg_flags);
99 if (err != size)
100 return -1;
101
102 return 0;
103}
104
105/*
106 * Header sending function - may block.
107 */
108int dst_data_send_header(struct socket *sock,
109 void *data, unsigned int size, int more)
110{
111 struct msghdr msg;
112 struct kvec iov;
113 int err;
114
115 iov.iov_base = data;
116 iov.iov_len = size;
117
118 msg.msg_iov = (struct iovec *)&iov;
119 msg.msg_iovlen = 1;
120 msg.msg_name = NULL;
121 msg.msg_namelen = 0;
122 msg.msg_control = NULL;
123 msg.msg_controllen = 0;
124 msg.msg_flags = MSG_WAITALL | (more ? MSG_MORE : 0);
125
126 err = kernel_sendmsg(sock, &msg, &iov, 1, iov.iov_len);
127 if (err != size) {
128 dprintk("%s: size: %u, more: %d, err: %d.\n",
129 __func__, size, more, err);
130 return -1;
131 }
132
133 return 0;
134}
135
136/*
137 * Block autoconfiguration: request size of the storage and permissions.
138 */
139static int dst_request_remote_config(struct dst_state *st)
140{
141 struct dst_node *n = st->node;
142 int err = -EINVAL;
143 struct dst_cmd *cmd = st->data;
144
145 memset(cmd, 0, sizeof(struct dst_cmd));
146 cmd->cmd = DST_CFG;
147
148 dst_convert_cmd(cmd);
149
150 err = dst_data_send_header(st->socket, cmd, sizeof(struct dst_cmd), 0);
151 if (err)
152 goto out;
153
154 err = dst_data_recv_header(st->socket, cmd, sizeof(struct dst_cmd), 1);
155 if (err)
156 goto out;
157
158 dst_convert_cmd(cmd);
159
160 if (cmd->cmd != DST_CFG) {
161 err = -EINVAL;
162 dprintk("%s: checking result: cmd: %d, size reported: %llu.\n",
163 __func__, cmd->cmd, cmd->sector);
164 goto out;
165 }
166
167 if (n->size != 0)
168 n->size = min_t(loff_t, n->size, cmd->sector);
169 else
170 n->size = cmd->sector;
171
172 n->info->size = n->size;
173 st->permissions = cmd->rw;
174
175out:
176 dprintk("%s: n: %p, err: %d, size: %llu, permission: %x.\n",
177 __func__, n, err, n->size, st->permissions);
178 return err;
179}
180
181/*
182 * Socket machinery.
183 */
184
185#define DST_DEFAULT_TIMEO 20000
186
187int dst_state_socket_create(struct dst_state *st)
188{
189 int err;
190 struct socket *sock;
191 struct dst_network_ctl *ctl = &st->ctl;
192
193 err = sock_create(ctl->addr.sa_family, ctl->type, ctl->proto, &sock);
194 if (err < 0)
195 return err;
196
197 sock->sk->sk_sndtimeo = sock->sk->sk_rcvtimeo =
198 msecs_to_jiffies(DST_DEFAULT_TIMEO);
199 sock->sk->sk_allocation = GFP_NOIO;
200
201 st->socket = st->read_socket = sock;
202 return 0;
203}
204
205void dst_state_socket_release(struct dst_state *st)
206{
207 dprintk("%s: st: %p, socket: %p, n: %p.\n",
208 __func__, st, st->socket, st->node);
209 if (st->socket) {
210 sock_release(st->socket);
211 st->socket = NULL;
212 st->read_socket = NULL;
213 }
214}
215
216void dst_dump_addr(struct socket *sk, struct sockaddr *sa, char *str)
217{
218 if (sk->ops->family == AF_INET) {
219 struct sockaddr_in *sin = (struct sockaddr_in *)sa;
220 printk(KERN_INFO "%s %u.%u.%u.%u:%d.\n", str,
221 NIPQUAD(sin->sin_addr.s_addr), ntohs(sin->sin_port));
222 } else if (sk->ops->family == AF_INET6) {
223 struct sockaddr_in6 *sin = (struct sockaddr_in6 *)sa;
224 printk(KERN_INFO "%s %pi6:%d",
225 str, &sin->sin6_addr, ntohs(sin->sin6_port));
226 }
227}
228
229void dst_state_exit_connected(struct dst_state *st)
230{
231 if (st->socket) {
232 dst_poll_exit(st);
233 st->socket->ops->shutdown(st->socket, 2);
234
235 dst_dump_addr(st->socket, (struct sockaddr *)&st->ctl.addr,
236 "Disconnected peer");
237 dst_state_socket_release(st);
238 }
239}
240
241static int dst_state_init_connected(struct dst_state *st)
242{
243 int err;
244 struct dst_network_ctl *ctl = &st->ctl;
245
246 err = dst_state_socket_create(st);
247 if (err)
248 goto err_out_exit;
249
250 err = kernel_connect(st->socket, (struct sockaddr *)&st->ctl.addr,
251 st->ctl.addr.sa_data_len, 0);
252 if (err)
253 goto err_out_release;
254
255 err = dst_poll_init(st);
256 if (err)
257 goto err_out_release;
258
259 dst_dump_addr(st->socket, (struct sockaddr *)&ctl->addr,
260 "Connected to peer");
261
262 return 0;
263
264err_out_release:
265 dst_state_socket_release(st);
266err_out_exit:
267 return err;
268}
269
270/*
271 * State reset is used to reconnect to the remote peer.
272 * May fail, but who cares, we will try again later.
273 */
274static inline void dst_state_reset_nolock(struct dst_state *st)
275{
276 dst_state_exit_connected(st);
277 dst_state_init_connected(st);
278}
279
280static inline void dst_state_reset(struct dst_state *st)
281{
282 dst_state_lock(st);
283 dst_state_reset_nolock(st);
284 dst_state_unlock(st);
285}
286
287/*
288 * Basic network sending/receiving functions.
289 * Blocked mode is used.
290 */
291static int dst_data_recv_raw(struct dst_state *st, void *buf, u64 size)
292{
293 struct msghdr msg;
294 struct kvec iov;
295 int err;
296
297 BUG_ON(!size);
298
299 iov.iov_base = buf;
300 iov.iov_len = size;
301
302 msg.msg_iov = (struct iovec *)&iov;
303 msg.msg_iovlen = 1;
304 msg.msg_name = NULL;
305 msg.msg_namelen = 0;
306 msg.msg_control = NULL;
307 msg.msg_controllen = 0;
308 msg.msg_flags = MSG_DONTWAIT;
309
310 err = kernel_recvmsg(st->socket, &msg, &iov, 1, iov.iov_len,
311 msg.msg_flags);
312 if (err <= 0) {
313 dprintk("%s: failed to recv data: size: %llu, err: %d.\n",
314 __func__, size, err);
315 if (err == 0)
316 err = -ECONNRESET;
317
318 dst_state_exit_connected(st);
319 }
320
321 return err;
322}
323
324/*
325 * Ping command to early detect failed nodes.
326 */
327static int dst_send_ping(struct dst_state *st)
328{
329 struct dst_cmd *cmd = st->data;
330 int err = -ECONNRESET;
331
332 dst_state_lock(st);
333 if (st->socket) {
334 memset(cmd, 0, sizeof(struct dst_cmd));
335
336 cmd->cmd = __cpu_to_be32(DST_PING);
337
338 err = dst_data_send_header(st->socket, cmd,
339 sizeof(struct dst_cmd), 0);
340 }
341 dprintk("%s: st: %p, socket: %p, err: %d.\n", __func__,
342 st, st->socket, err);
343 dst_state_unlock(st);
344
345 return err;
346}
347
348/*
349 * Receiving function, which should either return error or read
350 * whole block request. If there was no traffic for a one second,
351 * send a ping, since remote node may die.
352 */
353int dst_data_recv(struct dst_state *st, void *data, unsigned int size)
354{
355 unsigned int revents = 0;
356 unsigned int err_mask = POLLERR | POLLHUP | POLLRDHUP;
357 unsigned int mask = err_mask | POLLIN;
358 struct dst_node *n = st->node;
359 int err = 0;
360
361 while (size && !err) {
362 revents = dst_state_poll(st);
363
364 if (!(revents & mask)) {
365 DEFINE_WAIT(wait);
366
367 for (;;) {
368 prepare_to_wait(&st->thread_wait, &wait,
369 TASK_INTERRUPTIBLE);
370 if (!n->trans_scan_timeout || st->need_exit)
371 break;
372
373 revents = dst_state_poll(st);
374
375 if (revents & mask)
376 break;
377
378 if (signal_pending(current))
379 break;
380
381 if (!schedule_timeout(HZ)) {
382 err = dst_send_ping(st);
383 if (err)
384 return err;
385 }
386
387 continue;
388 }
389 finish_wait(&st->thread_wait, &wait);
390 }
391
392 err = -ECONNRESET;
393 dst_state_lock(st);
394
395 if (st->socket && (st->read_socket == st->socket) &&
396 (revents & POLLIN)) {
397 err = dst_data_recv_raw(st, data, size);
398 if (err > 0) {
399 data += err;
400 size -= err;
401 err = 0;
402 }
403 }
404
405 if (revents & err_mask || !st->socket) {
406 dprintk("%s: revents: %x, socket: %p, size: %u, "
407 "err: %d.\n", __func__, revents,
408 st->socket, size, err);
409 err = -ECONNRESET;
410 }
411
412 dst_state_unlock(st);
413
414 if (!n->trans_scan_timeout)
415 err = -ENODEV;
416 }
417
418 return err;
419}
420
421/*
422 * Send block autoconf reply.
423 */
424static int dst_process_cfg(struct dst_state *st)
425{
426 struct dst_node *n = st->node;
427 struct dst_cmd *cmd = st->data;
428 int err;
429
430 cmd->sector = n->size;
431 cmd->rw = st->permissions;
432
433 dst_convert_cmd(cmd);
434
435 dst_state_lock(st);
436 err = dst_data_send_header(st->socket, cmd, sizeof(struct dst_cmd), 0);
437 dst_state_unlock(st);
438
439 return err;
440}
441
442/*
443 * Receive block IO from the network.
444 */
445static int dst_recv_bio(struct dst_state *st, struct bio *bio,
446 unsigned int total_size)
447{
448 struct bio_vec *bv;
449 int i, err;
450 void *data;
451 unsigned int sz;
452
453 bio_for_each_segment(bv, bio, i) {
454 sz = min(total_size, bv->bv_len);
455
456 dprintk("%s: bio: %llu/%u, total: %u, len: %u, sz: %u, "
457 "off: %u.\n", __func__, (u64)bio->bi_sector,
458 bio->bi_size, total_size, bv->bv_len, sz,
459 bv->bv_offset);
460
461 data = kmap(bv->bv_page) + bv->bv_offset;
462 err = dst_data_recv(st, data, sz);
463 kunmap(bv->bv_page);
464
465 bv->bv_len = sz;
466
467 if (err)
468 return err;
469
470 total_size -= sz;
471 if (total_size == 0)
472 break;
473 }
474
475 return 0;
476}
477
478/*
479 * Our block IO has just completed and arrived: get it.
480 */
481static int dst_process_io_response(struct dst_state *st)
482{
483 struct dst_node *n = st->node;
484 struct dst_cmd *cmd = st->data;
485 struct dst_trans *t;
486 int err = 0;
487 struct bio *bio;
488
489 mutex_lock(&n->trans_lock);
490 t = dst_trans_search(n, cmd->id);
491 mutex_unlock(&n->trans_lock);
492
493 if (!t)
494 goto err_out_exit;
495
496 bio = t->bio;
497
498 dprintk("%s: bio: %llu/%u, cmd_size: %u, csize: %u, dir: %lu.\n",
499 __func__, (u64)bio->bi_sector, bio->bi_size, cmd->size,
500 cmd->csize, bio_data_dir(bio));
501
502 if (bio_data_dir(bio) == READ) {
503 if (bio->bi_size != cmd->size - cmd->csize)
504 goto err_out_exit;
505
506 if (dst_need_crypto(n)) {
507 err = dst_recv_cdata(st, t->cmd.hash);
508 if (err)
509 goto err_out_exit;
510 }
511
512 err = dst_recv_bio(st, t->bio, bio->bi_size);
513 if (err)
514 goto err_out_exit;
515
516 if (dst_need_crypto(n))
517 return dst_trans_crypto(t);
518 } else {
519 err = -EBADMSG;
520 if (cmd->size || cmd->csize)
521 goto err_out_exit;
522 }
523
524 dst_trans_remove(t);
525 dst_trans_put(t);
526
527 return 0;
528
529err_out_exit:
530 return err;
531}
532
533/*
534 * Receive crypto data.
535 */
536int dst_recv_cdata(struct dst_state *st, void *cdata)
537{
538 struct dst_cmd *cmd = st->data;
539 struct dst_node *n = st->node;
540 struct dst_crypto_ctl *c = &n->crypto;
541 int err;
542
543 if (cmd->csize != c->crypto_attached_size) {
544 dprintk("%s: cmd: cmd: %u, sector: %llu, size: %u, "
545 "csize: %u != digest size %u.\n",
546 __func__, cmd->cmd, cmd->sector, cmd->size,
547 cmd->csize, c->crypto_attached_size);
548 err = -EINVAL;
549 goto err_out_exit;
550 }
551
552 err = dst_data_recv(st, cdata, cmd->csize);
553 if (err)
554 goto err_out_exit;
555
556 cmd->size -= cmd->csize;
557 return 0;
558
559err_out_exit:
560 return err;
561}
562
563/*
564 * Receive the command and start its processing.
565 */
566static int dst_recv_processing(struct dst_state *st)
567{
568 int err = -EINTR;
569 struct dst_cmd *cmd = st->data;
570
571 /*
572 * If socket will be reset after this statement, then
573 * dst_data_recv() will just fail and loop will
574 * start again, so it can be done without any locks.
575 *
576 * st->read_socket is needed to prevents state machine
577 * breaking between this data reading and subsequent one
578 * in protocol specific functions during connection reset.
579 * In case of reset we have to read next command and do
580 * not expect data for old command to magically appear in
581 * new connection.
582 */
583 st->read_socket = st->socket;
584 err = dst_data_recv(st, cmd, sizeof(struct dst_cmd));
585 if (err)
586 goto out_exit;
587
588 dst_convert_cmd(cmd);
589
590 dprintk("%s: cmd: %u, size: %u, csize: %u, id: %llu, "
591 "sector: %llu, flags: %llx, rw: %llx.\n",
592 __func__, cmd->cmd, cmd->size,
593 cmd->csize, cmd->id, cmd->sector,
594 cmd->flags, cmd->rw);
595
596 /*
597 * This should catch protocol breakage and random garbage
598 * instead of commands.
599 */
600 if (unlikely(cmd->csize > st->size - sizeof(struct dst_cmd))) {
601 err = -EBADMSG;
602 goto out_exit;
603 }
604
605 err = -EPROTO;
606 switch (cmd->cmd) {
607 case DST_IO_RESPONSE:
608 err = dst_process_io_response(st);
609 break;
610 case DST_IO:
611 err = dst_process_io(st);
612 break;
613 case DST_CFG:
614 err = dst_process_cfg(st);
615 break;
616 case DST_PING:
617 err = 0;
618 break;
619 default:
620 break;
621 }
622
623out_exit:
624 return err;
625}
626
627/*
628 * Receiving thread. For the client node we should try to reconnect,
629 * for accepted client we just drop the state and expect it to reconnect.
630 */
631static int dst_recv(void *init_data, void *schedule_data)
632{
633 struct dst_state *st = schedule_data;
634 struct dst_node *n = init_data;
635 int err = 0;
636
637 dprintk("%s: start st: %p, n: %p, scan: %lu, need_exit: %d.\n",
638 __func__, st, n, n->trans_scan_timeout, st->need_exit);
639
640 while (n->trans_scan_timeout && !st->need_exit) {
641 err = dst_recv_processing(st);
642 if (err < 0) {
643 if (!st->ctl.type)
644 break;
645
646 if (!n->trans_scan_timeout || st->need_exit)
647 break;
648
649 dst_state_reset(st);
650 msleep(1000);
651 }
652 }
653
654 st->need_exit = 1;
655 wake_up(&st->thread_wait);
656
657 dprintk("%s: freeing receiving socket st: %p.\n", __func__, st);
658 dst_state_lock(st);
659 dst_state_exit_connected(st);
660 dst_state_unlock(st);
661 dst_state_put(st);
662
663 dprintk("%s: freed receiving socket st: %p.\n", __func__, st);
664
665 return err;
666}
667
668/*
669 * Network state dies here and borns couple of lines below.
670 * This object is the main network state processing engine:
671 * sending, receiving, reconnections, all network related
672 * tasks are handled on behalf of the state.
673 */
674static void dst_state_free(struct dst_state *st)
675{
676 dprintk("%s: st: %p.\n", __func__, st);
677 if (st->cleanup)
678 st->cleanup(st);
679 kfree(st->data);
680 kfree(st);
681}
682
683struct dst_state *dst_state_alloc(struct dst_node *n)
684{
685 struct dst_state *st;
686 int err = -ENOMEM;
687
688 st = kzalloc(sizeof(struct dst_state), GFP_KERNEL);
689 if (!st)
690 goto err_out_exit;
691
692 st->node = n;
693 st->need_exit = 0;
694
695 st->size = PAGE_SIZE;
696 st->data = kmalloc(st->size, GFP_KERNEL);
697 if (!st->data)
698 goto err_out_free;
699
700 spin_lock_init(&st->request_lock);
701 INIT_LIST_HEAD(&st->request_list);
702
703 mutex_init(&st->state_lock);
704 init_waitqueue_head(&st->thread_wait);
705
706 /*
707 * One for processing thread, another one for node itself.
708 */
709 atomic_set(&st->refcnt, 2);
710
711 dprintk("%s: st: %p, n: %p.\n", __func__, st, st->node);
712
713 return st;
714
715err_out_free:
716 kfree(st);
717err_out_exit:
718 return ERR_PTR(err);
719}
720
721int dst_state_schedule_receiver(struct dst_state *st)
722{
723 return thread_pool_schedule_private(st->node->pool, dst_thread_setup,
724 dst_recv, st, MAX_SCHEDULE_TIMEOUT, st->node);
725}
726
727/*
728 * Initialize client's connection to the remote peer: allocate state,
729 * connect and perform block IO autoconfiguration.
730 */
731int dst_node_init_connected(struct dst_node *n, struct dst_network_ctl *r)
732{
733 struct dst_state *st;
734 int err = -ENOMEM;
735
736 st = dst_state_alloc(n);
737 if (IS_ERR(st)) {
738 err = PTR_ERR(st);
739 goto err_out_exit;
740 }
741 memcpy(&st->ctl, r, sizeof(struct dst_network_ctl));
742
743 err = dst_state_init_connected(st);
744 if (err)
745 goto err_out_free_data;
746
747 err = dst_request_remote_config(st);
748 if (err)
749 goto err_out_exit_connected;
750 n->state = st;
751
752 err = dst_state_schedule_receiver(st);
753 if (err)
754 goto err_out_exit_connected;
755
756 return 0;
757
758err_out_exit_connected:
759 dst_state_exit_connected(st);
760err_out_free_data:
761 dst_state_free(st);
762err_out_exit:
763 n->state = NULL;
764 return err;
765}
766
767void dst_state_put(struct dst_state *st)
768{
769 dprintk("%s: st: %p, refcnt: %d.\n",
770 __func__, st, atomic_read(&st->refcnt));
771 if (atomic_dec_and_test(&st->refcnt))
772 dst_state_free(st);
773}
774
775/*
776 * Send block IO to the network one by one using zero-copy ->sendpage().
777 */
778int dst_send_bio(struct dst_state *st, struct dst_cmd *cmd, struct bio *bio)
779{
780 struct bio_vec *bv;
781 struct dst_crypto_ctl *c = &st->node->crypto;
782 int err, i = 0;
783 int flags = MSG_WAITALL;
784
785 err = dst_data_send_header(st->socket, cmd,
786 sizeof(struct dst_cmd) + c->crypto_attached_size, bio->bi_vcnt);
787 if (err)
788 goto err_out_exit;
789
790 bio_for_each_segment(bv, bio, i) {
791 if (i < bio->bi_vcnt - 1)
792 flags |= MSG_MORE;
793
794 err = kernel_sendpage(st->socket, bv->bv_page, bv->bv_offset,
795 bv->bv_len, flags);
796 if (err <= 0)
797 goto err_out_exit;
798 }
799
800 return 0;
801
802err_out_exit:
803 dprintk("%s: %d/%d, flags: %x, err: %d.\n",
804 __func__, i, bio->bi_vcnt, flags, err);
805 return err;
806}
807
808/*
809 * Send transaction to the remote peer.
810 */
811int dst_trans_send(struct dst_trans *t)
812{
813 int err;
814 struct dst_state *st = t->n->state;
815 struct bio *bio = t->bio;
816
817 dst_convert_cmd(&t->cmd);
818
819 dst_state_lock(st);
820 if (!st->socket) {
821 err = dst_state_init_connected(st);
822 if (err)
823 goto err_out_unlock;
824 }
825
826 if (bio_data_dir(bio) == WRITE) {
827 err = dst_send_bio(st, &t->cmd, t->bio);
828 } else {
829 err = dst_data_send_header(st->socket, &t->cmd,
830 sizeof(struct dst_cmd), 0);
831 }
832 if (err)
833 goto err_out_reset;
834
835 dst_state_unlock(st);
836 return 0;
837
838err_out_reset:
839 dst_state_reset_nolock(st);
840err_out_unlock:
841 dst_state_unlock(st);
842
843 return err;
844}
diff --git a/drivers/staging/dst/thread_pool.c b/drivers/staging/dst/thread_pool.c
deleted file mode 100644
index 29a82b2602f3..000000000000
--- a/drivers/staging/dst/thread_pool.c
+++ /dev/null
@@ -1,348 +0,0 @@
1/*
2 * 2007+ Copyright (c) Evgeniy Polyakov <zbr@ioremap.net>
3 * All rights reserved.
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 */
15
16#include <linux/kernel.h>
17#include <linux/dst.h>
18#include <linux/kthread.h>
19#include <linux/slab.h>
20
21/*
22 * Thread pool abstraction allows to schedule a work to be performed
23 * on behalf of kernel thread. One does not operate with threads itself,
24 * instead user provides setup and cleanup callbacks for thread pool itself,
25 * and action and cleanup callbacks for each submitted work.
26 *
27 * Each worker has private data initialized at creation time and data,
28 * provided by user at scheduling time.
29 *
30 * When action is being performed, thread can not be used by other users,
31 * instead they will sleep until there is free thread to pick their work.
32 */
33struct thread_pool_worker {
34 struct list_head worker_entry;
35
36 struct task_struct *thread;
37
38 struct thread_pool *pool;
39
40 int error;
41 int has_data;
42 int need_exit;
43 unsigned int id;
44
45 wait_queue_head_t wait;
46
47 void *private;
48 void *schedule_data;
49
50 int (*action)(void *private, void *schedule_data);
51 void (*cleanup)(void *private);
52};
53
54static void thread_pool_exit_worker(struct thread_pool_worker *w)
55{
56 kthread_stop(w->thread);
57
58 w->cleanup(w->private);
59 kfree(w);
60}
61
62/*
63 * Called to mark thread as ready and allow users to schedule new work.
64 */
65static void thread_pool_worker_make_ready(struct thread_pool_worker *w)
66{
67 struct thread_pool *p = w->pool;
68
69 mutex_lock(&p->thread_lock);
70
71 if (!w->need_exit) {
72 list_move_tail(&w->worker_entry, &p->ready_list);
73 w->has_data = 0;
74 mutex_unlock(&p->thread_lock);
75
76 wake_up(&p->wait);
77 } else {
78 p->thread_num--;
79 list_del(&w->worker_entry);
80 mutex_unlock(&p->thread_lock);
81
82 thread_pool_exit_worker(w);
83 }
84}
85
86/*
87 * Thread action loop: waits until there is new work.
88 */
89static int thread_pool_worker_func(void *data)
90{
91 struct thread_pool_worker *w = data;
92
93 while (!kthread_should_stop()) {
94 wait_event_interruptible(w->wait,
95 kthread_should_stop() || w->has_data);
96
97 if (kthread_should_stop())
98 break;
99
100 if (!w->has_data)
101 continue;
102
103 w->action(w->private, w->schedule_data);
104 thread_pool_worker_make_ready(w);
105 }
106
107 return 0;
108}
109
110/*
111 * Remove single worker without specifying which one.
112 */
113void thread_pool_del_worker(struct thread_pool *p)
114{
115 struct thread_pool_worker *w = NULL;
116
117 while (!w && p->thread_num) {
118 wait_event(p->wait, !list_empty(&p->ready_list) ||
119 !p->thread_num);
120
121 dprintk("%s: locking list_empty: %d, thread_num: %d.\n",
122 __func__, list_empty(&p->ready_list),
123 p->thread_num);
124
125 mutex_lock(&p->thread_lock);
126 if (!list_empty(&p->ready_list)) {
127 w = list_first_entry(&p->ready_list,
128 struct thread_pool_worker,
129 worker_entry);
130
131 dprintk("%s: deleting w: %p, thread_num: %d, "
132 "list: %p [%p.%p].\n", __func__,
133 w, p->thread_num, &p->ready_list,
134 p->ready_list.prev, p->ready_list.next);
135
136 p->thread_num--;
137 list_del(&w->worker_entry);
138 }
139 mutex_unlock(&p->thread_lock);
140 }
141
142 if (w)
143 thread_pool_exit_worker(w);
144 dprintk("%s: deleted w: %p, thread_num: %d.\n",
145 __func__, w, p->thread_num);
146}
147
148/*
149 * Remove a worker with given ID.
150 */
151void thread_pool_del_worker_id(struct thread_pool *p, unsigned int id)
152{
153 struct thread_pool_worker *w;
154 int found = 0;
155
156 mutex_lock(&p->thread_lock);
157 list_for_each_entry(w, &p->ready_list, worker_entry) {
158 if (w->id == id) {
159 found = 1;
160 p->thread_num--;
161 list_del(&w->worker_entry);
162 break;
163 }
164 }
165
166 if (!found) {
167 list_for_each_entry(w, &p->active_list, worker_entry) {
168 if (w->id == id) {
169 w->need_exit = 1;
170 break;
171 }
172 }
173 }
174 mutex_unlock(&p->thread_lock);
175
176 if (found)
177 thread_pool_exit_worker(w);
178}
179
180/*
181 * Add new worker thread with given parameters.
182 * If initialization callback fails, return error.
183 */
184int thread_pool_add_worker(struct thread_pool *p,
185 char *name,
186 unsigned int id,
187 void *(*init)(void *private),
188 void (*cleanup)(void *private),
189 void *private)
190{
191 struct thread_pool_worker *w;
192 int err = -ENOMEM;
193
194 w = kzalloc(sizeof(struct thread_pool_worker), GFP_KERNEL);
195 if (!w)
196 goto err_out_exit;
197
198 w->pool = p;
199 init_waitqueue_head(&w->wait);
200 w->cleanup = cleanup;
201 w->id = id;
202
203 w->thread = kthread_run(thread_pool_worker_func, w, "%s", name);
204 if (IS_ERR(w->thread)) {
205 err = PTR_ERR(w->thread);
206 goto err_out_free;
207 }
208
209 w->private = init(private);
210 if (IS_ERR(w->private)) {
211 err = PTR_ERR(w->private);
212 goto err_out_stop_thread;
213 }
214
215 mutex_lock(&p->thread_lock);
216 list_add_tail(&w->worker_entry, &p->ready_list);
217 p->thread_num++;
218 mutex_unlock(&p->thread_lock);
219
220 return 0;
221
222err_out_stop_thread:
223 kthread_stop(w->thread);
224err_out_free:
225 kfree(w);
226err_out_exit:
227 return err;
228}
229
230/*
231 * Destroy the whole pool.
232 */
233void thread_pool_destroy(struct thread_pool *p)
234{
235 while (p->thread_num) {
236 dprintk("%s: num: %d.\n", __func__, p->thread_num);
237 thread_pool_del_worker(p);
238 }
239
240 kfree(p);
241}
242
243/*
244 * Create a pool with given number of threads.
245 * They will have sequential IDs started from zero.
246 */
247struct thread_pool *thread_pool_create(int num, char *name,
248 void *(*init)(void *private),
249 void (*cleanup)(void *private),
250 void *private)
251{
252 struct thread_pool_worker *w, *tmp;
253 struct thread_pool *p;
254 int err = -ENOMEM;
255 int i;
256
257 p = kzalloc(sizeof(struct thread_pool), GFP_KERNEL);
258 if (!p)
259 goto err_out_exit;
260
261 init_waitqueue_head(&p->wait);
262 mutex_init(&p->thread_lock);
263 INIT_LIST_HEAD(&p->ready_list);
264 INIT_LIST_HEAD(&p->active_list);
265 p->thread_num = 0;
266
267 for (i = 0; i < num; ++i) {
268 err = thread_pool_add_worker(p, name, i, init,
269 cleanup, private);
270 if (err)
271 goto err_out_free_all;
272 }
273
274 return p;
275
276err_out_free_all:
277 list_for_each_entry_safe(w, tmp, &p->ready_list, worker_entry) {
278 list_del(&w->worker_entry);
279 thread_pool_exit_worker(w);
280 }
281 kfree(p);
282err_out_exit:
283 return ERR_PTR(err);
284}
285
286/*
287 * Schedule execution of the action on a given thread,
288 * provided ID pointer has to match previously stored
289 * private data.
290 */
291int thread_pool_schedule_private(struct thread_pool *p,
292 int (*setup)(void *private, void *data),
293 int (*action)(void *private, void *data),
294 void *data, long timeout, void *id)
295{
296 struct thread_pool_worker *w, *tmp, *worker = NULL;
297 int err = 0;
298
299 while (!worker && !err) {
300 timeout = wait_event_interruptible_timeout(p->wait,
301 !list_empty(&p->ready_list),
302 timeout);
303
304 if (!timeout) {
305 err = -ETIMEDOUT;
306 break;
307 }
308
309 worker = NULL;
310 mutex_lock(&p->thread_lock);
311 list_for_each_entry_safe(w, tmp, &p->ready_list, worker_entry) {
312 if (id && id != w->private)
313 continue;
314
315 worker = w;
316
317 list_move_tail(&w->worker_entry, &p->active_list);
318
319 err = setup(w->private, data);
320 if (!err) {
321 w->schedule_data = data;
322 w->action = action;
323 w->has_data = 1;
324 wake_up(&w->wait);
325 } else {
326 list_move_tail(&w->worker_entry,
327 &p->ready_list);
328 }
329
330 break;
331 }
332 mutex_unlock(&p->thread_lock);
333 }
334
335 return err;
336}
337
338/*
339 * Schedule execution on arbitrary thread from the pool.
340 */
341int thread_pool_schedule(struct thread_pool *p,
342 int (*setup)(void *private, void *data),
343 int (*action)(void *private, void *data),
344 void *data, long timeout)
345{
346 return thread_pool_schedule_private(p, setup,
347 action, data, timeout, NULL);
348}
diff --git a/drivers/staging/dst/trans.c b/drivers/staging/dst/trans.c
deleted file mode 100644
index 1c36a6bc31d5..000000000000
--- a/drivers/staging/dst/trans.c
+++ /dev/null
@@ -1,337 +0,0 @@
1/*
2 * 2007+ Copyright (c) Evgeniy Polyakov <zbr@ioremap.net>
3 * All rights reserved.
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 */
15
16#include <linux/bio.h>
17#include <linux/dst.h>
18#include <linux/slab.h>
19#include <linux/mempool.h>
20
21/*
22 * Transaction memory pool size.
23 */
24static int dst_mempool_num = 32;
25module_param(dst_mempool_num, int, 0644);
26
27/*
28 * Transaction tree management.
29 */
30static inline int dst_trans_cmp(dst_gen_t gen, dst_gen_t new)
31{
32 if (gen < new)
33 return 1;
34 if (gen > new)
35 return -1;
36 return 0;
37}
38
39struct dst_trans *dst_trans_search(struct dst_node *node, dst_gen_t gen)
40{
41 struct rb_root *root = &node->trans_root;
42 struct rb_node *n = root->rb_node;
43 struct dst_trans *t, *ret = NULL;
44 int cmp;
45
46 while (n) {
47 t = rb_entry(n, struct dst_trans, trans_entry);
48
49 cmp = dst_trans_cmp(t->gen, gen);
50 if (cmp < 0)
51 n = n->rb_left;
52 else if (cmp > 0)
53 n = n->rb_right;
54 else {
55 ret = t;
56 break;
57 }
58 }
59
60 dprintk("%s: %s transaction: id: %llu.\n", __func__,
61 (ret) ? "found" : "not found", gen);
62
63 return ret;
64}
65
66static int dst_trans_insert(struct dst_trans *new)
67{
68 struct rb_root *root = &new->n->trans_root;
69 struct rb_node **n = &root->rb_node, *parent = NULL;
70 struct dst_trans *ret = NULL, *t;
71 int cmp;
72
73 while (*n) {
74 parent = *n;
75
76 t = rb_entry(parent, struct dst_trans, trans_entry);
77
78 cmp = dst_trans_cmp(t->gen, new->gen);
79 if (cmp < 0)
80 n = &parent->rb_left;
81 else if (cmp > 0)
82 n = &parent->rb_right;
83 else {
84 ret = t;
85 break;
86 }
87 }
88
89 new->send_time = jiffies;
90 if (ret) {
91 printk(KERN_DEBUG "%s: exist: old: gen: %llu, bio: %llu/%u, "
92 "send_time: %lu, new: gen: %llu, bio: %llu/%u, "
93 "send_time: %lu.\n", __func__,
94 ret->gen, (u64)ret->bio->bi_sector,
95 ret->bio->bi_size, ret->send_time,
96 new->gen, (u64)new->bio->bi_sector,
97 new->bio->bi_size, new->send_time);
98 return -EEXIST;
99 }
100
101 rb_link_node(&new->trans_entry, parent, n);
102 rb_insert_color(&new->trans_entry, root);
103
104 dprintk("%s: inserted: gen: %llu, bio: %llu/%u, send_time: %lu.\n",
105 __func__, new->gen, (u64)new->bio->bi_sector,
106 new->bio->bi_size, new->send_time);
107
108 return 0;
109}
110
111int dst_trans_remove_nolock(struct dst_trans *t)
112{
113 struct dst_node *n = t->n;
114
115 if (t->trans_entry.rb_parent_color) {
116 rb_erase(&t->trans_entry, &n->trans_root);
117 t->trans_entry.rb_parent_color = 0;
118 }
119 return 0;
120}
121
122int dst_trans_remove(struct dst_trans *t)
123{
124 int ret;
125 struct dst_node *n = t->n;
126
127 mutex_lock(&n->trans_lock);
128 ret = dst_trans_remove_nolock(t);
129 mutex_unlock(&n->trans_lock);
130
131 return ret;
132}
133
134/*
135 * When transaction is completed and there are no more users,
136 * we complete appriate block IO request with given error status.
137 */
138void dst_trans_put(struct dst_trans *t)
139{
140 if (atomic_dec_and_test(&t->refcnt)) {
141 struct bio *bio = t->bio;
142
143 dprintk("%s: completed t: %p, gen: %llu, bio: %p.\n",
144 __func__, t, t->gen, bio);
145
146 bio_endio(bio, t->error);
147 bio_put(bio);
148
149 dst_node_put(t->n);
150 mempool_free(t, t->n->trans_pool);
151 }
152}
153
154/*
155 * Process given block IO request: allocate transaction, insert it into the tree
156 * and send/schedule crypto processing.
157 */
158int dst_process_bio(struct dst_node *n, struct bio *bio)
159{
160 struct dst_trans *t;
161 int err = -ENOMEM;
162
163 t = mempool_alloc(n->trans_pool, GFP_NOFS);
164 if (!t)
165 goto err_out_exit;
166
167 t->n = dst_node_get(n);
168 t->bio = bio;
169 t->error = 0;
170 t->retries = 0;
171 atomic_set(&t->refcnt, 1);
172 t->gen = atomic_long_inc_return(&n->gen);
173
174 t->enc = bio_data_dir(bio);
175 dst_bio_to_cmd(bio, &t->cmd, DST_IO, t->gen);
176
177 mutex_lock(&n->trans_lock);
178 err = dst_trans_insert(t);
179 mutex_unlock(&n->trans_lock);
180 if (err)
181 goto err_out_free;
182
183 dprintk("%s: gen: %llu, bio: %llu/%u, dir/enc: %d, need_crypto: %d.\n",
184 __func__, t->gen, (u64)bio->bi_sector,
185 bio->bi_size, t->enc, dst_need_crypto(n));
186
187 if (dst_need_crypto(n) && t->enc)
188 dst_trans_crypto(t);
189 else
190 dst_trans_send(t);
191
192 return 0;
193
194err_out_free:
195 dst_node_put(n);
196 mempool_free(t, n->trans_pool);
197err_out_exit:
198 bio_endio(bio, err);
199 bio_put(bio);
200 return err;
201}
202
203/*
204 * Scan for timeout/stale transactions.
205 * Each transaction is being resent multiple times before error completion.
206 */
207static void dst_trans_scan(struct work_struct *work)
208{
209 struct dst_node *n = container_of(work, struct dst_node,
210 trans_work.work);
211 struct rb_node *rb_node;
212 struct dst_trans *t;
213 unsigned long timeout = n->trans_scan_timeout;
214 int num = 10 * n->trans_max_retries;
215
216 mutex_lock(&n->trans_lock);
217
218 for (rb_node = rb_first(&n->trans_root); rb_node; ) {
219 t = rb_entry(rb_node, struct dst_trans, trans_entry);
220
221 if (timeout && time_after(t->send_time + timeout, jiffies)
222 && t->retries == 0)
223 break;
224#if 0
225 dprintk("%s: t: %p, gen: %llu, n: %s, retries: %u, max: %u.\n",
226 __func__, t, t->gen, n->name,
227 t->retries, n->trans_max_retries);
228#endif
229 if (--num == 0)
230 break;
231
232 dst_trans_get(t);
233
234 rb_node = rb_next(rb_node);
235
236 if (timeout && (++t->retries < n->trans_max_retries)) {
237 dst_trans_send(t);
238 } else {
239 t->error = -ETIMEDOUT;
240 dst_trans_remove_nolock(t);
241 dst_trans_put(t);
242 }
243
244 dst_trans_put(t);
245 }
246
247 mutex_unlock(&n->trans_lock);
248
249 /*
250 * If no timeout specified then system is in the middle of exiting
251 * process, so no need to reschedule scanning process again.
252 */
253 if (timeout) {
254 if (!num)
255 timeout = HZ;
256 schedule_delayed_work(&n->trans_work, timeout);
257 }
258}
259
260/*
261 * Flush all transactions and mark them as timed out.
262 * Destroy transaction pools.
263 */
264void dst_node_trans_exit(struct dst_node *n)
265{
266 struct dst_trans *t;
267 struct rb_node *rb_node;
268
269 if (!n->trans_cache)
270 return;
271
272 dprintk("%s: n: %p, cancelling the work.\n", __func__, n);
273 cancel_delayed_work_sync(&n->trans_work);
274 flush_scheduled_work();
275 dprintk("%s: n: %p, work has been cancelled.\n", __func__, n);
276
277 for (rb_node = rb_first(&n->trans_root); rb_node; ) {
278 t = rb_entry(rb_node, struct dst_trans, trans_entry);
279
280 dprintk("%s: t: %p, gen: %llu, n: %s.\n",
281 __func__, t, t->gen, n->name);
282
283 rb_node = rb_next(rb_node);
284
285 t->error = -ETIMEDOUT;
286 dst_trans_remove_nolock(t);
287 dst_trans_put(t);
288 }
289
290 mempool_destroy(n->trans_pool);
291 kmem_cache_destroy(n->trans_cache);
292}
293
294/*
295 * Initialize transaction storage for given node.
296 * Transaction stores not only control information,
297 * but also network command and crypto data (if needed)
298 * to reduce number of allocations. Thus transaction size
299 * differs from node to node.
300 */
301int dst_node_trans_init(struct dst_node *n, unsigned int size)
302{
303 /*
304 * We need this, since node with given name can be dropped from the
305 * hash table, but be still alive, so subsequent creation of the node
306 * with the same name may collide with existing cache name.
307 */
308
309 snprintf(n->cache_name, sizeof(n->cache_name), "%s-%p", n->name, n);
310
311 n->trans_cache = kmem_cache_create(n->cache_name,
312 size + n->crypto.crypto_attached_size,
313 0, 0, NULL);
314 if (!n->trans_cache)
315 goto err_out_exit;
316
317 n->trans_pool = mempool_create_slab_pool(dst_mempool_num,
318 n->trans_cache);
319 if (!n->trans_pool)
320 goto err_out_cache_destroy;
321
322 mutex_init(&n->trans_lock);
323 n->trans_root = RB_ROOT;
324
325 INIT_DELAYED_WORK(&n->trans_work, dst_trans_scan);
326 schedule_delayed_work(&n->trans_work, n->trans_scan_timeout);
327
328 dprintk("%s: n: %p, size: %u, crypto: %u.\n",
329 __func__, n, size, n->crypto.crypto_attached_size);
330
331 return 0;
332
333err_out_cache_destroy:
334 kmem_cache_destroy(n->trans_cache);
335err_out_exit:
336 return -ENOMEM;
337}
diff --git a/drivers/staging/et131x/et1310_address_map.h b/drivers/staging/et131x/et1310_address_map.h
index 6da843cc343c..e715e4dcb523 100644
--- a/drivers/staging/et131x/et1310_address_map.h
+++ b/drivers/staging/et131x/et1310_address_map.h
@@ -203,11 +203,14 @@ typedef struct _GLOBAL_t { /* Location: */
203 * 9-0: pr ndes 203 * 9-0: pr ndes
204 */ 204 */
205 205
206#define ET_DMA10_MASK 0x3FF /* 10 bit mask for DMA10W types */ 206#define ET_DMA12_MASK 0x0FFF /* 12 bit mask for DMA12W types */
207#define ET_DMA10_WRAP 0x400 207#define ET_DMA12_WRAP 0x1000
208#define ET_DMA4_MASK 0x00F /* 4 bit mask for DMA4W types */ 208#define ET_DMA10_MASK 0x03FF /* 10 bit mask for DMA10W types */
209#define ET_DMA4_WRAP 0x010 209#define ET_DMA10_WRAP 0x0400
210 210#define ET_DMA4_MASK 0x000F /* 4 bit mask for DMA4W types */
211#define ET_DMA4_WRAP 0x0010
212
213#define INDEX12(x) ((x) & ET_DMA12_MASK)
211#define INDEX10(x) ((x) & ET_DMA10_MASK) 214#define INDEX10(x) ((x) & ET_DMA10_MASK)
212#define INDEX4(x) ((x) & ET_DMA4_MASK) 215#define INDEX4(x) ((x) & ET_DMA4_MASK)
213 216
@@ -216,6 +219,11 @@ extern inline void add_10bit(u32 *v, int n)
216 *v = INDEX10(*v + n) | (*v & ET_DMA10_WRAP); 219 *v = INDEX10(*v + n) | (*v & ET_DMA10_WRAP);
217} 220}
218 221
222extern inline void add_12bit(u32 *v, int n)
223{
224 *v = INDEX12(*v + n) | (*v & ET_DMA12_WRAP);
225}
226
219/* 227/*
220 * 10bit DMA with wrap 228 * 10bit DMA with wrap
221 * txdma tx queue write address reg in txdma address map at 0x1010 229 * txdma tx queue write address reg in txdma address map at 0x1010
diff --git a/drivers/staging/et131x/et1310_rx.c b/drivers/staging/et131x/et1310_rx.c
index 3ddc9b12b8db..81c1a7478ad6 100644
--- a/drivers/staging/et131x/et1310_rx.c
+++ b/drivers/staging/et131x/et1310_rx.c
@@ -831,10 +831,10 @@ PMP_RFD nic_rx_pkts(struct et131x_adapter *etdev)
831 831
832 /* Indicate that we have used this PSR entry. */ 832 /* Indicate that we have used this PSR entry. */
833 /* FIXME wrap 12 */ 833 /* FIXME wrap 12 */
834 rx_local->local_psr_full = (rx_local->local_psr_full + 1) & 0xFFF; 834 add_12bit(&rx_local->local_psr_full, 1);
835 if (rx_local->local_psr_full > rx_local->PsrNumEntries - 1) { 835 if ((rx_local->local_psr_full & 0xFFF) > rx_local->PsrNumEntries - 1) {
836 /* Clear psr full and toggle the wrap bit */ 836 /* Clear psr full and toggle the wrap bit */
837 rx_local->local_psr_full &= 0xFFF; 837 rx_local->local_psr_full &= ~0xFFF;
838 rx_local->local_psr_full ^= 0x1000; 838 rx_local->local_psr_full ^= 0x1000;
839 } 839 }
840 840
diff --git a/drivers/staging/hv/Hv.c b/drivers/staging/hv/Hv.c
index c5b6613f2f2f..c2809f2a2ce0 100644
--- a/drivers/staging/hv/Hv.c
+++ b/drivers/staging/hv/Hv.c
@@ -386,7 +386,7 @@ u16 HvSignalEvent(void)
386 * retrieve the initialized message and event pages. Otherwise, we create and 386 * retrieve the initialized message and event pages. Otherwise, we create and
387 * initialize the message and event pages. 387 * initialize the message and event pages.
388 */ 388 */
389int HvSynicInit(u32 irqVector) 389void HvSynicInit(void *irqarg)
390{ 390{
391 u64 version; 391 u64 version;
392 union hv_synic_simp simp; 392 union hv_synic_simp simp;
@@ -394,13 +394,14 @@ int HvSynicInit(u32 irqVector)
394 union hv_synic_sint sharedSint; 394 union hv_synic_sint sharedSint;
395 union hv_synic_scontrol sctrl; 395 union hv_synic_scontrol sctrl;
396 u64 guestID; 396 u64 guestID;
397 int ret = 0; 397 u32 irqVector = *((u32 *)(irqarg));
398 int cpu = smp_processor_id();
398 399
399 DPRINT_ENTER(VMBUS); 400 DPRINT_ENTER(VMBUS);
400 401
401 if (!gHvContext.HypercallPage) { 402 if (!gHvContext.HypercallPage) {
402 DPRINT_EXIT(VMBUS); 403 DPRINT_EXIT(VMBUS);
403 return ret; 404 return;
404 } 405 }
405 406
406 /* Check the version */ 407 /* Check the version */
@@ -425,27 +426,27 @@ int HvSynicInit(u32 irqVector)
425 */ 426 */
426 rdmsrl(HV_X64_MSR_GUEST_OS_ID, guestID); 427 rdmsrl(HV_X64_MSR_GUEST_OS_ID, guestID);
427 if (guestID == HV_LINUX_GUEST_ID) { 428 if (guestID == HV_LINUX_GUEST_ID) {
428 gHvContext.synICMessagePage[0] = 429 gHvContext.synICMessagePage[cpu] =
429 phys_to_virt(simp.BaseSimpGpa << PAGE_SHIFT); 430 phys_to_virt(simp.BaseSimpGpa << PAGE_SHIFT);
430 gHvContext.synICEventPage[0] = 431 gHvContext.synICEventPage[cpu] =
431 phys_to_virt(siefp.BaseSiefpGpa << PAGE_SHIFT); 432 phys_to_virt(siefp.BaseSiefpGpa << PAGE_SHIFT);
432 } else { 433 } else {
433 DPRINT_ERR(VMBUS, "unknown guest id!!"); 434 DPRINT_ERR(VMBUS, "unknown guest id!!");
434 goto Cleanup; 435 goto Cleanup;
435 } 436 }
436 DPRINT_DBG(VMBUS, "MAPPED: Simp: %p, Sifep: %p", 437 DPRINT_DBG(VMBUS, "MAPPED: Simp: %p, Sifep: %p",
437 gHvContext.synICMessagePage[0], 438 gHvContext.synICMessagePage[cpu],
438 gHvContext.synICEventPage[0]); 439 gHvContext.synICEventPage[cpu]);
439 } else { 440 } else {
440 gHvContext.synICMessagePage[0] = osd_PageAlloc(1); 441 gHvContext.synICMessagePage[cpu] = (void *)get_zeroed_page(GFP_ATOMIC);
441 if (gHvContext.synICMessagePage[0] == NULL) { 442 if (gHvContext.synICMessagePage[cpu] == NULL) {
442 DPRINT_ERR(VMBUS, 443 DPRINT_ERR(VMBUS,
443 "unable to allocate SYNIC message page!!"); 444 "unable to allocate SYNIC message page!!");
444 goto Cleanup; 445 goto Cleanup;
445 } 446 }
446 447
447 gHvContext.synICEventPage[0] = osd_PageAlloc(1); 448 gHvContext.synICEventPage[cpu] = (void *)get_zeroed_page(GFP_ATOMIC);
448 if (gHvContext.synICEventPage[0] == NULL) { 449 if (gHvContext.synICEventPage[cpu] == NULL) {
449 DPRINT_ERR(VMBUS, 450 DPRINT_ERR(VMBUS,
450 "unable to allocate SYNIC event page!!"); 451 "unable to allocate SYNIC event page!!");
451 goto Cleanup; 452 goto Cleanup;
@@ -454,7 +455,7 @@ int HvSynicInit(u32 irqVector)
454 /* Setup the Synic's message page */ 455 /* Setup the Synic's message page */
455 rdmsrl(HV_X64_MSR_SIMP, simp.AsUINT64); 456 rdmsrl(HV_X64_MSR_SIMP, simp.AsUINT64);
456 simp.SimpEnabled = 1; 457 simp.SimpEnabled = 1;
457 simp.BaseSimpGpa = virt_to_phys(gHvContext.synICMessagePage[0]) 458 simp.BaseSimpGpa = virt_to_phys(gHvContext.synICMessagePage[cpu])
458 >> PAGE_SHIFT; 459 >> PAGE_SHIFT;
459 460
460 DPRINT_DBG(VMBUS, "HV_X64_MSR_SIMP msr set to: %llx", 461 DPRINT_DBG(VMBUS, "HV_X64_MSR_SIMP msr set to: %llx",
@@ -465,7 +466,7 @@ int HvSynicInit(u32 irqVector)
465 /* Setup the Synic's event page */ 466 /* Setup the Synic's event page */
466 rdmsrl(HV_X64_MSR_SIEFP, siefp.AsUINT64); 467 rdmsrl(HV_X64_MSR_SIEFP, siefp.AsUINT64);
467 siefp.SiefpEnabled = 1; 468 siefp.SiefpEnabled = 1;
468 siefp.BaseSiefpGpa = virt_to_phys(gHvContext.synICEventPage[0]) 469 siefp.BaseSiefpGpa = virt_to_phys(gHvContext.synICEventPage[cpu])
469 >> PAGE_SHIFT; 470 >> PAGE_SHIFT;
470 471
471 DPRINT_DBG(VMBUS, "HV_X64_MSR_SIEFP msr set to: %llx", 472 DPRINT_DBG(VMBUS, "HV_X64_MSR_SIEFP msr set to: %llx",
@@ -501,32 +502,30 @@ int HvSynicInit(u32 irqVector)
501 502
502 DPRINT_EXIT(VMBUS); 503 DPRINT_EXIT(VMBUS);
503 504
504 return ret; 505 return;
505 506
506Cleanup: 507Cleanup:
507 ret = -1;
508
509 if (gHvContext.GuestId == HV_LINUX_GUEST_ID) { 508 if (gHvContext.GuestId == HV_LINUX_GUEST_ID) {
510 if (gHvContext.synICEventPage[0]) 509 if (gHvContext.synICEventPage[cpu])
511 osd_PageFree(gHvContext.synICEventPage[0], 1); 510 osd_PageFree(gHvContext.synICEventPage[cpu], 1);
512 511
513 if (gHvContext.synICMessagePage[0]) 512 if (gHvContext.synICMessagePage[cpu])
514 osd_PageFree(gHvContext.synICMessagePage[0], 1); 513 osd_PageFree(gHvContext.synICMessagePage[cpu], 1);
515 } 514 }
516 515
517 DPRINT_EXIT(VMBUS); 516 DPRINT_EXIT(VMBUS);
518 517 return;
519 return ret;
520} 518}
521 519
522/** 520/**
523 * HvSynicCleanup - Cleanup routine for HvSynicInit(). 521 * HvSynicCleanup - Cleanup routine for HvSynicInit().
524 */ 522 */
525void HvSynicCleanup(void) 523void HvSynicCleanup(void *arg)
526{ 524{
527 union hv_synic_sint sharedSint; 525 union hv_synic_sint sharedSint;
528 union hv_synic_simp simp; 526 union hv_synic_simp simp;
529 union hv_synic_siefp siefp; 527 union hv_synic_siefp siefp;
528 int cpu = smp_processor_id();
530 529
531 DPRINT_ENTER(VMBUS); 530 DPRINT_ENTER(VMBUS);
532 531
@@ -539,6 +538,7 @@ void HvSynicCleanup(void)
539 538
540 sharedSint.Masked = 1; 539 sharedSint.Masked = 1;
541 540
541 /* Need to correctly cleanup in the case of SMP!!! */
542 /* Disable the interrupt */ 542 /* Disable the interrupt */
543 wrmsrl(HV_X64_MSR_SINT0 + VMBUS_MESSAGE_SINT, sharedSint.AsUINT64); 543 wrmsrl(HV_X64_MSR_SINT0 + VMBUS_MESSAGE_SINT, sharedSint.AsUINT64);
544 544
@@ -560,8 +560,8 @@ void HvSynicCleanup(void)
560 560
561 wrmsrl(HV_X64_MSR_SIEFP, siefp.AsUINT64); 561 wrmsrl(HV_X64_MSR_SIEFP, siefp.AsUINT64);
562 562
563 osd_PageFree(gHvContext.synICMessagePage[0], 1); 563 osd_PageFree(gHvContext.synICMessagePage[cpu], 1);
564 osd_PageFree(gHvContext.synICEventPage[0], 1); 564 osd_PageFree(gHvContext.synICEventPage[cpu], 1);
565 } 565 }
566 566
567 DPRINT_EXIT(VMBUS); 567 DPRINT_EXIT(VMBUS);
diff --git a/drivers/staging/hv/Hv.h b/drivers/staging/hv/Hv.h
index 5379e4bfc56e..fce4b5cdac30 100644
--- a/drivers/staging/hv/Hv.h
+++ b/drivers/staging/hv/Hv.h
@@ -93,7 +93,7 @@ static const struct hv_guid VMBUS_SERVICE_ID = {
93 }, 93 },
94}; 94};
95 95
96#define MAX_NUM_CPUS 1 96#define MAX_NUM_CPUS 32
97 97
98 98
99struct hv_input_signal_event_buffer { 99struct hv_input_signal_event_buffer {
@@ -137,8 +137,8 @@ extern u16 HvPostMessage(union hv_connection_id connectionId,
137 137
138extern u16 HvSignalEvent(void); 138extern u16 HvSignalEvent(void);
139 139
140extern int HvSynicInit(u32 irqVector); 140extern void HvSynicInit(void *irqarg);
141 141
142extern void HvSynicCleanup(void); 142extern void HvSynicCleanup(void *arg);
143 143
144#endif /* __HV_H__ */ 144#endif /* __HV_H__ */
diff --git a/drivers/staging/hv/Vmbus.c b/drivers/staging/hv/Vmbus.c
index a4dd06f6d459..35a023e9f9d1 100644
--- a/drivers/staging/hv/Vmbus.c
+++ b/drivers/staging/hv/Vmbus.c
@@ -129,7 +129,7 @@ static int VmbusOnDeviceAdd(struct hv_device *dev, void *AdditionalInfo)
129 129
130 /* strcpy(dev->name, "vmbus"); */ 130 /* strcpy(dev->name, "vmbus"); */
131 /* SynIC setup... */ 131 /* SynIC setup... */
132 ret = HvSynicInit(*irqvector); 132 on_each_cpu(HvSynicInit, (void *)irqvector, 1);
133 133
134 /* Connect to VMBus in the root partition */ 134 /* Connect to VMBus in the root partition */
135 ret = VmbusConnect(); 135 ret = VmbusConnect();
@@ -150,7 +150,7 @@ static int VmbusOnDeviceRemove(struct hv_device *dev)
150 DPRINT_ENTER(VMBUS); 150 DPRINT_ENTER(VMBUS);
151 VmbusChannelReleaseUnattachedChannels(); 151 VmbusChannelReleaseUnattachedChannels();
152 VmbusDisconnect(); 152 VmbusDisconnect();
153 HvSynicCleanup(); 153 on_each_cpu(HvSynicCleanup, NULL, 1);
154 DPRINT_EXIT(VMBUS); 154 DPRINT_EXIT(VMBUS);
155 155
156 return ret; 156 return ret;
@@ -173,7 +173,8 @@ static void VmbusOnCleanup(struct hv_driver *drv)
173 */ 173 */
174static void VmbusOnMsgDPC(struct hv_driver *drv) 174static void VmbusOnMsgDPC(struct hv_driver *drv)
175{ 175{
176 void *page_addr = gHvContext.synICMessagePage[0]; 176 int cpu = smp_processor_id();
177 void *page_addr = gHvContext.synICMessagePage[cpu];
177 struct hv_message *msg = (struct hv_message *)page_addr + 178 struct hv_message *msg = (struct hv_message *)page_addr +
178 VMBUS_MESSAGE_SINT; 179 VMBUS_MESSAGE_SINT;
179 struct hv_message *copied; 180 struct hv_message *copied;
@@ -230,11 +231,12 @@ static void VmbusOnEventDPC(struct hv_driver *drv)
230static int VmbusOnISR(struct hv_driver *drv) 231static int VmbusOnISR(struct hv_driver *drv)
231{ 232{
232 int ret = 0; 233 int ret = 0;
234 int cpu = smp_processor_id();
233 void *page_addr; 235 void *page_addr;
234 struct hv_message *msg; 236 struct hv_message *msg;
235 union hv_synic_event_flags *event; 237 union hv_synic_event_flags *event;
236 238
237 page_addr = gHvContext.synICMessagePage[0]; 239 page_addr = gHvContext.synICMessagePage[cpu];
238 msg = (struct hv_message *)page_addr + VMBUS_MESSAGE_SINT; 240 msg = (struct hv_message *)page_addr + VMBUS_MESSAGE_SINT;
239 241
240 DPRINT_ENTER(VMBUS); 242 DPRINT_ENTER(VMBUS);
@@ -248,7 +250,7 @@ static int VmbusOnISR(struct hv_driver *drv)
248 } 250 }
249 251
250 /* TODO: Check if there are events to be process */ 252 /* TODO: Check if there are events to be process */
251 page_addr = gHvContext.synICEventPage[0]; 253 page_addr = gHvContext.synICEventPage[cpu];
252 event = (union hv_synic_event_flags *)page_addr + VMBUS_MESSAGE_SINT; 254 event = (union hv_synic_event_flags *)page_addr + VMBUS_MESSAGE_SINT;
253 255
254 /* Since we are a child, we only need to check bit 0 */ 256 /* Since we are a child, we only need to check bit 0 */
diff --git a/drivers/staging/iio/ring_sw.h b/drivers/staging/iio/ring_sw.h
index f0b86f02cd80..fd677f008365 100644
--- a/drivers/staging/iio/ring_sw.h
+++ b/drivers/staging/iio/ring_sw.h
@@ -29,7 +29,6 @@
29 * driver requests - some may support multiple options */ 29 * driver requests - some may support multiple options */
30 30
31 31
32#include <linux/autoconf.h>
33#include "iio.h" 32#include "iio.h"
34#include "ring_generic.h" 33#include "ring_generic.h"
35 34
diff --git a/drivers/staging/octeon/Kconfig b/drivers/staging/octeon/Kconfig
index 536e2382de54..638ad6b35891 100644
--- a/drivers/staging/octeon/Kconfig
+++ b/drivers/staging/octeon/Kconfig
@@ -1,7 +1,8 @@
1config OCTEON_ETHERNET 1config OCTEON_ETHERNET
2 tristate "Cavium Networks Octeon Ethernet support" 2 tristate "Cavium Networks Octeon Ethernet support"
3 depends on CPU_CAVIUM_OCTEON 3 depends on CPU_CAVIUM_OCTEON
4 select MII 4 select PHYLIB
5 select MDIO_OCTEON
5 help 6 help
6 This driver supports the builtin ethernet ports on Cavium 7 This driver supports the builtin ethernet ports on Cavium
7 Networks' products in the Octeon family. This driver supports the 8 Networks' products in the Octeon family. This driver supports the
diff --git a/drivers/staging/octeon/ethernet-mdio.c b/drivers/staging/octeon/ethernet-mdio.c
index 31a58e508924..05a5cc0f43ed 100644
--- a/drivers/staging/octeon/ethernet-mdio.c
+++ b/drivers/staging/octeon/ethernet-mdio.c
@@ -26,7 +26,8 @@
26**********************************************************************/ 26**********************************************************************/
27#include <linux/kernel.h> 27#include <linux/kernel.h>
28#include <linux/ethtool.h> 28#include <linux/ethtool.h>
29#include <linux/mii.h> 29#include <linux/phy.h>
30
30#include <net/dst.h> 31#include <net/dst.h>
31 32
32#include <asm/octeon/octeon.h> 33#include <asm/octeon/octeon.h>
@@ -34,86 +35,12 @@
34#include "ethernet-defines.h" 35#include "ethernet-defines.h"
35#include "octeon-ethernet.h" 36#include "octeon-ethernet.h"
36#include "ethernet-mdio.h" 37#include "ethernet-mdio.h"
38#include "ethernet-util.h"
37 39
38#include "cvmx-helper-board.h" 40#include "cvmx-helper-board.h"
39 41
40#include "cvmx-smix-defs.h" 42#include "cvmx-smix-defs.h"
41 43
42DECLARE_MUTEX(mdio_sem);
43
44/**
45 * Perform an MII read. Called by the generic MII routines
46 *
47 * @dev: Device to perform read for
48 * @phy_id: The MII phy id
49 * @location: Register location to read
50 * Returns Result from the read or zero on failure
51 */
52static int cvm_oct_mdio_read(struct net_device *dev, int phy_id, int location)
53{
54 union cvmx_smix_cmd smi_cmd;
55 union cvmx_smix_rd_dat smi_rd;
56
57 smi_cmd.u64 = 0;
58 smi_cmd.s.phy_op = 1;
59 smi_cmd.s.phy_adr = phy_id;
60 smi_cmd.s.reg_adr = location;
61 cvmx_write_csr(CVMX_SMIX_CMD(0), smi_cmd.u64);
62
63 do {
64 if (!in_interrupt())
65 yield();
66 smi_rd.u64 = cvmx_read_csr(CVMX_SMIX_RD_DAT(0));
67 } while (smi_rd.s.pending);
68
69 if (smi_rd.s.val)
70 return smi_rd.s.dat;
71 else
72 return 0;
73}
74
75static int cvm_oct_mdio_dummy_read(struct net_device *dev, int phy_id,
76 int location)
77{
78 return 0xffff;
79}
80
81/**
82 * Perform an MII write. Called by the generic MII routines
83 *
84 * @dev: Device to perform write for
85 * @phy_id: The MII phy id
86 * @location: Register location to write
87 * @val: Value to write
88 */
89static void cvm_oct_mdio_write(struct net_device *dev, int phy_id, int location,
90 int val)
91{
92 union cvmx_smix_cmd smi_cmd;
93 union cvmx_smix_wr_dat smi_wr;
94
95 smi_wr.u64 = 0;
96 smi_wr.s.dat = val;
97 cvmx_write_csr(CVMX_SMIX_WR_DAT(0), smi_wr.u64);
98
99 smi_cmd.u64 = 0;
100 smi_cmd.s.phy_op = 0;
101 smi_cmd.s.phy_adr = phy_id;
102 smi_cmd.s.reg_adr = location;
103 cvmx_write_csr(CVMX_SMIX_CMD(0), smi_cmd.u64);
104
105 do {
106 if (!in_interrupt())
107 yield();
108 smi_wr.u64 = cvmx_read_csr(CVMX_SMIX_WR_DAT(0));
109 } while (smi_wr.s.pending);
110}
111
112static void cvm_oct_mdio_dummy_write(struct net_device *dev, int phy_id,
113 int location, int val)
114{
115}
116
117static void cvm_oct_get_drvinfo(struct net_device *dev, 44static void cvm_oct_get_drvinfo(struct net_device *dev,
118 struct ethtool_drvinfo *info) 45 struct ethtool_drvinfo *info)
119{ 46{
@@ -125,49 +52,37 @@ static void cvm_oct_get_drvinfo(struct net_device *dev,
125static int cvm_oct_get_settings(struct net_device *dev, struct ethtool_cmd *cmd) 52static int cvm_oct_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
126{ 53{
127 struct octeon_ethernet *priv = netdev_priv(dev); 54 struct octeon_ethernet *priv = netdev_priv(dev);
128 int ret;
129 55
130 down(&mdio_sem); 56 if (priv->phydev)
131 ret = mii_ethtool_gset(&priv->mii_info, cmd); 57 return phy_ethtool_gset(priv->phydev, cmd);
132 up(&mdio_sem);
133 58
134 return ret; 59 return -EINVAL;
135} 60}
136 61
137static int cvm_oct_set_settings(struct net_device *dev, struct ethtool_cmd *cmd) 62static int cvm_oct_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
138{ 63{
139 struct octeon_ethernet *priv = netdev_priv(dev); 64 struct octeon_ethernet *priv = netdev_priv(dev);
140 int ret;
141 65
142 down(&mdio_sem); 66 if (!capable(CAP_NET_ADMIN))
143 ret = mii_ethtool_sset(&priv->mii_info, cmd); 67 return -EPERM;
144 up(&mdio_sem); 68
69 if (priv->phydev)
70 return phy_ethtool_sset(priv->phydev, cmd);
145 71
146 return ret; 72 return -EINVAL;
147} 73}
148 74
149static int cvm_oct_nway_reset(struct net_device *dev) 75static int cvm_oct_nway_reset(struct net_device *dev)
150{ 76{
151 struct octeon_ethernet *priv = netdev_priv(dev); 77 struct octeon_ethernet *priv = netdev_priv(dev);
152 int ret;
153 78
154 down(&mdio_sem); 79 if (!capable(CAP_NET_ADMIN))
155 ret = mii_nway_restart(&priv->mii_info); 80 return -EPERM;
156 up(&mdio_sem);
157 81
158 return ret; 82 if (priv->phydev)
159} 83 return phy_start_aneg(priv->phydev);
160 84
161static u32 cvm_oct_get_link(struct net_device *dev) 85 return -EINVAL;
162{
163 struct octeon_ethernet *priv = netdev_priv(dev);
164 u32 ret;
165
166 down(&mdio_sem);
167 ret = mii_link_ok(&priv->mii_info);
168 up(&mdio_sem);
169
170 return ret;
171} 86}
172 87
173const struct ethtool_ops cvm_oct_ethtool_ops = { 88const struct ethtool_ops cvm_oct_ethtool_ops = {
@@ -175,7 +90,7 @@ const struct ethtool_ops cvm_oct_ethtool_ops = {
175 .get_settings = cvm_oct_get_settings, 90 .get_settings = cvm_oct_get_settings,
176 .set_settings = cvm_oct_set_settings, 91 .set_settings = cvm_oct_set_settings,
177 .nway_reset = cvm_oct_nway_reset, 92 .nway_reset = cvm_oct_nway_reset,
178 .get_link = cvm_oct_get_link, 93 .get_link = ethtool_op_get_link,
179 .get_sg = ethtool_op_get_sg, 94 .get_sg = ethtool_op_get_sg,
180 .get_tx_csum = ethtool_op_get_tx_csum, 95 .get_tx_csum = ethtool_op_get_tx_csum,
181}; 96};
@@ -191,41 +106,78 @@ const struct ethtool_ops cvm_oct_ethtool_ops = {
191int cvm_oct_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) 106int cvm_oct_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
192{ 107{
193 struct octeon_ethernet *priv = netdev_priv(dev); 108 struct octeon_ethernet *priv = netdev_priv(dev);
194 struct mii_ioctl_data *data = if_mii(rq);
195 unsigned int duplex_chg;
196 int ret;
197 109
198 down(&mdio_sem); 110 if (!netif_running(dev))
199 ret = generic_mii_ioctl(&priv->mii_info, data, cmd, &duplex_chg); 111 return -EINVAL;
200 up(&mdio_sem); 112
113 if (!priv->phydev)
114 return -EINVAL;
115
116 return phy_mii_ioctl(priv->phydev, if_mii(rq), cmd);
117}
201 118
202 return ret; 119static void cvm_oct_adjust_link(struct net_device *dev)
120{
121 struct octeon_ethernet *priv = netdev_priv(dev);
122 cvmx_helper_link_info_t link_info;
123
124 if (priv->last_link != priv->phydev->link) {
125 priv->last_link = priv->phydev->link;
126 link_info.u64 = 0;
127 link_info.s.link_up = priv->last_link ? 1 : 0;
128 link_info.s.full_duplex = priv->phydev->duplex ? 1 : 0;
129 link_info.s.speed = priv->phydev->speed;
130 cvmx_helper_link_set( priv->port, link_info);
131 if (priv->last_link) {
132 netif_carrier_on(dev);
133 if (priv->queue != -1)
134 DEBUGPRINT("%s: %u Mbps %s duplex, "
135 "port %2d, queue %2d\n",
136 dev->name, priv->phydev->speed,
137 priv->phydev->duplex ?
138 "Full" : "Half",
139 priv->port, priv->queue);
140 else
141 DEBUGPRINT("%s: %u Mbps %s duplex, "
142 "port %2d, POW\n",
143 dev->name, priv->phydev->speed,
144 priv->phydev->duplex ?
145 "Full" : "Half",
146 priv->port);
147 } else {
148 netif_carrier_off(dev);
149 DEBUGPRINT("%s: Link down\n", dev->name);
150 }
151 }
203} 152}
204 153
154
205/** 155/**
206 * Setup the MDIO device structures 156 * Setup the PHY
207 * 157 *
208 * @dev: Device to setup 158 * @dev: Device to setup
209 * 159 *
210 * Returns Zero on success, negative on failure 160 * Returns Zero on success, negative on failure
211 */ 161 */
212int cvm_oct_mdio_setup_device(struct net_device *dev) 162int cvm_oct_phy_setup_device(struct net_device *dev)
213{ 163{
214 struct octeon_ethernet *priv = netdev_priv(dev); 164 struct octeon_ethernet *priv = netdev_priv(dev);
215 int phy_id = cvmx_helper_board_get_mii_address(priv->port); 165
216 if (phy_id != -1) { 166 int phy_addr = cvmx_helper_board_get_mii_address(priv->port);
217 priv->mii_info.dev = dev; 167 if (phy_addr != -1) {
218 priv->mii_info.phy_id = phy_id; 168 char phy_id[20];
219 priv->mii_info.phy_id_mask = 0xff; 169
220 priv->mii_info.supports_gmii = 1; 170 snprintf(phy_id, sizeof(phy_id), PHY_ID_FMT, "0", phy_addr);
221 priv->mii_info.reg_num_mask = 0x1f; 171
222 priv->mii_info.mdio_read = cvm_oct_mdio_read; 172 priv->phydev = phy_connect(dev, phy_id, cvm_oct_adjust_link, 0,
223 priv->mii_info.mdio_write = cvm_oct_mdio_write; 173 PHY_INTERFACE_MODE_GMII);
224 } else { 174
225 /* Supply dummy MDIO routines so the kernel won't crash 175 if (IS_ERR(priv->phydev)) {
226 if the user tries to read them */ 176 priv->phydev = NULL;
227 priv->mii_info.mdio_read = cvm_oct_mdio_dummy_read; 177 return -1;
228 priv->mii_info.mdio_write = cvm_oct_mdio_dummy_write; 178 }
179 priv->last_link = 0;
180 phy_start_aneg(priv->phydev);
229 } 181 }
230 return 0; 182 return 0;
231} 183}
diff --git a/drivers/staging/octeon/ethernet-mdio.h b/drivers/staging/octeon/ethernet-mdio.h
index b3328aeec2df..55d0614a7cd9 100644
--- a/drivers/staging/octeon/ethernet-mdio.h
+++ b/drivers/staging/octeon/ethernet-mdio.h
@@ -43,4 +43,4 @@
43 43
44extern const struct ethtool_ops cvm_oct_ethtool_ops; 44extern const struct ethtool_ops cvm_oct_ethtool_ops;
45int cvm_oct_ioctl(struct net_device *dev, struct ifreq *rq, int cmd); 45int cvm_oct_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
46int cvm_oct_mdio_setup_device(struct net_device *dev); 46int cvm_oct_phy_setup_device(struct net_device *dev);
diff --git a/drivers/staging/octeon/ethernet-proc.c b/drivers/staging/octeon/ethernet-proc.c
index 8fa88fc419b7..16308d484d3b 100644
--- a/drivers/staging/octeon/ethernet-proc.c
+++ b/drivers/staging/octeon/ethernet-proc.c
@@ -25,7 +25,6 @@
25 * Contact Cavium Networks for more information 25 * Contact Cavium Networks for more information
26**********************************************************************/ 26**********************************************************************/
27#include <linux/kernel.h> 27#include <linux/kernel.h>
28#include <linux/mii.h>
29#include <linux/seq_file.h> 28#include <linux/seq_file.h>
30#include <linux/proc_fs.h> 29#include <linux/proc_fs.h>
31#include <net/dst.h> 30#include <net/dst.h>
@@ -38,112 +37,6 @@
38#include "cvmx-helper.h" 37#include "cvmx-helper.h"
39#include "cvmx-pip.h" 38#include "cvmx-pip.h"
40 39
41static unsigned long long cvm_oct_stats_read_switch(struct net_device *dev,
42 int phy_id, int offset)
43{
44 struct octeon_ethernet *priv = netdev_priv(dev);
45
46 priv->mii_info.mdio_write(dev, phy_id, 0x1d, 0xcc00 | offset);
47 return ((uint64_t) priv->mii_info.
48 mdio_read(dev, phy_id,
49 0x1e) << 16) | (uint64_t) priv->mii_info.
50 mdio_read(dev, phy_id, 0x1f);
51}
52
53static int cvm_oct_stats_switch_show(struct seq_file *m, void *v)
54{
55 static const int ports[] = { 0, 1, 2, 3, 9, -1 };
56 struct net_device *dev = cvm_oct_device[0];
57 int index = 0;
58
59 while (ports[index] != -1) {
60
61 /* Latch port */
62 struct octeon_ethernet *priv = netdev_priv(dev);
63
64 priv->mii_info.mdio_write(dev, 0x1b, 0x1d,
65 0xdc00 | ports[index]);
66 seq_printf(m, "\nSwitch Port %d\n", ports[index]);
67 seq_printf(m, "InGoodOctets: %12llu\t"
68 "OutOctets: %12llu\t"
69 "64 Octets: %12llu\n",
70 cvm_oct_stats_read_switch(dev, 0x1b,
71 0x00) |
72 (cvm_oct_stats_read_switch(dev, 0x1b, 0x01) << 32),
73 cvm_oct_stats_read_switch(dev, 0x1b,
74 0x0E) |
75 (cvm_oct_stats_read_switch(dev, 0x1b, 0x0F) << 32),
76 cvm_oct_stats_read_switch(dev, 0x1b, 0x08));
77
78 seq_printf(m, "InBadOctets: %12llu\t"
79 "OutUnicast: %12llu\t"
80 "65-127 Octets: %12llu\n",
81 cvm_oct_stats_read_switch(dev, 0x1b, 0x02),
82 cvm_oct_stats_read_switch(dev, 0x1b, 0x10),
83 cvm_oct_stats_read_switch(dev, 0x1b, 0x09));
84
85 seq_printf(m, "InUnicast: %12llu\t"
86 "OutBroadcasts: %12llu\t"
87 "128-255 Octets: %12llu\n",
88 cvm_oct_stats_read_switch(dev, 0x1b, 0x04),
89 cvm_oct_stats_read_switch(dev, 0x1b, 0x13),
90 cvm_oct_stats_read_switch(dev, 0x1b, 0x0A));
91
92 seq_printf(m, "InBroadcasts: %12llu\t"
93 "OutMulticasts: %12llu\t"
94 "256-511 Octets: %12llu\n",
95 cvm_oct_stats_read_switch(dev, 0x1b, 0x06),
96 cvm_oct_stats_read_switch(dev, 0x1b, 0x12),
97 cvm_oct_stats_read_switch(dev, 0x1b, 0x0B));
98
99 seq_printf(m, "InMulticasts: %12llu\t"
100 "OutPause: %12llu\t"
101 "512-1023 Octets:%12llu\n",
102 cvm_oct_stats_read_switch(dev, 0x1b, 0x07),
103 cvm_oct_stats_read_switch(dev, 0x1b, 0x15),
104 cvm_oct_stats_read_switch(dev, 0x1b, 0x0C));
105
106 seq_printf(m, "InPause: %12llu\t"
107 "Excessive: %12llu\t"
108 "1024-Max Octets:%12llu\n",
109 cvm_oct_stats_read_switch(dev, 0x1b, 0x16),
110 cvm_oct_stats_read_switch(dev, 0x1b, 0x11),
111 cvm_oct_stats_read_switch(dev, 0x1b, 0x0D));
112
113 seq_printf(m, "InUndersize: %12llu\t"
114 "Collisions: %12llu\n",
115 cvm_oct_stats_read_switch(dev, 0x1b, 0x18),
116 cvm_oct_stats_read_switch(dev, 0x1b, 0x1E));
117
118 seq_printf(m, "InFragments: %12llu\t"
119 "Deferred: %12llu\n",
120 cvm_oct_stats_read_switch(dev, 0x1b, 0x19),
121 cvm_oct_stats_read_switch(dev, 0x1b, 0x05));
122
123 seq_printf(m, "InOversize: %12llu\t"
124 "Single: %12llu\n",
125 cvm_oct_stats_read_switch(dev, 0x1b, 0x1A),
126 cvm_oct_stats_read_switch(dev, 0x1b, 0x14));
127
128 seq_printf(m, "InJabber: %12llu\t"
129 "Multiple: %12llu\n",
130 cvm_oct_stats_read_switch(dev, 0x1b, 0x1B),
131 cvm_oct_stats_read_switch(dev, 0x1b, 0x17));
132
133 seq_printf(m, "In RxErr: %12llu\t"
134 "OutFCSErr: %12llu\n",
135 cvm_oct_stats_read_switch(dev, 0x1b, 0x1C),
136 cvm_oct_stats_read_switch(dev, 0x1b, 0x03));
137
138 seq_printf(m, "InFCSErr: %12llu\t"
139 "Late: %12llu\n",
140 cvm_oct_stats_read_switch(dev, 0x1b, 0x1D),
141 cvm_oct_stats_read_switch(dev, 0x1b, 0x1F));
142 index++;
143 }
144 return 0;
145}
146
147/** 40/**
148 * User is reading /proc/octeon_ethernet_stats 41 * User is reading /proc/octeon_ethernet_stats
149 * 42 *
@@ -215,11 +108,6 @@ static int cvm_oct_stats_show(struct seq_file *m, void *v)
215 } 108 }
216 } 109 }
217 110
218 if (cvm_oct_device[0]) {
219 priv = netdev_priv(cvm_oct_device[0]);
220 if (priv->imode == CVMX_HELPER_INTERFACE_MODE_GMII)
221 cvm_oct_stats_switch_show(m, v);
222 }
223 return 0; 111 return 0;
224} 112}
225 113
diff --git a/drivers/staging/octeon/ethernet-rgmii.c b/drivers/staging/octeon/ethernet-rgmii.c
index fbaa465d2fac..3820f1ec11d1 100644
--- a/drivers/staging/octeon/ethernet-rgmii.c
+++ b/drivers/staging/octeon/ethernet-rgmii.c
@@ -147,32 +147,36 @@ static void cvm_oct_rgmii_poll(struct net_device *dev)
147 cvmx_write_csr(CVMX_GMXX_RXX_INT_REG(index, interface), 147 cvmx_write_csr(CVMX_GMXX_RXX_INT_REG(index, interface),
148 gmxx_rxx_int_reg.u64); 148 gmxx_rxx_int_reg.u64);
149 } 149 }
150 150 if (priv->phydev == NULL) {
151 link_info = cvmx_helper_link_autoconf(priv->port); 151 link_info = cvmx_helper_link_autoconf(priv->port);
152 priv->link_info = link_info.u64; 152 priv->link_info = link_info.u64;
153 }
153 spin_unlock_irqrestore(&global_register_lock, flags); 154 spin_unlock_irqrestore(&global_register_lock, flags);
154 155
155 /* Tell Linux */ 156 if (priv->phydev == NULL) {
156 if (link_info.s.link_up) { 157 /* Tell core. */
157 158 if (link_info.s.link_up) {
158 if (!netif_carrier_ok(dev)) 159 if (!netif_carrier_ok(dev))
159 netif_carrier_on(dev); 160 netif_carrier_on(dev);
160 if (priv->queue != -1) 161 if (priv->queue != -1)
161 DEBUGPRINT 162 DEBUGPRINT("%s: %u Mbps %s duplex, "
162 ("%s: %u Mbps %s duplex, port %2d, queue %2d\n", 163 "port %2d, queue %2d\n",
163 dev->name, link_info.s.speed, 164 dev->name, link_info.s.speed,
164 (link_info.s.full_duplex) ? "Full" : "Half", 165 (link_info.s.full_duplex) ?
165 priv->port, priv->queue); 166 "Full" : "Half",
166 else 167 priv->port, priv->queue);
167 DEBUGPRINT("%s: %u Mbps %s duplex, port %2d, POW\n", 168 else
168 dev->name, link_info.s.speed, 169 DEBUGPRINT("%s: %u Mbps %s duplex, "
169 (link_info.s.full_duplex) ? "Full" : "Half", 170 "port %2d, POW\n",
170 priv->port); 171 dev->name, link_info.s.speed,
171 } else { 172 (link_info.s.full_duplex) ?
172 173 "Full" : "Half",
173 if (netif_carrier_ok(dev)) 174 priv->port);
174 netif_carrier_off(dev); 175 } else {
175 DEBUGPRINT("%s: Link down\n", dev->name); 176 if (netif_carrier_ok(dev))
177 netif_carrier_off(dev);
178 DEBUGPRINT("%s: Link down\n", dev->name);
179 }
176 } 180 }
177} 181}
178 182
diff --git a/drivers/staging/octeon/ethernet-sgmii.c b/drivers/staging/octeon/ethernet-sgmii.c
index 2b54996bd85d..6061d01eca2d 100644
--- a/drivers/staging/octeon/ethernet-sgmii.c
+++ b/drivers/staging/octeon/ethernet-sgmii.c
@@ -113,7 +113,7 @@ int cvm_oct_sgmii_init(struct net_device *dev)
113 struct octeon_ethernet *priv = netdev_priv(dev); 113 struct octeon_ethernet *priv = netdev_priv(dev);
114 cvm_oct_common_init(dev); 114 cvm_oct_common_init(dev);
115 dev->netdev_ops->ndo_stop(dev); 115 dev->netdev_ops->ndo_stop(dev);
116 if (!octeon_is_simulation()) 116 if (!octeon_is_simulation() && priv->phydev == NULL)
117 priv->poll = cvm_oct_sgmii_poll; 117 priv->poll = cvm_oct_sgmii_poll;
118 118
119 /* FIXME: Need autoneg logic */ 119 /* FIXME: Need autoneg logic */
diff --git a/drivers/staging/octeon/ethernet-xaui.c b/drivers/staging/octeon/ethernet-xaui.c
index 0c2e7cc40f35..ee3dc41b2c53 100644
--- a/drivers/staging/octeon/ethernet-xaui.c
+++ b/drivers/staging/octeon/ethernet-xaui.c
@@ -112,7 +112,7 @@ int cvm_oct_xaui_init(struct net_device *dev)
112 struct octeon_ethernet *priv = netdev_priv(dev); 112 struct octeon_ethernet *priv = netdev_priv(dev);
113 cvm_oct_common_init(dev); 113 cvm_oct_common_init(dev);
114 dev->netdev_ops->ndo_stop(dev); 114 dev->netdev_ops->ndo_stop(dev);
115 if (!octeon_is_simulation()) 115 if (!octeon_is_simulation() && priv->phydev == NULL)
116 priv->poll = cvm_oct_xaui_poll; 116 priv->poll = cvm_oct_xaui_poll;
117 117
118 return 0; 118 return 0;
diff --git a/drivers/staging/octeon/ethernet.c b/drivers/staging/octeon/ethernet.c
index 492c5029992d..4cfd4b136b32 100644
--- a/drivers/staging/octeon/ethernet.c
+++ b/drivers/staging/octeon/ethernet.c
@@ -30,7 +30,7 @@
30#include <linux/netdevice.h> 30#include <linux/netdevice.h>
31#include <linux/etherdevice.h> 31#include <linux/etherdevice.h>
32#include <linux/delay.h> 32#include <linux/delay.h>
33#include <linux/mii.h> 33#include <linux/phy.h>
34 34
35#include <net/dst.h> 35#include <net/dst.h>
36 36
@@ -132,8 +132,6 @@ static struct timer_list cvm_oct_poll_timer;
132 */ 132 */
133struct net_device *cvm_oct_device[TOTAL_NUMBER_OF_PORTS]; 133struct net_device *cvm_oct_device[TOTAL_NUMBER_OF_PORTS];
134 134
135extern struct semaphore mdio_sem;
136
137/** 135/**
138 * Periodic timer tick for slow management operations 136 * Periodic timer tick for slow management operations
139 * 137 *
@@ -160,13 +158,8 @@ static void cvm_do_timer(unsigned long arg)
160 goto out; 158 goto out;
161 159
162 priv = netdev_priv(cvm_oct_device[port]); 160 priv = netdev_priv(cvm_oct_device[port]);
163 if (priv->poll) { 161 if (priv->poll)
164 /* skip polling if we don't get the lock */ 162 priv->poll(cvm_oct_device[port]);
165 if (!down_trylock(&mdio_sem)) {
166 priv->poll(cvm_oct_device[port]);
167 up(&mdio_sem);
168 }
169 }
170 163
171 queues_per_port = cvmx_pko_get_num_queues(port); 164 queues_per_port = cvmx_pko_get_num_queues(port);
172 /* Drain any pending packets in the free list */ 165 /* Drain any pending packets in the free list */
@@ -524,7 +517,7 @@ int cvm_oct_common_init(struct net_device *dev)
524 dev->features |= NETIF_F_LLTX; 517 dev->features |= NETIF_F_LLTX;
525 SET_ETHTOOL_OPS(dev, &cvm_oct_ethtool_ops); 518 SET_ETHTOOL_OPS(dev, &cvm_oct_ethtool_ops);
526 519
527 cvm_oct_mdio_setup_device(dev); 520 cvm_oct_phy_setup_device(dev);
528 dev->netdev_ops->ndo_set_mac_address(dev, &sa); 521 dev->netdev_ops->ndo_set_mac_address(dev, &sa);
529 dev->netdev_ops->ndo_change_mtu(dev, dev->mtu); 522 dev->netdev_ops->ndo_change_mtu(dev, dev->mtu);
530 523
@@ -540,7 +533,10 @@ int cvm_oct_common_init(struct net_device *dev)
540 533
541void cvm_oct_common_uninit(struct net_device *dev) 534void cvm_oct_common_uninit(struct net_device *dev)
542{ 535{
543 /* Currently nothing to do */ 536 struct octeon_ethernet *priv = netdev_priv(dev);
537
538 if (priv->phydev)
539 phy_disconnect(priv->phydev);
544} 540}
545 541
546static const struct net_device_ops cvm_oct_npi_netdev_ops = { 542static const struct net_device_ops cvm_oct_npi_netdev_ops = {
@@ -627,6 +623,8 @@ static const struct net_device_ops cvm_oct_pow_netdev_ops = {
627#endif 623#endif
628}; 624};
629 625
626extern void octeon_mdiobus_force_mod_depencency(void);
627
630/** 628/**
631 * Module/ driver initialization. Creates the linux network 629 * Module/ driver initialization. Creates the linux network
632 * devices. 630 * devices.
@@ -640,6 +638,7 @@ static int __init cvm_oct_init_module(void)
640 int fau = FAU_NUM_PACKET_BUFFERS_TO_FREE; 638 int fau = FAU_NUM_PACKET_BUFFERS_TO_FREE;
641 int qos; 639 int qos;
642 640
641 octeon_mdiobus_force_mod_depencency();
643 pr_notice("cavium-ethernet %s\n", OCTEON_ETHERNET_VERSION); 642 pr_notice("cavium-ethernet %s\n", OCTEON_ETHERNET_VERSION);
644 643
645 if (OCTEON_IS_MODEL(OCTEON_CN52XX)) 644 if (OCTEON_IS_MODEL(OCTEON_CN52XX))
diff --git a/drivers/staging/octeon/octeon-ethernet.h b/drivers/staging/octeon/octeon-ethernet.h
index 3aef9878fc0a..402a15b9bb0e 100644
--- a/drivers/staging/octeon/octeon-ethernet.h
+++ b/drivers/staging/octeon/octeon-ethernet.h
@@ -50,9 +50,9 @@ struct octeon_ethernet {
50 /* List of outstanding tx buffers per queue */ 50 /* List of outstanding tx buffers per queue */
51 struct sk_buff_head tx_free_list[16]; 51 struct sk_buff_head tx_free_list[16];
52 /* Device statistics */ 52 /* Device statistics */
53 struct net_device_stats stats 53 struct net_device_stats stats;
54; /* Generic MII info structure */ 54 struct phy_device *phydev;
55 struct mii_if_info mii_info; 55 unsigned int last_link;
56 /* Last negotiated link state */ 56 /* Last negotiated link state */
57 uint64_t link_info; 57 uint64_t link_info;
58 /* Called periodically to check link status */ 58 /* Called periodically to check link status */
diff --git a/drivers/staging/panel/Kconfig b/drivers/staging/panel/Kconfig
index 3abe7c9d558d..3defa0133f2e 100644
--- a/drivers/staging/panel/Kconfig
+++ b/drivers/staging/panel/Kconfig
@@ -47,7 +47,7 @@ config PANEL_PROFILE
47config PANEL_KEYPAD 47config PANEL_KEYPAD
48 depends on PANEL && PANEL_PROFILE="0" 48 depends on PANEL && PANEL_PROFILE="0"
49 int "Keypad type (0=none, 1=old 6 keys, 2=new 6 keys, 3=Nexcom 4 keys)" 49 int "Keypad type (0=none, 1=old 6 keys, 2=new 6 keys, 3=Nexcom 4 keys)"
50 range 0 4 50 range 0 3
51 default 0 51 default 0
52 ---help--- 52 ---help---
53 This enables and configures a keypad connected to the parallel port. 53 This enables and configures a keypad connected to the parallel port.
diff --git a/drivers/staging/panel/panel.c b/drivers/staging/panel/panel.c
index 4ce399b6d237..95c93e82ccec 100644
--- a/drivers/staging/panel/panel.c
+++ b/drivers/staging/panel/panel.c
@@ -55,7 +55,7 @@
55#include <linux/list.h> 55#include <linux/list.h>
56#include <linux/notifier.h> 56#include <linux/notifier.h>
57#include <linux/reboot.h> 57#include <linux/reboot.h>
58#include <linux/utsrelease.h> 58#include <generated/utsrelease.h>
59 59
60#include <linux/io.h> 60#include <linux/io.h>
61#include <asm/uaccess.h> 61#include <asm/uaccess.h>
@@ -378,7 +378,7 @@ static unsigned char lcd_bits[LCD_PORTS][LCD_BITS][BIT_STATES];
378 378
379#ifdef CONFIG_PANEL_LCD_CHARSET 379#ifdef CONFIG_PANEL_LCD_CHARSET
380#undef DEFAULT_LCD_CHARSET 380#undef DEFAULT_LCD_CHARSET
381#define DEFAULT_LCD_CHARSET 381#define DEFAULT_LCD_CHARSET CONFIG_PANEL_LCD_CHARSET
382#endif 382#endif
383 383
384#endif /* DEFAULT_PROFILE == 0 */ 384#endif /* DEFAULT_PROFILE == 0 */
diff --git a/drivers/staging/pohmelfs/dir.c b/drivers/staging/pohmelfs/dir.c
index 6c5b261e9f06..aacd25bfb0cb 100644
--- a/drivers/staging/pohmelfs/dir.c
+++ b/drivers/staging/pohmelfs/dir.c
@@ -722,8 +722,6 @@ static int pohmelfs_remove_entry(struct inode *dir, struct dentry *dentry)
722 if (inode->i_nlink) 722 if (inode->i_nlink)
723 inode_dec_link_count(inode); 723 inode_dec_link_count(inode);
724 } 724 }
725 dprintk("%s: inode: %p, lock: %ld, unhashed: %d.\n",
726 __func__, pi, inode->i_state & I_LOCK, hlist_unhashed(&inode->i_hash));
727 725
728 return err; 726 return err;
729} 727}
diff --git a/drivers/staging/ramzswap/TODO b/drivers/staging/ramzswap/TODO
index bac40d6cb9f1..8d64e28fac0e 100644
--- a/drivers/staging/ramzswap/TODO
+++ b/drivers/staging/ramzswap/TODO
@@ -1,6 +1,5 @@
1TODO: 1TODO:
2 - Add support for swap notifiers 2 - Add support for swap notifiers
3 - Remove CONFIG_ARM hack
4 3
5Please send patches to Greg Kroah-Hartman <greg@kroah.com> and 4Please send patches to Greg Kroah-Hartman <greg@kroah.com> and
6Nitin Gupta <ngupta@vflare.org> 5Nitin Gupta <ngupta@vflare.org>
diff --git a/drivers/staging/ramzswap/ramzswap_drv.c b/drivers/staging/ramzswap/ramzswap_drv.c
index b839f05efbce..989fac5b01b3 100644
--- a/drivers/staging/ramzswap/ramzswap_drv.c
+++ b/drivers/staging/ramzswap/ramzswap_drv.c
@@ -222,28 +222,6 @@ out:
222 return ret; 222 return ret;
223} 223}
224 224
225static void ramzswap_flush_dcache_page(struct page *page)
226{
227#ifdef CONFIG_ARM
228 int flag = 0;
229 /*
230 * Ugly hack to get flush_dcache_page() work on ARM.
231 * page_mapping(page) == NULL after clearing this swap cache flag.
232 * Without clearing this flag, flush_dcache_page() will simply set
233 * "PG_dcache_dirty" bit and return.
234 */
235 if (PageSwapCache(page)) {
236 flag = 1;
237 ClearPageSwapCache(page);
238 }
239#endif
240 flush_dcache_page(page);
241#ifdef CONFIG_ARM
242 if (flag)
243 SetPageSwapCache(page);
244#endif
245}
246
247void ramzswap_ioctl_get_stats(struct ramzswap *rzs, 225void ramzswap_ioctl_get_stats(struct ramzswap *rzs,
248 struct ramzswap_ioctl_stats *s) 226 struct ramzswap_ioctl_stats *s)
249{ 227{
@@ -655,7 +633,7 @@ static int handle_zero_page(struct bio *bio)
655 memset(user_mem, 0, PAGE_SIZE); 633 memset(user_mem, 0, PAGE_SIZE);
656 kunmap_atomic(user_mem, KM_USER0); 634 kunmap_atomic(user_mem, KM_USER0);
657 635
658 ramzswap_flush_dcache_page(page); 636 flush_dcache_page(page);
659 637
660 set_bit(BIO_UPTODATE, &bio->bi_flags); 638 set_bit(BIO_UPTODATE, &bio->bi_flags);
661 bio_endio(bio, 0); 639 bio_endio(bio, 0);
@@ -679,7 +657,7 @@ static int handle_uncompressed_page(struct ramzswap *rzs, struct bio *bio)
679 kunmap_atomic(user_mem, KM_USER0); 657 kunmap_atomic(user_mem, KM_USER0);
680 kunmap_atomic(cmem, KM_USER1); 658 kunmap_atomic(cmem, KM_USER1);
681 659
682 ramzswap_flush_dcache_page(page); 660 flush_dcache_page(page);
683 661
684 set_bit(BIO_UPTODATE, &bio->bi_flags); 662 set_bit(BIO_UPTODATE, &bio->bi_flags);
685 bio_endio(bio, 0); 663 bio_endio(bio, 0);
@@ -779,7 +757,7 @@ static int ramzswap_read(struct ramzswap *rzs, struct bio *bio)
779 goto out; 757 goto out;
780 } 758 }
781 759
782 ramzswap_flush_dcache_page(page); 760 flush_dcache_page(page);
783 761
784 set_bit(BIO_UPTODATE, &bio->bi_flags); 762 set_bit(BIO_UPTODATE, &bio->bi_flags);
785 bio_endio(bio, 0); 763 bio_endio(bio, 0);
diff --git a/drivers/staging/rtl8187se/ieee80211/ieee80211.h b/drivers/staging/rtl8187se/ieee80211/ieee80211.h
index 3222c22152fb..0d490c164db6 100644
--- a/drivers/staging/rtl8187se/ieee80211/ieee80211.h
+++ b/drivers/staging/rtl8187se/ieee80211/ieee80211.h
@@ -1318,13 +1318,13 @@ extern int ieee80211_encrypt_fragment(
1318 struct sk_buff *frag, 1318 struct sk_buff *frag,
1319 int hdr_len); 1319 int hdr_len);
1320 1320
1321extern int ieee80211_xmit(struct sk_buff *skb, 1321extern int ieee80211_rtl_xmit(struct sk_buff *skb,
1322 struct net_device *dev); 1322 struct net_device *dev);
1323extern void ieee80211_txb_free(struct ieee80211_txb *); 1323extern void ieee80211_txb_free(struct ieee80211_txb *);
1324 1324
1325 1325
1326/* ieee80211_rx.c */ 1326/* ieee80211_rx.c */
1327extern int ieee80211_rx(struct ieee80211_device *ieee, struct sk_buff *skb, 1327extern int ieee80211_rtl_rx(struct ieee80211_device *ieee, struct sk_buff *skb,
1328 struct ieee80211_rx_stats *rx_stats); 1328 struct ieee80211_rx_stats *rx_stats);
1329extern void ieee80211_rx_mgt(struct ieee80211_device *ieee, 1329extern void ieee80211_rx_mgt(struct ieee80211_device *ieee,
1330 struct ieee80211_hdr_4addr *header, 1330 struct ieee80211_hdr_4addr *header,
@@ -1376,8 +1376,8 @@ extern void ieee80211_stop_protocol(struct ieee80211_device *ieee);
1376extern void ieee80211_softmac_start_protocol(struct ieee80211_device *ieee); 1376extern void ieee80211_softmac_start_protocol(struct ieee80211_device *ieee);
1377extern void ieee80211_softmac_stop_protocol(struct ieee80211_device *ieee); 1377extern void ieee80211_softmac_stop_protocol(struct ieee80211_device *ieee);
1378extern void ieee80211_reset_queue(struct ieee80211_device *ieee); 1378extern void ieee80211_reset_queue(struct ieee80211_device *ieee);
1379extern void ieee80211_wake_queue(struct ieee80211_device *ieee); 1379extern void ieee80211_rtl_wake_queue(struct ieee80211_device *ieee);
1380extern void ieee80211_stop_queue(struct ieee80211_device *ieee); 1380extern void ieee80211_rtl_stop_queue(struct ieee80211_device *ieee);
1381extern struct sk_buff *ieee80211_get_beacon(struct ieee80211_device *ieee); 1381extern struct sk_buff *ieee80211_get_beacon(struct ieee80211_device *ieee);
1382extern void ieee80211_start_send_beacons(struct ieee80211_device *ieee); 1382extern void ieee80211_start_send_beacons(struct ieee80211_device *ieee);
1383extern void ieee80211_stop_send_beacons(struct ieee80211_device *ieee); 1383extern void ieee80211_stop_send_beacons(struct ieee80211_device *ieee);
@@ -1385,7 +1385,7 @@ extern int ieee80211_wpa_supplicant_ioctl(struct ieee80211_device *ieee, struct
1385extern void notify_wx_assoc_event(struct ieee80211_device *ieee); 1385extern void notify_wx_assoc_event(struct ieee80211_device *ieee);
1386extern void ieee80211_ps_tx_ack(struct ieee80211_device *ieee, short success); 1386extern void ieee80211_ps_tx_ack(struct ieee80211_device *ieee, short success);
1387extern void SendDisassociation(struct ieee80211_device *ieee,u8* asSta,u8 asRsn); 1387extern void SendDisassociation(struct ieee80211_device *ieee,u8* asSta,u8 asRsn);
1388extern void ieee80211_start_scan(struct ieee80211_device *ieee); 1388extern void ieee80211_rtl_start_scan(struct ieee80211_device *ieee);
1389 1389
1390//Add for RF power on power off by lizhaoming 080512 1390//Add for RF power on power off by lizhaoming 080512
1391extern void SendDisassociation(struct ieee80211_device *ieee, 1391extern void SendDisassociation(struct ieee80211_device *ieee,
diff --git a/drivers/staging/rtl8187se/ieee80211/ieee80211_rx.c b/drivers/staging/rtl8187se/ieee80211/ieee80211_rx.c
index f882dd8cf9b5..9128c181bc7d 100644
--- a/drivers/staging/rtl8187se/ieee80211/ieee80211_rx.c
+++ b/drivers/staging/rtl8187se/ieee80211/ieee80211_rx.c
@@ -469,7 +469,7 @@ drop:
469/* All received frames are sent to this function. @skb contains the frame in 469/* All received frames are sent to this function. @skb contains the frame in
470 * IEEE 802.11 format, i.e., in the format it was sent over air. 470 * IEEE 802.11 format, i.e., in the format it was sent over air.
471 * This function is called only as a tasklet (software IRQ). */ 471 * This function is called only as a tasklet (software IRQ). */
472int ieee80211_rx(struct ieee80211_device *ieee, struct sk_buff *skb, 472int ieee80211_rtl_rx(struct ieee80211_device *ieee, struct sk_buff *skb,
473 struct ieee80211_rx_stats *rx_stats) 473 struct ieee80211_rx_stats *rx_stats)
474{ 474{
475 struct net_device *dev = ieee->dev; 475 struct net_device *dev = ieee->dev;
diff --git a/drivers/staging/rtl8187se/ieee80211/ieee80211_softmac.c b/drivers/staging/rtl8187se/ieee80211/ieee80211_softmac.c
index 1fe19c39d702..c7c645af0ebb 100644
--- a/drivers/staging/rtl8187se/ieee80211/ieee80211_softmac.c
+++ b/drivers/staging/rtl8187se/ieee80211/ieee80211_softmac.c
@@ -689,7 +689,7 @@ void ieee80211_stop_scan(struct ieee80211_device *ieee)
689} 689}
690 690
691/* called with ieee->lock held */ 691/* called with ieee->lock held */
692void ieee80211_start_scan(struct ieee80211_device *ieee) 692void ieee80211_rtl_start_scan(struct ieee80211_device *ieee)
693{ 693{
694 if(IS_DOT11D_ENABLE(ieee) ) 694 if(IS_DOT11D_ENABLE(ieee) )
695 { 695 {
@@ -1196,7 +1196,7 @@ void ieee80211_associate_step1(struct ieee80211_device *ieee)
1196 } 1196 }
1197} 1197}
1198 1198
1199void ieee80211_auth_challenge(struct ieee80211_device *ieee, u8 *challenge, int chlen) 1199void ieee80211_rtl_auth_challenge(struct ieee80211_device *ieee, u8 *challenge, int chlen)
1200{ 1200{
1201 u8 *c; 1201 u8 *c;
1202 struct sk_buff *skb; 1202 struct sk_buff *skb;
@@ -1898,7 +1898,7 @@ associate_complete:
1898 1898
1899 ieee80211_associate_step2(ieee); 1899 ieee80211_associate_step2(ieee);
1900 }else{ 1900 }else{
1901 ieee80211_auth_challenge(ieee, challenge, chlen); 1901 ieee80211_rtl_auth_challenge(ieee, challenge, chlen);
1902 } 1902 }
1903 }else{ 1903 }else{
1904 ieee->softmac_stats.rx_auth_rs_err++; 1904 ieee->softmac_stats.rx_auth_rs_err++;
@@ -2047,7 +2047,7 @@ void ieee80211_reset_queue(struct ieee80211_device *ieee)
2047 2047
2048} 2048}
2049 2049
2050void ieee80211_wake_queue(struct ieee80211_device *ieee) 2050void ieee80211_rtl_wake_queue(struct ieee80211_device *ieee)
2051{ 2051{
2052 2052
2053 unsigned long flags; 2053 unsigned long flags;
@@ -2089,7 +2089,7 @@ exit :
2089} 2089}
2090 2090
2091 2091
2092void ieee80211_stop_queue(struct ieee80211_device *ieee) 2092void ieee80211_rtl_stop_queue(struct ieee80211_device *ieee)
2093{ 2093{
2094 //unsigned long flags; 2094 //unsigned long flags;
2095 //spin_lock_irqsave(&ieee->lock,flags); 2095 //spin_lock_irqsave(&ieee->lock,flags);
@@ -2301,7 +2301,7 @@ void ieee80211_start_bss(struct ieee80211_device *ieee)
2301//#else 2301//#else
2302 if (ieee->state == IEEE80211_NOLINK){ 2302 if (ieee->state == IEEE80211_NOLINK){
2303 ieee->actscanning = true; 2303 ieee->actscanning = true;
2304 ieee80211_start_scan(ieee); 2304 ieee80211_rtl_start_scan(ieee);
2305 } 2305 }
2306//#endif 2306//#endif
2307 spin_unlock_irqrestore(&ieee->lock, flags); 2307 spin_unlock_irqrestore(&ieee->lock, flags);
@@ -2357,7 +2357,7 @@ void ieee80211_associate_retry_wq(struct work_struct *work)
2357 if(ieee->state == IEEE80211_NOLINK){ 2357 if(ieee->state == IEEE80211_NOLINK){
2358 ieee->beinretry = false; 2358 ieee->beinretry = false;
2359 ieee->actscanning = true; 2359 ieee->actscanning = true;
2360 ieee80211_start_scan(ieee); 2360 ieee80211_rtl_start_scan(ieee);
2361 } 2361 }
2362 //YJ,add,080828, notify os here 2362 //YJ,add,080828, notify os here
2363 if(ieee->state == IEEE80211_NOLINK) 2363 if(ieee->state == IEEE80211_NOLINK)
diff --git a/drivers/staging/rtl8187se/ieee80211/ieee80211_tx.c b/drivers/staging/rtl8187se/ieee80211/ieee80211_tx.c
index dde1f2e0cf32..69bd02164b0c 100644
--- a/drivers/staging/rtl8187se/ieee80211/ieee80211_tx.c
+++ b/drivers/staging/rtl8187se/ieee80211/ieee80211_tx.c
@@ -304,7 +304,7 @@ ieee80211_classify(struct sk_buff *skb, struct ieee80211_network *network)
304} 304}
305 305
306/* SKBs are added to the ieee->tx_queue. */ 306/* SKBs are added to the ieee->tx_queue. */
307int ieee80211_xmit(struct sk_buff *skb, 307int ieee80211_rtl_xmit(struct sk_buff *skb,
308 struct net_device *dev) 308 struct net_device *dev)
309{ 309{
310 struct ieee80211_device *ieee = netdev_priv(dev); 310 struct ieee80211_device *ieee = netdev_priv(dev);
diff --git a/drivers/staging/rtl8187se/r8180_core.c b/drivers/staging/rtl8187se/r8180_core.c
index 57c62b0a402f..e0f13efdb15a 100644
--- a/drivers/staging/rtl8187se/r8180_core.c
+++ b/drivers/staging/rtl8187se/r8180_core.c
@@ -1811,7 +1811,7 @@ void rtl8180_rx(struct net_device *dev)
1811 if(priv->rx_skb->len > 4) 1811 if(priv->rx_skb->len > 4)
1812 skb_trim(priv->rx_skb,priv->rx_skb->len-4); 1812 skb_trim(priv->rx_skb,priv->rx_skb->len-4);
1813#ifndef RX_DONT_PASS_UL 1813#ifndef RX_DONT_PASS_UL
1814 if(!ieee80211_rx(priv->ieee80211, 1814 if(!ieee80211_rtl_rx(priv->ieee80211,
1815 priv->rx_skb, &stats)){ 1815 priv->rx_skb, &stats)){
1816#endif // RX_DONT_PASS_UL 1816#endif // RX_DONT_PASS_UL
1817 1817
@@ -1917,11 +1917,11 @@ rate)
1917 if (!check_nic_enought_desc(dev, priority)){ 1917 if (!check_nic_enought_desc(dev, priority)){
1918 DMESGW("Error: no descriptor left by previous TX (avail %d) ", 1918 DMESGW("Error: no descriptor left by previous TX (avail %d) ",
1919 get_curr_tx_free_desc(dev, priority)); 1919 get_curr_tx_free_desc(dev, priority));
1920 ieee80211_stop_queue(priv->ieee80211); 1920 ieee80211_rtl_stop_queue(priv->ieee80211);
1921 } 1921 }
1922 rtl8180_tx(dev, skb->data, skb->len, priority, morefrag,0,rate); 1922 rtl8180_tx(dev, skb->data, skb->len, priority, morefrag,0,rate);
1923 if (!check_nic_enought_desc(dev, priority)) 1923 if (!check_nic_enought_desc(dev, priority))
1924 ieee80211_stop_queue(priv->ieee80211); 1924 ieee80211_rtl_stop_queue(priv->ieee80211);
1925 1925
1926 spin_unlock_irqrestore(&priv->tx_lock,flags); 1926 spin_unlock_irqrestore(&priv->tx_lock,flags);
1927} 1927}
@@ -3680,7 +3680,7 @@ static const struct net_device_ops rtl8180_netdev_ops = {
3680 .ndo_set_mac_address = r8180_set_mac_adr, 3680 .ndo_set_mac_address = r8180_set_mac_adr,
3681 .ndo_validate_addr = eth_validate_addr, 3681 .ndo_validate_addr = eth_validate_addr,
3682 .ndo_change_mtu = eth_change_mtu, 3682 .ndo_change_mtu = eth_change_mtu,
3683 .ndo_start_xmit = ieee80211_xmit, 3683 .ndo_start_xmit = ieee80211_rtl_xmit,
3684}; 3684};
3685 3685
3686static int __devinit rtl8180_pci_probe(struct pci_dev *pdev, 3686static int __devinit rtl8180_pci_probe(struct pci_dev *pdev,
@@ -3900,7 +3900,7 @@ void rtl8180_try_wake_queue(struct net_device *dev, int pri)
3900 spin_unlock_irqrestore(&priv->tx_lock,flags); 3900 spin_unlock_irqrestore(&priv->tx_lock,flags);
3901 3901
3902 if(enough_desc) 3902 if(enough_desc)
3903 ieee80211_wake_queue(priv->ieee80211); 3903 ieee80211_rtl_wake_queue(priv->ieee80211);
3904} 3904}
3905 3905
3906void rtl8180_tx_isr(struct net_device *dev, int pri,short error) 3906void rtl8180_tx_isr(struct net_device *dev, int pri,short error)
diff --git a/drivers/staging/rtl8187se/r8180_wx.c b/drivers/staging/rtl8187se/r8180_wx.c
index 536cb6e8e796..124cde356cbc 100644
--- a/drivers/staging/rtl8187se/r8180_wx.c
+++ b/drivers/staging/rtl8187se/r8180_wx.c
@@ -377,7 +377,7 @@ static int r8180_wx_set_scan(struct net_device *dev, struct iw_request_info *a,
377 // queue_work(priv->ieee80211->wq, &priv->ieee80211->wx_sync_scan_wq); 377 // queue_work(priv->ieee80211->wq, &priv->ieee80211->wx_sync_scan_wq);
378 //printk("start scan============================>\n"); 378 //printk("start scan============================>\n");
379 ieee80211_softmac_ips_scan_syncro(priv->ieee80211); 379 ieee80211_softmac_ips_scan_syncro(priv->ieee80211);
380//ieee80211_start_scan(priv->ieee80211); 380//ieee80211_rtl_start_scan(priv->ieee80211);
381 /* intentionally forget to up sem */ 381 /* intentionally forget to up sem */
382// up(&priv->ieee80211->wx_sem); 382// up(&priv->ieee80211->wx_sem);
383 ret = 0; 383 ret = 0;
diff --git a/drivers/staging/rtl8192e/ieee80211.h b/drivers/staging/rtl8192e/ieee80211.h
index 97137ddefff4..3ba9e9e90bda 100644
--- a/drivers/staging/rtl8192e/ieee80211.h
+++ b/drivers/staging/rtl8192e/ieee80211.h
@@ -303,8 +303,8 @@ enum _ReasonCode{
303#define ieee80211_rx_mgt ieee80211_rx_mgt_rsl 303#define ieee80211_rx_mgt ieee80211_rx_mgt_rsl
304 304
305#define ieee80211_get_beacon ieee80211_get_beacon_rsl 305#define ieee80211_get_beacon ieee80211_get_beacon_rsl
306#define ieee80211_wake_queue ieee80211_wake_queue_rsl 306#define ieee80211_rtl_wake_queue ieee80211_rtl_wake_queue_rsl
307#define ieee80211_stop_queue ieee80211_stop_queue_rsl 307#define ieee80211_rtl_stop_queue ieee80211_rtl_stop_queue_rsl
308#define ieee80211_reset_queue ieee80211_reset_queue_rsl 308#define ieee80211_reset_queue ieee80211_reset_queue_rsl
309#define ieee80211_softmac_stop_protocol ieee80211_softmac_stop_protocol_rsl 309#define ieee80211_softmac_stop_protocol ieee80211_softmac_stop_protocol_rsl
310#define ieee80211_softmac_start_protocol ieee80211_softmac_start_protocol_rsl 310#define ieee80211_softmac_start_protocol ieee80211_softmac_start_protocol_rsl
@@ -2435,13 +2435,13 @@ extern int ieee80211_encrypt_fragment(
2435 struct sk_buff *frag, 2435 struct sk_buff *frag,
2436 int hdr_len); 2436 int hdr_len);
2437 2437
2438extern int ieee80211_xmit(struct sk_buff *skb, 2438extern int ieee80211_rtl_xmit(struct sk_buff *skb,
2439 struct net_device *dev); 2439 struct net_device *dev);
2440extern void ieee80211_txb_free(struct ieee80211_txb *); 2440extern void ieee80211_txb_free(struct ieee80211_txb *);
2441 2441
2442 2442
2443/* ieee80211_rx.c */ 2443/* ieee80211_rx.c */
2444extern int ieee80211_rx(struct ieee80211_device *ieee, struct sk_buff *skb, 2444extern int ieee80211_rtl_rx(struct ieee80211_device *ieee, struct sk_buff *skb,
2445 struct ieee80211_rx_stats *rx_stats); 2445 struct ieee80211_rx_stats *rx_stats);
2446extern void ieee80211_rx_mgt(struct ieee80211_device *ieee, 2446extern void ieee80211_rx_mgt(struct ieee80211_device *ieee,
2447 struct ieee80211_hdr_4addr *header, 2447 struct ieee80211_hdr_4addr *header,
@@ -2502,8 +2502,8 @@ extern void ieee80211_stop_protocol(struct ieee80211_device *ieee);
2502extern void ieee80211_softmac_start_protocol(struct ieee80211_device *ieee); 2502extern void ieee80211_softmac_start_protocol(struct ieee80211_device *ieee);
2503extern void ieee80211_softmac_stop_protocol(struct ieee80211_device *ieee); 2503extern void ieee80211_softmac_stop_protocol(struct ieee80211_device *ieee);
2504extern void ieee80211_reset_queue(struct ieee80211_device *ieee); 2504extern void ieee80211_reset_queue(struct ieee80211_device *ieee);
2505extern void ieee80211_wake_queue(struct ieee80211_device *ieee); 2505extern void ieee80211_rtl_wake_queue(struct ieee80211_device *ieee);
2506extern void ieee80211_stop_queue(struct ieee80211_device *ieee); 2506extern void ieee80211_rtl_stop_queue(struct ieee80211_device *ieee);
2507extern struct sk_buff *ieee80211_get_beacon(struct ieee80211_device *ieee); 2507extern struct sk_buff *ieee80211_get_beacon(struct ieee80211_device *ieee);
2508extern void ieee80211_start_send_beacons(struct ieee80211_device *ieee); 2508extern void ieee80211_start_send_beacons(struct ieee80211_device *ieee);
2509extern void ieee80211_stop_send_beacons(struct ieee80211_device *ieee); 2509extern void ieee80211_stop_send_beacons(struct ieee80211_device *ieee);
diff --git a/drivers/staging/rtl8192e/ieee80211/ieee80211.h b/drivers/staging/rtl8192e/ieee80211/ieee80211.h
index 83c8452de378..aa76390487bb 100644
--- a/drivers/staging/rtl8192e/ieee80211/ieee80211.h
+++ b/drivers/staging/rtl8192e/ieee80211/ieee80211.h
@@ -333,8 +333,8 @@ enum _ReasonCode{
333#define ieee80211_rx_mgt ieee80211_rx_mgt_rsl 333#define ieee80211_rx_mgt ieee80211_rx_mgt_rsl
334 334
335#define ieee80211_get_beacon ieee80211_get_beacon_rsl 335#define ieee80211_get_beacon ieee80211_get_beacon_rsl
336#define ieee80211_wake_queue ieee80211_wake_queue_rsl 336#define ieee80211_rtl_wake_queue ieee80211_rtl_wake_queue_rsl
337#define ieee80211_stop_queue ieee80211_stop_queue_rsl 337#define ieee80211_rtl_stop_queue ieee80211_rtl_stop_queue_rsl
338#define ieee80211_reset_queue ieee80211_reset_queue_rsl 338#define ieee80211_reset_queue ieee80211_reset_queue_rsl
339#define ieee80211_softmac_stop_protocol ieee80211_softmac_stop_protocol_rsl 339#define ieee80211_softmac_stop_protocol ieee80211_softmac_stop_protocol_rsl
340#define ieee80211_softmac_start_protocol ieee80211_softmac_start_protocol_rsl 340#define ieee80211_softmac_start_protocol ieee80211_softmac_start_protocol_rsl
@@ -2546,13 +2546,13 @@ extern int ieee80211_encrypt_fragment(
2546 struct sk_buff *frag, 2546 struct sk_buff *frag,
2547 int hdr_len); 2547 int hdr_len);
2548 2548
2549extern int ieee80211_xmit(struct sk_buff *skb, 2549extern int ieee80211_rtl_xmit(struct sk_buff *skb,
2550 struct net_device *dev); 2550 struct net_device *dev);
2551extern void ieee80211_txb_free(struct ieee80211_txb *); 2551extern void ieee80211_txb_free(struct ieee80211_txb *);
2552 2552
2553 2553
2554/* ieee80211_rx.c */ 2554/* ieee80211_rx.c */
2555extern int ieee80211_rx(struct ieee80211_device *ieee, struct sk_buff *skb, 2555extern int ieee80211_rtl_rx(struct ieee80211_device *ieee, struct sk_buff *skb,
2556 struct ieee80211_rx_stats *rx_stats); 2556 struct ieee80211_rx_stats *rx_stats);
2557extern void ieee80211_rx_mgt(struct ieee80211_device *ieee, 2557extern void ieee80211_rx_mgt(struct ieee80211_device *ieee,
2558 struct ieee80211_hdr_4addr *header, 2558 struct ieee80211_hdr_4addr *header,
@@ -2613,8 +2613,8 @@ extern void ieee80211_stop_protocol(struct ieee80211_device *ieee);
2613extern void ieee80211_softmac_start_protocol(struct ieee80211_device *ieee); 2613extern void ieee80211_softmac_start_protocol(struct ieee80211_device *ieee);
2614extern void ieee80211_softmac_stop_protocol(struct ieee80211_device *ieee); 2614extern void ieee80211_softmac_stop_protocol(struct ieee80211_device *ieee);
2615extern void ieee80211_reset_queue(struct ieee80211_device *ieee); 2615extern void ieee80211_reset_queue(struct ieee80211_device *ieee);
2616extern void ieee80211_wake_queue(struct ieee80211_device *ieee); 2616extern void ieee80211_rtl_wake_queue(struct ieee80211_device *ieee);
2617extern void ieee80211_stop_queue(struct ieee80211_device *ieee); 2617extern void ieee80211_rtl_stop_queue(struct ieee80211_device *ieee);
2618extern struct sk_buff *ieee80211_get_beacon(struct ieee80211_device *ieee); 2618extern struct sk_buff *ieee80211_get_beacon(struct ieee80211_device *ieee);
2619extern void ieee80211_start_send_beacons(struct ieee80211_device *ieee); 2619extern void ieee80211_start_send_beacons(struct ieee80211_device *ieee);
2620extern void ieee80211_stop_send_beacons(struct ieee80211_device *ieee); 2620extern void ieee80211_stop_send_beacons(struct ieee80211_device *ieee);
diff --git a/drivers/staging/rtl8192e/ieee80211/ieee80211_module.c b/drivers/staging/rtl8192e/ieee80211/ieee80211_module.c
index 2644155737a8..f43a7db5c78b 100644
--- a/drivers/staging/rtl8192e/ieee80211/ieee80211_module.c
+++ b/drivers/staging/rtl8192e/ieee80211/ieee80211_module.c
@@ -119,7 +119,7 @@ struct net_device *alloc_ieee80211(int sizeof_priv)
119 ieee = (struct ieee80211_device *)dev->priv; 119 ieee = (struct ieee80211_device *)dev->priv;
120#endif 120#endif
121#if 0 121#if 0
122 dev->hard_start_xmit = ieee80211_xmit; 122 dev->hard_start_xmit = ieee80211_rtl_xmit;
123#endif 123#endif
124 124
125 memset(ieee, 0, sizeof(struct ieee80211_device)+sizeof_priv); 125 memset(ieee, 0, sizeof(struct ieee80211_device)+sizeof_priv);
@@ -333,7 +333,7 @@ extern void ieee80211_crypto_ccmp_exit(void);
333extern int ieee80211_crypto_wep_init(void); 333extern int ieee80211_crypto_wep_init(void);
334extern void ieee80211_crypto_wep_exit(void); 334extern void ieee80211_crypto_wep_exit(void);
335 335
336int __init ieee80211_init(void) 336int __init ieee80211_rtl_init(void)
337{ 337{
338 struct proc_dir_entry *e; 338 struct proc_dir_entry *e;
339 int retval; 339 int retval;
@@ -389,7 +389,7 @@ int __init ieee80211_init(void)
389 return 0; 389 return 0;
390} 390}
391 391
392void __exit ieee80211_exit(void) 392void __exit ieee80211_rtl_exit(void)
393{ 393{
394 if (ieee80211_proc) { 394 if (ieee80211_proc) {
395 remove_proc_entry("debug_level", ieee80211_proc); 395 remove_proc_entry("debug_level", ieee80211_proc);
@@ -412,8 +412,8 @@ module_param(debug, int, 0444);
412MODULE_PARM_DESC(debug, "debug output mask"); 412MODULE_PARM_DESC(debug, "debug output mask");
413 413
414 414
415//module_exit(ieee80211_exit); 415//module_exit(ieee80211_rtl_exit);
416//module_init(ieee80211_init); 416//module_init(ieee80211_rtl_init);
417#endif 417#endif
418#endif 418#endif
419 419
diff --git a/drivers/staging/rtl8192e/ieee80211/ieee80211_rx.c b/drivers/staging/rtl8192e/ieee80211/ieee80211_rx.c
index 5dc478b86375..06d91715143c 100644
--- a/drivers/staging/rtl8192e/ieee80211/ieee80211_rx.c
+++ b/drivers/staging/rtl8192e/ieee80211/ieee80211_rx.c
@@ -923,7 +923,7 @@ u8 parse_subframe(struct sk_buff *skb,
923/* All received frames are sent to this function. @skb contains the frame in 923/* All received frames are sent to this function. @skb contains the frame in
924 * IEEE 802.11 format, i.e., in the format it was sent over air. 924 * IEEE 802.11 format, i.e., in the format it was sent over air.
925 * This function is called only as a tasklet (software IRQ). */ 925 * This function is called only as a tasklet (software IRQ). */
926int ieee80211_rx(struct ieee80211_device *ieee, struct sk_buff *skb, 926int ieee80211_rtl_rx(struct ieee80211_device *ieee, struct sk_buff *skb,
927 struct ieee80211_rx_stats *rx_stats) 927 struct ieee80211_rx_stats *rx_stats)
928{ 928{
929 struct net_device *dev = ieee->dev; 929 struct net_device *dev = ieee->dev;
diff --git a/drivers/staging/rtl8192e/ieee80211/ieee80211_softmac.c b/drivers/staging/rtl8192e/ieee80211/ieee80211_softmac.c
index 593d22825184..6d1ddec39f0e 100644
--- a/drivers/staging/rtl8192e/ieee80211/ieee80211_softmac.c
+++ b/drivers/staging/rtl8192e/ieee80211/ieee80211_softmac.c
@@ -684,7 +684,7 @@ void ieee80211_stop_scan(struct ieee80211_device *ieee)
684} 684}
685 685
686/* called with ieee->lock held */ 686/* called with ieee->lock held */
687void ieee80211_start_scan(struct ieee80211_device *ieee) 687void ieee80211_rtl_start_scan(struct ieee80211_device *ieee)
688{ 688{
689#ifdef ENABLE_DOT11D 689#ifdef ENABLE_DOT11D
690 if(IS_DOT11D_ENABLE(ieee) ) 690 if(IS_DOT11D_ENABLE(ieee) )
@@ -1430,7 +1430,7 @@ void ieee80211_associate_step1(struct ieee80211_device *ieee)
1430 } 1430 }
1431} 1431}
1432 1432
1433void ieee80211_auth_challenge(struct ieee80211_device *ieee, u8 *challenge, int chlen) 1433void ieee80211_rtl_auth_challenge(struct ieee80211_device *ieee, u8 *challenge, int chlen)
1434{ 1434{
1435 u8 *c; 1435 u8 *c;
1436 struct sk_buff *skb; 1436 struct sk_buff *skb;
@@ -2262,7 +2262,7 @@ ieee80211_rx_frame_softmac(struct ieee80211_device *ieee, struct sk_buff *skb,
2262 2262
2263 ieee80211_associate_step2(ieee); 2263 ieee80211_associate_step2(ieee);
2264 }else{ 2264 }else{
2265 ieee80211_auth_challenge(ieee, challenge, chlen); 2265 ieee80211_rtl_auth_challenge(ieee, challenge, chlen);
2266 } 2266 }
2267 }else{ 2267 }else{
2268 ieee->softmac_stats.rx_auth_rs_err++; 2268 ieee->softmac_stats.rx_auth_rs_err++;
@@ -2376,7 +2376,7 @@ void ieee80211_softmac_xmit(struct ieee80211_txb *txb, struct ieee80211_device *
2376 * to check it any more. 2376 * to check it any more.
2377 * */ 2377 * */
2378 //printk("error:no descriptor left@queue_index %d\n", queue_index); 2378 //printk("error:no descriptor left@queue_index %d\n", queue_index);
2379 //ieee80211_stop_queue(ieee); 2379 //ieee80211_rtl_stop_queue(ieee);
2380#ifdef USB_TX_DRIVER_AGGREGATION_ENABLE 2380#ifdef USB_TX_DRIVER_AGGREGATION_ENABLE
2381 skb_queue_tail(&ieee->skb_drv_aggQ[queue_index], txb->fragments[i]); 2381 skb_queue_tail(&ieee->skb_drv_aggQ[queue_index], txb->fragments[i]);
2382#else 2382#else
@@ -2440,7 +2440,7 @@ void ieee80211_reset_queue(struct ieee80211_device *ieee)
2440 2440
2441} 2441}
2442 2442
2443void ieee80211_wake_queue(struct ieee80211_device *ieee) 2443void ieee80211_rtl_wake_queue(struct ieee80211_device *ieee)
2444{ 2444{
2445 2445
2446 unsigned long flags; 2446 unsigned long flags;
@@ -2481,7 +2481,7 @@ exit :
2481} 2481}
2482 2482
2483 2483
2484void ieee80211_stop_queue(struct ieee80211_device *ieee) 2484void ieee80211_rtl_stop_queue(struct ieee80211_device *ieee)
2485{ 2485{
2486 //unsigned long flags; 2486 //unsigned long flags;
2487 //spin_lock_irqsave(&ieee->lock,flags); 2487 //spin_lock_irqsave(&ieee->lock,flags);
@@ -2706,7 +2706,7 @@ void ieee80211_start_bss(struct ieee80211_device *ieee)
2706 2706
2707 if (ieee->state == IEEE80211_NOLINK){ 2707 if (ieee->state == IEEE80211_NOLINK){
2708 ieee->actscanning = true; 2708 ieee->actscanning = true;
2709 ieee80211_start_scan(ieee); 2709 ieee80211_rtl_start_scan(ieee);
2710 } 2710 }
2711 spin_unlock_irqrestore(&ieee->lock, flags); 2711 spin_unlock_irqrestore(&ieee->lock, flags);
2712} 2712}
@@ -2775,7 +2775,7 @@ void ieee80211_associate_retry_wq(struct ieee80211_device *ieee)
2775 { 2775 {
2776 ieee->is_roaming= false; 2776 ieee->is_roaming= false;
2777 ieee->actscanning = true; 2777 ieee->actscanning = true;
2778 ieee80211_start_scan(ieee); 2778 ieee80211_rtl_start_scan(ieee);
2779 } 2779 }
2780 spin_unlock_irqrestore(&ieee->lock, flags); 2780 spin_unlock_irqrestore(&ieee->lock, flags);
2781 2781
@@ -3497,8 +3497,8 @@ void notify_wx_assoc_event(struct ieee80211_device *ieee)
3497 3497
3498#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)) 3498#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0))
3499//EXPORT_SYMBOL(ieee80211_get_beacon); 3499//EXPORT_SYMBOL(ieee80211_get_beacon);
3500//EXPORT_SYMBOL(ieee80211_wake_queue); 3500//EXPORT_SYMBOL(ieee80211_rtl_wake_queue);
3501//EXPORT_SYMBOL(ieee80211_stop_queue); 3501//EXPORT_SYMBOL(ieee80211_rtl_stop_queue);
3502//EXPORT_SYMBOL(ieee80211_reset_queue); 3502//EXPORT_SYMBOL(ieee80211_reset_queue);
3503//EXPORT_SYMBOL(ieee80211_softmac_stop_protocol); 3503//EXPORT_SYMBOL(ieee80211_softmac_stop_protocol);
3504//EXPORT_SYMBOL(ieee80211_softmac_start_protocol); 3504//EXPORT_SYMBOL(ieee80211_softmac_start_protocol);
@@ -3518,8 +3518,8 @@ void notify_wx_assoc_event(struct ieee80211_device *ieee)
3518//EXPORT_SYMBOL(ieee80211_start_scan_syncro); 3518//EXPORT_SYMBOL(ieee80211_start_scan_syncro);
3519#else 3519#else
3520EXPORT_SYMBOL_NOVERS(ieee80211_get_beacon); 3520EXPORT_SYMBOL_NOVERS(ieee80211_get_beacon);
3521EXPORT_SYMBOL_NOVERS(ieee80211_wake_queue); 3521EXPORT_SYMBOL_NOVERS(ieee80211_rtl_wake_queue);
3522EXPORT_SYMBOL_NOVERS(ieee80211_stop_queue); 3522EXPORT_SYMBOL_NOVERS(ieee80211_rtl_stop_queue);
3523EXPORT_SYMBOL_NOVERS(ieee80211_reset_queue); 3523EXPORT_SYMBOL_NOVERS(ieee80211_reset_queue);
3524EXPORT_SYMBOL_NOVERS(ieee80211_softmac_stop_protocol); 3524EXPORT_SYMBOL_NOVERS(ieee80211_softmac_stop_protocol);
3525EXPORT_SYMBOL_NOVERS(ieee80211_softmac_start_protocol); 3525EXPORT_SYMBOL_NOVERS(ieee80211_softmac_start_protocol);
diff --git a/drivers/staging/rtl8192e/ieee80211/ieee80211_tx.c b/drivers/staging/rtl8192e/ieee80211/ieee80211_tx.c
index 103b33c093f5..798fb4154c25 100644
--- a/drivers/staging/rtl8192e/ieee80211/ieee80211_tx.c
+++ b/drivers/staging/rtl8192e/ieee80211/ieee80211_tx.c
@@ -604,7 +604,7 @@ void ieee80211_query_seqnum(struct ieee80211_device*ieee, struct sk_buff* skb, u
604 } 604 }
605} 605}
606 606
607int ieee80211_xmit(struct sk_buff *skb, struct net_device *dev) 607int ieee80211_rtl_xmit(struct sk_buff *skb, struct net_device *dev)
608{ 608{
609#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0)) 609#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0))
610 struct ieee80211_device *ieee = netdev_priv(dev); 610 struct ieee80211_device *ieee = netdev_priv(dev);
diff --git a/drivers/staging/rtl8192e/ieee80211/ieee80211_wx.c b/drivers/staging/rtl8192e/ieee80211/ieee80211_wx.c
index 4e34a1f4c66b..3441b72dd8fa 100644
--- a/drivers/staging/rtl8192e/ieee80211/ieee80211_wx.c
+++ b/drivers/staging/rtl8192e/ieee80211/ieee80211_wx.c
@@ -976,7 +976,7 @@ int ieee80211_wx_set_gen_ie(struct ieee80211_device *ieee, u8 *ie, size_t len)
976 { 976 {
977 if (len != ie[1]+2) 977 if (len != ie[1]+2)
978 { 978 {
979 printk("len:%d, ie:%d\n", len, ie[1]); 979 printk("len:%zu, ie:%d\n", len, ie[1]);
980 return -EINVAL; 980 return -EINVAL;
981 } 981 }
982 buf = kmalloc(len, GFP_KERNEL); 982 buf = kmalloc(len, GFP_KERNEL);
diff --git a/drivers/staging/rtl8192e/ieee80211/rtl819x_BAProc.c b/drivers/staging/rtl8192e/ieee80211/rtl819x_BAProc.c
index 98b3bb6b6d69..e41e8a0c739c 100644
--- a/drivers/staging/rtl8192e/ieee80211/rtl819x_BAProc.c
+++ b/drivers/staging/rtl8192e/ieee80211/rtl819x_BAProc.c
@@ -382,7 +382,7 @@ int ieee80211_rx_ADDBAReq( struct ieee80211_device* ieee, struct sk_buff *skb)
382 382
383 if (skb->len < sizeof( struct ieee80211_hdr_3addr) + 9) 383 if (skb->len < sizeof( struct ieee80211_hdr_3addr) + 9)
384 { 384 {
385 IEEE80211_DEBUG(IEEE80211_DL_ERR, " Invalid skb len in BAREQ(%d / %d)\n", skb->len, (sizeof( struct ieee80211_hdr_3addr) + 9)); 385 IEEE80211_DEBUG(IEEE80211_DL_ERR, " Invalid skb len in BAREQ(%d / %zu)\n", skb->len, (sizeof( struct ieee80211_hdr_3addr) + 9));
386 return -1; 386 return -1;
387 } 387 }
388 388
@@ -481,7 +481,7 @@ int ieee80211_rx_ADDBARsp( struct ieee80211_device* ieee, struct sk_buff *skb)
481 481
482 if (skb->len < sizeof( struct ieee80211_hdr_3addr) + 9) 482 if (skb->len < sizeof( struct ieee80211_hdr_3addr) + 9)
483 { 483 {
484 IEEE80211_DEBUG(IEEE80211_DL_ERR, " Invalid skb len in BARSP(%d / %d)\n", skb->len, (sizeof( struct ieee80211_hdr_3addr) + 9)); 484 IEEE80211_DEBUG(IEEE80211_DL_ERR, " Invalid skb len in BARSP(%d / %zu)\n", skb->len, (sizeof( struct ieee80211_hdr_3addr) + 9));
485 return -1; 485 return -1;
486 } 486 }
487 rsp = ( struct ieee80211_hdr_3addr*)skb->data; 487 rsp = ( struct ieee80211_hdr_3addr*)skb->data;
@@ -611,7 +611,7 @@ int ieee80211_rx_DELBA(struct ieee80211_device* ieee,struct sk_buff *skb)
611 611
612 if (skb->len < sizeof( struct ieee80211_hdr_3addr) + 6) 612 if (skb->len < sizeof( struct ieee80211_hdr_3addr) + 6)
613 { 613 {
614 IEEE80211_DEBUG(IEEE80211_DL_ERR, " Invalid skb len in DELBA(%d / %d)\n", skb->len, (sizeof( struct ieee80211_hdr_3addr) + 6)); 614 IEEE80211_DEBUG(IEEE80211_DL_ERR, " Invalid skb len in DELBA(%d / %zu)\n", skb->len, (sizeof( struct ieee80211_hdr_3addr) + 6));
615 return -1; 615 return -1;
616 } 616 }
617 617
diff --git a/drivers/staging/rtl8192e/r8192E_core.c b/drivers/staging/rtl8192e/r8192E_core.c
index ff8fe7e32a92..0ca5d8b4f746 100644
--- a/drivers/staging/rtl8192e/r8192E_core.c
+++ b/drivers/staging/rtl8192e/r8192E_core.c
@@ -5795,7 +5795,7 @@ static void rtl8192_rx(struct net_device *dev)
5795 stats.fragoffset = 0; 5795 stats.fragoffset = 0;
5796 stats.ntotalfrag = 1; 5796 stats.ntotalfrag = 1;
5797 5797
5798 if(!ieee80211_rx(priv->ieee80211, skb, &stats)){ 5798 if(!ieee80211_rtl_rx(priv->ieee80211, skb, &stats)){
5799 dev_kfree_skb_any(skb); 5799 dev_kfree_skb_any(skb);
5800 } else { 5800 } else {
5801 priv->stats.rxok++; 5801 priv->stats.rxok++;
@@ -5837,7 +5837,7 @@ static const struct net_device_ops rtl8192_netdev_ops = {
5837 .ndo_do_ioctl = rtl8192_ioctl, 5837 .ndo_do_ioctl = rtl8192_ioctl,
5838 .ndo_set_multicast_list = r8192_set_multicast, 5838 .ndo_set_multicast_list = r8192_set_multicast,
5839 .ndo_set_mac_address = r8192_set_mac_adr, 5839 .ndo_set_mac_address = r8192_set_mac_adr,
5840 .ndo_start_xmit = ieee80211_xmit, 5840 .ndo_start_xmit = ieee80211_rtl_xmit,
5841}; 5841};
5842 5842
5843/**************************************************************************** 5843/****************************************************************************
@@ -6121,14 +6121,14 @@ static void __devexit rtl8192_pci_disconnect(struct pci_dev *pdev)
6121 RT_TRACE(COMP_DOWN, "wlan driver removed\n"); 6121 RT_TRACE(COMP_DOWN, "wlan driver removed\n");
6122} 6122}
6123 6123
6124extern int ieee80211_init(void); 6124extern int ieee80211_rtl_init(void);
6125extern void ieee80211_exit(void); 6125extern void ieee80211_rtl_exit(void);
6126 6126
6127static int __init rtl8192_pci_module_init(void) 6127static int __init rtl8192_pci_module_init(void)
6128{ 6128{
6129 int retval; 6129 int retval;
6130 6130
6131 retval = ieee80211_init(); 6131 retval = ieee80211_rtl_init();
6132 if (retval) 6132 if (retval)
6133 return retval; 6133 return retval;
6134 6134
@@ -6153,7 +6153,7 @@ static void __exit rtl8192_pci_module_exit(void)
6153 6153
6154 RT_TRACE(COMP_DOWN, "Exiting"); 6154 RT_TRACE(COMP_DOWN, "Exiting");
6155 rtl8192_proc_module_remove(); 6155 rtl8192_proc_module_remove();
6156 ieee80211_exit(); 6156 ieee80211_rtl_exit();
6157} 6157}
6158 6158
6159//warning message WB 6159//warning message WB
@@ -6313,7 +6313,7 @@ void rtl8192_try_wake_queue(struct net_device *dev, int pri)
6313 spin_unlock_irqrestore(&priv->tx_lock,flags); 6313 spin_unlock_irqrestore(&priv->tx_lock,flags);
6314 6314
6315 if(enough_desc) 6315 if(enough_desc)
6316 ieee80211_wake_queue(priv->ieee80211); 6316 ieee80211_rtl_wake_queue(priv->ieee80211);
6317#endif 6317#endif
6318} 6318}
6319 6319
diff --git a/drivers/staging/rtl8192su/ieee80211/ieee80211.h b/drivers/staging/rtl8192su/ieee80211/ieee80211.h
index f22d024b1c39..9a4c858b0666 100644
--- a/drivers/staging/rtl8192su/ieee80211/ieee80211.h
+++ b/drivers/staging/rtl8192su/ieee80211/ieee80211.h
@@ -1721,13 +1721,13 @@ extern int ieee80211_encrypt_fragment(
1721 struct sk_buff *frag, 1721 struct sk_buff *frag,
1722 int hdr_len); 1722 int hdr_len);
1723 1723
1724extern int rtl8192_ieee80211_xmit(struct sk_buff *skb, 1724extern int rtl8192_ieee80211_rtl_xmit(struct sk_buff *skb,
1725 struct net_device *dev); 1725 struct net_device *dev);
1726extern void ieee80211_txb_free(struct ieee80211_txb *); 1726extern void ieee80211_txb_free(struct ieee80211_txb *);
1727 1727
1728 1728
1729/* ieee80211_rx.c */ 1729/* ieee80211_rx.c */
1730extern int ieee80211_rx(struct ieee80211_device *ieee, struct sk_buff *skb, 1730extern int ieee80211_rtl_rx(struct ieee80211_device *ieee, struct sk_buff *skb,
1731 struct ieee80211_rx_stats *rx_stats); 1731 struct ieee80211_rx_stats *rx_stats);
1732extern void ieee80211_rx_mgt(struct ieee80211_device *ieee, 1732extern void ieee80211_rx_mgt(struct ieee80211_device *ieee,
1733 struct ieee80211_hdr_4addr *header, 1733 struct ieee80211_hdr_4addr *header,
@@ -1783,8 +1783,8 @@ extern void ieee80211_stop_protocol(struct ieee80211_device *ieee);
1783extern void ieee80211_softmac_start_protocol(struct ieee80211_device *ieee); 1783extern void ieee80211_softmac_start_protocol(struct ieee80211_device *ieee);
1784extern void ieee80211_softmac_stop_protocol(struct ieee80211_device *ieee); 1784extern void ieee80211_softmac_stop_protocol(struct ieee80211_device *ieee);
1785extern void ieee80211_reset_queue(struct ieee80211_device *ieee); 1785extern void ieee80211_reset_queue(struct ieee80211_device *ieee);
1786extern void ieee80211_wake_queue(struct ieee80211_device *ieee); 1786extern void ieee80211_rtl_wake_queue(struct ieee80211_device *ieee);
1787extern void ieee80211_stop_queue(struct ieee80211_device *ieee); 1787extern void ieee80211_rtl_stop_queue(struct ieee80211_device *ieee);
1788extern struct sk_buff *ieee80211_get_beacon(struct ieee80211_device *ieee); 1788extern struct sk_buff *ieee80211_get_beacon(struct ieee80211_device *ieee);
1789extern void ieee80211_start_send_beacons(struct ieee80211_device *ieee); 1789extern void ieee80211_start_send_beacons(struct ieee80211_device *ieee);
1790extern void ieee80211_stop_send_beacons(struct ieee80211_device *ieee); 1790extern void ieee80211_stop_send_beacons(struct ieee80211_device *ieee);
diff --git a/drivers/staging/rtl8192su/ieee80211/ieee80211_rx.c b/drivers/staging/rtl8192su/ieee80211/ieee80211_rx.c
index ac223cef1d33..fecfa120ff48 100644
--- a/drivers/staging/rtl8192su/ieee80211/ieee80211_rx.c
+++ b/drivers/staging/rtl8192su/ieee80211/ieee80211_rx.c
@@ -208,7 +208,7 @@ static int ieee80211_frag_cache_invalidate(struct ieee80211_device *ieee,
208 * 208 *
209 * Responsible for handling management control frames 209 * Responsible for handling management control frames
210 * 210 *
211 * Called by ieee80211_rx */ 211 * Called by ieee80211_rtl_rx */
212static inline int 212static inline int
213ieee80211_rx_frame_mgmt(struct ieee80211_device *ieee, struct sk_buff *skb, 213ieee80211_rx_frame_mgmt(struct ieee80211_device *ieee, struct sk_buff *skb,
214 struct ieee80211_rx_stats *rx_stats, u16 type, 214 struct ieee80211_rx_stats *rx_stats, u16 type,
@@ -289,7 +289,7 @@ static int ieee80211_is_eapol_frame(struct ieee80211_device *ieee,
289 return 0; 289 return 0;
290} 290}
291 291
292/* Called only as a tasklet (software IRQ), by ieee80211_rx */ 292/* Called only as a tasklet (software IRQ), by ieee80211_rtl_rx */
293static inline int 293static inline int
294ieee80211_rx_frame_decrypt(struct ieee80211_device* ieee, struct sk_buff *skb, 294ieee80211_rx_frame_decrypt(struct ieee80211_device* ieee, struct sk_buff *skb,
295 struct ieee80211_crypt_data *crypt) 295 struct ieee80211_crypt_data *crypt)
@@ -858,7 +858,7 @@ u8 parse_subframe(struct sk_buff *skb,
858/* All received frames are sent to this function. @skb contains the frame in 858/* All received frames are sent to this function. @skb contains the frame in
859 * IEEE 802.11 format, i.e., in the format it was sent over air. 859 * IEEE 802.11 format, i.e., in the format it was sent over air.
860 * This function is called only as a tasklet (software IRQ). */ 860 * This function is called only as a tasklet (software IRQ). */
861int ieee80211_rx(struct ieee80211_device *ieee, struct sk_buff *skb, 861int ieee80211_rtl_rx(struct ieee80211_device *ieee, struct sk_buff *skb,
862 struct ieee80211_rx_stats *rx_stats) 862 struct ieee80211_rx_stats *rx_stats)
863{ 863{
864 struct net_device *dev = ieee->dev; 864 struct net_device *dev = ieee->dev;
diff --git a/drivers/staging/rtl8192su/ieee80211/ieee80211_softmac.c b/drivers/staging/rtl8192su/ieee80211/ieee80211_softmac.c
index 203c0a5cc8c1..95d4f84dcf3f 100644
--- a/drivers/staging/rtl8192su/ieee80211/ieee80211_softmac.c
+++ b/drivers/staging/rtl8192su/ieee80211/ieee80211_softmac.c
@@ -610,7 +610,7 @@ void ieee80211_stop_scan(struct ieee80211_device *ieee)
610} 610}
611 611
612/* called with ieee->lock held */ 612/* called with ieee->lock held */
613void ieee80211_start_scan(struct ieee80211_device *ieee) 613void ieee80211_rtl_start_scan(struct ieee80211_device *ieee)
614{ 614{
615 if(IS_DOT11D_ENABLE(ieee) ) 615 if(IS_DOT11D_ENABLE(ieee) )
616 { 616 {
@@ -1281,7 +1281,7 @@ void ieee80211_associate_step1(struct ieee80211_device *ieee)
1281 } 1281 }
1282} 1282}
1283 1283
1284void ieee80211_auth_challenge(struct ieee80211_device *ieee, u8 *challenge, int chlen) 1284void ieee80211_rtl_auth_challenge(struct ieee80211_device *ieee, u8 *challenge, int chlen)
1285{ 1285{
1286 u8 *c; 1286 u8 *c;
1287 struct sk_buff *skb; 1287 struct sk_buff *skb;
@@ -2054,7 +2054,7 @@ ieee80211_rx_frame_softmac(struct ieee80211_device *ieee, struct sk_buff *skb,
2054 2054
2055 ieee80211_associate_step2(ieee); 2055 ieee80211_associate_step2(ieee);
2056 }else{ 2056 }else{
2057 ieee80211_auth_challenge(ieee, challenge, chlen); 2057 ieee80211_rtl_auth_challenge(ieee, challenge, chlen);
2058 } 2058 }
2059 }else{ 2059 }else{
2060 ieee->softmac_stats.rx_auth_rs_err++; 2060 ieee->softmac_stats.rx_auth_rs_err++;
@@ -2162,7 +2162,7 @@ void ieee80211_softmac_xmit(struct ieee80211_txb *txb, struct ieee80211_device *
2162 * to check it any more. 2162 * to check it any more.
2163 * */ 2163 * */
2164 //printk("error:no descriptor left@queue_index %d, %d, %d\n", queue_index, skb_queue_len(&ieee->skb_waitQ[queue_index]), ieee->check_nic_enough_desc(ieee->dev,queue_index)); 2164 //printk("error:no descriptor left@queue_index %d, %d, %d\n", queue_index, skb_queue_len(&ieee->skb_waitQ[queue_index]), ieee->check_nic_enough_desc(ieee->dev,queue_index));
2165 //ieee80211_stop_queue(ieee); 2165 //ieee80211_rtl_stop_queue(ieee);
2166 skb_queue_tail(&ieee->skb_waitQ[queue_index], txb->fragments[i]); 2166 skb_queue_tail(&ieee->skb_waitQ[queue_index], txb->fragments[i]);
2167 }else{ 2167 }else{
2168 ieee->softmac_data_hard_start_xmit( 2168 ieee->softmac_data_hard_start_xmit(
@@ -2222,7 +2222,7 @@ void ieee80211_reset_queue(struct ieee80211_device *ieee)
2222 2222
2223} 2223}
2224 2224
2225void ieee80211_wake_queue(struct ieee80211_device *ieee) 2225void ieee80211_rtl_wake_queue(struct ieee80211_device *ieee)
2226{ 2226{
2227 2227
2228 unsigned long flags; 2228 unsigned long flags;
@@ -2263,7 +2263,7 @@ exit :
2263} 2263}
2264 2264
2265 2265
2266void ieee80211_stop_queue(struct ieee80211_device *ieee) 2266void ieee80211_rtl_stop_queue(struct ieee80211_device *ieee)
2267{ 2267{
2268 //unsigned long flags; 2268 //unsigned long flags;
2269 //spin_lock_irqsave(&ieee->lock,flags); 2269 //spin_lock_irqsave(&ieee->lock,flags);
@@ -2479,7 +2479,7 @@ void ieee80211_start_bss(struct ieee80211_device *ieee)
2479 2479
2480 if (ieee->state == IEEE80211_NOLINK){ 2480 if (ieee->state == IEEE80211_NOLINK){
2481 ieee->actscanning = true; 2481 ieee->actscanning = true;
2482 ieee80211_start_scan(ieee); 2482 ieee80211_rtl_start_scan(ieee);
2483 } 2483 }
2484 spin_unlock_irqrestore(&ieee->lock, flags); 2484 spin_unlock_irqrestore(&ieee->lock, flags);
2485} 2485}
@@ -2552,7 +2552,7 @@ void ieee80211_associate_retry_wq(struct work_struct *work)
2552 if(ieee->state == IEEE80211_NOLINK) 2552 if(ieee->state == IEEE80211_NOLINK)
2553 { 2553 {
2554 ieee->actscanning = true; 2554 ieee->actscanning = true;
2555 ieee80211_start_scan(ieee); 2555 ieee80211_rtl_start_scan(ieee);
2556 } 2556 }
2557 spin_unlock_irqrestore(&ieee->lock, flags); 2557 spin_unlock_irqrestore(&ieee->lock, flags);
2558 2558
diff --git a/drivers/staging/rtl8192su/ieee80211/ieee80211_tx.c b/drivers/staging/rtl8192su/ieee80211/ieee80211_tx.c
index 60621d6b2a6b..4d54e1e62d22 100644
--- a/drivers/staging/rtl8192su/ieee80211/ieee80211_tx.c
+++ b/drivers/staging/rtl8192su/ieee80211/ieee80211_tx.c
@@ -604,7 +604,7 @@ void ieee80211_query_seqnum(struct ieee80211_device*ieee, struct sk_buff* skb, u
604 } 604 }
605} 605}
606 606
607int rtl8192_ieee80211_xmit(struct sk_buff *skb, struct net_device *dev) 607int rtl8192_ieee80211_rtl_xmit(struct sk_buff *skb, struct net_device *dev)
608{ 608{
609 struct ieee80211_device *ieee = netdev_priv(dev); 609 struct ieee80211_device *ieee = netdev_priv(dev);
610 struct ieee80211_txb *txb = NULL; 610 struct ieee80211_txb *txb = NULL;
diff --git a/drivers/staging/rtl8192su/r8192U_core.c b/drivers/staging/rtl8192su/r8192U_core.c
index 66274d7666ff..ccb9d5b8cd44 100644
--- a/drivers/staging/rtl8192su/r8192U_core.c
+++ b/drivers/staging/rtl8192su/r8192U_core.c
@@ -126,6 +126,8 @@ static struct usb_device_id rtl8192_usb_id_tbl[] = {
126 {USB_DEVICE(0x2001, 0x3301)}, 126 {USB_DEVICE(0x2001, 0x3301)},
127 /* Zinwell */ 127 /* Zinwell */
128 {USB_DEVICE(0x5a57, 0x0290)}, 128 {USB_DEVICE(0x5a57, 0x0290)},
129 /* Guillemot */
130 {USB_DEVICE(0x06f8, 0xe031)},
129 //92SU 131 //92SU
130 {USB_DEVICE(0x0bda, 0x8172)}, 132 {USB_DEVICE(0x0bda, 0x8172)},
131 {} 133 {}
@@ -1501,7 +1503,7 @@ static void rtl8192_rx_isr(struct urb *urb)
1501 urb->context = skb; 1503 urb->context = skb;
1502 skb_queue_tail(&priv->rx_queue, skb); 1504 skb_queue_tail(&priv->rx_queue, skb);
1503 err = usb_submit_urb(urb, GFP_ATOMIC); 1505 err = usb_submit_urb(urb, GFP_ATOMIC);
1504 if(err && err != EPERM) 1506 if(err && err != -EPERM)
1505 printk("can not submit rxurb, err is %x,URB status is %x\n",err,urb->status); 1507 printk("can not submit rxurb, err is %x,URB status is %x\n",err,urb->status);
1506} 1508}
1507 1509
@@ -7155,7 +7157,7 @@ void rtl8192SU_rx_nomal(struct sk_buff* skb)
7155 unicast_packet = true; 7157 unicast_packet = true;
7156 } 7158 }
7157 7159
7158 if(!ieee80211_rx(priv->ieee80211,skb, &stats)) { 7160 if(!ieee80211_rtl_rx(priv->ieee80211,skb, &stats)) {
7159 dev_kfree_skb_any(skb); 7161 dev_kfree_skb_any(skb);
7160 } else { 7162 } else {
7161 // priv->stats.rxoktotal++; //YJ,test,090108 7163 // priv->stats.rxoktotal++; //YJ,test,090108
@@ -7426,7 +7428,7 @@ static const struct net_device_ops rtl8192_netdev_ops = {
7426 .ndo_set_mac_address = r8192_set_mac_adr, 7428 .ndo_set_mac_address = r8192_set_mac_adr,
7427 .ndo_validate_addr = eth_validate_addr, 7429 .ndo_validate_addr = eth_validate_addr,
7428 .ndo_change_mtu = eth_change_mtu, 7430 .ndo_change_mtu = eth_change_mtu,
7429 .ndo_start_xmit = rtl8192_ieee80211_xmit, 7431 .ndo_start_xmit = rtl8192_ieee80211_rtl_xmit,
7430}; 7432};
7431 7433
7432static int __devinit rtl8192_usb_probe(struct usb_interface *intf, 7434static int __devinit rtl8192_usb_probe(struct usb_interface *intf,
@@ -7619,7 +7621,7 @@ void rtl8192_try_wake_queue(struct net_device *dev, int pri)
7619 spin_unlock_irqrestore(&priv->tx_lock,flags); 7621 spin_unlock_irqrestore(&priv->tx_lock,flags);
7620 7622
7621 if(enough_desc) 7623 if(enough_desc)
7622 ieee80211_wake_queue(priv->ieee80211); 7624 ieee80211_rtl_wake_queue(priv->ieee80211);
7623} 7625}
7624 7626
7625void EnableHWSecurityConfig8192(struct net_device *dev) 7627void EnableHWSecurityConfig8192(struct net_device *dev)
diff --git a/drivers/staging/rtl8192u/ieee80211/ieee80211_wx.c b/drivers/staging/rtl8192u/ieee80211/ieee80211_wx.c
index d397f1d68eb7..5f12d62658c9 100644
--- a/drivers/staging/rtl8192u/ieee80211/ieee80211_wx.c
+++ b/drivers/staging/rtl8192u/ieee80211/ieee80211_wx.c
@@ -845,7 +845,7 @@ int ieee80211_wx_set_gen_ie(struct ieee80211_device *ieee, u8 *ie, size_t len)
845 { 845 {
846 if (len != ie[1]+2) 846 if (len != ie[1]+2)
847 { 847 {
848 printk("len:%d, ie:%d\n", len, ie[1]); 848 printk("len:%zu, ie:%d\n", len, ie[1]);
849 return -EINVAL; 849 return -EINVAL;
850 } 850 }
851 buf = kmalloc(len, GFP_KERNEL); 851 buf = kmalloc(len, GFP_KERNEL);
diff --git a/drivers/staging/rtl8192u/ieee80211/rtl819x_BAProc.c b/drivers/staging/rtl8192u/ieee80211/rtl819x_BAProc.c
index 26af43bb8390..512a57aebde3 100644
--- a/drivers/staging/rtl8192u/ieee80211/rtl819x_BAProc.c
+++ b/drivers/staging/rtl8192u/ieee80211/rtl819x_BAProc.c
@@ -340,7 +340,7 @@ int ieee80211_rx_ADDBAReq( struct ieee80211_device* ieee, struct sk_buff *skb)
340 340
341 if (skb->len < sizeof( struct ieee80211_hdr_3addr) + 9) 341 if (skb->len < sizeof( struct ieee80211_hdr_3addr) + 9)
342 { 342 {
343 IEEE80211_DEBUG(IEEE80211_DL_ERR, " Invalid skb len in BAREQ(%d / %d)\n", skb->len, (sizeof( struct ieee80211_hdr_3addr) + 9)); 343 IEEE80211_DEBUG(IEEE80211_DL_ERR, " Invalid skb len in BAREQ(%d / %zu)\n", skb->len, (sizeof( struct ieee80211_hdr_3addr) + 9));
344 return -1; 344 return -1;
345 } 345 }
346 346
@@ -439,7 +439,7 @@ int ieee80211_rx_ADDBARsp( struct ieee80211_device* ieee, struct sk_buff *skb)
439 439
440 if (skb->len < sizeof( struct ieee80211_hdr_3addr) + 9) 440 if (skb->len < sizeof( struct ieee80211_hdr_3addr) + 9)
441 { 441 {
442 IEEE80211_DEBUG(IEEE80211_DL_ERR, " Invalid skb len in BARSP(%d / %d)\n", skb->len, (sizeof( struct ieee80211_hdr_3addr) + 9)); 442 IEEE80211_DEBUG(IEEE80211_DL_ERR, " Invalid skb len in BARSP(%d / %zu)\n", skb->len, (sizeof( struct ieee80211_hdr_3addr) + 9));
443 return -1; 443 return -1;
444 } 444 }
445 rsp = ( struct ieee80211_hdr_3addr*)skb->data; 445 rsp = ( struct ieee80211_hdr_3addr*)skb->data;
@@ -569,7 +569,7 @@ int ieee80211_rx_DELBA(struct ieee80211_device* ieee,struct sk_buff *skb)
569 569
570 if (skb->len < sizeof( struct ieee80211_hdr_3addr) + 6) 570 if (skb->len < sizeof( struct ieee80211_hdr_3addr) + 6)
571 { 571 {
572 IEEE80211_DEBUG(IEEE80211_DL_ERR, " Invalid skb len in DELBA(%d / %d)\n", skb->len, (sizeof( struct ieee80211_hdr_3addr) + 6)); 572 IEEE80211_DEBUG(IEEE80211_DL_ERR, " Invalid skb len in DELBA(%d / %zu)\n", skb->len, (sizeof( struct ieee80211_hdr_3addr) + 6));
573 return -1; 573 return -1;
574 } 574 }
575 575
diff --git a/drivers/staging/sm7xx/Kconfig b/drivers/staging/sm7xx/Kconfig
new file mode 100644
index 000000000000..204dbfc3c38b
--- /dev/null
+++ b/drivers/staging/sm7xx/Kconfig
@@ -0,0 +1,15 @@
1config FB_SM7XX
2 tristate "Silicon Motion SM7XX Frame Buffer Support"
3 depends on FB
4 select FB_CFB_FILLRECT
5 select FB_CFB_COPYAREA
6 select FB_CFB_IMAGEBLIT
7 help
8 Frame Buffer driver for the Silicon Motion SM7XX serial graphic card.
9
10config FB_SM7XX_ACCEL
11 bool "Siliconmotion Acceleration functions (EXPERIMENTAL)"
12 depends on FB_SM7XX && EXPERIMENTAL
13 help
14 This will compile the Trident frame buffer device with
15 acceleration functions.
diff --git a/drivers/staging/sm7xx/Makefile b/drivers/staging/sm7xx/Makefile
new file mode 100644
index 000000000000..f43cb9106305
--- /dev/null
+++ b/drivers/staging/sm7xx/Makefile
@@ -0,0 +1,3 @@
1obj-$(CONFIG_FB_SM7XX) += sm7xx.o
2
3sm7xx-y := smtcfb.o
diff --git a/drivers/staging/sm7xx/TODO b/drivers/staging/sm7xx/TODO
new file mode 100644
index 000000000000..1f61f5e11cf5
--- /dev/null
+++ b/drivers/staging/sm7xx/TODO
@@ -0,0 +1,10 @@
1TODO:
2- Dual head support
3- use kernel coding style
4- checkpatch.pl clean
5- refine the code and remove unused code
6- use kernel framebuffer mode setting instead of hard code
7- move it to drivers/video/sm7xx/ or make it be drivers/video/sm7xxfb.c
8
9Please send any patches to Greg Kroah-Hartman <greg@kroah.com> and
10Teddy Wang <teddy.wang@siliconmotion.com.cn>.
diff --git a/drivers/staging/sm7xx/smtc2d.c b/drivers/staging/sm7xx/smtc2d.c
new file mode 100644
index 000000000000..133b86c6a678
--- /dev/null
+++ b/drivers/staging/sm7xx/smtc2d.c
@@ -0,0 +1,979 @@
1/*
2 * Silicon Motion SM7XX 2D drawing engine functions.
3 *
4 * Copyright (C) 2006 Silicon Motion Technology Corp.
5 * Author: Boyod boyod.yang@siliconmotion.com.cn
6 *
7 * Copyright (C) 2009 Lemote, Inc.
8 * Author: Wu Zhangjin, wuzj@lemote.com
9 *
10 * This file is subject to the terms and conditions of the GNU General Public
11 * License. See the file COPYING in the main directory of this archive for
12 * more details.
13 *
14 * Version 0.10.26192.21.01
15 * - Add PowerPC support
16 * - Add 2D support for Lynx -
17 * Verified on 2.6.19.2
18 * Boyod.yang <boyod.yang@siliconmotion.com.cn>
19 */
20
21unsigned char smtc_de_busy;
22
23void SMTC_write2Dreg(unsigned long nOffset, unsigned long nData)
24{
25 writel(nData, smtc_2DBaseAddress + nOffset);
26}
27
28unsigned long SMTC_read2Dreg(unsigned long nOffset)
29{
30 return readl(smtc_2DBaseAddress + nOffset);
31}
32
33void SMTC_write2Ddataport(unsigned long nOffset, unsigned long nData)
34{
35 writel(nData, smtc_2Ddataport + nOffset);
36}
37
38/**********************************************************************
39 *
40 * deInit
41 *
42 * Purpose
43 * Drawing engine initialization.
44 *
45 **********************************************************************/
46
47void deInit(unsigned int nModeWidth, unsigned int nModeHeight,
48 unsigned int bpp)
49{
50 /* Get current power configuration. */
51 unsigned char clock;
52 clock = smtc_seqr(0x21);
53
54 /* initialize global 'mutex lock' variable */
55 smtc_de_busy = 0;
56
57 /* Enable 2D Drawing Engine */
58 smtc_seqw(0x21, clock & 0xF8);
59
60 SMTC_write2Dreg(DE_CLIP_TL,
61 FIELD_VALUE(0, DE_CLIP_TL, TOP, 0) |
62 FIELD_SET(0, DE_CLIP_TL, STATUS, DISABLE) |
63 FIELD_SET(0, DE_CLIP_TL, INHIBIT, OUTSIDE) |
64 FIELD_VALUE(0, DE_CLIP_TL, LEFT, 0));
65
66 if (bpp >= 24) {
67 SMTC_write2Dreg(DE_PITCH,
68 FIELD_VALUE(0, DE_PITCH, DESTINATION,
69 nModeWidth * 3) | FIELD_VALUE(0,
70 DE_PITCH,
71 SOURCE,
72 nModeWidth
73 * 3));
74 } else {
75 SMTC_write2Dreg(DE_PITCH,
76 FIELD_VALUE(0, DE_PITCH, DESTINATION,
77 nModeWidth) | FIELD_VALUE(0,
78 DE_PITCH,
79 SOURCE,
80 nModeWidth));
81 }
82
83 SMTC_write2Dreg(DE_WINDOW_WIDTH,
84 FIELD_VALUE(0, DE_WINDOW_WIDTH, DESTINATION,
85 nModeWidth) | FIELD_VALUE(0,
86 DE_WINDOW_WIDTH,
87 SOURCE,
88 nModeWidth));
89
90 switch (bpp) {
91 case 8:
92 SMTC_write2Dreg(DE_STRETCH_FORMAT,
93 FIELD_SET(0, DE_STRETCH_FORMAT, PATTERN_XY,
94 NORMAL) | FIELD_VALUE(0,
95 DE_STRETCH_FORMAT,
96 PATTERN_Y,
97 0) |
98 FIELD_VALUE(0, DE_STRETCH_FORMAT, PATTERN_X,
99 0) | FIELD_SET(0, DE_STRETCH_FORMAT,
100 PIXEL_FORMAT,
101 8) | FIELD_SET(0,
102 DE_STRETCH_FORMAT,
103 ADDRESSING,
104 XY) |
105 FIELD_VALUE(0, DE_STRETCH_FORMAT,
106 SOURCE_HEIGHT, 3));
107 break;
108 case 24:
109 SMTC_write2Dreg(DE_STRETCH_FORMAT,
110 FIELD_SET(0, DE_STRETCH_FORMAT, PATTERN_XY,
111 NORMAL) | FIELD_VALUE(0,
112 DE_STRETCH_FORMAT,
113 PATTERN_Y,
114 0) |
115 FIELD_VALUE(0, DE_STRETCH_FORMAT, PATTERN_X,
116 0) | FIELD_SET(0, DE_STRETCH_FORMAT,
117 PIXEL_FORMAT,
118 24) | FIELD_SET(0,
119 DE_STRETCH_FORMAT,
120 ADDRESSING,
121 XY) |
122 FIELD_VALUE(0, DE_STRETCH_FORMAT,
123 SOURCE_HEIGHT, 3));
124 break;
125 case 16:
126 default:
127 SMTC_write2Dreg(DE_STRETCH_FORMAT,
128 FIELD_SET(0, DE_STRETCH_FORMAT, PATTERN_XY,
129 NORMAL) | FIELD_VALUE(0,
130 DE_STRETCH_FORMAT,
131 PATTERN_Y,
132 0) |
133 FIELD_VALUE(0, DE_STRETCH_FORMAT, PATTERN_X,
134 0) | FIELD_SET(0, DE_STRETCH_FORMAT,
135 PIXEL_FORMAT,
136 16) | FIELD_SET(0,
137 DE_STRETCH_FORMAT,
138 ADDRESSING,
139 XY) |
140 FIELD_VALUE(0, DE_STRETCH_FORMAT,
141 SOURCE_HEIGHT, 3));
142 break;
143 }
144
145 SMTC_write2Dreg(DE_MASKS,
146 FIELD_VALUE(0, DE_MASKS, BYTE_MASK, 0xFFFF) |
147 FIELD_VALUE(0, DE_MASKS, BIT_MASK, 0xFFFF));
148 SMTC_write2Dreg(DE_COLOR_COMPARE_MASK,
149 FIELD_VALUE(0, DE_COLOR_COMPARE_MASK, MASKS, \
150 0xFFFFFF));
151 SMTC_write2Dreg(DE_COLOR_COMPARE,
152 FIELD_VALUE(0, DE_COLOR_COMPARE, COLOR, 0xFFFFFF));
153}
154
155void deVerticalLine(unsigned long dst_base,
156 unsigned long dst_pitch,
157 unsigned long nX,
158 unsigned long nY,
159 unsigned long dst_height, unsigned long nColor)
160{
161 deWaitForNotBusy();
162
163 SMTC_write2Dreg(DE_WINDOW_DESTINATION_BASE,
164 FIELD_VALUE(0, DE_WINDOW_DESTINATION_BASE, ADDRESS,
165 dst_base));
166
167 SMTC_write2Dreg(DE_PITCH,
168 FIELD_VALUE(0, DE_PITCH, DESTINATION, dst_pitch) |
169 FIELD_VALUE(0, DE_PITCH, SOURCE, dst_pitch));
170
171 SMTC_write2Dreg(DE_WINDOW_WIDTH,
172 FIELD_VALUE(0, DE_WINDOW_WIDTH, DESTINATION,
173 dst_pitch) | FIELD_VALUE(0, DE_WINDOW_WIDTH,
174 SOURCE,
175 dst_pitch));
176
177 SMTC_write2Dreg(DE_FOREGROUND,
178 FIELD_VALUE(0, DE_FOREGROUND, COLOR, nColor));
179
180 SMTC_write2Dreg(DE_DESTINATION,
181 FIELD_SET(0, DE_DESTINATION, WRAP, DISABLE) |
182 FIELD_VALUE(0, DE_DESTINATION, X, nX) |
183 FIELD_VALUE(0, DE_DESTINATION, Y, nY));
184
185 SMTC_write2Dreg(DE_DIMENSION,
186 FIELD_VALUE(0, DE_DIMENSION, X, 1) |
187 FIELD_VALUE(0, DE_DIMENSION, Y_ET, dst_height));
188
189 SMTC_write2Dreg(DE_CONTROL,
190 FIELD_SET(0, DE_CONTROL, STATUS, START) |
191 FIELD_SET(0, DE_CONTROL, DIRECTION, LEFT_TO_RIGHT) |
192 FIELD_SET(0, DE_CONTROL, MAJOR, Y) |
193 FIELD_SET(0, DE_CONTROL, STEP_X, NEGATIVE) |
194 FIELD_SET(0, DE_CONTROL, STEP_Y, POSITIVE) |
195 FIELD_SET(0, DE_CONTROL, LAST_PIXEL, OFF) |
196 FIELD_SET(0, DE_CONTROL, COMMAND, SHORT_STROKE) |
197 FIELD_SET(0, DE_CONTROL, ROP_SELECT, ROP2) |
198 FIELD_VALUE(0, DE_CONTROL, ROP, 0x0C));
199
200 smtc_de_busy = 1;
201}
202
203void deHorizontalLine(unsigned long dst_base,
204 unsigned long dst_pitch,
205 unsigned long nX,
206 unsigned long nY,
207 unsigned long dst_width, unsigned long nColor)
208{
209 deWaitForNotBusy();
210
211 SMTC_write2Dreg(DE_WINDOW_DESTINATION_BASE,
212 FIELD_VALUE(0, DE_WINDOW_DESTINATION_BASE, ADDRESS,
213 dst_base));
214
215 SMTC_write2Dreg(DE_PITCH,
216 FIELD_VALUE(0, DE_PITCH, DESTINATION, dst_pitch) |
217 FIELD_VALUE(0, DE_PITCH, SOURCE, dst_pitch));
218
219 SMTC_write2Dreg(DE_WINDOW_WIDTH,
220 FIELD_VALUE(0, DE_WINDOW_WIDTH, DESTINATION,
221 dst_pitch) | FIELD_VALUE(0, DE_WINDOW_WIDTH,
222 SOURCE,
223 dst_pitch));
224 SMTC_write2Dreg(DE_FOREGROUND,
225 FIELD_VALUE(0, DE_FOREGROUND, COLOR, nColor));
226 SMTC_write2Dreg(DE_DESTINATION,
227 FIELD_SET(0, DE_DESTINATION, WRAP,
228 DISABLE) | FIELD_VALUE(0, DE_DESTINATION, X,
229 nX) | FIELD_VALUE(0,
230 DE_DESTINATION,
231 Y,
232 nY));
233 SMTC_write2Dreg(DE_DIMENSION,
234 FIELD_VALUE(0, DE_DIMENSION, X,
235 dst_width) | FIELD_VALUE(0, DE_DIMENSION,
236 Y_ET, 1));
237 SMTC_write2Dreg(DE_CONTROL,
238 FIELD_SET(0, DE_CONTROL, STATUS, START) | FIELD_SET(0,
239 DE_CONTROL,
240 DIRECTION,
241 RIGHT_TO_LEFT)
242 | FIELD_SET(0, DE_CONTROL, MAJOR, X) | FIELD_SET(0,
243 DE_CONTROL,
244 STEP_X,
245 POSITIVE)
246 | FIELD_SET(0, DE_CONTROL, STEP_Y,
247 NEGATIVE) | FIELD_SET(0, DE_CONTROL,
248 LAST_PIXEL,
249 OFF) | FIELD_SET(0,
250 DE_CONTROL,
251 COMMAND,
252 SHORT_STROKE)
253 | FIELD_SET(0, DE_CONTROL, ROP_SELECT,
254 ROP2) | FIELD_VALUE(0, DE_CONTROL, ROP,
255 0x0C));
256
257 smtc_de_busy = 1;
258}
259
260void deLine(unsigned long dst_base,
261 unsigned long dst_pitch,
262 unsigned long nX1,
263 unsigned long nY1,
264 unsigned long nX2, unsigned long nY2, unsigned long nColor)
265{
266 unsigned long nCommand =
267 FIELD_SET(0, DE_CONTROL, STATUS, START) |
268 FIELD_SET(0, DE_CONTROL, DIRECTION, LEFT_TO_RIGHT) |
269 FIELD_SET(0, DE_CONTROL, MAJOR, X) |
270 FIELD_SET(0, DE_CONTROL, STEP_X, POSITIVE) |
271 FIELD_SET(0, DE_CONTROL, STEP_Y, POSITIVE) |
272 FIELD_SET(0, DE_CONTROL, LAST_PIXEL, OFF) |
273 FIELD_SET(0, DE_CONTROL, ROP_SELECT, ROP2) |
274 FIELD_VALUE(0, DE_CONTROL, ROP, 0x0C);
275 unsigned long DeltaX;
276 unsigned long DeltaY;
277
278 /* Calculate delta X */
279 if (nX1 <= nX2)
280 DeltaX = nX2 - nX1;
281 else {
282 DeltaX = nX1 - nX2;
283 nCommand = FIELD_SET(nCommand, DE_CONTROL, STEP_X, NEGATIVE);
284 }
285
286 /* Calculate delta Y */
287 if (nY1 <= nY2)
288 DeltaY = nY2 - nY1;
289 else {
290 DeltaY = nY1 - nY2;
291 nCommand = FIELD_SET(nCommand, DE_CONTROL, STEP_Y, NEGATIVE);
292 }
293
294 /* Determine the major axis */
295 if (DeltaX < DeltaY)
296 nCommand = FIELD_SET(nCommand, DE_CONTROL, MAJOR, Y);
297
298 /* Vertical line? */
299 if (nX1 == nX2)
300 deVerticalLine(dst_base, dst_pitch, nX1, nY1, DeltaY, nColor);
301
302 /* Horizontal line? */
303 else if (nY1 == nY2)
304 deHorizontalLine(dst_base, dst_pitch, nX1, nY1, \
305 DeltaX, nColor);
306
307 /* Diagonal line? */
308 else if (DeltaX == DeltaY) {
309 deWaitForNotBusy();
310
311 SMTC_write2Dreg(DE_WINDOW_DESTINATION_BASE,
312 FIELD_VALUE(0, DE_WINDOW_DESTINATION_BASE,
313 ADDRESS, dst_base));
314
315 SMTC_write2Dreg(DE_PITCH,
316 FIELD_VALUE(0, DE_PITCH, DESTINATION,
317 dst_pitch) | FIELD_VALUE(0,
318 DE_PITCH,
319 SOURCE,
320 dst_pitch));
321
322 SMTC_write2Dreg(DE_WINDOW_WIDTH,
323 FIELD_VALUE(0, DE_WINDOW_WIDTH, DESTINATION,
324 dst_pitch) | FIELD_VALUE(0,
325 DE_WINDOW_WIDTH,
326 SOURCE,
327 dst_pitch));
328
329 SMTC_write2Dreg(DE_FOREGROUND,
330 FIELD_VALUE(0, DE_FOREGROUND, COLOR, nColor));
331
332 SMTC_write2Dreg(DE_DESTINATION,
333 FIELD_SET(0, DE_DESTINATION, WRAP, DISABLE) |
334 FIELD_VALUE(0, DE_DESTINATION, X, 1) |
335 FIELD_VALUE(0, DE_DESTINATION, Y, nY1));
336
337 SMTC_write2Dreg(DE_DIMENSION,
338 FIELD_VALUE(0, DE_DIMENSION, X, 1) |
339 FIELD_VALUE(0, DE_DIMENSION, Y_ET, DeltaX));
340
341 SMTC_write2Dreg(DE_CONTROL,
342 FIELD_SET(nCommand, DE_CONTROL, COMMAND,
343 SHORT_STROKE));
344 }
345
346 /* Generic line */
347 else {
348 unsigned int k1, k2, et, w;
349 if (DeltaX < DeltaY) {
350 k1 = 2 * DeltaX;
351 et = k1 - DeltaY;
352 k2 = et - DeltaY;
353 w = DeltaY + 1;
354 } else {
355 k1 = 2 * DeltaY;
356 et = k1 - DeltaX;
357 k2 = et - DeltaX;
358 w = DeltaX + 1;
359 }
360
361 deWaitForNotBusy();
362
363 SMTC_write2Dreg(DE_WINDOW_DESTINATION_BASE,
364 FIELD_VALUE(0, DE_WINDOW_DESTINATION_BASE,
365 ADDRESS, dst_base));
366
367 SMTC_write2Dreg(DE_PITCH,
368 FIELD_VALUE(0, DE_PITCH, DESTINATION,
369 dst_pitch) | FIELD_VALUE(0,
370 DE_PITCH,
371 SOURCE,
372 dst_pitch));
373
374 SMTC_write2Dreg(DE_WINDOW_WIDTH,
375 FIELD_VALUE(0, DE_WINDOW_WIDTH, DESTINATION,
376 dst_pitch) | FIELD_VALUE(0,
377 DE_WINDOW_WIDTH,
378 SOURCE,
379 dst_pitch));
380
381 SMTC_write2Dreg(DE_FOREGROUND,
382 FIELD_VALUE(0, DE_FOREGROUND, COLOR, nColor));
383
384 SMTC_write2Dreg(DE_SOURCE,
385 FIELD_SET(0, DE_SOURCE, WRAP, DISABLE) |
386 FIELD_VALUE(0, DE_SOURCE, X_K1, k1) |
387 FIELD_VALUE(0, DE_SOURCE, Y_K2, k2));
388
389 SMTC_write2Dreg(DE_DESTINATION,
390 FIELD_SET(0, DE_DESTINATION, WRAP, DISABLE) |
391 FIELD_VALUE(0, DE_DESTINATION, X, nX1) |
392 FIELD_VALUE(0, DE_DESTINATION, Y, nY1));
393
394 SMTC_write2Dreg(DE_DIMENSION,
395 FIELD_VALUE(0, DE_DIMENSION, X, w) |
396 FIELD_VALUE(0, DE_DIMENSION, Y_ET, et));
397
398 SMTC_write2Dreg(DE_CONTROL,
399 FIELD_SET(nCommand, DE_CONTROL, COMMAND,
400 LINE_DRAW));
401 }
402
403 smtc_de_busy = 1;
404}
405
406void deFillRect(unsigned long dst_base,
407 unsigned long dst_pitch,
408 unsigned long dst_X,
409 unsigned long dst_Y,
410 unsigned long dst_width,
411 unsigned long dst_height, unsigned long nColor)
412{
413 deWaitForNotBusy();
414
415 SMTC_write2Dreg(DE_WINDOW_DESTINATION_BASE,
416 FIELD_VALUE(0, DE_WINDOW_DESTINATION_BASE, ADDRESS,
417 dst_base));
418
419 if (dst_pitch) {
420 SMTC_write2Dreg(DE_PITCH,
421 FIELD_VALUE(0, DE_PITCH, DESTINATION,
422 dst_pitch) | FIELD_VALUE(0,
423 DE_PITCH,
424 SOURCE,
425 dst_pitch));
426
427 SMTC_write2Dreg(DE_WINDOW_WIDTH,
428 FIELD_VALUE(0, DE_WINDOW_WIDTH, DESTINATION,
429 dst_pitch) | FIELD_VALUE(0,
430 DE_WINDOW_WIDTH,
431 SOURCE,
432 dst_pitch));
433 }
434
435 SMTC_write2Dreg(DE_FOREGROUND,
436 FIELD_VALUE(0, DE_FOREGROUND, COLOR, nColor));
437
438 SMTC_write2Dreg(DE_DESTINATION,
439 FIELD_SET(0, DE_DESTINATION, WRAP, DISABLE) |
440 FIELD_VALUE(0, DE_DESTINATION, X, dst_X) |
441 FIELD_VALUE(0, DE_DESTINATION, Y, dst_Y));
442
443 SMTC_write2Dreg(DE_DIMENSION,
444 FIELD_VALUE(0, DE_DIMENSION, X, dst_width) |
445 FIELD_VALUE(0, DE_DIMENSION, Y_ET, dst_height));
446
447 SMTC_write2Dreg(DE_CONTROL,
448 FIELD_SET(0, DE_CONTROL, STATUS, START) |
449 FIELD_SET(0, DE_CONTROL, DIRECTION, LEFT_TO_RIGHT) |
450 FIELD_SET(0, DE_CONTROL, LAST_PIXEL, OFF) |
451 FIELD_SET(0, DE_CONTROL, COMMAND, RECTANGLE_FILL) |
452 FIELD_SET(0, DE_CONTROL, ROP_SELECT, ROP2) |
453 FIELD_VALUE(0, DE_CONTROL, ROP, 0x0C));
454
455 smtc_de_busy = 1;
456}
457
458/**********************************************************************
459 *
460 * deRotatePattern
461 *
462 * Purpose
463 * Rotate the given pattern if necessary
464 *
465 * Parameters
466 * [in]
467 * pPattern - Pointer to DE_SURFACE structure containing
468 * pattern attributes
469 * patternX - X position (0-7) of pattern origin
470 * patternY - Y position (0-7) of pattern origin
471 *
472 * [out]
473 * pattern_dstaddr - Pointer to pre-allocated buffer containing
474 * rotated pattern
475 *
476 **********************************************************************/
477void deRotatePattern(unsigned char *pattern_dstaddr,
478 unsigned long pattern_src_addr,
479 unsigned long pattern_BPP,
480 unsigned long pattern_stride, int patternX, int patternY)
481{
482 unsigned int i;
483 unsigned long pattern[PATTERN_WIDTH * PATTERN_HEIGHT];
484 unsigned int x, y;
485 unsigned char *pjPatByte;
486
487 if (pattern_dstaddr != NULL) {
488 deWaitForNotBusy();
489
490 if (patternX || patternY) {
491 /* Rotate pattern */
492 pjPatByte = (unsigned char *)pattern;
493
494 switch (pattern_BPP) {
495 case 8:
496 {
497 for (y = 0; y < 8; y++) {
498 unsigned char *pjBuffer =
499 pattern_dstaddr +
500 ((patternY + y) & 7) * 8;
501 for (x = 0; x < 8; x++) {
502 pjBuffer[(patternX +
503 x) & 7] =
504 pjPatByte[x];
505 }
506 pjPatByte += pattern_stride;
507 }
508 break;
509 }
510
511 case 16:
512 {
513 for (y = 0; y < 8; y++) {
514 unsigned short *pjBuffer =
515 (unsigned short *)
516 pattern_dstaddr +
517 ((patternY + y) & 7) * 8;
518 for (x = 0; x < 8; x++) {
519 pjBuffer[(patternX +
520 x) & 7] =
521 ((unsigned short *)
522 pjPatByte)[x];
523 }
524 pjPatByte += pattern_stride;
525 }
526 break;
527 }
528
529 case 32:
530 {
531 for (y = 0; y < 8; y++) {
532 unsigned long *pjBuffer =
533 (unsigned long *)
534 pattern_dstaddr +
535 ((patternY + y) & 7) * 8;
536 for (x = 0; x < 8; x++) {
537 pjBuffer[(patternX +
538 x) & 7] =
539 ((unsigned long *)
540 pjPatByte)[x];
541 }
542 pjPatByte += pattern_stride;
543 }
544 break;
545 }
546 }
547 } else {
548 /*Don't rotate,just copy pattern into pattern_dstaddr*/
549 for (i = 0; i < (pattern_BPP * 2); i++) {
550 ((unsigned long *)pattern_dstaddr)[i] =
551 pattern[i];
552 }
553 }
554
555 }
556}
557
558/**********************************************************************
559 *
560 * deCopy
561 *
562 * Purpose
563 * Copy a rectangular area of the source surface to a destination surface
564 *
565 * Remarks
566 * Source bitmap must have the same color depth (BPP) as the destination
567 * bitmap.
568 *
569**********************************************************************/
570void deCopy(unsigned long dst_base,
571 unsigned long dst_pitch,
572 unsigned long dst_BPP,
573 unsigned long dst_X,
574 unsigned long dst_Y,
575 unsigned long dst_width,
576 unsigned long dst_height,
577 unsigned long src_base,
578 unsigned long src_pitch,
579 unsigned long src_X,
580 unsigned long src_Y, pTransparent pTransp, unsigned char nROP2)
581{
582 unsigned long nDirection = 0;
583 unsigned long nTransparent = 0;
584 /* Direction of ROP2 operation:
585 * 1 = Left to Right,
586 * (-1) = Right to Left
587 */
588 unsigned long opSign = 1;
589 /* xWidth is in pixels */
590 unsigned long xWidth = 192 / (dst_BPP / 8);
591 unsigned long de_ctrl = 0;
592
593 deWaitForNotBusy();
594
595 SMTC_write2Dreg(DE_WINDOW_DESTINATION_BASE,
596 FIELD_VALUE(0, DE_WINDOW_DESTINATION_BASE, ADDRESS,
597 dst_base));
598
599 SMTC_write2Dreg(DE_WINDOW_SOURCE_BASE,
600 FIELD_VALUE(0, DE_WINDOW_SOURCE_BASE, ADDRESS,
601 src_base));
602
603 if (dst_pitch && src_pitch) {
604 SMTC_write2Dreg(DE_PITCH,
605 FIELD_VALUE(0, DE_PITCH, DESTINATION,
606 dst_pitch) | FIELD_VALUE(0,
607 DE_PITCH,
608 SOURCE,
609 src_pitch));
610
611 SMTC_write2Dreg(DE_WINDOW_WIDTH,
612 FIELD_VALUE(0, DE_WINDOW_WIDTH, DESTINATION,
613 dst_pitch) | FIELD_VALUE(0,
614 DE_WINDOW_WIDTH,
615 SOURCE,
616 src_pitch));
617 }
618
619 /* Set transparent bits if necessary */
620 if (pTransp != NULL) {
621 nTransparent =
622 pTransp->match | pTransp->select | pTransp->control;
623
624 /* Set color compare register */
625 SMTC_write2Dreg(DE_COLOR_COMPARE,
626 FIELD_VALUE(0, DE_COLOR_COMPARE, COLOR,
627 pTransp->color));
628 }
629
630 /* Determine direction of operation */
631 if (src_Y < dst_Y) {
632 /* +----------+
633 |S |
634 | +----------+
635 | | | |
636 | | | |
637 +---|------+ |
638 | D |
639 +----------+ */
640
641 nDirection = BOTTOM_TO_TOP;
642 } else if (src_Y > dst_Y) {
643 /* +----------+
644 |D |
645 | +----------+
646 | | | |
647 | | | |
648 +---|------+ |
649 | S |
650 +----------+ */
651
652 nDirection = TOP_TO_BOTTOM;
653 } else {
654 /* src_Y == dst_Y */
655
656 if (src_X <= dst_X) {
657 /* +------+---+------+
658 |S | | D|
659 | | | |
660 | | | |
661 | | | |
662 +------+---+------+ */
663
664 nDirection = RIGHT_TO_LEFT;
665 } else {
666 /* src_X > dst_X */
667
668 /* +------+---+------+
669 |D | | S|
670 | | | |
671 | | | |
672 | | | |
673 +------+---+------+ */
674
675 nDirection = LEFT_TO_RIGHT;
676 }
677 }
678
679 if ((nDirection == BOTTOM_TO_TOP) || (nDirection == RIGHT_TO_LEFT)) {
680 src_X += dst_width - 1;
681 src_Y += dst_height - 1;
682 dst_X += dst_width - 1;
683 dst_Y += dst_height - 1;
684 opSign = (-1);
685 }
686
687 if (dst_BPP >= 24) {
688 src_X *= 3;
689 src_Y *= 3;
690 dst_X *= 3;
691 dst_Y *= 3;
692 dst_width *= 3;
693 if ((nDirection == BOTTOM_TO_TOP)
694 || (nDirection == RIGHT_TO_LEFT)) {
695 src_X += 2;
696 dst_X += 2;
697 }
698 }
699
700 /* Workaround for 192 byte hw bug */
701 if ((nROP2 != 0x0C) && ((dst_width * (dst_BPP / 8)) >= 192)) {
702 /*
703 * Perform the ROP2 operation in chunks of (xWidth *
704 * dst_height)
705 */
706 while (1) {
707 deWaitForNotBusy();
708
709 SMTC_write2Dreg(DE_SOURCE,
710 FIELD_SET(0, DE_SOURCE, WRAP, DISABLE) |
711 FIELD_VALUE(0, DE_SOURCE, X_K1, src_X) |
712 FIELD_VALUE(0, DE_SOURCE, Y_K2, src_Y));
713
714 SMTC_write2Dreg(DE_DESTINATION,
715 FIELD_SET(0, DE_DESTINATION, WRAP,
716 DISABLE) | FIELD_VALUE(0,
717 DE_DESTINATION,
718 X,
719 dst_X)
720 | FIELD_VALUE(0, DE_DESTINATION, Y,
721 dst_Y));
722
723 SMTC_write2Dreg(DE_DIMENSION,
724 FIELD_VALUE(0, DE_DIMENSION, X,
725 xWidth) | FIELD_VALUE(0,
726 DE_DIMENSION,
727 Y_ET,
728 dst_height));
729
730 de_ctrl =
731 FIELD_VALUE(0, DE_CONTROL, ROP,
732 nROP2) | nTransparent | FIELD_SET(0,
733 DE_CONTROL,
734 ROP_SELECT,
735 ROP2)
736 | FIELD_SET(0, DE_CONTROL, COMMAND,
737 BITBLT) | ((nDirection ==
738 1) ? FIELD_SET(0,
739 DE_CONTROL,
740 DIRECTION,
741 RIGHT_TO_LEFT)
742 : FIELD_SET(0, DE_CONTROL,
743 DIRECTION,
744 LEFT_TO_RIGHT)) |
745 FIELD_SET(0, DE_CONTROL, STATUS, START);
746
747 SMTC_write2Dreg(DE_CONTROL, de_ctrl);
748
749 src_X += (opSign * xWidth);
750 dst_X += (opSign * xWidth);
751 dst_width -= xWidth;
752
753 if (dst_width <= 0) {
754 /* ROP2 operation is complete */
755 break;
756 }
757
758 if (xWidth > dst_width)
759 xWidth = dst_width;
760 }
761 } else {
762 deWaitForNotBusy();
763 SMTC_write2Dreg(DE_SOURCE,
764 FIELD_SET(0, DE_SOURCE, WRAP, DISABLE) |
765 FIELD_VALUE(0, DE_SOURCE, X_K1, src_X) |
766 FIELD_VALUE(0, DE_SOURCE, Y_K2, src_Y));
767
768 SMTC_write2Dreg(DE_DESTINATION,
769 FIELD_SET(0, DE_DESTINATION, WRAP, DISABLE) |
770 FIELD_VALUE(0, DE_DESTINATION, X, dst_X) |
771 FIELD_VALUE(0, DE_DESTINATION, Y, dst_Y));
772
773 SMTC_write2Dreg(DE_DIMENSION,
774 FIELD_VALUE(0, DE_DIMENSION, X, dst_width) |
775 FIELD_VALUE(0, DE_DIMENSION, Y_ET, dst_height));
776
777 de_ctrl = FIELD_VALUE(0, DE_CONTROL, ROP, nROP2) |
778 nTransparent |
779 FIELD_SET(0, DE_CONTROL, ROP_SELECT, ROP2) |
780 FIELD_SET(0, DE_CONTROL, COMMAND, BITBLT) |
781 ((nDirection == 1) ? FIELD_SET(0, DE_CONTROL, DIRECTION,
782 RIGHT_TO_LEFT)
783 : FIELD_SET(0, DE_CONTROL, DIRECTION,
784 LEFT_TO_RIGHT)) | FIELD_SET(0, DE_CONTROL,
785 STATUS, START);
786 SMTC_write2Dreg(DE_CONTROL, de_ctrl);
787 }
788
789 smtc_de_busy = 1;
790}
791
792/*
793 * This function sets the pixel format that will apply to the 2D Engine.
794 */
795void deSetPixelFormat(unsigned long bpp)
796{
797 unsigned long de_format;
798
799 de_format = SMTC_read2Dreg(DE_STRETCH_FORMAT);
800
801 switch (bpp) {
802 case 8:
803 de_format =
804 FIELD_SET(de_format, DE_STRETCH_FORMAT, PIXEL_FORMAT, 8);
805 break;
806 default:
807 case 16:
808 de_format =
809 FIELD_SET(de_format, DE_STRETCH_FORMAT, PIXEL_FORMAT, 16);
810 break;
811 case 32:
812 de_format =
813 FIELD_SET(de_format, DE_STRETCH_FORMAT, PIXEL_FORMAT, 32);
814 break;
815 }
816
817 SMTC_write2Dreg(DE_STRETCH_FORMAT, de_format);
818}
819
820/*
821 * System memory to Video memory monochrome expansion.
822 *
823 * Source is monochrome image in system memory. This function expands the
824 * monochrome data to color image in video memory.
825 */
826
827long deSystemMem2VideoMemMonoBlt(const char *pSrcbuf,
828 long srcDelta,
829 unsigned long startBit,
830 unsigned long dBase,
831 unsigned long dPitch,
832 unsigned long bpp,
833 unsigned long dx, unsigned long dy,
834 unsigned long width, unsigned long height,
835 unsigned long fColor,
836 unsigned long bColor,
837 unsigned long rop2) {
838 unsigned long bytePerPixel;
839 unsigned long ulBytesPerScan;
840 unsigned long ul4BytesPerScan;
841 unsigned long ulBytesRemain;
842 unsigned long de_ctrl = 0;
843 unsigned char ajRemain[4];
844 long i, j;
845
846 bytePerPixel = bpp / 8;
847
848 /* Just make sure the start bit is within legal range */
849 startBit &= 7;
850
851 ulBytesPerScan = (width + startBit + 7) / 8;
852 ul4BytesPerScan = ulBytesPerScan & ~3;
853 ulBytesRemain = ulBytesPerScan & 3;
854
855 if (smtc_de_busy)
856 deWaitForNotBusy();
857
858 /*
859 * 2D Source Base. Use 0 for HOST Blt.
860 */
861
862 SMTC_write2Dreg(DE_WINDOW_SOURCE_BASE, 0);
863
864 /*
865 * 2D Destination Base.
866 *
867 * It is an address offset (128 bit aligned) from the beginning of
868 * frame buffer.
869 */
870
871 SMTC_write2Dreg(DE_WINDOW_DESTINATION_BASE, dBase);
872
873 if (dPitch) {
874
875 /*
876 * Program pitch (distance between the 1st points of two
877 * adjacent lines).
878 *
879 * Note that input pitch is BYTE value, but the 2D Pitch
880 * register uses pixel values. Need Byte to pixel convertion.
881 */
882
883 SMTC_write2Dreg(DE_PITCH,
884 FIELD_VALUE(0, DE_PITCH, DESTINATION,
885 dPitch /
886 bytePerPixel) | FIELD_VALUE(0,
887 DE_PITCH,
888 SOURCE,
889 dPitch /
890 bytePerPixel));
891
892 /* Screen Window width in Pixels.
893 *
894 * 2D engine uses this value to calculate the linear address in
895 * frame buffer for a given point.
896 */
897
898 SMTC_write2Dreg(DE_WINDOW_WIDTH,
899 FIELD_VALUE(0, DE_WINDOW_WIDTH, DESTINATION,
900 (dPitch /
901 bytePerPixel)) | FIELD_VALUE(0,
902 DE_WINDOW_WIDTH,
903 SOURCE,
904 (dPitch
905 /
906 bytePerPixel)));
907 }
908 /* Note: For 2D Source in Host Write, only X_K1 field is needed, and
909 * Y_K2 field is not used. For mono bitmap, use startBit for X_K1.
910 */
911
912 SMTC_write2Dreg(DE_SOURCE,
913 FIELD_SET(0, DE_SOURCE, WRAP, DISABLE) |
914 FIELD_VALUE(0, DE_SOURCE, X_K1, startBit) |
915 FIELD_VALUE(0, DE_SOURCE, Y_K2, 0));
916
917 SMTC_write2Dreg(DE_DESTINATION,
918 FIELD_SET(0, DE_DESTINATION, WRAP, DISABLE) |
919 FIELD_VALUE(0, DE_DESTINATION, X, dx) |
920 FIELD_VALUE(0, DE_DESTINATION, Y, dy));
921
922 SMTC_write2Dreg(DE_DIMENSION,
923 FIELD_VALUE(0, DE_DIMENSION, X, width) |
924 FIELD_VALUE(0, DE_DIMENSION, Y_ET, height));
925
926 SMTC_write2Dreg(DE_FOREGROUND, fColor);
927 SMTC_write2Dreg(DE_BACKGROUND, bColor);
928
929 if (bpp)
930 deSetPixelFormat(bpp);
931 /* Set the pixel format of the destination */
932
933 de_ctrl = FIELD_VALUE(0, DE_CONTROL, ROP, rop2) |
934 FIELD_SET(0, DE_CONTROL, ROP_SELECT, ROP2) |
935 FIELD_SET(0, DE_CONTROL, COMMAND, HOST_WRITE) |
936 FIELD_SET(0, DE_CONTROL, HOST, MONO) |
937 FIELD_SET(0, DE_CONTROL, STATUS, START);
938
939 SMTC_write2Dreg(DE_CONTROL, de_ctrl | deGetTransparency());
940
941 /* Write MONO data (line by line) to 2D Engine data port */
942 for (i = 0; i < height; i++) {
943 /* For each line, send the data in chunks of 4 bytes */
944 for (j = 0; j < (ul4BytesPerScan / 4); j++)
945 SMTC_write2Ddataport(0,
946 *(unsigned long *)(pSrcbuf +
947 (j * 4)));
948
949 if (ulBytesRemain) {
950 memcpy(ajRemain, pSrcbuf + ul4BytesPerScan,
951 ulBytesRemain);
952 SMTC_write2Ddataport(0, *(unsigned long *)ajRemain);
953 }
954
955 pSrcbuf += srcDelta;
956 }
957 smtc_de_busy = 1;
958
959 return 0;
960}
961
962/*
963 * This function gets the transparency status from DE_CONTROL register.
964 * It returns a double word with the transparent fields properly set,
965 * while other fields are 0.
966 */
967unsigned long deGetTransparency(void)
968{
969 unsigned long de_ctrl;
970
971 de_ctrl = SMTC_read2Dreg(DE_CONTROL);
972
973 de_ctrl &=
974 FIELD_MASK(DE_CONTROL_TRANSPARENCY_MATCH) |
975 FIELD_MASK(DE_CONTROL_TRANSPARENCY_SELECT) |
976 FIELD_MASK(DE_CONTROL_TRANSPARENCY);
977
978 return de_ctrl;
979}
diff --git a/drivers/staging/sm7xx/smtc2d.h b/drivers/staging/sm7xx/smtc2d.h
new file mode 100644
index 000000000000..38d0c335322b
--- /dev/null
+++ b/drivers/staging/sm7xx/smtc2d.h
@@ -0,0 +1,530 @@
1/*
2 * Silicon Motion SM712 2D drawing engine functions.
3 *
4 * Copyright (C) 2006 Silicon Motion Technology Corp.
5 * Author: Ge Wang, gewang@siliconmotion.com
6 *
7 * Copyright (C) 2009 Lemote, Inc.
8 * Author: Wu Zhangjin, wuzj@lemote.com
9 *
10 * This file is subject to the terms and conditions of the GNU General Public
11 * License. See the file COPYING in the main directory of this archive for
12 * more details.
13 */
14
15#ifndef NULL
16#define NULL 0
17#endif
18
19/* Internal macros */
20
21#define _F_START(f) (0 ? f)
22#define _F_END(f) (1 ? f)
23#define _F_SIZE(f) (1 + _F_END(f) - _F_START(f))
24#define _F_MASK(f) (((1ULL << _F_SIZE(f)) - 1) << _F_START(f))
25#define _F_NORMALIZE(v, f) (((v) & _F_MASK(f)) >> _F_START(f))
26#define _F_DENORMALIZE(v, f) (((v) << _F_START(f)) & _F_MASK(f))
27
28/* Global macros */
29
30#define FIELD_GET(x, reg, field) \
31( \
32 _F_NORMALIZE((x), reg ## _ ## field) \
33)
34
35#define FIELD_SET(x, reg, field, value) \
36( \
37 (x & ~_F_MASK(reg ## _ ## field)) \
38 | _F_DENORMALIZE(reg ## _ ## field ## _ ## value, reg ## _ ## field) \
39)
40
41#define FIELD_VALUE(x, reg, field, value) \
42( \
43 (x & ~_F_MASK(reg ## _ ## field)) \
44 | _F_DENORMALIZE(value, reg ## _ ## field) \
45)
46
47#define FIELD_CLEAR(reg, field) \
48( \
49 ~_F_MASK(reg ## _ ## field) \
50)
51
52/* Field Macros */
53
54#define FIELD_START(field) (0 ? field)
55#define FIELD_END(field) (1 ? field)
56#define FIELD_SIZE(field) \
57 (1 + FIELD_END(field) - FIELD_START(field))
58
59#define FIELD_MASK(field) \
60 (((1 << (FIELD_SIZE(field)-1)) \
61 | ((1 << (FIELD_SIZE(field)-1)) - 1)) \
62 << FIELD_START(field))
63
64#define FIELD_NORMALIZE(reg, field) \
65 (((reg) & FIELD_MASK(field)) >> FIELD_START(field))
66
67#define FIELD_DENORMALIZE(field, value) \
68 (((value) << FIELD_START(field)) & FIELD_MASK(field))
69
70#define FIELD_INIT(reg, field, value) \
71 FIELD_DENORMALIZE(reg ## _ ## field, \
72 reg ## _ ## field ## _ ## value)
73
74#define FIELD_INIT_VAL(reg, field, value) \
75 (FIELD_DENORMALIZE(reg ## _ ## field, value))
76
77#define FIELD_VAL_SET(x, r, f, v) ({ \
78 x = (x & ~FIELD_MASK(r ## _ ## f)) \
79 | FIELD_DENORMALIZE(r ## _ ## f, r ## _ ## f ## _ ## v) \
80})
81
82#define RGB(r, g, b) ((unsigned long)(((r) << 16) | ((g) << 8) | (b)))
83
84/* Transparent info definition */
85typedef struct {
86 unsigned long match; /* Matching pixel is OPAQUE/TRANSPARENT */
87 unsigned long select; /* Transparency controlled by SRC/DST */
88 unsigned long control; /* ENABLE/DISABLE transparency */
89 unsigned long color; /* Transparent color */
90} Transparent, *pTransparent;
91
92#define PIXEL_DEPTH_1_BP 0 /* 1 bit per pixel */
93#define PIXEL_DEPTH_8_BPP 1 /* 8 bits per pixel */
94#define PIXEL_DEPTH_16_BPP 2 /* 16 bits per pixel */
95#define PIXEL_DEPTH_32_BPP 3 /* 32 bits per pixel */
96#define PIXEL_DEPTH_YUV422 8 /* 16 bits per pixel YUV422 */
97#define PIXEL_DEPTH_YUV420 9 /* 16 bits per pixel YUV420 */
98
99#define PATTERN_WIDTH 8
100#define PATTERN_HEIGHT 8
101
102#define TOP_TO_BOTTOM 0
103#define BOTTOM_TO_TOP 1
104#define RIGHT_TO_LEFT BOTTOM_TO_TOP
105#define LEFT_TO_RIGHT TOP_TO_BOTTOM
106
107/* Constants used in Transparent structure */
108#define MATCH_OPAQUE 0x00000000
109#define MATCH_TRANSPARENT 0x00000400
110#define SOURCE 0x00000000
111#define DESTINATION 0x00000200
112
113/* 2D registers. */
114
115#define DE_SOURCE 0x000000
116#define DE_SOURCE_WRAP 31 : 31
117#define DE_SOURCE_WRAP_DISABLE 0
118#define DE_SOURCE_WRAP_ENABLE 1
119#define DE_SOURCE_X_K1 29 : 16
120#define DE_SOURCE_Y_K2 15 : 0
121
122#define DE_DESTINATION 0x000004
123#define DE_DESTINATION_WRAP 31 : 31
124#define DE_DESTINATION_WRAP_DISABLE 0
125#define DE_DESTINATION_WRAP_ENABLE 1
126#define DE_DESTINATION_X 28 : 16
127#define DE_DESTINATION_Y 15 : 0
128
129#define DE_DIMENSION 0x000008
130#define DE_DIMENSION_X 28 : 16
131#define DE_DIMENSION_Y_ET 15 : 0
132
133#define DE_CONTROL 0x00000C
134#define DE_CONTROL_STATUS 31 : 31
135#define DE_CONTROL_STATUS_STOP 0
136#define DE_CONTROL_STATUS_START 1
137#define DE_CONTROL_PATTERN 30 : 30
138#define DE_CONTROL_PATTERN_MONO 0
139#define DE_CONTROL_PATTERN_COLOR 1
140#define DE_CONTROL_UPDATE_DESTINATION_X 29 : 29
141#define DE_CONTROL_UPDATE_DESTINATION_X_DISABLE 0
142#define DE_CONTROL_UPDATE_DESTINATION_X_ENABLE 1
143#define DE_CONTROL_QUICK_START 28 : 28
144#define DE_CONTROL_QUICK_START_DISABLE 0
145#define DE_CONTROL_QUICK_START_ENABLE 1
146#define DE_CONTROL_DIRECTION 27 : 27
147#define DE_CONTROL_DIRECTION_LEFT_TO_RIGHT 0
148#define DE_CONTROL_DIRECTION_RIGHT_TO_LEFT 1
149#define DE_CONTROL_MAJOR 26 : 26
150#define DE_CONTROL_MAJOR_X 0
151#define DE_CONTROL_MAJOR_Y 1
152#define DE_CONTROL_STEP_X 25 : 25
153#define DE_CONTROL_STEP_X_POSITIVE 1
154#define DE_CONTROL_STEP_X_NEGATIVE 0
155#define DE_CONTROL_STEP_Y 24 : 24
156#define DE_CONTROL_STEP_Y_POSITIVE 1
157#define DE_CONTROL_STEP_Y_NEGATIVE 0
158#define DE_CONTROL_STRETCH 23 : 23
159#define DE_CONTROL_STRETCH_DISABLE 0
160#define DE_CONTROL_STRETCH_ENABLE 1
161#define DE_CONTROL_HOST 22 : 22
162#define DE_CONTROL_HOST_COLOR 0
163#define DE_CONTROL_HOST_MONO 1
164#define DE_CONTROL_LAST_PIXEL 21 : 21
165#define DE_CONTROL_LAST_PIXEL_OFF 0
166#define DE_CONTROL_LAST_PIXEL_ON 1
167#define DE_CONTROL_COMMAND 20 : 16
168#define DE_CONTROL_COMMAND_BITBLT 0
169#define DE_CONTROL_COMMAND_RECTANGLE_FILL 1
170#define DE_CONTROL_COMMAND_DE_TILE 2
171#define DE_CONTROL_COMMAND_TRAPEZOID_FILL 3
172#define DE_CONTROL_COMMAND_ALPHA_BLEND 4
173#define DE_CONTROL_COMMAND_RLE_STRIP 5
174#define DE_CONTROL_COMMAND_SHORT_STROKE 6
175#define DE_CONTROL_COMMAND_LINE_DRAW 7
176#define DE_CONTROL_COMMAND_HOST_WRITE 8
177#define DE_CONTROL_COMMAND_HOST_READ 9
178#define DE_CONTROL_COMMAND_HOST_WRITE_BOTTOM_UP 10
179#define DE_CONTROL_COMMAND_ROTATE 11
180#define DE_CONTROL_COMMAND_FONT 12
181#define DE_CONTROL_COMMAND_TEXTURE_LOAD 15
182#define DE_CONTROL_ROP_SELECT 15 : 15
183#define DE_CONTROL_ROP_SELECT_ROP3 0
184#define DE_CONTROL_ROP_SELECT_ROP2 1
185#define DE_CONTROL_ROP2_SOURCE 14 : 14
186#define DE_CONTROL_ROP2_SOURCE_BITMAP 0
187#define DE_CONTROL_ROP2_SOURCE_PATTERN 1
188#define DE_CONTROL_MONO_DATA 13 : 12
189#define DE_CONTROL_MONO_DATA_NOT_PACKED 0
190#define DE_CONTROL_MONO_DATA_8_PACKED 1
191#define DE_CONTROL_MONO_DATA_16_PACKED 2
192#define DE_CONTROL_MONO_DATA_32_PACKED 3
193#define DE_CONTROL_REPEAT_ROTATE 11 : 11
194#define DE_CONTROL_REPEAT_ROTATE_DISABLE 0
195#define DE_CONTROL_REPEAT_ROTATE_ENABLE 1
196#define DE_CONTROL_TRANSPARENCY_MATCH 10 : 10
197#define DE_CONTROL_TRANSPARENCY_MATCH_OPAQUE 0
198#define DE_CONTROL_TRANSPARENCY_MATCH_TRANSPARENT 1
199#define DE_CONTROL_TRANSPARENCY_SELECT 9 : 9
200#define DE_CONTROL_TRANSPARENCY_SELECT_SOURCE 0
201#define DE_CONTROL_TRANSPARENCY_SELECT_DESTINATION 1
202#define DE_CONTROL_TRANSPARENCY 8 : 8
203#define DE_CONTROL_TRANSPARENCY_DISABLE 0
204#define DE_CONTROL_TRANSPARENCY_ENABLE 1
205#define DE_CONTROL_ROP 7 : 0
206
207/* Pseudo fields. */
208
209#define DE_CONTROL_SHORT_STROKE_DIR 27 : 24
210#define DE_CONTROL_SHORT_STROKE_DIR_225 0
211#define DE_CONTROL_SHORT_STROKE_DIR_135 1
212#define DE_CONTROL_SHORT_STROKE_DIR_315 2
213#define DE_CONTROL_SHORT_STROKE_DIR_45 3
214#define DE_CONTROL_SHORT_STROKE_DIR_270 4
215#define DE_CONTROL_SHORT_STROKE_DIR_90 5
216#define DE_CONTROL_SHORT_STROKE_DIR_180 8
217#define DE_CONTROL_SHORT_STROKE_DIR_0 10
218#define DE_CONTROL_ROTATION 25 : 24
219#define DE_CONTROL_ROTATION_0 0
220#define DE_CONTROL_ROTATION_270 1
221#define DE_CONTROL_ROTATION_90 2
222#define DE_CONTROL_ROTATION_180 3
223
224#define DE_PITCH 0x000010
225#define DE_PITCH_DESTINATION 28 : 16
226#define DE_PITCH_SOURCE 12 : 0
227
228#define DE_FOREGROUND 0x000014
229#define DE_FOREGROUND_COLOR 31 : 0
230
231#define DE_BACKGROUND 0x000018
232#define DE_BACKGROUND_COLOR 31 : 0
233
234#define DE_STRETCH_FORMAT 0x00001C
235#define DE_STRETCH_FORMAT_PATTERN_XY 30 : 30
236#define DE_STRETCH_FORMAT_PATTERN_XY_NORMAL 0
237#define DE_STRETCH_FORMAT_PATTERN_XY_OVERWRITE 1
238#define DE_STRETCH_FORMAT_PATTERN_Y 29 : 27
239#define DE_STRETCH_FORMAT_PATTERN_X 25 : 23
240#define DE_STRETCH_FORMAT_PIXEL_FORMAT 21 : 20
241#define DE_STRETCH_FORMAT_PIXEL_FORMAT_8 0
242#define DE_STRETCH_FORMAT_PIXEL_FORMAT_16 1
243#define DE_STRETCH_FORMAT_PIXEL_FORMAT_24 3
244#define DE_STRETCH_FORMAT_PIXEL_FORMAT_32 2
245#define DE_STRETCH_FORMAT_ADDRESSING 19 : 16
246#define DE_STRETCH_FORMAT_ADDRESSING_XY 0
247#define DE_STRETCH_FORMAT_ADDRESSING_LINEAR 15
248#define DE_STRETCH_FORMAT_SOURCE_HEIGHT 11 : 0
249
250#define DE_COLOR_COMPARE 0x000020
251#define DE_COLOR_COMPARE_COLOR 23 : 0
252
253#define DE_COLOR_COMPARE_MASK 0x000024
254#define DE_COLOR_COMPARE_MASK_MASKS 23 : 0
255
256#define DE_MASKS 0x000028
257#define DE_MASKS_BYTE_MASK 31 : 16
258#define DE_MASKS_BIT_MASK 15 : 0
259
260#define DE_CLIP_TL 0x00002C
261#define DE_CLIP_TL_TOP 31 : 16
262#define DE_CLIP_TL_STATUS 13 : 13
263#define DE_CLIP_TL_STATUS_DISABLE 0
264#define DE_CLIP_TL_STATUS_ENABLE 1
265#define DE_CLIP_TL_INHIBIT 12 : 12
266#define DE_CLIP_TL_INHIBIT_OUTSIDE 0
267#define DE_CLIP_TL_INHIBIT_INSIDE 1
268#define DE_CLIP_TL_LEFT 11 : 0
269
270#define DE_CLIP_BR 0x000030
271#define DE_CLIP_BR_BOTTOM 31 : 16
272#define DE_CLIP_BR_RIGHT 12 : 0
273
274#define DE_MONO_PATTERN_LOW 0x000034
275#define DE_MONO_PATTERN_LOW_PATTERN 31 : 0
276
277#define DE_MONO_PATTERN_HIGH 0x000038
278#define DE_MONO_PATTERN_HIGH_PATTERN 31 : 0
279
280#define DE_WINDOW_WIDTH 0x00003C
281#define DE_WINDOW_WIDTH_DESTINATION 28 : 16
282#define DE_WINDOW_WIDTH_SOURCE 12 : 0
283
284#define DE_WINDOW_SOURCE_BASE 0x000040
285#define DE_WINDOW_SOURCE_BASE_EXT 27 : 27
286#define DE_WINDOW_SOURCE_BASE_EXT_LOCAL 0
287#define DE_WINDOW_SOURCE_BASE_EXT_EXTERNAL 1
288#define DE_WINDOW_SOURCE_BASE_CS 26 : 26
289#define DE_WINDOW_SOURCE_BASE_CS_0 0
290#define DE_WINDOW_SOURCE_BASE_CS_1 1
291#define DE_WINDOW_SOURCE_BASE_ADDRESS 25 : 0
292
293#define DE_WINDOW_DESTINATION_BASE 0x000044
294#define DE_WINDOW_DESTINATION_BASE_EXT 27 : 27
295#define DE_WINDOW_DESTINATION_BASE_EXT_LOCAL 0
296#define DE_WINDOW_DESTINATION_BASE_EXT_EXTERNAL 1
297#define DE_WINDOW_DESTINATION_BASE_CS 26 : 26
298#define DE_WINDOW_DESTINATION_BASE_CS_0 0
299#define DE_WINDOW_DESTINATION_BASE_CS_1 1
300#define DE_WINDOW_DESTINATION_BASE_ADDRESS 25 : 0
301
302#define DE_ALPHA 0x000048
303#define DE_ALPHA_VALUE 7 : 0
304
305#define DE_WRAP 0x00004C
306#define DE_WRAP_X 31 : 16
307#define DE_WRAP_Y 15 : 0
308
309#define DE_STATUS 0x000050
310#define DE_STATUS_CSC 1 : 1
311#define DE_STATUS_CSC_CLEAR 0
312#define DE_STATUS_CSC_NOT_ACTIVE 0
313#define DE_STATUS_CSC_ACTIVE 1
314#define DE_STATUS_2D 0 : 0
315#define DE_STATUS_2D_CLEAR 0
316#define DE_STATUS_2D_NOT_ACTIVE 0
317#define DE_STATUS_2D_ACTIVE 1
318
319/* Color Space Conversion registers. */
320
321#define CSC_Y_SOURCE_BASE 0x0000C8
322#define CSC_Y_SOURCE_BASE_EXT 27 : 27
323#define CSC_Y_SOURCE_BASE_EXT_LOCAL 0
324#define CSC_Y_SOURCE_BASE_EXT_EXTERNAL 1
325#define CSC_Y_SOURCE_BASE_CS 26 : 26
326#define CSC_Y_SOURCE_BASE_CS_0 0
327#define CSC_Y_SOURCE_BASE_CS_1 1
328#define CSC_Y_SOURCE_BASE_ADDRESS 25 : 0
329
330#define CSC_CONSTANTS 0x0000CC
331#define CSC_CONSTANTS_Y 31 : 24
332#define CSC_CONSTANTS_R 23 : 16
333#define CSC_CONSTANTS_G 15 : 8
334#define CSC_CONSTANTS_B 7 : 0
335
336#define CSC_Y_SOURCE_X 0x0000D0
337#define CSC_Y_SOURCE_X_INTEGER 26 : 16
338#define CSC_Y_SOURCE_X_FRACTION 15 : 3
339
340#define CSC_Y_SOURCE_Y 0x0000D4
341#define CSC_Y_SOURCE_Y_INTEGER 27 : 16
342#define CSC_Y_SOURCE_Y_FRACTION 15 : 3
343
344#define CSC_U_SOURCE_BASE 0x0000D8
345#define CSC_U_SOURCE_BASE_EXT 27 : 27
346#define CSC_U_SOURCE_BASE_EXT_LOCAL 0
347#define CSC_U_SOURCE_BASE_EXT_EXTERNAL 1
348#define CSC_U_SOURCE_BASE_CS 26 : 26
349#define CSC_U_SOURCE_BASE_CS_0 0
350#define CSC_U_SOURCE_BASE_CS_1 1
351#define CSC_U_SOURCE_BASE_ADDRESS 25 : 0
352
353#define CSC_V_SOURCE_BASE 0x0000DC
354#define CSC_V_SOURCE_BASE_EXT 27 : 27
355#define CSC_V_SOURCE_BASE_EXT_LOCAL 0
356#define CSC_V_SOURCE_BASE_EXT_EXTERNAL 1
357#define CSC_V_SOURCE_BASE_CS 26 : 26
358#define CSC_V_SOURCE_BASE_CS_0 0
359#define CSC_V_SOURCE_BASE_CS_1 1
360#define CSC_V_SOURCE_BASE_ADDRESS 25 : 0
361
362#define CSC_SOURCE_DIMENSION 0x0000E0
363#define CSC_SOURCE_DIMENSION_X 31 : 16
364#define CSC_SOURCE_DIMENSION_Y 15 : 0
365
366#define CSC_SOURCE_PITCH 0x0000E4
367#define CSC_SOURCE_PITCH_Y 31 : 16
368#define CSC_SOURCE_PITCH_UV 15 : 0
369
370#define CSC_DESTINATION 0x0000E8
371#define CSC_DESTINATION_WRAP 31 : 31
372#define CSC_DESTINATION_WRAP_DISABLE 0
373#define CSC_DESTINATION_WRAP_ENABLE 1
374#define CSC_DESTINATION_X 27 : 16
375#define CSC_DESTINATION_Y 11 : 0
376
377#define CSC_DESTINATION_DIMENSION 0x0000EC
378#define CSC_DESTINATION_DIMENSION_X 31 : 16
379#define CSC_DESTINATION_DIMENSION_Y 15 : 0
380
381#define CSC_DESTINATION_PITCH 0x0000F0
382#define CSC_DESTINATION_PITCH_X 31 : 16
383#define CSC_DESTINATION_PITCH_Y 15 : 0
384
385#define CSC_SCALE_FACTOR 0x0000F4
386#define CSC_SCALE_FACTOR_HORIZONTAL 31 : 16
387#define CSC_SCALE_FACTOR_VERTICAL 15 : 0
388
389#define CSC_DESTINATION_BASE 0x0000F8
390#define CSC_DESTINATION_BASE_EXT 27 : 27
391#define CSC_DESTINATION_BASE_EXT_LOCAL 0
392#define CSC_DESTINATION_BASE_EXT_EXTERNAL 1
393#define CSC_DESTINATION_BASE_CS 26 : 26
394#define CSC_DESTINATION_BASE_CS_0 0
395#define CSC_DESTINATION_BASE_CS_1 1
396#define CSC_DESTINATION_BASE_ADDRESS 25 : 0
397
398#define CSC_CONTROL 0x0000FC
399#define CSC_CONTROL_STATUS 31 : 31
400#define CSC_CONTROL_STATUS_STOP 0
401#define CSC_CONTROL_STATUS_START 1
402#define CSC_CONTROL_SOURCE_FORMAT 30 : 28
403#define CSC_CONTROL_SOURCE_FORMAT_YUV422 0
404#define CSC_CONTROL_SOURCE_FORMAT_YUV420I 1
405#define CSC_CONTROL_SOURCE_FORMAT_YUV420 2
406#define CSC_CONTROL_SOURCE_FORMAT_YVU9 3
407#define CSC_CONTROL_SOURCE_FORMAT_IYU1 4
408#define CSC_CONTROL_SOURCE_FORMAT_IYU2 5
409#define CSC_CONTROL_SOURCE_FORMAT_RGB565 6
410#define CSC_CONTROL_SOURCE_FORMAT_RGB8888 7
411#define CSC_CONTROL_DESTINATION_FORMAT 27 : 26
412#define CSC_CONTROL_DESTINATION_FORMAT_RGB565 0
413#define CSC_CONTROL_DESTINATION_FORMAT_RGB8888 1
414#define CSC_CONTROL_HORIZONTAL_FILTER 25 : 25
415#define CSC_CONTROL_HORIZONTAL_FILTER_DISABLE 0
416#define CSC_CONTROL_HORIZONTAL_FILTER_ENABLE 1
417#define CSC_CONTROL_VERTICAL_FILTER 24 : 24
418#define CSC_CONTROL_VERTICAL_FILTER_DISABLE 0
419#define CSC_CONTROL_VERTICAL_FILTER_ENABLE 1
420#define CSC_CONTROL_BYTE_ORDER 23 : 23
421#define CSC_CONTROL_BYTE_ORDER_YUYV 0
422#define CSC_CONTROL_BYTE_ORDER_UYVY 1
423
424#define DE_DATA_PORT_501 0x110000
425#define DE_DATA_PORT_712 0x400000
426#define DE_DATA_PORT_722 0x6000
427
428/* point to virtual Memory Map IO starting address */
429extern char *smtc_RegBaseAddress;
430/* point to virtual video memory starting address */
431extern char *smtc_VRAMBaseAddress;
432extern unsigned char smtc_de_busy;
433
434extern unsigned long memRead32(unsigned long nOffset);
435extern void memWrite32(unsigned long nOffset, unsigned long nData);
436extern unsigned long SMTC_read2Dreg(unsigned long nOffset);
437
438/* 2D functions */
439extern void deInit(unsigned int nModeWidth, unsigned int nModeHeight,
440 unsigned int bpp);
441
442extern void deWaitForNotBusy(void);
443
444extern void deVerticalLine(unsigned long dst_base,
445 unsigned long dst_pitch,
446 unsigned long nX,
447 unsigned long nY,
448 unsigned long dst_height,
449 unsigned long nColor);
450
451extern void deHorizontalLine(unsigned long dst_base,
452 unsigned long dst_pitch,
453 unsigned long nX,
454 unsigned long nY,
455 unsigned long dst_width,
456 unsigned long nColor);
457
458extern void deLine(unsigned long dst_base,
459 unsigned long dst_pitch,
460 unsigned long nX1,
461 unsigned long nY1,
462 unsigned long nX2,
463 unsigned long nY2,
464 unsigned long nColor);
465
466extern void deFillRect(unsigned long dst_base,
467 unsigned long dst_pitch,
468 unsigned long dst_X,
469 unsigned long dst_Y,
470 unsigned long dst_width,
471 unsigned long dst_height,
472 unsigned long nColor);
473
474extern void deRotatePattern(unsigned char *pattern_dstaddr,
475 unsigned long pattern_src_addr,
476 unsigned long pattern_BPP,
477 unsigned long pattern_stride,
478 int patternX,
479 int patternY);
480
481extern void deCopy(unsigned long dst_base,
482 unsigned long dst_pitch,
483 unsigned long dst_BPP,
484 unsigned long dst_X,
485 unsigned long dst_Y,
486 unsigned long dst_width,
487 unsigned long dst_height,
488 unsigned long src_base,
489 unsigned long src_pitch,
490 unsigned long src_X,
491 unsigned long src_Y,
492 pTransparent pTransp,
493 unsigned char nROP2);
494
495/*
496 * System memory to Video memory monochrome expansion.
497 *
498 * Source is monochrome image in system memory. This function expands the
499 * monochrome data to color image in video memory.
500 *
501 * @pSrcbuf: pointer to start of source buffer in system memory
502 * @srcDelta: Pitch value (in bytes) of the source buffer, +ive means top
503 * down and -ive mean button up
504 * @startBit: Mono data can start at any bit in a byte, this value should
505 * be 0 to 7
506 * @dBase: Address of destination : offset in frame buffer
507 * @dPitch: Pitch value of destination surface in BYTE
508 * @bpp: Color depth of destination surface
509 * @dx, dy: Starting coordinate of destination surface
510 * @width, height: width and height of rectange in pixel value
511 * @fColor,bColor: Foreground, Background color (corresponding to a 1, 0 in
512 * the monochrome data)
513 * @rop2: ROP value
514 */
515
516extern long deSystemMem2VideoMemMonoBlt(
517 const char *pSrcbuf,
518 long srcDelta,
519 unsigned long startBit,
520 unsigned long dBase,
521 unsigned long dPitch,
522 unsigned long bpp,
523 unsigned long dx, unsigned long dy,
524 unsigned long width, unsigned long height,
525 unsigned long fColor,
526 unsigned long bColor,
527 unsigned long rop2);
528
529extern unsigned long deGetTransparency(void);
530extern void deSetPixelFormat(unsigned long bpp);
diff --git a/drivers/staging/sm7xx/smtcfb.c b/drivers/staging/sm7xx/smtcfb.c
new file mode 100644
index 000000000000..161dbc9c1397
--- /dev/null
+++ b/drivers/staging/sm7xx/smtcfb.c
@@ -0,0 +1,1253 @@
1/*
2 * Silicon Motion SM7XX frame buffer device
3 *
4 * Copyright (C) 2006 Silicon Motion Technology Corp.
5 * Authors: Ge Wang, gewang@siliconmotion.com
6 * Boyod boyod.yang@siliconmotion.com.cn
7 *
8 * Copyright (C) 2009 Lemote, Inc.
9 * Author: Wu Zhangjin, wuzj@lemote.com
10 *
11 * This file is subject to the terms and conditions of the GNU General Public
12 * License. See the file COPYING in the main directory of this archive for
13 * more details.
14 *
15 * Version 0.10.26192.21.01
16 * - Add PowerPC/Big endian support
17 * - Add 2D support for Lynx
18 * - Verified on2.6.19.2 Boyod.yang <boyod.yang@siliconmotion.com.cn>
19 *
20 * Version 0.09.2621.00.01
21 * - Only support Linux Kernel's version 2.6.21.
22 * Boyod.yang <boyod.yang@siliconmotion.com.cn>
23 *
24 * Version 0.09
25 * - Only support Linux Kernel's version 2.6.12.
26 * Boyod.yang <boyod.yang@siliconmotion.com.cn>
27 */
28
29#ifndef __KERNEL__
30#define __KERNEL__
31#endif
32
33#include <linux/io.h>
34#include <linux/fb.h>
35#include <linux/pci.h>
36#include <linux/init.h>
37#include <linux/uaccess.h>
38#include <linux/console.h>
39#include <linux/screen_info.h>
40
41#ifdef CONFIG_PM
42#include <linux/pm.h>
43#endif
44
45struct screen_info smtc_screen_info;
46
47#include "smtcfb.h"
48#include "smtc2d.h"
49
50#ifdef DEBUG
51#define smdbg(format, arg...) printk(KERN_DEBUG format , ## arg)
52#else
53#define smdbg(format, arg...)
54#endif
55
56/*
57* Private structure
58*/
59struct smtcfb_info {
60 /*
61 * The following is a pointer to be passed into the
62 * functions below. The modules outside the main
63 * voyager.c driver have no knowledge as to what
64 * is within this structure.
65 */
66 struct fb_info fb;
67 struct display_switch *dispsw;
68 struct pci_dev *dev;
69 signed int currcon;
70
71 struct {
72 u8 red, green, blue;
73 } palette[NR_RGB];
74
75 u_int palette_size;
76};
77
78struct par_info {
79 /*
80 * Hardware
81 */
82 u16 chipID;
83 unsigned char __iomem *m_pMMIO;
84 char __iomem *m_pLFB;
85 char *m_pDPR;
86 char *m_pVPR;
87 char *m_pCPR;
88
89 u_int width;
90 u_int height;
91 u_int hz;
92 u_long BaseAddressInVRAM;
93 u8 chipRevID;
94};
95
96struct vesa_mode_table {
97 char mode_index[6];
98 u16 lfb_width;
99 u16 lfb_height;
100 u16 lfb_depth;
101};
102
103static struct vesa_mode_table vesa_mode[] = {
104 {"0x301", 640, 480, 8},
105 {"0x303", 800, 600, 8},
106 {"0x305", 1024, 768, 8},
107 {"0x307", 1280, 1024, 8},
108
109 {"0x311", 640, 480, 16},
110 {"0x314", 800, 600, 16},
111 {"0x317", 1024, 768, 16},
112 {"0x31A", 1280, 1024, 16},
113
114 {"0x312", 640, 480, 24},
115 {"0x315", 800, 600, 24},
116 {"0x318", 1024, 768, 24},
117 {"0x31B", 1280, 1024, 24},
118};
119
120char __iomem *smtc_RegBaseAddress; /* Memory Map IO starting address */
121char __iomem *smtc_VRAMBaseAddress; /* video memory starting address */
122
123char *smtc_2DBaseAddress; /* 2D engine starting address */
124char *smtc_2Ddataport; /* 2D data port offset */
125short smtc_2Dacceleration;
126
127static u32 colreg[17];
128static struct par_info hw; /* hardware information */
129
130u16 smtc_ChipIDs[] = {
131 0x710,
132 0x712,
133 0x720
134};
135
136#define numSMTCchipIDs (sizeof(smtc_ChipIDs) / sizeof(u16))
137
138void deWaitForNotBusy(void)
139{
140 unsigned long i = 0x1000000;
141 while (i--) {
142 if ((smtc_seqr(0x16) & 0x18) == 0x10)
143 break;
144 }
145 smtc_de_busy = 0;
146}
147
148static void sm712_set_timing(struct smtcfb_info *sfb,
149 struct par_info *ppar_info)
150{
151 int i = 0, j = 0;
152 u32 m_nScreenStride;
153
154 smdbg("\nppar_info->width = %d ppar_info->height = %d"
155 "sfb->fb.var.bits_per_pixel = %d ppar_info->hz = %d\n",
156 ppar_info->width, ppar_info->height,
157 sfb->fb.var.bits_per_pixel, ppar_info->hz);
158
159 for (j = 0; j < numVGAModes; j++) {
160 if (VGAMode[j].mmSizeX == ppar_info->width &&
161 VGAMode[j].mmSizeY == ppar_info->height &&
162 VGAMode[j].bpp == sfb->fb.var.bits_per_pixel &&
163 VGAMode[j].hz == ppar_info->hz) {
164
165 smdbg("\nVGAMode[j].mmSizeX = %d VGAMode[j].mmSizeY ="
166 "%d VGAMode[j].bpp = %d"
167 "VGAMode[j].hz=%d\n",
168 VGAMode[j].mmSizeX, VGAMode[j].mmSizeY,
169 VGAMode[j].bpp, VGAMode[j].hz);
170
171 smdbg("VGAMode index=%d\n", j);
172
173 smtc_mmiowb(0x0, 0x3c6);
174
175 smtc_seqw(0, 0x1);
176
177 smtc_mmiowb(VGAMode[j].Init_MISC, 0x3c2);
178
179 /* init SEQ register SR00 - SR04 */
180 for (i = 0; i < SIZE_SR00_SR04; i++)
181 smtc_seqw(i, VGAMode[j].Init_SR00_SR04[i]);
182
183 /* init SEQ register SR10 - SR24 */
184 for (i = 0; i < SIZE_SR10_SR24; i++)
185 smtc_seqw(i + 0x10,
186 VGAMode[j].Init_SR10_SR24[i]);
187
188 /* init SEQ register SR30 - SR75 */
189 for (i = 0; i < SIZE_SR30_SR75; i++)
190 if (((i + 0x30) != 0x62) \
191 && ((i + 0x30) != 0x6a) \
192 && ((i + 0x30) != 0x6b))
193 smtc_seqw(i + 0x30,
194 VGAMode[j].Init_SR30_SR75[i]);
195
196 /* init SEQ register SR80 - SR93 */
197 for (i = 0; i < SIZE_SR80_SR93; i++)
198 smtc_seqw(i + 0x80,
199 VGAMode[j].Init_SR80_SR93[i]);
200
201 /* init SEQ register SRA0 - SRAF */
202 for (i = 0; i < SIZE_SRA0_SRAF; i++)
203 smtc_seqw(i + 0xa0,
204 VGAMode[j].Init_SRA0_SRAF[i]);
205
206 /* init Graphic register GR00 - GR08 */
207 for (i = 0; i < SIZE_GR00_GR08; i++)
208 smtc_grphw(i, VGAMode[j].Init_GR00_GR08[i]);
209
210 /* init Attribute register AR00 - AR14 */
211 for (i = 0; i < SIZE_AR00_AR14; i++)
212 smtc_attrw(i, VGAMode[j].Init_AR00_AR14[i]);
213
214 /* init CRTC register CR00 - CR18 */
215 for (i = 0; i < SIZE_CR00_CR18; i++)
216 smtc_crtcw(i, VGAMode[j].Init_CR00_CR18[i]);
217
218 /* init CRTC register CR30 - CR4D */
219 for (i = 0; i < SIZE_CR30_CR4D; i++)
220 smtc_crtcw(i + 0x30,
221 VGAMode[j].Init_CR30_CR4D[i]);
222
223 /* init CRTC register CR90 - CRA7 */
224 for (i = 0; i < SIZE_CR90_CRA7; i++)
225 smtc_crtcw(i + 0x90,
226 VGAMode[j].Init_CR90_CRA7[i]);
227 }
228 }
229 smtc_mmiowb(0x67, 0x3c2);
230
231 /* set VPR registers */
232 writel(0x0, ppar_info->m_pVPR + 0x0C);
233 writel(0x0, ppar_info->m_pVPR + 0x40);
234
235 /* set data width */
236 m_nScreenStride =
237 (ppar_info->width * sfb->fb.var.bits_per_pixel) / 64;
238 switch (sfb->fb.var.bits_per_pixel) {
239 case 8:
240 writel(0x0, ppar_info->m_pVPR + 0x0);
241 break;
242 case 16:
243 writel(0x00020000, ppar_info->m_pVPR + 0x0);
244 break;
245 case 24:
246 writel(0x00040000, ppar_info->m_pVPR + 0x0);
247 break;
248 case 32:
249 writel(0x00030000, ppar_info->m_pVPR + 0x0);
250 break;
251 }
252 writel((u32) (((m_nScreenStride + 2) << 16) | m_nScreenStride),
253 ppar_info->m_pVPR + 0x10);
254
255}
256
257static void sm712_setpalette(int regno, unsigned red, unsigned green,
258 unsigned blue, struct fb_info *info)
259{
260 struct par_info *cur_par = (struct par_info *)info->par;
261
262 if (cur_par->BaseAddressInVRAM)
263 /*
264 * second display palette for dual head. Enable CRT RAM, 6-bit
265 * RAM
266 */
267 smtc_seqw(0x66, (smtc_seqr(0x66) & 0xC3) | 0x20);
268 else
269 /* primary display palette. Enable LCD RAM only, 6-bit RAM */
270 smtc_seqw(0x66, (smtc_seqr(0x66) & 0xC3) | 0x10);
271 smtc_mmiowb(regno, dac_reg);
272 smtc_mmiowb(red >> 10, dac_val);
273 smtc_mmiowb(green >> 10, dac_val);
274 smtc_mmiowb(blue >> 10, dac_val);
275}
276
277static void smtc_set_timing(struct smtcfb_info *sfb, struct par_info
278 *ppar_info)
279{
280 switch (ppar_info->chipID) {
281 case 0x710:
282 case 0x712:
283 case 0x720:
284 sm712_set_timing(sfb, ppar_info);
285 break;
286 }
287}
288
289static struct fb_var_screeninfo smtcfb_var = {
290 .xres = 1024,
291 .yres = 600,
292 .xres_virtual = 1024,
293 .yres_virtual = 600,
294 .bits_per_pixel = 16,
295 .red = {16, 8, 0},
296 .green = {8, 8, 0},
297 .blue = {0, 8, 0},
298 .activate = FB_ACTIVATE_NOW,
299 .height = -1,
300 .width = -1,
301 .vmode = FB_VMODE_NONINTERLACED,
302};
303
304static struct fb_fix_screeninfo smtcfb_fix = {
305 .id = "sm712fb",
306 .type = FB_TYPE_PACKED_PIXELS,
307 .visual = FB_VISUAL_TRUECOLOR,
308 .line_length = 800 * 3,
309 .accel = FB_ACCEL_SMI_LYNX,
310};
311
312/* chan_to_field
313 *
314 * convert a colour value into a field position
315 *
316 * from pxafb.c
317 */
318
319static inline unsigned int chan_to_field(unsigned int chan,
320 struct fb_bitfield *bf)
321{
322 chan &= 0xffff;
323 chan >>= 16 - bf->length;
324 return chan << bf->offset;
325}
326
327static int smtcfb_blank(int blank_mode, struct fb_info *info)
328{
329 /* clear DPMS setting */
330 switch (blank_mode) {
331 case FB_BLANK_UNBLANK:
332 /* Screen On: HSync: On, VSync : On */
333 smtc_seqw(0x01, (smtc_seqr(0x01) & (~0x20)));
334 smtc_seqw(0x6a, 0x16);
335 smtc_seqw(0x6b, 0x02);
336 smtc_seqw(0x21, (smtc_seqr(0x21) & 0x77));
337 smtc_seqw(0x22, (smtc_seqr(0x22) & (~0x30)));
338 smtc_seqw(0x23, (smtc_seqr(0x23) & (~0xc0)));
339 smtc_seqw(0x24, (smtc_seqr(0x24) | 0x01));
340 smtc_seqw(0x31, (smtc_seqr(0x31) | 0x03));
341 break;
342 case FB_BLANK_NORMAL:
343 /* Screen Off: HSync: On, VSync : On Soft blank */
344 smtc_seqw(0x01, (smtc_seqr(0x01) & (~0x20)));
345 smtc_seqw(0x6a, 0x16);
346 smtc_seqw(0x6b, 0x02);
347 smtc_seqw(0x22, (smtc_seqr(0x22) & (~0x30)));
348 smtc_seqw(0x23, (smtc_seqr(0x23) & (~0xc0)));
349 smtc_seqw(0x24, (smtc_seqr(0x24) | 0x01));
350 smtc_seqw(0x31, ((smtc_seqr(0x31) & (~0x07)) | 0x00));
351 break;
352 case FB_BLANK_VSYNC_SUSPEND:
353 /* Screen On: HSync: On, VSync : Off */
354 smtc_seqw(0x01, (smtc_seqr(0x01) | 0x20));
355 smtc_seqw(0x20, (smtc_seqr(0x20) & (~0xB0)));
356 smtc_seqw(0x6a, 0x0c);
357 smtc_seqw(0x6b, 0x02);
358 smtc_seqw(0x21, (smtc_seqr(0x21) | 0x88));
359 smtc_seqw(0x22, ((smtc_seqr(0x22) & (~0x30)) | 0x20));
360 smtc_seqw(0x23, ((smtc_seqr(0x23) & (~0xc0)) | 0x20));
361 smtc_seqw(0x24, (smtc_seqr(0x24) & (~0x01)));
362 smtc_seqw(0x31, ((smtc_seqr(0x31) & (~0x07)) | 0x00));
363 smtc_seqw(0x34, (smtc_seqr(0x34) | 0x80));
364 break;
365 case FB_BLANK_HSYNC_SUSPEND:
366 /* Screen On: HSync: Off, VSync : On */
367 smtc_seqw(0x01, (smtc_seqr(0x01) | 0x20));
368 smtc_seqw(0x20, (smtc_seqr(0x20) & (~0xB0)));
369 smtc_seqw(0x6a, 0x0c);
370 smtc_seqw(0x6b, 0x02);
371 smtc_seqw(0x21, (smtc_seqr(0x21) | 0x88));
372 smtc_seqw(0x22, ((smtc_seqr(0x22) & (~0x30)) | 0x10));
373 smtc_seqw(0x23, ((smtc_seqr(0x23) & (~0xc0)) | 0xD8));
374 smtc_seqw(0x24, (smtc_seqr(0x24) & (~0x01)));
375 smtc_seqw(0x31, ((smtc_seqr(0x31) & (~0x07)) | 0x00));
376 smtc_seqw(0x34, (smtc_seqr(0x34) | 0x80));
377 break;
378 case FB_BLANK_POWERDOWN:
379 /* Screen On: HSync: Off, VSync : Off */
380 smtc_seqw(0x01, (smtc_seqr(0x01) | 0x20));
381 smtc_seqw(0x20, (smtc_seqr(0x20) & (~0xB0)));
382 smtc_seqw(0x6a, 0x0c);
383 smtc_seqw(0x6b, 0x02);
384 smtc_seqw(0x21, (smtc_seqr(0x21) | 0x88));
385 smtc_seqw(0x22, ((smtc_seqr(0x22) & (~0x30)) | 0x30));
386 smtc_seqw(0x23, ((smtc_seqr(0x23) & (~0xc0)) | 0xD8));
387 smtc_seqw(0x24, (smtc_seqr(0x24) & (~0x01)));
388 smtc_seqw(0x31, ((smtc_seqr(0x31) & (~0x07)) | 0x00));
389 smtc_seqw(0x34, (smtc_seqr(0x34) | 0x80));
390 break;
391 default:
392 return -EINVAL;
393 }
394
395 return 0;
396}
397
398static int smtc_setcolreg(unsigned regno, unsigned red, unsigned green,
399 unsigned blue, unsigned trans, struct fb_info *info)
400{
401 struct smtcfb_info *sfb = (struct smtcfb_info *)info;
402 u32 val;
403
404 if (regno > 255)
405 return 1;
406
407 switch (sfb->fb.fix.visual) {
408 case FB_VISUAL_DIRECTCOLOR:
409 case FB_VISUAL_TRUECOLOR:
410 /*
411 * 16/32 bit true-colour, use pseuo-palette for 16 base color
412 */
413 if (regno < 16) {
414 if (sfb->fb.var.bits_per_pixel == 16) {
415 u32 *pal = sfb->fb.pseudo_palette;
416 val = chan_to_field(red, &sfb->fb.var.red);
417 val |= chan_to_field(green, \
418 &sfb->fb.var.green);
419 val |= chan_to_field(blue, &sfb->fb.var.blue);
420#ifdef __BIG_ENDIAN
421 pal[regno] =
422 ((red & 0xf800) >> 8) |
423 ((green & 0xe000) >> 13) |
424 ((green & 0x1c00) << 3) |
425 ((blue & 0xf800) >> 3);
426#else
427 pal[regno] = val;
428#endif
429 } else {
430 u32 *pal = sfb->fb.pseudo_palette;
431 val = chan_to_field(red, &sfb->fb.var.red);
432 val |= chan_to_field(green, \
433 &sfb->fb.var.green);
434 val |= chan_to_field(blue, &sfb->fb.var.blue);
435#ifdef __BIG_ENDIAN
436 val =
437 (val & 0xff00ff00 >> 8) |
438 (val & 0x00ff00ff << 8);
439#endif
440 pal[regno] = val;
441 }
442 }
443 break;
444
445 case FB_VISUAL_PSEUDOCOLOR:
446 /* color depth 8 bit */
447 sm712_setpalette(regno, red, green, blue, info);
448 break;
449
450 default:
451 return 1; /* unknown type */
452 }
453
454 return 0;
455
456}
457
458#ifdef __BIG_ENDIAN
459static ssize_t smtcfb_read(struct fb_info *info, char __user * buf, size_t
460 count, loff_t *ppos)
461{
462 unsigned long p = *ppos;
463
464 u32 *buffer, *dst;
465 u32 __iomem *src;
466 int c, i, cnt = 0, err = 0;
467 unsigned long total_size;
468
469 if (!info || !info->screen_base)
470 return -ENODEV;
471
472 if (info->state != FBINFO_STATE_RUNNING)
473 return -EPERM;
474
475 total_size = info->screen_size;
476
477 if (total_size == 0)
478 total_size = info->fix.smem_len;
479
480 if (p >= total_size)
481 return 0;
482
483 if (count >= total_size)
484 count = total_size;
485
486 if (count + p > total_size)
487 count = total_size - p;
488
489 buffer = kmalloc((count > PAGE_SIZE) ? PAGE_SIZE : count, GFP_KERNEL);
490 if (!buffer)
491 return -ENOMEM;
492
493 src = (u32 __iomem *) (info->screen_base + p);
494
495 if (info->fbops->fb_sync)
496 info->fbops->fb_sync(info);
497
498 while (count) {
499 c = (count > PAGE_SIZE) ? PAGE_SIZE : count;
500 dst = buffer;
501 for (i = c >> 2; i--;) {
502 *dst = fb_readl(src++);
503 *dst =
504 (*dst & 0xff00ff00 >> 8) |
505 (*dst & 0x00ff00ff << 8);
506 dst++;
507 }
508 if (c & 3) {
509 u8 *dst8 = (u8 *) dst;
510 u8 __iomem *src8 = (u8 __iomem *) src;
511
512 for (i = c & 3; i--;) {
513 if (i & 1) {
514 *dst8++ = fb_readb(++src8);
515 } else {
516 *dst8++ = fb_readb(--src8);
517 src8 += 2;
518 }
519 }
520 src = (u32 __iomem *) src8;
521 }
522
523 if (copy_to_user(buf, buffer, c)) {
524 err = -EFAULT;
525 break;
526 }
527 *ppos += c;
528 buf += c;
529 cnt += c;
530 count -= c;
531 }
532
533 kfree(buffer);
534
535 return (err) ? err : cnt;
536}
537
538static ssize_t
539smtcfb_write(struct fb_info *info, const char __user *buf, size_t count,
540 loff_t *ppos)
541{
542 unsigned long p = *ppos;
543
544 u32 *buffer, *src;
545 u32 __iomem *dst;
546 int c, i, cnt = 0, err = 0;
547 unsigned long total_size;
548
549 if (!info || !info->screen_base)
550 return -ENODEV;
551
552 if (info->state != FBINFO_STATE_RUNNING)
553 return -EPERM;
554
555 total_size = info->screen_size;
556
557 if (total_size == 0)
558 total_size = info->fix.smem_len;
559
560 if (p > total_size)
561 return -EFBIG;
562
563 if (count > total_size) {
564 err = -EFBIG;
565 count = total_size;
566 }
567
568 if (count + p > total_size) {
569 if (!err)
570 err = -ENOSPC;
571
572 count = total_size - p;
573 }
574
575 buffer = kmalloc((count > PAGE_SIZE) ? PAGE_SIZE : count, GFP_KERNEL);
576 if (!buffer)
577 return -ENOMEM;
578
579 dst = (u32 __iomem *) (info->screen_base + p);
580
581 if (info->fbops->fb_sync)
582 info->fbops->fb_sync(info);
583
584 while (count) {
585 c = (count > PAGE_SIZE) ? PAGE_SIZE : count;
586 src = buffer;
587
588 if (copy_from_user(src, buf, c)) {
589 err = -EFAULT;
590 break;
591 }
592
593 for (i = c >> 2; i--;) {
594 fb_writel((*src & 0xff00ff00 >> 8) |
595 (*src & 0x00ff00ff << 8), dst++);
596 src++;
597 }
598 if (c & 3) {
599 u8 *src8 = (u8 *) src;
600 u8 __iomem *dst8 = (u8 __iomem *) dst;
601
602 for (i = c & 3; i--;) {
603 if (i & 1) {
604 fb_writeb(*src8++, ++dst8);
605 } else {
606 fb_writeb(*src8++, --dst8);
607 dst8 += 2;
608 }
609 }
610 dst = (u32 __iomem *) dst8;
611 }
612
613 *ppos += c;
614 buf += c;
615 cnt += c;
616 count -= c;
617 }
618
619 kfree(buffer);
620
621 return (cnt) ? cnt : err;
622}
623#endif /* ! __BIG_ENDIAN */
624
625#include "smtc2d.c"
626
627void smtcfb_copyarea(struct fb_info *info, const struct fb_copyarea *area)
628{
629 struct par_info *p = (struct par_info *)info->par;
630
631 if (smtc_2Dacceleration) {
632 if (!area->width || !area->height)
633 return;
634
635 deCopy(p->BaseAddressInVRAM, 0, info->var.bits_per_pixel,
636 area->dx, area->dy, area->width, area->height,
637 p->BaseAddressInVRAM, 0, area->sx, area->sy, 0, 0xC);
638
639 } else
640 cfb_copyarea(info, area);
641}
642
643void smtcfb_fillrect(struct fb_info *info, const struct fb_fillrect *rect)
644{
645 struct par_info *p = (struct par_info *)info->par;
646
647 if (smtc_2Dacceleration) {
648 if (!rect->width || !rect->height)
649 return;
650 if (info->var.bits_per_pixel >= 24)
651 deFillRect(p->BaseAddressInVRAM, 0, rect->dx * 3,
652 rect->dy * 3, rect->width * 3, rect->height,
653 rect->color);
654 else
655 deFillRect(p->BaseAddressInVRAM, 0, rect->dx, rect->dy,
656 rect->width, rect->height, rect->color);
657 } else
658 cfb_fillrect(info, rect);
659}
660
661void smtcfb_imageblit(struct fb_info *info, const struct fb_image *image)
662{
663 struct par_info *p = (struct par_info *)info->par;
664 u32 bg_col = 0, fg_col = 0;
665
666 if ((smtc_2Dacceleration) && (image->depth == 1)) {
667 if (smtc_de_busy)
668 deWaitForNotBusy();
669
670 switch (info->var.bits_per_pixel) {
671 case 8:
672 bg_col = image->bg_color;
673 fg_col = image->fg_color;
674 break;
675 case 16:
676 bg_col =
677 ((u32 *) (info->pseudo_palette))[image->bg_color];
678 fg_col =
679 ((u32 *) (info->pseudo_palette))[image->fg_color];
680 break;
681 case 32:
682 bg_col =
683 ((u32 *) (info->pseudo_palette))[image->bg_color];
684 fg_col =
685 ((u32 *) (info->pseudo_palette))[image->fg_color];
686 break;
687 }
688
689 deSystemMem2VideoMemMonoBlt(
690 image->data,
691 image->width / 8,
692 0,
693 p->BaseAddressInVRAM,
694 0,
695 0,
696 image->dx, image->dy,
697 image->width, image->height,
698 fg_col, bg_col,
699 0x0C);
700
701 } else
702 cfb_imageblit(info, image);
703}
704
705static struct fb_ops smtcfb_ops = {
706 .owner = THIS_MODULE,
707 .fb_setcolreg = smtc_setcolreg,
708 .fb_blank = smtcfb_blank,
709 .fb_fillrect = smtcfb_fillrect,
710 .fb_imageblit = smtcfb_imageblit,
711 .fb_copyarea = smtcfb_copyarea,
712#ifdef __BIG_ENDIAN
713 .fb_read = smtcfb_read,
714 .fb_write = smtcfb_write,
715#endif
716
717};
718
719void smtcfb_setmode(struct smtcfb_info *sfb)
720{
721 switch (sfb->fb.var.bits_per_pixel) {
722 case 32:
723 sfb->fb.fix.visual = FB_VISUAL_TRUECOLOR;
724 sfb->fb.fix.line_length = sfb->fb.var.xres * 4;
725 sfb->fb.var.red.length = 8;
726 sfb->fb.var.green.length = 8;
727 sfb->fb.var.blue.length = 8;
728 sfb->fb.var.red.offset = 16;
729 sfb->fb.var.green.offset = 8;
730 sfb->fb.var.blue.offset = 0;
731
732 break;
733 case 8:
734 sfb->fb.fix.visual = FB_VISUAL_PSEUDOCOLOR;
735 sfb->fb.fix.line_length = sfb->fb.var.xres;
736 sfb->fb.var.red.offset = 5;
737 sfb->fb.var.red.length = 3;
738 sfb->fb.var.green.offset = 2;
739 sfb->fb.var.green.length = 3;
740 sfb->fb.var.blue.offset = 0;
741 sfb->fb.var.blue.length = 2;
742 break;
743 case 24:
744 sfb->fb.fix.visual = FB_VISUAL_TRUECOLOR;
745 sfb->fb.fix.line_length = sfb->fb.var.xres * 3;
746 sfb->fb.var.red.length = 8;
747 sfb->fb.var.green.length = 8;
748 sfb->fb.var.blue.length = 8;
749
750 sfb->fb.var.red.offset = 16;
751 sfb->fb.var.green.offset = 8;
752 sfb->fb.var.blue.offset = 0;
753
754 break;
755 case 16:
756 default:
757 sfb->fb.fix.visual = FB_VISUAL_TRUECOLOR;
758 sfb->fb.fix.line_length = sfb->fb.var.xres * 2;
759
760 sfb->fb.var.red.length = 5;
761 sfb->fb.var.green.length = 6;
762 sfb->fb.var.blue.length = 5;
763
764 sfb->fb.var.red.offset = 11;
765 sfb->fb.var.green.offset = 5;
766 sfb->fb.var.blue.offset = 0;
767
768 break;
769 }
770
771 hw.width = sfb->fb.var.xres;
772 hw.height = sfb->fb.var.yres;
773 hw.hz = 60;
774 smtc_set_timing(sfb, &hw);
775 if (smtc_2Dacceleration) {
776 printk("2D acceleration enabled!\n");
777 /* Init smtc drawing engine */
778 deInit(sfb->fb.var.xres, sfb->fb.var.yres,
779 sfb->fb.var.bits_per_pixel);
780 }
781}
782
783/*
784 * Alloc struct smtcfb_info and assign the default value
785 */
786static struct smtcfb_info *smtc_alloc_fb_info(struct pci_dev *dev,
787 char *name)
788{
789 struct smtcfb_info *sfb;
790
791 sfb = kmalloc(sizeof(struct smtcfb_info), GFP_KERNEL);
792
793 if (!sfb)
794 return NULL;
795
796 memset(sfb, 0, sizeof(struct smtcfb_info));
797
798 sfb->currcon = -1;
799 sfb->dev = dev;
800
801 /*** Init sfb->fb with default value ***/
802 sfb->fb.flags = FBINFO_FLAG_DEFAULT;
803 sfb->fb.fbops = &smtcfb_ops;
804 sfb->fb.var = smtcfb_var;
805 sfb->fb.fix = smtcfb_fix;
806
807 strcpy(sfb->fb.fix.id, name);
808
809 sfb->fb.fix.type = FB_TYPE_PACKED_PIXELS;
810 sfb->fb.fix.type_aux = 0;
811 sfb->fb.fix.xpanstep = 0;
812 sfb->fb.fix.ypanstep = 0;
813 sfb->fb.fix.ywrapstep = 0;
814 sfb->fb.fix.accel = FB_ACCEL_SMI_LYNX;
815
816 sfb->fb.var.nonstd = 0;
817 sfb->fb.var.activate = FB_ACTIVATE_NOW;
818 sfb->fb.var.height = -1;
819 sfb->fb.var.width = -1;
820 /* text mode acceleration */
821 sfb->fb.var.accel_flags = FB_ACCELF_TEXT;
822 sfb->fb.var.vmode = FB_VMODE_NONINTERLACED;
823 sfb->fb.par = &hw;
824 sfb->fb.pseudo_palette = colreg;
825
826 return sfb;
827}
828
829/*
830 * Unmap in the memory mapped IO registers
831 */
832
833static void smtc_unmap_mmio(struct smtcfb_info *sfb)
834{
835 if (sfb && smtc_RegBaseAddress)
836 smtc_RegBaseAddress = NULL;
837}
838
839/*
840 * Map in the screen memory
841 */
842
843static int smtc_map_smem(struct smtcfb_info *sfb,
844 struct pci_dev *dev, u_long smem_len)
845{
846 if (sfb->fb.var.bits_per_pixel == 32) {
847#ifdef __BIG_ENDIAN
848 sfb->fb.fix.smem_start = pci_resource_start(dev, 0)
849 + 0x800000;
850#else
851 sfb->fb.fix.smem_start = pci_resource_start(dev, 0);
852#endif
853 } else {
854 sfb->fb.fix.smem_start = pci_resource_start(dev, 0);
855 }
856
857 sfb->fb.fix.smem_len = smem_len;
858
859 sfb->fb.screen_base = smtc_VRAMBaseAddress;
860
861 if (!sfb->fb.screen_base) {
862 printk(KERN_INFO "%s: unable to map screen memory\n",
863 sfb->fb.fix.id);
864 return -ENOMEM;
865 }
866
867 return 0;
868}
869
870/*
871 * Unmap in the screen memory
872 *
873 */
874static void smtc_unmap_smem(struct smtcfb_info *sfb)
875{
876 if (sfb && sfb->fb.screen_base) {
877 iounmap(sfb->fb.screen_base);
878 sfb->fb.screen_base = NULL;
879 }
880}
881
882/*
883 * We need to wake up the LynxEM+, and make sure its in linear memory mode.
884 */
885static inline void sm7xx_init_hw(void)
886{
887 outb_p(0x18, 0x3c4);
888 outb_p(0x11, 0x3c5);
889}
890
891static void smtc_free_fb_info(struct smtcfb_info *sfb)
892{
893 if (sfb) {
894 fb_alloc_cmap(&sfb->fb.cmap, 0, 0);
895 kfree(sfb);
896 }
897}
898
899/*
900 * sm712vga_setup - process command line options, get vga parameter
901 * @options: string of options
902 * Returns zero.
903 *
904 */
905static int __init __maybe_unused sm712vga_setup(char *options)
906{
907 int index;
908
909 if (!options || !*options) {
910 smdbg("\n No vga parameter\n");
911 return -EINVAL;
912 }
913
914 smtc_screen_info.lfb_width = 0;
915 smtc_screen_info.lfb_height = 0;
916 smtc_screen_info.lfb_depth = 0;
917
918 smdbg("\nsm712vga_setup = %s\n", options);
919
920 for (index = 0;
921 index < (sizeof(vesa_mode) / sizeof(struct vesa_mode_table));
922 index++) {
923 if (strstr(options, vesa_mode[index].mode_index)) {
924 smtc_screen_info.lfb_width = vesa_mode[index].lfb_width;
925 smtc_screen_info.lfb_height =
926 vesa_mode[index].lfb_height;
927 smtc_screen_info.lfb_depth = vesa_mode[index].lfb_depth;
928 return 0;
929 }
930 }
931
932 return -1;
933}
934__setup("vga=", sm712vga_setup);
935
936/* Jason (08/13/2009)
937 * Original init function changed to probe method to be used by pci_drv
938 * process used to detect chips replaced with kernel process in pci_drv
939 */
940static int __init smtcfb_pci_probe(struct pci_dev *pdev,
941 const struct pci_device_id *ent)
942{
943 struct smtcfb_info *sfb;
944 u_long smem_size = 0x00800000; /* default 8MB */
945 char name[16];
946 int err;
947 unsigned long pFramebufferPhysical;
948
949 printk(KERN_INFO
950 "Silicon Motion display driver " SMTC_LINUX_FB_VERSION "\n");
951
952 err = pci_enable_device(pdev); /* enable SMTC chip */
953
954 if (err)
955 return err;
956 err = -ENOMEM;
957
958 hw.chipID = ent->device;
959 sprintf(name, "sm%Xfb", hw.chipID);
960
961 sfb = smtc_alloc_fb_info(pdev, name);
962
963 if (!sfb)
964 goto failed;
965 /* Jason (08/13/2009)
966 * Store fb_info to be further used when suspending and resuming
967 */
968 pci_set_drvdata(pdev, sfb);
969
970 sm7xx_init_hw();
971
972 /*get mode parameter from smtc_screen_info */
973 if (smtc_screen_info.lfb_width != 0) {
974 sfb->fb.var.xres = smtc_screen_info.lfb_width;
975 sfb->fb.var.yres = smtc_screen_info.lfb_height;
976 sfb->fb.var.bits_per_pixel = smtc_screen_info.lfb_depth;
977 } else {
978 /* default resolution 1024x600 16bit mode */
979 sfb->fb.var.xres = SCREEN_X_RES;
980 sfb->fb.var.yres = SCREEN_Y_RES;
981 sfb->fb.var.bits_per_pixel = SCREEN_BPP;
982 }
983
984#ifdef __BIG_ENDIAN
985 if (sfb->fb.var.bits_per_pixel == 24)
986 sfb->fb.var.bits_per_pixel = (smtc_screen_info.lfb_depth = 32);
987#endif
988 /* Map address and memory detection */
989 pFramebufferPhysical = pci_resource_start(pdev, 0);
990 pci_read_config_byte(pdev, PCI_REVISION_ID, &hw.chipRevID);
991
992 switch (hw.chipID) {
993 case 0x710:
994 case 0x712:
995 sfb->fb.fix.mmio_start = pFramebufferPhysical + 0x00400000;
996 sfb->fb.fix.mmio_len = 0x00400000;
997 smem_size = SM712_VIDEOMEMORYSIZE;
998#ifdef __BIG_ENDIAN
999 hw.m_pLFB = (smtc_VRAMBaseAddress =
1000 ioremap(pFramebufferPhysical, 0x00c00000));
1001#else
1002 hw.m_pLFB = (smtc_VRAMBaseAddress =
1003 ioremap(pFramebufferPhysical, 0x00800000));
1004#endif
1005 hw.m_pMMIO = (smtc_RegBaseAddress =
1006 smtc_VRAMBaseAddress + 0x00700000);
1007 smtc_2DBaseAddress = (hw.m_pDPR =
1008 smtc_VRAMBaseAddress + 0x00408000);
1009 smtc_2Ddataport = smtc_VRAMBaseAddress + DE_DATA_PORT_712;
1010 hw.m_pVPR = hw.m_pLFB + 0x0040c000;
1011#ifdef __BIG_ENDIAN
1012 if (sfb->fb.var.bits_per_pixel == 32) {
1013 smtc_VRAMBaseAddress += 0x800000;
1014 hw.m_pLFB += 0x800000;
1015 printk(KERN_INFO
1016 "\nsmtc_VRAMBaseAddress=%p hw.m_pLFB=%p\n",
1017 smtc_VRAMBaseAddress, hw.m_pLFB);
1018 }
1019#endif
1020 if (!smtc_RegBaseAddress) {
1021 printk(KERN_INFO
1022 "%s: unable to map memory mapped IO\n",
1023 sfb->fb.fix.id);
1024 return -ENOMEM;
1025 }
1026
1027 /* set MCLK = 14.31818 * (0x16 / 0x2) */
1028 smtc_seqw(0x6a, 0x16);
1029 smtc_seqw(0x6b, 0x02);
1030 smtc_seqw(0x62, 0x3e);
1031 /* enable PCI burst */
1032 smtc_seqw(0x17, 0x20);
1033 /* enable word swap */
1034#ifdef __BIG_ENDIAN
1035 if (sfb->fb.var.bits_per_pixel == 32)
1036 smtc_seqw(0x17, 0x30);
1037#endif
1038#ifdef CONFIG_FB_SM7XX_ACCEL
1039 smtc_2Dacceleration = 1;
1040#endif
1041 break;
1042 case 0x720:
1043 sfb->fb.fix.mmio_start = pFramebufferPhysical;
1044 sfb->fb.fix.mmio_len = 0x00200000;
1045 smem_size = SM722_VIDEOMEMORYSIZE;
1046 smtc_2DBaseAddress = (hw.m_pDPR =
1047 ioremap(pFramebufferPhysical, 0x00a00000));
1048 hw.m_pLFB = (smtc_VRAMBaseAddress =
1049 smtc_2DBaseAddress + 0x00200000);
1050 hw.m_pMMIO = (smtc_RegBaseAddress =
1051 smtc_2DBaseAddress + 0x000c0000);
1052 smtc_2Ddataport = smtc_2DBaseAddress + DE_DATA_PORT_722;
1053 hw.m_pVPR = smtc_2DBaseAddress + 0x800;
1054
1055 smtc_seqw(0x62, 0xff);
1056 smtc_seqw(0x6a, 0x0d);
1057 smtc_seqw(0x6b, 0x02);
1058 smtc_2Dacceleration = 0;
1059 break;
1060 default:
1061 printk(KERN_INFO
1062 "No valid Silicon Motion display chip was detected!\n");
1063
1064 smtc_free_fb_info(sfb);
1065 return err;
1066 }
1067
1068 /* can support 32 bpp */
1069 if (15 == sfb->fb.var.bits_per_pixel)
1070 sfb->fb.var.bits_per_pixel = 16;
1071
1072 sfb->fb.var.xres_virtual = sfb->fb.var.xres;
1073 sfb->fb.var.yres_virtual = sfb->fb.var.yres;
1074 err = smtc_map_smem(sfb, pdev, smem_size);
1075 if (err)
1076 goto failed;
1077
1078 smtcfb_setmode(sfb);
1079 /* Primary display starting from 0 postion */
1080 hw.BaseAddressInVRAM = 0;
1081 sfb->fb.par = &hw;
1082
1083 err = register_framebuffer(&sfb->fb);
1084 if (err < 0)
1085 goto failed;
1086
1087 printk(KERN_INFO "Silicon Motion SM%X Rev%X primary display mode"
1088 "%dx%d-%d Init Complete.\n", hw.chipID, hw.chipRevID,
1089 sfb->fb.var.xres, sfb->fb.var.yres,
1090 sfb->fb.var.bits_per_pixel);
1091
1092 return 0;
1093
1094 failed:
1095 printk(KERN_INFO "Silicon Motion, Inc. primary display init fail\n");
1096
1097 smtc_unmap_smem(sfb);
1098 smtc_unmap_mmio(sfb);
1099 smtc_free_fb_info(sfb);
1100
1101 return err;
1102}
1103
1104
1105/* Jason (08/11/2009) PCI_DRV wrapper essential structs */
1106static struct pci_device_id smtcfb_pci_table[] = {
1107 {0x126f, 0x710, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1108 {0x126f, 0x712, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1109 {0x126f, 0x720, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1110 {0,}
1111};
1112
1113
1114/* Jason (08/14/2009)
1115 * do some clean up when the driver module is removed
1116 */
1117static void __devexit smtcfb_pci_remove(struct pci_dev *pdev)
1118{
1119 struct smtcfb_info *sfb;
1120
1121 sfb = pci_get_drvdata(pdev);
1122 pci_set_drvdata(pdev, NULL);
1123 smtc_unmap_smem(sfb);
1124 smtc_unmap_mmio(sfb);
1125 unregister_framebuffer(&sfb->fb);
1126 smtc_free_fb_info(sfb);
1127}
1128
1129/* Jason (08/14/2009)
1130 * suspend function, called when the suspend event is triggered
1131 */
1132static int __maybe_unused smtcfb_suspend(struct pci_dev *pdev, pm_message_t msg)
1133{
1134 struct smtcfb_info *sfb;
1135 int retv;
1136
1137 sfb = pci_get_drvdata(pdev);
1138
1139 /* set the hw in sleep mode use externel clock and self memory refresh
1140 * so that we can turn off internal PLLs later on
1141 */
1142 smtc_seqw(0x20, (smtc_seqr(0x20) | 0xc0));
1143 smtc_seqw(0x69, (smtc_seqr(0x69) & 0xf7));
1144
1145 switch (msg.event) {
1146 case PM_EVENT_FREEZE:
1147 case PM_EVENT_PRETHAW:
1148 pdev->dev.power.power_state = msg;
1149 return 0;
1150 }
1151
1152 /* when doing suspend, call fb apis and pci apis */
1153 if (msg.event == PM_EVENT_SUSPEND) {
1154 acquire_console_sem();
1155 fb_set_suspend(&sfb->fb, 1);
1156 release_console_sem();
1157 retv = pci_save_state(pdev);
1158 pci_disable_device(pdev);
1159 retv = pci_choose_state(pdev, msg);
1160 retv = pci_set_power_state(pdev, retv);
1161 }
1162
1163 pdev->dev.power.power_state = msg;
1164
1165 /* additionaly turn off all function blocks including internal PLLs */
1166 smtc_seqw(0x21, 0xff);
1167
1168 return 0;
1169}
1170
1171static int __maybe_unused smtcfb_resume(struct pci_dev *pdev)
1172{
1173 struct smtcfb_info *sfb;
1174 int retv;
1175
1176 sfb = pci_get_drvdata(pdev);
1177
1178 /* when resuming, restore pci data and fb cursor */
1179 if (pdev->dev.power.power_state.event != PM_EVENT_FREEZE) {
1180 retv = pci_set_power_state(pdev, PCI_D0);
1181 retv = pci_restore_state(pdev);
1182 if (pci_enable_device(pdev))
1183 return -1;
1184 pci_set_master(pdev);
1185 }
1186
1187 /* reinit hardware */
1188 sm7xx_init_hw();
1189 switch (hw.chipID) {
1190 case 0x710:
1191 case 0x712:
1192 /* set MCLK = 14.31818 * (0x16 / 0x2) */
1193 smtc_seqw(0x6a, 0x16);
1194 smtc_seqw(0x6b, 0x02);
1195 smtc_seqw(0x62, 0x3e);
1196 /* enable PCI burst */
1197 smtc_seqw(0x17, 0x20);
1198#ifdef __BIG_ENDIAN
1199 if (sfb->fb.var.bits_per_pixel == 32)
1200 smtc_seqw(0x17, 0x30);
1201#endif
1202 break;
1203 case 0x720:
1204 smtc_seqw(0x62, 0xff);
1205 smtc_seqw(0x6a, 0x0d);
1206 smtc_seqw(0x6b, 0x02);
1207 break;
1208 }
1209
1210 smtc_seqw(0x34, (smtc_seqr(0x34) | 0xc0));
1211 smtc_seqw(0x33, ((smtc_seqr(0x33) | 0x08) & 0xfb));
1212
1213 smtcfb_setmode(sfb);
1214
1215 acquire_console_sem();
1216 fb_set_suspend(&sfb->fb, 0);
1217 release_console_sem();
1218
1219 return 0;
1220}
1221
1222/* Jason (08/13/2009)
1223 * pci_driver struct used to wrap the original driver
1224 * so that it can be registered into the kernel and
1225 * the proper method would be called when suspending and resuming
1226 */
1227static struct pci_driver smtcfb_driver = {
1228 .name = "smtcfb",
1229 .id_table = smtcfb_pci_table,
1230 .probe = smtcfb_pci_probe,
1231 .remove = __devexit_p(smtcfb_pci_remove),
1232#ifdef CONFIG_PM
1233 .suspend = smtcfb_suspend,
1234 .resume = smtcfb_resume,
1235#endif
1236};
1237
1238static int __init smtcfb_init(void)
1239{
1240 return pci_register_driver(&smtcfb_driver);
1241}
1242
1243static void __exit smtcfb_exit(void)
1244{
1245 pci_unregister_driver(&smtcfb_driver);
1246}
1247
1248module_init(smtcfb_init);
1249module_exit(smtcfb_exit);
1250
1251MODULE_AUTHOR("Siliconmotion ");
1252MODULE_DESCRIPTION("Framebuffer driver for SMI Graphic Cards");
1253MODULE_LICENSE("GPL");
diff --git a/drivers/staging/sm7xx/smtcfb.h b/drivers/staging/sm7xx/smtcfb.h
new file mode 100644
index 000000000000..7f2c34138215
--- /dev/null
+++ b/drivers/staging/sm7xx/smtcfb.h
@@ -0,0 +1,793 @@
1/*
2 * Silicon Motion SM712 frame buffer device
3 *
4 * Copyright (C) 2006 Silicon Motion Technology Corp.
5 * Authors: Ge Wang, gewang@siliconmotion.com
6 * Boyod boyod.yang@siliconmotion.com.cn
7 *
8 * Copyright (C) 2009 Lemote, Inc.
9 * Author: Wu Zhangjin, wuzj@lemote.com
10 *
11 * This file is subject to the terms and conditions of the GNU General Public
12 * License. See the file COPYING in the main directory of this archive for
13 * more details.
14 */
15
16#define SMTC_LINUX_FB_VERSION "version 0.11.2619.21.01 July 27, 2008"
17
18#define NR_PALETTE 256
19#define NR_RGB 2
20
21#define FB_ACCEL_SMI_LYNX 88
22
23#ifdef __BIG_ENDIAN
24#define PC_VGA 0
25#else
26#define PC_VGA 1
27#endif
28
29#define SCREEN_X_RES 1024
30#define SCREEN_Y_RES 600
31#define SCREEN_BPP 16
32
33#ifndef FIELD_OFFSET
34#define FIELD_OFSFET(type, field) \
35 ((unsigned long) (PUCHAR) & (((type *)0)->field))
36#endif
37
38/*Assume SM712 graphics chip has 4MB VRAM */
39#define SM712_VIDEOMEMORYSIZE 0x00400000
40/*Assume SM722 graphics chip has 8MB VRAM */
41#define SM722_VIDEOMEMORYSIZE 0x00800000
42
43#define dac_reg (0x3c8)
44#define dac_val (0x3c9)
45
46extern char *smtc_RegBaseAddress;
47#define smtc_mmiowb(dat, reg) writeb(dat, smtc_RegBaseAddress + reg)
48#define smtc_mmioww(dat, reg) writew(dat, smtc_RegBaseAddress + reg)
49#define smtc_mmiowl(dat, reg) writel(dat, smtc_RegBaseAddress + reg)
50
51#define smtc_mmiorb(reg) readb(smtc_RegBaseAddress + reg)
52#define smtc_mmiorw(reg) readw(smtc_RegBaseAddress + reg)
53#define smtc_mmiorl(reg) readl(smtc_RegBaseAddress + reg)
54
55#define SIZE_SR00_SR04 (0x04 - 0x00 + 1)
56#define SIZE_SR10_SR24 (0x24 - 0x10 + 1)
57#define SIZE_SR30_SR75 (0x75 - 0x30 + 1)
58#define SIZE_SR80_SR93 (0x93 - 0x80 + 1)
59#define SIZE_SRA0_SRAF (0xAF - 0xA0 + 1)
60#define SIZE_GR00_GR08 (0x08 - 0x00 + 1)
61#define SIZE_AR00_AR14 (0x14 - 0x00 + 1)
62#define SIZE_CR00_CR18 (0x18 - 0x00 + 1)
63#define SIZE_CR30_CR4D (0x4D - 0x30 + 1)
64#define SIZE_CR90_CRA7 (0xA7 - 0x90 + 1)
65#define SIZE_VPR (0x6C + 1)
66#define SIZE_DPR (0x44 + 1)
67
68static inline void smtc_crtcw(int reg, int val)
69{
70 smtc_mmiowb(reg, 0x3d4);
71 smtc_mmiowb(val, 0x3d5);
72}
73
74static inline unsigned int smtc_crtcr(int reg)
75{
76 smtc_mmiowb(reg, 0x3d4);
77 return smtc_mmiorb(0x3d5);
78}
79
80static inline void smtc_grphw(int reg, int val)
81{
82 smtc_mmiowb(reg, 0x3ce);
83 smtc_mmiowb(val, 0x3cf);
84}
85
86static inline unsigned int smtc_grphr(int reg)
87{
88 smtc_mmiowb(reg, 0x3ce);
89 return smtc_mmiorb(0x3cf);
90}
91
92static inline void smtc_attrw(int reg, int val)
93{
94 smtc_mmiorb(0x3da);
95 smtc_mmiowb(reg, 0x3c0);
96 smtc_mmiorb(0x3c1);
97 smtc_mmiowb(val, 0x3c0);
98}
99
100static inline void smtc_seqw(int reg, int val)
101{
102 smtc_mmiowb(reg, 0x3c4);
103 smtc_mmiowb(val, 0x3c5);
104}
105
106static inline unsigned int smtc_seqr(int reg)
107{
108 smtc_mmiowb(reg, 0x3c4);
109 return smtc_mmiorb(0x3c5);
110}
111
112/* The next structure holds all information relevant for a specific video mode.
113 */
114
115struct ModeInit {
116 int mmSizeX;
117 int mmSizeY;
118 int bpp;
119 int hz;
120 unsigned char Init_MISC;
121 unsigned char Init_SR00_SR04[SIZE_SR00_SR04];
122 unsigned char Init_SR10_SR24[SIZE_SR10_SR24];
123 unsigned char Init_SR30_SR75[SIZE_SR30_SR75];
124 unsigned char Init_SR80_SR93[SIZE_SR80_SR93];
125 unsigned char Init_SRA0_SRAF[SIZE_SRA0_SRAF];
126 unsigned char Init_GR00_GR08[SIZE_GR00_GR08];
127 unsigned char Init_AR00_AR14[SIZE_AR00_AR14];
128 unsigned char Init_CR00_CR18[SIZE_CR00_CR18];
129 unsigned char Init_CR30_CR4D[SIZE_CR30_CR4D];
130 unsigned char Init_CR90_CRA7[SIZE_CR90_CRA7];
131};
132
133/**********************************************************************
134 SM712 Mode table.
135 **********************************************************************/
136struct ModeInit VGAMode[] = {
137 {
138 /* mode#0: 640 x 480 16Bpp 60Hz */
139 640, 480, 16, 60,
140 /* Init_MISC */
141 0xE3,
142 { /* Init_SR0_SR4 */
143 0x03, 0x01, 0x0F, 0x00, 0x0E,
144 },
145 { /* Init_SR10_SR24 */
146 0xFF, 0xBE, 0xEF, 0xFF, 0x00, 0x0E, 0x17, 0x2C,
147 0x99, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
148 0xC4, 0x30, 0x02, 0x01, 0x01,
149 },
150 { /* Init_SR30_SR75 */
151 0x32, 0x03, 0xA0, 0x09, 0xC0, 0x32, 0x32, 0x32,
152 0x32, 0x32, 0x32, 0x32, 0x00, 0x00, 0x03, 0xFF,
153 0x00, 0xFC, 0x00, 0x00, 0x20, 0x18, 0x00, 0xFC,
154 0x20, 0x0C, 0x44, 0x20, 0x00, 0x32, 0x32, 0x32,
155 0x04, 0x24, 0x63, 0x4F, 0x52, 0x0B, 0xDF, 0xEA,
156 0x04, 0x50, 0x19, 0x32, 0x32, 0x00, 0x00, 0x32,
157 0x01, 0x80, 0x7E, 0x1A, 0x1A, 0x00, 0x00, 0x00,
158 0x50, 0x03, 0x74, 0x14, 0x07, 0x82, 0x07, 0x04,
159 0x00, 0x45, 0x30, 0x30, 0x40, 0x30,
160 },
161 { /* Init_SR80_SR93 */
162 0xFF, 0x07, 0x00, 0x6F, 0x7F, 0x7F, 0xFF, 0x32,
163 0xF7, 0x00, 0x00, 0x00, 0xEF, 0xFF, 0x32, 0x32,
164 0x00, 0x00, 0x00, 0x00,
165 },
166 { /* Init_SRA0_SRAF */
167 0x00, 0xFF, 0xBF, 0xFF, 0xFF, 0xED, 0xED, 0xED,
168 0x7B, 0xFF, 0xFF, 0xFF, 0xBF, 0xEF, 0xFF, 0xDF,
169 },
170 { /* Init_GR00_GR08 */
171 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F,
172 0xFF,
173 },
174 { /* Init_AR00_AR14 */
175 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
176 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
177 0x41, 0x00, 0x0F, 0x00, 0x00,
178 },
179 { /* Init_CR00_CR18 */
180 0x5F, 0x4F, 0x4F, 0x00, 0x53, 0x1F, 0x0B, 0x3E,
181 0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
182 0xEA, 0x0C, 0xDF, 0x50, 0x40, 0xDF, 0x00, 0xE3,
183 0xFF,
184 },
185 { /* Init_CR30_CR4D */
186 0x00, 0x00, 0x00, 0x00, 0x00, 0x55, 0x03, 0x20,
187 0x00, 0x00, 0x00, 0x40, 0x00, 0xE7, 0xFF, 0xFD,
188 0x5F, 0x4F, 0x00, 0x54, 0x00, 0x0B, 0xDF, 0x00,
189 0xEA, 0x0C, 0x2E, 0x00, 0x4F, 0xDF,
190 },
191 { /* Init_CR90_CRA7 */
192 0x56, 0xDD, 0x5E, 0xEA, 0x87, 0x44, 0x8F, 0x55,
193 0x0A, 0x8F, 0x55, 0x0A, 0x00, 0x00, 0x18, 0x00,
194 0x11, 0x10, 0x0B, 0x0A, 0x0A, 0x0A, 0x0A, 0x00,
195 },
196 },
197 {
198 /* mode#1: 640 x 480 24Bpp 60Hz */
199 640, 480, 24, 60,
200 /* Init_MISC */
201 0xE3,
202 { /* Init_SR0_SR4 */
203 0x03, 0x01, 0x0F, 0x00, 0x0E,
204 },
205 { /* Init_SR10_SR24 */
206 0xFF, 0xBE, 0xEF, 0xFF, 0x00, 0x0E, 0x17, 0x2C,
207 0x99, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
208 0xC4, 0x30, 0x02, 0x01, 0x01,
209 },
210 { /* Init_SR30_SR75 */
211 0x32, 0x03, 0xA0, 0x09, 0xC0, 0x32, 0x32, 0x32,
212 0x32, 0x32, 0x32, 0x32, 0x00, 0x00, 0x03, 0xFF,
213 0x00, 0xFC, 0x00, 0x00, 0x20, 0x18, 0x00, 0xFC,
214 0x20, 0x0C, 0x44, 0x20, 0x00, 0x32, 0x32, 0x32,
215 0x04, 0x24, 0x63, 0x4F, 0x52, 0x0B, 0xDF, 0xEA,
216 0x04, 0x50, 0x19, 0x32, 0x32, 0x00, 0x00, 0x32,
217 0x01, 0x80, 0x7E, 0x1A, 0x1A, 0x00, 0x00, 0x00,
218 0x50, 0x03, 0x74, 0x14, 0x07, 0x82, 0x07, 0x04,
219 0x00, 0x45, 0x30, 0x30, 0x40, 0x30,
220 },
221 { /* Init_SR80_SR93 */
222 0xFF, 0x07, 0x00, 0x6F, 0x7F, 0x7F, 0xFF, 0x32,
223 0xF7, 0x00, 0x00, 0x00, 0xEF, 0xFF, 0x32, 0x32,
224 0x00, 0x00, 0x00, 0x00,
225 },
226 { /* Init_SRA0_SRAF */
227 0x00, 0xFF, 0xBF, 0xFF, 0xFF, 0xED, 0xED, 0xED,
228 0x7B, 0xFF, 0xFF, 0xFF, 0xBF, 0xEF, 0xFF, 0xDF,
229 },
230 { /* Init_GR00_GR08 */
231 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F,
232 0xFF,
233 },
234 { /* Init_AR00_AR14 */
235 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
236 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
237 0x41, 0x00, 0x0F, 0x00, 0x00,
238 },
239 { /* Init_CR00_CR18 */
240 0x5F, 0x4F, 0x4F, 0x00, 0x53, 0x1F, 0x0B, 0x3E,
241 0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
242 0xEA, 0x0C, 0xDF, 0x50, 0x40, 0xDF, 0x00, 0xE3,
243 0xFF,
244 },
245 { /* Init_CR30_CR4D */
246 0x00, 0x00, 0x00, 0x00, 0x00, 0x55, 0x03, 0x20,
247 0x00, 0x00, 0x00, 0x40, 0x00, 0xE7, 0xFF, 0xFD,
248 0x5F, 0x4F, 0x00, 0x54, 0x00, 0x0B, 0xDF, 0x00,
249 0xEA, 0x0C, 0x2E, 0x00, 0x4F, 0xDF,
250 },
251 { /* Init_CR90_CRA7 */
252 0x56, 0xDD, 0x5E, 0xEA, 0x87, 0x44, 0x8F, 0x55,
253 0x0A, 0x8F, 0x55, 0x0A, 0x00, 0x00, 0x18, 0x00,
254 0x11, 0x10, 0x0B, 0x0A, 0x0A, 0x0A, 0x0A, 0x00,
255 },
256 },
257 {
258 /* mode#0: 640 x 480 32Bpp 60Hz */
259 640, 480, 32, 60,
260 /* Init_MISC */
261 0xE3,
262 { /* Init_SR0_SR4 */
263 0x03, 0x01, 0x0F, 0x00, 0x0E,
264 },
265 { /* Init_SR10_SR24 */
266 0xFF, 0xBE, 0xEF, 0xFF, 0x00, 0x0E, 0x17, 0x2C,
267 0x99, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
268 0xC4, 0x30, 0x02, 0x01, 0x01,
269 },
270 { /* Init_SR30_SR75 */
271 0x32, 0x03, 0xA0, 0x09, 0xC0, 0x32, 0x32, 0x32,
272 0x32, 0x32, 0x32, 0x32, 0x00, 0x00, 0x03, 0xFF,
273 0x00, 0xFC, 0x00, 0x00, 0x20, 0x18, 0x00, 0xFC,
274 0x20, 0x0C, 0x44, 0x20, 0x00, 0x32, 0x32, 0x32,
275 0x04, 0x24, 0x63, 0x4F, 0x52, 0x0B, 0xDF, 0xEA,
276 0x04, 0x50, 0x19, 0x32, 0x32, 0x00, 0x00, 0x32,
277 0x01, 0x80, 0x7E, 0x1A, 0x1A, 0x00, 0x00, 0x00,
278 0x50, 0x03, 0x74, 0x14, 0x07, 0x82, 0x07, 0x04,
279 0x00, 0x45, 0x30, 0x30, 0x40, 0x30,
280 },
281 { /* Init_SR80_SR93 */
282 0xFF, 0x07, 0x00, 0x6F, 0x7F, 0x7F, 0xFF, 0x32,
283 0xF7, 0x00, 0x00, 0x00, 0xEF, 0xFF, 0x32, 0x32,
284 0x00, 0x00, 0x00, 0x00,
285 },
286 { /* Init_SRA0_SRAF */
287 0x00, 0xFF, 0xBF, 0xFF, 0xFF, 0xED, 0xED, 0xED,
288 0x7B, 0xFF, 0xFF, 0xFF, 0xBF, 0xEF, 0xFF, 0xDF,
289 },
290 { /* Init_GR00_GR08 */
291 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F,
292 0xFF,
293 },
294 { /* Init_AR00_AR14 */
295 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
296 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
297 0x41, 0x00, 0x0F, 0x00, 0x00,
298 },
299 { /* Init_CR00_CR18 */
300 0x5F, 0x4F, 0x4F, 0x00, 0x53, 0x1F, 0x0B, 0x3E,
301 0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
302 0xEA, 0x0C, 0xDF, 0x50, 0x40, 0xDF, 0x00, 0xE3,
303 0xFF,
304 },
305 { /* Init_CR30_CR4D */
306 0x00, 0x00, 0x00, 0x00, 0x00, 0x55, 0x03, 0x20,
307 0x00, 0x00, 0x00, 0x40, 0x00, 0xE7, 0xFF, 0xFD,
308 0x5F, 0x4F, 0x00, 0x54, 0x00, 0x0B, 0xDF, 0x00,
309 0xEA, 0x0C, 0x2E, 0x00, 0x4F, 0xDF,
310 },
311 { /* Init_CR90_CRA7 */
312 0x56, 0xDD, 0x5E, 0xEA, 0x87, 0x44, 0x8F, 0x55,
313 0x0A, 0x8F, 0x55, 0x0A, 0x00, 0x00, 0x18, 0x00,
314 0x11, 0x10, 0x0B, 0x0A, 0x0A, 0x0A, 0x0A, 0x00,
315 },
316 },
317
318 { /* mode#2: 800 x 600 16Bpp 60Hz */
319 800, 600, 16, 60,
320 /* Init_MISC */
321 0x2B,
322 { /* Init_SR0_SR4 */
323 0x03, 0x01, 0x0F, 0x03, 0x0E,
324 },
325 { /* Init_SR10_SR24 */
326 0xFF, 0xBE, 0xEE, 0xFF, 0x00, 0x0E, 0x17, 0x2C,
327 0x99, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
328 0xC4, 0x30, 0x02, 0x01, 0x01,
329 },
330 { /* Init_SR30_SR75 */
331 0x34, 0x03, 0x20, 0x09, 0xC0, 0x24, 0x24, 0x24,
332 0x24, 0x24, 0x24, 0x24, 0x00, 0x00, 0x03, 0xFF,
333 0x00, 0xFC, 0x00, 0x00, 0x20, 0x38, 0x00, 0xFC,
334 0x20, 0x0C, 0x44, 0x20, 0x00, 0x24, 0x24, 0x24,
335 0x04, 0x48, 0x83, 0x63, 0x68, 0x72, 0x57, 0x58,
336 0x04, 0x55, 0x59, 0x24, 0x24, 0x00, 0x00, 0x24,
337 0x01, 0x80, 0x7A, 0x1A, 0x1A, 0x00, 0x00, 0x00,
338 0x50, 0x03, 0x74, 0x14, 0x1C, 0x85, 0x35, 0x13,
339 0x02, 0x45, 0x30, 0x35, 0x40, 0x20,
340 },
341 { /* Init_SR80_SR93 */
342 0x00, 0x00, 0x00, 0x6F, 0x7F, 0x7F, 0xFF, 0x24,
343 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0x24, 0x24,
344 0x00, 0x00, 0x00, 0x00,
345 },
346 { /* Init_SRA0_SRAF */
347 0x00, 0xFF, 0xBF, 0xFF, 0xFF, 0xED, 0xED, 0xED,
348 0x7B, 0xFF, 0xFF, 0xFF, 0xBF, 0xEF, 0xBF, 0xDF,
349 },
350 { /* Init_GR00_GR08 */
351 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F,
352 0xFF,
353 },
354 { /* Init_AR00_AR14 */
355 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
356 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
357 0x41, 0x00, 0x0F, 0x00, 0x00,
358 },
359 { /* Init_CR00_CR18 */
360 0x7F, 0x63, 0x63, 0x00, 0x68, 0x18, 0x72, 0xF0,
361 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
362 0x58, 0x0C, 0x57, 0x64, 0x40, 0x57, 0x00, 0xE3,
363 0xFF,
364 },
365 { /* Init_CR30_CR4D */
366 0x00, 0x00, 0x00, 0x00, 0x00, 0x33, 0x03, 0x20,
367 0x00, 0x00, 0x00, 0x40, 0x00, 0xE7, 0xBF, 0xFD,
368 0x7F, 0x63, 0x00, 0x69, 0x18, 0x72, 0x57, 0x00,
369 0x58, 0x0C, 0xE0, 0x20, 0x63, 0x57,
370 },
371 { /* Init_CR90_CRA7 */
372 0x56, 0x4B, 0x5E, 0x55, 0x86, 0x9D, 0x8E, 0xAA,
373 0xDB, 0x2A, 0xDF, 0x33, 0x00, 0x00, 0x18, 0x00,
374 0x20, 0x1F, 0x1A, 0x19, 0x0F, 0x0F, 0x0F, 0x00,
375 },
376 },
377 { /* mode#3: 800 x 600 24Bpp 60Hz */
378 800, 600, 24, 60,
379 0x2B,
380 { /* Init_SR0_SR4 */
381 0x03, 0x01, 0x0F, 0x03, 0x0E,
382 },
383 { /* Init_SR10_SR24 */
384 0xFF, 0xBE, 0xEE, 0xFF, 0x00, 0x0E, 0x17, 0x2C,
385 0x99, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
386 0xC4, 0x30, 0x02, 0x01, 0x01,
387 },
388 { /* Init_SR30_SR75 */
389 0x36, 0x03, 0x20, 0x09, 0xC0, 0x36, 0x36, 0x36,
390 0x36, 0x36, 0x36, 0x36, 0x00, 0x00, 0x03, 0xFF,
391 0x00, 0xFC, 0x00, 0x00, 0x20, 0x18, 0x00, 0xFC,
392 0x20, 0x0C, 0x44, 0x20, 0x00, 0x36, 0x36, 0x36,
393 0x04, 0x48, 0x83, 0x63, 0x68, 0x72, 0x57, 0x58,
394 0x04, 0x55, 0x59, 0x36, 0x36, 0x00, 0x00, 0x36,
395 0x01, 0x80, 0x7E, 0x1A, 0x1A, 0x00, 0x00, 0x00,
396 0x50, 0x03, 0x74, 0x14, 0x1C, 0x85, 0x35, 0x13,
397 0x02, 0x45, 0x30, 0x30, 0x40, 0x20,
398 },
399 { /* Init_SR80_SR93 */
400 0xFF, 0x07, 0x00, 0x6F, 0x7F, 0x7F, 0xFF, 0x36,
401 0xF7, 0x00, 0x00, 0x00, 0xEF, 0xFF, 0x36, 0x36,
402 0x00, 0x00, 0x00, 0x00,
403 },
404 { /* Init_SRA0_SRAF */
405 0x00, 0xFF, 0xBF, 0xFF, 0xFF, 0xED, 0xED, 0xED,
406 0x7B, 0xFF, 0xFF, 0xFF, 0xBF, 0xEF, 0xBF, 0xDF,
407 },
408 { /* Init_GR00_GR08 */
409 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F,
410 0xFF,
411 },
412 { /* Init_AR00_AR14 */
413 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
414 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
415 0x41, 0x00, 0x0F, 0x00, 0x00,
416 },
417 { /* Init_CR00_CR18 */
418 0x7F, 0x63, 0x63, 0x00, 0x68, 0x18, 0x72, 0xF0,
419 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
420 0x58, 0x0C, 0x57, 0x64, 0x40, 0x57, 0x00, 0xE3,
421 0xFF,
422 },
423 { /* Init_CR30_CR4D */
424 0x00, 0x00, 0x00, 0x00, 0x00, 0x33, 0x03, 0x20,
425 0x00, 0x00, 0x00, 0x40, 0x00, 0xE7, 0xBF, 0xFD,
426 0x7F, 0x63, 0x00, 0x69, 0x18, 0x72, 0x57, 0x00,
427 0x58, 0x0C, 0xE0, 0x20, 0x63, 0x57,
428 },
429 { /* Init_CR90_CRA7 */
430 0x56, 0x4B, 0x5E, 0x55, 0x86, 0x9D, 0x8E, 0xAA,
431 0xDB, 0x2A, 0xDF, 0x33, 0x00, 0x00, 0x18, 0x00,
432 0x20, 0x1F, 0x1A, 0x19, 0x0F, 0x0F, 0x0F, 0x00,
433 },
434 },
435 { /* mode#7: 800 x 600 32Bpp 60Hz */
436 800, 600, 32, 60,
437 /* Init_MISC */
438 0x2B,
439 { /* Init_SR0_SR4 */
440 0x03, 0x01, 0x0F, 0x03, 0x0E,
441 },
442 { /* Init_SR10_SR24 */
443 0xFF, 0xBE, 0xEE, 0xFF, 0x00, 0x0E, 0x17, 0x2C,
444 0x99, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
445 0xC4, 0x30, 0x02, 0x01, 0x01,
446 },
447 { /* Init_SR30_SR75 */
448 0x34, 0x03, 0x20, 0x09, 0xC0, 0x24, 0x24, 0x24,
449 0x24, 0x24, 0x24, 0x24, 0x00, 0x00, 0x03, 0xFF,
450 0x00, 0xFC, 0x00, 0x00, 0x20, 0x38, 0x00, 0xFC,
451 0x20, 0x0C, 0x44, 0x20, 0x00, 0x24, 0x24, 0x24,
452 0x04, 0x48, 0x83, 0x63, 0x68, 0x72, 0x57, 0x58,
453 0x04, 0x55, 0x59, 0x24, 0x24, 0x00, 0x00, 0x24,
454 0x01, 0x80, 0x7A, 0x1A, 0x1A, 0x00, 0x00, 0x00,
455 0x50, 0x03, 0x74, 0x14, 0x1C, 0x85, 0x35, 0x13,
456 0x02, 0x45, 0x30, 0x35, 0x40, 0x20,
457 },
458 { /* Init_SR80_SR93 */
459 0x00, 0x00, 0x00, 0x6F, 0x7F, 0x7F, 0xFF, 0x24,
460 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0x24, 0x24,
461 0x00, 0x00, 0x00, 0x00,
462 },
463 { /* Init_SRA0_SRAF */
464 0x00, 0xFF, 0xBF, 0xFF, 0xFF, 0xED, 0xED, 0xED,
465 0x7B, 0xFF, 0xFF, 0xFF, 0xBF, 0xEF, 0xBF, 0xDF,
466 },
467 { /* Init_GR00_GR08 */
468 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F,
469 0xFF,
470 },
471 { /* Init_AR00_AR14 */
472 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
473 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
474 0x41, 0x00, 0x0F, 0x00, 0x00,
475 },
476 { /* Init_CR00_CR18 */
477 0x7F, 0x63, 0x63, 0x00, 0x68, 0x18, 0x72, 0xF0,
478 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
479 0x58, 0x0C, 0x57, 0x64, 0x40, 0x57, 0x00, 0xE3,
480 0xFF,
481 },
482 { /* Init_CR30_CR4D */
483 0x00, 0x00, 0x00, 0x00, 0x00, 0x33, 0x03, 0x20,
484 0x00, 0x00, 0x00, 0x40, 0x00, 0xE7, 0xBF, 0xFD,
485 0x7F, 0x63, 0x00, 0x69, 0x18, 0x72, 0x57, 0x00,
486 0x58, 0x0C, 0xE0, 0x20, 0x63, 0x57,
487 },
488 { /* Init_CR90_CRA7 */
489 0x56, 0x4B, 0x5E, 0x55, 0x86, 0x9D, 0x8E, 0xAA,
490 0xDB, 0x2A, 0xDF, 0x33, 0x00, 0x00, 0x18, 0x00,
491 0x20, 0x1F, 0x1A, 0x19, 0x0F, 0x0F, 0x0F, 0x00,
492 },
493 },
494 /* We use 1024x768 table to light 1024x600 panel for lemote */
495 { /* mode#4: 1024 x 600 16Bpp 60Hz */
496 1024, 600, 16, 60,
497 /* Init_MISC */
498 0xEB,
499 { /* Init_SR0_SR4 */
500 0x03, 0x01, 0x0F, 0x00, 0x0E,
501 },
502 { /* Init_SR10_SR24 */
503 0xC8, 0x40, 0x14, 0x60, 0x00, 0x0A, 0x17, 0x20,
504 0x51, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
505 0xC4, 0x30, 0x02, 0x00, 0x01,
506 },
507 { /* Init_SR30_SR75 */
508 0x22, 0x03, 0x24, 0x09, 0xC0, 0x22, 0x22, 0x22,
509 0x22, 0x22, 0x22, 0x22, 0x00, 0x00, 0x03, 0xFF,
510 0x00, 0xFC, 0x00, 0x00, 0x20, 0x18, 0x00, 0xFC,
511 0x20, 0x0C, 0x44, 0x20, 0x00, 0x22, 0x22, 0x22,
512 0x06, 0x68, 0xA7, 0x7F, 0x83, 0x24, 0xFF, 0x03,
513 0x00, 0x60, 0x59, 0x22, 0x22, 0x00, 0x00, 0x22,
514 0x01, 0x80, 0x7A, 0x1A, 0x1A, 0x00, 0x00, 0x00,
515 0x50, 0x03, 0x16, 0x02, 0x0D, 0x82, 0x09, 0x02,
516 0x04, 0x45, 0x3F, 0x30, 0x40, 0x20,
517 },
518 { /* Init_SR80_SR93 */
519 0xFF, 0x07, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x3A,
520 0xF7, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0x3A, 0x3A,
521 0x00, 0x00, 0x00, 0x00,
522 },
523 { /* Init_SRA0_SRAF */
524 0x00, 0xFB, 0x9F, 0x01, 0x00, 0xED, 0xED, 0xED,
525 0x7B, 0xFB, 0xFF, 0xFF, 0x97, 0xEF, 0xBF, 0xDF,
526 },
527 { /* Init_GR00_GR08 */
528 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F,
529 0xFF,
530 },
531 { /* Init_AR00_AR14 */
532 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
533 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
534 0x41, 0x00, 0x0F, 0x00, 0x00,
535 },
536 { /* Init_CR00_CR18 */
537 0xA3, 0x7F, 0x7F, 0x00, 0x85, 0x16, 0x24, 0xF5,
538 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
539 0x03, 0x09, 0xFF, 0x80, 0x40, 0xFF, 0x00, 0xE3,
540 0xFF,
541 },
542 { /* Init_CR30_CR4D */
543 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x02, 0x20,
544 0x00, 0x00, 0x00, 0x40, 0x00, 0xFF, 0xBF, 0xFF,
545 0xA3, 0x7F, 0x00, 0x82, 0x0b, 0x6f, 0x57, 0x00,
546 0x5c, 0x0f, 0xE0, 0xe0, 0x7F, 0x57,
547 },
548 { /* Init_CR90_CRA7 */
549 0x55, 0xD9, 0x5D, 0xE1, 0x86, 0x1B, 0x8E, 0x26,
550 0xDA, 0x8D, 0xDE, 0x94, 0x00, 0x00, 0x18, 0x00,
551 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x15, 0x03,
552 },
553 },
554 { /* mode#5: 1024 x 768 24Bpp 60Hz */
555 1024, 768, 24, 60,
556 /* Init_MISC */
557 0xEB,
558 { /* Init_SR0_SR4 */
559 0x03, 0x01, 0x0F, 0x03, 0x0E,
560 },
561 { /* Init_SR10_SR24 */
562 0xF3, 0xB6, 0xC0, 0xDD, 0x00, 0x0E, 0x17, 0x2C,
563 0x99, 0x02, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
564 0xC4, 0x30, 0x02, 0x01, 0x01,
565 },
566 { /* Init_SR30_SR75 */
567 0x38, 0x03, 0x20, 0x09, 0xC0, 0x3A, 0x3A, 0x3A,
568 0x3A, 0x3A, 0x3A, 0x3A, 0x00, 0x00, 0x03, 0xFF,
569 0x00, 0xFC, 0x00, 0x00, 0x20, 0x18, 0x00, 0xFC,
570 0x20, 0x0C, 0x44, 0x20, 0x00, 0x00, 0x00, 0x3A,
571 0x06, 0x68, 0xA7, 0x7F, 0x83, 0x24, 0xFF, 0x03,
572 0x00, 0x60, 0x59, 0x3A, 0x3A, 0x00, 0x00, 0x3A,
573 0x01, 0x80, 0x7E, 0x1A, 0x1A, 0x00, 0x00, 0x00,
574 0x50, 0x03, 0x74, 0x14, 0x3B, 0x0D, 0x09, 0x02,
575 0x04, 0x45, 0x30, 0x30, 0x40, 0x20,
576 },
577 { /* Init_SR80_SR93 */
578 0xFF, 0x07, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x3A,
579 0xF7, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0x3A, 0x3A,
580 0x00, 0x00, 0x00, 0x00,
581 },
582 { /* Init_SRA0_SRAF */
583 0x00, 0xFB, 0x9F, 0x01, 0x00, 0xED, 0xED, 0xED,
584 0x7B, 0xFB, 0xFF, 0xFF, 0x97, 0xEF, 0xBF, 0xDF,
585 },
586 { /* Init_GR00_GR08 */
587 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F,
588 0xFF,
589 },
590 { /* Init_AR00_AR14 */
591 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
592 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
593 0x41, 0x00, 0x0F, 0x00, 0x00,
594 },
595 { /* Init_CR00_CR18 */
596 0xA3, 0x7F, 0x7F, 0x00, 0x85, 0x16, 0x24, 0xF5,
597 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
598 0x03, 0x09, 0xFF, 0x80, 0x40, 0xFF, 0x00, 0xE3,
599 0xFF,
600 },
601 { /* Init_CR30_CR4D */
602 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x02, 0x20,
603 0x00, 0x00, 0x00, 0x40, 0x00, 0xFF, 0xBF, 0xFF,
604 0xA3, 0x7F, 0x00, 0x86, 0x15, 0x24, 0xFF, 0x00,
605 0x01, 0x07, 0xE5, 0x20, 0x7F, 0xFF,
606 },
607 { /* Init_CR90_CRA7 */
608 0x55, 0xD9, 0x5D, 0xE1, 0x86, 0x1B, 0x8E, 0x26,
609 0xDA, 0x8D, 0xDE, 0x94, 0x00, 0x00, 0x18, 0x00,
610 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x15, 0x03,
611 },
612 },
613 { /* mode#4: 1024 x 768 32Bpp 60Hz */
614 1024, 768, 32, 60,
615 /* Init_MISC */
616 0xEB,
617 { /* Init_SR0_SR4 */
618 0x03, 0x01, 0x0F, 0x03, 0x0E,
619 },
620 { /* Init_SR10_SR24 */
621 0xF3, 0xB6, 0xC0, 0xDD, 0x00, 0x0E, 0x17, 0x2C,
622 0x99, 0x02, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
623 0xC4, 0x32, 0x02, 0x01, 0x01,
624 },
625 { /* Init_SR30_SR75 */
626 0x38, 0x03, 0x20, 0x09, 0xC0, 0x3A, 0x3A, 0x3A,
627 0x3A, 0x3A, 0x3A, 0x3A, 0x00, 0x00, 0x03, 0xFF,
628 0x00, 0xFC, 0x00, 0x00, 0x20, 0x18, 0x00, 0xFC,
629 0x20, 0x0C, 0x44, 0x20, 0x00, 0x00, 0x00, 0x3A,
630 0x06, 0x68, 0xA7, 0x7F, 0x83, 0x24, 0xFF, 0x03,
631 0x00, 0x60, 0x59, 0x3A, 0x3A, 0x00, 0x00, 0x3A,
632 0x01, 0x80, 0x7E, 0x1A, 0x1A, 0x00, 0x00, 0x00,
633 0x50, 0x03, 0x74, 0x14, 0x3B, 0x0D, 0x09, 0x02,
634 0x04, 0x45, 0x30, 0x30, 0x40, 0x20,
635 },
636 { /* Init_SR80_SR93 */
637 0xFF, 0x07, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x3A,
638 0xF7, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0x3A, 0x3A,
639 0x00, 0x00, 0x00, 0x00,
640 },
641 { /* Init_SRA0_SRAF */
642 0x00, 0xFB, 0x9F, 0x01, 0x00, 0xED, 0xED, 0xED,
643 0x7B, 0xFB, 0xFF, 0xFF, 0x97, 0xEF, 0xBF, 0xDF,
644 },
645 { /* Init_GR00_GR08 */
646 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F,
647 0xFF,
648 },
649 { /* Init_AR00_AR14 */
650 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
651 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
652 0x41, 0x00, 0x0F, 0x00, 0x00,
653 },
654 { /* Init_CR00_CR18 */
655 0xA3, 0x7F, 0x7F, 0x00, 0x85, 0x16, 0x24, 0xF5,
656 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
657 0x03, 0x09, 0xFF, 0x80, 0x40, 0xFF, 0x00, 0xE3,
658 0xFF,
659 },
660 { /* Init_CR30_CR4D */
661 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x02, 0x20,
662 0x00, 0x00, 0x00, 0x40, 0x00, 0xFF, 0xBF, 0xFF,
663 0xA3, 0x7F, 0x00, 0x86, 0x15, 0x24, 0xFF, 0x00,
664 0x01, 0x07, 0xE5, 0x20, 0x7F, 0xFF,
665 },
666 { /* Init_CR90_CRA7 */
667 0x55, 0xD9, 0x5D, 0xE1, 0x86, 0x1B, 0x8E, 0x26,
668 0xDA, 0x8D, 0xDE, 0x94, 0x00, 0x00, 0x18, 0x00,
669 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x15, 0x03,
670 },
671 },
672 { /* mode#6: 320 x 240 16Bpp 60Hz */
673 320, 240, 16, 60,
674 /* Init_MISC */
675 0xEB,
676 { /* Init_SR0_SR4 */
677 0x03, 0x01, 0x0F, 0x03, 0x0E,
678 },
679 { /* Init_SR10_SR24 */
680 0xF3, 0xB6, 0xC0, 0xDD, 0x00, 0x0E, 0x17, 0x2C,
681 0x99, 0x02, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
682 0xC4, 0x32, 0x02, 0x01, 0x01,
683 },
684 { /* Init_SR30_SR75 */
685 0x38, 0x03, 0x20, 0x09, 0xC0, 0x3A, 0x3A, 0x3A,
686 0x3A, 0x3A, 0x3A, 0x3A, 0x00, 0x00, 0x03, 0xFF,
687 0x00, 0xFC, 0x00, 0x00, 0x20, 0x18, 0x00, 0xFC,
688 0x20, 0x0C, 0x44, 0x20, 0x00, 0x00, 0x00, 0x3A,
689 0x06, 0x68, 0xA7, 0x7F, 0x83, 0x24, 0xFF, 0x03,
690 0x00, 0x60, 0x59, 0x3A, 0x3A, 0x00, 0x00, 0x3A,
691 0x01, 0x80, 0x7E, 0x1A, 0x1A, 0x00, 0x00, 0x00,
692 0x50, 0x03, 0x74, 0x14, 0x08, 0x43, 0x08, 0x43,
693 0x04, 0x45, 0x30, 0x30, 0x40, 0x20,
694 },
695 { /* Init_SR80_SR93 */
696 0xFF, 0x07, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x3A,
697 0xF7, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0x3A, 0x3A,
698 0x00, 0x00, 0x00, 0x00,
699 },
700 { /* Init_SRA0_SRAF */
701 0x00, 0xFB, 0x9F, 0x01, 0x00, 0xED, 0xED, 0xED,
702 0x7B, 0xFB, 0xFF, 0xFF, 0x97, 0xEF, 0xBF, 0xDF,
703 },
704 { /* Init_GR00_GR08 */
705 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F,
706 0xFF,
707 },
708 { /* Init_AR00_AR14 */
709 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
710 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
711 0x41, 0x00, 0x0F, 0x00, 0x00,
712 },
713 { /* Init_CR00_CR18 */
714 0xA3, 0x7F, 0x7F, 0x00, 0x85, 0x16, 0x24, 0xF5,
715 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
716 0x03, 0x09, 0xFF, 0x80, 0x40, 0xFF, 0x00, 0xE3,
717 0xFF,
718 },
719 { /* Init_CR30_CR4D */
720 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x02, 0x20,
721 0x00, 0x00, 0x30, 0x40, 0x00, 0xFF, 0xBF, 0xFF,
722 0x2E, 0x27, 0x00, 0x2b, 0x0c, 0x0F, 0xEF, 0x00,
723 0xFe, 0x0f, 0x01, 0xC0, 0x27, 0xEF,
724 },
725 { /* Init_CR90_CRA7 */
726 0x55, 0xD9, 0x5D, 0xE1, 0x86, 0x1B, 0x8E, 0x26,
727 0xDA, 0x8D, 0xDE, 0x94, 0x00, 0x00, 0x18, 0x00,
728 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x15, 0x03,
729 },
730 },
731
732 { /* mode#8: 320 x 240 32Bpp 60Hz */
733 320, 240, 32, 60,
734 /* Init_MISC */
735 0xEB,
736 { /* Init_SR0_SR4 */
737 0x03, 0x01, 0x0F, 0x03, 0x0E,
738 },
739 { /* Init_SR10_SR24 */
740 0xF3, 0xB6, 0xC0, 0xDD, 0x00, 0x0E, 0x17, 0x2C,
741 0x99, 0x02, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
742 0xC4, 0x32, 0x02, 0x01, 0x01,
743 },
744 { /* Init_SR30_SR75 */
745 0x38, 0x03, 0x20, 0x09, 0xC0, 0x3A, 0x3A, 0x3A,
746 0x3A, 0x3A, 0x3A, 0x3A, 0x00, 0x00, 0x03, 0xFF,
747 0x00, 0xFC, 0x00, 0x00, 0x20, 0x18, 0x00, 0xFC,
748 0x20, 0x0C, 0x44, 0x20, 0x00, 0x00, 0x00, 0x3A,
749 0x06, 0x68, 0xA7, 0x7F, 0x83, 0x24, 0xFF, 0x03,
750 0x00, 0x60, 0x59, 0x3A, 0x3A, 0x00, 0x00, 0x3A,
751 0x01, 0x80, 0x7E, 0x1A, 0x1A, 0x00, 0x00, 0x00,
752 0x50, 0x03, 0x74, 0x14, 0x08, 0x43, 0x08, 0x43,
753 0x04, 0x45, 0x30, 0x30, 0x40, 0x20,
754 },
755 { /* Init_SR80_SR93 */
756 0xFF, 0x07, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x3A,
757 0xF7, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0x3A, 0x3A,
758 0x00, 0x00, 0x00, 0x00,
759 },
760 { /* Init_SRA0_SRAF */
761 0x00, 0xFB, 0x9F, 0x01, 0x00, 0xED, 0xED, 0xED,
762 0x7B, 0xFB, 0xFF, 0xFF, 0x97, 0xEF, 0xBF, 0xDF,
763 },
764 { /* Init_GR00_GR08 */
765 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F,
766 0xFF,
767 },
768 { /* Init_AR00_AR14 */
769 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
770 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
771 0x41, 0x00, 0x0F, 0x00, 0x00,
772 },
773 { /* Init_CR00_CR18 */
774 0xA3, 0x7F, 0x7F, 0x00, 0x85, 0x16, 0x24, 0xF5,
775 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
776 0x03, 0x09, 0xFF, 0x80, 0x40, 0xFF, 0x00, 0xE3,
777 0xFF,
778 },
779 { /* Init_CR30_CR4D */
780 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x02, 0x20,
781 0x00, 0x00, 0x30, 0x40, 0x00, 0xFF, 0xBF, 0xFF,
782 0x2E, 0x27, 0x00, 0x2b, 0x0c, 0x0F, 0xEF, 0x00,
783 0xFe, 0x0f, 0x01, 0xC0, 0x27, 0xEF,
784 },
785 { /* Init_CR90_CRA7 */
786 0x55, 0xD9, 0x5D, 0xE1, 0x86, 0x1B, 0x8E, 0x26,
787 0xDA, 0x8D, 0xDE, 0x94, 0x00, 0x00, 0x18, 0x00,
788 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x15, 0x03,
789 },
790 },
791};
792
793#define numVGAModes (sizeof(VGAMode) / sizeof(struct ModeInit))
diff --git a/drivers/staging/vt6655/Kconfig b/drivers/staging/vt6655/Kconfig
index 825bbc4fc3fa..061e730df2d0 100644
--- a/drivers/staging/vt6655/Kconfig
+++ b/drivers/staging/vt6655/Kconfig
@@ -1,6 +1,6 @@
1config VT6655 1config VT6655
2 tristate "VIA Technologies VT6655 support" 2 tristate "VIA Technologies VT6655 support"
3 depends on PCI 3 depends on PCI && WLAN
4 select WIRELESS_EXT 4 select WIRELESS_EXT
5 select WEXT_PRIV 5 select WEXT_PRIV
6 ---help--- 6 ---help---
diff --git a/drivers/staging/vt6656/Kconfig b/drivers/staging/vt6656/Kconfig
index 87bcd269310c..1055b526c532 100644
--- a/drivers/staging/vt6656/Kconfig
+++ b/drivers/staging/vt6656/Kconfig
@@ -1,6 +1,6 @@
1config VT6656 1config VT6656
2 tristate "VIA Technologies VT6656 support" 2 tristate "VIA Technologies VT6656 support"
3 depends on USB 3 depends on USB && WLAN
4 select WIRELESS_EXT 4 select WIRELESS_EXT
5 select WEXT_PRIV 5 select WEXT_PRIV
6 ---help--- 6 ---help---
diff --git a/drivers/staging/wlan-ng/prism2fw.c b/drivers/staging/wlan-ng/prism2fw.c
index 7d76a7f92a33..aaa70ed57710 100644
--- a/drivers/staging/wlan-ng/prism2fw.c
+++ b/drivers/staging/wlan-ng/prism2fw.c
@@ -439,7 +439,7 @@ void free_chunks(imgchunk_t *fchunk, unsigned int *nfchunks)
439 } 439 }
440 } 440 }
441 *nfchunks = 0; 441 *nfchunks = 0;
442 memset(fchunk, 0, sizeof(fchunk)); 442 memset(fchunk, 0, sizeof(*fchunk));
443 443
444} 444}
445 445
diff --git a/drivers/thermal/thermal_sys.c b/drivers/thermal/thermal_sys.c
index 6f8d8f971212..5066de5cfc0c 100644
--- a/drivers/thermal/thermal_sys.c
+++ b/drivers/thermal/thermal_sys.c
@@ -225,6 +225,12 @@ passive_store(struct device *dev, struct device_attribute *attr,
225 if (!sscanf(buf, "%d\n", &state)) 225 if (!sscanf(buf, "%d\n", &state))
226 return -EINVAL; 226 return -EINVAL;
227 227
228 /* sanity check: values below 1000 millicelcius don't make sense
229 * and can cause the system to go into a thermal heart attack
230 */
231 if (state && state < 1000)
232 return -EINVAL;
233
228 if (state && !tz->forced_passive) { 234 if (state && !tz->forced_passive) {
229 mutex_lock(&thermal_list_lock); 235 mutex_lock(&thermal_list_lock);
230 list_for_each_entry(cdev, &thermal_cdev_list, node) { 236 list_for_each_entry(cdev, &thermal_cdev_list, node) {
@@ -235,6 +241,8 @@ passive_store(struct device *dev, struct device_attribute *attr,
235 cdev); 241 cdev);
236 } 242 }
237 mutex_unlock(&thermal_list_lock); 243 mutex_unlock(&thermal_list_lock);
244 if (!tz->passive_delay)
245 tz->passive_delay = 1000;
238 } else if (!state && tz->forced_passive) { 246 } else if (!state && tz->forced_passive) {
239 mutex_lock(&thermal_list_lock); 247 mutex_lock(&thermal_list_lock);
240 list_for_each_entry(cdev, &thermal_cdev_list, node) { 248 list_for_each_entry(cdev, &thermal_cdev_list, node) {
@@ -245,17 +253,12 @@ passive_store(struct device *dev, struct device_attribute *attr,
245 cdev); 253 cdev);
246 } 254 }
247 mutex_unlock(&thermal_list_lock); 255 mutex_unlock(&thermal_list_lock);
256 tz->passive_delay = 0;
248 } 257 }
249 258
250 tz->tc1 = 1; 259 tz->tc1 = 1;
251 tz->tc2 = 1; 260 tz->tc2 = 1;
252 261
253 if (!tz->passive_delay)
254 tz->passive_delay = 1000;
255
256 if (!tz->polling_delay)
257 tz->polling_delay = 10000;
258
259 tz->forced_passive = state; 262 tz->forced_passive = state;
260 263
261 thermal_zone_device_update(tz); 264 thermal_zone_device_update(tz);
@@ -374,7 +377,7 @@ thermal_cooling_device_cur_state_store(struct device *dev,
374 if (!sscanf(buf, "%ld\n", &state)) 377 if (!sscanf(buf, "%ld\n", &state))
375 return -EINVAL; 378 return -EINVAL;
376 379
377 if (state < 0) 380 if ((long)state < 0)
378 return -EINVAL; 381 return -EINVAL;
379 382
380 result = cdev->ops->set_cur_state(cdev, state); 383 result = cdev->ops->set_cur_state(cdev, state);
@@ -1016,6 +1019,8 @@ void thermal_zone_device_update(struct thermal_zone_device *tz)
1016 thermal_zone_device_set_polling(tz, tz->passive_delay); 1019 thermal_zone_device_set_polling(tz, tz->passive_delay);
1017 else if (tz->polling_delay) 1020 else if (tz->polling_delay)
1018 thermal_zone_device_set_polling(tz, tz->polling_delay); 1021 thermal_zone_device_set_polling(tz, tz->polling_delay);
1022 else
1023 thermal_zone_device_set_polling(tz, 0);
1019 mutex_unlock(&tz->lock); 1024 mutex_unlock(&tz->lock);
1020} 1025}
1021EXPORT_SYMBOL(thermal_zone_device_update); 1026EXPORT_SYMBOL(thermal_zone_device_update);
diff --git a/drivers/usb/Makefile b/drivers/usb/Makefile
index 473aa1a20de9..be3c9b80bc9f 100644
--- a/drivers/usb/Makefile
+++ b/drivers/usb/Makefile
@@ -44,5 +44,3 @@ obj-y += early/
44 44
45obj-$(CONFIG_USB_ATM) += atm/ 45obj-$(CONFIG_USB_ATM) += atm/
46obj-$(CONFIG_USB_SPEEDTOUCH) += atm/ 46obj-$(CONFIG_USB_SPEEDTOUCH) += atm/
47
48obj-$(CONFIG_USB_ULPI) += otg/
diff --git a/drivers/usb/core/devices.c b/drivers/usb/core/devices.c
index 96f11715cd26..355dffcc23b0 100644
--- a/drivers/usb/core/devices.c
+++ b/drivers/usb/core/devices.c
@@ -494,7 +494,7 @@ static ssize_t usb_device_dump(char __user **buffer, size_t *nbytes,
494 return 0; 494 return 0;
495 /* allocate 2^1 pages = 8K (on i386); 495 /* allocate 2^1 pages = 8K (on i386);
496 * should be more than enough for one device */ 496 * should be more than enough for one device */
497 pages_start = (char *)__get_free_pages(GFP_KERNEL, 1); 497 pages_start = (char *)__get_free_pages(GFP_NOIO, 1);
498 if (!pages_start) 498 if (!pages_start)
499 return -ENOMEM; 499 return -ENOMEM;
500 500
diff --git a/drivers/usb/core/devio.c b/drivers/usb/core/devio.c
index 6e8bcdfd23b4..a678186f218f 100644
--- a/drivers/usb/core/devio.c
+++ b/drivers/usb/core/devio.c
@@ -1312,9 +1312,9 @@ static int processcompl(struct async *as, void __user * __user *arg)
1312 void __user *addr = as->userurb; 1312 void __user *addr = as->userurb;
1313 unsigned int i; 1313 unsigned int i;
1314 1314
1315 if (as->userbuffer) 1315 if (as->userbuffer && urb->actual_length)
1316 if (copy_to_user(as->userbuffer, urb->transfer_buffer, 1316 if (copy_to_user(as->userbuffer, urb->transfer_buffer,
1317 urb->transfer_buffer_length)) 1317 urb->actual_length))
1318 goto err_out; 1318 goto err_out;
1319 if (put_user(as->status, &userurb->status)) 1319 if (put_user(as->status, &userurb->status))
1320 goto err_out; 1320 goto err_out;
@@ -1334,14 +1334,11 @@ static int processcompl(struct async *as, void __user * __user *arg)
1334 } 1334 }
1335 } 1335 }
1336 1336
1337 free_async(as);
1338
1339 if (put_user(addr, (void __user * __user *)arg)) 1337 if (put_user(addr, (void __user * __user *)arg))
1340 return -EFAULT; 1338 return -EFAULT;
1341 return 0; 1339 return 0;
1342 1340
1343err_out: 1341err_out:
1344 free_async(as);
1345 return -EFAULT; 1342 return -EFAULT;
1346} 1343}
1347 1344
@@ -1371,8 +1368,11 @@ static struct async *reap_as(struct dev_state *ps)
1371static int proc_reapurb(struct dev_state *ps, void __user *arg) 1368static int proc_reapurb(struct dev_state *ps, void __user *arg)
1372{ 1369{
1373 struct async *as = reap_as(ps); 1370 struct async *as = reap_as(ps);
1374 if (as) 1371 if (as) {
1375 return processcompl(as, (void __user * __user *)arg); 1372 int retval = processcompl(as, (void __user * __user *)arg);
1373 free_async(as);
1374 return retval;
1375 }
1376 if (signal_pending(current)) 1376 if (signal_pending(current))
1377 return -EINTR; 1377 return -EINTR;
1378 return -EIO; 1378 return -EIO;
@@ -1380,11 +1380,16 @@ static int proc_reapurb(struct dev_state *ps, void __user *arg)
1380 1380
1381static int proc_reapurbnonblock(struct dev_state *ps, void __user *arg) 1381static int proc_reapurbnonblock(struct dev_state *ps, void __user *arg)
1382{ 1382{
1383 int retval;
1383 struct async *as; 1384 struct async *as;
1384 1385
1385 if (!(as = async_getcompleted(ps))) 1386 as = async_getcompleted(ps);
1386 return -EAGAIN; 1387 retval = -EAGAIN;
1387 return processcompl(as, (void __user * __user *)arg); 1388 if (as) {
1389 retval = processcompl(as, (void __user * __user *)arg);
1390 free_async(as);
1391 }
1392 return retval;
1388} 1393}
1389 1394
1390#ifdef CONFIG_COMPAT 1395#ifdef CONFIG_COMPAT
@@ -1475,9 +1480,9 @@ static int processcompl_compat(struct async *as, void __user * __user *arg)
1475 void __user *addr = as->userurb; 1480 void __user *addr = as->userurb;
1476 unsigned int i; 1481 unsigned int i;
1477 1482
1478 if (as->userbuffer) 1483 if (as->userbuffer && urb->actual_length)
1479 if (copy_to_user(as->userbuffer, urb->transfer_buffer, 1484 if (copy_to_user(as->userbuffer, urb->transfer_buffer,
1480 urb->transfer_buffer_length)) 1485 urb->actual_length))
1481 return -EFAULT; 1486 return -EFAULT;
1482 if (put_user(as->status, &userurb->status)) 1487 if (put_user(as->status, &userurb->status))
1483 return -EFAULT; 1488 return -EFAULT;
@@ -1497,7 +1502,6 @@ static int processcompl_compat(struct async *as, void __user * __user *arg)
1497 } 1502 }
1498 } 1503 }
1499 1504
1500 free_async(as);
1501 if (put_user(ptr_to_compat(addr), (u32 __user *)arg)) 1505 if (put_user(ptr_to_compat(addr), (u32 __user *)arg))
1502 return -EFAULT; 1506 return -EFAULT;
1503 return 0; 1507 return 0;
@@ -1506,8 +1510,11 @@ static int processcompl_compat(struct async *as, void __user * __user *arg)
1506static int proc_reapurb_compat(struct dev_state *ps, void __user *arg) 1510static int proc_reapurb_compat(struct dev_state *ps, void __user *arg)
1507{ 1511{
1508 struct async *as = reap_as(ps); 1512 struct async *as = reap_as(ps);
1509 if (as) 1513 if (as) {
1510 return processcompl_compat(as, (void __user * __user *)arg); 1514 int retval = processcompl_compat(as, (void __user * __user *)arg);
1515 free_async(as);
1516 return retval;
1517 }
1511 if (signal_pending(current)) 1518 if (signal_pending(current))
1512 return -EINTR; 1519 return -EINTR;
1513 return -EIO; 1520 return -EIO;
@@ -1515,11 +1522,16 @@ static int proc_reapurb_compat(struct dev_state *ps, void __user *arg)
1515 1522
1516static int proc_reapurbnonblock_compat(struct dev_state *ps, void __user *arg) 1523static int proc_reapurbnonblock_compat(struct dev_state *ps, void __user *arg)
1517{ 1524{
1525 int retval;
1518 struct async *as; 1526 struct async *as;
1519 1527
1520 if (!(as = async_getcompleted(ps))) 1528 retval = -EAGAIN;
1521 return -EAGAIN; 1529 as = async_getcompleted(ps);
1522 return processcompl_compat(as, (void __user * __user *)arg); 1530 if (as) {
1531 retval = processcompl_compat(as, (void __user * __user *)arg);
1532 free_async(as);
1533 }
1534 return retval;
1523} 1535}
1524 1536
1525 1537
diff --git a/drivers/usb/core/hcd.c b/drivers/usb/core/hcd.c
index 6dac3b802d41..80995ef0868c 100644
--- a/drivers/usb/core/hcd.c
+++ b/drivers/usb/core/hcd.c
@@ -1597,7 +1597,9 @@ rescan:
1597} 1597}
1598 1598
1599/** 1599/**
1600 * Check whether a new bandwidth setting exceeds the bus bandwidth. 1600 * usb_hcd_alloc_bandwidth - check whether a new bandwidth setting exceeds
1601 * the bus bandwidth
1602 * @udev: target &usb_device
1601 * @new_config: new configuration to install 1603 * @new_config: new configuration to install
1602 * @cur_alt: the current alternate interface setting 1604 * @cur_alt: the current alternate interface setting
1603 * @new_alt: alternate interface setting that is being installed 1605 * @new_alt: alternate interface setting that is being installed
@@ -1682,6 +1684,24 @@ int usb_hcd_alloc_bandwidth(struct usb_device *udev,
1682 } 1684 }
1683 } 1685 }
1684 if (cur_alt && new_alt) { 1686 if (cur_alt && new_alt) {
1687 struct usb_interface *iface = usb_ifnum_to_if(udev,
1688 cur_alt->desc.bInterfaceNumber);
1689
1690 if (iface->resetting_device) {
1691 /*
1692 * The USB core just reset the device, so the xHCI host
1693 * and the device will think alt setting 0 is installed.
1694 * However, the USB core will pass in the alternate
1695 * setting installed before the reset as cur_alt. Dig
1696 * out the alternate setting 0 structure, or the first
1697 * alternate setting if a broken device doesn't have alt
1698 * setting 0.
1699 */
1700 cur_alt = usb_altnum_to_altsetting(iface, 0);
1701 if (!cur_alt)
1702 cur_alt = &iface->altsetting[0];
1703 }
1704
1685 /* Drop all the endpoints in the current alt setting */ 1705 /* Drop all the endpoints in the current alt setting */
1686 for (i = 0; i < cur_alt->desc.bNumEndpoints; i++) { 1706 for (i = 0; i < cur_alt->desc.bNumEndpoints; i++) {
1687 ret = hcd->driver->drop_endpoint(hcd, udev, 1707 ret = hcd->driver->drop_endpoint(hcd, udev,
diff --git a/drivers/usb/core/hub.c b/drivers/usb/core/hub.c
index 06af970e1064..35cc8b9ba1f5 100644
--- a/drivers/usb/core/hub.c
+++ b/drivers/usb/core/hub.c
@@ -1658,12 +1658,12 @@ static inline void announce_device(struct usb_device *udev) { }
1658#endif 1658#endif
1659 1659
1660/** 1660/**
1661 * usb_configure_device_otg - FIXME (usbcore-internal) 1661 * usb_enumerate_device_otg - FIXME (usbcore-internal)
1662 * @udev: newly addressed device (in ADDRESS state) 1662 * @udev: newly addressed device (in ADDRESS state)
1663 * 1663 *
1664 * Do configuration for On-The-Go devices 1664 * Finish enumeration for On-The-Go devices
1665 */ 1665 */
1666static int usb_configure_device_otg(struct usb_device *udev) 1666static int usb_enumerate_device_otg(struct usb_device *udev)
1667{ 1667{
1668 int err = 0; 1668 int err = 0;
1669 1669
@@ -1734,7 +1734,7 @@ fail:
1734 1734
1735 1735
1736/** 1736/**
1737 * usb_configure_device - Detect and probe device intfs/otg (usbcore-internal) 1737 * usb_enumerate_device - Read device configs/intfs/otg (usbcore-internal)
1738 * @udev: newly addressed device (in ADDRESS state) 1738 * @udev: newly addressed device (in ADDRESS state)
1739 * 1739 *
1740 * This is only called by usb_new_device() and usb_authorize_device() 1740 * This is only called by usb_new_device() and usb_authorize_device()
@@ -1745,7 +1745,7 @@ fail:
1745 * the string descriptors, as they will be errored out by the device 1745 * the string descriptors, as they will be errored out by the device
1746 * until it has been authorized. 1746 * until it has been authorized.
1747 */ 1747 */
1748static int usb_configure_device(struct usb_device *udev) 1748static int usb_enumerate_device(struct usb_device *udev)
1749{ 1749{
1750 int err; 1750 int err;
1751 1751
@@ -1769,7 +1769,7 @@ static int usb_configure_device(struct usb_device *udev)
1769 udev->descriptor.iManufacturer); 1769 udev->descriptor.iManufacturer);
1770 udev->serial = usb_cache_string(udev, udev->descriptor.iSerialNumber); 1770 udev->serial = usb_cache_string(udev, udev->descriptor.iSerialNumber);
1771 } 1771 }
1772 err = usb_configure_device_otg(udev); 1772 err = usb_enumerate_device_otg(udev);
1773fail: 1773fail:
1774 return err; 1774 return err;
1775} 1775}
@@ -1779,8 +1779,8 @@ fail:
1779 * usb_new_device - perform initial device setup (usbcore-internal) 1779 * usb_new_device - perform initial device setup (usbcore-internal)
1780 * @udev: newly addressed device (in ADDRESS state) 1780 * @udev: newly addressed device (in ADDRESS state)
1781 * 1781 *
1782 * This is called with devices which have been enumerated, but not yet 1782 * This is called with devices which have been detected but not fully
1783 * configured. The device descriptor is available, but not descriptors 1783 * enumerated. The device descriptor is available, but not descriptors
1784 * for any device configuration. The caller must have locked either 1784 * for any device configuration. The caller must have locked either
1785 * the parent hub (if udev is a normal device) or else the 1785 * the parent hub (if udev is a normal device) or else the
1786 * usb_bus_list_lock (if udev is a root hub). The parent's pointer to 1786 * usb_bus_list_lock (if udev is a root hub). The parent's pointer to
@@ -1803,8 +1803,8 @@ int usb_new_device(struct usb_device *udev)
1803 if (udev->parent) 1803 if (udev->parent)
1804 usb_autoresume_device(udev->parent); 1804 usb_autoresume_device(udev->parent);
1805 1805
1806 usb_detect_quirks(udev); /* Determine quirks */ 1806 usb_detect_quirks(udev);
1807 err = usb_configure_device(udev); /* detect & probe dev/intfs */ 1807 err = usb_enumerate_device(udev); /* Read descriptors */
1808 if (err < 0) 1808 if (err < 0)
1809 goto fail; 1809 goto fail;
1810 dev_dbg(&udev->dev, "udev %d, busnum %d, minor = %d\n", 1810 dev_dbg(&udev->dev, "udev %d, busnum %d, minor = %d\n",
@@ -1849,21 +1849,23 @@ fail:
1849 */ 1849 */
1850int usb_deauthorize_device(struct usb_device *usb_dev) 1850int usb_deauthorize_device(struct usb_device *usb_dev)
1851{ 1851{
1852 unsigned cnt;
1853 usb_lock_device(usb_dev); 1852 usb_lock_device(usb_dev);
1854 if (usb_dev->authorized == 0) 1853 if (usb_dev->authorized == 0)
1855 goto out_unauthorized; 1854 goto out_unauthorized;
1855
1856 usb_dev->authorized = 0; 1856 usb_dev->authorized = 0;
1857 usb_set_configuration(usb_dev, -1); 1857 usb_set_configuration(usb_dev, -1);
1858
1859 kfree(usb_dev->product);
1858 usb_dev->product = kstrdup("n/a (unauthorized)", GFP_KERNEL); 1860 usb_dev->product = kstrdup("n/a (unauthorized)", GFP_KERNEL);
1861 kfree(usb_dev->manufacturer);
1859 usb_dev->manufacturer = kstrdup("n/a (unauthorized)", GFP_KERNEL); 1862 usb_dev->manufacturer = kstrdup("n/a (unauthorized)", GFP_KERNEL);
1863 kfree(usb_dev->serial);
1860 usb_dev->serial = kstrdup("n/a (unauthorized)", GFP_KERNEL); 1864 usb_dev->serial = kstrdup("n/a (unauthorized)", GFP_KERNEL);
1861 kfree(usb_dev->config); 1865
1862 usb_dev->config = NULL; 1866 usb_destroy_configuration(usb_dev);
1863 for (cnt = 0; cnt < usb_dev->descriptor.bNumConfigurations; cnt++)
1864 kfree(usb_dev->rawdescriptors[cnt]);
1865 usb_dev->descriptor.bNumConfigurations = 0; 1867 usb_dev->descriptor.bNumConfigurations = 0;
1866 kfree(usb_dev->rawdescriptors); 1868
1867out_unauthorized: 1869out_unauthorized:
1868 usb_unlock_device(usb_dev); 1870 usb_unlock_device(usb_dev);
1869 return 0; 1871 return 0;
@@ -1873,15 +1875,11 @@ out_unauthorized:
1873int usb_authorize_device(struct usb_device *usb_dev) 1875int usb_authorize_device(struct usb_device *usb_dev)
1874{ 1876{
1875 int result = 0, c; 1877 int result = 0, c;
1878
1876 usb_lock_device(usb_dev); 1879 usb_lock_device(usb_dev);
1877 if (usb_dev->authorized == 1) 1880 if (usb_dev->authorized == 1)
1878 goto out_authorized; 1881 goto out_authorized;
1879 kfree(usb_dev->product); 1882
1880 usb_dev->product = NULL;
1881 kfree(usb_dev->manufacturer);
1882 usb_dev->manufacturer = NULL;
1883 kfree(usb_dev->serial);
1884 usb_dev->serial = NULL;
1885 result = usb_autoresume_device(usb_dev); 1883 result = usb_autoresume_device(usb_dev);
1886 if (result < 0) { 1884 if (result < 0) {
1887 dev_err(&usb_dev->dev, 1885 dev_err(&usb_dev->dev,
@@ -1894,10 +1892,18 @@ int usb_authorize_device(struct usb_device *usb_dev)
1894 "authorization: %d\n", result); 1892 "authorization: %d\n", result);
1895 goto error_device_descriptor; 1893 goto error_device_descriptor;
1896 } 1894 }
1895
1896 kfree(usb_dev->product);
1897 usb_dev->product = NULL;
1898 kfree(usb_dev->manufacturer);
1899 usb_dev->manufacturer = NULL;
1900 kfree(usb_dev->serial);
1901 usb_dev->serial = NULL;
1902
1897 usb_dev->authorized = 1; 1903 usb_dev->authorized = 1;
1898 result = usb_configure_device(usb_dev); 1904 result = usb_enumerate_device(usb_dev);
1899 if (result < 0) 1905 if (result < 0)
1900 goto error_configure; 1906 goto error_enumerate;
1901 /* Choose and set the configuration. This registers the interfaces 1907 /* Choose and set the configuration. This registers the interfaces
1902 * with the driver core and lets interface drivers bind to them. 1908 * with the driver core and lets interface drivers bind to them.
1903 */ 1909 */
@@ -1912,8 +1918,10 @@ int usb_authorize_device(struct usb_device *usb_dev)
1912 } 1918 }
1913 } 1919 }
1914 dev_info(&usb_dev->dev, "authorized to connect\n"); 1920 dev_info(&usb_dev->dev, "authorized to connect\n");
1915error_configure: 1921
1922error_enumerate:
1916error_device_descriptor: 1923error_device_descriptor:
1924 usb_autosuspend_device(usb_dev);
1917error_autoresume: 1925error_autoresume:
1918out_authorized: 1926out_authorized:
1919 usb_unlock_device(usb_dev); // complements locktree 1927 usb_unlock_device(usb_dev); // complements locktree
@@ -3339,6 +3347,9 @@ static void hub_events(void)
3339 USB_PORT_FEAT_C_SUSPEND); 3347 USB_PORT_FEAT_C_SUSPEND);
3340 udev = hdev->children[i-1]; 3348 udev = hdev->children[i-1];
3341 if (udev) { 3349 if (udev) {
3350 /* TRSMRCY = 10 msec */
3351 msleep(10);
3352
3342 usb_lock_device(udev); 3353 usb_lock_device(udev);
3343 ret = remote_wakeup(hdev-> 3354 ret = remote_wakeup(hdev->
3344 children[i-1]); 3355 children[i-1]);
@@ -3684,19 +3695,14 @@ static int usb_reset_and_verify_device(struct usb_device *udev)
3684 usb_enable_interface(udev, intf, true); 3695 usb_enable_interface(udev, intf, true);
3685 ret = 0; 3696 ret = 0;
3686 } else { 3697 } else {
3687 /* We've just reset the device, so it will think alt 3698 /* Let the bandwidth allocation function know that this
3688 * setting 0 is installed. For usb_set_interface() to 3699 * device has been reset, and it will have to use
3689 * work properly, we need to set the current alternate 3700 * alternate setting 0 as the current alternate setting.
3690 * interface setting to 0 (or the first alt setting, if
3691 * the device doesn't have alt setting 0).
3692 */ 3701 */
3693 intf->cur_altsetting = 3702 intf->resetting_device = 1;
3694 usb_find_alt_setting(config, i, 0);
3695 if (!intf->cur_altsetting)
3696 intf->cur_altsetting =
3697 &config->intf_cache[i]->altsetting[0];
3698 ret = usb_set_interface(udev, desc->bInterfaceNumber, 3703 ret = usb_set_interface(udev, desc->bInterfaceNumber,
3699 desc->bAlternateSetting); 3704 desc->bAlternateSetting);
3705 intf->resetting_device = 0;
3700 } 3706 }
3701 if (ret < 0) { 3707 if (ret < 0) {
3702 dev_err(&udev->dev, "failed to restore interface %d " 3708 dev_err(&udev->dev, "failed to restore interface %d "
diff --git a/drivers/usb/core/message.c b/drivers/usb/core/message.c
index 1b994846e8e0..9bc95fec793f 100644
--- a/drivers/usb/core/message.c
+++ b/drivers/usb/core/message.c
@@ -906,11 +906,11 @@ char *usb_cache_string(struct usb_device *udev, int index)
906 if (index <= 0) 906 if (index <= 0)
907 return NULL; 907 return NULL;
908 908
909 buf = kmalloc(MAX_USB_STRING_SIZE, GFP_KERNEL); 909 buf = kmalloc(MAX_USB_STRING_SIZE, GFP_NOIO);
910 if (buf) { 910 if (buf) {
911 len = usb_string(udev, index, buf, MAX_USB_STRING_SIZE); 911 len = usb_string(udev, index, buf, MAX_USB_STRING_SIZE);
912 if (len > 0) { 912 if (len > 0) {
913 smallbuf = kmalloc(++len, GFP_KERNEL); 913 smallbuf = kmalloc(++len, GFP_NOIO);
914 if (!smallbuf) 914 if (!smallbuf)
915 return buf; 915 return buf;
916 memcpy(smallbuf, buf, len); 916 memcpy(smallbuf, buf, len);
@@ -1731,7 +1731,7 @@ int usb_set_configuration(struct usb_device *dev, int configuration)
1731 if (cp) { 1731 if (cp) {
1732 nintf = cp->desc.bNumInterfaces; 1732 nintf = cp->desc.bNumInterfaces;
1733 new_interfaces = kmalloc(nintf * sizeof(*new_interfaces), 1733 new_interfaces = kmalloc(nintf * sizeof(*new_interfaces),
1734 GFP_KERNEL); 1734 GFP_NOIO);
1735 if (!new_interfaces) { 1735 if (!new_interfaces) {
1736 dev_err(&dev->dev, "Out of memory\n"); 1736 dev_err(&dev->dev, "Out of memory\n");
1737 return -ENOMEM; 1737 return -ENOMEM;
@@ -1740,7 +1740,7 @@ int usb_set_configuration(struct usb_device *dev, int configuration)
1740 for (; n < nintf; ++n) { 1740 for (; n < nintf; ++n) {
1741 new_interfaces[n] = kzalloc( 1741 new_interfaces[n] = kzalloc(
1742 sizeof(struct usb_interface), 1742 sizeof(struct usb_interface),
1743 GFP_KERNEL); 1743 GFP_NOIO);
1744 if (!new_interfaces[n]) { 1744 if (!new_interfaces[n]) {
1745 dev_err(&dev->dev, "Out of memory\n"); 1745 dev_err(&dev->dev, "Out of memory\n");
1746 ret = -ENOMEM; 1746 ret = -ENOMEM;
diff --git a/drivers/usb/core/sysfs.c b/drivers/usb/core/sysfs.c
index 15477008b631..5f3908f6e2dc 100644
--- a/drivers/usb/core/sysfs.c
+++ b/drivers/usb/core/sysfs.c
@@ -82,9 +82,13 @@ static ssize_t show_##name(struct device *dev, \
82 struct device_attribute *attr, char *buf) \ 82 struct device_attribute *attr, char *buf) \
83{ \ 83{ \
84 struct usb_device *udev; \ 84 struct usb_device *udev; \
85 int retval; \
85 \ 86 \
86 udev = to_usb_device(dev); \ 87 udev = to_usb_device(dev); \
87 return sprintf(buf, "%s\n", udev->name); \ 88 usb_lock_device(udev); \
89 retval = sprintf(buf, "%s\n", udev->name); \
90 usb_unlock_device(udev); \
91 return retval; \
88} \ 92} \
89static DEVICE_ATTR(name, S_IRUGO, show_##name, NULL); 93static DEVICE_ATTR(name, S_IRUGO, show_##name, NULL);
90 94
@@ -111,6 +115,12 @@ show_speed(struct device *dev, struct device_attribute *attr, char *buf)
111 case USB_SPEED_HIGH: 115 case USB_SPEED_HIGH:
112 speed = "480"; 116 speed = "480";
113 break; 117 break;
118 case USB_SPEED_VARIABLE:
119 speed = "480";
120 break;
121 case USB_SPEED_SUPER:
122 speed = "5000";
123 break;
114 default: 124 default:
115 speed = "unknown"; 125 speed = "unknown";
116 } 126 }
diff --git a/drivers/usb/core/usb.c b/drivers/usb/core/usb.c
index 2fb42043b305..0daff0d968ba 100644
--- a/drivers/usb/core/usb.c
+++ b/drivers/usb/core/usb.c
@@ -66,9 +66,9 @@ MODULE_PARM_DESC(autosuspend, "default autosuspend delay");
66/** 66/**
67 * usb_find_alt_setting() - Given a configuration, find the alternate setting 67 * usb_find_alt_setting() - Given a configuration, find the alternate setting
68 * for the given interface. 68 * for the given interface.
69 * @config - the configuration to search (not necessarily the current config). 69 * @config: the configuration to search (not necessarily the current config).
70 * @iface_num - interface number to search in 70 * @iface_num: interface number to search in
71 * @alt_num - alternate interface setting number to search for. 71 * @alt_num: alternate interface setting number to search for.
72 * 72 *
73 * Search the configuration's interface cache for the given alt setting. 73 * Search the configuration's interface cache for the given alt setting.
74 */ 74 */
diff --git a/drivers/usb/early/ehci-dbgp.c b/drivers/usb/early/ehci-dbgp.c
index 1206a26ef893..2958a1271b20 100644
--- a/drivers/usb/early/ehci-dbgp.c
+++ b/drivers/usb/early/ehci-dbgp.c
@@ -613,7 +613,7 @@ err:
613} 613}
614EXPORT_SYMBOL_GPL(dbgp_external_startup); 614EXPORT_SYMBOL_GPL(dbgp_external_startup);
615 615
616static int __init ehci_reset_port(int port) 616static int ehci_reset_port(int port)
617{ 617{
618 u32 portsc; 618 u32 portsc;
619 u32 delay_time, delay; 619 u32 delay_time, delay;
diff --git a/drivers/usb/gadget/audio.c b/drivers/usb/gadget/audio.c
index 58f220323847..a62af7b59094 100644
--- a/drivers/usb/gadget/audio.c
+++ b/drivers/usb/gadget/audio.c
@@ -158,6 +158,7 @@ fail:
158 158
159static int __exit audio_unbind(struct usb_composite_dev *cdev) 159static int __exit audio_unbind(struct usb_composite_dev *cdev)
160{ 160{
161 gaudio_cleanup();
161 return 0; 162 return 0;
162} 163}
163 164
diff --git a/drivers/usb/gadget/f_audio.c b/drivers/usb/gadget/f_audio.c
index c43c89ffa2c8..df77f6131c73 100644
--- a/drivers/usb/gadget/f_audio.c
+++ b/drivers/usb/gadget/f_audio.c
@@ -56,13 +56,16 @@ static struct usb_interface_descriptor ac_interface_desc __initdata = {
56DECLARE_UAC_AC_HEADER_DESCRIPTOR(2); 56DECLARE_UAC_AC_HEADER_DESCRIPTOR(2);
57 57
58#define UAC_DT_AC_HEADER_LENGTH UAC_DT_AC_HEADER_SIZE(F_AUDIO_NUM_INTERFACES) 58#define UAC_DT_AC_HEADER_LENGTH UAC_DT_AC_HEADER_SIZE(F_AUDIO_NUM_INTERFACES)
59/* 1 input terminal, 1 output terminal and 1 feature unit */
60#define UAC_DT_TOTAL_LENGTH (UAC_DT_AC_HEADER_LENGTH + UAC_DT_INPUT_TERMINAL_SIZE \
61 + UAC_DT_OUTPUT_TERMINAL_SIZE + UAC_DT_FEATURE_UNIT_SIZE(0))
59/* B.3.2 Class-Specific AC Interface Descriptor */ 62/* B.3.2 Class-Specific AC Interface Descriptor */
60static struct uac_ac_header_descriptor_2 ac_header_desc = { 63static struct uac_ac_header_descriptor_2 ac_header_desc = {
61 .bLength = UAC_DT_AC_HEADER_LENGTH, 64 .bLength = UAC_DT_AC_HEADER_LENGTH,
62 .bDescriptorType = USB_DT_CS_INTERFACE, 65 .bDescriptorType = USB_DT_CS_INTERFACE,
63 .bDescriptorSubtype = UAC_HEADER, 66 .bDescriptorSubtype = UAC_HEADER,
64 .bcdADC = __constant_cpu_to_le16(0x0100), 67 .bcdADC = __constant_cpu_to_le16(0x0100),
65 .wTotalLength = __constant_cpu_to_le16(UAC_DT_AC_HEADER_LENGTH), 68 .wTotalLength = __constant_cpu_to_le16(UAC_DT_TOTAL_LENGTH),
66 .bInCollection = F_AUDIO_NUM_INTERFACES, 69 .bInCollection = F_AUDIO_NUM_INTERFACES,
67 .baInterfaceNr = { 70 .baInterfaceNr = {
68 [0] = F_AUDIO_AC_INTERFACE, 71 [0] = F_AUDIO_AC_INTERFACE,
@@ -252,12 +255,12 @@ static struct f_audio_buf *f_audio_buffer_alloc(int buf_size)
252 255
253 copy_buf = kzalloc(sizeof *copy_buf, GFP_ATOMIC); 256 copy_buf = kzalloc(sizeof *copy_buf, GFP_ATOMIC);
254 if (!copy_buf) 257 if (!copy_buf)
255 return (struct f_audio_buf *)-ENOMEM; 258 return ERR_PTR(-ENOMEM);
256 259
257 copy_buf->buf = kzalloc(buf_size, GFP_ATOMIC); 260 copy_buf->buf = kzalloc(buf_size, GFP_ATOMIC);
258 if (!copy_buf->buf) { 261 if (!copy_buf->buf) {
259 kfree(copy_buf); 262 kfree(copy_buf);
260 return (struct f_audio_buf *)-ENOMEM; 263 return ERR_PTR(-ENOMEM);
261 } 264 }
262 265
263 return copy_buf; 266 return copy_buf;
@@ -332,7 +335,7 @@ static int f_audio_out_ep_complete(struct usb_ep *ep, struct usb_request *req)
332 list_add_tail(&copy_buf->list, &audio->play_queue); 335 list_add_tail(&copy_buf->list, &audio->play_queue);
333 schedule_work(&audio->playback_work); 336 schedule_work(&audio->playback_work);
334 copy_buf = f_audio_buffer_alloc(audio_buf_size); 337 copy_buf = f_audio_buffer_alloc(audio_buf_size);
335 if (copy_buf < 0) 338 if (IS_ERR(copy_buf))
336 return -ENOMEM; 339 return -ENOMEM;
337 } 340 }
338 341
@@ -576,6 +579,8 @@ static int f_audio_set_alt(struct usb_function *f, unsigned intf, unsigned alt)
576 usb_ep_enable(out_ep, audio->out_desc); 579 usb_ep_enable(out_ep, audio->out_desc);
577 out_ep->driver_data = audio; 580 out_ep->driver_data = audio;
578 audio->copy_buf = f_audio_buffer_alloc(audio_buf_size); 581 audio->copy_buf = f_audio_buffer_alloc(audio_buf_size);
582 if (IS_ERR(audio->copy_buf))
583 return -ENOMEM;
579 584
580 /* 585 /*
581 * allocate a bunch of read buffers 586 * allocate a bunch of read buffers
@@ -787,7 +792,7 @@ int __init audio_bind_config(struct usb_configuration *c)
787 return status; 792 return status;
788 793
789add_fail: 794add_fail:
790 gaudio_cleanup(&audio->card); 795 gaudio_cleanup();
791setup_fail: 796setup_fail:
792 kfree(audio); 797 kfree(audio);
793 return status; 798 return status;
diff --git a/drivers/usb/gadget/f_eem.c b/drivers/usb/gadget/f_eem.c
index 0a577d5694fd..d4f0db58a8ad 100644
--- a/drivers/usb/gadget/f_eem.c
+++ b/drivers/usb/gadget/f_eem.c
@@ -358,7 +358,7 @@ done:
358 * b15: bmType (0 == data) 358 * b15: bmType (0 == data)
359 */ 359 */
360 len = skb->len; 360 len = skb->len;
361 put_unaligned_le16((len & 0x3FFF) | BIT(14), skb_push(skb, 2)); 361 put_unaligned_le16(len & 0x3FFF, skb_push(skb, 2));
362 362
363 /* add a zero-length EEM packet, if needed */ 363 /* add a zero-length EEM packet, if needed */
364 if (padlen) 364 if (padlen)
@@ -464,7 +464,6 @@ static int eem_unwrap(struct gether *port,
464 } 464 }
465 465
466 /* validate CRC */ 466 /* validate CRC */
467 crc = get_unaligned_le32(skb->data + len - ETH_FCS_LEN);
468 if (header & BIT(14)) { 467 if (header & BIT(14)) {
469 crc = get_unaligned_le32(skb->data + len 468 crc = get_unaligned_le32(skb->data + len
470 - ETH_FCS_LEN); 469 - ETH_FCS_LEN);
diff --git a/drivers/usb/gadget/multi.c b/drivers/usb/gadget/multi.c
index 429560100b10..76496f5d272c 100644
--- a/drivers/usb/gadget/multi.c
+++ b/drivers/usb/gadget/multi.c
@@ -29,7 +29,7 @@
29#if defined USB_ETH_RNDIS 29#if defined USB_ETH_RNDIS
30# undef USB_ETH_RNDIS 30# undef USB_ETH_RNDIS
31#endif 31#endif
32#ifdef CONFIG_USB_ETH_RNDIS 32#ifdef CONFIG_USB_G_MULTI_RNDIS
33# define USB_ETH_RNDIS y 33# define USB_ETH_RNDIS y
34#endif 34#endif
35 35
diff --git a/drivers/usb/gadget/r8a66597-udc.c b/drivers/usb/gadget/r8a66597-udc.c
index e220fb8091a3..8b45145b9136 100644
--- a/drivers/usb/gadget/r8a66597-udc.c
+++ b/drivers/usb/gadget/r8a66597-udc.c
@@ -26,6 +26,7 @@
26#include <linux/io.h> 26#include <linux/io.h>
27#include <linux/platform_device.h> 27#include <linux/platform_device.h>
28#include <linux/clk.h> 28#include <linux/clk.h>
29#include <linux/err.h>
29 30
30#include <linux/usb/ch9.h> 31#include <linux/usb/ch9.h>
31#include <linux/usb/gadget.h> 32#include <linux/usb/gadget.h>
diff --git a/drivers/usb/gadget/s3c-hsotg.c b/drivers/usb/gadget/s3c-hsotg.c
index 4b5dbd0127f5..5fc80a104150 100644
--- a/drivers/usb/gadget/s3c-hsotg.c
+++ b/drivers/usb/gadget/s3c-hsotg.c
@@ -2582,6 +2582,7 @@ err:
2582 hsotg->gadget.dev.driver = NULL; 2582 hsotg->gadget.dev.driver = NULL;
2583 return ret; 2583 return ret;
2584} 2584}
2585EXPORT_SYMBOL(usb_gadget_register_driver);
2585 2586
2586int usb_gadget_unregister_driver(struct usb_gadget_driver *driver) 2587int usb_gadget_unregister_driver(struct usb_gadget_driver *driver)
2587{ 2588{
diff --git a/drivers/usb/gadget/u_audio.c b/drivers/usb/gadget/u_audio.c
index 8252595d619d..35e0930f5bbb 100644
--- a/drivers/usb/gadget/u_audio.c
+++ b/drivers/usb/gadget/u_audio.c
@@ -288,6 +288,7 @@ static int gaudio_close_snd_dev(struct gaudio *gau)
288 return 0; 288 return 0;
289} 289}
290 290
291static struct gaudio *the_card;
291/** 292/**
292 * gaudio_setup - setup ALSA interface and preparing for USB transfer 293 * gaudio_setup - setup ALSA interface and preparing for USB transfer
293 * 294 *
@@ -303,6 +304,9 @@ int __init gaudio_setup(struct gaudio *card)
303 if (ret) 304 if (ret)
304 ERROR(card, "we need at least one control device\n"); 305 ERROR(card, "we need at least one control device\n");
305 306
307 if (!the_card)
308 the_card = card;
309
306 return ret; 310 return ret;
307 311
308} 312}
@@ -312,9 +316,11 @@ int __init gaudio_setup(struct gaudio *card)
312 * 316 *
313 * This is called to free all resources allocated by @gaudio_setup(). 317 * This is called to free all resources allocated by @gaudio_setup().
314 */ 318 */
315void gaudio_cleanup(struct gaudio *card) 319void gaudio_cleanup(void)
316{ 320{
317 if (card) 321 if (the_card) {
318 gaudio_close_snd_dev(card); 322 gaudio_close_snd_dev(the_card);
323 the_card = NULL;
324 }
319} 325}
320 326
diff --git a/drivers/usb/gadget/u_audio.h b/drivers/usb/gadget/u_audio.h
index cc8d159c648a..08ffce3298e6 100644
--- a/drivers/usb/gadget/u_audio.h
+++ b/drivers/usb/gadget/u_audio.h
@@ -51,6 +51,6 @@ struct gaudio {
51}; 51};
52 52
53int gaudio_setup(struct gaudio *card); 53int gaudio_setup(struct gaudio *card);
54void gaudio_cleanup(struct gaudio *card); 54void gaudio_cleanup(void);
55 55
56#endif /* __U_AUDIO_H */ 56#endif /* __U_AUDIO_H */
diff --git a/drivers/usb/host/ehci-hcd.c b/drivers/usb/host/ehci-hcd.c
index 5859522d6edd..1ec3857f22e6 100644
--- a/drivers/usb/host/ehci-hcd.c
+++ b/drivers/usb/host/ehci-hcd.c
@@ -787,9 +787,10 @@ static irqreturn_t ehci_irq (struct usb_hcd *hcd)
787 787
788 /* start 20 msec resume signaling from this port, 788 /* start 20 msec resume signaling from this port,
789 * and make khubd collect PORT_STAT_C_SUSPEND to 789 * and make khubd collect PORT_STAT_C_SUSPEND to
790 * stop that signaling. 790 * stop that signaling. Use 5 ms extra for safety,
791 * like usb_port_resume() does.
791 */ 792 */
792 ehci->reset_done [i] = jiffies + msecs_to_jiffies (20); 793 ehci->reset_done[i] = jiffies + msecs_to_jiffies(25);
793 ehci_dbg (ehci, "port %d remote wakeup\n", i + 1); 794 ehci_dbg (ehci, "port %d remote wakeup\n", i + 1);
794 mod_timer(&hcd->rh_timer, ehci->reset_done[i]); 795 mod_timer(&hcd->rh_timer, ehci->reset_done[i]);
795 } 796 }
diff --git a/drivers/usb/host/ehci-hub.c b/drivers/usb/host/ehci-hub.c
index 2c6571c05f35..19372673bf09 100644
--- a/drivers/usb/host/ehci-hub.c
+++ b/drivers/usb/host/ehci-hub.c
@@ -120,9 +120,26 @@ static int ehci_bus_suspend (struct usb_hcd *hcd)
120 del_timer_sync(&ehci->watchdog); 120 del_timer_sync(&ehci->watchdog);
121 del_timer_sync(&ehci->iaa_watchdog); 121 del_timer_sync(&ehci->iaa_watchdog);
122 122
123 port = HCS_N_PORTS (ehci->hcs_params);
124 spin_lock_irq (&ehci->lock); 123 spin_lock_irq (&ehci->lock);
125 124
125 /* Once the controller is stopped, port resumes that are already
126 * in progress won't complete. Hence if remote wakeup is enabled
127 * for the root hub and any ports are in the middle of a resume or
128 * remote wakeup, we must fail the suspend.
129 */
130 if (hcd->self.root_hub->do_remote_wakeup) {
131 port = HCS_N_PORTS(ehci->hcs_params);
132 while (port--) {
133 if (ehci->reset_done[port] != 0) {
134 spin_unlock_irq(&ehci->lock);
135 ehci_dbg(ehci, "suspend failed because "
136 "port %d is resuming\n",
137 port + 1);
138 return -EBUSY;
139 }
140 }
141 }
142
126 /* stop schedules, clean any completed work */ 143 /* stop schedules, clean any completed work */
127 if (HC_IS_RUNNING(hcd->state)) { 144 if (HC_IS_RUNNING(hcd->state)) {
128 ehci_quiesce (ehci); 145 ehci_quiesce (ehci);
@@ -138,6 +155,7 @@ static int ehci_bus_suspend (struct usb_hcd *hcd)
138 */ 155 */
139 ehci->bus_suspended = 0; 156 ehci->bus_suspended = 0;
140 ehci->owned_ports = 0; 157 ehci->owned_ports = 0;
158 port = HCS_N_PORTS(ehci->hcs_params);
141 while (port--) { 159 while (port--) {
142 u32 __iomem *reg = &ehci->regs->port_status [port]; 160 u32 __iomem *reg = &ehci->regs->port_status [port];
143 u32 t1 = ehci_readl(ehci, reg) & ~PORT_RWC_BITS; 161 u32 t1 = ehci_readl(ehci, reg) & ~PORT_RWC_BITS;
@@ -178,7 +196,9 @@ static int ehci_bus_suspend (struct usb_hcd *hcd)
178 if (hostpc_reg) { 196 if (hostpc_reg) {
179 u32 t3; 197 u32 t3;
180 198
199 spin_unlock_irq(&ehci->lock);
181 msleep(5);/* 5ms for HCD enter low pwr mode */ 200 msleep(5);/* 5ms for HCD enter low pwr mode */
201 spin_lock_irq(&ehci->lock);
182 t3 = ehci_readl(ehci, hostpc_reg); 202 t3 = ehci_readl(ehci, hostpc_reg);
183 ehci_writel(ehci, t3 | HOSTPC_PHCD, hostpc_reg); 203 ehci_writel(ehci, t3 | HOSTPC_PHCD, hostpc_reg);
184 t3 = ehci_readl(ehci, hostpc_reg); 204 t3 = ehci_readl(ehci, hostpc_reg);
@@ -886,17 +906,18 @@ static int ehci_hub_control (
886 if ((temp & PORT_PE) == 0 906 if ((temp & PORT_PE) == 0
887 || (temp & PORT_RESET) != 0) 907 || (temp & PORT_RESET) != 0)
888 goto error; 908 goto error;
889 ehci_writel(ehci, temp | PORT_SUSPEND, status_reg); 909
890 /* After above check the port must be connected. 910 /* After above check the port must be connected.
891 * Set appropriate bit thus could put phy into low power 911 * Set appropriate bit thus could put phy into low power
892 * mode if we have hostpc feature 912 * mode if we have hostpc feature
893 */ 913 */
914 temp &= ~PORT_WKCONN_E;
915 temp |= PORT_WKDISC_E | PORT_WKOC_E;
916 ehci_writel(ehci, temp | PORT_SUSPEND, status_reg);
894 if (hostpc_reg) { 917 if (hostpc_reg) {
895 temp &= ~PORT_WKCONN_E; 918 spin_unlock_irqrestore(&ehci->lock, flags);
896 temp |= (PORT_WKDISC_E | PORT_WKOC_E);
897 ehci_writel(ehci, temp | PORT_SUSPEND,
898 status_reg);
899 msleep(5);/* 5ms for HCD enter low pwr mode */ 919 msleep(5);/* 5ms for HCD enter low pwr mode */
920 spin_lock_irqsave(&ehci->lock, flags);
900 temp1 = ehci_readl(ehci, hostpc_reg); 921 temp1 = ehci_readl(ehci, hostpc_reg);
901 ehci_writel(ehci, temp1 | HOSTPC_PHCD, 922 ehci_writel(ehci, temp1 | HOSTPC_PHCD,
902 hostpc_reg); 923 hostpc_reg);
diff --git a/drivers/usb/host/ehci-omap.c b/drivers/usb/host/ehci-omap.c
index 12f1ad2fd0e8..74d07f4e8b7d 100644
--- a/drivers/usb/host/ehci-omap.c
+++ b/drivers/usb/host/ehci-omap.c
@@ -37,7 +37,7 @@
37#include <linux/platform_device.h> 37#include <linux/platform_device.h>
38#include <linux/clk.h> 38#include <linux/clk.h>
39#include <linux/gpio.h> 39#include <linux/gpio.h>
40#include <mach/usb.h> 40#include <plat/usb.h>
41 41
42/* 42/*
43 * OMAP USBHOST Register addresses: VIRTUAL ADDRESSES 43 * OMAP USBHOST Register addresses: VIRTUAL ADDRESSES
diff --git a/drivers/usb/host/ehci-q.c b/drivers/usb/host/ehci-q.c
index a427d3b00634..89521775c567 100644
--- a/drivers/usb/host/ehci-q.c
+++ b/drivers/usb/host/ehci-q.c
@@ -849,9 +849,10 @@ qh_make (
849 * But interval 1 scheduling is simpler, and 849 * But interval 1 scheduling is simpler, and
850 * includes high bandwidth. 850 * includes high bandwidth.
851 */ 851 */
852 dbg ("intr period %d uframes, NYET!", 852 urb->interval = 1;
853 urb->interval); 853 } else if (qh->period > ehci->periodic_size) {
854 goto done; 854 qh->period = ehci->periodic_size;
855 urb->interval = qh->period << 3;
855 } 856 }
856 } else { 857 } else {
857 int think_time; 858 int think_time;
@@ -874,6 +875,10 @@ qh_make (
874 usb_calc_bus_time (urb->dev->speed, 875 usb_calc_bus_time (urb->dev->speed,
875 is_input, 0, max_packet (maxp))); 876 is_input, 0, max_packet (maxp)));
876 qh->period = urb->interval; 877 qh->period = urb->interval;
878 if (qh->period > ehci->periodic_size) {
879 qh->period = ehci->periodic_size;
880 urb->interval = qh->period;
881 }
877 } 882 }
878 } 883 }
879 884
diff --git a/drivers/usb/host/fhci-hcd.c b/drivers/usb/host/fhci-hcd.c
index 0951818ef93b..78e7c3cfcb72 100644
--- a/drivers/usb/host/fhci-hcd.c
+++ b/drivers/usb/host/fhci-hcd.c
@@ -242,9 +242,10 @@ err:
242static void fhci_usb_free(void *lld) 242static void fhci_usb_free(void *lld)
243{ 243{
244 struct fhci_usb *usb = lld; 244 struct fhci_usb *usb = lld;
245 struct fhci_hcd *fhci = usb->fhci; 245 struct fhci_hcd *fhci;
246 246
247 if (usb) { 247 if (usb) {
248 fhci = usb->fhci;
248 fhci_config_transceiver(fhci, FHCI_PORT_POWER_OFF); 249 fhci_config_transceiver(fhci, FHCI_PORT_POWER_OFF);
249 fhci_ep0_free(usb); 250 fhci_ep0_free(usb);
250 kfree(usb->actual_frame); 251 kfree(usb->actual_frame);
diff --git a/drivers/usb/host/fhci-sched.c b/drivers/usb/host/fhci-sched.c
index 00a29855d0c4..ff43747a614f 100644
--- a/drivers/usb/host/fhci-sched.c
+++ b/drivers/usb/host/fhci-sched.c
@@ -37,7 +37,7 @@ static void recycle_frame(struct fhci_usb *usb, struct packet *pkt)
37 pkt->info = 0; 37 pkt->info = 0;
38 pkt->priv_data = NULL; 38 pkt->priv_data = NULL;
39 39
40 cq_put(usb->ep0->empty_frame_Q, pkt); 40 cq_put(&usb->ep0->empty_frame_Q, pkt);
41} 41}
42 42
43/* confirm submitted packet */ 43/* confirm submitted packet */
@@ -57,7 +57,7 @@ void fhci_transaction_confirm(struct fhci_usb *usb, struct packet *pkt)
57 if ((td->data + td->actual_len) && trans_len) 57 if ((td->data + td->actual_len) && trans_len)
58 memcpy(td->data + td->actual_len, pkt->data, 58 memcpy(td->data + td->actual_len, pkt->data,
59 trans_len); 59 trans_len);
60 cq_put(usb->ep0->dummy_packets_Q, pkt->data); 60 cq_put(&usb->ep0->dummy_packets_Q, pkt->data);
61 } 61 }
62 62
63 recycle_frame(usb, pkt); 63 recycle_frame(usb, pkt);
@@ -213,7 +213,7 @@ static int add_packet(struct fhci_usb *usb, struct ed *ed, struct td *td)
213 } 213 }
214 214
215 /* update frame object fields before transmitting */ 215 /* update frame object fields before transmitting */
216 pkt = cq_get(usb->ep0->empty_frame_Q); 216 pkt = cq_get(&usb->ep0->empty_frame_Q);
217 if (!pkt) { 217 if (!pkt) {
218 fhci_dbg(usb->fhci, "there is no empty frame\n"); 218 fhci_dbg(usb->fhci, "there is no empty frame\n");
219 return -1; 219 return -1;
@@ -222,7 +222,7 @@ static int add_packet(struct fhci_usb *usb, struct ed *ed, struct td *td)
222 222
223 pkt->info = 0; 223 pkt->info = 0;
224 if (data == NULL) { 224 if (data == NULL) {
225 data = cq_get(usb->ep0->dummy_packets_Q); 225 data = cq_get(&usb->ep0->dummy_packets_Q);
226 BUG_ON(!data); 226 BUG_ON(!data);
227 pkt->info = PKT_DUMMY_PACKET; 227 pkt->info = PKT_DUMMY_PACKET;
228 } 228 }
@@ -246,7 +246,7 @@ static int add_packet(struct fhci_usb *usb, struct ed *ed, struct td *td)
246 list_del_init(&td->frame_lh); 246 list_del_init(&td->frame_lh);
247 td->status = USB_TD_OK; 247 td->status = USB_TD_OK;
248 if (pkt->info & PKT_DUMMY_PACKET) 248 if (pkt->info & PKT_DUMMY_PACKET)
249 cq_put(usb->ep0->dummy_packets_Q, pkt->data); 249 cq_put(&usb->ep0->dummy_packets_Q, pkt->data);
250 recycle_frame(usb, pkt); 250 recycle_frame(usb, pkt);
251 usb->actual_frame->total_bytes -= (len + PROTOCOL_OVERHEAD); 251 usb->actual_frame->total_bytes -= (len + PROTOCOL_OVERHEAD);
252 fhci_err(usb->fhci, "host transaction failed\n"); 252 fhci_err(usb->fhci, "host transaction failed\n");
diff --git a/drivers/usb/host/fhci-tds.c b/drivers/usb/host/fhci-tds.c
index b40332290319..e1232890c78b 100644
--- a/drivers/usb/host/fhci-tds.c
+++ b/drivers/usb/host/fhci-tds.c
@@ -105,34 +105,34 @@ void fhci_ep0_free(struct fhci_usb *usb)
105 if (ep->td_base) 105 if (ep->td_base)
106 cpm_muram_free(cpm_muram_offset(ep->td_base)); 106 cpm_muram_free(cpm_muram_offset(ep->td_base));
107 107
108 if (ep->conf_frame_Q) { 108 if (kfifo_initialized(&ep->conf_frame_Q)) {
109 size = cq_howmany(ep->conf_frame_Q); 109 size = cq_howmany(&ep->conf_frame_Q);
110 for (; size; size--) { 110 for (; size; size--) {
111 struct packet *pkt = cq_get(ep->conf_frame_Q); 111 struct packet *pkt = cq_get(&ep->conf_frame_Q);
112 112
113 kfree(pkt); 113 kfree(pkt);
114 } 114 }
115 cq_delete(ep->conf_frame_Q); 115 cq_delete(&ep->conf_frame_Q);
116 } 116 }
117 117
118 if (ep->empty_frame_Q) { 118 if (kfifo_initialized(&ep->empty_frame_Q)) {
119 size = cq_howmany(ep->empty_frame_Q); 119 size = cq_howmany(&ep->empty_frame_Q);
120 for (; size; size--) { 120 for (; size; size--) {
121 struct packet *pkt = cq_get(ep->empty_frame_Q); 121 struct packet *pkt = cq_get(&ep->empty_frame_Q);
122 122
123 kfree(pkt); 123 kfree(pkt);
124 } 124 }
125 cq_delete(ep->empty_frame_Q); 125 cq_delete(&ep->empty_frame_Q);
126 } 126 }
127 127
128 if (ep->dummy_packets_Q) { 128 if (kfifo_initialized(&ep->dummy_packets_Q)) {
129 size = cq_howmany(ep->dummy_packets_Q); 129 size = cq_howmany(&ep->dummy_packets_Q);
130 for (; size; size--) { 130 for (; size; size--) {
131 u8 *buff = cq_get(ep->dummy_packets_Q); 131 u8 *buff = cq_get(&ep->dummy_packets_Q);
132 132
133 kfree(buff); 133 kfree(buff);
134 } 134 }
135 cq_delete(ep->dummy_packets_Q); 135 cq_delete(&ep->dummy_packets_Q);
136 } 136 }
137 137
138 kfree(ep); 138 kfree(ep);
@@ -175,10 +175,9 @@ u32 fhci_create_ep(struct fhci_usb *usb, enum fhci_mem_alloc data_mem,
175 ep->td_base = cpm_muram_addr(ep_offset); 175 ep->td_base = cpm_muram_addr(ep_offset);
176 176
177 /* zero all queue pointers */ 177 /* zero all queue pointers */
178 ep->conf_frame_Q = cq_new(ring_len + 2); 178 if (cq_new(&ep->conf_frame_Q, ring_len + 2) ||
179 ep->empty_frame_Q = cq_new(ring_len + 2); 179 cq_new(&ep->empty_frame_Q, ring_len + 2) ||
180 ep->dummy_packets_Q = cq_new(ring_len + 2); 180 cq_new(&ep->dummy_packets_Q, ring_len + 2)) {
181 if (!ep->conf_frame_Q || !ep->empty_frame_Q || !ep->dummy_packets_Q) {
182 err_for = "frame_queues"; 181 err_for = "frame_queues";
183 goto err; 182 goto err;
184 } 183 }
@@ -199,8 +198,8 @@ u32 fhci_create_ep(struct fhci_usb *usb, enum fhci_mem_alloc data_mem,
199 err_for = "buffer"; 198 err_for = "buffer";
200 goto err; 199 goto err;
201 } 200 }
202 cq_put(ep->empty_frame_Q, pkt); 201 cq_put(&ep->empty_frame_Q, pkt);
203 cq_put(ep->dummy_packets_Q, buff); 202 cq_put(&ep->dummy_packets_Q, buff);
204 } 203 }
205 204
206 /* we put the endpoint parameter RAM right behind the TD ring */ 205 /* we put the endpoint parameter RAM right behind the TD ring */
@@ -319,7 +318,7 @@ static void fhci_td_transaction_confirm(struct fhci_usb *usb)
319 if ((buf == DUMMY2_BD_BUFFER) && !(td_status & ~TD_W)) 318 if ((buf == DUMMY2_BD_BUFFER) && !(td_status & ~TD_W))
320 continue; 319 continue;
321 320
322 pkt = cq_get(ep->conf_frame_Q); 321 pkt = cq_get(&ep->conf_frame_Q);
323 if (!pkt) 322 if (!pkt)
324 fhci_err(usb->fhci, "no frame to confirm\n"); 323 fhci_err(usb->fhci, "no frame to confirm\n");
325 324
@@ -460,9 +459,9 @@ u32 fhci_host_transaction(struct fhci_usb *usb,
460 out_be16(&td->length, pkt->len); 459 out_be16(&td->length, pkt->len);
461 460
462 /* put the frame to the confirmation queue */ 461 /* put the frame to the confirmation queue */
463 cq_put(ep->conf_frame_Q, pkt); 462 cq_put(&ep->conf_frame_Q, pkt);
464 463
465 if (cq_howmany(ep->conf_frame_Q) == 1) 464 if (cq_howmany(&ep->conf_frame_Q) == 1)
466 out_8(&usb->fhci->regs->usb_comm, USB_CMD_STR_FIFO); 465 out_8(&usb->fhci->regs->usb_comm, USB_CMD_STR_FIFO);
467 466
468 return 0; 467 return 0;
diff --git a/drivers/usb/host/fhci.h b/drivers/usb/host/fhci.h
index 7116284ed21a..72dae1c5ab38 100644
--- a/drivers/usb/host/fhci.h
+++ b/drivers/usb/host/fhci.h
@@ -423,9 +423,9 @@ struct endpoint {
423 struct usb_td __iomem *td_base; /* first TD in the ring */ 423 struct usb_td __iomem *td_base; /* first TD in the ring */
424 struct usb_td __iomem *conf_td; /* next TD for confirm after transac */ 424 struct usb_td __iomem *conf_td; /* next TD for confirm after transac */
425 struct usb_td __iomem *empty_td;/* next TD for new transaction req. */ 425 struct usb_td __iomem *empty_td;/* next TD for new transaction req. */
426 struct kfifo *empty_frame_Q; /* Empty frames list to use */ 426 struct kfifo empty_frame_Q; /* Empty frames list to use */
427 struct kfifo *conf_frame_Q; /* frames passed to TDs,waiting for tx */ 427 struct kfifo conf_frame_Q; /* frames passed to TDs,waiting for tx */
428 struct kfifo *dummy_packets_Q;/* dummy packets for the CRC overun */ 428 struct kfifo dummy_packets_Q;/* dummy packets for the CRC overun */
429 429
430 bool already_pushed_dummy_bd; 430 bool already_pushed_dummy_bd;
431}; 431};
@@ -493,9 +493,9 @@ static inline struct usb_hcd *fhci_to_hcd(struct fhci_hcd *fhci)
493} 493}
494 494
495/* fifo of pointers */ 495/* fifo of pointers */
496static inline struct kfifo *cq_new(int size) 496static inline int cq_new(struct kfifo *fifo, int size)
497{ 497{
498 return kfifo_alloc(size * sizeof(void *), GFP_KERNEL, NULL); 498 return kfifo_alloc(fifo, size * sizeof(void *), GFP_KERNEL);
499} 499}
500 500
501static inline void cq_delete(struct kfifo *kfifo) 501static inline void cq_delete(struct kfifo *kfifo)
@@ -505,19 +505,19 @@ static inline void cq_delete(struct kfifo *kfifo)
505 505
506static inline unsigned int cq_howmany(struct kfifo *kfifo) 506static inline unsigned int cq_howmany(struct kfifo *kfifo)
507{ 507{
508 return __kfifo_len(kfifo) / sizeof(void *); 508 return kfifo_len(kfifo) / sizeof(void *);
509} 509}
510 510
511static inline int cq_put(struct kfifo *kfifo, void *p) 511static inline int cq_put(struct kfifo *kfifo, void *p)
512{ 512{
513 return __kfifo_put(kfifo, (void *)&p, sizeof(p)); 513 return kfifo_in(kfifo, (void *)&p, sizeof(p));
514} 514}
515 515
516static inline void *cq_get(struct kfifo *kfifo) 516static inline void *cq_get(struct kfifo *kfifo)
517{ 517{
518 void *p = NULL; 518 void *p = NULL;
519 519
520 __kfifo_get(kfifo, (void *)&p, sizeof(p)); 520 kfifo_out(kfifo, (void *)&p, sizeof(p));
521 return p; 521 return p;
522} 522}
523 523
diff --git a/drivers/usb/host/isp1362-hcd.c b/drivers/usb/host/isp1362-hcd.c
index 73352f3739b5..42971657fde2 100644
--- a/drivers/usb/host/isp1362-hcd.c
+++ b/drivers/usb/host/isp1362-hcd.c
@@ -2270,10 +2270,10 @@ static int isp1362_mem_config(struct usb_hcd *hcd)
2270 dev_info(hcd->self.controller, "ISP1362 Memory usage:\n"); 2270 dev_info(hcd->self.controller, "ISP1362 Memory usage:\n");
2271 dev_info(hcd->self.controller, " ISTL: 2 * %4d: %4d @ $%04x:$%04x\n", 2271 dev_info(hcd->self.controller, " ISTL: 2 * %4d: %4d @ $%04x:$%04x\n",
2272 istl_size / 2, istl_size, 0, istl_size / 2); 2272 istl_size / 2, istl_size, 0, istl_size / 2);
2273 dev_info(hcd->self.controller, " INTL: %4d * (%3lu+8): %4d @ $%04x\n", 2273 dev_info(hcd->self.controller, " INTL: %4d * (%3zu+8): %4d @ $%04x\n",
2274 ISP1362_INTL_BUFFERS, intl_blksize - PTD_HEADER_SIZE, 2274 ISP1362_INTL_BUFFERS, intl_blksize - PTD_HEADER_SIZE,
2275 intl_size, istl_size); 2275 intl_size, istl_size);
2276 dev_info(hcd->self.controller, " ATL : %4d * (%3lu+8): %4d @ $%04x\n", 2276 dev_info(hcd->self.controller, " ATL : %4d * (%3zu+8): %4d @ $%04x\n",
2277 atl_buffers, atl_blksize - PTD_HEADER_SIZE, 2277 atl_buffers, atl_blksize - PTD_HEADER_SIZE,
2278 atl_size, istl_size + intl_size); 2278 atl_size, istl_size + intl_size);
2279 dev_info(hcd->self.controller, " USED/FREE: %4d %4d\n", total, 2279 dev_info(hcd->self.controller, " USED/FREE: %4d %4d\n", total,
@@ -2697,6 +2697,8 @@ static int __init isp1362_probe(struct platform_device *pdev)
2697 void __iomem *data_reg; 2697 void __iomem *data_reg;
2698 int irq; 2698 int irq;
2699 int retval = 0; 2699 int retval = 0;
2700 struct resource *irq_res;
2701 unsigned int irq_flags = 0;
2700 2702
2701 /* basic sanity checks first. board-specific init logic should 2703 /* basic sanity checks first. board-specific init logic should
2702 * have initialized this the three resources and probably board 2704 * have initialized this the three resources and probably board
@@ -2710,11 +2712,12 @@ static int __init isp1362_probe(struct platform_device *pdev)
2710 2712
2711 data = platform_get_resource(pdev, IORESOURCE_MEM, 0); 2713 data = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2712 addr = platform_get_resource(pdev, IORESOURCE_MEM, 1); 2714 addr = platform_get_resource(pdev, IORESOURCE_MEM, 1);
2713 irq = platform_get_irq(pdev, 0); 2715 irq_res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
2714 if (!addr || !data || irq < 0) { 2716 if (!addr || !data || !irq_res) {
2715 retval = -ENODEV; 2717 retval = -ENODEV;
2716 goto err1; 2718 goto err1;
2717 } 2719 }
2720 irq = irq_res->start;
2718 2721
2719#ifdef CONFIG_USB_HCD_DMA 2722#ifdef CONFIG_USB_HCD_DMA
2720 if (pdev->dev.dma_mask) { 2723 if (pdev->dev.dma_mask) {
@@ -2781,12 +2784,16 @@ static int __init isp1362_probe(struct platform_device *pdev)
2781 } 2784 }
2782#endif 2785#endif
2783 2786
2784#ifdef CONFIG_ARM 2787 if (irq_res->flags & IORESOURCE_IRQ_HIGHEDGE)
2785 if (isp1362_hcd->board) 2788 irq_flags |= IRQF_TRIGGER_RISING;
2786 set_irq_type(irq, isp1362_hcd->board->int_act_high ? IRQT_RISING : IRQT_FALLING); 2789 if (irq_res->flags & IORESOURCE_IRQ_LOWEDGE)
2787#endif 2790 irq_flags |= IRQF_TRIGGER_FALLING;
2791 if (irq_res->flags & IORESOURCE_IRQ_HIGHLEVEL)
2792 irq_flags |= IRQF_TRIGGER_HIGH;
2793 if (irq_res->flags & IORESOURCE_IRQ_LOWLEVEL)
2794 irq_flags |= IRQF_TRIGGER_LOW;
2788 2795
2789 retval = usb_add_hcd(hcd, irq, IRQF_TRIGGER_LOW | IRQF_DISABLED | IRQF_SHARED); 2796 retval = usb_add_hcd(hcd, irq, irq_flags | IRQF_DISABLED | IRQF_SHARED);
2790 if (retval != 0) 2797 if (retval != 0)
2791 goto err6; 2798 goto err6;
2792 pr_info("%s, irq %d\n", hcd->product_desc, irq); 2799 pr_info("%s, irq %d\n", hcd->product_desc, irq);
diff --git a/drivers/usb/host/isp1760-hcd.c b/drivers/usb/host/isp1760-hcd.c
index 9600a58299db..27b8f7cb4471 100644
--- a/drivers/usb/host/isp1760-hcd.c
+++ b/drivers/usb/host/isp1760-hcd.c
@@ -1039,12 +1039,12 @@ static void do_atl_int(struct usb_hcd *usb_hcd)
1039 if (!nakcount && (dw3 & DW3_QTD_ACTIVE)) { 1039 if (!nakcount && (dw3 & DW3_QTD_ACTIVE)) {
1040 u32 buffstatus; 1040 u32 buffstatus;
1041 1041
1042 /* XXX 1042 /*
1043 * NAKs are handled in HW by the chip. Usually if the 1043 * NAKs are handled in HW by the chip. Usually if the
1044 * device is not able to send data fast enough. 1044 * device is not able to send data fast enough.
1045 * This did not trigger for a long time now. 1045 * This happens mostly on slower hardware.
1046 */ 1046 */
1047 printk(KERN_ERR "Reloading ptd %p/%p... qh %p readed: " 1047 printk(KERN_NOTICE "Reloading ptd %p/%p... qh %p read: "
1048 "%d of %zu done: %08x cur: %08x\n", qtd, 1048 "%d of %zu done: %08x cur: %08x\n", qtd,
1049 urb, qh, PTD_XFERRED_LENGTH(dw3), 1049 urb, qh, PTD_XFERRED_LENGTH(dw3),
1050 qtd->length, done_map, 1050 qtd->length, done_map,
diff --git a/drivers/usb/host/r8a66597-hcd.c b/drivers/usb/host/r8a66597-hcd.c
index b7a661c02bcd..bee558aed427 100644
--- a/drivers/usb/host/r8a66597-hcd.c
+++ b/drivers/usb/host/r8a66597-hcd.c
@@ -35,7 +35,9 @@
35#include <linux/usb.h> 35#include <linux/usb.h>
36#include <linux/platform_device.h> 36#include <linux/platform_device.h>
37#include <linux/io.h> 37#include <linux/io.h>
38#include <linux/mm.h>
38#include <linux/irq.h> 39#include <linux/irq.h>
40#include <asm/cacheflush.h>
39 41
40#include "../core/hcd.h" 42#include "../core/hcd.h"
41#include "r8a66597.h" 43#include "r8a66597.h"
@@ -216,8 +218,17 @@ static void disable_controller(struct r8a66597 *r8a66597)
216{ 218{
217 int port; 219 int port;
218 220
221 /* disable interrupts */
219 r8a66597_write(r8a66597, 0, INTENB0); 222 r8a66597_write(r8a66597, 0, INTENB0);
220 r8a66597_write(r8a66597, 0, INTSTS0); 223 r8a66597_write(r8a66597, 0, INTENB1);
224 r8a66597_write(r8a66597, 0, BRDYENB);
225 r8a66597_write(r8a66597, 0, BEMPENB);
226 r8a66597_write(r8a66597, 0, NRDYENB);
227
228 /* clear status */
229 r8a66597_write(r8a66597, 0, BRDYSTS);
230 r8a66597_write(r8a66597, 0, NRDYSTS);
231 r8a66597_write(r8a66597, 0, BEMPSTS);
221 232
222 for (port = 0; port < r8a66597->max_root_hub; port++) 233 for (port = 0; port < r8a66597->max_root_hub; port++)
223 r8a66597_disable_port(r8a66597, port); 234 r8a66597_disable_port(r8a66597, port);
@@ -811,6 +822,26 @@ static void enable_r8a66597_pipe(struct r8a66597 *r8a66597, struct urb *urb,
811 enable_r8a66597_pipe_dma(r8a66597, dev, pipe, urb); 822 enable_r8a66597_pipe_dma(r8a66597, dev, pipe, urb);
812} 823}
813 824
825static void r8a66597_urb_done(struct r8a66597 *r8a66597, struct urb *urb,
826 int status)
827__releases(r8a66597->lock)
828__acquires(r8a66597->lock)
829{
830 if (usb_pipein(urb->pipe) && usb_pipetype(urb->pipe) != PIPE_CONTROL) {
831 void *ptr;
832
833 for (ptr = urb->transfer_buffer;
834 ptr < urb->transfer_buffer + urb->transfer_buffer_length;
835 ptr += PAGE_SIZE)
836 flush_dcache_page(virt_to_page(ptr));
837 }
838
839 usb_hcd_unlink_urb_from_ep(r8a66597_to_hcd(r8a66597), urb);
840 spin_unlock(&r8a66597->lock);
841 usb_hcd_giveback_urb(r8a66597_to_hcd(r8a66597), urb, status);
842 spin_lock(&r8a66597->lock);
843}
844
814/* this function must be called with interrupt disabled */ 845/* this function must be called with interrupt disabled */
815static void force_dequeue(struct r8a66597 *r8a66597, u16 pipenum, u16 address) 846static void force_dequeue(struct r8a66597 *r8a66597, u16 pipenum, u16 address)
816{ 847{
@@ -829,15 +860,9 @@ static void force_dequeue(struct r8a66597 *r8a66597, u16 pipenum, u16 address)
829 list_del(&td->queue); 860 list_del(&td->queue);
830 kfree(td); 861 kfree(td);
831 862
832 if (urb) { 863 if (urb)
833 usb_hcd_unlink_urb_from_ep(r8a66597_to_hcd(r8a66597), 864 r8a66597_urb_done(r8a66597, urb, -ENODEV);
834 urb);
835 865
836 spin_unlock(&r8a66597->lock);
837 usb_hcd_giveback_urb(r8a66597_to_hcd(r8a66597), urb,
838 -ENODEV);
839 spin_lock(&r8a66597->lock);
840 }
841 break; 866 break;
842 } 867 }
843} 868}
@@ -997,6 +1022,8 @@ static void start_root_hub_sampling(struct r8a66597 *r8a66597, int port,
997/* this function must be called with interrupt disabled */ 1022/* this function must be called with interrupt disabled */
998static void r8a66597_check_syssts(struct r8a66597 *r8a66597, int port, 1023static void r8a66597_check_syssts(struct r8a66597 *r8a66597, int port,
999 u16 syssts) 1024 u16 syssts)
1025__releases(r8a66597->lock)
1026__acquires(r8a66597->lock)
1000{ 1027{
1001 if (syssts == SE0) { 1028 if (syssts == SE0) {
1002 r8a66597_write(r8a66597, ~ATTCH, get_intsts_reg(port)); 1029 r8a66597_write(r8a66597, ~ATTCH, get_intsts_reg(port));
@@ -1014,7 +1041,9 @@ static void r8a66597_check_syssts(struct r8a66597 *r8a66597, int port,
1014 usb_hcd_resume_root_hub(r8a66597_to_hcd(r8a66597)); 1041 usb_hcd_resume_root_hub(r8a66597_to_hcd(r8a66597));
1015 } 1042 }
1016 1043
1044 spin_unlock(&r8a66597->lock);
1017 usb_hcd_poll_rh_status(r8a66597_to_hcd(r8a66597)); 1045 usb_hcd_poll_rh_status(r8a66597_to_hcd(r8a66597));
1046 spin_lock(&r8a66597->lock);
1018} 1047}
1019 1048
1020/* this function must be called with interrupt disabled */ 1049/* this function must be called with interrupt disabled */
@@ -1274,10 +1303,7 @@ __releases(r8a66597->lock) __acquires(r8a66597->lock)
1274 if (usb_pipeisoc(urb->pipe)) 1303 if (usb_pipeisoc(urb->pipe))
1275 urb->start_frame = r8a66597_get_frame(hcd); 1304 urb->start_frame = r8a66597_get_frame(hcd);
1276 1305
1277 usb_hcd_unlink_urb_from_ep(r8a66597_to_hcd(r8a66597), urb); 1306 r8a66597_urb_done(r8a66597, urb, status);
1278 spin_unlock(&r8a66597->lock);
1279 usb_hcd_giveback_urb(hcd, urb, status);
1280 spin_lock(&r8a66597->lock);
1281 } 1307 }
1282 1308
1283 if (restart) { 1309 if (restart) {
@@ -2466,6 +2492,12 @@ static int __devinit r8a66597_probe(struct platform_device *pdev)
2466 r8a66597->rh_timer.data = (unsigned long)r8a66597; 2492 r8a66597->rh_timer.data = (unsigned long)r8a66597;
2467 r8a66597->reg = (unsigned long)reg; 2493 r8a66597->reg = (unsigned long)reg;
2468 2494
2495 /* make sure no interrupts are pending */
2496 ret = r8a66597_clock_enable(r8a66597);
2497 if (ret < 0)
2498 goto clean_up3;
2499 disable_controller(r8a66597);
2500
2469 for (i = 0; i < R8A66597_MAX_NUM_PIPE; i++) { 2501 for (i = 0; i < R8A66597_MAX_NUM_PIPE; i++) {
2470 INIT_LIST_HEAD(&r8a66597->pipe_queue[i]); 2502 INIT_LIST_HEAD(&r8a66597->pipe_queue[i]);
2471 init_timer(&r8a66597->td_timer[i]); 2503 init_timer(&r8a66597->td_timer[i]);
diff --git a/drivers/usb/host/uhci-hcd.c b/drivers/usb/host/uhci-hcd.c
index 5cd0e48f67fb..99cd00fd3514 100644
--- a/drivers/usb/host/uhci-hcd.c
+++ b/drivers/usb/host/uhci-hcd.c
@@ -749,7 +749,20 @@ static int uhci_rh_suspend(struct usb_hcd *hcd)
749 spin_lock_irq(&uhci->lock); 749 spin_lock_irq(&uhci->lock);
750 if (!test_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags)) 750 if (!test_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags))
751 rc = -ESHUTDOWN; 751 rc = -ESHUTDOWN;
752 else if (!uhci->dead) 752 else if (uhci->dead)
753 ; /* Dead controllers tell no tales */
754
755 /* Once the controller is stopped, port resumes that are already
756 * in progress won't complete. Hence if remote wakeup is enabled
757 * for the root hub and any ports are in the middle of a resume or
758 * remote wakeup, we must fail the suspend.
759 */
760 else if (hcd->self.root_hub->do_remote_wakeup &&
761 uhci->resuming_ports) {
762 dev_dbg(uhci_dev(uhci), "suspend failed because a port "
763 "is resuming\n");
764 rc = -EBUSY;
765 } else
753 suspend_rh(uhci, UHCI_RH_SUSPENDED); 766 suspend_rh(uhci, UHCI_RH_SUSPENDED);
754 spin_unlock_irq(&uhci->lock); 767 spin_unlock_irq(&uhci->lock);
755 return rc; 768 return rc;
diff --git a/drivers/usb/host/uhci-hub.c b/drivers/usb/host/uhci-hub.c
index 885b585360b9..8270055848ca 100644
--- a/drivers/usb/host/uhci-hub.c
+++ b/drivers/usb/host/uhci-hub.c
@@ -167,7 +167,7 @@ static void uhci_check_ports(struct uhci_hcd *uhci)
167 /* Port received a wakeup request */ 167 /* Port received a wakeup request */
168 set_bit(port, &uhci->resuming_ports); 168 set_bit(port, &uhci->resuming_ports);
169 uhci->ports_timeout = jiffies + 169 uhci->ports_timeout = jiffies +
170 msecs_to_jiffies(20); 170 msecs_to_jiffies(25);
171 171
172 /* Make sure we see the port again 172 /* Make sure we see the port again
173 * after the resuming period is over. */ 173 * after the resuming period is over. */
diff --git a/drivers/usb/misc/appledisplay.c b/drivers/usb/misc/appledisplay.c
index 1d8e39a557d9..1eb9e4162cc6 100644
--- a/drivers/usb/misc/appledisplay.c
+++ b/drivers/usb/misc/appledisplay.c
@@ -60,6 +60,7 @@
60static struct usb_device_id appledisplay_table [] = { 60static struct usb_device_id appledisplay_table [] = {
61 { APPLEDISPLAY_DEVICE(0x9218) }, 61 { APPLEDISPLAY_DEVICE(0x9218) },
62 { APPLEDISPLAY_DEVICE(0x9219) }, 62 { APPLEDISPLAY_DEVICE(0x9219) },
63 { APPLEDISPLAY_DEVICE(0x921c) },
63 { APPLEDISPLAY_DEVICE(0x921d) }, 64 { APPLEDISPLAY_DEVICE(0x921d) },
64 65
65 /* Terminating entry */ 66 /* Terminating entry */
@@ -72,8 +73,8 @@ struct appledisplay {
72 struct usb_device *udev; /* usb device */ 73 struct usb_device *udev; /* usb device */
73 struct urb *urb; /* usb request block */ 74 struct urb *urb; /* usb request block */
74 struct backlight_device *bd; /* backlight device */ 75 struct backlight_device *bd; /* backlight device */
75 char *urbdata; /* interrupt URB data buffer */ 76 u8 *urbdata; /* interrupt URB data buffer */
76 char *msgdata; /* control message data buffer */ 77 u8 *msgdata; /* control message data buffer */
77 78
78 struct delayed_work work; 79 struct delayed_work work;
79 int button_pressed; 80 int button_pressed;
diff --git a/drivers/usb/misc/emi62.c b/drivers/usb/misc/emi62.c
index 602ee05ba9ff..59860b328534 100644
--- a/drivers/usb/misc/emi62.c
+++ b/drivers/usb/misc/emi62.c
@@ -167,7 +167,7 @@ static int emi62_load_firmware (struct usb_device *dev)
167 err("%s - error loading firmware: error = %d", __func__, err); 167 err("%s - error loading firmware: error = %d", __func__, err);
168 goto wraperr; 168 goto wraperr;
169 } 169 }
170 } while (i > 0); 170 } while (rec);
171 171
172 /* Assert reset (stop the CPU in the EMI) */ 172 /* Assert reset (stop the CPU in the EMI) */
173 err = emi62_set_reset(dev,1); 173 err = emi62_set_reset(dev,1);
diff --git a/drivers/usb/misc/sisusbvga/sisusb.c b/drivers/usb/misc/sisusbvga/sisusb.c
index 0025847743f3..8b37a4b9839e 100644
--- a/drivers/usb/misc/sisusbvga/sisusb.c
+++ b/drivers/usb/misc/sisusbvga/sisusb.c
@@ -3245,6 +3245,7 @@ static struct usb_device_id sisusb_table [] = {
3245 { USB_DEVICE(0x0711, 0x0902) }, 3245 { USB_DEVICE(0x0711, 0x0902) },
3246 { USB_DEVICE(0x0711, 0x0903) }, 3246 { USB_DEVICE(0x0711, 0x0903) },
3247 { USB_DEVICE(0x0711, 0x0918) }, 3247 { USB_DEVICE(0x0711, 0x0918) },
3248 { USB_DEVICE(0x0711, 0x0920) },
3248 { USB_DEVICE(0x182d, 0x021c) }, 3249 { USB_DEVICE(0x182d, 0x021c) },
3249 { USB_DEVICE(0x182d, 0x0269) }, 3250 { USB_DEVICE(0x182d, 0x0269) },
3250 { } 3251 { }
diff --git a/drivers/usb/musb/blackfin.c b/drivers/usb/musb/blackfin.c
index fe4934d9602c..ad26e6569665 100644
--- a/drivers/usb/musb/blackfin.c
+++ b/drivers/usb/musb/blackfin.c
@@ -29,6 +29,8 @@ void musb_write_fifo(struct musb_hw_ep *hw_ep, u16 len, const u8 *src)
29{ 29{
30 void __iomem *fifo = hw_ep->fifo; 30 void __iomem *fifo = hw_ep->fifo;
31 void __iomem *epio = hw_ep->regs; 31 void __iomem *epio = hw_ep->regs;
32 u8 epnum = hw_ep->epnum;
33 u16 dma_reg = 0;
32 34
33 prefetch((u8 *)src); 35 prefetch((u8 *)src);
34 36
@@ -39,67 +41,113 @@ void musb_write_fifo(struct musb_hw_ep *hw_ep, u16 len, const u8 *src)
39 41
40 dump_fifo_data(src, len); 42 dump_fifo_data(src, len);
41 43
42 if (unlikely((unsigned long)src & 0x01)) 44 if (!ANOMALY_05000380 && epnum != 0) {
43 outsw_8((unsigned long)fifo, src, 45 flush_dcache_range((unsigned int)src,
44 len & 0x01 ? (len >> 1) + 1 : len >> 1); 46 (unsigned int)(src + len));
45 else 47
46 outsw((unsigned long)fifo, src, 48 /* Setup DMA address register */
47 len & 0x01 ? (len >> 1) + 1 : len >> 1); 49 dma_reg = (u16) ((u32) src & 0xFFFF);
48} 50 bfin_write16(USB_DMA_REG(epnum, USB_DMAx_ADDR_LOW), dma_reg);
51 SSYNC();
52
53 dma_reg = (u16) (((u32) src >> 16) & 0xFFFF);
54 bfin_write16(USB_DMA_REG(epnum, USB_DMAx_ADDR_HIGH), dma_reg);
55 SSYNC();
56
57 /* Setup DMA count register */
58 bfin_write16(USB_DMA_REG(epnum, USB_DMAx_COUNT_LOW), len);
59 bfin_write16(USB_DMA_REG(epnum, USB_DMAx_COUNT_HIGH), 0);
60 SSYNC();
61
62 /* Enable the DMA */
63 dma_reg = (epnum << 4) | DMA_ENA | INT_ENA | DIRECTION;
64 bfin_write16(USB_DMA_REG(epnum, USB_DMAx_CTRL), dma_reg);
65 SSYNC();
66
67 /* Wait for compelete */
68 while (!(bfin_read_USB_DMA_INTERRUPT() & (1 << epnum)))
69 cpu_relax();
70
71 /* acknowledge dma interrupt */
72 bfin_write_USB_DMA_INTERRUPT(1 << epnum);
73 SSYNC();
74
75 /* Reset DMA */
76 bfin_write16(USB_DMA_REG(epnum, USB_DMAx_CTRL), 0);
77 SSYNC();
78 } else {
79 SSYNC();
80
81 if (unlikely((unsigned long)src & 0x01))
82 outsw_8((unsigned long)fifo, src,
83 len & 0x01 ? (len >> 1) + 1 : len >> 1);
84 else
85 outsw((unsigned long)fifo, src,
86 len & 0x01 ? (len >> 1) + 1 : len >> 1);
49 87
88 }
89}
50/* 90/*
51 * Unload an endpoint's FIFO 91 * Unload an endpoint's FIFO
52 */ 92 */
53void musb_read_fifo(struct musb_hw_ep *hw_ep, u16 len, u8 *dst) 93void musb_read_fifo(struct musb_hw_ep *hw_ep, u16 len, u8 *dst)
54{ 94{
55 void __iomem *fifo = hw_ep->fifo; 95 void __iomem *fifo = hw_ep->fifo;
56
57#ifdef CONFIG_BF52x
58 u8 epnum = hw_ep->epnum; 96 u8 epnum = hw_ep->epnum;
59 u16 dma_reg = 0; 97 u16 dma_reg = 0;
60 98
61 invalidate_dcache_range((unsigned int)dst, 99 if (ANOMALY_05000467 && epnum != 0) {
62 (unsigned int)(dst + len));
63 100
64 /* Setup DMA address register */ 101 invalidate_dcache_range((unsigned int)dst,
65 dma_reg = (u16) ((u32) dst & 0xFFFF); 102 (unsigned int)(dst + len));
66 bfin_write16(USB_DMA_REG(epnum, USB_DMAx_ADDR_LOW), dma_reg);
67 SSYNC();
68 103
69 dma_reg = (u16) (((u32) dst >> 16) & 0xFFFF); 104 /* Setup DMA address register */
70 bfin_write16(USB_DMA_REG(epnum, USB_DMAx_ADDR_HIGH), dma_reg); 105 dma_reg = (u16) ((u32) dst & 0xFFFF);
71 SSYNC(); 106 bfin_write16(USB_DMA_REG(epnum, USB_DMAx_ADDR_LOW), dma_reg);
107 SSYNC();
72 108
73 /* Setup DMA count register */ 109 dma_reg = (u16) (((u32) dst >> 16) & 0xFFFF);
74 bfin_write16(USB_DMA_REG(epnum, USB_DMAx_COUNT_LOW), len); 110 bfin_write16(USB_DMA_REG(epnum, USB_DMAx_ADDR_HIGH), dma_reg);
75 bfin_write16(USB_DMA_REG(epnum, USB_DMAx_COUNT_HIGH), 0); 111 SSYNC();
76 SSYNC();
77 112
78 /* Enable the DMA */ 113 /* Setup DMA count register */
79 dma_reg = (epnum << 4) | DMA_ENA | INT_ENA; 114 bfin_write16(USB_DMA_REG(epnum, USB_DMAx_COUNT_LOW), len);
80 bfin_write16(USB_DMA_REG(epnum, USB_DMAx_CTRL), dma_reg); 115 bfin_write16(USB_DMA_REG(epnum, USB_DMAx_COUNT_HIGH), 0);
81 SSYNC(); 116 SSYNC();
82 117
83 /* Wait for compelete */ 118 /* Enable the DMA */
84 while (!(bfin_read_USB_DMA_INTERRUPT() & (1 << epnum))) 119 dma_reg = (epnum << 4) | DMA_ENA | INT_ENA;
85 cpu_relax(); 120 bfin_write16(USB_DMA_REG(epnum, USB_DMAx_CTRL), dma_reg);
121 SSYNC();
86 122
87 /* acknowledge dma interrupt */ 123 /* Wait for compelete */
88 bfin_write_USB_DMA_INTERRUPT(1 << epnum); 124 while (!(bfin_read_USB_DMA_INTERRUPT() & (1 << epnum)))
89 SSYNC(); 125 cpu_relax();
90 126
91 /* Reset DMA */ 127 /* acknowledge dma interrupt */
92 bfin_write16(USB_DMA_REG(epnum, USB_DMAx_CTRL), 0); 128 bfin_write_USB_DMA_INTERRUPT(1 << epnum);
93 SSYNC(); 129 SSYNC();
94#else
95 if (unlikely((unsigned long)dst & 0x01))
96 insw_8((unsigned long)fifo, dst,
97 len & 0x01 ? (len >> 1) + 1 : len >> 1);
98 else
99 insw((unsigned long)fifo, dst,
100 len & 0x01 ? (len >> 1) + 1 : len >> 1);
101#endif
102 130
131 /* Reset DMA */
132 bfin_write16(USB_DMA_REG(epnum, USB_DMAx_CTRL), 0);
133 SSYNC();
134 } else {
135 SSYNC();
136 /* Read the last byte of packet with odd size from address fifo + 4
137 * to trigger 1 byte access to EP0 FIFO.
138 */
139 if (len == 1)
140 *dst = (u8)inw((unsigned long)fifo + 4);
141 else {
142 if (unlikely((unsigned long)dst & 0x01))
143 insw_8((unsigned long)fifo, dst, len >> 1);
144 else
145 insw((unsigned long)fifo, dst, len >> 1);
146
147 if (len & 0x01)
148 *(dst + len - 1) = (u8)inw((unsigned long)fifo + 4);
149 }
150 }
103 DBG(4, "%cX ep%d fifo %p count %d buf %p\n", 151 DBG(4, "%cX ep%d fifo %p count %d buf %p\n",
104 'R', hw_ep->epnum, fifo, len, dst); 152 'R', hw_ep->epnum, fifo, len, dst);
105 153
diff --git a/drivers/usb/musb/blackfin.h b/drivers/usb/musb/blackfin.h
index 10b7d7584f4b..bd9352a2ef2a 100644
--- a/drivers/usb/musb/blackfin.h
+++ b/drivers/usb/musb/blackfin.h
@@ -69,7 +69,6 @@ static void dump_fifo_data(u8 *buf, u16 len)
69#define dump_fifo_data(buf, len) do {} while (0) 69#define dump_fifo_data(buf, len) do {} while (0)
70#endif 70#endif
71 71
72#ifdef CONFIG_BF52x
73 72
74#define USB_DMA_BASE USB_DMA_INTERRUPT 73#define USB_DMA_BASE USB_DMA_INTERRUPT
75#define USB_DMAx_CTRL 0x04 74#define USB_DMAx_CTRL 0x04
@@ -79,7 +78,6 @@ static void dump_fifo_data(u8 *buf, u16 len)
79#define USB_DMAx_COUNT_HIGH 0x14 78#define USB_DMAx_COUNT_HIGH 0x14
80 79
81#define USB_DMA_REG(ep, reg) (USB_DMA_BASE + 0x20 * ep + reg) 80#define USB_DMA_REG(ep, reg) (USB_DMA_BASE + 0x20 * ep + reg)
82#endif
83 81
84/* Almost 1 second */ 82/* Almost 1 second */
85#define TIMER_DELAY (1 * HZ) 83#define TIMER_DELAY (1 * HZ)
diff --git a/drivers/usb/musb/cppi_dma.c b/drivers/usb/musb/cppi_dma.c
index ef2332a9941d..a44a450c860d 100644
--- a/drivers/usb/musb/cppi_dma.c
+++ b/drivers/usb/musb/cppi_dma.c
@@ -1154,8 +1154,11 @@ irqreturn_t cppi_interrupt(int irq, void *dev_id)
1154 struct musb_hw_ep *hw_ep = NULL; 1154 struct musb_hw_ep *hw_ep = NULL;
1155 u32 rx, tx; 1155 u32 rx, tx;
1156 int i, index; 1156 int i, index;
1157 unsigned long flags;
1157 1158
1158 cppi = container_of(musb->dma_controller, struct cppi, controller); 1159 cppi = container_of(musb->dma_controller, struct cppi, controller);
1160 if (cppi->irq)
1161 spin_lock_irqsave(&musb->lock, flags);
1159 1162
1160 tibase = musb->ctrl_base; 1163 tibase = musb->ctrl_base;
1161 1164
@@ -1285,6 +1288,9 @@ irqreturn_t cppi_interrupt(int irq, void *dev_id)
1285 /* write to CPPI EOI register to re-enable interrupts */ 1288 /* write to CPPI EOI register to re-enable interrupts */
1286 musb_writel(tibase, DAVINCI_CPPI_EOI_REG, 0); 1289 musb_writel(tibase, DAVINCI_CPPI_EOI_REG, 0);
1287 1290
1291 if (cppi->irq)
1292 spin_unlock_irqrestore(&musb->lock, flags);
1293
1288 return IRQ_HANDLED; 1294 return IRQ_HANDLED;
1289} 1295}
1290 1296
diff --git a/drivers/usb/musb/davinci.c b/drivers/usb/musb/davinci.c
index e16ff605c458..66913811af5e 100644
--- a/drivers/usb/musb/davinci.c
+++ b/drivers/usb/musb/davinci.c
@@ -42,7 +42,7 @@
42#include "musb_core.h" 42#include "musb_core.h"
43 43
44#ifdef CONFIG_MACH_DAVINCI_EVM 44#ifdef CONFIG_MACH_DAVINCI_EVM
45#define GPIO_nVBUS_DRV 144 45#define GPIO_nVBUS_DRV 160
46#endif 46#endif
47 47
48#include "davinci.h" 48#include "davinci.h"
diff --git a/drivers/usb/musb/musb_core.c b/drivers/usb/musb/musb_core.c
index bfe08f4975a3..5eb9318cff77 100644
--- a/drivers/usb/musb/musb_core.c
+++ b/drivers/usb/musb/musb_core.c
@@ -1319,7 +1319,7 @@ static int __init musb_core_init(u16 musb_type, struct musb *musb)
1319#endif 1319#endif
1320 u8 reg; 1320 u8 reg;
1321 char *type; 1321 char *type;
1322 char aInfo[78], aRevision[32], aDate[12]; 1322 char aInfo[90], aRevision[32], aDate[12];
1323 void __iomem *mbase = musb->mregs; 1323 void __iomem *mbase = musb->mregs;
1324 int status = 0; 1324 int status = 0;
1325 int i; 1325 int i;
@@ -1521,6 +1521,14 @@ irqreturn_t musb_interrupt(struct musb *musb)
1521 (devctl & MUSB_DEVCTL_HM) ? "host" : "peripheral", 1521 (devctl & MUSB_DEVCTL_HM) ? "host" : "peripheral",
1522 musb->int_usb, musb->int_tx, musb->int_rx); 1522 musb->int_usb, musb->int_tx, musb->int_rx);
1523 1523
1524#ifdef CONFIG_USB_GADGET_MUSB_HDRC
1525 if (is_otg_enabled(musb) || is_peripheral_enabled(musb))
1526 if (!musb->gadget_driver) {
1527 DBG(5, "No gadget driver loaded\n");
1528 return IRQ_HANDLED;
1529 }
1530#endif
1531
1524 /* the core can interrupt us for multiple reasons; docs have 1532 /* the core can interrupt us for multiple reasons; docs have
1525 * a generic interrupt flowchart to follow 1533 * a generic interrupt flowchart to follow
1526 */ 1534 */
@@ -2139,7 +2147,7 @@ static int __init musb_probe(struct platform_device *pdev)
2139 return musb_init_controller(dev, irq, base); 2147 return musb_init_controller(dev, irq, base);
2140} 2148}
2141 2149
2142static int __devexit musb_remove(struct platform_device *pdev) 2150static int __exit musb_remove(struct platform_device *pdev)
2143{ 2151{
2144 struct musb *musb = dev_to_musb(&pdev->dev); 2152 struct musb *musb = dev_to_musb(&pdev->dev);
2145 void __iomem *ctrl_base = musb->ctrl_base; 2153 void __iomem *ctrl_base = musb->ctrl_base;
@@ -2231,7 +2239,7 @@ static struct platform_driver musb_driver = {
2231 .owner = THIS_MODULE, 2239 .owner = THIS_MODULE,
2232 .pm = MUSB_DEV_PM_OPS, 2240 .pm = MUSB_DEV_PM_OPS,
2233 }, 2241 },
2234 .remove = __devexit_p(musb_remove), 2242 .remove = __exit_p(musb_remove),
2235 .shutdown = musb_shutdown, 2243 .shutdown = musb_shutdown,
2236}; 2244};
2237 2245
diff --git a/drivers/usb/musb/musb_gadget.c b/drivers/usb/musb/musb_gadget.c
index c49b9ba025ab..cbcf14a236e6 100644
--- a/drivers/usb/musb/musb_gadget.c
+++ b/drivers/usb/musb/musb_gadget.c
@@ -309,7 +309,7 @@ static void txstate(struct musb *musb, struct musb_request *req)
309 size_t request_size; 309 size_t request_size;
310 310
311 /* setup DMA, then program endpoint CSR */ 311 /* setup DMA, then program endpoint CSR */
312 request_size = min(request->length, 312 request_size = min_t(size_t, request->length,
313 musb_ep->dma->max_len); 313 musb_ep->dma->max_len);
314 if (request_size < musb_ep->packet_sz) 314 if (request_size < musb_ep->packet_sz)
315 musb_ep->dma->desired_mode = 0; 315 musb_ep->dma->desired_mode = 0;
@@ -319,7 +319,7 @@ static void txstate(struct musb *musb, struct musb_request *req)
319 use_dma = use_dma && c->channel_program( 319 use_dma = use_dma && c->channel_program(
320 musb_ep->dma, musb_ep->packet_sz, 320 musb_ep->dma, musb_ep->packet_sz,
321 musb_ep->dma->desired_mode, 321 musb_ep->dma->desired_mode,
322 request->dma, request_size); 322 request->dma + request->actual, request_size);
323 if (use_dma) { 323 if (use_dma) {
324 if (musb_ep->dma->desired_mode == 0) { 324 if (musb_ep->dma->desired_mode == 0) {
325 /* 325 /*
@@ -515,12 +515,12 @@ void musb_g_tx(struct musb *musb, u8 epnum)
515 if (csr & MUSB_TXCSR_FIFONOTEMPTY) 515 if (csr & MUSB_TXCSR_FIFONOTEMPTY)
516 return; 516 return;
517 517
518 if (!musb_ep->desc) { 518 request = musb_ep->desc ? next_request(musb_ep) : NULL;
519 if (!request) {
519 DBG(4, "%s idle now\n", 520 DBG(4, "%s idle now\n",
520 musb_ep->end_point.name); 521 musb_ep->end_point.name);
521 return; 522 return;
522 } else 523 }
523 request = next_request(musb_ep);
524 } 524 }
525 525
526 txstate(musb, to_musb_request(request)); 526 txstate(musb, to_musb_request(request));
@@ -746,6 +746,8 @@ void musb_g_rx(struct musb *musb, u8 epnum)
746 musb_ep_select(mbase, epnum); 746 musb_ep_select(mbase, epnum);
747 747
748 request = next_request(musb_ep); 748 request = next_request(musb_ep);
749 if (!request)
750 return;
749 751
750 csr = musb_readw(epio, MUSB_RXCSR); 752 csr = musb_readw(epio, MUSB_RXCSR);
751 dma = is_dma_capable() ? musb_ep->dma : NULL; 753 dma = is_dma_capable() ? musb_ep->dma : NULL;
@@ -1731,6 +1733,7 @@ int usb_gadget_register_driver(struct usb_gadget_driver *driver)
1731 spin_lock_irqsave(&musb->lock, flags); 1733 spin_lock_irqsave(&musb->lock, flags);
1732 1734
1733 otg_set_peripheral(musb->xceiv, &musb->g); 1735 otg_set_peripheral(musb->xceiv, &musb->g);
1736 musb->xceiv->state = OTG_STATE_B_IDLE;
1734 musb->is_active = 1; 1737 musb->is_active = 1;
1735 1738
1736 /* FIXME this ignores the softconnect flag. Drivers are 1739 /* FIXME this ignores the softconnect flag. Drivers are
diff --git a/drivers/usb/musb/musb_gadget_ep0.c b/drivers/usb/musb/musb_gadget_ep0.c
index 8fba3f11e473..53d06451f820 100644
--- a/drivers/usb/musb/musb_gadget_ep0.c
+++ b/drivers/usb/musb/musb_gadget_ep0.c
@@ -664,7 +664,7 @@ irqreturn_t musb_g_ep0_irq(struct musb *musb)
664 musb->ep0_state = MUSB_EP0_STAGE_STATUSIN; 664 musb->ep0_state = MUSB_EP0_STAGE_STATUSIN;
665 break; 665 break;
666 default: 666 default:
667 ERR("SetupEnd came in a wrong ep0stage %s", 667 ERR("SetupEnd came in a wrong ep0stage %s\n",
668 decode_ep0stage(musb->ep0_state)); 668 decode_ep0stage(musb->ep0_state));
669 } 669 }
670 csr = musb_readw(regs, MUSB_CSR0); 670 csr = musb_readw(regs, MUSB_CSR0);
@@ -787,12 +787,18 @@ setup:
787 handled = service_zero_data_request( 787 handled = service_zero_data_request(
788 musb, &setup); 788 musb, &setup);
789 789
790 /*
791 * We're expecting no data in any case, so
792 * always set the DATAEND bit -- doing this
793 * here helps avoid SetupEnd interrupt coming
794 * in the idle stage when we're stalling...
795 */
796 musb->ackpend |= MUSB_CSR0_P_DATAEND;
797
790 /* status stage might be immediate */ 798 /* status stage might be immediate */
791 if (handled > 0) { 799 if (handled > 0)
792 musb->ackpend |= MUSB_CSR0_P_DATAEND;
793 musb->ep0_state = 800 musb->ep0_state =
794 MUSB_EP0_STAGE_STATUSIN; 801 MUSB_EP0_STAGE_STATUSIN;
795 }
796 break; 802 break;
797 803
798 /* sequence #1 (IN to host), includes GET_STATUS 804 /* sequence #1 (IN to host), includes GET_STATUS
diff --git a/drivers/usb/otg/Kconfig b/drivers/usb/otg/Kconfig
index de56b3d743d7..3d2d3e549bd1 100644
--- a/drivers/usb/otg/Kconfig
+++ b/drivers/usb/otg/Kconfig
@@ -44,6 +44,7 @@ config ISP1301_OMAP
44config USB_ULPI 44config USB_ULPI
45 bool "Generic ULPI Transceiver Driver" 45 bool "Generic ULPI Transceiver Driver"
46 depends on ARM 46 depends on ARM
47 select USB_OTG_UTILS
47 help 48 help
48 Enable this to support ULPI connected USB OTG transceivers which 49 Enable this to support ULPI connected USB OTG transceivers which
49 are likely found on embedded boards. 50 are likely found on embedded boards.
diff --git a/drivers/usb/otg/isp1301_omap.c b/drivers/usb/otg/isp1301_omap.c
index d54460a88173..78a209709260 100644
--- a/drivers/usb/otg/isp1301_omap.c
+++ b/drivers/usb/otg/isp1301_omap.c
@@ -843,7 +843,7 @@ static irqreturn_t omap_otg_irq(int irq, void *_isp)
843 843
844static struct platform_device *otg_dev; 844static struct platform_device *otg_dev;
845 845
846static int otg_init(struct isp1301 *isp) 846static int isp1301_otg_init(struct isp1301 *isp)
847{ 847{
848 u32 l; 848 u32 l;
849 849
@@ -1275,7 +1275,7 @@ static int __exit isp1301_remove(struct i2c_client *i2c)
1275static int isp1301_otg_enable(struct isp1301 *isp) 1275static int isp1301_otg_enable(struct isp1301 *isp)
1276{ 1276{
1277 power_up(isp); 1277 power_up(isp);
1278 otg_init(isp); 1278 isp1301_otg_init(isp);
1279 1279
1280 /* NOTE: since we don't change this, this provides 1280 /* NOTE: since we don't change this, this provides
1281 * a few more interrupts than are strictly needed. 1281 * a few more interrupts than are strictly needed.
diff --git a/drivers/usb/serial/ftdi_sio.c b/drivers/usb/serial/ftdi_sio.c
index f99498fca99a..7638828e7317 100644
--- a/drivers/usb/serial/ftdi_sio.c
+++ b/drivers/usb/serial/ftdi_sio.c
@@ -44,12 +44,13 @@
44#include <linux/serial.h> 44#include <linux/serial.h>
45#include <linux/usb/serial.h> 45#include <linux/usb/serial.h>
46#include "ftdi_sio.h" 46#include "ftdi_sio.h"
47#include "ftdi_sio_ids.h"
47 48
48/* 49/*
49 * Version Information 50 * Version Information
50 */ 51 */
51#define DRIVER_VERSION "v1.5.0" 52#define DRIVER_VERSION "v1.5.0"
52#define DRIVER_AUTHOR "Greg Kroah-Hartman <greg@kroah.com>, Bill Ryder <bryder@sgi.com>, Kuba Ober <kuba@mareimbrium.org>" 53#define DRIVER_AUTHOR "Greg Kroah-Hartman <greg@kroah.com>, Bill Ryder <bryder@sgi.com>, Kuba Ober <kuba@mareimbrium.org>, Andreas Mohr"
53#define DRIVER_DESC "USB FTDI Serial Converters Driver" 54#define DRIVER_DESC "USB FTDI Serial Converters Driver"
54 55
55static int debug; 56static int debug;
@@ -144,10 +145,15 @@ static struct ftdi_sio_quirk ftdi_HE_TIRA1_quirk = {
144 145
145 146
146 147
148/*
149 * Device ID not listed? Test via module params product/vendor or
150 * /sys/bus/usb/ftdi_sio/new_id, then send patch/report!
151 */
147static struct usb_device_id id_table_combined [] = { 152static struct usb_device_id id_table_combined [] = {
148 { USB_DEVICE(FTDI_VID, FTDI_AMC232_PID) }, 153 { USB_DEVICE(FTDI_VID, FTDI_AMC232_PID) },
149 { USB_DEVICE(FTDI_VID, FTDI_CANUSB_PID) }, 154 { USB_DEVICE(FTDI_VID, FTDI_CANUSB_PID) },
150 { USB_DEVICE(FTDI_VID, FTDI_CANDAPTER_PID) }, 155 { USB_DEVICE(FTDI_VID, FTDI_CANDAPTER_PID) },
156 { USB_DEVICE(FTDI_VID, FTDI_NXTCAM_PID) },
151 { USB_DEVICE(FTDI_VID, FTDI_SCS_DEVICE_0_PID) }, 157 { USB_DEVICE(FTDI_VID, FTDI_SCS_DEVICE_0_PID) },
152 { USB_DEVICE(FTDI_VID, FTDI_SCS_DEVICE_1_PID) }, 158 { USB_DEVICE(FTDI_VID, FTDI_SCS_DEVICE_1_PID) },
153 { USB_DEVICE(FTDI_VID, FTDI_SCS_DEVICE_2_PID) }, 159 { USB_DEVICE(FTDI_VID, FTDI_SCS_DEVICE_2_PID) },
@@ -551,9 +557,16 @@ static struct usb_device_id id_table_combined [] = {
551 { USB_DEVICE(FTDI_VID, FTDI_IBS_PEDO_PID) }, 557 { USB_DEVICE(FTDI_VID, FTDI_IBS_PEDO_PID) },
552 { USB_DEVICE(FTDI_VID, FTDI_IBS_PROD_PID) }, 558 { USB_DEVICE(FTDI_VID, FTDI_IBS_PROD_PID) },
553 /* 559 /*
554 * Due to many user requests for multiple ELV devices we enable 560 * ELV devices:
555 * them by default.
556 */ 561 */
562 { USB_DEVICE(FTDI_VID, FTDI_ELV_USR_PID) },
563 { USB_DEVICE(FTDI_VID, FTDI_ELV_MSM1_PID) },
564 { USB_DEVICE(FTDI_VID, FTDI_ELV_KL100_PID) },
565 { USB_DEVICE(FTDI_VID, FTDI_ELV_WS550_PID) },
566 { USB_DEVICE(FTDI_VID, FTDI_ELV_EC3000_PID) },
567 { USB_DEVICE(FTDI_VID, FTDI_ELV_WS888_PID) },
568 { USB_DEVICE(FTDI_VID, FTDI_ELV_TWS550_PID) },
569 { USB_DEVICE(FTDI_VID, FTDI_ELV_FEM_PID) },
557 { USB_DEVICE(FTDI_VID, FTDI_ELV_CLI7000_PID) }, 570 { USB_DEVICE(FTDI_VID, FTDI_ELV_CLI7000_PID) },
558 { USB_DEVICE(FTDI_VID, FTDI_ELV_PPS7330_PID) }, 571 { USB_DEVICE(FTDI_VID, FTDI_ELV_PPS7330_PID) },
559 { USB_DEVICE(FTDI_VID, FTDI_ELV_TFM100_PID) }, 572 { USB_DEVICE(FTDI_VID, FTDI_ELV_TFM100_PID) },
@@ -570,11 +583,17 @@ static struct usb_device_id id_table_combined [] = {
570 { USB_DEVICE(FTDI_VID, FTDI_ELV_PCK100_PID) }, 583 { USB_DEVICE(FTDI_VID, FTDI_ELV_PCK100_PID) },
571 { USB_DEVICE(FTDI_VID, FTDI_ELV_RFP500_PID) }, 584 { USB_DEVICE(FTDI_VID, FTDI_ELV_RFP500_PID) },
572 { USB_DEVICE(FTDI_VID, FTDI_ELV_FS20SIG_PID) }, 585 { USB_DEVICE(FTDI_VID, FTDI_ELV_FS20SIG_PID) },
586 { USB_DEVICE(FTDI_VID, FTDI_ELV_UTP8_PID) },
573 { USB_DEVICE(FTDI_VID, FTDI_ELV_WS300PC_PID) }, 587 { USB_DEVICE(FTDI_VID, FTDI_ELV_WS300PC_PID) },
588 { USB_DEVICE(FTDI_VID, FTDI_ELV_WS444PC_PID) },
574 { USB_DEVICE(FTDI_VID, FTDI_ELV_FHZ1300PC_PID) }, 589 { USB_DEVICE(FTDI_VID, FTDI_ELV_FHZ1300PC_PID) },
575 { USB_DEVICE(FTDI_VID, FTDI_ELV_EM1010PC_PID) }, 590 { USB_DEVICE(FTDI_VID, FTDI_ELV_EM1010PC_PID) },
576 { USB_DEVICE(FTDI_VID, FTDI_ELV_WS500_PID) }, 591 { USB_DEVICE(FTDI_VID, FTDI_ELV_WS500_PID) },
577 { USB_DEVICE(FTDI_VID, FTDI_ELV_HS485_PID) }, 592 { USB_DEVICE(FTDI_VID, FTDI_ELV_HS485_PID) },
593 { USB_DEVICE(FTDI_VID, FTDI_ELV_UMS100_PID) },
594 { USB_DEVICE(FTDI_VID, FTDI_ELV_TFD128_PID) },
595 { USB_DEVICE(FTDI_VID, FTDI_ELV_FM3RX_PID) },
596 { USB_DEVICE(FTDI_VID, FTDI_ELV_WS777_PID) },
578 { USB_DEVICE(FTDI_VID, LINX_SDMUSBQSS_PID) }, 597 { USB_DEVICE(FTDI_VID, LINX_SDMUSBQSS_PID) },
579 { USB_DEVICE(FTDI_VID, LINX_MASTERDEVEL2_PID) }, 598 { USB_DEVICE(FTDI_VID, LINX_MASTERDEVEL2_PID) },
580 { USB_DEVICE(FTDI_VID, LINX_FUTURE_0_PID) }, 599 { USB_DEVICE(FTDI_VID, LINX_FUTURE_0_PID) },
@@ -696,6 +715,7 @@ static struct usb_device_id id_table_combined [] = {
696 { USB_DEVICE(RATOC_VENDOR_ID, RATOC_PRODUCT_ID_USB60F) }, 715 { USB_DEVICE(RATOC_VENDOR_ID, RATOC_PRODUCT_ID_USB60F) },
697 { USB_DEVICE(FTDI_VID, FTDI_REU_TINY_PID) }, 716 { USB_DEVICE(FTDI_VID, FTDI_REU_TINY_PID) },
698 { USB_DEVICE(PAPOUCH_VID, PAPOUCH_QUIDO4x4_PID) }, 717 { USB_DEVICE(PAPOUCH_VID, PAPOUCH_QUIDO4x4_PID) },
718 { USB_DEVICE(PAPOUCH_VID, PAPOUCH_AD4USB_PID) },
699 { USB_DEVICE(FTDI_VID, FTDI_DOMINTELL_DGQG_PID) }, 719 { USB_DEVICE(FTDI_VID, FTDI_DOMINTELL_DGQG_PID) },
700 { USB_DEVICE(FTDI_VID, FTDI_DOMINTELL_DUSB_PID) }, 720 { USB_DEVICE(FTDI_VID, FTDI_DOMINTELL_DUSB_PID) },
701 { USB_DEVICE(ALTI2_VID, ALTI2_N3_PID) }, 721 { USB_DEVICE(ALTI2_VID, ALTI2_N3_PID) },
diff --git a/drivers/usb/serial/ftdi_sio.h b/drivers/usb/serial/ftdi_sio.h
index 4586a24fafb0..b0e0d64f822e 100644
--- a/drivers/usb/serial/ftdi_sio.h
+++ b/drivers/usb/serial/ftdi_sio.h
@@ -1,7 +1,10 @@
1/* 1/*
2 * Definitions for the FTDI USB Single Port Serial Converter - 2 * Driver definitions for the FTDI USB Single Port Serial Converter -
3 * known as FTDI_SIO (Serial Input/Output application of the chipset) 3 * known as FTDI_SIO (Serial Input/Output application of the chipset)
4 * 4 *
5 * For USB vendor/product IDs (VID/PID), please see ftdi_sio_ids.h
6 *
7 *
5 * The example I have is known as the USC-1000 which is available from 8 * The example I have is known as the USC-1000 which is available from
6 * http://www.dse.co.nz - cat no XH4214 It looks similar to this: 9 * http://www.dse.co.nz - cat no XH4214 It looks similar to this:
7 * http://www.dansdata.com/usbser.htm but I can't be sure There are other 10 * http://www.dansdata.com/usbser.htm but I can't be sure There are other
@@ -17,880 +20,7 @@
17 * Bill Ryder - bryder@sgi.com formerly of Silicon Graphics, Inc.- wrote the 20 * Bill Ryder - bryder@sgi.com formerly of Silicon Graphics, Inc.- wrote the
18 * FTDI_SIO implementation. 21 * FTDI_SIO implementation.
19 * 22 *
20 * Philipp Gühring - pg@futureware.at - added the Device ID of the USB relais
21 * from Rudolf Gugler
22 *
23 */
24
25#define FTDI_VID 0x0403 /* Vendor Id */
26#define FTDI_SIO_PID 0x8372 /* Product Id SIO application of 8U100AX */
27#define FTDI_8U232AM_PID 0x6001 /* Similar device to SIO above */
28#define FTDI_8U232AM_ALT_PID 0x6006 /* FTDI's alternate PID for above */
29#define FTDI_8U2232C_PID 0x6010 /* Dual channel device */
30#define FTDI_232RL_PID 0xFBFA /* Product ID for FT232RL */
31#define FTDI_4232H_PID 0x6011 /* Quad channel hi-speed device */
32#define FTDI_RELAIS_PID 0xFA10 /* Relais device from Rudolf Gugler */
33#define FTDI_NF_RIC_VID 0x0DCD /* Vendor Id */
34#define FTDI_NF_RIC_PID 0x0001 /* Product Id */
35#define FTDI_USBX_707_PID 0xF857 /* ADSTech IR Blaster USBX-707 */
36
37/* Larsen and Brusgaard AltiTrack/USBtrack */
38#define LARSENBRUSGAARD_VID 0x0FD8
39#define LB_ALTITRACK_PID 0x0001
40
41/* www.canusb.com Lawicel CANUSB device */
42#define FTDI_CANUSB_PID 0xFFA8 /* Product Id */
43
44/* AlphaMicro Components AMC-232USB01 device */
45#define FTDI_AMC232_PID 0xFF00 /* Product Id */
46
47/* www.candapter.com Ewert Energy Systems CANdapter device */
48#define FTDI_CANDAPTER_PID 0x9F80 /* Product Id */
49
50/* SCS HF Radio Modems PID's (http://www.scs-ptc.com) */
51/* the VID is the standard ftdi vid (FTDI_VID) */
52#define FTDI_SCS_DEVICE_0_PID 0xD010 /* SCS PTC-IIusb */
53#define FTDI_SCS_DEVICE_1_PID 0xD011 /* SCS Tracker / DSP TNC */
54#define FTDI_SCS_DEVICE_2_PID 0xD012
55#define FTDI_SCS_DEVICE_3_PID 0xD013
56#define FTDI_SCS_DEVICE_4_PID 0xD014
57#define FTDI_SCS_DEVICE_5_PID 0xD015
58#define FTDI_SCS_DEVICE_6_PID 0xD016
59#define FTDI_SCS_DEVICE_7_PID 0xD017
60
61/* ACT Solutions HomePro ZWave interface (http://www.act-solutions.com/HomePro.htm) */
62#define FTDI_ACTZWAVE_PID 0xF2D0
63
64
65/* www.starting-point-systems.com µChameleon device */
66#define FTDI_MICRO_CHAMELEON_PID 0xCAA0 /* Product Id */
67
68/* www.irtrans.de device */
69#define FTDI_IRTRANS_PID 0xFC60 /* Product Id */
70
71
72/* www.thoughttechnology.com/ TT-USB provide with procomp use ftdi_sio */
73#define FTDI_TTUSB_PID 0xFF20 /* Product Id */
74
75/* iPlus device */
76#define FTDI_IPLUS_PID 0xD070 /* Product Id */
77#define FTDI_IPLUS2_PID 0xD071 /* Product Id */
78
79/* DMX4ALL DMX Interfaces */
80#define FTDI_DMX4ALL 0xC850
81
82/* OpenDCC (www.opendcc.de) product id */
83#define FTDI_OPENDCC_PID 0xBFD8
84#define FTDI_OPENDCC_SNIFFER_PID 0xBFD9
85#define FTDI_OPENDCC_THROTTLE_PID 0xBFDA
86#define FTDI_OPENDCC_GATEWAY_PID 0xBFDB
87
88/* Sprog II (Andrew Crosland's SprogII DCC interface) */
89#define FTDI_SPROG_II 0xF0C8
90
91/* www.crystalfontz.com devices - thanx for providing free devices for evaluation ! */
92/* they use the ftdi chipset for the USB interface and the vendor id is the same */
93#define FTDI_XF_632_PID 0xFC08 /* 632: 16x2 Character Display */
94#define FTDI_XF_634_PID 0xFC09 /* 634: 20x4 Character Display */
95#define FTDI_XF_547_PID 0xFC0A /* 547: Two line Display */
96#define FTDI_XF_633_PID 0xFC0B /* 633: 16x2 Character Display with Keys */
97#define FTDI_XF_631_PID 0xFC0C /* 631: 20x2 Character Display */
98#define FTDI_XF_635_PID 0xFC0D /* 635: 20x4 Character Display */
99#define FTDI_XF_640_PID 0xFC0E /* 640: Two line Display */
100#define FTDI_XF_642_PID 0xFC0F /* 642: Two line Display */
101
102/* Video Networks Limited / Homechoice in the UK use an ftdi-based device for their 1Mb */
103/* broadband internet service. The following PID is exhibited by the usb device supplied */
104/* (the VID is the standard ftdi vid (FTDI_VID) */
105#define FTDI_VNHCPCUSB_D_PID 0xfe38 /* Product Id */
106
107/*
108 * PCDJ use ftdi based dj-controllers. The following PID is for their DAC-2 device
109 * http://www.pcdjhardware.com/DAC2.asp (PID sent by Wouter Paesen)
110 * (the VID is the standard ftdi vid (FTDI_VID) */
111#define FTDI_PCDJ_DAC2_PID 0xFA88
112
113/*
114 * The following are the values for the Matrix Orbital LCD displays,
115 * which are the FT232BM ( similar to the 8U232AM )
116 */
117#define FTDI_MTXORB_0_PID 0xFA00 /* Matrix Orbital Product Id */
118#define FTDI_MTXORB_1_PID 0xFA01 /* Matrix Orbital Product Id */
119#define FTDI_MTXORB_2_PID 0xFA02 /* Matrix Orbital Product Id */
120#define FTDI_MTXORB_3_PID 0xFA03 /* Matrix Orbital Product Id */
121#define FTDI_MTXORB_4_PID 0xFA04 /* Matrix Orbital Product Id */
122#define FTDI_MTXORB_5_PID 0xFA05 /* Matrix Orbital Product Id */
123#define FTDI_MTXORB_6_PID 0xFA06 /* Matrix Orbital Product Id */
124
125/* OOCDlink by Joern Kaipf <joernk@web.de>
126 * (http://www.joernonline.de/dw/doku.php?id=start&idx=projects:oocdlink) */
127#define FTDI_OOCDLINK_PID 0xbaf8 /* Amontec JTAGkey */
128
129/*
130 * The following are the values for the Matrix Orbital FTDI Range
131 * Anything in this range will use an FT232RL.
132 */
133#define MTXORB_VID 0x1B3D
134#define MTXORB_FTDI_RANGE_0100_PID 0x0100
135#define MTXORB_FTDI_RANGE_0101_PID 0x0101
136#define MTXORB_FTDI_RANGE_0102_PID 0x0102
137#define MTXORB_FTDI_RANGE_0103_PID 0x0103
138#define MTXORB_FTDI_RANGE_0104_PID 0x0104
139#define MTXORB_FTDI_RANGE_0105_PID 0x0105
140#define MTXORB_FTDI_RANGE_0106_PID 0x0106
141#define MTXORB_FTDI_RANGE_0107_PID 0x0107
142#define MTXORB_FTDI_RANGE_0108_PID 0x0108
143#define MTXORB_FTDI_RANGE_0109_PID 0x0109
144#define MTXORB_FTDI_RANGE_010A_PID 0x010A
145#define MTXORB_FTDI_RANGE_010B_PID 0x010B
146#define MTXORB_FTDI_RANGE_010C_PID 0x010C
147#define MTXORB_FTDI_RANGE_010D_PID 0x010D
148#define MTXORB_FTDI_RANGE_010E_PID 0x010E
149#define MTXORB_FTDI_RANGE_010F_PID 0x010F
150#define MTXORB_FTDI_RANGE_0110_PID 0x0110
151#define MTXORB_FTDI_RANGE_0111_PID 0x0111
152#define MTXORB_FTDI_RANGE_0112_PID 0x0112
153#define MTXORB_FTDI_RANGE_0113_PID 0x0113
154#define MTXORB_FTDI_RANGE_0114_PID 0x0114
155#define MTXORB_FTDI_RANGE_0115_PID 0x0115
156#define MTXORB_FTDI_RANGE_0116_PID 0x0116
157#define MTXORB_FTDI_RANGE_0117_PID 0x0117
158#define MTXORB_FTDI_RANGE_0118_PID 0x0118
159#define MTXORB_FTDI_RANGE_0119_PID 0x0119
160#define MTXORB_FTDI_RANGE_011A_PID 0x011A
161#define MTXORB_FTDI_RANGE_011B_PID 0x011B
162#define MTXORB_FTDI_RANGE_011C_PID 0x011C
163#define MTXORB_FTDI_RANGE_011D_PID 0x011D
164#define MTXORB_FTDI_RANGE_011E_PID 0x011E
165#define MTXORB_FTDI_RANGE_011F_PID 0x011F
166#define MTXORB_FTDI_RANGE_0120_PID 0x0120
167#define MTXORB_FTDI_RANGE_0121_PID 0x0121
168#define MTXORB_FTDI_RANGE_0122_PID 0x0122
169#define MTXORB_FTDI_RANGE_0123_PID 0x0123
170#define MTXORB_FTDI_RANGE_0124_PID 0x0124
171#define MTXORB_FTDI_RANGE_0125_PID 0x0125
172#define MTXORB_FTDI_RANGE_0126_PID 0x0126
173#define MTXORB_FTDI_RANGE_0127_PID 0x0127
174#define MTXORB_FTDI_RANGE_0128_PID 0x0128
175#define MTXORB_FTDI_RANGE_0129_PID 0x0129
176#define MTXORB_FTDI_RANGE_012A_PID 0x012A
177#define MTXORB_FTDI_RANGE_012B_PID 0x012B
178#define MTXORB_FTDI_RANGE_012C_PID 0x012C
179#define MTXORB_FTDI_RANGE_012D_PID 0x012D
180#define MTXORB_FTDI_RANGE_012E_PID 0x012E
181#define MTXORB_FTDI_RANGE_012F_PID 0x012F
182#define MTXORB_FTDI_RANGE_0130_PID 0x0130
183#define MTXORB_FTDI_RANGE_0131_PID 0x0131
184#define MTXORB_FTDI_RANGE_0132_PID 0x0132
185#define MTXORB_FTDI_RANGE_0133_PID 0x0133
186#define MTXORB_FTDI_RANGE_0134_PID 0x0134
187#define MTXORB_FTDI_RANGE_0135_PID 0x0135
188#define MTXORB_FTDI_RANGE_0136_PID 0x0136
189#define MTXORB_FTDI_RANGE_0137_PID 0x0137
190#define MTXORB_FTDI_RANGE_0138_PID 0x0138
191#define MTXORB_FTDI_RANGE_0139_PID 0x0139
192#define MTXORB_FTDI_RANGE_013A_PID 0x013A
193#define MTXORB_FTDI_RANGE_013B_PID 0x013B
194#define MTXORB_FTDI_RANGE_013C_PID 0x013C
195#define MTXORB_FTDI_RANGE_013D_PID 0x013D
196#define MTXORB_FTDI_RANGE_013E_PID 0x013E
197#define MTXORB_FTDI_RANGE_013F_PID 0x013F
198#define MTXORB_FTDI_RANGE_0140_PID 0x0140
199#define MTXORB_FTDI_RANGE_0141_PID 0x0141
200#define MTXORB_FTDI_RANGE_0142_PID 0x0142
201#define MTXORB_FTDI_RANGE_0143_PID 0x0143
202#define MTXORB_FTDI_RANGE_0144_PID 0x0144
203#define MTXORB_FTDI_RANGE_0145_PID 0x0145
204#define MTXORB_FTDI_RANGE_0146_PID 0x0146
205#define MTXORB_FTDI_RANGE_0147_PID 0x0147
206#define MTXORB_FTDI_RANGE_0148_PID 0x0148
207#define MTXORB_FTDI_RANGE_0149_PID 0x0149
208#define MTXORB_FTDI_RANGE_014A_PID 0x014A
209#define MTXORB_FTDI_RANGE_014B_PID 0x014B
210#define MTXORB_FTDI_RANGE_014C_PID 0x014C
211#define MTXORB_FTDI_RANGE_014D_PID 0x014D
212#define MTXORB_FTDI_RANGE_014E_PID 0x014E
213#define MTXORB_FTDI_RANGE_014F_PID 0x014F
214#define MTXORB_FTDI_RANGE_0150_PID 0x0150
215#define MTXORB_FTDI_RANGE_0151_PID 0x0151
216#define MTXORB_FTDI_RANGE_0152_PID 0x0152
217#define MTXORB_FTDI_RANGE_0153_PID 0x0153
218#define MTXORB_FTDI_RANGE_0154_PID 0x0154
219#define MTXORB_FTDI_RANGE_0155_PID 0x0155
220#define MTXORB_FTDI_RANGE_0156_PID 0x0156
221#define MTXORB_FTDI_RANGE_0157_PID 0x0157
222#define MTXORB_FTDI_RANGE_0158_PID 0x0158
223#define MTXORB_FTDI_RANGE_0159_PID 0x0159
224#define MTXORB_FTDI_RANGE_015A_PID 0x015A
225#define MTXORB_FTDI_RANGE_015B_PID 0x015B
226#define MTXORB_FTDI_RANGE_015C_PID 0x015C
227#define MTXORB_FTDI_RANGE_015D_PID 0x015D
228#define MTXORB_FTDI_RANGE_015E_PID 0x015E
229#define MTXORB_FTDI_RANGE_015F_PID 0x015F
230#define MTXORB_FTDI_RANGE_0160_PID 0x0160
231#define MTXORB_FTDI_RANGE_0161_PID 0x0161
232#define MTXORB_FTDI_RANGE_0162_PID 0x0162
233#define MTXORB_FTDI_RANGE_0163_PID 0x0163
234#define MTXORB_FTDI_RANGE_0164_PID 0x0164
235#define MTXORB_FTDI_RANGE_0165_PID 0x0165
236#define MTXORB_FTDI_RANGE_0166_PID 0x0166
237#define MTXORB_FTDI_RANGE_0167_PID 0x0167
238#define MTXORB_FTDI_RANGE_0168_PID 0x0168
239#define MTXORB_FTDI_RANGE_0169_PID 0x0169
240#define MTXORB_FTDI_RANGE_016A_PID 0x016A
241#define MTXORB_FTDI_RANGE_016B_PID 0x016B
242#define MTXORB_FTDI_RANGE_016C_PID 0x016C
243#define MTXORB_FTDI_RANGE_016D_PID 0x016D
244#define MTXORB_FTDI_RANGE_016E_PID 0x016E
245#define MTXORB_FTDI_RANGE_016F_PID 0x016F
246#define MTXORB_FTDI_RANGE_0170_PID 0x0170
247#define MTXORB_FTDI_RANGE_0171_PID 0x0171
248#define MTXORB_FTDI_RANGE_0172_PID 0x0172
249#define MTXORB_FTDI_RANGE_0173_PID 0x0173
250#define MTXORB_FTDI_RANGE_0174_PID 0x0174
251#define MTXORB_FTDI_RANGE_0175_PID 0x0175
252#define MTXORB_FTDI_RANGE_0176_PID 0x0176
253#define MTXORB_FTDI_RANGE_0177_PID 0x0177
254#define MTXORB_FTDI_RANGE_0178_PID 0x0178
255#define MTXORB_FTDI_RANGE_0179_PID 0x0179
256#define MTXORB_FTDI_RANGE_017A_PID 0x017A
257#define MTXORB_FTDI_RANGE_017B_PID 0x017B
258#define MTXORB_FTDI_RANGE_017C_PID 0x017C
259#define MTXORB_FTDI_RANGE_017D_PID 0x017D
260#define MTXORB_FTDI_RANGE_017E_PID 0x017E
261#define MTXORB_FTDI_RANGE_017F_PID 0x017F
262#define MTXORB_FTDI_RANGE_0180_PID 0x0180
263#define MTXORB_FTDI_RANGE_0181_PID 0x0181
264#define MTXORB_FTDI_RANGE_0182_PID 0x0182
265#define MTXORB_FTDI_RANGE_0183_PID 0x0183
266#define MTXORB_FTDI_RANGE_0184_PID 0x0184
267#define MTXORB_FTDI_RANGE_0185_PID 0x0185
268#define MTXORB_FTDI_RANGE_0186_PID 0x0186
269#define MTXORB_FTDI_RANGE_0187_PID 0x0187
270#define MTXORB_FTDI_RANGE_0188_PID 0x0188
271#define MTXORB_FTDI_RANGE_0189_PID 0x0189
272#define MTXORB_FTDI_RANGE_018A_PID 0x018A
273#define MTXORB_FTDI_RANGE_018B_PID 0x018B
274#define MTXORB_FTDI_RANGE_018C_PID 0x018C
275#define MTXORB_FTDI_RANGE_018D_PID 0x018D
276#define MTXORB_FTDI_RANGE_018E_PID 0x018E
277#define MTXORB_FTDI_RANGE_018F_PID 0x018F
278#define MTXORB_FTDI_RANGE_0190_PID 0x0190
279#define MTXORB_FTDI_RANGE_0191_PID 0x0191
280#define MTXORB_FTDI_RANGE_0192_PID 0x0192
281#define MTXORB_FTDI_RANGE_0193_PID 0x0193
282#define MTXORB_FTDI_RANGE_0194_PID 0x0194
283#define MTXORB_FTDI_RANGE_0195_PID 0x0195
284#define MTXORB_FTDI_RANGE_0196_PID 0x0196
285#define MTXORB_FTDI_RANGE_0197_PID 0x0197
286#define MTXORB_FTDI_RANGE_0198_PID 0x0198
287#define MTXORB_FTDI_RANGE_0199_PID 0x0199
288#define MTXORB_FTDI_RANGE_019A_PID 0x019A
289#define MTXORB_FTDI_RANGE_019B_PID 0x019B
290#define MTXORB_FTDI_RANGE_019C_PID 0x019C
291#define MTXORB_FTDI_RANGE_019D_PID 0x019D
292#define MTXORB_FTDI_RANGE_019E_PID 0x019E
293#define MTXORB_FTDI_RANGE_019F_PID 0x019F
294#define MTXORB_FTDI_RANGE_01A0_PID 0x01A0
295#define MTXORB_FTDI_RANGE_01A1_PID 0x01A1
296#define MTXORB_FTDI_RANGE_01A2_PID 0x01A2
297#define MTXORB_FTDI_RANGE_01A3_PID 0x01A3
298#define MTXORB_FTDI_RANGE_01A4_PID 0x01A4
299#define MTXORB_FTDI_RANGE_01A5_PID 0x01A5
300#define MTXORB_FTDI_RANGE_01A6_PID 0x01A6
301#define MTXORB_FTDI_RANGE_01A7_PID 0x01A7
302#define MTXORB_FTDI_RANGE_01A8_PID 0x01A8
303#define MTXORB_FTDI_RANGE_01A9_PID 0x01A9
304#define MTXORB_FTDI_RANGE_01AA_PID 0x01AA
305#define MTXORB_FTDI_RANGE_01AB_PID 0x01AB
306#define MTXORB_FTDI_RANGE_01AC_PID 0x01AC
307#define MTXORB_FTDI_RANGE_01AD_PID 0x01AD
308#define MTXORB_FTDI_RANGE_01AE_PID 0x01AE
309#define MTXORB_FTDI_RANGE_01AF_PID 0x01AF
310#define MTXORB_FTDI_RANGE_01B0_PID 0x01B0
311#define MTXORB_FTDI_RANGE_01B1_PID 0x01B1
312#define MTXORB_FTDI_RANGE_01B2_PID 0x01B2
313#define MTXORB_FTDI_RANGE_01B3_PID 0x01B3
314#define MTXORB_FTDI_RANGE_01B4_PID 0x01B4
315#define MTXORB_FTDI_RANGE_01B5_PID 0x01B5
316#define MTXORB_FTDI_RANGE_01B6_PID 0x01B6
317#define MTXORB_FTDI_RANGE_01B7_PID 0x01B7
318#define MTXORB_FTDI_RANGE_01B8_PID 0x01B8
319#define MTXORB_FTDI_RANGE_01B9_PID 0x01B9
320#define MTXORB_FTDI_RANGE_01BA_PID 0x01BA
321#define MTXORB_FTDI_RANGE_01BB_PID 0x01BB
322#define MTXORB_FTDI_RANGE_01BC_PID 0x01BC
323#define MTXORB_FTDI_RANGE_01BD_PID 0x01BD
324#define MTXORB_FTDI_RANGE_01BE_PID 0x01BE
325#define MTXORB_FTDI_RANGE_01BF_PID 0x01BF
326#define MTXORB_FTDI_RANGE_01C0_PID 0x01C0
327#define MTXORB_FTDI_RANGE_01C1_PID 0x01C1
328#define MTXORB_FTDI_RANGE_01C2_PID 0x01C2
329#define MTXORB_FTDI_RANGE_01C3_PID 0x01C3
330#define MTXORB_FTDI_RANGE_01C4_PID 0x01C4
331#define MTXORB_FTDI_RANGE_01C5_PID 0x01C5
332#define MTXORB_FTDI_RANGE_01C6_PID 0x01C6
333#define MTXORB_FTDI_RANGE_01C7_PID 0x01C7
334#define MTXORB_FTDI_RANGE_01C8_PID 0x01C8
335#define MTXORB_FTDI_RANGE_01C9_PID 0x01C9
336#define MTXORB_FTDI_RANGE_01CA_PID 0x01CA
337#define MTXORB_FTDI_RANGE_01CB_PID 0x01CB
338#define MTXORB_FTDI_RANGE_01CC_PID 0x01CC
339#define MTXORB_FTDI_RANGE_01CD_PID 0x01CD
340#define MTXORB_FTDI_RANGE_01CE_PID 0x01CE
341#define MTXORB_FTDI_RANGE_01CF_PID 0x01CF
342#define MTXORB_FTDI_RANGE_01D0_PID 0x01D0
343#define MTXORB_FTDI_RANGE_01D1_PID 0x01D1
344#define MTXORB_FTDI_RANGE_01D2_PID 0x01D2
345#define MTXORB_FTDI_RANGE_01D3_PID 0x01D3
346#define MTXORB_FTDI_RANGE_01D4_PID 0x01D4
347#define MTXORB_FTDI_RANGE_01D5_PID 0x01D5
348#define MTXORB_FTDI_RANGE_01D6_PID 0x01D6
349#define MTXORB_FTDI_RANGE_01D7_PID 0x01D7
350#define MTXORB_FTDI_RANGE_01D8_PID 0x01D8
351#define MTXORB_FTDI_RANGE_01D9_PID 0x01D9
352#define MTXORB_FTDI_RANGE_01DA_PID 0x01DA
353#define MTXORB_FTDI_RANGE_01DB_PID 0x01DB
354#define MTXORB_FTDI_RANGE_01DC_PID 0x01DC
355#define MTXORB_FTDI_RANGE_01DD_PID 0x01DD
356#define MTXORB_FTDI_RANGE_01DE_PID 0x01DE
357#define MTXORB_FTDI_RANGE_01DF_PID 0x01DF
358#define MTXORB_FTDI_RANGE_01E0_PID 0x01E0
359#define MTXORB_FTDI_RANGE_01E1_PID 0x01E1
360#define MTXORB_FTDI_RANGE_01E2_PID 0x01E2
361#define MTXORB_FTDI_RANGE_01E3_PID 0x01E3
362#define MTXORB_FTDI_RANGE_01E4_PID 0x01E4
363#define MTXORB_FTDI_RANGE_01E5_PID 0x01E5
364#define MTXORB_FTDI_RANGE_01E6_PID 0x01E6
365#define MTXORB_FTDI_RANGE_01E7_PID 0x01E7
366#define MTXORB_FTDI_RANGE_01E8_PID 0x01E8
367#define MTXORB_FTDI_RANGE_01E9_PID 0x01E9
368#define MTXORB_FTDI_RANGE_01EA_PID 0x01EA
369#define MTXORB_FTDI_RANGE_01EB_PID 0x01EB
370#define MTXORB_FTDI_RANGE_01EC_PID 0x01EC
371#define MTXORB_FTDI_RANGE_01ED_PID 0x01ED
372#define MTXORB_FTDI_RANGE_01EE_PID 0x01EE
373#define MTXORB_FTDI_RANGE_01EF_PID 0x01EF
374#define MTXORB_FTDI_RANGE_01F0_PID 0x01F0
375#define MTXORB_FTDI_RANGE_01F1_PID 0x01F1
376#define MTXORB_FTDI_RANGE_01F2_PID 0x01F2
377#define MTXORB_FTDI_RANGE_01F3_PID 0x01F3
378#define MTXORB_FTDI_RANGE_01F4_PID 0x01F4
379#define MTXORB_FTDI_RANGE_01F5_PID 0x01F5
380#define MTXORB_FTDI_RANGE_01F6_PID 0x01F6
381#define MTXORB_FTDI_RANGE_01F7_PID 0x01F7
382#define MTXORB_FTDI_RANGE_01F8_PID 0x01F8
383#define MTXORB_FTDI_RANGE_01F9_PID 0x01F9
384#define MTXORB_FTDI_RANGE_01FA_PID 0x01FA
385#define MTXORB_FTDI_RANGE_01FB_PID 0x01FB
386#define MTXORB_FTDI_RANGE_01FC_PID 0x01FC
387#define MTXORB_FTDI_RANGE_01FD_PID 0x01FD
388#define MTXORB_FTDI_RANGE_01FE_PID 0x01FE
389#define MTXORB_FTDI_RANGE_01FF_PID 0x01FF
390
391
392
393/* Interbiometrics USB I/O Board */
394/* Developed for Interbiometrics by Rudolf Gugler */
395#define INTERBIOMETRICS_VID 0x1209
396#define INTERBIOMETRICS_IOBOARD_PID 0x1002
397#define INTERBIOMETRICS_MINI_IOBOARD_PID 0x1006
398
399/*
400 * The following are the values for the Perle Systems
401 * UltraPort USB serial converters
402 */
403#define FTDI_PERLE_ULTRAPORT_PID 0xF0C0 /* Perle UltraPort Product Id */
404
405/*
406 * The following are the values for the Sealevel SeaLINK+ adapters.
407 * (Original list sent by Tuan Hoang. Ian Abbott renamed the macros and
408 * removed some PIDs that don't seem to match any existing products.)
409 */
410#define SEALEVEL_VID 0x0c52 /* Sealevel Vendor ID */
411#define SEALEVEL_2101_PID 0x2101 /* SeaLINK+232 (2101/2105) */
412#define SEALEVEL_2102_PID 0x2102 /* SeaLINK+485 (2102) */
413#define SEALEVEL_2103_PID 0x2103 /* SeaLINK+232I (2103) */
414#define SEALEVEL_2104_PID 0x2104 /* SeaLINK+485I (2104) */
415#define SEALEVEL_2106_PID 0x9020 /* SeaLINK+422 (2106) */
416#define SEALEVEL_2201_1_PID 0x2211 /* SeaPORT+2/232 (2201) Port 1 */
417#define SEALEVEL_2201_2_PID 0x2221 /* SeaPORT+2/232 (2201) Port 2 */
418#define SEALEVEL_2202_1_PID 0x2212 /* SeaPORT+2/485 (2202) Port 1 */
419#define SEALEVEL_2202_2_PID 0x2222 /* SeaPORT+2/485 (2202) Port 2 */
420#define SEALEVEL_2203_1_PID 0x2213 /* SeaPORT+2 (2203) Port 1 */
421#define SEALEVEL_2203_2_PID 0x2223 /* SeaPORT+2 (2203) Port 2 */
422#define SEALEVEL_2401_1_PID 0x2411 /* SeaPORT+4/232 (2401) Port 1 */
423#define SEALEVEL_2401_2_PID 0x2421 /* SeaPORT+4/232 (2401) Port 2 */
424#define SEALEVEL_2401_3_PID 0x2431 /* SeaPORT+4/232 (2401) Port 3 */
425#define SEALEVEL_2401_4_PID 0x2441 /* SeaPORT+4/232 (2401) Port 4 */
426#define SEALEVEL_2402_1_PID 0x2412 /* SeaPORT+4/485 (2402) Port 1 */
427#define SEALEVEL_2402_2_PID 0x2422 /* SeaPORT+4/485 (2402) Port 2 */
428#define SEALEVEL_2402_3_PID 0x2432 /* SeaPORT+4/485 (2402) Port 3 */
429#define SEALEVEL_2402_4_PID 0x2442 /* SeaPORT+4/485 (2402) Port 4 */
430#define SEALEVEL_2403_1_PID 0x2413 /* SeaPORT+4 (2403) Port 1 */
431#define SEALEVEL_2403_2_PID 0x2423 /* SeaPORT+4 (2403) Port 2 */
432#define SEALEVEL_2403_3_PID 0x2433 /* SeaPORT+4 (2403) Port 3 */
433#define SEALEVEL_2403_4_PID 0x2443 /* SeaPORT+4 (2403) Port 4 */
434#define SEALEVEL_2801_1_PID 0X2811 /* SeaLINK+8/232 (2801) Port 1 */
435#define SEALEVEL_2801_2_PID 0X2821 /* SeaLINK+8/232 (2801) Port 2 */
436#define SEALEVEL_2801_3_PID 0X2831 /* SeaLINK+8/232 (2801) Port 3 */
437#define SEALEVEL_2801_4_PID 0X2841 /* SeaLINK+8/232 (2801) Port 4 */
438#define SEALEVEL_2801_5_PID 0X2851 /* SeaLINK+8/232 (2801) Port 5 */
439#define SEALEVEL_2801_6_PID 0X2861 /* SeaLINK+8/232 (2801) Port 6 */
440#define SEALEVEL_2801_7_PID 0X2871 /* SeaLINK+8/232 (2801) Port 7 */
441#define SEALEVEL_2801_8_PID 0X2881 /* SeaLINK+8/232 (2801) Port 8 */
442#define SEALEVEL_2802_1_PID 0X2812 /* SeaLINK+8/485 (2802) Port 1 */
443#define SEALEVEL_2802_2_PID 0X2822 /* SeaLINK+8/485 (2802) Port 2 */
444#define SEALEVEL_2802_3_PID 0X2832 /* SeaLINK+8/485 (2802) Port 3 */
445#define SEALEVEL_2802_4_PID 0X2842 /* SeaLINK+8/485 (2802) Port 4 */
446#define SEALEVEL_2802_5_PID 0X2852 /* SeaLINK+8/485 (2802) Port 5 */
447#define SEALEVEL_2802_6_PID 0X2862 /* SeaLINK+8/485 (2802) Port 6 */
448#define SEALEVEL_2802_7_PID 0X2872 /* SeaLINK+8/485 (2802) Port 7 */
449#define SEALEVEL_2802_8_PID 0X2882 /* SeaLINK+8/485 (2802) Port 8 */
450#define SEALEVEL_2803_1_PID 0X2813 /* SeaLINK+8 (2803) Port 1 */
451#define SEALEVEL_2803_2_PID 0X2823 /* SeaLINK+8 (2803) Port 2 */
452#define SEALEVEL_2803_3_PID 0X2833 /* SeaLINK+8 (2803) Port 3 */
453#define SEALEVEL_2803_4_PID 0X2843 /* SeaLINK+8 (2803) Port 4 */
454#define SEALEVEL_2803_5_PID 0X2853 /* SeaLINK+8 (2803) Port 5 */
455#define SEALEVEL_2803_6_PID 0X2863 /* SeaLINK+8 (2803) Port 6 */
456#define SEALEVEL_2803_7_PID 0X2873 /* SeaLINK+8 (2803) Port 7 */
457#define SEALEVEL_2803_8_PID 0X2883 /* SeaLINK+8 (2803) Port 8 */
458
459/*
460 * The following are the values for two KOBIL chipcard terminals.
461 */
462#define KOBIL_VID 0x0d46 /* KOBIL Vendor ID */
463#define KOBIL_CONV_B1_PID 0x2020 /* KOBIL Konverter for B1 */
464#define KOBIL_CONV_KAAN_PID 0x2021 /* KOBIL_Konverter for KAAN */
465
466/*
467 * Icom ID-1 digital transceiver
468 */
469
470#define ICOM_ID1_VID 0x0C26
471#define ICOM_ID1_PID 0x0004
472
473/*
474 * ASK.fr devices
475 */
476#define FTDI_ASK_RDR400_PID 0xC991 /* ASK RDR 400 series card reader */
477
478/*
479 * FTDI USB UART chips used in construction projects from the
480 * Elektor Electronics magazine (http://elektor-electronics.co.uk)
481 */
482#define ELEKTOR_VID 0x0C7D
483#define ELEKTOR_FT323R_PID 0x0005 /* RFID-Reader, issue 09-2006 */
484
485/*
486 * DSS-20 Sync Station for Sony Ericsson P800
487 */
488#define FTDI_DSS20_PID 0xFC82
489
490/*
491 * Home Electronics (www.home-electro.com) USB gadgets
492 */
493#define FTDI_HE_TIRA1_PID 0xFA78 /* Tira-1 IR transceiver */
494
495/* USB-UIRT - An infrared receiver and transmitter using the 8U232AM chip */
496/* http://home.earthlink.net/~jrhees/USBUIRT/index.htm */
497#define FTDI_USB_UIRT_PID 0xF850 /* Product Id */
498
499/* TNC-X USB-to-packet-radio adapter, versions prior to 3.0 (DLP module) */
500
501#define FTDI_TNC_X_PID 0xEBE0
502
503/*
504 * ELV USB devices submitted by Christian Abt of ELV (www.elv.de).
505 * All of these devices use FTDI's vendor ID (0x0403).
506 *
507 * The previously included PID for the UO 100 module was incorrect.
508 * In fact, that PID was for ELV's UR 100 USB-RS232 converter (0xFB58).
509 *
510 * Armin Laeuger originally sent the PID for the UM 100 module.
511 */
512#define FTDI_R2000KU_TRUE_RNG 0xFB80 /* R2000KU TRUE RNG */
513#define FTDI_ELV_UR100_PID 0xFB58 /* USB-RS232-Umsetzer (UR 100) */
514#define FTDI_ELV_UM100_PID 0xFB5A /* USB-Modul UM 100 */
515#define FTDI_ELV_UO100_PID 0xFB5B /* USB-Modul UO 100 */
516#define FTDI_ELV_ALC8500_PID 0xF06E /* ALC 8500 Expert */
517/* Additional ELV PIDs that default to using the FTDI D2XX drivers on
518 * MS Windows, rather than the FTDI Virtual Com Port drivers.
519 * Maybe these will be easier to use with the libftdi/libusb user-space
520 * drivers, or possibly the Comedi drivers in some cases. */
521#define FTDI_ELV_CLI7000_PID 0xFB59 /* Computer-Light-Interface (CLI 7000) */
522#define FTDI_ELV_PPS7330_PID 0xFB5C /* Processor-Power-Supply (PPS 7330) */
523#define FTDI_ELV_TFM100_PID 0xFB5D /* Temperartur-Feuchte Messgeraet (TFM 100) */
524#define FTDI_ELV_UDF77_PID 0xFB5E /* USB DCF Funkurh (UDF 77) */
525#define FTDI_ELV_UIO88_PID 0xFB5F /* USB-I/O Interface (UIO 88) */
526#define FTDI_ELV_UAD8_PID 0xF068 /* USB-AD-Wandler (UAD 8) */
527#define FTDI_ELV_UDA7_PID 0xF069 /* USB-DA-Wandler (UDA 7) */
528#define FTDI_ELV_USI2_PID 0xF06A /* USB-Schrittmotoren-Interface (USI 2) */
529#define FTDI_ELV_T1100_PID 0xF06B /* Thermometer (T 1100) */
530#define FTDI_ELV_PCD200_PID 0xF06C /* PC-Datenlogger (PCD 200) */
531#define FTDI_ELV_ULA200_PID 0xF06D /* USB-LCD-Ansteuerung (ULA 200) */
532#define FTDI_ELV_FHZ1000PC_PID 0xF06F /* FHZ 1000 PC */
533#define FTDI_ELV_CSI8_PID 0xE0F0 /* Computer-Schalt-Interface (CSI 8) */
534#define FTDI_ELV_EM1000DL_PID 0xE0F1 /* PC-Datenlogger fuer Energiemonitor (EM 1000 DL) */
535#define FTDI_ELV_PCK100_PID 0xE0F2 /* PC-Kabeltester (PCK 100) */
536#define FTDI_ELV_RFP500_PID 0xE0F3 /* HF-Leistungsmesser (RFP 500) */
537#define FTDI_ELV_FS20SIG_PID 0xE0F4 /* Signalgeber (FS 20 SIG) */
538#define FTDI_ELV_WS300PC_PID 0xE0F6 /* PC-Wetterstation (WS 300 PC) */
539#define FTDI_ELV_FHZ1300PC_PID 0xE0E8 /* FHZ 1300 PC */
540#define FTDI_ELV_WS500_PID 0xE0E9 /* PC-Wetterstation (WS 500) */
541#define FTDI_ELV_HS485_PID 0xE0EA /* USB to RS-485 adapter */
542#define FTDI_ELV_EM1010PC_PID 0xE0EF /* Engery monitor EM 1010 PC */
543#define FTDI_PHI_FISCO_PID 0xE40B /* PHI Fisco USB to Serial cable */
544
545/*
546 * Definitions for ID TECH (www.idt-net.com) devices
547 */
548#define IDTECH_VID 0x0ACD /* ID TECH Vendor ID */
549#define IDTECH_IDT1221U_PID 0x0300 /* IDT1221U USB to RS-232 adapter */
550
551/*
552 * Definitions for Omnidirectional Control Technology, Inc. devices
553 */
554#define OCT_VID 0x0B39 /* OCT vendor ID */
555/* Note: OCT US101 is also rebadged as Dick Smith Electronics (NZ) XH6381 */
556/* Also rebadged as Dick Smith Electronics (Aus) XH6451 */
557/* Also rebadged as SIIG Inc. model US2308 hardware version 1 */
558#define OCT_US101_PID 0x0421 /* OCT US101 USB to RS-232 */
559
560/* an infrared receiver for user access control with IR tags */
561#define FTDI_PIEGROUP_PID 0xF208 /* Product Id */
562
563/*
564 * Definitions for Artemis astronomical USB based cameras
565 * Check it at http://www.artemisccd.co.uk/
566 */
567#define FTDI_ARTEMIS_PID 0xDF28 /* All Artemis Cameras */
568
569/*
570 * Definitions for ATIK Instruments astronomical USB based cameras
571 * Check it at http://www.atik-instruments.com/
572 */
573#define FTDI_ATIK_ATK16_PID 0xDF30 /* ATIK ATK-16 Grayscale Camera */
574#define FTDI_ATIK_ATK16C_PID 0xDF32 /* ATIK ATK-16C Colour Camera */
575#define FTDI_ATIK_ATK16HR_PID 0xDF31 /* ATIK ATK-16HR Grayscale Camera */
576#define FTDI_ATIK_ATK16HRC_PID 0xDF33 /* ATIK ATK-16HRC Colour Camera */
577#define FTDI_ATIK_ATK16IC_PID 0xDF35 /* ATIK ATK-16IC Grayscale Camera */
578
579/*
580 * Protego product ids
581 */
582#define PROTEGO_SPECIAL_1 0xFC70 /* special/unknown device */
583#define PROTEGO_R2X0 0xFC71 /* R200-USB TRNG unit (R210, R220, and R230) */
584#define PROTEGO_SPECIAL_3 0xFC72 /* special/unknown device */
585#define PROTEGO_SPECIAL_4 0xFC73 /* special/unknown device */
586
587/*
588 * Gude Analog- und Digitalsysteme GmbH
589 */
590#define FTDI_GUDEADS_E808_PID 0xE808
591#define FTDI_GUDEADS_E809_PID 0xE809
592#define FTDI_GUDEADS_E80A_PID 0xE80A
593#define FTDI_GUDEADS_E80B_PID 0xE80B
594#define FTDI_GUDEADS_E80C_PID 0xE80C
595#define FTDI_GUDEADS_E80D_PID 0xE80D
596#define FTDI_GUDEADS_E80E_PID 0xE80E
597#define FTDI_GUDEADS_E80F_PID 0xE80F
598#define FTDI_GUDEADS_E888_PID 0xE888 /* Expert ISDN Control USB */
599#define FTDI_GUDEADS_E889_PID 0xE889 /* USB RS-232 OptoBridge */
600#define FTDI_GUDEADS_E88A_PID 0xE88A
601#define FTDI_GUDEADS_E88B_PID 0xE88B
602#define FTDI_GUDEADS_E88C_PID 0xE88C
603#define FTDI_GUDEADS_E88D_PID 0xE88D
604#define FTDI_GUDEADS_E88E_PID 0xE88E
605#define FTDI_GUDEADS_E88F_PID 0xE88F
606
607/*
608 * Linx Technologies product ids
609 */
610#define LINX_SDMUSBQSS_PID 0xF448 /* Linx SDM-USB-QS-S */
611#define LINX_MASTERDEVEL2_PID 0xF449 /* Linx Master Development 2.0 */
612#define LINX_FUTURE_0_PID 0xF44A /* Linx future device */
613#define LINX_FUTURE_1_PID 0xF44B /* Linx future device */
614#define LINX_FUTURE_2_PID 0xF44C /* Linx future device */
615
616/* CCS Inc. ICDU/ICDU40 product ID - the FT232BM is used in an in-circuit-debugger */
617/* unit for PIC16's/PIC18's */
618#define FTDI_CCSICDU20_0_PID 0xF9D0
619#define FTDI_CCSICDU40_1_PID 0xF9D1
620#define FTDI_CCSMACHX_2_PID 0xF9D2
621#define FTDI_CCSLOAD_N_GO_3_PID 0xF9D3
622#define FTDI_CCSICDU64_4_PID 0xF9D4
623#define FTDI_CCSPRIME8_5_PID 0xF9D5
624
625/* Inside Accesso contactless reader (http://www.insidefr.com) */
626#define INSIDE_ACCESSO 0xFAD0
627
628/*
629 * Intrepid Control Systems (http://www.intrepidcs.com/) ValueCAN and NeoVI
630 */
631#define INTREPID_VID 0x093C
632#define INTREPID_VALUECAN_PID 0x0601
633#define INTREPID_NEOVI_PID 0x0701
634
635/*
636 * Falcom Wireless Communications GmbH
637 */
638#define FALCOM_VID 0x0F94 /* Vendor Id */
639#define FALCOM_TWIST_PID 0x0001 /* Falcom Twist USB GPRS modem */
640#define FALCOM_SAMBA_PID 0x0005 /* Falcom Samba USB GPRS modem */
641
642/*
643 * SUUNTO product ids
644 */
645#define FTDI_SUUNTO_SPORTS_PID 0xF680 /* Suunto Sports instrument */
646
647/*
648 * Oceanic product ids
649 */
650#define FTDI_OCEANIC_PID 0xF460 /* Oceanic dive instrument */
651
652/*
653 * TTi (Thurlby Thandar Instruments)
654 */
655#define TTI_VID 0x103E /* Vendor Id */
656#define TTI_QL355P_PID 0x03E8 /* TTi QL355P power supply */
657
658/*
659 * Definitions for B&B Electronics products.
660 */
661#define BANDB_VID 0x0856 /* B&B Electronics Vendor ID */
662#define BANDB_USOTL4_PID 0xAC01 /* USOTL4 Isolated RS-485 Converter */
663#define BANDB_USTL4_PID 0xAC02 /* USTL4 RS-485 Converter */
664#define BANDB_USO9ML2_PID 0xAC03 /* USO9ML2 Isolated RS-232 Converter */
665#define BANDB_USOPTL4_PID 0xAC11
666#define BANDB_USPTL4_PID 0xAC12
667#define BANDB_USO9ML2DR_2_PID 0xAC16
668#define BANDB_USO9ML2DR_PID 0xAC17
669#define BANDB_USOPTL4DR2_PID 0xAC18 /* USOPTL4R-2 2-port Isolated RS-232 Converter */
670#define BANDB_USOPTL4DR_PID 0xAC19
671#define BANDB_485USB9F_2W_PID 0xAC25
672#define BANDB_485USB9F_4W_PID 0xAC26
673#define BANDB_232USB9M_PID 0xAC27
674#define BANDB_485USBTB_2W_PID 0xAC33
675#define BANDB_485USBTB_4W_PID 0xAC34
676#define BANDB_TTL5USB9M_PID 0xAC49
677#define BANDB_TTL3USB9M_PID 0xAC50
678#define BANDB_ZZ_PROG1_USB_PID 0xBA02
679
680/*
681 * RM Michaelides CANview USB (http://www.rmcan.com)
682 * CAN fieldbus interface adapter, added by port GmbH www.port.de)
683 * Ian Abbott changed the macro names for consistency.
684 */
685#define FTDI_RM_CANVIEW_PID 0xfd60 /* Product Id */
686
687/*
688 * EVER Eco Pro UPS (http://www.ever.com.pl/)
689 */
690
691#define EVER_ECO_PRO_CDS 0xe520 /* RS-232 converter */
692
693/*
694 * 4N-GALAXY.DE PIDs for CAN-USB, USB-RS232, USB-RS422, USB-RS485,
695 * USB-TTY activ, USB-TTY passiv. Some PIDs are used by several devices
696 * and I'm not entirely sure which are used by which.
697 */
698#define FTDI_4N_GALAXY_DE_1_PID 0xF3C0
699#define FTDI_4N_GALAXY_DE_2_PID 0xF3C1
700
701/*
702 * Mobility Electronics products.
703 */
704#define MOBILITY_VID 0x1342
705#define MOBILITY_USB_SERIAL_PID 0x0202 /* EasiDock USB 200 serial */
706
707/*
708 * microHAM product IDs (http://www.microham.com).
709 * Submitted by Justin Burket (KL1RL) <zorton@jtan.com>
710 * and Mike Studer (K6EEP) <k6eep@hamsoftware.org>.
711 * Ian Abbott <abbotti@mev.co.uk> added a few more from the driver INF file.
712 */
713#define FTDI_MHAM_KW_PID 0xEEE8 /* USB-KW interface */
714#define FTDI_MHAM_YS_PID 0xEEE9 /* USB-YS interface */
715#define FTDI_MHAM_Y6_PID 0xEEEA /* USB-Y6 interface */
716#define FTDI_MHAM_Y8_PID 0xEEEB /* USB-Y8 interface */
717#define FTDI_MHAM_IC_PID 0xEEEC /* USB-IC interface */
718#define FTDI_MHAM_DB9_PID 0xEEED /* USB-DB9 interface */
719#define FTDI_MHAM_RS232_PID 0xEEEE /* USB-RS232 interface */
720#define FTDI_MHAM_Y9_PID 0xEEEF /* USB-Y9 interface */
721
722/*
723 * Active Robots product ids.
724 */
725#define FTDI_ACTIVE_ROBOTS_PID 0xE548 /* USB comms board */
726
727/*
728 * Xsens Technologies BV products (http://www.xsens.com).
729 */
730#define XSENS_CONVERTER_0_PID 0xD388
731#define XSENS_CONVERTER_1_PID 0xD389
732#define XSENS_CONVERTER_2_PID 0xD38A
733#define XSENS_CONVERTER_3_PID 0xD38B
734#define XSENS_CONVERTER_4_PID 0xD38C
735#define XSENS_CONVERTER_5_PID 0xD38D
736#define XSENS_CONVERTER_6_PID 0xD38E
737#define XSENS_CONVERTER_7_PID 0xD38F
738
739/*
740 * Teratronik product ids.
741 * Submitted by O. Wölfelschneider.
742 */
743#define FTDI_TERATRONIK_VCP_PID 0xEC88 /* Teratronik device (preferring VCP driver on windows) */
744#define FTDI_TERATRONIK_D2XX_PID 0xEC89 /* Teratronik device (preferring D2XX driver on windows) */
745
746/*
747 * Evolution Robotics products (http://www.evolution.com/).
748 * Submitted by Shawn M. Lavelle.
749 */
750#define EVOLUTION_VID 0xDEEE /* Vendor ID */
751#define EVOLUTION_ER1_PID 0x0300 /* ER1 Control Module */
752#define EVO_8U232AM_PID 0x02FF /* Evolution robotics RCM2 (FT232AM)*/
753#define EVO_HYBRID_PID 0x0302 /* Evolution robotics RCM4 PID (FT232BM)*/
754#define EVO_RCM4_PID 0x0303 /* Evolution robotics RCM4 PID */
755
756/* Pyramid Computer GmbH */
757#define FTDI_PYRAMID_PID 0xE6C8 /* Pyramid Appliance Display */
758
759/*
760 * NDI (www.ndigital.com) product ids
761 */
762#define FTDI_NDI_HUC_PID 0xDA70 /* NDI Host USB Converter */
763#define FTDI_NDI_SPECTRA_SCU_PID 0xDA71 /* NDI Spectra SCU */
764#define FTDI_NDI_FUTURE_2_PID 0xDA72 /* NDI future device #2 */
765#define FTDI_NDI_FUTURE_3_PID 0xDA73 /* NDI future device #3 */
766#define FTDI_NDI_AURORA_SCU_PID 0xDA74 /* NDI Aurora SCU */
767
768/*
769 * Posiflex inc retail equipment (http://www.posiflex.com.tw)
770 */
771#define POSIFLEX_VID 0x0d3a /* Vendor ID */
772#define POSIFLEX_PP7000_PID 0x0300 /* PP-7000II thermal printer */
773
774/*
775 * Westrex International devices submitted by Cory Lee
776 */
777#define FTDI_WESTREX_MODEL_777_PID 0xDC00 /* Model 777 */
778#define FTDI_WESTREX_MODEL_8900F_PID 0xDC01 /* Model 8900F */
779
780/*
781 * RR-CirKits LocoBuffer USB (http://www.rr-cirkits.com)
782 */
783#define FTDI_RRCIRKITS_LOCOBUFFER_PID 0xc7d0 /* LocoBuffer USB */
784
785/*
786 * Eclo (http://www.eclo.pt/) product IDs.
787 * PID 0xEA90 submitted by Martin Grill.
788 */
789#define FTDI_ECLO_COM_1WIRE_PID 0xEA90 /* COM to 1-Wire USB adaptor */
790
791/*
792 * Papouch products (http://www.papouch.com/)
793 * Submitted by Folkert van Heusden
794 */
795
796#define PAPOUCH_VID 0x5050 /* Vendor ID */
797#define PAPOUCH_TMU_PID 0x0400 /* TMU USB Thermometer */
798#define PAPOUCH_QUIDO4x4_PID 0x0900 /* Quido 4/4 Module */
799
800/*
801 * ACG Identification Technologies GmbH products (http://www.acg.de/).
802 * Submitted by anton -at- goto10 -dot- org.
803 */ 23 */
804#define FTDI_ACG_HFDUAL_PID 0xDD20 /* HF Dual ISO Reader (RFID) */
805
806/*
807 * Yost Engineering, Inc. products (www.yostengineering.com).
808 * PID 0xE050 submitted by Aaron Prose.
809 */
810#define FTDI_YEI_SERVOCENTER31_PID 0xE050 /* YEI ServoCenter3.1 USB */
811
812/*
813 * ThorLabs USB motor drivers
814 */
815#define FTDI_THORLABS_PID 0xfaf0 /* ThorLabs USB motor drivers */
816
817/*
818 * Testo products (http://www.testo.com/)
819 * Submitted by Colin Leroy
820 */
821#define TESTO_VID 0x128D
822#define TESTO_USB_INTERFACE_PID 0x0001
823
824/*
825 * Gamma Scout (http://gamma-scout.com/). Submitted by rsc@runtux.com.
826 */
827#define FTDI_GAMMA_SCOUT_PID 0xD678 /* Gamma Scout online */
828
829/*
830 * Tactrix OpenPort (ECU) devices.
831 * OpenPort 1.3M submitted by Donour Sizemore.
832 * OpenPort 1.3S and 1.3U submitted by Ian Abbott.
833 */
834#define FTDI_TACTRIX_OPENPORT_13M_PID 0xCC48 /* OpenPort 1.3 Mitsubishi */
835#define FTDI_TACTRIX_OPENPORT_13S_PID 0xCC49 /* OpenPort 1.3 Subaru */
836#define FTDI_TACTRIX_OPENPORT_13U_PID 0xCC4A /* OpenPort 1.3 Universal */
837
838/*
839 * Telldus Technologies
840 */
841#define TELLDUS_VID 0x1781 /* Vendor ID */
842#define TELLDUS_TELLSTICK_PID 0x0C30 /* RF control dongle 433 MHz using FT232RL */
843
844/*
845 * IBS elektronik product ids
846 * Submitted by Thomas Schleusener
847 */
848#define FTDI_IBS_US485_PID 0xff38 /* IBS US485 (USB<-->RS422/485 interface) */
849#define FTDI_IBS_PICPRO_PID 0xff39 /* IBS PIC-Programmer */
850#define FTDI_IBS_PCMCIA_PID 0xff3a /* IBS Card reader for PCMCIA SRAM-cards */
851#define FTDI_IBS_PK1_PID 0xff3b /* IBS PK1 - Particel counter */
852#define FTDI_IBS_RS232MON_PID 0xff3c /* IBS RS232 - Monitor */
853#define FTDI_IBS_APP70_PID 0xff3d /* APP 70 (dust monitoring system) */
854#define FTDI_IBS_PEDO_PID 0xff3e /* IBS PEDO-Modem (RF modem 868.35 MHz) */
855#define FTDI_IBS_PROD_PID 0xff3f /* future device */
856
857/*
858 * MaxStream devices www.maxstream.net
859 */
860#define FTDI_MAXSTREAM_PID 0xEE18 /* Xbee PKG-U Module */
861
862/* Olimex */
863#define OLIMEX_VID 0x15BA
864#define OLIMEX_ARM_USB_OCD_PID 0x0003
865
866/* Luminary Micro Stellaris Boards, VID = FTDI_VID */
867/* FTDI 2332C Dual channel device, side A=245 FIFO (JTAG), Side B=RS232 UART */
868#define LMI_LM3S_DEVEL_BOARD_PID 0xbcd8
869#define LMI_LM3S_EVAL_BOARD_PID 0xbcd9
870
871/* www.elsterelectricity.com Elster Unicom III Optical Probe */
872#define FTDI_ELSTER_UNICOM_PID 0xE700 /* Product Id */
873
874/*
875 * The Mobility Lab (TML)
876 * Submitted by Pierre Castella
877 */
878#define TML_VID 0x1B91 /* Vendor ID */
879#define TML_USB_SERIAL_PID 0x0064 /* USB - Serial Converter */
880
881/* Propox devices */
882#define FTDI_PROPOX_JTAGCABLEII_PID 0xD738
883
884/* Rig Expert Ukraine devices */
885#define FTDI_REU_TINY_PID 0xED22 /* RigExpert Tiny */
886
887/* Domintell products http://www.domintell.com */
888#define FTDI_DOMINTELL_DGQG_PID 0xEF50 /* Master */
889#define FTDI_DOMINTELL_DUSB_PID 0xEF51 /* DUSB01 module */
890
891/* Alti-2 products http://www.alti-2.com */
892#define ALTI2_VID 0x1BC9
893#define ALTI2_N3_PID 0x6001 /* Neptune 3 */
894 24
895/* Commands */ 25/* Commands */
896#define FTDI_SIO_RESET 0 /* Reset the port */ 26#define FTDI_SIO_RESET 0 /* Reset the port */
@@ -910,86 +40,6 @@
910#define INTERFACE_C 3 40#define INTERFACE_C 3
911#define INTERFACE_D 4 41#define INTERFACE_D 4
912 42
913/*
914 * FIC / OpenMoko, Inc. http://wiki.openmoko.org/wiki/Neo1973_Debug_Board_v3
915 * Submitted by Harald Welte <laforge@openmoko.org>
916 */
917#define FIC_VID 0x1457
918#define FIC_NEO1973_DEBUG_PID 0x5118
919
920/*
921 * RATOC REX-USB60F
922 */
923#define RATOC_VENDOR_ID 0x0584
924#define RATOC_PRODUCT_ID_USB60F 0xb020
925
926/*
927 * DIEBOLD BCS SE923
928 */
929#define DIEBOLD_BCS_SE923_PID 0xfb99
930
931/*
932 * Atmel STK541
933 */
934#define ATMEL_VID 0x03eb /* Vendor ID */
935#define STK541_PID 0x2109 /* Zigbee Controller */
936
937/*
938 * Dresden Elektronic Sensor Terminal Board
939 */
940#define DE_VID 0x1cf1 /* Vendor ID */
941#define STB_PID 0x0001 /* Sensor Terminal Board */
942#define WHT_PID 0x0004 /* Wireless Handheld Terminal */
943
944/*
945 * Blackfin gnICE JTAG
946 * http://docs.blackfin.uclinux.org/doku.php?id=hw:jtag:gnice
947 */
948#define ADI_VID 0x0456
949#define ADI_GNICE_PID 0xF000
950#define ADI_GNICEPLUS_PID 0xF001
951
952/*
953 * JETI SPECTROMETER SPECBOS 1201
954 * http://www.jeti.com/products/sys/scb/scb1201.php
955 */
956#define JETI_VID 0x0c6c
957#define JETI_SPC1201_PID 0x04b2
958
959/*
960 * Marvell SheevaPlug
961 */
962#define MARVELL_VID 0x9e88
963#define MARVELL_SHEEVAPLUG_PID 0x9e8f
964
965#define FTDI_TURTELIZER_PID 0xBDC8 /* JTAG/RS-232 adapter by egnite GmBH */
966
967/*
968 * GN Otometrics (http://www.otometrics.com)
969 * Submitted by Ville Sundberg.
970 */
971#define GN_OTOMETRICS_VID 0x0c33 /* Vendor ID */
972#define AURICAL_USB_PID 0x0010 /* Aurical USB Audiometer */
973
974/*
975 * Bayer Ascensia Contour blood glucose meter USB-converter cable.
976 * http://winglucofacts.com/cables/
977 */
978#define BAYER_VID 0x1A79
979#define BAYER_CONTOUR_CABLE_PID 0x6001
980
981/*
982 * Marvell OpenRD Base, Client
983 * http://www.open-rd.org
984 * OpenRD Base, Client use VID 0x0403
985 */
986#define MARVELL_OPENRD_PID 0x9e90
987
988/*
989 * Hameg HO820 and HO870 interface (using VID 0x0403)
990 */
991#define HAMEG_HO820_PID 0xed74
992#define HAMEG_HO870_PID 0xed71
993 43
994/* 44/*
995 * BmRequestType: 1100 0000b 45 * BmRequestType: 1100 0000b
@@ -1504,4 +554,3 @@ typedef enum {
1504 * B2..7 Length of message - (not including Byte 0) 554 * B2..7 Length of message - (not including Byte 0)
1505 * 555 *
1506 */ 556 */
1507
diff --git a/drivers/usb/serial/ftdi_sio_ids.h b/drivers/usb/serial/ftdi_sio_ids.h
new file mode 100644
index 000000000000..c8951aeed983
--- /dev/null
+++ b/drivers/usb/serial/ftdi_sio_ids.h
@@ -0,0 +1,1004 @@
1/*
2 * vendor/product IDs (VID/PID) of devices using FTDI USB serial converters.
3 * Please keep numerically sorted within individual areas, thanks!
4 *
5 * Philipp Gühring - pg@futureware.at - added the Device ID of the USB relais
6 * from Rudolf Gugler
7 *
8 */
9
10
11/**********************************/
12/***** devices using FTDI VID *****/
13/**********************************/
14
15
16#define FTDI_VID 0x0403 /* Vendor Id */
17
18
19/*** "original" FTDI device PIDs ***/
20
21#define FTDI_8U232AM_PID 0x6001 /* Similar device to SIO above */
22#define FTDI_8U232AM_ALT_PID 0x6006 /* FTDI's alternate PID for above */
23#define FTDI_8U2232C_PID 0x6010 /* Dual channel device */
24#define FTDI_4232H_PID 0x6011 /* Quad channel hi-speed device */
25#define FTDI_SIO_PID 0x8372 /* Product Id SIO application of 8U100AX */
26#define FTDI_232RL_PID 0xFBFA /* Product ID for FT232RL */
27
28
29/*** third-party PIDs (using FTDI_VID) ***/
30
31/*
32 * Marvell OpenRD Base, Client
33 * http://www.open-rd.org
34 * OpenRD Base, Client use VID 0x0403
35 */
36#define MARVELL_OPENRD_PID 0x9e90
37
38/* www.candapter.com Ewert Energy Systems CANdapter device */
39#define FTDI_CANDAPTER_PID 0x9F80 /* Product Id */
40
41#define FTDI_NXTCAM_PID 0xABB8 /* NXTCam for Mindstorms NXT */
42
43/* OOCDlink by Joern Kaipf <joernk@web.de>
44 * (http://www.joernonline.de/dw/doku.php?id=start&idx=projects:oocdlink) */
45#define FTDI_OOCDLINK_PID 0xbaf8 /* Amontec JTAGkey */
46
47/* Luminary Micro Stellaris Boards, VID = FTDI_VID */
48/* FTDI 2332C Dual channel device, side A=245 FIFO (JTAG), Side B=RS232 UART */
49#define LMI_LM3S_DEVEL_BOARD_PID 0xbcd8
50#define LMI_LM3S_EVAL_BOARD_PID 0xbcd9
51
52#define FTDI_TURTELIZER_PID 0xBDC8 /* JTAG/RS-232 adapter by egnite GmBH */
53
54/* OpenDCC (www.opendcc.de) product id */
55#define FTDI_OPENDCC_PID 0xBFD8
56#define FTDI_OPENDCC_SNIFFER_PID 0xBFD9
57#define FTDI_OPENDCC_THROTTLE_PID 0xBFDA
58#define FTDI_OPENDCC_GATEWAY_PID 0xBFDB
59
60/*
61 * RR-CirKits LocoBuffer USB (http://www.rr-cirkits.com)
62 */
63#define FTDI_RRCIRKITS_LOCOBUFFER_PID 0xc7d0 /* LocoBuffer USB */
64
65/* DMX4ALL DMX Interfaces */
66#define FTDI_DMX4ALL 0xC850
67
68/*
69 * ASK.fr devices
70 */
71#define FTDI_ASK_RDR400_PID 0xC991 /* ASK RDR 400 series card reader */
72
73/* www.starting-point-systems.com µChameleon device */
74#define FTDI_MICRO_CHAMELEON_PID 0xCAA0 /* Product Id */
75
76/*
77 * Tactrix OpenPort (ECU) devices.
78 * OpenPort 1.3M submitted by Donour Sizemore.
79 * OpenPort 1.3S and 1.3U submitted by Ian Abbott.
80 */
81#define FTDI_TACTRIX_OPENPORT_13M_PID 0xCC48 /* OpenPort 1.3 Mitsubishi */
82#define FTDI_TACTRIX_OPENPORT_13S_PID 0xCC49 /* OpenPort 1.3 Subaru */
83#define FTDI_TACTRIX_OPENPORT_13U_PID 0xCC4A /* OpenPort 1.3 Universal */
84
85/* SCS HF Radio Modems PID's (http://www.scs-ptc.com) */
86/* the VID is the standard ftdi vid (FTDI_VID) */
87#define FTDI_SCS_DEVICE_0_PID 0xD010 /* SCS PTC-IIusb */
88#define FTDI_SCS_DEVICE_1_PID 0xD011 /* SCS Tracker / DSP TNC */
89#define FTDI_SCS_DEVICE_2_PID 0xD012
90#define FTDI_SCS_DEVICE_3_PID 0xD013
91#define FTDI_SCS_DEVICE_4_PID 0xD014
92#define FTDI_SCS_DEVICE_5_PID 0xD015
93#define FTDI_SCS_DEVICE_6_PID 0xD016
94#define FTDI_SCS_DEVICE_7_PID 0xD017
95
96/* iPlus device */
97#define FTDI_IPLUS_PID 0xD070 /* Product Id */
98#define FTDI_IPLUS2_PID 0xD071 /* Product Id */
99
100/*
101 * Gamma Scout (http://gamma-scout.com/). Submitted by rsc@runtux.com.
102 */
103#define FTDI_GAMMA_SCOUT_PID 0xD678 /* Gamma Scout online */
104
105/* Propox devices */
106#define FTDI_PROPOX_JTAGCABLEII_PID 0xD738
107
108/*
109 * Xsens Technologies BV products (http://www.xsens.com).
110 */
111#define XSENS_CONVERTER_0_PID 0xD388
112#define XSENS_CONVERTER_1_PID 0xD389
113#define XSENS_CONVERTER_2_PID 0xD38A
114#define XSENS_CONVERTER_3_PID 0xD38B
115#define XSENS_CONVERTER_4_PID 0xD38C
116#define XSENS_CONVERTER_5_PID 0xD38D
117#define XSENS_CONVERTER_6_PID 0xD38E
118#define XSENS_CONVERTER_7_PID 0xD38F
119
120/*
121 * NDI (www.ndigital.com) product ids
122 */
123#define FTDI_NDI_HUC_PID 0xDA70 /* NDI Host USB Converter */
124#define FTDI_NDI_SPECTRA_SCU_PID 0xDA71 /* NDI Spectra SCU */
125#define FTDI_NDI_FUTURE_2_PID 0xDA72 /* NDI future device #2 */
126#define FTDI_NDI_FUTURE_3_PID 0xDA73 /* NDI future device #3 */
127#define FTDI_NDI_AURORA_SCU_PID 0xDA74 /* NDI Aurora SCU */
128
129/*
130 * Westrex International devices submitted by Cory Lee
131 */
132#define FTDI_WESTREX_MODEL_777_PID 0xDC00 /* Model 777 */
133#define FTDI_WESTREX_MODEL_8900F_PID 0xDC01 /* Model 8900F */
134
135/*
136 * ACG Identification Technologies GmbH products (http://www.acg.de/).
137 * Submitted by anton -at- goto10 -dot- org.
138 */
139#define FTDI_ACG_HFDUAL_PID 0xDD20 /* HF Dual ISO Reader (RFID) */
140
141/*
142 * Definitions for Artemis astronomical USB based cameras
143 * Check it at http://www.artemisccd.co.uk/
144 */
145#define FTDI_ARTEMIS_PID 0xDF28 /* All Artemis Cameras */
146
147/*
148 * Definitions for ATIK Instruments astronomical USB based cameras
149 * Check it at http://www.atik-instruments.com/
150 */
151#define FTDI_ATIK_ATK16_PID 0xDF30 /* ATIK ATK-16 Grayscale Camera */
152#define FTDI_ATIK_ATK16C_PID 0xDF32 /* ATIK ATK-16C Colour Camera */
153#define FTDI_ATIK_ATK16HR_PID 0xDF31 /* ATIK ATK-16HR Grayscale Camera */
154#define FTDI_ATIK_ATK16HRC_PID 0xDF33 /* ATIK ATK-16HRC Colour Camera */
155#define FTDI_ATIK_ATK16IC_PID 0xDF35 /* ATIK ATK-16IC Grayscale Camera */
156
157/*
158 * Yost Engineering, Inc. products (www.yostengineering.com).
159 * PID 0xE050 submitted by Aaron Prose.
160 */
161#define FTDI_YEI_SERVOCENTER31_PID 0xE050 /* YEI ServoCenter3.1 USB */
162
163/*
164 * ELV USB devices submitted by Christian Abt of ELV (www.elv.de).
165 * All of these devices use FTDI's vendor ID (0x0403).
166 * Further IDs taken from ELV Windows .inf file.
167 *
168 * The previously included PID for the UO 100 module was incorrect.
169 * In fact, that PID was for ELV's UR 100 USB-RS232 converter (0xFB58).
170 *
171 * Armin Laeuger originally sent the PID for the UM 100 module.
172 */
173#define FTDI_ELV_USR_PID 0xE000 /* ELV Universal-Sound-Recorder */
174#define FTDI_ELV_MSM1_PID 0xE001 /* ELV Mini-Sound-Modul */
175#define FTDI_ELV_KL100_PID 0xE002 /* ELV Kfz-Leistungsmesser KL 100 */
176#define FTDI_ELV_WS550_PID 0xE004 /* WS 550 */
177#define FTDI_ELV_EC3000_PID 0xE006 /* ENERGY CONTROL 3000 USB */
178#define FTDI_ELV_WS888_PID 0xE008 /* WS 888 */
179#define FTDI_ELV_TWS550_PID 0xE009 /* Technoline WS 550 */
180#define FTDI_ELV_FEM_PID 0xE00A /* Funk Energie Monitor */
181#define FTDI_ELV_FHZ1300PC_PID 0xE0E8 /* FHZ 1300 PC */
182#define FTDI_ELV_WS500_PID 0xE0E9 /* PC-Wetterstation (WS 500) */
183#define FTDI_ELV_HS485_PID 0xE0EA /* USB to RS-485 adapter */
184#define FTDI_ELV_UMS100_PID 0xE0EB /* ELV USB Master-Slave Schaltsteckdose UMS 100 */
185#define FTDI_ELV_TFD128_PID 0xE0EC /* ELV Temperatur-Feuchte-Datenlogger TFD 128 */
186#define FTDI_ELV_FM3RX_PID 0xE0ED /* ELV Messwertuebertragung FM3 RX */
187#define FTDI_ELV_WS777_PID 0xE0EE /* Conrad WS 777 */
188#define FTDI_ELV_EM1010PC_PID 0xE0EF /* Engery monitor EM 1010 PC */
189#define FTDI_ELV_CSI8_PID 0xE0F0 /* Computer-Schalt-Interface (CSI 8) */
190#define FTDI_ELV_EM1000DL_PID 0xE0F1 /* PC-Datenlogger fuer Energiemonitor (EM 1000 DL) */
191#define FTDI_ELV_PCK100_PID 0xE0F2 /* PC-Kabeltester (PCK 100) */
192#define FTDI_ELV_RFP500_PID 0xE0F3 /* HF-Leistungsmesser (RFP 500) */
193#define FTDI_ELV_FS20SIG_PID 0xE0F4 /* Signalgeber (FS 20 SIG) */
194#define FTDI_ELV_UTP8_PID 0xE0F5 /* ELV UTP 8 */
195#define FTDI_ELV_WS300PC_PID 0xE0F6 /* PC-Wetterstation (WS 300 PC) */
196#define FTDI_ELV_WS444PC_PID 0xE0F7 /* Conrad WS 444 PC */
197#define FTDI_PHI_FISCO_PID 0xE40B /* PHI Fisco USB to Serial cable */
198#define FTDI_ELV_UAD8_PID 0xF068 /* USB-AD-Wandler (UAD 8) */
199#define FTDI_ELV_UDA7_PID 0xF069 /* USB-DA-Wandler (UDA 7) */
200#define FTDI_ELV_USI2_PID 0xF06A /* USB-Schrittmotoren-Interface (USI 2) */
201#define FTDI_ELV_T1100_PID 0xF06B /* Thermometer (T 1100) */
202#define FTDI_ELV_PCD200_PID 0xF06C /* PC-Datenlogger (PCD 200) */
203#define FTDI_ELV_ULA200_PID 0xF06D /* USB-LCD-Ansteuerung (ULA 200) */
204#define FTDI_ELV_ALC8500_PID 0xF06E /* ALC 8500 Expert */
205#define FTDI_ELV_FHZ1000PC_PID 0xF06F /* FHZ 1000 PC */
206#define FTDI_ELV_UR100_PID 0xFB58 /* USB-RS232-Umsetzer (UR 100) */
207#define FTDI_ELV_UM100_PID 0xFB5A /* USB-Modul UM 100 */
208#define FTDI_ELV_UO100_PID 0xFB5B /* USB-Modul UO 100 */
209/* Additional ELV PIDs that default to using the FTDI D2XX drivers on
210 * MS Windows, rather than the FTDI Virtual Com Port drivers.
211 * Maybe these will be easier to use with the libftdi/libusb user-space
212 * drivers, or possibly the Comedi drivers in some cases. */
213#define FTDI_ELV_CLI7000_PID 0xFB59 /* Computer-Light-Interface (CLI 7000) */
214#define FTDI_ELV_PPS7330_PID 0xFB5C /* Processor-Power-Supply (PPS 7330) */
215#define FTDI_ELV_TFM100_PID 0xFB5D /* Temperartur-Feuchte Messgeraet (TFM 100) */
216#define FTDI_ELV_UDF77_PID 0xFB5E /* USB DCF Funkurh (UDF 77) */
217#define FTDI_ELV_UIO88_PID 0xFB5F /* USB-I/O Interface (UIO 88) */
218
219/*
220 * EVER Eco Pro UPS (http://www.ever.com.pl/)
221 */
222
223#define EVER_ECO_PRO_CDS 0xe520 /* RS-232 converter */
224
225/*
226 * Active Robots product ids.
227 */
228#define FTDI_ACTIVE_ROBOTS_PID 0xE548 /* USB comms board */
229
230/* Pyramid Computer GmbH */
231#define FTDI_PYRAMID_PID 0xE6C8 /* Pyramid Appliance Display */
232
233/* www.elsterelectricity.com Elster Unicom III Optical Probe */
234#define FTDI_ELSTER_UNICOM_PID 0xE700 /* Product Id */
235
236/*
237 * Gude Analog- und Digitalsysteme GmbH
238 */
239#define FTDI_GUDEADS_E808_PID 0xE808
240#define FTDI_GUDEADS_E809_PID 0xE809
241#define FTDI_GUDEADS_E80A_PID 0xE80A
242#define FTDI_GUDEADS_E80B_PID 0xE80B
243#define FTDI_GUDEADS_E80C_PID 0xE80C
244#define FTDI_GUDEADS_E80D_PID 0xE80D
245#define FTDI_GUDEADS_E80E_PID 0xE80E
246#define FTDI_GUDEADS_E80F_PID 0xE80F
247#define FTDI_GUDEADS_E888_PID 0xE888 /* Expert ISDN Control USB */
248#define FTDI_GUDEADS_E889_PID 0xE889 /* USB RS-232 OptoBridge */
249#define FTDI_GUDEADS_E88A_PID 0xE88A
250#define FTDI_GUDEADS_E88B_PID 0xE88B
251#define FTDI_GUDEADS_E88C_PID 0xE88C
252#define FTDI_GUDEADS_E88D_PID 0xE88D
253#define FTDI_GUDEADS_E88E_PID 0xE88E
254#define FTDI_GUDEADS_E88F_PID 0xE88F
255
256/*
257 * Eclo (http://www.eclo.pt/) product IDs.
258 * PID 0xEA90 submitted by Martin Grill.
259 */
260#define FTDI_ECLO_COM_1WIRE_PID 0xEA90 /* COM to 1-Wire USB adaptor */
261
262/* TNC-X USB-to-packet-radio adapter, versions prior to 3.0 (DLP module) */
263#define FTDI_TNC_X_PID 0xEBE0
264
265/*
266 * Teratronik product ids.
267 * Submitted by O. Wölfelschneider.
268 */
269#define FTDI_TERATRONIK_VCP_PID 0xEC88 /* Teratronik device (preferring VCP driver on windows) */
270#define FTDI_TERATRONIK_D2XX_PID 0xEC89 /* Teratronik device (preferring D2XX driver on windows) */
271
272/* Rig Expert Ukraine devices */
273#define FTDI_REU_TINY_PID 0xED22 /* RigExpert Tiny */
274
275/*
276 * Hameg HO820 and HO870 interface (using VID 0x0403)
277 */
278#define HAMEG_HO820_PID 0xed74
279#define HAMEG_HO870_PID 0xed71
280
281/*
282 * MaxStream devices www.maxstream.net
283 */
284#define FTDI_MAXSTREAM_PID 0xEE18 /* Xbee PKG-U Module */
285
286/*
287 * microHAM product IDs (http://www.microham.com).
288 * Submitted by Justin Burket (KL1RL) <zorton@jtan.com>
289 * and Mike Studer (K6EEP) <k6eep@hamsoftware.org>.
290 * Ian Abbott <abbotti@mev.co.uk> added a few more from the driver INF file.
291 */
292#define FTDI_MHAM_KW_PID 0xEEE8 /* USB-KW interface */
293#define FTDI_MHAM_YS_PID 0xEEE9 /* USB-YS interface */
294#define FTDI_MHAM_Y6_PID 0xEEEA /* USB-Y6 interface */
295#define FTDI_MHAM_Y8_PID 0xEEEB /* USB-Y8 interface */
296#define FTDI_MHAM_IC_PID 0xEEEC /* USB-IC interface */
297#define FTDI_MHAM_DB9_PID 0xEEED /* USB-DB9 interface */
298#define FTDI_MHAM_RS232_PID 0xEEEE /* USB-RS232 interface */
299#define FTDI_MHAM_Y9_PID 0xEEEF /* USB-Y9 interface */
300
301/* Domintell products http://www.domintell.com */
302#define FTDI_DOMINTELL_DGQG_PID 0xEF50 /* Master */
303#define FTDI_DOMINTELL_DUSB_PID 0xEF51 /* DUSB01 module */
304
305/*
306 * The following are the values for the Perle Systems
307 * UltraPort USB serial converters
308 */
309#define FTDI_PERLE_ULTRAPORT_PID 0xF0C0 /* Perle UltraPort Product Id */
310
311/* Sprog II (Andrew Crosland's SprogII DCC interface) */
312#define FTDI_SPROG_II 0xF0C8
313
314/* an infrared receiver for user access control with IR tags */
315#define FTDI_PIEGROUP_PID 0xF208 /* Product Id */
316
317/* ACT Solutions HomePro ZWave interface
318 (http://www.act-solutions.com/HomePro.htm) */
319#define FTDI_ACTZWAVE_PID 0xF2D0
320
321/*
322 * 4N-GALAXY.DE PIDs for CAN-USB, USB-RS232, USB-RS422, USB-RS485,
323 * USB-TTY activ, USB-TTY passiv. Some PIDs are used by several devices
324 * and I'm not entirely sure which are used by which.
325 */
326#define FTDI_4N_GALAXY_DE_1_PID 0xF3C0
327#define FTDI_4N_GALAXY_DE_2_PID 0xF3C1
328
329/*
330 * Linx Technologies product ids
331 */
332#define LINX_SDMUSBQSS_PID 0xF448 /* Linx SDM-USB-QS-S */
333#define LINX_MASTERDEVEL2_PID 0xF449 /* Linx Master Development 2.0 */
334#define LINX_FUTURE_0_PID 0xF44A /* Linx future device */
335#define LINX_FUTURE_1_PID 0xF44B /* Linx future device */
336#define LINX_FUTURE_2_PID 0xF44C /* Linx future device */
337
338/*
339 * Oceanic product ids
340 */
341#define FTDI_OCEANIC_PID 0xF460 /* Oceanic dive instrument */
342
343/*
344 * SUUNTO product ids
345 */
346#define FTDI_SUUNTO_SPORTS_PID 0xF680 /* Suunto Sports instrument */
347
348/* USB-UIRT - An infrared receiver and transmitter using the 8U232AM chip */
349/* http://home.earthlink.net/~jrhees/USBUIRT/index.htm */
350#define FTDI_USB_UIRT_PID 0xF850 /* Product Id */
351
352/* CCS Inc. ICDU/ICDU40 product ID -
353 * the FT232BM is used in an in-circuit-debugger unit for PIC16's/PIC18's */
354#define FTDI_CCSICDU20_0_PID 0xF9D0
355#define FTDI_CCSICDU40_1_PID 0xF9D1
356#define FTDI_CCSMACHX_2_PID 0xF9D2
357#define FTDI_CCSLOAD_N_GO_3_PID 0xF9D3
358#define FTDI_CCSICDU64_4_PID 0xF9D4
359#define FTDI_CCSPRIME8_5_PID 0xF9D5
360
361/*
362 * The following are the values for the Matrix Orbital LCD displays,
363 * which are the FT232BM ( similar to the 8U232AM )
364 */
365#define FTDI_MTXORB_0_PID 0xFA00 /* Matrix Orbital Product Id */
366#define FTDI_MTXORB_1_PID 0xFA01 /* Matrix Orbital Product Id */
367#define FTDI_MTXORB_2_PID 0xFA02 /* Matrix Orbital Product Id */
368#define FTDI_MTXORB_3_PID 0xFA03 /* Matrix Orbital Product Id */
369#define FTDI_MTXORB_4_PID 0xFA04 /* Matrix Orbital Product Id */
370#define FTDI_MTXORB_5_PID 0xFA05 /* Matrix Orbital Product Id */
371#define FTDI_MTXORB_6_PID 0xFA06 /* Matrix Orbital Product Id */
372
373/*
374 * Home Electronics (www.home-electro.com) USB gadgets
375 */
376#define FTDI_HE_TIRA1_PID 0xFA78 /* Tira-1 IR transceiver */
377
378/* Inside Accesso contactless reader (http://www.insidefr.com) */
379#define INSIDE_ACCESSO 0xFAD0
380
381/*
382 * ThorLabs USB motor drivers
383 */
384#define FTDI_THORLABS_PID 0xfaf0 /* ThorLabs USB motor drivers */
385
386/*
387 * Protego product ids
388 */
389#define PROTEGO_SPECIAL_1 0xFC70 /* special/unknown device */
390#define PROTEGO_R2X0 0xFC71 /* R200-USB TRNG unit (R210, R220, and R230) */
391#define PROTEGO_SPECIAL_3 0xFC72 /* special/unknown device */
392#define PROTEGO_SPECIAL_4 0xFC73 /* special/unknown device */
393
394/*
395 * DSS-20 Sync Station for Sony Ericsson P800
396 */
397#define FTDI_DSS20_PID 0xFC82
398
399/* www.irtrans.de device */
400#define FTDI_IRTRANS_PID 0xFC60 /* Product Id */
401
402/*
403 * RM Michaelides CANview USB (http://www.rmcan.com) (FTDI_VID)
404 * CAN fieldbus interface adapter, added by port GmbH www.port.de)
405 * Ian Abbott changed the macro names for consistency.
406 */
407#define FTDI_RM_CANVIEW_PID 0xfd60 /* Product Id */
408/* www.thoughttechnology.com/ TT-USB provide with procomp use ftdi_sio */
409#define FTDI_TTUSB_PID 0xFF20 /* Product Id */
410
411#define FTDI_USBX_707_PID 0xF857 /* ADSTech IR Blaster USBX-707 (FTDI_VID) */
412
413#define FTDI_RELAIS_PID 0xFA10 /* Relais device from Rudolf Gugler */
414
415/*
416 * PCDJ use ftdi based dj-controllers. The following PID is
417 * for their DAC-2 device http://www.pcdjhardware.com/DAC2.asp
418 * (the VID is the standard ftdi vid (FTDI_VID), PID sent by Wouter Paesen)
419 */
420#define FTDI_PCDJ_DAC2_PID 0xFA88
421
422#define FTDI_R2000KU_TRUE_RNG 0xFB80 /* R2000KU TRUE RNG (FTDI_VID) */
423
424/*
425 * DIEBOLD BCS SE923 (FTDI_VID)
426 */
427#define DIEBOLD_BCS_SE923_PID 0xfb99
428
429/* www.crystalfontz.com devices
430 * - thanx for providing free devices for evaluation !
431 * they use the ftdi chipset for the USB interface
432 * and the vendor id is the same
433 */
434#define FTDI_XF_632_PID 0xFC08 /* 632: 16x2 Character Display */
435#define FTDI_XF_634_PID 0xFC09 /* 634: 20x4 Character Display */
436#define FTDI_XF_547_PID 0xFC0A /* 547: Two line Display */
437#define FTDI_XF_633_PID 0xFC0B /* 633: 16x2 Character Display with Keys */
438#define FTDI_XF_631_PID 0xFC0C /* 631: 20x2 Character Display */
439#define FTDI_XF_635_PID 0xFC0D /* 635: 20x4 Character Display */
440#define FTDI_XF_640_PID 0xFC0E /* 640: Two line Display */
441#define FTDI_XF_642_PID 0xFC0F /* 642: Two line Display */
442
443/*
444 * Video Networks Limited / Homechoice in the UK use an ftdi-based device
445 * for their 1Mb broadband internet service. The following PID is exhibited
446 * by the usb device supplied (the VID is the standard ftdi vid (FTDI_VID)
447 */
448#define FTDI_VNHCPCUSB_D_PID 0xfe38 /* Product Id */
449
450/* AlphaMicro Components AMC-232USB01 device (FTDI_VID) */
451#define FTDI_AMC232_PID 0xFF00 /* Product Id */
452
453/*
454 * IBS elektronik product ids (FTDI_VID)
455 * Submitted by Thomas Schleusener
456 */
457#define FTDI_IBS_US485_PID 0xff38 /* IBS US485 (USB<-->RS422/485 interface) */
458#define FTDI_IBS_PICPRO_PID 0xff39 /* IBS PIC-Programmer */
459#define FTDI_IBS_PCMCIA_PID 0xff3a /* IBS Card reader for PCMCIA SRAM-cards */
460#define FTDI_IBS_PK1_PID 0xff3b /* IBS PK1 - Particel counter */
461#define FTDI_IBS_RS232MON_PID 0xff3c /* IBS RS232 - Monitor */
462#define FTDI_IBS_APP70_PID 0xff3d /* APP 70 (dust monitoring system) */
463#define FTDI_IBS_PEDO_PID 0xff3e /* IBS PEDO-Modem (RF modem 868.35 MHz) */
464#define FTDI_IBS_PROD_PID 0xff3f /* future device */
465/* www.canusb.com Lawicel CANUSB device (FTDI_VID) */
466#define FTDI_CANUSB_PID 0xFFA8 /* Product Id */
467
468
469
470/********************************/
471/** third-party VID/PID combos **/
472/********************************/
473
474
475
476/*
477 * Atmel STK541
478 */
479#define ATMEL_VID 0x03eb /* Vendor ID */
480#define STK541_PID 0x2109 /* Zigbee Controller */
481
482/*
483 * Blackfin gnICE JTAG
484 * http://docs.blackfin.uclinux.org/doku.php?id=hw:jtag:gnice
485 */
486#define ADI_VID 0x0456
487#define ADI_GNICE_PID 0xF000
488#define ADI_GNICEPLUS_PID 0xF001
489
490/*
491 * RATOC REX-USB60F
492 */
493#define RATOC_VENDOR_ID 0x0584
494#define RATOC_PRODUCT_ID_USB60F 0xb020
495
496/*
497 * Definitions for B&B Electronics products.
498 */
499#define BANDB_VID 0x0856 /* B&B Electronics Vendor ID */
500#define BANDB_USOTL4_PID 0xAC01 /* USOTL4 Isolated RS-485 Converter */
501#define BANDB_USTL4_PID 0xAC02 /* USTL4 RS-485 Converter */
502#define BANDB_USO9ML2_PID 0xAC03 /* USO9ML2 Isolated RS-232 Converter */
503#define BANDB_USOPTL4_PID 0xAC11
504#define BANDB_USPTL4_PID 0xAC12
505#define BANDB_USO9ML2DR_2_PID 0xAC16
506#define BANDB_USO9ML2DR_PID 0xAC17
507#define BANDB_USOPTL4DR2_PID 0xAC18 /* USOPTL4R-2 2-port Isolated RS-232 Converter */
508#define BANDB_USOPTL4DR_PID 0xAC19
509#define BANDB_485USB9F_2W_PID 0xAC25
510#define BANDB_485USB9F_4W_PID 0xAC26
511#define BANDB_232USB9M_PID 0xAC27
512#define BANDB_485USBTB_2W_PID 0xAC33
513#define BANDB_485USBTB_4W_PID 0xAC34
514#define BANDB_TTL5USB9M_PID 0xAC49
515#define BANDB_TTL3USB9M_PID 0xAC50
516#define BANDB_ZZ_PROG1_USB_PID 0xBA02
517
518/*
519 * Intrepid Control Systems (http://www.intrepidcs.com/) ValueCAN and NeoVI
520 */
521#define INTREPID_VID 0x093C
522#define INTREPID_VALUECAN_PID 0x0601
523#define INTREPID_NEOVI_PID 0x0701
524
525/*
526 * Definitions for ID TECH (www.idt-net.com) devices
527 */
528#define IDTECH_VID 0x0ACD /* ID TECH Vendor ID */
529#define IDTECH_IDT1221U_PID 0x0300 /* IDT1221U USB to RS-232 adapter */
530
531/*
532 * Definitions for Omnidirectional Control Technology, Inc. devices
533 */
534#define OCT_VID 0x0B39 /* OCT vendor ID */
535/* Note: OCT US101 is also rebadged as Dick Smith Electronics (NZ) XH6381 */
536/* Also rebadged as Dick Smith Electronics (Aus) XH6451 */
537/* Also rebadged as SIIG Inc. model US2308 hardware version 1 */
538#define OCT_US101_PID 0x0421 /* OCT US101 USB to RS-232 */
539
540/*
541 * Icom ID-1 digital transceiver
542 */
543
544#define ICOM_ID1_VID 0x0C26
545#define ICOM_ID1_PID 0x0004
546
547/*
548 * GN Otometrics (http://www.otometrics.com)
549 * Submitted by Ville Sundberg.
550 */
551#define GN_OTOMETRICS_VID 0x0c33 /* Vendor ID */
552#define AURICAL_USB_PID 0x0010 /* Aurical USB Audiometer */
553
554/*
555 * The following are the values for the Sealevel SeaLINK+ adapters.
556 * (Original list sent by Tuan Hoang. Ian Abbott renamed the macros and
557 * removed some PIDs that don't seem to match any existing products.)
558 */
559#define SEALEVEL_VID 0x0c52 /* Sealevel Vendor ID */
560#define SEALEVEL_2101_PID 0x2101 /* SeaLINK+232 (2101/2105) */
561#define SEALEVEL_2102_PID 0x2102 /* SeaLINK+485 (2102) */
562#define SEALEVEL_2103_PID 0x2103 /* SeaLINK+232I (2103) */
563#define SEALEVEL_2104_PID 0x2104 /* SeaLINK+485I (2104) */
564#define SEALEVEL_2106_PID 0x9020 /* SeaLINK+422 (2106) */
565#define SEALEVEL_2201_1_PID 0x2211 /* SeaPORT+2/232 (2201) Port 1 */
566#define SEALEVEL_2201_2_PID 0x2221 /* SeaPORT+2/232 (2201) Port 2 */
567#define SEALEVEL_2202_1_PID 0x2212 /* SeaPORT+2/485 (2202) Port 1 */
568#define SEALEVEL_2202_2_PID 0x2222 /* SeaPORT+2/485 (2202) Port 2 */
569#define SEALEVEL_2203_1_PID 0x2213 /* SeaPORT+2 (2203) Port 1 */
570#define SEALEVEL_2203_2_PID 0x2223 /* SeaPORT+2 (2203) Port 2 */
571#define SEALEVEL_2401_1_PID 0x2411 /* SeaPORT+4/232 (2401) Port 1 */
572#define SEALEVEL_2401_2_PID 0x2421 /* SeaPORT+4/232 (2401) Port 2 */
573#define SEALEVEL_2401_3_PID 0x2431 /* SeaPORT+4/232 (2401) Port 3 */
574#define SEALEVEL_2401_4_PID 0x2441 /* SeaPORT+4/232 (2401) Port 4 */
575#define SEALEVEL_2402_1_PID 0x2412 /* SeaPORT+4/485 (2402) Port 1 */
576#define SEALEVEL_2402_2_PID 0x2422 /* SeaPORT+4/485 (2402) Port 2 */
577#define SEALEVEL_2402_3_PID 0x2432 /* SeaPORT+4/485 (2402) Port 3 */
578#define SEALEVEL_2402_4_PID 0x2442 /* SeaPORT+4/485 (2402) Port 4 */
579#define SEALEVEL_2403_1_PID 0x2413 /* SeaPORT+4 (2403) Port 1 */
580#define SEALEVEL_2403_2_PID 0x2423 /* SeaPORT+4 (2403) Port 2 */
581#define SEALEVEL_2403_3_PID 0x2433 /* SeaPORT+4 (2403) Port 3 */
582#define SEALEVEL_2403_4_PID 0x2443 /* SeaPORT+4 (2403) Port 4 */
583#define SEALEVEL_2801_1_PID 0X2811 /* SeaLINK+8/232 (2801) Port 1 */
584#define SEALEVEL_2801_2_PID 0X2821 /* SeaLINK+8/232 (2801) Port 2 */
585#define SEALEVEL_2801_3_PID 0X2831 /* SeaLINK+8/232 (2801) Port 3 */
586#define SEALEVEL_2801_4_PID 0X2841 /* SeaLINK+8/232 (2801) Port 4 */
587#define SEALEVEL_2801_5_PID 0X2851 /* SeaLINK+8/232 (2801) Port 5 */
588#define SEALEVEL_2801_6_PID 0X2861 /* SeaLINK+8/232 (2801) Port 6 */
589#define SEALEVEL_2801_7_PID 0X2871 /* SeaLINK+8/232 (2801) Port 7 */
590#define SEALEVEL_2801_8_PID 0X2881 /* SeaLINK+8/232 (2801) Port 8 */
591#define SEALEVEL_2802_1_PID 0X2812 /* SeaLINK+8/485 (2802) Port 1 */
592#define SEALEVEL_2802_2_PID 0X2822 /* SeaLINK+8/485 (2802) Port 2 */
593#define SEALEVEL_2802_3_PID 0X2832 /* SeaLINK+8/485 (2802) Port 3 */
594#define SEALEVEL_2802_4_PID 0X2842 /* SeaLINK+8/485 (2802) Port 4 */
595#define SEALEVEL_2802_5_PID 0X2852 /* SeaLINK+8/485 (2802) Port 5 */
596#define SEALEVEL_2802_6_PID 0X2862 /* SeaLINK+8/485 (2802) Port 6 */
597#define SEALEVEL_2802_7_PID 0X2872 /* SeaLINK+8/485 (2802) Port 7 */
598#define SEALEVEL_2802_8_PID 0X2882 /* SeaLINK+8/485 (2802) Port 8 */
599#define SEALEVEL_2803_1_PID 0X2813 /* SeaLINK+8 (2803) Port 1 */
600#define SEALEVEL_2803_2_PID 0X2823 /* SeaLINK+8 (2803) Port 2 */
601#define SEALEVEL_2803_3_PID 0X2833 /* SeaLINK+8 (2803) Port 3 */
602#define SEALEVEL_2803_4_PID 0X2843 /* SeaLINK+8 (2803) Port 4 */
603#define SEALEVEL_2803_5_PID 0X2853 /* SeaLINK+8 (2803) Port 5 */
604#define SEALEVEL_2803_6_PID 0X2863 /* SeaLINK+8 (2803) Port 6 */
605#define SEALEVEL_2803_7_PID 0X2873 /* SeaLINK+8 (2803) Port 7 */
606#define SEALEVEL_2803_8_PID 0X2883 /* SeaLINK+8 (2803) Port 8 */
607
608/*
609 * JETI SPECTROMETER SPECBOS 1201
610 * http://www.jeti.com/products/sys/scb/scb1201.php
611 */
612#define JETI_VID 0x0c6c
613#define JETI_SPC1201_PID 0x04b2
614
615/*
616 * FTDI USB UART chips used in construction projects from the
617 * Elektor Electronics magazine (http://elektor-electronics.co.uk)
618 */
619#define ELEKTOR_VID 0x0C7D
620#define ELEKTOR_FT323R_PID 0x0005 /* RFID-Reader, issue 09-2006 */
621
622/*
623 * Posiflex inc retail equipment (http://www.posiflex.com.tw)
624 */
625#define POSIFLEX_VID 0x0d3a /* Vendor ID */
626#define POSIFLEX_PP7000_PID 0x0300 /* PP-7000II thermal printer */
627
628/*
629 * The following are the values for two KOBIL chipcard terminals.
630 */
631#define KOBIL_VID 0x0d46 /* KOBIL Vendor ID */
632#define KOBIL_CONV_B1_PID 0x2020 /* KOBIL Konverter for B1 */
633#define KOBIL_CONV_KAAN_PID 0x2021 /* KOBIL_Konverter for KAAN */
634
635#define FTDI_NF_RIC_VID 0x0DCD /* Vendor Id */
636#define FTDI_NF_RIC_PID 0x0001 /* Product Id */
637
638/*
639 * Falcom Wireless Communications GmbH
640 */
641#define FALCOM_VID 0x0F94 /* Vendor Id */
642#define FALCOM_TWIST_PID 0x0001 /* Falcom Twist USB GPRS modem */
643#define FALCOM_SAMBA_PID 0x0005 /* Falcom Samba USB GPRS modem */
644
645/* Larsen and Brusgaard AltiTrack/USBtrack */
646#define LARSENBRUSGAARD_VID 0x0FD8
647#define LB_ALTITRACK_PID 0x0001
648
649/*
650 * TTi (Thurlby Thandar Instruments)
651 */
652#define TTI_VID 0x103E /* Vendor Id */
653#define TTI_QL355P_PID 0x03E8 /* TTi QL355P power supply */
654
655/* Interbiometrics USB I/O Board */
656/* Developed for Interbiometrics by Rudolf Gugler */
657#define INTERBIOMETRICS_VID 0x1209
658#define INTERBIOMETRICS_IOBOARD_PID 0x1002
659#define INTERBIOMETRICS_MINI_IOBOARD_PID 0x1006
660
661/*
662 * Testo products (http://www.testo.com/)
663 * Submitted by Colin Leroy
664 */
665#define TESTO_VID 0x128D
666#define TESTO_USB_INTERFACE_PID 0x0001
667
668/*
669 * Mobility Electronics products.
670 */
671#define MOBILITY_VID 0x1342
672#define MOBILITY_USB_SERIAL_PID 0x0202 /* EasiDock USB 200 serial */
673
674/*
675 * FIC / OpenMoko, Inc. http://wiki.openmoko.org/wiki/Neo1973_Debug_Board_v3
676 * Submitted by Harald Welte <laforge@openmoko.org>
677 */
678#define FIC_VID 0x1457
679#define FIC_NEO1973_DEBUG_PID 0x5118
680
681/* Olimex */
682#define OLIMEX_VID 0x15BA
683#define OLIMEX_ARM_USB_OCD_PID 0x0003
684
685/*
686 * Telldus Technologies
687 */
688#define TELLDUS_VID 0x1781 /* Vendor ID */
689#define TELLDUS_TELLSTICK_PID 0x0C30 /* RF control dongle 433 MHz using FT232RL */
690
691/*
692 * Bayer Ascensia Contour blood glucose meter USB-converter cable.
693 * http://winglucofacts.com/cables/
694 */
695#define BAYER_VID 0x1A79
696#define BAYER_CONTOUR_CABLE_PID 0x6001
697
698/*
699 * The following are the values for the Matrix Orbital FTDI Range
700 * Anything in this range will use an FT232RL.
701 */
702#define MTXORB_VID 0x1B3D
703#define MTXORB_FTDI_RANGE_0100_PID 0x0100
704#define MTXORB_FTDI_RANGE_0101_PID 0x0101
705#define MTXORB_FTDI_RANGE_0102_PID 0x0102
706#define MTXORB_FTDI_RANGE_0103_PID 0x0103
707#define MTXORB_FTDI_RANGE_0104_PID 0x0104
708#define MTXORB_FTDI_RANGE_0105_PID 0x0105
709#define MTXORB_FTDI_RANGE_0106_PID 0x0106
710#define MTXORB_FTDI_RANGE_0107_PID 0x0107
711#define MTXORB_FTDI_RANGE_0108_PID 0x0108
712#define MTXORB_FTDI_RANGE_0109_PID 0x0109
713#define MTXORB_FTDI_RANGE_010A_PID 0x010A
714#define MTXORB_FTDI_RANGE_010B_PID 0x010B
715#define MTXORB_FTDI_RANGE_010C_PID 0x010C
716#define MTXORB_FTDI_RANGE_010D_PID 0x010D
717#define MTXORB_FTDI_RANGE_010E_PID 0x010E
718#define MTXORB_FTDI_RANGE_010F_PID 0x010F
719#define MTXORB_FTDI_RANGE_0110_PID 0x0110
720#define MTXORB_FTDI_RANGE_0111_PID 0x0111
721#define MTXORB_FTDI_RANGE_0112_PID 0x0112
722#define MTXORB_FTDI_RANGE_0113_PID 0x0113
723#define MTXORB_FTDI_RANGE_0114_PID 0x0114
724#define MTXORB_FTDI_RANGE_0115_PID 0x0115
725#define MTXORB_FTDI_RANGE_0116_PID 0x0116
726#define MTXORB_FTDI_RANGE_0117_PID 0x0117
727#define MTXORB_FTDI_RANGE_0118_PID 0x0118
728#define MTXORB_FTDI_RANGE_0119_PID 0x0119
729#define MTXORB_FTDI_RANGE_011A_PID 0x011A
730#define MTXORB_FTDI_RANGE_011B_PID 0x011B
731#define MTXORB_FTDI_RANGE_011C_PID 0x011C
732#define MTXORB_FTDI_RANGE_011D_PID 0x011D
733#define MTXORB_FTDI_RANGE_011E_PID 0x011E
734#define MTXORB_FTDI_RANGE_011F_PID 0x011F
735#define MTXORB_FTDI_RANGE_0120_PID 0x0120
736#define MTXORB_FTDI_RANGE_0121_PID 0x0121
737#define MTXORB_FTDI_RANGE_0122_PID 0x0122
738#define MTXORB_FTDI_RANGE_0123_PID 0x0123
739#define MTXORB_FTDI_RANGE_0124_PID 0x0124
740#define MTXORB_FTDI_RANGE_0125_PID 0x0125
741#define MTXORB_FTDI_RANGE_0126_PID 0x0126
742#define MTXORB_FTDI_RANGE_0127_PID 0x0127
743#define MTXORB_FTDI_RANGE_0128_PID 0x0128
744#define MTXORB_FTDI_RANGE_0129_PID 0x0129
745#define MTXORB_FTDI_RANGE_012A_PID 0x012A
746#define MTXORB_FTDI_RANGE_012B_PID 0x012B
747#define MTXORB_FTDI_RANGE_012C_PID 0x012C
748#define MTXORB_FTDI_RANGE_012D_PID 0x012D
749#define MTXORB_FTDI_RANGE_012E_PID 0x012E
750#define MTXORB_FTDI_RANGE_012F_PID 0x012F
751#define MTXORB_FTDI_RANGE_0130_PID 0x0130
752#define MTXORB_FTDI_RANGE_0131_PID 0x0131
753#define MTXORB_FTDI_RANGE_0132_PID 0x0132
754#define MTXORB_FTDI_RANGE_0133_PID 0x0133
755#define MTXORB_FTDI_RANGE_0134_PID 0x0134
756#define MTXORB_FTDI_RANGE_0135_PID 0x0135
757#define MTXORB_FTDI_RANGE_0136_PID 0x0136
758#define MTXORB_FTDI_RANGE_0137_PID 0x0137
759#define MTXORB_FTDI_RANGE_0138_PID 0x0138
760#define MTXORB_FTDI_RANGE_0139_PID 0x0139
761#define MTXORB_FTDI_RANGE_013A_PID 0x013A
762#define MTXORB_FTDI_RANGE_013B_PID 0x013B
763#define MTXORB_FTDI_RANGE_013C_PID 0x013C
764#define MTXORB_FTDI_RANGE_013D_PID 0x013D
765#define MTXORB_FTDI_RANGE_013E_PID 0x013E
766#define MTXORB_FTDI_RANGE_013F_PID 0x013F
767#define MTXORB_FTDI_RANGE_0140_PID 0x0140
768#define MTXORB_FTDI_RANGE_0141_PID 0x0141
769#define MTXORB_FTDI_RANGE_0142_PID 0x0142
770#define MTXORB_FTDI_RANGE_0143_PID 0x0143
771#define MTXORB_FTDI_RANGE_0144_PID 0x0144
772#define MTXORB_FTDI_RANGE_0145_PID 0x0145
773#define MTXORB_FTDI_RANGE_0146_PID 0x0146
774#define MTXORB_FTDI_RANGE_0147_PID 0x0147
775#define MTXORB_FTDI_RANGE_0148_PID 0x0148
776#define MTXORB_FTDI_RANGE_0149_PID 0x0149
777#define MTXORB_FTDI_RANGE_014A_PID 0x014A
778#define MTXORB_FTDI_RANGE_014B_PID 0x014B
779#define MTXORB_FTDI_RANGE_014C_PID 0x014C
780#define MTXORB_FTDI_RANGE_014D_PID 0x014D
781#define MTXORB_FTDI_RANGE_014E_PID 0x014E
782#define MTXORB_FTDI_RANGE_014F_PID 0x014F
783#define MTXORB_FTDI_RANGE_0150_PID 0x0150
784#define MTXORB_FTDI_RANGE_0151_PID 0x0151
785#define MTXORB_FTDI_RANGE_0152_PID 0x0152
786#define MTXORB_FTDI_RANGE_0153_PID 0x0153
787#define MTXORB_FTDI_RANGE_0154_PID 0x0154
788#define MTXORB_FTDI_RANGE_0155_PID 0x0155
789#define MTXORB_FTDI_RANGE_0156_PID 0x0156
790#define MTXORB_FTDI_RANGE_0157_PID 0x0157
791#define MTXORB_FTDI_RANGE_0158_PID 0x0158
792#define MTXORB_FTDI_RANGE_0159_PID 0x0159
793#define MTXORB_FTDI_RANGE_015A_PID 0x015A
794#define MTXORB_FTDI_RANGE_015B_PID 0x015B
795#define MTXORB_FTDI_RANGE_015C_PID 0x015C
796#define MTXORB_FTDI_RANGE_015D_PID 0x015D
797#define MTXORB_FTDI_RANGE_015E_PID 0x015E
798#define MTXORB_FTDI_RANGE_015F_PID 0x015F
799#define MTXORB_FTDI_RANGE_0160_PID 0x0160
800#define MTXORB_FTDI_RANGE_0161_PID 0x0161
801#define MTXORB_FTDI_RANGE_0162_PID 0x0162
802#define MTXORB_FTDI_RANGE_0163_PID 0x0163
803#define MTXORB_FTDI_RANGE_0164_PID 0x0164
804#define MTXORB_FTDI_RANGE_0165_PID 0x0165
805#define MTXORB_FTDI_RANGE_0166_PID 0x0166
806#define MTXORB_FTDI_RANGE_0167_PID 0x0167
807#define MTXORB_FTDI_RANGE_0168_PID 0x0168
808#define MTXORB_FTDI_RANGE_0169_PID 0x0169
809#define MTXORB_FTDI_RANGE_016A_PID 0x016A
810#define MTXORB_FTDI_RANGE_016B_PID 0x016B
811#define MTXORB_FTDI_RANGE_016C_PID 0x016C
812#define MTXORB_FTDI_RANGE_016D_PID 0x016D
813#define MTXORB_FTDI_RANGE_016E_PID 0x016E
814#define MTXORB_FTDI_RANGE_016F_PID 0x016F
815#define MTXORB_FTDI_RANGE_0170_PID 0x0170
816#define MTXORB_FTDI_RANGE_0171_PID 0x0171
817#define MTXORB_FTDI_RANGE_0172_PID 0x0172
818#define MTXORB_FTDI_RANGE_0173_PID 0x0173
819#define MTXORB_FTDI_RANGE_0174_PID 0x0174
820#define MTXORB_FTDI_RANGE_0175_PID 0x0175
821#define MTXORB_FTDI_RANGE_0176_PID 0x0176
822#define MTXORB_FTDI_RANGE_0177_PID 0x0177
823#define MTXORB_FTDI_RANGE_0178_PID 0x0178
824#define MTXORB_FTDI_RANGE_0179_PID 0x0179
825#define MTXORB_FTDI_RANGE_017A_PID 0x017A
826#define MTXORB_FTDI_RANGE_017B_PID 0x017B
827#define MTXORB_FTDI_RANGE_017C_PID 0x017C
828#define MTXORB_FTDI_RANGE_017D_PID 0x017D
829#define MTXORB_FTDI_RANGE_017E_PID 0x017E
830#define MTXORB_FTDI_RANGE_017F_PID 0x017F
831#define MTXORB_FTDI_RANGE_0180_PID 0x0180
832#define MTXORB_FTDI_RANGE_0181_PID 0x0181
833#define MTXORB_FTDI_RANGE_0182_PID 0x0182
834#define MTXORB_FTDI_RANGE_0183_PID 0x0183
835#define MTXORB_FTDI_RANGE_0184_PID 0x0184
836#define MTXORB_FTDI_RANGE_0185_PID 0x0185
837#define MTXORB_FTDI_RANGE_0186_PID 0x0186
838#define MTXORB_FTDI_RANGE_0187_PID 0x0187
839#define MTXORB_FTDI_RANGE_0188_PID 0x0188
840#define MTXORB_FTDI_RANGE_0189_PID 0x0189
841#define MTXORB_FTDI_RANGE_018A_PID 0x018A
842#define MTXORB_FTDI_RANGE_018B_PID 0x018B
843#define MTXORB_FTDI_RANGE_018C_PID 0x018C
844#define MTXORB_FTDI_RANGE_018D_PID 0x018D
845#define MTXORB_FTDI_RANGE_018E_PID 0x018E
846#define MTXORB_FTDI_RANGE_018F_PID 0x018F
847#define MTXORB_FTDI_RANGE_0190_PID 0x0190
848#define MTXORB_FTDI_RANGE_0191_PID 0x0191
849#define MTXORB_FTDI_RANGE_0192_PID 0x0192
850#define MTXORB_FTDI_RANGE_0193_PID 0x0193
851#define MTXORB_FTDI_RANGE_0194_PID 0x0194
852#define MTXORB_FTDI_RANGE_0195_PID 0x0195
853#define MTXORB_FTDI_RANGE_0196_PID 0x0196
854#define MTXORB_FTDI_RANGE_0197_PID 0x0197
855#define MTXORB_FTDI_RANGE_0198_PID 0x0198
856#define MTXORB_FTDI_RANGE_0199_PID 0x0199
857#define MTXORB_FTDI_RANGE_019A_PID 0x019A
858#define MTXORB_FTDI_RANGE_019B_PID 0x019B
859#define MTXORB_FTDI_RANGE_019C_PID 0x019C
860#define MTXORB_FTDI_RANGE_019D_PID 0x019D
861#define MTXORB_FTDI_RANGE_019E_PID 0x019E
862#define MTXORB_FTDI_RANGE_019F_PID 0x019F
863#define MTXORB_FTDI_RANGE_01A0_PID 0x01A0
864#define MTXORB_FTDI_RANGE_01A1_PID 0x01A1
865#define MTXORB_FTDI_RANGE_01A2_PID 0x01A2
866#define MTXORB_FTDI_RANGE_01A3_PID 0x01A3
867#define MTXORB_FTDI_RANGE_01A4_PID 0x01A4
868#define MTXORB_FTDI_RANGE_01A5_PID 0x01A5
869#define MTXORB_FTDI_RANGE_01A6_PID 0x01A6
870#define MTXORB_FTDI_RANGE_01A7_PID 0x01A7
871#define MTXORB_FTDI_RANGE_01A8_PID 0x01A8
872#define MTXORB_FTDI_RANGE_01A9_PID 0x01A9
873#define MTXORB_FTDI_RANGE_01AA_PID 0x01AA
874#define MTXORB_FTDI_RANGE_01AB_PID 0x01AB
875#define MTXORB_FTDI_RANGE_01AC_PID 0x01AC
876#define MTXORB_FTDI_RANGE_01AD_PID 0x01AD
877#define MTXORB_FTDI_RANGE_01AE_PID 0x01AE
878#define MTXORB_FTDI_RANGE_01AF_PID 0x01AF
879#define MTXORB_FTDI_RANGE_01B0_PID 0x01B0
880#define MTXORB_FTDI_RANGE_01B1_PID 0x01B1
881#define MTXORB_FTDI_RANGE_01B2_PID 0x01B2
882#define MTXORB_FTDI_RANGE_01B3_PID 0x01B3
883#define MTXORB_FTDI_RANGE_01B4_PID 0x01B4
884#define MTXORB_FTDI_RANGE_01B5_PID 0x01B5
885#define MTXORB_FTDI_RANGE_01B6_PID 0x01B6
886#define MTXORB_FTDI_RANGE_01B7_PID 0x01B7
887#define MTXORB_FTDI_RANGE_01B8_PID 0x01B8
888#define MTXORB_FTDI_RANGE_01B9_PID 0x01B9
889#define MTXORB_FTDI_RANGE_01BA_PID 0x01BA
890#define MTXORB_FTDI_RANGE_01BB_PID 0x01BB
891#define MTXORB_FTDI_RANGE_01BC_PID 0x01BC
892#define MTXORB_FTDI_RANGE_01BD_PID 0x01BD
893#define MTXORB_FTDI_RANGE_01BE_PID 0x01BE
894#define MTXORB_FTDI_RANGE_01BF_PID 0x01BF
895#define MTXORB_FTDI_RANGE_01C0_PID 0x01C0
896#define MTXORB_FTDI_RANGE_01C1_PID 0x01C1
897#define MTXORB_FTDI_RANGE_01C2_PID 0x01C2
898#define MTXORB_FTDI_RANGE_01C3_PID 0x01C3
899#define MTXORB_FTDI_RANGE_01C4_PID 0x01C4
900#define MTXORB_FTDI_RANGE_01C5_PID 0x01C5
901#define MTXORB_FTDI_RANGE_01C6_PID 0x01C6
902#define MTXORB_FTDI_RANGE_01C7_PID 0x01C7
903#define MTXORB_FTDI_RANGE_01C8_PID 0x01C8
904#define MTXORB_FTDI_RANGE_01C9_PID 0x01C9
905#define MTXORB_FTDI_RANGE_01CA_PID 0x01CA
906#define MTXORB_FTDI_RANGE_01CB_PID 0x01CB
907#define MTXORB_FTDI_RANGE_01CC_PID 0x01CC
908#define MTXORB_FTDI_RANGE_01CD_PID 0x01CD
909#define MTXORB_FTDI_RANGE_01CE_PID 0x01CE
910#define MTXORB_FTDI_RANGE_01CF_PID 0x01CF
911#define MTXORB_FTDI_RANGE_01D0_PID 0x01D0
912#define MTXORB_FTDI_RANGE_01D1_PID 0x01D1
913#define MTXORB_FTDI_RANGE_01D2_PID 0x01D2
914#define MTXORB_FTDI_RANGE_01D3_PID 0x01D3
915#define MTXORB_FTDI_RANGE_01D4_PID 0x01D4
916#define MTXORB_FTDI_RANGE_01D5_PID 0x01D5
917#define MTXORB_FTDI_RANGE_01D6_PID 0x01D6
918#define MTXORB_FTDI_RANGE_01D7_PID 0x01D7
919#define MTXORB_FTDI_RANGE_01D8_PID 0x01D8
920#define MTXORB_FTDI_RANGE_01D9_PID 0x01D9
921#define MTXORB_FTDI_RANGE_01DA_PID 0x01DA
922#define MTXORB_FTDI_RANGE_01DB_PID 0x01DB
923#define MTXORB_FTDI_RANGE_01DC_PID 0x01DC
924#define MTXORB_FTDI_RANGE_01DD_PID 0x01DD
925#define MTXORB_FTDI_RANGE_01DE_PID 0x01DE
926#define MTXORB_FTDI_RANGE_01DF_PID 0x01DF
927#define MTXORB_FTDI_RANGE_01E0_PID 0x01E0
928#define MTXORB_FTDI_RANGE_01E1_PID 0x01E1
929#define MTXORB_FTDI_RANGE_01E2_PID 0x01E2
930#define MTXORB_FTDI_RANGE_01E3_PID 0x01E3
931#define MTXORB_FTDI_RANGE_01E4_PID 0x01E4
932#define MTXORB_FTDI_RANGE_01E5_PID 0x01E5
933#define MTXORB_FTDI_RANGE_01E6_PID 0x01E6
934#define MTXORB_FTDI_RANGE_01E7_PID 0x01E7
935#define MTXORB_FTDI_RANGE_01E8_PID 0x01E8
936#define MTXORB_FTDI_RANGE_01E9_PID 0x01E9
937#define MTXORB_FTDI_RANGE_01EA_PID 0x01EA
938#define MTXORB_FTDI_RANGE_01EB_PID 0x01EB
939#define MTXORB_FTDI_RANGE_01EC_PID 0x01EC
940#define MTXORB_FTDI_RANGE_01ED_PID 0x01ED
941#define MTXORB_FTDI_RANGE_01EE_PID 0x01EE
942#define MTXORB_FTDI_RANGE_01EF_PID 0x01EF
943#define MTXORB_FTDI_RANGE_01F0_PID 0x01F0
944#define MTXORB_FTDI_RANGE_01F1_PID 0x01F1
945#define MTXORB_FTDI_RANGE_01F2_PID 0x01F2
946#define MTXORB_FTDI_RANGE_01F3_PID 0x01F3
947#define MTXORB_FTDI_RANGE_01F4_PID 0x01F4
948#define MTXORB_FTDI_RANGE_01F5_PID 0x01F5
949#define MTXORB_FTDI_RANGE_01F6_PID 0x01F6
950#define MTXORB_FTDI_RANGE_01F7_PID 0x01F7
951#define MTXORB_FTDI_RANGE_01F8_PID 0x01F8
952#define MTXORB_FTDI_RANGE_01F9_PID 0x01F9
953#define MTXORB_FTDI_RANGE_01FA_PID 0x01FA
954#define MTXORB_FTDI_RANGE_01FB_PID 0x01FB
955#define MTXORB_FTDI_RANGE_01FC_PID 0x01FC
956#define MTXORB_FTDI_RANGE_01FD_PID 0x01FD
957#define MTXORB_FTDI_RANGE_01FE_PID 0x01FE
958#define MTXORB_FTDI_RANGE_01FF_PID 0x01FF
959
960
961
962/*
963 * The Mobility Lab (TML)
964 * Submitted by Pierre Castella
965 */
966#define TML_VID 0x1B91 /* Vendor ID */
967#define TML_USB_SERIAL_PID 0x0064 /* USB - Serial Converter */
968
969/* Alti-2 products http://www.alti-2.com */
970#define ALTI2_VID 0x1BC9
971#define ALTI2_N3_PID 0x6001 /* Neptune 3 */
972
973/*
974 * Dresden Elektronic Sensor Terminal Board
975 */
976#define DE_VID 0x1cf1 /* Vendor ID */
977#define STB_PID 0x0001 /* Sensor Terminal Board */
978#define WHT_PID 0x0004 /* Wireless Handheld Terminal */
979
980/*
981 * Papouch products (http://www.papouch.com/)
982 * Submitted by Folkert van Heusden
983 */
984
985#define PAPOUCH_VID 0x5050 /* Vendor ID */
986#define PAPOUCH_TMU_PID 0x0400 /* TMU USB Thermometer */
987#define PAPOUCH_QUIDO4x4_PID 0x0900 /* Quido 4/4 Module */
988#define PAPOUCH_AD4USB_PID 0x8003 /* AD4USB Measurement Module */
989
990/*
991 * Marvell SheevaPlug
992 */
993#define MARVELL_VID 0x9e88
994#define MARVELL_SHEEVAPLUG_PID 0x9e8f
995
996/*
997 * Evolution Robotics products (http://www.evolution.com/).
998 * Submitted by Shawn M. Lavelle.
999 */
1000#define EVOLUTION_VID 0xDEEE /* Vendor ID */
1001#define EVOLUTION_ER1_PID 0x0300 /* ER1 Control Module */
1002#define EVO_8U232AM_PID 0x02FF /* Evolution robotics RCM2 (FT232AM)*/
1003#define EVO_HYBRID_PID 0x0302 /* Evolution robotics RCM4 PID (FT232BM)*/
1004#define EVO_RCM4_PID 0x0303 /* Evolution robotics RCM4 PID */
diff --git a/drivers/usb/serial/generic.c b/drivers/usb/serial/generic.c
index bbe005cefcfb..83443d6306d6 100644
--- a/drivers/usb/serial/generic.c
+++ b/drivers/usb/serial/generic.c
@@ -276,7 +276,7 @@ static int usb_serial_generic_write_start(struct usb_serial_port *port)
276 if (port->write_urb_busy) 276 if (port->write_urb_busy)
277 start_io = false; 277 start_io = false;
278 else { 278 else {
279 start_io = (__kfifo_len(port->write_fifo) != 0); 279 start_io = (kfifo_len(&port->write_fifo) != 0);
280 port->write_urb_busy = start_io; 280 port->write_urb_busy = start_io;
281 } 281 }
282 spin_unlock_irqrestore(&port->lock, flags); 282 spin_unlock_irqrestore(&port->lock, flags);
@@ -285,7 +285,7 @@ static int usb_serial_generic_write_start(struct usb_serial_port *port)
285 return 0; 285 return 0;
286 286
287 data = port->write_urb->transfer_buffer; 287 data = port->write_urb->transfer_buffer;
288 count = kfifo_get(port->write_fifo, data, port->bulk_out_size); 288 count = kfifo_out_locked(&port->write_fifo, data, port->bulk_out_size, &port->lock);
289 usb_serial_debug_data(debug, &port->dev, __func__, count, data); 289 usb_serial_debug_data(debug, &port->dev, __func__, count, data);
290 290
291 /* set up our urb */ 291 /* set up our urb */
@@ -345,7 +345,7 @@ int usb_serial_generic_write(struct tty_struct *tty,
345 return usb_serial_multi_urb_write(tty, port, 345 return usb_serial_multi_urb_write(tty, port,
346 buf, count); 346 buf, count);
347 347
348 count = kfifo_put(port->write_fifo, buf, count); 348 count = kfifo_in_locked(&port->write_fifo, buf, count, &port->lock);
349 result = usb_serial_generic_write_start(port); 349 result = usb_serial_generic_write_start(port);
350 350
351 if (result >= 0) 351 if (result >= 0)
@@ -370,7 +370,7 @@ int usb_serial_generic_write_room(struct tty_struct *tty)
370 (serial->type->max_in_flight_urbs - 370 (serial->type->max_in_flight_urbs -
371 port->urbs_in_flight); 371 port->urbs_in_flight);
372 } else if (serial->num_bulk_out) 372 } else if (serial->num_bulk_out)
373 room = port->write_fifo->size - __kfifo_len(port->write_fifo); 373 room = kfifo_avail(&port->write_fifo);
374 spin_unlock_irqrestore(&port->lock, flags); 374 spin_unlock_irqrestore(&port->lock, flags);
375 375
376 dbg("%s - returns %d", __func__, room); 376 dbg("%s - returns %d", __func__, room);
@@ -386,12 +386,12 @@ int usb_serial_generic_chars_in_buffer(struct tty_struct *tty)
386 386
387 dbg("%s - port %d", __func__, port->number); 387 dbg("%s - port %d", __func__, port->number);
388 388
389 if (serial->type->max_in_flight_urbs) { 389 spin_lock_irqsave(&port->lock, flags);
390 spin_lock_irqsave(&port->lock, flags); 390 if (serial->type->max_in_flight_urbs)
391 chars = port->tx_bytes_flight; 391 chars = port->tx_bytes_flight;
392 spin_unlock_irqrestore(&port->lock, flags); 392 else if (serial->num_bulk_out)
393 } else if (serial->num_bulk_out) 393 chars = kfifo_len(&port->write_fifo);
394 chars = kfifo_len(port->write_fifo); 394 spin_unlock_irqrestore(&port->lock, flags);
395 395
396 dbg("%s - returns %d", __func__, chars); 396 dbg("%s - returns %d", __func__, chars);
397 return chars; 397 return chars;
@@ -489,6 +489,8 @@ void usb_serial_generic_write_bulk_callback(struct urb *urb)
489 dbg("%s - port %d", __func__, port->number); 489 dbg("%s - port %d", __func__, port->number);
490 490
491 if (port->serial->type->max_in_flight_urbs) { 491 if (port->serial->type->max_in_flight_urbs) {
492 kfree(urb->transfer_buffer);
493
492 spin_lock_irqsave(&port->lock, flags); 494 spin_lock_irqsave(&port->lock, flags);
493 --port->urbs_in_flight; 495 --port->urbs_in_flight;
494 port->tx_bytes_flight -= urb->transfer_buffer_length; 496 port->tx_bytes_flight -= urb->transfer_buffer_length;
@@ -507,7 +509,7 @@ void usb_serial_generic_write_bulk_callback(struct urb *urb)
507 if (status) { 509 if (status) {
508 dbg("%s - nonzero multi-urb write bulk status " 510 dbg("%s - nonzero multi-urb write bulk status "
509 "received: %d", __func__, status); 511 "received: %d", __func__, status);
510 kfifo_reset(port->write_fifo); 512 kfifo_reset_out(&port->write_fifo);
511 } else 513 } else
512 usb_serial_generic_write_start(port); 514 usb_serial_generic_write_start(port);
513 } 515 }
diff --git a/drivers/usb/serial/mos7840.c b/drivers/usb/serial/mos7840.c
index 485fa9c5b107..2cfe2451ed97 100644
--- a/drivers/usb/serial/mos7840.c
+++ b/drivers/usb/serial/mos7840.c
@@ -127,8 +127,9 @@
127#define BANDB_DEVICE_ID_US9ML2_4 0xAC30 127#define BANDB_DEVICE_ID_US9ML2_4 0xAC30
128#define BANDB_DEVICE_ID_USPTL4_2 0xAC31 128#define BANDB_DEVICE_ID_USPTL4_2 0xAC31
129#define BANDB_DEVICE_ID_USPTL4_4 0xAC32 129#define BANDB_DEVICE_ID_USPTL4_4 0xAC32
130#define BANDB_DEVICE_ID_USOPTL4_2 0xAC42 130#define BANDB_DEVICE_ID_USOPTL4_2 0xAC42
131#define BANDB_DEVICE_ID_USOPTL4_4 0xAC44 131#define BANDB_DEVICE_ID_USOPTL4_4 0xAC44
132#define BANDB_DEVICE_ID_USOPTL2_4 0xAC24
132 133
133/* This driver also supports 134/* This driver also supports
134 * ATEN UC2324 device using Moschip MCS7840 135 * ATEN UC2324 device using Moschip MCS7840
@@ -191,6 +192,7 @@ static struct usb_device_id moschip_port_id_table[] = {
191 {USB_DEVICE(USB_VENDOR_ID_BANDB, BANDB_DEVICE_ID_USPTL4_4)}, 192 {USB_DEVICE(USB_VENDOR_ID_BANDB, BANDB_DEVICE_ID_USPTL4_4)},
192 {USB_DEVICE(USB_VENDOR_ID_BANDB, BANDB_DEVICE_ID_USOPTL4_2)}, 193 {USB_DEVICE(USB_VENDOR_ID_BANDB, BANDB_DEVICE_ID_USOPTL4_2)},
193 {USB_DEVICE(USB_VENDOR_ID_BANDB, BANDB_DEVICE_ID_USOPTL4_4)}, 194 {USB_DEVICE(USB_VENDOR_ID_BANDB, BANDB_DEVICE_ID_USOPTL4_4)},
195 {USB_DEVICE(USB_VENDOR_ID_BANDB, BANDB_DEVICE_ID_USOPTL2_4)},
194 {USB_DEVICE(USB_VENDOR_ID_ATENINTL, ATENINTL_DEVICE_ID_UC2324)}, 196 {USB_DEVICE(USB_VENDOR_ID_ATENINTL, ATENINTL_DEVICE_ID_UC2324)},
195 {USB_DEVICE(USB_VENDOR_ID_ATENINTL, ATENINTL_DEVICE_ID_UC2322)}, 197 {USB_DEVICE(USB_VENDOR_ID_ATENINTL, ATENINTL_DEVICE_ID_UC2322)},
196 {} /* terminating entry */ 198 {} /* terminating entry */
@@ -207,6 +209,7 @@ static __devinitdata struct usb_device_id moschip_id_table_combined[] = {
207 {USB_DEVICE(USB_VENDOR_ID_BANDB, BANDB_DEVICE_ID_USPTL4_4)}, 209 {USB_DEVICE(USB_VENDOR_ID_BANDB, BANDB_DEVICE_ID_USPTL4_4)},
208 {USB_DEVICE(USB_VENDOR_ID_BANDB, BANDB_DEVICE_ID_USOPTL4_2)}, 210 {USB_DEVICE(USB_VENDOR_ID_BANDB, BANDB_DEVICE_ID_USOPTL4_2)},
209 {USB_DEVICE(USB_VENDOR_ID_BANDB, BANDB_DEVICE_ID_USOPTL4_4)}, 211 {USB_DEVICE(USB_VENDOR_ID_BANDB, BANDB_DEVICE_ID_USOPTL4_4)},
212 {USB_DEVICE(USB_VENDOR_ID_BANDB, BANDB_DEVICE_ID_USOPTL2_4)},
210 {USB_DEVICE(USB_VENDOR_ID_ATENINTL, ATENINTL_DEVICE_ID_UC2324)}, 213 {USB_DEVICE(USB_VENDOR_ID_ATENINTL, ATENINTL_DEVICE_ID_UC2324)},
211 {USB_DEVICE(USB_VENDOR_ID_ATENINTL, ATENINTL_DEVICE_ID_UC2322)}, 214 {USB_DEVICE(USB_VENDOR_ID_ATENINTL, ATENINTL_DEVICE_ID_UC2322)},
212 {} /* terminating entry */ 215 {} /* terminating entry */
diff --git a/drivers/usb/serial/option.c b/drivers/usb/serial/option.c
index 9a2b903492ec..6e94a6711f08 100644
--- a/drivers/usb/serial/option.c
+++ b/drivers/usb/serial/option.c
@@ -340,6 +340,10 @@ static int option_resume(struct usb_serial *serial);
340#define FOUR_G_SYSTEMS_VENDOR_ID 0x1c9e 340#define FOUR_G_SYSTEMS_VENDOR_ID 0x1c9e
341#define FOUR_G_SYSTEMS_PRODUCT_W14 0x9603 341#define FOUR_G_SYSTEMS_PRODUCT_W14 0x9603
342 342
343/* Haier products */
344#define HAIER_VENDOR_ID 0x201e
345#define HAIER_PRODUCT_CE100 0x2009
346
343static struct usb_device_id option_ids[] = { 347static struct usb_device_id option_ids[] = {
344 { USB_DEVICE(OPTION_VENDOR_ID, OPTION_PRODUCT_COLT) }, 348 { USB_DEVICE(OPTION_VENDOR_ID, OPTION_PRODUCT_COLT) },
345 { USB_DEVICE(OPTION_VENDOR_ID, OPTION_PRODUCT_RICOLA) }, 349 { USB_DEVICE(OPTION_VENDOR_ID, OPTION_PRODUCT_RICOLA) },
@@ -641,6 +645,7 @@ static struct usb_device_id option_ids[] = {
641 { USB_DEVICE(AIRPLUS_VENDOR_ID, AIRPLUS_PRODUCT_MCD650) }, 645 { USB_DEVICE(AIRPLUS_VENDOR_ID, AIRPLUS_PRODUCT_MCD650) },
642 { USB_DEVICE(TLAYTECH_VENDOR_ID, TLAYTECH_PRODUCT_TEU800) }, 646 { USB_DEVICE(TLAYTECH_VENDOR_ID, TLAYTECH_PRODUCT_TEU800) },
643 { USB_DEVICE(FOUR_G_SYSTEMS_VENDOR_ID, FOUR_G_SYSTEMS_PRODUCT_W14) }, 647 { USB_DEVICE(FOUR_G_SYSTEMS_VENDOR_ID, FOUR_G_SYSTEMS_PRODUCT_W14) },
648 { USB_DEVICE(HAIER_VENDOR_ID, HAIER_PRODUCT_CE100) },
644 { } /* Terminating entry */ 649 { } /* Terminating entry */
645}; 650};
646MODULE_DEVICE_TABLE(usb, option_ids); 651MODULE_DEVICE_TABLE(usb, option_ids);
diff --git a/drivers/usb/serial/sierra.c b/drivers/usb/serial/sierra.c
index ac1b6449fb6a..3eb6143bb646 100644
--- a/drivers/usb/serial/sierra.c
+++ b/drivers/usb/serial/sierra.c
@@ -298,6 +298,7 @@ static struct usb_device_id id_table [] = {
298 { USB_DEVICE(0x1199, 0x68A3), /* Sierra Wireless Direct IP modems */ 298 { USB_DEVICE(0x1199, 0x68A3), /* Sierra Wireless Direct IP modems */
299 .driver_info = (kernel_ulong_t)&direct_ip_interface_blacklist 299 .driver_info = (kernel_ulong_t)&direct_ip_interface_blacklist
300 }, 300 },
301 { USB_DEVICE(0x413C, 0x08133) }, /* Dell Computer Corp. Wireless 5720 VZW Mobile Broadband (EVDO Rev-A) Minicard GPS Port */
301 302
302 { } 303 { }
303}; 304};
diff --git a/drivers/usb/serial/usb-serial.c b/drivers/usb/serial/usb-serial.c
index 4543f359be75..33c85f7084f8 100644
--- a/drivers/usb/serial/usb-serial.c
+++ b/drivers/usb/serial/usb-serial.c
@@ -595,8 +595,7 @@ static void port_release(struct device *dev)
595 usb_free_urb(port->write_urb); 595 usb_free_urb(port->write_urb);
596 usb_free_urb(port->interrupt_in_urb); 596 usb_free_urb(port->interrupt_in_urb);
597 usb_free_urb(port->interrupt_out_urb); 597 usb_free_urb(port->interrupt_out_urb);
598 if (!IS_ERR(port->write_fifo) && port->write_fifo) 598 kfifo_free(&port->write_fifo);
599 kfifo_free(port->write_fifo);
600 kfree(port->bulk_in_buffer); 599 kfree(port->bulk_in_buffer);
601 kfree(port->bulk_out_buffer); 600 kfree(port->bulk_out_buffer);
602 kfree(port->interrupt_in_buffer); 601 kfree(port->interrupt_in_buffer);
@@ -939,9 +938,7 @@ int usb_serial_probe(struct usb_interface *interface,
939 dev_err(&interface->dev, "No free urbs available\n"); 938 dev_err(&interface->dev, "No free urbs available\n");
940 goto probe_error; 939 goto probe_error;
941 } 940 }
942 port->write_fifo = kfifo_alloc(PAGE_SIZE, GFP_KERNEL, 941 if (kfifo_alloc(&port->write_fifo, PAGE_SIZE, GFP_KERNEL))
943 &port->lock);
944 if (IS_ERR(port->write_fifo))
945 goto probe_error; 942 goto probe_error;
946 buffer_size = le16_to_cpu(endpoint->wMaxPacketSize); 943 buffer_size = le16_to_cpu(endpoint->wMaxPacketSize);
947 port->bulk_out_size = buffer_size; 944 port->bulk_out_size = buffer_size;
diff --git a/drivers/usb/storage/unusual_devs.h b/drivers/usb/storage/unusual_devs.h
index 64a0a2c27e12..49575fba3756 100644
--- a/drivers/usb/storage/unusual_devs.h
+++ b/drivers/usb/storage/unusual_devs.h
@@ -941,7 +941,7 @@ UNUSUAL_DEV( 0x07ab, 0xfccd, 0x0000, 0x9999,
941UNUSUAL_DEV( 0x07af, 0x0004, 0x0100, 0x0133, 941UNUSUAL_DEV( 0x07af, 0x0004, 0x0100, 0x0133,
942 "Microtech", 942 "Microtech",
943 "USB-SCSI-DB25", 943 "USB-SCSI-DB25",
944 US_SC_SCSI, US_PR_BULK, usb_stor_euscsi_init, 944 US_SC_DEVICE, US_PR_DEVICE, usb_stor_euscsi_init,
945 US_FL_SCM_MULT_TARG ), 945 US_FL_SCM_MULT_TARG ),
946 946
947UNUSUAL_DEV( 0x07af, 0x0005, 0x0100, 0x0100, 947UNUSUAL_DEV( 0x07af, 0x0005, 0x0100, 0x0100,
@@ -1807,13 +1807,6 @@ UNUSUAL_DEV( 0x2735, 0x100b, 0x0000, 0x9999,
1807 US_SC_DEVICE, US_PR_DEVICE, NULL, 1807 US_SC_DEVICE, US_PR_DEVICE, NULL,
1808 US_FL_GO_SLOW ), 1808 US_FL_GO_SLOW ),
1809 1809
1810/* Reported by Rohan Hart <rohan.hart17@gmail.com> */
1811UNUSUAL_DEV( 0x2770, 0x915d, 0x0010, 0x0010,
1812 "INTOVA",
1813 "Pixtreme",
1814 US_SC_DEVICE, US_PR_DEVICE, NULL,
1815 US_FL_FIX_CAPACITY ),
1816
1817/* Reported by Frederic Marchal <frederic.marchal@wowcompany.com> 1810/* Reported by Frederic Marchal <frederic.marchal@wowcompany.com>
1818 * Mio Moov 330 1811 * Mio Moov 330
1819 */ 1812 */
diff --git a/drivers/usb/storage/usb.c b/drivers/usb/storage/usb.c
index 5a53d4f0dd11..e9f995486ec1 100644
--- a/drivers/usb/storage/usb.c
+++ b/drivers/usb/storage/usb.c
@@ -434,7 +434,8 @@ static void adjust_quirks(struct us_data *us)
434 u16 vid = le16_to_cpu(us->pusb_dev->descriptor.idVendor); 434 u16 vid = le16_to_cpu(us->pusb_dev->descriptor.idVendor);
435 u16 pid = le16_to_cpu(us->pusb_dev->descriptor.idProduct); 435 u16 pid = le16_to_cpu(us->pusb_dev->descriptor.idProduct);
436 unsigned f = 0; 436 unsigned f = 0;
437 unsigned int mask = (US_FL_SANE_SENSE | US_FL_FIX_CAPACITY | 437 unsigned int mask = (US_FL_SANE_SENSE | US_FL_BAD_SENSE |
438 US_FL_FIX_CAPACITY |
438 US_FL_CAPACITY_HEURISTICS | US_FL_IGNORE_DEVICE | 439 US_FL_CAPACITY_HEURISTICS | US_FL_IGNORE_DEVICE |
439 US_FL_NOT_LOCKABLE | US_FL_MAX_SECTORS_64 | 440 US_FL_NOT_LOCKABLE | US_FL_MAX_SECTORS_64 |
440 US_FL_CAPACITY_OK | US_FL_IGNORE_RESIDUE | 441 US_FL_CAPACITY_OK | US_FL_IGNORE_RESIDUE |
diff --git a/drivers/video/atafb.c b/drivers/video/atafb.c
index 2051c9dc813b..b7687c55fe16 100644
--- a/drivers/video/atafb.c
+++ b/drivers/video/atafb.c
@@ -2245,9 +2245,6 @@ static int ext_setcolreg(unsigned int regno, unsigned int red,
2245 if (regno > 255) 2245 if (regno > 255)
2246 return 1; 2246 return 1;
2247 2247
2248 if (regno > 255)
2249 return 1;
2250
2251 switch (external_card_type) { 2248 switch (external_card_type) {
2252 case IS_VGA: 2249 case IS_VGA:
2253 OUTB(0x3c8, regno); 2250 OUTB(0x3c8, regno);
diff --git a/drivers/video/backlight/adp5520_bl.c b/drivers/video/backlight/adp5520_bl.c
index 4c10edecfb66..86d95c228adb 100644
--- a/drivers/video/backlight/adp5520_bl.c
+++ b/drivers/video/backlight/adp5520_bl.c
@@ -85,7 +85,7 @@ static int adp5520_bl_get_brightness(struct backlight_device *bl)
85 return error ? data->current_brightness : reg_val; 85 return error ? data->current_brightness : reg_val;
86} 86}
87 87
88static struct backlight_ops adp5520_bl_ops = { 88static const struct backlight_ops adp5520_bl_ops = {
89 .update_status = adp5520_bl_update_status, 89 .update_status = adp5520_bl_update_status,
90 .get_brightness = adp5520_bl_get_brightness, 90 .get_brightness = adp5520_bl_get_brightness,
91}; 91};
diff --git a/drivers/video/backlight/adx_bl.c b/drivers/video/backlight/adx_bl.c
index 2c3bdfc620b7..d769b0bab21a 100644
--- a/drivers/video/backlight/adx_bl.c
+++ b/drivers/video/backlight/adx_bl.c
@@ -61,7 +61,7 @@ static int adx_backlight_check_fb(struct fb_info *fb)
61 return 1; 61 return 1;
62} 62}
63 63
64static struct backlight_ops adx_backlight_ops = { 64static const struct backlight_ops adx_backlight_ops = {
65 .options = 0, 65 .options = 0,
66 .update_status = adx_backlight_update_status, 66 .update_status = adx_backlight_update_status,
67 .get_brightness = adx_backlight_get_brightness, 67 .get_brightness = adx_backlight_get_brightness,
diff --git a/drivers/video/backlight/atmel-pwm-bl.c b/drivers/video/backlight/atmel-pwm-bl.c
index 2cf7ba52f67c..f625ffc69ad3 100644
--- a/drivers/video/backlight/atmel-pwm-bl.c
+++ b/drivers/video/backlight/atmel-pwm-bl.c
@@ -113,7 +113,7 @@ static int atmel_pwm_bl_init_pwm(struct atmel_pwm_bl *pwmbl)
113 return pwm_channel_enable(&pwmbl->pwmc); 113 return pwm_channel_enable(&pwmbl->pwmc);
114} 114}
115 115
116static struct backlight_ops atmel_pwm_bl_ops = { 116static const struct backlight_ops atmel_pwm_bl_ops = {
117 .get_brightness = atmel_pwm_bl_get_intensity, 117 .get_brightness = atmel_pwm_bl_get_intensity,
118 .update_status = atmel_pwm_bl_set_intensity, 118 .update_status = atmel_pwm_bl_set_intensity,
119}; 119};
diff --git a/drivers/video/backlight/backlight.c b/drivers/video/backlight/backlight.c
index 6615ac7fa60a..18829cf68b1b 100644
--- a/drivers/video/backlight/backlight.c
+++ b/drivers/video/backlight/backlight.c
@@ -269,7 +269,7 @@ EXPORT_SYMBOL(backlight_force_update);
269 * ERR_PTR() or a pointer to the newly allocated device. 269 * ERR_PTR() or a pointer to the newly allocated device.
270 */ 270 */
271struct backlight_device *backlight_device_register(const char *name, 271struct backlight_device *backlight_device_register(const char *name,
272 struct device *parent, void *devdata, struct backlight_ops *ops) 272 struct device *parent, void *devdata, const struct backlight_ops *ops)
273{ 273{
274 struct backlight_device *new_bd; 274 struct backlight_device *new_bd;
275 int rc; 275 int rc;
diff --git a/drivers/video/backlight/corgi_lcd.c b/drivers/video/backlight/corgi_lcd.c
index 96774949cd30..b4bcf8043797 100644
--- a/drivers/video/backlight/corgi_lcd.c
+++ b/drivers/video/backlight/corgi_lcd.c
@@ -451,7 +451,7 @@ void corgi_lcd_limit_intensity(int limit)
451} 451}
452EXPORT_SYMBOL(corgi_lcd_limit_intensity); 452EXPORT_SYMBOL(corgi_lcd_limit_intensity);
453 453
454static struct backlight_ops corgi_bl_ops = { 454static const struct backlight_ops corgi_bl_ops = {
455 .get_brightness = corgi_bl_get_intensity, 455 .get_brightness = corgi_bl_get_intensity,
456 .update_status = corgi_bl_update_status, 456 .update_status = corgi_bl_update_status,
457}; 457};
diff --git a/drivers/video/backlight/cr_bllcd.c b/drivers/video/backlight/cr_bllcd.c
index b9fe62b475c6..da86db4374a0 100644
--- a/drivers/video/backlight/cr_bllcd.c
+++ b/drivers/video/backlight/cr_bllcd.c
@@ -108,7 +108,7 @@ static int cr_backlight_get_intensity(struct backlight_device *bd)
108 return intensity; 108 return intensity;
109} 109}
110 110
111static struct backlight_ops cr_backlight_ops = { 111static const struct backlight_ops cr_backlight_ops = {
112 .get_brightness = cr_backlight_get_intensity, 112 .get_brightness = cr_backlight_get_intensity,
113 .update_status = cr_backlight_set_intensity, 113 .update_status = cr_backlight_set_intensity,
114}; 114};
@@ -201,7 +201,7 @@ static int cr_backlight_probe(struct platform_device *pdev)
201 if (IS_ERR(ldp)) { 201 if (IS_ERR(ldp)) {
202 backlight_device_unregister(bdp); 202 backlight_device_unregister(bdp);
203 pci_dev_put(lpc_dev); 203 pci_dev_put(lpc_dev);
204 return PTR_ERR(bdp); 204 return PTR_ERR(ldp);
205 } 205 }
206 206
207 pci_read_config_dword(lpc_dev, CRVML_REG_GPIOBAR, 207 pci_read_config_dword(lpc_dev, CRVML_REG_GPIOBAR,
diff --git a/drivers/video/backlight/da903x_bl.c b/drivers/video/backlight/da903x_bl.c
index f2d76dae1eb3..74cdc640173d 100644
--- a/drivers/video/backlight/da903x_bl.c
+++ b/drivers/video/backlight/da903x_bl.c
@@ -95,7 +95,7 @@ static int da903x_backlight_get_brightness(struct backlight_device *bl)
95 return data->current_brightness; 95 return data->current_brightness;
96} 96}
97 97
98static struct backlight_ops da903x_backlight_ops = { 98static const struct backlight_ops da903x_backlight_ops = {
99 .update_status = da903x_backlight_update_status, 99 .update_status = da903x_backlight_update_status,
100 .get_brightness = da903x_backlight_get_brightness, 100 .get_brightness = da903x_backlight_get_brightness,
101}; 101};
diff --git a/drivers/video/backlight/generic_bl.c b/drivers/video/backlight/generic_bl.c
index 6d27f62fdcd0..e6d348e63596 100644
--- a/drivers/video/backlight/generic_bl.c
+++ b/drivers/video/backlight/generic_bl.c
@@ -70,7 +70,7 @@ void corgibl_limit_intensity(int limit)
70} 70}
71EXPORT_SYMBOL(corgibl_limit_intensity); 71EXPORT_SYMBOL(corgibl_limit_intensity);
72 72
73static struct backlight_ops genericbl_ops = { 73static const struct backlight_ops genericbl_ops = {
74 .options = BL_CORE_SUSPENDRESUME, 74 .options = BL_CORE_SUSPENDRESUME,
75 .get_brightness = genericbl_get_intensity, 75 .get_brightness = genericbl_get_intensity,
76 .update_status = genericbl_send_intensity, 76 .update_status = genericbl_send_intensity,
diff --git a/drivers/video/backlight/hp680_bl.c b/drivers/video/backlight/hp680_bl.c
index 7fb4eefff80d..f7cc528d5be7 100644
--- a/drivers/video/backlight/hp680_bl.c
+++ b/drivers/video/backlight/hp680_bl.c
@@ -98,7 +98,7 @@ static int hp680bl_get_intensity(struct backlight_device *bd)
98 return current_intensity; 98 return current_intensity;
99} 99}
100 100
101static struct backlight_ops hp680bl_ops = { 101static const struct backlight_ops hp680bl_ops = {
102 .get_brightness = hp680bl_get_intensity, 102 .get_brightness = hp680bl_get_intensity,
103 .update_status = hp680bl_set_intensity, 103 .update_status = hp680bl_set_intensity,
104}; 104};
diff --git a/drivers/video/backlight/jornada720_bl.c b/drivers/video/backlight/jornada720_bl.c
index 7aed2565c1bd..db9071fc5665 100644
--- a/drivers/video/backlight/jornada720_bl.c
+++ b/drivers/video/backlight/jornada720_bl.c
@@ -93,7 +93,7 @@ out:
93 return ret; 93 return ret;
94} 94}
95 95
96static struct backlight_ops jornada_bl_ops = { 96static const struct backlight_ops jornada_bl_ops = {
97 .get_brightness = jornada_bl_get_brightness, 97 .get_brightness = jornada_bl_get_brightness,
98 .update_status = jornada_bl_update_status, 98 .update_status = jornada_bl_update_status,
99 .options = BL_CORE_SUSPENDRESUME, 99 .options = BL_CORE_SUSPENDRESUME,
diff --git a/drivers/video/backlight/kb3886_bl.c b/drivers/video/backlight/kb3886_bl.c
index a38fda1742dd..939e7b830cf3 100644
--- a/drivers/video/backlight/kb3886_bl.c
+++ b/drivers/video/backlight/kb3886_bl.c
@@ -134,7 +134,7 @@ static int kb3886bl_get_intensity(struct backlight_device *bd)
134 return kb3886bl_intensity; 134 return kb3886bl_intensity;
135} 135}
136 136
137static struct backlight_ops kb3886bl_ops = { 137static const struct backlight_ops kb3886bl_ops = {
138 .get_brightness = kb3886bl_get_intensity, 138 .get_brightness = kb3886bl_get_intensity,
139 .update_status = kb3886bl_send_intensity, 139 .update_status = kb3886bl_send_intensity,
140}; 140};
diff --git a/drivers/video/backlight/locomolcd.c b/drivers/video/backlight/locomolcd.c
index 6b488b8a7eee..00a9591b0003 100644
--- a/drivers/video/backlight/locomolcd.c
+++ b/drivers/video/backlight/locomolcd.c
@@ -141,7 +141,7 @@ static int locomolcd_get_intensity(struct backlight_device *bd)
141 return current_intensity; 141 return current_intensity;
142} 142}
143 143
144static struct backlight_ops locomobl_data = { 144static const struct backlight_ops locomobl_data = {
145 .get_brightness = locomolcd_get_intensity, 145 .get_brightness = locomolcd_get_intensity,
146 .update_status = locomolcd_set_intensity, 146 .update_status = locomolcd_set_intensity,
147}; 147};
diff --git a/drivers/video/backlight/mbp_nvidia_bl.c b/drivers/video/backlight/mbp_nvidia_bl.c
index 9edb8d7c295f..2e78b0784bdc 100644
--- a/drivers/video/backlight/mbp_nvidia_bl.c
+++ b/drivers/video/backlight/mbp_nvidia_bl.c
@@ -33,7 +33,7 @@ struct dmi_match_data {
33 unsigned long iostart; 33 unsigned long iostart;
34 unsigned long iolen; 34 unsigned long iolen;
35 /* Backlight operations structure. */ 35 /* Backlight operations structure. */
36 struct backlight_ops backlight_ops; 36 const struct backlight_ops backlight_ops;
37}; 37};
38 38
39/* Module parameters. */ 39/* Module parameters. */
@@ -220,6 +220,24 @@ static const struct dmi_system_id __initdata mbp_device_table[] = {
220 }, 220 },
221 { 221 {
222 .callback = mbp_dmi_match, 222 .callback = mbp_dmi_match,
223 .ident = "MacBookPro 5,3",
224 .matches = {
225 DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."),
226 DMI_MATCH(DMI_PRODUCT_NAME, "MacBookPro5,3"),
227 },
228 .driver_data = (void *)&nvidia_chipset_data,
229 },
230 {
231 .callback = mbp_dmi_match,
232 .ident = "MacBookPro 5,4",
233 .matches = {
234 DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."),
235 DMI_MATCH(DMI_PRODUCT_NAME, "MacBookPro5,4"),
236 },
237 .driver_data = (void *)&nvidia_chipset_data,
238 },
239 {
240 .callback = mbp_dmi_match,
223 .ident = "MacBookPro 5,5", 241 .ident = "MacBookPro 5,5",
224 .matches = { 242 .matches = {
225 DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."), 243 DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."),
diff --git a/drivers/video/backlight/omap1_bl.c b/drivers/video/backlight/omap1_bl.c
index 8693e5fcd2eb..a3a7f8938175 100644
--- a/drivers/video/backlight/omap1_bl.c
+++ b/drivers/video/backlight/omap1_bl.c
@@ -125,7 +125,7 @@ static int omapbl_get_intensity(struct backlight_device *dev)
125 return bl->current_intensity; 125 return bl->current_intensity;
126} 126}
127 127
128static struct backlight_ops omapbl_ops = { 128static const struct backlight_ops omapbl_ops = {
129 .get_brightness = omapbl_get_intensity, 129 .get_brightness = omapbl_get_intensity,
130 .update_status = omapbl_update_status, 130 .update_status = omapbl_update_status,
131}; 131};
@@ -139,8 +139,6 @@ static int omapbl_probe(struct platform_device *pdev)
139 if (!pdata) 139 if (!pdata)
140 return -ENXIO; 140 return -ENXIO;
141 141
142 omapbl_ops.check_fb = pdata->check_fb;
143
144 bl = kzalloc(sizeof(struct omap_backlight), GFP_KERNEL); 142 bl = kzalloc(sizeof(struct omap_backlight), GFP_KERNEL);
145 if (unlikely(!bl)) 143 if (unlikely(!bl))
146 return -ENOMEM; 144 return -ENOMEM;
diff --git a/drivers/video/backlight/progear_bl.c b/drivers/video/backlight/progear_bl.c
index 9edaf24fd82d..075786e05034 100644
--- a/drivers/video/backlight/progear_bl.c
+++ b/drivers/video/backlight/progear_bl.c
@@ -54,7 +54,7 @@ static int progearbl_get_intensity(struct backlight_device *bd)
54 return intensity - HW_LEVEL_MIN; 54 return intensity - HW_LEVEL_MIN;
55} 55}
56 56
57static struct backlight_ops progearbl_ops = { 57static const struct backlight_ops progearbl_ops = {
58 .get_brightness = progearbl_get_intensity, 58 .get_brightness = progearbl_get_intensity,
59 .update_status = progearbl_set_intensity, 59 .update_status = progearbl_set_intensity,
60}; 60};
diff --git a/drivers/video/backlight/pwm_bl.c b/drivers/video/backlight/pwm_bl.c
index 887166267443..9d2ec2a1cce8 100644
--- a/drivers/video/backlight/pwm_bl.c
+++ b/drivers/video/backlight/pwm_bl.c
@@ -22,8 +22,10 @@
22 22
23struct pwm_bl_data { 23struct pwm_bl_data {
24 struct pwm_device *pwm; 24 struct pwm_device *pwm;
25 struct device *dev;
25 unsigned int period; 26 unsigned int period;
26 int (*notify)(int brightness); 27 int (*notify)(struct device *,
28 int brightness);
27}; 29};
28 30
29static int pwm_backlight_update_status(struct backlight_device *bl) 31static int pwm_backlight_update_status(struct backlight_device *bl)
@@ -39,7 +41,7 @@ static int pwm_backlight_update_status(struct backlight_device *bl)
39 brightness = 0; 41 brightness = 0;
40 42
41 if (pb->notify) 43 if (pb->notify)
42 brightness = pb->notify(brightness); 44 brightness = pb->notify(pb->dev, brightness);
43 45
44 if (brightness == 0) { 46 if (brightness == 0) {
45 pwm_config(pb->pwm, 0, pb->period); 47 pwm_config(pb->pwm, 0, pb->period);
@@ -56,7 +58,7 @@ static int pwm_backlight_get_brightness(struct backlight_device *bl)
56 return bl->props.brightness; 58 return bl->props.brightness;
57} 59}
58 60
59static struct backlight_ops pwm_backlight_ops = { 61static const struct backlight_ops pwm_backlight_ops = {
60 .update_status = pwm_backlight_update_status, 62 .update_status = pwm_backlight_update_status,
61 .get_brightness = pwm_backlight_get_brightness, 63 .get_brightness = pwm_backlight_get_brightness,
62}; 64};
@@ -88,6 +90,7 @@ static int pwm_backlight_probe(struct platform_device *pdev)
88 90
89 pb->period = data->pwm_period_ns; 91 pb->period = data->pwm_period_ns;
90 pb->notify = data->notify; 92 pb->notify = data->notify;
93 pb->dev = &pdev->dev;
91 94
92 pb->pwm = pwm_request(data->pwm_id, "backlight"); 95 pb->pwm = pwm_request(data->pwm_id, "backlight");
93 if (IS_ERR(pb->pwm)) { 96 if (IS_ERR(pb->pwm)) {
@@ -146,7 +149,7 @@ static int pwm_backlight_suspend(struct platform_device *pdev,
146 struct pwm_bl_data *pb = dev_get_drvdata(&bl->dev); 149 struct pwm_bl_data *pb = dev_get_drvdata(&bl->dev);
147 150
148 if (pb->notify) 151 if (pb->notify)
149 pb->notify(0); 152 pb->notify(pb->dev, 0);
150 pwm_config(pb->pwm, 0, pb->period); 153 pwm_config(pb->pwm, 0, pb->period);
151 pwm_disable(pb->pwm); 154 pwm_disable(pb->pwm);
152 return 0; 155 return 0;
diff --git a/drivers/video/backlight/tosa_bl.c b/drivers/video/backlight/tosa_bl.c
index 43edbada12d1..e14ce4d469f5 100644
--- a/drivers/video/backlight/tosa_bl.c
+++ b/drivers/video/backlight/tosa_bl.c
@@ -72,7 +72,7 @@ static int tosa_bl_get_brightness(struct backlight_device *dev)
72 return props->brightness; 72 return props->brightness;
73} 73}
74 74
75static struct backlight_ops bl_ops = { 75static const struct backlight_ops bl_ops = {
76 .get_brightness = tosa_bl_get_brightness, 76 .get_brightness = tosa_bl_get_brightness,
77 .update_status = tosa_bl_update_status, 77 .update_status = tosa_bl_update_status,
78}; 78};
diff --git a/drivers/video/backlight/wm831x_bl.c b/drivers/video/backlight/wm831x_bl.c
index 467bdb7efb23..e32add37a203 100644
--- a/drivers/video/backlight/wm831x_bl.c
+++ b/drivers/video/backlight/wm831x_bl.c
@@ -112,7 +112,7 @@ static int wm831x_backlight_get_brightness(struct backlight_device *bl)
112 return data->current_brightness; 112 return data->current_brightness;
113} 113}
114 114
115static struct backlight_ops wm831x_backlight_ops = { 115static const struct backlight_ops wm831x_backlight_ops = {
116 .options = BL_CORE_SUSPENDRESUME, 116 .options = BL_CORE_SUSPENDRESUME,
117 .update_status = wm831x_backlight_update_status, 117 .update_status = wm831x_backlight_update_status,
118 .get_brightness = wm831x_backlight_get_brightness, 118 .get_brightness = wm831x_backlight_get_brightness,
diff --git a/drivers/video/cyber2000fb.c b/drivers/video/cyber2000fb.c
index da7c01b39be2..3a561df2e8a2 100644
--- a/drivers/video/cyber2000fb.c
+++ b/drivers/video/cyber2000fb.c
@@ -1573,15 +1573,15 @@ cyberpro_pci_probe(struct pci_dev *dev, const struct pci_device_id *id)
1573 if (err) 1573 if (err)
1574 return err; 1574 return err;
1575 1575
1576 err = pci_request_regions(dev, name);
1577 if (err)
1578 return err;
1579
1580 err = -ENOMEM; 1576 err = -ENOMEM;
1581 cfb = cyberpro_alloc_fb_info(id->driver_data, name); 1577 cfb = cyberpro_alloc_fb_info(id->driver_data, name);
1582 if (!cfb) 1578 if (!cfb)
1583 goto failed_release; 1579 goto failed_release;
1584 1580
1581 err = pci_request_regions(dev, cfb->fb.fix.id);
1582 if (err)
1583 goto failed_regions;
1584
1585 cfb->dev = dev; 1585 cfb->dev = dev;
1586 cfb->region = pci_ioremap_bar(dev, 0); 1586 cfb->region = pci_ioremap_bar(dev, 0);
1587 if (!cfb->region) 1587 if (!cfb->region)
@@ -1633,10 +1633,10 @@ cyberpro_pci_probe(struct pci_dev *dev, const struct pci_device_id *id)
1633failed: 1633failed:
1634 iounmap(cfb->region); 1634 iounmap(cfb->region);
1635failed_ioremap: 1635failed_ioremap:
1636 pci_release_regions(dev);
1637failed_regions:
1636 cyberpro_free_fb_info(cfb); 1638 cyberpro_free_fb_info(cfb);
1637failed_release: 1639failed_release:
1638 pci_release_regions(dev);
1639
1640 return err; 1640 return err;
1641} 1641}
1642 1642
diff --git a/drivers/video/efifb.c b/drivers/video/efifb.c
index eb12182b2059..d25df51bb0d2 100644
--- a/drivers/video/efifb.c
+++ b/drivers/video/efifb.c
@@ -161,8 +161,17 @@ static int efifb_setcolreg(unsigned regno, unsigned red, unsigned green,
161 return 0; 161 return 0;
162} 162}
163 163
164static void efifb_destroy(struct fb_info *info)
165{
166 if (info->screen_base)
167 iounmap(info->screen_base);
168 release_mem_region(info->aperture_base, info->aperture_size);
169 framebuffer_release(info);
170}
171
164static struct fb_ops efifb_ops = { 172static struct fb_ops efifb_ops = {
165 .owner = THIS_MODULE, 173 .owner = THIS_MODULE,
174 .fb_destroy = efifb_destroy,
166 .fb_setcolreg = efifb_setcolreg, 175 .fb_setcolreg = efifb_setcolreg,
167 .fb_fillrect = cfb_fillrect, 176 .fb_fillrect = cfb_fillrect,
168 .fb_copyarea = cfb_copyarea, 177 .fb_copyarea = cfb_copyarea,
@@ -281,7 +290,7 @@ static int __init efifb_probe(struct platform_device *dev)
281 info->par = NULL; 290 info->par = NULL;
282 291
283 info->aperture_base = efifb_fix.smem_start; 292 info->aperture_base = efifb_fix.smem_start;
284 info->aperture_size = size_total; 293 info->aperture_size = size_remap;
285 294
286 info->screen_base = ioremap(efifb_fix.smem_start, efifb_fix.smem_len); 295 info->screen_base = ioremap(efifb_fix.smem_start, efifb_fix.smem_len);
287 if (!info->screen_base) { 296 if (!info->screen_base) {
diff --git a/drivers/video/imxfb.c b/drivers/video/imxfb.c
index 66358fa825f3..b4b6deceed15 100644
--- a/drivers/video/imxfb.c
+++ b/drivers/video/imxfb.c
@@ -593,7 +593,8 @@ static int imxfb_activate_var(struct fb_var_screeninfo *var, struct fb_info *inf
593 */ 593 */
594static int imxfb_suspend(struct platform_device *dev, pm_message_t state) 594static int imxfb_suspend(struct platform_device *dev, pm_message_t state)
595{ 595{
596 struct imxfb_info *fbi = platform_get_drvdata(dev); 596 struct fb_info *info = platform_get_drvdata(dev);
597 struct imxfb_info *fbi = info->par;
597 598
598 pr_debug("%s\n", __func__); 599 pr_debug("%s\n", __func__);
599 600
@@ -603,7 +604,8 @@ static int imxfb_suspend(struct platform_device *dev, pm_message_t state)
603 604
604static int imxfb_resume(struct platform_device *dev) 605static int imxfb_resume(struct platform_device *dev)
605{ 606{
606 struct imxfb_info *fbi = platform_get_drvdata(dev); 607 struct fb_info *info = platform_get_drvdata(dev);
608 struct imxfb_info *fbi = info->par;
607 609
608 pr_debug("%s\n", __func__); 610 pr_debug("%s\n", __func__);
609 611
diff --git a/drivers/video/mx3fb.c b/drivers/video/mx3fb.c
index 054ef29be479..772ba3f45e6f 100644
--- a/drivers/video/mx3fb.c
+++ b/drivers/video/mx3fb.c
@@ -324,8 +324,11 @@ static void sdc_enable_channel(struct mx3fb_info *mx3_fbi)
324 unsigned long flags; 324 unsigned long flags;
325 dma_cookie_t cookie; 325 dma_cookie_t cookie;
326 326
327 dev_dbg(mx3fb->dev, "mx3fbi %p, desc %p, sg %p\n", mx3_fbi, 327 if (mx3_fbi->txd)
328 to_tx_desc(mx3_fbi->txd), to_tx_desc(mx3_fbi->txd)->sg); 328 dev_dbg(mx3fb->dev, "mx3fbi %p, desc %p, sg %p\n", mx3_fbi,
329 to_tx_desc(mx3_fbi->txd), to_tx_desc(mx3_fbi->txd)->sg);
330 else
331 dev_dbg(mx3fb->dev, "mx3fbi %p, txd = NULL\n", mx3_fbi);
329 332
330 /* This enables the channel */ 333 /* This enables the channel */
331 if (mx3_fbi->cookie < 0) { 334 if (mx3_fbi->cookie < 0) {
@@ -646,6 +649,7 @@ static int sdc_set_global_alpha(struct mx3fb_data *mx3fb, bool enable, uint8_t a
646 649
647static void sdc_set_brightness(struct mx3fb_data *mx3fb, uint8_t value) 650static void sdc_set_brightness(struct mx3fb_data *mx3fb, uint8_t value)
648{ 651{
652 dev_dbg(mx3fb->dev, "%s: value = %d\n", __func__, value);
649 /* This might be board-specific */ 653 /* This might be board-specific */
650 mx3fb_write_reg(mx3fb, 0x03000000UL | value << 16, SDC_PWM_CTRL); 654 mx3fb_write_reg(mx3fb, 0x03000000UL | value << 16, SDC_PWM_CTRL);
651 return; 655 return;
@@ -1486,12 +1490,12 @@ static int mx3fb_probe(struct platform_device *pdev)
1486 goto ersdc0; 1490 goto ersdc0;
1487 } 1491 }
1488 1492
1493 mx3fb->backlight_level = 255;
1494
1489 ret = init_fb_chan(mx3fb, to_idmac_chan(chan)); 1495 ret = init_fb_chan(mx3fb, to_idmac_chan(chan));
1490 if (ret < 0) 1496 if (ret < 0)
1491 goto eisdc0; 1497 goto eisdc0;
1492 1498
1493 mx3fb->backlight_level = 255;
1494
1495 return 0; 1499 return 0;
1496 1500
1497eisdc0: 1501eisdc0:
diff --git a/drivers/video/omap/dispc.c b/drivers/video/omap/dispc.c
index c7c6455f1fa8..e192b058a688 100644
--- a/drivers/video/omap/dispc.c
+++ b/drivers/video/omap/dispc.c
@@ -189,11 +189,6 @@ static struct {
189 struct omapfb_color_key color_key; 189 struct omapfb_color_key color_key;
190} dispc; 190} dispc;
191 191
192static struct platform_device omapdss_device = {
193 .name = "omapdss",
194 .id = -1,
195};
196
197static void enable_lcd_clocks(int enable); 192static void enable_lcd_clocks(int enable);
198 193
199static void inline dispc_write_reg(int idx, u32 val) 194static void inline dispc_write_reg(int idx, u32 val)
@@ -920,20 +915,20 @@ static irqreturn_t omap_dispc_irq_handler(int irq, void *dev)
920 915
921static int get_dss_clocks(void) 916static int get_dss_clocks(void)
922{ 917{
923 dispc.dss_ick = clk_get(&omapdss_device.dev, "ick"); 918 dispc.dss_ick = clk_get(&dispc.fbdev->dssdev->dev, "ick");
924 if (IS_ERR(dispc.dss_ick)) { 919 if (IS_ERR(dispc.dss_ick)) {
925 dev_err(dispc.fbdev->dev, "can't get ick\n"); 920 dev_err(dispc.fbdev->dev, "can't get ick\n");
926 return PTR_ERR(dispc.dss_ick); 921 return PTR_ERR(dispc.dss_ick);
927 } 922 }
928 923
929 dispc.dss1_fck = clk_get(&omapdss_device.dev, "dss1_fck"); 924 dispc.dss1_fck = clk_get(&dispc.fbdev->dssdev->dev, "dss1_fck");
930 if (IS_ERR(dispc.dss1_fck)) { 925 if (IS_ERR(dispc.dss1_fck)) {
931 dev_err(dispc.fbdev->dev, "can't get dss1_fck\n"); 926 dev_err(dispc.fbdev->dev, "can't get dss1_fck\n");
932 clk_put(dispc.dss_ick); 927 clk_put(dispc.dss_ick);
933 return PTR_ERR(dispc.dss1_fck); 928 return PTR_ERR(dispc.dss1_fck);
934 } 929 }
935 930
936 dispc.dss_54m_fck = clk_get(&omapdss_device.dev, "tv_fck"); 931 dispc.dss_54m_fck = clk_get(&dispc.fbdev->dssdev->dev, "tv_fck");
937 if (IS_ERR(dispc.dss_54m_fck)) { 932 if (IS_ERR(dispc.dss_54m_fck)) {
938 dev_err(dispc.fbdev->dev, "can't get tv_fck\n"); 933 dev_err(dispc.fbdev->dev, "can't get tv_fck\n");
939 clk_put(dispc.dss_ick); 934 clk_put(dispc.dss_ick);
@@ -1385,12 +1380,6 @@ static int omap_dispc_init(struct omapfb_device *fbdev, int ext_mode,
1385 int skip_init = 0; 1380 int skip_init = 0;
1386 int i; 1381 int i;
1387 1382
1388 r = platform_device_register(&omapdss_device);
1389 if (r) {
1390 dev_err(fbdev->dev, "can't register omapdss device\n");
1391 return r;
1392 }
1393
1394 memset(&dispc, 0, sizeof(dispc)); 1383 memset(&dispc, 0, sizeof(dispc));
1395 1384
1396 dispc.base = ioremap(DISPC_BASE, SZ_1K); 1385 dispc.base = ioremap(DISPC_BASE, SZ_1K);
@@ -1534,7 +1523,6 @@ static void omap_dispc_cleanup(void)
1534 free_irq(INT_24XX_DSS_IRQ, dispc.fbdev); 1523 free_irq(INT_24XX_DSS_IRQ, dispc.fbdev);
1535 put_dss_clocks(); 1524 put_dss_clocks();
1536 iounmap(dispc.base); 1525 iounmap(dispc.base);
1537 platform_device_unregister(&omapdss_device);
1538} 1526}
1539 1527
1540const struct lcd_ctrl omap2_int_ctrl = { 1528const struct lcd_ctrl omap2_int_ctrl = {
diff --git a/drivers/video/omap/lcd_htcherald.c b/drivers/video/omap/lcd_htcherald.c
index a9007c5d1fad..4802419da83b 100644
--- a/drivers/video/omap/lcd_htcherald.c
+++ b/drivers/video/omap/lcd_htcherald.c
@@ -115,12 +115,12 @@ struct platform_driver htcherald_panel_driver = {
115 }, 115 },
116}; 116};
117 117
118static int htcherald_panel_drv_init(void) 118static int __init htcherald_panel_drv_init(void)
119{ 119{
120 return platform_driver_register(&htcherald_panel_driver); 120 return platform_driver_register(&htcherald_panel_driver);
121} 121}
122 122
123static void htcherald_panel_drv_cleanup(void) 123static void __exit htcherald_panel_drv_cleanup(void)
124{ 124{
125 platform_driver_unregister(&htcherald_panel_driver); 125 platform_driver_unregister(&htcherald_panel_driver);
126} 126}
diff --git a/drivers/video/omap/lcd_ldp.c b/drivers/video/omap/lcd_ldp.c
index 5bb7f6f14601..0f5952cae85e 100644
--- a/drivers/video/omap/lcd_ldp.c
+++ b/drivers/video/omap/lcd_ldp.c
@@ -24,7 +24,7 @@
24#include <linux/module.h> 24#include <linux/module.h>
25#include <linux/platform_device.h> 25#include <linux/platform_device.h>
26#include <linux/delay.h> 26#include <linux/delay.h>
27#include <linux/i2c/twl4030.h> 27#include <linux/i2c/twl.h>
28 28
29#include <mach/gpio.h> 29#include <mach/gpio.h>
30#include <plat/mux.h> 30#include <plat/mux.h>
@@ -59,7 +59,7 @@
59#define TWL4030_VPLL2_DEV_GRP 0x33 59#define TWL4030_VPLL2_DEV_GRP 0x33
60#define TWL4030_VPLL2_DEDICATED 0x36 60#define TWL4030_VPLL2_DEDICATED 0x36
61 61
62#define t2_out(c, r, v) twl4030_i2c_write_u8(c, r, v) 62#define t2_out(c, r, v) twl_i2c_write_u8(c, r, v)
63 63
64 64
65static int ldp_panel_init(struct lcd_panel *panel, 65static int ldp_panel_init(struct lcd_panel *panel,
diff --git a/drivers/video/omap/lcd_omap2evm.c b/drivers/video/omap/lcd_omap2evm.c
index 006c2fe7360e..7e7a65c08452 100644
--- a/drivers/video/omap/lcd_omap2evm.c
+++ b/drivers/video/omap/lcd_omap2evm.c
@@ -24,7 +24,7 @@
24#include <linux/module.h> 24#include <linux/module.h>
25#include <linux/platform_device.h> 25#include <linux/platform_device.h>
26#include <linux/gpio.h> 26#include <linux/gpio.h>
27#include <linux/i2c/twl4030.h> 27#include <linux/i2c/twl.h>
28 28
29#include <plat/mux.h> 29#include <plat/mux.h>
30#include <asm/mach-types.h> 30#include <asm/mach-types.h>
@@ -61,9 +61,9 @@ static int omap2evm_panel_init(struct lcd_panel *panel,
61 gpio_direction_output(LCD_PANEL_LR, 1); 61 gpio_direction_output(LCD_PANEL_LR, 1);
62 gpio_direction_output(LCD_PANEL_UD, 1); 62 gpio_direction_output(LCD_PANEL_UD, 1);
63 63
64 twl4030_i2c_write_u8(TWL4030_MODULE_LED, 0x11, TWL_LED_LEDEN); 64 twl_i2c_write_u8(TWL4030_MODULE_LED, 0x11, TWL_LED_LEDEN);
65 twl4030_i2c_write_u8(TWL4030_MODULE_PWMA, 0x01, TWL_PWMA_PWMAON); 65 twl_i2c_write_u8(TWL4030_MODULE_PWMA, 0x01, TWL_PWMA_PWMAON);
66 twl4030_i2c_write_u8(TWL4030_MODULE_PWMA, 0x02, TWL_PWMA_PWMAOFF); 66 twl_i2c_write_u8(TWL4030_MODULE_PWMA, 0x02, TWL_PWMA_PWMAOFF);
67 bklight_level = 100; 67 bklight_level = 100;
68 68
69 return 0; 69 return 0;
@@ -101,7 +101,7 @@ static int omap2evm_bklight_setlevel(struct lcd_panel *panel,
101 u8 c; 101 u8 c;
102 if ((level >= 0) && (level <= 100)) { 102 if ((level >= 0) && (level <= 100)) {
103 c = (125 * (100 - level)) / 100 + 2; 103 c = (125 * (100 - level)) / 100 + 2;
104 twl4030_i2c_write_u8(TWL4030_MODULE_PWMA, c, TWL_PWMA_PWMAOFF); 104 twl_i2c_write_u8(TWL4030_MODULE_PWMA, c, TWL_PWMA_PWMAOFF);
105 bklight_level = level; 105 bklight_level = level;
106 } 106 }
107 return 0; 107 return 0;
diff --git a/drivers/video/omap/lcd_omap3beagle.c b/drivers/video/omap/lcd_omap3beagle.c
index fc503d8f3c24..ca75cc2a87a5 100644
--- a/drivers/video/omap/lcd_omap3beagle.c
+++ b/drivers/video/omap/lcd_omap3beagle.c
@@ -23,7 +23,7 @@
23#include <linux/module.h> 23#include <linux/module.h>
24#include <linux/platform_device.h> 24#include <linux/platform_device.h>
25#include <linux/gpio.h> 25#include <linux/gpio.h>
26#include <linux/i2c/twl4030.h> 26#include <linux/i2c/twl.h>
27 27
28#include <plat/mux.h> 28#include <plat/mux.h>
29#include <plat/mux.h> 29#include <plat/mux.h>
diff --git a/drivers/video/omap/lcd_omap3evm.c b/drivers/video/omap/lcd_omap3evm.c
index ae2edc4081a8..06840da0b094 100644
--- a/drivers/video/omap/lcd_omap3evm.c
+++ b/drivers/video/omap/lcd_omap3evm.c
@@ -23,7 +23,7 @@
23#include <linux/module.h> 23#include <linux/module.h>
24#include <linux/platform_device.h> 24#include <linux/platform_device.h>
25#include <linux/gpio.h> 25#include <linux/gpio.h>
26#include <linux/i2c/twl4030.h> 26#include <linux/i2c/twl.h>
27 27
28#include <plat/mux.h> 28#include <plat/mux.h>
29#include <asm/mach-types.h> 29#include <asm/mach-types.h>
@@ -63,9 +63,9 @@ static int omap3evm_panel_init(struct lcd_panel *panel,
63 gpio_direction_output(LCD_PANEL_LR, 1); 63 gpio_direction_output(LCD_PANEL_LR, 1);
64 gpio_direction_output(LCD_PANEL_UD, 1); 64 gpio_direction_output(LCD_PANEL_UD, 1);
65 65
66 twl4030_i2c_write_u8(TWL4030_MODULE_LED, 0x11, TWL_LED_LEDEN); 66 twl_i2c_write_u8(TWL4030_MODULE_LED, 0x11, TWL_LED_LEDEN);
67 twl4030_i2c_write_u8(TWL4030_MODULE_PWMA, 0x01, TWL_PWMA_PWMAON); 67 twl_i2c_write_u8(TWL4030_MODULE_PWMA, 0x01, TWL_PWMA_PWMAON);
68 twl4030_i2c_write_u8(TWL4030_MODULE_PWMA, 0x02, TWL_PWMA_PWMAOFF); 68 twl_i2c_write_u8(TWL4030_MODULE_PWMA, 0x02, TWL_PWMA_PWMAOFF);
69 bklight_level = 100; 69 bklight_level = 100;
70 70
71 return 0; 71 return 0;
@@ -102,7 +102,7 @@ static int omap3evm_bklight_setlevel(struct lcd_panel *panel,
102 u8 c; 102 u8 c;
103 if ((level >= 0) && (level <= 100)) { 103 if ((level >= 0) && (level <= 100)) {
104 c = (125 * (100 - level)) / 100 + 2; 104 c = (125 * (100 - level)) / 100 + 2;
105 twl4030_i2c_write_u8(TWL4030_MODULE_PWMA, c, TWL_PWMA_PWMAOFF); 105 twl_i2c_write_u8(TWL4030_MODULE_PWMA, c, TWL_PWMA_PWMAOFF);
106 bklight_level = level; 106 bklight_level = level;
107 } 107 }
108 return 0; 108 return 0;
diff --git a/drivers/video/omap/lcd_overo.c b/drivers/video/omap/lcd_overo.c
index 56ee192e9ee2..564933ffac6e 100644
--- a/drivers/video/omap/lcd_overo.c
+++ b/drivers/video/omap/lcd_overo.c
@@ -21,7 +21,7 @@
21 21
22#include <linux/module.h> 22#include <linux/module.h>
23#include <linux/platform_device.h> 23#include <linux/platform_device.h>
24#include <linux/i2c/twl4030.h> 24#include <linux/i2c/twl.h>
25 25
26#include <mach/gpio.h> 26#include <mach/gpio.h>
27#include <plat/mux.h> 27#include <plat/mux.h>
diff --git a/drivers/video/omap/omapfb.h b/drivers/video/omap/omapfb.h
index 46e4714014e8..af3c9e571ec3 100644
--- a/drivers/video/omap/omapfb.h
+++ b/drivers/video/omap/omapfb.h
@@ -203,6 +203,8 @@ struct omapfb_device {
203 203
204 struct omapfb_mem_desc mem_desc; 204 struct omapfb_mem_desc mem_desc;
205 struct fb_info *fb_info[OMAPFB_PLANE_NUM]; 205 struct fb_info *fb_info[OMAPFB_PLANE_NUM];
206
207 struct platform_device *dssdev; /* dummy dev for clocks */
206}; 208};
207 209
208#ifdef CONFIG_ARCH_OMAP1 210#ifdef CONFIG_ARCH_OMAP1
diff --git a/drivers/video/omap/omapfb_main.c b/drivers/video/omap/omapfb_main.c
index c7f59a5ccdbc..2c4f470fa086 100644
--- a/drivers/video/omap/omapfb_main.c
+++ b/drivers/video/omap/omapfb_main.c
@@ -83,6 +83,19 @@ static struct caps_table_struct color_caps[] = {
83 { 1 << OMAPFB_COLOR_YUY422, "YUY422", }, 83 { 1 << OMAPFB_COLOR_YUY422, "YUY422", },
84}; 84};
85 85
86static void omapdss_release(struct device *dev)
87{
88}
89
90/* dummy device for clocks */
91static struct platform_device omapdss_device = {
92 .name = "omapdss",
93 .id = -1,
94 .dev = {
95 .release = omapdss_release,
96 },
97};
98
86/* 99/*
87 * --------------------------------------------------------------------------- 100 * ---------------------------------------------------------------------------
88 * LCD panel 101 * LCD panel
@@ -1700,6 +1713,7 @@ static int omapfb_do_probe(struct platform_device *pdev,
1700 1713
1701 fbdev->dev = &pdev->dev; 1714 fbdev->dev = &pdev->dev;
1702 fbdev->panel = panel; 1715 fbdev->panel = panel;
1716 fbdev->dssdev = &omapdss_device;
1703 platform_set_drvdata(pdev, fbdev); 1717 platform_set_drvdata(pdev, fbdev);
1704 1718
1705 mutex_init(&fbdev->rqueue_mutex); 1719 mutex_init(&fbdev->rqueue_mutex);
@@ -1814,8 +1828,16 @@ cleanup:
1814 1828
1815static int omapfb_probe(struct platform_device *pdev) 1829static int omapfb_probe(struct platform_device *pdev)
1816{ 1830{
1831 int r;
1832
1817 BUG_ON(fbdev_pdev != NULL); 1833 BUG_ON(fbdev_pdev != NULL);
1818 1834
1835 r = platform_device_register(&omapdss_device);
1836 if (r) {
1837 dev_err(&pdev->dev, "can't register omapdss device\n");
1838 return r;
1839 }
1840
1819 /* Delay actual initialization until the LCD is registered */ 1841 /* Delay actual initialization until the LCD is registered */
1820 fbdev_pdev = pdev; 1842 fbdev_pdev = pdev;
1821 if (fbdev_panel != NULL) 1843 if (fbdev_panel != NULL)
@@ -1843,6 +1865,9 @@ static int omapfb_remove(struct platform_device *pdev)
1843 fbdev->state = OMAPFB_DISABLED; 1865 fbdev->state = OMAPFB_DISABLED;
1844 omapfb_free_resources(fbdev, saved_state); 1866 omapfb_free_resources(fbdev, saved_state);
1845 1867
1868 platform_device_unregister(&omapdss_device);
1869 fbdev->dssdev = NULL;
1870
1846 return 0; 1871 return 0;
1847} 1872}
1848 1873
diff --git a/drivers/video/omap/rfbi.c b/drivers/video/omap/rfbi.c
index fed7b1bda19c..1162603c72e5 100644
--- a/drivers/video/omap/rfbi.c
+++ b/drivers/video/omap/rfbi.c
@@ -83,13 +83,13 @@ static inline u32 rfbi_read_reg(int idx)
83 83
84static int rfbi_get_clocks(void) 84static int rfbi_get_clocks(void)
85{ 85{
86 rfbi.dss_ick = clk_get(rfbi.fbdev->dev, "ick"); 86 rfbi.dss_ick = clk_get(&dispc.fbdev->dssdev->dev, "ick");
87 if (IS_ERR(rfbi.dss_ick)) { 87 if (IS_ERR(rfbi.dss_ick)) {
88 dev_err(rfbi.fbdev->dev, "can't get ick\n"); 88 dev_err(rfbi.fbdev->dev, "can't get ick\n");
89 return PTR_ERR(rfbi.dss_ick); 89 return PTR_ERR(rfbi.dss_ick);
90 } 90 }
91 91
92 rfbi.dss1_fck = clk_get(rfbi.fbdev->dev, "dss1_fck"); 92 rfbi.dss1_fck = clk_get(&dispc.fbdev->dssdev->dev, "dss1_fck");
93 if (IS_ERR(rfbi.dss1_fck)) { 93 if (IS_ERR(rfbi.dss1_fck)) {
94 dev_err(rfbi.fbdev->dev, "can't get dss1_fck\n"); 94 dev_err(rfbi.fbdev->dev, "can't get dss1_fck\n");
95 clk_put(rfbi.dss_ick); 95 clk_put(rfbi.dss_ick);
diff --git a/drivers/video/omap2/dss/Kconfig b/drivers/video/omap2/dss/Kconfig
index 71d8dec30635..c63ce767b277 100644
--- a/drivers/video/omap2/dss/Kconfig
+++ b/drivers/video/omap2/dss/Kconfig
@@ -25,6 +25,13 @@ config OMAP2_DSS_DEBUG_SUPPORT
25 This enables debug messages. You need to enable printing 25 This enables debug messages. You need to enable printing
26 with 'debug' module parameter. 26 with 'debug' module parameter.
27 27
28config OMAP2_DSS_COLLECT_IRQ_STATS
29 bool "Collect DSS IRQ statistics"
30 depends on OMAP2_DSS_DEBUG_SUPPORT
31 default n
32 help
33 Collect DSS IRQ statistics, printable via debugfs
34
28config OMAP2_DSS_RFBI 35config OMAP2_DSS_RFBI
29 bool "RFBI support" 36 bool "RFBI support"
30 default n 37 default n
diff --git a/drivers/video/omap2/dss/core.c b/drivers/video/omap2/dss/core.c
index 29497a0c9a91..82918eec6d2e 100644
--- a/drivers/video/omap2/dss/core.c
+++ b/drivers/video/omap2/dss/core.c
@@ -124,6 +124,7 @@ static void restore_all_ctx(void)
124 dss_clk_disable_all_no_ctx(); 124 dss_clk_disable_all_no_ctx();
125} 125}
126 126
127#if defined(CONFIG_DEBUG_FS) && defined(CONFIG_OMAP2_DSS_DEBUG_SUPPORT)
127/* CLOCKS */ 128/* CLOCKS */
128static void core_dump_clocks(struct seq_file *s) 129static void core_dump_clocks(struct seq_file *s)
129{ 130{
@@ -149,6 +150,7 @@ static void core_dump_clocks(struct seq_file *s)
149 clocks[i]->usecount); 150 clocks[i]->usecount);
150 } 151 }
151} 152}
153#endif /* defined(CONFIG_DEBUG_FS) && defined(CONFIG_OMAP2_DSS_DEBUG_SUPPORT) */
152 154
153static int dss_get_clock(struct clk **clock, const char *clk_name) 155static int dss_get_clock(struct clk **clock, const char *clk_name)
154{ 156{
@@ -395,6 +397,14 @@ static int dss_initialize_debugfs(void)
395 debugfs_create_file("clk", S_IRUGO, dss_debugfs_dir, 397 debugfs_create_file("clk", S_IRUGO, dss_debugfs_dir,
396 &dss_debug_dump_clocks, &dss_debug_fops); 398 &dss_debug_dump_clocks, &dss_debug_fops);
397 399
400 debugfs_create_file("dispc_irq", S_IRUGO, dss_debugfs_dir,
401 &dispc_dump_irqs, &dss_debug_fops);
402
403#ifdef CONFIG_OMAP2_DSS_DSI
404 debugfs_create_file("dsi_irq", S_IRUGO, dss_debugfs_dir,
405 &dsi_dump_irqs, &dss_debug_fops);
406#endif
407
398 debugfs_create_file("dss", S_IRUGO, dss_debugfs_dir, 408 debugfs_create_file("dss", S_IRUGO, dss_debugfs_dir,
399 &dss_dump_regs, &dss_debug_fops); 409 &dss_dump_regs, &dss_debug_fops);
400 debugfs_create_file("dispc", S_IRUGO, dss_debugfs_dir, 410 debugfs_create_file("dispc", S_IRUGO, dss_debugfs_dir,
diff --git a/drivers/video/omap2/dss/dispc.c b/drivers/video/omap2/dss/dispc.c
index 6dabf4b2f005..de8bfbac9e26 100644
--- a/drivers/video/omap2/dss/dispc.c
+++ b/drivers/video/omap2/dss/dispc.c
@@ -148,6 +148,12 @@ static const struct dispc_reg dispc_reg_att[] = { DISPC_GFX_ATTRIBUTES,
148 DISPC_VID_ATTRIBUTES(0), 148 DISPC_VID_ATTRIBUTES(0),
149 DISPC_VID_ATTRIBUTES(1) }; 149 DISPC_VID_ATTRIBUTES(1) };
150 150
151struct dispc_irq_stats {
152 unsigned long last_reset;
153 unsigned irq_count;
154 unsigned irqs[32];
155};
156
151static struct { 157static struct {
152 void __iomem *base; 158 void __iomem *base;
153 159
@@ -160,6 +166,11 @@ static struct {
160 struct work_struct error_work; 166 struct work_struct error_work;
161 167
162 u32 ctx[DISPC_SZ_REGS / sizeof(u32)]; 168 u32 ctx[DISPC_SZ_REGS / sizeof(u32)];
169
170#ifdef CONFIG_OMAP2_DSS_COLLECT_IRQ_STATS
171 spinlock_t irq_stats_lock;
172 struct dispc_irq_stats irq_stats;
173#endif
163} dispc; 174} dispc;
164 175
165static void _omap_dispc_set_irqs(void); 176static void _omap_dispc_set_irqs(void);
@@ -1443,7 +1454,10 @@ static unsigned long calc_fclk_five_taps(u16 width, u16 height,
1443 do_div(tmp, 2 * out_height * ppl); 1454 do_div(tmp, 2 * out_height * ppl);
1444 fclk = tmp; 1455 fclk = tmp;
1445 1456
1446 if (height > 2 * out_height && ppl != out_width) { 1457 if (height > 2 * out_height) {
1458 if (ppl == out_width)
1459 return 0;
1460
1447 tmp = pclk * (height - 2 * out_height) * out_width; 1461 tmp = pclk * (height - 2 * out_height) * out_width;
1448 do_div(tmp, 2 * out_height * (ppl - out_width)); 1462 do_div(tmp, 2 * out_height * (ppl - out_width));
1449 fclk = max(fclk, (u32) tmp); 1463 fclk = max(fclk, (u32) tmp);
@@ -1623,7 +1637,7 @@ static int _dispc_setup_plane(enum omap_plane plane,
1623 DSSDBG("required fclk rate = %lu Hz\n", fclk); 1637 DSSDBG("required fclk rate = %lu Hz\n", fclk);
1624 DSSDBG("current fclk rate = %lu Hz\n", dispc_fclk_rate()); 1638 DSSDBG("current fclk rate = %lu Hz\n", dispc_fclk_rate());
1625 1639
1626 if (fclk > dispc_fclk_rate()) { 1640 if (!fclk || fclk > dispc_fclk_rate()) {
1627 DSSERR("failed to set up scaling, " 1641 DSSERR("failed to set up scaling, "
1628 "required fclk rate = %lu Hz, " 1642 "required fclk rate = %lu Hz, "
1629 "current fclk rate = %lu Hz\n", 1643 "current fclk rate = %lu Hz\n",
@@ -2247,6 +2261,50 @@ void dispc_dump_clocks(struct seq_file *s)
2247 enable_clocks(0); 2261 enable_clocks(0);
2248} 2262}
2249 2263
2264#ifdef CONFIG_OMAP2_DSS_COLLECT_IRQ_STATS
2265void dispc_dump_irqs(struct seq_file *s)
2266{
2267 unsigned long flags;
2268 struct dispc_irq_stats stats;
2269
2270 spin_lock_irqsave(&dispc.irq_stats_lock, flags);
2271
2272 stats = dispc.irq_stats;
2273 memset(&dispc.irq_stats, 0, sizeof(dispc.irq_stats));
2274 dispc.irq_stats.last_reset = jiffies;
2275
2276 spin_unlock_irqrestore(&dispc.irq_stats_lock, flags);
2277
2278 seq_printf(s, "period %u ms\n",
2279 jiffies_to_msecs(jiffies - stats.last_reset));
2280
2281 seq_printf(s, "irqs %d\n", stats.irq_count);
2282#define PIS(x) \
2283 seq_printf(s, "%-20s %10d\n", #x, stats.irqs[ffs(DISPC_IRQ_##x)-1]);
2284
2285 PIS(FRAMEDONE);
2286 PIS(VSYNC);
2287 PIS(EVSYNC_EVEN);
2288 PIS(EVSYNC_ODD);
2289 PIS(ACBIAS_COUNT_STAT);
2290 PIS(PROG_LINE_NUM);
2291 PIS(GFX_FIFO_UNDERFLOW);
2292 PIS(GFX_END_WIN);
2293 PIS(PAL_GAMMA_MASK);
2294 PIS(OCP_ERR);
2295 PIS(VID1_FIFO_UNDERFLOW);
2296 PIS(VID1_END_WIN);
2297 PIS(VID2_FIFO_UNDERFLOW);
2298 PIS(VID2_END_WIN);
2299 PIS(SYNC_LOST);
2300 PIS(SYNC_LOST_DIGIT);
2301 PIS(WAKEUP);
2302#undef PIS
2303}
2304#else
2305void dispc_dump_irqs(struct seq_file *s) { }
2306#endif
2307
2250void dispc_dump_regs(struct seq_file *s) 2308void dispc_dump_regs(struct seq_file *s)
2251{ 2309{
2252#define DUMPREG(r) seq_printf(s, "%-35s %08x\n", #r, dispc_read_reg(r)) 2310#define DUMPREG(r) seq_printf(s, "%-35s %08x\n", #r, dispc_read_reg(r))
@@ -2665,6 +2723,13 @@ void dispc_irq_handler(void)
2665 2723
2666 irqstatus = dispc_read_reg(DISPC_IRQSTATUS); 2724 irqstatus = dispc_read_reg(DISPC_IRQSTATUS);
2667 2725
2726#ifdef CONFIG_OMAP2_DSS_COLLECT_IRQ_STATS
2727 spin_lock(&dispc.irq_stats_lock);
2728 dispc.irq_stats.irq_count++;
2729 dss_collect_irq_stats(irqstatus, dispc.irq_stats.irqs);
2730 spin_unlock(&dispc.irq_stats_lock);
2731#endif
2732
2668#ifdef DEBUG 2733#ifdef DEBUG
2669 if (dss_debug) 2734 if (dss_debug)
2670 print_irq_status(irqstatus); 2735 print_irq_status(irqstatus);
@@ -3012,6 +3077,11 @@ int dispc_init(void)
3012 3077
3013 spin_lock_init(&dispc.irq_lock); 3078 spin_lock_init(&dispc.irq_lock);
3014 3079
3080#ifdef CONFIG_OMAP2_DSS_COLLECT_IRQ_STATS
3081 spin_lock_init(&dispc.irq_stats_lock);
3082 dispc.irq_stats.last_reset = jiffies;
3083#endif
3084
3015 INIT_WORK(&dispc.error_work, dispc_error_worker); 3085 INIT_WORK(&dispc.error_work, dispc_error_worker);
3016 3086
3017 dispc.base = ioremap(DISPC_BASE, DISPC_SZ_REGS); 3087 dispc.base = ioremap(DISPC_BASE, DISPC_SZ_REGS);
diff --git a/drivers/video/omap2/dss/dsi.c b/drivers/video/omap2/dss/dsi.c
index 5936487b5def..6122178f5f85 100644
--- a/drivers/video/omap2/dss/dsi.c
+++ b/drivers/video/omap2/dss/dsi.c
@@ -204,6 +204,14 @@ struct dsi_update_region {
204 struct omap_dss_device *device; 204 struct omap_dss_device *device;
205}; 205};
206 206
207struct dsi_irq_stats {
208 unsigned long last_reset;
209 unsigned irq_count;
210 unsigned dsi_irqs[32];
211 unsigned vc_irqs[4][32];
212 unsigned cio_irqs[32];
213};
214
207static struct 215static struct
208{ 216{
209 void __iomem *base; 217 void __iomem *base;
@@ -258,6 +266,11 @@ static struct
258#endif 266#endif
259 int debug_read; 267 int debug_read;
260 int debug_write; 268 int debug_write;
269
270#ifdef CONFIG_OMAP2_DSS_COLLECT_IRQ_STATS
271 spinlock_t irq_stats_lock;
272 struct dsi_irq_stats irq_stats;
273#endif
261} dsi; 274} dsi;
262 275
263#ifdef DEBUG 276#ifdef DEBUG
@@ -528,6 +541,12 @@ void dsi_irq_handler(void)
528 541
529 irqstatus = dsi_read_reg(DSI_IRQSTATUS); 542 irqstatus = dsi_read_reg(DSI_IRQSTATUS);
530 543
544#ifdef CONFIG_OMAP2_DSS_COLLECT_IRQ_STATS
545 spin_lock(&dsi.irq_stats_lock);
546 dsi.irq_stats.irq_count++;
547 dss_collect_irq_stats(irqstatus, dsi.irq_stats.dsi_irqs);
548#endif
549
531 if (irqstatus & DSI_IRQ_ERROR_MASK) { 550 if (irqstatus & DSI_IRQ_ERROR_MASK) {
532 DSSERR("DSI error, irqstatus %x\n", irqstatus); 551 DSSERR("DSI error, irqstatus %x\n", irqstatus);
533 print_irq_status(irqstatus); 552 print_irq_status(irqstatus);
@@ -549,6 +568,10 @@ void dsi_irq_handler(void)
549 568
550 vcstatus = dsi_read_reg(DSI_VC_IRQSTATUS(i)); 569 vcstatus = dsi_read_reg(DSI_VC_IRQSTATUS(i));
551 570
571#ifdef CONFIG_OMAP2_DSS_COLLECT_IRQ_STATS
572 dss_collect_irq_stats(vcstatus, dsi.irq_stats.vc_irqs[i]);
573#endif
574
552 if (vcstatus & DSI_VC_IRQ_BTA) 575 if (vcstatus & DSI_VC_IRQ_BTA)
553 complete(&dsi.bta_completion); 576 complete(&dsi.bta_completion);
554 577
@@ -568,6 +591,10 @@ void dsi_irq_handler(void)
568 if (irqstatus & DSI_IRQ_COMPLEXIO_ERR) { 591 if (irqstatus & DSI_IRQ_COMPLEXIO_ERR) {
569 ciostatus = dsi_read_reg(DSI_COMPLEXIO_IRQ_STATUS); 592 ciostatus = dsi_read_reg(DSI_COMPLEXIO_IRQ_STATUS);
570 593
594#ifdef CONFIG_OMAP2_DSS_COLLECT_IRQ_STATS
595 dss_collect_irq_stats(ciostatus, dsi.irq_stats.cio_irqs);
596#endif
597
571 dsi_write_reg(DSI_COMPLEXIO_IRQ_STATUS, ciostatus); 598 dsi_write_reg(DSI_COMPLEXIO_IRQ_STATUS, ciostatus);
572 /* flush posted write */ 599 /* flush posted write */
573 dsi_read_reg(DSI_COMPLEXIO_IRQ_STATUS); 600 dsi_read_reg(DSI_COMPLEXIO_IRQ_STATUS);
@@ -579,6 +606,10 @@ void dsi_irq_handler(void)
579 dsi_write_reg(DSI_IRQSTATUS, irqstatus & ~DSI_IRQ_CHANNEL_MASK); 606 dsi_write_reg(DSI_IRQSTATUS, irqstatus & ~DSI_IRQ_CHANNEL_MASK);
580 /* flush posted write */ 607 /* flush posted write */
581 dsi_read_reg(DSI_IRQSTATUS); 608 dsi_read_reg(DSI_IRQSTATUS);
609
610#ifdef CONFIG_OMAP2_DSS_COLLECT_IRQ_STATS
611 spin_unlock(&dsi.irq_stats_lock);
612#endif
582} 613}
583 614
584 615
@@ -797,12 +828,12 @@ static int dsi_pll_power(enum dsi_pll_power_state state)
797 828
798 /* PLL_PWR_STATUS */ 829 /* PLL_PWR_STATUS */
799 while (FLD_GET(dsi_read_reg(DSI_CLK_CTRL), 29, 28) != state) { 830 while (FLD_GET(dsi_read_reg(DSI_CLK_CTRL), 29, 28) != state) {
800 udelay(1); 831 if (++t > 1000) {
801 if (t++ > 1000) {
802 DSSERR("Failed to set DSI PLL power mode to %d\n", 832 DSSERR("Failed to set DSI PLL power mode to %d\n",
803 state); 833 state);
804 return -ENODEV; 834 return -ENODEV;
805 } 835 }
836 udelay(1);
806 } 837 }
807 838
808 return 0; 839 return 0;
@@ -1226,6 +1257,95 @@ void dsi_dump_clocks(struct seq_file *s)
1226 enable_clocks(0); 1257 enable_clocks(0);
1227} 1258}
1228 1259
1260#ifdef CONFIG_OMAP2_DSS_COLLECT_IRQ_STATS
1261void dsi_dump_irqs(struct seq_file *s)
1262{
1263 unsigned long flags;
1264 struct dsi_irq_stats stats;
1265
1266 spin_lock_irqsave(&dsi.irq_stats_lock, flags);
1267
1268 stats = dsi.irq_stats;
1269 memset(&dsi.irq_stats, 0, sizeof(dsi.irq_stats));
1270 dsi.irq_stats.last_reset = jiffies;
1271
1272 spin_unlock_irqrestore(&dsi.irq_stats_lock, flags);
1273
1274 seq_printf(s, "period %u ms\n",
1275 jiffies_to_msecs(jiffies - stats.last_reset));
1276
1277 seq_printf(s, "irqs %d\n", stats.irq_count);
1278#define PIS(x) \
1279 seq_printf(s, "%-20s %10d\n", #x, stats.dsi_irqs[ffs(DSI_IRQ_##x)-1]);
1280
1281 seq_printf(s, "-- DSI interrupts --\n");
1282 PIS(VC0);
1283 PIS(VC1);
1284 PIS(VC2);
1285 PIS(VC3);
1286 PIS(WAKEUP);
1287 PIS(RESYNC);
1288 PIS(PLL_LOCK);
1289 PIS(PLL_UNLOCK);
1290 PIS(PLL_RECALL);
1291 PIS(COMPLEXIO_ERR);
1292 PIS(HS_TX_TIMEOUT);
1293 PIS(LP_RX_TIMEOUT);
1294 PIS(TE_TRIGGER);
1295 PIS(ACK_TRIGGER);
1296 PIS(SYNC_LOST);
1297 PIS(LDO_POWER_GOOD);
1298 PIS(TA_TIMEOUT);
1299#undef PIS
1300
1301#define PIS(x) \
1302 seq_printf(s, "%-20s %10d %10d %10d %10d\n", #x, \
1303 stats.vc_irqs[0][ffs(DSI_VC_IRQ_##x)-1], \
1304 stats.vc_irqs[1][ffs(DSI_VC_IRQ_##x)-1], \
1305 stats.vc_irqs[2][ffs(DSI_VC_IRQ_##x)-1], \
1306 stats.vc_irqs[3][ffs(DSI_VC_IRQ_##x)-1]);
1307
1308 seq_printf(s, "-- VC interrupts --\n");
1309 PIS(CS);
1310 PIS(ECC_CORR);
1311 PIS(PACKET_SENT);
1312 PIS(FIFO_TX_OVF);
1313 PIS(FIFO_RX_OVF);
1314 PIS(BTA);
1315 PIS(ECC_NO_CORR);
1316 PIS(FIFO_TX_UDF);
1317 PIS(PP_BUSY_CHANGE);
1318#undef PIS
1319
1320#define PIS(x) \
1321 seq_printf(s, "%-20s %10d\n", #x, \
1322 stats.cio_irqs[ffs(DSI_CIO_IRQ_##x)-1]);
1323
1324 seq_printf(s, "-- CIO interrupts --\n");
1325 PIS(ERRSYNCESC1);
1326 PIS(ERRSYNCESC2);
1327 PIS(ERRSYNCESC3);
1328 PIS(ERRESC1);
1329 PIS(ERRESC2);
1330 PIS(ERRESC3);
1331 PIS(ERRCONTROL1);
1332 PIS(ERRCONTROL2);
1333 PIS(ERRCONTROL3);
1334 PIS(STATEULPS1);
1335 PIS(STATEULPS2);
1336 PIS(STATEULPS3);
1337 PIS(ERRCONTENTIONLP0_1);
1338 PIS(ERRCONTENTIONLP1_1);
1339 PIS(ERRCONTENTIONLP0_2);
1340 PIS(ERRCONTENTIONLP1_2);
1341 PIS(ERRCONTENTIONLP0_3);
1342 PIS(ERRCONTENTIONLP1_3);
1343 PIS(ULPSACTIVENOT_ALL0);
1344 PIS(ULPSACTIVENOT_ALL1);
1345#undef PIS
1346}
1347#endif
1348
1229void dsi_dump_regs(struct seq_file *s) 1349void dsi_dump_regs(struct seq_file *s)
1230{ 1350{
1231#define DUMPREG(r) seq_printf(s, "%-35s %08x\n", #r, dsi_read_reg(r)) 1351#define DUMPREG(r) seq_printf(s, "%-35s %08x\n", #r, dsi_read_reg(r))
@@ -1321,12 +1441,12 @@ static int dsi_complexio_power(enum dsi_complexio_power_state state)
1321 1441
1322 /* PWR_STATUS */ 1442 /* PWR_STATUS */
1323 while (FLD_GET(dsi_read_reg(DSI_COMPLEXIO_CFG1), 26, 25) != state) { 1443 while (FLD_GET(dsi_read_reg(DSI_COMPLEXIO_CFG1), 26, 25) != state) {
1324 udelay(1); 1444 if (++t > 1000) {
1325 if (t++ > 1000) {
1326 DSSERR("failed to set complexio power state to " 1445 DSSERR("failed to set complexio power state to "
1327 "%d\n", state); 1446 "%d\n", state);
1328 return -ENODEV; 1447 return -ENODEV;
1329 } 1448 }
1449 udelay(1);
1330 } 1450 }
1331 1451
1332 return 0; 1452 return 0;
@@ -1526,10 +1646,10 @@ static void dsi_complexio_uninit(void)
1526 1646
1527static int _dsi_wait_reset(void) 1647static int _dsi_wait_reset(void)
1528{ 1648{
1529 int i = 0; 1649 int t = 0;
1530 1650
1531 while (REG_GET(DSI_SYSSTATUS, 0, 0) == 0) { 1651 while (REG_GET(DSI_SYSSTATUS, 0, 0) == 0) {
1532 if (i++ > 5) { 1652 if (++t > 5) {
1533 DSSERR("soft reset failed\n"); 1653 DSSERR("soft reset failed\n");
1534 return -ENODEV; 1654 return -ENODEV;
1535 } 1655 }
@@ -1999,7 +2119,7 @@ static int dsi_vc_send_short(int channel, u8 data_type, u16 data, u8 ecc)
1999 return -EINVAL; 2119 return -EINVAL;
2000 } 2120 }
2001 2121
2002 data_id = data_type | channel << 6; 2122 data_id = data_type | dsi.vc[channel].dest_per << 6;
2003 2123
2004 r = (data_id << 0) | (data << 8) | (ecc << 24); 2124 r = (data_id << 0) | (data << 8) | (ecc << 24);
2005 2125
@@ -2011,7 +2131,7 @@ static int dsi_vc_send_short(int channel, u8 data_type, u16 data, u8 ecc)
2011int dsi_vc_send_null(int channel) 2131int dsi_vc_send_null(int channel)
2012{ 2132{
2013 u8 nullpkg[] = {0, 0, 0, 0}; 2133 u8 nullpkg[] = {0, 0, 0, 0};
2014 return dsi_vc_send_long(0, DSI_DT_NULL_PACKET, nullpkg, 4, 0); 2134 return dsi_vc_send_long(channel, DSI_DT_NULL_PACKET, nullpkg, 4, 0);
2015} 2135}
2016EXPORT_SYMBOL(dsi_vc_send_null); 2136EXPORT_SYMBOL(dsi_vc_send_null);
2017 2137
@@ -2058,7 +2178,7 @@ int dsi_vc_dcs_read(int channel, u8 dcs_cmd, u8 *buf, int buflen)
2058 int r; 2178 int r;
2059 2179
2060 if (dsi.debug_read) 2180 if (dsi.debug_read)
2061 DSSDBG("dsi_vc_dcs_read(ch%d, dcs_cmd %u)\n", channel, dcs_cmd); 2181 DSSDBG("dsi_vc_dcs_read(ch%d, dcs_cmd %x)\n", channel, dcs_cmd);
2062 2182
2063 r = dsi_vc_send_short(channel, DSI_DT_DCS_READ, dcs_cmd, 0); 2183 r = dsi_vc_send_short(channel, DSI_DT_DCS_READ, dcs_cmd, 0);
2064 if (r) 2184 if (r)
@@ -2586,7 +2706,6 @@ static int dsi_update_screen_l4(struct omap_dss_device *dssdev,
2586 /* using fifo not empty */ 2706 /* using fifo not empty */
2587 /* TX_FIFO_NOT_EMPTY */ 2707 /* TX_FIFO_NOT_EMPTY */
2588 while (FLD_GET(dsi_read_reg(DSI_VC_CTRL(0)), 5, 5)) { 2708 while (FLD_GET(dsi_read_reg(DSI_VC_CTRL(0)), 5, 5)) {
2589 udelay(1);
2590 fifo_stalls++; 2709 fifo_stalls++;
2591 if (fifo_stalls > 0xfffff) { 2710 if (fifo_stalls > 0xfffff) {
2592 DSSERR("fifo stalls overflow, pixels left %d\n", 2711 DSSERR("fifo stalls overflow, pixels left %d\n",
@@ -2594,6 +2713,7 @@ static int dsi_update_screen_l4(struct omap_dss_device *dssdev,
2594 dsi_if_enable(0); 2713 dsi_if_enable(0);
2595 return -EIO; 2714 return -EIO;
2596 } 2715 }
2716 udelay(1);
2597 } 2717 }
2598#elif 1 2718#elif 1
2599 /* using fifo emptiness */ 2719 /* using fifo emptiness */
@@ -2812,11 +2932,15 @@ static int dsi_set_update_mode(struct omap_dss_device *dssdev,
2812 2932
2813static int dsi_set_te(struct omap_dss_device *dssdev, bool enable) 2933static int dsi_set_te(struct omap_dss_device *dssdev, bool enable)
2814{ 2934{
2815 int r; 2935 int r = 0;
2816 r = dssdev->driver->enable_te(dssdev, enable); 2936
2817 /* XXX for some reason, DSI TE breaks if we don't wait here. 2937 if (dssdev->driver->enable_te) {
2818 * Panel bug? Needs more studying */ 2938 r = dssdev->driver->enable_te(dssdev, enable);
2819 msleep(100); 2939 /* XXX for some reason, DSI TE breaks if we don't wait here.
2940 * Panel bug? Needs more studying */
2941 msleep(100);
2942 }
2943
2820 return r; 2944 return r;
2821} 2945}
2822 2946
@@ -3637,6 +3761,11 @@ int dsi_init(struct platform_device *pdev)
3637 spin_lock_init(&dsi.errors_lock); 3761 spin_lock_init(&dsi.errors_lock);
3638 dsi.errors = 0; 3762 dsi.errors = 0;
3639 3763
3764#ifdef CONFIG_OMAP2_DSS_COLLECT_IRQ_STATS
3765 spin_lock_init(&dsi.irq_stats_lock);
3766 dsi.irq_stats.last_reset = jiffies;
3767#endif
3768
3640 init_completion(&dsi.bta_completion); 3769 init_completion(&dsi.bta_completion);
3641 init_completion(&dsi.update_completion); 3770 init_completion(&dsi.update_completion);
3642 3771
diff --git a/drivers/video/omap2/dss/dss.c b/drivers/video/omap2/dss/dss.c
index 9b05ee65a15d..0a26b7d84d41 100644
--- a/drivers/video/omap2/dss/dss.c
+++ b/drivers/video/omap2/dss/dss.c
@@ -467,14 +467,14 @@ static irqreturn_t dss_irq_handler_omap3(int irq, void *arg)
467 467
468static int _omap_dss_wait_reset(void) 468static int _omap_dss_wait_reset(void)
469{ 469{
470 unsigned timeout = 1000; 470 int t = 0;
471 471
472 while (REG_GET(DSS_SYSSTATUS, 0, 0) == 0) { 472 while (REG_GET(DSS_SYSSTATUS, 0, 0) == 0) {
473 udelay(1); 473 if (++t > 1000) {
474 if (!--timeout) {
475 DSSERR("soft reset failed\n"); 474 DSSERR("soft reset failed\n");
476 return -ENODEV; 475 return -ENODEV;
477 } 476 }
477 udelay(1);
478 } 478 }
479 479
480 return 0; 480 return 0;
diff --git a/drivers/video/omap2/dss/dss.h b/drivers/video/omap2/dss/dss.h
index 8da5ac42151b..2bcb1245d6c2 100644
--- a/drivers/video/omap2/dss/dss.h
+++ b/drivers/video/omap2/dss/dss.h
@@ -240,6 +240,7 @@ int dsi_init(struct platform_device *pdev);
240void dsi_exit(void); 240void dsi_exit(void);
241 241
242void dsi_dump_clocks(struct seq_file *s); 242void dsi_dump_clocks(struct seq_file *s);
243void dsi_dump_irqs(struct seq_file *s);
243void dsi_dump_regs(struct seq_file *s); 244void dsi_dump_regs(struct seq_file *s);
244 245
245void dsi_save_context(void); 246void dsi_save_context(void);
@@ -268,6 +269,7 @@ int dpi_init_display(struct omap_dss_device *dssdev);
268int dispc_init(void); 269int dispc_init(void);
269void dispc_exit(void); 270void dispc_exit(void);
270void dispc_dump_clocks(struct seq_file *s); 271void dispc_dump_clocks(struct seq_file *s);
272void dispc_dump_irqs(struct seq_file *s);
271void dispc_dump_regs(struct seq_file *s); 273void dispc_dump_regs(struct seq_file *s);
272void dispc_irq_handler(void); 274void dispc_irq_handler(void);
273void dispc_fake_vsync_irq(void); 275void dispc_fake_vsync_irq(void);
@@ -367,4 +369,16 @@ void rfbi_set_timings(int rfbi_module, struct rfbi_timings *t);
367unsigned long rfbi_get_max_tx_rate(void); 369unsigned long rfbi_get_max_tx_rate(void);
368int rfbi_init_display(struct omap_dss_device *display); 370int rfbi_init_display(struct omap_dss_device *display);
369 371
372
373#ifdef CONFIG_OMAP2_DSS_COLLECT_IRQ_STATS
374static inline void dss_collect_irq_stats(u32 irqstatus, unsigned *irq_arr)
375{
376 int b;
377 for (b = 0; b < 32; ++b) {
378 if (irqstatus & (1 << b))
379 irq_arr[b]++;
380 }
381}
382#endif
383
370#endif 384#endif
diff --git a/drivers/video/omap2/dss/rfbi.c b/drivers/video/omap2/dss/rfbi.c
index d0b3006ad8a5..b936495c065d 100644
--- a/drivers/video/omap2/dss/rfbi.c
+++ b/drivers/video/omap2/dss/rfbi.c
@@ -120,7 +120,7 @@ static struct {
120 120
121 struct omap_dss_device *dssdev[2]; 121 struct omap_dss_device *dssdev[2];
122 122
123 struct kfifo *cmd_fifo; 123 struct kfifo cmd_fifo;
124 spinlock_t cmd_lock; 124 spinlock_t cmd_lock;
125 struct completion cmd_done; 125 struct completion cmd_done;
126 atomic_t cmd_fifo_full; 126 atomic_t cmd_fifo_full;
@@ -1011,20 +1011,20 @@ static void process_cmd_fifo(void)
1011 return; 1011 return;
1012 1012
1013 while (true) { 1013 while (true) {
1014 spin_lock_irqsave(rfbi.cmd_fifo->lock, flags); 1014 spin_lock_irqsave(&rfbi.cmd_lock, flags);
1015 1015
1016 len = __kfifo_get(rfbi.cmd_fifo, (unsigned char *)&p, 1016 len = kfifo_out(&rfbi.cmd_fifo, (unsigned char *)&p,
1017 sizeof(struct update_param)); 1017 sizeof(struct update_param));
1018 if (len == 0) { 1018 if (len == 0) {
1019 DSSDBG("nothing more in fifo\n"); 1019 DSSDBG("nothing more in fifo\n");
1020 atomic_set(&rfbi.cmd_pending, 0); 1020 atomic_set(&rfbi.cmd_pending, 0);
1021 spin_unlock_irqrestore(rfbi.cmd_fifo->lock, flags); 1021 spin_unlock_irqrestore(&rfbi.cmd_lock, flags);
1022 break; 1022 break;
1023 } 1023 }
1024 1024
1025 /* DSSDBG("fifo full %d\n", rfbi.cmd_fifo_full.counter);*/ 1025 /* DSSDBG("fifo full %d\n", rfbi.cmd_fifo_full.counter);*/
1026 1026
1027 spin_unlock_irqrestore(rfbi.cmd_fifo->lock, flags); 1027 spin_unlock_irqrestore(&rfbi.cmd_lock, flags);
1028 1028
1029 BUG_ON(len != sizeof(struct update_param)); 1029 BUG_ON(len != sizeof(struct update_param));
1030 BUG_ON(p.rfbi_module > 1); 1030 BUG_ON(p.rfbi_module > 1);
@@ -1052,25 +1052,25 @@ static void rfbi_push_cmd(struct update_param *p)
1052 unsigned long flags; 1052 unsigned long flags;
1053 int available; 1053 int available;
1054 1054
1055 spin_lock_irqsave(rfbi.cmd_fifo->lock, flags); 1055 spin_lock_irqsave(&rfbi.cmd_lock, flags);
1056 available = RFBI_CMD_FIFO_LEN_BYTES - 1056 available = RFBI_CMD_FIFO_LEN_BYTES -
1057 __kfifo_len(rfbi.cmd_fifo); 1057 kfifo_len(&rfbi.cmd_fifo);
1058 1058
1059/* DSSDBG("%d bytes left in fifo\n", available); */ 1059/* DSSDBG("%d bytes left in fifo\n", available); */
1060 if (available < sizeof(struct update_param)) { 1060 if (available < sizeof(struct update_param)) {
1061 DSSDBG("Going to wait because FIFO FULL..\n"); 1061 DSSDBG("Going to wait because FIFO FULL..\n");
1062 spin_unlock_irqrestore(rfbi.cmd_fifo->lock, flags); 1062 spin_unlock_irqrestore(&rfbi.cmd_lock, flags);
1063 atomic_inc(&rfbi.cmd_fifo_full); 1063 atomic_inc(&rfbi.cmd_fifo_full);
1064 wait_for_completion(&rfbi.cmd_done); 1064 wait_for_completion(&rfbi.cmd_done);
1065 /*DSSDBG("Woke up because fifo not full anymore\n");*/ 1065 /*DSSDBG("Woke up because fifo not full anymore\n");*/
1066 continue; 1066 continue;
1067 } 1067 }
1068 1068
1069 ret = __kfifo_put(rfbi.cmd_fifo, (unsigned char *)p, 1069 ret = kfifo_in(&rfbi.cmd_fifo, (unsigned char *)p,
1070 sizeof(struct update_param)); 1070 sizeof(struct update_param));
1071/* DSSDBG("pushed %d bytes\n", ret);*/ 1071/* DSSDBG("pushed %d bytes\n", ret);*/
1072 1072
1073 spin_unlock_irqrestore(rfbi.cmd_fifo->lock, flags); 1073 spin_unlock_irqrestore(&rfbi.cmd_lock, flags);
1074 1074
1075 BUG_ON(ret != sizeof(struct update_param)); 1075 BUG_ON(ret != sizeof(struct update_param));
1076 1076
@@ -1155,12 +1155,12 @@ int rfbi_init(void)
1155{ 1155{
1156 u32 rev; 1156 u32 rev;
1157 u32 l; 1157 u32 l;
1158 int r;
1158 1159
1159 spin_lock_init(&rfbi.cmd_lock); 1160 spin_lock_init(&rfbi.cmd_lock);
1160 rfbi.cmd_fifo = kfifo_alloc(RFBI_CMD_FIFO_LEN_BYTES, GFP_KERNEL, 1161 r = kfifo_alloc(&rfbi.cmd_fifo, RFBI_CMD_FIFO_LEN_BYTES, GFP_KERNEL);
1161 &rfbi.cmd_lock); 1162 if (r)
1162 if (IS_ERR(rfbi.cmd_fifo)) 1163 return r;
1163 return -ENOMEM;
1164 1164
1165 init_completion(&rfbi.cmd_done); 1165 init_completion(&rfbi.cmd_done);
1166 atomic_set(&rfbi.cmd_fifo_full, 0); 1166 atomic_set(&rfbi.cmd_fifo_full, 0);
@@ -1196,7 +1196,7 @@ void rfbi_exit(void)
1196{ 1196{
1197 DSSDBG("rfbi_exit\n"); 1197 DSSDBG("rfbi_exit\n");
1198 1198
1199 kfifo_free(rfbi.cmd_fifo); 1199 kfifo_free(&rfbi.cmd_fifo);
1200 1200
1201 iounmap(rfbi.base); 1201 iounmap(rfbi.base);
1202} 1202}
diff --git a/drivers/video/omap2/omapfb/omapfb-main.c b/drivers/video/omap2/omapfb/omapfb-main.c
index ef299839858a..d17caef6915a 100644
--- a/drivers/video/omap2/omapfb/omapfb-main.c
+++ b/drivers/video/omap2/omapfb/omapfb-main.c
@@ -1311,6 +1311,7 @@ static void omapfb_free_fbmem(struct fb_info *fbi)
1311 if (rg->vrfb.vaddr[0]) { 1311 if (rg->vrfb.vaddr[0]) {
1312 iounmap(rg->vrfb.vaddr[0]); 1312 iounmap(rg->vrfb.vaddr[0]);
1313 omap_vrfb_release_ctx(&rg->vrfb); 1313 omap_vrfb_release_ctx(&rg->vrfb);
1314 rg->vrfb.vaddr[0] = NULL;
1314 } 1315 }
1315 } 1316 }
1316 1317
@@ -2114,6 +2115,11 @@ static int omapfb_probe(struct platform_device *pdev)
2114 dssdev = NULL; 2115 dssdev = NULL;
2115 for_each_dss_dev(dssdev) { 2116 for_each_dss_dev(dssdev) {
2116 omap_dss_get_device(dssdev); 2117 omap_dss_get_device(dssdev);
2118 if (!dssdev->driver) {
2119 dev_err(&pdev->dev, "no driver for display\n");
2120 r = -EINVAL;
2121 goto cleanup;
2122 }
2117 fbdev->displays[fbdev->num_displays++] = dssdev; 2123 fbdev->displays[fbdev->num_displays++] = dssdev;
2118 } 2124 }
2119 2125
diff --git a/drivers/video/pxafb.c b/drivers/video/pxafb.c
index 415858b421b3..825b665245bb 100644
--- a/drivers/video/pxafb.c
+++ b/drivers/video/pxafb.c
@@ -1221,9 +1221,9 @@ static void setup_smart_timing(struct pxafb_info *fbi,
1221static int pxafb_smart_thread(void *arg) 1221static int pxafb_smart_thread(void *arg)
1222{ 1222{
1223 struct pxafb_info *fbi = arg; 1223 struct pxafb_info *fbi = arg;
1224 struct pxafb_mach_info *inf; 1224 struct pxafb_mach_info *inf = fbi->dev->platform_data;
1225 1225
1226 if (!fbi || !fbi->dev->platform_data->smart_update) { 1226 if (!inf->smart_update) {
1227 pr_err("%s: not properly initialized, thread terminated\n", 1227 pr_err("%s: not properly initialized, thread terminated\n",
1228 __func__); 1228 __func__);
1229 return -EINVAL; 1229 return -EINVAL;
diff --git a/drivers/video/s3c-fb.c b/drivers/video/s3c-fb.c
index adf9632c6b1f..53cb722c45a0 100644
--- a/drivers/video/s3c-fb.c
+++ b/drivers/video/s3c-fb.c
@@ -211,21 +211,23 @@ static int s3c_fb_check_var(struct fb_var_screeninfo *var,
211 211
212/** 212/**
213 * s3c_fb_calc_pixclk() - calculate the divider to create the pixel clock. 213 * s3c_fb_calc_pixclk() - calculate the divider to create the pixel clock.
214 * @id: window id.
215 * @sfb: The hardware state. 214 * @sfb: The hardware state.
216 * @pixclock: The pixel clock wanted, in picoseconds. 215 * @pixclock: The pixel clock wanted, in picoseconds.
217 * 216 *
218 * Given the specified pixel clock, work out the necessary divider to get 217 * Given the specified pixel clock, work out the necessary divider to get
219 * close to the output frequency. 218 * close to the output frequency.
220 */ 219 */
221static int s3c_fb_calc_pixclk(unsigned char id, struct s3c_fb *sfb, unsigned int pixclk) 220static int s3c_fb_calc_pixclk(struct s3c_fb *sfb, unsigned int pixclk)
222{ 221{
223 struct s3c_fb_pd_win *win = sfb->pdata->win[id];
224 unsigned long clk = clk_get_rate(sfb->bus_clk); 222 unsigned long clk = clk_get_rate(sfb->bus_clk);
223 unsigned long long tmp;
225 unsigned int result; 224 unsigned int result;
226 225
227 pixclk *= win->win_mode.refresh; 226 tmp = (unsigned long long)clk;
228 result = clk / pixclk; 227 tmp *= pixclk;
228
229 do_div(tmp, 1000000000UL);
230 result = (unsigned int)tmp / 1000;
229 231
230 dev_dbg(sfb->dev, "pixclk=%u, clk=%lu, div=%d (%lu)\n", 232 dev_dbg(sfb->dev, "pixclk=%u, clk=%lu, div=%d (%lu)\n",
231 pixclk, clk, result, clk / result); 233 pixclk, clk, result, clk / result);
@@ -301,7 +303,7 @@ static int s3c_fb_set_par(struct fb_info *info)
301 /* use window 0 as the basis for the lcd output timings */ 303 /* use window 0 as the basis for the lcd output timings */
302 304
303 if (win_no == 0) { 305 if (win_no == 0) {
304 clkdiv = s3c_fb_calc_pixclk(win_no, sfb, var->pixclock); 306 clkdiv = s3c_fb_calc_pixclk(sfb, var->pixclock);
305 307
306 data = sfb->pdata->vidcon0; 308 data = sfb->pdata->vidcon0;
307 data &= ~(VIDCON0_CLKVAL_F_MASK | VIDCON0_CLKDIR); 309 data &= ~(VIDCON0_CLKVAL_F_MASK | VIDCON0_CLKDIR);
diff --git a/drivers/video/sh_mobile_lcdcfb.c b/drivers/video/sh_mobile_lcdcfb.c
index 8a65fb6648a6..a69830d26f7f 100644
--- a/drivers/video/sh_mobile_lcdcfb.c
+++ b/drivers/video/sh_mobile_lcdcfb.c
@@ -281,6 +281,7 @@ static void sh_mobile_lcdc_deferred_io(struct fb_info *info,
281 struct list_head *pagelist) 281 struct list_head *pagelist)
282{ 282{
283 struct sh_mobile_lcdc_chan *ch = info->par; 283 struct sh_mobile_lcdc_chan *ch = info->par;
284 struct sh_mobile_lcdc_board_cfg *bcfg = &ch->cfg.board_cfg;
284 285
285 /* enable clocks before accessing hardware */ 286 /* enable clocks before accessing hardware */
286 sh_mobile_lcdc_clk_on(ch->lcdc); 287 sh_mobile_lcdc_clk_on(ch->lcdc);
@@ -305,10 +306,17 @@ static void sh_mobile_lcdc_deferred_io(struct fb_info *info,
305 306
306 /* trigger panel update */ 307 /* trigger panel update */
307 dma_map_sg(info->dev, ch->sglist, nr_pages, DMA_TO_DEVICE); 308 dma_map_sg(info->dev, ch->sglist, nr_pages, DMA_TO_DEVICE);
309 if (bcfg->start_transfer)
310 bcfg->start_transfer(bcfg->board_data, ch,
311 &sh_mobile_lcdc_sys_bus_ops);
308 lcdc_write_chan(ch, LDSM2R, 1); 312 lcdc_write_chan(ch, LDSM2R, 1);
309 dma_unmap_sg(info->dev, ch->sglist, nr_pages, DMA_TO_DEVICE); 313 dma_unmap_sg(info->dev, ch->sglist, nr_pages, DMA_TO_DEVICE);
310 } else 314 } else {
315 if (bcfg->start_transfer)
316 bcfg->start_transfer(bcfg->board_data, ch,
317 &sh_mobile_lcdc_sys_bus_ops);
311 lcdc_write_chan(ch, LDSM2R, 1); 318 lcdc_write_chan(ch, LDSM2R, 1);
319 }
312} 320}
313 321
314static void sh_mobile_lcdc_deferred_io_touch(struct fb_info *info) 322static void sh_mobile_lcdc_deferred_io_touch(struct fb_info *info)
diff --git a/drivers/video/via/accel.c b/drivers/video/via/accel.c
index 9d4f3a49ba4a..d5077dfa9e00 100644
--- a/drivers/video/via/accel.c
+++ b/drivers/video/via/accel.c
@@ -137,7 +137,7 @@ static int hw_bitblt_1(void __iomem *engine, u8 op, u32 width, u32 height,
137 tmp, dst_pitch); 137 tmp, dst_pitch);
138 return -EINVAL; 138 return -EINVAL;
139 } 139 }
140 tmp = (tmp >> 3) | (dst_pitch << (16 - 3)); 140 tmp = VIA_PITCH_ENABLE | (tmp >> 3) | (dst_pitch << (16 - 3));
141 writel(tmp, engine + 0x38); 141 writel(tmp, engine + 0x38);
142 142
143 if (op == VIA_BITBLT_FILL) 143 if (op == VIA_BITBLT_FILL)
@@ -352,6 +352,9 @@ int viafb_init_engine(struct fb_info *info)
352 viapar->shared->vq_vram_addr = viapar->fbmem_free; 352 viapar->shared->vq_vram_addr = viapar->fbmem_free;
353 viapar->fbmem_used += VQ_SIZE; 353 viapar->fbmem_used += VQ_SIZE;
354 354
355 /* Init 2D engine reg to reset 2D engine */
356 writel(0x0, engine + VIA_REG_KEYCONTROL);
357
355 /* Init AGP and VQ regs */ 358 /* Init AGP and VQ regs */
356 switch (chip_name) { 359 switch (chip_name) {
357 case UNICHROME_K8M890: 360 case UNICHROME_K8M890:
diff --git a/drivers/video/via/viafbdev.c b/drivers/video/via/viafbdev.c
index 10d8c4b4baeb..3028e7ddc3b5 100644
--- a/drivers/video/via/viafbdev.c
+++ b/drivers/video/via/viafbdev.c
@@ -177,16 +177,15 @@ static int viafb_set_par(struct fb_info *info)
177 } 177 }
178 178
179 if (vmode_index != VIA_RES_INVALID) { 179 if (vmode_index != VIA_RES_INVALID) {
180 viafb_setmode(vmode_index, info->var.xres, info->var.yres,
181 info->var.bits_per_pixel, vmode_index1,
182 viafb_second_xres, viafb_second_yres, viafb_bpp1);
183
184 viafb_update_fix(info); 180 viafb_update_fix(info);
185 viafb_bpp = info->var.bits_per_pixel; 181 viafb_bpp = info->var.bits_per_pixel;
186 if (info->var.accel_flags & FB_ACCELF_TEXT) 182 if (info->var.accel_flags & FB_ACCELF_TEXT)
187 info->flags &= ~FBINFO_HWACCEL_DISABLED; 183 info->flags &= ~FBINFO_HWACCEL_DISABLED;
188 else 184 else
189 info->flags |= FBINFO_HWACCEL_DISABLED; 185 info->flags |= FBINFO_HWACCEL_DISABLED;
186 viafb_setmode(vmode_index, info->var.xres, info->var.yres,
187 info->var.bits_per_pixel, vmode_index1,
188 viafb_second_xres, viafb_second_yres, viafb_bpp1);
190 } 189 }
191 190
192 return 0; 191 return 0;
@@ -680,7 +679,7 @@ static int viafb_ioctl(struct fb_info *info, u_int cmd, u_long arg)
680 if (!viafb_gamma_table) 679 if (!viafb_gamma_table)
681 return -ENOMEM; 680 return -ENOMEM;
682 if (copy_from_user(viafb_gamma_table, argp, 681 if (copy_from_user(viafb_gamma_table, argp,
683 sizeof(viafb_gamma_table))) { 682 256 * sizeof(u32))) {
684 kfree(viafb_gamma_table); 683 kfree(viafb_gamma_table);
685 return -EFAULT; 684 return -EFAULT;
686 } 685 }
@@ -694,7 +693,7 @@ static int viafb_ioctl(struct fb_info *info, u_int cmd, u_long arg)
694 return -ENOMEM; 693 return -ENOMEM;
695 viafb_get_gamma_table(viafb_gamma_table); 694 viafb_get_gamma_table(viafb_gamma_table);
696 if (copy_to_user(argp, viafb_gamma_table, 695 if (copy_to_user(argp, viafb_gamma_table,
697 sizeof(viafb_gamma_table))) { 696 256 * sizeof(u32))) {
698 kfree(viafb_gamma_table); 697 kfree(viafb_gamma_table);
699 return -EFAULT; 698 return -EFAULT;
700 } 699 }
@@ -872,7 +871,9 @@ static int viafb_cursor(struct fb_info *info, struct fb_cursor *cursor)
872 if (info->flags & FBINFO_HWACCEL_DISABLED || info != viafbinfo) 871 if (info->flags & FBINFO_HWACCEL_DISABLED || info != viafbinfo)
873 return -ENODEV; 872 return -ENODEV;
874 873
875 if (chip_name == UNICHROME_CLE266 && viapar->iga_path == IGA2) 874 /* LCD ouput does not support hw cursors (at least on VN896) */
875 if ((chip_name == UNICHROME_CLE266 && viapar->iga_path == IGA2) ||
876 viafb_LCD_ON)
876 return -ENODEV; 877 return -ENODEV;
877 878
878 viafb_show_hw_cursor(info, HW_Cursor_OFF); 879 viafb_show_hw_cursor(info, HW_Cursor_OFF);
diff --git a/drivers/virtio/virtio_balloon.c b/drivers/virtio/virtio_balloon.c
index 9dd588042880..505be88c82ae 100644
--- a/drivers/virtio/virtio_balloon.c
+++ b/drivers/virtio/virtio_balloon.c
@@ -266,7 +266,7 @@ static void __devexit virtballoon_remove(struct virtio_device *vdev)
266 266
267static unsigned int features[] = { VIRTIO_BALLOON_F_MUST_TELL_HOST }; 267static unsigned int features[] = { VIRTIO_BALLOON_F_MUST_TELL_HOST };
268 268
269static struct virtio_driver virtio_balloon = { 269static struct virtio_driver virtio_balloon_driver = {
270 .feature_table = features, 270 .feature_table = features,
271 .feature_table_size = ARRAY_SIZE(features), 271 .feature_table_size = ARRAY_SIZE(features),
272 .driver.name = KBUILD_MODNAME, 272 .driver.name = KBUILD_MODNAME,
@@ -279,12 +279,12 @@ static struct virtio_driver virtio_balloon = {
279 279
280static int __init init(void) 280static int __init init(void)
281{ 281{
282 return register_virtio_driver(&virtio_balloon); 282 return register_virtio_driver(&virtio_balloon_driver);
283} 283}
284 284
285static void __exit fini(void) 285static void __exit fini(void)
286{ 286{
287 unregister_virtio_driver(&virtio_balloon); 287 unregister_virtio_driver(&virtio_balloon_driver);
288} 288}
289module_init(init); 289module_init(init);
290module_exit(fini); 290module_exit(fini);
diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig
index d958b76430a2..050ee147592f 100644
--- a/drivers/watchdog/Kconfig
+++ b/drivers/watchdog/Kconfig
@@ -368,7 +368,7 @@ config ALIM7101_WDT
368 368
369config GEODE_WDT 369config GEODE_WDT
370 tristate "AMD Geode CS5535/CS5536 Watchdog" 370 tristate "AMD Geode CS5535/CS5536 Watchdog"
371 depends on MGEODE_LX 371 depends on CS5535_MFGPT
372 help 372 help
373 This driver enables a watchdog capability built into the 373 This driver enables a watchdog capability built into the
374 CS5535/CS5536 companion chips for the AMD Geode GX and LX 374 CS5535/CS5536 companion chips for the AMD Geode GX and LX
@@ -396,8 +396,8 @@ config SBC_FITPC2_WATCHDOG
396 tristate "Compulab SBC-FITPC2 watchdog" 396 tristate "Compulab SBC-FITPC2 watchdog"
397 depends on X86 397 depends on X86
398 ---help--- 398 ---help---
399 This is the driver for the built-in watchdog timer on the fit-PC2 399 This is the driver for the built-in watchdog timer on the fit-PC2,
400 Single-board computer made by Compulab. 400 fit-PC2i, CM-iAM single-board computers made by Compulab.
401 401
402 It`s possible to enable watchdog timer either from BIOS (F2) or from booted Linux. 402 It`s possible to enable watchdog timer either from BIOS (F2) or from booted Linux.
403 When "Watchdog Timer Value" enabled one can set 31-255 s operational range. 403 When "Watchdog Timer Value" enabled one can set 31-255 s operational range.
@@ -815,16 +815,6 @@ config PNX833X_WDT
815 timer has expired and no process has written to /dev/watchdog during 815 timer has expired and no process has written to /dev/watchdog during
816 that time. 816 that time.
817 817
818config WDT_RM9K_GPI
819 tristate "RM9000/GPI hardware watchdog"
820 depends on CPU_RM9000
821 help
822 Watchdog implementation using the GPI hardware found on
823 PMC-Sierra RM9xxx CPUs.
824
825 To compile this driver as a module, choose M here: the
826 module will be called rm9k_wdt.
827
828config SIBYTE_WDOG 818config SIBYTE_WDOG
829 tristate "Sibyte SoC hardware watchdog" 819 tristate "Sibyte SoC hardware watchdog"
830 depends on CPU_SB1 820 depends on CPU_SB1
diff --git a/drivers/watchdog/Makefile b/drivers/watchdog/Makefile
index 89c045dc468e..475c61100069 100644
--- a/drivers/watchdog/Makefile
+++ b/drivers/watchdog/Makefile
@@ -109,7 +109,6 @@ obj-$(CONFIG_RC32434_WDT) += rc32434_wdt.o
109obj-$(CONFIG_INDYDOG) += indydog.o 109obj-$(CONFIG_INDYDOG) += indydog.o
110obj-$(CONFIG_WDT_MTX1) += mtx-1_wdt.o 110obj-$(CONFIG_WDT_MTX1) += mtx-1_wdt.o
111obj-$(CONFIG_PNX833X_WDT) += pnx833x_wdt.o 111obj-$(CONFIG_PNX833X_WDT) += pnx833x_wdt.o
112obj-$(CONFIG_WDT_RM9K_GPI) += rm9k_wdt.o
113obj-$(CONFIG_SIBYTE_WDOG) += sb_wdog.o 112obj-$(CONFIG_SIBYTE_WDOG) += sb_wdog.o
114obj-$(CONFIG_AR7_WDT) += ar7_wdt.o 113obj-$(CONFIG_AR7_WDT) += ar7_wdt.o
115obj-$(CONFIG_TXX9_WDT) += txx9wdt.o 114obj-$(CONFIG_TXX9_WDT) += txx9wdt.o
diff --git a/drivers/watchdog/adx_wdt.c b/drivers/watchdog/adx_wdt.c
index 9c6594473d3b..9d7d155364f8 100644
--- a/drivers/watchdog/adx_wdt.c
+++ b/drivers/watchdog/adx_wdt.c
@@ -242,14 +242,14 @@ static int __devinit adx_wdt_probe(struct platform_device *pdev)
242 } 242 }
243 243
244 res = devm_request_mem_region(&pdev->dev, res->start, 244 res = devm_request_mem_region(&pdev->dev, res->start,
245 res->end - res->start + 1, res->name); 245 resource_size(res), res->name);
246 if (!res) { 246 if (!res) {
247 dev_err(&pdev->dev, "cannot request I/O memory region\n"); 247 dev_err(&pdev->dev, "cannot request I/O memory region\n");
248 return -ENXIO; 248 return -ENXIO;
249 } 249 }
250 250
251 wdt->base = devm_ioremap_nocache(&pdev->dev, res->start, 251 wdt->base = devm_ioremap_nocache(&pdev->dev, res->start,
252 res->end - res->start + 1); 252 resource_size(res));
253 if (!wdt->base) { 253 if (!wdt->base) {
254 dev_err(&pdev->dev, "cannot remap I/O memory region\n"); 254 dev_err(&pdev->dev, "cannot remap I/O memory region\n");
255 return -ENXIO; 255 return -ENXIO;
diff --git a/drivers/watchdog/at32ap700x_wdt.c b/drivers/watchdog/at32ap700x_wdt.c
index e8ae638e5804..037847923dcb 100644
--- a/drivers/watchdog/at32ap700x_wdt.c
+++ b/drivers/watchdog/at32ap700x_wdt.c
@@ -326,7 +326,7 @@ static int __init at32_wdt_probe(struct platform_device *pdev)
326 return -ENOMEM; 326 return -ENOMEM;
327 } 327 }
328 328
329 wdt->regs = ioremap(regs->start, regs->end - regs->start + 1); 329 wdt->regs = ioremap(regs->start, resource_size(regs));
330 if (!wdt->regs) { 330 if (!wdt->regs) {
331 ret = -ENOMEM; 331 ret = -ENOMEM;
332 dev_dbg(&pdev->dev, "could not map I/O memory\n"); 332 dev_dbg(&pdev->dev, "could not map I/O memory\n");
diff --git a/drivers/watchdog/bfin_wdt.c b/drivers/watchdog/bfin_wdt.c
index c7b3f9df2317..2159e668751c 100644
--- a/drivers/watchdog/bfin_wdt.c
+++ b/drivers/watchdog/bfin_wdt.c
@@ -1,9 +1,8 @@
1/* 1/*
2 * Blackfin On-Chip Watchdog Driver 2 * Blackfin On-Chip Watchdog Driver
3 * Supports BF53[123]/BF53[467]/BF54[2489]/BF561
4 * 3 *
5 * Originally based on softdog.c 4 * Originally based on softdog.c
6 * Copyright 2006-2007 Analog Devices Inc. 5 * Copyright 2006-2010 Analog Devices Inc.
7 * Copyright 2006-2007 Michele d'Amico 6 * Copyright 2006-2007 Michele d'Amico
8 * Copyright 1996 Alan Cox <alan@lxorguk.ukuu.org.uk> 7 * Copyright 1996 Alan Cox <alan@lxorguk.ukuu.org.uk>
9 * 8 *
@@ -137,13 +136,15 @@ static int bfin_wdt_running(void)
137 */ 136 */
138static int bfin_wdt_set_timeout(unsigned long t) 137static int bfin_wdt_set_timeout(unsigned long t)
139{ 138{
140 u32 cnt; 139 u32 cnt, max_t, sclk;
141 unsigned long flags; 140 unsigned long flags;
142 141
143 stampit(); 142 sclk = get_sclk();
143 max_t = -1 / sclk;
144 cnt = t * sclk;
145 stamp("maxtimeout=%us newtimeout=%lus (cnt=%#x)", max_t, t, cnt);
144 146
145 cnt = t * get_sclk(); 147 if (t > max_t) {
146 if (cnt < get_sclk()) {
147 printk(KERN_WARNING PFX "timeout value is too large\n"); 148 printk(KERN_WARNING PFX "timeout value is too large\n");
148 return -EINVAL; 149 return -EINVAL;
149 } 150 }
diff --git a/drivers/watchdog/davinci_wdt.c b/drivers/watchdog/davinci_wdt.c
index 9d7520fa9e9c..887136de1857 100644
--- a/drivers/watchdog/davinci_wdt.c
+++ b/drivers/watchdog/davinci_wdt.c
@@ -221,7 +221,7 @@ static int __devinit davinci_wdt_probe(struct platform_device *pdev)
221 return -ENOENT; 221 return -ENOENT;
222 } 222 }
223 223
224 size = res->end - res->start + 1; 224 size = resource_size(res);
225 wdt_mem = request_mem_region(res->start, size, pdev->name); 225 wdt_mem = request_mem_region(res->start, size, pdev->name);
226 226
227 if (wdt_mem == NULL) { 227 if (wdt_mem == NULL) {
diff --git a/drivers/watchdog/geodewdt.c b/drivers/watchdog/geodewdt.c
index 9acf0015a1e7..38252ff828ca 100644
--- a/drivers/watchdog/geodewdt.c
+++ b/drivers/watchdog/geodewdt.c
@@ -1,6 +1,7 @@
1/* Watchdog timer for the Geode GX/LX with the CS5535/CS5536 companion chip 1/* Watchdog timer for machines with the CS5535/CS5536 companion chip
2 * 2 *
3 * Copyright (C) 2006-2007, Advanced Micro Devices, Inc. 3 * Copyright (C) 2006-2007, Advanced Micro Devices, Inc.
4 * Copyright (C) 2009 Andres Salomon <dilinger@collabora.co.uk>
4 * 5 *
5 * This program is free software; you can redistribute it and/or 6 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License 7 * modify it under the terms of the GNU General Public License
@@ -19,7 +20,7 @@
19#include <linux/reboot.h> 20#include <linux/reboot.h>
20#include <linux/uaccess.h> 21#include <linux/uaccess.h>
21 22
22#include <asm/geode.h> 23#include <linux/cs5535.h>
23 24
24#define GEODEWDT_HZ 500 25#define GEODEWDT_HZ 500
25#define GEODEWDT_SCALE 6 26#define GEODEWDT_SCALE 6
@@ -46,25 +47,25 @@ MODULE_PARM_DESC(nowayout,
46 47
47static struct platform_device *geodewdt_platform_device; 48static struct platform_device *geodewdt_platform_device;
48static unsigned long wdt_flags; 49static unsigned long wdt_flags;
49static int wdt_timer; 50static struct cs5535_mfgpt_timer *wdt_timer;
50static int safe_close; 51static int safe_close;
51 52
52static void geodewdt_ping(void) 53static void geodewdt_ping(void)
53{ 54{
54 /* Stop the counter */ 55 /* Stop the counter */
55 geode_mfgpt_write(wdt_timer, MFGPT_REG_SETUP, 0); 56 cs5535_mfgpt_write(wdt_timer, MFGPT_REG_SETUP, 0);
56 57
57 /* Reset the counter */ 58 /* Reset the counter */
58 geode_mfgpt_write(wdt_timer, MFGPT_REG_COUNTER, 0); 59 cs5535_mfgpt_write(wdt_timer, MFGPT_REG_COUNTER, 0);
59 60
60 /* Enable the counter */ 61 /* Enable the counter */
61 geode_mfgpt_write(wdt_timer, MFGPT_REG_SETUP, MFGPT_SETUP_CNTEN); 62 cs5535_mfgpt_write(wdt_timer, MFGPT_REG_SETUP, MFGPT_SETUP_CNTEN);
62} 63}
63 64
64static void geodewdt_disable(void) 65static void geodewdt_disable(void)
65{ 66{
66 geode_mfgpt_write(wdt_timer, MFGPT_REG_SETUP, 0); 67 cs5535_mfgpt_write(wdt_timer, MFGPT_REG_SETUP, 0);
67 geode_mfgpt_write(wdt_timer, MFGPT_REG_COUNTER, 0); 68 cs5535_mfgpt_write(wdt_timer, MFGPT_REG_COUNTER, 0);
68} 69}
69 70
70static int geodewdt_set_heartbeat(int val) 71static int geodewdt_set_heartbeat(int val)
@@ -72,10 +73,10 @@ static int geodewdt_set_heartbeat(int val)
72 if (val < 1 || val > GEODEWDT_MAX_SECONDS) 73 if (val < 1 || val > GEODEWDT_MAX_SECONDS)
73 return -EINVAL; 74 return -EINVAL;
74 75
75 geode_mfgpt_write(wdt_timer, MFGPT_REG_SETUP, 0); 76 cs5535_mfgpt_write(wdt_timer, MFGPT_REG_SETUP, 0);
76 geode_mfgpt_write(wdt_timer, MFGPT_REG_CMP2, val * GEODEWDT_HZ); 77 cs5535_mfgpt_write(wdt_timer, MFGPT_REG_CMP2, val * GEODEWDT_HZ);
77 geode_mfgpt_write(wdt_timer, MFGPT_REG_COUNTER, 0); 78 cs5535_mfgpt_write(wdt_timer, MFGPT_REG_COUNTER, 0);
78 geode_mfgpt_write(wdt_timer, MFGPT_REG_SETUP, MFGPT_SETUP_CNTEN); 79 cs5535_mfgpt_write(wdt_timer, MFGPT_REG_SETUP, MFGPT_SETUP_CNTEN);
79 80
80 timeout = val; 81 timeout = val;
81 return 0; 82 return 0;
@@ -215,28 +216,25 @@ static struct miscdevice geodewdt_miscdev = {
215 216
216static int __devinit geodewdt_probe(struct platform_device *dev) 217static int __devinit geodewdt_probe(struct platform_device *dev)
217{ 218{
218 int ret, timer; 219 int ret;
219
220 timer = geode_mfgpt_alloc_timer(MFGPT_TIMER_ANY, MFGPT_DOMAIN_WORKING);
221 220
222 if (timer == -1) { 221 wdt_timer = cs5535_mfgpt_alloc_timer(MFGPT_TIMER_ANY, MFGPT_DOMAIN_WORKING);
222 if (!wdt_timer) {
223 printk(KERN_ERR "geodewdt: No timers were available\n"); 223 printk(KERN_ERR "geodewdt: No timers were available\n");
224 return -ENODEV; 224 return -ENODEV;
225 } 225 }
226 226
227 wdt_timer = timer;
228
229 /* Set up the timer */ 227 /* Set up the timer */
230 228
231 geode_mfgpt_write(wdt_timer, MFGPT_REG_SETUP, 229 cs5535_mfgpt_write(wdt_timer, MFGPT_REG_SETUP,
232 GEODEWDT_SCALE | (3 << 8)); 230 GEODEWDT_SCALE | (3 << 8));
233 231
234 /* Set up comparator 2 to reset when the event fires */ 232 /* Set up comparator 2 to reset when the event fires */
235 geode_mfgpt_toggle_event(wdt_timer, MFGPT_CMP2, MFGPT_EVENT_RESET, 1); 233 cs5535_mfgpt_toggle_event(wdt_timer, MFGPT_CMP2, MFGPT_EVENT_RESET, 1);
236 234
237 /* Set up the initial timeout */ 235 /* Set up the initial timeout */
238 236
239 geode_mfgpt_write(wdt_timer, MFGPT_REG_CMP2, 237 cs5535_mfgpt_write(wdt_timer, MFGPT_REG_CMP2,
240 timeout * GEODEWDT_HZ); 238 timeout * GEODEWDT_HZ);
241 239
242 ret = misc_register(&geodewdt_miscdev); 240 ret = misc_register(&geodewdt_miscdev);
diff --git a/drivers/watchdog/iTCO_wdt.c b/drivers/watchdog/iTCO_wdt.c
index e44fbb31bc6f..4bdb7f1a9077 100644
--- a/drivers/watchdog/iTCO_wdt.c
+++ b/drivers/watchdog/iTCO_wdt.c
@@ -29,7 +29,9 @@
29 * document number 313056-003, 313057-017: 82801H (ICH8) 29 * document number 313056-003, 313057-017: 82801H (ICH8)
30 * document number 316972-004, 316973-012: 82801I (ICH9) 30 * document number 316972-004, 316973-012: 82801I (ICH9)
31 * document number 319973-002, 319974-002: 82801J (ICH10) 31 * document number 319973-002, 319974-002: 82801J (ICH10)
32 * document number 322169-001, 322170-001: 5 Series, 3400 Series (PCH) 32 * document number 322169-001, 322170-003: 5 Series, 3400 Series (PCH)
33 * document number 320066-003, 320257-008: EP80597 (IICH)
34 * document number TBD : Cougar Point (CPT)
33 */ 35 */
34 36
35/* 37/*
@@ -99,7 +101,22 @@ enum iTCO_chipsets {
99 TCO_ICH10DO, /* ICH10DO */ 101 TCO_ICH10DO, /* ICH10DO */
100 TCO_PCH, /* PCH Desktop Full Featured */ 102 TCO_PCH, /* PCH Desktop Full Featured */
101 TCO_PCHM, /* PCH Mobile Full Featured */ 103 TCO_PCHM, /* PCH Mobile Full Featured */
104 TCO_P55, /* P55 */
105 TCO_PM55, /* PM55 */
106 TCO_H55, /* H55 */
107 TCO_QM57, /* QM57 */
108 TCO_H57, /* H57 */
109 TCO_HM55, /* HM55 */
110 TCO_Q57, /* Q57 */
111 TCO_HM57, /* HM57 */
102 TCO_PCHMSFF, /* PCH Mobile SFF Full Featured */ 112 TCO_PCHMSFF, /* PCH Mobile SFF Full Featured */
113 TCO_QS57, /* QS57 */
114 TCO_3400, /* 3400 */
115 TCO_3420, /* 3420 */
116 TCO_3450, /* 3450 */
117 TCO_EP80579, /* EP80579 */
118 TCO_CPTD, /* CPT Desktop */
119 TCO_CPTM, /* CPT Mobile */
103}; 120};
104 121
105static struct { 122static struct {
@@ -142,7 +159,22 @@ static struct {
142 {"ICH10DO", 2}, 159 {"ICH10DO", 2},
143 {"PCH Desktop Full Featured", 2}, 160 {"PCH Desktop Full Featured", 2},
144 {"PCH Mobile Full Featured", 2}, 161 {"PCH Mobile Full Featured", 2},
162 {"P55", 2},
163 {"PM55", 2},
164 {"H55", 2},
165 {"QM57", 2},
166 {"H57", 2},
167 {"HM55", 2},
168 {"Q57", 2},
169 {"HM57", 2},
145 {"PCH Mobile SFF Full Featured", 2}, 170 {"PCH Mobile SFF Full Featured", 2},
171 {"QS57", 2},
172 {"3400", 2},
173 {"3420", 2},
174 {"3450", 2},
175 {"EP80579", 2},
176 {"CPT Desktop", 2},
177 {"CPT Mobile", 2},
146 {NULL, 0} 178 {NULL, 0}
147}; 179};
148 180
@@ -213,7 +245,22 @@ static struct pci_device_id iTCO_wdt_pci_tbl[] = {
213 { ITCO_PCI_DEVICE(0x3a14, TCO_ICH10DO)}, 245 { ITCO_PCI_DEVICE(0x3a14, TCO_ICH10DO)},
214 { ITCO_PCI_DEVICE(0x3b00, TCO_PCH)}, 246 { ITCO_PCI_DEVICE(0x3b00, TCO_PCH)},
215 { ITCO_PCI_DEVICE(0x3b01, TCO_PCHM)}, 247 { ITCO_PCI_DEVICE(0x3b01, TCO_PCHM)},
248 { ITCO_PCI_DEVICE(0x3b02, TCO_P55)},
249 { ITCO_PCI_DEVICE(0x3b03, TCO_PM55)},
250 { ITCO_PCI_DEVICE(0x3b06, TCO_H55)},
251 { ITCO_PCI_DEVICE(0x3b07, TCO_QM57)},
252 { ITCO_PCI_DEVICE(0x3b08, TCO_H57)},
253 { ITCO_PCI_DEVICE(0x3b09, TCO_HM55)},
254 { ITCO_PCI_DEVICE(0x3b0a, TCO_Q57)},
255 { ITCO_PCI_DEVICE(0x3b0b, TCO_HM57)},
216 { ITCO_PCI_DEVICE(0x3b0d, TCO_PCHMSFF)}, 256 { ITCO_PCI_DEVICE(0x3b0d, TCO_PCHMSFF)},
257 { ITCO_PCI_DEVICE(0x3b0f, TCO_QS57)},
258 { ITCO_PCI_DEVICE(0x3b12, TCO_3400)},
259 { ITCO_PCI_DEVICE(0x3b14, TCO_3420)},
260 { ITCO_PCI_DEVICE(0x3b16, TCO_3450)},
261 { ITCO_PCI_DEVICE(0x5031, TCO_EP80579)},
262 { ITCO_PCI_DEVICE(0x1c42, TCO_CPTD)},
263 { ITCO_PCI_DEVICE(0x1c43, TCO_CPTM)},
217 { 0, }, /* End of list */ 264 { 0, }, /* End of list */
218}; 265};
219MODULE_DEVICE_TABLE(pci, iTCO_wdt_pci_tbl); 266MODULE_DEVICE_TABLE(pci, iTCO_wdt_pci_tbl);
diff --git a/drivers/watchdog/ixp2000_wdt.c b/drivers/watchdog/ixp2000_wdt.c
index 4f4b35a20d84..3c79dc587958 100644
--- a/drivers/watchdog/ixp2000_wdt.c
+++ b/drivers/watchdog/ixp2000_wdt.c
@@ -19,6 +19,7 @@
19#include <linux/module.h> 19#include <linux/module.h>
20#include <linux/moduleparam.h> 20#include <linux/moduleparam.h>
21#include <linux/types.h> 21#include <linux/types.h>
22#include <linux/timer.h>
22#include <linux/kernel.h> 23#include <linux/kernel.h>
23#include <linux/fs.h> 24#include <linux/fs.h>
24#include <linux/miscdevice.h> 25#include <linux/miscdevice.h>
diff --git a/drivers/watchdog/mpcore_wdt.c b/drivers/watchdog/mpcore_wdt.c
index 83fa34b214b4..a2dc07c2ed49 100644
--- a/drivers/watchdog/mpcore_wdt.c
+++ b/drivers/watchdog/mpcore_wdt.c
@@ -350,7 +350,7 @@ static int __devinit mpcore_wdt_probe(struct platform_device *dev)
350 ret = -ENXIO; 350 ret = -ENXIO;
351 goto err_free; 351 goto err_free;
352 } 352 }
353 wdt->base = ioremap(res->start, res->end - res->start + 1); 353 wdt->base = ioremap(res->start, resource_size(res));
354 if (!wdt->base) { 354 if (!wdt->base) {
355 ret = -ENOMEM; 355 ret = -ENOMEM;
356 goto err_free; 356 goto err_free;
diff --git a/drivers/watchdog/mv64x60_wdt.c b/drivers/watchdog/mv64x60_wdt.c
index acf589dc057c..a51dbe4c43da 100644
--- a/drivers/watchdog/mv64x60_wdt.c
+++ b/drivers/watchdog/mv64x60_wdt.c
@@ -275,7 +275,7 @@ static int __devinit mv64x60_wdt_probe(struct platform_device *dev)
275 if (!r) 275 if (!r)
276 return -ENODEV; 276 return -ENODEV;
277 277
278 mv64x60_wdt_regs = ioremap(r->start, r->end - r->start + 1); 278 mv64x60_wdt_regs = ioremap(r->start, resource_size(r));
279 if (mv64x60_wdt_regs == NULL) 279 if (mv64x60_wdt_regs == NULL)
280 return -ENOMEM; 280 return -ENOMEM;
281 281
diff --git a/drivers/watchdog/omap_wdt.c b/drivers/watchdog/omap_wdt.c
index 429ea99eaee5..c6aaf2845741 100644
--- a/drivers/watchdog/omap_wdt.c
+++ b/drivers/watchdog/omap_wdt.c
@@ -277,8 +277,7 @@ static int __devinit omap_wdt_probe(struct platform_device *pdev)
277 goto err_busy; 277 goto err_busy;
278 } 278 }
279 279
280 mem = request_mem_region(res->start, res->end - res->start + 1, 280 mem = request_mem_region(res->start, resource_size(res), pdev->name);
281 pdev->name);
282 if (!mem) { 281 if (!mem) {
283 ret = -EBUSY; 282 ret = -EBUSY;
284 goto err_busy; 283 goto err_busy;
@@ -306,7 +305,7 @@ static int __devinit omap_wdt_probe(struct platform_device *pdev)
306 goto err_clk; 305 goto err_clk;
307 } 306 }
308 307
309 wdev->base = ioremap(res->start, res->end - res->start + 1); 308 wdev->base = ioremap(res->start, resource_size(res));
310 if (!wdev->base) { 309 if (!wdev->base) {
311 ret = -ENOMEM; 310 ret = -ENOMEM;
312 goto err_ioremap; 311 goto err_ioremap;
@@ -358,7 +357,7 @@ err_clk:
358 kfree(wdev); 357 kfree(wdev);
359 358
360err_kzalloc: 359err_kzalloc:
361 release_mem_region(res->start, res->end - res->start + 1); 360 release_mem_region(res->start, resource_size(res));
362 361
363err_busy: 362err_busy:
364err_get_resource: 363err_get_resource:
@@ -383,7 +382,7 @@ static int __devexit omap_wdt_remove(struct platform_device *pdev)
383 return -ENOENT; 382 return -ENOENT;
384 383
385 misc_deregister(&(wdev->omap_wdt_miscdev)); 384 misc_deregister(&(wdev->omap_wdt_miscdev));
386 release_mem_region(res->start, res->end - res->start + 1); 385 release_mem_region(res->start, resource_size(res));
387 platform_set_drvdata(pdev, NULL); 386 platform_set_drvdata(pdev, NULL);
388 387
389 clk_put(wdev->ick); 388 clk_put(wdev->ick);
diff --git a/drivers/watchdog/pnx4008_wdt.c b/drivers/watchdog/pnx4008_wdt.c
index 4d227b152001..430a5848a9a5 100644
--- a/drivers/watchdog/pnx4008_wdt.c
+++ b/drivers/watchdog/pnx4008_wdt.c
@@ -264,7 +264,7 @@ static int __devinit pnx4008_wdt_probe(struct platform_device *pdev)
264 return -ENOENT; 264 return -ENOENT;
265 } 265 }
266 266
267 size = res->end - res->start + 1; 267 size = resource_size(res);
268 wdt_mem = request_mem_region(res->start, size, pdev->name); 268 wdt_mem = request_mem_region(res->start, size, pdev->name);
269 269
270 if (wdt_mem == NULL) { 270 if (wdt_mem == NULL) {
diff --git a/drivers/watchdog/rm9k_wdt.c b/drivers/watchdog/rm9k_wdt.c
deleted file mode 100644
index bb66958b9433..000000000000
--- a/drivers/watchdog/rm9k_wdt.c
+++ /dev/null
@@ -1,419 +0,0 @@
1/*
2 * Watchdog implementation for GPI h/w found on PMC-Sierra RM9xxx
3 * chips.
4 *
5 * Copyright (C) 2004 by Basler Vision Technologies AG
6 * Author: Thomas Koeller <thomas.koeller@baslerweb.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 */
22
23#include <linux/platform_device.h>
24#include <linux/module.h>
25#include <linux/moduleparam.h>
26#include <linux/interrupt.h>
27#include <linux/fs.h>
28#include <linux/reboot.h>
29#include <linux/notifier.h>
30#include <linux/miscdevice.h>
31#include <linux/watchdog.h>
32#include <linux/io.h>
33#include <linux/uaccess.h>
34#include <asm/atomic.h>
35#include <asm/processor.h>
36#include <asm/system.h>
37#include <asm/rm9k-ocd.h>
38
39#include <rm9k_wdt.h>
40
41
42#define CLOCK 125000000
43#define MAX_TIMEOUT_SECONDS 32
44#define CPCCR 0x0080
45#define CPGIG1SR 0x0044
46#define CPGIG1ER 0x0054
47
48
49/* Function prototypes */
50static irqreturn_t wdt_gpi_irqhdl(int, void *);
51static void wdt_gpi_start(void);
52static void wdt_gpi_stop(void);
53static void wdt_gpi_set_timeout(unsigned int);
54static int wdt_gpi_open(struct inode *, struct file *);
55static int wdt_gpi_release(struct inode *, struct file *);
56static ssize_t wdt_gpi_write(struct file *, const char __user *, size_t,
57 loff_t *);
58static long wdt_gpi_ioctl(struct file *, unsigned int, unsigned long);
59static int wdt_gpi_notify(struct notifier_block *, unsigned long, void *);
60static const struct resource *wdt_gpi_get_resource(struct platform_device *,
61 const char *, unsigned int);
62static int __init wdt_gpi_probe(struct platform_device *);
63static int __exit wdt_gpi_remove(struct platform_device *);
64
65
66static const char wdt_gpi_name[] = "wdt_gpi";
67static atomic_t opencnt;
68static int expect_close;
69static int locked;
70
71
72/* These are set from device resources */
73static void __iomem *wd_regs;
74static unsigned int wd_irq, wd_ctr;
75
76
77/* Module arguments */
78static int timeout = MAX_TIMEOUT_SECONDS;
79module_param(timeout, int, 0444);
80MODULE_PARM_DESC(timeout, "Watchdog timeout in seconds");
81
82static unsigned long resetaddr = 0xbffdc200;
83module_param(resetaddr, ulong, 0444);
84MODULE_PARM_DESC(resetaddr, "Address to write to to force a reset");
85
86static unsigned long flagaddr = 0xbffdc104;
87module_param(flagaddr, ulong, 0444);
88MODULE_PARM_DESC(flagaddr, "Address to write to boot flags to");
89
90static int powercycle;
91module_param(powercycle, bool, 0444);
92MODULE_PARM_DESC(powercycle, "Cycle power if watchdog expires");
93
94static int nowayout = WATCHDOG_NOWAYOUT;
95module_param(nowayout, bool, 0444);
96MODULE_PARM_DESC(nowayout, "Watchdog cannot be disabled once started");
97
98
99/* Kernel interfaces */
100static const struct file_operations fops = {
101 .owner = THIS_MODULE,
102 .open = wdt_gpi_open,
103 .release = wdt_gpi_release,
104 .write = wdt_gpi_write,
105 .unlocked_ioctl = wdt_gpi_ioctl,
106};
107
108static struct miscdevice miscdev = {
109 .minor = WATCHDOG_MINOR,
110 .name = wdt_gpi_name,
111 .fops = &fops,
112};
113
114static struct notifier_block wdt_gpi_shutdown = {
115 .notifier_call = wdt_gpi_notify,
116};
117
118
119/* Interrupt handler */
120static irqreturn_t wdt_gpi_irqhdl(int irq, void *ctxt)
121{
122 if (!unlikely(__raw_readl(wd_regs + 0x0008) & 0x1))
123 return IRQ_NONE;
124 __raw_writel(0x1, wd_regs + 0x0008);
125
126
127 printk(KERN_CRIT "%s: watchdog expired - resetting system\n",
128 wdt_gpi_name);
129
130 *(volatile char *) flagaddr |= 0x01;
131 *(volatile char *) resetaddr = powercycle ? 0x01 : 0x2;
132 iob();
133 while (1)
134 cpu_relax();
135}
136
137
138/* Watchdog functions */
139static void wdt_gpi_start(void)
140{
141 u32 reg;
142
143 lock_titan_regs();
144 reg = titan_readl(CPGIG1ER);
145 titan_writel(reg | (0x100 << wd_ctr), CPGIG1ER);
146 iob();
147 unlock_titan_regs();
148}
149
150static void wdt_gpi_stop(void)
151{
152 u32 reg;
153
154 lock_titan_regs();
155 reg = titan_readl(CPCCR) & ~(0xf << (wd_ctr * 4));
156 titan_writel(reg, CPCCR);
157 reg = titan_readl(CPGIG1ER);
158 titan_writel(reg & ~(0x100 << wd_ctr), CPGIG1ER);
159 iob();
160 unlock_titan_regs();
161}
162
163static void wdt_gpi_set_timeout(unsigned int to)
164{
165 u32 reg;
166 const u32 wdval = (to * CLOCK) & ~0x0000000f;
167
168 lock_titan_regs();
169 reg = titan_readl(CPCCR) & ~(0xf << (wd_ctr * 4));
170 titan_writel(reg, CPCCR);
171 wmb();
172 __raw_writel(wdval, wd_regs + 0x0000);
173 wmb();
174 titan_writel(reg | (0x2 << (wd_ctr * 4)), CPCCR);
175 wmb();
176 titan_writel(reg | (0x5 << (wd_ctr * 4)), CPCCR);
177 iob();
178 unlock_titan_regs();
179}
180
181
182/* /dev/watchdog operations */
183static int wdt_gpi_open(struct inode *inode, struct file *file)
184{
185 int res;
186
187 if (unlikely(atomic_dec_if_positive(&opencnt) < 0))
188 return -EBUSY;
189
190 expect_close = 0;
191 if (locked) {
192 module_put(THIS_MODULE);
193 free_irq(wd_irq, &miscdev);
194 locked = 0;
195 }
196
197 res = request_irq(wd_irq, wdt_gpi_irqhdl, IRQF_SHARED | IRQF_DISABLED,
198 wdt_gpi_name, &miscdev);
199 if (unlikely(res))
200 return res;
201
202 wdt_gpi_set_timeout(timeout);
203 wdt_gpi_start();
204
205 printk(KERN_INFO "%s: watchdog started, timeout = %u seconds\n",
206 wdt_gpi_name, timeout);
207 return nonseekable_open(inode, file);
208}
209
210static int wdt_gpi_release(struct inode *inode, struct file *file)
211{
212 if (nowayout) {
213 printk(KERN_INFO "%s: no way out - watchdog left running\n",
214 wdt_gpi_name);
215 __module_get(THIS_MODULE);
216 locked = 1;
217 } else {
218 if (expect_close) {
219 wdt_gpi_stop();
220 free_irq(wd_irq, &miscdev);
221 printk(KERN_INFO "%s: watchdog stopped\n",
222 wdt_gpi_name);
223 } else {
224 printk(KERN_CRIT "%s: unexpected close() -"
225 " watchdog left running\n",
226 wdt_gpi_name);
227 wdt_gpi_set_timeout(timeout);
228 __module_get(THIS_MODULE);
229 locked = 1;
230 }
231 }
232
233 atomic_inc(&opencnt);
234 return 0;
235}
236
237static ssize_t wdt_gpi_write(struct file *f, const char __user *d, size_t s,
238 loff_t *o)
239{
240 char val;
241
242 wdt_gpi_set_timeout(timeout);
243 expect_close = (s > 0) && !get_user(val, d) && (val == 'V');
244 return s ? 1 : 0;
245}
246
247static long wdt_gpi_ioctl(struct file *f, unsigned int cmd, unsigned long arg)
248{
249 long res = -ENOTTY;
250 const long size = _IOC_SIZE(cmd);
251 int stat;
252 void __user *argp = (void __user *)arg;
253 static struct watchdog_info wdinfo = {
254 .identity = "RM9xxx/GPI watchdog",
255 .firmware_version = 0,
256 .options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING
257 };
258
259 if (unlikely(_IOC_TYPE(cmd) != WATCHDOG_IOCTL_BASE))
260 return -ENOTTY;
261
262 if ((_IOC_DIR(cmd) & _IOC_READ)
263 && !access_ok(VERIFY_WRITE, arg, size))
264 return -EFAULT;
265
266 if ((_IOC_DIR(cmd) & _IOC_WRITE)
267 && !access_ok(VERIFY_READ, arg, size))
268 return -EFAULT;
269
270 expect_close = 0;
271
272 switch (cmd) {
273 case WDIOC_GETSUPPORT:
274 wdinfo.options = nowayout ?
275 WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING :
276 WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING |
277 WDIOF_MAGICCLOSE;
278 res = __copy_to_user(argp, &wdinfo, size) ? -EFAULT : size;
279 break;
280
281 case WDIOC_GETSTATUS:
282 break;
283
284 case WDIOC_GETBOOTSTATUS:
285 stat = (*(volatile char *) flagaddr & 0x01)
286 ? WDIOF_CARDRESET : 0;
287 res = __copy_to_user(argp, &stat, size) ?
288 -EFAULT : size;
289 break;
290
291 case WDIOC_SETOPTIONS:
292 break;
293
294 case WDIOC_KEEPALIVE:
295 wdt_gpi_set_timeout(timeout);
296 res = size;
297 break;
298
299 case WDIOC_SETTIMEOUT:
300 {
301 int val;
302 if (unlikely(__copy_from_user(&val, argp, size))) {
303 res = -EFAULT;
304 break;
305 }
306
307 if (val > MAX_TIMEOUT_SECONDS)
308 val = MAX_TIMEOUT_SECONDS;
309 timeout = val;
310 wdt_gpi_set_timeout(val);
311 res = size;
312 printk(KERN_INFO "%s: timeout set to %u seconds\n",
313 wdt_gpi_name, timeout);
314 }
315 break;
316
317 case WDIOC_GETTIMEOUT:
318 res = __copy_to_user(argp, &timeout, size) ?
319 -EFAULT : size;
320 break;
321 }
322
323 return res;
324}
325
326
327/* Shutdown notifier */
328static int wdt_gpi_notify(struct notifier_block *this, unsigned long code,
329 void *unused)
330{
331 if (code == SYS_DOWN || code == SYS_HALT)
332 wdt_gpi_stop();
333
334 return NOTIFY_DONE;
335}
336
337
338/* Init & exit procedures */
339static const struct resource *wdt_gpi_get_resource(struct platform_device *pdv,
340 const char *name, unsigned int type)
341{
342 char buf[80];
343 if (snprintf(buf, sizeof(buf), "%s_0", name) >= sizeof(buf))
344 return NULL;
345 return platform_get_resource_byname(pdv, type, buf);
346}
347
348/* No hotplugging on the platform bus - use __devinit */
349static int __devinit wdt_gpi_probe(struct platform_device *pdv)
350{
351 int res;
352 const struct resource
353 * const rr = wdt_gpi_get_resource(pdv, WDT_RESOURCE_REGS,
354 IORESOURCE_MEM),
355 * const ri = wdt_gpi_get_resource(pdv, WDT_RESOURCE_IRQ,
356 IORESOURCE_IRQ),
357 * const rc = wdt_gpi_get_resource(pdv, WDT_RESOURCE_COUNTER,
358 0);
359
360 if (unlikely(!rr || !ri || !rc))
361 return -ENXIO;
362
363 wd_regs = ioremap_nocache(rr->start, rr->end + 1 - rr->start);
364 if (unlikely(!wd_regs))
365 return -ENOMEM;
366 wd_irq = ri->start;
367 wd_ctr = rc->start;
368 res = misc_register(&miscdev);
369 if (res)
370 iounmap(wd_regs);
371 else
372 register_reboot_notifier(&wdt_gpi_shutdown);
373 return res;
374}
375
376static int __devexit wdt_gpi_remove(struct platform_device *dev)
377{
378 int res;
379
380 unregister_reboot_notifier(&wdt_gpi_shutdown);
381 res = misc_deregister(&miscdev);
382 iounmap(wd_regs);
383 wd_regs = NULL;
384 return res;
385}
386
387
388/* Device driver init & exit */
389static struct platform_driver wgt_gpi_driver = {
390 .driver = {
391 .name = wdt_gpi_name,
392 .owner = THIS_MODULE,
393 },
394 .probe = wdt_gpi_probe,
395 .remove = __devexit_p(wdt_gpi_remove),
396};
397
398static int __init wdt_gpi_init_module(void)
399{
400 atomic_set(&opencnt, 1);
401 if (timeout > MAX_TIMEOUT_SECONDS)
402 timeout = MAX_TIMEOUT_SECONDS;
403 return platform_driver_register(&wdt_gpi_driver);
404}
405
406static void __exit wdt_gpi_cleanup_module(void)
407{
408 platform_driver_unregister(&wdt_gpi_driver);
409}
410
411module_init(wdt_gpi_init_module);
412module_exit(wdt_gpi_cleanup_module);
413
414MODULE_AUTHOR("Thomas Koeller <thomas.koeller@baslerweb.com>");
415MODULE_DESCRIPTION("Basler eXcite watchdog driver for gpi devices");
416MODULE_VERSION("0.1");
417MODULE_LICENSE("GPL");
418MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);
419
diff --git a/drivers/watchdog/s3c2410_wdt.c b/drivers/watchdog/s3c2410_wdt.c
index 85b93e15d011..8760a26ab2a3 100644
--- a/drivers/watchdog/s3c2410_wdt.c
+++ b/drivers/watchdog/s3c2410_wdt.c
@@ -421,7 +421,7 @@ static int __devinit s3c2410wdt_probe(struct platform_device *pdev)
421 return -ENOENT; 421 return -ENOENT;
422 } 422 }
423 423
424 size = (res->end - res->start) + 1; 424 size = resource_size(res);
425 wdt_mem = request_mem_region(res->start, size, pdev->name); 425 wdt_mem = request_mem_region(res->start, size, pdev->name);
426 if (wdt_mem == NULL) { 426 if (wdt_mem == NULL) {
427 dev_err(dev, "failed to get memory region\n"); 427 dev_err(dev, "failed to get memory region\n");
diff --git a/drivers/watchdog/sbc_fitpc2_wdt.c b/drivers/watchdog/sbc_fitpc2_wdt.c
index 91430a89107c..e6763d2a567b 100644
--- a/drivers/watchdog/sbc_fitpc2_wdt.c
+++ b/drivers/watchdog/sbc_fitpc2_wdt.c
@@ -46,9 +46,9 @@ static DEFINE_SPINLOCK(wdt_lock);
46static void wdt_send_data(unsigned char command, unsigned char data) 46static void wdt_send_data(unsigned char command, unsigned char data)
47{ 47{
48 outb(command, COMMAND_PORT); 48 outb(command, COMMAND_PORT);
49 mdelay(100); 49 msleep(100);
50 outb(data, DATA_PORT); 50 outb(data, DATA_PORT);
51 mdelay(200); 51 msleep(200);
52} 52}
53 53
54static void wdt_enable(void) 54static void wdt_enable(void)
@@ -202,11 +202,10 @@ static int __init fitpc2_wdt_init(void)
202{ 202{
203 int err; 203 int err;
204 204
205 if (strcmp("SBC-FITPC2", dmi_get_system_info(DMI_BOARD_NAME))) { 205 if (!strstr(dmi_get_system_info(DMI_BOARD_NAME), "SBC-FITPC2"))
206 pr_info("board name is: %s. Should be SBC-FITPC2\n",
207 dmi_get_system_info(DMI_BOARD_NAME));
208 return -ENODEV; 206 return -ENODEV;
209 } 207
208 pr_info("%s found\n", dmi_get_system_info(DMI_BOARD_NAME));
210 209
211 if (!request_region(COMMAND_PORT, 1, WATCHDOG_NAME)) { 210 if (!request_region(COMMAND_PORT, 1, WATCHDOG_NAME)) {
212 pr_err("I/O address 0x%04x already in use\n", COMMAND_PORT); 211 pr_err("I/O address 0x%04x already in use\n", COMMAND_PORT);
diff --git a/drivers/watchdog/txx9wdt.c b/drivers/watchdog/txx9wdt.c
index 6adab77fbbb0..d635566e9307 100644
--- a/drivers/watchdog/txx9wdt.c
+++ b/drivers/watchdog/txx9wdt.c
@@ -214,12 +214,10 @@ static int __init txx9wdt_probe(struct platform_device *dev)
214 res = platform_get_resource(dev, IORESOURCE_MEM, 0); 214 res = platform_get_resource(dev, IORESOURCE_MEM, 0);
215 if (!res) 215 if (!res)
216 goto exit_busy; 216 goto exit_busy;
217 if (!devm_request_mem_region(&dev->dev, 217 if (!devm_request_mem_region(&dev->dev, res->start, resource_size(res),
218 res->start, res->end - res->start + 1,
219 "txx9wdt")) 218 "txx9wdt"))
220 goto exit_busy; 219 goto exit_busy;
221 txx9wdt_reg = devm_ioremap(&dev->dev, 220 txx9wdt_reg = devm_ioremap(&dev->dev, res->start, resource_size(res));
222 res->start, res->end - res->start + 1);
223 if (!txx9wdt_reg) 221 if (!txx9wdt_reg)
224 goto exit_busy; 222 goto exit_busy;
225 223
diff --git a/drivers/xen/manage.c b/drivers/xen/manage.c
index c4997930afc7..5d42d55e299b 100644
--- a/drivers/xen/manage.c
+++ b/drivers/xen/manage.c
@@ -102,15 +102,15 @@ static void do_suspend(void)
102 goto out_thaw; 102 goto out_thaw;
103 } 103 }
104 104
105 printk(KERN_DEBUG "suspending xenstore...\n");
106 xs_suspend();
107
105 err = dpm_suspend_noirq(PMSG_SUSPEND); 108 err = dpm_suspend_noirq(PMSG_SUSPEND);
106 if (err) { 109 if (err) {
107 printk(KERN_ERR "dpm_suspend_noirq failed: %d\n", err); 110 printk(KERN_ERR "dpm_suspend_noirq failed: %d\n", err);
108 goto out_resume; 111 goto out_resume;
109 } 112 }
110 113
111 printk(KERN_DEBUG "suspending xenstore...\n");
112 xs_suspend();
113
114 err = stop_machine(xen_suspend, &cancelled, cpumask_of(0)); 114 err = stop_machine(xen_suspend, &cancelled, cpumask_of(0));
115 115
116 dpm_resume_noirq(PMSG_RESUME); 116 dpm_resume_noirq(PMSG_RESUME);
@@ -120,13 +120,13 @@ static void do_suspend(void)
120 cancelled = 1; 120 cancelled = 1;
121 } 121 }
122 122
123out_resume:
123 if (!cancelled) { 124 if (!cancelled) {
124 xen_arch_resume(); 125 xen_arch_resume();
125 xs_resume(); 126 xs_resume();
126 } else 127 } else
127 xs_suspend_cancel(); 128 xs_suspend_cancel();
128 129
129out_resume:
130 dpm_resume_end(PMSG_RESUME); 130 dpm_resume_end(PMSG_RESUME);
131 131
132 /* Make sure timer events get retriggered on all CPUs */ 132 /* Make sure timer events get retriggered on all CPUs */