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authorLinus Torvalds <torvalds@woody.linux-foundation.org>2007-12-21 18:52:24 -0500
committerLinus Torvalds <torvalds@woody.linux-foundation.org>2007-12-21 18:52:24 -0500
commit5b825ed22b02691e39774e8b2a077d1807969ec7 (patch)
treeab5d1e8132d72ea9a60cfe8d381a96ee89dcd2cf /drivers
parenta4c80d2ae2cac531c6655f75658dae02c488abc7 (diff)
parentd883a0367149506e8b7a3f31891d1ea30b9377f3 (diff)
Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-2.6
* git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-2.6: (23 commits) [IPV4]: OOPS with NETLINK_FIB_LOOKUP netlink socket [NET]: Fix function put_cmsg() which may cause usr application memory overflow [ATM]: Spelling fixes [NETFILTER] ipv4: Spelling fixes [NETFILTER]: Spelling fixes [SCTP]: Spelling fixes [NETLABEL]: Spelling fixes [PKT_SCHED]: Spelling fixes [NET] net/core/: Spelling fixes [IPV6]: Spelling fixes [IRDA]: Spelling fixes [DCCP]: Spelling fixes [NET] include/net/: Spelling fixes [NET]: Correct two mistaken skb_reset_mac_header() conversions. [IPV4] ip_gre: set mac_header correctly in receive path [XFRM]: Audit function arguments misordered [IPSEC]: Avoid undefined shift operation when testing algorithm ID [IPV4] ARP: Remove not used code [TG3]: Endianness bugfix. [TG3]: Endianness annotations. ...
Diffstat (limited to 'drivers')
-rw-r--r--drivers/atm/firestream.c4
-rw-r--r--drivers/net/tg3.c98
2 files changed, 56 insertions, 46 deletions
diff --git a/drivers/atm/firestream.c b/drivers/atm/firestream.c
index f8f7139c07c1..c662d686154a 100644
--- a/drivers/atm/firestream.c
+++ b/drivers/atm/firestream.c
@@ -171,8 +171,8 @@ static char *res_strings[] = {
171 "packet purged", 171 "packet purged",
172 "packet ageing timeout", 172 "packet ageing timeout",
173 "channel ageing timeout", 173 "channel ageing timeout",
174 "calculated lenght error", 174 "calculated length error",
175 "programmed lenght limit error", 175 "programmed length limit error",
176 "aal5 crc32 error", 176 "aal5 crc32 error",
177 "oam transp or transpc crc10 error", 177 "oam transp or transpc crc10 error",
178 "reserved 25", 178 "reserved 25",
diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c
index 4942f7d18937..22eb7c8c1a25 100644
--- a/drivers/net/tg3.c
+++ b/drivers/net/tg3.c
@@ -8189,6 +8189,7 @@ static int tg3_get_eeprom_len(struct net_device *dev)
8189} 8189}
8190 8190
8191static int tg3_nvram_read(struct tg3 *tp, u32 offset, u32 *val); 8191static int tg3_nvram_read(struct tg3 *tp, u32 offset, u32 *val);
8192static int tg3_nvram_read_le(struct tg3 *tp, u32 offset, __le32 *val);
8192static int tg3_nvram_read_swab(struct tg3 *tp, u32 offset, u32 *val); 8193static int tg3_nvram_read_swab(struct tg3 *tp, u32 offset, u32 *val);
8193 8194
8194static int tg3_get_eeprom(struct net_device *dev, struct ethtool_eeprom *eeprom, u8 *data) 8195static int tg3_get_eeprom(struct net_device *dev, struct ethtool_eeprom *eeprom, u8 *data)
@@ -8196,7 +8197,8 @@ static int tg3_get_eeprom(struct net_device *dev, struct ethtool_eeprom *eeprom,
8196 struct tg3 *tp = netdev_priv(dev); 8197 struct tg3 *tp = netdev_priv(dev);
8197 int ret; 8198 int ret;
8198 u8 *pd; 8199 u8 *pd;
8199 u32 i, offset, len, val, b_offset, b_count; 8200 u32 i, offset, len, b_offset, b_count;
8201 __le32 val;
8200 8202
8201 if (tp->link_config.phy_is_low_power) 8203 if (tp->link_config.phy_is_low_power)
8202 return -EAGAIN; 8204 return -EAGAIN;
@@ -8215,10 +8217,9 @@ static int tg3_get_eeprom(struct net_device *dev, struct ethtool_eeprom *eeprom,
8215 /* i.e. offset=1 len=2 */ 8217 /* i.e. offset=1 len=2 */
8216 b_count = len; 8218 b_count = len;
8217 } 8219 }
8218 ret = tg3_nvram_read(tp, offset-b_offset, &val); 8220 ret = tg3_nvram_read_le(tp, offset-b_offset, &val);
8219 if (ret) 8221 if (ret)
8220 return ret; 8222 return ret;
8221 val = cpu_to_le32(val);
8222 memcpy(data, ((char*)&val) + b_offset, b_count); 8223 memcpy(data, ((char*)&val) + b_offset, b_count);
8223 len -= b_count; 8224 len -= b_count;
8224 offset += b_count; 8225 offset += b_count;
@@ -8228,12 +8229,11 @@ static int tg3_get_eeprom(struct net_device *dev, struct ethtool_eeprom *eeprom,
8228 /* read bytes upto the last 4 byte boundary */ 8229 /* read bytes upto the last 4 byte boundary */
8229 pd = &data[eeprom->len]; 8230 pd = &data[eeprom->len];
8230 for (i = 0; i < (len - (len & 3)); i += 4) { 8231 for (i = 0; i < (len - (len & 3)); i += 4) {
8231 ret = tg3_nvram_read(tp, offset + i, &val); 8232 ret = tg3_nvram_read_le(tp, offset + i, &val);
8232 if (ret) { 8233 if (ret) {
8233 eeprom->len += i; 8234 eeprom->len += i;
8234 return ret; 8235 return ret;
8235 } 8236 }
8236 val = cpu_to_le32(val);
8237 memcpy(pd + i, &val, 4); 8237 memcpy(pd + i, &val, 4);
8238 } 8238 }
8239 eeprom->len += i; 8239 eeprom->len += i;
@@ -8243,11 +8243,10 @@ static int tg3_get_eeprom(struct net_device *dev, struct ethtool_eeprom *eeprom,
8243 pd = &data[eeprom->len]; 8243 pd = &data[eeprom->len];
8244 b_count = len & 3; 8244 b_count = len & 3;
8245 b_offset = offset + len - b_count; 8245 b_offset = offset + len - b_count;
8246 ret = tg3_nvram_read(tp, b_offset, &val); 8246 ret = tg3_nvram_read_le(tp, b_offset, &val);
8247 if (ret) 8247 if (ret)
8248 return ret; 8248 return ret;
8249 val = cpu_to_le32(val); 8249 memcpy(pd, &val, b_count);
8250 memcpy(pd, ((char*)&val), b_count);
8251 eeprom->len += b_count; 8250 eeprom->len += b_count;
8252 } 8251 }
8253 return 0; 8252 return 0;
@@ -8259,8 +8258,9 @@ static int tg3_set_eeprom(struct net_device *dev, struct ethtool_eeprom *eeprom,
8259{ 8258{
8260 struct tg3 *tp = netdev_priv(dev); 8259 struct tg3 *tp = netdev_priv(dev);
8261 int ret; 8260 int ret;
8262 u32 offset, len, b_offset, odd_len, start, end; 8261 u32 offset, len, b_offset, odd_len;
8263 u8 *buf; 8262 u8 *buf;
8263 __le32 start, end;
8264 8264
8265 if (tp->link_config.phy_is_low_power) 8265 if (tp->link_config.phy_is_low_power)
8266 return -EAGAIN; 8266 return -EAGAIN;
@@ -8273,10 +8273,9 @@ static int tg3_set_eeprom(struct net_device *dev, struct ethtool_eeprom *eeprom,
8273 8273
8274 if ((b_offset = (offset & 3))) { 8274 if ((b_offset = (offset & 3))) {
8275 /* adjustments to start on required 4 byte boundary */ 8275 /* adjustments to start on required 4 byte boundary */
8276 ret = tg3_nvram_read(tp, offset-b_offset, &start); 8276 ret = tg3_nvram_read_le(tp, offset-b_offset, &start);
8277 if (ret) 8277 if (ret)
8278 return ret; 8278 return ret;
8279 start = cpu_to_le32(start);
8280 len += b_offset; 8279 len += b_offset;
8281 offset &= ~3; 8280 offset &= ~3;
8282 if (len < 4) 8281 if (len < 4)
@@ -8288,10 +8287,9 @@ static int tg3_set_eeprom(struct net_device *dev, struct ethtool_eeprom *eeprom,
8288 /* adjustments to end on required 4 byte boundary */ 8287 /* adjustments to end on required 4 byte boundary */
8289 odd_len = 1; 8288 odd_len = 1;
8290 len = (len + 3) & ~3; 8289 len = (len + 3) & ~3;
8291 ret = tg3_nvram_read(tp, offset+len-4, &end); 8290 ret = tg3_nvram_read_le(tp, offset+len-4, &end);
8292 if (ret) 8291 if (ret)
8293 return ret; 8292 return ret;
8294 end = cpu_to_le32(end);
8295 } 8293 }
8296 8294
8297 buf = data; 8295 buf = data;
@@ -8734,7 +8732,8 @@ static void tg3_get_ethtool_stats (struct net_device *dev,
8734 8732
8735static int tg3_test_nvram(struct tg3 *tp) 8733static int tg3_test_nvram(struct tg3 *tp)
8736{ 8734{
8737 u32 *buf, csum, magic; 8735 u32 csum, magic;
8736 __le32 *buf;
8738 int i, j, k, err = 0, size; 8737 int i, j, k, err = 0, size;
8739 8738
8740 if (tg3_nvram_read_swab(tp, 0, &magic) != 0) 8739 if (tg3_nvram_read_swab(tp, 0, &magic) != 0)
@@ -8771,21 +8770,19 @@ static int tg3_test_nvram(struct tg3 *tp)
8771 8770
8772 err = -EIO; 8771 err = -EIO;
8773 for (i = 0, j = 0; i < size; i += 4, j++) { 8772 for (i = 0, j = 0; i < size; i += 4, j++) {
8774 u32 val; 8773 if ((err = tg3_nvram_read_le(tp, i, &buf[j])) != 0)
8775
8776 if ((err = tg3_nvram_read(tp, i, &val)) != 0)
8777 break; 8774 break;
8778 buf[j] = cpu_to_le32(val);
8779 } 8775 }
8780 if (i < size) 8776 if (i < size)
8781 goto out; 8777 goto out;
8782 8778
8783 /* Selfboot format */ 8779 /* Selfboot format */
8784 if ((cpu_to_be32(buf[0]) & TG3_EEPROM_MAGIC_FW_MSK) == 8780 magic = swab32(le32_to_cpu(buf[0]));
8781 if ((magic & TG3_EEPROM_MAGIC_FW_MSK) ==
8785 TG3_EEPROM_MAGIC_FW) { 8782 TG3_EEPROM_MAGIC_FW) {
8786 u8 *buf8 = (u8 *) buf, csum8 = 0; 8783 u8 *buf8 = (u8 *) buf, csum8 = 0;
8787 8784
8788 if ((cpu_to_be32(buf[0]) & TG3_EEPROM_SB_REVISION_MASK) == 8785 if ((magic & TG3_EEPROM_SB_REVISION_MASK) ==
8789 TG3_EEPROM_SB_REVISION_2) { 8786 TG3_EEPROM_SB_REVISION_2) {
8790 /* For rev 2, the csum doesn't include the MBA. */ 8787 /* For rev 2, the csum doesn't include the MBA. */
8791 for (i = 0; i < TG3_EEPROM_SB_F1R2_MBA_OFF; i++) 8788 for (i = 0; i < TG3_EEPROM_SB_F1R2_MBA_OFF; i++)
@@ -8806,7 +8803,7 @@ static int tg3_test_nvram(struct tg3 *tp)
8806 goto out; 8803 goto out;
8807 } 8804 }
8808 8805
8809 if ((cpu_to_be32(buf[0]) & TG3_EEPROM_MAGIC_HW_MSK) == 8806 if ((magic & TG3_EEPROM_MAGIC_HW_MSK) ==
8810 TG3_EEPROM_MAGIC_HW) { 8807 TG3_EEPROM_MAGIC_HW) {
8811 u8 data[NVRAM_SELFBOOT_DATA_SIZE]; 8808 u8 data[NVRAM_SELFBOOT_DATA_SIZE];
8812 u8 parity[NVRAM_SELFBOOT_DATA_SIZE]; 8809 u8 parity[NVRAM_SELFBOOT_DATA_SIZE];
@@ -8852,12 +8849,12 @@ static int tg3_test_nvram(struct tg3 *tp)
8852 8849
8853 /* Bootstrap checksum at offset 0x10 */ 8850 /* Bootstrap checksum at offset 0x10 */
8854 csum = calc_crc((unsigned char *) buf, 0x10); 8851 csum = calc_crc((unsigned char *) buf, 0x10);
8855 if(csum != cpu_to_le32(buf[0x10/4])) 8852 if(csum != le32_to_cpu(buf[0x10/4]))
8856 goto out; 8853 goto out;
8857 8854
8858 /* Manufacturing block starts at offset 0x74, checksum at 0xfc */ 8855 /* Manufacturing block starts at offset 0x74, checksum at 0xfc */
8859 csum = calc_crc((unsigned char *) &buf[0x74/4], 0x88); 8856 csum = calc_crc((unsigned char *) &buf[0x74/4], 0x88);
8860 if (csum != cpu_to_le32(buf[0xfc/4])) 8857 if (csum != le32_to_cpu(buf[0xfc/4]))
8861 goto out; 8858 goto out;
8862 8859
8863 err = 0; 8860 err = 0;
@@ -10171,6 +10168,15 @@ static int tg3_nvram_read(struct tg3 *tp, u32 offset, u32 *val)
10171 return ret; 10168 return ret;
10172} 10169}
10173 10170
10171static int tg3_nvram_read_le(struct tg3 *tp, u32 offset, __le32 *val)
10172{
10173 u32 v;
10174 int res = tg3_nvram_read(tp, offset, &v);
10175 if (!res)
10176 *val = cpu_to_le32(v);
10177 return res;
10178}
10179
10174static int tg3_nvram_read_swab(struct tg3 *tp, u32 offset, u32 *val) 10180static int tg3_nvram_read_swab(struct tg3 *tp, u32 offset, u32 *val)
10175{ 10181{
10176 int err; 10182 int err;
@@ -10188,13 +10194,14 @@ static int tg3_nvram_write_block_using_eeprom(struct tg3 *tp,
10188 u32 val; 10194 u32 val;
10189 10195
10190 for (i = 0; i < len; i += 4) { 10196 for (i = 0; i < len; i += 4) {
10191 u32 addr, data; 10197 u32 addr;
10198 __le32 data;
10192 10199
10193 addr = offset + i; 10200 addr = offset + i;
10194 10201
10195 memcpy(&data, buf + i, 4); 10202 memcpy(&data, buf + i, 4);
10196 10203
10197 tw32(GRC_EEPROM_DATA, cpu_to_le32(data)); 10204 tw32(GRC_EEPROM_DATA, le32_to_cpu(data));
10198 10205
10199 val = tr32(GRC_EEPROM_ADDR); 10206 val = tr32(GRC_EEPROM_ADDR);
10200 tw32(GRC_EEPROM_ADDR, val | EEPROM_ADDR_COMPLETE); 10207 tw32(GRC_EEPROM_ADDR, val | EEPROM_ADDR_COMPLETE);
@@ -10244,8 +10251,8 @@ static int tg3_nvram_write_block_unbuffered(struct tg3 *tp, u32 offset, u32 len,
10244 phy_addr = offset & ~pagemask; 10251 phy_addr = offset & ~pagemask;
10245 10252
10246 for (j = 0; j < pagesize; j += 4) { 10253 for (j = 0; j < pagesize; j += 4) {
10247 if ((ret = tg3_nvram_read(tp, phy_addr + j, 10254 if ((ret = tg3_nvram_read_le(tp, phy_addr + j,
10248 (u32 *) (tmp + j)))) 10255 (__le32 *) (tmp + j))))
10249 break; 10256 break;
10250 } 10257 }
10251 if (ret) 10258 if (ret)
@@ -10289,10 +10296,11 @@ static int tg3_nvram_write_block_unbuffered(struct tg3 *tp, u32 offset, u32 len,
10289 break; 10296 break;
10290 10297
10291 for (j = 0; j < pagesize; j += 4) { 10298 for (j = 0; j < pagesize; j += 4) {
10292 u32 data; 10299 __be32 data;
10293 10300
10294 data = *((u32 *) (tmp + j)); 10301 data = *((__be32 *) (tmp + j));
10295 tw32(NVRAM_WRDATA, cpu_to_be32(data)); 10302 /* swab32(le32_to_cpu(data)), actually */
10303 tw32(NVRAM_WRDATA, be32_to_cpu(data));
10296 10304
10297 tw32(NVRAM_ADDR, phy_addr + j); 10305 tw32(NVRAM_ADDR, phy_addr + j);
10298 10306
@@ -10326,10 +10334,11 @@ static int tg3_nvram_write_block_buffered(struct tg3 *tp, u32 offset, u32 len,
10326 int i, ret = 0; 10334 int i, ret = 0;
10327 10335
10328 for (i = 0; i < len; i += 4, offset += 4) { 10336 for (i = 0; i < len; i += 4, offset += 4) {
10329 u32 data, page_off, phy_addr, nvram_cmd; 10337 u32 page_off, phy_addr, nvram_cmd;
10338 __be32 data;
10330 10339
10331 memcpy(&data, buf + i, 4); 10340 memcpy(&data, buf + i, 4);
10332 tw32(NVRAM_WRDATA, cpu_to_be32(data)); 10341 tw32(NVRAM_WRDATA, be32_to_cpu(data));
10333 10342
10334 page_off = offset % tp->nvram_pagesize; 10343 page_off = offset % tp->nvram_pagesize;
10335 10344
@@ -10831,6 +10840,7 @@ static void __devinit tg3_read_partno(struct tg3 *tp)
10831 vpd_cap = pci_find_capability(tp->pdev, PCI_CAP_ID_VPD); 10840 vpd_cap = pci_find_capability(tp->pdev, PCI_CAP_ID_VPD);
10832 for (i = 0; i < 256; i += 4) { 10841 for (i = 0; i < 256; i += 4) {
10833 u32 tmp, j = 0; 10842 u32 tmp, j = 0;
10843 __le32 v;
10834 u16 tmp16; 10844 u16 tmp16;
10835 10845
10836 pci_write_config_word(tp->pdev, vpd_cap + PCI_VPD_ADDR, 10846 pci_write_config_word(tp->pdev, vpd_cap + PCI_VPD_ADDR,
@@ -10847,8 +10857,8 @@ static void __devinit tg3_read_partno(struct tg3 *tp)
10847 10857
10848 pci_read_config_dword(tp->pdev, vpd_cap + PCI_VPD_DATA, 10858 pci_read_config_dword(tp->pdev, vpd_cap + PCI_VPD_DATA,
10849 &tmp); 10859 &tmp);
10850 tmp = cpu_to_le32(tmp); 10860 v = cpu_to_le32(tmp);
10851 memcpy(&vpd_data[i], &tmp, 4); 10861 memcpy(&vpd_data[i], &v, 4);
10852 } 10862 }
10853 } 10863 }
10854 10864
@@ -10941,11 +10951,11 @@ static void __devinit tg3_read_fw_ver(struct tg3 *tp)
10941 10951
10942 offset = offset + ver_offset - start; 10952 offset = offset + ver_offset - start;
10943 for (i = 0; i < 16; i += 4) { 10953 for (i = 0; i < 16; i += 4) {
10944 if (tg3_nvram_read(tp, offset + i, &val)) 10954 __le32 v;
10955 if (tg3_nvram_read_le(tp, offset + i, &v))
10945 return; 10956 return;
10946 10957
10947 val = le32_to_cpu(val); 10958 memcpy(tp->fw_ver + i, &v, 4);
10948 memcpy(tp->fw_ver + i, &val, 4);
10949 } 10959 }
10950 10960
10951 if (!(tp->tg3_flags & TG3_FLAG_ENABLE_ASF) || 10961 if (!(tp->tg3_flags & TG3_FLAG_ENABLE_ASF) ||
@@ -10983,19 +10993,19 @@ static void __devinit tg3_read_fw_ver(struct tg3 *tp)
10983 tp->fw_ver[bcnt++] = ' '; 10993 tp->fw_ver[bcnt++] = ' ';
10984 10994
10985 for (i = 0; i < 4; i++) { 10995 for (i = 0; i < 4; i++) {
10986 if (tg3_nvram_read(tp, offset, &val)) 10996 __le32 v;
10997 if (tg3_nvram_read_le(tp, offset, &v))
10987 return; 10998 return;
10988 10999
10989 val = le32_to_cpu(val); 11000 offset += sizeof(v);
10990 offset += sizeof(val);
10991 11001
10992 if (bcnt > TG3_VER_SIZE - sizeof(val)) { 11002 if (bcnt > TG3_VER_SIZE - sizeof(v)) {
10993 memcpy(&tp->fw_ver[bcnt], &val, TG3_VER_SIZE - bcnt); 11003 memcpy(&tp->fw_ver[bcnt], &v, TG3_VER_SIZE - bcnt);
10994 break; 11004 break;
10995 } 11005 }
10996 11006
10997 memcpy(&tp->fw_ver[bcnt], &val, sizeof(val)); 11007 memcpy(&tp->fw_ver[bcnt], &v, sizeof(v));
10998 bcnt += sizeof(val); 11008 bcnt += sizeof(v);
10999 } 11009 }
11000 11010
11001 tp->fw_ver[TG3_VER_SIZE - 1] = 0; 11011 tp->fw_ver[TG3_VER_SIZE - 1] = 0;