diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2009-09-30 16:46:56 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2009-09-30 16:46:56 -0400 |
commit | e399835c349b7d8339775a004a86a492a444e230 (patch) | |
tree | 6e07f8d53e58a6442bf850097179d0202db4766c /drivers | |
parent | 9abf47f11b38f5ecf411b9a44437cad5016631ad (diff) | |
parent | da3a7a2b9f9776f2d44ed9a4b40eabeb17c6e886 (diff) |
Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus
* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus:
MIPS: Avoid spurious make includecheck message
MIPS: VPE: Get rid of BKL.
MIPS: VPE: Fix build after the credential changes a while ago.
MIPS: Excite: Get rid of BKL.
MIPS: Sibyte: Get rid of BKL.
MIPS: BCM63xx: Add PCMCIA & Cardbus support.
MIPS: MSP71xx: request_irq() failure ignored in msp_pcibios_config_access()
MIPS: Decrease size of au1xxx_dbdma_pm_regs[][]
MIPS: SMP: Inline arch_send_call_function_{single_ipi,ipi_mask}
MIPS: SMP: Fix build.
MIPS: MIPSxx SC: Avoid destructive invalidation on partial L2 cachelines.
MIPS: Sibyte: Fix compilation error.
MIPS: BCM1480: Re-apply patch lost due to bad resolution of merge conflict.
MIPS: BCM63xx: Add serial driver for bcm63xx integrated UART.
MIPS: Loongson2: Fix typo "enalbe" -> "enable"
MIPS: SMTC: Remove duplicate structure field initialization
MIPS: Remove duplicated #include
MIPS: BCM63xx: Remove duplicated #include
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/pcmcia/Kconfig | 4 | ||||
-rw-r--r-- | drivers/pcmcia/Makefile | 1 | ||||
-rw-r--r-- | drivers/pcmcia/bcm63xx_pcmcia.c | 536 | ||||
-rw-r--r-- | drivers/pcmcia/bcm63xx_pcmcia.h | 60 | ||||
-rw-r--r-- | drivers/serial/Kconfig | 19 | ||||
-rw-r--r-- | drivers/serial/Makefile | 1 | ||||
-rw-r--r-- | drivers/serial/bcm63xx_uart.c | 890 |
7 files changed, 1511 insertions, 0 deletions
diff --git a/drivers/pcmcia/Kconfig b/drivers/pcmcia/Kconfig index fbf965b31c14..17f38a781d47 100644 --- a/drivers/pcmcia/Kconfig +++ b/drivers/pcmcia/Kconfig | |||
@@ -192,6 +192,10 @@ config PCMCIA_AU1X00 | |||
192 | tristate "Au1x00 pcmcia support" | 192 | tristate "Au1x00 pcmcia support" |
193 | depends on SOC_AU1X00 && PCMCIA | 193 | depends on SOC_AU1X00 && PCMCIA |
194 | 194 | ||
195 | config PCMCIA_BCM63XX | ||
196 | tristate "bcm63xx pcmcia support" | ||
197 | depends on BCM63XX && PCMCIA | ||
198 | |||
195 | config PCMCIA_SA1100 | 199 | config PCMCIA_SA1100 |
196 | tristate "SA1100 support" | 200 | tristate "SA1100 support" |
197 | depends on ARM && ARCH_SA1100 && PCMCIA | 201 | depends on ARM && ARCH_SA1100 && PCMCIA |
diff --git a/drivers/pcmcia/Makefile b/drivers/pcmcia/Makefile index 3247828aa203..a03a38acd77d 100644 --- a/drivers/pcmcia/Makefile +++ b/drivers/pcmcia/Makefile | |||
@@ -27,6 +27,7 @@ obj-$(CONFIG_PCMCIA_SA1111) += sa11xx_core.o sa1111_cs.o | |||
27 | obj-$(CONFIG_M32R_PCC) += m32r_pcc.o | 27 | obj-$(CONFIG_M32R_PCC) += m32r_pcc.o |
28 | obj-$(CONFIG_M32R_CFC) += m32r_cfc.o | 28 | obj-$(CONFIG_M32R_CFC) += m32r_cfc.o |
29 | obj-$(CONFIG_PCMCIA_AU1X00) += au1x00_ss.o | 29 | obj-$(CONFIG_PCMCIA_AU1X00) += au1x00_ss.o |
30 | obj-$(CONFIG_PCMCIA_BCM63XX) += bcm63xx_pcmcia.o | ||
30 | obj-$(CONFIG_PCMCIA_VRC4171) += vrc4171_card.o | 31 | obj-$(CONFIG_PCMCIA_VRC4171) += vrc4171_card.o |
31 | obj-$(CONFIG_PCMCIA_VRC4173) += vrc4173_cardu.o | 32 | obj-$(CONFIG_PCMCIA_VRC4173) += vrc4173_cardu.o |
32 | obj-$(CONFIG_OMAP_CF) += omap_cf.o | 33 | obj-$(CONFIG_OMAP_CF) += omap_cf.o |
diff --git a/drivers/pcmcia/bcm63xx_pcmcia.c b/drivers/pcmcia/bcm63xx_pcmcia.c new file mode 100644 index 000000000000..bc88a3b19bb3 --- /dev/null +++ b/drivers/pcmcia/bcm63xx_pcmcia.c | |||
@@ -0,0 +1,536 @@ | |||
1 | /* | ||
2 | * This file is subject to the terms and conditions of the GNU General Public | ||
3 | * License. See the file "COPYING" in the main directory of this archive | ||
4 | * for more details. | ||
5 | * | ||
6 | * Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr> | ||
7 | */ | ||
8 | |||
9 | #include <linux/kernel.h> | ||
10 | #include <linux/module.h> | ||
11 | #include <linux/ioport.h> | ||
12 | #include <linux/timer.h> | ||
13 | #include <linux/platform_device.h> | ||
14 | #include <linux/delay.h> | ||
15 | #include <linux/pci.h> | ||
16 | #include <linux/gpio.h> | ||
17 | |||
18 | #include <bcm63xx_regs.h> | ||
19 | #include <bcm63xx_io.h> | ||
20 | #include "bcm63xx_pcmcia.h" | ||
21 | |||
22 | #define PFX "bcm63xx_pcmcia: " | ||
23 | |||
24 | #ifdef CONFIG_CARDBUS | ||
25 | /* if cardbus is used, platform device needs reference to actual pci | ||
26 | * device */ | ||
27 | static struct pci_dev *bcm63xx_cb_dev; | ||
28 | #endif | ||
29 | |||
30 | /* | ||
31 | * read/write helper for pcmcia regs | ||
32 | */ | ||
33 | static inline u32 pcmcia_readl(struct bcm63xx_pcmcia_socket *skt, u32 off) | ||
34 | { | ||
35 | return bcm_readl(skt->base + off); | ||
36 | } | ||
37 | |||
38 | static inline void pcmcia_writel(struct bcm63xx_pcmcia_socket *skt, | ||
39 | u32 val, u32 off) | ||
40 | { | ||
41 | bcm_writel(val, skt->base + off); | ||
42 | } | ||
43 | |||
44 | /* | ||
45 | * This callback should (re-)initialise the socket, turn on status | ||
46 | * interrupts and PCMCIA bus, and wait for power to stabilise so that | ||
47 | * the card status signals report correctly. | ||
48 | * | ||
49 | * Hardware cannot do that. | ||
50 | */ | ||
51 | static int bcm63xx_pcmcia_sock_init(struct pcmcia_socket *sock) | ||
52 | { | ||
53 | return 0; | ||
54 | } | ||
55 | |||
56 | /* | ||
57 | * This callback should remove power on the socket, disable IRQs from | ||
58 | * the card, turn off status interrupts, and disable the PCMCIA bus. | ||
59 | * | ||
60 | * Hardware cannot do that. | ||
61 | */ | ||
62 | static int bcm63xx_pcmcia_suspend(struct pcmcia_socket *sock) | ||
63 | { | ||
64 | return 0; | ||
65 | } | ||
66 | |||
67 | /* | ||
68 | * Implements the set_socket() operation for the in-kernel PCMCIA | ||
69 | * service (formerly SS_SetSocket in Card Services). We more or | ||
70 | * less punt all of this work and let the kernel handle the details | ||
71 | * of power configuration, reset, &c. We also record the value of | ||
72 | * `state' in order to regurgitate it to the PCMCIA core later. | ||
73 | */ | ||
74 | static int bcm63xx_pcmcia_set_socket(struct pcmcia_socket *sock, | ||
75 | socket_state_t *state) | ||
76 | { | ||
77 | struct bcm63xx_pcmcia_socket *skt; | ||
78 | unsigned long flags; | ||
79 | u32 val; | ||
80 | |||
81 | skt = sock->driver_data; | ||
82 | |||
83 | spin_lock_irqsave(&skt->lock, flags); | ||
84 | |||
85 | /* note: hardware cannot control socket power, so we will | ||
86 | * always report SS_POWERON */ | ||
87 | |||
88 | /* apply socket reset */ | ||
89 | val = pcmcia_readl(skt, PCMCIA_C1_REG); | ||
90 | if (state->flags & SS_RESET) | ||
91 | val |= PCMCIA_C1_RESET_MASK; | ||
92 | else | ||
93 | val &= ~PCMCIA_C1_RESET_MASK; | ||
94 | |||
95 | /* reverse reset logic for cardbus card */ | ||
96 | if (skt->card_detected && (skt->card_type & CARD_CARDBUS)) | ||
97 | val ^= PCMCIA_C1_RESET_MASK; | ||
98 | |||
99 | pcmcia_writel(skt, val, PCMCIA_C1_REG); | ||
100 | |||
101 | /* keep requested state for event reporting */ | ||
102 | skt->requested_state = *state; | ||
103 | |||
104 | spin_unlock_irqrestore(&skt->lock, flags); | ||
105 | |||
106 | return 0; | ||
107 | } | ||
108 | |||
109 | /* | ||
110 | * identity cardtype from VS[12] input, CD[12] input while only VS2 is | ||
111 | * floating, and CD[12] input while only VS1 is floating | ||
112 | */ | ||
113 | enum { | ||
114 | IN_VS1 = (1 << 0), | ||
115 | IN_VS2 = (1 << 1), | ||
116 | IN_CD1_VS2H = (1 << 2), | ||
117 | IN_CD2_VS2H = (1 << 3), | ||
118 | IN_CD1_VS1H = (1 << 4), | ||
119 | IN_CD2_VS1H = (1 << 5), | ||
120 | }; | ||
121 | |||
122 | static const u8 vscd_to_cardtype[] = { | ||
123 | |||
124 | /* VS1 float, VS2 float */ | ||
125 | [IN_VS1 | IN_VS2] = (CARD_PCCARD | CARD_5V), | ||
126 | |||
127 | /* VS1 grounded, VS2 float */ | ||
128 | [IN_VS2] = (CARD_PCCARD | CARD_5V | CARD_3V), | ||
129 | |||
130 | /* VS1 grounded, VS2 grounded */ | ||
131 | [0] = (CARD_PCCARD | CARD_5V | CARD_3V | CARD_XV), | ||
132 | |||
133 | /* VS1 tied to CD1, VS2 float */ | ||
134 | [IN_VS1 | IN_VS2 | IN_CD1_VS1H] = (CARD_CARDBUS | CARD_3V), | ||
135 | |||
136 | /* VS1 grounded, VS2 tied to CD2 */ | ||
137 | [IN_VS2 | IN_CD2_VS2H] = (CARD_CARDBUS | CARD_3V | CARD_XV), | ||
138 | |||
139 | /* VS1 tied to CD2, VS2 grounded */ | ||
140 | [IN_VS1 | IN_CD2_VS1H] = (CARD_CARDBUS | CARD_3V | CARD_XV | CARD_YV), | ||
141 | |||
142 | /* VS1 float, VS2 grounded */ | ||
143 | [IN_VS1] = (CARD_PCCARD | CARD_XV), | ||
144 | |||
145 | /* VS1 float, VS2 tied to CD2 */ | ||
146 | [IN_VS1 | IN_VS2 | IN_CD2_VS2H] = (CARD_CARDBUS | CARD_3V), | ||
147 | |||
148 | /* VS1 float, VS2 tied to CD1 */ | ||
149 | [IN_VS1 | IN_VS2 | IN_CD1_VS2H] = (CARD_CARDBUS | CARD_XV | CARD_YV), | ||
150 | |||
151 | /* VS1 tied to CD2, VS2 float */ | ||
152 | [IN_VS1 | IN_VS2 | IN_CD2_VS1H] = (CARD_CARDBUS | CARD_YV), | ||
153 | |||
154 | /* VS2 grounded, VS1 is tied to CD1, CD2 is grounded */ | ||
155 | [IN_VS1 | IN_CD1_VS1H] = 0, /* ignore cardbay */ | ||
156 | }; | ||
157 | |||
158 | /* | ||
159 | * poll hardware to check card insertion status | ||
160 | */ | ||
161 | static unsigned int __get_socket_status(struct bcm63xx_pcmcia_socket *skt) | ||
162 | { | ||
163 | unsigned int stat; | ||
164 | u32 val; | ||
165 | |||
166 | stat = 0; | ||
167 | |||
168 | /* check CD for card presence */ | ||
169 | val = pcmcia_readl(skt, PCMCIA_C1_REG); | ||
170 | |||
171 | if (!(val & PCMCIA_C1_CD1_MASK) && !(val & PCMCIA_C1_CD2_MASK)) | ||
172 | stat |= SS_DETECT; | ||
173 | |||
174 | /* if new insertion, detect cardtype */ | ||
175 | if ((stat & SS_DETECT) && !skt->card_detected) { | ||
176 | unsigned int stat = 0; | ||
177 | |||
178 | /* float VS1, float VS2 */ | ||
179 | val |= PCMCIA_C1_VS1OE_MASK; | ||
180 | val |= PCMCIA_C1_VS2OE_MASK; | ||
181 | pcmcia_writel(skt, val, PCMCIA_C1_REG); | ||
182 | |||
183 | /* wait for output to stabilize and read VS[12] */ | ||
184 | udelay(10); | ||
185 | val = pcmcia_readl(skt, PCMCIA_C1_REG); | ||
186 | stat |= (val & PCMCIA_C1_VS1_MASK) ? IN_VS1 : 0; | ||
187 | stat |= (val & PCMCIA_C1_VS2_MASK) ? IN_VS2 : 0; | ||
188 | |||
189 | /* drive VS1 low, float VS2 */ | ||
190 | val &= ~PCMCIA_C1_VS1OE_MASK; | ||
191 | val |= PCMCIA_C1_VS2OE_MASK; | ||
192 | pcmcia_writel(skt, val, PCMCIA_C1_REG); | ||
193 | |||
194 | /* wait for output to stabilize and read CD[12] */ | ||
195 | udelay(10); | ||
196 | val = pcmcia_readl(skt, PCMCIA_C1_REG); | ||
197 | stat |= (val & PCMCIA_C1_CD1_MASK) ? IN_CD1_VS2H : 0; | ||
198 | stat |= (val & PCMCIA_C1_CD2_MASK) ? IN_CD2_VS2H : 0; | ||
199 | |||
200 | /* float VS1, drive VS2 low */ | ||
201 | val |= PCMCIA_C1_VS1OE_MASK; | ||
202 | val &= ~PCMCIA_C1_VS2OE_MASK; | ||
203 | pcmcia_writel(skt, val, PCMCIA_C1_REG); | ||
204 | |||
205 | /* wait for output to stabilize and read CD[12] */ | ||
206 | udelay(10); | ||
207 | val = pcmcia_readl(skt, PCMCIA_C1_REG); | ||
208 | stat |= (val & PCMCIA_C1_CD1_MASK) ? IN_CD1_VS1H : 0; | ||
209 | stat |= (val & PCMCIA_C1_CD2_MASK) ? IN_CD2_VS1H : 0; | ||
210 | |||
211 | /* guess cardtype from all this */ | ||
212 | skt->card_type = vscd_to_cardtype[stat]; | ||
213 | if (!skt->card_type) | ||
214 | dev_err(&skt->socket.dev, "unsupported card type\n"); | ||
215 | |||
216 | /* drive both VS pin to 0 again */ | ||
217 | val &= ~(PCMCIA_C1_VS1OE_MASK | PCMCIA_C1_VS2OE_MASK); | ||
218 | |||
219 | /* enable correct logic */ | ||
220 | val &= ~(PCMCIA_C1_EN_PCMCIA_MASK | PCMCIA_C1_EN_CARDBUS_MASK); | ||
221 | if (skt->card_type & CARD_PCCARD) | ||
222 | val |= PCMCIA_C1_EN_PCMCIA_MASK; | ||
223 | else | ||
224 | val |= PCMCIA_C1_EN_CARDBUS_MASK; | ||
225 | |||
226 | pcmcia_writel(skt, val, PCMCIA_C1_REG); | ||
227 | } | ||
228 | skt->card_detected = (stat & SS_DETECT) ? 1 : 0; | ||
229 | |||
230 | /* report card type/voltage */ | ||
231 | if (skt->card_type & CARD_CARDBUS) | ||
232 | stat |= SS_CARDBUS; | ||
233 | if (skt->card_type & CARD_3V) | ||
234 | stat |= SS_3VCARD; | ||
235 | if (skt->card_type & CARD_XV) | ||
236 | stat |= SS_XVCARD; | ||
237 | stat |= SS_POWERON; | ||
238 | |||
239 | if (gpio_get_value(skt->pd->ready_gpio)) | ||
240 | stat |= SS_READY; | ||
241 | |||
242 | return stat; | ||
243 | } | ||
244 | |||
245 | /* | ||
246 | * core request to get current socket status | ||
247 | */ | ||
248 | static int bcm63xx_pcmcia_get_status(struct pcmcia_socket *sock, | ||
249 | unsigned int *status) | ||
250 | { | ||
251 | struct bcm63xx_pcmcia_socket *skt; | ||
252 | |||
253 | skt = sock->driver_data; | ||
254 | |||
255 | spin_lock_bh(&skt->lock); | ||
256 | *status = __get_socket_status(skt); | ||
257 | spin_unlock_bh(&skt->lock); | ||
258 | |||
259 | return 0; | ||
260 | } | ||
261 | |||
262 | /* | ||
263 | * socket polling timer callback | ||
264 | */ | ||
265 | static void bcm63xx_pcmcia_poll(unsigned long data) | ||
266 | { | ||
267 | struct bcm63xx_pcmcia_socket *skt; | ||
268 | unsigned int stat, events; | ||
269 | |||
270 | skt = (struct bcm63xx_pcmcia_socket *)data; | ||
271 | |||
272 | spin_lock_bh(&skt->lock); | ||
273 | |||
274 | stat = __get_socket_status(skt); | ||
275 | |||
276 | /* keep only changed bits, and mask with required one from the | ||
277 | * core */ | ||
278 | events = (stat ^ skt->old_status) & skt->requested_state.csc_mask; | ||
279 | skt->old_status = stat; | ||
280 | spin_unlock_bh(&skt->lock); | ||
281 | |||
282 | if (events) | ||
283 | pcmcia_parse_events(&skt->socket, events); | ||
284 | |||
285 | mod_timer(&skt->timer, | ||
286 | jiffies + msecs_to_jiffies(BCM63XX_PCMCIA_POLL_RATE)); | ||
287 | } | ||
288 | |||
289 | static int bcm63xx_pcmcia_set_io_map(struct pcmcia_socket *sock, | ||
290 | struct pccard_io_map *map) | ||
291 | { | ||
292 | /* this doesn't seem to be called by pcmcia layer if static | ||
293 | * mapping is used */ | ||
294 | return 0; | ||
295 | } | ||
296 | |||
297 | static int bcm63xx_pcmcia_set_mem_map(struct pcmcia_socket *sock, | ||
298 | struct pccard_mem_map *map) | ||
299 | { | ||
300 | struct bcm63xx_pcmcia_socket *skt; | ||
301 | struct resource *res; | ||
302 | |||
303 | skt = sock->driver_data; | ||
304 | if (map->flags & MAP_ATTRIB) | ||
305 | res = skt->attr_res; | ||
306 | else | ||
307 | res = skt->common_res; | ||
308 | |||
309 | map->static_start = res->start + map->card_start; | ||
310 | return 0; | ||
311 | } | ||
312 | |||
313 | static struct pccard_operations bcm63xx_pcmcia_operations = { | ||
314 | .init = bcm63xx_pcmcia_sock_init, | ||
315 | .suspend = bcm63xx_pcmcia_suspend, | ||
316 | .get_status = bcm63xx_pcmcia_get_status, | ||
317 | .set_socket = bcm63xx_pcmcia_set_socket, | ||
318 | .set_io_map = bcm63xx_pcmcia_set_io_map, | ||
319 | .set_mem_map = bcm63xx_pcmcia_set_mem_map, | ||
320 | }; | ||
321 | |||
322 | /* | ||
323 | * register pcmcia socket to core | ||
324 | */ | ||
325 | static int __devinit bcm63xx_drv_pcmcia_probe(struct platform_device *pdev) | ||
326 | { | ||
327 | struct bcm63xx_pcmcia_socket *skt; | ||
328 | struct pcmcia_socket *sock; | ||
329 | struct resource *res, *irq_res; | ||
330 | unsigned int regmem_size = 0, iomem_size = 0; | ||
331 | u32 val; | ||
332 | int ret; | ||
333 | |||
334 | skt = kzalloc(sizeof(*skt), GFP_KERNEL); | ||
335 | if (!skt) | ||
336 | return -ENOMEM; | ||
337 | spin_lock_init(&skt->lock); | ||
338 | sock = &skt->socket; | ||
339 | sock->driver_data = skt; | ||
340 | |||
341 | /* make sure we have all resources we need */ | ||
342 | skt->common_res = platform_get_resource(pdev, IORESOURCE_MEM, 1); | ||
343 | skt->attr_res = platform_get_resource(pdev, IORESOURCE_MEM, 2); | ||
344 | irq_res = platform_get_resource(pdev, IORESOURCE_IRQ, 0); | ||
345 | skt->pd = pdev->dev.platform_data; | ||
346 | if (!skt->common_res || !skt->attr_res || !irq_res || !skt->pd) { | ||
347 | ret = -EINVAL; | ||
348 | goto err; | ||
349 | } | ||
350 | |||
351 | /* remap pcmcia registers */ | ||
352 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | ||
353 | regmem_size = resource_size(res); | ||
354 | if (!request_mem_region(res->start, regmem_size, "bcm63xx_pcmcia")) { | ||
355 | ret = -EINVAL; | ||
356 | goto err; | ||
357 | } | ||
358 | skt->reg_res = res; | ||
359 | |||
360 | skt->base = ioremap(res->start, regmem_size); | ||
361 | if (!skt->base) { | ||
362 | ret = -ENOMEM; | ||
363 | goto err; | ||
364 | } | ||
365 | |||
366 | /* remap io registers */ | ||
367 | res = platform_get_resource(pdev, IORESOURCE_MEM, 3); | ||
368 | iomem_size = resource_size(res); | ||
369 | skt->io_base = ioremap(res->start, iomem_size); | ||
370 | if (!skt->io_base) { | ||
371 | ret = -ENOMEM; | ||
372 | goto err; | ||
373 | } | ||
374 | |||
375 | /* resources are static */ | ||
376 | sock->resource_ops = &pccard_static_ops; | ||
377 | sock->ops = &bcm63xx_pcmcia_operations; | ||
378 | sock->owner = THIS_MODULE; | ||
379 | sock->dev.parent = &pdev->dev; | ||
380 | sock->features = SS_CAP_STATIC_MAP | SS_CAP_PCCARD; | ||
381 | sock->io_offset = (unsigned long)skt->io_base; | ||
382 | sock->pci_irq = irq_res->start; | ||
383 | |||
384 | #ifdef CONFIG_CARDBUS | ||
385 | sock->cb_dev = bcm63xx_cb_dev; | ||
386 | if (bcm63xx_cb_dev) | ||
387 | sock->features |= SS_CAP_CARDBUS; | ||
388 | #endif | ||
389 | |||
390 | /* assume common & attribute memory have the same size */ | ||
391 | sock->map_size = resource_size(skt->common_res); | ||
392 | |||
393 | /* initialize polling timer */ | ||
394 | setup_timer(&skt->timer, bcm63xx_pcmcia_poll, (unsigned long)skt); | ||
395 | |||
396 | /* initialize pcmcia control register, drive VS[12] to 0, | ||
397 | * leave CB IDSEL to the old value since it is set by the PCI | ||
398 | * layer */ | ||
399 | val = pcmcia_readl(skt, PCMCIA_C1_REG); | ||
400 | val &= PCMCIA_C1_CBIDSEL_MASK; | ||
401 | val |= PCMCIA_C1_EN_PCMCIA_GPIO_MASK; | ||
402 | pcmcia_writel(skt, val, PCMCIA_C1_REG); | ||
403 | |||
404 | /* | ||
405 | * Hardware has only one set of timings registers, not one for | ||
406 | * each memory access type, so we configure them for the | ||
407 | * slowest one: attribute memory. | ||
408 | */ | ||
409 | val = PCMCIA_C2_DATA16_MASK; | ||
410 | val |= 10 << PCMCIA_C2_RWCOUNT_SHIFT; | ||
411 | val |= 6 << PCMCIA_C2_INACTIVE_SHIFT; | ||
412 | val |= 3 << PCMCIA_C2_SETUP_SHIFT; | ||
413 | val |= 3 << PCMCIA_C2_HOLD_SHIFT; | ||
414 | pcmcia_writel(skt, val, PCMCIA_C2_REG); | ||
415 | |||
416 | ret = pcmcia_register_socket(sock); | ||
417 | if (ret) | ||
418 | goto err; | ||
419 | |||
420 | /* start polling socket */ | ||
421 | mod_timer(&skt->timer, | ||
422 | jiffies + msecs_to_jiffies(BCM63XX_PCMCIA_POLL_RATE)); | ||
423 | |||
424 | platform_set_drvdata(pdev, skt); | ||
425 | return 0; | ||
426 | |||
427 | err: | ||
428 | if (skt->io_base) | ||
429 | iounmap(skt->io_base); | ||
430 | if (skt->base) | ||
431 | iounmap(skt->base); | ||
432 | if (skt->reg_res) | ||
433 | release_mem_region(skt->reg_res->start, regmem_size); | ||
434 | kfree(skt); | ||
435 | return ret; | ||
436 | } | ||
437 | |||
438 | static int __devexit bcm63xx_drv_pcmcia_remove(struct platform_device *pdev) | ||
439 | { | ||
440 | struct bcm63xx_pcmcia_socket *skt; | ||
441 | struct resource *res; | ||
442 | |||
443 | skt = platform_get_drvdata(pdev); | ||
444 | del_timer_sync(&skt->timer); | ||
445 | iounmap(skt->base); | ||
446 | iounmap(skt->io_base); | ||
447 | res = skt->reg_res; | ||
448 | release_mem_region(res->start, resource_size(res)); | ||
449 | kfree(skt); | ||
450 | return 0; | ||
451 | } | ||
452 | |||
453 | struct platform_driver bcm63xx_pcmcia_driver = { | ||
454 | .probe = bcm63xx_drv_pcmcia_probe, | ||
455 | .remove = __devexit_p(bcm63xx_drv_pcmcia_remove), | ||
456 | .driver = { | ||
457 | .name = "bcm63xx_pcmcia", | ||
458 | .owner = THIS_MODULE, | ||
459 | }, | ||
460 | }; | ||
461 | |||
462 | #ifdef CONFIG_CARDBUS | ||
463 | static int __devinit bcm63xx_cb_probe(struct pci_dev *dev, | ||
464 | const struct pci_device_id *id) | ||
465 | { | ||
466 | /* keep pci device */ | ||
467 | bcm63xx_cb_dev = dev; | ||
468 | return platform_driver_register(&bcm63xx_pcmcia_driver); | ||
469 | } | ||
470 | |||
471 | static void __devexit bcm63xx_cb_exit(struct pci_dev *dev) | ||
472 | { | ||
473 | platform_driver_unregister(&bcm63xx_pcmcia_driver); | ||
474 | bcm63xx_cb_dev = NULL; | ||
475 | } | ||
476 | |||
477 | static struct pci_device_id bcm63xx_cb_table[] = { | ||
478 | { | ||
479 | .vendor = PCI_VENDOR_ID_BROADCOM, | ||
480 | .device = BCM6348_CPU_ID, | ||
481 | .subvendor = PCI_VENDOR_ID_BROADCOM, | ||
482 | .subdevice = PCI_ANY_ID, | ||
483 | .class = PCI_CLASS_BRIDGE_CARDBUS << 8, | ||
484 | .class_mask = ~0, | ||
485 | }, | ||
486 | |||
487 | { | ||
488 | .vendor = PCI_VENDOR_ID_BROADCOM, | ||
489 | .device = BCM6358_CPU_ID, | ||
490 | .subvendor = PCI_VENDOR_ID_BROADCOM, | ||
491 | .subdevice = PCI_ANY_ID, | ||
492 | .class = PCI_CLASS_BRIDGE_CARDBUS << 8, | ||
493 | .class_mask = ~0, | ||
494 | }, | ||
495 | |||
496 | { }, | ||
497 | }; | ||
498 | |||
499 | MODULE_DEVICE_TABLE(pci, bcm63xx_cb_table); | ||
500 | |||
501 | static struct pci_driver bcm63xx_cardbus_driver = { | ||
502 | .name = "bcm63xx_cardbus", | ||
503 | .id_table = bcm63xx_cb_table, | ||
504 | .probe = bcm63xx_cb_probe, | ||
505 | .remove = __devexit_p(bcm63xx_cb_exit), | ||
506 | }; | ||
507 | #endif | ||
508 | |||
509 | /* | ||
510 | * if cardbus support is enabled, register our platform device after | ||
511 | * our fake cardbus bridge has been registered | ||
512 | */ | ||
513 | static int __init bcm63xx_pcmcia_init(void) | ||
514 | { | ||
515 | #ifdef CONFIG_CARDBUS | ||
516 | return pci_register_driver(&bcm63xx_cardbus_driver); | ||
517 | #else | ||
518 | return platform_driver_register(&bcm63xx_pcmcia_driver); | ||
519 | #endif | ||
520 | } | ||
521 | |||
522 | static void __exit bcm63xx_pcmcia_exit(void) | ||
523 | { | ||
524 | #ifdef CONFIG_CARDBUS | ||
525 | return pci_unregister_driver(&bcm63xx_cardbus_driver); | ||
526 | #else | ||
527 | platform_driver_unregister(&bcm63xx_pcmcia_driver); | ||
528 | #endif | ||
529 | } | ||
530 | |||
531 | module_init(bcm63xx_pcmcia_init); | ||
532 | module_exit(bcm63xx_pcmcia_exit); | ||
533 | |||
534 | MODULE_LICENSE("GPL"); | ||
535 | MODULE_AUTHOR("Maxime Bizon <mbizon@freebox.fr>"); | ||
536 | MODULE_DESCRIPTION("Linux PCMCIA Card Services: bcm63xx Socket Controller"); | ||
diff --git a/drivers/pcmcia/bcm63xx_pcmcia.h b/drivers/pcmcia/bcm63xx_pcmcia.h new file mode 100644 index 000000000000..ed957399d863 --- /dev/null +++ b/drivers/pcmcia/bcm63xx_pcmcia.h | |||
@@ -0,0 +1,60 @@ | |||
1 | #ifndef BCM63XX_PCMCIA_H_ | ||
2 | #define BCM63XX_PCMCIA_H_ | ||
3 | |||
4 | #include <linux/types.h> | ||
5 | #include <linux/timer.h> | ||
6 | #include <pcmcia/ss.h> | ||
7 | #include <bcm63xx_dev_pcmcia.h> | ||
8 | |||
9 | /* socket polling rate in ms */ | ||
10 | #define BCM63XX_PCMCIA_POLL_RATE 500 | ||
11 | |||
12 | enum { | ||
13 | CARD_CARDBUS = (1 << 0), | ||
14 | CARD_PCCARD = (1 << 1), | ||
15 | CARD_5V = (1 << 2), | ||
16 | CARD_3V = (1 << 3), | ||
17 | CARD_XV = (1 << 4), | ||
18 | CARD_YV = (1 << 5), | ||
19 | }; | ||
20 | |||
21 | struct bcm63xx_pcmcia_socket { | ||
22 | struct pcmcia_socket socket; | ||
23 | |||
24 | /* platform specific data */ | ||
25 | struct bcm63xx_pcmcia_platform_data *pd; | ||
26 | |||
27 | /* all regs access are protected by this spinlock */ | ||
28 | spinlock_t lock; | ||
29 | |||
30 | /* pcmcia registers resource */ | ||
31 | struct resource *reg_res; | ||
32 | |||
33 | /* base remapped address of registers */ | ||
34 | void __iomem *base; | ||
35 | |||
36 | /* whether a card is detected at the moment */ | ||
37 | int card_detected; | ||
38 | |||
39 | /* type of detected card (mask of above enum) */ | ||
40 | u8 card_type; | ||
41 | |||
42 | /* keep last socket status to implement event reporting */ | ||
43 | unsigned int old_status; | ||
44 | |||
45 | /* backup of requested socket state */ | ||
46 | socket_state_t requested_state; | ||
47 | |||
48 | /* timer used for socket status polling */ | ||
49 | struct timer_list timer; | ||
50 | |||
51 | /* attribute/common memory resources */ | ||
52 | struct resource *attr_res; | ||
53 | struct resource *common_res; | ||
54 | struct resource *io_res; | ||
55 | |||
56 | /* base address of io memory */ | ||
57 | void __iomem *io_base; | ||
58 | }; | ||
59 | |||
60 | #endif /* BCM63XX_PCMCIA_H_ */ | ||
diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig index 03422ce878cf..e70712044a7e 100644 --- a/drivers/serial/Kconfig +++ b/drivers/serial/Kconfig | |||
@@ -1458,4 +1458,23 @@ config SERIAL_TIMBERDALE | |||
1458 | ---help--- | 1458 | ---help--- |
1459 | Add support for UART controller on timberdale. | 1459 | Add support for UART controller on timberdale. |
1460 | 1460 | ||
1461 | config SERIAL_BCM63XX | ||
1462 | tristate "bcm63xx serial port support" | ||
1463 | select SERIAL_CORE | ||
1464 | depends on BCM63XX | ||
1465 | help | ||
1466 | If you have a bcm63xx CPU, you can enable its onboard | ||
1467 | serial port by enabling this options. | ||
1468 | |||
1469 | To compile this driver as a module, choose M here: the | ||
1470 | module will be called bcm963xx_uart. | ||
1471 | |||
1472 | config SERIAL_BCM63XX_CONSOLE | ||
1473 | bool "Console on bcm63xx serial port" | ||
1474 | depends on SERIAL_BCM63XX=y | ||
1475 | select SERIAL_CORE_CONSOLE | ||
1476 | help | ||
1477 | If you have enabled the serial port on the bcm63xx CPU | ||
1478 | you can make it the console by answering Y to this option. | ||
1479 | |||
1461 | endmenu | 1480 | endmenu |
diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile index 97f6fcc8b432..d21d5dd5d048 100644 --- a/drivers/serial/Makefile +++ b/drivers/serial/Makefile | |||
@@ -34,6 +34,7 @@ obj-$(CONFIG_SERIAL_CLPS711X) += clps711x.o | |||
34 | obj-$(CONFIG_SERIAL_PXA) += pxa.o | 34 | obj-$(CONFIG_SERIAL_PXA) += pxa.o |
35 | obj-$(CONFIG_SERIAL_PNX8XXX) += pnx8xxx_uart.o | 35 | obj-$(CONFIG_SERIAL_PNX8XXX) += pnx8xxx_uart.o |
36 | obj-$(CONFIG_SERIAL_SA1100) += sa1100.o | 36 | obj-$(CONFIG_SERIAL_SA1100) += sa1100.o |
37 | obj-$(CONFIG_SERIAL_BCM63XX) += bcm63xx_uart.o | ||
37 | obj-$(CONFIG_SERIAL_BFIN) += bfin_5xx.o | 38 | obj-$(CONFIG_SERIAL_BFIN) += bfin_5xx.o |
38 | obj-$(CONFIG_SERIAL_BFIN_SPORT) += bfin_sport_uart.o | 39 | obj-$(CONFIG_SERIAL_BFIN_SPORT) += bfin_sport_uart.o |
39 | obj-$(CONFIG_SERIAL_SAMSUNG) += samsung.o | 40 | obj-$(CONFIG_SERIAL_SAMSUNG) += samsung.o |
diff --git a/drivers/serial/bcm63xx_uart.c b/drivers/serial/bcm63xx_uart.c new file mode 100644 index 000000000000..beddaa6e9069 --- /dev/null +++ b/drivers/serial/bcm63xx_uart.c | |||
@@ -0,0 +1,890 @@ | |||
1 | /* | ||
2 | * This file is subject to the terms and conditions of the GNU General Public | ||
3 | * License. See the file "COPYING" in the main directory of this archive | ||
4 | * for more details. | ||
5 | * | ||
6 | * Derived from many drivers using generic_serial interface. | ||
7 | * | ||
8 | * Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr> | ||
9 | * | ||
10 | * Serial driver for BCM63xx integrated UART. | ||
11 | * | ||
12 | * Hardware flow control was _not_ tested since I only have RX/TX on | ||
13 | * my board. | ||
14 | */ | ||
15 | |||
16 | #if defined(CONFIG_SERIAL_BCM63XX_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) | ||
17 | #define SUPPORT_SYSRQ | ||
18 | #endif | ||
19 | |||
20 | #include <linux/kernel.h> | ||
21 | #include <linux/platform_device.h> | ||
22 | #include <linux/init.h> | ||
23 | #include <linux/delay.h> | ||
24 | #include <linux/module.h> | ||
25 | #include <linux/console.h> | ||
26 | #include <linux/clk.h> | ||
27 | #include <linux/tty.h> | ||
28 | #include <linux/tty_flip.h> | ||
29 | #include <linux/sysrq.h> | ||
30 | #include <linux/serial.h> | ||
31 | #include <linux/serial_core.h> | ||
32 | |||
33 | #include <bcm63xx_clk.h> | ||
34 | #include <bcm63xx_irq.h> | ||
35 | #include <bcm63xx_regs.h> | ||
36 | #include <bcm63xx_io.h> | ||
37 | |||
38 | #define BCM63XX_NR_UARTS 1 | ||
39 | |||
40 | static struct uart_port ports[BCM63XX_NR_UARTS]; | ||
41 | |||
42 | /* | ||
43 | * rx interrupt mask / stat | ||
44 | * | ||
45 | * mask: | ||
46 | * - rx fifo full | ||
47 | * - rx fifo above threshold | ||
48 | * - rx fifo not empty for too long | ||
49 | */ | ||
50 | #define UART_RX_INT_MASK (UART_IR_MASK(UART_IR_RXOVER) | \ | ||
51 | UART_IR_MASK(UART_IR_RXTHRESH) | \ | ||
52 | UART_IR_MASK(UART_IR_RXTIMEOUT)) | ||
53 | |||
54 | #define UART_RX_INT_STAT (UART_IR_STAT(UART_IR_RXOVER) | \ | ||
55 | UART_IR_STAT(UART_IR_RXTHRESH) | \ | ||
56 | UART_IR_STAT(UART_IR_RXTIMEOUT)) | ||
57 | |||
58 | /* | ||
59 | * tx interrupt mask / stat | ||
60 | * | ||
61 | * mask: | ||
62 | * - tx fifo empty | ||
63 | * - tx fifo below threshold | ||
64 | */ | ||
65 | #define UART_TX_INT_MASK (UART_IR_MASK(UART_IR_TXEMPTY) | \ | ||
66 | UART_IR_MASK(UART_IR_TXTRESH)) | ||
67 | |||
68 | #define UART_TX_INT_STAT (UART_IR_STAT(UART_IR_TXEMPTY) | \ | ||
69 | UART_IR_STAT(UART_IR_TXTRESH)) | ||
70 | |||
71 | /* | ||
72 | * external input interrupt | ||
73 | * | ||
74 | * mask: any edge on CTS, DCD | ||
75 | */ | ||
76 | #define UART_EXTINP_INT_MASK (UART_EXTINP_IRMASK(UART_EXTINP_IR_CTS) | \ | ||
77 | UART_EXTINP_IRMASK(UART_EXTINP_IR_DCD)) | ||
78 | |||
79 | /* | ||
80 | * handy uart register accessor | ||
81 | */ | ||
82 | static inline unsigned int bcm_uart_readl(struct uart_port *port, | ||
83 | unsigned int offset) | ||
84 | { | ||
85 | return bcm_readl(port->membase + offset); | ||
86 | } | ||
87 | |||
88 | static inline void bcm_uart_writel(struct uart_port *port, | ||
89 | unsigned int value, unsigned int offset) | ||
90 | { | ||
91 | bcm_writel(value, port->membase + offset); | ||
92 | } | ||
93 | |||
94 | /* | ||
95 | * serial core request to check if uart tx fifo is empty | ||
96 | */ | ||
97 | static unsigned int bcm_uart_tx_empty(struct uart_port *port) | ||
98 | { | ||
99 | unsigned int val; | ||
100 | |||
101 | val = bcm_uart_readl(port, UART_IR_REG); | ||
102 | return (val & UART_IR_STAT(UART_IR_TXEMPTY)) ? 1 : 0; | ||
103 | } | ||
104 | |||
105 | /* | ||
106 | * serial core request to set RTS and DTR pin state and loopback mode | ||
107 | */ | ||
108 | static void bcm_uart_set_mctrl(struct uart_port *port, unsigned int mctrl) | ||
109 | { | ||
110 | unsigned int val; | ||
111 | |||
112 | val = bcm_uart_readl(port, UART_MCTL_REG); | ||
113 | val &= ~(UART_MCTL_DTR_MASK | UART_MCTL_RTS_MASK); | ||
114 | /* invert of written value is reflected on the pin */ | ||
115 | if (!(mctrl & TIOCM_DTR)) | ||
116 | val |= UART_MCTL_DTR_MASK; | ||
117 | if (!(mctrl & TIOCM_RTS)) | ||
118 | val |= UART_MCTL_RTS_MASK; | ||
119 | bcm_uart_writel(port, val, UART_MCTL_REG); | ||
120 | |||
121 | val = bcm_uart_readl(port, UART_CTL_REG); | ||
122 | if (mctrl & TIOCM_LOOP) | ||
123 | val |= UART_CTL_LOOPBACK_MASK; | ||
124 | else | ||
125 | val &= ~UART_CTL_LOOPBACK_MASK; | ||
126 | bcm_uart_writel(port, val, UART_CTL_REG); | ||
127 | } | ||
128 | |||
129 | /* | ||
130 | * serial core request to return RI, CTS, DCD and DSR pin state | ||
131 | */ | ||
132 | static unsigned int bcm_uart_get_mctrl(struct uart_port *port) | ||
133 | { | ||
134 | unsigned int val, mctrl; | ||
135 | |||
136 | mctrl = 0; | ||
137 | val = bcm_uart_readl(port, UART_EXTINP_REG); | ||
138 | if (val & UART_EXTINP_RI_MASK) | ||
139 | mctrl |= TIOCM_RI; | ||
140 | if (val & UART_EXTINP_CTS_MASK) | ||
141 | mctrl |= TIOCM_CTS; | ||
142 | if (val & UART_EXTINP_DCD_MASK) | ||
143 | mctrl |= TIOCM_CD; | ||
144 | if (val & UART_EXTINP_DSR_MASK) | ||
145 | mctrl |= TIOCM_DSR; | ||
146 | return mctrl; | ||
147 | } | ||
148 | |||
149 | /* | ||
150 | * serial core request to disable tx ASAP (used for flow control) | ||
151 | */ | ||
152 | static void bcm_uart_stop_tx(struct uart_port *port) | ||
153 | { | ||
154 | unsigned int val; | ||
155 | |||
156 | val = bcm_uart_readl(port, UART_CTL_REG); | ||
157 | val &= ~(UART_CTL_TXEN_MASK); | ||
158 | bcm_uart_writel(port, val, UART_CTL_REG); | ||
159 | |||
160 | val = bcm_uart_readl(port, UART_IR_REG); | ||
161 | val &= ~UART_TX_INT_MASK; | ||
162 | bcm_uart_writel(port, val, UART_IR_REG); | ||
163 | } | ||
164 | |||
165 | /* | ||
166 | * serial core request to (re)enable tx | ||
167 | */ | ||
168 | static void bcm_uart_start_tx(struct uart_port *port) | ||
169 | { | ||
170 | unsigned int val; | ||
171 | |||
172 | val = bcm_uart_readl(port, UART_IR_REG); | ||
173 | val |= UART_TX_INT_MASK; | ||
174 | bcm_uart_writel(port, val, UART_IR_REG); | ||
175 | |||
176 | val = bcm_uart_readl(port, UART_CTL_REG); | ||
177 | val |= UART_CTL_TXEN_MASK; | ||
178 | bcm_uart_writel(port, val, UART_CTL_REG); | ||
179 | } | ||
180 | |||
181 | /* | ||
182 | * serial core request to stop rx, called before port shutdown | ||
183 | */ | ||
184 | static void bcm_uart_stop_rx(struct uart_port *port) | ||
185 | { | ||
186 | unsigned int val; | ||
187 | |||
188 | val = bcm_uart_readl(port, UART_IR_REG); | ||
189 | val &= ~UART_RX_INT_MASK; | ||
190 | bcm_uart_writel(port, val, UART_IR_REG); | ||
191 | } | ||
192 | |||
193 | /* | ||
194 | * serial core request to enable modem status interrupt reporting | ||
195 | */ | ||
196 | static void bcm_uart_enable_ms(struct uart_port *port) | ||
197 | { | ||
198 | unsigned int val; | ||
199 | |||
200 | val = bcm_uart_readl(port, UART_IR_REG); | ||
201 | val |= UART_IR_MASK(UART_IR_EXTIP); | ||
202 | bcm_uart_writel(port, val, UART_IR_REG); | ||
203 | } | ||
204 | |||
205 | /* | ||
206 | * serial core request to start/stop emitting break char | ||
207 | */ | ||
208 | static void bcm_uart_break_ctl(struct uart_port *port, int ctl) | ||
209 | { | ||
210 | unsigned long flags; | ||
211 | unsigned int val; | ||
212 | |||
213 | spin_lock_irqsave(&port->lock, flags); | ||
214 | |||
215 | val = bcm_uart_readl(port, UART_CTL_REG); | ||
216 | if (ctl) | ||
217 | val |= UART_CTL_XMITBRK_MASK; | ||
218 | else | ||
219 | val &= ~UART_CTL_XMITBRK_MASK; | ||
220 | bcm_uart_writel(port, val, UART_CTL_REG); | ||
221 | |||
222 | spin_unlock_irqrestore(&port->lock, flags); | ||
223 | } | ||
224 | |||
225 | /* | ||
226 | * return port type in string format | ||
227 | */ | ||
228 | static const char *bcm_uart_type(struct uart_port *port) | ||
229 | { | ||
230 | return (port->type == PORT_BCM63XX) ? "bcm63xx_uart" : NULL; | ||
231 | } | ||
232 | |||
233 | /* | ||
234 | * read all chars in rx fifo and send them to core | ||
235 | */ | ||
236 | static void bcm_uart_do_rx(struct uart_port *port) | ||
237 | { | ||
238 | struct tty_struct *tty; | ||
239 | unsigned int max_count; | ||
240 | |||
241 | /* limit number of char read in interrupt, should not be | ||
242 | * higher than fifo size anyway since we're much faster than | ||
243 | * serial port */ | ||
244 | max_count = 32; | ||
245 | tty = port->info->port.tty; | ||
246 | do { | ||
247 | unsigned int iestat, c, cstat; | ||
248 | char flag; | ||
249 | |||
250 | /* get overrun/fifo empty information from ier | ||
251 | * register */ | ||
252 | iestat = bcm_uart_readl(port, UART_IR_REG); | ||
253 | if (!(iestat & UART_IR_STAT(UART_IR_RXNOTEMPTY))) | ||
254 | break; | ||
255 | |||
256 | cstat = c = bcm_uart_readl(port, UART_FIFO_REG); | ||
257 | port->icount.rx++; | ||
258 | flag = TTY_NORMAL; | ||
259 | c &= 0xff; | ||
260 | |||
261 | if (unlikely((cstat & UART_FIFO_ANYERR_MASK))) { | ||
262 | /* do stats first */ | ||
263 | if (cstat & UART_FIFO_BRKDET_MASK) { | ||
264 | port->icount.brk++; | ||
265 | if (uart_handle_break(port)) | ||
266 | continue; | ||
267 | } | ||
268 | |||
269 | if (cstat & UART_FIFO_PARERR_MASK) | ||
270 | port->icount.parity++; | ||
271 | if (cstat & UART_FIFO_FRAMEERR_MASK) | ||
272 | port->icount.frame++; | ||
273 | |||
274 | /* update flag wrt read_status_mask */ | ||
275 | cstat &= port->read_status_mask; | ||
276 | if (cstat & UART_FIFO_BRKDET_MASK) | ||
277 | flag = TTY_BREAK; | ||
278 | if (cstat & UART_FIFO_FRAMEERR_MASK) | ||
279 | flag = TTY_FRAME; | ||
280 | if (cstat & UART_FIFO_PARERR_MASK) | ||
281 | flag = TTY_PARITY; | ||
282 | } | ||
283 | |||
284 | if (uart_handle_sysrq_char(port, c)) | ||
285 | continue; | ||
286 | |||
287 | if (unlikely(iestat & UART_IR_STAT(UART_IR_RXOVER))) { | ||
288 | port->icount.overrun++; | ||
289 | tty_insert_flip_char(tty, 0, TTY_OVERRUN); | ||
290 | } | ||
291 | |||
292 | if ((cstat & port->ignore_status_mask) == 0) | ||
293 | tty_insert_flip_char(tty, c, flag); | ||
294 | |||
295 | } while (--max_count); | ||
296 | |||
297 | tty_flip_buffer_push(tty); | ||
298 | } | ||
299 | |||
300 | /* | ||
301 | * fill tx fifo with chars to send, stop when fifo is about to be full | ||
302 | * or when all chars have been sent. | ||
303 | */ | ||
304 | static void bcm_uart_do_tx(struct uart_port *port) | ||
305 | { | ||
306 | struct circ_buf *xmit; | ||
307 | unsigned int val, max_count; | ||
308 | |||
309 | if (port->x_char) { | ||
310 | bcm_uart_writel(port, port->x_char, UART_FIFO_REG); | ||
311 | port->icount.tx++; | ||
312 | port->x_char = 0; | ||
313 | return; | ||
314 | } | ||
315 | |||
316 | if (uart_tx_stopped(port)) { | ||
317 | bcm_uart_stop_tx(port); | ||
318 | return; | ||
319 | } | ||
320 | |||
321 | xmit = &port->info->xmit; | ||
322 | if (uart_circ_empty(xmit)) | ||
323 | goto txq_empty; | ||
324 | |||
325 | val = bcm_uart_readl(port, UART_MCTL_REG); | ||
326 | val = (val & UART_MCTL_TXFIFOFILL_MASK) >> UART_MCTL_TXFIFOFILL_SHIFT; | ||
327 | max_count = port->fifosize - val; | ||
328 | |||
329 | while (max_count--) { | ||
330 | unsigned int c; | ||
331 | |||
332 | c = xmit->buf[xmit->tail]; | ||
333 | bcm_uart_writel(port, c, UART_FIFO_REG); | ||
334 | xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); | ||
335 | port->icount.tx++; | ||
336 | if (uart_circ_empty(xmit)) | ||
337 | break; | ||
338 | } | ||
339 | |||
340 | if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) | ||
341 | uart_write_wakeup(port); | ||
342 | |||
343 | if (uart_circ_empty(xmit)) | ||
344 | goto txq_empty; | ||
345 | return; | ||
346 | |||
347 | txq_empty: | ||
348 | /* nothing to send, disable transmit interrupt */ | ||
349 | val = bcm_uart_readl(port, UART_IR_REG); | ||
350 | val &= ~UART_TX_INT_MASK; | ||
351 | bcm_uart_writel(port, val, UART_IR_REG); | ||
352 | return; | ||
353 | } | ||
354 | |||
355 | /* | ||
356 | * process uart interrupt | ||
357 | */ | ||
358 | static irqreturn_t bcm_uart_interrupt(int irq, void *dev_id) | ||
359 | { | ||
360 | struct uart_port *port; | ||
361 | unsigned int irqstat; | ||
362 | |||
363 | port = dev_id; | ||
364 | spin_lock(&port->lock); | ||
365 | |||
366 | irqstat = bcm_uart_readl(port, UART_IR_REG); | ||
367 | if (irqstat & UART_RX_INT_STAT) | ||
368 | bcm_uart_do_rx(port); | ||
369 | |||
370 | if (irqstat & UART_TX_INT_STAT) | ||
371 | bcm_uart_do_tx(port); | ||
372 | |||
373 | if (irqstat & UART_IR_MASK(UART_IR_EXTIP)) { | ||
374 | unsigned int estat; | ||
375 | |||
376 | estat = bcm_uart_readl(port, UART_EXTINP_REG); | ||
377 | if (estat & UART_EXTINP_IRSTAT(UART_EXTINP_IR_CTS)) | ||
378 | uart_handle_cts_change(port, | ||
379 | estat & UART_EXTINP_CTS_MASK); | ||
380 | if (estat & UART_EXTINP_IRSTAT(UART_EXTINP_IR_DCD)) | ||
381 | uart_handle_dcd_change(port, | ||
382 | estat & UART_EXTINP_DCD_MASK); | ||
383 | } | ||
384 | |||
385 | spin_unlock(&port->lock); | ||
386 | return IRQ_HANDLED; | ||
387 | } | ||
388 | |||
389 | /* | ||
390 | * enable rx & tx operation on uart | ||
391 | */ | ||
392 | static void bcm_uart_enable(struct uart_port *port) | ||
393 | { | ||
394 | unsigned int val; | ||
395 | |||
396 | val = bcm_uart_readl(port, UART_CTL_REG); | ||
397 | val |= (UART_CTL_BRGEN_MASK | UART_CTL_TXEN_MASK | UART_CTL_RXEN_MASK); | ||
398 | bcm_uart_writel(port, val, UART_CTL_REG); | ||
399 | } | ||
400 | |||
401 | /* | ||
402 | * disable rx & tx operation on uart | ||
403 | */ | ||
404 | static void bcm_uart_disable(struct uart_port *port) | ||
405 | { | ||
406 | unsigned int val; | ||
407 | |||
408 | val = bcm_uart_readl(port, UART_CTL_REG); | ||
409 | val &= ~(UART_CTL_BRGEN_MASK | UART_CTL_TXEN_MASK | | ||
410 | UART_CTL_RXEN_MASK); | ||
411 | bcm_uart_writel(port, val, UART_CTL_REG); | ||
412 | } | ||
413 | |||
414 | /* | ||
415 | * clear all unread data in rx fifo and unsent data in tx fifo | ||
416 | */ | ||
417 | static void bcm_uart_flush(struct uart_port *port) | ||
418 | { | ||
419 | unsigned int val; | ||
420 | |||
421 | /* empty rx and tx fifo */ | ||
422 | val = bcm_uart_readl(port, UART_CTL_REG); | ||
423 | val |= UART_CTL_RSTRXFIFO_MASK | UART_CTL_RSTTXFIFO_MASK; | ||
424 | bcm_uart_writel(port, val, UART_CTL_REG); | ||
425 | |||
426 | /* read any pending char to make sure all irq status are | ||
427 | * cleared */ | ||
428 | (void)bcm_uart_readl(port, UART_FIFO_REG); | ||
429 | } | ||
430 | |||
431 | /* | ||
432 | * serial core request to initialize uart and start rx operation | ||
433 | */ | ||
434 | static int bcm_uart_startup(struct uart_port *port) | ||
435 | { | ||
436 | unsigned int val; | ||
437 | int ret; | ||
438 | |||
439 | /* mask all irq and flush port */ | ||
440 | bcm_uart_disable(port); | ||
441 | bcm_uart_writel(port, 0, UART_IR_REG); | ||
442 | bcm_uart_flush(port); | ||
443 | |||
444 | /* clear any pending external input interrupt */ | ||
445 | (void)bcm_uart_readl(port, UART_EXTINP_REG); | ||
446 | |||
447 | /* set rx/tx fifo thresh to fifo half size */ | ||
448 | val = bcm_uart_readl(port, UART_MCTL_REG); | ||
449 | val &= ~(UART_MCTL_RXFIFOTHRESH_MASK | UART_MCTL_TXFIFOTHRESH_MASK); | ||
450 | val |= (port->fifosize / 2) << UART_MCTL_RXFIFOTHRESH_SHIFT; | ||
451 | val |= (port->fifosize / 2) << UART_MCTL_TXFIFOTHRESH_SHIFT; | ||
452 | bcm_uart_writel(port, val, UART_MCTL_REG); | ||
453 | |||
454 | /* set rx fifo timeout to 1 char time */ | ||
455 | val = bcm_uart_readl(port, UART_CTL_REG); | ||
456 | val &= ~UART_CTL_RXTMOUTCNT_MASK; | ||
457 | val |= 1 << UART_CTL_RXTMOUTCNT_SHIFT; | ||
458 | bcm_uart_writel(port, val, UART_CTL_REG); | ||
459 | |||
460 | /* report any edge on dcd and cts */ | ||
461 | val = UART_EXTINP_INT_MASK; | ||
462 | val |= UART_EXTINP_DCD_NOSENSE_MASK; | ||
463 | val |= UART_EXTINP_CTS_NOSENSE_MASK; | ||
464 | bcm_uart_writel(port, val, UART_EXTINP_REG); | ||
465 | |||
466 | /* register irq and enable rx interrupts */ | ||
467 | ret = request_irq(port->irq, bcm_uart_interrupt, 0, | ||
468 | bcm_uart_type(port), port); | ||
469 | if (ret) | ||
470 | return ret; | ||
471 | bcm_uart_writel(port, UART_RX_INT_MASK, UART_IR_REG); | ||
472 | bcm_uart_enable(port); | ||
473 | return 0; | ||
474 | } | ||
475 | |||
476 | /* | ||
477 | * serial core request to flush & disable uart | ||
478 | */ | ||
479 | static void bcm_uart_shutdown(struct uart_port *port) | ||
480 | { | ||
481 | unsigned long flags; | ||
482 | |||
483 | spin_lock_irqsave(&port->lock, flags); | ||
484 | bcm_uart_writel(port, 0, UART_IR_REG); | ||
485 | spin_unlock_irqrestore(&port->lock, flags); | ||
486 | |||
487 | bcm_uart_disable(port); | ||
488 | bcm_uart_flush(port); | ||
489 | free_irq(port->irq, port); | ||
490 | } | ||
491 | |||
492 | /* | ||
493 | * serial core request to change current uart setting | ||
494 | */ | ||
495 | static void bcm_uart_set_termios(struct uart_port *port, | ||
496 | struct ktermios *new, | ||
497 | struct ktermios *old) | ||
498 | { | ||
499 | unsigned int ctl, baud, quot, ier; | ||
500 | unsigned long flags; | ||
501 | |||
502 | spin_lock_irqsave(&port->lock, flags); | ||
503 | |||
504 | /* disable uart while changing speed */ | ||
505 | bcm_uart_disable(port); | ||
506 | bcm_uart_flush(port); | ||
507 | |||
508 | /* update Control register */ | ||
509 | ctl = bcm_uart_readl(port, UART_CTL_REG); | ||
510 | ctl &= ~UART_CTL_BITSPERSYM_MASK; | ||
511 | |||
512 | switch (new->c_cflag & CSIZE) { | ||
513 | case CS5: | ||
514 | ctl |= (0 << UART_CTL_BITSPERSYM_SHIFT); | ||
515 | break; | ||
516 | case CS6: | ||
517 | ctl |= (1 << UART_CTL_BITSPERSYM_SHIFT); | ||
518 | break; | ||
519 | case CS7: | ||
520 | ctl |= (2 << UART_CTL_BITSPERSYM_SHIFT); | ||
521 | break; | ||
522 | default: | ||
523 | ctl |= (3 << UART_CTL_BITSPERSYM_SHIFT); | ||
524 | break; | ||
525 | } | ||
526 | |||
527 | ctl &= ~UART_CTL_STOPBITS_MASK; | ||
528 | if (new->c_cflag & CSTOPB) | ||
529 | ctl |= UART_CTL_STOPBITS_2; | ||
530 | else | ||
531 | ctl |= UART_CTL_STOPBITS_1; | ||
532 | |||
533 | ctl &= ~(UART_CTL_RXPAREN_MASK | UART_CTL_TXPAREN_MASK); | ||
534 | if (new->c_cflag & PARENB) | ||
535 | ctl |= (UART_CTL_RXPAREN_MASK | UART_CTL_TXPAREN_MASK); | ||
536 | ctl &= ~(UART_CTL_RXPAREVEN_MASK | UART_CTL_TXPAREVEN_MASK); | ||
537 | if (new->c_cflag & PARODD) | ||
538 | ctl |= (UART_CTL_RXPAREVEN_MASK | UART_CTL_TXPAREVEN_MASK); | ||
539 | bcm_uart_writel(port, ctl, UART_CTL_REG); | ||
540 | |||
541 | /* update Baudword register */ | ||
542 | baud = uart_get_baud_rate(port, new, old, 0, port->uartclk / 16); | ||
543 | quot = uart_get_divisor(port, baud) - 1; | ||
544 | bcm_uart_writel(port, quot, UART_BAUD_REG); | ||
545 | |||
546 | /* update Interrupt register */ | ||
547 | ier = bcm_uart_readl(port, UART_IR_REG); | ||
548 | |||
549 | ier &= ~UART_IR_MASK(UART_IR_EXTIP); | ||
550 | if (UART_ENABLE_MS(port, new->c_cflag)) | ||
551 | ier |= UART_IR_MASK(UART_IR_EXTIP); | ||
552 | |||
553 | bcm_uart_writel(port, ier, UART_IR_REG); | ||
554 | |||
555 | /* update read/ignore mask */ | ||
556 | port->read_status_mask = UART_FIFO_VALID_MASK; | ||
557 | if (new->c_iflag & INPCK) { | ||
558 | port->read_status_mask |= UART_FIFO_FRAMEERR_MASK; | ||
559 | port->read_status_mask |= UART_FIFO_PARERR_MASK; | ||
560 | } | ||
561 | if (new->c_iflag & (BRKINT)) | ||
562 | port->read_status_mask |= UART_FIFO_BRKDET_MASK; | ||
563 | |||
564 | port->ignore_status_mask = 0; | ||
565 | if (new->c_iflag & IGNPAR) | ||
566 | port->ignore_status_mask |= UART_FIFO_PARERR_MASK; | ||
567 | if (new->c_iflag & IGNBRK) | ||
568 | port->ignore_status_mask |= UART_FIFO_BRKDET_MASK; | ||
569 | if (!(new->c_cflag & CREAD)) | ||
570 | port->ignore_status_mask |= UART_FIFO_VALID_MASK; | ||
571 | |||
572 | uart_update_timeout(port, new->c_cflag, baud); | ||
573 | bcm_uart_enable(port); | ||
574 | spin_unlock_irqrestore(&port->lock, flags); | ||
575 | } | ||
576 | |||
577 | /* | ||
578 | * serial core request to claim uart iomem | ||
579 | */ | ||
580 | static int bcm_uart_request_port(struct uart_port *port) | ||
581 | { | ||
582 | unsigned int size; | ||
583 | |||
584 | size = RSET_UART_SIZE; | ||
585 | if (!request_mem_region(port->mapbase, size, "bcm63xx")) { | ||
586 | dev_err(port->dev, "Memory region busy\n"); | ||
587 | return -EBUSY; | ||
588 | } | ||
589 | |||
590 | port->membase = ioremap(port->mapbase, size); | ||
591 | if (!port->membase) { | ||
592 | dev_err(port->dev, "Unable to map registers\n"); | ||
593 | release_mem_region(port->mapbase, size); | ||
594 | return -EBUSY; | ||
595 | } | ||
596 | return 0; | ||
597 | } | ||
598 | |||
599 | /* | ||
600 | * serial core request to release uart iomem | ||
601 | */ | ||
602 | static void bcm_uart_release_port(struct uart_port *port) | ||
603 | { | ||
604 | release_mem_region(port->mapbase, RSET_UART_SIZE); | ||
605 | iounmap(port->membase); | ||
606 | } | ||
607 | |||
608 | /* | ||
609 | * serial core request to do any port required autoconfiguration | ||
610 | */ | ||
611 | static void bcm_uart_config_port(struct uart_port *port, int flags) | ||
612 | { | ||
613 | if (flags & UART_CONFIG_TYPE) { | ||
614 | if (bcm_uart_request_port(port)) | ||
615 | return; | ||
616 | port->type = PORT_BCM63XX; | ||
617 | } | ||
618 | } | ||
619 | |||
620 | /* | ||
621 | * serial core request to check that port information in serinfo are | ||
622 | * suitable | ||
623 | */ | ||
624 | static int bcm_uart_verify_port(struct uart_port *port, | ||
625 | struct serial_struct *serinfo) | ||
626 | { | ||
627 | if (port->type != PORT_BCM63XX) | ||
628 | return -EINVAL; | ||
629 | if (port->irq != serinfo->irq) | ||
630 | return -EINVAL; | ||
631 | if (port->iotype != serinfo->io_type) | ||
632 | return -EINVAL; | ||
633 | if (port->mapbase != (unsigned long)serinfo->iomem_base) | ||
634 | return -EINVAL; | ||
635 | return 0; | ||
636 | } | ||
637 | |||
638 | /* serial core callbacks */ | ||
639 | static struct uart_ops bcm_uart_ops = { | ||
640 | .tx_empty = bcm_uart_tx_empty, | ||
641 | .get_mctrl = bcm_uart_get_mctrl, | ||
642 | .set_mctrl = bcm_uart_set_mctrl, | ||
643 | .start_tx = bcm_uart_start_tx, | ||
644 | .stop_tx = bcm_uart_stop_tx, | ||
645 | .stop_rx = bcm_uart_stop_rx, | ||
646 | .enable_ms = bcm_uart_enable_ms, | ||
647 | .break_ctl = bcm_uart_break_ctl, | ||
648 | .startup = bcm_uart_startup, | ||
649 | .shutdown = bcm_uart_shutdown, | ||
650 | .set_termios = bcm_uart_set_termios, | ||
651 | .type = bcm_uart_type, | ||
652 | .release_port = bcm_uart_release_port, | ||
653 | .request_port = bcm_uart_request_port, | ||
654 | .config_port = bcm_uart_config_port, | ||
655 | .verify_port = bcm_uart_verify_port, | ||
656 | }; | ||
657 | |||
658 | |||
659 | |||
660 | #ifdef CONFIG_SERIAL_BCM63XX_CONSOLE | ||
661 | static inline void wait_for_xmitr(struct uart_port *port) | ||
662 | { | ||
663 | unsigned int tmout; | ||
664 | |||
665 | /* Wait up to 10ms for the character(s) to be sent. */ | ||
666 | tmout = 10000; | ||
667 | while (--tmout) { | ||
668 | unsigned int val; | ||
669 | |||
670 | val = bcm_uart_readl(port, UART_IR_REG); | ||
671 | if (val & UART_IR_STAT(UART_IR_TXEMPTY)) | ||
672 | break; | ||
673 | udelay(1); | ||
674 | } | ||
675 | |||
676 | /* Wait up to 1s for flow control if necessary */ | ||
677 | if (port->flags & UPF_CONS_FLOW) { | ||
678 | tmout = 1000000; | ||
679 | while (--tmout) { | ||
680 | unsigned int val; | ||
681 | |||
682 | val = bcm_uart_readl(port, UART_EXTINP_REG); | ||
683 | if (val & UART_EXTINP_CTS_MASK) | ||
684 | break; | ||
685 | udelay(1); | ||
686 | } | ||
687 | } | ||
688 | } | ||
689 | |||
690 | /* | ||
691 | * output given char | ||
692 | */ | ||
693 | static void bcm_console_putchar(struct uart_port *port, int ch) | ||
694 | { | ||
695 | wait_for_xmitr(port); | ||
696 | bcm_uart_writel(port, ch, UART_FIFO_REG); | ||
697 | } | ||
698 | |||
699 | /* | ||
700 | * console core request to output given string | ||
701 | */ | ||
702 | static void bcm_console_write(struct console *co, const char *s, | ||
703 | unsigned int count) | ||
704 | { | ||
705 | struct uart_port *port; | ||
706 | unsigned long flags; | ||
707 | int locked; | ||
708 | |||
709 | port = &ports[co->index]; | ||
710 | |||
711 | local_irq_save(flags); | ||
712 | if (port->sysrq) { | ||
713 | /* bcm_uart_interrupt() already took the lock */ | ||
714 | locked = 0; | ||
715 | } else if (oops_in_progress) { | ||
716 | locked = spin_trylock(&port->lock); | ||
717 | } else { | ||
718 | spin_lock(&port->lock); | ||
719 | locked = 1; | ||
720 | } | ||
721 | |||
722 | /* call helper to deal with \r\n */ | ||
723 | uart_console_write(port, s, count, bcm_console_putchar); | ||
724 | |||
725 | /* and wait for char to be transmitted */ | ||
726 | wait_for_xmitr(port); | ||
727 | |||
728 | if (locked) | ||
729 | spin_unlock(&port->lock); | ||
730 | local_irq_restore(flags); | ||
731 | } | ||
732 | |||
733 | /* | ||
734 | * console core request to setup given console, find matching uart | ||
735 | * port and setup it. | ||
736 | */ | ||
737 | static int bcm_console_setup(struct console *co, char *options) | ||
738 | { | ||
739 | struct uart_port *port; | ||
740 | int baud = 9600; | ||
741 | int bits = 8; | ||
742 | int parity = 'n'; | ||
743 | int flow = 'n'; | ||
744 | |||
745 | if (co->index < 0 || co->index >= BCM63XX_NR_UARTS) | ||
746 | return -EINVAL; | ||
747 | port = &ports[co->index]; | ||
748 | if (!port->membase) | ||
749 | return -ENODEV; | ||
750 | if (options) | ||
751 | uart_parse_options(options, &baud, &parity, &bits, &flow); | ||
752 | |||
753 | return uart_set_options(port, co, baud, parity, bits, flow); | ||
754 | } | ||
755 | |||
756 | static struct uart_driver bcm_uart_driver; | ||
757 | |||
758 | static struct console bcm63xx_console = { | ||
759 | .name = "ttyS", | ||
760 | .write = bcm_console_write, | ||
761 | .device = uart_console_device, | ||
762 | .setup = bcm_console_setup, | ||
763 | .flags = CON_PRINTBUFFER, | ||
764 | .index = -1, | ||
765 | .data = &bcm_uart_driver, | ||
766 | }; | ||
767 | |||
768 | static int __init bcm63xx_console_init(void) | ||
769 | { | ||
770 | register_console(&bcm63xx_console); | ||
771 | return 0; | ||
772 | } | ||
773 | |||
774 | console_initcall(bcm63xx_console_init); | ||
775 | |||
776 | #define BCM63XX_CONSOLE (&bcm63xx_console) | ||
777 | #else | ||
778 | #define BCM63XX_CONSOLE NULL | ||
779 | #endif /* CONFIG_SERIAL_BCM63XX_CONSOLE */ | ||
780 | |||
781 | static struct uart_driver bcm_uart_driver = { | ||
782 | .owner = THIS_MODULE, | ||
783 | .driver_name = "bcm63xx_uart", | ||
784 | .dev_name = "ttyS", | ||
785 | .major = TTY_MAJOR, | ||
786 | .minor = 64, | ||
787 | .nr = 1, | ||
788 | .cons = BCM63XX_CONSOLE, | ||
789 | }; | ||
790 | |||
791 | /* | ||
792 | * platform driver probe/remove callback | ||
793 | */ | ||
794 | static int __devinit bcm_uart_probe(struct platform_device *pdev) | ||
795 | { | ||
796 | struct resource *res_mem, *res_irq; | ||
797 | struct uart_port *port; | ||
798 | struct clk *clk; | ||
799 | int ret; | ||
800 | |||
801 | if (pdev->id < 0 || pdev->id >= BCM63XX_NR_UARTS) | ||
802 | return -EINVAL; | ||
803 | |||
804 | if (ports[pdev->id].membase) | ||
805 | return -EBUSY; | ||
806 | |||
807 | res_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); | ||
808 | if (!res_mem) | ||
809 | return -ENODEV; | ||
810 | |||
811 | res_irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0); | ||
812 | if (!res_irq) | ||
813 | return -ENODEV; | ||
814 | |||
815 | clk = clk_get(&pdev->dev, "periph"); | ||
816 | if (IS_ERR(clk)) | ||
817 | return -ENODEV; | ||
818 | |||
819 | port = &ports[pdev->id]; | ||
820 | memset(port, 0, sizeof(*port)); | ||
821 | port->iotype = UPIO_MEM; | ||
822 | port->mapbase = res_mem->start; | ||
823 | port->irq = res_irq->start; | ||
824 | port->ops = &bcm_uart_ops; | ||
825 | port->flags = UPF_BOOT_AUTOCONF; | ||
826 | port->dev = &pdev->dev; | ||
827 | port->fifosize = 16; | ||
828 | port->uartclk = clk_get_rate(clk) / 2; | ||
829 | clk_put(clk); | ||
830 | |||
831 | ret = uart_add_one_port(&bcm_uart_driver, port); | ||
832 | if (ret) { | ||
833 | kfree(port); | ||
834 | return ret; | ||
835 | } | ||
836 | platform_set_drvdata(pdev, port); | ||
837 | return 0; | ||
838 | } | ||
839 | |||
840 | static int __devexit bcm_uart_remove(struct platform_device *pdev) | ||
841 | { | ||
842 | struct uart_port *port; | ||
843 | |||
844 | port = platform_get_drvdata(pdev); | ||
845 | uart_remove_one_port(&bcm_uart_driver, port); | ||
846 | platform_set_drvdata(pdev, NULL); | ||
847 | /* mark port as free */ | ||
848 | ports[pdev->id].membase = 0; | ||
849 | return 0; | ||
850 | } | ||
851 | |||
852 | /* | ||
853 | * platform driver stuff | ||
854 | */ | ||
855 | static struct platform_driver bcm_uart_platform_driver = { | ||
856 | .probe = bcm_uart_probe, | ||
857 | .remove = __devexit_p(bcm_uart_remove), | ||
858 | .driver = { | ||
859 | .owner = THIS_MODULE, | ||
860 | .name = "bcm63xx_uart", | ||
861 | }, | ||
862 | }; | ||
863 | |||
864 | static int __init bcm_uart_init(void) | ||
865 | { | ||
866 | int ret; | ||
867 | |||
868 | ret = uart_register_driver(&bcm_uart_driver); | ||
869 | if (ret) | ||
870 | return ret; | ||
871 | |||
872 | ret = platform_driver_register(&bcm_uart_platform_driver); | ||
873 | if (ret) | ||
874 | uart_unregister_driver(&bcm_uart_driver); | ||
875 | |||
876 | return ret; | ||
877 | } | ||
878 | |||
879 | static void __exit bcm_uart_exit(void) | ||
880 | { | ||
881 | platform_driver_unregister(&bcm_uart_platform_driver); | ||
882 | uart_unregister_driver(&bcm_uart_driver); | ||
883 | } | ||
884 | |||
885 | module_init(bcm_uart_init); | ||
886 | module_exit(bcm_uart_exit); | ||
887 | |||
888 | MODULE_AUTHOR("Maxime Bizon <mbizon@freebox.fr>"); | ||
889 | MODULE_DESCRIPTION("Broadcom 63<xx integrated uart driver"); | ||
890 | MODULE_LICENSE("GPL"); | ||