diff options
author | Eilon Greenstein <eilong@broadcom.com> | 2009-02-12 03:37:04 -0500 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2009-02-16 02:31:33 -0500 |
commit | 811a2f2d3be9a39bd4e0930501fda8630857748d (patch) | |
tree | ab00cd6bcc94c0cc270a747288d311b612077a87 /drivers | |
parent | a35da8dbf1ff403633bb6256fba691b224f17f61 (diff) |
bnx2x: EMAC reset
The NIG_ENABLE does not reset the emac. Replace it with explicit reset
Signed-off-by: Yaniv Rosner <yanivr@broadcom.com>
Signed-off-by: Eilon Greenstein <eilong@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/net/bnx2x_link.c | 6 | ||||
-rw-r--r-- | drivers/net/bnx2x_reg.h | 2 |
2 files changed, 6 insertions, 2 deletions
diff --git a/drivers/net/bnx2x_link.c b/drivers/net/bnx2x_link.c index ffa412f63c96..f4c699ecfb41 100644 --- a/drivers/net/bnx2x_link.c +++ b/drivers/net/bnx2x_link.c | |||
@@ -297,8 +297,10 @@ static u8 bnx2x_emac_enable(struct link_params *params, | |||
297 | port*4, 0); | 297 | port*4, 0); |
298 | } | 298 | } |
299 | 299 | ||
300 | /* enable emac */ | 300 | bnx2x_bits_en(bp, emac_base + EMAC_REG_EMAC_RX_MODE, |
301 | REG_WR(bp, NIG_REG_NIG_EMAC0_EN + port*4, 1); | 301 | EMAC_RX_MODE_RESET); |
302 | bnx2x_bits_en(bp, emac_base + EMAC_REG_EMAC_TX_MODE, | ||
303 | EMAC_TX_MODE_RESET); | ||
302 | 304 | ||
303 | if (CHIP_REV_IS_SLOW(bp)) { | 305 | if (CHIP_REV_IS_SLOW(bp)) { |
304 | /* config GMII mode */ | 306 | /* config GMII mode */ |
diff --git a/drivers/net/bnx2x_reg.h b/drivers/net/bnx2x_reg.h index 5cfeac96ea69..b6c924934a00 100644 --- a/drivers/net/bnx2x_reg.h +++ b/drivers/net/bnx2x_reg.h | |||
@@ -5173,9 +5173,11 @@ | |||
5173 | #define EMAC_RX_MODE_FLOW_EN (1L<<2) | 5173 | #define EMAC_RX_MODE_FLOW_EN (1L<<2) |
5174 | #define EMAC_RX_MODE_KEEP_VLAN_TAG (1L<<10) | 5174 | #define EMAC_RX_MODE_KEEP_VLAN_TAG (1L<<10) |
5175 | #define EMAC_RX_MODE_PROMISCUOUS (1L<<8) | 5175 | #define EMAC_RX_MODE_PROMISCUOUS (1L<<8) |
5176 | #define EMAC_RX_MODE_RESET (1L<<0) | ||
5176 | #define EMAC_RX_MTU_SIZE_JUMBO_ENA (1L<<31) | 5177 | #define EMAC_RX_MTU_SIZE_JUMBO_ENA (1L<<31) |
5177 | #define EMAC_TX_MODE_EXT_PAUSE_EN (1L<<3) | 5178 | #define EMAC_TX_MODE_EXT_PAUSE_EN (1L<<3) |
5178 | #define EMAC_TX_MODE_FLOW_EN (1L<<4) | 5179 | #define EMAC_TX_MODE_FLOW_EN (1L<<4) |
5180 | #define EMAC_TX_MODE_RESET (1L<<0) | ||
5179 | #define MISC_REGISTERS_GPIO_0 0 | 5181 | #define MISC_REGISTERS_GPIO_0 0 |
5180 | #define MISC_REGISTERS_GPIO_1 1 | 5182 | #define MISC_REGISTERS_GPIO_1 1 |
5181 | #define MISC_REGISTERS_GPIO_2 2 | 5183 | #define MISC_REGISTERS_GPIO_2 2 |