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authorJim Cromie <jim.cromie@gmail.com>2006-10-04 05:15:35 -0400
committerLinus Torvalds <torvalds@g5.osdl.org>2006-10-04 10:55:14 -0400
commit856fe98f168e5b80b053979769af2514aab96d6b (patch)
treebd166c91b9b27cf48f69533f67026a2330d41cc1 /drivers
parent9bded00bf62090ebc9d6e8be640cdb69e8497db6 (diff)
[PATCH] scx200_hrt: fix precedence bug manifesting as 27x clock in 1 MHz mode
Fix paren-placement / precedence bug breaking initialization for 1 MHz clock mode. Also fix comment spelling error, and fence-post (off-by-one) error on symbol used in request_region. Addresses http://bugzilla.kernel.org/show_bug.cgi?id=7242 Thanks alexander.krause@erazor-zone.de, dzpost@dedekind.net, for the reports and patch test, and phelps@mantara.com for the independent patch and verification. Signed-off-by: Jim Cromie <jim.cromie@gmail.com> Cc: <alexander.krause@erazor-zone.de> Cc: <dzpost@dedekind.net> Cc: <phelps@mantara.com> Acked-by: John Stultz <johnstul@us.ibm.com> Cc: <stable@kernel.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/clocksource/scx200_hrt.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/clocksource/scx200_hrt.c b/drivers/clocksource/scx200_hrt.c
index d418b8297211..22915cc46ba7 100644
--- a/drivers/clocksource/scx200_hrt.c
+++ b/drivers/clocksource/scx200_hrt.c
@@ -63,7 +63,7 @@ static struct clocksource cs_hrt = {
63 63
64static int __init init_hrt_clocksource(void) 64static int __init init_hrt_clocksource(void)
65{ 65{
66 /* Make sure scx200 has initializedd the configuration block */ 66 /* Make sure scx200 has initialized the configuration block */
67 if (!scx200_cb_present()) 67 if (!scx200_cb_present())
68 return -ENODEV; 68 return -ENODEV;
69 69
@@ -76,7 +76,7 @@ static int __init init_hrt_clocksource(void)
76 } 76 }
77 77
78 /* write timer config */ 78 /* write timer config */
79 outb(HR_TMEN | (mhz27) ? HR_TMCLKSEL : 0, 79 outb(HR_TMEN | (mhz27 ? HR_TMCLKSEL : 0),
80 scx200_cb_base + SCx200_TMCNFG_OFFSET); 80 scx200_cb_base + SCx200_TMCNFG_OFFSET);
81 81
82 if (mhz27) { 82 if (mhz27) {