diff options
author | Greg Ungerer <gerg@snapgear.com> | 2006-12-05 20:49:34 -0500 |
---|---|---|
committer | Linus Torvalds <torvalds@woody.osdl.org> | 2006-12-06 10:41:26 -0500 |
commit | a8b8d57c25eb61a04431324e1a41109925290512 (patch) | |
tree | fc2ca7ae7a24de84368d82b75caabf29d19c22d8 /drivers | |
parent | dcb14775493170ea60fb8b657b411cdc9532b7ee (diff) |
[PATCH] m68knommu: ColdFire serial driver fixes
Some updates for the old ColdFire serial driver:
. support 3 and 4 UARTs on some ColdFire parts that have them
. enable multifunction pins to serial for 527x CPU's
. support the 5272 UART's fractional baud rate divisor
. switch driver name to "mcfserial"
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/serial/mcfserial.c | 54 |
1 files changed, 51 insertions, 3 deletions
diff --git a/drivers/serial/mcfserial.c b/drivers/serial/mcfserial.c index aee1b31f1a1c..3db206d29b33 100644 --- a/drivers/serial/mcfserial.c +++ b/drivers/serial/mcfserial.c | |||
@@ -60,7 +60,8 @@ struct timer_list mcfrs_timer_struct; | |||
60 | #if defined(CONFIG_HW_FEITH) | 60 | #if defined(CONFIG_HW_FEITH) |
61 | #define CONSOLE_BAUD_RATE 38400 | 61 | #define CONSOLE_BAUD_RATE 38400 |
62 | #define DEFAULT_CBAUD B38400 | 62 | #define DEFAULT_CBAUD B38400 |
63 | #elif defined(CONFIG_MOD5272) || defined(CONFIG_M5208EVB) || defined(CONFIG_M5329EVB) | 63 | #elif defined(CONFIG_MOD5272) || defined(CONFIG_M5208EVB) || \ |
64 | defined(CONFIG_M5329EVB) || defined(CONFIG_GILBARCO) | ||
64 | #define CONSOLE_BAUD_RATE 115200 | 65 | #define CONSOLE_BAUD_RATE 115200 |
65 | #define DEFAULT_CBAUD B115200 | 66 | #define DEFAULT_CBAUD B115200 |
66 | #elif defined(CONFIG_ARNEWSH) || defined(CONFIG_FREESCALE) || \ | 67 | #elif defined(CONFIG_ARNEWSH) || defined(CONFIG_FREESCALE) || \ |
@@ -109,12 +110,30 @@ static struct mcf_serial mcfrs_table[] = { | |||
109 | .irq = IRQBASE, | 110 | .irq = IRQBASE, |
110 | .flags = ASYNC_BOOT_AUTOCONF, | 111 | .flags = ASYNC_BOOT_AUTOCONF, |
111 | }, | 112 | }, |
113 | #ifdef MCFUART_BASE2 | ||
112 | { /* ttyS1 */ | 114 | { /* ttyS1 */ |
113 | .magic = 0, | 115 | .magic = 0, |
114 | .addr = (volatile unsigned char *) (MCF_MBAR+MCFUART_BASE2), | 116 | .addr = (volatile unsigned char *) (MCF_MBAR+MCFUART_BASE2), |
115 | .irq = IRQBASE+1, | 117 | .irq = IRQBASE+1, |
116 | .flags = ASYNC_BOOT_AUTOCONF, | 118 | .flags = ASYNC_BOOT_AUTOCONF, |
117 | }, | 119 | }, |
120 | #endif | ||
121 | #ifdef MCFUART_BASE3 | ||
122 | { /* ttyS2 */ | ||
123 | .magic = 0, | ||
124 | .addr = (volatile unsigned char *) (MCF_MBAR+MCFUART_BASE3), | ||
125 | .irq = IRQBASE+2, | ||
126 | .flags = ASYNC_BOOT_AUTOCONF, | ||
127 | }, | ||
128 | #endif | ||
129 | #ifdef MCFUART_BASE4 | ||
130 | { /* ttyS3 */ | ||
131 | .magic = 0, | ||
132 | .addr = (volatile unsigned char *) (MCF_MBAR+MCFUART_BASE4), | ||
133 | .irq = IRQBASE+3, | ||
134 | .flags = ASYNC_BOOT_AUTOCONF, | ||
135 | }, | ||
136 | #endif | ||
118 | }; | 137 | }; |
119 | 138 | ||
120 | 139 | ||
@@ -1516,6 +1535,22 @@ static void mcfrs_irqinit(struct mcf_serial *info) | |||
1516 | imrp = (volatile unsigned long *) (MCF_MBAR + MCFICM_INTC0 + | 1535 | imrp = (volatile unsigned long *) (MCF_MBAR + MCFICM_INTC0 + |
1517 | MCFINTC_IMRL); | 1536 | MCFINTC_IMRL); |
1518 | *imrp &= ~((1 << (info->irq - MCFINT_VECBASE)) | 1); | 1537 | *imrp &= ~((1 << (info->irq - MCFINT_VECBASE)) | 1); |
1538 | #if defined(CONFIG_M527x) | ||
1539 | { | ||
1540 | /* | ||
1541 | * External Pin Mask Setting & Enable External Pin for Interface | ||
1542 | * mrcbis@aliceposta.it | ||
1543 | */ | ||
1544 | unsigned short *serpin_enable_mask; | ||
1545 | serpin_enable_mask = (MCF_IPSBAR + MCF_GPIO_PAR_UART); | ||
1546 | if (info->line == 0) | ||
1547 | *serpin_enable_mask |= UART0_ENABLE_MASK; | ||
1548 | else if (info->line == 1) | ||
1549 | *serpin_enable_mask |= UART1_ENABLE_MASK; | ||
1550 | else if (info->line == 2) | ||
1551 | *serpin_enable_mask |= UART2_ENABLE_MASK; | ||
1552 | } | ||
1553 | #endif | ||
1519 | #elif defined(CONFIG_M520x) | 1554 | #elif defined(CONFIG_M520x) |
1520 | volatile unsigned char *icrp, *uartp; | 1555 | volatile unsigned char *icrp, *uartp; |
1521 | volatile unsigned long *imrp; | 1556 | volatile unsigned long *imrp; |
@@ -1713,7 +1748,7 @@ mcfrs_init(void) | |||
1713 | /* Initialize the tty_driver structure */ | 1748 | /* Initialize the tty_driver structure */ |
1714 | mcfrs_serial_driver->owner = THIS_MODULE; | 1749 | mcfrs_serial_driver->owner = THIS_MODULE; |
1715 | mcfrs_serial_driver->name = "ttyS"; | 1750 | mcfrs_serial_driver->name = "ttyS"; |
1716 | mcfrs_serial_driver->driver_name = "serial"; | 1751 | mcfrs_serial_driver->driver_name = "mcfserial"; |
1717 | mcfrs_serial_driver->major = TTY_MAJOR; | 1752 | mcfrs_serial_driver->major = TTY_MAJOR; |
1718 | mcfrs_serial_driver->minor_start = 64; | 1753 | mcfrs_serial_driver->minor_start = 64; |
1719 | mcfrs_serial_driver->type = TTY_DRIVER_TYPE_SERIAL; | 1754 | mcfrs_serial_driver->type = TTY_DRIVER_TYPE_SERIAL; |
@@ -1797,10 +1832,23 @@ void mcfrs_init_console(void) | |||
1797 | uartp[MCFUART_UMR] = MCFUART_MR1_PARITYNONE | MCFUART_MR1_CS8; | 1832 | uartp[MCFUART_UMR] = MCFUART_MR1_PARITYNONE | MCFUART_MR1_CS8; |
1798 | uartp[MCFUART_UMR] = MCFUART_MR2_STOP1; | 1833 | uartp[MCFUART_UMR] = MCFUART_MR2_STOP1; |
1799 | 1834 | ||
1835 | #ifdef CONFIG_M5272 | ||
1836 | { | ||
1837 | /* | ||
1838 | * For the MCF5272, also compute the baudrate fraction. | ||
1839 | */ | ||
1840 | int fraction = MCF_BUSCLK - (clk * 32 * mcfrs_console_baud); | ||
1841 | fraction *= 16; | ||
1842 | fraction /= (32 * mcfrs_console_baud); | ||
1843 | uartp[MCFUART_UFPD] = (fraction & 0xf); /* set fraction */ | ||
1844 | clk = (MCF_BUSCLK / mcfrs_console_baud) / 32; | ||
1845 | } | ||
1846 | #else | ||
1800 | clk = ((MCF_BUSCLK / mcfrs_console_baud) + 16) / 32; /* set baud */ | 1847 | clk = ((MCF_BUSCLK / mcfrs_console_baud) + 16) / 32; /* set baud */ |
1848 | #endif | ||
1849 | |||
1801 | uartp[MCFUART_UBG1] = (clk & 0xff00) >> 8; /* set msb baud */ | 1850 | uartp[MCFUART_UBG1] = (clk & 0xff00) >> 8; /* set msb baud */ |
1802 | uartp[MCFUART_UBG2] = (clk & 0xff); /* set lsb baud */ | 1851 | uartp[MCFUART_UBG2] = (clk & 0xff); /* set lsb baud */ |
1803 | |||
1804 | uartp[MCFUART_UCSR] = MCFUART_UCSR_RXCLKTIMER | MCFUART_UCSR_TXCLKTIMER; | 1852 | uartp[MCFUART_UCSR] = MCFUART_UCSR_RXCLKTIMER | MCFUART_UCSR_TXCLKTIMER; |
1805 | uartp[MCFUART_UCR] = MCFUART_UCR_RXENABLE | MCFUART_UCR_TXENABLE; | 1853 | uartp[MCFUART_UCR] = MCFUART_UCR_RXENABLE | MCFUART_UCR_TXENABLE; |
1806 | 1854 | ||