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authorPaul Mackerras <paulus@samba.org>2006-02-28 00:35:24 -0500
committerPaul Mackerras <paulus@samba.org>2006-02-28 00:35:24 -0500
commit6749c5507388f3fc3719f57a54b540ee83f6661a (patch)
treec069f990f86b020a14b50759d0c75475eedde186 /drivers
parent2cf82c0256b198ae28c465f2c4d7c12c836ea5ea (diff)
parent56ec6462af9cba56a04439154e5768672d6f390f (diff)
Merge ../powerpc-merge
Diffstat (limited to 'drivers')
-rw-r--r--drivers/acpi/Kconfig10
-rw-r--r--drivers/char/sx.c22
-rw-r--r--drivers/ieee1394/sbp2.c116
-rw-r--r--drivers/ieee1394/sbp2.h64
-rw-r--r--drivers/md/dm.c8
-rw-r--r--drivers/mtd/chips/cfi_cmdset_0001.c1
-rw-r--r--drivers/net/ifb.c2
-rw-r--r--drivers/net/r8169.c189
-rw-r--r--drivers/net/sis900.c4
-rw-r--r--drivers/net/skge.c75
-rw-r--r--drivers/net/skge.h1
-rw-r--r--drivers/net/sky2.c173
-rw-r--r--drivers/net/sky2.h83
-rw-r--r--drivers/net/tg3.c9
-rw-r--r--drivers/net/tlan.c2
-rw-r--r--drivers/scsi/libata-core.c4
-rw-r--r--drivers/scsi/libata-scsi.c2
-rw-r--r--drivers/scsi/libata.h1
-rw-r--r--drivers/scsi/sata_sil.c52
-rw-r--r--drivers/scsi/sd.c20
-rw-r--r--drivers/serial/8250.c6
-rw-r--r--drivers/video/Kconfig2
-rw-r--r--drivers/video/asiliantfb.c21
-rw-r--r--drivers/video/au1100fb.c3
-rw-r--r--drivers/video/console/vgacon.c67
-rw-r--r--drivers/video/gbefb.c3
26 files changed, 616 insertions, 324 deletions
diff --git a/drivers/acpi/Kconfig b/drivers/acpi/Kconfig
index 0cce28c4025b..33e2ca847a26 100644
--- a/drivers/acpi/Kconfig
+++ b/drivers/acpi/Kconfig
@@ -247,7 +247,7 @@ config ACPI_CUSTOM_DSDT_FILE
247 Enter the full path name to the file wich includes the AmlCode declaration. 247 Enter the full path name to the file wich includes the AmlCode declaration.
248 248
249config ACPI_BLACKLIST_YEAR 249config ACPI_BLACKLIST_YEAR
250 int "Disable ACPI for systems before Jan 1st this year" if X86 250 int "Disable ACPI for systems before Jan 1st this year" if X86_32
251 default 0 251 default 0
252 help 252 help
253 enter a 4-digit year, eg. 2001 to disable ACPI by default 253 enter a 4-digit year, eg. 2001 to disable ACPI by default
@@ -285,9 +285,8 @@ config ACPI_SYSTEM
285 dump your ACPI DSDT table using /proc/acpi/dsdt. 285 dump your ACPI DSDT table using /proc/acpi/dsdt.
286 286
287config X86_PM_TIMER 287config X86_PM_TIMER
288 bool "Power Management Timer Support" 288 bool "Power Management Timer Support" if EMBEDDED
289 depends on X86 289 depends on X86
290 depends on !X86_64
291 default y 290 default y
292 help 291 help
293 The Power Management Timer is available on all ACPI-capable, 292 The Power Management Timer is available on all ACPI-capable,
@@ -298,9 +297,8 @@ config X86_PM_TIMER
298 voltage scaling, unlike the commonly used Time Stamp Counter 297 voltage scaling, unlike the commonly used Time Stamp Counter
299 (TSC) timing source. 298 (TSC) timing source.
300 299
301 So, if you see messages like 'Losing too many ticks!' in the 300 You should nearly always say Y here because many modern
302 kernel logs, and/or you are using this on a notebook which 301 systems require this timer.
303 does not yet have an HPET, you should say "Y" here.
304 302
305config ACPI_CONTAINER 303config ACPI_CONTAINER
306 tristate "ACPI0004,PNP0A05 and PNP0A06 Container Driver (EXPERIMENTAL)" 304 tristate "ACPI0004,PNP0A05 and PNP0A06 Container Driver (EXPERIMENTAL)"
diff --git a/drivers/char/sx.c b/drivers/char/sx.c
index c2490e270f1f..a6b4f02bdceb 100644
--- a/drivers/char/sx.c
+++ b/drivers/char/sx.c
@@ -1095,17 +1095,17 @@ static inline void sx_receive_chars (struct sx_port *port)
1095 1095
1096 sx_dprintk (SX_DEBUG_RECEIVE, "rxop=%d, c = %d.\n", rx_op, c); 1096 sx_dprintk (SX_DEBUG_RECEIVE, "rxop=%d, c = %d.\n", rx_op, c);
1097 1097
1098 /* Don't copy past the end of the hardware receive buffer */
1099 if (rx_op + c > 0x100) c = 0x100 - rx_op;
1100
1101 sx_dprintk (SX_DEBUG_RECEIVE, "c = %d.\n", c);
1102
1098 /* Don't copy more bytes than there is room for in the buffer */ 1103 /* Don't copy more bytes than there is room for in the buffer */
1099 1104
1100 c = tty_prepare_flip_string(tty, &rp, c); 1105 c = tty_prepare_flip_string(tty, &rp, c);
1101 1106
1102 sx_dprintk (SX_DEBUG_RECEIVE, "c = %d.\n", c); 1107 sx_dprintk (SX_DEBUG_RECEIVE, "c = %d.\n", c);
1103 1108
1104 /* Don't copy past the end of the hardware receive buffer */
1105 if (rx_op + c > 0x100) c = 0x100 - rx_op;
1106
1107 sx_dprintk (SX_DEBUG_RECEIVE, "c = %d.\n", c);
1108
1109 /* If for one reason or another, we can't copy more data, we're done! */ 1109 /* If for one reason or another, we can't copy more data, we're done! */
1110 if (c == 0) break; 1110 if (c == 0) break;
1111 1111
@@ -2173,15 +2173,17 @@ static int probe_si (struct sx_board *board)
2173 if ( IS_SI1_BOARD(board)) { 2173 if ( IS_SI1_BOARD(board)) {
2174 /* This should be an SI1 board, which has this 2174 /* This should be an SI1 board, which has this
2175 location writable... */ 2175 location writable... */
2176 if (read_sx_byte (board, SI2_ISA_ID_BASE) != 0x10) 2176 if (read_sx_byte (board, SI2_ISA_ID_BASE) != 0x10) {
2177 func_exit (); 2177 func_exit ();
2178 return 0; 2178 return 0;
2179 }
2179 } else { 2180 } else {
2180 /* This should be an SI2 board, which has the bottom 2181 /* This should be an SI2 board, which has the bottom
2181 3 bits non-writable... */ 2182 3 bits non-writable... */
2182 if (read_sx_byte (board, SI2_ISA_ID_BASE) == 0x10) 2183 if (read_sx_byte (board, SI2_ISA_ID_BASE) == 0x10) {
2183 func_exit (); 2184 func_exit ();
2184 return 0; 2185 return 0;
2186 }
2185 } 2187 }
2186 2188
2187 /* Now we're pretty much convinced that there is an SI board here, 2189 /* Now we're pretty much convinced that there is an SI board here,
@@ -2192,15 +2194,17 @@ static int probe_si (struct sx_board *board)
2192 if ( IS_SI1_BOARD(board)) { 2194 if ( IS_SI1_BOARD(board)) {
2193 /* This should be an SI1 board, which has this 2195 /* This should be an SI1 board, which has this
2194 location writable... */ 2196 location writable... */
2195 if (read_sx_byte (board, SI2_ISA_ID_BASE) != 0x10) 2197 if (read_sx_byte (board, SI2_ISA_ID_BASE) != 0x10) {
2196 func_exit(); 2198 func_exit();
2197 return 0; 2199 return 0;
2200 }
2198 } else { 2201 } else {
2199 /* This should be an SI2 board, which has the bottom 2202 /* This should be an SI2 board, which has the bottom
2200 3 bits non-writable... */ 2203 3 bits non-writable... */
2201 if (read_sx_byte (board, SI2_ISA_ID_BASE) == 0x10) 2204 if (read_sx_byte (board, SI2_ISA_ID_BASE) == 0x10) {
2202 func_exit (); 2205 func_exit ();
2203 return 0; 2206 return 0;
2207 }
2204 } 2208 }
2205 2209
2206 printheader (); 2210 printheader ();
diff --git a/drivers/ieee1394/sbp2.c b/drivers/ieee1394/sbp2.c
index c2c776fbda01..eca92eb475a1 100644
--- a/drivers/ieee1394/sbp2.c
+++ b/drivers/ieee1394/sbp2.c
@@ -137,15 +137,15 @@ MODULE_PARM_DESC(exclusive_login, "Exclusive login to sbp2 device (default = 1)"
137/* 137/*
138 * SCSI inquiry hack for really badly behaved sbp2 devices. Turn this on 138 * SCSI inquiry hack for really badly behaved sbp2 devices. Turn this on
139 * if your sbp2 device is not properly handling the SCSI inquiry command. 139 * if your sbp2 device is not properly handling the SCSI inquiry command.
140 * This hack makes the inquiry look more like a typical MS Windows 140 * This hack makes the inquiry look more like a typical MS Windows inquiry
141 * inquiry. 141 * by enforcing 36 byte inquiry and avoiding access to mode_sense page 8.
142 * 142 *
143 * If force_inquiry_hack=1 is required for your device to work, 143 * If force_inquiry_hack=1 is required for your device to work,
144 * please submit the logged sbp2_firmware_revision value of this device to 144 * please submit the logged sbp2_firmware_revision value of this device to
145 * the linux1394-devel mailing list. 145 * the linux1394-devel mailing list.
146 */ 146 */
147static int force_inquiry_hack; 147static int force_inquiry_hack;
148module_param(force_inquiry_hack, int, 0444); 148module_param(force_inquiry_hack, int, 0644);
149MODULE_PARM_DESC(force_inquiry_hack, "Force SCSI inquiry hack (default = 0)"); 149MODULE_PARM_DESC(force_inquiry_hack, "Force SCSI inquiry hack (default = 0)");
150 150
151/* 151/*
@@ -264,18 +264,17 @@ static struct hpsb_protocol_driver sbp2_driver = {
264 }, 264 },
265}; 265};
266 266
267 267/*
268/* List of device firmware's that require a forced 36 byte inquiry. */ 268 * List of device firmwares that require the inquiry hack.
269 * Yields a few false positives but did not break other devices so far.
270 */
269static u32 sbp2_broken_inquiry_list[] = { 271static u32 sbp2_broken_inquiry_list[] = {
270 0x00002800, /* Stefan Richter <richtest@bauwesen.tu-cottbus.de> */ 272 0x00002800, /* Stefan Richter <stefanr@s5r6.in-berlin.de> */
271 /* DViCO Momobay CX-1 */ 273 /* DViCO Momobay CX-1 */
272 0x00000200 /* Andreas Plesch <plesch@fas.harvard.edu> */ 274 0x00000200 /* Andreas Plesch <plesch@fas.harvard.edu> */
273 /* QPS Fire DVDBurner */ 275 /* QPS Fire DVDBurner */
274}; 276};
275 277
276#define NUM_BROKEN_INQUIRY_DEVS \
277 (sizeof(sbp2_broken_inquiry_list)/sizeof(*sbp2_broken_inquiry_list))
278
279/************************************** 278/**************************************
280 * General utility functions 279 * General utility functions
281 **************************************/ 280 **************************************/
@@ -643,9 +642,15 @@ static int sbp2_remove(struct device *dev)
643 if (!scsi_id) 642 if (!scsi_id)
644 return 0; 643 return 0;
645 644
646 /* Trigger shutdown functions in scsi's highlevel. */ 645 if (scsi_id->scsi_host) {
647 if (scsi_id->scsi_host) 646 /* Get rid of enqueued commands if there is no chance to
647 * send them. */
648 if (!sbp2util_node_is_available(scsi_id))
649 sbp2scsi_complete_all_commands(scsi_id, DID_NO_CONNECT);
650 /* scsi_remove_device() will trigger shutdown functions of SCSI
651 * highlevel drivers which would deadlock if blocked. */
648 scsi_unblock_requests(scsi_id->scsi_host); 652 scsi_unblock_requests(scsi_id->scsi_host);
653 }
649 sdev = scsi_id->sdev; 654 sdev = scsi_id->sdev;
650 if (sdev) { 655 if (sdev) {
651 scsi_id->sdev = NULL; 656 scsi_id->sdev = NULL;
@@ -742,11 +747,6 @@ static struct scsi_id_instance_data *sbp2_alloc_device(struct unit_directory *ud
742 hi->host = ud->ne->host; 747 hi->host = ud->ne->host;
743 INIT_LIST_HEAD(&hi->scsi_ids); 748 INIT_LIST_HEAD(&hi->scsi_ids);
744 749
745 /* Register our sbp2 status address space... */
746 hpsb_register_addrspace(&sbp2_highlevel, ud->ne->host, &sbp2_ops,
747 SBP2_STATUS_FIFO_ADDRESS,
748 SBP2_STATUS_FIFO_ADDRESS +
749 SBP2_STATUS_FIFO_ENTRY_TO_OFFSET(SBP2_MAX_UDS_PER_NODE+1));
750#ifdef CONFIG_IEEE1394_SBP2_PHYS_DMA 750#ifdef CONFIG_IEEE1394_SBP2_PHYS_DMA
751 /* Handle data movement if physical dma is not 751 /* Handle data movement if physical dma is not
752 * enabled/supportedon host controller */ 752 * enabled/supportedon host controller */
@@ -759,6 +759,18 @@ static struct scsi_id_instance_data *sbp2_alloc_device(struct unit_directory *ud
759 759
760 list_add_tail(&scsi_id->scsi_list, &hi->scsi_ids); 760 list_add_tail(&scsi_id->scsi_list, &hi->scsi_ids);
761 761
762 /* Register the status FIFO address range. We could use the same FIFO
763 * for targets at different nodes. However we need different FIFOs per
764 * target in order to support multi-unit devices. */
765 scsi_id->status_fifo_addr = hpsb_allocate_and_register_addrspace(
766 &sbp2_highlevel, ud->ne->host, &sbp2_ops,
767 sizeof(struct sbp2_status_block), sizeof(quadlet_t),
768 ~0ULL, ~0ULL);
769 if (!scsi_id->status_fifo_addr) {
770 SBP2_ERR("failed to allocate status FIFO address range");
771 goto failed_alloc;
772 }
773
762 /* Register our host with the SCSI stack. */ 774 /* Register our host with the SCSI stack. */
763 scsi_host = scsi_host_alloc(&scsi_driver_template, 775 scsi_host = scsi_host_alloc(&scsi_driver_template,
764 sizeof(unsigned long)); 776 sizeof(unsigned long));
@@ -997,6 +1009,10 @@ static void sbp2_remove_device(struct scsi_id_instance_data *scsi_id)
997 SBP2_DMA_FREE("single query logins data"); 1009 SBP2_DMA_FREE("single query logins data");
998 } 1010 }
999 1011
1012 if (scsi_id->status_fifo_addr)
1013 hpsb_unregister_addrspace(&sbp2_highlevel, hi->host,
1014 scsi_id->status_fifo_addr);
1015
1000 scsi_id->ud->device.driver_data = NULL; 1016 scsi_id->ud->device.driver_data = NULL;
1001 1017
1002 SBP2_DEBUG("SBP-2 device removed, SCSI ID = %d", scsi_id->ud->id); 1018 SBP2_DEBUG("SBP-2 device removed, SCSI ID = %d", scsi_id->ud->id);
@@ -1075,11 +1091,10 @@ static int sbp2_query_logins(struct scsi_id_instance_data *scsi_id)
1075 ORB_SET_QUERY_LOGINS_RESP_LENGTH(sizeof(struct sbp2_query_logins_response)); 1091 ORB_SET_QUERY_LOGINS_RESP_LENGTH(sizeof(struct sbp2_query_logins_response));
1076 SBP2_DEBUG("sbp2_query_logins: reserved_resp_length initialized"); 1092 SBP2_DEBUG("sbp2_query_logins: reserved_resp_length initialized");
1077 1093
1078 scsi_id->query_logins_orb->status_FIFO_lo = SBP2_STATUS_FIFO_ADDRESS_LO + 1094 scsi_id->query_logins_orb->status_fifo_hi =
1079 SBP2_STATUS_FIFO_ENTRY_TO_OFFSET(scsi_id->ud->id); 1095 ORB_SET_STATUS_FIFO_HI(scsi_id->status_fifo_addr, hi->host->node_id);
1080 scsi_id->query_logins_orb->status_FIFO_hi = (ORB_SET_NODE_ID(hi->host->node_id) | 1096 scsi_id->query_logins_orb->status_fifo_lo =
1081 SBP2_STATUS_FIFO_ADDRESS_HI); 1097 ORB_SET_STATUS_FIFO_LO(scsi_id->status_fifo_addr);
1082 SBP2_DEBUG("sbp2_query_logins: status FIFO initialized");
1083 1098
1084 sbp2util_cpu_to_be32_buffer(scsi_id->query_logins_orb, sizeof(struct sbp2_query_logins_orb)); 1099 sbp2util_cpu_to_be32_buffer(scsi_id->query_logins_orb, sizeof(struct sbp2_query_logins_orb));
1085 1100
@@ -1184,11 +1199,10 @@ static int sbp2_login_device(struct scsi_id_instance_data *scsi_id)
1184 ORB_SET_LOGIN_RESP_LENGTH(sizeof(struct sbp2_login_response)); 1199 ORB_SET_LOGIN_RESP_LENGTH(sizeof(struct sbp2_login_response));
1185 SBP2_DEBUG("sbp2_login_device: passwd_resp_lengths initialized"); 1200 SBP2_DEBUG("sbp2_login_device: passwd_resp_lengths initialized");
1186 1201
1187 scsi_id->login_orb->status_FIFO_lo = SBP2_STATUS_FIFO_ADDRESS_LO + 1202 scsi_id->login_orb->status_fifo_hi =
1188 SBP2_STATUS_FIFO_ENTRY_TO_OFFSET(scsi_id->ud->id); 1203 ORB_SET_STATUS_FIFO_HI(scsi_id->status_fifo_addr, hi->host->node_id);
1189 scsi_id->login_orb->status_FIFO_hi = (ORB_SET_NODE_ID(hi->host->node_id) | 1204 scsi_id->login_orb->status_fifo_lo =
1190 SBP2_STATUS_FIFO_ADDRESS_HI); 1205 ORB_SET_STATUS_FIFO_LO(scsi_id->status_fifo_addr);
1191 SBP2_DEBUG("sbp2_login_device: status FIFO initialized");
1192 1206
1193 /* 1207 /*
1194 * Byte swap ORB if necessary 1208 * Byte swap ORB if necessary
@@ -1301,10 +1315,10 @@ static int sbp2_logout_device(struct scsi_id_instance_data *scsi_id)
1301 scsi_id->logout_orb->login_ID_misc |= ORB_SET_NOTIFY(1); 1315 scsi_id->logout_orb->login_ID_misc |= ORB_SET_NOTIFY(1);
1302 1316
1303 scsi_id->logout_orb->reserved5 = 0x0; 1317 scsi_id->logout_orb->reserved5 = 0x0;
1304 scsi_id->logout_orb->status_FIFO_lo = SBP2_STATUS_FIFO_ADDRESS_LO + 1318 scsi_id->logout_orb->status_fifo_hi =
1305 SBP2_STATUS_FIFO_ENTRY_TO_OFFSET(scsi_id->ud->id); 1319 ORB_SET_STATUS_FIFO_HI(scsi_id->status_fifo_addr, hi->host->node_id);
1306 scsi_id->logout_orb->status_FIFO_hi = (ORB_SET_NODE_ID(hi->host->node_id) | 1320 scsi_id->logout_orb->status_fifo_lo =
1307 SBP2_STATUS_FIFO_ADDRESS_HI); 1321 ORB_SET_STATUS_FIFO_LO(scsi_id->status_fifo_addr);
1308 1322
1309 /* 1323 /*
1310 * Byte swap ORB if necessary 1324 * Byte swap ORB if necessary
@@ -1366,10 +1380,10 @@ static int sbp2_reconnect_device(struct scsi_id_instance_data *scsi_id)
1366 scsi_id->reconnect_orb->login_ID_misc |= ORB_SET_NOTIFY(1); 1380 scsi_id->reconnect_orb->login_ID_misc |= ORB_SET_NOTIFY(1);
1367 1381
1368 scsi_id->reconnect_orb->reserved5 = 0x0; 1382 scsi_id->reconnect_orb->reserved5 = 0x0;
1369 scsi_id->reconnect_orb->status_FIFO_lo = SBP2_STATUS_FIFO_ADDRESS_LO + 1383 scsi_id->reconnect_orb->status_fifo_hi =
1370 SBP2_STATUS_FIFO_ENTRY_TO_OFFSET(scsi_id->ud->id); 1384 ORB_SET_STATUS_FIFO_HI(scsi_id->status_fifo_addr, hi->host->node_id);
1371 scsi_id->reconnect_orb->status_FIFO_hi = 1385 scsi_id->reconnect_orb->status_fifo_lo =
1372 (ORB_SET_NODE_ID(hi->host->node_id) | SBP2_STATUS_FIFO_ADDRESS_HI); 1386 ORB_SET_STATUS_FIFO_LO(scsi_id->status_fifo_addr);
1373 1387
1374 /* 1388 /*
1375 * Byte swap ORB if necessary 1389 * Byte swap ORB if necessary
@@ -1560,7 +1574,7 @@ static void sbp2_parse_unit_directory(struct scsi_id_instance_data *scsi_id,
1560 /* Check for a blacklisted set of devices that require us to force 1574 /* Check for a blacklisted set of devices that require us to force
1561 * a 36 byte host inquiry. This can be overriden as a module param 1575 * a 36 byte host inquiry. This can be overriden as a module param
1562 * (to force all hosts). */ 1576 * (to force all hosts). */
1563 for (i = 0; i < NUM_BROKEN_INQUIRY_DEVS; i++) { 1577 for (i = 0; i < ARRAY_SIZE(sbp2_broken_inquiry_list); i++) {
1564 if ((firmware_revision & 0xffff00) == 1578 if ((firmware_revision & 0xffff00) ==
1565 sbp2_broken_inquiry_list[i]) { 1579 sbp2_broken_inquiry_list[i]) {
1566 SBP2_WARN("Node " NODE_BUS_FMT ": Using 36byte inquiry workaround", 1580 SBP2_WARN("Node " NODE_BUS_FMT ": Using 36byte inquiry workaround",
@@ -2007,18 +2021,6 @@ static int sbp2_send_command(struct scsi_id_instance_data *scsi_id,
2007 } 2021 }
2008 2022
2009 /* 2023 /*
2010 * The scsi stack sends down a request_bufflen which does not match the
2011 * length field in the scsi cdb. This causes some sbp2 devices to
2012 * reject this inquiry command. Fix the request_bufflen.
2013 */
2014 if (*cmd == INQUIRY) {
2015 if (force_inquiry_hack || scsi_id->workarounds & SBP2_BREAKAGE_INQUIRY_HACK)
2016 request_bufflen = cmd[4] = 0x24;
2017 else
2018 request_bufflen = cmd[4];
2019 }
2020
2021 /*
2022 * Now actually fill in the comamnd orb and sbp2 s/g list 2024 * Now actually fill in the comamnd orb and sbp2 s/g list
2023 */ 2025 */
2024 sbp2_create_command_orb(scsi_id, command, cmd, SCpnt->use_sg, 2026 sbp2_create_command_orb(scsi_id, command, cmd, SCpnt->use_sg,
@@ -2106,7 +2108,6 @@ static int sbp2_handle_status_write(struct hpsb_host *host, int nodeid, int dest
2106{ 2108{
2107 struct sbp2scsi_host_info *hi; 2109 struct sbp2scsi_host_info *hi;
2108 struct scsi_id_instance_data *scsi_id = NULL, *scsi_id_tmp; 2110 struct scsi_id_instance_data *scsi_id = NULL, *scsi_id_tmp;
2109 u32 id;
2110 struct scsi_cmnd *SCpnt = NULL; 2111 struct scsi_cmnd *SCpnt = NULL;
2111 u32 scsi_status = SBP2_SCSI_STATUS_GOOD; 2112 u32 scsi_status = SBP2_SCSI_STATUS_GOOD;
2112 struct sbp2_command_info *command; 2113 struct sbp2_command_info *command;
@@ -2129,12 +2130,12 @@ static int sbp2_handle_status_write(struct hpsb_host *host, int nodeid, int dest
2129 } 2130 }
2130 2131
2131 /* 2132 /*
2132 * Find our scsi_id structure by looking at the status fifo address written to by 2133 * Find our scsi_id structure by looking at the status fifo address
2133 * the sbp2 device. 2134 * written to by the sbp2 device.
2134 */ 2135 */
2135 id = SBP2_STATUS_FIFO_OFFSET_TO_ENTRY((u32)(addr - SBP2_STATUS_FIFO_ADDRESS));
2136 list_for_each_entry(scsi_id_tmp, &hi->scsi_ids, scsi_list) { 2136 list_for_each_entry(scsi_id_tmp, &hi->scsi_ids, scsi_list) {
2137 if (scsi_id_tmp->ne->nodeid == nodeid && scsi_id_tmp->ud->id == id) { 2137 if (scsi_id_tmp->ne->nodeid == nodeid &&
2138 scsi_id_tmp->status_fifo_addr == addr) {
2138 scsi_id = scsi_id_tmp; 2139 scsi_id = scsi_id_tmp;
2139 break; 2140 break;
2140 } 2141 }
@@ -2475,7 +2476,16 @@ static void sbp2scsi_complete_command(struct scsi_id_instance_data *scsi_id,
2475 2476
2476static int sbp2scsi_slave_alloc(struct scsi_device *sdev) 2477static int sbp2scsi_slave_alloc(struct scsi_device *sdev)
2477{ 2478{
2478 ((struct scsi_id_instance_data *)sdev->host->hostdata[0])->sdev = sdev; 2479 struct scsi_id_instance_data *scsi_id =
2480 (struct scsi_id_instance_data *)sdev->host->hostdata[0];
2481
2482 scsi_id->sdev = sdev;
2483
2484 if (force_inquiry_hack ||
2485 scsi_id->workarounds & SBP2_BREAKAGE_INQUIRY_HACK) {
2486 sdev->inquiry_len = 36;
2487 sdev->skip_ms_page_8 = 1;
2488 }
2479 return 0; 2489 return 0;
2480} 2490}
2481 2491
diff --git a/drivers/ieee1394/sbp2.h b/drivers/ieee1394/sbp2.h
index 900ea1d25e71..e2d357a9ea3a 100644
--- a/drivers/ieee1394/sbp2.h
+++ b/drivers/ieee1394/sbp2.h
@@ -33,15 +33,17 @@
33#define ORB_DIRECTION_NO_DATA_TRANSFER 0x2 33#define ORB_DIRECTION_NO_DATA_TRANSFER 0x2
34 34
35#define ORB_SET_NULL_PTR(value) ((value & 0x1) << 31) 35#define ORB_SET_NULL_PTR(value) ((value & 0x1) << 31)
36#define ORB_SET_NOTIFY(value) ((value & 0x1) << 31) 36#define ORB_SET_NOTIFY(value) ((value & 0x1) << 31)
37#define ORB_SET_RQ_FMT(value) ((value & 0x3) << 29) /* unused ? */ 37#define ORB_SET_RQ_FMT(value) ((value & 0x3) << 29) /* unused ? */
38#define ORB_SET_NODE_ID(value) ((value & 0xffff) << 16) 38#define ORB_SET_NODE_ID(value) ((value & 0xffff) << 16)
39#define ORB_SET_DATA_SIZE(value) (value & 0xffff) 39#define ORB_SET_STATUS_FIFO_HI(value, id) (value >> 32 | ORB_SET_NODE_ID(id))
40#define ORB_SET_PAGE_SIZE(value) ((value & 0x7) << 16) 40#define ORB_SET_STATUS_FIFO_LO(value) (value & 0xffffffff)
41#define ORB_SET_PAGE_TABLE_PRESENT(value) ((value & 0x1) << 19) 41#define ORB_SET_DATA_SIZE(value) (value & 0xffff)
42#define ORB_SET_MAX_PAYLOAD(value) ((value & 0xf) << 20) 42#define ORB_SET_PAGE_SIZE(value) ((value & 0x7) << 16)
43#define ORB_SET_SPEED(value) ((value & 0x7) << 24) 43#define ORB_SET_PAGE_TABLE_PRESENT(value) ((value & 0x1) << 19)
44#define ORB_SET_DIRECTION(value) ((value & 0x1) << 27) 44#define ORB_SET_MAX_PAYLOAD(value) ((value & 0xf) << 20)
45#define ORB_SET_SPEED(value) ((value & 0x7) << 24)
46#define ORB_SET_DIRECTION(value) ((value & 0x1) << 27)
45 47
46struct sbp2_command_orb { 48struct sbp2_command_orb {
47 volatile u32 next_ORB_hi; 49 volatile u32 next_ORB_hi;
@@ -76,8 +78,8 @@ struct sbp2_login_orb {
76 u32 login_response_lo; 78 u32 login_response_lo;
77 u32 lun_misc; 79 u32 lun_misc;
78 u32 passwd_resp_lengths; 80 u32 passwd_resp_lengths;
79 u32 status_FIFO_hi; 81 u32 status_fifo_hi;
80 u32 status_FIFO_lo; 82 u32 status_fifo_lo;
81}; 83};
82 84
83#define RESPONSE_GET_LOGIN_ID(value) (value & 0xffff) 85#define RESPONSE_GET_LOGIN_ID(value) (value & 0xffff)
@@ -102,8 +104,8 @@ struct sbp2_query_logins_orb {
102 u32 query_response_lo; 104 u32 query_response_lo;
103 u32 lun_misc; 105 u32 lun_misc;
104 u32 reserved_resp_length; 106 u32 reserved_resp_length;
105 u32 status_FIFO_hi; 107 u32 status_fifo_hi;
106 u32 status_FIFO_lo; 108 u32 status_fifo_lo;
107}; 109};
108 110
109#define RESPONSE_GET_MAX_LOGINS(value) (value & 0xffff) 111#define RESPONSE_GET_MAX_LOGINS(value) (value & 0xffff)
@@ -123,8 +125,8 @@ struct sbp2_reconnect_orb {
123 u32 reserved4; 125 u32 reserved4;
124 u32 login_ID_misc; 126 u32 login_ID_misc;
125 u32 reserved5; 127 u32 reserved5;
126 u32 status_FIFO_hi; 128 u32 status_fifo_hi;
127 u32 status_FIFO_lo; 129 u32 status_fifo_lo;
128}; 130};
129 131
130struct sbp2_logout_orb { 132struct sbp2_logout_orb {
@@ -134,8 +136,8 @@ struct sbp2_logout_orb {
134 u32 reserved4; 136 u32 reserved4;
135 u32 login_ID_misc; 137 u32 login_ID_misc;
136 u32 reserved5; 138 u32 reserved5;
137 u32 status_FIFO_hi; 139 u32 status_fifo_hi;
138 u32 status_FIFO_lo; 140 u32 status_fifo_lo;
139}; 141};
140 142
141#define PAGE_TABLE_SET_SEGMENT_BASE_HI(value) (value & 0xffff) 143#define PAGE_TABLE_SET_SEGMENT_BASE_HI(value) (value & 0xffff)
@@ -195,30 +197,6 @@ struct sbp2_status_block {
195 * Miscellaneous SBP2 related config rom defines 197 * Miscellaneous SBP2 related config rom defines
196 */ 198 */
197 199
198/* The status fifo address definition below is used as a base for each
199 * node, which a chunk seperately assigned to each unit directory in the
200 * node. For example, 0xfffe00000000ULL is used for the first sbp2 device
201 * detected on node 0, 0xfffe00000020ULL for the next sbp2 device on node
202 * 0, and so on.
203 *
204 * Note: We could use a single status fifo address for all sbp2 devices,
205 * and figure out which sbp2 device the status belongs to by looking at
206 * the source node id of the status write... but, using separate addresses
207 * for each sbp2 unit directory allows for better code and the ability to
208 * support multiple luns within a single 1394 node.
209 *
210 * Also note that we choose the address range below as it is a region
211 * specified for write posting, where the ohci controller will
212 * automatically send an ack_complete when the status is written by the
213 * sbp2 device... saving a split transaction. =)
214 */
215#define SBP2_STATUS_FIFO_ADDRESS 0xfffe00000000ULL
216#define SBP2_STATUS_FIFO_ADDRESS_HI 0xfffe
217#define SBP2_STATUS_FIFO_ADDRESS_LO 0x0
218
219#define SBP2_STATUS_FIFO_ENTRY_TO_OFFSET(entry) ((entry) << 5)
220#define SBP2_STATUS_FIFO_OFFSET_TO_ENTRY(offset) ((offset) >> 5)
221
222#define SBP2_UNIT_DIRECTORY_OFFSET_KEY 0xd1 200#define SBP2_UNIT_DIRECTORY_OFFSET_KEY 0xd1
223#define SBP2_CSR_OFFSET_KEY 0x54 201#define SBP2_CSR_OFFSET_KEY 0x54
224#define SBP2_UNIT_SPEC_ID_KEY 0x12 202#define SBP2_UNIT_SPEC_ID_KEY 0x12
@@ -258,7 +236,6 @@ struct sbp2_status_block {
258 */ 236 */
259 237
260#define SBP2_MAX_SG_ELEMENT_LENGTH 0xf000 238#define SBP2_MAX_SG_ELEMENT_LENGTH 0xf000
261#define SBP2_MAX_UDS_PER_NODE 16 /* Maximum scsi devices per node */
262#define SBP2_MAX_SECTORS 255 /* Max sectors supported */ 239#define SBP2_MAX_SECTORS 255 /* Max sectors supported */
263#define SBP2_MAX_CMDS 8 /* This should be safe */ 240#define SBP2_MAX_CMDS 8 /* This should be safe */
264 241
@@ -338,6 +315,11 @@ struct scsi_id_instance_data {
338 u32 sbp2_firmware_revision; 315 u32 sbp2_firmware_revision;
339 316
340 /* 317 /*
318 * Address for the device to write status blocks to
319 */
320 u64 status_fifo_addr;
321
322 /*
341 * Variable used for logins, reconnects, logouts, query logins 323 * Variable used for logins, reconnects, logouts, query logins
342 */ 324 */
343 atomic_t sbp2_login_complete; 325 atomic_t sbp2_login_complete;
diff --git a/drivers/md/dm.c b/drivers/md/dm.c
index e9adeb9d172f..745ca1f67b14 100644
--- a/drivers/md/dm.c
+++ b/drivers/md/dm.c
@@ -849,10 +849,16 @@ static struct mapped_device *alloc_dev(unsigned int minor, int persistent)
849 849
850static void free_dev(struct mapped_device *md) 850static void free_dev(struct mapped_device *md)
851{ 851{
852 free_minor(md->disk->first_minor); 852 unsigned int minor = md->disk->first_minor;
853
854 if (md->suspended_bdev) {
855 thaw_bdev(md->suspended_bdev, NULL);
856 bdput(md->suspended_bdev);
857 }
853 mempool_destroy(md->tio_pool); 858 mempool_destroy(md->tio_pool);
854 mempool_destroy(md->io_pool); 859 mempool_destroy(md->io_pool);
855 del_gendisk(md->disk); 860 del_gendisk(md->disk);
861 free_minor(minor);
856 put_disk(md->disk); 862 put_disk(md->disk);
857 blk_put_queue(md->queue); 863 blk_put_queue(md->queue);
858 kfree(md); 864 kfree(md);
diff --git a/drivers/mtd/chips/cfi_cmdset_0001.c b/drivers/mtd/chips/cfi_cmdset_0001.c
index ded2c33f5b85..1c074d63ff3a 100644
--- a/drivers/mtd/chips/cfi_cmdset_0001.c
+++ b/drivers/mtd/chips/cfi_cmdset_0001.c
@@ -408,6 +408,7 @@ struct mtd_info *cfi_cmdset_0001(struct map_info *map, int primary)
408 cfi->chips[i].buffer_write_time = 1<<cfi->cfiq->BufWriteTimeoutTyp; 408 cfi->chips[i].buffer_write_time = 1<<cfi->cfiq->BufWriteTimeoutTyp;
409 cfi->chips[i].erase_time = 1<<cfi->cfiq->BlockEraseTimeoutTyp; 409 cfi->chips[i].erase_time = 1<<cfi->cfiq->BlockEraseTimeoutTyp;
410 cfi->chips[i].ref_point_counter = 0; 410 cfi->chips[i].ref_point_counter = 0;
411 init_waitqueue_head(&(cfi->chips[i].wq));
411 } 412 }
412 413
413 map->fldrv = &cfi_intelext_chipdrv; 414 map->fldrv = &cfi_intelext_chipdrv;
diff --git a/drivers/net/ifb.c b/drivers/net/ifb.c
index 1b699259b4ec..31fb2d75dc44 100644
--- a/drivers/net/ifb.c
+++ b/drivers/net/ifb.c
@@ -57,7 +57,7 @@ struct ifb_private {
57 struct sk_buff_head tq; 57 struct sk_buff_head tq;
58}; 58};
59 59
60static int numifbs = 1; 60static int numifbs = 2;
61 61
62static void ri_tasklet(unsigned long dev); 62static void ri_tasklet(unsigned long dev);
63static int ifb_xmit(struct sk_buff *skb, struct net_device *dev); 63static int ifb_xmit(struct sk_buff *skb, struct net_device *dev);
diff --git a/drivers/net/r8169.c b/drivers/net/r8169.c
index 6e1018448eea..8cc0d0bbdf50 100644
--- a/drivers/net/r8169.c
+++ b/drivers/net/r8169.c
@@ -287,6 +287,20 @@ enum RTL8169_register_content {
287 TxInterFrameGapShift = 24, 287 TxInterFrameGapShift = 24,
288 TxDMAShift = 8, /* DMA burst value (0-7) is shift this many bits */ 288 TxDMAShift = 8, /* DMA burst value (0-7) is shift this many bits */
289 289
290 /* Config1 register p.24 */
291 PMEnable = (1 << 0), /* Power Management Enable */
292
293 /* Config3 register p.25 */
294 MagicPacket = (1 << 5), /* Wake up when receives a Magic Packet */
295 LinkUp = (1 << 4), /* Wake up when the cable connection is re-established */
296
297 /* Config5 register p.27 */
298 BWF = (1 << 6), /* Accept Broadcast wakeup frame */
299 MWF = (1 << 5), /* Accept Multicast wakeup frame */
300 UWF = (1 << 4), /* Accept Unicast wakeup frame */
301 LanWake = (1 << 1), /* LanWake enable/disable */
302 PMEStatus = (1 << 0), /* PME status can be reset by PCI RST# */
303
290 /* TBICSR p.28 */ 304 /* TBICSR p.28 */
291 TBIReset = 0x80000000, 305 TBIReset = 0x80000000,
292 TBILoopback = 0x40000000, 306 TBILoopback = 0x40000000,
@@ -433,6 +447,7 @@ struct rtl8169_private {
433 unsigned int (*phy_reset_pending)(void __iomem *); 447 unsigned int (*phy_reset_pending)(void __iomem *);
434 unsigned int (*link_ok)(void __iomem *); 448 unsigned int (*link_ok)(void __iomem *);
435 struct work_struct task; 449 struct work_struct task;
450 unsigned wol_enabled : 1;
436}; 451};
437 452
438MODULE_AUTHOR("Realtek and the Linux r8169 crew <netdev@vger.kernel.org>"); 453MODULE_AUTHOR("Realtek and the Linux r8169 crew <netdev@vger.kernel.org>");
@@ -607,6 +622,80 @@ static void rtl8169_link_option(int idx, u8 *autoneg, u16 *speed, u8 *duplex)
607 *duplex = p->duplex; 622 *duplex = p->duplex;
608} 623}
609 624
625static void rtl8169_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
626{
627 struct rtl8169_private *tp = netdev_priv(dev);
628 void __iomem *ioaddr = tp->mmio_addr;
629 u8 options;
630
631 wol->wolopts = 0;
632
633#define WAKE_ANY (WAKE_PHY | WAKE_MAGIC | WAKE_UCAST | WAKE_BCAST | WAKE_MCAST)
634 wol->supported = WAKE_ANY;
635
636 spin_lock_irq(&tp->lock);
637
638 options = RTL_R8(Config1);
639 if (!(options & PMEnable))
640 goto out_unlock;
641
642 options = RTL_R8(Config3);
643 if (options & LinkUp)
644 wol->wolopts |= WAKE_PHY;
645 if (options & MagicPacket)
646 wol->wolopts |= WAKE_MAGIC;
647
648 options = RTL_R8(Config5);
649 if (options & UWF)
650 wol->wolopts |= WAKE_UCAST;
651 if (options & BWF)
652 wol->wolopts |= WAKE_BCAST;
653 if (options & MWF)
654 wol->wolopts |= WAKE_MCAST;
655
656out_unlock:
657 spin_unlock_irq(&tp->lock);
658}
659
660static int rtl8169_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
661{
662 struct rtl8169_private *tp = netdev_priv(dev);
663 void __iomem *ioaddr = tp->mmio_addr;
664 int i;
665 static struct {
666 u32 opt;
667 u16 reg;
668 u8 mask;
669 } cfg[] = {
670 { WAKE_ANY, Config1, PMEnable },
671 { WAKE_PHY, Config3, LinkUp },
672 { WAKE_MAGIC, Config3, MagicPacket },
673 { WAKE_UCAST, Config5, UWF },
674 { WAKE_BCAST, Config5, BWF },
675 { WAKE_MCAST, Config5, MWF },
676 { WAKE_ANY, Config5, LanWake }
677 };
678
679 spin_lock_irq(&tp->lock);
680
681 RTL_W8(Cfg9346, Cfg9346_Unlock);
682
683 for (i = 0; i < ARRAY_SIZE(cfg); i++) {
684 u8 options = RTL_R8(cfg[i].reg) & ~cfg[i].mask;
685 if (wol->wolopts & cfg[i].opt)
686 options |= cfg[i].mask;
687 RTL_W8(cfg[i].reg, options);
688 }
689
690 RTL_W8(Cfg9346, Cfg9346_Lock);
691
692 tp->wol_enabled = (wol->wolopts) ? 1 : 0;
693
694 spin_unlock_irq(&tp->lock);
695
696 return 0;
697}
698
610static void rtl8169_get_drvinfo(struct net_device *dev, 699static void rtl8169_get_drvinfo(struct net_device *dev,
611 struct ethtool_drvinfo *info) 700 struct ethtool_drvinfo *info)
612{ 701{
@@ -1025,6 +1114,8 @@ static struct ethtool_ops rtl8169_ethtool_ops = {
1025 .get_tso = ethtool_op_get_tso, 1114 .get_tso = ethtool_op_get_tso,
1026 .set_tso = ethtool_op_set_tso, 1115 .set_tso = ethtool_op_set_tso,
1027 .get_regs = rtl8169_get_regs, 1116 .get_regs = rtl8169_get_regs,
1117 .get_wol = rtl8169_get_wol,
1118 .set_wol = rtl8169_set_wol,
1028 .get_strings = rtl8169_get_strings, 1119 .get_strings = rtl8169_get_strings,
1029 .get_stats_count = rtl8169_get_stats_count, 1120 .get_stats_count = rtl8169_get_stats_count,
1030 .get_ethtool_stats = rtl8169_get_ethtool_stats, 1121 .get_ethtool_stats = rtl8169_get_ethtool_stats,
@@ -1442,6 +1533,11 @@ rtl8169_init_board(struct pci_dev *pdev, struct net_device **dev_out,
1442 } 1533 }
1443 tp->chipset = i; 1534 tp->chipset = i;
1444 1535
1536 RTL_W8(Cfg9346, Cfg9346_Unlock);
1537 RTL_W8(Config1, RTL_R8(Config1) | PMEnable);
1538 RTL_W8(Config5, RTL_R8(Config5) & PMEStatus);
1539 RTL_W8(Cfg9346, Cfg9346_Lock);
1540
1445 *ioaddr_out = ioaddr; 1541 *ioaddr_out = ioaddr;
1446 *dev_out = dev; 1542 *dev_out = dev;
1447out: 1543out:
@@ -1612,49 +1708,6 @@ rtl8169_remove_one(struct pci_dev *pdev)
1612 pci_set_drvdata(pdev, NULL); 1708 pci_set_drvdata(pdev, NULL);
1613} 1709}
1614 1710
1615#ifdef CONFIG_PM
1616
1617static int rtl8169_suspend(struct pci_dev *pdev, pm_message_t state)
1618{
1619 struct net_device *dev = pci_get_drvdata(pdev);
1620 struct rtl8169_private *tp = netdev_priv(dev);
1621 void __iomem *ioaddr = tp->mmio_addr;
1622 unsigned long flags;
1623
1624 if (!netif_running(dev))
1625 return 0;
1626
1627 netif_device_detach(dev);
1628 netif_stop_queue(dev);
1629 spin_lock_irqsave(&tp->lock, flags);
1630
1631 /* Disable interrupts, stop Rx and Tx */
1632 RTL_W16(IntrMask, 0);
1633 RTL_W8(ChipCmd, 0);
1634
1635 /* Update the error counts. */
1636 tp->stats.rx_missed_errors += RTL_R32(RxMissed);
1637 RTL_W32(RxMissed, 0);
1638 spin_unlock_irqrestore(&tp->lock, flags);
1639
1640 return 0;
1641}
1642
1643static int rtl8169_resume(struct pci_dev *pdev)
1644{
1645 struct net_device *dev = pci_get_drvdata(pdev);
1646
1647 if (!netif_running(dev))
1648 return 0;
1649
1650 netif_device_attach(dev);
1651 rtl8169_hw_start(dev);
1652
1653 return 0;
1654}
1655
1656#endif /* CONFIG_PM */
1657
1658static void rtl8169_set_rxbufsize(struct rtl8169_private *tp, 1711static void rtl8169_set_rxbufsize(struct rtl8169_private *tp,
1659 struct net_device *dev) 1712 struct net_device *dev)
1660{ 1713{
@@ -2700,6 +2753,56 @@ static struct net_device_stats *rtl8169_get_stats(struct net_device *dev)
2700 return &tp->stats; 2753 return &tp->stats;
2701} 2754}
2702 2755
2756#ifdef CONFIG_PM
2757
2758static int rtl8169_suspend(struct pci_dev *pdev, pm_message_t state)
2759{
2760 struct net_device *dev = pci_get_drvdata(pdev);
2761 struct rtl8169_private *tp = netdev_priv(dev);
2762 void __iomem *ioaddr = tp->mmio_addr;
2763
2764 if (!netif_running(dev))
2765 goto out;
2766
2767 netif_device_detach(dev);
2768 netif_stop_queue(dev);
2769
2770 spin_lock_irq(&tp->lock);
2771
2772 rtl8169_asic_down(ioaddr);
2773
2774 tp->stats.rx_missed_errors += RTL_R32(RxMissed);
2775 RTL_W32(RxMissed, 0);
2776
2777 spin_unlock_irq(&tp->lock);
2778
2779 pci_save_state(pdev);
2780 pci_enable_wake(pdev, pci_choose_state(pdev, state), tp->wol_enabled);
2781 pci_set_power_state(pdev, pci_choose_state(pdev, state));
2782out:
2783 return 0;
2784}
2785
2786static int rtl8169_resume(struct pci_dev *pdev)
2787{
2788 struct net_device *dev = pci_get_drvdata(pdev);
2789
2790 if (!netif_running(dev))
2791 goto out;
2792
2793 netif_device_attach(dev);
2794
2795 pci_set_power_state(pdev, PCI_D0);
2796 pci_restore_state(pdev);
2797 pci_enable_wake(pdev, PCI_D0, 0);
2798
2799 rtl8169_schedule_work(dev, rtl8169_reset_task);
2800out:
2801 return 0;
2802}
2803
2804#endif /* CONFIG_PM */
2805
2703static struct pci_driver rtl8169_pci_driver = { 2806static struct pci_driver rtl8169_pci_driver = {
2704 .name = MODULENAME, 2807 .name = MODULENAME,
2705 .id_table = rtl8169_pci_tbl, 2808 .id_table = rtl8169_pci_tbl,
diff --git a/drivers/net/sis900.c b/drivers/net/sis900.c
index 3d95fa20cd88..7a952fe60be2 100644
--- a/drivers/net/sis900.c
+++ b/drivers/net/sis900.c
@@ -540,7 +540,7 @@ static int __devinit sis900_probe(struct pci_dev *pci_dev,
540 printk("%2.2x.\n", net_dev->dev_addr[i]); 540 printk("%2.2x.\n", net_dev->dev_addr[i]);
541 541
542 /* Detect Wake on Lan support */ 542 /* Detect Wake on Lan support */
543 ret = inl(CFGPMC & PMESP); 543 ret = (inl(net_dev->base_addr + CFGPMC) & PMESP) >> 27;
544 if (netif_msg_probe(sis_priv) && (ret & PME_D3C) == 0) 544 if (netif_msg_probe(sis_priv) && (ret & PME_D3C) == 0)
545 printk(KERN_INFO "%s: Wake on LAN only available from suspend to RAM.", net_dev->name); 545 printk(KERN_INFO "%s: Wake on LAN only available from suspend to RAM.", net_dev->name);
546 546
@@ -2040,7 +2040,7 @@ static int sis900_set_wol(struct net_device *net_dev, struct ethtool_wolinfo *wo
2040 2040
2041 if (wol->wolopts == 0) { 2041 if (wol->wolopts == 0) {
2042 pci_read_config_dword(sis_priv->pci_dev, CFGPMCSR, &cfgpmcsr); 2042 pci_read_config_dword(sis_priv->pci_dev, CFGPMCSR, &cfgpmcsr);
2043 cfgpmcsr |= ~PME_EN; 2043 cfgpmcsr &= ~PME_EN;
2044 pci_write_config_dword(sis_priv->pci_dev, CFGPMCSR, cfgpmcsr); 2044 pci_write_config_dword(sis_priv->pci_dev, CFGPMCSR, cfgpmcsr);
2045 outl(pmctrl_bits, pmctrl_addr); 2045 outl(pmctrl_bits, pmctrl_addr);
2046 if (netif_msg_wol(sis_priv)) 2046 if (netif_msg_wol(sis_priv))
diff --git a/drivers/net/skge.c b/drivers/net/skge.c
index 67fb19b8fde9..25e028b7ce48 100644
--- a/drivers/net/skge.c
+++ b/drivers/net/skge.c
@@ -879,13 +879,12 @@ static int __xm_phy_read(struct skge_hw *hw, int port, u16 reg, u16 *val)
879 int i; 879 int i;
880 880
881 xm_write16(hw, port, XM_PHY_ADDR, reg | hw->phy_addr); 881 xm_write16(hw, port, XM_PHY_ADDR, reg | hw->phy_addr);
882 xm_read16(hw, port, XM_PHY_DATA); 882 *val = xm_read16(hw, port, XM_PHY_DATA);
883 883
884 /* Need to wait for external PHY */
885 for (i = 0; i < PHY_RETRIES; i++) { 884 for (i = 0; i < PHY_RETRIES; i++) {
886 udelay(1);
887 if (xm_read16(hw, port, XM_MMU_CMD) & XM_MMU_PHY_RDY) 885 if (xm_read16(hw, port, XM_MMU_CMD) & XM_MMU_PHY_RDY)
888 goto ready; 886 goto ready;
887 udelay(1);
889 } 888 }
890 889
891 return -ETIMEDOUT; 890 return -ETIMEDOUT;
@@ -918,7 +917,12 @@ static int xm_phy_write(struct skge_hw *hw, int port, u16 reg, u16 val)
918 917
919 ready: 918 ready:
920 xm_write16(hw, port, XM_PHY_DATA, val); 919 xm_write16(hw, port, XM_PHY_DATA, val);
921 return 0; 920 for (i = 0; i < PHY_RETRIES; i++) {
921 if (!(xm_read16(hw, port, XM_MMU_CMD) & XM_MMU_PHY_BUSY))
922 return 0;
923 udelay(1);
924 }
925 return -ETIMEDOUT;
922} 926}
923 927
924static void genesis_init(struct skge_hw *hw) 928static void genesis_init(struct skge_hw *hw)
@@ -1168,13 +1172,17 @@ static void genesis_mac_init(struct skge_hw *hw, int port)
1168 u32 r; 1172 u32 r;
1169 const u8 zero[6] = { 0 }; 1173 const u8 zero[6] = { 0 };
1170 1174
1171 /* Clear MIB counters */ 1175 for (i = 0; i < 10; i++) {
1172 xm_write16(hw, port, XM_STAT_CMD, 1176 skge_write16(hw, SK_REG(port, TX_MFF_CTRL1),
1173 XM_SC_CLR_RXC | XM_SC_CLR_TXC); 1177 MFF_SET_MAC_RST);
1174 /* Clear two times according to Errata #3 */ 1178 if (skge_read16(hw, SK_REG(port, TX_MFF_CTRL1)) & MFF_SET_MAC_RST)
1175 xm_write16(hw, port, XM_STAT_CMD, 1179 goto reset_ok;
1176 XM_SC_CLR_RXC | XM_SC_CLR_TXC); 1180 udelay(1);
1181 }
1182
1183 printk(KERN_WARNING PFX "%s: genesis reset failed\n", dev->name);
1177 1184
1185 reset_ok:
1178 /* Unreset the XMAC. */ 1186 /* Unreset the XMAC. */
1179 skge_write16(hw, SK_REG(port, TX_MFF_CTRL1), MFF_CLR_MAC_RST); 1187 skge_write16(hw, SK_REG(port, TX_MFF_CTRL1), MFF_CLR_MAC_RST);
1180 1188
@@ -1191,7 +1199,7 @@ static void genesis_mac_init(struct skge_hw *hw, int port)
1191 r |= GP_DIR_2|GP_IO_2; 1199 r |= GP_DIR_2|GP_IO_2;
1192 1200
1193 skge_write32(hw, B2_GP_IO, r); 1201 skge_write32(hw, B2_GP_IO, r);
1194 skge_read32(hw, B2_GP_IO); 1202
1195 1203
1196 /* Enable GMII interface */ 1204 /* Enable GMII interface */
1197 xm_write16(hw, port, XM_HW_CFG, XM_HW_GMII_MD); 1205 xm_write16(hw, port, XM_HW_CFG, XM_HW_GMII_MD);
@@ -1205,6 +1213,13 @@ static void genesis_mac_init(struct skge_hw *hw, int port)
1205 for (i = 1; i < 16; i++) 1213 for (i = 1; i < 16; i++)
1206 xm_outaddr(hw, port, XM_EXM(i), zero); 1214 xm_outaddr(hw, port, XM_EXM(i), zero);
1207 1215
1216 /* Clear MIB counters */
1217 xm_write16(hw, port, XM_STAT_CMD,
1218 XM_SC_CLR_RXC | XM_SC_CLR_TXC);
1219 /* Clear two times according to Errata #3 */
1220 xm_write16(hw, port, XM_STAT_CMD,
1221 XM_SC_CLR_RXC | XM_SC_CLR_TXC);
1222
1208 /* configure Rx High Water Mark (XM_RX_HI_WM) */ 1223 /* configure Rx High Water Mark (XM_RX_HI_WM) */
1209 xm_write16(hw, port, XM_RX_HI_WM, 1450); 1224 xm_write16(hw, port, XM_RX_HI_WM, 1450);
1210 1225
@@ -2170,8 +2185,10 @@ static int skge_up(struct net_device *dev)
2170 skge->tx_avail = skge->tx_ring.count - 1; 2185 skge->tx_avail = skge->tx_ring.count - 1;
2171 2186
2172 /* Enable IRQ from port */ 2187 /* Enable IRQ from port */
2188 spin_lock_irq(&hw->hw_lock);
2173 hw->intr_mask |= portirqmask[port]; 2189 hw->intr_mask |= portirqmask[port];
2174 skge_write32(hw, B0_IMSK, hw->intr_mask); 2190 skge_write32(hw, B0_IMSK, hw->intr_mask);
2191 spin_unlock_irq(&hw->hw_lock);
2175 2192
2176 /* Initialize MAC */ 2193 /* Initialize MAC */
2177 spin_lock_bh(&hw->phy_lock); 2194 spin_lock_bh(&hw->phy_lock);
@@ -2229,8 +2246,10 @@ static int skge_down(struct net_device *dev)
2229 else 2246 else
2230 yukon_stop(skge); 2247 yukon_stop(skge);
2231 2248
2249 spin_lock_irq(&hw->hw_lock);
2232 hw->intr_mask &= ~portirqmask[skge->port]; 2250 hw->intr_mask &= ~portirqmask[skge->port];
2233 skge_write32(hw, B0_IMSK, hw->intr_mask); 2251 skge_write32(hw, B0_IMSK, hw->intr_mask);
2252 spin_unlock_irq(&hw->hw_lock);
2234 2253
2235 /* Stop transmitter */ 2254 /* Stop transmitter */
2236 skge_write8(hw, Q_ADDR(txqaddr[port], Q_CSR), CSR_STOP); 2255 skge_write8(hw, Q_ADDR(txqaddr[port], Q_CSR), CSR_STOP);
@@ -2678,8 +2697,7 @@ static int skge_poll(struct net_device *dev, int *budget)
2678 2697
2679 /* restart receiver */ 2698 /* restart receiver */
2680 wmb(); 2699 wmb();
2681 skge_write8(hw, Q_ADDR(rxqaddr[skge->port], Q_CSR), 2700 skge_write8(hw, Q_ADDR(rxqaddr[skge->port], Q_CSR), CSR_START);
2682 CSR_START | CSR_IRQ_CL_F);
2683 2701
2684 *budget -= work_done; 2702 *budget -= work_done;
2685 dev->quota -= work_done; 2703 dev->quota -= work_done;
@@ -2687,10 +2705,11 @@ static int skge_poll(struct net_device *dev, int *budget)
2687 if (work_done >= to_do) 2705 if (work_done >= to_do)
2688 return 1; /* not done */ 2706 return 1; /* not done */
2689 2707
2690 netif_rx_complete(dev); 2708 spin_lock_irq(&hw->hw_lock);
2691 hw->intr_mask |= portirqmask[skge->port]; 2709 __netif_rx_complete(dev);
2692 skge_write32(hw, B0_IMSK, hw->intr_mask); 2710 hw->intr_mask |= portirqmask[skge->port];
2693 skge_read32(hw, B0_IMSK); 2711 skge_write32(hw, B0_IMSK, hw->intr_mask);
2712 spin_unlock_irq(&hw->hw_lock);
2694 2713
2695 return 0; 2714 return 0;
2696} 2715}
@@ -2850,18 +2869,10 @@ static void skge_extirq(unsigned long data)
2850 } 2869 }
2851 spin_unlock(&hw->phy_lock); 2870 spin_unlock(&hw->phy_lock);
2852 2871
2853 local_irq_disable(); 2872 spin_lock_irq(&hw->hw_lock);
2854 hw->intr_mask |= IS_EXT_REG; 2873 hw->intr_mask |= IS_EXT_REG;
2855 skge_write32(hw, B0_IMSK, hw->intr_mask); 2874 skge_write32(hw, B0_IMSK, hw->intr_mask);
2856 local_irq_enable(); 2875 spin_unlock_irq(&hw->hw_lock);
2857}
2858
2859static inline void skge_wakeup(struct net_device *dev)
2860{
2861 struct skge_port *skge = netdev_priv(dev);
2862
2863 prefetch(skge->rx_ring.to_clean);
2864 netif_rx_schedule(dev);
2865} 2876}
2866 2877
2867static irqreturn_t skge_intr(int irq, void *dev_id, struct pt_regs *regs) 2878static irqreturn_t skge_intr(int irq, void *dev_id, struct pt_regs *regs)
@@ -2872,15 +2883,17 @@ static irqreturn_t skge_intr(int irq, void *dev_id, struct pt_regs *regs)
2872 if (status == 0 || status == ~0) /* hotplug or shared irq */ 2883 if (status == 0 || status == ~0) /* hotplug or shared irq */
2873 return IRQ_NONE; 2884 return IRQ_NONE;
2874 2885
2875 status &= hw->intr_mask; 2886 spin_lock(&hw->hw_lock);
2876 if (status & IS_R1_F) { 2887 if (status & IS_R1_F) {
2888 skge_write8(hw, Q_ADDR(Q_R1, Q_CSR), CSR_IRQ_CL_F);
2877 hw->intr_mask &= ~IS_R1_F; 2889 hw->intr_mask &= ~IS_R1_F;
2878 skge_wakeup(hw->dev[0]); 2890 netif_rx_schedule(hw->dev[0]);
2879 } 2891 }
2880 2892
2881 if (status & IS_R2_F) { 2893 if (status & IS_R2_F) {
2894 skge_write8(hw, Q_ADDR(Q_R2, Q_CSR), CSR_IRQ_CL_F);
2882 hw->intr_mask &= ~IS_R2_F; 2895 hw->intr_mask &= ~IS_R2_F;
2883 skge_wakeup(hw->dev[1]); 2896 netif_rx_schedule(hw->dev[1]);
2884 } 2897 }
2885 2898
2886 if (status & IS_XA1_F) 2899 if (status & IS_XA1_F)
@@ -2922,6 +2935,7 @@ static irqreturn_t skge_intr(int irq, void *dev_id, struct pt_regs *regs)
2922 } 2935 }
2923 2936
2924 skge_write32(hw, B0_IMSK, hw->intr_mask); 2937 skge_write32(hw, B0_IMSK, hw->intr_mask);
2938 spin_unlock(&hw->hw_lock);
2925 2939
2926 return IRQ_HANDLED; 2940 return IRQ_HANDLED;
2927} 2941}
@@ -3290,6 +3304,7 @@ static int __devinit skge_probe(struct pci_dev *pdev,
3290 3304
3291 hw->pdev = pdev; 3305 hw->pdev = pdev;
3292 spin_lock_init(&hw->phy_lock); 3306 spin_lock_init(&hw->phy_lock);
3307 spin_lock_init(&hw->hw_lock);
3293 tasklet_init(&hw->ext_tasklet, skge_extirq, (unsigned long) hw); 3308 tasklet_init(&hw->ext_tasklet, skge_extirq, (unsigned long) hw);
3294 3309
3295 hw->regs = ioremap_nocache(pci_resource_start(pdev, 0), 0x4000); 3310 hw->regs = ioremap_nocache(pci_resource_start(pdev, 0), 0x4000);
diff --git a/drivers/net/skge.h b/drivers/net/skge.h
index 2efdacc290e5..941f12a333b6 100644
--- a/drivers/net/skge.h
+++ b/drivers/net/skge.h
@@ -2402,6 +2402,7 @@ struct skge_hw {
2402 2402
2403 struct tasklet_struct ext_tasklet; 2403 struct tasklet_struct ext_tasklet;
2404 spinlock_t phy_lock; 2404 spinlock_t phy_lock;
2405 spinlock_t hw_lock;
2405}; 2406};
2406 2407
2407enum { 2408enum {
diff --git a/drivers/net/sky2.c b/drivers/net/sky2.c
index bfeba5b9cd7a..ca8160d68229 100644
--- a/drivers/net/sky2.c
+++ b/drivers/net/sky2.c
@@ -195,11 +195,11 @@ static int sky2_set_power_state(struct sky2_hw *hw, pci_power_t state)
195 pr_debug("sky2_set_power_state %d\n", state); 195 pr_debug("sky2_set_power_state %d\n", state);
196 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON); 196 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON);
197 197
198 pci_read_config_word(hw->pdev, hw->pm_cap + PCI_PM_PMC, &power_control); 198 power_control = sky2_pci_read16(hw, hw->pm_cap + PCI_PM_PMC);
199 vaux = (sky2_read16(hw, B0_CTST) & Y2_VAUX_AVAIL) && 199 vaux = (sky2_read16(hw, B0_CTST) & Y2_VAUX_AVAIL) &&
200 (power_control & PCI_PM_CAP_PME_D3cold); 200 (power_control & PCI_PM_CAP_PME_D3cold);
201 201
202 pci_read_config_word(hw->pdev, hw->pm_cap + PCI_PM_CTRL, &power_control); 202 power_control = sky2_pci_read16(hw, hw->pm_cap + PCI_PM_CTRL);
203 203
204 power_control |= PCI_PM_CTRL_PME_STATUS; 204 power_control |= PCI_PM_CTRL_PME_STATUS;
205 power_control &= ~(PCI_PM_CTRL_STATE_MASK); 205 power_control &= ~(PCI_PM_CTRL_STATE_MASK);
@@ -223,7 +223,7 @@ static int sky2_set_power_state(struct sky2_hw *hw, pci_power_t state)
223 sky2_write8(hw, B2_Y2_CLK_GATE, 0); 223 sky2_write8(hw, B2_Y2_CLK_GATE, 0);
224 224
225 /* Turn off phy power saving */ 225 /* Turn off phy power saving */
226 pci_read_config_dword(hw->pdev, PCI_DEV_REG1, &reg1); 226 reg1 = sky2_pci_read32(hw, PCI_DEV_REG1);
227 reg1 &= ~(PCI_Y2_PHY1_POWD | PCI_Y2_PHY2_POWD); 227 reg1 &= ~(PCI_Y2_PHY1_POWD | PCI_Y2_PHY2_POWD);
228 228
229 /* looks like this XL is back asswards .. */ 229 /* looks like this XL is back asswards .. */
@@ -232,18 +232,28 @@ static int sky2_set_power_state(struct sky2_hw *hw, pci_power_t state)
232 if (hw->ports > 1) 232 if (hw->ports > 1)
233 reg1 |= PCI_Y2_PHY2_COMA; 233 reg1 |= PCI_Y2_PHY2_COMA;
234 } 234 }
235 pci_write_config_dword(hw->pdev, PCI_DEV_REG1, reg1); 235
236 if (hw->chip_id == CHIP_ID_YUKON_EC_U) {
237 sky2_pci_write32(hw, PCI_DEV_REG3, 0);
238 reg1 = sky2_pci_read32(hw, PCI_DEV_REG4);
239 reg1 &= P_ASPM_CONTROL_MSK;
240 sky2_pci_write32(hw, PCI_DEV_REG4, reg1);
241 sky2_pci_write32(hw, PCI_DEV_REG5, 0);
242 }
243
244 sky2_pci_write32(hw, PCI_DEV_REG1, reg1);
245
236 break; 246 break;
237 247
238 case PCI_D3hot: 248 case PCI_D3hot:
239 case PCI_D3cold: 249 case PCI_D3cold:
240 /* Turn on phy power saving */ 250 /* Turn on phy power saving */
241 pci_read_config_dword(hw->pdev, PCI_DEV_REG1, &reg1); 251 reg1 = sky2_pci_read32(hw, PCI_DEV_REG1);
242 if (hw->chip_id == CHIP_ID_YUKON_XL && hw->chip_rev > 1) 252 if (hw->chip_id == CHIP_ID_YUKON_XL && hw->chip_rev > 1)
243 reg1 &= ~(PCI_Y2_PHY1_POWD | PCI_Y2_PHY2_POWD); 253 reg1 &= ~(PCI_Y2_PHY1_POWD | PCI_Y2_PHY2_POWD);
244 else 254 else
245 reg1 |= (PCI_Y2_PHY1_POWD | PCI_Y2_PHY2_POWD); 255 reg1 |= (PCI_Y2_PHY1_POWD | PCI_Y2_PHY2_POWD);
246 pci_write_config_dword(hw->pdev, PCI_DEV_REG1, reg1); 256 sky2_pci_write32(hw, PCI_DEV_REG1, reg1);
247 257
248 if (hw->chip_id == CHIP_ID_YUKON_XL && hw->chip_rev > 1) 258 if (hw->chip_id == CHIP_ID_YUKON_XL && hw->chip_rev > 1)
249 sky2_write8(hw, B2_Y2_CLK_GATE, 0); 259 sky2_write8(hw, B2_Y2_CLK_GATE, 0);
@@ -265,7 +275,7 @@ static int sky2_set_power_state(struct sky2_hw *hw, pci_power_t state)
265 ret = -1; 275 ret = -1;
266 } 276 }
267 277
268 pci_write_config_byte(hw->pdev, hw->pm_cap + PCI_PM_CTRL, power_control); 278 sky2_pci_write16(hw, hw->pm_cap + PCI_PM_CTRL, power_control);
269 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF); 279 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF);
270 return ret; 280 return ret;
271} 281}
@@ -463,16 +473,31 @@ static void sky2_phy_init(struct sky2_hw *hw, unsigned port)
463 ledover |= PHY_M_LED_MO_RX(MO_LED_OFF); 473 ledover |= PHY_M_LED_MO_RX(MO_LED_OFF);
464 } 474 }
465 475
466 gm_phy_write(hw, port, PHY_MARV_LED_CTRL, ledctrl); 476 if (hw->chip_id == CHIP_ID_YUKON_EC_U && hw->chip_rev >= 2) {
477 /* apply fixes in PHY AFE */
478 gm_phy_write(hw, port, 22, 255);
479 /* increase differential signal amplitude in 10BASE-T */
480 gm_phy_write(hw, port, 24, 0xaa99);
481 gm_phy_write(hw, port, 23, 0x2011);
467 482
468 if (sky2->autoneg == AUTONEG_DISABLE || sky2->speed == SPEED_100) { 483 /* fix for IEEE A/B Symmetry failure in 1000BASE-T */
469 /* turn on 100 Mbps LED (LED_LINK100) */ 484 gm_phy_write(hw, port, 24, 0xa204);
470 ledover |= PHY_M_LED_MO_100(MO_LED_ON); 485 gm_phy_write(hw, port, 23, 0x2002);
471 }
472 486
473 if (ledover) 487 /* set page register to 0 */
474 gm_phy_write(hw, port, PHY_MARV_LED_OVER, ledover); 488 gm_phy_write(hw, port, 22, 0);
489 } else {
490 gm_phy_write(hw, port, PHY_MARV_LED_CTRL, ledctrl);
475 491
492 if (sky2->autoneg == AUTONEG_DISABLE || sky2->speed == SPEED_100) {
493 /* turn on 100 Mbps LED (LED_LINK100) */
494 ledover |= PHY_M_LED_MO_100(MO_LED_ON);
495 }
496
497 if (ledover)
498 gm_phy_write(hw, port, PHY_MARV_LED_OVER, ledover);
499
500 }
476 /* Enable phy interrupt on auto-negotiation complete (or link up) */ 501 /* Enable phy interrupt on auto-negotiation complete (or link up) */
477 if (sky2->autoneg == AUTONEG_ENABLE) 502 if (sky2->autoneg == AUTONEG_ENABLE)
478 gm_phy_write(hw, port, PHY_MARV_INT_MASK, PHY_M_IS_AN_COMPL); 503 gm_phy_write(hw, port, PHY_MARV_INT_MASK, PHY_M_IS_AN_COMPL);
@@ -953,6 +978,12 @@ static int sky2_rx_start(struct sky2_port *sky2)
953 978
954 sky2->rx_put = sky2->rx_next = 0; 979 sky2->rx_put = sky2->rx_next = 0;
955 sky2_qset(hw, rxq); 980 sky2_qset(hw, rxq);
981
982 if (hw->chip_id == CHIP_ID_YUKON_EC_U && hw->chip_rev >= 2) {
983 /* MAC Rx RAM Read is controlled by hardware */
984 sky2_write32(hw, Q_ADDR(rxq, Q_F), F_M_RX_RAM_DIS);
985 }
986
956 sky2_prefetch_init(hw, rxq, sky2->rx_le_map, RX_LE_SIZE - 1); 987 sky2_prefetch_init(hw, rxq, sky2->rx_le_map, RX_LE_SIZE - 1);
957 988
958 rx_set_checksum(sky2); 989 rx_set_checksum(sky2);
@@ -1035,9 +1066,10 @@ static int sky2_up(struct net_device *dev)
1035 RB_RST_SET); 1066 RB_RST_SET);
1036 1067
1037 sky2_qset(hw, txqaddr[port]); 1068 sky2_qset(hw, txqaddr[port]);
1038 if (hw->chip_id == CHIP_ID_YUKON_EC_U)
1039 sky2_write16(hw, Q_ADDR(txqaddr[port], Q_AL), 0x1a0);
1040 1069
1070 /* Set almost empty threshold */
1071 if (hw->chip_id == CHIP_ID_YUKON_EC_U && hw->chip_rev == 1)
1072 sky2_write16(hw, Q_ADDR(txqaddr[port], Q_AL), 0x1a0);
1041 1073
1042 sky2_prefetch_init(hw, txqaddr[port], sky2->tx_le_map, 1074 sky2_prefetch_init(hw, txqaddr[port], sky2->tx_le_map,
1043 TX_RING_SIZE - 1); 1075 TX_RING_SIZE - 1);
@@ -1047,8 +1079,10 @@ static int sky2_up(struct net_device *dev)
1047 goto err_out; 1079 goto err_out;
1048 1080
1049 /* Enable interrupts from phy/mac for port */ 1081 /* Enable interrupts from phy/mac for port */
1082 spin_lock_irq(&hw->hw_lock);
1050 hw->intr_mask |= (port == 0) ? Y2_IS_PORT_1 : Y2_IS_PORT_2; 1083 hw->intr_mask |= (port == 0) ? Y2_IS_PORT_1 : Y2_IS_PORT_2;
1051 sky2_write32(hw, B0_IMSK, hw->intr_mask); 1084 sky2_write32(hw, B0_IMSK, hw->intr_mask);
1085 spin_unlock_irq(&hw->hw_lock);
1052 return 0; 1086 return 0;
1053 1087
1054err_out: 1088err_out:
@@ -1348,10 +1382,10 @@ static int sky2_down(struct net_device *dev)
1348 netif_stop_queue(dev); 1382 netif_stop_queue(dev);
1349 1383
1350 /* Disable port IRQ */ 1384 /* Disable port IRQ */
1351 local_irq_disable(); 1385 spin_lock_irq(&hw->hw_lock);
1352 hw->intr_mask &= ~((sky2->port == 0) ? Y2_IS_IRQ_PHY1 : Y2_IS_IRQ_PHY2); 1386 hw->intr_mask &= ~((sky2->port == 0) ? Y2_IS_IRQ_PHY1 : Y2_IS_IRQ_PHY2);
1353 sky2_write32(hw, B0_IMSK, hw->intr_mask); 1387 sky2_write32(hw, B0_IMSK, hw->intr_mask);
1354 local_irq_enable(); 1388 spin_unlock_irq(&hw->hw_lock);
1355 1389
1356 flush_scheduled_work(); 1390 flush_scheduled_work();
1357 1391
@@ -1633,10 +1667,10 @@ static void sky2_phy_task(void *arg)
1633out: 1667out:
1634 up(&sky2->phy_sema); 1668 up(&sky2->phy_sema);
1635 1669
1636 local_irq_disable(); 1670 spin_lock_irq(&hw->hw_lock);
1637 hw->intr_mask |= (sky2->port == 0) ? Y2_IS_IRQ_PHY1 : Y2_IS_IRQ_PHY2; 1671 hw->intr_mask |= (sky2->port == 0) ? Y2_IS_IRQ_PHY1 : Y2_IS_IRQ_PHY2;
1638 sky2_write32(hw, B0_IMSK, hw->intr_mask); 1672 sky2_write32(hw, B0_IMSK, hw->intr_mask);
1639 local_irq_enable(); 1673 spin_unlock_irq(&hw->hw_lock);
1640} 1674}
1641 1675
1642 1676
@@ -1863,6 +1897,17 @@ static int sky2_poll(struct net_device *dev0, int *budget)
1863 1897
1864 sky2_write32(hw, STAT_CTRL, SC_STAT_CLR_IRQ); 1898 sky2_write32(hw, STAT_CTRL, SC_STAT_CLR_IRQ);
1865 1899
1900 /*
1901 * Kick the STAT_LEV_TIMER_CTRL timer.
1902 * This fixes my hangs on Yukon-EC (0xb6) rev 1.
1903 * The if clause is there to start the timer only if it has been
1904 * configured correctly and not been disabled via ethtool.
1905 */
1906 if (sky2_read8(hw, STAT_LEV_TIMER_CTRL) == TIM_START) {
1907 sky2_write8(hw, STAT_LEV_TIMER_CTRL, TIM_STOP);
1908 sky2_write8(hw, STAT_LEV_TIMER_CTRL, TIM_START);
1909 }
1910
1866 hwidx = sky2_read16(hw, STAT_PUT_IDX); 1911 hwidx = sky2_read16(hw, STAT_PUT_IDX);
1867 BUG_ON(hwidx >= STATUS_RING_SIZE); 1912 BUG_ON(hwidx >= STATUS_RING_SIZE);
1868 rmb(); 1913 rmb();
@@ -1945,16 +1990,19 @@ exit_loop:
1945 sky2_tx_check(hw, 0, tx_done[0]); 1990 sky2_tx_check(hw, 0, tx_done[0]);
1946 sky2_tx_check(hw, 1, tx_done[1]); 1991 sky2_tx_check(hw, 1, tx_done[1]);
1947 1992
1993 if (sky2_read8(hw, STAT_TX_TIMER_CTRL) == TIM_START) {
1994 sky2_write8(hw, STAT_TX_TIMER_CTRL, TIM_STOP);
1995 sky2_write8(hw, STAT_TX_TIMER_CTRL, TIM_START);
1996 }
1997
1948 if (likely(work_done < to_do)) { 1998 if (likely(work_done < to_do)) {
1949 /* need to restart TX timer */ 1999 spin_lock_irq(&hw->hw_lock);
1950 if (is_ec_a1(hw)) { 2000 __netif_rx_complete(dev0);
1951 sky2_write8(hw, STAT_TX_TIMER_CTRL, TIM_STOP);
1952 sky2_write8(hw, STAT_TX_TIMER_CTRL, TIM_START);
1953 }
1954 2001
1955 netif_rx_complete(dev0);
1956 hw->intr_mask |= Y2_IS_STAT_BMU; 2002 hw->intr_mask |= Y2_IS_STAT_BMU;
1957 sky2_write32(hw, B0_IMSK, hw->intr_mask); 2003 sky2_write32(hw, B0_IMSK, hw->intr_mask);
2004 spin_unlock_irq(&hw->hw_lock);
2005
1958 return 0; 2006 return 0;
1959 } else { 2007 } else {
1960 *budget -= work_done; 2008 *budget -= work_done;
@@ -2017,13 +2065,13 @@ static void sky2_hw_intr(struct sky2_hw *hw)
2017 if (status & (Y2_IS_MST_ERR | Y2_IS_IRQ_STAT)) { 2065 if (status & (Y2_IS_MST_ERR | Y2_IS_IRQ_STAT)) {
2018 u16 pci_err; 2066 u16 pci_err;
2019 2067
2020 pci_read_config_word(hw->pdev, PCI_STATUS, &pci_err); 2068 pci_err = sky2_pci_read16(hw, PCI_STATUS);
2021 if (net_ratelimit()) 2069 if (net_ratelimit())
2022 printk(KERN_ERR PFX "%s: pci hw error (0x%x)\n", 2070 printk(KERN_ERR PFX "%s: pci hw error (0x%x)\n",
2023 pci_name(hw->pdev), pci_err); 2071 pci_name(hw->pdev), pci_err);
2024 2072
2025 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON); 2073 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON);
2026 pci_write_config_word(hw->pdev, PCI_STATUS, 2074 sky2_pci_write16(hw, PCI_STATUS,
2027 pci_err | PCI_STATUS_ERROR_BITS); 2075 pci_err | PCI_STATUS_ERROR_BITS);
2028 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF); 2076 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF);
2029 } 2077 }
@@ -2032,7 +2080,7 @@ static void sky2_hw_intr(struct sky2_hw *hw)
2032 /* PCI-Express uncorrectable Error occurred */ 2080 /* PCI-Express uncorrectable Error occurred */
2033 u32 pex_err; 2081 u32 pex_err;
2034 2082
2035 pci_read_config_dword(hw->pdev, PEX_UNC_ERR_STAT, &pex_err); 2083 pex_err = sky2_pci_read32(hw, PEX_UNC_ERR_STAT);
2036 2084
2037 if (net_ratelimit()) 2085 if (net_ratelimit())
2038 printk(KERN_ERR PFX "%s: pci express error (0x%x)\n", 2086 printk(KERN_ERR PFX "%s: pci express error (0x%x)\n",
@@ -2040,7 +2088,7 @@ static void sky2_hw_intr(struct sky2_hw *hw)
2040 2088
2041 /* clear the interrupt */ 2089 /* clear the interrupt */
2042 sky2_write32(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON); 2090 sky2_write32(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON);
2043 pci_write_config_dword(hw->pdev, PEX_UNC_ERR_STAT, 2091 sky2_pci_write32(hw, PEX_UNC_ERR_STAT,
2044 0xffffffffUL); 2092 0xffffffffUL);
2045 sky2_write32(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF); 2093 sky2_write32(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF);
2046 2094
@@ -2086,6 +2134,7 @@ static void sky2_phy_intr(struct sky2_hw *hw, unsigned port)
2086 2134
2087 hw->intr_mask &= ~(port == 0 ? Y2_IS_IRQ_PHY1 : Y2_IS_IRQ_PHY2); 2135 hw->intr_mask &= ~(port == 0 ? Y2_IS_IRQ_PHY1 : Y2_IS_IRQ_PHY2);
2088 sky2_write32(hw, B0_IMSK, hw->intr_mask); 2136 sky2_write32(hw, B0_IMSK, hw->intr_mask);
2137
2089 schedule_work(&sky2->phy_task); 2138 schedule_work(&sky2->phy_task);
2090} 2139}
2091 2140
@@ -2099,6 +2148,7 @@ static irqreturn_t sky2_intr(int irq, void *dev_id, struct pt_regs *regs)
2099 if (status == 0 || status == ~0) 2148 if (status == 0 || status == ~0)
2100 return IRQ_NONE; 2149 return IRQ_NONE;
2101 2150
2151 spin_lock(&hw->hw_lock);
2102 if (status & Y2_IS_HW_ERR) 2152 if (status & Y2_IS_HW_ERR)
2103 sky2_hw_intr(hw); 2153 sky2_hw_intr(hw);
2104 2154
@@ -2127,7 +2177,7 @@ static irqreturn_t sky2_intr(int irq, void *dev_id, struct pt_regs *regs)
2127 2177
2128 sky2_write32(hw, B0_Y2_SP_ICR, 2); 2178 sky2_write32(hw, B0_Y2_SP_ICR, 2);
2129 2179
2130 sky2_read32(hw, B0_IMSK); 2180 spin_unlock(&hw->hw_lock);
2131 2181
2132 return IRQ_HANDLED; 2182 return IRQ_HANDLED;
2133} 2183}
@@ -2170,7 +2220,7 @@ static int sky2_reset(struct sky2_hw *hw)
2170{ 2220{
2171 u16 status; 2221 u16 status;
2172 u8 t8, pmd_type; 2222 u8 t8, pmd_type;
2173 int i, err; 2223 int i;
2174 2224
2175 sky2_write8(hw, B0_CTST, CS_RST_CLR); 2225 sky2_write8(hw, B0_CTST, CS_RST_CLR);
2176 2226
@@ -2192,25 +2242,18 @@ static int sky2_reset(struct sky2_hw *hw)
2192 sky2_write8(hw, B0_CTST, CS_RST_CLR); 2242 sky2_write8(hw, B0_CTST, CS_RST_CLR);
2193 2243
2194 /* clear PCI errors, if any */ 2244 /* clear PCI errors, if any */
2195 err = pci_read_config_word(hw->pdev, PCI_STATUS, &status); 2245 status = sky2_pci_read16(hw, PCI_STATUS);
2196 if (err)
2197 goto pci_err;
2198 2246
2199 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON); 2247 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON);
2200 err = pci_write_config_word(hw->pdev, PCI_STATUS, 2248 sky2_pci_write16(hw, PCI_STATUS, status | PCI_STATUS_ERROR_BITS);
2201 status | PCI_STATUS_ERROR_BITS); 2249
2202 if (err)
2203 goto pci_err;
2204 2250
2205 sky2_write8(hw, B0_CTST, CS_MRST_CLR); 2251 sky2_write8(hw, B0_CTST, CS_MRST_CLR);
2206 2252
2207 /* clear any PEX errors */ 2253 /* clear any PEX errors */
2208 if (pci_find_capability(hw->pdev, PCI_CAP_ID_EXP)) { 2254 if (pci_find_capability(hw->pdev, PCI_CAP_ID_EXP))
2209 err = pci_write_config_dword(hw->pdev, PEX_UNC_ERR_STAT, 2255 sky2_pci_write32(hw, PEX_UNC_ERR_STAT, 0xffffffffUL);
2210 0xffffffffUL); 2256
2211 if (err)
2212 goto pci_err;
2213 }
2214 2257
2215 pmd_type = sky2_read8(hw, B2_PMD_TYP); 2258 pmd_type = sky2_read8(hw, B2_PMD_TYP);
2216 hw->copper = !(pmd_type == 'L' || pmd_type == 'S'); 2259 hw->copper = !(pmd_type == 'L' || pmd_type == 'S');
@@ -2309,8 +2352,7 @@ static int sky2_reset(struct sky2_hw *hw)
2309 sky2_write8(hw, STAT_FIFO_ISR_WM, 16); 2352 sky2_write8(hw, STAT_FIFO_ISR_WM, 16);
2310 2353
2311 sky2_write32(hw, STAT_TX_TIMER_INI, sky2_us2clk(hw, 1000)); 2354 sky2_write32(hw, STAT_TX_TIMER_INI, sky2_us2clk(hw, 1000));
2312 sky2_write32(hw, STAT_LEV_TIMER_INI, sky2_us2clk(hw, 100)); 2355 sky2_write32(hw, STAT_ISR_TIMER_INI, sky2_us2clk(hw, 7));
2313 sky2_write32(hw, STAT_ISR_TIMER_INI, sky2_us2clk(hw, 20));
2314 } 2356 }
2315 2357
2316 /* enable status unit */ 2358 /* enable status unit */
@@ -2321,14 +2363,6 @@ static int sky2_reset(struct sky2_hw *hw)
2321 sky2_write8(hw, STAT_ISR_TIMER_CTRL, TIM_START); 2363 sky2_write8(hw, STAT_ISR_TIMER_CTRL, TIM_START);
2322 2364
2323 return 0; 2365 return 0;
2324
2325pci_err:
2326 /* This is to catch a BIOS bug workaround where
2327 * mmconfig table doesn't have other buses.
2328 */
2329 printk(KERN_ERR PFX "%s: can't access PCI config space\n",
2330 pci_name(hw->pdev));
2331 return err;
2332} 2366}
2333 2367
2334static u32 sky2_supported_modes(const struct sky2_hw *hw) 2368static u32 sky2_supported_modes(const struct sky2_hw *hw)
@@ -2852,11 +2886,11 @@ static int sky2_set_coalesce(struct net_device *dev,
2852 (ecmd->rx_coalesce_usecs_irq < tmin || ecmd->rx_coalesce_usecs_irq > tmax)) 2886 (ecmd->rx_coalesce_usecs_irq < tmin || ecmd->rx_coalesce_usecs_irq > tmax))
2853 return -EINVAL; 2887 return -EINVAL;
2854 2888
2855 if (ecmd->tx_max_coalesced_frames > 0xffff) 2889 if (ecmd->tx_max_coalesced_frames >= TX_RING_SIZE-1)
2856 return -EINVAL; 2890 return -EINVAL;
2857 if (ecmd->rx_max_coalesced_frames > 0xff) 2891 if (ecmd->rx_max_coalesced_frames > RX_MAX_PENDING)
2858 return -EINVAL; 2892 return -EINVAL;
2859 if (ecmd->rx_max_coalesced_frames_irq > 0xff) 2893 if (ecmd->rx_max_coalesced_frames_irq >RX_MAX_PENDING)
2860 return -EINVAL; 2894 return -EINVAL;
2861 2895
2862 if (ecmd->tx_coalesce_usecs == 0) 2896 if (ecmd->tx_coalesce_usecs == 0)
@@ -3198,17 +3232,6 @@ static int __devinit sky2_probe(struct pci_dev *pdev,
3198 } 3232 }
3199 } 3233 }
3200 3234
3201#ifdef __BIG_ENDIAN
3202 /* byte swap descriptors in hardware */
3203 {
3204 u32 reg;
3205
3206 pci_read_config_dword(pdev, PCI_DEV_REG2, &reg);
3207 reg |= PCI_REV_DESC;
3208 pci_write_config_dword(pdev, PCI_DEV_REG2, reg);
3209 }
3210#endif
3211
3212 err = -ENOMEM; 3235 err = -ENOMEM;
3213 hw = kzalloc(sizeof(*hw), GFP_KERNEL); 3236 hw = kzalloc(sizeof(*hw), GFP_KERNEL);
3214 if (!hw) { 3237 if (!hw) {
@@ -3226,6 +3249,18 @@ static int __devinit sky2_probe(struct pci_dev *pdev,
3226 goto err_out_free_hw; 3249 goto err_out_free_hw;
3227 } 3250 }
3228 hw->pm_cap = pm_cap; 3251 hw->pm_cap = pm_cap;
3252 spin_lock_init(&hw->hw_lock);
3253
3254#ifdef __BIG_ENDIAN
3255 /* byte swap descriptors in hardware */
3256 {
3257 u32 reg;
3258
3259 reg = sky2_pci_read32(hw, PCI_DEV_REG2);
3260 reg |= PCI_REV_DESC;
3261 sky2_pci_write32(hw, PCI_DEV_REG2, reg);
3262 }
3263#endif
3229 3264
3230 /* ring for status responses */ 3265 /* ring for status responses */
3231 hw->st_le = pci_alloc_consistent(hw->pdev, STATUS_LE_BYTES, 3266 hw->st_le = pci_alloc_consistent(hw->pdev, STATUS_LE_BYTES,
diff --git a/drivers/net/sky2.h b/drivers/net/sky2.h
index fd12c289a238..3edb98075e0a 100644
--- a/drivers/net/sky2.h
+++ b/drivers/net/sky2.h
@@ -5,14 +5,22 @@
5#define _SKY2_H 5#define _SKY2_H
6 6
7/* PCI config registers */ 7/* PCI config registers */
8#define PCI_DEV_REG1 0x40 8enum {
9#define PCI_DEV_REG2 0x44 9 PCI_DEV_REG1 = 0x40,
10#define PCI_DEV_STATUS 0x7c 10 PCI_DEV_REG2 = 0x44,
11#define PCI_OS_PCI_X (1<<26) 11 PCI_DEV_STATUS = 0x7c,
12 PCI_DEV_REG3 = 0x80,
13 PCI_DEV_REG4 = 0x84,
14 PCI_DEV_REG5 = 0x88,
15};
12 16
13#define PEX_LNK_STAT 0xf2 17enum {
14#define PEX_UNC_ERR_STAT 0x104 18 PEX_DEV_CAP = 0xe4,
15#define PEX_DEV_CTRL 0xe8 19 PEX_DEV_CTRL = 0xe8,
20 PEX_DEV_STA = 0xea,
21 PEX_LNK_STAT = 0xf2,
22 PEX_UNC_ERR_STAT= 0x104,
23};
16 24
17/* Yukon-2 */ 25/* Yukon-2 */
18enum pci_dev_reg_1 { 26enum pci_dev_reg_1 {
@@ -37,6 +45,25 @@ enum pci_dev_reg_2 {
37 PCI_USEDATA64 = 1<<0, /* Use 64Bit Data bus ext */ 45 PCI_USEDATA64 = 1<<0, /* Use 64Bit Data bus ext */
38}; 46};
39 47
48/* PCI_OUR_REG_4 32 bit Our Register 4 (Yukon-ECU only) */
49enum pci_dev_reg_4 {
50 /* (Link Training & Status State Machine) */
51 P_TIMER_VALUE_MSK = 0xffL<<16, /* Bit 23..16: Timer Value Mask */
52 /* (Active State Power Management) */
53 P_FORCE_ASPM_REQUEST = 1<<15, /* Force ASPM Request (A1 only) */
54 P_ASPM_GPHY_LINK_DOWN = 1<<14, /* GPHY Link Down (A1 only) */
55 P_ASPM_INT_FIFO_EMPTY = 1<<13, /* Internal FIFO Empty (A1 only) */
56 P_ASPM_CLKRUN_REQUEST = 1<<12, /* CLKRUN Request (A1 only) */
57
58 P_ASPM_FORCE_CLKREQ_ENA = 1<<4, /* Force CLKREQ Enable (A1b only) */
59 P_ASPM_CLKREQ_PAD_CTL = 1<<3, /* CLKREQ PAD Control (A1 only) */
60 P_ASPM_A1_MODE_SELECT = 1<<2, /* A1 Mode Select (A1 only) */
61 P_CLK_GATE_PEX_UNIT_ENA = 1<<1, /* Enable Gate PEX Unit Clock */
62 P_CLK_GATE_ROOT_COR_ENA = 1<<0, /* Enable Gate Root Core Clock */
63 P_ASPM_CONTROL_MSK = P_FORCE_ASPM_REQUEST | P_ASPM_GPHY_LINK_DOWN
64 | P_ASPM_CLKRUN_REQUEST | P_ASPM_INT_FIFO_EMPTY,
65};
66
40 67
41#define PCI_STATUS_ERROR_BITS (PCI_STATUS_DETECTED_PARITY | \ 68#define PCI_STATUS_ERROR_BITS (PCI_STATUS_DETECTED_PARITY | \
42 PCI_STATUS_SIG_SYSTEM_ERROR | \ 69 PCI_STATUS_SIG_SYSTEM_ERROR | \
@@ -507,6 +534,16 @@ enum {
507}; 534};
508#define Q_ADDR(reg, offs) (B8_Q_REGS + (reg) + (offs)) 535#define Q_ADDR(reg, offs) (B8_Q_REGS + (reg) + (offs))
509 536
537/* Q_F 32 bit Flag Register */
538enum {
539 F_ALM_FULL = 1<<27, /* Rx FIFO: almost full */
540 F_EMPTY = 1<<27, /* Tx FIFO: empty flag */
541 F_FIFO_EOF = 1<<26, /* Tag (EOF Flag) bit in FIFO */
542 F_WM_REACHED = 1<<25, /* Watermark reached */
543 F_M_RX_RAM_DIS = 1<<24, /* MAC Rx RAM Read Port disable */
544 F_FIFO_LEVEL = 0x1fL<<16, /* Bit 23..16: # of Qwords in FIFO */
545 F_WATER_MARK = 0x0007ffL, /* Bit 10.. 0: Watermark */
546};
510 547
511/* Queue Prefetch Unit Offsets, use Y2_QADDR() to address (Yukon-2 only)*/ 548/* Queue Prefetch Unit Offsets, use Y2_QADDR() to address (Yukon-2 only)*/
512enum { 549enum {
@@ -909,10 +946,12 @@ enum {
909 PHY_BCOM_ID1_C0 = 0x6044, 946 PHY_BCOM_ID1_C0 = 0x6044,
910 PHY_BCOM_ID1_C5 = 0x6047, 947 PHY_BCOM_ID1_C5 = 0x6047,
911 948
912 PHY_MARV_ID1_B0 = 0x0C23, /* Yukon (PHY 88E1011) */ 949 PHY_MARV_ID1_B0 = 0x0C23, /* Yukon (PHY 88E1011) */
913 PHY_MARV_ID1_B2 = 0x0C25, /* Yukon-Plus (PHY 88E1011) */ 950 PHY_MARV_ID1_B2 = 0x0C25, /* Yukon-Plus (PHY 88E1011) */
914 PHY_MARV_ID1_C2 = 0x0CC2, /* Yukon-EC (PHY 88E1111) */ 951 PHY_MARV_ID1_C2 = 0x0CC2, /* Yukon-EC (PHY 88E1111) */
915 PHY_MARV_ID1_Y2 = 0x0C91, /* Yukon-2 (PHY 88E1112) */ 952 PHY_MARV_ID1_Y2 = 0x0C91, /* Yukon-2 (PHY 88E1112) */
953 PHY_MARV_ID1_FE = 0x0C83, /* Yukon-FE (PHY 88E3082 Rev.A1) */
954 PHY_MARV_ID1_ECU= 0x0CB0, /* Yukon-ECU (PHY 88E1149 Rev.B2?) */
916}; 955};
917 956
918/* Advertisement register bits */ 957/* Advertisement register bits */
@@ -1837,8 +1876,9 @@ struct sky2_port {
1837struct sky2_hw { 1876struct sky2_hw {
1838 void __iomem *regs; 1877 void __iomem *regs;
1839 struct pci_dev *pdev; 1878 struct pci_dev *pdev;
1840 u32 intr_mask;
1841 struct net_device *dev[2]; 1879 struct net_device *dev[2];
1880 spinlock_t hw_lock;
1881 u32 intr_mask;
1842 1882
1843 int pm_cap; 1883 int pm_cap;
1844 int msi; 1884 int msi;
@@ -1912,4 +1952,25 @@ static inline void gma_set_addr(struct sky2_hw *hw, unsigned port, unsigned reg,
1912 gma_write16(hw, port, reg+4,(u16) addr[2] | ((u16) addr[3] << 8)); 1952 gma_write16(hw, port, reg+4,(u16) addr[2] | ((u16) addr[3] << 8));
1913 gma_write16(hw, port, reg+8,(u16) addr[4] | ((u16) addr[5] << 8)); 1953 gma_write16(hw, port, reg+8,(u16) addr[4] | ((u16) addr[5] << 8));
1914} 1954}
1955
1956/* PCI config space access */
1957static inline u32 sky2_pci_read32(const struct sky2_hw *hw, unsigned reg)
1958{
1959 return sky2_read32(hw, Y2_CFG_SPC + reg);
1960}
1961
1962static inline u16 sky2_pci_read16(const struct sky2_hw *hw, unsigned reg)
1963{
1964 return sky2_read16(hw, Y2_CFG_SPC + reg);
1965}
1966
1967static inline void sky2_pci_write32(struct sky2_hw *hw, unsigned reg, u32 val)
1968{
1969 sky2_write32(hw, Y2_CFG_SPC + reg, val);
1970}
1971
1972static inline void sky2_pci_write16(struct sky2_hw *hw, unsigned reg, u16 val)
1973{
1974 sky2_write16(hw, Y2_CFG_SPC + reg, val);
1975}
1915#endif 1976#endif
diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c
index e7dc653d5bd6..e8e92c853e89 100644
--- a/drivers/net/tg3.c
+++ b/drivers/net/tg3.c
@@ -9408,6 +9408,15 @@ static int __devinit tg3_is_sun_570X(struct tg3 *tp)
9408 return 0; 9408 return 0;
9409 if (venid == PCI_VENDOR_ID_SUN) 9409 if (venid == PCI_VENDOR_ID_SUN)
9410 return 1; 9410 return 1;
9411
9412 /* TG3 chips onboard the SunBlade-2500 don't have the
9413 * subsystem-vendor-id set to PCI_VENDOR_ID_SUN but they
9414 * are distinguishable from non-Sun variants by being
9415 * named "network" by the firmware. Non-Sun cards will
9416 * show up as being named "ethernet".
9417 */
9418 if (!strcmp(pcp->prom_name, "network"))
9419 return 1;
9411 } 9420 }
9412 return 0; 9421 return 0;
9413} 9422}
diff --git a/drivers/net/tlan.c b/drivers/net/tlan.c
index c2506b56a186..12076f8f942c 100644
--- a/drivers/net/tlan.c
+++ b/drivers/net/tlan.c
@@ -536,6 +536,7 @@ static int __devinit TLan_probe1(struct pci_dev *pdev,
536 u16 device_id; 536 u16 device_id;
537 int reg, rc = -ENODEV; 537 int reg, rc = -ENODEV;
538 538
539#ifdef CONFIG_PCI
539 if (pdev) { 540 if (pdev) {
540 rc = pci_enable_device(pdev); 541 rc = pci_enable_device(pdev);
541 if (rc) 542 if (rc)
@@ -547,6 +548,7 @@ static int __devinit TLan_probe1(struct pci_dev *pdev,
547 goto err_out; 548 goto err_out;
548 } 549 }
549 } 550 }
551#endif /* CONFIG_PCI */
550 552
551 dev = alloc_etherdev(sizeof(TLanPrivateInfo)); 553 dev = alloc_etherdev(sizeof(TLanPrivateInfo));
552 if (dev == NULL) { 554 if (dev == NULL) {
diff --git a/drivers/scsi/libata-core.c b/drivers/scsi/libata-core.c
index 5f1d7580218d..4f91b0dc572b 100644
--- a/drivers/scsi/libata-core.c
+++ b/drivers/scsi/libata-core.c
@@ -82,6 +82,10 @@ int atapi_enabled = 0;
82module_param(atapi_enabled, int, 0444); 82module_param(atapi_enabled, int, 0444);
83MODULE_PARM_DESC(atapi_enabled, "Enable discovery of ATAPI devices (0=off, 1=on)"); 83MODULE_PARM_DESC(atapi_enabled, "Enable discovery of ATAPI devices (0=off, 1=on)");
84 84
85int libata_fua = 0;
86module_param_named(fua, libata_fua, int, 0444);
87MODULE_PARM_DESC(fua, "FUA support (0=off, 1=on)");
88
85MODULE_AUTHOR("Jeff Garzik"); 89MODULE_AUTHOR("Jeff Garzik");
86MODULE_DESCRIPTION("Library module for ATA devices"); 90MODULE_DESCRIPTION("Library module for ATA devices");
87MODULE_LICENSE("GPL"); 91MODULE_LICENSE("GPL");
diff --git a/drivers/scsi/libata-scsi.c b/drivers/scsi/libata-scsi.c
index 07b1e7cc61df..59503c9ccac9 100644
--- a/drivers/scsi/libata-scsi.c
+++ b/drivers/scsi/libata-scsi.c
@@ -1708,6 +1708,8 @@ static int ata_dev_supports_fua(u16 *id)
1708{ 1708{
1709 unsigned char model[41], fw[9]; 1709 unsigned char model[41], fw[9];
1710 1710
1711 if (!libata_fua)
1712 return 0;
1711 if (!ata_id_has_fua(id)) 1713 if (!ata_id_has_fua(id))
1712 return 0; 1714 return 0;
1713 1715
diff --git a/drivers/scsi/libata.h b/drivers/scsi/libata.h
index e03ce48b7b4b..fddaf479a544 100644
--- a/drivers/scsi/libata.h
+++ b/drivers/scsi/libata.h
@@ -41,6 +41,7 @@ struct ata_scsi_args {
41 41
42/* libata-core.c */ 42/* libata-core.c */
43extern int atapi_enabled; 43extern int atapi_enabled;
44extern int libata_fua;
44extern struct ata_queued_cmd *ata_qc_new_init(struct ata_port *ap, 45extern struct ata_queued_cmd *ata_qc_new_init(struct ata_port *ap,
45 struct ata_device *dev); 46 struct ata_device *dev);
46extern int ata_rwcmd_protocol(struct ata_queued_cmd *qc); 47extern int ata_rwcmd_protocol(struct ata_queued_cmd *qc);
diff --git a/drivers/scsi/sata_sil.c b/drivers/scsi/sata_sil.c
index 17f74d3c10e7..9face3c6aa21 100644
--- a/drivers/scsi/sata_sil.c
+++ b/drivers/scsi/sata_sil.c
@@ -49,11 +49,13 @@
49#define DRV_VERSION "0.9" 49#define DRV_VERSION "0.9"
50 50
51enum { 51enum {
52 SIL_FLAG_RERR_ON_DMA_ACT = (1 << 29),
52 SIL_FLAG_MOD15WRITE = (1 << 30), 53 SIL_FLAG_MOD15WRITE = (1 << 30),
53 54
54 sil_3112 = 0, 55 sil_3112 = 0,
55 sil_3112_m15w = 1, 56 sil_3112_m15w = 1,
56 sil_3114 = 2, 57 sil_3512 = 2,
58 sil_3114 = 3,
57 59
58 SIL_FIFO_R0 = 0x40, 60 SIL_FIFO_R0 = 0x40,
59 SIL_FIFO_W0 = 0x41, 61 SIL_FIFO_W0 = 0x41,
@@ -90,7 +92,7 @@ static void sil_post_set_mode (struct ata_port *ap);
90static const struct pci_device_id sil_pci_tbl[] = { 92static const struct pci_device_id sil_pci_tbl[] = {
91 { 0x1095, 0x3112, PCI_ANY_ID, PCI_ANY_ID, 0, 0, sil_3112_m15w }, 93 { 0x1095, 0x3112, PCI_ANY_ID, PCI_ANY_ID, 0, 0, sil_3112_m15w },
92 { 0x1095, 0x0240, PCI_ANY_ID, PCI_ANY_ID, 0, 0, sil_3112_m15w }, 94 { 0x1095, 0x0240, PCI_ANY_ID, PCI_ANY_ID, 0, 0, sil_3112_m15w },
93 { 0x1095, 0x3512, PCI_ANY_ID, PCI_ANY_ID, 0, 0, sil_3112 }, 95 { 0x1095, 0x3512, PCI_ANY_ID, PCI_ANY_ID, 0, 0, sil_3512 },
94 { 0x1095, 0x3114, PCI_ANY_ID, PCI_ANY_ID, 0, 0, sil_3114 }, 96 { 0x1095, 0x3114, PCI_ANY_ID, PCI_ANY_ID, 0, 0, sil_3114 },
95 { 0x1002, 0x436e, PCI_ANY_ID, PCI_ANY_ID, 0, 0, sil_3112_m15w }, 97 { 0x1002, 0x436e, PCI_ANY_ID, PCI_ANY_ID, 0, 0, sil_3112_m15w },
96 { 0x1002, 0x4379, PCI_ANY_ID, PCI_ANY_ID, 0, 0, sil_3112_m15w }, 98 { 0x1002, 0x4379, PCI_ANY_ID, PCI_ANY_ID, 0, 0, sil_3112_m15w },
@@ -185,7 +187,8 @@ static const struct ata_port_info sil_port_info[] = {
185 .mwdma_mask = 0x07, /* mwdma0-2 */ 187 .mwdma_mask = 0x07, /* mwdma0-2 */
186 .udma_mask = 0x3f, /* udma0-5 */ 188 .udma_mask = 0x3f, /* udma0-5 */
187 .port_ops = &sil_ops, 189 .port_ops = &sil_ops,
188 }, /* sil_3112_15w - keep it sync'd w/ sil_3112 */ 190 },
191 /* sil_3112_15w - keep it sync'd w/ sil_3112 */
189 { 192 {
190 .sht = &sil_sht, 193 .sht = &sil_sht,
191 .host_flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY | 194 .host_flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY |
@@ -195,11 +198,24 @@ static const struct ata_port_info sil_port_info[] = {
195 .mwdma_mask = 0x07, /* mwdma0-2 */ 198 .mwdma_mask = 0x07, /* mwdma0-2 */
196 .udma_mask = 0x3f, /* udma0-5 */ 199 .udma_mask = 0x3f, /* udma0-5 */
197 .port_ops = &sil_ops, 200 .port_ops = &sil_ops,
198 }, /* sil_3114 */ 201 },
202 /* sil_3512 */
199 { 203 {
200 .sht = &sil_sht, 204 .sht = &sil_sht,
201 .host_flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY | 205 .host_flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY |
202 ATA_FLAG_SRST | ATA_FLAG_MMIO, 206 ATA_FLAG_SRST | ATA_FLAG_MMIO |
207 SIL_FLAG_RERR_ON_DMA_ACT,
208 .pio_mask = 0x1f, /* pio0-4 */
209 .mwdma_mask = 0x07, /* mwdma0-2 */
210 .udma_mask = 0x3f, /* udma0-5 */
211 .port_ops = &sil_ops,
212 },
213 /* sil_3114 */
214 {
215 .sht = &sil_sht,
216 .host_flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY |
217 ATA_FLAG_SRST | ATA_FLAG_MMIO |
218 SIL_FLAG_RERR_ON_DMA_ACT,
203 .pio_mask = 0x1f, /* pio0-4 */ 219 .pio_mask = 0x1f, /* pio0-4 */
204 .mwdma_mask = 0x07, /* mwdma0-2 */ 220 .mwdma_mask = 0x07, /* mwdma0-2 */
205 .udma_mask = 0x3f, /* udma0-5 */ 221 .udma_mask = 0x3f, /* udma0-5 */
@@ -216,12 +232,13 @@ static const struct {
216 unsigned long scr; /* SATA control register block */ 232 unsigned long scr; /* SATA control register block */
217 unsigned long sien; /* SATA Interrupt Enable register */ 233 unsigned long sien; /* SATA Interrupt Enable register */
218 unsigned long xfer_mode;/* data transfer mode register */ 234 unsigned long xfer_mode;/* data transfer mode register */
235 unsigned long sfis_cfg; /* SATA FIS reception config register */
219} sil_port[] = { 236} sil_port[] = {
220 /* port 0 ... */ 237 /* port 0 ... */
221 { 0x80, 0x8A, 0x00, 0x100, 0x148, 0xb4 }, 238 { 0x80, 0x8A, 0x00, 0x100, 0x148, 0xb4, 0x14c },
222 { 0xC0, 0xCA, 0x08, 0x180, 0x1c8, 0xf4 }, 239 { 0xC0, 0xCA, 0x08, 0x180, 0x1c8, 0xf4, 0x1cc },
223 { 0x280, 0x28A, 0x200, 0x300, 0x348, 0x2b4 }, 240 { 0x280, 0x28A, 0x200, 0x300, 0x348, 0x2b4, 0x34c },
224 { 0x2C0, 0x2CA, 0x208, 0x380, 0x3c8, 0x2f4 }, 241 { 0x2C0, 0x2CA, 0x208, 0x380, 0x3c8, 0x2f4, 0x3cc },
225 /* ... port 3 */ 242 /* ... port 3 */
226}; 243};
227 244
@@ -471,6 +488,23 @@ static int sil_init_one (struct pci_dev *pdev, const struct pci_device_id *ent)
471 dev_printk(KERN_WARNING, &pdev->dev, 488 dev_printk(KERN_WARNING, &pdev->dev,
472 "cache line size not set. Driver may not function\n"); 489 "cache line size not set. Driver may not function\n");
473 490
491 /* Apply R_ERR on DMA activate FIS errata workaround */
492 if (probe_ent->host_flags & SIL_FLAG_RERR_ON_DMA_ACT) {
493 int cnt;
494
495 for (i = 0, cnt = 0; i < probe_ent->n_ports; i++) {
496 tmp = readl(mmio_base + sil_port[i].sfis_cfg);
497 if ((tmp & 0x3) != 0x01)
498 continue;
499 if (!cnt)
500 dev_printk(KERN_INFO, &pdev->dev,
501 "Applying R_ERR on DMA activate "
502 "FIS errata fix\n");
503 writel(tmp & ~0x3, mmio_base + sil_port[i].sfis_cfg);
504 cnt++;
505 }
506 }
507
474 if (ent->driver_data == sil_3114) { 508 if (ent->driver_data == sil_3114) {
475 irq_mask = SIL_MASK_4PORT; 509 irq_mask = SIL_MASK_4PORT;
476 510
diff --git a/drivers/scsi/sd.c b/drivers/scsi/sd.c
index 930db398d107..9d9872347f56 100644
--- a/drivers/scsi/sd.c
+++ b/drivers/scsi/sd.c
@@ -89,6 +89,11 @@
89#define SD_MAX_RETRIES 5 89#define SD_MAX_RETRIES 5
90#define SD_PASSTHROUGH_RETRIES 1 90#define SD_PASSTHROUGH_RETRIES 1
91 91
92/*
93 * Size of the initial data buffer for mode and read capacity data
94 */
95#define SD_BUF_SIZE 512
96
92static void scsi_disk_release(struct kref *kref); 97static void scsi_disk_release(struct kref *kref);
93 98
94struct scsi_disk { 99struct scsi_disk {
@@ -1239,7 +1244,7 @@ sd_do_mode_sense(struct scsi_device *sdp, int dbd, int modepage,
1239 1244
1240/* 1245/*
1241 * read write protect setting, if possible - called only in sd_revalidate_disk() 1246 * read write protect setting, if possible - called only in sd_revalidate_disk()
1242 * called with buffer of length 512 1247 * called with buffer of length SD_BUF_SIZE
1243 */ 1248 */
1244static void 1249static void
1245sd_read_write_protect_flag(struct scsi_disk *sdkp, char *diskname, 1250sd_read_write_protect_flag(struct scsi_disk *sdkp, char *diskname,
@@ -1297,7 +1302,7 @@ sd_read_write_protect_flag(struct scsi_disk *sdkp, char *diskname,
1297 1302
1298/* 1303/*
1299 * sd_read_cache_type - called only from sd_revalidate_disk() 1304 * sd_read_cache_type - called only from sd_revalidate_disk()
1300 * called with buffer of length 512 1305 * called with buffer of length SD_BUF_SIZE
1301 */ 1306 */
1302static void 1307static void
1303sd_read_cache_type(struct scsi_disk *sdkp, char *diskname, 1308sd_read_cache_type(struct scsi_disk *sdkp, char *diskname,
@@ -1342,6 +1347,8 @@ sd_read_cache_type(struct scsi_disk *sdkp, char *diskname,
1342 1347
1343 /* Take headers and block descriptors into account */ 1348 /* Take headers and block descriptors into account */
1344 len += data.header_length + data.block_descriptor_length; 1349 len += data.header_length + data.block_descriptor_length;
1350 if (len > SD_BUF_SIZE)
1351 goto bad_sense;
1345 1352
1346 /* Get the data */ 1353 /* Get the data */
1347 res = sd_do_mode_sense(sdp, dbd, modepage, buffer, len, &data, &sshdr); 1354 res = sd_do_mode_sense(sdp, dbd, modepage, buffer, len, &data, &sshdr);
@@ -1354,6 +1361,12 @@ sd_read_cache_type(struct scsi_disk *sdkp, char *diskname,
1354 int ct = 0; 1361 int ct = 0;
1355 int offset = data.header_length + data.block_descriptor_length; 1362 int offset = data.header_length + data.block_descriptor_length;
1356 1363
1364 if (offset >= SD_BUF_SIZE - 2) {
1365 printk(KERN_ERR "%s: malformed MODE SENSE response",
1366 diskname);
1367 goto defaults;
1368 }
1369
1357 if ((buffer[offset] & 0x3f) != modepage) { 1370 if ((buffer[offset] & 0x3f) != modepage) {
1358 printk(KERN_ERR "%s: got wrong page\n", diskname); 1371 printk(KERN_ERR "%s: got wrong page\n", diskname);
1359 goto defaults; 1372 goto defaults;
@@ -1398,6 +1411,7 @@ defaults:
1398 diskname); 1411 diskname);
1399 sdkp->WCE = 0; 1412 sdkp->WCE = 0;
1400 sdkp->RCD = 0; 1413 sdkp->RCD = 0;
1414 sdkp->DPOFUA = 0;
1401} 1415}
1402 1416
1403/** 1417/**
@@ -1421,7 +1435,7 @@ static int sd_revalidate_disk(struct gendisk *disk)
1421 if (!scsi_device_online(sdp)) 1435 if (!scsi_device_online(sdp))
1422 goto out; 1436 goto out;
1423 1437
1424 buffer = kmalloc(512, GFP_KERNEL | __GFP_DMA); 1438 buffer = kmalloc(SD_BUF_SIZE, GFP_KERNEL | __GFP_DMA);
1425 if (!buffer) { 1439 if (!buffer) {
1426 printk(KERN_WARNING "(sd_revalidate_disk:) Memory allocation " 1440 printk(KERN_WARNING "(sd_revalidate_disk:) Memory allocation "
1427 "failure.\n"); 1441 "failure.\n");
diff --git a/drivers/serial/8250.c b/drivers/serial/8250.c
index 244e8ff11977..7aca22c9976d 100644
--- a/drivers/serial/8250.c
+++ b/drivers/serial/8250.c
@@ -2326,6 +2326,12 @@ static struct uart_driver serial8250_reg = {
2326 .cons = SERIAL8250_CONSOLE, 2326 .cons = SERIAL8250_CONSOLE,
2327}; 2327};
2328 2328
2329/*
2330 * early_serial_setup - early registration for 8250 ports
2331 *
2332 * Setup an 8250 port structure prior to console initialisation. Use
2333 * after console initialisation will cause undefined behaviour.
2334 */
2329int __init early_serial_setup(struct uart_port *port) 2335int __init early_serial_setup(struct uart_port *port)
2330{ 2336{
2331 if (port->line >= ARRAY_SIZE(serial8250_ports)) 2337 if (port->line >= ARRAY_SIZE(serial8250_ports))
diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig
index e64ed16bd42f..f5079c78ba4e 100644
--- a/drivers/video/Kconfig
+++ b/drivers/video/Kconfig
@@ -520,7 +520,7 @@ config FB_GBE
520config FB_GBE_MEM 520config FB_GBE_MEM
521 int "Video memory size in MB" 521 int "Video memory size in MB"
522 depends on FB_GBE 522 depends on FB_GBE
523 default 8 523 default 4
524 help 524 help
525 This is the amount of memory reserved for the framebuffer, 525 This is the amount of memory reserved for the framebuffer,
526 which can be any value between 1MB and 8MB. 526 which can be any value between 1MB and 8MB.
diff --git a/drivers/video/asiliantfb.c b/drivers/video/asiliantfb.c
index 69f75547865d..c924d81f7978 100644
--- a/drivers/video/asiliantfb.c
+++ b/drivers/video/asiliantfb.c
@@ -322,32 +322,29 @@ static int asiliantfb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
322 writeb(green, mmio_base + 0x791); 322 writeb(green, mmio_base + 0x791);
323 writeb(blue, mmio_base + 0x791); 323 writeb(blue, mmio_base + 0x791);
324 324
325 switch(p->var.bits_per_pixel) { 325 if (regno < 16) {
326 case 15: 326 switch(p->var.red.offset) {
327 if (regno < 16) { 327 case 10: /* RGB 555 */
328 ((u32 *)(p->pseudo_palette))[regno] = 328 ((u32 *)(p->pseudo_palette))[regno] =
329 ((red & 0xf8) << 7) | 329 ((red & 0xf8) << 7) |
330 ((green & 0xf8) << 2) | 330 ((green & 0xf8) << 2) |
331 ((blue & 0xf8) >> 3); 331 ((blue & 0xf8) >> 3);
332 } 332 break;
333 break; 333 case 11: /* RGB 565 */
334 case 16:
335 if (regno < 16) {
336 ((u32 *)(p->pseudo_palette))[regno] = 334 ((u32 *)(p->pseudo_palette))[regno] =
337 ((red & 0xf8) << 8) | 335 ((red & 0xf8) << 8) |
338 ((green & 0xfc) << 3) | 336 ((green & 0xfc) << 3) |
339 ((blue & 0xf8) >> 3); 337 ((blue & 0xf8) >> 3);
340 } 338 break;
341 break; 339 case 16: /* RGB 888 */
342 case 24:
343 if (regno < 24) {
344 ((u32 *)(p->pseudo_palette))[regno] = 340 ((u32 *)(p->pseudo_palette))[regno] =
345 (red << 16) | 341 (red << 16) |
346 (green << 8) | 342 (green << 8) |
347 (blue); 343 (blue);
344 break;
348 } 345 }
349 break;
350 } 346 }
347
351 return 0; 348 return 0;
352} 349}
353 350
diff --git a/drivers/video/au1100fb.c b/drivers/video/au1100fb.c
index 2406899f1207..3d04b2def0f1 100644
--- a/drivers/video/au1100fb.c
+++ b/drivers/video/au1100fb.c
@@ -49,6 +49,7 @@
49#include <linux/interrupt.h> 49#include <linux/interrupt.h>
50#include <linux/ctype.h> 50#include <linux/ctype.h>
51#include <linux/dma-mapping.h> 51#include <linux/dma-mapping.h>
52#include <linux/platform_device.h>
52 53
53#include <asm/mach-au1x00/au1000.h> 54#include <asm/mach-au1x00/au1000.h>
54 55
@@ -406,7 +407,7 @@ int au1100fb_fb_mmap(struct fb_info *fbi, struct vm_area_struct *vma)
406 407
407 vma->vm_flags |= VM_IO; 408 vma->vm_flags |= VM_IO;
408 409
409 if (io_remap_page_range(vma, vma->vm_start, off, 410 if (io_remap_pfn_range(vma, vma->vm_start, off >> PAGE_SHIFT,
410 vma->vm_end - vma->vm_start, 411 vma->vm_end - vma->vm_start,
411 vma->vm_page_prot)) { 412 vma->vm_page_prot)) {
412 return -EAGAIN; 413 return -EAGAIN;
diff --git a/drivers/video/console/vgacon.c b/drivers/video/console/vgacon.c
index 12d9329d1408..5a86978537d2 100644
--- a/drivers/video/console/vgacon.c
+++ b/drivers/video/console/vgacon.c
@@ -509,57 +509,60 @@ static int vgacon_doresize(struct vc_data *c,
509{ 509{
510 unsigned long flags; 510 unsigned long flags;
511 unsigned int scanlines = height * c->vc_font.height; 511 unsigned int scanlines = height * c->vc_font.height;
512 u8 scanlines_lo, r7, vsync_end, mode, max_scan; 512 u8 scanlines_lo = 0, r7 = 0, vsync_end = 0, mode, max_scan;
513 513
514 spin_lock_irqsave(&vga_lock, flags); 514 spin_lock_irqsave(&vga_lock, flags);
515 515
516 outb_p(VGA_CRTC_MAX_SCAN, vga_video_port_reg);
517 max_scan = inb_p(vga_video_port_val);
518
519 if (max_scan & 0x80)
520 scanlines <<= 1;
521
522 vgacon_xres = width * VGA_FONTWIDTH; 516 vgacon_xres = width * VGA_FONTWIDTH;
523 vgacon_yres = height * c->vc_font.height; 517 vgacon_yres = height * c->vc_font.height;
524 outb_p(VGA_CRTC_MODE, vga_video_port_reg); 518 if (vga_video_type >= VIDEO_TYPE_VGAC) {
525 mode = inb_p(vga_video_port_val); 519 outb_p(VGA_CRTC_MAX_SCAN, vga_video_port_reg);
520 max_scan = inb_p(vga_video_port_val);
526 521
527 if (mode & 0x04) 522 if (max_scan & 0x80)
528 scanlines >>= 1; 523 scanlines <<= 1;
529 524
530 scanlines -= 1; 525 outb_p(VGA_CRTC_MODE, vga_video_port_reg);
531 scanlines_lo = scanlines & 0xff; 526 mode = inb_p(vga_video_port_val);
532 527
533 outb_p(VGA_CRTC_OVERFLOW, vga_video_port_reg); 528 if (mode & 0x04)
534 r7 = inb_p(vga_video_port_val) & ~0x42; 529 scanlines >>= 1;
535 530
536 if (scanlines & 0x100) 531 scanlines -= 1;
537 r7 |= 0x02; 532 scanlines_lo = scanlines & 0xff;
538 if (scanlines & 0x200)
539 r7 |= 0x40;
540 533
541 /* deprotect registers */ 534 outb_p(VGA_CRTC_OVERFLOW, vga_video_port_reg);
542 outb_p(VGA_CRTC_V_SYNC_END, vga_video_port_reg); 535 r7 = inb_p(vga_video_port_val) & ~0x42;
543 vsync_end = inb_p(vga_video_port_val); 536
544 outb_p(VGA_CRTC_V_SYNC_END, vga_video_port_reg); 537 if (scanlines & 0x100)
545 outb_p(vsync_end & ~0x80, vga_video_port_val); 538 r7 |= 0x02;
539 if (scanlines & 0x200)
540 r7 |= 0x40;
541
542 /* deprotect registers */
543 outb_p(VGA_CRTC_V_SYNC_END, vga_video_port_reg);
544 vsync_end = inb_p(vga_video_port_val);
545 outb_p(VGA_CRTC_V_SYNC_END, vga_video_port_reg);
546 outb_p(vsync_end & ~0x80, vga_video_port_val);
547 }
546 548
547 outb_p(VGA_CRTC_H_DISP, vga_video_port_reg); 549 outb_p(VGA_CRTC_H_DISP, vga_video_port_reg);
548 outb_p(width - 1, vga_video_port_val); 550 outb_p(width - 1, vga_video_port_val);
549 outb_p(VGA_CRTC_OFFSET, vga_video_port_reg); 551 outb_p(VGA_CRTC_OFFSET, vga_video_port_reg);
550 outb_p(width >> 1, vga_video_port_val); 552 outb_p(width >> 1, vga_video_port_val);
551 553
552 outb_p(VGA_CRTC_V_DISP_END, vga_video_port_reg); 554 if (vga_video_type >= VIDEO_TYPE_VGAC) {
553 outb_p(scanlines_lo, vga_video_port_val); 555 outb_p(VGA_CRTC_V_DISP_END, vga_video_port_reg);
554 outb_p(VGA_CRTC_OVERFLOW, vga_video_port_reg); 556 outb_p(scanlines_lo, vga_video_port_val);
555 outb_p(r7,vga_video_port_val); 557 outb_p(VGA_CRTC_OVERFLOW, vga_video_port_reg);
558 outb_p(r7,vga_video_port_val);
556 559
557 /* reprotect registers */ 560 /* reprotect registers */
558 outb_p(VGA_CRTC_V_SYNC_END, vga_video_port_reg); 561 outb_p(VGA_CRTC_V_SYNC_END, vga_video_port_reg);
559 outb_p(vsync_end, vga_video_port_val); 562 outb_p(vsync_end, vga_video_port_val);
563 }
560 564
561 spin_unlock_irqrestore(&vga_lock, flags); 565 spin_unlock_irqrestore(&vga_lock, flags);
562
563 return 0; 566 return 0;
564} 567}
565 568
diff --git a/drivers/video/gbefb.c b/drivers/video/gbefb.c
index c9a7cdf6d543..5e25b9860196 100644
--- a/drivers/video/gbefb.c
+++ b/drivers/video/gbefb.c
@@ -656,12 +656,15 @@ static int gbefb_set_par(struct fb_info *info)
656 switch (bytesPerPixel) { 656 switch (bytesPerPixel) {
657 case 1: 657 case 1:
658 SET_GBE_FIELD(WID, TYP, val, GBE_CMODE_I8); 658 SET_GBE_FIELD(WID, TYP, val, GBE_CMODE_I8);
659 info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
659 break; 660 break;
660 case 2: 661 case 2:
661 SET_GBE_FIELD(WID, TYP, val, GBE_CMODE_ARGB5); 662 SET_GBE_FIELD(WID, TYP, val, GBE_CMODE_ARGB5);
663 info->fix.visual = FB_VISUAL_TRUECOLOR;
662 break; 664 break;
663 case 4: 665 case 4:
664 SET_GBE_FIELD(WID, TYP, val, GBE_CMODE_RGB8); 666 SET_GBE_FIELD(WID, TYP, val, GBE_CMODE_RGB8);
667 info->fix.visual = FB_VISUAL_TRUECOLOR;
665 break; 668 break;
666 } 669 }
667 SET_GBE_FIELD(WID, BUF, val, GBE_BMODE_BOTH); 670 SET_GBE_FIELD(WID, BUF, val, GBE_BMODE_BOTH);
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-18 13:19:33 -0500