[SCSI] aic79xx: Sequencer update

Update sequencer code to Adaptec version 2.0.12-6.3.9.

Signed-off-by: James Bottomley <James.Bottomley@SteelEye.com>

9 files changed, 1911 insertions, 1538 deletions

diff --git a/drivers/scsi/aic7xxx/aic79xx.h b/drivers/scsi/aic7xxx/aic79xx.h
index ac3d07a2a286..2cfdbef447db 100644
--- a/drivers/scsi/aic7xxx/aic79xx.h
+++ b/drivers/scsi/aic7xxx/aic79xx.h
@@ -75,8 +75,7 @@ struct scb_platform_data;
 #define INITIATOR_WILDCARD      (~0)
 #define SCB_LIST_NULL           0xFF00
 #define SCB_LIST_NULL_LE        (ahd_htole16(SCB_LIST_NULL))
-#define QOUTFIFO_ENTRY_VALID 0x8000
-#define QOUTFIFO_ENTRY_VALID_LE (ahd_htole16(0x8000))
+#define QOUTFIFO_ENTRY_VALID 0x80
 #define SCBID_IS_NULL(scbid) (((scbid) & 0xFF00 ) == SCB_LIST_NULL)
 
 #define SCSIID_TARGET(ahd, scsiid)      \
@@ -1053,6 +1052,13 @@ typedef uint8_t ahd_mode_state;
 
 typedef void ahd_callback_t (void *);
 
+struct ahd_completion
+{
+        uint16_t        tag;
+        uint8_t         sg_status;
+        uint8_t         valid_tag;
+};
+
 struct ahd_softc {
         bus_space_tag_t           tags[2];
         bus_space_handle_t        bshs[2];
@@ -1142,11 +1148,11 @@ struct ahd_softc {
         struct seeprom_config    *seep_config;
 
         /* Command Queues */
+        struct ahd_completion     *qoutfifo;
         uint16_t                  qoutfifonext;
         uint16_t                  qoutfifonext_valid_tag;
         uint16_t                  qinfifonext;
         uint16_t                  qinfifo[AHD_SCB_MAX];
-        uint16_t                 *qoutfifo;
 
         /*
          * Our qfreeze count.  The sequencer compares
diff --git a/drivers/scsi/aic7xxx/aic79xx.reg b/drivers/scsi/aic7xxx/aic79xx.reg
index cca58edc8648..3a3204703b15 100644
--- a/drivers/scsi/aic7xxx/aic79xx.reg
+++ b/drivers/scsi/aic7xxx/aic79xx.reg
@@ -39,7 +39,7 @@
  *
  * $FreeBSD$
  */
-VERSION = "$Id: //depot/aic7xxx/aic7xxx/aic79xx.reg#70 $"
+VERSION = "$Id: //depot/aic7xxx/aic7xxx/aic79xx.reg#76 $"
 
 /*
  * This file is processed by the aic7xxx_asm utility for use in assembling
@@ -65,13 +65,6 @@ VERSION = "$Id: //depot/aic7xxx/aic7xxx/aic79xx.reg#70 $"
                 mvi     MODE_PTR, MK_MODE(src, dst);                    \
         }
 
-#define TOGGLE_DFF_MODE                                                 \
-        if ((ahd->bugs & AHD_SET_MODE_BUG) != 0) {                      \
-                call    toggle_dff_mode_work_around;                    \
-        } else {                                                        \
-                xor     MODE_PTR, MK_MODE(M_DFF1, M_DFF1);              \
-        }
-        
 #define RESTORE_MODE(mode)                                              \
         if ((ahd->bugs & AHD_SET_MODE_BUG) != 0) {                      \
                 mov     mode call set_mode_work_around;                 \
@@ -1199,7 +1192,7 @@ register TARGPCISTAT {
 
 /*
  * LQ Packet In
- * The last LQ Packet received
+ * The last LQ Packet recieved
  */
 register LQIN {
         address                 0x020
@@ -3542,10 +3535,34 @@ scratch_ram {
         COMPLETE_DMA_SCB_HEAD {
                 size            2
         }
-        /* Counting semaphore to prevent new select-outs */
+        /*
+         * tail of list of SCBs that have
+         * completed but need to be uploaded
+         * to the host prior to being completed.
+         */
+        COMPLETE_DMA_SCB_TAIL {
+                size            2
+        }
+        /*
+         * head of list of SCBs that have
+         * been uploaded to the host, but cannot
+         * be completed until the QFREEZE is in
+         * full effect (i.e. no selections pending).
+         */
+        COMPLETE_ON_QFREEZE_HEAD {
+                size            2
+        }
+        /*
+         * Counting semaphore to prevent new select-outs
+         * The queue is frozen so long as the sequencer
+         * and kernel freeze counts differ.
+         */
         QFREEZE_COUNT {
                 size            2
         }
+        KERNEL_QFREEZE_COUNT {
+                size            2
+        }
         /*
          * Mode to restore on legacy idle loop exit.
          */
@@ -3625,6 +3642,17 @@ scratch_ram {
                 size            1
         }
         /*
+         * Kernel and sequencer offsets into the queue of
+         * incoming target mode command descriptors.  The
+         * queue is full when the KERNEL_TQINPOS == TQINPOS.
+         */
+        KERNEL_TQINPOS {
+                size            1
+        }
+        TQINPOS {                
+                size            1
+        }
+        /*
          * Base address of our shared data with the kernel driver in host
          * memory.  This includes the qoutfifo and target mode
          * incoming command queue.
@@ -3639,17 +3667,6 @@ scratch_ram {
         QOUTFIFO_NEXT_ADDR {
                 size            4
         }
-        /*
-         * Kernel and sequencer offsets into the queue of
-         * incoming target mode command descriptors.  The
-         * queue is full when the KERNEL_TQINPOS == TQINPOS.
-         */
-        KERNEL_TQINPOS {
-                size            1
-        }
-        TQINPOS {                
-                size            1
-        }
         ARG_1 {
                 size            1
                 mask    SEND_MSG                0x80
@@ -3951,6 +3968,7 @@ const SG_PREFETCH_ADDR_MASK download
 const SG_SIZEOF download
 const PKT_OVERRUN_BUFOFFSET download
 const SCB_TRANSFER_SIZE download
+const CACHELINE_MASK download
 
 /*
  * BIOS SCB offsets
diff --git a/drivers/scsi/aic7xxx/aic79xx.seq b/drivers/scsi/aic7xxx/aic79xx.seq
index 65339bc1ca99..bef1f9d369b6 100644
--- a/drivers/scsi/aic7xxx/aic79xx.seq
+++ b/drivers/scsi/aic7xxx/aic79xx.seq
@@ -40,7 +40,7 @@
  * $FreeBSD$
  */
 
-VERSION = "$Id: //depot/aic7xxx/aic7xxx/aic79xx.seq#99 $"
+VERSION = "$Id: //depot/aic7xxx/aic7xxx/aic79xx.seq#119 $"
 PATCH_ARG_LIST = "struct ahd_softc *ahd"
 PREFIX = "ahd_"
 
@@ -68,13 +68,47 @@ no_error_set:
         }
         SET_MODE(M_SCSI, M_SCSI)
         test    SCSISEQ0, ENSELO|ENARBO jnz idle_loop_checkbus;
-        test    SEQ_FLAGS2, SELECTOUT_QFROZEN jnz idle_loop_checkbus;
+        test    SEQ_FLAGS2, SELECTOUT_QFROZEN jz check_waiting_list;
+        /*
+         * If the kernel has caught up with us, thaw the queue.
+         */
+        mov     A, KERNEL_QFREEZE_COUNT;
+        cmp     QFREEZE_COUNT, A jne check_frozen_completions;
+        mov     A, KERNEL_QFREEZE_COUNT[1];
+        cmp     QFREEZE_COUNT[1], A jne check_frozen_completions;
+        and     SEQ_FLAGS2, ~SELECTOUT_QFROZEN;
+        jmp     check_waiting_list;
+check_frozen_completions:
+        test    SSTAT0, SELDO|SELINGO jnz idle_loop_checkbus;
+BEGIN_CRITICAL;
+        /*
+         * If we have completions stalled waiting for the qfreeze
+         * to take effect, move them over to the complete_scb list
+         * now that no selections are pending.
+         */
+        cmp     COMPLETE_ON_QFREEZE_HEAD[1],SCB_LIST_NULL je idle_loop_checkbus;
+        /*
+         * Find the end of the qfreeze list.  The first element has
+         * to be treated specially.
+         */
+        bmov    SCBPTR, COMPLETE_ON_QFREEZE_HEAD, 2;
+        cmp     SCB_NEXT_COMPLETE[1], SCB_LIST_NULL je join_lists;
+        /*
+         * Now the normal loop.
+         */
+        bmov    SCBPTR, SCB_NEXT_COMPLETE, 2;
+        cmp     SCB_NEXT_COMPLETE[1], SCB_LIST_NULL jne . - 1;
+join_lists:
+        bmov    SCB_NEXT_COMPLETE, COMPLETE_SCB_HEAD, 2;
+        bmov    COMPLETE_SCB_HEAD, COMPLETE_ON_QFREEZE_HEAD, 2;
+        mvi     COMPLETE_ON_QFREEZE_HEAD[1], SCB_LIST_NULL;
+        jmp     idle_loop_checkbus;
+check_waiting_list:
         cmp     WAITING_TID_HEAD[1], SCB_LIST_NULL je idle_loop_checkbus;
         /*
          * ENSELO is cleared by a SELDO, so we must test for SELDO
          * one last time.
          */
-BEGIN_CRITICAL;
         test    SSTAT0, SELDO jnz select_out;
 END_CRITICAL;
         call    start_selection;
@@ -90,6 +124,13 @@ idle_loop_check_nonpackreq:
         test    SSTAT2, NONPACKREQ jz . + 2;
         call    unexpected_nonpkt_phase_find_ctxt;
         if ((ahd->bugs & AHD_FAINT_LED_BUG) != 0) {
+                /*
+                 * On Rev A. hardware, the busy LED is only
+                 * turned on automaically during selections
+                 * and re-selections.  Make the LED status
+                 * more useful by forcing it to be on so
+                 * long as one of our data FIFOs is active.
+                 */
                 and     A, FIFO0FREE|FIFO1FREE, DFFSTAT;
                 cmp     A, FIFO0FREE|FIFO1FREE jne . + 3;
                 and     SBLKCTL, ~DIAGLEDEN|DIAGLEDON;
@@ -101,9 +142,9 @@ idle_loop_check_nonpackreq:
         call    idle_loop_cchan;
         jmp     idle_loop;
 
-BEGIN_CRITICAL;
 idle_loop_gsfifo:
         SET_MODE(M_SCSI, M_SCSI)
+BEGIN_CRITICAL;
 idle_loop_gsfifo_in_scsi_mode:
         test    LQISTAT2, LQIGSAVAIL jz return;
         /*
@@ -152,11 +193,15 @@ END_CRITICAL;
 
 idle_loop_service_fifos:
         SET_MODE(M_DFF0, M_DFF0)
+BEGIN_CRITICAL;
         test    LONGJMP_ADDR[1], INVALID_ADDR jnz idle_loop_next_fifo;
         call    longjmp;
+END_CRITICAL;
 idle_loop_next_fifo:
         SET_MODE(M_DFF1, M_DFF1)
+BEGIN_CRITICAL;
         test    LONGJMP_ADDR[1], INVALID_ADDR jz longjmp;
+END_CRITICAL;
 return:
         ret;
 
@@ -170,7 +215,6 @@ BEGIN_CRITICAL;
         test    CCSCBCTL, CCARREN|CCSCBEN jz scbdma_idle;
         test    CCSCBCTL, CCSCBDIR jnz fetch_new_scb_inprog;
         test    CCSCBCTL, CCSCBDONE jz return;
-END_CRITICAL;
         /* FALLTHROUGH */
 scbdma_tohost_done:
         test    CCSCBCTL, CCARREN jz fill_qoutfifo_dmadone;
@@ -180,26 +224,18 @@ scbdma_tohost_done:
          * bad SCSI status (currently only for underruns), we
          * queue the SCB for normal completion.  Otherwise, we
          * wait until any select-out activity has halted, and
-         * then notify the host so that the transaction can be
-         * dealt with.
+         * then queue the completion.
          */
-        test    SCB_SCSI_STATUS, 0xff jnz scbdma_notify_host;
         and     CCSCBCTL, ~(CCARREN|CCSCBEN);
         bmov    COMPLETE_DMA_SCB_HEAD, SCB_NEXT_COMPLETE, 2;
+        cmp     SCB_NEXT_COMPLETE[1], SCB_LIST_NULL jne . + 2;
+        mvi     COMPLETE_DMA_SCB_TAIL[1], SCB_LIST_NULL;
+        test    SCB_SCSI_STATUS, 0xff jz scbdma_queue_completion;
+        bmov    SCB_NEXT_COMPLETE, COMPLETE_ON_QFREEZE_HEAD, 2;
+        bmov    COMPLETE_ON_QFREEZE_HEAD, SCBPTR, 2 ret;
+scbdma_queue_completion:
         bmov    SCB_NEXT_COMPLETE, COMPLETE_SCB_HEAD, 2;
         bmov    COMPLETE_SCB_HEAD, SCBPTR, 2 ret;
-scbdma_notify_host:
-        SET_MODE(M_SCSI, M_SCSI)
-        test    SCSISEQ0, ENSELO jnz return;
-        test    SSTAT0, (SELDO|SELINGO) jnz return;
-        SET_MODE(M_CCHAN, M_CCHAN)
-        /*
-         * Remove SCB and notify host.
-         */
-        and     CCSCBCTL, ~(CCARREN|CCSCBEN);
-        bmov    COMPLETE_DMA_SCB_HEAD, SCB_NEXT_COMPLETE, 2;
-        SET_SEQINTCODE(BAD_SCB_STATUS)
-        ret;
 fill_qoutfifo_dmadone:
         and     CCSCBCTL, ~(CCARREN|CCSCBEN);
         call    qoutfifo_updated;
@@ -208,6 +244,7 @@ fill_qoutfifo_dmadone:
         test    QOFF_CTLSTA, SDSCB_ROLLOVR jz return;
         bmov    QOUTFIFO_NEXT_ADDR, SHARED_DATA_ADDR, 4;
         xor     QOUTFIFO_ENTRY_VALID_TAG, QOUTFIFO_ENTRY_VALID_TOGGLE ret;
+END_CRITICAL;
 
 qoutfifo_updated:
         /*
@@ -324,14 +361,15 @@ fill_qoutfifo:
          * Keep track of the SCBs we are dmaing just
          * in case the DMA fails or is aborted.
          */
-        mov     A, QOUTFIFO_ENTRY_VALID_TAG;
         bmov    COMPLETE_SCB_DMAINPROG_HEAD, COMPLETE_SCB_HEAD, 2;
         mvi     CCSCBCTL, CCSCBRESET;
         bmov    SCBHADDR, QOUTFIFO_NEXT_ADDR, 4;
+        mov     A, QOUTFIFO_NEXT_ADDR;
         bmov    SCBPTR, COMPLETE_SCB_HEAD, 2;
 fill_qoutfifo_loop:
-        mov     CCSCBRAM, SCBPTR;
-        or      CCSCBRAM, A, SCBPTR[1];
+        bmov    CCSCBRAM, SCBPTR, 2;
+        mov     CCSCBRAM, SCB_SGPTR[0];
+        mov     CCSCBRAM, QOUTFIFO_ENTRY_VALID_TAG;
         mov     NONE, SDSCB_QOFF;
         inc     INT_COALESCING_CMDCOUNT;
         add     CMDS_PENDING, -1;
@@ -339,6 +377,18 @@ fill_qoutfifo_loop:
         cmp     SCB_NEXT_COMPLETE[1], SCB_LIST_NULL je fill_qoutfifo_done;
         cmp     CCSCBADDR, CCSCBADDR_MAX je fill_qoutfifo_done;
         test    QOFF_CTLSTA, SDSCB_ROLLOVR jnz fill_qoutfifo_done;
+        /*
+         * Don't cross an ADB or Cachline boundary when DMA'ing
+         * completion entries.  In PCI mode, at least in 32/33
+         * configurations, the SCB DMA engine may lose its place
+         * in the data-stream should the target force a retry on
+         * something other than an 8byte aligned boundary. In
+         * PCI-X mode, we do this to avoid split transactions since
+         * many chipsets seem to be unable to format proper split
+         * completions to continue the data transfer.
+         */
+        add     SINDEX, A, CCSCBADDR;
+        test    SINDEX, CACHELINE_MASK jz fill_qoutfifo_done;
         bmov    SCBPTR, SCB_NEXT_COMPLETE, 2;
         jmp     fill_qoutfifo_loop;
 fill_qoutfifo_done:
@@ -354,7 +404,6 @@ dma_complete_scb:
         bmov    SCBPTR, COMPLETE_DMA_SCB_HEAD, 2;
         bmov    SCBHADDR, SCB_BUSADDR, 4;
         mvi     CCARREN|CCSCBEN|CCSCBRESET jmp dma_scb;
-END_CRITICAL;
 
 /*
  * Either post or fetch an SCB from host memory.  The caller
@@ -371,9 +420,19 @@ dma_scb:
         mvi     SCBHCNT, SCB_TRANSFER_SIZE;
         mov     CCSCBCTL, SINDEX ret;
 
-BEGIN_CRITICAL;
 setjmp:
-        bmov    LONGJMP_ADDR, STACK, 2 ret;
+        /*
+         * At least on the A, a return in the same
+         * instruction as the bmov results in a return
+         * to the caller, not to the new address at the
+         * top of the stack.  Since we want the latter
+         * (we use setjmp to register a handler from an
+         * interrupt context but not invoke that handler
+         * until we return to our idle loop), use a
+         * separate ret instruction.
+         */
+        bmov    LONGJMP_ADDR, STACK, 2;
+        ret;
 setjmp_inline:
         bmov    LONGJMP_ADDR, STACK, 2;
 longjmp:
@@ -392,11 +451,6 @@ set_mode_work_around:
         mvi     SEQINTCTL, INTVEC1DSL;
         mov     MODE_PTR, SINDEX;
         clr     SEQINTCTL ret;
-
-toggle_dff_mode_work_around:
-        mvi     SEQINTCTL, INTVEC1DSL;
-        xor     MODE_PTR, MK_MODE(M_DFF1, M_DFF1);
-        clr     SEQINTCTL ret;
 }
 
 
@@ -490,6 +544,21 @@ allocate_fifo1:
 SET_SRC_MODE    M_SCSI;
 SET_DST_MODE    M_SCSI;
 select_in:
+        if ((ahd->bugs & AHD_FAINT_LED_BUG) != 0) {
+                /*
+                 * On Rev A. hardware, the busy LED is only
+                 * turned on automaically during selections
+                 * and re-selections.  Make the LED status
+                 * more useful by forcing it to be on from
+                 * the point of selection until our idle
+                 * loop determines that neither of our FIFOs
+                 * are busy.  This handles the non-packetized
+                 * case nicely as we will not return to the
+                 * idle loop until the busfree at the end of
+                 * each transaction.
+                 */
+                or      SBLKCTL, DIAGLEDEN|DIAGLEDON;
+        }
         if ((ahd->bugs & AHD_BUSFREEREV_BUG) != 0) {
                 /*
                  * Test to ensure that the bus has not
@@ -528,6 +597,21 @@ SET_SRC_MODE	M_SCSI;
 SET_DST_MODE    M_SCSI;
 select_out:
 BEGIN_CRITICAL;
+        if ((ahd->bugs & AHD_FAINT_LED_BUG) != 0) {
+                /*
+                 * On Rev A. hardware, the busy LED is only
+                 * turned on automaically during selections
+                 * and re-selections.  Make the LED status
+                 * more useful by forcing it to be on from
+                 * the point of re-selection until our idle
+                 * loop determines that neither of our FIFOs
+                 * are busy.  This handles the non-packetized
+                 * case nicely as we will not return to the
+                 * idle loop until the busfree at the end of
+                 * each transaction.
+                 */
+                or      SBLKCTL, DIAGLEDEN|DIAGLEDON;
+        }
         /* Clear out all SCBs that have been successfully sent. */
         if ((ahd->bugs & AHD_SENT_SCB_UPDATE_BUG) != 0) {
                 /*
@@ -1000,15 +1084,9 @@ not_found_ITloop:
 /*
  * We received a "command complete" message.  Put the SCB on the complete
  * queue and trigger a completion interrupt via the idle loop.  Before doing
- * so, check to see if there
- * is a residual or the status byte is something other than STATUS_GOOD (0).
- * In either of these conditions, we upload the SCB back to the host so it can
- * process this information.  In the case of a non zero status byte, we 
- * additionally interrupt the kernel driver synchronously, allowing it to
- * decide if sense should be retrieved.  If the kernel driver wishes to request
- * sense, it will fill the kernel SCB with a request sense command, requeue
- * it to the QINFIFO and tell us not to post to the QOUTFIFO by setting 
- * RETURN_1 to SEND_SENSE.
+ * so, check to see if there is a residual or the status byte is something
+ * other than STATUS_GOOD (0).  In either of these conditions, we upload the
+ * SCB back to the host so it can process this information.
  */
 mesgin_complete:
 
@@ -1053,6 +1131,7 @@ complete_nomsg:
         call    queue_scb_completion;
         jmp     await_busfree;
 
+BEGIN_CRITICAL;
 freeze_queue:
         /* Cancel any pending select-out. */
         test    SSTAT0, SELDO|SELINGO jnz . + 2;
@@ -1063,6 +1142,7 @@ freeze_queue:
         adc     QFREEZE_COUNT[1], A;
         or      SEQ_FLAGS2, SELECTOUT_QFROZEN;
         mov     A, ACCUM_SAVE ret;
+END_CRITICAL;
 
 /*
  * Complete the current FIFO's SCB if data for this same
@@ -1085,8 +1165,10 @@ queue_scb_completion:
         test    SCB_SGPTR, SG_FULL_RESID jnz upload_scb;/* Never xfered */
         test    SCB_RESIDUAL_SGPTR, SG_LIST_NULL jz upload_scb;
 complete:
+BEGIN_CRITICAL;
         bmov    SCB_NEXT_COMPLETE, COMPLETE_SCB_HEAD, 2;
         bmov    COMPLETE_SCB_HEAD, SCBPTR, 2 ret;
+END_CRITICAL;
 bad_status:
         cmp     SCB_SCSI_STATUS, STATUS_PKT_SENSE je upload_scb;
         call    freeze_queue;
@@ -1097,9 +1179,18 @@ upload_scb:
          * it on the host.
          */
         bmov    SCB_TAG, SCBPTR, 2;
-        bmov    SCB_NEXT_COMPLETE, COMPLETE_DMA_SCB_HEAD, 2;
+BEGIN_CRITICAL;
+        or      SCB_SGPTR, SG_STATUS_VALID;
+        mvi     SCB_NEXT_COMPLETE[1], SCB_LIST_NULL;
+        cmp     COMPLETE_DMA_SCB_HEAD[1], SCB_LIST_NULL jne add_dma_scb_tail;
         bmov    COMPLETE_DMA_SCB_HEAD, SCBPTR, 2;
-        or      SCB_SGPTR, SG_STATUS_VALID ret;
+        bmov    COMPLETE_DMA_SCB_TAIL, SCBPTR, 2 ret;
+add_dma_scb_tail:
+        bmov    REG0, SCBPTR, 2;
+        bmov    SCBPTR, COMPLETE_DMA_SCB_TAIL, 2;
+        bmov    SCB_NEXT_COMPLETE, REG0, 2;
+        bmov    COMPLETE_DMA_SCB_TAIL, REG0, 2 ret;
+END_CRITICAL;
 
 /*
  * Is it a disconnect message?  Set a flag in the SCB to remind us
@@ -1146,8 +1237,18 @@ SET_DST_MODE	M_DFF1;
 await_busfree_clrchn:
         mvi     DFFSXFRCTL, CLRCHN;
 await_busfree_not_m_dff:
-        call    clear_target_state;
+        /* clear target specific flags */
+        mvi     SEQ_FLAGS, NOT_IDENTIFIED|NO_CDB_SENT;
         test    SSTAT1,REQINIT|BUSFREE  jz .;
+        /*
+         * We only set BUSFREE status once either a new
+         * phase has been detected or we are really
+         * BUSFREE.  This allows the driver to know
+         * that we are active on the bus even though
+         * no identified transaction exists should a
+         * timeout occur while awaiting busfree.
+         */
+        mvi     LASTPHASE, P_BUSFREE;
         test    SSTAT1, BUSFREE jnz idle_loop;
         SET_SEQINTCODE(MISSED_BUSFREE)
 
@@ -1202,11 +1303,6 @@ msgin_rdptrs_get_fifo:
         call    allocate_fifo;
         jmp     mesgin_done;
 
-clear_target_state:
-        mvi     LASTPHASE, P_BUSFREE;
-        /* clear target specific flags */
-        mvi     SEQ_FLAGS, NOT_IDENTIFIED|NO_CDB_SENT ret;
-
 phase_lock:     
         if ((ahd->bugs & AHD_EARLY_REQ_BUG) != 0) {
                 /*
@@ -1298,6 +1394,47 @@ service_fifo:
         test    CCSGCTL, CCSGENACK jnz return;
 
         /*
+         * Should the other FIFO get the S/G cache first?  If
+         * both FIFOs have been allocated since we last checked
+         * any FIFO, it is important that we service a FIFO
+         * that is not actively on the bus first.  This guarantees
+         * that a FIFO will be freed to handle snapshot requests for
+         * any FIFO that is still on the bus.  Chips with RTI do not
+         * perform snapshots, so don't bother with this test there.
+         */
+        if ((ahd->features & AHD_RTI) == 0) {
+                /*
+                 * If we're not still receiving SCSI data,
+                 * it is safe to allocate the S/G cache to
+                 * this FIFO.
+                 */
+                test    DFCNTRL, SCSIEN jz idle_sgfetch_start;
+
+                /*
+                 * Switch to the other FIFO.  Non-RTI chips
+                 * also have the "set mode" bug, so we must
+                 * disable interrupts during the switch.
+                 */
+                mvi     SEQINTCTL, INTVEC1DSL;
+                xor     MODE_PTR, MK_MODE(M_DFF1, M_DFF1);
+
+                /*
+                 * If the other FIFO needs loading, then it
+                 * must not have claimed the S/G cache yet
+                 * (SG_CACHE_AVAIL would have been cleared in
+                 * the orginal FIFO mode and we test this above).
+                 * Return to the idle loop so we can process the
+                 * FIFO not currently on the bus first.
+                 */
+                test    SG_STATE, LOADING_NEEDED jz idle_sgfetch_okay;
+                clr     SEQINTCTL ret;
+idle_sgfetch_okay:
+                xor     MODE_PTR, MK_MODE(M_DFF1, M_DFF1);
+                clr     SEQINTCTL;
+        }
+
+idle_sgfetch_start:
+        /*
          * We fetch a "cacheline aligned" and sized amount of data
          * so we don't end up referencing a non-existant page.
          * Cacheline aligned is in quotes because the kernel will
@@ -1308,7 +1445,7 @@ service_fifo:
         mvi     SGHCNT, SG_PREFETCH_CNT;
         if ((ahd->bugs & AHD_REG_SLOW_SETTLE_BUG) != 0) {
                 /*
-                 * Need two instruction between "touches" of SGHADDR.
+                 * Need two instructions between "touches" of SGHADDR.
                  */
                 nop;
         }
@@ -1658,7 +1795,7 @@ export seq_isr:
                  * savepointer in the current FIFO.  We do this so that
                  * a pending CTXTDONE or SAVEPTR is visible in the active
                  * FIFO.  This status is the only way we can detect if we
-                 * have lost the race (e.g. host paused us) and our attepts
+                 * have lost the race (e.g. host paused us) and our attempts
                  * to disable the channel occurred after all REQs were
                  * already seen and acked (REQINIT never comes true).
                  */
@@ -1667,7 +1804,7 @@ export seq_isr:
                 test    DFCNTRL, DIRECTION jz interrupt_return;
                 and     DFCNTRL, ~SCSIEN;
 snapshot_wait_data_valid:
-                test    SEQINTSRC, (CTXTDONE|SAVEPTRS) jnz snapshot_data_valid;
+                test    SEQINTSRC, (CTXTDONE|SAVEPTRS) jnz interrupt_return;
                 test    SSTAT1, REQINIT jz snapshot_wait_data_valid;
 snapshot_data_valid:
                 or      DFCNTRL, SCSIEN;
@@ -1834,7 +1971,6 @@ pkt_saveptrs_check_status:
         dec     SCB_FIFO_USE_COUNT;
         test    SCB_CONTROL, STATUS_RCVD jnz pkt_complete_scb_if_fifos_idle;
         mvi     DFFSXFRCTL, CLRCHN ret;
-END_CRITICAL;
 
 /*
  * LAST_SEG_DONE status has been seen in the current FIFO.
@@ -1843,7 +1979,6 @@ END_CRITICAL;
  * Check for overrun and see if we can complete this command.
  */
 pkt_last_seg_done:
-BEGIN_CRITICAL;
         /*
          * Mark transfer as completed.
          */
diff --git a/drivers/scsi/aic7xxx/aic79xx_core.c b/drivers/scsi/aic7xxx/aic79xx_core.c
index 35b51e1979f5..db8f5ce99ee3 100644
--- a/drivers/scsi/aic7xxx/aic79xx_core.c
+++ b/drivers/scsi/aic7xxx/aic79xx_core.c
@@ -37,9 +37,7 @@
  * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  * POSSIBILITY OF SUCH DAMAGES.
  *
- * $Id: //depot/aic7xxx/aic7xxx/aic79xx.c#202 $
- *
- * $FreeBSD$
+ * $Id: //depot/aic7xxx/aic7xxx/aic79xx.c#247 $
  */
 
 #ifdef __linux__
@@ -332,6 +330,14 @@ ahd_restart(struct ahd_softc *ahd)
         ahd_outb(ahd, SCSISEQ1,
                  ahd_inb(ahd, SCSISEQ_TEMPLATE) & (ENSELI|ENRSELI|ENAUTOATNP));
         ahd_set_modes(ahd, AHD_MODE_CCHAN, AHD_MODE_CCHAN);
+
+        /*
+         * Clear any pending sequencer interrupt.  It is no
+         * longer relevant since we're resetting the Program
+         * Counter.
+         */
+        ahd_outb(ahd, CLRINT, CLRSEQINT);
+
         ahd_outb(ahd, SEQCTL0, FASTMODE|SEQRESET);
         ahd_unpause(ahd);
 }
@@ -373,13 +379,7 @@ ahd_flush_qoutfifo(struct ahd_softc *ahd)
         saved_modes = ahd_save_modes(ahd);
 
         /*
-         * Complete any SCBs that just finished being
-         * DMA'ed into the qoutfifo.
-         */
-        ahd_run_qoutfifo(ahd);
-
-        /*
-         * Flush the good status FIFO for compelted packetized commands.
+         * Flush the good status FIFO for completed packetized commands.
          */
         ahd_set_modes(ahd, AHD_MODE_SCSI, AHD_MODE_SCSI);
         saved_scbptr = ahd_get_scbptr(ahd);
@@ -400,22 +400,33 @@ ahd_flush_qoutfifo(struct ahd_softc *ahd)
                  * the host before completing the  command.
                  */
                 fifo_mode = 0;
+rescan_fifos:
                 for (i = 0; i < 2; i++) {
                         /* Toggle to the other mode. */
                         fifo_mode ^= 1;
                         ahd_set_modes(ahd, fifo_mode, fifo_mode);
+
                         if (ahd_scb_active_in_fifo(ahd, scb) == 0)
                                 continue;
 
                         ahd_run_data_fifo(ahd, scb);
 
                         /*
-                         * Clearing this transaction in this FIFO may
-                         * cause a CFG4DATA for this same transaction
-                         * to assert in the other FIFO.  Make sure we
-                         * loop one more time and check the other FIFO.
+                         * Running this FIFO may cause a CFG4DATA for
+                         * this same transaction to assert in the other
+                         * FIFO or a new snapshot SAVEPTRS interrupt
+                         * in this FIFO.  Even running a FIFO may not
+                         * clear the transaction if we are still waiting
+                         * for data to drain to the host. We must loop
+                         * until the transaction is not active in either
+                         * FIFO just to be sure.  Reset our loop counter
+                         * so we will visit both FIFOs again before
+                         * declaring this transaction finished.  We
+                         * also delay a bit so that status has a chance
+                         * to change before we look at this FIFO again.
                          */
-                        i = 0;
+                        ahd_delay(200);
+                        goto rescan_fifos;
                 }
                 ahd_set_modes(ahd, AHD_MODE_SCSI, AHD_MODE_SCSI);
                 ahd_set_scbptr(ahd, scbid);
@@ -428,19 +439,28 @@ ahd_flush_qoutfifo(struct ahd_softc *ahd)
                         /*
                          * The transfer completed with a residual.
                          * Place this SCB on the complete DMA list
-                         * so that we Update our in-core copy of the
+                         * so that we update our in-core copy of the
                          * SCB before completing the command.
                          */
                         ahd_outb(ahd, SCB_SCSI_STATUS, 0);
                         ahd_outb(ahd, SCB_SGPTR,
                                  ahd_inb_scbram(ahd, SCB_SGPTR)
                                  | SG_STATUS_VALID);
-                        ahd_outw(ahd, SCB_TAG, SCB_GET_TAG(scb));
+                        ahd_outw(ahd, SCB_TAG, scbid);
+                        ahd_outw(ahd, SCB_NEXT_COMPLETE, SCB_LIST_NULL);
                         comp_head = ahd_inw(ahd, COMPLETE_DMA_SCB_HEAD);
-                        ahd_outw(ahd, SCB_NEXT_COMPLETE, comp_head);
-                        if (SCBID_IS_NULL(comp_head))
-                                ahd_outw(ahd, COMPLETE_DMA_SCB_HEAD,
-                                         SCB_GET_TAG(scb));
+                        if (SCBID_IS_NULL(comp_head)) {
+                                ahd_outw(ahd, COMPLETE_DMA_SCB_HEAD, scbid);
+                                ahd_outw(ahd, COMPLETE_DMA_SCB_TAIL, scbid);
+                        } else {
+                                u_int tail;
+
+                                tail = ahd_inw(ahd, COMPLETE_DMA_SCB_TAIL);
+                                ahd_set_scbptr(ahd, tail);
+                                ahd_outw(ahd, SCB_NEXT_COMPLETE, scbid);
+                                ahd_outw(ahd, COMPLETE_DMA_SCB_TAIL, scbid);
+                                ahd_set_scbptr(ahd, scbid);
+                        }
                 } else
                         ahd_complete_scb(ahd, scb);
         }
@@ -464,9 +484,22 @@ ahd_flush_qoutfifo(struct ahd_softc *ahd)
                         break;
                 ahd_delay(200);
         }
-        if ((ccscbctl & CCSCBDIR) != 0)
+        /*
+         * We leave the sequencer to cleanup in the case of DMA's to
+         * update the qoutfifo.  In all other cases (DMA's to the
+         * chip or a push of an SCB from the COMPLETE_DMA_SCB list),
+         * we disable the DMA engine so that the sequencer will not
+         * attempt to handle the DMA completion.
+         */
+        if ((ccscbctl & CCSCBDIR) != 0 || (ccscbctl & ARRDONE) != 0)
                 ahd_outb(ahd, CCSCBCTL, ccscbctl & ~(CCARREN|CCSCBEN));
 
+        /*
+         * Complete any SCBs that just finished
+         * being DMA'ed into the qoutfifo.
+         */
+        ahd_run_qoutfifo(ahd);
+
         saved_scbptr = ahd_get_scbptr(ahd);
         /*
          * Manually update/complete any completed SCBs that are waiting to be
@@ -493,6 +526,24 @@ ahd_flush_qoutfifo(struct ahd_softc *ahd)
                 scbid = next_scbid;
         }
         ahd_outw(ahd, COMPLETE_DMA_SCB_HEAD, SCB_LIST_NULL);
+        ahd_outw(ahd, COMPLETE_DMA_SCB_TAIL, SCB_LIST_NULL);
+
+        scbid = ahd_inw(ahd, COMPLETE_ON_QFREEZE_HEAD);
+        while (!SCBID_IS_NULL(scbid)) {
+
+                ahd_set_scbptr(ahd, scbid);
+                next_scbid = ahd_inw_scbram(ahd, SCB_NEXT_COMPLETE);
+                scb = ahd_lookup_scb(ahd, scbid);
+                if (scb == NULL) {
+                        printf("%s: Warning - Complete Qfrz SCB %d invalid\n",
+                               ahd_name(ahd), scbid);
+                        continue;
+                }
+
+                ahd_complete_scb(ahd, scb);
+                scbid = next_scbid;
+        }
+        ahd_outw(ahd, COMPLETE_ON_QFREEZE_HEAD, SCB_LIST_NULL);
 
         scbid = ahd_inw(ahd, COMPLETE_SCB_HEAD);
         while (!SCBID_IS_NULL(scbid)) {
@@ -557,150 +608,146 @@ ahd_run_data_fifo(struct ahd_softc *ahd, struct scb *scb)
 {
         u_int seqintsrc;
 
-        while (1) {
-                seqintsrc = ahd_inb(ahd, SEQINTSRC);
-                if ((seqintsrc & CFG4DATA) != 0) {
-                        uint32_t datacnt;
-                        uint32_t sgptr;
-
-                        /*
-                         * Clear full residual flag.
-                         */
-                        sgptr = ahd_inl_scbram(ahd, SCB_SGPTR) & ~SG_FULL_RESID;
-                        ahd_outb(ahd, SCB_SGPTR, sgptr);
+        seqintsrc = ahd_inb(ahd, SEQINTSRC);
+        if ((seqintsrc & CFG4DATA) != 0) {
+                uint32_t datacnt;
+                uint32_t sgptr;
 
-                        /*
-                         * Load datacnt and address.
-                         */
-                        datacnt = ahd_inl_scbram(ahd, SCB_DATACNT);
-                        if ((datacnt & AHD_DMA_LAST_SEG) != 0) {
-                                sgptr |= LAST_SEG;
-                                ahd_outb(ahd, SG_STATE, 0);
-                        } else
-                                ahd_outb(ahd, SG_STATE, LOADING_NEEDED);
-                        ahd_outq(ahd, HADDR, ahd_inq_scbram(ahd, SCB_DATAPTR));
-                        ahd_outl(ahd, HCNT, datacnt & AHD_SG_LEN_MASK);
-                        ahd_outb(ahd, SG_CACHE_PRE, sgptr);
-                        ahd_outb(ahd, DFCNTRL, PRELOADEN|SCSIEN|HDMAEN);
+                /*
+                 * Clear full residual flag.
+                 */
+                sgptr = ahd_inl_scbram(ahd, SCB_SGPTR) & ~SG_FULL_RESID;
+                ahd_outb(ahd, SCB_SGPTR, sgptr);
 
-                        /*
-                         * Initialize Residual Fields.
-                         */
-                        ahd_outb(ahd, SCB_RESIDUAL_DATACNT+3, datacnt >> 24);
-                        ahd_outl(ahd, SCB_RESIDUAL_SGPTR, sgptr & SG_PTR_MASK);
+                /*
+                 * Load datacnt and address.
+                 */
+                datacnt = ahd_inl_scbram(ahd, SCB_DATACNT);
+                if ((datacnt & AHD_DMA_LAST_SEG) != 0) {
+                        sgptr |= LAST_SEG;
+                        ahd_outb(ahd, SG_STATE, 0);
+                } else
+                        ahd_outb(ahd, SG_STATE, LOADING_NEEDED);
+                ahd_outq(ahd, HADDR, ahd_inq_scbram(ahd, SCB_DATAPTR));
+                ahd_outl(ahd, HCNT, datacnt & AHD_SG_LEN_MASK);
+                ahd_outb(ahd, SG_CACHE_PRE, sgptr);
+                ahd_outb(ahd, DFCNTRL, PRELOADEN|SCSIEN|HDMAEN);
 
-                        /*
-                         * Mark the SCB as having a FIFO in use.
-                         */
-                        ahd_outb(ahd, SCB_FIFO_USE_COUNT,
-                                 ahd_inb_scbram(ahd, SCB_FIFO_USE_COUNT) + 1);
+                /*
+                 * Initialize Residual Fields.
+                 */
+                ahd_outb(ahd, SCB_RESIDUAL_DATACNT+3, datacnt >> 24);
+                ahd_outl(ahd, SCB_RESIDUAL_SGPTR, sgptr & SG_PTR_MASK);
 
-                        /*
-                         * Install a "fake" handler for this FIFO.
-                         */
-                        ahd_outw(ahd, LONGJMP_ADDR, 0);
+                /*
+                 * Mark the SCB as having a FIFO in use.
+                 */
+                ahd_outb(ahd, SCB_FIFO_USE_COUNT,
+                         ahd_inb_scbram(ahd, SCB_FIFO_USE_COUNT) + 1);
 
-                        /*
-                         * Notify the hardware that we have satisfied
-                         * this sequencer interrupt.
-                         */
-                        ahd_outb(ahd, CLRSEQINTSRC, CLRCFG4DATA);
-                } else if ((seqintsrc & SAVEPTRS) != 0) {
-                        uint32_t sgptr;
-                        uint32_t resid;
+                /*
+                 * Install a "fake" handler for this FIFO.
+                 */
+                ahd_outw(ahd, LONGJMP_ADDR, 0);
 
-                        if ((ahd_inb(ahd, LONGJMP_ADDR+1)&INVALID_ADDR) != 0) {
-                                /*
-                                 * Snapshot Save Pointers.  Clear
-                                 * the snapshot and continue.
-                                 */
-                                ahd_outb(ahd, DFFSXFRCTL, CLRCHN);
-                                continue;
-                        }
+                /*
+                 * Notify the hardware that we have satisfied
+                 * this sequencer interrupt.
+                 */
+                ahd_outb(ahd, CLRSEQINTSRC, CLRCFG4DATA);
+        } else if ((seqintsrc & SAVEPTRS) != 0) {
+                uint32_t sgptr;
+                uint32_t resid;
 
+                if ((ahd_inb(ahd, LONGJMP_ADDR+1)&INVALID_ADDR) != 0) {
                         /*
-                         * Disable S/G fetch so the DMA engine
-                         * is available to future users.
+                         * Snapshot Save Pointers.  All that
+                         * is necessary to clear the snapshot
+                         * is a CLRCHN.
                          */
-                        if ((ahd_inb(ahd, SG_STATE) & FETCH_INPROG) != 0)
-                                ahd_outb(ahd, CCSGCTL, 0);
-                        ahd_outb(ahd, SG_STATE, 0);
+                        goto clrchn;
+                }
 
-                        /*
-                         * Flush the data FIFO.  Strickly only
-                         * necessary for Rev A parts.
-                         */
-                        ahd_outb(ahd, DFCNTRL,
-                                 ahd_inb(ahd, DFCNTRL) | FIFOFLUSH);
+                /*
+                 * Disable S/G fetch so the DMA engine
+                 * is available to future users.
+                 */
+                if ((ahd_inb(ahd, SG_STATE) & FETCH_INPROG) != 0)
+                        ahd_outb(ahd, CCSGCTL, 0);
+                ahd_outb(ahd, SG_STATE, 0);
 
-                        /*
-                         * Calculate residual.
-                         */
-                        sgptr = ahd_inl_scbram(ahd, SCB_RESIDUAL_SGPTR);
-                        resid = ahd_inl(ahd, SHCNT);
-                        resid |=
-                            ahd_inb_scbram(ahd, SCB_RESIDUAL_DATACNT+3) << 24;
-                        ahd_outl(ahd, SCB_RESIDUAL_DATACNT, resid);
-                        if ((ahd_inb(ahd, SG_CACHE_SHADOW) & LAST_SEG) == 0) {
-                                /*
-                                 * Must back up to the correct S/G element.
-                                 * Typically this just means resetting our
-                                 * low byte to the offset in the SG_CACHE,
-                                 * but if we wrapped, we have to correct
-                                 * the other bytes of the sgptr too.
-                                 */
-                                if ((ahd_inb(ahd, SG_CACHE_SHADOW) & 0x80) != 0
-                                 && (sgptr & 0x80) == 0)
-                                        sgptr -= 0x100;
-                                sgptr &= ~0xFF;
-                                sgptr |= ahd_inb(ahd, SG_CACHE_SHADOW)
-                                       & SG_ADDR_MASK;
-                                ahd_outl(ahd, SCB_RESIDUAL_SGPTR, sgptr);
-                                ahd_outb(ahd, SCB_RESIDUAL_DATACNT + 3, 0);
-                        } else if ((resid & AHD_SG_LEN_MASK) == 0) {
-                                ahd_outb(ahd, SCB_RESIDUAL_SGPTR,
-                                         sgptr | SG_LIST_NULL);
-                        }
-                        /*
-                         * Save Pointers.
-                         */
-                        ahd_outq(ahd, SCB_DATAPTR, ahd_inq(ahd, SHADDR));
-                        ahd_outl(ahd, SCB_DATACNT, resid);
-                        ahd_outl(ahd, SCB_SGPTR, sgptr);
-                        ahd_outb(ahd, CLRSEQINTSRC, CLRSAVEPTRS);
-                        ahd_outb(ahd, SEQIMODE,
-                                 ahd_inb(ahd, SEQIMODE) | ENSAVEPTRS);
-                        /*
-                         * If the data is to the SCSI bus, we are
-                         * done, otherwise wait for FIFOEMP.
-                         */
-                        if ((ahd_inb(ahd, DFCNTRL) & DIRECTION) != 0)
-                                break;
-                } else if ((ahd_inb(ahd, SG_STATE) & LOADING_NEEDED) != 0) {
-                        uint32_t sgptr;
-                        uint64_t data_addr;
-                        uint32_t data_len;
-                        u_int    dfcntrl;
+                /*
+                 * Flush the data FIFO.  Strickly only
+                 * necessary for Rev A parts.
+                 */
+                ahd_outb(ahd, DFCNTRL, ahd_inb(ahd, DFCNTRL) | FIFOFLUSH);
 
+                /*
+                 * Calculate residual.
+                 */
+                sgptr = ahd_inl_scbram(ahd, SCB_RESIDUAL_SGPTR);
+                resid = ahd_inl(ahd, SHCNT);
+                resid |= ahd_inb_scbram(ahd, SCB_RESIDUAL_DATACNT+3) << 24;
+                ahd_outl(ahd, SCB_RESIDUAL_DATACNT, resid);
+                if ((ahd_inb(ahd, SG_CACHE_SHADOW) & LAST_SEG) == 0) {
                         /*
-                         * Disable S/G fetch so the DMA engine
-                         * is available to future users.
+                         * Must back up to the correct S/G element.
+                         * Typically this just means resetting our
+                         * low byte to the offset in the SG_CACHE,
+                         * but if we wrapped, we have to correct
+                         * the other bytes of the sgptr too.
                          */
-                        if ((ahd_inb(ahd, SG_STATE) & FETCH_INPROG) != 0) {
-                                ahd_outb(ahd, CCSGCTL, 0);
-                                ahd_outb(ahd, SG_STATE, LOADING_NEEDED);
-                        }
+                        if ((ahd_inb(ahd, SG_CACHE_SHADOW) & 0x80) != 0
+                         && (sgptr & 0x80) == 0)
+                                sgptr -= 0x100;
+                        sgptr &= ~0xFF;
+                        sgptr |= ahd_inb(ahd, SG_CACHE_SHADOW)
+                               & SG_ADDR_MASK;
+                        ahd_outl(ahd, SCB_RESIDUAL_SGPTR, sgptr);
+                        ahd_outb(ahd, SCB_RESIDUAL_DATACNT + 3, 0);
+                } else if ((resid & AHD_SG_LEN_MASK) == 0) {
+                        ahd_outb(ahd, SCB_RESIDUAL_SGPTR,
+                                 sgptr | SG_LIST_NULL);
+                }
+                /*
+                 * Save Pointers.
+                 */
+                ahd_outq(ahd, SCB_DATAPTR, ahd_inq(ahd, SHADDR));
+                ahd_outl(ahd, SCB_DATACNT, resid);
+                ahd_outl(ahd, SCB_SGPTR, sgptr);
+                ahd_outb(ahd, CLRSEQINTSRC, CLRSAVEPTRS);
+                ahd_outb(ahd, SEQIMODE,
+                         ahd_inb(ahd, SEQIMODE) | ENSAVEPTRS);
+                /*
+                 * If the data is to the SCSI bus, we are
+                 * done, otherwise wait for FIFOEMP.
+                 */
+                if ((ahd_inb(ahd, DFCNTRL) & DIRECTION) != 0)
+                        goto clrchn;
+        } else if ((ahd_inb(ahd, SG_STATE) & LOADING_NEEDED) != 0) {
+                uint32_t sgptr;
+                uint64_t data_addr;
+                uint32_t data_len;
+                u_int    dfcntrl;
 
-                        /*
-                         * Wait for the DMA engine to notice that the
-                         * host transfer is enabled and that there is
-                         * space in the S/G FIFO for new segments before
-                         * loading more segments.
-                         */
-                        if ((ahd_inb(ahd, DFSTATUS) & PRELOAD_AVAIL) == 0)
-                                continue;
-                        if ((ahd_inb(ahd, DFCNTRL) & HDMAENACK) == 0)
-                                continue;
+                /*
+                 * Disable S/G fetch so the DMA engine
+                 * is available to future users.  We won't
+                 * be using the DMA engine to load segments.
+                 */
+                if ((ahd_inb(ahd, SG_STATE) & FETCH_INPROG) != 0) {
+                        ahd_outb(ahd, CCSGCTL, 0);
+                        ahd_outb(ahd, SG_STATE, LOADING_NEEDED);
+                }
+
+                /*
+                 * Wait for the DMA engine to notice that the
+                 * host transfer is enabled and that there is
+                 * space in the S/G FIFO for new segments before
+                 * loading more segments.
+                 */
+                if ((ahd_inb(ahd, DFSTATUS) & PRELOAD_AVAIL) != 0
+                 && (ahd_inb(ahd, DFCNTRL) & HDMAENACK) != 0) {
 
                         /*
                          * Determine the offset of the next S/G
@@ -756,35 +803,44 @@ ahd_run_data_fifo(struct ahd_softc *ahd, struct scb *scb)
                                 dfcntrl |= SCSIENWRDIS;
                         }
                         ahd_outb(ahd, DFCNTRL, dfcntrl);
-                } else if ((ahd_inb(ahd, SG_CACHE_SHADOW)
-                         & LAST_SEG_DONE) != 0) {
-
-                        /*
-                         * Transfer completed to the end of SG list
-                         * and has flushed to the host.
-                         */
-                        ahd_outb(ahd, SCB_SGPTR,
-                                 ahd_inb_scbram(ahd, SCB_SGPTR) | SG_LIST_NULL);
-                        break;
-                } else if ((ahd_inb(ahd, DFSTATUS) & FIFOEMP) != 0) {
-                        break;
                 }
-                ahd_delay(200);
+        } else if ((ahd_inb(ahd, SG_CACHE_SHADOW) & LAST_SEG_DONE) != 0) {
+
+                /*
+                 * Transfer completed to the end of SG list
+                 * and has flushed to the host.
+                 */
+                ahd_outb(ahd, SCB_SGPTR,
+                         ahd_inb_scbram(ahd, SCB_SGPTR) | SG_LIST_NULL);
+                goto clrchn;
+        } else if ((ahd_inb(ahd, DFSTATUS) & FIFOEMP) != 0) {
+clrchn:
+                /*
+                 * Clear any handler for this FIFO, decrement
+                 * the FIFO use count for the SCB, and release
+                 * the FIFO.
+                 */
+                ahd_outb(ahd, LONGJMP_ADDR + 1, INVALID_ADDR);
+                ahd_outb(ahd, SCB_FIFO_USE_COUNT,
+                         ahd_inb_scbram(ahd, SCB_FIFO_USE_COUNT) - 1);
+                ahd_outb(ahd, DFFSXFRCTL, CLRCHN);
         }
-        /*
-         * Clear any handler for this FIFO, decrement
-         * the FIFO use count for the SCB, and release
-         * the FIFO.
-         */
-        ahd_outb(ahd, LONGJMP_ADDR + 1, INVALID_ADDR);
-        ahd_outb(ahd, SCB_FIFO_USE_COUNT,
-                 ahd_inb_scbram(ahd, SCB_FIFO_USE_COUNT) - 1);
-        ahd_outb(ahd, DFFSXFRCTL, CLRCHN);
 }
 
+/*
+ * Look for entries in the QoutFIFO that have completed.
+ * The valid_tag completion field indicates the validity
+ * of the entry - the valid value toggles each time through
+ * the queue. We use the sg_status field in the completion
+ * entry to avoid referencing the hscb if the completion
+ * occurred with no errors and no residual.  sg_status is
+ * a copy of the first byte (little endian) of the sgptr
+ * hscb field.
+ */
 void
 ahd_run_qoutfifo(struct ahd_softc *ahd)
 {
+        struct ahd_completion *completion;
         struct scb *scb;
         u_int  scb_index;
 
@@ -792,11 +848,13 @@ ahd_run_qoutfifo(struct ahd_softc *ahd)
                 panic("ahd_run_qoutfifo recursion");
         ahd->flags |= AHD_RUNNING_QOUTFIFO;
         ahd_sync_qoutfifo(ahd, BUS_DMASYNC_POSTREAD);
-        while ((ahd->qoutfifo[ahd->qoutfifonext]
-             & QOUTFIFO_ENTRY_VALID_LE) == ahd->qoutfifonext_valid_tag) {
+        for (;;) {
+                completion = &ahd->qoutfifo[ahd->qoutfifonext];
+
+                if (completion->valid_tag != ahd->qoutfifonext_valid_tag)
+                        break;
 
-                scb_index = ahd_le16toh(ahd->qoutfifo[ahd->qoutfifonext]
-                                      & ~QOUTFIFO_ENTRY_VALID_LE);
+                scb_index = ahd_le16toh(completion->tag);
                 scb = ahd_lookup_scb(ahd, scb_index);
                 if (scb == NULL) {
                         printf("%s: WARNING no command for scb %d "
@@ -804,12 +862,15 @@ ahd_run_qoutfifo(struct ahd_softc *ahd)
                                ahd_name(ahd), scb_index,
                                ahd->qoutfifonext);
                         ahd_dump_card_state(ahd);
-                } else
-                        ahd_complete_scb(ahd, scb);
+                } else if ((completion->sg_status & SG_STATUS_VALID) != 0) {
+                        ahd_handle_scb_status(ahd, scb);
+                } else {
+                        ahd_done(ahd, scb);
+                }
 
                 ahd->qoutfifonext = (ahd->qoutfifonext+1) & (AHD_QOUT_SIZE-1);
                 if (ahd->qoutfifonext == 0)
-                        ahd->qoutfifonext_valid_tag ^= QOUTFIFO_ENTRY_VALID_LE;
+                        ahd->qoutfifonext_valid_tag ^= QOUTFIFO_ENTRY_VALID;
         }
         ahd->flags &= ~AHD_RUNNING_QOUTFIFO;
 }
@@ -875,26 +936,6 @@ ahd_handle_seqint(struct ahd_softc *ahd, u_int intstat)
                        ahd_name(ahd), seqintcode);
 #endif
         switch (seqintcode) {
-        case BAD_SCB_STATUS:
-        {
-                struct  scb *scb;
-                u_int   scbid;
-                int     cmds_pending;
-
-                scbid = ahd_get_scbptr(ahd);
-                scb = ahd_lookup_scb(ahd, scbid);
-                if (scb != NULL) {
-                        ahd_complete_scb(ahd, scb);
-                } else {
-                        printf("%s: WARNING no command for scb %d "
-                               "(bad status)\n", ahd_name(ahd), scbid);
-                        ahd_dump_card_state(ahd);
-                }
-                cmds_pending = ahd_inw(ahd, CMDS_PENDING);
-                if (cmds_pending > 0)
-                        ahd_outw(ahd, CMDS_PENDING, cmds_pending - 1);
-                break;
-        }
         case ENTERING_NONPACK:
         {
                 struct  scb *scb;
@@ -1502,9 +1543,6 @@ ahd_handle_scsiint(struct ahd_softc *ahd, u_int intstat)
          && (ahd_inb(ahd, SEQ_FLAGS) & NOT_IDENTIFIED) != 0)
                 scb = NULL;
 
-        /* Make sure the sequencer is in a safe location. */
-        ahd_clear_critical_section(ahd);
-
         if ((status0 & IOERR) != 0) {
                 u_int now_lvd;
 
@@ -1520,26 +1558,35 @@ ahd_handle_scsiint(struct ahd_softc *ahd, u_int intstat)
                 ahd_setup_iocell_workaround(ahd);
                 ahd_unpause(ahd);
         } else if ((status0 & OVERRUN) != 0) {
+
                 printf("%s: SCSI offset overrun detected.  Resetting bus.\n",
                        ahd_name(ahd));
                 ahd_reset_channel(ahd, 'A', /*Initiate Reset*/TRUE);
         } else if ((status & SCSIRSTI) != 0) {
+
                 printf("%s: Someone reset channel A\n", ahd_name(ahd));
                 ahd_reset_channel(ahd, 'A', /*Initiate Reset*/FALSE);
         } else if ((status & SCSIPERR) != 0) {
+
+                /* Make sure the sequencer is in a safe location. */
+                ahd_clear_critical_section(ahd);
+
                 ahd_handle_transmission_error(ahd);
         } else if (lqostat0 != 0) {
+
                 printf("%s: lqostat0 == 0x%x!\n", ahd_name(ahd), lqostat0);
                 ahd_outb(ahd, CLRLQOINT0, lqostat0);
-                if ((ahd->bugs & AHD_CLRLQO_AUTOCLR_BUG) != 0) {
+                if ((ahd->bugs & AHD_CLRLQO_AUTOCLR_BUG) != 0)
                         ahd_outb(ahd, CLRLQOINT1, 0);
-                }
         } else if ((status & SELTO) != 0) {
                 u_int  scbid;
 
                 /* Stop the selection */
                 ahd_outb(ahd, SCSISEQ0, 0);
 
+                /* Make sure the sequencer is in a safe location. */
+                ahd_clear_critical_section(ahd);
+
                 /* No more pending messages */
                 ahd_clear_msg_state(ahd);
 
@@ -1572,24 +1619,27 @@ ahd_handle_scsiint(struct ahd_softc *ahd, u_int intstat)
                                        scbid);
                         }
 #endif
-                        /*
-                         * Force a renegotiation with this target just in
-                         * case the cable was pulled and will later be
-                         * re-attached.  The target may forget its negotiation
-                         * settings with us should it attempt to reselect
-                         * during the interruption.  The target will not issue
-                         * a unit attention in this case, so we must always
-                         * renegotiate.
-                         */
                         ahd_scb_devinfo(ahd, &devinfo, scb);
-                        ahd_force_renegotiation(ahd, &devinfo);
                         ahd_set_transaction_status(scb, CAM_SEL_TIMEOUT);
                         ahd_freeze_devq(ahd, scb);
+
+                        /*
+                         * Cancel any pending transactions on the device
+                         * now that it seems to be missing.  This will
+                         * also revert us to async/narrow transfers until
+                         * we can renegotiate with the device.
+                         */
+                        ahd_handle_devreset(ahd, &devinfo,
+                                            CAM_LUN_WILDCARD,
+                                            CAM_SEL_TIMEOUT,
+                                            "Selection Timeout",
+                                            /*verbose_level*/1);
                 }
                 ahd_outb(ahd, CLRINT, CLRSCSIINT);
                 ahd_iocell_first_selection(ahd);
                 ahd_unpause(ahd);
         } else if ((status0 & (SELDI|SELDO)) != 0) {
+
                 ahd_iocell_first_selection(ahd);
                 ahd_unpause(ahd);
         } else if (status3 != 0) {
@@ -1597,6 +1647,10 @@ ahd_handle_scsiint(struct ahd_softc *ahd, u_int intstat)
                        ahd_name(ahd), status3);
                 ahd_outb(ahd, CLRSINT3, status3);
         } else if ((lqistat1 & (LQIPHASE_LQ|LQIPHASE_NLQ)) != 0) {
+
+                /* Make sure the sequencer is in a safe location. */
+                ahd_clear_critical_section(ahd);
+
                 ahd_handle_lqiphase_error(ahd, lqistat1);
         } else if ((lqistat1 & LQICRCI_NLQ) != 0) {
                 /*
@@ -1621,6 +1675,9 @@ ahd_handle_scsiint(struct ahd_softc *ahd, u_int intstat)
                  */
                 ahd_outb(ahd, SCSISEQ0, 0);
 
+                /* Make sure the sequencer is in a safe location. */
+                ahd_clear_critical_section(ahd);
+
                 /*
                  * Determine what we were up to at the time of
                  * the busfree.
@@ -1658,7 +1715,16 @@ ahd_handle_scsiint(struct ahd_softc *ahd, u_int intstat)
                         clear_fifo = 0;
                         packetized =  (lqostat1 & LQOBUSFREE) != 0;
                         if (!packetized
-                         && ahd_inb(ahd, LASTPHASE) == P_BUSFREE)
+                         && ahd_inb(ahd, LASTPHASE) == P_BUSFREE
+                         && (ahd_inb(ahd, SSTAT0) & SELDI) == 0
+                         && ((ahd_inb(ahd, SSTAT0) & SELDO) == 0
+                          || (ahd_inb(ahd, SCSISEQ0) & ENSELO) == 0))
+                                /*
+                                 * Assume packetized if we are not
+                                 * on the bus in a non-packetized
+                                 * capacity and any pending selection
+                                 * was a packetized selection.
+                                 */
                                 packetized = 1;
                         break;
                 }
@@ -3193,14 +3259,25 @@ ahd_update_neg_table(struct ahd_softc *ahd, struct ahd_devinfo *devinfo,
                 iocell_opts[AHD_PRECOMP_SLEW_INDEX] &= ~AHD_PRECOMP_MASK;
 
                 if ((ahd->features & AHD_NEW_IOCELL_OPTS) != 0
-                 && (ppr_opts & MSG_EXT_PPR_DT_REQ) != 0) {
+                 && (ppr_opts & MSG_EXT_PPR_DT_REQ) != 0
+                 && (ppr_opts & MSG_EXT_PPR_IU_REQ) == 0) {
                         /*
                          * Slow down our CRC interval to be
-                         * compatible with devices that can't
-                         * handle a CRC at full speed.
+                         * compatible with non-packetized
+                         * U160 devices that can't handle a
+                         * CRC at full speed.
                          */
                         con_opts |= ENSLOWCRC;
                 }
+
+                if ((ahd->bugs & AHD_PACED_NEGTABLE_BUG) != 0) {
+                        /*
+                         * On H2A4, revert to a slower slewrate
+                         * on non-paced transfers.
+                         */
+                        iocell_opts[AHD_PRECOMP_SLEW_INDEX] &=
+                            ~AHD_SLEWRATE_MASK;
+                }
         }
 
         ahd_outb(ahd, ANNEXCOL, AHD_ANNEXCOL_PRECOMP_SLEW);
@@ -3289,11 +3366,15 @@ ahd_update_pending_scbs(struct ahd_softc *ahd)
          * Force the sequencer to reinitialize the selection for
          * the command at the head of the execution queue if it
          * has already been setup.  The negotiation changes may
-         * effect whether we select-out with ATN.
+         * effect whether we select-out with ATN.  It is only
+         * safe to clear ENSELO when the bus is not free and no
+         * selection is in progres or completed.
          */
         saved_modes = ahd_save_modes(ahd);
         ahd_set_modes(ahd, AHD_MODE_SCSI, AHD_MODE_SCSI);
-        ahd_outb(ahd, SCSISEQ0, ahd_inb(ahd, SCSISEQ0) & ~ENSELO);
+        if ((ahd_inb(ahd, SCSISIGI) & BSYI) != 0
+         && (ahd_inb(ahd, SSTAT0) & (SELDO|SELINGO)) == 0)
+                ahd_outb(ahd, SCSISEQ0, ahd_inb(ahd, SCSISEQ0) & ~ENSELO);
         saved_scbptr = ahd_get_scbptr(ahd);
         /* Ensure that the hscbs down on the card match the new information */
         for (scb_tag = 0; scb_tag < ahd->scb_data.maxhscbs; scb_tag++) {
@@ -4999,13 +5080,14 @@ ahd_handle_devreset(struct ahd_softc *ahd, struct ahd_devinfo *devinfo,
         ahd_set_width(ahd, devinfo, MSG_EXT_WDTR_BUS_8_BIT,
                       AHD_TRANS_CUR, /*paused*/TRUE);
         ahd_set_syncrate(ahd, devinfo, /*period*/0, /*offset*/0,
-                         /*ppr_options*/0, AHD_TRANS_CUR, /*paused*/TRUE);
+                         /*ppr_options*/0, AHD_TRANS_CUR,
+                         /*paused*/TRUE);
         
-        ahd_send_async(ahd, devinfo->channel, devinfo->target,
-                       lun, AC_SENT_BDR, NULL);
+        if (status != CAM_SEL_TIMEOUT)
+                ahd_send_async(ahd, devinfo->channel, devinfo->target,
+                               CAM_LUN_WILDCARD, AC_SENT_BDR, NULL);
 
-        if (message != NULL
-         && (verbose_level <= bootverbose))
+        if (message != NULL && bootverbose)
                 printf("%s: %s on %c:%d. %d SCBs aborted\n", ahd_name(ahd),
                        message, devinfo->channel, devinfo->target, found);
 }
@@ -5963,16 +6045,13 @@ ahd_alloc_scbs(struct ahd_softc *ahd)
         newcount = MIN(scb_data->sense_left, scb_data->scbs_left);
         newcount = MIN(newcount, scb_data->sgs_left);
         newcount = MIN(newcount, (AHD_SCB_MAX_ALLOC - scb_data->numscbs));
-        scb_data->sense_left -= newcount;
-        scb_data->scbs_left -= newcount;
-        scb_data->sgs_left -= newcount;
         for (i = 0; i < newcount; i++) {
-                u_int col_tag;
-
                 struct scb_platform_data *pdata;
+                u_int col_tag;
 #ifndef __linux__
                 int error;
 #endif
+
                 next_scb = (struct scb *)malloc(sizeof(*next_scb),
                                                 M_DEVBUF, M_NOWAIT);
                 if (next_scb == NULL)
@@ -6029,6 +6108,9 @@ ahd_alloc_scbs(struct ahd_softc *ahd)
                 sense_data += AHD_SENSE_BUFSIZE;
                 sense_busaddr += AHD_SENSE_BUFSIZE;
                 scb_data->numscbs++;
+                scb_data->sense_left--;
+                scb_data->scbs_left--;
+                scb_data->sgs_left--;
         }
 }
 
@@ -6143,7 +6225,7 @@ ahd_init(struct ahd_softc *ahd)
          * for the target mode role, we must additionally provide space for
          * the incoming target command fifo.
          */
-        driver_data_size = AHD_SCB_MAX * sizeof(uint16_t)
+        driver_data_size = AHD_SCB_MAX * sizeof(*ahd->qoutfifo)
                          + sizeof(struct hardware_scb);
         if ((ahd->features & AHD_TARGETMODE) != 0)
                 driver_data_size += AHD_TMODE_CMDS * sizeof(struct target_cmd);
@@ -6178,10 +6260,10 @@ ahd_init(struct ahd_softc *ahd)
                         ahd->shared_data_map.vaddr, driver_data_size,
                         ahd_dmamap_cb, &ahd->shared_data_map.physaddr,
                         /*flags*/0);
-        ahd->qoutfifo = (uint16_t *)ahd->shared_data_map.vaddr;
+        ahd->qoutfifo = (struct ahd_completion *)ahd->shared_data_map.vaddr;
         next_vaddr = (uint8_t *)&ahd->qoutfifo[AHD_QOUT_SIZE];
         next_baddr = ahd->shared_data_map.physaddr
-                   + AHD_QOUT_SIZE*sizeof(uint16_t);
+                   + AHD_QOUT_SIZE*sizeof(struct ahd_completion);
         if ((ahd->features & AHD_TARGETMODE) != 0) {
                 ahd->targetcmds = (struct target_cmd *)next_vaddr;
                 next_vaddr += AHD_TMODE_CMDS * sizeof(struct target_cmd);
@@ -6508,10 +6590,10 @@ ahd_chip_init(struct ahd_softc *ahd)
 
         /* All of our queues are empty */
         ahd->qoutfifonext = 0;
-        ahd->qoutfifonext_valid_tag = QOUTFIFO_ENTRY_VALID_LE;
-        ahd_outb(ahd, QOUTFIFO_ENTRY_VALID_TAG, QOUTFIFO_ENTRY_VALID >> 8);
+        ahd->qoutfifonext_valid_tag = QOUTFIFO_ENTRY_VALID;
+        ahd_outb(ahd, QOUTFIFO_ENTRY_VALID_TAG, QOUTFIFO_ENTRY_VALID);
         for (i = 0; i < AHD_QOUT_SIZE; i++)
-                ahd->qoutfifo[i] = 0;
+                ahd->qoutfifo[i].valid_tag = 0;
         ahd_sync_qoutfifo(ahd, BUS_DMASYNC_PREREAD);
 
         ahd->qinfifonext = 0;
@@ -6544,12 +6626,15 @@ ahd_chip_init(struct ahd_softc *ahd)
         ahd_outw(ahd, COMPLETE_SCB_HEAD, SCB_LIST_NULL);
         ahd_outw(ahd, COMPLETE_SCB_DMAINPROG_HEAD, SCB_LIST_NULL);
         ahd_outw(ahd, COMPLETE_DMA_SCB_HEAD, SCB_LIST_NULL);
+        ahd_outw(ahd, COMPLETE_DMA_SCB_TAIL, SCB_LIST_NULL);
+        ahd_outw(ahd, COMPLETE_ON_QFREEZE_HEAD, SCB_LIST_NULL);
 
         /*
          * The Freeze Count is 0.
          */
         ahd->qfreeze_cnt = 0;
         ahd_outw(ahd, QFREEZE_COUNT, 0);
+        ahd_outw(ahd, KERNEL_QFREEZE_COUNT, 0);
 
         /*
          * Tell the sequencer where it can find our arrays in memory.
@@ -6909,43 +6994,34 @@ ahd_pause_and_flushwork(struct ahd_softc *ahd)
 {
         u_int intstat;
         u_int maxloops;
-        u_int qfreeze_cnt;
 
         maxloops = 1000;
         ahd->flags |= AHD_ALL_INTERRUPTS;
         ahd_pause(ahd);
         /*
-         * Increment the QFreeze Count so that the sequencer
-         * will not start new selections.  We do this only
+         * Freeze the outgoing selections.  We do this only
          * until we are safely paused without further selections
          * pending.
          */
-        ahd_outw(ahd, QFREEZE_COUNT, ahd_inw(ahd, QFREEZE_COUNT) + 1);
+        ahd->qfreeze_cnt--;
+        ahd_outw(ahd, KERNEL_QFREEZE_COUNT, ahd->qfreeze_cnt);
         ahd_outb(ahd, SEQ_FLAGS2, ahd_inb(ahd, SEQ_FLAGS2) | SELECTOUT_QFROZEN);
         do {
-                struct scb *waiting_scb;
 
                 ahd_unpause(ahd);
+                /*
+                 * Give the sequencer some time to service
+                 * any active selections.
+                 */
+                ahd_delay(500);
+
                 ahd_intr(ahd);
                 ahd_pause(ahd);
-                ahd_clear_critical_section(ahd);
                 intstat = ahd_inb(ahd, INTSTAT);
-                ahd_set_modes(ahd, AHD_MODE_SCSI, AHD_MODE_SCSI);
-                if ((ahd_inb(ahd, SSTAT0) & (SELDO|SELINGO)) == 0)
-                        ahd_outb(ahd, SCSISEQ0,
-                                 ahd_inb(ahd, SCSISEQ0) & ~ENSELO);
-                /*
-                 * In the non-packetized case, the sequencer (for Rev A),
-                 * relies on ENSELO remaining set after SELDO.  The hardware
-                 * auto-clears ENSELO in the packetized case.
-                 */
-                waiting_scb = ahd_lookup_scb(ahd,
-                                             ahd_inw(ahd, WAITING_TID_HEAD));
-                if (waiting_scb != NULL
-                 && (waiting_scb->flags & SCB_PACKETIZED) == 0
-                 && (ahd_inb(ahd, SSTAT0) & (SELDO|SELINGO)) != 0)
-                        ahd_outb(ahd, SCSISEQ0,
-                                 ahd_inb(ahd, SCSISEQ0) | ENSELO);
+                if ((intstat & INT_PEND) == 0) {
+                        ahd_clear_critical_section(ahd);
+                        intstat = ahd_inb(ahd, INTSTAT);
+                }
         } while (--maxloops
               && (intstat != 0xFF || (ahd->features & AHD_REMOVABLE) == 0)
               && ((intstat & INT_PEND) != 0
@@ -6956,17 +7032,8 @@ ahd_pause_and_flushwork(struct ahd_softc *ahd)
                 printf("Infinite interrupt loop, INTSTAT = %x",
                       ahd_inb(ahd, INTSTAT));
         }
-        qfreeze_cnt = ahd_inw(ahd, QFREEZE_COUNT);
-        if (qfreeze_cnt == 0) {
-                printf("%s: ahd_pause_and_flushwork with 0 qfreeze count!\n",
-                       ahd_name(ahd));
-        } else {
-                qfreeze_cnt--;
-        }
-        ahd_outw(ahd, QFREEZE_COUNT, qfreeze_cnt);
-        if (qfreeze_cnt == 0)
-                ahd_outb(ahd, SEQ_FLAGS2,
-                         ahd_inb(ahd, SEQ_FLAGS2) & ~SELECTOUT_QFROZEN);
+        ahd->qfreeze_cnt++;
+        ahd_outw(ahd, KERNEL_QFREEZE_COUNT, ahd->qfreeze_cnt);
 
         ahd_flush_qoutfifo(ahd);
 
@@ -7307,6 +7374,7 @@ ahd_search_qinfifo(struct ahd_softc *ahd, int target, char channel,
          * appropriate, traverse the SCBs of each "their id"
          * looking for matches.
          */
+        ahd_set_modes(ahd, AHD_MODE_SCSI, AHD_MODE_SCSI);
         savedscbptr = ahd_get_scbptr(ahd);
         tid_next = ahd_inw(ahd, WAITING_TID_HEAD);
         tid_prev = SCB_LIST_NULL;
@@ -7376,7 +7444,7 @@ ahd_search_scb_list(struct ahd_softc *ahd, int target, char channel,
         u_int   prev;
         int     found;
 
-        AHD_ASSERT_MODES(ahd, AHD_MODE_CCHAN_MSK, AHD_MODE_CCHAN_MSK);
+        AHD_ASSERT_MODES(ahd, AHD_MODE_SCSI_MSK, AHD_MODE_SCSI_MSK);
         found = 0;
         prev = SCB_LIST_NULL;
         next = *list_head;
@@ -7443,7 +7511,7 @@ static void
 ahd_stitch_tid_list(struct ahd_softc *ahd, u_int tid_prev,
                     u_int tid_cur, u_int tid_next)
 {
-        AHD_ASSERT_MODES(ahd, AHD_MODE_CCHAN_MSK, AHD_MODE_CCHAN_MSK);
+        AHD_ASSERT_MODES(ahd, AHD_MODE_SCSI_MSK, AHD_MODE_SCSI_MSK);
 
         if (SCBID_IS_NULL(tid_cur)) {
 
@@ -7483,7 +7551,7 @@ ahd_rem_wscb(struct ahd_softc *ahd, u_int scbid,
 {
         u_int tail_offset;
 
-        AHD_ASSERT_MODES(ahd, AHD_MODE_CCHAN_MSK, AHD_MODE_CCHAN_MSK);
+        AHD_ASSERT_MODES(ahd, AHD_MODE_SCSI_MSK, AHD_MODE_SCSI_MSK);
         if (!SCBID_IS_NULL(prev)) {
                 ahd_set_scbptr(ahd, prev);
                 ahd_outw(ahd, SCB_NEXT, next);
@@ -7887,30 +7955,35 @@ ahd_handle_scb_status(struct ahd_softc *ahd, struct scb *scb)
 void
 ahd_handle_scsi_status(struct ahd_softc *ahd, struct scb *scb)
 {
-        struct hardware_scb *hscb;
-        u_int  qfreeze_cnt;
+        struct  hardware_scb *hscb;
+        int     paused;
 
         /*
          * The sequencer freezes its select-out queue
          * anytime a SCSI status error occurs.  We must
-         * handle the error and decrement the QFREEZE count
-         * to allow the sequencer to continue.
+         * handle the error and increment our qfreeze count
+         * to allow the sequencer to continue.  We don't
+         * bother clearing critical sections here since all
+         * operations are on data structures that the sequencer
+         * is not touching once the queue is frozen.
          */
         hscb = scb->hscb; 
 
+        if (ahd_is_paused(ahd)) {
+                paused = 1;
+        } else {
+                paused = 0;
+                ahd_pause(ahd);
+        }
+
         /* Freeze the queue until the client sees the error. */
         ahd_freeze_devq(ahd, scb);
         ahd_freeze_scb(scb);
-        qfreeze_cnt = ahd_inw(ahd, QFREEZE_COUNT);
-        if (qfreeze_cnt == 0) {
-                printf("%s: Bad status with 0 qfreeze count!\n", ahd_name(ahd));
-        } else {
-                qfreeze_cnt--;
-                ahd_outw(ahd, QFREEZE_COUNT, qfreeze_cnt);
-        }
-        if (qfreeze_cnt == 0)
-                ahd_outb(ahd, SEQ_FLAGS2,
-                         ahd_inb(ahd, SEQ_FLAGS2) & ~SELECTOUT_QFROZEN);
+        ahd->qfreeze_cnt++;
+        ahd_outw(ahd, KERNEL_QFREEZE_COUNT, ahd->qfreeze_cnt);
+
+        if (paused == 0)
+                ahd_unpause(ahd);
 
         /* Don't want to clobber the original sense code */
         if ((scb->flags & SCB_SENSE) != 0) {
@@ -8323,13 +8396,14 @@ ahd_loadseq(struct ahd_softc *ahd)
         u_int   sg_prefetch_cnt_limit;
         u_int   sg_prefetch_align;
         u_int   sg_size;
+        u_int   cacheline_mask;
         uint8_t download_consts[DOWNLOAD_CONST_COUNT];
 
         if (bootverbose)
                 printf("%s: Downloading Sequencer Program...",
                        ahd_name(ahd));
 
-#if DOWNLOAD_CONST_COUNT != 7
+#if DOWNLOAD_CONST_COUNT != 8
 #error "Download Const Mismatch"
 #endif
         /*
@@ -8365,6 +8439,9 @@ ahd_loadseq(struct ahd_softc *ahd)
         /* Round down to the nearest power of 2. */
         while (powerof2(sg_prefetch_align) == 0)
                 sg_prefetch_align--;
+
+        cacheline_mask = sg_prefetch_align - 1;
+
         /*
          * If the cacheline boundary is greater than half our prefetch RAM
          * we risk not being able to fetch even a single complete S/G
@@ -8405,6 +8482,7 @@ ahd_loadseq(struct ahd_softc *ahd)
         download_consts[PKT_OVERRUN_BUFOFFSET] =
                 (ahd->overrun_buf - (uint8_t *)ahd->qoutfifo) / 256;
         download_consts[SCB_TRANSFER_SIZE] = SCB_TRANSFER_SIZE_1BYTE_LUN;
+        download_consts[CACHELINE_MASK] = cacheline_mask;
         cur_patch = patches;
         downloaded = 0;
         skip_addr = 0;
@@ -8818,6 +8896,15 @@ ahd_dump_card_state(struct ahd_softc *ahd)
                 scb_index = ahd_inw_scbram(ahd, SCB_NEXT_COMPLETE);
         }
         printf("\n");
+        printf("Sequencer On QFreeze and Complete list: ");
+        scb_index = ahd_inw(ahd, COMPLETE_ON_QFREEZE_HEAD);
+        i = 0;
+        while (!SCBID_IS_NULL(scb_index) && i++ < AHD_SCB_MAX) {
+                ahd_set_scbptr(ahd, scb_index);
+                printf("%d ", scb_index);
+                scb_index = ahd_inw_scbram(ahd, SCB_NEXT_COMPLETE);
+        }
+        printf("\n");
         ahd_set_scbptr(ahd, saved_scb_index);
         dffstat = ahd_inb(ahd, DFFSTAT);
         for (i = 0; i < 2; i++) {
@@ -9052,7 +9139,7 @@ ahd_wait_seeprom(struct ahd_softc *ahd)
 {
         int cnt;
 
-        cnt = 20;
+        cnt = 5000;
         while ((ahd_inb(ahd, SEESTAT) & (SEEARBACK|SEEBUSY)) != 0 && --cnt)
                 ahd_delay(5);
 
diff --git a/drivers/scsi/aic7xxx/aic79xx_inline.h b/drivers/scsi/aic7xxx/aic79xx_inline.h
index 2b7ff989f3d1..91c4f7f484b1 100644
--- a/drivers/scsi/aic7xxx/aic79xx_inline.h
+++ b/drivers/scsi/aic7xxx/aic79xx_inline.h
@@ -839,7 +839,7 @@ ahd_sync_qoutfifo(struct ahd_softc *ahd, int op)
 {
         ahd_dmamap_sync(ahd, ahd->shared_data_dmat, ahd->shared_data_map.dmamap,
                         /*offset*/0,
-                        /*len*/AHD_SCB_MAX * sizeof(uint16_t), op);
+                        /*len*/AHD_SCB_MAX * sizeof(struct ahd_completion), op);
 }
 
 static __inline void
@@ -871,8 +871,8 @@ ahd_check_cmdcmpltqueues(struct ahd_softc *ahd)
         ahd_dmamap_sync(ahd, ahd->shared_data_dmat, ahd->shared_data_map.dmamap,
                         /*offset*/ahd->qoutfifonext * sizeof(*ahd->qoutfifo),
                         /*len*/sizeof(*ahd->qoutfifo), BUS_DMASYNC_POSTREAD);
-        if ((ahd->qoutfifo[ahd->qoutfifonext]
-             & QOUTFIFO_ENTRY_VALID_LE) == ahd->qoutfifonext_valid_tag)
+        if (ahd->qoutfifo[ahd->qoutfifonext].valid_tag
+          == ahd->qoutfifonext_valid_tag)
                 retval |= AHD_RUN_QOUTFIFO;
 #ifdef AHD_TARGET_MODE
         if ((ahd->flags & AHD_TARGETROLE) != 0
diff --git a/drivers/scsi/aic7xxx/aic79xx_osm.c b/drivers/scsi/aic7xxx/aic79xx_osm.c
index 1c8f872e2dd4..2567e29960bd 100644
--- a/drivers/scsi/aic7xxx/aic79xx_osm.c
+++ b/drivers/scsi/aic7xxx/aic79xx_osm.c
@@ -1468,6 +1468,30 @@ ahd_linux_run_command(struct ahd_softc *ahd, struct ahd_linux_device *dev,
         if ((tstate->auto_negotiate & mask) != 0) {
                 scb->flags |= SCB_AUTO_NEGOTIATE;
                 scb->hscb->control |= MK_MESSAGE;
+                } else if (cmd->cmnd[0] == INQUIRY
+                        && (tinfo->curr.offset != 0
+                         || tinfo->curr.width != MSG_EXT_WDTR_BUS_8_BIT
+                         || tinfo->curr.ppr_options != 0)
+                        && (tinfo->curr.ppr_options & MSG_EXT_PPR_IU_REQ)==0) {
+                        /*
+                         * The SCSI spec requires inquiry
+                         * commands to complete without
+                         * reporting unit attention conditions.
+                         * Because of this, an inquiry command
+                         * that occurs just after a device is
+                         * reset will result in a data phase
+                         * with mismatched negotiated rates.
+                         * The core already forces a renegotiation
+                         * for reset events that are visible to
+                         * our controller or that we initiate,
+                         * but a third party device reset or a
+                         * hot-plug insertion can still cause this
+                         * issue.  Therefore, we force a re-negotiation
+                         * for every inquiry command unless we
+                         * are async.
+                         */
+                        scb->flags |= SCB_NEGOTIATE;
+                        scb->hscb->control |= MK_MESSAGE;
         }
 
         if ((dev->flags & (AHD_DEV_Q_TAGGED|AHD_DEV_Q_BASIC)) != 0) {
@@ -2058,6 +2082,7 @@ ahd_linux_queue_recovery_cmd(struct scsi_cmnd *cmd, scb_flag flag)
         int    paused;
         int    wait;
         int    disconnected;
+        int    found;
         ahd_mode_state saved_modes;
         unsigned long flags;
 
@@ -2176,7 +2201,8 @@ ahd_linux_queue_recovery_cmd(struct scsi_cmnd *cmd, scb_flag flag)
         last_phase = ahd_inb(ahd, LASTPHASE);
         saved_scbptr = ahd_get_scbptr(ahd);
         active_scbptr = saved_scbptr;
-        if (disconnected && (ahd_inb(ahd, SEQ_FLAGS) & NOT_IDENTIFIED) == 0) {
+        if (disconnected && ((last_phase != P_BUSFREE) || 
+                             (ahd_inb(ahd, SEQ_FLAGS) & NOT_IDENTIFIED) == 0)) {
                 struct scb *bus_scb;
 
                 bus_scb = ahd_lookup_scb(ahd, active_scbptr);
@@ -2194,28 +2220,41 @@ ahd_linux_queue_recovery_cmd(struct scsi_cmnd *cmd, scb_flag flag)
          * bus or is in the disconnected state.
          */
         saved_scsiid = ahd_inb(ahd, SAVED_SCSIID);
-        if (last_phase != P_BUSFREE
-         && (SCB_GET_TAG(pending_scb) == active_scbptr
+        if (SCB_GET_TAG(pending_scb) == active_scbptr
              || (flag == SCB_DEVICE_RESET
-                 && SCSIID_TARGET(ahd, saved_scsiid) == scmd_id(cmd)))) {
+                 && SCSIID_TARGET(ahd, saved_scsiid) == scmd_id(cmd))) {
 
                 /*
                  * We're active on the bus, so assert ATN
                  * and hope that the target responds.
                  */
                 pending_scb = ahd_lookup_scb(ahd, active_scbptr);
-                pending_scb->flags |= SCB_RECOVERY_SCB|flag;
+                pending_scb->flags |= SCB_RECOVERY_SCB|SCB_DEVICE_RESET;
                 ahd_outb(ahd, MSG_OUT, HOST_MSG);
                 ahd_outb(ahd, SCSISIGO, last_phase|ATNO);
-                scmd_printk(KERN_INFO, cmd, "Device is active, asserting ATN\n");
+                scmd_printk(KERN_INFO, cmd, "BDR message in message buffer\n");
                 wait = TRUE;
+        } else if (last_phase != P_BUSFREE
+                   && ahd_inb(ahd, SCSIPHASE) == 0) {
+                /*
+                 * SCB is not identified, there
+                 * is no pending REQ, and the sequencer
+                 * has not seen a busfree.  Looks like
+                 * a stuck connection waiting to
+                 * go busfree.  Reset the bus.
+                 */
+                found = ahd_reset_channel(ahd, cmd->device->channel + 'A',
+                                          /*Initiate Reset*/TRUE);
+                printf("%s: Issued Channel %c Bus Reset. "
+                       "%d SCBs aborted\n", ahd_name(ahd),
+                       cmd->device->channel + 'A', found);
         } else if (disconnected) {
 
                 /*
                  * Actually re-queue this SCB in an attempt
                  * to select the device before it reconnects.
                  */
-                pending_scb->flags |= SCB_RECOVERY_SCB|SCB_ABORT;
+                pending_scb->flags |= SCB_RECOVERY_SCB|flag;
                 ahd_set_scbptr(ahd, SCB_GET_TAG(pending_scb));
                 pending_scb->hscb->cdb_len = 0;
                 pending_scb->hscb->task_attribute = 0;
@@ -2296,16 +2335,17 @@ done:
                 timer.expires = jiffies + (5 * HZ);
                 timer.function = ahd_linux_sem_timeout;
                 add_timer(&timer);
-                printf("Recovery code sleeping\n");
+                printf("%s: Recovery code sleeping\n", ahd_name(ahd));
                 down(&ahd->platform_data->eh_sem);
-                printf("Recovery code awake\n");
+                printf("%s: Recovery code awake\n", ahd_name(ahd));
                 ret = del_timer_sync(&timer);
                 if (ret == 0) {
-                        printf("Timer Expired\n");
+                        printf("%s: Timer Expired (active %d)\n",
+                               ahd_name(ahd), dev->active);
                         retval = FAILED;
                 }
         }
-                ahd_unlock(ahd, &flags);
+        ahd_unlock(ahd, &flags);
         return (retval);
 }
 
diff --git a/drivers/scsi/aic7xxx/aic79xx_reg.h_shipped b/drivers/scsi/aic7xxx/aic79xx_reg.h_shipped
index c01ac39090d9..8763b158856b 100644
--- a/drivers/scsi/aic7xxx/aic79xx_reg.h_shipped
+++ b/drivers/scsi/aic7xxx/aic79xx_reg.h_shipped
@@ -2,8 +2,8 @@
  * DO NOT EDIT - This file is automatically generated
  *               from the following source files:
  *
- * $Id: //depot/aic7xxx/aic7xxx/aic79xx.seq#94 $
- * $Id: //depot/aic7xxx/aic7xxx/aic79xx.reg#70 $
+ * $Id: //depot/aic7xxx/aic7xxx/aic79xx.seq#119 $
+ * $Id: //depot/aic7xxx/aic7xxx/aic79xx.reg#76 $
  */
 typedef int (ahd_reg_print_t)(u_int, u_int *, u_int);
 typedef struct ahd_reg_parse_entry {
@@ -83,17 +83,17 @@ ahd_reg_print_t ahd_hs_mailbox_print;
 #endif
 
 #if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_clrseqintstat_print;
+ahd_reg_print_t ahd_seqintstat_print;
 #else
-#define ahd_clrseqintstat_print(regvalue, cur_col, wrap) \
-    ahd_print_register(NULL, 0, "CLRSEQINTSTAT", 0x0c, regvalue, cur_col, wrap)
+#define ahd_seqintstat_print(regvalue, cur_col, wrap) \
+    ahd_print_register(NULL, 0, "SEQINTSTAT", 0x0c, regvalue, cur_col, wrap)
 #endif
 
 #if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_seqintstat_print;
+ahd_reg_print_t ahd_clrseqintstat_print;
 #else
-#define ahd_seqintstat_print(regvalue, cur_col, wrap) \
-    ahd_print_register(NULL, 0, "SEQINTSTAT", 0x0c, regvalue, cur_col, wrap)
+#define ahd_clrseqintstat_print(regvalue, cur_col, wrap) \
+    ahd_print_register(NULL, 0, "CLRSEQINTSTAT", 0x0c, regvalue, cur_col, wrap)
 #endif
 
 #if AIC_DEBUG_REGISTERS
@@ -412,17 +412,17 @@ ahd_reg_print_t ahd_sxfrctl0_print;
 #endif
 
 #if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_businitid_print;
+ahd_reg_print_t ahd_dlcount_print;
 #else
-#define ahd_businitid_print(regvalue, cur_col, wrap) \
-    ahd_print_register(NULL, 0, "BUSINITID", 0x3c, regvalue, cur_col, wrap)
+#define ahd_dlcount_print(regvalue, cur_col, wrap) \
+    ahd_print_register(NULL, 0, "DLCOUNT", 0x3c, regvalue, cur_col, wrap)
 #endif
 
 #if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_dlcount_print;
+ahd_reg_print_t ahd_businitid_print;
 #else
-#define ahd_dlcount_print(regvalue, cur_col, wrap) \
-    ahd_print_register(NULL, 0, "DLCOUNT", 0x3c, regvalue, cur_col, wrap)
+#define ahd_businitid_print(regvalue, cur_col, wrap) \
+    ahd_print_register(NULL, 0, "BUSINITID", 0x3c, regvalue, cur_col, wrap)
 #endif
 
 #if AIC_DEBUG_REGISTERS
@@ -517,13 +517,6 @@ ahd_reg_print_t ahd_selid_print;
 #endif
 
 #if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_sblkctl_print;
-#else
-#define ahd_sblkctl_print(regvalue, cur_col, wrap) \
-    ahd_print_register(NULL, 0, "SBLKCTL", 0x4a, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
 ahd_reg_print_t ahd_optionmode_print;
 #else
 #define ahd_optionmode_print(regvalue, cur_col, wrap) \
@@ -531,10 +524,10 @@ ahd_reg_print_t ahd_optionmode_print;
 #endif
 
 #if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_sstat0_print;
+ahd_reg_print_t ahd_sblkctl_print;
 #else
-#define ahd_sstat0_print(regvalue, cur_col, wrap) \
-    ahd_print_register(NULL, 0, "SSTAT0", 0x4b, regvalue, cur_col, wrap)
+#define ahd_sblkctl_print(regvalue, cur_col, wrap) \
+    ahd_print_register(NULL, 0, "SBLKCTL", 0x4a, regvalue, cur_col, wrap)
 #endif
 
 #if AIC_DEBUG_REGISTERS
@@ -545,6 +538,13 @@ ahd_reg_print_t ahd_clrsint0_print;
 #endif
 
 #if AIC_DEBUG_REGISTERS
+ahd_reg_print_t ahd_sstat0_print;
+#else
+#define ahd_sstat0_print(regvalue, cur_col, wrap) \
+    ahd_print_register(NULL, 0, "SSTAT0", 0x4b, regvalue, cur_col, wrap)
+#endif
+
+#if AIC_DEBUG_REGISTERS
 ahd_reg_print_t ahd_simode0_print;
 #else
 #define ahd_simode0_print(regvalue, cur_col, wrap) \
@@ -573,17 +573,17 @@ ahd_reg_print_t ahd_sstat2_print;
 #endif
 
 #if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_clrsint2_print;
+ahd_reg_print_t ahd_simode2_print;
 #else
-#define ahd_clrsint2_print(regvalue, cur_col, wrap) \
-    ahd_print_register(NULL, 0, "CLRSINT2", 0x4d, regvalue, cur_col, wrap)
+#define ahd_simode2_print(regvalue, cur_col, wrap) \
+    ahd_print_register(NULL, 0, "SIMODE2", 0x4d, regvalue, cur_col, wrap)
 #endif
 
 #if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_simode2_print;
+ahd_reg_print_t ahd_clrsint2_print;
 #else
-#define ahd_simode2_print(regvalue, cur_col, wrap) \
-    ahd_print_register(NULL, 0, "SIMODE2", 0x4d, regvalue, cur_col, wrap)
+#define ahd_clrsint2_print(regvalue, cur_col, wrap) \
+    ahd_print_register(NULL, 0, "CLRSINT2", 0x4d, regvalue, cur_col, wrap)
 #endif
 
 #if AIC_DEBUG_REGISTERS
@@ -685,13 +685,6 @@ ahd_reg_print_t ahd_clrsint3_print;
 #endif
 
 #if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_lqomode0_print;
-#else
-#define ahd_lqomode0_print(regvalue, cur_col, wrap) \
-    ahd_print_register(NULL, 0, "LQOMODE0", 0x54, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
 ahd_reg_print_t ahd_lqostat0_print;
 #else
 #define ahd_lqostat0_print(regvalue, cur_col, wrap) \
@@ -706,6 +699,20 @@ ahd_reg_print_t ahd_clrlqoint0_print;
 #endif
 
 #if AIC_DEBUG_REGISTERS
+ahd_reg_print_t ahd_lqomode0_print;
+#else
+#define ahd_lqomode0_print(regvalue, cur_col, wrap) \
+    ahd_print_register(NULL, 0, "LQOMODE0", 0x54, regvalue, cur_col, wrap)
+#endif
+
+#if AIC_DEBUG_REGISTERS
+ahd_reg_print_t ahd_lqomode1_print;
+#else
+#define ahd_lqomode1_print(regvalue, cur_col, wrap) \
+    ahd_print_register(NULL, 0, "LQOMODE1", 0x55, regvalue, cur_col, wrap)
+#endif
+
+#if AIC_DEBUG_REGISTERS
 ahd_reg_print_t ahd_lqostat1_print;
 #else
 #define ahd_lqostat1_print(regvalue, cur_col, wrap) \
@@ -720,13 +727,6 @@ ahd_reg_print_t ahd_clrlqoint1_print;
 #endif
 
 #if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_lqomode1_print;
-#else
-#define ahd_lqomode1_print(regvalue, cur_col, wrap) \
-    ahd_print_register(NULL, 0, "LQOMODE1", 0x55, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
 ahd_reg_print_t ahd_lqostat2_print;
 #else
 #define ahd_lqostat2_print(regvalue, cur_col, wrap) \
@@ -909,17 +909,17 @@ ahd_reg_print_t ahd_annexcol_print;
 #endif
 
 #if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_scschkn_print;
+ahd_reg_print_t ahd_annexdat_print;
 #else
-#define ahd_scschkn_print(regvalue, cur_col, wrap) \
-    ahd_print_register(NULL, 0, "SCSCHKN", 0x66, regvalue, cur_col, wrap)
+#define ahd_annexdat_print(regvalue, cur_col, wrap) \
+    ahd_print_register(NULL, 0, "ANNEXDAT", 0x66, regvalue, cur_col, wrap)
 #endif
 
 #if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_annexdat_print;
+ahd_reg_print_t ahd_scschkn_print;
 #else
-#define ahd_annexdat_print(regvalue, cur_col, wrap) \
-    ahd_print_register(NULL, 0, "ANNEXDAT", 0x66, regvalue, cur_col, wrap)
+#define ahd_scschkn_print(regvalue, cur_col, wrap) \
+    ahd_print_register(NULL, 0, "SCSCHKN", 0x66, regvalue, cur_col, wrap)
 #endif
 
 #if AIC_DEBUG_REGISTERS
@@ -1000,17 +1000,17 @@ ahd_reg_print_t ahd_pll400ctl1_print;
 #endif
 
 #if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_pll400cnt0_print;
+ahd_reg_print_t ahd_unfairness_print;
 #else
-#define ahd_pll400cnt0_print(regvalue, cur_col, wrap) \
-    ahd_print_register(NULL, 0, "PLL400CNT0", 0x6e, regvalue, cur_col, wrap)
+#define ahd_unfairness_print(regvalue, cur_col, wrap) \
+    ahd_print_register(NULL, 0, "UNFAIRNESS", 0x6e, regvalue, cur_col, wrap)
 #endif
 
 #if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_unfairness_print;
+ahd_reg_print_t ahd_pll400cnt0_print;
 #else
-#define ahd_unfairness_print(regvalue, cur_col, wrap) \
-    ahd_print_register(NULL, 0, "UNFAIRNESS", 0x6e, regvalue, cur_col, wrap)
+#define ahd_pll400cnt0_print(regvalue, cur_col, wrap) \
+    ahd_print_register(NULL, 0, "PLL400CNT0", 0x6e, regvalue, cur_col, wrap)
 #endif
 
 #if AIC_DEBUG_REGISTERS
@@ -1056,13 +1056,6 @@ ahd_reg_print_t ahd_hodmaen_print;
 #endif
 
 #if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_sghaddr_print;
-#else
-#define ahd_sghaddr_print(regvalue, cur_col, wrap) \
-    ahd_print_register(NULL, 0, "SGHADDR", 0x7c, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
 ahd_reg_print_t ahd_scbhaddr_print;
 #else
 #define ahd_scbhaddr_print(regvalue, cur_col, wrap) \
@@ -1070,10 +1063,10 @@ ahd_reg_print_t ahd_scbhaddr_print;
 #endif
 
 #if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_sghcnt_print;
+ahd_reg_print_t ahd_sghaddr_print;
 #else
-#define ahd_sghcnt_print(regvalue, cur_col, wrap) \
-    ahd_print_register(NULL, 0, "SGHCNT", 0x84, regvalue, cur_col, wrap)
+#define ahd_sghaddr_print(regvalue, cur_col, wrap) \
+    ahd_print_register(NULL, 0, "SGHADDR", 0x7c, regvalue, cur_col, wrap)
 #endif
 
 #if AIC_DEBUG_REGISTERS
@@ -1084,6 +1077,13 @@ ahd_reg_print_t ahd_scbhcnt_print;
 #endif
 
 #if AIC_DEBUG_REGISTERS
+ahd_reg_print_t ahd_sghcnt_print;
+#else
+#define ahd_sghcnt_print(regvalue, cur_col, wrap) \
+    ahd_print_register(NULL, 0, "SGHCNT", 0x84, regvalue, cur_col, wrap)
+#endif
+
+#if AIC_DEBUG_REGISTERS
 ahd_reg_print_t ahd_dff_thrsh_print;
 #else
 #define ahd_dff_thrsh_print(regvalue, cur_col, wrap) \
@@ -1154,13 +1154,6 @@ ahd_reg_print_t ahd_nsenable_print;
 #endif
 
 #if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_dchrxmsg1_print;
-#else
-#define ahd_dchrxmsg1_print(regvalue, cur_col, wrap) \
-    ahd_print_register(NULL, 0, "DCHRXMSG1", 0x91, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
 ahd_reg_print_t ahd_cmcrxmsg1_print;
 #else
 #define ahd_cmcrxmsg1_print(regvalue, cur_col, wrap) \
@@ -1168,17 +1161,17 @@ ahd_reg_print_t ahd_cmcrxmsg1_print;
 #endif
 
 #if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_dchrxmsg2_print;
+ahd_reg_print_t ahd_dchrxmsg1_print;
 #else
-#define ahd_dchrxmsg2_print(regvalue, cur_col, wrap) \
-    ahd_print_register(NULL, 0, "DCHRXMSG2", 0x92, regvalue, cur_col, wrap)
+#define ahd_dchrxmsg1_print(regvalue, cur_col, wrap) \
+    ahd_print_register(NULL, 0, "DCHRXMSG1", 0x91, regvalue, cur_col, wrap)
 #endif
 
 #if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_ovlyrxmsg2_print;
+ahd_reg_print_t ahd_dchrxmsg2_print;
 #else
-#define ahd_ovlyrxmsg2_print(regvalue, cur_col, wrap) \
-    ahd_print_register(NULL, 0, "OVLYRXMSG2", 0x92, regvalue, cur_col, wrap)
+#define ahd_dchrxmsg2_print(regvalue, cur_col, wrap) \
+    ahd_print_register(NULL, 0, "DCHRXMSG2", 0x92, regvalue, cur_col, wrap)
 #endif
 
 #if AIC_DEBUG_REGISTERS
@@ -1196,6 +1189,13 @@ ahd_reg_print_t ahd_ost_print;
 #endif
 
 #if AIC_DEBUG_REGISTERS
+ahd_reg_print_t ahd_ovlyrxmsg2_print;
+#else
+#define ahd_ovlyrxmsg2_print(regvalue, cur_col, wrap) \
+    ahd_print_register(NULL, 0, "OVLYRXMSG2", 0x92, regvalue, cur_col, wrap)
+#endif
+
+#if AIC_DEBUG_REGISTERS
 ahd_reg_print_t ahd_dchrxmsg3_print;
 #else
 #define ahd_dchrxmsg3_print(regvalue, cur_col, wrap) \
@@ -1203,6 +1203,13 @@ ahd_reg_print_t ahd_dchrxmsg3_print;
 #endif
 
 #if AIC_DEBUG_REGISTERS
+ahd_reg_print_t ahd_ovlyrxmsg3_print;
+#else
+#define ahd_ovlyrxmsg3_print(regvalue, cur_col, wrap) \
+    ahd_print_register(NULL, 0, "OVLYRXMSG3", 0x93, regvalue, cur_col, wrap)
+#endif
+
+#if AIC_DEBUG_REGISTERS
 ahd_reg_print_t ahd_cmcrxmsg3_print;
 #else
 #define ahd_cmcrxmsg3_print(regvalue, cur_col, wrap) \
@@ -1217,13 +1224,6 @@ ahd_reg_print_t ahd_pcixctl_print;
 #endif
 
 #if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_ovlyrxmsg3_print;
-#else
-#define ahd_ovlyrxmsg3_print(regvalue, cur_col, wrap) \
-    ahd_print_register(NULL, 0, "OVLYRXMSG3", 0x93, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
 ahd_reg_print_t ahd_ovlyseqbcnt_print;
 #else
 #define ahd_ovlyseqbcnt_print(regvalue, cur_col, wrap) \
@@ -1231,13 +1231,6 @@ ahd_reg_print_t ahd_ovlyseqbcnt_print;
 #endif
 
 #if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_cmcseqbcnt_print;
-#else
-#define ahd_cmcseqbcnt_print(regvalue, cur_col, wrap) \
-    ahd_print_register(NULL, 0, "CMCSEQBCNT", 0x94, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
 ahd_reg_print_t ahd_dchseqbcnt_print;
 #else
 #define ahd_dchseqbcnt_print(regvalue, cur_col, wrap) \
@@ -1245,17 +1238,17 @@ ahd_reg_print_t ahd_dchseqbcnt_print;
 #endif
 
 #if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_cmcspltstat0_print;
+ahd_reg_print_t ahd_cmcseqbcnt_print;
 #else
-#define ahd_cmcspltstat0_print(regvalue, cur_col, wrap) \
-    ahd_print_register(NULL, 0, "CMCSPLTSTAT0", 0x96, regvalue, cur_col, wrap)
+#define ahd_cmcseqbcnt_print(regvalue, cur_col, wrap) \
+    ahd_print_register(NULL, 0, "CMCSEQBCNT", 0x94, regvalue, cur_col, wrap)
 #endif
 
 #if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_ovlyspltstat0_print;
+ahd_reg_print_t ahd_cmcspltstat0_print;
 #else
-#define ahd_ovlyspltstat0_print(regvalue, cur_col, wrap) \
-    ahd_print_register(NULL, 0, "OVLYSPLTSTAT0", 0x96, regvalue, cur_col, wrap)
+#define ahd_cmcspltstat0_print(regvalue, cur_col, wrap) \
+    ahd_print_register(NULL, 0, "CMCSPLTSTAT0", 0x96, regvalue, cur_col, wrap)
 #endif
 
 #if AIC_DEBUG_REGISTERS
@@ -1266,10 +1259,10 @@ ahd_reg_print_t ahd_dchspltstat0_print;
 #endif
 
 #if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_dchspltstat1_print;
+ahd_reg_print_t ahd_ovlyspltstat0_print;
 #else
-#define ahd_dchspltstat1_print(regvalue, cur_col, wrap) \
-    ahd_print_register(NULL, 0, "DCHSPLTSTAT1", 0x97, regvalue, cur_col, wrap)
+#define ahd_ovlyspltstat0_print(regvalue, cur_col, wrap) \
+    ahd_print_register(NULL, 0, "OVLYSPLTSTAT0", 0x96, regvalue, cur_col, wrap)
 #endif
 
 #if AIC_DEBUG_REGISTERS
@@ -1287,6 +1280,13 @@ ahd_reg_print_t ahd_ovlyspltstat1_print;
 #endif
 
 #if AIC_DEBUG_REGISTERS
+ahd_reg_print_t ahd_dchspltstat1_print;
+#else
+#define ahd_dchspltstat1_print(regvalue, cur_col, wrap) \
+    ahd_print_register(NULL, 0, "DCHSPLTSTAT1", 0x97, regvalue, cur_col, wrap)
+#endif
+
+#if AIC_DEBUG_REGISTERS
 ahd_reg_print_t ahd_sgrxmsg0_print;
 #else
 #define ahd_sgrxmsg0_print(regvalue, cur_col, wrap) \
@@ -1378,17 +1378,17 @@ ahd_reg_print_t ahd_sgspltstat0_print;
 #endif
 
 #if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_sfunct_print;
+ahd_reg_print_t ahd_sgspltstat1_print;
 #else
-#define ahd_sfunct_print(regvalue, cur_col, wrap) \
-    ahd_print_register(NULL, 0, "SFUNCT", 0x9f, regvalue, cur_col, wrap)
+#define ahd_sgspltstat1_print(regvalue, cur_col, wrap) \
+    ahd_print_register(NULL, 0, "SGSPLTSTAT1", 0x9f, regvalue, cur_col, wrap)
 #endif
 
 #if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_sgspltstat1_print;
+ahd_reg_print_t ahd_sfunct_print;
 #else
-#define ahd_sgspltstat1_print(regvalue, cur_col, wrap) \
-    ahd_print_register(NULL, 0, "SGSPLTSTAT1", 0x9f, regvalue, cur_col, wrap)
+#define ahd_sfunct_print(regvalue, cur_col, wrap) \
+    ahd_print_register(NULL, 0, "SFUNCT", 0x9f, regvalue, cur_col, wrap)
 #endif
 
 #if AIC_DEBUG_REGISTERS
@@ -1504,17 +1504,17 @@ ahd_reg_print_t ahd_ccsgaddr_print;
 #endif
 
 #if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_ccscbaddr_print;
+ahd_reg_print_t ahd_ccscbadr_bk_print;
 #else
-#define ahd_ccscbaddr_print(regvalue, cur_col, wrap) \
-    ahd_print_register(NULL, 0, "CCSCBADDR", 0xac, regvalue, cur_col, wrap)
+#define ahd_ccscbadr_bk_print(regvalue, cur_col, wrap) \
+    ahd_print_register(NULL, 0, "CCSCBADR_BK", 0xac, regvalue, cur_col, wrap)
 #endif
 
 #if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_ccscbadr_bk_print;
+ahd_reg_print_t ahd_ccscbaddr_print;
 #else
-#define ahd_ccscbadr_bk_print(regvalue, cur_col, wrap) \
-    ahd_print_register(NULL, 0, "CCSCBADR_BK", 0xac, regvalue, cur_col, wrap)
+#define ahd_ccscbaddr_print(regvalue, cur_col, wrap) \
+    ahd_print_register(NULL, 0, "CCSCBADDR", 0xac, regvalue, cur_col, wrap)
 #endif
 
 #if AIC_DEBUG_REGISTERS
@@ -1525,17 +1525,17 @@ ahd_reg_print_t ahd_cmc_rambist_print;
 #endif
 
 #if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_ccsgctl_print;
+ahd_reg_print_t ahd_ccscbctl_print;
 #else
-#define ahd_ccsgctl_print(regvalue, cur_col, wrap) \
-    ahd_print_register(NULL, 0, "CCSGCTL", 0xad, regvalue, cur_col, wrap)
+#define ahd_ccscbctl_print(regvalue, cur_col, wrap) \
+    ahd_print_register(NULL, 0, "CCSCBCTL", 0xad, regvalue, cur_col, wrap)
 #endif
 
 #if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_ccscbctl_print;
+ahd_reg_print_t ahd_ccsgctl_print;
 #else
-#define ahd_ccscbctl_print(regvalue, cur_col, wrap) \
-    ahd_print_register(NULL, 0, "CCSCBCTL", 0xad, regvalue, cur_col, wrap)
+#define ahd_ccsgctl_print(regvalue, cur_col, wrap) \
+    ahd_print_register(NULL, 0, "CCSGCTL", 0xad, regvalue, cur_col, wrap)
 #endif
 
 #if AIC_DEBUG_REGISTERS
@@ -1707,13 +1707,6 @@ ahd_reg_print_t ahd_wrtbiascalc_print;
 #endif
 
 #if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_dfptrs_print;
-#else
-#define ahd_dfptrs_print(regvalue, cur_col, wrap) \
-    ahd_print_register(NULL, 0, "DFPTRS", 0xc8, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
 ahd_reg_print_t ahd_rcvrbiascalc_print;
 #else
 #define ahd_rcvrbiascalc_print(regvalue, cur_col, wrap) \
@@ -1721,10 +1714,10 @@ ahd_reg_print_t ahd_rcvrbiascalc_print;
 #endif
 
 #if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_dfbkptr_print;
+ahd_reg_print_t ahd_dfptrs_print;
 #else
-#define ahd_dfbkptr_print(regvalue, cur_col, wrap) \
-    ahd_print_register(NULL, 0, "DFBKPTR", 0xc9, regvalue, cur_col, wrap)
+#define ahd_dfptrs_print(regvalue, cur_col, wrap) \
+    ahd_print_register(NULL, 0, "DFPTRS", 0xc8, regvalue, cur_col, wrap)
 #endif
 
 #if AIC_DEBUG_REGISTERS
@@ -1735,6 +1728,13 @@ ahd_reg_print_t ahd_skewcalc_print;
 #endif
 
 #if AIC_DEBUG_REGISTERS
+ahd_reg_print_t ahd_dfbkptr_print;
+#else
+#define ahd_dfbkptr_print(regvalue, cur_col, wrap) \
+    ahd_print_register(NULL, 0, "DFBKPTR", 0xc9, regvalue, cur_col, wrap)
+#endif
+
+#if AIC_DEBUG_REGISTERS
 ahd_reg_print_t ahd_dfdbctl_print;
 #else
 #define ahd_dfdbctl_print(regvalue, cur_col, wrap) \
@@ -1826,17 +1826,17 @@ ahd_reg_print_t ahd_dindex_print;
 #endif
 
 #if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_brkaddr1_print;
+ahd_reg_print_t ahd_brkaddr0_print;
 #else
-#define ahd_brkaddr1_print(regvalue, cur_col, wrap) \
-    ahd_print_register(NULL, 0, "BRKADDR1", 0xe6, regvalue, cur_col, wrap)
+#define ahd_brkaddr0_print(regvalue, cur_col, wrap) \
+    ahd_print_register(NULL, 0, "BRKADDR0", 0xe6, regvalue, cur_col, wrap)
 #endif
 
 #if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_brkaddr0_print;
+ahd_reg_print_t ahd_brkaddr1_print;
 #else
-#define ahd_brkaddr0_print(regvalue, cur_col, wrap) \
-    ahd_print_register(NULL, 0, "BRKADDR0", 0xe6, regvalue, cur_col, wrap)
+#define ahd_brkaddr1_print(regvalue, cur_col, wrap) \
+    ahd_print_register(NULL, 0, "BRKADDR1", 0xe6, regvalue, cur_col, wrap)
 #endif
 
 #if AIC_DEBUG_REGISTERS
@@ -1889,13 +1889,6 @@ ahd_reg_print_t ahd_stack_print;
 #endif
 
 #if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_curaddr_print;
-#else
-#define ahd_curaddr_print(regvalue, cur_col, wrap) \
-    ahd_print_register(NULL, 0, "CURADDR", 0xf4, regvalue, cur_col, wrap)
-#endif
-
-#if AIC_DEBUG_REGISTERS
 ahd_reg_print_t ahd_intvec1_addr_print;
 #else
 #define ahd_intvec1_addr_print(regvalue, cur_col, wrap) \
@@ -1903,10 +1896,10 @@ ahd_reg_print_t ahd_intvec1_addr_print;
 #endif
 
 #if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_intvec2_addr_print;
+ahd_reg_print_t ahd_curaddr_print;
 #else
-#define ahd_intvec2_addr_print(regvalue, cur_col, wrap) \
-    ahd_print_register(NULL, 0, "INTVEC2_ADDR", 0xf6, regvalue, cur_col, wrap)
+#define ahd_curaddr_print(regvalue, cur_col, wrap) \
+    ahd_print_register(NULL, 0, "CURADDR", 0xf4, regvalue, cur_col, wrap)
 #endif
 
 #if AIC_DEBUG_REGISTERS
@@ -1917,6 +1910,13 @@ ahd_reg_print_t ahd_lastaddr_print;
 #endif
 
 #if AIC_DEBUG_REGISTERS
+ahd_reg_print_t ahd_intvec2_addr_print;
+#else
+#define ahd_intvec2_addr_print(regvalue, cur_col, wrap) \
+    ahd_print_register(NULL, 0, "INTVEC2_ADDR", 0xf6, regvalue, cur_col, wrap)
+#endif
+
+#if AIC_DEBUG_REGISTERS
 ahd_reg_print_t ahd_longjmp_addr_print;
 #else
 #define ahd_longjmp_addr_print(regvalue, cur_col, wrap) \
@@ -1994,192 +1994,213 @@ ahd_reg_print_t ahd_complete_dma_scb_head_print;
 #endif
 
 #if AIC_DEBUG_REGISTERS
+ahd_reg_print_t ahd_complete_dma_scb_tail_print;
+#else
+#define ahd_complete_dma_scb_tail_print(regvalue, cur_col, wrap) \
+    ahd_print_register(NULL, 0, "COMPLETE_DMA_SCB_TAIL", 0x12e, regvalue, cur_col, wrap)
+#endif
+
+#if AIC_DEBUG_REGISTERS
+ahd_reg_print_t ahd_complete_on_qfreeze_head_print;
+#else
+#define ahd_complete_on_qfreeze_head_print(regvalue, cur_col, wrap) \
+    ahd_print_register(NULL, 0, "COMPLETE_ON_QFREEZE_HEAD", 0x130, regvalue, cur_col, wrap)
+#endif
+
+#if AIC_DEBUG_REGISTERS
 ahd_reg_print_t ahd_qfreeze_count_print;
 #else
 #define ahd_qfreeze_count_print(regvalue, cur_col, wrap) \
-    ahd_print_register(NULL, 0, "QFREEZE_COUNT", 0x12e, regvalue, cur_col, wrap)
+    ahd_print_register(NULL, 0, "QFREEZE_COUNT", 0x132, regvalue, cur_col, wrap)
+#endif
+
+#if AIC_DEBUG_REGISTERS
+ahd_reg_print_t ahd_kernel_qfreeze_count_print;
+#else
+#define ahd_kernel_qfreeze_count_print(regvalue, cur_col, wrap) \
+    ahd_print_register(NULL, 0, "KERNEL_QFREEZE_COUNT", 0x134, regvalue, cur_col, wrap)
 #endif
 
 #if AIC_DEBUG_REGISTERS
 ahd_reg_print_t ahd_saved_mode_print;
 #else
 #define ahd_saved_mode_print(regvalue, cur_col, wrap) \
-    ahd_print_register(NULL, 0, "SAVED_MODE", 0x130, regvalue, cur_col, wrap)
+    ahd_print_register(NULL, 0, "SAVED_MODE", 0x136, regvalue, cur_col, wrap)
 #endif
 
 #if AIC_DEBUG_REGISTERS
 ahd_reg_print_t ahd_msg_out_print;
 #else
 #define ahd_msg_out_print(regvalue, cur_col, wrap) \
-    ahd_print_register(NULL, 0, "MSG_OUT", 0x131, regvalue, cur_col, wrap)
+    ahd_print_register(NULL, 0, "MSG_OUT", 0x137, regvalue, cur_col, wrap)
 #endif
 
 #if AIC_DEBUG_REGISTERS
 ahd_reg_print_t ahd_dmaparams_print;
 #else
 #define ahd_dmaparams_print(regvalue, cur_col, wrap) \
-    ahd_print_register(NULL, 0, "DMAPARAMS", 0x132, regvalue, cur_col, wrap)
+    ahd_print_register(NULL, 0, "DMAPARAMS", 0x138, regvalue, cur_col, wrap)
 #endif
 
 #if AIC_DEBUG_REGISTERS
 ahd_reg_print_t ahd_seq_flags_print;
 #else
 #define ahd_seq_flags_print(regvalue, cur_col, wrap) \
-    ahd_print_register(NULL, 0, "SEQ_FLAGS", 0x133, regvalue, cur_col, wrap)
+    ahd_print_register(NULL, 0, "SEQ_FLAGS", 0x139, regvalue, cur_col, wrap)
 #endif
 
 #if AIC_DEBUG_REGISTERS
 ahd_reg_print_t ahd_saved_scsiid_print;
 #else
 #define ahd_saved_scsiid_print(regvalue, cur_col, wrap) \
-    ahd_print_register(NULL, 0, "SAVED_SCSIID", 0x134, regvalue, cur_col, wrap)
+    ahd_print_register(NULL, 0, "SAVED_SCSIID", 0x13a, regvalue, cur_col, wrap)
 #endif
 
 #if AIC_DEBUG_REGISTERS
 ahd_reg_print_t ahd_saved_lun_print;
 #else
 #define ahd_saved_lun_print(regvalue, cur_col, wrap) \
-    ahd_print_register(NULL, 0, "SAVED_LUN", 0x135, regvalue, cur_col, wrap)
+    ahd_print_register(NULL, 0, "SAVED_LUN", 0x13b, regvalue, cur_col, wrap)
 #endif
 
 #if AIC_DEBUG_REGISTERS
 ahd_reg_print_t ahd_lastphase_print;
 #else
 #define ahd_lastphase_print(regvalue, cur_col, wrap) \
-    ahd_print_register(NULL, 0, "LASTPHASE", 0x136, regvalue, cur_col, wrap)
+    ahd_print_register(NULL, 0, "LASTPHASE", 0x13c, regvalue, cur_col, wrap)
 #endif
 
 #if AIC_DEBUG_REGISTERS
 ahd_reg_print_t ahd_qoutfifo_entry_valid_tag_print;
 #else
 #define ahd_qoutfifo_entry_valid_tag_print(regvalue, cur_col, wrap) \
-    ahd_print_register(NULL, 0, "QOUTFIFO_ENTRY_VALID_TAG", 0x137, regvalue, cur_col, wrap)
+    ahd_print_register(NULL, 0, "QOUTFIFO_ENTRY_VALID_TAG", 0x13d, regvalue, cur_col, wrap)
 #endif
 
 #if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_shared_data_addr_print;
+ahd_reg_print_t ahd_kernel_tqinpos_print;
 #else
-#define ahd_shared_data_addr_print(regvalue, cur_col, wrap) \
-    ahd_print_register(NULL, 0, "SHARED_DATA_ADDR", 0x138, regvalue, cur_col, wrap)
+#define ahd_kernel_tqinpos_print(regvalue, cur_col, wrap) \
+    ahd_print_register(NULL, 0, "KERNEL_TQINPOS", 0x13e, regvalue, cur_col, wrap)
 #endif
 
 #if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_qoutfifo_next_addr_print;
+ahd_reg_print_t ahd_tqinpos_print;
 #else
-#define ahd_qoutfifo_next_addr_print(regvalue, cur_col, wrap) \
-    ahd_print_register(NULL, 0, "QOUTFIFO_NEXT_ADDR", 0x13c, regvalue, cur_col, wrap)
+#define ahd_tqinpos_print(regvalue, cur_col, wrap) \
+    ahd_print_register(NULL, 0, "TQINPOS", 0x13f, regvalue, cur_col, wrap)
 #endif
 
 #if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_kernel_tqinpos_print;
+ahd_reg_print_t ahd_shared_data_addr_print;
 #else
-#define ahd_kernel_tqinpos_print(regvalue, cur_col, wrap) \
-    ahd_print_register(NULL, 0, "KERNEL_TQINPOS", 0x140, regvalue, cur_col, wrap)
+#define ahd_shared_data_addr_print(regvalue, cur_col, wrap) \
+    ahd_print_register(NULL, 0, "SHARED_DATA_ADDR", 0x140, regvalue, cur_col, wrap)
 #endif
 
 #if AIC_DEBUG_REGISTERS
-ahd_reg_print_t ahd_tqinpos_print;
+ahd_reg_print_t ahd_qoutfifo_next_addr_print;
 #else
-#define ahd_tqinpos_print(regvalue, cur_col, wrap) \
-    ahd_print_register(NULL, 0, "TQINPOS", 0x141, regvalue, cur_col, wrap)
+#define ahd_qoutfifo_next_addr_print(regvalue, cur_col, wrap) \
+    ahd_print_register(NULL, 0, "QOUTFIFO_NEXT_ADDR", 0x144, regvalue, cur_col, wrap)
 #endif
 
 #if AIC_DEBUG_REGISTERS
 ahd_reg_print_t ahd_arg_1_print;
 #else
 #define ahd_arg_1_print(regvalue, cur_col, wrap) \
-    ahd_print_register(NULL, 0, "ARG_1", 0x142, regvalue, cur_col, wrap)
+    ahd_print_register(NULL, 0, "ARG_1", 0x148, regvalue, cur_col, wrap)
 #endif
 
 #if AIC_DEBUG_REGISTERS
 ahd_reg_print_t ahd_arg_2_print;
 #else
 #define ahd_arg_2_print(regvalue, cur_col, wrap) \
-    ahd_print_register(NULL, 0, "ARG_2", 0x143, regvalue, cur_col, wrap)
+    ahd_print_register(NULL, 0, "ARG_2", 0x149, regvalue, cur_col, wrap)
 #endif
 
 #if AIC_DEBUG_REGISTERS
 ahd_reg_print_t ahd_last_msg_print;
 #else
 #define ahd_last_msg_print(regvalue, cur_col, wrap) \
-    ahd_print_register(NULL, 0, "LAST_MSG", 0x144, regvalue, cur_col, wrap)
+    ahd_print_register(NULL, 0, "LAST_MSG", 0x14a, regvalue, cur_col, wrap)
 #endif
 
 #if AIC_DEBUG_REGISTERS
 ahd_reg_print_t ahd_scsiseq_template_print;
 #else
 #define ahd_scsiseq_template_print(regvalue, cur_col, wrap) \
-    ahd_print_register(NULL, 0, "SCSISEQ_TEMPLATE", 0x145, regvalue, cur_col, wrap)
+    ahd_print_register(NULL, 0, "SCSISEQ_TEMPLATE", 0x14b, regvalue, cur_col, wrap)
 #endif
 
 #if AIC_DEBUG_REGISTERS
 ahd_reg_print_t ahd_initiator_tag_print;
 #else
 #define ahd_initiator_tag_print(regvalue, cur_col, wrap) \
-    ahd_print_register(NULL, 0, "INITIATOR_TAG", 0x146, regvalue, cur_col, wrap)
+    ahd_print_register(NULL, 0, "INITIATOR_TAG", 0x14c, regvalue, cur_col, wrap)
 #endif
 
 #if AIC_DEBUG_REGISTERS
 ahd_reg_print_t ahd_seq_flags2_print;
 #else
 #define ahd_seq_flags2_print(regvalue, cur_col, wrap) \
-    ahd_print_register(NULL, 0, "SEQ_FLAGS2", 0x147, regvalue, cur_col, wrap)
+    ahd_print_register(NULL, 0, "SEQ_FLAGS2", 0x14d, regvalue, cur_col, wrap)
 #endif
 
 #if AIC_DEBUG_REGISTERS
 ahd_reg_print_t ahd_allocfifo_scbptr_print;
 #else
 #define ahd_allocfifo_scbptr_print(regvalue, cur_col, wrap) \
-    ahd_print_register(NULL, 0, "ALLOCFIFO_SCBPTR", 0x148, regvalue, cur_col, wrap)
+    ahd_print_register(NULL, 0, "ALLOCFIFO_SCBPTR", 0x14e, regvalue, cur_col, wrap)
 #endif
 
 #if AIC_DEBUG_REGISTERS
 ahd_reg_print_t ahd_int_coalescing_timer_print;
 #else
 #define ahd_int_coalescing_timer_print(regvalue, cur_col, wrap) \
-    ahd_print_register(NULL, 0, "INT_COALESCING_TIMER", 0x14a, regvalue, cur_col, wrap)
+    ahd_print_register(NULL, 0, "INT_COALESCING_TIMER", 0x150, regvalue, cur_col, wrap)
 #endif
 
 #if AIC_DEBUG_REGISTERS
 ahd_reg_print_t ahd_int_coalescing_maxcmds_print;
 #else
 #define ahd_int_coalescing_maxcmds_print(regvalue, cur_col, wrap) \
-    ahd_print_register(NULL, 0, "INT_COALESCING_MAXCMDS", 0x14c, regvalue, cur_col, wrap)
+    ahd_print_register(NULL, 0, "INT_COALESCING_MAXCMDS", 0x152, regvalue, cur_col, wrap)
 #endif
 
 #if AIC_DEBUG_REGISTERS
 ahd_reg_print_t ahd_int_coalescing_mincmds_print;
 #else
 #define ahd_int_coalescing_mincmds_print(regvalue, cur_col, wrap) \
-    ahd_print_register(NULL, 0, "INT_COALESCING_MINCMDS", 0x14d, regvalue, cur_col, wrap)
+    ahd_print_register(NULL, 0, "INT_COALESCING_MINCMDS", 0x153, regvalue, cur_col, wrap)
 #endif
 
 #if AIC_DEBUG_REGISTERS
 ahd_reg_print_t ahd_cmds_pending_print;
 #else
 #define ahd_cmds_pending_print(regvalue, cur_col, wrap) \
-    ahd_print_register(NULL, 0, "CMDS_PENDING", 0x14e, regvalue, cur_col, wrap)
+    ahd_print_register(NULL, 0, "CMDS_PENDING", 0x154, regvalue, cur_col, wrap)
 #endif
 
 #if AIC_DEBUG_REGISTERS
 ahd_reg_print_t ahd_int_coalescing_cmdcount_print;
 #else
 #define ahd_int_coalescing_cmdcount_print(regvalue, cur_col, wrap) \
-    ahd_print_register(NULL, 0, "INT_COALESCING_CMDCOUNT", 0x150, regvalue, cur_col, wrap)
+    ahd_print_register(NULL, 0, "INT_COALESCING_CMDCOUNT", 0x156, regvalue, cur_col, wrap)
 #endif
 
 #if AIC_DEBUG_REGISTERS
 ahd_reg_print_t ahd_local_hs_mailbox_print;
 #else
 #define ahd_local_hs_mailbox_print(regvalue, cur_col, wrap) \
-    ahd_print_register(NULL, 0, "LOCAL_HS_MAILBOX", 0x151, regvalue, cur_col, wrap)
+    ahd_print_register(NULL, 0, "LOCAL_HS_MAILBOX", 0x157, regvalue, cur_col, wrap)
 #endif
 
 #if AIC_DEBUG_REGISTERS
 ahd_reg_print_t ahd_cmdsize_table_print;
 #else
 #define ahd_cmdsize_table_print(regvalue, cur_col, wrap) \
-    ahd_print_register(NULL, 0, "CMDSIZE_TABLE", 0x152, regvalue, cur_col, wrap)
+    ahd_print_register(NULL, 0, "CMDSIZE_TABLE", 0x158, regvalue, cur_col, wrap)
 #endif
 
 #if AIC_DEBUG_REGISTERS
@@ -2434,13 +2455,6 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print;
 #define         HOST_TQINPOS            0x80
 #define         ENINT_COALESCE          0x40
 
-#define CLRSEQINTSTAT                   0x0c
-#define         CLRSEQ_SWTMRTO          0x10
-#define         CLRSEQ_SEQINT           0x08
-#define         CLRSEQ_SCSIINT          0x04
-#define         CLRSEQ_PCIINT           0x02
-#define         CLRSEQ_SPLTINT          0x01
-
 #define SEQINTSTAT                      0x0c
 #define         SEQ_SWTMRTO             0x10
 #define         SEQ_SEQINT              0x08
@@ -2448,6 +2462,13 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print;
 #define         SEQ_PCIINT              0x02
 #define         SEQ_SPLTINT             0x01
 
+#define CLRSEQINTSTAT                   0x0c
+#define         CLRSEQ_SWTMRTO          0x10
+#define         CLRSEQ_SEQINT           0x08
+#define         CLRSEQ_SCSIINT          0x04
+#define         CLRSEQ_PCIINT           0x02
+#define         CLRSEQ_SPLTINT          0x01
+
 #define SWTIMER                         0x0e
 
 #define SNSCB_QOFF                      0x10
@@ -2623,10 +2644,10 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print;
 #define         BIOSCANCELEN            0x10
 #define         SPIOEN                  0x08
 
-#define BUSINITID                       0x3c
-
 #define DLCOUNT                         0x3c
 
+#define BUSINITID                       0x3c
+
 #define SXFRCTL1                        0x3d
 #define         BITBUCKET               0x80
 #define         ENSACHK                 0x40
@@ -2693,13 +2714,6 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print;
 #define         SELID_MASK              0xf0
 #define         ONEBIT                  0x08
 
-#define SBLKCTL                         0x4a
-#define         DIAGLEDEN               0x80
-#define         DIAGLEDON               0x40
-#define         ENAB40                  0x08
-#define         ENAB20                  0x04
-#define         SELWIDE                 0x02
-
 #define OPTIONMODE                      0x4a
 #define         OPTIONMODE_DEFAULTS     0x02
 #define         BIOSCANCTL              0x80
@@ -2709,15 +2723,12 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print;
 #define         ENDGFORMCHK             0x04
 #define         AUTO_MSGOUT_DE          0x02
 
-#define SSTAT0                          0x4b
-#define         TARGET                  0x80
-#define         SELDO                   0x40
-#define         SELDI                   0x20
-#define         SELINGO                 0x10
-#define         IOERR                   0x08
-#define         OVERRUN                 0x04
-#define         SPIORDY                 0x02
-#define         ARBDO                   0x01
+#define SBLKCTL                         0x4a
+#define         DIAGLEDEN               0x80
+#define         DIAGLEDON               0x40
+#define         ENAB40                  0x08
+#define         ENAB20                  0x04
+#define         SELWIDE                 0x02
 
 #define CLRSINT0                        0x4b
 #define         CLRSELDO                0x40
@@ -2728,6 +2739,16 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print;
 #define         CLRSPIORDY              0x02
 #define         CLRARBDO                0x01
 
+#define SSTAT0                          0x4b
+#define         TARGET                  0x80
+#define         SELDO                   0x40
+#define         SELDI                   0x20
+#define         SELINGO                 0x10
+#define         IOERR                   0x08
+#define         OVERRUN                 0x04
+#define         SPIORDY                 0x02
+#define         ARBDO                   0x01
+
 #define SIMODE0                         0x4b
 #define         ENSELDO                 0x40
 #define         ENSELDI                 0x20
@@ -2768,17 +2789,17 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print;
 #define         BUSFREE_DFF0            0x80
 #define         BUSFREE_LQO             0x40
 
+#define SIMODE2                         0x4d
+#define         ENWIDE_RES              0x04
+#define         ENSDONE                 0x02
+#define         ENDMADONE               0x01
+
 #define CLRSINT2                        0x4d
 #define         CLRNONPACKREQ           0x20
 #define         CLRWIDE_RES             0x04
 #define         CLRSDONE                0x02
 #define         CLRDMADONE              0x01
 
-#define SIMODE2                         0x4d
-#define         ENWIDE_RES              0x04
-#define         ENSDONE                 0x02
-#define         ENDMADONE               0x01
-
 #define PERRDIAG                        0x4e
 #define         HIZERO                  0x80
 #define         HIPERR                  0x40
@@ -2871,13 +2892,6 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print;
 #define         CLRNTRAMPERR            0x02
 #define         CLROSRAMPERR            0x01
 
-#define LQOMODE0                        0x54
-#define         ENLQOTARGSCBPERR        0x10
-#define         ENLQOSTOPT2             0x08
-#define         ENLQOATNLQ              0x04
-#define         ENLQOATNPKT             0x02
-#define         ENLQOTCRC               0x01
-
 #define LQOSTAT0                        0x54
 #define         LQOTARGSCBPERR          0x10
 #define         LQOSTOPT2               0x08
@@ -2892,6 +2906,20 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print;
 #define         CLRLQOATNPKT            0x02
 #define         CLRLQOTCRC              0x01
 
+#define LQOMODE0                        0x54
+#define         ENLQOTARGSCBPERR        0x10
+#define         ENLQOSTOPT2             0x08
+#define         ENLQOATNLQ              0x04
+#define         ENLQOATNPKT             0x02
+#define         ENLQOTCRC               0x01
+
+#define LQOMODE1                        0x55
+#define         ENLQOINITSCBPERR        0x10
+#define         ENLQOSTOPI2             0x08
+#define         ENLQOBADQAS             0x04
+#define         ENLQOBUSFREE            0x02
+#define         ENLQOPHACHGINPKT        0x01
+
 #define LQOSTAT1                        0x55
 #define         LQOINITSCBPERR          0x10
 #define         LQOSTOPI2               0x08
@@ -2906,13 +2934,6 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print;
 #define         CLRLQOBUSFREE           0x02
 #define         CLRLQOPHACHGINPKT       0x01
 
-#define LQOMODE1                        0x55
-#define         ENLQOINITSCBPERR        0x10
-#define         ENLQOSTOPI2             0x08
-#define         ENLQOBADQAS             0x04
-#define         ENLQOBUSFREE            0x02
-#define         ENLQOPHACHGINPKT        0x01
-
 #define LQOSTAT2                        0x56
 #define         LQOPKT                  0xe0
 #define         LQOWAITFIFO             0x10
@@ -3028,6 +3049,8 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print;
 
 #define ANNEXCOL                        0x65
 
+#define ANNEXDAT                        0x66
+
 #define SCSCHKN                         0x66
 #define         STSELSKIDDIS            0x40
 #define         CURRFIFODEF             0x20
@@ -3037,8 +3060,6 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print;
 #define         SHVALIDSTDIS            0x02
 #define         LSTSGCLRDIS             0x01
 
-#define ANNEXDAT                        0x66
-
 #define IOWNID                          0x67
 
 #define PLL960CTL0                      0x68
@@ -3071,10 +3092,10 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print;
 #define         PLL_CNTCLR              0x40
 #define         PLL_RST                 0x01
 
-#define PLL400CNT0                      0x6e
-
 #define UNFAIRNESS                      0x6e
 
+#define PLL400CNT0                      0x6e
+
 #define HADDR                           0x70
 
 #define PLLDELAY                        0x70
@@ -3088,14 +3109,14 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print;
 
 #define HODMAEN                         0x7a
 
-#define SGHADDR                         0x7c
-
 #define SCBHADDR                        0x7c
 
-#define SGHCNT                          0x84
+#define SGHADDR                         0x7c
 
 #define SCBHCNT                         0x84
 
+#define SGHCNT                          0x84
+
 #define DFF_THRSH                       0x88
 #define         WR_DFTHRSH              0x70
 #define         RD_DFTHRSH              0x07
@@ -3113,8 +3134,8 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print;
 #define         RD_DFTHRSH_63           0x03
 #define         RD_DFTHRSH_50           0x02
 #define         RD_DFTHRSH_25           0x01
-#define         WR_DFTHRSH_MIN          0x00
 #define         RD_DFTHRSH_MIN          0x00
+#define         WR_DFTHRSH_MIN          0x00
 
 #define ROMADDR                         0x8a
 
@@ -3150,20 +3171,22 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print;
 #define         DCH1NSEN                0x02
 #define         DCH0NSEN                0x01
 
-#define DCHRXMSG1                       0x91
-
 #define CMCRXMSG1                       0x91
 
-#define DCHRXMSG2                       0x92
+#define DCHRXMSG1                       0x91
 
-#define OVLYRXMSG2                      0x92
+#define DCHRXMSG2                       0x92
 
 #define CMCRXMSG2                       0x92
 
 #define OST                             0x92
 
+#define OVLYRXMSG2                      0x92
+
 #define DCHRXMSG3                       0x93
 
+#define OVLYRXMSG3                      0x93
+
 #define CMCRXMSG3                       0x93
 
 #define PCIXCTL                         0x93
@@ -3175,26 +3198,24 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print;
 #define         TSCSERREN               0x02
 #define         CMPABCDIS               0x01
 
-#define OVLYRXMSG3                      0x93
-
 #define OVLYSEQBCNT                     0x94
 
-#define CMCSEQBCNT                      0x94
-
 #define DCHSEQBCNT                      0x94
 
-#define CMCSPLTSTAT0                    0x96
+#define CMCSEQBCNT                      0x94
 
-#define OVLYSPLTSTAT0                   0x96
+#define CMCSPLTSTAT0                    0x96
 
 #define DCHSPLTSTAT0                    0x96
 
-#define DCHSPLTSTAT1                    0x97
+#define OVLYSPLTSTAT0                   0x96
 
 #define CMCSPLTSTAT1                    0x97
 
 #define OVLYSPLTSTAT1                   0x97
 
+#define DCHSPLTSTAT1                    0x97
+
 #define SGRXMSG0                        0x98
 #define         CDNUM                   0xf8
 #define         CFNUM                   0x07
@@ -3244,13 +3265,13 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print;
 #define         RXSCEMSG                0x02
 #define         RXSPLTRSP               0x01
 
+#define SGSPLTSTAT1                     0x9f
+#define         RXDATABUCKET            0x01
+
 #define SFUNCT                          0x9f
 #define         TEST_GROUP              0xf0
 #define         TEST_NUM                0x0f
 
-#define SGSPLTSTAT1                     0x9f
-#define         RXDATABUCKET            0x01
-
 #define DF0PCISTAT                      0xa0
 
 #define REG0                            0xa0
@@ -3299,10 +3320,10 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print;
 
 #define CCSGADDR                        0xac
 
-#define CCSCBADDR                       0xac
-
 #define CCSCBADR_BK                     0xac
 
+#define CCSCBADDR                       0xac
+
 #define CMC_RAMBIST                     0xad
 #define         SG_ELEMENT_SIZE         0x80
 #define         SCBRAMBIST_FAIL         0x40
@@ -3311,14 +3332,6 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print;
 #define         CMC_BUFFER_BIST_FAIL    0x02
 #define         CMC_BUFFER_BIST_EN      0x01
 
-#define CCSGCTL                         0xad
-#define         CCSGEN                  0x0c
-#define         CCSGDONE                0x80
-#define         SG_CACHE_AVAIL          0x10
-#define         CCSGENACK               0x08
-#define         SG_FETCH_REQ            0x02
-#define         CCSGRESET               0x01
-
 #define CCSCBCTL                        0xad
 #define         CCSCBDONE               0x80
 #define         ARRDONE                 0x40
@@ -3327,6 +3340,14 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print;
 #define         CCSCBDIR                0x04
 #define         CCSCBRESET              0x01
 
+#define CCSGCTL                         0xad
+#define         CCSGEN                  0x0c
+#define         CCSGDONE                0x80
+#define         SG_CACHE_AVAIL          0x10
+#define         CCSGENACK               0x08
+#define         SG_FETCH_REQ            0x02
+#define         CCSGRESET               0x01
+
 #define CCSGRAM                         0xb0
 
 #define FLEXADR                         0xb0
@@ -3356,8 +3377,8 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print;
 #define SEEDAT                          0xbc
 
 #define SEECTL                          0xbe
-#define         SEEOP_EWEN              0x40
 #define         SEEOP_WALL              0x40
+#define         SEEOP_EWEN              0x40
 #define         SEEOP_EWDS              0x40
 #define         SEEOPCODE               0x70
 #define         SEERST                  0x02
@@ -3414,14 +3435,14 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print;
 
 #define WRTBIASCALC                     0xc7
 
-#define DFPTRS                          0xc8
-
 #define RCVRBIASCALC                    0xc8
 
-#define DFBKPTR                         0xc9
+#define DFPTRS                          0xc8
 
 #define SKEWCALC                        0xc9
 
+#define DFBKPTR                         0xc9
+
 #define DFDBCTL                         0xcb
 #define         DFF_CIO_WR_RDY          0x20
 #define         DFF_CIO_RD_RDY          0x10
@@ -3475,11 +3496,11 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print;
 
 #define DINDEX                          0xe4
 
+#define BRKADDR0                        0xe6
+
 #define BRKADDR1                        0xe6
 #define         BRKDIS                  0x80
 
-#define BRKADDR0                        0xe6
-
 #define ALLONES                         0xe8
 
 #define ALLZEROS                        0xea
@@ -3494,14 +3515,14 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print;
 
 #define STACK                           0xf2
 
-#define CURADDR                         0xf4
-
 #define INTVEC1_ADDR                    0xf4
 
-#define INTVEC2_ADDR                    0xf6
+#define CURADDR                         0xf4
 
 #define LASTADDR                        0xf6
 
+#define INTVEC2_ADDR                    0xf6
+
 #define LONGJMP_ADDR                    0xf8
 
 #define ACCUM_SAVE                      0xfa
@@ -3524,25 +3545,31 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print;
 
 #define COMPLETE_DMA_SCB_HEAD           0x12c
 
-#define QFREEZE_COUNT                   0x12e
+#define COMPLETE_DMA_SCB_TAIL           0x12e
+
+#define COMPLETE_ON_QFREEZE_HEAD                0x130
+
+#define QFREEZE_COUNT                   0x132
 
-#define SAVED_MODE                      0x130
+#define KERNEL_QFREEZE_COUNT            0x134
 
-#define MSG_OUT                         0x131
+#define SAVED_MODE                      0x136
 
-#define DMAPARAMS                       0x132
+#define MSG_OUT                         0x137
+
+#define DMAPARAMS                       0x138
 #define         PRELOADEN               0x80
 #define         WIDEODD                 0x40
 #define         SCSIEN                  0x20
 #define         SDMAEN                  0x10
 #define         SDMAENACK               0x10
-#define         HDMAENACK               0x08
 #define         HDMAEN                  0x08
+#define         HDMAENACK               0x08
 #define         DIRECTION               0x04
 #define         FIFOFLUSH               0x02
 #define         FIFORESET               0x01
 
-#define SEQ_FLAGS                       0x133
+#define SEQ_FLAGS                       0x139
 #define         NOT_IDENTIFIED          0x80
 #define         NO_CDB_SENT             0x40
 #define         TARGET_CMD_IS_TAGGED    0x40
@@ -3553,11 +3580,11 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print;
 #define         SPHASE_PENDING          0x02
 #define         NO_DISCONNECT           0x01
 
-#define SAVED_SCSIID                    0x134
+#define SAVED_SCSIID                    0x13a
 
-#define SAVED_LUN                       0x135
+#define SAVED_LUN                       0x13b
 
-#define LASTPHASE                       0x136
+#define LASTPHASE                       0x13c
 #define         PHASE_MASK              0xe0
 #define         CDI                     0x80
 #define         IOI                     0x40
@@ -3572,18 +3599,18 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print;
 #define         P_DATAOUT_DT            0x20
 #define         P_DATAOUT               0x00
 
-#define QOUTFIFO_ENTRY_VALID_TAG                0x137
+#define QOUTFIFO_ENTRY_VALID_TAG                0x13d
 
-#define SHARED_DATA_ADDR                0x138
+#define KERNEL_TQINPOS                  0x13e
 
-#define QOUTFIFO_NEXT_ADDR              0x13c
+#define TQINPOS                         0x13f
 
-#define KERNEL_TQINPOS                  0x140
+#define SHARED_DATA_ADDR                0x140
 
-#define TQINPOS                         0x141
+#define QOUTFIFO_NEXT_ADDR              0x144
 
-#define ARG_1                           0x142
-#define RETURN_1                        0x142
+#define ARG_1                           0x148
+#define RETURN_1                        0x148
 #define         SEND_MSG                0x80
 #define         SEND_SENSE              0x40
 #define         SEND_REJ                0x20
@@ -3593,12 +3620,12 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print;
 #define         CONT_MSG_LOOP_READ      0x03
 #define         CONT_MSG_LOOP_TARG      0x02
 
-#define ARG_2                           0x143
-#define RETURN_2                        0x143
+#define ARG_2                           0x149
+#define RETURN_2                        0x149
 
-#define LAST_MSG                        0x144
+#define LAST_MSG                        0x14a
 
-#define SCSISEQ_TEMPLATE                0x145
+#define SCSISEQ_TEMPLATE                0x14b
 #define         MANUALCTL               0x40
 #define         ENSELI                  0x20
 #define         ENRSELI                 0x10
@@ -3606,27 +3633,27 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print;
 #define         ENAUTOATNP              0x02
 #define         ALTSTIM                 0x01
 
-#define INITIATOR_TAG                   0x146
+#define INITIATOR_TAG                   0x14c
 
-#define SEQ_FLAGS2                      0x147
+#define SEQ_FLAGS2                      0x14d
 #define         SELECTOUT_QFROZEN       0x04
 #define         TARGET_MSG_PENDING      0x02
 
-#define ALLOCFIFO_SCBPTR                0x148
+#define ALLOCFIFO_SCBPTR                0x14e
 
-#define INT_COALESCING_TIMER            0x14a
+#define INT_COALESCING_TIMER            0x150
 
-#define INT_COALESCING_MAXCMDS          0x14c
+#define INT_COALESCING_MAXCMDS          0x152
 
-#define INT_COALESCING_MINCMDS          0x14d
+#define INT_COALESCING_MINCMDS          0x153
 
-#define CMDS_PENDING                    0x14e
+#define CMDS_PENDING                    0x154
 
-#define INT_COALESCING_CMDCOUNT         0x150
+#define INT_COALESCING_CMDCOUNT         0x156
 
-#define LOCAL_HS_MAILBOX                0x151
+#define LOCAL_HS_MAILBOX                0x157
 
-#define CMDSIZE_TABLE                   0x152
+#define CMDSIZE_TABLE                   0x158
 
 #define SCB_BASE                        0x180
 
@@ -3701,6 +3728,16 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print;
 #define SCB_DISCONNECTED_LISTS          0x1b8
 
 
+#define AHD_TIMER_MAX_US        0x18ffe7
+#define AHD_TIMER_MAX_TICKS     0xffff
+#define AHD_SENSE_BUFSIZE       0x100
+#define BUS_8_BIT       0x00
+#define TARGET_CMD_CMPLT        0xfe
+#define SEEOP_WRAL_ADDR 0x40
+#define AHD_AMPLITUDE_DEF       0x07
+#define AHD_PRECOMP_CUTBACK_37  0x07
+#define AHD_PRECOMP_SHIFT       0x00
+#define AHD_ANNEXCOL_PRECOMP_SLEW       0x04
 #define AHD_TIMER_US_PER_TICK   0x19
 #define SCB_TRANSFER_SIZE_FULL_LUN      0x38
 #define STATUS_QUEUE_FULL       0x28
@@ -3724,28 +3761,18 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print;
 #define B_CURRFIFO_0    0x02
 #define LUNLEN_SINGLE_LEVEL_LUN 0x0f
 #define NVRAM_SCB_OFFSET        0x2c
-#define AHD_TIMER_MAX_US        0x18ffe7
-#define AHD_TIMER_MAX_TICKS     0xffff
 #define STATUS_PKT_SENSE        0xff
 #define CMD_GROUP_CODE_SHIFT    0x05
-#define AHD_SENSE_BUFSIZE       0x100
 #define MAX_OFFSET_PACED_BUG    0x7f
-#define BUS_8_BIT       0x00
 #define STIMESEL_BUG_ADJ        0x08
 #define STIMESEL_MIN    0x18
 #define STIMESEL_SHIFT  0x03
 #define CCSGRAM_MAXSEGS 0x10
 #define INVALID_ADDR    0x80
-#define TARGET_CMD_CMPLT        0xfe
-#define SEEOP_WRAL_ADDR 0x40
 #define SEEOP_ERAL_ADDR 0x80
-#define AHD_AMPLITUDE_DEF       0x07
 #define AHD_SLEWRATE_DEF_REVB   0x08
-#define AHD_PRECOMP_CUTBACK_37  0x07
 #define AHD_PRECOMP_CUTBACK_17  0x04
-#define AHD_PRECOMP_SHIFT       0x00
 #define AHD_PRECOMP_MASK        0x07
-#define AHD_ANNEXCOL_PRECOMP_SLEW       0x04
 #define SRC_MODE_SHIFT  0x00
 #define PKT_OVERRUN_BUFSIZE     0x200
 #define SCB_TRANSFER_SIZE_1BYTE_LUN     0x30
@@ -3761,6 +3788,7 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print;
 
 
 /* Downloaded Constant Definitions */
+#define CACHELINE_MASK  0x07
 #define SCB_TRANSFER_SIZE       0x06
 #define PKT_OVERRUN_BUFOFFSET   0x05
 #define SG_SIZEOF       0x04
@@ -3768,9 +3796,9 @@ ahd_reg_print_t ahd_scb_disconnected_lists_print;
 #define SG_PREFETCH_ALIGN_MASK  0x02
 #define SG_PREFETCH_CNT_LIMIT   0x01
 #define SG_PREFETCH_CNT 0x00
-#define DOWNLOAD_CONST_COUNT    0x07
+#define DOWNLOAD_CONST_COUNT    0x08
 
 
 /* Exported Labels */
-#define LABEL_seq_isr   0x269
-#define LABEL_timer_isr 0x265
+#define LABEL_seq_isr   0x285
+#define LABEL_timer_isr 0x281
diff --git a/drivers/scsi/aic7xxx/aic79xx_reg_print.c_shipped b/drivers/scsi/aic7xxx/aic79xx_reg_print.c_shipped
index 3098a757e3d7..a4137c985376 100644
--- a/drivers/scsi/aic7xxx/aic79xx_reg_print.c_shipped
+++ b/drivers/scsi/aic7xxx/aic79xx_reg_print.c_shipped
@@ -2,8 +2,8 @@
  * DO NOT EDIT - This file is automatically generated
  *               from the following source files:
  *
- * $Id: //depot/aic7xxx/aic7xxx/aic79xx.seq#94 $
- * $Id: //depot/aic7xxx/aic7xxx/aic79xx.reg#70 $
+ * $Id: //depot/aic7xxx/aic7xxx/aic79xx.seq#118 $
+ * $Id: //depot/aic7xxx/aic7xxx/aic79xx.reg#75 $
  */
 
 #include "aic79xx_osm.h"
@@ -172,21 +172,6 @@ ahd_hs_mailbox_print(u_int regvalue, u_int *cur_col, u_int wrap)
             0x0b, regvalue, cur_col, wrap));
 }
 
-static ahd_reg_parse_entry_t CLRSEQINTSTAT_parse_table[] = {
-        { "CLRSEQ_SPLTINT",     0x01, 0x01 },
-        { "CLRSEQ_PCIINT",      0x02, 0x02 },
-        { "CLRSEQ_SCSIINT",     0x04, 0x04 },
-        { "CLRSEQ_SEQINT",      0x08, 0x08 },
-        { "CLRSEQ_SWTMRTO",     0x10, 0x10 }
-};
-
-int
-ahd_clrseqintstat_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
-        return (ahd_print_register(CLRSEQINTSTAT_parse_table, 5, "CLRSEQINTSTAT",
-            0x0c, regvalue, cur_col, wrap));
-}
-
 static ahd_reg_parse_entry_t SEQINTSTAT_parse_table[] = {
         { "SEQ_SPLTINT",        0x01, 0x01 },
         { "SEQ_PCIINT",         0x02, 0x02 },
@@ -202,6 +187,21 @@ ahd_seqintstat_print(u_int regvalue, u_int *cur_col, u_int wrap)
             0x0c, regvalue, cur_col, wrap));
 }
 
+static ahd_reg_parse_entry_t CLRSEQINTSTAT_parse_table[] = {
+        { "CLRSEQ_SPLTINT",     0x01, 0x01 },
+        { "CLRSEQ_PCIINT",      0x02, 0x02 },
+        { "CLRSEQ_SCSIINT",     0x04, 0x04 },
+        { "CLRSEQ_SEQINT",      0x08, 0x08 },
+        { "CLRSEQ_SWTMRTO",     0x10, 0x10 }
+};
+
+int
+ahd_clrseqintstat_print(u_int regvalue, u_int *cur_col, u_int wrap)
+{
+        return (ahd_print_register(CLRSEQINTSTAT_parse_table, 5, "CLRSEQINTSTAT",
+            0x0c, regvalue, cur_col, wrap));
+}
+
 int
 ahd_swtimer_print(u_int regvalue, u_int *cur_col, u_int wrap)
 {
@@ -670,16 +670,16 @@ ahd_sxfrctl0_print(u_int regvalue, u_int *cur_col, u_int wrap)
 }
 
 int
-ahd_businitid_print(u_int regvalue, u_int *cur_col, u_int wrap)
+ahd_dlcount_print(u_int regvalue, u_int *cur_col, u_int wrap)
 {
-        return (ahd_print_register(NULL, 0, "BUSINITID",
+        return (ahd_print_register(NULL, 0, "DLCOUNT",
             0x3c, regvalue, cur_col, wrap));
 }
 
 int
-ahd_dlcount_print(u_int regvalue, u_int *cur_col, u_int wrap)
+ahd_businitid_print(u_int regvalue, u_int *cur_col, u_int wrap)
 {
-        return (ahd_print_register(NULL, 0, "DLCOUNT",
+        return (ahd_print_register(NULL, 0, "BUSINITID",
             0x3c, regvalue, cur_col, wrap));
 }
 
@@ -859,21 +859,6 @@ ahd_selid_print(u_int regvalue, u_int *cur_col, u_int wrap)
             0x49, regvalue, cur_col, wrap));
 }
 
-static ahd_reg_parse_entry_t SBLKCTL_parse_table[] = {
-        { "SELWIDE",            0x02, 0x02 },
-        { "ENAB20",             0x04, 0x04 },
-        { "ENAB40",             0x08, 0x08 },
-        { "DIAGLEDON",          0x40, 0x40 },
-        { "DIAGLEDEN",          0x80, 0x80 }
-};
-
-int
-ahd_sblkctl_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
-        return (ahd_print_register(SBLKCTL_parse_table, 5, "SBLKCTL",
-            0x4a, regvalue, cur_col, wrap));
-}
-
 static ahd_reg_parse_entry_t OPTIONMODE_parse_table[] = {
         { "AUTO_MSGOUT_DE",     0x02, 0x02 },
         { "ENDGFORMCHK",        0x04, 0x04 },
@@ -891,22 +876,19 @@ ahd_optionmode_print(u_int regvalue, u_int *cur_col, u_int wrap)
             0x4a, regvalue, cur_col, wrap));
 }
 
-static ahd_reg_parse_entry_t SSTAT0_parse_table[] = {
-        { "ARBDO",              0x01, 0x01 },
-        { "SPIORDY",            0x02, 0x02 },
-        { "OVERRUN",            0x04, 0x04 },
-        { "IOERR",              0x08, 0x08 },
-        { "SELINGO",            0x10, 0x10 },
-        { "SELDI",              0x20, 0x20 },
-        { "SELDO",              0x40, 0x40 },
-        { "TARGET",             0x80, 0x80 }
+static ahd_reg_parse_entry_t SBLKCTL_parse_table[] = {
+        { "SELWIDE",            0x02, 0x02 },
+        { "ENAB20",             0x04, 0x04 },
+        { "ENAB40",             0x08, 0x08 },
+        { "DIAGLEDON",          0x40, 0x40 },
+        { "DIAGLEDEN",          0x80, 0x80 }
 };
 
 int
-ahd_sstat0_print(u_int regvalue, u_int *cur_col, u_int wrap)
+ahd_sblkctl_print(u_int regvalue, u_int *cur_col, u_int wrap)
 {
-        return (ahd_print_register(SSTAT0_parse_table, 8, "SSTAT0",
-            0x4b, regvalue, cur_col, wrap));
+        return (ahd_print_register(SBLKCTL_parse_table, 5, "SBLKCTL",
+            0x4a, regvalue, cur_col, wrap));
 }
 
 static ahd_reg_parse_entry_t CLRSINT0_parse_table[] = {
@@ -926,6 +908,24 @@ ahd_clrsint0_print(u_int regvalue, u_int *cur_col, u_int wrap)
             0x4b, regvalue, cur_col, wrap));
 }
 
+static ahd_reg_parse_entry_t SSTAT0_parse_table[] = {
+        { "ARBDO",              0x01, 0x01 },
+        { "SPIORDY",            0x02, 0x02 },
+        { "OVERRUN",            0x04, 0x04 },
+        { "IOERR",              0x08, 0x08 },
+        { "SELINGO",            0x10, 0x10 },
+        { "SELDI",              0x20, 0x20 },
+        { "SELDO",              0x40, 0x40 },
+        { "TARGET",             0x80, 0x80 }
+};
+
+int
+ahd_sstat0_print(u_int regvalue, u_int *cur_col, u_int wrap)
+{
+        return (ahd_print_register(SSTAT0_parse_table, 8, "SSTAT0",
+            0x4b, regvalue, cur_col, wrap));
+}
+
 static ahd_reg_parse_entry_t SIMODE0_parse_table[] = {
         { "ENARBDO",            0x01, 0x01 },
         { "ENSPIORDY",          0x02, 0x02 },
@@ -998,30 +998,30 @@ ahd_sstat2_print(u_int regvalue, u_int *cur_col, u_int wrap)
             0x4d, regvalue, cur_col, wrap));
 }
 
-static ahd_reg_parse_entry_t CLRSINT2_parse_table[] = {
-        { "CLRDMADONE",         0x01, 0x01 },
-        { "CLRSDONE",           0x02, 0x02 },
-        { "CLRWIDE_RES",        0x04, 0x04 },
-        { "CLRNONPACKREQ",      0x20, 0x20 }
+static ahd_reg_parse_entry_t SIMODE2_parse_table[] = {
+        { "ENDMADONE",          0x01, 0x01 },
+        { "ENSDONE",            0x02, 0x02 },
+        { "ENWIDE_RES",         0x04, 0x04 }
 };
 
 int
-ahd_clrsint2_print(u_int regvalue, u_int *cur_col, u_int wrap)
+ahd_simode2_print(u_int regvalue, u_int *cur_col, u_int wrap)
 {
-        return (ahd_print_register(CLRSINT2_parse_table, 4, "CLRSINT2",
+        return (ahd_print_register(SIMODE2_parse_table, 3, "SIMODE2",
             0x4d, regvalue, cur_col, wrap));
 }
 
-static ahd_reg_parse_entry_t SIMODE2_parse_table[] = {
-        { "ENDMADONE",          0x01, 0x01 },
-        { "ENSDONE",            0x02, 0x02 },
-        { "ENWIDE_RES",         0x04, 0x04 }
+static ahd_reg_parse_entry_t CLRSINT2_parse_table[] = {
+        { "CLRDMADONE",         0x01, 0x01 },
+        { "CLRSDONE",           0x02, 0x02 },
+        { "CLRWIDE_RES",        0x04, 0x04 },
+        { "CLRNONPACKREQ",      0x20, 0x20 }
 };
 
 int
-ahd_simode2_print(u_int regvalue, u_int *cur_col, u_int wrap)
+ahd_clrsint2_print(u_int regvalue, u_int *cur_col, u_int wrap)
 {
-        return (ahd_print_register(SIMODE2_parse_table, 3, "SIMODE2",
+        return (ahd_print_register(CLRSINT2_parse_table, 4, "CLRSINT2",
             0x4d, regvalue, cur_col, wrap));
 }
 
@@ -1220,21 +1220,6 @@ ahd_clrsint3_print(u_int regvalue, u_int *cur_col, u_int wrap)
             0x53, regvalue, cur_col, wrap));
 }
 
-static ahd_reg_parse_entry_t LQOMODE0_parse_table[] = {
-        { "ENLQOTCRC",          0x01, 0x01 },
-        { "ENLQOATNPKT",        0x02, 0x02 },
-        { "ENLQOATNLQ",         0x04, 0x04 },
-        { "ENLQOSTOPT2",        0x08, 0x08 },
-        { "ENLQOTARGSCBPERR",   0x10, 0x10 }
-};
-
-int
-ahd_lqomode0_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
-        return (ahd_print_register(LQOMODE0_parse_table, 5, "LQOMODE0",
-            0x54, regvalue, cur_col, wrap));
-}
-
 static ahd_reg_parse_entry_t LQOSTAT0_parse_table[] = {
         { "LQOTCRC",            0x01, 0x01 },
         { "LQOATNPKT",          0x02, 0x02 },
@@ -1265,6 +1250,36 @@ ahd_clrlqoint0_print(u_int regvalue, u_int *cur_col, u_int wrap)
             0x54, regvalue, cur_col, wrap));
 }
 
+static ahd_reg_parse_entry_t LQOMODE0_parse_table[] = {
+        { "ENLQOTCRC",          0x01, 0x01 },
+        { "ENLQOATNPKT",        0x02, 0x02 },
+        { "ENLQOATNLQ",         0x04, 0x04 },
+        { "ENLQOSTOPT2",        0x08, 0x08 },
+        { "ENLQOTARGSCBPERR",   0x10, 0x10 }
+};
+
+int
+ahd_lqomode0_print(u_int regvalue, u_int *cur_col, u_int wrap)
+{
+        return (ahd_print_register(LQOMODE0_parse_table, 5, "LQOMODE0",
+            0x54, regvalue, cur_col, wrap));
+}
+
+static ahd_reg_parse_entry_t LQOMODE1_parse_table[] = {
+        { "ENLQOPHACHGINPKT",   0x01, 0x01 },
+        { "ENLQOBUSFREE",       0x02, 0x02 },
+        { "ENLQOBADQAS",        0x04, 0x04 },
+        { "ENLQOSTOPI2",        0x08, 0x08 },
+        { "ENLQOINITSCBPERR",   0x10, 0x10 }
+};
+
+int
+ahd_lqomode1_print(u_int regvalue, u_int *cur_col, u_int wrap)
+{
+        return (ahd_print_register(LQOMODE1_parse_table, 5, "LQOMODE1",
+            0x55, regvalue, cur_col, wrap));
+}
+
 static ahd_reg_parse_entry_t LQOSTAT1_parse_table[] = {
         { "LQOPHACHGINPKT",     0x01, 0x01 },
         { "LQOBUSFREE",         0x02, 0x02 },
@@ -1295,21 +1310,6 @@ ahd_clrlqoint1_print(u_int regvalue, u_int *cur_col, u_int wrap)
             0x55, regvalue, cur_col, wrap));
 }
 
-static ahd_reg_parse_entry_t LQOMODE1_parse_table[] = {
-        { "ENLQOPHACHGINPKT",   0x01, 0x01 },
-        { "ENLQOBUSFREE",       0x02, 0x02 },
-        { "ENLQOBADQAS",        0x04, 0x04 },
-        { "ENLQOSTOPI2",        0x08, 0x08 },
-        { "ENLQOINITSCBPERR",   0x10, 0x10 }
-};
-
-int
-ahd_lqomode1_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
-        return (ahd_print_register(LQOMODE1_parse_table, 5, "LQOMODE1",
-            0x55, regvalue, cur_col, wrap));
-}
-
 static ahd_reg_parse_entry_t LQOSTAT2_parse_table[] = {
         { "LQOSTOP0",           0x01, 0x01 },
         { "LQOPHACHGOUTPKT",    0x02, 0x02 },
@@ -1594,6 +1594,13 @@ ahd_annexcol_print(u_int regvalue, u_int *cur_col, u_int wrap)
             0x65, regvalue, cur_col, wrap));
 }
 
+int
+ahd_annexdat_print(u_int regvalue, u_int *cur_col, u_int wrap)
+{
+        return (ahd_print_register(NULL, 0, "ANNEXDAT",
+            0x66, regvalue, cur_col, wrap));
+}
+
 static ahd_reg_parse_entry_t SCSCHKN_parse_table[] = {
         { "LSTSGCLRDIS",        0x01, 0x01 },
         { "SHVALIDSTDIS",       0x02, 0x02 },
@@ -1612,13 +1619,6 @@ ahd_scschkn_print(u_int regvalue, u_int *cur_col, u_int wrap)
 }
 
 int
-ahd_annexdat_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
-        return (ahd_print_register(NULL, 0, "ANNEXDAT",
-            0x66, regvalue, cur_col, wrap));
-}
-
-int
 ahd_iownid_print(u_int regvalue, u_int *cur_col, u_int wrap)
 {
         return (ahd_print_register(NULL, 0, "IOWNID",
@@ -1728,16 +1728,16 @@ ahd_pll400ctl1_print(u_int regvalue, u_int *cur_col, u_int wrap)
 }
 
 int
-ahd_pll400cnt0_print(u_int regvalue, u_int *cur_col, u_int wrap)
+ahd_unfairness_print(u_int regvalue, u_int *cur_col, u_int wrap)
 {
-        return (ahd_print_register(NULL, 0, "PLL400CNT0",
+        return (ahd_print_register(NULL, 0, "UNFAIRNESS",
             0x6e, regvalue, cur_col, wrap));
 }
 
 int
-ahd_unfairness_print(u_int regvalue, u_int *cur_col, u_int wrap)
+ahd_pll400cnt0_print(u_int regvalue, u_int *cur_col, u_int wrap)
 {
-        return (ahd_print_register(NULL, 0, "UNFAIRNESS",
+        return (ahd_print_register(NULL, 0, "PLL400CNT0",
             0x6e, regvalue, cur_col, wrap));
 }
 
@@ -1788,30 +1788,30 @@ ahd_hodmaen_print(u_int regvalue, u_int *cur_col, u_int wrap)
 }
 
 int
-ahd_sghaddr_print(u_int regvalue, u_int *cur_col, u_int wrap)
+ahd_scbhaddr_print(u_int regvalue, u_int *cur_col, u_int wrap)
 {
-        return (ahd_print_register(NULL, 0, "SGHADDR",
+        return (ahd_print_register(NULL, 0, "SCBHADDR",
             0x7c, regvalue, cur_col, wrap));
 }
 
 int
-ahd_scbhaddr_print(u_int regvalue, u_int *cur_col, u_int wrap)
+ahd_sghaddr_print(u_int regvalue, u_int *cur_col, u_int wrap)
 {
-        return (ahd_print_register(NULL, 0, "SCBHADDR",
+        return (ahd_print_register(NULL, 0, "SGHADDR",
             0x7c, regvalue, cur_col, wrap));
 }
 
 int
-ahd_sghcnt_print(u_int regvalue, u_int *cur_col, u_int wrap)
+ahd_scbhcnt_print(u_int regvalue, u_int *cur_col, u_int wrap)
 {
-        return (ahd_print_register(NULL, 0, "SGHCNT",
+        return (ahd_print_register(NULL, 0, "SCBHCNT",
             0x84, regvalue, cur_col, wrap));
 }
 
 int
-ahd_scbhcnt_print(u_int regvalue, u_int *cur_col, u_int wrap)
+ahd_sghcnt_print(u_int regvalue, u_int *cur_col, u_int wrap)
 {
-        return (ahd_print_register(NULL, 0, "SCBHCNT",
+        return (ahd_print_register(NULL, 0, "SGHCNT",
             0x84, regvalue, cur_col, wrap));
 }
 
@@ -1950,25 +1950,25 @@ ahd_nsenable_print(u_int regvalue, u_int *cur_col, u_int wrap)
             0x91, regvalue, cur_col, wrap));
 }
 
-static ahd_reg_parse_entry_t DCHRXMSG1_parse_table[] = {
+static ahd_reg_parse_entry_t CMCRXMSG1_parse_table[] = {
         { "CBNUM",              0xff, 0xff }
 };
 
 int
-ahd_dchrxmsg1_print(u_int regvalue, u_int *cur_col, u_int wrap)
+ahd_cmcrxmsg1_print(u_int regvalue, u_int *cur_col, u_int wrap)
 {
-        return (ahd_print_register(DCHRXMSG1_parse_table, 1, "DCHRXMSG1",
+        return (ahd_print_register(CMCRXMSG1_parse_table, 1, "CMCRXMSG1",
             0x91, regvalue, cur_col, wrap));
 }
 
-static ahd_reg_parse_entry_t CMCRXMSG1_parse_table[] = {
+static ahd_reg_parse_entry_t DCHRXMSG1_parse_table[] = {
         { "CBNUM",              0xff, 0xff }
 };
 
 int
-ahd_cmcrxmsg1_print(u_int regvalue, u_int *cur_col, u_int wrap)
+ahd_dchrxmsg1_print(u_int regvalue, u_int *cur_col, u_int wrap)
 {
-        return (ahd_print_register(CMCRXMSG1_parse_table, 1, "CMCRXMSG1",
+        return (ahd_print_register(DCHRXMSG1_parse_table, 1, "DCHRXMSG1",
             0x91, regvalue, cur_col, wrap));
 }
 
@@ -1983,17 +1983,6 @@ ahd_dchrxmsg2_print(u_int regvalue, u_int *cur_col, u_int wrap)
             0x92, regvalue, cur_col, wrap));
 }
 
-static ahd_reg_parse_entry_t OVLYRXMSG2_parse_table[] = {
-        { "MINDEX",             0xff, 0xff }
-};
-
-int
-ahd_ovlyrxmsg2_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
-        return (ahd_print_register(OVLYRXMSG2_parse_table, 1, "OVLYRXMSG2",
-            0x92, regvalue, cur_col, wrap));
-}
-
 static ahd_reg_parse_entry_t CMCRXMSG2_parse_table[] = {
         { "MINDEX",             0xff, 0xff }
 };
@@ -2012,6 +2001,17 @@ ahd_ost_print(u_int regvalue, u_int *cur_col, u_int wrap)
             0x92, regvalue, cur_col, wrap));
 }
 
+static ahd_reg_parse_entry_t OVLYRXMSG2_parse_table[] = {
+        { "MINDEX",             0xff, 0xff }
+};
+
+int
+ahd_ovlyrxmsg2_print(u_int regvalue, u_int *cur_col, u_int wrap)
+{
+        return (ahd_print_register(OVLYRXMSG2_parse_table, 1, "OVLYRXMSG2",
+            0x92, regvalue, cur_col, wrap));
+}
+
 static ahd_reg_parse_entry_t DCHRXMSG3_parse_table[] = {
         { "MCLASS",             0x0f, 0x0f }
 };
@@ -2023,6 +2023,17 @@ ahd_dchrxmsg3_print(u_int regvalue, u_int *cur_col, u_int wrap)
             0x93, regvalue, cur_col, wrap));
 }
 
+static ahd_reg_parse_entry_t OVLYRXMSG3_parse_table[] = {
+        { "MCLASS",             0x0f, 0x0f }
+};
+
+int
+ahd_ovlyrxmsg3_print(u_int regvalue, u_int *cur_col, u_int wrap)
+{
+        return (ahd_print_register(OVLYRXMSG3_parse_table, 1, "OVLYRXMSG3",
+            0x93, regvalue, cur_col, wrap));
+}
+
 static ahd_reg_parse_entry_t CMCRXMSG3_parse_table[] = {
         { "MCLASS",             0x0f, 0x0f }
 };
@@ -2051,17 +2062,6 @@ ahd_pcixctl_print(u_int regvalue, u_int *cur_col, u_int wrap)
             0x93, regvalue, cur_col, wrap));
 }
 
-static ahd_reg_parse_entry_t OVLYRXMSG3_parse_table[] = {
-        { "MCLASS",             0x0f, 0x0f }
-};
-
-int
-ahd_ovlyrxmsg3_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
-        return (ahd_print_register(OVLYRXMSG3_parse_table, 1, "OVLYRXMSG3",
-            0x93, regvalue, cur_col, wrap));
-}
-
 int
 ahd_ovlyseqbcnt_print(u_int regvalue, u_int *cur_col, u_int wrap)
 {
@@ -2070,16 +2070,16 @@ ahd_ovlyseqbcnt_print(u_int regvalue, u_int *cur_col, u_int wrap)
 }
 
 int
-ahd_cmcseqbcnt_print(u_int regvalue, u_int *cur_col, u_int wrap)
+ahd_dchseqbcnt_print(u_int regvalue, u_int *cur_col, u_int wrap)
 {
-        return (ahd_print_register(NULL, 0, "CMCSEQBCNT",
+        return (ahd_print_register(NULL, 0, "DCHSEQBCNT",
             0x94, regvalue, cur_col, wrap));
 }
 
 int
-ahd_dchseqbcnt_print(u_int regvalue, u_int *cur_col, u_int wrap)
+ahd_cmcseqbcnt_print(u_int regvalue, u_int *cur_col, u_int wrap)
 {
-        return (ahd_print_register(NULL, 0, "DCHSEQBCNT",
+        return (ahd_print_register(NULL, 0, "CMCSEQBCNT",
             0x94, regvalue, cur_col, wrap));
 }
 
@@ -2101,7 +2101,7 @@ ahd_cmcspltstat0_print(u_int regvalue, u_int *cur_col, u_int wrap)
             0x96, regvalue, cur_col, wrap));
 }
 
-static ahd_reg_parse_entry_t OVLYSPLTSTAT0_parse_table[] = {
+static ahd_reg_parse_entry_t DCHSPLTSTAT0_parse_table[] = {
         { "RXSPLTRSP",          0x01, 0x01 },
         { "RXSCEMSG",           0x02, 0x02 },
         { "RXOVRUN",            0x04, 0x04 },
@@ -2113,13 +2113,13 @@ static ahd_reg_parse_entry_t OVLYSPLTSTAT0_parse_table[] = {
 };
 
 int
-ahd_ovlyspltstat0_print(u_int regvalue, u_int *cur_col, u_int wrap)
+ahd_dchspltstat0_print(u_int regvalue, u_int *cur_col, u_int wrap)
 {
-        return (ahd_print_register(OVLYSPLTSTAT0_parse_table, 8, "OVLYSPLTSTAT0",
+        return (ahd_print_register(DCHSPLTSTAT0_parse_table, 8, "DCHSPLTSTAT0",
             0x96, regvalue, cur_col, wrap));
 }
 
-static ahd_reg_parse_entry_t DCHSPLTSTAT0_parse_table[] = {
+static ahd_reg_parse_entry_t OVLYSPLTSTAT0_parse_table[] = {
         { "RXSPLTRSP",          0x01, 0x01 },
         { "RXSCEMSG",           0x02, 0x02 },
         { "RXOVRUN",            0x04, 0x04 },
@@ -2131,42 +2131,42 @@ static ahd_reg_parse_entry_t DCHSPLTSTAT0_parse_table[] = {
 };
 
 int
-ahd_dchspltstat0_print(u_int regvalue, u_int *cur_col, u_int wrap)
+ahd_ovlyspltstat0_print(u_int regvalue, u_int *cur_col, u_int wrap)
 {
-        return (ahd_print_register(DCHSPLTSTAT0_parse_table, 8, "DCHSPLTSTAT0",
+        return (ahd_print_register(OVLYSPLTSTAT0_parse_table, 8, "OVLYSPLTSTAT0",
             0x96, regvalue, cur_col, wrap));
 }
 
-static ahd_reg_parse_entry_t DCHSPLTSTAT1_parse_table[] = {
+static ahd_reg_parse_entry_t CMCSPLTSTAT1_parse_table[] = {
         { "RXDATABUCKET",       0x01, 0x01 }
 };
 
 int
-ahd_dchspltstat1_print(u_int regvalue, u_int *cur_col, u_int wrap)
+ahd_cmcspltstat1_print(u_int regvalue, u_int *cur_col, u_int wrap)
 {
-        return (ahd_print_register(DCHSPLTSTAT1_parse_table, 1, "DCHSPLTSTAT1",
+        return (ahd_print_register(CMCSPLTSTAT1_parse_table, 1, "CMCSPLTSTAT1",
             0x97, regvalue, cur_col, wrap));
 }
 
-static ahd_reg_parse_entry_t CMCSPLTSTAT1_parse_table[] = {
+static ahd_reg_parse_entry_t OVLYSPLTSTAT1_parse_table[] = {
         { "RXDATABUCKET",       0x01, 0x01 }
 };
 
 int
-ahd_cmcspltstat1_print(u_int regvalue, u_int *cur_col, u_int wrap)
+ahd_ovlyspltstat1_print(u_int regvalue, u_int *cur_col, u_int wrap)
 {
-        return (ahd_print_register(CMCSPLTSTAT1_parse_table, 1, "CMCSPLTSTAT1",
+        return (ahd_print_register(OVLYSPLTSTAT1_parse_table, 1, "OVLYSPLTSTAT1",
             0x97, regvalue, cur_col, wrap));
 }
 
-static ahd_reg_parse_entry_t OVLYSPLTSTAT1_parse_table[] = {
+static ahd_reg_parse_entry_t DCHSPLTSTAT1_parse_table[] = {
         { "RXDATABUCKET",       0x01, 0x01 }
 };
 
 int
-ahd_ovlyspltstat1_print(u_int regvalue, u_int *cur_col, u_int wrap)
+ahd_dchspltstat1_print(u_int regvalue, u_int *cur_col, u_int wrap)
 {
-        return (ahd_print_register(OVLYSPLTSTAT1_parse_table, 1, "OVLYSPLTSTAT1",
+        return (ahd_print_register(DCHSPLTSTAT1_parse_table, 1, "DCHSPLTSTAT1",
             0x97, regvalue, cur_col, wrap));
 }
 
@@ -2320,26 +2320,26 @@ ahd_sgspltstat0_print(u_int regvalue, u_int *cur_col, u_int wrap)
             0x9e, regvalue, cur_col, wrap));
 }
 
-static ahd_reg_parse_entry_t SFUNCT_parse_table[] = {
-        { "TEST_NUM",           0x0f, 0x0f },
-        { "TEST_GROUP",         0xf0, 0xf0 }
+static ahd_reg_parse_entry_t SGSPLTSTAT1_parse_table[] = {
+        { "RXDATABUCKET",       0x01, 0x01 }
 };
 
 int
-ahd_sfunct_print(u_int regvalue, u_int *cur_col, u_int wrap)
+ahd_sgspltstat1_print(u_int regvalue, u_int *cur_col, u_int wrap)
 {
-        return (ahd_print_register(SFUNCT_parse_table, 2, "SFUNCT",
+        return (ahd_print_register(SGSPLTSTAT1_parse_table, 1, "SGSPLTSTAT1",
             0x9f, regvalue, cur_col, wrap));
 }
 
-static ahd_reg_parse_entry_t SGSPLTSTAT1_parse_table[] = {
-        { "RXDATABUCKET",       0x01, 0x01 }
+static ahd_reg_parse_entry_t SFUNCT_parse_table[] = {
+        { "TEST_NUM",           0x0f, 0x0f },
+        { "TEST_GROUP",         0xf0, 0xf0 }
 };
 
 int
-ahd_sgspltstat1_print(u_int regvalue, u_int *cur_col, u_int wrap)
+ahd_sfunct_print(u_int regvalue, u_int *cur_col, u_int wrap)
 {
-        return (ahd_print_register(SGSPLTSTAT1_parse_table, 1, "SGSPLTSTAT1",
+        return (ahd_print_register(SFUNCT_parse_table, 2, "SFUNCT",
             0x9f, regvalue, cur_col, wrap));
 }
 
@@ -2537,16 +2537,16 @@ ahd_ccsgaddr_print(u_int regvalue, u_int *cur_col, u_int wrap)
 }
 
 int
-ahd_ccscbaddr_print(u_int regvalue, u_int *cur_col, u_int wrap)
+ahd_ccscbadr_bk_print(u_int regvalue, u_int *cur_col, u_int wrap)
 {
-        return (ahd_print_register(NULL, 0, "CCSCBADDR",
+        return (ahd_print_register(NULL, 0, "CCSCBADR_BK",
             0xac, regvalue, cur_col, wrap));
 }
 
 int
-ahd_ccscbadr_bk_print(u_int regvalue, u_int *cur_col, u_int wrap)
+ahd_ccscbaddr_print(u_int regvalue, u_int *cur_col, u_int wrap)
 {
-        return (ahd_print_register(NULL, 0, "CCSCBADR_BK",
+        return (ahd_print_register(NULL, 0, "CCSCBADDR",
             0xac, regvalue, cur_col, wrap));
 }
 
@@ -2566,22 +2566,6 @@ ahd_cmc_rambist_print(u_int regvalue, u_int *cur_col, u_int wrap)
             0xad, regvalue, cur_col, wrap));
 }
 
-static ahd_reg_parse_entry_t CCSGCTL_parse_table[] = {
-        { "CCSGRESET",          0x01, 0x01 },
-        { "SG_FETCH_REQ",       0x02, 0x02 },
-        { "CCSGENACK",          0x08, 0x08 },
-        { "SG_CACHE_AVAIL",     0x10, 0x10 },
-        { "CCSGDONE",           0x80, 0x80 },
-        { "CCSGEN",             0x0c, 0x0c }
-};
-
-int
-ahd_ccsgctl_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
-        return (ahd_print_register(CCSGCTL_parse_table, 6, "CCSGCTL",
-            0xad, regvalue, cur_col, wrap));
-}
-
 static ahd_reg_parse_entry_t CCSCBCTL_parse_table[] = {
         { "CCSCBRESET",         0x01, 0x01 },
         { "CCSCBDIR",           0x04, 0x04 },
@@ -2598,6 +2582,22 @@ ahd_ccscbctl_print(u_int regvalue, u_int *cur_col, u_int wrap)
             0xad, regvalue, cur_col, wrap));
 }
 
+static ahd_reg_parse_entry_t CCSGCTL_parse_table[] = {
+        { "CCSGRESET",          0x01, 0x01 },
+        { "SG_FETCH_REQ",       0x02, 0x02 },
+        { "CCSGENACK",          0x08, 0x08 },
+        { "SG_CACHE_AVAIL",     0x10, 0x10 },
+        { "CCSGDONE",           0x80, 0x80 },
+        { "CCSGEN",             0x0c, 0x0c }
+};
+
+int
+ahd_ccsgctl_print(u_int regvalue, u_int *cur_col, u_int wrap)
+{
+        return (ahd_print_register(CCSGCTL_parse_table, 6, "CCSGCTL",
+            0xad, regvalue, cur_col, wrap));
+}
+
 int
 ahd_ccsgram_print(u_int regvalue, u_int *cur_col, u_int wrap)
 {
@@ -2841,30 +2841,30 @@ ahd_wrtbiascalc_print(u_int regvalue, u_int *cur_col, u_int wrap)
 }
 
 int
-ahd_dfptrs_print(u_int regvalue, u_int *cur_col, u_int wrap)
+ahd_rcvrbiascalc_print(u_int regvalue, u_int *cur_col, u_int wrap)
 {
-        return (ahd_print_register(NULL, 0, "DFPTRS",
+        return (ahd_print_register(NULL, 0, "RCVRBIASCALC",
             0xc8, regvalue, cur_col, wrap));
 }
 
 int
-ahd_rcvrbiascalc_print(u_int regvalue, u_int *cur_col, u_int wrap)
+ahd_dfptrs_print(u_int regvalue, u_int *cur_col, u_int wrap)
 {
-        return (ahd_print_register(NULL, 0, "RCVRBIASCALC",
+        return (ahd_print_register(NULL, 0, "DFPTRS",
             0xc8, regvalue, cur_col, wrap));
 }
 
 int
-ahd_dfbkptr_print(u_int regvalue, u_int *cur_col, u_int wrap)
+ahd_skewcalc_print(u_int regvalue, u_int *cur_col, u_int wrap)
 {
-        return (ahd_print_register(NULL, 0, "DFBKPTR",
+        return (ahd_print_register(NULL, 0, "SKEWCALC",
             0xc9, regvalue, cur_col, wrap));
 }
 
 int
-ahd_skewcalc_print(u_int regvalue, u_int *cur_col, u_int wrap)
+ahd_dfbkptr_print(u_int regvalue, u_int *cur_col, u_int wrap)
 {
-        return (ahd_print_register(NULL, 0, "SKEWCALC",
+        return (ahd_print_register(NULL, 0, "DFBKPTR",
             0xc9, regvalue, cur_col, wrap));
 }
 
@@ -3001,6 +3001,13 @@ ahd_dindex_print(u_int regvalue, u_int *cur_col, u_int wrap)
             0xe4, regvalue, cur_col, wrap));
 }
 
+int
+ahd_brkaddr0_print(u_int regvalue, u_int *cur_col, u_int wrap)
+{
+        return (ahd_print_register(NULL, 0, "BRKADDR0",
+            0xe6, regvalue, cur_col, wrap));
+}
+
 static ahd_reg_parse_entry_t BRKADDR1_parse_table[] = {
         { "BRKDIS",             0x80, 0x80 }
 };
@@ -3013,13 +3020,6 @@ ahd_brkaddr1_print(u_int regvalue, u_int *cur_col, u_int wrap)
 }
 
 int
-ahd_brkaddr0_print(u_int regvalue, u_int *cur_col, u_int wrap)
-{
-        return (ahd_print_register(NULL, 0, "BRKADDR0",
-            0xe6, regvalue, cur_col, wrap));
-}
-
-int
 ahd_allones_print(u_int regvalue, u_int *cur_col, u_int wrap)
 {
         return (ahd_print_register(NULL, 0, "ALLONES",
@@ -3069,30 +3069,30 @@ ahd_stack_print(u_int regvalue, u_int *cur_col, u_int wrap)
 }
 
 int
-ahd_curaddr_print(u_int regvalue, u_int *cur_col, u_int wrap)
+ahd_intvec1_addr_print(u_int regvalue, u_int *cur_col, u_int wrap)
 {
-        return (ahd_print_register(NULL, 0, "CURADDR",
+        return (ahd_print_register(NULL, 0, "INTVEC1_ADDR",
             0xf4, regvalue, cur_col, wrap));
 }
 
 int
-ahd_intvec1_addr_print(u_int regvalue, u_int *cur_col, u_int wrap)
+ahd_curaddr_print(u_int regvalue, u_int *cur_col, u_int wrap)
 {
-        return (ahd_print_register(NULL, 0, "INTVEC1_ADDR",
+        return (ahd_print_register(NULL, 0, "CURADDR",
             0xf4, regvalue, cur_col, wrap));
 }
 
 int
-ahd_intvec2_addr_print(u_int regvalue, u_int *cur_col, u_int wrap)
+ahd_lastaddr_print(u_int regvalue, u_int *cur_col, u_int wrap)
 {
-        return (ahd_print_register(NULL, 0, "INTVEC2_ADDR",
+        return (ahd_print_register(NULL, 0, "LASTADDR",
             0xf6, regvalue, cur_col, wrap));
 }
 
 int
-ahd_lastaddr_print(u_int regvalue, u_int *cur_col, u_int wrap)
+ahd_intvec2_addr_print(u_int regvalue, u_int *cur_col, u_int wrap)
 {
-        return (ahd_print_register(NULL, 0, "LASTADDR",
+        return (ahd_print_register(NULL, 0, "INTVEC2_ADDR",
             0xf6, regvalue, cur_col, wrap));
 }
 
@@ -3174,24 +3174,45 @@ ahd_complete_dma_scb_head_print(u_int regvalue, u_int *cur_col, u_int wrap)
 }
 
 int
+ahd_complete_dma_scb_tail_print(u_int regvalue, u_int *cur_col, u_int wrap)
+{
+        return (ahd_print_register(NULL, 0, "COMPLETE_DMA_SCB_TAIL",
+            0x12e, regvalue, cur_col, wrap));
+}
+
+int
+ahd_complete_on_qfreeze_head_print(u_int regvalue, u_int *cur_col, u_int wrap)
+{
+        return (ahd_print_register(NULL, 0, "COMPLETE_ON_QFREEZE_HEAD",
+            0x130, regvalue, cur_col, wrap));
+}
+
+int
 ahd_qfreeze_count_print(u_int regvalue, u_int *cur_col, u_int wrap)
 {
         return (ahd_print_register(NULL, 0, "QFREEZE_COUNT",
-            0x12e, regvalue, cur_col, wrap));
+            0x132, regvalue, cur_col, wrap));
+}
+
+int
+ahd_kernel_qfreeze_count_print(u_int regvalue, u_int *cur_col, u_int wrap)
+{
+        return (ahd_print_register(NULL, 0, "KERNEL_QFREEZE_COUNT",
+            0x134, regvalue, cur_col, wrap));
 }
 
 int
 ahd_saved_mode_print(u_int regvalue, u_int *cur_col, u_int wrap)
 {
         return (ahd_print_register(NULL, 0, "SAVED_MODE",
-            0x130, regvalue, cur_col, wrap));
+            0x136, regvalue, cur_col, wrap));
 }
 
 int
 ahd_msg_out_print(u_int regvalue, u_int *cur_col, u_int wrap)
 {
         return (ahd_print_register(NULL, 0, "MSG_OUT",
-            0x131, regvalue, cur_col, wrap));
+            0x137, regvalue, cur_col, wrap));
 }
 
 static ahd_reg_parse_entry_t DMAPARAMS_parse_table[] = {
@@ -3211,7 +3232,7 @@ int
 ahd_dmaparams_print(u_int regvalue, u_int *cur_col, u_int wrap)
 {
         return (ahd_print_register(DMAPARAMS_parse_table, 10, "DMAPARAMS",
-            0x132, regvalue, cur_col, wrap));
+            0x138, regvalue, cur_col, wrap));
 }
 
 static ahd_reg_parse_entry_t SEQ_FLAGS_parse_table[] = {
@@ -3230,21 +3251,21 @@ int
 ahd_seq_flags_print(u_int regvalue, u_int *cur_col, u_int wrap)
 {
         return (ahd_print_register(SEQ_FLAGS_parse_table, 9, "SEQ_FLAGS",
-            0x133, regvalue, cur_col, wrap));
+            0x139, regvalue, cur_col, wrap));
 }
 
 int
 ahd_saved_scsiid_print(u_int regvalue, u_int *cur_col, u_int wrap)
 {
         return (ahd_print_register(NULL, 0, "SAVED_SCSIID",
-            0x134, regvalue, cur_col, wrap));
+            0x13a, regvalue, cur_col, wrap));
 }
 
 int
 ahd_saved_lun_print(u_int regvalue, u_int *cur_col, u_int wrap)
 {
         return (ahd_print_register(NULL, 0, "SAVED_LUN",
-            0x135, regvalue, cur_col, wrap));
+            0x13b, regvalue, cur_col, wrap));
 }
 
 static ahd_reg_parse_entry_t LASTPHASE_parse_table[] = {
@@ -3267,42 +3288,42 @@ int
 ahd_lastphase_print(u_int regvalue, u_int *cur_col, u_int wrap)
 {
         return (ahd_print_register(LASTPHASE_parse_table, 13, "LASTPHASE",
-            0x136, regvalue, cur_col, wrap));
+            0x13c, regvalue, cur_col, wrap));
 }
 
 int
 ahd_qoutfifo_entry_valid_tag_print(u_int regvalue, u_int *cur_col, u_int wrap)
 {
         return (ahd_print_register(NULL, 0, "QOUTFIFO_ENTRY_VALID_TAG",
-            0x137, regvalue, cur_col, wrap));
+            0x13d, regvalue, cur_col, wrap));
 }
 
 int
-ahd_shared_data_addr_print(u_int regvalue, u_int *cur_col, u_int wrap)
+ahd_kernel_tqinpos_print(u_int regvalue, u_int *cur_col, u_int wrap)
 {
-        return (ahd_print_register(NULL, 0, "SHARED_DATA_ADDR",
-            0x138, regvalue, cur_col, wrap));
+        return (ahd_print_register(NULL, 0, "KERNEL_TQINPOS",
+            0x13e, regvalue, cur_col, wrap));
 }
 
 int
-ahd_qoutfifo_next_addr_print(u_int regvalue, u_int *cur_col, u_int wrap)
+ahd_tqinpos_print(u_int regvalue, u_int *cur_col, u_int wrap)
 {
-        return (ahd_print_register(NULL, 0, "QOUTFIFO_NEXT_ADDR",
-            0x13c, regvalue, cur_col, wrap));
+        return (ahd_print_register(NULL, 0, "TQINPOS",
+            0x13f, regvalue, cur_col, wrap));
 }
 
 int
-ahd_kernel_tqinpos_print(u_int regvalue, u_int *cur_col, u_int wrap)
+ahd_shared_data_addr_print(u_int regvalue, u_int *cur_col, u_int wrap)
 {
-        return (ahd_print_register(NULL, 0, "KERNEL_TQINPOS",
+        return (ahd_print_register(NULL, 0, "SHARED_DATA_ADDR",
             0x140, regvalue, cur_col, wrap));
 }
 
 int
-ahd_tqinpos_print(u_int regvalue, u_int *cur_col, u_int wrap)
+ahd_qoutfifo_next_addr_print(u_int regvalue, u_int *cur_col, u_int wrap)
 {
-        return (ahd_print_register(NULL, 0, "TQINPOS",
-            0x141, regvalue, cur_col, wrap));
+        return (ahd_print_register(NULL, 0, "QOUTFIFO_NEXT_ADDR",
+            0x144, regvalue, cur_col, wrap));
 }
 
 static ahd_reg_parse_entry_t ARG_1_parse_table[] = {
@@ -3320,21 +3341,21 @@ int
 ahd_arg_1_print(u_int regvalue, u_int *cur_col, u_int wrap)
 {
         return (ahd_print_register(ARG_1_parse_table, 8, "ARG_1",
-            0x142, regvalue, cur_col, wrap));
+            0x148, regvalue, cur_col, wrap));
 }
 
 int
 ahd_arg_2_print(u_int regvalue, u_int *cur_col, u_int wrap)
 {
         return (ahd_print_register(NULL, 0, "ARG_2",
-            0x143, regvalue, cur_col, wrap));
+            0x149, regvalue, cur_col, wrap));
 }
 
 int
 ahd_last_msg_print(u_int regvalue, u_int *cur_col, u_int wrap)
 {
         return (ahd_print_register(NULL, 0, "LAST_MSG",
-            0x144, regvalue, cur_col, wrap));
+            0x14a, regvalue, cur_col, wrap));
 }
 
 static ahd_reg_parse_entry_t SCSISEQ_TEMPLATE_parse_table[] = {
@@ -3350,14 +3371,14 @@ int
 ahd_scsiseq_template_print(u_int regvalue, u_int *cur_col, u_int wrap)
 {
         return (ahd_print_register(SCSISEQ_TEMPLATE_parse_table, 6, "SCSISEQ_TEMPLATE",
-            0x145, regvalue, cur_col, wrap));
+            0x14b, regvalue, cur_col, wrap));
 }
 
 int
 ahd_initiator_tag_print(u_int regvalue, u_int *cur_col, u_int wrap)
 {
         return (ahd_print_register(NULL, 0, "INITIATOR_TAG",
-            0x146, regvalue, cur_col, wrap));
+            0x14c, regvalue, cur_col, wrap));
 }
 
 static ahd_reg_parse_entry_t SEQ_FLAGS2_parse_table[] = {
@@ -3369,63 +3390,63 @@ int
 ahd_seq_flags2_print(u_int regvalue, u_int *cur_col, u_int wrap)
 {
         return (ahd_print_register(SEQ_FLAGS2_parse_table, 2, "SEQ_FLAGS2",
-            0x147, regvalue, cur_col, wrap));
+            0x14d, regvalue, cur_col, wrap));
 }
 
 int
 ahd_allocfifo_scbptr_print(u_int regvalue, u_int *cur_col, u_int wrap)
 {
         return (ahd_print_register(NULL, 0, "ALLOCFIFO_SCBPTR",
-            0x148, regvalue, cur_col, wrap));
+            0x14e, regvalue, cur_col, wrap));
 }
 
 int
 ahd_int_coalescing_timer_print(u_int regvalue, u_int *cur_col, u_int wrap)
 {
         return (ahd_print_register(NULL, 0, "INT_COALESCING_TIMER",
-            0x14a, regvalue, cur_col, wrap));
+            0x150, regvalue, cur_col, wrap));
 }
 
 int
 ahd_int_coalescing_maxcmds_print(u_int regvalue, u_int *cur_col, u_int wrap)
 {
         return (ahd_print_register(NULL, 0, "INT_COALESCING_MAXCMDS",
-            0x14c, regvalue, cur_col, wrap));
+            0x152, regvalue, cur_col, wrap));
 }
 
 int
 ahd_int_coalescing_mincmds_print(u_int regvalue, u_int *cur_col, u_int wrap)
 {
         return (ahd_print_register(NULL, 0, "INT_COALESCING_MINCMDS",
-            0x14d, regvalue, cur_col, wrap));
+            0x153, regvalue, cur_col, wrap));
 }
 
 int
 ahd_cmds_pending_print(u_int regvalue, u_int *cur_col, u_int wrap)
 {
         return (ahd_print_register(NULL, 0, "CMDS_PENDING",
-            0x14e, regvalue, cur_col, wrap));
+            0x154, regvalue, cur_col, wrap));
 }
 
 int
 ahd_int_coalescing_cmdcount_print(u_int regvalue, u_int *cur_col, u_int wrap)
 {
         return (ahd_print_register(NULL, 0, "INT_COALESCING_CMDCOUNT",
-            0x150, regvalue, cur_col, wrap));
+            0x156, regvalue, cur_col, wrap));
 }
 
 int
 ahd_local_hs_mailbox_print(u_int regvalue, u_int *cur_col, u_int wrap)
 {
         return (ahd_print_register(NULL, 0, "LOCAL_HS_MAILBOX",
-            0x151, regvalue, cur_col, wrap));
+            0x157, regvalue, cur_col, wrap));
 }
 
 int
 ahd_cmdsize_table_print(u_int regvalue, u_int *cur_col, u_int wrap)
 {
         return (ahd_print_register(NULL, 0, "CMDSIZE_TABLE",
-            0x152, regvalue, cur_col, wrap));
+            0x158, regvalue, cur_col, wrap));
 }
 
 int
diff --git a/drivers/scsi/aic7xxx/aic79xx_seq.h_shipped b/drivers/scsi/aic7xxx/aic79xx_seq.h_shipped
index 77c471f934e0..b1e5365be230 100644
--- a/drivers/scsi/aic7xxx/aic79xx_seq.h_shipped
+++ b/drivers/scsi/aic7xxx/aic79xx_seq.h_shipped
@@ -2,215 +2,228 @@
  * DO NOT EDIT - This file is automatically generated
  *               from the following source files:
  *
- * $Id: //depot/aic7xxx/aic7xxx/aic79xx.seq#94 $
- * $Id: //depot/aic7xxx/aic7xxx/aic79xx.reg#70 $
+ * $Id: //depot/aic7xxx/aic7xxx/aic79xx.seq#119 $
+ * $Id: //depot/aic7xxx/aic7xxx/aic79xx.reg#76 $
  */
 static uint8_t seqprog[] = {
         0xff, 0x02, 0x06, 0x78,
-        0x00, 0xea, 0x50, 0x59,
+        0x00, 0xea, 0x64, 0x59,
         0x01, 0xea, 0x04, 0x30,
         0xff, 0x04, 0x0c, 0x78,
-        0x19, 0xea, 0x50, 0x59,
+        0x19, 0xea, 0x64, 0x59,
         0x19, 0xea, 0x04, 0x00,
-        0x33, 0xea, 0x44, 0x59,
+        0x33, 0xea, 0x5e, 0x59,
         0x33, 0xea, 0x00, 0x00,
-        0x60, 0x3a, 0x1a, 0x68,
-        0x04, 0x47, 0x1b, 0x68,
-        0xff, 0x21, 0x1b, 0x70,
-        0x40, 0x4b, 0x92, 0x69,
-        0x00, 0xe2, 0x54, 0x59,
-        0x40, 0x4b, 0x92, 0x69,
-        0x20, 0x4b, 0x82, 0x69,
-        0xfc, 0x42, 0x24, 0x78,
-        0x10, 0x40, 0x24, 0x78,
-        0x00, 0xe2, 0xc4, 0x5d,
-        0x20, 0x4d, 0x28, 0x78,
-        0x00, 0xe2, 0xc4, 0x5d,
+        0x60, 0x3a, 0x3a, 0x68,
+        0x04, 0x4d, 0x35, 0x78,
+        0x01, 0x34, 0xc1, 0x31,
+        0x00, 0x32, 0x21, 0x60,
+        0x01, 0x35, 0xc1, 0x31,
+        0x00, 0x33, 0x21, 0x60,
+        0xfb, 0x4d, 0x9b, 0x0a,
+        0x00, 0xe2, 0x34, 0x40,
+        0x50, 0x4b, 0x3a, 0x68,
+        0xff, 0x31, 0x3b, 0x70,
+        0x02, 0x30, 0x51, 0x31,
+        0xff, 0x8d, 0x2d, 0x70,
+        0x02, 0x8c, 0x51, 0x31,
+        0xff, 0x8d, 0x29, 0x60,
+        0x02, 0x28, 0x19, 0x33,
+        0x02, 0x30, 0x51, 0x32,
+        0xff, 0xea, 0x62, 0x02,
+        0x00, 0xe2, 0x3a, 0x40,
+        0xff, 0x21, 0x3b, 0x70,
+        0x40, 0x4b, 0xaa, 0x69,
+        0x00, 0xe2, 0x68, 0x59,
+        0x40, 0x4b, 0xaa, 0x69,
+        0x20, 0x4b, 0x96, 0x69,
+        0xfc, 0x42, 0x44, 0x78,
+        0x10, 0x40, 0x44, 0x78,
+        0x00, 0xe2, 0xfc, 0x5d,
+        0x20, 0x4d, 0x48, 0x78,
+        0x00, 0xe2, 0xfc, 0x5d,
         0x30, 0x3f, 0xc0, 0x09,
-        0x30, 0xe0, 0x30, 0x60,
+        0x30, 0xe0, 0x50, 0x60,
         0x7f, 0x4a, 0x94, 0x08,
-        0x00, 0xe2, 0x32, 0x40,
+        0x00, 0xe2, 0x52, 0x40,
         0xc0, 0x4a, 0x94, 0x00,
-        0x00, 0xe2, 0x3e, 0x58,
-        0x00, 0xe2, 0x56, 0x58,
-        0x00, 0xe2, 0x66, 0x58,
+        0x00, 0xe2, 0x5e, 0x58,
+        0x00, 0xe2, 0x76, 0x58,
+        0x00, 0xe2, 0x86, 0x58,
         0x00, 0xe2, 0x06, 0x40,
-        0x33, 0xea, 0x44, 0x59,
+        0x33, 0xea, 0x5e, 0x59,
         0x33, 0xea, 0x00, 0x00,
-        0x01, 0x52, 0x64, 0x78,
+        0x01, 0x52, 0x84, 0x78,
         0x02, 0x58, 0x50, 0x31,
         0xff, 0xea, 0x10, 0x0b,
-        0xff, 0x97, 0x4f, 0x78,
-        0x50, 0x4b, 0x4a, 0x68,
+        0xff, 0x97, 0x6f, 0x78,
+        0x50, 0x4b, 0x6a, 0x68,
         0xbf, 0x3a, 0x74, 0x08,
-        0x14, 0xea, 0x50, 0x59,
+        0x14, 0xea, 0x64, 0x59,
         0x14, 0xea, 0x04, 0x00,
         0x08, 0x92, 0x25, 0x03,
-        0xff, 0x90, 0x3f, 0x68,
-        0x00, 0xe2, 0x56, 0x5b,
-        0x00, 0xe2, 0x3e, 0x40,
-        0x00, 0xea, 0x44, 0x59,
+        0xff, 0x90, 0x5f, 0x68,
+        0x00, 0xe2, 0x76, 0x5b,
+        0x00, 0xe2, 0x5e, 0x40,
+        0x00, 0xea, 0x5e, 0x59,
         0x01, 0xea, 0x00, 0x30,
-        0x80, 0xf9, 0x5e, 0x68,
-        0x00, 0xe2, 0x42, 0x59,
-        0x11, 0xea, 0x44, 0x59,
+        0x80, 0xf9, 0x7e, 0x68,
+        0x00, 0xe2, 0x5c, 0x59,
+        0x11, 0xea, 0x5e, 0x59,
         0x11, 0xea, 0x00, 0x00,
-        0x80, 0xf9, 0x42, 0x79,
+        0x80, 0xf9, 0x5c, 0x79,
         0xff, 0xea, 0xd4, 0x0d,
-        0x22, 0xea, 0x44, 0x59,
+        0x22, 0xea, 0x5e, 0x59,
         0x22, 0xea, 0x00, 0x00,
-        0x10, 0x16, 0x70, 0x78,
-        0x01, 0x0b, 0xa2, 0x32,
+        0x10, 0x16, 0x90, 0x78,
         0x10, 0x16, 0x2c, 0x00,
-        0x18, 0xad, 0x00, 0x79,
-        0x04, 0xad, 0xca, 0x68,
-        0x80, 0xad, 0x64, 0x78,
-        0x10, 0xad, 0x98, 0x78,
-        0xff, 0x88, 0x83, 0x68,
+        0x01, 0x0b, 0xae, 0x32,
+        0x18, 0xad, 0x12, 0x79,
+        0x04, 0xad, 0xdc, 0x68,
+        0x80, 0xad, 0x84, 0x78,
+        0x10, 0xad, 0xaa, 0x78,
         0xe7, 0xad, 0x5a, 0x09,
         0x02, 0x8c, 0x59, 0x32,
+        0xff, 0x8d, 0xa1, 0x60,
+        0xff, 0xea, 0x5e, 0x02,
+        0xff, 0x88, 0xa7, 0x78,
+        0x02, 0x30, 0x19, 0x33,
+        0x02, 0xa8, 0x60, 0x36,
         0x02, 0x28, 0x19, 0x33,
         0x02, 0xa8, 0x50, 0x36,
-        0x33, 0xea, 0x44, 0x59,
-        0x33, 0xea, 0x00, 0x00,
-        0x40, 0x3a, 0x64, 0x68,
-        0x50, 0x4b, 0x64, 0x68,
-        0x22, 0xea, 0x44, 0x59,
-        0x22, 0xea, 0x00, 0x00,
-        0xe7, 0xad, 0x5a, 0x09,
-        0x02, 0x8c, 0x59, 0x32,
-        0x1a, 0xea, 0x50, 0x59,
-        0x1a, 0xea, 0x04, 0x00,
-        0xff, 0xea, 0xd4, 0x0d,
         0xe7, 0xad, 0x5a, 0x09,
-        0x00, 0xe2, 0xa6, 0x58,
+        0x00, 0xe2, 0xb8, 0x58,
         0xff, 0xea, 0x56, 0x02,
-        0x04, 0x7c, 0x78, 0x32,
-        0x20, 0x16, 0x64, 0x78,
-        0x04, 0x38, 0x79, 0x32,
-        0x80, 0x37, 0x6f, 0x16,
-        0xff, 0x2d, 0xb5, 0x60,
-        0xff, 0x29, 0xb5, 0x60,
-        0x40, 0x51, 0xc5, 0x78,
-        0xff, 0x4f, 0xb5, 0x68,
-        0xff, 0x4d, 0xc1, 0x19,
-        0x00, 0x4e, 0xd5, 0x19,
-        0x00, 0xe2, 0xc4, 0x50,
-        0x01, 0x4c, 0xc1, 0x31,
-        0x00, 0x50, 0xd5, 0x19,
-        0x00, 0xe2, 0xc4, 0x48,
-        0x80, 0x18, 0x64, 0x78,
-        0x02, 0x4a, 0x1d, 0x30,
+        0x04, 0x7c, 0x88, 0x32,
+        0x20, 0x16, 0x84, 0x78,
+        0x04, 0x40, 0x89, 0x32,
+        0x80, 0x3d, 0x7b, 0x16,
+        0xff, 0x2d, 0xc7, 0x60,
+        0xff, 0x29, 0xc7, 0x60,
+        0x40, 0x57, 0xd7, 0x78,
+        0xff, 0x55, 0xc7, 0x68,
+        0xff, 0x53, 0xc1, 0x19,
+        0x00, 0x54, 0xd5, 0x19,
+        0x00, 0xe2, 0xd6, 0x50,
+        0x01, 0x52, 0xc1, 0x31,
+        0x00, 0x56, 0xd5, 0x19,
+        0x00, 0xe2, 0xd6, 0x48,
+        0x80, 0x18, 0x84, 0x78,
+        0x02, 0x50, 0x1d, 0x30,
         0x10, 0xea, 0x18, 0x00,
         0x60, 0x18, 0x30, 0x00,
         0x7f, 0x18, 0x30, 0x0c,
         0x02, 0xea, 0x02, 0x00,
-        0xff, 0xea, 0xa0, 0x0a,
+        0xff, 0xea, 0xac, 0x0a,
         0x80, 0x18, 0x30, 0x04,
-        0x40, 0xad, 0x64, 0x78,
+        0x40, 0xad, 0x84, 0x78,
         0xe7, 0xad, 0x5a, 0x09,
         0x02, 0xa8, 0x40, 0x31,
         0xff, 0xea, 0xc0, 0x09,
-        0x01, 0x4e, 0x9d, 0x1a,
-        0x00, 0x4f, 0x9f, 0x22,
+        0x01, 0x54, 0xa9, 0x1a,
+        0x00, 0x55, 0xab, 0x22,
         0x01, 0x94, 0x6d, 0x33,
-        0x01, 0xea, 0x20, 0x33,
+        0xff, 0xea, 0x20, 0x0b,
         0x04, 0xac, 0x49, 0x32,
         0xff, 0xea, 0x5a, 0x03,
         0xff, 0xea, 0x5e, 0x03,
         0x01, 0x10, 0xd4, 0x31,
-        0x10, 0x92, 0xf5, 0x68,
+        0x10, 0x92, 0x07, 0x69,
         0x3d, 0x93, 0xc5, 0x29,
         0xfe, 0xe2, 0xc4, 0x09,
         0x01, 0xea, 0xc6, 0x01,
         0x02, 0xe2, 0xc8, 0x31,
         0x02, 0xec, 0x50, 0x31,
         0x02, 0xa0, 0xda, 0x31,
-        0xff, 0xa9, 0xf4, 0x70,
+        0xff, 0xa9, 0x06, 0x71,
         0x02, 0xa0, 0x58, 0x37,
-        0xff, 0x21, 0xfd, 0x70,
+        0xff, 0x21, 0x0f, 0x71,
         0x02, 0x22, 0x51, 0x31,
         0x02, 0xa0, 0x5c, 0x33,
         0x02, 0xa0, 0x44, 0x36,
         0x02, 0xa0, 0x40, 0x32,
         0x02, 0xa0, 0x44, 0x36,
-        0x04, 0x47, 0x05, 0x69,
-        0x40, 0x16, 0x30, 0x69,
-        0xff, 0x2d, 0x35, 0x61,
-        0xff, 0x29, 0x65, 0x70,
-        0x01, 0x37, 0xc1, 0x31,
+        0x04, 0x4d, 0x17, 0x69,
+        0x40, 0x16, 0x48, 0x69,
+        0xff, 0x2d, 0x4d, 0x61,
+        0xff, 0x29, 0x85, 0x70,
         0x02, 0x28, 0x55, 0x32,
         0x01, 0xea, 0x5a, 0x01,
-        0x04, 0x3c, 0xf9, 0x30,
+        0x04, 0x44, 0xf9, 0x30,
+        0x01, 0x44, 0xc1, 0x31,
         0x02, 0x28, 0x51, 0x31,
-        0x01, 0xa8, 0x60, 0x31,
-        0x00, 0xa9, 0x60, 0x01,
+        0x02, 0xa8, 0x60, 0x31,
+        0x01, 0xa4, 0x61, 0x31,
+        0x01, 0x3d, 0x61, 0x31,
         0x01, 0x14, 0xd4, 0x31,
-        0x01, 0x50, 0xa1, 0x1a,
-        0xff, 0x4e, 0x9d, 0x1a,
-        0xff, 0x4f, 0x9f, 0x22,
-        0xff, 0x8d, 0x29, 0x71,
-        0x80, 0xac, 0x28, 0x71,
-        0x20, 0x16, 0x28, 0x69,
+        0x01, 0x56, 0xad, 0x1a,
+        0xff, 0x54, 0xa9, 0x1a,
+        0xff, 0x55, 0xab, 0x22,
+        0xff, 0x8d, 0x41, 0x71,
+        0x80, 0xac, 0x40, 0x71,
+        0x20, 0x16, 0x40, 0x69,
+        0x00, 0xac, 0xc4, 0x19,
+        0x07, 0xe2, 0x40, 0xf9,
         0x02, 0x8c, 0x51, 0x31,
-        0x00, 0xe2, 0x12, 0x41,
+        0x00, 0xe2, 0x24, 0x41,
         0x01, 0xac, 0x08, 0x31,
         0x09, 0xea, 0x5a, 0x01,
         0x02, 0x8c, 0x51, 0x32,
         0xff, 0xea, 0x1a, 0x07,
         0x04, 0x24, 0xf9, 0x30,
-        0x1d, 0xea, 0x3a, 0x41,
+        0x1d, 0xea, 0x52, 0x41,
         0x02, 0x2c, 0x51, 0x31,
         0x04, 0xa8, 0xf9, 0x30,
-        0x19, 0xea, 0x3a, 0x41,
+        0x19, 0xea, 0x52, 0x41,
         0x06, 0xea, 0x08, 0x81,
         0x01, 0xe2, 0x5a, 0x35,
-        0x02, 0xf2, 0xf0, 0x35,
+        0x02, 0xf2, 0xf0, 0x31,
+        0xff, 0xea, 0xd4, 0x0d,
         0x02, 0xf2, 0xf0, 0x31,
         0x02, 0xf8, 0xe4, 0x35,
         0x80, 0xea, 0xb2, 0x01,
         0x01, 0xe2, 0x00, 0x30,
         0xff, 0xea, 0xb2, 0x0d,
-        0x80, 0xea, 0xb2, 0x01,
-        0x11, 0x00, 0x00, 0x10,
-        0xff, 0xea, 0xb2, 0x0d,
         0x01, 0xe2, 0x04, 0x30,
         0x01, 0xea, 0x04, 0x34,
         0x02, 0x20, 0xbd, 0x30,
         0x02, 0x20, 0xb9, 0x30,
         0x02, 0x20, 0x51, 0x31,
         0x4c, 0x93, 0xd7, 0x28,
-        0x10, 0x92, 0x63, 0x79,
+        0x10, 0x92, 0x77, 0x79,
         0x01, 0x6b, 0xc0, 0x30,
         0x02, 0x64, 0xc8, 0x00,
         0x40, 0x3a, 0x74, 0x04,
-        0x00, 0xe2, 0x56, 0x58,
-        0x33, 0xea, 0x44, 0x59,
+        0x00, 0xe2, 0x76, 0x58,
+        0x33, 0xea, 0x5e, 0x59,
         0x33, 0xea, 0x00, 0x00,
         0x30, 0x3f, 0xc0, 0x09,
-        0x30, 0xe0, 0x64, 0x61,
-        0x20, 0x3f, 0x7a, 0x69,
-        0x10, 0x3f, 0x64, 0x79,
+        0x30, 0xe0, 0x78, 0x61,
+        0x20, 0x3f, 0x8e, 0x69,
+        0x10, 0x3f, 0x78, 0x79,
         0x02, 0xea, 0x7e, 0x00,
-        0x00, 0xea, 0x44, 0x59,
+        0x00, 0xea, 0x5e, 0x59,
         0x01, 0xea, 0x00, 0x30,
-        0x02, 0x48, 0x51, 0x35,
+        0x02, 0x4e, 0x51, 0x35,
         0x01, 0xea, 0x7e, 0x00,
-        0x11, 0xea, 0x44, 0x59,
+        0x11, 0xea, 0x5e, 0x59,
         0x11, 0xea, 0x00, 0x00,
-        0x02, 0x48, 0x51, 0x35,
+        0x02, 0x4e, 0x51, 0x35,
+        0xc0, 0x4a, 0x94, 0x00,
+        0x04, 0x41, 0x9c, 0x79,
         0x08, 0xea, 0x98, 0x00,
         0x08, 0x57, 0xae, 0x00,
         0x08, 0x3c, 0x78, 0x00,
-        0xf0, 0x49, 0x68, 0x0a,
+        0xf0, 0x49, 0x74, 0x0a,
         0x0f, 0x67, 0xc0, 0x09,
-        0x00, 0x34, 0x69, 0x02,
+        0x00, 0x3a, 0x75, 0x02,
         0x20, 0xea, 0x96, 0x00,
-        0x00, 0xe2, 0xf8, 0x41,
-        0x40, 0x3a, 0xae, 0x69,
+        0x00, 0xe2, 0x14, 0x42,
+        0xc0, 0x4a, 0x94, 0x00,
+        0x40, 0x3a, 0xc8, 0x69,
         0x02, 0x55, 0x06, 0x68,
-        0x02, 0x56, 0xae, 0x69,
-        0xff, 0x5b, 0xae, 0x61,
+        0x02, 0x56, 0xc8, 0x69,
+        0xff, 0x5b, 0xc8, 0x61,
         0x02, 0x20, 0x51, 0x31,
         0x80, 0xea, 0xb2, 0x01,
         0x44, 0xea, 0x00, 0x00,
@@ -218,237 +231,246 @@ static uint8_t seqprog[] = {
         0x33, 0xea, 0x00, 0x00,
         0xff, 0xea, 0xb2, 0x09,
         0xff, 0xe0, 0xc0, 0x19,
-        0xff, 0xe0, 0xb0, 0x79,
+        0xff, 0xe0, 0xca, 0x79,
         0x02, 0xac, 0x51, 0x31,
-        0x00, 0xe2, 0xa6, 0x41,
+        0x00, 0xe2, 0xc0, 0x41,
         0x02, 0x5e, 0x50, 0x31,
         0x02, 0xa8, 0xb8, 0x30,
         0x02, 0x5c, 0x50, 0x31,
-        0xff, 0xad, 0xc1, 0x71,
+        0xff, 0xad, 0xdb, 0x71,
         0x02, 0xac, 0x41, 0x31,
         0x02, 0x22, 0x51, 0x31,
         0x02, 0xa0, 0x5c, 0x33,
         0x02, 0xa0, 0x44, 0x32,
-        0x00, 0xe2, 0xca, 0x41,
-        0x10, 0x92, 0xcb, 0x69,
+        0x00, 0xe2, 0xe4, 0x41,
+        0x10, 0x92, 0xe5, 0x69,
         0x3d, 0x93, 0xc9, 0x29,
         0x01, 0xe4, 0xc8, 0x01,
         0x01, 0xea, 0xca, 0x01,
         0xff, 0xea, 0xda, 0x01,
         0x02, 0x20, 0x51, 0x31,
         0x02, 0xae, 0x41, 0x32,
-        0xff, 0x21, 0xd3, 0x61,
+        0xff, 0x21, 0xed, 0x61,
         0xff, 0xea, 0x46, 0x02,
         0x02, 0x5c, 0x50, 0x31,
         0x40, 0xea, 0x96, 0x00,
-        0x02, 0x56, 0xcc, 0x6d,
-        0x01, 0x55, 0xcc, 0x6d,
-        0x10, 0x92, 0xdf, 0x79,
-        0x10, 0x40, 0xe8, 0x69,
-        0x01, 0x56, 0xe8, 0x79,
+        0x02, 0x56, 0x04, 0x6e,
+        0x01, 0x55, 0x04, 0x6e,
+        0x10, 0x92, 0xf9, 0x79,
+        0x10, 0x40, 0x02, 0x6a,
+        0x01, 0x56, 0x02, 0x7a,
         0xff, 0x97, 0x07, 0x78,
-        0x13, 0xea, 0x50, 0x59,
+        0x13, 0xea, 0x64, 0x59,
         0x13, 0xea, 0x04, 0x00,
         0x00, 0xe2, 0x06, 0x40,
         0xbf, 0x3a, 0x74, 0x08,
+        0x04, 0x41, 0x08, 0x7a,
         0x08, 0xea, 0x98, 0x00,
         0x08, 0x57, 0xae, 0x00,
-        0x01, 0x93, 0x69, 0x32,
-        0x01, 0x94, 0x6b, 0x32,
-        0x40, 0xea, 0x66, 0x02,
+        0x01, 0x93, 0x75, 0x32,
+        0x01, 0x94, 0x77, 0x32,
+        0x40, 0xea, 0x72, 0x02,
         0x08, 0x3c, 0x78, 0x00,
-        0x80, 0xea, 0x62, 0x02,
-        0x00, 0xe2, 0xb8, 0x5b,
-        0x01, 0x36, 0xc1, 0x31,
-        0x9f, 0xe0, 0x4c, 0x7c,
-        0x80, 0xe0, 0x0c, 0x72,
-        0xa0, 0xe0, 0x44, 0x72,
-        0xc0, 0xe0, 0x3a, 0x72,
-        0xe0, 0xe0, 0x74, 0x72,
-        0x01, 0xea, 0x50, 0x59,
+        0x80, 0xea, 0x6e, 0x02,
+        0x00, 0xe2, 0xe2, 0x5b,
+        0x01, 0x3c, 0xc1, 0x31,
+        0x9f, 0xe0, 0x84, 0x7c,
+        0x80, 0xe0, 0x28, 0x72,
+        0xa0, 0xe0, 0x64, 0x72,
+        0xc0, 0xe0, 0x5a, 0x72,
+        0xe0, 0xe0, 0x94, 0x72,
+        0x01, 0xea, 0x64, 0x59,
         0x01, 0xea, 0x04, 0x00,
-        0x00, 0xe2, 0xf8, 0x41,
-        0x80, 0x33, 0x13, 0x7a,
-        0x03, 0xea, 0x50, 0x59,
+        0x00, 0xe2, 0x14, 0x42,
+        0x80, 0x39, 0x2f, 0x7a,
+        0x03, 0xea, 0x64, 0x59,
         0x03, 0xea, 0x04, 0x00,
-        0xee, 0x00, 0x1a, 0x6a,
+        0xee, 0x00, 0x36, 0x6a,
         0x05, 0xea, 0xb4, 0x00,
-        0x33, 0xea, 0x44, 0x59,
+        0x33, 0xea, 0x5e, 0x59,
         0x33, 0xea, 0x00, 0x00,
-        0x02, 0xa8, 0x90, 0x32,
-        0x00, 0xe2, 0x6a, 0x59,
+        0x02, 0xa8, 0x9c, 0x32,
+        0x00, 0xe2, 0x7e, 0x59,
         0xef, 0x96, 0xd5, 0x19,
-        0x00, 0xe2, 0x2a, 0x52,
+        0x00, 0xe2, 0x46, 0x52,
         0x09, 0x80, 0xe1, 0x30,
         0x02, 0xea, 0x36, 0x00,
         0xa8, 0xea, 0x32, 0x00,
-        0x00, 0xe2, 0x30, 0x42,
+        0x00, 0xe2, 0x4c, 0x42,
         0x01, 0x96, 0xd1, 0x30,
         0x10, 0x80, 0x89, 0x31,
         0x20, 0xea, 0x32, 0x00,
-        0xbf, 0x33, 0x67, 0x0a,
-        0x20, 0x19, 0x32, 0x6a,
-        0x02, 0x4d, 0xf8, 0x69,
-        0x40, 0x33, 0x67, 0x02,
-        0x00, 0xe2, 0xf8, 0x41,
-        0x80, 0x33, 0xb5, 0x6a,
+        0xbf, 0x39, 0x73, 0x0a,
+        0x10, 0x4c, 0x56, 0x6a,
+        0x20, 0x19, 0x4e, 0x6a,
+        0x20, 0x19, 0x52, 0x6a,
+        0x02, 0x4d, 0x14, 0x6a,
+        0x40, 0x39, 0x73, 0x02,
+        0x00, 0xe2, 0x14, 0x42,
+        0x80, 0x39, 0xd5, 0x6a,
         0x01, 0x44, 0x10, 0x33,
         0x08, 0x92, 0x25, 0x03,
-        0x00, 0xe2, 0xf8, 0x41,
+        0x00, 0xe2, 0x14, 0x42,
         0x10, 0xea, 0x80, 0x00,
-        0x01, 0x31, 0xc5, 0x31,
-        0x80, 0xe2, 0x60, 0x62,
-        0x10, 0x92, 0x85, 0x6a,
+        0x01, 0x37, 0xc5, 0x31,
+        0x80, 0xe2, 0x80, 0x62,
+        0x10, 0x92, 0xa5, 0x6a,
         0xc0, 0x94, 0xc5, 0x01,
-        0x40, 0x92, 0x51, 0x6a,
+        0x40, 0x92, 0x71, 0x6a,
         0xbf, 0xe2, 0xc4, 0x09,
-        0x20, 0x92, 0x65, 0x7a,
+        0x20, 0x92, 0x85, 0x7a,
         0x01, 0xe2, 0x88, 0x30,
-        0x00, 0xe2, 0xb8, 0x5b,
-        0xa0, 0x36, 0x6d, 0x62,
+        0x00, 0xe2, 0xe2, 0x5b,
+        0xa0, 0x3c, 0x8d, 0x62,
         0x23, 0x92, 0x89, 0x08,
-        0x00, 0xe2, 0xb8, 0x5b,
-        0xa0, 0x36, 0x6d, 0x62,
-        0x00, 0xa8, 0x64, 0x42,
-        0xff, 0xe2, 0x64, 0x62,
-        0x00, 0xe2, 0x84, 0x42,
+        0x00, 0xe2, 0xe2, 0x5b,
+        0xa0, 0x3c, 0x8d, 0x62,
+        0x00, 0xa8, 0x84, 0x42,
+        0xff, 0xe2, 0x84, 0x62,
+        0x00, 0xe2, 0xa4, 0x42,
         0x40, 0xea, 0x98, 0x00,
         0x01, 0xe2, 0x88, 0x30,
-        0x00, 0xe2, 0xb8, 0x5b,
-        0xa0, 0x36, 0x43, 0x72,
+        0x00, 0xe2, 0xe2, 0x5b,
+        0xa0, 0x3c, 0x63, 0x72,
         0x40, 0xea, 0x98, 0x00,
-        0x01, 0x31, 0x89, 0x32,
-        0x08, 0xea, 0x62, 0x02,
-        0x00, 0xe2, 0xf8, 0x41,
-        0xe0, 0xea, 0xd4, 0x5b,
-        0x80, 0xe0, 0xc0, 0x6a,
-        0x04, 0xe0, 0x66, 0x73,
-        0x02, 0xe0, 0x96, 0x73,
-        0x00, 0xea, 0x1e, 0x73,
-        0x03, 0xe0, 0xa6, 0x73,
-        0x23, 0xe0, 0x96, 0x72,
-        0x08, 0xe0, 0xbc, 0x72,
-        0x00, 0xe2, 0xb8, 0x5b,
-        0x07, 0xea, 0x50, 0x59,
+        0x01, 0x37, 0x95, 0x32,
+        0x08, 0xea, 0x6e, 0x02,
+        0x00, 0xe2, 0x14, 0x42,
+        0xe0, 0xea, 0xfe, 0x5b,
+        0x80, 0xe0, 0xe0, 0x6a,
+        0x04, 0xe0, 0x92, 0x73,
+        0x02, 0xe0, 0xc4, 0x73,
+        0x00, 0xea, 0x3e, 0x73,
+        0x03, 0xe0, 0xd4, 0x73,
+        0x23, 0xe0, 0xb6, 0x72,
+        0x08, 0xe0, 0xdc, 0x72,
+        0x00, 0xe2, 0xe2, 0x5b,
+        0x07, 0xea, 0x64, 0x59,
         0x07, 0xea, 0x04, 0x00,
-        0x08, 0x42, 0xf9, 0x71,
-        0x04, 0x42, 0x93, 0x62,
-        0x01, 0x43, 0x89, 0x30,
-        0x00, 0xe2, 0x84, 0x42,
+        0x08, 0x48, 0x15, 0x72,
+        0x04, 0x48, 0xb3, 0x62,
+        0x01, 0x49, 0x89, 0x30,
+        0x00, 0xe2, 0xa4, 0x42,
         0x01, 0x44, 0xd4, 0x31,
-        0x00, 0xe2, 0x84, 0x42,
-        0x01, 0x00, 0x60, 0x32,
-        0x33, 0xea, 0x44, 0x59,
+        0x00, 0xe2, 0xa4, 0x42,
+        0x01, 0x00, 0x6c, 0x32,
+        0x33, 0xea, 0x5e, 0x59,
         0x33, 0xea, 0x00, 0x00,
-        0x4c, 0x34, 0xc1, 0x28,
+        0x4c, 0x3a, 0xc1, 0x28,
         0x01, 0x64, 0xc0, 0x31,
-        0x00, 0x30, 0x45, 0x59,
-        0x01, 0x30, 0x01, 0x30,
-        0x01, 0xe0, 0xba, 0x7a,
-        0xa0, 0xea, 0xca, 0x5b,
-        0x01, 0xa0, 0xba, 0x62,
-        0x01, 0x84, 0xaf, 0x7a,
-        0x01, 0x95, 0xbd, 0x6a,
-        0x05, 0xea, 0x50, 0x59,
+        0x00, 0x36, 0x5f, 0x59,
+        0x01, 0x36, 0x01, 0x30,
+        0x01, 0xe0, 0xda, 0x7a,
+        0xa0, 0xea, 0xf4, 0x5b,
+        0x01, 0xa0, 0xda, 0x62,
+        0x01, 0x84, 0xcf, 0x7a,
+        0x01, 0x95, 0xdd, 0x6a,
+        0x05, 0xea, 0x64, 0x59,
         0x05, 0xea, 0x04, 0x00,
-        0x00, 0xe2, 0xbc, 0x42,
-        0x03, 0xea, 0x50, 0x59,
+        0x00, 0xe2, 0xdc, 0x42,
+        0x03, 0xea, 0x64, 0x59,
         0x03, 0xea, 0x04, 0x00,
-        0x00, 0xe2, 0xbc, 0x42,
-        0x07, 0xea, 0xdc, 0x5b,
+        0x00, 0xe2, 0xdc, 0x42,
+        0x07, 0xea, 0x06, 0x5c,
         0x01, 0x44, 0xd4, 0x31,
-        0x00, 0xe2, 0xf8, 0x41,
-        0x3f, 0xe0, 0x6a, 0x0a,
-        0xc0, 0x34, 0xc1, 0x09,
-        0x00, 0x35, 0x51, 0x01,
+        0x00, 0xe2, 0x14, 0x42,
+        0x3f, 0xe0, 0x76, 0x0a,
+        0xc0, 0x3a, 0xc1, 0x09,
+        0x00, 0x3b, 0x51, 0x01,
         0xff, 0xea, 0x52, 0x09,
-        0x30, 0x34, 0xc5, 0x09,
+        0x30, 0x3a, 0xc5, 0x09,
         0x3d, 0xe2, 0xc4, 0x29,
         0xb8, 0xe2, 0xc4, 0x19,
         0x01, 0xea, 0xc6, 0x01,
         0x02, 0xe2, 0xc8, 0x31,
         0x02, 0xec, 0x40, 0x31,
-        0xff, 0xa1, 0xdc, 0x72,
+        0xff, 0xa1, 0xfc, 0x72,
         0x02, 0xe8, 0xda, 0x31,
         0x02, 0xa0, 0x50, 0x31,
-        0x00, 0xe2, 0xfe, 0x42,
-        0x80, 0x33, 0x67, 0x02,
+        0x00, 0xe2, 0x1e, 0x43,
+        0x80, 0x39, 0x73, 0x02,
         0x01, 0x44, 0xd4, 0x31,
-        0x00, 0xe2, 0xb8, 0x5b,
-        0x01, 0x33, 0x67, 0x02,
-        0xe0, 0x36, 0x19, 0x63,
-        0x02, 0x33, 0x67, 0x02,
-        0x20, 0x46, 0x12, 0x63,
+        0x00, 0xe2, 0xe2, 0x5b,
+        0x01, 0x39, 0x73, 0x02,
+        0xe0, 0x3c, 0x39, 0x63,
+        0x02, 0x39, 0x73, 0x02,
+        0x20, 0x46, 0x32, 0x63,
         0xff, 0xea, 0x52, 0x09,
-        0xa8, 0xea, 0xca, 0x5b,
-        0x04, 0x92, 0xf9, 0x7a,
-        0x01, 0x34, 0xc1, 0x31,
-        0x00, 0x93, 0xf9, 0x62,
-        0x01, 0x35, 0xc1, 0x31,
-        0x00, 0x94, 0x03, 0x73,
+        0xa8, 0xea, 0xf4, 0x5b,
+        0x04, 0x92, 0x19, 0x7b,
+        0x01, 0x3a, 0xc1, 0x31,
+        0x00, 0x93, 0x19, 0x63,
+        0x01, 0x3b, 0xc1, 0x31,
+        0x00, 0x94, 0x23, 0x73,
         0x01, 0xa9, 0x52, 0x11,
-        0xff, 0xa9, 0xee, 0x6a,
-        0x00, 0xe2, 0x12, 0x43,
-        0x10, 0x33, 0x67, 0x02,
-        0x04, 0x92, 0x13, 0x7b,
+        0xff, 0xa9, 0x0e, 0x6b,
+        0x00, 0xe2, 0x32, 0x43,
+        0x10, 0x39, 0x73, 0x02,
+        0x04, 0x92, 0x33, 0x7b,
         0xfb, 0x92, 0x25, 0x0b,
-        0xff, 0xea, 0x66, 0x0a,
-        0x01, 0xa4, 0x0d, 0x6b,
-        0x02, 0xa8, 0x90, 0x32,
-        0x00, 0xe2, 0x6a, 0x59,
-        0x10, 0x92, 0xbd, 0x7a,
-        0xff, 0xea, 0xdc, 0x5b,
-        0x00, 0xe2, 0xbc, 0x42,
-        0x04, 0xea, 0x50, 0x59,
+        0xff, 0xea, 0x72, 0x0a,
+        0x01, 0xa4, 0x2d, 0x6b,
+        0x02, 0xa8, 0x9c, 0x32,
+        0x00, 0xe2, 0x7e, 0x59,
+        0x10, 0x92, 0xdd, 0x7a,
+        0xff, 0xea, 0x06, 0x5c,
+        0x00, 0xe2, 0xdc, 0x42,
+        0x04, 0xea, 0x64, 0x59,
         0x04, 0xea, 0x04, 0x00,
-        0x00, 0xe2, 0xbc, 0x42,
-        0x04, 0xea, 0x50, 0x59,
+        0x00, 0xe2, 0xdc, 0x42,
+        0x04, 0xea, 0x64, 0x59,
         0x04, 0xea, 0x04, 0x00,
-        0x00, 0xe2, 0xf8, 0x41,
-        0x08, 0x92, 0xb5, 0x7a,
-        0xc0, 0x33, 0x29, 0x7b,
-        0x80, 0x33, 0xb5, 0x6a,
-        0xff, 0x88, 0x29, 0x6b,
-        0x40, 0x33, 0xb5, 0x6a,
-        0x10, 0x92, 0x2f, 0x7b,
-        0x0a, 0xea, 0x50, 0x59,
+        0x00, 0xe2, 0x14, 0x42,
+        0x08, 0x92, 0xd5, 0x7a,
+        0xc0, 0x39, 0x49, 0x7b,
+        0x80, 0x39, 0xd5, 0x6a,
+        0xff, 0x88, 0x49, 0x6b,
+        0x40, 0x39, 0xd5, 0x6a,
+        0x10, 0x92, 0x4f, 0x7b,
+        0x0a, 0xea, 0x64, 0x59,
         0x0a, 0xea, 0x04, 0x00,
-        0x00, 0xe2, 0x4e, 0x5b,
-        0x00, 0xe2, 0x82, 0x43,
-        0x50, 0x4b, 0x36, 0x6b,
+        0x00, 0xe2, 0x6e, 0x5b,
+        0x00, 0xe2, 0xae, 0x43,
+        0x50, 0x4b, 0x56, 0x6b,
         0xbf, 0x3a, 0x74, 0x08,
         0x01, 0xe0, 0xf4, 0x31,
         0xff, 0xea, 0xc0, 0x09,
-        0x01, 0x2e, 0x5d, 0x1a,
-        0x00, 0x2f, 0x5f, 0x22,
-        0x04, 0x47, 0x8f, 0x02,
+        0x01, 0x32, 0x65, 0x1a,
+        0x00, 0x33, 0x67, 0x22,
+        0x04, 0x4d, 0x9b, 0x02,
         0x01, 0xfa, 0xc0, 0x35,
-        0x02, 0xa8, 0x84, 0x32,
+        0x02, 0xa8, 0x90, 0x32,
         0x02, 0xea, 0xb4, 0x00,
-        0x33, 0xea, 0x44, 0x59,
+        0x33, 0xea, 0x5e, 0x59,
         0x33, 0xea, 0x00, 0x00,
-        0x02, 0x42, 0x51, 0x31,
-        0xff, 0x90, 0x65, 0x68,
-        0xff, 0x88, 0x5b, 0x6b,
-        0x01, 0xa4, 0x57, 0x6b,
-        0x02, 0xa4, 0x5f, 0x6b,
-        0x01, 0x84, 0x5f, 0x7b,
+        0x02, 0x48, 0x51, 0x31,
+        0xff, 0x90, 0x85, 0x68,
+        0xff, 0x88, 0x7b, 0x6b,
+        0x01, 0xa4, 0x77, 0x6b,
+        0x02, 0xa4, 0x7f, 0x6b,
+        0x01, 0x84, 0x7f, 0x7b,
         0x02, 0x28, 0x19, 0x33,
         0x02, 0xa8, 0x50, 0x36,
-        0xff, 0x88, 0x5f, 0x73,
-        0x00, 0xe2, 0x32, 0x5b,
+        0xff, 0x88, 0x7f, 0x73,
+        0x00, 0xe2, 0x52, 0x5b,
         0x02, 0xa8, 0x20, 0x33,
-        0x02, 0x2c, 0x19, 0x33,
+        0x04, 0xa4, 0x49, 0x03,
+        0xff, 0xea, 0x1a, 0x03,
+        0xff, 0x2d, 0x8b, 0x63,
         0x02, 0xa8, 0x58, 0x32,
-        0x04, 0xa4, 0x49, 0x07,
-        0xc0, 0x33, 0xb5, 0x6a,
+        0x02, 0xa8, 0x5c, 0x36,
+        0x02, 0xa8, 0x40, 0x31,
+        0x02, 0x2e, 0x51, 0x31,
+        0x02, 0xa0, 0x18, 0x33,
+        0x02, 0xa0, 0x5c, 0x36,
+        0xc0, 0x39, 0xd5, 0x6a,
         0x04, 0x92, 0x25, 0x03,
-        0x20, 0x92, 0x83, 0x6b,
+        0x20, 0x92, 0xaf, 0x6b,
         0x02, 0xa8, 0x40, 0x31,
-        0xc0, 0x34, 0xc1, 0x09,
-        0x00, 0x35, 0x51, 0x01,
+        0xc0, 0x3a, 0xc1, 0x09,
+        0x00, 0x3b, 0x51, 0x01,
         0xff, 0xea, 0x52, 0x09,
-        0x30, 0x34, 0xc5, 0x09,
+        0x30, 0x3a, 0xc5, 0x09,
         0x3d, 0xe2, 0xc4, 0x29,
         0xb8, 0xe2, 0xc4, 0x19,
         0x01, 0xea, 0xc6, 0x01,
@@ -458,69 +480,75 @@ static uint8_t seqprog[] = {
         0xf7, 0x57, 0xae, 0x08,
         0x08, 0xea, 0x98, 0x00,
         0x01, 0x44, 0xd4, 0x31,
-        0xee, 0x00, 0x8c, 0x6b,
+        0xee, 0x00, 0xb8, 0x6b,
         0x02, 0xea, 0xb4, 0x00,
-        0x00, 0xe2, 0xb4, 0x5b,
-        0x09, 0x4c, 0x8e, 0x7b,
+        0xc0, 0xea, 0x72, 0x02,
+        0x09, 0x4c, 0xba, 0x7b,
+        0x01, 0xea, 0x78, 0x02,
         0x08, 0x4c, 0x06, 0x68,
-        0x0b, 0xea, 0x50, 0x59,
+        0x0b, 0xea, 0x64, 0x59,
         0x0b, 0xea, 0x04, 0x00,
         0x01, 0x44, 0xd4, 0x31,
-        0x20, 0x33, 0xf9, 0x79,
-        0x00, 0xe2, 0x9e, 0x5b,
-        0x00, 0xe2, 0xf8, 0x41,
-        0x01, 0x84, 0xa3, 0x7b,
+        0x20, 0x39, 0x15, 0x7a,
+        0x00, 0xe2, 0xcc, 0x5b,
+        0x00, 0xe2, 0x14, 0x42,
+        0x01, 0x84, 0xd1, 0x7b,
         0x01, 0xa4, 0x49, 0x07,
         0x08, 0x60, 0x30, 0x33,
         0x08, 0x80, 0x41, 0x37,
-        0xdf, 0x33, 0x67, 0x0a,
-        0xee, 0x00, 0xb0, 0x6b,
+        0xdf, 0x39, 0x73, 0x0a,
+        0xee, 0x00, 0xde, 0x6b,
         0x05, 0xea, 0xb4, 0x00,
-        0x33, 0xea, 0x44, 0x59,
+        0x33, 0xea, 0x5e, 0x59,
         0x33, 0xea, 0x00, 0x00,
-        0x00, 0xe2, 0x6a, 0x59,
-        0x00, 0xe2, 0xbc, 0x42,
-        0x01, 0xea, 0x6c, 0x02,
-        0xc0, 0xea, 0x66, 0x06,
-        0xff, 0x42, 0xc4, 0x6b,
-        0x01, 0x41, 0xb8, 0x6b,
-        0x02, 0x41, 0xb8, 0x7b,
-        0xff, 0x42, 0xc4, 0x6b,
-        0x01, 0x41, 0xb8, 0x6b,
-        0x02, 0x41, 0xb8, 0x7b,
-        0xff, 0x42, 0xc4, 0x7b,
-        0x04, 0x4c, 0xb8, 0x6b,
-        0xe0, 0x41, 0x6c, 0x0e,
+        0x00, 0xe2, 0x7e, 0x59,
+        0x00, 0xe2, 0xdc, 0x42,
+        0xff, 0x42, 0xee, 0x6b,
+        0x01, 0x41, 0xe2, 0x6b,
+        0x02, 0x41, 0xe2, 0x7b,
+        0xff, 0x42, 0xee, 0x6b,
+        0x01, 0x41, 0xe2, 0x6b,
+        0x02, 0x41, 0xe2, 0x7b,
+        0xff, 0x42, 0xee, 0x7b,
+        0x04, 0x4c, 0xe2, 0x6b,
+        0xe0, 0x41, 0x78, 0x0e,
         0x01, 0x44, 0xd4, 0x31,
-        0xff, 0x42, 0xcc, 0x7b,
-        0x04, 0x4c, 0xcc, 0x6b,
-        0xe0, 0x41, 0x6c, 0x0a,
-        0xe0, 0x36, 0xf9, 0x61,
+        0xff, 0x42, 0xf6, 0x7b,
+        0x04, 0x4c, 0xf6, 0x6b,
+        0xe0, 0x41, 0x78, 0x0a,
+        0xe0, 0x3c, 0x15, 0x62,
         0xff, 0xea, 0xca, 0x09,
         0x01, 0xe2, 0xc8, 0x31,
         0x01, 0x46, 0xda, 0x35,
         0x01, 0x44, 0xd4, 0x35,
         0x10, 0xea, 0x80, 0x00,
-        0x01, 0xe2, 0x62, 0x36,
-        0x04, 0xa6, 0xe4, 0x7b,
+        0x01, 0xe2, 0x6e, 0x36,
+        0x04, 0xa6, 0x0e, 0x7c,
         0xff, 0xea, 0x5a, 0x09,
         0xff, 0xea, 0x4c, 0x0d,
-        0x01, 0xa6, 0x02, 0x6c,
-        0x10, 0xad, 0x64, 0x78,
-        0x80, 0xad, 0xfa, 0x6b,
-        0x08, 0xad, 0x64, 0x68,
+        0x01, 0xa6, 0x3a, 0x6c,
+        0x10, 0xad, 0x84, 0x78,
+        0x80, 0xad, 0x32, 0x6c,
+        0x08, 0xad, 0x84, 0x68,
+        0x20, 0x19, 0x26, 0x7c,
+        0x80, 0xea, 0xb2, 0x01,
+        0x11, 0x00, 0x00, 0x10,
+        0x02, 0xa6, 0x22, 0x7c,
+        0xff, 0xea, 0xb2, 0x0d,
+        0x11, 0x00, 0x00, 0x10,
+        0xff, 0xea, 0xb2, 0x09,
         0x04, 0x84, 0xf9, 0x30,
         0x00, 0xea, 0x08, 0x81,
         0xff, 0xea, 0xd4, 0x09,
         0x02, 0x84, 0xf9, 0x88,
         0x0d, 0xea, 0x5a, 0x01,
         0x04, 0xa6, 0x4c, 0x05,
-        0x04, 0xa6, 0x64, 0x78,
+        0x04, 0xa6, 0x84, 0x78,
         0xff, 0xea, 0x5a, 0x09,
         0x03, 0x84, 0x59, 0x89,
         0x03, 0xea, 0x4c, 0x01,
-        0x80, 0x1a, 0x64, 0x78,
-        0x08, 0x19, 0x64, 0x78,
+        0x80, 0x1a, 0x84, 0x78,
+        0x08, 0x19, 0x84, 0x78,
         0x08, 0xb0, 0xe0, 0x30,
         0x04, 0xb0, 0xe0, 0x30,
         0x03, 0xb0, 0xf0, 0x30,
@@ -533,259 +561,259 @@ static uint8_t seqprog[] = {
         0x00, 0x86, 0x0d, 0x23,
         0x00, 0x87, 0x0f, 0x23,
         0x01, 0x84, 0xc5, 0x31,
-        0x80, 0x83, 0x25, 0x7c,
+        0x80, 0x83, 0x5d, 0x7c,
         0x02, 0xe2, 0xc4, 0x01,
         0xff, 0xea, 0x4c, 0x09,
         0x01, 0xe2, 0x36, 0x30,
         0xc8, 0x19, 0x32, 0x00,
         0x88, 0x19, 0x32, 0x00,
         0x01, 0xac, 0xd4, 0x99,
-        0x00, 0xe2, 0x64, 0x50,
+        0x00, 0xe2, 0x84, 0x50,
         0xfe, 0xa6, 0x4c, 0x0d,
         0x0b, 0x98, 0xe1, 0x30,
         0xfd, 0xa4, 0x49, 0x09,
-        0x80, 0xa3, 0x39, 0x7c,
+        0x80, 0xa3, 0x71, 0x7c,
         0x02, 0xa4, 0x48, 0x01,
         0x01, 0xa4, 0x36, 0x30,
         0xa8, 0xea, 0x32, 0x00,
         0xfd, 0xa4, 0x49, 0x0b,
         0x05, 0xa3, 0x07, 0x33,
-        0x80, 0x83, 0x45, 0x6c,
+        0x80, 0x83, 0x7d, 0x6c,
         0x02, 0xea, 0x4c, 0x05,
         0xff, 0xea, 0x4c, 0x0d,
-        0x00, 0xe2, 0x3e, 0x59,
-        0x02, 0xa6, 0xe6, 0x6b,
+        0x00, 0xe2, 0x56, 0x59,
+        0x02, 0xa6, 0x10, 0x6c,
         0x80, 0xf9, 0xf2, 0x05,
-        0xc0, 0x33, 0x53, 0x7c,
-        0x03, 0xea, 0x50, 0x59,
+        0xc0, 0x39, 0x8b, 0x7c,
+        0x03, 0xea, 0x64, 0x59,
         0x03, 0xea, 0x04, 0x00,
-        0x20, 0x33, 0x77, 0x7c,
-        0x01, 0x84, 0x5d, 0x6c,
-        0x06, 0xea, 0x50, 0x59,
+        0x20, 0x39, 0xaf, 0x7c,
+        0x01, 0x84, 0x95, 0x6c,
+        0x06, 0xea, 0x64, 0x59,
         0x06, 0xea, 0x04, 0x00,
-        0x00, 0xe2, 0x7a, 0x44,
-        0x01, 0x00, 0x60, 0x32,
-        0xee, 0x00, 0x66, 0x6c,
+        0x00, 0xe2, 0xb2, 0x44,
+        0x01, 0x00, 0x6c, 0x32,
+        0xee, 0x00, 0x9e, 0x6c,
         0x05, 0xea, 0xb4, 0x00,
-        0x33, 0xea, 0x44, 0x59,
+        0x33, 0xea, 0x5e, 0x59,
         0x33, 0xea, 0x00, 0x00,
         0x80, 0x3d, 0x7a, 0x00,
-        0xfc, 0x42, 0x68, 0x7c,
+        0xfc, 0x42, 0xa0, 0x7c,
         0x7f, 0x3d, 0x7a, 0x08,
-        0x00, 0x30, 0x45, 0x59,
-        0x01, 0x30, 0x01, 0x30,
-        0x09, 0xea, 0x50, 0x59,
+        0x00, 0x36, 0x5f, 0x59,
+        0x01, 0x36, 0x01, 0x30,
+        0x09, 0xea, 0x64, 0x59,
         0x09, 0xea, 0x04, 0x00,
-        0x00, 0xe2, 0xf8, 0x41,
-        0x01, 0xa4, 0x5d, 0x6c,
-        0x00, 0xe2, 0x30, 0x5c,
-        0x20, 0x33, 0x67, 0x02,
-        0x01, 0x00, 0x60, 0x32,
-        0x02, 0xa6, 0x82, 0x7c,
-        0x00, 0xe2, 0x46, 0x5c,
-        0x00, 0xe2, 0x56, 0x58,
-        0x00, 0xe2, 0x66, 0x58,
-        0x00, 0xe2, 0x3a, 0x58,
-        0x00, 0x30, 0x45, 0x59,
-        0x01, 0x30, 0x01, 0x30,
-        0x20, 0x19, 0x82, 0x6c,
-        0x00, 0xe2, 0xb2, 0x5c,
-        0x04, 0x19, 0x9c, 0x6c,
+        0x00, 0xe2, 0x14, 0x42,
+        0x01, 0xa4, 0x95, 0x6c,
+        0x00, 0xe2, 0x68, 0x5c,
+        0x20, 0x39, 0x73, 0x02,
+        0x01, 0x00, 0x6c, 0x32,
+        0x02, 0xa6, 0xba, 0x7c,
+        0x00, 0xe2, 0x7e, 0x5c,
+        0x00, 0xe2, 0x76, 0x58,
+        0x00, 0xe2, 0x86, 0x58,
+        0x00, 0xe2, 0x5a, 0x58,
+        0x00, 0x36, 0x5f, 0x59,
+        0x01, 0x36, 0x01, 0x30,
+        0x20, 0x19, 0xba, 0x6c,
+        0x00, 0xe2, 0xea, 0x5c,
+        0x04, 0x19, 0xd4, 0x6c,
         0x02, 0x19, 0x32, 0x00,
-        0x01, 0x84, 0x9d, 0x7c,
-        0x01, 0x1b, 0x96, 0x7c,
-        0x01, 0x1a, 0x9c, 0x6c,
-        0x00, 0xe2, 0x4c, 0x44,
-        0x80, 0x4b, 0xa2, 0x6c,
-        0x01, 0x4c, 0x9e, 0x7c,
-        0x03, 0x42, 0x4c, 0x6c,
-        0x00, 0xe2, 0xe0, 0x5b,
+        0x01, 0x84, 0xd5, 0x7c,
+        0x01, 0x1b, 0xce, 0x7c,
+        0x01, 0x1a, 0xd4, 0x6c,
+        0x00, 0xe2, 0x84, 0x44,
+        0x80, 0x4b, 0xda, 0x6c,
+        0x01, 0x4c, 0xd6, 0x7c,
+        0x03, 0x42, 0x84, 0x6c,
+        0x00, 0xe2, 0x0a, 0x5c,
         0x80, 0xf9, 0xf2, 0x01,
-        0x04, 0x33, 0xf9, 0x79,
-        0x00, 0xe2, 0xf8, 0x41,
-        0x08, 0x5d, 0xba, 0x6c,
-        0x00, 0xe2, 0x56, 0x58,
-        0x00, 0x30, 0x45, 0x59,
-        0x01, 0x30, 0x01, 0x30,
-        0x02, 0x1b, 0xaa, 0x7c,
-        0x08, 0x5d, 0xb8, 0x7c,
+        0x04, 0x39, 0x15, 0x7a,
+        0x00, 0xe2, 0x14, 0x42,
+        0x08, 0x5d, 0xf2, 0x6c,
+        0x00, 0xe2, 0x76, 0x58,
+        0x00, 0x36, 0x5f, 0x59,
+        0x01, 0x36, 0x01, 0x30,
+        0x02, 0x1b, 0xe2, 0x7c,
+        0x08, 0x5d, 0xf0, 0x7c,
         0x03, 0x68, 0x00, 0x37,
         0x01, 0x84, 0x09, 0x07,
-        0x80, 0x1b, 0xc4, 0x7c,
-        0x80, 0x84, 0xc5, 0x6c,
+        0x80, 0x1b, 0xfc, 0x7c,
+        0x80, 0x84, 0xfd, 0x6c,
         0xff, 0x85, 0x0b, 0x1b,
         0xff, 0x86, 0x0d, 0x23,
         0xff, 0x87, 0x0f, 0x23,
         0xf8, 0x1b, 0x08, 0x0b,
         0xff, 0xea, 0x06, 0x0b,
         0x03, 0x68, 0x00, 0x37,
-        0x00, 0xe2, 0xc4, 0x58,
+        0x00, 0xe2, 0xd6, 0x58,
         0x10, 0xea, 0x18, 0x00,
         0xf9, 0xd9, 0xb2, 0x0d,
         0x01, 0xd9, 0xb2, 0x05,
         0x01, 0x52, 0x48, 0x31,
-        0x20, 0xa4, 0xee, 0x7c,
-        0x20, 0x5b, 0xee, 0x7c,
-        0x80, 0xf9, 0xfc, 0x7c,
+        0x20, 0xa4, 0x26, 0x7d,
+        0x20, 0x5b, 0x26, 0x7d,
+        0x80, 0xf9, 0x34, 0x7d,
         0x02, 0xea, 0xb4, 0x00,
         0x11, 0x00, 0x00, 0x10,
-        0x04, 0x19, 0x08, 0x7d,
+        0x04, 0x19, 0x40, 0x7d,
         0xdf, 0x19, 0x32, 0x08,
-        0x60, 0x5b, 0xe6, 0x6c,
-        0x01, 0x4c, 0xe2, 0x7c,
+        0x60, 0x5b, 0x40, 0x6d,
+        0x01, 0x4c, 0x1a, 0x7d,
         0x20, 0x19, 0x32, 0x00,
         0x01, 0xd9, 0xb2, 0x05,
         0x02, 0xea, 0xb4, 0x00,
         0x01, 0xd9, 0xb2, 0x05,
-        0x10, 0x5b, 0x00, 0x6d,
-        0x08, 0x5b, 0x0a, 0x6d,
-        0x20, 0x5b, 0xfa, 0x6c,
-        0x02, 0x5b, 0x2a, 0x6d,
-        0x0e, 0xea, 0x50, 0x59,
+        0x10, 0x5b, 0x38, 0x6d,
+        0x08, 0x5b, 0x42, 0x6d,
+        0x20, 0x5b, 0x32, 0x6d,
+        0x02, 0x5b, 0x62, 0x6d,
+        0x0e, 0xea, 0x64, 0x59,
         0x0e, 0xea, 0x04, 0x00,
-        0x80, 0xf9, 0xea, 0x6c,
+        0x80, 0xf9, 0x22, 0x6d,
         0xdf, 0x5c, 0xb8, 0x08,
         0x01, 0xd9, 0xb2, 0x05,
-        0x01, 0xa4, 0xe5, 0x6d,
-        0x00, 0xe2, 0x30, 0x5c,
-        0x00, 0xe2, 0x34, 0x5d,
+        0x01, 0xa4, 0x1d, 0x6e,
+        0x00, 0xe2, 0x68, 0x5c,
+        0x00, 0xe2, 0x6c, 0x5d,
         0x01, 0x90, 0x21, 0x1b,
         0x01, 0xd9, 0xb2, 0x05,
-        0x00, 0xe2, 0x32, 0x5b,
+        0x00, 0xe2, 0x52, 0x5b,
         0xf3, 0x96, 0xd5, 0x19,
-        0x00, 0xe2, 0x18, 0x55,
-        0x80, 0x96, 0x19, 0x6d,
-        0x0f, 0xea, 0x50, 0x59,
+        0x00, 0xe2, 0x50, 0x55,
+        0x80, 0x96, 0x51, 0x6d,
+        0x0f, 0xea, 0x64, 0x59,
         0x0f, 0xea, 0x04, 0x00,
-        0x00, 0xe2, 0x20, 0x45,
+        0x00, 0xe2, 0x58, 0x45,
         0x04, 0x8c, 0xe1, 0x30,
         0x01, 0xea, 0xf2, 0x00,
         0x02, 0xea, 0x36, 0x00,
         0xa8, 0xea, 0x32, 0x00,
-        0xff, 0x97, 0x27, 0x7d,
-        0x14, 0xea, 0x50, 0x59,
+        0xff, 0x97, 0x5f, 0x7d,
+        0x14, 0xea, 0x64, 0x59,
         0x14, 0xea, 0x04, 0x00,
-        0x00, 0xe2, 0x96, 0x5d,
+        0x00, 0xe2, 0xce, 0x5d,
         0x01, 0xd9, 0xb2, 0x05,
         0x09, 0x80, 0xe1, 0x30,
         0x02, 0xea, 0x36, 0x00,
         0xa8, 0xea, 0x32, 0x00,
-        0x00, 0xe2, 0x8e, 0x5d,
+        0x00, 0xe2, 0xc6, 0x5d,
         0x01, 0xd9, 0xb2, 0x05,
-        0x02, 0xa6, 0x44, 0x7d,
-        0x00, 0xe2, 0x3e, 0x59,
-        0x20, 0x5b, 0x52, 0x6d,
-        0xfc, 0x42, 0x3e, 0x7d,
-        0x10, 0x40, 0x40, 0x6d,
-        0x20, 0x4d, 0x42, 0x7d,
-        0x08, 0x5d, 0x52, 0x6d,
-        0x02, 0xa6, 0xe6, 0x6b,
-        0x00, 0xe2, 0x3e, 0x59,
-        0x20, 0x5b, 0x52, 0x6d,
-        0x01, 0x1b, 0x72, 0x6d,
-        0xfc, 0x42, 0x4e, 0x7d,
-        0x10, 0x40, 0x50, 0x6d,
-        0x20, 0x4d, 0x64, 0x78,
-        0x08, 0x5d, 0x64, 0x78,
+        0x02, 0xa6, 0x7c, 0x7d,
+        0x00, 0xe2, 0x56, 0x59,
+        0x20, 0x5b, 0x8a, 0x6d,
+        0xfc, 0x42, 0x76, 0x7d,
+        0x10, 0x40, 0x78, 0x6d,
+        0x20, 0x4d, 0x7a, 0x7d,
+        0x08, 0x5d, 0x8a, 0x6d,
+        0x02, 0xa6, 0x10, 0x6c,
+        0x00, 0xe2, 0x56, 0x59,
+        0x20, 0x5b, 0x8a, 0x6d,
+        0x01, 0x1b, 0xaa, 0x6d,
+        0xfc, 0x42, 0x86, 0x7d,
+        0x10, 0x40, 0x88, 0x6d,
+        0x20, 0x4d, 0x84, 0x78,
+        0x08, 0x5d, 0x84, 0x78,
         0x02, 0x19, 0x32, 0x00,
         0x01, 0x5b, 0x40, 0x31,
-        0x00, 0xe2, 0xb2, 0x5c,
-        0x00, 0xe2, 0x9e, 0x5b,
+        0x00, 0xe2, 0xea, 0x5c,
+        0x00, 0xe2, 0xcc, 0x5b,
         0x20, 0xea, 0xb6, 0x00,
-        0x00, 0xe2, 0xe0, 0x5b,
+        0x00, 0xe2, 0x0a, 0x5c,
         0x20, 0x5c, 0xb8, 0x00,
-        0x04, 0x19, 0x68, 0x6d,
-        0x01, 0x1a, 0x68, 0x6d,
-        0x00, 0xe2, 0x3e, 0x59,
-        0x01, 0x1a, 0x64, 0x78,
+        0x04, 0x19, 0xa0, 0x6d,
+        0x01, 0x1a, 0xa0, 0x6d,
+        0x00, 0xe2, 0x56, 0x59,
+        0x01, 0x1a, 0x84, 0x78,
         0x80, 0xf9, 0xf2, 0x01,
-        0x20, 0xa0, 0xcc, 0x7d,
+        0x20, 0xa0, 0x04, 0x7e,
         0xff, 0x90, 0x21, 0x1b,
-        0x08, 0x92, 0x43, 0x6b,
+        0x08, 0x92, 0x63, 0x6b,
         0x02, 0xea, 0xb4, 0x04,
         0x01, 0xa4, 0x49, 0x03,
-        0x40, 0x5b, 0x82, 0x6d,
-        0x00, 0xe2, 0x3e, 0x59,
-        0x40, 0x5b, 0x82, 0x6d,
-        0x04, 0x5d, 0xe6, 0x7d,
-        0x01, 0x1a, 0xe6, 0x7d,
-        0x20, 0x4d, 0x64, 0x78,
-        0x40, 0x5b, 0xcc, 0x7d,
-        0x04, 0x5d, 0xe6, 0x7d,
-        0x01, 0x1a, 0xe6, 0x7d,
+        0x40, 0x5b, 0xba, 0x6d,
+        0x00, 0xe2, 0x56, 0x59,
+        0x40, 0x5b, 0xba, 0x6d,
+        0x04, 0x5d, 0x1e, 0x7e,
+        0x01, 0x1a, 0x1e, 0x7e,
+        0x20, 0x4d, 0x84, 0x78,
+        0x40, 0x5b, 0x04, 0x7e,
+        0x04, 0x5d, 0x1e, 0x7e,
+        0x01, 0x1a, 0x1e, 0x7e,
         0x80, 0xf9, 0xf2, 0x01,
         0xff, 0x90, 0x21, 0x1b,
-        0x08, 0x92, 0x43, 0x6b,
+        0x08, 0x92, 0x63, 0x6b,
         0x02, 0xea, 0xb4, 0x04,
-        0x00, 0xe2, 0x3e, 0x59,
-        0x01, 0x1b, 0x64, 0x78,
+        0x00, 0xe2, 0x56, 0x59,
+        0x01, 0x1b, 0x84, 0x78,
         0x80, 0xf9, 0xf2, 0x01,
         0x02, 0xea, 0xb4, 0x04,
-        0x00, 0xe2, 0x3e, 0x59,
-        0x01, 0x1b, 0xaa, 0x6d,
-        0x40, 0x5b, 0xb8, 0x7d,
-        0x01, 0x1b, 0xaa, 0x6d,
+        0x00, 0xe2, 0x56, 0x59,
+        0x01, 0x1b, 0xe2, 0x6d,
+        0x40, 0x5b, 0xf0, 0x7d,
+        0x01, 0x1b, 0xe2, 0x6d,
         0x02, 0x19, 0x32, 0x00,
-        0x01, 0x1a, 0x64, 0x78,
+        0x01, 0x1a, 0x84, 0x78,
         0x80, 0xf9, 0xf2, 0x01,
         0xff, 0xea, 0x10, 0x03,
         0x08, 0x92, 0x25, 0x03,
-        0x00, 0xe2, 0x42, 0x43,
-        0x01, 0x1a, 0xb4, 0x7d,
-        0x40, 0x5b, 0xb0, 0x7d,
-        0x01, 0x1a, 0x9e, 0x6d,
-        0xfc, 0x42, 0x64, 0x78,
-        0x01, 0x1a, 0xb8, 0x6d,
-        0x10, 0xea, 0x50, 0x59,
+        0x00, 0xe2, 0x62, 0x43,
+        0x01, 0x1a, 0xec, 0x7d,
+        0x40, 0x5b, 0xe8, 0x7d,
+        0x01, 0x1a, 0xd6, 0x6d,
+        0xfc, 0x42, 0x84, 0x78,
+        0x01, 0x1a, 0xf0, 0x6d,
+        0x10, 0xea, 0x64, 0x59,
         0x10, 0xea, 0x04, 0x00,
-        0xfc, 0x42, 0x64, 0x78,
-        0x10, 0x40, 0xbe, 0x6d,
-        0x20, 0x4d, 0x64, 0x78,
-        0x40, 0x5b, 0x9e, 0x6d,
-        0x01, 0x1a, 0x64, 0x78,
+        0xfc, 0x42, 0x84, 0x78,
+        0x10, 0x40, 0xf6, 0x6d,
+        0x20, 0x4d, 0x84, 0x78,
+        0x40, 0x5b, 0xd6, 0x6d,
+        0x01, 0x1a, 0x84, 0x78,
         0x01, 0x90, 0x21, 0x1b,
         0x30, 0x3f, 0xc0, 0x09,
-        0x30, 0xe0, 0x64, 0x60,
-        0x40, 0x4b, 0x64, 0x68,
+        0x30, 0xe0, 0x84, 0x60,
+        0x40, 0x4b, 0x84, 0x68,
         0xff, 0xea, 0x52, 0x01,
-        0xee, 0x00, 0xd2, 0x6d,
+        0xee, 0x00, 0x0c, 0x6e,
         0x80, 0xf9, 0xf2, 0x01,
         0xff, 0x90, 0x21, 0x1b,
         0x02, 0xea, 0xb4, 0x00,
         0x20, 0xea, 0x9a, 0x00,
-        0xf3, 0x42, 0xde, 0x6d,
-        0x12, 0xea, 0x50, 0x59,
+        0xf3, 0x42, 0x16, 0x6e,
+        0x12, 0xea, 0x64, 0x59,
         0x12, 0xea, 0x04, 0x00,
-        0x00, 0xe2, 0xf8, 0x41,
-        0x0d, 0xea, 0x50, 0x59,
+        0x00, 0xe2, 0x14, 0x42,
+        0x0d, 0xea, 0x64, 0x59,
         0x0d, 0xea, 0x04, 0x00,
-        0x00, 0xe2, 0xf8, 0x41,
+        0x00, 0xe2, 0x14, 0x42,
         0x01, 0x90, 0x21, 0x1b,
-        0x11, 0xea, 0x50, 0x59,
+        0x11, 0xea, 0x64, 0x59,
         0x11, 0xea, 0x04, 0x00,
-        0x00, 0xe2, 0x32, 0x5b,
+        0x00, 0xe2, 0x52, 0x5b,
         0x08, 0x5a, 0xb4, 0x00,
-        0x00, 0xe2, 0x0c, 0x5e,
+        0x00, 0xe2, 0x44, 0x5e,
         0xa8, 0xea, 0x32, 0x00,
-        0x00, 0xe2, 0x3e, 0x59,
-        0x80, 0x1a, 0xfa, 0x7d,
-        0x00, 0xe2, 0x0c, 0x5e,
+        0x00, 0xe2, 0x56, 0x59,
+        0x80, 0x1a, 0x32, 0x7e,
+        0x00, 0xe2, 0x44, 0x5e,
         0x80, 0x19, 0x32, 0x00,
-        0x40, 0x5b, 0x00, 0x6e,
-        0x08, 0x5a, 0x00, 0x7e,
-        0x20, 0x4d, 0x64, 0x78,
+        0x40, 0x5b, 0x38, 0x6e,
+        0x08, 0x5a, 0x38, 0x7e,
+        0x20, 0x4d, 0x84, 0x78,
         0x02, 0x84, 0x09, 0x03,
-        0x40, 0x5b, 0xcc, 0x7d,
+        0x40, 0x5b, 0x04, 0x7e,
         0xff, 0x90, 0x21, 0x1b,
         0x80, 0xf9, 0xf2, 0x01,
-        0x08, 0x92, 0x43, 0x6b,
+        0x08, 0x92, 0x63, 0x6b,
         0x02, 0xea, 0xb4, 0x04,
-        0x01, 0x38, 0xe1, 0x30,
-        0x05, 0x39, 0xe3, 0x98,
+        0x01, 0x40, 0xe1, 0x30,
+        0x05, 0x41, 0xe3, 0x98,
         0x01, 0xe0, 0xf4, 0x31,
         0xff, 0xea, 0xc0, 0x09,
-        0x00, 0x3a, 0xe5, 0x20,
-        0x00, 0x3b, 0xe7, 0x20,
+        0x00, 0x42, 0xe5, 0x20,
+        0x00, 0x43, 0xe7, 0x20,
         0x01, 0xfa, 0xc0, 0x31,
         0x04, 0xea, 0xe8, 0x30,
         0xff, 0xea, 0xf0, 0x08,
@@ -794,12 +822,20 @@ static uint8_t seqprog[] = {
 };
 
 typedef int ahd_patch_func_t (struct ahd_softc *ahd);
+static ahd_patch_func_t ahd_patch23_func;
+
+static int
+ahd_patch23_func(struct ahd_softc *ahd)
+{
+        return ((ahd->bugs & AHD_PKT_BITBUCKET_BUG) != 0);
+}
+
 static ahd_patch_func_t ahd_patch22_func;
 
 static int
 ahd_patch22_func(struct ahd_softc *ahd)
 {
-        return ((ahd->bugs & AHD_PKT_BITBUCKET_BUG) != 0);
+        return ((ahd->bugs & AHD_PKT_BITBUCKET_BUG) == 0);
 }
 
 static ahd_patch_func_t ahd_patch21_func;
@@ -807,7 +843,7 @@ static ahd_patch_func_t ahd_patch21_func;
 static int
 ahd_patch21_func(struct ahd_softc *ahd)
 {
-        return ((ahd->bugs & AHD_PKT_BITBUCKET_BUG) == 0);
+        return ((ahd->flags & AHD_INITIATORROLE) != 0);
 }
 
 static ahd_patch_func_t ahd_patch20_func;
@@ -815,7 +851,7 @@ static ahd_patch_func_t ahd_patch20_func;
 static int
 ahd_patch20_func(struct ahd_softc *ahd)
 {
-        return ((ahd->features & AHD_RTI) == 0);
+        return ((ahd->flags & AHD_TARGETROLE) != 0);
 }
 
 static ahd_patch_func_t ahd_patch19_func;
@@ -823,7 +859,7 @@ static ahd_patch_func_t ahd_patch19_func;
 static int
 ahd_patch19_func(struct ahd_softc *ahd)
 {
-        return ((ahd->flags & AHD_INITIATORROLE) != 0);
+        return ((ahd->bugs & AHD_AUTOFLUSH_BUG) != 0);
 }
 
 static ahd_patch_func_t ahd_patch18_func;
@@ -831,7 +867,7 @@ static ahd_patch_func_t ahd_patch18_func;
 static int
 ahd_patch18_func(struct ahd_softc *ahd)
 {
-        return ((ahd->flags & AHD_TARGETROLE) != 0);
+        return ((ahd->features & AHD_NEW_DFCNTRL_OPTS) != 0);
 }
 
 static ahd_patch_func_t ahd_patch17_func;
@@ -839,7 +875,7 @@ static ahd_patch_func_t ahd_patch17_func;
 static int
 ahd_patch17_func(struct ahd_softc *ahd)
 {
-        return ((ahd->bugs & AHD_AUTOFLUSH_BUG) != 0);
+        return ((ahd->flags & AHD_39BIT_ADDRESSING) != 0);
 }
 
 static ahd_patch_func_t ahd_patch16_func;
@@ -847,7 +883,7 @@ static ahd_patch_func_t ahd_patch16_func;
 static int
 ahd_patch16_func(struct ahd_softc *ahd)
 {
-        return ((ahd->features & AHD_NEW_DFCNTRL_OPTS) != 0);
+        return ((ahd->flags & AHD_64BIT_ADDRESSING) != 0);
 }
 
 static ahd_patch_func_t ahd_patch15_func;
@@ -855,7 +891,7 @@ static ahd_patch_func_t ahd_patch15_func;
 static int
 ahd_patch15_func(struct ahd_softc *ahd)
 {
-        return ((ahd->flags & AHD_39BIT_ADDRESSING) != 0);
+        return ((ahd->features & AHD_NEW_DFCNTRL_OPTS) == 0);
 }
 
 static ahd_patch_func_t ahd_patch14_func;
@@ -863,7 +899,7 @@ static ahd_patch_func_t ahd_patch14_func;
 static int
 ahd_patch14_func(struct ahd_softc *ahd)
 {
-        return ((ahd->flags & AHD_64BIT_ADDRESSING) != 0);
+        return ((ahd->bugs & AHD_REG_SLOW_SETTLE_BUG) != 0);
 }
 
 static ahd_patch_func_t ahd_patch13_func;
@@ -871,7 +907,7 @@ static ahd_patch_func_t ahd_patch13_func;
 static int
 ahd_patch13_func(struct ahd_softc *ahd)
 {
-        return ((ahd->features & AHD_NEW_DFCNTRL_OPTS) == 0);
+        return ((ahd->features & AHD_RTI) == 0);
 }
 
 static ahd_patch_func_t ahd_patch12_func;
@@ -879,7 +915,7 @@ static ahd_patch_func_t ahd_patch12_func;
 static int
 ahd_patch12_func(struct ahd_softc *ahd)
 {
-        return ((ahd->bugs & AHD_REG_SLOW_SETTLE_BUG) != 0);
+        return ((ahd->bugs & AHD_EARLY_REQ_BUG) != 0);
 }
 
 static ahd_patch_func_t ahd_patch11_func;
@@ -887,7 +923,7 @@ static ahd_patch_func_t ahd_patch11_func;
 static int
 ahd_patch11_func(struct ahd_softc *ahd)
 {
-        return ((ahd->bugs & AHD_EARLY_REQ_BUG) != 0);
+        return ((ahd->bugs & AHD_BUSFREEREV_BUG) == 0);
 }
 
 static ahd_patch_func_t ahd_patch10_func;
@@ -895,7 +931,7 @@ static ahd_patch_func_t ahd_patch10_func;
 static int
 ahd_patch10_func(struct ahd_softc *ahd)
 {
-        return ((ahd->bugs & AHD_BUSFREEREV_BUG) == 0);
+        return ((ahd->flags & AHD_SEQUENCER_DEBUG) != 0);
 }
 
 static ahd_patch_func_t ahd_patch9_func;
@@ -903,7 +939,7 @@ static ahd_patch_func_t ahd_patch9_func;
 static int
 ahd_patch9_func(struct ahd_softc *ahd)
 {
-        return ((ahd->flags & AHD_SEQUENCER_DEBUG) != 0);
+        return ((ahd->features & AHD_FAST_CDB_DELIVERY) != 0);
 }
 
 static ahd_patch_func_t ahd_patch8_func;
@@ -992,147 +1028,149 @@ static struct patch {
         { ahd_patch0_func, 5, 1, 1 },
         { ahd_patch2_func, 6, 1, 2 },
         { ahd_patch0_func, 7, 1, 1 },
-        { ahd_patch3_func, 20, 5, 1 },
-        { ahd_patch2_func, 29, 1, 2 },
-        { ahd_patch0_func, 30, 1, 1 },
-        { ahd_patch1_func, 37, 1, 2 },
-        { ahd_patch0_func, 38, 1, 1 },
-        { ahd_patch2_func, 43, 1, 2 },
-        { ahd_patch0_func, 44, 1, 1 },
-        { ahd_patch2_func, 47, 1, 2 },
-        { ahd_patch0_func, 48, 1, 1 },
-        { ahd_patch2_func, 51, 1, 2 },
-        { ahd_patch0_func, 52, 1, 1 },
-        { ahd_patch2_func, 65, 1, 2 },
-        { ahd_patch0_func, 66, 1, 1 },
-        { ahd_patch2_func, 69, 1, 2 },
-        { ahd_patch0_func, 70, 1, 1 },
-        { ahd_patch1_func, 73, 1, 2 },
-        { ahd_patch0_func, 74, 1, 1 },
-        { ahd_patch4_func, 107, 1, 1 },
-        { ahd_patch2_func, 162, 6, 1 },
-        { ahd_patch1_func, 168, 2, 1 },
-        { ahd_patch5_func, 170, 1, 1 },
-        { ahd_patch2_func, 179, 1, 2 },
-        { ahd_patch0_func, 180, 1, 1 },
-        { ahd_patch6_func, 181, 2, 2 },
-        { ahd_patch0_func, 183, 6, 3 },
-        { ahd_patch2_func, 186, 1, 2 },
-        { ahd_patch0_func, 187, 1, 1 },
-        { ahd_patch2_func, 190, 1, 2 },
-        { ahd_patch0_func, 191, 1, 1 },
-        { ahd_patch7_func, 193, 2, 1 },
-        { ahd_patch5_func, 201, 16, 2 },
-        { ahd_patch0_func, 217, 1, 1 },
-        { ahd_patch8_func, 237, 2, 1 },
-        { ahd_patch1_func, 241, 1, 2 },
-        { ahd_patch0_func, 242, 1, 1 },
-        { ahd_patch7_func, 245, 2, 1 },
-        { ahd_patch1_func, 259, 1, 2 },
-        { ahd_patch0_func, 260, 1, 1 },
-        { ahd_patch1_func, 263, 1, 2 },
-        { ahd_patch0_func, 264, 1, 1 },
-        { ahd_patch2_func, 267, 1, 2 },
-        { ahd_patch0_func, 268, 1, 1 },
-        { ahd_patch1_func, 323, 1, 2 },
-        { ahd_patch0_func, 324, 1, 1 },
-        { ahd_patch2_func, 332, 1, 2 },
-        { ahd_patch0_func, 333, 1, 1 },
-        { ahd_patch2_func, 336, 1, 2 },
-        { ahd_patch0_func, 337, 1, 1 },
-        { ahd_patch1_func, 343, 1, 2 },
-        { ahd_patch0_func, 344, 1, 1 },
-        { ahd_patch1_func, 346, 1, 2 },
-        { ahd_patch0_func, 347, 1, 1 },
-        { ahd_patch9_func, 366, 1, 1 },
-        { ahd_patch9_func, 369, 1, 1 },
-        { ahd_patch9_func, 371, 1, 1 },
-        { ahd_patch9_func, 383, 1, 1 },
-        { ahd_patch1_func, 393, 1, 2 },
-        { ahd_patch0_func, 394, 1, 1 },
-        { ahd_patch1_func, 396, 1, 2 },
-        { ahd_patch0_func, 397, 1, 1 },
-        { ahd_patch1_func, 405, 1, 2 },
-        { ahd_patch0_func, 406, 1, 1 },
-        { ahd_patch2_func, 419, 1, 2 },
-        { ahd_patch0_func, 420, 1, 1 },
-        { ahd_patch10_func, 450, 1, 1 },
-        { ahd_patch1_func, 457, 1, 2 },
-        { ahd_patch0_func, 458, 1, 1 },
-        { ahd_patch2_func, 470, 1, 2 },
-        { ahd_patch0_func, 471, 1, 1 },
-        { ahd_patch11_func, 476, 6, 2 },
-        { ahd_patch0_func, 482, 1, 1 },
-        { ahd_patch12_func, 505, 1, 1 },
-        { ahd_patch13_func, 514, 1, 1 },
-        { ahd_patch14_func, 515, 1, 2 },
-        { ahd_patch0_func, 516, 1, 1 },
-        { ahd_patch15_func, 519, 1, 1 },
-        { ahd_patch14_func, 520, 1, 1 },
-        { ahd_patch16_func, 531, 1, 2 },
-        { ahd_patch0_func, 532, 1, 1 },
-        { ahd_patch1_func, 551, 1, 2 },
-        { ahd_patch0_func, 552, 1, 1 },
-        { ahd_patch1_func, 555, 1, 2 },
-        { ahd_patch0_func, 556, 1, 1 },
-        { ahd_patch2_func, 561, 1, 2 },
-        { ahd_patch0_func, 562, 1, 1 },
-        { ahd_patch2_func, 566, 1, 2 },
-        { ahd_patch0_func, 567, 1, 1 },
-        { ahd_patch1_func, 568, 1, 2 },
-        { ahd_patch0_func, 569, 1, 1 },
-        { ahd_patch2_func, 580, 1, 2 },
-        { ahd_patch0_func, 581, 1, 1 },
-        { ahd_patch17_func, 585, 1, 1 },
-        { ahd_patch18_func, 590, 1, 1 },
-        { ahd_patch19_func, 591, 2, 1 },
-        { ahd_patch18_func, 595, 1, 2 },
-        { ahd_patch0_func, 596, 1, 1 },
-        { ahd_patch2_func, 599, 1, 2 },
-        { ahd_patch0_func, 600, 1, 1 },
-        { ahd_patch2_func, 615, 1, 2 },
-        { ahd_patch0_func, 616, 1, 1 },
-        { ahd_patch20_func, 617, 14, 1 },
-        { ahd_patch1_func, 635, 1, 2 },
-        { ahd_patch0_func, 636, 1, 1 },
-        { ahd_patch20_func, 637, 1, 1 },
-        { ahd_patch1_func, 649, 1, 2 },
-        { ahd_patch0_func, 650, 1, 1 },
-        { ahd_patch1_func, 657, 1, 2 },
-        { ahd_patch0_func, 658, 1, 1 },
-        { ahd_patch17_func, 681, 1, 1 },
-        { ahd_patch17_func, 719, 1, 1 },
-        { ahd_patch1_func, 730, 1, 2 },
-        { ahd_patch0_func, 731, 1, 1 },
-        { ahd_patch1_func, 748, 1, 2 },
-        { ahd_patch0_func, 749, 1, 1 },
-        { ahd_patch1_func, 751, 1, 2 },
-        { ahd_patch0_func, 752, 1, 1 },
-        { ahd_patch1_func, 755, 1, 2 },
-        { ahd_patch0_func, 756, 1, 1 },
-        { ahd_patch21_func, 758, 1, 2 },
-        { ahd_patch0_func, 759, 2, 1 },
-        { ahd_patch22_func, 762, 4, 2 },
-        { ahd_patch0_func, 766, 1, 1 },
-        { ahd_patch22_func, 774, 11, 1 }
+        { ahd_patch3_func, 36, 5, 1 },
+        { ahd_patch2_func, 45, 1, 2 },
+        { ahd_patch0_func, 46, 1, 1 },
+        { ahd_patch1_func, 53, 1, 2 },
+        { ahd_patch0_func, 54, 1, 1 },
+        { ahd_patch2_func, 59, 1, 2 },
+        { ahd_patch0_func, 60, 1, 1 },
+        { ahd_patch2_func, 63, 1, 2 },
+        { ahd_patch0_func, 64, 1, 1 },
+        { ahd_patch2_func, 67, 1, 2 },
+        { ahd_patch0_func, 68, 1, 1 },
+        { ahd_patch4_func, 116, 1, 1 },
+        { ahd_patch2_func, 175, 3, 1 },
+        { ahd_patch1_func, 178, 2, 1 },
+        { ahd_patch5_func, 180, 1, 1 },
+        { ahd_patch2_func, 189, 1, 2 },
+        { ahd_patch0_func, 190, 1, 1 },
+        { ahd_patch6_func, 191, 2, 2 },
+        { ahd_patch0_func, 193, 6, 3 },
+        { ahd_patch2_func, 196, 1, 2 },
+        { ahd_patch0_func, 197, 1, 1 },
+        { ahd_patch2_func, 200, 1, 2 },
+        { ahd_patch0_func, 201, 1, 1 },
+        { ahd_patch3_func, 203, 1, 1 },
+        { ahd_patch7_func, 204, 3, 1 },
+        { ahd_patch3_func, 213, 1, 1 },
+        { ahd_patch5_func, 214, 16, 2 },
+        { ahd_patch0_func, 230, 1, 1 },
+        { ahd_patch8_func, 250, 2, 1 },
+        { ahd_patch1_func, 254, 1, 2 },
+        { ahd_patch0_func, 255, 1, 1 },
+        { ahd_patch7_func, 258, 3, 1 },
+        { ahd_patch1_func, 273, 1, 2 },
+        { ahd_patch0_func, 274, 1, 1 },
+        { ahd_patch1_func, 277, 1, 2 },
+        { ahd_patch0_func, 278, 1, 1 },
+        { ahd_patch2_func, 281, 1, 2 },
+        { ahd_patch0_func, 282, 1, 1 },
+        { ahd_patch9_func, 295, 2, 2 },
+        { ahd_patch0_func, 297, 1, 1 },
+        { ahd_patch1_func, 339, 1, 2 },
+        { ahd_patch0_func, 340, 1, 1 },
+        { ahd_patch2_func, 348, 1, 2 },
+        { ahd_patch0_func, 349, 1, 1 },
+        { ahd_patch2_func, 352, 1, 2 },
+        { ahd_patch0_func, 353, 1, 1 },
+        { ahd_patch1_func, 359, 1, 2 },
+        { ahd_patch0_func, 360, 1, 1 },
+        { ahd_patch1_func, 362, 1, 2 },
+        { ahd_patch0_func, 363, 1, 1 },
+        { ahd_patch10_func, 382, 1, 1 },
+        { ahd_patch10_func, 385, 1, 1 },
+        { ahd_patch10_func, 387, 1, 1 },
+        { ahd_patch10_func, 399, 1, 1 },
+        { ahd_patch1_func, 409, 1, 2 },
+        { ahd_patch0_func, 410, 1, 1 },
+        { ahd_patch1_func, 412, 1, 2 },
+        { ahd_patch0_func, 413, 1, 1 },
+        { ahd_patch1_func, 421, 1, 2 },
+        { ahd_patch0_func, 422, 1, 1 },
+        { ahd_patch2_func, 435, 1, 2 },
+        { ahd_patch0_func, 436, 1, 1 },
+        { ahd_patch11_func, 472, 1, 1 },
+        { ahd_patch1_func, 480, 1, 2 },
+        { ahd_patch0_func, 481, 1, 1 },
+        { ahd_patch2_func, 493, 1, 2 },
+        { ahd_patch0_func, 494, 1, 1 },
+        { ahd_patch12_func, 497, 6, 2 },
+        { ahd_patch0_func, 503, 1, 1 },
+        { ahd_patch13_func, 524, 7, 1 },
+        { ahd_patch14_func, 533, 1, 1 },
+        { ahd_patch15_func, 542, 1, 1 },
+        { ahd_patch16_func, 543, 1, 2 },
+        { ahd_patch0_func, 544, 1, 1 },
+        { ahd_patch17_func, 547, 1, 1 },
+        { ahd_patch16_func, 548, 1, 1 },
+        { ahd_patch18_func, 559, 1, 2 },
+        { ahd_patch0_func, 560, 1, 1 },
+        { ahd_patch1_func, 579, 1, 2 },
+        { ahd_patch0_func, 580, 1, 1 },
+        { ahd_patch1_func, 583, 1, 2 },
+        { ahd_patch0_func, 584, 1, 1 },
+        { ahd_patch2_func, 589, 1, 2 },
+        { ahd_patch0_func, 590, 1, 1 },
+        { ahd_patch2_func, 594, 1, 2 },
+        { ahd_patch0_func, 595, 1, 1 },
+        { ahd_patch1_func, 596, 1, 2 },
+        { ahd_patch0_func, 597, 1, 1 },
+        { ahd_patch2_func, 608, 1, 2 },
+        { ahd_patch0_func, 609, 1, 1 },
+        { ahd_patch19_func, 613, 1, 1 },
+        { ahd_patch20_func, 618, 1, 1 },
+        { ahd_patch21_func, 619, 2, 1 },
+        { ahd_patch20_func, 623, 1, 2 },
+        { ahd_patch0_func, 624, 1, 1 },
+        { ahd_patch2_func, 627, 1, 2 },
+        { ahd_patch0_func, 628, 1, 1 },
+        { ahd_patch2_func, 643, 1, 2 },
+        { ahd_patch0_func, 644, 1, 1 },
+        { ahd_patch13_func, 645, 14, 1 },
+        { ahd_patch1_func, 663, 1, 2 },
+        { ahd_patch0_func, 664, 1, 1 },
+        { ahd_patch13_func, 665, 1, 1 },
+        { ahd_patch1_func, 677, 1, 2 },
+        { ahd_patch0_func, 678, 1, 1 },
+        { ahd_patch1_func, 685, 1, 2 },
+        { ahd_patch0_func, 686, 1, 1 },
+        { ahd_patch19_func, 709, 1, 1 },
+        { ahd_patch19_func, 747, 1, 1 },
+        { ahd_patch1_func, 758, 1, 2 },
+        { ahd_patch0_func, 759, 1, 1 },
+        { ahd_patch1_func, 776, 1, 2 },
+        { ahd_patch0_func, 777, 1, 1 },
+        { ahd_patch1_func, 779, 1, 2 },
+        { ahd_patch0_func, 780, 1, 1 },
+        { ahd_patch1_func, 783, 1, 2 },
+        { ahd_patch0_func, 784, 1, 1 },
+        { ahd_patch22_func, 786, 1, 2 },
+        { ahd_patch0_func, 787, 2, 1 },
+        { ahd_patch23_func, 790, 4, 2 },
+        { ahd_patch0_func, 794, 1, 1 },
+        { ahd_patch23_func, 802, 11, 1 }
 };
 
 static struct cs {
         uint16_t        begin;
         uint16_t        end;
 } critical_sections[] = {
-        { 11, 12 },
-        { 13, 14 },
-        { 29, 42 },
-        { 56, 59 },
-        { 101, 128 },
-        { 129, 157 },
-        { 159, 162 },
-        { 170, 178 },
-        { 201, 250 },
-        { 681, 697 },
-        { 697, 711 },
-        { 721, 725 }
+        { 17, 28 },
+        { 29, 30 },
+        { 47, 58 },
+        { 61, 63 },
+        { 65, 66 },
+        { 72, 92 },
+        { 110, 137 },
+        { 138, 175 },
+        { 180, 188 },
+        { 213, 264 },
+        { 425, 433 },
+        { 443, 445 },
+        { 448, 457 },
+        { 709, 739 },
+        { 749, 753 }
 };
 
 static const int num_critical_sections = sizeof(critical_sections)