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authorSivakumar Subramani <sivakumar.subramani@neterion.com>2007-09-18 18:14:20 -0400
committerDavid S. Miller <davem@sunset.davemloft.net>2007-10-10 19:51:47 -0400
commit8a4bdbaa93c2df4cfac2174ba536cd586014787d (patch)
treed2f23af4748c039a1062a6a6fd433cd8dc8e26f3 /drivers
parentbd684e43d6290d40876230a68a0a6481dc24950a (diff)
S2io: Removed unused feature - bimodal interrupts
Removed bimodal interrupt support - unused feature Signed-off-by: Sivakumar Subramani <sivakumar.subramani@neterion.com> Signed-off-by: Ramkrishna Vepa <ram.vepa@neterion.com> Signed-off-by: Jeff Garzik <jeff@garzik.org> [also, trim trailing whitespace]
Diffstat (limited to 'drivers')
-rw-r--r--drivers/net/s2io.c232
-rw-r--r--drivers/net/s2io.h1
2 files changed, 88 insertions, 145 deletions
diff --git a/drivers/net/s2io.c b/drivers/net/s2io.c
index 75102fb69519..3885f6b83cc3 100644
--- a/drivers/net/s2io.c
+++ b/drivers/net/s2io.c
@@ -84,7 +84,7 @@
84#include "s2io.h" 84#include "s2io.h"
85#include "s2io-regs.h" 85#include "s2io-regs.h"
86 86
87#define DRV_VERSION "2.0.26.2" 87#define DRV_VERSION "2.0.26.4"
88 88
89/* S2io Driver name & version. */ 89/* S2io Driver name & version. */
90static char s2io_driver_name[] = "Neterion"; 90static char s2io_driver_name[] = "Neterion";
@@ -452,7 +452,6 @@ S2IO_PARM_INT(mc_pause_threshold_q4q7, 187);
452S2IO_PARM_INT(shared_splits, 0); 452S2IO_PARM_INT(shared_splits, 0);
453S2IO_PARM_INT(tmac_util_period, 5); 453S2IO_PARM_INT(tmac_util_period, 5);
454S2IO_PARM_INT(rmac_util_period, 5); 454S2IO_PARM_INT(rmac_util_period, 5);
455S2IO_PARM_INT(bimodal, 0);
456S2IO_PARM_INT(l3l4hdr_size, 128); 455S2IO_PARM_INT(l3l4hdr_size, 128);
457/* Frequency of Rx desc syncs expressed as power of 2 */ 456/* Frequency of Rx desc syncs expressed as power of 2 */
458S2IO_PARM_INT(rxsync_frequency, 3); 457S2IO_PARM_INT(rxsync_frequency, 3);
@@ -699,7 +698,7 @@ static int init_shared_mem(struct s2io_nic *nic)
699 GFP_KERNEL); 698 GFP_KERNEL);
700 if (!rx_blocks->rxds) 699 if (!rx_blocks->rxds)
701 return -ENOMEM; 700 return -ENOMEM;
702 mem_allocated += 701 mem_allocated +=
703 (sizeof(struct rxd_info)* rxd_count[nic->rxd_mode]); 702 (sizeof(struct rxd_info)* rxd_count[nic->rxd_mode]);
704 for (l=0; l<rxd_count[nic->rxd_mode];l++) { 703 for (l=0; l<rxd_count[nic->rxd_mode];l++) {
705 rx_blocks->rxds[l].virt_addr = 704 rx_blocks->rxds[l].virt_addr =
@@ -761,7 +760,7 @@ static int init_shared_mem(struct s2io_nic *nic)
761 (BUF0_LEN + ALIGN_SIZE, GFP_KERNEL); 760 (BUF0_LEN + ALIGN_SIZE, GFP_KERNEL);
762 if (!ba->ba_0_org) 761 if (!ba->ba_0_org)
763 return -ENOMEM; 762 return -ENOMEM;
764 mem_allocated += 763 mem_allocated +=
765 (BUF0_LEN + ALIGN_SIZE); 764 (BUF0_LEN + ALIGN_SIZE);
766 tmp = (unsigned long)ba->ba_0_org; 765 tmp = (unsigned long)ba->ba_0_org;
767 tmp += ALIGN_SIZE; 766 tmp += ALIGN_SIZE;
@@ -772,7 +771,7 @@ static int init_shared_mem(struct s2io_nic *nic)
772 (BUF1_LEN + ALIGN_SIZE, GFP_KERNEL); 771 (BUF1_LEN + ALIGN_SIZE, GFP_KERNEL);
773 if (!ba->ba_1_org) 772 if (!ba->ba_1_org)
774 return -ENOMEM; 773 return -ENOMEM;
775 mem_allocated 774 mem_allocated
776 += (BUF1_LEN + ALIGN_SIZE); 775 += (BUF1_LEN + ALIGN_SIZE);
777 tmp = (unsigned long) ba->ba_1_org; 776 tmp = (unsigned long) ba->ba_1_org;
778 tmp += ALIGN_SIZE; 777 tmp += ALIGN_SIZE;
@@ -857,7 +856,7 @@ static void free_shared_mem(struct s2io_nic *nic)
857 mac_control->fifos[i]. 856 mac_control->fifos[i].
858 list_info[mem_blks]. 857 list_info[mem_blks].
859 list_phy_addr); 858 list_phy_addr);
860 nic->mac_control.stats_info->sw_stat.mem_freed 859 nic->mac_control.stats_info->sw_stat.mem_freed
861 += PAGE_SIZE; 860 += PAGE_SIZE;
862 } 861 }
863 /* If we got a zero DMA address during allocation, 862 /* If we got a zero DMA address during allocation,
@@ -872,11 +871,11 @@ static void free_shared_mem(struct s2io_nic *nic)
872 dev->name); 871 dev->name);
873 DBG_PRINT(INIT_DBG, "Virtual address %p\n", 872 DBG_PRINT(INIT_DBG, "Virtual address %p\n",
874 mac_control->zerodma_virt_addr); 873 mac_control->zerodma_virt_addr);
875 nic->mac_control.stats_info->sw_stat.mem_freed 874 nic->mac_control.stats_info->sw_stat.mem_freed
876 += PAGE_SIZE; 875 += PAGE_SIZE;
877 } 876 }
878 kfree(mac_control->fifos[i].list_info); 877 kfree(mac_control->fifos[i].list_info);
879 nic->mac_control.stats_info->sw_stat.mem_freed += 878 nic->mac_control.stats_info->sw_stat.mem_freed +=
880 (nic->config.tx_cfg[i].fifo_len *sizeof(struct list_info_hold)); 879 (nic->config.tx_cfg[i].fifo_len *sizeof(struct list_info_hold));
881 } 880 }
882 881
@@ -894,7 +893,7 @@ static void free_shared_mem(struct s2io_nic *nic)
894 tmp_v_addr, tmp_p_addr); 893 tmp_v_addr, tmp_p_addr);
895 nic->mac_control.stats_info->sw_stat.mem_freed += size; 894 nic->mac_control.stats_info->sw_stat.mem_freed += size;
896 kfree(mac_control->rings[i].rx_blocks[j].rxds); 895 kfree(mac_control->rings[i].rx_blocks[j].rxds);
897 nic->mac_control.stats_info->sw_stat.mem_freed += 896 nic->mac_control.stats_info->sw_stat.mem_freed +=
898 ( sizeof(struct rxd_info)* rxd_count[nic->rxd_mode]); 897 ( sizeof(struct rxd_info)* rxd_count[nic->rxd_mode]);
899 } 898 }
900 } 899 }
@@ -925,7 +924,7 @@ static void free_shared_mem(struct s2io_nic *nic)
925 (rxd_count[nic->rxd_mode] + 1)); 924 (rxd_count[nic->rxd_mode] + 1));
926 } 925 }
927 kfree(mac_control->rings[i].ba); 926 kfree(mac_control->rings[i].ba);
928 nic->mac_control.stats_info->sw_stat.mem_freed += 927 nic->mac_control.stats_info->sw_stat.mem_freed +=
929 (sizeof(struct buffAdd *) * blk_cnt); 928 (sizeof(struct buffAdd *) * blk_cnt);
930 } 929 }
931 } 930 }
@@ -935,12 +934,12 @@ static void free_shared_mem(struct s2io_nic *nic)
935 mac_control->stats_mem_sz, 934 mac_control->stats_mem_sz,
936 mac_control->stats_mem, 935 mac_control->stats_mem,
937 mac_control->stats_mem_phy); 936 mac_control->stats_mem_phy);
938 nic->mac_control.stats_info->sw_stat.mem_freed += 937 nic->mac_control.stats_info->sw_stat.mem_freed +=
939 mac_control->stats_mem_sz; 938 mac_control->stats_mem_sz;
940 } 939 }
941 if (nic->ufo_in_band_v) { 940 if (nic->ufo_in_band_v) {
942 kfree(nic->ufo_in_band_v); 941 kfree(nic->ufo_in_band_v);
943 nic->mac_control.stats_info->sw_stat.mem_freed 942 nic->mac_control.stats_info->sw_stat.mem_freed
944 += (ufo_size * sizeof(u64)); 943 += (ufo_size * sizeof(u64));
945 } 944 }
946} 945}
@@ -1485,7 +1484,7 @@ static int init_nic(struct s2io_nic *nic)
1485 &bar0->rts_frm_len_n[i]); 1484 &bar0->rts_frm_len_n[i]);
1486 } 1485 }
1487 } 1486 }
1488 1487
1489 /* Disable differentiated services steering logic */ 1488 /* Disable differentiated services steering logic */
1490 for (i = 0; i < 64; i++) { 1489 for (i = 0; i < 64; i++) {
1491 if (rts_ds_steer(nic, i, 0) == FAILURE) { 1490 if (rts_ds_steer(nic, i, 0) == FAILURE) {
@@ -1565,90 +1564,57 @@ static int init_nic(struct s2io_nic *nic)
1565 time++; 1564 time++;
1566 } 1565 }
1567 1566
1568 if (nic->config.bimodal) { 1567 /* RTI Initialization */
1569 int k = 0; 1568 if (nic->device_type == XFRAME_II_DEVICE) {
1570 for (k = 0; k < config->rx_ring_num; k++) {
1571 val64 = TTI_CMD_MEM_WE | TTI_CMD_MEM_STROBE_NEW_CMD;
1572 val64 |= TTI_CMD_MEM_OFFSET(0x38+k);
1573 writeq(val64, &bar0->tti_command_mem);
1574
1575 /* 1569 /*
1576 * Once the operation completes, the Strobe bit of the command 1570 * Programmed to generate Apprx 500 Intrs per
1577 * register will be reset. We poll for this particular condition 1571 * second
1578 * We wait for a maximum of 500ms for the operation to complete, 1572 */
1579 * if it's not complete by then we return error. 1573 int count = (nic->config.bus_speed * 125)/4;
1580 */ 1574 val64 = RTI_DATA1_MEM_RX_TIMER_VAL(count);
1581 time = 0; 1575 } else
1582 while (TRUE) { 1576 val64 = RTI_DATA1_MEM_RX_TIMER_VAL(0xFFF);
1583 val64 = readq(&bar0->tti_command_mem); 1577 val64 |= RTI_DATA1_MEM_RX_URNG_A(0xA) |
1584 if (!(val64 & TTI_CMD_MEM_STROBE_NEW_CMD)) { 1578 RTI_DATA1_MEM_RX_URNG_B(0x10) |
1585 break; 1579 RTI_DATA1_MEM_RX_URNG_C(0x30) | RTI_DATA1_MEM_RX_TIMER_AC_EN;
1586 } 1580
1587 if (time > 10) { 1581 writeq(val64, &bar0->rti_data1_mem);
1588 DBG_PRINT(ERR_DBG, 1582
1589 "%s: TTI init Failed\n", 1583 val64 = RTI_DATA2_MEM_RX_UFC_A(0x1) |
1590 dev->name); 1584 RTI_DATA2_MEM_RX_UFC_B(0x2) ;
1591 return -1; 1585 if (nic->config.intr_type == MSI_X)
1592 } 1586 val64 |= (RTI_DATA2_MEM_RX_UFC_C(0x20) | \
1593 time++; 1587 RTI_DATA2_MEM_RX_UFC_D(0x40));
1594 msleep(50); 1588 else
1595 } 1589 val64 |= (RTI_DATA2_MEM_RX_UFC_C(0x40) | \
1596 } 1590 RTI_DATA2_MEM_RX_UFC_D(0x80));
1597 } else { 1591 writeq(val64, &bar0->rti_data2_mem);
1598
1599 /* RTI Initialization */
1600 if (nic->device_type == XFRAME_II_DEVICE) {
1601 /*
1602 * Programmed to generate Apprx 500 Intrs per
1603 * second
1604 */
1605 int count = (nic->config.bus_speed * 125)/4;
1606 val64 = RTI_DATA1_MEM_RX_TIMER_VAL(count);
1607 } else {
1608 val64 = RTI_DATA1_MEM_RX_TIMER_VAL(0xFFF);
1609 }
1610 val64 |= RTI_DATA1_MEM_RX_URNG_A(0xA) |
1611 RTI_DATA1_MEM_RX_URNG_B(0x10) |
1612 RTI_DATA1_MEM_RX_URNG_C(0x30) | RTI_DATA1_MEM_RX_TIMER_AC_EN;
1613
1614 writeq(val64, &bar0->rti_data1_mem);
1615 1592
1616 val64 = RTI_DATA2_MEM_RX_UFC_A(0x1) | 1593 for (i = 0; i < config->rx_ring_num; i++) {
1617 RTI_DATA2_MEM_RX_UFC_B(0x2) ; 1594 val64 = RTI_CMD_MEM_WE | RTI_CMD_MEM_STROBE_NEW_CMD
1618 if (nic->config.intr_type == MSI_X) 1595 | RTI_CMD_MEM_OFFSET(i);
1619 val64 |= (RTI_DATA2_MEM_RX_UFC_C(0x20) | \ 1596 writeq(val64, &bar0->rti_command_mem);
1620 RTI_DATA2_MEM_RX_UFC_D(0x40));
1621 else
1622 val64 |= (RTI_DATA2_MEM_RX_UFC_C(0x40) | \
1623 RTI_DATA2_MEM_RX_UFC_D(0x80));
1624 writeq(val64, &bar0->rti_data2_mem);
1625 1597
1626 for (i = 0; i < config->rx_ring_num; i++) { 1598 /*
1627 val64 = RTI_CMD_MEM_WE | RTI_CMD_MEM_STROBE_NEW_CMD 1599 * Once the operation completes, the Strobe bit of the
1628 | RTI_CMD_MEM_OFFSET(i); 1600 * command register will be reset. We poll for this
1629 writeq(val64, &bar0->rti_command_mem); 1601 * particular condition. We wait for a maximum of 500ms
1602 * for the operation to complete, if it's not complete
1603 * by then we return error.
1604 */
1605 time = 0;
1606 while (TRUE) {
1607 val64 = readq(&bar0->rti_command_mem);
1608 if (!(val64 & RTI_CMD_MEM_STROBE_NEW_CMD))
1609 break;
1630 1610
1631 /* 1611 if (time > 10) {
1632 * Once the operation completes, the Strobe bit of the 1612 DBG_PRINT(ERR_DBG, "%s: RTI init Failed\n",
1633 * command register will be reset. We poll for this 1613 dev->name);
1634 * particular condition. We wait for a maximum of 500ms 1614 return -1;
1635 * for the operation to complete, if it's not complete
1636 * by then we return error.
1637 */
1638 time = 0;
1639 while (TRUE) {
1640 val64 = readq(&bar0->rti_command_mem);
1641 if (!(val64 & RTI_CMD_MEM_STROBE_NEW_CMD)) {
1642 break;
1643 }
1644 if (time > 10) {
1645 DBG_PRINT(ERR_DBG, "%s: RTI init Failed\n",
1646 dev->name);
1647 return -1;
1648 }
1649 time++;
1650 msleep(50);
1651 } 1615 }
1616 time++;
1617 msleep(50);
1652 } 1618 }
1653 } 1619 }
1654 1620
@@ -2005,7 +1971,7 @@ static int verify_pcc_quiescent(struct s2io_nic *sp, int flag)
2005 int ret = 0, herc; 1971 int ret = 0, herc;
2006 struct XENA_dev_config __iomem *bar0 = sp->bar0; 1972 struct XENA_dev_config __iomem *bar0 = sp->bar0;
2007 u64 val64 = readq(&bar0->adapter_status); 1973 u64 val64 = readq(&bar0->adapter_status);
2008 1974
2009 herc = (sp->device_type == XFRAME_II_DEVICE); 1975 herc = (sp->device_type == XFRAME_II_DEVICE);
2010 1976
2011 if (flag == FALSE) { 1977 if (flag == FALSE) {
@@ -2151,8 +2117,6 @@ static int start_nic(struct s2io_nic *nic)
2151 &bar0->prc_rxd0_n[i]); 2117 &bar0->prc_rxd0_n[i]);
2152 2118
2153 val64 = readq(&bar0->prc_ctrl_n[i]); 2119 val64 = readq(&bar0->prc_ctrl_n[i]);
2154 if (nic->config.bimodal)
2155 val64 |= PRC_CTRL_BIMODAL_INTERRUPT;
2156 if (nic->rxd_mode == RXD_MODE_1) 2120 if (nic->rxd_mode == RXD_MODE_1)
2157 val64 |= PRC_CTRL_RC_ENABLED; 2121 val64 |= PRC_CTRL_RC_ENABLED;
2158 else 2122 else
@@ -2312,7 +2276,7 @@ static void free_tx_buffers(struct s2io_nic *nic)
2312 mac_control->fifos[i].list_info[j].list_virt_addr; 2276 mac_control->fifos[i].list_info[j].list_virt_addr;
2313 skb = s2io_txdl_getskb(&mac_control->fifos[i], txdp, j); 2277 skb = s2io_txdl_getskb(&mac_control->fifos[i], txdp, j);
2314 if (skb) { 2278 if (skb) {
2315 nic->mac_control.stats_info->sw_stat.mem_freed 2279 nic->mac_control.stats_info->sw_stat.mem_freed
2316 += skb->truesize; 2280 += skb->truesize;
2317 dev_kfree_skb(skb); 2281 dev_kfree_skb(skb);
2318 cnt++; 2282 cnt++;
@@ -2477,7 +2441,7 @@ static int fill_rx_buffers(struct s2io_nic *nic, int ring_no)
2477 mem_alloc_fail_cnt++; 2441 mem_alloc_fail_cnt++;
2478 return -ENOMEM ; 2442 return -ENOMEM ;
2479 } 2443 }
2480 nic->mac_control.stats_info->sw_stat.mem_allocated 2444 nic->mac_control.stats_info->sw_stat.mem_allocated
2481 += skb->truesize; 2445 += skb->truesize;
2482 if (nic->rxd_mode == RXD_MODE_1) { 2446 if (nic->rxd_mode == RXD_MODE_1) {
2483 /* 1 buffer mode - normal operation mode */ 2447 /* 1 buffer mode - normal operation mode */
@@ -2492,7 +2456,7 @@ static int fill_rx_buffers(struct s2io_nic *nic, int ring_no)
2492 DMA_ERROR_CODE)) 2456 DMA_ERROR_CODE))
2493 goto pci_map_failed; 2457 goto pci_map_failed;
2494 2458
2495 rxdp->Control_2 = 2459 rxdp->Control_2 =
2496 SET_BUFFER0_SIZE_1(size - NET_IP_ALIGN); 2460 SET_BUFFER0_SIZE_1(size - NET_IP_ALIGN);
2497 2461
2498 } else if (nic->rxd_mode == RXD_MODE_3B) { 2462 } else if (nic->rxd_mode == RXD_MODE_3B) {
@@ -3406,7 +3370,7 @@ static void s2io_reset(struct s2io_nic * sp)
3406 3370
3407 /* Reset device statistics maintained by OS */ 3371 /* Reset device statistics maintained by OS */
3408 memset(&sp->stats, 0, sizeof (struct net_device_stats)); 3372 memset(&sp->stats, 0, sizeof (struct net_device_stats));
3409 3373
3410 up_cnt = sp->mac_control.stats_info->sw_stat.link_up_cnt; 3374 up_cnt = sp->mac_control.stats_info->sw_stat.link_up_cnt;
3411 down_cnt = sp->mac_control.stats_info->sw_stat.link_down_cnt; 3375 down_cnt = sp->mac_control.stats_info->sw_stat.link_down_cnt;
3412 up_time = sp->mac_control.stats_info->sw_stat.link_up_time; 3376 up_time = sp->mac_control.stats_info->sw_stat.link_up_time;
@@ -3668,22 +3632,22 @@ static int s2io_enable_msi_x(struct s2io_nic *nic)
3668 nic->mac_control.stats_info->sw_stat.mem_alloc_fail_cnt++; 3632 nic->mac_control.stats_info->sw_stat.mem_alloc_fail_cnt++;
3669 return -ENOMEM; 3633 return -ENOMEM;
3670 } 3634 }
3671 nic->mac_control.stats_info->sw_stat.mem_allocated 3635 nic->mac_control.stats_info->sw_stat.mem_allocated
3672 += (MAX_REQUESTED_MSI_X * sizeof(struct msix_entry)); 3636 += (MAX_REQUESTED_MSI_X * sizeof(struct msix_entry));
3673 3637
3674 nic->s2io_entries = 3638 nic->s2io_entries =
3675 kcalloc(MAX_REQUESTED_MSI_X, sizeof(struct s2io_msix_entry), 3639 kcalloc(MAX_REQUESTED_MSI_X, sizeof(struct s2io_msix_entry),
3676 GFP_KERNEL); 3640 GFP_KERNEL);
3677 if (!nic->s2io_entries) { 3641 if (!nic->s2io_entries) {
3678 DBG_PRINT(INFO_DBG, "%s: Memory allocation failed\n", 3642 DBG_PRINT(INFO_DBG, "%s: Memory allocation failed\n",
3679 __FUNCTION__); 3643 __FUNCTION__);
3680 nic->mac_control.stats_info->sw_stat.mem_alloc_fail_cnt++; 3644 nic->mac_control.stats_info->sw_stat.mem_alloc_fail_cnt++;
3681 kfree(nic->entries); 3645 kfree(nic->entries);
3682 nic->mac_control.stats_info->sw_stat.mem_freed 3646 nic->mac_control.stats_info->sw_stat.mem_freed
3683 += (MAX_REQUESTED_MSI_X * sizeof(struct msix_entry)); 3647 += (MAX_REQUESTED_MSI_X * sizeof(struct msix_entry));
3684 return -ENOMEM; 3648 return -ENOMEM;
3685 } 3649 }
3686 nic->mac_control.stats_info->sw_stat.mem_allocated 3650 nic->mac_control.stats_info->sw_stat.mem_allocated
3687 += (MAX_REQUESTED_MSI_X * sizeof(struct s2io_msix_entry)); 3651 += (MAX_REQUESTED_MSI_X * sizeof(struct s2io_msix_entry));
3688 3652
3689 for (i=0; i< MAX_REQUESTED_MSI_X; i++) { 3653 for (i=0; i< MAX_REQUESTED_MSI_X; i++) {
@@ -3702,27 +3666,15 @@ static int s2io_enable_msi_x(struct s2io_nic *nic)
3702 } 3666 }
3703 writeq(tx_mat, &bar0->tx_mat0_n[0]); 3667 writeq(tx_mat, &bar0->tx_mat0_n[0]);
3704 3668
3705 if (!nic->config.bimodal) { 3669 rx_mat = readq(&bar0->rx_mat);
3706 rx_mat = readq(&bar0->rx_mat); 3670 for (j = 0; j < nic->config.rx_ring_num; j++, msix_indx++) {
3707 for (j=0; j<nic->config.rx_ring_num; j++, msix_indx++) { 3671 rx_mat |= RX_MAT_SET(j, msix_indx);
3708 rx_mat |= RX_MAT_SET(j, msix_indx); 3672 nic->s2io_entries[msix_indx].arg
3709 nic->s2io_entries[msix_indx].arg 3673 = &nic->mac_control.rings[j];
3710 = &nic->mac_control.rings[j]; 3674 nic->s2io_entries[msix_indx].type = MSIX_RING_TYPE;
3711 nic->s2io_entries[msix_indx].type = MSIX_RING_TYPE; 3675 nic->s2io_entries[msix_indx].in_use = MSIX_FLG;
3712 nic->s2io_entries[msix_indx].in_use = MSIX_FLG;
3713 }
3714 writeq(rx_mat, &bar0->rx_mat);
3715 } else {
3716 tx_mat = readq(&bar0->tx_mat0_n[7]);
3717 for (j=0; j<nic->config.rx_ring_num; j++, msix_indx++) {
3718 tx_mat |= TX_MAT_SET(i, msix_indx);
3719 nic->s2io_entries[msix_indx].arg
3720 = &nic->mac_control.rings[j];
3721 nic->s2io_entries[msix_indx].type = MSIX_RING_TYPE;
3722 nic->s2io_entries[msix_indx].in_use = MSIX_FLG;
3723 }
3724 writeq(tx_mat, &bar0->tx_mat0_n[7]);
3725 } 3676 }
3677 writeq(rx_mat, &bar0->rx_mat);
3726 3678
3727 nic->avail_msix_vectors = 0; 3679 nic->avail_msix_vectors = 0;
3728 ret = pci_enable_msix(nic->pdev, nic->entries, MAX_REQUESTED_MSI_X); 3680 ret = pci_enable_msix(nic->pdev, nic->entries, MAX_REQUESTED_MSI_X);
@@ -3734,10 +3686,10 @@ static int s2io_enable_msi_x(struct s2io_nic *nic)
3734 if (ret) { 3686 if (ret) {
3735 DBG_PRINT(ERR_DBG, "%s: Enabling MSIX failed\n", nic->dev->name); 3687 DBG_PRINT(ERR_DBG, "%s: Enabling MSIX failed\n", nic->dev->name);
3736 kfree(nic->entries); 3688 kfree(nic->entries);
3737 nic->mac_control.stats_info->sw_stat.mem_freed 3689 nic->mac_control.stats_info->sw_stat.mem_freed
3738 += (MAX_REQUESTED_MSI_X * sizeof(struct msix_entry)); 3690 += (MAX_REQUESTED_MSI_X * sizeof(struct msix_entry));
3739 kfree(nic->s2io_entries); 3691 kfree(nic->s2io_entries);
3740 nic->mac_control.stats_info->sw_stat.mem_freed 3692 nic->mac_control.stats_info->sw_stat.mem_freed
3741 += (MAX_REQUESTED_MSI_X * sizeof(struct s2io_msix_entry)); 3693 += (MAX_REQUESTED_MSI_X * sizeof(struct s2io_msix_entry));
3742 nic->entries = NULL; 3694 nic->entries = NULL;
3743 nic->s2io_entries = NULL; 3695 nic->s2io_entries = NULL;
@@ -3906,12 +3858,12 @@ hw_init_failed:
3906 if (sp->config.intr_type == MSI_X) { 3858 if (sp->config.intr_type == MSI_X) {
3907 if (sp->entries) { 3859 if (sp->entries) {
3908 kfree(sp->entries); 3860 kfree(sp->entries);
3909 sp->mac_control.stats_info->sw_stat.mem_freed 3861 sp->mac_control.stats_info->sw_stat.mem_freed
3910 += (MAX_REQUESTED_MSI_X * sizeof(struct msix_entry)); 3862 += (MAX_REQUESTED_MSI_X * sizeof(struct msix_entry));
3911 } 3863 }
3912 if (sp->s2io_entries) { 3864 if (sp->s2io_entries) {
3913 kfree(sp->s2io_entries); 3865 kfree(sp->s2io_entries);
3914 sp->mac_control.stats_info->sw_stat.mem_freed 3866 sp->mac_control.stats_info->sw_stat.mem_freed
3915 += (MAX_REQUESTED_MSI_X * sizeof(struct s2io_msix_entry)); 3867 += (MAX_REQUESTED_MSI_X * sizeof(struct s2io_msix_entry));
3916 } 3868 }
3917 } 3869 }
@@ -4676,7 +4628,7 @@ static void s2io_updt_stats(struct s2io_nic *sp)
4676 if (cnt == 5) 4628 if (cnt == 5)
4677 break; /* Updt failed */ 4629 break; /* Updt failed */
4678 } while(1); 4630 } while(1);
4679 } 4631 }
4680} 4632}
4681 4633
4682/** 4634/**
@@ -5165,13 +5117,13 @@ static void s2io_ethtool_gringparam(struct net_device *dev,
5165 ering->rx_max_pending = MAX_RX_DESC_2; 5117 ering->rx_max_pending = MAX_RX_DESC_2;
5166 5118
5167 ering->tx_max_pending = MAX_TX_DESC; 5119 ering->tx_max_pending = MAX_TX_DESC;
5168 for (i = 0 ; i < sp->config.tx_fifo_num ; i++) 5120 for (i = 0 ; i < sp->config.tx_fifo_num ; i++)
5169 tx_desc_count += sp->config.tx_cfg[i].fifo_len; 5121 tx_desc_count += sp->config.tx_cfg[i].fifo_len;
5170 5122
5171 DBG_PRINT(INFO_DBG,"\nmax txds : %d\n",sp->config.max_txds); 5123 DBG_PRINT(INFO_DBG,"\nmax txds : %d\n",sp->config.max_txds);
5172 ering->tx_pending = tx_desc_count; 5124 ering->tx_pending = tx_desc_count;
5173 rx_desc_count = 0; 5125 rx_desc_count = 0;
5174 for (i = 0 ; i < sp->config.rx_ring_num ; i++) 5126 for (i = 0 ; i < sp->config.rx_ring_num ; i++)
5175 rx_desc_count += sp->config.rx_cfg[i].num_rxd; 5127 rx_desc_count += sp->config.rx_cfg[i].num_rxd;
5176 5128
5177 ering->rx_pending = rx_desc_count; 5129 ering->rx_pending = rx_desc_count;
@@ -6539,7 +6491,7 @@ static int set_rxd_buffer_pointer(struct s2io_nic *sp, struct RxD_t *rxdp,
6539 mem_alloc_fail_cnt++; 6491 mem_alloc_fail_cnt++;
6540 return -ENOMEM ; 6492 return -ENOMEM ;
6541 } 6493 }
6542 sp->mac_control.stats_info->sw_stat.mem_allocated 6494 sp->mac_control.stats_info->sw_stat.mem_allocated
6543 += (*skb)->truesize; 6495 += (*skb)->truesize;
6544 /* storing the mapped addr in a temp variable 6496 /* storing the mapped addr in a temp variable
6545 * such it will be used for next rxd whose 6497 * such it will be used for next rxd whose
@@ -6572,7 +6524,7 @@ static int set_rxd_buffer_pointer(struct s2io_nic *sp, struct RxD_t *rxdp,
6572 mem_alloc_fail_cnt++; 6524 mem_alloc_fail_cnt++;
6573 return -ENOMEM; 6525 return -ENOMEM;
6574 } 6526 }
6575 sp->mac_control.stats_info->sw_stat.mem_allocated 6527 sp->mac_control.stats_info->sw_stat.mem_allocated
6576 += (*skb)->truesize; 6528 += (*skb)->truesize;
6577 rxdp3->Buffer2_ptr = *temp2 = 6529 rxdp3->Buffer2_ptr = *temp2 =
6578 pci_map_single(sp->pdev, (*skb)->data, 6530 pci_map_single(sp->pdev, (*skb)->data,
@@ -7107,7 +7059,7 @@ static int rx_osm_handler(struct ring_info *ring_data, struct RxD_t * rxdp)
7107 DBG_PRINT(ERR_DBG, "%s: Rx error Value: 0x%x\n", 7059 DBG_PRINT(ERR_DBG, "%s: Rx error Value: 0x%x\n",
7108 dev->name, err_mask); 7060 dev->name, err_mask);
7109 sp->stats.rx_crc_errors++; 7061 sp->stats.rx_crc_errors++;
7110 sp->mac_control.stats_info->sw_stat.mem_freed 7062 sp->mac_control.stats_info->sw_stat.mem_freed
7111 += skb->truesize; 7063 += skb->truesize;
7112 dev_kfree_skb(skb); 7064 dev_kfree_skb(skb);
7113 atomic_dec(&sp->rx_bufs_left[ring_no]); 7065 atomic_dec(&sp->rx_bufs_left[ring_no]);
@@ -7261,13 +7213,13 @@ static void s2io_link(struct s2io_nic * sp, int link)
7261 DBG_PRINT(ERR_DBG, "%s: Link down\n", dev->name); 7213 DBG_PRINT(ERR_DBG, "%s: Link down\n", dev->name);
7262 netif_carrier_off(dev); 7214 netif_carrier_off(dev);
7263 if(sp->mac_control.stats_info->sw_stat.link_up_cnt) 7215 if(sp->mac_control.stats_info->sw_stat.link_up_cnt)
7264 sp->mac_control.stats_info->sw_stat.link_up_time = 7216 sp->mac_control.stats_info->sw_stat.link_up_time =
7265 jiffies - sp->start_time; 7217 jiffies - sp->start_time;
7266 sp->mac_control.stats_info->sw_stat.link_down_cnt++; 7218 sp->mac_control.stats_info->sw_stat.link_down_cnt++;
7267 } else { 7219 } else {
7268 DBG_PRINT(ERR_DBG, "%s: Link Up\n", dev->name); 7220 DBG_PRINT(ERR_DBG, "%s: Link Up\n", dev->name);
7269 if (sp->mac_control.stats_info->sw_stat.link_down_cnt) 7221 if (sp->mac_control.stats_info->sw_stat.link_down_cnt)
7270 sp->mac_control.stats_info->sw_stat.link_down_time = 7222 sp->mac_control.stats_info->sw_stat.link_down_time =
7271 jiffies - sp->start_time; 7223 jiffies - sp->start_time;
7272 sp->mac_control.stats_info->sw_stat.link_up_cnt++; 7224 sp->mac_control.stats_info->sw_stat.link_up_cnt++;
7273 netif_carrier_on(dev); 7225 netif_carrier_on(dev);
@@ -7752,14 +7704,6 @@ s2io_init_nic(struct pci_dev *pdev, const struct pci_device_id *pre)
7752 /* Initialize device name */ 7704 /* Initialize device name */
7753 sprintf(sp->name, "%s Neterion %s", dev->name, sp->product_name); 7705 sprintf(sp->name, "%s Neterion %s", dev->name, sp->product_name);
7754 7706
7755 /* Initialize bimodal Interrupts */
7756 sp->config.bimodal = bimodal;
7757 if (!(sp->device_type & XFRAME_II_DEVICE) && bimodal) {
7758 sp->config.bimodal = 0;
7759 DBG_PRINT(ERR_DBG,"%s:Bimodal intr not supported by Xframe I\n",
7760 dev->name);
7761 }
7762
7763 /* 7707 /*
7764 * Make Link state as off at this point, when the Link change 7708 * Make Link state as off at this point, when the Link change
7765 * interrupt comes the state will be automatically changed to 7709 * interrupt comes the state will be automatically changed to
diff --git a/drivers/net/s2io.h b/drivers/net/s2io.h
index 1a70cf02c915..9b645f406399 100644
--- a/drivers/net/s2io.h
+++ b/drivers/net/s2io.h
@@ -444,7 +444,6 @@ struct config_param {
444#define MAX_RX_BLOCKS_PER_RING 150 444#define MAX_RX_BLOCKS_PER_RING 150
445 445
446 struct rx_ring_config rx_cfg[MAX_RX_RINGS]; /*Per-Rx Ring config */ 446 struct rx_ring_config rx_cfg[MAX_RX_RINGS]; /*Per-Rx Ring config */
447 u8 bimodal; /*Flag for setting bimodal interrupts*/
448 447
449#define HEADER_ETHERNET_II_802_3_SIZE 14 448#define HEADER_ETHERNET_II_802_3_SIZE 14
450#define HEADER_802_2_SIZE 3 449#define HEADER_802_2_SIZE 3
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-28 11:37:07 -0500