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authorLuca Tettamanti <kronos.it@gmail.com>2009-12-28 16:53:05 -0500
committerDave Airlie <airlied@redhat.com>2010-01-06 22:57:16 -0500
commit43b19f161c7a9941e3aa7db0e3ee19b93980e3d7 (patch)
treedf39d02bca32040e80c86261f5945a3f5b019550 /drivers
parent65aa2f4e8d85b6145ef4834f440a63ab68bd7443 (diff)
drm/radeon/kms: rs600: use correct mask for SW interrupt
The mask happens to be the same, but the IH is reading the status, not the not the control register. Signed-off-by: Luca Tettamanti <kronos.it@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/gpu/drm/radeon/rs600.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/radeon/rs600.c b/drivers/gpu/drm/radeon/rs600.c
index 4f8ea4260572..4245218e954f 100644
--- a/drivers/gpu/drm/radeon/rs600.c
+++ b/drivers/gpu/drm/radeon/rs600.c
@@ -396,7 +396,7 @@ int rs600_irq_process(struct radeon_device *rdev)
396 } 396 }
397 while (status || r500_disp_int) { 397 while (status || r500_disp_int) {
398 /* SW interrupt */ 398 /* SW interrupt */
399 if (G_000040_SW_INT_EN(status)) 399 if (G_000044_SW_INT(status))
400 radeon_fence_process(rdev); 400 radeon_fence_process(rdev);
401 /* Vertical blank interrupts */ 401 /* Vertical blank interrupts */
402 if (G_007EDC_LB_D1_VBLANK_INTERRUPT(r500_disp_int)) 402 if (G_007EDC_LB_D1_VBLANK_INTERRUPT(r500_disp_int))