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authorBruce Allan <bruce.w.allan@intel.com>2009-07-01 09:27:31 -0400
committerDavid S. Miller <davem@davemloft.net>2009-07-03 23:09:27 -0400
commite65fa87c225fadd1980068b7d360e08ac0e985dd (patch)
tree2fbcced353577d5b992644f9e75303aed59877f2 /drivers
parente5d57af52464f37dd3c67906a493a6400bc51b43 (diff)
e1000e: PHY loopback broken on 82578
PHY loopback on 82578 fails to work as a result of flushing the packets in the FIFO buffer in the link stall workaround. Don't perform the workaround if in PHY loopback mode. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/net/e1000e/defines.h2
-rw-r--r--drivers/net/e1000e/phy.c5
2 files changed, 7 insertions, 0 deletions
diff --git a/drivers/net/e1000e/defines.h b/drivers/net/e1000e/defines.h
index 8890c97e1120..4329ec34b178 100644
--- a/drivers/net/e1000e/defines.h
+++ b/drivers/net/e1000e/defines.h
@@ -575,6 +575,8 @@
575#define PHY_1000T_STATUS 0x0A /* 1000Base-T Status Reg */ 575#define PHY_1000T_STATUS 0x0A /* 1000Base-T Status Reg */
576#define PHY_EXT_STATUS 0x0F /* Extended Status Reg */ 576#define PHY_EXT_STATUS 0x0F /* Extended Status Reg */
577 577
578#define PHY_CONTROL_LB 0x4000 /* PHY Loopback bit */
579
578/* NVM Control */ 580/* NVM Control */
579#define E1000_EECD_SK 0x00000001 /* NVM Clock */ 581#define E1000_EECD_SK 0x00000001 /* NVM Clock */
580#define E1000_EECD_CS 0x00000002 /* NVM Chip Select */ 582#define E1000_EECD_CS 0x00000002 /* NVM Chip Select */
diff --git a/drivers/net/e1000e/phy.c b/drivers/net/e1000e/phy.c
index e23459cf3d0e..d8453946bff8 100644
--- a/drivers/net/e1000e/phy.c
+++ b/drivers/net/e1000e/phy.c
@@ -2737,6 +2737,11 @@ s32 e1000_link_stall_workaround_hv(struct e1000_hw *hw)
2737 if (hw->phy.type != e1000_phy_82578) 2737 if (hw->phy.type != e1000_phy_82578)
2738 goto out; 2738 goto out;
2739 2739
2740 /* Do not apply workaround if in PHY loopback bit 14 set */
2741 hw->phy.ops.read_phy_reg(hw, PHY_CONTROL, &data);
2742 if (data & PHY_CONTROL_LB)
2743 goto out;
2744
2740 /* check if link is up and at 1Gbps */ 2745 /* check if link is up and at 1Gbps */
2741 ret_val = hw->phy.ops.read_phy_reg(hw, BM_CS_STATUS, &data); 2746 ret_val = hw->phy.ops.read_phy_reg(hw, BM_CS_STATUS, &data);
2742 if (ret_val) 2747 if (ret_val)