diff options
author | Linus Torvalds <torvalds@g5.osdl.org> | 2006-06-22 18:08:56 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@g5.osdl.org> | 2006-06-22 18:08:56 -0400 |
commit | d588fcbe5a7ba8bba2cebf7799ab2d573717a806 (patch) | |
tree | 2c82f5d26bd9f2e2f82711ef58f3c7a1b6a9a4df /drivers | |
parent | eaa8568901b3164197ce727c4c9b4067383e526c (diff) | |
parent | 4941b395b3c2635a8c16d88791a789fb6ac6be43 (diff) |
Merge master.kernel.org:/pub/scm/linux/kernel/git/gregkh/i2c-2.6
* master.kernel.org:/pub/scm/linux/kernel/git/gregkh/i2c-2.6: (44 commits)
[PATCH] I2C: I2C controllers go into right place on sysfs
[PATCH] hwmon-vid: Add support for Intel Core and Conroe
[PATCH] lm70: New hardware monitoring driver
[PATCH] hwmon: Fix the Kconfig header
[PATCH] i2c-i801: Merge setup function
[PATCH] i2c-i801: Better pci subsystem integration
[PATCH] i2c-i801: Cleanups
[PATCH] i2c-i801: Remove PCI function check
[PATCH] i2c-i801: Remove force_addr parameter
[PATCH] i2c-i801: Fix block transaction poll loops
[PATCH] scx200_acb: Documentation update
[PATCH] scx200_acb: Mark scx200_acb_probe __init
[PATCH] scx200_acb: Use PCI I/O resource when appropriate
[PATCH] i2c: Mark block write buffers as const
[PATCH] i2c-ocores: Minor cleanups
[PATCH] abituguru: Fix fan detection
[PATCH] abituguru: Review fixes
[PATCH] abituguru: New hardware monitoring driver
[PATCH] w83792d: Add missing data access locks
[PATCH] w83792d: Fix setting the PWM value
...
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/hwmon/Kconfig | 65 | ||||
-rw-r--r-- | drivers/hwmon/Makefile | 4 | ||||
-rw-r--r-- | drivers/hwmon/abituguru.c | 1415 | ||||
-rw-r--r-- | drivers/hwmon/f71805f.c | 15 | ||||
-rw-r--r-- | drivers/hwmon/hdaps.c | 8 | ||||
-rw-r--r-- | drivers/hwmon/hwmon-vid.c | 44 | ||||
-rw-r--r-- | drivers/hwmon/lm70.c | 165 | ||||
-rw-r--r-- | drivers/hwmon/lm83.c | 50 | ||||
-rw-r--r-- | drivers/hwmon/smsc47m192.c | 648 | ||||
-rw-r--r-- | drivers/hwmon/w83627ehf.c | 170 | ||||
-rw-r--r-- | drivers/hwmon/w83791d.c | 1255 | ||||
-rw-r--r-- | drivers/hwmon/w83792d.c | 86 | ||||
-rw-r--r-- | drivers/i2c/busses/Kconfig | 22 | ||||
-rw-r--r-- | drivers/i2c/busses/Makefile | 1 | ||||
-rw-r--r-- | drivers/i2c/busses/i2c-i801.c | 154 | ||||
-rw-r--r-- | drivers/i2c/busses/i2c-nforce2.c | 38 | ||||
-rw-r--r-- | drivers/i2c/busses/i2c-ocores.c | 341 | ||||
-rw-r--r-- | drivers/i2c/busses/i2c-piix4.c | 33 | ||||
-rw-r--r-- | drivers/i2c/busses/scx200_acb.c | 202 | ||||
-rw-r--r-- | drivers/i2c/chips/Kconfig | 8 | ||||
-rw-r--r-- | drivers/i2c/chips/m41t00.c | 346 | ||||
-rw-r--r-- | drivers/i2c/i2c-core.c | 4 | ||||
-rw-r--r-- | drivers/i2c/i2c-dev.c | 5 |
23 files changed, 4728 insertions, 351 deletions
diff --git a/drivers/hwmon/Kconfig b/drivers/hwmon/Kconfig index 99cdc612d2c6..0e31a0c496e8 100644 --- a/drivers/hwmon/Kconfig +++ b/drivers/hwmon/Kconfig | |||
@@ -1,5 +1,5 @@ | |||
1 | # | 1 | # |
2 | # I2C Sensor chip drivers configuration | 2 | # Hardware monitoring chip drivers configuration |
3 | # | 3 | # |
4 | 4 | ||
5 | menu "Hardware Monitoring support" | 5 | menu "Hardware Monitoring support" |
@@ -16,6 +16,10 @@ config HWMON | |||
16 | should say Y here and also to the specific driver(s) for your | 16 | should say Y here and also to the specific driver(s) for your |
17 | sensors chip(s) below. | 17 | sensors chip(s) below. |
18 | 18 | ||
19 | To find out which specific driver(s) you need, use the | ||
20 | sensors-detect script from the lm_sensors package. Read | ||
21 | <file:Documentation/hwmon/userspace-tools> for details. | ||
22 | |||
19 | This support can also be built as a module. If so, the module | 23 | This support can also be built as a module. If so, the module |
20 | will be called hwmon. | 24 | will be called hwmon. |
21 | 25 | ||
@@ -23,6 +27,18 @@ config HWMON_VID | |||
23 | tristate | 27 | tristate |
24 | default n | 28 | default n |
25 | 29 | ||
30 | config SENSORS_ABITUGURU | ||
31 | tristate "Abit uGuru" | ||
32 | depends on HWMON && EXPERIMENTAL | ||
33 | help | ||
34 | If you say yes here you get support for the Abit uGuru chips | ||
35 | sensor part. The voltage and frequency control parts of the Abit | ||
36 | uGuru are not supported. The Abit uGuru chip can be found on Abit | ||
37 | uGuru featuring motherboards (most modern Abit motherboards). | ||
38 | |||
39 | This driver can also be built as a module. If so, the module | ||
40 | will be called abituguru. | ||
41 | |||
26 | config SENSORS_ADM1021 | 42 | config SENSORS_ADM1021 |
27 | tristate "Analog Devices ADM1021 and compatibles" | 43 | tristate "Analog Devices ADM1021 and compatibles" |
28 | depends on HWMON && I2C | 44 | depends on HWMON && I2C |
@@ -188,6 +204,16 @@ config SENSORS_LM63 | |||
188 | This driver can also be built as a module. If so, the module | 204 | This driver can also be built as a module. If so, the module |
189 | will be called lm63. | 205 | will be called lm63. |
190 | 206 | ||
207 | config SENSORS_LM70 | ||
208 | tristate "National Semiconductor LM70" | ||
209 | depends on HWMON && SPI_MASTER && EXPERIMENTAL | ||
210 | help | ||
211 | If you say yes here you get support for the National Semiconductor | ||
212 | LM70 digital temperature sensor chip. | ||
213 | |||
214 | This driver can also be built as a module. If so, the module | ||
215 | will be called lm70. | ||
216 | |||
191 | config SENSORS_LM75 | 217 | config SENSORS_LM75 |
192 | tristate "National Semiconductor LM75 and compatibles" | 218 | tristate "National Semiconductor LM75 and compatibles" |
193 | depends on HWMON && I2C | 219 | depends on HWMON && I2C |
@@ -236,11 +262,11 @@ config SENSORS_LM80 | |||
236 | will be called lm80. | 262 | will be called lm80. |
237 | 263 | ||
238 | config SENSORS_LM83 | 264 | config SENSORS_LM83 |
239 | tristate "National Semiconductor LM83" | 265 | tristate "National Semiconductor LM83 and compatibles" |
240 | depends on HWMON && I2C | 266 | depends on HWMON && I2C |
241 | help | 267 | help |
242 | If you say yes here you get support for National Semiconductor | 268 | If you say yes here you get support for National Semiconductor |
243 | LM83 sensor chips. | 269 | LM82 and LM83 sensor chips. |
244 | 270 | ||
245 | This driver can also be built as a module. If so, the module | 271 | This driver can also be built as a module. If so, the module |
246 | will be called lm83. | 272 | will be called lm83. |
@@ -333,11 +359,32 @@ config SENSORS_SMSC47M1 | |||
333 | help | 359 | help |
334 | If you say yes here you get support for the integrated fan | 360 | If you say yes here you get support for the integrated fan |
335 | monitoring and control capabilities of the SMSC LPC47B27x, | 361 | monitoring and control capabilities of the SMSC LPC47B27x, |
336 | LPC47M10x, LPC47M13x, LPC47M14x, LPC47M15x and LPC47M192 chips. | 362 | LPC47M10x, LPC47M13x, LPC47M14x, LPC47M15x, LPC47M192 and |
363 | LPC47M997 chips. | ||
364 | |||
365 | The temperature and voltage sensor features of the LPC47M192 | ||
366 | and LPC47M997 are supported by another driver, select also | ||
367 | "SMSC LPC47M192 and compatibles" below for those. | ||
337 | 368 | ||
338 | This driver can also be built as a module. If so, the module | 369 | This driver can also be built as a module. If so, the module |
339 | will be called smsc47m1. | 370 | will be called smsc47m1. |
340 | 371 | ||
372 | config SENSORS_SMSC47M192 | ||
373 | tristate "SMSC LPC47M192 and compatibles" | ||
374 | depends on HWMON && I2C && EXPERIMENTAL | ||
375 | select HWMON_VID | ||
376 | help | ||
377 | If you say yes here you get support for the temperature and | ||
378 | voltage sensors of the SMSC LPC47M192 and LPC47M997 chips. | ||
379 | |||
380 | The fan monitoring and control capabilities of these chips | ||
381 | are supported by another driver, select | ||
382 | "SMSC LPC47M10x and compatibles" above. You need both drivers | ||
383 | if you want fan control and voltage/temperature sensor support. | ||
384 | |||
385 | This driver can also be built as a module. If so, the module | ||
386 | will be called smsc47m192. | ||
387 | |||
341 | config SENSORS_SMSC47B397 | 388 | config SENSORS_SMSC47B397 |
342 | tristate "SMSC LPC47B397-NC" | 389 | tristate "SMSC LPC47B397-NC" |
343 | depends on HWMON && I2C && EXPERIMENTAL | 390 | depends on HWMON && I2C && EXPERIMENTAL |
@@ -385,6 +432,16 @@ config SENSORS_W83781D | |||
385 | This driver can also be built as a module. If so, the module | 432 | This driver can also be built as a module. If so, the module |
386 | will be called w83781d. | 433 | will be called w83781d. |
387 | 434 | ||
435 | config SENSORS_W83791D | ||
436 | tristate "Winbond W83791D" | ||
437 | depends on HWMON && I2C && EXPERIMENTAL | ||
438 | select HWMON_VID | ||
439 | help | ||
440 | If you say yes here you get support for the Winbond W83791D chip. | ||
441 | |||
442 | This driver can also be built as a module. If so, the module | ||
443 | will be called w83791d. | ||
444 | |||
388 | config SENSORS_W83792D | 445 | config SENSORS_W83792D |
389 | tristate "Winbond W83792D" | 446 | tristate "Winbond W83792D" |
390 | depends on HWMON && I2C && EXPERIMENTAL | 447 | depends on HWMON && I2C && EXPERIMENTAL |
diff --git a/drivers/hwmon/Makefile b/drivers/hwmon/Makefile index fbdb8d911a72..31415843a91a 100644 --- a/drivers/hwmon/Makefile +++ b/drivers/hwmon/Makefile | |||
@@ -10,7 +10,9 @@ obj-$(CONFIG_SENSORS_ASB100) += asb100.o | |||
10 | obj-$(CONFIG_SENSORS_W83627HF) += w83627hf.o | 10 | obj-$(CONFIG_SENSORS_W83627HF) += w83627hf.o |
11 | obj-$(CONFIG_SENSORS_W83792D) += w83792d.o | 11 | obj-$(CONFIG_SENSORS_W83792D) += w83792d.o |
12 | obj-$(CONFIG_SENSORS_W83781D) += w83781d.o | 12 | obj-$(CONFIG_SENSORS_W83781D) += w83781d.o |
13 | obj-$(CONFIG_SENSORS_W83791D) += w83791d.o | ||
13 | 14 | ||
15 | obj-$(CONFIG_SENSORS_ABITUGURU) += abituguru.o | ||
14 | obj-$(CONFIG_SENSORS_ADM1021) += adm1021.o | 16 | obj-$(CONFIG_SENSORS_ADM1021) += adm1021.o |
15 | obj-$(CONFIG_SENSORS_ADM1025) += adm1025.o | 17 | obj-$(CONFIG_SENSORS_ADM1025) += adm1025.o |
16 | obj-$(CONFIG_SENSORS_ADM1026) += adm1026.o | 18 | obj-$(CONFIG_SENSORS_ADM1026) += adm1026.o |
@@ -26,6 +28,7 @@ obj-$(CONFIG_SENSORS_GL520SM) += gl520sm.o | |||
26 | obj-$(CONFIG_SENSORS_HDAPS) += hdaps.o | 28 | obj-$(CONFIG_SENSORS_HDAPS) += hdaps.o |
27 | obj-$(CONFIG_SENSORS_IT87) += it87.o | 29 | obj-$(CONFIG_SENSORS_IT87) += it87.o |
28 | obj-$(CONFIG_SENSORS_LM63) += lm63.o | 30 | obj-$(CONFIG_SENSORS_LM63) += lm63.o |
31 | obj-$(CONFIG_SENSORS_LM70) += lm70.o | ||
29 | obj-$(CONFIG_SENSORS_LM75) += lm75.o | 32 | obj-$(CONFIG_SENSORS_LM75) += lm75.o |
30 | obj-$(CONFIG_SENSORS_LM77) += lm77.o | 33 | obj-$(CONFIG_SENSORS_LM77) += lm77.o |
31 | obj-$(CONFIG_SENSORS_LM78) += lm78.o | 34 | obj-$(CONFIG_SENSORS_LM78) += lm78.o |
@@ -40,6 +43,7 @@ obj-$(CONFIG_SENSORS_PC87360) += pc87360.o | |||
40 | obj-$(CONFIG_SENSORS_SIS5595) += sis5595.o | 43 | obj-$(CONFIG_SENSORS_SIS5595) += sis5595.o |
41 | obj-$(CONFIG_SENSORS_SMSC47B397)+= smsc47b397.o | 44 | obj-$(CONFIG_SENSORS_SMSC47B397)+= smsc47b397.o |
42 | obj-$(CONFIG_SENSORS_SMSC47M1) += smsc47m1.o | 45 | obj-$(CONFIG_SENSORS_SMSC47M1) += smsc47m1.o |
46 | obj-$(CONFIG_SENSORS_SMSC47M192)+= smsc47m192.o | ||
43 | obj-$(CONFIG_SENSORS_VIA686A) += via686a.o | 47 | obj-$(CONFIG_SENSORS_VIA686A) += via686a.o |
44 | obj-$(CONFIG_SENSORS_VT8231) += vt8231.o | 48 | obj-$(CONFIG_SENSORS_VT8231) += vt8231.o |
45 | obj-$(CONFIG_SENSORS_W83627EHF) += w83627ehf.o | 49 | obj-$(CONFIG_SENSORS_W83627EHF) += w83627ehf.o |
diff --git a/drivers/hwmon/abituguru.c b/drivers/hwmon/abituguru.c new file mode 100644 index 000000000000..59122cc0a50a --- /dev/null +++ b/drivers/hwmon/abituguru.c | |||
@@ -0,0 +1,1415 @@ | |||
1 | /* | ||
2 | abituguru.c Copyright (c) 2005-2006 Hans de Goede <j.w.r.degoede@hhs.nl> | ||
3 | |||
4 | This program is free software; you can redistribute it and/or modify | ||
5 | it under the terms of the GNU General Public License as published by | ||
6 | the Free Software Foundation; either version 2 of the License, or | ||
7 | (at your option) any later version. | ||
8 | |||
9 | This program is distributed in the hope that it will be useful, | ||
10 | but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
11 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
12 | GNU General Public License for more details. | ||
13 | |||
14 | You should have received a copy of the GNU General Public License | ||
15 | along with this program; if not, write to the Free Software | ||
16 | Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | ||
17 | */ | ||
18 | /* | ||
19 | This driver supports the sensor part of the custom Abit uGuru chip found | ||
20 | on Abit uGuru motherboards. Note: because of lack of specs the CPU / RAM / | ||
21 | etc voltage & frequency control is not supported! | ||
22 | */ | ||
23 | #include <linux/module.h> | ||
24 | #include <linux/init.h> | ||
25 | #include <linux/slab.h> | ||
26 | #include <linux/jiffies.h> | ||
27 | #include <linux/mutex.h> | ||
28 | #include <linux/err.h> | ||
29 | #include <linux/platform_device.h> | ||
30 | #include <linux/hwmon.h> | ||
31 | #include <linux/hwmon-sysfs.h> | ||
32 | #include <asm/io.h> | ||
33 | |||
34 | /* Banks */ | ||
35 | #define ABIT_UGURU_ALARM_BANK 0x20 /* 1x 3 bytes */ | ||
36 | #define ABIT_UGURU_SENSOR_BANK1 0x21 /* 16x volt and temp */ | ||
37 | #define ABIT_UGURU_FAN_PWM 0x24 /* 3x 5 bytes */ | ||
38 | #define ABIT_UGURU_SENSOR_BANK2 0x26 /* fans */ | ||
39 | /* max nr of sensors in bank1, a bank1 sensor can be in, temp or nc */ | ||
40 | #define ABIT_UGURU_MAX_BANK1_SENSORS 16 | ||
41 | /* Warning if you increase one of the 2 MAX defines below to 10 or higher you | ||
42 | should adjust the belonging _NAMES_LENGTH macro for the 2 digit number! */ | ||
43 | /* max nr of sensors in bank2, currently mb's with max 6 fans are known */ | ||
44 | #define ABIT_UGURU_MAX_BANK2_SENSORS 6 | ||
45 | /* max nr of pwm outputs, currently mb's with max 5 pwm outputs are known */ | ||
46 | #define ABIT_UGURU_MAX_PWMS 5 | ||
47 | /* uGuru sensor bank 1 flags */ /* Alarm if: */ | ||
48 | #define ABIT_UGURU_TEMP_HIGH_ALARM_ENABLE 0x01 /* temp over warn */ | ||
49 | #define ABIT_UGURU_VOLT_HIGH_ALARM_ENABLE 0x02 /* volt over max */ | ||
50 | #define ABIT_UGURU_VOLT_LOW_ALARM_ENABLE 0x04 /* volt under min */ | ||
51 | #define ABIT_UGURU_TEMP_HIGH_ALARM_FLAG 0x10 /* temp is over warn */ | ||
52 | #define ABIT_UGURU_VOLT_HIGH_ALARM_FLAG 0x20 /* volt is over max */ | ||
53 | #define ABIT_UGURU_VOLT_LOW_ALARM_FLAG 0x40 /* volt is under min */ | ||
54 | /* uGuru sensor bank 2 flags */ /* Alarm if: */ | ||
55 | #define ABIT_UGURU_FAN_LOW_ALARM_ENABLE 0x01 /* fan under min */ | ||
56 | /* uGuru sensor bank common flags */ | ||
57 | #define ABIT_UGURU_BEEP_ENABLE 0x08 /* beep if alarm */ | ||
58 | #define ABIT_UGURU_SHUTDOWN_ENABLE 0x80 /* shutdown if alarm */ | ||
59 | /* uGuru fan PWM (speed control) flags */ | ||
60 | #define ABIT_UGURU_FAN_PWM_ENABLE 0x80 /* enable speed control */ | ||
61 | /* Values used for conversion */ | ||
62 | #define ABIT_UGURU_FAN_MAX 15300 /* RPM */ | ||
63 | /* Bank1 sensor types */ | ||
64 | #define ABIT_UGURU_IN_SENSOR 0 | ||
65 | #define ABIT_UGURU_TEMP_SENSOR 1 | ||
66 | #define ABIT_UGURU_NC 2 | ||
67 | /* Timeouts / Retries, if these turn out to need a lot of fiddling we could | ||
68 | convert them to params. */ | ||
69 | /* 250 was determined by trial and error, 200 works most of the time, but not | ||
70 | always. I assume this is cpu-speed independent, since the ISA-bus and not | ||
71 | the CPU should be the bottleneck. Note that 250 sometimes is still not | ||
72 | enough (only reported on AN7 mb) this is handled by a higher layer. */ | ||
73 | #define ABIT_UGURU_WAIT_TIMEOUT 250 | ||
74 | /* Normally all expected status in abituguru_ready, are reported after the | ||
75 | first read, but sometimes not and we need to poll, 5 polls was not enough | ||
76 | 50 sofar is. */ | ||
77 | #define ABIT_UGURU_READY_TIMEOUT 50 | ||
78 | /* Maximum 3 retries on timedout reads/writes, delay 200 ms before retrying */ | ||
79 | #define ABIT_UGURU_MAX_RETRIES 3 | ||
80 | #define ABIT_UGURU_RETRY_DELAY (HZ/5) | ||
81 | /* Maximum 2 timeouts in abituguru_update_device, iow 3 in a row is an error */ | ||
82 | #define ABIT_UGURU_MAX_TIMEOUTS 2 | ||
83 | /* utility macros */ | ||
84 | #define ABIT_UGURU_NAME "abituguru" | ||
85 | #define ABIT_UGURU_DEBUG(level, format, arg...) \ | ||
86 | if (level <= verbose) \ | ||
87 | printk(KERN_DEBUG ABIT_UGURU_NAME ": " format , ## arg) | ||
88 | /* Macros to help calculate the sysfs_names array length */ | ||
89 | /* sum of strlen of: in??_input\0, in??_{min,max}\0, in??_{min,max}_alarm\0, | ||
90 | in??_{min,max}_alarm_enable\0, in??_beep\0, in??_shutdown\0 */ | ||
91 | #define ABITUGURU_IN_NAMES_LENGTH (11 + 2 * 9 + 2 * 15 + 2 * 22 + 10 + 14) | ||
92 | /* sum of strlen of: temp??_input\0, temp??_max\0, temp??_crit\0, | ||
93 | temp??_alarm\0, temp??_alarm_enable\0, temp??_beep\0, temp??_shutdown\0 */ | ||
94 | #define ABITUGURU_TEMP_NAMES_LENGTH (13 + 11 + 12 + 13 + 20 + 12 + 16) | ||
95 | /* sum of strlen of: fan?_input\0, fan?_min\0, fan?_alarm\0, | ||
96 | fan?_alarm_enable\0, fan?_beep\0, fan?_shutdown\0 */ | ||
97 | #define ABITUGURU_FAN_NAMES_LENGTH (11 + 9 + 11 + 18 + 10 + 14) | ||
98 | /* sum of strlen of: pwm?_enable\0, pwm?_auto_channels_temp\0, | ||
99 | pwm?_auto_point{1,2}_pwm\0, pwm?_auto_point{1,2}_temp\0 */ | ||
100 | #define ABITUGURU_PWM_NAMES_LENGTH (12 + 24 + 2 * 21 + 2 * 22) | ||
101 | /* IN_NAMES_LENGTH > TEMP_NAMES_LENGTH so assume all bank1 sensors are in */ | ||
102 | #define ABITUGURU_SYSFS_NAMES_LENGTH ( \ | ||
103 | ABIT_UGURU_MAX_BANK1_SENSORS * ABITUGURU_IN_NAMES_LENGTH + \ | ||
104 | ABIT_UGURU_MAX_BANK2_SENSORS * ABITUGURU_FAN_NAMES_LENGTH + \ | ||
105 | ABIT_UGURU_MAX_PWMS * ABITUGURU_PWM_NAMES_LENGTH) | ||
106 | |||
107 | /* All the macros below are named identical to the oguru and oguru2 programs | ||
108 | reverse engineered by Olle Sandberg, hence the names might not be 100% | ||
109 | logical. I could come up with better names, but I prefer keeping the names | ||
110 | identical so that this driver can be compared with his work more easily. */ | ||
111 | /* Two i/o-ports are used by uGuru */ | ||
112 | #define ABIT_UGURU_BASE 0x00E0 | ||
113 | /* Used to tell uGuru what to read and to read the actual data */ | ||
114 | #define ABIT_UGURU_CMD 0x00 | ||
115 | /* Mostly used to check if uGuru is busy */ | ||
116 | #define ABIT_UGURU_DATA 0x04 | ||
117 | #define ABIT_UGURU_REGION_LENGTH 5 | ||
118 | /* uGuru status' */ | ||
119 | #define ABIT_UGURU_STATUS_WRITE 0x00 /* Ready to be written */ | ||
120 | #define ABIT_UGURU_STATUS_READ 0x01 /* Ready to be read */ | ||
121 | #define ABIT_UGURU_STATUS_INPUT 0x08 /* More input */ | ||
122 | #define ABIT_UGURU_STATUS_READY 0x09 /* Ready to be written */ | ||
123 | |||
124 | /* Constants */ | ||
125 | /* in (Volt) sensors go up to 3494 mV, temp to 255000 millidegrees Celsius */ | ||
126 | static const int abituguru_bank1_max_value[2] = { 3494, 255000 }; | ||
127 | /* Min / Max allowed values for sensor2 (fan) alarm threshold, these values | ||
128 | correspond to 300-3000 RPM */ | ||
129 | static const u8 abituguru_bank2_min_threshold = 5; | ||
130 | static const u8 abituguru_bank2_max_threshold = 50; | ||
131 | /* Register 0 is a bitfield, 1 and 2 are pwm settings (255 = 100%), 3 and 4 | ||
132 | are temperature trip points. */ | ||
133 | static const int abituguru_pwm_settings_multiplier[5] = { 0, 1, 1, 1000, 1000 }; | ||
134 | /* Min / Max allowed values for pwm_settings. Note: pwm1 (CPU fan) is a | ||
135 | special case the minium allowed pwm% setting for this is 30% (77) on | ||
136 | some MB's this special case is handled in the code! */ | ||
137 | static const u8 abituguru_pwm_min[5] = { 0, 170, 170, 25, 25 }; | ||
138 | static const u8 abituguru_pwm_max[5] = { 0, 255, 255, 75, 75 }; | ||
139 | |||
140 | |||
141 | /* Insmod parameters */ | ||
142 | static int force; | ||
143 | module_param(force, bool, 0); | ||
144 | MODULE_PARM_DESC(force, "Set to one to force detection."); | ||
145 | static int fan_sensors; | ||
146 | module_param(fan_sensors, int, 0); | ||
147 | MODULE_PARM_DESC(fan_sensors, "Number of fan sensors on the uGuru " | ||
148 | "(0 = autodetect)"); | ||
149 | static int pwms; | ||
150 | module_param(pwms, int, 0); | ||
151 | MODULE_PARM_DESC(pwms, "Number of PWMs on the uGuru " | ||
152 | "(0 = autodetect)"); | ||
153 | |||
154 | /* Default verbose is 2, since this driver is still in the testing phase */ | ||
155 | static int verbose = 2; | ||
156 | module_param(verbose, int, 0644); | ||
157 | MODULE_PARM_DESC(verbose, "How verbose should the driver be? (0-3):\n" | ||
158 | " 0 normal output\n" | ||
159 | " 1 + verbose error reporting\n" | ||
160 | " 2 + sensors type probing info\n" | ||
161 | " 3 + retryable error reporting"); | ||
162 | |||
163 | |||
164 | /* For the Abit uGuru, we need to keep some data in memory. | ||
165 | The structure is dynamically allocated, at the same time when a new | ||
166 | abituguru device is allocated. */ | ||
167 | struct abituguru_data { | ||
168 | struct class_device *class_dev; /* hwmon registered device */ | ||
169 | struct mutex update_lock; /* protect access to data and uGuru */ | ||
170 | unsigned long last_updated; /* In jiffies */ | ||
171 | unsigned short addr; /* uguru base address */ | ||
172 | char uguru_ready; /* is the uguru in ready state? */ | ||
173 | unsigned char update_timeouts; /* number of update timeouts since last | ||
174 | successful update */ | ||
175 | |||
176 | /* The sysfs attr and their names are generated automatically, for bank1 | ||
177 | we cannot use a predefined array because we don't know beforehand | ||
178 | of a sensor is a volt or a temp sensor, for bank2 and the pwms its | ||
179 | easier todo things the same way. For in sensors we have 9 (temp 7) | ||
180 | sysfs entries per sensor, for bank2 and pwms 6. */ | ||
181 | struct sensor_device_attribute_2 sysfs_attr[ | ||
182 | ABIT_UGURU_MAX_BANK1_SENSORS * 9 + | ||
183 | ABIT_UGURU_MAX_BANK2_SENSORS * 6 + ABIT_UGURU_MAX_PWMS * 6]; | ||
184 | /* Buffer to store the dynamically generated sysfs names */ | ||
185 | char sysfs_names[ABITUGURU_SYSFS_NAMES_LENGTH]; | ||
186 | |||
187 | /* Bank 1 data */ | ||
188 | /* number of and addresses of [0] in, [1] temp sensors */ | ||
189 | u8 bank1_sensors[2]; | ||
190 | u8 bank1_address[2][ABIT_UGURU_MAX_BANK1_SENSORS]; | ||
191 | u8 bank1_value[ABIT_UGURU_MAX_BANK1_SENSORS]; | ||
192 | /* This array holds 3 entries per sensor for the bank 1 sensor settings | ||
193 | (flags, min, max for voltage / flags, warn, shutdown for temp). */ | ||
194 | u8 bank1_settings[ABIT_UGURU_MAX_BANK1_SENSORS][3]; | ||
195 | /* Maximum value for each sensor used for scaling in mV/millidegrees | ||
196 | Celsius. */ | ||
197 | int bank1_max_value[ABIT_UGURU_MAX_BANK1_SENSORS]; | ||
198 | |||
199 | /* Bank 2 data, ABIT_UGURU_MAX_BANK2_SENSORS entries for bank2 */ | ||
200 | u8 bank2_sensors; /* actual number of bank2 sensors found */ | ||
201 | u8 bank2_value[ABIT_UGURU_MAX_BANK2_SENSORS]; | ||
202 | u8 bank2_settings[ABIT_UGURU_MAX_BANK2_SENSORS][2]; /* flags, min */ | ||
203 | |||
204 | /* Alarms 2 bytes for bank1, 1 byte for bank2 */ | ||
205 | u8 alarms[3]; | ||
206 | |||
207 | /* Fan PWM (speed control) 5 bytes per PWM */ | ||
208 | u8 pwms; /* actual number of pwms found */ | ||
209 | u8 pwm_settings[ABIT_UGURU_MAX_PWMS][5]; | ||
210 | }; | ||
211 | |||
212 | /* wait till the uguru is in the specified state */ | ||
213 | static int abituguru_wait(struct abituguru_data *data, u8 state) | ||
214 | { | ||
215 | int timeout = ABIT_UGURU_WAIT_TIMEOUT; | ||
216 | |||
217 | while (inb_p(data->addr + ABIT_UGURU_DATA) != state) { | ||
218 | timeout--; | ||
219 | if (timeout == 0) | ||
220 | return -EBUSY; | ||
221 | } | ||
222 | return 0; | ||
223 | } | ||
224 | |||
225 | /* Put the uguru in ready for input state */ | ||
226 | static int abituguru_ready(struct abituguru_data *data) | ||
227 | { | ||
228 | int timeout = ABIT_UGURU_READY_TIMEOUT; | ||
229 | |||
230 | if (data->uguru_ready) | ||
231 | return 0; | ||
232 | |||
233 | /* Reset? / Prepare for next read/write cycle */ | ||
234 | outb(0x00, data->addr + ABIT_UGURU_DATA); | ||
235 | |||
236 | /* Wait till the uguru is ready */ | ||
237 | if (abituguru_wait(data, ABIT_UGURU_STATUS_READY)) { | ||
238 | ABIT_UGURU_DEBUG(1, | ||
239 | "timeout exceeded waiting for ready state\n"); | ||
240 | return -EIO; | ||
241 | } | ||
242 | |||
243 | /* Cmd port MUST be read now and should contain 0xAC */ | ||
244 | while (inb_p(data->addr + ABIT_UGURU_CMD) != 0xAC) { | ||
245 | timeout--; | ||
246 | if (timeout == 0) { | ||
247 | ABIT_UGURU_DEBUG(1, | ||
248 | "CMD reg does not hold 0xAC after ready command\n"); | ||
249 | return -EIO; | ||
250 | } | ||
251 | } | ||
252 | |||
253 | /* After this the ABIT_UGURU_DATA port should contain | ||
254 | ABIT_UGURU_STATUS_INPUT */ | ||
255 | timeout = ABIT_UGURU_READY_TIMEOUT; | ||
256 | while (inb_p(data->addr + ABIT_UGURU_DATA) != ABIT_UGURU_STATUS_INPUT) { | ||
257 | timeout--; | ||
258 | if (timeout == 0) { | ||
259 | ABIT_UGURU_DEBUG(1, | ||
260 | "state != more input after ready command\n"); | ||
261 | return -EIO; | ||
262 | } | ||
263 | } | ||
264 | |||
265 | data->uguru_ready = 1; | ||
266 | return 0; | ||
267 | } | ||
268 | |||
269 | /* Send the bank and then sensor address to the uGuru for the next read/write | ||
270 | cycle. This function gets called as the first part of a read/write by | ||
271 | abituguru_read and abituguru_write. This function should never be | ||
272 | called by any other function. */ | ||
273 | static int abituguru_send_address(struct abituguru_data *data, | ||
274 | u8 bank_addr, u8 sensor_addr, int retries) | ||
275 | { | ||
276 | /* assume the caller does error handling itself if it has not requested | ||
277 | any retries, and thus be quiet. */ | ||
278 | int report_errors = retries; | ||
279 | |||
280 | for (;;) { | ||
281 | /* Make sure the uguru is ready and then send the bank address, | ||
282 | after this the uguru is no longer "ready". */ | ||
283 | if (abituguru_ready(data) != 0) | ||
284 | return -EIO; | ||
285 | outb(bank_addr, data->addr + ABIT_UGURU_DATA); | ||
286 | data->uguru_ready = 0; | ||
287 | |||
288 | /* Wait till the uguru is ABIT_UGURU_STATUS_INPUT state again | ||
289 | and send the sensor addr */ | ||
290 | if (abituguru_wait(data, ABIT_UGURU_STATUS_INPUT)) { | ||
291 | if (retries) { | ||
292 | ABIT_UGURU_DEBUG(3, "timeout exceeded " | ||
293 | "waiting for more input state, %d " | ||
294 | "tries remaining\n", retries); | ||
295 | set_current_state(TASK_UNINTERRUPTIBLE); | ||
296 | schedule_timeout(ABIT_UGURU_RETRY_DELAY); | ||
297 | retries--; | ||
298 | continue; | ||
299 | } | ||
300 | if (report_errors) | ||
301 | ABIT_UGURU_DEBUG(1, "timeout exceeded " | ||
302 | "waiting for more input state " | ||
303 | "(bank: %d)\n", (int)bank_addr); | ||
304 | return -EBUSY; | ||
305 | } | ||
306 | outb(sensor_addr, data->addr + ABIT_UGURU_CMD); | ||
307 | return 0; | ||
308 | } | ||
309 | } | ||
310 | |||
311 | /* Read count bytes from sensor sensor_addr in bank bank_addr and store the | ||
312 | result in buf, retry the send address part of the read retries times. */ | ||
313 | static int abituguru_read(struct abituguru_data *data, | ||
314 | u8 bank_addr, u8 sensor_addr, u8 *buf, int count, int retries) | ||
315 | { | ||
316 | int i; | ||
317 | |||
318 | /* Send the address */ | ||
319 | i = abituguru_send_address(data, bank_addr, sensor_addr, retries); | ||
320 | if (i) | ||
321 | return i; | ||
322 | |||
323 | /* And read the data */ | ||
324 | for (i = 0; i < count; i++) { | ||
325 | if (abituguru_wait(data, ABIT_UGURU_STATUS_READ)) { | ||
326 | ABIT_UGURU_DEBUG(1, "timeout exceeded waiting for " | ||
327 | "read state (bank: %d, sensor: %d)\n", | ||
328 | (int)bank_addr, (int)sensor_addr); | ||
329 | break; | ||
330 | } | ||
331 | buf[i] = inb(data->addr + ABIT_UGURU_CMD); | ||
332 | } | ||
333 | |||
334 | /* Last put the chip back in ready state */ | ||
335 | abituguru_ready(data); | ||
336 | |||
337 | return i; | ||
338 | } | ||
339 | |||
340 | /* Write count bytes from buf to sensor sensor_addr in bank bank_addr, the send | ||
341 | address part of the write is always retried ABIT_UGURU_MAX_RETRIES times. */ | ||
342 | static int abituguru_write(struct abituguru_data *data, | ||
343 | u8 bank_addr, u8 sensor_addr, u8 *buf, int count) | ||
344 | { | ||
345 | int i; | ||
346 | |||
347 | /* Send the address */ | ||
348 | i = abituguru_send_address(data, bank_addr, sensor_addr, | ||
349 | ABIT_UGURU_MAX_RETRIES); | ||
350 | if (i) | ||
351 | return i; | ||
352 | |||
353 | /* And write the data */ | ||
354 | for (i = 0; i < count; i++) { | ||
355 | if (abituguru_wait(data, ABIT_UGURU_STATUS_WRITE)) { | ||
356 | ABIT_UGURU_DEBUG(1, "timeout exceeded waiting for " | ||
357 | "write state (bank: %d, sensor: %d)\n", | ||
358 | (int)bank_addr, (int)sensor_addr); | ||
359 | break; | ||
360 | } | ||
361 | outb(buf[i], data->addr + ABIT_UGURU_CMD); | ||
362 | } | ||
363 | |||
364 | /* Now we need to wait till the chip is ready to be read again, | ||
365 | don't ask why */ | ||
366 | if (abituguru_wait(data, ABIT_UGURU_STATUS_READ)) { | ||
367 | ABIT_UGURU_DEBUG(1, "timeout exceeded waiting for read state " | ||
368 | "after write (bank: %d, sensor: %d)\n", (int)bank_addr, | ||
369 | (int)sensor_addr); | ||
370 | return -EIO; | ||
371 | } | ||
372 | |||
373 | /* Cmd port MUST be read now and should contain 0xAC */ | ||
374 | if (inb_p(data->addr + ABIT_UGURU_CMD) != 0xAC) { | ||
375 | ABIT_UGURU_DEBUG(1, "CMD reg does not hold 0xAC after write " | ||
376 | "(bank: %d, sensor: %d)\n", (int)bank_addr, | ||
377 | (int)sensor_addr); | ||
378 | return -EIO; | ||
379 | } | ||
380 | |||
381 | /* Last put the chip back in ready state */ | ||
382 | abituguru_ready(data); | ||
383 | |||
384 | return i; | ||
385 | } | ||
386 | |||
387 | /* Detect sensor type. Temp and Volt sensors are enabled with | ||
388 | different masks and will ignore enable masks not meant for them. | ||
389 | This enables us to test what kind of sensor we're dealing with. | ||
390 | By setting the alarm thresholds so that we will always get an | ||
391 | alarm for sensor type X and then enabling the sensor as sensor type | ||
392 | X, if we then get an alarm it is a sensor of type X. */ | ||
393 | static int __devinit | ||
394 | abituguru_detect_bank1_sensor_type(struct abituguru_data *data, | ||
395 | u8 sensor_addr) | ||
396 | { | ||
397 | u8 val, buf[3]; | ||
398 | int ret = ABIT_UGURU_NC; | ||
399 | |||
400 | /* First read the sensor and the current settings */ | ||
401 | if (abituguru_read(data, ABIT_UGURU_SENSOR_BANK1, sensor_addr, &val, | ||
402 | 1, ABIT_UGURU_MAX_RETRIES) != 1) | ||
403 | return -ENODEV; | ||
404 | |||
405 | /* Test val is sane / usable for sensor type detection. */ | ||
406 | if ((val < 10u) || (val > 240u)) { | ||
407 | printk(KERN_WARNING ABIT_UGURU_NAME | ||
408 | ": bank1-sensor: %d reading (%d) too close to limits, " | ||
409 | "unable to determine sensor type, skipping sensor\n", | ||
410 | (int)sensor_addr, (int)val); | ||
411 | /* assume no sensor is there for sensors for which we can't | ||
412 | determine the sensor type because their reading is too close | ||
413 | to their limits, this usually means no sensor is there. */ | ||
414 | return ABIT_UGURU_NC; | ||
415 | } | ||
416 | |||
417 | ABIT_UGURU_DEBUG(2, "testing bank1 sensor %d\n", (int)sensor_addr); | ||
418 | /* Volt sensor test, enable volt low alarm, set min value ridicously | ||
419 | high. If its a volt sensor this should always give us an alarm. */ | ||
420 | buf[0] = ABIT_UGURU_VOLT_LOW_ALARM_ENABLE; | ||
421 | buf[1] = 245; | ||
422 | buf[2] = 250; | ||
423 | if (abituguru_write(data, ABIT_UGURU_SENSOR_BANK1 + 2, sensor_addr, | ||
424 | buf, 3) != 3) | ||
425 | return -ENODEV; | ||
426 | /* Now we need 20 ms to give the uguru time to read the sensors | ||
427 | and raise a voltage alarm */ | ||
428 | set_current_state(TASK_UNINTERRUPTIBLE); | ||
429 | schedule_timeout(HZ/50); | ||
430 | /* Check for alarm and check the alarm is a volt low alarm. */ | ||
431 | if (abituguru_read(data, ABIT_UGURU_ALARM_BANK, 0, buf, 3, | ||
432 | ABIT_UGURU_MAX_RETRIES) != 3) | ||
433 | return -ENODEV; | ||
434 | if (buf[sensor_addr/8] & (0x01 << (sensor_addr % 8))) { | ||
435 | if (abituguru_read(data, ABIT_UGURU_SENSOR_BANK1 + 1, | ||
436 | sensor_addr, buf, 3, | ||
437 | ABIT_UGURU_MAX_RETRIES) != 3) | ||
438 | return -ENODEV; | ||
439 | if (buf[0] & ABIT_UGURU_VOLT_LOW_ALARM_FLAG) { | ||
440 | /* Restore original settings */ | ||
441 | if (abituguru_write(data, ABIT_UGURU_SENSOR_BANK1 + 2, | ||
442 | sensor_addr, | ||
443 | data->bank1_settings[sensor_addr], | ||
444 | 3) != 3) | ||
445 | return -ENODEV; | ||
446 | ABIT_UGURU_DEBUG(2, " found volt sensor\n"); | ||
447 | return ABIT_UGURU_IN_SENSOR; | ||
448 | } else | ||
449 | ABIT_UGURU_DEBUG(2, " alarm raised during volt " | ||
450 | "sensor test, but volt low flag not set\n"); | ||
451 | } else | ||
452 | ABIT_UGURU_DEBUG(2, " alarm not raised during volt sensor " | ||
453 | "test\n"); | ||
454 | |||
455 | /* Temp sensor test, enable sensor as a temp sensor, set beep value | ||
456 | ridicously low (but not too low, otherwise uguru ignores it). | ||
457 | If its a temp sensor this should always give us an alarm. */ | ||
458 | buf[0] = ABIT_UGURU_TEMP_HIGH_ALARM_ENABLE; | ||
459 | buf[1] = 5; | ||
460 | buf[2] = 10; | ||
461 | if (abituguru_write(data, ABIT_UGURU_SENSOR_BANK1 + 2, sensor_addr, | ||
462 | buf, 3) != 3) | ||
463 | return -ENODEV; | ||
464 | /* Now we need 50 ms to give the uguru time to read the sensors | ||
465 | and raise a temp alarm */ | ||
466 | set_current_state(TASK_UNINTERRUPTIBLE); | ||
467 | schedule_timeout(HZ/20); | ||
468 | /* Check for alarm and check the alarm is a temp high alarm. */ | ||
469 | if (abituguru_read(data, ABIT_UGURU_ALARM_BANK, 0, buf, 3, | ||
470 | ABIT_UGURU_MAX_RETRIES) != 3) | ||
471 | return -ENODEV; | ||
472 | if (buf[sensor_addr/8] & (0x01 << (sensor_addr % 8))) { | ||
473 | if (abituguru_read(data, ABIT_UGURU_SENSOR_BANK1 + 1, | ||
474 | sensor_addr, buf, 3, | ||
475 | ABIT_UGURU_MAX_RETRIES) != 3) | ||
476 | return -ENODEV; | ||
477 | if (buf[0] & ABIT_UGURU_TEMP_HIGH_ALARM_FLAG) { | ||
478 | ret = ABIT_UGURU_TEMP_SENSOR; | ||
479 | ABIT_UGURU_DEBUG(2, " found temp sensor\n"); | ||
480 | } else | ||
481 | ABIT_UGURU_DEBUG(2, " alarm raised during temp " | ||
482 | "sensor test, but temp high flag not set\n"); | ||
483 | } else | ||
484 | ABIT_UGURU_DEBUG(2, " alarm not raised during temp sensor " | ||
485 | "test\n"); | ||
486 | |||
487 | /* Restore original settings */ | ||
488 | if (abituguru_write(data, ABIT_UGURU_SENSOR_BANK1 + 2, sensor_addr, | ||
489 | data->bank1_settings[sensor_addr], 3) != 3) | ||
490 | return -ENODEV; | ||
491 | |||
492 | return ret; | ||
493 | } | ||
494 | |||
495 | /* These functions try to find out how many sensors there are in bank2 and how | ||
496 | many pwms there are. The purpose of this is to make sure that we don't give | ||
497 | the user the possibility to change settings for non-existent sensors / pwm. | ||
498 | The uGuru will happily read / write whatever memory happens to be after the | ||
499 | memory storing the PWM settings when reading/writing to a PWM which is not | ||
500 | there. Notice even if we detect a PWM which doesn't exist we normally won't | ||
501 | write to it, unless the user tries to change the settings. | ||
502 | |||
503 | Although the uGuru allows reading (settings) from non existing bank2 | ||
504 | sensors, my version of the uGuru does seem to stop writing to them, the | ||
505 | write function above aborts in this case with: | ||
506 | "CMD reg does not hold 0xAC after write" | ||
507 | |||
508 | Notice these 2 tests are non destructive iow read-only tests, otherwise | ||
509 | they would defeat their purpose. Although for the bank2_sensors detection a | ||
510 | read/write test would be feasible because of the reaction above, I've | ||
511 | however opted to stay on the safe side. */ | ||
512 | static void __devinit | ||
513 | abituguru_detect_no_bank2_sensors(struct abituguru_data *data) | ||
514 | { | ||
515 | int i; | ||
516 | |||
517 | if (fan_sensors) { | ||
518 | data->bank2_sensors = fan_sensors; | ||
519 | ABIT_UGURU_DEBUG(2, "assuming %d fan sensors because of " | ||
520 | "\"fan_sensors\" module param\n", | ||
521 | (int)data->bank2_sensors); | ||
522 | return; | ||
523 | } | ||
524 | |||
525 | ABIT_UGURU_DEBUG(2, "detecting number of fan sensors\n"); | ||
526 | for (i = 0; i < ABIT_UGURU_MAX_BANK2_SENSORS; i++) { | ||
527 | /* 0x89 are the known used bits: | ||
528 | -0x80 enable shutdown | ||
529 | -0x08 enable beep | ||
530 | -0x01 enable alarm | ||
531 | All other bits should be 0, but on some motherboards | ||
532 | 0x40 (bit 6) is also high for some of the fans?? */ | ||
533 | if (data->bank2_settings[i][0] & ~0xC9) { | ||
534 | ABIT_UGURU_DEBUG(2, " bank2 sensor %d does not seem " | ||
535 | "to be a fan sensor: settings[0] = %02X\n", | ||
536 | i, (unsigned int)data->bank2_settings[i][0]); | ||
537 | break; | ||
538 | } | ||
539 | |||
540 | /* check if the threshold is within the allowed range */ | ||
541 | if (data->bank2_settings[i][1] < | ||
542 | abituguru_bank2_min_threshold) { | ||
543 | ABIT_UGURU_DEBUG(2, " bank2 sensor %d does not seem " | ||
544 | "to be a fan sensor: the threshold (%d) is " | ||
545 | "below the minimum (%d)\n", i, | ||
546 | (int)data->bank2_settings[i][1], | ||
547 | (int)abituguru_bank2_min_threshold); | ||
548 | break; | ||
549 | } | ||
550 | if (data->bank2_settings[i][1] > | ||
551 | abituguru_bank2_max_threshold) { | ||
552 | ABIT_UGURU_DEBUG(2, " bank2 sensor %d does not seem " | ||
553 | "to be a fan sensor: the threshold (%d) is " | ||
554 | "above the maximum (%d)\n", i, | ||
555 | (int)data->bank2_settings[i][1], | ||
556 | (int)abituguru_bank2_max_threshold); | ||
557 | break; | ||
558 | } | ||
559 | } | ||
560 | |||
561 | data->bank2_sensors = i; | ||
562 | ABIT_UGURU_DEBUG(2, " found: %d fan sensors\n", | ||
563 | (int)data->bank2_sensors); | ||
564 | } | ||
565 | |||
566 | static void __devinit | ||
567 | abituguru_detect_no_pwms(struct abituguru_data *data) | ||
568 | { | ||
569 | int i, j; | ||
570 | |||
571 | if (pwms) { | ||
572 | data->pwms = pwms; | ||
573 | ABIT_UGURU_DEBUG(2, "assuming %d PWM outputs because of " | ||
574 | "\"pwms\" module param\n", (int)data->pwms); | ||
575 | return; | ||
576 | } | ||
577 | |||
578 | ABIT_UGURU_DEBUG(2, "detecting number of PWM outputs\n"); | ||
579 | for (i = 0; i < ABIT_UGURU_MAX_PWMS; i++) { | ||
580 | /* 0x80 is the enable bit and the low | ||
581 | nibble is which temp sensor to use, | ||
582 | the other bits should be 0 */ | ||
583 | if (data->pwm_settings[i][0] & ~0x8F) { | ||
584 | ABIT_UGURU_DEBUG(2, " pwm channel %d does not seem " | ||
585 | "to be a pwm channel: settings[0] = %02X\n", | ||
586 | i, (unsigned int)data->pwm_settings[i][0]); | ||
587 | break; | ||
588 | } | ||
589 | |||
590 | /* the low nibble must correspond to one of the temp sensors | ||
591 | we've found */ | ||
592 | for (j = 0; j < data->bank1_sensors[ABIT_UGURU_TEMP_SENSOR]; | ||
593 | j++) { | ||
594 | if (data->bank1_address[ABIT_UGURU_TEMP_SENSOR][j] == | ||
595 | (data->pwm_settings[i][0] & 0x0F)) | ||
596 | break; | ||
597 | } | ||
598 | if (j == data->bank1_sensors[ABIT_UGURU_TEMP_SENSOR]) { | ||
599 | ABIT_UGURU_DEBUG(2, " pwm channel %d does not seem " | ||
600 | "to be a pwm channel: %d is not a valid temp " | ||
601 | "sensor address\n", i, | ||
602 | data->pwm_settings[i][0] & 0x0F); | ||
603 | break; | ||
604 | } | ||
605 | |||
606 | /* check if all other settings are within the allowed range */ | ||
607 | for (j = 1; j < 5; j++) { | ||
608 | u8 min; | ||
609 | /* special case pwm1 min pwm% */ | ||
610 | if ((i == 0) && ((j == 1) || (j == 2))) | ||
611 | min = 77; | ||
612 | else | ||
613 | min = abituguru_pwm_min[j]; | ||
614 | if (data->pwm_settings[i][j] < min) { | ||
615 | ABIT_UGURU_DEBUG(2, " pwm channel %d does " | ||
616 | "not seem to be a pwm channel: " | ||
617 | "setting %d (%d) is below the minimum " | ||
618 | "value (%d)\n", i, j, | ||
619 | (int)data->pwm_settings[i][j], | ||
620 | (int)min); | ||
621 | goto abituguru_detect_no_pwms_exit; | ||
622 | } | ||
623 | if (data->pwm_settings[i][j] > abituguru_pwm_max[j]) { | ||
624 | ABIT_UGURU_DEBUG(2, " pwm channel %d does " | ||
625 | "not seem to be a pwm channel: " | ||
626 | "setting %d (%d) is above the maximum " | ||
627 | "value (%d)\n", i, j, | ||
628 | (int)data->pwm_settings[i][j], | ||
629 | (int)abituguru_pwm_max[j]); | ||
630 | goto abituguru_detect_no_pwms_exit; | ||
631 | } | ||
632 | } | ||
633 | |||
634 | /* check that min temp < max temp and min pwm < max pwm */ | ||
635 | if (data->pwm_settings[i][1] >= data->pwm_settings[i][2]) { | ||
636 | ABIT_UGURU_DEBUG(2, " pwm channel %d does not seem " | ||
637 | "to be a pwm channel: min pwm (%d) >= " | ||
638 | "max pwm (%d)\n", i, | ||
639 | (int)data->pwm_settings[i][1], | ||
640 | (int)data->pwm_settings[i][2]); | ||
641 | break; | ||
642 | } | ||
643 | if (data->pwm_settings[i][3] >= data->pwm_settings[i][4]) { | ||
644 | ABIT_UGURU_DEBUG(2, " pwm channel %d does not seem " | ||
645 | "to be a pwm channel: min temp (%d) >= " | ||
646 | "max temp (%d)\n", i, | ||
647 | (int)data->pwm_settings[i][3], | ||
648 | (int)data->pwm_settings[i][4]); | ||
649 | break; | ||
650 | } | ||
651 | } | ||
652 | |||
653 | abituguru_detect_no_pwms_exit: | ||
654 | data->pwms = i; | ||
655 | ABIT_UGURU_DEBUG(2, " found: %d PWM outputs\n", (int)data->pwms); | ||
656 | } | ||
657 | |||
658 | /* Following are the sysfs callback functions. These functions expect: | ||
659 | sensor_device_attribute_2->index: sensor address/offset in the bank | ||
660 | sensor_device_attribute_2->nr: register offset, bitmask or NA. */ | ||
661 | static struct abituguru_data *abituguru_update_device(struct device *dev); | ||
662 | |||
663 | static ssize_t show_bank1_value(struct device *dev, | ||
664 | struct device_attribute *devattr, char *buf) | ||
665 | { | ||
666 | struct sensor_device_attribute_2 *attr = to_sensor_dev_attr_2(devattr); | ||
667 | struct abituguru_data *data = abituguru_update_device(dev); | ||
668 | if (!data) | ||
669 | return -EIO; | ||
670 | return sprintf(buf, "%d\n", (data->bank1_value[attr->index] * | ||
671 | data->bank1_max_value[attr->index] + 128) / 255); | ||
672 | } | ||
673 | |||
674 | static ssize_t show_bank1_setting(struct device *dev, | ||
675 | struct device_attribute *devattr, char *buf) | ||
676 | { | ||
677 | struct sensor_device_attribute_2 *attr = to_sensor_dev_attr_2(devattr); | ||
678 | struct abituguru_data *data = dev_get_drvdata(dev); | ||
679 | return sprintf(buf, "%d\n", | ||
680 | (data->bank1_settings[attr->index][attr->nr] * | ||
681 | data->bank1_max_value[attr->index] + 128) / 255); | ||
682 | } | ||
683 | |||
684 | static ssize_t show_bank2_value(struct device *dev, | ||
685 | struct device_attribute *devattr, char *buf) | ||
686 | { | ||
687 | struct sensor_device_attribute_2 *attr = to_sensor_dev_attr_2(devattr); | ||
688 | struct abituguru_data *data = abituguru_update_device(dev); | ||
689 | if (!data) | ||
690 | return -EIO; | ||
691 | return sprintf(buf, "%d\n", (data->bank2_value[attr->index] * | ||
692 | ABIT_UGURU_FAN_MAX + 128) / 255); | ||
693 | } | ||
694 | |||
695 | static ssize_t show_bank2_setting(struct device *dev, | ||
696 | struct device_attribute *devattr, char *buf) | ||
697 | { | ||
698 | struct sensor_device_attribute_2 *attr = to_sensor_dev_attr_2(devattr); | ||
699 | struct abituguru_data *data = dev_get_drvdata(dev); | ||
700 | return sprintf(buf, "%d\n", | ||
701 | (data->bank2_settings[attr->index][attr->nr] * | ||
702 | ABIT_UGURU_FAN_MAX + 128) / 255); | ||
703 | } | ||
704 | |||
705 | static ssize_t store_bank1_setting(struct device *dev, struct device_attribute | ||
706 | *devattr, const char *buf, size_t count) | ||
707 | { | ||
708 | struct sensor_device_attribute_2 *attr = to_sensor_dev_attr_2(devattr); | ||
709 | struct abituguru_data *data = dev_get_drvdata(dev); | ||
710 | u8 val = (simple_strtoul(buf, NULL, 10) * 255 + | ||
711 | data->bank1_max_value[attr->index]/2) / | ||
712 | data->bank1_max_value[attr->index]; | ||
713 | ssize_t ret = count; | ||
714 | |||
715 | mutex_lock(&data->update_lock); | ||
716 | if (data->bank1_settings[attr->index][attr->nr] != val) { | ||
717 | u8 orig_val = data->bank1_settings[attr->index][attr->nr]; | ||
718 | data->bank1_settings[attr->index][attr->nr] = val; | ||
719 | if (abituguru_write(data, ABIT_UGURU_SENSOR_BANK1 + 2, | ||
720 | attr->index, data->bank1_settings[attr->index], | ||
721 | 3) <= attr->nr) { | ||
722 | data->bank1_settings[attr->index][attr->nr] = orig_val; | ||
723 | ret = -EIO; | ||
724 | } | ||
725 | } | ||
726 | mutex_unlock(&data->update_lock); | ||
727 | return ret; | ||
728 | } | ||
729 | |||
730 | static ssize_t store_bank2_setting(struct device *dev, struct device_attribute | ||
731 | *devattr, const char *buf, size_t count) | ||
732 | { | ||
733 | struct sensor_device_attribute_2 *attr = to_sensor_dev_attr_2(devattr); | ||
734 | struct abituguru_data *data = dev_get_drvdata(dev); | ||
735 | u8 val = (simple_strtoul(buf, NULL, 10)*255 + ABIT_UGURU_FAN_MAX/2) / | ||
736 | ABIT_UGURU_FAN_MAX; | ||
737 | ssize_t ret = count; | ||
738 | |||
739 | /* this check can be done before taking the lock */ | ||
740 | if ((val < abituguru_bank2_min_threshold) || | ||
741 | (val > abituguru_bank2_max_threshold)) | ||
742 | return -EINVAL; | ||
743 | |||
744 | mutex_lock(&data->update_lock); | ||
745 | if (data->bank2_settings[attr->index][attr->nr] != val) { | ||
746 | u8 orig_val = data->bank2_settings[attr->index][attr->nr]; | ||
747 | data->bank2_settings[attr->index][attr->nr] = val; | ||
748 | if (abituguru_write(data, ABIT_UGURU_SENSOR_BANK2 + 2, | ||
749 | attr->index, data->bank2_settings[attr->index], | ||
750 | 2) <= attr->nr) { | ||
751 | data->bank2_settings[attr->index][attr->nr] = orig_val; | ||
752 | ret = -EIO; | ||
753 | } | ||
754 | } | ||
755 | mutex_unlock(&data->update_lock); | ||
756 | return ret; | ||
757 | } | ||
758 | |||
759 | static ssize_t show_bank1_alarm(struct device *dev, | ||
760 | struct device_attribute *devattr, char *buf) | ||
761 | { | ||
762 | struct sensor_device_attribute_2 *attr = to_sensor_dev_attr_2(devattr); | ||
763 | struct abituguru_data *data = abituguru_update_device(dev); | ||
764 | if (!data) | ||
765 | return -EIO; | ||
766 | /* See if the alarm bit for this sensor is set, and if the | ||
767 | alarm matches the type of alarm we're looking for (for volt | ||
768 | it can be either low or high). The type is stored in a few | ||
769 | readonly bits in the settings part of the relevant sensor. | ||
770 | The bitmask of the type is passed to us in attr->nr. */ | ||
771 | if ((data->alarms[attr->index / 8] & (0x01 << (attr->index % 8))) && | ||
772 | (data->bank1_settings[attr->index][0] & attr->nr)) | ||
773 | return sprintf(buf, "1\n"); | ||
774 | else | ||
775 | return sprintf(buf, "0\n"); | ||
776 | } | ||
777 | |||
778 | static ssize_t show_bank2_alarm(struct device *dev, | ||
779 | struct device_attribute *devattr, char *buf) | ||
780 | { | ||
781 | struct sensor_device_attribute_2 *attr = to_sensor_dev_attr_2(devattr); | ||
782 | struct abituguru_data *data = abituguru_update_device(dev); | ||
783 | if (!data) | ||
784 | return -EIO; | ||
785 | if (data->alarms[2] & (0x01 << attr->index)) | ||
786 | return sprintf(buf, "1\n"); | ||
787 | else | ||
788 | return sprintf(buf, "0\n"); | ||
789 | } | ||
790 | |||
791 | static ssize_t show_bank1_mask(struct device *dev, | ||
792 | struct device_attribute *devattr, char *buf) | ||
793 | { | ||
794 | struct sensor_device_attribute_2 *attr = to_sensor_dev_attr_2(devattr); | ||
795 | struct abituguru_data *data = dev_get_drvdata(dev); | ||
796 | if (data->bank1_settings[attr->index][0] & attr->nr) | ||
797 | return sprintf(buf, "1\n"); | ||
798 | else | ||
799 | return sprintf(buf, "0\n"); | ||
800 | } | ||
801 | |||
802 | static ssize_t show_bank2_mask(struct device *dev, | ||
803 | struct device_attribute *devattr, char *buf) | ||
804 | { | ||
805 | struct sensor_device_attribute_2 *attr = to_sensor_dev_attr_2(devattr); | ||
806 | struct abituguru_data *data = dev_get_drvdata(dev); | ||
807 | if (data->bank2_settings[attr->index][0] & attr->nr) | ||
808 | return sprintf(buf, "1\n"); | ||
809 | else | ||
810 | return sprintf(buf, "0\n"); | ||
811 | } | ||
812 | |||
813 | static ssize_t store_bank1_mask(struct device *dev, | ||
814 | struct device_attribute *devattr, const char *buf, size_t count) | ||
815 | { | ||
816 | struct sensor_device_attribute_2 *attr = to_sensor_dev_attr_2(devattr); | ||
817 | struct abituguru_data *data = dev_get_drvdata(dev); | ||
818 | int mask = simple_strtoul(buf, NULL, 10); | ||
819 | ssize_t ret = count; | ||
820 | u8 orig_val; | ||
821 | |||
822 | mutex_lock(&data->update_lock); | ||
823 | orig_val = data->bank1_settings[attr->index][0]; | ||
824 | |||
825 | if (mask) | ||
826 | data->bank1_settings[attr->index][0] |= attr->nr; | ||
827 | else | ||
828 | data->bank1_settings[attr->index][0] &= ~attr->nr; | ||
829 | |||
830 | if ((data->bank1_settings[attr->index][0] != orig_val) && | ||
831 | (abituguru_write(data, | ||
832 | ABIT_UGURU_SENSOR_BANK1 + 2, attr->index, | ||
833 | data->bank1_settings[attr->index], 3) < 1)) { | ||
834 | data->bank1_settings[attr->index][0] = orig_val; | ||
835 | ret = -EIO; | ||
836 | } | ||
837 | mutex_unlock(&data->update_lock); | ||
838 | return ret; | ||
839 | } | ||
840 | |||
841 | static ssize_t store_bank2_mask(struct device *dev, | ||
842 | struct device_attribute *devattr, const char *buf, size_t count) | ||
843 | { | ||
844 | struct sensor_device_attribute_2 *attr = to_sensor_dev_attr_2(devattr); | ||
845 | struct abituguru_data *data = dev_get_drvdata(dev); | ||
846 | int mask = simple_strtoul(buf, NULL, 10); | ||
847 | ssize_t ret = count; | ||
848 | u8 orig_val; | ||
849 | |||
850 | mutex_lock(&data->update_lock); | ||
851 | orig_val = data->bank2_settings[attr->index][0]; | ||
852 | |||
853 | if (mask) | ||
854 | data->bank2_settings[attr->index][0] |= attr->nr; | ||
855 | else | ||
856 | data->bank2_settings[attr->index][0] &= ~attr->nr; | ||
857 | |||
858 | if ((data->bank2_settings[attr->index][0] != orig_val) && | ||
859 | (abituguru_write(data, | ||
860 | ABIT_UGURU_SENSOR_BANK2 + 2, attr->index, | ||
861 | data->bank2_settings[attr->index], 2) < 1)) { | ||
862 | data->bank2_settings[attr->index][0] = orig_val; | ||
863 | ret = -EIO; | ||
864 | } | ||
865 | mutex_unlock(&data->update_lock); | ||
866 | return ret; | ||
867 | } | ||
868 | |||
869 | /* Fan PWM (speed control) */ | ||
870 | static ssize_t show_pwm_setting(struct device *dev, | ||
871 | struct device_attribute *devattr, char *buf) | ||
872 | { | ||
873 | struct sensor_device_attribute_2 *attr = to_sensor_dev_attr_2(devattr); | ||
874 | struct abituguru_data *data = dev_get_drvdata(dev); | ||
875 | return sprintf(buf, "%d\n", data->pwm_settings[attr->index][attr->nr] * | ||
876 | abituguru_pwm_settings_multiplier[attr->nr]); | ||
877 | } | ||
878 | |||
879 | static ssize_t store_pwm_setting(struct device *dev, struct device_attribute | ||
880 | *devattr, const char *buf, size_t count) | ||
881 | { | ||
882 | struct sensor_device_attribute_2 *attr = to_sensor_dev_attr_2(devattr); | ||
883 | struct abituguru_data *data = dev_get_drvdata(dev); | ||
884 | u8 min, val = (simple_strtoul(buf, NULL, 10) + | ||
885 | abituguru_pwm_settings_multiplier[attr->nr]/2) / | ||
886 | abituguru_pwm_settings_multiplier[attr->nr]; | ||
887 | ssize_t ret = count; | ||
888 | |||
889 | /* special case pwm1 min pwm% */ | ||
890 | if ((attr->index == 0) && ((attr->nr == 1) || (attr->nr == 2))) | ||
891 | min = 77; | ||
892 | else | ||
893 | min = abituguru_pwm_min[attr->nr]; | ||
894 | |||
895 | /* this check can be done before taking the lock */ | ||
896 | if ((val < min) || (val > abituguru_pwm_max[attr->nr])) | ||
897 | return -EINVAL; | ||
898 | |||
899 | mutex_lock(&data->update_lock); | ||
900 | /* this check needs to be done after taking the lock */ | ||
901 | if ((attr->nr & 1) && | ||
902 | (val >= data->pwm_settings[attr->index][attr->nr + 1])) | ||
903 | ret = -EINVAL; | ||
904 | else if (!(attr->nr & 1) && | ||
905 | (val <= data->pwm_settings[attr->index][attr->nr - 1])) | ||
906 | ret = -EINVAL; | ||
907 | else if (data->pwm_settings[attr->index][attr->nr] != val) { | ||
908 | u8 orig_val = data->pwm_settings[attr->index][attr->nr]; | ||
909 | data->pwm_settings[attr->index][attr->nr] = val; | ||
910 | if (abituguru_write(data, ABIT_UGURU_FAN_PWM + 1, | ||
911 | attr->index, data->pwm_settings[attr->index], | ||
912 | 5) <= attr->nr) { | ||
913 | data->pwm_settings[attr->index][attr->nr] = | ||
914 | orig_val; | ||
915 | ret = -EIO; | ||
916 | } | ||
917 | } | ||
918 | mutex_unlock(&data->update_lock); | ||
919 | return ret; | ||
920 | } | ||
921 | |||
922 | static ssize_t show_pwm_sensor(struct device *dev, | ||
923 | struct device_attribute *devattr, char *buf) | ||
924 | { | ||
925 | struct sensor_device_attribute_2 *attr = to_sensor_dev_attr_2(devattr); | ||
926 | struct abituguru_data *data = dev_get_drvdata(dev); | ||
927 | int i; | ||
928 | /* We need to walk to the temp sensor addresses to find what | ||
929 | the userspace id of the configured temp sensor is. */ | ||
930 | for (i = 0; i < data->bank1_sensors[ABIT_UGURU_TEMP_SENSOR]; i++) | ||
931 | if (data->bank1_address[ABIT_UGURU_TEMP_SENSOR][i] == | ||
932 | (data->pwm_settings[attr->index][0] & 0x0F)) | ||
933 | return sprintf(buf, "%d\n", i+1); | ||
934 | |||
935 | return -ENXIO; | ||
936 | } | ||
937 | |||
938 | static ssize_t store_pwm_sensor(struct device *dev, struct device_attribute | ||
939 | *devattr, const char *buf, size_t count) | ||
940 | { | ||
941 | struct sensor_device_attribute_2 *attr = to_sensor_dev_attr_2(devattr); | ||
942 | struct abituguru_data *data = dev_get_drvdata(dev); | ||
943 | unsigned long val = simple_strtoul(buf, NULL, 10) - 1; | ||
944 | ssize_t ret = count; | ||
945 | |||
946 | mutex_lock(&data->update_lock); | ||
947 | if (val < data->bank1_sensors[ABIT_UGURU_TEMP_SENSOR]) { | ||
948 | u8 orig_val = data->pwm_settings[attr->index][0]; | ||
949 | u8 address = data->bank1_address[ABIT_UGURU_TEMP_SENSOR][val]; | ||
950 | data->pwm_settings[attr->index][0] &= 0xF0; | ||
951 | data->pwm_settings[attr->index][0] |= address; | ||
952 | if (data->pwm_settings[attr->index][0] != orig_val) { | ||
953 | if (abituguru_write(data, ABIT_UGURU_FAN_PWM + 1, | ||
954 | attr->index, | ||
955 | data->pwm_settings[attr->index], | ||
956 | 5) < 1) { | ||
957 | data->pwm_settings[attr->index][0] = orig_val; | ||
958 | ret = -EIO; | ||
959 | } | ||
960 | } | ||
961 | } | ||
962 | else | ||
963 | ret = -EINVAL; | ||
964 | mutex_unlock(&data->update_lock); | ||
965 | return ret; | ||
966 | } | ||
967 | |||
968 | static ssize_t show_pwm_enable(struct device *dev, | ||
969 | struct device_attribute *devattr, char *buf) | ||
970 | { | ||
971 | struct sensor_device_attribute_2 *attr = to_sensor_dev_attr_2(devattr); | ||
972 | struct abituguru_data *data = dev_get_drvdata(dev); | ||
973 | int res = 0; | ||
974 | if (data->pwm_settings[attr->index][0] & ABIT_UGURU_FAN_PWM_ENABLE) | ||
975 | res = 2; | ||
976 | return sprintf(buf, "%d\n", res); | ||
977 | } | ||
978 | |||
979 | static ssize_t store_pwm_enable(struct device *dev, struct device_attribute | ||
980 | *devattr, const char *buf, size_t count) | ||
981 | { | ||
982 | struct sensor_device_attribute_2 *attr = to_sensor_dev_attr_2(devattr); | ||
983 | struct abituguru_data *data = dev_get_drvdata(dev); | ||
984 | u8 orig_val, user_val = simple_strtoul(buf, NULL, 10); | ||
985 | ssize_t ret = count; | ||
986 | |||
987 | mutex_lock(&data->update_lock); | ||
988 | orig_val = data->pwm_settings[attr->index][0]; | ||
989 | switch (user_val) { | ||
990 | case 0: | ||
991 | data->pwm_settings[attr->index][0] &= | ||
992 | ~ABIT_UGURU_FAN_PWM_ENABLE; | ||
993 | break; | ||
994 | case 2: | ||
995 | data->pwm_settings[attr->index][0] |= | ||
996 | ABIT_UGURU_FAN_PWM_ENABLE; | ||
997 | break; | ||
998 | default: | ||
999 | ret = -EINVAL; | ||
1000 | } | ||
1001 | if ((data->pwm_settings[attr->index][0] != orig_val) && | ||
1002 | (abituguru_write(data, ABIT_UGURU_FAN_PWM + 1, | ||
1003 | attr->index, data->pwm_settings[attr->index], | ||
1004 | 5) < 1)) { | ||
1005 | data->pwm_settings[attr->index][0] = orig_val; | ||
1006 | ret = -EIO; | ||
1007 | } | ||
1008 | mutex_unlock(&data->update_lock); | ||
1009 | return ret; | ||
1010 | } | ||
1011 | |||
1012 | static ssize_t show_name(struct device *dev, | ||
1013 | struct device_attribute *devattr, char *buf) | ||
1014 | { | ||
1015 | return sprintf(buf, "%s\n", ABIT_UGURU_NAME); | ||
1016 | } | ||
1017 | |||
1018 | /* Sysfs attr templates, the real entries are generated automatically. */ | ||
1019 | static const | ||
1020 | struct sensor_device_attribute_2 abituguru_sysfs_bank1_templ[2][9] = { | ||
1021 | { | ||
1022 | SENSOR_ATTR_2(in%d_input, 0444, show_bank1_value, NULL, 0, 0), | ||
1023 | SENSOR_ATTR_2(in%d_min, 0644, show_bank1_setting, | ||
1024 | store_bank1_setting, 1, 0), | ||
1025 | SENSOR_ATTR_2(in%d_min_alarm, 0444, show_bank1_alarm, NULL, | ||
1026 | ABIT_UGURU_VOLT_LOW_ALARM_FLAG, 0), | ||
1027 | SENSOR_ATTR_2(in%d_max, 0644, show_bank1_setting, | ||
1028 | store_bank1_setting, 2, 0), | ||
1029 | SENSOR_ATTR_2(in%d_max_alarm, 0444, show_bank1_alarm, NULL, | ||
1030 | ABIT_UGURU_VOLT_HIGH_ALARM_FLAG, 0), | ||
1031 | SENSOR_ATTR_2(in%d_beep, 0644, show_bank1_mask, | ||
1032 | store_bank1_mask, ABIT_UGURU_BEEP_ENABLE, 0), | ||
1033 | SENSOR_ATTR_2(in%d_shutdown, 0644, show_bank1_mask, | ||
1034 | store_bank1_mask, ABIT_UGURU_SHUTDOWN_ENABLE, 0), | ||
1035 | SENSOR_ATTR_2(in%d_min_alarm_enable, 0644, show_bank1_mask, | ||
1036 | store_bank1_mask, ABIT_UGURU_VOLT_LOW_ALARM_ENABLE, 0), | ||
1037 | SENSOR_ATTR_2(in%d_max_alarm_enable, 0644, show_bank1_mask, | ||
1038 | store_bank1_mask, ABIT_UGURU_VOLT_HIGH_ALARM_ENABLE, 0), | ||
1039 | }, { | ||
1040 | SENSOR_ATTR_2(temp%d_input, 0444, show_bank1_value, NULL, 0, 0), | ||
1041 | SENSOR_ATTR_2(temp%d_alarm, 0444, show_bank1_alarm, NULL, | ||
1042 | ABIT_UGURU_TEMP_HIGH_ALARM_FLAG, 0), | ||
1043 | SENSOR_ATTR_2(temp%d_max, 0644, show_bank1_setting, | ||
1044 | store_bank1_setting, 1, 0), | ||
1045 | SENSOR_ATTR_2(temp%d_crit, 0644, show_bank1_setting, | ||
1046 | store_bank1_setting, 2, 0), | ||
1047 | SENSOR_ATTR_2(temp%d_beep, 0644, show_bank1_mask, | ||
1048 | store_bank1_mask, ABIT_UGURU_BEEP_ENABLE, 0), | ||
1049 | SENSOR_ATTR_2(temp%d_shutdown, 0644, show_bank1_mask, | ||
1050 | store_bank1_mask, ABIT_UGURU_SHUTDOWN_ENABLE, 0), | ||
1051 | SENSOR_ATTR_2(temp%d_alarm_enable, 0644, show_bank1_mask, | ||
1052 | store_bank1_mask, ABIT_UGURU_TEMP_HIGH_ALARM_ENABLE, 0), | ||
1053 | } | ||
1054 | }; | ||
1055 | |||
1056 | static const struct sensor_device_attribute_2 abituguru_sysfs_fan_templ[6] = { | ||
1057 | SENSOR_ATTR_2(fan%d_input, 0444, show_bank2_value, NULL, 0, 0), | ||
1058 | SENSOR_ATTR_2(fan%d_alarm, 0444, show_bank2_alarm, NULL, 0, 0), | ||
1059 | SENSOR_ATTR_2(fan%d_min, 0644, show_bank2_setting, | ||
1060 | store_bank2_setting, 1, 0), | ||
1061 | SENSOR_ATTR_2(fan%d_beep, 0644, show_bank2_mask, | ||
1062 | store_bank2_mask, ABIT_UGURU_BEEP_ENABLE, 0), | ||
1063 | SENSOR_ATTR_2(fan%d_shutdown, 0644, show_bank2_mask, | ||
1064 | store_bank2_mask, ABIT_UGURU_SHUTDOWN_ENABLE, 0), | ||
1065 | SENSOR_ATTR_2(fan%d_alarm_enable, 0644, show_bank2_mask, | ||
1066 | store_bank2_mask, ABIT_UGURU_FAN_LOW_ALARM_ENABLE, 0), | ||
1067 | }; | ||
1068 | |||
1069 | static const struct sensor_device_attribute_2 abituguru_sysfs_pwm_templ[6] = { | ||
1070 | SENSOR_ATTR_2(pwm%d_enable, 0644, show_pwm_enable, | ||
1071 | store_pwm_enable, 0, 0), | ||
1072 | SENSOR_ATTR_2(pwm%d_auto_channels_temp, 0644, show_pwm_sensor, | ||
1073 | store_pwm_sensor, 0, 0), | ||
1074 | SENSOR_ATTR_2(pwm%d_auto_point1_pwm, 0644, show_pwm_setting, | ||
1075 | store_pwm_setting, 1, 0), | ||
1076 | SENSOR_ATTR_2(pwm%d_auto_point2_pwm, 0644, show_pwm_setting, | ||
1077 | store_pwm_setting, 2, 0), | ||
1078 | SENSOR_ATTR_2(pwm%d_auto_point1_temp, 0644, show_pwm_setting, | ||
1079 | store_pwm_setting, 3, 0), | ||
1080 | SENSOR_ATTR_2(pwm%d_auto_point2_temp, 0644, show_pwm_setting, | ||
1081 | store_pwm_setting, 4, 0), | ||
1082 | }; | ||
1083 | |||
1084 | static struct sensor_device_attribute_2 abituguru_sysfs_attr[] = { | ||
1085 | SENSOR_ATTR_2(name, 0444, show_name, NULL, 0, 0), | ||
1086 | }; | ||
1087 | |||
1088 | static int __devinit abituguru_probe(struct platform_device *pdev) | ||
1089 | { | ||
1090 | struct abituguru_data *data; | ||
1091 | int i, j, used, sysfs_names_free, sysfs_attr_i, res = -ENODEV; | ||
1092 | char *sysfs_filename; | ||
1093 | |||
1094 | /* El weirdo probe order, to keep the sysfs order identical to the | ||
1095 | BIOS and window-appliction listing order. */ | ||
1096 | const u8 probe_order[ABIT_UGURU_MAX_BANK1_SENSORS] = { | ||
1097 | 0x00, 0x01, 0x03, 0x04, 0x0A, 0x08, 0x0E, 0x02, | ||
1098 | 0x09, 0x06, 0x05, 0x0B, 0x0F, 0x0D, 0x07, 0x0C }; | ||
1099 | |||
1100 | if (!(data = kzalloc(sizeof(struct abituguru_data), GFP_KERNEL))) | ||
1101 | return -ENOMEM; | ||
1102 | |||
1103 | data->addr = platform_get_resource(pdev, IORESOURCE_IO, 0)->start; | ||
1104 | mutex_init(&data->update_lock); | ||
1105 | platform_set_drvdata(pdev, data); | ||
1106 | |||
1107 | /* See if the uGuru is ready */ | ||
1108 | if (inb_p(data->addr + ABIT_UGURU_DATA) == ABIT_UGURU_STATUS_INPUT) | ||
1109 | data->uguru_ready = 1; | ||
1110 | |||
1111 | /* Completely read the uGuru this has 2 purposes: | ||
1112 | - testread / see if one really is there. | ||
1113 | - make an in memory copy of all the uguru settings for future use. */ | ||
1114 | if (abituguru_read(data, ABIT_UGURU_ALARM_BANK, 0, | ||
1115 | data->alarms, 3, ABIT_UGURU_MAX_RETRIES) != 3) | ||
1116 | goto abituguru_probe_error; | ||
1117 | |||
1118 | for (i = 0; i < ABIT_UGURU_MAX_BANK1_SENSORS; i++) { | ||
1119 | if (abituguru_read(data, ABIT_UGURU_SENSOR_BANK1, i, | ||
1120 | &data->bank1_value[i], 1, | ||
1121 | ABIT_UGURU_MAX_RETRIES) != 1) | ||
1122 | goto abituguru_probe_error; | ||
1123 | if (abituguru_read(data, ABIT_UGURU_SENSOR_BANK1+1, i, | ||
1124 | data->bank1_settings[i], 3, | ||
1125 | ABIT_UGURU_MAX_RETRIES) != 3) | ||
1126 | goto abituguru_probe_error; | ||
1127 | } | ||
1128 | /* Note: We don't know how many bank2 sensors / pwms there really are, | ||
1129 | but in order to "detect" this we need to read the maximum amount | ||
1130 | anyways. If we read sensors/pwms not there we'll just read crap | ||
1131 | this can't hurt. We need the detection because we don't want | ||
1132 | unwanted writes, which will hurt! */ | ||
1133 | for (i = 0; i < ABIT_UGURU_MAX_BANK2_SENSORS; i++) { | ||
1134 | if (abituguru_read(data, ABIT_UGURU_SENSOR_BANK2, i, | ||
1135 | &data->bank2_value[i], 1, | ||
1136 | ABIT_UGURU_MAX_RETRIES) != 1) | ||
1137 | goto abituguru_probe_error; | ||
1138 | if (abituguru_read(data, ABIT_UGURU_SENSOR_BANK2+1, i, | ||
1139 | data->bank2_settings[i], 2, | ||
1140 | ABIT_UGURU_MAX_RETRIES) != 2) | ||
1141 | goto abituguru_probe_error; | ||
1142 | } | ||
1143 | for (i = 0; i < ABIT_UGURU_MAX_PWMS; i++) { | ||
1144 | if (abituguru_read(data, ABIT_UGURU_FAN_PWM, i, | ||
1145 | data->pwm_settings[i], 5, | ||
1146 | ABIT_UGURU_MAX_RETRIES) != 5) | ||
1147 | goto abituguru_probe_error; | ||
1148 | } | ||
1149 | data->last_updated = jiffies; | ||
1150 | |||
1151 | /* Detect sensor types and fill the sysfs attr for bank1 */ | ||
1152 | sysfs_attr_i = 0; | ||
1153 | sysfs_filename = data->sysfs_names; | ||
1154 | sysfs_names_free = ABITUGURU_SYSFS_NAMES_LENGTH; | ||
1155 | for (i = 0; i < ABIT_UGURU_MAX_BANK1_SENSORS; i++) { | ||
1156 | res = abituguru_detect_bank1_sensor_type(data, probe_order[i]); | ||
1157 | if (res < 0) | ||
1158 | goto abituguru_probe_error; | ||
1159 | if (res == ABIT_UGURU_NC) | ||
1160 | continue; | ||
1161 | |||
1162 | /* res 1 (temp) sensors have 7 sysfs entries, 0 (in) 9 */ | ||
1163 | for (j = 0; j < (res ? 7 : 9); j++) { | ||
1164 | used = snprintf(sysfs_filename, sysfs_names_free, | ||
1165 | abituguru_sysfs_bank1_templ[res][j].dev_attr. | ||
1166 | attr.name, data->bank1_sensors[res] + res) | ||
1167 | + 1; | ||
1168 | data->sysfs_attr[sysfs_attr_i] = | ||
1169 | abituguru_sysfs_bank1_templ[res][j]; | ||
1170 | data->sysfs_attr[sysfs_attr_i].dev_attr.attr.name = | ||
1171 | sysfs_filename; | ||
1172 | data->sysfs_attr[sysfs_attr_i].index = probe_order[i]; | ||
1173 | sysfs_filename += used; | ||
1174 | sysfs_names_free -= used; | ||
1175 | sysfs_attr_i++; | ||
1176 | } | ||
1177 | data->bank1_max_value[probe_order[i]] = | ||
1178 | abituguru_bank1_max_value[res]; | ||
1179 | data->bank1_address[res][data->bank1_sensors[res]] = | ||
1180 | probe_order[i]; | ||
1181 | data->bank1_sensors[res]++; | ||
1182 | } | ||
1183 | /* Detect number of sensors and fill the sysfs attr for bank2 (fans) */ | ||
1184 | abituguru_detect_no_bank2_sensors(data); | ||
1185 | for (i = 0; i < data->bank2_sensors; i++) { | ||
1186 | for (j = 0; j < ARRAY_SIZE(abituguru_sysfs_fan_templ); j++) { | ||
1187 | used = snprintf(sysfs_filename, sysfs_names_free, | ||
1188 | abituguru_sysfs_fan_templ[j].dev_attr.attr.name, | ||
1189 | i + 1) + 1; | ||
1190 | data->sysfs_attr[sysfs_attr_i] = | ||
1191 | abituguru_sysfs_fan_templ[j]; | ||
1192 | data->sysfs_attr[sysfs_attr_i].dev_attr.attr.name = | ||
1193 | sysfs_filename; | ||
1194 | data->sysfs_attr[sysfs_attr_i].index = i; | ||
1195 | sysfs_filename += used; | ||
1196 | sysfs_names_free -= used; | ||
1197 | sysfs_attr_i++; | ||
1198 | } | ||
1199 | } | ||
1200 | /* Detect number of sensors and fill the sysfs attr for pwms */ | ||
1201 | abituguru_detect_no_pwms(data); | ||
1202 | for (i = 0; i < data->pwms; i++) { | ||
1203 | for (j = 0; j < ARRAY_SIZE(abituguru_sysfs_pwm_templ); j++) { | ||
1204 | used = snprintf(sysfs_filename, sysfs_names_free, | ||
1205 | abituguru_sysfs_pwm_templ[j].dev_attr.attr.name, | ||
1206 | i + 1) + 1; | ||
1207 | data->sysfs_attr[sysfs_attr_i] = | ||
1208 | abituguru_sysfs_pwm_templ[j]; | ||
1209 | data->sysfs_attr[sysfs_attr_i].dev_attr.attr.name = | ||
1210 | sysfs_filename; | ||
1211 | data->sysfs_attr[sysfs_attr_i].index = i; | ||
1212 | sysfs_filename += used; | ||
1213 | sysfs_names_free -= used; | ||
1214 | sysfs_attr_i++; | ||
1215 | } | ||
1216 | } | ||
1217 | /* Fail safe check, this should never happen! */ | ||
1218 | if (sysfs_names_free < 0) { | ||
1219 | printk(KERN_ERR ABIT_UGURU_NAME ": Fatal error ran out of " | ||
1220 | "space for sysfs attr names. This should never " | ||
1221 | "happen please report to the abituguru maintainer " | ||
1222 | "(see MAINTAINERS)\n"); | ||
1223 | res = -ENAMETOOLONG; | ||
1224 | goto abituguru_probe_error; | ||
1225 | } | ||
1226 | printk(KERN_INFO ABIT_UGURU_NAME ": found Abit uGuru\n"); | ||
1227 | |||
1228 | /* Register sysfs hooks */ | ||
1229 | data->class_dev = hwmon_device_register(&pdev->dev); | ||
1230 | if (IS_ERR(data->class_dev)) { | ||
1231 | res = PTR_ERR(data->class_dev); | ||
1232 | goto abituguru_probe_error; | ||
1233 | } | ||
1234 | for (i = 0; i < sysfs_attr_i; i++) | ||
1235 | device_create_file(&pdev->dev, &data->sysfs_attr[i].dev_attr); | ||
1236 | for (i = 0; i < ARRAY_SIZE(abituguru_sysfs_attr); i++) | ||
1237 | device_create_file(&pdev->dev, | ||
1238 | &abituguru_sysfs_attr[i].dev_attr); | ||
1239 | |||
1240 | return 0; | ||
1241 | |||
1242 | abituguru_probe_error: | ||
1243 | kfree(data); | ||
1244 | return res; | ||
1245 | } | ||
1246 | |||
1247 | static int __devexit abituguru_remove(struct platform_device *pdev) | ||
1248 | { | ||
1249 | struct abituguru_data *data = platform_get_drvdata(pdev); | ||
1250 | |||
1251 | platform_set_drvdata(pdev, NULL); | ||
1252 | hwmon_device_unregister(data->class_dev); | ||
1253 | kfree(data); | ||
1254 | |||
1255 | return 0; | ||
1256 | } | ||
1257 | |||
1258 | static struct abituguru_data *abituguru_update_device(struct device *dev) | ||
1259 | { | ||
1260 | int i, err; | ||
1261 | struct abituguru_data *data = dev_get_drvdata(dev); | ||
1262 | /* fake a complete successful read if no update necessary. */ | ||
1263 | char success = 1; | ||
1264 | |||
1265 | mutex_lock(&data->update_lock); | ||
1266 | if (time_after(jiffies, data->last_updated + HZ)) { | ||
1267 | success = 0; | ||
1268 | if ((err = abituguru_read(data, ABIT_UGURU_ALARM_BANK, 0, | ||
1269 | data->alarms, 3, 0)) != 3) | ||
1270 | goto LEAVE_UPDATE; | ||
1271 | for (i = 0; i < ABIT_UGURU_MAX_BANK1_SENSORS; i++) { | ||
1272 | if ((err = abituguru_read(data, | ||
1273 | ABIT_UGURU_SENSOR_BANK1, i, | ||
1274 | &data->bank1_value[i], 1, 0)) != 1) | ||
1275 | goto LEAVE_UPDATE; | ||
1276 | if ((err = abituguru_read(data, | ||
1277 | ABIT_UGURU_SENSOR_BANK1 + 1, i, | ||
1278 | data->bank1_settings[i], 3, 0)) != 3) | ||
1279 | goto LEAVE_UPDATE; | ||
1280 | } | ||
1281 | for (i = 0; i < data->bank2_sensors; i++) | ||
1282 | if ((err = abituguru_read(data, | ||
1283 | ABIT_UGURU_SENSOR_BANK2, i, | ||
1284 | &data->bank2_value[i], 1, 0)) != 1) | ||
1285 | goto LEAVE_UPDATE; | ||
1286 | /* success! */ | ||
1287 | success = 1; | ||
1288 | data->update_timeouts = 0; | ||
1289 | LEAVE_UPDATE: | ||
1290 | /* handle timeout condition */ | ||
1291 | if (err == -EBUSY) { | ||
1292 | /* No overflow please */ | ||
1293 | if (data->update_timeouts < 255u) | ||
1294 | data->update_timeouts++; | ||
1295 | if (data->update_timeouts <= ABIT_UGURU_MAX_TIMEOUTS) { | ||
1296 | ABIT_UGURU_DEBUG(3, "timeout exceeded, will " | ||
1297 | "try again next update\n"); | ||
1298 | /* Just a timeout, fake a successful read */ | ||
1299 | success = 1; | ||
1300 | } else | ||
1301 | ABIT_UGURU_DEBUG(1, "timeout exceeded %d " | ||
1302 | "times waiting for more input state\n", | ||
1303 | (int)data->update_timeouts); | ||
1304 | } | ||
1305 | /* On success set last_updated */ | ||
1306 | if (success) | ||
1307 | data->last_updated = jiffies; | ||
1308 | } | ||
1309 | mutex_unlock(&data->update_lock); | ||
1310 | |||
1311 | if (success) | ||
1312 | return data; | ||
1313 | else | ||
1314 | return NULL; | ||
1315 | } | ||
1316 | |||
1317 | static struct platform_driver abituguru_driver = { | ||
1318 | .driver = { | ||
1319 | .owner = THIS_MODULE, | ||
1320 | .name = ABIT_UGURU_NAME, | ||
1321 | }, | ||
1322 | .probe = abituguru_probe, | ||
1323 | .remove = __devexit_p(abituguru_remove), | ||
1324 | }; | ||
1325 | |||
1326 | static int __init abituguru_detect(void) | ||
1327 | { | ||
1328 | /* See if there is an uguru there. After a reboot uGuru will hold 0x00 | ||
1329 | at DATA and 0xAC, when this driver has already been loaded once | ||
1330 | DATA will hold 0x08. For most uGuru's CMD will hold 0xAC in either | ||
1331 | scenario but some will hold 0x00. | ||
1332 | Some uGuru's initally hold 0x09 at DATA and will only hold 0x08 | ||
1333 | after reading CMD first, so CMD must be read first! */ | ||
1334 | u8 cmd_val = inb_p(ABIT_UGURU_BASE + ABIT_UGURU_CMD); | ||
1335 | u8 data_val = inb_p(ABIT_UGURU_BASE + ABIT_UGURU_DATA); | ||
1336 | if (((data_val == 0x00) || (data_val == 0x08)) && | ||
1337 | ((cmd_val == 0x00) || (cmd_val == 0xAC))) | ||
1338 | return ABIT_UGURU_BASE; | ||
1339 | |||
1340 | ABIT_UGURU_DEBUG(2, "no Abit uGuru found, data = 0x%02X, cmd = " | ||
1341 | "0x%02X\n", (unsigned int)data_val, (unsigned int)cmd_val); | ||
1342 | |||
1343 | if (force) { | ||
1344 | printk(KERN_INFO ABIT_UGURU_NAME ": Assuming Abit uGuru is " | ||
1345 | "present because of \"force\" parameter\n"); | ||
1346 | return ABIT_UGURU_BASE; | ||
1347 | } | ||
1348 | |||
1349 | /* No uGuru found */ | ||
1350 | return -ENODEV; | ||
1351 | } | ||
1352 | |||
1353 | static struct platform_device *abituguru_pdev; | ||
1354 | |||
1355 | static int __init abituguru_init(void) | ||
1356 | { | ||
1357 | int address, err; | ||
1358 | struct resource res = { .flags = IORESOURCE_IO }; | ||
1359 | |||
1360 | address = abituguru_detect(); | ||
1361 | if (address < 0) | ||
1362 | return address; | ||
1363 | |||
1364 | err = platform_driver_register(&abituguru_driver); | ||
1365 | if (err) | ||
1366 | goto exit; | ||
1367 | |||
1368 | abituguru_pdev = platform_device_alloc(ABIT_UGURU_NAME, address); | ||
1369 | if (!abituguru_pdev) { | ||
1370 | printk(KERN_ERR ABIT_UGURU_NAME | ||
1371 | ": Device allocation failed\n"); | ||
1372 | err = -ENOMEM; | ||
1373 | goto exit_driver_unregister; | ||
1374 | } | ||
1375 | |||
1376 | res.start = address; | ||
1377 | res.end = address + ABIT_UGURU_REGION_LENGTH - 1; | ||
1378 | res.name = ABIT_UGURU_NAME; | ||
1379 | |||
1380 | err = platform_device_add_resources(abituguru_pdev, &res, 1); | ||
1381 | if (err) { | ||
1382 | printk(KERN_ERR ABIT_UGURU_NAME | ||
1383 | ": Device resource addition failed (%d)\n", err); | ||
1384 | goto exit_device_put; | ||
1385 | } | ||
1386 | |||
1387 | err = platform_device_add(abituguru_pdev); | ||
1388 | if (err) { | ||
1389 | printk(KERN_ERR ABIT_UGURU_NAME | ||
1390 | ": Device addition failed (%d)\n", err); | ||
1391 | goto exit_device_put; | ||
1392 | } | ||
1393 | |||
1394 | return 0; | ||
1395 | |||
1396 | exit_device_put: | ||
1397 | platform_device_put(abituguru_pdev); | ||
1398 | exit_driver_unregister: | ||
1399 | platform_driver_unregister(&abituguru_driver); | ||
1400 | exit: | ||
1401 | return err; | ||
1402 | } | ||
1403 | |||
1404 | static void __exit abituguru_exit(void) | ||
1405 | { | ||
1406 | platform_device_unregister(abituguru_pdev); | ||
1407 | platform_driver_unregister(&abituguru_driver); | ||
1408 | } | ||
1409 | |||
1410 | MODULE_AUTHOR("Hans de Goede <j.w.r.degoede@hhs.nl>"); | ||
1411 | MODULE_DESCRIPTION("Abit uGuru Sensor device"); | ||
1412 | MODULE_LICENSE("GPL"); | ||
1413 | |||
1414 | module_init(abituguru_init); | ||
1415 | module_exit(abituguru_exit); | ||
diff --git a/drivers/hwmon/f71805f.c b/drivers/hwmon/f71805f.c index 885465df6e6a..fd72440faf76 100644 --- a/drivers/hwmon/f71805f.c +++ b/drivers/hwmon/f71805f.c | |||
@@ -99,10 +99,6 @@ superio_exit(int base) | |||
99 | #define ADDR_REG_OFFSET 0 | 99 | #define ADDR_REG_OFFSET 0 |
100 | #define DATA_REG_OFFSET 1 | 100 | #define DATA_REG_OFFSET 1 |
101 | 101 | ||
102 | static struct resource f71805f_resource __initdata = { | ||
103 | .flags = IORESOURCE_IO, | ||
104 | }; | ||
105 | |||
106 | /* | 102 | /* |
107 | * Registers | 103 | * Registers |
108 | */ | 104 | */ |
@@ -782,6 +778,11 @@ static struct platform_driver f71805f_driver = { | |||
782 | 778 | ||
783 | static int __init f71805f_device_add(unsigned short address) | 779 | static int __init f71805f_device_add(unsigned short address) |
784 | { | 780 | { |
781 | struct resource res = { | ||
782 | .start = address, | ||
783 | .end = address + REGION_LENGTH - 1, | ||
784 | .flags = IORESOURCE_IO, | ||
785 | }; | ||
785 | int err; | 786 | int err; |
786 | 787 | ||
787 | pdev = platform_device_alloc(DRVNAME, address); | 788 | pdev = platform_device_alloc(DRVNAME, address); |
@@ -791,10 +792,8 @@ static int __init f71805f_device_add(unsigned short address) | |||
791 | goto exit; | 792 | goto exit; |
792 | } | 793 | } |
793 | 794 | ||
794 | f71805f_resource.start = address; | 795 | res.name = pdev->name; |
795 | f71805f_resource.end = address + REGION_LENGTH - 1; | 796 | err = platform_device_add_resources(pdev, &res, 1); |
796 | f71805f_resource.name = pdev->name; | ||
797 | err = platform_device_add_resources(pdev, &f71805f_resource, 1); | ||
798 | if (err) { | 797 | if (err) { |
799 | printk(KERN_ERR DRVNAME ": Device resource addition failed " | 798 | printk(KERN_ERR DRVNAME ": Device resource addition failed " |
800 | "(%d)\n", err); | 799 | "(%d)\n", err); |
diff --git a/drivers/hwmon/hdaps.c b/drivers/hwmon/hdaps.c index 1659f6c41458..42b632889dd8 100644 --- a/drivers/hwmon/hdaps.c +++ b/drivers/hwmon/hdaps.c | |||
@@ -41,7 +41,7 @@ | |||
41 | #define HDAPS_PORT_STATE 0x1611 /* device state */ | 41 | #define HDAPS_PORT_STATE 0x1611 /* device state */ |
42 | #define HDAPS_PORT_YPOS 0x1612 /* y-axis position */ | 42 | #define HDAPS_PORT_YPOS 0x1612 /* y-axis position */ |
43 | #define HDAPS_PORT_XPOS 0x1614 /* x-axis position */ | 43 | #define HDAPS_PORT_XPOS 0x1614 /* x-axis position */ |
44 | #define HDAPS_PORT_TEMP1 0x1616 /* device temperature, in celcius */ | 44 | #define HDAPS_PORT_TEMP1 0x1616 /* device temperature, in Celsius */ |
45 | #define HDAPS_PORT_YVAR 0x1617 /* y-axis variance (what is this?) */ | 45 | #define HDAPS_PORT_YVAR 0x1617 /* y-axis variance (what is this?) */ |
46 | #define HDAPS_PORT_XVAR 0x1619 /* x-axis variance (what is this?) */ | 46 | #define HDAPS_PORT_XVAR 0x1619 /* x-axis variance (what is this?) */ |
47 | #define HDAPS_PORT_TEMP2 0x161b /* device temperature (again?) */ | 47 | #define HDAPS_PORT_TEMP2 0x161b /* device temperature (again?) */ |
@@ -522,13 +522,15 @@ static int __init hdaps_init(void) | |||
522 | { | 522 | { |
523 | int ret; | 523 | int ret; |
524 | 524 | ||
525 | /* Note that DMI_MATCH(...,"ThinkPad T42") will match "ThinkPad T42p" */ | 525 | /* Note that HDAPS_DMI_MATCH_NORMAL("ThinkPad T42") would match |
526 | "ThinkPad T42p", so the order of the entries matters */ | ||
526 | struct dmi_system_id hdaps_whitelist[] = { | 527 | struct dmi_system_id hdaps_whitelist[] = { |
527 | HDAPS_DMI_MATCH_NORMAL("ThinkPad H"), | 528 | HDAPS_DMI_MATCH_NORMAL("ThinkPad H"), |
528 | HDAPS_DMI_MATCH_INVERT("ThinkPad R50p"), | 529 | HDAPS_DMI_MATCH_INVERT("ThinkPad R50p"), |
529 | HDAPS_DMI_MATCH_NORMAL("ThinkPad R50"), | 530 | HDAPS_DMI_MATCH_NORMAL("ThinkPad R50"), |
530 | HDAPS_DMI_MATCH_NORMAL("ThinkPad R51"), | 531 | HDAPS_DMI_MATCH_NORMAL("ThinkPad R51"), |
531 | HDAPS_DMI_MATCH_NORMAL("ThinkPad R52"), | 532 | HDAPS_DMI_MATCH_NORMAL("ThinkPad R52"), |
533 | HDAPS_DMI_MATCH_NORMAL("ThinkPad H"), /* R52 (1846AQG) */ | ||
532 | HDAPS_DMI_MATCH_INVERT("ThinkPad T41p"), | 534 | HDAPS_DMI_MATCH_INVERT("ThinkPad T41p"), |
533 | HDAPS_DMI_MATCH_NORMAL("ThinkPad T41"), | 535 | HDAPS_DMI_MATCH_NORMAL("ThinkPad T41"), |
534 | HDAPS_DMI_MATCH_INVERT("ThinkPad T42p"), | 536 | HDAPS_DMI_MATCH_INVERT("ThinkPad T42p"), |
@@ -536,9 +538,9 @@ static int __init hdaps_init(void) | |||
536 | HDAPS_DMI_MATCH_NORMAL("ThinkPad T43"), | 538 | HDAPS_DMI_MATCH_NORMAL("ThinkPad T43"), |
537 | HDAPS_DMI_MATCH_LENOVO("ThinkPad T60p"), | 539 | HDAPS_DMI_MATCH_LENOVO("ThinkPad T60p"), |
538 | HDAPS_DMI_MATCH_NORMAL("ThinkPad X40"), | 540 | HDAPS_DMI_MATCH_NORMAL("ThinkPad X40"), |
539 | HDAPS_DMI_MATCH_NORMAL("ThinkPad X41 Tablet"), | ||
540 | HDAPS_DMI_MATCH_NORMAL("ThinkPad X41"), | 541 | HDAPS_DMI_MATCH_NORMAL("ThinkPad X41"), |
541 | HDAPS_DMI_MATCH_LENOVO("ThinkPad X60"), | 542 | HDAPS_DMI_MATCH_LENOVO("ThinkPad X60"), |
543 | HDAPS_DMI_MATCH_NORMAL("ThinkPad Z60m"), | ||
542 | { .ident = NULL } | 544 | { .ident = NULL } |
543 | }; | 545 | }; |
544 | 546 | ||
diff --git a/drivers/hwmon/hwmon-vid.c b/drivers/hwmon/hwmon-vid.c index a74a44f16f51..a6764ff00803 100644 --- a/drivers/hwmon/hwmon-vid.c +++ b/drivers/hwmon/hwmon-vid.c | |||
@@ -58,11 +58,20 @@ | |||
58 | doesn't seem to be any named specification for these. The conversion | 58 | doesn't seem to be any named specification for these. The conversion |
59 | tables are detailed directly in the various Pentium M datasheets: | 59 | tables are detailed directly in the various Pentium M datasheets: |
60 | http://www.intel.com/design/intarch/pentiumm/docs_pentiumm.htm | 60 | http://www.intel.com/design/intarch/pentiumm/docs_pentiumm.htm |
61 | |||
62 | The 14 specification corresponds to Intel Core series. There | ||
63 | doesn't seem to be any named specification for these. The conversion | ||
64 | tables are detailed directly in the various Pentium Core datasheets: | ||
65 | http://www.intel.com/design/mobile/datashts/309221.htm | ||
66 | |||
67 | The 110 (VRM 11) specification corresponds to Intel Conroe based series. | ||
68 | http://www.intel.com/design/processor/applnots/313214.htm | ||
61 | */ | 69 | */ |
62 | 70 | ||
63 | /* vrm is the VRM/VRD document version multiplied by 10. | 71 | /* vrm is the VRM/VRD document version multiplied by 10. |
64 | val is the 4-, 5- or 6-bit VID code. | 72 | val is the 4-bit or more VID code. |
65 | Returned value is in mV to avoid floating point in the kernel. */ | 73 | Returned value is in mV to avoid floating point in the kernel. |
74 | Some VID have some bits in uV scale, this is rounded to mV */ | ||
66 | int vid_from_reg(int val, u8 vrm) | 75 | int vid_from_reg(int val, u8 vrm) |
67 | { | 76 | { |
68 | int vid; | 77 | int vid; |
@@ -70,26 +79,36 @@ int vid_from_reg(int val, u8 vrm) | |||
70 | switch(vrm) { | 79 | switch(vrm) { |
71 | 80 | ||
72 | case 100: /* VRD 10.0 */ | 81 | case 100: /* VRD 10.0 */ |
82 | /* compute in uV, round to mV */ | ||
83 | val &= 0x3f; | ||
73 | if((val & 0x1f) == 0x1f) | 84 | if((val & 0x1f) == 0x1f) |
74 | return 0; | 85 | return 0; |
75 | if((val & 0x1f) <= 0x09 || val == 0x0a) | 86 | if((val & 0x1f) <= 0x09 || val == 0x0a) |
76 | vid = 10875 - (val & 0x1f) * 250; | 87 | vid = 1087500 - (val & 0x1f) * 25000; |
77 | else | 88 | else |
78 | vid = 18625 - (val & 0x1f) * 250; | 89 | vid = 1862500 - (val & 0x1f) * 25000; |
79 | if(val & 0x20) | 90 | if(val & 0x20) |
80 | vid -= 125; | 91 | vid -= 12500; |
81 | vid /= 10; /* only return 3 dec. places for now */ | 92 | return((vid + 500) / 1000); |
82 | return vid; | ||
83 | 93 | ||
94 | case 110: /* Intel Conroe */ | ||
95 | /* compute in uV, round to mV */ | ||
96 | val &= 0xff; | ||
97 | if(((val & 0x7e) == 0xfe) || (!(val & 0x7e))) | ||
98 | return 0; | ||
99 | return((1600000 - (val - 2) * 6250 + 500) / 1000); | ||
84 | case 24: /* Opteron processor */ | 100 | case 24: /* Opteron processor */ |
101 | val &= 0x1f; | ||
85 | return(val == 0x1f ? 0 : 1550 - val * 25); | 102 | return(val == 0x1f ? 0 : 1550 - val * 25); |
86 | 103 | ||
87 | case 91: /* VRM 9.1 */ | 104 | case 91: /* VRM 9.1 */ |
88 | case 90: /* VRM 9.0 */ | 105 | case 90: /* VRM 9.0 */ |
106 | val &= 0x1f; | ||
89 | return(val == 0x1f ? 0 : | 107 | return(val == 0x1f ? 0 : |
90 | 1850 - val * 25); | 108 | 1850 - val * 25); |
91 | 109 | ||
92 | case 85: /* VRM 8.5 */ | 110 | case 85: /* VRM 8.5 */ |
111 | val &= 0x1f; | ||
93 | return((val & 0x10 ? 25 : 0) + | 112 | return((val & 0x10 ? 25 : 0) + |
94 | ((val & 0x0f) > 0x04 ? 2050 : 1250) - | 113 | ((val & 0x0f) > 0x04 ? 2050 : 1250) - |
95 | ((val & 0x0f) * 50)); | 114 | ((val & 0x0f) * 50)); |
@@ -98,14 +117,21 @@ int vid_from_reg(int val, u8 vrm) | |||
98 | val &= 0x0f; | 117 | val &= 0x0f; |
99 | /* fall through */ | 118 | /* fall through */ |
100 | case 82: /* VRM 8.2 */ | 119 | case 82: /* VRM 8.2 */ |
120 | val &= 0x1f; | ||
101 | return(val == 0x1f ? 0 : | 121 | return(val == 0x1f ? 0 : |
102 | val & 0x10 ? 5100 - (val) * 100 : | 122 | val & 0x10 ? 5100 - (val) * 100 : |
103 | 2050 - (val) * 50); | 123 | 2050 - (val) * 50); |
104 | case 17: /* Intel IMVP-II */ | 124 | case 17: /* Intel IMVP-II */ |
125 | val &= 0x1f; | ||
105 | return(val & 0x10 ? 975 - (val & 0xF) * 25 : | 126 | return(val & 0x10 ? 975 - (val & 0xF) * 25 : |
106 | 1750 - val * 50); | 127 | 1750 - val * 50); |
107 | case 13: | 128 | case 13: |
108 | return(1708 - (val & 0x3f) * 16); | 129 | val &= 0x3f; |
130 | return(1708 - val * 16); | ||
131 | case 14: /* Intel Core */ | ||
132 | /* compute in uV, round to mV */ | ||
133 | val &= 0x7f; | ||
134 | return(val > 0x77 ? 0 : (1500000 - (val * 12500) + 500) / 1000); | ||
109 | default: /* report 0 for unknown */ | 135 | default: /* report 0 for unknown */ |
110 | printk(KERN_INFO "hwmon-vid: requested unknown VRM version\n"); | 136 | printk(KERN_INFO "hwmon-vid: requested unknown VRM version\n"); |
111 | return 0; | 137 | return 0; |
@@ -138,6 +164,8 @@ static struct vrm_model vrm_models[] = { | |||
138 | {X86_VENDOR_INTEL, 0x6, 0x9, ANY, 13}, /* Pentium M (130 nm) */ | 164 | {X86_VENDOR_INTEL, 0x6, 0x9, ANY, 13}, /* Pentium M (130 nm) */ |
139 | {X86_VENDOR_INTEL, 0x6, 0xB, ANY, 85}, /* Tualatin */ | 165 | {X86_VENDOR_INTEL, 0x6, 0xB, ANY, 85}, /* Tualatin */ |
140 | {X86_VENDOR_INTEL, 0x6, 0xD, ANY, 13}, /* Pentium M (90 nm) */ | 166 | {X86_VENDOR_INTEL, 0x6, 0xD, ANY, 13}, /* Pentium M (90 nm) */ |
167 | {X86_VENDOR_INTEL, 0x6, 0xE, ANY, 14}, /* Intel Core (65 nm) */ | ||
168 | {X86_VENDOR_INTEL, 0x6, 0xF, ANY, 110}, /* Intel Conroe */ | ||
141 | {X86_VENDOR_INTEL, 0x6, ANY, ANY, 82}, /* any P6 */ | 169 | {X86_VENDOR_INTEL, 0x6, ANY, ANY, 82}, /* any P6 */ |
142 | {X86_VENDOR_INTEL, 0x7, ANY, ANY, 0}, /* Itanium */ | 170 | {X86_VENDOR_INTEL, 0x7, ANY, ANY, 0}, /* Itanium */ |
143 | {X86_VENDOR_INTEL, 0xF, 0x0, ANY, 90}, /* P4 */ | 171 | {X86_VENDOR_INTEL, 0xF, 0x0, ANY, 90}, /* P4 */ |
diff --git a/drivers/hwmon/lm70.c b/drivers/hwmon/lm70.c new file mode 100644 index 000000000000..6ba84731b9cd --- /dev/null +++ b/drivers/hwmon/lm70.c | |||
@@ -0,0 +1,165 @@ | |||
1 | /* | ||
2 | * lm70.c | ||
3 | * | ||
4 | * The LM70 is a temperature sensor chip from National Semiconductor (NS). | ||
5 | * Copyright (C) 2006 Kaiwan N Billimoria <kaiwan@designergraphix.com> | ||
6 | * | ||
7 | * The LM70 communicates with a host processor via an SPI/Microwire Bus | ||
8 | * interface. The complete datasheet is available at National's website | ||
9 | * here: | ||
10 | * http://www.national.com/pf/LM/LM70.html | ||
11 | * | ||
12 | * This program is free software; you can redistribute it and/or modify | ||
13 | * it under the terms of the GNU General Public License as published by | ||
14 | * the Free Software Foundation; either version 2 of the License, or | ||
15 | * (at your option) any later version. | ||
16 | * | ||
17 | * This program is distributed in the hope that it will be useful, | ||
18 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
19 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
20 | * GNU General Public License for more details. | ||
21 | * | ||
22 | * You should have received a copy of the GNU General Public License | ||
23 | * along with this program; if not, write to the Free Software | ||
24 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | ||
25 | */ | ||
26 | |||
27 | #include <linux/init.h> | ||
28 | #include <linux/module.h> | ||
29 | #include <linux/kernel.h> | ||
30 | #include <linux/device.h> | ||
31 | #include <linux/err.h> | ||
32 | #include <linux/sysfs.h> | ||
33 | #include <linux/hwmon.h> | ||
34 | #include <linux/spi/spi.h> | ||
35 | #include <asm/semaphore.h> | ||
36 | |||
37 | #define DRVNAME "lm70" | ||
38 | |||
39 | struct lm70 { | ||
40 | struct class_device *cdev; | ||
41 | struct semaphore sem; | ||
42 | }; | ||
43 | |||
44 | /* sysfs hook function */ | ||
45 | static ssize_t lm70_sense_temp(struct device *dev, | ||
46 | struct device_attribute *attr, char *buf) | ||
47 | { | ||
48 | struct spi_device *spi = to_spi_device(dev); | ||
49 | int status, val; | ||
50 | u8 rxbuf[2]; | ||
51 | s16 raw=0; | ||
52 | struct lm70 *p_lm70 = dev_get_drvdata(&spi->dev); | ||
53 | |||
54 | if (down_interruptible(&p_lm70->sem)) | ||
55 | return -ERESTARTSYS; | ||
56 | |||
57 | /* | ||
58 | * spi_read() requires a DMA-safe buffer; so we use | ||
59 | * spi_write_then_read(), transmitting 0 bytes. | ||
60 | */ | ||
61 | status = spi_write_then_read(spi, NULL, 0, &rxbuf[0], 2); | ||
62 | if (status < 0) { | ||
63 | printk(KERN_WARNING | ||
64 | "spi_write_then_read failed with status %d\n", status); | ||
65 | goto out; | ||
66 | } | ||
67 | dev_dbg(dev, "rxbuf[1] : 0x%x rxbuf[0] : 0x%x\n", rxbuf[1], rxbuf[0]); | ||
68 | |||
69 | raw = (rxbuf[1] << 8) + rxbuf[0]; | ||
70 | dev_dbg(dev, "raw=0x%x\n", raw); | ||
71 | |||
72 | /* | ||
73 | * The "raw" temperature read into rxbuf[] is a 16-bit signed 2's | ||
74 | * complement value. Only the MSB 11 bits (1 sign + 10 temperature | ||
75 | * bits) are meaningful; the LSB 5 bits are to be discarded. | ||
76 | * See the datasheet. | ||
77 | * | ||
78 | * Further, each bit represents 0.25 degrees Celsius; so, multiply | ||
79 | * by 0.25. Also multiply by 1000 to represent in millidegrees | ||
80 | * Celsius. | ||
81 | * So it's equivalent to multiplying by 0.25 * 1000 = 250. | ||
82 | */ | ||
83 | val = ((int)raw/32) * 250; | ||
84 | status = sprintf(buf, "%+d\n", val); /* millidegrees Celsius */ | ||
85 | out: | ||
86 | up(&p_lm70->sem); | ||
87 | return status; | ||
88 | } | ||
89 | |||
90 | static DEVICE_ATTR(temp1_input, S_IRUGO, lm70_sense_temp, NULL); | ||
91 | |||
92 | /*----------------------------------------------------------------------*/ | ||
93 | |||
94 | static int __devinit lm70_probe(struct spi_device *spi) | ||
95 | { | ||
96 | struct lm70 *p_lm70; | ||
97 | int status; | ||
98 | |||
99 | p_lm70 = kzalloc(sizeof *p_lm70, GFP_KERNEL); | ||
100 | if (!p_lm70) | ||
101 | return -ENOMEM; | ||
102 | |||
103 | init_MUTEX(&p_lm70->sem); | ||
104 | |||
105 | /* sysfs hook */ | ||
106 | p_lm70->cdev = hwmon_device_register(&spi->dev); | ||
107 | if (IS_ERR(p_lm70->cdev)) { | ||
108 | dev_dbg(&spi->dev, "hwmon_device_register failed.\n"); | ||
109 | status = PTR_ERR(p_lm70->cdev); | ||
110 | goto out_dev_reg_failed; | ||
111 | } | ||
112 | dev_set_drvdata(&spi->dev, p_lm70); | ||
113 | |||
114 | if ((status = device_create_file(&spi->dev, &dev_attr_temp1_input))) { | ||
115 | dev_dbg(&spi->dev, "device_create_file failure.\n"); | ||
116 | goto out_dev_create_file_failed; | ||
117 | } | ||
118 | |||
119 | return 0; | ||
120 | |||
121 | out_dev_create_file_failed: | ||
122 | hwmon_device_unregister(p_lm70->cdev); | ||
123 | out_dev_reg_failed: | ||
124 | dev_set_drvdata(&spi->dev, NULL); | ||
125 | kfree(p_lm70); | ||
126 | return status; | ||
127 | } | ||
128 | |||
129 | static int __exit lm70_remove(struct spi_device *spi) | ||
130 | { | ||
131 | struct lm70 *p_lm70 = dev_get_drvdata(&spi->dev); | ||
132 | |||
133 | device_remove_file(&spi->dev, &dev_attr_temp1_input); | ||
134 | hwmon_device_unregister(p_lm70->cdev); | ||
135 | dev_set_drvdata(&spi->dev, NULL); | ||
136 | kfree(p_lm70); | ||
137 | |||
138 | return 0; | ||
139 | } | ||
140 | |||
141 | static struct spi_driver lm70_driver = { | ||
142 | .driver = { | ||
143 | .name = "lm70", | ||
144 | .owner = THIS_MODULE, | ||
145 | }, | ||
146 | .probe = lm70_probe, | ||
147 | .remove = __devexit_p(lm70_remove), | ||
148 | }; | ||
149 | |||
150 | static int __init init_lm70(void) | ||
151 | { | ||
152 | return spi_register_driver(&lm70_driver); | ||
153 | } | ||
154 | |||
155 | static void __exit cleanup_lm70(void) | ||
156 | { | ||
157 | spi_unregister_driver(&lm70_driver); | ||
158 | } | ||
159 | |||
160 | module_init(init_lm70); | ||
161 | module_exit(cleanup_lm70); | ||
162 | |||
163 | MODULE_AUTHOR("Kaiwan N Billimoria"); | ||
164 | MODULE_DESCRIPTION("National Semiconductor LM70 Linux driver"); | ||
165 | MODULE_LICENSE("GPL"); | ||
diff --git a/drivers/hwmon/lm83.c b/drivers/hwmon/lm83.c index aac4ec2bf694..2137d7879df6 100644 --- a/drivers/hwmon/lm83.c +++ b/drivers/hwmon/lm83.c | |||
@@ -12,6 +12,10 @@ | |||
12 | * Since the datasheet omits to give the chip stepping code, I give it | 12 | * Since the datasheet omits to give the chip stepping code, I give it |
13 | * here: 0x03 (at register 0xff). | 13 | * here: 0x03 (at register 0xff). |
14 | * | 14 | * |
15 | * Also supports the LM82 temp sensor, which is basically a stripped down | ||
16 | * model of the LM83. Datasheet is here: | ||
17 | * http://www.national.com/pf/LM/LM82.html | ||
18 | * | ||
15 | * This program is free software; you can redistribute it and/or modify | 19 | * This program is free software; you can redistribute it and/or modify |
16 | * it under the terms of the GNU General Public License as published by | 20 | * it under the terms of the GNU General Public License as published by |
17 | * the Free Software Foundation; either version 2 of the License, or | 21 | * the Free Software Foundation; either version 2 of the License, or |
@@ -52,7 +56,7 @@ static unsigned short normal_i2c[] = { 0x18, 0x19, 0x1a, | |||
52 | * Insmod parameters | 56 | * Insmod parameters |
53 | */ | 57 | */ |
54 | 58 | ||
55 | I2C_CLIENT_INSMOD_1(lm83); | 59 | I2C_CLIENT_INSMOD_2(lm83, lm82); |
56 | 60 | ||
57 | /* | 61 | /* |
58 | * The LM83 registers | 62 | * The LM83 registers |
@@ -283,6 +287,9 @@ static int lm83_detect(struct i2c_adapter *adapter, int address, int kind) | |||
283 | if (man_id == 0x01) { /* National Semiconductor */ | 287 | if (man_id == 0x01) { /* National Semiconductor */ |
284 | if (chip_id == 0x03) { | 288 | if (chip_id == 0x03) { |
285 | kind = lm83; | 289 | kind = lm83; |
290 | } else | ||
291 | if (chip_id == 0x01) { | ||
292 | kind = lm82; | ||
286 | } | 293 | } |
287 | } | 294 | } |
288 | 295 | ||
@@ -296,6 +303,9 @@ static int lm83_detect(struct i2c_adapter *adapter, int address, int kind) | |||
296 | 303 | ||
297 | if (kind == lm83) { | 304 | if (kind == lm83) { |
298 | name = "lm83"; | 305 | name = "lm83"; |
306 | } else | ||
307 | if (kind == lm82) { | ||
308 | name = "lm82"; | ||
299 | } | 309 | } |
300 | 310 | ||
301 | /* We can fill in the remaining client fields */ | 311 | /* We can fill in the remaining client fields */ |
@@ -319,32 +329,46 @@ static int lm83_detect(struct i2c_adapter *adapter, int address, int kind) | |||
319 | goto exit_detach; | 329 | goto exit_detach; |
320 | } | 330 | } |
321 | 331 | ||
332 | /* | ||
333 | * The LM82 can only monitor one external diode which is | ||
334 | * at the same register as the LM83 temp3 entry - so we | ||
335 | * declare 1 and 3 common, and then 2 and 4 only for the LM83. | ||
336 | */ | ||
337 | |||
322 | device_create_file(&new_client->dev, | 338 | device_create_file(&new_client->dev, |
323 | &sensor_dev_attr_temp1_input.dev_attr); | 339 | &sensor_dev_attr_temp1_input.dev_attr); |
324 | device_create_file(&new_client->dev, | 340 | device_create_file(&new_client->dev, |
325 | &sensor_dev_attr_temp2_input.dev_attr); | ||
326 | device_create_file(&new_client->dev, | ||
327 | &sensor_dev_attr_temp3_input.dev_attr); | 341 | &sensor_dev_attr_temp3_input.dev_attr); |
328 | device_create_file(&new_client->dev, | 342 | |
329 | &sensor_dev_attr_temp4_input.dev_attr); | ||
330 | device_create_file(&new_client->dev, | 343 | device_create_file(&new_client->dev, |
331 | &sensor_dev_attr_temp1_max.dev_attr); | 344 | &sensor_dev_attr_temp1_max.dev_attr); |
332 | device_create_file(&new_client->dev, | 345 | device_create_file(&new_client->dev, |
333 | &sensor_dev_attr_temp2_max.dev_attr); | ||
334 | device_create_file(&new_client->dev, | ||
335 | &sensor_dev_attr_temp3_max.dev_attr); | 346 | &sensor_dev_attr_temp3_max.dev_attr); |
336 | device_create_file(&new_client->dev, | 347 | |
337 | &sensor_dev_attr_temp4_max.dev_attr); | ||
338 | device_create_file(&new_client->dev, | 348 | device_create_file(&new_client->dev, |
339 | &sensor_dev_attr_temp1_crit.dev_attr); | 349 | &sensor_dev_attr_temp1_crit.dev_attr); |
340 | device_create_file(&new_client->dev, | 350 | device_create_file(&new_client->dev, |
341 | &sensor_dev_attr_temp2_crit.dev_attr); | ||
342 | device_create_file(&new_client->dev, | ||
343 | &sensor_dev_attr_temp3_crit.dev_attr); | 351 | &sensor_dev_attr_temp3_crit.dev_attr); |
344 | device_create_file(&new_client->dev, | 352 | |
345 | &sensor_dev_attr_temp4_crit.dev_attr); | ||
346 | device_create_file(&new_client->dev, &dev_attr_alarms); | 353 | device_create_file(&new_client->dev, &dev_attr_alarms); |
347 | 354 | ||
355 | if (kind == lm83) { | ||
356 | device_create_file(&new_client->dev, | ||
357 | &sensor_dev_attr_temp2_input.dev_attr); | ||
358 | device_create_file(&new_client->dev, | ||
359 | &sensor_dev_attr_temp4_input.dev_attr); | ||
360 | |||
361 | device_create_file(&new_client->dev, | ||
362 | &sensor_dev_attr_temp2_max.dev_attr); | ||
363 | device_create_file(&new_client->dev, | ||
364 | &sensor_dev_attr_temp4_max.dev_attr); | ||
365 | |||
366 | device_create_file(&new_client->dev, | ||
367 | &sensor_dev_attr_temp2_crit.dev_attr); | ||
368 | device_create_file(&new_client->dev, | ||
369 | &sensor_dev_attr_temp4_crit.dev_attr); | ||
370 | } | ||
371 | |||
348 | return 0; | 372 | return 0; |
349 | 373 | ||
350 | exit_detach: | 374 | exit_detach: |
diff --git a/drivers/hwmon/smsc47m192.c b/drivers/hwmon/smsc47m192.c new file mode 100644 index 000000000000..bdc4570acf9a --- /dev/null +++ b/drivers/hwmon/smsc47m192.c | |||
@@ -0,0 +1,648 @@ | |||
1 | /* | ||
2 | smsc47m192.c - Support for hardware monitoring block of | ||
3 | SMSC LPC47M192 and LPC47M997 Super I/O chips | ||
4 | |||
5 | Copyright (C) 2006 Hartmut Rick <linux@rick.claranet.de> | ||
6 | |||
7 | Derived from lm78.c and other chip drivers. | ||
8 | |||
9 | This program is free software; you can redistribute it and/or modify | ||
10 | it under the terms of the GNU General Public License as published by | ||
11 | the Free Software Foundation; either version 2 of the License, or | ||
12 | (at your option) any later version. | ||
13 | |||
14 | This program is distributed in the hope that it will be useful, | ||
15 | but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
16 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
17 | GNU General Public License for more details. | ||
18 | |||
19 | You should have received a copy of the GNU General Public License | ||
20 | along with this program; if not, write to the Free Software | ||
21 | Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | ||
22 | */ | ||
23 | |||
24 | #include <linux/module.h> | ||
25 | #include <linux/init.h> | ||
26 | #include <linux/slab.h> | ||
27 | #include <linux/jiffies.h> | ||
28 | #include <linux/i2c.h> | ||
29 | #include <linux/hwmon.h> | ||
30 | #include <linux/hwmon-sysfs.h> | ||
31 | #include <linux/hwmon-vid.h> | ||
32 | #include <linux/err.h> | ||
33 | |||
34 | /* Addresses to scan */ | ||
35 | static unsigned short normal_i2c[] = { 0x2c, 0x2d, I2C_CLIENT_END }; | ||
36 | |||
37 | /* Insmod parameters */ | ||
38 | I2C_CLIENT_INSMOD_1(smsc47m192); | ||
39 | |||
40 | /* SMSC47M192 registers */ | ||
41 | #define SMSC47M192_REG_IN(nr) ((nr)<6 ? (0x20 + (nr)) : \ | ||
42 | (0x50 + (nr) - 6)) | ||
43 | #define SMSC47M192_REG_IN_MAX(nr) ((nr)<6 ? (0x2b + (nr) * 2) : \ | ||
44 | (0x54 + (((nr) - 6) * 2))) | ||
45 | #define SMSC47M192_REG_IN_MIN(nr) ((nr)<6 ? (0x2c + (nr) * 2) : \ | ||
46 | (0x55 + (((nr) - 6) * 2))) | ||
47 | static u8 SMSC47M192_REG_TEMP[3] = { 0x27, 0x26, 0x52 }; | ||
48 | static u8 SMSC47M192_REG_TEMP_MAX[3] = { 0x39, 0x37, 0x58 }; | ||
49 | static u8 SMSC47M192_REG_TEMP_MIN[3] = { 0x3A, 0x38, 0x59 }; | ||
50 | #define SMSC47M192_REG_TEMP_OFFSET(nr) ((nr)==2 ? 0x1e : 0x1f) | ||
51 | #define SMSC47M192_REG_ALARM1 0x41 | ||
52 | #define SMSC47M192_REG_ALARM2 0x42 | ||
53 | #define SMSC47M192_REG_VID 0x47 | ||
54 | #define SMSC47M192_REG_VID4 0x49 | ||
55 | #define SMSC47M192_REG_CONFIG 0x40 | ||
56 | #define SMSC47M192_REG_SFR 0x4f | ||
57 | #define SMSC47M192_REG_COMPANY_ID 0x3e | ||
58 | #define SMSC47M192_REG_VERSION 0x3f | ||
59 | |||
60 | /* generalised scaling with integer rounding */ | ||
61 | static inline int SCALE(long val, int mul, int div) | ||
62 | { | ||
63 | if (val < 0) | ||
64 | return (val * mul - div / 2) / div; | ||
65 | else | ||
66 | return (val * mul + div / 2) / div; | ||
67 | } | ||
68 | |||
69 | /* Conversions */ | ||
70 | |||
71 | /* smsc47m192 internally scales voltage measurements */ | ||
72 | static const u16 nom_mv[] = { 2500, 2250, 3300, 5000, 12000, 3300, 1500, 1800 }; | ||
73 | |||
74 | static inline unsigned int IN_FROM_REG(u8 reg, int n) | ||
75 | { | ||
76 | return SCALE(reg, nom_mv[n], 192); | ||
77 | } | ||
78 | |||
79 | static inline u8 IN_TO_REG(unsigned long val, int n) | ||
80 | { | ||
81 | return SENSORS_LIMIT(SCALE(val, 192, nom_mv[n]), 0, 255); | ||
82 | } | ||
83 | |||
84 | /* TEMP: 0.001 degC units (-128C to +127C) | ||
85 | REG: 1C/bit, two's complement */ | ||
86 | static inline s8 TEMP_TO_REG(int val) | ||
87 | { | ||
88 | return SENSORS_LIMIT(SCALE(val, 1, 1000), -128000, 127000); | ||
89 | } | ||
90 | |||
91 | static inline int TEMP_FROM_REG(s8 val) | ||
92 | { | ||
93 | return val * 1000; | ||
94 | } | ||
95 | |||
96 | struct smsc47m192_data { | ||
97 | struct i2c_client client; | ||
98 | struct class_device *class_dev; | ||
99 | struct semaphore update_lock; | ||
100 | char valid; /* !=0 if following fields are valid */ | ||
101 | unsigned long last_updated; /* In jiffies */ | ||
102 | |||
103 | u8 in[8]; /* Register value */ | ||
104 | u8 in_max[8]; /* Register value */ | ||
105 | u8 in_min[8]; /* Register value */ | ||
106 | s8 temp[3]; /* Register value */ | ||
107 | s8 temp_max[3]; /* Register value */ | ||
108 | s8 temp_min[3]; /* Register value */ | ||
109 | s8 temp_offset[3]; /* Register value */ | ||
110 | u16 alarms; /* Register encoding, combined */ | ||
111 | u8 vid; /* Register encoding, combined */ | ||
112 | u8 vrm; | ||
113 | }; | ||
114 | |||
115 | static int smsc47m192_attach_adapter(struct i2c_adapter *adapter); | ||
116 | static int smsc47m192_detect(struct i2c_adapter *adapter, int address, | ||
117 | int kind); | ||
118 | static int smsc47m192_detach_client(struct i2c_client *client); | ||
119 | static struct smsc47m192_data *smsc47m192_update_device(struct device *dev); | ||
120 | |||
121 | static struct i2c_driver smsc47m192_driver = { | ||
122 | .driver = { | ||
123 | .name = "smsc47m192", | ||
124 | }, | ||
125 | .attach_adapter = smsc47m192_attach_adapter, | ||
126 | .detach_client = smsc47m192_detach_client, | ||
127 | }; | ||
128 | |||
129 | /* Voltages */ | ||
130 | static ssize_t show_in(struct device *dev, struct device_attribute *attr, | ||
131 | char *buf) | ||
132 | { | ||
133 | struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); | ||
134 | int nr = sensor_attr->index; | ||
135 | struct smsc47m192_data *data = smsc47m192_update_device(dev); | ||
136 | return sprintf(buf, "%d\n", IN_FROM_REG(data->in[nr], nr)); | ||
137 | } | ||
138 | |||
139 | static ssize_t show_in_min(struct device *dev, struct device_attribute *attr, | ||
140 | char *buf) | ||
141 | { | ||
142 | struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); | ||
143 | int nr = sensor_attr->index; | ||
144 | struct smsc47m192_data *data = smsc47m192_update_device(dev); | ||
145 | return sprintf(buf, "%d\n", IN_FROM_REG(data->in_min[nr], nr)); | ||
146 | } | ||
147 | |||
148 | static ssize_t show_in_max(struct device *dev, struct device_attribute *attr, | ||
149 | char *buf) | ||
150 | { | ||
151 | struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); | ||
152 | int nr = sensor_attr->index; | ||
153 | struct smsc47m192_data *data = smsc47m192_update_device(dev); | ||
154 | return sprintf(buf, "%d\n", IN_FROM_REG(data->in_max[nr], nr)); | ||
155 | } | ||
156 | |||
157 | static ssize_t set_in_min(struct device *dev, struct device_attribute *attr, | ||
158 | const char *buf, size_t count) | ||
159 | { | ||
160 | struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); | ||
161 | int nr = sensor_attr->index; | ||
162 | struct i2c_client *client = to_i2c_client(dev); | ||
163 | struct smsc47m192_data *data = i2c_get_clientdata(client); | ||
164 | unsigned long val = simple_strtoul(buf, NULL, 10); | ||
165 | |||
166 | down(&data->update_lock); | ||
167 | data->in_min[nr] = IN_TO_REG(val, nr); | ||
168 | i2c_smbus_write_byte_data(client, SMSC47M192_REG_IN_MIN(nr), | ||
169 | data->in_min[nr]); | ||
170 | up(&data->update_lock); | ||
171 | return count; | ||
172 | } | ||
173 | |||
174 | static ssize_t set_in_max(struct device *dev, struct device_attribute *attr, | ||
175 | const char *buf, size_t count) | ||
176 | { | ||
177 | struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); | ||
178 | int nr = sensor_attr->index; | ||
179 | struct i2c_client *client = to_i2c_client(dev); | ||
180 | struct smsc47m192_data *data = i2c_get_clientdata(client); | ||
181 | unsigned long val = simple_strtoul(buf, NULL, 10); | ||
182 | |||
183 | down(&data->update_lock); | ||
184 | data->in_max[nr] = IN_TO_REG(val, nr); | ||
185 | i2c_smbus_write_byte_data(client, SMSC47M192_REG_IN_MAX(nr), | ||
186 | data->in_max[nr]); | ||
187 | up(&data->update_lock); | ||
188 | return count; | ||
189 | } | ||
190 | |||
191 | #define show_in_offset(offset) \ | ||
192 | static SENSOR_DEVICE_ATTR(in##offset##_input, S_IRUGO, \ | ||
193 | show_in, NULL, offset); \ | ||
194 | static SENSOR_DEVICE_ATTR(in##offset##_min, S_IRUGO | S_IWUSR, \ | ||
195 | show_in_min, set_in_min, offset); \ | ||
196 | static SENSOR_DEVICE_ATTR(in##offset##_max, S_IRUGO | S_IWUSR, \ | ||
197 | show_in_max, set_in_max, offset); | ||
198 | |||
199 | show_in_offset(0) | ||
200 | show_in_offset(1) | ||
201 | show_in_offset(2) | ||
202 | show_in_offset(3) | ||
203 | show_in_offset(4) | ||
204 | show_in_offset(5) | ||
205 | show_in_offset(6) | ||
206 | show_in_offset(7) | ||
207 | |||
208 | /* Temperatures */ | ||
209 | static ssize_t show_temp(struct device *dev, struct device_attribute *attr, | ||
210 | char *buf) | ||
211 | { | ||
212 | struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); | ||
213 | int nr = sensor_attr->index; | ||
214 | struct smsc47m192_data *data = smsc47m192_update_device(dev); | ||
215 | return sprintf(buf, "%d\n", TEMP_FROM_REG(data->temp[nr])); | ||
216 | } | ||
217 | |||
218 | static ssize_t show_temp_min(struct device *dev, struct device_attribute *attr, | ||
219 | char *buf) | ||
220 | { | ||
221 | struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); | ||
222 | int nr = sensor_attr->index; | ||
223 | struct smsc47m192_data *data = smsc47m192_update_device(dev); | ||
224 | return sprintf(buf, "%d\n", TEMP_FROM_REG(data->temp_min[nr])); | ||
225 | } | ||
226 | |||
227 | static ssize_t show_temp_max(struct device *dev, struct device_attribute *attr, | ||
228 | char *buf) | ||
229 | { | ||
230 | struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); | ||
231 | int nr = sensor_attr->index; | ||
232 | struct smsc47m192_data *data = smsc47m192_update_device(dev); | ||
233 | return sprintf(buf, "%d\n", TEMP_FROM_REG(data->temp_max[nr])); | ||
234 | } | ||
235 | |||
236 | static ssize_t set_temp_min(struct device *dev, struct device_attribute *attr, | ||
237 | const char *buf, size_t count) | ||
238 | { | ||
239 | struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); | ||
240 | int nr = sensor_attr->index; | ||
241 | struct i2c_client *client = to_i2c_client(dev); | ||
242 | struct smsc47m192_data *data = i2c_get_clientdata(client); | ||
243 | long val = simple_strtol(buf, NULL, 10); | ||
244 | |||
245 | down(&data->update_lock); | ||
246 | data->temp_min[nr] = TEMP_TO_REG(val); | ||
247 | i2c_smbus_write_byte_data(client, SMSC47M192_REG_TEMP_MIN[nr], | ||
248 | data->temp_min[nr]); | ||
249 | up(&data->update_lock); | ||
250 | return count; | ||
251 | } | ||
252 | |||
253 | static ssize_t set_temp_max(struct device *dev, struct device_attribute *attr, | ||
254 | const char *buf, size_t count) | ||
255 | { | ||
256 | struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); | ||
257 | int nr = sensor_attr->index; | ||
258 | struct i2c_client *client = to_i2c_client(dev); | ||
259 | struct smsc47m192_data *data = i2c_get_clientdata(client); | ||
260 | long val = simple_strtol(buf, NULL, 10); | ||
261 | |||
262 | down(&data->update_lock); | ||
263 | data->temp_max[nr] = TEMP_TO_REG(val); | ||
264 | i2c_smbus_write_byte_data(client, SMSC47M192_REG_TEMP_MAX[nr], | ||
265 | data->temp_max[nr]); | ||
266 | up(&data->update_lock); | ||
267 | return count; | ||
268 | } | ||
269 | |||
270 | static ssize_t show_temp_offset(struct device *dev, struct device_attribute | ||
271 | *attr, char *buf) | ||
272 | { | ||
273 | struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); | ||
274 | int nr = sensor_attr->index; | ||
275 | struct smsc47m192_data *data = smsc47m192_update_device(dev); | ||
276 | return sprintf(buf, "%d\n", TEMP_FROM_REG(data->temp_offset[nr])); | ||
277 | } | ||
278 | |||
279 | static ssize_t set_temp_offset(struct device *dev, struct device_attribute | ||
280 | *attr, const char *buf, size_t count) | ||
281 | { | ||
282 | struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); | ||
283 | int nr = sensor_attr->index; | ||
284 | struct i2c_client *client = to_i2c_client(dev); | ||
285 | struct smsc47m192_data *data = i2c_get_clientdata(client); | ||
286 | u8 sfr = i2c_smbus_read_byte_data(client, SMSC47M192_REG_SFR); | ||
287 | long val = simple_strtol(buf, NULL, 10); | ||
288 | |||
289 | down(&data->update_lock); | ||
290 | data->temp_offset[nr] = TEMP_TO_REG(val); | ||
291 | if (nr>1) | ||
292 | i2c_smbus_write_byte_data(client, | ||
293 | SMSC47M192_REG_TEMP_OFFSET(nr), data->temp_offset[nr]); | ||
294 | else if (data->temp_offset[nr] != 0) { | ||
295 | /* offset[0] and offset[1] share the same register, | ||
296 | SFR bit 4 activates offset[0] */ | ||
297 | i2c_smbus_write_byte_data(client, SMSC47M192_REG_SFR, | ||
298 | (sfr & 0xef) | (nr==0 ? 0x10 : 0)); | ||
299 | data->temp_offset[1-nr] = 0; | ||
300 | i2c_smbus_write_byte_data(client, | ||
301 | SMSC47M192_REG_TEMP_OFFSET(nr), data->temp_offset[nr]); | ||
302 | } else if ((sfr & 0x10) == (nr==0 ? 0x10 : 0)) | ||
303 | i2c_smbus_write_byte_data(client, | ||
304 | SMSC47M192_REG_TEMP_OFFSET(nr), 0); | ||
305 | up(&data->update_lock); | ||
306 | return count; | ||
307 | } | ||
308 | |||
309 | #define show_temp_index(index) \ | ||
310 | static SENSOR_DEVICE_ATTR(temp##index##_input, S_IRUGO, \ | ||
311 | show_temp, NULL, index-1); \ | ||
312 | static SENSOR_DEVICE_ATTR(temp##index##_min, S_IRUGO | S_IWUSR, \ | ||
313 | show_temp_min, set_temp_min, index-1); \ | ||
314 | static SENSOR_DEVICE_ATTR(temp##index##_max, S_IRUGO | S_IWUSR, \ | ||
315 | show_temp_max, set_temp_max, index-1); \ | ||
316 | static SENSOR_DEVICE_ATTR(temp##index##_offset, S_IRUGO | S_IWUSR, \ | ||
317 | show_temp_offset, set_temp_offset, index-1); | ||
318 | |||
319 | show_temp_index(1) | ||
320 | show_temp_index(2) | ||
321 | show_temp_index(3) | ||
322 | |||
323 | /* VID */ | ||
324 | static ssize_t show_vid(struct device *dev, struct device_attribute *attr, | ||
325 | char *buf) | ||
326 | { | ||
327 | struct smsc47m192_data *data = smsc47m192_update_device(dev); | ||
328 | return sprintf(buf, "%d\n", vid_from_reg(data->vid, data->vrm)); | ||
329 | } | ||
330 | static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid, NULL); | ||
331 | |||
332 | static ssize_t show_vrm(struct device *dev, struct device_attribute *attr, | ||
333 | char *buf) | ||
334 | { | ||
335 | struct smsc47m192_data *data = smsc47m192_update_device(dev); | ||
336 | return sprintf(buf, "%d\n", data->vrm); | ||
337 | } | ||
338 | |||
339 | static ssize_t set_vrm(struct device *dev, struct device_attribute *attr, | ||
340 | const char *buf, size_t count) | ||
341 | { | ||
342 | struct i2c_client *client = to_i2c_client(dev); | ||
343 | struct smsc47m192_data *data = i2c_get_clientdata(client); | ||
344 | data->vrm = simple_strtoul(buf, NULL, 10); | ||
345 | return count; | ||
346 | } | ||
347 | static DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm, set_vrm); | ||
348 | |||
349 | /* Alarms */ | ||
350 | static ssize_t show_alarm(struct device *dev, struct device_attribute *attr, | ||
351 | char *buf) | ||
352 | { | ||
353 | struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); | ||
354 | int nr = sensor_attr->index; | ||
355 | struct smsc47m192_data *data = smsc47m192_update_device(dev); | ||
356 | return sprintf(buf, "%u\n", (data->alarms & nr) ? 1 : 0); | ||
357 | } | ||
358 | |||
359 | static SENSOR_DEVICE_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 0x0010); | ||
360 | static SENSOR_DEVICE_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 0x0020); | ||
361 | static SENSOR_DEVICE_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL, 0x0040); | ||
362 | static SENSOR_DEVICE_ATTR(temp2_input_fault, S_IRUGO, show_alarm, NULL, 0x4000); | ||
363 | static SENSOR_DEVICE_ATTR(temp3_input_fault, S_IRUGO, show_alarm, NULL, 0x8000); | ||
364 | static SENSOR_DEVICE_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 0x0001); | ||
365 | static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 0x0002); | ||
366 | static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 0x0004); | ||
367 | static SENSOR_DEVICE_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 0x0008); | ||
368 | static SENSOR_DEVICE_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 0x0100); | ||
369 | static SENSOR_DEVICE_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 0x0200); | ||
370 | static SENSOR_DEVICE_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 0x0400); | ||
371 | static SENSOR_DEVICE_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 0x0800); | ||
372 | |||
373 | /* This function is called when: | ||
374 | * smsc47m192_driver is inserted (when this module is loaded), for each | ||
375 | available adapter | ||
376 | * when a new adapter is inserted (and smsc47m192_driver is still present) */ | ||
377 | static int smsc47m192_attach_adapter(struct i2c_adapter *adapter) | ||
378 | { | ||
379 | if (!(adapter->class & I2C_CLASS_HWMON)) | ||
380 | return 0; | ||
381 | return i2c_probe(adapter, &addr_data, smsc47m192_detect); | ||
382 | } | ||
383 | |||
384 | static void smsc47m192_init_client(struct i2c_client *client) | ||
385 | { | ||
386 | int i; | ||
387 | u8 config = i2c_smbus_read_byte_data(client, SMSC47M192_REG_CONFIG); | ||
388 | u8 sfr = i2c_smbus_read_byte_data(client, SMSC47M192_REG_SFR); | ||
389 | |||
390 | /* select cycle mode (pause 1 sec between updates) */ | ||
391 | i2c_smbus_write_byte_data(client, SMSC47M192_REG_SFR, | ||
392 | (sfr & 0xfd) | 0x02); | ||
393 | if (!(config & 0x01)) { | ||
394 | /* initialize alarm limits */ | ||
395 | for (i=0; i<8; i++) { | ||
396 | i2c_smbus_write_byte_data(client, | ||
397 | SMSC47M192_REG_IN_MIN(i), 0); | ||
398 | i2c_smbus_write_byte_data(client, | ||
399 | SMSC47M192_REG_IN_MAX(i), 0xff); | ||
400 | } | ||
401 | for (i=0; i<3; i++) { | ||
402 | i2c_smbus_write_byte_data(client, | ||
403 | SMSC47M192_REG_TEMP_MIN[i], 0x80); | ||
404 | i2c_smbus_write_byte_data(client, | ||
405 | SMSC47M192_REG_TEMP_MAX[i], 0x7f); | ||
406 | } | ||
407 | |||
408 | /* start monitoring */ | ||
409 | i2c_smbus_write_byte_data(client, SMSC47M192_REG_CONFIG, | ||
410 | (config & 0xf7) | 0x01); | ||
411 | } | ||
412 | } | ||
413 | |||
414 | /* This function is called by i2c_probe */ | ||
415 | static int smsc47m192_detect(struct i2c_adapter *adapter, int address, | ||
416 | int kind) | ||
417 | { | ||
418 | struct i2c_client *client; | ||
419 | struct smsc47m192_data *data; | ||
420 | int err = 0; | ||
421 | int version, config; | ||
422 | |||
423 | if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) | ||
424 | goto exit; | ||
425 | |||
426 | if (!(data = kzalloc(sizeof(struct smsc47m192_data), GFP_KERNEL))) { | ||
427 | err = -ENOMEM; | ||
428 | goto exit; | ||
429 | } | ||
430 | |||
431 | client = &data->client; | ||
432 | i2c_set_clientdata(client, data); | ||
433 | client->addr = address; | ||
434 | client->adapter = adapter; | ||
435 | client->driver = &smsc47m192_driver; | ||
436 | |||
437 | if (kind == 0) | ||
438 | kind = smsc47m192; | ||
439 | |||
440 | /* Detection criteria from sensors_detect script */ | ||
441 | if (kind < 0) { | ||
442 | if (i2c_smbus_read_byte_data(client, | ||
443 | SMSC47M192_REG_COMPANY_ID) == 0x55 | ||
444 | && ((version = i2c_smbus_read_byte_data(client, | ||
445 | SMSC47M192_REG_VERSION)) & 0xf0) == 0x20 | ||
446 | && (i2c_smbus_read_byte_data(client, | ||
447 | SMSC47M192_REG_VID) & 0x70) == 0x00 | ||
448 | && (i2c_smbus_read_byte_data(client, | ||
449 | SMSC47M192_REG_VID4) & 0xfe) == 0x80) { | ||
450 | dev_info(&adapter->dev, | ||
451 | "found SMSC47M192 or SMSC47M997, " | ||
452 | "version 2, stepping A%d\n", version & 0x0f); | ||
453 | } else { | ||
454 | dev_dbg(&adapter->dev, | ||
455 | "SMSC47M192 detection failed at 0x%02x\n", | ||
456 | address); | ||
457 | goto exit_free; | ||
458 | } | ||
459 | } | ||
460 | |||
461 | /* Fill in the remaining client fields and put into the global list */ | ||
462 | strlcpy(client->name, "smsc47m192", I2C_NAME_SIZE); | ||
463 | data->vrm = vid_which_vrm(); | ||
464 | init_MUTEX(&data->update_lock); | ||
465 | |||
466 | /* Tell the I2C layer a new client has arrived */ | ||
467 | if ((err = i2c_attach_client(client))) | ||
468 | goto exit_free; | ||
469 | |||
470 | /* Initialize the SMSC47M192 chip */ | ||
471 | smsc47m192_init_client(client); | ||
472 | |||
473 | /* Register sysfs hooks */ | ||
474 | data->class_dev = hwmon_device_register(&client->dev); | ||
475 | if (IS_ERR(data->class_dev)) { | ||
476 | err = PTR_ERR(data->class_dev); | ||
477 | goto exit_detach; | ||
478 | } | ||
479 | |||
480 | device_create_file(&client->dev, &sensor_dev_attr_in0_input.dev_attr); | ||
481 | device_create_file(&client->dev, &sensor_dev_attr_in0_min.dev_attr); | ||
482 | device_create_file(&client->dev, &sensor_dev_attr_in0_max.dev_attr); | ||
483 | device_create_file(&client->dev, &sensor_dev_attr_in0_alarm.dev_attr); | ||
484 | device_create_file(&client->dev, &sensor_dev_attr_in1_input.dev_attr); | ||
485 | device_create_file(&client->dev, &sensor_dev_attr_in1_min.dev_attr); | ||
486 | device_create_file(&client->dev, &sensor_dev_attr_in1_max.dev_attr); | ||
487 | device_create_file(&client->dev, &sensor_dev_attr_in1_alarm.dev_attr); | ||
488 | device_create_file(&client->dev, &sensor_dev_attr_in2_input.dev_attr); | ||
489 | device_create_file(&client->dev, &sensor_dev_attr_in2_min.dev_attr); | ||
490 | device_create_file(&client->dev, &sensor_dev_attr_in2_max.dev_attr); | ||
491 | device_create_file(&client->dev, &sensor_dev_attr_in2_alarm.dev_attr); | ||
492 | device_create_file(&client->dev, &sensor_dev_attr_in3_input.dev_attr); | ||
493 | device_create_file(&client->dev, &sensor_dev_attr_in3_min.dev_attr); | ||
494 | device_create_file(&client->dev, &sensor_dev_attr_in3_max.dev_attr); | ||
495 | device_create_file(&client->dev, &sensor_dev_attr_in3_alarm.dev_attr); | ||
496 | |||
497 | /* Pin 110 is either in4 (+12V) or VID4 */ | ||
498 | config = i2c_smbus_read_byte_data(client, SMSC47M192_REG_CONFIG); | ||
499 | if (!(config & 0x20)) { | ||
500 | device_create_file(&client->dev, | ||
501 | &sensor_dev_attr_in4_input.dev_attr); | ||
502 | device_create_file(&client->dev, | ||
503 | &sensor_dev_attr_in4_min.dev_attr); | ||
504 | device_create_file(&client->dev, | ||
505 | &sensor_dev_attr_in4_max.dev_attr); | ||
506 | device_create_file(&client->dev, | ||
507 | &sensor_dev_attr_in4_alarm.dev_attr); | ||
508 | } | ||
509 | device_create_file(&client->dev, &sensor_dev_attr_in5_input.dev_attr); | ||
510 | device_create_file(&client->dev, &sensor_dev_attr_in5_min.dev_attr); | ||
511 | device_create_file(&client->dev, &sensor_dev_attr_in5_max.dev_attr); | ||
512 | device_create_file(&client->dev, &sensor_dev_attr_in5_alarm.dev_attr); | ||
513 | device_create_file(&client->dev, &sensor_dev_attr_in6_input.dev_attr); | ||
514 | device_create_file(&client->dev, &sensor_dev_attr_in6_min.dev_attr); | ||
515 | device_create_file(&client->dev, &sensor_dev_attr_in6_max.dev_attr); | ||
516 | device_create_file(&client->dev, &sensor_dev_attr_in6_alarm.dev_attr); | ||
517 | device_create_file(&client->dev, &sensor_dev_attr_in7_input.dev_attr); | ||
518 | device_create_file(&client->dev, &sensor_dev_attr_in7_min.dev_attr); | ||
519 | device_create_file(&client->dev, &sensor_dev_attr_in7_max.dev_attr); | ||
520 | device_create_file(&client->dev, &sensor_dev_attr_in7_alarm.dev_attr); | ||
521 | device_create_file(&client->dev, &sensor_dev_attr_temp1_input.dev_attr); | ||
522 | device_create_file(&client->dev, &sensor_dev_attr_temp1_max.dev_attr); | ||
523 | device_create_file(&client->dev, &sensor_dev_attr_temp1_min.dev_attr); | ||
524 | device_create_file(&client->dev, | ||
525 | &sensor_dev_attr_temp1_offset.dev_attr); | ||
526 | device_create_file(&client->dev, &sensor_dev_attr_temp1_alarm.dev_attr); | ||
527 | device_create_file(&client->dev, &sensor_dev_attr_temp2_input.dev_attr); | ||
528 | device_create_file(&client->dev, &sensor_dev_attr_temp2_max.dev_attr); | ||
529 | device_create_file(&client->dev, &sensor_dev_attr_temp2_min.dev_attr); | ||
530 | device_create_file(&client->dev, | ||
531 | &sensor_dev_attr_temp2_offset.dev_attr); | ||
532 | device_create_file(&client->dev, &sensor_dev_attr_temp2_alarm.dev_attr); | ||
533 | device_create_file(&client->dev, | ||
534 | &sensor_dev_attr_temp2_input_fault.dev_attr); | ||
535 | device_create_file(&client->dev, &sensor_dev_attr_temp3_input.dev_attr); | ||
536 | device_create_file(&client->dev, &sensor_dev_attr_temp3_max.dev_attr); | ||
537 | device_create_file(&client->dev, &sensor_dev_attr_temp3_min.dev_attr); | ||
538 | device_create_file(&client->dev, | ||
539 | &sensor_dev_attr_temp3_offset.dev_attr); | ||
540 | device_create_file(&client->dev, &sensor_dev_attr_temp3_alarm.dev_attr); | ||
541 | device_create_file(&client->dev, | ||
542 | &sensor_dev_attr_temp3_input_fault.dev_attr); | ||
543 | device_create_file(&client->dev, &dev_attr_cpu0_vid); | ||
544 | device_create_file(&client->dev, &dev_attr_vrm); | ||
545 | |||
546 | return 0; | ||
547 | |||
548 | exit_detach: | ||
549 | i2c_detach_client(client); | ||
550 | exit_free: | ||
551 | kfree(data); | ||
552 | exit: | ||
553 | return err; | ||
554 | } | ||
555 | |||
556 | static int smsc47m192_detach_client(struct i2c_client *client) | ||
557 | { | ||
558 | struct smsc47m192_data *data = i2c_get_clientdata(client); | ||
559 | int err; | ||
560 | |||
561 | hwmon_device_unregister(data->class_dev); | ||
562 | |||
563 | if ((err = i2c_detach_client(client))) | ||
564 | return err; | ||
565 | |||
566 | kfree(data); | ||
567 | |||
568 | return 0; | ||
569 | } | ||
570 | |||
571 | static struct smsc47m192_data *smsc47m192_update_device(struct device *dev) | ||
572 | { | ||
573 | struct i2c_client *client = to_i2c_client(dev); | ||
574 | struct smsc47m192_data *data = i2c_get_clientdata(client); | ||
575 | int i, config; | ||
576 | |||
577 | down(&data->update_lock); | ||
578 | |||
579 | if (time_after(jiffies, data->last_updated + HZ + HZ / 2) | ||
580 | || !data->valid) { | ||
581 | u8 sfr = i2c_smbus_read_byte_data(client, SMSC47M192_REG_SFR); | ||
582 | |||
583 | dev_dbg(&client->dev, "Starting smsc47m192 update\n"); | ||
584 | |||
585 | for (i = 0; i <= 7; i++) { | ||
586 | data->in[i] = i2c_smbus_read_byte_data(client, | ||
587 | SMSC47M192_REG_IN(i)); | ||
588 | data->in_min[i] = i2c_smbus_read_byte_data(client, | ||
589 | SMSC47M192_REG_IN_MIN(i)); | ||
590 | data->in_max[i] = i2c_smbus_read_byte_data(client, | ||
591 | SMSC47M192_REG_IN_MAX(i)); | ||
592 | } | ||
593 | for (i = 0; i < 3; i++) { | ||
594 | data->temp[i] = i2c_smbus_read_byte_data(client, | ||
595 | SMSC47M192_REG_TEMP[i]); | ||
596 | data->temp_max[i] = i2c_smbus_read_byte_data(client, | ||
597 | SMSC47M192_REG_TEMP_MAX[i]); | ||
598 | data->temp_min[i] = i2c_smbus_read_byte_data(client, | ||
599 | SMSC47M192_REG_TEMP_MIN[i]); | ||
600 | } | ||
601 | for (i = 1; i < 3; i++) | ||
602 | data->temp_offset[i] = i2c_smbus_read_byte_data(client, | ||
603 | SMSC47M192_REG_TEMP_OFFSET(i)); | ||
604 | /* first offset is temp_offset[0] if SFR bit 4 is set, | ||
605 | temp_offset[1] otherwise */ | ||
606 | if (sfr & 0x10) { | ||
607 | data->temp_offset[0] = data->temp_offset[1]; | ||
608 | data->temp_offset[1] = 0; | ||
609 | } else | ||
610 | data->temp_offset[0] = 0; | ||
611 | |||
612 | data->vid = i2c_smbus_read_byte_data(client, SMSC47M192_REG_VID) | ||
613 | & 0x0f; | ||
614 | config = i2c_smbus_read_byte_data(client, | ||
615 | SMSC47M192_REG_CONFIG); | ||
616 | if (config & 0x20) | ||
617 | data->vid |= (i2c_smbus_read_byte_data(client, | ||
618 | SMSC47M192_REG_VID4) & 0x01) << 4; | ||
619 | data->alarms = i2c_smbus_read_byte_data(client, | ||
620 | SMSC47M192_REG_ALARM1) | | ||
621 | (i2c_smbus_read_byte_data(client, | ||
622 | SMSC47M192_REG_ALARM2) << 8); | ||
623 | |||
624 | data->last_updated = jiffies; | ||
625 | data->valid = 1; | ||
626 | } | ||
627 | |||
628 | up(&data->update_lock); | ||
629 | |||
630 | return data; | ||
631 | } | ||
632 | |||
633 | static int __init smsc47m192_init(void) | ||
634 | { | ||
635 | return i2c_add_driver(&smsc47m192_driver); | ||
636 | } | ||
637 | |||
638 | static void __exit smsc47m192_exit(void) | ||
639 | { | ||
640 | i2c_del_driver(&smsc47m192_driver); | ||
641 | } | ||
642 | |||
643 | MODULE_AUTHOR("Hartmut Rick <linux@rick.claranet.de>"); | ||
644 | MODULE_DESCRIPTION("SMSC47M192 driver"); | ||
645 | MODULE_LICENSE("GPL"); | ||
646 | |||
647 | module_init(smsc47m192_init); | ||
648 | module_exit(smsc47m192_exit); | ||
diff --git a/drivers/hwmon/w83627ehf.c b/drivers/hwmon/w83627ehf.c index b6bd5685fd38..40301bc6ce18 100644 --- a/drivers/hwmon/w83627ehf.c +++ b/drivers/hwmon/w83627ehf.c | |||
@@ -30,10 +30,7 @@ | |||
30 | Supports the following chips: | 30 | Supports the following chips: |
31 | 31 | ||
32 | Chip #vin #fan #pwm #temp chip_id man_id | 32 | Chip #vin #fan #pwm #temp chip_id man_id |
33 | w83627ehf - 5 - 3 0x88 0x5ca3 | 33 | w83627ehf 10 5 - 3 0x88 0x5ca3 |
34 | |||
35 | This is a preliminary version of the driver, only supporting the | ||
36 | fan and temperature inputs. The chip does much more than that. | ||
37 | */ | 34 | */ |
38 | 35 | ||
39 | #include <linux/module.h> | 36 | #include <linux/module.h> |
@@ -121,6 +118,14 @@ superio_exit(void) | |||
121 | static const u16 W83627EHF_REG_FAN[] = { 0x28, 0x29, 0x2a, 0x3f, 0x553 }; | 118 | static const u16 W83627EHF_REG_FAN[] = { 0x28, 0x29, 0x2a, 0x3f, 0x553 }; |
122 | static const u16 W83627EHF_REG_FAN_MIN[] = { 0x3b, 0x3c, 0x3d, 0x3e, 0x55c }; | 119 | static const u16 W83627EHF_REG_FAN_MIN[] = { 0x3b, 0x3c, 0x3d, 0x3e, 0x55c }; |
123 | 120 | ||
121 | /* The W83627EHF registers for nr=7,8,9 are in bank 5 */ | ||
122 | #define W83627EHF_REG_IN_MAX(nr) ((nr < 7) ? (0x2b + (nr) * 2) : \ | ||
123 | (0x554 + (((nr) - 7) * 2))) | ||
124 | #define W83627EHF_REG_IN_MIN(nr) ((nr < 7) ? (0x2c + (nr) * 2) : \ | ||
125 | (0x555 + (((nr) - 7) * 2))) | ||
126 | #define W83627EHF_REG_IN(nr) ((nr < 7) ? (0x20 + (nr)) : \ | ||
127 | (0x550 + (nr) - 7)) | ||
128 | |||
124 | #define W83627EHF_REG_TEMP1 0x27 | 129 | #define W83627EHF_REG_TEMP1 0x27 |
125 | #define W83627EHF_REG_TEMP1_HYST 0x3a | 130 | #define W83627EHF_REG_TEMP1_HYST 0x3a |
126 | #define W83627EHF_REG_TEMP1_OVER 0x39 | 131 | #define W83627EHF_REG_TEMP1_OVER 0x39 |
@@ -136,6 +141,10 @@ static const u16 W83627EHF_REG_TEMP_CONFIG[] = { 0x152, 0x252 }; | |||
136 | #define W83627EHF_REG_DIODE 0x59 | 141 | #define W83627EHF_REG_DIODE 0x59 |
137 | #define W83627EHF_REG_SMI_OVT 0x4C | 142 | #define W83627EHF_REG_SMI_OVT 0x4C |
138 | 143 | ||
144 | #define W83627EHF_REG_ALARM1 0x459 | ||
145 | #define W83627EHF_REG_ALARM2 0x45A | ||
146 | #define W83627EHF_REG_ALARM3 0x45B | ||
147 | |||
139 | /* | 148 | /* |
140 | * Conversions | 149 | * Conversions |
141 | */ | 150 | */ |
@@ -172,6 +181,20 @@ temp1_to_reg(int temp) | |||
172 | return (temp + 500) / 1000; | 181 | return (temp + 500) / 1000; |
173 | } | 182 | } |
174 | 183 | ||
184 | /* Some of analog inputs have internal scaling (2x), 8mV is ADC LSB */ | ||
185 | |||
186 | static u8 scale_in[10] = { 8, 8, 16, 16, 8, 8, 8, 16, 16, 8 }; | ||
187 | |||
188 | static inline long in_from_reg(u8 reg, u8 nr) | ||
189 | { | ||
190 | return reg * scale_in[nr]; | ||
191 | } | ||
192 | |||
193 | static inline u8 in_to_reg(u32 val, u8 nr) | ||
194 | { | ||
195 | return SENSORS_LIMIT(((val + (scale_in[nr] / 2)) / scale_in[nr]), 0, 255); | ||
196 | } | ||
197 | |||
175 | /* | 198 | /* |
176 | * Data structures and manipulation thereof | 199 | * Data structures and manipulation thereof |
177 | */ | 200 | */ |
@@ -186,6 +209,9 @@ struct w83627ehf_data { | |||
186 | unsigned long last_updated; /* In jiffies */ | 209 | unsigned long last_updated; /* In jiffies */ |
187 | 210 | ||
188 | /* Register values */ | 211 | /* Register values */ |
212 | u8 in[10]; /* Register value */ | ||
213 | u8 in_max[10]; /* Register value */ | ||
214 | u8 in_min[10]; /* Register value */ | ||
189 | u8 fan[5]; | 215 | u8 fan[5]; |
190 | u8 fan_min[5]; | 216 | u8 fan_min[5]; |
191 | u8 fan_div[5]; | 217 | u8 fan_div[5]; |
@@ -196,6 +222,7 @@ struct w83627ehf_data { | |||
196 | s16 temp[2]; | 222 | s16 temp[2]; |
197 | s16 temp_max[2]; | 223 | s16 temp_max[2]; |
198 | s16 temp_max_hyst[2]; | 224 | s16 temp_max_hyst[2]; |
225 | u32 alarms; | ||
199 | }; | 226 | }; |
200 | 227 | ||
201 | static inline int is_word_sized(u16 reg) | 228 | static inline int is_word_sized(u16 reg) |
@@ -349,6 +376,16 @@ static struct w83627ehf_data *w83627ehf_update_device(struct device *dev) | |||
349 | data->fan_div[3] |= (i >> 5) & 0x04; | 376 | data->fan_div[3] |= (i >> 5) & 0x04; |
350 | } | 377 | } |
351 | 378 | ||
379 | /* Measured voltages and limits */ | ||
380 | for (i = 0; i < 10; i++) { | ||
381 | data->in[i] = w83627ehf_read_value(client, | ||
382 | W83627EHF_REG_IN(i)); | ||
383 | data->in_min[i] = w83627ehf_read_value(client, | ||
384 | W83627EHF_REG_IN_MIN(i)); | ||
385 | data->in_max[i] = w83627ehf_read_value(client, | ||
386 | W83627EHF_REG_IN_MAX(i)); | ||
387 | } | ||
388 | |||
352 | /* Measured fan speeds and limits */ | 389 | /* Measured fan speeds and limits */ |
353 | for (i = 0; i < 5; i++) { | 390 | for (i = 0; i < 5; i++) { |
354 | if (!(data->has_fan & (1 << i))) | 391 | if (!(data->has_fan & (1 << i))) |
@@ -395,6 +432,13 @@ static struct w83627ehf_data *w83627ehf_update_device(struct device *dev) | |||
395 | W83627EHF_REG_TEMP_HYST[i]); | 432 | W83627EHF_REG_TEMP_HYST[i]); |
396 | } | 433 | } |
397 | 434 | ||
435 | data->alarms = w83627ehf_read_value(client, | ||
436 | W83627EHF_REG_ALARM1) | | ||
437 | (w83627ehf_read_value(client, | ||
438 | W83627EHF_REG_ALARM2) << 8) | | ||
439 | (w83627ehf_read_value(client, | ||
440 | W83627EHF_REG_ALARM3) << 16); | ||
441 | |||
398 | data->last_updated = jiffies; | 442 | data->last_updated = jiffies; |
399 | data->valid = 1; | 443 | data->valid = 1; |
400 | } | 444 | } |
@@ -406,6 +450,109 @@ static struct w83627ehf_data *w83627ehf_update_device(struct device *dev) | |||
406 | /* | 450 | /* |
407 | * Sysfs callback functions | 451 | * Sysfs callback functions |
408 | */ | 452 | */ |
453 | #define show_in_reg(reg) \ | ||
454 | static ssize_t \ | ||
455 | show_##reg(struct device *dev, struct device_attribute *attr, \ | ||
456 | char *buf) \ | ||
457 | { \ | ||
458 | struct w83627ehf_data *data = w83627ehf_update_device(dev); \ | ||
459 | struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \ | ||
460 | int nr = sensor_attr->index; \ | ||
461 | return sprintf(buf, "%ld\n", in_from_reg(data->reg[nr], nr)); \ | ||
462 | } | ||
463 | show_in_reg(in) | ||
464 | show_in_reg(in_min) | ||
465 | show_in_reg(in_max) | ||
466 | |||
467 | #define store_in_reg(REG, reg) \ | ||
468 | static ssize_t \ | ||
469 | store_in_##reg (struct device *dev, struct device_attribute *attr, \ | ||
470 | const char *buf, size_t count) \ | ||
471 | { \ | ||
472 | struct i2c_client *client = to_i2c_client(dev); \ | ||
473 | struct w83627ehf_data *data = i2c_get_clientdata(client); \ | ||
474 | struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \ | ||
475 | int nr = sensor_attr->index; \ | ||
476 | u32 val = simple_strtoul(buf, NULL, 10); \ | ||
477 | \ | ||
478 | mutex_lock(&data->update_lock); \ | ||
479 | data->in_##reg[nr] = in_to_reg(val, nr); \ | ||
480 | w83627ehf_write_value(client, W83627EHF_REG_IN_##REG(nr), \ | ||
481 | data->in_##reg[nr]); \ | ||
482 | mutex_unlock(&data->update_lock); \ | ||
483 | return count; \ | ||
484 | } | ||
485 | |||
486 | store_in_reg(MIN, min) | ||
487 | store_in_reg(MAX, max) | ||
488 | |||
489 | static ssize_t show_alarm(struct device *dev, struct device_attribute *attr, char *buf) | ||
490 | { | ||
491 | struct w83627ehf_data *data = w83627ehf_update_device(dev); | ||
492 | struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); | ||
493 | int nr = sensor_attr->index; | ||
494 | return sprintf(buf, "%u\n", (data->alarms >> nr) & 0x01); | ||
495 | } | ||
496 | |||
497 | static struct sensor_device_attribute sda_in_input[] = { | ||
498 | SENSOR_ATTR(in0_input, S_IRUGO, show_in, NULL, 0), | ||
499 | SENSOR_ATTR(in1_input, S_IRUGO, show_in, NULL, 1), | ||
500 | SENSOR_ATTR(in2_input, S_IRUGO, show_in, NULL, 2), | ||
501 | SENSOR_ATTR(in3_input, S_IRUGO, show_in, NULL, 3), | ||
502 | SENSOR_ATTR(in4_input, S_IRUGO, show_in, NULL, 4), | ||
503 | SENSOR_ATTR(in5_input, S_IRUGO, show_in, NULL, 5), | ||
504 | SENSOR_ATTR(in6_input, S_IRUGO, show_in, NULL, 6), | ||
505 | SENSOR_ATTR(in7_input, S_IRUGO, show_in, NULL, 7), | ||
506 | SENSOR_ATTR(in8_input, S_IRUGO, show_in, NULL, 8), | ||
507 | SENSOR_ATTR(in9_input, S_IRUGO, show_in, NULL, 9), | ||
508 | }; | ||
509 | |||
510 | static struct sensor_device_attribute sda_in_alarm[] = { | ||
511 | SENSOR_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 0), | ||
512 | SENSOR_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 1), | ||
513 | SENSOR_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 2), | ||
514 | SENSOR_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 3), | ||
515 | SENSOR_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 8), | ||
516 | SENSOR_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 21), | ||
517 | SENSOR_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 20), | ||
518 | SENSOR_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 16), | ||
519 | SENSOR_ATTR(in8_alarm, S_IRUGO, show_alarm, NULL, 17), | ||
520 | SENSOR_ATTR(in9_alarm, S_IRUGO, show_alarm, NULL, 19), | ||
521 | }; | ||
522 | |||
523 | static struct sensor_device_attribute sda_in_min[] = { | ||
524 | SENSOR_ATTR(in0_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 0), | ||
525 | SENSOR_ATTR(in1_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 1), | ||
526 | SENSOR_ATTR(in2_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 2), | ||
527 | SENSOR_ATTR(in3_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 3), | ||
528 | SENSOR_ATTR(in4_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 4), | ||
529 | SENSOR_ATTR(in5_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 5), | ||
530 | SENSOR_ATTR(in6_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 6), | ||
531 | SENSOR_ATTR(in7_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 7), | ||
532 | SENSOR_ATTR(in8_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 8), | ||
533 | SENSOR_ATTR(in9_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 9), | ||
534 | }; | ||
535 | |||
536 | static struct sensor_device_attribute sda_in_max[] = { | ||
537 | SENSOR_ATTR(in0_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 0), | ||
538 | SENSOR_ATTR(in1_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 1), | ||
539 | SENSOR_ATTR(in2_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 2), | ||
540 | SENSOR_ATTR(in3_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 3), | ||
541 | SENSOR_ATTR(in4_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 4), | ||
542 | SENSOR_ATTR(in5_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 5), | ||
543 | SENSOR_ATTR(in6_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 6), | ||
544 | SENSOR_ATTR(in7_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 7), | ||
545 | SENSOR_ATTR(in8_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 8), | ||
546 | SENSOR_ATTR(in9_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 9), | ||
547 | }; | ||
548 | |||
549 | static void device_create_file_in(struct device *dev, int i) | ||
550 | { | ||
551 | device_create_file(dev, &sda_in_input[i].dev_attr); | ||
552 | device_create_file(dev, &sda_in_alarm[i].dev_attr); | ||
553 | device_create_file(dev, &sda_in_min[i].dev_attr); | ||
554 | device_create_file(dev, &sda_in_max[i].dev_attr); | ||
555 | } | ||
409 | 556 | ||
410 | #define show_fan_reg(reg) \ | 557 | #define show_fan_reg(reg) \ |
411 | static ssize_t \ | 558 | static ssize_t \ |
@@ -505,6 +652,14 @@ static struct sensor_device_attribute sda_fan_input[] = { | |||
505 | SENSOR_ATTR(fan5_input, S_IRUGO, show_fan, NULL, 4), | 652 | SENSOR_ATTR(fan5_input, S_IRUGO, show_fan, NULL, 4), |
506 | }; | 653 | }; |
507 | 654 | ||
655 | static struct sensor_device_attribute sda_fan_alarm[] = { | ||
656 | SENSOR_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 6), | ||
657 | SENSOR_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 7), | ||
658 | SENSOR_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 11), | ||
659 | SENSOR_ATTR(fan4_alarm, S_IRUGO, show_alarm, NULL, 10), | ||
660 | SENSOR_ATTR(fan5_alarm, S_IRUGO, show_alarm, NULL, 23), | ||
661 | }; | ||
662 | |||
508 | static struct sensor_device_attribute sda_fan_min[] = { | 663 | static struct sensor_device_attribute sda_fan_min[] = { |
509 | SENSOR_ATTR(fan1_min, S_IWUSR | S_IRUGO, show_fan_min, | 664 | SENSOR_ATTR(fan1_min, S_IWUSR | S_IRUGO, show_fan_min, |
510 | store_fan_min, 0), | 665 | store_fan_min, 0), |
@@ -529,6 +684,7 @@ static struct sensor_device_attribute sda_fan_div[] = { | |||
529 | static void device_create_file_fan(struct device *dev, int i) | 684 | static void device_create_file_fan(struct device *dev, int i) |
530 | { | 685 | { |
531 | device_create_file(dev, &sda_fan_input[i].dev_attr); | 686 | device_create_file(dev, &sda_fan_input[i].dev_attr); |
687 | device_create_file(dev, &sda_fan_alarm[i].dev_attr); | ||
532 | device_create_file(dev, &sda_fan_div[i].dev_attr); | 688 | device_create_file(dev, &sda_fan_div[i].dev_attr); |
533 | device_create_file(dev, &sda_fan_min[i].dev_attr); | 689 | device_create_file(dev, &sda_fan_min[i].dev_attr); |
534 | } | 690 | } |
@@ -616,6 +772,9 @@ static struct sensor_device_attribute sda_temp[] = { | |||
616 | store_temp_max_hyst, 0), | 772 | store_temp_max_hyst, 0), |
617 | SENSOR_ATTR(temp3_max_hyst, S_IRUGO | S_IWUSR, show_temp_max_hyst, | 773 | SENSOR_ATTR(temp3_max_hyst, S_IRUGO | S_IWUSR, show_temp_max_hyst, |
618 | store_temp_max_hyst, 1), | 774 | store_temp_max_hyst, 1), |
775 | SENSOR_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 4), | ||
776 | SENSOR_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 5), | ||
777 | SENSOR_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL, 13), | ||
619 | }; | 778 | }; |
620 | 779 | ||
621 | /* | 780 | /* |
@@ -705,6 +864,9 @@ static int w83627ehf_detect(struct i2c_adapter *adapter) | |||
705 | goto exit_detach; | 864 | goto exit_detach; |
706 | } | 865 | } |
707 | 866 | ||
867 | for (i = 0; i < 10; i++) | ||
868 | device_create_file_in(dev, i); | ||
869 | |||
708 | for (i = 0; i < 5; i++) { | 870 | for (i = 0; i < 5; i++) { |
709 | if (data->has_fan & (1 << i)) | 871 | if (data->has_fan & (1 << i)) |
710 | device_create_file_fan(dev, i); | 872 | device_create_file_fan(dev, i); |
diff --git a/drivers/hwmon/w83791d.c b/drivers/hwmon/w83791d.c new file mode 100644 index 000000000000..eec43abd57fb --- /dev/null +++ b/drivers/hwmon/w83791d.c | |||
@@ -0,0 +1,1255 @@ | |||
1 | /* | ||
2 | w83791d.c - Part of lm_sensors, Linux kernel modules for hardware | ||
3 | monitoring | ||
4 | |||
5 | Copyright (C) 2006 Charles Spirakis <bezaur@gmail.com> | ||
6 | |||
7 | This program is free software; you can redistribute it and/or modify | ||
8 | it under the terms of the GNU General Public License as published by | ||
9 | the Free Software Foundation; either version 2 of the License, or | ||
10 | (at your option) any later version. | ||
11 | |||
12 | This program is distributed in the hope that it will be useful, | ||
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
15 | GNU General Public License for more details. | ||
16 | |||
17 | You should have received a copy of the GNU General Public License | ||
18 | along with this program; if not, write to the Free Software | ||
19 | Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | ||
20 | */ | ||
21 | |||
22 | /* | ||
23 | Supports following chips: | ||
24 | |||
25 | Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA | ||
26 | w83791d 10 5 3 3 0x71 0x5ca3 yes no | ||
27 | |||
28 | The w83791d chip appears to be part way between the 83781d and the | ||
29 | 83792d. Thus, this file is derived from both the w83792d.c and | ||
30 | w83781d.c files, but its output is more along the lines of the | ||
31 | 83781d (which means there are no changes to the user-mode sensors | ||
32 | program which treats the 83791d as an 83781d). | ||
33 | */ | ||
34 | |||
35 | #include <linux/config.h> | ||
36 | #include <linux/module.h> | ||
37 | #include <linux/init.h> | ||
38 | #include <linux/slab.h> | ||
39 | #include <linux/i2c.h> | ||
40 | #include <linux/hwmon.h> | ||
41 | #include <linux/hwmon-vid.h> | ||
42 | #include <linux/hwmon-sysfs.h> | ||
43 | #include <linux/err.h> | ||
44 | #include <linux/mutex.h> | ||
45 | |||
46 | #define NUMBER_OF_VIN 10 | ||
47 | #define NUMBER_OF_FANIN 5 | ||
48 | #define NUMBER_OF_TEMPIN 3 | ||
49 | |||
50 | /* Addresses to scan */ | ||
51 | static unsigned short normal_i2c[] = { 0x2c, 0x2d, 0x2e, 0x2f, I2C_CLIENT_END }; | ||
52 | |||
53 | /* Insmod parameters */ | ||
54 | I2C_CLIENT_INSMOD_1(w83791d); | ||
55 | I2C_CLIENT_MODULE_PARM(force_subclients, "List of subclient addresses: " | ||
56 | "{bus, clientaddr, subclientaddr1, subclientaddr2}"); | ||
57 | |||
58 | static int reset; | ||
59 | module_param(reset, bool, 0); | ||
60 | MODULE_PARM_DESC(reset, "Set to one to force a hardware chip reset"); | ||
61 | |||
62 | static int init; | ||
63 | module_param(init, bool, 0); | ||
64 | MODULE_PARM_DESC(init, "Set to one to force extra software initialization"); | ||
65 | |||
66 | /* The W83791D registers */ | ||
67 | static const u8 W83791D_REG_IN[NUMBER_OF_VIN] = { | ||
68 | 0x20, /* VCOREA in DataSheet */ | ||
69 | 0x21, /* VINR0 in DataSheet */ | ||
70 | 0x22, /* +3.3VIN in DataSheet */ | ||
71 | 0x23, /* VDD5V in DataSheet */ | ||
72 | 0x24, /* +12VIN in DataSheet */ | ||
73 | 0x25, /* -12VIN in DataSheet */ | ||
74 | 0x26, /* -5VIN in DataSheet */ | ||
75 | 0xB0, /* 5VSB in DataSheet */ | ||
76 | 0xB1, /* VBAT in DataSheet */ | ||
77 | 0xB2 /* VINR1 in DataSheet */ | ||
78 | }; | ||
79 | |||
80 | static const u8 W83791D_REG_IN_MAX[NUMBER_OF_VIN] = { | ||
81 | 0x2B, /* VCOREA High Limit in DataSheet */ | ||
82 | 0x2D, /* VINR0 High Limit in DataSheet */ | ||
83 | 0x2F, /* +3.3VIN High Limit in DataSheet */ | ||
84 | 0x31, /* VDD5V High Limit in DataSheet */ | ||
85 | 0x33, /* +12VIN High Limit in DataSheet */ | ||
86 | 0x35, /* -12VIN High Limit in DataSheet */ | ||
87 | 0x37, /* -5VIN High Limit in DataSheet */ | ||
88 | 0xB4, /* 5VSB High Limit in DataSheet */ | ||
89 | 0xB6, /* VBAT High Limit in DataSheet */ | ||
90 | 0xB8 /* VINR1 High Limit in DataSheet */ | ||
91 | }; | ||
92 | static const u8 W83791D_REG_IN_MIN[NUMBER_OF_VIN] = { | ||
93 | 0x2C, /* VCOREA Low Limit in DataSheet */ | ||
94 | 0x2E, /* VINR0 Low Limit in DataSheet */ | ||
95 | 0x30, /* +3.3VIN Low Limit in DataSheet */ | ||
96 | 0x32, /* VDD5V Low Limit in DataSheet */ | ||
97 | 0x34, /* +12VIN Low Limit in DataSheet */ | ||
98 | 0x36, /* -12VIN Low Limit in DataSheet */ | ||
99 | 0x38, /* -5VIN Low Limit in DataSheet */ | ||
100 | 0xB5, /* 5VSB Low Limit in DataSheet */ | ||
101 | 0xB7, /* VBAT Low Limit in DataSheet */ | ||
102 | 0xB9 /* VINR1 Low Limit in DataSheet */ | ||
103 | }; | ||
104 | static const u8 W83791D_REG_FAN[NUMBER_OF_FANIN] = { | ||
105 | 0x28, /* FAN 1 Count in DataSheet */ | ||
106 | 0x29, /* FAN 2 Count in DataSheet */ | ||
107 | 0x2A, /* FAN 3 Count in DataSheet */ | ||
108 | 0xBA, /* FAN 4 Count in DataSheet */ | ||
109 | 0xBB, /* FAN 5 Count in DataSheet */ | ||
110 | }; | ||
111 | static const u8 W83791D_REG_FAN_MIN[NUMBER_OF_FANIN] = { | ||
112 | 0x3B, /* FAN 1 Count Low Limit in DataSheet */ | ||
113 | 0x3C, /* FAN 2 Count Low Limit in DataSheet */ | ||
114 | 0x3D, /* FAN 3 Count Low Limit in DataSheet */ | ||
115 | 0xBC, /* FAN 4 Count Low Limit in DataSheet */ | ||
116 | 0xBD, /* FAN 5 Count Low Limit in DataSheet */ | ||
117 | }; | ||
118 | |||
119 | static const u8 W83791D_REG_FAN_CFG[2] = { | ||
120 | 0x84, /* FAN 1/2 configuration */ | ||
121 | 0x95, /* FAN 3 configuration */ | ||
122 | }; | ||
123 | |||
124 | static const u8 W83791D_REG_FAN_DIV[3] = { | ||
125 | 0x47, /* contains FAN1 and FAN2 Divisor */ | ||
126 | 0x4b, /* contains FAN3 Divisor */ | ||
127 | 0x5C, /* contains FAN4 and FAN5 Divisor */ | ||
128 | }; | ||
129 | |||
130 | #define W83791D_REG_BANK 0x4E | ||
131 | #define W83791D_REG_TEMP2_CONFIG 0xC2 | ||
132 | #define W83791D_REG_TEMP3_CONFIG 0xCA | ||
133 | |||
134 | static const u8 W83791D_REG_TEMP1[3] = { | ||
135 | 0x27, /* TEMP 1 in DataSheet */ | ||
136 | 0x39, /* TEMP 1 Over in DataSheet */ | ||
137 | 0x3A, /* TEMP 1 Hyst in DataSheet */ | ||
138 | }; | ||
139 | |||
140 | static const u8 W83791D_REG_TEMP_ADD[2][6] = { | ||
141 | {0xC0, /* TEMP 2 in DataSheet */ | ||
142 | 0xC1, /* TEMP 2(0.5 deg) in DataSheet */ | ||
143 | 0xC5, /* TEMP 2 Over High part in DataSheet */ | ||
144 | 0xC6, /* TEMP 2 Over Low part in DataSheet */ | ||
145 | 0xC3, /* TEMP 2 Thyst High part in DataSheet */ | ||
146 | 0xC4}, /* TEMP 2 Thyst Low part in DataSheet */ | ||
147 | {0xC8, /* TEMP 3 in DataSheet */ | ||
148 | 0xC9, /* TEMP 3(0.5 deg) in DataSheet */ | ||
149 | 0xCD, /* TEMP 3 Over High part in DataSheet */ | ||
150 | 0xCE, /* TEMP 3 Over Low part in DataSheet */ | ||
151 | 0xCB, /* TEMP 3 Thyst High part in DataSheet */ | ||
152 | 0xCC} /* TEMP 3 Thyst Low part in DataSheet */ | ||
153 | }; | ||
154 | |||
155 | #define W83791D_REG_BEEP_CONFIG 0x4D | ||
156 | |||
157 | static const u8 W83791D_REG_BEEP_CTRL[3] = { | ||
158 | 0x56, /* BEEP Control Register 1 */ | ||
159 | 0x57, /* BEEP Control Register 2 */ | ||
160 | 0xA3, /* BEEP Control Register 3 */ | ||
161 | }; | ||
162 | |||
163 | #define W83791D_REG_CONFIG 0x40 | ||
164 | #define W83791D_REG_VID_FANDIV 0x47 | ||
165 | #define W83791D_REG_DID_VID4 0x49 | ||
166 | #define W83791D_REG_WCHIPID 0x58 | ||
167 | #define W83791D_REG_CHIPMAN 0x4F | ||
168 | #define W83791D_REG_PIN 0x4B | ||
169 | #define W83791D_REG_I2C_SUBADDR 0x4A | ||
170 | |||
171 | #define W83791D_REG_ALARM1 0xA9 /* realtime status register1 */ | ||
172 | #define W83791D_REG_ALARM2 0xAA /* realtime status register2 */ | ||
173 | #define W83791D_REG_ALARM3 0xAB /* realtime status register3 */ | ||
174 | |||
175 | #define W83791D_REG_VBAT 0x5D | ||
176 | #define W83791D_REG_I2C_ADDR 0x48 | ||
177 | |||
178 | /* The SMBus locks itself. The Winbond W83791D has a bank select register | ||
179 | (index 0x4e), but the driver only accesses registers in bank 0. Since | ||
180 | we don't switch banks, we don't need any special code to handle | ||
181 | locking access between bank switches */ | ||
182 | static inline int w83791d_read(struct i2c_client *client, u8 reg) | ||
183 | { | ||
184 | return i2c_smbus_read_byte_data(client, reg); | ||
185 | } | ||
186 | |||
187 | static inline int w83791d_write(struct i2c_client *client, u8 reg, u8 value) | ||
188 | { | ||
189 | return i2c_smbus_write_byte_data(client, reg, value); | ||
190 | } | ||
191 | |||
192 | /* The analog voltage inputs have 16mV LSB. Since the sysfs output is | ||
193 | in mV as would be measured on the chip input pin, need to just | ||
194 | multiply/divide by 16 to translate from/to register values. */ | ||
195 | #define IN_TO_REG(val) (SENSORS_LIMIT((((val) + 8) / 16), 0, 255)) | ||
196 | #define IN_FROM_REG(val) ((val) * 16) | ||
197 | |||
198 | static u8 fan_to_reg(long rpm, int div) | ||
199 | { | ||
200 | if (rpm == 0) | ||
201 | return 255; | ||
202 | rpm = SENSORS_LIMIT(rpm, 1, 1000000); | ||
203 | return SENSORS_LIMIT((1350000 + rpm * div / 2) / (rpm * div), 1, 254); | ||
204 | } | ||
205 | |||
206 | #define FAN_FROM_REG(val,div) ((val) == 0 ? -1 : \ | ||
207 | ((val) == 255 ? 0 : \ | ||
208 | 1350000 / ((val) * (div)))) | ||
209 | |||
210 | /* for temp1 which is 8-bit resolution, LSB = 1 degree Celsius */ | ||
211 | #define TEMP1_FROM_REG(val) ((val) * 1000) | ||
212 | #define TEMP1_TO_REG(val) ((val) <= -128000 ? -128 : \ | ||
213 | (val) >= 127000 ? 127 : \ | ||
214 | (val) < 0 ? ((val) - 500) / 1000 : \ | ||
215 | ((val) + 500) / 1000) | ||
216 | |||
217 | /* for temp2 and temp3 which are 9-bit resolution, LSB = 0.5 degree Celsius | ||
218 | Assumes the top 8 bits are the integral amount and the bottom 8 bits | ||
219 | are the fractional amount. Since we only have 0.5 degree resolution, | ||
220 | the bottom 7 bits will always be zero */ | ||
221 | #define TEMP23_FROM_REG(val) ((val) / 128 * 500) | ||
222 | #define TEMP23_TO_REG(val) ((val) <= -128000 ? 0x8000 : \ | ||
223 | (val) >= 127500 ? 0x7F80 : \ | ||
224 | (val) < 0 ? ((val) - 250) / 500 * 128 : \ | ||
225 | ((val) + 250) / 500 * 128) | ||
226 | |||
227 | |||
228 | #define BEEP_MASK_TO_REG(val) ((val) & 0xffffff) | ||
229 | #define BEEP_MASK_FROM_REG(val) ((val) & 0xffffff) | ||
230 | |||
231 | #define DIV_FROM_REG(val) (1 << (val)) | ||
232 | |||
233 | static u8 div_to_reg(int nr, long val) | ||
234 | { | ||
235 | int i; | ||
236 | int max; | ||
237 | |||
238 | /* first three fan's divisor max out at 8, rest max out at 128 */ | ||
239 | max = (nr < 3) ? 8 : 128; | ||
240 | val = SENSORS_LIMIT(val, 1, max) >> 1; | ||
241 | for (i = 0; i < 7; i++) { | ||
242 | if (val == 0) | ||
243 | break; | ||
244 | val >>= 1; | ||
245 | } | ||
246 | return (u8) i; | ||
247 | } | ||
248 | |||
249 | struct w83791d_data { | ||
250 | struct i2c_client client; | ||
251 | struct class_device *class_dev; | ||
252 | struct mutex update_lock; | ||
253 | |||
254 | char valid; /* !=0 if following fields are valid */ | ||
255 | unsigned long last_updated; /* In jiffies */ | ||
256 | |||
257 | /* array of 2 pointers to subclients */ | ||
258 | struct i2c_client *lm75[2]; | ||
259 | |||
260 | /* volts */ | ||
261 | u8 in[NUMBER_OF_VIN]; /* Register value */ | ||
262 | u8 in_max[NUMBER_OF_VIN]; /* Register value */ | ||
263 | u8 in_min[NUMBER_OF_VIN]; /* Register value */ | ||
264 | |||
265 | /* fans */ | ||
266 | u8 fan[NUMBER_OF_FANIN]; /* Register value */ | ||
267 | u8 fan_min[NUMBER_OF_FANIN]; /* Register value */ | ||
268 | u8 fan_div[NUMBER_OF_FANIN]; /* Register encoding, shifted right */ | ||
269 | |||
270 | /* Temperature sensors */ | ||
271 | |||
272 | s8 temp1[3]; /* current, over, thyst */ | ||
273 | s16 temp_add[2][3]; /* fixed point value. Top 8 bits are the | ||
274 | integral part, bottom 8 bits are the | ||
275 | fractional part. We only use the top | ||
276 | 9 bits as the resolution is only | ||
277 | to the 0.5 degree C... | ||
278 | two sensors with three values | ||
279 | (cur, over, hyst) */ | ||
280 | |||
281 | /* Misc */ | ||
282 | u32 alarms; /* realtime status register encoding,combined */ | ||
283 | u8 beep_enable; /* Global beep enable */ | ||
284 | u32 beep_mask; /* Mask off specific beeps */ | ||
285 | u8 vid; /* Register encoding, combined */ | ||
286 | u8 vrm; /* hwmon-vid */ | ||
287 | }; | ||
288 | |||
289 | static int w83791d_attach_adapter(struct i2c_adapter *adapter); | ||
290 | static int w83791d_detect(struct i2c_adapter *adapter, int address, int kind); | ||
291 | static int w83791d_detach_client(struct i2c_client *client); | ||
292 | |||
293 | static int w83791d_read(struct i2c_client *client, u8 register); | ||
294 | static int w83791d_write(struct i2c_client *client, u8 register, u8 value); | ||
295 | static struct w83791d_data *w83791d_update_device(struct device *dev); | ||
296 | |||
297 | #ifdef DEBUG | ||
298 | static void w83791d_print_debug(struct w83791d_data *data, struct device *dev); | ||
299 | #endif | ||
300 | |||
301 | static void w83791d_init_client(struct i2c_client *client); | ||
302 | |||
303 | static struct i2c_driver w83791d_driver = { | ||
304 | .driver = { | ||
305 | .name = "w83791d", | ||
306 | }, | ||
307 | .attach_adapter = w83791d_attach_adapter, | ||
308 | .detach_client = w83791d_detach_client, | ||
309 | }; | ||
310 | |||
311 | /* following are the sysfs callback functions */ | ||
312 | #define show_in_reg(reg) \ | ||
313 | static ssize_t show_##reg(struct device *dev, struct device_attribute *attr, \ | ||
314 | char *buf) \ | ||
315 | { \ | ||
316 | struct sensor_device_attribute *sensor_attr = \ | ||
317 | to_sensor_dev_attr(attr); \ | ||
318 | struct w83791d_data *data = w83791d_update_device(dev); \ | ||
319 | int nr = sensor_attr->index; \ | ||
320 | return sprintf(buf,"%d\n", IN_FROM_REG(data->reg[nr])); \ | ||
321 | } | ||
322 | |||
323 | show_in_reg(in); | ||
324 | show_in_reg(in_min); | ||
325 | show_in_reg(in_max); | ||
326 | |||
327 | #define store_in_reg(REG, reg) \ | ||
328 | static ssize_t store_in_##reg(struct device *dev, \ | ||
329 | struct device_attribute *attr, \ | ||
330 | const char *buf, size_t count) \ | ||
331 | { \ | ||
332 | struct sensor_device_attribute *sensor_attr = \ | ||
333 | to_sensor_dev_attr(attr); \ | ||
334 | struct i2c_client *client = to_i2c_client(dev); \ | ||
335 | struct w83791d_data *data = i2c_get_clientdata(client); \ | ||
336 | unsigned long val = simple_strtoul(buf, NULL, 10); \ | ||
337 | int nr = sensor_attr->index; \ | ||
338 | \ | ||
339 | mutex_lock(&data->update_lock); \ | ||
340 | data->in_##reg[nr] = IN_TO_REG(val); \ | ||
341 | w83791d_write(client, W83791D_REG_IN_##REG[nr], data->in_##reg[nr]); \ | ||
342 | mutex_unlock(&data->update_lock); \ | ||
343 | \ | ||
344 | return count; \ | ||
345 | } | ||
346 | store_in_reg(MIN, min); | ||
347 | store_in_reg(MAX, max); | ||
348 | |||
349 | static struct sensor_device_attribute sda_in_input[] = { | ||
350 | SENSOR_ATTR(in0_input, S_IRUGO, show_in, NULL, 0), | ||
351 | SENSOR_ATTR(in1_input, S_IRUGO, show_in, NULL, 1), | ||
352 | SENSOR_ATTR(in2_input, S_IRUGO, show_in, NULL, 2), | ||
353 | SENSOR_ATTR(in3_input, S_IRUGO, show_in, NULL, 3), | ||
354 | SENSOR_ATTR(in4_input, S_IRUGO, show_in, NULL, 4), | ||
355 | SENSOR_ATTR(in5_input, S_IRUGO, show_in, NULL, 5), | ||
356 | SENSOR_ATTR(in6_input, S_IRUGO, show_in, NULL, 6), | ||
357 | SENSOR_ATTR(in7_input, S_IRUGO, show_in, NULL, 7), | ||
358 | SENSOR_ATTR(in8_input, S_IRUGO, show_in, NULL, 8), | ||
359 | SENSOR_ATTR(in9_input, S_IRUGO, show_in, NULL, 9), | ||
360 | }; | ||
361 | |||
362 | static struct sensor_device_attribute sda_in_min[] = { | ||
363 | SENSOR_ATTR(in0_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 0), | ||
364 | SENSOR_ATTR(in1_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 1), | ||
365 | SENSOR_ATTR(in2_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 2), | ||
366 | SENSOR_ATTR(in3_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 3), | ||
367 | SENSOR_ATTR(in4_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 4), | ||
368 | SENSOR_ATTR(in5_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 5), | ||
369 | SENSOR_ATTR(in6_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 6), | ||
370 | SENSOR_ATTR(in7_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 7), | ||
371 | SENSOR_ATTR(in8_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 8), | ||
372 | SENSOR_ATTR(in9_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 9), | ||
373 | }; | ||
374 | |||
375 | static struct sensor_device_attribute sda_in_max[] = { | ||
376 | SENSOR_ATTR(in0_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 0), | ||
377 | SENSOR_ATTR(in1_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 1), | ||
378 | SENSOR_ATTR(in2_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 2), | ||
379 | SENSOR_ATTR(in3_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 3), | ||
380 | SENSOR_ATTR(in4_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 4), | ||
381 | SENSOR_ATTR(in5_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 5), | ||
382 | SENSOR_ATTR(in6_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 6), | ||
383 | SENSOR_ATTR(in7_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 7), | ||
384 | SENSOR_ATTR(in8_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 8), | ||
385 | SENSOR_ATTR(in9_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 9), | ||
386 | }; | ||
387 | |||
388 | #define show_fan_reg(reg) \ | ||
389 | static ssize_t show_##reg(struct device *dev, struct device_attribute *attr, \ | ||
390 | char *buf) \ | ||
391 | { \ | ||
392 | struct sensor_device_attribute *sensor_attr = \ | ||
393 | to_sensor_dev_attr(attr); \ | ||
394 | struct w83791d_data *data = w83791d_update_device(dev); \ | ||
395 | int nr = sensor_attr->index; \ | ||
396 | return sprintf(buf,"%d\n", \ | ||
397 | FAN_FROM_REG(data->reg[nr], DIV_FROM_REG(data->fan_div[nr]))); \ | ||
398 | } | ||
399 | |||
400 | show_fan_reg(fan); | ||
401 | show_fan_reg(fan_min); | ||
402 | |||
403 | static ssize_t store_fan_min(struct device *dev, struct device_attribute *attr, | ||
404 | const char *buf, size_t count) | ||
405 | { | ||
406 | struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); | ||
407 | struct i2c_client *client = to_i2c_client(dev); | ||
408 | struct w83791d_data *data = i2c_get_clientdata(client); | ||
409 | unsigned long val = simple_strtoul(buf, NULL, 10); | ||
410 | int nr = sensor_attr->index; | ||
411 | |||
412 | mutex_lock(&data->update_lock); | ||
413 | data->fan_min[nr] = fan_to_reg(val, DIV_FROM_REG(data->fan_div[nr])); | ||
414 | w83791d_write(client, W83791D_REG_FAN_MIN[nr], data->fan_min[nr]); | ||
415 | mutex_unlock(&data->update_lock); | ||
416 | |||
417 | return count; | ||
418 | } | ||
419 | |||
420 | static ssize_t show_fan_div(struct device *dev, struct device_attribute *attr, | ||
421 | char *buf) | ||
422 | { | ||
423 | struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); | ||
424 | int nr = sensor_attr->index; | ||
425 | struct w83791d_data *data = w83791d_update_device(dev); | ||
426 | return sprintf(buf, "%u\n", DIV_FROM_REG(data->fan_div[nr])); | ||
427 | } | ||
428 | |||
429 | /* Note: we save and restore the fan minimum here, because its value is | ||
430 | determined in part by the fan divisor. This follows the principle of | ||
431 | least suprise; the user doesn't expect the fan minimum to change just | ||
432 | because the divisor changed. */ | ||
433 | static ssize_t store_fan_div(struct device *dev, struct device_attribute *attr, | ||
434 | const char *buf, size_t count) | ||
435 | { | ||
436 | struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); | ||
437 | struct i2c_client *client = to_i2c_client(dev); | ||
438 | struct w83791d_data *data = i2c_get_clientdata(client); | ||
439 | int nr = sensor_attr->index; | ||
440 | unsigned long min; | ||
441 | u8 tmp_fan_div; | ||
442 | u8 fan_div_reg; | ||
443 | int indx = 0; | ||
444 | u8 keep_mask = 0; | ||
445 | u8 new_shift = 0; | ||
446 | |||
447 | /* Save fan_min */ | ||
448 | min = FAN_FROM_REG(data->fan_min[nr], DIV_FROM_REG(data->fan_div[nr])); | ||
449 | |||
450 | mutex_lock(&data->update_lock); | ||
451 | data->fan_div[nr] = div_to_reg(nr, simple_strtoul(buf, NULL, 10)); | ||
452 | |||
453 | switch (nr) { | ||
454 | case 0: | ||
455 | indx = 0; | ||
456 | keep_mask = 0xcf; | ||
457 | new_shift = 4; | ||
458 | break; | ||
459 | case 1: | ||
460 | indx = 0; | ||
461 | keep_mask = 0x3f; | ||
462 | new_shift = 6; | ||
463 | break; | ||
464 | case 2: | ||
465 | indx = 1; | ||
466 | keep_mask = 0x3f; | ||
467 | new_shift = 6; | ||
468 | break; | ||
469 | case 3: | ||
470 | indx = 2; | ||
471 | keep_mask = 0xf8; | ||
472 | new_shift = 0; | ||
473 | break; | ||
474 | case 4: | ||
475 | indx = 2; | ||
476 | keep_mask = 0x8f; | ||
477 | new_shift = 4; | ||
478 | break; | ||
479 | #ifdef DEBUG | ||
480 | default: | ||
481 | dev_warn(dev, "store_fan_div: Unexpected nr seen: %d\n", nr); | ||
482 | count = -EINVAL; | ||
483 | goto err_exit; | ||
484 | #endif | ||
485 | } | ||
486 | |||
487 | fan_div_reg = w83791d_read(client, W83791D_REG_FAN_DIV[indx]) | ||
488 | & keep_mask; | ||
489 | tmp_fan_div = (data->fan_div[nr] << new_shift) & ~keep_mask; | ||
490 | |||
491 | w83791d_write(client, W83791D_REG_FAN_DIV[indx], | ||
492 | fan_div_reg | tmp_fan_div); | ||
493 | |||
494 | /* Restore fan_min */ | ||
495 | data->fan_min[nr] = fan_to_reg(min, DIV_FROM_REG(data->fan_div[nr])); | ||
496 | w83791d_write(client, W83791D_REG_FAN_MIN[nr], data->fan_min[nr]); | ||
497 | |||
498 | #ifdef DEBUG | ||
499 | err_exit: | ||
500 | #endif | ||
501 | mutex_unlock(&data->update_lock); | ||
502 | |||
503 | return count; | ||
504 | } | ||
505 | |||
506 | static struct sensor_device_attribute sda_fan_input[] = { | ||
507 | SENSOR_ATTR(fan1_input, S_IRUGO, show_fan, NULL, 0), | ||
508 | SENSOR_ATTR(fan2_input, S_IRUGO, show_fan, NULL, 1), | ||
509 | SENSOR_ATTR(fan3_input, S_IRUGO, show_fan, NULL, 2), | ||
510 | SENSOR_ATTR(fan4_input, S_IRUGO, show_fan, NULL, 3), | ||
511 | SENSOR_ATTR(fan5_input, S_IRUGO, show_fan, NULL, 4), | ||
512 | }; | ||
513 | |||
514 | static struct sensor_device_attribute sda_fan_min[] = { | ||
515 | SENSOR_ATTR(fan1_min, S_IWUSR | S_IRUGO, | ||
516 | show_fan_min, store_fan_min, 0), | ||
517 | SENSOR_ATTR(fan2_min, S_IWUSR | S_IRUGO, | ||
518 | show_fan_min, store_fan_min, 1), | ||
519 | SENSOR_ATTR(fan3_min, S_IWUSR | S_IRUGO, | ||
520 | show_fan_min, store_fan_min, 2), | ||
521 | SENSOR_ATTR(fan4_min, S_IWUSR | S_IRUGO, | ||
522 | show_fan_min, store_fan_min, 3), | ||
523 | SENSOR_ATTR(fan5_min, S_IWUSR | S_IRUGO, | ||
524 | show_fan_min, store_fan_min, 4), | ||
525 | }; | ||
526 | |||
527 | static struct sensor_device_attribute sda_fan_div[] = { | ||
528 | SENSOR_ATTR(fan1_div, S_IWUSR | S_IRUGO, | ||
529 | show_fan_div, store_fan_div, 0), | ||
530 | SENSOR_ATTR(fan2_div, S_IWUSR | S_IRUGO, | ||
531 | show_fan_div, store_fan_div, 1), | ||
532 | SENSOR_ATTR(fan3_div, S_IWUSR | S_IRUGO, | ||
533 | show_fan_div, store_fan_div, 2), | ||
534 | SENSOR_ATTR(fan4_div, S_IWUSR | S_IRUGO, | ||
535 | show_fan_div, store_fan_div, 3), | ||
536 | SENSOR_ATTR(fan5_div, S_IWUSR | S_IRUGO, | ||
537 | show_fan_div, store_fan_div, 4), | ||
538 | }; | ||
539 | |||
540 | /* read/write the temperature1, includes measured value and limits */ | ||
541 | static ssize_t show_temp1(struct device *dev, struct device_attribute *devattr, | ||
542 | char *buf) | ||
543 | { | ||
544 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | ||
545 | struct w83791d_data *data = w83791d_update_device(dev); | ||
546 | return sprintf(buf, "%d\n", TEMP1_FROM_REG(data->temp1[attr->index])); | ||
547 | } | ||
548 | |||
549 | static ssize_t store_temp1(struct device *dev, struct device_attribute *devattr, | ||
550 | const char *buf, size_t count) | ||
551 | { | ||
552 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | ||
553 | struct i2c_client *client = to_i2c_client(dev); | ||
554 | struct w83791d_data *data = i2c_get_clientdata(client); | ||
555 | long val = simple_strtol(buf, NULL, 10); | ||
556 | int nr = attr->index; | ||
557 | |||
558 | mutex_lock(&data->update_lock); | ||
559 | data->temp1[nr] = TEMP1_TO_REG(val); | ||
560 | w83791d_write(client, W83791D_REG_TEMP1[nr], data->temp1[nr]); | ||
561 | mutex_unlock(&data->update_lock); | ||
562 | return count; | ||
563 | } | ||
564 | |||
565 | /* read/write temperature2-3, includes measured value and limits */ | ||
566 | static ssize_t show_temp23(struct device *dev, struct device_attribute *devattr, | ||
567 | char *buf) | ||
568 | { | ||
569 | struct sensor_device_attribute_2 *attr = to_sensor_dev_attr_2(devattr); | ||
570 | struct w83791d_data *data = w83791d_update_device(dev); | ||
571 | int nr = attr->nr; | ||
572 | int index = attr->index; | ||
573 | return sprintf(buf, "%d\n", TEMP23_FROM_REG(data->temp_add[nr][index])); | ||
574 | } | ||
575 | |||
576 | static ssize_t store_temp23(struct device *dev, | ||
577 | struct device_attribute *devattr, | ||
578 | const char *buf, size_t count) | ||
579 | { | ||
580 | struct sensor_device_attribute_2 *attr = to_sensor_dev_attr_2(devattr); | ||
581 | struct i2c_client *client = to_i2c_client(dev); | ||
582 | struct w83791d_data *data = i2c_get_clientdata(client); | ||
583 | long val = simple_strtol(buf, NULL, 10); | ||
584 | int nr = attr->nr; | ||
585 | int index = attr->index; | ||
586 | |||
587 | mutex_lock(&data->update_lock); | ||
588 | data->temp_add[nr][index] = TEMP23_TO_REG(val); | ||
589 | w83791d_write(client, W83791D_REG_TEMP_ADD[nr][index * 2], | ||
590 | data->temp_add[nr][index] >> 8); | ||
591 | w83791d_write(client, W83791D_REG_TEMP_ADD[nr][index * 2 + 1], | ||
592 | data->temp_add[nr][index] & 0x80); | ||
593 | mutex_unlock(&data->update_lock); | ||
594 | |||
595 | return count; | ||
596 | } | ||
597 | |||
598 | static struct sensor_device_attribute_2 sda_temp_input[] = { | ||
599 | SENSOR_ATTR_2(temp1_input, S_IRUGO, show_temp1, NULL, 0, 0), | ||
600 | SENSOR_ATTR_2(temp2_input, S_IRUGO, show_temp23, NULL, 0, 0), | ||
601 | SENSOR_ATTR_2(temp3_input, S_IRUGO, show_temp23, NULL, 1, 0), | ||
602 | }; | ||
603 | |||
604 | static struct sensor_device_attribute_2 sda_temp_max[] = { | ||
605 | SENSOR_ATTR_2(temp1_max, S_IRUGO | S_IWUSR, | ||
606 | show_temp1, store_temp1, 0, 1), | ||
607 | SENSOR_ATTR_2(temp2_max, S_IRUGO | S_IWUSR, | ||
608 | show_temp23, store_temp23, 0, 1), | ||
609 | SENSOR_ATTR_2(temp3_max, S_IRUGO | S_IWUSR, | ||
610 | show_temp23, store_temp23, 1, 1), | ||
611 | }; | ||
612 | |||
613 | static struct sensor_device_attribute_2 sda_temp_max_hyst[] = { | ||
614 | SENSOR_ATTR_2(temp1_max_hyst, S_IRUGO | S_IWUSR, | ||
615 | show_temp1, store_temp1, 0, 2), | ||
616 | SENSOR_ATTR_2(temp2_max_hyst, S_IRUGO | S_IWUSR, | ||
617 | show_temp23, store_temp23, 0, 2), | ||
618 | SENSOR_ATTR_2(temp3_max_hyst, S_IRUGO | S_IWUSR, | ||
619 | show_temp23, store_temp23, 1, 2), | ||
620 | }; | ||
621 | |||
622 | |||
623 | /* get reatime status of all sensors items: voltage, temp, fan */ | ||
624 | static ssize_t show_alarms_reg(struct device *dev, | ||
625 | struct device_attribute *attr, char *buf) | ||
626 | { | ||
627 | struct w83791d_data *data = w83791d_update_device(dev); | ||
628 | return sprintf(buf, "%u\n", data->alarms); | ||
629 | } | ||
630 | |||
631 | static DEVICE_ATTR(alarms, S_IRUGO, show_alarms_reg, NULL); | ||
632 | |||
633 | /* Beep control */ | ||
634 | |||
635 | #define GLOBAL_BEEP_ENABLE_SHIFT 15 | ||
636 | #define GLOBAL_BEEP_ENABLE_MASK (1 << GLOBAL_BEEP_ENABLE_SHIFT) | ||
637 | |||
638 | static ssize_t show_beep_enable(struct device *dev, | ||
639 | struct device_attribute *attr, char *buf) | ||
640 | { | ||
641 | struct w83791d_data *data = w83791d_update_device(dev); | ||
642 | return sprintf(buf, "%d\n", data->beep_enable); | ||
643 | } | ||
644 | |||
645 | static ssize_t show_beep_mask(struct device *dev, | ||
646 | struct device_attribute *attr, char *buf) | ||
647 | { | ||
648 | struct w83791d_data *data = w83791d_update_device(dev); | ||
649 | return sprintf(buf, "%d\n", BEEP_MASK_FROM_REG(data->beep_mask)); | ||
650 | } | ||
651 | |||
652 | |||
653 | static ssize_t store_beep_mask(struct device *dev, | ||
654 | struct device_attribute *attr, | ||
655 | const char *buf, size_t count) | ||
656 | { | ||
657 | struct i2c_client *client = to_i2c_client(dev); | ||
658 | struct w83791d_data *data = i2c_get_clientdata(client); | ||
659 | long val = simple_strtol(buf, NULL, 10); | ||
660 | int i; | ||
661 | |||
662 | mutex_lock(&data->update_lock); | ||
663 | |||
664 | /* The beep_enable state overrides any enabling request from | ||
665 | the masks */ | ||
666 | data->beep_mask = BEEP_MASK_TO_REG(val) & ~GLOBAL_BEEP_ENABLE_MASK; | ||
667 | data->beep_mask |= (data->beep_enable << GLOBAL_BEEP_ENABLE_SHIFT); | ||
668 | |||
669 | val = data->beep_mask; | ||
670 | |||
671 | for (i = 0; i < 3; i++) { | ||
672 | w83791d_write(client, W83791D_REG_BEEP_CTRL[i], (val & 0xff)); | ||
673 | val >>= 8; | ||
674 | } | ||
675 | |||
676 | mutex_unlock(&data->update_lock); | ||
677 | |||
678 | return count; | ||
679 | } | ||
680 | |||
681 | static ssize_t store_beep_enable(struct device *dev, | ||
682 | struct device_attribute *attr, | ||
683 | const char *buf, size_t count) | ||
684 | { | ||
685 | struct i2c_client *client = to_i2c_client(dev); | ||
686 | struct w83791d_data *data = i2c_get_clientdata(client); | ||
687 | long val = simple_strtol(buf, NULL, 10); | ||
688 | |||
689 | mutex_lock(&data->update_lock); | ||
690 | |||
691 | data->beep_enable = val ? 1 : 0; | ||
692 | |||
693 | /* Keep the full mask value in sync with the current enable */ | ||
694 | data->beep_mask &= ~GLOBAL_BEEP_ENABLE_MASK; | ||
695 | data->beep_mask |= (data->beep_enable << GLOBAL_BEEP_ENABLE_SHIFT); | ||
696 | |||
697 | /* The global control is in the second beep control register | ||
698 | so only need to update that register */ | ||
699 | val = (data->beep_mask >> 8) & 0xff; | ||
700 | |||
701 | w83791d_write(client, W83791D_REG_BEEP_CTRL[1], val); | ||
702 | |||
703 | mutex_unlock(&data->update_lock); | ||
704 | |||
705 | return count; | ||
706 | } | ||
707 | |||
708 | static struct sensor_device_attribute sda_beep_ctrl[] = { | ||
709 | SENSOR_ATTR(beep_enable, S_IRUGO | S_IWUSR, | ||
710 | show_beep_enable, store_beep_enable, 0), | ||
711 | SENSOR_ATTR(beep_mask, S_IRUGO | S_IWUSR, | ||
712 | show_beep_mask, store_beep_mask, 1) | ||
713 | }; | ||
714 | |||
715 | /* cpu voltage regulation information */ | ||
716 | static ssize_t show_vid_reg(struct device *dev, | ||
717 | struct device_attribute *attr, char *buf) | ||
718 | { | ||
719 | struct w83791d_data *data = w83791d_update_device(dev); | ||
720 | return sprintf(buf, "%d\n", vid_from_reg(data->vid, data->vrm)); | ||
721 | } | ||
722 | |||
723 | static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid_reg, NULL); | ||
724 | |||
725 | static ssize_t show_vrm_reg(struct device *dev, | ||
726 | struct device_attribute *attr, char *buf) | ||
727 | { | ||
728 | struct w83791d_data *data = w83791d_update_device(dev); | ||
729 | return sprintf(buf, "%d\n", data->vrm); | ||
730 | } | ||
731 | |||
732 | static ssize_t store_vrm_reg(struct device *dev, | ||
733 | struct device_attribute *attr, | ||
734 | const char *buf, size_t count) | ||
735 | { | ||
736 | struct i2c_client *client = to_i2c_client(dev); | ||
737 | struct w83791d_data *data = i2c_get_clientdata(client); | ||
738 | unsigned long val = simple_strtoul(buf, NULL, 10); | ||
739 | |||
740 | /* No lock needed as vrm is internal to the driver | ||
741 | (not read from a chip register) and so is not | ||
742 | updated in w83791d_update_device() */ | ||
743 | data->vrm = val; | ||
744 | |||
745 | return count; | ||
746 | } | ||
747 | |||
748 | static DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm_reg, store_vrm_reg); | ||
749 | |||
750 | /* This function is called when: | ||
751 | * w83791d_driver is inserted (when this module is loaded), for each | ||
752 | available adapter | ||
753 | * when a new adapter is inserted (and w83791d_driver is still present) */ | ||
754 | static int w83791d_attach_adapter(struct i2c_adapter *adapter) | ||
755 | { | ||
756 | if (!(adapter->class & I2C_CLASS_HWMON)) | ||
757 | return 0; | ||
758 | return i2c_probe(adapter, &addr_data, w83791d_detect); | ||
759 | } | ||
760 | |||
761 | |||
762 | static int w83791d_create_subclient(struct i2c_adapter *adapter, | ||
763 | struct i2c_client *client, int addr, | ||
764 | struct i2c_client **sub_cli) | ||
765 | { | ||
766 | int err; | ||
767 | struct i2c_client *sub_client; | ||
768 | |||
769 | (*sub_cli) = sub_client = | ||
770 | kzalloc(sizeof(struct i2c_client), GFP_KERNEL); | ||
771 | if (!(sub_client)) { | ||
772 | return -ENOMEM; | ||
773 | } | ||
774 | sub_client->addr = 0x48 + addr; | ||
775 | i2c_set_clientdata(sub_client, NULL); | ||
776 | sub_client->adapter = adapter; | ||
777 | sub_client->driver = &w83791d_driver; | ||
778 | strlcpy(sub_client->name, "w83791d subclient", I2C_NAME_SIZE); | ||
779 | if ((err = i2c_attach_client(sub_client))) { | ||
780 | dev_err(&client->dev, "subclient registration " | ||
781 | "at address 0x%x failed\n", sub_client->addr); | ||
782 | kfree(sub_client); | ||
783 | return err; | ||
784 | } | ||
785 | return 0; | ||
786 | } | ||
787 | |||
788 | |||
789 | static int w83791d_detect_subclients(struct i2c_adapter *adapter, int address, | ||
790 | int kind, struct i2c_client *client) | ||
791 | { | ||
792 | struct w83791d_data *data = i2c_get_clientdata(client); | ||
793 | int i, id, err; | ||
794 | u8 val; | ||
795 | |||
796 | id = i2c_adapter_id(adapter); | ||
797 | if (force_subclients[0] == id && force_subclients[1] == address) { | ||
798 | for (i = 2; i <= 3; i++) { | ||
799 | if (force_subclients[i] < 0x48 || | ||
800 | force_subclients[i] > 0x4f) { | ||
801 | dev_err(&client->dev, | ||
802 | "invalid subclient " | ||
803 | "address %d; must be 0x48-0x4f\n", | ||
804 | force_subclients[i]); | ||
805 | err = -ENODEV; | ||
806 | goto error_sc_0; | ||
807 | } | ||
808 | } | ||
809 | w83791d_write(client, W83791D_REG_I2C_SUBADDR, | ||
810 | (force_subclients[2] & 0x07) | | ||
811 | ((force_subclients[3] & 0x07) << 4)); | ||
812 | } | ||
813 | |||
814 | val = w83791d_read(client, W83791D_REG_I2C_SUBADDR); | ||
815 | if (!(val & 0x08)) { | ||
816 | err = w83791d_create_subclient(adapter, client, | ||
817 | val & 0x7, &data->lm75[0]); | ||
818 | if (err < 0) | ||
819 | goto error_sc_0; | ||
820 | } | ||
821 | if (!(val & 0x80)) { | ||
822 | if ((data->lm75[0] != NULL) && | ||
823 | ((val & 0x7) == ((val >> 4) & 0x7))) { | ||
824 | dev_err(&client->dev, | ||
825 | "duplicate addresses 0x%x, " | ||
826 | "use force_subclient\n", | ||
827 | data->lm75[0]->addr); | ||
828 | err = -ENODEV; | ||
829 | goto error_sc_1; | ||
830 | } | ||
831 | err = w83791d_create_subclient(adapter, client, | ||
832 | (val >> 4) & 0x7, &data->lm75[1]); | ||
833 | if (err < 0) | ||
834 | goto error_sc_1; | ||
835 | } | ||
836 | |||
837 | return 0; | ||
838 | |||
839 | /* Undo inits in case of errors */ | ||
840 | |||
841 | error_sc_1: | ||
842 | if (data->lm75[0] != NULL) { | ||
843 | i2c_detach_client(data->lm75[0]); | ||
844 | kfree(data->lm75[0]); | ||
845 | } | ||
846 | error_sc_0: | ||
847 | return err; | ||
848 | } | ||
849 | |||
850 | |||
851 | static int w83791d_detect(struct i2c_adapter *adapter, int address, int kind) | ||
852 | { | ||
853 | struct i2c_client *client; | ||
854 | struct device *dev; | ||
855 | struct w83791d_data *data; | ||
856 | int i, val1, val2; | ||
857 | int err = 0; | ||
858 | const char *client_name = ""; | ||
859 | |||
860 | if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) { | ||
861 | goto error0; | ||
862 | } | ||
863 | |||
864 | /* OK. For now, we presume we have a valid client. We now create the | ||
865 | client structure, even though we cannot fill it completely yet. | ||
866 | But it allows us to access w83791d_{read,write}_value. */ | ||
867 | if (!(data = kzalloc(sizeof(struct w83791d_data), GFP_KERNEL))) { | ||
868 | err = -ENOMEM; | ||
869 | goto error0; | ||
870 | } | ||
871 | |||
872 | client = &data->client; | ||
873 | dev = &client->dev; | ||
874 | i2c_set_clientdata(client, data); | ||
875 | client->addr = address; | ||
876 | client->adapter = adapter; | ||
877 | client->driver = &w83791d_driver; | ||
878 | mutex_init(&data->update_lock); | ||
879 | |||
880 | /* Now, we do the remaining detection. */ | ||
881 | |||
882 | /* The w83791d may be stuck in some other bank than bank 0. This may | ||
883 | make reading other information impossible. Specify a force=... | ||
884 | parameter, and the Winbond will be reset to the right bank. */ | ||
885 | if (kind < 0) { | ||
886 | if (w83791d_read(client, W83791D_REG_CONFIG) & 0x80) { | ||
887 | dev_dbg(dev, "Detection failed at step 1\n"); | ||
888 | goto error1; | ||
889 | } | ||
890 | val1 = w83791d_read(client, W83791D_REG_BANK); | ||
891 | val2 = w83791d_read(client, W83791D_REG_CHIPMAN); | ||
892 | /* Check for Winbond ID if in bank 0 */ | ||
893 | if (!(val1 & 0x07)) { | ||
894 | /* yes it is Bank0 */ | ||
895 | if (((!(val1 & 0x80)) && (val2 != 0xa3)) || | ||
896 | ((val1 & 0x80) && (val2 != 0x5c))) { | ||
897 | dev_dbg(dev, "Detection failed at step 2\n"); | ||
898 | goto error1; | ||
899 | } | ||
900 | } | ||
901 | /* If Winbond chip, address of chip and W83791D_REG_I2C_ADDR | ||
902 | should match */ | ||
903 | if (w83791d_read(client, W83791D_REG_I2C_ADDR) != address) { | ||
904 | dev_dbg(dev, "Detection failed at step 3\n"); | ||
905 | goto error1; | ||
906 | } | ||
907 | } | ||
908 | |||
909 | /* We either have a force parameter or we have reason to | ||
910 | believe it is a Winbond chip. Either way, we want bank 0 and | ||
911 | Vendor ID high byte */ | ||
912 | val1 = w83791d_read(client, W83791D_REG_BANK) & 0x78; | ||
913 | w83791d_write(client, W83791D_REG_BANK, val1 | 0x80); | ||
914 | |||
915 | /* Verify it is a Winbond w83791d */ | ||
916 | if (kind <= 0) { | ||
917 | /* get vendor ID */ | ||
918 | val2 = w83791d_read(client, W83791D_REG_CHIPMAN); | ||
919 | if (val2 != 0x5c) { /* the vendor is NOT Winbond */ | ||
920 | dev_dbg(dev, "Detection failed at step 4\n"); | ||
921 | goto error1; | ||
922 | } | ||
923 | val1 = w83791d_read(client, W83791D_REG_WCHIPID); | ||
924 | if (val1 == 0x71) { | ||
925 | kind = w83791d; | ||
926 | } else { | ||
927 | if (kind == 0) | ||
928 | dev_warn(dev, | ||
929 | "w83791d: Ignoring 'force' parameter " | ||
930 | "for unknown chip at adapter %d, " | ||
931 | "address 0x%02x\n", | ||
932 | i2c_adapter_id(adapter), address); | ||
933 | goto error1; | ||
934 | } | ||
935 | } | ||
936 | |||
937 | if (kind == w83791d) { | ||
938 | client_name = "w83791d"; | ||
939 | } else { | ||
940 | dev_err(dev, "w83791d: Internal error: unknown kind (%d)?!?", | ||
941 | kind); | ||
942 | goto error1; | ||
943 | } | ||
944 | |||
945 | #ifdef DEBUG | ||
946 | val1 = w83791d_read(client, W83791D_REG_DID_VID4); | ||
947 | dev_dbg(dev, "Device ID version: %d.%d (0x%02x)\n", | ||
948 | (val1 >> 5) & 0x07, (val1 >> 1) & 0x0f, val1); | ||
949 | #endif | ||
950 | |||
951 | /* Fill in the remaining client fields and put into the global list */ | ||
952 | strlcpy(client->name, client_name, I2C_NAME_SIZE); | ||
953 | |||
954 | /* Tell the I2C layer a new client has arrived */ | ||
955 | if ((err = i2c_attach_client(client))) | ||
956 | goto error1; | ||
957 | |||
958 | if ((err = w83791d_detect_subclients(adapter, address, kind, client))) | ||
959 | goto error2; | ||
960 | |||
961 | /* Initialize the chip */ | ||
962 | w83791d_init_client(client); | ||
963 | |||
964 | /* If the fan_div is changed, make sure there is a rational | ||
965 | fan_min in place */ | ||
966 | for (i = 0; i < NUMBER_OF_FANIN; i++) { | ||
967 | data->fan_min[i] = w83791d_read(client, W83791D_REG_FAN_MIN[i]); | ||
968 | } | ||
969 | |||
970 | /* Register sysfs hooks */ | ||
971 | data->class_dev = hwmon_device_register(dev); | ||
972 | if (IS_ERR(data->class_dev)) { | ||
973 | err = PTR_ERR(data->class_dev); | ||
974 | goto error3; | ||
975 | } | ||
976 | |||
977 | for (i = 0; i < NUMBER_OF_VIN; i++) { | ||
978 | device_create_file(dev, &sda_in_input[i].dev_attr); | ||
979 | device_create_file(dev, &sda_in_min[i].dev_attr); | ||
980 | device_create_file(dev, &sda_in_max[i].dev_attr); | ||
981 | } | ||
982 | |||
983 | for (i = 0; i < NUMBER_OF_FANIN; i++) { | ||
984 | device_create_file(dev, &sda_fan_input[i].dev_attr); | ||
985 | device_create_file(dev, &sda_fan_div[i].dev_attr); | ||
986 | device_create_file(dev, &sda_fan_min[i].dev_attr); | ||
987 | } | ||
988 | |||
989 | for (i = 0; i < NUMBER_OF_TEMPIN; i++) { | ||
990 | device_create_file(dev, &sda_temp_input[i].dev_attr); | ||
991 | device_create_file(dev, &sda_temp_max[i].dev_attr); | ||
992 | device_create_file(dev, &sda_temp_max_hyst[i].dev_attr); | ||
993 | } | ||
994 | |||
995 | device_create_file(dev, &dev_attr_alarms); | ||
996 | |||
997 | for (i = 0; i < ARRAY_SIZE(sda_beep_ctrl); i++) { | ||
998 | device_create_file(dev, &sda_beep_ctrl[i].dev_attr); | ||
999 | } | ||
1000 | |||
1001 | device_create_file(dev, &dev_attr_cpu0_vid); | ||
1002 | device_create_file(dev, &dev_attr_vrm); | ||
1003 | |||
1004 | return 0; | ||
1005 | |||
1006 | error3: | ||
1007 | if (data->lm75[0] != NULL) { | ||
1008 | i2c_detach_client(data->lm75[0]); | ||
1009 | kfree(data->lm75[0]); | ||
1010 | } | ||
1011 | if (data->lm75[1] != NULL) { | ||
1012 | i2c_detach_client(data->lm75[1]); | ||
1013 | kfree(data->lm75[1]); | ||
1014 | } | ||
1015 | error2: | ||
1016 | i2c_detach_client(client); | ||
1017 | error1: | ||
1018 | kfree(data); | ||
1019 | error0: | ||
1020 | return err; | ||
1021 | } | ||
1022 | |||
1023 | static int w83791d_detach_client(struct i2c_client *client) | ||
1024 | { | ||
1025 | struct w83791d_data *data = i2c_get_clientdata(client); | ||
1026 | int err; | ||
1027 | |||
1028 | /* main client */ | ||
1029 | if (data) | ||
1030 | hwmon_device_unregister(data->class_dev); | ||
1031 | |||
1032 | if ((err = i2c_detach_client(client))) | ||
1033 | return err; | ||
1034 | |||
1035 | /* main client */ | ||
1036 | if (data) | ||
1037 | kfree(data); | ||
1038 | /* subclient */ | ||
1039 | else | ||
1040 | kfree(client); | ||
1041 | |||
1042 | return 0; | ||
1043 | } | ||
1044 | |||
1045 | static void w83791d_init_client(struct i2c_client *client) | ||
1046 | { | ||
1047 | struct w83791d_data *data = i2c_get_clientdata(client); | ||
1048 | u8 tmp; | ||
1049 | u8 old_beep; | ||
1050 | |||
1051 | /* The difference between reset and init is that reset | ||
1052 | does a hard reset of the chip via index 0x40, bit 7, | ||
1053 | but init simply forces certain registers to have "sane" | ||
1054 | values. The hope is that the BIOS has done the right | ||
1055 | thing (which is why the default is reset=0, init=0), | ||
1056 | but if not, reset is the hard hammer and init | ||
1057 | is the soft mallet both of which are trying to whack | ||
1058 | things into place... | ||
1059 | NOTE: The data sheet makes a distinction between | ||
1060 | "power on defaults" and "reset by MR". As far as I can tell, | ||
1061 | the hard reset puts everything into a power-on state so I'm | ||
1062 | not sure what "reset by MR" means or how it can happen. | ||
1063 | */ | ||
1064 | if (reset || init) { | ||
1065 | /* keep some BIOS settings when we... */ | ||
1066 | old_beep = w83791d_read(client, W83791D_REG_BEEP_CONFIG); | ||
1067 | |||
1068 | if (reset) { | ||
1069 | /* ... reset the chip and ... */ | ||
1070 | w83791d_write(client, W83791D_REG_CONFIG, 0x80); | ||
1071 | } | ||
1072 | |||
1073 | /* ... disable power-on abnormal beep */ | ||
1074 | w83791d_write(client, W83791D_REG_BEEP_CONFIG, old_beep | 0x80); | ||
1075 | |||
1076 | /* disable the global beep (not done by hard reset) */ | ||
1077 | tmp = w83791d_read(client, W83791D_REG_BEEP_CTRL[1]); | ||
1078 | w83791d_write(client, W83791D_REG_BEEP_CTRL[1], tmp & 0xef); | ||
1079 | |||
1080 | if (init) { | ||
1081 | /* Make sure monitoring is turned on for add-ons */ | ||
1082 | tmp = w83791d_read(client, W83791D_REG_TEMP2_CONFIG); | ||
1083 | if (tmp & 1) { | ||
1084 | w83791d_write(client, W83791D_REG_TEMP2_CONFIG, | ||
1085 | tmp & 0xfe); | ||
1086 | } | ||
1087 | |||
1088 | tmp = w83791d_read(client, W83791D_REG_TEMP3_CONFIG); | ||
1089 | if (tmp & 1) { | ||
1090 | w83791d_write(client, W83791D_REG_TEMP3_CONFIG, | ||
1091 | tmp & 0xfe); | ||
1092 | } | ||
1093 | |||
1094 | /* Start monitoring */ | ||
1095 | tmp = w83791d_read(client, W83791D_REG_CONFIG) & 0xf7; | ||
1096 | w83791d_write(client, W83791D_REG_CONFIG, tmp | 0x01); | ||
1097 | } | ||
1098 | } | ||
1099 | |||
1100 | data->vrm = vid_which_vrm(); | ||
1101 | } | ||
1102 | |||
1103 | static struct w83791d_data *w83791d_update_device(struct device *dev) | ||
1104 | { | ||
1105 | struct i2c_client *client = to_i2c_client(dev); | ||
1106 | struct w83791d_data *data = i2c_get_clientdata(client); | ||
1107 | int i, j; | ||
1108 | u8 reg_array_tmp[3]; | ||
1109 | |||
1110 | mutex_lock(&data->update_lock); | ||
1111 | |||
1112 | if (time_after(jiffies, data->last_updated + (HZ * 3)) | ||
1113 | || !data->valid) { | ||
1114 | dev_dbg(dev, "Starting w83791d device update\n"); | ||
1115 | |||
1116 | /* Update the voltages measured value and limits */ | ||
1117 | for (i = 0; i < NUMBER_OF_VIN; i++) { | ||
1118 | data->in[i] = w83791d_read(client, | ||
1119 | W83791D_REG_IN[i]); | ||
1120 | data->in_max[i] = w83791d_read(client, | ||
1121 | W83791D_REG_IN_MAX[i]); | ||
1122 | data->in_min[i] = w83791d_read(client, | ||
1123 | W83791D_REG_IN_MIN[i]); | ||
1124 | } | ||
1125 | |||
1126 | /* Update the fan counts and limits */ | ||
1127 | for (i = 0; i < NUMBER_OF_FANIN; i++) { | ||
1128 | /* Update the Fan measured value and limits */ | ||
1129 | data->fan[i] = w83791d_read(client, | ||
1130 | W83791D_REG_FAN[i]); | ||
1131 | data->fan_min[i] = w83791d_read(client, | ||
1132 | W83791D_REG_FAN_MIN[i]); | ||
1133 | } | ||
1134 | |||
1135 | /* Update the fan divisor */ | ||
1136 | for (i = 0; i < 3; i++) { | ||
1137 | reg_array_tmp[i] = w83791d_read(client, | ||
1138 | W83791D_REG_FAN_DIV[i]); | ||
1139 | } | ||
1140 | data->fan_div[0] = (reg_array_tmp[0] >> 4) & 0x03; | ||
1141 | data->fan_div[1] = (reg_array_tmp[0] >> 6) & 0x03; | ||
1142 | data->fan_div[2] = (reg_array_tmp[1] >> 6) & 0x03; | ||
1143 | data->fan_div[3] = reg_array_tmp[2] & 0x07; | ||
1144 | data->fan_div[4] = (reg_array_tmp[2] >> 4) & 0x07; | ||
1145 | |||
1146 | /* Update the first temperature sensor */ | ||
1147 | for (i = 0; i < 3; i++) { | ||
1148 | data->temp1[i] = w83791d_read(client, | ||
1149 | W83791D_REG_TEMP1[i]); | ||
1150 | } | ||
1151 | |||
1152 | /* Update the rest of the temperature sensors */ | ||
1153 | for (i = 0; i < 2; i++) { | ||
1154 | for (j = 0; j < 3; j++) { | ||
1155 | data->temp_add[i][j] = | ||
1156 | (w83791d_read(client, | ||
1157 | W83791D_REG_TEMP_ADD[i][j * 2]) << 8) | | ||
1158 | w83791d_read(client, | ||
1159 | W83791D_REG_TEMP_ADD[i][j * 2 + 1]); | ||
1160 | } | ||
1161 | } | ||
1162 | |||
1163 | /* Update the realtime status */ | ||
1164 | data->alarms = | ||
1165 | w83791d_read(client, W83791D_REG_ALARM1) + | ||
1166 | (w83791d_read(client, W83791D_REG_ALARM2) << 8) + | ||
1167 | (w83791d_read(client, W83791D_REG_ALARM3) << 16); | ||
1168 | |||
1169 | /* Update the beep configuration information */ | ||
1170 | data->beep_mask = | ||
1171 | w83791d_read(client, W83791D_REG_BEEP_CTRL[0]) + | ||
1172 | (w83791d_read(client, W83791D_REG_BEEP_CTRL[1]) << 8) + | ||
1173 | (w83791d_read(client, W83791D_REG_BEEP_CTRL[2]) << 16); | ||
1174 | |||
1175 | data->beep_enable = | ||
1176 | (data->beep_mask >> GLOBAL_BEEP_ENABLE_SHIFT) & 0x01; | ||
1177 | |||
1178 | /* Update the cpu voltage information */ | ||
1179 | i = w83791d_read(client, W83791D_REG_VID_FANDIV); | ||
1180 | data->vid = i & 0x0f; | ||
1181 | data->vid |= (w83791d_read(client, W83791D_REG_DID_VID4) & 0x01) | ||
1182 | << 4; | ||
1183 | |||
1184 | data->last_updated = jiffies; | ||
1185 | data->valid = 1; | ||
1186 | } | ||
1187 | |||
1188 | mutex_unlock(&data->update_lock); | ||
1189 | |||
1190 | #ifdef DEBUG | ||
1191 | w83791d_print_debug(data, dev); | ||
1192 | #endif | ||
1193 | |||
1194 | return data; | ||
1195 | } | ||
1196 | |||
1197 | #ifdef DEBUG | ||
1198 | static void w83791d_print_debug(struct w83791d_data *data, struct device *dev) | ||
1199 | { | ||
1200 | int i = 0, j = 0; | ||
1201 | |||
1202 | dev_dbg(dev, "======Start of w83791d debug values======\n"); | ||
1203 | dev_dbg(dev, "%d set of Voltages: ===>\n", NUMBER_OF_VIN); | ||
1204 | for (i = 0; i < NUMBER_OF_VIN; i++) { | ||
1205 | dev_dbg(dev, "vin[%d] is: 0x%02x\n", i, data->in[i]); | ||
1206 | dev_dbg(dev, "vin[%d] min is: 0x%02x\n", i, data->in_min[i]); | ||
1207 | dev_dbg(dev, "vin[%d] max is: 0x%02x\n", i, data->in_max[i]); | ||
1208 | } | ||
1209 | dev_dbg(dev, "%d set of Fan Counts/Divisors: ===>\n", NUMBER_OF_FANIN); | ||
1210 | for (i = 0; i < NUMBER_OF_FANIN; i++) { | ||
1211 | dev_dbg(dev, "fan[%d] is: 0x%02x\n", i, data->fan[i]); | ||
1212 | dev_dbg(dev, "fan[%d] min is: 0x%02x\n", i, data->fan_min[i]); | ||
1213 | dev_dbg(dev, "fan_div[%d] is: 0x%02x\n", i, data->fan_div[i]); | ||
1214 | } | ||
1215 | |||
1216 | /* temperature math is signed, but only print out the | ||
1217 | bits that matter */ | ||
1218 | dev_dbg(dev, "%d set of Temperatures: ===>\n", NUMBER_OF_TEMPIN); | ||
1219 | for (i = 0; i < 3; i++) { | ||
1220 | dev_dbg(dev, "temp1[%d] is: 0x%02x\n", i, (u8) data->temp1[i]); | ||
1221 | } | ||
1222 | for (i = 0; i < 2; i++) { | ||
1223 | for (j = 0; j < 3; j++) { | ||
1224 | dev_dbg(dev, "temp_add[%d][%d] is: 0x%04x\n", i, j, | ||
1225 | (u16) data->temp_add[i][j]); | ||
1226 | } | ||
1227 | } | ||
1228 | |||
1229 | dev_dbg(dev, "Misc Information: ===>\n"); | ||
1230 | dev_dbg(dev, "alarm is: 0x%08x\n", data->alarms); | ||
1231 | dev_dbg(dev, "beep_mask is: 0x%08x\n", data->beep_mask); | ||
1232 | dev_dbg(dev, "beep_enable is: %d\n", data->beep_enable); | ||
1233 | dev_dbg(dev, "vid is: 0x%02x\n", data->vid); | ||
1234 | dev_dbg(dev, "vrm is: 0x%02x\n", data->vrm); | ||
1235 | dev_dbg(dev, "=======End of w83791d debug values========\n"); | ||
1236 | dev_dbg(dev, "\n"); | ||
1237 | } | ||
1238 | #endif | ||
1239 | |||
1240 | static int __init sensors_w83791d_init(void) | ||
1241 | { | ||
1242 | return i2c_add_driver(&w83791d_driver); | ||
1243 | } | ||
1244 | |||
1245 | static void __exit sensors_w83791d_exit(void) | ||
1246 | { | ||
1247 | i2c_del_driver(&w83791d_driver); | ||
1248 | } | ||
1249 | |||
1250 | MODULE_AUTHOR("Charles Spirakis <bezaur@gmail.com>"); | ||
1251 | MODULE_DESCRIPTION("W83791D driver"); | ||
1252 | MODULE_LICENSE("GPL"); | ||
1253 | |||
1254 | module_init(sensors_w83791d_init); | ||
1255 | module_exit(sensors_w83791d_exit); | ||
diff --git a/drivers/hwmon/w83792d.c b/drivers/hwmon/w83792d.c index 958602e28412..4ef884c216e2 100644 --- a/drivers/hwmon/w83792d.c +++ b/drivers/hwmon/w83792d.c | |||
@@ -250,8 +250,6 @@ FAN_TO_REG(long rpm, int div) | |||
250 | : (val)) / 1000, 0, 0xff)) | 250 | : (val)) / 1000, 0, 0xff)) |
251 | #define TEMP_ADD_TO_REG_LOW(val) ((val%1000) ? 0x80 : 0x00) | 251 | #define TEMP_ADD_TO_REG_LOW(val) ((val%1000) ? 0x80 : 0x00) |
252 | 252 | ||
253 | #define PWM_FROM_REG(val) (val) | ||
254 | #define PWM_TO_REG(val) (SENSORS_LIMIT((val),0,255)) | ||
255 | #define DIV_FROM_REG(val) (1 << (val)) | 253 | #define DIV_FROM_REG(val) (1 << (val)) |
256 | 254 | ||
257 | static inline u8 | 255 | static inline u8 |
@@ -291,7 +289,6 @@ struct w83792d_data { | |||
291 | u8 pwm[7]; /* We only consider the first 3 set of pwm, | 289 | u8 pwm[7]; /* We only consider the first 3 set of pwm, |
292 | although 792 chip has 7 set of pwm. */ | 290 | although 792 chip has 7 set of pwm. */ |
293 | u8 pwmenable[3]; | 291 | u8 pwmenable[3]; |
294 | u8 pwm_mode[7]; /* indicates PWM or DC mode: 1->PWM; 0->DC */ | ||
295 | u32 alarms; /* realtime status register encoding,combined */ | 292 | u32 alarms; /* realtime status register encoding,combined */ |
296 | u8 chassis; /* Chassis status */ | 293 | u8 chassis; /* Chassis status */ |
297 | u8 chassis_clear; /* CLR_CHS, clear chassis intrusion detection */ | 294 | u8 chassis_clear; /* CLR_CHS, clear chassis intrusion detection */ |
@@ -375,8 +372,10 @@ static ssize_t store_in_##reg (struct device *dev, \ | |||
375 | u32 val; \ | 372 | u32 val; \ |
376 | \ | 373 | \ |
377 | val = simple_strtoul(buf, NULL, 10); \ | 374 | val = simple_strtoul(buf, NULL, 10); \ |
375 | mutex_lock(&data->update_lock); \ | ||
378 | data->in_##reg[nr] = SENSORS_LIMIT(IN_TO_REG(nr, val)/4, 0, 255); \ | 376 | data->in_##reg[nr] = SENSORS_LIMIT(IN_TO_REG(nr, val)/4, 0, 255); \ |
379 | w83792d_write_value(client, W83792D_REG_IN_##REG[nr], data->in_##reg[nr]); \ | 377 | w83792d_write_value(client, W83792D_REG_IN_##REG[nr], data->in_##reg[nr]); \ |
378 | mutex_unlock(&data->update_lock); \ | ||
380 | \ | 379 | \ |
381 | return count; \ | 380 | return count; \ |
382 | } | 381 | } |
@@ -443,9 +442,11 @@ store_fan_min(struct device *dev, struct device_attribute *attr, | |||
443 | u32 val; | 442 | u32 val; |
444 | 443 | ||
445 | val = simple_strtoul(buf, NULL, 10); | 444 | val = simple_strtoul(buf, NULL, 10); |
445 | mutex_lock(&data->update_lock); | ||
446 | data->fan_min[nr] = FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr])); | 446 | data->fan_min[nr] = FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr])); |
447 | w83792d_write_value(client, W83792D_REG_FAN_MIN[nr], | 447 | w83792d_write_value(client, W83792D_REG_FAN_MIN[nr], |
448 | data->fan_min[nr]); | 448 | data->fan_min[nr]); |
449 | mutex_unlock(&data->update_lock); | ||
449 | 450 | ||
450 | return count; | 451 | return count; |
451 | } | 452 | } |
@@ -478,6 +479,7 @@ store_fan_div(struct device *dev, struct device_attribute *attr, | |||
478 | u8 tmp_fan_div; | 479 | u8 tmp_fan_div; |
479 | 480 | ||
480 | /* Save fan_min */ | 481 | /* Save fan_min */ |
482 | mutex_lock(&data->update_lock); | ||
481 | min = FAN_FROM_REG(data->fan_min[nr], | 483 | min = FAN_FROM_REG(data->fan_min[nr], |
482 | DIV_FROM_REG(data->fan_div[nr])); | 484 | DIV_FROM_REG(data->fan_div[nr])); |
483 | 485 | ||
@@ -493,6 +495,7 @@ store_fan_div(struct device *dev, struct device_attribute *attr, | |||
493 | /* Restore fan_min */ | 495 | /* Restore fan_min */ |
494 | data->fan_min[nr] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr])); | 496 | data->fan_min[nr] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr])); |
495 | w83792d_write_value(client, W83792D_REG_FAN_MIN[nr], data->fan_min[nr]); | 497 | w83792d_write_value(client, W83792D_REG_FAN_MIN[nr], data->fan_min[nr]); |
498 | mutex_unlock(&data->update_lock); | ||
496 | 499 | ||
497 | return count; | 500 | return count; |
498 | } | 501 | } |
@@ -547,10 +550,11 @@ static ssize_t store_temp1(struct device *dev, struct device_attribute *attr, | |||
547 | s32 val; | 550 | s32 val; |
548 | 551 | ||
549 | val = simple_strtol(buf, NULL, 10); | 552 | val = simple_strtol(buf, NULL, 10); |
550 | 553 | mutex_lock(&data->update_lock); | |
551 | data->temp1[nr] = TEMP1_TO_REG(val); | 554 | data->temp1[nr] = TEMP1_TO_REG(val); |
552 | w83792d_write_value(client, W83792D_REG_TEMP1[nr], | 555 | w83792d_write_value(client, W83792D_REG_TEMP1[nr], |
553 | data->temp1[nr]); | 556 | data->temp1[nr]); |
557 | mutex_unlock(&data->update_lock); | ||
554 | 558 | ||
555 | return count; | 559 | return count; |
556 | } | 560 | } |
@@ -580,13 +584,14 @@ static ssize_t store_temp23(struct device *dev, struct device_attribute *attr, | |||
580 | s32 val; | 584 | s32 val; |
581 | 585 | ||
582 | val = simple_strtol(buf, NULL, 10); | 586 | val = simple_strtol(buf, NULL, 10); |
583 | 587 | mutex_lock(&data->update_lock); | |
584 | data->temp_add[nr][index] = TEMP_ADD_TO_REG_HIGH(val); | 588 | data->temp_add[nr][index] = TEMP_ADD_TO_REG_HIGH(val); |
585 | data->temp_add[nr][index+1] = TEMP_ADD_TO_REG_LOW(val); | 589 | data->temp_add[nr][index+1] = TEMP_ADD_TO_REG_LOW(val); |
586 | w83792d_write_value(client, W83792D_REG_TEMP_ADD[nr][index], | 590 | w83792d_write_value(client, W83792D_REG_TEMP_ADD[nr][index], |
587 | data->temp_add[nr][index]); | 591 | data->temp_add[nr][index]); |
588 | w83792d_write_value(client, W83792D_REG_TEMP_ADD[nr][index+1], | 592 | w83792d_write_value(client, W83792D_REG_TEMP_ADD[nr][index+1], |
589 | data->temp_add[nr][index+1]); | 593 | data->temp_add[nr][index+1]); |
594 | mutex_unlock(&data->update_lock); | ||
590 | 595 | ||
591 | return count; | 596 | return count; |
592 | } | 597 | } |
@@ -627,7 +632,7 @@ show_pwm(struct device *dev, struct device_attribute *attr, | |||
627 | struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); | 632 | struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); |
628 | int nr = sensor_attr->index; | 633 | int nr = sensor_attr->index; |
629 | struct w83792d_data *data = w83792d_update_device(dev); | 634 | struct w83792d_data *data = w83792d_update_device(dev); |
630 | return sprintf(buf, "%ld\n", (long) PWM_FROM_REG(data->pwm[nr-1])); | 635 | return sprintf(buf, "%d\n", (data->pwm[nr] & 0x0f) << 4); |
631 | } | 636 | } |
632 | 637 | ||
633 | static ssize_t | 638 | static ssize_t |
@@ -659,14 +664,16 @@ store_pwm(struct device *dev, struct device_attribute *attr, | |||
659 | const char *buf, size_t count) | 664 | const char *buf, size_t count) |
660 | { | 665 | { |
661 | struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); | 666 | struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); |
662 | int nr = sensor_attr->index - 1; | 667 | int nr = sensor_attr->index; |
663 | struct i2c_client *client = to_i2c_client(dev); | 668 | struct i2c_client *client = to_i2c_client(dev); |
664 | struct w83792d_data *data = i2c_get_clientdata(client); | 669 | struct w83792d_data *data = i2c_get_clientdata(client); |
665 | u32 val; | 670 | u8 val = SENSORS_LIMIT(simple_strtoul(buf, NULL, 10), 0, 255) >> 4; |
666 | 671 | ||
667 | val = simple_strtoul(buf, NULL, 10); | 672 | mutex_lock(&data->update_lock); |
668 | data->pwm[nr] = PWM_TO_REG(val); | 673 | val |= w83792d_read_value(client, W83792D_REG_PWM[nr]) & 0xf0; |
674 | data->pwm[nr] = val; | ||
669 | w83792d_write_value(client, W83792D_REG_PWM[nr], data->pwm[nr]); | 675 | w83792d_write_value(client, W83792D_REG_PWM[nr], data->pwm[nr]); |
676 | mutex_unlock(&data->update_lock); | ||
670 | 677 | ||
671 | return count; | 678 | return count; |
672 | } | 679 | } |
@@ -683,6 +690,10 @@ store_pwmenable(struct device *dev, struct device_attribute *attr, | |||
683 | u8 fan_cfg_tmp, cfg1_tmp, cfg2_tmp, cfg3_tmp, cfg4_tmp; | 690 | u8 fan_cfg_tmp, cfg1_tmp, cfg2_tmp, cfg3_tmp, cfg4_tmp; |
684 | 691 | ||
685 | val = simple_strtoul(buf, NULL, 10); | 692 | val = simple_strtoul(buf, NULL, 10); |
693 | if (val < 1 || val > 3) | ||
694 | return -EINVAL; | ||
695 | |||
696 | mutex_lock(&data->update_lock); | ||
686 | switch (val) { | 697 | switch (val) { |
687 | case 1: | 698 | case 1: |
688 | data->pwmenable[nr] = 0; /* manual mode */ | 699 | data->pwmenable[nr] = 0; /* manual mode */ |
@@ -693,8 +704,6 @@ store_pwmenable(struct device *dev, struct device_attribute *attr, | |||
693 | case 3: | 704 | case 3: |
694 | data->pwmenable[nr] = 1; /* thermal cruise/Smart Fan I */ | 705 | data->pwmenable[nr] = 1; /* thermal cruise/Smart Fan I */ |
695 | break; | 706 | break; |
696 | default: | ||
697 | return -EINVAL; | ||
698 | } | 707 | } |
699 | cfg1_tmp = data->pwmenable[0]; | 708 | cfg1_tmp = data->pwmenable[0]; |
700 | cfg2_tmp = (data->pwmenable[1]) << 2; | 709 | cfg2_tmp = (data->pwmenable[1]) << 2; |
@@ -702,14 +711,15 @@ store_pwmenable(struct device *dev, struct device_attribute *attr, | |||
702 | cfg4_tmp = w83792d_read_value(client,W83792D_REG_FAN_CFG) & 0xc0; | 711 | cfg4_tmp = w83792d_read_value(client,W83792D_REG_FAN_CFG) & 0xc0; |
703 | fan_cfg_tmp = ((cfg4_tmp | cfg3_tmp) | cfg2_tmp) | cfg1_tmp; | 712 | fan_cfg_tmp = ((cfg4_tmp | cfg3_tmp) | cfg2_tmp) | cfg1_tmp; |
704 | w83792d_write_value(client, W83792D_REG_FAN_CFG, fan_cfg_tmp); | 713 | w83792d_write_value(client, W83792D_REG_FAN_CFG, fan_cfg_tmp); |
714 | mutex_unlock(&data->update_lock); | ||
705 | 715 | ||
706 | return count; | 716 | return count; |
707 | } | 717 | } |
708 | 718 | ||
709 | static struct sensor_device_attribute sda_pwm[] = { | 719 | static struct sensor_device_attribute sda_pwm[] = { |
710 | SENSOR_ATTR(pwm1, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 1), | 720 | SENSOR_ATTR(pwm1, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0), |
711 | SENSOR_ATTR(pwm2, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 2), | 721 | SENSOR_ATTR(pwm2, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 1), |
712 | SENSOR_ATTR(pwm3, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 3), | 722 | SENSOR_ATTR(pwm3, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 2), |
713 | }; | 723 | }; |
714 | static struct sensor_device_attribute sda_pwm_enable[] = { | 724 | static struct sensor_device_attribute sda_pwm_enable[] = { |
715 | SENSOR_ATTR(pwm1_enable, S_IWUSR | S_IRUGO, | 725 | SENSOR_ATTR(pwm1_enable, S_IWUSR | S_IRUGO, |
@@ -728,7 +738,7 @@ show_pwm_mode(struct device *dev, struct device_attribute *attr, | |||
728 | struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); | 738 | struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); |
729 | int nr = sensor_attr->index; | 739 | int nr = sensor_attr->index; |
730 | struct w83792d_data *data = w83792d_update_device(dev); | 740 | struct w83792d_data *data = w83792d_update_device(dev); |
731 | return sprintf(buf, "%d\n", data->pwm_mode[nr-1]); | 741 | return sprintf(buf, "%d\n", data->pwm[nr] >> 7); |
732 | } | 742 | } |
733 | 743 | ||
734 | static ssize_t | 744 | static ssize_t |
@@ -736,29 +746,35 @@ store_pwm_mode(struct device *dev, struct device_attribute *attr, | |||
736 | const char *buf, size_t count) | 746 | const char *buf, size_t count) |
737 | { | 747 | { |
738 | struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); | 748 | struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); |
739 | int nr = sensor_attr->index - 1; | 749 | int nr = sensor_attr->index; |
740 | struct i2c_client *client = to_i2c_client(dev); | 750 | struct i2c_client *client = to_i2c_client(dev); |
741 | struct w83792d_data *data = i2c_get_clientdata(client); | 751 | struct w83792d_data *data = i2c_get_clientdata(client); |
742 | u32 val; | 752 | u32 val; |
743 | u8 pwm_mode_mask = 0; | ||
744 | 753 | ||
745 | val = simple_strtoul(buf, NULL, 10); | 754 | val = simple_strtoul(buf, NULL, 10); |
746 | data->pwm_mode[nr] = SENSORS_LIMIT(val, 0, 1); | 755 | if (val != 0 && val != 1) |
747 | pwm_mode_mask = w83792d_read_value(client, | 756 | return -EINVAL; |
748 | W83792D_REG_PWM[nr]) & 0x7f; | 757 | |
749 | w83792d_write_value(client, W83792D_REG_PWM[nr], | 758 | mutex_lock(&data->update_lock); |
750 | ((data->pwm_mode[nr]) << 7) | pwm_mode_mask); | 759 | data->pwm[nr] = w83792d_read_value(client, W83792D_REG_PWM[nr]); |
760 | if (val) { /* PWM mode */ | ||
761 | data->pwm[nr] |= 0x80; | ||
762 | } else { /* DC mode */ | ||
763 | data->pwm[nr] &= 0x7f; | ||
764 | } | ||
765 | w83792d_write_value(client, W83792D_REG_PWM[nr], data->pwm[nr]); | ||
766 | mutex_unlock(&data->update_lock); | ||
751 | 767 | ||
752 | return count; | 768 | return count; |
753 | } | 769 | } |
754 | 770 | ||
755 | static struct sensor_device_attribute sda_pwm_mode[] = { | 771 | static struct sensor_device_attribute sda_pwm_mode[] = { |
756 | SENSOR_ATTR(pwm1_mode, S_IWUSR | S_IRUGO, | 772 | SENSOR_ATTR(pwm1_mode, S_IWUSR | S_IRUGO, |
757 | show_pwm_mode, store_pwm_mode, 1), | 773 | show_pwm_mode, store_pwm_mode, 0), |
758 | SENSOR_ATTR(pwm2_mode, S_IWUSR | S_IRUGO, | 774 | SENSOR_ATTR(pwm2_mode, S_IWUSR | S_IRUGO, |
759 | show_pwm_mode, store_pwm_mode, 2), | 775 | show_pwm_mode, store_pwm_mode, 1), |
760 | SENSOR_ATTR(pwm3_mode, S_IWUSR | S_IRUGO, | 776 | SENSOR_ATTR(pwm3_mode, S_IWUSR | S_IRUGO, |
761 | show_pwm_mode, store_pwm_mode, 3), | 777 | show_pwm_mode, store_pwm_mode, 2), |
762 | }; | 778 | }; |
763 | 779 | ||
764 | 780 | ||
@@ -789,12 +805,13 @@ store_chassis_clear(struct device *dev, struct device_attribute *attr, | |||
789 | u8 temp1 = 0, temp2 = 0; | 805 | u8 temp1 = 0, temp2 = 0; |
790 | 806 | ||
791 | val = simple_strtoul(buf, NULL, 10); | 807 | val = simple_strtoul(buf, NULL, 10); |
792 | 808 | mutex_lock(&data->update_lock); | |
793 | data->chassis_clear = SENSORS_LIMIT(val, 0 ,1); | 809 | data->chassis_clear = SENSORS_LIMIT(val, 0 ,1); |
794 | temp1 = ((data->chassis_clear) << 7) & 0x80; | 810 | temp1 = ((data->chassis_clear) << 7) & 0x80; |
795 | temp2 = w83792d_read_value(client, | 811 | temp2 = w83792d_read_value(client, |
796 | W83792D_REG_CHASSIS_CLR) & 0x7f; | 812 | W83792D_REG_CHASSIS_CLR) & 0x7f; |
797 | w83792d_write_value(client, W83792D_REG_CHASSIS_CLR, temp1 | temp2); | 813 | w83792d_write_value(client, W83792D_REG_CHASSIS_CLR, temp1 | temp2); |
814 | mutex_unlock(&data->update_lock); | ||
798 | 815 | ||
799 | return count; | 816 | return count; |
800 | } | 817 | } |
@@ -827,10 +844,12 @@ store_thermal_cruise(struct device *dev, struct device_attribute *attr, | |||
827 | val = simple_strtoul(buf, NULL, 10); | 844 | val = simple_strtoul(buf, NULL, 10); |
828 | target_tmp = val; | 845 | target_tmp = val; |
829 | target_tmp = target_tmp & 0x7f; | 846 | target_tmp = target_tmp & 0x7f; |
847 | mutex_lock(&data->update_lock); | ||
830 | target_mask = w83792d_read_value(client, W83792D_REG_THERMAL[nr]) & 0x80; | 848 | target_mask = w83792d_read_value(client, W83792D_REG_THERMAL[nr]) & 0x80; |
831 | data->thermal_cruise[nr] = SENSORS_LIMIT(target_tmp, 0, 255); | 849 | data->thermal_cruise[nr] = SENSORS_LIMIT(target_tmp, 0, 255); |
832 | w83792d_write_value(client, W83792D_REG_THERMAL[nr], | 850 | w83792d_write_value(client, W83792D_REG_THERMAL[nr], |
833 | (data->thermal_cruise[nr]) | target_mask); | 851 | (data->thermal_cruise[nr]) | target_mask); |
852 | mutex_unlock(&data->update_lock); | ||
834 | 853 | ||
835 | return count; | 854 | return count; |
836 | } | 855 | } |
@@ -867,6 +886,7 @@ store_tolerance(struct device *dev, struct device_attribute *attr, | |||
867 | u8 tol_tmp, tol_mask; | 886 | u8 tol_tmp, tol_mask; |
868 | 887 | ||
869 | val = simple_strtoul(buf, NULL, 10); | 888 | val = simple_strtoul(buf, NULL, 10); |
889 | mutex_lock(&data->update_lock); | ||
870 | tol_mask = w83792d_read_value(client, | 890 | tol_mask = w83792d_read_value(client, |
871 | W83792D_REG_TOLERANCE[nr]) & ((nr == 1) ? 0x0f : 0xf0); | 891 | W83792D_REG_TOLERANCE[nr]) & ((nr == 1) ? 0x0f : 0xf0); |
872 | tol_tmp = SENSORS_LIMIT(val, 0, 15); | 892 | tol_tmp = SENSORS_LIMIT(val, 0, 15); |
@@ -877,6 +897,7 @@ store_tolerance(struct device *dev, struct device_attribute *attr, | |||
877 | } | 897 | } |
878 | w83792d_write_value(client, W83792D_REG_TOLERANCE[nr], | 898 | w83792d_write_value(client, W83792D_REG_TOLERANCE[nr], |
879 | tol_mask | tol_tmp); | 899 | tol_mask | tol_tmp); |
900 | mutex_unlock(&data->update_lock); | ||
880 | 901 | ||
881 | return count; | 902 | return count; |
882 | } | 903 | } |
@@ -915,11 +936,13 @@ store_sf2_point(struct device *dev, struct device_attribute *attr, | |||
915 | u8 mask_tmp = 0; | 936 | u8 mask_tmp = 0; |
916 | 937 | ||
917 | val = simple_strtoul(buf, NULL, 10); | 938 | val = simple_strtoul(buf, NULL, 10); |
939 | mutex_lock(&data->update_lock); | ||
918 | data->sf2_points[index][nr] = SENSORS_LIMIT(val, 0, 127); | 940 | data->sf2_points[index][nr] = SENSORS_LIMIT(val, 0, 127); |
919 | mask_tmp = w83792d_read_value(client, | 941 | mask_tmp = w83792d_read_value(client, |
920 | W83792D_REG_POINTS[index][nr]) & 0x80; | 942 | W83792D_REG_POINTS[index][nr]) & 0x80; |
921 | w83792d_write_value(client, W83792D_REG_POINTS[index][nr], | 943 | w83792d_write_value(client, W83792D_REG_POINTS[index][nr], |
922 | mask_tmp|data->sf2_points[index][nr]); | 944 | mask_tmp|data->sf2_points[index][nr]); |
945 | mutex_unlock(&data->update_lock); | ||
923 | 946 | ||
924 | return count; | 947 | return count; |
925 | } | 948 | } |
@@ -979,6 +1002,7 @@ store_sf2_level(struct device *dev, struct device_attribute *attr, | |||
979 | u8 mask_tmp=0, level_tmp=0; | 1002 | u8 mask_tmp=0, level_tmp=0; |
980 | 1003 | ||
981 | val = simple_strtoul(buf, NULL, 10); | 1004 | val = simple_strtoul(buf, NULL, 10); |
1005 | mutex_lock(&data->update_lock); | ||
982 | data->sf2_levels[index][nr] = SENSORS_LIMIT((val * 15) / 100, 0, 15); | 1006 | data->sf2_levels[index][nr] = SENSORS_LIMIT((val * 15) / 100, 0, 15); |
983 | mask_tmp = w83792d_read_value(client, W83792D_REG_LEVELS[index][nr]) | 1007 | mask_tmp = w83792d_read_value(client, W83792D_REG_LEVELS[index][nr]) |
984 | & ((nr==3) ? 0xf0 : 0x0f); | 1008 | & ((nr==3) ? 0xf0 : 0x0f); |
@@ -988,6 +1012,7 @@ store_sf2_level(struct device *dev, struct device_attribute *attr, | |||
988 | level_tmp = data->sf2_levels[index][nr] << 4; | 1012 | level_tmp = data->sf2_levels[index][nr] << 4; |
989 | } | 1013 | } |
990 | w83792d_write_value(client, W83792D_REG_LEVELS[index][nr], level_tmp | mask_tmp); | 1014 | w83792d_write_value(client, W83792D_REG_LEVELS[index][nr], level_tmp | mask_tmp); |
1015 | mutex_unlock(&data->update_lock); | ||
991 | 1016 | ||
992 | return count; | 1017 | return count; |
993 | } | 1018 | } |
@@ -1373,7 +1398,7 @@ static struct w83792d_data *w83792d_update_device(struct device *dev) | |||
1373 | struct i2c_client *client = to_i2c_client(dev); | 1398 | struct i2c_client *client = to_i2c_client(dev); |
1374 | struct w83792d_data *data = i2c_get_clientdata(client); | 1399 | struct w83792d_data *data = i2c_get_clientdata(client); |
1375 | int i, j; | 1400 | int i, j; |
1376 | u8 reg_array_tmp[4], pwm_array_tmp[7], reg_tmp; | 1401 | u8 reg_array_tmp[4], reg_tmp; |
1377 | 1402 | ||
1378 | mutex_lock(&data->update_lock); | 1403 | mutex_lock(&data->update_lock); |
1379 | 1404 | ||
@@ -1402,10 +1427,8 @@ static struct w83792d_data *w83792d_update_device(struct device *dev) | |||
1402 | data->fan_min[i] = w83792d_read_value(client, | 1427 | data->fan_min[i] = w83792d_read_value(client, |
1403 | W83792D_REG_FAN_MIN[i]); | 1428 | W83792D_REG_FAN_MIN[i]); |
1404 | /* Update the PWM/DC Value and PWM/DC flag */ | 1429 | /* Update the PWM/DC Value and PWM/DC flag */ |
1405 | pwm_array_tmp[i] = w83792d_read_value(client, | 1430 | data->pwm[i] = w83792d_read_value(client, |
1406 | W83792D_REG_PWM[i]); | 1431 | W83792D_REG_PWM[i]); |
1407 | data->pwm[i] = pwm_array_tmp[i] & 0x0f; | ||
1408 | data->pwm_mode[i] = pwm_array_tmp[i] >> 7; | ||
1409 | } | 1432 | } |
1410 | 1433 | ||
1411 | reg_tmp = w83792d_read_value(client, W83792D_REG_FAN_CFG); | 1434 | reg_tmp = w83792d_read_value(client, W83792D_REG_FAN_CFG); |
@@ -1513,7 +1536,6 @@ static void w83792d_print_debug(struct w83792d_data *data, struct device *dev) | |||
1513 | dev_dbg(dev, "fan[%d] is: 0x%x\n", i, data->fan[i]); | 1536 | dev_dbg(dev, "fan[%d] is: 0x%x\n", i, data->fan[i]); |
1514 | dev_dbg(dev, "fan[%d] min is: 0x%x\n", i, data->fan_min[i]); | 1537 | dev_dbg(dev, "fan[%d] min is: 0x%x\n", i, data->fan_min[i]); |
1515 | dev_dbg(dev, "pwm[%d] is: 0x%x\n", i, data->pwm[i]); | 1538 | dev_dbg(dev, "pwm[%d] is: 0x%x\n", i, data->pwm[i]); |
1516 | dev_dbg(dev, "pwm_mode[%d] is: 0x%x\n", i, data->pwm_mode[i]); | ||
1517 | } | 1539 | } |
1518 | dev_dbg(dev, "3 set of Temperatures: =====>\n"); | 1540 | dev_dbg(dev, "3 set of Temperatures: =====>\n"); |
1519 | for (i=0; i<3; i++) { | 1541 | for (i=0; i<3; i++) { |
diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig index d6d44946a283..f7af7e9bb7d9 100644 --- a/drivers/i2c/busses/Kconfig +++ b/drivers/i2c/busses/Kconfig | |||
@@ -163,7 +163,7 @@ config I2C_PXA_SLAVE | |||
163 | I2C bus. | 163 | I2C bus. |
164 | 164 | ||
165 | config I2C_PIIX4 | 165 | config I2C_PIIX4 |
166 | tristate "Intel PIIX4" | 166 | tristate "Intel PIIX4 and compatible (ATI/Serverworks/Broadcom/SMSC)" |
167 | depends on I2C && PCI | 167 | depends on I2C && PCI |
168 | help | 168 | help |
169 | If you say yes to this option, support will be included for the Intel | 169 | If you say yes to this option, support will be included for the Intel |
@@ -172,6 +172,9 @@ config I2C_PIIX4 | |||
172 | of Broadcom): | 172 | of Broadcom): |
173 | Intel PIIX4 | 173 | Intel PIIX4 |
174 | Intel 440MX | 174 | Intel 440MX |
175 | ATI IXP200 | ||
176 | ATI IXP300 | ||
177 | ATI IXP400 | ||
175 | Serverworks OSB4 | 178 | Serverworks OSB4 |
176 | Serverworks CSB5 | 179 | Serverworks CSB5 |
177 | Serverworks CSB6 | 180 | Serverworks CSB6 |
@@ -273,6 +276,17 @@ config I2C_NFORCE2 | |||
273 | This driver can also be built as a module. If so, the module | 276 | This driver can also be built as a module. If so, the module |
274 | will be called i2c-nforce2. | 277 | will be called i2c-nforce2. |
275 | 278 | ||
279 | config I2C_OCORES | ||
280 | tristate "OpenCores I2C Controller" | ||
281 | depends on I2C && EXPERIMENTAL | ||
282 | help | ||
283 | If you say yes to this option, support will be included for the | ||
284 | OpenCores I2C controller. For details see | ||
285 | http://www.opencores.org/projects.cgi/web/i2c/overview | ||
286 | |||
287 | This driver can also be built as a module. If so, the module | ||
288 | will be called i2c-ocores. | ||
289 | |||
276 | config I2C_PARPORT | 290 | config I2C_PARPORT |
277 | tristate "Parallel port adapter" | 291 | tristate "Parallel port adapter" |
278 | depends on I2C && PARPORT | 292 | depends on I2C && PARPORT |
@@ -500,6 +514,7 @@ config I2C_PCA_ISA | |||
500 | tristate "PCA9564 on an ISA bus" | 514 | tristate "PCA9564 on an ISA bus" |
501 | depends on I2C | 515 | depends on I2C |
502 | select I2C_ALGOPCA | 516 | select I2C_ALGOPCA |
517 | default n | ||
503 | help | 518 | help |
504 | This driver supports ISA boards using the Philips PCA 9564 | 519 | This driver supports ISA boards using the Philips PCA 9564 |
505 | Parallel bus to I2C bus controller | 520 | Parallel bus to I2C bus controller |
@@ -507,6 +522,11 @@ config I2C_PCA_ISA | |||
507 | This driver can also be built as a module. If so, the module | 522 | This driver can also be built as a module. If so, the module |
508 | will be called i2c-pca-isa. | 523 | will be called i2c-pca-isa. |
509 | 524 | ||
525 | This device is almost undetectable and using this driver on a | ||
526 | system which doesn't have this device will result in long | ||
527 | delays when I2C/SMBus chip drivers are loaded (e.g. at boot | ||
528 | time). If unsure, say N. | ||
529 | |||
510 | config I2C_MV64XXX | 530 | config I2C_MV64XXX |
511 | tristate "Marvell mv64xxx I2C Controller" | 531 | tristate "Marvell mv64xxx I2C Controller" |
512 | depends on I2C && MV64X60 && EXPERIMENTAL | 532 | depends on I2C && MV64X60 && EXPERIMENTAL |
diff --git a/drivers/i2c/busses/Makefile b/drivers/i2c/busses/Makefile index b44831dff683..ac56df53155b 100644 --- a/drivers/i2c/busses/Makefile +++ b/drivers/i2c/busses/Makefile | |||
@@ -23,6 +23,7 @@ obj-$(CONFIG_I2C_POWERMAC) += i2c-powermac.o | |||
23 | obj-$(CONFIG_I2C_MPC) += i2c-mpc.o | 23 | obj-$(CONFIG_I2C_MPC) += i2c-mpc.o |
24 | obj-$(CONFIG_I2C_MV64XXX) += i2c-mv64xxx.o | 24 | obj-$(CONFIG_I2C_MV64XXX) += i2c-mv64xxx.o |
25 | obj-$(CONFIG_I2C_NFORCE2) += i2c-nforce2.o | 25 | obj-$(CONFIG_I2C_NFORCE2) += i2c-nforce2.o |
26 | obj-$(CONFIG_I2C_OCORES) += i2c-ocores.o | ||
26 | obj-$(CONFIG_I2C_PARPORT) += i2c-parport.o | 27 | obj-$(CONFIG_I2C_PARPORT) += i2c-parport.o |
27 | obj-$(CONFIG_I2C_PARPORT_LIGHT) += i2c-parport-light.o | 28 | obj-$(CONFIG_I2C_PARPORT_LIGHT) += i2c-parport-light.o |
28 | obj-$(CONFIG_I2C_PCA_ISA) += i2c-pca-isa.o | 29 | obj-$(CONFIG_I2C_PCA_ISA) += i2c-pca-isa.o |
diff --git a/drivers/i2c/busses/i2c-i801.c b/drivers/i2c/busses/i2c-i801.c index dfca74933625..3e0d04d5a800 100644 --- a/drivers/i2c/busses/i2c-i801.c +++ b/drivers/i2c/busses/i2c-i801.c | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | i801.c - Part of lm_sensors, Linux kernel modules for hardware | 2 | i2c-i801.c - Part of lm_sensors, Linux kernel modules for hardware |
3 | monitoring | 3 | monitoring |
4 | Copyright (c) 1998 - 2002 Frodo Looijaard <frodol@dds.nl>, | 4 | Copyright (c) 1998 - 2002 Frodo Looijaard <frodol@dds.nl>, |
5 | Philip Edelbrock <phil@netroedge.com>, and Mark D. Studebaker | 5 | Philip Edelbrock <phil@netroedge.com>, and Mark D. Studebaker |
@@ -36,7 +36,7 @@ | |||
36 | This driver supports several versions of Intel's I/O Controller Hubs (ICH). | 36 | This driver supports several versions of Intel's I/O Controller Hubs (ICH). |
37 | For SMBus support, they are similar to the PIIX4 and are part | 37 | For SMBus support, they are similar to the PIIX4 and are part |
38 | of Intel's '810' and other chipsets. | 38 | of Intel's '810' and other chipsets. |
39 | See the doc/busses/i2c-i801 file for details. | 39 | See the file Documentation/i2c/busses/i2c-i801 for details. |
40 | I2C Block Read and Process Call are not supported. | 40 | I2C Block Read and Process Call are not supported. |
41 | */ | 41 | */ |
42 | 42 | ||
@@ -66,9 +66,8 @@ | |||
66 | #define SMBAUXCTL (13 + i801_smba) /* ICH4 only */ | 66 | #define SMBAUXCTL (13 + i801_smba) /* ICH4 only */ |
67 | 67 | ||
68 | /* PCI Address Constants */ | 68 | /* PCI Address Constants */ |
69 | #define SMBBA 0x020 | 69 | #define SMBBAR 4 |
70 | #define SMBHSTCFG 0x040 | 70 | #define SMBHSTCFG 0x040 |
71 | #define SMBREV 0x008 | ||
72 | 71 | ||
73 | /* Host configuration bits for SMBHSTCFG */ | 72 | /* Host configuration bits for SMBHSTCFG */ |
74 | #define SMBHSTCFG_HST_EN 1 | 73 | #define SMBHSTCFG_HST_EN 1 |
@@ -92,92 +91,16 @@ | |||
92 | #define I801_START 0x40 | 91 | #define I801_START 0x40 |
93 | #define I801_PEC_EN 0x80 /* ICH4 only */ | 92 | #define I801_PEC_EN 0x80 /* ICH4 only */ |
94 | 93 | ||
95 | /* insmod parameters */ | ||
96 | |||
97 | /* If force_addr is set to anything different from 0, we forcibly enable | ||
98 | the I801 at the given address. VERY DANGEROUS! */ | ||
99 | static u16 force_addr; | ||
100 | module_param(force_addr, ushort, 0); | ||
101 | MODULE_PARM_DESC(force_addr, | ||
102 | "Forcibly enable the I801 at the given address. " | ||
103 | "EXTREMELY DANGEROUS!"); | ||
104 | 94 | ||
105 | static int i801_transaction(void); | 95 | static int i801_transaction(void); |
106 | static int i801_block_transaction(union i2c_smbus_data *data, char read_write, | 96 | static int i801_block_transaction(union i2c_smbus_data *data, char read_write, |
107 | int command, int hwpec); | 97 | int command, int hwpec); |
108 | 98 | ||
109 | static unsigned short i801_smba; | 99 | static unsigned long i801_smba; |
110 | static struct pci_driver i801_driver; | 100 | static struct pci_driver i801_driver; |
111 | static struct pci_dev *I801_dev; | 101 | static struct pci_dev *I801_dev; |
112 | static int isich4; | 102 | static int isich4; |
113 | 103 | ||
114 | static int i801_setup(struct pci_dev *dev) | ||
115 | { | ||
116 | int error_return = 0; | ||
117 | unsigned char temp; | ||
118 | |||
119 | /* Note: we keep on searching until we have found 'function 3' */ | ||
120 | if(PCI_FUNC(dev->devfn) != 3) | ||
121 | return -ENODEV; | ||
122 | |||
123 | I801_dev = dev; | ||
124 | if ((dev->device == PCI_DEVICE_ID_INTEL_82801DB_3) || | ||
125 | (dev->device == PCI_DEVICE_ID_INTEL_82801EB_3) || | ||
126 | (dev->device == PCI_DEVICE_ID_INTEL_ESB_4)) | ||
127 | isich4 = 1; | ||
128 | else | ||
129 | isich4 = 0; | ||
130 | |||
131 | /* Determine the address of the SMBus areas */ | ||
132 | if (force_addr) { | ||
133 | i801_smba = force_addr & 0xfff0; | ||
134 | } else { | ||
135 | pci_read_config_word(I801_dev, SMBBA, &i801_smba); | ||
136 | i801_smba &= 0xfff0; | ||
137 | if(i801_smba == 0) { | ||
138 | dev_err(&dev->dev, "SMB base address uninitialized " | ||
139 | "- upgrade BIOS or use force_addr=0xaddr\n"); | ||
140 | return -ENODEV; | ||
141 | } | ||
142 | } | ||
143 | |||
144 | if (!request_region(i801_smba, (isich4 ? 16 : 8), i801_driver.name)) { | ||
145 | dev_err(&dev->dev, "I801_smb region 0x%x already in use!\n", | ||
146 | i801_smba); | ||
147 | error_return = -EBUSY; | ||
148 | goto END; | ||
149 | } | ||
150 | |||
151 | pci_read_config_byte(I801_dev, SMBHSTCFG, &temp); | ||
152 | temp &= ~SMBHSTCFG_I2C_EN; /* SMBus timing */ | ||
153 | pci_write_config_byte(I801_dev, SMBHSTCFG, temp); | ||
154 | |||
155 | /* If force_addr is set, we program the new address here. Just to make | ||
156 | sure, we disable the device first. */ | ||
157 | if (force_addr) { | ||
158 | pci_write_config_byte(I801_dev, SMBHSTCFG, temp & 0xfe); | ||
159 | pci_write_config_word(I801_dev, SMBBA, i801_smba); | ||
160 | pci_write_config_byte(I801_dev, SMBHSTCFG, temp | 0x01); | ||
161 | dev_warn(&dev->dev, "WARNING: I801 SMBus interface set to " | ||
162 | "new address %04x!\n", i801_smba); | ||
163 | } else if ((temp & 1) == 0) { | ||
164 | pci_write_config_byte(I801_dev, SMBHSTCFG, temp | 1); | ||
165 | dev_warn(&dev->dev, "enabling SMBus device\n"); | ||
166 | } | ||
167 | |||
168 | if (temp & 0x02) | ||
169 | dev_dbg(&dev->dev, "I801 using Interrupt SMI# for SMBus.\n"); | ||
170 | else | ||
171 | dev_dbg(&dev->dev, "I801 using PCI Interrupt for SMBus.\n"); | ||
172 | |||
173 | pci_read_config_byte(I801_dev, SMBREV, &temp); | ||
174 | dev_dbg(&dev->dev, "SMBREV = 0x%X\n", temp); | ||
175 | dev_dbg(&dev->dev, "I801_smba = 0x%X\n", i801_smba); | ||
176 | |||
177 | END: | ||
178 | return error_return; | ||
179 | } | ||
180 | |||
181 | static int i801_transaction(void) | 104 | static int i801_transaction(void) |
182 | { | 105 | { |
183 | int temp; | 106 | int temp; |
@@ -334,8 +257,8 @@ static int i801_block_transaction(union i2c_smbus_data *data, char read_write, | |||
334 | /* We will always wait for a fraction of a second! */ | 257 | /* We will always wait for a fraction of a second! */ |
335 | timeout = 0; | 258 | timeout = 0; |
336 | do { | 259 | do { |
337 | temp = inb_p(SMBHSTSTS); | ||
338 | msleep(1); | 260 | msleep(1); |
261 | temp = inb_p(SMBHSTSTS); | ||
339 | } | 262 | } |
340 | while ((!(temp & 0x80)) | 263 | while ((!(temp & 0x80)) |
341 | && (timeout++ < MAX_TIMEOUT)); | 264 | && (timeout++ < MAX_TIMEOUT)); |
@@ -393,8 +316,8 @@ static int i801_block_transaction(union i2c_smbus_data *data, char read_write, | |||
393 | /* wait for INTR bit as advised by Intel */ | 316 | /* wait for INTR bit as advised by Intel */ |
394 | timeout = 0; | 317 | timeout = 0; |
395 | do { | 318 | do { |
396 | temp = inb_p(SMBHSTSTS); | ||
397 | msleep(1); | 319 | msleep(1); |
320 | temp = inb_p(SMBHSTSTS); | ||
398 | } while ((!(temp & 0x02)) | 321 | } while ((!(temp & 0x02)) |
399 | && (timeout++ < MAX_TIMEOUT)); | 322 | && (timeout++ < MAX_TIMEOUT)); |
400 | 323 | ||
@@ -541,25 +464,76 @@ MODULE_DEVICE_TABLE (pci, i801_ids); | |||
541 | 464 | ||
542 | static int __devinit i801_probe(struct pci_dev *dev, const struct pci_device_id *id) | 465 | static int __devinit i801_probe(struct pci_dev *dev, const struct pci_device_id *id) |
543 | { | 466 | { |
467 | unsigned char temp; | ||
468 | int err; | ||
469 | |||
470 | I801_dev = dev; | ||
471 | if ((dev->device == PCI_DEVICE_ID_INTEL_82801DB_3) || | ||
472 | (dev->device == PCI_DEVICE_ID_INTEL_82801EB_3) || | ||
473 | (dev->device == PCI_DEVICE_ID_INTEL_ESB_4)) | ||
474 | isich4 = 1; | ||
475 | else | ||
476 | isich4 = 0; | ||
477 | |||
478 | err = pci_enable_device(dev); | ||
479 | if (err) { | ||
480 | dev_err(&dev->dev, "Failed to enable SMBus PCI device (%d)\n", | ||
481 | err); | ||
482 | goto exit; | ||
483 | } | ||
484 | |||
485 | /* Determine the address of the SMBus area */ | ||
486 | i801_smba = pci_resource_start(dev, SMBBAR); | ||
487 | if (!i801_smba) { | ||
488 | dev_err(&dev->dev, "SMBus base address uninitialized, " | ||
489 | "upgrade BIOS\n"); | ||
490 | err = -ENODEV; | ||
491 | goto exit_disable; | ||
492 | } | ||
493 | |||
494 | err = pci_request_region(dev, SMBBAR, i801_driver.name); | ||
495 | if (err) { | ||
496 | dev_err(&dev->dev, "Failed to request SMBus region " | ||
497 | "0x%lx-0x%lx\n", i801_smba, | ||
498 | pci_resource_end(dev, SMBBAR)); | ||
499 | goto exit_disable; | ||
500 | } | ||
544 | 501 | ||
545 | if (i801_setup(dev)) { | 502 | pci_read_config_byte(I801_dev, SMBHSTCFG, &temp); |
546 | dev_warn(&dev->dev, | 503 | temp &= ~SMBHSTCFG_I2C_EN; /* SMBus timing */ |
547 | "I801 not detected, module not inserted.\n"); | 504 | if (!(temp & SMBHSTCFG_HST_EN)) { |
548 | return -ENODEV; | 505 | dev_info(&dev->dev, "Enabling SMBus device\n"); |
506 | temp |= SMBHSTCFG_HST_EN; | ||
549 | } | 507 | } |
508 | pci_write_config_byte(I801_dev, SMBHSTCFG, temp); | ||
509 | |||
510 | if (temp & SMBHSTCFG_SMB_SMI_EN) | ||
511 | dev_dbg(&dev->dev, "SMBus using interrupt SMI#\n"); | ||
512 | else | ||
513 | dev_dbg(&dev->dev, "SMBus using PCI Interrupt\n"); | ||
550 | 514 | ||
551 | /* set up the driverfs linkage to our parent device */ | 515 | /* set up the driverfs linkage to our parent device */ |
552 | i801_adapter.dev.parent = &dev->dev; | 516 | i801_adapter.dev.parent = &dev->dev; |
553 | 517 | ||
554 | snprintf(i801_adapter.name, I2C_NAME_SIZE, | 518 | snprintf(i801_adapter.name, I2C_NAME_SIZE, |
555 | "SMBus I801 adapter at %04x", i801_smba); | 519 | "SMBus I801 adapter at %04lx", i801_smba); |
556 | return i2c_add_adapter(&i801_adapter); | 520 | err = i2c_add_adapter(&i801_adapter); |
521 | if (err) { | ||
522 | dev_err(&dev->dev, "Failed to add SMBus adapter\n"); | ||
523 | goto exit_disable; | ||
524 | } | ||
525 | |||
526 | exit_disable: | ||
527 | pci_disable_device(dev); | ||
528 | exit: | ||
529 | return err; | ||
557 | } | 530 | } |
558 | 531 | ||
559 | static void __devexit i801_remove(struct pci_dev *dev) | 532 | static void __devexit i801_remove(struct pci_dev *dev) |
560 | { | 533 | { |
561 | i2c_del_adapter(&i801_adapter); | 534 | i2c_del_adapter(&i801_adapter); |
562 | release_region(i801_smba, (isich4 ? 16 : 8)); | 535 | pci_release_region(dev, SMBBAR); |
536 | pci_disable_device(dev); | ||
563 | } | 537 | } |
564 | 538 | ||
565 | static struct pci_driver i801_driver = { | 539 | static struct pci_driver i801_driver = { |
diff --git a/drivers/i2c/busses/i2c-nforce2.c b/drivers/i2c/busses/i2c-nforce2.c index 2d80eb26f688..604b49e22df1 100644 --- a/drivers/i2c/busses/i2c-nforce2.c +++ b/drivers/i2c/busses/i2c-nforce2.c | |||
@@ -31,6 +31,8 @@ | |||
31 | nForce3 250Gb MCP 00E4 | 31 | nForce3 250Gb MCP 00E4 |
32 | nForce4 MCP 0052 | 32 | nForce4 MCP 0052 |
33 | nForce4 MCP-04 0034 | 33 | nForce4 MCP-04 0034 |
34 | nForce4 MCP51 0264 | ||
35 | nForce4 MCP55 0368 | ||
34 | 36 | ||
35 | This driver supports the 2 SMBuses that are included in the MCP of the | 37 | This driver supports the 2 SMBuses that are included in the MCP of the |
36 | nForce2/3/4 chipsets. | 38 | nForce2/3/4 chipsets. |
@@ -64,6 +66,7 @@ struct nforce2_smbus { | |||
64 | 66 | ||
65 | /* | 67 | /* |
66 | * nVidia nForce2 SMBus control register definitions | 68 | * nVidia nForce2 SMBus control register definitions |
69 | * (Newer incarnations use standard BARs 4 and 5 instead) | ||
67 | */ | 70 | */ |
68 | #define NFORCE_PCI_SMB1 0x50 | 71 | #define NFORCE_PCI_SMB1 0x50 |
69 | #define NFORCE_PCI_SMB2 0x54 | 72 | #define NFORCE_PCI_SMB2 0x54 |
@@ -259,6 +262,8 @@ static struct pci_device_id nforce2_ids[] = { | |||
259 | { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE3S_SMBUS) }, | 262 | { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE3S_SMBUS) }, |
260 | { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE4_SMBUS) }, | 263 | { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE4_SMBUS) }, |
261 | { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP04_SMBUS) }, | 264 | { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP04_SMBUS) }, |
265 | { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_SMBUS) }, | ||
266 | { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP55_SMBUS) }, | ||
262 | { 0 } | 267 | { 0 } |
263 | }; | 268 | }; |
264 | 269 | ||
@@ -266,19 +271,29 @@ static struct pci_device_id nforce2_ids[] = { | |||
266 | MODULE_DEVICE_TABLE (pci, nforce2_ids); | 271 | MODULE_DEVICE_TABLE (pci, nforce2_ids); |
267 | 272 | ||
268 | 273 | ||
269 | static int __devinit nforce2_probe_smb (struct pci_dev *dev, int reg, | 274 | static int __devinit nforce2_probe_smb (struct pci_dev *dev, int bar, |
270 | struct nforce2_smbus *smbus, char *name) | 275 | int alt_reg, struct nforce2_smbus *smbus, const char *name) |
271 | { | 276 | { |
272 | u16 iobase; | ||
273 | int error; | 277 | int error; |
274 | 278 | ||
275 | if (pci_read_config_word(dev, reg, &iobase) != PCIBIOS_SUCCESSFUL) { | 279 | smbus->base = pci_resource_start(dev, bar); |
276 | dev_err(&smbus->adapter.dev, "Error reading PCI config for %s\n", name); | 280 | if (smbus->base) { |
277 | return -1; | 281 | smbus->size = pci_resource_len(dev, bar); |
282 | } else { | ||
283 | /* Older incarnations of the device used non-standard BARs */ | ||
284 | u16 iobase; | ||
285 | |||
286 | if (pci_read_config_word(dev, alt_reg, &iobase) | ||
287 | != PCIBIOS_SUCCESSFUL) { | ||
288 | dev_err(&dev->dev, "Error reading PCI config for %s\n", | ||
289 | name); | ||
290 | return -1; | ||
291 | } | ||
292 | |||
293 | smbus->base = iobase & PCI_BASE_ADDRESS_IO_MASK; | ||
294 | smbus->size = 8; | ||
278 | } | 295 | } |
279 | smbus->dev = dev; | 296 | smbus->dev = dev; |
280 | smbus->base = iobase & 0xfffc; | ||
281 | smbus->size = 8; | ||
282 | 297 | ||
283 | if (!request_region(smbus->base, smbus->size, nforce2_driver.name)) { | 298 | if (!request_region(smbus->base, smbus->size, nforce2_driver.name)) { |
284 | dev_err(&smbus->adapter.dev, "Error requesting region %02x .. %02X for %s\n", | 299 | dev_err(&smbus->adapter.dev, "Error requesting region %02x .. %02X for %s\n", |
@@ -313,12 +328,13 @@ static int __devinit nforce2_probe(struct pci_dev *dev, const struct pci_device_ | |||
313 | pci_set_drvdata(dev, smbuses); | 328 | pci_set_drvdata(dev, smbuses); |
314 | 329 | ||
315 | /* SMBus adapter 1 */ | 330 | /* SMBus adapter 1 */ |
316 | res1 = nforce2_probe_smb (dev, NFORCE_PCI_SMB1, &smbuses[0], "SMB1"); | 331 | res1 = nforce2_probe_smb(dev, 4, NFORCE_PCI_SMB1, &smbuses[0], "SMB1"); |
317 | if (res1 < 0) { | 332 | if (res1 < 0) { |
318 | dev_err(&dev->dev, "Error probing SMB1.\n"); | 333 | dev_err(&dev->dev, "Error probing SMB1.\n"); |
319 | smbuses[0].base = 0; /* to have a check value */ | 334 | smbuses[0].base = 0; /* to have a check value */ |
320 | } | 335 | } |
321 | res2 = nforce2_probe_smb (dev, NFORCE_PCI_SMB2, &smbuses[1], "SMB2"); | 336 | /* SMBus adapter 2 */ |
337 | res2 = nforce2_probe_smb(dev, 5, NFORCE_PCI_SMB2, &smbuses[1], "SMB2"); | ||
322 | if (res2 < 0) { | 338 | if (res2 < 0) { |
323 | dev_err(&dev->dev, "Error probing SMB2.\n"); | 339 | dev_err(&dev->dev, "Error probing SMB2.\n"); |
324 | smbuses[1].base = 0; /* to have a check value */ | 340 | smbuses[1].base = 0; /* to have a check value */ |
diff --git a/drivers/i2c/busses/i2c-ocores.c b/drivers/i2c/busses/i2c-ocores.c new file mode 100644 index 000000000000..592824087c49 --- /dev/null +++ b/drivers/i2c/busses/i2c-ocores.c | |||
@@ -0,0 +1,341 @@ | |||
1 | /* | ||
2 | * i2c-ocores.c: I2C bus driver for OpenCores I2C controller | ||
3 | * (http://www.opencores.org/projects.cgi/web/i2c/overview). | ||
4 | * | ||
5 | * Peter Korsgaard <jacmet@sunsite.dk> | ||
6 | * | ||
7 | * This file is licensed under the terms of the GNU General Public License | ||
8 | * version 2. This program is licensed "as is" without any warranty of any | ||
9 | * kind, whether express or implied. | ||
10 | */ | ||
11 | |||
12 | #include <linux/config.h> | ||
13 | #include <linux/kernel.h> | ||
14 | #include <linux/module.h> | ||
15 | #include <linux/sched.h> | ||
16 | #include <linux/init.h> | ||
17 | #include <linux/errno.h> | ||
18 | #include <linux/platform_device.h> | ||
19 | #include <linux/i2c.h> | ||
20 | #include <linux/interrupt.h> | ||
21 | #include <linux/wait.h> | ||
22 | #include <linux/i2c-ocores.h> | ||
23 | #include <asm/io.h> | ||
24 | |||
25 | struct ocores_i2c { | ||
26 | void __iomem *base; | ||
27 | int regstep; | ||
28 | wait_queue_head_t wait; | ||
29 | struct i2c_adapter adap; | ||
30 | struct i2c_msg *msg; | ||
31 | int pos; | ||
32 | int nmsgs; | ||
33 | int state; /* see STATE_ */ | ||
34 | }; | ||
35 | |||
36 | /* registers */ | ||
37 | #define OCI2C_PRELOW 0 | ||
38 | #define OCI2C_PREHIGH 1 | ||
39 | #define OCI2C_CONTROL 2 | ||
40 | #define OCI2C_DATA 3 | ||
41 | #define OCI2C_CMD 4 /* write only */ | ||
42 | #define OCI2C_STATUS 4 /* read only, same address as OCI2C_CMD */ | ||
43 | |||
44 | #define OCI2C_CTRL_IEN 0x40 | ||
45 | #define OCI2C_CTRL_EN 0x80 | ||
46 | |||
47 | #define OCI2C_CMD_START 0x91 | ||
48 | #define OCI2C_CMD_STOP 0x41 | ||
49 | #define OCI2C_CMD_READ 0x21 | ||
50 | #define OCI2C_CMD_WRITE 0x11 | ||
51 | #define OCI2C_CMD_READ_ACK 0x21 | ||
52 | #define OCI2C_CMD_READ_NACK 0x29 | ||
53 | #define OCI2C_CMD_IACK 0x01 | ||
54 | |||
55 | #define OCI2C_STAT_IF 0x01 | ||
56 | #define OCI2C_STAT_TIP 0x02 | ||
57 | #define OCI2C_STAT_ARBLOST 0x20 | ||
58 | #define OCI2C_STAT_BUSY 0x40 | ||
59 | #define OCI2C_STAT_NACK 0x80 | ||
60 | |||
61 | #define STATE_DONE 0 | ||
62 | #define STATE_START 1 | ||
63 | #define STATE_WRITE 2 | ||
64 | #define STATE_READ 3 | ||
65 | #define STATE_ERROR 4 | ||
66 | |||
67 | static inline void oc_setreg(struct ocores_i2c *i2c, int reg, u8 value) | ||
68 | { | ||
69 | iowrite8(value, i2c->base + reg * i2c->regstep); | ||
70 | } | ||
71 | |||
72 | static inline u8 oc_getreg(struct ocores_i2c *i2c, int reg) | ||
73 | { | ||
74 | return ioread8(i2c->base + reg * i2c->regstep); | ||
75 | } | ||
76 | |||
77 | static void ocores_process(struct ocores_i2c *i2c) | ||
78 | { | ||
79 | struct i2c_msg *msg = i2c->msg; | ||
80 | u8 stat = oc_getreg(i2c, OCI2C_STATUS); | ||
81 | |||
82 | if ((i2c->state == STATE_DONE) || (i2c->state == STATE_ERROR)) { | ||
83 | /* stop has been sent */ | ||
84 | oc_setreg(i2c, OCI2C_CMD, OCI2C_CMD_IACK); | ||
85 | wake_up(&i2c->wait); | ||
86 | return; | ||
87 | } | ||
88 | |||
89 | /* error? */ | ||
90 | if (stat & OCI2C_STAT_ARBLOST) { | ||
91 | i2c->state = STATE_ERROR; | ||
92 | oc_setreg(i2c, OCI2C_CMD, OCI2C_CMD_STOP); | ||
93 | return; | ||
94 | } | ||
95 | |||
96 | if ((i2c->state == STATE_START) || (i2c->state == STATE_WRITE)) { | ||
97 | i2c->state = | ||
98 | (msg->flags & I2C_M_RD) ? STATE_READ : STATE_WRITE; | ||
99 | |||
100 | if (stat & OCI2C_STAT_NACK) { | ||
101 | i2c->state = STATE_ERROR; | ||
102 | oc_setreg(i2c, OCI2C_CMD, OCI2C_CMD_STOP); | ||
103 | return; | ||
104 | } | ||
105 | } else | ||
106 | msg->buf[i2c->pos++] = oc_getreg(i2c, OCI2C_DATA); | ||
107 | |||
108 | /* end of msg? */ | ||
109 | if (i2c->pos == msg->len) { | ||
110 | i2c->nmsgs--; | ||
111 | i2c->msg++; | ||
112 | i2c->pos = 0; | ||
113 | msg = i2c->msg; | ||
114 | |||
115 | if (i2c->nmsgs) { /* end? */ | ||
116 | /* send start? */ | ||
117 | if (!(msg->flags & I2C_M_NOSTART)) { | ||
118 | u8 addr = (msg->addr << 1); | ||
119 | |||
120 | if (msg->flags & I2C_M_RD) | ||
121 | addr |= 1; | ||
122 | |||
123 | i2c->state = STATE_START; | ||
124 | |||
125 | oc_setreg(i2c, OCI2C_DATA, addr); | ||
126 | oc_setreg(i2c, OCI2C_CMD, OCI2C_CMD_START); | ||
127 | return; | ||
128 | } else | ||
129 | i2c->state = (msg->flags & I2C_M_RD) | ||
130 | ? STATE_READ : STATE_WRITE; | ||
131 | } else { | ||
132 | i2c->state = STATE_DONE; | ||
133 | oc_setreg(i2c, OCI2C_CMD, OCI2C_CMD_STOP); | ||
134 | return; | ||
135 | } | ||
136 | } | ||
137 | |||
138 | if (i2c->state == STATE_READ) { | ||
139 | oc_setreg(i2c, OCI2C_CMD, i2c->pos == (msg->len-1) ? | ||
140 | OCI2C_CMD_READ_NACK : OCI2C_CMD_READ_ACK); | ||
141 | } else { | ||
142 | oc_setreg(i2c, OCI2C_DATA, msg->buf[i2c->pos++]); | ||
143 | oc_setreg(i2c, OCI2C_CMD, OCI2C_CMD_WRITE); | ||
144 | } | ||
145 | } | ||
146 | |||
147 | static irqreturn_t ocores_isr(int irq, void *dev_id, struct pt_regs *regs) | ||
148 | { | ||
149 | struct ocores_i2c *i2c = dev_id; | ||
150 | |||
151 | ocores_process(i2c); | ||
152 | |||
153 | return IRQ_HANDLED; | ||
154 | } | ||
155 | |||
156 | static int ocores_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num) | ||
157 | { | ||
158 | struct ocores_i2c *i2c = i2c_get_adapdata(adap); | ||
159 | |||
160 | i2c->msg = msgs; | ||
161 | i2c->pos = 0; | ||
162 | i2c->nmsgs = num; | ||
163 | i2c->state = STATE_START; | ||
164 | |||
165 | oc_setreg(i2c, OCI2C_DATA, | ||
166 | (i2c->msg->addr << 1) | | ||
167 | ((i2c->msg->flags & I2C_M_RD) ? 1:0)); | ||
168 | |||
169 | oc_setreg(i2c, OCI2C_CMD, OCI2C_CMD_START); | ||
170 | |||
171 | if (wait_event_timeout(i2c->wait, (i2c->state == STATE_ERROR) || | ||
172 | (i2c->state == STATE_DONE), HZ)) | ||
173 | return (i2c->state == STATE_DONE) ? num : -EIO; | ||
174 | else | ||
175 | return -ETIMEDOUT; | ||
176 | } | ||
177 | |||
178 | static void ocores_init(struct ocores_i2c *i2c, | ||
179 | struct ocores_i2c_platform_data *pdata) | ||
180 | { | ||
181 | int prescale; | ||
182 | u8 ctrl = oc_getreg(i2c, OCI2C_CONTROL); | ||
183 | |||
184 | /* make sure the device is disabled */ | ||
185 | oc_setreg(i2c, OCI2C_CONTROL, ctrl & ~(OCI2C_CTRL_EN|OCI2C_CTRL_IEN)); | ||
186 | |||
187 | prescale = (pdata->clock_khz / (5*100)) - 1; | ||
188 | oc_setreg(i2c, OCI2C_PRELOW, prescale & 0xff); | ||
189 | oc_setreg(i2c, OCI2C_PREHIGH, prescale >> 8); | ||
190 | |||
191 | /* Init the device */ | ||
192 | oc_setreg(i2c, OCI2C_CMD, OCI2C_CMD_IACK); | ||
193 | oc_setreg(i2c, OCI2C_CONTROL, ctrl | OCI2C_CTRL_IEN | OCI2C_CTRL_EN); | ||
194 | } | ||
195 | |||
196 | |||
197 | static u32 ocores_func(struct i2c_adapter *adap) | ||
198 | { | ||
199 | return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL; | ||
200 | } | ||
201 | |||
202 | static struct i2c_algorithm ocores_algorithm = { | ||
203 | .master_xfer = ocores_xfer, | ||
204 | .functionality = ocores_func, | ||
205 | }; | ||
206 | |||
207 | static struct i2c_adapter ocores_adapter = { | ||
208 | .owner = THIS_MODULE, | ||
209 | .name = "i2c-ocores", | ||
210 | .class = I2C_CLASS_HWMON, | ||
211 | .algo = &ocores_algorithm, | ||
212 | }; | ||
213 | |||
214 | |||
215 | static int __devinit ocores_i2c_probe(struct platform_device *pdev) | ||
216 | { | ||
217 | struct ocores_i2c *i2c; | ||
218 | struct ocores_i2c_platform_data *pdata; | ||
219 | struct resource *res, *res2; | ||
220 | int ret; | ||
221 | |||
222 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | ||
223 | if (!res) | ||
224 | return -ENODEV; | ||
225 | |||
226 | res2 = platform_get_resource(pdev, IORESOURCE_IRQ, 0); | ||
227 | if (!res2) | ||
228 | return -ENODEV; | ||
229 | |||
230 | pdata = (struct ocores_i2c_platform_data*) pdev->dev.platform_data; | ||
231 | if (!pdata) | ||
232 | return -ENODEV; | ||
233 | |||
234 | i2c = kzalloc(sizeof(*i2c), GFP_KERNEL); | ||
235 | if (!i2c) | ||
236 | return -ENOMEM; | ||
237 | |||
238 | if (!request_mem_region(res->start, res->end - res->start + 1, | ||
239 | pdev->name)) { | ||
240 | dev_err(&pdev->dev, "Memory region busy\n"); | ||
241 | ret = -EBUSY; | ||
242 | goto request_mem_failed; | ||
243 | } | ||
244 | |||
245 | i2c->base = ioremap(res->start, res->end - res->start + 1); | ||
246 | if (!i2c->base) { | ||
247 | dev_err(&pdev->dev, "Unable to map registers\n"); | ||
248 | ret = -EIO; | ||
249 | goto map_failed; | ||
250 | } | ||
251 | |||
252 | i2c->regstep = pdata->regstep; | ||
253 | ocores_init(i2c, pdata); | ||
254 | |||
255 | init_waitqueue_head(&i2c->wait); | ||
256 | ret = request_irq(res2->start, ocores_isr, 0, pdev->name, i2c); | ||
257 | if (ret) { | ||
258 | dev_err(&pdev->dev, "Cannot claim IRQ\n"); | ||
259 | goto request_irq_failed; | ||
260 | } | ||
261 | |||
262 | /* hook up driver to tree */ | ||
263 | platform_set_drvdata(pdev, i2c); | ||
264 | i2c->adap = ocores_adapter; | ||
265 | i2c_set_adapdata(&i2c->adap, i2c); | ||
266 | i2c->adap.dev.parent = &pdev->dev; | ||
267 | |||
268 | /* add i2c adapter to i2c tree */ | ||
269 | ret = i2c_add_adapter(&i2c->adap); | ||
270 | if (ret) { | ||
271 | dev_err(&pdev->dev, "Failed to add adapter\n"); | ||
272 | goto add_adapter_failed; | ||
273 | } | ||
274 | |||
275 | return 0; | ||
276 | |||
277 | add_adapter_failed: | ||
278 | free_irq(res2->start, i2c); | ||
279 | request_irq_failed: | ||
280 | iounmap(i2c->base); | ||
281 | map_failed: | ||
282 | release_mem_region(res->start, res->end - res->start + 1); | ||
283 | request_mem_failed: | ||
284 | kfree(i2c); | ||
285 | |||
286 | return ret; | ||
287 | } | ||
288 | |||
289 | static int __devexit ocores_i2c_remove(struct platform_device* pdev) | ||
290 | { | ||
291 | struct ocores_i2c *i2c = platform_get_drvdata(pdev); | ||
292 | struct resource *res; | ||
293 | |||
294 | /* disable i2c logic */ | ||
295 | oc_setreg(i2c, OCI2C_CONTROL, oc_getreg(i2c, OCI2C_CONTROL) | ||
296 | & ~(OCI2C_CTRL_EN|OCI2C_CTRL_IEN)); | ||
297 | |||
298 | /* remove adapter & data */ | ||
299 | i2c_del_adapter(&i2c->adap); | ||
300 | platform_set_drvdata(pdev, NULL); | ||
301 | |||
302 | res = platform_get_resource(pdev, IORESOURCE_IRQ, 0); | ||
303 | if (res) | ||
304 | free_irq(res->start, i2c); | ||
305 | |||
306 | iounmap(i2c->base); | ||
307 | |||
308 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | ||
309 | if (res) | ||
310 | release_mem_region(res->start, res->end - res->start + 1); | ||
311 | |||
312 | kfree(i2c); | ||
313 | |||
314 | return 0; | ||
315 | } | ||
316 | |||
317 | static struct platform_driver ocores_i2c_driver = { | ||
318 | .probe = ocores_i2c_probe, | ||
319 | .remove = __devexit_p(ocores_i2c_remove), | ||
320 | .driver = { | ||
321 | .owner = THIS_MODULE, | ||
322 | .name = "ocores-i2c", | ||
323 | }, | ||
324 | }; | ||
325 | |||
326 | static int __init ocores_i2c_init(void) | ||
327 | { | ||
328 | return platform_driver_register(&ocores_i2c_driver); | ||
329 | } | ||
330 | |||
331 | static void __exit ocores_i2c_exit(void) | ||
332 | { | ||
333 | platform_driver_unregister(&ocores_i2c_driver); | ||
334 | } | ||
335 | |||
336 | module_init(ocores_i2c_init); | ||
337 | module_exit(ocores_i2c_exit); | ||
338 | |||
339 | MODULE_AUTHOR("Peter Korsgaard <jacmet@sunsite.dk>"); | ||
340 | MODULE_DESCRIPTION("OpenCores I2C bus driver"); | ||
341 | MODULE_LICENSE("GPL"); | ||
diff --git a/drivers/i2c/busses/i2c-piix4.c b/drivers/i2c/busses/i2c-piix4.c index d9c7c00e71f9..8f2f65b793b9 100644 --- a/drivers/i2c/busses/i2c-piix4.c +++ b/drivers/i2c/busses/i2c-piix4.c | |||
@@ -102,13 +102,6 @@ MODULE_PARM_DESC(force_addr, | |||
102 | "Forcibly enable the PIIX4 at the given address. " | 102 | "Forcibly enable the PIIX4 at the given address. " |
103 | "EXTREMELY DANGEROUS!"); | 103 | "EXTREMELY DANGEROUS!"); |
104 | 104 | ||
105 | /* If fix_hstcfg is set to anything different from 0, we reset one of the | ||
106 | registers to be a valid value. */ | ||
107 | static int fix_hstcfg; | ||
108 | module_param (fix_hstcfg, int, 0); | ||
109 | MODULE_PARM_DESC(fix_hstcfg, | ||
110 | "Fix config register. Needed on some boards (Force CPCI735)."); | ||
111 | |||
112 | static int piix4_transaction(void); | 105 | static int piix4_transaction(void); |
113 | 106 | ||
114 | static unsigned short piix4_smba; | 107 | static unsigned short piix4_smba; |
@@ -137,7 +130,7 @@ static int __devinit piix4_setup(struct pci_dev *PIIX4_dev, | |||
137 | /* Don't access SMBus on IBM systems which get corrupted eeproms */ | 130 | /* Don't access SMBus on IBM systems which get corrupted eeproms */ |
138 | if (dmi_check_system(piix4_dmi_table) && | 131 | if (dmi_check_system(piix4_dmi_table) && |
139 | PIIX4_dev->vendor == PCI_VENDOR_ID_INTEL) { | 132 | PIIX4_dev->vendor == PCI_VENDOR_ID_INTEL) { |
140 | dev_err(&PIIX4_dev->dev, "IBM Laptop detected; this module " | 133 | dev_err(&PIIX4_dev->dev, "IBM system detected; this module " |
141 | "may corrupt your serial eeprom! Refusing to load " | 134 | "may corrupt your serial eeprom! Refusing to load " |
142 | "module!\n"); | 135 | "module!\n"); |
143 | return -EPERM; | 136 | return -EPERM; |
@@ -166,22 +159,6 @@ static int __devinit piix4_setup(struct pci_dev *PIIX4_dev, | |||
166 | 159 | ||
167 | pci_read_config_byte(PIIX4_dev, SMBHSTCFG, &temp); | 160 | pci_read_config_byte(PIIX4_dev, SMBHSTCFG, &temp); |
168 | 161 | ||
169 | /* Some BIOS will set up the chipset incorrectly and leave a register | ||
170 | in an undefined state (causing I2C to act very strangely). */ | ||
171 | if (temp & 0x02) { | ||
172 | if (fix_hstcfg) { | ||
173 | dev_info(&PIIX4_dev->dev, "Working around buggy BIOS " | ||
174 | "(I2C)\n"); | ||
175 | temp &= 0xfd; | ||
176 | pci_write_config_byte(PIIX4_dev, SMBHSTCFG, temp); | ||
177 | } else { | ||
178 | dev_info(&PIIX4_dev->dev, "Unusual config register " | ||
179 | "value\n"); | ||
180 | dev_info(&PIIX4_dev->dev, "Try using fix_hstcfg=1 if " | ||
181 | "you experience problems\n"); | ||
182 | } | ||
183 | } | ||
184 | |||
185 | /* If force_addr is set, we program the new address here. Just to make | 162 | /* If force_addr is set, we program the new address here. Just to make |
186 | sure, we disable the PIIX4 first. */ | 163 | sure, we disable the PIIX4 first. */ |
187 | if (force_addr) { | 164 | if (force_addr) { |
@@ -214,7 +191,7 @@ static int __devinit piix4_setup(struct pci_dev *PIIX4_dev, | |||
214 | } | 191 | } |
215 | } | 192 | } |
216 | 193 | ||
217 | if ((temp & 0x0E) == 8) | 194 | if (((temp & 0x0E) == 8) || ((temp & 0x0E) == 2)) |
218 | dev_dbg(&PIIX4_dev->dev, "Using Interrupt 9 for SMBus.\n"); | 195 | dev_dbg(&PIIX4_dev->dev, "Using Interrupt 9 for SMBus.\n"); |
219 | else if ((temp & 0x0E) == 0) | 196 | else if ((temp & 0x0E) == 0) |
220 | dev_dbg(&PIIX4_dev->dev, "Using Interrupt SMI# for SMBus.\n"); | 197 | dev_dbg(&PIIX4_dev->dev, "Using Interrupt SMI# for SMBus.\n"); |
@@ -413,6 +390,12 @@ static struct i2c_adapter piix4_adapter = { | |||
413 | static struct pci_device_id piix4_ids[] = { | 390 | static struct pci_device_id piix4_ids[] = { |
414 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82371AB_3), | 391 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82371AB_3), |
415 | .driver_data = 3 }, | 392 | .driver_data = 3 }, |
393 | { PCI_DEVICE(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP200_SMBUS), | ||
394 | .driver_data = 0 }, | ||
395 | { PCI_DEVICE(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP300_SMBUS), | ||
396 | .driver_data = 0 }, | ||
397 | { PCI_DEVICE(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP400_SMBUS), | ||
398 | .driver_data = 0 }, | ||
416 | { PCI_DEVICE(PCI_VENDOR_ID_SERVERWORKS, PCI_DEVICE_ID_SERVERWORKS_OSB4), | 399 | { PCI_DEVICE(PCI_VENDOR_ID_SERVERWORKS, PCI_DEVICE_ID_SERVERWORKS_OSB4), |
417 | .driver_data = 0 }, | 400 | .driver_data = 0 }, |
418 | { PCI_DEVICE(PCI_VENDOR_ID_SERVERWORKS, PCI_DEVICE_ID_SERVERWORKS_CSB5), | 401 | { PCI_DEVICE(PCI_VENDOR_ID_SERVERWORKS, PCI_DEVICE_ID_SERVERWORKS_CSB5), |
diff --git a/drivers/i2c/busses/scx200_acb.c b/drivers/i2c/busses/scx200_acb.c index 766cc969c4d0..22a3eda04166 100644 --- a/drivers/i2c/busses/scx200_acb.c +++ b/drivers/i2c/busses/scx200_acb.c | |||
@@ -33,7 +33,6 @@ | |||
33 | #include <linux/delay.h> | 33 | #include <linux/delay.h> |
34 | #include <linux/mutex.h> | 34 | #include <linux/mutex.h> |
35 | #include <asm/io.h> | 35 | #include <asm/io.h> |
36 | #include <asm/msr.h> | ||
37 | 36 | ||
38 | #include <linux/scx200.h> | 37 | #include <linux/scx200.h> |
39 | 38 | ||
@@ -85,6 +84,10 @@ struct scx200_acb_iface { | |||
85 | u8 *ptr; | 84 | u8 *ptr; |
86 | char needs_reset; | 85 | char needs_reset; |
87 | unsigned len; | 86 | unsigned len; |
87 | |||
88 | /* PCI device info */ | ||
89 | struct pci_dev *pdev; | ||
90 | int bar; | ||
88 | }; | 91 | }; |
89 | 92 | ||
90 | /* Register Definitions */ | 93 | /* Register Definitions */ |
@@ -381,7 +384,7 @@ static struct i2c_algorithm scx200_acb_algorithm = { | |||
381 | static struct scx200_acb_iface *scx200_acb_list; | 384 | static struct scx200_acb_iface *scx200_acb_list; |
382 | static DECLARE_MUTEX(scx200_acb_list_mutex); | 385 | static DECLARE_MUTEX(scx200_acb_list_mutex); |
383 | 386 | ||
384 | static int scx200_acb_probe(struct scx200_acb_iface *iface) | 387 | static __init int scx200_acb_probe(struct scx200_acb_iface *iface) |
385 | { | 388 | { |
386 | u8 val; | 389 | u8 val; |
387 | 390 | ||
@@ -417,17 +420,16 @@ static int scx200_acb_probe(struct scx200_acb_iface *iface) | |||
417 | return 0; | 420 | return 0; |
418 | } | 421 | } |
419 | 422 | ||
420 | static int __init scx200_acb_create(const char *text, int base, int index) | 423 | static __init struct scx200_acb_iface *scx200_create_iface(const char *text, |
424 | int index) | ||
421 | { | 425 | { |
422 | struct scx200_acb_iface *iface; | 426 | struct scx200_acb_iface *iface; |
423 | struct i2c_adapter *adapter; | 427 | struct i2c_adapter *adapter; |
424 | int rc; | ||
425 | 428 | ||
426 | iface = kzalloc(sizeof(*iface), GFP_KERNEL); | 429 | iface = kzalloc(sizeof(*iface), GFP_KERNEL); |
427 | if (!iface) { | 430 | if (!iface) { |
428 | printk(KERN_ERR NAME ": can't allocate memory\n"); | 431 | printk(KERN_ERR NAME ": can't allocate memory\n"); |
429 | rc = -ENOMEM; | 432 | return NULL; |
430 | goto errout; | ||
431 | } | 433 | } |
432 | 434 | ||
433 | adapter = &iface->adapter; | 435 | adapter = &iface->adapter; |
@@ -440,26 +442,27 @@ static int __init scx200_acb_create(const char *text, int base, int index) | |||
440 | 442 | ||
441 | mutex_init(&iface->mutex); | 443 | mutex_init(&iface->mutex); |
442 | 444 | ||
443 | if (!request_region(base, 8, adapter->name)) { | 445 | return iface; |
444 | printk(KERN_ERR NAME ": can't allocate io 0x%x-0x%x\n", | 446 | } |
445 | base, base + 8-1); | 447 | |
446 | rc = -EBUSY; | 448 | static int __init scx200_acb_create(struct scx200_acb_iface *iface) |
447 | goto errout_free; | 449 | { |
448 | } | 450 | struct i2c_adapter *adapter; |
449 | iface->base = base; | 451 | int rc; |
452 | |||
453 | adapter = &iface->adapter; | ||
450 | 454 | ||
451 | rc = scx200_acb_probe(iface); | 455 | rc = scx200_acb_probe(iface); |
452 | if (rc) { | 456 | if (rc) { |
453 | printk(KERN_WARNING NAME ": probe failed\n"); | 457 | printk(KERN_WARNING NAME ": probe failed\n"); |
454 | goto errout_release; | 458 | return rc; |
455 | } | 459 | } |
456 | 460 | ||
457 | scx200_acb_reset(iface); | 461 | scx200_acb_reset(iface); |
458 | 462 | ||
459 | if (i2c_add_adapter(adapter) < 0) { | 463 | if (i2c_add_adapter(adapter) < 0) { |
460 | printk(KERN_ERR NAME ": failed to register\n"); | 464 | printk(KERN_ERR NAME ": failed to register\n"); |
461 | rc = -ENODEV; | 465 | return -ENODEV; |
462 | goto errout_release; | ||
463 | } | 466 | } |
464 | 467 | ||
465 | down(&scx200_acb_list_mutex); | 468 | down(&scx200_acb_list_mutex); |
@@ -468,64 +471,148 @@ static int __init scx200_acb_create(const char *text, int base, int index) | |||
468 | up(&scx200_acb_list_mutex); | 471 | up(&scx200_acb_list_mutex); |
469 | 472 | ||
470 | return 0; | 473 | return 0; |
474 | } | ||
471 | 475 | ||
472 | errout_release: | 476 | static __init int scx200_create_pci(const char *text, struct pci_dev *pdev, |
473 | release_region(iface->base, 8); | 477 | int bar) |
478 | { | ||
479 | struct scx200_acb_iface *iface; | ||
480 | int rc; | ||
481 | |||
482 | iface = scx200_create_iface(text, 0); | ||
483 | |||
484 | if (iface == NULL) | ||
485 | return -ENOMEM; | ||
486 | |||
487 | iface->pdev = pdev; | ||
488 | iface->bar = bar; | ||
489 | |||
490 | pci_enable_device_bars(iface->pdev, 1 << iface->bar); | ||
491 | |||
492 | rc = pci_request_region(iface->pdev, iface->bar, iface->adapter.name); | ||
493 | |||
494 | if (rc != 0) { | ||
495 | printk(KERN_ERR NAME ": can't allocate PCI BAR %d\n", | ||
496 | iface->bar); | ||
497 | goto errout_free; | ||
498 | } | ||
499 | |||
500 | iface->base = pci_resource_start(iface->pdev, iface->bar); | ||
501 | rc = scx200_acb_create(iface); | ||
502 | |||
503 | if (rc == 0) | ||
504 | return 0; | ||
505 | |||
506 | pci_release_region(iface->pdev, iface->bar); | ||
507 | pci_dev_put(iface->pdev); | ||
474 | errout_free: | 508 | errout_free: |
475 | kfree(iface); | 509 | kfree(iface); |
476 | errout: | ||
477 | return rc; | 510 | return rc; |
478 | } | 511 | } |
479 | 512 | ||
480 | static struct pci_device_id scx200[] = { | 513 | static int __init scx200_create_isa(const char *text, unsigned long base, |
481 | { PCI_DEVICE(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_SCx200_BRIDGE) }, | 514 | int index) |
482 | { PCI_DEVICE(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_SC1100_BRIDGE) }, | 515 | { |
483 | { }, | 516 | struct scx200_acb_iface *iface; |
484 | }; | 517 | int rc; |
518 | |||
519 | iface = scx200_create_iface(text, index); | ||
520 | |||
521 | if (iface == NULL) | ||
522 | return -ENOMEM; | ||
523 | |||
524 | if (request_region(base, 8, iface->adapter.name) == 0) { | ||
525 | printk(KERN_ERR NAME ": can't allocate io 0x%lx-0x%lx\n", | ||
526 | base, base + 8 - 1); | ||
527 | rc = -EBUSY; | ||
528 | goto errout_free; | ||
529 | } | ||
530 | |||
531 | iface->base = base; | ||
532 | rc = scx200_acb_create(iface); | ||
533 | |||
534 | if (rc == 0) | ||
535 | return 0; | ||
485 | 536 | ||
486 | static struct pci_device_id divil_pci[] = { | 537 | release_region(base, 8); |
487 | { PCI_DEVICE(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_CS5535_ISA) }, | 538 | errout_free: |
488 | { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_CS5536_ISA) }, | 539 | kfree(iface); |
489 | { } /* NULL entry */ | 540 | return rc; |
541 | } | ||
542 | |||
543 | /* Driver data is an index into the scx200_data array that indicates | ||
544 | * the name and the BAR where the I/O address resource is located. ISA | ||
545 | * devices are flagged with a bar value of -1 */ | ||
546 | |||
547 | static struct pci_device_id scx200_pci[] = { | ||
548 | { PCI_DEVICE(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_SCx200_BRIDGE), | ||
549 | .driver_data = 0 }, | ||
550 | { PCI_DEVICE(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_SC1100_BRIDGE), | ||
551 | .driver_data = 0 }, | ||
552 | { PCI_DEVICE(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_CS5535_ISA), | ||
553 | .driver_data = 1 }, | ||
554 | { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_CS5536_ISA), | ||
555 | .driver_data = 2 } | ||
490 | }; | 556 | }; |
491 | 557 | ||
492 | #define MSR_LBAR_SMB 0x5140000B | 558 | static struct { |
559 | const char *name; | ||
560 | int bar; | ||
561 | } scx200_data[] = { | ||
562 | { "SCx200", -1 }, | ||
563 | { "CS5535", 0 }, | ||
564 | { "CS5536", 0 } | ||
565 | }; | ||
493 | 566 | ||
494 | static __init int scx200_add_cs553x(void) | 567 | static __init int scx200_scan_pci(void) |
495 | { | 568 | { |
496 | u32 low, hi; | 569 | int data, dev; |
497 | u32 smb_base; | 570 | int rc = -ENODEV; |
498 | 571 | struct pci_dev *pdev; | |
499 | /* Grab & reserve the SMB I/O range */ | 572 | |
500 | rdmsr(MSR_LBAR_SMB, low, hi); | 573 | for(dev = 0; dev < ARRAY_SIZE(scx200_pci); dev++) { |
574 | pdev = pci_get_device(scx200_pci[dev].vendor, | ||
575 | scx200_pci[dev].device, NULL); | ||
576 | |||
577 | if (pdev == NULL) | ||
578 | continue; | ||
579 | |||
580 | data = scx200_pci[dev].driver_data; | ||
581 | |||
582 | /* if .bar is greater or equal to zero, this is a | ||
583 | * PCI device - otherwise, we assume | ||
584 | that the ports are ISA based | ||
585 | */ | ||
586 | |||
587 | if (scx200_data[data].bar >= 0) | ||
588 | rc = scx200_create_pci(scx200_data[data].name, pdev, | ||
589 | scx200_data[data].bar); | ||
590 | else { | ||
591 | int i; | ||
592 | |||
593 | for (i = 0; i < MAX_DEVICES; ++i) { | ||
594 | if (base[i] == 0) | ||
595 | continue; | ||
596 | |||
597 | rc = scx200_create_isa(scx200_data[data].name, | ||
598 | base[i], | ||
599 | i); | ||
600 | } | ||
601 | } | ||
501 | 602 | ||
502 | /* Check the IO mask and whether SMB is enabled */ | 603 | break; |
503 | if (hi != 0x0000F001) { | ||
504 | printk(KERN_WARNING NAME ": SMBus not enabled\n"); | ||
505 | return -ENODEV; | ||
506 | } | 604 | } |
507 | 605 | ||
508 | /* SMBus IO size is 8 bytes */ | 606 | return rc; |
509 | smb_base = low & 0x0000FFF8; | ||
510 | |||
511 | return scx200_acb_create("CS5535", smb_base, 0); | ||
512 | } | 607 | } |
513 | 608 | ||
514 | static int __init scx200_acb_init(void) | 609 | static int __init scx200_acb_init(void) |
515 | { | 610 | { |
516 | int i; | 611 | int rc; |
517 | int rc = -ENODEV; | ||
518 | 612 | ||
519 | pr_debug(NAME ": NatSemi SCx200 ACCESS.bus Driver\n"); | 613 | pr_debug(NAME ": NatSemi SCx200 ACCESS.bus Driver\n"); |
520 | 614 | ||
521 | /* Verify that this really is a SCx200 processor */ | 615 | rc = scx200_scan_pci(); |
522 | if (pci_dev_present(scx200)) { | ||
523 | for (i = 0; i < MAX_DEVICES; ++i) { | ||
524 | if (base[i] > 0) | ||
525 | rc = scx200_acb_create("SCx200", base[i], i); | ||
526 | } | ||
527 | } else if (pci_dev_present(divil_pci)) | ||
528 | rc = scx200_add_cs553x(); | ||
529 | 616 | ||
530 | /* If at least one bus was created, init must succeed */ | 617 | /* If at least one bus was created, init must succeed */ |
531 | if (scx200_acb_list) | 618 | if (scx200_acb_list) |
@@ -543,7 +630,14 @@ static void __exit scx200_acb_cleanup(void) | |||
543 | up(&scx200_acb_list_mutex); | 630 | up(&scx200_acb_list_mutex); |
544 | 631 | ||
545 | i2c_del_adapter(&iface->adapter); | 632 | i2c_del_adapter(&iface->adapter); |
546 | release_region(iface->base, 8); | 633 | |
634 | if (iface->pdev) { | ||
635 | pci_release_region(iface->pdev, iface->bar); | ||
636 | pci_dev_put(iface->pdev); | ||
637 | } | ||
638 | else | ||
639 | release_region(iface->base, 8); | ||
640 | |||
547 | kfree(iface); | 641 | kfree(iface); |
548 | down(&scx200_acb_list_mutex); | 642 | down(&scx200_acb_list_mutex); |
549 | } | 643 | } |
diff --git a/drivers/i2c/chips/Kconfig b/drivers/i2c/chips/Kconfig index 7aa5c38f0855..87ee3ce58618 100644 --- a/drivers/i2c/chips/Kconfig +++ b/drivers/i2c/chips/Kconfig | |||
@@ -39,6 +39,7 @@ config SENSORS_EEPROM | |||
39 | config SENSORS_PCF8574 | 39 | config SENSORS_PCF8574 |
40 | tristate "Philips PCF8574 and PCF8574A" | 40 | tristate "Philips PCF8574 and PCF8574A" |
41 | depends on I2C && EXPERIMENTAL | 41 | depends on I2C && EXPERIMENTAL |
42 | default n | ||
42 | help | 43 | help |
43 | If you say yes here you get support for Philips PCF8574 and | 44 | If you say yes here you get support for Philips PCF8574 and |
44 | PCF8574A chips. | 45 | PCF8574A chips. |
@@ -46,6 +47,9 @@ config SENSORS_PCF8574 | |||
46 | This driver can also be built as a module. If so, the module | 47 | This driver can also be built as a module. If so, the module |
47 | will be called pcf8574. | 48 | will be called pcf8574. |
48 | 49 | ||
50 | These devices are hard to detect and rarely found on mainstream | ||
51 | hardware. If unsure, say N. | ||
52 | |||
49 | config SENSORS_PCA9539 | 53 | config SENSORS_PCA9539 |
50 | tristate "Philips PCA9539 16-bit I/O port" | 54 | tristate "Philips PCA9539 16-bit I/O port" |
51 | depends on I2C && EXPERIMENTAL | 55 | depends on I2C && EXPERIMENTAL |
@@ -59,12 +63,16 @@ config SENSORS_PCA9539 | |||
59 | config SENSORS_PCF8591 | 63 | config SENSORS_PCF8591 |
60 | tristate "Philips PCF8591" | 64 | tristate "Philips PCF8591" |
61 | depends on I2C && EXPERIMENTAL | 65 | depends on I2C && EXPERIMENTAL |
66 | default n | ||
62 | help | 67 | help |
63 | If you say yes here you get support for Philips PCF8591 chips. | 68 | If you say yes here you get support for Philips PCF8591 chips. |
64 | 69 | ||
65 | This driver can also be built as a module. If so, the module | 70 | This driver can also be built as a module. If so, the module |
66 | will be called pcf8591. | 71 | will be called pcf8591. |
67 | 72 | ||
73 | These devices are hard to detect and rarely found on mainstream | ||
74 | hardware. If unsure, say N. | ||
75 | |||
68 | config ISP1301_OMAP | 76 | config ISP1301_OMAP |
69 | tristate "Philips ISP1301 with OMAP OTG" | 77 | tristate "Philips ISP1301 with OMAP OTG" |
70 | depends on I2C && ARCH_OMAP_OTG | 78 | depends on I2C && ARCH_OMAP_OTG |
diff --git a/drivers/i2c/chips/m41t00.c b/drivers/i2c/chips/m41t00.c index 99ab4ec34390..2dd0a34d9472 100644 --- a/drivers/i2c/chips/m41t00.c +++ b/drivers/i2c/chips/m41t00.c | |||
@@ -1,11 +1,9 @@ | |||
1 | /* | 1 | /* |
2 | * drivers/i2c/chips/m41t00.c | 2 | * I2C client/driver for the ST M41T00 family of i2c rtc chips. |
3 | * | ||
4 | * I2C client/driver for the ST M41T00 Real-Time Clock chip. | ||
5 | * | 3 | * |
6 | * Author: Mark A. Greer <mgreer@mvista.com> | 4 | * Author: Mark A. Greer <mgreer@mvista.com> |
7 | * | 5 | * |
8 | * 2005 (c) MontaVista Software, Inc. This file is licensed under | 6 | * 2005, 2006 (c) MontaVista Software, Inc. This file is licensed under |
9 | * the terms of the GNU General Public License version 2. This program | 7 | * the terms of the GNU General Public License version 2. This program |
10 | * is licensed "as is" without any warranty of any kind, whether express | 8 | * is licensed "as is" without any warranty of any kind, whether express |
11 | * or implied. | 9 | * or implied. |
@@ -13,9 +11,6 @@ | |||
13 | /* | 11 | /* |
14 | * This i2c client/driver wedges between the drivers/char/genrtc.c RTC | 12 | * This i2c client/driver wedges between the drivers/char/genrtc.c RTC |
15 | * interface and the SMBus interface of the i2c subsystem. | 13 | * interface and the SMBus interface of the i2c subsystem. |
16 | * It would be more efficient to use i2c msgs/i2c_transfer directly but, as | ||
17 | * recommened in .../Documentation/i2c/writing-clients section | ||
18 | * "Sending and receiving", using SMBus level communication is preferred. | ||
19 | */ | 14 | */ |
20 | 15 | ||
21 | #include <linux/kernel.h> | 16 | #include <linux/kernel.h> |
@@ -24,56 +19,110 @@ | |||
24 | #include <linux/i2c.h> | 19 | #include <linux/i2c.h> |
25 | #include <linux/rtc.h> | 20 | #include <linux/rtc.h> |
26 | #include <linux/bcd.h> | 21 | #include <linux/bcd.h> |
27 | #include <linux/mutex.h> | ||
28 | #include <linux/workqueue.h> | 22 | #include <linux/workqueue.h> |
29 | 23 | #include <linux/platform_device.h> | |
24 | #include <linux/m41t00.h> | ||
30 | #include <asm/time.h> | 25 | #include <asm/time.h> |
31 | #include <asm/rtc.h> | 26 | #include <asm/rtc.h> |
32 | 27 | ||
33 | #define M41T00_DRV_NAME "m41t00" | ||
34 | |||
35 | static DEFINE_MUTEX(m41t00_mutex); | ||
36 | |||
37 | static struct i2c_driver m41t00_driver; | 28 | static struct i2c_driver m41t00_driver; |
38 | static struct i2c_client *save_client; | 29 | static struct i2c_client *save_client; |
39 | 30 | ||
40 | static unsigned short ignore[] = { I2C_CLIENT_END }; | 31 | static unsigned short ignore[] = { I2C_CLIENT_END }; |
41 | static unsigned short normal_addr[] = { 0x68, I2C_CLIENT_END }; | 32 | static unsigned short normal_addr[] = { I2C_CLIENT_END, I2C_CLIENT_END }; |
42 | 33 | ||
43 | static struct i2c_client_address_data addr_data = { | 34 | static struct i2c_client_address_data addr_data = { |
44 | .normal_i2c = normal_addr, | 35 | .normal_i2c = normal_addr, |
45 | .probe = ignore, | 36 | .probe = ignore, |
46 | .ignore = ignore, | 37 | .ignore = ignore, |
38 | }; | ||
39 | |||
40 | struct m41t00_chip_info { | ||
41 | u8 type; | ||
42 | char *name; | ||
43 | u8 read_limit; | ||
44 | u8 sec; /* Offsets for chip regs */ | ||
45 | u8 min; | ||
46 | u8 hour; | ||
47 | u8 day; | ||
48 | u8 mon; | ||
49 | u8 year; | ||
50 | u8 alarm_mon; | ||
51 | u8 alarm_hour; | ||
52 | u8 sqw; | ||
53 | u8 sqw_freq; | ||
47 | }; | 54 | }; |
48 | 55 | ||
56 | static struct m41t00_chip_info m41t00_chip_info_tbl[] = { | ||
57 | { | ||
58 | .type = M41T00_TYPE_M41T00, | ||
59 | .name = "m41t00", | ||
60 | .read_limit = 5, | ||
61 | .sec = 0, | ||
62 | .min = 1, | ||
63 | .hour = 2, | ||
64 | .day = 4, | ||
65 | .mon = 5, | ||
66 | .year = 6, | ||
67 | }, | ||
68 | { | ||
69 | .type = M41T00_TYPE_M41T81, | ||
70 | .name = "m41t81", | ||
71 | .read_limit = 1, | ||
72 | .sec = 1, | ||
73 | .min = 2, | ||
74 | .hour = 3, | ||
75 | .day = 5, | ||
76 | .mon = 6, | ||
77 | .year = 7, | ||
78 | .alarm_mon = 0xa, | ||
79 | .alarm_hour = 0xc, | ||
80 | .sqw = 0x13, | ||
81 | }, | ||
82 | { | ||
83 | .type = M41T00_TYPE_M41T85, | ||
84 | .name = "m41t85", | ||
85 | .read_limit = 1, | ||
86 | .sec = 1, | ||
87 | .min = 2, | ||
88 | .hour = 3, | ||
89 | .day = 5, | ||
90 | .mon = 6, | ||
91 | .year = 7, | ||
92 | .alarm_mon = 0xa, | ||
93 | .alarm_hour = 0xc, | ||
94 | .sqw = 0x13, | ||
95 | }, | ||
96 | }; | ||
97 | static struct m41t00_chip_info *m41t00_chip; | ||
98 | |||
49 | ulong | 99 | ulong |
50 | m41t00_get_rtc_time(void) | 100 | m41t00_get_rtc_time(void) |
51 | { | 101 | { |
52 | s32 sec, min, hour, day, mon, year; | 102 | s32 sec, min, hour, day, mon, year; |
53 | s32 sec1, min1, hour1, day1, mon1, year1; | 103 | s32 sec1, min1, hour1, day1, mon1, year1; |
54 | ulong limit = 10; | 104 | u8 reads = 0; |
105 | u8 buf[8], msgbuf[1] = { 0 }; /* offset into rtc's regs */ | ||
106 | struct i2c_msg msgs[] = { | ||
107 | { | ||
108 | .addr = save_client->addr, | ||
109 | .flags = 0, | ||
110 | .len = 1, | ||
111 | .buf = msgbuf, | ||
112 | }, | ||
113 | { | ||
114 | .addr = save_client->addr, | ||
115 | .flags = I2C_M_RD, | ||
116 | .len = 8, | ||
117 | .buf = buf, | ||
118 | }, | ||
119 | }; | ||
55 | 120 | ||
56 | sec = min = hour = day = mon = year = 0; | 121 | sec = min = hour = day = mon = year = 0; |
57 | sec1 = min1 = hour1 = day1 = mon1 = year1 = 0; | ||
58 | 122 | ||
59 | mutex_lock(&m41t00_mutex); | ||
60 | do { | 123 | do { |
61 | if (((sec = i2c_smbus_read_byte_data(save_client, 0)) >= 0) | 124 | if (i2c_transfer(save_client->adapter, msgs, 2) < 0) |
62 | && ((min = i2c_smbus_read_byte_data(save_client, 1)) | 125 | goto read_err; |
63 | >= 0) | ||
64 | && ((hour = i2c_smbus_read_byte_data(save_client, 2)) | ||
65 | >= 0) | ||
66 | && ((day = i2c_smbus_read_byte_data(save_client, 4)) | ||
67 | >= 0) | ||
68 | && ((mon = i2c_smbus_read_byte_data(save_client, 5)) | ||
69 | >= 0) | ||
70 | && ((year = i2c_smbus_read_byte_data(save_client, 6)) | ||
71 | >= 0) | ||
72 | && ((sec == sec1) && (min == min1) && (hour == hour1) | ||
73 | && (day == day1) && (mon == mon1) | ||
74 | && (year == year1))) | ||
75 | |||
76 | break; | ||
77 | 126 | ||
78 | sec1 = sec; | 127 | sec1 = sec; |
79 | min1 = min; | 128 | min1 = min; |
@@ -81,69 +130,88 @@ m41t00_get_rtc_time(void) | |||
81 | day1 = day; | 130 | day1 = day; |
82 | mon1 = mon; | 131 | mon1 = mon; |
83 | year1 = year; | 132 | year1 = year; |
84 | } while (--limit > 0); | ||
85 | mutex_unlock(&m41t00_mutex); | ||
86 | |||
87 | if (limit == 0) { | ||
88 | dev_warn(&save_client->dev, | ||
89 | "m41t00: can't read rtc chip\n"); | ||
90 | sec = min = hour = day = mon = year = 0; | ||
91 | } | ||
92 | |||
93 | sec &= 0x7f; | ||
94 | min &= 0x7f; | ||
95 | hour &= 0x3f; | ||
96 | day &= 0x3f; | ||
97 | mon &= 0x1f; | ||
98 | year &= 0xff; | ||
99 | 133 | ||
100 | BCD_TO_BIN(sec); | 134 | sec = buf[m41t00_chip->sec] & 0x7f; |
101 | BCD_TO_BIN(min); | 135 | min = buf[m41t00_chip->min] & 0x7f; |
102 | BCD_TO_BIN(hour); | 136 | hour = buf[m41t00_chip->hour] & 0x3f; |
103 | BCD_TO_BIN(day); | 137 | day = buf[m41t00_chip->day] & 0x3f; |
104 | BCD_TO_BIN(mon); | 138 | mon = buf[m41t00_chip->mon] & 0x1f; |
105 | BCD_TO_BIN(year); | 139 | year = buf[m41t00_chip->year]; |
140 | } while ((++reads < m41t00_chip->read_limit) && ((sec != sec1) | ||
141 | || (min != min1) || (hour != hour1) || (day != day1) | ||
142 | || (mon != mon1) || (year != year1))); | ||
143 | |||
144 | if ((m41t00_chip->read_limit > 1) && ((sec != sec1) || (min != min1) | ||
145 | || (hour != hour1) || (day != day1) || (mon != mon1) | ||
146 | || (year != year1))) | ||
147 | goto read_err; | ||
148 | |||
149 | sec = BCD2BIN(sec); | ||
150 | min = BCD2BIN(min); | ||
151 | hour = BCD2BIN(hour); | ||
152 | day = BCD2BIN(day); | ||
153 | mon = BCD2BIN(mon); | ||
154 | year = BCD2BIN(year); | ||
106 | 155 | ||
107 | year += 1900; | 156 | year += 1900; |
108 | if (year < 1970) | 157 | if (year < 1970) |
109 | year += 100; | 158 | year += 100; |
110 | 159 | ||
111 | return mktime(year, mon, day, hour, min, sec); | 160 | return mktime(year, mon, day, hour, min, sec); |
161 | |||
162 | read_err: | ||
163 | dev_err(&save_client->dev, "m41t00_get_rtc_time: Read error\n"); | ||
164 | return 0; | ||
112 | } | 165 | } |
166 | EXPORT_SYMBOL_GPL(m41t00_get_rtc_time); | ||
113 | 167 | ||
114 | static void | 168 | static void |
115 | m41t00_set(void *arg) | 169 | m41t00_set(void *arg) |
116 | { | 170 | { |
117 | struct rtc_time tm; | 171 | struct rtc_time tm; |
118 | ulong nowtime = *(ulong *)arg; | 172 | int nowtime = *(int *)arg; |
173 | s32 sec, min, hour, day, mon, year; | ||
174 | u8 wbuf[9], *buf = &wbuf[1], msgbuf[1] = { 0 }; | ||
175 | struct i2c_msg msgs[] = { | ||
176 | { | ||
177 | .addr = save_client->addr, | ||
178 | .flags = 0, | ||
179 | .len = 1, | ||
180 | .buf = msgbuf, | ||
181 | }, | ||
182 | { | ||
183 | .addr = save_client->addr, | ||
184 | .flags = I2C_M_RD, | ||
185 | .len = 8, | ||
186 | .buf = buf, | ||
187 | }, | ||
188 | }; | ||
119 | 189 | ||
120 | to_tm(nowtime, &tm); | 190 | to_tm(nowtime, &tm); |
121 | tm.tm_year = (tm.tm_year - 1900) % 100; | 191 | tm.tm_year = (tm.tm_year - 1900) % 100; |
122 | 192 | ||
123 | BIN_TO_BCD(tm.tm_sec); | 193 | sec = BIN2BCD(tm.tm_sec); |
124 | BIN_TO_BCD(tm.tm_min); | 194 | min = BIN2BCD(tm.tm_min); |
125 | BIN_TO_BCD(tm.tm_hour); | 195 | hour = BIN2BCD(tm.tm_hour); |
126 | BIN_TO_BCD(tm.tm_mon); | 196 | day = BIN2BCD(tm.tm_mday); |
127 | BIN_TO_BCD(tm.tm_mday); | 197 | mon = BIN2BCD(tm.tm_mon); |
128 | BIN_TO_BCD(tm.tm_year); | 198 | year = BIN2BCD(tm.tm_year); |
129 | 199 | ||
130 | mutex_lock(&m41t00_mutex); | 200 | /* Read reg values into buf[0..7]/wbuf[1..8] */ |
131 | if ((i2c_smbus_write_byte_data(save_client, 0, tm.tm_sec & 0x7f) < 0) | 201 | if (i2c_transfer(save_client->adapter, msgs, 2) < 0) { |
132 | || (i2c_smbus_write_byte_data(save_client, 1, tm.tm_min & 0x7f) | 202 | dev_err(&save_client->dev, "m41t00_set: Read error\n"); |
133 | < 0) | 203 | return; |
134 | || (i2c_smbus_write_byte_data(save_client, 2, tm.tm_hour & 0x3f) | 204 | } |
135 | < 0) | 205 | |
136 | || (i2c_smbus_write_byte_data(save_client, 4, tm.tm_mday & 0x3f) | 206 | wbuf[0] = 0; /* offset into rtc's regs */ |
137 | < 0) | 207 | buf[m41t00_chip->sec] = (buf[m41t00_chip->sec] & ~0x7f) | (sec & 0x7f); |
138 | || (i2c_smbus_write_byte_data(save_client, 5, tm.tm_mon & 0x1f) | 208 | buf[m41t00_chip->min] = (buf[m41t00_chip->min] & ~0x7f) | (min & 0x7f); |
139 | < 0) | 209 | buf[m41t00_chip->hour] = (buf[m41t00_chip->hour] & ~0x3f) | (hour& 0x3f); |
140 | || (i2c_smbus_write_byte_data(save_client, 6, tm.tm_year & 0xff) | 210 | buf[m41t00_chip->day] = (buf[m41t00_chip->day] & ~0x3f) | (day & 0x3f); |
141 | < 0)) | 211 | buf[m41t00_chip->mon] = (buf[m41t00_chip->mon] & ~0x1f) | (mon & 0x1f); |
142 | 212 | ||
143 | dev_warn(&save_client->dev,"m41t00: can't write to rtc chip\n"); | 213 | if (i2c_master_send(save_client, wbuf, 9) < 0) |
144 | 214 | dev_err(&save_client->dev, "m41t00_set: Write error\n"); | |
145 | mutex_unlock(&m41t00_mutex); | ||
146 | return; | ||
147 | } | 215 | } |
148 | 216 | ||
149 | static ulong new_time; | 217 | static ulong new_time; |
@@ -162,6 +230,48 @@ m41t00_set_rtc_time(ulong nowtime) | |||
162 | 230 | ||
163 | return 0; | 231 | return 0; |
164 | } | 232 | } |
233 | EXPORT_SYMBOL_GPL(m41t00_set_rtc_time); | ||
234 | |||
235 | /* | ||
236 | ***************************************************************************** | ||
237 | * | ||
238 | * platform_data Driver Interface | ||
239 | * | ||
240 | ***************************************************************************** | ||
241 | */ | ||
242 | static int __init | ||
243 | m41t00_platform_probe(struct platform_device *pdev) | ||
244 | { | ||
245 | struct m41t00_platform_data *pdata; | ||
246 | int i; | ||
247 | |||
248 | if (pdev && (pdata = pdev->dev.platform_data)) { | ||
249 | normal_addr[0] = pdata->i2c_addr; | ||
250 | |||
251 | for (i=0; i<ARRAY_SIZE(m41t00_chip_info_tbl); i++) | ||
252 | if (m41t00_chip_info_tbl[i].type == pdata->type) { | ||
253 | m41t00_chip = &m41t00_chip_info_tbl[i]; | ||
254 | m41t00_chip->sqw_freq = pdata->sqw_freq; | ||
255 | return 0; | ||
256 | } | ||
257 | } | ||
258 | return -ENODEV; | ||
259 | } | ||
260 | |||
261 | static int __exit | ||
262 | m41t00_platform_remove(struct platform_device *pdev) | ||
263 | { | ||
264 | return 0; | ||
265 | } | ||
266 | |||
267 | static struct platform_driver m41t00_platform_driver = { | ||
268 | .probe = m41t00_platform_probe, | ||
269 | .remove = m41t00_platform_remove, | ||
270 | .driver = { | ||
271 | .owner = THIS_MODULE, | ||
272 | .name = M41T00_DRV_NAME, | ||
273 | }, | ||
274 | }; | ||
165 | 275 | ||
166 | /* | 276 | /* |
167 | ***************************************************************************** | 277 | ***************************************************************************** |
@@ -176,23 +286,71 @@ m41t00_probe(struct i2c_adapter *adap, int addr, int kind) | |||
176 | struct i2c_client *client; | 286 | struct i2c_client *client; |
177 | int rc; | 287 | int rc; |
178 | 288 | ||
289 | if (!i2c_check_functionality(adap, I2C_FUNC_I2C | ||
290 | | I2C_FUNC_SMBUS_BYTE_DATA)) | ||
291 | return 0; | ||
292 | |||
179 | client = kzalloc(sizeof(struct i2c_client), GFP_KERNEL); | 293 | client = kzalloc(sizeof(struct i2c_client), GFP_KERNEL); |
180 | if (!client) | 294 | if (!client) |
181 | return -ENOMEM; | 295 | return -ENOMEM; |
182 | 296 | ||
183 | strncpy(client->name, M41T00_DRV_NAME, I2C_NAME_SIZE); | 297 | strlcpy(client->name, m41t00_chip->name, I2C_NAME_SIZE); |
184 | client->addr = addr; | 298 | client->addr = addr; |
185 | client->adapter = adap; | 299 | client->adapter = adap; |
186 | client->driver = &m41t00_driver; | 300 | client->driver = &m41t00_driver; |
187 | 301 | ||
188 | if ((rc = i2c_attach_client(client)) != 0) { | 302 | if ((rc = i2c_attach_client(client))) |
189 | kfree(client); | 303 | goto attach_err; |
190 | return rc; | 304 | |
305 | if (m41t00_chip->type != M41T00_TYPE_M41T00) { | ||
306 | /* If asked, disable SQW, set SQW frequency & re-enable */ | ||
307 | if (m41t00_chip->sqw_freq) | ||
308 | if (((rc = i2c_smbus_read_byte_data(client, | ||
309 | m41t00_chip->alarm_mon)) < 0) | ||
310 | || ((rc = i2c_smbus_write_byte_data(client, | ||
311 | m41t00_chip->alarm_mon, rc & ~0x40)) <0) | ||
312 | || ((rc = i2c_smbus_write_byte_data(client, | ||
313 | m41t00_chip->sqw, | ||
314 | m41t00_chip->sqw_freq)) < 0) | ||
315 | || ((rc = i2c_smbus_write_byte_data(client, | ||
316 | m41t00_chip->alarm_mon, rc | 0x40)) <0)) | ||
317 | goto sqw_err; | ||
318 | |||
319 | /* Make sure HT (Halt Update) bit is cleared */ | ||
320 | if ((rc = i2c_smbus_read_byte_data(client, | ||
321 | m41t00_chip->alarm_hour)) < 0) | ||
322 | goto ht_err; | ||
323 | |||
324 | if (rc & 0x40) | ||
325 | if ((rc = i2c_smbus_write_byte_data(client, | ||
326 | m41t00_chip->alarm_hour, rc & ~0x40))<0) | ||
327 | goto ht_err; | ||
191 | } | 328 | } |
192 | 329 | ||
193 | m41t00_wq = create_singlethread_workqueue("m41t00"); | 330 | /* Make sure ST (stop) bit is cleared */ |
331 | if ((rc = i2c_smbus_read_byte_data(client, m41t00_chip->sec)) < 0) | ||
332 | goto st_err; | ||
333 | |||
334 | if (rc & 0x80) | ||
335 | if ((rc = i2c_smbus_write_byte_data(client, m41t00_chip->sec, | ||
336 | rc & ~0x80)) < 0) | ||
337 | goto st_err; | ||
338 | |||
339 | m41t00_wq = create_singlethread_workqueue(m41t00_chip->name); | ||
194 | save_client = client; | 340 | save_client = client; |
195 | return 0; | 341 | return 0; |
342 | |||
343 | st_err: | ||
344 | dev_err(&client->dev, "m41t00_probe: Can't clear ST bit\n"); | ||
345 | goto attach_err; | ||
346 | ht_err: | ||
347 | dev_err(&client->dev, "m41t00_probe: Can't clear HT bit\n"); | ||
348 | goto attach_err; | ||
349 | sqw_err: | ||
350 | dev_err(&client->dev, "m41t00_probe: Can't set SQW Frequency\n"); | ||
351 | attach_err: | ||
352 | kfree(client); | ||
353 | return rc; | ||
196 | } | 354 | } |
197 | 355 | ||
198 | static int | 356 | static int |
@@ -204,7 +362,7 @@ m41t00_attach(struct i2c_adapter *adap) | |||
204 | static int | 362 | static int |
205 | m41t00_detach(struct i2c_client *client) | 363 | m41t00_detach(struct i2c_client *client) |
206 | { | 364 | { |
207 | int rc; | 365 | int rc; |
208 | 366 | ||
209 | if ((rc = i2c_detach_client(client)) == 0) { | 367 | if ((rc = i2c_detach_client(client)) == 0) { |
210 | kfree(client); | 368 | kfree(client); |
@@ -225,14 +383,18 @@ static struct i2c_driver m41t00_driver = { | |||
225 | static int __init | 383 | static int __init |
226 | m41t00_init(void) | 384 | m41t00_init(void) |
227 | { | 385 | { |
228 | return i2c_add_driver(&m41t00_driver); | 386 | int rc; |
387 | |||
388 | if (!(rc = platform_driver_register(&m41t00_platform_driver))) | ||
389 | rc = i2c_add_driver(&m41t00_driver); | ||
390 | return rc; | ||
229 | } | 391 | } |
230 | 392 | ||
231 | static void __exit | 393 | static void __exit |
232 | m41t00_exit(void) | 394 | m41t00_exit(void) |
233 | { | 395 | { |
234 | i2c_del_driver(&m41t00_driver); | 396 | i2c_del_driver(&m41t00_driver); |
235 | return; | 397 | platform_driver_unregister(&m41t00_platform_driver); |
236 | } | 398 | } |
237 | 399 | ||
238 | module_init(m41t00_init); | 400 | module_init(m41t00_init); |
diff --git a/drivers/i2c/i2c-core.c b/drivers/i2c/i2c-core.c index 45e2cdf54736..a45155f799d4 100644 --- a/drivers/i2c/i2c-core.c +++ b/drivers/i2c/i2c-core.c | |||
@@ -916,7 +916,7 @@ s32 i2c_smbus_write_word_data(struct i2c_client *client, u8 command, u16 value) | |||
916 | } | 916 | } |
917 | 917 | ||
918 | s32 i2c_smbus_write_block_data(struct i2c_client *client, u8 command, | 918 | s32 i2c_smbus_write_block_data(struct i2c_client *client, u8 command, |
919 | u8 length, u8 *values) | 919 | u8 length, const u8 *values) |
920 | { | 920 | { |
921 | union i2c_smbus_data data; | 921 | union i2c_smbus_data data; |
922 | 922 | ||
@@ -944,7 +944,7 @@ s32 i2c_smbus_read_i2c_block_data(struct i2c_client *client, u8 command, u8 *val | |||
944 | } | 944 | } |
945 | 945 | ||
946 | s32 i2c_smbus_write_i2c_block_data(struct i2c_client *client, u8 command, | 946 | s32 i2c_smbus_write_i2c_block_data(struct i2c_client *client, u8 command, |
947 | u8 length, u8 *values) | 947 | u8 length, const u8 *values) |
948 | { | 948 | { |
949 | union i2c_smbus_data data; | 949 | union i2c_smbus_data data; |
950 | 950 | ||
diff --git a/drivers/i2c/i2c-dev.c b/drivers/i2c/i2c-dev.c index ed7eed388bae..58ccddd5c237 100644 --- a/drivers/i2c/i2c-dev.c +++ b/drivers/i2c/i2c-dev.c | |||
@@ -426,10 +426,7 @@ static int i2cdev_attach_adapter(struct i2c_adapter *adap) | |||
426 | 426 | ||
427 | /* register this i2c device with the driver core */ | 427 | /* register this i2c device with the driver core */ |
428 | i2c_dev->adap = adap; | 428 | i2c_dev->adap = adap; |
429 | if (adap->dev.parent == &platform_bus) | 429 | dev = &adap->dev; |
430 | dev = &adap->dev; | ||
431 | else | ||
432 | dev = adap->dev.parent; | ||
433 | i2c_dev->class_dev = class_device_create(i2c_dev_class, NULL, | 430 | i2c_dev->class_dev = class_device_create(i2c_dev_class, NULL, |
434 | MKDEV(I2C_MAJOR, i2c_dev->minor), | 431 | MKDEV(I2C_MAJOR, i2c_dev->minor), |
435 | dev, "i2c-%d", i2c_dev->minor); | 432 | dev, "i2c-%d", i2c_dev->minor); |