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authorMauro Carvalho Chehab <mchehab@infradead.org>2008-01-06 07:45:44 -0500
committerMauro Carvalho Chehab <mchehab@infradead.org>2008-01-25 16:04:39 -0500
commita4950134d46f0b83745f05ea37987785a3905eba (patch)
treef646877b105d85c37af26d8147a0a33e633e15cb /drivers
parent11fcd4703004fc8c9030ba45dda8ad74a431d235 (diff)
V4L/DVB (6969): Avoid causing regressions for non-HVR950 boards
Only HVR950 has analog_gpio configured. It makes no sense to set gpio to 0 for other boards. Better to add a test, while this var is not set for all xc3028 devices. Signed-off-by: Mauro Carvalho Chehab <mchehab@infradead.org>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/media/video/em28xx/em28xx-cards.c34
1 files changed, 19 insertions, 15 deletions
diff --git a/drivers/media/video/em28xx/em28xx-cards.c b/drivers/media/video/em28xx/em28xx-cards.c
index 1011813ad7c2..5ffdbaab3ad3 100644
--- a/drivers/media/video/em28xx/em28xx-cards.c
+++ b/drivers/media/video/em28xx/em28xx-cards.c
@@ -485,27 +485,31 @@ static int em28xx_tuner_callback(void *ptr, int command, int arg)
485 switch (command) { 485 switch (command) {
486 case XC2028_TUNER_RESET: 486 case XC2028_TUNER_RESET:
487 { 487 {
488 char gpio0, gpio1, gpio4; 488 /* GPIO and initialization codes for analog TV and radio
489 489 This code should be complemented for DTV, since reset
490 /* GPIO and initialization codes for analog TV */ 490 codes are different.
491 gpio0 = dev->analog_gpio & 0xff; 491 */
492 gpio1 = (dev->analog_gpio >> 8) & 0xff;
493 gpio4 = dev->analog_gpio >> 24;
494 492
495 dev->em28xx_write_regs_req(dev, 0x00, 0x48, "\x00", 1); 493 dev->em28xx_write_regs_req(dev, 0x00, 0x48, "\x00", 1);
496 dev->em28xx_write_regs_req(dev, 0x00, 0x12, "\x67", 1); 494 dev->em28xx_write_regs_req(dev, 0x00, 0x12, "\x67", 1);
497 495
498 if (gpio4) { 496 if (dev->analog_gpio) {
499 dev->em28xx_write_regs(dev, 0x04, &gpio4, 1); 497 char gpio0 = dev->analog_gpio & 0xff;
500 msleep(140); 498 char gpio1 = (dev->analog_gpio >> 8) & 0xff;
499 char gpio4 = dev->analog_gpio >> 24;
500
501 if (gpio4) {
502 dev->em28xx_write_regs(dev, 0x04, &gpio4, 1);
503 msleep(140);
504 }
505
506 msleep(6);
507 dev->em28xx_write_regs(dev, 0x08, &gpio0, 1);
508 msleep(10);
509 dev->em28xx_write_regs(dev, 0x08, &gpio1, 1);
510 msleep(5);
501 } 511 }
502 512
503 msleep(6);
504 dev->em28xx_write_regs(dev, 0x08, &gpio0, 1);
505 msleep(10);
506 dev->em28xx_write_regs(dev, 0x08, &gpio1, 1);
507 msleep(5);
508
509 break; 513 break;
510 } 514 }
511 } 515 }