diff options
author | Alex Deucher <alex@botchco.com> | 2008-06-18 22:39:23 -0400 |
---|---|---|
committer | Dave Airlie <airlied@redhat.com> | 2008-06-18 22:39:23 -0400 |
commit | 5e35eff13f7dd0f5c1d82b3b4708b2f7a5f44113 (patch) | |
tree | 00205c57f05c5dc3b2db0d432c71df87440f6262 /drivers | |
parent | 5cfb6956073a9e42d44a26790b7800980634d037 (diff) |
drm/radeon: use DSTCACHE_CTLSTAT rather than RB2D_DSTCACHE_CTLSTAT
According to the hw guys, you should use DSTCACHE_CTLSTAT to flush
the 2D dst cache rather than RB2D_DSTCACHE_CTLSTAT.
Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/char/drm/radeon_cp.c | 6 | ||||
-rw-r--r-- | drivers/char/drm/radeon_drv.h | 11 |
2 files changed, 9 insertions, 8 deletions
diff --git a/drivers/char/drm/radeon_cp.c b/drivers/char/drm/radeon_cp.c index 441645ea8b87..e53158f0ecb5 100644 --- a/drivers/char/drm/radeon_cp.c +++ b/drivers/char/drm/radeon_cp.c | |||
@@ -204,12 +204,12 @@ static int radeon_do_pixcache_flush(drm_radeon_private_t * dev_priv) | |||
204 | RADEON_WRITE(R300_RB3D_DSTCACHE_CTLSTAT, tmp); | 204 | RADEON_WRITE(R300_RB3D_DSTCACHE_CTLSTAT, tmp); |
205 | 205 | ||
206 | /* 2D */ | 206 | /* 2D */ |
207 | tmp = RADEON_READ(RADEON_RB2D_DSTCACHE_CTLSTAT); | 207 | tmp = RADEON_READ(R300_DSTCACHE_CTLSTAT); |
208 | tmp |= RADEON_RB3D_DC_FLUSH_ALL; | 208 | tmp |= RADEON_RB3D_DC_FLUSH_ALL; |
209 | RADEON_WRITE(RADEON_RB3D_DSTCACHE_CTLSTAT, tmp); | 209 | RADEON_WRITE(R300_DSTCACHE_CTLSTAT, tmp); |
210 | 210 | ||
211 | for (i = 0; i < dev_priv->usec_timeout; i++) { | 211 | for (i = 0; i < dev_priv->usec_timeout; i++) { |
212 | if (!(RADEON_READ(RADEON_RB2D_DSTCACHE_CTLSTAT) | 212 | if (!(RADEON_READ(R300_DSTCACHE_CTLSTAT) |
213 | & RADEON_RB3D_DC_BUSY)) { | 213 | & RADEON_RB3D_DC_BUSY)) { |
214 | return 0; | 214 | return 0; |
215 | } | 215 | } |
diff --git a/drivers/char/drm/radeon_drv.h b/drivers/char/drm/radeon_drv.h index e20b5d878716..3f0eca957aa7 100644 --- a/drivers/char/drm/radeon_drv.h +++ b/drivers/char/drm/radeon_drv.h | |||
@@ -662,11 +662,12 @@ extern int r300_do_cp_cmdbuf(struct drm_device * dev, | |||
662 | #define RADEON_PP_TXFILTER_1 0x1c6c | 662 | #define RADEON_PP_TXFILTER_1 0x1c6c |
663 | #define RADEON_PP_TXFILTER_2 0x1c84 | 663 | #define RADEON_PP_TXFILTER_2 0x1c84 |
664 | 664 | ||
665 | #define RADEON_RB2D_DSTCACHE_CTLSTAT 0x342c | 665 | #define R300_RB2D_DSTCACHE_CTLSTAT 0x342c /* use R300_DSTCACHE_CTLSTAT */ |
666 | # define RADEON_RB2D_DC_FLUSH (3 << 0) | 666 | #define R300_DSTCACHE_CTLSTAT 0x1714 |
667 | # define RADEON_RB2D_DC_FREE (3 << 2) | 667 | # define R300_RB2D_DC_FLUSH (3 << 0) |
668 | # define RADEON_RB2D_DC_FLUSH_ALL 0xf | 668 | # define R300_RB2D_DC_FREE (3 << 2) |
669 | # define RADEON_RB2D_DC_BUSY (1 << 31) | 669 | # define R300_RB2D_DC_FLUSH_ALL 0xf |
670 | # define R300_RB2D_DC_BUSY (1 << 31) | ||
670 | #define RADEON_RB3D_CNTL 0x1c3c | 671 | #define RADEON_RB3D_CNTL 0x1c3c |
671 | # define RADEON_ALPHA_BLEND_ENABLE (1 << 0) | 672 | # define RADEON_ALPHA_BLEND_ENABLE (1 << 0) |
672 | # define RADEON_PLANE_MASK_ENABLE (1 << 1) | 673 | # define RADEON_PLANE_MASK_ENABLE (1 << 1) |