diff options
author | Benjamin Herrenschmidt <benh@kernel.crashing.org> | 2008-02-07 03:14:52 -0500 |
---|---|---|
committer | Linus Torvalds <torvalds@woody.linux-foundation.org> | 2008-02-07 11:42:23 -0500 |
commit | 1d5f726cbf1b736338bbcd83ebc6ad758079261f (patch) | |
tree | 770e194dae6a902886ab42d5c0e64f8dc214f656 /drivers | |
parent | c2ae24cfd1969a28e76641807026a3bbc11c5f31 (diff) |
drivers-edac: add Cell XDR memory types
Add the definitions for the Rambus XDR memory type used by the Cell processor.
It's a pre-requisite for the followup Cell EDAC patch.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Alan Cox <alan@lxorguk.ukuu.org.uk
Signed-off-by: Doug Thompson <dougthompson@xmission.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/edac/edac_core.h | 2 | ||||
-rw-r--r-- | drivers/edac/edac_mc_sysfs.c | 3 |
2 files changed, 4 insertions, 1 deletions
diff --git a/drivers/edac/edac_core.h b/drivers/edac/edac_core.h index 2d23e304f5ec..a9aa845dbe74 100644 --- a/drivers/edac/edac_core.h +++ b/drivers/edac/edac_core.h | |||
@@ -136,6 +136,7 @@ enum mem_type { | |||
136 | MEM_DDR2, /* DDR2 RAM */ | 136 | MEM_DDR2, /* DDR2 RAM */ |
137 | MEM_FB_DDR2, /* fully buffered DDR2 */ | 137 | MEM_FB_DDR2, /* fully buffered DDR2 */ |
138 | MEM_RDDR2, /* Registered DDR2 RAM */ | 138 | MEM_RDDR2, /* Registered DDR2 RAM */ |
139 | MEM_XDR, /* Rambus XDR */ | ||
139 | }; | 140 | }; |
140 | 141 | ||
141 | #define MEM_FLAG_EMPTY BIT(MEM_EMPTY) | 142 | #define MEM_FLAG_EMPTY BIT(MEM_EMPTY) |
@@ -152,6 +153,7 @@ enum mem_type { | |||
152 | #define MEM_FLAG_DDR2 BIT(MEM_DDR2) | 153 | #define MEM_FLAG_DDR2 BIT(MEM_DDR2) |
153 | #define MEM_FLAG_FB_DDR2 BIT(MEM_FB_DDR2) | 154 | #define MEM_FLAG_FB_DDR2 BIT(MEM_FB_DDR2) |
154 | #define MEM_FLAG_RDDR2 BIT(MEM_RDDR2) | 155 | #define MEM_FLAG_RDDR2 BIT(MEM_RDDR2) |
156 | #define MEM_FLAG_XDR BIT(MEM_XDR) | ||
155 | 157 | ||
156 | /* chipset Error Detection and Correction capabilities and mode */ | 158 | /* chipset Error Detection and Correction capabilities and mode */ |
157 | enum edac_type { | 159 | enum edac_type { |
diff --git a/drivers/edac/edac_mc_sysfs.c b/drivers/edac/edac_mc_sysfs.c index 9aac88027fb3..021d18795145 100644 --- a/drivers/edac/edac_mc_sysfs.c +++ b/drivers/edac/edac_mc_sysfs.c | |||
@@ -73,7 +73,8 @@ static const char *mem_types[] = { | |||
73 | [MEM_RMBS] = "RMBS", | 73 | [MEM_RMBS] = "RMBS", |
74 | [MEM_DDR2] = "Unbuffered-DDR2", | 74 | [MEM_DDR2] = "Unbuffered-DDR2", |
75 | [MEM_FB_DDR2] = "FullyBuffered-DDR2", | 75 | [MEM_FB_DDR2] = "FullyBuffered-DDR2", |
76 | [MEM_RDDR2] = "Registered-DDR2" | 76 | [MEM_RDDR2] = "Registered-DDR2", |
77 | [MEM_XDR] = "XDR" | ||
77 | }; | 78 | }; |
78 | 79 | ||
79 | static const char *dev_types[] = { | 80 | static const char *dev_types[] = { |