diff options
author | Sujith <Sujith.Manoharan@atheros.com> | 2008-08-11 04:33:34 -0400 |
---|---|---|
committer | John W. Linville <linville@tuxdriver.com> | 2008-08-29 16:23:56 -0400 |
commit | cd3d39a6875507f4f4d585391fe3d344f0b64b5c (patch) | |
tree | d2506b29e1df8c85ed657f957cb6eebde67387bb /drivers | |
parent | 7dcfdcd908a4540512aaf06b2b35e8c8a084fb69 (diff) |
ath9k: Use bitfields for buffer type
Signed-off-by: Sujith Manoharan <Sujith.Manoharan@atheros.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/net/wireless/ath9k/core.h | 70 | ||||
-rw-r--r-- | drivers/net/wireless/ath9k/xmit.c | 92 |
2 files changed, 83 insertions, 79 deletions
diff --git a/drivers/net/wireless/ath9k/core.h b/drivers/net/wireless/ath9k/core.h index 07c958802b79..9e16c6c28a39 100644 --- a/drivers/net/wireless/ath9k/core.h +++ b/drivers/net/wireless/ath9k/core.h | |||
@@ -177,11 +177,6 @@ void ath_update_chainmask(struct ath_softc *sc, int is_ht); | |||
177 | /* Descriptor Management */ | 177 | /* Descriptor Management */ |
178 | /*************************/ | 178 | /*************************/ |
179 | 179 | ||
180 | /* Number of descriptors per buffer. The only case where we see skbuff | ||
181 | chains is due to FF aggregation in the driver. */ | ||
182 | #define ATH_TXDESC 1 | ||
183 | /* if there's more fragment for this MSDU */ | ||
184 | #define ATH_BF_MORE_MPDU 1 | ||
185 | #define ATH_TXBUF_RESET(_bf) do { \ | 180 | #define ATH_TXBUF_RESET(_bf) do { \ |
186 | (_bf)->bf_status = 0; \ | 181 | (_bf)->bf_status = 0; \ |
187 | (_bf)->bf_lastbf = NULL; \ | 182 | (_bf)->bf_lastbf = NULL; \ |
@@ -191,28 +186,29 @@ chains is due to FF aggregation in the driver. */ | |||
191 | sizeof(struct ath_buf_state)); \ | 186 | sizeof(struct ath_buf_state)); \ |
192 | } while (0) | 187 | } while (0) |
193 | 188 | ||
189 | enum buffer_type { | ||
190 | BUF_DATA = BIT(0), | ||
191 | BUF_AGGR = BIT(1), | ||
192 | BUF_AMPDU = BIT(2), | ||
193 | BUF_HT = BIT(3), | ||
194 | BUF_RETRY = BIT(4), | ||
195 | BUF_XRETRY = BIT(5), | ||
196 | BUF_SHORT_PREAMBLE = BIT(6), | ||
197 | BUF_BAR = BIT(7), | ||
198 | BUF_PSPOLL = BIT(8), | ||
199 | BUF_AGGR_BURST = BIT(9), | ||
200 | BUF_CALC_AIRTIME = BIT(10), | ||
201 | }; | ||
202 | |||
194 | struct ath_buf_state { | 203 | struct ath_buf_state { |
195 | int bfs_nframes; /* # frames in aggregate */ | 204 | int bfs_nframes; /* # frames in aggregate */ |
196 | u16 bfs_al; /* length of aggregate */ | 205 | u16 bfs_al; /* length of aggregate */ |
197 | u16 bfs_frmlen; /* length of frame */ | 206 | u16 bfs_frmlen; /* length of frame */ |
198 | int bfs_seqno; /* sequence number */ | 207 | int bfs_seqno; /* sequence number */ |
199 | int bfs_tidno; /* tid of this frame */ | 208 | int bfs_tidno; /* tid of this frame */ |
200 | int bfs_retries; /* current retries */ | 209 | int bfs_retries; /* current retries */ |
201 | struct ath_rc_series bfs_rcs[4]; /* rate series */ | 210 | struct ath_rc_series bfs_rcs[4]; /* rate series */ |
202 | u8 bfs_isdata:1; /* is a data frame/aggregate */ | 211 | u32 bf_type; /* BUF_* (enum buffer_type) */ |
203 | u8 bfs_isaggr:1; /* is an aggregate */ | ||
204 | u8 bfs_isampdu:1; /* is an a-mpdu, aggregate or not */ | ||
205 | u8 bfs_ht:1; /* is an HT frame */ | ||
206 | u8 bfs_isretried:1; /* is retried */ | ||
207 | u8 bfs_isxretried:1; /* is excessive retried */ | ||
208 | u8 bfs_shpreamble:1; /* is short preamble */ | ||
209 | u8 bfs_isbar:1; /* is a BAR */ | ||
210 | u8 bfs_ispspoll:1; /* is a PS-Poll */ | ||
211 | u8 bfs_aggrburst:1; /* is a aggr burst */ | ||
212 | u8 bfs_calcairtime:1; /* requests airtime be calculated | ||
213 | when set for tx frame */ | ||
214 | int bfs_rifsburst_elem; /* RIFS burst/bar */ | ||
215 | int bfs_nrifsubframes; /* # of elements in burst */ | ||
216 | /* key type use to encrypt this frame */ | 212 | /* key type use to encrypt this frame */ |
217 | enum ath9k_key_type bfs_keytype; | 213 | enum ath9k_key_type bfs_keytype; |
218 | }; | 214 | }; |
@@ -224,26 +220,22 @@ struct ath_buf_state { | |||
224 | #define bf_seqno bf_state.bfs_seqno | 220 | #define bf_seqno bf_state.bfs_seqno |
225 | #define bf_tidno bf_state.bfs_tidno | 221 | #define bf_tidno bf_state.bfs_tidno |
226 | #define bf_rcs bf_state.bfs_rcs | 222 | #define bf_rcs bf_state.bfs_rcs |
227 | #define bf_isdata bf_state.bfs_isdata | ||
228 | #define bf_isaggr bf_state.bfs_isaggr | ||
229 | #define bf_isampdu bf_state.bfs_isampdu | ||
230 | #define bf_ht bf_state.bfs_ht | ||
231 | #define bf_isretried bf_state.bfs_isretried | ||
232 | #define bf_isxretried bf_state.bfs_isxretried | ||
233 | #define bf_shpreamble bf_state.bfs_shpreamble | ||
234 | #define bf_rifsburst_elem bf_state.bfs_rifsburst_elem | ||
235 | #define bf_nrifsubframes bf_state.bfs_nrifsubframes | ||
236 | #define bf_keytype bf_state.bfs_keytype | 223 | #define bf_keytype bf_state.bfs_keytype |
237 | #define bf_isbar bf_state.bfs_isbar | 224 | #define bf_isdata(bf) (bf->bf_state.bf_type & BUF_DATA) |
238 | #define bf_ispspoll bf_state.bfs_ispspoll | 225 | #define bf_isaggr(bf) (bf->bf_state.bf_type & BUF_AGGR) |
239 | #define bf_aggrburst bf_state.bfs_aggrburst | 226 | #define bf_isampdu(bf) (bf->bf_state.bf_type & BUF_AMPDU) |
240 | #define bf_calcairtime bf_state.bfs_calcairtime | 227 | #define bf_isht(bf) (bf->bf_state.bf_type & BUF_HT) |
228 | #define bf_isretried(bf) (bf->bf_state.bf_type & BUF_RETRY) | ||
229 | #define bf_isxretried(bf) (bf->bf_state.bf_type & BUF_XRETRY) | ||
230 | #define bf_isshpreamble(bf) (bf->bf_state.bf_type & BUF_SHORT_PREAMBLE) | ||
231 | #define bf_isbar(bf) (bf->bf_state.bf_type & BUF_BAR) | ||
232 | #define bf_ispspoll(bf) (bf->bf_state.bf_type & BUF_PSPOLL) | ||
233 | #define bf_isaggrburst(bf) (bf->bf_state.bf_type & BUF_AGGR_BURST) | ||
241 | 234 | ||
242 | /* | 235 | /* |
243 | * Abstraction of a contiguous buffer to transmit/receive. There is only | 236 | * Abstraction of a contiguous buffer to transmit/receive. There is only |
244 | * a single hw descriptor encapsulated here. | 237 | * a single hw descriptor encapsulated here. |
245 | */ | 238 | */ |
246 | |||
247 | struct ath_buf { | 239 | struct ath_buf { |
248 | struct list_head list; | 240 | struct list_head list; |
249 | struct list_head *last; | 241 | struct list_head *last; |
diff --git a/drivers/net/wireless/ath9k/xmit.c b/drivers/net/wireless/ath9k/xmit.c index 93064cc4cba8..47cf9f3555ae 100644 --- a/drivers/net/wireless/ath9k/xmit.c +++ b/drivers/net/wireless/ath9k/xmit.c | |||
@@ -518,7 +518,7 @@ static void ath_tx_complete_buf(struct ath_softc *sc, | |||
518 | if (!txok) { | 518 | if (!txok) { |
519 | tx_status.flags |= ATH_TX_ERROR; | 519 | tx_status.flags |= ATH_TX_ERROR; |
520 | 520 | ||
521 | if (bf->bf_isxretried) | 521 | if (bf_isxretried(bf)) |
522 | tx_status.flags |= ATH_TX_XRETRY; | 522 | tx_status.flags |= ATH_TX_XRETRY; |
523 | } | 523 | } |
524 | /* Unmap this frame */ | 524 | /* Unmap this frame */ |
@@ -629,7 +629,7 @@ static int ath_tx_num_badfrms(struct ath_softc *sc, | |||
629 | if (isnodegone || ds->ds_txstat.ts_flags == ATH9K_TX_SW_ABORTED) | 629 | if (isnodegone || ds->ds_txstat.ts_flags == ATH9K_TX_SW_ABORTED) |
630 | return 0; | 630 | return 0; |
631 | 631 | ||
632 | isaggr = bf->bf_isaggr; | 632 | isaggr = bf_isaggr(bf); |
633 | if (isaggr) { | 633 | if (isaggr) { |
634 | seq_st = ATH_DS_BA_SEQ(ds); | 634 | seq_st = ATH_DS_BA_SEQ(ds); |
635 | memcpy(ba, ATH_DS_BA_BITMAP(ds), WME_BA_BMP_SIZE >> 3); | 635 | memcpy(ba, ATH_DS_BA_BITMAP(ds), WME_BA_BMP_SIZE >> 3); |
@@ -651,7 +651,7 @@ static void ath_tx_set_retry(struct ath_softc *sc, struct ath_buf *bf) | |||
651 | struct sk_buff *skb; | 651 | struct sk_buff *skb; |
652 | struct ieee80211_hdr *hdr; | 652 | struct ieee80211_hdr *hdr; |
653 | 653 | ||
654 | bf->bf_isretried = 1; | 654 | bf->bf_state.bf_type |= BUF_RETRY; |
655 | bf->bf_retries++; | 655 | bf->bf_retries++; |
656 | 656 | ||
657 | skb = bf->bf_mpdu; | 657 | skb = bf->bf_mpdu; |
@@ -698,7 +698,7 @@ static u32 ath_pkt_duration(struct ath_softc *sc, | |||
698 | u8 rc; | 698 | u8 rc; |
699 | int streams, pktlen; | 699 | int streams, pktlen; |
700 | 700 | ||
701 | pktlen = bf->bf_isaggr ? bf->bf_al : bf->bf_frmlen; | 701 | pktlen = bf_isaggr(bf) ? bf->bf_al : bf->bf_frmlen; |
702 | rc = rt->info[rix].rateCode; | 702 | rc = rt->info[rix].rateCode; |
703 | 703 | ||
704 | /* | 704 | /* |
@@ -781,7 +781,7 @@ static void ath_buf_set_rate(struct ath_softc *sc, struct ath_buf *bf) | |||
781 | * let rate series flags determine which rates will actually | 781 | * let rate series flags determine which rates will actually |
782 | * use RTS. | 782 | * use RTS. |
783 | */ | 783 | */ |
784 | if ((ah->ah_caps.hw_caps & ATH9K_HW_CAP_HT) && bf->bf_isdata) { | 784 | if ((ah->ah_caps.hw_caps & ATH9K_HW_CAP_HT) && bf_isdata(bf)) { |
785 | BUG_ON(!an); | 785 | BUG_ON(!an); |
786 | /* | 786 | /* |
787 | * 802.11g protection not needed, use our default behavior | 787 | * 802.11g protection not needed, use our default behavior |
@@ -793,7 +793,7 @@ static void ath_buf_set_rate(struct ath_softc *sc, struct ath_buf *bf) | |||
793 | * and the second aggregate should have any protection at all. | 793 | * and the second aggregate should have any protection at all. |
794 | */ | 794 | */ |
795 | if (an->an_smmode == ATH_SM_PWRSAV_DYNAMIC) { | 795 | if (an->an_smmode == ATH_SM_PWRSAV_DYNAMIC) { |
796 | if (!bf->bf_aggrburst) { | 796 | if (!bf_isaggrburst(bf)) { |
797 | flags = ATH9K_TXDESC_RTSENA; | 797 | flags = ATH9K_TXDESC_RTSENA; |
798 | dynamic_mimops = 1; | 798 | dynamic_mimops = 1; |
799 | } else { | 799 | } else { |
@@ -806,7 +806,7 @@ static void ath_buf_set_rate(struct ath_softc *sc, struct ath_buf *bf) | |||
806 | * Set protection if aggregate protection on | 806 | * Set protection if aggregate protection on |
807 | */ | 807 | */ |
808 | if (sc->sc_config.ath_aggr_prot && | 808 | if (sc->sc_config.ath_aggr_prot && |
809 | (!bf->bf_isaggr || (bf->bf_isaggr && bf->bf_al < 8192))) { | 809 | (!bf_isaggr(bf) || (bf_isaggr(bf) && bf->bf_al < 8192))) { |
810 | flags = ATH9K_TXDESC_RTSENA; | 810 | flags = ATH9K_TXDESC_RTSENA; |
811 | cix = rt->info[sc->sc_protrix].controlRate; | 811 | cix = rt->info[sc->sc_protrix].controlRate; |
812 | rtsctsena = 1; | 812 | rtsctsena = 1; |
@@ -815,7 +815,7 @@ static void ath_buf_set_rate(struct ath_softc *sc, struct ath_buf *bf) | |||
815 | /* | 815 | /* |
816 | * For AR5416 - RTS cannot be followed by a frame larger than 8K. | 816 | * For AR5416 - RTS cannot be followed by a frame larger than 8K. |
817 | */ | 817 | */ |
818 | if (bf->bf_isaggr && (bf->bf_al > aggr_limit_with_rts)) { | 818 | if (bf_isaggr(bf) && (bf->bf_al > aggr_limit_with_rts)) { |
819 | /* | 819 | /* |
820 | * Ensure that in the case of SM Dynamic power save | 820 | * Ensure that in the case of SM Dynamic power save |
821 | * while we are bursting the second aggregate the | 821 | * while we are bursting the second aggregate the |
@@ -832,7 +832,7 @@ static void ath_buf_set_rate(struct ath_softc *sc, struct ath_buf *bf) | |||
832 | /* NB: cix is set above where RTS/CTS is enabled */ | 832 | /* NB: cix is set above where RTS/CTS is enabled */ |
833 | BUG_ON(cix == 0xff); | 833 | BUG_ON(cix == 0xff); |
834 | ctsrate = rt->info[cix].rateCode | | 834 | ctsrate = rt->info[cix].rateCode | |
835 | (bf->bf_shpreamble ? rt->info[cix].shortPreamble : 0); | 835 | (bf_isshpreamble(bf) ? rt->info[cix].shortPreamble : 0); |
836 | 836 | ||
837 | /* | 837 | /* |
838 | * Setup HAL rate series | 838 | * Setup HAL rate series |
@@ -846,7 +846,7 @@ static void ath_buf_set_rate(struct ath_softc *sc, struct ath_buf *bf) | |||
846 | rix = bf->bf_rcs[i].rix; | 846 | rix = bf->bf_rcs[i].rix; |
847 | 847 | ||
848 | series[i].Rate = rt->info[rix].rateCode | | 848 | series[i].Rate = rt->info[rix].rateCode | |
849 | (bf->bf_shpreamble ? rt->info[rix].shortPreamble : 0); | 849 | (bf_isshpreamble(bf) ? rt->info[rix].shortPreamble : 0); |
850 | 850 | ||
851 | series[i].Tries = bf->bf_rcs[i].tries; | 851 | series[i].Tries = bf->bf_rcs[i].tries; |
852 | 852 | ||
@@ -862,7 +862,7 @@ static void ath_buf_set_rate(struct ath_softc *sc, struct ath_buf *bf) | |||
862 | sc, rix, bf, | 862 | sc, rix, bf, |
863 | (bf->bf_rcs[i].flags & ATH_RC_CW40_FLAG) != 0, | 863 | (bf->bf_rcs[i].flags & ATH_RC_CW40_FLAG) != 0, |
864 | (bf->bf_rcs[i].flags & ATH_RC_SGI_FLAG), | 864 | (bf->bf_rcs[i].flags & ATH_RC_SGI_FLAG), |
865 | bf->bf_shpreamble); | 865 | bf_isshpreamble(bf)); |
866 | 866 | ||
867 | if ((an->an_smmode == ATH_SM_PWRSAV_STATIC) && | 867 | if ((an->an_smmode == ATH_SM_PWRSAV_STATIC) && |
868 | (bf->bf_rcs[i].flags & ATH_RC_DS_FLAG) == 0) { | 868 | (bf->bf_rcs[i].flags & ATH_RC_DS_FLAG) == 0) { |
@@ -875,7 +875,7 @@ static void ath_buf_set_rate(struct ath_softc *sc, struct ath_buf *bf) | |||
875 | */ | 875 | */ |
876 | series[i].ChSel = sc->sc_tx_chainmask; | 876 | series[i].ChSel = sc->sc_tx_chainmask; |
877 | } else { | 877 | } else { |
878 | if (bf->bf_ht) | 878 | if (bf_isht(bf)) |
879 | series[i].ChSel = | 879 | series[i].ChSel = |
880 | ath_chainmask_sel_logic(sc, an); | 880 | ath_chainmask_sel_logic(sc, an); |
881 | else | 881 | else |
@@ -908,7 +908,7 @@ static void ath_buf_set_rate(struct ath_softc *sc, struct ath_buf *bf) | |||
908 | * use the precalculated ACK durations. | 908 | * use the precalculated ACK durations. |
909 | */ | 909 | */ |
910 | if (flags & ATH9K_TXDESC_RTSENA) { /* SIFS + CTS */ | 910 | if (flags & ATH9K_TXDESC_RTSENA) { /* SIFS + CTS */ |
911 | ctsduration += bf->bf_shpreamble ? | 911 | ctsduration += bf_isshpreamble(bf) ? |
912 | rt->info[cix].spAckDuration : | 912 | rt->info[cix].spAckDuration : |
913 | rt->info[cix].lpAckDuration; | 913 | rt->info[cix].lpAckDuration; |
914 | } | 914 | } |
@@ -916,7 +916,7 @@ static void ath_buf_set_rate(struct ath_softc *sc, struct ath_buf *bf) | |||
916 | ctsduration += series[0].PktDuration; | 916 | ctsduration += series[0].PktDuration; |
917 | 917 | ||
918 | if ((bf->bf_flags & ATH9K_TXDESC_NOACK) == 0) { /* SIFS + ACK */ | 918 | if ((bf->bf_flags & ATH9K_TXDESC_NOACK) == 0) { /* SIFS + ACK */ |
919 | ctsduration += bf->bf_shpreamble ? | 919 | ctsduration += bf_isshpreamble(bf) ? |
920 | rt->info[rix].spAckDuration : | 920 | rt->info[rix].spAckDuration : |
921 | rt->info[rix].lpAckDuration; | 921 | rt->info[rix].lpAckDuration; |
922 | } | 922 | } |
@@ -932,10 +932,10 @@ static void ath_buf_set_rate(struct ath_softc *sc, struct ath_buf *bf) | |||
932 | * set dur_update_en for l-sig computation except for PS-Poll frames | 932 | * set dur_update_en for l-sig computation except for PS-Poll frames |
933 | */ | 933 | */ |
934 | ath9k_hw_set11n_ratescenario(ah, ds, lastds, | 934 | ath9k_hw_set11n_ratescenario(ah, ds, lastds, |
935 | !bf->bf_ispspoll, | 935 | !bf_ispspoll(bf), |
936 | ctsrate, | 936 | ctsrate, |
937 | ctsduration, | 937 | ctsduration, |
938 | series, 4, flags); | 938 | series, 4, flags); |
939 | if (sc->sc_config.ath_aggr_prot && flags) | 939 | if (sc->sc_config.ath_aggr_prot && flags) |
940 | ath9k_hw_set11n_burstduration(ah, ds, 8192); | 940 | ath9k_hw_set11n_burstduration(ah, ds, 8192); |
941 | } | 941 | } |
@@ -958,7 +958,7 @@ static int ath_tx_send_normal(struct ath_softc *sc, | |||
958 | BUG_ON(list_empty(bf_head)); | 958 | BUG_ON(list_empty(bf_head)); |
959 | 959 | ||
960 | bf = list_first_entry(bf_head, struct ath_buf, list); | 960 | bf = list_first_entry(bf_head, struct ath_buf, list); |
961 | bf->bf_isampdu = 0; /* regular HT frame */ | 961 | bf->bf_state.bf_type &= ~BUF_AMPDU; /* regular HT frame */ |
962 | 962 | ||
963 | skb = (struct sk_buff *)bf->bf_mpdu; | 963 | skb = (struct sk_buff *)bf->bf_mpdu; |
964 | tx_info = IEEE80211_SKB_CB(skb); | 964 | tx_info = IEEE80211_SKB_CB(skb); |
@@ -998,7 +998,7 @@ static void ath_tx_flush_tid(struct ath_softc *sc, struct ath_atx_tid *tid) | |||
998 | 998 | ||
999 | while (!list_empty(&tid->buf_q)) { | 999 | while (!list_empty(&tid->buf_q)) { |
1000 | bf = list_first_entry(&tid->buf_q, struct ath_buf, list); | 1000 | bf = list_first_entry(&tid->buf_q, struct ath_buf, list); |
1001 | ASSERT(!bf->bf_isretried); | 1001 | ASSERT(!bf_isretried(bf)); |
1002 | list_cut_position(&bf_head, &tid->buf_q, &bf->bf_lastfrm->list); | 1002 | list_cut_position(&bf_head, &tid->buf_q, &bf->bf_lastfrm->list); |
1003 | ath_tx_send_normal(sc, txq, tid, &bf_head); | 1003 | ath_tx_send_normal(sc, txq, tid, &bf_head); |
1004 | } | 1004 | } |
@@ -1025,7 +1025,7 @@ static void ath_tx_complete_aggr_rifs(struct ath_softc *sc, | |||
1025 | int isaggr, txfail, txpending, sendbar = 0, needreset = 0; | 1025 | int isaggr, txfail, txpending, sendbar = 0, needreset = 0; |
1026 | int isnodegone = (an->an_flags & ATH_NODE_CLEAN); | 1026 | int isnodegone = (an->an_flags & ATH_NODE_CLEAN); |
1027 | 1027 | ||
1028 | isaggr = bf->bf_isaggr; | 1028 | isaggr = bf_isaggr(bf); |
1029 | if (isaggr) { | 1029 | if (isaggr) { |
1030 | if (txok) { | 1030 | if (txok) { |
1031 | if (ATH_DS_TX_BA(ds)) { | 1031 | if (ATH_DS_TX_BA(ds)) { |
@@ -1075,7 +1075,7 @@ static void ath_tx_complete_aggr_rifs(struct ath_softc *sc, | |||
1075 | ath_tx_set_retry(sc, bf); | 1075 | ath_tx_set_retry(sc, bf); |
1076 | txpending = 1; | 1076 | txpending = 1; |
1077 | } else { | 1077 | } else { |
1078 | bf->bf_isxretried = 1; | 1078 | bf->bf_state.bf_type |= BUF_XRETRY; |
1079 | txfail = 1; | 1079 | txfail = 1; |
1080 | sendbar = 1; | 1080 | sendbar = 1; |
1081 | } | 1081 | } |
@@ -1331,7 +1331,7 @@ static int ath_tx_processq(struct ath_softc *sc, struct ath_txq *txq) | |||
1331 | 1331 | ||
1332 | txq->axq_depth--; | 1332 | txq->axq_depth--; |
1333 | 1333 | ||
1334 | if (bf->bf_isaggr) | 1334 | if (bf_isaggr(bf)) |
1335 | txq->axq_aggr_depth--; | 1335 | txq->axq_aggr_depth--; |
1336 | 1336 | ||
1337 | txok = (ds->ds_txstat.ts_status == 0); | 1337 | txok = (ds->ds_txstat.ts_status == 0); |
@@ -1345,14 +1345,14 @@ static int ath_tx_processq(struct ath_softc *sc, struct ath_txq *txq) | |||
1345 | spin_unlock_bh(&sc->sc_txbuflock); | 1345 | spin_unlock_bh(&sc->sc_txbuflock); |
1346 | } | 1346 | } |
1347 | 1347 | ||
1348 | if (!bf->bf_isampdu) { | 1348 | if (!bf_isampdu(bf)) { |
1349 | /* | 1349 | /* |
1350 | * This frame is sent out as a single frame. | 1350 | * This frame is sent out as a single frame. |
1351 | * Use hardware retry status for this frame. | 1351 | * Use hardware retry status for this frame. |
1352 | */ | 1352 | */ |
1353 | bf->bf_retries = ds->ds_txstat.ts_longretry; | 1353 | bf->bf_retries = ds->ds_txstat.ts_longretry; |
1354 | if (ds->ds_txstat.ts_status & ATH9K_TXERR_XRETRY) | 1354 | if (ds->ds_txstat.ts_status & ATH9K_TXERR_XRETRY) |
1355 | bf->bf_isxretried = 1; | 1355 | bf->bf_state.bf_type |= BUF_XRETRY; |
1356 | nbad = 0; | 1356 | nbad = 0; |
1357 | } else { | 1357 | } else { |
1358 | nbad = ath_tx_num_badfrms(sc, bf, txok); | 1358 | nbad = ath_tx_num_badfrms(sc, bf, txok); |
@@ -1368,7 +1368,7 @@ static int ath_tx_processq(struct ath_softc *sc, struct ath_txq *txq) | |||
1368 | if (ds->ds_txstat.ts_status == 0) | 1368 | if (ds->ds_txstat.ts_status == 0) |
1369 | nacked++; | 1369 | nacked++; |
1370 | 1370 | ||
1371 | if (bf->bf_isdata) { | 1371 | if (bf_isdata(bf)) { |
1372 | if (isrifs) | 1372 | if (isrifs) |
1373 | tmp_ds = bf->bf_rifslast->bf_desc; | 1373 | tmp_ds = bf->bf_rifslast->bf_desc; |
1374 | else | 1374 | else |
@@ -1384,7 +1384,7 @@ static int ath_tx_processq(struct ath_softc *sc, struct ath_txq *txq) | |||
1384 | /* | 1384 | /* |
1385 | * Complete this transmit unit | 1385 | * Complete this transmit unit |
1386 | */ | 1386 | */ |
1387 | if (bf->bf_isampdu) | 1387 | if (bf_isampdu(bf)) |
1388 | ath_tx_complete_aggr_rifs(sc, txq, bf, &bf_head, txok); | 1388 | ath_tx_complete_aggr_rifs(sc, txq, bf, &bf_head, txok); |
1389 | else | 1389 | else |
1390 | ath_tx_complete_buf(sc, bf, &bf_head, txok, 0); | 1390 | ath_tx_complete_buf(sc, bf, &bf_head, txok, 0); |
@@ -1481,7 +1481,7 @@ static void ath_tx_addto_baw(struct ath_softc *sc, | |||
1481 | { | 1481 | { |
1482 | int index, cindex; | 1482 | int index, cindex; |
1483 | 1483 | ||
1484 | if (bf->bf_isretried) | 1484 | if (bf_isretried(bf)) |
1485 | return; | 1485 | return; |
1486 | 1486 | ||
1487 | index = ATH_BA_INDEX(tid->seq_start, bf->bf_seqno); | 1487 | index = ATH_BA_INDEX(tid->seq_start, bf->bf_seqno); |
@@ -1516,7 +1516,7 @@ static int ath_tx_send_ampdu(struct ath_softc *sc, | |||
1516 | BUG_ON(list_empty(bf_head)); | 1516 | BUG_ON(list_empty(bf_head)); |
1517 | 1517 | ||
1518 | bf = list_first_entry(bf_head, struct ath_buf, list); | 1518 | bf = list_first_entry(bf_head, struct ath_buf, list); |
1519 | bf->bf_isampdu = 1; | 1519 | bf->bf_state.bf_type |= BUF_AMPDU; |
1520 | bf->bf_seqno = txctl->seqno; /* save seqno and tidno in buffer */ | 1520 | bf->bf_seqno = txctl->seqno; /* save seqno and tidno in buffer */ |
1521 | bf->bf_tidno = txctl->tidno; | 1521 | bf->bf_tidno = txctl->tidno; |
1522 | 1522 | ||
@@ -1860,7 +1860,7 @@ static void ath_tx_sched_aggr(struct ath_softc *sc, | |||
1860 | if (bf->bf_nframes == 1) { | 1860 | if (bf->bf_nframes == 1) { |
1861 | ASSERT(bf->bf_lastfrm == bf_last); | 1861 | ASSERT(bf->bf_lastfrm == bf_last); |
1862 | 1862 | ||
1863 | bf->bf_isaggr = 0; | 1863 | bf->bf_state.bf_type &= ~BUF_AGGR; |
1864 | /* | 1864 | /* |
1865 | * clear aggr bits for every descriptor | 1865 | * clear aggr bits for every descriptor |
1866 | * XXX TODO: is there a way to optimize it? | 1866 | * XXX TODO: is there a way to optimize it? |
@@ -1877,7 +1877,7 @@ static void ath_tx_sched_aggr(struct ath_softc *sc, | |||
1877 | /* | 1877 | /* |
1878 | * setup first desc with rate and aggr info | 1878 | * setup first desc with rate and aggr info |
1879 | */ | 1879 | */ |
1880 | bf->bf_isaggr = 1; | 1880 | bf->bf_state.bf_type |= BUF_AGGR; |
1881 | ath_buf_set_rate(sc, bf); | 1881 | ath_buf_set_rate(sc, bf); |
1882 | ath9k_hw_set11n_aggr_first(sc->sc_ah, bf->bf_desc, bf->bf_al); | 1882 | ath9k_hw_set11n_aggr_first(sc->sc_ah, bf->bf_desc, bf->bf_al); |
1883 | 1883 | ||
@@ -1925,7 +1925,7 @@ static void ath_tid_drain(struct ath_softc *sc, | |||
1925 | list_cut_position(&bf_head, &tid->buf_q, &bf->bf_lastfrm->list); | 1925 | list_cut_position(&bf_head, &tid->buf_q, &bf->bf_lastfrm->list); |
1926 | 1926 | ||
1927 | /* update baw for software retried frame */ | 1927 | /* update baw for software retried frame */ |
1928 | if (bf->bf_isretried) | 1928 | if (bf_isretried(bf)) |
1929 | ath_tx_update_baw(sc, tid, bf->bf_seqno); | 1929 | ath_tx_update_baw(sc, tid, bf->bf_seqno); |
1930 | 1930 | ||
1931 | /* | 1931 | /* |
@@ -2014,11 +2014,21 @@ static int ath_tx_start_dma(struct ath_softc *sc, | |||
2014 | /* set up this buffer */ | 2014 | /* set up this buffer */ |
2015 | ATH_TXBUF_RESET(bf); | 2015 | ATH_TXBUF_RESET(bf); |
2016 | bf->bf_frmlen = txctl->frmlen; | 2016 | bf->bf_frmlen = txctl->frmlen; |
2017 | bf->bf_isdata = ieee80211_is_data(fc); | 2017 | |
2018 | bf->bf_isbar = ieee80211_is_back_req(fc); | 2018 | ieee80211_is_data(fc) ? |
2019 | bf->bf_ispspoll = ieee80211_is_pspoll(fc); | 2019 | (bf->bf_state.bf_type |= BUF_DATA) : |
2020 | (bf->bf_state.bf_type &= ~BUF_DATA); | ||
2021 | ieee80211_is_back_req(fc) ? | ||
2022 | (bf->bf_state.bf_type |= BUF_BAR) : | ||
2023 | (bf->bf_state.bf_type &= ~BUF_BAR); | ||
2024 | ieee80211_is_pspoll(fc) ? | ||
2025 | (bf->bf_state.bf_type |= BUF_PSPOLL) : | ||
2026 | (bf->bf_state.bf_type &= ~BUF_PSPOLL); | ||
2027 | (sc->sc_flags & ATH_PREAMBLE_SHORT) ? | ||
2028 | (bf->bf_state.bf_type |= BUF_SHORT_PREAMBLE) : | ||
2029 | (bf->bf_state.bf_type &= ~BUF_SHORT_PREAMBLE); | ||
2030 | |||
2020 | bf->bf_flags = txctl->flags; | 2031 | bf->bf_flags = txctl->flags; |
2021 | bf->bf_shpreamble = sc->sc_flags & ATH_PREAMBLE_SHORT; | ||
2022 | bf->bf_keytype = txctl->keytype; | 2032 | bf->bf_keytype = txctl->keytype; |
2023 | tx_info_priv = (struct ath_tx_info_priv *)tx_info->driver_data[0]; | 2033 | tx_info_priv = (struct ath_tx_info_priv *)tx_info->driver_data[0]; |
2024 | rcs = tx_info_priv->rcs; | 2034 | rcs = tx_info_priv->rcs; |
@@ -2060,7 +2070,9 @@ static int ath_tx_start_dma(struct ath_softc *sc, | |||
2060 | ds); /* first descriptor */ | 2070 | ds); /* first descriptor */ |
2061 | 2071 | ||
2062 | bf->bf_lastfrm = bf; | 2072 | bf->bf_lastfrm = bf; |
2063 | bf->bf_ht = txctl->ht; | 2073 | (txctl->ht) ? |
2074 | (bf->bf_state.bf_type |= BUF_HT) : | ||
2075 | (bf->bf_state.bf_type &= ~BUF_HT); | ||
2064 | 2076 | ||
2065 | spin_lock_bh(&txq->axq_lock); | 2077 | spin_lock_bh(&txq->axq_lock); |
2066 | 2078 | ||
@@ -2162,7 +2174,7 @@ int ath_tx_init(struct ath_softc *sc, int nbufs) | |||
2162 | 2174 | ||
2163 | /* Setup tx descriptors */ | 2175 | /* Setup tx descriptors */ |
2164 | error = ath_descdma_setup(sc, &sc->sc_txdma, &sc->sc_txbuf, | 2176 | error = ath_descdma_setup(sc, &sc->sc_txdma, &sc->sc_txbuf, |
2165 | "tx", nbufs * ATH_FRAG_PER_MSDU, ATH_TXDESC); | 2177 | "tx", nbufs * ATH_FRAG_PER_MSDU, 1); |
2166 | if (error != 0) { | 2178 | if (error != 0) { |
2167 | DPRINTF(sc, ATH_DBG_FATAL, | 2179 | DPRINTF(sc, ATH_DBG_FATAL, |
2168 | "%s: failed to allocate tx descriptors: %d\n", | 2180 | "%s: failed to allocate tx descriptors: %d\n", |
@@ -2486,7 +2498,7 @@ void ath_tx_draintxq(struct ath_softc *sc, | |||
2486 | 2498 | ||
2487 | spin_unlock_bh(&txq->axq_lock); | 2499 | spin_unlock_bh(&txq->axq_lock); |
2488 | 2500 | ||
2489 | if (bf->bf_isampdu) | 2501 | if (bf_isampdu(bf)) |
2490 | ath_tx_complete_aggr_rifs(sc, txq, bf, &bf_head, 0); | 2502 | ath_tx_complete_aggr_rifs(sc, txq, bf, &bf_head, 0); |
2491 | else | 2503 | else |
2492 | ath_tx_complete_buf(sc, bf, &bf_head, 0, 0); | 2504 | ath_tx_complete_buf(sc, bf, &bf_head, 0, 0); |
@@ -2647,7 +2659,7 @@ void ath_tx_aggr_teardown(struct ath_softc *sc, | |||
2647 | spin_lock_bh(&txq->axq_lock); | 2659 | spin_lock_bh(&txq->axq_lock); |
2648 | while (!list_empty(&txtid->buf_q)) { | 2660 | while (!list_empty(&txtid->buf_q)) { |
2649 | bf = list_first_entry(&txtid->buf_q, struct ath_buf, list); | 2661 | bf = list_first_entry(&txtid->buf_q, struct ath_buf, list); |
2650 | if (!bf->bf_isretried) { | 2662 | if (!bf_isretried(bf)) { |
2651 | /* | 2663 | /* |
2652 | * NB: it's based on the assumption that | 2664 | * NB: it's based on the assumption that |
2653 | * software retried frame will always stay | 2665 | * software retried frame will always stay |