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authorLuis R. Rodriguez <lrodriguez@atheros.com>2008-09-23 17:28:16 -0400
committerJohn W. Linville <linville@tuxdriver.com>2008-09-24 15:55:24 -0400
commit92cccc2cda9a744326bbd9f16c635187af7f8a09 (patch)
tree526b57e7c3a03d43b29fde03f7a1cc1e7a655f85 /drivers
parent4c07ab0fe4b4eaa0fc31f640ca65da7c173f5043 (diff)
ath9k: disable MIB interrupts to fix interrupt storm
Enabling the MIB interrupts has proven to cause an interrupt storm after 7 hours of run. We will make use of the MIB interrupt once we have ANI supported added so for now to cure this we disable the interrupt. The interrupt storm can be seen as follows after 7 hours of run as reported by Steven Noonan <steven@uplinklabs.net>: 18:28:38 sum 1106.00 18:28:39 sum 1037.62 18:28:40 sum 1069.00 18:28:41 sum 1167.00 18:28:42 sum 1155.00 18:28:43 sum 1339.00 18:28:44 sum 18355.00 18:28:45 sum 17845.45 18:28:46 sum 15285.00 18:28:47 sum 17511.00 18:28:48 sum 17568.69 18:28:49 sum 17704.04 18:28:50 sum 18566.67 18:28:51 sum 18913.13 at 18:28:44 the MIB interrupt kicked off and caused huge latency which can be seen even on a video he submitted: http://www.youtube.com/watch?v=4GeCx1gZMpA Signed-off-by: Luis R. Rodriguez <lrodriguez@atheros.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/net/wireless/ath9k/core.c7
1 files changed, 7 insertions, 0 deletions
diff --git a/drivers/net/wireless/ath9k/core.c b/drivers/net/wireless/ath9k/core.c
index c04959357bda..87e37bc39145 100644
--- a/drivers/net/wireless/ath9k/core.c
+++ b/drivers/net/wireless/ath9k/core.c
@@ -795,6 +795,12 @@ int ath_open(struct ath_softc *sc, struct ath9k_channel *initial_chan)
795 if (ah->ah_caps.hw_caps & ATH9K_HW_CAP_HT) 795 if (ah->ah_caps.hw_caps & ATH9K_HW_CAP_HT)
796 sc->sc_imask |= ATH9K_INT_CST; 796 sc->sc_imask |= ATH9K_INT_CST;
797 797
798 /* Note: We disable MIB interrupts for now as we don't yet
799 * handle processing ANI, otherwise you will get an interrupt
800 * storm after about 7 hours of usage making the system unusable
801 * with huge latency. Once we do have ANI processing included
802 * we can re-enable this interrupt. */
803#if 0
798 /* 804 /*
799 * Enable MIB interrupts when there are hardware phy counters. 805 * Enable MIB interrupts when there are hardware phy counters.
800 * Note we only do this (at the moment) for station mode. 806 * Note we only do this (at the moment) for station mode.
@@ -802,6 +808,7 @@ int ath_open(struct ath_softc *sc, struct ath9k_channel *initial_chan)
802 if (ath9k_hw_phycounters(ah) && 808 if (ath9k_hw_phycounters(ah) &&
803 ((sc->sc_opmode == ATH9K_M_STA) || (sc->sc_opmode == ATH9K_M_IBSS))) 809 ((sc->sc_opmode == ATH9K_M_STA) || (sc->sc_opmode == ATH9K_M_IBSS)))
804 sc->sc_imask |= ATH9K_INT_MIB; 810 sc->sc_imask |= ATH9K_INT_MIB;
811#endif
805 /* 812 /*
806 * Some hardware processes the TIM IE and fires an 813 * Some hardware processes the TIM IE and fires an
807 * interrupt when the TIM bit is set. For hardware 814 * interrupt when the TIM bit is set. For hardware