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authorMichael Chan <mchan@broadcom.com>2005-04-21 20:09:08 -0400
committerDavid S. Miller <davem@sunset.davemloft.net>2005-04-21 20:09:08 -0400
commit8c6bda1a89c148f3a28edc09a76dac9bff57d8ee (patch)
tree883fa60cf8087f720e8c810ba29ba034a1de0f48 /drivers
parent314fba348e1f64a30b53d3cff5d96872424e8498 (diff)
[TG3]: Fix tg3_set_power_state()
Fix tg3_set_power_state to drive GPIOs properly based on the TG3_FLAG_EEPROM_WRITE_PROTECT flag. Some delays are also added after D0 and D3 power state changes. Signed-off-by: Michael Chan <mchan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/net/tg3.c10
1 files changed, 8 insertions, 2 deletions
diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c
index 742340aebf7e..f0b5dc7766bb 100644
--- a/drivers/net/tg3.c
+++ b/drivers/net/tg3.c
@@ -1005,8 +1005,13 @@ static int tg3_set_power_state(struct tg3 *tp, int state)
1005 pci_write_config_word(tp->pdev, 1005 pci_write_config_word(tp->pdev,
1006 pm + PCI_PM_CTRL, 1006 pm + PCI_PM_CTRL,
1007 power_control); 1007 power_control);
1008 tw32_f(GRC_LOCAL_CTRL, tp->grc_local_ctrl); 1008 udelay(100); /* Delay after power state change */
1009 udelay(100); 1009
1010 /* Switch out of Vaux if it is not a LOM */
1011 if (!(tp->tg3_flags & TG3_FLAG_EEPROM_WRITE_PROT)) {
1012 tw32_f(GRC_LOCAL_CTRL, tp->grc_local_ctrl);
1013 udelay(100);
1014 }
1010 1015
1011 return 0; 1016 return 0;
1012 1017
@@ -1151,6 +1156,7 @@ static int tg3_set_power_state(struct tg3 *tp, int state)
1151 1156
1152 /* Finally, set the new power state. */ 1157 /* Finally, set the new power state. */
1153 pci_write_config_word(tp->pdev, pm + PCI_PM_CTRL, power_control); 1158 pci_write_config_word(tp->pdev, pm + PCI_PM_CTRL, power_control);
1159 udelay(100); /* Delay after power state change */
1154 1160
1155 tg3_write_sig_post_reset(tp, RESET_KIND_SHUTDOWN); 1161 tg3_write_sig_post_reset(tp, RESET_KIND_SHUTDOWN);
1156 1162