diff options
author | Paul Mackerras <paulus@samba.org> | 2007-12-09 23:41:22 -0500 |
---|---|---|
committer | Paul Mackerras <paulus@samba.org> | 2007-12-09 23:41:22 -0500 |
commit | b242a60206881559bb3102110048762422e6b74e (patch) | |
tree | 86459efa47b9c3f69d865b4495beede9c4184003 /drivers | |
parent | e1fd18656c2963e383d67b7006c0e06c9c1d9c79 (diff) | |
parent | 94545baded0bfbabdc30a3a4cb48b3db479dd6ef (diff) |
Merge branch 'linux-2.6'
Diffstat (limited to 'drivers')
120 files changed, 2143 insertions, 1584 deletions
diff --git a/drivers/acpi/dispatcher/dsobject.c b/drivers/acpi/dispatcher/dsobject.c index a474ca2334d5..954ac8ce958a 100644 --- a/drivers/acpi/dispatcher/dsobject.c +++ b/drivers/acpi/dispatcher/dsobject.c | |||
@@ -137,6 +137,71 @@ acpi_ds_build_internal_object(struct acpi_walk_state *walk_state, | |||
137 | return_ACPI_STATUS(status); | 137 | return_ACPI_STATUS(status); |
138 | } | 138 | } |
139 | } | 139 | } |
140 | |||
141 | /* Special object resolution for elements of a package */ | ||
142 | |||
143 | if ((op->common.parent->common.aml_opcode == AML_PACKAGE_OP) || | ||
144 | (op->common.parent->common.aml_opcode == | ||
145 | AML_VAR_PACKAGE_OP)) { | ||
146 | /* | ||
147 | * Attempt to resolve the node to a value before we insert it into | ||
148 | * the package. If this is a reference to a common data type, | ||
149 | * resolve it immediately. According to the ACPI spec, package | ||
150 | * elements can only be "data objects" or method references. | ||
151 | * Attempt to resolve to an Integer, Buffer, String or Package. | ||
152 | * If cannot, return the named reference (for things like Devices, | ||
153 | * Methods, etc.) Buffer Fields and Fields will resolve to simple | ||
154 | * objects (int/buf/str/pkg). | ||
155 | * | ||
156 | * NOTE: References to things like Devices, Methods, Mutexes, etc. | ||
157 | * will remain as named references. This behavior is not described | ||
158 | * in the ACPI spec, but it appears to be an oversight. | ||
159 | */ | ||
160 | obj_desc = (union acpi_operand_object *)op->common.node; | ||
161 | |||
162 | status = | ||
163 | acpi_ex_resolve_node_to_value(ACPI_CAST_INDIRECT_PTR | ||
164 | (struct | ||
165 | acpi_namespace_node, | ||
166 | &obj_desc), | ||
167 | walk_state); | ||
168 | if (ACPI_FAILURE(status)) { | ||
169 | return_ACPI_STATUS(status); | ||
170 | } | ||
171 | |||
172 | switch (op->common.node->type) { | ||
173 | /* | ||
174 | * For these types, we need the actual node, not the subobject. | ||
175 | * However, the subobject got an extra reference count above. | ||
176 | */ | ||
177 | case ACPI_TYPE_MUTEX: | ||
178 | case ACPI_TYPE_METHOD: | ||
179 | case ACPI_TYPE_POWER: | ||
180 | case ACPI_TYPE_PROCESSOR: | ||
181 | case ACPI_TYPE_EVENT: | ||
182 | case ACPI_TYPE_REGION: | ||
183 | case ACPI_TYPE_DEVICE: | ||
184 | case ACPI_TYPE_THERMAL: | ||
185 | |||
186 | obj_desc = | ||
187 | (union acpi_operand_object *)op->common. | ||
188 | node; | ||
189 | break; | ||
190 | |||
191 | default: | ||
192 | break; | ||
193 | } | ||
194 | |||
195 | /* | ||
196 | * If above resolved to an operand object, we are done. Otherwise, | ||
197 | * we have a NS node, we must create the package entry as a named | ||
198 | * reference. | ||
199 | */ | ||
200 | if (ACPI_GET_DESCRIPTOR_TYPE(obj_desc) != | ||
201 | ACPI_DESC_TYPE_NAMED) { | ||
202 | goto exit; | ||
203 | } | ||
204 | } | ||
140 | } | 205 | } |
141 | 206 | ||
142 | /* Create and init a new internal ACPI object */ | 207 | /* Create and init a new internal ACPI object */ |
@@ -156,6 +221,7 @@ acpi_ds_build_internal_object(struct acpi_walk_state *walk_state, | |||
156 | return_ACPI_STATUS(status); | 221 | return_ACPI_STATUS(status); |
157 | } | 222 | } |
158 | 223 | ||
224 | exit: | ||
159 | *obj_desc_ptr = obj_desc; | 225 | *obj_desc_ptr = obj_desc; |
160 | return_ACPI_STATUS(AE_OK); | 226 | return_ACPI_STATUS(AE_OK); |
161 | } | 227 | } |
@@ -356,12 +422,25 @@ acpi_ds_build_internal_package_obj(struct acpi_walk_state *walk_state, | |||
356 | arg = arg->common.next; | 422 | arg = arg->common.next; |
357 | for (i = 0; arg && (i < element_count); i++) { | 423 | for (i = 0; arg && (i < element_count); i++) { |
358 | if (arg->common.aml_opcode == AML_INT_RETURN_VALUE_OP) { | 424 | if (arg->common.aml_opcode == AML_INT_RETURN_VALUE_OP) { |
359 | 425 | if (arg->common.node->type == ACPI_TYPE_METHOD) { | |
360 | /* This package element is already built, just get it */ | 426 | /* |
361 | 427 | * A method reference "looks" to the parser to be a method | |
362 | obj_desc->package.elements[i] = | 428 | * invocation, so we special case it here |
363 | ACPI_CAST_PTR(union acpi_operand_object, | 429 | */ |
364 | arg->common.node); | 430 | arg->common.aml_opcode = AML_INT_NAMEPATH_OP; |
431 | status = | ||
432 | acpi_ds_build_internal_object(walk_state, | ||
433 | arg, | ||
434 | &obj_desc-> | ||
435 | package. | ||
436 | elements[i]); | ||
437 | } else { | ||
438 | /* This package element is already built, just get it */ | ||
439 | |||
440 | obj_desc->package.elements[i] = | ||
441 | ACPI_CAST_PTR(union acpi_operand_object, | ||
442 | arg->common.node); | ||
443 | } | ||
365 | } else { | 444 | } else { |
366 | status = acpi_ds_build_internal_object(walk_state, arg, | 445 | status = acpi_ds_build_internal_object(walk_state, arg, |
367 | &obj_desc-> | 446 | &obj_desc-> |
diff --git a/drivers/acpi/processor_idle.c b/drivers/acpi/processor_idle.c index b1fbee3f7fe1..2fe34cc73c13 100644 --- a/drivers/acpi/processor_idle.c +++ b/drivers/acpi/processor_idle.c | |||
@@ -531,6 +531,11 @@ static void acpi_processor_idle(void) | |||
531 | 531 | ||
532 | case ACPI_STATE_C3: | 532 | case ACPI_STATE_C3: |
533 | /* | 533 | /* |
534 | * Must be done before busmaster disable as we might | ||
535 | * need to access HPET ! | ||
536 | */ | ||
537 | acpi_state_timer_broadcast(pr, cx, 1); | ||
538 | /* | ||
534 | * disable bus master | 539 | * disable bus master |
535 | * bm_check implies we need ARB_DIS | 540 | * bm_check implies we need ARB_DIS |
536 | * !bm_check implies we need cache flush | 541 | * !bm_check implies we need cache flush |
@@ -557,7 +562,6 @@ static void acpi_processor_idle(void) | |||
557 | /* Get start time (ticks) */ | 562 | /* Get start time (ticks) */ |
558 | t1 = inl(acpi_gbl_FADT.xpm_timer_block.address); | 563 | t1 = inl(acpi_gbl_FADT.xpm_timer_block.address); |
559 | /* Invoke C3 */ | 564 | /* Invoke C3 */ |
560 | acpi_state_timer_broadcast(pr, cx, 1); | ||
561 | /* Tell the scheduler that we are going deep-idle: */ | 565 | /* Tell the scheduler that we are going deep-idle: */ |
562 | sched_clock_idle_sleep_event(); | 566 | sched_clock_idle_sleep_event(); |
563 | acpi_cstate_enter(cx); | 567 | acpi_cstate_enter(cx); |
@@ -1401,9 +1405,6 @@ static int acpi_idle_enter_simple(struct cpuidle_device *dev, | |||
1401 | if (acpi_idle_suspend) | 1405 | if (acpi_idle_suspend) |
1402 | return(acpi_idle_enter_c1(dev, state)); | 1406 | return(acpi_idle_enter_c1(dev, state)); |
1403 | 1407 | ||
1404 | if (pr->flags.bm_check) | ||
1405 | acpi_idle_update_bm_rld(pr, cx); | ||
1406 | |||
1407 | local_irq_disable(); | 1408 | local_irq_disable(); |
1408 | current_thread_info()->status &= ~TS_POLLING; | 1409 | current_thread_info()->status &= ~TS_POLLING; |
1409 | /* | 1410 | /* |
@@ -1418,13 +1419,21 @@ static int acpi_idle_enter_simple(struct cpuidle_device *dev, | |||
1418 | return 0; | 1419 | return 0; |
1419 | } | 1420 | } |
1420 | 1421 | ||
1422 | /* | ||
1423 | * Must be done before busmaster disable as we might need to | ||
1424 | * access HPET ! | ||
1425 | */ | ||
1426 | acpi_state_timer_broadcast(pr, cx, 1); | ||
1427 | |||
1428 | if (pr->flags.bm_check) | ||
1429 | acpi_idle_update_bm_rld(pr, cx); | ||
1430 | |||
1421 | if (cx->type == ACPI_STATE_C3) | 1431 | if (cx->type == ACPI_STATE_C3) |
1422 | ACPI_FLUSH_CPU_CACHE(); | 1432 | ACPI_FLUSH_CPU_CACHE(); |
1423 | 1433 | ||
1424 | t1 = inl(acpi_gbl_FADT.xpm_timer_block.address); | 1434 | t1 = inl(acpi_gbl_FADT.xpm_timer_block.address); |
1425 | /* Tell the scheduler that we are going deep-idle: */ | 1435 | /* Tell the scheduler that we are going deep-idle: */ |
1426 | sched_clock_idle_sleep_event(); | 1436 | sched_clock_idle_sleep_event(); |
1427 | acpi_state_timer_broadcast(pr, cx, 1); | ||
1428 | acpi_idle_do_entry(cx); | 1437 | acpi_idle_do_entry(cx); |
1429 | t2 = inl(acpi_gbl_FADT.xpm_timer_block.address); | 1438 | t2 = inl(acpi_gbl_FADT.xpm_timer_block.address); |
1430 | 1439 | ||
diff --git a/drivers/acpi/processor_throttling.c b/drivers/acpi/processor_throttling.c index c26c61fb36c3..6742d7bc4777 100644 --- a/drivers/acpi/processor_throttling.c +++ b/drivers/acpi/processor_throttling.c | |||
@@ -29,6 +29,7 @@ | |||
29 | #include <linux/kernel.h> | 29 | #include <linux/kernel.h> |
30 | #include <linux/module.h> | 30 | #include <linux/module.h> |
31 | #include <linux/init.h> | 31 | #include <linux/init.h> |
32 | #include <linux/sched.h> | ||
32 | #include <linux/cpufreq.h> | 33 | #include <linux/cpufreq.h> |
33 | #include <linux/proc_fs.h> | 34 | #include <linux/proc_fs.h> |
34 | #include <linux/seq_file.h> | 35 | #include <linux/seq_file.h> |
@@ -413,7 +414,7 @@ static int acpi_throttling_rdmsr(struct acpi_processor *pr, | |||
413 | } else { | 414 | } else { |
414 | msr_low = 0; | 415 | msr_low = 0; |
415 | msr_high = 0; | 416 | msr_high = 0; |
416 | rdmsr_on_cpu(cpu, MSR_IA32_THERM_CONTROL, | 417 | rdmsr_safe(MSR_IA32_THERM_CONTROL, |
417 | (u32 *)&msr_low , (u32 *) &msr_high); | 418 | (u32 *)&msr_low , (u32 *) &msr_high); |
418 | msr = (msr_high << 32) | msr_low; | 419 | msr = (msr_high << 32) | msr_low; |
419 | *value = (acpi_integer) msr; | 420 | *value = (acpi_integer) msr; |
@@ -438,7 +439,7 @@ static int acpi_throttling_wrmsr(struct acpi_processor *pr, acpi_integer value) | |||
438 | "HARDWARE addr space,NOT supported yet\n"); | 439 | "HARDWARE addr space,NOT supported yet\n"); |
439 | } else { | 440 | } else { |
440 | msr = value; | 441 | msr = value; |
441 | wrmsr_on_cpu(cpu, MSR_IA32_THERM_CONTROL, | 442 | wrmsr_safe(MSR_IA32_THERM_CONTROL, |
442 | msr & 0xffffffff, msr >> 32); | 443 | msr & 0xffffffff, msr >> 32); |
443 | ret = 0; | 444 | ret = 0; |
444 | } | 445 | } |
@@ -572,21 +573,32 @@ static int acpi_processor_get_throttling_ptc(struct acpi_processor *pr) | |||
572 | return -ENODEV; | 573 | return -ENODEV; |
573 | 574 | ||
574 | pr->throttling.state = 0; | 575 | pr->throttling.state = 0; |
575 | local_irq_disable(); | 576 | |
576 | value = 0; | 577 | value = 0; |
577 | ret = acpi_read_throttling_status(pr, &value); | 578 | ret = acpi_read_throttling_status(pr, &value); |
578 | if (ret >= 0) { | 579 | if (ret >= 0) { |
579 | state = acpi_get_throttling_state(pr, value); | 580 | state = acpi_get_throttling_state(pr, value); |
580 | pr->throttling.state = state; | 581 | pr->throttling.state = state; |
581 | } | 582 | } |
582 | local_irq_enable(); | ||
583 | 583 | ||
584 | return 0; | 584 | return 0; |
585 | } | 585 | } |
586 | 586 | ||
587 | static int acpi_processor_get_throttling(struct acpi_processor *pr) | 587 | static int acpi_processor_get_throttling(struct acpi_processor *pr) |
588 | { | 588 | { |
589 | return pr->throttling.acpi_processor_get_throttling(pr); | 589 | cpumask_t saved_mask; |
590 | int ret; | ||
591 | |||
592 | /* | ||
593 | * Migrate task to the cpu pointed by pr. | ||
594 | */ | ||
595 | saved_mask = current->cpus_allowed; | ||
596 | set_cpus_allowed(current, cpumask_of_cpu(pr->id)); | ||
597 | ret = pr->throttling.acpi_processor_get_throttling(pr); | ||
598 | /* restore the previous state */ | ||
599 | set_cpus_allowed(current, saved_mask); | ||
600 | |||
601 | return ret; | ||
590 | } | 602 | } |
591 | 603 | ||
592 | static int acpi_processor_get_fadt_info(struct acpi_processor *pr) | 604 | static int acpi_processor_get_fadt_info(struct acpi_processor *pr) |
@@ -717,21 +729,29 @@ static int acpi_processor_set_throttling_ptc(struct acpi_processor *pr, | |||
717 | if (state < pr->throttling_platform_limit) | 729 | if (state < pr->throttling_platform_limit) |
718 | return -EPERM; | 730 | return -EPERM; |
719 | 731 | ||
720 | local_irq_disable(); | ||
721 | value = 0; | 732 | value = 0; |
722 | ret = acpi_get_throttling_value(pr, state, &value); | 733 | ret = acpi_get_throttling_value(pr, state, &value); |
723 | if (ret >= 0) { | 734 | if (ret >= 0) { |
724 | acpi_write_throttling_state(pr, value); | 735 | acpi_write_throttling_state(pr, value); |
725 | pr->throttling.state = state; | 736 | pr->throttling.state = state; |
726 | } | 737 | } |
727 | local_irq_enable(); | ||
728 | 738 | ||
729 | return 0; | 739 | return 0; |
730 | } | 740 | } |
731 | 741 | ||
732 | int acpi_processor_set_throttling(struct acpi_processor *pr, int state) | 742 | int acpi_processor_set_throttling(struct acpi_processor *pr, int state) |
733 | { | 743 | { |
734 | return pr->throttling.acpi_processor_set_throttling(pr, state); | 744 | cpumask_t saved_mask; |
745 | int ret; | ||
746 | /* | ||
747 | * Migrate task to the cpu pointed by pr. | ||
748 | */ | ||
749 | saved_mask = current->cpus_allowed; | ||
750 | set_cpus_allowed(current, cpumask_of_cpu(pr->id)); | ||
751 | ret = pr->throttling.acpi_processor_set_throttling(pr, state); | ||
752 | /* restore the previous state */ | ||
753 | set_cpus_allowed(current, saved_mask); | ||
754 | return ret; | ||
735 | } | 755 | } |
736 | 756 | ||
737 | int acpi_processor_get_throttling_info(struct acpi_processor *pr) | 757 | int acpi_processor_get_throttling_info(struct acpi_processor *pr) |
diff --git a/drivers/ata/ahci.c b/drivers/ata/ahci.c index ed9b407e42d4..54f38c21dd95 100644 --- a/drivers/ata/ahci.c +++ b/drivers/ata/ahci.c | |||
@@ -193,6 +193,8 @@ enum { | |||
193 | ATA_FLAG_ACPI_SATA | ATA_FLAG_AN | | 193 | ATA_FLAG_ACPI_SATA | ATA_FLAG_AN | |
194 | ATA_FLAG_IPM, | 194 | ATA_FLAG_IPM, |
195 | AHCI_LFLAG_COMMON = ATA_LFLAG_SKIP_D2H_BSY, | 195 | AHCI_LFLAG_COMMON = ATA_LFLAG_SKIP_D2H_BSY, |
196 | |||
197 | ICH_MAP = 0x90, /* ICH MAP register */ | ||
196 | }; | 198 | }; |
197 | 199 | ||
198 | struct ahci_cmd_hdr { | 200 | struct ahci_cmd_hdr { |
@@ -536,6 +538,10 @@ static const struct pci_device_id ahci_pci_tbl[] = { | |||
536 | { PCI_VDEVICE(NVIDIA, 0x0ad9), board_ahci }, /* MCP77 */ | 538 | { PCI_VDEVICE(NVIDIA, 0x0ad9), board_ahci }, /* MCP77 */ |
537 | { PCI_VDEVICE(NVIDIA, 0x0ada), board_ahci }, /* MCP77 */ | 539 | { PCI_VDEVICE(NVIDIA, 0x0ada), board_ahci }, /* MCP77 */ |
538 | { PCI_VDEVICE(NVIDIA, 0x0adb), board_ahci }, /* MCP77 */ | 540 | { PCI_VDEVICE(NVIDIA, 0x0adb), board_ahci }, /* MCP77 */ |
541 | { PCI_VDEVICE(NVIDIA, 0x0ab4), board_ahci }, /* MCP79 */ | ||
542 | { PCI_VDEVICE(NVIDIA, 0x0ab5), board_ahci }, /* MCP79 */ | ||
543 | { PCI_VDEVICE(NVIDIA, 0x0ab6), board_ahci }, /* MCP79 */ | ||
544 | { PCI_VDEVICE(NVIDIA, 0x0ab7), board_ahci }, /* MCP79 */ | ||
539 | { PCI_VDEVICE(NVIDIA, 0x0ab8), board_ahci }, /* MCP79 */ | 545 | { PCI_VDEVICE(NVIDIA, 0x0ab8), board_ahci }, /* MCP79 */ |
540 | { PCI_VDEVICE(NVIDIA, 0x0ab9), board_ahci }, /* MCP79 */ | 546 | { PCI_VDEVICE(NVIDIA, 0x0ab9), board_ahci }, /* MCP79 */ |
541 | { PCI_VDEVICE(NVIDIA, 0x0aba), board_ahci }, /* MCP79 */ | 547 | { PCI_VDEVICE(NVIDIA, 0x0aba), board_ahci }, /* MCP79 */ |
@@ -1267,9 +1273,9 @@ static int ahci_do_softreset(struct ata_link *link, unsigned int *class, | |||
1267 | 1273 | ||
1268 | /* prepare for SRST (AHCI-1.1 10.4.1) */ | 1274 | /* prepare for SRST (AHCI-1.1 10.4.1) */ |
1269 | rc = ahci_kick_engine(ap, 1); | 1275 | rc = ahci_kick_engine(ap, 1); |
1270 | if (rc) | 1276 | if (rc && rc != -EOPNOTSUPP) |
1271 | ata_link_printk(link, KERN_WARNING, | 1277 | ata_link_printk(link, KERN_WARNING, |
1272 | "failed to reset engine (errno=%d)", rc); | 1278 | "failed to reset engine (errno=%d)\n", rc); |
1273 | 1279 | ||
1274 | ata_tf_init(link->device, &tf); | 1280 | ata_tf_init(link->device, &tf); |
1275 | 1281 | ||
@@ -1634,7 +1640,7 @@ static void ahci_port_intr(struct ata_port *ap) | |||
1634 | struct ahci_host_priv *hpriv = ap->host->private_data; | 1640 | struct ahci_host_priv *hpriv = ap->host->private_data; |
1635 | int resetting = !!(ap->pflags & ATA_PFLAG_RESETTING); | 1641 | int resetting = !!(ap->pflags & ATA_PFLAG_RESETTING); |
1636 | u32 status, qc_active; | 1642 | u32 status, qc_active; |
1637 | int rc, known_irq = 0; | 1643 | int rc; |
1638 | 1644 | ||
1639 | status = readl(port_mmio + PORT_IRQ_STAT); | 1645 | status = readl(port_mmio + PORT_IRQ_STAT); |
1640 | writel(status, port_mmio + PORT_IRQ_STAT); | 1646 | writel(status, port_mmio + PORT_IRQ_STAT); |
@@ -1692,80 +1698,12 @@ static void ahci_port_intr(struct ata_port *ap) | |||
1692 | 1698 | ||
1693 | rc = ata_qc_complete_multiple(ap, qc_active, NULL); | 1699 | rc = ata_qc_complete_multiple(ap, qc_active, NULL); |
1694 | 1700 | ||
1695 | /* If resetting, spurious or invalid completions are expected, | 1701 | /* while resetting, invalid completions are expected */ |
1696 | * return unconditionally. | 1702 | if (unlikely(rc < 0 && !resetting)) { |
1697 | */ | ||
1698 | if (resetting) | ||
1699 | return; | ||
1700 | |||
1701 | if (rc > 0) | ||
1702 | return; | ||
1703 | if (rc < 0) { | ||
1704 | ehi->err_mask |= AC_ERR_HSM; | 1703 | ehi->err_mask |= AC_ERR_HSM; |
1705 | ehi->action |= ATA_EH_SOFTRESET; | 1704 | ehi->action |= ATA_EH_SOFTRESET; |
1706 | ata_port_freeze(ap); | 1705 | ata_port_freeze(ap); |
1707 | return; | ||
1708 | } | 1706 | } |
1709 | |||
1710 | /* hmmm... a spurious interrupt */ | ||
1711 | |||
1712 | /* if !NCQ, ignore. No modern ATA device has broken HSM | ||
1713 | * implementation for non-NCQ commands. | ||
1714 | */ | ||
1715 | if (!ap->link.sactive) | ||
1716 | return; | ||
1717 | |||
1718 | if (status & PORT_IRQ_D2H_REG_FIS) { | ||
1719 | if (!pp->ncq_saw_d2h) | ||
1720 | ata_port_printk(ap, KERN_INFO, | ||
1721 | "D2H reg with I during NCQ, " | ||
1722 | "this message won't be printed again\n"); | ||
1723 | pp->ncq_saw_d2h = 1; | ||
1724 | known_irq = 1; | ||
1725 | } | ||
1726 | |||
1727 | if (status & PORT_IRQ_DMAS_FIS) { | ||
1728 | if (!pp->ncq_saw_dmas) | ||
1729 | ata_port_printk(ap, KERN_INFO, | ||
1730 | "DMAS FIS during NCQ, " | ||
1731 | "this message won't be printed again\n"); | ||
1732 | pp->ncq_saw_dmas = 1; | ||
1733 | known_irq = 1; | ||
1734 | } | ||
1735 | |||
1736 | if (status & PORT_IRQ_SDB_FIS) { | ||
1737 | const __le32 *f = pp->rx_fis + RX_FIS_SDB; | ||
1738 | |||
1739 | if (le32_to_cpu(f[1])) { | ||
1740 | /* SDB FIS containing spurious completions | ||
1741 | * might be dangerous, whine and fail commands | ||
1742 | * with HSM violation. EH will turn off NCQ | ||
1743 | * after several such failures. | ||
1744 | */ | ||
1745 | ata_ehi_push_desc(ehi, | ||
1746 | "spurious completions during NCQ " | ||
1747 | "issue=0x%x SAct=0x%x FIS=%08x:%08x", | ||
1748 | readl(port_mmio + PORT_CMD_ISSUE), | ||
1749 | readl(port_mmio + PORT_SCR_ACT), | ||
1750 | le32_to_cpu(f[0]), le32_to_cpu(f[1])); | ||
1751 | ehi->err_mask |= AC_ERR_HSM; | ||
1752 | ehi->action |= ATA_EH_SOFTRESET; | ||
1753 | ata_port_freeze(ap); | ||
1754 | } else { | ||
1755 | if (!pp->ncq_saw_sdb) | ||
1756 | ata_port_printk(ap, KERN_INFO, | ||
1757 | "spurious SDB FIS %08x:%08x during NCQ, " | ||
1758 | "this message won't be printed again\n", | ||
1759 | le32_to_cpu(f[0]), le32_to_cpu(f[1])); | ||
1760 | pp->ncq_saw_sdb = 1; | ||
1761 | } | ||
1762 | known_irq = 1; | ||
1763 | } | ||
1764 | |||
1765 | if (!known_irq) | ||
1766 | ata_port_printk(ap, KERN_INFO, "spurious interrupt " | ||
1767 | "(irq_stat 0x%x active_tag 0x%x sactive 0x%x)\n", | ||
1768 | status, ap->link.active_tag, ap->link.sactive); | ||
1769 | } | 1707 | } |
1770 | 1708 | ||
1771 | static void ahci_irq_clear(struct ata_port *ap) | 1709 | static void ahci_irq_clear(struct ata_port *ap) |
@@ -2269,6 +2207,22 @@ static int ahci_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) | |||
2269 | if (rc) | 2207 | if (rc) |
2270 | return rc; | 2208 | return rc; |
2271 | 2209 | ||
2210 | if (pdev->vendor == PCI_VENDOR_ID_INTEL && | ||
2211 | (pdev->device == 0x2652 || pdev->device == 0x2653)) { | ||
2212 | u8 map; | ||
2213 | |||
2214 | /* ICH6s share the same PCI ID for both piix and ahci | ||
2215 | * modes. Enabling ahci mode while MAP indicates | ||
2216 | * combined mode is a bad idea. Yield to ata_piix. | ||
2217 | */ | ||
2218 | pci_read_config_byte(pdev, ICH_MAP, &map); | ||
2219 | if (map & 0x3) { | ||
2220 | dev_printk(KERN_INFO, &pdev->dev, "controller is in " | ||
2221 | "combined mode, can't enable AHCI mode\n"); | ||
2222 | return -ENODEV; | ||
2223 | } | ||
2224 | } | ||
2225 | |||
2272 | hpriv = devm_kzalloc(dev, sizeof(*hpriv), GFP_KERNEL); | 2226 | hpriv = devm_kzalloc(dev, sizeof(*hpriv), GFP_KERNEL); |
2273 | if (!hpriv) | 2227 | if (!hpriv) |
2274 | return -ENOMEM; | 2228 | return -ENOMEM; |
diff --git a/drivers/ata/ata_piix.c b/drivers/ata/ata_piix.c index 483269db2c7d..bb62a588f489 100644 --- a/drivers/ata/ata_piix.c +++ b/drivers/ata/ata_piix.c | |||
@@ -967,6 +967,20 @@ static int piix_broken_suspend(void) | |||
967 | }, | 967 | }, |
968 | }, | 968 | }, |
969 | { | 969 | { |
970 | .ident = "TECRA M3", | ||
971 | .matches = { | ||
972 | DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"), | ||
973 | DMI_MATCH(DMI_PRODUCT_NAME, "Tecra M3"), | ||
974 | }, | ||
975 | }, | ||
976 | { | ||
977 | .ident = "TECRA M4", | ||
978 | .matches = { | ||
979 | DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"), | ||
980 | DMI_MATCH(DMI_PRODUCT_NAME, "Tecra M4"), | ||
981 | }, | ||
982 | }, | ||
983 | { | ||
970 | .ident = "TECRA M5", | 984 | .ident = "TECRA M5", |
971 | .matches = { | 985 | .matches = { |
972 | DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"), | 986 | DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"), |
@@ -981,6 +995,20 @@ static int piix_broken_suspend(void) | |||
981 | }, | 995 | }, |
982 | }, | 996 | }, |
983 | { | 997 | { |
998 | .ident = "TECRA A8", | ||
999 | .matches = { | ||
1000 | DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"), | ||
1001 | DMI_MATCH(DMI_PRODUCT_NAME, "TECRA A8"), | ||
1002 | }, | ||
1003 | }, | ||
1004 | { | ||
1005 | .ident = "Satellite R25", | ||
1006 | .matches = { | ||
1007 | DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"), | ||
1008 | DMI_MATCH(DMI_PRODUCT_NAME, "Satellite R25"), | ||
1009 | }, | ||
1010 | }, | ||
1011 | { | ||
984 | .ident = "Satellite U200", | 1012 | .ident = "Satellite U200", |
985 | .matches = { | 1013 | .matches = { |
986 | DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"), | 1014 | DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"), |
@@ -988,6 +1016,13 @@ static int piix_broken_suspend(void) | |||
988 | }, | 1016 | }, |
989 | }, | 1017 | }, |
990 | { | 1018 | { |
1019 | .ident = "Satellite U200", | ||
1020 | .matches = { | ||
1021 | DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"), | ||
1022 | DMI_MATCH(DMI_PRODUCT_NAME, "SATELLITE U200"), | ||
1023 | }, | ||
1024 | }, | ||
1025 | { | ||
991 | .ident = "Satellite Pro U200", | 1026 | .ident = "Satellite Pro U200", |
992 | .matches = { | 1027 | .matches = { |
993 | DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"), | 1028 | DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"), |
diff --git a/drivers/ata/libata-core.c b/drivers/ata/libata-core.c index 33f06277b3be..e4dea8623a71 100644 --- a/drivers/ata/libata-core.c +++ b/drivers/ata/libata-core.c | |||
@@ -4140,6 +4140,7 @@ static const struct ata_blacklist_entry ata_device_blacklist [] = { | |||
4140 | /* Devices where NCQ should be avoided */ | 4140 | /* Devices where NCQ should be avoided */ |
4141 | /* NCQ is slow */ | 4141 | /* NCQ is slow */ |
4142 | { "WDC WD740ADFD-00", NULL, ATA_HORKAGE_NONCQ }, | 4142 | { "WDC WD740ADFD-00", NULL, ATA_HORKAGE_NONCQ }, |
4143 | { "WDC WD740ADFD-00NLR1", NULL, ATA_HORKAGE_NONCQ, }, | ||
4143 | /* http://thread.gmane.org/gmane.linux.ide/14907 */ | 4144 | /* http://thread.gmane.org/gmane.linux.ide/14907 */ |
4144 | { "FUJITSU MHT2060BH", NULL, ATA_HORKAGE_NONCQ }, | 4145 | { "FUJITSU MHT2060BH", NULL, ATA_HORKAGE_NONCQ }, |
4145 | /* NCQ is broken */ | 4146 | /* NCQ is broken */ |
@@ -4154,23 +4155,6 @@ static const struct ata_blacklist_entry ata_device_blacklist [] = { | |||
4154 | { "HTS541060G9SA00", "MB3OC60D", ATA_HORKAGE_NONCQ, }, | 4155 | { "HTS541060G9SA00", "MB3OC60D", ATA_HORKAGE_NONCQ, }, |
4155 | { "HTS541080G9SA00", "MB4OC60D", ATA_HORKAGE_NONCQ, }, | 4156 | { "HTS541080G9SA00", "MB4OC60D", ATA_HORKAGE_NONCQ, }, |
4156 | { "HTS541010G9SA00", "MBZOC60D", ATA_HORKAGE_NONCQ, }, | 4157 | { "HTS541010G9SA00", "MBZOC60D", ATA_HORKAGE_NONCQ, }, |
4157 | /* Drives which do spurious command completion */ | ||
4158 | { "HTS541680J9SA00", "SB2IC7EP", ATA_HORKAGE_NONCQ, }, | ||
4159 | { "HTS541612J9SA00", "SBDIC7JP", ATA_HORKAGE_NONCQ, }, | ||
4160 | { "HDT722516DLA380", "V43OA96A", ATA_HORKAGE_NONCQ, }, | ||
4161 | { "Hitachi HTS541616J9SA00", "SB4OC70P", ATA_HORKAGE_NONCQ, }, | ||
4162 | { "Hitachi HTS542525K9SA00", "BBFOC31P", ATA_HORKAGE_NONCQ, }, | ||
4163 | { "WDC WD740ADFD-00NLR1", NULL, ATA_HORKAGE_NONCQ, }, | ||
4164 | { "WDC WD3200AAJS-00RYA0", "12.01B01", ATA_HORKAGE_NONCQ, }, | ||
4165 | { "FUJITSU MHV2080BH", "00840028", ATA_HORKAGE_NONCQ, }, | ||
4166 | { "ST9120822AS", "3.CLF", ATA_HORKAGE_NONCQ, }, | ||
4167 | { "ST9160821AS", "3.CLF", ATA_HORKAGE_NONCQ, }, | ||
4168 | { "ST9160821AS", "3.ALD", ATA_HORKAGE_NONCQ, }, | ||
4169 | { "ST9160821AS", "3.CCD", ATA_HORKAGE_NONCQ, }, | ||
4170 | { "ST3160812AS", "3.ADJ", ATA_HORKAGE_NONCQ, }, | ||
4171 | { "ST980813AS", "3.ADB", ATA_HORKAGE_NONCQ, }, | ||
4172 | { "SAMSUNG HD401LJ", "ZZ100-15", ATA_HORKAGE_NONCQ, }, | ||
4173 | { "Maxtor 7V300F0", "VA111900", ATA_HORKAGE_NONCQ, }, | ||
4174 | 4158 | ||
4175 | /* devices which puke on READ_NATIVE_MAX */ | 4159 | /* devices which puke on READ_NATIVE_MAX */ |
4176 | { "HDS724040KLSA80", "KFAOA20N", ATA_HORKAGE_BROKEN_HPA, }, | 4160 | { "HDS724040KLSA80", "KFAOA20N", ATA_HORKAGE_BROKEN_HPA, }, |
@@ -4185,6 +4169,9 @@ static const struct ata_blacklist_entry ata_device_blacklist [] = { | |||
4185 | /* Devices which get the IVB wrong */ | 4169 | /* Devices which get the IVB wrong */ |
4186 | { "QUANTUM FIREBALLlct10 05", "A03.0900", ATA_HORKAGE_IVB, }, | 4170 | { "QUANTUM FIREBALLlct10 05", "A03.0900", ATA_HORKAGE_IVB, }, |
4187 | { "TSSTcorp CDDVDW SH-S202J", "SB00", ATA_HORKAGE_IVB, }, | 4171 | { "TSSTcorp CDDVDW SH-S202J", "SB00", ATA_HORKAGE_IVB, }, |
4172 | { "TSSTcorp CDDVDW SH-S202J", "SB01", ATA_HORKAGE_IVB, }, | ||
4173 | { "TSSTcorp CDDVDW SH-S202N", "SB00", ATA_HORKAGE_IVB, }, | ||
4174 | { "TSSTcorp CDDVDW SH-S202N", "SB01", ATA_HORKAGE_IVB, }, | ||
4188 | 4175 | ||
4189 | /* End Marker */ | 4176 | /* End Marker */ |
4190 | { } | 4177 | { } |
@@ -6964,12 +6951,11 @@ int ata_host_start(struct ata_host *host) | |||
6964 | if (ap->ops->port_start) { | 6951 | if (ap->ops->port_start) { |
6965 | rc = ap->ops->port_start(ap); | 6952 | rc = ap->ops->port_start(ap); |
6966 | if (rc) { | 6953 | if (rc) { |
6967 | ata_port_printk(ap, KERN_ERR, "failed to " | 6954 | if (rc != -ENODEV) |
6968 | "start port (errno=%d)\n", rc); | 6955 | dev_printk(KERN_ERR, host->dev, "failed to start port %d (errno=%d)\n", i, rc); |
6969 | goto err_out; | 6956 | goto err_out; |
6970 | } | 6957 | } |
6971 | } | 6958 | } |
6972 | |||
6973 | ata_eh_freeze_port(ap); | 6959 | ata_eh_freeze_port(ap); |
6974 | } | 6960 | } |
6975 | 6961 | ||
diff --git a/drivers/ata/libata-eh.c b/drivers/ata/libata-eh.c index 0dac69db1fdf..e6605f038647 100644 --- a/drivers/ata/libata-eh.c +++ b/drivers/ata/libata-eh.c | |||
@@ -1850,30 +1850,54 @@ static void ata_eh_link_report(struct ata_link *link) | |||
1850 | ehc->i.serror & SERR_DEV_XCHG ? "DevExch " : ""); | 1850 | ehc->i.serror & SERR_DEV_XCHG ? "DevExch " : ""); |
1851 | 1851 | ||
1852 | for (tag = 0; tag < ATA_MAX_QUEUE; tag++) { | 1852 | for (tag = 0; tag < ATA_MAX_QUEUE; tag++) { |
1853 | static const char *dma_str[] = { | ||
1854 | [DMA_BIDIRECTIONAL] = "bidi", | ||
1855 | [DMA_TO_DEVICE] = "out", | ||
1856 | [DMA_FROM_DEVICE] = "in", | ||
1857 | [DMA_NONE] = "", | ||
1858 | }; | ||
1859 | struct ata_queued_cmd *qc = __ata_qc_from_tag(ap, tag); | 1853 | struct ata_queued_cmd *qc = __ata_qc_from_tag(ap, tag); |
1860 | struct ata_taskfile *cmd = &qc->tf, *res = &qc->result_tf; | 1854 | struct ata_taskfile *cmd = &qc->tf, *res = &qc->result_tf; |
1855 | const u8 *cdb = qc->cdb; | ||
1856 | char data_buf[20] = ""; | ||
1857 | char cdb_buf[70] = ""; | ||
1861 | 1858 | ||
1862 | if (!(qc->flags & ATA_QCFLAG_FAILED) || | 1859 | if (!(qc->flags & ATA_QCFLAG_FAILED) || |
1863 | qc->dev->link != link || !qc->err_mask) | 1860 | qc->dev->link != link || !qc->err_mask) |
1864 | continue; | 1861 | continue; |
1865 | 1862 | ||
1863 | if (qc->dma_dir != DMA_NONE) { | ||
1864 | static const char *dma_str[] = { | ||
1865 | [DMA_BIDIRECTIONAL] = "bidi", | ||
1866 | [DMA_TO_DEVICE] = "out", | ||
1867 | [DMA_FROM_DEVICE] = "in", | ||
1868 | }; | ||
1869 | static const char *prot_str[] = { | ||
1870 | [ATA_PROT_PIO] = "pio", | ||
1871 | [ATA_PROT_DMA] = "dma", | ||
1872 | [ATA_PROT_NCQ] = "ncq", | ||
1873 | [ATA_PROT_ATAPI] = "pio", | ||
1874 | [ATA_PROT_ATAPI_DMA] = "dma", | ||
1875 | }; | ||
1876 | |||
1877 | snprintf(data_buf, sizeof(data_buf), " %s %u %s", | ||
1878 | prot_str[qc->tf.protocol], qc->nbytes, | ||
1879 | dma_str[qc->dma_dir]); | ||
1880 | } | ||
1881 | |||
1882 | if (is_atapi_taskfile(&qc->tf)) | ||
1883 | snprintf(cdb_buf, sizeof(cdb_buf), | ||
1884 | "cdb %02x %02x %02x %02x %02x %02x %02x %02x " | ||
1885 | "%02x %02x %02x %02x %02x %02x %02x %02x\n ", | ||
1886 | cdb[0], cdb[1], cdb[2], cdb[3], | ||
1887 | cdb[4], cdb[5], cdb[6], cdb[7], | ||
1888 | cdb[8], cdb[9], cdb[10], cdb[11], | ||
1889 | cdb[12], cdb[13], cdb[14], cdb[15]); | ||
1890 | |||
1866 | ata_dev_printk(qc->dev, KERN_ERR, | 1891 | ata_dev_printk(qc->dev, KERN_ERR, |
1867 | "cmd %02x/%02x:%02x:%02x:%02x:%02x/%02x:%02x:%02x:%02x:%02x/%02x " | 1892 | "cmd %02x/%02x:%02x:%02x:%02x:%02x/%02x:%02x:%02x:%02x:%02x/%02x " |
1868 | "tag %d cdb 0x%x data %u %s\n " | 1893 | "tag %d%s\n %s" |
1869 | "res %02x/%02x:%02x:%02x:%02x:%02x/%02x:%02x:%02x:%02x:%02x/%02x " | 1894 | "res %02x/%02x:%02x:%02x:%02x:%02x/%02x:%02x:%02x:%02x:%02x/%02x " |
1870 | "Emask 0x%x (%s)%s\n", | 1895 | "Emask 0x%x (%s)%s\n", |
1871 | cmd->command, cmd->feature, cmd->nsect, | 1896 | cmd->command, cmd->feature, cmd->nsect, |
1872 | cmd->lbal, cmd->lbam, cmd->lbah, | 1897 | cmd->lbal, cmd->lbam, cmd->lbah, |
1873 | cmd->hob_feature, cmd->hob_nsect, | 1898 | cmd->hob_feature, cmd->hob_nsect, |
1874 | cmd->hob_lbal, cmd->hob_lbam, cmd->hob_lbah, | 1899 | cmd->hob_lbal, cmd->hob_lbam, cmd->hob_lbah, |
1875 | cmd->device, qc->tag, qc->cdb[0], qc->nbytes, | 1900 | cmd->device, qc->tag, data_buf, cdb_buf, |
1876 | dma_str[qc->dma_dir], | ||
1877 | res->command, res->feature, res->nsect, | 1901 | res->command, res->feature, res->nsect, |
1878 | res->lbal, res->lbam, res->lbah, | 1902 | res->lbal, res->lbam, res->lbah, |
1879 | res->hob_feature, res->hob_nsect, | 1903 | res->hob_feature, res->hob_nsect, |
diff --git a/drivers/ata/pata_amd.c b/drivers/ata/pata_amd.c index c5779ad4abca..3cc27b514654 100644 --- a/drivers/ata/pata_amd.c +++ b/drivers/ata/pata_amd.c | |||
@@ -25,7 +25,7 @@ | |||
25 | #include <linux/libata.h> | 25 | #include <linux/libata.h> |
26 | 26 | ||
27 | #define DRV_NAME "pata_amd" | 27 | #define DRV_NAME "pata_amd" |
28 | #define DRV_VERSION "0.3.9" | 28 | #define DRV_VERSION "0.3.10" |
29 | 29 | ||
30 | /** | 30 | /** |
31 | * timing_setup - shared timing computation and load | 31 | * timing_setup - shared timing computation and load |
@@ -115,7 +115,8 @@ static void timing_setup(struct ata_port *ap, struct ata_device *adev, int offse | |||
115 | } | 115 | } |
116 | 116 | ||
117 | /* UDMA timing */ | 117 | /* UDMA timing */ |
118 | pci_write_config_byte(pdev, offset + 0x10 + (3 - dn), t); | 118 | if (at.udma) |
119 | pci_write_config_byte(pdev, offset + 0x10 + (3 - dn), t); | ||
119 | } | 120 | } |
120 | 121 | ||
121 | /** | 122 | /** |
diff --git a/drivers/ata/pata_at32.c b/drivers/ata/pata_at32.c index bb250a48e27c..67e574de31e8 100644 --- a/drivers/ata/pata_at32.c +++ b/drivers/ata/pata_at32.c | |||
@@ -28,7 +28,7 @@ | |||
28 | #include <asm/arch/smc.h> | 28 | #include <asm/arch/smc.h> |
29 | 29 | ||
30 | #define DRV_NAME "pata_at32" | 30 | #define DRV_NAME "pata_at32" |
31 | #define DRV_VERSION "0.0.2" | 31 | #define DRV_VERSION "0.0.3" |
32 | 32 | ||
33 | /* | 33 | /* |
34 | * CompactFlash controller memory layout relative to the base address: | 34 | * CompactFlash controller memory layout relative to the base address: |
@@ -64,6 +64,8 @@ | |||
64 | * Mode 2 | 8.3 | 240 ns | 0x07 | 64 | * Mode 2 | 8.3 | 240 ns | 0x07 |
65 | * Mode 3 | 11.1 | 180 ns | 0x0f | 65 | * Mode 3 | 11.1 | 180 ns | 0x0f |
66 | * Mode 4 | 16.7 | 120 ns | 0x1f | 66 | * Mode 4 | 16.7 | 120 ns | 0x1f |
67 | * | ||
68 | * Alter PIO_MASK below according to table to set maximal PIO mode. | ||
67 | */ | 69 | */ |
68 | #define PIO_MASK (0x1f) | 70 | #define PIO_MASK (0x1f) |
69 | 71 | ||
@@ -85,36 +87,40 @@ struct at32_ide_info { | |||
85 | */ | 87 | */ |
86 | static int pata_at32_setup_timing(struct device *dev, | 88 | static int pata_at32_setup_timing(struct device *dev, |
87 | struct at32_ide_info *info, | 89 | struct at32_ide_info *info, |
88 | const struct ata_timing *timing) | 90 | const struct ata_timing *ata) |
89 | { | 91 | { |
90 | /* These two values are found through testing */ | ||
91 | const int min_recover = 25; | ||
92 | const int ncs_hold = 15; | ||
93 | |||
94 | struct smc_config *smc = &info->smc; | 92 | struct smc_config *smc = &info->smc; |
93 | struct smc_timing timing; | ||
95 | 94 | ||
96 | int active; | 95 | int active; |
97 | int recover; | 96 | int recover; |
98 | 97 | ||
98 | memset(&timing, 0, sizeof(struct smc_timing)); | ||
99 | |||
99 | /* Total cycle time */ | 100 | /* Total cycle time */ |
100 | smc->read_cycle = timing->cyc8b; | 101 | timing.read_cycle = ata->cyc8b; |
101 | 102 | ||
102 | /* DIOR <= CFIOR timings */ | 103 | /* DIOR <= CFIOR timings */ |
103 | smc->nrd_setup = timing->setup; | 104 | timing.nrd_setup = ata->setup; |
104 | smc->nrd_pulse = timing->act8b; | 105 | timing.nrd_pulse = ata->act8b; |
106 | timing.nrd_recover = ata->rec8b; | ||
107 | |||
108 | /* Convert nanosecond timing to clock cycles */ | ||
109 | smc_set_timing(smc, &timing); | ||
105 | 110 | ||
106 | /* Compute recover, extend total cycle if needed */ | 111 | /* Add one extra cycle setup due to signal ring */ |
107 | active = smc->nrd_setup + smc->nrd_pulse; | 112 | smc->nrd_setup = smc->nrd_setup + 1; |
113 | |||
114 | active = smc->nrd_setup + smc->nrd_pulse; | ||
108 | recover = smc->read_cycle - active; | 115 | recover = smc->read_cycle - active; |
109 | 116 | ||
110 | if (recover < min_recover) { | 117 | /* Need at least two cycles recovery */ |
111 | smc->read_cycle = active + min_recover; | 118 | if (recover < 2) |
112 | recover = min_recover; | 119 | smc->read_cycle = active + 2; |
113 | } | ||
114 | 120 | ||
115 | /* (CS0, CS1, DIR, OE) <= (CFCE1, CFCE2, CFRNW, NCSX) timings */ | 121 | /* (CS0, CS1, DIR, OE) <= (CFCE1, CFCE2, CFRNW, NCSX) timings */ |
116 | smc->ncs_read_setup = 0; | 122 | smc->ncs_read_setup = 1; |
117 | smc->ncs_read_pulse = active + ncs_hold; | 123 | smc->ncs_read_pulse = smc->read_cycle - 2; |
118 | 124 | ||
119 | /* Write timings same as read timings */ | 125 | /* Write timings same as read timings */ |
120 | smc->write_cycle = smc->read_cycle; | 126 | smc->write_cycle = smc->read_cycle; |
@@ -123,11 +129,13 @@ static int pata_at32_setup_timing(struct device *dev, | |||
123 | smc->ncs_write_setup = smc->ncs_read_setup; | 129 | smc->ncs_write_setup = smc->ncs_read_setup; |
124 | smc->ncs_write_pulse = smc->ncs_read_pulse; | 130 | smc->ncs_write_pulse = smc->ncs_read_pulse; |
125 | 131 | ||
126 | /* Do some debugging output */ | 132 | /* Do some debugging output of ATA and SMC timings */ |
127 | dev_dbg(dev, "SMC: C=%d S=%d P=%d R=%d NCSS=%d NCSP=%d NCSR=%d\n", | 133 | dev_dbg(dev, "ATA: C=%d S=%d P=%d R=%d\n", |
134 | ata->cyc8b, ata->setup, ata->act8b, ata->rec8b); | ||
135 | |||
136 | dev_dbg(dev, "SMC: C=%d S=%d P=%d NS=%d NP=%d\n", | ||
128 | smc->read_cycle, smc->nrd_setup, smc->nrd_pulse, | 137 | smc->read_cycle, smc->nrd_setup, smc->nrd_pulse, |
129 | recover, smc->ncs_read_setup, smc->ncs_read_pulse, | 138 | smc->ncs_read_setup, smc->ncs_read_pulse); |
130 | smc->read_cycle - smc->ncs_read_pulse); | ||
131 | 139 | ||
132 | /* Finally, configure the SMC */ | 140 | /* Finally, configure the SMC */ |
133 | return smc_set_configuration(info->cs, smc); | 141 | return smc_set_configuration(info->cs, smc); |
@@ -182,7 +190,6 @@ static struct scsi_host_template at32_sht = { | |||
182 | }; | 190 | }; |
183 | 191 | ||
184 | static struct ata_port_operations at32_port_ops = { | 192 | static struct ata_port_operations at32_port_ops = { |
185 | .port_disable = ata_port_disable, | ||
186 | .set_piomode = pata_at32_set_piomode, | 193 | .set_piomode = pata_at32_set_piomode, |
187 | .tf_load = ata_tf_load, | 194 | .tf_load = ata_tf_load, |
188 | .tf_read = ata_tf_read, | 195 | .tf_read = ata_tf_read, |
@@ -203,7 +210,6 @@ static struct ata_port_operations at32_port_ops = { | |||
203 | 210 | ||
204 | .irq_clear = pata_at32_irq_clear, | 211 | .irq_clear = pata_at32_irq_clear, |
205 | .irq_on = ata_irq_on, | 212 | .irq_on = ata_irq_on, |
206 | .irq_ack = ata_irq_ack, | ||
207 | 213 | ||
208 | .port_start = ata_sff_port_start, | 214 | .port_start = ata_sff_port_start, |
209 | }; | 215 | }; |
@@ -223,8 +229,7 @@ static int __init pata_at32_init_one(struct device *dev, | |||
223 | /* Setup ATA bindings */ | 229 | /* Setup ATA bindings */ |
224 | ap->ops = &at32_port_ops; | 230 | ap->ops = &at32_port_ops; |
225 | ap->pio_mask = PIO_MASK; | 231 | ap->pio_mask = PIO_MASK; |
226 | ap->flags = ATA_FLAG_MMIO | ATA_FLAG_SLAVE_POSS | 232 | ap->flags |= ATA_FLAG_MMIO | ATA_FLAG_SLAVE_POSS; |
227 | | ATA_FLAG_PIO_POLLING; | ||
228 | 233 | ||
229 | /* | 234 | /* |
230 | * Since all 8-bit taskfile transfers has to go on the lower | 235 | * Since all 8-bit taskfile transfers has to go on the lower |
@@ -357,12 +362,12 @@ static int __init pata_at32_probe(struct platform_device *pdev) | |||
357 | info->smc.tdf_mode = 0; /* TDF optimization disabled */ | 362 | info->smc.tdf_mode = 0; /* TDF optimization disabled */ |
358 | info->smc.tdf_cycles = 0; /* No TDF wait cycles */ | 363 | info->smc.tdf_cycles = 0; /* No TDF wait cycles */ |
359 | 364 | ||
360 | /* Setup ATA timing */ | 365 | /* Setup SMC to ATA timing */ |
361 | ret = pata_at32_setup_timing(dev, info, &initial_timing); | 366 | ret = pata_at32_setup_timing(dev, info, &initial_timing); |
362 | if (ret) | 367 | if (ret) |
363 | goto err_setup_timing; | 368 | goto err_setup_timing; |
364 | 369 | ||
365 | /* Setup ATA addresses */ | 370 | /* Map ATA address space */ |
366 | ret = -ENOMEM; | 371 | ret = -ENOMEM; |
367 | info->ide_addr = devm_ioremap(dev, info->res_ide.start, 16); | 372 | info->ide_addr = devm_ioremap(dev, info->res_ide.start, 16); |
368 | info->alt_addr = devm_ioremap(dev, info->res_alt.start, 16); | 373 | info->alt_addr = devm_ioremap(dev, info->res_alt.start, 16); |
@@ -373,7 +378,7 @@ static int __init pata_at32_probe(struct platform_device *pdev) | |||
373 | pata_at32_debug_bus(dev, info); | 378 | pata_at32_debug_bus(dev, info); |
374 | #endif | 379 | #endif |
375 | 380 | ||
376 | /* Register ATA device */ | 381 | /* Setup and register ATA device */ |
377 | ret = pata_at32_init_one(dev, info); | 382 | ret = pata_at32_init_one(dev, info); |
378 | if (ret) | 383 | if (ret) |
379 | goto err_ata_device; | 384 | goto err_ata_device; |
diff --git a/drivers/ata/pata_bf54x.c b/drivers/ata/pata_bf54x.c index 81db405a5445..088a41f4e656 100644 --- a/drivers/ata/pata_bf54x.c +++ b/drivers/ata/pata_bf54x.c | |||
@@ -1489,6 +1489,8 @@ static int __devinit bfin_atapi_probe(struct platform_device *pdev) | |||
1489 | int board_idx = 0; | 1489 | int board_idx = 0; |
1490 | struct resource *res; | 1490 | struct resource *res; |
1491 | struct ata_host *host; | 1491 | struct ata_host *host; |
1492 | unsigned int fsclk = get_sclk(); | ||
1493 | int udma_mode = 5; | ||
1492 | const struct ata_port_info *ppi[] = | 1494 | const struct ata_port_info *ppi[] = |
1493 | { &bfin_port_info[board_idx], NULL }; | 1495 | { &bfin_port_info[board_idx], NULL }; |
1494 | 1496 | ||
@@ -1507,6 +1509,11 @@ static int __devinit bfin_atapi_probe(struct platform_device *pdev) | |||
1507 | if (res == NULL) | 1509 | if (res == NULL) |
1508 | return -EINVAL; | 1510 | return -EINVAL; |
1509 | 1511 | ||
1512 | while (bfin_port_info[board_idx].udma_mask>0 && udma_fsclk[udma_mode] > fsclk) { | ||
1513 | udma_mode--; | ||
1514 | bfin_port_info[board_idx].udma_mask >>= 1; | ||
1515 | } | ||
1516 | |||
1510 | /* | 1517 | /* |
1511 | * Now that that's out of the way, wire up the port.. | 1518 | * Now that that's out of the way, wire up the port.. |
1512 | */ | 1519 | */ |
diff --git a/drivers/ata/pata_via.c b/drivers/ata/pata_via.c index a4175fbdd170..453d72bf2598 100644 --- a/drivers/ata/pata_via.c +++ b/drivers/ata/pata_via.c | |||
@@ -63,7 +63,7 @@ | |||
63 | #include <linux/dmi.h> | 63 | #include <linux/dmi.h> |
64 | 64 | ||
65 | #define DRV_NAME "pata_via" | 65 | #define DRV_NAME "pata_via" |
66 | #define DRV_VERSION "0.3.2" | 66 | #define DRV_VERSION "0.3.3" |
67 | 67 | ||
68 | /* | 68 | /* |
69 | * The following comes directly from Vojtech Pavlik's ide/pci/via82cxxx | 69 | * The following comes directly from Vojtech Pavlik's ide/pci/via82cxxx |
@@ -296,7 +296,7 @@ static void via_do_set_mode(struct ata_port *ap, struct ata_device *adev, int mo | |||
296 | } | 296 | } |
297 | 297 | ||
298 | /* Set UDMA unless device is not UDMA capable */ | 298 | /* Set UDMA unless device is not UDMA capable */ |
299 | if (udma_type) { | 299 | if (udma_type && t.udma) { |
300 | u8 cable80_status; | 300 | u8 cable80_status; |
301 | 301 | ||
302 | /* Get 80-wire cable detection bit */ | 302 | /* Get 80-wire cable detection bit */ |
diff --git a/drivers/ata/sata_mv.c b/drivers/ata/sata_mv.c index a43f64d2775b..fe0105d35bae 100644 --- a/drivers/ata/sata_mv.c +++ b/drivers/ata/sata_mv.c | |||
@@ -164,10 +164,14 @@ enum { | |||
164 | MV_PCI_ERR_ATTRIBUTE = 0x1d48, | 164 | MV_PCI_ERR_ATTRIBUTE = 0x1d48, |
165 | MV_PCI_ERR_COMMAND = 0x1d50, | 165 | MV_PCI_ERR_COMMAND = 0x1d50, |
166 | 166 | ||
167 | PCI_IRQ_CAUSE_OFS = 0x1d58, | 167 | PCI_IRQ_CAUSE_OFS = 0x1d58, |
168 | PCI_IRQ_MASK_OFS = 0x1d5c, | 168 | PCI_IRQ_MASK_OFS = 0x1d5c, |
169 | PCI_UNMASK_ALL_IRQS = 0x7fffff, /* bits 22-0 */ | 169 | PCI_UNMASK_ALL_IRQS = 0x7fffff, /* bits 22-0 */ |
170 | 170 | ||
171 | PCIE_IRQ_CAUSE_OFS = 0x1900, | ||
172 | PCIE_IRQ_MASK_OFS = 0x1910, | ||
173 | PCIE_UNMASK_ALL_IRQS = 0x70a, /* assorted bits */ | ||
174 | |||
171 | HC_MAIN_IRQ_CAUSE_OFS = 0x1d60, | 175 | HC_MAIN_IRQ_CAUSE_OFS = 0x1d60, |
172 | HC_MAIN_IRQ_MASK_OFS = 0x1d64, | 176 | HC_MAIN_IRQ_MASK_OFS = 0x1d64, |
173 | PORT0_ERR = (1 << 0), /* shift by port # */ | 177 | PORT0_ERR = (1 << 0), /* shift by port # */ |
@@ -303,6 +307,7 @@ enum { | |||
303 | MV_HP_GEN_I = (1 << 6), /* Generation I: 50xx */ | 307 | MV_HP_GEN_I = (1 << 6), /* Generation I: 50xx */ |
304 | MV_HP_GEN_II = (1 << 7), /* Generation II: 60xx */ | 308 | MV_HP_GEN_II = (1 << 7), /* Generation II: 60xx */ |
305 | MV_HP_GEN_IIE = (1 << 8), /* Generation IIE: 6042/7042 */ | 309 | MV_HP_GEN_IIE = (1 << 8), /* Generation IIE: 6042/7042 */ |
310 | MV_HP_PCIE = (1 << 9), /* PCIe bus/regs: 7042 */ | ||
306 | 311 | ||
307 | /* Port private flags (pp_flags) */ | 312 | /* Port private flags (pp_flags) */ |
308 | MV_PP_FLAG_EDMA_EN = (1 << 0), /* is EDMA engine enabled? */ | 313 | MV_PP_FLAG_EDMA_EN = (1 << 0), /* is EDMA engine enabled? */ |
@@ -388,7 +393,15 @@ struct mv_port_signal { | |||
388 | u32 pre; | 393 | u32 pre; |
389 | }; | 394 | }; |
390 | 395 | ||
391 | struct mv_host_priv; | 396 | struct mv_host_priv { |
397 | u32 hp_flags; | ||
398 | struct mv_port_signal signal[8]; | ||
399 | const struct mv_hw_ops *ops; | ||
400 | u32 irq_cause_ofs; | ||
401 | u32 irq_mask_ofs; | ||
402 | u32 unmask_all_irqs; | ||
403 | }; | ||
404 | |||
392 | struct mv_hw_ops { | 405 | struct mv_hw_ops { |
393 | void (*phy_errata)(struct mv_host_priv *hpriv, void __iomem *mmio, | 406 | void (*phy_errata)(struct mv_host_priv *hpriv, void __iomem *mmio, |
394 | unsigned int port); | 407 | unsigned int port); |
@@ -401,12 +414,6 @@ struct mv_hw_ops { | |||
401 | void (*reset_bus)(struct pci_dev *pdev, void __iomem *mmio); | 414 | void (*reset_bus)(struct pci_dev *pdev, void __iomem *mmio); |
402 | }; | 415 | }; |
403 | 416 | ||
404 | struct mv_host_priv { | ||
405 | u32 hp_flags; | ||
406 | struct mv_port_signal signal[8]; | ||
407 | const struct mv_hw_ops *ops; | ||
408 | }; | ||
409 | |||
410 | static void mv_irq_clear(struct ata_port *ap); | 417 | static void mv_irq_clear(struct ata_port *ap); |
411 | static int mv_scr_read(struct ata_port *ap, unsigned int sc_reg_in, u32 *val); | 418 | static int mv_scr_read(struct ata_port *ap, unsigned int sc_reg_in, u32 *val); |
412 | static int mv_scr_write(struct ata_port *ap, unsigned int sc_reg_in, u32 val); | 419 | static int mv_scr_write(struct ata_port *ap, unsigned int sc_reg_in, u32 val); |
@@ -631,11 +638,13 @@ static const struct pci_device_id mv_pci_tbl[] = { | |||
631 | /* Adaptec 1430SA */ | 638 | /* Adaptec 1430SA */ |
632 | { PCI_VDEVICE(ADAPTEC2, 0x0243), chip_7042 }, | 639 | { PCI_VDEVICE(ADAPTEC2, 0x0243), chip_7042 }, |
633 | 640 | ||
634 | { PCI_VDEVICE(TTI, 0x2310), chip_7042 }, | 641 | /* Marvell 7042 support */ |
635 | |||
636 | /* add Marvell 7042 support */ | ||
637 | { PCI_VDEVICE(MARVELL, 0x7042), chip_7042 }, | 642 | { PCI_VDEVICE(MARVELL, 0x7042), chip_7042 }, |
638 | 643 | ||
644 | /* Highpoint RocketRAID PCIe series */ | ||
645 | { PCI_VDEVICE(TTI, 0x2300), chip_7042 }, | ||
646 | { PCI_VDEVICE(TTI, 0x2310), chip_7042 }, | ||
647 | |||
639 | { } /* terminate list */ | 648 | { } /* terminate list */ |
640 | }; | 649 | }; |
641 | 650 | ||
@@ -1648,13 +1657,14 @@ static void mv_host_intr(struct ata_host *host, u32 relevant, unsigned int hc) | |||
1648 | 1657 | ||
1649 | static void mv_pci_error(struct ata_host *host, void __iomem *mmio) | 1658 | static void mv_pci_error(struct ata_host *host, void __iomem *mmio) |
1650 | { | 1659 | { |
1660 | struct mv_host_priv *hpriv = host->private_data; | ||
1651 | struct ata_port *ap; | 1661 | struct ata_port *ap; |
1652 | struct ata_queued_cmd *qc; | 1662 | struct ata_queued_cmd *qc; |
1653 | struct ata_eh_info *ehi; | 1663 | struct ata_eh_info *ehi; |
1654 | unsigned int i, err_mask, printed = 0; | 1664 | unsigned int i, err_mask, printed = 0; |
1655 | u32 err_cause; | 1665 | u32 err_cause; |
1656 | 1666 | ||
1657 | err_cause = readl(mmio + PCI_IRQ_CAUSE_OFS); | 1667 | err_cause = readl(mmio + hpriv->irq_cause_ofs); |
1658 | 1668 | ||
1659 | dev_printk(KERN_ERR, host->dev, "PCI ERROR; PCI IRQ cause=0x%08x\n", | 1669 | dev_printk(KERN_ERR, host->dev, "PCI ERROR; PCI IRQ cause=0x%08x\n", |
1660 | err_cause); | 1670 | err_cause); |
@@ -1662,7 +1672,7 @@ static void mv_pci_error(struct ata_host *host, void __iomem *mmio) | |||
1662 | DPRINTK("All regs @ PCI error\n"); | 1672 | DPRINTK("All regs @ PCI error\n"); |
1663 | mv_dump_all_regs(mmio, -1, to_pci_dev(host->dev)); | 1673 | mv_dump_all_regs(mmio, -1, to_pci_dev(host->dev)); |
1664 | 1674 | ||
1665 | writelfl(0, mmio + PCI_IRQ_CAUSE_OFS); | 1675 | writelfl(0, mmio + hpriv->irq_cause_ofs); |
1666 | 1676 | ||
1667 | for (i = 0; i < host->n_ports; i++) { | 1677 | for (i = 0; i < host->n_ports; i++) { |
1668 | ap = host->ports[i]; | 1678 | ap = host->ports[i]; |
@@ -1926,6 +1936,8 @@ static int mv5_reset_hc(struct mv_host_priv *hpriv, void __iomem *mmio, | |||
1926 | #define ZERO(reg) writel(0, mmio + (reg)) | 1936 | #define ZERO(reg) writel(0, mmio + (reg)) |
1927 | static void mv_reset_pci_bus(struct pci_dev *pdev, void __iomem *mmio) | 1937 | static void mv_reset_pci_bus(struct pci_dev *pdev, void __iomem *mmio) |
1928 | { | 1938 | { |
1939 | struct ata_host *host = dev_get_drvdata(&pdev->dev); | ||
1940 | struct mv_host_priv *hpriv = host->private_data; | ||
1929 | u32 tmp; | 1941 | u32 tmp; |
1930 | 1942 | ||
1931 | tmp = readl(mmio + MV_PCI_MODE); | 1943 | tmp = readl(mmio + MV_PCI_MODE); |
@@ -1937,8 +1949,8 @@ static void mv_reset_pci_bus(struct pci_dev *pdev, void __iomem *mmio) | |||
1937 | writel(0x000100ff, mmio + MV_PCI_XBAR_TMOUT); | 1949 | writel(0x000100ff, mmio + MV_PCI_XBAR_TMOUT); |
1938 | ZERO(HC_MAIN_IRQ_MASK_OFS); | 1950 | ZERO(HC_MAIN_IRQ_MASK_OFS); |
1939 | ZERO(MV_PCI_SERR_MASK); | 1951 | ZERO(MV_PCI_SERR_MASK); |
1940 | ZERO(PCI_IRQ_CAUSE_OFS); | 1952 | ZERO(hpriv->irq_cause_ofs); |
1941 | ZERO(PCI_IRQ_MASK_OFS); | 1953 | ZERO(hpriv->irq_mask_ofs); |
1942 | ZERO(MV_PCI_ERR_LOW_ADDRESS); | 1954 | ZERO(MV_PCI_ERR_LOW_ADDRESS); |
1943 | ZERO(MV_PCI_ERR_HIGH_ADDRESS); | 1955 | ZERO(MV_PCI_ERR_HIGH_ADDRESS); |
1944 | ZERO(MV_PCI_ERR_ATTRIBUTE); | 1956 | ZERO(MV_PCI_ERR_ATTRIBUTE); |
@@ -2170,7 +2182,7 @@ static void mv_phy_reset(struct ata_port *ap, unsigned int *class, | |||
2170 | mv_scr_read(ap, SCR_ERROR, &serror); | 2182 | mv_scr_read(ap, SCR_ERROR, &serror); |
2171 | mv_scr_read(ap, SCR_CONTROL, &scontrol); | 2183 | mv_scr_read(ap, SCR_CONTROL, &scontrol); |
2172 | DPRINTK("S-regs after ATA_RST: SStat 0x%08x SErr 0x%08x " | 2184 | DPRINTK("S-regs after ATA_RST: SStat 0x%08x SErr 0x%08x " |
2173 | "SCtrl 0x%08x\n", status, serror, scontrol); | 2185 | "SCtrl 0x%08x\n", sstatus, serror, scontrol); |
2174 | } | 2186 | } |
2175 | #endif | 2187 | #endif |
2176 | 2188 | ||
@@ -2490,6 +2502,16 @@ static int mv_chip_id(struct ata_host *host, unsigned int board_idx) | |||
2490 | break; | 2502 | break; |
2491 | 2503 | ||
2492 | case chip_7042: | 2504 | case chip_7042: |
2505 | hp_flags |= MV_HP_PCIE; | ||
2506 | if (pdev->vendor == PCI_VENDOR_ID_TTI && | ||
2507 | (pdev->device == 0x2300 || pdev->device == 0x2310)) | ||
2508 | { | ||
2509 | printk(KERN_WARNING "sata_mv: Highpoint RocketRAID BIOS" | ||
2510 | " will CORRUPT DATA on attached drives when" | ||
2511 | " configured as \"Legacy\". BEWARE!\n"); | ||
2512 | printk(KERN_WARNING "sata_mv: Use BIOS \"JBOD\" volumes" | ||
2513 | " instead for safety.\n"); | ||
2514 | } | ||
2493 | case chip_6042: | 2515 | case chip_6042: |
2494 | hpriv->ops = &mv6xxx_ops; | 2516 | hpriv->ops = &mv6xxx_ops; |
2495 | hp_flags |= MV_HP_GEN_IIE; | 2517 | hp_flags |= MV_HP_GEN_IIE; |
@@ -2516,6 +2538,15 @@ static int mv_chip_id(struct ata_host *host, unsigned int board_idx) | |||
2516 | } | 2538 | } |
2517 | 2539 | ||
2518 | hpriv->hp_flags = hp_flags; | 2540 | hpriv->hp_flags = hp_flags; |
2541 | if (hp_flags & MV_HP_PCIE) { | ||
2542 | hpriv->irq_cause_ofs = PCIE_IRQ_CAUSE_OFS; | ||
2543 | hpriv->irq_mask_ofs = PCIE_IRQ_MASK_OFS; | ||
2544 | hpriv->unmask_all_irqs = PCIE_UNMASK_ALL_IRQS; | ||
2545 | } else { | ||
2546 | hpriv->irq_cause_ofs = PCI_IRQ_CAUSE_OFS; | ||
2547 | hpriv->irq_mask_ofs = PCI_IRQ_MASK_OFS; | ||
2548 | hpriv->unmask_all_irqs = PCI_UNMASK_ALL_IRQS; | ||
2549 | } | ||
2519 | 2550 | ||
2520 | return 0; | 2551 | return 0; |
2521 | } | 2552 | } |
@@ -2595,10 +2626,10 @@ static int mv_init_host(struct ata_host *host, unsigned int board_idx) | |||
2595 | } | 2626 | } |
2596 | 2627 | ||
2597 | /* Clear any currently outstanding host interrupt conditions */ | 2628 | /* Clear any currently outstanding host interrupt conditions */ |
2598 | writelfl(0, mmio + PCI_IRQ_CAUSE_OFS); | 2629 | writelfl(0, mmio + hpriv->irq_cause_ofs); |
2599 | 2630 | ||
2600 | /* and unmask interrupt generation for host regs */ | 2631 | /* and unmask interrupt generation for host regs */ |
2601 | writelfl(PCI_UNMASK_ALL_IRQS, mmio + PCI_IRQ_MASK_OFS); | 2632 | writelfl(hpriv->unmask_all_irqs, mmio + hpriv->irq_mask_ofs); |
2602 | 2633 | ||
2603 | if (IS_GEN_I(hpriv)) | 2634 | if (IS_GEN_I(hpriv)) |
2604 | writelfl(~HC_MAIN_MASKED_IRQS_5, mmio + HC_MAIN_IRQ_MASK_OFS); | 2635 | writelfl(~HC_MAIN_MASKED_IRQS_5, mmio + HC_MAIN_IRQ_MASK_OFS); |
@@ -2609,8 +2640,8 @@ static int mv_init_host(struct ata_host *host, unsigned int board_idx) | |||
2609 | "PCI int cause/mask=0x%08x/0x%08x\n", | 2640 | "PCI int cause/mask=0x%08x/0x%08x\n", |
2610 | readl(mmio + HC_MAIN_IRQ_CAUSE_OFS), | 2641 | readl(mmio + HC_MAIN_IRQ_CAUSE_OFS), |
2611 | readl(mmio + HC_MAIN_IRQ_MASK_OFS), | 2642 | readl(mmio + HC_MAIN_IRQ_MASK_OFS), |
2612 | readl(mmio + PCI_IRQ_CAUSE_OFS), | 2643 | readl(mmio + hpriv->irq_cause_ofs), |
2613 | readl(mmio + PCI_IRQ_MASK_OFS)); | 2644 | readl(mmio + hpriv->irq_mask_ofs)); |
2614 | 2645 | ||
2615 | done: | 2646 | done: |
2616 | return rc; | 2647 | return rc; |
diff --git a/drivers/ata/sata_nv.c b/drivers/ata/sata_nv.c index 44f9e5d9e362..ed5dc7cb50cd 100644 --- a/drivers/ata/sata_nv.c +++ b/drivers/ata/sata_nv.c | |||
@@ -791,11 +791,13 @@ static int nv_adma_check_atapi_dma(struct ata_queued_cmd *qc) | |||
791 | 791 | ||
792 | static void nv_adma_tf_read(struct ata_port *ap, struct ata_taskfile *tf) | 792 | static void nv_adma_tf_read(struct ata_port *ap, struct ata_taskfile *tf) |
793 | { | 793 | { |
794 | /* Since commands where a result TF is requested are not | 794 | /* Other than when internal or pass-through commands are executed, |
795 | executed in ADMA mode, the only time this function will be called | 795 | the only time this function will be called in ADMA mode will be |
796 | in ADMA mode will be if a command fails. In this case we | 796 | if a command fails. In the failure case we don't care about going |
797 | don't care about going into register mode with ADMA commands | 797 | into register mode with ADMA commands pending, as the commands will |
798 | pending, as the commands will all shortly be aborted anyway. */ | 798 | all shortly be aborted anyway. We assume that NCQ commands are not |
799 | issued via passthrough, which is the only way that switching into | ||
800 | ADMA mode could abort outstanding commands. */ | ||
799 | nv_adma_register_mode(ap); | 801 | nv_adma_register_mode(ap); |
800 | 802 | ||
801 | ata_tf_read(ap, tf); | 803 | ata_tf_read(ap, tf); |
@@ -1359,11 +1361,9 @@ static int nv_adma_use_reg_mode(struct ata_queued_cmd *qc) | |||
1359 | struct nv_adma_port_priv *pp = qc->ap->private_data; | 1361 | struct nv_adma_port_priv *pp = qc->ap->private_data; |
1360 | 1362 | ||
1361 | /* ADMA engine can only be used for non-ATAPI DMA commands, | 1363 | /* ADMA engine can only be used for non-ATAPI DMA commands, |
1362 | or interrupt-driven no-data commands, where a result taskfile | 1364 | or interrupt-driven no-data commands. */ |
1363 | is not required. */ | ||
1364 | if ((pp->flags & NV_ADMA_ATAPI_SETUP_COMPLETE) || | 1365 | if ((pp->flags & NV_ADMA_ATAPI_SETUP_COMPLETE) || |
1365 | (qc->tf.flags & ATA_TFLAG_POLLING) || | 1366 | (qc->tf.flags & ATA_TFLAG_POLLING)) |
1366 | (qc->flags & ATA_QCFLAG_RESULT_TF)) | ||
1367 | return 1; | 1367 | return 1; |
1368 | 1368 | ||
1369 | if ((qc->flags & ATA_QCFLAG_DMAMAP) || | 1369 | if ((qc->flags & ATA_QCFLAG_DMAMAP) || |
@@ -1381,6 +1381,8 @@ static void nv_adma_qc_prep(struct ata_queued_cmd *qc) | |||
1381 | NV_CPB_CTL_IEN; | 1381 | NV_CPB_CTL_IEN; |
1382 | 1382 | ||
1383 | if (nv_adma_use_reg_mode(qc)) { | 1383 | if (nv_adma_use_reg_mode(qc)) { |
1384 | BUG_ON(!(pp->flags & NV_ADMA_ATAPI_SETUP_COMPLETE) && | ||
1385 | (qc->flags & ATA_QCFLAG_DMAMAP)); | ||
1384 | nv_adma_register_mode(qc->ap); | 1386 | nv_adma_register_mode(qc->ap); |
1385 | ata_qc_prep(qc); | 1387 | ata_qc_prep(qc); |
1386 | return; | 1388 | return; |
@@ -1425,9 +1427,21 @@ static unsigned int nv_adma_qc_issue(struct ata_queued_cmd *qc) | |||
1425 | 1427 | ||
1426 | VPRINTK("ENTER\n"); | 1428 | VPRINTK("ENTER\n"); |
1427 | 1429 | ||
1430 | /* We can't handle result taskfile with NCQ commands, since | ||
1431 | retrieving the taskfile switches us out of ADMA mode and would abort | ||
1432 | existing commands. */ | ||
1433 | if (unlikely(qc->tf.protocol == ATA_PROT_NCQ && | ||
1434 | (qc->flags & ATA_QCFLAG_RESULT_TF))) { | ||
1435 | ata_dev_printk(qc->dev, KERN_ERR, | ||
1436 | "NCQ w/ RESULT_TF not allowed\n"); | ||
1437 | return AC_ERR_SYSTEM; | ||
1438 | } | ||
1439 | |||
1428 | if (nv_adma_use_reg_mode(qc)) { | 1440 | if (nv_adma_use_reg_mode(qc)) { |
1429 | /* use ATA register mode */ | 1441 | /* use ATA register mode */ |
1430 | VPRINTK("using ATA register mode: 0x%lx\n", qc->flags); | 1442 | VPRINTK("using ATA register mode: 0x%lx\n", qc->flags); |
1443 | BUG_ON(!(pp->flags & NV_ADMA_ATAPI_SETUP_COMPLETE) && | ||
1444 | (qc->flags & ATA_QCFLAG_DMAMAP)); | ||
1431 | nv_adma_register_mode(qc->ap); | 1445 | nv_adma_register_mode(qc->ap); |
1432 | return ata_qc_issue_prot(qc); | 1446 | return ata_qc_issue_prot(qc); |
1433 | } else | 1447 | } else |
diff --git a/drivers/char/apm-emulation.c b/drivers/char/apm-emulation.c index c99e43b837f5..17d54315e146 100644 --- a/drivers/char/apm-emulation.c +++ b/drivers/char/apm-emulation.c | |||
@@ -295,7 +295,6 @@ static int | |||
295 | apm_ioctl(struct inode * inode, struct file *filp, u_int cmd, u_long arg) | 295 | apm_ioctl(struct inode * inode, struct file *filp, u_int cmd, u_long arg) |
296 | { | 296 | { |
297 | struct apm_user *as = filp->private_data; | 297 | struct apm_user *as = filp->private_data; |
298 | unsigned long flags; | ||
299 | int err = -EINVAL; | 298 | int err = -EINVAL; |
300 | 299 | ||
301 | if (!as->suser || !as->writer) | 300 | if (!as->suser || !as->writer) |
@@ -331,10 +330,16 @@ apm_ioctl(struct inode * inode, struct file *filp, u_int cmd, u_long arg) | |||
331 | * Wait for the suspend/resume to complete. If there | 330 | * Wait for the suspend/resume to complete. If there |
332 | * are pending acknowledges, we wait here for them. | 331 | * are pending acknowledges, we wait here for them. |
333 | */ | 332 | */ |
334 | flags = current->flags; | 333 | freezer_do_not_count(); |
335 | 334 | ||
336 | wait_event(apm_suspend_waitqueue, | 335 | wait_event(apm_suspend_waitqueue, |
337 | as->suspend_state == SUSPEND_DONE); | 336 | as->suspend_state == SUSPEND_DONE); |
337 | |||
338 | /* | ||
339 | * Since we are waiting until the suspend is done, the | ||
340 | * try_to_freeze() in freezer_count() will not trigger | ||
341 | */ | ||
342 | freezer_count(); | ||
338 | } else { | 343 | } else { |
339 | as->suspend_state = SUSPEND_WAIT; | 344 | as->suspend_state = SUSPEND_WAIT; |
340 | mutex_unlock(&state_lock); | 345 | mutex_unlock(&state_lock); |
@@ -362,14 +367,10 @@ apm_ioctl(struct inode * inode, struct file *filp, u_int cmd, u_long arg) | |||
362 | * Wait for the suspend/resume to complete. If there | 367 | * Wait for the suspend/resume to complete. If there |
363 | * are pending acknowledges, we wait here for them. | 368 | * are pending acknowledges, we wait here for them. |
364 | */ | 369 | */ |
365 | flags = current->flags; | 370 | wait_event_freezable(apm_suspend_waitqueue, |
366 | |||
367 | wait_event_interruptible(apm_suspend_waitqueue, | ||
368 | as->suspend_state == SUSPEND_DONE); | 371 | as->suspend_state == SUSPEND_DONE); |
369 | } | 372 | } |
370 | 373 | ||
371 | current->flags = flags; | ||
372 | |||
373 | mutex_lock(&state_lock); | 374 | mutex_lock(&state_lock); |
374 | err = as->suspend_result; | 375 | err = as->suspend_result; |
375 | as->suspend_state = SUSPEND_NONE; | 376 | as->suspend_state = SUSPEND_NONE; |
diff --git a/drivers/char/cs5535_gpio.c b/drivers/char/cs5535_gpio.c index fe6d2407baed..c2d23cae9515 100644 --- a/drivers/char/cs5535_gpio.c +++ b/drivers/char/cs5535_gpio.c | |||
@@ -104,6 +104,11 @@ static ssize_t cs5535_gpio_write(struct file *file, const char __user *data, | |||
104 | for (j = 0; j < ARRAY_SIZE(rm); j++) { | 104 | for (j = 0; j < ARRAY_SIZE(rm); j++) { |
105 | if (c == rm[j].on) { | 105 | if (c == rm[j].on) { |
106 | outl(m1, base + rm[j].wr_offset); | 106 | outl(m1, base + rm[j].wr_offset); |
107 | /* If enabling output, turn off AUX 1 and AUX 2 */ | ||
108 | if (c == 'O') { | ||
109 | outl(m0, base + 0x10); | ||
110 | outl(m0, base + 0x14); | ||
111 | } | ||
107 | break; | 112 | break; |
108 | } else if (c == rm[j].off) { | 113 | } else if (c == rm[j].off) { |
109 | outl(m0, base + rm[j].wr_offset); | 114 | outl(m0, base + rm[j].wr_offset); |
diff --git a/drivers/crypto/Kconfig b/drivers/crypto/Kconfig index 5fd6688a444a..ddd3a259cea1 100644 --- a/drivers/crypto/Kconfig +++ b/drivers/crypto/Kconfig | |||
@@ -12,7 +12,7 @@ if CRYPTO_HW | |||
12 | 12 | ||
13 | config CRYPTO_DEV_PADLOCK | 13 | config CRYPTO_DEV_PADLOCK |
14 | tristate "Support for VIA PadLock ACE" | 14 | tristate "Support for VIA PadLock ACE" |
15 | depends on X86_32 | 15 | depends on X86_32 && !UML |
16 | select CRYPTO_ALGAPI | 16 | select CRYPTO_ALGAPI |
17 | help | 17 | help |
18 | Some VIA processors come with an integrated crypto engine | 18 | Some VIA processors come with an integrated crypto engine |
diff --git a/drivers/hwmon/coretemp.c b/drivers/hwmon/coretemp.c index 5c82ec7f8bbd..3ee60d26e3a2 100644 --- a/drivers/hwmon/coretemp.c +++ b/drivers/hwmon/coretemp.c | |||
@@ -337,11 +337,10 @@ static int coretemp_cpu_callback(struct notifier_block *nfb, | |||
337 | 337 | ||
338 | switch (action) { | 338 | switch (action) { |
339 | case CPU_ONLINE: | 339 | case CPU_ONLINE: |
340 | case CPU_ONLINE_FROZEN: | 340 | case CPU_DOWN_FAILED: |
341 | coretemp_device_add(cpu); | 341 | coretemp_device_add(cpu); |
342 | break; | 342 | break; |
343 | case CPU_DEAD: | 343 | case CPU_DOWN_PREPARE: |
344 | case CPU_DEAD_FROZEN: | ||
345 | coretemp_device_remove(cpu); | 344 | coretemp_device_remove(cpu); |
346 | break; | 345 | break; |
347 | } | 346 | } |
diff --git a/drivers/input/touchscreen/ads7846.c b/drivers/input/touchscreen/ads7846.c index f59aecf5ec15..fd9c5d51870a 100644 --- a/drivers/input/touchscreen/ads7846.c +++ b/drivers/input/touchscreen/ads7846.c | |||
@@ -267,13 +267,12 @@ static int ads7846_read12_ser(struct device *dev, unsigned command) | |||
267 | ts->irq_disabled = 0; | 267 | ts->irq_disabled = 0; |
268 | enable_irq(spi->irq); | 268 | enable_irq(spi->irq); |
269 | 269 | ||
270 | if (req->msg.status) | 270 | if (status == 0) { |
271 | status = req->msg.status; | 271 | /* on-wire is a must-ignore bit, a BE12 value, then padding */ |
272 | 272 | sample = be16_to_cpu(req->sample); | |
273 | /* on-wire is a must-ignore bit, a BE12 value, then padding */ | 273 | sample = sample >> 3; |
274 | sample = be16_to_cpu(req->sample); | 274 | sample &= 0x0fff; |
275 | sample = sample >> 3; | 275 | } |
276 | sample &= 0x0fff; | ||
277 | 276 | ||
278 | kfree(req); | 277 | kfree(req); |
279 | return status ? status : sample; | 278 | return status ? status : sample; |
diff --git a/drivers/isdn/i4l/isdn_common.c b/drivers/isdn/i4l/isdn_common.c index c6df2925ebd0..d6952959d72a 100644 --- a/drivers/isdn/i4l/isdn_common.c +++ b/drivers/isdn/i4l/isdn_common.c | |||
@@ -1515,6 +1515,7 @@ isdn_ioctl(struct inode *inode, struct file *file, uint cmd, ulong arg) | |||
1515 | if (copy_from_user(&iocts, argp, | 1515 | if (copy_from_user(&iocts, argp, |
1516 | sizeof(isdn_ioctl_struct))) | 1516 | sizeof(isdn_ioctl_struct))) |
1517 | return -EFAULT; | 1517 | return -EFAULT; |
1518 | iocts.drvid[sizeof(iocts.drvid)-1] = 0; | ||
1518 | if (strlen(iocts.drvid)) { | 1519 | if (strlen(iocts.drvid)) { |
1519 | if ((p = strchr(iocts.drvid, ','))) | 1520 | if ((p = strchr(iocts.drvid, ','))) |
1520 | *p = 0; | 1521 | *p = 0; |
@@ -1599,6 +1600,7 @@ isdn_ioctl(struct inode *inode, struct file *file, uint cmd, ulong arg) | |||
1599 | if (copy_from_user(&iocts, argp, | 1600 | if (copy_from_user(&iocts, argp, |
1600 | sizeof(isdn_ioctl_struct))) | 1601 | sizeof(isdn_ioctl_struct))) |
1601 | return -EFAULT; | 1602 | return -EFAULT; |
1603 | iocts.drvid[sizeof(iocts.drvid)-1] = 0; | ||
1602 | if (strlen(iocts.drvid)) { | 1604 | if (strlen(iocts.drvid)) { |
1603 | drvidx = -1; | 1605 | drvidx = -1; |
1604 | for (i = 0; i < ISDN_MAX_DRIVERS; i++) | 1606 | for (i = 0; i < ISDN_MAX_DRIVERS; i++) |
@@ -1643,7 +1645,7 @@ isdn_ioctl(struct inode *inode, struct file *file, uint cmd, ulong arg) | |||
1643 | } else { | 1645 | } else { |
1644 | p = (char __user *) iocts.arg; | 1646 | p = (char __user *) iocts.arg; |
1645 | for (i = 0; i < 10; i++) { | 1647 | for (i = 0; i < 10; i++) { |
1646 | sprintf(bname, "%s%s", | 1648 | snprintf(bname, sizeof(bname), "%s%s", |
1647 | strlen(dev->drv[drvidx]->msn2eaz[i]) ? | 1649 | strlen(dev->drv[drvidx]->msn2eaz[i]) ? |
1648 | dev->drv[drvidx]->msn2eaz[i] : "_", | 1650 | dev->drv[drvidx]->msn2eaz[i] : "_", |
1649 | (i < 9) ? "," : "\0"); | 1651 | (i < 9) ? "," : "\0"); |
@@ -1673,6 +1675,7 @@ isdn_ioctl(struct inode *inode, struct file *file, uint cmd, ulong arg) | |||
1673 | char *p; | 1675 | char *p; |
1674 | if (copy_from_user(&iocts, argp, sizeof(isdn_ioctl_struct))) | 1676 | if (copy_from_user(&iocts, argp, sizeof(isdn_ioctl_struct))) |
1675 | return -EFAULT; | 1677 | return -EFAULT; |
1678 | iocts.drvid[sizeof(iocts.drvid)-1] = 0; | ||
1676 | if (strlen(iocts.drvid)) { | 1679 | if (strlen(iocts.drvid)) { |
1677 | if ((p = strchr(iocts.drvid, ','))) | 1680 | if ((p = strchr(iocts.drvid, ','))) |
1678 | *p = 0; | 1681 | *p = 0; |
diff --git a/drivers/leds/led-class.c b/drivers/leds/led-class.c index 4211293ce862..ba8b04b03b9f 100644 --- a/drivers/leds/led-class.c +++ b/drivers/leds/led-class.c | |||
@@ -111,7 +111,7 @@ int led_classdev_register(struct device *parent, struct led_classdev *led_cdev) | |||
111 | write_unlock(&leds_list_lock); | 111 | write_unlock(&leds_list_lock); |
112 | 112 | ||
113 | #ifdef CONFIG_LEDS_TRIGGERS | 113 | #ifdef CONFIG_LEDS_TRIGGERS |
114 | rwlock_init(&led_cdev->trigger_lock); | 114 | init_rwsem(&led_cdev->trigger_lock); |
115 | 115 | ||
116 | rc = device_create_file(led_cdev->dev, &dev_attr_trigger); | 116 | rc = device_create_file(led_cdev->dev, &dev_attr_trigger); |
117 | if (rc) | 117 | if (rc) |
@@ -147,10 +147,10 @@ void led_classdev_unregister(struct led_classdev *led_cdev) | |||
147 | device_remove_file(led_cdev->dev, &dev_attr_brightness); | 147 | device_remove_file(led_cdev->dev, &dev_attr_brightness); |
148 | #ifdef CONFIG_LEDS_TRIGGERS | 148 | #ifdef CONFIG_LEDS_TRIGGERS |
149 | device_remove_file(led_cdev->dev, &dev_attr_trigger); | 149 | device_remove_file(led_cdev->dev, &dev_attr_trigger); |
150 | write_lock(&led_cdev->trigger_lock); | 150 | down_write(&led_cdev->trigger_lock); |
151 | if (led_cdev->trigger) | 151 | if (led_cdev->trigger) |
152 | led_trigger_set(led_cdev, NULL); | 152 | led_trigger_set(led_cdev, NULL); |
153 | write_unlock(&led_cdev->trigger_lock); | 153 | up_write(&led_cdev->trigger_lock); |
154 | #endif | 154 | #endif |
155 | 155 | ||
156 | device_unregister(led_cdev->dev); | 156 | device_unregister(led_cdev->dev); |
diff --git a/drivers/leds/led-triggers.c b/drivers/leds/led-triggers.c index 575368c2b100..0bdb786210b1 100644 --- a/drivers/leds/led-triggers.c +++ b/drivers/leds/led-triggers.c | |||
@@ -19,13 +19,14 @@ | |||
19 | #include <linux/device.h> | 19 | #include <linux/device.h> |
20 | #include <linux/sysdev.h> | 20 | #include <linux/sysdev.h> |
21 | #include <linux/timer.h> | 21 | #include <linux/timer.h> |
22 | #include <linux/rwsem.h> | ||
22 | #include <linux/leds.h> | 23 | #include <linux/leds.h> |
23 | #include "leds.h" | 24 | #include "leds.h" |
24 | 25 | ||
25 | /* | 26 | /* |
26 | * Nests outside led_cdev->trigger_lock | 27 | * Nests outside led_cdev->trigger_lock |
27 | */ | 28 | */ |
28 | static DEFINE_RWLOCK(triggers_list_lock); | 29 | static DECLARE_RWSEM(triggers_list_lock); |
29 | static LIST_HEAD(trigger_list); | 30 | static LIST_HEAD(trigger_list); |
30 | 31 | ||
31 | ssize_t led_trigger_store(struct device *dev, struct device_attribute *attr, | 32 | ssize_t led_trigger_store(struct device *dev, struct device_attribute *attr, |
@@ -44,24 +45,24 @@ ssize_t led_trigger_store(struct device *dev, struct device_attribute *attr, | |||
44 | trigger_name[len - 1] = '\0'; | 45 | trigger_name[len - 1] = '\0'; |
45 | 46 | ||
46 | if (!strcmp(trigger_name, "none")) { | 47 | if (!strcmp(trigger_name, "none")) { |
47 | write_lock(&led_cdev->trigger_lock); | 48 | down_write(&led_cdev->trigger_lock); |
48 | led_trigger_set(led_cdev, NULL); | 49 | led_trigger_set(led_cdev, NULL); |
49 | write_unlock(&led_cdev->trigger_lock); | 50 | up_write(&led_cdev->trigger_lock); |
50 | return count; | 51 | return count; |
51 | } | 52 | } |
52 | 53 | ||
53 | read_lock(&triggers_list_lock); | 54 | down_read(&triggers_list_lock); |
54 | list_for_each_entry(trig, &trigger_list, next_trig) { | 55 | list_for_each_entry(trig, &trigger_list, next_trig) { |
55 | if (!strcmp(trigger_name, trig->name)) { | 56 | if (!strcmp(trigger_name, trig->name)) { |
56 | write_lock(&led_cdev->trigger_lock); | 57 | down_write(&led_cdev->trigger_lock); |
57 | led_trigger_set(led_cdev, trig); | 58 | led_trigger_set(led_cdev, trig); |
58 | write_unlock(&led_cdev->trigger_lock); | 59 | up_write(&led_cdev->trigger_lock); |
59 | 60 | ||
60 | read_unlock(&triggers_list_lock); | 61 | up_read(&triggers_list_lock); |
61 | return count; | 62 | return count; |
62 | } | 63 | } |
63 | } | 64 | } |
64 | read_unlock(&triggers_list_lock); | 65 | up_read(&triggers_list_lock); |
65 | 66 | ||
66 | return -EINVAL; | 67 | return -EINVAL; |
67 | } | 68 | } |
@@ -74,8 +75,8 @@ ssize_t led_trigger_show(struct device *dev, struct device_attribute *attr, | |||
74 | struct led_trigger *trig; | 75 | struct led_trigger *trig; |
75 | int len = 0; | 76 | int len = 0; |
76 | 77 | ||
77 | read_lock(&triggers_list_lock); | 78 | down_read(&triggers_list_lock); |
78 | read_lock(&led_cdev->trigger_lock); | 79 | down_read(&led_cdev->trigger_lock); |
79 | 80 | ||
80 | if (!led_cdev->trigger) | 81 | if (!led_cdev->trigger) |
81 | len += sprintf(buf+len, "[none] "); | 82 | len += sprintf(buf+len, "[none] "); |
@@ -89,8 +90,8 @@ ssize_t led_trigger_show(struct device *dev, struct device_attribute *attr, | |||
89 | else | 90 | else |
90 | len += sprintf(buf+len, "%s ", trig->name); | 91 | len += sprintf(buf+len, "%s ", trig->name); |
91 | } | 92 | } |
92 | read_unlock(&led_cdev->trigger_lock); | 93 | up_read(&led_cdev->trigger_lock); |
93 | read_unlock(&triggers_list_lock); | 94 | up_read(&triggers_list_lock); |
94 | 95 | ||
95 | len += sprintf(len+buf, "\n"); | 96 | len += sprintf(len+buf, "\n"); |
96 | return len; | 97 | return len; |
@@ -145,14 +146,14 @@ void led_trigger_set_default(struct led_classdev *led_cdev) | |||
145 | if (!led_cdev->default_trigger) | 146 | if (!led_cdev->default_trigger) |
146 | return; | 147 | return; |
147 | 148 | ||
148 | read_lock(&triggers_list_lock); | 149 | down_read(&triggers_list_lock); |
149 | write_lock(&led_cdev->trigger_lock); | 150 | down_write(&led_cdev->trigger_lock); |
150 | list_for_each_entry(trig, &trigger_list, next_trig) { | 151 | list_for_each_entry(trig, &trigger_list, next_trig) { |
151 | if (!strcmp(led_cdev->default_trigger, trig->name)) | 152 | if (!strcmp(led_cdev->default_trigger, trig->name)) |
152 | led_trigger_set(led_cdev, trig); | 153 | led_trigger_set(led_cdev, trig); |
153 | } | 154 | } |
154 | write_unlock(&led_cdev->trigger_lock); | 155 | up_write(&led_cdev->trigger_lock); |
155 | read_unlock(&triggers_list_lock); | 156 | up_read(&triggers_list_lock); |
156 | } | 157 | } |
157 | 158 | ||
158 | int led_trigger_register(struct led_trigger *trigger) | 159 | int led_trigger_register(struct led_trigger *trigger) |
@@ -163,18 +164,18 @@ int led_trigger_register(struct led_trigger *trigger) | |||
163 | INIT_LIST_HEAD(&trigger->led_cdevs); | 164 | INIT_LIST_HEAD(&trigger->led_cdevs); |
164 | 165 | ||
165 | /* Add to the list of led triggers */ | 166 | /* Add to the list of led triggers */ |
166 | write_lock(&triggers_list_lock); | 167 | down_write(&triggers_list_lock); |
167 | list_add_tail(&trigger->next_trig, &trigger_list); | 168 | list_add_tail(&trigger->next_trig, &trigger_list); |
168 | write_unlock(&triggers_list_lock); | 169 | up_write(&triggers_list_lock); |
169 | 170 | ||
170 | /* Register with any LEDs that have this as a default trigger */ | 171 | /* Register with any LEDs that have this as a default trigger */ |
171 | read_lock(&leds_list_lock); | 172 | read_lock(&leds_list_lock); |
172 | list_for_each_entry(led_cdev, &leds_list, node) { | 173 | list_for_each_entry(led_cdev, &leds_list, node) { |
173 | write_lock(&led_cdev->trigger_lock); | 174 | down_write(&led_cdev->trigger_lock); |
174 | if (!led_cdev->trigger && led_cdev->default_trigger && | 175 | if (!led_cdev->trigger && led_cdev->default_trigger && |
175 | !strcmp(led_cdev->default_trigger, trigger->name)) | 176 | !strcmp(led_cdev->default_trigger, trigger->name)) |
176 | led_trigger_set(led_cdev, trigger); | 177 | led_trigger_set(led_cdev, trigger); |
177 | write_unlock(&led_cdev->trigger_lock); | 178 | up_write(&led_cdev->trigger_lock); |
178 | } | 179 | } |
179 | read_unlock(&leds_list_lock); | 180 | read_unlock(&leds_list_lock); |
180 | 181 | ||
@@ -206,17 +207,17 @@ void led_trigger_unregister(struct led_trigger *trigger) | |||
206 | struct led_classdev *led_cdev; | 207 | struct led_classdev *led_cdev; |
207 | 208 | ||
208 | /* Remove from the list of led triggers */ | 209 | /* Remove from the list of led triggers */ |
209 | write_lock(&triggers_list_lock); | 210 | down_write(&triggers_list_lock); |
210 | list_del(&trigger->next_trig); | 211 | list_del(&trigger->next_trig); |
211 | write_unlock(&triggers_list_lock); | 212 | up_write(&triggers_list_lock); |
212 | 213 | ||
213 | /* Remove anyone actively using this trigger */ | 214 | /* Remove anyone actively using this trigger */ |
214 | read_lock(&leds_list_lock); | 215 | read_lock(&leds_list_lock); |
215 | list_for_each_entry(led_cdev, &leds_list, node) { | 216 | list_for_each_entry(led_cdev, &leds_list, node) { |
216 | write_lock(&led_cdev->trigger_lock); | 217 | down_write(&led_cdev->trigger_lock); |
217 | if (led_cdev->trigger == trigger) | 218 | if (led_cdev->trigger == trigger) |
218 | led_trigger_set(led_cdev, NULL); | 219 | led_trigger_set(led_cdev, NULL); |
219 | write_unlock(&led_cdev->trigger_lock); | 220 | up_write(&led_cdev->trigger_lock); |
220 | } | 221 | } |
221 | read_unlock(&leds_list_lock); | 222 | read_unlock(&leds_list_lock); |
222 | } | 223 | } |
diff --git a/drivers/mmc/host/mmc_spi.c b/drivers/mmc/host/mmc_spi.c index a6469218f194..365024b83d3d 100644 --- a/drivers/mmc/host/mmc_spi.c +++ b/drivers/mmc/host/mmc_spi.c | |||
@@ -176,8 +176,6 @@ mmc_spi_readbytes(struct mmc_spi_host *host, unsigned len) | |||
176 | DMA_FROM_DEVICE); | 176 | DMA_FROM_DEVICE); |
177 | 177 | ||
178 | status = spi_sync(host->spi, &host->readback); | 178 | status = spi_sync(host->spi, &host->readback); |
179 | if (status == 0) | ||
180 | status = host->readback.status; | ||
181 | 179 | ||
182 | if (host->dma_dev) | 180 | if (host->dma_dev) |
183 | dma_sync_single_for_cpu(host->dma_dev, | 181 | dma_sync_single_for_cpu(host->dma_dev, |
@@ -480,8 +478,6 @@ mmc_spi_command_send(struct mmc_spi_host *host, | |||
480 | DMA_BIDIRECTIONAL); | 478 | DMA_BIDIRECTIONAL); |
481 | } | 479 | } |
482 | status = spi_sync(host->spi, &host->m); | 480 | status = spi_sync(host->spi, &host->m); |
483 | if (status == 0) | ||
484 | status = host->m.status; | ||
485 | 481 | ||
486 | if (host->dma_dev) | 482 | if (host->dma_dev) |
487 | dma_sync_single_for_cpu(host->dma_dev, | 483 | dma_sync_single_for_cpu(host->dma_dev, |
@@ -624,8 +620,6 @@ mmc_spi_writeblock(struct mmc_spi_host *host, struct spi_transfer *t) | |||
624 | DMA_BIDIRECTIONAL); | 620 | DMA_BIDIRECTIONAL); |
625 | 621 | ||
626 | status = spi_sync(spi, &host->m); | 622 | status = spi_sync(spi, &host->m); |
627 | if (status == 0) | ||
628 | status = host->m.status; | ||
629 | 623 | ||
630 | if (status != 0) { | 624 | if (status != 0) { |
631 | dev_dbg(&spi->dev, "write error (%d)\n", status); | 625 | dev_dbg(&spi->dev, "write error (%d)\n", status); |
@@ -726,8 +720,6 @@ mmc_spi_readblock(struct mmc_spi_host *host, struct spi_transfer *t) | |||
726 | } | 720 | } |
727 | 721 | ||
728 | status = spi_sync(spi, &host->m); | 722 | status = spi_sync(spi, &host->m); |
729 | if (status == 0) | ||
730 | status = host->m.status; | ||
731 | 723 | ||
732 | if (host->dma_dev) { | 724 | if (host->dma_dev) { |
733 | dma_sync_single_for_cpu(host->dma_dev, | 725 | dma_sync_single_for_cpu(host->dma_dev, |
@@ -905,8 +897,6 @@ mmc_spi_data_do(struct mmc_spi_host *host, struct mmc_command *cmd, | |||
905 | DMA_BIDIRECTIONAL); | 897 | DMA_BIDIRECTIONAL); |
906 | 898 | ||
907 | tmp = spi_sync(spi, &host->m); | 899 | tmp = spi_sync(spi, &host->m); |
908 | if (tmp == 0) | ||
909 | tmp = host->m.status; | ||
910 | 900 | ||
911 | if (host->dma_dev) | 901 | if (host->dma_dev) |
912 | dma_sync_single_for_cpu(host->dma_dev, | 902 | dma_sync_single_for_cpu(host->dma_dev, |
diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig index e8d69b0adf90..6cde4edc846b 100644 --- a/drivers/net/Kconfig +++ b/drivers/net/Kconfig | |||
@@ -888,7 +888,7 @@ config SMC91X | |||
888 | tristate "SMC 91C9x/91C1xxx support" | 888 | tristate "SMC 91C9x/91C1xxx support" |
889 | select CRC32 | 889 | select CRC32 |
890 | select MII | 890 | select MII |
891 | depends on ARM || REDWOOD_5 || REDWOOD_6 || M32R || SUPERH || SOC_AU1X00 || BFIN | 891 | depends on ARM || REDWOOD_5 || REDWOOD_6 || M32R || SUPERH || SOC_AU1X00 || BLACKFIN |
892 | help | 892 | help |
893 | This is a driver for SMC's 91x series of Ethernet chipsets, | 893 | This is a driver for SMC's 91x series of Ethernet chipsets, |
894 | including the SMC91C94 and the SMC91C111. Say Y if you want it | 894 | including the SMC91C94 and the SMC91C111. Say Y if you want it |
@@ -926,7 +926,7 @@ config SMC911X | |||
926 | tristate "SMSC LAN911[5678] support" | 926 | tristate "SMSC LAN911[5678] support" |
927 | select CRC32 | 927 | select CRC32 |
928 | select MII | 928 | select MII |
929 | depends on ARCH_PXA || SUPERH | 929 | depends on ARCH_PXA || SH_MAGIC_PANEL_R2 |
930 | help | 930 | help |
931 | This is a driver for SMSC's LAN911x series of Ethernet chipsets | 931 | This is a driver for SMSC's LAN911x series of Ethernet chipsets |
932 | including the new LAN9115, LAN9116, LAN9117, and LAN9118. | 932 | including the new LAN9115, LAN9116, LAN9117, and LAN9118. |
@@ -2588,6 +2588,7 @@ config MLX4_DEBUG | |||
2588 | config TEHUTI | 2588 | config TEHUTI |
2589 | tristate "Tehuti Networks 10G Ethernet" | 2589 | tristate "Tehuti Networks 10G Ethernet" |
2590 | depends on PCI | 2590 | depends on PCI |
2591 | select ZLIB_INFLATE | ||
2591 | help | 2592 | help |
2592 | Tehuti Networks 10G Ethernet NIC | 2593 | Tehuti Networks 10G Ethernet NIC |
2593 | 2594 | ||
diff --git a/drivers/net/amd8111e.c b/drivers/net/amd8111e.c index eebf5bb2b03a..e7fdd81919bd 100644 --- a/drivers/net/amd8111e.c +++ b/drivers/net/amd8111e.c | |||
@@ -1340,7 +1340,9 @@ static int amd8111e_close(struct net_device * dev) | |||
1340 | struct amd8111e_priv *lp = netdev_priv(dev); | 1340 | struct amd8111e_priv *lp = netdev_priv(dev); |
1341 | netif_stop_queue(dev); | 1341 | netif_stop_queue(dev); |
1342 | 1342 | ||
1343 | #ifdef CONFIG_AMD8111E_NAPI | ||
1343 | napi_disable(&lp->napi); | 1344 | napi_disable(&lp->napi); |
1345 | #endif | ||
1344 | 1346 | ||
1345 | spin_lock_irq(&lp->lock); | 1347 | spin_lock_irq(&lp->lock); |
1346 | 1348 | ||
@@ -1372,7 +1374,9 @@ static int amd8111e_open(struct net_device * dev ) | |||
1372 | dev->name, dev)) | 1374 | dev->name, dev)) |
1373 | return -EAGAIN; | 1375 | return -EAGAIN; |
1374 | 1376 | ||
1377 | #ifdef CONFIG_AMD8111E_NAPI | ||
1375 | napi_enable(&lp->napi); | 1378 | napi_enable(&lp->napi); |
1379 | #endif | ||
1376 | 1380 | ||
1377 | spin_lock_irq(&lp->lock); | 1381 | spin_lock_irq(&lp->lock); |
1378 | 1382 | ||
@@ -1380,7 +1384,9 @@ static int amd8111e_open(struct net_device * dev ) | |||
1380 | 1384 | ||
1381 | if(amd8111e_restart(dev)){ | 1385 | if(amd8111e_restart(dev)){ |
1382 | spin_unlock_irq(&lp->lock); | 1386 | spin_unlock_irq(&lp->lock); |
1387 | #ifdef CONFIG_AMD8111E_NAPI | ||
1383 | napi_disable(&lp->napi); | 1388 | napi_disable(&lp->napi); |
1389 | #endif | ||
1384 | if (dev->irq) | 1390 | if (dev->irq) |
1385 | free_irq(dev->irq, dev); | 1391 | free_irq(dev->irq, dev); |
1386 | return -ENOMEM; | 1392 | return -ENOMEM; |
diff --git a/drivers/net/bfin_mac.c b/drivers/net/bfin_mac.c index 0b99b5549295..eb971755a3ff 100644 --- a/drivers/net/bfin_mac.c +++ b/drivers/net/bfin_mac.c | |||
@@ -676,7 +676,7 @@ static void bf537mac_rx(struct net_device *dev) | |||
676 | skb->protocol = eth_type_trans(skb, dev); | 676 | skb->protocol = eth_type_trans(skb, dev); |
677 | #if defined(BFIN_MAC_CSUM_OFFLOAD) | 677 | #if defined(BFIN_MAC_CSUM_OFFLOAD) |
678 | skb->csum = current_rx_ptr->status.ip_payload_csum; | 678 | skb->csum = current_rx_ptr->status.ip_payload_csum; |
679 | skb->ip_summed = CHECKSUM_PARTIAL; | 679 | skb->ip_summed = CHECKSUM_COMPLETE; |
680 | #endif | 680 | #endif |
681 | 681 | ||
682 | netif_rx(skb); | 682 | netif_rx(skb); |
diff --git a/drivers/net/bonding/bond_main.c b/drivers/net/bonding/bond_main.c index 423298c84a1d..b0b26036266b 100644 --- a/drivers/net/bonding/bond_main.c +++ b/drivers/net/bonding/bond_main.c | |||
@@ -74,6 +74,7 @@ | |||
74 | #include <linux/ethtool.h> | 74 | #include <linux/ethtool.h> |
75 | #include <linux/if_vlan.h> | 75 | #include <linux/if_vlan.h> |
76 | #include <linux/if_bonding.h> | 76 | #include <linux/if_bonding.h> |
77 | #include <linux/jiffies.h> | ||
77 | #include <net/route.h> | 78 | #include <net/route.h> |
78 | #include <net/net_namespace.h> | 79 | #include <net/net_namespace.h> |
79 | #include "bonding.h" | 80 | #include "bonding.h" |
@@ -174,6 +175,7 @@ struct bond_parm_tbl bond_mode_tbl[] = { | |||
174 | struct bond_parm_tbl xmit_hashtype_tbl[] = { | 175 | struct bond_parm_tbl xmit_hashtype_tbl[] = { |
175 | { "layer2", BOND_XMIT_POLICY_LAYER2}, | 176 | { "layer2", BOND_XMIT_POLICY_LAYER2}, |
176 | { "layer3+4", BOND_XMIT_POLICY_LAYER34}, | 177 | { "layer3+4", BOND_XMIT_POLICY_LAYER34}, |
178 | { "layer2+3", BOND_XMIT_POLICY_LAYER23}, | ||
177 | { NULL, -1}, | 179 | { NULL, -1}, |
178 | }; | 180 | }; |
179 | 181 | ||
@@ -2722,8 +2724,8 @@ void bond_loadbalance_arp_mon(struct work_struct *work) | |||
2722 | */ | 2724 | */ |
2723 | bond_for_each_slave(bond, slave, i) { | 2725 | bond_for_each_slave(bond, slave, i) { |
2724 | if (slave->link != BOND_LINK_UP) { | 2726 | if (slave->link != BOND_LINK_UP) { |
2725 | if (((jiffies - slave->dev->trans_start) <= delta_in_ticks) && | 2727 | if (time_before_eq(jiffies, slave->dev->trans_start + delta_in_ticks) && |
2726 | ((jiffies - slave->dev->last_rx) <= delta_in_ticks)) { | 2728 | time_before_eq(jiffies, slave->dev->last_rx + delta_in_ticks)) { |
2727 | 2729 | ||
2728 | slave->link = BOND_LINK_UP; | 2730 | slave->link = BOND_LINK_UP; |
2729 | slave->state = BOND_STATE_ACTIVE; | 2731 | slave->state = BOND_STATE_ACTIVE; |
@@ -2754,8 +2756,8 @@ void bond_loadbalance_arp_mon(struct work_struct *work) | |||
2754 | * when the source ip is 0, so don't take the link down | 2756 | * when the source ip is 0, so don't take the link down |
2755 | * if we don't know our ip yet | 2757 | * if we don't know our ip yet |
2756 | */ | 2758 | */ |
2757 | if (((jiffies - slave->dev->trans_start) >= (2*delta_in_ticks)) || | 2759 | if (time_after_eq(jiffies, slave->dev->trans_start + 2*delta_in_ticks) || |
2758 | (((jiffies - slave->dev->last_rx) >= (2*delta_in_ticks)) && | 2760 | (time_after_eq(jiffies, slave->dev->last_rx + 2*delta_in_ticks) && |
2759 | bond_has_ip(bond))) { | 2761 | bond_has_ip(bond))) { |
2760 | 2762 | ||
2761 | slave->link = BOND_LINK_DOWN; | 2763 | slave->link = BOND_LINK_DOWN; |
@@ -2848,8 +2850,8 @@ void bond_activebackup_arp_mon(struct work_struct *work) | |||
2848 | */ | 2850 | */ |
2849 | bond_for_each_slave(bond, slave, i) { | 2851 | bond_for_each_slave(bond, slave, i) { |
2850 | if (slave->link != BOND_LINK_UP) { | 2852 | if (slave->link != BOND_LINK_UP) { |
2851 | if ((jiffies - slave_last_rx(bond, slave)) <= | 2853 | if (time_before_eq(jiffies, |
2852 | delta_in_ticks) { | 2854 | slave_last_rx(bond, slave) + delta_in_ticks)) { |
2853 | 2855 | ||
2854 | slave->link = BOND_LINK_UP; | 2856 | slave->link = BOND_LINK_UP; |
2855 | 2857 | ||
@@ -2858,7 +2860,7 @@ void bond_activebackup_arp_mon(struct work_struct *work) | |||
2858 | write_lock_bh(&bond->curr_slave_lock); | 2860 | write_lock_bh(&bond->curr_slave_lock); |
2859 | 2861 | ||
2860 | if ((!bond->curr_active_slave) && | 2862 | if ((!bond->curr_active_slave) && |
2861 | ((jiffies - slave->dev->trans_start) <= delta_in_ticks)) { | 2863 | time_before_eq(jiffies, slave->dev->trans_start + delta_in_ticks)) { |
2862 | bond_change_active_slave(bond, slave); | 2864 | bond_change_active_slave(bond, slave); |
2863 | bond->current_arp_slave = NULL; | 2865 | bond->current_arp_slave = NULL; |
2864 | } else if (bond->curr_active_slave != slave) { | 2866 | } else if (bond->curr_active_slave != slave) { |
@@ -2897,7 +2899,7 @@ void bond_activebackup_arp_mon(struct work_struct *work) | |||
2897 | 2899 | ||
2898 | if ((slave != bond->curr_active_slave) && | 2900 | if ((slave != bond->curr_active_slave) && |
2899 | (!bond->current_arp_slave) && | 2901 | (!bond->current_arp_slave) && |
2900 | (((jiffies - slave_last_rx(bond, slave)) >= 3*delta_in_ticks) && | 2902 | (time_after_eq(jiffies, slave_last_rx(bond, slave) + 3*delta_in_ticks) && |
2901 | bond_has_ip(bond))) { | 2903 | bond_has_ip(bond))) { |
2902 | /* a backup slave has gone down; three times | 2904 | /* a backup slave has gone down; three times |
2903 | * the delta allows the current slave to be | 2905 | * the delta allows the current slave to be |
@@ -2943,10 +2945,10 @@ void bond_activebackup_arp_mon(struct work_struct *work) | |||
2943 | * before being taken out. if a primary is being used, check | 2945 | * before being taken out. if a primary is being used, check |
2944 | * if it is up and needs to take over as the curr_active_slave | 2946 | * if it is up and needs to take over as the curr_active_slave |
2945 | */ | 2947 | */ |
2946 | if ((((jiffies - slave->dev->trans_start) >= (2*delta_in_ticks)) || | 2948 | if ((time_after_eq(jiffies, slave->dev->trans_start + 2*delta_in_ticks) || |
2947 | (((jiffies - slave_last_rx(bond, slave)) >= (2*delta_in_ticks)) && | 2949 | (time_after_eq(jiffies, slave_last_rx(bond, slave) + 2*delta_in_ticks) && |
2948 | bond_has_ip(bond))) && | 2950 | bond_has_ip(bond))) && |
2949 | ((jiffies - slave->jiffies) >= 2*delta_in_ticks)) { | 2951 | time_after_eq(jiffies, slave->jiffies + 2*delta_in_ticks)) { |
2950 | 2952 | ||
2951 | slave->link = BOND_LINK_DOWN; | 2953 | slave->link = BOND_LINK_DOWN; |
2952 | 2954 | ||
@@ -3604,6 +3606,24 @@ void bond_unregister_arp(struct bonding *bond) | |||
3604 | /*---------------------------- Hashing Policies -----------------------------*/ | 3606 | /*---------------------------- Hashing Policies -----------------------------*/ |
3605 | 3607 | ||
3606 | /* | 3608 | /* |
3609 | * Hash for the output device based upon layer 2 and layer 3 data. If | ||
3610 | * the packet is not IP mimic bond_xmit_hash_policy_l2() | ||
3611 | */ | ||
3612 | static int bond_xmit_hash_policy_l23(struct sk_buff *skb, | ||
3613 | struct net_device *bond_dev, int count) | ||
3614 | { | ||
3615 | struct ethhdr *data = (struct ethhdr *)skb->data; | ||
3616 | struct iphdr *iph = ip_hdr(skb); | ||
3617 | |||
3618 | if (skb->protocol == __constant_htons(ETH_P_IP)) { | ||
3619 | return ((ntohl(iph->saddr ^ iph->daddr) & 0xffff) ^ | ||
3620 | (data->h_dest[5] ^ bond_dev->dev_addr[5])) % count; | ||
3621 | } | ||
3622 | |||
3623 | return (data->h_dest[5] ^ bond_dev->dev_addr[5]) % count; | ||
3624 | } | ||
3625 | |||
3626 | /* | ||
3607 | * Hash for the output device based upon layer 3 and layer 4 data. If | 3627 | * Hash for the output device based upon layer 3 and layer 4 data. If |
3608 | * the packet is a frag or not TCP or UDP, just use layer 3 data. If it is | 3628 | * the packet is a frag or not TCP or UDP, just use layer 3 data. If it is |
3609 | * altogether not IP, mimic bond_xmit_hash_policy_l2() | 3629 | * altogether not IP, mimic bond_xmit_hash_policy_l2() |
@@ -4305,6 +4325,22 @@ out: | |||
4305 | 4325 | ||
4306 | /*------------------------- Device initialization ---------------------------*/ | 4326 | /*------------------------- Device initialization ---------------------------*/ |
4307 | 4327 | ||
4328 | static void bond_set_xmit_hash_policy(struct bonding *bond) | ||
4329 | { | ||
4330 | switch (bond->params.xmit_policy) { | ||
4331 | case BOND_XMIT_POLICY_LAYER23: | ||
4332 | bond->xmit_hash_policy = bond_xmit_hash_policy_l23; | ||
4333 | break; | ||
4334 | case BOND_XMIT_POLICY_LAYER34: | ||
4335 | bond->xmit_hash_policy = bond_xmit_hash_policy_l34; | ||
4336 | break; | ||
4337 | case BOND_XMIT_POLICY_LAYER2: | ||
4338 | default: | ||
4339 | bond->xmit_hash_policy = bond_xmit_hash_policy_l2; | ||
4340 | break; | ||
4341 | } | ||
4342 | } | ||
4343 | |||
4308 | /* | 4344 | /* |
4309 | * set bond mode specific net device operations | 4345 | * set bond mode specific net device operations |
4310 | */ | 4346 | */ |
@@ -4321,10 +4357,7 @@ void bond_set_mode_ops(struct bonding *bond, int mode) | |||
4321 | break; | 4357 | break; |
4322 | case BOND_MODE_XOR: | 4358 | case BOND_MODE_XOR: |
4323 | bond_dev->hard_start_xmit = bond_xmit_xor; | 4359 | bond_dev->hard_start_xmit = bond_xmit_xor; |
4324 | if (bond->params.xmit_policy == BOND_XMIT_POLICY_LAYER34) | 4360 | bond_set_xmit_hash_policy(bond); |
4325 | bond->xmit_hash_policy = bond_xmit_hash_policy_l34; | ||
4326 | else | ||
4327 | bond->xmit_hash_policy = bond_xmit_hash_policy_l2; | ||
4328 | break; | 4361 | break; |
4329 | case BOND_MODE_BROADCAST: | 4362 | case BOND_MODE_BROADCAST: |
4330 | bond_dev->hard_start_xmit = bond_xmit_broadcast; | 4363 | bond_dev->hard_start_xmit = bond_xmit_broadcast; |
@@ -4332,10 +4365,7 @@ void bond_set_mode_ops(struct bonding *bond, int mode) | |||
4332 | case BOND_MODE_8023AD: | 4365 | case BOND_MODE_8023AD: |
4333 | bond_set_master_3ad_flags(bond); | 4366 | bond_set_master_3ad_flags(bond); |
4334 | bond_dev->hard_start_xmit = bond_3ad_xmit_xor; | 4367 | bond_dev->hard_start_xmit = bond_3ad_xmit_xor; |
4335 | if (bond->params.xmit_policy == BOND_XMIT_POLICY_LAYER34) | 4368 | bond_set_xmit_hash_policy(bond); |
4336 | bond->xmit_hash_policy = bond_xmit_hash_policy_l34; | ||
4337 | else | ||
4338 | bond->xmit_hash_policy = bond_xmit_hash_policy_l2; | ||
4339 | break; | 4369 | break; |
4340 | case BOND_MODE_ALB: | 4370 | case BOND_MODE_ALB: |
4341 | bond_set_master_alb_flags(bond); | 4371 | bond_set_master_alb_flags(bond); |
@@ -4462,6 +4492,27 @@ static void bond_deinit(struct net_device *bond_dev) | |||
4462 | #endif | 4492 | #endif |
4463 | } | 4493 | } |
4464 | 4494 | ||
4495 | static void bond_work_cancel_all(struct bonding *bond) | ||
4496 | { | ||
4497 | write_lock_bh(&bond->lock); | ||
4498 | bond->kill_timers = 1; | ||
4499 | write_unlock_bh(&bond->lock); | ||
4500 | |||
4501 | if (bond->params.miimon && delayed_work_pending(&bond->mii_work)) | ||
4502 | cancel_delayed_work(&bond->mii_work); | ||
4503 | |||
4504 | if (bond->params.arp_interval && delayed_work_pending(&bond->arp_work)) | ||
4505 | cancel_delayed_work(&bond->arp_work); | ||
4506 | |||
4507 | if (bond->params.mode == BOND_MODE_ALB && | ||
4508 | delayed_work_pending(&bond->alb_work)) | ||
4509 | cancel_delayed_work(&bond->alb_work); | ||
4510 | |||
4511 | if (bond->params.mode == BOND_MODE_8023AD && | ||
4512 | delayed_work_pending(&bond->ad_work)) | ||
4513 | cancel_delayed_work(&bond->ad_work); | ||
4514 | } | ||
4515 | |||
4465 | /* Unregister and free all bond devices. | 4516 | /* Unregister and free all bond devices. |
4466 | * Caller must hold rtnl_lock. | 4517 | * Caller must hold rtnl_lock. |
4467 | */ | 4518 | */ |
@@ -4472,6 +4523,7 @@ static void bond_free_all(void) | |||
4472 | list_for_each_entry_safe(bond, nxt, &bond_dev_list, bond_list) { | 4523 | list_for_each_entry_safe(bond, nxt, &bond_dev_list, bond_list) { |
4473 | struct net_device *bond_dev = bond->dev; | 4524 | struct net_device *bond_dev = bond->dev; |
4474 | 4525 | ||
4526 | bond_work_cancel_all(bond); | ||
4475 | bond_mc_list_destroy(bond); | 4527 | bond_mc_list_destroy(bond); |
4476 | /* Release the bonded slaves */ | 4528 | /* Release the bonded slaves */ |
4477 | bond_release_all(bond_dev); | 4529 | bond_release_all(bond_dev); |
@@ -4497,8 +4549,7 @@ int bond_parse_parm(char *mode_arg, struct bond_parm_tbl *tbl) | |||
4497 | for (i = 0; tbl[i].modename; i++) { | 4549 | for (i = 0; tbl[i].modename; i++) { |
4498 | if ((isdigit(*mode_arg) && | 4550 | if ((isdigit(*mode_arg) && |
4499 | tbl[i].mode == simple_strtol(mode_arg, NULL, 0)) || | 4551 | tbl[i].mode == simple_strtol(mode_arg, NULL, 0)) || |
4500 | (strncmp(mode_arg, tbl[i].modename, | 4552 | (strcmp(mode_arg, tbl[i].modename) == 0)) { |
4501 | strlen(tbl[i].modename)) == 0)) { | ||
4502 | return tbl[i].mode; | 4553 | return tbl[i].mode; |
4503 | } | 4554 | } |
4504 | } | 4555 | } |
@@ -4873,27 +4924,6 @@ out_rtnl: | |||
4873 | return res; | 4924 | return res; |
4874 | } | 4925 | } |
4875 | 4926 | ||
4876 | static void bond_work_cancel_all(struct bonding *bond) | ||
4877 | { | ||
4878 | write_lock_bh(&bond->lock); | ||
4879 | bond->kill_timers = 1; | ||
4880 | write_unlock_bh(&bond->lock); | ||
4881 | |||
4882 | if (bond->params.miimon && delayed_work_pending(&bond->mii_work)) | ||
4883 | cancel_delayed_work(&bond->mii_work); | ||
4884 | |||
4885 | if (bond->params.arp_interval && delayed_work_pending(&bond->arp_work)) | ||
4886 | cancel_delayed_work(&bond->arp_work); | ||
4887 | |||
4888 | if (bond->params.mode == BOND_MODE_ALB && | ||
4889 | delayed_work_pending(&bond->alb_work)) | ||
4890 | cancel_delayed_work(&bond->alb_work); | ||
4891 | |||
4892 | if (bond->params.mode == BOND_MODE_8023AD && | ||
4893 | delayed_work_pending(&bond->ad_work)) | ||
4894 | cancel_delayed_work(&bond->ad_work); | ||
4895 | } | ||
4896 | |||
4897 | static int __init bonding_init(void) | 4927 | static int __init bonding_init(void) |
4898 | { | 4928 | { |
4899 | int i; | 4929 | int i; |
diff --git a/drivers/net/bonding/bond_sysfs.c b/drivers/net/bonding/bond_sysfs.c index b29330d8e309..11b76b352415 100644 --- a/drivers/net/bonding/bond_sysfs.c +++ b/drivers/net/bonding/bond_sysfs.c | |||
@@ -74,7 +74,7 @@ struct rw_semaphore bonding_rwsem; | |||
74 | * "show" function for the bond_masters attribute. | 74 | * "show" function for the bond_masters attribute. |
75 | * The class parameter is ignored. | 75 | * The class parameter is ignored. |
76 | */ | 76 | */ |
77 | static ssize_t bonding_show_bonds(struct class *cls, char *buffer) | 77 | static ssize_t bonding_show_bonds(struct class *cls, char *buf) |
78 | { | 78 | { |
79 | int res = 0; | 79 | int res = 0; |
80 | struct bonding *bond; | 80 | struct bonding *bond; |
@@ -86,14 +86,13 @@ static ssize_t bonding_show_bonds(struct class *cls, char *buffer) | |||
86 | /* not enough space for another interface name */ | 86 | /* not enough space for another interface name */ |
87 | if ((PAGE_SIZE - res) > 10) | 87 | if ((PAGE_SIZE - res) > 10) |
88 | res = PAGE_SIZE - 10; | 88 | res = PAGE_SIZE - 10; |
89 | res += sprintf(buffer + res, "++more++"); | 89 | res += sprintf(buf + res, "++more++ "); |
90 | break; | 90 | break; |
91 | } | 91 | } |
92 | res += sprintf(buffer + res, "%s ", | 92 | res += sprintf(buf + res, "%s ", bond->dev->name); |
93 | bond->dev->name); | ||
94 | } | 93 | } |
95 | res += sprintf(buffer + res, "\n"); | 94 | if (res) |
96 | res++; | 95 | buf[res-1] = '\n'; /* eat the leftover space */ |
97 | up_read(&(bonding_rwsem)); | 96 | up_read(&(bonding_rwsem)); |
98 | return res; | 97 | return res; |
99 | } | 98 | } |
@@ -235,14 +234,14 @@ static ssize_t bonding_show_slaves(struct device *d, | |||
235 | /* not enough space for another interface name */ | 234 | /* not enough space for another interface name */ |
236 | if ((PAGE_SIZE - res) > 10) | 235 | if ((PAGE_SIZE - res) > 10) |
237 | res = PAGE_SIZE - 10; | 236 | res = PAGE_SIZE - 10; |
238 | res += sprintf(buf + res, "++more++"); | 237 | res += sprintf(buf + res, "++more++ "); |
239 | break; | 238 | break; |
240 | } | 239 | } |
241 | res += sprintf(buf + res, "%s ", slave->dev->name); | 240 | res += sprintf(buf + res, "%s ", slave->dev->name); |
242 | } | 241 | } |
243 | read_unlock(&bond->lock); | 242 | read_unlock(&bond->lock); |
244 | res += sprintf(buf + res, "\n"); | 243 | if (res) |
245 | res++; | 244 | buf[res-1] = '\n'; /* eat the leftover space */ |
246 | return res; | 245 | return res; |
247 | } | 246 | } |
248 | 247 | ||
@@ -406,7 +405,7 @@ static ssize_t bonding_show_mode(struct device *d, | |||
406 | 405 | ||
407 | return sprintf(buf, "%s %d\n", | 406 | return sprintf(buf, "%s %d\n", |
408 | bond_mode_tbl[bond->params.mode].modename, | 407 | bond_mode_tbl[bond->params.mode].modename, |
409 | bond->params.mode) + 1; | 408 | bond->params.mode); |
410 | } | 409 | } |
411 | 410 | ||
412 | static ssize_t bonding_store_mode(struct device *d, | 411 | static ssize_t bonding_store_mode(struct device *d, |
@@ -457,20 +456,11 @@ static ssize_t bonding_show_xmit_hash(struct device *d, | |||
457 | struct device_attribute *attr, | 456 | struct device_attribute *attr, |
458 | char *buf) | 457 | char *buf) |
459 | { | 458 | { |
460 | int count; | ||
461 | struct bonding *bond = to_bond(d); | 459 | struct bonding *bond = to_bond(d); |
462 | 460 | ||
463 | if ((bond->params.mode != BOND_MODE_XOR) && | 461 | return sprintf(buf, "%s %d\n", |
464 | (bond->params.mode != BOND_MODE_8023AD)) { | 462 | xmit_hashtype_tbl[bond->params.xmit_policy].modename, |
465 | // Not Applicable | 463 | bond->params.xmit_policy); |
466 | count = sprintf(buf, "NA\n") + 1; | ||
467 | } else { | ||
468 | count = sprintf(buf, "%s %d\n", | ||
469 | xmit_hashtype_tbl[bond->params.xmit_policy].modename, | ||
470 | bond->params.xmit_policy) + 1; | ||
471 | } | ||
472 | |||
473 | return count; | ||
474 | } | 464 | } |
475 | 465 | ||
476 | static ssize_t bonding_store_xmit_hash(struct device *d, | 466 | static ssize_t bonding_store_xmit_hash(struct device *d, |
@@ -488,15 +478,6 @@ static ssize_t bonding_store_xmit_hash(struct device *d, | |||
488 | goto out; | 478 | goto out; |
489 | } | 479 | } |
490 | 480 | ||
491 | if ((bond->params.mode != BOND_MODE_XOR) && | ||
492 | (bond->params.mode != BOND_MODE_8023AD)) { | ||
493 | printk(KERN_ERR DRV_NAME | ||
494 | "%s: Transmit hash policy is irrelevant in this mode.\n", | ||
495 | bond->dev->name); | ||
496 | ret = -EPERM; | ||
497 | goto out; | ||
498 | } | ||
499 | |||
500 | new_value = bond_parse_parm((char *)buf, xmit_hashtype_tbl); | 481 | new_value = bond_parse_parm((char *)buf, xmit_hashtype_tbl); |
501 | if (new_value < 0) { | 482 | if (new_value < 0) { |
502 | printk(KERN_ERR DRV_NAME | 483 | printk(KERN_ERR DRV_NAME |
@@ -527,7 +508,7 @@ static ssize_t bonding_show_arp_validate(struct device *d, | |||
527 | 508 | ||
528 | return sprintf(buf, "%s %d\n", | 509 | return sprintf(buf, "%s %d\n", |
529 | arp_validate_tbl[bond->params.arp_validate].modename, | 510 | arp_validate_tbl[bond->params.arp_validate].modename, |
530 | bond->params.arp_validate) + 1; | 511 | bond->params.arp_validate); |
531 | } | 512 | } |
532 | 513 | ||
533 | static ssize_t bonding_store_arp_validate(struct device *d, | 514 | static ssize_t bonding_store_arp_validate(struct device *d, |
@@ -627,7 +608,7 @@ static ssize_t bonding_show_arp_interval(struct device *d, | |||
627 | { | 608 | { |
628 | struct bonding *bond = to_bond(d); | 609 | struct bonding *bond = to_bond(d); |
629 | 610 | ||
630 | return sprintf(buf, "%d\n", bond->params.arp_interval) + 1; | 611 | return sprintf(buf, "%d\n", bond->params.arp_interval); |
631 | } | 612 | } |
632 | 613 | ||
633 | static ssize_t bonding_store_arp_interval(struct device *d, | 614 | static ssize_t bonding_store_arp_interval(struct device *d, |
@@ -712,9 +693,7 @@ static ssize_t bonding_show_arp_targets(struct device *d, | |||
712 | NIPQUAD(bond->params.arp_targets[i])); | 693 | NIPQUAD(bond->params.arp_targets[i])); |
713 | } | 694 | } |
714 | if (res) | 695 | if (res) |
715 | res--; /* eat the leftover space */ | 696 | buf[res-1] = '\n'; /* eat the leftover space */ |
716 | res += sprintf(buf + res, "\n"); | ||
717 | res++; | ||
718 | return res; | 697 | return res; |
719 | } | 698 | } |
720 | 699 | ||
@@ -815,7 +794,7 @@ static ssize_t bonding_show_downdelay(struct device *d, | |||
815 | { | 794 | { |
816 | struct bonding *bond = to_bond(d); | 795 | struct bonding *bond = to_bond(d); |
817 | 796 | ||
818 | return sprintf(buf, "%d\n", bond->params.downdelay * bond->params.miimon) + 1; | 797 | return sprintf(buf, "%d\n", bond->params.downdelay * bond->params.miimon); |
819 | } | 798 | } |
820 | 799 | ||
821 | static ssize_t bonding_store_downdelay(struct device *d, | 800 | static ssize_t bonding_store_downdelay(struct device *d, |
@@ -872,7 +851,7 @@ static ssize_t bonding_show_updelay(struct device *d, | |||
872 | { | 851 | { |
873 | struct bonding *bond = to_bond(d); | 852 | struct bonding *bond = to_bond(d); |
874 | 853 | ||
875 | return sprintf(buf, "%d\n", bond->params.updelay * bond->params.miimon) + 1; | 854 | return sprintf(buf, "%d\n", bond->params.updelay * bond->params.miimon); |
876 | 855 | ||
877 | } | 856 | } |
878 | 857 | ||
@@ -936,7 +915,7 @@ static ssize_t bonding_show_lacp(struct device *d, | |||
936 | 915 | ||
937 | return sprintf(buf, "%s %d\n", | 916 | return sprintf(buf, "%s %d\n", |
938 | bond_lacp_tbl[bond->params.lacp_fast].modename, | 917 | bond_lacp_tbl[bond->params.lacp_fast].modename, |
939 | bond->params.lacp_fast) + 1; | 918 | bond->params.lacp_fast); |
940 | } | 919 | } |
941 | 920 | ||
942 | static ssize_t bonding_store_lacp(struct device *d, | 921 | static ssize_t bonding_store_lacp(struct device *d, |
@@ -992,7 +971,7 @@ static ssize_t bonding_show_miimon(struct device *d, | |||
992 | { | 971 | { |
993 | struct bonding *bond = to_bond(d); | 972 | struct bonding *bond = to_bond(d); |
994 | 973 | ||
995 | return sprintf(buf, "%d\n", bond->params.miimon) + 1; | 974 | return sprintf(buf, "%d\n", bond->params.miimon); |
996 | } | 975 | } |
997 | 976 | ||
998 | static ssize_t bonding_store_miimon(struct device *d, | 977 | static ssize_t bonding_store_miimon(struct device *d, |
@@ -1083,9 +1062,7 @@ static ssize_t bonding_show_primary(struct device *d, | |||
1083 | struct bonding *bond = to_bond(d); | 1062 | struct bonding *bond = to_bond(d); |
1084 | 1063 | ||
1085 | if (bond->primary_slave) | 1064 | if (bond->primary_slave) |
1086 | count = sprintf(buf, "%s\n", bond->primary_slave->dev->name) + 1; | 1065 | count = sprintf(buf, "%s\n", bond->primary_slave->dev->name); |
1087 | else | ||
1088 | count = sprintf(buf, "\n") + 1; | ||
1089 | 1066 | ||
1090 | return count; | 1067 | return count; |
1091 | } | 1068 | } |
@@ -1149,7 +1126,7 @@ static ssize_t bonding_show_carrier(struct device *d, | |||
1149 | { | 1126 | { |
1150 | struct bonding *bond = to_bond(d); | 1127 | struct bonding *bond = to_bond(d); |
1151 | 1128 | ||
1152 | return sprintf(buf, "%d\n", bond->params.use_carrier) + 1; | 1129 | return sprintf(buf, "%d\n", bond->params.use_carrier); |
1153 | } | 1130 | } |
1154 | 1131 | ||
1155 | static ssize_t bonding_store_carrier(struct device *d, | 1132 | static ssize_t bonding_store_carrier(struct device *d, |
@@ -1191,16 +1168,14 @@ static ssize_t bonding_show_active_slave(struct device *d, | |||
1191 | { | 1168 | { |
1192 | struct slave *curr; | 1169 | struct slave *curr; |
1193 | struct bonding *bond = to_bond(d); | 1170 | struct bonding *bond = to_bond(d); |
1194 | int count; | 1171 | int count = 0; |
1195 | 1172 | ||
1196 | read_lock(&bond->curr_slave_lock); | 1173 | read_lock(&bond->curr_slave_lock); |
1197 | curr = bond->curr_active_slave; | 1174 | curr = bond->curr_active_slave; |
1198 | read_unlock(&bond->curr_slave_lock); | 1175 | read_unlock(&bond->curr_slave_lock); |
1199 | 1176 | ||
1200 | if (USES_PRIMARY(bond->params.mode) && curr) | 1177 | if (USES_PRIMARY(bond->params.mode) && curr) |
1201 | count = sprintf(buf, "%s\n", curr->dev->name) + 1; | 1178 | count = sprintf(buf, "%s\n", curr->dev->name); |
1202 | else | ||
1203 | count = sprintf(buf, "\n") + 1; | ||
1204 | return count; | 1179 | return count; |
1205 | } | 1180 | } |
1206 | 1181 | ||
@@ -1295,7 +1270,7 @@ static ssize_t bonding_show_mii_status(struct device *d, | |||
1295 | curr = bond->curr_active_slave; | 1270 | curr = bond->curr_active_slave; |
1296 | read_unlock(&bond->curr_slave_lock); | 1271 | read_unlock(&bond->curr_slave_lock); |
1297 | 1272 | ||
1298 | return sprintf(buf, "%s\n", (curr) ? "up" : "down") + 1; | 1273 | return sprintf(buf, "%s\n", (curr) ? "up" : "down"); |
1299 | } | 1274 | } |
1300 | static DEVICE_ATTR(mii_status, S_IRUGO, bonding_show_mii_status, NULL); | 1275 | static DEVICE_ATTR(mii_status, S_IRUGO, bonding_show_mii_status, NULL); |
1301 | 1276 | ||
@@ -1312,10 +1287,8 @@ static ssize_t bonding_show_ad_aggregator(struct device *d, | |||
1312 | 1287 | ||
1313 | if (bond->params.mode == BOND_MODE_8023AD) { | 1288 | if (bond->params.mode == BOND_MODE_8023AD) { |
1314 | struct ad_info ad_info; | 1289 | struct ad_info ad_info; |
1315 | count = sprintf(buf, "%d\n", (bond_3ad_get_active_agg_info(bond, &ad_info)) ? 0 : ad_info.aggregator_id) + 1; | 1290 | count = sprintf(buf, "%d\n", (bond_3ad_get_active_agg_info(bond, &ad_info)) ? 0 : ad_info.aggregator_id); |
1316 | } | 1291 | } |
1317 | else | ||
1318 | count = sprintf(buf, "\n") + 1; | ||
1319 | 1292 | ||
1320 | return count; | 1293 | return count; |
1321 | } | 1294 | } |
@@ -1334,10 +1307,8 @@ static ssize_t bonding_show_ad_num_ports(struct device *d, | |||
1334 | 1307 | ||
1335 | if (bond->params.mode == BOND_MODE_8023AD) { | 1308 | if (bond->params.mode == BOND_MODE_8023AD) { |
1336 | struct ad_info ad_info; | 1309 | struct ad_info ad_info; |
1337 | count = sprintf(buf, "%d\n", (bond_3ad_get_active_agg_info(bond, &ad_info)) ? 0: ad_info.ports) + 1; | 1310 | count = sprintf(buf, "%d\n", (bond_3ad_get_active_agg_info(bond, &ad_info)) ? 0: ad_info.ports); |
1338 | } | 1311 | } |
1339 | else | ||
1340 | count = sprintf(buf, "\n") + 1; | ||
1341 | 1312 | ||
1342 | return count; | 1313 | return count; |
1343 | } | 1314 | } |
@@ -1356,10 +1327,8 @@ static ssize_t bonding_show_ad_actor_key(struct device *d, | |||
1356 | 1327 | ||
1357 | if (bond->params.mode == BOND_MODE_8023AD) { | 1328 | if (bond->params.mode == BOND_MODE_8023AD) { |
1358 | struct ad_info ad_info; | 1329 | struct ad_info ad_info; |
1359 | count = sprintf(buf, "%d\n", (bond_3ad_get_active_agg_info(bond, &ad_info)) ? 0 : ad_info.actor_key) + 1; | 1330 | count = sprintf(buf, "%d\n", (bond_3ad_get_active_agg_info(bond, &ad_info)) ? 0 : ad_info.actor_key); |
1360 | } | 1331 | } |
1361 | else | ||
1362 | count = sprintf(buf, "\n") + 1; | ||
1363 | 1332 | ||
1364 | return count; | 1333 | return count; |
1365 | } | 1334 | } |
@@ -1378,10 +1347,8 @@ static ssize_t bonding_show_ad_partner_key(struct device *d, | |||
1378 | 1347 | ||
1379 | if (bond->params.mode == BOND_MODE_8023AD) { | 1348 | if (bond->params.mode == BOND_MODE_8023AD) { |
1380 | struct ad_info ad_info; | 1349 | struct ad_info ad_info; |
1381 | count = sprintf(buf, "%d\n", (bond_3ad_get_active_agg_info(bond, &ad_info)) ? 0 : ad_info.partner_key) + 1; | 1350 | count = sprintf(buf, "%d\n", (bond_3ad_get_active_agg_info(bond, &ad_info)) ? 0 : ad_info.partner_key); |
1382 | } | 1351 | } |
1383 | else | ||
1384 | count = sprintf(buf, "\n") + 1; | ||
1385 | 1352 | ||
1386 | return count; | 1353 | return count; |
1387 | } | 1354 | } |
@@ -1403,12 +1370,9 @@ static ssize_t bonding_show_ad_partner_mac(struct device *d, | |||
1403 | struct ad_info ad_info; | 1370 | struct ad_info ad_info; |
1404 | if (!bond_3ad_get_active_agg_info(bond, &ad_info)) { | 1371 | if (!bond_3ad_get_active_agg_info(bond, &ad_info)) { |
1405 | count = sprintf(buf,"%s\n", | 1372 | count = sprintf(buf,"%s\n", |
1406 | print_mac(mac, ad_info.partner_system)) | 1373 | print_mac(mac, ad_info.partner_system)); |
1407 | + 1; | ||
1408 | } | 1374 | } |
1409 | } | 1375 | } |
1410 | else | ||
1411 | count = sprintf(buf, "\n") + 1; | ||
1412 | 1376 | ||
1413 | return count; | 1377 | return count; |
1414 | } | 1378 | } |
diff --git a/drivers/net/bonding/bonding.h b/drivers/net/bonding/bonding.h index 61c1b4536d34..e1e4734e23ce 100644 --- a/drivers/net/bonding/bonding.h +++ b/drivers/net/bonding/bonding.h | |||
@@ -22,8 +22,8 @@ | |||
22 | #include "bond_3ad.h" | 22 | #include "bond_3ad.h" |
23 | #include "bond_alb.h" | 23 | #include "bond_alb.h" |
24 | 24 | ||
25 | #define DRV_VERSION "3.2.1" | 25 | #define DRV_VERSION "3.2.3" |
26 | #define DRV_RELDATE "October 15, 2007" | 26 | #define DRV_RELDATE "December 6, 2007" |
27 | #define DRV_NAME "bonding" | 27 | #define DRV_NAME "bonding" |
28 | #define DRV_DESCRIPTION "Ethernet Channel Bonding Driver" | 28 | #define DRV_DESCRIPTION "Ethernet Channel Bonding Driver" |
29 | 29 | ||
diff --git a/drivers/net/chelsio/cxgb2.c b/drivers/net/chelsio/cxgb2.c index 2dbf8dc116c6..c5975047c89b 100644 --- a/drivers/net/chelsio/cxgb2.c +++ b/drivers/net/chelsio/cxgb2.c | |||
@@ -374,7 +374,9 @@ static char stats_strings[][ETH_GSTRING_LEN] = { | |||
374 | "TxInternalMACXmitError", | 374 | "TxInternalMACXmitError", |
375 | "TxFramesWithExcessiveDeferral", | 375 | "TxFramesWithExcessiveDeferral", |
376 | "TxFCSErrors", | 376 | "TxFCSErrors", |
377 | 377 | "TxJumboFramesOk", | |
378 | "TxJumboOctetsOk", | ||
379 | |||
378 | "RxOctetsOK", | 380 | "RxOctetsOK", |
379 | "RxOctetsBad", | 381 | "RxOctetsBad", |
380 | "RxUnicastFramesOK", | 382 | "RxUnicastFramesOK", |
@@ -392,16 +394,17 @@ static char stats_strings[][ETH_GSTRING_LEN] = { | |||
392 | "RxInRangeLengthErrors", | 394 | "RxInRangeLengthErrors", |
393 | "RxOutOfRangeLengthField", | 395 | "RxOutOfRangeLengthField", |
394 | "RxFrameTooLongErrors", | 396 | "RxFrameTooLongErrors", |
397 | "RxJumboFramesOk", | ||
398 | "RxJumboOctetsOk", | ||
395 | 399 | ||
396 | /* Port stats */ | 400 | /* Port stats */ |
397 | "RxPackets", | ||
398 | "RxCsumGood", | 401 | "RxCsumGood", |
399 | "TxPackets", | ||
400 | "TxCsumOffload", | 402 | "TxCsumOffload", |
401 | "TxTso", | 403 | "TxTso", |
402 | "RxVlan", | 404 | "RxVlan", |
403 | "TxVlan", | 405 | "TxVlan", |
404 | 406 | "TxNeedHeadroom", | |
407 | |||
405 | /* Interrupt stats */ | 408 | /* Interrupt stats */ |
406 | "rx drops", | 409 | "rx drops", |
407 | "pure_rsps", | 410 | "pure_rsps", |
@@ -463,23 +466,56 @@ static void get_stats(struct net_device *dev, struct ethtool_stats *stats, | |||
463 | const struct cmac_statistics *s; | 466 | const struct cmac_statistics *s; |
464 | const struct sge_intr_counts *t; | 467 | const struct sge_intr_counts *t; |
465 | struct sge_port_stats ss; | 468 | struct sge_port_stats ss; |
466 | unsigned int len; | ||
467 | 469 | ||
468 | s = mac->ops->statistics_update(mac, MAC_STATS_UPDATE_FULL); | 470 | s = mac->ops->statistics_update(mac, MAC_STATS_UPDATE_FULL); |
469 | 471 | t = t1_sge_get_intr_counts(adapter->sge); | |
470 | len = sizeof(u64)*(&s->TxFCSErrors + 1 - &s->TxOctetsOK); | ||
471 | memcpy(data, &s->TxOctetsOK, len); | ||
472 | data += len; | ||
473 | |||
474 | len = sizeof(u64)*(&s->RxFrameTooLongErrors + 1 - &s->RxOctetsOK); | ||
475 | memcpy(data, &s->RxOctetsOK, len); | ||
476 | data += len; | ||
477 | |||
478 | t1_sge_get_port_stats(adapter->sge, dev->if_port, &ss); | 472 | t1_sge_get_port_stats(adapter->sge, dev->if_port, &ss); |
479 | memcpy(data, &ss, sizeof(ss)); | ||
480 | data += sizeof(ss); | ||
481 | 473 | ||
482 | t = t1_sge_get_intr_counts(adapter->sge); | 474 | *data++ = s->TxOctetsOK; |
475 | *data++ = s->TxOctetsBad; | ||
476 | *data++ = s->TxUnicastFramesOK; | ||
477 | *data++ = s->TxMulticastFramesOK; | ||
478 | *data++ = s->TxBroadcastFramesOK; | ||
479 | *data++ = s->TxPauseFrames; | ||
480 | *data++ = s->TxFramesWithDeferredXmissions; | ||
481 | *data++ = s->TxLateCollisions; | ||
482 | *data++ = s->TxTotalCollisions; | ||
483 | *data++ = s->TxFramesAbortedDueToXSCollisions; | ||
484 | *data++ = s->TxUnderrun; | ||
485 | *data++ = s->TxLengthErrors; | ||
486 | *data++ = s->TxInternalMACXmitError; | ||
487 | *data++ = s->TxFramesWithExcessiveDeferral; | ||
488 | *data++ = s->TxFCSErrors; | ||
489 | *data++ = s->TxJumboFramesOK; | ||
490 | *data++ = s->TxJumboOctetsOK; | ||
491 | |||
492 | *data++ = s->RxOctetsOK; | ||
493 | *data++ = s->RxOctetsBad; | ||
494 | *data++ = s->RxUnicastFramesOK; | ||
495 | *data++ = s->RxMulticastFramesOK; | ||
496 | *data++ = s->RxBroadcastFramesOK; | ||
497 | *data++ = s->RxPauseFrames; | ||
498 | *data++ = s->RxFCSErrors; | ||
499 | *data++ = s->RxAlignErrors; | ||
500 | *data++ = s->RxSymbolErrors; | ||
501 | *data++ = s->RxDataErrors; | ||
502 | *data++ = s->RxSequenceErrors; | ||
503 | *data++ = s->RxRuntErrors; | ||
504 | *data++ = s->RxJabberErrors; | ||
505 | *data++ = s->RxInternalMACRcvError; | ||
506 | *data++ = s->RxInRangeLengthErrors; | ||
507 | *data++ = s->RxOutOfRangeLengthField; | ||
508 | *data++ = s->RxFrameTooLongErrors; | ||
509 | *data++ = s->RxJumboFramesOK; | ||
510 | *data++ = s->RxJumboOctetsOK; | ||
511 | |||
512 | *data++ = ss.rx_cso_good; | ||
513 | *data++ = ss.tx_cso; | ||
514 | *data++ = ss.tx_tso; | ||
515 | *data++ = ss.vlan_xtract; | ||
516 | *data++ = ss.vlan_insert; | ||
517 | *data++ = ss.tx_need_hdrroom; | ||
518 | |||
483 | *data++ = t->rx_drops; | 519 | *data++ = t->rx_drops; |
484 | *data++ = t->pure_rsps; | 520 | *data++ = t->pure_rsps; |
485 | *data++ = t->unhandled_irqs; | 521 | *data++ = t->unhandled_irqs; |
diff --git a/drivers/net/chelsio/pm3393.c b/drivers/net/chelsio/pm3393.c index 678778a8d133..2117c4fbb107 100644 --- a/drivers/net/chelsio/pm3393.c +++ b/drivers/net/chelsio/pm3393.c | |||
@@ -45,7 +45,7 @@ | |||
45 | 45 | ||
46 | #include <linux/crc32.h> | 46 | #include <linux/crc32.h> |
47 | 47 | ||
48 | #define OFFSET(REG_ADDR) (REG_ADDR << 2) | 48 | #define OFFSET(REG_ADDR) ((REG_ADDR) << 2) |
49 | 49 | ||
50 | /* Max frame size PM3393 can handle. Includes Ethernet header and CRC. */ | 50 | /* Max frame size PM3393 can handle. Includes Ethernet header and CRC. */ |
51 | #define MAX_FRAME_SIZE 9600 | 51 | #define MAX_FRAME_SIZE 9600 |
@@ -428,69 +428,26 @@ static int pm3393_set_speed_duplex_fc(struct cmac *cmac, int speed, int duplex, | |||
428 | return 0; | 428 | return 0; |
429 | } | 429 | } |
430 | 430 | ||
431 | static void pm3393_rmon_update(struct adapter *adapter, u32 offs, u64 *val, | 431 | #define RMON_UPDATE(mac, name, stat_name) \ |
432 | int over) | 432 | { \ |
433 | { | 433 | t1_tpi_read((mac)->adapter, OFFSET(name), &val0); \ |
434 | u32 val0, val1, val2; | 434 | t1_tpi_read((mac)->adapter, OFFSET((name)+1), &val1); \ |
435 | 435 | t1_tpi_read((mac)->adapter, OFFSET((name)+2), &val2); \ | |
436 | t1_tpi_read(adapter, offs, &val0); | 436 | (mac)->stats.stat_name = (u64)(val0 & 0xffff) | \ |
437 | t1_tpi_read(adapter, offs + 4, &val1); | 437 | ((u64)(val1 & 0xffff) << 16) | \ |
438 | t1_tpi_read(adapter, offs + 8, &val2); | 438 | ((u64)(val2 & 0xff) << 32) | \ |
439 | 439 | ((mac)->stats.stat_name & \ | |
440 | *val &= ~0ull << 40; | 440 | 0xffffff0000000000ULL); \ |
441 | *val |= val0 & 0xffff; | 441 | if (ro & \ |
442 | *val |= (val1 & 0xffff) << 16; | 442 | (1ULL << ((name - SUNI1x10GEXP_REG_MSTAT_COUNTER_0_LOW) >> 2))) \ |
443 | *val |= (u64)(val2 & 0xff) << 32; | 443 | (mac)->stats.stat_name += 1ULL << 40; \ |
444 | |||
445 | if (over) | ||
446 | *val += 1ull << 40; | ||
447 | } | 444 | } |
448 | 445 | ||
449 | static const struct cmac_statistics *pm3393_update_statistics(struct cmac *mac, | 446 | static const struct cmac_statistics *pm3393_update_statistics(struct cmac *mac, |
450 | int flag) | 447 | int flag) |
451 | { | 448 | { |
452 | static struct { | 449 | u64 ro; |
453 | unsigned int reg; | 450 | u32 val0, val1, val2, val3; |
454 | unsigned int offset; | ||
455 | } hw_stats [] = { | ||
456 | |||
457 | #define HW_STAT(name, stat_name) \ | ||
458 | { name, (&((struct cmac_statistics *)NULL)->stat_name) - (u64 *)NULL } | ||
459 | |||
460 | /* Rx stats */ | ||
461 | HW_STAT(RxOctetsReceivedOK, RxOctetsOK), | ||
462 | HW_STAT(RxUnicastFramesReceivedOK, RxUnicastFramesOK), | ||
463 | HW_STAT(RxMulticastFramesReceivedOK, RxMulticastFramesOK), | ||
464 | HW_STAT(RxBroadcastFramesReceivedOK, RxBroadcastFramesOK), | ||
465 | HW_STAT(RxPAUSEMACCtrlFramesReceived, RxPauseFrames), | ||
466 | HW_STAT(RxFrameCheckSequenceErrors, RxFCSErrors), | ||
467 | HW_STAT(RxFramesLostDueToInternalMACErrors, | ||
468 | RxInternalMACRcvError), | ||
469 | HW_STAT(RxSymbolErrors, RxSymbolErrors), | ||
470 | HW_STAT(RxInRangeLengthErrors, RxInRangeLengthErrors), | ||
471 | HW_STAT(RxFramesTooLongErrors , RxFrameTooLongErrors), | ||
472 | HW_STAT(RxJabbers, RxJabberErrors), | ||
473 | HW_STAT(RxFragments, RxRuntErrors), | ||
474 | HW_STAT(RxUndersizedFrames, RxRuntErrors), | ||
475 | HW_STAT(RxJumboFramesReceivedOK, RxJumboFramesOK), | ||
476 | HW_STAT(RxJumboOctetsReceivedOK, RxJumboOctetsOK), | ||
477 | |||
478 | /* Tx stats */ | ||
479 | HW_STAT(TxOctetsTransmittedOK, TxOctetsOK), | ||
480 | HW_STAT(TxFramesLostDueToInternalMACTransmissionError, | ||
481 | TxInternalMACXmitError), | ||
482 | HW_STAT(TxTransmitSystemError, TxFCSErrors), | ||
483 | HW_STAT(TxUnicastFramesTransmittedOK, TxUnicastFramesOK), | ||
484 | HW_STAT(TxMulticastFramesTransmittedOK, TxMulticastFramesOK), | ||
485 | HW_STAT(TxBroadcastFramesTransmittedOK, TxBroadcastFramesOK), | ||
486 | HW_STAT(TxPAUSEMACCtrlFramesTransmitted, TxPauseFrames), | ||
487 | HW_STAT(TxJumboFramesReceivedOK, TxJumboFramesOK), | ||
488 | HW_STAT(TxJumboOctetsReceivedOK, TxJumboOctetsOK) | ||
489 | }, *p = hw_stats; | ||
490 | u64 ro; | ||
491 | u32 val0, val1, val2, val3; | ||
492 | u64 *stats = (u64 *) &mac->stats; | ||
493 | unsigned int i; | ||
494 | 451 | ||
495 | /* Snap the counters */ | 452 | /* Snap the counters */ |
496 | pmwrite(mac, SUNI1x10GEXP_REG_MSTAT_CONTROL, | 453 | pmwrite(mac, SUNI1x10GEXP_REG_MSTAT_CONTROL, |
@@ -504,14 +461,35 @@ static const struct cmac_statistics *pm3393_update_statistics(struct cmac *mac, | |||
504 | ro = ((u64)val0 & 0xffff) | (((u64)val1 & 0xffff) << 16) | | 461 | ro = ((u64)val0 & 0xffff) | (((u64)val1 & 0xffff) << 16) | |
505 | (((u64)val2 & 0xffff) << 32) | (((u64)val3 & 0xffff) << 48); | 462 | (((u64)val2 & 0xffff) << 32) | (((u64)val3 & 0xffff) << 48); |
506 | 463 | ||
507 | for (i = 0; i < ARRAY_SIZE(hw_stats); i++) { | 464 | /* Rx stats */ |
508 | unsigned reg = p->reg - SUNI1x10GEXP_REG_MSTAT_COUNTER_0_LOW; | 465 | RMON_UPDATE(mac, RxOctetsReceivedOK, RxOctetsOK); |
509 | 466 | RMON_UPDATE(mac, RxUnicastFramesReceivedOK, RxUnicastFramesOK); | |
510 | pm3393_rmon_update((mac)->adapter, OFFSET(p->reg), | 467 | RMON_UPDATE(mac, RxMulticastFramesReceivedOK, RxMulticastFramesOK); |
511 | stats + p->offset, ro & (reg >> 2)); | 468 | RMON_UPDATE(mac, RxBroadcastFramesReceivedOK, RxBroadcastFramesOK); |
512 | } | 469 | RMON_UPDATE(mac, RxPAUSEMACCtrlFramesReceived, RxPauseFrames); |
513 | 470 | RMON_UPDATE(mac, RxFrameCheckSequenceErrors, RxFCSErrors); | |
514 | 471 | RMON_UPDATE(mac, RxFramesLostDueToInternalMACErrors, | |
472 | RxInternalMACRcvError); | ||
473 | RMON_UPDATE(mac, RxSymbolErrors, RxSymbolErrors); | ||
474 | RMON_UPDATE(mac, RxInRangeLengthErrors, RxInRangeLengthErrors); | ||
475 | RMON_UPDATE(mac, RxFramesTooLongErrors , RxFrameTooLongErrors); | ||
476 | RMON_UPDATE(mac, RxJabbers, RxJabberErrors); | ||
477 | RMON_UPDATE(mac, RxFragments, RxRuntErrors); | ||
478 | RMON_UPDATE(mac, RxUndersizedFrames, RxRuntErrors); | ||
479 | RMON_UPDATE(mac, RxJumboFramesReceivedOK, RxJumboFramesOK); | ||
480 | RMON_UPDATE(mac, RxJumboOctetsReceivedOK, RxJumboOctetsOK); | ||
481 | |||
482 | /* Tx stats */ | ||
483 | RMON_UPDATE(mac, TxOctetsTransmittedOK, TxOctetsOK); | ||
484 | RMON_UPDATE(mac, TxFramesLostDueToInternalMACTransmissionError, | ||
485 | TxInternalMACXmitError); | ||
486 | RMON_UPDATE(mac, TxTransmitSystemError, TxFCSErrors); | ||
487 | RMON_UPDATE(mac, TxUnicastFramesTransmittedOK, TxUnicastFramesOK); | ||
488 | RMON_UPDATE(mac, TxMulticastFramesTransmittedOK, TxMulticastFramesOK); | ||
489 | RMON_UPDATE(mac, TxBroadcastFramesTransmittedOK, TxBroadcastFramesOK); | ||
490 | RMON_UPDATE(mac, TxPAUSEMACCtrlFramesTransmitted, TxPauseFrames); | ||
491 | RMON_UPDATE(mac, TxJumboFramesReceivedOK, TxJumboFramesOK); | ||
492 | RMON_UPDATE(mac, TxJumboOctetsReceivedOK, TxJumboOctetsOK); | ||
515 | 493 | ||
516 | return &mac->stats; | 494 | return &mac->stats; |
517 | } | 495 | } |
diff --git a/drivers/net/chelsio/sge.c b/drivers/net/chelsio/sge.c index 443666292a5c..b301c0428ae0 100644 --- a/drivers/net/chelsio/sge.c +++ b/drivers/net/chelsio/sge.c | |||
@@ -986,11 +986,10 @@ void t1_sge_get_port_stats(const struct sge *sge, int port, | |||
986 | for_each_possible_cpu(cpu) { | 986 | for_each_possible_cpu(cpu) { |
987 | struct sge_port_stats *st = per_cpu_ptr(sge->port_stats[port], cpu); | 987 | struct sge_port_stats *st = per_cpu_ptr(sge->port_stats[port], cpu); |
988 | 988 | ||
989 | ss->rx_packets += st->rx_packets; | ||
990 | ss->rx_cso_good += st->rx_cso_good; | 989 | ss->rx_cso_good += st->rx_cso_good; |
991 | ss->tx_packets += st->tx_packets; | ||
992 | ss->tx_cso += st->tx_cso; | 990 | ss->tx_cso += st->tx_cso; |
993 | ss->tx_tso += st->tx_tso; | 991 | ss->tx_tso += st->tx_tso; |
992 | ss->tx_need_hdrroom += st->tx_need_hdrroom; | ||
994 | ss->vlan_xtract += st->vlan_xtract; | 993 | ss->vlan_xtract += st->vlan_xtract; |
995 | ss->vlan_insert += st->vlan_insert; | 994 | ss->vlan_insert += st->vlan_insert; |
996 | } | 995 | } |
@@ -1380,7 +1379,6 @@ static void sge_rx(struct sge *sge, struct freelQ *fl, unsigned int len) | |||
1380 | __skb_pull(skb, sizeof(*p)); | 1379 | __skb_pull(skb, sizeof(*p)); |
1381 | 1380 | ||
1382 | st = per_cpu_ptr(sge->port_stats[p->iff], smp_processor_id()); | 1381 | st = per_cpu_ptr(sge->port_stats[p->iff], smp_processor_id()); |
1383 | st->rx_packets++; | ||
1384 | 1382 | ||
1385 | skb->protocol = eth_type_trans(skb, adapter->port[p->iff].dev); | 1383 | skb->protocol = eth_type_trans(skb, adapter->port[p->iff].dev); |
1386 | skb->dev->last_rx = jiffies; | 1384 | skb->dev->last_rx = jiffies; |
@@ -1624,11 +1622,9 @@ int t1_poll(struct napi_struct *napi, int budget) | |||
1624 | { | 1622 | { |
1625 | struct adapter *adapter = container_of(napi, struct adapter, napi); | 1623 | struct adapter *adapter = container_of(napi, struct adapter, napi); |
1626 | struct net_device *dev = adapter->port[0].dev; | 1624 | struct net_device *dev = adapter->port[0].dev; |
1627 | int work_done; | 1625 | int work_done = process_responses(adapter, budget); |
1628 | |||
1629 | work_done = process_responses(adapter, budget); | ||
1630 | 1626 | ||
1631 | if (likely(!responses_pending(adapter))) { | 1627 | if (likely(work_done < budget)) { |
1632 | netif_rx_complete(dev, napi); | 1628 | netif_rx_complete(dev, napi); |
1633 | writel(adapter->sge->respQ.cidx, | 1629 | writel(adapter->sge->respQ.cidx, |
1634 | adapter->regs + A_SG_SLEEPING); | 1630 | adapter->regs + A_SG_SLEEPING); |
@@ -1848,7 +1844,8 @@ int t1_start_xmit(struct sk_buff *skb, struct net_device *dev) | |||
1848 | { | 1844 | { |
1849 | struct adapter *adapter = dev->priv; | 1845 | struct adapter *adapter = dev->priv; |
1850 | struct sge *sge = adapter->sge; | 1846 | struct sge *sge = adapter->sge; |
1851 | struct sge_port_stats *st = per_cpu_ptr(sge->port_stats[dev->if_port], smp_processor_id()); | 1847 | struct sge_port_stats *st = per_cpu_ptr(sge->port_stats[dev->if_port], |
1848 | smp_processor_id()); | ||
1852 | struct cpl_tx_pkt *cpl; | 1849 | struct cpl_tx_pkt *cpl; |
1853 | struct sk_buff *orig_skb = skb; | 1850 | struct sk_buff *orig_skb = skb; |
1854 | int ret; | 1851 | int ret; |
@@ -1856,6 +1853,18 @@ int t1_start_xmit(struct sk_buff *skb, struct net_device *dev) | |||
1856 | if (skb->protocol == htons(ETH_P_CPL5)) | 1853 | if (skb->protocol == htons(ETH_P_CPL5)) |
1857 | goto send; | 1854 | goto send; |
1858 | 1855 | ||
1856 | /* | ||
1857 | * We are using a non-standard hard_header_len. | ||
1858 | * Allocate more header room in the rare cases it is not big enough. | ||
1859 | */ | ||
1860 | if (unlikely(skb_headroom(skb) < dev->hard_header_len - ETH_HLEN)) { | ||
1861 | skb = skb_realloc_headroom(skb, sizeof(struct cpl_tx_pkt_lso)); | ||
1862 | ++st->tx_need_hdrroom; | ||
1863 | dev_kfree_skb_any(orig_skb); | ||
1864 | if (!skb) | ||
1865 | return NETDEV_TX_OK; | ||
1866 | } | ||
1867 | |||
1859 | if (skb_shinfo(skb)->gso_size) { | 1868 | if (skb_shinfo(skb)->gso_size) { |
1860 | int eth_type; | 1869 | int eth_type; |
1861 | struct cpl_tx_pkt_lso *hdr; | 1870 | struct cpl_tx_pkt_lso *hdr; |
@@ -1889,24 +1898,6 @@ int t1_start_xmit(struct sk_buff *skb, struct net_device *dev) | |||
1889 | return NETDEV_TX_OK; | 1898 | return NETDEV_TX_OK; |
1890 | } | 1899 | } |
1891 | 1900 | ||
1892 | /* | ||
1893 | * We are using a non-standard hard_header_len and some kernel | ||
1894 | * components, such as pktgen, do not handle it right. | ||
1895 | * Complain when this happens but try to fix things up. | ||
1896 | */ | ||
1897 | if (unlikely(skb_headroom(skb) < dev->hard_header_len - ETH_HLEN)) { | ||
1898 | pr_debug("%s: headroom %d header_len %d\n", dev->name, | ||
1899 | skb_headroom(skb), dev->hard_header_len); | ||
1900 | |||
1901 | if (net_ratelimit()) | ||
1902 | printk(KERN_ERR "%s: inadequate headroom in " | ||
1903 | "Tx packet\n", dev->name); | ||
1904 | skb = skb_realloc_headroom(skb, sizeof(*cpl)); | ||
1905 | dev_kfree_skb_any(orig_skb); | ||
1906 | if (!skb) | ||
1907 | return NETDEV_TX_OK; | ||
1908 | } | ||
1909 | |||
1910 | if (!(adapter->flags & UDP_CSUM_CAPABLE) && | 1901 | if (!(adapter->flags & UDP_CSUM_CAPABLE) && |
1911 | skb->ip_summed == CHECKSUM_PARTIAL && | 1902 | skb->ip_summed == CHECKSUM_PARTIAL && |
1912 | ip_hdr(skb)->protocol == IPPROTO_UDP) { | 1903 | ip_hdr(skb)->protocol == IPPROTO_UDP) { |
@@ -1952,7 +1943,6 @@ int t1_start_xmit(struct sk_buff *skb, struct net_device *dev) | |||
1952 | cpl->vlan_valid = 0; | 1943 | cpl->vlan_valid = 0; |
1953 | 1944 | ||
1954 | send: | 1945 | send: |
1955 | st->tx_packets++; | ||
1956 | dev->trans_start = jiffies; | 1946 | dev->trans_start = jiffies; |
1957 | ret = t1_sge_tx(skb, adapter, 0, dev); | 1947 | ret = t1_sge_tx(skb, adapter, 0, dev); |
1958 | 1948 | ||
diff --git a/drivers/net/chelsio/sge.h b/drivers/net/chelsio/sge.h index 713d9c55f24d..cced9dff91c5 100644 --- a/drivers/net/chelsio/sge.h +++ b/drivers/net/chelsio/sge.h | |||
@@ -57,13 +57,12 @@ struct sge_intr_counts { | |||
57 | }; | 57 | }; |
58 | 58 | ||
59 | struct sge_port_stats { | 59 | struct sge_port_stats { |
60 | u64 rx_packets; /* # of Ethernet packets received */ | ||
61 | u64 rx_cso_good; /* # of successful RX csum offloads */ | 60 | u64 rx_cso_good; /* # of successful RX csum offloads */ |
62 | u64 tx_packets; /* # of TX packets */ | ||
63 | u64 tx_cso; /* # of TX checksum offloads */ | 61 | u64 tx_cso; /* # of TX checksum offloads */ |
64 | u64 tx_tso; /* # of TSO requests */ | 62 | u64 tx_tso; /* # of TSO requests */ |
65 | u64 vlan_xtract; /* # of VLAN tag extractions */ | 63 | u64 vlan_xtract; /* # of VLAN tag extractions */ |
66 | u64 vlan_insert; /* # of VLAN tag insertions */ | 64 | u64 vlan_insert; /* # of VLAN tag insertions */ |
65 | u64 tx_need_hdrroom; /* # of TX skbs in need of more header room */ | ||
67 | }; | 66 | }; |
68 | 67 | ||
69 | struct sk_buff; | 68 | struct sk_buff; |
diff --git a/drivers/net/cxgb3/regs.h b/drivers/net/cxgb3/regs.h index 5e1bc0dec5f1..6e12bf4bc6cf 100644 --- a/drivers/net/cxgb3/regs.h +++ b/drivers/net/cxgb3/regs.h | |||
@@ -1937,6 +1937,10 @@ | |||
1937 | 1937 | ||
1938 | #define A_XGM_RXFIFO_CFG 0x884 | 1938 | #define A_XGM_RXFIFO_CFG 0x884 |
1939 | 1939 | ||
1940 | #define S_RXFIFO_EMPTY 31 | ||
1941 | #define V_RXFIFO_EMPTY(x) ((x) << S_RXFIFO_EMPTY) | ||
1942 | #define F_RXFIFO_EMPTY V_RXFIFO_EMPTY(1U) | ||
1943 | |||
1940 | #define S_RXFIFOPAUSEHWM 17 | 1944 | #define S_RXFIFOPAUSEHWM 17 |
1941 | #define M_RXFIFOPAUSEHWM 0xfff | 1945 | #define M_RXFIFOPAUSEHWM 0xfff |
1942 | 1946 | ||
@@ -1961,6 +1965,10 @@ | |||
1961 | 1965 | ||
1962 | #define A_XGM_TXFIFO_CFG 0x888 | 1966 | #define A_XGM_TXFIFO_CFG 0x888 |
1963 | 1967 | ||
1968 | #define S_UNDERUNFIX 22 | ||
1969 | #define V_UNDERUNFIX(x) ((x) << S_UNDERUNFIX) | ||
1970 | #define F_UNDERUNFIX V_UNDERUNFIX(1U) | ||
1971 | |||
1964 | #define S_TXIPG 13 | 1972 | #define S_TXIPG 13 |
1965 | #define M_TXIPG 0xff | 1973 | #define M_TXIPG 0xff |
1966 | #define V_TXIPG(x) ((x) << S_TXIPG) | 1974 | #define V_TXIPG(x) ((x) << S_TXIPG) |
@@ -2034,10 +2042,27 @@ | |||
2034 | #define V_XAUIIMP(x) ((x) << S_XAUIIMP) | 2042 | #define V_XAUIIMP(x) ((x) << S_XAUIIMP) |
2035 | 2043 | ||
2036 | #define A_XGM_RX_MAX_PKT_SIZE 0x8a8 | 2044 | #define A_XGM_RX_MAX_PKT_SIZE 0x8a8 |
2037 | #define A_XGM_RX_MAX_PKT_SIZE_ERR_CNT 0x9a4 | 2045 | |
2046 | #define S_RXMAXFRAMERSIZE 17 | ||
2047 | #define M_RXMAXFRAMERSIZE 0x3fff | ||
2048 | #define V_RXMAXFRAMERSIZE(x) ((x) << S_RXMAXFRAMERSIZE) | ||
2049 | #define G_RXMAXFRAMERSIZE(x) (((x) >> S_RXMAXFRAMERSIZE) & M_RXMAXFRAMERSIZE) | ||
2050 | |||
2051 | #define S_RXENFRAMER 14 | ||
2052 | #define V_RXENFRAMER(x) ((x) << S_RXENFRAMER) | ||
2053 | #define F_RXENFRAMER V_RXENFRAMER(1U) | ||
2054 | |||
2055 | #define S_RXMAXPKTSIZE 0 | ||
2056 | #define M_RXMAXPKTSIZE 0x3fff | ||
2057 | #define V_RXMAXPKTSIZE(x) ((x) << S_RXMAXPKTSIZE) | ||
2058 | #define G_RXMAXPKTSIZE(x) (((x) >> S_RXMAXPKTSIZE) & M_RXMAXPKTSIZE) | ||
2038 | 2059 | ||
2039 | #define A_XGM_RESET_CTRL 0x8ac | 2060 | #define A_XGM_RESET_CTRL 0x8ac |
2040 | 2061 | ||
2062 | #define S_XGMAC_STOP_EN 4 | ||
2063 | #define V_XGMAC_STOP_EN(x) ((x) << S_XGMAC_STOP_EN) | ||
2064 | #define F_XGMAC_STOP_EN V_XGMAC_STOP_EN(1U) | ||
2065 | |||
2041 | #define S_XG2G_RESET_ 3 | 2066 | #define S_XG2G_RESET_ 3 |
2042 | #define V_XG2G_RESET_(x) ((x) << S_XG2G_RESET_) | 2067 | #define V_XG2G_RESET_(x) ((x) << S_XG2G_RESET_) |
2043 | #define F_XG2G_RESET_ V_XG2G_RESET_(1U) | 2068 | #define F_XG2G_RESET_ V_XG2G_RESET_(1U) |
diff --git a/drivers/net/cxgb3/t3_hw.c b/drivers/net/cxgb3/t3_hw.c index d4ee00d32219..522834c42ae7 100644 --- a/drivers/net/cxgb3/t3_hw.c +++ b/drivers/net/cxgb3/t3_hw.c | |||
@@ -447,8 +447,8 @@ static const struct adapter_info t3_adap_info[] = { | |||
447 | &mi1_mdio_ops, "Chelsio T302"}, | 447 | &mi1_mdio_ops, "Chelsio T302"}, |
448 | {1, 0, 0, 0, | 448 | {1, 0, 0, 0, |
449 | F_GPIO1_OEN | F_GPIO6_OEN | F_GPIO7_OEN | F_GPIO10_OEN | | 449 | F_GPIO1_OEN | F_GPIO6_OEN | F_GPIO7_OEN | F_GPIO10_OEN | |
450 | F_GPIO1_OUT_VAL | F_GPIO6_OUT_VAL | F_GPIO10_OUT_VAL, 0, | 450 | F_GPIO11_OEN | F_GPIO1_OUT_VAL | F_GPIO6_OUT_VAL | F_GPIO10_OUT_VAL, |
451 | SUPPORTED_10000baseT_Full | SUPPORTED_AUI, | 451 | 0, SUPPORTED_10000baseT_Full | SUPPORTED_AUI, |
452 | &mi1_mdio_ext_ops, "Chelsio T310"}, | 452 | &mi1_mdio_ext_ops, "Chelsio T310"}, |
453 | {2, 0, 0, 0, | 453 | {2, 0, 0, 0, |
454 | F_GPIO1_OEN | F_GPIO2_OEN | F_GPIO4_OEN | F_GPIO5_OEN | F_GPIO6_OEN | | 454 | F_GPIO1_OEN | F_GPIO2_OEN | F_GPIO4_OEN | F_GPIO5_OEN | F_GPIO6_OEN | |
@@ -2613,7 +2613,7 @@ static void __devinit init_mtus(unsigned short mtus[]) | |||
2613 | * it can accomodate max size TCP/IP headers when SACK and timestamps | 2613 | * it can accomodate max size TCP/IP headers when SACK and timestamps |
2614 | * are enabled and still have at least 8 bytes of payload. | 2614 | * are enabled and still have at least 8 bytes of payload. |
2615 | */ | 2615 | */ |
2616 | mtus[1] = 88; | 2616 | mtus[0] = 88; |
2617 | mtus[1] = 88; | 2617 | mtus[1] = 88; |
2618 | mtus[2] = 256; | 2618 | mtus[2] = 256; |
2619 | mtus[3] = 512; | 2619 | mtus[3] = 512; |
diff --git a/drivers/net/cxgb3/xgmac.c b/drivers/net/cxgb3/xgmac.c index eeb766aeced9..efcf09a709cf 100644 --- a/drivers/net/cxgb3/xgmac.c +++ b/drivers/net/cxgb3/xgmac.c | |||
@@ -106,6 +106,7 @@ int t3_mac_reset(struct cmac *mac) | |||
106 | t3_set_reg_field(adap, A_XGM_RXFIFO_CFG + oft, | 106 | t3_set_reg_field(adap, A_XGM_RXFIFO_CFG + oft, |
107 | F_RXSTRFRWRD | F_DISERRFRAMES, | 107 | F_RXSTRFRWRD | F_DISERRFRAMES, |
108 | uses_xaui(adap) ? 0 : F_RXSTRFRWRD); | 108 | uses_xaui(adap) ? 0 : F_RXSTRFRWRD); |
109 | t3_set_reg_field(adap, A_XGM_TXFIFO_CFG + oft, 0, F_UNDERUNFIX); | ||
109 | 110 | ||
110 | if (uses_xaui(adap)) { | 111 | if (uses_xaui(adap)) { |
111 | if (adap->params.rev == 0) { | 112 | if (adap->params.rev == 0) { |
@@ -124,7 +125,11 @@ int t3_mac_reset(struct cmac *mac) | |||
124 | xaui_serdes_reset(mac); | 125 | xaui_serdes_reset(mac); |
125 | } | 126 | } |
126 | 127 | ||
127 | val = F_MAC_RESET_; | 128 | t3_set_reg_field(adap, A_XGM_RX_MAX_PKT_SIZE + oft, |
129 | V_RXMAXFRAMERSIZE(M_RXMAXFRAMERSIZE), | ||
130 | V_RXMAXFRAMERSIZE(MAX_FRAME_SIZE) | F_RXENFRAMER); | ||
131 | val = F_MAC_RESET_ | F_XGMAC_STOP_EN; | ||
132 | |||
128 | if (is_10G(adap)) | 133 | if (is_10G(adap)) |
129 | val |= F_PCS_RESET_; | 134 | val |= F_PCS_RESET_; |
130 | else if (uses_xaui(adap)) | 135 | else if (uses_xaui(adap)) |
@@ -313,8 +318,9 @@ static int rx_fifo_hwm(int mtu) | |||
313 | 318 | ||
314 | int t3_mac_set_mtu(struct cmac *mac, unsigned int mtu) | 319 | int t3_mac_set_mtu(struct cmac *mac, unsigned int mtu) |
315 | { | 320 | { |
316 | int hwm, lwm; | 321 | int hwm, lwm, divisor; |
317 | unsigned int thres, v; | 322 | int ipg; |
323 | unsigned int thres, v, reg; | ||
318 | struct adapter *adap = mac->adapter; | 324 | struct adapter *adap = mac->adapter; |
319 | 325 | ||
320 | /* | 326 | /* |
@@ -335,27 +341,32 @@ int t3_mac_set_mtu(struct cmac *mac, unsigned int mtu) | |||
335 | hwm = min(hwm, MAC_RXFIFO_SIZE - 8192); | 341 | hwm = min(hwm, MAC_RXFIFO_SIZE - 8192); |
336 | lwm = min(3 * (int)mtu, MAC_RXFIFO_SIZE / 4); | 342 | lwm = min(3 * (int)mtu, MAC_RXFIFO_SIZE / 4); |
337 | 343 | ||
338 | if (adap->params.rev == T3_REV_B2 && | 344 | if (adap->params.rev >= T3_REV_B2 && |
339 | (t3_read_reg(adap, A_XGM_RX_CTRL + mac->offset) & F_RXEN)) { | 345 | (t3_read_reg(adap, A_XGM_RX_CTRL + mac->offset) & F_RXEN)) { |
340 | disable_exact_filters(mac); | 346 | disable_exact_filters(mac); |
341 | v = t3_read_reg(adap, A_XGM_RX_CFG + mac->offset); | 347 | v = t3_read_reg(adap, A_XGM_RX_CFG + mac->offset); |
342 | t3_set_reg_field(adap, A_XGM_RX_CFG + mac->offset, | 348 | t3_set_reg_field(adap, A_XGM_RX_CFG + mac->offset, |
343 | F_ENHASHMCAST | F_COPYALLFRAMES, F_DISBCAST); | 349 | F_ENHASHMCAST | F_COPYALLFRAMES, F_DISBCAST); |
344 | 350 | ||
345 | /* drain rx FIFO */ | 351 | reg = adap->params.rev == T3_REV_B2 ? |
346 | if (t3_wait_op_done(adap, | 352 | A_XGM_RX_MAX_PKT_SIZE_ERR_CNT : A_XGM_RXFIFO_CFG; |
347 | A_XGM_RX_MAX_PKT_SIZE_ERR_CNT + | 353 | |
348 | mac->offset, | 354 | /* drain RX FIFO */ |
349 | 1 << 31, 1, 20, 5)) { | 355 | if (t3_wait_op_done(adap, reg + mac->offset, |
356 | F_RXFIFO_EMPTY, 1, 20, 5)) { | ||
350 | t3_write_reg(adap, A_XGM_RX_CFG + mac->offset, v); | 357 | t3_write_reg(adap, A_XGM_RX_CFG + mac->offset, v); |
351 | enable_exact_filters(mac); | 358 | enable_exact_filters(mac); |
352 | return -EIO; | 359 | return -EIO; |
353 | } | 360 | } |
354 | t3_write_reg(adap, A_XGM_RX_MAX_PKT_SIZE + mac->offset, mtu); | 361 | t3_set_reg_field(adap, A_XGM_RX_MAX_PKT_SIZE + mac->offset, |
362 | V_RXMAXPKTSIZE(M_RXMAXPKTSIZE), | ||
363 | V_RXMAXPKTSIZE(mtu)); | ||
355 | t3_write_reg(adap, A_XGM_RX_CFG + mac->offset, v); | 364 | t3_write_reg(adap, A_XGM_RX_CFG + mac->offset, v); |
356 | enable_exact_filters(mac); | 365 | enable_exact_filters(mac); |
357 | } else | 366 | } else |
358 | t3_write_reg(adap, A_XGM_RX_MAX_PKT_SIZE + mac->offset, mtu); | 367 | t3_set_reg_field(adap, A_XGM_RX_MAX_PKT_SIZE + mac->offset, |
368 | V_RXMAXPKTSIZE(M_RXMAXPKTSIZE), | ||
369 | V_RXMAXPKTSIZE(mtu)); | ||
359 | 370 | ||
360 | /* | 371 | /* |
361 | * Adjust the PAUSE frame watermarks. We always set the LWM, and the | 372 | * Adjust the PAUSE frame watermarks. We always set the LWM, and the |
@@ -379,13 +390,16 @@ int t3_mac_set_mtu(struct cmac *mac, unsigned int mtu) | |||
379 | thres /= 10; | 390 | thres /= 10; |
380 | thres = mtu > thres ? (mtu - thres + 7) / 8 : 0; | 391 | thres = mtu > thres ? (mtu - thres + 7) / 8 : 0; |
381 | thres = max(thres, 8U); /* need at least 8 */ | 392 | thres = max(thres, 8U); /* need at least 8 */ |
393 | ipg = (adap->params.rev == T3_REV_C) ? 0 : 1; | ||
382 | t3_set_reg_field(adap, A_XGM_TXFIFO_CFG + mac->offset, | 394 | t3_set_reg_field(adap, A_XGM_TXFIFO_CFG + mac->offset, |
383 | V_TXFIFOTHRESH(M_TXFIFOTHRESH) | V_TXIPG(M_TXIPG), | 395 | V_TXFIFOTHRESH(M_TXFIFOTHRESH) | V_TXIPG(M_TXIPG), |
384 | V_TXFIFOTHRESH(thres) | V_TXIPG(1)); | 396 | V_TXFIFOTHRESH(thres) | V_TXIPG(ipg)); |
385 | 397 | ||
386 | if (adap->params.rev > 0) | 398 | if (adap->params.rev > 0) { |
399 | divisor = (adap->params.rev == T3_REV_C) ? 64 : 8; | ||
387 | t3_write_reg(adap, A_XGM_PAUSE_TIMER + mac->offset, | 400 | t3_write_reg(adap, A_XGM_PAUSE_TIMER + mac->offset, |
388 | (hwm - lwm) * 4 / 8); | 401 | (hwm - lwm) * 4 / divisor); |
402 | } | ||
389 | t3_write_reg(adap, A_XGM_TX_PAUSE_QUANTA + mac->offset, | 403 | t3_write_reg(adap, A_XGM_TX_PAUSE_QUANTA + mac->offset, |
390 | MAC_RXFIFO_SIZE * 4 * 8 / 512); | 404 | MAC_RXFIFO_SIZE * 4 * 8 / 512); |
391 | return 0; | 405 | return 0; |
@@ -522,7 +536,7 @@ int t3b2_mac_watchdog_task(struct cmac *mac) | |||
522 | goto rxcheck; | 536 | goto rxcheck; |
523 | } | 537 | } |
524 | 538 | ||
525 | if ((tx_tcnt != mac->tx_tcnt) && (mac->tx_xcnt == 0)) { | 539 | if ((tx_tcnt != mac->tx_tcnt) && (mac->tx_xcnt == 0)) { |
526 | if (mac->toggle_cnt > 4) { | 540 | if (mac->toggle_cnt > 4) { |
527 | status = 2; | 541 | status = 2; |
528 | goto out; | 542 | goto out; |
diff --git a/drivers/net/e100.c b/drivers/net/e100.c index 3dbaec680b46..e1c8a0d023ea 100644 --- a/drivers/net/e100.c +++ b/drivers/net/e100.c | |||
@@ -2214,13 +2214,11 @@ static void e100_get_drvinfo(struct net_device *netdev, | |||
2214 | strcpy(info->bus_info, pci_name(nic->pdev)); | 2214 | strcpy(info->bus_info, pci_name(nic->pdev)); |
2215 | } | 2215 | } |
2216 | 2216 | ||
2217 | #define E100_PHY_REGS 0x1C | ||
2217 | static int e100_get_regs_len(struct net_device *netdev) | 2218 | static int e100_get_regs_len(struct net_device *netdev) |
2218 | { | 2219 | { |
2219 | struct nic *nic = netdev_priv(netdev); | 2220 | struct nic *nic = netdev_priv(netdev); |
2220 | #define E100_PHY_REGS 0x1C | 2221 | return 1 + E100_PHY_REGS + sizeof(nic->mem->dump_buf); |
2221 | #define E100_REGS_LEN 1 + E100_PHY_REGS + \ | ||
2222 | sizeof(nic->mem->dump_buf) / sizeof(u32) | ||
2223 | return E100_REGS_LEN * sizeof(u32); | ||
2224 | } | 2222 | } |
2225 | 2223 | ||
2226 | static void e100_get_regs(struct net_device *netdev, | 2224 | static void e100_get_regs(struct net_device *netdev, |
diff --git a/drivers/net/e1000/e1000_ethtool.c b/drivers/net/e1000/e1000_ethtool.c index 667f18bcc172..b83ccce8a9b7 100644 --- a/drivers/net/e1000/e1000_ethtool.c +++ b/drivers/net/e1000/e1000_ethtool.c | |||
@@ -1923,7 +1923,7 @@ e1000_get_strings(struct net_device *netdev, uint32_t stringset, uint8_t *data) | |||
1923 | switch (stringset) { | 1923 | switch (stringset) { |
1924 | case ETH_SS_TEST: | 1924 | case ETH_SS_TEST: |
1925 | memcpy(data, *e1000_gstrings_test, | 1925 | memcpy(data, *e1000_gstrings_test, |
1926 | E1000_TEST_LEN*ETH_GSTRING_LEN); | 1926 | sizeof(e1000_gstrings_test)); |
1927 | break; | 1927 | break; |
1928 | case ETH_SS_STATS: | 1928 | case ETH_SS_STATS: |
1929 | for (i = 0; i < E1000_GLOBAL_STATS_LEN; i++) { | 1929 | for (i = 0; i < E1000_GLOBAL_STATS_LEN; i++) { |
diff --git a/drivers/net/e1000/e1000_main.c b/drivers/net/e1000/e1000_main.c index cf39473ef90a..4f37506ad374 100644 --- a/drivers/net/e1000/e1000_main.c +++ b/drivers/net/e1000/e1000_main.c | |||
@@ -3942,7 +3942,7 @@ e1000_clean(struct napi_struct *napi, int budget) | |||
3942 | &work_done, budget); | 3942 | &work_done, budget); |
3943 | 3943 | ||
3944 | /* If no Tx and not enough Rx work done, exit the polling mode */ | 3944 | /* If no Tx and not enough Rx work done, exit the polling mode */ |
3945 | if ((!tx_cleaned && (work_done < budget)) || | 3945 | if ((!tx_cleaned && (work_done == 0)) || |
3946 | !netif_running(poll_dev)) { | 3946 | !netif_running(poll_dev)) { |
3947 | quit_polling: | 3947 | quit_polling: |
3948 | if (likely(adapter->itr_setting & 3)) | 3948 | if (likely(adapter->itr_setting & 3)) |
diff --git a/drivers/net/e1000e/ethtool.c b/drivers/net/e1000e/ethtool.c index 6a39784e7ee2..87f9da1b6b4e 100644 --- a/drivers/net/e1000e/ethtool.c +++ b/drivers/net/e1000e/ethtool.c | |||
@@ -1739,7 +1739,7 @@ static void e1000_get_strings(struct net_device *netdev, u32 stringset, | |||
1739 | switch (stringset) { | 1739 | switch (stringset) { |
1740 | case ETH_SS_TEST: | 1740 | case ETH_SS_TEST: |
1741 | memcpy(data, *e1000_gstrings_test, | 1741 | memcpy(data, *e1000_gstrings_test, |
1742 | E1000_TEST_LEN*ETH_GSTRING_LEN); | 1742 | sizeof(e1000_gstrings_test)); |
1743 | break; | 1743 | break; |
1744 | case ETH_SS_STATS: | 1744 | case ETH_SS_STATS: |
1745 | for (i = 0; i < E1000_GLOBAL_STATS_LEN; i++) { | 1745 | for (i = 0; i < E1000_GLOBAL_STATS_LEN; i++) { |
diff --git a/drivers/net/ehea/ehea.h b/drivers/net/ehea/ehea.h index f78e5bf7cb33..5f82a4647eee 100644 --- a/drivers/net/ehea/ehea.h +++ b/drivers/net/ehea/ehea.h | |||
@@ -40,7 +40,7 @@ | |||
40 | #include <asm/io.h> | 40 | #include <asm/io.h> |
41 | 41 | ||
42 | #define DRV_NAME "ehea" | 42 | #define DRV_NAME "ehea" |
43 | #define DRV_VERSION "EHEA_0080" | 43 | #define DRV_VERSION "EHEA_0083" |
44 | 44 | ||
45 | /* eHEA capability flags */ | 45 | /* eHEA capability flags */ |
46 | #define DLPAR_PORT_ADD_REM 1 | 46 | #define DLPAR_PORT_ADD_REM 1 |
diff --git a/drivers/net/ehea/ehea_main.c b/drivers/net/ehea/ehea_main.c index f0319f1e8e05..869e1604b16e 100644 --- a/drivers/net/ehea/ehea_main.c +++ b/drivers/net/ehea/ehea_main.c | |||
@@ -136,7 +136,7 @@ static struct net_device_stats *ehea_get_stats(struct net_device *dev) | |||
136 | struct ehea_port *port = netdev_priv(dev); | 136 | struct ehea_port *port = netdev_priv(dev); |
137 | struct net_device_stats *stats = &port->stats; | 137 | struct net_device_stats *stats = &port->stats; |
138 | struct hcp_ehea_port_cb2 *cb2; | 138 | struct hcp_ehea_port_cb2 *cb2; |
139 | u64 hret, rx_packets; | 139 | u64 hret, rx_packets, tx_packets; |
140 | int i; | 140 | int i; |
141 | 141 | ||
142 | memset(stats, 0, sizeof(*stats)); | 142 | memset(stats, 0, sizeof(*stats)); |
@@ -162,7 +162,11 @@ static struct net_device_stats *ehea_get_stats(struct net_device *dev) | |||
162 | for (i = 0; i < port->num_def_qps; i++) | 162 | for (i = 0; i < port->num_def_qps; i++) |
163 | rx_packets += port->port_res[i].rx_packets; | 163 | rx_packets += port->port_res[i].rx_packets; |
164 | 164 | ||
165 | stats->tx_packets = cb2->txucp + cb2->txmcp + cb2->txbcp; | 165 | tx_packets = 0; |
166 | for (i = 0; i < port->num_def_qps + port->num_add_tx_qps; i++) | ||
167 | tx_packets += port->port_res[i].tx_packets; | ||
168 | |||
169 | stats->tx_packets = tx_packets; | ||
166 | stats->multicast = cb2->rxmcp; | 170 | stats->multicast = cb2->rxmcp; |
167 | stats->rx_errors = cb2->rxuerr; | 171 | stats->rx_errors = cb2->rxuerr; |
168 | stats->rx_bytes = cb2->rxo; | 172 | stats->rx_bytes = cb2->rxo; |
@@ -406,11 +410,6 @@ static int ehea_treat_poll_error(struct ehea_port_res *pr, int rq, | |||
406 | if (cqe->status & EHEA_CQE_STAT_ERR_CRC) | 410 | if (cqe->status & EHEA_CQE_STAT_ERR_CRC) |
407 | pr->p_stats.err_frame_crc++; | 411 | pr->p_stats.err_frame_crc++; |
408 | 412 | ||
409 | if (netif_msg_rx_err(pr->port)) { | ||
410 | ehea_error("CQE Error for QP %d", pr->qp->init_attr.qp_nr); | ||
411 | ehea_dump(cqe, sizeof(*cqe), "CQE"); | ||
412 | } | ||
413 | |||
414 | if (rq == 2) { | 413 | if (rq == 2) { |
415 | *processed_rq2 += 1; | 414 | *processed_rq2 += 1; |
416 | skb = get_skb_by_index(pr->rq2_skba.arr, pr->rq2_skba.len, cqe); | 415 | skb = get_skb_by_index(pr->rq2_skba.arr, pr->rq2_skba.len, cqe); |
@@ -422,7 +421,11 @@ static int ehea_treat_poll_error(struct ehea_port_res *pr, int rq, | |||
422 | } | 421 | } |
423 | 422 | ||
424 | if (cqe->status & EHEA_CQE_STAT_FAT_ERR_MASK) { | 423 | if (cqe->status & EHEA_CQE_STAT_FAT_ERR_MASK) { |
425 | ehea_error("Critical receive error. Resetting port."); | 424 | if (netif_msg_rx_err(pr->port)) { |
425 | ehea_error("Critical receive error for QP %d. " | ||
426 | "Resetting port.", pr->qp->init_attr.qp_nr); | ||
427 | ehea_dump(cqe, sizeof(*cqe), "CQE"); | ||
428 | } | ||
426 | schedule_work(&pr->port->reset_task); | 429 | schedule_work(&pr->port->reset_task); |
427 | return 1; | 430 | return 1; |
428 | } | 431 | } |
@@ -2000,6 +2003,7 @@ static int ehea_start_xmit(struct sk_buff *skb, struct net_device *dev) | |||
2000 | } | 2003 | } |
2001 | 2004 | ||
2002 | ehea_post_swqe(pr->qp, swqe); | 2005 | ehea_post_swqe(pr->qp, swqe); |
2006 | pr->tx_packets++; | ||
2003 | 2007 | ||
2004 | if (unlikely(atomic_read(&pr->swqe_avail) <= 1)) { | 2008 | if (unlikely(atomic_read(&pr->swqe_avail) <= 1)) { |
2005 | spin_lock_irqsave(&pr->netif_queue, flags); | 2009 | spin_lock_irqsave(&pr->netif_queue, flags); |
diff --git a/drivers/net/ehea/ehea_qmr.h b/drivers/net/ehea/ehea_qmr.h index 562de0ebdd85..bc62d389c166 100644 --- a/drivers/net/ehea/ehea_qmr.h +++ b/drivers/net/ehea/ehea_qmr.h | |||
@@ -145,8 +145,8 @@ struct ehea_rwqe { | |||
145 | #define EHEA_CQE_VLAN_TAG_XTRACT 0x0400 | 145 | #define EHEA_CQE_VLAN_TAG_XTRACT 0x0400 |
146 | 146 | ||
147 | #define EHEA_CQE_TYPE_RQ 0x60 | 147 | #define EHEA_CQE_TYPE_RQ 0x60 |
148 | #define EHEA_CQE_STAT_ERR_MASK 0x720F | 148 | #define EHEA_CQE_STAT_ERR_MASK 0x700F |
149 | #define EHEA_CQE_STAT_FAT_ERR_MASK 0x1F | 149 | #define EHEA_CQE_STAT_FAT_ERR_MASK 0xF |
150 | #define EHEA_CQE_STAT_ERR_TCP 0x4000 | 150 | #define EHEA_CQE_STAT_ERR_TCP 0x4000 |
151 | #define EHEA_CQE_STAT_ERR_IP 0x2000 | 151 | #define EHEA_CQE_STAT_ERR_IP 0x2000 |
152 | #define EHEA_CQE_STAT_ERR_CRC 0x1000 | 152 | #define EHEA_CQE_STAT_ERR_CRC 0x1000 |
diff --git a/drivers/net/fec_mpc52xx.c b/drivers/net/fec_mpc52xx.c index a8a0ee220da6..79f7eade4773 100644 --- a/drivers/net/fec_mpc52xx.c +++ b/drivers/net/fec_mpc52xx.c | |||
@@ -422,7 +422,7 @@ static irqreturn_t mpc52xx_fec_rx_interrupt(int irq, void *dev_id) | |||
422 | 422 | ||
423 | rskb = bcom_retrieve_buffer(priv->rx_dmatsk, &status, | 423 | rskb = bcom_retrieve_buffer(priv->rx_dmatsk, &status, |
424 | (struct bcom_bd **)&bd); | 424 | (struct bcom_bd **)&bd); |
425 | dma_unmap_single(&dev->dev, bd->skb_pa, skb->len, DMA_FROM_DEVICE); | 425 | dma_unmap_single(&dev->dev, bd->skb_pa, rskb->len, DMA_FROM_DEVICE); |
426 | 426 | ||
427 | /* Test for errors in received frame */ | 427 | /* Test for errors in received frame */ |
428 | if (status & BCOM_FEC_RX_BD_ERRORS) { | 428 | if (status & BCOM_FEC_RX_BD_ERRORS) { |
@@ -467,7 +467,7 @@ static irqreturn_t mpc52xx_fec_rx_interrupt(int irq, void *dev_id) | |||
467 | bcom_prepare_next_buffer(priv->rx_dmatsk); | 467 | bcom_prepare_next_buffer(priv->rx_dmatsk); |
468 | 468 | ||
469 | bd->status = FEC_RX_BUFFER_SIZE; | 469 | bd->status = FEC_RX_BUFFER_SIZE; |
470 | bd->skb_pa = dma_map_single(&dev->dev, rskb->data, | 470 | bd->skb_pa = dma_map_single(&dev->dev, skb->data, |
471 | FEC_RX_BUFFER_SIZE, DMA_FROM_DEVICE); | 471 | FEC_RX_BUFFER_SIZE, DMA_FROM_DEVICE); |
472 | 472 | ||
473 | bcom_submit_next_buffer(priv->rx_dmatsk, skb); | 473 | bcom_submit_next_buffer(priv->rx_dmatsk, skb); |
@@ -971,6 +971,8 @@ mpc52xx_fec_probe(struct of_device *op, const struct of_device_id *match) | |||
971 | 971 | ||
972 | mpc52xx_fec_reset_stats(ndev); | 972 | mpc52xx_fec_reset_stats(ndev); |
973 | 973 | ||
974 | SET_NETDEV_DEV(ndev, &op->dev); | ||
975 | |||
974 | /* Register the new network device */ | 976 | /* Register the new network device */ |
975 | rv = register_netdev(ndev); | 977 | rv = register_netdev(ndev); |
976 | if (rv < 0) | 978 | if (rv < 0) |
diff --git a/drivers/net/forcedeth.c b/drivers/net/forcedeth.c index 92ce2e38f0d5..a96583cceb5e 100644 --- a/drivers/net/forcedeth.c +++ b/drivers/net/forcedeth.c | |||
@@ -5286,19 +5286,15 @@ static int __devinit nv_probe(struct pci_dev *pci_dev, const struct pci_device_i | |||
5286 | if (readl(base + NvRegTransmitterControl) & NVREG_XMITCTL_SYNC_PHY_INIT) { | 5286 | if (readl(base + NvRegTransmitterControl) & NVREG_XMITCTL_SYNC_PHY_INIT) { |
5287 | np->mac_in_use = readl(base + NvRegTransmitterControl) & NVREG_XMITCTL_MGMT_ST; | 5287 | np->mac_in_use = readl(base + NvRegTransmitterControl) & NVREG_XMITCTL_MGMT_ST; |
5288 | dprintk(KERN_INFO "%s: mgmt unit is running. mac in use %x.\n", pci_name(pci_dev), np->mac_in_use); | 5288 | dprintk(KERN_INFO "%s: mgmt unit is running. mac in use %x.\n", pci_name(pci_dev), np->mac_in_use); |
5289 | for (i = 0; i < 5000; i++) { | 5289 | if (nv_mgmt_acquire_sema(dev)) { |
5290 | msleep(1); | 5290 | /* management unit setup the phy already? */ |
5291 | if (nv_mgmt_acquire_sema(dev)) { | 5291 | if ((readl(base + NvRegTransmitterControl) & NVREG_XMITCTL_SYNC_MASK) == |
5292 | /* management unit setup the phy already? */ | 5292 | NVREG_XMITCTL_SYNC_PHY_INIT) { |
5293 | if ((readl(base + NvRegTransmitterControl) & NVREG_XMITCTL_SYNC_MASK) == | 5293 | /* phy is inited by mgmt unit */ |
5294 | NVREG_XMITCTL_SYNC_PHY_INIT) { | 5294 | phyinitialized = 1; |
5295 | /* phy is inited by mgmt unit */ | 5295 | dprintk(KERN_INFO "%s: Phy already initialized by mgmt unit.\n", pci_name(pci_dev)); |
5296 | phyinitialized = 1; | 5296 | } else { |
5297 | dprintk(KERN_INFO "%s: Phy already initialized by mgmt unit.\n", pci_name(pci_dev)); | 5297 | /* we need to init the phy */ |
5298 | } else { | ||
5299 | /* we need to init the phy */ | ||
5300 | } | ||
5301 | break; | ||
5302 | } | 5298 | } |
5303 | } | 5299 | } |
5304 | } | 5300 | } |
@@ -5613,6 +5609,22 @@ static struct pci_device_id pci_tbl[] = { | |||
5613 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_35), | 5609 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_35), |
5614 | .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_MSI|DEV_HAS_POWER_CNTRL|DEV_HAS_PAUSEFRAME_TX|DEV_HAS_STATISTICS_V2|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT, | 5610 | .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_MSI|DEV_HAS_POWER_CNTRL|DEV_HAS_PAUSEFRAME_TX|DEV_HAS_STATISTICS_V2|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT, |
5615 | }, | 5611 | }, |
5612 | { /* MCP79 Ethernet Controller */ | ||
5613 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_36), | ||
5614 | .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_MSI|DEV_HAS_POWER_CNTRL|DEV_HAS_PAUSEFRAME_TX|DEV_HAS_STATISTICS_V2|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT, | ||
5615 | }, | ||
5616 | { /* MCP79 Ethernet Controller */ | ||
5617 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_37), | ||
5618 | .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_MSI|DEV_HAS_POWER_CNTRL|DEV_HAS_PAUSEFRAME_TX|DEV_HAS_STATISTICS_V2|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT, | ||
5619 | }, | ||
5620 | { /* MCP79 Ethernet Controller */ | ||
5621 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_38), | ||
5622 | .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_MSI|DEV_HAS_POWER_CNTRL|DEV_HAS_PAUSEFRAME_TX|DEV_HAS_STATISTICS_V2|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT, | ||
5623 | }, | ||
5624 | { /* MCP79 Ethernet Controller */ | ||
5625 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_39), | ||
5626 | .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_MSI|DEV_HAS_POWER_CNTRL|DEV_HAS_PAUSEFRAME_TX|DEV_HAS_STATISTICS_V2|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT, | ||
5627 | }, | ||
5616 | {0,}, | 5628 | {0,}, |
5617 | }; | 5629 | }; |
5618 | 5630 | ||
diff --git a/drivers/net/gianfar.c b/drivers/net/gianfar.c index 38268d7335a8..0431e9ed0fac 100644 --- a/drivers/net/gianfar.c +++ b/drivers/net/gianfar.c | |||
@@ -696,7 +696,7 @@ int startup_gfar(struct net_device *dev) | |||
696 | { | 696 | { |
697 | struct txbd8 *txbdp; | 697 | struct txbd8 *txbdp; |
698 | struct rxbd8 *rxbdp; | 698 | struct rxbd8 *rxbdp; |
699 | dma_addr_t addr; | 699 | dma_addr_t addr = 0; |
700 | unsigned long vaddr; | 700 | unsigned long vaddr; |
701 | int i; | 701 | int i; |
702 | struct gfar_private *priv = netdev_priv(dev); | 702 | struct gfar_private *priv = netdev_priv(dev); |
diff --git a/drivers/net/ibm_newemac/core.c b/drivers/net/ibm_newemac/core.c index 0de3aa2a2e44..cb06280dced5 100644 --- a/drivers/net/ibm_newemac/core.c +++ b/drivers/net/ibm_newemac/core.c | |||
@@ -3,6 +3,11 @@ | |||
3 | * | 3 | * |
4 | * Driver for PowerPC 4xx on-chip ethernet controller. | 4 | * Driver for PowerPC 4xx on-chip ethernet controller. |
5 | * | 5 | * |
6 | * Copyright 2007 Benjamin Herrenschmidt, IBM Corp. | ||
7 | * <benh@kernel.crashing.org> | ||
8 | * | ||
9 | * Based on the arch/ppc version of the driver: | ||
10 | * | ||
6 | * Copyright (c) 2004, 2005 Zultys Technologies. | 11 | * Copyright (c) 2004, 2005 Zultys Technologies. |
7 | * Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net> | 12 | * Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net> |
8 | * | 13 | * |
@@ -402,7 +407,7 @@ static u32 __emac_calc_base_mr1(struct emac_instance *dev, int tx_size, int rx_s | |||
402 | static u32 __emac4_calc_base_mr1(struct emac_instance *dev, int tx_size, int rx_size) | 407 | static u32 __emac4_calc_base_mr1(struct emac_instance *dev, int tx_size, int rx_size) |
403 | { | 408 | { |
404 | u32 ret = EMAC_MR1_VLE | EMAC_MR1_IST | EMAC4_MR1_TR | | 409 | u32 ret = EMAC_MR1_VLE | EMAC_MR1_IST | EMAC4_MR1_TR | |
405 | EMAC4_MR1_OBCI(dev->opb_bus_freq); | 410 | EMAC4_MR1_OBCI(dev->opb_bus_freq / 1000000); |
406 | 411 | ||
407 | DBG2(dev, "__emac4_calc_base_mr1" NL); | 412 | DBG2(dev, "__emac4_calc_base_mr1" NL); |
408 | 413 | ||
@@ -464,26 +469,34 @@ static int emac_configure(struct emac_instance *dev) | |||
464 | { | 469 | { |
465 | struct emac_regs __iomem *p = dev->emacp; | 470 | struct emac_regs __iomem *p = dev->emacp; |
466 | struct net_device *ndev = dev->ndev; | 471 | struct net_device *ndev = dev->ndev; |
467 | int tx_size, rx_size; | 472 | int tx_size, rx_size, link = netif_carrier_ok(dev->ndev); |
468 | u32 r, mr1 = 0; | 473 | u32 r, mr1 = 0; |
469 | 474 | ||
470 | DBG(dev, "configure" NL); | 475 | DBG(dev, "configure" NL); |
471 | 476 | ||
472 | if (emac_reset(dev) < 0) | 477 | if (!link) { |
478 | out_be32(&p->mr1, in_be32(&p->mr1) | ||
479 | | EMAC_MR1_FDE | EMAC_MR1_ILE); | ||
480 | udelay(100); | ||
481 | } else if (emac_reset(dev) < 0) | ||
473 | return -ETIMEDOUT; | 482 | return -ETIMEDOUT; |
474 | 483 | ||
475 | if (emac_has_feature(dev, EMAC_FTR_HAS_TAH)) | 484 | if (emac_has_feature(dev, EMAC_FTR_HAS_TAH)) |
476 | tah_reset(dev->tah_dev); | 485 | tah_reset(dev->tah_dev); |
477 | 486 | ||
478 | DBG(dev, " duplex = %d, pause = %d, asym_pause = %d\n", | 487 | DBG(dev, " link = %d duplex = %d, pause = %d, asym_pause = %d\n", |
479 | dev->phy.duplex, dev->phy.pause, dev->phy.asym_pause); | 488 | link, dev->phy.duplex, dev->phy.pause, dev->phy.asym_pause); |
480 | 489 | ||
481 | /* Default fifo sizes */ | 490 | /* Default fifo sizes */ |
482 | tx_size = dev->tx_fifo_size; | 491 | tx_size = dev->tx_fifo_size; |
483 | rx_size = dev->rx_fifo_size; | 492 | rx_size = dev->rx_fifo_size; |
484 | 493 | ||
494 | /* No link, force loopback */ | ||
495 | if (!link) | ||
496 | mr1 = EMAC_MR1_FDE | EMAC_MR1_ILE; | ||
497 | |||
485 | /* Check for full duplex */ | 498 | /* Check for full duplex */ |
486 | if (dev->phy.duplex == DUPLEX_FULL) | 499 | else if (dev->phy.duplex == DUPLEX_FULL) |
487 | mr1 |= EMAC_MR1_FDE | EMAC_MR1_MWSW_001; | 500 | mr1 |= EMAC_MR1_FDE | EMAC_MR1_MWSW_001; |
488 | 501 | ||
489 | /* Adjust fifo sizes, mr1 and timeouts based on link speed */ | 502 | /* Adjust fifo sizes, mr1 and timeouts based on link speed */ |
@@ -642,9 +655,11 @@ static void emac_reset_work(struct work_struct *work) | |||
642 | DBG(dev, "reset_work" NL); | 655 | DBG(dev, "reset_work" NL); |
643 | 656 | ||
644 | mutex_lock(&dev->link_lock); | 657 | mutex_lock(&dev->link_lock); |
645 | emac_netif_stop(dev); | 658 | if (dev->opened) { |
646 | emac_full_tx_reset(dev); | 659 | emac_netif_stop(dev); |
647 | emac_netif_start(dev); | 660 | emac_full_tx_reset(dev); |
661 | emac_netif_start(dev); | ||
662 | } | ||
648 | mutex_unlock(&dev->link_lock); | 663 | mutex_unlock(&dev->link_lock); |
649 | } | 664 | } |
650 | 665 | ||
@@ -701,7 +716,7 @@ static int __emac_mdio_read(struct emac_instance *dev, u8 id, u8 reg) | |||
701 | r = EMAC_STACR_BASE(dev->opb_bus_freq); | 716 | r = EMAC_STACR_BASE(dev->opb_bus_freq); |
702 | if (emac_has_feature(dev, EMAC_FTR_STACR_OC_INVERT)) | 717 | if (emac_has_feature(dev, EMAC_FTR_STACR_OC_INVERT)) |
703 | r |= EMAC_STACR_OC; | 718 | r |= EMAC_STACR_OC; |
704 | if (emac_has_feature(dev, EMAC_FTR_HAS_AXON_STACR)) | 719 | if (emac_has_feature(dev, EMAC_FTR_HAS_NEW_STACR)) |
705 | r |= EMACX_STACR_STAC_READ; | 720 | r |= EMACX_STACR_STAC_READ; |
706 | else | 721 | else |
707 | r |= EMAC_STACR_STAC_READ; | 722 | r |= EMAC_STACR_STAC_READ; |
@@ -773,7 +788,7 @@ static void __emac_mdio_write(struct emac_instance *dev, u8 id, u8 reg, | |||
773 | r = EMAC_STACR_BASE(dev->opb_bus_freq); | 788 | r = EMAC_STACR_BASE(dev->opb_bus_freq); |
774 | if (emac_has_feature(dev, EMAC_FTR_STACR_OC_INVERT)) | 789 | if (emac_has_feature(dev, EMAC_FTR_STACR_OC_INVERT)) |
775 | r |= EMAC_STACR_OC; | 790 | r |= EMAC_STACR_OC; |
776 | if (emac_has_feature(dev, EMAC_FTR_HAS_AXON_STACR)) | 791 | if (emac_has_feature(dev, EMAC_FTR_HAS_NEW_STACR)) |
777 | r |= EMACX_STACR_STAC_WRITE; | 792 | r |= EMACX_STACR_STAC_WRITE; |
778 | else | 793 | else |
779 | r |= EMAC_STACR_STAC_WRITE; | 794 | r |= EMAC_STACR_STAC_WRITE; |
@@ -1063,10 +1078,9 @@ static int emac_open(struct net_device *ndev) | |||
1063 | dev->rx_sg_skb = NULL; | 1078 | dev->rx_sg_skb = NULL; |
1064 | 1079 | ||
1065 | mutex_lock(&dev->link_lock); | 1080 | mutex_lock(&dev->link_lock); |
1081 | dev->opened = 1; | ||
1066 | 1082 | ||
1067 | /* XXX Start PHY polling now. Shouldn't wr do like sungem instead and | 1083 | /* Start PHY polling now. |
1068 | * always poll the PHY even when the iface is down ? That would allow | ||
1069 | * things like laptop-net to work. --BenH | ||
1070 | */ | 1084 | */ |
1071 | if (dev->phy.address >= 0) { | 1085 | if (dev->phy.address >= 0) { |
1072 | int link_poll_interval; | 1086 | int link_poll_interval; |
@@ -1145,9 +1159,11 @@ static void emac_link_timer(struct work_struct *work) | |||
1145 | int link_poll_interval; | 1159 | int link_poll_interval; |
1146 | 1160 | ||
1147 | mutex_lock(&dev->link_lock); | 1161 | mutex_lock(&dev->link_lock); |
1148 | |||
1149 | DBG2(dev, "link timer" NL); | 1162 | DBG2(dev, "link timer" NL); |
1150 | 1163 | ||
1164 | if (!dev->opened) | ||
1165 | goto bail; | ||
1166 | |||
1151 | if (dev->phy.def->ops->poll_link(&dev->phy)) { | 1167 | if (dev->phy.def->ops->poll_link(&dev->phy)) { |
1152 | if (!netif_carrier_ok(dev->ndev)) { | 1168 | if (!netif_carrier_ok(dev->ndev)) { |
1153 | /* Get new link parameters */ | 1169 | /* Get new link parameters */ |
@@ -1162,21 +1178,22 @@ static void emac_link_timer(struct work_struct *work) | |||
1162 | link_poll_interval = PHY_POLL_LINK_ON; | 1178 | link_poll_interval = PHY_POLL_LINK_ON; |
1163 | } else { | 1179 | } else { |
1164 | if (netif_carrier_ok(dev->ndev)) { | 1180 | if (netif_carrier_ok(dev->ndev)) { |
1165 | emac_reinitialize(dev); | ||
1166 | netif_carrier_off(dev->ndev); | 1181 | netif_carrier_off(dev->ndev); |
1167 | netif_tx_disable(dev->ndev); | 1182 | netif_tx_disable(dev->ndev); |
1183 | emac_reinitialize(dev); | ||
1168 | emac_print_link_status(dev); | 1184 | emac_print_link_status(dev); |
1169 | } | 1185 | } |
1170 | link_poll_interval = PHY_POLL_LINK_OFF; | 1186 | link_poll_interval = PHY_POLL_LINK_OFF; |
1171 | } | 1187 | } |
1172 | schedule_delayed_work(&dev->link_work, link_poll_interval); | 1188 | schedule_delayed_work(&dev->link_work, link_poll_interval); |
1173 | 1189 | bail: | |
1174 | mutex_unlock(&dev->link_lock); | 1190 | mutex_unlock(&dev->link_lock); |
1175 | } | 1191 | } |
1176 | 1192 | ||
1177 | static void emac_force_link_update(struct emac_instance *dev) | 1193 | static void emac_force_link_update(struct emac_instance *dev) |
1178 | { | 1194 | { |
1179 | netif_carrier_off(dev->ndev); | 1195 | netif_carrier_off(dev->ndev); |
1196 | smp_rmb(); | ||
1180 | if (dev->link_polling) { | 1197 | if (dev->link_polling) { |
1181 | cancel_rearming_delayed_work(&dev->link_work); | 1198 | cancel_rearming_delayed_work(&dev->link_work); |
1182 | if (dev->link_polling) | 1199 | if (dev->link_polling) |
@@ -1191,11 +1208,14 @@ static int emac_close(struct net_device *ndev) | |||
1191 | 1208 | ||
1192 | DBG(dev, "close" NL); | 1209 | DBG(dev, "close" NL); |
1193 | 1210 | ||
1194 | if (dev->phy.address >= 0) | 1211 | if (dev->phy.address >= 0) { |
1212 | dev->link_polling = 0; | ||
1195 | cancel_rearming_delayed_work(&dev->link_work); | 1213 | cancel_rearming_delayed_work(&dev->link_work); |
1196 | 1214 | } | |
1215 | mutex_lock(&dev->link_lock); | ||
1197 | emac_netif_stop(dev); | 1216 | emac_netif_stop(dev); |
1198 | flush_scheduled_work(); | 1217 | dev->opened = 0; |
1218 | mutex_unlock(&dev->link_lock); | ||
1199 | 1219 | ||
1200 | emac_rx_disable(dev); | 1220 | emac_rx_disable(dev); |
1201 | emac_tx_disable(dev); | 1221 | emac_tx_disable(dev); |
@@ -2427,7 +2447,7 @@ static int __devinit emac_init_config(struct emac_instance *dev) | |||
2427 | if (emac_read_uint_prop(np, "tah-device", &dev->tah_ph, 0)) | 2447 | if (emac_read_uint_prop(np, "tah-device", &dev->tah_ph, 0)) |
2428 | dev->tah_ph = 0; | 2448 | dev->tah_ph = 0; |
2429 | if (emac_read_uint_prop(np, "tah-channel", &dev->tah_port, 0)) | 2449 | if (emac_read_uint_prop(np, "tah-channel", &dev->tah_port, 0)) |
2430 | dev->tah_ph = 0; | 2450 | dev->tah_port = 0; |
2431 | if (emac_read_uint_prop(np, "mdio-device", &dev->mdio_ph, 0)) | 2451 | if (emac_read_uint_prop(np, "mdio-device", &dev->mdio_ph, 0)) |
2432 | dev->mdio_ph = 0; | 2452 | dev->mdio_ph = 0; |
2433 | if (emac_read_uint_prop(np, "zmii-device", &dev->zmii_ph, 0)) | 2453 | if (emac_read_uint_prop(np, "zmii-device", &dev->zmii_ph, 0)) |
@@ -2465,16 +2485,19 @@ static int __devinit emac_init_config(struct emac_instance *dev) | |||
2465 | /* Check EMAC version */ | 2485 | /* Check EMAC version */ |
2466 | if (of_device_is_compatible(np, "ibm,emac4")) | 2486 | if (of_device_is_compatible(np, "ibm,emac4")) |
2467 | dev->features |= EMAC_FTR_EMAC4; | 2487 | dev->features |= EMAC_FTR_EMAC4; |
2468 | if (of_device_is_compatible(np, "ibm,emac-axon") | 2488 | |
2469 | || of_device_is_compatible(np, "ibm,emac-440epx")) | 2489 | /* Fixup some feature bits based on the device tree */ |
2470 | dev->features |= EMAC_FTR_HAS_AXON_STACR | 2490 | if (of_get_property(np, "has-inverted-stacr-oc", NULL)) |
2471 | | EMAC_FTR_STACR_OC_INVERT; | ||
2472 | if (of_device_is_compatible(np, "ibm,emac-440spe")) | ||
2473 | dev->features |= EMAC_FTR_STACR_OC_INVERT; | 2491 | dev->features |= EMAC_FTR_STACR_OC_INVERT; |
2492 | if (of_get_property(np, "has-new-stacr-staopc", NULL)) | ||
2493 | dev->features |= EMAC_FTR_HAS_NEW_STACR; | ||
2474 | 2494 | ||
2475 | /* Fixup some feature bits based on the device tree and verify | 2495 | /* CAB lacks the appropriate properties */ |
2476 | * we have support for them compiled in | 2496 | if (of_device_is_compatible(np, "ibm,emac-axon")) |
2477 | */ | 2497 | dev->features |= EMAC_FTR_HAS_NEW_STACR | |
2498 | EMAC_FTR_STACR_OC_INVERT; | ||
2499 | |||
2500 | /* Enable TAH/ZMII/RGMII features as found */ | ||
2478 | if (dev->tah_ph != 0) { | 2501 | if (dev->tah_ph != 0) { |
2479 | #ifdef CONFIG_IBM_NEW_EMAC_TAH | 2502 | #ifdef CONFIG_IBM_NEW_EMAC_TAH |
2480 | dev->features |= EMAC_FTR_HAS_TAH; | 2503 | dev->features |= EMAC_FTR_HAS_TAH; |
@@ -2532,6 +2555,10 @@ static int __devinit emac_probe(struct of_device *ofdev, | |||
2532 | struct device_node **blist = NULL; | 2555 | struct device_node **blist = NULL; |
2533 | int err, i; | 2556 | int err, i; |
2534 | 2557 | ||
2558 | /* Skip unused/unwired EMACS */ | ||
2559 | if (of_get_property(np, "unused", NULL)) | ||
2560 | return -ENODEV; | ||
2561 | |||
2535 | /* Find ourselves in the bootlist if we are there */ | 2562 | /* Find ourselves in the bootlist if we are there */ |
2536 | for (i = 0; i < EMAC_BOOT_LIST_SIZE; i++) | 2563 | for (i = 0; i < EMAC_BOOT_LIST_SIZE; i++) |
2537 | if (emac_boot_list[i] == np) | 2564 | if (emac_boot_list[i] == np) |
@@ -2756,6 +2783,8 @@ static int __devexit emac_remove(struct of_device *ofdev) | |||
2756 | 2783 | ||
2757 | unregister_netdev(dev->ndev); | 2784 | unregister_netdev(dev->ndev); |
2758 | 2785 | ||
2786 | flush_scheduled_work(); | ||
2787 | |||
2759 | if (emac_has_feature(dev, EMAC_FTR_HAS_TAH)) | 2788 | if (emac_has_feature(dev, EMAC_FTR_HAS_TAH)) |
2760 | tah_detach(dev->tah_dev, dev->tah_port); | 2789 | tah_detach(dev->tah_dev, dev->tah_port); |
2761 | if (emac_has_feature(dev, EMAC_FTR_HAS_RGMII)) | 2790 | if (emac_has_feature(dev, EMAC_FTR_HAS_RGMII)) |
diff --git a/drivers/net/ibm_newemac/core.h b/drivers/net/ibm_newemac/core.h index 4011803117ca..4e74d8287c65 100644 --- a/drivers/net/ibm_newemac/core.h +++ b/drivers/net/ibm_newemac/core.h | |||
@@ -3,6 +3,11 @@ | |||
3 | * | 3 | * |
4 | * Driver for PowerPC 4xx on-chip ethernet controller. | 4 | * Driver for PowerPC 4xx on-chip ethernet controller. |
5 | * | 5 | * |
6 | * Copyright 2007 Benjamin Herrenschmidt, IBM Corp. | ||
7 | * <benh@kernel.crashing.org> | ||
8 | * | ||
9 | * Based on the arch/ppc version of the driver: | ||
10 | * | ||
6 | * Copyright (c) 2004, 2005 Zultys Technologies. | 11 | * Copyright (c) 2004, 2005 Zultys Technologies. |
7 | * Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net> | 12 | * Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net> |
8 | * | 13 | * |
@@ -258,6 +263,7 @@ struct emac_instance { | |||
258 | int stop_timeout; /* in us */ | 263 | int stop_timeout; /* in us */ |
259 | int no_mcast; | 264 | int no_mcast; |
260 | int mcast_pending; | 265 | int mcast_pending; |
266 | int opened; | ||
261 | struct work_struct reset_work; | 267 | struct work_struct reset_work; |
262 | spinlock_t lock; | 268 | spinlock_t lock; |
263 | }; | 269 | }; |
@@ -292,9 +298,9 @@ struct emac_instance { | |||
292 | */ | 298 | */ |
293 | #define EMAC_FTR_HAS_RGMII 0x00000020 | 299 | #define EMAC_FTR_HAS_RGMII 0x00000020 |
294 | /* | 300 | /* |
295 | * Set if we have axon-type STACR | 301 | * Set if we have new type STACR with STAOPC |
296 | */ | 302 | */ |
297 | #define EMAC_FTR_HAS_AXON_STACR 0x00000040 | 303 | #define EMAC_FTR_HAS_NEW_STACR 0x00000040 |
298 | 304 | ||
299 | 305 | ||
300 | /* Right now, we don't quite handle the always/possible masks on the | 306 | /* Right now, we don't quite handle the always/possible masks on the |
@@ -306,7 +312,7 @@ enum { | |||
306 | 312 | ||
307 | EMAC_FTRS_POSSIBLE = | 313 | EMAC_FTRS_POSSIBLE = |
308 | #ifdef CONFIG_IBM_NEW_EMAC_EMAC4 | 314 | #ifdef CONFIG_IBM_NEW_EMAC_EMAC4 |
309 | EMAC_FTR_EMAC4 | EMAC_FTR_HAS_AXON_STACR | | 315 | EMAC_FTR_EMAC4 | EMAC_FTR_HAS_NEW_STACR | |
310 | EMAC_FTR_STACR_OC_INVERT | | 316 | EMAC_FTR_STACR_OC_INVERT | |
311 | #endif | 317 | #endif |
312 | #ifdef CONFIG_IBM_NEW_EMAC_TAH | 318 | #ifdef CONFIG_IBM_NEW_EMAC_TAH |
diff --git a/drivers/net/ibm_newemac/debug.c b/drivers/net/ibm_newemac/debug.c index 170524ee0f19..a2fc660ca5d4 100644 --- a/drivers/net/ibm_newemac/debug.c +++ b/drivers/net/ibm_newemac/debug.c | |||
@@ -3,6 +3,11 @@ | |||
3 | * | 3 | * |
4 | * Driver for PowerPC 4xx on-chip ethernet controller, debug print routines. | 4 | * Driver for PowerPC 4xx on-chip ethernet controller, debug print routines. |
5 | * | 5 | * |
6 | * Copyright 2007 Benjamin Herrenschmidt, IBM Corp. | ||
7 | * <benh@kernel.crashing.org> | ||
8 | * | ||
9 | * Based on the arch/ppc version of the driver: | ||
10 | * | ||
6 | * Copyright (c) 2004, 2005 Zultys Technologies | 11 | * Copyright (c) 2004, 2005 Zultys Technologies |
7 | * Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net> | 12 | * Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net> |
8 | * | 13 | * |
diff --git a/drivers/net/ibm_newemac/debug.h b/drivers/net/ibm_newemac/debug.h index 1dd2dcbc157f..b631842ec8d0 100644 --- a/drivers/net/ibm_newemac/debug.h +++ b/drivers/net/ibm_newemac/debug.h | |||
@@ -3,6 +3,11 @@ | |||
3 | * | 3 | * |
4 | * Driver for PowerPC 4xx on-chip ethernet controller, debug print routines. | 4 | * Driver for PowerPC 4xx on-chip ethernet controller, debug print routines. |
5 | * | 5 | * |
6 | * Copyright 2007 Benjamin Herrenschmidt, IBM Corp. | ||
7 | * <benh@kernel.crashing.org> | ||
8 | * | ||
9 | * Based on the arch/ppc version of the driver: | ||
10 | * | ||
6 | * Copyright (c) 2004, 2005 Zultys Technologies | 11 | * Copyright (c) 2004, 2005 Zultys Technologies |
7 | * Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net> | 12 | * Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net> |
8 | * | 13 | * |
diff --git a/drivers/net/ibm_newemac/emac.h b/drivers/net/ibm_newemac/emac.h index bef92efeeadc..91cb096ab405 100644 --- a/drivers/net/ibm_newemac/emac.h +++ b/drivers/net/ibm_newemac/emac.h | |||
@@ -3,6 +3,11 @@ | |||
3 | * | 3 | * |
4 | * Register definitions for PowerPC 4xx on-chip ethernet contoller | 4 | * Register definitions for PowerPC 4xx on-chip ethernet contoller |
5 | * | 5 | * |
6 | * Copyright 2007 Benjamin Herrenschmidt, IBM Corp. | ||
7 | * <benh@kernel.crashing.org> | ||
8 | * | ||
9 | * Based on the arch/ppc version of the driver: | ||
10 | * | ||
6 | * Copyright (c) 2004, 2005 Zultys Technologies. | 11 | * Copyright (c) 2004, 2005 Zultys Technologies. |
7 | * Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net> | 12 | * Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net> |
8 | * | 13 | * |
diff --git a/drivers/net/ibm_newemac/mal.c b/drivers/net/ibm_newemac/mal.c index 9a88f71db004..6869f08c9dcb 100644 --- a/drivers/net/ibm_newemac/mal.c +++ b/drivers/net/ibm_newemac/mal.c | |||
@@ -3,6 +3,11 @@ | |||
3 | * | 3 | * |
4 | * Memory Access Layer (MAL) support | 4 | * Memory Access Layer (MAL) support |
5 | * | 5 | * |
6 | * Copyright 2007 Benjamin Herrenschmidt, IBM Corp. | ||
7 | * <benh@kernel.crashing.org> | ||
8 | * | ||
9 | * Based on the arch/ppc version of the driver: | ||
10 | * | ||
6 | * Copyright (c) 2004, 2005 Zultys Technologies. | 11 | * Copyright (c) 2004, 2005 Zultys Technologies. |
7 | * Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net> | 12 | * Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net> |
8 | * | 13 | * |
diff --git a/drivers/net/ibm_newemac/mal.h b/drivers/net/ibm_newemac/mal.h index 784edb8ea822..eaa7262dc079 100644 --- a/drivers/net/ibm_newemac/mal.h +++ b/drivers/net/ibm_newemac/mal.h | |||
@@ -3,6 +3,11 @@ | |||
3 | * | 3 | * |
4 | * Memory Access Layer (MAL) support | 4 | * Memory Access Layer (MAL) support |
5 | * | 5 | * |
6 | * Copyright 2007 Benjamin Herrenschmidt, IBM Corp. | ||
7 | * <benh@kernel.crashing.org> | ||
8 | * | ||
9 | * Based on the arch/ppc version of the driver: | ||
10 | * | ||
6 | * Copyright (c) 2004, 2005 Zultys Technologies. | 11 | * Copyright (c) 2004, 2005 Zultys Technologies. |
7 | * Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net> | 12 | * Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net> |
8 | * | 13 | * |
diff --git a/drivers/net/ibm_newemac/phy.c b/drivers/net/ibm_newemac/phy.c index aa1f0ddf1e3e..37bfeea8788a 100644 --- a/drivers/net/ibm_newemac/phy.c +++ b/drivers/net/ibm_newemac/phy.c | |||
@@ -8,6 +8,11 @@ | |||
8 | * This file should be shared with other drivers or eventually | 8 | * This file should be shared with other drivers or eventually |
9 | * merged as the "low level" part of miilib | 9 | * merged as the "low level" part of miilib |
10 | * | 10 | * |
11 | * Copyright 2007 Benjamin Herrenschmidt, IBM Corp. | ||
12 | * <benh@kernel.crashing.org> | ||
13 | * | ||
14 | * Based on the arch/ppc version of the driver: | ||
15 | * | ||
11 | * (c) 2003, Benjamin Herrenscmidt (benh@kernel.crashing.org) | 16 | * (c) 2003, Benjamin Herrenscmidt (benh@kernel.crashing.org) |
12 | * (c) 2004-2005, Eugene Surovegin <ebs@ebshome.net> | 17 | * (c) 2004-2005, Eugene Surovegin <ebs@ebshome.net> |
13 | * | 18 | * |
@@ -306,8 +311,84 @@ static struct mii_phy_def cis8201_phy_def = { | |||
306 | .ops = &cis8201_phy_ops | 311 | .ops = &cis8201_phy_ops |
307 | }; | 312 | }; |
308 | 313 | ||
314 | static struct mii_phy_def bcm5248_phy_def = { | ||
315 | |||
316 | .phy_id = 0x0143bc00, | ||
317 | .phy_id_mask = 0x0ffffff0, | ||
318 | .name = "BCM5248 10/100 SMII Ethernet", | ||
319 | .ops = &generic_phy_ops | ||
320 | }; | ||
321 | |||
322 | static int m88e1111_init(struct mii_phy *phy) | ||
323 | { | ||
324 | pr_debug("%s: Marvell 88E1111 Ethernet\n", __FUNCTION__); | ||
325 | phy_write(phy, 0x14, 0x0ce3); | ||
326 | phy_write(phy, 0x18, 0x4101); | ||
327 | phy_write(phy, 0x09, 0x0e00); | ||
328 | phy_write(phy, 0x04, 0x01e1); | ||
329 | phy_write(phy, 0x00, 0x9140); | ||
330 | phy_write(phy, 0x00, 0x1140); | ||
331 | |||
332 | return 0; | ||
333 | } | ||
334 | |||
335 | static int et1011c_init(struct mii_phy *phy) | ||
336 | { | ||
337 | u16 reg_short; | ||
338 | |||
339 | reg_short = (u16)(phy_read(phy, 0x16)); | ||
340 | reg_short &= ~(0x7); | ||
341 | reg_short |= 0x6; /* RGMII Trace Delay*/ | ||
342 | phy_write(phy, 0x16, reg_short); | ||
343 | |||
344 | reg_short = (u16)(phy_read(phy, 0x17)); | ||
345 | reg_short &= ~(0x40); | ||
346 | phy_write(phy, 0x17, reg_short); | ||
347 | |||
348 | phy_write(phy, 0x1c, 0x74f0); | ||
349 | return 0; | ||
350 | } | ||
351 | |||
352 | static struct mii_phy_ops et1011c_phy_ops = { | ||
353 | .init = et1011c_init, | ||
354 | .setup_aneg = genmii_setup_aneg, | ||
355 | .setup_forced = genmii_setup_forced, | ||
356 | .poll_link = genmii_poll_link, | ||
357 | .read_link = genmii_read_link | ||
358 | }; | ||
359 | |||
360 | static struct mii_phy_def et1011c_phy_def = { | ||
361 | .phy_id = 0x0282f000, | ||
362 | .phy_id_mask = 0x0fffff00, | ||
363 | .name = "ET1011C Gigabit Ethernet", | ||
364 | .ops = &et1011c_phy_ops | ||
365 | }; | ||
366 | |||
367 | |||
368 | |||
369 | |||
370 | |||
371 | static struct mii_phy_ops m88e1111_phy_ops = { | ||
372 | .init = m88e1111_init, | ||
373 | .setup_aneg = genmii_setup_aneg, | ||
374 | .setup_forced = genmii_setup_forced, | ||
375 | .poll_link = genmii_poll_link, | ||
376 | .read_link = genmii_read_link | ||
377 | }; | ||
378 | |||
379 | static struct mii_phy_def m88e1111_phy_def = { | ||
380 | |||
381 | .phy_id = 0x01410CC0, | ||
382 | .phy_id_mask = 0x0ffffff0, | ||
383 | .name = "Marvell 88E1111 Ethernet", | ||
384 | .ops = &m88e1111_phy_ops, | ||
385 | }; | ||
386 | |||
309 | static struct mii_phy_def *mii_phy_table[] = { | 387 | static struct mii_phy_def *mii_phy_table[] = { |
388 | &et1011c_phy_def, | ||
310 | &cis8201_phy_def, | 389 | &cis8201_phy_def, |
390 | &bcm5248_phy_def, | ||
391 | &m88e1111_phy_def, | ||
311 | &genmii_phy_def, | 392 | &genmii_phy_def, |
312 | NULL | 393 | NULL |
313 | }; | 394 | }; |
diff --git a/drivers/net/ibm_newemac/phy.h b/drivers/net/ibm_newemac/phy.h index 6feca26afedb..1b65c81f6557 100644 --- a/drivers/net/ibm_newemac/phy.h +++ b/drivers/net/ibm_newemac/phy.h | |||
@@ -3,6 +3,11 @@ | |||
3 | * | 3 | * |
4 | * Driver for PowerPC 4xx on-chip ethernet controller, PHY support | 4 | * Driver for PowerPC 4xx on-chip ethernet controller, PHY support |
5 | * | 5 | * |
6 | * Copyright 2007 Benjamin Herrenschmidt, IBM Corp. | ||
7 | * <benh@kernel.crashing.org> | ||
8 | * | ||
9 | * Based on the arch/ppc version of the driver: | ||
10 | * | ||
6 | * Benjamin Herrenschmidt <benh@kernel.crashing.org> | 11 | * Benjamin Herrenschmidt <benh@kernel.crashing.org> |
7 | * February 2003 | 12 | * February 2003 |
8 | * | 13 | * |
diff --git a/drivers/net/ibm_newemac/rgmii.c b/drivers/net/ibm_newemac/rgmii.c index de416951a435..9bc1132fa788 100644 --- a/drivers/net/ibm_newemac/rgmii.c +++ b/drivers/net/ibm_newemac/rgmii.c | |||
@@ -3,6 +3,11 @@ | |||
3 | * | 3 | * |
4 | * Driver for PowerPC 4xx on-chip ethernet controller, RGMII bridge support. | 4 | * Driver for PowerPC 4xx on-chip ethernet controller, RGMII bridge support. |
5 | * | 5 | * |
6 | * Copyright 2007 Benjamin Herrenschmidt, IBM Corp. | ||
7 | * <benh@kernel.crashing.org> | ||
8 | * | ||
9 | * Based on the arch/ppc version of the driver: | ||
10 | * | ||
6 | * Copyright (c) 2004, 2005 Zultys Technologies. | 11 | * Copyright (c) 2004, 2005 Zultys Technologies. |
7 | * Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net> | 12 | * Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net> |
8 | * | 13 | * |
@@ -140,7 +145,7 @@ void rgmii_get_mdio(struct of_device *ofdev, int input) | |||
140 | 145 | ||
141 | RGMII_DBG2(dev, "get_mdio(%d)" NL, input); | 146 | RGMII_DBG2(dev, "get_mdio(%d)" NL, input); |
142 | 147 | ||
143 | if (dev->type != RGMII_AXON) | 148 | if (!(dev->flags & EMAC_RGMII_FLAG_HAS_MDIO)) |
144 | return; | 149 | return; |
145 | 150 | ||
146 | mutex_lock(&dev->lock); | 151 | mutex_lock(&dev->lock); |
@@ -161,7 +166,7 @@ void rgmii_put_mdio(struct of_device *ofdev, int input) | |||
161 | 166 | ||
162 | RGMII_DBG2(dev, "put_mdio(%d)" NL, input); | 167 | RGMII_DBG2(dev, "put_mdio(%d)" NL, input); |
163 | 168 | ||
164 | if (dev->type != RGMII_AXON) | 169 | if (!(dev->flags & EMAC_RGMII_FLAG_HAS_MDIO)) |
165 | return; | 170 | return; |
166 | 171 | ||
167 | fer = in_be32(&p->fer); | 172 | fer = in_be32(&p->fer); |
@@ -250,11 +255,13 @@ static int __devinit rgmii_probe(struct of_device *ofdev, | |||
250 | goto err_free; | 255 | goto err_free; |
251 | } | 256 | } |
252 | 257 | ||
253 | /* Check for RGMII type */ | 258 | /* Check for RGMII flags */ |
259 | if (of_get_property(ofdev->node, "has-mdio", NULL)) | ||
260 | dev->flags |= EMAC_RGMII_FLAG_HAS_MDIO; | ||
261 | |||
262 | /* CAB lacks the right properties, fix this up */ | ||
254 | if (of_device_is_compatible(ofdev->node, "ibm,rgmii-axon")) | 263 | if (of_device_is_compatible(ofdev->node, "ibm,rgmii-axon")) |
255 | dev->type = RGMII_AXON; | 264 | dev->flags |= EMAC_RGMII_FLAG_HAS_MDIO; |
256 | else | ||
257 | dev->type = RGMII_STANDARD; | ||
258 | 265 | ||
259 | DBG2(dev, " Boot FER = 0x%08x, SSR = 0x%08x\n", | 266 | DBG2(dev, " Boot FER = 0x%08x, SSR = 0x%08x\n", |
260 | in_be32(&dev->base->fer), in_be32(&dev->base->ssr)); | 267 | in_be32(&dev->base->fer), in_be32(&dev->base->ssr)); |
@@ -263,9 +270,9 @@ static int __devinit rgmii_probe(struct of_device *ofdev, | |||
263 | out_be32(&dev->base->fer, 0); | 270 | out_be32(&dev->base->fer, 0); |
264 | 271 | ||
265 | printk(KERN_INFO | 272 | printk(KERN_INFO |
266 | "RGMII %s %s initialized\n", | 273 | "RGMII %s initialized with%s MDIO support\n", |
267 | dev->type == RGMII_STANDARD ? "standard" : "axon", | 274 | ofdev->node->full_name, |
268 | ofdev->node->full_name); | 275 | (dev->flags & EMAC_RGMII_FLAG_HAS_MDIO) ? "" : "out"); |
269 | 276 | ||
270 | wmb(); | 277 | wmb(); |
271 | dev_set_drvdata(&ofdev->dev, dev); | 278 | dev_set_drvdata(&ofdev->dev, dev); |
diff --git a/drivers/net/ibm_newemac/rgmii.h b/drivers/net/ibm_newemac/rgmii.h index 57806833121e..c4a4b358a270 100644 --- a/drivers/net/ibm_newemac/rgmii.h +++ b/drivers/net/ibm_newemac/rgmii.h | |||
@@ -3,6 +3,11 @@ | |||
3 | * | 3 | * |
4 | * Driver for PowerPC 4xx on-chip ethernet controller, RGMII bridge support. | 4 | * Driver for PowerPC 4xx on-chip ethernet controller, RGMII bridge support. |
5 | * | 5 | * |
6 | * Copyright 2007 Benjamin Herrenschmidt, IBM Corp. | ||
7 | * <benh@kernel.crashing.org> | ||
8 | * | ||
9 | * Based on the arch/ppc version of the driver: | ||
10 | * | ||
6 | * Based on ocp_zmii.h/ibm_emac_zmii.h | 11 | * Based on ocp_zmii.h/ibm_emac_zmii.h |
7 | * Armin Kuster akuster@mvista.com | 12 | * Armin Kuster akuster@mvista.com |
8 | * | 13 | * |
@@ -35,8 +40,9 @@ struct rgmii_regs { | |||
35 | struct rgmii_instance { | 40 | struct rgmii_instance { |
36 | struct rgmii_regs __iomem *base; | 41 | struct rgmii_regs __iomem *base; |
37 | 42 | ||
38 | /* Type of RGMII bridge */ | 43 | /* RGMII bridge flags */ |
39 | int type; | 44 | int flags; |
45 | #define EMAC_RGMII_FLAG_HAS_MDIO 0x00000001 | ||
40 | 46 | ||
41 | /* Only one EMAC whacks us at a time */ | 47 | /* Only one EMAC whacks us at a time */ |
42 | struct mutex lock; | 48 | struct mutex lock; |
diff --git a/drivers/net/ibm_newemac/tah.c b/drivers/net/ibm_newemac/tah.c index f161fb100e8e..96417adec326 100644 --- a/drivers/net/ibm_newemac/tah.c +++ b/drivers/net/ibm_newemac/tah.c | |||
@@ -3,6 +3,11 @@ | |||
3 | * | 3 | * |
4 | * Driver for PowerPC 4xx on-chip ethernet controller, TAH support. | 4 | * Driver for PowerPC 4xx on-chip ethernet controller, TAH support. |
5 | * | 5 | * |
6 | * Copyright 2007 Benjamin Herrenschmidt, IBM Corp. | ||
7 | * <benh@kernel.crashing.org> | ||
8 | * | ||
9 | * Based on the arch/ppc version of the driver: | ||
10 | * | ||
6 | * Copyright 2004 MontaVista Software, Inc. | 11 | * Copyright 2004 MontaVista Software, Inc. |
7 | * Matt Porter <mporter@kernel.crashing.org> | 12 | * Matt Porter <mporter@kernel.crashing.org> |
8 | * | 13 | * |
@@ -116,13 +121,14 @@ static int __devinit tah_probe(struct of_device *ofdev, | |||
116 | goto err_free; | 121 | goto err_free; |
117 | } | 122 | } |
118 | 123 | ||
124 | dev_set_drvdata(&ofdev->dev, dev); | ||
125 | |||
119 | /* Initialize TAH and enable IPv4 checksum verification, no TSO yet */ | 126 | /* Initialize TAH and enable IPv4 checksum verification, no TSO yet */ |
120 | tah_reset(ofdev); | 127 | tah_reset(ofdev); |
121 | 128 | ||
122 | printk(KERN_INFO | 129 | printk(KERN_INFO |
123 | "TAH %s initialized\n", ofdev->node->full_name); | 130 | "TAH %s initialized\n", ofdev->node->full_name); |
124 | wmb(); | 131 | wmb(); |
125 | dev_set_drvdata(&ofdev->dev, dev); | ||
126 | 132 | ||
127 | return 0; | 133 | return 0; |
128 | 134 | ||
diff --git a/drivers/net/ibm_newemac/tah.h b/drivers/net/ibm_newemac/tah.h index bc41853b6e26..a068b5658dad 100644 --- a/drivers/net/ibm_newemac/tah.h +++ b/drivers/net/ibm_newemac/tah.h | |||
@@ -3,6 +3,11 @@ | |||
3 | * | 3 | * |
4 | * Driver for PowerPC 4xx on-chip ethernet controller, TAH support. | 4 | * Driver for PowerPC 4xx on-chip ethernet controller, TAH support. |
5 | * | 5 | * |
6 | * Copyright 2007 Benjamin Herrenschmidt, IBM Corp. | ||
7 | * <benh@kernel.crashing.org> | ||
8 | * | ||
9 | * Based on the arch/ppc version of the driver: | ||
10 | * | ||
6 | * Copyright 2004 MontaVista Software, Inc. | 11 | * Copyright 2004 MontaVista Software, Inc. |
7 | * Matt Porter <mporter@kernel.crashing.org> | 12 | * Matt Porter <mporter@kernel.crashing.org> |
8 | * | 13 | * |
diff --git a/drivers/net/ibm_newemac/zmii.c b/drivers/net/ibm_newemac/zmii.c index 2219ec2740e0..2ea472aeab06 100644 --- a/drivers/net/ibm_newemac/zmii.c +++ b/drivers/net/ibm_newemac/zmii.c | |||
@@ -3,6 +3,11 @@ | |||
3 | * | 3 | * |
4 | * Driver for PowerPC 4xx on-chip ethernet controller, ZMII bridge support. | 4 | * Driver for PowerPC 4xx on-chip ethernet controller, ZMII bridge support. |
5 | * | 5 | * |
6 | * Copyright 2007 Benjamin Herrenschmidt, IBM Corp. | ||
7 | * <benh@kernel.crashing.org> | ||
8 | * | ||
9 | * Based on the arch/ppc version of the driver: | ||
10 | * | ||
6 | * Copyright (c) 2004, 2005 Zultys Technologies. | 11 | * Copyright (c) 2004, 2005 Zultys Technologies. |
7 | * Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net> | 12 | * Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net> |
8 | * | 13 | * |
@@ -83,12 +88,14 @@ int __devinit zmii_attach(struct of_device *ofdev, int input, int *mode) | |||
83 | 88 | ||
84 | ZMII_DBG(dev, "init(%d, %d)" NL, input, *mode); | 89 | ZMII_DBG(dev, "init(%d, %d)" NL, input, *mode); |
85 | 90 | ||
86 | if (!zmii_valid_mode(*mode)) | 91 | if (!zmii_valid_mode(*mode)) { |
87 | /* Probably an EMAC connected to RGMII, | 92 | /* Probably an EMAC connected to RGMII, |
88 | * but it still may need ZMII for MDIO so | 93 | * but it still may need ZMII for MDIO so |
89 | * we don't fail here. | 94 | * we don't fail here. |
90 | */ | 95 | */ |
96 | dev->users++; | ||
91 | return 0; | 97 | return 0; |
98 | } | ||
92 | 99 | ||
93 | mutex_lock(&dev->lock); | 100 | mutex_lock(&dev->lock); |
94 | 101 | ||
diff --git a/drivers/net/ibm_newemac/zmii.h b/drivers/net/ibm_newemac/zmii.h index 82a9968b1f74..6c9beba0c4b6 100644 --- a/drivers/net/ibm_newemac/zmii.h +++ b/drivers/net/ibm_newemac/zmii.h | |||
@@ -3,6 +3,11 @@ | |||
3 | * | 3 | * |
4 | * Driver for PowerPC 4xx on-chip ethernet controller, ZMII bridge support. | 4 | * Driver for PowerPC 4xx on-chip ethernet controller, ZMII bridge support. |
5 | * | 5 | * |
6 | * Copyright 2007 Benjamin Herrenschmidt, IBM Corp. | ||
7 | * <benh@kernel.crashing.org> | ||
8 | * | ||
9 | * Based on the arch/ppc version of the driver: | ||
10 | * | ||
6 | * Copyright (c) 2004, 2005 Zultys Technologies. | 11 | * Copyright (c) 2004, 2005 Zultys Technologies. |
7 | * Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net> | 12 | * Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net> |
8 | * | 13 | * |
diff --git a/drivers/net/lib82596.c b/drivers/net/lib82596.c index 9a855e512147..b59f442bbf36 100644 --- a/drivers/net/lib82596.c +++ b/drivers/net/lib82596.c | |||
@@ -176,8 +176,8 @@ struct i596_reg { | |||
176 | struct i596_tbd { | 176 | struct i596_tbd { |
177 | unsigned short size; | 177 | unsigned short size; |
178 | unsigned short pad; | 178 | unsigned short pad; |
179 | dma_addr_t next; | 179 | u32 next; |
180 | dma_addr_t data; | 180 | u32 data; |
181 | u32 cache_pad[5]; /* Total 32 bytes... */ | 181 | u32 cache_pad[5]; /* Total 32 bytes... */ |
182 | }; | 182 | }; |
183 | 183 | ||
@@ -195,12 +195,12 @@ struct i596_cmd { | |||
195 | struct i596_cmd *v_next; /* Address from CPUs viewpoint */ | 195 | struct i596_cmd *v_next; /* Address from CPUs viewpoint */ |
196 | unsigned short status; | 196 | unsigned short status; |
197 | unsigned short command; | 197 | unsigned short command; |
198 | dma_addr_t b_next; /* Address from i596 viewpoint */ | 198 | u32 b_next; /* Address from i596 viewpoint */ |
199 | }; | 199 | }; |
200 | 200 | ||
201 | struct tx_cmd { | 201 | struct tx_cmd { |
202 | struct i596_cmd cmd; | 202 | struct i596_cmd cmd; |
203 | dma_addr_t tbd; | 203 | u32 tbd; |
204 | unsigned short size; | 204 | unsigned short size; |
205 | unsigned short pad; | 205 | unsigned short pad; |
206 | struct sk_buff *skb; /* So we can free it after tx */ | 206 | struct sk_buff *skb; /* So we can free it after tx */ |
@@ -237,8 +237,8 @@ struct cf_cmd { | |||
237 | struct i596_rfd { | 237 | struct i596_rfd { |
238 | unsigned short stat; | 238 | unsigned short stat; |
239 | unsigned short cmd; | 239 | unsigned short cmd; |
240 | dma_addr_t b_next; /* Address from i596 viewpoint */ | 240 | u32 b_next; /* Address from i596 viewpoint */ |
241 | dma_addr_t rbd; | 241 | u32 rbd; |
242 | unsigned short count; | 242 | unsigned short count; |
243 | unsigned short size; | 243 | unsigned short size; |
244 | struct i596_rfd *v_next; /* Address from CPUs viewpoint */ | 244 | struct i596_rfd *v_next; /* Address from CPUs viewpoint */ |
@@ -249,18 +249,18 @@ struct i596_rfd { | |||
249 | }; | 249 | }; |
250 | 250 | ||
251 | struct i596_rbd { | 251 | struct i596_rbd { |
252 | /* hardware data */ | 252 | /* hardware data */ |
253 | unsigned short count; | 253 | unsigned short count; |
254 | unsigned short zero1; | 254 | unsigned short zero1; |
255 | dma_addr_t b_next; | 255 | u32 b_next; |
256 | dma_addr_t b_data; /* Address from i596 viewpoint */ | 256 | u32 b_data; /* Address from i596 viewpoint */ |
257 | unsigned short size; | 257 | unsigned short size; |
258 | unsigned short zero2; | 258 | unsigned short zero2; |
259 | /* driver data */ | 259 | /* driver data */ |
260 | struct sk_buff *skb; | 260 | struct sk_buff *skb; |
261 | struct i596_rbd *v_next; | 261 | struct i596_rbd *v_next; |
262 | dma_addr_t b_addr; /* This rbd addr from i596 view */ | 262 | u32 b_addr; /* This rbd addr from i596 view */ |
263 | unsigned char *v_data; /* Address from CPUs viewpoint */ | 263 | unsigned char *v_data; /* Address from CPUs viewpoint */ |
264 | /* Total 32 bytes... */ | 264 | /* Total 32 bytes... */ |
265 | #ifdef __LP64__ | 265 | #ifdef __LP64__ |
266 | u32 cache_pad[4]; | 266 | u32 cache_pad[4]; |
@@ -275,8 +275,8 @@ struct i596_rbd { | |||
275 | struct i596_scb { | 275 | struct i596_scb { |
276 | unsigned short status; | 276 | unsigned short status; |
277 | unsigned short command; | 277 | unsigned short command; |
278 | dma_addr_t cmd; | 278 | u32 cmd; |
279 | dma_addr_t rfd; | 279 | u32 rfd; |
280 | u32 crc_err; | 280 | u32 crc_err; |
281 | u32 align_err; | 281 | u32 align_err; |
282 | u32 resource_err; | 282 | u32 resource_err; |
@@ -288,14 +288,14 @@ struct i596_scb { | |||
288 | }; | 288 | }; |
289 | 289 | ||
290 | struct i596_iscp { | 290 | struct i596_iscp { |
291 | u32 stat; | 291 | u32 stat; |
292 | dma_addr_t scb; | 292 | u32 scb; |
293 | }; | 293 | }; |
294 | 294 | ||
295 | struct i596_scp { | 295 | struct i596_scp { |
296 | u32 sysbus; | 296 | u32 sysbus; |
297 | u32 pad; | 297 | u32 pad; |
298 | dma_addr_t iscp; | 298 | u32 iscp; |
299 | }; | 299 | }; |
300 | 300 | ||
301 | struct i596_dma { | 301 | struct i596_dma { |
diff --git a/drivers/net/myri10ge/myri10ge.c b/drivers/net/myri10ge/myri10ge.c index 0f306ddb5630..8def8657251f 100644 --- a/drivers/net/myri10ge/myri10ge.c +++ b/drivers/net/myri10ge/myri10ge.c | |||
@@ -1979,6 +1979,7 @@ static int myri10ge_open(struct net_device *dev) | |||
1979 | lro_mgr->lro_arr = mgp->rx_done.lro_desc; | 1979 | lro_mgr->lro_arr = mgp->rx_done.lro_desc; |
1980 | lro_mgr->get_frag_header = myri10ge_get_frag_header; | 1980 | lro_mgr->get_frag_header = myri10ge_get_frag_header; |
1981 | lro_mgr->max_aggr = myri10ge_lro_max_pkts; | 1981 | lro_mgr->max_aggr = myri10ge_lro_max_pkts; |
1982 | lro_mgr->frag_align_pad = 2; | ||
1982 | if (lro_mgr->max_aggr > MAX_SKB_FRAGS) | 1983 | if (lro_mgr->max_aggr > MAX_SKB_FRAGS) |
1983 | lro_mgr->max_aggr = MAX_SKB_FRAGS; | 1984 | lro_mgr->max_aggr = MAX_SKB_FRAGS; |
1984 | 1985 | ||
diff --git a/drivers/net/niu.c b/drivers/net/niu.c index 112ab079ce7d..abfc61c3a38c 100644 --- a/drivers/net/niu.c +++ b/drivers/net/niu.c | |||
@@ -1045,6 +1045,7 @@ static int niu_serdes_init(struct niu *np) | |||
1045 | } | 1045 | } |
1046 | 1046 | ||
1047 | static void niu_init_xif(struct niu *); | 1047 | static void niu_init_xif(struct niu *); |
1048 | static void niu_handle_led(struct niu *, int status); | ||
1048 | 1049 | ||
1049 | static int niu_link_status_common(struct niu *np, int link_up) | 1050 | static int niu_link_status_common(struct niu *np, int link_up) |
1050 | { | 1051 | { |
@@ -1066,11 +1067,15 @@ static int niu_link_status_common(struct niu *np, int link_up) | |||
1066 | 1067 | ||
1067 | spin_lock_irqsave(&np->lock, flags); | 1068 | spin_lock_irqsave(&np->lock, flags); |
1068 | niu_init_xif(np); | 1069 | niu_init_xif(np); |
1070 | niu_handle_led(np, 1); | ||
1069 | spin_unlock_irqrestore(&np->lock, flags); | 1071 | spin_unlock_irqrestore(&np->lock, flags); |
1070 | 1072 | ||
1071 | netif_carrier_on(dev); | 1073 | netif_carrier_on(dev); |
1072 | } else if (netif_carrier_ok(dev) && !link_up) { | 1074 | } else if (netif_carrier_ok(dev) && !link_up) { |
1073 | niuwarn(LINK, "%s: Link is down\n", dev->name); | 1075 | niuwarn(LINK, "%s: Link is down\n", dev->name); |
1076 | spin_lock_irqsave(&np->lock, flags); | ||
1077 | niu_handle_led(np, 0); | ||
1078 | spin_unlock_irqrestore(&np->lock, flags); | ||
1074 | netif_carrier_off(dev); | 1079 | netif_carrier_off(dev); |
1075 | } | 1080 | } |
1076 | 1081 | ||
@@ -3915,16 +3920,14 @@ static int niu_init_ipp(struct niu *np) | |||
3915 | return 0; | 3920 | return 0; |
3916 | } | 3921 | } |
3917 | 3922 | ||
3918 | static void niu_init_xif_xmac(struct niu *np) | 3923 | static void niu_handle_led(struct niu *np, int status) |
3919 | { | 3924 | { |
3920 | struct niu_link_config *lp = &np->link_config; | ||
3921 | u64 val; | 3925 | u64 val; |
3922 | |||
3923 | val = nr64_mac(XMAC_CONFIG); | 3926 | val = nr64_mac(XMAC_CONFIG); |
3924 | 3927 | ||
3925 | if ((np->flags & NIU_FLAGS_10G) != 0 && | 3928 | if ((np->flags & NIU_FLAGS_10G) != 0 && |
3926 | (np->flags & NIU_FLAGS_FIBER) != 0) { | 3929 | (np->flags & NIU_FLAGS_FIBER) != 0) { |
3927 | if (netif_carrier_ok(np->dev)) { | 3930 | if (status) { |
3928 | val |= XMAC_CONFIG_LED_POLARITY; | 3931 | val |= XMAC_CONFIG_LED_POLARITY; |
3929 | val &= ~XMAC_CONFIG_FORCE_LED_ON; | 3932 | val &= ~XMAC_CONFIG_FORCE_LED_ON; |
3930 | } else { | 3933 | } else { |
@@ -3933,6 +3936,15 @@ static void niu_init_xif_xmac(struct niu *np) | |||
3933 | } | 3936 | } |
3934 | } | 3937 | } |
3935 | 3938 | ||
3939 | nw64_mac(XMAC_CONFIG, val); | ||
3940 | } | ||
3941 | |||
3942 | static void niu_init_xif_xmac(struct niu *np) | ||
3943 | { | ||
3944 | struct niu_link_config *lp = &np->link_config; | ||
3945 | u64 val; | ||
3946 | |||
3947 | val = nr64_mac(XMAC_CONFIG); | ||
3936 | val &= ~XMAC_CONFIG_SEL_POR_CLK_SRC; | 3948 | val &= ~XMAC_CONFIG_SEL_POR_CLK_SRC; |
3937 | 3949 | ||
3938 | val |= XMAC_CONFIG_TX_OUTPUT_EN; | 3950 | val |= XMAC_CONFIG_TX_OUTPUT_EN; |
@@ -4776,6 +4788,8 @@ static int niu_close(struct net_device *dev) | |||
4776 | 4788 | ||
4777 | niu_free_channels(np); | 4789 | niu_free_channels(np); |
4778 | 4790 | ||
4791 | niu_handle_led(np, 0); | ||
4792 | |||
4779 | return 0; | 4793 | return 0; |
4780 | } | 4794 | } |
4781 | 4795 | ||
diff --git a/drivers/net/pasemi_mac.c b/drivers/net/pasemi_mac.c index 09b4fde8d924..816a59e801b2 100644 --- a/drivers/net/pasemi_mac.c +++ b/drivers/net/pasemi_mac.c | |||
@@ -586,7 +586,7 @@ static int pasemi_mac_clean_rx(struct pasemi_mac *mac, int limit) | |||
586 | /* CRC error flagged */ | 586 | /* CRC error flagged */ |
587 | mac->netdev->stats.rx_errors++; | 587 | mac->netdev->stats.rx_errors++; |
588 | mac->netdev->stats.rx_crc_errors++; | 588 | mac->netdev->stats.rx_crc_errors++; |
589 | dev_kfree_skb_irq(skb); | 589 | /* No need to free skb, it'll be reused */ |
590 | goto next; | 590 | goto next; |
591 | } | 591 | } |
592 | 592 | ||
@@ -1362,7 +1362,7 @@ pasemi_mac_probe(struct pci_dev *pdev, const struct pci_device_id *ent) | |||
1362 | 1362 | ||
1363 | netif_napi_add(dev, &mac->napi, pasemi_mac_poll, 64); | 1363 | netif_napi_add(dev, &mac->napi, pasemi_mac_poll, 64); |
1364 | 1364 | ||
1365 | dev->features = NETIF_F_HW_CSUM | NETIF_F_LLTX | NETIF_F_SG; | 1365 | dev->features = NETIF_F_IP_CSUM | NETIF_F_LLTX | NETIF_F_SG; |
1366 | 1366 | ||
1367 | /* These should come out of the device tree eventually */ | 1367 | /* These should come out of the device tree eventually */ |
1368 | mac->dma_txch = index; | 1368 | mac->dma_txch = index; |
diff --git a/drivers/net/phy/marvell.c b/drivers/net/phy/marvell.c index 035fd41fb61f..f0574073a2a3 100644 --- a/drivers/net/phy/marvell.c +++ b/drivers/net/phy/marvell.c | |||
@@ -143,21 +143,29 @@ static int m88e1111_config_init(struct phy_device *phydev) | |||
143 | int err; | 143 | int err; |
144 | 144 | ||
145 | if ((phydev->interface == PHY_INTERFACE_MODE_RGMII) || | 145 | if ((phydev->interface == PHY_INTERFACE_MODE_RGMII) || |
146 | (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID)) { | 146 | (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) || |
147 | (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID) || | ||
148 | (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID)) { | ||
147 | int temp; | 149 | int temp; |
148 | 150 | ||
149 | if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) { | 151 | temp = phy_read(phydev, MII_M1111_PHY_EXT_CR); |
150 | temp = phy_read(phydev, MII_M1111_PHY_EXT_CR); | 152 | if (temp < 0) |
151 | if (temp < 0) | 153 | return temp; |
152 | return temp; | ||
153 | 154 | ||
155 | if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) { | ||
154 | temp |= (MII_M1111_RX_DELAY | MII_M1111_TX_DELAY); | 156 | temp |= (MII_M1111_RX_DELAY | MII_M1111_TX_DELAY); |
155 | 157 | } else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID) { | |
156 | err = phy_write(phydev, MII_M1111_PHY_EXT_CR, temp); | 158 | temp &= ~MII_M1111_TX_DELAY; |
157 | if (err < 0) | 159 | temp |= MII_M1111_RX_DELAY; |
158 | return err; | 160 | } else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID) { |
161 | temp &= ~MII_M1111_RX_DELAY; | ||
162 | temp |= MII_M1111_TX_DELAY; | ||
159 | } | 163 | } |
160 | 164 | ||
165 | err = phy_write(phydev, MII_M1111_PHY_EXT_CR, temp); | ||
166 | if (err < 0) | ||
167 | return err; | ||
168 | |||
161 | temp = phy_read(phydev, MII_M1111_PHY_EXT_SR); | 169 | temp = phy_read(phydev, MII_M1111_PHY_EXT_SR); |
162 | if (temp < 0) | 170 | if (temp < 0) |
163 | return temp; | 171 | return temp; |
diff --git a/drivers/net/phy/mdio_bus.c b/drivers/net/phy/mdio_bus.c index fc2f0e695a13..c30196d0ad16 100644 --- a/drivers/net/phy/mdio_bus.c +++ b/drivers/net/phy/mdio_bus.c | |||
@@ -91,9 +91,12 @@ int mdiobus_register(struct mii_bus *bus) | |||
91 | 91 | ||
92 | err = device_register(&phydev->dev); | 92 | err = device_register(&phydev->dev); |
93 | 93 | ||
94 | if (err) | 94 | if (err) { |
95 | printk(KERN_ERR "phy %d failed to register\n", | 95 | printk(KERN_ERR "phy %d failed to register\n", |
96 | i); | 96 | i); |
97 | phy_device_free(phydev); | ||
98 | phydev = NULL; | ||
99 | } | ||
97 | } | 100 | } |
98 | 101 | ||
99 | bus->phy_map[i] = phydev; | 102 | bus->phy_map[i] = phydev; |
@@ -110,10 +113,8 @@ void mdiobus_unregister(struct mii_bus *bus) | |||
110 | int i; | 113 | int i; |
111 | 114 | ||
112 | for (i = 0; i < PHY_MAX_ADDR; i++) { | 115 | for (i = 0; i < PHY_MAX_ADDR; i++) { |
113 | if (bus->phy_map[i]) { | 116 | if (bus->phy_map[i]) |
114 | device_unregister(&bus->phy_map[i]->dev); | 117 | device_unregister(&bus->phy_map[i]->dev); |
115 | kfree(bus->phy_map[i]); | ||
116 | } | ||
117 | } | 118 | } |
118 | } | 119 | } |
119 | EXPORT_SYMBOL(mdiobus_unregister); | 120 | EXPORT_SYMBOL(mdiobus_unregister); |
diff --git a/drivers/net/phy/phy.c b/drivers/net/phy/phy.c index 9bc11773705b..7c9e6e349503 100644 --- a/drivers/net/phy/phy.c +++ b/drivers/net/phy/phy.c | |||
@@ -406,6 +406,9 @@ int phy_mii_ioctl(struct phy_device *phydev, | |||
406 | && phydev->drv->config_init) | 406 | && phydev->drv->config_init) |
407 | phydev->drv->config_init(phydev); | 407 | phydev->drv->config_init(phydev); |
408 | break; | 408 | break; |
409 | |||
410 | default: | ||
411 | return -ENOTTY; | ||
409 | } | 412 | } |
410 | 413 | ||
411 | return 0; | 414 | return 0; |
diff --git a/drivers/net/phy/phy_device.c b/drivers/net/phy/phy_device.c index f6e484812a98..5b9e1751e1b4 100644 --- a/drivers/net/phy/phy_device.c +++ b/drivers/net/phy/phy_device.c | |||
@@ -44,6 +44,16 @@ static struct phy_driver genphy_driver; | |||
44 | extern int mdio_bus_init(void); | 44 | extern int mdio_bus_init(void); |
45 | extern void mdio_bus_exit(void); | 45 | extern void mdio_bus_exit(void); |
46 | 46 | ||
47 | void phy_device_free(struct phy_device *phydev) | ||
48 | { | ||
49 | kfree(phydev); | ||
50 | } | ||
51 | |||
52 | static void phy_device_release(struct device *dev) | ||
53 | { | ||
54 | phy_device_free(to_phy_device(dev)); | ||
55 | } | ||
56 | |||
47 | struct phy_device* phy_device_create(struct mii_bus *bus, int addr, int phy_id) | 57 | struct phy_device* phy_device_create(struct mii_bus *bus, int addr, int phy_id) |
48 | { | 58 | { |
49 | struct phy_device *dev; | 59 | struct phy_device *dev; |
@@ -54,6 +64,8 @@ struct phy_device* phy_device_create(struct mii_bus *bus, int addr, int phy_id) | |||
54 | if (NULL == dev) | 64 | if (NULL == dev) |
55 | return (struct phy_device*) PTR_ERR((void*)-ENOMEM); | 65 | return (struct phy_device*) PTR_ERR((void*)-ENOMEM); |
56 | 66 | ||
67 | dev->dev.release = phy_device_release; | ||
68 | |||
57 | dev->speed = 0; | 69 | dev->speed = 0; |
58 | dev->duplex = -1; | 70 | dev->duplex = -1; |
59 | dev->pause = dev->asym_pause = 0; | 71 | dev->pause = dev->asym_pause = 0; |
diff --git a/drivers/net/s2io-regs.h b/drivers/net/s2io-regs.h index 01f08d726ace..f25264f2638e 100644 --- a/drivers/net/s2io-regs.h +++ b/drivers/net/s2io-regs.h | |||
@@ -66,6 +66,7 @@ struct XENA_dev_config { | |||
66 | #define ADAPTER_STATUS_RC_PRC_QUIESCENT vBIT(0xFF,16,8) | 66 | #define ADAPTER_STATUS_RC_PRC_QUIESCENT vBIT(0xFF,16,8) |
67 | #define ADAPTER_STATUS_MC_DRAM_READY s2BIT(24) | 67 | #define ADAPTER_STATUS_MC_DRAM_READY s2BIT(24) |
68 | #define ADAPTER_STATUS_MC_QUEUES_READY s2BIT(25) | 68 | #define ADAPTER_STATUS_MC_QUEUES_READY s2BIT(25) |
69 | #define ADAPTER_STATUS_RIC_RUNNING s2BIT(26) | ||
69 | #define ADAPTER_STATUS_M_PLL_LOCK s2BIT(30) | 70 | #define ADAPTER_STATUS_M_PLL_LOCK s2BIT(30) |
70 | #define ADAPTER_STATUS_P_PLL_LOCK s2BIT(31) | 71 | #define ADAPTER_STATUS_P_PLL_LOCK s2BIT(31) |
71 | 72 | ||
diff --git a/drivers/net/s2io.c b/drivers/net/s2io.c index 632666706247..121cb100f93a 100644 --- a/drivers/net/s2io.c +++ b/drivers/net/s2io.c | |||
@@ -84,7 +84,7 @@ | |||
84 | #include "s2io.h" | 84 | #include "s2io.h" |
85 | #include "s2io-regs.h" | 85 | #include "s2io-regs.h" |
86 | 86 | ||
87 | #define DRV_VERSION "2.0.26.6" | 87 | #define DRV_VERSION "2.0.26.10" |
88 | 88 | ||
89 | /* S2io Driver name & version. */ | 89 | /* S2io Driver name & version. */ |
90 | static char s2io_driver_name[] = "Neterion"; | 90 | static char s2io_driver_name[] = "Neterion"; |
@@ -1081,7 +1081,7 @@ static int init_nic(struct s2io_nic *nic) | |||
1081 | /* to set the swapper controle on the card */ | 1081 | /* to set the swapper controle on the card */ |
1082 | if(s2io_set_swapper(nic)) { | 1082 | if(s2io_set_swapper(nic)) { |
1083 | DBG_PRINT(ERR_DBG,"ERROR: Setting Swapper failed\n"); | 1083 | DBG_PRINT(ERR_DBG,"ERROR: Setting Swapper failed\n"); |
1084 | return -1; | 1084 | return -EIO; |
1085 | } | 1085 | } |
1086 | 1086 | ||
1087 | /* | 1087 | /* |
@@ -1100,6 +1100,20 @@ static int init_nic(struct s2io_nic *nic) | |||
1100 | msleep(500); | 1100 | msleep(500); |
1101 | val64 = readq(&bar0->sw_reset); | 1101 | val64 = readq(&bar0->sw_reset); |
1102 | 1102 | ||
1103 | /* Ensure that it's safe to access registers by checking | ||
1104 | * RIC_RUNNING bit is reset. Check is valid only for XframeII. | ||
1105 | */ | ||
1106 | if (nic->device_type == XFRAME_II_DEVICE) { | ||
1107 | for (i = 0; i < 50; i++) { | ||
1108 | val64 = readq(&bar0->adapter_status); | ||
1109 | if (!(val64 & ADAPTER_STATUS_RIC_RUNNING)) | ||
1110 | break; | ||
1111 | msleep(10); | ||
1112 | } | ||
1113 | if (i == 50) | ||
1114 | return -ENODEV; | ||
1115 | } | ||
1116 | |||
1103 | /* Enable Receiving broadcasts */ | 1117 | /* Enable Receiving broadcasts */ |
1104 | add = &bar0->mac_cfg; | 1118 | add = &bar0->mac_cfg; |
1105 | val64 = readq(&bar0->mac_cfg); | 1119 | val64 = readq(&bar0->mac_cfg); |
@@ -1503,7 +1517,7 @@ static int init_nic(struct s2io_nic *nic) | |||
1503 | DBG_PRINT(ERR_DBG, "%s: failed rts ds steering", | 1517 | DBG_PRINT(ERR_DBG, "%s: failed rts ds steering", |
1504 | dev->name); | 1518 | dev->name); |
1505 | DBG_PRINT(ERR_DBG, "set on codepoint %d\n", i); | 1519 | DBG_PRINT(ERR_DBG, "set on codepoint %d\n", i); |
1506 | return FAILURE; | 1520 | return -ENODEV; |
1507 | } | 1521 | } |
1508 | } | 1522 | } |
1509 | 1523 | ||
@@ -1570,7 +1584,7 @@ static int init_nic(struct s2io_nic *nic) | |||
1570 | if (time > 10) { | 1584 | if (time > 10) { |
1571 | DBG_PRINT(ERR_DBG, "%s: TTI init Failed\n", | 1585 | DBG_PRINT(ERR_DBG, "%s: TTI init Failed\n", |
1572 | dev->name); | 1586 | dev->name); |
1573 | return -1; | 1587 | return -ENODEV; |
1574 | } | 1588 | } |
1575 | msleep(50); | 1589 | msleep(50); |
1576 | time++; | 1590 | time++; |
@@ -1623,7 +1637,7 @@ static int init_nic(struct s2io_nic *nic) | |||
1623 | if (time > 10) { | 1637 | if (time > 10) { |
1624 | DBG_PRINT(ERR_DBG, "%s: RTI init Failed\n", | 1638 | DBG_PRINT(ERR_DBG, "%s: RTI init Failed\n", |
1625 | dev->name); | 1639 | dev->name); |
1626 | return -1; | 1640 | return -ENODEV; |
1627 | } | 1641 | } |
1628 | time++; | 1642 | time++; |
1629 | msleep(50); | 1643 | msleep(50); |
@@ -3914,6 +3928,12 @@ static int s2io_close(struct net_device *dev) | |||
3914 | { | 3928 | { |
3915 | struct s2io_nic *sp = dev->priv; | 3929 | struct s2io_nic *sp = dev->priv; |
3916 | 3930 | ||
3931 | /* Return if the device is already closed * | ||
3932 | * Can happen when s2io_card_up failed in change_mtu * | ||
3933 | */ | ||
3934 | if (!is_s2io_card_up(sp)) | ||
3935 | return 0; | ||
3936 | |||
3917 | netif_stop_queue(dev); | 3937 | netif_stop_queue(dev); |
3918 | napi_disable(&sp->napi); | 3938 | napi_disable(&sp->napi); |
3919 | /* Reset card, kill tasklet and free Tx and Rx buffers. */ | 3939 | /* Reset card, kill tasklet and free Tx and Rx buffers. */ |
@@ -6355,6 +6375,7 @@ static int s2io_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) | |||
6355 | static int s2io_change_mtu(struct net_device *dev, int new_mtu) | 6375 | static int s2io_change_mtu(struct net_device *dev, int new_mtu) |
6356 | { | 6376 | { |
6357 | struct s2io_nic *sp = dev->priv; | 6377 | struct s2io_nic *sp = dev->priv; |
6378 | int ret = 0; | ||
6358 | 6379 | ||
6359 | if ((new_mtu < MIN_MTU) || (new_mtu > S2IO_JUMBO_SIZE)) { | 6380 | if ((new_mtu < MIN_MTU) || (new_mtu > S2IO_JUMBO_SIZE)) { |
6360 | DBG_PRINT(ERR_DBG, "%s: MTU size is invalid.\n", | 6381 | DBG_PRINT(ERR_DBG, "%s: MTU size is invalid.\n", |
@@ -6366,9 +6387,11 @@ static int s2io_change_mtu(struct net_device *dev, int new_mtu) | |||
6366 | if (netif_running(dev)) { | 6387 | if (netif_running(dev)) { |
6367 | s2io_card_down(sp); | 6388 | s2io_card_down(sp); |
6368 | netif_stop_queue(dev); | 6389 | netif_stop_queue(dev); |
6369 | if (s2io_card_up(sp)) { | 6390 | ret = s2io_card_up(sp); |
6391 | if (ret) { | ||
6370 | DBG_PRINT(ERR_DBG, "%s: Device bring up failed\n", | 6392 | DBG_PRINT(ERR_DBG, "%s: Device bring up failed\n", |
6371 | __FUNCTION__); | 6393 | __FUNCTION__); |
6394 | return ret; | ||
6372 | } | 6395 | } |
6373 | if (netif_queue_stopped(dev)) | 6396 | if (netif_queue_stopped(dev)) |
6374 | netif_wake_queue(dev); | 6397 | netif_wake_queue(dev); |
@@ -6379,7 +6402,7 @@ static int s2io_change_mtu(struct net_device *dev, int new_mtu) | |||
6379 | writeq(vBIT(val64, 2, 14), &bar0->rmac_max_pyld_len); | 6402 | writeq(vBIT(val64, 2, 14), &bar0->rmac_max_pyld_len); |
6380 | } | 6403 | } |
6381 | 6404 | ||
6382 | return 0; | 6405 | return ret; |
6383 | } | 6406 | } |
6384 | 6407 | ||
6385 | /** | 6408 | /** |
@@ -6777,6 +6800,9 @@ static void do_s2io_card_down(struct s2io_nic * sp, int do_io) | |||
6777 | unsigned long flags; | 6800 | unsigned long flags; |
6778 | register u64 val64 = 0; | 6801 | register u64 val64 = 0; |
6779 | 6802 | ||
6803 | if (!is_s2io_card_up(sp)) | ||
6804 | return; | ||
6805 | |||
6780 | del_timer_sync(&sp->alarm_timer); | 6806 | del_timer_sync(&sp->alarm_timer); |
6781 | /* If s2io_set_link task is executing, wait till it completes. */ | 6807 | /* If s2io_set_link task is executing, wait till it completes. */ |
6782 | while (test_and_set_bit(__S2IO_STATE_LINK_TASK, &(sp->state))) { | 6808 | while (test_and_set_bit(__S2IO_STATE_LINK_TASK, &(sp->state))) { |
@@ -6850,11 +6876,13 @@ static int s2io_card_up(struct s2io_nic * sp) | |||
6850 | u16 interruptible; | 6876 | u16 interruptible; |
6851 | 6877 | ||
6852 | /* Initialize the H/W I/O registers */ | 6878 | /* Initialize the H/W I/O registers */ |
6853 | if (init_nic(sp) != 0) { | 6879 | ret = init_nic(sp); |
6880 | if (ret != 0) { | ||
6854 | DBG_PRINT(ERR_DBG, "%s: H/W initialization failed\n", | 6881 | DBG_PRINT(ERR_DBG, "%s: H/W initialization failed\n", |
6855 | dev->name); | 6882 | dev->name); |
6856 | s2io_reset(sp); | 6883 | if (ret != -EIO) |
6857 | return -ENODEV; | 6884 | s2io_reset(sp); |
6885 | return ret; | ||
6858 | } | 6886 | } |
6859 | 6887 | ||
6860 | /* | 6888 | /* |
diff --git a/drivers/net/skge.c b/drivers/net/skge.c index 6d62250fba07..186eb8ebfda6 100644 --- a/drivers/net/skge.c +++ b/drivers/net/skge.c | |||
@@ -44,7 +44,7 @@ | |||
44 | #include "skge.h" | 44 | #include "skge.h" |
45 | 45 | ||
46 | #define DRV_NAME "skge" | 46 | #define DRV_NAME "skge" |
47 | #define DRV_VERSION "1.12" | 47 | #define DRV_VERSION "1.13" |
48 | #define PFX DRV_NAME " " | 48 | #define PFX DRV_NAME " " |
49 | 49 | ||
50 | #define DEFAULT_TX_RING_SIZE 128 | 50 | #define DEFAULT_TX_RING_SIZE 128 |
@@ -1095,16 +1095,9 @@ static void xm_link_down(struct skge_hw *hw, int port) | |||
1095 | { | 1095 | { |
1096 | struct net_device *dev = hw->dev[port]; | 1096 | struct net_device *dev = hw->dev[port]; |
1097 | struct skge_port *skge = netdev_priv(dev); | 1097 | struct skge_port *skge = netdev_priv(dev); |
1098 | u16 cmd = xm_read16(hw, port, XM_MMU_CMD); | ||
1099 | 1098 | ||
1100 | xm_write16(hw, port, XM_IMSK, XM_IMSK_DISABLE); | 1099 | xm_write16(hw, port, XM_IMSK, XM_IMSK_DISABLE); |
1101 | 1100 | ||
1102 | cmd &= ~(XM_MMU_ENA_RX | XM_MMU_ENA_TX); | ||
1103 | xm_write16(hw, port, XM_MMU_CMD, cmd); | ||
1104 | |||
1105 | /* dummy read to ensure writing */ | ||
1106 | xm_read16(hw, port, XM_MMU_CMD); | ||
1107 | |||
1108 | if (netif_carrier_ok(dev)) | 1101 | if (netif_carrier_ok(dev)) |
1109 | skge_link_down(skge); | 1102 | skge_link_down(skge); |
1110 | } | 1103 | } |
@@ -1194,6 +1187,7 @@ static void genesis_init(struct skge_hw *hw) | |||
1194 | static void genesis_reset(struct skge_hw *hw, int port) | 1187 | static void genesis_reset(struct skge_hw *hw, int port) |
1195 | { | 1188 | { |
1196 | const u8 zero[8] = { 0 }; | 1189 | const u8 zero[8] = { 0 }; |
1190 | u32 reg; | ||
1197 | 1191 | ||
1198 | skge_write8(hw, SK_REG(port, GMAC_IRQ_MSK), 0); | 1192 | skge_write8(hw, SK_REG(port, GMAC_IRQ_MSK), 0); |
1199 | 1193 | ||
@@ -1209,6 +1203,11 @@ static void genesis_reset(struct skge_hw *hw, int port) | |||
1209 | xm_write16(hw, port, PHY_BCOM_INT_MASK, 0xffff); | 1203 | xm_write16(hw, port, PHY_BCOM_INT_MASK, 0xffff); |
1210 | 1204 | ||
1211 | xm_outhash(hw, port, XM_HSM, zero); | 1205 | xm_outhash(hw, port, XM_HSM, zero); |
1206 | |||
1207 | /* Flush TX and RX fifo */ | ||
1208 | reg = xm_read32(hw, port, XM_MODE); | ||
1209 | xm_write32(hw, port, XM_MODE, reg | XM_MD_FTF); | ||
1210 | xm_write32(hw, port, XM_MODE, reg | XM_MD_FRF); | ||
1212 | } | 1211 | } |
1213 | 1212 | ||
1214 | 1213 | ||
@@ -1634,15 +1633,14 @@ static void genesis_mac_init(struct skge_hw *hw, int port) | |||
1634 | } | 1633 | } |
1635 | xm_write16(hw, port, XM_RX_CMD, r); | 1634 | xm_write16(hw, port, XM_RX_CMD, r); |
1636 | 1635 | ||
1637 | |||
1638 | /* We want short frames padded to 60 bytes. */ | 1636 | /* We want short frames padded to 60 bytes. */ |
1639 | xm_write16(hw, port, XM_TX_CMD, XM_TX_AUTO_PAD); | 1637 | xm_write16(hw, port, XM_TX_CMD, XM_TX_AUTO_PAD); |
1640 | 1638 | ||
1641 | /* | 1639 | /* Increase threshold for jumbo frames on dual port */ |
1642 | * Bump up the transmit threshold. This helps hold off transmit | 1640 | if (hw->ports > 1 && jumbo) |
1643 | * underruns when we're blasting traffic from both ports at once. | 1641 | xm_write16(hw, port, XM_TX_THR, 1020); |
1644 | */ | 1642 | else |
1645 | xm_write16(hw, port, XM_TX_THR, 512); | 1643 | xm_write16(hw, port, XM_TX_THR, 512); |
1646 | 1644 | ||
1647 | /* | 1645 | /* |
1648 | * Enable the reception of all error frames. This is is | 1646 | * Enable the reception of all error frames. This is is |
@@ -1713,7 +1711,13 @@ static void genesis_stop(struct skge_port *skge) | |||
1713 | { | 1711 | { |
1714 | struct skge_hw *hw = skge->hw; | 1712 | struct skge_hw *hw = skge->hw; |
1715 | int port = skge->port; | 1713 | int port = skge->port; |
1716 | u32 reg; | 1714 | unsigned retries = 1000; |
1715 | u16 cmd; | ||
1716 | |||
1717 | /* Disable Tx and Rx */ | ||
1718 | cmd = xm_read16(hw, port, XM_MMU_CMD); | ||
1719 | cmd &= ~(XM_MMU_ENA_RX | XM_MMU_ENA_TX); | ||
1720 | xm_write16(hw, port, XM_MMU_CMD, cmd); | ||
1717 | 1721 | ||
1718 | genesis_reset(hw, port); | 1722 | genesis_reset(hw, port); |
1719 | 1723 | ||
@@ -1721,20 +1725,17 @@ static void genesis_stop(struct skge_port *skge) | |||
1721 | skge_write16(hw, B3_PA_CTRL, | 1725 | skge_write16(hw, B3_PA_CTRL, |
1722 | port == 0 ? PA_CLR_TO_TX1 : PA_CLR_TO_TX2); | 1726 | port == 0 ? PA_CLR_TO_TX1 : PA_CLR_TO_TX2); |
1723 | 1727 | ||
1724 | /* | ||
1725 | * If the transfer sticks at the MAC the STOP command will not | ||
1726 | * terminate if we don't flush the XMAC's transmit FIFO ! | ||
1727 | */ | ||
1728 | xm_write32(hw, port, XM_MODE, | ||
1729 | xm_read32(hw, port, XM_MODE)|XM_MD_FTF); | ||
1730 | |||
1731 | |||
1732 | /* Reset the MAC */ | 1728 | /* Reset the MAC */ |
1733 | skge_write16(hw, SK_REG(port, TX_MFF_CTRL1), MFF_SET_MAC_RST); | 1729 | skge_write16(hw, SK_REG(port, TX_MFF_CTRL1), MFF_CLR_MAC_RST); |
1730 | do { | ||
1731 | skge_write16(hw, SK_REG(port, TX_MFF_CTRL1), MFF_SET_MAC_RST); | ||
1732 | if (!(skge_read16(hw, SK_REG(port, TX_MFF_CTRL1)) & MFF_SET_MAC_RST)) | ||
1733 | break; | ||
1734 | } while (--retries > 0); | ||
1734 | 1735 | ||
1735 | /* For external PHYs there must be special handling */ | 1736 | /* For external PHYs there must be special handling */ |
1736 | if (hw->phy_type != SK_PHY_XMAC) { | 1737 | if (hw->phy_type != SK_PHY_XMAC) { |
1737 | reg = skge_read32(hw, B2_GP_IO); | 1738 | u32 reg = skge_read32(hw, B2_GP_IO); |
1738 | if (port == 0) { | 1739 | if (port == 0) { |
1739 | reg |= GP_DIR_0; | 1740 | reg |= GP_DIR_0; |
1740 | reg &= ~GP_IO_0; | 1741 | reg &= ~GP_IO_0; |
@@ -1801,11 +1802,6 @@ static void genesis_mac_intr(struct skge_hw *hw, int port) | |||
1801 | xm_write32(hw, port, XM_MODE, XM_MD_FTF); | 1802 | xm_write32(hw, port, XM_MODE, XM_MD_FTF); |
1802 | ++dev->stats.tx_fifo_errors; | 1803 | ++dev->stats.tx_fifo_errors; |
1803 | } | 1804 | } |
1804 | |||
1805 | if (status & XM_IS_RXF_OV) { | ||
1806 | xm_write32(hw, port, XM_MODE, XM_MD_FRF); | ||
1807 | ++dev->stats.rx_fifo_errors; | ||
1808 | } | ||
1809 | } | 1805 | } |
1810 | 1806 | ||
1811 | static void genesis_link_up(struct skge_port *skge) | 1807 | static void genesis_link_up(struct skge_port *skge) |
@@ -1862,9 +1858,9 @@ static void genesis_link_up(struct skge_port *skge) | |||
1862 | 1858 | ||
1863 | xm_write32(hw, port, XM_MODE, mode); | 1859 | xm_write32(hw, port, XM_MODE, mode); |
1864 | 1860 | ||
1865 | /* Turn on detection of Tx underrun, Rx overrun */ | 1861 | /* Turn on detection of Tx underrun */ |
1866 | msk = xm_read16(hw, port, XM_IMSK); | 1862 | msk = xm_read16(hw, port, XM_IMSK); |
1867 | msk &= ~(XM_IS_RXF_OV | XM_IS_TXF_UR); | 1863 | msk &= ~XM_IS_TXF_UR; |
1868 | xm_write16(hw, port, XM_IMSK, msk); | 1864 | xm_write16(hw, port, XM_IMSK, msk); |
1869 | 1865 | ||
1870 | xm_read16(hw, port, XM_ISRC); | 1866 | xm_read16(hw, port, XM_ISRC); |
@@ -2194,9 +2190,12 @@ static void yukon_mac_init(struct skge_hw *hw, int port) | |||
2194 | TX_JAM_IPG_VAL(TX_JAM_IPG_DEF) | | 2190 | TX_JAM_IPG_VAL(TX_JAM_IPG_DEF) | |
2195 | TX_IPG_JAM_DATA(TX_IPG_JAM_DEF)); | 2191 | TX_IPG_JAM_DATA(TX_IPG_JAM_DEF)); |
2196 | 2192 | ||
2197 | /* serial mode register */ | 2193 | /* configure the Serial Mode Register */ |
2198 | reg = GM_SMOD_VLAN_ENA | IPG_DATA_VAL(IPG_DATA_DEF); | 2194 | reg = DATA_BLIND_VAL(DATA_BLIND_DEF) |
2199 | if (hw->dev[port]->mtu > 1500) | 2195 | | GM_SMOD_VLAN_ENA |
2196 | | IPG_DATA_VAL(IPG_DATA_DEF); | ||
2197 | |||
2198 | if (hw->dev[port]->mtu > ETH_DATA_LEN) | ||
2200 | reg |= GM_SMOD_JUMBO_ENA; | 2199 | reg |= GM_SMOD_JUMBO_ENA; |
2201 | 2200 | ||
2202 | gma_write16(hw, port, GM_SERIAL_MODE, reg); | 2201 | gma_write16(hw, port, GM_SERIAL_MODE, reg); |
@@ -2619,8 +2618,8 @@ static int skge_up(struct net_device *dev) | |||
2619 | yukon_mac_init(hw, port); | 2618 | yukon_mac_init(hw, port); |
2620 | spin_unlock_bh(&hw->phy_lock); | 2619 | spin_unlock_bh(&hw->phy_lock); |
2621 | 2620 | ||
2622 | /* Configure RAMbuffers */ | 2621 | /* Configure RAMbuffers - equally between ports and tx/rx */ |
2623 | chunk = hw->ram_size / ((hw->ports + 1)*2); | 2622 | chunk = (hw->ram_size - hw->ram_offset) / (hw->ports * 2); |
2624 | ram_addr = hw->ram_offset + 2 * chunk * port; | 2623 | ram_addr = hw->ram_offset + 2 * chunk * port; |
2625 | 2624 | ||
2626 | skge_ramset(hw, rxqaddr[port], ram_addr, chunk); | 2625 | skge_ramset(hw, rxqaddr[port], ram_addr, chunk); |
@@ -2897,11 +2896,7 @@ static void skge_tx_timeout(struct net_device *dev) | |||
2897 | 2896 | ||
2898 | static int skge_change_mtu(struct net_device *dev, int new_mtu) | 2897 | static int skge_change_mtu(struct net_device *dev, int new_mtu) |
2899 | { | 2898 | { |
2900 | struct skge_port *skge = netdev_priv(dev); | ||
2901 | struct skge_hw *hw = skge->hw; | ||
2902 | int port = skge->port; | ||
2903 | int err; | 2899 | int err; |
2904 | u16 ctl, reg; | ||
2905 | 2900 | ||
2906 | if (new_mtu < ETH_ZLEN || new_mtu > ETH_JUMBO_MTU) | 2901 | if (new_mtu < ETH_ZLEN || new_mtu > ETH_JUMBO_MTU) |
2907 | return -EINVAL; | 2902 | return -EINVAL; |
@@ -2911,40 +2906,13 @@ static int skge_change_mtu(struct net_device *dev, int new_mtu) | |||
2911 | return 0; | 2906 | return 0; |
2912 | } | 2907 | } |
2913 | 2908 | ||
2914 | skge_write32(hw, B0_IMSK, 0); | 2909 | skge_down(dev); |
2915 | dev->trans_start = jiffies; /* prevent tx timeout */ | ||
2916 | netif_stop_queue(dev); | ||
2917 | napi_disable(&skge->napi); | ||
2918 | |||
2919 | ctl = gma_read16(hw, port, GM_GP_CTRL); | ||
2920 | gma_write16(hw, port, GM_GP_CTRL, ctl & ~GM_GPCR_RX_ENA); | ||
2921 | |||
2922 | skge_rx_clean(skge); | ||
2923 | skge_rx_stop(hw, port); | ||
2924 | 2910 | ||
2925 | dev->mtu = new_mtu; | 2911 | dev->mtu = new_mtu; |
2926 | 2912 | ||
2927 | reg = GM_SMOD_VLAN_ENA | IPG_DATA_VAL(IPG_DATA_DEF); | 2913 | err = skge_up(dev); |
2928 | if (new_mtu > 1500) | ||
2929 | reg |= GM_SMOD_JUMBO_ENA; | ||
2930 | gma_write16(hw, port, GM_SERIAL_MODE, reg); | ||
2931 | |||
2932 | skge_write8(hw, RB_ADDR(rxqaddr[port], RB_CTRL), RB_ENA_OP_MD); | ||
2933 | |||
2934 | err = skge_rx_fill(dev); | ||
2935 | wmb(); | ||
2936 | if (!err) | ||
2937 | skge_write8(hw, Q_ADDR(rxqaddr[port], Q_CSR), CSR_START | CSR_IRQ_CL_F); | ||
2938 | skge_write32(hw, B0_IMSK, hw->intr_mask); | ||
2939 | |||
2940 | if (err) | 2914 | if (err) |
2941 | dev_close(dev); | 2915 | dev_close(dev); |
2942 | else { | ||
2943 | gma_write16(hw, port, GM_GP_CTRL, ctl); | ||
2944 | |||
2945 | napi_enable(&skge->napi); | ||
2946 | netif_wake_queue(dev); | ||
2947 | } | ||
2948 | 2916 | ||
2949 | return err; | 2917 | return err; |
2950 | } | 2918 | } |
diff --git a/drivers/net/sky2.c b/drivers/net/sky2.c index a2070db725c9..6197afb3ed83 100644 --- a/drivers/net/sky2.c +++ b/drivers/net/sky2.c | |||
@@ -31,7 +31,6 @@ | |||
31 | #include <linux/etherdevice.h> | 31 | #include <linux/etherdevice.h> |
32 | #include <linux/ethtool.h> | 32 | #include <linux/ethtool.h> |
33 | #include <linux/pci.h> | 33 | #include <linux/pci.h> |
34 | #include <linux/aer.h> | ||
35 | #include <linux/ip.h> | 34 | #include <linux/ip.h> |
36 | #include <net/ip.h> | 35 | #include <net/ip.h> |
37 | #include <linux/tcp.h> | 36 | #include <linux/tcp.h> |
@@ -240,22 +239,21 @@ static void sky2_power_on(struct sky2_hw *hw) | |||
240 | sky2_write8(hw, B2_Y2_CLK_GATE, 0); | 239 | sky2_write8(hw, B2_Y2_CLK_GATE, 0); |
241 | 240 | ||
242 | if (hw->flags & SKY2_HW_ADV_POWER_CTL) { | 241 | if (hw->flags & SKY2_HW_ADV_POWER_CTL) { |
243 | struct pci_dev *pdev = hw->pdev; | ||
244 | u32 reg; | 242 | u32 reg; |
245 | 243 | ||
246 | pci_write_config_dword(pdev, PCI_DEV_REG3, 0); | 244 | sky2_pci_write32(hw, PCI_DEV_REG3, 0); |
247 | 245 | ||
248 | pci_read_config_dword(pdev, PCI_DEV_REG4, ®); | 246 | reg = sky2_pci_read32(hw, PCI_DEV_REG4); |
249 | /* set all bits to 0 except bits 15..12 and 8 */ | 247 | /* set all bits to 0 except bits 15..12 and 8 */ |
250 | reg &= P_ASPM_CONTROL_MSK; | 248 | reg &= P_ASPM_CONTROL_MSK; |
251 | pci_write_config_dword(pdev, PCI_DEV_REG4, reg); | 249 | sky2_pci_write32(hw, PCI_DEV_REG4, reg); |
252 | 250 | ||
253 | pci_read_config_dword(pdev, PCI_DEV_REG5, ®); | 251 | reg = sky2_pci_read32(hw, PCI_DEV_REG5); |
254 | /* set all bits to 0 except bits 28 & 27 */ | 252 | /* set all bits to 0 except bits 28 & 27 */ |
255 | reg &= P_CTL_TIM_VMAIN_AV_MSK; | 253 | reg &= P_CTL_TIM_VMAIN_AV_MSK; |
256 | pci_write_config_dword(pdev, PCI_DEV_REG5, reg); | 254 | sky2_pci_write32(hw, PCI_DEV_REG5, reg); |
257 | 255 | ||
258 | pci_write_config_dword(pdev, PCI_CFG_REG_1, 0); | 256 | sky2_pci_write32(hw, PCI_CFG_REG_1, 0); |
259 | 257 | ||
260 | /* Enable workaround for dev 4.107 on Yukon-Ultra & Extreme */ | 258 | /* Enable workaround for dev 4.107 on Yukon-Ultra & Extreme */ |
261 | reg = sky2_read32(hw, B2_GP_IO); | 259 | reg = sky2_read32(hw, B2_GP_IO); |
@@ -619,12 +617,11 @@ static void sky2_phy_init(struct sky2_hw *hw, unsigned port) | |||
619 | 617 | ||
620 | static void sky2_phy_power(struct sky2_hw *hw, unsigned port, int onoff) | 618 | static void sky2_phy_power(struct sky2_hw *hw, unsigned port, int onoff) |
621 | { | 619 | { |
622 | struct pci_dev *pdev = hw->pdev; | ||
623 | u32 reg1; | 620 | u32 reg1; |
624 | static const u32 phy_power[] = { PCI_Y2_PHY1_POWD, PCI_Y2_PHY2_POWD }; | 621 | static const u32 phy_power[] = { PCI_Y2_PHY1_POWD, PCI_Y2_PHY2_POWD }; |
625 | static const u32 coma_mode[] = { PCI_Y2_PHY1_COMA, PCI_Y2_PHY2_COMA }; | 622 | static const u32 coma_mode[] = { PCI_Y2_PHY1_COMA, PCI_Y2_PHY2_COMA }; |
626 | 623 | ||
627 | pci_read_config_dword(pdev, PCI_DEV_REG1, ®1); | 624 | reg1 = sky2_pci_read32(hw, PCI_DEV_REG1); |
628 | /* Turn on/off phy power saving */ | 625 | /* Turn on/off phy power saving */ |
629 | if (onoff) | 626 | if (onoff) |
630 | reg1 &= ~phy_power[port]; | 627 | reg1 &= ~phy_power[port]; |
@@ -634,8 +631,8 @@ static void sky2_phy_power(struct sky2_hw *hw, unsigned port, int onoff) | |||
634 | if (onoff && hw->chip_id == CHIP_ID_YUKON_XL && hw->chip_rev > 1) | 631 | if (onoff && hw->chip_id == CHIP_ID_YUKON_XL && hw->chip_rev > 1) |
635 | reg1 |= coma_mode[port]; | 632 | reg1 |= coma_mode[port]; |
636 | 633 | ||
637 | pci_write_config_dword(pdev, PCI_DEV_REG1, reg1); | 634 | sky2_pci_write32(hw, PCI_DEV_REG1, reg1); |
638 | pci_read_config_dword(pdev, PCI_DEV_REG1, ®1); | 635 | reg1 = sky2_pci_read32(hw, PCI_DEV_REG1); |
639 | 636 | ||
640 | udelay(100); | 637 | udelay(100); |
641 | } | 638 | } |
@@ -704,9 +701,9 @@ static void sky2_wol_init(struct sky2_port *sky2) | |||
704 | sky2_write16(hw, WOL_REGS(port, WOL_CTRL_STAT), ctrl); | 701 | sky2_write16(hw, WOL_REGS(port, WOL_CTRL_STAT), ctrl); |
705 | 702 | ||
706 | /* Turn on legacy PCI-Express PME mode */ | 703 | /* Turn on legacy PCI-Express PME mode */ |
707 | pci_read_config_dword(hw->pdev, PCI_DEV_REG1, ®1); | 704 | reg1 = sky2_pci_read32(hw, PCI_DEV_REG1); |
708 | reg1 |= PCI_Y2_PME_LEGACY; | 705 | reg1 |= PCI_Y2_PME_LEGACY; |
709 | pci_write_config_dword(hw->pdev, PCI_DEV_REG1, reg1); | 706 | sky2_pci_write32(hw, PCI_DEV_REG1, reg1); |
710 | 707 | ||
711 | /* block receiver */ | 708 | /* block receiver */ |
712 | sky2_write8(hw, SK_REG(port, RX_GMF_CTRL_T), GMF_RST_SET); | 709 | sky2_write8(hw, SK_REG(port, RX_GMF_CTRL_T), GMF_RST_SET); |
@@ -848,6 +845,13 @@ static void sky2_mac_init(struct sky2_hw *hw, unsigned port) | |||
848 | sky2_set_tx_stfwd(hw, port); | 845 | sky2_set_tx_stfwd(hw, port); |
849 | } | 846 | } |
850 | 847 | ||
848 | if (hw->chip_id == CHIP_ID_YUKON_FE_P && | ||
849 | hw->chip_rev == CHIP_REV_YU_FE2_A0) { | ||
850 | /* disable dynamic watermark */ | ||
851 | reg = sky2_read16(hw, SK_REG(port, TX_GMF_EA)); | ||
852 | reg &= ~TX_DYN_WM_ENA; | ||
853 | sky2_write16(hw, SK_REG(port, TX_GMF_EA), reg); | ||
854 | } | ||
851 | } | 855 | } |
852 | 856 | ||
853 | /* Assign Ram Buffer allocation to queue */ | 857 | /* Assign Ram Buffer allocation to queue */ |
@@ -1320,15 +1324,12 @@ static int sky2_up(struct net_device *dev) | |||
1320 | */ | 1324 | */ |
1321 | if (otherdev && netif_running(otherdev) && | 1325 | if (otherdev && netif_running(otherdev) && |
1322 | (cap = pci_find_capability(hw->pdev, PCI_CAP_ID_PCIX))) { | 1326 | (cap = pci_find_capability(hw->pdev, PCI_CAP_ID_PCIX))) { |
1323 | struct sky2_port *osky2 = netdev_priv(otherdev); | ||
1324 | u16 cmd; | 1327 | u16 cmd; |
1325 | 1328 | ||
1326 | pci_read_config_word(hw->pdev, cap + PCI_X_CMD, &cmd); | 1329 | cmd = sky2_pci_read16(hw, cap + PCI_X_CMD); |
1327 | cmd &= ~PCI_X_CMD_MAX_SPLIT; | 1330 | cmd &= ~PCI_X_CMD_MAX_SPLIT; |
1328 | pci_write_config_word(hw->pdev, cap + PCI_X_CMD, cmd); | 1331 | sky2_pci_write16(hw, cap + PCI_X_CMD, cmd); |
1329 | 1332 | ||
1330 | sky2->rx_csum = 0; | ||
1331 | osky2->rx_csum = 0; | ||
1332 | } | 1333 | } |
1333 | 1334 | ||
1334 | if (netif_msg_ifup(sky2)) | 1335 | if (netif_msg_ifup(sky2)) |
@@ -2426,37 +2427,26 @@ static void sky2_hw_intr(struct sky2_hw *hw) | |||
2426 | if (status & (Y2_IS_MST_ERR | Y2_IS_IRQ_STAT)) { | 2427 | if (status & (Y2_IS_MST_ERR | Y2_IS_IRQ_STAT)) { |
2427 | u16 pci_err; | 2428 | u16 pci_err; |
2428 | 2429 | ||
2429 | pci_read_config_word(pdev, PCI_STATUS, &pci_err); | 2430 | pci_err = sky2_pci_read16(hw, PCI_STATUS); |
2430 | if (net_ratelimit()) | 2431 | if (net_ratelimit()) |
2431 | dev_err(&pdev->dev, "PCI hardware error (0x%x)\n", | 2432 | dev_err(&pdev->dev, "PCI hardware error (0x%x)\n", |
2432 | pci_err); | 2433 | pci_err); |
2433 | 2434 | ||
2434 | pci_write_config_word(pdev, PCI_STATUS, | 2435 | sky2_pci_write16(hw, PCI_STATUS, |
2435 | pci_err | PCI_STATUS_ERROR_BITS); | 2436 | pci_err | PCI_STATUS_ERROR_BITS); |
2436 | } | 2437 | } |
2437 | 2438 | ||
2438 | if (status & Y2_IS_PCI_EXP) { | 2439 | if (status & Y2_IS_PCI_EXP) { |
2439 | /* PCI-Express uncorrectable Error occurred */ | 2440 | /* PCI-Express uncorrectable Error occurred */ |
2440 | int aer = pci_find_aer_capability(hw->pdev); | ||
2441 | u32 err; | 2441 | u32 err; |
2442 | 2442 | ||
2443 | if (aer) { | 2443 | err = sky2_read32(hw, Y2_CFG_AER + PCI_ERR_UNCOR_STATUS); |
2444 | pci_read_config_dword(pdev, aer + PCI_ERR_UNCOR_STATUS, | 2444 | sky2_write32(hw, Y2_CFG_AER + PCI_ERR_UNCOR_STATUS, |
2445 | &err); | 2445 | 0xfffffffful); |
2446 | pci_cleanup_aer_uncorrect_error_status(pdev); | ||
2447 | } else { | ||
2448 | /* Either AER not configured, or not working | ||
2449 | * because of bad MMCONFIG, so just do recover | ||
2450 | * manually. | ||
2451 | */ | ||
2452 | err = sky2_read32(hw, Y2_CFG_AER + PCI_ERR_UNCOR_STATUS); | ||
2453 | sky2_write32(hw, Y2_CFG_AER + PCI_ERR_UNCOR_STATUS, | ||
2454 | 0xfffffffful); | ||
2455 | } | ||
2456 | |||
2457 | if (net_ratelimit()) | 2446 | if (net_ratelimit()) |
2458 | dev_err(&pdev->dev, "PCI Express error (0x%x)\n", err); | 2447 | dev_err(&pdev->dev, "PCI Express error (0x%x)\n", err); |
2459 | 2448 | ||
2449 | sky2_read32(hw, Y2_CFG_AER + PCI_ERR_UNCOR_STATUS); | ||
2460 | } | 2450 | } |
2461 | 2451 | ||
2462 | if (status & Y2_HWE_L1_MASK) | 2452 | if (status & Y2_HWE_L1_MASK) |
@@ -2703,13 +2693,10 @@ static inline u32 sky2_clk2us(const struct sky2_hw *hw, u32 clk) | |||
2703 | 2693 | ||
2704 | static int __devinit sky2_init(struct sky2_hw *hw) | 2694 | static int __devinit sky2_init(struct sky2_hw *hw) |
2705 | { | 2695 | { |
2706 | int rc; | ||
2707 | u8 t8; | 2696 | u8 t8; |
2708 | 2697 | ||
2709 | /* Enable all clocks and check for bad PCI access */ | 2698 | /* Enable all clocks and check for bad PCI access */ |
2710 | rc = pci_write_config_dword(hw->pdev, PCI_DEV_REG3, 0); | 2699 | sky2_pci_write32(hw, PCI_DEV_REG3, 0); |
2711 | if (rc) | ||
2712 | return rc; | ||
2713 | 2700 | ||
2714 | sky2_write8(hw, B0_CTST, CS_RST_CLR); | 2701 | sky2_write8(hw, B0_CTST, CS_RST_CLR); |
2715 | 2702 | ||
@@ -2806,32 +2793,21 @@ static void sky2_reset(struct sky2_hw *hw) | |||
2806 | sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON); | 2793 | sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON); |
2807 | 2794 | ||
2808 | /* clear PCI errors, if any */ | 2795 | /* clear PCI errors, if any */ |
2809 | pci_read_config_word(pdev, PCI_STATUS, &status); | 2796 | status = sky2_pci_read16(hw, PCI_STATUS); |
2810 | status |= PCI_STATUS_ERROR_BITS; | 2797 | status |= PCI_STATUS_ERROR_BITS; |
2811 | pci_write_config_word(pdev, PCI_STATUS, status); | 2798 | sky2_pci_write16(hw, PCI_STATUS, status); |
2812 | 2799 | ||
2813 | sky2_write8(hw, B0_CTST, CS_MRST_CLR); | 2800 | sky2_write8(hw, B0_CTST, CS_MRST_CLR); |
2814 | 2801 | ||
2815 | cap = pci_find_capability(pdev, PCI_CAP_ID_EXP); | 2802 | cap = pci_find_capability(pdev, PCI_CAP_ID_EXP); |
2816 | if (cap) { | 2803 | if (cap) { |
2817 | if (pci_find_aer_capability(pdev)) { | 2804 | sky2_write32(hw, Y2_CFG_AER + PCI_ERR_UNCOR_STATUS, |
2818 | /* Check for advanced error reporting */ | 2805 | 0xfffffffful); |
2819 | pci_cleanup_aer_uncorrect_error_status(pdev); | ||
2820 | pci_cleanup_aer_correct_error_status(pdev); | ||
2821 | } else { | ||
2822 | dev_warn(&pdev->dev, | ||
2823 | "PCI Express Advanced Error Reporting" | ||
2824 | " not configured or MMCONFIG problem?\n"); | ||
2825 | |||
2826 | sky2_write32(hw, Y2_CFG_AER + PCI_ERR_UNCOR_STATUS, | ||
2827 | 0xfffffffful); | ||
2828 | } | ||
2829 | 2806 | ||
2830 | /* If error bit is stuck on ignore it */ | 2807 | /* If error bit is stuck on ignore it */ |
2831 | if (sky2_read32(hw, B0_HWE_ISRC) & Y2_IS_PCI_EXP) | 2808 | if (sky2_read32(hw, B0_HWE_ISRC) & Y2_IS_PCI_EXP) |
2832 | dev_info(&pdev->dev, "ignoring stuck error report bit\n"); | 2809 | dev_info(&pdev->dev, "ignoring stuck error report bit\n"); |
2833 | 2810 | else | |
2834 | else if (pci_enable_pcie_error_reporting(pdev)) | ||
2835 | hwe_mask |= Y2_IS_PCI_EXP; | 2811 | hwe_mask |= Y2_IS_PCI_EXP; |
2836 | } | 2812 | } |
2837 | 2813 | ||
@@ -2930,16 +2906,14 @@ static void sky2_restart(struct work_struct *work) | |||
2930 | int i, err; | 2906 | int i, err; |
2931 | 2907 | ||
2932 | rtnl_lock(); | 2908 | rtnl_lock(); |
2933 | sky2_write32(hw, B0_IMSK, 0); | ||
2934 | sky2_read32(hw, B0_IMSK); | ||
2935 | napi_disable(&hw->napi); | ||
2936 | |||
2937 | for (i = 0; i < hw->ports; i++) { | 2909 | for (i = 0; i < hw->ports; i++) { |
2938 | dev = hw->dev[i]; | 2910 | dev = hw->dev[i]; |
2939 | if (netif_running(dev)) | 2911 | if (netif_running(dev)) |
2940 | sky2_down(dev); | 2912 | sky2_down(dev); |
2941 | } | 2913 | } |
2942 | 2914 | ||
2915 | napi_disable(&hw->napi); | ||
2916 | sky2_write32(hw, B0_IMSK, 0); | ||
2943 | sky2_reset(hw); | 2917 | sky2_reset(hw); |
2944 | sky2_write32(hw, B0_IMSK, Y2_IS_BASE); | 2918 | sky2_write32(hw, B0_IMSK, Y2_IS_BASE); |
2945 | napi_enable(&hw->napi); | 2919 | napi_enable(&hw->napi); |
@@ -3672,32 +3646,33 @@ static int sky2_set_tso(struct net_device *dev, u32 data) | |||
3672 | static int sky2_get_eeprom_len(struct net_device *dev) | 3646 | static int sky2_get_eeprom_len(struct net_device *dev) |
3673 | { | 3647 | { |
3674 | struct sky2_port *sky2 = netdev_priv(dev); | 3648 | struct sky2_port *sky2 = netdev_priv(dev); |
3649 | struct sky2_hw *hw = sky2->hw; | ||
3675 | u16 reg2; | 3650 | u16 reg2; |
3676 | 3651 | ||
3677 | pci_read_config_word(sky2->hw->pdev, PCI_DEV_REG2, ®2); | 3652 | reg2 = sky2_pci_read16(hw, PCI_DEV_REG2); |
3678 | return 1 << ( ((reg2 & PCI_VPD_ROM_SZ) >> 14) + 8); | 3653 | return 1 << ( ((reg2 & PCI_VPD_ROM_SZ) >> 14) + 8); |
3679 | } | 3654 | } |
3680 | 3655 | ||
3681 | static u32 sky2_vpd_read(struct pci_dev *pdev, int cap, u16 offset) | 3656 | static u32 sky2_vpd_read(struct sky2_hw *hw, int cap, u16 offset) |
3682 | { | 3657 | { |
3683 | u32 val; | 3658 | u32 val; |
3684 | 3659 | ||
3685 | pci_write_config_word(pdev, cap + PCI_VPD_ADDR, offset); | 3660 | sky2_pci_write16(hw, cap + PCI_VPD_ADDR, offset); |
3686 | 3661 | ||
3687 | do { | 3662 | do { |
3688 | pci_read_config_word(pdev, cap + PCI_VPD_ADDR, &offset); | 3663 | offset = sky2_pci_read16(hw, cap + PCI_VPD_ADDR); |
3689 | } while (!(offset & PCI_VPD_ADDR_F)); | 3664 | } while (!(offset & PCI_VPD_ADDR_F)); |
3690 | 3665 | ||
3691 | pci_read_config_dword(pdev, cap + PCI_VPD_DATA, &val); | 3666 | val = sky2_pci_read32(hw, cap + PCI_VPD_DATA); |
3692 | return val; | 3667 | return val; |
3693 | } | 3668 | } |
3694 | 3669 | ||
3695 | static void sky2_vpd_write(struct pci_dev *pdev, int cap, u16 offset, u32 val) | 3670 | static void sky2_vpd_write(struct sky2_hw *hw, int cap, u16 offset, u32 val) |
3696 | { | 3671 | { |
3697 | pci_write_config_word(pdev, cap + PCI_VPD_DATA, val); | 3672 | sky2_pci_write16(hw, cap + PCI_VPD_DATA, val); |
3698 | pci_write_config_dword(pdev, cap + PCI_VPD_ADDR, offset | PCI_VPD_ADDR_F); | 3673 | sky2_pci_write32(hw, cap + PCI_VPD_ADDR, offset | PCI_VPD_ADDR_F); |
3699 | do { | 3674 | do { |
3700 | pci_read_config_word(pdev, cap + PCI_VPD_ADDR, &offset); | 3675 | offset = sky2_pci_read16(hw, cap + PCI_VPD_ADDR); |
3701 | } while (offset & PCI_VPD_ADDR_F); | 3676 | } while (offset & PCI_VPD_ADDR_F); |
3702 | } | 3677 | } |
3703 | 3678 | ||
@@ -3715,7 +3690,7 @@ static int sky2_get_eeprom(struct net_device *dev, struct ethtool_eeprom *eeprom | |||
3715 | eeprom->magic = SKY2_EEPROM_MAGIC; | 3690 | eeprom->magic = SKY2_EEPROM_MAGIC; |
3716 | 3691 | ||
3717 | while (length > 0) { | 3692 | while (length > 0) { |
3718 | u32 val = sky2_vpd_read(sky2->hw->pdev, cap, offset); | 3693 | u32 val = sky2_vpd_read(sky2->hw, cap, offset); |
3719 | int n = min_t(int, length, sizeof(val)); | 3694 | int n = min_t(int, length, sizeof(val)); |
3720 | 3695 | ||
3721 | memcpy(data, &val, n); | 3696 | memcpy(data, &val, n); |
@@ -3745,10 +3720,10 @@ static int sky2_set_eeprom(struct net_device *dev, struct ethtool_eeprom *eeprom | |||
3745 | int n = min_t(int, length, sizeof(val)); | 3720 | int n = min_t(int, length, sizeof(val)); |
3746 | 3721 | ||
3747 | if (n < sizeof(val)) | 3722 | if (n < sizeof(val)) |
3748 | val = sky2_vpd_read(sky2->hw->pdev, cap, offset); | 3723 | val = sky2_vpd_read(sky2->hw, cap, offset); |
3749 | memcpy(&val, data, n); | 3724 | memcpy(&val, data, n); |
3750 | 3725 | ||
3751 | sky2_vpd_write(sky2->hw->pdev, cap, offset, val); | 3726 | sky2_vpd_write(sky2->hw, cap, offset, val); |
3752 | 3727 | ||
3753 | length -= n; | 3728 | length -= n; |
3754 | data += n; | 3729 | data += n; |
@@ -4013,7 +3988,7 @@ static __devinit struct net_device *sky2_init_netdev(struct sky2_hw *hw, | |||
4013 | sky2->duplex = -1; | 3988 | sky2->duplex = -1; |
4014 | sky2->speed = -1; | 3989 | sky2->speed = -1; |
4015 | sky2->advertising = sky2_supported_modes(hw); | 3990 | sky2->advertising = sky2_supported_modes(hw); |
4016 | sky2->rx_csum = 1; | 3991 | sky2->rx_csum = (hw->chip_id != CHIP_ID_YUKON_XL); |
4017 | sky2->wol = wol; | 3992 | sky2->wol = wol; |
4018 | 3993 | ||
4019 | spin_lock_init(&sky2->phy_lock); | 3994 | spin_lock_init(&sky2->phy_lock); |
@@ -4184,9 +4159,9 @@ static int __devinit sky2_probe(struct pci_dev *pdev, | |||
4184 | */ | 4159 | */ |
4185 | { | 4160 | { |
4186 | u32 reg; | 4161 | u32 reg; |
4187 | pci_read_config_dword(pdev,PCI_DEV_REG2, ®); | 4162 | reg = sky2_pci_read32(hw, PCI_DEV_REG2); |
4188 | reg &= ~PCI_REV_DESC; | 4163 | reg &= ~PCI_REV_DESC; |
4189 | pci_write_config_dword(pdev, PCI_DEV_REG2, reg); | 4164 | sky2_pci_write32(hw, PCI_DEV_REG2, reg); |
4190 | } | 4165 | } |
4191 | #endif | 4166 | #endif |
4192 | 4167 | ||
@@ -4377,7 +4352,7 @@ static int sky2_resume(struct pci_dev *pdev) | |||
4377 | if (hw->chip_id == CHIP_ID_YUKON_EX || | 4352 | if (hw->chip_id == CHIP_ID_YUKON_EX || |
4378 | hw->chip_id == CHIP_ID_YUKON_EC_U || | 4353 | hw->chip_id == CHIP_ID_YUKON_EC_U || |
4379 | hw->chip_id == CHIP_ID_YUKON_FE_P) | 4354 | hw->chip_id == CHIP_ID_YUKON_FE_P) |
4380 | pci_write_config_dword(pdev, PCI_DEV_REG3, 0); | 4355 | sky2_pci_write32(hw, PCI_DEV_REG3, 0); |
4381 | 4356 | ||
4382 | sky2_reset(hw); | 4357 | sky2_reset(hw); |
4383 | sky2_write32(hw, B0_IMSK, Y2_IS_BASE); | 4358 | sky2_write32(hw, B0_IMSK, Y2_IS_BASE); |
diff --git a/drivers/net/sky2.h b/drivers/net/sky2.h index 69525fd7908d..bc646a47edd2 100644 --- a/drivers/net/sky2.h +++ b/drivers/net/sky2.h | |||
@@ -2128,4 +2128,25 @@ static inline void gma_set_addr(struct sky2_hw *hw, unsigned port, unsigned reg, | |||
2128 | gma_write16(hw, port, reg+4,(u16) addr[2] | ((u16) addr[3] << 8)); | 2128 | gma_write16(hw, port, reg+4,(u16) addr[2] | ((u16) addr[3] << 8)); |
2129 | gma_write16(hw, port, reg+8,(u16) addr[4] | ((u16) addr[5] << 8)); | 2129 | gma_write16(hw, port, reg+8,(u16) addr[4] | ((u16) addr[5] << 8)); |
2130 | } | 2130 | } |
2131 | |||
2132 | /* PCI config space access */ | ||
2133 | static inline u32 sky2_pci_read32(const struct sky2_hw *hw, unsigned reg) | ||
2134 | { | ||
2135 | return sky2_read32(hw, Y2_CFG_SPC + reg); | ||
2136 | } | ||
2137 | |||
2138 | static inline u16 sky2_pci_read16(const struct sky2_hw *hw, unsigned reg) | ||
2139 | { | ||
2140 | return sky2_read16(hw, Y2_CFG_SPC + reg); | ||
2141 | } | ||
2142 | |||
2143 | static inline void sky2_pci_write32(struct sky2_hw *hw, unsigned reg, u32 val) | ||
2144 | { | ||
2145 | sky2_write32(hw, Y2_CFG_SPC + reg, val); | ||
2146 | } | ||
2147 | |||
2148 | static inline void sky2_pci_write16(struct sky2_hw *hw, unsigned reg, u16 val) | ||
2149 | { | ||
2150 | sky2_write16(hw, Y2_CFG_SPC + reg, val); | ||
2151 | } | ||
2131 | #endif | 2152 | #endif |
diff --git a/drivers/net/smc911x.c b/drivers/net/smc911x.c index dd18af0ce676..76cc1d3adf71 100644 --- a/drivers/net/smc911x.c +++ b/drivers/net/smc911x.c | |||
@@ -428,7 +428,6 @@ static inline void smc911x_drop_pkt(struct net_device *dev) | |||
428 | */ | 428 | */ |
429 | static inline void smc911x_rcv(struct net_device *dev) | 429 | static inline void smc911x_rcv(struct net_device *dev) |
430 | { | 430 | { |
431 | struct smc911x_local *lp = netdev_priv(dev); | ||
432 | unsigned long ioaddr = dev->base_addr; | 431 | unsigned long ioaddr = dev->base_addr; |
433 | unsigned int pkt_len, status; | 432 | unsigned int pkt_len, status; |
434 | struct sk_buff *skb; | 433 | struct sk_buff *skb; |
@@ -473,6 +472,7 @@ static inline void smc911x_rcv(struct net_device *dev) | |||
473 | skb_put(skb,pkt_len-4); | 472 | skb_put(skb,pkt_len-4); |
474 | #ifdef SMC_USE_DMA | 473 | #ifdef SMC_USE_DMA |
475 | { | 474 | { |
475 | struct smc911x_local *lp = netdev_priv(dev); | ||
476 | unsigned int fifo; | 476 | unsigned int fifo; |
477 | /* Lower the FIFO threshold if possible */ | 477 | /* Lower the FIFO threshold if possible */ |
478 | fifo = SMC_GET_FIFO_INT(); | 478 | fifo = SMC_GET_FIFO_INT(); |
@@ -1299,9 +1299,9 @@ smc911x_rx_dma_irq(int dma, void *data) | |||
1299 | PRINT_PKT(skb->data, skb->len); | 1299 | PRINT_PKT(skb->data, skb->len); |
1300 | dev->last_rx = jiffies; | 1300 | dev->last_rx = jiffies; |
1301 | skb->protocol = eth_type_trans(skb, dev); | 1301 | skb->protocol = eth_type_trans(skb, dev); |
1302 | netif_rx(skb); | ||
1303 | dev->stats.rx_packets++; | 1302 | dev->stats.rx_packets++; |
1304 | dev->stats.rx_bytes += skb->len; | 1303 | dev->stats.rx_bytes += skb->len; |
1304 | netif_rx(skb); | ||
1305 | 1305 | ||
1306 | spin_lock_irqsave(&lp->lock, flags); | 1306 | spin_lock_irqsave(&lp->lock, flags); |
1307 | pkts = (SMC_GET_RX_FIFO_INF() & RX_FIFO_INF_RXSUSED_) >> 16; | 1307 | pkts = (SMC_GET_RX_FIFO_INF() & RX_FIFO_INF_RXSUSED_) >> 16; |
@@ -1379,13 +1379,6 @@ static void smc911x_set_multicast_list(struct net_device *dev) | |||
1379 | unsigned int multicast_table[2]; | 1379 | unsigned int multicast_table[2]; |
1380 | unsigned int mcr, update_multicast = 0; | 1380 | unsigned int mcr, update_multicast = 0; |
1381 | unsigned long flags; | 1381 | unsigned long flags; |
1382 | /* table for flipping the order of 5 bits */ | ||
1383 | static const unsigned char invert5[] = | ||
1384 | {0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0C, 0x1C, | ||
1385 | 0x02, 0x12, 0x0A, 0x1A, 0x06, 0x16, 0x0E, 0x1E, | ||
1386 | 0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0D, 0x1D, | ||
1387 | 0x03, 0x13, 0x0B, 0x1B, 0x07, 0x17, 0x0F, 0x1F}; | ||
1388 | |||
1389 | 1382 | ||
1390 | DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__); | 1383 | DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__); |
1391 | 1384 | ||
@@ -1432,7 +1425,7 @@ static void smc911x_set_multicast_list(struct net_device *dev) | |||
1432 | 1425 | ||
1433 | cur_addr = dev->mc_list; | 1426 | cur_addr = dev->mc_list; |
1434 | for (i = 0; i < dev->mc_count; i++, cur_addr = cur_addr->next) { | 1427 | for (i = 0; i < dev->mc_count; i++, cur_addr = cur_addr->next) { |
1435 | int position; | 1428 | u32 position; |
1436 | 1429 | ||
1437 | /* do we have a pointer here? */ | 1430 | /* do we have a pointer here? */ |
1438 | if (!cur_addr) | 1431 | if (!cur_addr) |
@@ -1442,12 +1435,10 @@ static void smc911x_set_multicast_list(struct net_device *dev) | |||
1442 | if (!(*cur_addr->dmi_addr & 1)) | 1435 | if (!(*cur_addr->dmi_addr & 1)) |
1443 | continue; | 1436 | continue; |
1444 | 1437 | ||
1445 | /* only use the low order bits */ | 1438 | /* upper 6 bits are used as hash index */ |
1446 | position = crc32_le(~0, cur_addr->dmi_addr, 6) & 0x3f; | 1439 | position = ether_crc(ETH_ALEN, cur_addr->dmi_addr)>>26; |
1447 | 1440 | ||
1448 | /* do some messy swapping to put the bit in the right spot */ | 1441 | multicast_table[position>>5] |= 1 << (position&0x1f); |
1449 | multicast_table[invert5[position&0x1F]&0x1] |= | ||
1450 | (1<<invert5[(position>>1)&0x1F]); | ||
1451 | } | 1442 | } |
1452 | 1443 | ||
1453 | /* be sure I get rid of flags I might have set */ | 1444 | /* be sure I get rid of flags I might have set */ |
diff --git a/drivers/net/smc911x.h b/drivers/net/smc911x.h index 16a0edc078fd..d04e4fa35206 100644 --- a/drivers/net/smc911x.h +++ b/drivers/net/smc911x.h | |||
@@ -37,7 +37,7 @@ | |||
37 | #define SMC_USE_16BIT 0 | 37 | #define SMC_USE_16BIT 0 |
38 | #define SMC_USE_32BIT 1 | 38 | #define SMC_USE_32BIT 1 |
39 | #define SMC_IRQ_SENSE IRQF_TRIGGER_FALLING | 39 | #define SMC_IRQ_SENSE IRQF_TRIGGER_FALLING |
40 | #elif CONFIG_SH_MAGIC_PANEL_R2 | 40 | #elif defined(CONFIG_SH_MAGIC_PANEL_R2) |
41 | #define SMC_USE_SH_DMA 0 | 41 | #define SMC_USE_SH_DMA 0 |
42 | #define SMC_USE_16BIT 0 | 42 | #define SMC_USE_16BIT 0 |
43 | #define SMC_USE_32BIT 1 | 43 | #define SMC_USE_32BIT 1 |
diff --git a/drivers/net/smc91x.h b/drivers/net/smc91x.h index db34e1eb67e9..07b7f7120e37 100644 --- a/drivers/net/smc91x.h +++ b/drivers/net/smc91x.h | |||
@@ -55,7 +55,7 @@ | |||
55 | #define SMC_insw(a, r, p, l) readsw((a) + (r), p, l) | 55 | #define SMC_insw(a, r, p, l) readsw((a) + (r), p, l) |
56 | #define SMC_outsw(a, r, p, l) writesw((a) + (r), p, l) | 56 | #define SMC_outsw(a, r, p, l) writesw((a) + (r), p, l) |
57 | 57 | ||
58 | #elif defined(CONFIG_BFIN) | 58 | #elif defined(CONFIG_BLACKFIN) |
59 | 59 | ||
60 | #define SMC_IRQ_FLAGS IRQF_TRIGGER_HIGH | 60 | #define SMC_IRQ_FLAGS IRQF_TRIGGER_HIGH |
61 | #define RPC_LSA_DEFAULT RPC_LED_100_10 | 61 | #define RPC_LSA_DEFAULT RPC_LED_100_10 |
diff --git a/drivers/net/sungem.c b/drivers/net/sungem.c index f6fedcc32de1..68872142530b 100644 --- a/drivers/net/sungem.c +++ b/drivers/net/sungem.c | |||
@@ -2281,14 +2281,12 @@ static void gem_reset_task(struct work_struct *work) | |||
2281 | 2281 | ||
2282 | mutex_lock(&gp->pm_mutex); | 2282 | mutex_lock(&gp->pm_mutex); |
2283 | 2283 | ||
2284 | napi_disable(&gp->napi); | 2284 | if (gp->opened) |
2285 | napi_disable(&gp->napi); | ||
2285 | 2286 | ||
2286 | spin_lock_irq(&gp->lock); | 2287 | spin_lock_irq(&gp->lock); |
2287 | spin_lock(&gp->tx_lock); | 2288 | spin_lock(&gp->tx_lock); |
2288 | 2289 | ||
2289 | if (gp->running == 0) | ||
2290 | goto not_running; | ||
2291 | |||
2292 | if (gp->running) { | 2290 | if (gp->running) { |
2293 | netif_stop_queue(gp->dev); | 2291 | netif_stop_queue(gp->dev); |
2294 | 2292 | ||
@@ -2298,13 +2296,14 @@ static void gem_reset_task(struct work_struct *work) | |||
2298 | gem_set_link_modes(gp); | 2296 | gem_set_link_modes(gp); |
2299 | netif_wake_queue(gp->dev); | 2297 | netif_wake_queue(gp->dev); |
2300 | } | 2298 | } |
2301 | not_running: | 2299 | |
2302 | gp->reset_task_pending = 0; | 2300 | gp->reset_task_pending = 0; |
2303 | 2301 | ||
2304 | spin_unlock(&gp->tx_lock); | 2302 | spin_unlock(&gp->tx_lock); |
2305 | spin_unlock_irq(&gp->lock); | 2303 | spin_unlock_irq(&gp->lock); |
2306 | 2304 | ||
2307 | napi_enable(&gp->napi); | 2305 | if (gp->opened) |
2306 | napi_enable(&gp->napi); | ||
2308 | 2307 | ||
2309 | mutex_unlock(&gp->pm_mutex); | 2308 | mutex_unlock(&gp->pm_mutex); |
2310 | } | 2309 | } |
diff --git a/drivers/net/tulip/dmfe.c b/drivers/net/tulip/dmfe.c index ca90566d5bcd..b4891caeae5a 100644 --- a/drivers/net/tulip/dmfe.c +++ b/drivers/net/tulip/dmfe.c | |||
@@ -2118,8 +2118,8 @@ static int dmfe_suspend(struct pci_dev *pci_dev, pm_message_t state) | |||
2118 | pci_enable_wake(pci_dev, PCI_D3cold, 1); | 2118 | pci_enable_wake(pci_dev, PCI_D3cold, 1); |
2119 | 2119 | ||
2120 | /* Power down device*/ | 2120 | /* Power down device*/ |
2121 | pci_set_power_state(pci_dev, pci_choose_state (pci_dev,state)); | ||
2122 | pci_save_state(pci_dev); | 2121 | pci_save_state(pci_dev); |
2122 | pci_set_power_state(pci_dev, pci_choose_state (pci_dev, state)); | ||
2123 | 2123 | ||
2124 | return 0; | 2124 | return 0; |
2125 | } | 2125 | } |
@@ -2129,8 +2129,8 @@ static int dmfe_resume(struct pci_dev *pci_dev) | |||
2129 | struct net_device *dev = pci_get_drvdata(pci_dev); | 2129 | struct net_device *dev = pci_get_drvdata(pci_dev); |
2130 | u32 tmp; | 2130 | u32 tmp; |
2131 | 2131 | ||
2132 | pci_restore_state(pci_dev); | ||
2133 | pci_set_power_state(pci_dev, PCI_D0); | 2132 | pci_set_power_state(pci_dev, PCI_D0); |
2133 | pci_restore_state(pci_dev); | ||
2134 | 2134 | ||
2135 | /* Re-initilize DM910X board */ | 2135 | /* Re-initilize DM910X board */ |
2136 | dmfe_init_dm910x(dev); | 2136 | dmfe_init_dm910x(dev); |
diff --git a/drivers/net/ucc_geth.c b/drivers/net/ucc_geth.c index a3ff270593f1..7f689907ac28 100644 --- a/drivers/net/ucc_geth.c +++ b/drivers/net/ucc_geth.c | |||
@@ -1460,6 +1460,8 @@ static int adjust_enet_interface(struct ucc_geth_private *ugeth) | |||
1460 | if ((ugeth->phy_interface == PHY_INTERFACE_MODE_RMII) || | 1460 | if ((ugeth->phy_interface == PHY_INTERFACE_MODE_RMII) || |
1461 | (ugeth->phy_interface == PHY_INTERFACE_MODE_RGMII) || | 1461 | (ugeth->phy_interface == PHY_INTERFACE_MODE_RGMII) || |
1462 | (ugeth->phy_interface == PHY_INTERFACE_MODE_RGMII_ID) || | 1462 | (ugeth->phy_interface == PHY_INTERFACE_MODE_RGMII_ID) || |
1463 | (ugeth->phy_interface == PHY_INTERFACE_MODE_RGMII_RXID) || | ||
1464 | (ugeth->phy_interface == PHY_INTERFACE_MODE_RGMII_TXID) || | ||
1463 | (ugeth->phy_interface == PHY_INTERFACE_MODE_RTBI)) { | 1465 | (ugeth->phy_interface == PHY_INTERFACE_MODE_RTBI)) { |
1464 | upsmr |= UPSMR_RPM; | 1466 | upsmr |= UPSMR_RPM; |
1465 | switch (ugeth->max_speed) { | 1467 | switch (ugeth->max_speed) { |
@@ -1557,6 +1559,8 @@ static void adjust_link(struct net_device *dev) | |||
1557 | if ((ugeth->phy_interface == PHY_INTERFACE_MODE_RMII) || | 1559 | if ((ugeth->phy_interface == PHY_INTERFACE_MODE_RMII) || |
1558 | (ugeth->phy_interface == PHY_INTERFACE_MODE_RGMII) || | 1560 | (ugeth->phy_interface == PHY_INTERFACE_MODE_RGMII) || |
1559 | (ugeth->phy_interface == PHY_INTERFACE_MODE_RGMII_ID) || | 1561 | (ugeth->phy_interface == PHY_INTERFACE_MODE_RGMII_ID) || |
1562 | (ugeth->phy_interface == PHY_INTERFACE_MODE_RGMII_RXID) || | ||
1563 | (ugeth->phy_interface == PHY_INTERFACE_MODE_RGMII_TXID) || | ||
1560 | (ugeth->phy_interface == PHY_INTERFACE_MODE_RTBI)) { | 1564 | (ugeth->phy_interface == PHY_INTERFACE_MODE_RTBI)) { |
1561 | if (phydev->speed == SPEED_10) | 1565 | if (phydev->speed == SPEED_10) |
1562 | upsmr |= UPSMR_R10M; | 1566 | upsmr |= UPSMR_R10M; |
@@ -3795,6 +3799,10 @@ static phy_interface_t to_phy_interface(const char *phy_connection_type) | |||
3795 | return PHY_INTERFACE_MODE_RGMII; | 3799 | return PHY_INTERFACE_MODE_RGMII; |
3796 | if (strcasecmp(phy_connection_type, "rgmii-id") == 0) | 3800 | if (strcasecmp(phy_connection_type, "rgmii-id") == 0) |
3797 | return PHY_INTERFACE_MODE_RGMII_ID; | 3801 | return PHY_INTERFACE_MODE_RGMII_ID; |
3802 | if (strcasecmp(phy_connection_type, "rgmii-txid") == 0) | ||
3803 | return PHY_INTERFACE_MODE_RGMII_TXID; | ||
3804 | if (strcasecmp(phy_connection_type, "rgmii-rxid") == 0) | ||
3805 | return PHY_INTERFACE_MODE_RGMII_RXID; | ||
3798 | if (strcasecmp(phy_connection_type, "rtbi") == 0) | 3806 | if (strcasecmp(phy_connection_type, "rtbi") == 0) |
3799 | return PHY_INTERFACE_MODE_RTBI; | 3807 | return PHY_INTERFACE_MODE_RTBI; |
3800 | 3808 | ||
@@ -3889,6 +3897,8 @@ static int ucc_geth_probe(struct of_device* ofdev, const struct of_device_id *ma | |||
3889 | case PHY_INTERFACE_MODE_GMII: | 3897 | case PHY_INTERFACE_MODE_GMII: |
3890 | case PHY_INTERFACE_MODE_RGMII: | 3898 | case PHY_INTERFACE_MODE_RGMII: |
3891 | case PHY_INTERFACE_MODE_RGMII_ID: | 3899 | case PHY_INTERFACE_MODE_RGMII_ID: |
3900 | case PHY_INTERFACE_MODE_RGMII_RXID: | ||
3901 | case PHY_INTERFACE_MODE_RGMII_TXID: | ||
3892 | case PHY_INTERFACE_MODE_TBI: | 3902 | case PHY_INTERFACE_MODE_TBI: |
3893 | case PHY_INTERFACE_MODE_RTBI: | 3903 | case PHY_INTERFACE_MODE_RTBI: |
3894 | max_speed = SPEED_1000; | 3904 | max_speed = SPEED_1000; |
diff --git a/drivers/net/usb/dm9601.c b/drivers/net/usb/dm9601.c index 2c685734b7a4..1ffdd106f4c4 100644 --- a/drivers/net/usb/dm9601.c +++ b/drivers/net/usb/dm9601.c | |||
@@ -94,7 +94,7 @@ static void dm_write_async_callback(struct urb *urb) | |||
94 | struct usb_ctrlrequest *req = (struct usb_ctrlrequest *)urb->context; | 94 | struct usb_ctrlrequest *req = (struct usb_ctrlrequest *)urb->context; |
95 | 95 | ||
96 | if (urb->status < 0) | 96 | if (urb->status < 0) |
97 | printk(KERN_DEBUG "dm_write_async_callback() failed with %d", | 97 | printk(KERN_DEBUG "dm_write_async_callback() failed with %d\n", |
98 | urb->status); | 98 | urb->status); |
99 | 99 | ||
100 | kfree(req); | 100 | kfree(req); |
diff --git a/drivers/net/via-velocity.c b/drivers/net/via-velocity.c index 450e29d7a9f3..35cd65d6b9ed 100644 --- a/drivers/net/via-velocity.c +++ b/drivers/net/via-velocity.c | |||
@@ -1242,6 +1242,9 @@ static int velocity_rx_refill(struct velocity_info *vptr) | |||
1242 | static int velocity_init_rd_ring(struct velocity_info *vptr) | 1242 | static int velocity_init_rd_ring(struct velocity_info *vptr) |
1243 | { | 1243 | { |
1244 | int ret; | 1244 | int ret; |
1245 | int mtu = vptr->dev->mtu; | ||
1246 | |||
1247 | vptr->rx_buf_sz = (mtu <= ETH_DATA_LEN) ? PKT_BUF_SZ : mtu + 32; | ||
1245 | 1248 | ||
1246 | vptr->rd_info = kcalloc(vptr->options.numrx, | 1249 | vptr->rd_info = kcalloc(vptr->options.numrx, |
1247 | sizeof(struct velocity_rd_info), GFP_KERNEL); | 1250 | sizeof(struct velocity_rd_info), GFP_KERNEL); |
@@ -1898,8 +1901,6 @@ static int velocity_open(struct net_device *dev) | |||
1898 | struct velocity_info *vptr = netdev_priv(dev); | 1901 | struct velocity_info *vptr = netdev_priv(dev); |
1899 | int ret; | 1902 | int ret; |
1900 | 1903 | ||
1901 | vptr->rx_buf_sz = (dev->mtu <= 1504 ? PKT_BUF_SZ : dev->mtu + 32); | ||
1902 | |||
1903 | ret = velocity_init_rings(vptr); | 1904 | ret = velocity_init_rings(vptr); |
1904 | if (ret < 0) | 1905 | if (ret < 0) |
1905 | goto out; | 1906 | goto out; |
@@ -1978,12 +1979,6 @@ static int velocity_change_mtu(struct net_device *dev, int new_mtu) | |||
1978 | velocity_free_rd_ring(vptr); | 1979 | velocity_free_rd_ring(vptr); |
1979 | 1980 | ||
1980 | dev->mtu = new_mtu; | 1981 | dev->mtu = new_mtu; |
1981 | if (new_mtu > 8192) | ||
1982 | vptr->rx_buf_sz = 9 * 1024; | ||
1983 | else if (new_mtu > 4096) | ||
1984 | vptr->rx_buf_sz = 8192; | ||
1985 | else | ||
1986 | vptr->rx_buf_sz = 4 * 1024; | ||
1987 | 1982 | ||
1988 | ret = velocity_init_rd_ring(vptr); | 1983 | ret = velocity_init_rd_ring(vptr); |
1989 | if (ret < 0) | 1984 | if (ret < 0) |
diff --git a/drivers/net/wireless/b43/main.c b/drivers/net/wireless/b43/main.c index 2b17c1dc46f1..b45eecc53c4a 100644 --- a/drivers/net/wireless/b43/main.c +++ b/drivers/net/wireless/b43/main.c | |||
@@ -1566,7 +1566,7 @@ static void b43_release_firmware(struct b43_wldev *dev) | |||
1566 | static void b43_print_fw_helptext(struct b43_wl *wl) | 1566 | static void b43_print_fw_helptext(struct b43_wl *wl) |
1567 | { | 1567 | { |
1568 | b43err(wl, "You must go to " | 1568 | b43err(wl, "You must go to " |
1569 | "http://linuxwireless.org/en/users/Drivers/bcm43xx#devicefirmware " | 1569 | "http://linuxwireless.org/en/users/Drivers/b43#devicefirmware " |
1570 | "and download the correct firmware (version 4).\n"); | 1570 | "and download the correct firmware (version 4).\n"); |
1571 | } | 1571 | } |
1572 | 1572 | ||
diff --git a/drivers/net/wireless/b43/phy.c b/drivers/net/wireless/b43/phy.c index 3d4ed647c311..7ff091e69f05 100644 --- a/drivers/net/wireless/b43/phy.c +++ b/drivers/net/wireless/b43/phy.c | |||
@@ -2214,7 +2214,7 @@ int b43_phy_init_tssi2dbm_table(struct b43_wldev *dev) | |||
2214 | } | 2214 | } |
2215 | dyn_tssi2dbm = kmalloc(64, GFP_KERNEL); | 2215 | dyn_tssi2dbm = kmalloc(64, GFP_KERNEL); |
2216 | if (dyn_tssi2dbm == NULL) { | 2216 | if (dyn_tssi2dbm == NULL) { |
2217 | b43err(dev->wl, "Could not allocate memory" | 2217 | b43err(dev->wl, "Could not allocate memory " |
2218 | "for tssi2dbm table\n"); | 2218 | "for tssi2dbm table\n"); |
2219 | return -ENOMEM; | 2219 | return -ENOMEM; |
2220 | } | 2220 | } |
diff --git a/drivers/net/wireless/b43legacy/dma.c b/drivers/net/wireless/b43legacy/dma.c index 8cb3dc4c4745..83161d9af813 100644 --- a/drivers/net/wireless/b43legacy/dma.c +++ b/drivers/net/wireless/b43legacy/dma.c | |||
@@ -996,7 +996,7 @@ int b43legacy_dma_init(struct b43legacy_wldev *dev) | |||
996 | 996 | ||
997 | err = ssb_dma_set_mask(dev->dev, dmamask); | 997 | err = ssb_dma_set_mask(dev->dev, dmamask); |
998 | if (err) { | 998 | if (err) { |
999 | #ifdef BCM43XX_PIO | 999 | #ifdef CONFIG_B43LEGACY_PIO |
1000 | b43legacywarn(dev->wl, "DMA for this device not supported. " | 1000 | b43legacywarn(dev->wl, "DMA for this device not supported. " |
1001 | "Falling back to PIO\n"); | 1001 | "Falling back to PIO\n"); |
1002 | dev->__using_pio = 1; | 1002 | dev->__using_pio = 1; |
diff --git a/drivers/net/wireless/b43legacy/main.c b/drivers/net/wireless/b43legacy/main.c index 3bde1e9ab428..32d5e1785bda 100644 --- a/drivers/net/wireless/b43legacy/main.c +++ b/drivers/net/wireless/b43legacy/main.c | |||
@@ -1419,7 +1419,7 @@ static void b43legacy_release_firmware(struct b43legacy_wldev *dev) | |||
1419 | static void b43legacy_print_fw_helptext(struct b43legacy_wl *wl) | 1419 | static void b43legacy_print_fw_helptext(struct b43legacy_wl *wl) |
1420 | { | 1420 | { |
1421 | b43legacyerr(wl, "You must go to http://linuxwireless.org/en/users/" | 1421 | b43legacyerr(wl, "You must go to http://linuxwireless.org/en/users/" |
1422 | "Drivers/bcm43xx#devicefirmware " | 1422 | "Drivers/b43#devicefirmware " |
1423 | "and download the correct firmware (version 3).\n"); | 1423 | "and download the correct firmware (version 3).\n"); |
1424 | } | 1424 | } |
1425 | 1425 | ||
diff --git a/drivers/net/wireless/b43legacy/phy.c b/drivers/net/wireless/b43legacy/phy.c index 22a4b3d0186d..491e518e4aeb 100644 --- a/drivers/net/wireless/b43legacy/phy.c +++ b/drivers/net/wireless/b43legacy/phy.c | |||
@@ -2020,7 +2020,7 @@ int b43legacy_phy_init_tssi2dbm_table(struct b43legacy_wldev *dev) | |||
2020 | phy->idle_tssi = 62; | 2020 | phy->idle_tssi = 62; |
2021 | dyn_tssi2dbm = kmalloc(64, GFP_KERNEL); | 2021 | dyn_tssi2dbm = kmalloc(64, GFP_KERNEL); |
2022 | if (dyn_tssi2dbm == NULL) { | 2022 | if (dyn_tssi2dbm == NULL) { |
2023 | b43legacyerr(dev->wl, "Could not allocate memory" | 2023 | b43legacyerr(dev->wl, "Could not allocate memory " |
2024 | "for tssi2dbm table\n"); | 2024 | "for tssi2dbm table\n"); |
2025 | return -ENOMEM; | 2025 | return -ENOMEM; |
2026 | } | 2026 | } |
diff --git a/drivers/net/wireless/bcm43xx/bcm43xx_phy.c b/drivers/net/wireless/bcm43xx/bcm43xx_phy.c index b37f1e348700..af3de3343650 100644 --- a/drivers/net/wireless/bcm43xx/bcm43xx_phy.c +++ b/drivers/net/wireless/bcm43xx/bcm43xx_phy.c | |||
@@ -2149,7 +2149,7 @@ int bcm43xx_phy_init_tssi2dbm_table(struct bcm43xx_private *bcm) | |||
2149 | } | 2149 | } |
2150 | dyn_tssi2dbm = kmalloc(64, GFP_KERNEL); | 2150 | dyn_tssi2dbm = kmalloc(64, GFP_KERNEL); |
2151 | if (dyn_tssi2dbm == NULL) { | 2151 | if (dyn_tssi2dbm == NULL) { |
2152 | printk(KERN_ERR PFX "Could not allocate memory" | 2152 | printk(KERN_ERR PFX "Could not allocate memory " |
2153 | "for tssi2dbm table\n"); | 2153 | "for tssi2dbm table\n"); |
2154 | return -ENOMEM; | 2154 | return -ENOMEM; |
2155 | } | 2155 | } |
diff --git a/drivers/net/wireless/iwlwifi/iwl3945-base.c b/drivers/net/wireless/iwlwifi/iwl3945-base.c index 465da4f67ce7..4bdf237f6adc 100644 --- a/drivers/net/wireless/iwlwifi/iwl3945-base.c +++ b/drivers/net/wireless/iwlwifi/iwl3945-base.c | |||
@@ -2915,6 +2915,10 @@ static void iwl_set_rate(struct iwl_priv *priv) | |||
2915 | int i; | 2915 | int i; |
2916 | 2916 | ||
2917 | hw = iwl_get_hw_mode(priv, priv->phymode); | 2917 | hw = iwl_get_hw_mode(priv, priv->phymode); |
2918 | if (!hw) { | ||
2919 | IWL_ERROR("Failed to set rate: unable to get hw mode\n"); | ||
2920 | return; | ||
2921 | } | ||
2918 | 2922 | ||
2919 | priv->active_rate = 0; | 2923 | priv->active_rate = 0; |
2920 | priv->active_rate_basic = 0; | 2924 | priv->active_rate_basic = 0; |
@@ -6936,13 +6940,10 @@ static int iwl_mac_add_interface(struct ieee80211_hw *hw, | |||
6936 | DECLARE_MAC_BUF(mac); | 6940 | DECLARE_MAC_BUF(mac); |
6937 | 6941 | ||
6938 | IWL_DEBUG_MAC80211("enter: id %d, type %d\n", conf->if_id, conf->type); | 6942 | IWL_DEBUG_MAC80211("enter: id %d, type %d\n", conf->if_id, conf->type); |
6939 | if (conf->mac_addr) | ||
6940 | IWL_DEBUG_MAC80211("enter: MAC %s\n", | ||
6941 | print_mac(mac, conf->mac_addr)); | ||
6942 | 6943 | ||
6943 | if (priv->interface_id) { | 6944 | if (priv->interface_id) { |
6944 | IWL_DEBUG_MAC80211("leave - interface_id != 0\n"); | 6945 | IWL_DEBUG_MAC80211("leave - interface_id != 0\n"); |
6945 | return 0; | 6946 | return -EOPNOTSUPP; |
6946 | } | 6947 | } |
6947 | 6948 | ||
6948 | spin_lock_irqsave(&priv->lock, flags); | 6949 | spin_lock_irqsave(&priv->lock, flags); |
@@ -6951,6 +6952,12 @@ static int iwl_mac_add_interface(struct ieee80211_hw *hw, | |||
6951 | spin_unlock_irqrestore(&priv->lock, flags); | 6952 | spin_unlock_irqrestore(&priv->lock, flags); |
6952 | 6953 | ||
6953 | mutex_lock(&priv->mutex); | 6954 | mutex_lock(&priv->mutex); |
6955 | |||
6956 | if (conf->mac_addr) { | ||
6957 | IWL_DEBUG_MAC80211("Set: %s\n", print_mac(mac, conf->mac_addr)); | ||
6958 | memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN); | ||
6959 | } | ||
6960 | |||
6954 | iwl_set_mode(priv, conf->type); | 6961 | iwl_set_mode(priv, conf->type); |
6955 | 6962 | ||
6956 | IWL_DEBUG_MAC80211("leave\n"); | 6963 | IWL_DEBUG_MAC80211("leave\n"); |
@@ -8270,6 +8277,7 @@ static void iwl_cancel_deferred_work(struct iwl_priv *priv) | |||
8270 | { | 8277 | { |
8271 | iwl_hw_cancel_deferred_work(priv); | 8278 | iwl_hw_cancel_deferred_work(priv); |
8272 | 8279 | ||
8280 | cancel_delayed_work_sync(&priv->init_alive_start); | ||
8273 | cancel_delayed_work(&priv->scan_check); | 8281 | cancel_delayed_work(&priv->scan_check); |
8274 | cancel_delayed_work(&priv->alive_start); | 8282 | cancel_delayed_work(&priv->alive_start); |
8275 | cancel_delayed_work(&priv->post_associate); | 8283 | cancel_delayed_work(&priv->post_associate); |
diff --git a/drivers/net/wireless/iwlwifi/iwl4965-base.c b/drivers/net/wireless/iwlwifi/iwl4965-base.c index 9918780f5e86..8f85564ec6fa 100644 --- a/drivers/net/wireless/iwlwifi/iwl4965-base.c +++ b/drivers/net/wireless/iwlwifi/iwl4965-base.c | |||
@@ -3003,6 +3003,10 @@ static void iwl_set_rate(struct iwl_priv *priv) | |||
3003 | int i; | 3003 | int i; |
3004 | 3004 | ||
3005 | hw = iwl_get_hw_mode(priv, priv->phymode); | 3005 | hw = iwl_get_hw_mode(priv, priv->phymode); |
3006 | if (!hw) { | ||
3007 | IWL_ERROR("Failed to set rate: unable to get hw mode\n"); | ||
3008 | return; | ||
3009 | } | ||
3006 | 3010 | ||
3007 | priv->active_rate = 0; | 3011 | priv->active_rate = 0; |
3008 | priv->active_rate_basic = 0; | 3012 | priv->active_rate_basic = 0; |
@@ -7326,9 +7330,6 @@ static int iwl_mac_add_interface(struct ieee80211_hw *hw, | |||
7326 | DECLARE_MAC_BUF(mac); | 7330 | DECLARE_MAC_BUF(mac); |
7327 | 7331 | ||
7328 | IWL_DEBUG_MAC80211("enter: id %d, type %d\n", conf->if_id, conf->type); | 7332 | IWL_DEBUG_MAC80211("enter: id %d, type %d\n", conf->if_id, conf->type); |
7329 | if (conf->mac_addr) | ||
7330 | IWL_DEBUG_MAC80211("enter: MAC %s\n", | ||
7331 | print_mac(mac, conf->mac_addr)); | ||
7332 | 7333 | ||
7333 | if (priv->interface_id) { | 7334 | if (priv->interface_id) { |
7334 | IWL_DEBUG_MAC80211("leave - interface_id != 0\n"); | 7335 | IWL_DEBUG_MAC80211("leave - interface_id != 0\n"); |
@@ -7341,6 +7342,11 @@ static int iwl_mac_add_interface(struct ieee80211_hw *hw, | |||
7341 | spin_unlock_irqrestore(&priv->lock, flags); | 7342 | spin_unlock_irqrestore(&priv->lock, flags); |
7342 | 7343 | ||
7343 | mutex_lock(&priv->mutex); | 7344 | mutex_lock(&priv->mutex); |
7345 | |||
7346 | if (conf->mac_addr) { | ||
7347 | IWL_DEBUG_MAC80211("Set %s\n", print_mac(mac, conf->mac_addr)); | ||
7348 | memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN); | ||
7349 | } | ||
7344 | iwl_set_mode(priv, conf->type); | 7350 | iwl_set_mode(priv, conf->type); |
7345 | 7351 | ||
7346 | IWL_DEBUG_MAC80211("leave\n"); | 7352 | IWL_DEBUG_MAC80211("leave\n"); |
@@ -8864,6 +8870,7 @@ static void iwl_cancel_deferred_work(struct iwl_priv *priv) | |||
8864 | { | 8870 | { |
8865 | iwl_hw_cancel_deferred_work(priv); | 8871 | iwl_hw_cancel_deferred_work(priv); |
8866 | 8872 | ||
8873 | cancel_delayed_work_sync(&priv->init_alive_start); | ||
8867 | cancel_delayed_work(&priv->scan_check); | 8874 | cancel_delayed_work(&priv->scan_check); |
8868 | cancel_delayed_work(&priv->alive_start); | 8875 | cancel_delayed_work(&priv->alive_start); |
8869 | cancel_delayed_work(&priv->post_associate); | 8876 | cancel_delayed_work(&priv->post_associate); |
diff --git a/drivers/net/wireless/libertas/if_cs.c b/drivers/net/wireless/libertas/if_cs.c index ec89dabc412c..ba4fc2b3bf0a 100644 --- a/drivers/net/wireless/libertas/if_cs.c +++ b/drivers/net/wireless/libertas/if_cs.c | |||
@@ -170,7 +170,8 @@ static int if_cs_poll_while_fw_download(struct if_cs_card *card, uint addr, u8 r | |||
170 | #define IF_CS_H_IC_TX_OVER 0x0001 | 170 | #define IF_CS_H_IC_TX_OVER 0x0001 |
171 | #define IF_CS_H_IC_RX_OVER 0x0002 | 171 | #define IF_CS_H_IC_RX_OVER 0x0002 |
172 | #define IF_CS_H_IC_DNLD_OVER 0x0004 | 172 | #define IF_CS_H_IC_DNLD_OVER 0x0004 |
173 | #define IF_CS_H_IC_HOST_EVENT 0x0008 | 173 | #define IF_CS_H_IC_POWER_DOWN 0x0008 |
174 | #define IF_CS_H_IC_HOST_EVENT 0x0010 | ||
174 | #define IF_CS_H_IC_MASK 0x001f | 175 | #define IF_CS_H_IC_MASK 0x001f |
175 | 176 | ||
176 | #define IF_CS_H_INT_MASK 0x00000004 | 177 | #define IF_CS_H_INT_MASK 0x00000004 |
diff --git a/drivers/net/wireless/libertas/main.c b/drivers/net/wireless/libertas/main.c index 5ead08312e1e..1823b48a8ba7 100644 --- a/drivers/net/wireless/libertas/main.c +++ b/drivers/net/wireless/libertas/main.c | |||
@@ -1165,8 +1165,6 @@ wlan_private *libertas_add_card(void *card, struct device *dmdev) | |||
1165 | #ifdef WIRELESS_EXT | 1165 | #ifdef WIRELESS_EXT |
1166 | dev->wireless_handlers = (struct iw_handler_def *)&libertas_handler_def; | 1166 | dev->wireless_handlers = (struct iw_handler_def *)&libertas_handler_def; |
1167 | #endif | 1167 | #endif |
1168 | #define NETIF_F_DYNALLOC 16 | ||
1169 | dev->features |= NETIF_F_DYNALLOC; | ||
1170 | dev->flags |= IFF_BROADCAST | IFF_MULTICAST; | 1168 | dev->flags |= IFF_BROADCAST | IFF_MULTICAST; |
1171 | dev->set_multicast_list = libertas_set_multicast_list; | 1169 | dev->set_multicast_list = libertas_set_multicast_list; |
1172 | 1170 | ||
@@ -1348,8 +1346,6 @@ int libertas_add_mesh(wlan_private *priv, struct device *dev) | |||
1348 | #ifdef WIRELESS_EXT | 1346 | #ifdef WIRELESS_EXT |
1349 | mesh_dev->wireless_handlers = (struct iw_handler_def *)&mesh_handler_def; | 1347 | mesh_dev->wireless_handlers = (struct iw_handler_def *)&mesh_handler_def; |
1350 | #endif | 1348 | #endif |
1351 | #define NETIF_F_DYNALLOC 16 | ||
1352 | |||
1353 | /* Register virtual mesh interface */ | 1349 | /* Register virtual mesh interface */ |
1354 | ret = register_netdev(mesh_dev); | 1350 | ret = register_netdev(mesh_dev); |
1355 | if (ret) { | 1351 | if (ret) { |
diff --git a/drivers/net/wireless/libertas/wext.c b/drivers/net/wireless/libertas/wext.c index c6f5aa3cb465..395b7882d4d6 100644 --- a/drivers/net/wireless/libertas/wext.c +++ b/drivers/net/wireless/libertas/wext.c | |||
@@ -1528,7 +1528,7 @@ static int wlan_set_encodeext(struct net_device *dev, | |||
1528 | && (ext->key_len != KEY_LEN_WPA_TKIP)) | 1528 | && (ext->key_len != KEY_LEN_WPA_TKIP)) |
1529 | || ((alg == IW_ENCODE_ALG_CCMP) | 1529 | || ((alg == IW_ENCODE_ALG_CCMP) |
1530 | && (ext->key_len != KEY_LEN_WPA_AES))) { | 1530 | && (ext->key_len != KEY_LEN_WPA_AES))) { |
1531 | lbs_deb_wext("invalid size %d for key of alg" | 1531 | lbs_deb_wext("invalid size %d for key of alg " |
1532 | "type %d\n", | 1532 | "type %d\n", |
1533 | ext->key_len, | 1533 | ext->key_len, |
1534 | alg); | 1534 | alg); |
diff --git a/drivers/net/wireless/netwave_cs.c b/drivers/net/wireless/netwave_cs.c index 2402cb8dd328..d2fa079fbc4c 100644 --- a/drivers/net/wireless/netwave_cs.c +++ b/drivers/net/wireless/netwave_cs.c | |||
@@ -806,7 +806,7 @@ static int netwave_pcmcia_config(struct pcmcia_device *link) { | |||
806 | for (i = 0; i < 6; i++) | 806 | for (i = 0; i < 6; i++) |
807 | dev->dev_addr[i] = readb(ramBase + NETWAVE_EREG_PA + i); | 807 | dev->dev_addr[i] = readb(ramBase + NETWAVE_EREG_PA + i); |
808 | 808 | ||
809 | printk(KERN_INFO "%s: Netwave: port %#3lx, irq %d, mem %lx" | 809 | printk(KERN_INFO "%s: Netwave: port %#3lx, irq %d, mem %lx, " |
810 | "id %c%c, hw_addr %s\n", | 810 | "id %c%c, hw_addr %s\n", |
811 | dev->name, dev->base_addr, dev->irq, | 811 | dev->name, dev->base_addr, dev->irq, |
812 | (u_long) ramBase, | 812 | (u_long) ramBase, |
diff --git a/drivers/net/wireless/p54usb.c b/drivers/net/wireless/p54usb.c index 755482a5a938..60d286eb0b8b 100644 --- a/drivers/net/wireless/p54usb.c +++ b/drivers/net/wireless/p54usb.c | |||
@@ -308,7 +308,7 @@ static int p54u_read_eeprom(struct ieee80211_hw *dev) | |||
308 | 308 | ||
309 | buf = kmalloc(0x2020, GFP_KERNEL); | 309 | buf = kmalloc(0x2020, GFP_KERNEL); |
310 | if (!buf) { | 310 | if (!buf) { |
311 | printk(KERN_ERR "prism54usb: cannot allocate memory for" | 311 | printk(KERN_ERR "prism54usb: cannot allocate memory for " |
312 | "eeprom readback!\n"); | 312 | "eeprom readback!\n"); |
313 | return -ENOMEM; | 313 | return -ENOMEM; |
314 | } | 314 | } |
diff --git a/drivers/parisc/lba_pci.c b/drivers/parisc/lba_pci.c index 5eace9e66e14..66ce61048361 100644 --- a/drivers/parisc/lba_pci.c +++ b/drivers/parisc/lba_pci.c | |||
@@ -768,9 +768,13 @@ lba_fixup_bus(struct pci_bus *bus) | |||
768 | DBG("lba_fixup_bus() WTF? 0x%lx [%lx/%lx] XXX", | 768 | DBG("lba_fixup_bus() WTF? 0x%lx [%lx/%lx] XXX", |
769 | res->flags, res->start, res->end); | 769 | res->flags, res->start, res->end); |
770 | } | 770 | } |
771 | if ((i != PCI_ROM_RESOURCE) || | 771 | |
772 | (res->flags & IORESOURCE_ROM_ENABLE)) | 772 | /* |
773 | pci_claim_resource(dev, i); | 773 | ** FIXME: this will result in whinging for devices |
774 | ** that share expansion ROMs (think quad tulip), but | ||
775 | ** isn't harmful. | ||
776 | */ | ||
777 | pci_claim_resource(dev, i); | ||
774 | } | 778 | } |
775 | 779 | ||
776 | #ifdef FBB_SUPPORT | 780 | #ifdef FBB_SUPPORT |
diff --git a/drivers/rtc/interface.c b/drivers/rtc/interface.c index a4f56e95cf96..f1e00ff54ce8 100644 --- a/drivers/rtc/interface.c +++ b/drivers/rtc/interface.c | |||
@@ -293,7 +293,7 @@ int rtc_irq_register(struct rtc_device *rtc, struct rtc_task *task) | |||
293 | return -EINVAL; | 293 | return -EINVAL; |
294 | 294 | ||
295 | /* Cannot register while the char dev is in use */ | 295 | /* Cannot register while the char dev is in use */ |
296 | if (test_and_set_bit(RTC_DEV_BUSY, &rtc->flags)) | 296 | if (test_and_set_bit_lock(RTC_DEV_BUSY, &rtc->flags)) |
297 | return -EBUSY; | 297 | return -EBUSY; |
298 | 298 | ||
299 | spin_lock_irq(&rtc->irq_task_lock); | 299 | spin_lock_irq(&rtc->irq_task_lock); |
@@ -303,7 +303,7 @@ int rtc_irq_register(struct rtc_device *rtc, struct rtc_task *task) | |||
303 | } | 303 | } |
304 | spin_unlock_irq(&rtc->irq_task_lock); | 304 | spin_unlock_irq(&rtc->irq_task_lock); |
305 | 305 | ||
306 | clear_bit(RTC_DEV_BUSY, &rtc->flags); | 306 | clear_bit_unlock(RTC_DEV_BUSY, &rtc->flags); |
307 | 307 | ||
308 | return retval; | 308 | return retval; |
309 | } | 309 | } |
diff --git a/drivers/rtc/rtc-dev.c b/drivers/rtc/rtc-dev.c index ae1bf177d625..025c60a17a4a 100644 --- a/drivers/rtc/rtc-dev.c +++ b/drivers/rtc/rtc-dev.c | |||
@@ -26,7 +26,7 @@ static int rtc_dev_open(struct inode *inode, struct file *file) | |||
26 | struct rtc_device, char_dev); | 26 | struct rtc_device, char_dev); |
27 | const struct rtc_class_ops *ops = rtc->ops; | 27 | const struct rtc_class_ops *ops = rtc->ops; |
28 | 28 | ||
29 | if (test_and_set_bit(RTC_DEV_BUSY, &rtc->flags)) | 29 | if (test_and_set_bit_lock(RTC_DEV_BUSY, &rtc->flags)) |
30 | return -EBUSY; | 30 | return -EBUSY; |
31 | 31 | ||
32 | file->private_data = rtc; | 32 | file->private_data = rtc; |
@@ -41,7 +41,7 @@ static int rtc_dev_open(struct inode *inode, struct file *file) | |||
41 | } | 41 | } |
42 | 42 | ||
43 | /* something has gone wrong */ | 43 | /* something has gone wrong */ |
44 | clear_bit(RTC_DEV_BUSY, &rtc->flags); | 44 | clear_bit_unlock(RTC_DEV_BUSY, &rtc->flags); |
45 | return err; | 45 | return err; |
46 | } | 46 | } |
47 | 47 | ||
@@ -402,7 +402,7 @@ static int rtc_dev_release(struct inode *inode, struct file *file) | |||
402 | if (rtc->ops->release) | 402 | if (rtc->ops->release) |
403 | rtc->ops->release(rtc->dev.parent); | 403 | rtc->ops->release(rtc->dev.parent); |
404 | 404 | ||
405 | clear_bit(RTC_DEV_BUSY, &rtc->flags); | 405 | clear_bit_unlock(RTC_DEV_BUSY, &rtc->flags); |
406 | return 0; | 406 | return 0; |
407 | } | 407 | } |
408 | 408 | ||
diff --git a/drivers/rtc/rtc-max6902.c b/drivers/rtc/rtc-max6902.c index 3e183cfee10f..1f956dc5d56e 100644 --- a/drivers/rtc/rtc-max6902.c +++ b/drivers/rtc/rtc-max6902.c | |||
@@ -89,13 +89,9 @@ static int max6902_get_reg(struct device *dev, unsigned char address, | |||
89 | 89 | ||
90 | /* do the i/o */ | 90 | /* do the i/o */ |
91 | status = spi_sync(spi, &message); | 91 | status = spi_sync(spi, &message); |
92 | if (status == 0) | ||
93 | status = message.status; | ||
94 | else | ||
95 | return status; | ||
96 | |||
97 | *data = chip->rx_buf[1]; | ||
98 | 92 | ||
93 | if (status == 0) | ||
94 | *data = chip->rx_buf[1]; | ||
99 | return status; | 95 | return status; |
100 | } | 96 | } |
101 | 97 | ||
@@ -125,9 +121,7 @@ static int max6902_get_datetime(struct device *dev, struct rtc_time *dt) | |||
125 | 121 | ||
126 | /* do the i/o */ | 122 | /* do the i/o */ |
127 | status = spi_sync(spi, &message); | 123 | status = spi_sync(spi, &message); |
128 | if (status == 0) | 124 | if (status) |
129 | status = message.status; | ||
130 | else | ||
131 | return status; | 125 | return status; |
132 | 126 | ||
133 | /* The chip sends data in this order: | 127 | /* The chip sends data in this order: |
diff --git a/drivers/s390/block/dcssblk.c b/drivers/s390/block/dcssblk.c index 5e083d1f57e7..15a5789b7734 100644 --- a/drivers/s390/block/dcssblk.c +++ b/drivers/s390/block/dcssblk.c | |||
@@ -472,11 +472,11 @@ dcssblk_add_store(struct device *dev, struct device_attribute *attr, const char | |||
472 | if (rc) | 472 | if (rc) |
473 | goto unregister_dev; | 473 | goto unregister_dev; |
474 | 474 | ||
475 | add_disk(dev_info->gd); | ||
476 | |||
477 | blk_queue_make_request(dev_info->dcssblk_queue, dcssblk_make_request); | 475 | blk_queue_make_request(dev_info->dcssblk_queue, dcssblk_make_request); |
478 | blk_queue_hardsect_size(dev_info->dcssblk_queue, 4096); | 476 | blk_queue_hardsect_size(dev_info->dcssblk_queue, 4096); |
479 | 477 | ||
478 | add_disk(dev_info->gd); | ||
479 | |||
480 | switch (dev_info->segment_type) { | 480 | switch (dev_info->segment_type) { |
481 | case SEG_TYPE_SR: | 481 | case SEG_TYPE_SR: |
482 | case SEG_TYPE_ER: | 482 | case SEG_TYPE_ER: |
diff --git a/drivers/s390/cio/css.c b/drivers/s390/cio/css.c index 6db31089d2d7..c3df2cd009a4 100644 --- a/drivers/s390/cio/css.c +++ b/drivers/s390/cio/css.c | |||
@@ -451,6 +451,7 @@ static int reprobe_subchannel(struct subchannel_id schid, void *data) | |||
451 | break; | 451 | break; |
452 | case -ENXIO: | 452 | case -ENXIO: |
453 | case -ENOMEM: | 453 | case -ENOMEM: |
454 | case -EIO: | ||
454 | /* These should abort looping */ | 455 | /* These should abort looping */ |
455 | break; | 456 | break; |
456 | default: | 457 | default: |
diff --git a/drivers/s390/cio/device_id.c b/drivers/s390/cio/device_id.c index 2f6bf462425e..156f3f9786b5 100644 --- a/drivers/s390/cio/device_id.c +++ b/drivers/s390/cio/device_id.c | |||
@@ -113,6 +113,7 @@ __ccw_device_sense_id_start(struct ccw_device *cdev) | |||
113 | { | 113 | { |
114 | struct subchannel *sch; | 114 | struct subchannel *sch; |
115 | struct ccw1 *ccw; | 115 | struct ccw1 *ccw; |
116 | int ret; | ||
116 | 117 | ||
117 | sch = to_subchannel(cdev->dev.parent); | 118 | sch = to_subchannel(cdev->dev.parent); |
118 | /* Setup sense channel program. */ | 119 | /* Setup sense channel program. */ |
@@ -124,9 +125,25 @@ __ccw_device_sense_id_start(struct ccw_device *cdev) | |||
124 | 125 | ||
125 | /* Reset device status. */ | 126 | /* Reset device status. */ |
126 | memset(&cdev->private->irb, 0, sizeof(struct irb)); | 127 | memset(&cdev->private->irb, 0, sizeof(struct irb)); |
127 | cdev->private->flags.intretry = 0; | ||
128 | 128 | ||
129 | return cio_start(sch, ccw, LPM_ANYPATH); | 129 | /* Try on every path. */ |
130 | ret = -ENODEV; | ||
131 | while (cdev->private->imask != 0) { | ||
132 | if ((sch->opm & cdev->private->imask) != 0 && | ||
133 | cdev->private->iretry > 0) { | ||
134 | cdev->private->iretry--; | ||
135 | /* Reset internal retry indication. */ | ||
136 | cdev->private->flags.intretry = 0; | ||
137 | ret = cio_start (sch, cdev->private->iccws, | ||
138 | cdev->private->imask); | ||
139 | /* ret is 0, -EBUSY, -EACCES or -ENODEV */ | ||
140 | if (ret != -EACCES) | ||
141 | return ret; | ||
142 | } | ||
143 | cdev->private->imask >>= 1; | ||
144 | cdev->private->iretry = 5; | ||
145 | } | ||
146 | return ret; | ||
130 | } | 147 | } |
131 | 148 | ||
132 | void | 149 | void |
@@ -136,7 +153,8 @@ ccw_device_sense_id_start(struct ccw_device *cdev) | |||
136 | 153 | ||
137 | memset (&cdev->private->senseid, 0, sizeof (struct senseid)); | 154 | memset (&cdev->private->senseid, 0, sizeof (struct senseid)); |
138 | cdev->private->senseid.cu_type = 0xFFFF; | 155 | cdev->private->senseid.cu_type = 0xFFFF; |
139 | cdev->private->iretry = 3; | 156 | cdev->private->imask = 0x80; |
157 | cdev->private->iretry = 5; | ||
140 | ret = __ccw_device_sense_id_start(cdev); | 158 | ret = __ccw_device_sense_id_start(cdev); |
141 | if (ret && ret != -EBUSY) | 159 | if (ret && ret != -EBUSY) |
142 | ccw_device_sense_id_done(cdev, ret); | 160 | ccw_device_sense_id_done(cdev, ret); |
@@ -252,13 +270,14 @@ ccw_device_sense_id_irq(struct ccw_device *cdev, enum dev_event dev_event) | |||
252 | ccw_device_sense_id_done(cdev, ret); | 270 | ccw_device_sense_id_done(cdev, ret); |
253 | break; | 271 | break; |
254 | case -EACCES: /* channel is not operational. */ | 272 | case -EACCES: /* channel is not operational. */ |
273 | sch->lpm &= ~cdev->private->imask; | ||
274 | cdev->private->imask >>= 1; | ||
275 | cdev->private->iretry = 5; | ||
276 | /* fall through. */ | ||
255 | case -EAGAIN: /* try again. */ | 277 | case -EAGAIN: /* try again. */ |
256 | cdev->private->iretry--; | 278 | ret = __ccw_device_sense_id_start(cdev); |
257 | if (cdev->private->iretry > 0) { | 279 | if (ret == 0 || ret == -EBUSY) |
258 | ret = __ccw_device_sense_id_start(cdev); | 280 | break; |
259 | if (ret == 0 || ret == -EBUSY) | ||
260 | break; | ||
261 | } | ||
262 | /* fall through. */ | 281 | /* fall through. */ |
263 | default: /* Sense ID failed. Try asking VM. */ | 282 | default: /* Sense ID failed. Try asking VM. */ |
264 | if (MACHINE_IS_VM) { | 283 | if (MACHINE_IS_VM) { |
diff --git a/drivers/s390/net/ctcmain.c b/drivers/s390/net/ctcmain.c index 6bf3ebbe985a..97adc701a819 100644 --- a/drivers/s390/net/ctcmain.c +++ b/drivers/s390/net/ctcmain.c | |||
@@ -2782,35 +2782,14 @@ ctc_probe_device(struct ccwgroup_device *cgdev) | |||
2782 | } | 2782 | } |
2783 | 2783 | ||
2784 | /** | 2784 | /** |
2785 | * Initialize everything of the net device except the name and the | 2785 | * Device setup function called by alloc_netdev(). |
2786 | * channel structs. | 2786 | * |
2787 | * @param dev Device to be setup. | ||
2787 | */ | 2788 | */ |
2788 | static struct net_device * | 2789 | void ctc_init_netdevice(struct net_device * dev) |
2789 | ctc_init_netdevice(struct net_device * dev, int alloc_device, | ||
2790 | struct ctc_priv *privptr) | ||
2791 | { | 2790 | { |
2792 | if (!privptr) | ||
2793 | return NULL; | ||
2794 | |||
2795 | DBF_TEXT(setup, 3, __FUNCTION__); | 2791 | DBF_TEXT(setup, 3, __FUNCTION__); |
2796 | 2792 | ||
2797 | if (alloc_device) { | ||
2798 | dev = kzalloc(sizeof(struct net_device), GFP_KERNEL); | ||
2799 | if (!dev) | ||
2800 | return NULL; | ||
2801 | } | ||
2802 | |||
2803 | dev->priv = privptr; | ||
2804 | privptr->fsm = init_fsm("ctcdev", dev_state_names, | ||
2805 | dev_event_names, CTC_NR_DEV_STATES, CTC_NR_DEV_EVENTS, | ||
2806 | dev_fsm, DEV_FSM_LEN, GFP_KERNEL); | ||
2807 | if (privptr->fsm == NULL) { | ||
2808 | if (alloc_device) | ||
2809 | kfree(dev); | ||
2810 | return NULL; | ||
2811 | } | ||
2812 | fsm_newstate(privptr->fsm, DEV_STATE_STOPPED); | ||
2813 | fsm_settimer(privptr->fsm, &privptr->restart_timer); | ||
2814 | if (dev->mtu == 0) | 2793 | if (dev->mtu == 0) |
2815 | dev->mtu = CTC_BUFSIZE_DEFAULT - LL_HEADER_LENGTH - 2; | 2794 | dev->mtu = CTC_BUFSIZE_DEFAULT - LL_HEADER_LENGTH - 2; |
2816 | dev->hard_start_xmit = ctc_tx; | 2795 | dev->hard_start_xmit = ctc_tx; |
@@ -2823,7 +2802,6 @@ ctc_init_netdevice(struct net_device * dev, int alloc_device, | |||
2823 | dev->type = ARPHRD_SLIP; | 2802 | dev->type = ARPHRD_SLIP; |
2824 | dev->tx_queue_len = 100; | 2803 | dev->tx_queue_len = 100; |
2825 | dev->flags = IFF_POINTOPOINT | IFF_NOARP; | 2804 | dev->flags = IFF_POINTOPOINT | IFF_NOARP; |
2826 | return dev; | ||
2827 | } | 2805 | } |
2828 | 2806 | ||
2829 | 2807 | ||
@@ -2879,14 +2857,22 @@ ctc_new_device(struct ccwgroup_device *cgdev) | |||
2879 | "ccw_device_set_online (cdev[1]) failed with ret = %d\n", ret); | 2857 | "ccw_device_set_online (cdev[1]) failed with ret = %d\n", ret); |
2880 | } | 2858 | } |
2881 | 2859 | ||
2882 | dev = ctc_init_netdevice(NULL, 1, privptr); | 2860 | dev = alloc_netdev(0, "ctc%d", ctc_init_netdevice); |
2883 | |||
2884 | if (!dev) { | 2861 | if (!dev) { |
2885 | ctc_pr_warn("ctc_init_netdevice failed\n"); | 2862 | ctc_pr_warn("ctc_init_netdevice failed\n"); |
2886 | goto out; | 2863 | goto out; |
2887 | } | 2864 | } |
2865 | dev->priv = privptr; | ||
2888 | 2866 | ||
2889 | strlcpy(dev->name, "ctc%d", IFNAMSIZ); | 2867 | privptr->fsm = init_fsm("ctcdev", dev_state_names, |
2868 | dev_event_names, CTC_NR_DEV_STATES, CTC_NR_DEV_EVENTS, | ||
2869 | dev_fsm, DEV_FSM_LEN, GFP_KERNEL); | ||
2870 | if (privptr->fsm == NULL) { | ||
2871 | free_netdev(dev); | ||
2872 | goto out; | ||
2873 | } | ||
2874 | fsm_newstate(privptr->fsm, DEV_STATE_STOPPED); | ||
2875 | fsm_settimer(privptr->fsm, &privptr->restart_timer); | ||
2890 | 2876 | ||
2891 | for (direction = READ; direction <= WRITE; direction++) { | 2877 | for (direction = READ; direction <= WRITE; direction++) { |
2892 | privptr->channel[direction] = | 2878 | privptr->channel[direction] = |
diff --git a/drivers/s390/scsi/zfcp_erp.c b/drivers/s390/scsi/zfcp_erp.c index 5552b755c08a..07fa824d179f 100644 --- a/drivers/s390/scsi/zfcp_erp.c +++ b/drivers/s390/scsi/zfcp_erp.c | |||
@@ -977,7 +977,9 @@ static void zfcp_erp_action_dismiss(struct zfcp_erp_action *erp_action) | |||
977 | debug_text_event(adapter->erp_dbf, 2, "a_adis"); | 977 | debug_text_event(adapter->erp_dbf, 2, "a_adis"); |
978 | debug_event(adapter->erp_dbf, 2, &erp_action->action, sizeof (int)); | 978 | debug_event(adapter->erp_dbf, 2, &erp_action->action, sizeof (int)); |
979 | 979 | ||
980 | zfcp_erp_async_handler_nolock(erp_action, ZFCP_STATUS_ERP_DISMISSED); | 980 | erp_action->status |= ZFCP_STATUS_ERP_DISMISSED; |
981 | if (zfcp_erp_action_exists(erp_action) == ZFCP_ERP_ACTION_RUNNING) | ||
982 | zfcp_erp_action_ready(erp_action); | ||
981 | } | 983 | } |
982 | 984 | ||
983 | int | 985 | int |
@@ -1063,7 +1065,7 @@ zfcp_erp_thread(void *data) | |||
1063 | &adapter->status)) { | 1065 | &adapter->status)) { |
1064 | 1066 | ||
1065 | write_lock_irqsave(&adapter->erp_lock, flags); | 1067 | write_lock_irqsave(&adapter->erp_lock, flags); |
1066 | next = adapter->erp_ready_head.prev; | 1068 | next = adapter->erp_ready_head.next; |
1067 | write_unlock_irqrestore(&adapter->erp_lock, flags); | 1069 | write_unlock_irqrestore(&adapter->erp_lock, flags); |
1068 | 1070 | ||
1069 | if (next != &adapter->erp_ready_head) { | 1071 | if (next != &adapter->erp_ready_head) { |
@@ -1153,15 +1155,13 @@ zfcp_erp_strategy(struct zfcp_erp_action *erp_action) | |||
1153 | 1155 | ||
1154 | /* | 1156 | /* |
1155 | * check for dismissed status again to avoid follow-up actions, | 1157 | * check for dismissed status again to avoid follow-up actions, |
1156 | * failing of targets and so on for dismissed actions | 1158 | * failing of targets and so on for dismissed actions, |
1159 | * we go through down() here because there has been an up() | ||
1157 | */ | 1160 | */ |
1158 | retval = zfcp_erp_strategy_check_action(erp_action, retval); | 1161 | if (erp_action->status & ZFCP_STATUS_ERP_DISMISSED) |
1162 | retval = ZFCP_ERP_CONTINUES; | ||
1159 | 1163 | ||
1160 | switch (retval) { | 1164 | switch (retval) { |
1161 | case ZFCP_ERP_DISMISSED: | ||
1162 | /* leave since this action has ridden to its ancestors */ | ||
1163 | debug_text_event(adapter->erp_dbf, 6, "a_st_dis2"); | ||
1164 | goto unlock; | ||
1165 | case ZFCP_ERP_NOMEM: | 1165 | case ZFCP_ERP_NOMEM: |
1166 | /* no memory to continue immediately, let it sleep */ | 1166 | /* no memory to continue immediately, let it sleep */ |
1167 | if (!(erp_action->status & ZFCP_STATUS_ERP_LOWMEM)) { | 1167 | if (!(erp_action->status & ZFCP_STATUS_ERP_LOWMEM)) { |
@@ -3089,7 +3089,7 @@ zfcp_erp_action_enqueue(int action, | |||
3089 | ++adapter->erp_total_count; | 3089 | ++adapter->erp_total_count; |
3090 | 3090 | ||
3091 | /* finally put it into 'ready' queue and kick erp thread */ | 3091 | /* finally put it into 'ready' queue and kick erp thread */ |
3092 | list_add(&erp_action->list, &adapter->erp_ready_head); | 3092 | list_add_tail(&erp_action->list, &adapter->erp_ready_head); |
3093 | up(&adapter->erp_ready_sem); | 3093 | up(&adapter->erp_ready_sem); |
3094 | retval = 0; | 3094 | retval = 0; |
3095 | out: | 3095 | out: |
diff --git a/drivers/scsi/aacraid/commsup.c b/drivers/scsi/aacraid/commsup.c index 240a0bb8986f..abce48ccc85b 100644 --- a/drivers/scsi/aacraid/commsup.c +++ b/drivers/scsi/aacraid/commsup.c | |||
@@ -1339,10 +1339,10 @@ int aac_check_health(struct aac_dev * aac) | |||
1339 | aif = (struct aac_aifcmd *)hw_fib->data; | 1339 | aif = (struct aac_aifcmd *)hw_fib->data; |
1340 | aif->command = cpu_to_le32(AifCmdEventNotify); | 1340 | aif->command = cpu_to_le32(AifCmdEventNotify); |
1341 | aif->seqnum = cpu_to_le32(0xFFFFFFFF); | 1341 | aif->seqnum = cpu_to_le32(0xFFFFFFFF); |
1342 | aif->data[0] = cpu_to_le32(AifEnExpEvent); | 1342 | aif->data[0] = AifEnExpEvent; |
1343 | aif->data[1] = cpu_to_le32(AifExeFirmwarePanic); | 1343 | aif->data[1] = AifExeFirmwarePanic; |
1344 | aif->data[2] = cpu_to_le32(AifHighPriority); | 1344 | aif->data[2] = AifHighPriority; |
1345 | aif->data[3] = cpu_to_le32(BlinkLED); | 1345 | aif->data[3] = BlinkLED; |
1346 | 1346 | ||
1347 | /* | 1347 | /* |
1348 | * Put the FIB onto the | 1348 | * Put the FIB onto the |
diff --git a/drivers/scsi/aacraid/linit.c b/drivers/scsi/aacraid/linit.c index 038980be763d..9dd331bc29b0 100644 --- a/drivers/scsi/aacraid/linit.c +++ b/drivers/scsi/aacraid/linit.c | |||
@@ -636,7 +636,7 @@ static int aac_cfg_open(struct inode *inode, struct file *file) | |||
636 | static int aac_cfg_ioctl(struct inode *inode, struct file *file, | 636 | static int aac_cfg_ioctl(struct inode *inode, struct file *file, |
637 | unsigned int cmd, unsigned long arg) | 637 | unsigned int cmd, unsigned long arg) |
638 | { | 638 | { |
639 | if (!capable(CAP_SYS_ADMIN)) | 639 | if (!capable(CAP_SYS_RAWIO)) |
640 | return -EPERM; | 640 | return -EPERM; |
641 | return aac_do_ioctl(file->private_data, cmd, (void __user *)arg); | 641 | return aac_do_ioctl(file->private_data, cmd, (void __user *)arg); |
642 | } | 642 | } |
@@ -691,7 +691,7 @@ static int aac_compat_ioctl(struct scsi_device *sdev, int cmd, void __user *arg) | |||
691 | 691 | ||
692 | static long aac_compat_cfg_ioctl(struct file *file, unsigned cmd, unsigned long arg) | 692 | static long aac_compat_cfg_ioctl(struct file *file, unsigned cmd, unsigned long arg) |
693 | { | 693 | { |
694 | if (!capable(CAP_SYS_ADMIN)) | 694 | if (!capable(CAP_SYS_RAWIO)) |
695 | return -EPERM; | 695 | return -EPERM; |
696 | return aac_compat_do_ioctl((struct aac_dev *)file->private_data, cmd, arg); | 696 | return aac_compat_do_ioctl((struct aac_dev *)file->private_data, cmd, arg); |
697 | } | 697 | } |
@@ -950,7 +950,8 @@ static struct scsi_host_template aac_driver_template = { | |||
950 | 950 | ||
951 | static void __aac_shutdown(struct aac_dev * aac) | 951 | static void __aac_shutdown(struct aac_dev * aac) |
952 | { | 952 | { |
953 | kthread_stop(aac->thread); | 953 | if (aac->aif_thread) |
954 | kthread_stop(aac->thread); | ||
954 | aac_send_shutdown(aac); | 955 | aac_send_shutdown(aac); |
955 | aac_adapter_disable_int(aac); | 956 | aac_adapter_disable_int(aac); |
956 | free_irq(aac->pdev->irq, aac); | 957 | free_irq(aac->pdev->irq, aac); |
diff --git a/drivers/scsi/atari_scsi.c b/drivers/scsi/atari_scsi.c index 6f8403b82ba1..f5732d8f67fe 100644 --- a/drivers/scsi/atari_scsi.c +++ b/drivers/scsi/atari_scsi.c | |||
@@ -393,7 +393,7 @@ static irqreturn_t scsi_tt_intr(int irq, void *dummy) | |||
393 | 393 | ||
394 | #endif /* REAL_DMA */ | 394 | #endif /* REAL_DMA */ |
395 | 395 | ||
396 | NCR5380_intr(0, 0); | 396 | NCR5380_intr(irq, dummy); |
397 | 397 | ||
398 | #if 0 | 398 | #if 0 |
399 | /* To be sure the int is not masked */ | 399 | /* To be sure the int is not masked */ |
@@ -458,7 +458,7 @@ static irqreturn_t scsi_falcon_intr(int irq, void *dummy) | |||
458 | 458 | ||
459 | #endif /* REAL_DMA */ | 459 | #endif /* REAL_DMA */ |
460 | 460 | ||
461 | NCR5380_intr(0, 0); | 461 | NCR5380_intr(irq, dummy); |
462 | return IRQ_HANDLED; | 462 | return IRQ_HANDLED; |
463 | } | 463 | } |
464 | 464 | ||
@@ -684,7 +684,7 @@ int atari_scsi_detect(struct scsi_host_template *host) | |||
684 | * interrupt after having cleared the pending flag for the DMA | 684 | * interrupt after having cleared the pending flag for the DMA |
685 | * interrupt. */ | 685 | * interrupt. */ |
686 | if (request_irq(IRQ_TT_MFP_SCSI, scsi_tt_intr, IRQ_TYPE_SLOW, | 686 | if (request_irq(IRQ_TT_MFP_SCSI, scsi_tt_intr, IRQ_TYPE_SLOW, |
687 | "SCSI NCR5380", scsi_tt_intr)) { | 687 | "SCSI NCR5380", instance)) { |
688 | printk(KERN_ERR "atari_scsi_detect: cannot allocate irq %d, aborting",IRQ_TT_MFP_SCSI); | 688 | printk(KERN_ERR "atari_scsi_detect: cannot allocate irq %d, aborting",IRQ_TT_MFP_SCSI); |
689 | scsi_unregister(atari_scsi_host); | 689 | scsi_unregister(atari_scsi_host); |
690 | atari_stram_free(atari_dma_buffer); | 690 | atari_stram_free(atari_dma_buffer); |
@@ -701,7 +701,7 @@ int atari_scsi_detect(struct scsi_host_template *host) | |||
701 | IRQ_TYPE_PRIO, "Hades DMA emulator", | 701 | IRQ_TYPE_PRIO, "Hades DMA emulator", |
702 | hades_dma_emulator)) { | 702 | hades_dma_emulator)) { |
703 | printk(KERN_ERR "atari_scsi_detect: cannot allocate irq %d, aborting (MACH_IS_HADES)",IRQ_AUTO_2); | 703 | printk(KERN_ERR "atari_scsi_detect: cannot allocate irq %d, aborting (MACH_IS_HADES)",IRQ_AUTO_2); |
704 | free_irq(IRQ_TT_MFP_SCSI, scsi_tt_intr); | 704 | free_irq(IRQ_TT_MFP_SCSI, instance); |
705 | scsi_unregister(atari_scsi_host); | 705 | scsi_unregister(atari_scsi_host); |
706 | atari_stram_free(atari_dma_buffer); | 706 | atari_stram_free(atari_dma_buffer); |
707 | atari_dma_buffer = 0; | 707 | atari_dma_buffer = 0; |
@@ -761,7 +761,7 @@ int atari_scsi_detect(struct scsi_host_template *host) | |||
761 | int atari_scsi_release(struct Scsi_Host *sh) | 761 | int atari_scsi_release(struct Scsi_Host *sh) |
762 | { | 762 | { |
763 | if (IS_A_TT()) | 763 | if (IS_A_TT()) |
764 | free_irq(IRQ_TT_MFP_SCSI, scsi_tt_intr); | 764 | free_irq(IRQ_TT_MFP_SCSI, sh); |
765 | if (atari_dma_buffer) | 765 | if (atari_dma_buffer) |
766 | atari_stram_free(atari_dma_buffer); | 766 | atari_stram_free(atari_dma_buffer); |
767 | return 1; | 767 | return 1; |
diff --git a/drivers/scsi/dtc.c b/drivers/scsi/dtc.c index 2596165096d3..c2677ba29c74 100644 --- a/drivers/scsi/dtc.c +++ b/drivers/scsi/dtc.c | |||
@@ -277,7 +277,8 @@ found: | |||
277 | /* With interrupts enabled, it will sometimes hang when doing heavy | 277 | /* With interrupts enabled, it will sometimes hang when doing heavy |
278 | * reads. So better not enable them until I finger it out. */ | 278 | * reads. So better not enable them until I finger it out. */ |
279 | if (instance->irq != SCSI_IRQ_NONE) | 279 | if (instance->irq != SCSI_IRQ_NONE) |
280 | if (request_irq(instance->irq, dtc_intr, IRQF_DISABLED, "dtc", instance)) { | 280 | if (request_irq(instance->irq, dtc_intr, IRQF_DISABLED, |
281 | "dtc", instance)) { | ||
281 | printk(KERN_ERR "scsi%d : IRQ%d not free, interrupts disabled\n", instance->host_no, instance->irq); | 282 | printk(KERN_ERR "scsi%d : IRQ%d not free, interrupts disabled\n", instance->host_no, instance->irq); |
282 | instance->irq = SCSI_IRQ_NONE; | 283 | instance->irq = SCSI_IRQ_NONE; |
283 | } | 284 | } |
@@ -459,7 +460,7 @@ static int dtc_release(struct Scsi_Host *shost) | |||
459 | NCR5380_local_declare(); | 460 | NCR5380_local_declare(); |
460 | NCR5380_setup(shost); | 461 | NCR5380_setup(shost); |
461 | if (shost->irq) | 462 | if (shost->irq) |
462 | free_irq(shost->irq, NULL); | 463 | free_irq(shost->irq, shost); |
463 | NCR5380_exit(shost); | 464 | NCR5380_exit(shost); |
464 | if (shost->io_port && shost->n_io_port) | 465 | if (shost->io_port && shost->n_io_port) |
465 | release_region(shost->io_port, shost->n_io_port); | 466 | release_region(shost->io_port, shost->n_io_port); |
diff --git a/drivers/scsi/g_NCR5380.c b/drivers/scsi/g_NCR5380.c index 607336f56d55..75585a52c88b 100644 --- a/drivers/scsi/g_NCR5380.c +++ b/drivers/scsi/g_NCR5380.c | |||
@@ -460,7 +460,8 @@ int __init generic_NCR5380_detect(struct scsi_host_template * tpnt) | |||
460 | instance->irq = NCR5380_probe_irq(instance, 0xffff); | 460 | instance->irq = NCR5380_probe_irq(instance, 0xffff); |
461 | 461 | ||
462 | if (instance->irq != SCSI_IRQ_NONE) | 462 | if (instance->irq != SCSI_IRQ_NONE) |
463 | if (request_irq(instance->irq, generic_NCR5380_intr, IRQF_DISABLED, "NCR5380", instance)) { | 463 | if (request_irq(instance->irq, generic_NCR5380_intr, |
464 | IRQF_DISABLED, "NCR5380", instance)) { | ||
464 | printk(KERN_WARNING "scsi%d : IRQ%d not free, interrupts disabled\n", instance->host_no, instance->irq); | 465 | printk(KERN_WARNING "scsi%d : IRQ%d not free, interrupts disabled\n", instance->host_no, instance->irq); |
465 | instance->irq = SCSI_IRQ_NONE; | 466 | instance->irq = SCSI_IRQ_NONE; |
466 | } | 467 | } |
@@ -513,7 +514,7 @@ int generic_NCR5380_release_resources(struct Scsi_Host *instance) | |||
513 | NCR5380_setup(instance); | 514 | NCR5380_setup(instance); |
514 | 515 | ||
515 | if (instance->irq != SCSI_IRQ_NONE) | 516 | if (instance->irq != SCSI_IRQ_NONE) |
516 | free_irq(instance->irq, NULL); | 517 | free_irq(instance->irq, instance); |
517 | NCR5380_exit(instance); | 518 | NCR5380_exit(instance); |
518 | 519 | ||
519 | #ifndef CONFIG_SCSI_G_NCR5380_MEM | 520 | #ifndef CONFIG_SCSI_G_NCR5380_MEM |
diff --git a/drivers/scsi/iscsi_tcp.c b/drivers/scsi/iscsi_tcp.c index 4bcf916c21a7..57ce2251abc8 100644 --- a/drivers/scsi/iscsi_tcp.c +++ b/drivers/scsi/iscsi_tcp.c | |||
@@ -197,7 +197,7 @@ iscsi_tcp_cleanup_ctask(struct iscsi_conn *conn, struct iscsi_cmd_task *ctask) | |||
197 | if (unlikely(!sc)) | 197 | if (unlikely(!sc)) |
198 | return; | 198 | return; |
199 | 199 | ||
200 | tcp_ctask->xmstate = XMSTATE_IDLE; | 200 | tcp_ctask->xmstate = XMSTATE_VALUE_IDLE; |
201 | tcp_ctask->r2t = NULL; | 201 | tcp_ctask->r2t = NULL; |
202 | } | 202 | } |
203 | 203 | ||
@@ -409,7 +409,7 @@ iscsi_r2t_rsp(struct iscsi_conn *conn, struct iscsi_cmd_task *ctask) | |||
409 | 409 | ||
410 | tcp_ctask->exp_datasn = r2tsn + 1; | 410 | tcp_ctask->exp_datasn = r2tsn + 1; |
411 | __kfifo_put(tcp_ctask->r2tqueue, (void*)&r2t, sizeof(void*)); | 411 | __kfifo_put(tcp_ctask->r2tqueue, (void*)&r2t, sizeof(void*)); |
412 | tcp_ctask->xmstate |= XMSTATE_SOL_HDR_INIT; | 412 | set_bit(XMSTATE_BIT_SOL_HDR_INIT, &tcp_ctask->xmstate); |
413 | list_move_tail(&ctask->running, &conn->xmitqueue); | 413 | list_move_tail(&ctask->running, &conn->xmitqueue); |
414 | 414 | ||
415 | scsi_queue_work(session->host, &conn->xmitwork); | 415 | scsi_queue_work(session->host, &conn->xmitwork); |
@@ -1254,7 +1254,7 @@ static void iscsi_set_padding(struct iscsi_tcp_cmd_task *tcp_ctask, | |||
1254 | 1254 | ||
1255 | tcp_ctask->pad_count = ISCSI_PAD_LEN - tcp_ctask->pad_count; | 1255 | tcp_ctask->pad_count = ISCSI_PAD_LEN - tcp_ctask->pad_count; |
1256 | debug_scsi("write padding %d bytes\n", tcp_ctask->pad_count); | 1256 | debug_scsi("write padding %d bytes\n", tcp_ctask->pad_count); |
1257 | tcp_ctask->xmstate |= XMSTATE_W_PAD; | 1257 | set_bit(XMSTATE_BIT_W_PAD, &tcp_ctask->xmstate); |
1258 | } | 1258 | } |
1259 | 1259 | ||
1260 | /** | 1260 | /** |
@@ -1269,7 +1269,7 @@ iscsi_tcp_cmd_init(struct iscsi_cmd_task *ctask) | |||
1269 | struct iscsi_tcp_cmd_task *tcp_ctask = ctask->dd_data; | 1269 | struct iscsi_tcp_cmd_task *tcp_ctask = ctask->dd_data; |
1270 | 1270 | ||
1271 | BUG_ON(__kfifo_len(tcp_ctask->r2tqueue)); | 1271 | BUG_ON(__kfifo_len(tcp_ctask->r2tqueue)); |
1272 | tcp_ctask->xmstate = XMSTATE_CMD_HDR_INIT; | 1272 | tcp_ctask->xmstate = 1 << XMSTATE_BIT_CMD_HDR_INIT; |
1273 | } | 1273 | } |
1274 | 1274 | ||
1275 | /** | 1275 | /** |
@@ -1283,10 +1283,10 @@ iscsi_tcp_cmd_init(struct iscsi_cmd_task *ctask) | |||
1283 | * xmit. | 1283 | * xmit. |
1284 | * | 1284 | * |
1285 | * Management xmit state machine consists of these states: | 1285 | * Management xmit state machine consists of these states: |
1286 | * XMSTATE_IMM_HDR_INIT - calculate digest of PDU Header | 1286 | * XMSTATE_BIT_IMM_HDR_INIT - calculate digest of PDU Header |
1287 | * XMSTATE_IMM_HDR - PDU Header xmit in progress | 1287 | * XMSTATE_BIT_IMM_HDR - PDU Header xmit in progress |
1288 | * XMSTATE_IMM_DATA - PDU Data xmit in progress | 1288 | * XMSTATE_BIT_IMM_DATA - PDU Data xmit in progress |
1289 | * XMSTATE_IDLE - management PDU is done | 1289 | * XMSTATE_VALUE_IDLE - management PDU is done |
1290 | **/ | 1290 | **/ |
1291 | static int | 1291 | static int |
1292 | iscsi_tcp_mtask_xmit(struct iscsi_conn *conn, struct iscsi_mgmt_task *mtask) | 1292 | iscsi_tcp_mtask_xmit(struct iscsi_conn *conn, struct iscsi_mgmt_task *mtask) |
@@ -1297,12 +1297,12 @@ iscsi_tcp_mtask_xmit(struct iscsi_conn *conn, struct iscsi_mgmt_task *mtask) | |||
1297 | debug_scsi("mtask deq [cid %d state %x itt 0x%x]\n", | 1297 | debug_scsi("mtask deq [cid %d state %x itt 0x%x]\n", |
1298 | conn->id, tcp_mtask->xmstate, mtask->itt); | 1298 | conn->id, tcp_mtask->xmstate, mtask->itt); |
1299 | 1299 | ||
1300 | if (tcp_mtask->xmstate & XMSTATE_IMM_HDR_INIT) { | 1300 | if (test_bit(XMSTATE_BIT_IMM_HDR_INIT, &tcp_mtask->xmstate)) { |
1301 | iscsi_buf_init_iov(&tcp_mtask->headbuf, (char*)mtask->hdr, | 1301 | iscsi_buf_init_iov(&tcp_mtask->headbuf, (char*)mtask->hdr, |
1302 | sizeof(struct iscsi_hdr)); | 1302 | sizeof(struct iscsi_hdr)); |
1303 | 1303 | ||
1304 | if (mtask->data_count) { | 1304 | if (mtask->data_count) { |
1305 | tcp_mtask->xmstate |= XMSTATE_IMM_DATA; | 1305 | set_bit(XMSTATE_BIT_IMM_DATA, &tcp_mtask->xmstate); |
1306 | iscsi_buf_init_iov(&tcp_mtask->sendbuf, | 1306 | iscsi_buf_init_iov(&tcp_mtask->sendbuf, |
1307 | (char*)mtask->data, | 1307 | (char*)mtask->data, |
1308 | mtask->data_count); | 1308 | mtask->data_count); |
@@ -1315,21 +1315,20 @@ iscsi_tcp_mtask_xmit(struct iscsi_conn *conn, struct iscsi_mgmt_task *mtask) | |||
1315 | (u8*)tcp_mtask->hdrext); | 1315 | (u8*)tcp_mtask->hdrext); |
1316 | 1316 | ||
1317 | tcp_mtask->sent = 0; | 1317 | tcp_mtask->sent = 0; |
1318 | tcp_mtask->xmstate &= ~XMSTATE_IMM_HDR_INIT; | 1318 | clear_bit(XMSTATE_BIT_IMM_HDR_INIT, &tcp_mtask->xmstate); |
1319 | tcp_mtask->xmstate |= XMSTATE_IMM_HDR; | 1319 | set_bit(XMSTATE_BIT_IMM_HDR, &tcp_mtask->xmstate); |
1320 | } | 1320 | } |
1321 | 1321 | ||
1322 | if (tcp_mtask->xmstate & XMSTATE_IMM_HDR) { | 1322 | if (test_bit(XMSTATE_BIT_IMM_HDR, &tcp_mtask->xmstate)) { |
1323 | rc = iscsi_sendhdr(conn, &tcp_mtask->headbuf, | 1323 | rc = iscsi_sendhdr(conn, &tcp_mtask->headbuf, |
1324 | mtask->data_count); | 1324 | mtask->data_count); |
1325 | if (rc) | 1325 | if (rc) |
1326 | return rc; | 1326 | return rc; |
1327 | tcp_mtask->xmstate &= ~XMSTATE_IMM_HDR; | 1327 | clear_bit(XMSTATE_BIT_IMM_HDR, &tcp_mtask->xmstate); |
1328 | } | 1328 | } |
1329 | 1329 | ||
1330 | if (tcp_mtask->xmstate & XMSTATE_IMM_DATA) { | 1330 | if (test_and_clear_bit(XMSTATE_BIT_IMM_DATA, &tcp_mtask->xmstate)) { |
1331 | BUG_ON(!mtask->data_count); | 1331 | BUG_ON(!mtask->data_count); |
1332 | tcp_mtask->xmstate &= ~XMSTATE_IMM_DATA; | ||
1333 | /* FIXME: implement. | 1332 | /* FIXME: implement. |
1334 | * Virtual buffer could be spreaded across multiple pages... | 1333 | * Virtual buffer could be spreaded across multiple pages... |
1335 | */ | 1334 | */ |
@@ -1339,13 +1338,13 @@ iscsi_tcp_mtask_xmit(struct iscsi_conn *conn, struct iscsi_mgmt_task *mtask) | |||
1339 | rc = iscsi_sendpage(conn, &tcp_mtask->sendbuf, | 1338 | rc = iscsi_sendpage(conn, &tcp_mtask->sendbuf, |
1340 | &mtask->data_count, &tcp_mtask->sent); | 1339 | &mtask->data_count, &tcp_mtask->sent); |
1341 | if (rc) { | 1340 | if (rc) { |
1342 | tcp_mtask->xmstate |= XMSTATE_IMM_DATA; | 1341 | set_bit(XMSTATE_BIT_IMM_DATA, &tcp_mtask->xmstate); |
1343 | return rc; | 1342 | return rc; |
1344 | } | 1343 | } |
1345 | } while (mtask->data_count); | 1344 | } while (mtask->data_count); |
1346 | } | 1345 | } |
1347 | 1346 | ||
1348 | BUG_ON(tcp_mtask->xmstate != XMSTATE_IDLE); | 1347 | BUG_ON(tcp_mtask->xmstate != XMSTATE_VALUE_IDLE); |
1349 | if (mtask->hdr->itt == RESERVED_ITT) { | 1348 | if (mtask->hdr->itt == RESERVED_ITT) { |
1350 | struct iscsi_session *session = conn->session; | 1349 | struct iscsi_session *session = conn->session; |
1351 | 1350 | ||
@@ -1365,7 +1364,7 @@ iscsi_send_cmd_hdr(struct iscsi_conn *conn, struct iscsi_cmd_task *ctask) | |||
1365 | struct iscsi_tcp_cmd_task *tcp_ctask = ctask->dd_data; | 1364 | struct iscsi_tcp_cmd_task *tcp_ctask = ctask->dd_data; |
1366 | int rc = 0; | 1365 | int rc = 0; |
1367 | 1366 | ||
1368 | if (tcp_ctask->xmstate & XMSTATE_CMD_HDR_INIT) { | 1367 | if (test_bit(XMSTATE_BIT_CMD_HDR_INIT, &tcp_ctask->xmstate)) { |
1369 | tcp_ctask->sent = 0; | 1368 | tcp_ctask->sent = 0; |
1370 | tcp_ctask->sg_count = 0; | 1369 | tcp_ctask->sg_count = 0; |
1371 | tcp_ctask->exp_datasn = 0; | 1370 | tcp_ctask->exp_datasn = 0; |
@@ -1390,21 +1389,21 @@ iscsi_send_cmd_hdr(struct iscsi_conn *conn, struct iscsi_cmd_task *ctask) | |||
1390 | if (conn->hdrdgst_en) | 1389 | if (conn->hdrdgst_en) |
1391 | iscsi_hdr_digest(conn, &tcp_ctask->headbuf, | 1390 | iscsi_hdr_digest(conn, &tcp_ctask->headbuf, |
1392 | (u8*)tcp_ctask->hdrext); | 1391 | (u8*)tcp_ctask->hdrext); |
1393 | tcp_ctask->xmstate &= ~XMSTATE_CMD_HDR_INIT; | 1392 | clear_bit(XMSTATE_BIT_CMD_HDR_INIT, &tcp_ctask->xmstate); |
1394 | tcp_ctask->xmstate |= XMSTATE_CMD_HDR_XMIT; | 1393 | set_bit(XMSTATE_BIT_CMD_HDR_XMIT, &tcp_ctask->xmstate); |
1395 | } | 1394 | } |
1396 | 1395 | ||
1397 | if (tcp_ctask->xmstate & XMSTATE_CMD_HDR_XMIT) { | 1396 | if (test_bit(XMSTATE_BIT_CMD_HDR_XMIT, &tcp_ctask->xmstate)) { |
1398 | rc = iscsi_sendhdr(conn, &tcp_ctask->headbuf, ctask->imm_count); | 1397 | rc = iscsi_sendhdr(conn, &tcp_ctask->headbuf, ctask->imm_count); |
1399 | if (rc) | 1398 | if (rc) |
1400 | return rc; | 1399 | return rc; |
1401 | tcp_ctask->xmstate &= ~XMSTATE_CMD_HDR_XMIT; | 1400 | clear_bit(XMSTATE_BIT_CMD_HDR_XMIT, &tcp_ctask->xmstate); |
1402 | 1401 | ||
1403 | if (sc->sc_data_direction != DMA_TO_DEVICE) | 1402 | if (sc->sc_data_direction != DMA_TO_DEVICE) |
1404 | return 0; | 1403 | return 0; |
1405 | 1404 | ||
1406 | if (ctask->imm_count) { | 1405 | if (ctask->imm_count) { |
1407 | tcp_ctask->xmstate |= XMSTATE_IMM_DATA; | 1406 | set_bit(XMSTATE_BIT_IMM_DATA, &tcp_ctask->xmstate); |
1408 | iscsi_set_padding(tcp_ctask, ctask->imm_count); | 1407 | iscsi_set_padding(tcp_ctask, ctask->imm_count); |
1409 | 1408 | ||
1410 | if (ctask->conn->datadgst_en) { | 1409 | if (ctask->conn->datadgst_en) { |
@@ -1414,9 +1413,10 @@ iscsi_send_cmd_hdr(struct iscsi_conn *conn, struct iscsi_cmd_task *ctask) | |||
1414 | } | 1413 | } |
1415 | } | 1414 | } |
1416 | 1415 | ||
1417 | if (ctask->unsol_count) | 1416 | if (ctask->unsol_count) { |
1418 | tcp_ctask->xmstate |= | 1417 | set_bit(XMSTATE_BIT_UNS_HDR, &tcp_ctask->xmstate); |
1419 | XMSTATE_UNS_HDR | XMSTATE_UNS_INIT; | 1418 | set_bit(XMSTATE_BIT_UNS_INIT, &tcp_ctask->xmstate); |
1419 | } | ||
1420 | } | 1420 | } |
1421 | return rc; | 1421 | return rc; |
1422 | } | 1422 | } |
@@ -1428,25 +1428,25 @@ iscsi_send_padding(struct iscsi_conn *conn, struct iscsi_cmd_task *ctask) | |||
1428 | struct iscsi_tcp_conn *tcp_conn = conn->dd_data; | 1428 | struct iscsi_tcp_conn *tcp_conn = conn->dd_data; |
1429 | int sent = 0, rc; | 1429 | int sent = 0, rc; |
1430 | 1430 | ||
1431 | if (tcp_ctask->xmstate & XMSTATE_W_PAD) { | 1431 | if (test_bit(XMSTATE_BIT_W_PAD, &tcp_ctask->xmstate)) { |
1432 | iscsi_buf_init_iov(&tcp_ctask->sendbuf, (char*)&tcp_ctask->pad, | 1432 | iscsi_buf_init_iov(&tcp_ctask->sendbuf, (char*)&tcp_ctask->pad, |
1433 | tcp_ctask->pad_count); | 1433 | tcp_ctask->pad_count); |
1434 | if (conn->datadgst_en) | 1434 | if (conn->datadgst_en) |
1435 | crypto_hash_update(&tcp_conn->tx_hash, | 1435 | crypto_hash_update(&tcp_conn->tx_hash, |
1436 | &tcp_ctask->sendbuf.sg, | 1436 | &tcp_ctask->sendbuf.sg, |
1437 | tcp_ctask->sendbuf.sg.length); | 1437 | tcp_ctask->sendbuf.sg.length); |
1438 | } else if (!(tcp_ctask->xmstate & XMSTATE_W_RESEND_PAD)) | 1438 | } else if (!test_bit(XMSTATE_BIT_W_RESEND_PAD, &tcp_ctask->xmstate)) |
1439 | return 0; | 1439 | return 0; |
1440 | 1440 | ||
1441 | tcp_ctask->xmstate &= ~XMSTATE_W_PAD; | 1441 | clear_bit(XMSTATE_BIT_W_PAD, &tcp_ctask->xmstate); |
1442 | tcp_ctask->xmstate &= ~XMSTATE_W_RESEND_PAD; | 1442 | clear_bit(XMSTATE_BIT_W_RESEND_PAD, &tcp_ctask->xmstate); |
1443 | debug_scsi("sending %d pad bytes for itt 0x%x\n", | 1443 | debug_scsi("sending %d pad bytes for itt 0x%x\n", |
1444 | tcp_ctask->pad_count, ctask->itt); | 1444 | tcp_ctask->pad_count, ctask->itt); |
1445 | rc = iscsi_sendpage(conn, &tcp_ctask->sendbuf, &tcp_ctask->pad_count, | 1445 | rc = iscsi_sendpage(conn, &tcp_ctask->sendbuf, &tcp_ctask->pad_count, |
1446 | &sent); | 1446 | &sent); |
1447 | if (rc) { | 1447 | if (rc) { |
1448 | debug_scsi("padding send failed %d\n", rc); | 1448 | debug_scsi("padding send failed %d\n", rc); |
1449 | tcp_ctask->xmstate |= XMSTATE_W_RESEND_PAD; | 1449 | set_bit(XMSTATE_BIT_W_RESEND_PAD, &tcp_ctask->xmstate); |
1450 | } | 1450 | } |
1451 | return rc; | 1451 | return rc; |
1452 | } | 1452 | } |
@@ -1465,11 +1465,11 @@ iscsi_send_digest(struct iscsi_conn *conn, struct iscsi_cmd_task *ctask, | |||
1465 | tcp_ctask = ctask->dd_data; | 1465 | tcp_ctask = ctask->dd_data; |
1466 | tcp_conn = conn->dd_data; | 1466 | tcp_conn = conn->dd_data; |
1467 | 1467 | ||
1468 | if (!(tcp_ctask->xmstate & XMSTATE_W_RESEND_DATA_DIGEST)) { | 1468 | if (!test_bit(XMSTATE_BIT_W_RESEND_DATA_DIGEST, &tcp_ctask->xmstate)) { |
1469 | crypto_hash_final(&tcp_conn->tx_hash, (u8*)digest); | 1469 | crypto_hash_final(&tcp_conn->tx_hash, (u8*)digest); |
1470 | iscsi_buf_init_iov(buf, (char*)digest, 4); | 1470 | iscsi_buf_init_iov(buf, (char*)digest, 4); |
1471 | } | 1471 | } |
1472 | tcp_ctask->xmstate &= ~XMSTATE_W_RESEND_DATA_DIGEST; | 1472 | clear_bit(XMSTATE_BIT_W_RESEND_DATA_DIGEST, &tcp_ctask->xmstate); |
1473 | 1473 | ||
1474 | rc = iscsi_sendpage(conn, buf, &tcp_ctask->digest_count, &sent); | 1474 | rc = iscsi_sendpage(conn, buf, &tcp_ctask->digest_count, &sent); |
1475 | if (!rc) | 1475 | if (!rc) |
@@ -1478,7 +1478,7 @@ iscsi_send_digest(struct iscsi_conn *conn, struct iscsi_cmd_task *ctask, | |||
1478 | else { | 1478 | else { |
1479 | debug_scsi("sending digest 0x%x failed for itt 0x%x!\n", | 1479 | debug_scsi("sending digest 0x%x failed for itt 0x%x!\n", |
1480 | *digest, ctask->itt); | 1480 | *digest, ctask->itt); |
1481 | tcp_ctask->xmstate |= XMSTATE_W_RESEND_DATA_DIGEST; | 1481 | set_bit(XMSTATE_BIT_W_RESEND_DATA_DIGEST, &tcp_ctask->xmstate); |
1482 | } | 1482 | } |
1483 | return rc; | 1483 | return rc; |
1484 | } | 1484 | } |
@@ -1526,8 +1526,8 @@ iscsi_send_unsol_hdr(struct iscsi_conn *conn, struct iscsi_cmd_task *ctask) | |||
1526 | struct iscsi_data_task *dtask; | 1526 | struct iscsi_data_task *dtask; |
1527 | int rc; | 1527 | int rc; |
1528 | 1528 | ||
1529 | tcp_ctask->xmstate |= XMSTATE_UNS_DATA; | 1529 | set_bit(XMSTATE_BIT_UNS_DATA, &tcp_ctask->xmstate); |
1530 | if (tcp_ctask->xmstate & XMSTATE_UNS_INIT) { | 1530 | if (test_bit(XMSTATE_BIT_UNS_INIT, &tcp_ctask->xmstate)) { |
1531 | dtask = &tcp_ctask->unsol_dtask; | 1531 | dtask = &tcp_ctask->unsol_dtask; |
1532 | 1532 | ||
1533 | iscsi_prep_unsolicit_data_pdu(ctask, &dtask->hdr); | 1533 | iscsi_prep_unsolicit_data_pdu(ctask, &dtask->hdr); |
@@ -1537,14 +1537,14 @@ iscsi_send_unsol_hdr(struct iscsi_conn *conn, struct iscsi_cmd_task *ctask) | |||
1537 | iscsi_hdr_digest(conn, &tcp_ctask->headbuf, | 1537 | iscsi_hdr_digest(conn, &tcp_ctask->headbuf, |
1538 | (u8*)dtask->hdrext); | 1538 | (u8*)dtask->hdrext); |
1539 | 1539 | ||
1540 | tcp_ctask->xmstate &= ~XMSTATE_UNS_INIT; | 1540 | clear_bit(XMSTATE_BIT_UNS_INIT, &tcp_ctask->xmstate); |
1541 | iscsi_set_padding(tcp_ctask, ctask->data_count); | 1541 | iscsi_set_padding(tcp_ctask, ctask->data_count); |
1542 | } | 1542 | } |
1543 | 1543 | ||
1544 | rc = iscsi_sendhdr(conn, &tcp_ctask->headbuf, ctask->data_count); | 1544 | rc = iscsi_sendhdr(conn, &tcp_ctask->headbuf, ctask->data_count); |
1545 | if (rc) { | 1545 | if (rc) { |
1546 | tcp_ctask->xmstate &= ~XMSTATE_UNS_DATA; | 1546 | clear_bit(XMSTATE_BIT_UNS_DATA, &tcp_ctask->xmstate); |
1547 | tcp_ctask->xmstate |= XMSTATE_UNS_HDR; | 1547 | set_bit(XMSTATE_BIT_UNS_HDR, &tcp_ctask->xmstate); |
1548 | return rc; | 1548 | return rc; |
1549 | } | 1549 | } |
1550 | 1550 | ||
@@ -1565,16 +1565,15 @@ iscsi_send_unsol_pdu(struct iscsi_conn *conn, struct iscsi_cmd_task *ctask) | |||
1565 | struct iscsi_tcp_cmd_task *tcp_ctask = ctask->dd_data; | 1565 | struct iscsi_tcp_cmd_task *tcp_ctask = ctask->dd_data; |
1566 | int rc; | 1566 | int rc; |
1567 | 1567 | ||
1568 | if (tcp_ctask->xmstate & XMSTATE_UNS_HDR) { | 1568 | if (test_and_clear_bit(XMSTATE_BIT_UNS_HDR, &tcp_ctask->xmstate)) { |
1569 | BUG_ON(!ctask->unsol_count); | 1569 | BUG_ON(!ctask->unsol_count); |
1570 | tcp_ctask->xmstate &= ~XMSTATE_UNS_HDR; | ||
1571 | send_hdr: | 1570 | send_hdr: |
1572 | rc = iscsi_send_unsol_hdr(conn, ctask); | 1571 | rc = iscsi_send_unsol_hdr(conn, ctask); |
1573 | if (rc) | 1572 | if (rc) |
1574 | return rc; | 1573 | return rc; |
1575 | } | 1574 | } |
1576 | 1575 | ||
1577 | if (tcp_ctask->xmstate & XMSTATE_UNS_DATA) { | 1576 | if (test_bit(XMSTATE_BIT_UNS_DATA, &tcp_ctask->xmstate)) { |
1578 | struct iscsi_data_task *dtask = &tcp_ctask->unsol_dtask; | 1577 | struct iscsi_data_task *dtask = &tcp_ctask->unsol_dtask; |
1579 | int start = tcp_ctask->sent; | 1578 | int start = tcp_ctask->sent; |
1580 | 1579 | ||
@@ -1584,14 +1583,14 @@ send_hdr: | |||
1584 | ctask->unsol_count -= tcp_ctask->sent - start; | 1583 | ctask->unsol_count -= tcp_ctask->sent - start; |
1585 | if (rc) | 1584 | if (rc) |
1586 | return rc; | 1585 | return rc; |
1587 | tcp_ctask->xmstate &= ~XMSTATE_UNS_DATA; | 1586 | clear_bit(XMSTATE_BIT_UNS_DATA, &tcp_ctask->xmstate); |
1588 | /* | 1587 | /* |
1589 | * Done with the Data-Out. Next, check if we need | 1588 | * Done with the Data-Out. Next, check if we need |
1590 | * to send another unsolicited Data-Out. | 1589 | * to send another unsolicited Data-Out. |
1591 | */ | 1590 | */ |
1592 | if (ctask->unsol_count) { | 1591 | if (ctask->unsol_count) { |
1593 | debug_scsi("sending more uns\n"); | 1592 | debug_scsi("sending more uns\n"); |
1594 | tcp_ctask->xmstate |= XMSTATE_UNS_INIT; | 1593 | set_bit(XMSTATE_BIT_UNS_INIT, &tcp_ctask->xmstate); |
1595 | goto send_hdr; | 1594 | goto send_hdr; |
1596 | } | 1595 | } |
1597 | } | 1596 | } |
@@ -1607,7 +1606,7 @@ static int iscsi_send_sol_pdu(struct iscsi_conn *conn, | |||
1607 | struct iscsi_data_task *dtask; | 1606 | struct iscsi_data_task *dtask; |
1608 | int left, rc; | 1607 | int left, rc; |
1609 | 1608 | ||
1610 | if (tcp_ctask->xmstate & XMSTATE_SOL_HDR_INIT) { | 1609 | if (test_bit(XMSTATE_BIT_SOL_HDR_INIT, &tcp_ctask->xmstate)) { |
1611 | if (!tcp_ctask->r2t) { | 1610 | if (!tcp_ctask->r2t) { |
1612 | spin_lock_bh(&session->lock); | 1611 | spin_lock_bh(&session->lock); |
1613 | __kfifo_get(tcp_ctask->r2tqueue, (void*)&tcp_ctask->r2t, | 1612 | __kfifo_get(tcp_ctask->r2tqueue, (void*)&tcp_ctask->r2t, |
@@ -1621,19 +1620,19 @@ send_hdr: | |||
1621 | if (conn->hdrdgst_en) | 1620 | if (conn->hdrdgst_en) |
1622 | iscsi_hdr_digest(conn, &r2t->headbuf, | 1621 | iscsi_hdr_digest(conn, &r2t->headbuf, |
1623 | (u8*)dtask->hdrext); | 1622 | (u8*)dtask->hdrext); |
1624 | tcp_ctask->xmstate &= ~XMSTATE_SOL_HDR_INIT; | 1623 | clear_bit(XMSTATE_BIT_SOL_HDR_INIT, &tcp_ctask->xmstate); |
1625 | tcp_ctask->xmstate |= XMSTATE_SOL_HDR; | 1624 | set_bit(XMSTATE_BIT_SOL_HDR, &tcp_ctask->xmstate); |
1626 | } | 1625 | } |
1627 | 1626 | ||
1628 | if (tcp_ctask->xmstate & XMSTATE_SOL_HDR) { | 1627 | if (test_bit(XMSTATE_BIT_SOL_HDR, &tcp_ctask->xmstate)) { |
1629 | r2t = tcp_ctask->r2t; | 1628 | r2t = tcp_ctask->r2t; |
1630 | dtask = &r2t->dtask; | 1629 | dtask = &r2t->dtask; |
1631 | 1630 | ||
1632 | rc = iscsi_sendhdr(conn, &r2t->headbuf, r2t->data_count); | 1631 | rc = iscsi_sendhdr(conn, &r2t->headbuf, r2t->data_count); |
1633 | if (rc) | 1632 | if (rc) |
1634 | return rc; | 1633 | return rc; |
1635 | tcp_ctask->xmstate &= ~XMSTATE_SOL_HDR; | 1634 | clear_bit(XMSTATE_BIT_SOL_HDR, &tcp_ctask->xmstate); |
1636 | tcp_ctask->xmstate |= XMSTATE_SOL_DATA; | 1635 | set_bit(XMSTATE_BIT_SOL_DATA, &tcp_ctask->xmstate); |
1637 | 1636 | ||
1638 | if (conn->datadgst_en) { | 1637 | if (conn->datadgst_en) { |
1639 | iscsi_data_digest_init(conn->dd_data, tcp_ctask); | 1638 | iscsi_data_digest_init(conn->dd_data, tcp_ctask); |
@@ -1646,7 +1645,7 @@ send_hdr: | |||
1646 | r2t->sent); | 1645 | r2t->sent); |
1647 | } | 1646 | } |
1648 | 1647 | ||
1649 | if (tcp_ctask->xmstate & XMSTATE_SOL_DATA) { | 1648 | if (test_bit(XMSTATE_BIT_SOL_DATA, &tcp_ctask->xmstate)) { |
1650 | r2t = tcp_ctask->r2t; | 1649 | r2t = tcp_ctask->r2t; |
1651 | dtask = &r2t->dtask; | 1650 | dtask = &r2t->dtask; |
1652 | 1651 | ||
@@ -1655,7 +1654,7 @@ send_hdr: | |||
1655 | &dtask->digestbuf, &dtask->digest); | 1654 | &dtask->digestbuf, &dtask->digest); |
1656 | if (rc) | 1655 | if (rc) |
1657 | return rc; | 1656 | return rc; |
1658 | tcp_ctask->xmstate &= ~XMSTATE_SOL_DATA; | 1657 | clear_bit(XMSTATE_BIT_SOL_DATA, &tcp_ctask->xmstate); |
1659 | 1658 | ||
1660 | /* | 1659 | /* |
1661 | * Done with this Data-Out. Next, check if we have | 1660 | * Done with this Data-Out. Next, check if we have |
@@ -1700,32 +1699,32 @@ send_hdr: | |||
1700 | * xmit stages. | 1699 | * xmit stages. |
1701 | * | 1700 | * |
1702 | *iscsi_send_cmd_hdr() | 1701 | *iscsi_send_cmd_hdr() |
1703 | * XMSTATE_CMD_HDR_INIT - prepare Header and Data buffers Calculate | 1702 | * XMSTATE_BIT_CMD_HDR_INIT - prepare Header and Data buffers Calculate |
1704 | * Header Digest | 1703 | * Header Digest |
1705 | * XMSTATE_CMD_HDR_XMIT - Transmit header in progress | 1704 | * XMSTATE_BIT_CMD_HDR_XMIT - Transmit header in progress |
1706 | * | 1705 | * |
1707 | *iscsi_send_padding | 1706 | *iscsi_send_padding |
1708 | * XMSTATE_W_PAD - Prepare and send pading | 1707 | * XMSTATE_BIT_W_PAD - Prepare and send pading |
1709 | * XMSTATE_W_RESEND_PAD - retry send pading | 1708 | * XMSTATE_BIT_W_RESEND_PAD - retry send pading |
1710 | * | 1709 | * |
1711 | *iscsi_send_digest | 1710 | *iscsi_send_digest |
1712 | * XMSTATE_W_RESEND_DATA_DIGEST - Finalize and send Data Digest | 1711 | * XMSTATE_BIT_W_RESEND_DATA_DIGEST - Finalize and send Data Digest |
1713 | * XMSTATE_W_RESEND_DATA_DIGEST - retry sending digest | 1712 | * XMSTATE_BIT_W_RESEND_DATA_DIGEST - retry sending digest |
1714 | * | 1713 | * |
1715 | *iscsi_send_unsol_hdr | 1714 | *iscsi_send_unsol_hdr |
1716 | * XMSTATE_UNS_INIT - prepare un-solicit data header and digest | 1715 | * XMSTATE_BIT_UNS_INIT - prepare un-solicit data header and digest |
1717 | * XMSTATE_UNS_HDR - send un-solicit header | 1716 | * XMSTATE_BIT_UNS_HDR - send un-solicit header |
1718 | * | 1717 | * |
1719 | *iscsi_send_unsol_pdu | 1718 | *iscsi_send_unsol_pdu |
1720 | * XMSTATE_UNS_DATA - send un-solicit data in progress | 1719 | * XMSTATE_BIT_UNS_DATA - send un-solicit data in progress |
1721 | * | 1720 | * |
1722 | *iscsi_send_sol_pdu | 1721 | *iscsi_send_sol_pdu |
1723 | * XMSTATE_SOL_HDR_INIT - solicit data header and digest initialize | 1722 | * XMSTATE_BIT_SOL_HDR_INIT - solicit data header and digest initialize |
1724 | * XMSTATE_SOL_HDR - send solicit header | 1723 | * XMSTATE_BIT_SOL_HDR - send solicit header |
1725 | * XMSTATE_SOL_DATA - send solicit data | 1724 | * XMSTATE_BIT_SOL_DATA - send solicit data |
1726 | * | 1725 | * |
1727 | *iscsi_tcp_ctask_xmit | 1726 | *iscsi_tcp_ctask_xmit |
1728 | * XMSTATE_IMM_DATA - xmit managment data (??) | 1727 | * XMSTATE_BIT_IMM_DATA - xmit managment data (??) |
1729 | **/ | 1728 | **/ |
1730 | static int | 1729 | static int |
1731 | iscsi_tcp_ctask_xmit(struct iscsi_conn *conn, struct iscsi_cmd_task *ctask) | 1730 | iscsi_tcp_ctask_xmit(struct iscsi_conn *conn, struct iscsi_cmd_task *ctask) |
@@ -1742,13 +1741,13 @@ iscsi_tcp_ctask_xmit(struct iscsi_conn *conn, struct iscsi_cmd_task *ctask) | |||
1742 | if (ctask->sc->sc_data_direction != DMA_TO_DEVICE) | 1741 | if (ctask->sc->sc_data_direction != DMA_TO_DEVICE) |
1743 | return 0; | 1742 | return 0; |
1744 | 1743 | ||
1745 | if (tcp_ctask->xmstate & XMSTATE_IMM_DATA) { | 1744 | if (test_bit(XMSTATE_BIT_IMM_DATA, &tcp_ctask->xmstate)) { |
1746 | rc = iscsi_send_data(ctask, &tcp_ctask->sendbuf, &tcp_ctask->sg, | 1745 | rc = iscsi_send_data(ctask, &tcp_ctask->sendbuf, &tcp_ctask->sg, |
1747 | &tcp_ctask->sent, &ctask->imm_count, | 1746 | &tcp_ctask->sent, &ctask->imm_count, |
1748 | &tcp_ctask->immbuf, &tcp_ctask->immdigest); | 1747 | &tcp_ctask->immbuf, &tcp_ctask->immdigest); |
1749 | if (rc) | 1748 | if (rc) |
1750 | return rc; | 1749 | return rc; |
1751 | tcp_ctask->xmstate &= ~XMSTATE_IMM_DATA; | 1750 | clear_bit(XMSTATE_BIT_IMM_DATA, &tcp_ctask->xmstate); |
1752 | } | 1751 | } |
1753 | 1752 | ||
1754 | rc = iscsi_send_unsol_pdu(conn, ctask); | 1753 | rc = iscsi_send_unsol_pdu(conn, ctask); |
@@ -1981,7 +1980,7 @@ static void | |||
1981 | iscsi_tcp_mgmt_init(struct iscsi_conn *conn, struct iscsi_mgmt_task *mtask) | 1980 | iscsi_tcp_mgmt_init(struct iscsi_conn *conn, struct iscsi_mgmt_task *mtask) |
1982 | { | 1981 | { |
1983 | struct iscsi_tcp_mgmt_task *tcp_mtask = mtask->dd_data; | 1982 | struct iscsi_tcp_mgmt_task *tcp_mtask = mtask->dd_data; |
1984 | tcp_mtask->xmstate = XMSTATE_IMM_HDR_INIT; | 1983 | tcp_mtask->xmstate = 1 << XMSTATE_BIT_IMM_HDR_INIT; |
1985 | } | 1984 | } |
1986 | 1985 | ||
1987 | static int | 1986 | static int |
diff --git a/drivers/scsi/iscsi_tcp.h b/drivers/scsi/iscsi_tcp.h index 7eba44df0a7f..68c36cc8997e 100644 --- a/drivers/scsi/iscsi_tcp.h +++ b/drivers/scsi/iscsi_tcp.h | |||
@@ -32,21 +32,21 @@ | |||
32 | #define IN_PROGRESS_PAD_RECV 0x4 | 32 | #define IN_PROGRESS_PAD_RECV 0x4 |
33 | 33 | ||
34 | /* xmit state machine */ | 34 | /* xmit state machine */ |
35 | #define XMSTATE_IDLE 0x0 | 35 | #define XMSTATE_VALUE_IDLE 0 |
36 | #define XMSTATE_CMD_HDR_INIT 0x1 | 36 | #define XMSTATE_BIT_CMD_HDR_INIT 0 |
37 | #define XMSTATE_CMD_HDR_XMIT 0x2 | 37 | #define XMSTATE_BIT_CMD_HDR_XMIT 1 |
38 | #define XMSTATE_IMM_HDR 0x4 | 38 | #define XMSTATE_BIT_IMM_HDR 2 |
39 | #define XMSTATE_IMM_DATA 0x8 | 39 | #define XMSTATE_BIT_IMM_DATA 3 |
40 | #define XMSTATE_UNS_INIT 0x10 | 40 | #define XMSTATE_BIT_UNS_INIT 4 |
41 | #define XMSTATE_UNS_HDR 0x20 | 41 | #define XMSTATE_BIT_UNS_HDR 5 |
42 | #define XMSTATE_UNS_DATA 0x40 | 42 | #define XMSTATE_BIT_UNS_DATA 6 |
43 | #define XMSTATE_SOL_HDR 0x80 | 43 | #define XMSTATE_BIT_SOL_HDR 7 |
44 | #define XMSTATE_SOL_DATA 0x100 | 44 | #define XMSTATE_BIT_SOL_DATA 8 |
45 | #define XMSTATE_W_PAD 0x200 | 45 | #define XMSTATE_BIT_W_PAD 9 |
46 | #define XMSTATE_W_RESEND_PAD 0x400 | 46 | #define XMSTATE_BIT_W_RESEND_PAD 10 |
47 | #define XMSTATE_W_RESEND_DATA_DIGEST 0x800 | 47 | #define XMSTATE_BIT_W_RESEND_DATA_DIGEST 11 |
48 | #define XMSTATE_IMM_HDR_INIT 0x1000 | 48 | #define XMSTATE_BIT_IMM_HDR_INIT 12 |
49 | #define XMSTATE_SOL_HDR_INIT 0x2000 | 49 | #define XMSTATE_BIT_SOL_HDR_INIT 13 |
50 | 50 | ||
51 | #define ISCSI_PAD_LEN 4 | 51 | #define ISCSI_PAD_LEN 4 |
52 | #define ISCSI_SG_TABLESIZE SG_ALL | 52 | #define ISCSI_SG_TABLESIZE SG_ALL |
@@ -122,7 +122,7 @@ struct iscsi_data_task { | |||
122 | struct iscsi_tcp_mgmt_task { | 122 | struct iscsi_tcp_mgmt_task { |
123 | struct iscsi_hdr hdr; | 123 | struct iscsi_hdr hdr; |
124 | char hdrext[sizeof(__u32)]; /* Header-Digest */ | 124 | char hdrext[sizeof(__u32)]; /* Header-Digest */ |
125 | int xmstate; /* mgmt xmit progress */ | 125 | unsigned long xmstate; /* mgmt xmit progress */ |
126 | struct iscsi_buf headbuf; /* header buffer */ | 126 | struct iscsi_buf headbuf; /* header buffer */ |
127 | struct iscsi_buf sendbuf; /* in progress buffer */ | 127 | struct iscsi_buf sendbuf; /* in progress buffer */ |
128 | int sent; | 128 | int sent; |
@@ -150,7 +150,7 @@ struct iscsi_tcp_cmd_task { | |||
150 | int pad_count; /* padded bytes */ | 150 | int pad_count; /* padded bytes */ |
151 | struct iscsi_buf headbuf; /* header buf (xmit) */ | 151 | struct iscsi_buf headbuf; /* header buf (xmit) */ |
152 | struct iscsi_buf sendbuf; /* in progress buffer*/ | 152 | struct iscsi_buf sendbuf; /* in progress buffer*/ |
153 | int xmstate; /* xmit xtate machine */ | 153 | unsigned long xmstate; /* xmit xtate machine */ |
154 | int sent; | 154 | int sent; |
155 | struct scatterlist *sg; /* per-cmd SG list */ | 155 | struct scatterlist *sg; /* per-cmd SG list */ |
156 | struct scatterlist *bad_sg; /* assert statement */ | 156 | struct scatterlist *bad_sg; /* assert statement */ |
diff --git a/drivers/scsi/libiscsi.c b/drivers/scsi/libiscsi.c index efceed451b46..8b57af5baaec 100644 --- a/drivers/scsi/libiscsi.c +++ b/drivers/scsi/libiscsi.c | |||
@@ -291,9 +291,6 @@ invalid_datalen: | |||
291 | min_t(uint16_t, senselen, SCSI_SENSE_BUFFERSIZE)); | 291 | min_t(uint16_t, senselen, SCSI_SENSE_BUFFERSIZE)); |
292 | } | 292 | } |
293 | 293 | ||
294 | if (sc->sc_data_direction == DMA_TO_DEVICE) | ||
295 | goto out; | ||
296 | |||
297 | if (rhdr->flags & ISCSI_FLAG_CMD_UNDERFLOW) { | 294 | if (rhdr->flags & ISCSI_FLAG_CMD_UNDERFLOW) { |
298 | int res_count = be32_to_cpu(rhdr->residual_count); | 295 | int res_count = be32_to_cpu(rhdr->residual_count); |
299 | 296 | ||
diff --git a/drivers/scsi/mac_scsi.c b/drivers/scsi/mac_scsi.c index abe2bda6ac37..3b09ab21d701 100644 --- a/drivers/scsi/mac_scsi.c +++ b/drivers/scsi/mac_scsi.c | |||
@@ -303,7 +303,7 @@ int macscsi_detect(struct scsi_host_template * tpnt) | |||
303 | 303 | ||
304 | if (instance->irq != SCSI_IRQ_NONE) | 304 | if (instance->irq != SCSI_IRQ_NONE) |
305 | if (request_irq(instance->irq, NCR5380_intr, IRQ_FLG_SLOW, | 305 | if (request_irq(instance->irq, NCR5380_intr, IRQ_FLG_SLOW, |
306 | "ncr5380", instance)) { | 306 | "ncr5380", instance)) { |
307 | printk(KERN_WARNING "scsi%d: IRQ%d not free, interrupts disabled\n", | 307 | printk(KERN_WARNING "scsi%d: IRQ%d not free, interrupts disabled\n", |
308 | instance->host_no, instance->irq); | 308 | instance->host_no, instance->irq); |
309 | instance->irq = SCSI_IRQ_NONE; | 309 | instance->irq = SCSI_IRQ_NONE; |
@@ -326,7 +326,7 @@ int macscsi_detect(struct scsi_host_template * tpnt) | |||
326 | int macscsi_release (struct Scsi_Host *shpnt) | 326 | int macscsi_release (struct Scsi_Host *shpnt) |
327 | { | 327 | { |
328 | if (shpnt->irq != SCSI_IRQ_NONE) | 328 | if (shpnt->irq != SCSI_IRQ_NONE) |
329 | free_irq (shpnt->irq, NCR5380_intr); | 329 | free_irq(shpnt->irq, shpnt); |
330 | NCR5380_exit(shpnt); | 330 | NCR5380_exit(shpnt); |
331 | 331 | ||
332 | return 0; | 332 | return 0; |
diff --git a/drivers/scsi/pas16.c b/drivers/scsi/pas16.c index ee5965659971..f2018b46f494 100644 --- a/drivers/scsi/pas16.c +++ b/drivers/scsi/pas16.c | |||
@@ -453,7 +453,8 @@ int __init pas16_detect(struct scsi_host_template * tpnt) | |||
453 | instance->irq = NCR5380_probe_irq(instance, PAS16_IRQS); | 453 | instance->irq = NCR5380_probe_irq(instance, PAS16_IRQS); |
454 | 454 | ||
455 | if (instance->irq != SCSI_IRQ_NONE) | 455 | if (instance->irq != SCSI_IRQ_NONE) |
456 | if (request_irq(instance->irq, pas16_intr, IRQF_DISABLED, "pas16", instance)) { | 456 | if (request_irq(instance->irq, pas16_intr, IRQF_DISABLED, |
457 | "pas16", instance)) { | ||
457 | printk("scsi%d : IRQ%d not free, interrupts disabled\n", | 458 | printk("scsi%d : IRQ%d not free, interrupts disabled\n", |
458 | instance->host_no, instance->irq); | 459 | instance->host_no, instance->irq); |
459 | instance->irq = SCSI_IRQ_NONE; | 460 | instance->irq = SCSI_IRQ_NONE; |
@@ -604,7 +605,7 @@ static inline int NCR5380_pwrite (struct Scsi_Host *instance, unsigned char *src | |||
604 | static int pas16_release(struct Scsi_Host *shost) | 605 | static int pas16_release(struct Scsi_Host *shost) |
605 | { | 606 | { |
606 | if (shost->irq) | 607 | if (shost->irq) |
607 | free_irq(shost->irq, NULL); | 608 | free_irq(shost->irq, shost); |
608 | NCR5380_exit(shost); | 609 | NCR5380_exit(shost); |
609 | if (shost->dma_channel != 0xff) | 610 | if (shost->dma_channel != 0xff) |
610 | free_dma(shost->dma_channel); | 611 | free_dma(shost->dma_channel); |
diff --git a/drivers/scsi/qla1280.c b/drivers/scsi/qla1280.c index 3aeb68bcb7ac..146d540f6281 100644 --- a/drivers/scsi/qla1280.c +++ b/drivers/scsi/qla1280.c | |||
@@ -1310,14 +1310,7 @@ qla1280_done(struct scsi_qla_host *ha) | |||
1310 | } | 1310 | } |
1311 | 1311 | ||
1312 | /* Release memory used for this I/O */ | 1312 | /* Release memory used for this I/O */ |
1313 | if (cmd->use_sg) { | 1313 | scsi_dma_unmap(cmd); |
1314 | pci_unmap_sg(ha->pdev, cmd->request_buffer, | ||
1315 | cmd->use_sg, cmd->sc_data_direction); | ||
1316 | } else if (cmd->request_bufflen) { | ||
1317 | pci_unmap_single(ha->pdev, sp->saved_dma_handle, | ||
1318 | cmd->request_bufflen, | ||
1319 | cmd->sc_data_direction); | ||
1320 | } | ||
1321 | 1314 | ||
1322 | /* Call the mid-level driver interrupt handler */ | 1315 | /* Call the mid-level driver interrupt handler */ |
1323 | CMD_HANDLE(sp->cmd) = (unsigned char *)INVALID_HANDLE; | 1316 | CMD_HANDLE(sp->cmd) = (unsigned char *)INVALID_HANDLE; |
@@ -1406,14 +1399,14 @@ qla1280_return_status(struct response * sts, struct scsi_cmnd *cp) | |||
1406 | break; | 1399 | break; |
1407 | 1400 | ||
1408 | case CS_DATA_UNDERRUN: | 1401 | case CS_DATA_UNDERRUN: |
1409 | if ((cp->request_bufflen - residual_length) < | 1402 | if ((scsi_bufflen(cp) - residual_length) < |
1410 | cp->underflow) { | 1403 | cp->underflow) { |
1411 | printk(KERN_WARNING | 1404 | printk(KERN_WARNING |
1412 | "scsi: Underflow detected - retrying " | 1405 | "scsi: Underflow detected - retrying " |
1413 | "command.\n"); | 1406 | "command.\n"); |
1414 | host_status = DID_ERROR; | 1407 | host_status = DID_ERROR; |
1415 | } else { | 1408 | } else { |
1416 | cp->resid = residual_length; | 1409 | scsi_set_resid(cp, residual_length); |
1417 | host_status = DID_OK; | 1410 | host_status = DID_OK; |
1418 | } | 1411 | } |
1419 | break; | 1412 | break; |
@@ -2775,33 +2768,28 @@ qla1280_64bit_start_scsi(struct scsi_qla_host *ha, struct srb * sp) | |||
2775 | struct device_reg __iomem *reg = ha->iobase; | 2768 | struct device_reg __iomem *reg = ha->iobase; |
2776 | struct scsi_cmnd *cmd = sp->cmd; | 2769 | struct scsi_cmnd *cmd = sp->cmd; |
2777 | cmd_a64_entry_t *pkt; | 2770 | cmd_a64_entry_t *pkt; |
2778 | struct scatterlist *sg = NULL, *s; | ||
2779 | __le32 *dword_ptr; | 2771 | __le32 *dword_ptr; |
2780 | dma_addr_t dma_handle; | 2772 | dma_addr_t dma_handle; |
2781 | int status = 0; | 2773 | int status = 0; |
2782 | int cnt; | 2774 | int cnt; |
2783 | int req_cnt; | 2775 | int req_cnt; |
2784 | u16 seg_cnt; | 2776 | int seg_cnt; |
2785 | u8 dir; | 2777 | u8 dir; |
2786 | 2778 | ||
2787 | ENTER("qla1280_64bit_start_scsi:"); | 2779 | ENTER("qla1280_64bit_start_scsi:"); |
2788 | 2780 | ||
2789 | /* Calculate number of entries and segments required. */ | 2781 | /* Calculate number of entries and segments required. */ |
2790 | req_cnt = 1; | 2782 | req_cnt = 1; |
2791 | if (cmd->use_sg) { | 2783 | seg_cnt = scsi_dma_map(cmd); |
2792 | sg = (struct scatterlist *) cmd->request_buffer; | 2784 | if (seg_cnt > 0) { |
2793 | seg_cnt = pci_map_sg(ha->pdev, sg, cmd->use_sg, | ||
2794 | cmd->sc_data_direction); | ||
2795 | |||
2796 | if (seg_cnt > 2) { | 2785 | if (seg_cnt > 2) { |
2797 | req_cnt += (seg_cnt - 2) / 5; | 2786 | req_cnt += (seg_cnt - 2) / 5; |
2798 | if ((seg_cnt - 2) % 5) | 2787 | if ((seg_cnt - 2) % 5) |
2799 | req_cnt++; | 2788 | req_cnt++; |
2800 | } | 2789 | } |
2801 | } else if (cmd->request_bufflen) { /* If data transfer. */ | 2790 | } else if (seg_cnt < 0) { |
2802 | seg_cnt = 1; | 2791 | status = 1; |
2803 | } else { | 2792 | goto out; |
2804 | seg_cnt = 0; | ||
2805 | } | 2793 | } |
2806 | 2794 | ||
2807 | if ((req_cnt + 2) >= ha->req_q_cnt) { | 2795 | if ((req_cnt + 2) >= ha->req_q_cnt) { |
@@ -2889,124 +2877,104 @@ qla1280_64bit_start_scsi(struct scsi_qla_host *ha, struct srb * sp) | |||
2889 | * Load data segments. | 2877 | * Load data segments. |
2890 | */ | 2878 | */ |
2891 | if (seg_cnt) { /* If data transfer. */ | 2879 | if (seg_cnt) { /* If data transfer. */ |
2880 | struct scatterlist *sg, *s; | ||
2892 | int remseg = seg_cnt; | 2881 | int remseg = seg_cnt; |
2882 | |||
2883 | sg = scsi_sglist(cmd); | ||
2884 | |||
2893 | /* Setup packet address segment pointer. */ | 2885 | /* Setup packet address segment pointer. */ |
2894 | dword_ptr = (u32 *)&pkt->dseg_0_address; | 2886 | dword_ptr = (u32 *)&pkt->dseg_0_address; |
2895 | 2887 | ||
2896 | if (cmd->use_sg) { /* If scatter gather */ | 2888 | /* Load command entry data segments. */ |
2897 | /* Load command entry data segments. */ | 2889 | for_each_sg(sg, s, seg_cnt, cnt) { |
2898 | for_each_sg(sg, s, seg_cnt, cnt) { | 2890 | if (cnt == 2) |
2899 | if (cnt == 2) | 2891 | break; |
2892 | |||
2893 | dma_handle = sg_dma_address(s); | ||
2894 | #if defined(CONFIG_IA64_GENERIC) || defined(CONFIG_IA64_SGI_SN2) | ||
2895 | if (ha->flags.use_pci_vchannel) | ||
2896 | sn_pci_set_vchan(ha->pdev, | ||
2897 | (unsigned long *)&dma_handle, | ||
2898 | SCSI_BUS_32(cmd)); | ||
2899 | #endif | ||
2900 | *dword_ptr++ = | ||
2901 | cpu_to_le32(pci_dma_lo32(dma_handle)); | ||
2902 | *dword_ptr++ = | ||
2903 | cpu_to_le32(pci_dma_hi32(dma_handle)); | ||
2904 | *dword_ptr++ = cpu_to_le32(sg_dma_len(s)); | ||
2905 | dprintk(3, "S/G Segment phys_addr=%x %x, len=0x%x\n", | ||
2906 | cpu_to_le32(pci_dma_hi32(dma_handle)), | ||
2907 | cpu_to_le32(pci_dma_lo32(dma_handle)), | ||
2908 | cpu_to_le32(sg_dma_len(sg_next(s)))); | ||
2909 | remseg--; | ||
2910 | } | ||
2911 | dprintk(5, "qla1280_64bit_start_scsi: Scatter/gather " | ||
2912 | "command packet data - b %i, t %i, l %i \n", | ||
2913 | SCSI_BUS_32(cmd), SCSI_TCN_32(cmd), | ||
2914 | SCSI_LUN_32(cmd)); | ||
2915 | qla1280_dump_buffer(5, (char *)pkt, | ||
2916 | REQUEST_ENTRY_SIZE); | ||
2917 | |||
2918 | /* | ||
2919 | * Build continuation packets. | ||
2920 | */ | ||
2921 | dprintk(3, "S/G Building Continuation...seg_cnt=0x%x " | ||
2922 | "remains\n", seg_cnt); | ||
2923 | |||
2924 | while (remseg > 0) { | ||
2925 | /* Update sg start */ | ||
2926 | sg = s; | ||
2927 | /* Adjust ring index. */ | ||
2928 | ha->req_ring_index++; | ||
2929 | if (ha->req_ring_index == REQUEST_ENTRY_CNT) { | ||
2930 | ha->req_ring_index = 0; | ||
2931 | ha->request_ring_ptr = | ||
2932 | ha->request_ring; | ||
2933 | } else | ||
2934 | ha->request_ring_ptr++; | ||
2935 | |||
2936 | pkt = (cmd_a64_entry_t *)ha->request_ring_ptr; | ||
2937 | |||
2938 | /* Zero out packet. */ | ||
2939 | memset(pkt, 0, REQUEST_ENTRY_SIZE); | ||
2940 | |||
2941 | /* Load packet defaults. */ | ||
2942 | ((struct cont_a64_entry *) pkt)->entry_type = | ||
2943 | CONTINUE_A64_TYPE; | ||
2944 | ((struct cont_a64_entry *) pkt)->entry_count = 1; | ||
2945 | ((struct cont_a64_entry *) pkt)->sys_define = | ||
2946 | (uint8_t)ha->req_ring_index; | ||
2947 | /* Setup packet address segment pointer. */ | ||
2948 | dword_ptr = | ||
2949 | (u32 *)&((struct cont_a64_entry *) pkt)->dseg_0_address; | ||
2950 | |||
2951 | /* Load continuation entry data segments. */ | ||
2952 | for_each_sg(sg, s, remseg, cnt) { | ||
2953 | if (cnt == 5) | ||
2900 | break; | 2954 | break; |
2901 | dma_handle = sg_dma_address(s); | 2955 | dma_handle = sg_dma_address(s); |
2902 | #if defined(CONFIG_IA64_GENERIC) || defined(CONFIG_IA64_SGI_SN2) | 2956 | #if defined(CONFIG_IA64_GENERIC) || defined(CONFIG_IA64_SGI_SN2) |
2903 | if (ha->flags.use_pci_vchannel) | 2957 | if (ha->flags.use_pci_vchannel) |
2904 | sn_pci_set_vchan(ha->pdev, | 2958 | sn_pci_set_vchan(ha->pdev, |
2905 | (unsigned long *)&dma_handle, | 2959 | (unsigned long *)&dma_handle, |
2906 | SCSI_BUS_32(cmd)); | 2960 | SCSI_BUS_32(cmd)); |
2907 | #endif | 2961 | #endif |
2908 | *dword_ptr++ = | 2962 | *dword_ptr++ = |
2909 | cpu_to_le32(pci_dma_lo32(dma_handle)); | 2963 | cpu_to_le32(pci_dma_lo32(dma_handle)); |
2910 | *dword_ptr++ = | 2964 | *dword_ptr++ = |
2911 | cpu_to_le32(pci_dma_hi32(dma_handle)); | 2965 | cpu_to_le32(pci_dma_hi32(dma_handle)); |
2912 | *dword_ptr++ = cpu_to_le32(sg_dma_len(s)); | 2966 | *dword_ptr++ = |
2913 | dprintk(3, "S/G Segment phys_addr=%x %x, len=0x%x\n", | 2967 | cpu_to_le32(sg_dma_len(s)); |
2968 | dprintk(3, "S/G Segment Cont. phys_addr=%x %x, len=0x%x\n", | ||
2914 | cpu_to_le32(pci_dma_hi32(dma_handle)), | 2969 | cpu_to_le32(pci_dma_hi32(dma_handle)), |
2915 | cpu_to_le32(pci_dma_lo32(dma_handle)), | 2970 | cpu_to_le32(pci_dma_lo32(dma_handle)), |
2916 | cpu_to_le32(sg_dma_len(sg_next(s)))); | 2971 | cpu_to_le32(sg_dma_len(s))); |
2917 | remseg--; | ||
2918 | } | 2972 | } |
2919 | dprintk(5, "qla1280_64bit_start_scsi: Scatter/gather " | 2973 | remseg -= cnt; |
2920 | "command packet data - b %i, t %i, l %i \n", | 2974 | dprintk(5, "qla1280_64bit_start_scsi: " |
2921 | SCSI_BUS_32(cmd), SCSI_TCN_32(cmd), | 2975 | "continuation packet data - b %i, t " |
2922 | SCSI_LUN_32(cmd)); | 2976 | "%i, l %i \n", SCSI_BUS_32(cmd), |
2923 | qla1280_dump_buffer(5, (char *)pkt, | 2977 | SCSI_TCN_32(cmd), SCSI_LUN_32(cmd)); |
2924 | REQUEST_ENTRY_SIZE); | ||
2925 | |||
2926 | /* | ||
2927 | * Build continuation packets. | ||
2928 | */ | ||
2929 | dprintk(3, "S/G Building Continuation...seg_cnt=0x%x " | ||
2930 | "remains\n", seg_cnt); | ||
2931 | |||
2932 | while (remseg > 0) { | ||
2933 | /* Update sg start */ | ||
2934 | sg = s; | ||
2935 | /* Adjust ring index. */ | ||
2936 | ha->req_ring_index++; | ||
2937 | if (ha->req_ring_index == REQUEST_ENTRY_CNT) { | ||
2938 | ha->req_ring_index = 0; | ||
2939 | ha->request_ring_ptr = | ||
2940 | ha->request_ring; | ||
2941 | } else | ||
2942 | ha->request_ring_ptr++; | ||
2943 | |||
2944 | pkt = (cmd_a64_entry_t *)ha->request_ring_ptr; | ||
2945 | |||
2946 | /* Zero out packet. */ | ||
2947 | memset(pkt, 0, REQUEST_ENTRY_SIZE); | ||
2948 | |||
2949 | /* Load packet defaults. */ | ||
2950 | ((struct cont_a64_entry *) pkt)->entry_type = | ||
2951 | CONTINUE_A64_TYPE; | ||
2952 | ((struct cont_a64_entry *) pkt)->entry_count = 1; | ||
2953 | ((struct cont_a64_entry *) pkt)->sys_define = | ||
2954 | (uint8_t)ha->req_ring_index; | ||
2955 | /* Setup packet address segment pointer. */ | ||
2956 | dword_ptr = | ||
2957 | (u32 *)&((struct cont_a64_entry *) pkt)->dseg_0_address; | ||
2958 | |||
2959 | /* Load continuation entry data segments. */ | ||
2960 | for_each_sg(sg, s, remseg, cnt) { | ||
2961 | if (cnt == 5) | ||
2962 | break; | ||
2963 | dma_handle = sg_dma_address(s); | ||
2964 | #if defined(CONFIG_IA64_GENERIC) || defined(CONFIG_IA64_SGI_SN2) | ||
2965 | if (ha->flags.use_pci_vchannel) | ||
2966 | sn_pci_set_vchan(ha->pdev, | ||
2967 | (unsigned long *)&dma_handle, | ||
2968 | SCSI_BUS_32(cmd)); | ||
2969 | #endif | ||
2970 | *dword_ptr++ = | ||
2971 | cpu_to_le32(pci_dma_lo32(dma_handle)); | ||
2972 | *dword_ptr++ = | ||
2973 | cpu_to_le32(pci_dma_hi32(dma_handle)); | ||
2974 | *dword_ptr++ = | ||
2975 | cpu_to_le32(sg_dma_len(s)); | ||
2976 | dprintk(3, "S/G Segment Cont. phys_addr=%x %x, len=0x%x\n", | ||
2977 | cpu_to_le32(pci_dma_hi32(dma_handle)), | ||
2978 | cpu_to_le32(pci_dma_lo32(dma_handle)), | ||
2979 | cpu_to_le32(sg_dma_len(s))); | ||
2980 | } | ||
2981 | remseg -= cnt; | ||
2982 | dprintk(5, "qla1280_64bit_start_scsi: " | ||
2983 | "continuation packet data - b %i, t " | ||
2984 | "%i, l %i \n", SCSI_BUS_32(cmd), | ||
2985 | SCSI_TCN_32(cmd), SCSI_LUN_32(cmd)); | ||
2986 | qla1280_dump_buffer(5, (char *)pkt, | ||
2987 | REQUEST_ENTRY_SIZE); | ||
2988 | } | ||
2989 | } else { /* No scatter gather data transfer */ | ||
2990 | dma_handle = pci_map_single(ha->pdev, | ||
2991 | cmd->request_buffer, | ||
2992 | cmd->request_bufflen, | ||
2993 | cmd->sc_data_direction); | ||
2994 | |||
2995 | sp->saved_dma_handle = dma_handle; | ||
2996 | #if defined(CONFIG_IA64_GENERIC) || defined(CONFIG_IA64_SGI_SN2) | ||
2997 | if (ha->flags.use_pci_vchannel) | ||
2998 | sn_pci_set_vchan(ha->pdev, | ||
2999 | (unsigned long *)&dma_handle, | ||
3000 | SCSI_BUS_32(cmd)); | ||
3001 | #endif | ||
3002 | *dword_ptr++ = cpu_to_le32(pci_dma_lo32(dma_handle)); | ||
3003 | *dword_ptr++ = cpu_to_le32(pci_dma_hi32(dma_handle)); | ||
3004 | *dword_ptr = cpu_to_le32(cmd->request_bufflen); | ||
3005 | |||
3006 | dprintk(5, "qla1280_64bit_start_scsi: No scatter/" | ||
3007 | "gather command packet data - b %i, t %i, " | ||
3008 | "l %i \n", SCSI_BUS_32(cmd), SCSI_TCN_32(cmd), | ||
3009 | SCSI_LUN_32(cmd)); | ||
3010 | qla1280_dump_buffer(5, (char *)pkt, | 2978 | qla1280_dump_buffer(5, (char *)pkt, |
3011 | REQUEST_ENTRY_SIZE); | 2979 | REQUEST_ENTRY_SIZE); |
3012 | } | 2980 | } |
@@ -3068,12 +3036,11 @@ qla1280_32bit_start_scsi(struct scsi_qla_host *ha, struct srb * sp) | |||
3068 | struct device_reg __iomem *reg = ha->iobase; | 3036 | struct device_reg __iomem *reg = ha->iobase; |
3069 | struct scsi_cmnd *cmd = sp->cmd; | 3037 | struct scsi_cmnd *cmd = sp->cmd; |
3070 | struct cmd_entry *pkt; | 3038 | struct cmd_entry *pkt; |
3071 | struct scatterlist *sg = NULL, *s; | ||
3072 | __le32 *dword_ptr; | 3039 | __le32 *dword_ptr; |
3073 | int status = 0; | 3040 | int status = 0; |
3074 | int cnt; | 3041 | int cnt; |
3075 | int req_cnt; | 3042 | int req_cnt; |
3076 | uint16_t seg_cnt; | 3043 | int seg_cnt; |
3077 | dma_addr_t dma_handle; | 3044 | dma_addr_t dma_handle; |
3078 | u8 dir; | 3045 | u8 dir; |
3079 | 3046 | ||
@@ -3083,18 +3050,8 @@ qla1280_32bit_start_scsi(struct scsi_qla_host *ha, struct srb * sp) | |||
3083 | cmd->cmnd[0]); | 3050 | cmd->cmnd[0]); |
3084 | 3051 | ||
3085 | /* Calculate number of entries and segments required. */ | 3052 | /* Calculate number of entries and segments required. */ |
3086 | req_cnt = 1; | 3053 | seg_cnt = scsi_dma_map(cmd); |
3087 | if (cmd->use_sg) { | 3054 | if (seg_cnt) { |
3088 | /* | ||
3089 | * We must build an SG list in adapter format, as the kernel's | ||
3090 | * SG list cannot be used directly because of data field size | ||
3091 | * (__alpha__) differences and the kernel SG list uses virtual | ||
3092 | * addresses where we need physical addresses. | ||
3093 | */ | ||
3094 | sg = (struct scatterlist *) cmd->request_buffer; | ||
3095 | seg_cnt = pci_map_sg(ha->pdev, sg, cmd->use_sg, | ||
3096 | cmd->sc_data_direction); | ||
3097 | |||
3098 | /* | 3055 | /* |
3099 | * if greater than four sg entries then we need to allocate | 3056 | * if greater than four sg entries then we need to allocate |
3100 | * continuation entries | 3057 | * continuation entries |
@@ -3106,14 +3063,9 @@ qla1280_32bit_start_scsi(struct scsi_qla_host *ha, struct srb * sp) | |||
3106 | } | 3063 | } |
3107 | dprintk(3, "S/G Transfer cmd=%p seg_cnt=0x%x, req_cnt=%x\n", | 3064 | dprintk(3, "S/G Transfer cmd=%p seg_cnt=0x%x, req_cnt=%x\n", |
3108 | cmd, seg_cnt, req_cnt); | 3065 | cmd, seg_cnt, req_cnt); |
3109 | } else if (cmd->request_bufflen) { /* If data transfer. */ | 3066 | } else if (seg_cnt < 0) { |
3110 | dprintk(3, "No S/G transfer t=%x cmd=%p len=%x CDB=%x\n", | 3067 | status = 1; |
3111 | SCSI_TCN_32(cmd), cmd, cmd->request_bufflen, | 3068 | goto out; |
3112 | cmd->cmnd[0]); | ||
3113 | seg_cnt = 1; | ||
3114 | } else { | ||
3115 | /* dprintk(1, "No data transfer \n"); */ | ||
3116 | seg_cnt = 0; | ||
3117 | } | 3069 | } |
3118 | 3070 | ||
3119 | if ((req_cnt + 2) >= ha->req_q_cnt) { | 3071 | if ((req_cnt + 2) >= ha->req_q_cnt) { |
@@ -3194,91 +3146,84 @@ qla1280_32bit_start_scsi(struct scsi_qla_host *ha, struct srb * sp) | |||
3194 | * Load data segments. | 3146 | * Load data segments. |
3195 | */ | 3147 | */ |
3196 | if (seg_cnt) { | 3148 | if (seg_cnt) { |
3149 | struct scatterlist *sg, *s; | ||
3197 | int remseg = seg_cnt; | 3150 | int remseg = seg_cnt; |
3151 | |||
3152 | sg = scsi_sglist(cmd); | ||
3153 | |||
3198 | /* Setup packet address segment pointer. */ | 3154 | /* Setup packet address segment pointer. */ |
3199 | dword_ptr = &pkt->dseg_0_address; | 3155 | dword_ptr = &pkt->dseg_0_address; |
3200 | 3156 | ||
3201 | if (cmd->use_sg) { /* If scatter gather */ | 3157 | dprintk(3, "Building S/G data segments..\n"); |
3202 | dprintk(3, "Building S/G data segments..\n"); | 3158 | qla1280_dump_buffer(1, (char *)sg, 4 * 16); |
3203 | qla1280_dump_buffer(1, (char *)sg, 4 * 16); | 3159 | |
3160 | /* Load command entry data segments. */ | ||
3161 | for_each_sg(sg, s, seg_cnt, cnt) { | ||
3162 | if (cnt == 4) | ||
3163 | break; | ||
3164 | *dword_ptr++ = | ||
3165 | cpu_to_le32(pci_dma_lo32(sg_dma_address(s))); | ||
3166 | *dword_ptr++ = cpu_to_le32(sg_dma_len(s)); | ||
3167 | dprintk(3, "S/G Segment phys_addr=0x%lx, len=0x%x\n", | ||
3168 | (pci_dma_lo32(sg_dma_address(s))), | ||
3169 | (sg_dma_len(s))); | ||
3170 | remseg--; | ||
3171 | } | ||
3172 | /* | ||
3173 | * Build continuation packets. | ||
3174 | */ | ||
3175 | dprintk(3, "S/G Building Continuation" | ||
3176 | "...seg_cnt=0x%x remains\n", seg_cnt); | ||
3177 | while (remseg > 0) { | ||
3178 | /* Continue from end point */ | ||
3179 | sg = s; | ||
3180 | /* Adjust ring index. */ | ||
3181 | ha->req_ring_index++; | ||
3182 | if (ha->req_ring_index == REQUEST_ENTRY_CNT) { | ||
3183 | ha->req_ring_index = 0; | ||
3184 | ha->request_ring_ptr = | ||
3185 | ha->request_ring; | ||
3186 | } else | ||
3187 | ha->request_ring_ptr++; | ||
3188 | |||
3189 | pkt = (struct cmd_entry *)ha->request_ring_ptr; | ||
3190 | |||
3191 | /* Zero out packet. */ | ||
3192 | memset(pkt, 0, REQUEST_ENTRY_SIZE); | ||
3193 | |||
3194 | /* Load packet defaults. */ | ||
3195 | ((struct cont_entry *) pkt)-> | ||
3196 | entry_type = CONTINUE_TYPE; | ||
3197 | ((struct cont_entry *) pkt)->entry_count = 1; | ||
3204 | 3198 | ||
3205 | /* Load command entry data segments. */ | 3199 | ((struct cont_entry *) pkt)->sys_define = |
3206 | for_each_sg(sg, s, seg_cnt, cnt) { | 3200 | (uint8_t) ha->req_ring_index; |
3207 | if (cnt == 4) | 3201 | |
3202 | /* Setup packet address segment pointer. */ | ||
3203 | dword_ptr = | ||
3204 | &((struct cont_entry *) pkt)->dseg_0_address; | ||
3205 | |||
3206 | /* Load continuation entry data segments. */ | ||
3207 | for_each_sg(sg, s, remseg, cnt) { | ||
3208 | if (cnt == 7) | ||
3208 | break; | 3209 | break; |
3209 | *dword_ptr++ = | 3210 | *dword_ptr++ = |
3210 | cpu_to_le32(pci_dma_lo32(sg_dma_address(s))); | 3211 | cpu_to_le32(pci_dma_lo32(sg_dma_address(s))); |
3211 | *dword_ptr++ = cpu_to_le32(sg_dma_len(s)); | 3212 | *dword_ptr++ = |
3212 | dprintk(3, "S/G Segment phys_addr=0x%lx, len=0x%x\n", | 3213 | cpu_to_le32(sg_dma_len(s)); |
3213 | (pci_dma_lo32(sg_dma_address(s))), | 3214 | dprintk(1, |
3214 | (sg_dma_len(s))); | 3215 | "S/G Segment Cont. phys_addr=0x%x, " |
3215 | remseg--; | 3216 | "len=0x%x\n", |
3216 | } | 3217 | cpu_to_le32(pci_dma_lo32(sg_dma_address(s))), |
3217 | /* | 3218 | cpu_to_le32(sg_dma_len(s))); |
3218 | * Build continuation packets. | ||
3219 | */ | ||
3220 | dprintk(3, "S/G Building Continuation" | ||
3221 | "...seg_cnt=0x%x remains\n", seg_cnt); | ||
3222 | while (remseg > 0) { | ||
3223 | /* Continue from end point */ | ||
3224 | sg = s; | ||
3225 | /* Adjust ring index. */ | ||
3226 | ha->req_ring_index++; | ||
3227 | if (ha->req_ring_index == REQUEST_ENTRY_CNT) { | ||
3228 | ha->req_ring_index = 0; | ||
3229 | ha->request_ring_ptr = | ||
3230 | ha->request_ring; | ||
3231 | } else | ||
3232 | ha->request_ring_ptr++; | ||
3233 | |||
3234 | pkt = (struct cmd_entry *)ha->request_ring_ptr; | ||
3235 | |||
3236 | /* Zero out packet. */ | ||
3237 | memset(pkt, 0, REQUEST_ENTRY_SIZE); | ||
3238 | |||
3239 | /* Load packet defaults. */ | ||
3240 | ((struct cont_entry *) pkt)-> | ||
3241 | entry_type = CONTINUE_TYPE; | ||
3242 | ((struct cont_entry *) pkt)->entry_count = 1; | ||
3243 | |||
3244 | ((struct cont_entry *) pkt)->sys_define = | ||
3245 | (uint8_t) ha->req_ring_index; | ||
3246 | |||
3247 | /* Setup packet address segment pointer. */ | ||
3248 | dword_ptr = | ||
3249 | &((struct cont_entry *) pkt)->dseg_0_address; | ||
3250 | |||
3251 | /* Load continuation entry data segments. */ | ||
3252 | for_each_sg(sg, s, remseg, cnt) { | ||
3253 | if (cnt == 7) | ||
3254 | break; | ||
3255 | *dword_ptr++ = | ||
3256 | cpu_to_le32(pci_dma_lo32(sg_dma_address(s))); | ||
3257 | *dword_ptr++ = | ||
3258 | cpu_to_le32(sg_dma_len(s)); | ||
3259 | dprintk(1, | ||
3260 | "S/G Segment Cont. phys_addr=0x%x, " | ||
3261 | "len=0x%x\n", | ||
3262 | cpu_to_le32(pci_dma_lo32(sg_dma_address(s))), | ||
3263 | cpu_to_le32(sg_dma_len(s))); | ||
3264 | } | ||
3265 | remseg -= cnt; | ||
3266 | dprintk(5, "qla1280_32bit_start_scsi: " | ||
3267 | "continuation packet data - " | ||
3268 | "scsi(%i:%i:%i)\n", SCSI_BUS_32(cmd), | ||
3269 | SCSI_TCN_32(cmd), SCSI_LUN_32(cmd)); | ||
3270 | qla1280_dump_buffer(5, (char *)pkt, | ||
3271 | REQUEST_ENTRY_SIZE); | ||
3272 | } | 3219 | } |
3273 | } else { /* No S/G data transfer */ | 3220 | remseg -= cnt; |
3274 | dma_handle = pci_map_single(ha->pdev, | 3221 | dprintk(5, "qla1280_32bit_start_scsi: " |
3275 | cmd->request_buffer, | 3222 | "continuation packet data - " |
3276 | cmd->request_bufflen, | 3223 | "scsi(%i:%i:%i)\n", SCSI_BUS_32(cmd), |
3277 | cmd->sc_data_direction); | 3224 | SCSI_TCN_32(cmd), SCSI_LUN_32(cmd)); |
3278 | sp->saved_dma_handle = dma_handle; | 3225 | qla1280_dump_buffer(5, (char *)pkt, |
3279 | 3226 | REQUEST_ENTRY_SIZE); | |
3280 | *dword_ptr++ = cpu_to_le32(pci_dma_lo32(dma_handle)); | ||
3281 | *dword_ptr = cpu_to_le32(cmd->request_bufflen); | ||
3282 | } | 3227 | } |
3283 | } else { /* No data transfer at all */ | 3228 | } else { /* No data transfer at all */ |
3284 | dprintk(5, "qla1280_32bit_start_scsi: No data, command " | 3229 | dprintk(5, "qla1280_32bit_start_scsi: No data, command " |
@@ -4086,9 +4031,9 @@ __qla1280_print_scsi_cmd(struct scsi_cmnd *cmd) | |||
4086 | for (i = 0; i < cmd->cmd_len; i++) { | 4031 | for (i = 0; i < cmd->cmd_len; i++) { |
4087 | printk("0x%02x ", cmd->cmnd[i]); | 4032 | printk("0x%02x ", cmd->cmnd[i]); |
4088 | } | 4033 | } |
4089 | printk(" seg_cnt =%d\n", cmd->use_sg); | 4034 | printk(" seg_cnt =%d\n", scsi_sg_count(cmd)); |
4090 | printk(" request buffer=0x%p, request buffer len=0x%x\n", | 4035 | printk(" request buffer=0x%p, request buffer len=0x%x\n", |
4091 | cmd->request_buffer, cmd->request_bufflen); | 4036 | scsi_sglist(cmd), scsi_bufflen(cmd)); |
4092 | /* if (cmd->use_sg) | 4037 | /* if (cmd->use_sg) |
4093 | { | 4038 | { |
4094 | sg = (struct scatterlist *) cmd->request_buffer; | 4039 | sg = (struct scatterlist *) cmd->request_buffer; |
diff --git a/drivers/scsi/sun3_scsi.c b/drivers/scsi/sun3_scsi.c index 5e46d842c6f9..e606cf0a2eb7 100644 --- a/drivers/scsi/sun3_scsi.c +++ b/drivers/scsi/sun3_scsi.c | |||
@@ -268,7 +268,7 @@ int sun3scsi_detect(struct scsi_host_template * tpnt) | |||
268 | ((struct NCR5380_hostdata *)instance->hostdata)->ctrl = 0; | 268 | ((struct NCR5380_hostdata *)instance->hostdata)->ctrl = 0; |
269 | 269 | ||
270 | if (request_irq(instance->irq, scsi_sun3_intr, | 270 | if (request_irq(instance->irq, scsi_sun3_intr, |
271 | 0, "Sun3SCSI-5380", NULL)) { | 271 | 0, "Sun3SCSI-5380", instance)) { |
272 | #ifndef REAL_DMA | 272 | #ifndef REAL_DMA |
273 | printk("scsi%d: IRQ%d not free, interrupts disabled\n", | 273 | printk("scsi%d: IRQ%d not free, interrupts disabled\n", |
274 | instance->host_no, instance->irq); | 274 | instance->host_no, instance->irq); |
@@ -310,7 +310,7 @@ int sun3scsi_detect(struct scsi_host_template * tpnt) | |||
310 | int sun3scsi_release (struct Scsi_Host *shpnt) | 310 | int sun3scsi_release (struct Scsi_Host *shpnt) |
311 | { | 311 | { |
312 | if (shpnt->irq != SCSI_IRQ_NONE) | 312 | if (shpnt->irq != SCSI_IRQ_NONE) |
313 | free_irq (shpnt->irq, NULL); | 313 | free_irq(shpnt->irq, shpnt); |
314 | 314 | ||
315 | iounmap((void *)sun3_scsi_regp); | 315 | iounmap((void *)sun3_scsi_regp); |
316 | 316 | ||
diff --git a/drivers/scsi/sun3_scsi_vme.c b/drivers/scsi/sun3_scsi_vme.c index 7cb4a31453e6..02d9727f017a 100644 --- a/drivers/scsi/sun3_scsi_vme.c +++ b/drivers/scsi/sun3_scsi_vme.c | |||
@@ -230,7 +230,7 @@ static int sun3scsi_detect(struct scsi_host_template * tpnt) | |||
230 | ((struct NCR5380_hostdata *)instance->hostdata)->ctrl = 0; | 230 | ((struct NCR5380_hostdata *)instance->hostdata)->ctrl = 0; |
231 | 231 | ||
232 | if (request_irq(instance->irq, scsi_sun3_intr, | 232 | if (request_irq(instance->irq, scsi_sun3_intr, |
233 | 0, "Sun3SCSI-5380VME", NULL)) { | 233 | 0, "Sun3SCSI-5380VME", instance)) { |
234 | #ifndef REAL_DMA | 234 | #ifndef REAL_DMA |
235 | printk("scsi%d: IRQ%d not free, interrupts disabled\n", | 235 | printk("scsi%d: IRQ%d not free, interrupts disabled\n", |
236 | instance->host_no, instance->irq); | 236 | instance->host_no, instance->irq); |
@@ -279,7 +279,7 @@ static int sun3scsi_detect(struct scsi_host_template * tpnt) | |||
279 | int sun3scsi_release (struct Scsi_Host *shpnt) | 279 | int sun3scsi_release (struct Scsi_Host *shpnt) |
280 | { | 280 | { |
281 | if (shpnt->irq != SCSI_IRQ_NONE) | 281 | if (shpnt->irq != SCSI_IRQ_NONE) |
282 | free_irq (shpnt->irq, NULL); | 282 | free_irq(shpnt->irq, shpnt); |
283 | 283 | ||
284 | iounmap((void *)sun3_scsi_regp); | 284 | iounmap((void *)sun3_scsi_regp); |
285 | 285 | ||
diff --git a/drivers/scsi/t128.c b/drivers/scsi/t128.c index 248d60b8d899..041eaaace2c3 100644 --- a/drivers/scsi/t128.c +++ b/drivers/scsi/t128.c | |||
@@ -259,7 +259,8 @@ found: | |||
259 | instance->irq = NCR5380_probe_irq(instance, T128_IRQS); | 259 | instance->irq = NCR5380_probe_irq(instance, T128_IRQS); |
260 | 260 | ||
261 | if (instance->irq != SCSI_IRQ_NONE) | 261 | if (instance->irq != SCSI_IRQ_NONE) |
262 | if (request_irq(instance->irq, t128_intr, IRQF_DISABLED, "t128", instance)) { | 262 | if (request_irq(instance->irq, t128_intr, IRQF_DISABLED, "t128", |
263 | instance)) { | ||
263 | printk("scsi%d : IRQ%d not free, interrupts disabled\n", | 264 | printk("scsi%d : IRQ%d not free, interrupts disabled\n", |
264 | instance->host_no, instance->irq); | 265 | instance->host_no, instance->irq); |
265 | instance->irq = SCSI_IRQ_NONE; | 266 | instance->irq = SCSI_IRQ_NONE; |
@@ -295,7 +296,7 @@ static int t128_release(struct Scsi_Host *shost) | |||
295 | NCR5380_local_declare(); | 296 | NCR5380_local_declare(); |
296 | NCR5380_setup(shost); | 297 | NCR5380_setup(shost); |
297 | if (shost->irq) | 298 | if (shost->irq) |
298 | free_irq(shost->irq, NULL); | 299 | free_irq(shost->irq, shost); |
299 | NCR5380_exit(shost); | 300 | NCR5380_exit(shost); |
300 | if (shost->io_port && shost->n_io_port) | 301 | if (shost->io_port && shost->n_io_port) |
301 | release_region(shost->io_port, shost->n_io_port); | 302 | release_region(shost->io_port, shost->n_io_port); |
diff --git a/drivers/spi/at25.c b/drivers/spi/at25.c index e007833cca59..290dbe99647a 100644 --- a/drivers/spi/at25.c +++ b/drivers/spi/at25.c | |||
@@ -21,6 +21,13 @@ | |||
21 | #include <linux/spi/eeprom.h> | 21 | #include <linux/spi/eeprom.h> |
22 | 22 | ||
23 | 23 | ||
24 | /* | ||
25 | * NOTE: this is an *EEPROM* driver. The vagaries of product naming | ||
26 | * mean that some AT25 products are EEPROMs, and others are FLASH. | ||
27 | * Handle FLASH chips with the drivers/mtd/devices/m25p80.c driver, | ||
28 | * not this one! | ||
29 | */ | ||
30 | |||
24 | struct at25_data { | 31 | struct at25_data { |
25 | struct spi_device *spi; | 32 | struct spi_device *spi; |
26 | struct mutex lock; | 33 | struct mutex lock; |
diff --git a/drivers/spi/spi.c b/drivers/spi/spi.c index b31f4431849b..93e9de46977a 100644 --- a/drivers/spi/spi.c +++ b/drivers/spi/spi.c | |||
@@ -541,10 +541,7 @@ static void spi_complete(void *arg) | |||
541 | * Also, the caller is guaranteeing that the memory associated with the | 541 | * Also, the caller is guaranteeing that the memory associated with the |
542 | * message will not be freed before this call returns. | 542 | * message will not be freed before this call returns. |
543 | * | 543 | * |
544 | * The return value is a negative error code if the message could not be | 544 | * It returns zero on success, else a negative error code. |
545 | * submitted, else zero. When the value is zero, then message->status is | ||
546 | * also defined; it's the completion code for the transfer, either zero | ||
547 | * or a negative error code from the controller driver. | ||
548 | */ | 545 | */ |
549 | int spi_sync(struct spi_device *spi, struct spi_message *message) | 546 | int spi_sync(struct spi_device *spi, struct spi_message *message) |
550 | { | 547 | { |
@@ -554,8 +551,10 @@ int spi_sync(struct spi_device *spi, struct spi_message *message) | |||
554 | message->complete = spi_complete; | 551 | message->complete = spi_complete; |
555 | message->context = &done; | 552 | message->context = &done; |
556 | status = spi_async(spi, message); | 553 | status = spi_async(spi, message); |
557 | if (status == 0) | 554 | if (status == 0) { |
558 | wait_for_completion(&done); | 555 | wait_for_completion(&done); |
556 | status = message->status; | ||
557 | } | ||
559 | message->context = NULL; | 558 | message->context = NULL; |
560 | return status; | 559 | return status; |
561 | } | 560 | } |
@@ -589,7 +588,7 @@ int spi_write_then_read(struct spi_device *spi, | |||
589 | const u8 *txbuf, unsigned n_tx, | 588 | const u8 *txbuf, unsigned n_tx, |
590 | u8 *rxbuf, unsigned n_rx) | 589 | u8 *rxbuf, unsigned n_rx) |
591 | { | 590 | { |
592 | static DECLARE_MUTEX(lock); | 591 | static DEFINE_MUTEX(lock); |
593 | 592 | ||
594 | int status; | 593 | int status; |
595 | struct spi_message message; | 594 | struct spi_message message; |
@@ -615,7 +614,7 @@ int spi_write_then_read(struct spi_device *spi, | |||
615 | } | 614 | } |
616 | 615 | ||
617 | /* ... unless someone else is using the pre-allocated buffer */ | 616 | /* ... unless someone else is using the pre-allocated buffer */ |
618 | if (down_trylock(&lock)) { | 617 | if (!mutex_trylock(&lock)) { |
619 | local_buf = kmalloc(SPI_BUFSIZ, GFP_KERNEL); | 618 | local_buf = kmalloc(SPI_BUFSIZ, GFP_KERNEL); |
620 | if (!local_buf) | 619 | if (!local_buf) |
621 | return -ENOMEM; | 620 | return -ENOMEM; |
@@ -628,13 +627,11 @@ int spi_write_then_read(struct spi_device *spi, | |||
628 | 627 | ||
629 | /* do the i/o */ | 628 | /* do the i/o */ |
630 | status = spi_sync(spi, &message); | 629 | status = spi_sync(spi, &message); |
631 | if (status == 0) { | 630 | if (status == 0) |
632 | memcpy(rxbuf, x[1].rx_buf, n_rx); | 631 | memcpy(rxbuf, x[1].rx_buf, n_rx); |
633 | status = message.status; | ||
634 | } | ||
635 | 632 | ||
636 | if (x[0].tx_buf == buf) | 633 | if (x[0].tx_buf == buf) |
637 | up(&lock); | 634 | mutex_unlock(&lock); |
638 | else | 635 | else |
639 | kfree(local_buf); | 636 | kfree(local_buf); |
640 | 637 | ||
diff --git a/drivers/spi/spi_bfin5xx.c b/drivers/spi/spi_bfin5xx.c index 2ef11bb70b2e..22697b812205 100644 --- a/drivers/spi/spi_bfin5xx.c +++ b/drivers/spi/spi_bfin5xx.c | |||
@@ -1,17 +1,22 @@ | |||
1 | /* | 1 | /* |
2 | * File: drivers/spi/bfin5xx_spi.c | 2 | * File: drivers/spi/bfin5xx_spi.c |
3 | * Based on: N/A | 3 | * Maintainer: |
4 | * Author: Luke Yang (Analog Devices Inc.) | 4 | * Bryan Wu <bryan.wu@analog.com> |
5 | * Original Author: | ||
6 | * Luke Yang (Analog Devices Inc.) | ||
5 | * | 7 | * |
6 | * Created: March. 10th 2006 | 8 | * Created: March. 10th 2006 |
7 | * Description: SPI controller driver for Blackfin 5xx | 9 | * Description: SPI controller driver for Blackfin BF5xx |
8 | * Bugs: Enter bugs at http://blackfin.uclinux.org/ | 10 | * Bugs: Enter bugs at http://blackfin.uclinux.org/ |
9 | * | 11 | * |
10 | * Modified: | 12 | * Modified: |
11 | * March 10, 2006 bfin5xx_spi.c Created. (Luke Yang) | 13 | * March 10, 2006 bfin5xx_spi.c Created. (Luke Yang) |
12 | * August 7, 2006 added full duplex mode (Axel Weiss & Luke Yang) | 14 | * August 7, 2006 added full duplex mode (Axel Weiss & Luke Yang) |
15 | * July 17, 2007 add support for BF54x SPI0 controller (Bryan Wu) | ||
16 | * July 30, 2007 add platfrom_resource interface to support multi-port | ||
17 | * SPI controller (Bryan Wu) | ||
13 | * | 18 | * |
14 | * Copyright 2004-2006 Analog Devices Inc. | 19 | * Copyright 2004-2007 Analog Devices Inc. |
15 | * | 20 | * |
16 | * This program is free software ; you can redistribute it and/or modify | 21 | * This program is free software ; you can redistribute it and/or modify |
17 | * it under the terms of the GNU General Public License as published by | 22 | * it under the terms of the GNU General Public License as published by |
@@ -31,50 +36,39 @@ | |||
31 | 36 | ||
32 | #include <linux/init.h> | 37 | #include <linux/init.h> |
33 | #include <linux/module.h> | 38 | #include <linux/module.h> |
39 | #include <linux/delay.h> | ||
34 | #include <linux/device.h> | 40 | #include <linux/device.h> |
41 | #include <linux/io.h> | ||
35 | #include <linux/ioport.h> | 42 | #include <linux/ioport.h> |
43 | #include <linux/irq.h> | ||
36 | #include <linux/errno.h> | 44 | #include <linux/errno.h> |
37 | #include <linux/interrupt.h> | 45 | #include <linux/interrupt.h> |
38 | #include <linux/platform_device.h> | 46 | #include <linux/platform_device.h> |
39 | #include <linux/dma-mapping.h> | 47 | #include <linux/dma-mapping.h> |
40 | #include <linux/spi/spi.h> | 48 | #include <linux/spi/spi.h> |
41 | #include <linux/workqueue.h> | 49 | #include <linux/workqueue.h> |
42 | #include <linux/delay.h> | ||
43 | 50 | ||
44 | #include <asm/io.h> | ||
45 | #include <asm/irq.h> | ||
46 | #include <asm/delay.h> | ||
47 | #include <asm/dma.h> | 51 | #include <asm/dma.h> |
48 | 52 | #include <asm/portmux.h> | |
49 | #include <asm/bfin5xx_spi.h> | 53 | #include <asm/bfin5xx_spi.h> |
50 | 54 | ||
51 | MODULE_AUTHOR("Luke Yang"); | 55 | #define DRV_NAME "bfin-spi" |
52 | MODULE_DESCRIPTION("Blackfin 5xx SPI Contoller"); | 56 | #define DRV_AUTHOR "Bryan Wu, Luke Yang" |
53 | MODULE_LICENSE("GPL"); | 57 | #define DRV_DESC "Blackfin BF5xx on-chip SPI Contoller Driver" |
58 | #define DRV_VERSION "1.0" | ||
54 | 59 | ||
55 | #define IS_DMA_ALIGNED(x) (((u32)(x)&0x07)==0) | 60 | MODULE_AUTHOR(DRV_AUTHOR); |
61 | MODULE_DESCRIPTION(DRV_DESC); | ||
62 | MODULE_LICENSE("GPL"); | ||
56 | 63 | ||
57 | #define DEFINE_SPI_REG(reg, off) \ | 64 | #define IS_DMA_ALIGNED(x) (((u32)(x)&0x07) == 0) |
58 | static inline u16 read_##reg(void) \ | ||
59 | { return *(volatile unsigned short*)(SPI0_REGBASE + off); } \ | ||
60 | static inline void write_##reg(u16 v) \ | ||
61 | {*(volatile unsigned short*)(SPI0_REGBASE + off) = v;\ | ||
62 | SSYNC();} | ||
63 | 65 | ||
64 | DEFINE_SPI_REG(CTRL, 0x00) | 66 | #define START_STATE ((void *)0) |
65 | DEFINE_SPI_REG(FLAG, 0x04) | 67 | #define RUNNING_STATE ((void *)1) |
66 | DEFINE_SPI_REG(STAT, 0x08) | 68 | #define DONE_STATE ((void *)2) |
67 | DEFINE_SPI_REG(TDBR, 0x0C) | 69 | #define ERROR_STATE ((void *)-1) |
68 | DEFINE_SPI_REG(RDBR, 0x10) | 70 | #define QUEUE_RUNNING 0 |
69 | DEFINE_SPI_REG(BAUD, 0x14) | 71 | #define QUEUE_STOPPED 1 |
70 | DEFINE_SPI_REG(SHAW, 0x18) | ||
71 | #define START_STATE ((void*)0) | ||
72 | #define RUNNING_STATE ((void*)1) | ||
73 | #define DONE_STATE ((void*)2) | ||
74 | #define ERROR_STATE ((void*)-1) | ||
75 | #define QUEUE_RUNNING 0 | ||
76 | #define QUEUE_STOPPED 1 | ||
77 | int dma_requested; | ||
78 | 72 | ||
79 | struct driver_data { | 73 | struct driver_data { |
80 | /* Driver model hookup */ | 74 | /* Driver model hookup */ |
@@ -83,6 +77,12 @@ struct driver_data { | |||
83 | /* SPI framework hookup */ | 77 | /* SPI framework hookup */ |
84 | struct spi_master *master; | 78 | struct spi_master *master; |
85 | 79 | ||
80 | /* Regs base of SPI controller */ | ||
81 | void __iomem *regs_base; | ||
82 | |||
83 | /* Pin request list */ | ||
84 | u16 *pin_req; | ||
85 | |||
86 | /* BFIN hookup */ | 86 | /* BFIN hookup */ |
87 | struct bfin5xx_spi_master *master_info; | 87 | struct bfin5xx_spi_master *master_info; |
88 | 88 | ||
@@ -107,12 +107,18 @@ struct driver_data { | |||
107 | void *tx_end; | 107 | void *tx_end; |
108 | void *rx; | 108 | void *rx; |
109 | void *rx_end; | 109 | void *rx_end; |
110 | |||
111 | /* DMA stuffs */ | ||
112 | int dma_channel; | ||
110 | int dma_mapped; | 113 | int dma_mapped; |
114 | int dma_requested; | ||
111 | dma_addr_t rx_dma; | 115 | dma_addr_t rx_dma; |
112 | dma_addr_t tx_dma; | 116 | dma_addr_t tx_dma; |
117 | |||
113 | size_t rx_map_len; | 118 | size_t rx_map_len; |
114 | size_t tx_map_len; | 119 | size_t tx_map_len; |
115 | u8 n_bytes; | 120 | u8 n_bytes; |
121 | int cs_change; | ||
116 | void (*write) (struct driver_data *); | 122 | void (*write) (struct driver_data *); |
117 | void (*read) (struct driver_data *); | 123 | void (*read) (struct driver_data *); |
118 | void (*duplex) (struct driver_data *); | 124 | void (*duplex) (struct driver_data *); |
@@ -129,28 +135,40 @@ struct chip_data { | |||
129 | u8 enable_dma; | 135 | u8 enable_dma; |
130 | u8 bits_per_word; /* 8 or 16 */ | 136 | u8 bits_per_word; /* 8 or 16 */ |
131 | u8 cs_change_per_word; | 137 | u8 cs_change_per_word; |
132 | u8 cs_chg_udelay; | 138 | u16 cs_chg_udelay; /* Some devices require > 255usec delay */ |
133 | void (*write) (struct driver_data *); | 139 | void (*write) (struct driver_data *); |
134 | void (*read) (struct driver_data *); | 140 | void (*read) (struct driver_data *); |
135 | void (*duplex) (struct driver_data *); | 141 | void (*duplex) (struct driver_data *); |
136 | }; | 142 | }; |
137 | 143 | ||
144 | #define DEFINE_SPI_REG(reg, off) \ | ||
145 | static inline u16 read_##reg(struct driver_data *drv_data) \ | ||
146 | { return bfin_read16(drv_data->regs_base + off); } \ | ||
147 | static inline void write_##reg(struct driver_data *drv_data, u16 v) \ | ||
148 | { bfin_write16(drv_data->regs_base + off, v); } | ||
149 | |||
150 | DEFINE_SPI_REG(CTRL, 0x00) | ||
151 | DEFINE_SPI_REG(FLAG, 0x04) | ||
152 | DEFINE_SPI_REG(STAT, 0x08) | ||
153 | DEFINE_SPI_REG(TDBR, 0x0C) | ||
154 | DEFINE_SPI_REG(RDBR, 0x10) | ||
155 | DEFINE_SPI_REG(BAUD, 0x14) | ||
156 | DEFINE_SPI_REG(SHAW, 0x18) | ||
157 | |||
138 | static void bfin_spi_enable(struct driver_data *drv_data) | 158 | static void bfin_spi_enable(struct driver_data *drv_data) |
139 | { | 159 | { |
140 | u16 cr; | 160 | u16 cr; |
141 | 161 | ||
142 | cr = read_CTRL(); | 162 | cr = read_CTRL(drv_data); |
143 | write_CTRL(cr | BIT_CTL_ENABLE); | 163 | write_CTRL(drv_data, (cr | BIT_CTL_ENABLE)); |
144 | SSYNC(); | ||
145 | } | 164 | } |
146 | 165 | ||
147 | static void bfin_spi_disable(struct driver_data *drv_data) | 166 | static void bfin_spi_disable(struct driver_data *drv_data) |
148 | { | 167 | { |
149 | u16 cr; | 168 | u16 cr; |
150 | 169 | ||
151 | cr = read_CTRL(); | 170 | cr = read_CTRL(drv_data); |
152 | write_CTRL(cr & (~BIT_CTL_ENABLE)); | 171 | write_CTRL(drv_data, (cr & (~BIT_CTL_ENABLE))); |
153 | SSYNC(); | ||
154 | } | 172 | } |
155 | 173 | ||
156 | /* Caculate the SPI_BAUD register value based on input HZ */ | 174 | /* Caculate the SPI_BAUD register value based on input HZ */ |
@@ -170,83 +188,71 @@ static int flush(struct driver_data *drv_data) | |||
170 | unsigned long limit = loops_per_jiffy << 1; | 188 | unsigned long limit = loops_per_jiffy << 1; |
171 | 189 | ||
172 | /* wait for stop and clear stat */ | 190 | /* wait for stop and clear stat */ |
173 | while (!(read_STAT() & BIT_STAT_SPIF) && limit--) | 191 | while (!(read_STAT(drv_data) & BIT_STAT_SPIF) && limit--) |
174 | continue; | 192 | cpu_relax(); |
175 | 193 | ||
176 | write_STAT(BIT_STAT_CLR); | 194 | write_STAT(drv_data, BIT_STAT_CLR); |
177 | 195 | ||
178 | return limit; | 196 | return limit; |
179 | } | 197 | } |
180 | 198 | ||
199 | /* Chip select operation functions for cs_change flag */ | ||
200 | static void cs_active(struct driver_data *drv_data, struct chip_data *chip) | ||
201 | { | ||
202 | u16 flag = read_FLAG(drv_data); | ||
203 | |||
204 | flag |= chip->flag; | ||
205 | flag &= ~(chip->flag << 8); | ||
206 | |||
207 | write_FLAG(drv_data, flag); | ||
208 | } | ||
209 | |||
210 | static void cs_deactive(struct driver_data *drv_data, struct chip_data *chip) | ||
211 | { | ||
212 | u16 flag = read_FLAG(drv_data); | ||
213 | |||
214 | flag |= (chip->flag << 8); | ||
215 | |||
216 | write_FLAG(drv_data, flag); | ||
217 | |||
218 | /* Move delay here for consistency */ | ||
219 | if (chip->cs_chg_udelay) | ||
220 | udelay(chip->cs_chg_udelay); | ||
221 | } | ||
222 | |||
223 | #define MAX_SPI_SSEL 7 | ||
224 | |||
181 | /* stop controller and re-config current chip*/ | 225 | /* stop controller and re-config current chip*/ |
182 | static void restore_state(struct driver_data *drv_data) | 226 | static int restore_state(struct driver_data *drv_data) |
183 | { | 227 | { |
184 | struct chip_data *chip = drv_data->cur_chip; | 228 | struct chip_data *chip = drv_data->cur_chip; |
229 | int ret = 0; | ||
185 | 230 | ||
186 | /* Clear status and disable clock */ | 231 | /* Clear status and disable clock */ |
187 | write_STAT(BIT_STAT_CLR); | 232 | write_STAT(drv_data, BIT_STAT_CLR); |
188 | bfin_spi_disable(drv_data); | 233 | bfin_spi_disable(drv_data); |
189 | dev_dbg(&drv_data->pdev->dev, "restoring spi ctl state\n"); | 234 | dev_dbg(&drv_data->pdev->dev, "restoring spi ctl state\n"); |
190 | 235 | ||
191 | #if defined(CONFIG_BF534) || defined(CONFIG_BF536) || defined(CONFIG_BF537) | 236 | /* Load the registers */ |
192 | dev_dbg(&drv_data->pdev->dev, | 237 | write_CTRL(drv_data, chip->ctl_reg); |
193 | "chip select number is %d\n", chip->chip_select_num); | 238 | write_BAUD(drv_data, chip->baud); |
194 | |||
195 | switch (chip->chip_select_num) { | ||
196 | case 1: | ||
197 | bfin_write_PORTF_FER(bfin_read_PORTF_FER() | 0x3c00); | ||
198 | SSYNC(); | ||
199 | break; | ||
200 | |||
201 | case 2: | ||
202 | case 3: | ||
203 | bfin_write_PORT_MUX(bfin_read_PORT_MUX() | PJSE_SPI); | ||
204 | SSYNC(); | ||
205 | bfin_write_PORTF_FER(bfin_read_PORTF_FER() | 0x3800); | ||
206 | SSYNC(); | ||
207 | break; | ||
208 | |||
209 | case 4: | ||
210 | bfin_write_PORT_MUX(bfin_read_PORT_MUX() | PFS4E_SPI); | ||
211 | SSYNC(); | ||
212 | bfin_write_PORTF_FER(bfin_read_PORTF_FER() | 0x3840); | ||
213 | SSYNC(); | ||
214 | break; | ||
215 | 239 | ||
216 | case 5: | 240 | bfin_spi_enable(drv_data); |
217 | bfin_write_PORT_MUX(bfin_read_PORT_MUX() | PFS5E_SPI); | 241 | cs_active(drv_data, chip); |
218 | SSYNC(); | ||
219 | bfin_write_PORTF_FER(bfin_read_PORTF_FER() | 0x3820); | ||
220 | SSYNC(); | ||
221 | break; | ||
222 | 242 | ||
223 | case 6: | 243 | if (ret) |
224 | bfin_write_PORT_MUX(bfin_read_PORT_MUX() | PFS6E_SPI); | 244 | dev_dbg(&drv_data->pdev->dev, |
225 | SSYNC(); | 245 | ": request chip select number %d failed\n", |
226 | bfin_write_PORTF_FER(bfin_read_PORTF_FER() | 0x3810); | 246 | chip->chip_select_num); |
227 | SSYNC(); | ||
228 | break; | ||
229 | 247 | ||
230 | case 7: | 248 | return ret; |
231 | bfin_write_PORT_MUX(bfin_read_PORT_MUX() | PJCE_SPI); | ||
232 | SSYNC(); | ||
233 | bfin_write_PORTF_FER(bfin_read_PORTF_FER() | 0x3800); | ||
234 | SSYNC(); | ||
235 | break; | ||
236 | } | ||
237 | #endif | ||
238 | |||
239 | /* Load the registers */ | ||
240 | write_CTRL(chip->ctl_reg); | ||
241 | write_BAUD(chip->baud); | ||
242 | write_FLAG(chip->flag); | ||
243 | } | 249 | } |
244 | 250 | ||
245 | /* used to kick off transfer in rx mode */ | 251 | /* used to kick off transfer in rx mode */ |
246 | static unsigned short dummy_read(void) | 252 | static unsigned short dummy_read(struct driver_data *drv_data) |
247 | { | 253 | { |
248 | unsigned short tmp; | 254 | unsigned short tmp; |
249 | tmp = read_RDBR(); | 255 | tmp = read_RDBR(drv_data); |
250 | return tmp; | 256 | return tmp; |
251 | } | 257 | } |
252 | 258 | ||
@@ -255,9 +261,9 @@ static void null_writer(struct driver_data *drv_data) | |||
255 | u8 n_bytes = drv_data->n_bytes; | 261 | u8 n_bytes = drv_data->n_bytes; |
256 | 262 | ||
257 | while (drv_data->tx < drv_data->tx_end) { | 263 | while (drv_data->tx < drv_data->tx_end) { |
258 | write_TDBR(0); | 264 | write_TDBR(drv_data, 0); |
259 | while ((read_STAT() & BIT_STAT_TXS)) | 265 | while ((read_STAT(drv_data) & BIT_STAT_TXS)) |
260 | continue; | 266 | cpu_relax(); |
261 | drv_data->tx += n_bytes; | 267 | drv_data->tx += n_bytes; |
262 | } | 268 | } |
263 | } | 269 | } |
@@ -265,75 +271,78 @@ static void null_writer(struct driver_data *drv_data) | |||
265 | static void null_reader(struct driver_data *drv_data) | 271 | static void null_reader(struct driver_data *drv_data) |
266 | { | 272 | { |
267 | u8 n_bytes = drv_data->n_bytes; | 273 | u8 n_bytes = drv_data->n_bytes; |
268 | dummy_read(); | 274 | dummy_read(drv_data); |
269 | 275 | ||
270 | while (drv_data->rx < drv_data->rx_end) { | 276 | while (drv_data->rx < drv_data->rx_end) { |
271 | while (!(read_STAT() & BIT_STAT_RXS)) | 277 | while (!(read_STAT(drv_data) & BIT_STAT_RXS)) |
272 | continue; | 278 | cpu_relax(); |
273 | dummy_read(); | 279 | dummy_read(drv_data); |
274 | drv_data->rx += n_bytes; | 280 | drv_data->rx += n_bytes; |
275 | } | 281 | } |
276 | } | 282 | } |
277 | 283 | ||
278 | static void u8_writer(struct driver_data *drv_data) | 284 | static void u8_writer(struct driver_data *drv_data) |
279 | { | 285 | { |
280 | dev_dbg(&drv_data->pdev->dev, | 286 | dev_dbg(&drv_data->pdev->dev, |
281 | "cr8-s is 0x%x\n", read_STAT()); | 287 | "cr8-s is 0x%x\n", read_STAT(drv_data)); |
288 | |||
289 | /* poll for SPI completion before start */ | ||
290 | while (!(read_STAT(drv_data) & BIT_STAT_SPIF)) | ||
291 | cpu_relax(); | ||
292 | |||
282 | while (drv_data->tx < drv_data->tx_end) { | 293 | while (drv_data->tx < drv_data->tx_end) { |
283 | write_TDBR(*(u8 *) (drv_data->tx)); | 294 | write_TDBR(drv_data, (*(u8 *) (drv_data->tx))); |
284 | while (read_STAT() & BIT_STAT_TXS) | 295 | while (read_STAT(drv_data) & BIT_STAT_TXS) |
285 | continue; | 296 | cpu_relax(); |
286 | ++drv_data->tx; | 297 | ++drv_data->tx; |
287 | } | 298 | } |
288 | |||
289 | /* poll for SPI completion before returning */ | ||
290 | while (!(read_STAT() & BIT_STAT_SPIF)) | ||
291 | continue; | ||
292 | } | 299 | } |
293 | 300 | ||
294 | static void u8_cs_chg_writer(struct driver_data *drv_data) | 301 | static void u8_cs_chg_writer(struct driver_data *drv_data) |
295 | { | 302 | { |
296 | struct chip_data *chip = drv_data->cur_chip; | 303 | struct chip_data *chip = drv_data->cur_chip; |
297 | 304 | ||
305 | /* poll for SPI completion before start */ | ||
306 | while (!(read_STAT(drv_data) & BIT_STAT_SPIF)) | ||
307 | cpu_relax(); | ||
308 | |||
298 | while (drv_data->tx < drv_data->tx_end) { | 309 | while (drv_data->tx < drv_data->tx_end) { |
299 | write_FLAG(chip->flag); | 310 | cs_active(drv_data, chip); |
300 | SSYNC(); | 311 | |
301 | 312 | write_TDBR(drv_data, (*(u8 *) (drv_data->tx))); | |
302 | write_TDBR(*(u8 *) (drv_data->tx)); | 313 | while (read_STAT(drv_data) & BIT_STAT_TXS) |
303 | while (read_STAT() & BIT_STAT_TXS) | 314 | cpu_relax(); |
304 | continue; | 315 | |
305 | while (!(read_STAT() & BIT_STAT_SPIF)) | 316 | cs_deactive(drv_data, chip); |
306 | continue; | 317 | |
307 | write_FLAG(0xFF00 | chip->flag); | ||
308 | SSYNC(); | ||
309 | if (chip->cs_chg_udelay) | ||
310 | udelay(chip->cs_chg_udelay); | ||
311 | ++drv_data->tx; | 318 | ++drv_data->tx; |
312 | } | 319 | } |
313 | write_FLAG(0xFF00); | ||
314 | SSYNC(); | ||
315 | } | 320 | } |
316 | 321 | ||
317 | static void u8_reader(struct driver_data *drv_data) | 322 | static void u8_reader(struct driver_data *drv_data) |
318 | { | 323 | { |
319 | dev_dbg(&drv_data->pdev->dev, | 324 | dev_dbg(&drv_data->pdev->dev, |
320 | "cr-8 is 0x%x\n", read_STAT()); | 325 | "cr-8 is 0x%x\n", read_STAT(drv_data)); |
326 | |||
327 | /* poll for SPI completion before start */ | ||
328 | while (!(read_STAT(drv_data) & BIT_STAT_SPIF)) | ||
329 | cpu_relax(); | ||
321 | 330 | ||
322 | /* clear TDBR buffer before read(else it will be shifted out) */ | 331 | /* clear TDBR buffer before read(else it will be shifted out) */ |
323 | write_TDBR(0xFFFF); | 332 | write_TDBR(drv_data, 0xFFFF); |
324 | 333 | ||
325 | dummy_read(); | 334 | dummy_read(drv_data); |
326 | 335 | ||
327 | while (drv_data->rx < drv_data->rx_end - 1) { | 336 | while (drv_data->rx < drv_data->rx_end - 1) { |
328 | while (!(read_STAT() & BIT_STAT_RXS)) | 337 | while (!(read_STAT(drv_data) & BIT_STAT_RXS)) |
329 | continue; | 338 | cpu_relax(); |
330 | *(u8 *) (drv_data->rx) = read_RDBR(); | 339 | *(u8 *) (drv_data->rx) = read_RDBR(drv_data); |
331 | ++drv_data->rx; | 340 | ++drv_data->rx; |
332 | } | 341 | } |
333 | 342 | ||
334 | while (!(read_STAT() & BIT_STAT_RXS)) | 343 | while (!(read_STAT(drv_data) & BIT_STAT_RXS)) |
335 | continue; | 344 | cpu_relax(); |
336 | *(u8 *) (drv_data->rx) = read_SHAW(); | 345 | *(u8 *) (drv_data->rx) = read_SHAW(drv_data); |
337 | ++drv_data->rx; | 346 | ++drv_data->rx; |
338 | } | 347 | } |
339 | 348 | ||
@@ -341,36 +350,47 @@ static void u8_cs_chg_reader(struct driver_data *drv_data) | |||
341 | { | 350 | { |
342 | struct chip_data *chip = drv_data->cur_chip; | 351 | struct chip_data *chip = drv_data->cur_chip; |
343 | 352 | ||
344 | while (drv_data->rx < drv_data->rx_end) { | 353 | /* poll for SPI completion before start */ |
345 | write_FLAG(chip->flag); | 354 | while (!(read_STAT(drv_data) & BIT_STAT_SPIF)) |
346 | SSYNC(); | 355 | cpu_relax(); |
347 | 356 | ||
348 | read_RDBR(); /* kick off */ | 357 | /* clear TDBR buffer before read(else it will be shifted out) */ |
349 | while (!(read_STAT() & BIT_STAT_RXS)) | 358 | write_TDBR(drv_data, 0xFFFF); |
350 | continue; | 359 | |
351 | while (!(read_STAT() & BIT_STAT_SPIF)) | 360 | cs_active(drv_data, chip); |
352 | continue; | 361 | dummy_read(drv_data); |
353 | *(u8 *) (drv_data->rx) = read_SHAW(); | 362 | |
354 | write_FLAG(0xFF00 | chip->flag); | 363 | while (drv_data->rx < drv_data->rx_end - 1) { |
355 | SSYNC(); | 364 | cs_deactive(drv_data, chip); |
356 | if (chip->cs_chg_udelay) | 365 | |
357 | udelay(chip->cs_chg_udelay); | 366 | while (!(read_STAT(drv_data) & BIT_STAT_RXS)) |
367 | cpu_relax(); | ||
368 | cs_active(drv_data, chip); | ||
369 | *(u8 *) (drv_data->rx) = read_RDBR(drv_data); | ||
358 | ++drv_data->rx; | 370 | ++drv_data->rx; |
359 | } | 371 | } |
360 | write_FLAG(0xFF00); | 372 | cs_deactive(drv_data, chip); |
361 | SSYNC(); | 373 | |
374 | while (!(read_STAT(drv_data) & BIT_STAT_RXS)) | ||
375 | cpu_relax(); | ||
376 | *(u8 *) (drv_data->rx) = read_SHAW(drv_data); | ||
377 | ++drv_data->rx; | ||
362 | } | 378 | } |
363 | 379 | ||
364 | static void u8_duplex(struct driver_data *drv_data) | 380 | static void u8_duplex(struct driver_data *drv_data) |
365 | { | 381 | { |
382 | /* poll for SPI completion before start */ | ||
383 | while (!(read_STAT(drv_data) & BIT_STAT_SPIF)) | ||
384 | cpu_relax(); | ||
385 | |||
366 | /* in duplex mode, clk is triggered by writing of TDBR */ | 386 | /* in duplex mode, clk is triggered by writing of TDBR */ |
367 | while (drv_data->rx < drv_data->rx_end) { | 387 | while (drv_data->rx < drv_data->rx_end) { |
368 | write_TDBR(*(u8 *) (drv_data->tx)); | 388 | write_TDBR(drv_data, (*(u8 *) (drv_data->tx))); |
369 | while (!(read_STAT() & BIT_STAT_SPIF)) | 389 | while (read_STAT(drv_data) & BIT_STAT_TXS) |
370 | continue; | 390 | cpu_relax(); |
371 | while (!(read_STAT() & BIT_STAT_RXS)) | 391 | while (!(read_STAT(drv_data) & BIT_STAT_RXS)) |
372 | continue; | 392 | cpu_relax(); |
373 | *(u8 *) (drv_data->rx) = read_RDBR(); | 393 | *(u8 *) (drv_data->rx) = read_RDBR(drv_data); |
374 | ++drv_data->rx; | 394 | ++drv_data->rx; |
375 | ++drv_data->tx; | 395 | ++drv_data->tx; |
376 | } | 396 | } |
@@ -380,83 +400,89 @@ static void u8_cs_chg_duplex(struct driver_data *drv_data) | |||
380 | { | 400 | { |
381 | struct chip_data *chip = drv_data->cur_chip; | 401 | struct chip_data *chip = drv_data->cur_chip; |
382 | 402 | ||
403 | /* poll for SPI completion before start */ | ||
404 | while (!(read_STAT(drv_data) & BIT_STAT_SPIF)) | ||
405 | cpu_relax(); | ||
406 | |||
383 | while (drv_data->rx < drv_data->rx_end) { | 407 | while (drv_data->rx < drv_data->rx_end) { |
384 | write_FLAG(chip->flag); | 408 | cs_active(drv_data, chip); |
385 | SSYNC(); | 409 | |
386 | 410 | write_TDBR(drv_data, (*(u8 *) (drv_data->tx))); | |
387 | write_TDBR(*(u8 *) (drv_data->tx)); | 411 | while (read_STAT(drv_data) & BIT_STAT_TXS) |
388 | while (!(read_STAT() & BIT_STAT_SPIF)) | 412 | cpu_relax(); |
389 | continue; | 413 | while (!(read_STAT(drv_data) & BIT_STAT_RXS)) |
390 | while (!(read_STAT() & BIT_STAT_RXS)) | 414 | cpu_relax(); |
391 | continue; | 415 | *(u8 *) (drv_data->rx) = read_RDBR(drv_data); |
392 | *(u8 *) (drv_data->rx) = read_RDBR(); | 416 | |
393 | write_FLAG(0xFF00 | chip->flag); | 417 | cs_deactive(drv_data, chip); |
394 | SSYNC(); | 418 | |
395 | if (chip->cs_chg_udelay) | ||
396 | udelay(chip->cs_chg_udelay); | ||
397 | ++drv_data->rx; | 419 | ++drv_data->rx; |
398 | ++drv_data->tx; | 420 | ++drv_data->tx; |
399 | } | 421 | } |
400 | write_FLAG(0xFF00); | ||
401 | SSYNC(); | ||
402 | } | 422 | } |
403 | 423 | ||
404 | static void u16_writer(struct driver_data *drv_data) | 424 | static void u16_writer(struct driver_data *drv_data) |
405 | { | 425 | { |
406 | dev_dbg(&drv_data->pdev->dev, | 426 | dev_dbg(&drv_data->pdev->dev, |
407 | "cr16 is 0x%x\n", read_STAT()); | 427 | "cr16 is 0x%x\n", read_STAT(drv_data)); |
428 | |||
429 | /* poll for SPI completion before start */ | ||
430 | while (!(read_STAT(drv_data) & BIT_STAT_SPIF)) | ||
431 | cpu_relax(); | ||
408 | 432 | ||
409 | while (drv_data->tx < drv_data->tx_end) { | 433 | while (drv_data->tx < drv_data->tx_end) { |
410 | write_TDBR(*(u16 *) (drv_data->tx)); | 434 | write_TDBR(drv_data, (*(u16 *) (drv_data->tx))); |
411 | while ((read_STAT() & BIT_STAT_TXS)) | 435 | while ((read_STAT(drv_data) & BIT_STAT_TXS)) |
412 | continue; | 436 | cpu_relax(); |
413 | drv_data->tx += 2; | 437 | drv_data->tx += 2; |
414 | } | 438 | } |
415 | |||
416 | /* poll for SPI completion before returning */ | ||
417 | while (!(read_STAT() & BIT_STAT_SPIF)) | ||
418 | continue; | ||
419 | } | 439 | } |
420 | 440 | ||
421 | static void u16_cs_chg_writer(struct driver_data *drv_data) | 441 | static void u16_cs_chg_writer(struct driver_data *drv_data) |
422 | { | 442 | { |
423 | struct chip_data *chip = drv_data->cur_chip; | 443 | struct chip_data *chip = drv_data->cur_chip; |
424 | 444 | ||
445 | /* poll for SPI completion before start */ | ||
446 | while (!(read_STAT(drv_data) & BIT_STAT_SPIF)) | ||
447 | cpu_relax(); | ||
448 | |||
425 | while (drv_data->tx < drv_data->tx_end) { | 449 | while (drv_data->tx < drv_data->tx_end) { |
426 | write_FLAG(chip->flag); | 450 | cs_active(drv_data, chip); |
427 | SSYNC(); | 451 | |
428 | 452 | write_TDBR(drv_data, (*(u16 *) (drv_data->tx))); | |
429 | write_TDBR(*(u16 *) (drv_data->tx)); | 453 | while ((read_STAT(drv_data) & BIT_STAT_TXS)) |
430 | while ((read_STAT() & BIT_STAT_TXS)) | 454 | cpu_relax(); |
431 | continue; | 455 | |
432 | while (!(read_STAT() & BIT_STAT_SPIF)) | 456 | cs_deactive(drv_data, chip); |
433 | continue; | 457 | |
434 | write_FLAG(0xFF00 | chip->flag); | ||
435 | SSYNC(); | ||
436 | if (chip->cs_chg_udelay) | ||
437 | udelay(chip->cs_chg_udelay); | ||
438 | drv_data->tx += 2; | 458 | drv_data->tx += 2; |
439 | } | 459 | } |
440 | write_FLAG(0xFF00); | ||
441 | SSYNC(); | ||
442 | } | 460 | } |
443 | 461 | ||
444 | static void u16_reader(struct driver_data *drv_data) | 462 | static void u16_reader(struct driver_data *drv_data) |
445 | { | 463 | { |
446 | dev_dbg(&drv_data->pdev->dev, | 464 | dev_dbg(&drv_data->pdev->dev, |
447 | "cr-16 is 0x%x\n", read_STAT()); | 465 | "cr-16 is 0x%x\n", read_STAT(drv_data)); |
448 | dummy_read(); | 466 | |
467 | /* poll for SPI completion before start */ | ||
468 | while (!(read_STAT(drv_data) & BIT_STAT_SPIF)) | ||
469 | cpu_relax(); | ||
470 | |||
471 | /* clear TDBR buffer before read(else it will be shifted out) */ | ||
472 | write_TDBR(drv_data, 0xFFFF); | ||
473 | |||
474 | dummy_read(drv_data); | ||
449 | 475 | ||
450 | while (drv_data->rx < (drv_data->rx_end - 2)) { | 476 | while (drv_data->rx < (drv_data->rx_end - 2)) { |
451 | while (!(read_STAT() & BIT_STAT_RXS)) | 477 | while (!(read_STAT(drv_data) & BIT_STAT_RXS)) |
452 | continue; | 478 | cpu_relax(); |
453 | *(u16 *) (drv_data->rx) = read_RDBR(); | 479 | *(u16 *) (drv_data->rx) = read_RDBR(drv_data); |
454 | drv_data->rx += 2; | 480 | drv_data->rx += 2; |
455 | } | 481 | } |
456 | 482 | ||
457 | while (!(read_STAT() & BIT_STAT_RXS)) | 483 | while (!(read_STAT(drv_data) & BIT_STAT_RXS)) |
458 | continue; | 484 | cpu_relax(); |
459 | *(u16 *) (drv_data->rx) = read_SHAW(); | 485 | *(u16 *) (drv_data->rx) = read_SHAW(drv_data); |
460 | drv_data->rx += 2; | 486 | drv_data->rx += 2; |
461 | } | 487 | } |
462 | 488 | ||
@@ -464,36 +490,47 @@ static void u16_cs_chg_reader(struct driver_data *drv_data) | |||
464 | { | 490 | { |
465 | struct chip_data *chip = drv_data->cur_chip; | 491 | struct chip_data *chip = drv_data->cur_chip; |
466 | 492 | ||
467 | while (drv_data->rx < drv_data->rx_end) { | 493 | /* poll for SPI completion before start */ |
468 | write_FLAG(chip->flag); | 494 | while (!(read_STAT(drv_data) & BIT_STAT_SPIF)) |
469 | SSYNC(); | 495 | cpu_relax(); |
470 | 496 | ||
471 | read_RDBR(); /* kick off */ | 497 | /* clear TDBR buffer before read(else it will be shifted out) */ |
472 | while (!(read_STAT() & BIT_STAT_RXS)) | 498 | write_TDBR(drv_data, 0xFFFF); |
473 | continue; | 499 | |
474 | while (!(read_STAT() & BIT_STAT_SPIF)) | 500 | cs_active(drv_data, chip); |
475 | continue; | 501 | dummy_read(drv_data); |
476 | *(u16 *) (drv_data->rx) = read_SHAW(); | 502 | |
477 | write_FLAG(0xFF00 | chip->flag); | 503 | while (drv_data->rx < drv_data->rx_end - 2) { |
478 | SSYNC(); | 504 | cs_deactive(drv_data, chip); |
479 | if (chip->cs_chg_udelay) | 505 | |
480 | udelay(chip->cs_chg_udelay); | 506 | while (!(read_STAT(drv_data) & BIT_STAT_RXS)) |
507 | cpu_relax(); | ||
508 | cs_active(drv_data, chip); | ||
509 | *(u16 *) (drv_data->rx) = read_RDBR(drv_data); | ||
481 | drv_data->rx += 2; | 510 | drv_data->rx += 2; |
482 | } | 511 | } |
483 | write_FLAG(0xFF00); | 512 | cs_deactive(drv_data, chip); |
484 | SSYNC(); | 513 | |
514 | while (!(read_STAT(drv_data) & BIT_STAT_RXS)) | ||
515 | cpu_relax(); | ||
516 | *(u16 *) (drv_data->rx) = read_SHAW(drv_data); | ||
517 | drv_data->rx += 2; | ||
485 | } | 518 | } |
486 | 519 | ||
487 | static void u16_duplex(struct driver_data *drv_data) | 520 | static void u16_duplex(struct driver_data *drv_data) |
488 | { | 521 | { |
522 | /* poll for SPI completion before start */ | ||
523 | while (!(read_STAT(drv_data) & BIT_STAT_SPIF)) | ||
524 | cpu_relax(); | ||
525 | |||
489 | /* in duplex mode, clk is triggered by writing of TDBR */ | 526 | /* in duplex mode, clk is triggered by writing of TDBR */ |
490 | while (drv_data->tx < drv_data->tx_end) { | 527 | while (drv_data->tx < drv_data->tx_end) { |
491 | write_TDBR(*(u16 *) (drv_data->tx)); | 528 | write_TDBR(drv_data, (*(u16 *) (drv_data->tx))); |
492 | while (!(read_STAT() & BIT_STAT_SPIF)) | 529 | while (read_STAT(drv_data) & BIT_STAT_TXS) |
493 | continue; | 530 | cpu_relax(); |
494 | while (!(read_STAT() & BIT_STAT_RXS)) | 531 | while (!(read_STAT(drv_data) & BIT_STAT_RXS)) |
495 | continue; | 532 | cpu_relax(); |
496 | *(u16 *) (drv_data->rx) = read_RDBR(); | 533 | *(u16 *) (drv_data->rx) = read_RDBR(drv_data); |
497 | drv_data->rx += 2; | 534 | drv_data->rx += 2; |
498 | drv_data->tx += 2; | 535 | drv_data->tx += 2; |
499 | } | 536 | } |
@@ -503,25 +540,25 @@ static void u16_cs_chg_duplex(struct driver_data *drv_data) | |||
503 | { | 540 | { |
504 | struct chip_data *chip = drv_data->cur_chip; | 541 | struct chip_data *chip = drv_data->cur_chip; |
505 | 542 | ||
543 | /* poll for SPI completion before start */ | ||
544 | while (!(read_STAT(drv_data) & BIT_STAT_SPIF)) | ||
545 | cpu_relax(); | ||
546 | |||
506 | while (drv_data->tx < drv_data->tx_end) { | 547 | while (drv_data->tx < drv_data->tx_end) { |
507 | write_FLAG(chip->flag); | 548 | cs_active(drv_data, chip); |
508 | SSYNC(); | 549 | |
509 | 550 | write_TDBR(drv_data, (*(u16 *) (drv_data->tx))); | |
510 | write_TDBR(*(u16 *) (drv_data->tx)); | 551 | while (read_STAT(drv_data) & BIT_STAT_TXS) |
511 | while (!(read_STAT() & BIT_STAT_SPIF)) | 552 | cpu_relax(); |
512 | continue; | 553 | while (!(read_STAT(drv_data) & BIT_STAT_RXS)) |
513 | while (!(read_STAT() & BIT_STAT_RXS)) | 554 | cpu_relax(); |
514 | continue; | 555 | *(u16 *) (drv_data->rx) = read_RDBR(drv_data); |
515 | *(u16 *) (drv_data->rx) = read_RDBR(); | 556 | |
516 | write_FLAG(0xFF00 | chip->flag); | 557 | cs_deactive(drv_data, chip); |
517 | SSYNC(); | 558 | |
518 | if (chip->cs_chg_udelay) | ||
519 | udelay(chip->cs_chg_udelay); | ||
520 | drv_data->rx += 2; | 559 | drv_data->rx += 2; |
521 | drv_data->tx += 2; | 560 | drv_data->tx += 2; |
522 | } | 561 | } |
523 | write_FLAG(0xFF00); | ||
524 | SSYNC(); | ||
525 | } | 562 | } |
526 | 563 | ||
527 | /* test if ther is more transfer to be done */ | 564 | /* test if ther is more transfer to be done */ |
@@ -546,6 +583,7 @@ static void *next_transfer(struct driver_data *drv_data) | |||
546 | */ | 583 | */ |
547 | static void giveback(struct driver_data *drv_data) | 584 | static void giveback(struct driver_data *drv_data) |
548 | { | 585 | { |
586 | struct chip_data *chip = drv_data->cur_chip; | ||
549 | struct spi_transfer *last_transfer; | 587 | struct spi_transfer *last_transfer; |
550 | unsigned long flags; | 588 | unsigned long flags; |
551 | struct spi_message *msg; | 589 | struct spi_message *msg; |
@@ -565,10 +603,13 @@ static void giveback(struct driver_data *drv_data) | |||
565 | 603 | ||
566 | /* disable chip select signal. And not stop spi in autobuffer mode */ | 604 | /* disable chip select signal. And not stop spi in autobuffer mode */ |
567 | if (drv_data->tx_dma != 0xFFFF) { | 605 | if (drv_data->tx_dma != 0xFFFF) { |
568 | write_FLAG(0xFF00); | 606 | cs_deactive(drv_data, chip); |
569 | bfin_spi_disable(drv_data); | 607 | bfin_spi_disable(drv_data); |
570 | } | 608 | } |
571 | 609 | ||
610 | if (!drv_data->cs_change) | ||
611 | cs_deactive(drv_data, chip); | ||
612 | |||
572 | if (msg->complete) | 613 | if (msg->complete) |
573 | msg->complete(msg->context); | 614 | msg->complete(msg->context); |
574 | } | 615 | } |
@@ -576,14 +617,15 @@ static void giveback(struct driver_data *drv_data) | |||
576 | static irqreturn_t dma_irq_handler(int irq, void *dev_id) | 617 | static irqreturn_t dma_irq_handler(int irq, void *dev_id) |
577 | { | 618 | { |
578 | struct driver_data *drv_data = (struct driver_data *)dev_id; | 619 | struct driver_data *drv_data = (struct driver_data *)dev_id; |
620 | struct chip_data *chip = drv_data->cur_chip; | ||
579 | struct spi_message *msg = drv_data->cur_msg; | 621 | struct spi_message *msg = drv_data->cur_msg; |
580 | 622 | ||
581 | dev_dbg(&drv_data->pdev->dev, "in dma_irq_handler\n"); | 623 | dev_dbg(&drv_data->pdev->dev, "in dma_irq_handler\n"); |
582 | clear_dma_irqstat(CH_SPI); | 624 | clear_dma_irqstat(drv_data->dma_channel); |
583 | 625 | ||
584 | /* Wait for DMA to complete */ | 626 | /* Wait for DMA to complete */ |
585 | while (get_dma_curr_irqstat(CH_SPI) & DMA_RUN) | 627 | while (get_dma_curr_irqstat(drv_data->dma_channel) & DMA_RUN) |
586 | continue; | 628 | cpu_relax(); |
587 | 629 | ||
588 | /* | 630 | /* |
589 | * wait for the last transaction shifted out. HRM states: | 631 | * wait for the last transaction shifted out. HRM states: |
@@ -592,18 +634,19 @@ static irqreturn_t dma_irq_handler(int irq, void *dev_id) | |||
592 | * register until it goes low for 2 successive reads | 634 | * register until it goes low for 2 successive reads |
593 | */ | 635 | */ |
594 | if (drv_data->tx != NULL) { | 636 | if (drv_data->tx != NULL) { |
595 | while ((bfin_read_SPI_STAT() & TXS) || | 637 | while ((read_STAT(drv_data) & TXS) || |
596 | (bfin_read_SPI_STAT() & TXS)) | 638 | (read_STAT(drv_data) & TXS)) |
597 | continue; | 639 | cpu_relax(); |
598 | } | 640 | } |
599 | 641 | ||
600 | while (!(bfin_read_SPI_STAT() & SPIF)) | 642 | while (!(read_STAT(drv_data) & SPIF)) |
601 | continue; | 643 | cpu_relax(); |
602 | |||
603 | bfin_spi_disable(drv_data); | ||
604 | 644 | ||
605 | msg->actual_length += drv_data->len_in_bytes; | 645 | msg->actual_length += drv_data->len_in_bytes; |
606 | 646 | ||
647 | if (drv_data->cs_change) | ||
648 | cs_deactive(drv_data, chip); | ||
649 | |||
607 | /* Move to next transfer */ | 650 | /* Move to next transfer */ |
608 | msg->state = next_transfer(drv_data); | 651 | msg->state = next_transfer(drv_data); |
609 | 652 | ||
@@ -613,8 +656,8 @@ static irqreturn_t dma_irq_handler(int irq, void *dev_id) | |||
613 | /* free the irq handler before next transfer */ | 656 | /* free the irq handler before next transfer */ |
614 | dev_dbg(&drv_data->pdev->dev, | 657 | dev_dbg(&drv_data->pdev->dev, |
615 | "disable dma channel irq%d\n", | 658 | "disable dma channel irq%d\n", |
616 | CH_SPI); | 659 | drv_data->dma_channel); |
617 | dma_disable_irq(CH_SPI); | 660 | dma_disable_irq(drv_data->dma_channel); |
618 | 661 | ||
619 | return IRQ_HANDLED; | 662 | return IRQ_HANDLED; |
620 | } | 663 | } |
@@ -690,31 +733,67 @@ static void pump_transfers(unsigned long data) | |||
690 | drv_data->rx_dma = transfer->rx_dma; | 733 | drv_data->rx_dma = transfer->rx_dma; |
691 | drv_data->tx_dma = transfer->tx_dma; | 734 | drv_data->tx_dma = transfer->tx_dma; |
692 | drv_data->len_in_bytes = transfer->len; | 735 | drv_data->len_in_bytes = transfer->len; |
736 | drv_data->cs_change = transfer->cs_change; | ||
737 | |||
738 | /* Bits per word setup */ | ||
739 | switch (transfer->bits_per_word) { | ||
740 | case 8: | ||
741 | drv_data->n_bytes = 1; | ||
742 | width = CFG_SPI_WORDSIZE8; | ||
743 | drv_data->read = chip->cs_change_per_word ? | ||
744 | u8_cs_chg_reader : u8_reader; | ||
745 | drv_data->write = chip->cs_change_per_word ? | ||
746 | u8_cs_chg_writer : u8_writer; | ||
747 | drv_data->duplex = chip->cs_change_per_word ? | ||
748 | u8_cs_chg_duplex : u8_duplex; | ||
749 | break; | ||
750 | |||
751 | case 16: | ||
752 | drv_data->n_bytes = 2; | ||
753 | width = CFG_SPI_WORDSIZE16; | ||
754 | drv_data->read = chip->cs_change_per_word ? | ||
755 | u16_cs_chg_reader : u16_reader; | ||
756 | drv_data->write = chip->cs_change_per_word ? | ||
757 | u16_cs_chg_writer : u16_writer; | ||
758 | drv_data->duplex = chip->cs_change_per_word ? | ||
759 | u16_cs_chg_duplex : u16_duplex; | ||
760 | break; | ||
761 | |||
762 | default: | ||
763 | /* No change, the same as default setting */ | ||
764 | drv_data->n_bytes = chip->n_bytes; | ||
765 | width = chip->width; | ||
766 | drv_data->write = drv_data->tx ? chip->write : null_writer; | ||
767 | drv_data->read = drv_data->rx ? chip->read : null_reader; | ||
768 | drv_data->duplex = chip->duplex ? chip->duplex : null_writer; | ||
769 | break; | ||
770 | } | ||
771 | cr = (read_CTRL(drv_data) & (~BIT_CTL_TIMOD)); | ||
772 | cr |= (width << 8); | ||
773 | write_CTRL(drv_data, cr); | ||
693 | 774 | ||
694 | width = chip->width; | ||
695 | if (width == CFG_SPI_WORDSIZE16) { | 775 | if (width == CFG_SPI_WORDSIZE16) { |
696 | drv_data->len = (transfer->len) >> 1; | 776 | drv_data->len = (transfer->len) >> 1; |
697 | } else { | 777 | } else { |
698 | drv_data->len = transfer->len; | 778 | drv_data->len = transfer->len; |
699 | } | 779 | } |
700 | drv_data->write = drv_data->tx ? chip->write : null_writer; | 780 | dev_dbg(&drv_data->pdev->dev, "transfer: ", |
701 | drv_data->read = drv_data->rx ? chip->read : null_reader; | 781 | "drv_data->write is %p, chip->write is %p, null_wr is %p\n", |
702 | drv_data->duplex = chip->duplex ? chip->duplex : null_writer; | 782 | drv_data->write, chip->write, null_writer); |
703 | dev_dbg(&drv_data->pdev->dev, | ||
704 | "transfer: drv_data->write is %p, chip->write is %p, null_wr is %p\n", | ||
705 | drv_data->write, chip->write, null_writer); | ||
706 | 783 | ||
707 | /* speed and width has been set on per message */ | 784 | /* speed and width has been set on per message */ |
708 | message->state = RUNNING_STATE; | 785 | message->state = RUNNING_STATE; |
709 | dma_config = 0; | 786 | dma_config = 0; |
710 | 787 | ||
711 | /* restore spi status for each spi transfer */ | 788 | /* Speed setup (surely valid because already checked) */ |
712 | if (transfer->speed_hz) { | 789 | if (transfer->speed_hz) |
713 | write_BAUD(hz_to_spi_baud(transfer->speed_hz)); | 790 | write_BAUD(drv_data, hz_to_spi_baud(transfer->speed_hz)); |
714 | } else { | 791 | else |
715 | write_BAUD(chip->baud); | 792 | write_BAUD(drv_data, chip->baud); |
716 | } | 793 | |
717 | write_FLAG(chip->flag); | 794 | write_STAT(drv_data, BIT_STAT_CLR); |
795 | cr = (read_CTRL(drv_data) & (~BIT_CTL_TIMOD)); | ||
796 | cs_active(drv_data, chip); | ||
718 | 797 | ||
719 | dev_dbg(&drv_data->pdev->dev, | 798 | dev_dbg(&drv_data->pdev->dev, |
720 | "now pumping a transfer: width is %d, len is %d\n", | 799 | "now pumping a transfer: width is %d, len is %d\n", |
@@ -727,25 +806,25 @@ static void pump_transfers(unsigned long data) | |||
727 | */ | 806 | */ |
728 | if (drv_data->cur_chip->enable_dma && drv_data->len > 6) { | 807 | if (drv_data->cur_chip->enable_dma && drv_data->len > 6) { |
729 | 808 | ||
730 | write_STAT(BIT_STAT_CLR); | 809 | disable_dma(drv_data->dma_channel); |
731 | disable_dma(CH_SPI); | 810 | clear_dma_irqstat(drv_data->dma_channel); |
732 | clear_dma_irqstat(CH_SPI); | ||
733 | bfin_spi_disable(drv_data); | 811 | bfin_spi_disable(drv_data); |
734 | 812 | ||
735 | /* config dma channel */ | 813 | /* config dma channel */ |
736 | dev_dbg(&drv_data->pdev->dev, "doing dma transfer\n"); | 814 | dev_dbg(&drv_data->pdev->dev, "doing dma transfer\n"); |
737 | if (width == CFG_SPI_WORDSIZE16) { | 815 | if (width == CFG_SPI_WORDSIZE16) { |
738 | set_dma_x_count(CH_SPI, drv_data->len); | 816 | set_dma_x_count(drv_data->dma_channel, drv_data->len); |
739 | set_dma_x_modify(CH_SPI, 2); | 817 | set_dma_x_modify(drv_data->dma_channel, 2); |
740 | dma_width = WDSIZE_16; | 818 | dma_width = WDSIZE_16; |
741 | } else { | 819 | } else { |
742 | set_dma_x_count(CH_SPI, drv_data->len); | 820 | set_dma_x_count(drv_data->dma_channel, drv_data->len); |
743 | set_dma_x_modify(CH_SPI, 1); | 821 | set_dma_x_modify(drv_data->dma_channel, 1); |
744 | dma_width = WDSIZE_8; | 822 | dma_width = WDSIZE_8; |
745 | } | 823 | } |
746 | 824 | ||
747 | /* set transfer width,direction. And enable spi */ | 825 | /* poll for SPI completion before start */ |
748 | cr = (read_CTRL() & (~BIT_CTL_TIMOD)); | 826 | while (!(read_STAT(drv_data) & BIT_STAT_SPIF)) |
827 | cpu_relax(); | ||
749 | 828 | ||
750 | /* dirty hack for autobuffer DMA mode */ | 829 | /* dirty hack for autobuffer DMA mode */ |
751 | if (drv_data->tx_dma == 0xFFFF) { | 830 | if (drv_data->tx_dma == 0xFFFF) { |
@@ -755,13 +834,18 @@ static void pump_transfers(unsigned long data) | |||
755 | /* no irq in autobuffer mode */ | 834 | /* no irq in autobuffer mode */ |
756 | dma_config = | 835 | dma_config = |
757 | (DMAFLOW_AUTO | RESTART | dma_width | DI_EN); | 836 | (DMAFLOW_AUTO | RESTART | dma_width | DI_EN); |
758 | set_dma_config(CH_SPI, dma_config); | 837 | set_dma_config(drv_data->dma_channel, dma_config); |
759 | set_dma_start_addr(CH_SPI, (unsigned long)drv_data->tx); | 838 | set_dma_start_addr(drv_data->dma_channel, |
760 | enable_dma(CH_SPI); | 839 | (unsigned long)drv_data->tx); |
761 | write_CTRL(cr | CFG_SPI_DMAWRITE | (width << 8) | | 840 | enable_dma(drv_data->dma_channel); |
762 | (CFG_SPI_ENABLE << 14)); | 841 | |
763 | 842 | /* start SPI transfer */ | |
764 | /* just return here, there can only be one transfer in this mode */ | 843 | write_CTRL(drv_data, |
844 | (cr | CFG_SPI_DMAWRITE | BIT_CTL_ENABLE)); | ||
845 | |||
846 | /* just return here, there can only be one transfer | ||
847 | * in this mode | ||
848 | */ | ||
765 | message->status = 0; | 849 | message->status = 0; |
766 | giveback(drv_data); | 850 | giveback(drv_data); |
767 | return; | 851 | return; |
@@ -772,58 +856,51 @@ static void pump_transfers(unsigned long data) | |||
772 | /* set transfer mode, and enable SPI */ | 856 | /* set transfer mode, and enable SPI */ |
773 | dev_dbg(&drv_data->pdev->dev, "doing DMA in.\n"); | 857 | dev_dbg(&drv_data->pdev->dev, "doing DMA in.\n"); |
774 | 858 | ||
775 | /* disable SPI before write to TDBR */ | ||
776 | write_CTRL(cr & ~BIT_CTL_ENABLE); | ||
777 | |||
778 | /* clear tx reg soformer data is not shifted out */ | 859 | /* clear tx reg soformer data is not shifted out */ |
779 | write_TDBR(0xFF); | 860 | write_TDBR(drv_data, 0xFFFF); |
780 | 861 | ||
781 | set_dma_x_count(CH_SPI, drv_data->len); | 862 | set_dma_x_count(drv_data->dma_channel, drv_data->len); |
782 | 863 | ||
783 | /* start dma */ | 864 | /* start dma */ |
784 | dma_enable_irq(CH_SPI); | 865 | dma_enable_irq(drv_data->dma_channel); |
785 | dma_config = (WNR | RESTART | dma_width | DI_EN); | 866 | dma_config = (WNR | RESTART | dma_width | DI_EN); |
786 | set_dma_config(CH_SPI, dma_config); | 867 | set_dma_config(drv_data->dma_channel, dma_config); |
787 | set_dma_start_addr(CH_SPI, (unsigned long)drv_data->rx); | 868 | set_dma_start_addr(drv_data->dma_channel, |
788 | enable_dma(CH_SPI); | 869 | (unsigned long)drv_data->rx); |
870 | enable_dma(drv_data->dma_channel); | ||
871 | |||
872 | /* start SPI transfer */ | ||
873 | write_CTRL(drv_data, | ||
874 | (cr | CFG_SPI_DMAREAD | BIT_CTL_ENABLE)); | ||
789 | 875 | ||
790 | cr |= | ||
791 | CFG_SPI_DMAREAD | (width << 8) | (CFG_SPI_ENABLE << | ||
792 | 14); | ||
793 | /* set transfer mode, and enable SPI */ | ||
794 | write_CTRL(cr); | ||
795 | } else if (drv_data->tx != NULL) { | 876 | } else if (drv_data->tx != NULL) { |
796 | dev_dbg(&drv_data->pdev->dev, "doing DMA out.\n"); | 877 | dev_dbg(&drv_data->pdev->dev, "doing DMA out.\n"); |
797 | 878 | ||
798 | /* start dma */ | 879 | /* start dma */ |
799 | dma_enable_irq(CH_SPI); | 880 | dma_enable_irq(drv_data->dma_channel); |
800 | dma_config = (RESTART | dma_width | DI_EN); | 881 | dma_config = (RESTART | dma_width | DI_EN); |
801 | set_dma_config(CH_SPI, dma_config); | 882 | set_dma_config(drv_data->dma_channel, dma_config); |
802 | set_dma_start_addr(CH_SPI, (unsigned long)drv_data->tx); | 883 | set_dma_start_addr(drv_data->dma_channel, |
803 | enable_dma(CH_SPI); | 884 | (unsigned long)drv_data->tx); |
804 | 885 | enable_dma(drv_data->dma_channel); | |
805 | write_CTRL(cr | CFG_SPI_DMAWRITE | (width << 8) | | 886 | |
806 | (CFG_SPI_ENABLE << 14)); | 887 | /* start SPI transfer */ |
807 | 888 | write_CTRL(drv_data, | |
889 | (cr | CFG_SPI_DMAWRITE | BIT_CTL_ENABLE)); | ||
808 | } | 890 | } |
809 | } else { | 891 | } else { |
810 | /* IO mode write then read */ | 892 | /* IO mode write then read */ |
811 | dev_dbg(&drv_data->pdev->dev, "doing IO transfer\n"); | 893 | dev_dbg(&drv_data->pdev->dev, "doing IO transfer\n"); |
812 | 894 | ||
813 | write_STAT(BIT_STAT_CLR); | ||
814 | |||
815 | if (drv_data->tx != NULL && drv_data->rx != NULL) { | 895 | if (drv_data->tx != NULL && drv_data->rx != NULL) { |
816 | /* full duplex mode */ | 896 | /* full duplex mode */ |
817 | BUG_ON((drv_data->tx_end - drv_data->tx) != | 897 | BUG_ON((drv_data->tx_end - drv_data->tx) != |
818 | (drv_data->rx_end - drv_data->rx)); | 898 | (drv_data->rx_end - drv_data->rx)); |
819 | cr = (read_CTRL() & (~BIT_CTL_TIMOD)); | ||
820 | cr |= CFG_SPI_WRITE | (width << 8) | | ||
821 | (CFG_SPI_ENABLE << 14); | ||
822 | dev_dbg(&drv_data->pdev->dev, | 899 | dev_dbg(&drv_data->pdev->dev, |
823 | "IO duplex: cr is 0x%x\n", cr); | 900 | "IO duplex: cr is 0x%x\n", cr); |
824 | 901 | ||
825 | write_CTRL(cr); | 902 | /* set SPI transfer mode */ |
826 | SSYNC(); | 903 | write_CTRL(drv_data, (cr | CFG_SPI_WRITE)); |
827 | 904 | ||
828 | drv_data->duplex(drv_data); | 905 | drv_data->duplex(drv_data); |
829 | 906 | ||
@@ -831,14 +908,11 @@ static void pump_transfers(unsigned long data) | |||
831 | tranf_success = 0; | 908 | tranf_success = 0; |
832 | } else if (drv_data->tx != NULL) { | 909 | } else if (drv_data->tx != NULL) { |
833 | /* write only half duplex */ | 910 | /* write only half duplex */ |
834 | cr = (read_CTRL() & (~BIT_CTL_TIMOD)); | 911 | dev_dbg(&drv_data->pdev->dev, |
835 | cr |= CFG_SPI_WRITE | (width << 8) | | ||
836 | (CFG_SPI_ENABLE << 14); | ||
837 | dev_dbg(&drv_data->pdev->dev, | ||
838 | "IO write: cr is 0x%x\n", cr); | 912 | "IO write: cr is 0x%x\n", cr); |
839 | 913 | ||
840 | write_CTRL(cr); | 914 | /* set SPI transfer mode */ |
841 | SSYNC(); | 915 | write_CTRL(drv_data, (cr | CFG_SPI_WRITE)); |
842 | 916 | ||
843 | drv_data->write(drv_data); | 917 | drv_data->write(drv_data); |
844 | 918 | ||
@@ -846,14 +920,11 @@ static void pump_transfers(unsigned long data) | |||
846 | tranf_success = 0; | 920 | tranf_success = 0; |
847 | } else if (drv_data->rx != NULL) { | 921 | } else if (drv_data->rx != NULL) { |
848 | /* read only half duplex */ | 922 | /* read only half duplex */ |
849 | cr = (read_CTRL() & (~BIT_CTL_TIMOD)); | 923 | dev_dbg(&drv_data->pdev->dev, |
850 | cr |= CFG_SPI_READ | (width << 8) | | ||
851 | (CFG_SPI_ENABLE << 14); | ||
852 | dev_dbg(&drv_data->pdev->dev, | ||
853 | "IO read: cr is 0x%x\n", cr); | 924 | "IO read: cr is 0x%x\n", cr); |
854 | 925 | ||
855 | write_CTRL(cr); | 926 | /* set SPI transfer mode */ |
856 | SSYNC(); | 927 | write_CTRL(drv_data, (cr | CFG_SPI_READ)); |
857 | 928 | ||
858 | drv_data->read(drv_data); | 929 | drv_data->read(drv_data); |
859 | if (drv_data->rx != drv_data->rx_end) | 930 | if (drv_data->rx != drv_data->rx_end) |
@@ -861,7 +932,7 @@ static void pump_transfers(unsigned long data) | |||
861 | } | 932 | } |
862 | 933 | ||
863 | if (!tranf_success) { | 934 | if (!tranf_success) { |
864 | dev_dbg(&drv_data->pdev->dev, | 935 | dev_dbg(&drv_data->pdev->dev, |
865 | "IO write error!\n"); | 936 | "IO write error!\n"); |
866 | message->state = ERROR_STATE; | 937 | message->state = ERROR_STATE; |
867 | } else { | 938 | } else { |
@@ -881,9 +952,11 @@ static void pump_transfers(unsigned long data) | |||
881 | /* pop a msg from queue and kick off real transfer */ | 952 | /* pop a msg from queue and kick off real transfer */ |
882 | static void pump_messages(struct work_struct *work) | 953 | static void pump_messages(struct work_struct *work) |
883 | { | 954 | { |
884 | struct driver_data *drv_data = container_of(work, struct driver_data, pump_messages); | 955 | struct driver_data *drv_data; |
885 | unsigned long flags; | 956 | unsigned long flags; |
886 | 957 | ||
958 | drv_data = container_of(work, struct driver_data, pump_messages); | ||
959 | |||
887 | /* Lock queue and check for queue work */ | 960 | /* Lock queue and check for queue work */ |
888 | spin_lock_irqsave(&drv_data->lock, flags); | 961 | spin_lock_irqsave(&drv_data->lock, flags); |
889 | if (list_empty(&drv_data->queue) || drv_data->run == QUEUE_STOPPED) { | 962 | if (list_empty(&drv_data->queue) || drv_data->run == QUEUE_STOPPED) { |
@@ -902,6 +975,14 @@ static void pump_messages(struct work_struct *work) | |||
902 | /* Extract head of queue */ | 975 | /* Extract head of queue */ |
903 | drv_data->cur_msg = list_entry(drv_data->queue.next, | 976 | drv_data->cur_msg = list_entry(drv_data->queue.next, |
904 | struct spi_message, queue); | 977 | struct spi_message, queue); |
978 | |||
979 | /* Setup the SSP using the per chip configuration */ | ||
980 | drv_data->cur_chip = spi_get_ctldata(drv_data->cur_msg->spi); | ||
981 | if (restore_state(drv_data)) { | ||
982 | spin_unlock_irqrestore(&drv_data->lock, flags); | ||
983 | return; | ||
984 | }; | ||
985 | |||
905 | list_del_init(&drv_data->cur_msg->queue); | 986 | list_del_init(&drv_data->cur_msg->queue); |
906 | 987 | ||
907 | /* Initial message state */ | 988 | /* Initial message state */ |
@@ -909,15 +990,12 @@ static void pump_messages(struct work_struct *work) | |||
909 | drv_data->cur_transfer = list_entry(drv_data->cur_msg->transfers.next, | 990 | drv_data->cur_transfer = list_entry(drv_data->cur_msg->transfers.next, |
910 | struct spi_transfer, transfer_list); | 991 | struct spi_transfer, transfer_list); |
911 | 992 | ||
912 | /* Setup the SSP using the per chip configuration */ | 993 | dev_dbg(&drv_data->pdev->dev, "got a message to pump, " |
913 | drv_data->cur_chip = spi_get_ctldata(drv_data->cur_msg->spi); | 994 | "state is set to: baud %d, flag 0x%x, ctl 0x%x\n", |
914 | restore_state(drv_data); | 995 | drv_data->cur_chip->baud, drv_data->cur_chip->flag, |
996 | drv_data->cur_chip->ctl_reg); | ||
997 | |||
915 | dev_dbg(&drv_data->pdev->dev, | 998 | dev_dbg(&drv_data->pdev->dev, |
916 | "got a message to pump, state is set to: baud %d, flag 0x%x, ctl 0x%x\n", | ||
917 | drv_data->cur_chip->baud, drv_data->cur_chip->flag, | ||
918 | drv_data->cur_chip->ctl_reg); | ||
919 | |||
920 | dev_dbg(&drv_data->pdev->dev, | ||
921 | "the first transfer len is %d\n", | 999 | "the first transfer len is %d\n", |
922 | drv_data->cur_transfer->len); | 1000 | drv_data->cur_transfer->len); |
923 | 1001 | ||
@@ -959,6 +1037,22 @@ static int transfer(struct spi_device *spi, struct spi_message *msg) | |||
959 | return 0; | 1037 | return 0; |
960 | } | 1038 | } |
961 | 1039 | ||
1040 | #define MAX_SPI_SSEL 7 | ||
1041 | |||
1042 | static u16 ssel[3][MAX_SPI_SSEL] = { | ||
1043 | {P_SPI0_SSEL1, P_SPI0_SSEL2, P_SPI0_SSEL3, | ||
1044 | P_SPI0_SSEL4, P_SPI0_SSEL5, | ||
1045 | P_SPI0_SSEL6, P_SPI0_SSEL7}, | ||
1046 | |||
1047 | {P_SPI1_SSEL1, P_SPI1_SSEL2, P_SPI1_SSEL3, | ||
1048 | P_SPI1_SSEL4, P_SPI1_SSEL5, | ||
1049 | P_SPI1_SSEL6, P_SPI1_SSEL7}, | ||
1050 | |||
1051 | {P_SPI2_SSEL1, P_SPI2_SSEL2, P_SPI2_SSEL3, | ||
1052 | P_SPI2_SSEL4, P_SPI2_SSEL5, | ||
1053 | P_SPI2_SSEL6, P_SPI2_SSEL7}, | ||
1054 | }; | ||
1055 | |||
962 | /* first setup for new devices */ | 1056 | /* first setup for new devices */ |
963 | static int setup(struct spi_device *spi) | 1057 | static int setup(struct spi_device *spi) |
964 | { | 1058 | { |
@@ -993,6 +1087,18 @@ static int setup(struct spi_device *spi) | |||
993 | 1087 | ||
994 | /* chip_info isn't always needed */ | 1088 | /* chip_info isn't always needed */ |
995 | if (chip_info) { | 1089 | if (chip_info) { |
1090 | /* Make sure people stop trying to set fields via ctl_reg | ||
1091 | * when they should actually be using common SPI framework. | ||
1092 | * Currently we let through: WOM EMISO PSSE GM SZ TIMOD. | ||
1093 | * Not sure if a user actually needs/uses any of these, | ||
1094 | * but let's assume (for now) they do. | ||
1095 | */ | ||
1096 | if (chip_info->ctl_reg & (SPE|MSTR|CPOL|CPHA|LSBF|SIZE)) { | ||
1097 | dev_err(&spi->dev, "do not set bits in ctl_reg " | ||
1098 | "that the SPI framework manages\n"); | ||
1099 | return -EINVAL; | ||
1100 | } | ||
1101 | |||
996 | chip->enable_dma = chip_info->enable_dma != 0 | 1102 | chip->enable_dma = chip_info->enable_dma != 0 |
997 | && drv_data->master_info->enable_dma; | 1103 | && drv_data->master_info->enable_dma; |
998 | chip->ctl_reg = chip_info->ctl_reg; | 1104 | chip->ctl_reg = chip_info->ctl_reg; |
@@ -1015,20 +1121,20 @@ static int setup(struct spi_device *spi) | |||
1015 | * if any one SPI chip is registered and wants DMA, request the | 1121 | * if any one SPI chip is registered and wants DMA, request the |
1016 | * DMA channel for it | 1122 | * DMA channel for it |
1017 | */ | 1123 | */ |
1018 | if (chip->enable_dma && !dma_requested) { | 1124 | if (chip->enable_dma && !drv_data->dma_requested) { |
1019 | /* register dma irq handler */ | 1125 | /* register dma irq handler */ |
1020 | if (request_dma(CH_SPI, "BF53x_SPI_DMA") < 0) { | 1126 | if (request_dma(drv_data->dma_channel, "BF53x_SPI_DMA") < 0) { |
1021 | dev_dbg(&spi->dev, | 1127 | dev_dbg(&spi->dev, |
1022 | "Unable to request BlackFin SPI DMA channel\n"); | 1128 | "Unable to request BlackFin SPI DMA channel\n"); |
1023 | return -ENODEV; | 1129 | return -ENODEV; |
1024 | } | 1130 | } |
1025 | if (set_dma_callback(CH_SPI, (void *)dma_irq_handler, drv_data) | 1131 | if (set_dma_callback(drv_data->dma_channel, |
1026 | < 0) { | 1132 | (void *)dma_irq_handler, drv_data) < 0) { |
1027 | dev_dbg(&spi->dev, "Unable to set dma callback\n"); | 1133 | dev_dbg(&spi->dev, "Unable to set dma callback\n"); |
1028 | return -EPERM; | 1134 | return -EPERM; |
1029 | } | 1135 | } |
1030 | dma_disable_irq(CH_SPI); | 1136 | dma_disable_irq(drv_data->dma_channel); |
1031 | dma_requested = 1; | 1137 | drv_data->dma_requested = 1; |
1032 | } | 1138 | } |
1033 | 1139 | ||
1034 | /* | 1140 | /* |
@@ -1077,6 +1183,14 @@ static int setup(struct spi_device *spi) | |||
1077 | 1183 | ||
1078 | spi_set_ctldata(spi, chip); | 1184 | spi_set_ctldata(spi, chip); |
1079 | 1185 | ||
1186 | dev_dbg(&spi->dev, "chip select number is %d\n", chip->chip_select_num); | ||
1187 | if ((chip->chip_select_num > 0) | ||
1188 | && (chip->chip_select_num <= spi->master->num_chipselect)) | ||
1189 | peripheral_request(ssel[spi->master->bus_num] | ||
1190 | [chip->chip_select_num-1], DRV_NAME); | ||
1191 | |||
1192 | cs_deactive(drv_data, chip); | ||
1193 | |||
1080 | return 0; | 1194 | return 0; |
1081 | } | 1195 | } |
1082 | 1196 | ||
@@ -1088,6 +1202,11 @@ static void cleanup(struct spi_device *spi) | |||
1088 | { | 1202 | { |
1089 | struct chip_data *chip = spi_get_ctldata(spi); | 1203 | struct chip_data *chip = spi_get_ctldata(spi); |
1090 | 1204 | ||
1205 | if ((chip->chip_select_num > 0) | ||
1206 | && (chip->chip_select_num <= spi->master->num_chipselect)) | ||
1207 | peripheral_free(ssel[spi->master->bus_num] | ||
1208 | [chip->chip_select_num-1]); | ||
1209 | |||
1091 | kfree(chip); | 1210 | kfree(chip); |
1092 | } | 1211 | } |
1093 | 1212 | ||
@@ -1183,6 +1302,7 @@ static int __init bfin5xx_spi_probe(struct platform_device *pdev) | |||
1183 | struct bfin5xx_spi_master *platform_info; | 1302 | struct bfin5xx_spi_master *platform_info; |
1184 | struct spi_master *master; | 1303 | struct spi_master *master; |
1185 | struct driver_data *drv_data = 0; | 1304 | struct driver_data *drv_data = 0; |
1305 | struct resource *res; | ||
1186 | int status = 0; | 1306 | int status = 0; |
1187 | 1307 | ||
1188 | platform_info = dev->platform_data; | 1308 | platform_info = dev->platform_data; |
@@ -1193,10 +1313,12 @@ static int __init bfin5xx_spi_probe(struct platform_device *pdev) | |||
1193 | dev_err(&pdev->dev, "can not alloc spi_master\n"); | 1313 | dev_err(&pdev->dev, "can not alloc spi_master\n"); |
1194 | return -ENOMEM; | 1314 | return -ENOMEM; |
1195 | } | 1315 | } |
1316 | |||
1196 | drv_data = spi_master_get_devdata(master); | 1317 | drv_data = spi_master_get_devdata(master); |
1197 | drv_data->master = master; | 1318 | drv_data->master = master; |
1198 | drv_data->master_info = platform_info; | 1319 | drv_data->master_info = platform_info; |
1199 | drv_data->pdev = pdev; | 1320 | drv_data->pdev = pdev; |
1321 | drv_data->pin_req = platform_info->pin_req; | ||
1200 | 1322 | ||
1201 | master->bus_num = pdev->id; | 1323 | master->bus_num = pdev->id; |
1202 | master->num_chipselect = platform_info->num_chipselect; | 1324 | master->num_chipselect = platform_info->num_chipselect; |
@@ -1204,15 +1326,38 @@ static int __init bfin5xx_spi_probe(struct platform_device *pdev) | |||
1204 | master->setup = setup; | 1326 | master->setup = setup; |
1205 | master->transfer = transfer; | 1327 | master->transfer = transfer; |
1206 | 1328 | ||
1329 | /* Find and map our resources */ | ||
1330 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | ||
1331 | if (res == NULL) { | ||
1332 | dev_err(dev, "Cannot get IORESOURCE_MEM\n"); | ||
1333 | status = -ENOENT; | ||
1334 | goto out_error_get_res; | ||
1335 | } | ||
1336 | |||
1337 | drv_data->regs_base = ioremap(res->start, (res->end - res->start + 1)); | ||
1338 | if (drv_data->regs_base == NULL) { | ||
1339 | dev_err(dev, "Cannot map IO\n"); | ||
1340 | status = -ENXIO; | ||
1341 | goto out_error_ioremap; | ||
1342 | } | ||
1343 | |||
1344 | drv_data->dma_channel = platform_get_irq(pdev, 0); | ||
1345 | if (drv_data->dma_channel < 0) { | ||
1346 | dev_err(dev, "No DMA channel specified\n"); | ||
1347 | status = -ENOENT; | ||
1348 | goto out_error_no_dma_ch; | ||
1349 | } | ||
1350 | |||
1207 | /* Initial and start queue */ | 1351 | /* Initial and start queue */ |
1208 | status = init_queue(drv_data); | 1352 | status = init_queue(drv_data); |
1209 | if (status != 0) { | 1353 | if (status != 0) { |
1210 | dev_err(&pdev->dev, "problem initializing queue\n"); | 1354 | dev_err(dev, "problem initializing queue\n"); |
1211 | goto out_error_queue_alloc; | 1355 | goto out_error_queue_alloc; |
1212 | } | 1356 | } |
1357 | |||
1213 | status = start_queue(drv_data); | 1358 | status = start_queue(drv_data); |
1214 | if (status != 0) { | 1359 | if (status != 0) { |
1215 | dev_err(&pdev->dev, "problem starting queue\n"); | 1360 | dev_err(dev, "problem starting queue\n"); |
1216 | goto out_error_queue_alloc; | 1361 | goto out_error_queue_alloc; |
1217 | } | 1362 | } |
1218 | 1363 | ||
@@ -1220,15 +1365,30 @@ static int __init bfin5xx_spi_probe(struct platform_device *pdev) | |||
1220 | platform_set_drvdata(pdev, drv_data); | 1365 | platform_set_drvdata(pdev, drv_data); |
1221 | status = spi_register_master(master); | 1366 | status = spi_register_master(master); |
1222 | if (status != 0) { | 1367 | if (status != 0) { |
1223 | dev_err(&pdev->dev, "problem registering spi master\n"); | 1368 | dev_err(dev, "problem registering spi master\n"); |
1224 | goto out_error_queue_alloc; | 1369 | goto out_error_queue_alloc; |
1225 | } | 1370 | } |
1226 | dev_dbg(&pdev->dev, "controller probe successfully\n"); | 1371 | |
1372 | status = peripheral_request_list(drv_data->pin_req, DRV_NAME); | ||
1373 | if (status != 0) { | ||
1374 | dev_err(&pdev->dev, ": Requesting Peripherals failed\n"); | ||
1375 | goto out_error; | ||
1376 | } | ||
1377 | |||
1378 | dev_info(dev, "%s, Version %s, regs_base@%p, dma channel@%d\n", | ||
1379 | DRV_DESC, DRV_VERSION, drv_data->regs_base, | ||
1380 | drv_data->dma_channel); | ||
1227 | return status; | 1381 | return status; |
1228 | 1382 | ||
1229 | out_error_queue_alloc: | 1383 | out_error_queue_alloc: |
1230 | destroy_queue(drv_data); | 1384 | destroy_queue(drv_data); |
1385 | out_error_no_dma_ch: | ||
1386 | iounmap((void *) drv_data->regs_base); | ||
1387 | out_error_ioremap: | ||
1388 | out_error_get_res: | ||
1389 | out_error: | ||
1231 | spi_master_put(master); | 1390 | spi_master_put(master); |
1391 | |||
1232 | return status; | 1392 | return status; |
1233 | } | 1393 | } |
1234 | 1394 | ||
@@ -1251,13 +1411,15 @@ static int __devexit bfin5xx_spi_remove(struct platform_device *pdev) | |||
1251 | 1411 | ||
1252 | /* Release DMA */ | 1412 | /* Release DMA */ |
1253 | if (drv_data->master_info->enable_dma) { | 1413 | if (drv_data->master_info->enable_dma) { |
1254 | if (dma_channel_active(CH_SPI)) | 1414 | if (dma_channel_active(drv_data->dma_channel)) |
1255 | free_dma(CH_SPI); | 1415 | free_dma(drv_data->dma_channel); |
1256 | } | 1416 | } |
1257 | 1417 | ||
1258 | /* Disconnect from the SPI framework */ | 1418 | /* Disconnect from the SPI framework */ |
1259 | spi_unregister_master(drv_data->master); | 1419 | spi_unregister_master(drv_data->master); |
1260 | 1420 | ||
1421 | peripheral_free_list(drv_data->pin_req); | ||
1422 | |||
1261 | /* Prevent double remove */ | 1423 | /* Prevent double remove */ |
1262 | platform_set_drvdata(pdev, NULL); | 1424 | platform_set_drvdata(pdev, NULL); |
1263 | 1425 | ||
@@ -1305,7 +1467,7 @@ static int bfin5xx_spi_resume(struct platform_device *pdev) | |||
1305 | MODULE_ALIAS("bfin-spi-master"); /* for platform bus hotplug */ | 1467 | MODULE_ALIAS("bfin-spi-master"); /* for platform bus hotplug */ |
1306 | static struct platform_driver bfin5xx_spi_driver = { | 1468 | static struct platform_driver bfin5xx_spi_driver = { |
1307 | .driver = { | 1469 | .driver = { |
1308 | .name = "bfin-spi-master", | 1470 | .name = DRV_NAME, |
1309 | .owner = THIS_MODULE, | 1471 | .owner = THIS_MODULE, |
1310 | }, | 1472 | }, |
1311 | .suspend = bfin5xx_spi_suspend, | 1473 | .suspend = bfin5xx_spi_suspend, |