diff options
author | Bartlomiej Zolnierkiewicz <bzolnier@gmail.com> | 2007-10-16 16:29:58 -0400 |
---|---|---|
committer | Bartlomiej Zolnierkiewicz <bzolnier@gmail.com> | 2007-10-16 16:29:58 -0400 |
commit | a718122ce82ffd6628a158ebf76ab5970bccd415 (patch) | |
tree | 691da7a28bc328d9022f50692a61c7b3c1ca7c0b /drivers | |
parent | 8c0697cc2c798fe11bbb9cf2dbe123892ecab91a (diff) |
sis5513: remove /proc/ide/sis
This belongs to user-space (and only if really needed).
text data bss dec hex filename
7129 404 8 7541 1d75 drivers/ide/pci/sis5513.o.before
3916 404 1 4321 10e1 drivers/ide/pci/sis5513.o.after
Additionaly to being bloat the code contained two bugs:
- wrong cable bit was checked (0x0001 instead of 0x8000) on ATA_133 chipsets
- incorrect UDMA cycle time was reported on ATA_100a/ATA_133 chipsets
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/ide/pci/sis5513.c | 249 |
1 files changed, 1 insertions, 248 deletions
diff --git a/drivers/ide/pci/sis5513.c b/drivers/ide/pci/sis5513.c index d758865f06be..5a54e2e20b3c 100644 --- a/drivers/ide/pci/sis5513.c +++ b/drivers/ide/pci/sis5513.c | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * linux/drivers/ide/pci/sis5513.c Version 0.30 Aug 9, 2007 | 2 | * linux/drivers/ide/pci/sis5513.c Version 0.31 Aug 9, 2007 |
3 | * | 3 | * |
4 | * Copyright (C) 1999-2000 Andre Hedrick <andre@linux-ide.org> | 4 | * Copyright (C) 1999-2000 Andre Hedrick <andre@linux-ide.org> |
5 | * Copyright (C) 2002 Lionel Bouton <Lionel.Bouton@inet6.fr>, Maintainer | 5 | * Copyright (C) 2002 Lionel Bouton <Lionel.Bouton@inet6.fr>, Maintainer |
@@ -65,8 +65,6 @@ | |||
65 | 65 | ||
66 | #include "ide-timing.h" | 66 | #include "ide-timing.h" |
67 | 67 | ||
68 | #define DISPLAY_SIS_TIMINGS | ||
69 | |||
70 | /* registers layout and init values are chipset family dependant */ | 68 | /* registers layout and init values are chipset family dependant */ |
71 | 69 | ||
72 | #define ATA_16 0x01 | 70 | #define ATA_16 0x01 |
@@ -193,243 +191,6 @@ static char* chipset_capability[] = { | |||
193 | "ATA 133 (1st gen)", "ATA 133 (2nd gen)" | 191 | "ATA 133 (1st gen)", "ATA 133 (2nd gen)" |
194 | }; | 192 | }; |
195 | 193 | ||
196 | #if defined(DISPLAY_SIS_TIMINGS) && defined(CONFIG_IDE_PROC_FS) | ||
197 | #include <linux/stat.h> | ||
198 | #include <linux/proc_fs.h> | ||
199 | |||
200 | static u8 sis_proc = 0; | ||
201 | |||
202 | static struct pci_dev *bmide_dev; | ||
203 | |||
204 | static char* cable_type[] = { | ||
205 | "80 pins", | ||
206 | "40 pins" | ||
207 | }; | ||
208 | |||
209 | static char* recovery_time[] ={ | ||
210 | "12 PCICLK", "1 PCICLK", | ||
211 | "2 PCICLK", "3 PCICLK", | ||
212 | "4 PCICLK", "5 PCICLCK", | ||
213 | "6 PCICLK", "7 PCICLCK", | ||
214 | "8 PCICLK", "9 PCICLCK", | ||
215 | "10 PCICLK", "11 PCICLK", | ||
216 | "13 PCICLK", "14 PCICLK", | ||
217 | "15 PCICLK", "15 PCICLK" | ||
218 | }; | ||
219 | |||
220 | static char* active_time[] = { | ||
221 | "8 PCICLK", "1 PCICLCK", | ||
222 | "2 PCICLK", "3 PCICLK", | ||
223 | "4 PCICLK", "5 PCICLK", | ||
224 | "6 PCICLK", "12 PCICLK" | ||
225 | }; | ||
226 | |||
227 | static char* cycle_time[] = { | ||
228 | "Reserved", "2 CLK", | ||
229 | "3 CLK", "4 CLK", | ||
230 | "5 CLK", "6 CLK", | ||
231 | "7 CLK", "8 CLK", | ||
232 | "9 CLK", "10 CLK", | ||
233 | "11 CLK", "12 CLK", | ||
234 | "13 CLK", "14 CLK", | ||
235 | "15 CLK", "16 CLK" | ||
236 | }; | ||
237 | |||
238 | /* Generic add master or slave info function */ | ||
239 | static char* get_drives_info (char *buffer, u8 pos) | ||
240 | { | ||
241 | u8 reg00, reg01, reg10, reg11; /* timing registers */ | ||
242 | u32 regdw0, regdw1; | ||
243 | char* p = buffer; | ||
244 | |||
245 | /* Postwrite/Prefetch */ | ||
246 | if (chipset_family < ATA_133) { | ||
247 | pci_read_config_byte(bmide_dev, 0x4b, ®00); | ||
248 | p += sprintf(p, "Drive %d: Postwrite %s \t \t Postwrite %s\n", | ||
249 | pos, (reg00 & (0x10 << pos)) ? "Enabled" : "Disabled", | ||
250 | (reg00 & (0x40 << pos)) ? "Enabled" : "Disabled"); | ||
251 | p += sprintf(p, " Prefetch %s \t \t Prefetch %s\n", | ||
252 | (reg00 & (0x01 << pos)) ? "Enabled" : "Disabled", | ||
253 | (reg00 & (0x04 << pos)) ? "Enabled" : "Disabled"); | ||
254 | pci_read_config_byte(bmide_dev, 0x40+2*pos, ®00); | ||
255 | pci_read_config_byte(bmide_dev, 0x41+2*pos, ®01); | ||
256 | pci_read_config_byte(bmide_dev, 0x44+2*pos, ®10); | ||
257 | pci_read_config_byte(bmide_dev, 0x45+2*pos, ®11); | ||
258 | } else { | ||
259 | u32 reg54h; | ||
260 | u8 drive_pci = 0x40; | ||
261 | pci_read_config_dword(bmide_dev, 0x54, ®54h); | ||
262 | if (reg54h & 0x40000000) { | ||
263 | // Configuration space remapped to 0x70 | ||
264 | drive_pci = 0x70; | ||
265 | } | ||
266 | pci_read_config_dword(bmide_dev, (unsigned long)drive_pci+4*pos, ®dw0); | ||
267 | pci_read_config_dword(bmide_dev, (unsigned long)drive_pci+4*pos+8, ®dw1); | ||
268 | |||
269 | p += sprintf(p, "Drive %d:\n", pos); | ||
270 | } | ||
271 | |||
272 | |||
273 | /* UDMA */ | ||
274 | if (chipset_family >= ATA_133) { | ||
275 | p += sprintf(p, " UDMA %s \t \t \t UDMA %s\n", | ||
276 | (regdw0 & 0x04) ? "Enabled" : "Disabled", | ||
277 | (regdw1 & 0x04) ? "Enabled" : "Disabled"); | ||
278 | p += sprintf(p, " UDMA Cycle Time %s \t UDMA Cycle Time %s\n", | ||
279 | cycle_time[(regdw0 & 0xF0) >> 4], | ||
280 | cycle_time[(regdw1 & 0xF0) >> 4]); | ||
281 | } else if (chipset_family >= ATA_33) { | ||
282 | p += sprintf(p, " UDMA %s \t \t \t UDMA %s\n", | ||
283 | (reg01 & 0x80) ? "Enabled" : "Disabled", | ||
284 | (reg11 & 0x80) ? "Enabled" : "Disabled"); | ||
285 | |||
286 | p += sprintf(p, " UDMA Cycle Time "); | ||
287 | switch(chipset_family) { | ||
288 | case ATA_33: p += sprintf(p, cycle_time[(reg01 & 0x60) >> 5]); break; | ||
289 | case ATA_66: | ||
290 | case ATA_100a: p += sprintf(p, cycle_time[(reg01 & 0x70) >> 4]); break; | ||
291 | case ATA_100: | ||
292 | case ATA_133a: p += sprintf(p, cycle_time[reg01 & 0x0F]); break; | ||
293 | default: p += sprintf(p, "?"); break; | ||
294 | } | ||
295 | p += sprintf(p, " \t UDMA Cycle Time "); | ||
296 | switch(chipset_family) { | ||
297 | case ATA_33: p += sprintf(p, cycle_time[(reg11 & 0x60) >> 5]); break; | ||
298 | case ATA_66: | ||
299 | case ATA_100a: p += sprintf(p, cycle_time[(reg11 & 0x70) >> 4]); break; | ||
300 | case ATA_100: | ||
301 | case ATA_133a: p += sprintf(p, cycle_time[reg11 & 0x0F]); break; | ||
302 | default: p += sprintf(p, "?"); break; | ||
303 | } | ||
304 | p += sprintf(p, "\n"); | ||
305 | } | ||
306 | |||
307 | |||
308 | if (chipset_family < ATA_133) { /* else case TODO */ | ||
309 | |||
310 | /* Data Active */ | ||
311 | p += sprintf(p, " Data Active Time "); | ||
312 | switch(chipset_family) { | ||
313 | case ATA_16: /* confirmed */ | ||
314 | case ATA_33: | ||
315 | case ATA_66: | ||
316 | case ATA_100a: p += sprintf(p, active_time[reg01 & 0x07]); break; | ||
317 | case ATA_100: | ||
318 | case ATA_133a: p += sprintf(p, active_time[(reg00 & 0x70) >> 4]); break; | ||
319 | default: p += sprintf(p, "?"); break; | ||
320 | } | ||
321 | p += sprintf(p, " \t Data Active Time "); | ||
322 | switch(chipset_family) { | ||
323 | case ATA_16: | ||
324 | case ATA_33: | ||
325 | case ATA_66: | ||
326 | case ATA_100a: p += sprintf(p, active_time[reg11 & 0x07]); break; | ||
327 | case ATA_100: | ||
328 | case ATA_133a: p += sprintf(p, active_time[(reg10 & 0x70) >> 4]); break; | ||
329 | default: p += sprintf(p, "?"); break; | ||
330 | } | ||
331 | p += sprintf(p, "\n"); | ||
332 | |||
333 | /* Data Recovery */ | ||
334 | /* warning: may need (reg&0x07) for pre ATA66 chips */ | ||
335 | p += sprintf(p, " Data Recovery Time %s \t Data Recovery Time %s\n", | ||
336 | recovery_time[reg00 & 0x0f], recovery_time[reg10 & 0x0f]); | ||
337 | } | ||
338 | |||
339 | return p; | ||
340 | } | ||
341 | |||
342 | static char* get_masters_info(char* buffer) | ||
343 | { | ||
344 | return get_drives_info(buffer, 0); | ||
345 | } | ||
346 | |||
347 | static char* get_slaves_info(char* buffer) | ||
348 | { | ||
349 | return get_drives_info(buffer, 1); | ||
350 | } | ||
351 | |||
352 | /* Main get_info, called on /proc/ide/sis reads */ | ||
353 | static int sis_get_info (char *buffer, char **addr, off_t offset, int count) | ||
354 | { | ||
355 | char *p = buffer; | ||
356 | int len; | ||
357 | u8 reg; | ||
358 | u16 reg2, reg3; | ||
359 | |||
360 | p += sprintf(p, "\nSiS 5513 "); | ||
361 | switch(chipset_family) { | ||
362 | case ATA_16: p += sprintf(p, "DMA 16"); break; | ||
363 | case ATA_33: p += sprintf(p, "Ultra 33"); break; | ||
364 | case ATA_66: p += sprintf(p, "Ultra 66"); break; | ||
365 | case ATA_100a: | ||
366 | case ATA_100: p += sprintf(p, "Ultra 100"); break; | ||
367 | case ATA_133a: | ||
368 | case ATA_133: p += sprintf(p, "Ultra 133"); break; | ||
369 | default: p+= sprintf(p, "Unknown???"); break; | ||
370 | } | ||
371 | p += sprintf(p, " chipset\n"); | ||
372 | p += sprintf(p, "--------------- Primary Channel " | ||
373 | "---------------- Secondary Channel " | ||
374 | "-------------\n"); | ||
375 | |||
376 | /* Status */ | ||
377 | pci_read_config_byte(bmide_dev, 0x4a, ®); | ||
378 | if (chipset_family == ATA_133) { | ||
379 | pci_read_config_word(bmide_dev, 0x50, ®2); | ||
380 | pci_read_config_word(bmide_dev, 0x52, ®3); | ||
381 | } | ||
382 | p += sprintf(p, "Channel Status: "); | ||
383 | if (chipset_family < ATA_66) { | ||
384 | p += sprintf(p, "%s \t \t \t \t %s\n", | ||
385 | (reg & 0x04) ? "On" : "Off", | ||
386 | (reg & 0x02) ? "On" : "Off"); | ||
387 | } else if (chipset_family < ATA_133) { | ||
388 | p += sprintf(p, "%s \t \t \t \t %s \n", | ||
389 | (reg & 0x02) ? "On" : "Off", | ||
390 | (reg & 0x04) ? "On" : "Off"); | ||
391 | } else { /* ATA_133 */ | ||
392 | p += sprintf(p, "%s \t \t \t \t %s \n", | ||
393 | (reg2 & 0x02) ? "On" : "Off", | ||
394 | (reg3 & 0x02) ? "On" : "Off"); | ||
395 | } | ||
396 | |||
397 | /* Operation Mode */ | ||
398 | pci_read_config_byte(bmide_dev, 0x09, ®); | ||
399 | p += sprintf(p, "Operation Mode: %s \t \t \t %s \n", | ||
400 | (reg & 0x01) ? "Native" : "Compatible", | ||
401 | (reg & 0x04) ? "Native" : "Compatible"); | ||
402 | |||
403 | /* 80-pin cable ? */ | ||
404 | if (chipset_family >= ATA_133) { | ||
405 | p += sprintf(p, "Cable Type: %s \t \t \t %s\n", | ||
406 | (reg2 & 0x01) ? cable_type[1] : cable_type[0], | ||
407 | (reg3 & 0x01) ? cable_type[1] : cable_type[0]); | ||
408 | } else if (chipset_family > ATA_33) { | ||
409 | pci_read_config_byte(bmide_dev, 0x48, ®); | ||
410 | p += sprintf(p, "Cable Type: %s \t \t \t %s\n", | ||
411 | (reg & 0x10) ? cable_type[1] : cable_type[0], | ||
412 | (reg & 0x20) ? cable_type[1] : cable_type[0]); | ||
413 | } | ||
414 | |||
415 | /* Prefetch Count */ | ||
416 | if (chipset_family < ATA_133) { | ||
417 | pci_read_config_word(bmide_dev, 0x4c, ®2); | ||
418 | pci_read_config_word(bmide_dev, 0x4e, ®3); | ||
419 | p += sprintf(p, "Prefetch Count: %d \t \t \t \t %d\n", | ||
420 | reg2, reg3); | ||
421 | } | ||
422 | |||
423 | p = get_masters_info(p); | ||
424 | p = get_slaves_info(p); | ||
425 | |||
426 | len = (p - buffer) - offset; | ||
427 | *addr = buffer + offset; | ||
428 | |||
429 | return len > count ? count : len; | ||
430 | } | ||
431 | #endif /* defined(DISPLAY_SIS_TIMINGS) && defined(CONFIG_IDE_PROC_FS) */ | ||
432 | |||
433 | /* | 194 | /* |
434 | * Configuration functions | 195 | * Configuration functions |
435 | */ | 196 | */ |
@@ -751,14 +512,6 @@ static unsigned int __devinit init_chipset_sis5513 (struct pci_dev *dev, const c | |||
751 | } | 512 | } |
752 | break; | 513 | break; |
753 | } | 514 | } |
754 | |||
755 | #if defined(DISPLAY_SIS_TIMINGS) && defined(CONFIG_IDE_PROC_FS) | ||
756 | if (!sis_proc) { | ||
757 | sis_proc = 1; | ||
758 | bmide_dev = dev; | ||
759 | ide_pci_create_host_proc("sis", sis_get_info); | ||
760 | } | ||
761 | #endif | ||
762 | } | 515 | } |
763 | 516 | ||
764 | return 0; | 517 | return 0; |