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authorBartlomiej Zolnierkiewicz <bzolnier@gmail.com>2007-07-31 16:02:41 -0400
committerJeff Garzik <jeff@garzik.org>2007-08-01 10:00:56 -0400
commit4761c06cb39011c9cc3fef9e6bbfb4c50ceb307d (patch)
tree6ed68ed603e48d1197e0f9d2329e0cc32f09e218 /drivers
parent5d6aca8defe77dfd0f0169cc015b900129078648 (diff)
pata_sis: fix MWDMA for <= UDMA66 chipsets and UDMA for UDMA33 chipsets
* Fix MWDMA timings setup in sis_old_set_dmamode() and sis_66_set_dmamode(). The old timings were overclocked (even worse behavior than sis5513 IDE driver which depends on BIOS to program correct timings), the new timings are taken from the datasheet (they match timings from ATA spec). * Fix UDMA timings setup in sis_old_set_dmamode(). Misplaced pci_write_config_word() call resulted in UDMA timings never being set. * Fix comments for sis_133_early_set_dmamode() and sis_133_set_dmamode(): - only the former function handles early SiS 961 bridges - both functions lack MWDMA timings setup * Fix typos in sis_100_set_piomode() and sis_133_set_piomode() comments. * Bump driver version. Cc: Alan Cox <alan@lxorguk.ukuu.org.uk> Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/ata/pata_sis.c20
1 files changed, 9 insertions, 11 deletions
diff --git a/drivers/ata/pata_sis.c b/drivers/ata/pata_sis.c
index 9a829a7cbc60..66bd0e83ac07 100644
--- a/drivers/ata/pata_sis.c
+++ b/drivers/ata/pata_sis.c
@@ -2,6 +2,7 @@
2 * pata_sis.c - SiS ATA driver 2 * pata_sis.c - SiS ATA driver
3 * 3 *
4 * (C) 2005 Red Hat <alan@redhat.com> 4 * (C) 2005 Red Hat <alan@redhat.com>
5 * (C) 2007 Bartlomiej Zolnierkiewicz
5 * 6 *
6 * Based upon linux/drivers/ide/pci/sis5513.c 7 * Based upon linux/drivers/ide/pci/sis5513.c
7 * Copyright (C) 1999-2000 Andre Hedrick <andre@linux-ide.org> 8 * Copyright (C) 1999-2000 Andre Hedrick <andre@linux-ide.org>
@@ -35,7 +36,7 @@
35#include "sis.h" 36#include "sis.h"
36 37
37#define DRV_NAME "pata_sis" 38#define DRV_NAME "pata_sis"
38#define DRV_VERSION "0.5.1" 39#define DRV_VERSION "0.5.2"
39 40
40struct sis_chipset { 41struct sis_chipset {
41 u16 device; /* PCI host ID */ 42 u16 device; /* PCI host ID */
@@ -237,7 +238,7 @@ static void sis_old_set_piomode (struct ata_port *ap, struct ata_device *adev)
237} 238}
238 239
239/** 240/**
240 * sis_100_set_pioode - Initialize host controller PATA PIO timings 241 * sis_100_set_piomode - Initialize host controller PATA PIO timings
241 * @ap: Port whose timings we are configuring 242 * @ap: Port whose timings we are configuring
242 * @adev: Device we are configuring for. 243 * @adev: Device we are configuring for.
243 * 244 *
@@ -262,7 +263,7 @@ static void sis_100_set_piomode (struct ata_port *ap, struct ata_device *adev)
262} 263}
263 264
264/** 265/**
265 * sis_133_set_pioode - Initialize host controller PATA PIO timings 266 * sis_133_set_piomode - Initialize host controller PATA PIO timings
266 * @ap: Port whose timings we are configuring 267 * @ap: Port whose timings we are configuring
267 * @adev: Device we are configuring for. 268 * @adev: Device we are configuring for.
268 * 269 *
@@ -334,7 +335,7 @@ static void sis_old_set_dmamode (struct ata_port *ap, struct ata_device *adev)
334 int drive_pci = sis_old_port_base(adev); 335 int drive_pci = sis_old_port_base(adev);
335 u16 timing; 336 u16 timing;
336 337
337 const u16 mwdma_bits[] = { 0x707, 0x202, 0x202 }; 338 const u16 mwdma_bits[] = { 0x008, 0x302, 0x301 };
338 const u16 udma_bits[] = { 0xE000, 0xC000, 0xA000 }; 339 const u16 udma_bits[] = { 0xE000, 0xC000, 0xA000 };
339 340
340 pci_read_config_word(pdev, drive_pci, &timing); 341 pci_read_config_word(pdev, drive_pci, &timing);
@@ -342,15 +343,15 @@ static void sis_old_set_dmamode (struct ata_port *ap, struct ata_device *adev)
342 if (adev->dma_mode < XFER_UDMA_0) { 343 if (adev->dma_mode < XFER_UDMA_0) {
343 /* bits 3-0 hold recovery timing bits 8-10 active timing and 344 /* bits 3-0 hold recovery timing bits 8-10 active timing and
344 the higer bits are dependant on the device */ 345 the higer bits are dependant on the device */
345 timing &= ~ 0x870F; 346 timing &= ~0x870F;
346 timing |= mwdma_bits[speed]; 347 timing |= mwdma_bits[speed];
347 pci_write_config_word(pdev, drive_pci, timing);
348 } else { 348 } else {
349 /* Bit 15 is UDMA on/off, bit 13-14 are cycle time */ 349 /* Bit 15 is UDMA on/off, bit 13-14 are cycle time */
350 speed = adev->dma_mode - XFER_UDMA_0; 350 speed = adev->dma_mode - XFER_UDMA_0;
351 timing &= ~0x6000; 351 timing &= ~0x6000;
352 timing |= udma_bits[speed]; 352 timing |= udma_bits[speed];
353 } 353 }
354 pci_write_config_word(pdev, drive_pci, timing);
354} 355}
355 356
356/** 357/**
@@ -373,7 +374,7 @@ static void sis_66_set_dmamode (struct ata_port *ap, struct ata_device *adev)
373 int drive_pci = sis_old_port_base(adev); 374 int drive_pci = sis_old_port_base(adev);
374 u16 timing; 375 u16 timing;
375 376
376 const u16 mwdma_bits[] = { 0x707, 0x202, 0x202 }; 377 const u16 mwdma_bits[] = { 0x008, 0x302, 0x301 };
377 const u16 udma_bits[] = { 0xF000, 0xD000, 0xB000, 0xA000, 0x9000}; 378 const u16 udma_bits[] = { 0xF000, 0xD000, 0xB000, 0xA000, 0x9000};
378 379
379 pci_read_config_word(pdev, drive_pci, &timing); 380 pci_read_config_word(pdev, drive_pci, &timing);
@@ -432,8 +433,7 @@ static void sis_100_set_dmamode (struct ata_port *ap, struct ata_device *adev)
432 * @adev: Device to program 433 * @adev: Device to program
433 * 434 *
434 * Set UDMA/MWDMA mode for device, in host controller PCI config space. 435 * Set UDMA/MWDMA mode for device, in host controller PCI config space.
435 * Handles early SiS 961 bridges. Supports MWDMA as well unlike 436 * Handles early SiS 961 bridges.
436 * the old ide/pci driver.
437 * 437 *
438 * LOCKING: 438 * LOCKING:
439 * None (inherited from caller). 439 * None (inherited from caller).
@@ -467,8 +467,6 @@ static void sis_133_early_set_dmamode (struct ata_port *ap, struct ata_device *a
467 * @adev: Device to program 467 * @adev: Device to program
468 * 468 *
469 * Set UDMA/MWDMA mode for device, in host controller PCI config space. 469 * Set UDMA/MWDMA mode for device, in host controller PCI config space.
470 * Handles early SiS 961 bridges. Supports MWDMA as well unlike
471 * the old ide/pci driver.
472 * 470 *
473 * LOCKING: 471 * LOCKING:
474 * None (inherited from caller). 472 * None (inherited from caller).