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authorKrzysztof Helt <krzysztof.h1@wp.pl>2007-10-16 04:29:28 -0400
committerLinus Torvalds <torvalds@woody.linux-foundation.org>2007-10-16 12:43:19 -0400
commit3cbe9cff92a52a2c2dd4767292b97884b67afe36 (patch)
treefb8c79a169a0277789fac6bdf4dfdefa3b2c8479 /drivers
parentdeea62d3796da4c53614638ced8d9784dd5b8b41 (diff)
tdfxfb: checkpatch fixes
This patch fixes all errors pointed by the checkpatch.pl script. Signed-off-by: Krzysztof Helt <krzysztof.h1@wp.pl> Signed-off-by: Antonino Daplas <adaplas@gmail.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/video/tdfxfb.c136
1 files changed, 77 insertions, 59 deletions
diff --git a/drivers/video/tdfxfb.c b/drivers/video/tdfxfb.c
index faac9b469ea9..057bdd593800 100644
--- a/drivers/video/tdfxfb.c
+++ b/drivers/video/tdfxfb.c
@@ -4,7 +4,7 @@
4 * 4 *
5 * Author: Hannu Mallat <hmallat@cc.hut.fi> 5 * Author: Hannu Mallat <hmallat@cc.hut.fi>
6 * 6 *
7 * Copyright © 1999 Hannu Mallat 7 * Copyright © 1999 Hannu Mallat
8 * All rights reserved 8 * All rights reserved
9 * 9 *
10 * Created : Thu Sep 23 18:17:43 1999, hmallat 10 * Created : Thu Sep 23 18:17:43 1999, hmallat
@@ -42,18 +42,18 @@
42 * 42 *
43 * Version history: 43 * Version history:
44 * 44 *
45 * 0.1.4 (released 2002-05-28) ported over to new fbdev api by James Simmons 45 * 0.1.4 (released 2002-05-28) ported over to new fbdev api by James Simmons
46 * 46 *
47 * 0.1.3 (released 1999-11-02) added Attila's panning support, code 47 * 0.1.3 (released 1999-11-02) added Attila's panning support, code
48 * reorg, hwcursor address page size alignment 48 * reorg, hwcursor address page size alignment
49 * (for mmaping both frame buffer and regs), 49 * (for mmaping both frame buffer and regs),
50 * and my changes to get rid of hardcoded 50 * and my changes to get rid of hardcoded
51 * VGA i/o register locations (uses PCI 51 * VGA i/o register locations (uses PCI
52 * configuration info now) 52 * configuration info now)
53 * 0.1.2 (released 1999-10-19) added Attila Kesmarki's bug fixes and 53 * 0.1.2 (released 1999-10-19) added Attila Kesmarki's bug fixes and
54 * improvements 54 * improvements
55 * 0.1.1 (released 1999-10-07) added Voodoo3 support by Harold Oga. 55 * 0.1.1 (released 1999-10-07) added Voodoo3 support by Harold Oga.
56 * 0.1.0 (released 1999-10-06) initial version 56 * 0.1.0 (released 1999-10-06) initial version
57 * 57 *
58 */ 58 */
59 59
@@ -70,12 +70,7 @@
70 70
71#include <video/tdfx.h> 71#include <video/tdfx.h>
72 72
73#undef TDFXFB_DEBUG 73#define DPRINTK(a, b...) pr_debug("fb: %s: " a, __FUNCTION__ , ## b)
74#ifdef TDFXFB_DEBUG
75#define DPRINTK(a,b...) printk(KERN_DEBUG "fb: %s: " a, __FUNCTION__ , ## b)
76#else
77#define DPRINTK(a,b...)
78#endif
79 74
80#ifdef CONFIG_MTRR 75#ifdef CONFIG_MTRR
81#include <asm/mtrr.h> 76#include <asm/mtrr.h>
@@ -172,7 +167,7 @@ static char *mode_option __devinitdata;
172static int nomtrr __devinitdata; 167static int nomtrr __devinitdata;
173 168
174/* ------------------------------------------------------------------------- 169/* -------------------------------------------------------------------------
175 * Hardware-specific funcions 170 * Hardware-specific funcions
176 * ------------------------------------------------------------------------- */ 171 * ------------------------------------------------------------------------- */
177 172
178static inline u8 vga_inb(struct tdfx_par *par, u32 reg) 173static inline u8 vga_inb(struct tdfx_par *par, u32 reg)
@@ -276,7 +271,7 @@ static inline void banshee_make_room(struct tdfx_par *par, int size)
276 while ((tdfx_inl(par, STATUS) & 0x1f) < size - 1) 271 while ((tdfx_inl(par, STATUS) & 0x1f) < size - 1)
277 cpu_relax(); 272 cpu_relax();
278} 273}
279 274
280static int banshee_wait_idle(struct fb_info *info) 275static int banshee_wait_idle(struct fb_info *info)
281{ 276{
282 struct tdfx_par *par = info->par; 277 struct tdfx_par *par = info->par;
@@ -286,8 +281,8 @@ static int banshee_wait_idle(struct fb_info *info)
286 tdfx_outl(par, COMMAND_3D, COMMAND_3D_NOP); 281 tdfx_outl(par, COMMAND_3D, COMMAND_3D_NOP);
287 282
288 do { 283 do {
289 if ((tdfx_inl(par, STATUS) & STATUS_BUSY) == 0) 284 if ((tdfx_inl(par, STATUS) & STATUS_BUSY) == 0)
290 i++; 285 i++;
291 } while (i < 3); 286 } while (i < 3);
292 287
293 return 0; 288 return 0;
@@ -297,7 +292,7 @@ static int banshee_wait_idle(struct fb_info *info)
297 * Set the color of a palette entry in 8bpp mode 292 * Set the color of a palette entry in 8bpp mode
298 */ 293 */
299static inline void do_setpalentry(struct tdfx_par *par, unsigned regno, u32 c) 294static inline void do_setpalentry(struct tdfx_par *par, unsigned regno, u32 c)
300{ 295{
301 banshee_make_room(par, 2); 296 banshee_make_room(par, 2);
302 tdfx_outl(par, DACADDR, regno); 297 tdfx_outl(par, DACADDR, regno);
303 /* read after write makes it working */ 298 /* read after write makes it working */
@@ -475,8 +470,12 @@ static int tdfxfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
475 } 470 }
476 var->yoffset = 0; 471 var->yoffset = 0;
477 472
478 /* Banshee doesn't support interlace, but Voodoo4/5 and probably Voodoo3 do. */ 473 /*
479 /* no direct information about device id now? use max_pixclock for this... */ 474 * Banshee doesn't support interlace, but Voodoo4/5 and probably
475 * Voodoo3 do.
476 * no direct information about device id now?
477 * use max_pixclock for this...
478 */
480 if (((var->vmode & FB_VMODE_MASK) == FB_VMODE_INTERLACED) && 479 if (((var->vmode & FB_VMODE_MASK) == FB_VMODE_INTERLACED) &&
481 (par->max_pixclock < VOODOO3_MAX_PIXCLOCK)) { 480 (par->max_pixclock < VOODOO3_MAX_PIXCLOCK)) {
482 DPRINTK("interlace not supported\n"); 481 DPRINTK("interlace not supported\n");
@@ -516,7 +515,10 @@ static int tdfxfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
516 var->transp.length = 0; 515 var->transp.length = 0;
517 switch (var->bits_per_pixel) { 516 switch (var->bits_per_pixel) {
518 case 8: 517 case 8:
519 var->red.length = var->green.length = var->blue.length = 8; 518 var->red.length = 8;
519 var->red.offset = 0;
520 var->green = var->red;
521 var->blue = var->red;
520 break; 522 break;
521 case 16: 523 case 16:
522 var->red.offset = 11; 524 var->red.offset = 11;
@@ -536,7 +538,8 @@ static int tdfxfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
536 var->red.length = var->green.length = var->blue.length = 8; 538 var->red.length = var->green.length = var->blue.length = 8;
537 break; 539 break;
538 } 540 }
539 var->height = var->width = -1; 541 var->width = -1;
542 var->height = -1;
540 543
541 var->accel_flags = FB_ACCELF_TEXT; 544 var->accel_flags = FB_ACCELF_TEXT;
542 545
@@ -581,7 +584,8 @@ static int tdfxfb_set_par(struct fb_info *info)
581 htotal >>= 1; 584 htotal >>= 1;
582 } 585 }
583 586
584 hd = wd = (hdispend >> 3) - 1; 587 wd = (hdispend >> 3) - 1;
588 hd = wd;
585 hs = (hsyncsta >> 3) - 1; 589 hs = (hsyncsta >> 3) - 1;
586 he = (hsyncend >> 3) - 1; 590 he = (hsyncend >> 3) - 1;
587 ht = (htotal >> 3) - 1; 591 ht = (htotal >> 3) - 1;
@@ -589,21 +593,23 @@ static int tdfxfb_set_par(struct fb_info *info)
589 hbe = ht; 593 hbe = ht;
590 594
591 if ((info->var.vmode & FB_VMODE_MASK) == FB_VMODE_DOUBLE) { 595 if ((info->var.vmode & FB_VMODE_MASK) == FB_VMODE_DOUBLE) {
592 vbs = vd = (info->var.yres << 1) - 1; 596 vd = (info->var.yres << 1) - 1;
593 vs = vd + (info->var.lower_margin << 1); 597 vs = vd + (info->var.lower_margin << 1);
594 ve = vs + (info->var.vsync_len << 1); 598 ve = vs + (info->var.vsync_len << 1);
595 vbe = vt = ve + (info->var.upper_margin << 1) - 1; 599 vt = ve + (info->var.upper_margin << 1) - 1;
596 reg.screensize = info->var.xres | (info->var.yres << 13); 600 reg.screensize = info->var.xres | (info->var.yres << 13);
597 reg.vidcfg |= VIDCFG_HALF_MODE; 601 reg.vidcfg |= VIDCFG_HALF_MODE;
598 reg.crt[0x09] = 0x80; 602 reg.crt[0x09] = 0x80;
599 } else { 603 } else {
600 vbs = vd = info->var.yres - 1; 604 vd = info->var.yres - 1;
601 vs = vd + info->var.lower_margin; 605 vs = vd + info->var.lower_margin;
602 ve = vs + info->var.vsync_len; 606 ve = vs + info->var.vsync_len;
603 vbe = vt = ve + info->var.upper_margin - 1; 607 vt = ve + info->var.upper_margin - 1;
604 reg.screensize = info->var.xres | (info->var.yres << 12); 608 reg.screensize = info->var.xres | (info->var.yres << 12);
605 reg.vidcfg &= ~VIDCFG_HALF_MODE; 609 reg.vidcfg &= ~VIDCFG_HALF_MODE;
606 } 610 }
611 vbs = vd;
612 vbe = vt;
607 613
608 /* this is all pretty standard VGA register stuffing */ 614 /* this is all pretty standard VGA register stuffing */
609 reg.misc[0x00] = 0x0f | 615 reg.misc[0x00] = 0x0f |
@@ -736,7 +742,7 @@ static int tdfxfb_set_par(struct fb_info *info)
736} 742}
737 743
738/* A handy macro shamelessly pinched from matroxfb */ 744/* A handy macro shamelessly pinched from matroxfb */
739#define CNVT_TOHW(val, width) ((((val)<<(width))+0x7FFF-(val))>>16) 745#define CNVT_TOHW(val, width) ((((val) << (width)) + 0x7FFF - (val)) >> 16)
740 746
741static int tdfxfb_setcolreg(unsigned regno, unsigned red, unsigned green, 747static int tdfxfb_setcolreg(unsigned regno, unsigned red, unsigned green,
742 unsigned blue, unsigned transp, 748 unsigned blue, unsigned transp,
@@ -751,14 +757,16 @@ static int tdfxfb_setcolreg(unsigned regno, unsigned red, unsigned green,
751 /* grayscale works only partially under directcolor */ 757 /* grayscale works only partially under directcolor */
752 if (info->var.grayscale) { 758 if (info->var.grayscale) {
753 /* grayscale = 0.30*R + 0.59*G + 0.11*B */ 759 /* grayscale = 0.30*R + 0.59*G + 0.11*B */
754 red = green = blue = (red * 77 + green * 151 + blue * 28) >> 8; 760 blue = (red * 77 + green * 151 + blue * 28) >> 8;
761 green = blue;
762 red = blue;
755 } 763 }
756 764
757 switch (info->fix.visual) { 765 switch (info->fix.visual) {
758 case FB_VISUAL_PSEUDOCOLOR: 766 case FB_VISUAL_PSEUDOCOLOR:
759 rgbcol =(((u32)red & 0xff00) << 8) | 767 rgbcol = (((u32)red & 0xff00) << 8) |
760 (((u32)green & 0xff00) << 0) | 768 (((u32)green & 0xff00) << 0) |
761 (((u32)blue & 0xff00) >> 8); 769 (((u32)blue & 0xff00) >> 8);
762 do_setpalentry(par, regno, rgbcol); 770 do_setpalentry(par, regno, rgbcol);
763 break; 771 break;
764 /* Truecolor has no hardware color palettes. */ 772 /* Truecolor has no hardware color palettes. */
@@ -851,7 +859,7 @@ static void tdfxfb_fillrect(struct fb_info *info,
851 struct tdfx_par *par = info->par; 859 struct tdfx_par *par = info->par;
852 u32 bpp = info->var.bits_per_pixel; 860 u32 bpp = info->var.bits_per_pixel;
853 u32 stride = info->fix.line_length; 861 u32 stride = info->fix.line_length;
854 u32 fmt= stride | ((bpp + ((bpp == 8) ? 0 : 8)) << 13); 862 u32 fmt = stride | ((bpp + ((bpp == 8) ? 0 : 8)) << 13);
855 int tdfx_rop; 863 int tdfx_rop;
856 u32 dx = rect->dx; 864 u32 dx = rect->dx;
857 u32 dy = rect->dy; 865 u32 dy = rect->dy;
@@ -922,13 +930,13 @@ static void tdfxfb_copyarea(struct fb_info *info,
922 } 930 }
923 931
924 if (area->sx <= area->dx) { 932 if (area->sx <= area->dx) {
925 //-X 933 /* -X */
926 blitcmd |= BIT(14); 934 blitcmd |= BIT(14);
927 sx += area->width - 1; 935 sx += area->width - 1;
928 dx += area->width - 1; 936 dx += area->width - 1;
929 } 937 }
930 if (area->sy <= area->dy) { 938 if (area->sy <= area->dy) {
931 //-Y 939 /* -Y */
932 blitcmd |= BIT(15); 940 blitcmd |= BIT(15);
933 sy += area->height - 1; 941 sy += area->height - 1;
934 dy += area->height - 1; 942 dy += area->height - 1;
@@ -961,9 +969,13 @@ static void tdfxfb_imageblit(struct fb_info *info, const struct fb_image *image)
961 u32 dstbase = 0; 969 u32 dstbase = 0;
962 970
963 if (image->depth != 1) { 971 if (image->depth != 1) {
964 //banshee_make_room(par, 6 + ((size + 3) >> 2)); 972#ifdef BROKEN_CODE
965 //srcfmt = stride | ((bpp+((bpp==8) ? 0 : 8)) << 13) | 0x400000; 973 banshee_make_room(par, 6 + ((size + 3) >> 2));
974 srcfmt = stride | ((bpp + ((bpp == 8) ? 0 : 8)) << 13) |
975 0x400000;
976#else
966 cfb_imageblit(info, image); 977 cfb_imageblit(info, image);
978#endif
967 return; 979 return;
968 } 980 }
969 banshee_make_room(par, 9); 981 banshee_make_room(par, 9);
@@ -998,7 +1010,8 @@ static void tdfxfb_imageblit(struct fb_info *info, const struct fb_image *image)
998 tdfx_outl(par, DSTBASE, dstbase); 1010 tdfx_outl(par, DSTBASE, dstbase);
999 tdfx_outl(par, SRCXY, 0); 1011 tdfx_outl(par, SRCXY, 0);
1000 tdfx_outl(par, DSTXY, dx | (dy << 16)); 1012 tdfx_outl(par, DSTXY, dx | (dy << 16));
1001 tdfx_outl(par, COMMAND_2D, COMMAND_2D_H2S_BITBLT | (TDFX_ROP_COPY << 24)); 1013 tdfx_outl(par, COMMAND_2D,
1014 COMMAND_2D_H2S_BITBLT | (TDFX_ROP_COPY << 24));
1002 tdfx_outl(par, SRCFORMAT, srcfmt); 1015 tdfx_outl(par, SRCFORMAT, srcfmt);
1003 tdfx_outl(par, DSTFORMAT, dstfmt); 1016 tdfx_outl(par, DSTFORMAT, dstfmt);
1004 tdfx_outl(par, DSTSIZE, image->width | (image->height << 16)); 1017 tdfx_outl(par, DSTSIZE, image->width | (image->height << 16));
@@ -1013,7 +1026,7 @@ static void tdfxfb_imageblit(struct fb_info *info, const struct fb_image *image)
1013 fifo_free = 31; 1026 fifo_free = 31;
1014 banshee_make_room(par, fifo_free); 1027 banshee_make_room(par, fifo_free);
1015 } 1028 }
1016 tdfx_outl(par, LAUNCH_2D, *(u32*)chardata); 1029 tdfx_outl(par, LAUNCH_2D, *(u32 *)chardata);
1017 chardata += 4; 1030 chardata += 4;
1018 } 1031 }
1019 1032
@@ -1026,11 +1039,11 @@ static void tdfxfb_imageblit(struct fb_info *info, const struct fb_image *image)
1026 tdfx_outl(par, LAUNCH_2D, *chardata); 1039 tdfx_outl(par, LAUNCH_2D, *chardata);
1027 break; 1040 break;
1028 case 2: 1041 case 2:
1029 tdfx_outl(par, LAUNCH_2D, *(u16*)chardata); 1042 tdfx_outl(par, LAUNCH_2D, *(u16 *)chardata);
1030 break; 1043 break;
1031 case 3: 1044 case 3:
1032 tdfx_outl(par, LAUNCH_2D, 1045 tdfx_outl(par, LAUNCH_2D,
1033 *(u16*)chardata | ((chardata[3]) << 24)); 1046 *(u16 *)chardata | (chardata[3] << 24));
1034 break; 1047 break;
1035 } 1048 }
1036} 1049}
@@ -1175,8 +1188,9 @@ static int __devinit tdfxfb_probe(struct pci_dev *pdev,
1175 struct fb_info *info; 1188 struct fb_info *info;
1176 int err, lpitch; 1189 int err, lpitch;
1177 1190
1178 if ((err = pci_enable_device(pdev))) { 1191 err = pci_enable_device(pdev);
1179 printk(KERN_WARNING "tdfxfb: Can't enable pdev: %d\n", err); 1192 if (err) {
1193 printk(KERN_ERR "tdfxfb: Can't enable pdev: %d\n", err);
1180 return err; 1194 return err;
1181 } 1195 }
1182 1196
@@ -1207,33 +1221,36 @@ static int __devinit tdfxfb_probe(struct pci_dev *pdev,
1207 tdfx_fix.mmio_len = pci_resource_len(pdev, 0); 1221 tdfx_fix.mmio_len = pci_resource_len(pdev, 0);
1208 if (!request_mem_region(tdfx_fix.mmio_start, tdfx_fix.mmio_len, 1222 if (!request_mem_region(tdfx_fix.mmio_start, tdfx_fix.mmio_len,
1209 "tdfx regbase")) { 1223 "tdfx regbase")) {
1210 printk(KERN_WARNING "tdfxfb: Can't reserve regbase\n"); 1224 printk(KERN_ERR "tdfxfb: Can't reserve regbase\n");
1211 goto out_err; 1225 goto out_err;
1212 } 1226 }
1213 1227
1214 default_par->regbase_virt = 1228 default_par->regbase_virt =
1215 ioremap_nocache(tdfx_fix.mmio_start, tdfx_fix.mmio_len); 1229 ioremap_nocache(tdfx_fix.mmio_start, tdfx_fix.mmio_len);
1216 if (!default_par->regbase_virt) { 1230 if (!default_par->regbase_virt) {
1217 printk("fb: Can't remap %s register area.\n", tdfx_fix.id); 1231 printk(KERN_ERR "fb: Can't remap %s register area.\n",
1232 tdfx_fix.id);
1218 goto out_err_regbase; 1233 goto out_err_regbase;
1219 } 1234 }
1220 1235
1221 tdfx_fix.smem_start = pci_resource_start(pdev, 1); 1236 tdfx_fix.smem_start = pci_resource_start(pdev, 1);
1222 if (!(tdfx_fix.smem_len = do_lfb_size(default_par, pdev->device))) { 1237 tdfx_fix.smem_len = do_lfb_size(default_par, pdev->device);
1223 printk("fb: Can't count %s memory.\n", tdfx_fix.id); 1238 if (!tdfx_fix.smem_len) {
1239 printk(KERN_ERR "fb: Can't count %s memory.\n", tdfx_fix.id);
1224 goto out_err_regbase; 1240 goto out_err_regbase;
1225 } 1241 }
1226 1242
1227 if (!request_mem_region(tdfx_fix.smem_start, 1243 if (!request_mem_region(tdfx_fix.smem_start,
1228 pci_resource_len(pdev, 1), "tdfx smem")) { 1244 pci_resource_len(pdev, 1), "tdfx smem")) {
1229 printk(KERN_WARNING "tdfxfb: Can't reserve smem\n"); 1245 printk(KERN_ERR "tdfxfb: Can't reserve smem\n");
1230 goto out_err_regbase; 1246 goto out_err_regbase;
1231 } 1247 }
1232 1248
1233 info->screen_base = ioremap_nocache(tdfx_fix.smem_start, 1249 info->screen_base = ioremap_nocache(tdfx_fix.smem_start,
1234 tdfx_fix.smem_len); 1250 tdfx_fix.smem_len);
1235 if (!info->screen_base) { 1251 if (!info->screen_base) {
1236 printk("fb: Can't remap %s framebuffer.\n", tdfx_fix.id); 1252 printk(KERN_ERR "fb: Can't remap %s framebuffer.\n",
1253 tdfx_fix.id);
1237 goto out_err_screenbase; 1254 goto out_err_screenbase;
1238 } 1255 }
1239 1256
@@ -1241,11 +1258,12 @@ static int __devinit tdfxfb_probe(struct pci_dev *pdev,
1241 1258
1242 if (!request_region(pci_resource_start(pdev, 2), 1259 if (!request_region(pci_resource_start(pdev, 2),
1243 pci_resource_len(pdev, 2), "tdfx iobase")) { 1260 pci_resource_len(pdev, 2), "tdfx iobase")) {
1244 printk(KERN_WARNING "tdfxfb: Can't reserve iobase\n"); 1261 printk(KERN_ERR "tdfxfb: Can't reserve iobase\n");
1245 goto out_err_screenbase; 1262 goto out_err_screenbase;
1246 } 1263 }
1247 1264
1248 printk("fb: %s memory = %dK\n", tdfx_fix.id, tdfx_fix.smem_len >> 10); 1265 printk(KERN_INFO "fb: %s memory = %dK\n", tdfx_fix.id,
1266 tdfx_fix.smem_len >> 10);
1249 1267
1250 default_par->mtrr_handle = -1; 1268 default_par->mtrr_handle = -1;
1251 if (!nomtrr) 1269 if (!nomtrr)
@@ -1261,7 +1279,7 @@ static int __devinit tdfxfb_probe(struct pci_dev *pdev,
1261 info->pseudo_palette = default_par->palette; 1279 info->pseudo_palette = default_par->palette;
1262 info->flags = FBINFO_DEFAULT | FBINFO_HWACCEL_YPAN; 1280 info->flags = FBINFO_DEFAULT | FBINFO_HWACCEL_YPAN;
1263#ifdef CONFIG_FB_3DFX_ACCEL 1281#ifdef CONFIG_FB_3DFX_ACCEL
1264 info->flags |= FBINFO_HWACCEL_FILLRECT | 1282 info->flags |= FBINFO_HWACCEL_FILLRECT |
1265 FBINFO_HWACCEL_COPYAREA | 1283 FBINFO_HWACCEL_COPYAREA |
1266 FBINFO_HWACCEL_IMAGEBLIT | 1284 FBINFO_HWACCEL_IMAGEBLIT |
1267 FBINFO_READS_FAST; 1285 FBINFO_READS_FAST;
@@ -1286,12 +1304,12 @@ static int __devinit tdfxfb_probe(struct pci_dev *pdev,
1286 goto out_err_iobase; 1304 goto out_err_iobase;
1287 1305
1288 if (fb_alloc_cmap(&info->cmap, 256, 0) < 0) { 1306 if (fb_alloc_cmap(&info->cmap, 256, 0) < 0) {
1289 printk(KERN_WARNING "tdfxfb: Can't allocate color map\n"); 1307 printk(KERN_ERR "tdfxfb: Can't allocate color map\n");
1290 goto out_err_iobase; 1308 goto out_err_iobase;
1291 } 1309 }
1292 1310
1293 if (register_framebuffer(info) < 0) { 1311 if (register_framebuffer(info) < 0) {
1294 printk("tdfxfb: can't register framebuffer\n"); 1312 printk(KERN_ERR "tdfxfb: can't register framebuffer\n");
1295 fb_dealloc_cmap(&info->cmap); 1313 fb_dealloc_cmap(&info->cmap);
1296 goto out_err_iobase; 1314 goto out_err_iobase;
1297 } 1315 }