diff options
author | Torsten Seeboth <Torsten.Seeboth@t-online.de> | 2005-11-09 00:36:27 -0500 |
---|---|---|
committer | Linus Torvalds <torvalds@g5.osdl.org> | 2005-11-09 10:56:08 -0500 |
commit | b1706b91051e1270e0bd5134219e48732a9d6c42 (patch) | |
tree | 87f22068f9a4f40854528408e0c64d523d92ecad /drivers | |
parent | c35d4b84f19d3f4b6a2fec652519e721f2cca169 (diff) |
[PATCH] v4l: 648: some clean up in cx88 tvaudio c
- Some clean up in cx88-tvaudio.c
Signed-off-by: Torsten Seeboth <Torsten.Seeboth@t-online.de>
Signed-off-by: Mauro Carvalho Chehab <mchehab@brturbo.com.br>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/media/video/cx88/cx88-core.c | 10 | ||||
-rw-r--r-- | drivers/media/video/cx88/cx88-tvaudio.c | 643 | ||||
-rw-r--r-- | drivers/media/video/cx88/cx88.h | 19 |
3 files changed, 325 insertions, 347 deletions
diff --git a/drivers/media/video/cx88/cx88-core.c b/drivers/media/video/cx88/cx88-core.c index 3ce000a5b7f9..87212759149e 100644 --- a/drivers/media/video/cx88/cx88-core.c +++ b/drivers/media/video/cx88/cx88-core.c | |||
@@ -845,19 +845,19 @@ static int set_tvaudio(struct cx88_core *core) | |||
845 | return 0; | 845 | return 0; |
846 | 846 | ||
847 | if (V4L2_STD_PAL_BG & norm->id) { | 847 | if (V4L2_STD_PAL_BG & norm->id) { |
848 | core->tvaudio = nicam ? WW_NICAM_BGDKL : WW_A2_BG; | 848 | core->tvaudio = WW_BG; |
849 | 849 | ||
850 | } else if (V4L2_STD_PAL_DK & norm->id) { | 850 | } else if (V4L2_STD_PAL_DK & norm->id) { |
851 | core->tvaudio = nicam ? WW_NICAM_BGDKL : WW_A2_DK; | 851 | core->tvaudio = WW_DK; |
852 | 852 | ||
853 | } else if (V4L2_STD_PAL_I & norm->id) { | 853 | } else if (V4L2_STD_PAL_I & norm->id) { |
854 | core->tvaudio = WW_NICAM_I; | 854 | core->tvaudio = WW_I; |
855 | 855 | ||
856 | } else if (V4L2_STD_SECAM_L & norm->id) { | 856 | } else if (V4L2_STD_SECAM_L & norm->id) { |
857 | core->tvaudio = WW_SYSTEM_L_AM; | 857 | core->tvaudio = WW_L; |
858 | 858 | ||
859 | } else if (V4L2_STD_SECAM_DK & norm->id) { | 859 | } else if (V4L2_STD_SECAM_DK & norm->id) { |
860 | core->tvaudio = WW_A2_DK; | 860 | core->tvaudio = WW_DK; |
861 | 861 | ||
862 | } else if ((V4L2_STD_NTSC_M & norm->id) || | 862 | } else if ((V4L2_STD_NTSC_M & norm->id) || |
863 | (V4L2_STD_PAL_M & norm->id)) { | 863 | (V4L2_STD_PAL_M & norm->id)) { |
diff --git a/drivers/media/video/cx88/cx88-tvaudio.c b/drivers/media/video/cx88/cx88-tvaudio.c index 2765acee0285..b6431cb78a59 100644 --- a/drivers/media/video/cx88/cx88-tvaudio.c +++ b/drivers/media/video/cx88/cx88-tvaudio.c | |||
@@ -271,248 +271,102 @@ static void set_audio_standard_BTSC(struct cx88_core *core, unsigned int sap, u3 | |||
271 | } | 271 | } |
272 | } | 272 | } |
273 | 273 | ||
274 | 274 | static void set_audio_standard_NICAM(struct cx88_core *core, u32 mode) | |
275 | static void set_audio_standard_NICAM_L(struct cx88_core *core, int stereo) | ||
276 | { | 275 | { |
277 | /* This is probably weird.. | ||
278 | * Let's operate and find out. */ | ||
279 | |||
280 | static const struct rlist nicam_l_mono[] = { | ||
281 | { AUD_ERRLOGPERIOD_R, 0x00000064 }, | ||
282 | { AUD_ERRINTRPTTHSHLD1_R, 0x00000FFF }, | ||
283 | { AUD_ERRINTRPTTHSHLD2_R, 0x0000001F }, | ||
284 | { AUD_ERRINTRPTTHSHLD3_R, 0x0000000F }, | ||
285 | |||
286 | { AUD_PDF_DDS_CNST_BYTE2, 0x48 }, | ||
287 | { AUD_PDF_DDS_CNST_BYTE1, 0x3D }, | ||
288 | { AUD_QAM_MODE, 0x00 }, | ||
289 | { AUD_PDF_DDS_CNST_BYTE0, 0xf5 }, | ||
290 | { AUD_PHACC_FREQ_8MSB, 0x3a }, | ||
291 | { AUD_PHACC_FREQ_8LSB, 0x4a }, | ||
292 | |||
293 | { AUD_DEEMPHGAIN_R, 0x6680 }, | ||
294 | { AUD_DEEMPHNUMER1_R, 0x353DE }, | ||
295 | { AUD_DEEMPHNUMER2_R, 0x1B1 }, | ||
296 | { AUD_DEEMPHDENOM1_R, 0x0F3D0 }, | ||
297 | { AUD_DEEMPHDENOM2_R, 0x0 }, | ||
298 | { AUD_FM_MODE_ENABLE, 0x7 }, | ||
299 | { AUD_POLYPH80SCALEFAC, 0x3 }, | ||
300 | { AUD_AFE_12DB_EN, 0x1 }, | ||
301 | { AAGC_GAIN, 0x0 }, | ||
302 | { AAGC_HYST, 0x18 }, | ||
303 | { AAGC_DEF, 0x20 }, | ||
304 | { AUD_DN0_FREQ, 0x0 }, | ||
305 | { AUD_POLY0_DDS_CONSTANT, 0x0E4DB2 }, | ||
306 | { AUD_DCOC_0_SRC, 0x21 }, | ||
307 | { AUD_IIR1_0_SEL, 0x0 }, | ||
308 | { AUD_IIR1_0_SHIFT, 0x7 }, | ||
309 | { AUD_IIR1_1_SEL, 0x2 }, | ||
310 | { AUD_IIR1_1_SHIFT, 0x0 }, | ||
311 | { AUD_DCOC_1_SRC, 0x3 }, | ||
312 | { AUD_DCOC1_SHIFT, 0x0 }, | ||
313 | { AUD_DCOC_PASS_IN, 0x0 }, | ||
314 | { AUD_IIR1_2_SEL, 0x23 }, | ||
315 | { AUD_IIR1_2_SHIFT, 0x0 }, | ||
316 | { AUD_IIR1_3_SEL, 0x4 }, | ||
317 | { AUD_IIR1_3_SHIFT, 0x7 }, | ||
318 | { AUD_IIR1_4_SEL, 0x5 }, | ||
319 | { AUD_IIR1_4_SHIFT, 0x7 }, | ||
320 | { AUD_IIR3_0_SEL, 0x7 }, | ||
321 | { AUD_IIR3_0_SHIFT, 0x0 }, | ||
322 | { AUD_DEEMPH0_SRC_SEL, 0x11 }, | ||
323 | { AUD_DEEMPH0_SHIFT, 0x0 }, | ||
324 | { AUD_DEEMPH0_G0, 0x7000 }, | ||
325 | { AUD_DEEMPH0_A0, 0x0 }, | ||
326 | { AUD_DEEMPH0_B0, 0x0 }, | ||
327 | { AUD_DEEMPH0_A1, 0x0 }, | ||
328 | { AUD_DEEMPH0_B1, 0x0 }, | ||
329 | { AUD_DEEMPH1_SRC_SEL, 0x11 }, | ||
330 | { AUD_DEEMPH1_SHIFT, 0x0 }, | ||
331 | { AUD_DEEMPH1_G0, 0x7000 }, | ||
332 | { AUD_DEEMPH1_A0, 0x0 }, | ||
333 | { AUD_DEEMPH1_B0, 0x0 }, | ||
334 | { AUD_DEEMPH1_A1, 0x0 }, | ||
335 | { AUD_DEEMPH1_B1, 0x0 }, | ||
336 | { AUD_OUT0_SEL, 0x3F }, | ||
337 | { AUD_OUT1_SEL, 0x3F }, | ||
338 | { AUD_DMD_RA_DDS, 0x0F5C285 }, | ||
339 | { AUD_PLL_INT, 0x1E }, | ||
340 | { AUD_PLL_DDS, 0x0 }, | ||
341 | { AUD_PLL_FRAC, 0x0E542 }, | ||
342 | |||
343 | // setup QAM registers | ||
344 | { AUD_RATE_ADJ1, 0x00000100 }, | ||
345 | { AUD_RATE_ADJ2, 0x00000200 }, | ||
346 | { AUD_RATE_ADJ3, 0x00000300 }, | ||
347 | { AUD_RATE_ADJ4, 0x00000400 }, | ||
348 | { AUD_RATE_ADJ5, 0x00000500 }, | ||
349 | { AUD_RATE_THRES_DMD, 0x000000C0 }, | ||
350 | { /* end of list */ }, | ||
351 | }; | ||
352 | |||
353 | static const struct rlist nicam_l[] = { | 276 | static const struct rlist nicam_l[] = { |
354 | // setup QAM registers | 277 | { AUD_AFE_12DB_EN, 0x00000001}, |
355 | { AUD_RATE_ADJ1, 0x00000060 }, | 278 | { AUD_RATE_ADJ1, 0x00000060 }, |
356 | { AUD_RATE_ADJ2, 0x000000F9 }, | 279 | { AUD_RATE_ADJ2, 0x000000F9 }, |
357 | { AUD_RATE_ADJ3, 0x000001CC }, | 280 | { AUD_RATE_ADJ3, 0x000001CC }, |
358 | { AUD_RATE_ADJ4, 0x000002B3 }, | 281 | { AUD_RATE_ADJ4, 0x000002B3 }, |
359 | { AUD_RATE_ADJ5, 0x00000726 }, | 282 | { AUD_RATE_ADJ5, 0x00000726 }, |
360 | { AUD_DEEMPHDENOM1_R, 0x0000F3D0 }, | 283 | { AUD_DEEMPHDENOM1_R, 0x0000F3D0 }, |
361 | { AUD_DEEMPHDENOM2_R, 0x00000000 }, | 284 | { AUD_DEEMPHDENOM2_R, 0x00000000 }, |
362 | { AUD_ERRLOGPERIOD_R, 0x00000064 }, | 285 | { AUD_ERRLOGPERIOD_R, 0x00000064 }, |
363 | { AUD_ERRINTRPTTHSHLD1_R, 0x00000FFF }, | 286 | { AUD_ERRINTRPTTHSHLD1_R, 0x00000FFF }, |
364 | { AUD_ERRINTRPTTHSHLD2_R, 0x0000001F }, | 287 | { AUD_ERRINTRPTTHSHLD2_R, 0x0000001F }, |
365 | { AUD_ERRINTRPTTHSHLD3_R, 0x0000000F }, | 288 | { AUD_ERRINTRPTTHSHLD3_R, 0x0000000F }, |
366 | { AUD_POLYPH80SCALEFAC, 0x00000003 }, | 289 | { AUD_POLYPH80SCALEFAC, 0x00000003 }, |
367 | { AUD_DMD_RA_DDS, 0x00C00000 }, | 290 | { AUD_DMD_RA_DDS, 0x00C00000 }, |
368 | { AUD_PLL_INT, 0x0000001E }, | 291 | { AUD_PLL_INT, 0x0000001E }, |
369 | { AUD_PLL_DDS, 0x00000000 }, | 292 | { AUD_PLL_DDS, 0x00000000 }, |
370 | { AUD_PLL_FRAC, 0x0000E542 }, | 293 | { AUD_PLL_FRAC, 0x0000E542 }, |
371 | { AUD_START_TIMER, 0x00000000 }, | 294 | { AUD_START_TIMER, 0x00000000 }, |
372 | { AUD_DEEMPHNUMER1_R, 0x000353DE }, | 295 | { AUD_DEEMPHNUMER1_R, 0x000353DE }, |
373 | { AUD_DEEMPHNUMER2_R, 0x000001B1 }, | 296 | { AUD_DEEMPHNUMER2_R, 0x000001B1 }, |
374 | { AUD_PDF_DDS_CNST_BYTE2, 0x06 }, | 297 | { AUD_PDF_DDS_CNST_BYTE2, 0x06 }, |
375 | { AUD_PDF_DDS_CNST_BYTE1, 0x82 }, | 298 | { AUD_PDF_DDS_CNST_BYTE1, 0x82 }, |
376 | { AUD_QAM_MODE, 0x05 }, | 299 | { AUD_PDF_DDS_CNST_BYTE0, 0x12 }, |
377 | { AUD_PDF_DDS_CNST_BYTE0, 0x12 }, | 300 | { AUD_QAM_MODE, 0x05 }, |
378 | { AUD_PHACC_FREQ_8MSB, 0x34 }, | 301 | { AUD_PHACC_FREQ_8MSB, 0x34 }, |
379 | { AUD_PHACC_FREQ_8LSB, 0x4C }, | 302 | { AUD_PHACC_FREQ_8LSB, 0x4C }, |
380 | { AUD_DEEMPHGAIN_R, 0x00006680 }, | 303 | { AUD_DEEMPHGAIN_R, 0x00006680 }, |
381 | { AUD_RATE_THRES_DMD, 0x000000C0 }, | 304 | { AUD_RATE_THRES_DMD, 0x000000C0 }, |
382 | { /* end of list */ }, | ||
383 | } ; | ||
384 | dprintk("%s (status: devel), stereo : %d\n",__FUNCTION__,stereo); | ||
385 | |||
386 | if (!stereo) { | ||
387 | /* AM Mono */ | ||
388 | set_audio_start(core, SEL_A2); | ||
389 | set_audio_registers(core, nicam_l_mono); | ||
390 | set_audio_finish(core, EN_A2_FORCE_MONO1); | ||
391 | } else { | ||
392 | /* Nicam Stereo */ | ||
393 | set_audio_start(core, SEL_NICAM); | ||
394 | set_audio_registers(core, nicam_l); | ||
395 | set_audio_finish(core, 0x1924); /* FIXME */ | ||
396 | } | ||
397 | } | ||
398 | |||
399 | static void set_audio_standard_PAL_I(struct cx88_core *core, int stereo) | ||
400 | { | ||
401 | static const struct rlist pal_i_fm_mono[] = { | ||
402 | {AUD_ERRLOGPERIOD_R, 0x00000064}, | ||
403 | {AUD_ERRINTRPTTHSHLD1_R, 0x00000fff}, | ||
404 | {AUD_ERRINTRPTTHSHLD2_R, 0x0000001f}, | ||
405 | {AUD_ERRINTRPTTHSHLD3_R, 0x0000000f}, | ||
406 | {AUD_PDF_DDS_CNST_BYTE2, 0x06}, | ||
407 | {AUD_PDF_DDS_CNST_BYTE1, 0x82}, | ||
408 | {AUD_PDF_DDS_CNST_BYTE0, 0x12}, | ||
409 | {AUD_QAM_MODE, 0x05}, | ||
410 | {AUD_PHACC_FREQ_8MSB, 0x3a}, | ||
411 | {AUD_PHACC_FREQ_8LSB, 0x93}, | ||
412 | {AUD_DMD_RA_DDS, 0x002a4f2f}, | ||
413 | {AUD_PLL_INT, 0x0000001e}, | ||
414 | {AUD_PLL_DDS, 0x00000004}, | ||
415 | {AUD_PLL_FRAC, 0x0000e542}, | ||
416 | {AUD_RATE_ADJ1, 0x00000100}, | ||
417 | {AUD_RATE_ADJ2, 0x00000200}, | ||
418 | {AUD_RATE_ADJ3, 0x00000300}, | ||
419 | {AUD_RATE_ADJ4, 0x00000400}, | ||
420 | {AUD_RATE_ADJ5, 0x00000500}, | ||
421 | {AUD_THR_FR, 0x00000000}, | ||
422 | {AUD_PILOT_BQD_1_K0, 0x0000755b}, | ||
423 | {AUD_PILOT_BQD_1_K1, 0x00551340}, | ||
424 | {AUD_PILOT_BQD_1_K2, 0x006d30be}, | ||
425 | {AUD_PILOT_BQD_1_K3, 0xffd394af}, | ||
426 | {AUD_PILOT_BQD_1_K4, 0x00400000}, | ||
427 | {AUD_PILOT_BQD_2_K0, 0x00040000}, | ||
428 | {AUD_PILOT_BQD_2_K1, 0x002a4841}, | ||
429 | {AUD_PILOT_BQD_2_K2, 0x00400000}, | ||
430 | {AUD_PILOT_BQD_2_K3, 0x00000000}, | ||
431 | {AUD_PILOT_BQD_2_K4, 0x00000000}, | ||
432 | {AUD_MODE_CHG_TIMER, 0x00000060}, | ||
433 | {AUD_AFE_12DB_EN, 0x00000001}, | ||
434 | {AAGC_HYST, 0x0000000a}, | ||
435 | {AUD_CORDIC_SHIFT_0, 0x00000007}, | ||
436 | {AUD_CORDIC_SHIFT_1, 0x00000007}, | ||
437 | {AUD_C1_UP_THR, 0x00007000}, | ||
438 | {AUD_C1_LO_THR, 0x00005400}, | ||
439 | {AUD_C2_UP_THR, 0x00005400}, | ||
440 | {AUD_C2_LO_THR, 0x00003000}, | ||
441 | {AUD_DCOC_0_SRC, 0x0000001a}, | ||
442 | {AUD_DCOC0_SHIFT, 0x00000000}, | ||
443 | {AUD_DCOC_0_SHIFT_IN0, 0x0000000a}, | ||
444 | {AUD_DCOC_0_SHIFT_IN1, 0x00000008}, | ||
445 | {AUD_DCOC_PASS_IN, 0x00000003}, | ||
446 | {AUD_IIR3_0_SEL, 0x00000021}, | ||
447 | {AUD_DN2_AFC, 0x00000002}, | ||
448 | {AUD_DCOC_1_SRC, 0x0000001b}, | ||
449 | {AUD_DCOC1_SHIFT, 0x00000000}, | ||
450 | {AUD_DCOC_1_SHIFT_IN0, 0x0000000a}, | ||
451 | {AUD_DCOC_1_SHIFT_IN1, 0x00000008}, | ||
452 | {AUD_IIR3_1_SEL, 0x00000023}, | ||
453 | {AUD_DN0_FREQ, 0x000035a3}, | ||
454 | {AUD_DN2_FREQ, 0x000029c7}, | ||
455 | {AUD_CRDC0_SRC_SEL, 0x00000511}, | ||
456 | {AUD_IIR1_0_SEL, 0x00000001}, | ||
457 | {AUD_IIR1_1_SEL, 0x00000000}, | ||
458 | {AUD_IIR3_2_SEL, 0x00000003}, | ||
459 | {AUD_IIR3_2_SHIFT, 0x00000000}, | ||
460 | {AUD_IIR3_0_SEL, 0x00000002}, | ||
461 | {AUD_IIR2_0_SEL, 0x00000021}, | ||
462 | {AUD_IIR2_0_SHIFT, 0x00000002}, | ||
463 | {AUD_DEEMPH0_SRC_SEL, 0x0000000b}, | ||
464 | {AUD_DEEMPH1_SRC_SEL, 0x0000000b}, | ||
465 | {AUD_POLYPH80SCALEFAC, 0x00000001}, | ||
466 | {AUD_START_TIMER, 0x00000000}, | ||
467 | { /* end of list */ }, | 305 | { /* end of list */ }, |
468 | }; | 306 | } ; |
469 | 307 | ||
470 | static const struct rlist pal_i_nicam[] = { | 308 | static const struct rlist nicam_bgdki_common[] = { |
309 | { AUD_AFE_12DB_EN, 0x00000001}, | ||
471 | { AUD_RATE_ADJ1, 0x00000010 }, | 310 | { AUD_RATE_ADJ1, 0x00000010 }, |
472 | { AUD_RATE_ADJ2, 0x00000040 }, | 311 | { AUD_RATE_ADJ2, 0x00000040 }, |
473 | { AUD_RATE_ADJ3, 0x00000100 }, | 312 | { AUD_RATE_ADJ3, 0x00000100 }, |
474 | { AUD_RATE_ADJ4, 0x00000400 }, | 313 | { AUD_RATE_ADJ4, 0x00000400 }, |
475 | { AUD_RATE_ADJ5, 0x00001000 }, | 314 | { AUD_RATE_ADJ5, 0x00001000 }, |
476 | // { AUD_DMD_RA_DDS, 0x00c0d5ce }, | 315 | //{ AUD_DMD_RA_DDS, 0x00c0d5ce }, |
477 | { AUD_DEEMPHGAIN_R, 0x000023c2 }, | 316 | { AUD_ERRLOGPERIOD_R, 0x00000fff}, |
478 | { AUD_DEEMPHNUMER1_R, 0x0002a7bc }, | 317 | { AUD_ERRINTRPTTHSHLD1_R, 0x000003ff}, |
479 | { AUD_DEEMPHNUMER2_R, 0x0003023e }, | 318 | { AUD_ERRINTRPTTHSHLD2_R, 0x000000ff}, |
480 | { AUD_DEEMPHDENOM1_R, 0x0000f3d0 }, | 319 | { AUD_ERRINTRPTTHSHLD3_R, 0x0000003f}, |
481 | { AUD_DEEMPHDENOM2_R, 0x00000000 }, | 320 | { AUD_POLYPH80SCALEFAC, 0x00000003}, |
482 | { AUD_DEEMPHDENOM2_R, 0x00000000 }, | 321 | { AUD_DEEMPHGAIN_R, 0x000023c2}, |
483 | { AUD_ERRLOGPERIOD_R, 0x00000fff }, | 322 | { AUD_DEEMPHNUMER1_R, 0x0002a7bc}, |
484 | { AUD_ERRINTRPTTHSHLD1_R, 0x000003ff }, | 323 | { AUD_DEEMPHNUMER2_R, 0x0003023e}, |
485 | { AUD_ERRINTRPTTHSHLD2_R, 0x000000ff }, | 324 | { AUD_DEEMPHDENOM1_R, 0x0000f3d0}, |
486 | { AUD_ERRINTRPTTHSHLD3_R, 0x0000003f }, | 325 | { AUD_DEEMPHDENOM2_R, 0x00000000}, |
487 | { AUD_POLYPH80SCALEFAC, 0x00000003 }, | ||
488 | { AUD_PDF_DDS_CNST_BYTE2, 0x06 }, | ||
489 | { AUD_PDF_DDS_CNST_BYTE1, 0x82 }, | 326 | { AUD_PDF_DDS_CNST_BYTE1, 0x82 }, |
490 | { AUD_PDF_DDS_CNST_BYTE0, 0x16 }, | 327 | { AUD_PDF_DDS_CNST_BYTE0, 0x16 }, |
491 | { AUD_QAM_MODE, 0x05 }, | 328 | { AUD_QAM_MODE, 0x05 }, |
329 | { /* end of list */ }, | ||
330 | }; | ||
331 | |||
332 | static const struct rlist nicam_i[] = { | ||
492 | { AUD_PDF_DDS_CNST_BYTE0, 0x12 }, | 333 | { AUD_PDF_DDS_CNST_BYTE0, 0x12 }, |
493 | { AUD_PHACC_FREQ_8MSB, 0x3a }, | 334 | { AUD_PHACC_FREQ_8MSB, 0x3a }, |
494 | { AUD_PHACC_FREQ_8LSB, 0x93 }, | 335 | { AUD_PHACC_FREQ_8LSB, 0x93 }, |
495 | { /* end of list */ }, | 336 | { /* end of list */ }, |
496 | }; | 337 | }; |
497 | 338 | ||
498 | dprintk("%s (status: devel), stereo : %d\n",__FUNCTION__,stereo); | 339 | static const struct rlist nicam_default[] = { |
340 | { AUD_PDF_DDS_CNST_BYTE0, 0x16 }, | ||
341 | { AUD_PHACC_FREQ_8MSB, 0x34 }, | ||
342 | { AUD_PHACC_FREQ_8LSB, 0x4c }, | ||
343 | { /* end of list */ }, | ||
344 | }; | ||
499 | 345 | ||
500 | if (!stereo) { | 346 | switch (core->tvaudio) { |
501 | /* FM Mono */ | 347 | case WW_L: |
502 | set_audio_start(core, SEL_A2); | 348 | dprintk("%s SECAM-L NICAM (status: devel)\n",__FUNCTION__); |
503 | set_audio_registers(core, pal_i_fm_mono); | 349 | set_audio_registers(core, nicam_l); |
504 | set_audio_finish(core, EN_DMTRX_SUMDIFF | EN_A2_FORCE_MONO1); | 350 | break; |
505 | } else { | 351 | case WW_I: |
506 | /* Nicam Stereo */ | 352 | dprintk("%s PAL-I NICAM (status: devel)\n",__FUNCTION__); |
507 | set_audio_start(core, SEL_NICAM); | 353 | set_audio_registers(core, nicam_bgdki_common); |
508 | set_audio_registers(core, pal_i_nicam); | 354 | set_audio_registers(core, nicam_i); |
509 | set_audio_finish(core, EN_DMTRX_LR | EN_DMTRX_BYPASS | EN_NICAM_AUTO_STEREO); | 355 | break; |
510 | } | 356 | default: |
357 | dprintk("%s PAL-BGDK NICAM (status: unknown)\n",__FUNCTION__); | ||
358 | set_audio_registers(core, nicam_bgdki_common); | ||
359 | set_audio_registers(core, nicam_default); | ||
360 | break; | ||
361 | }; | ||
362 | |||
363 | mode |= EN_DMTRX_LR | EN_DMTRX_BYPASS; | ||
364 | set_audio_finish(core, mode); | ||
511 | } | 365 | } |
512 | 366 | ||
513 | static void set_audio_standard_A2(struct cx88_core *core, u32 mode) | 367 | static void set_audio_standard_A2(struct cx88_core *core, u32 mode) |
514 | { | 368 | { |
515 | static const struct rlist a2_common[] = { | 369 | static const struct rlist a2_bgdk_common[] = { |
516 | {AUD_ERRLOGPERIOD_R, 0x00000064}, | 370 | {AUD_ERRLOGPERIOD_R, 0x00000064}, |
517 | {AUD_ERRINTRPTTHSHLD1_R, 0x00000fff}, | 371 | {AUD_ERRINTRPTTHSHLD1_R, 0x00000fff}, |
518 | {AUD_ERRINTRPTTHSHLD2_R, 0x0000001f}, | 372 | {AUD_ERRINTRPTTHSHLD2_R, 0x0000001f}, |
@@ -576,7 +430,7 @@ static void set_audio_standard_A2(struct cx88_core *core, u32 mode) | |||
576 | {AUD_C1_LO_THR, 0x00005400}, | 430 | {AUD_C1_LO_THR, 0x00005400}, |
577 | {AUD_C2_UP_THR, 0x00005400}, | 431 | {AUD_C2_UP_THR, 0x00005400}, |
578 | {AUD_C2_LO_THR, 0x00003000}, | 432 | {AUD_C2_LO_THR, 0x00003000}, |
579 | { /* end of list */ }, | 433 | { /* end of list */ }, |
580 | }; | 434 | }; |
581 | 435 | ||
582 | static const struct rlist a2_dk[] = { | 436 | static const struct rlist a2_dk[] = { |
@@ -587,24 +441,145 @@ static void set_audio_standard_A2(struct cx88_core *core, u32 mode) | |||
587 | {AUD_C2_LO_THR, 0x00003000}, | 441 | {AUD_C2_LO_THR, 0x00003000}, |
588 | {AUD_DN0_FREQ, 0x00003a1c}, | 442 | {AUD_DN0_FREQ, 0x00003a1c}, |
589 | {AUD_DN2_FREQ, 0x0000d2e0}, | 443 | {AUD_DN2_FREQ, 0x0000d2e0}, |
590 | { /* end of list */ }, | 444 | { /* end of list */ }, |
591 | }; | 445 | }; |
592 | /* unknown, probably NTSC-M */ | 446 | |
593 | static const struct rlist a2_m[] = { | 447 | static const struct rlist a1_i[] = { |
594 | {AUD_DMD_RA_DDS, 0x002a0425}, | 448 | {AUD_ERRLOGPERIOD_R, 0x00000064}, |
595 | {AUD_C1_UP_THR, 0x00003c00}, | 449 | {AUD_ERRINTRPTTHSHLD1_R, 0x00000fff}, |
596 | {AUD_C1_LO_THR, 0x00003000}, | 450 | {AUD_ERRINTRPTTHSHLD2_R, 0x0000001f}, |
597 | {AUD_C2_UP_THR, 0x00006000}, | 451 | {AUD_ERRINTRPTTHSHLD3_R, 0x0000000f}, |
598 | {AUD_C2_LO_THR, 0x00003c00}, | 452 | {AUD_PDF_DDS_CNST_BYTE2, 0x06}, |
599 | {AUD_DEEMPH0_A0, 0x00007a80}, | 453 | {AUD_PDF_DDS_CNST_BYTE1, 0x82}, |
600 | {AUD_DEEMPH1_A0, 0x00007a80}, | 454 | {AUD_PDF_DDS_CNST_BYTE0, 0x12}, |
601 | {AUD_DEEMPH0_G0, 0x00001200}, | 455 | {AUD_QAM_MODE, 0x05}, |
602 | {AUD_DEEMPH1_G0, 0x00001200}, | 456 | {AUD_PHACC_FREQ_8MSB, 0x3a}, |
603 | {AUD_DN0_FREQ, 0x0000283b}, | 457 | {AUD_PHACC_FREQ_8LSB, 0x93}, |
604 | {AUD_DN1_FREQ, 0x00003418}, | 458 | {AUD_DMD_RA_DDS, 0x002a4f2f}, |
605 | {AUD_DN2_FREQ, 0x000029c7}, | 459 | {AUD_PLL_INT, 0x0000001e}, |
606 | {AUD_POLY0_DDS_CONSTANT, 0x000a7540}, | 460 | {AUD_PLL_DDS, 0x00000004}, |
607 | { /* end of list */ }, | 461 | {AUD_PLL_FRAC, 0x0000e542}, |
462 | {AUD_RATE_ADJ1, 0x00000100}, | ||
463 | {AUD_RATE_ADJ2, 0x00000200}, | ||
464 | {AUD_RATE_ADJ3, 0x00000300}, | ||
465 | {AUD_RATE_ADJ4, 0x00000400}, | ||
466 | {AUD_RATE_ADJ5, 0x00000500}, | ||
467 | {AUD_THR_FR, 0x00000000}, | ||
468 | {AUD_PILOT_BQD_1_K0, 0x0000755b}, | ||
469 | {AUD_PILOT_BQD_1_K1, 0x00551340}, | ||
470 | {AUD_PILOT_BQD_1_K2, 0x006d30be}, | ||
471 | {AUD_PILOT_BQD_1_K3, 0xffd394af}, | ||
472 | {AUD_PILOT_BQD_1_K4, 0x00400000}, | ||
473 | {AUD_PILOT_BQD_2_K0, 0x00040000}, | ||
474 | {AUD_PILOT_BQD_2_K1, 0x002a4841}, | ||
475 | {AUD_PILOT_BQD_2_K2, 0x00400000}, | ||
476 | {AUD_PILOT_BQD_2_K3, 0x00000000}, | ||
477 | {AUD_PILOT_BQD_2_K4, 0x00000000}, | ||
478 | {AUD_MODE_CHG_TIMER, 0x00000060}, | ||
479 | {AUD_AFE_12DB_EN, 0x00000001}, | ||
480 | {AAGC_HYST, 0x0000000a}, | ||
481 | {AUD_CORDIC_SHIFT_0, 0x00000007}, | ||
482 | {AUD_CORDIC_SHIFT_1, 0x00000007}, | ||
483 | {AUD_C1_UP_THR, 0x00007000}, | ||
484 | {AUD_C1_LO_THR, 0x00005400}, | ||
485 | {AUD_C2_UP_THR, 0x00005400}, | ||
486 | {AUD_C2_LO_THR, 0x00003000}, | ||
487 | {AUD_DCOC_0_SRC, 0x0000001a}, | ||
488 | {AUD_DCOC0_SHIFT, 0x00000000}, | ||
489 | {AUD_DCOC_0_SHIFT_IN0, 0x0000000a}, | ||
490 | {AUD_DCOC_0_SHIFT_IN1, 0x00000008}, | ||
491 | {AUD_DCOC_PASS_IN, 0x00000003}, | ||
492 | {AUD_IIR3_0_SEL, 0x00000021}, | ||
493 | {AUD_DN2_AFC, 0x00000002}, | ||
494 | {AUD_DCOC_1_SRC, 0x0000001b}, | ||
495 | {AUD_DCOC1_SHIFT, 0x00000000}, | ||
496 | {AUD_DCOC_1_SHIFT_IN0, 0x0000000a}, | ||
497 | {AUD_DCOC_1_SHIFT_IN1, 0x00000008}, | ||
498 | {AUD_IIR3_1_SEL, 0x00000023}, | ||
499 | {AUD_DN0_FREQ, 0x000035a3}, | ||
500 | {AUD_DN2_FREQ, 0x000029c7}, | ||
501 | {AUD_CRDC0_SRC_SEL, 0x00000511}, | ||
502 | {AUD_IIR1_0_SEL, 0x00000001}, | ||
503 | {AUD_IIR1_1_SEL, 0x00000000}, | ||
504 | {AUD_IIR3_2_SEL, 0x00000003}, | ||
505 | {AUD_IIR3_2_SHIFT, 0x00000000}, | ||
506 | {AUD_IIR3_0_SEL, 0x00000002}, | ||
507 | {AUD_IIR2_0_SEL, 0x00000021}, | ||
508 | {AUD_IIR2_0_SHIFT, 0x00000002}, | ||
509 | {AUD_DEEMPH0_SRC_SEL, 0x0000000b}, | ||
510 | {AUD_DEEMPH1_SRC_SEL, 0x0000000b}, | ||
511 | {AUD_POLYPH80SCALEFAC, 0x00000001}, | ||
512 | {AUD_START_TIMER, 0x00000000}, | ||
513 | { /* end of list */ }, | ||
514 | }; | ||
515 | |||
516 | static const struct rlist am_l[] = { | ||
517 | {AUD_ERRLOGPERIOD_R, 0x00000064}, | ||
518 | {AUD_ERRINTRPTTHSHLD1_R, 0x00000FFF}, | ||
519 | {AUD_ERRINTRPTTHSHLD2_R, 0x0000001F}, | ||
520 | {AUD_ERRINTRPTTHSHLD3_R, 0x0000000F}, | ||
521 | {AUD_PDF_DDS_CNST_BYTE2, 0x48}, | ||
522 | {AUD_PDF_DDS_CNST_BYTE1, 0x3D}, | ||
523 | {AUD_QAM_MODE, 0x00}, | ||
524 | {AUD_PDF_DDS_CNST_BYTE0, 0xf5}, | ||
525 | {AUD_PHACC_FREQ_8MSB, 0x3a}, | ||
526 | {AUD_PHACC_FREQ_8LSB, 0x4a}, | ||
527 | {AUD_DEEMPHGAIN_R, 0x00006680}, | ||
528 | {AUD_DEEMPHNUMER1_R, 0x000353DE}, | ||
529 | {AUD_DEEMPHNUMER2_R, 0x000001B1}, | ||
530 | {AUD_DEEMPHDENOM1_R, 0x0000F3D0}, | ||
531 | {AUD_DEEMPHDENOM2_R, 0x00000000}, | ||
532 | {AUD_FM_MODE_ENABLE, 0x00000007}, | ||
533 | {AUD_POLYPH80SCALEFAC, 0x00000003}, | ||
534 | {AUD_AFE_12DB_EN, 0x00000001}, | ||
535 | {AAGC_GAIN, 0x00000000}, | ||
536 | {AAGC_HYST, 0x00000018}, | ||
537 | {AAGC_DEF, 0x00000020}, | ||
538 | {AUD_DN0_FREQ, 0x00000000}, | ||
539 | {AUD_POLY0_DDS_CONSTANT, 0x000E4DB2}, | ||
540 | {AUD_DCOC_0_SRC, 0x00000021}, | ||
541 | {AUD_IIR1_0_SEL, 0x00000000}, | ||
542 | {AUD_IIR1_0_SHIFT, 0x00000007}, | ||
543 | {AUD_IIR1_1_SEL, 0x00000002}, | ||
544 | {AUD_IIR1_1_SHIFT, 0x00000000}, | ||
545 | {AUD_DCOC_1_SRC, 0x00000003}, | ||
546 | {AUD_DCOC1_SHIFT, 0x00000000}, | ||
547 | {AUD_DCOC_PASS_IN, 0x00000000}, | ||
548 | {AUD_IIR1_2_SEL, 0x00000023}, | ||
549 | {AUD_IIR1_2_SHIFT, 0x00000000}, | ||
550 | {AUD_IIR1_3_SEL, 0x00000004}, | ||
551 | {AUD_IIR1_3_SHIFT, 0x00000007}, | ||
552 | {AUD_IIR1_4_SEL, 0x00000005}, | ||
553 | {AUD_IIR1_4_SHIFT, 0x00000007}, | ||
554 | {AUD_IIR3_0_SEL, 0x00000007}, | ||
555 | {AUD_IIR3_0_SHIFT, 0x00000000}, | ||
556 | {AUD_DEEMPH0_SRC_SEL, 0x00000011}, | ||
557 | {AUD_DEEMPH0_SHIFT, 0x00000000}, | ||
558 | {AUD_DEEMPH0_G0, 0x00007000}, | ||
559 | {AUD_DEEMPH0_A0, 0x00000000}, | ||
560 | {AUD_DEEMPH0_B0, 0x00000000}, | ||
561 | {AUD_DEEMPH0_A1, 0x00000000}, | ||
562 | {AUD_DEEMPH0_B1, 0x00000000}, | ||
563 | {AUD_DEEMPH1_SRC_SEL, 0x00000011}, | ||
564 | {AUD_DEEMPH1_SHIFT, 0x00000000}, | ||
565 | {AUD_DEEMPH1_G0, 0x00007000}, | ||
566 | {AUD_DEEMPH1_A0, 0x00000000}, | ||
567 | {AUD_DEEMPH1_B0, 0x00000000}, | ||
568 | {AUD_DEEMPH1_A1, 0x00000000}, | ||
569 | {AUD_DEEMPH1_B1, 0x00000000}, | ||
570 | {AUD_OUT0_SEL, 0x0000003F}, | ||
571 | {AUD_OUT1_SEL, 0x0000003F}, | ||
572 | {AUD_DMD_RA_DDS, 0x00F5C285}, | ||
573 | {AUD_PLL_INT, 0x0000001E}, | ||
574 | {AUD_PLL_DDS, 0x00000000}, | ||
575 | {AUD_PLL_FRAC, 0x0000E542}, | ||
576 | {AUD_RATE_ADJ1, 0x00000100}, | ||
577 | {AUD_RATE_ADJ2, 0x00000200}, | ||
578 | {AUD_RATE_ADJ3, 0x00000300}, | ||
579 | {AUD_RATE_ADJ4, 0x00000400}, | ||
580 | {AUD_RATE_ADJ5, 0x00000500}, | ||
581 | {AUD_RATE_THRES_DMD, 0x000000C0}, | ||
582 | {/* end of list */ }, | ||
608 | }; | 583 | }; |
609 | 584 | ||
610 | static const struct rlist a2_deemph50[] = { | 585 | static const struct rlist a2_deemph50[] = { |
@@ -616,32 +591,32 @@ static void set_audio_standard_A2(struct cx88_core *core, u32 mode) | |||
616 | { /* end of list */ }, | 591 | { /* end of list */ }, |
617 | }; | 592 | }; |
618 | 593 | ||
619 | static const struct rlist a2_deemph75[] = { | ||
620 | {AUD_DEEMPH0_G0, 0x00000480}, | ||
621 | {AUD_DEEMPH1_G0, 0x00000480}, | ||
622 | {AUD_DEEMPHGAIN_R, 0x00009000}, | ||
623 | {AUD_DEEMPHNUMER1_R, 0x000353de}, | ||
624 | {AUD_DEEMPHNUMER2_R, 0x000001b1}, | ||
625 | { /* end of list */ }, | ||
626 | }; | ||
627 | |||
628 | set_audio_start(core, SEL_A2); | 594 | set_audio_start(core, SEL_A2); |
629 | set_audio_registers(core, a2_common); | ||
630 | switch (core->tvaudio) { | 595 | switch (core->tvaudio) { |
631 | case WW_A2_BG: | 596 | case WW_BG: |
632 | dprintk("%s PAL-BG A2 (status: known-good)\n",__FUNCTION__); | 597 | dprintk("%s PAL-BG A1/2 (status: known-good)\n",__FUNCTION__); |
633 | set_audio_registers(core, a2_bg); | 598 | set_audio_registers(core, a2_bgdk_common); |
634 | set_audio_registers(core, a2_deemph50); | 599 | set_audio_registers(core, a2_bg); |
600 | set_audio_registers(core, a2_deemph50); | ||
635 | break; | 601 | break; |
636 | case WW_A2_DK: | 602 | case WW_DK: |
637 | dprintk("%s PAL-DK A2 (status: known-good)\n",__FUNCTION__); | 603 | dprintk("%s PAL-DK A1/2 (status: known-good)\n",__FUNCTION__); |
638 | set_audio_registers(core, a2_dk); | 604 | set_audio_registers(core, a2_bgdk_common); |
639 | set_audio_registers(core, a2_deemph50); | 605 | set_audio_registers(core, a2_dk); |
606 | set_audio_registers(core, a2_deemph50); | ||
640 | break; | 607 | break; |
641 | case WW_A2_M: | 608 | case WW_I: |
642 | dprintk("%s NTSC-M A2 (status: unknown)\n",__FUNCTION__); | 609 | dprintk("%s PAL-I A1 (status: known-good)\n",__FUNCTION__); |
643 | set_audio_registers(core, a2_m); | 610 | set_audio_registers(core, a1_i); |
644 | set_audio_registers(core, a2_deemph75); | 611 | set_audio_registers(core, a2_deemph50); |
612 | break; | ||
613 | case WW_L: | ||
614 | dprintk("%s AM-L (status: devel)\n",__FUNCTION__); | ||
615 | set_audio_registers(core, am_l); | ||
616 | break; | ||
617 | default: | ||
618 | dprintk("%s Warning: wrong value\n",__FUNCTION__); | ||
619 | return; | ||
645 | break; | 620 | break; |
646 | }; | 621 | }; |
647 | 622 | ||
@@ -728,22 +703,53 @@ static void set_audio_standard_FM(struct cx88_core *core, enum cx88_deemph_type | |||
728 | 703 | ||
729 | /* ----------------------------------------------------------- */ | 704 | /* ----------------------------------------------------------- */ |
730 | 705 | ||
706 | int cx88_detect_nicam(struct cx88_core *core) | ||
707 | { | ||
708 | int i, j=0; | ||
709 | |||
710 | dprintk("start nicam autodetect.\n"); | ||
711 | |||
712 | for(i=0; i<6; i++) { | ||
713 | /* if bit1=1 then nicam is detected */ | ||
714 | j+= ((cx_read(AUD_NICAM_STATUS2) & 0x02) >> 1); | ||
715 | |||
716 | /* 3x detected: absolutly sure now */ | ||
717 | if(j==3) { | ||
718 | dprintk("nicam is detected.\n"); | ||
719 | return 1; | ||
720 | } | ||
721 | |||
722 | /* wait a little bit for next reading status */ | ||
723 | msleep (10); | ||
724 | } | ||
725 | |||
726 | dprintk("nicam is not detected.\n"); | ||
727 | return 0; | ||
728 | } | ||
729 | |||
731 | void cx88_set_tvaudio(struct cx88_core *core) | 730 | void cx88_set_tvaudio(struct cx88_core *core) |
732 | { | 731 | { |
733 | switch (core->tvaudio) { | 732 | switch (core->tvaudio) { |
734 | case WW_BTSC: | 733 | case WW_BTSC: |
735 | set_audio_standard_BTSC(core, 0, EN_BTSC_AUTO_STEREO); | 734 | set_audio_standard_BTSC(core, 0, EN_BTSC_AUTO_STEREO); |
736 | break; | 735 | break; |
737 | case WW_NICAM_BGDKL: | 736 | case WW_BG: |
738 | set_audio_standard_NICAM_L(core,0); | 737 | case WW_DK: |
739 | break; | 738 | case WW_I: |
740 | case WW_NICAM_I: | 739 | case WW_L: |
741 | set_audio_standard_PAL_I(core,0); | 740 | /* prepare all dsp registers */ |
742 | break; | 741 | set_audio_standard_A2(core, EN_A2_FORCE_MONO1); |
743 | case WW_A2_BG: | 742 | |
744 | case WW_A2_DK: | 743 | /* set nicam mode - otherwise |
745 | case WW_A2_M: | 744 | AUD_NICAM_STATUS2 contains wrong values */ |
746 | set_audio_standard_A2(core, EN_A2_FORCE_MONO1); | 745 | set_audio_standard_NICAM(core, EN_NICAM_FORCE_MONO1); |
746 | if(0 == cx88_detect_nicam(core)) { | ||
747 | /* fall back to fm / am mono */ | ||
748 | set_audio_standard_A2(core, EN_A2_FORCE_MONO1); | ||
749 | core->use_nicam = 0; | ||
750 | } else { | ||
751 | core->use_nicam = 1; | ||
752 | } | ||
747 | break; | 753 | break; |
748 | case WW_EIAJ: | 754 | case WW_EIAJ: |
749 | set_audio_standard_EIAJ(core); | 755 | set_audio_standard_EIAJ(core); |
@@ -751,9 +757,6 @@ void cx88_set_tvaudio(struct cx88_core *core) | |||
751 | case WW_FM: | 757 | case WW_FM: |
752 | set_audio_standard_FM(core,FM_NO_DEEMPH); | 758 | set_audio_standard_FM(core,FM_NO_DEEMPH); |
753 | break; | 759 | break; |
754 | case WW_SYSTEM_L_AM: | ||
755 | set_audio_standard_NICAM_L(core, 1); | ||
756 | break; | ||
757 | case WW_NONE: | 760 | case WW_NONE: |
758 | default: | 761 | default: |
759 | printk("%s/0: unknown tv audio mode [%d]\n", | 762 | printk("%s/0: unknown tv audio mode [%d]\n", |
@@ -766,14 +769,6 @@ void cx88_set_tvaudio(struct cx88_core *core) | |||
766 | void cx88_newstation(struct cx88_core *core) | 769 | void cx88_newstation(struct cx88_core *core) |
767 | { | 770 | { |
768 | core->audiomode_manual = UNSET; | 771 | core->audiomode_manual = UNSET; |
769 | |||
770 | switch (core->tvaudio) { | ||
771 | case WW_SYSTEM_L_AM: | ||
772 | /* try nicam ... */ | ||
773 | core->audiomode_current = V4L2_TUNER_MODE_STEREO; | ||
774 | set_audio_standard_NICAM_L(core, 1); | ||
775 | break; | ||
776 | } | ||
777 | } | 772 | } |
778 | 773 | ||
779 | void cx88_get_stereo(struct cx88_core *core, struct v4l2_tuner *t) | 774 | void cx88_get_stereo(struct cx88_core *core, struct v4l2_tuner *t) |
@@ -879,58 +874,42 @@ void cx88_set_stereo(struct cx88_core *core, u32 mode, int manual) | |||
879 | break; | 874 | break; |
880 | } | 875 | } |
881 | break; | 876 | break; |
882 | case WW_A2_BG: | 877 | case WW_BG: |
883 | case WW_A2_DK: | 878 | case WW_DK: |
884 | case WW_A2_M: | 879 | case WW_I: |
885 | switch (mode) { | 880 | case WW_L: |
886 | case V4L2_TUNER_MODE_MONO: | 881 | if(1 == core->use_nicam) { |
887 | case V4L2_TUNER_MODE_LANG1: | 882 | switch (mode) { |
888 | set_audio_standard_A2(core, EN_A2_FORCE_MONO1); | 883 | case V4L2_TUNER_MODE_MONO: |
889 | break; | 884 | case V4L2_TUNER_MODE_LANG1: |
890 | case V4L2_TUNER_MODE_LANG2: | 885 | set_audio_standard_NICAM(core, EN_NICAM_FORCE_MONO1); |
891 | set_audio_standard_A2(core, EN_A2_FORCE_MONO2); | 886 | break; |
892 | break; | 887 | case V4L2_TUNER_MODE_LANG2: |
893 | case V4L2_TUNER_MODE_STEREO: | 888 | set_audio_standard_NICAM(core, EN_NICAM_FORCE_MONO2); |
894 | set_audio_standard_A2(core, EN_A2_FORCE_STEREO); | 889 | break; |
895 | break; | 890 | case V4L2_TUNER_MODE_STEREO: |
896 | } | 891 | set_audio_standard_NICAM(core, EN_NICAM_FORCE_STEREO); |
897 | break; | 892 | break; |
898 | case WW_NICAM_BGDKL: | 893 | } |
899 | switch (mode) { | 894 | } else { |
900 | case V4L2_TUNER_MODE_MONO: | 895 | if ( (core->tvaudio == WW_I) || (core->tvaudio == WW_L) ) { |
901 | ctl = EN_NICAM_FORCE_MONO1; | 896 | /* fall back to fm / am mono */ |
902 | mask = 0x3f; | 897 | set_audio_standard_A2(core, EN_A2_FORCE_MONO1); |
903 | break; | 898 | } else { |
904 | case V4L2_TUNER_MODE_LANG1: | 899 | /* TODO: Add A2 autodection */ |
905 | ctl = EN_NICAM_AUTO_MONO2; | 900 | switch (mode) { |
906 | mask = 0x3f; | 901 | case V4L2_TUNER_MODE_MONO: |
907 | break; | 902 | case V4L2_TUNER_MODE_LANG1: |
908 | case V4L2_TUNER_MODE_STEREO: | 903 | set_audio_standard_A2(core, EN_A2_FORCE_MONO1); |
909 | ctl = EN_NICAM_FORCE_STEREO | EN_DMTRX_LR; | 904 | break; |
910 | mask = 0x93f; | 905 | case V4L2_TUNER_MODE_LANG2: |
911 | break; | 906 | set_audio_standard_A2(core, EN_A2_FORCE_MONO2); |
912 | } | 907 | break; |
913 | break; | 908 | case V4L2_TUNER_MODE_STEREO: |
914 | case WW_SYSTEM_L_AM: | 909 | set_audio_standard_A2(core, EN_A2_FORCE_STEREO); |
915 | switch (mode) { | 910 | break; |
916 | case V4L2_TUNER_MODE_MONO: | 911 | } |
917 | case V4L2_TUNER_MODE_LANG1: /* FIXME */ | 912 | } |
918 | set_audio_standard_NICAM_L(core, 0); | ||
919 | break; | ||
920 | case V4L2_TUNER_MODE_STEREO: | ||
921 | set_audio_standard_NICAM_L(core, 1); | ||
922 | break; | ||
923 | } | ||
924 | break; | ||
925 | case WW_NICAM_I: | ||
926 | switch (mode) { | ||
927 | case V4L2_TUNER_MODE_MONO: | ||
928 | case V4L2_TUNER_MODE_LANG1: | ||
929 | set_audio_standard_PAL_I(core, 0); | ||
930 | break; | ||
931 | case V4L2_TUNER_MODE_STEREO: | ||
932 | set_audio_standard_PAL_I(core, 1); | ||
933 | break; | ||
934 | } | 913 | } |
935 | break; | 914 | break; |
936 | case WW_FM: | 915 | case WW_FM: |
diff --git a/drivers/media/video/cx88/cx88.h b/drivers/media/video/cx88/cx88.h index b18205b3fa24..3d885b4025d8 100644 --- a/drivers/media/video/cx88/cx88.h +++ b/drivers/media/video/cx88/cx88.h | |||
@@ -288,6 +288,7 @@ struct cx88_core { | |||
288 | u32 audiomode_current; | 288 | u32 audiomode_current; |
289 | u32 input; | 289 | u32 input; |
290 | u32 astat; | 290 | u32 astat; |
291 | u32 use_nicam; | ||
291 | 292 | ||
292 | /* IR remote control state */ | 293 | /* IR remote control state */ |
293 | struct cx88_IR *ir; | 294 | struct cx88_IR *ir; |
@@ -527,22 +528,20 @@ extern void cx88_card_setup(struct cx88_core *core); | |||
527 | 528 | ||
528 | #define WW_NONE 1 | 529 | #define WW_NONE 1 |
529 | #define WW_BTSC 2 | 530 | #define WW_BTSC 2 |
530 | #define WW_NICAM_I 3 | 531 | #define WW_BG 3 |
531 | #define WW_NICAM_BGDKL 4 | 532 | #define WW_DK 4 |
532 | #define WW_A1 5 | 533 | #define WW_I 5 |
533 | #define WW_A2_BG 6 | 534 | #define WW_L 6 |
534 | #define WW_A2_DK 7 | 535 | #define WW_EIAJ 7 |
535 | #define WW_A2_M 8 | 536 | #define WW_I2SPT 8 |
536 | #define WW_EIAJ 9 | 537 | #define WW_FM 9 |
537 | #define WW_SYSTEM_L_AM 10 | ||
538 | #define WW_I2SPT 11 | ||
539 | #define WW_FM 12 | ||
540 | 538 | ||
541 | void cx88_set_tvaudio(struct cx88_core *core); | 539 | void cx88_set_tvaudio(struct cx88_core *core); |
542 | void cx88_newstation(struct cx88_core *core); | 540 | void cx88_newstation(struct cx88_core *core); |
543 | void cx88_get_stereo(struct cx88_core *core, struct v4l2_tuner *t); | 541 | void cx88_get_stereo(struct cx88_core *core, struct v4l2_tuner *t); |
544 | void cx88_set_stereo(struct cx88_core *core, u32 mode, int manual); | 542 | void cx88_set_stereo(struct cx88_core *core, u32 mode, int manual); |
545 | int cx88_audio_thread(void *data); | 543 | int cx88_audio_thread(void *data); |
544 | int cx88_detect_nicam(struct cx88_core *core); | ||
546 | 545 | ||
547 | /* ----------------------------------------------------------- */ | 546 | /* ----------------------------------------------------------- */ |
548 | /* cx88-input.c */ | 547 | /* cx88-input.c */ |