Merge branch 'master' of master.kernel.org:/pub/scm/linux/kernel/git/davem/net-2.6

* 'master' of master.kernel.org:/pub/scm/linux/kernel/git/davem/net-2.6:
  [PKTGEN]: Remove write-only variable.
  [NETFILTER]: xt_tcpudp: fix wrong struct in udp_checkentry
  [NET_SCHED] sch_prio.c: remove duplicate call of tc_classify()
  [BRIDGE]: Fix OOPS when bridging device without ethtool.
  [BRIDGE]: Packets leaking out of disabled/blocked ports.
  [TCP]: Allow minimum RTO to be configurable via routing metrics.
  SCTP: Fix to handle invalid parameter length correctly
  SCTP: Abort on COOKIE-ECHO if backlog is exceeded.
  SCTP: Correctly disable listening when backlog is 0.
  SCTP: Do not retransmit chunks that are newer then rtt.
  SCTP: Uncomfirmed transports can't become Inactive
  SCTP: Pick the correct port when binding to 0.
  SCTP: Use net_ratelimit to suppress error messages print too fast
  SCTP: Fix to encode PROTOCOL VIOLATION error cause correctly
  SCTP: Fix sctp_addto_chunk() to add pad with correct length
  SCTP: Assign stream sequence numbers to the entire message
  SCTP: properly clean up fragment and ordering queues during FWD-TSN.
  [PKTGEN]: Fix multiqueue oops.
  [BNX2]: Add write posting comment.
  [BNX2]: Use msleep().

1 files changed, 6 insertions, 4 deletions

diff --git a/drivers/net/bnx2.c b/drivers/net/bnx2.c
index 24e7f9ab3f5a..854d80c330ec 100644
--- a/drivers/net/bnx2.c
+++ b/drivers/net/bnx2.c
@@ -3934,11 +3934,13 @@ bnx2_reset_chip(struct bnx2 *bp, u32 reset_code)
                 /* Chip reset. */
                 REG_WR(bp, BNX2_PCICFG_MISC_CONFIG, val);
 
+                /* Reading back any register after chip reset will hang the
+                 * bus on 5706 A0 and A1.  The msleep below provides plenty
+                 * of margin for write posting.
+                 */
                 if ((CHIP_ID(bp) == CHIP_ID_5706_A0) ||
-                    (CHIP_ID(bp) == CHIP_ID_5706_A1)) {
-                        current->state = TASK_UNINTERRUPTIBLE;
-                        schedule_timeout(HZ / 50);
-                }
+                    (CHIP_ID(bp) == CHIP_ID_5706_A1))
+                        msleep(20);
 
                 /* Reset takes approximate 30 usec */
                 for (i = 0; i < 10; i++) {