diff options
author | Jack Morgenstein <jackm@dev.mellanox.co.il> | 2007-12-09 22:25:23 -0500 |
---|---|---|
committer | Roland Dreier <rolandd@cisco.com> | 2008-01-25 17:15:29 -0500 |
commit | 5920869f1ec263fee4255ec71d333c118406a419 (patch) | |
tree | f9d4c2739feb0c110a65a690b09f323ef5212221 /drivers | |
parent | 3c8450860ba9d6279dbc969633eacf99161860d9 (diff) |
mlx4_core: Fix max_eqs masking in QUERY_DEV_CAP
log_max_eqs is a 4-bit field, not a 3-bit field in the response to the
QUERY_DEV_CAP FW command, so we should mask with 0xf instead of 0x7
when reading it.
Found by Yossi Leybovitch of Mellanox.
Signed-off-by: Jack Morgenstein <jackm@dev.mellanox.co.il>
Signed-off-by: Roland Dreier <rolandd@cisco.com>
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/net/mlx4/fw.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/net/mlx4/fw.c b/drivers/net/mlx4/fw.c index 50648738d679..535a4461d88c 100644 --- a/drivers/net/mlx4/fw.c +++ b/drivers/net/mlx4/fw.c | |||
@@ -202,7 +202,7 @@ int mlx4_QUERY_DEV_CAP(struct mlx4_dev *dev, struct mlx4_dev_cap *dev_cap) | |||
202 | MLX4_GET(field, outbox, QUERY_DEV_CAP_RSVD_EQ_OFFSET); | 202 | MLX4_GET(field, outbox, QUERY_DEV_CAP_RSVD_EQ_OFFSET); |
203 | dev_cap->reserved_eqs = 1 << (field & 0xf); | 203 | dev_cap->reserved_eqs = 1 << (field & 0xf); |
204 | MLX4_GET(field, outbox, QUERY_DEV_CAP_MAX_EQ_OFFSET); | 204 | MLX4_GET(field, outbox, QUERY_DEV_CAP_MAX_EQ_OFFSET); |
205 | dev_cap->max_eqs = 1 << (field & 0x7); | 205 | dev_cap->max_eqs = 1 << (field & 0xf); |
206 | MLX4_GET(field, outbox, QUERY_DEV_CAP_RSVD_MTT_OFFSET); | 206 | MLX4_GET(field, outbox, QUERY_DEV_CAP_RSVD_MTT_OFFSET); |
207 | dev_cap->reserved_mtts = 1 << (field >> 4); | 207 | dev_cap->reserved_mtts = 1 << (field >> 4); |
208 | MLX4_GET(field, outbox, QUERY_DEV_CAP_MAX_MRW_SZ_OFFSET); | 208 | MLX4_GET(field, outbox, QUERY_DEV_CAP_MAX_MRW_SZ_OFFSET); |