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authorLinus Torvalds <torvalds@linux-foundation.org>2010-03-07 18:59:39 -0500
committerLinus Torvalds <torvalds@linux-foundation.org>2010-03-07 18:59:39 -0500
commit322aafa6645a48c3b7837ca7385f126ab78127fd (patch)
tree50f6665aedcf051cecd571183df81ba7f248014b /drivers
parentdd04265b028c00c365a78f9ff78a05e217f98656 (diff)
parentc7bbf52aa4fa332b84c4f2bb33e69561ee6870b4 (diff)
Merge branch 'x86-mrst-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip
* 'x86-mrst-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: (30 commits) x86, mrst: Fix whitespace breakage in apb_timer.c x86, mrst: Fix APB timer per cpu clockevent x86, mrst: Remove X86_MRST dependency on PCI_IOAPIC x86, olpc: Use pci subarch init for OLPC x86, pci: Add arch_init to x86_init abstraction x86, mrst: Add Kconfig dependencies for Moorestown x86, pci: Exclude Moorestown PCI code if CONFIG_X86_MRST=n x86, numaq: Make CONFIG_X86_NUMAQ depend on CONFIG_PCI x86, pci: Add sanity check for PCI fixed bar probing x86, legacy_irq: Remove duplicate vector assigment x86, legacy_irq: Remove left over nr_legacy_irqs x86, mrst: Platform clock setup code x86, apbt: Moorestown APB system timer driver x86, mrst: Add vrtc platform data setup code x86, mrst: Add platform timer info parsing code x86, mrst: Fill in PCI functions in x86_init layer x86, mrst: Add dummy legacy pic to platform setup x86/PCI: Moorestown PCI support x86, ioapic: Add dummy ioapic functions x86, ioapic: Early enable ioapic for timer irq ... Fixed up semantic conflict of new clocksources due to commit 17622339af25 ("clocksource: add argument to resume callback").
Diffstat (limited to 'drivers')
-rw-r--r--drivers/pci/pci.c43
1 files changed, 43 insertions, 0 deletions
diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
index 5b548aee9cbc..77b493b3d97b 100644
--- a/drivers/pci/pci.c
+++ b/drivers/pci/pci.c
@@ -303,6 +303,49 @@ int pci_find_ext_capability(struct pci_dev *dev, int cap)
303} 303}
304EXPORT_SYMBOL_GPL(pci_find_ext_capability); 304EXPORT_SYMBOL_GPL(pci_find_ext_capability);
305 305
306/**
307 * pci_bus_find_ext_capability - find an extended capability
308 * @bus: the PCI bus to query
309 * @devfn: PCI device to query
310 * @cap: capability code
311 *
312 * Like pci_find_ext_capability() but works for pci devices that do not have a
313 * pci_dev structure set up yet.
314 *
315 * Returns the address of the requested capability structure within the
316 * device's PCI configuration space or 0 in case the device does not
317 * support it.
318 */
319int pci_bus_find_ext_capability(struct pci_bus *bus, unsigned int devfn,
320 int cap)
321{
322 u32 header;
323 int ttl;
324 int pos = PCI_CFG_SPACE_SIZE;
325
326 /* minimum 8 bytes per capability */
327 ttl = (PCI_CFG_SPACE_EXP_SIZE - PCI_CFG_SPACE_SIZE) / 8;
328
329 if (!pci_bus_read_config_dword(bus, devfn, pos, &header))
330 return 0;
331 if (header == 0xffffffff || header == 0)
332 return 0;
333
334 while (ttl-- > 0) {
335 if (PCI_EXT_CAP_ID(header) == cap)
336 return pos;
337
338 pos = PCI_EXT_CAP_NEXT(header);
339 if (pos < PCI_CFG_SPACE_SIZE)
340 break;
341
342 if (!pci_bus_read_config_dword(bus, devfn, pos, &header))
343 break;
344 }
345
346 return 0;
347}
348
306static int __pci_find_next_ht_cap(struct pci_dev *dev, int pos, int ht_cap) 349static int __pci_find_next_ht_cap(struct pci_dev *dev, int pos, int ht_cap)
307{ 350{
308 int rc, ttl = PCI_FIND_CAP_TTL; 351 int rc, ttl = PCI_FIND_CAP_TTL;