diff options
author | Kumar Gala <galak@kernel.crashing.org> | 2008-06-12 09:05:09 -0400 |
---|---|---|
committer | Kumar Gala <galak@kernel.crashing.org> | 2008-06-26 02:49:04 -0400 |
commit | 0b2a2e5b7747f1f63bd86ca22b5c6097da5b2137 (patch) | |
tree | ddced4b9da7e9b470f2a64962dc0c85e6190c83a /drivers | |
parent | 0d8440657ef184907ac5add0b59c771ee8e8a77f (diff) |
cpm_uart: Remove !CONFIG_PPC_CPM_NEW_BINDING code
Now that arch/ppc is gone we always define CONFIG_PPC_CPM_NEW_BINDING so
we can remove all the code associated with !CONFIG_PPC_CPM_NEW_BINDING.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/serial/cpm_uart/cpm_uart.h | 3 | ||||
-rw-r--r-- | drivers/serial/cpm_uart/cpm_uart_core.c | 371 | ||||
-rw-r--r-- | drivers/serial/cpm_uart/cpm_uart_cpm1.c | 168 | ||||
-rw-r--r-- | drivers/serial/cpm_uart/cpm_uart_cpm1.h | 10 | ||||
-rw-r--r-- | drivers/serial/cpm_uart/cpm_uart_cpm2.c | 277 | ||||
-rw-r--r-- | drivers/serial/cpm_uart/cpm_uart_cpm2.h | 10 |
6 files changed, 1 insertions, 838 deletions
diff --git a/drivers/serial/cpm_uart/cpm_uart.h b/drivers/serial/cpm_uart/cpm_uart.h index 3d07bec06fad..5c76e0ae0582 100644 --- a/drivers/serial/cpm_uart/cpm_uart.h +++ b/drivers/serial/cpm_uart/cpm_uart.h | |||
@@ -84,9 +84,6 @@ struct uart_cpm_port { | |||
84 | u32 command; | 84 | u32 command; |
85 | }; | 85 | }; |
86 | 86 | ||
87 | #ifndef CONFIG_PPC_CPM_NEW_BINDING | ||
88 | extern int cpm_uart_port_map[UART_NR]; | ||
89 | #endif | ||
90 | extern int cpm_uart_nr; | 87 | extern int cpm_uart_nr; |
91 | extern struct uart_cpm_port cpm_uart_ports[UART_NR]; | 88 | extern struct uart_cpm_port cpm_uart_ports[UART_NR]; |
92 | 89 | ||
diff --git a/drivers/serial/cpm_uart/cpm_uart_core.c b/drivers/serial/cpm_uart/cpm_uart_core.c index b0104caefa1f..43f58dc69fc9 100644 --- a/drivers/serial/cpm_uart/cpm_uart_core.c +++ b/drivers/serial/cpm_uart/cpm_uart_core.c | |||
@@ -42,6 +42,7 @@ | |||
42 | #include <linux/bootmem.h> | 42 | #include <linux/bootmem.h> |
43 | #include <linux/dma-mapping.h> | 43 | #include <linux/dma-mapping.h> |
44 | #include <linux/fs_uart_pd.h> | 44 | #include <linux/fs_uart_pd.h> |
45 | #include <linux/of_platform.h> | ||
45 | 46 | ||
46 | #include <asm/io.h> | 47 | #include <asm/io.h> |
47 | #include <asm/irq.h> | 48 | #include <asm/irq.h> |
@@ -49,10 +50,6 @@ | |||
49 | #include <asm/fs_pd.h> | 50 | #include <asm/fs_pd.h> |
50 | #include <asm/udbg.h> | 51 | #include <asm/udbg.h> |
51 | 52 | ||
52 | #ifdef CONFIG_PPC_CPM_NEW_BINDING | ||
53 | #include <linux/of_platform.h> | ||
54 | #endif | ||
55 | |||
56 | #if defined(CONFIG_SERIAL_CPM_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) | 53 | #if defined(CONFIG_SERIAL_CPM_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) |
57 | #define SUPPORT_SYSRQ | 54 | #define SUPPORT_SYSRQ |
58 | #endif | 55 | #endif |
@@ -72,59 +69,6 @@ static void cpm_uart_initbd(struct uart_cpm_port *pinfo); | |||
72 | 69 | ||
73 | /**************************************************************/ | 70 | /**************************************************************/ |
74 | 71 | ||
75 | #ifndef CONFIG_PPC_CPM_NEW_BINDING | ||
76 | /* Track which ports are configured as uarts */ | ||
77 | int cpm_uart_port_map[UART_NR]; | ||
78 | /* How many ports did we config as uarts */ | ||
79 | int cpm_uart_nr; | ||
80 | |||
81 | /* Place-holder for board-specific stuff */ | ||
82 | struct platform_device* __attribute__ ((weak)) __init | ||
83 | early_uart_get_pdev(int index) | ||
84 | { | ||
85 | return NULL; | ||
86 | } | ||
87 | |||
88 | |||
89 | static void cpm_uart_count(void) | ||
90 | { | ||
91 | cpm_uart_nr = 0; | ||
92 | #ifdef CONFIG_SERIAL_CPM_SMC1 | ||
93 | cpm_uart_port_map[cpm_uart_nr++] = UART_SMC1; | ||
94 | #endif | ||
95 | #ifdef CONFIG_SERIAL_CPM_SMC2 | ||
96 | cpm_uart_port_map[cpm_uart_nr++] = UART_SMC2; | ||
97 | #endif | ||
98 | #ifdef CONFIG_SERIAL_CPM_SCC1 | ||
99 | cpm_uart_port_map[cpm_uart_nr++] = UART_SCC1; | ||
100 | #endif | ||
101 | #ifdef CONFIG_SERIAL_CPM_SCC2 | ||
102 | cpm_uart_port_map[cpm_uart_nr++] = UART_SCC2; | ||
103 | #endif | ||
104 | #ifdef CONFIG_SERIAL_CPM_SCC3 | ||
105 | cpm_uart_port_map[cpm_uart_nr++] = UART_SCC3; | ||
106 | #endif | ||
107 | #ifdef CONFIG_SERIAL_CPM_SCC4 | ||
108 | cpm_uart_port_map[cpm_uart_nr++] = UART_SCC4; | ||
109 | #endif | ||
110 | } | ||
111 | |||
112 | /* Get UART number by its id */ | ||
113 | static int cpm_uart_id2nr(int id) | ||
114 | { | ||
115 | int i; | ||
116 | if (id < UART_NR) { | ||
117 | for (i=0; i<UART_NR; i++) { | ||
118 | if (cpm_uart_port_map[i] == id) | ||
119 | return i; | ||
120 | } | ||
121 | } | ||
122 | |||
123 | /* not found or invalid argument */ | ||
124 | return -1; | ||
125 | } | ||
126 | #endif | ||
127 | |||
128 | /* | 72 | /* |
129 | * Check, if transmit buffers are processed | 73 | * Check, if transmit buffers are processed |
130 | */ | 74 | */ |
@@ -935,7 +879,6 @@ static struct uart_ops cpm_uart_pops = { | |||
935 | .verify_port = cpm_uart_verify_port, | 879 | .verify_port = cpm_uart_verify_port, |
936 | }; | 880 | }; |
937 | 881 | ||
938 | #ifdef CONFIG_PPC_CPM_NEW_BINDING | ||
939 | struct uart_cpm_port cpm_uart_ports[UART_NR]; | 882 | struct uart_cpm_port cpm_uart_ports[UART_NR]; |
940 | 883 | ||
941 | static int cpm_uart_init_port(struct device_node *np, | 884 | static int cpm_uart_init_port(struct device_node *np, |
@@ -1012,153 +955,6 @@ out_mem: | |||
1012 | return ret; | 955 | return ret; |
1013 | } | 956 | } |
1014 | 957 | ||
1015 | #else | ||
1016 | |||
1017 | struct uart_cpm_port cpm_uart_ports[UART_NR] = { | ||
1018 | [UART_SMC1] = { | ||
1019 | .port = { | ||
1020 | .irq = SMC1_IRQ, | ||
1021 | .ops = &cpm_uart_pops, | ||
1022 | .iotype = UPIO_MEM, | ||
1023 | .lock = __SPIN_LOCK_UNLOCKED(cpm_uart_ports[UART_SMC1].port.lock), | ||
1024 | }, | ||
1025 | .flags = FLAG_SMC, | ||
1026 | .tx_nrfifos = TX_NUM_FIFO, | ||
1027 | .tx_fifosize = TX_BUF_SIZE, | ||
1028 | .rx_nrfifos = RX_NUM_FIFO, | ||
1029 | .rx_fifosize = RX_BUF_SIZE, | ||
1030 | .set_lineif = smc1_lineif, | ||
1031 | }, | ||
1032 | [UART_SMC2] = { | ||
1033 | .port = { | ||
1034 | .irq = SMC2_IRQ, | ||
1035 | .ops = &cpm_uart_pops, | ||
1036 | .iotype = UPIO_MEM, | ||
1037 | .lock = __SPIN_LOCK_UNLOCKED(cpm_uart_ports[UART_SMC2].port.lock), | ||
1038 | }, | ||
1039 | .flags = FLAG_SMC, | ||
1040 | .tx_nrfifos = TX_NUM_FIFO, | ||
1041 | .tx_fifosize = TX_BUF_SIZE, | ||
1042 | .rx_nrfifos = RX_NUM_FIFO, | ||
1043 | .rx_fifosize = RX_BUF_SIZE, | ||
1044 | .set_lineif = smc2_lineif, | ||
1045 | #ifdef CONFIG_SERIAL_CPM_ALT_SMC2 | ||
1046 | .is_portb = 1, | ||
1047 | #endif | ||
1048 | }, | ||
1049 | [UART_SCC1] = { | ||
1050 | .port = { | ||
1051 | .irq = SCC1_IRQ, | ||
1052 | .ops = &cpm_uart_pops, | ||
1053 | .iotype = UPIO_MEM, | ||
1054 | .lock = __SPIN_LOCK_UNLOCKED(cpm_uart_ports[UART_SCC1].port.lock), | ||
1055 | }, | ||
1056 | .tx_nrfifos = TX_NUM_FIFO, | ||
1057 | .tx_fifosize = TX_BUF_SIZE, | ||
1058 | .rx_nrfifos = RX_NUM_FIFO, | ||
1059 | .rx_fifosize = RX_BUF_SIZE, | ||
1060 | .set_lineif = scc1_lineif, | ||
1061 | .wait_closing = SCC_WAIT_CLOSING, | ||
1062 | }, | ||
1063 | [UART_SCC2] = { | ||
1064 | .port = { | ||
1065 | .irq = SCC2_IRQ, | ||
1066 | .ops = &cpm_uart_pops, | ||
1067 | .iotype = UPIO_MEM, | ||
1068 | .lock = __SPIN_LOCK_UNLOCKED(cpm_uart_ports[UART_SCC2].port.lock), | ||
1069 | }, | ||
1070 | .tx_nrfifos = TX_NUM_FIFO, | ||
1071 | .tx_fifosize = TX_BUF_SIZE, | ||
1072 | .rx_nrfifos = RX_NUM_FIFO, | ||
1073 | .rx_fifosize = RX_BUF_SIZE, | ||
1074 | .set_lineif = scc2_lineif, | ||
1075 | .wait_closing = SCC_WAIT_CLOSING, | ||
1076 | }, | ||
1077 | [UART_SCC3] = { | ||
1078 | .port = { | ||
1079 | .irq = SCC3_IRQ, | ||
1080 | .ops = &cpm_uart_pops, | ||
1081 | .iotype = UPIO_MEM, | ||
1082 | .lock = __SPIN_LOCK_UNLOCKED(cpm_uart_ports[UART_SCC3].port.lock), | ||
1083 | }, | ||
1084 | .tx_nrfifos = TX_NUM_FIFO, | ||
1085 | .tx_fifosize = TX_BUF_SIZE, | ||
1086 | .rx_nrfifos = RX_NUM_FIFO, | ||
1087 | .rx_fifosize = RX_BUF_SIZE, | ||
1088 | .set_lineif = scc3_lineif, | ||
1089 | .wait_closing = SCC_WAIT_CLOSING, | ||
1090 | }, | ||
1091 | [UART_SCC4] = { | ||
1092 | .port = { | ||
1093 | .irq = SCC4_IRQ, | ||
1094 | .ops = &cpm_uart_pops, | ||
1095 | .iotype = UPIO_MEM, | ||
1096 | .lock = __SPIN_LOCK_UNLOCKED(cpm_uart_ports[UART_SCC4].port.lock), | ||
1097 | }, | ||
1098 | .tx_nrfifos = TX_NUM_FIFO, | ||
1099 | .tx_fifosize = TX_BUF_SIZE, | ||
1100 | .rx_nrfifos = RX_NUM_FIFO, | ||
1101 | .rx_fifosize = RX_BUF_SIZE, | ||
1102 | .set_lineif = scc4_lineif, | ||
1103 | .wait_closing = SCC_WAIT_CLOSING, | ||
1104 | }, | ||
1105 | }; | ||
1106 | |||
1107 | int cpm_uart_drv_get_platform_data(struct platform_device *pdev, int is_con) | ||
1108 | { | ||
1109 | struct resource *r; | ||
1110 | struct fs_uart_platform_info *pdata = pdev->dev.platform_data; | ||
1111 | int idx; /* It is UART_SMCx or UART_SCCx index */ | ||
1112 | struct uart_cpm_port *pinfo; | ||
1113 | int line; | ||
1114 | u32 mem, pram; | ||
1115 | |||
1116 | idx = pdata->fs_no = fs_uart_get_id(pdata); | ||
1117 | |||
1118 | line = cpm_uart_id2nr(idx); | ||
1119 | if(line < 0) { | ||
1120 | printk(KERN_ERR"%s(): port %d is not registered", __func__, idx); | ||
1121 | return -EINVAL; | ||
1122 | } | ||
1123 | |||
1124 | pinfo = (struct uart_cpm_port *) &cpm_uart_ports[idx]; | ||
1125 | |||
1126 | pinfo->brg = pdata->brg; | ||
1127 | |||
1128 | if (!is_con) { | ||
1129 | pinfo->port.line = line; | ||
1130 | pinfo->port.flags = UPF_BOOT_AUTOCONF; | ||
1131 | } | ||
1132 | |||
1133 | if (!(r = platform_get_resource_byname(pdev, IORESOURCE_MEM, "regs"))) | ||
1134 | return -EINVAL; | ||
1135 | mem = (u32)ioremap(r->start, r->end - r->start + 1); | ||
1136 | |||
1137 | if (!(r = platform_get_resource_byname(pdev, IORESOURCE_MEM, "pram"))) | ||
1138 | return -EINVAL; | ||
1139 | pram = (u32)ioremap(r->start, r->end - r->start + 1); | ||
1140 | |||
1141 | if(idx > fsid_smc2_uart) { | ||
1142 | pinfo->sccp = (scc_t *)mem; | ||
1143 | pinfo->sccup = (scc_uart_t *)pram; | ||
1144 | } else { | ||
1145 | pinfo->smcp = (smc_t *)mem; | ||
1146 | pinfo->smcup = (smc_uart_t *)pram; | ||
1147 | } | ||
1148 | pinfo->tx_nrfifos = pdata->tx_num_fifo; | ||
1149 | pinfo->tx_fifosize = pdata->tx_buf_size; | ||
1150 | |||
1151 | pinfo->rx_nrfifos = pdata->rx_num_fifo; | ||
1152 | pinfo->rx_fifosize = pdata->rx_buf_size; | ||
1153 | |||
1154 | pinfo->port.uartclk = pdata->uart_clk; | ||
1155 | pinfo->port.mapbase = (unsigned long)mem; | ||
1156 | pinfo->port.irq = platform_get_irq(pdev, 0); | ||
1157 | |||
1158 | return 0; | ||
1159 | } | ||
1160 | #endif | ||
1161 | |||
1162 | #ifdef CONFIG_SERIAL_CPM_CONSOLE | 958 | #ifdef CONFIG_SERIAL_CPM_CONSOLE |
1163 | /* | 959 | /* |
1164 | * Print a string to the serial port trying not to disturb | 960 | * Print a string to the serial port trying not to disturb |
@@ -1169,12 +965,7 @@ int cpm_uart_drv_get_platform_data(struct platform_device *pdev, int is_con) | |||
1169 | static void cpm_uart_console_write(struct console *co, const char *s, | 965 | static void cpm_uart_console_write(struct console *co, const char *s, |
1170 | u_int count) | 966 | u_int count) |
1171 | { | 967 | { |
1172 | #ifdef CONFIG_PPC_CPM_NEW_BINDING | ||
1173 | struct uart_cpm_port *pinfo = &cpm_uart_ports[co->index]; | 968 | struct uart_cpm_port *pinfo = &cpm_uart_ports[co->index]; |
1174 | #else | ||
1175 | struct uart_cpm_port *pinfo = | ||
1176 | &cpm_uart_ports[cpm_uart_port_map[co->index]]; | ||
1177 | #endif | ||
1178 | unsigned int i; | 969 | unsigned int i; |
1179 | cbd_t __iomem *bdp, *bdbase; | 970 | cbd_t __iomem *bdp, *bdbase; |
1180 | unsigned char *cp; | 971 | unsigned char *cp; |
@@ -1252,7 +1043,6 @@ static int __init cpm_uart_console_setup(struct console *co, char *options) | |||
1252 | struct uart_cpm_port *pinfo; | 1043 | struct uart_cpm_port *pinfo; |
1253 | struct uart_port *port; | 1044 | struct uart_port *port; |
1254 | 1045 | ||
1255 | #ifdef CONFIG_PPC_CPM_NEW_BINDING | ||
1256 | struct device_node *np = NULL; | 1046 | struct device_node *np = NULL; |
1257 | int i = 0; | 1047 | int i = 0; |
1258 | 1048 | ||
@@ -1284,35 +1074,6 @@ static int __init cpm_uart_console_setup(struct console *co, char *options) | |||
1284 | if (ret) | 1074 | if (ret) |
1285 | return ret; | 1075 | return ret; |
1286 | 1076 | ||
1287 | #else | ||
1288 | |||
1289 | struct fs_uart_platform_info *pdata; | ||
1290 | struct platform_device* pdev = early_uart_get_pdev(co->index); | ||
1291 | |||
1292 | if (!pdev) { | ||
1293 | pr_info("cpm_uart: console: compat mode\n"); | ||
1294 | /* compatibility - will be cleaned up */ | ||
1295 | cpm_uart_init_portdesc(); | ||
1296 | } | ||
1297 | |||
1298 | port = | ||
1299 | (struct uart_port *)&cpm_uart_ports[cpm_uart_port_map[co->index]]; | ||
1300 | pinfo = (struct uart_cpm_port *)port; | ||
1301 | if (!pdev) { | ||
1302 | if (pinfo->set_lineif) | ||
1303 | pinfo->set_lineif(pinfo); | ||
1304 | } else { | ||
1305 | pdata = pdev->dev.platform_data; | ||
1306 | if (pdata) | ||
1307 | if (pdata->init_ioports) | ||
1308 | pdata->init_ioports(pdata); | ||
1309 | |||
1310 | cpm_uart_drv_get_platform_data(pdev, 1); | ||
1311 | } | ||
1312 | |||
1313 | pinfo->flags |= FLAG_CONSOLE; | ||
1314 | #endif | ||
1315 | |||
1316 | if (options) { | 1077 | if (options) { |
1317 | uart_parse_options(options, &baud, &parity, &bits, &flow); | 1078 | uart_parse_options(options, &baud, &parity, &bits, &flow); |
1318 | } else { | 1079 | } else { |
@@ -1386,7 +1147,6 @@ static struct uart_driver cpm_reg = { | |||
1386 | .nr = UART_NR, | 1147 | .nr = UART_NR, |
1387 | }; | 1148 | }; |
1388 | 1149 | ||
1389 | #ifdef CONFIG_PPC_CPM_NEW_BINDING | ||
1390 | static int probe_index; | 1150 | static int probe_index; |
1391 | 1151 | ||
1392 | static int __devinit cpm_uart_probe(struct of_device *ofdev, | 1152 | static int __devinit cpm_uart_probe(struct of_device *ofdev, |
@@ -1457,135 +1217,6 @@ static void __exit cpm_uart_exit(void) | |||
1457 | of_unregister_platform_driver(&cpm_uart_driver); | 1217 | of_unregister_platform_driver(&cpm_uart_driver); |
1458 | uart_unregister_driver(&cpm_reg); | 1218 | uart_unregister_driver(&cpm_reg); |
1459 | } | 1219 | } |
1460 | #else | ||
1461 | static int cpm_uart_drv_probe(struct device *dev) | ||
1462 | { | ||
1463 | struct platform_device *pdev = to_platform_device(dev); | ||
1464 | struct fs_uart_platform_info *pdata; | ||
1465 | int ret = -ENODEV; | ||
1466 | |||
1467 | if(!pdev) { | ||
1468 | printk(KERN_ERR"CPM UART: platform data missing!\n"); | ||
1469 | return ret; | ||
1470 | } | ||
1471 | |||
1472 | pdata = pdev->dev.platform_data; | ||
1473 | |||
1474 | if ((ret = cpm_uart_drv_get_platform_data(pdev, 0))) | ||
1475 | return ret; | ||
1476 | |||
1477 | pr_debug("cpm_uart_drv_probe: Adding CPM UART %d\n", cpm_uart_id2nr(pdata->fs_no)); | ||
1478 | |||
1479 | if (pdata->init_ioports) | ||
1480 | pdata->init_ioports(pdata); | ||
1481 | |||
1482 | ret = uart_add_one_port(&cpm_reg, &cpm_uart_ports[pdata->fs_no].port); | ||
1483 | |||
1484 | return ret; | ||
1485 | } | ||
1486 | |||
1487 | static int cpm_uart_drv_remove(struct device *dev) | ||
1488 | { | ||
1489 | struct platform_device *pdev = to_platform_device(dev); | ||
1490 | struct fs_uart_platform_info *pdata = pdev->dev.platform_data; | ||
1491 | |||
1492 | pr_debug("cpm_uart_drv_remove: Removing CPM UART %d\n", | ||
1493 | cpm_uart_id2nr(pdata->fs_no)); | ||
1494 | |||
1495 | uart_remove_one_port(&cpm_reg, &cpm_uart_ports[pdata->fs_no].port); | ||
1496 | return 0; | ||
1497 | } | ||
1498 | |||
1499 | static struct device_driver cpm_smc_uart_driver = { | ||
1500 | .name = "fsl-cpm-smc:uart", | ||
1501 | .bus = &platform_bus_type, | ||
1502 | .probe = cpm_uart_drv_probe, | ||
1503 | .remove = cpm_uart_drv_remove, | ||
1504 | }; | ||
1505 | |||
1506 | static struct device_driver cpm_scc_uart_driver = { | ||
1507 | .name = "fsl-cpm-scc:uart", | ||
1508 | .bus = &platform_bus_type, | ||
1509 | .probe = cpm_uart_drv_probe, | ||
1510 | .remove = cpm_uart_drv_remove, | ||
1511 | }; | ||
1512 | |||
1513 | /* | ||
1514 | This is supposed to match uart devices on platform bus, | ||
1515 | */ | ||
1516 | static int match_is_uart (struct device* dev, void* data) | ||
1517 | { | ||
1518 | struct platform_device* pdev = container_of(dev, struct platform_device, dev); | ||
1519 | int ret = 0; | ||
1520 | /* this was setfunc as uart */ | ||
1521 | if(strstr(pdev->name,":uart")) { | ||
1522 | ret = 1; | ||
1523 | } | ||
1524 | return ret; | ||
1525 | } | ||
1526 | |||
1527 | |||
1528 | static int cpm_uart_init(void) { | ||
1529 | |||
1530 | int ret; | ||
1531 | int i; | ||
1532 | struct device *dev; | ||
1533 | printk(KERN_INFO "Serial: CPM driver $Revision: 0.02 $\n"); | ||
1534 | |||
1535 | /* lookup the bus for uart devices */ | ||
1536 | dev = bus_find_device(&platform_bus_type, NULL, 0, match_is_uart); | ||
1537 | |||
1538 | /* There are devices on the bus - all should be OK */ | ||
1539 | if (dev) { | ||
1540 | cpm_uart_count(); | ||
1541 | cpm_reg.nr = cpm_uart_nr; | ||
1542 | |||
1543 | if (!(ret = uart_register_driver(&cpm_reg))) { | ||
1544 | if ((ret = driver_register(&cpm_smc_uart_driver))) { | ||
1545 | uart_unregister_driver(&cpm_reg); | ||
1546 | return ret; | ||
1547 | } | ||
1548 | if ((ret = driver_register(&cpm_scc_uart_driver))) { | ||
1549 | driver_unregister(&cpm_scc_uart_driver); | ||
1550 | uart_unregister_driver(&cpm_reg); | ||
1551 | } | ||
1552 | } | ||
1553 | } else { | ||
1554 | /* No capable platform devices found - falling back to legacy mode */ | ||
1555 | pr_info("cpm_uart: WARNING: no UART devices found on platform bus!\n"); | ||
1556 | pr_info( | ||
1557 | "cpm_uart: the driver will guess configuration, but this mode is no longer supported.\n"); | ||
1558 | |||
1559 | /* Don't run this again, if the console driver did it already */ | ||
1560 | if (cpm_uart_nr == 0) | ||
1561 | cpm_uart_init_portdesc(); | ||
1562 | |||
1563 | cpm_reg.nr = cpm_uart_nr; | ||
1564 | ret = uart_register_driver(&cpm_reg); | ||
1565 | |||
1566 | if (ret) | ||
1567 | return ret; | ||
1568 | |||
1569 | for (i = 0; i < cpm_uart_nr; i++) { | ||
1570 | int con = cpm_uart_port_map[i]; | ||
1571 | cpm_uart_ports[con].port.line = i; | ||
1572 | cpm_uart_ports[con].port.flags = UPF_BOOT_AUTOCONF; | ||
1573 | if (cpm_uart_ports[con].set_lineif) | ||
1574 | cpm_uart_ports[con].set_lineif(&cpm_uart_ports[con]); | ||
1575 | uart_add_one_port(&cpm_reg, &cpm_uart_ports[con].port); | ||
1576 | } | ||
1577 | |||
1578 | } | ||
1579 | return ret; | ||
1580 | } | ||
1581 | |||
1582 | static void __exit cpm_uart_exit(void) | ||
1583 | { | ||
1584 | driver_unregister(&cpm_scc_uart_driver); | ||
1585 | driver_unregister(&cpm_smc_uart_driver); | ||
1586 | uart_unregister_driver(&cpm_reg); | ||
1587 | } | ||
1588 | #endif | ||
1589 | 1220 | ||
1590 | module_init(cpm_uart_init); | 1221 | module_init(cpm_uart_init); |
1591 | module_exit(cpm_uart_exit); | 1222 | module_exit(cpm_uart_exit); |
diff --git a/drivers/serial/cpm_uart/cpm_uart_cpm1.c b/drivers/serial/cpm_uart/cpm_uart_cpm1.c index bec0c974cf54..0f0aff06c596 100644 --- a/drivers/serial/cpm_uart/cpm_uart_cpm1.c +++ b/drivers/serial/cpm_uart/cpm_uart_cpm1.c | |||
@@ -51,7 +51,6 @@ | |||
51 | 51 | ||
52 | /**************************************************************/ | 52 | /**************************************************************/ |
53 | 53 | ||
54 | #ifdef CONFIG_PPC_CPM_NEW_BINDING | ||
55 | void cpm_line_cr_cmd(struct uart_cpm_port *port, int cmd) | 54 | void cpm_line_cr_cmd(struct uart_cpm_port *port, int cmd) |
56 | { | 55 | { |
57 | cpm_command(port->command, cmd); | 56 | cpm_command(port->command, cmd); |
@@ -68,75 +67,6 @@ void cpm_uart_unmap_pram(struct uart_cpm_port *port, void __iomem *pram) | |||
68 | iounmap(pram); | 67 | iounmap(pram); |
69 | } | 68 | } |
70 | 69 | ||
71 | #else | ||
72 | void cpm_line_cr_cmd(struct uart_cpm_port *port, int cmd) | ||
73 | { | ||
74 | ushort val; | ||
75 | int line = port - cpm_uart_ports; | ||
76 | volatile cpm8xx_t *cp = cpmp; | ||
77 | |||
78 | switch (line) { | ||
79 | case UART_SMC1: | ||
80 | val = mk_cr_cmd(CPM_CR_CH_SMC1, cmd) | CPM_CR_FLG; | ||
81 | break; | ||
82 | case UART_SMC2: | ||
83 | val = mk_cr_cmd(CPM_CR_CH_SMC2, cmd) | CPM_CR_FLG; | ||
84 | break; | ||
85 | case UART_SCC1: | ||
86 | val = mk_cr_cmd(CPM_CR_CH_SCC1, cmd) | CPM_CR_FLG; | ||
87 | break; | ||
88 | case UART_SCC2: | ||
89 | val = mk_cr_cmd(CPM_CR_CH_SCC2, cmd) | CPM_CR_FLG; | ||
90 | break; | ||
91 | case UART_SCC3: | ||
92 | val = mk_cr_cmd(CPM_CR_CH_SCC3, cmd) | CPM_CR_FLG; | ||
93 | break; | ||
94 | case UART_SCC4: | ||
95 | val = mk_cr_cmd(CPM_CR_CH_SCC4, cmd) | CPM_CR_FLG; | ||
96 | break; | ||
97 | default: | ||
98 | return; | ||
99 | |||
100 | } | ||
101 | cp->cp_cpcr = val; | ||
102 | while (cp->cp_cpcr & CPM_CR_FLG) ; | ||
103 | } | ||
104 | |||
105 | void smc1_lineif(struct uart_cpm_port *pinfo) | ||
106 | { | ||
107 | pinfo->brg = 1; | ||
108 | } | ||
109 | |||
110 | void smc2_lineif(struct uart_cpm_port *pinfo) | ||
111 | { | ||
112 | pinfo->brg = 2; | ||
113 | } | ||
114 | |||
115 | void scc1_lineif(struct uart_cpm_port *pinfo) | ||
116 | { | ||
117 | /* XXX SCC1: insert port configuration here */ | ||
118 | pinfo->brg = 1; | ||
119 | } | ||
120 | |||
121 | void scc2_lineif(struct uart_cpm_port *pinfo) | ||
122 | { | ||
123 | /* XXX SCC2: insert port configuration here */ | ||
124 | pinfo->brg = 2; | ||
125 | } | ||
126 | |||
127 | void scc3_lineif(struct uart_cpm_port *pinfo) | ||
128 | { | ||
129 | /* XXX SCC3: insert port configuration here */ | ||
130 | pinfo->brg = 3; | ||
131 | } | ||
132 | |||
133 | void scc4_lineif(struct uart_cpm_port *pinfo) | ||
134 | { | ||
135 | /* XXX SCC4: insert port configuration here */ | ||
136 | pinfo->brg = 4; | ||
137 | } | ||
138 | #endif | ||
139 | |||
140 | /* | 70 | /* |
141 | * Allocate DP-Ram and memory buffers. We need to allocate a transmit and | 71 | * Allocate DP-Ram and memory buffers. We need to allocate a transmit and |
142 | * receive buffer descriptors from dual port ram, and a character | 72 | * receive buffer descriptors from dual port ram, and a character |
@@ -205,101 +135,3 @@ void cpm_uart_freebuf(struct uart_cpm_port *pinfo) | |||
205 | 135 | ||
206 | cpm_dpfree(pinfo->dp_addr); | 136 | cpm_dpfree(pinfo->dp_addr); |
207 | } | 137 | } |
208 | |||
209 | #ifndef CONFIG_PPC_CPM_NEW_BINDING | ||
210 | /* Setup any dynamic params in the uart desc */ | ||
211 | int cpm_uart_init_portdesc(void) | ||
212 | { | ||
213 | pr_debug("CPM uart[-]:init portdesc\n"); | ||
214 | |||
215 | cpm_uart_nr = 0; | ||
216 | #ifdef CONFIG_SERIAL_CPM_SMC1 | ||
217 | cpm_uart_ports[UART_SMC1].smcp = &cpmp->cp_smc[0]; | ||
218 | /* | ||
219 | * Is SMC1 being relocated? | ||
220 | */ | ||
221 | # ifdef CONFIG_I2C_SPI_SMC1_UCODE_PATCH | ||
222 | cpm_uart_ports[UART_SMC1].smcup = | ||
223 | (smc_uart_t *) & cpmp->cp_dparam[0x3C0]; | ||
224 | # else | ||
225 | cpm_uart_ports[UART_SMC1].smcup = | ||
226 | (smc_uart_t *) & cpmp->cp_dparam[PROFF_SMC1]; | ||
227 | # endif | ||
228 | cpm_uart_ports[UART_SMC1].port.mapbase = | ||
229 | (unsigned long)&cpmp->cp_smc[0]; | ||
230 | cpm_uart_ports[UART_SMC1].smcp->smc_smcm |= (SMCM_RX | SMCM_TX); | ||
231 | cpm_uart_ports[UART_SMC1].smcp->smc_smcmr &= ~(SMCMR_REN | SMCMR_TEN); | ||
232 | cpm_uart_ports[UART_SMC1].port.uartclk = uart_clock(); | ||
233 | cpm_uart_port_map[cpm_uart_nr++] = UART_SMC1; | ||
234 | #endif | ||
235 | |||
236 | #ifdef CONFIG_SERIAL_CPM_SMC2 | ||
237 | cpm_uart_ports[UART_SMC2].smcp = &cpmp->cp_smc[1]; | ||
238 | cpm_uart_ports[UART_SMC2].smcup = | ||
239 | (smc_uart_t *) & cpmp->cp_dparam[PROFF_SMC2]; | ||
240 | cpm_uart_ports[UART_SMC2].port.mapbase = | ||
241 | (unsigned long)&cpmp->cp_smc[1]; | ||
242 | cpm_uart_ports[UART_SMC2].smcp->smc_smcm |= (SMCM_RX | SMCM_TX); | ||
243 | cpm_uart_ports[UART_SMC2].smcp->smc_smcmr &= ~(SMCMR_REN | SMCMR_TEN); | ||
244 | cpm_uart_ports[UART_SMC2].port.uartclk = uart_clock(); | ||
245 | cpm_uart_port_map[cpm_uart_nr++] = UART_SMC2; | ||
246 | #endif | ||
247 | |||
248 | #ifdef CONFIG_SERIAL_CPM_SCC1 | ||
249 | cpm_uart_ports[UART_SCC1].sccp = &cpmp->cp_scc[0]; | ||
250 | cpm_uart_ports[UART_SCC1].sccup = | ||
251 | (scc_uart_t *) & cpmp->cp_dparam[PROFF_SCC1]; | ||
252 | cpm_uart_ports[UART_SCC1].port.mapbase = | ||
253 | (unsigned long)&cpmp->cp_scc[0]; | ||
254 | cpm_uart_ports[UART_SCC1].sccp->scc_sccm &= | ||
255 | ~(UART_SCCM_TX | UART_SCCM_RX); | ||
256 | cpm_uart_ports[UART_SCC1].sccp->scc_gsmrl &= | ||
257 | ~(SCC_GSMRL_ENR | SCC_GSMRL_ENT); | ||
258 | cpm_uart_ports[UART_SCC1].port.uartclk = uart_clock(); | ||
259 | cpm_uart_port_map[cpm_uart_nr++] = UART_SCC1; | ||
260 | #endif | ||
261 | |||
262 | #ifdef CONFIG_SERIAL_CPM_SCC2 | ||
263 | cpm_uart_ports[UART_SCC2].sccp = &cpmp->cp_scc[1]; | ||
264 | cpm_uart_ports[UART_SCC2].sccup = | ||
265 | (scc_uart_t *) & cpmp->cp_dparam[PROFF_SCC2]; | ||
266 | cpm_uart_ports[UART_SCC2].port.mapbase = | ||
267 | (unsigned long)&cpmp->cp_scc[1]; | ||
268 | cpm_uart_ports[UART_SCC2].sccp->scc_sccm &= | ||
269 | ~(UART_SCCM_TX | UART_SCCM_RX); | ||
270 | cpm_uart_ports[UART_SCC2].sccp->scc_gsmrl &= | ||
271 | ~(SCC_GSMRL_ENR | SCC_GSMRL_ENT); | ||
272 | cpm_uart_ports[UART_SCC2].port.uartclk = uart_clock(); | ||
273 | cpm_uart_port_map[cpm_uart_nr++] = UART_SCC2; | ||
274 | #endif | ||
275 | |||
276 | #ifdef CONFIG_SERIAL_CPM_SCC3 | ||
277 | cpm_uart_ports[UART_SCC3].sccp = &cpmp->cp_scc[2]; | ||
278 | cpm_uart_ports[UART_SCC3].sccup = | ||
279 | (scc_uart_t *) & cpmp->cp_dparam[PROFF_SCC3]; | ||
280 | cpm_uart_ports[UART_SCC3].port.mapbase = | ||
281 | (unsigned long)&cpmp->cp_scc[2]; | ||
282 | cpm_uart_ports[UART_SCC3].sccp->scc_sccm &= | ||
283 | ~(UART_SCCM_TX | UART_SCCM_RX); | ||
284 | cpm_uart_ports[UART_SCC3].sccp->scc_gsmrl &= | ||
285 | ~(SCC_GSMRL_ENR | SCC_GSMRL_ENT); | ||
286 | cpm_uart_ports[UART_SCC3].port.uartclk = uart_clock(); | ||
287 | cpm_uart_port_map[cpm_uart_nr++] = UART_SCC3; | ||
288 | #endif | ||
289 | |||
290 | #ifdef CONFIG_SERIAL_CPM_SCC4 | ||
291 | cpm_uart_ports[UART_SCC4].sccp = &cpmp->cp_scc[3]; | ||
292 | cpm_uart_ports[UART_SCC4].sccup = | ||
293 | (scc_uart_t *) & cpmp->cp_dparam[PROFF_SCC4]; | ||
294 | cpm_uart_ports[UART_SCC4].port.mapbase = | ||
295 | (unsigned long)&cpmp->cp_scc[3]; | ||
296 | cpm_uart_ports[UART_SCC4].sccp->scc_sccm &= | ||
297 | ~(UART_SCCM_TX | UART_SCCM_RX); | ||
298 | cpm_uart_ports[UART_SCC4].sccp->scc_gsmrl &= | ||
299 | ~(SCC_GSMRL_ENR | SCC_GSMRL_ENT); | ||
300 | cpm_uart_ports[UART_SCC4].port.uartclk = uart_clock(); | ||
301 | cpm_uart_port_map[cpm_uart_nr++] = UART_SCC4; | ||
302 | #endif | ||
303 | return 0; | ||
304 | } | ||
305 | #endif | ||
diff --git a/drivers/serial/cpm_uart/cpm_uart_cpm1.h b/drivers/serial/cpm_uart/cpm_uart_cpm1.h index b8056980d94f..10eecd6af6d4 100644 --- a/drivers/serial/cpm_uart/cpm_uart_cpm1.h +++ b/drivers/serial/cpm_uart/cpm_uart_cpm1.h | |||
@@ -12,16 +12,6 @@ | |||
12 | 12 | ||
13 | #include <asm/cpm1.h> | 13 | #include <asm/cpm1.h> |
14 | 14 | ||
15 | /* defines for IRQs */ | ||
16 | #ifndef CONFIG_PPC_CPM_NEW_BINDING | ||
17 | #define SMC1_IRQ (CPM_IRQ_OFFSET + CPMVEC_SMC1) | ||
18 | #define SMC2_IRQ (CPM_IRQ_OFFSET + CPMVEC_SMC2) | ||
19 | #define SCC1_IRQ (CPM_IRQ_OFFSET + CPMVEC_SCC1) | ||
20 | #define SCC2_IRQ (CPM_IRQ_OFFSET + CPMVEC_SCC2) | ||
21 | #define SCC3_IRQ (CPM_IRQ_OFFSET + CPMVEC_SCC3) | ||
22 | #define SCC4_IRQ (CPM_IRQ_OFFSET + CPMVEC_SCC4) | ||
23 | #endif | ||
24 | |||
25 | static inline void cpm_set_brg(int brg, int baud) | 15 | static inline void cpm_set_brg(int brg, int baud) |
26 | { | 16 | { |
27 | cpm_setbrg(brg, baud); | 17 | cpm_setbrg(brg, baud); |
diff --git a/drivers/serial/cpm_uart/cpm_uart_cpm2.c b/drivers/serial/cpm_uart/cpm_uart_cpm2.c index e53524c6463c..b8db4d3eed36 100644 --- a/drivers/serial/cpm_uart/cpm_uart_cpm2.c +++ b/drivers/serial/cpm_uart/cpm_uart_cpm2.c | |||
@@ -41,9 +41,7 @@ | |||
41 | #include <asm/io.h> | 41 | #include <asm/io.h> |
42 | #include <asm/irq.h> | 42 | #include <asm/irq.h> |
43 | #include <asm/fs_pd.h> | 43 | #include <asm/fs_pd.h> |
44 | #ifdef CONFIG_PPC_CPM_NEW_BINDING | ||
45 | #include <asm/prom.h> | 44 | #include <asm/prom.h> |
46 | #endif | ||
47 | 45 | ||
48 | #include <linux/serial_core.h> | 46 | #include <linux/serial_core.h> |
49 | #include <linux/kernel.h> | 47 | #include <linux/kernel.h> |
@@ -52,7 +50,6 @@ | |||
52 | 50 | ||
53 | /**************************************************************/ | 51 | /**************************************************************/ |
54 | 52 | ||
55 | #ifdef CONFIG_PPC_CPM_NEW_BINDING | ||
56 | void cpm_line_cr_cmd(struct uart_cpm_port *port, int cmd) | 53 | void cpm_line_cr_cmd(struct uart_cpm_port *port, int cmd) |
57 | { | 54 | { |
58 | cpm_command(port->command, cmd); | 55 | cpm_command(port->command, cmd); |
@@ -106,172 +103,6 @@ void cpm_uart_unmap_pram(struct uart_cpm_port *port, void __iomem *pram) | |||
106 | iounmap(pram); | 103 | iounmap(pram); |
107 | } | 104 | } |
108 | 105 | ||
109 | #else | ||
110 | void cpm_line_cr_cmd(struct uart_cpm_port *port, int cmd) | ||
111 | { | ||
112 | ulong val; | ||
113 | int line = port - cpm_uart_ports; | ||
114 | volatile cpm_cpm2_t *cp = cpm2_map(im_cpm); | ||
115 | |||
116 | |||
117 | switch (line) { | ||
118 | case UART_SMC1: | ||
119 | val = mk_cr_cmd(CPM_CR_SMC1_PAGE, CPM_CR_SMC1_SBLOCK, 0, | ||
120 | cmd) | CPM_CR_FLG; | ||
121 | break; | ||
122 | case UART_SMC2: | ||
123 | val = mk_cr_cmd(CPM_CR_SMC2_PAGE, CPM_CR_SMC2_SBLOCK, 0, | ||
124 | cmd) | CPM_CR_FLG; | ||
125 | break; | ||
126 | case UART_SCC1: | ||
127 | val = mk_cr_cmd(CPM_CR_SCC1_PAGE, CPM_CR_SCC1_SBLOCK, 0, | ||
128 | cmd) | CPM_CR_FLG; | ||
129 | break; | ||
130 | case UART_SCC2: | ||
131 | val = mk_cr_cmd(CPM_CR_SCC2_PAGE, CPM_CR_SCC2_SBLOCK, 0, | ||
132 | cmd) | CPM_CR_FLG; | ||
133 | break; | ||
134 | case UART_SCC3: | ||
135 | val = mk_cr_cmd(CPM_CR_SCC3_PAGE, CPM_CR_SCC3_SBLOCK, 0, | ||
136 | cmd) | CPM_CR_FLG; | ||
137 | break; | ||
138 | case UART_SCC4: | ||
139 | val = mk_cr_cmd(CPM_CR_SCC4_PAGE, CPM_CR_SCC4_SBLOCK, 0, | ||
140 | cmd) | CPM_CR_FLG; | ||
141 | break; | ||
142 | default: | ||
143 | return; | ||
144 | |||
145 | } | ||
146 | cp->cp_cpcr = val; | ||
147 | while (cp->cp_cpcr & CPM_CR_FLG) ; | ||
148 | |||
149 | cpm2_unmap(cp); | ||
150 | } | ||
151 | |||
152 | void smc1_lineif(struct uart_cpm_port *pinfo) | ||
153 | { | ||
154 | volatile iop_cpm2_t *io = cpm2_map(im_ioport); | ||
155 | volatile cpmux_t *cpmux = cpm2_map(im_cpmux); | ||
156 | |||
157 | /* SMC1 is only on port D */ | ||
158 | io->iop_ppard |= 0x00c00000; | ||
159 | io->iop_pdird |= 0x00400000; | ||
160 | io->iop_pdird &= ~0x00800000; | ||
161 | io->iop_psord &= ~0x00c00000; | ||
162 | |||
163 | /* Wire BRG1 to SMC1 */ | ||
164 | cpmux->cmx_smr &= 0x0f; | ||
165 | pinfo->brg = 1; | ||
166 | |||
167 | cpm2_unmap(cpmux); | ||
168 | cpm2_unmap(io); | ||
169 | } | ||
170 | |||
171 | void smc2_lineif(struct uart_cpm_port *pinfo) | ||
172 | { | ||
173 | volatile iop_cpm2_t *io = cpm2_map(im_ioport); | ||
174 | volatile cpmux_t *cpmux = cpm2_map(im_cpmux); | ||
175 | |||
176 | /* SMC2 is only on port A */ | ||
177 | io->iop_ppara |= 0x00c00000; | ||
178 | io->iop_pdira |= 0x00400000; | ||
179 | io->iop_pdira &= ~0x00800000; | ||
180 | io->iop_psora &= ~0x00c00000; | ||
181 | |||
182 | /* Wire BRG2 to SMC2 */ | ||
183 | cpmux->cmx_smr &= 0xf0; | ||
184 | pinfo->brg = 2; | ||
185 | |||
186 | cpm2_unmap(cpmux); | ||
187 | cpm2_unmap(io); | ||
188 | } | ||
189 | |||
190 | void scc1_lineif(struct uart_cpm_port *pinfo) | ||
191 | { | ||
192 | volatile iop_cpm2_t *io = cpm2_map(im_ioport); | ||
193 | volatile cpmux_t *cpmux = cpm2_map(im_cpmux); | ||
194 | |||
195 | /* Use Port D for SCC1 instead of other functions. */ | ||
196 | io->iop_ppard |= 0x00000003; | ||
197 | io->iop_psord &= ~0x00000001; /* Rx */ | ||
198 | io->iop_psord |= 0x00000002; /* Tx */ | ||
199 | io->iop_pdird &= ~0x00000001; /* Rx */ | ||
200 | io->iop_pdird |= 0x00000002; /* Tx */ | ||
201 | |||
202 | /* Wire BRG1 to SCC1 */ | ||
203 | cpmux->cmx_scr &= 0x00ffffff; | ||
204 | cpmux->cmx_scr |= 0x00000000; | ||
205 | pinfo->brg = 1; | ||
206 | |||
207 | cpm2_unmap(cpmux); | ||
208 | cpm2_unmap(io); | ||
209 | } | ||
210 | |||
211 | void scc2_lineif(struct uart_cpm_port *pinfo) | ||
212 | { | ||
213 | /* | ||
214 | * STx GP3 uses the SCC2 secondary option pin assignment | ||
215 | * which this driver doesn't account for in the static | ||
216 | * pin assignments. This kind of board specific info | ||
217 | * really has to get out of the driver so boards can | ||
218 | * be supported in a sane fashion. | ||
219 | */ | ||
220 | volatile cpmux_t *cpmux = cpm2_map(im_cpmux); | ||
221 | #ifndef CONFIG_STX_GP3 | ||
222 | volatile iop_cpm2_t *io = cpm2_map(im_ioport); | ||
223 | |||
224 | io->iop_pparb |= 0x008b0000; | ||
225 | io->iop_pdirb |= 0x00880000; | ||
226 | io->iop_psorb |= 0x00880000; | ||
227 | io->iop_pdirb &= ~0x00030000; | ||
228 | io->iop_psorb &= ~0x00030000; | ||
229 | #endif | ||
230 | cpmux->cmx_scr &= 0xff00ffff; | ||
231 | cpmux->cmx_scr |= 0x00090000; | ||
232 | pinfo->brg = 2; | ||
233 | |||
234 | cpm2_unmap(cpmux); | ||
235 | cpm2_unmap(io); | ||
236 | } | ||
237 | |||
238 | void scc3_lineif(struct uart_cpm_port *pinfo) | ||
239 | { | ||
240 | volatile iop_cpm2_t *io = cpm2_map(im_ioport); | ||
241 | volatile cpmux_t *cpmux = cpm2_map(im_cpmux); | ||
242 | |||
243 | io->iop_pparb |= 0x008b0000; | ||
244 | io->iop_pdirb |= 0x00880000; | ||
245 | io->iop_psorb |= 0x00880000; | ||
246 | io->iop_pdirb &= ~0x00030000; | ||
247 | io->iop_psorb &= ~0x00030000; | ||
248 | cpmux->cmx_scr &= 0xffff00ff; | ||
249 | cpmux->cmx_scr |= 0x00001200; | ||
250 | pinfo->brg = 3; | ||
251 | |||
252 | cpm2_unmap(cpmux); | ||
253 | cpm2_unmap(io); | ||
254 | } | ||
255 | |||
256 | void scc4_lineif(struct uart_cpm_port *pinfo) | ||
257 | { | ||
258 | volatile iop_cpm2_t *io = cpm2_map(im_ioport); | ||
259 | volatile cpmux_t *cpmux = cpm2_map(im_cpmux); | ||
260 | |||
261 | io->iop_ppard |= 0x00000600; | ||
262 | io->iop_psord &= ~0x00000600; /* Tx/Rx */ | ||
263 | io->iop_pdird &= ~0x00000200; /* Rx */ | ||
264 | io->iop_pdird |= 0x00000400; /* Tx */ | ||
265 | |||
266 | cpmux->cmx_scr &= 0xffffff00; | ||
267 | cpmux->cmx_scr |= 0x0000001b; | ||
268 | pinfo->brg = 4; | ||
269 | |||
270 | cpm2_unmap(cpmux); | ||
271 | cpm2_unmap(io); | ||
272 | } | ||
273 | #endif | ||
274 | |||
275 | /* | 106 | /* |
276 | * Allocate DP-Ram and memory buffers. We need to allocate a transmit and | 107 | * Allocate DP-Ram and memory buffers. We need to allocate a transmit and |
277 | * receive buffer descriptors from dual port ram, and a character | 108 | * receive buffer descriptors from dual port ram, and a character |
@@ -340,111 +171,3 @@ void cpm_uart_freebuf(struct uart_cpm_port *pinfo) | |||
340 | 171 | ||
341 | cpm_dpfree(pinfo->dp_addr); | 172 | cpm_dpfree(pinfo->dp_addr); |
342 | } | 173 | } |
343 | |||
344 | #ifndef CONFIG_PPC_CPM_NEW_BINDING | ||
345 | /* Setup any dynamic params in the uart desc */ | ||
346 | int cpm_uart_init_portdesc(void) | ||
347 | { | ||
348 | #if defined(CONFIG_SERIAL_CPM_SMC1) || defined(CONFIG_SERIAL_CPM_SMC2) | ||
349 | u16 *addr; | ||
350 | #endif | ||
351 | pr_debug("CPM uart[-]:init portdesc\n"); | ||
352 | |||
353 | cpm_uart_nr = 0; | ||
354 | #ifdef CONFIG_SERIAL_CPM_SMC1 | ||
355 | cpm_uart_ports[UART_SMC1].smcp = (smc_t *) cpm2_map(im_smc[0]); | ||
356 | cpm_uart_ports[UART_SMC1].port.mapbase = | ||
357 | (unsigned long)cpm_uart_ports[UART_SMC1].smcp; | ||
358 | |||
359 | cpm_uart_ports[UART_SMC1].smcup = | ||
360 | (smc_uart_t *) cpm2_map_size(im_dprambase[PROFF_SMC1], PROFF_SMC_SIZE); | ||
361 | addr = (u16 *)cpm2_map_size(im_dprambase[PROFF_SMC1_BASE], 2); | ||
362 | *addr = PROFF_SMC1; | ||
363 | cpm2_unmap(addr); | ||
364 | |||
365 | cpm_uart_ports[UART_SMC1].smcp->smc_smcm |= (SMCM_RX | SMCM_TX); | ||
366 | cpm_uart_ports[UART_SMC1].smcp->smc_smcmr &= ~(SMCMR_REN | SMCMR_TEN); | ||
367 | cpm_uart_ports[UART_SMC1].port.uartclk = uart_clock(); | ||
368 | cpm_uart_port_map[cpm_uart_nr++] = UART_SMC1; | ||
369 | #endif | ||
370 | |||
371 | #ifdef CONFIG_SERIAL_CPM_SMC2 | ||
372 | cpm_uart_ports[UART_SMC2].smcp = (smc_t *) cpm2_map(im_smc[1]); | ||
373 | cpm_uart_ports[UART_SMC2].port.mapbase = | ||
374 | (unsigned long)cpm_uart_ports[UART_SMC2].smcp; | ||
375 | |||
376 | cpm_uart_ports[UART_SMC2].smcup = | ||
377 | (smc_uart_t *) cpm2_map_size(im_dprambase[PROFF_SMC2], PROFF_SMC_SIZE); | ||
378 | addr = (u16 *)cpm2_map_size(im_dprambase[PROFF_SMC2_BASE], 2); | ||
379 | *addr = PROFF_SMC2; | ||
380 | cpm2_unmap(addr); | ||
381 | |||
382 | cpm_uart_ports[UART_SMC2].smcp->smc_smcm |= (SMCM_RX | SMCM_TX); | ||
383 | cpm_uart_ports[UART_SMC2].smcp->smc_smcmr &= ~(SMCMR_REN | SMCMR_TEN); | ||
384 | cpm_uart_ports[UART_SMC2].port.uartclk = uart_clock(); | ||
385 | cpm_uart_port_map[cpm_uart_nr++] = UART_SMC2; | ||
386 | #endif | ||
387 | |||
388 | #ifdef CONFIG_SERIAL_CPM_SCC1 | ||
389 | cpm_uart_ports[UART_SCC1].sccp = (scc_t *) cpm2_map(im_scc[0]); | ||
390 | cpm_uart_ports[UART_SCC1].port.mapbase = | ||
391 | (unsigned long)cpm_uart_ports[UART_SCC1].sccp; | ||
392 | cpm_uart_ports[UART_SCC1].sccup = | ||
393 | (scc_uart_t *) cpm2_map_size(im_dprambase[PROFF_SCC1], PROFF_SCC_SIZE); | ||
394 | |||
395 | cpm_uart_ports[UART_SCC1].sccp->scc_sccm &= | ||
396 | ~(UART_SCCM_TX | UART_SCCM_RX); | ||
397 | cpm_uart_ports[UART_SCC1].sccp->scc_gsmrl &= | ||
398 | ~(SCC_GSMRL_ENR | SCC_GSMRL_ENT); | ||
399 | cpm_uart_ports[UART_SCC1].port.uartclk = uart_clock(); | ||
400 | cpm_uart_port_map[cpm_uart_nr++] = UART_SCC1; | ||
401 | #endif | ||
402 | |||
403 | #ifdef CONFIG_SERIAL_CPM_SCC2 | ||
404 | cpm_uart_ports[UART_SCC2].sccp = (scc_t *) cpm2_map(im_scc[1]); | ||
405 | cpm_uart_ports[UART_SCC2].port.mapbase = | ||
406 | (unsigned long)cpm_uart_ports[UART_SCC2].sccp; | ||
407 | cpm_uart_ports[UART_SCC2].sccup = | ||
408 | (scc_uart_t *) cpm2_map_size(im_dprambase[PROFF_SCC2], PROFF_SCC_SIZE); | ||
409 | |||
410 | cpm_uart_ports[UART_SCC2].sccp->scc_sccm &= | ||
411 | ~(UART_SCCM_TX | UART_SCCM_RX); | ||
412 | cpm_uart_ports[UART_SCC2].sccp->scc_gsmrl &= | ||
413 | ~(SCC_GSMRL_ENR | SCC_GSMRL_ENT); | ||
414 | cpm_uart_ports[UART_SCC2].port.uartclk = uart_clock(); | ||
415 | cpm_uart_port_map[cpm_uart_nr++] = UART_SCC2; | ||
416 | #endif | ||
417 | |||
418 | #ifdef CONFIG_SERIAL_CPM_SCC3 | ||
419 | cpm_uart_ports[UART_SCC3].sccp = (scc_t *) cpm2_map(im_scc[2]); | ||
420 | cpm_uart_ports[UART_SCC3].port.mapbase = | ||
421 | (unsigned long)cpm_uart_ports[UART_SCC3].sccp; | ||
422 | cpm_uart_ports[UART_SCC3].sccup = | ||
423 | (scc_uart_t *) cpm2_map_size(im_dprambase[PROFF_SCC3], PROFF_SCC_SIZE); | ||
424 | |||
425 | cpm_uart_ports[UART_SCC3].sccp->scc_sccm &= | ||
426 | ~(UART_SCCM_TX | UART_SCCM_RX); | ||
427 | cpm_uart_ports[UART_SCC3].sccp->scc_gsmrl &= | ||
428 | ~(SCC_GSMRL_ENR | SCC_GSMRL_ENT); | ||
429 | cpm_uart_ports[UART_SCC3].port.uartclk = uart_clock(); | ||
430 | cpm_uart_port_map[cpm_uart_nr++] = UART_SCC3; | ||
431 | #endif | ||
432 | |||
433 | #ifdef CONFIG_SERIAL_CPM_SCC4 | ||
434 | cpm_uart_ports[UART_SCC4].sccp = (scc_t *) cpm2_map(im_scc[3]); | ||
435 | cpm_uart_ports[UART_SCC4].port.mapbase = | ||
436 | (unsigned long)cpm_uart_ports[UART_SCC4].sccp; | ||
437 | cpm_uart_ports[UART_SCC4].sccup = | ||
438 | (scc_uart_t *) cpm2_map_size(im_dprambase[PROFF_SCC4], PROFF_SCC_SIZE); | ||
439 | |||
440 | cpm_uart_ports[UART_SCC4].sccp->scc_sccm &= | ||
441 | ~(UART_SCCM_TX | UART_SCCM_RX); | ||
442 | cpm_uart_ports[UART_SCC4].sccp->scc_gsmrl &= | ||
443 | ~(SCC_GSMRL_ENR | SCC_GSMRL_ENT); | ||
444 | cpm_uart_ports[UART_SCC4].port.uartclk = uart_clock(); | ||
445 | cpm_uart_port_map[cpm_uart_nr++] = UART_SCC4; | ||
446 | #endif | ||
447 | |||
448 | return 0; | ||
449 | } | ||
450 | #endif | ||
diff --git a/drivers/serial/cpm_uart/cpm_uart_cpm2.h b/drivers/serial/cpm_uart/cpm_uart_cpm2.h index a48b56e74841..7194c63dcf5f 100644 --- a/drivers/serial/cpm_uart/cpm_uart_cpm2.h +++ b/drivers/serial/cpm_uart/cpm_uart_cpm2.h | |||
@@ -12,16 +12,6 @@ | |||
12 | 12 | ||
13 | #include <asm/cpm2.h> | 13 | #include <asm/cpm2.h> |
14 | 14 | ||
15 | /* defines for IRQs */ | ||
16 | #ifndef CONFIG_PPC_CPM_NEW_BINDING | ||
17 | #define SMC1_IRQ SIU_INT_SMC1 | ||
18 | #define SMC2_IRQ SIU_INT_SMC2 | ||
19 | #define SCC1_IRQ SIU_INT_SCC1 | ||
20 | #define SCC2_IRQ SIU_INT_SCC2 | ||
21 | #define SCC3_IRQ SIU_INT_SCC3 | ||
22 | #define SCC4_IRQ SIU_INT_SCC4 | ||
23 | #endif | ||
24 | |||
25 | static inline void cpm_set_brg(int brg, int baud) | 15 | static inline void cpm_set_brg(int brg, int baud) |
26 | { | 16 | { |
27 | cpm_setbrg(brg, baud); | 17 | cpm_setbrg(brg, baud); |