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authorBrice Goglin <brice@myri.com>2007-08-24 02:57:17 -0400
committerJeff Garzik <jeff@garzik.org>2007-08-25 02:31:22 -0400
commit302d242cfb64eb53fb6d2aa2ae68ddd1ab47079f (patch)
tree98c2ce776cc57068bd526124baa1dc7ee9ccae40 /drivers
parent28721c890c9b71cfee45e835bda4639777862e2f (diff)
myri10ge: use pcie_get/set_readrq
Based on a patch from Peter Oruba, convert myri10ge to use pcie_get_readrq() and pcie_set_readrq() instead of our own PCI calls and arithmetics. These driver changes incorporate the proposed PCI-X / PCI-Express read byte count interface. Reading and setting those values doesn't take place "manually", instead wrapping functions are called to allow quirks for some PCI bridges. Signed-off-by: Brice Goglin <brice@myri.com> Signed-off by: Peter Oruba <peter.oruba@amd.com> Based on work by Stephen Hemminger <shemminger@linux-foundation.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Jeff Garzik <jeff@garzik.org>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/net/myri10ge/myri10ge.c32
1 files changed, 6 insertions, 26 deletions
diff --git a/drivers/net/myri10ge/myri10ge.c b/drivers/net/myri10ge/myri10ge.c
index ae9bb7b7fd67..3f9fb3405ac7 100644
--- a/drivers/net/myri10ge/myri10ge.c
+++ b/drivers/net/myri10ge/myri10ge.c
@@ -2514,26 +2514,20 @@ static void myri10ge_firmware_probe(struct myri10ge_priv *mgp)
2514{ 2514{
2515 struct pci_dev *pdev = mgp->pdev; 2515 struct pci_dev *pdev = mgp->pdev;
2516 struct device *dev = &pdev->dev; 2516 struct device *dev = &pdev->dev;
2517 int cap, status; 2517 int status;
2518 u16 val;
2519 2518
2520 mgp->tx.boundary = 4096; 2519 mgp->tx.boundary = 4096;
2521 /* 2520 /*
2522 * Verify the max read request size was set to 4KB 2521 * Verify the max read request size was set to 4KB
2523 * before trying the test with 4KB. 2522 * before trying the test with 4KB.
2524 */ 2523 */
2525 cap = pci_find_capability(pdev, PCI_CAP_ID_EXP); 2524 status = pcie_get_readrq(pdev);
2526 if (cap < 64) { 2525 if (status < 0) {
2527 dev_err(dev, "Bad PCI_CAP_ID_EXP location %d\n", cap);
2528 goto abort;
2529 }
2530 status = pci_read_config_word(pdev, cap + PCI_EXP_DEVCTL, &val);
2531 if (status != 0) {
2532 dev_err(dev, "Couldn't read max read req size: %d\n", status); 2526 dev_err(dev, "Couldn't read max read req size: %d\n", status);
2533 goto abort; 2527 goto abort;
2534 } 2528 }
2535 if ((val & (5 << 12)) != (5 << 12)) { 2529 if (status != 4096) {
2536 dev_warn(dev, "Max Read Request size != 4096 (0x%x)\n", val); 2530 dev_warn(dev, "Max Read Request size != 4096 (%d)\n", status);
2537 mgp->tx.boundary = 2048; 2531 mgp->tx.boundary = 2048;
2538 } 2532 }
2539 /* 2533 /*
@@ -2850,9 +2844,7 @@ static int myri10ge_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
2850 size_t bytes; 2844 size_t bytes;
2851 int i; 2845 int i;
2852 int status = -ENXIO; 2846 int status = -ENXIO;
2853 int cap;
2854 int dac_enabled; 2847 int dac_enabled;
2855 u16 val;
2856 2848
2857 netdev = alloc_etherdev(sizeof(*mgp)); 2849 netdev = alloc_etherdev(sizeof(*mgp));
2858 if (netdev == NULL) { 2850 if (netdev == NULL) {
@@ -2884,19 +2876,7 @@ static int myri10ge_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
2884 = pci_find_capability(pdev, PCI_CAP_ID_VNDR); 2876 = pci_find_capability(pdev, PCI_CAP_ID_VNDR);
2885 2877
2886 /* Set our max read request to 4KB */ 2878 /* Set our max read request to 4KB */
2887 cap = pci_find_capability(pdev, PCI_CAP_ID_EXP); 2879 status = pcie_set_readrq(pdev, 4096);
2888 if (cap < 64) {
2889 dev_err(&pdev->dev, "Bad PCI_CAP_ID_EXP location %d\n", cap);
2890 goto abort_with_netdev;
2891 }
2892 status = pci_read_config_word(pdev, cap + PCI_EXP_DEVCTL, &val);
2893 if (status != 0) {
2894 dev_err(&pdev->dev, "Error %d reading PCI_EXP_DEVCTL\n",
2895 status);
2896 goto abort_with_netdev;
2897 }
2898 val = (val & ~PCI_EXP_DEVCTL_READRQ) | (5 << 12);
2899 status = pci_write_config_word(pdev, cap + PCI_EXP_DEVCTL, val);
2900 if (status != 0) { 2880 if (status != 0) {
2901 dev_err(&pdev->dev, "Error %d writing PCI_EXP_DEVCTL\n", 2881 dev_err(&pdev->dev, "Error %d writing PCI_EXP_DEVCTL\n",
2902 status); 2882 status);