diff options
author | Linus Torvalds <torvalds@g5.osdl.org> | 2005-11-13 21:17:54 -0500 |
---|---|---|
committer | Linus Torvalds <torvalds@g5.osdl.org> | 2005-11-13 21:17:54 -0500 |
commit | 70ac551651a2c5a234b703d9a495817f2ca09639 (patch) | |
tree | 71f55b9a3de438969a7a0d951971febf59784294 /drivers | |
parent | 7f729ccff35befa08a836ab33a4372c7f6735645 (diff) | |
parent | bd5d080ab99642e3245ef7cfa54490384c01d878 (diff) |
Merge master.kernel.org:/home/rmk/linux-2.6-arm
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/ide/pci/sl82c105.c | 83 | ||||
-rw-r--r-- | drivers/net/smc91x.h | 16 |
2 files changed, 47 insertions, 52 deletions
diff --git a/drivers/ide/pci/sl82c105.c b/drivers/ide/pci/sl82c105.c index ea0806c82be0..8a5c7b286b2b 100644 --- a/drivers/ide/pci/sl82c105.c +++ b/drivers/ide/pci/sl82c105.c | |||
@@ -399,34 +399,6 @@ static unsigned int __devinit init_chipset_sl82c105(struct pci_dev *dev, const c | |||
399 | return dev->irq; | 399 | return dev->irq; |
400 | } | 400 | } |
401 | 401 | ||
402 | static void __devinit init_dma_sl82c105(ide_hwif_t *hwif, unsigned long dma_base) | ||
403 | { | ||
404 | unsigned int rev; | ||
405 | u8 dma_state; | ||
406 | |||
407 | DBG(("init_dma_sl82c105(hwif: ide%d, dma_base: 0x%08x)\n", hwif->index, dma_base)); | ||
408 | |||
409 | hwif->autodma = 0; | ||
410 | |||
411 | if (!dma_base) | ||
412 | return; | ||
413 | |||
414 | dma_state = hwif->INB(dma_base + 2); | ||
415 | rev = sl82c105_bridge_revision(hwif->pci_dev); | ||
416 | if (rev <= 5) { | ||
417 | printk(" %s: Winbond 553 bridge revision %d, BM-DMA disabled\n", | ||
418 | hwif->name, rev); | ||
419 | dma_state &= ~0x60; | ||
420 | } else { | ||
421 | dma_state |= 0x60; | ||
422 | if (!noautodma) | ||
423 | hwif->autodma = 1; | ||
424 | } | ||
425 | hwif->OUTB(dma_state, dma_base + 2); | ||
426 | |||
427 | ide_setup_dma(hwif, dma_base, 8); | ||
428 | } | ||
429 | |||
430 | /* | 402 | /* |
431 | * Initialise the chip | 403 | * Initialise the chip |
432 | */ | 404 | */ |
@@ -434,6 +406,8 @@ static void __devinit init_dma_sl82c105(ide_hwif_t *hwif, unsigned long dma_base | |||
434 | static void __devinit init_hwif_sl82c105(ide_hwif_t *hwif) | 406 | static void __devinit init_hwif_sl82c105(ide_hwif_t *hwif) |
435 | { | 407 | { |
436 | struct pci_dev *dev = hwif->pci_dev; | 408 | struct pci_dev *dev = hwif->pci_dev; |
409 | unsigned int rev; | ||
410 | u8 dma_state; | ||
437 | u32 val; | 411 | u32 val; |
438 | 412 | ||
439 | DBG(("init_hwif_sl82c105(hwif: ide%d)\n", hwif->index)); | 413 | DBG(("init_hwif_sl82c105(hwif: ide%d)\n", hwif->index)); |
@@ -455,33 +429,54 @@ static void __devinit init_hwif_sl82c105(ide_hwif_t *hwif) | |||
455 | pci_read_config_dword(dev, 0x40, &val); | 429 | pci_read_config_dword(dev, 0x40, &val); |
456 | *((u32 *)&hwif->hwif_data) = val; | 430 | *((u32 *)&hwif->hwif_data) = val; |
457 | 431 | ||
432 | hwif->atapi_dma = 0; | ||
433 | hwif->mwdma_mask = 0; | ||
434 | hwif->swdma_mask = 0; | ||
435 | hwif->autodma = 0; | ||
436 | |||
458 | if (!hwif->dma_base) | 437 | if (!hwif->dma_base) |
459 | return; | 438 | return; |
460 | 439 | ||
461 | hwif->atapi_dma = 1; | 440 | dma_state = hwif->INB(hwif->dma_base + 2) & ~0x60; |
462 | hwif->mwdma_mask = 0x07; | 441 | rev = sl82c105_bridge_revision(hwif->pci_dev); |
463 | hwif->swdma_mask = 0x07; | 442 | if (rev <= 5) { |
464 | 443 | /* | |
444 | * Never ever EVER under any circumstances enable | ||
445 | * DMA when the bridge is this old. | ||
446 | */ | ||
447 | printk(" %s: Winbond 553 bridge revision %d, BM-DMA disabled\n", | ||
448 | hwif->name, rev); | ||
449 | } else { | ||
465 | #ifdef CONFIG_BLK_DEV_IDEDMA | 450 | #ifdef CONFIG_BLK_DEV_IDEDMA |
466 | hwif->ide_dma_check = &sl82c105_check_drive; | 451 | dma_state |= 0x60; |
467 | hwif->ide_dma_on = &sl82c105_ide_dma_on; | 452 | |
468 | hwif->ide_dma_off_quietly = &sl82c105_ide_dma_off_quietly; | 453 | hwif->atapi_dma = 1; |
469 | hwif->ide_dma_lostirq = &sl82c105_ide_dma_lost_irq; | 454 | hwif->mwdma_mask = 0x07; |
470 | hwif->dma_start = &sl82c105_ide_dma_start; | 455 | hwif->swdma_mask = 0x07; |
471 | hwif->ide_dma_timeout = &sl82c105_ide_dma_timeout; | 456 | |
472 | 457 | hwif->ide_dma_check = &sl82c105_check_drive; | |
473 | if (!noautodma) | 458 | hwif->ide_dma_on = &sl82c105_ide_dma_on; |
474 | hwif->autodma = 1; | 459 | hwif->ide_dma_off_quietly = &sl82c105_ide_dma_off_quietly; |
475 | hwif->drives[0].autodma = hwif->autodma; | 460 | hwif->ide_dma_lostirq = &sl82c105_ide_dma_lost_irq; |
476 | hwif->drives[1].autodma = hwif->autodma; | 461 | hwif->dma_start = &sl82c105_ide_dma_start; |
462 | hwif->ide_dma_timeout = &sl82c105_ide_dma_timeout; | ||
463 | |||
464 | if (!noautodma) | ||
465 | hwif->autodma = 1; | ||
466 | hwif->drives[0].autodma = hwif->autodma; | ||
467 | hwif->drives[1].autodma = hwif->autodma; | ||
468 | |||
469 | if (hwif->mate) | ||
470 | hwif->serialized = hwif->mate->serialized = 1; | ||
477 | #endif /* CONFIG_BLK_DEV_IDEDMA */ | 471 | #endif /* CONFIG_BLK_DEV_IDEDMA */ |
472 | } | ||
473 | hwif->OUTB(dma_state, hwif->dma_base + 2); | ||
478 | } | 474 | } |
479 | 475 | ||
480 | static ide_pci_device_t sl82c105_chipset __devinitdata = { | 476 | static ide_pci_device_t sl82c105_chipset __devinitdata = { |
481 | .name = "W82C105", | 477 | .name = "W82C105", |
482 | .init_chipset = init_chipset_sl82c105, | 478 | .init_chipset = init_chipset_sl82c105, |
483 | .init_hwif = init_hwif_sl82c105, | 479 | .init_hwif = init_hwif_sl82c105, |
484 | .init_dma = init_dma_sl82c105, | ||
485 | .channels = 2, | 480 | .channels = 2, |
486 | .autodma = NOAUTODMA, | 481 | .autodma = NOAUTODMA, |
487 | .enablebits = {{0x40,0x01,0x01}, {0x40,0x10,0x10}}, | 482 | .enablebits = {{0x40,0x01,0x01}, {0x40,0x10,0x10}}, |
diff --git a/drivers/net/smc91x.h b/drivers/net/smc91x.h index a10cd184d597..5c2824be4ee6 100644 --- a/drivers/net/smc91x.h +++ b/drivers/net/smc91x.h | |||
@@ -100,14 +100,14 @@ | |||
100 | #define SMC_IO_SHIFT 0 | 100 | #define SMC_IO_SHIFT 0 |
101 | #define SMC_NOWAIT 1 | 101 | #define SMC_NOWAIT 1 |
102 | 102 | ||
103 | #define SMC_inb(a, r) inb((a) + (r)) | 103 | #define SMC_inb(a, r) readb((a) + (r)) |
104 | #define SMC_insb(a, r, p, l) insb((a) + (r), p, (l)) | 104 | #define SMC_insb(a, r, p, l) readsb((a) + (r), p, (l)) |
105 | #define SMC_inw(a, r) inw((a) + (r)) | 105 | #define SMC_inw(a, r) readw((a) + (r)) |
106 | #define SMC_insw(a, r, p, l) insw((a) + (r), p, l) | 106 | #define SMC_insw(a, r, p, l) readsw((a) + (r), p, l) |
107 | #define SMC_outb(v, a, r) outb(v, (a) + (r)) | 107 | #define SMC_outb(v, a, r) writeb(v, (a) + (r)) |
108 | #define SMC_outsb(a, r, p, l) outsb((a) + (r), p, (l)) | 108 | #define SMC_outsb(a, r, p, l) writesb((a) + (r), p, (l)) |
109 | #define SMC_outw(v, a, r) outw(v, (a) + (r)) | 109 | #define SMC_outw(v, a, r) writew(v, (a) + (r)) |
110 | #define SMC_outsw(a, r, p, l) outsw((a) + (r), p, l) | 110 | #define SMC_outsw(a, r, p, l) writesw((a) + (r), p, l) |
111 | 111 | ||
112 | #define set_irq_type(irq, type) do {} while (0) | 112 | #define set_irq_type(irq, type) do {} while (0) |
113 | 113 | ||