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authorAshok Raj <ashok.raj@intel.com>2005-09-06 18:16:15 -0400
committerLinus Torvalds <torvalds@g5.osdl.org>2005-09-07 19:57:15 -0400
commit54d5d42404e7705cf3804593189e963350d470e5 (patch)
tree7cf8a7fce163b19672193d8cf4ef6a7f6c131d9e /drivers
parentf63ed39c578a2a2d067356a85ce7c28a7c795d8a (diff)
[PATCH] x86/x86_64: deferred handling of writes to /proc/irqxx/smp_affinity
When handling writes to /proc/irq, current code is re-programming rte entries directly. This is not recommended and could potentially cause chipset's to lockup, or cause missing interrupts. CONFIG_IRQ_BALANCE does this correctly, where it re-programs only when the interrupt is pending. The same needs to be done for /proc/irq handling as well. Otherwise user space irq balancers are really not doing the right thing. - Changed pending_irq_balance_cpumask to pending_irq_migrate_cpumask for lack of a generic name. - added move_irq out of IRQ_BALANCE, and added this same to X86_64 - Added new proc handler for write, so we can do deferred write at irq handling time. - Display of /proc/irq/XX/smp_affinity used to display CPU_MASKALL, instead it now shows only active cpu masks, or exactly what was set. - Provided a common move_irq implementation, instead of duplicating when using generic irq framework. Tested on i386/x86_64 and ia64 with CONFIG_PCI_MSI turned on and off. Tested UP builds as well. MSI testing: tbd: I have cards, need to look for a x-over cable, although I did test an earlier version of this patch. Will test in a couple days. Signed-off-by: Ashok Raj <ashok.raj@intel.com> Acked-by: Zwane Mwaikambo <zwane@holomorphy.com> Grudgingly-acked-by: Andi Kleen <ak@muc.de> Signed-off-by: Coywolf Qi Hunt <coywolf@lovecn.org> Signed-off-by: Ashok Raj <ashok.raj@intel.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/pci/msi.c17
-rw-r--r--drivers/pci/msi.h5
2 files changed, 5 insertions, 17 deletions
diff --git a/drivers/pci/msi.c b/drivers/pci/msi.c
index 2b85aa39f954..532f73bb2224 100644
--- a/drivers/pci/msi.c
+++ b/drivers/pci/msi.c
@@ -91,6 +91,7 @@ static void set_msi_affinity(unsigned int vector, cpumask_t cpu_mask)
91{ 91{
92 struct msi_desc *entry; 92 struct msi_desc *entry;
93 struct msg_address address; 93 struct msg_address address;
94 unsigned int irq = vector;
94 95
95 entry = (struct msi_desc *)msi_desc[vector]; 96 entry = (struct msi_desc *)msi_desc[vector];
96 if (!entry || !entry->dev) 97 if (!entry || !entry->dev)
@@ -112,6 +113,7 @@ static void set_msi_affinity(unsigned int vector, cpumask_t cpu_mask)
112 entry->msi_attrib.current_cpu = cpu_mask_to_apicid(cpu_mask); 113 entry->msi_attrib.current_cpu = cpu_mask_to_apicid(cpu_mask);
113 pci_write_config_dword(entry->dev, msi_lower_address_reg(pos), 114 pci_write_config_dword(entry->dev, msi_lower_address_reg(pos),
114 address.lo_address.value); 115 address.lo_address.value);
116 set_native_irq_info(irq, cpu_mask);
115 break; 117 break;
116 } 118 }
117 case PCI_CAP_ID_MSIX: 119 case PCI_CAP_ID_MSIX:
@@ -125,22 +127,13 @@ static void set_msi_affinity(unsigned int vector, cpumask_t cpu_mask)
125 MSI_TARGET_CPU_SHIFT); 127 MSI_TARGET_CPU_SHIFT);
126 entry->msi_attrib.current_cpu = cpu_mask_to_apicid(cpu_mask); 128 entry->msi_attrib.current_cpu = cpu_mask_to_apicid(cpu_mask);
127 writel(address.lo_address.value, entry->mask_base + offset); 129 writel(address.lo_address.value, entry->mask_base + offset);
130 set_native_irq_info(irq, cpu_mask);
128 break; 131 break;
129 } 132 }
130 default: 133 default:
131 break; 134 break;
132 } 135 }
133} 136}
134
135#ifdef CONFIG_IRQBALANCE
136static inline void move_msi(int vector)
137{
138 if (!cpus_empty(pending_irq_balance_cpumask[vector])) {
139 set_msi_affinity(vector, pending_irq_balance_cpumask[vector]);
140 cpus_clear(pending_irq_balance_cpumask[vector]);
141 }
142}
143#endif /* CONFIG_IRQBALANCE */
144#endif /* CONFIG_SMP */ 137#endif /* CONFIG_SMP */
145 138
146static void mask_MSI_irq(unsigned int vector) 139static void mask_MSI_irq(unsigned int vector)
@@ -191,13 +184,13 @@ static void shutdown_msi_irq(unsigned int vector)
191 184
192static void end_msi_irq_wo_maskbit(unsigned int vector) 185static void end_msi_irq_wo_maskbit(unsigned int vector)
193{ 186{
194 move_msi(vector); 187 move_native_irq(vector);
195 ack_APIC_irq(); 188 ack_APIC_irq();
196} 189}
197 190
198static void end_msi_irq_w_maskbit(unsigned int vector) 191static void end_msi_irq_w_maskbit(unsigned int vector)
199{ 192{
200 move_msi(vector); 193 move_native_irq(vector);
201 unmask_MSI_irq(vector); 194 unmask_MSI_irq(vector);
202 ack_APIC_irq(); 195 ack_APIC_irq();
203} 196}
diff --git a/drivers/pci/msi.h b/drivers/pci/msi.h
index 390f1851c0f1..402136a5c9e4 100644
--- a/drivers/pci/msi.h
+++ b/drivers/pci/msi.h
@@ -19,7 +19,6 @@
19#define NR_HP_RESERVED_VECTORS 20 19#define NR_HP_RESERVED_VECTORS 20
20 20
21extern int vector_irq[NR_VECTORS]; 21extern int vector_irq[NR_VECTORS];
22extern cpumask_t pending_irq_balance_cpumask[NR_IRQS];
23extern void (*interrupt[NR_IRQS])(void); 22extern void (*interrupt[NR_IRQS])(void);
24extern int pci_vector_resources(int last, int nr_released); 23extern int pci_vector_resources(int last, int nr_released);
25 24
@@ -29,10 +28,6 @@ extern int pci_vector_resources(int last, int nr_released);
29#define set_msi_irq_affinity NULL 28#define set_msi_irq_affinity NULL
30#endif 29#endif
31 30
32#ifndef CONFIG_IRQBALANCE
33static inline void move_msi(int vector) {}
34#endif
35
36/* 31/*
37 * MSI-X Address Register 32 * MSI-X Address Register
38 */ 33 */