diff options
author | Douglas Thompson <dougthompson@xmission.com> | 2007-07-19 04:50:08 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@woody.linux-foundation.org> | 2007-07-19 13:04:55 -0400 |
commit | cddbfcacf02dc2d5b074fc2717358a7529a190db (patch) | |
tree | 00ef71246e51cef9127dd898000d2fe1ccb92efa /drivers | |
parent | 11116601092c42364892d3f59c8f4a8a30916867 (diff) |
drivers/edac: Lindent r82600
Run r82600_edac.c file through Lindent for cleanup
Signed-off-by: Douglas Thompson <dougthompson@xmission.com>
Signed-off-by: Dave Jiang <djiang@mvista.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/edac/r82600_edac.c | 55 |
1 files changed, 27 insertions, 28 deletions
diff --git a/drivers/edac/r82600_edac.c b/drivers/edac/r82600_edac.c index 4285958c73b7..18206ce28d14 100644 --- a/drivers/edac/r82600_edac.c +++ b/drivers/edac/r82600_edac.c | |||
@@ -133,8 +133,8 @@ struct r82600_error_info { | |||
133 | 133 | ||
134 | static unsigned int disable_hardware_scrub = 0; | 134 | static unsigned int disable_hardware_scrub = 0; |
135 | 135 | ||
136 | static void r82600_get_error_info (struct mem_ctl_info *mci, | 136 | static void r82600_get_error_info(struct mem_ctl_info *mci, |
137 | struct r82600_error_info *info) | 137 | struct r82600_error_info *info) |
138 | { | 138 | { |
139 | struct pci_dev *pdev; | 139 | struct pci_dev *pdev; |
140 | 140 | ||
@@ -144,18 +144,19 @@ static void r82600_get_error_info (struct mem_ctl_info *mci, | |||
144 | if (info->eapr & BIT(0)) | 144 | if (info->eapr & BIT(0)) |
145 | /* Clear error to allow next error to be reported [p.62] */ | 145 | /* Clear error to allow next error to be reported [p.62] */ |
146 | pci_write_bits32(pdev, R82600_EAP, | 146 | pci_write_bits32(pdev, R82600_EAP, |
147 | ((u32) BIT(0) & (u32) BIT(1)), | 147 | ((u32) BIT(0) & (u32) BIT(1)), |
148 | ((u32) BIT(0) & (u32) BIT(1))); | 148 | ((u32) BIT(0) & (u32) BIT(1))); |
149 | 149 | ||
150 | if (info->eapr & BIT(1)) | 150 | if (info->eapr & BIT(1)) |
151 | /* Clear error to allow next error to be reported [p.62] */ | 151 | /* Clear error to allow next error to be reported [p.62] */ |
152 | pci_write_bits32(pdev, R82600_EAP, | 152 | pci_write_bits32(pdev, R82600_EAP, |
153 | ((u32) BIT(0) & (u32) BIT(1)), | 153 | ((u32) BIT(0) & (u32) BIT(1)), |
154 | ((u32) BIT(0) & (u32) BIT(1))); | 154 | ((u32) BIT(0) & (u32) BIT(1))); |
155 | } | 155 | } |
156 | 156 | ||
157 | static int r82600_process_error_info (struct mem_ctl_info *mci, | 157 | static int r82600_process_error_info(struct mem_ctl_info *mci, |
158 | struct r82600_error_info *info, int handle_errors) | 158 | struct r82600_error_info *info, |
159 | int handle_errors) | ||
159 | { | 160 | { |
160 | int error_found; | 161 | int error_found; |
161 | u32 eapaddr, page; | 162 | u32 eapaddr, page; |
@@ -172,25 +173,23 @@ static int r82600_process_error_info (struct mem_ctl_info *mci, | |||
172 | * granularity (upper 19 bits only) */ | 173 | * granularity (upper 19 bits only) */ |
173 | page = eapaddr >> PAGE_SHIFT; | 174 | page = eapaddr >> PAGE_SHIFT; |
174 | 175 | ||
175 | if (info->eapr & BIT(0)) { /* CE? */ | 176 | if (info->eapr & BIT(0)) { /* CE? */ |
176 | error_found = 1; | 177 | error_found = 1; |
177 | 178 | ||
178 | if (handle_errors) | 179 | if (handle_errors) |
179 | edac_mc_handle_ce(mci, page, 0, /* not avail */ | 180 | edac_mc_handle_ce(mci, page, 0, /* not avail */ |
180 | syndrome, | 181 | syndrome, edac_mc_find_csrow_by_page(mci, page), 0, /* channel */ |
181 | edac_mc_find_csrow_by_page(mci, page), | 182 | mci->ctl_name); |
182 | 0, /* channel */ | ||
183 | mci->ctl_name); | ||
184 | } | 183 | } |
185 | 184 | ||
186 | if (info->eapr & BIT(1)) { /* UE? */ | 185 | if (info->eapr & BIT(1)) { /* UE? */ |
187 | error_found = 1; | 186 | error_found = 1; |
188 | 187 | ||
189 | if (handle_errors) | 188 | if (handle_errors) |
190 | /* 82600 doesn't give enough info */ | 189 | /* 82600 doesn't give enough info */ |
191 | edac_mc_handle_ue(mci, page, 0, | 190 | edac_mc_handle_ue(mci, page, 0, |
192 | edac_mc_find_csrow_by_page(mci, page), | 191 | edac_mc_find_csrow_by_page(mci, page), |
193 | mci->ctl_name); | 192 | mci->ctl_name); |
194 | } | 193 | } |
195 | 194 | ||
196 | return error_found; | 195 | return error_found; |
@@ -211,11 +210,11 @@ static inline int ecc_enabled(u8 dramcr) | |||
211 | } | 210 | } |
212 | 211 | ||
213 | static void r82600_init_csrows(struct mem_ctl_info *mci, struct pci_dev *pdev, | 212 | static void r82600_init_csrows(struct mem_ctl_info *mci, struct pci_dev *pdev, |
214 | u8 dramcr) | 213 | u8 dramcr) |
215 | { | 214 | { |
216 | struct csrow_info *csrow; | 215 | struct csrow_info *csrow; |
217 | int index; | 216 | int index; |
218 | u8 drbar; /* SDRAM Row Boundry Address Register */ | 217 | u8 drbar; /* SDRAM Row Boundry Address Register */ |
219 | u32 row_high_limit, row_high_limit_last; | 218 | u32 row_high_limit, row_high_limit_last; |
220 | u32 reg_sdram, ecc_on, row_base; | 219 | u32 reg_sdram, ecc_on, row_base; |
221 | 220 | ||
@@ -309,12 +308,12 @@ static int r82600_probe1(struct pci_dev *pdev, int dev_idx) | |||
309 | mci->edac_check = r82600_check; | 308 | mci->edac_check = r82600_check; |
310 | mci->ctl_page_to_phys = NULL; | 309 | mci->ctl_page_to_phys = NULL; |
311 | r82600_init_csrows(mci, pdev, dramcr); | 310 | r82600_init_csrows(mci, pdev, dramcr); |
312 | r82600_get_error_info(mci, &discard); /* clear counters */ | 311 | r82600_get_error_info(mci, &discard); /* clear counters */ |
313 | 312 | ||
314 | /* Here we assume that we will never see multiple instances of this | 313 | /* Here we assume that we will never see multiple instances of this |
315 | * type of memory controller. The ID is therefore hardcoded to 0. | 314 | * type of memory controller. The ID is therefore hardcoded to 0. |
316 | */ | 315 | */ |
317 | if (edac_mc_add_mc(mci,0)) { | 316 | if (edac_mc_add_mc(mci, 0)) { |
318 | debugf3("%s(): failed edac_mc_add_mc()\n", __func__); | 317 | debugf3("%s(): failed edac_mc_add_mc()\n", __func__); |
319 | goto fail; | 318 | goto fail; |
320 | } | 319 | } |
@@ -330,14 +329,14 @@ static int r82600_probe1(struct pci_dev *pdev, int dev_idx) | |||
330 | debugf3("%s(): success\n", __func__); | 329 | debugf3("%s(): success\n", __func__); |
331 | return 0; | 330 | return 0; |
332 | 331 | ||
333 | fail: | 332 | fail: |
334 | edac_mc_free(mci); | 333 | edac_mc_free(mci); |
335 | return -ENODEV; | 334 | return -ENODEV; |
336 | } | 335 | } |
337 | 336 | ||
338 | /* returns count (>= 0), or negative on error */ | 337 | /* returns count (>= 0), or negative on error */ |
339 | static int __devinit r82600_init_one(struct pci_dev *pdev, | 338 | static int __devinit r82600_init_one(struct pci_dev *pdev, |
340 | const struct pci_device_id *ent) | 339 | const struct pci_device_id *ent) |
341 | { | 340 | { |
342 | debugf0("%s()\n", __func__); | 341 | debugf0("%s()\n", __func__); |
343 | 342 | ||
@@ -359,11 +358,11 @@ static void __devexit r82600_remove_one(struct pci_dev *pdev) | |||
359 | 358 | ||
360 | static const struct pci_device_id r82600_pci_tbl[] __devinitdata = { | 359 | static const struct pci_device_id r82600_pci_tbl[] __devinitdata = { |
361 | { | 360 | { |
362 | PCI_DEVICE(PCI_VENDOR_ID_RADISYS, R82600_BRIDGE_ID) | 361 | PCI_DEVICE(PCI_VENDOR_ID_RADISYS, R82600_BRIDGE_ID) |
363 | }, | 362 | }, |
364 | { | 363 | { |
365 | 0, | 364 | 0, |
366 | } /* 0 terminated list. */ | 365 | } /* 0 terminated list. */ |
367 | }; | 366 | }; |
368 | 367 | ||
369 | MODULE_DEVICE_TABLE(pci, r82600_pci_tbl); | 368 | MODULE_DEVICE_TABLE(pci, r82600_pci_tbl); |
@@ -390,7 +389,7 @@ module_exit(r82600_exit); | |||
390 | 389 | ||
391 | MODULE_LICENSE("GPL"); | 390 | MODULE_LICENSE("GPL"); |
392 | MODULE_AUTHOR("Tim Small <tim@buttersideup.com> - WPAD Ltd. " | 391 | MODULE_AUTHOR("Tim Small <tim@buttersideup.com> - WPAD Ltd. " |
393 | "on behalf of EADS Astrium"); | 392 | "on behalf of EADS Astrium"); |
394 | MODULE_DESCRIPTION("MC support for Radisys 82600 memory controllers"); | 393 | MODULE_DESCRIPTION("MC support for Radisys 82600 memory controllers"); |
395 | 394 | ||
396 | module_param(disable_hardware_scrub, bool, 0644); | 395 | module_param(disable_hardware_scrub, bool, 0644); |