diff options
author | Andrew Victor <andrew@sanpeople.com> | 2006-10-25 13:42:38 -0400 |
---|---|---|
committer | Pierre Ossman <drzeus@drzeus.cx> | 2006-12-11 03:46:37 -0500 |
commit | e0b19b83656731fc93f9a82592ebcad82c3e0944 (patch) | |
tree | a8c0cb460bf2e697e6290a34b5ad44d10bfce1c3 /drivers | |
parent | 3263263f7091eccab6fdc23f28f09b17c0466629 (diff) |
AT91 MMC 1: Pass host structure.
The I/O base address is now stored in the 'at91mci_host' structure. We
therefore have to pass this structure to at91_mci_read() and
at91_mci_write().
Signed-off-by: Andrew Victor <andrew@sanpeople.com>
Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/mmc/at91_mci.c | 170 |
1 files changed, 81 insertions, 89 deletions
diff --git a/drivers/mmc/at91_mci.c b/drivers/mmc/at91_mci.c index 4633dbc9a90f..cc0546998367 100644 --- a/drivers/mmc/at91_mci.c +++ b/drivers/mmc/at91_mci.c | |||
@@ -87,25 +87,9 @@ static struct clk *mci_clk; | |||
87 | 87 | ||
88 | 88 | ||
89 | 89 | ||
90 | /* | 90 | #define at91_mci_read(host, reg) __raw_readl((host)->baseaddr + (reg)) |
91 | * Read from a MCI register. | 91 | #define at91_mci_write(host, reg, val) __raw_writel((val), (host)->baseaddr + (reg)) |
92 | */ | ||
93 | static inline unsigned long at91_mci_read(unsigned int reg) | ||
94 | { | ||
95 | void __iomem *mci_base = (void __iomem *)AT91_VA_BASE_MCI; | ||
96 | 92 | ||
97 | return __raw_readl(mci_base + reg); | ||
98 | } | ||
99 | |||
100 | /* | ||
101 | * Write to a MCI register. | ||
102 | */ | ||
103 | static inline void at91_mci_write(unsigned int reg, unsigned long value) | ||
104 | { | ||
105 | void __iomem *mci_base = (void __iomem *)AT91_VA_BASE_MCI; | ||
106 | |||
107 | __raw_writel(value, mci_base + reg); | ||
108 | } | ||
109 | 93 | ||
110 | /* | 94 | /* |
111 | * Low level type for this driver | 95 | * Low level type for this driver |
@@ -116,6 +100,8 @@ struct at91mci_host | |||
116 | struct mmc_command *cmd; | 100 | struct mmc_command *cmd; |
117 | struct mmc_request *request; | 101 | struct mmc_request *request; |
118 | 102 | ||
103 | void __iomem *baseaddr; | ||
104 | |||
119 | struct at91_mmc_data *board; | 105 | struct at91_mmc_data *board; |
120 | int present; | 106 | int present; |
121 | 107 | ||
@@ -217,13 +203,13 @@ static void at91mci_pre_dma_read(struct at91mci_host *host) | |||
217 | 203 | ||
218 | /* Check to see if this needs filling */ | 204 | /* Check to see if this needs filling */ |
219 | if (i == 0) { | 205 | if (i == 0) { |
220 | if (at91_mci_read(AT91_PDC_RCR) != 0) { | 206 | if (at91_mci_read(host, AT91_PDC_RCR) != 0) { |
221 | pr_debug("Transfer active in current\n"); | 207 | pr_debug("Transfer active in current\n"); |
222 | continue; | 208 | continue; |
223 | } | 209 | } |
224 | } | 210 | } |
225 | else { | 211 | else { |
226 | if (at91_mci_read(AT91_PDC_RNCR) != 0) { | 212 | if (at91_mci_read(host, AT91_PDC_RNCR) != 0) { |
227 | pr_debug("Transfer active in next\n"); | 213 | pr_debug("Transfer active in next\n"); |
228 | continue; | 214 | continue; |
229 | } | 215 | } |
@@ -240,12 +226,12 @@ static void at91mci_pre_dma_read(struct at91mci_host *host) | |||
240 | pr_debug("dma address = %08X, length = %d\n", sg->dma_address, sg->length); | 226 | pr_debug("dma address = %08X, length = %d\n", sg->dma_address, sg->length); |
241 | 227 | ||
242 | if (i == 0) { | 228 | if (i == 0) { |
243 | at91_mci_write(AT91_PDC_RPR, sg->dma_address); | 229 | at91_mci_write(host, AT91_PDC_RPR, sg->dma_address); |
244 | at91_mci_write(AT91_PDC_RCR, sg->length / 4); | 230 | at91_mci_write(host, AT91_PDC_RCR, sg->length / 4); |
245 | } | 231 | } |
246 | else { | 232 | else { |
247 | at91_mci_write(AT91_PDC_RNPR, sg->dma_address); | 233 | at91_mci_write(host, AT91_PDC_RNPR, sg->dma_address); |
248 | at91_mci_write(AT91_PDC_RNCR, sg->length / 4); | 234 | at91_mci_write(host, AT91_PDC_RNCR, sg->length / 4); |
249 | } | 235 | } |
250 | } | 236 | } |
251 | 237 | ||
@@ -308,8 +294,8 @@ static void at91mci_post_dma_read(struct at91mci_host *host) | |||
308 | if (host->transfer_index < data->sg_len) | 294 | if (host->transfer_index < data->sg_len) |
309 | at91mci_pre_dma_read(host); | 295 | at91mci_pre_dma_read(host); |
310 | else { | 296 | else { |
311 | at91_mci_write(AT91_MCI_IER, AT91_MCI_RXBUFF); | 297 | at91_mci_write(host, AT91_MCI_IER, AT91_MCI_RXBUFF); |
312 | at91_mci_write(AT91_PDC_PTCR, AT91_PDC_RXTDIS | AT91_PDC_TXTDIS); | 298 | at91_mci_write(host, AT91_PDC_PTCR, AT91_PDC_RXTDIS | AT91_PDC_TXTDIS); |
313 | } | 299 | } |
314 | 300 | ||
315 | pr_debug("post dma read done\n"); | 301 | pr_debug("post dma read done\n"); |
@@ -326,11 +312,11 @@ static void at91_mci_handle_transmitted(struct at91mci_host *host) | |||
326 | pr_debug("Handling the transmit\n"); | 312 | pr_debug("Handling the transmit\n"); |
327 | 313 | ||
328 | /* Disable the transfer */ | 314 | /* Disable the transfer */ |
329 | at91_mci_write(AT91_PDC_PTCR, AT91_PDC_RXTDIS | AT91_PDC_TXTDIS); | 315 | at91_mci_write(host, AT91_PDC_PTCR, AT91_PDC_RXTDIS | AT91_PDC_TXTDIS); |
330 | 316 | ||
331 | /* Now wait for cmd ready */ | 317 | /* Now wait for cmd ready */ |
332 | at91_mci_write(AT91_MCI_IDR, AT91_MCI_TXBUFE); | 318 | at91_mci_write(host, AT91_MCI_IDR, AT91_MCI_TXBUFE); |
333 | at91_mci_write(AT91_MCI_IER, AT91_MCI_NOTBUSY); | 319 | at91_mci_write(host, AT91_MCI_IER, AT91_MCI_NOTBUSY); |
334 | 320 | ||
335 | cmd = host->cmd; | 321 | cmd = host->cmd; |
336 | if (!cmd) return; | 322 | if (!cmd) return; |
@@ -344,21 +330,21 @@ static void at91_mci_handle_transmitted(struct at91mci_host *host) | |||
344 | /* | 330 | /* |
345 | * Enable the controller | 331 | * Enable the controller |
346 | */ | 332 | */ |
347 | static void at91_mci_enable(void) | 333 | static void at91_mci_enable(struct at91mci_host *host) |
348 | { | 334 | { |
349 | at91_mci_write(AT91_MCI_CR, AT91_MCI_MCIEN); | 335 | at91_mci_write(host, AT91_MCI_CR, AT91_MCI_MCIEN); |
350 | at91_mci_write(AT91_MCI_IDR, 0xFFFFFFFF); | 336 | at91_mci_write(host, AT91_MCI_IDR, 0xFFFFFFFF); |
351 | at91_mci_write(AT91_MCI_DTOR, AT91_MCI_DTOMUL_1M | AT91_MCI_DTOCYC); | 337 | at91_mci_write(host, AT91_MCI_DTOR, AT91_MCI_DTOMUL_1M | AT91_MCI_DTOCYC); |
352 | at91_mci_write(AT91_MCI_MR, 0x834A); | 338 | at91_mci_write(host, AT91_MCI_MR, 0x834A); |
353 | at91_mci_write(AT91_MCI_SDCR, 0x0); | 339 | at91_mci_write(host, AT91_MCI_SDCR, 0x0); |
354 | } | 340 | } |
355 | 341 | ||
356 | /* | 342 | /* |
357 | * Disable the controller | 343 | * Disable the controller |
358 | */ | 344 | */ |
359 | static void at91_mci_disable(void) | 345 | static void at91_mci_disable(struct at91mci_host *host) |
360 | { | 346 | { |
361 | at91_mci_write(AT91_MCI_CR, AT91_MCI_MCIDIS | AT91_MCI_SWRST); | 347 | at91_mci_write(host, AT91_MCI_CR, AT91_MCI_MCIDIS | AT91_MCI_SWRST); |
362 | } | 348 | } |
363 | 349 | ||
364 | /* | 350 | /* |
@@ -378,13 +364,13 @@ static unsigned int at91_mci_send_command(struct at91mci_host *host, struct mmc_ | |||
378 | 364 | ||
379 | /* Not sure if this is needed */ | 365 | /* Not sure if this is needed */ |
380 | #if 0 | 366 | #if 0 |
381 | if ((at91_mci_read(AT91_MCI_SR) & AT91_MCI_RTOE) && (cmd->opcode == 1)) { | 367 | if ((at91_mci_read(host, AT91_MCI_SR) & AT91_MCI_RTOE) && (cmd->opcode == 1)) { |
382 | pr_debug("Clearing timeout\n"); | 368 | pr_debug("Clearing timeout\n"); |
383 | at91_mci_write(AT91_MCI_ARGR, 0); | 369 | at91_mci_write(host, AT91_MCI_ARGR, 0); |
384 | at91_mci_write(AT91_MCI_CMDR, AT91_MCI_OPDCMD); | 370 | at91_mci_write(host, AT91_MCI_CMDR, AT91_MCI_OPDCMD); |
385 | while (!(at91_mci_read(AT91_MCI_SR) & AT91_MCI_CMDRDY)) { | 371 | while (!(at91_mci_read(host, AT91_MCI_SR) & AT91_MCI_CMDRDY)) { |
386 | /* spin */ | 372 | /* spin */ |
387 | pr_debug("Clearing: SR = %08X\n", at91_mci_read(AT91_MCI_SR)); | 373 | pr_debug("Clearing: SR = %08X\n", at91_mci_read(host, AT91_MCI_SR)); |
388 | } | 374 | } |
389 | } | 375 | } |
390 | #endif | 376 | #endif |
@@ -432,31 +418,31 @@ static unsigned int at91_mci_send_command(struct at91mci_host *host, struct mmc_ | |||
432 | * Set the arguments and send the command | 418 | * Set the arguments and send the command |
433 | */ | 419 | */ |
434 | pr_debug("Sending command %d as %08X, arg = %08X, blocks = %d, length = %d (MR = %08lX)\n", | 420 | pr_debug("Sending command %d as %08X, arg = %08X, blocks = %d, length = %d (MR = %08lX)\n", |
435 | cmd->opcode, cmdr, cmd->arg, blocks, block_length, at91_mci_read(AT91_MCI_MR)); | 421 | cmd->opcode, cmdr, cmd->arg, blocks, block_length, at91_mci_read(host, AT91_MCI_MR)); |
436 | 422 | ||
437 | if (!data) { | 423 | if (!data) { |
438 | at91_mci_write(AT91_PDC_PTCR, AT91_PDC_TXTDIS | AT91_PDC_RXTDIS); | 424 | at91_mci_write(host, AT91_PDC_PTCR, AT91_PDC_TXTDIS | AT91_PDC_RXTDIS); |
439 | at91_mci_write(AT91_PDC_RPR, 0); | 425 | at91_mci_write(host, AT91_PDC_RPR, 0); |
440 | at91_mci_write(AT91_PDC_RCR, 0); | 426 | at91_mci_write(host, AT91_PDC_RCR, 0); |
441 | at91_mci_write(AT91_PDC_RNPR, 0); | 427 | at91_mci_write(host, AT91_PDC_RNPR, 0); |
442 | at91_mci_write(AT91_PDC_RNCR, 0); | 428 | at91_mci_write(host, AT91_PDC_RNCR, 0); |
443 | at91_mci_write(AT91_PDC_TPR, 0); | 429 | at91_mci_write(host, AT91_PDC_TPR, 0); |
444 | at91_mci_write(AT91_PDC_TCR, 0); | 430 | at91_mci_write(host, AT91_PDC_TCR, 0); |
445 | at91_mci_write(AT91_PDC_TNPR, 0); | 431 | at91_mci_write(host, AT91_PDC_TNPR, 0); |
446 | at91_mci_write(AT91_PDC_TNCR, 0); | 432 | at91_mci_write(host, AT91_PDC_TNCR, 0); |
447 | 433 | ||
448 | at91_mci_write(AT91_MCI_ARGR, cmd->arg); | 434 | at91_mci_write(host, AT91_MCI_ARGR, cmd->arg); |
449 | at91_mci_write(AT91_MCI_CMDR, cmdr); | 435 | at91_mci_write(host, AT91_MCI_CMDR, cmdr); |
450 | return AT91_MCI_CMDRDY; | 436 | return AT91_MCI_CMDRDY; |
451 | } | 437 | } |
452 | 438 | ||
453 | mr = at91_mci_read(AT91_MCI_MR) & 0x7fff; /* zero block length and PDC mode */ | 439 | mr = at91_mci_read(host, AT91_MCI_MR) & 0x7fff; /* zero block length and PDC mode */ |
454 | at91_mci_write(AT91_MCI_MR, mr | (block_length << 16) | AT91_MCI_PDCMODE); | 440 | at91_mci_write(host, AT91_MCI_MR, mr | (block_length << 16) | AT91_MCI_PDCMODE); |
455 | 441 | ||
456 | /* | 442 | /* |
457 | * Disable the PDC controller | 443 | * Disable the PDC controller |
458 | */ | 444 | */ |
459 | at91_mci_write(AT91_PDC_PTCR, AT91_PDC_RXTDIS | AT91_PDC_TXTDIS); | 445 | at91_mci_write(host, AT91_PDC_PTCR, AT91_PDC_RXTDIS | AT91_PDC_TXTDIS); |
460 | 446 | ||
461 | if (cmdr & AT91_MCI_TRCMD_START) { | 447 | if (cmdr & AT91_MCI_TRCMD_START) { |
462 | data->bytes_xfered = 0; | 448 | data->bytes_xfered = 0; |
@@ -485,8 +471,8 @@ static unsigned int at91_mci_send_command(struct at91mci_host *host, struct mmc_ | |||
485 | 471 | ||
486 | pr_debug("Transmitting %d bytes\n", host->total_length); | 472 | pr_debug("Transmitting %d bytes\n", host->total_length); |
487 | 473 | ||
488 | at91_mci_write(AT91_PDC_TPR, host->physical_address); | 474 | at91_mci_write(host, AT91_PDC_TPR, host->physical_address); |
489 | at91_mci_write(AT91_PDC_TCR, host->total_length / 4); | 475 | at91_mci_write(host, AT91_PDC_TCR, host->total_length / 4); |
490 | ier = AT91_MCI_TXBUFE; | 476 | ier = AT91_MCI_TXBUFE; |
491 | } | 477 | } |
492 | } | 478 | } |
@@ -496,14 +482,14 @@ static unsigned int at91_mci_send_command(struct at91mci_host *host, struct mmc_ | |||
496 | * the data sheet says | 482 | * the data sheet says |
497 | */ | 483 | */ |
498 | 484 | ||
499 | at91_mci_write(AT91_MCI_ARGR, cmd->arg); | 485 | at91_mci_write(host, AT91_MCI_ARGR, cmd->arg); |
500 | at91_mci_write(AT91_MCI_CMDR, cmdr); | 486 | at91_mci_write(host, AT91_MCI_CMDR, cmdr); |
501 | 487 | ||
502 | if (cmdr & AT91_MCI_TRCMD_START) { | 488 | if (cmdr & AT91_MCI_TRCMD_START) { |
503 | if (cmdr & AT91_MCI_TRDIR) | 489 | if (cmdr & AT91_MCI_TRDIR) |
504 | at91_mci_write(AT91_PDC_PTCR, AT91_PDC_RXTEN); | 490 | at91_mci_write(host, AT91_PDC_PTCR, AT91_PDC_RXTEN); |
505 | else | 491 | else |
506 | at91_mci_write(AT91_PDC_PTCR, AT91_PDC_TXTEN); | 492 | at91_mci_write(host, AT91_PDC_PTCR, AT91_PDC_TXTEN); |
507 | } | 493 | } |
508 | return ier; | 494 | return ier; |
509 | } | 495 | } |
@@ -520,7 +506,7 @@ static void at91mci_process_command(struct at91mci_host *host, struct mmc_comman | |||
520 | pr_debug("setting ier to %08X\n", ier); | 506 | pr_debug("setting ier to %08X\n", ier); |
521 | 507 | ||
522 | /* Stop on errors or the required value */ | 508 | /* Stop on errors or the required value */ |
523 | at91_mci_write(AT91_MCI_IER, 0xffff0000 | ier); | 509 | at91_mci_write(host, AT91_MCI_IER, 0xffff0000 | ier); |
524 | } | 510 | } |
525 | 511 | ||
526 | /* | 512 | /* |
@@ -548,19 +534,19 @@ static void at91mci_completed_command(struct at91mci_host *host) | |||
548 | struct mmc_command *cmd = host->cmd; | 534 | struct mmc_command *cmd = host->cmd; |
549 | unsigned int status; | 535 | unsigned int status; |
550 | 536 | ||
551 | at91_mci_write(AT91_MCI_IDR, 0xffffffff); | 537 | at91_mci_write(host, AT91_MCI_IDR, 0xffffffff); |
552 | 538 | ||
553 | cmd->resp[0] = at91_mci_read(AT91_MCI_RSPR(0)); | 539 | cmd->resp[0] = at91_mci_read(host, AT91_MCI_RSPR(0)); |
554 | cmd->resp[1] = at91_mci_read(AT91_MCI_RSPR(1)); | 540 | cmd->resp[1] = at91_mci_read(host, AT91_MCI_RSPR(1)); |
555 | cmd->resp[2] = at91_mci_read(AT91_MCI_RSPR(2)); | 541 | cmd->resp[2] = at91_mci_read(host, AT91_MCI_RSPR(2)); |
556 | cmd->resp[3] = at91_mci_read(AT91_MCI_RSPR(3)); | 542 | cmd->resp[3] = at91_mci_read(host, AT91_MCI_RSPR(3)); |
557 | 543 | ||
558 | if (host->buffer) { | 544 | if (host->buffer) { |
559 | dma_free_coherent(NULL, host->total_length, host->buffer, host->physical_address); | 545 | dma_free_coherent(NULL, host->total_length, host->buffer, host->physical_address); |
560 | host->buffer = NULL; | 546 | host->buffer = NULL; |
561 | } | 547 | } |
562 | 548 | ||
563 | status = at91_mci_read(AT91_MCI_SR); | 549 | status = at91_mci_read(host, AT91_MCI_SR); |
564 | 550 | ||
565 | pr_debug("Status = %08X [%08X %08X %08X %08X]\n", | 551 | pr_debug("Status = %08X [%08X %08X %08X %08X]\n", |
566 | status, cmd->resp[0], cmd->resp[1], cmd->resp[2], cmd->resp[3]); | 552 | status, cmd->resp[0], cmd->resp[1], cmd->resp[2], cmd->resp[3]); |
@@ -617,12 +603,12 @@ static void at91_mci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) | |||
617 | 603 | ||
618 | if (ios->clock == 0) { | 604 | if (ios->clock == 0) { |
619 | /* Disable the MCI controller */ | 605 | /* Disable the MCI controller */ |
620 | at91_mci_write(AT91_MCI_CR, AT91_MCI_MCIDIS); | 606 | at91_mci_write(host, AT91_MCI_CR, AT91_MCI_MCIDIS); |
621 | clkdiv = 0; | 607 | clkdiv = 0; |
622 | } | 608 | } |
623 | else { | 609 | else { |
624 | /* Enable the MCI controller */ | 610 | /* Enable the MCI controller */ |
625 | at91_mci_write(AT91_MCI_CR, AT91_MCI_MCIEN); | 611 | at91_mci_write(host, AT91_MCI_CR, AT91_MCI_MCIEN); |
626 | 612 | ||
627 | if ((at91_master_clock % (ios->clock * 2)) == 0) | 613 | if ((at91_master_clock % (ios->clock * 2)) == 0) |
628 | clkdiv = ((at91_master_clock / ios->clock) / 2) - 1; | 614 | clkdiv = ((at91_master_clock / ios->clock) / 2) - 1; |
@@ -634,15 +620,15 @@ static void at91_mci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) | |||
634 | } | 620 | } |
635 | if (ios->bus_width == MMC_BUS_WIDTH_4 && host->board->wire4) { | 621 | if (ios->bus_width == MMC_BUS_WIDTH_4 && host->board->wire4) { |
636 | pr_debug("MMC: Setting controller bus width to 4\n"); | 622 | pr_debug("MMC: Setting controller bus width to 4\n"); |
637 | at91_mci_write(AT91_MCI_SDCR, at91_mci_read(AT91_MCI_SDCR) | AT91_MCI_SDCBUS); | 623 | at91_mci_write(host, AT91_MCI_SDCR, at91_mci_read(host, AT91_MCI_SDCR) | AT91_MCI_SDCBUS); |
638 | } | 624 | } |
639 | else { | 625 | else { |
640 | pr_debug("MMC: Setting controller bus width to 1\n"); | 626 | pr_debug("MMC: Setting controller bus width to 1\n"); |
641 | at91_mci_write(AT91_MCI_SDCR, at91_mci_read(AT91_MCI_SDCR) & ~AT91_MCI_SDCBUS); | 627 | at91_mci_write(host, AT91_MCI_SDCR, at91_mci_read(host, AT91_MCI_SDCR) & ~AT91_MCI_SDCBUS); |
642 | } | 628 | } |
643 | 629 | ||
644 | /* Set the clock divider */ | 630 | /* Set the clock divider */ |
645 | at91_mci_write(AT91_MCI_MR, (at91_mci_read(AT91_MCI_MR) & ~AT91_MCI_CLKDIV) | clkdiv); | 631 | at91_mci_write(host, AT91_MCI_MR, (at91_mci_read(host, AT91_MCI_MR) & ~AT91_MCI_CLKDIV) | clkdiv); |
646 | 632 | ||
647 | /* maybe switch power to the card */ | 633 | /* maybe switch power to the card */ |
648 | if (host->board->vcc_pin) { | 634 | if (host->board->vcc_pin) { |
@@ -668,14 +654,14 @@ static irqreturn_t at91_mci_irq(int irq, void *devid) | |||
668 | 654 | ||
669 | unsigned int int_status; | 655 | unsigned int int_status; |
670 | 656 | ||
671 | int_status = at91_mci_read(AT91_MCI_SR); | 657 | int_status = at91_mci_read(host, AT91_MCI_SR); |
672 | pr_debug("MCI irq: status = %08X, %08lX, %08lX\n", int_status, at91_mci_read(AT91_MCI_IMR), | 658 | pr_debug("MCI irq: status = %08X, %08lX, %08lX\n", int_status, at91_mci_read(host, AT91_MCI_IMR), |
673 | int_status & at91_mci_read(AT91_MCI_IMR)); | 659 | int_status & at91_mci_read(host, AT91_MCI_IMR)); |
674 | 660 | ||
675 | if ((int_status & at91_mci_read(AT91_MCI_IMR)) & 0xffff0000) | 661 | if ((int_status & at91_mci_read(host, AT91_MCI_IMR)) & 0xffff0000) |
676 | completed = 1; | 662 | completed = 1; |
677 | 663 | ||
678 | int_status &= at91_mci_read(AT91_MCI_IMR); | 664 | int_status &= at91_mci_read(host, AT91_MCI_IMR); |
679 | 665 | ||
680 | if (int_status & AT91_MCI_UNRE) | 666 | if (int_status & AT91_MCI_UNRE) |
681 | pr_debug("MMC: Underrun error\n"); | 667 | pr_debug("MMC: Underrun error\n"); |
@@ -705,7 +691,7 @@ static irqreturn_t at91_mci_irq(int irq, void *devid) | |||
705 | 691 | ||
706 | if (int_status & AT91_MCI_RXBUFF) { | 692 | if (int_status & AT91_MCI_RXBUFF) { |
707 | pr_debug("RX buffer full\n"); | 693 | pr_debug("RX buffer full\n"); |
708 | at91_mci_write(AT91_MCI_IER, AT91_MCI_CMDRDY); | 694 | at91_mci_write(host, AT91_MCI_IER, AT91_MCI_CMDRDY); |
709 | } | 695 | } |
710 | 696 | ||
711 | if (int_status & AT91_MCI_ENDTX) { | 697 | if (int_status & AT91_MCI_ENDTX) { |
@@ -719,7 +705,7 @@ static irqreturn_t at91_mci_irq(int irq, void *devid) | |||
719 | 705 | ||
720 | if (int_status & AT91_MCI_NOTBUSY) { | 706 | if (int_status & AT91_MCI_NOTBUSY) { |
721 | pr_debug("Card is ready\n"); | 707 | pr_debug("Card is ready\n"); |
722 | at91_mci_write(AT91_MCI_IER, AT91_MCI_CMDRDY); | 708 | at91_mci_write(host, AT91_MCI_IER, AT91_MCI_CMDRDY); |
723 | } | 709 | } |
724 | 710 | ||
725 | if (int_status & AT91_MCI_DTIP) { | 711 | if (int_status & AT91_MCI_DTIP) { |
@@ -743,11 +729,11 @@ static irqreturn_t at91_mci_irq(int irq, void *devid) | |||
743 | completed = 1; | 729 | completed = 1; |
744 | } | 730 | } |
745 | } | 731 | } |
746 | at91_mci_write(AT91_MCI_IDR, int_status); | 732 | at91_mci_write(host, AT91_MCI_IDR, int_status); |
747 | 733 | ||
748 | if (completed) { | 734 | if (completed) { |
749 | pr_debug("Completed command\n"); | 735 | pr_debug("Completed command\n"); |
750 | at91_mci_write(AT91_MCI_IDR, 0xffffffff); | 736 | at91_mci_write(host, AT91_MCI_IDR, 0xffffffff); |
751 | at91mci_completed_command(host); | 737 | at91mci_completed_command(host); |
752 | } | 738 | } |
753 | 739 | ||
@@ -769,7 +755,7 @@ static irqreturn_t at91_mmc_det_irq(int irq, void *_host) | |||
769 | present ? "insert" : "remove"); | 755 | present ? "insert" : "remove"); |
770 | if (!present) { | 756 | if (!present) { |
771 | pr_debug("****** Resetting SD-card bus width ******\n"); | 757 | pr_debug("****** Resetting SD-card bus width ******\n"); |
772 | at91_mci_write(AT91_MCI_SDCR, 0); | 758 | at91_mci_write(host, AT91_MCI_SDCR, 0); |
773 | } | 759 | } |
774 | mmc_detect_change(host->mmc, msecs_to_jiffies(100)); | 760 | mmc_detect_change(host->mmc, msecs_to_jiffies(100)); |
775 | } | 761 | } |
@@ -809,8 +795,6 @@ static int at91_mci_probe(struct platform_device *pdev) | |||
809 | int ret; | 795 | int ret; |
810 | 796 | ||
811 | pr_debug("Probe MCI devices\n"); | 797 | pr_debug("Probe MCI devices\n"); |
812 | at91_mci_disable(); | ||
813 | at91_mci_enable(); | ||
814 | 798 | ||
815 | mmc = mmc_alloc_host(sizeof(struct at91mci_host), &pdev->dev); | 799 | mmc = mmc_alloc_host(sizeof(struct at91mci_host), &pdev->dev); |
816 | if (!mmc) { | 800 | if (!mmc) { |
@@ -848,6 +832,14 @@ static int at91_mci_probe(struct platform_device *pdev) | |||
848 | } | 832 | } |
849 | clk_enable(mci_clk); /* Enable the peripheral clock */ | 833 | clk_enable(mci_clk); /* Enable the peripheral clock */ |
850 | 834 | ||
835 | host->baseaddr = (void __iomem *)AT91_VA_BASE_MCI; | ||
836 | |||
837 | /* | ||
838 | * Reset hardware | ||
839 | */ | ||
840 | at91_mci_disable(host); | ||
841 | at91_mci_enable(host); | ||
842 | |||
851 | /* | 843 | /* |
852 | * Allocate the MCI interrupt | 844 | * Allocate the MCI interrupt |
853 | */ | 845 | */ |
@@ -906,7 +898,7 @@ static int at91_mci_remove(struct platform_device *pdev) | |||
906 | } | 898 | } |
907 | 899 | ||
908 | mmc_remove_host(mmc); | 900 | mmc_remove_host(mmc); |
909 | at91_mci_disable(); | 901 | at91_mci_disable(host); |
910 | free_irq(AT91RM9200_ID_MCI, host); | 902 | free_irq(AT91RM9200_ID_MCI, host); |
911 | mmc_free_host(mmc); | 903 | mmc_free_host(mmc); |
912 | 904 | ||