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authorJ.R. Mauro <jrm8005@gmail.com>2008-10-05 20:38:52 -0400
committerGreg Kroah-Hartman <gregkh@suse.de>2008-10-10 18:31:14 -0400
commit5c7514e0610249a4e7710eefd801c2b0442eb8ea (patch)
tree810f3d8989615d52d8bdfe7ffbb1b9717dfb7de4 /drivers
parentf25fda728dfb5c23d1147279fc6a537451603369 (diff)
Staging: Lindent sxg.c
Lindent drivers/staging/sxg/sxg.c Signed-off by: J.R. Mauro <jrm8005@gmail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/staging/sxg/sxg.c146
1 files changed, 81 insertions, 65 deletions
diff --git a/drivers/staging/sxg/sxg.c b/drivers/staging/sxg/sxg.c
index 0117d5129402..6ccbee875ab3 100644
--- a/drivers/staging/sxg/sxg.c
+++ b/drivers/staging/sxg/sxg.c
@@ -80,9 +80,15 @@
80#include "sxgphycode.h" 80#include "sxgphycode.h"
81#include "saharadbgdownload.h" 81#include "saharadbgdownload.h"
82 82
83static int sxg_allocate_buffer_memory(p_adapter_t adapter, u32 Size, SXG_BUFFER_TYPE BufferType); 83static int sxg_allocate_buffer_memory(p_adapter_t adapter, u32 Size,
84static void sxg_allocate_rcvblock_complete(p_adapter_t adapter, void * RcvBlock, dma_addr_t PhysicalAddress, u32 Length); 84 SXG_BUFFER_TYPE BufferType);
85static void sxg_allocate_sgl_buffer_complete(p_adapter_t adapter, PSXG_SCATTER_GATHER SxgSgl, dma_addr_t PhysicalAddress, u32 Length); 85static void sxg_allocate_rcvblock_complete(p_adapter_t adapter, void *RcvBlock,
86 dma_addr_t PhysicalAddress,
87 u32 Length);
88static void sxg_allocate_sgl_buffer_complete(p_adapter_t adapter,
89 PSXG_SCATTER_GATHER SxgSgl,
90 dma_addr_t PhysicalAddress,
91 u32 Length);
86 92
87static void sxg_mcast_init_crc32(void); 93static void sxg_mcast_init_crc32(void);
88 94
@@ -100,13 +106,13 @@ static void sxg_complete_slow_send(p_adapter_t adapter);
100static struct sk_buff *sxg_slow_receive(p_adapter_t adapter, PSXG_EVENT Event); 106static struct sk_buff *sxg_slow_receive(p_adapter_t adapter, PSXG_EVENT Event);
101static void sxg_process_rcv_error(p_adapter_t adapter, u32 ErrorStatus); 107static void sxg_process_rcv_error(p_adapter_t adapter, u32 ErrorStatus);
102static bool sxg_mac_filter(p_adapter_t adapter, 108static bool sxg_mac_filter(p_adapter_t adapter,
103 p_ether_header EtherHdr, ushort length); 109 p_ether_header EtherHdr, ushort length);
104 110
105#if SLIC_GET_STATS_ENABLED 111#if SLIC_GET_STATS_ENABLED
106static struct net_device_stats *sxg_get_stats(p_net_device dev); 112static struct net_device_stats *sxg_get_stats(p_net_device dev);
107#endif 113#endif
108 114
109static int sxg_mac_set_address(p_net_device dev, void * ptr); 115static int sxg_mac_set_address(p_net_device dev, void *ptr);
110 116
111static void sxg_adapter_set_hwaddr(p_adapter_t adapter); 117static void sxg_adapter_set_hwaddr(p_adapter_t adapter);
112 118
@@ -115,20 +121,19 @@ static void sxg_mcast_set_mask(p_adapter_t adapter);
115 121
116static int sxg_initialize_adapter(p_adapter_t adapter); 122static int sxg_initialize_adapter(p_adapter_t adapter);
117static void sxg_stock_rcv_buffers(p_adapter_t adapter); 123static void sxg_stock_rcv_buffers(p_adapter_t adapter);
118static void sxg_complete_descriptor_blocks(p_adapter_t adapter, unsigned char Index); 124static void sxg_complete_descriptor_blocks(p_adapter_t adapter,
125 unsigned char Index);
119static int sxg_initialize_link(p_adapter_t adapter); 126static int sxg_initialize_link(p_adapter_t adapter);
120static int sxg_phy_init(p_adapter_t adapter); 127static int sxg_phy_init(p_adapter_t adapter);
121static void sxg_link_event(p_adapter_t adapter); 128static void sxg_link_event(p_adapter_t adapter);
122static SXG_LINK_STATE sxg_get_link_state(p_adapter_t adapter); 129static SXG_LINK_STATE sxg_get_link_state(p_adapter_t adapter);
123static void sxg_link_state(p_adapter_t adapter, SXG_LINK_STATE LinkState); 130static void sxg_link_state(p_adapter_t adapter, SXG_LINK_STATE LinkState);
124static int sxg_write_mdio_reg(p_adapter_t adapter, 131static int sxg_write_mdio_reg(p_adapter_t adapter,
125 u32 DevAddr, u32 RegAddr, u32 Value); 132 u32 DevAddr, u32 RegAddr, u32 Value);
126static int sxg_read_mdio_reg(p_adapter_t adapter, 133static int sxg_read_mdio_reg(p_adapter_t adapter,
127 u32 DevAddr, u32 RegAddr, u32 * pValue); 134 u32 DevAddr, u32 RegAddr, u32 *pValue);
128static void sxg_mcast_set_list(p_net_device dev); 135static void sxg_mcast_set_list(p_net_device dev);
129 136
130
131
132#define XXXTODO 0 137#define XXXTODO 0
133 138
134static unsigned int sxg_first_init = 1; 139static unsigned int sxg_first_init = 1;
@@ -164,6 +169,7 @@ static struct pci_device_id sxg_pci_tbl[] __devinitdata = {
164 {PCI_DEVICE(SXG_VENDOR_ID, SXG_DEVICE_ID)}, 169 {PCI_DEVICE(SXG_VENDOR_ID, SXG_DEVICE_ID)},
165 {0,} 170 {0,}
166}; 171};
172
167MODULE_DEVICE_TABLE(pci, sxg_pci_tbl); 173MODULE_DEVICE_TABLE(pci, sxg_pci_tbl);
168 174
169/*********************************************************************** 175/***********************************************************************
@@ -242,7 +248,7 @@ static bool sxg_download_microcode(p_adapter_t adapter, SXG_UCODE_SEL UcodeSel)
242 PSXG_HW_REGS HwRegs = adapter->HwRegs; 248 PSXG_HW_REGS HwRegs = adapter->HwRegs;
243 u32 Section; 249 u32 Section;
244 u32 ThisSectionSize; 250 u32 ThisSectionSize;
245 u32 * Instruction = NULL; 251 u32 *Instruction = NULL;
246 u32 BaseAddress, AddressOffset, Address; 252 u32 BaseAddress, AddressOffset, Address;
247// u32 Failure; 253// u32 Failure;
248 u32 ValueRead; 254 u32 ValueRead;
@@ -606,7 +612,7 @@ static void sxg_config_pci(struct pci_dev *pcidev)
606 PCI_COMMAND_MASTER | // Bus master enable 612 PCI_COMMAND_MASTER | // Bus master enable
607 PCI_COMMAND_INVALIDATE | // Memory write and invalidate 613 PCI_COMMAND_INVALIDATE | // Memory write and invalidate
608 PCI_COMMAND_PARITY | // Parity error response 614 PCI_COMMAND_PARITY | // Parity error response
609 PCI_COMMAND_SERR | // System ERR 615 PCI_COMMAND_SERR | // System ERR
610 PCI_COMMAND_FAST_BACK); // Fast back-to-back 616 PCI_COMMAND_FAST_BACK); // Fast back-to-back
611 if (pci_command != new_command) { 617 if (pci_command != new_command) {
612 DBG_ERROR("%s -- Updating PCI COMMAND register %4.4x->%4.4x.\n", 618 DBG_ERROR("%s -- Updating PCI COMMAND register %4.4x->%4.4x.\n",
@@ -695,17 +701,19 @@ static int sxg_entry_probe(struct pci_dev *pcidev,
695 mmio_start, mmio_len); 701 mmio_start, mmio_len);
696 702
697 memmapped_ioaddr = ioremap(mmio_start, mmio_len); 703 memmapped_ioaddr = ioremap(mmio_start, mmio_len);
698 DBG_ERROR("sxg: %s MEMMAPPED_IOADDR [%p]\n", __FUNCTION__, memmapped_ioaddr); 704 DBG_ERROR("sxg: %s MEMMAPPED_IOADDR [%p]\n", __FUNCTION__,
705 memmapped_ioaddr);
699 if (!memmapped_ioaddr) { 706 if (!memmapped_ioaddr) {
700 DBG_ERROR("%s cannot remap MMIO region %lx @ %lx\n", 707 DBG_ERROR("%s cannot remap MMIO region %lx @ %lx\n",
701 __FUNCTION__, mmio_len, mmio_start); 708 __FUNCTION__, mmio_len, mmio_start);
702 goto err_out_free_mmio_region; 709 goto err_out_free_mmio_region;
703 } 710 }
704 711
705 DBG_ERROR("sxg: %s found Alacritech SXG PCI, MMIO at %p, start[%lx] len[%lx], IRQ %d.\n", 712 DBG_ERROR
713 ("sxg: %s found Alacritech SXG PCI, MMIO at %p, start[%lx] len[%lx], IRQ %d.\n",
706 __func__, memmapped_ioaddr, mmio_start, mmio_len, pcidev->irq); 714 __func__, memmapped_ioaddr, mmio_start, mmio_len, pcidev->irq);
707 715
708 adapter->HwRegs = (void *) memmapped_ioaddr; 716 adapter->HwRegs = (void *)memmapped_ioaddr;
709 adapter->base_addr = memmapped_ioaddr; 717 adapter->base_addr = memmapped_ioaddr;
710 718
711 mmio_start = pci_resource_start(pcidev, 2); 719 mmio_start = pci_resource_start(pcidev, 2);
@@ -715,7 +723,8 @@ static int sxg_entry_probe(struct pci_dev *pcidev,
715 mmio_start, mmio_len); 723 mmio_start, mmio_len);
716 724
717 memmapped_ioaddr = ioremap(mmio_start, mmio_len); 725 memmapped_ioaddr = ioremap(mmio_start, mmio_len);
718 DBG_ERROR("sxg: %s MEMMAPPED_IOADDR [%p]\n", __func__, memmapped_ioaddr); 726 DBG_ERROR("sxg: %s MEMMAPPED_IOADDR [%p]\n", __func__,
727 memmapped_ioaddr);
719 if (!memmapped_ioaddr) { 728 if (!memmapped_ioaddr) {
720 DBG_ERROR("%s cannot remap MMIO region %lx @ %lx\n", 729 DBG_ERROR("%s cannot remap MMIO region %lx @ %lx\n",
721 __FUNCTION__, mmio_len, mmio_start); 730 __FUNCTION__, mmio_len, mmio_start);
@@ -845,7 +854,6 @@ static int sxg_entry_probe(struct pci_dev *pcidev,
845 return -ENODEV; 854 return -ENODEV;
846} 855}
847 856
848
849/*********************************************************************** 857/***********************************************************************
850 * LINE BASE Interrupt routines.. 858 * LINE BASE Interrupt routines..
851 ***********************************************************************/ 859 ***********************************************************************/
@@ -957,7 +965,8 @@ static irqreturn_t sxg_isr(int irq, void *dev_id)
957 PSXG_EVENT_RING EventRing = &adapter->EventRings[i]; 965 PSXG_EVENT_RING EventRing = &adapter->EventRings[i];
958 PSXG_EVENT Event = 966 PSXG_EVENT Event =
959 &EventRing->Ring[adapter->NextEvent[i]]; 967 &EventRing->Ring[adapter->NextEvent[i]];
960 unsigned char Cpu = adapter->RssSystemInfo->RssIdToCpu[i]; 968 unsigned char Cpu =
969 adapter->RssSystemInfo->RssIdToCpu[i];
961 if (Event->Status & EVENT_STATUS_VALID) { 970 if (Event->Status & EVENT_STATUS_VALID) {
962 adapter->IsrDpcsPending++; 971 adapter->IsrDpcsPending++;
963 CpuMask |= (1 << Cpu); 972 CpuMask |= (1 << Cpu);
@@ -1078,7 +1087,8 @@ static int sxg_process_isr(p_adapter_t adapter, u32 MessageId)
1078 if (Isr & SXG_ISR_DEAD) { 1087 if (Isr & SXG_ISR_DEAD) {
1079 // Set aside the crash info and set the adapter state to RESET 1088 // Set aside the crash info and set the adapter state to RESET
1080 adapter->CrashCpu = 1089 adapter->CrashCpu =
1081 (unsigned char) ((Isr & SXG_ISR_CPU) >> SXG_ISR_CPU_SHIFT); 1090 (unsigned char)((Isr & SXG_ISR_CPU) >>
1091 SXG_ISR_CPU_SHIFT);
1082 adapter->CrashLocation = (ushort) (Isr & SXG_ISR_CRASH); 1092 adapter->CrashLocation = (ushort) (Isr & SXG_ISR_CRASH);
1083 adapter->Dead = TRUE; 1093 adapter->Dead = TRUE;
1084 DBG_ERROR("%s: ISR_DEAD %x, CPU: %d\n", __FUNCTION__, 1094 DBG_ERROR("%s: ISR_DEAD %x, CPU: %d\n", __FUNCTION__,
@@ -1286,7 +1296,7 @@ static void sxg_complete_slow_send(p_adapter_t adapter)
1286{ 1296{
1287 PSXG_XMT_RING XmtRing = &adapter->XmtRings[0]; 1297 PSXG_XMT_RING XmtRing = &adapter->XmtRings[0];
1288 PSXG_RING_INFO XmtRingInfo = &adapter->XmtRingZeroInfo; 1298 PSXG_RING_INFO XmtRingInfo = &adapter->XmtRingZeroInfo;
1289 u32 * ContextType; 1299 u32 *ContextType;
1290 PSXG_CMD XmtCmd; 1300 PSXG_CMD XmtCmd;
1291 1301
1292 // NOTE - This lock is dropped and regrabbed in this loop. 1302 // NOTE - This lock is dropped and regrabbed in this loop.
@@ -1380,11 +1390,9 @@ static struct sk_buff *sxg_slow_receive(p_adapter_t adapter, PSXG_EVENT Event)
1380 SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "RcvError", 1390 SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "RcvError",
1381 Event, Event->Status, Event->HostHandle, 0); 1391 Event, Event->Status, Event->HostHandle, 0);
1382 // XXXTODO - Remove this print later 1392 // XXXTODO - Remove this print later
1383 DBG_ERROR("SXG: Receive error %x\n", 1393 DBG_ERROR("SXG: Receive error %x\n", *(u32 *)
1384 *(u32 *)
1385 SXG_RECEIVE_DATA_LOCATION(RcvDataBufferHdr)); 1394 SXG_RECEIVE_DATA_LOCATION(RcvDataBufferHdr));
1386 sxg_process_rcv_error(adapter, 1395 sxg_process_rcv_error(adapter, *(u32 *)
1387 *(u32 *)
1388 SXG_RECEIVE_DATA_LOCATION 1396 SXG_RECEIVE_DATA_LOCATION
1389 (RcvDataBufferHdr)); 1397 (RcvDataBufferHdr));
1390 goto drop; 1398 goto drop;
@@ -1406,8 +1414,7 @@ static struct sk_buff *sxg_slow_receive(p_adapter_t adapter, PSXG_EVENT Event)
1406 // 1414 //
1407 // Dumb-nic frame. See if it passes our mac filter and update stats 1415 // Dumb-nic frame. See if it passes our mac filter and update stats
1408 // 1416 //
1409 if (!sxg_mac_filter(adapter, 1417 if (!sxg_mac_filter(adapter, (p_ether_header)
1410 (p_ether_header)
1411 SXG_RECEIVE_DATA_LOCATION(RcvDataBufferHdr), 1418 SXG_RECEIVE_DATA_LOCATION(RcvDataBufferHdr),
1412 Event->Length)) { 1419 Event->Length)) {
1413 SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "RcvFiltr", 1420 SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "RcvFiltr",
@@ -1527,7 +1534,8 @@ static void sxg_process_rcv_error(p_adapter_t adapter, u32 ErrorStatus)
1527 * Return Value: 1534 * Return Value:
1528 * TRUE if the frame is to be allowed 1535 * TRUE if the frame is to be allowed
1529 */ 1536 */
1530static bool sxg_mac_filter(p_adapter_t adapter, p_ether_header EtherHdr, ushort length) 1537static bool sxg_mac_filter(p_adapter_t adapter, p_ether_header EtherHdr,
1538 ushort length)
1531{ 1539{
1532 bool EqualAddr; 1540 bool EqualAddr;
1533 1541
@@ -1600,7 +1608,8 @@ static int sxg_register_interrupt(p_adapter_t adapter)
1600 ("sxg: %s AllocAdaptRsrcs adapter[%p] dev->irq[%x] %x\n", 1608 ("sxg: %s AllocAdaptRsrcs adapter[%p] dev->irq[%x] %x\n",
1601 __FUNCTION__, adapter, adapter->netdev->irq, NR_IRQS); 1609 __FUNCTION__, adapter, adapter->netdev->irq, NR_IRQS);
1602 1610
1603 spin_unlock_irqrestore(&sxg_global.driver_lock, sxg_global.flags); 1611 spin_unlock_irqrestore(&sxg_global.driver_lock,
1612 sxg_global.flags);
1604 1613
1605 retval = request_irq(adapter->netdev->irq, 1614 retval = request_irq(adapter->netdev->irq,
1606 &sxg_isr, 1615 &sxg_isr,
@@ -1729,7 +1738,6 @@ static int sxg_entry_open(p_net_device dev)
1729 sxg_global.num_sxg_ports_active++; 1738 sxg_global.num_sxg_ports_active++;
1730 adapter->activated = 1; 1739 adapter->activated = 1;
1731 } 1740 }
1732
1733 // Initialize the adapter 1741 // Initialize the adapter
1734 DBG_ERROR("sxg: %s ENTER sxg_initialize_adapter\n", __FUNCTION__); 1742 DBG_ERROR("sxg: %s ENTER sxg_initialize_adapter\n", __FUNCTION__);
1735 status = sxg_initialize_adapter(adapter); 1743 status = sxg_initialize_adapter(adapter);
@@ -1786,7 +1794,7 @@ static void __devexit sxg_entry_remove(struct pci_dev *pcidev)
1786 release_mem_region(mmio_start, mmio_len); 1794 release_mem_region(mmio_start, mmio_len);
1787 1795
1788 DBG_ERROR("sxg: %s iounmap dev->base_addr[%x]\n", __FUNCTION__, 1796 DBG_ERROR("sxg: %s iounmap dev->base_addr[%x]\n", __FUNCTION__,
1789 (unsigned int) dev->base_addr); 1797 (unsigned int)dev->base_addr);
1790 iounmap((char *)dev->base_addr); 1798 iounmap((char *)dev->base_addr);
1791 1799
1792 DBG_ERROR("sxg: %s deallocate device\n", __FUNCTION__); 1800 DBG_ERROR("sxg: %s deallocate device\n", __FUNCTION__);
@@ -1929,7 +1937,7 @@ static int sxg_transmit_packet(p_adapter_t adapter, struct sk_buff *skb)
1929{ 1937{
1930 PSCATTER_GATHER_LIST pSgl; 1938 PSCATTER_GATHER_LIST pSgl;
1931 PSXG_SCATTER_GATHER SxgSgl; 1939 PSXG_SCATTER_GATHER SxgSgl;
1932 void * SglBuffer; 1940 void *SglBuffer;
1933 u32 SglBufferLength; 1941 u32 SglBufferLength;
1934 1942
1935 // The vast majority of work is done in the shared 1943 // The vast majority of work is done in the shared
@@ -2038,7 +2046,9 @@ static void sxg_dumb_sgl(PSCATTER_GATHER_LIST pSgl, PSXG_SCATTER_GATHER SxgSgl)
2038#endif 2046#endif
2039 // Fill in the command 2047 // Fill in the command
2040 // Copy out the first SGE to the command and adjust for offset 2048 // Copy out the first SGE to the command and adjust for offset
2041 phys_addr = pci_map_single(adapter->pcidev, skb->data, skb->len, PCI_DMA_TODEVICE); 2049 phys_addr =
2050 pci_map_single(adapter->pcidev, skb->data, skb->len,
2051 PCI_DMA_TODEVICE);
2042 XmtCmd->Buffer.FirstSgeAddress = SXG_GET_ADDR_HIGH(phys_addr); 2052 XmtCmd->Buffer.FirstSgeAddress = SXG_GET_ADDR_HIGH(phys_addr);
2043 XmtCmd->Buffer.FirstSgeAddress = XmtCmd->Buffer.FirstSgeAddress << 32; 2053 XmtCmd->Buffer.FirstSgeAddress = XmtCmd->Buffer.FirstSgeAddress << 32;
2044 XmtCmd->Buffer.FirstSgeAddress = 2054 XmtCmd->Buffer.FirstSgeAddress =
@@ -2422,7 +2432,8 @@ static SXG_LINK_STATE sxg_get_link_state(p_adapter_t adapter)
2422 return (SXG_LINK_DOWN); 2432 return (SXG_LINK_DOWN);
2423} 2433}
2424 2434
2425static void sxg_indicate_link_state(p_adapter_t adapter, SXG_LINK_STATE LinkState) 2435static void sxg_indicate_link_state(p_adapter_t adapter,
2436 SXG_LINK_STATE LinkState)
2426{ 2437{
2427 if (adapter->LinkState == SXG_LINK_UP) { 2438 if (adapter->LinkState == SXG_LINK_UP) {
2428 DBG_ERROR("%s: LINK now UP, call netif_start_queue\n", 2439 DBG_ERROR("%s: LINK now UP, call netif_start_queue\n",
@@ -2487,11 +2498,11 @@ static void sxg_link_state(p_adapter_t adapter, SXG_LINK_STATE LinkState)
2487 * status 2498 * status
2488 */ 2499 */
2489static int sxg_write_mdio_reg(p_adapter_t adapter, 2500static int sxg_write_mdio_reg(p_adapter_t adapter,
2490 u32 DevAddr, u32 RegAddr, u32 Value) 2501 u32 DevAddr, u32 RegAddr, u32 Value)
2491{ 2502{
2492 PSXG_HW_REGS HwRegs = adapter->HwRegs; 2503 PSXG_HW_REGS HwRegs = adapter->HwRegs;
2493 u32 AddrOp; // Address operation (written to MIIM field reg) 2504 u32 AddrOp; // Address operation (written to MIIM field reg)
2494 u32 WriteOp; // Write operation (written to MIIM field reg) 2505 u32 WriteOp; // Write operation (written to MIIM field reg)
2495 u32 Cmd; // Command (written to MIIM command reg) 2506 u32 Cmd; // Command (written to MIIM command reg)
2496 u32 ValueRead; 2507 u32 ValueRead;
2497 u32 Timeout; 2508 u32 Timeout;
@@ -2577,7 +2588,7 @@ static int sxg_write_mdio_reg(p_adapter_t adapter,
2577 * status 2588 * status
2578 */ 2589 */
2579static int sxg_read_mdio_reg(p_adapter_t adapter, 2590static int sxg_read_mdio_reg(p_adapter_t adapter,
2580 u32 DevAddr, u32 RegAddr, u32 * pValue) 2591 u32 DevAddr, u32 RegAddr, u32 *pValue)
2581{ 2592{
2582 PSXG_HW_REGS HwRegs = adapter->HwRegs; 2593 PSXG_HW_REGS HwRegs = adapter->HwRegs;
2583 u32 AddrOp; // Address operation (written to MIIM field reg) 2594 u32 AddrOp; // Address operation (written to MIIM field reg)
@@ -2698,7 +2709,7 @@ static int sxg_mcast_add_list(p_adapter_t adapter, char *address)
2698 * we must then transpose the value and return bits 30-23. 2709 * we must then transpose the value and return bits 30-23.
2699 * 2710 *
2700 */ 2711 */
2701static u32 sxg_crc_table[256]; /* Table of CRC's for all possible byte values */ 2712static u32 sxg_crc_table[256]; /* Table of CRC's for all possible byte values */
2702static u32 sxg_crc_init; /* Is table initialized */ 2713static u32 sxg_crc_init; /* Is table initialized */
2703 2714
2704/* 2715/*
@@ -2706,7 +2717,7 @@ static u32 sxg_crc_init; /* Is table initialized */
2706 */ 2717 */
2707static void sxg_mcast_init_crc32(void) 2718static void sxg_mcast_init_crc32(void)
2708{ 2719{
2709 u32 c; /* CRC shit reg */ 2720 u32 c; /* CRC shit reg */
2710 u32 e = 0; /* Poly X-or pattern */ 2721 u32 e = 0; /* Poly X-or pattern */
2711 int i; /* counter */ 2722 int i; /* counter */
2712 int k; /* byte being shifted into crc */ 2723 int k; /* byte being shifted into crc */
@@ -2783,7 +2794,7 @@ static void sxg_mcast_set_list(p_net_device dev)
2783 ASSERT(adapter); 2794 ASSERT(adapter);
2784 2795
2785 for (i = 1; i <= mc_count; i++) { 2796 for (i = 1; i <= mc_count; i++) {
2786 addresses = (char *) & mc_list->dmi_addr; 2797 addresses = (char *)&mc_list->dmi_addr;
2787 if (mc_list->dmi_addrlen == 6) { 2798 if (mc_list->dmi_addrlen == 6) {
2788 status = sxg_mcast_add_list(adapter, addresses); 2799 status = sxg_mcast_add_list(adapter, addresses);
2789 if (status != STATUS_SUCCESS) { 2800 if (status != STATUS_SUCCESS) {
@@ -2833,7 +2844,7 @@ static void sxg_mcast_set_mask(p_adapter_t adapter)
2833 PSXG_UCODE_REGS sxg_regs = adapter->UcodeRegs; 2844 PSXG_UCODE_REGS sxg_regs = adapter->UcodeRegs;
2834 2845
2835 DBG_ERROR("%s ENTER (%s) macopts[%x] mask[%llx]\n", __FUNCTION__, 2846 DBG_ERROR("%s ENTER (%s) macopts[%x] mask[%llx]\n", __FUNCTION__,
2836 adapter->netdev->name, (unsigned int) adapter->MacFilter, 2847 adapter->netdev->name, (unsigned int)adapter->MacFilter,
2837 adapter->MulticastMask); 2848 adapter->MulticastMask);
2838 2849
2839 if (adapter->MacFilter & (MAC_ALLMCAST | MAC_PROMISC)) { 2850 if (adapter->MacFilter & (MAC_ALLMCAST | MAC_PROMISC)) {
@@ -2857,12 +2868,10 @@ static void sxg_mcast_set_mask(p_adapter_t adapter)
2857 ((adapter->MulticastMask >> 32) & 0xFFFFFFFF))); 2868 ((adapter->MulticastMask >> 32) & 0xFFFFFFFF)));
2858 2869
2859 WRITE_REG(sxg_regs->McastLow, 2870 WRITE_REG(sxg_regs->McastLow,
2860 (u32) (adapter->MulticastMask & 0xFFFFFFFF), 2871 (u32) (adapter->MulticastMask & 0xFFFFFFFF), FLUSH);
2861 FLUSH);
2862 WRITE_REG(sxg_regs->McastHigh, 2872 WRITE_REG(sxg_regs->McastHigh,
2863 (u32) ((adapter-> 2873 (u32) ((adapter->
2864 MulticastMask >> 32) & 0xFFFFFFFF), 2874 MulticastMask >> 32) & 0xFFFFFFFF), FLUSH);
2865 FLUSH);
2866 } 2875 }
2867} 2876}
2868 2877
@@ -2991,9 +3000,9 @@ void SxgFreeResources(p_adapter_t adapter)
2991 * None. 3000 * None.
2992 */ 3001 */
2993static void sxg_allocate_complete(p_adapter_t adapter, 3002static void sxg_allocate_complete(p_adapter_t adapter,
2994 void *VirtualAddress, 3003 void *VirtualAddress,
2995 dma_addr_t PhysicalAddress, 3004 dma_addr_t PhysicalAddress,
2996 u32 Length, SXG_BUFFER_TYPE Context) 3005 u32 Length, SXG_BUFFER_TYPE Context)
2997{ 3006{
2998 SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "AllocCmp", 3007 SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "AllocCmp",
2999 adapter, VirtualAddress, Length, Context); 3008 adapter, VirtualAddress, Length, Context);
@@ -3008,8 +3017,7 @@ static void sxg_allocate_complete(p_adapter_t adapter,
3008 PhysicalAddress, Length); 3017 PhysicalAddress, Length);
3009 break; 3018 break;
3010 case SXG_BUFFER_TYPE_SGL: 3019 case SXG_BUFFER_TYPE_SGL:
3011 sxg_allocate_sgl_buffer_complete(adapter, 3020 sxg_allocate_sgl_buffer_complete(adapter, (PSXG_SCATTER_GATHER)
3012 (PSXG_SCATTER_GATHER)
3013 VirtualAddress, 3021 VirtualAddress,
3014 PhysicalAddress, Length); 3022 PhysicalAddress, Length);
3015 break; 3023 break;
@@ -3031,10 +3039,10 @@ static void sxg_allocate_complete(p_adapter_t adapter,
3031 * int 3039 * int
3032 */ 3040 */
3033static int sxg_allocate_buffer_memory(p_adapter_t adapter, 3041static int sxg_allocate_buffer_memory(p_adapter_t adapter,
3034 u32 Size, SXG_BUFFER_TYPE BufferType) 3042 u32 Size, SXG_BUFFER_TYPE BufferType)
3035{ 3043{
3036 int status; 3044 int status;
3037 void * Buffer; 3045 void *Buffer;
3038 dma_addr_t pBuffer; 3046 dma_addr_t pBuffer;
3039 3047
3040 SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "AllocMem", 3048 SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "AllocMem",
@@ -3083,8 +3091,9 @@ static int sxg_allocate_buffer_memory(p_adapter_t adapter,
3083 * 3091 *
3084 */ 3092 */
3085static void sxg_allocate_rcvblock_complete(p_adapter_t adapter, 3093static void sxg_allocate_rcvblock_complete(p_adapter_t adapter,
3086 void * RcvBlock, 3094 void *RcvBlock,
3087 dma_addr_t PhysicalAddress, u32 Length) 3095 dma_addr_t PhysicalAddress,
3096 u32 Length)
3088{ 3097{
3089 u32 i; 3098 u32 i;
3090 u32 BufferSize = adapter->ReceiveBufferSize; 3099 u32 BufferSize = adapter->ReceiveBufferSize;
@@ -3160,9 +3169,10 @@ static void sxg_allocate_rcvblock_complete(p_adapter_t adapter,
3160 } 3169 }
3161 3170
3162 // Locate the descriptor block and put it on a separate free queue 3171 // Locate the descriptor block and put it on a separate free queue
3163 RcvDescriptorBlock = (PSXG_RCV_DESCRIPTOR_BLOCK) ((unsigned char *)RcvBlock + 3172 RcvDescriptorBlock =
3164 SXG_RCV_DESCRIPTOR_BLOCK_OFFSET 3173 (PSXG_RCV_DESCRIPTOR_BLOCK) ((unsigned char *)RcvBlock +
3165 (BufferSize)); 3174 SXG_RCV_DESCRIPTOR_BLOCK_OFFSET
3175 (BufferSize));
3166 RcvDescriptorBlockHdr = 3176 RcvDescriptorBlockHdr =
3167 (PSXG_RCV_DESCRIPTOR_BLOCK_HDR) ((unsigned char *)RcvBlock + 3177 (PSXG_RCV_DESCRIPTOR_BLOCK_HDR) ((unsigned char *)RcvBlock +
3168 SXG_RCV_DESCRIPTOR_BLOCK_HDR_OFFSET 3178 SXG_RCV_DESCRIPTOR_BLOCK_HDR_OFFSET
@@ -3210,8 +3220,9 @@ static void sxg_allocate_rcvblock_complete(p_adapter_t adapter,
3210 * 3220 *
3211 */ 3221 */
3212static void sxg_allocate_sgl_buffer_complete(p_adapter_t adapter, 3222static void sxg_allocate_sgl_buffer_complete(p_adapter_t adapter,
3213 PSXG_SCATTER_GATHER SxgSgl, 3223 PSXG_SCATTER_GATHER SxgSgl,
3214 dma_addr_t PhysicalAddress, u32 Length) 3224 dma_addr_t PhysicalAddress,
3225 u32 Length)
3215{ 3226{
3216 SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "AlSglCmp", 3227 SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "AlSglCmp",
3217 adapter, SxgSgl, Length, 0); 3228 adapter, SxgSgl, Length, 0);
@@ -3228,7 +3239,8 @@ static void sxg_allocate_sgl_buffer_complete(p_adapter_t adapter,
3228 adapter, SxgSgl, Length, 0); 3239 adapter, SxgSgl, Length, 0);
3229} 3240}
3230 3241
3231static unsigned char temp_mac_address[6] = { 0x00, 0xab, 0xcd, 0xef, 0x12, 0x69 }; 3242static unsigned char temp_mac_address[6] =
3243 { 0x00, 0xab, 0xcd, 0xef, 0x12, 0x69 };
3232 3244
3233static void sxg_adapter_set_hwaddr(p_adapter_t adapter) 3245static void sxg_adapter_set_hwaddr(p_adapter_t adapter)
3234{ 3246{
@@ -3255,7 +3267,7 @@ static void sxg_adapter_set_hwaddr(p_adapter_t adapter)
3255 3267
3256} 3268}
3257 3269
3258static int sxg_mac_set_address(p_net_device dev, void * ptr) 3270static int sxg_mac_set_address(p_net_device dev, void *ptr)
3259{ 3271{
3260#if XXXTODO 3272#if XXXTODO
3261 p_adapter_t adapter = (p_adapter_t) netdev_priv(dev); 3273 p_adapter_t adapter = (p_adapter_t) netdev_priv(dev);
@@ -3400,7 +3412,8 @@ static int sxg_initialize_adapter(p_adapter_t adapter)
3400 * status 3412 * status
3401 */ 3413 */
3402static int sxg_fill_descriptor_block(p_adapter_t adapter, 3414static int sxg_fill_descriptor_block(p_adapter_t adapter,
3403 PSXG_RCV_DESCRIPTOR_BLOCK_HDR RcvDescriptorBlockHdr) 3415 PSXG_RCV_DESCRIPTOR_BLOCK_HDR
3416 RcvDescriptorBlockHdr)
3404{ 3417{
3405 u32 i; 3418 u32 i;
3406 PSXG_RING_INFO RcvRingInfo = &adapter->RcvRingZeroInfo; 3419 PSXG_RING_INFO RcvRingInfo = &adapter->RcvRingZeroInfo;
@@ -3436,7 +3449,8 @@ static int sxg_fill_descriptor_block(p_adapter_t adapter,
3436 ASSERT(RcvDataBufferHdr); 3449 ASSERT(RcvDataBufferHdr);
3437 SXG_REINIATIALIZE_PACKET(RcvDataBufferHdr->SxgDumbRcvPacket); 3450 SXG_REINIATIALIZE_PACKET(RcvDataBufferHdr->SxgDumbRcvPacket);
3438 RcvDataBufferHdr->State = SXG_BUFFER_ONCARD; 3451 RcvDataBufferHdr->State = SXG_BUFFER_ONCARD;
3439 RcvDescriptorBlock->Descriptors[i].VirtualAddress = (void *)RcvDataBufferHdr; 3452 RcvDescriptorBlock->Descriptors[i].VirtualAddress =
3453 (void *)RcvDataBufferHdr;
3440 RcvDescriptorBlock->Descriptors[i].PhysicalAddress = 3454 RcvDescriptorBlock->Descriptors[i].PhysicalAddress =
3441 RcvDataBufferHdr->PhysicalAddress; 3455 RcvDataBufferHdr->PhysicalAddress;
3442 } 3456 }
@@ -3497,7 +3511,9 @@ static void sxg_stock_rcv_buffers(p_adapter_t adapter)
3497 RcvDescriptorBlockHdr = NULL; 3511 RcvDescriptorBlockHdr = NULL;
3498 if (adapter->FreeRcvBlockCount) { 3512 if (adapter->FreeRcvBlockCount) {
3499 _ple = RemoveHeadList(&adapter->FreeRcvBlocks); 3513 _ple = RemoveHeadList(&adapter->FreeRcvBlocks);
3500 RcvDescriptorBlockHdr = container_of(_ple, SXG_RCV_DESCRIPTOR_BLOCK_HDR, FreeList); 3514 RcvDescriptorBlockHdr =
3515 container_of(_ple, SXG_RCV_DESCRIPTOR_BLOCK_HDR,
3516 FreeList);
3501 adapter->FreeRcvBlockCount--; 3517 adapter->FreeRcvBlockCount--;
3502 RcvDescriptorBlockHdr->State = SXG_BUFFER_BUSY; 3518 RcvDescriptorBlockHdr->State = SXG_BUFFER_BUSY;
3503 } 3519 }
@@ -3533,7 +3549,8 @@ static void sxg_stock_rcv_buffers(p_adapter_t adapter)
3533 * Return 3549 * Return
3534 * None 3550 * None
3535 */ 3551 */
3536static void sxg_complete_descriptor_blocks(p_adapter_t adapter, unsigned char Index) 3552static void sxg_complete_descriptor_blocks(p_adapter_t adapter,
3553 unsigned char Index)
3537{ 3554{
3538 PSXG_RCV_RING RingZero = &adapter->RcvRings[0]; 3555 PSXG_RCV_RING RingZero = &adapter->RcvRings[0];
3539 PSXG_RING_INFO RcvRingInfo = &adapter->RcvRingZeroInfo; 3556 PSXG_RING_INFO RcvRingInfo = &adapter->RcvRingZeroInfo;
@@ -3576,7 +3593,6 @@ static void sxg_complete_descriptor_blocks(p_adapter_t adapter, unsigned char In
3576 adapter, Index, RcvRingInfo->Head, RcvRingInfo->Tail); 3593 adapter, Index, RcvRingInfo->Head, RcvRingInfo->Tail);
3577} 3594}
3578 3595
3579
3580static struct pci_driver sxg_driver = { 3596static struct pci_driver sxg_driver = {
3581 .name = DRV_NAME, 3597 .name = DRV_NAME,
3582 .id_table = sxg_pci_tbl, 3598 .id_table = sxg_pci_tbl,