diff options
author | <jgarzik@pretzel.yyz.us> | 2005-05-27 22:02:58 -0400 |
---|---|---|
committer | Jeff Garzik <jgarzik@pobox.com> | 2005-05-27 22:02:58 -0400 |
commit | 6cd15a9daf826115356f9403494c76e5aafa7793 (patch) | |
tree | 3ab9372fca7974dcb4c3c25fa5dc6f267cddeef9 /drivers | |
parent | ff1d2767d5a43c85f944e86a45284b721f66196c (diff) | |
parent | 43f66a6ce8da299344cf1bc2ac2311889cc88555 (diff) |
Automatic merge of /spare/repo/netdev-2.6 branch we18-ieee80211
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/net/wireless/Kconfig | 105 | ||||
-rw-r--r-- | drivers/net/wireless/Makefile | 4 | ||||
-rw-r--r-- | drivers/net/wireless/atmel.c | 62 | ||||
-rw-r--r-- | drivers/net/wireless/ieee802_11.h | 78 | ||||
-rw-r--r-- | drivers/net/wireless/ipw2100.c | 8649 | ||||
-rw-r--r-- | drivers/net/wireless/ipw2100.h | 1278 | ||||
-rw-r--r-- | drivers/net/wireless/ipw2200.c | 7348 | ||||
-rw-r--r-- | drivers/net/wireless/ipw2200.h | 1770 | ||||
-rw-r--r-- | drivers/net/wireless/orinoco.c | 11 | ||||
-rw-r--r-- | drivers/net/wireless/wl3501.h | 4 |
10 files changed, 19193 insertions, 116 deletions
diff --git a/drivers/net/wireless/Kconfig b/drivers/net/wireless/Kconfig index a60866d62ec7..6e88d4839971 100644 --- a/drivers/net/wireless/Kconfig +++ b/drivers/net/wireless/Kconfig | |||
@@ -137,6 +137,111 @@ config PCMCIA_RAYCS | |||
137 | comment "Wireless 802.11b ISA/PCI cards support" | 137 | comment "Wireless 802.11b ISA/PCI cards support" |
138 | depends on NET_RADIO && (ISA || PCI || PPC_PMAC || PCMCIA) | 138 | depends on NET_RADIO && (ISA || PCI || PPC_PMAC || PCMCIA) |
139 | 139 | ||
140 | config IPW2100 | ||
141 | tristate "Intel PRO/Wireless 2100 Network Connection" | ||
142 | depends on NET_RADIO && PCI && IEEE80211 | ||
143 | select FW_LOADER | ||
144 | ---help--- | ||
145 | A driver for the Intel PRO/Wireless 2100 Network | ||
146 | Connection 802.11b wireless network adapter. | ||
147 | |||
148 | See <file:Documentation/networking/README.ipw2100> for information on | ||
149 | the capabilities currently enabled in this driver and for tips | ||
150 | for debugging issues and problems. | ||
151 | |||
152 | In order to use this driver, you will need a firmware image for it. | ||
153 | You can obtain the firmware from | ||
154 | <http://ipw2100.sf.net/>. Once you have the firmware image, you | ||
155 | will need to place it in /etc/firmware. | ||
156 | |||
157 | You will also very likely need the Wireless Tools in order to | ||
158 | configure your card: | ||
159 | |||
160 | <http://www.hpl.hp.com/personal/Jean_Tourrilhes/Linux/Tools.html>. | ||
161 | |||
162 | If you want to compile the driver as a module ( = code which can be | ||
163 | inserted in and remvoed from the running kernel whenever you want), | ||
164 | say M here and read <file:Documentation/modules.txt>. The module | ||
165 | will be called ipw2100.ko. | ||
166 | |||
167 | config IPW2100_PROMISC | ||
168 | bool "Enable promiscuous mode" | ||
169 | depends on IPW2100 | ||
170 | ---help--- | ||
171 | Enables promiscuous/monitor mode support for the ipw2100 driver. | ||
172 | With this feature compiled into the driver, you can switch to | ||
173 | promiscuous mode via the Wireless Tool's Monitor mode. While in this | ||
174 | mode, no packets can be sent. | ||
175 | |||
176 | config IPW_DEBUG | ||
177 | bool "Enable full debugging output in IPW2100 module." | ||
178 | depends on IPW2100 | ||
179 | ---help--- | ||
180 | This option will enable debug tracing output for the IPW2100. | ||
181 | |||
182 | This will result in the kernel module being ~60k larger. You can | ||
183 | control which debug output is sent to the kernel log by setting the | ||
184 | value in | ||
185 | |||
186 | /sys/bus/pci/drivers/ipw2100/debug_level | ||
187 | |||
188 | This entry will only exist if this option is enabled. | ||
189 | |||
190 | If you are not trying to debug or develop the IPW2100 driver, you | ||
191 | most likely want to say N here. | ||
192 | |||
193 | config IPW2200 | ||
194 | tristate "Intel PRO/Wireless 2200BG and 2915ABG Network Connection" | ||
195 | depends on NET_RADIO && PCI | ||
196 | select FW_LOADER | ||
197 | select IEEE80211 | ||
198 | ---help--- | ||
199 | A driver for the Intel PRO/Wireless 2200BG and 2915ABG Network | ||
200 | Connection adapters. | ||
201 | |||
202 | See <file:Documentation/networking/README.ipw2200> for | ||
203 | information on the capabilities currently enabled in this | ||
204 | driver and for tips for debugging issues and problems. | ||
205 | |||
206 | In order to use this driver, you will need a firmware image for it. | ||
207 | You can obtain the firmware from | ||
208 | <http://ipw2200.sf.net/>. See the above referenced README.ipw2200 | ||
209 | for information on where to install the firmare images. | ||
210 | |||
211 | You will also very likely need the Wireless Tools in order to | ||
212 | configure your card: | ||
213 | |||
214 | <http://www.hpl.hp.com/personal/Jean_Tourrilhes/Linux/Tools.html>. | ||
215 | |||
216 | If you want to compile the driver as a module ( = code which can be | ||
217 | inserted in and remvoed from the running kernel whenever you want), | ||
218 | say M here and read <file:Documentation/modules.txt>. The module | ||
219 | will be called ipw2200.ko. | ||
220 | |||
221 | config IPW_DEBUG | ||
222 | bool "Enable full debugging output in IPW2200 module." | ||
223 | depends on IPW2200 | ||
224 | ---help--- | ||
225 | This option will enable debug tracing output for the IPW2200. | ||
226 | |||
227 | This will result in the kernel module being ~100k larger. You can | ||
228 | control which debug output is sent to the kernel log by setting the | ||
229 | value in | ||
230 | |||
231 | /sys/bus/pci/drivers/ipw2200/debug_level | ||
232 | |||
233 | This entry will only exist if this option is enabled. | ||
234 | |||
235 | To set a value, simply echo an 8-byte hex value to the same file: | ||
236 | |||
237 | % echo 0x00000FFO > /sys/bus/pci/drivers/ipw2200/debug_level | ||
238 | |||
239 | You can find the list of debug mask values in | ||
240 | drivers/net/wireless/ipw2200.h | ||
241 | |||
242 | If you are not trying to debug or develop the IPW2200 driver, you | ||
243 | most likely want to say N here. | ||
244 | |||
140 | config AIRO | 245 | config AIRO |
141 | tristate "Cisco/Aironet 34X/35X/4500/4800 ISA and PCI cards" | 246 | tristate "Cisco/Aironet 34X/35X/4500/4800 ISA and PCI cards" |
142 | depends on NET_RADIO && ISA && (PCI || BROKEN) | 247 | depends on NET_RADIO && ISA && (PCI || BROKEN) |
diff --git a/drivers/net/wireless/Makefile b/drivers/net/wireless/Makefile index 6c9cb0eb8581..0953cc0cdee6 100644 --- a/drivers/net/wireless/Makefile +++ b/drivers/net/wireless/Makefile | |||
@@ -2,6 +2,10 @@ | |||
2 | # Makefile for the Linux Wireless network device drivers. | 2 | # Makefile for the Linux Wireless network device drivers. |
3 | # | 3 | # |
4 | 4 | ||
5 | obj-$(CONFIG_IPW2100) += ipw2100.o | ||
6 | |||
7 | obj-$(CONFIG_IPW2200) += ipw2200.o | ||
8 | |||
5 | obj-$(CONFIG_STRIP) += strip.o | 9 | obj-$(CONFIG_STRIP) += strip.o |
6 | obj-$(CONFIG_ARLAN) += arlan.o | 10 | obj-$(CONFIG_ARLAN) += arlan.o |
7 | 11 | ||
diff --git a/drivers/net/wireless/atmel.c b/drivers/net/wireless/atmel.c index 18a7d38d2a13..bed160a25cab 100644 --- a/drivers/net/wireless/atmel.c +++ b/drivers/net/wireless/atmel.c | |||
@@ -68,7 +68,7 @@ | |||
68 | #include <linux/device.h> | 68 | #include <linux/device.h> |
69 | #include <linux/moduleparam.h> | 69 | #include <linux/moduleparam.h> |
70 | #include <linux/firmware.h> | 70 | #include <linux/firmware.h> |
71 | #include "ieee802_11.h" | 71 | #include <net/ieee80211.h> |
72 | #include "atmel.h" | 72 | #include "atmel.h" |
73 | 73 | ||
74 | #define DRIVER_MAJOR 0 | 74 | #define DRIVER_MAJOR 0 |
@@ -618,12 +618,12 @@ static int atmel_lock_mac(struct atmel_private *priv); | |||
618 | static void atmel_wmem32(struct atmel_private *priv, u16 pos, u32 data); | 618 | static void atmel_wmem32(struct atmel_private *priv, u16 pos, u32 data); |
619 | static void atmel_command_irq(struct atmel_private *priv); | 619 | static void atmel_command_irq(struct atmel_private *priv); |
620 | static int atmel_validate_channel(struct atmel_private *priv, int channel); | 620 | static int atmel_validate_channel(struct atmel_private *priv, int channel); |
621 | static void atmel_management_frame(struct atmel_private *priv, struct ieee802_11_hdr *header, | 621 | static void atmel_management_frame(struct atmel_private *priv, struct ieee80211_hdr *header, |
622 | u16 frame_len, u8 rssi); | 622 | u16 frame_len, u8 rssi); |
623 | static void atmel_management_timer(u_long a); | 623 | static void atmel_management_timer(u_long a); |
624 | static void atmel_send_command(struct atmel_private *priv, int command, void *cmd, int cmd_size); | 624 | static void atmel_send_command(struct atmel_private *priv, int command, void *cmd, int cmd_size); |
625 | static int atmel_send_command_wait(struct atmel_private *priv, int command, void *cmd, int cmd_size); | 625 | static int atmel_send_command_wait(struct atmel_private *priv, int command, void *cmd, int cmd_size); |
626 | static void atmel_transmit_management_frame(struct atmel_private *priv, struct ieee802_11_hdr *header, | 626 | static void atmel_transmit_management_frame(struct atmel_private *priv, struct ieee80211_hdr *header, |
627 | u8 *body, int body_len); | 627 | u8 *body, int body_len); |
628 | 628 | ||
629 | static u8 atmel_get_mib8(struct atmel_private *priv, u8 type, u8 index); | 629 | static u8 atmel_get_mib8(struct atmel_private *priv, u8 type, u8 index); |
@@ -827,7 +827,7 @@ static void tx_update_descriptor(struct atmel_private *priv, int is_bcast, u16 l | |||
827 | static int start_tx (struct sk_buff *skb, struct net_device *dev) | 827 | static int start_tx (struct sk_buff *skb, struct net_device *dev) |
828 | { | 828 | { |
829 | struct atmel_private *priv = netdev_priv(dev); | 829 | struct atmel_private *priv = netdev_priv(dev); |
830 | struct ieee802_11_hdr header; | 830 | struct ieee80211_hdr header; |
831 | unsigned long flags; | 831 | unsigned long flags; |
832 | u16 buff, frame_ctl, len = (ETH_ZLEN < skb->len) ? skb->len : ETH_ZLEN; | 832 | u16 buff, frame_ctl, len = (ETH_ZLEN < skb->len) ? skb->len : ETH_ZLEN; |
833 | u8 SNAP_RFC1024[6] = {0xaa, 0xaa, 0x03, 0x00, 0x00, 0x00}; | 833 | u8 SNAP_RFC1024[6] = {0xaa, 0xaa, 0x03, 0x00, 0x00, 0x00}; |
@@ -863,17 +863,17 @@ static int start_tx (struct sk_buff *skb, struct net_device *dev) | |||
863 | return 1; | 863 | return 1; |
864 | } | 864 | } |
865 | 865 | ||
866 | frame_ctl = IEEE802_11_FTYPE_DATA; | 866 | frame_ctl = IEEE80211_FTYPE_DATA; |
867 | header.duration_id = 0; | 867 | header.duration_id = 0; |
868 | header.seq_ctl = 0; | 868 | header.seq_ctl = 0; |
869 | if (priv->wep_is_on) | 869 | if (priv->wep_is_on) |
870 | frame_ctl |= IEEE802_11_FCTL_WEP; | 870 | frame_ctl |= IEEE80211_FCTL_WEP; |
871 | if (priv->operating_mode == IW_MODE_ADHOC) { | 871 | if (priv->operating_mode == IW_MODE_ADHOC) { |
872 | memcpy(&header.addr1, skb->data, 6); | 872 | memcpy(&header.addr1, skb->data, 6); |
873 | memcpy(&header.addr2, dev->dev_addr, 6); | 873 | memcpy(&header.addr2, dev->dev_addr, 6); |
874 | memcpy(&header.addr3, priv->BSSID, 6); | 874 | memcpy(&header.addr3, priv->BSSID, 6); |
875 | } else { | 875 | } else { |
876 | frame_ctl |= IEEE802_11_FCTL_TODS; | 876 | frame_ctl |= IEEE80211_FCTL_TODS; |
877 | memcpy(&header.addr1, priv->CurrentBSSID, 6); | 877 | memcpy(&header.addr1, priv->CurrentBSSID, 6); |
878 | memcpy(&header.addr2, dev->dev_addr, 6); | 878 | memcpy(&header.addr2, dev->dev_addr, 6); |
879 | memcpy(&header.addr3, skb->data, 6); | 879 | memcpy(&header.addr3, skb->data, 6); |
@@ -902,7 +902,7 @@ static int start_tx (struct sk_buff *skb, struct net_device *dev) | |||
902 | } | 902 | } |
903 | 903 | ||
904 | static void atmel_transmit_management_frame(struct atmel_private *priv, | 904 | static void atmel_transmit_management_frame(struct atmel_private *priv, |
905 | struct ieee802_11_hdr *header, | 905 | struct ieee80211_hdr *header, |
906 | u8 *body, int body_len) | 906 | u8 *body, int body_len) |
907 | { | 907 | { |
908 | u16 buff; | 908 | u16 buff; |
@@ -917,7 +917,7 @@ static void atmel_transmit_management_frame(struct atmel_private *priv, | |||
917 | tx_update_descriptor(priv, header->addr1[0] & 0x01, len, buff, TX_PACKET_TYPE_MGMT); | 917 | tx_update_descriptor(priv, header->addr1[0] & 0x01, len, buff, TX_PACKET_TYPE_MGMT); |
918 | } | 918 | } |
919 | 919 | ||
920 | static void fast_rx_path(struct atmel_private *priv, struct ieee802_11_hdr *header, | 920 | static void fast_rx_path(struct atmel_private *priv, struct ieee80211_hdr *header, |
921 | u16 msdu_size, u16 rx_packet_loc, u32 crc) | 921 | u16 msdu_size, u16 rx_packet_loc, u32 crc) |
922 | { | 922 | { |
923 | /* fast path: unfragmented packet copy directly into skbuf */ | 923 | /* fast path: unfragmented packet copy directly into skbuf */ |
@@ -955,7 +955,7 @@ static void fast_rx_path(struct atmel_private *priv, struct ieee802_11_hdr *head | |||
955 | } | 955 | } |
956 | 956 | ||
957 | memcpy(skbp, header->addr1, 6); /* destination address */ | 957 | memcpy(skbp, header->addr1, 6); /* destination address */ |
958 | if (le16_to_cpu(header->frame_ctl) & IEEE802_11_FCTL_FROMDS) | 958 | if (le16_to_cpu(header->frame_ctl) & IEEE80211_FCTL_FROMDS) |
959 | memcpy(&skbp[6], header->addr3, 6); | 959 | memcpy(&skbp[6], header->addr3, 6); |
960 | else | 960 | else |
961 | memcpy(&skbp[6], header->addr2, 6); /* source address */ | 961 | memcpy(&skbp[6], header->addr2, 6); /* source address */ |
@@ -990,14 +990,14 @@ static int probe_crc(struct atmel_private *priv, u16 packet_loc, u16 msdu_size) | |||
990 | return (crc ^ 0xffffffff) == netcrc; | 990 | return (crc ^ 0xffffffff) == netcrc; |
991 | } | 991 | } |
992 | 992 | ||
993 | static void frag_rx_path(struct atmel_private *priv, struct ieee802_11_hdr *header, | 993 | static void frag_rx_path(struct atmel_private *priv, struct ieee80211_hdr *header, |
994 | u16 msdu_size, u16 rx_packet_loc, u32 crc, u16 seq_no, u8 frag_no, int more_frags) | 994 | u16 msdu_size, u16 rx_packet_loc, u32 crc, u16 seq_no, u8 frag_no, int more_frags) |
995 | { | 995 | { |
996 | u8 mac4[6]; | 996 | u8 mac4[6]; |
997 | u8 source[6]; | 997 | u8 source[6]; |
998 | struct sk_buff *skb; | 998 | struct sk_buff *skb; |
999 | 999 | ||
1000 | if (le16_to_cpu(header->frame_ctl) & IEEE802_11_FCTL_FROMDS) | 1000 | if (le16_to_cpu(header->frame_ctl) & IEEE80211_FCTL_FROMDS) |
1001 | memcpy(source, header->addr3, 6); | 1001 | memcpy(source, header->addr3, 6); |
1002 | else | 1002 | else |
1003 | memcpy(source, header->addr2, 6); | 1003 | memcpy(source, header->addr2, 6); |
@@ -1082,7 +1082,7 @@ static void frag_rx_path(struct atmel_private *priv, struct ieee802_11_hdr *head | |||
1082 | static void rx_done_irq(struct atmel_private *priv) | 1082 | static void rx_done_irq(struct atmel_private *priv) |
1083 | { | 1083 | { |
1084 | int i; | 1084 | int i; |
1085 | struct ieee802_11_hdr header; | 1085 | struct ieee80211_hdr header; |
1086 | 1086 | ||
1087 | for (i = 0; | 1087 | for (i = 0; |
1088 | atmel_rmem8(priv, atmel_rx(priv, RX_DESC_FLAGS_OFFSET, priv->rx_desc_head)) == RX_DESC_FLAG_VALID && | 1088 | atmel_rmem8(priv, atmel_rx(priv, RX_DESC_FLAGS_OFFSET, priv->rx_desc_head)) == RX_DESC_FLAG_VALID && |
@@ -1117,7 +1117,7 @@ static void rx_done_irq(struct atmel_private *priv) | |||
1117 | /* probe for CRC use here if needed once five packets have arrived with | 1117 | /* probe for CRC use here if needed once five packets have arrived with |
1118 | the same crc status, we assume we know what's happening and stop probing */ | 1118 | the same crc status, we assume we know what's happening and stop probing */ |
1119 | if (priv->probe_crc) { | 1119 | if (priv->probe_crc) { |
1120 | if (!priv->wep_is_on || !(frame_ctl & IEEE802_11_FCTL_WEP)) { | 1120 | if (!priv->wep_is_on || !(frame_ctl & IEEE80211_FCTL_WEP)) { |
1121 | priv->do_rx_crc = probe_crc(priv, rx_packet_loc, msdu_size); | 1121 | priv->do_rx_crc = probe_crc(priv, rx_packet_loc, msdu_size); |
1122 | } else { | 1122 | } else { |
1123 | priv->do_rx_crc = probe_crc(priv, rx_packet_loc + 24, msdu_size - 24); | 1123 | priv->do_rx_crc = probe_crc(priv, rx_packet_loc + 24, msdu_size - 24); |
@@ -1132,16 +1132,16 @@ static void rx_done_irq(struct atmel_private *priv) | |||
1132 | } | 1132 | } |
1133 | 1133 | ||
1134 | /* don't CRC header when WEP in use */ | 1134 | /* don't CRC header when WEP in use */ |
1135 | if (priv->do_rx_crc && (!priv->wep_is_on || !(frame_ctl & IEEE802_11_FCTL_WEP))) { | 1135 | if (priv->do_rx_crc && (!priv->wep_is_on || !(frame_ctl & IEEE80211_FCTL_WEP))) { |
1136 | crc = crc32_le(0xffffffff, (unsigned char *)&header, 24); | 1136 | crc = crc32_le(0xffffffff, (unsigned char *)&header, 24); |
1137 | } | 1137 | } |
1138 | msdu_size -= 24; /* header */ | 1138 | msdu_size -= 24; /* header */ |
1139 | 1139 | ||
1140 | if ((frame_ctl & IEEE802_11_FCTL_FTYPE) == IEEE802_11_FTYPE_DATA) { | 1140 | if ((frame_ctl & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_DATA) { |
1141 | 1141 | ||
1142 | int more_fragments = frame_ctl & IEEE802_11_FCTL_MOREFRAGS; | 1142 | int more_fragments = frame_ctl & IEEE80211_FCTL_MOREFRAGS; |
1143 | u8 packet_fragment_no = seq_control & IEEE802_11_SCTL_FRAG; | 1143 | u8 packet_fragment_no = seq_control & IEEE80211_SCTL_FRAG; |
1144 | u16 packet_sequence_no = (seq_control & IEEE802_11_SCTL_SEQ) >> 4; | 1144 | u16 packet_sequence_no = (seq_control & IEEE80211_SCTL_SEQ) >> 4; |
1145 | 1145 | ||
1146 | if (!more_fragments && packet_fragment_no == 0 ) { | 1146 | if (!more_fragments && packet_fragment_no == 0 ) { |
1147 | fast_rx_path(priv, &header, msdu_size, rx_packet_loc, crc); | 1147 | fast_rx_path(priv, &header, msdu_size, rx_packet_loc, crc); |
@@ -1151,7 +1151,7 @@ static void rx_done_irq(struct atmel_private *priv) | |||
1151 | } | 1151 | } |
1152 | } | 1152 | } |
1153 | 1153 | ||
1154 | if ((frame_ctl & IEEE802_11_FCTL_FTYPE) == IEEE802_11_FTYPE_MGMT) { | 1154 | if ((frame_ctl & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT) { |
1155 | /* copy rest of packet into buffer */ | 1155 | /* copy rest of packet into buffer */ |
1156 | atmel_copy_to_host(priv->dev, (unsigned char *)&priv->rx_buf, rx_packet_loc + 24, msdu_size); | 1156 | atmel_copy_to_host(priv->dev, (unsigned char *)&priv->rx_buf, rx_packet_loc + 24, msdu_size); |
1157 | 1157 | ||
@@ -2663,10 +2663,10 @@ static void handle_beacon_probe(struct atmel_private *priv, u16 capability, u8 c | |||
2663 | 2663 | ||
2664 | static void send_authentication_request(struct atmel_private *priv, u8 *challenge, int challenge_len) | 2664 | static void send_authentication_request(struct atmel_private *priv, u8 *challenge, int challenge_len) |
2665 | { | 2665 | { |
2666 | struct ieee802_11_hdr header; | 2666 | struct ieee80211_hdr header; |
2667 | struct auth_body auth; | 2667 | struct auth_body auth; |
2668 | 2668 | ||
2669 | header.frame_ctl = cpu_to_le16(IEEE802_11_FTYPE_MGMT | IEEE802_11_STYPE_AUTH); | 2669 | header.frame_ctl = cpu_to_le16(IEEE80211_FTYPE_MGMT | IEEE80211_STYPE_AUTH); |
2670 | header.duration_id = cpu_to_le16(0x8000); | 2670 | header.duration_id = cpu_to_le16(0x8000); |
2671 | header.seq_ctl = 0; | 2671 | header.seq_ctl = 0; |
2672 | memcpy(header.addr1, priv->CurrentBSSID, 6); | 2672 | memcpy(header.addr1, priv->CurrentBSSID, 6); |
@@ -2677,7 +2677,7 @@ static void send_authentication_request(struct atmel_private *priv, u8 *challeng | |||
2677 | auth.alg = cpu_to_le16(C80211_MGMT_AAN_SHAREDKEY); | 2677 | auth.alg = cpu_to_le16(C80211_MGMT_AAN_SHAREDKEY); |
2678 | /* no WEP for authentication frames with TrSeqNo 1 */ | 2678 | /* no WEP for authentication frames with TrSeqNo 1 */ |
2679 | if (priv->CurrentAuthentTransactionSeqNum != 1) | 2679 | if (priv->CurrentAuthentTransactionSeqNum != 1) |
2680 | header.frame_ctl |= cpu_to_le16(IEEE802_11_FCTL_WEP); | 2680 | header.frame_ctl |= cpu_to_le16(IEEE80211_FCTL_WEP); |
2681 | } else { | 2681 | } else { |
2682 | auth.alg = cpu_to_le16(C80211_MGMT_AAN_OPENSYSTEM); | 2682 | auth.alg = cpu_to_le16(C80211_MGMT_AAN_OPENSYSTEM); |
2683 | } | 2683 | } |
@@ -2701,7 +2701,7 @@ static void send_association_request(struct atmel_private *priv, int is_reassoc) | |||
2701 | { | 2701 | { |
2702 | u8 *ssid_el_p; | 2702 | u8 *ssid_el_p; |
2703 | int bodysize; | 2703 | int bodysize; |
2704 | struct ieee802_11_hdr header; | 2704 | struct ieee80211_hdr header; |
2705 | struct ass_req_format { | 2705 | struct ass_req_format { |
2706 | u16 capability; | 2706 | u16 capability; |
2707 | u16 listen_interval; | 2707 | u16 listen_interval; |
@@ -2714,8 +2714,8 @@ static void send_association_request(struct atmel_private *priv, int is_reassoc) | |||
2714 | u8 rates[4]; | 2714 | u8 rates[4]; |
2715 | } body; | 2715 | } body; |
2716 | 2716 | ||
2717 | header.frame_ctl = cpu_to_le16(IEEE802_11_FTYPE_MGMT | | 2717 | header.frame_ctl = cpu_to_le16(IEEE80211_FTYPE_MGMT | |
2718 | (is_reassoc ? IEEE802_11_STYPE_REASSOC_REQ : IEEE802_11_STYPE_ASSOC_REQ)); | 2718 | (is_reassoc ? IEEE80211_STYPE_REASSOC_REQ : IEEE80211_STYPE_ASSOC_REQ)); |
2719 | header.duration_id = cpu_to_le16(0x8000); | 2719 | header.duration_id = cpu_to_le16(0x8000); |
2720 | header.seq_ctl = 0; | 2720 | header.seq_ctl = 0; |
2721 | 2721 | ||
@@ -2751,9 +2751,9 @@ static void send_association_request(struct atmel_private *priv, int is_reassoc) | |||
2751 | atmel_transmit_management_frame(priv, &header, (void *)&body, bodysize); | 2751 | atmel_transmit_management_frame(priv, &header, (void *)&body, bodysize); |
2752 | } | 2752 | } |
2753 | 2753 | ||
2754 | static int is_frame_from_current_bss(struct atmel_private *priv, struct ieee802_11_hdr *header) | 2754 | static int is_frame_from_current_bss(struct atmel_private *priv, struct ieee80211_hdr *header) |
2755 | { | 2755 | { |
2756 | if (le16_to_cpu(header->frame_ctl) & IEEE802_11_FCTL_FROMDS) | 2756 | if (le16_to_cpu(header->frame_ctl) & IEEE80211_FCTL_FROMDS) |
2757 | return memcmp(header->addr3, priv->CurrentBSSID, 6) == 0; | 2757 | return memcmp(header->addr3, priv->CurrentBSSID, 6) == 0; |
2758 | else | 2758 | else |
2759 | return memcmp(header->addr2, priv->CurrentBSSID, 6) == 0; | 2759 | return memcmp(header->addr2, priv->CurrentBSSID, 6) == 0; |
@@ -2801,7 +2801,7 @@ static int retrieve_bss(struct atmel_private *priv) | |||
2801 | } | 2801 | } |
2802 | 2802 | ||
2803 | 2803 | ||
2804 | static void store_bss_info(struct atmel_private *priv, struct ieee802_11_hdr *header, | 2804 | static void store_bss_info(struct atmel_private *priv, struct ieee80211_hdr *header, |
2805 | u16 capability, u16 beacon_period, u8 channel, u8 rssi, | 2805 | u16 capability, u16 beacon_period, u8 channel, u8 rssi, |
2806 | u8 ssid_len, u8 *ssid, int is_beacon) | 2806 | u8 ssid_len, u8 *ssid, int is_beacon) |
2807 | { | 2807 | { |
@@ -3085,12 +3085,12 @@ static void atmel_smooth_qual(struct atmel_private *priv) | |||
3085 | } | 3085 | } |
3086 | 3086 | ||
3087 | /* deals with incoming managment frames. */ | 3087 | /* deals with incoming managment frames. */ |
3088 | static void atmel_management_frame(struct atmel_private *priv, struct ieee802_11_hdr *header, | 3088 | static void atmel_management_frame(struct atmel_private *priv, struct ieee80211_hdr *header, |
3089 | u16 frame_len, u8 rssi) | 3089 | u16 frame_len, u8 rssi) |
3090 | { | 3090 | { |
3091 | u16 subtype; | 3091 | u16 subtype; |
3092 | 3092 | ||
3093 | switch (subtype = le16_to_cpu(header->frame_ctl) & IEEE802_11_FCTL_STYPE) { | 3093 | switch (subtype = le16_to_cpu(header->frame_ctl) & IEEE80211_FCTL_STYPE) { |
3094 | case C80211_SUBTYPE_MGMT_BEACON : | 3094 | case C80211_SUBTYPE_MGMT_BEACON : |
3095 | case C80211_SUBTYPE_MGMT_ProbeResponse: | 3095 | case C80211_SUBTYPE_MGMT_ProbeResponse: |
3096 | 3096 | ||
diff --git a/drivers/net/wireless/ieee802_11.h b/drivers/net/wireless/ieee802_11.h deleted file mode 100644 index 53dd5248f9f1..000000000000 --- a/drivers/net/wireless/ieee802_11.h +++ /dev/null | |||
@@ -1,78 +0,0 @@ | |||
1 | #ifndef _IEEE802_11_H | ||
2 | #define _IEEE802_11_H | ||
3 | |||
4 | #define IEEE802_11_DATA_LEN 2304 | ||
5 | /* Maximum size for the MA-UNITDATA primitive, 802.11 standard section | ||
6 | 6.2.1.1.2. | ||
7 | |||
8 | The figure in section 7.1.2 suggests a body size of up to 2312 | ||
9 | bytes is allowed, which is a bit confusing, I suspect this | ||
10 | represents the 2304 bytes of real data, plus a possible 8 bytes of | ||
11 | WEP IV and ICV. (this interpretation suggested by Ramiro Barreiro) */ | ||
12 | |||
13 | |||
14 | #define IEEE802_11_HLEN 30 | ||
15 | #define IEEE802_11_FRAME_LEN (IEEE802_11_DATA_LEN + IEEE802_11_HLEN) | ||
16 | |||
17 | struct ieee802_11_hdr { | ||
18 | u16 frame_ctl; | ||
19 | u16 duration_id; | ||
20 | u8 addr1[ETH_ALEN]; | ||
21 | u8 addr2[ETH_ALEN]; | ||
22 | u8 addr3[ETH_ALEN]; | ||
23 | u16 seq_ctl; | ||
24 | u8 addr4[ETH_ALEN]; | ||
25 | } __attribute__ ((packed)); | ||
26 | |||
27 | /* Frame control field constants */ | ||
28 | #define IEEE802_11_FCTL_VERS 0x0002 | ||
29 | #define IEEE802_11_FCTL_FTYPE 0x000c | ||
30 | #define IEEE802_11_FCTL_STYPE 0x00f0 | ||
31 | #define IEEE802_11_FCTL_TODS 0x0100 | ||
32 | #define IEEE802_11_FCTL_FROMDS 0x0200 | ||
33 | #define IEEE802_11_FCTL_MOREFRAGS 0x0400 | ||
34 | #define IEEE802_11_FCTL_RETRY 0x0800 | ||
35 | #define IEEE802_11_FCTL_PM 0x1000 | ||
36 | #define IEEE802_11_FCTL_MOREDATA 0x2000 | ||
37 | #define IEEE802_11_FCTL_WEP 0x4000 | ||
38 | #define IEEE802_11_FCTL_ORDER 0x8000 | ||
39 | |||
40 | #define IEEE802_11_FTYPE_MGMT 0x0000 | ||
41 | #define IEEE802_11_FTYPE_CTL 0x0004 | ||
42 | #define IEEE802_11_FTYPE_DATA 0x0008 | ||
43 | |||
44 | /* management */ | ||
45 | #define IEEE802_11_STYPE_ASSOC_REQ 0x0000 | ||
46 | #define IEEE802_11_STYPE_ASSOC_RESP 0x0010 | ||
47 | #define IEEE802_11_STYPE_REASSOC_REQ 0x0020 | ||
48 | #define IEEE802_11_STYPE_REASSOC_RESP 0x0030 | ||
49 | #define IEEE802_11_STYPE_PROBE_REQ 0x0040 | ||
50 | #define IEEE802_11_STYPE_PROBE_RESP 0x0050 | ||
51 | #define IEEE802_11_STYPE_BEACON 0x0080 | ||
52 | #define IEEE802_11_STYPE_ATIM 0x0090 | ||
53 | #define IEEE802_11_STYPE_DISASSOC 0x00A0 | ||
54 | #define IEEE802_11_STYPE_AUTH 0x00B0 | ||
55 | #define IEEE802_11_STYPE_DEAUTH 0x00C0 | ||
56 | |||
57 | /* control */ | ||
58 | #define IEEE802_11_STYPE_PSPOLL 0x00A0 | ||
59 | #define IEEE802_11_STYPE_RTS 0x00B0 | ||
60 | #define IEEE802_11_STYPE_CTS 0x00C0 | ||
61 | #define IEEE802_11_STYPE_ACK 0x00D0 | ||
62 | #define IEEE802_11_STYPE_CFEND 0x00E0 | ||
63 | #define IEEE802_11_STYPE_CFENDACK 0x00F0 | ||
64 | |||
65 | /* data */ | ||
66 | #define IEEE802_11_STYPE_DATA 0x0000 | ||
67 | #define IEEE802_11_STYPE_DATA_CFACK 0x0010 | ||
68 | #define IEEE802_11_STYPE_DATA_CFPOLL 0x0020 | ||
69 | #define IEEE802_11_STYPE_DATA_CFACKPOLL 0x0030 | ||
70 | #define IEEE802_11_STYPE_NULLFUNC 0x0040 | ||
71 | #define IEEE802_11_STYPE_CFACK 0x0050 | ||
72 | #define IEEE802_11_STYPE_CFPOLL 0x0060 | ||
73 | #define IEEE802_11_STYPE_CFACKPOLL 0x0070 | ||
74 | |||
75 | #define IEEE802_11_SCTL_FRAG 0x000F | ||
76 | #define IEEE802_11_SCTL_SEQ 0xFFF0 | ||
77 | |||
78 | #endif /* _IEEE802_11_H */ | ||
diff --git a/drivers/net/wireless/ipw2100.c b/drivers/net/wireless/ipw2100.c new file mode 100644 index 000000000000..d296d464946f --- /dev/null +++ b/drivers/net/wireless/ipw2100.c | |||
@@ -0,0 +1,8649 @@ | |||
1 | /****************************************************************************** | ||
2 | |||
3 | Copyright(c) 2003 - 2005 Intel Corporation. All rights reserved. | ||
4 | |||
5 | This program is free software; you can redistribute it and/or modify it | ||
6 | under the terms of version 2 of the GNU General Public License as | ||
7 | published by the Free Software Foundation. | ||
8 | |||
9 | This program is distributed in the hope that it will be useful, but WITHOUT | ||
10 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | ||
11 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | ||
12 | more details. | ||
13 | |||
14 | You should have received a copy of the GNU General Public License along with | ||
15 | this program; if not, write to the Free Software Foundation, Inc., 59 | ||
16 | Temple Place - Suite 330, Boston, MA 02111-1307, USA. | ||
17 | |||
18 | The full GNU General Public License is included in this distribution in the | ||
19 | file called LICENSE. | ||
20 | |||
21 | Contact Information: | ||
22 | James P. Ketrenos <ipw2100-admin@linux.intel.com> | ||
23 | Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 | ||
24 | |||
25 | Portions of this file are based on the sample_* files provided by Wireless | ||
26 | Extensions 0.26 package and copyright (c) 1997-2003 Jean Tourrilhes | ||
27 | <jt@hpl.hp.com> | ||
28 | |||
29 | Portions of this file are based on the Host AP project, | ||
30 | Copyright (c) 2001-2002, SSH Communications Security Corp and Jouni Malinen | ||
31 | <jkmaline@cc.hut.fi> | ||
32 | Copyright (c) 2002-2003, Jouni Malinen <jkmaline@cc.hut.fi> | ||
33 | |||
34 | Portions of ipw2100_mod_firmware_load, ipw2100_do_mod_firmware_load, and | ||
35 | ipw2100_fw_load are loosely based on drivers/sound/sound_firmware.c | ||
36 | available in the 2.4.25 kernel sources, and are copyright (c) Alan Cox | ||
37 | |||
38 | ******************************************************************************/ | ||
39 | /* | ||
40 | |||
41 | Initial driver on which this is based was developed by Janusz Gorycki, | ||
42 | Maciej Urbaniak, and Maciej Sosnowski. | ||
43 | |||
44 | Promiscuous mode support added by Jacek Wysoczynski and Maciej Urbaniak. | ||
45 | |||
46 | Theory of Operation | ||
47 | |||
48 | Tx - Commands and Data | ||
49 | |||
50 | Firmware and host share a circular queue of Transmit Buffer Descriptors (TBDs) | ||
51 | Each TBD contains a pointer to the physical (dma_addr_t) address of data being | ||
52 | sent to the firmware as well as the length of the data. | ||
53 | |||
54 | The host writes to the TBD queue at the WRITE index. The WRITE index points | ||
55 | to the _next_ packet to be written and is advanced when after the TBD has been | ||
56 | filled. | ||
57 | |||
58 | The firmware pulls from the TBD queue at the READ index. The READ index points | ||
59 | to the currently being read entry, and is advanced once the firmware is | ||
60 | done with a packet. | ||
61 | |||
62 | When data is sent to the firmware, the first TBD is used to indicate to the | ||
63 | firmware if a Command or Data is being sent. If it is Command, all of the | ||
64 | command information is contained within the physical address referred to by the | ||
65 | TBD. If it is Data, the first TBD indicates the type of data packet, number | ||
66 | of fragments, etc. The next TBD then referrs to the actual packet location. | ||
67 | |||
68 | The Tx flow cycle is as follows: | ||
69 | |||
70 | 1) ipw2100_tx() is called by kernel with SKB to transmit | ||
71 | 2) Packet is move from the tx_free_list and appended to the transmit pending | ||
72 | list (tx_pend_list) | ||
73 | 3) work is scheduled to move pending packets into the shared circular queue. | ||
74 | 4) when placing packet in the circular queue, the incoming SKB is DMA mapped | ||
75 | to a physical address. That address is entered into a TBD. Two TBDs are | ||
76 | filled out. The first indicating a data packet, the second referring to the | ||
77 | actual payload data. | ||
78 | 5) the packet is removed from tx_pend_list and placed on the end of the | ||
79 | firmware pending list (fw_pend_list) | ||
80 | 6) firmware is notified that the WRITE index has | ||
81 | 7) Once the firmware has processed the TBD, INTA is triggered. | ||
82 | 8) For each Tx interrupt received from the firmware, the READ index is checked | ||
83 | to see which TBDs are done being processed. | ||
84 | 9) For each TBD that has been processed, the ISR pulls the oldest packet | ||
85 | from the fw_pend_list. | ||
86 | 10)The packet structure contained in the fw_pend_list is then used | ||
87 | to unmap the DMA address and to free the SKB originally passed to the driver | ||
88 | from the kernel. | ||
89 | 11)The packet structure is placed onto the tx_free_list | ||
90 | |||
91 | The above steps are the same for commands, only the msg_free_list/msg_pend_list | ||
92 | are used instead of tx_free_list/tx_pend_list | ||
93 | |||
94 | ... | ||
95 | |||
96 | Critical Sections / Locking : | ||
97 | |||
98 | There are two locks utilized. The first is the low level lock (priv->low_lock) | ||
99 | that protects the following: | ||
100 | |||
101 | - Access to the Tx/Rx queue lists via priv->low_lock. The lists are as follows: | ||
102 | |||
103 | tx_free_list : Holds pre-allocated Tx buffers. | ||
104 | TAIL modified in __ipw2100_tx_process() | ||
105 | HEAD modified in ipw2100_tx() | ||
106 | |||
107 | tx_pend_list : Holds used Tx buffers waiting to go into the TBD ring | ||
108 | TAIL modified ipw2100_tx() | ||
109 | HEAD modified by X__ipw2100_tx_send_data() | ||
110 | |||
111 | msg_free_list : Holds pre-allocated Msg (Command) buffers | ||
112 | TAIL modified in __ipw2100_tx_process() | ||
113 | HEAD modified in ipw2100_hw_send_command() | ||
114 | |||
115 | msg_pend_list : Holds used Msg buffers waiting to go into the TBD ring | ||
116 | TAIL modified in ipw2100_hw_send_command() | ||
117 | HEAD modified in X__ipw2100_tx_send_commands() | ||
118 | |||
119 | The flow of data on the TX side is as follows: | ||
120 | |||
121 | MSG_FREE_LIST + COMMAND => MSG_PEND_LIST => TBD => MSG_FREE_LIST | ||
122 | TX_FREE_LIST + DATA => TX_PEND_LIST => TBD => TX_FREE_LIST | ||
123 | |||
124 | The methods that work on the TBD ring are protected via priv->low_lock. | ||
125 | |||
126 | - The internal data state of the device itself | ||
127 | - Access to the firmware read/write indexes for the BD queues | ||
128 | and associated logic | ||
129 | |||
130 | All external entry functions are locked with the priv->action_lock to ensure | ||
131 | that only one external action is invoked at a time. | ||
132 | |||
133 | |||
134 | */ | ||
135 | |||
136 | #include <linux/compiler.h> | ||
137 | #include <linux/config.h> | ||
138 | #include <linux/errno.h> | ||
139 | #include <linux/if_arp.h> | ||
140 | #include <linux/in6.h> | ||
141 | #include <linux/in.h> | ||
142 | #include <linux/ip.h> | ||
143 | #include <linux/kernel.h> | ||
144 | #include <linux/kmod.h> | ||
145 | #include <linux/module.h> | ||
146 | #include <linux/netdevice.h> | ||
147 | #include <linux/ethtool.h> | ||
148 | #include <linux/pci.h> | ||
149 | #include <linux/proc_fs.h> | ||
150 | #include <linux/skbuff.h> | ||
151 | #include <asm/uaccess.h> | ||
152 | #include <asm/io.h> | ||
153 | #define __KERNEL_SYSCALLS__ | ||
154 | #include <linux/fs.h> | ||
155 | #include <linux/mm.h> | ||
156 | #include <linux/slab.h> | ||
157 | #include <linux/unistd.h> | ||
158 | #include <linux/stringify.h> | ||
159 | #include <linux/tcp.h> | ||
160 | #include <linux/types.h> | ||
161 | #include <linux/version.h> | ||
162 | #include <linux/time.h> | ||
163 | #include <linux/firmware.h> | ||
164 | #include <linux/acpi.h> | ||
165 | #include <linux/ctype.h> | ||
166 | |||
167 | #include "ipw2100.h" | ||
168 | |||
169 | #define IPW2100_VERSION "1.1.0" | ||
170 | |||
171 | #define DRV_NAME "ipw2100" | ||
172 | #define DRV_VERSION IPW2100_VERSION | ||
173 | #define DRV_DESCRIPTION "Intel(R) PRO/Wireless 2100 Network Driver" | ||
174 | #define DRV_COPYRIGHT "Copyright(c) 2003-2004 Intel Corporation" | ||
175 | |||
176 | |||
177 | /* Debugging stuff */ | ||
178 | #ifdef CONFIG_IPW_DEBUG | ||
179 | #define CONFIG_IPW2100_RX_DEBUG /* Reception debugging */ | ||
180 | #endif | ||
181 | |||
182 | MODULE_DESCRIPTION(DRV_DESCRIPTION); | ||
183 | MODULE_VERSION(DRV_VERSION); | ||
184 | MODULE_AUTHOR(DRV_COPYRIGHT); | ||
185 | MODULE_LICENSE("GPL"); | ||
186 | |||
187 | static int debug = 0; | ||
188 | static int mode = 0; | ||
189 | static int channel = 0; | ||
190 | static int associate = 1; | ||
191 | static int disable = 0; | ||
192 | #ifdef CONFIG_PM | ||
193 | static struct ipw2100_fw ipw2100_firmware; | ||
194 | #endif | ||
195 | |||
196 | #include <linux/moduleparam.h> | ||
197 | module_param(debug, int, 0444); | ||
198 | module_param(mode, int, 0444); | ||
199 | module_param(channel, int, 0444); | ||
200 | module_param(associate, int, 0444); | ||
201 | module_param(disable, int, 0444); | ||
202 | |||
203 | MODULE_PARM_DESC(debug, "debug level"); | ||
204 | MODULE_PARM_DESC(mode, "network mode (0=BSS,1=IBSS,2=Monitor)"); | ||
205 | MODULE_PARM_DESC(channel, "channel"); | ||
206 | MODULE_PARM_DESC(associate, "auto associate when scanning (default on)"); | ||
207 | MODULE_PARM_DESC(disable, "manually disable the radio (default 0 [radio on])"); | ||
208 | |||
209 | u32 ipw2100_debug_level = IPW_DL_NONE; | ||
210 | |||
211 | #ifdef CONFIG_IPW_DEBUG | ||
212 | static const char *command_types[] = { | ||
213 | "undefined", | ||
214 | "unused", /* HOST_ATTENTION */ | ||
215 | "HOST_COMPLETE", | ||
216 | "unused", /* SLEEP */ | ||
217 | "unused", /* HOST_POWER_DOWN */ | ||
218 | "unused", | ||
219 | "SYSTEM_CONFIG", | ||
220 | "unused", /* SET_IMR */ | ||
221 | "SSID", | ||
222 | "MANDATORY_BSSID", | ||
223 | "AUTHENTICATION_TYPE", | ||
224 | "ADAPTER_ADDRESS", | ||
225 | "PORT_TYPE", | ||
226 | "INTERNATIONAL_MODE", | ||
227 | "CHANNEL", | ||
228 | "RTS_THRESHOLD", | ||
229 | "FRAG_THRESHOLD", | ||
230 | "POWER_MODE", | ||
231 | "TX_RATES", | ||
232 | "BASIC_TX_RATES", | ||
233 | "WEP_KEY_INFO", | ||
234 | "unused", | ||
235 | "unused", | ||
236 | "unused", | ||
237 | "unused", | ||
238 | "WEP_KEY_INDEX", | ||
239 | "WEP_FLAGS", | ||
240 | "ADD_MULTICAST", | ||
241 | "CLEAR_ALL_MULTICAST", | ||
242 | "BEACON_INTERVAL", | ||
243 | "ATIM_WINDOW", | ||
244 | "CLEAR_STATISTICS", | ||
245 | "undefined", | ||
246 | "undefined", | ||
247 | "undefined", | ||
248 | "undefined", | ||
249 | "TX_POWER_INDEX", | ||
250 | "undefined", | ||
251 | "undefined", | ||
252 | "undefined", | ||
253 | "undefined", | ||
254 | "undefined", | ||
255 | "undefined", | ||
256 | "BROADCAST_SCAN", | ||
257 | "CARD_DISABLE", | ||
258 | "PREFERRED_BSSID", | ||
259 | "SET_SCAN_OPTIONS", | ||
260 | "SCAN_DWELL_TIME", | ||
261 | "SWEEP_TABLE", | ||
262 | "AP_OR_STATION_TABLE", | ||
263 | "GROUP_ORDINALS", | ||
264 | "SHORT_RETRY_LIMIT", | ||
265 | "LONG_RETRY_LIMIT", | ||
266 | "unused", /* SAVE_CALIBRATION */ | ||
267 | "unused", /* RESTORE_CALIBRATION */ | ||
268 | "undefined", | ||
269 | "undefined", | ||
270 | "undefined", | ||
271 | "HOST_PRE_POWER_DOWN", | ||
272 | "unused", /* HOST_INTERRUPT_COALESCING */ | ||
273 | "undefined", | ||
274 | "CARD_DISABLE_PHY_OFF", | ||
275 | "MSDU_TX_RATES" | ||
276 | "undefined", | ||
277 | "undefined", | ||
278 | "SET_STATION_STAT_BITS", | ||
279 | "CLEAR_STATIONS_STAT_BITS", | ||
280 | "LEAP_ROGUE_MODE", | ||
281 | "SET_SECURITY_INFORMATION", | ||
282 | "DISASSOCIATION_BSSID", | ||
283 | "SET_WPA_ASS_IE" | ||
284 | }; | ||
285 | #endif | ||
286 | |||
287 | |||
288 | /* Pre-decl until we get the code solid and then we can clean it up */ | ||
289 | static void X__ipw2100_tx_send_commands(struct ipw2100_priv *priv); | ||
290 | static void X__ipw2100_tx_send_data(struct ipw2100_priv *priv); | ||
291 | static int ipw2100_adapter_setup(struct ipw2100_priv *priv); | ||
292 | |||
293 | static void ipw2100_queues_initialize(struct ipw2100_priv *priv); | ||
294 | static void ipw2100_queues_free(struct ipw2100_priv *priv); | ||
295 | static int ipw2100_queues_allocate(struct ipw2100_priv *priv); | ||
296 | |||
297 | |||
298 | static inline void read_register(struct net_device *dev, u32 reg, u32 *val) | ||
299 | { | ||
300 | *val = readl((void *)(dev->base_addr + reg)); | ||
301 | IPW_DEBUG_IO("r: 0x%08X => 0x%08X\n", reg, *val); | ||
302 | } | ||
303 | |||
304 | static inline void write_register(struct net_device *dev, u32 reg, u32 val) | ||
305 | { | ||
306 | writel(val, (void *)(dev->base_addr + reg)); | ||
307 | IPW_DEBUG_IO("w: 0x%08X <= 0x%08X\n", reg, val); | ||
308 | } | ||
309 | |||
310 | static inline void read_register_word(struct net_device *dev, u32 reg, u16 *val) | ||
311 | { | ||
312 | *val = readw((void *)(dev->base_addr + reg)); | ||
313 | IPW_DEBUG_IO("r: 0x%08X => %04X\n", reg, *val); | ||
314 | } | ||
315 | |||
316 | static inline void read_register_byte(struct net_device *dev, u32 reg, u8 *val) | ||
317 | { | ||
318 | *val = readb((void *)(dev->base_addr + reg)); | ||
319 | IPW_DEBUG_IO("r: 0x%08X => %02X\n", reg, *val); | ||
320 | } | ||
321 | |||
322 | static inline void write_register_word(struct net_device *dev, u32 reg, u16 val) | ||
323 | { | ||
324 | writew(val, (void *)(dev->base_addr + reg)); | ||
325 | IPW_DEBUG_IO("w: 0x%08X <= %04X\n", reg, val); | ||
326 | } | ||
327 | |||
328 | |||
329 | static inline void write_register_byte(struct net_device *dev, u32 reg, u8 val) | ||
330 | { | ||
331 | writeb(val, (void *)(dev->base_addr + reg)); | ||
332 | IPW_DEBUG_IO("w: 0x%08X =< %02X\n", reg, val); | ||
333 | } | ||
334 | |||
335 | static inline void read_nic_dword(struct net_device *dev, u32 addr, u32 *val) | ||
336 | { | ||
337 | write_register(dev, IPW_REG_INDIRECT_ACCESS_ADDRESS, | ||
338 | addr & IPW_REG_INDIRECT_ADDR_MASK); | ||
339 | read_register(dev, IPW_REG_INDIRECT_ACCESS_DATA, val); | ||
340 | } | ||
341 | |||
342 | static inline void write_nic_dword(struct net_device *dev, u32 addr, u32 val) | ||
343 | { | ||
344 | write_register(dev, IPW_REG_INDIRECT_ACCESS_ADDRESS, | ||
345 | addr & IPW_REG_INDIRECT_ADDR_MASK); | ||
346 | write_register(dev, IPW_REG_INDIRECT_ACCESS_DATA, val); | ||
347 | } | ||
348 | |||
349 | static inline void read_nic_word(struct net_device *dev, u32 addr, u16 *val) | ||
350 | { | ||
351 | write_register(dev, IPW_REG_INDIRECT_ACCESS_ADDRESS, | ||
352 | addr & IPW_REG_INDIRECT_ADDR_MASK); | ||
353 | read_register_word(dev, IPW_REG_INDIRECT_ACCESS_DATA, val); | ||
354 | } | ||
355 | |||
356 | static inline void write_nic_word(struct net_device *dev, u32 addr, u16 val) | ||
357 | { | ||
358 | write_register(dev, IPW_REG_INDIRECT_ACCESS_ADDRESS, | ||
359 | addr & IPW_REG_INDIRECT_ADDR_MASK); | ||
360 | write_register_word(dev, IPW_REG_INDIRECT_ACCESS_DATA, val); | ||
361 | } | ||
362 | |||
363 | static inline void read_nic_byte(struct net_device *dev, u32 addr, u8 *val) | ||
364 | { | ||
365 | write_register(dev, IPW_REG_INDIRECT_ACCESS_ADDRESS, | ||
366 | addr & IPW_REG_INDIRECT_ADDR_MASK); | ||
367 | read_register_byte(dev, IPW_REG_INDIRECT_ACCESS_DATA, val); | ||
368 | } | ||
369 | |||
370 | static inline void write_nic_byte(struct net_device *dev, u32 addr, u8 val) | ||
371 | { | ||
372 | write_register(dev, IPW_REG_INDIRECT_ACCESS_ADDRESS, | ||
373 | addr & IPW_REG_INDIRECT_ADDR_MASK); | ||
374 | write_register_byte(dev, IPW_REG_INDIRECT_ACCESS_DATA, val); | ||
375 | } | ||
376 | |||
377 | static inline void write_nic_auto_inc_address(struct net_device *dev, u32 addr) | ||
378 | { | ||
379 | write_register(dev, IPW_REG_AUTOINCREMENT_ADDRESS, | ||
380 | addr & IPW_REG_INDIRECT_ADDR_MASK); | ||
381 | } | ||
382 | |||
383 | static inline void write_nic_dword_auto_inc(struct net_device *dev, u32 val) | ||
384 | { | ||
385 | write_register(dev, IPW_REG_AUTOINCREMENT_DATA, val); | ||
386 | } | ||
387 | |||
388 | static inline void write_nic_memory(struct net_device *dev, u32 addr, u32 len, | ||
389 | const u8 *buf) | ||
390 | { | ||
391 | u32 aligned_addr; | ||
392 | u32 aligned_len; | ||
393 | u32 dif_len; | ||
394 | u32 i; | ||
395 | |||
396 | /* read first nibble byte by byte */ | ||
397 | aligned_addr = addr & (~0x3); | ||
398 | dif_len = addr - aligned_addr; | ||
399 | if (dif_len) { | ||
400 | /* Start reading at aligned_addr + dif_len */ | ||
401 | write_register(dev, IPW_REG_INDIRECT_ACCESS_ADDRESS, | ||
402 | aligned_addr); | ||
403 | for (i = dif_len; i < 4; i++, buf++) | ||
404 | write_register_byte( | ||
405 | dev, IPW_REG_INDIRECT_ACCESS_DATA + i, | ||
406 | *buf); | ||
407 | |||
408 | len -= dif_len; | ||
409 | aligned_addr += 4; | ||
410 | } | ||
411 | |||
412 | /* read DWs through autoincrement registers */ | ||
413 | write_register(dev, IPW_REG_AUTOINCREMENT_ADDRESS, | ||
414 | aligned_addr); | ||
415 | aligned_len = len & (~0x3); | ||
416 | for (i = 0; i < aligned_len; i += 4, buf += 4, aligned_addr += 4) | ||
417 | write_register( | ||
418 | dev, IPW_REG_AUTOINCREMENT_DATA, *(u32 *)buf); | ||
419 | |||
420 | /* copy the last nibble */ | ||
421 | dif_len = len - aligned_len; | ||
422 | write_register(dev, IPW_REG_INDIRECT_ACCESS_ADDRESS, aligned_addr); | ||
423 | for (i = 0; i < dif_len; i++, buf++) | ||
424 | write_register_byte( | ||
425 | dev, IPW_REG_INDIRECT_ACCESS_DATA + i, *buf); | ||
426 | } | ||
427 | |||
428 | static inline void read_nic_memory(struct net_device *dev, u32 addr, u32 len, | ||
429 | u8 *buf) | ||
430 | { | ||
431 | u32 aligned_addr; | ||
432 | u32 aligned_len; | ||
433 | u32 dif_len; | ||
434 | u32 i; | ||
435 | |||
436 | /* read first nibble byte by byte */ | ||
437 | aligned_addr = addr & (~0x3); | ||
438 | dif_len = addr - aligned_addr; | ||
439 | if (dif_len) { | ||
440 | /* Start reading at aligned_addr + dif_len */ | ||
441 | write_register(dev, IPW_REG_INDIRECT_ACCESS_ADDRESS, | ||
442 | aligned_addr); | ||
443 | for (i = dif_len; i < 4; i++, buf++) | ||
444 | read_register_byte( | ||
445 | dev, IPW_REG_INDIRECT_ACCESS_DATA + i, buf); | ||
446 | |||
447 | len -= dif_len; | ||
448 | aligned_addr += 4; | ||
449 | } | ||
450 | |||
451 | /* read DWs through autoincrement registers */ | ||
452 | write_register(dev, IPW_REG_AUTOINCREMENT_ADDRESS, | ||
453 | aligned_addr); | ||
454 | aligned_len = len & (~0x3); | ||
455 | for (i = 0; i < aligned_len; i += 4, buf += 4, aligned_addr += 4) | ||
456 | read_register(dev, IPW_REG_AUTOINCREMENT_DATA, | ||
457 | (u32 *)buf); | ||
458 | |||
459 | /* copy the last nibble */ | ||
460 | dif_len = len - aligned_len; | ||
461 | write_register(dev, IPW_REG_INDIRECT_ACCESS_ADDRESS, | ||
462 | aligned_addr); | ||
463 | for (i = 0; i < dif_len; i++, buf++) | ||
464 | read_register_byte(dev, IPW_REG_INDIRECT_ACCESS_DATA + | ||
465 | i, buf); | ||
466 | } | ||
467 | |||
468 | static inline int ipw2100_hw_is_adapter_in_system(struct net_device *dev) | ||
469 | { | ||
470 | return (dev->base_addr && | ||
471 | (readl((void *)(dev->base_addr + IPW_REG_DOA_DEBUG_AREA_START)) | ||
472 | == IPW_DATA_DOA_DEBUG_VALUE)); | ||
473 | } | ||
474 | |||
475 | int ipw2100_get_ordinal(struct ipw2100_priv *priv, u32 ord, | ||
476 | void *val, u32 *len) | ||
477 | { | ||
478 | struct ipw2100_ordinals *ordinals = &priv->ordinals; | ||
479 | u32 addr; | ||
480 | u32 field_info; | ||
481 | u16 field_len; | ||
482 | u16 field_count; | ||
483 | u32 total_length; | ||
484 | |||
485 | if (ordinals->table1_addr == 0) { | ||
486 | IPW_DEBUG_WARNING(DRV_NAME ": attempt to use fw ordinals " | ||
487 | "before they have been loaded.\n"); | ||
488 | return -EINVAL; | ||
489 | } | ||
490 | |||
491 | if (IS_ORDINAL_TABLE_ONE(ordinals, ord)) { | ||
492 | if (*len < IPW_ORD_TAB_1_ENTRY_SIZE) { | ||
493 | *len = IPW_ORD_TAB_1_ENTRY_SIZE; | ||
494 | |||
495 | IPW_DEBUG_WARNING(DRV_NAME | ||
496 | ": ordinal buffer length too small, need %d\n", | ||
497 | IPW_ORD_TAB_1_ENTRY_SIZE); | ||
498 | |||
499 | return -EINVAL; | ||
500 | } | ||
501 | |||
502 | read_nic_dword(priv->net_dev, ordinals->table1_addr + (ord << 2), | ||
503 | &addr); | ||
504 | read_nic_dword(priv->net_dev, addr, val); | ||
505 | |||
506 | *len = IPW_ORD_TAB_1_ENTRY_SIZE; | ||
507 | |||
508 | return 0; | ||
509 | } | ||
510 | |||
511 | if (IS_ORDINAL_TABLE_TWO(ordinals, ord)) { | ||
512 | |||
513 | ord -= IPW_START_ORD_TAB_2; | ||
514 | |||
515 | /* get the address of statistic */ | ||
516 | read_nic_dword(priv->net_dev, ordinals->table2_addr + (ord << 3), | ||
517 | &addr); | ||
518 | |||
519 | /* get the second DW of statistics ; | ||
520 | * two 16-bit words - first is length, second is count */ | ||
521 | read_nic_dword(priv->net_dev, | ||
522 | ordinals->table2_addr + (ord << 3) + sizeof(u32), | ||
523 | &field_info); | ||
524 | |||
525 | /* get each entry length */ | ||
526 | field_len = *((u16 *)&field_info); | ||
527 | |||
528 | /* get number of entries */ | ||
529 | field_count = *(((u16 *)&field_info) + 1); | ||
530 | |||
531 | /* abort if no enought memory */ | ||
532 | total_length = field_len * field_count; | ||
533 | if (total_length > *len) { | ||
534 | *len = total_length; | ||
535 | return -EINVAL; | ||
536 | } | ||
537 | |||
538 | *len = total_length; | ||
539 | if (!total_length) | ||
540 | return 0; | ||
541 | |||
542 | /* read the ordinal data from the SRAM */ | ||
543 | read_nic_memory(priv->net_dev, addr, total_length, val); | ||
544 | |||
545 | return 0; | ||
546 | } | ||
547 | |||
548 | IPW_DEBUG_WARNING(DRV_NAME ": ordinal %d neither in table 1 nor " | ||
549 | "in table 2\n", ord); | ||
550 | |||
551 | return -EINVAL; | ||
552 | } | ||
553 | |||
554 | static int ipw2100_set_ordinal(struct ipw2100_priv *priv, u32 ord, u32 *val, | ||
555 | u32 *len) | ||
556 | { | ||
557 | struct ipw2100_ordinals *ordinals = &priv->ordinals; | ||
558 | u32 addr; | ||
559 | |||
560 | if (IS_ORDINAL_TABLE_ONE(ordinals, ord)) { | ||
561 | if (*len != IPW_ORD_TAB_1_ENTRY_SIZE) { | ||
562 | *len = IPW_ORD_TAB_1_ENTRY_SIZE; | ||
563 | IPW_DEBUG_INFO("wrong size\n"); | ||
564 | return -EINVAL; | ||
565 | } | ||
566 | |||
567 | read_nic_dword(priv->net_dev, ordinals->table1_addr + (ord << 2), | ||
568 | &addr); | ||
569 | |||
570 | write_nic_dword(priv->net_dev, addr, *val); | ||
571 | |||
572 | *len = IPW_ORD_TAB_1_ENTRY_SIZE; | ||
573 | |||
574 | return 0; | ||
575 | } | ||
576 | |||
577 | IPW_DEBUG_INFO("wrong table\n"); | ||
578 | if (IS_ORDINAL_TABLE_TWO(ordinals, ord)) | ||
579 | return -EINVAL; | ||
580 | |||
581 | return -EINVAL; | ||
582 | } | ||
583 | |||
584 | static char *snprint_line(char *buf, size_t count, | ||
585 | const u8 *data, u32 len, u32 ofs) | ||
586 | { | ||
587 | int out, i, j, l; | ||
588 | char c; | ||
589 | |||
590 | out = snprintf(buf, count, "%08X", ofs); | ||
591 | |||
592 | for (l = 0, i = 0; i < 2; i++) { | ||
593 | out += snprintf(buf + out, count - out, " "); | ||
594 | for (j = 0; j < 8 && l < len; j++, l++) | ||
595 | out += snprintf(buf + out, count - out, "%02X ", | ||
596 | data[(i * 8 + j)]); | ||
597 | for (; j < 8; j++) | ||
598 | out += snprintf(buf + out, count - out, " "); | ||
599 | } | ||
600 | |||
601 | out += snprintf(buf + out, count - out, " "); | ||
602 | for (l = 0, i = 0; i < 2; i++) { | ||
603 | out += snprintf(buf + out, count - out, " "); | ||
604 | for (j = 0; j < 8 && l < len; j++, l++) { | ||
605 | c = data[(i * 8 + j)]; | ||
606 | if (!isascii(c) || !isprint(c)) | ||
607 | c = '.'; | ||
608 | |||
609 | out += snprintf(buf + out, count - out, "%c", c); | ||
610 | } | ||
611 | |||
612 | for (; j < 8; j++) | ||
613 | out += snprintf(buf + out, count - out, " "); | ||
614 | } | ||
615 | |||
616 | return buf; | ||
617 | } | ||
618 | |||
619 | static void printk_buf(int level, const u8 *data, u32 len) | ||
620 | { | ||
621 | char line[81]; | ||
622 | u32 ofs = 0; | ||
623 | if (!(ipw2100_debug_level & level)) | ||
624 | return; | ||
625 | |||
626 | while (len) { | ||
627 | printk(KERN_DEBUG "%s\n", | ||
628 | snprint_line(line, sizeof(line), &data[ofs], | ||
629 | min(len, 16U), ofs)); | ||
630 | ofs += 16; | ||
631 | len -= min(len, 16U); | ||
632 | } | ||
633 | } | ||
634 | |||
635 | |||
636 | |||
637 | #define MAX_RESET_BACKOFF 10 | ||
638 | |||
639 | static inline void schedule_reset(struct ipw2100_priv *priv) | ||
640 | { | ||
641 | unsigned long now = get_seconds(); | ||
642 | |||
643 | /* If we haven't received a reset request within the backoff period, | ||
644 | * then we can reset the backoff interval so this reset occurs | ||
645 | * immediately */ | ||
646 | if (priv->reset_backoff && | ||
647 | (now - priv->last_reset > priv->reset_backoff)) | ||
648 | priv->reset_backoff = 0; | ||
649 | |||
650 | priv->last_reset = get_seconds(); | ||
651 | |||
652 | if (!(priv->status & STATUS_RESET_PENDING)) { | ||
653 | IPW_DEBUG_INFO("%s: Scheduling firmware restart (%ds).\n", | ||
654 | priv->net_dev->name, priv->reset_backoff); | ||
655 | netif_carrier_off(priv->net_dev); | ||
656 | netif_stop_queue(priv->net_dev); | ||
657 | priv->status |= STATUS_RESET_PENDING; | ||
658 | if (priv->reset_backoff) | ||
659 | queue_delayed_work(priv->workqueue, &priv->reset_work, | ||
660 | priv->reset_backoff * HZ); | ||
661 | else | ||
662 | queue_work(priv->workqueue, &priv->reset_work); | ||
663 | |||
664 | if (priv->reset_backoff < MAX_RESET_BACKOFF) | ||
665 | priv->reset_backoff++; | ||
666 | |||
667 | wake_up_interruptible(&priv->wait_command_queue); | ||
668 | } else | ||
669 | IPW_DEBUG_INFO("%s: Firmware restart already in progress.\n", | ||
670 | priv->net_dev->name); | ||
671 | |||
672 | } | ||
673 | |||
674 | #define HOST_COMPLETE_TIMEOUT (2 * HZ) | ||
675 | static int ipw2100_hw_send_command(struct ipw2100_priv *priv, | ||
676 | struct host_command * cmd) | ||
677 | { | ||
678 | struct list_head *element; | ||
679 | struct ipw2100_tx_packet *packet; | ||
680 | unsigned long flags; | ||
681 | int err = 0; | ||
682 | |||
683 | IPW_DEBUG_HC("Sending %s command (#%d), %d bytes\n", | ||
684 | command_types[cmd->host_command], cmd->host_command, | ||
685 | cmd->host_command_length); | ||
686 | printk_buf(IPW_DL_HC, (u8*)cmd->host_command_parameters, | ||
687 | cmd->host_command_length); | ||
688 | |||
689 | spin_lock_irqsave(&priv->low_lock, flags); | ||
690 | |||
691 | if (priv->fatal_error) { | ||
692 | IPW_DEBUG_INFO("Attempt to send command while hardware in fatal error condition.\n"); | ||
693 | err = -EIO; | ||
694 | goto fail_unlock; | ||
695 | } | ||
696 | |||
697 | if (!(priv->status & STATUS_RUNNING)) { | ||
698 | IPW_DEBUG_INFO("Attempt to send command while hardware is not running.\n"); | ||
699 | err = -EIO; | ||
700 | goto fail_unlock; | ||
701 | } | ||
702 | |||
703 | if (priv->status & STATUS_CMD_ACTIVE) { | ||
704 | IPW_DEBUG_INFO("Attempt to send command while another command is pending.\n"); | ||
705 | err = -EBUSY; | ||
706 | goto fail_unlock; | ||
707 | } | ||
708 | |||
709 | if (list_empty(&priv->msg_free_list)) { | ||
710 | IPW_DEBUG_INFO("no available msg buffers\n"); | ||
711 | goto fail_unlock; | ||
712 | } | ||
713 | |||
714 | priv->status |= STATUS_CMD_ACTIVE; | ||
715 | priv->messages_sent++; | ||
716 | |||
717 | element = priv->msg_free_list.next; | ||
718 | |||
719 | packet = list_entry(element, struct ipw2100_tx_packet, list); | ||
720 | packet->jiffy_start = jiffies; | ||
721 | |||
722 | /* initialize the firmware command packet */ | ||
723 | packet->info.c_struct.cmd->host_command_reg = cmd->host_command; | ||
724 | packet->info.c_struct.cmd->host_command_reg1 = cmd->host_command1; | ||
725 | packet->info.c_struct.cmd->host_command_len_reg = cmd->host_command_length; | ||
726 | packet->info.c_struct.cmd->sequence = cmd->host_command_sequence; | ||
727 | |||
728 | memcpy(packet->info.c_struct.cmd->host_command_params_reg, | ||
729 | cmd->host_command_parameters, | ||
730 | sizeof(packet->info.c_struct.cmd->host_command_params_reg)); | ||
731 | |||
732 | list_del(element); | ||
733 | DEC_STAT(&priv->msg_free_stat); | ||
734 | |||
735 | list_add_tail(element, &priv->msg_pend_list); | ||
736 | INC_STAT(&priv->msg_pend_stat); | ||
737 | |||
738 | X__ipw2100_tx_send_commands(priv); | ||
739 | X__ipw2100_tx_send_data(priv); | ||
740 | |||
741 | spin_unlock_irqrestore(&priv->low_lock, flags); | ||
742 | |||
743 | /* | ||
744 | * We must wait for this command to complete before another | ||
745 | * command can be sent... but if we wait more than 3 seconds | ||
746 | * then there is a problem. | ||
747 | */ | ||
748 | |||
749 | err = wait_event_interruptible_timeout( | ||
750 | priv->wait_command_queue, !(priv->status & STATUS_CMD_ACTIVE), | ||
751 | HOST_COMPLETE_TIMEOUT); | ||
752 | |||
753 | if (err == 0) { | ||
754 | IPW_DEBUG_INFO("Command completion failed out after %dms.\n", | ||
755 | HOST_COMPLETE_TIMEOUT / (HZ / 100)); | ||
756 | priv->fatal_error = IPW2100_ERR_MSG_TIMEOUT; | ||
757 | priv->status &= ~STATUS_CMD_ACTIVE; | ||
758 | schedule_reset(priv); | ||
759 | return -EIO; | ||
760 | } | ||
761 | |||
762 | if (priv->fatal_error) { | ||
763 | IPW_DEBUG_WARNING("%s: firmware fatal error\n", | ||
764 | priv->net_dev->name); | ||
765 | return -EIO; | ||
766 | } | ||
767 | |||
768 | /* !!!!! HACK TEST !!!!! | ||
769 | * When lots of debug trace statements are enabled, the driver | ||
770 | * doesn't seem to have as many firmware restart cycles... | ||
771 | * | ||
772 | * As a test, we're sticking in a 1/100s delay here */ | ||
773 | set_current_state(TASK_UNINTERRUPTIBLE); | ||
774 | schedule_timeout(HZ / 100); | ||
775 | |||
776 | return 0; | ||
777 | |||
778 | fail_unlock: | ||
779 | spin_unlock_irqrestore(&priv->low_lock, flags); | ||
780 | |||
781 | return err; | ||
782 | } | ||
783 | |||
784 | |||
785 | /* | ||
786 | * Verify the values and data access of the hardware | ||
787 | * No locks needed or used. No functions called. | ||
788 | */ | ||
789 | static int ipw2100_verify(struct ipw2100_priv *priv) | ||
790 | { | ||
791 | u32 data1, data2; | ||
792 | u32 address; | ||
793 | |||
794 | u32 val1 = 0x76543210; | ||
795 | u32 val2 = 0xFEDCBA98; | ||
796 | |||
797 | /* Domain 0 check - all values should be DOA_DEBUG */ | ||
798 | for (address = IPW_REG_DOA_DEBUG_AREA_START; | ||
799 | address < IPW_REG_DOA_DEBUG_AREA_END; | ||
800 | address += sizeof(u32)) { | ||
801 | read_register(priv->net_dev, address, &data1); | ||
802 | if (data1 != IPW_DATA_DOA_DEBUG_VALUE) | ||
803 | return -EIO; | ||
804 | } | ||
805 | |||
806 | /* Domain 1 check - use arbitrary read/write compare */ | ||
807 | for (address = 0; address < 5; address++) { | ||
808 | /* The memory area is not used now */ | ||
809 | write_register(priv->net_dev, IPW_REG_DOMAIN_1_OFFSET + 0x32, | ||
810 | val1); | ||
811 | write_register(priv->net_dev, IPW_REG_DOMAIN_1_OFFSET + 0x36, | ||
812 | val2); | ||
813 | read_register(priv->net_dev, IPW_REG_DOMAIN_1_OFFSET + 0x32, | ||
814 | &data1); | ||
815 | read_register(priv->net_dev, IPW_REG_DOMAIN_1_OFFSET + 0x36, | ||
816 | &data2); | ||
817 | if (val1 == data1 && val2 == data2) | ||
818 | return 0; | ||
819 | } | ||
820 | |||
821 | return -EIO; | ||
822 | } | ||
823 | |||
824 | /* | ||
825 | * | ||
826 | * Loop until the CARD_DISABLED bit is the same value as the | ||
827 | * supplied parameter | ||
828 | * | ||
829 | * TODO: See if it would be more efficient to do a wait/wake | ||
830 | * cycle and have the completion event trigger the wakeup | ||
831 | * | ||
832 | */ | ||
833 | #define IPW_CARD_DISABLE_COMPLETE_WAIT 100 // 100 milli | ||
834 | static int ipw2100_wait_for_card_state(struct ipw2100_priv *priv, int state) | ||
835 | { | ||
836 | int i; | ||
837 | u32 card_state; | ||
838 | u32 len = sizeof(card_state); | ||
839 | int err; | ||
840 | |||
841 | for (i = 0; i <= IPW_CARD_DISABLE_COMPLETE_WAIT * 1000; i += 50) { | ||
842 | err = ipw2100_get_ordinal(priv, IPW_ORD_CARD_DISABLED, | ||
843 | &card_state, &len); | ||
844 | if (err) { | ||
845 | IPW_DEBUG_INFO("Query of CARD_DISABLED ordinal " | ||
846 | "failed.\n"); | ||
847 | return 0; | ||
848 | } | ||
849 | |||
850 | /* We'll break out if either the HW state says it is | ||
851 | * in the state we want, or if HOST_COMPLETE command | ||
852 | * finishes */ | ||
853 | if ((card_state == state) || | ||
854 | ((priv->status & STATUS_ENABLED) ? | ||
855 | IPW_HW_STATE_ENABLED : IPW_HW_STATE_DISABLED) == state) { | ||
856 | if (state == IPW_HW_STATE_ENABLED) | ||
857 | priv->status |= STATUS_ENABLED; | ||
858 | else | ||
859 | priv->status &= ~STATUS_ENABLED; | ||
860 | |||
861 | return 0; | ||
862 | } | ||
863 | |||
864 | udelay(50); | ||
865 | } | ||
866 | |||
867 | IPW_DEBUG_INFO("ipw2100_wait_for_card_state to %s state timed out\n", | ||
868 | state ? "DISABLED" : "ENABLED"); | ||
869 | return -EIO; | ||
870 | } | ||
871 | |||
872 | |||
873 | /********************************************************************* | ||
874 | Procedure : sw_reset_and_clock | ||
875 | Purpose : Asserts s/w reset, asserts clock initialization | ||
876 | and waits for clock stabilization | ||
877 | ********************************************************************/ | ||
878 | static int sw_reset_and_clock(struct ipw2100_priv *priv) | ||
879 | { | ||
880 | int i; | ||
881 | u32 r; | ||
882 | |||
883 | // assert s/w reset | ||
884 | write_register(priv->net_dev, IPW_REG_RESET_REG, | ||
885 | IPW_AUX_HOST_RESET_REG_SW_RESET); | ||
886 | |||
887 | // wait for clock stabilization | ||
888 | for (i = 0; i < 1000; i++) { | ||
889 | udelay(IPW_WAIT_RESET_ARC_COMPLETE_DELAY); | ||
890 | |||
891 | // check clock ready bit | ||
892 | read_register(priv->net_dev, IPW_REG_RESET_REG, &r); | ||
893 | if (r & IPW_AUX_HOST_RESET_REG_PRINCETON_RESET) | ||
894 | break; | ||
895 | } | ||
896 | |||
897 | if (i == 1000) | ||
898 | return -EIO; // TODO: better error value | ||
899 | |||
900 | /* set "initialization complete" bit to move adapter to | ||
901 | * D0 state */ | ||
902 | write_register(priv->net_dev, IPW_REG_GP_CNTRL, | ||
903 | IPW_AUX_HOST_GP_CNTRL_BIT_INIT_DONE); | ||
904 | |||
905 | /* wait for clock stabilization */ | ||
906 | for (i = 0; i < 10000; i++) { | ||
907 | udelay(IPW_WAIT_CLOCK_STABILIZATION_DELAY * 4); | ||
908 | |||
909 | /* check clock ready bit */ | ||
910 | read_register(priv->net_dev, IPW_REG_GP_CNTRL, &r); | ||
911 | if (r & IPW_AUX_HOST_GP_CNTRL_BIT_CLOCK_READY) | ||
912 | break; | ||
913 | } | ||
914 | |||
915 | if (i == 10000) | ||
916 | return -EIO; /* TODO: better error value */ | ||
917 | |||
918 | //#if CONFIG_IPW2100_D0ENABLED | ||
919 | /* set D0 standby bit */ | ||
920 | read_register(priv->net_dev, IPW_REG_GP_CNTRL, &r); | ||
921 | write_register(priv->net_dev, IPW_REG_GP_CNTRL, | ||
922 | r | IPW_AUX_HOST_GP_CNTRL_BIT_HOST_ALLOWS_STANDBY); | ||
923 | //#endif | ||
924 | |||
925 | return 0; | ||
926 | } | ||
927 | |||
928 | /********************************************************************* | ||
929 | Procedure : ipw2100_ipw2100_download_firmware | ||
930 | Purpose : Initiaze adapter after power on. | ||
931 | The sequence is: | ||
932 | 1. assert s/w reset first! | ||
933 | 2. awake clocks & wait for clock stabilization | ||
934 | 3. hold ARC (don't ask me why...) | ||
935 | 4. load Dino ucode and reset/clock init again | ||
936 | 5. zero-out shared mem | ||
937 | 6. download f/w | ||
938 | *******************************************************************/ | ||
939 | static int ipw2100_download_firmware(struct ipw2100_priv *priv) | ||
940 | { | ||
941 | u32 address; | ||
942 | int err; | ||
943 | |||
944 | #ifndef CONFIG_PM | ||
945 | /* Fetch the firmware and microcode */ | ||
946 | struct ipw2100_fw ipw2100_firmware; | ||
947 | #endif | ||
948 | |||
949 | if (priv->fatal_error) { | ||
950 | IPW_DEBUG_ERROR("%s: ipw2100_download_firmware called after " | ||
951 | "fatal error %d. Interface must be brought down.\n", | ||
952 | priv->net_dev->name, priv->fatal_error); | ||
953 | return -EINVAL; | ||
954 | } | ||
955 | |||
956 | #ifdef CONFIG_PM | ||
957 | if (!ipw2100_firmware.version) { | ||
958 | err = ipw2100_get_firmware(priv, &ipw2100_firmware); | ||
959 | if (err) { | ||
960 | IPW_DEBUG_ERROR("%s: ipw2100_get_firmware failed: %d\n", | ||
961 | priv->net_dev->name, err); | ||
962 | priv->fatal_error = IPW2100_ERR_FW_LOAD; | ||
963 | goto fail; | ||
964 | } | ||
965 | } | ||
966 | #else | ||
967 | err = ipw2100_get_firmware(priv, &ipw2100_firmware); | ||
968 | if (err) { | ||
969 | IPW_DEBUG_ERROR("%s: ipw2100_get_firmware failed: %d\n", | ||
970 | priv->net_dev->name, err); | ||
971 | priv->fatal_error = IPW2100_ERR_FW_LOAD; | ||
972 | goto fail; | ||
973 | } | ||
974 | #endif | ||
975 | priv->firmware_version = ipw2100_firmware.version; | ||
976 | |||
977 | /* s/w reset and clock stabilization */ | ||
978 | err = sw_reset_and_clock(priv); | ||
979 | if (err) { | ||
980 | IPW_DEBUG_ERROR("%s: sw_reset_and_clock failed: %d\n", | ||
981 | priv->net_dev->name, err); | ||
982 | goto fail; | ||
983 | } | ||
984 | |||
985 | err = ipw2100_verify(priv); | ||
986 | if (err) { | ||
987 | IPW_DEBUG_ERROR("%s: ipw2100_verify failed: %d\n", | ||
988 | priv->net_dev->name, err); | ||
989 | goto fail; | ||
990 | } | ||
991 | |||
992 | /* Hold ARC */ | ||
993 | write_nic_dword(priv->net_dev, | ||
994 | IPW_INTERNAL_REGISTER_HALT_AND_RESET, | ||
995 | 0x80000000); | ||
996 | |||
997 | /* allow ARC to run */ | ||
998 | write_register(priv->net_dev, IPW_REG_RESET_REG, 0); | ||
999 | |||
1000 | /* load microcode */ | ||
1001 | err = ipw2100_ucode_download(priv, &ipw2100_firmware); | ||
1002 | if (err) { | ||
1003 | IPW_DEBUG_ERROR("%s: Error loading microcode: %d\n", | ||
1004 | priv->net_dev->name, err); | ||
1005 | goto fail; | ||
1006 | } | ||
1007 | |||
1008 | /* release ARC */ | ||
1009 | write_nic_dword(priv->net_dev, | ||
1010 | IPW_INTERNAL_REGISTER_HALT_AND_RESET, | ||
1011 | 0x00000000); | ||
1012 | |||
1013 | /* s/w reset and clock stabilization (again!!!) */ | ||
1014 | err = sw_reset_and_clock(priv); | ||
1015 | if (err) { | ||
1016 | IPW_DEBUG_ERROR("%s: sw_reset_and_clock failed: %d\n", | ||
1017 | priv->net_dev->name, err); | ||
1018 | goto fail; | ||
1019 | } | ||
1020 | |||
1021 | /* load f/w */ | ||
1022 | err = ipw2100_fw_download(priv, &ipw2100_firmware); | ||
1023 | if (err) { | ||
1024 | IPW_DEBUG_ERROR("%s: Error loading firmware: %d\n", | ||
1025 | priv->net_dev->name, err); | ||
1026 | goto fail; | ||
1027 | } | ||
1028 | |||
1029 | #ifndef CONFIG_PM | ||
1030 | /* | ||
1031 | * When the .resume method of the driver is called, the other | ||
1032 | * part of the system, i.e. the ide driver could still stay in | ||
1033 | * the suspend stage. This prevents us from loading the firmware | ||
1034 | * from the disk. --YZ | ||
1035 | */ | ||
1036 | |||
1037 | /* free any storage allocated for firmware image */ | ||
1038 | ipw2100_release_firmware(priv, &ipw2100_firmware); | ||
1039 | #endif | ||
1040 | |||
1041 | /* zero out Domain 1 area indirectly (Si requirement) */ | ||
1042 | for (address = IPW_HOST_FW_SHARED_AREA0; | ||
1043 | address < IPW_HOST_FW_SHARED_AREA0_END; address += 4) | ||
1044 | write_nic_dword(priv->net_dev, address, 0); | ||
1045 | for (address = IPW_HOST_FW_SHARED_AREA1; | ||
1046 | address < IPW_HOST_FW_SHARED_AREA1_END; address += 4) | ||
1047 | write_nic_dword(priv->net_dev, address, 0); | ||
1048 | for (address = IPW_HOST_FW_SHARED_AREA2; | ||
1049 | address < IPW_HOST_FW_SHARED_AREA2_END; address += 4) | ||
1050 | write_nic_dword(priv->net_dev, address, 0); | ||
1051 | for (address = IPW_HOST_FW_SHARED_AREA3; | ||
1052 | address < IPW_HOST_FW_SHARED_AREA3_END; address += 4) | ||
1053 | write_nic_dword(priv->net_dev, address, 0); | ||
1054 | for (address = IPW_HOST_FW_INTERRUPT_AREA; | ||
1055 | address < IPW_HOST_FW_INTERRUPT_AREA_END; address += 4) | ||
1056 | write_nic_dword(priv->net_dev, address, 0); | ||
1057 | |||
1058 | return 0; | ||
1059 | |||
1060 | fail: | ||
1061 | ipw2100_release_firmware(priv, &ipw2100_firmware); | ||
1062 | return err; | ||
1063 | } | ||
1064 | |||
1065 | static inline void ipw2100_enable_interrupts(struct ipw2100_priv *priv) | ||
1066 | { | ||
1067 | if (priv->status & STATUS_INT_ENABLED) | ||
1068 | return; | ||
1069 | priv->status |= STATUS_INT_ENABLED; | ||
1070 | write_register(priv->net_dev, IPW_REG_INTA_MASK, IPW_INTERRUPT_MASK); | ||
1071 | } | ||
1072 | |||
1073 | static inline void ipw2100_disable_interrupts(struct ipw2100_priv *priv) | ||
1074 | { | ||
1075 | if (!(priv->status & STATUS_INT_ENABLED)) | ||
1076 | return; | ||
1077 | priv->status &= ~STATUS_INT_ENABLED; | ||
1078 | write_register(priv->net_dev, IPW_REG_INTA_MASK, 0x0); | ||
1079 | } | ||
1080 | |||
1081 | |||
1082 | static void ipw2100_initialize_ordinals(struct ipw2100_priv *priv) | ||
1083 | { | ||
1084 | struct ipw2100_ordinals *ord = &priv->ordinals; | ||
1085 | |||
1086 | IPW_DEBUG_INFO("enter\n"); | ||
1087 | |||
1088 | read_register(priv->net_dev, IPW_MEM_HOST_SHARED_ORDINALS_TABLE_1, | ||
1089 | &ord->table1_addr); | ||
1090 | |||
1091 | read_register(priv->net_dev, IPW_MEM_HOST_SHARED_ORDINALS_TABLE_2, | ||
1092 | &ord->table2_addr); | ||
1093 | |||
1094 | read_nic_dword(priv->net_dev, ord->table1_addr, &ord->table1_size); | ||
1095 | read_nic_dword(priv->net_dev, ord->table2_addr, &ord->table2_size); | ||
1096 | |||
1097 | ord->table2_size &= 0x0000FFFF; | ||
1098 | |||
1099 | IPW_DEBUG_INFO("table 1 size: %d\n", ord->table1_size); | ||
1100 | IPW_DEBUG_INFO("table 2 size: %d\n", ord->table2_size); | ||
1101 | IPW_DEBUG_INFO("exit\n"); | ||
1102 | } | ||
1103 | |||
1104 | static inline void ipw2100_hw_set_gpio(struct ipw2100_priv *priv) | ||
1105 | { | ||
1106 | u32 reg = 0; | ||
1107 | /* | ||
1108 | * Set GPIO 3 writable by FW; GPIO 1 writable | ||
1109 | * by driver and enable clock | ||
1110 | */ | ||
1111 | reg = (IPW_BIT_GPIO_GPIO3_MASK | IPW_BIT_GPIO_GPIO1_ENABLE | | ||
1112 | IPW_BIT_GPIO_LED_OFF); | ||
1113 | write_register(priv->net_dev, IPW_REG_GPIO, reg); | ||
1114 | } | ||
1115 | |||
1116 | static inline int rf_kill_active(struct ipw2100_priv *priv) | ||
1117 | { | ||
1118 | #define MAX_RF_KILL_CHECKS 5 | ||
1119 | #define RF_KILL_CHECK_DELAY 40 | ||
1120 | #define RF_KILL_CHECK_THRESHOLD 3 | ||
1121 | |||
1122 | unsigned short value = 0; | ||
1123 | u32 reg = 0; | ||
1124 | int i; | ||
1125 | |||
1126 | if (!(priv->hw_features & HW_FEATURE_RFKILL)) { | ||
1127 | priv->status &= ~STATUS_RF_KILL_HW; | ||
1128 | return 0; | ||
1129 | } | ||
1130 | |||
1131 | for (i = 0; i < MAX_RF_KILL_CHECKS; i++) { | ||
1132 | udelay(RF_KILL_CHECK_DELAY); | ||
1133 | read_register(priv->net_dev, IPW_REG_GPIO, ®); | ||
1134 | value = (value << 1) | ((reg & IPW_BIT_GPIO_RF_KILL) ? 0 : 1); | ||
1135 | } | ||
1136 | |||
1137 | if (value == 0) | ||
1138 | priv->status |= STATUS_RF_KILL_HW; | ||
1139 | else | ||
1140 | priv->status &= ~STATUS_RF_KILL_HW; | ||
1141 | |||
1142 | return (value == 0); | ||
1143 | } | ||
1144 | |||
1145 | static int ipw2100_get_hw_features(struct ipw2100_priv *priv) | ||
1146 | { | ||
1147 | u32 addr, len; | ||
1148 | u32 val; | ||
1149 | |||
1150 | /* | ||
1151 | * EEPROM_SRAM_DB_START_ADDRESS using ordinal in ordinal table 1 | ||
1152 | */ | ||
1153 | len = sizeof(addr); | ||
1154 | if (ipw2100_get_ordinal( | ||
1155 | priv, IPW_ORD_EEPROM_SRAM_DB_BLOCK_START_ADDRESS, | ||
1156 | &addr, &len)) { | ||
1157 | IPW_DEBUG_INFO("failed querying ordinals at line %d\n", | ||
1158 | __LINE__); | ||
1159 | return -EIO; | ||
1160 | } | ||
1161 | |||
1162 | IPW_DEBUG_INFO("EEPROM address: %08X\n", addr); | ||
1163 | |||
1164 | /* | ||
1165 | * EEPROM version is the byte at offset 0xfd in firmware | ||
1166 | * We read 4 bytes, then shift out the byte we actually want */ | ||
1167 | read_nic_dword(priv->net_dev, addr + 0xFC, &val); | ||
1168 | priv->eeprom_version = (val >> 24) & 0xFF; | ||
1169 | IPW_DEBUG_INFO("EEPROM version: %d\n", priv->eeprom_version); | ||
1170 | |||
1171 | /* | ||
1172 | * HW RF Kill enable is bit 0 in byte at offset 0x21 in firmware | ||
1173 | * | ||
1174 | * notice that the EEPROM bit is reverse polarity, i.e. | ||
1175 | * bit = 0 signifies HW RF kill switch is supported | ||
1176 | * bit = 1 signifies HW RF kill switch is NOT supported | ||
1177 | */ | ||
1178 | read_nic_dword(priv->net_dev, addr + 0x20, &val); | ||
1179 | if (!((val >> 24) & 0x01)) | ||
1180 | priv->hw_features |= HW_FEATURE_RFKILL; | ||
1181 | |||
1182 | IPW_DEBUG_INFO("HW RF Kill: %ssupported.\n", | ||
1183 | (priv->hw_features & HW_FEATURE_RFKILL) ? | ||
1184 | "" : "not "); | ||
1185 | |||
1186 | return 0; | ||
1187 | } | ||
1188 | |||
1189 | /* | ||
1190 | * Start firmware execution after power on and intialization | ||
1191 | * The sequence is: | ||
1192 | * 1. Release ARC | ||
1193 | * 2. Wait for f/w initialization completes; | ||
1194 | */ | ||
1195 | static int ipw2100_start_adapter(struct ipw2100_priv *priv) | ||
1196 | { | ||
1197 | #define IPW_WAIT_FW_INIT_COMPLETE_DELAY (40 * HZ / 1000) | ||
1198 | int i; | ||
1199 | u32 inta, inta_mask, gpio; | ||
1200 | |||
1201 | IPW_DEBUG_INFO("enter\n"); | ||
1202 | |||
1203 | if (priv->status & STATUS_RUNNING) | ||
1204 | return 0; | ||
1205 | |||
1206 | /* | ||
1207 | * Initialize the hw - drive adapter to DO state by setting | ||
1208 | * init_done bit. Wait for clk_ready bit and Download | ||
1209 | * fw & dino ucode | ||
1210 | */ | ||
1211 | if (ipw2100_download_firmware(priv)) { | ||
1212 | IPW_DEBUG_ERROR("%s: Failed to power on the adapter.\n", | ||
1213 | priv->net_dev->name); | ||
1214 | return -EIO; | ||
1215 | } | ||
1216 | |||
1217 | /* Clear the Tx, Rx and Msg queues and the r/w indexes | ||
1218 | * in the firmware RBD and TBD ring queue */ | ||
1219 | ipw2100_queues_initialize(priv); | ||
1220 | |||
1221 | ipw2100_hw_set_gpio(priv); | ||
1222 | |||
1223 | /* TODO -- Look at disabling interrupts here to make sure none | ||
1224 | * get fired during FW initialization */ | ||
1225 | |||
1226 | /* Release ARC - clear reset bit */ | ||
1227 | write_register(priv->net_dev, IPW_REG_RESET_REG, 0); | ||
1228 | |||
1229 | /* wait for f/w intialization complete */ | ||
1230 | IPW_DEBUG_FW("Waiting for f/w initialization to complete...\n"); | ||
1231 | i = 5000; | ||
1232 | do { | ||
1233 | set_current_state(TASK_UNINTERRUPTIBLE); | ||
1234 | schedule_timeout(IPW_WAIT_FW_INIT_COMPLETE_DELAY); | ||
1235 | /* Todo... wait for sync command ... */ | ||
1236 | |||
1237 | read_register(priv->net_dev, IPW_REG_INTA, &inta); | ||
1238 | |||
1239 | /* check "init done" bit */ | ||
1240 | if (inta & IPW2100_INTA_FW_INIT_DONE) { | ||
1241 | /* reset "init done" bit */ | ||
1242 | write_register(priv->net_dev, IPW_REG_INTA, | ||
1243 | IPW2100_INTA_FW_INIT_DONE); | ||
1244 | break; | ||
1245 | } | ||
1246 | |||
1247 | /* check error conditions : we check these after the firmware | ||
1248 | * check so that if there is an error, the interrupt handler | ||
1249 | * will see it and the adapter will be reset */ | ||
1250 | if (inta & | ||
1251 | (IPW2100_INTA_FATAL_ERROR | IPW2100_INTA_PARITY_ERROR)) { | ||
1252 | /* clear error conditions */ | ||
1253 | write_register(priv->net_dev, IPW_REG_INTA, | ||
1254 | IPW2100_INTA_FATAL_ERROR | | ||
1255 | IPW2100_INTA_PARITY_ERROR); | ||
1256 | } | ||
1257 | } while (i--); | ||
1258 | |||
1259 | /* Clear out any pending INTAs since we aren't supposed to have | ||
1260 | * interrupts enabled at this point... */ | ||
1261 | read_register(priv->net_dev, IPW_REG_INTA, &inta); | ||
1262 | read_register(priv->net_dev, IPW_REG_INTA_MASK, &inta_mask); | ||
1263 | inta &= IPW_INTERRUPT_MASK; | ||
1264 | /* Clear out any pending interrupts */ | ||
1265 | if (inta & inta_mask) | ||
1266 | write_register(priv->net_dev, IPW_REG_INTA, inta); | ||
1267 | |||
1268 | IPW_DEBUG_FW("f/w initialization complete: %s\n", | ||
1269 | i ? "SUCCESS" : "FAILED"); | ||
1270 | |||
1271 | if (!i) { | ||
1272 | IPW_DEBUG_WARNING("%s: Firmware did not initialize.\n", | ||
1273 | priv->net_dev->name); | ||
1274 | return -EIO; | ||
1275 | } | ||
1276 | |||
1277 | /* allow firmware to write to GPIO1 & GPIO3 */ | ||
1278 | read_register(priv->net_dev, IPW_REG_GPIO, &gpio); | ||
1279 | |||
1280 | gpio |= (IPW_BIT_GPIO_GPIO1_MASK | IPW_BIT_GPIO_GPIO3_MASK); | ||
1281 | |||
1282 | write_register(priv->net_dev, IPW_REG_GPIO, gpio); | ||
1283 | |||
1284 | /* Ready to receive commands */ | ||
1285 | priv->status |= STATUS_RUNNING; | ||
1286 | |||
1287 | /* The adapter has been reset; we are not associated */ | ||
1288 | priv->status &= ~(STATUS_ASSOCIATING | STATUS_ASSOCIATED); | ||
1289 | |||
1290 | IPW_DEBUG_INFO("exit\n"); | ||
1291 | |||
1292 | return 0; | ||
1293 | } | ||
1294 | |||
1295 | static inline void ipw2100_reset_fatalerror(struct ipw2100_priv *priv) | ||
1296 | { | ||
1297 | if (!priv->fatal_error) | ||
1298 | return; | ||
1299 | |||
1300 | priv->fatal_errors[priv->fatal_index++] = priv->fatal_error; | ||
1301 | priv->fatal_index %= IPW2100_ERROR_QUEUE; | ||
1302 | priv->fatal_error = 0; | ||
1303 | } | ||
1304 | |||
1305 | |||
1306 | /* NOTE: Our interrupt is disabled when this method is called */ | ||
1307 | static int ipw2100_power_cycle_adapter(struct ipw2100_priv *priv) | ||
1308 | { | ||
1309 | u32 reg; | ||
1310 | int i; | ||
1311 | |||
1312 | IPW_DEBUG_INFO("Power cycling the hardware.\n"); | ||
1313 | |||
1314 | ipw2100_hw_set_gpio(priv); | ||
1315 | |||
1316 | /* Step 1. Stop Master Assert */ | ||
1317 | write_register(priv->net_dev, IPW_REG_RESET_REG, | ||
1318 | IPW_AUX_HOST_RESET_REG_STOP_MASTER); | ||
1319 | |||
1320 | /* Step 2. Wait for stop Master Assert | ||
1321 | * (not more then 50us, otherwise ret error */ | ||
1322 | i = 5; | ||
1323 | do { | ||
1324 | udelay(IPW_WAIT_RESET_MASTER_ASSERT_COMPLETE_DELAY); | ||
1325 | read_register(priv->net_dev, IPW_REG_RESET_REG, ®); | ||
1326 | |||
1327 | if (reg & IPW_AUX_HOST_RESET_REG_MASTER_DISABLED) | ||
1328 | break; | ||
1329 | } while(i--); | ||
1330 | |||
1331 | priv->status &= ~STATUS_RESET_PENDING; | ||
1332 | |||
1333 | if (!i) { | ||
1334 | IPW_DEBUG_INFO("exit - waited too long for master assert stop\n"); | ||
1335 | return -EIO; | ||
1336 | } | ||
1337 | |||
1338 | write_register(priv->net_dev, IPW_REG_RESET_REG, | ||
1339 | IPW_AUX_HOST_RESET_REG_SW_RESET); | ||
1340 | |||
1341 | |||
1342 | /* Reset any fatal_error conditions */ | ||
1343 | ipw2100_reset_fatalerror(priv); | ||
1344 | |||
1345 | /* At this point, the adapter is now stopped and disabled */ | ||
1346 | priv->status &= ~(STATUS_RUNNING | STATUS_ASSOCIATING | | ||
1347 | STATUS_ASSOCIATED | STATUS_ENABLED); | ||
1348 | |||
1349 | return 0; | ||
1350 | } | ||
1351 | |||
1352 | /* | ||
1353 | * Send the CARD_DISABLE_PHY_OFF comamnd to the card to disable it | ||
1354 | * | ||
1355 | * After disabling, if the card was associated, a STATUS_ASSN_LOST will be sent. | ||
1356 | * | ||
1357 | * STATUS_CARD_DISABLE_NOTIFICATION will be sent regardless of | ||
1358 | * if STATUS_ASSN_LOST is sent. | ||
1359 | */ | ||
1360 | static int ipw2100_hw_phy_off(struct ipw2100_priv *priv) | ||
1361 | { | ||
1362 | |||
1363 | #define HW_PHY_OFF_LOOP_DELAY (HZ / 5000) | ||
1364 | |||
1365 | struct host_command cmd = { | ||
1366 | .host_command = CARD_DISABLE_PHY_OFF, | ||
1367 | .host_command_sequence = 0, | ||
1368 | .host_command_length = 0, | ||
1369 | }; | ||
1370 | int err, i; | ||
1371 | u32 val1, val2; | ||
1372 | |||
1373 | IPW_DEBUG_HC("CARD_DISABLE_PHY_OFF\n"); | ||
1374 | |||
1375 | /* Turn off the radio */ | ||
1376 | err = ipw2100_hw_send_command(priv, &cmd); | ||
1377 | if (err) | ||
1378 | return err; | ||
1379 | |||
1380 | for (i = 0; i < 2500; i++) { | ||
1381 | read_nic_dword(priv->net_dev, IPW2100_CONTROL_REG, &val1); | ||
1382 | read_nic_dword(priv->net_dev, IPW2100_COMMAND, &val2); | ||
1383 | |||
1384 | if ((val1 & IPW2100_CONTROL_PHY_OFF) && | ||
1385 | (val2 & IPW2100_COMMAND_PHY_OFF)) | ||
1386 | return 0; | ||
1387 | |||
1388 | set_current_state(TASK_UNINTERRUPTIBLE); | ||
1389 | schedule_timeout(HW_PHY_OFF_LOOP_DELAY); | ||
1390 | } | ||
1391 | |||
1392 | return -EIO; | ||
1393 | } | ||
1394 | |||
1395 | |||
1396 | static int ipw2100_enable_adapter(struct ipw2100_priv *priv) | ||
1397 | { | ||
1398 | struct host_command cmd = { | ||
1399 | .host_command = HOST_COMPLETE, | ||
1400 | .host_command_sequence = 0, | ||
1401 | .host_command_length = 0 | ||
1402 | }; | ||
1403 | int err = 0; | ||
1404 | |||
1405 | IPW_DEBUG_HC("HOST_COMPLETE\n"); | ||
1406 | |||
1407 | if (priv->status & STATUS_ENABLED) | ||
1408 | return 0; | ||
1409 | |||
1410 | down(&priv->adapter_sem); | ||
1411 | |||
1412 | if (rf_kill_active(priv)) { | ||
1413 | IPW_DEBUG_HC("Command aborted due to RF kill active.\n"); | ||
1414 | goto fail_up; | ||
1415 | } | ||
1416 | |||
1417 | err = ipw2100_hw_send_command(priv, &cmd); | ||
1418 | if (err) { | ||
1419 | IPW_DEBUG_INFO("Failed to send HOST_COMPLETE command\n"); | ||
1420 | goto fail_up; | ||
1421 | } | ||
1422 | |||
1423 | err = ipw2100_wait_for_card_state(priv, IPW_HW_STATE_ENABLED); | ||
1424 | if (err) { | ||
1425 | IPW_DEBUG_INFO( | ||
1426 | "%s: card not responding to init command.\n", | ||
1427 | priv->net_dev->name); | ||
1428 | goto fail_up; | ||
1429 | } | ||
1430 | |||
1431 | if (priv->stop_hang_check) { | ||
1432 | priv->stop_hang_check = 0; | ||
1433 | queue_delayed_work(priv->workqueue, &priv->hang_check, HZ / 2); | ||
1434 | } | ||
1435 | |||
1436 | fail_up: | ||
1437 | up(&priv->adapter_sem); | ||
1438 | return err; | ||
1439 | } | ||
1440 | |||
1441 | static int ipw2100_hw_stop_adapter(struct ipw2100_priv *priv) | ||
1442 | { | ||
1443 | #define HW_POWER_DOWN_DELAY (HZ / 10) | ||
1444 | |||
1445 | struct host_command cmd = { | ||
1446 | .host_command = HOST_PRE_POWER_DOWN, | ||
1447 | .host_command_sequence = 0, | ||
1448 | .host_command_length = 0, | ||
1449 | }; | ||
1450 | int err, i; | ||
1451 | u32 reg; | ||
1452 | |||
1453 | if (!(priv->status & STATUS_RUNNING)) | ||
1454 | return 0; | ||
1455 | |||
1456 | priv->status |= STATUS_STOPPING; | ||
1457 | |||
1458 | /* We can only shut down the card if the firmware is operational. So, | ||
1459 | * if we haven't reset since a fatal_error, then we can not send the | ||
1460 | * shutdown commands. */ | ||
1461 | if (!priv->fatal_error) { | ||
1462 | /* First, make sure the adapter is enabled so that the PHY_OFF | ||
1463 | * command can shut it down */ | ||
1464 | ipw2100_enable_adapter(priv); | ||
1465 | |||
1466 | err = ipw2100_hw_phy_off(priv); | ||
1467 | if (err) | ||
1468 | IPW_DEBUG_WARNING("Error disabling radio %d\n", err); | ||
1469 | |||
1470 | /* | ||
1471 | * If in D0-standby mode going directly to D3 may cause a | ||
1472 | * PCI bus violation. Therefore we must change out of the D0 | ||
1473 | * state. | ||
1474 | * | ||
1475 | * Sending the PREPARE_FOR_POWER_DOWN will restrict the | ||
1476 | * hardware from going into standby mode and will transition | ||
1477 | * out of D0-standy if it is already in that state. | ||
1478 | * | ||
1479 | * STATUS_PREPARE_POWER_DOWN_COMPLETE will be sent by the | ||
1480 | * driver upon completion. Once received, the driver can | ||
1481 | * proceed to the D3 state. | ||
1482 | * | ||
1483 | * Prepare for power down command to fw. This command would | ||
1484 | * take HW out of D0-standby and prepare it for D3 state. | ||
1485 | * | ||
1486 | * Currently FW does not support event notification for this | ||
1487 | * event. Therefore, skip waiting for it. Just wait a fixed | ||
1488 | * 100ms | ||
1489 | */ | ||
1490 | IPW_DEBUG_HC("HOST_PRE_POWER_DOWN\n"); | ||
1491 | |||
1492 | err = ipw2100_hw_send_command(priv, &cmd); | ||
1493 | if (err) | ||
1494 | IPW_DEBUG_WARNING( | ||
1495 | "%s: Power down command failed: Error %d\n", | ||
1496 | priv->net_dev->name, err); | ||
1497 | else { | ||
1498 | set_current_state(TASK_UNINTERRUPTIBLE); | ||
1499 | schedule_timeout(HW_POWER_DOWN_DELAY); | ||
1500 | } | ||
1501 | } | ||
1502 | |||
1503 | priv->status &= ~STATUS_ENABLED; | ||
1504 | |||
1505 | /* | ||
1506 | * Set GPIO 3 writable by FW; GPIO 1 writable | ||
1507 | * by driver and enable clock | ||
1508 | */ | ||
1509 | ipw2100_hw_set_gpio(priv); | ||
1510 | |||
1511 | /* | ||
1512 | * Power down adapter. Sequence: | ||
1513 | * 1. Stop master assert (RESET_REG[9]=1) | ||
1514 | * 2. Wait for stop master (RESET_REG[8]==1) | ||
1515 | * 3. S/w reset assert (RESET_REG[7] = 1) | ||
1516 | */ | ||
1517 | |||
1518 | /* Stop master assert */ | ||
1519 | write_register(priv->net_dev, IPW_REG_RESET_REG, | ||
1520 | IPW_AUX_HOST_RESET_REG_STOP_MASTER); | ||
1521 | |||
1522 | /* wait stop master not more than 50 usec. | ||
1523 | * Otherwise return error. */ | ||
1524 | for (i = 5; i > 0; i--) { | ||
1525 | udelay(10); | ||
1526 | |||
1527 | /* Check master stop bit */ | ||
1528 | read_register(priv->net_dev, IPW_REG_RESET_REG, ®); | ||
1529 | |||
1530 | if (reg & IPW_AUX_HOST_RESET_REG_MASTER_DISABLED) | ||
1531 | break; | ||
1532 | } | ||
1533 | |||
1534 | if (i == 0) | ||
1535 | IPW_DEBUG_WARNING(DRV_NAME | ||
1536 | ": %s: Could now power down adapter.\n", | ||
1537 | priv->net_dev->name); | ||
1538 | |||
1539 | /* assert s/w reset */ | ||
1540 | write_register(priv->net_dev, IPW_REG_RESET_REG, | ||
1541 | IPW_AUX_HOST_RESET_REG_SW_RESET); | ||
1542 | |||
1543 | priv->status &= ~(STATUS_RUNNING | STATUS_STOPPING); | ||
1544 | |||
1545 | return 0; | ||
1546 | } | ||
1547 | |||
1548 | |||
1549 | static int ipw2100_disable_adapter(struct ipw2100_priv *priv) | ||
1550 | { | ||
1551 | struct host_command cmd = { | ||
1552 | .host_command = CARD_DISABLE, | ||
1553 | .host_command_sequence = 0, | ||
1554 | .host_command_length = 0 | ||
1555 | }; | ||
1556 | int err = 0; | ||
1557 | |||
1558 | IPW_DEBUG_HC("CARD_DISABLE\n"); | ||
1559 | |||
1560 | if (!(priv->status & STATUS_ENABLED)) | ||
1561 | return 0; | ||
1562 | |||
1563 | /* Make sure we clear the associated state */ | ||
1564 | priv->status &= ~(STATUS_ASSOCIATED | STATUS_ASSOCIATING); | ||
1565 | |||
1566 | if (!priv->stop_hang_check) { | ||
1567 | priv->stop_hang_check = 1; | ||
1568 | cancel_delayed_work(&priv->hang_check); | ||
1569 | } | ||
1570 | |||
1571 | down(&priv->adapter_sem); | ||
1572 | |||
1573 | err = ipw2100_hw_send_command(priv, &cmd); | ||
1574 | if (err) { | ||
1575 | IPW_DEBUG_WARNING("exit - failed to send CARD_DISABLE command\n"); | ||
1576 | goto fail_up; | ||
1577 | } | ||
1578 | |||
1579 | err = ipw2100_wait_for_card_state(priv, IPW_HW_STATE_DISABLED); | ||
1580 | if (err) { | ||
1581 | IPW_DEBUG_WARNING("exit - card failed to change to DISABLED\n"); | ||
1582 | goto fail_up; | ||
1583 | } | ||
1584 | |||
1585 | IPW_DEBUG_INFO("TODO: implement scan state machine\n"); | ||
1586 | |||
1587 | fail_up: | ||
1588 | up(&priv->adapter_sem); | ||
1589 | return err; | ||
1590 | } | ||
1591 | |||
1592 | int ipw2100_set_scan_options(struct ipw2100_priv *priv) | ||
1593 | { | ||
1594 | struct host_command cmd = { | ||
1595 | .host_command = SET_SCAN_OPTIONS, | ||
1596 | .host_command_sequence = 0, | ||
1597 | .host_command_length = 8 | ||
1598 | }; | ||
1599 | int err; | ||
1600 | |||
1601 | IPW_DEBUG_INFO("enter\n"); | ||
1602 | |||
1603 | IPW_DEBUG_SCAN("setting scan options\n"); | ||
1604 | |||
1605 | cmd.host_command_parameters[0] = 0; | ||
1606 | |||
1607 | if (!(priv->config & CFG_ASSOCIATE)) | ||
1608 | cmd.host_command_parameters[0] |= IPW_SCAN_NOASSOCIATE; | ||
1609 | if ((priv->sec.flags & SEC_ENABLED) && priv->sec.enabled) | ||
1610 | cmd.host_command_parameters[0] |= IPW_SCAN_MIXED_CELL; | ||
1611 | if (priv->config & CFG_PASSIVE_SCAN) | ||
1612 | cmd.host_command_parameters[0] |= IPW_SCAN_PASSIVE; | ||
1613 | |||
1614 | cmd.host_command_parameters[1] = priv->channel_mask; | ||
1615 | |||
1616 | err = ipw2100_hw_send_command(priv, &cmd); | ||
1617 | |||
1618 | IPW_DEBUG_HC("SET_SCAN_OPTIONS 0x%04X\n", | ||
1619 | cmd.host_command_parameters[0]); | ||
1620 | |||
1621 | return err; | ||
1622 | } | ||
1623 | |||
1624 | int ipw2100_start_scan(struct ipw2100_priv *priv) | ||
1625 | { | ||
1626 | struct host_command cmd = { | ||
1627 | .host_command = BROADCAST_SCAN, | ||
1628 | .host_command_sequence = 0, | ||
1629 | .host_command_length = 4 | ||
1630 | }; | ||
1631 | int err; | ||
1632 | |||
1633 | IPW_DEBUG_HC("START_SCAN\n"); | ||
1634 | |||
1635 | cmd.host_command_parameters[0] = 0; | ||
1636 | |||
1637 | /* No scanning if in monitor mode */ | ||
1638 | if (priv->ieee->iw_mode == IW_MODE_MONITOR) | ||
1639 | return 1; | ||
1640 | |||
1641 | if (priv->status & STATUS_SCANNING) { | ||
1642 | IPW_DEBUG_SCAN("Scan requested while already in scan...\n"); | ||
1643 | return 0; | ||
1644 | } | ||
1645 | |||
1646 | IPW_DEBUG_INFO("enter\n"); | ||
1647 | |||
1648 | /* Not clearing here; doing so makes iwlist always return nothing... | ||
1649 | * | ||
1650 | * We should modify the table logic to use aging tables vs. clearing | ||
1651 | * the table on each scan start. | ||
1652 | */ | ||
1653 | IPW_DEBUG_SCAN("starting scan\n"); | ||
1654 | |||
1655 | priv->status |= STATUS_SCANNING; | ||
1656 | err = ipw2100_hw_send_command(priv, &cmd); | ||
1657 | if (err) | ||
1658 | priv->status &= ~STATUS_SCANNING; | ||
1659 | |||
1660 | IPW_DEBUG_INFO("exit\n"); | ||
1661 | |||
1662 | return err; | ||
1663 | } | ||
1664 | |||
1665 | static int ipw2100_up(struct ipw2100_priv *priv, int deferred) | ||
1666 | { | ||
1667 | unsigned long flags; | ||
1668 | int rc = 0; | ||
1669 | u32 lock; | ||
1670 | u32 ord_len = sizeof(lock); | ||
1671 | |||
1672 | /* Quite if manually disabled. */ | ||
1673 | if (priv->status & STATUS_RF_KILL_SW) { | ||
1674 | IPW_DEBUG_INFO("%s: Radio is disabled by Manual Disable " | ||
1675 | "switch\n", priv->net_dev->name); | ||
1676 | return 0; | ||
1677 | } | ||
1678 | |||
1679 | /* If the interrupt is enabled, turn it off... */ | ||
1680 | spin_lock_irqsave(&priv->low_lock, flags); | ||
1681 | ipw2100_disable_interrupts(priv); | ||
1682 | |||
1683 | /* Reset any fatal_error conditions */ | ||
1684 | ipw2100_reset_fatalerror(priv); | ||
1685 | spin_unlock_irqrestore(&priv->low_lock, flags); | ||
1686 | |||
1687 | if (priv->status & STATUS_POWERED || | ||
1688 | (priv->status & STATUS_RESET_PENDING)) { | ||
1689 | /* Power cycle the card ... */ | ||
1690 | if (ipw2100_power_cycle_adapter(priv)) { | ||
1691 | IPW_DEBUG_WARNING("%s: Could not cycle adapter.\n", | ||
1692 | priv->net_dev->name); | ||
1693 | rc = 1; | ||
1694 | goto exit; | ||
1695 | } | ||
1696 | } else | ||
1697 | priv->status |= STATUS_POWERED; | ||
1698 | |||
1699 | /* Load the firmeware, start the clocks, etc. */ | ||
1700 | if (ipw2100_start_adapter(priv)) { | ||
1701 | IPW_DEBUG_ERROR("%s: Failed to start the firmware.\n", | ||
1702 | priv->net_dev->name); | ||
1703 | rc = 1; | ||
1704 | goto exit; | ||
1705 | } | ||
1706 | |||
1707 | ipw2100_initialize_ordinals(priv); | ||
1708 | |||
1709 | /* Determine capabilities of this particular HW configuration */ | ||
1710 | if (ipw2100_get_hw_features(priv)) { | ||
1711 | IPW_DEBUG_ERROR("%s: Failed to determine HW features.\n", | ||
1712 | priv->net_dev->name); | ||
1713 | rc = 1; | ||
1714 | goto exit; | ||
1715 | } | ||
1716 | |||
1717 | lock = LOCK_NONE; | ||
1718 | if (ipw2100_set_ordinal(priv, IPW_ORD_PERS_DB_LOCK, &lock, &ord_len)) { | ||
1719 | IPW_DEBUG_ERROR("%s: Failed to clear ordinal lock.\n", | ||
1720 | priv->net_dev->name); | ||
1721 | rc = 1; | ||
1722 | goto exit; | ||
1723 | } | ||
1724 | |||
1725 | priv->status &= ~STATUS_SCANNING; | ||
1726 | |||
1727 | if (rf_kill_active(priv)) { | ||
1728 | printk(KERN_INFO "%s: Radio is disabled by RF switch.\n", | ||
1729 | priv->net_dev->name); | ||
1730 | |||
1731 | if (priv->stop_rf_kill) { | ||
1732 | priv->stop_rf_kill = 0; | ||
1733 | queue_delayed_work(priv->workqueue, &priv->rf_kill, HZ); | ||
1734 | } | ||
1735 | |||
1736 | deferred = 1; | ||
1737 | } | ||
1738 | |||
1739 | /* Turn on the interrupt so that commands can be processed */ | ||
1740 | ipw2100_enable_interrupts(priv); | ||
1741 | |||
1742 | /* Send all of the commands that must be sent prior to | ||
1743 | * HOST_COMPLETE */ | ||
1744 | if (ipw2100_adapter_setup(priv)) { | ||
1745 | IPW_DEBUG_ERROR("%s: Failed to start the card.\n", | ||
1746 | priv->net_dev->name); | ||
1747 | rc = 1; | ||
1748 | goto exit; | ||
1749 | } | ||
1750 | |||
1751 | if (!deferred) { | ||
1752 | /* Enable the adapter - sends HOST_COMPLETE */ | ||
1753 | if (ipw2100_enable_adapter(priv)) { | ||
1754 | IPW_DEBUG_ERROR( | ||
1755 | "%s: failed in call to enable adapter.\n", | ||
1756 | priv->net_dev->name); | ||
1757 | ipw2100_hw_stop_adapter(priv); | ||
1758 | rc = 1; | ||
1759 | goto exit; | ||
1760 | } | ||
1761 | |||
1762 | |||
1763 | /* Start a scan . . . */ | ||
1764 | ipw2100_set_scan_options(priv); | ||
1765 | ipw2100_start_scan(priv); | ||
1766 | } | ||
1767 | |||
1768 | exit: | ||
1769 | return rc; | ||
1770 | } | ||
1771 | |||
1772 | /* Called by register_netdev() */ | ||
1773 | static int ipw2100_net_init(struct net_device *dev) | ||
1774 | { | ||
1775 | struct ipw2100_priv *priv = ieee80211_priv(dev); | ||
1776 | return ipw2100_up(priv, 1); | ||
1777 | } | ||
1778 | |||
1779 | static void ipw2100_down(struct ipw2100_priv *priv) | ||
1780 | { | ||
1781 | unsigned long flags; | ||
1782 | union iwreq_data wrqu = { | ||
1783 | .ap_addr = { | ||
1784 | .sa_family = ARPHRD_ETHER | ||
1785 | } | ||
1786 | }; | ||
1787 | int associated = priv->status & STATUS_ASSOCIATED; | ||
1788 | |||
1789 | /* Kill the RF switch timer */ | ||
1790 | if (!priv->stop_rf_kill) { | ||
1791 | priv->stop_rf_kill = 1; | ||
1792 | cancel_delayed_work(&priv->rf_kill); | ||
1793 | } | ||
1794 | |||
1795 | /* Kill the firmare hang check timer */ | ||
1796 | if (!priv->stop_hang_check) { | ||
1797 | priv->stop_hang_check = 1; | ||
1798 | cancel_delayed_work(&priv->hang_check); | ||
1799 | } | ||
1800 | |||
1801 | /* Kill any pending resets */ | ||
1802 | if (priv->status & STATUS_RESET_PENDING) | ||
1803 | cancel_delayed_work(&priv->reset_work); | ||
1804 | |||
1805 | /* Make sure the interrupt is on so that FW commands will be | ||
1806 | * processed correctly */ | ||
1807 | spin_lock_irqsave(&priv->low_lock, flags); | ||
1808 | ipw2100_enable_interrupts(priv); | ||
1809 | spin_unlock_irqrestore(&priv->low_lock, flags); | ||
1810 | |||
1811 | if (ipw2100_hw_stop_adapter(priv)) | ||
1812 | IPW_DEBUG_ERROR("%s: Error stopping adapter.\n", | ||
1813 | priv->net_dev->name); | ||
1814 | |||
1815 | /* Do not disable the interrupt until _after_ we disable | ||
1816 | * the adaptor. Otherwise the CARD_DISABLE command will never | ||
1817 | * be ack'd by the firmware */ | ||
1818 | spin_lock_irqsave(&priv->low_lock, flags); | ||
1819 | ipw2100_disable_interrupts(priv); | ||
1820 | spin_unlock_irqrestore(&priv->low_lock, flags); | ||
1821 | |||
1822 | #ifdef ACPI_CSTATE_LIMIT_DEFINED | ||
1823 | if (priv->config & CFG_C3_DISABLED) { | ||
1824 | IPW_DEBUG_INFO(DRV_NAME ": Resetting C3 transitions.\n"); | ||
1825 | acpi_set_cstate_limit(priv->cstate_limit); | ||
1826 | priv->config &= ~CFG_C3_DISABLED; | ||
1827 | } | ||
1828 | #endif | ||
1829 | |||
1830 | /* We have to signal any supplicant if we are disassociating */ | ||
1831 | if (associated) | ||
1832 | wireless_send_event(priv->net_dev, SIOCGIWAP, &wrqu, NULL); | ||
1833 | |||
1834 | priv->status &= ~(STATUS_ASSOCIATED | STATUS_ASSOCIATING); | ||
1835 | netif_carrier_off(priv->net_dev); | ||
1836 | netif_stop_queue(priv->net_dev); | ||
1837 | } | ||
1838 | |||
1839 | void ipw2100_reset_adapter(struct ipw2100_priv *priv) | ||
1840 | { | ||
1841 | unsigned long flags; | ||
1842 | union iwreq_data wrqu = { | ||
1843 | .ap_addr = { | ||
1844 | .sa_family = ARPHRD_ETHER | ||
1845 | } | ||
1846 | }; | ||
1847 | int associated = priv->status & STATUS_ASSOCIATED; | ||
1848 | |||
1849 | spin_lock_irqsave(&priv->low_lock, flags); | ||
1850 | IPW_DEBUG_INFO(DRV_NAME ": %s: Restarting adapter.\n", | ||
1851 | priv->net_dev->name); | ||
1852 | priv->resets++; | ||
1853 | priv->status &= ~(STATUS_ASSOCIATED | STATUS_ASSOCIATING); | ||
1854 | priv->status |= STATUS_SECURITY_UPDATED; | ||
1855 | |||
1856 | /* Force a power cycle even if interface hasn't been opened | ||
1857 | * yet */ | ||
1858 | cancel_delayed_work(&priv->reset_work); | ||
1859 | priv->status |= STATUS_RESET_PENDING; | ||
1860 | spin_unlock_irqrestore(&priv->low_lock, flags); | ||
1861 | |||
1862 | down(&priv->action_sem); | ||
1863 | /* stop timed checks so that they don't interfere with reset */ | ||
1864 | priv->stop_hang_check = 1; | ||
1865 | cancel_delayed_work(&priv->hang_check); | ||
1866 | |||
1867 | /* We have to signal any supplicant if we are disassociating */ | ||
1868 | if (associated) | ||
1869 | wireless_send_event(priv->net_dev, SIOCGIWAP, &wrqu, NULL); | ||
1870 | |||
1871 | ipw2100_up(priv, 0); | ||
1872 | up(&priv->action_sem); | ||
1873 | |||
1874 | } | ||
1875 | |||
1876 | |||
1877 | static void isr_indicate_associated(struct ipw2100_priv *priv, u32 status) | ||
1878 | { | ||
1879 | |||
1880 | #define MAC_ASSOCIATION_READ_DELAY (HZ) | ||
1881 | int ret, len, essid_len; | ||
1882 | char essid[IW_ESSID_MAX_SIZE]; | ||
1883 | u32 txrate; | ||
1884 | u32 chan; | ||
1885 | char *txratename; | ||
1886 | u8 bssid[ETH_ALEN]; | ||
1887 | |||
1888 | /* | ||
1889 | * TBD: BSSID is usually 00:00:00:00:00:00 here and not | ||
1890 | * an actual MAC of the AP. Seems like FW sets this | ||
1891 | * address too late. Read it later and expose through | ||
1892 | * /proc or schedule a later task to query and update | ||
1893 | */ | ||
1894 | |||
1895 | essid_len = IW_ESSID_MAX_SIZE; | ||
1896 | ret = ipw2100_get_ordinal(priv, IPW_ORD_STAT_ASSN_SSID, | ||
1897 | essid, &essid_len); | ||
1898 | if (ret) { | ||
1899 | IPW_DEBUG_INFO("failed querying ordinals at line %d\n", | ||
1900 | __LINE__); | ||
1901 | return; | ||
1902 | } | ||
1903 | |||
1904 | len = sizeof(u32); | ||
1905 | ret = ipw2100_get_ordinal(priv, IPW_ORD_CURRENT_TX_RATE, | ||
1906 | &txrate, &len); | ||
1907 | if (ret) { | ||
1908 | IPW_DEBUG_INFO("failed querying ordinals at line %d\n", | ||
1909 | __LINE__); | ||
1910 | return; | ||
1911 | } | ||
1912 | |||
1913 | len = sizeof(u32); | ||
1914 | ret = ipw2100_get_ordinal(priv, IPW_ORD_OUR_FREQ, &chan, &len); | ||
1915 | if (ret) { | ||
1916 | IPW_DEBUG_INFO("failed querying ordinals at line %d\n", | ||
1917 | __LINE__); | ||
1918 | return; | ||
1919 | } | ||
1920 | len = ETH_ALEN; | ||
1921 | ipw2100_get_ordinal(priv, IPW_ORD_STAT_ASSN_AP_BSSID, &bssid, &len); | ||
1922 | if (ret) { | ||
1923 | IPW_DEBUG_INFO("failed querying ordinals at line %d\n", | ||
1924 | __LINE__); | ||
1925 | return; | ||
1926 | } | ||
1927 | memcpy(priv->ieee->bssid, bssid, ETH_ALEN); | ||
1928 | |||
1929 | |||
1930 | switch (txrate) { | ||
1931 | case TX_RATE_1_MBIT: | ||
1932 | txratename = "1Mbps"; | ||
1933 | break; | ||
1934 | case TX_RATE_2_MBIT: | ||
1935 | txratename = "2Mbsp"; | ||
1936 | break; | ||
1937 | case TX_RATE_5_5_MBIT: | ||
1938 | txratename = "5.5Mbps"; | ||
1939 | break; | ||
1940 | case TX_RATE_11_MBIT: | ||
1941 | txratename = "11Mbps"; | ||
1942 | break; | ||
1943 | default: | ||
1944 | IPW_DEBUG_INFO("Unknown rate: %d\n", txrate); | ||
1945 | txratename = "unknown rate"; | ||
1946 | break; | ||
1947 | } | ||
1948 | |||
1949 | IPW_DEBUG_INFO("%s: Associated with '%s' at %s, channel %d (BSSID=" | ||
1950 | MAC_FMT ")\n", | ||
1951 | priv->net_dev->name, escape_essid(essid, essid_len), | ||
1952 | txratename, chan, MAC_ARG(bssid)); | ||
1953 | |||
1954 | /* now we copy read ssid into dev */ | ||
1955 | if (!(priv->config & CFG_STATIC_ESSID)) { | ||
1956 | priv->essid_len = min((u8)essid_len, (u8)IW_ESSID_MAX_SIZE); | ||
1957 | memcpy(priv->essid, essid, priv->essid_len); | ||
1958 | } | ||
1959 | priv->channel = chan; | ||
1960 | memcpy(priv->bssid, bssid, ETH_ALEN); | ||
1961 | |||
1962 | priv->status |= STATUS_ASSOCIATING; | ||
1963 | priv->connect_start = get_seconds(); | ||
1964 | |||
1965 | queue_delayed_work(priv->workqueue, &priv->wx_event_work, HZ / 10); | ||
1966 | } | ||
1967 | |||
1968 | |||
1969 | int ipw2100_set_essid(struct ipw2100_priv *priv, char *essid, | ||
1970 | int length, int batch_mode) | ||
1971 | { | ||
1972 | int ssid_len = min(length, IW_ESSID_MAX_SIZE); | ||
1973 | struct host_command cmd = { | ||
1974 | .host_command = SSID, | ||
1975 | .host_command_sequence = 0, | ||
1976 | .host_command_length = ssid_len | ||
1977 | }; | ||
1978 | int err; | ||
1979 | |||
1980 | IPW_DEBUG_HC("SSID: '%s'\n", escape_essid(essid, ssid_len)); | ||
1981 | |||
1982 | if (ssid_len) | ||
1983 | memcpy((char*)cmd.host_command_parameters, | ||
1984 | essid, ssid_len); | ||
1985 | |||
1986 | if (!batch_mode) { | ||
1987 | err = ipw2100_disable_adapter(priv); | ||
1988 | if (err) | ||
1989 | return err; | ||
1990 | } | ||
1991 | |||
1992 | /* Bug in FW currently doesn't honor bit 0 in SET_SCAN_OPTIONS to | ||
1993 | * disable auto association -- so we cheat by setting a bogus SSID */ | ||
1994 | if (!ssid_len && !(priv->config & CFG_ASSOCIATE)) { | ||
1995 | int i; | ||
1996 | u8 *bogus = (u8*)cmd.host_command_parameters; | ||
1997 | for (i = 0; i < IW_ESSID_MAX_SIZE; i++) | ||
1998 | bogus[i] = 0x18 + i; | ||
1999 | cmd.host_command_length = IW_ESSID_MAX_SIZE; | ||
2000 | } | ||
2001 | |||
2002 | /* NOTE: We always send the SSID command even if the provided ESSID is | ||
2003 | * the same as what we currently think is set. */ | ||
2004 | |||
2005 | err = ipw2100_hw_send_command(priv, &cmd); | ||
2006 | if (!err) { | ||
2007 | memset(priv->essid + ssid_len, 0, | ||
2008 | IW_ESSID_MAX_SIZE - ssid_len); | ||
2009 | memcpy(priv->essid, essid, ssid_len); | ||
2010 | priv->essid_len = ssid_len; | ||
2011 | } | ||
2012 | |||
2013 | if (!batch_mode) { | ||
2014 | if (ipw2100_enable_adapter(priv)) | ||
2015 | err = -EIO; | ||
2016 | } | ||
2017 | |||
2018 | return err; | ||
2019 | } | ||
2020 | |||
2021 | static void isr_indicate_association_lost(struct ipw2100_priv *priv, u32 status) | ||
2022 | { | ||
2023 | IPW_DEBUG(IPW_DL_NOTIF | IPW_DL_STATE | IPW_DL_ASSOC, | ||
2024 | "disassociated: '%s' " MAC_FMT " \n", | ||
2025 | escape_essid(priv->essid, priv->essid_len), | ||
2026 | MAC_ARG(priv->bssid)); | ||
2027 | |||
2028 | priv->status &= ~(STATUS_ASSOCIATED | STATUS_ASSOCIATING); | ||
2029 | |||
2030 | if (priv->status & STATUS_STOPPING) { | ||
2031 | IPW_DEBUG_INFO("Card is stopping itself, discard ASSN_LOST.\n"); | ||
2032 | return; | ||
2033 | } | ||
2034 | |||
2035 | memset(priv->bssid, 0, ETH_ALEN); | ||
2036 | memset(priv->ieee->bssid, 0, ETH_ALEN); | ||
2037 | |||
2038 | netif_carrier_off(priv->net_dev); | ||
2039 | netif_stop_queue(priv->net_dev); | ||
2040 | |||
2041 | if (!(priv->status & STATUS_RUNNING)) | ||
2042 | return; | ||
2043 | |||
2044 | if (priv->status & STATUS_SECURITY_UPDATED) | ||
2045 | queue_work(priv->workqueue, &priv->security_work); | ||
2046 | |||
2047 | queue_work(priv->workqueue, &priv->wx_event_work); | ||
2048 | } | ||
2049 | |||
2050 | static void isr_indicate_rf_kill(struct ipw2100_priv *priv, u32 status) | ||
2051 | { | ||
2052 | IPW_DEBUG_INFO("%s: RF Kill state changed to radio OFF.\n", | ||
2053 | priv->net_dev->name); | ||
2054 | |||
2055 | /* RF_KILL is now enabled (else we wouldn't be here) */ | ||
2056 | priv->status |= STATUS_RF_KILL_HW; | ||
2057 | |||
2058 | #ifdef ACPI_CSTATE_LIMIT_DEFINED | ||
2059 | if (priv->config & CFG_C3_DISABLED) { | ||
2060 | IPW_DEBUG_INFO(DRV_NAME ": Resetting C3 transitions.\n"); | ||
2061 | acpi_set_cstate_limit(priv->cstate_limit); | ||
2062 | priv->config &= ~CFG_C3_DISABLED; | ||
2063 | } | ||
2064 | #endif | ||
2065 | |||
2066 | /* Make sure the RF Kill check timer is running */ | ||
2067 | priv->stop_rf_kill = 0; | ||
2068 | cancel_delayed_work(&priv->rf_kill); | ||
2069 | queue_delayed_work(priv->workqueue, &priv->rf_kill, HZ); | ||
2070 | } | ||
2071 | |||
2072 | static void isr_scan_complete(struct ipw2100_priv *priv, u32 status) | ||
2073 | { | ||
2074 | IPW_DEBUG_SCAN("scan complete\n"); | ||
2075 | /* Age the scan results... */ | ||
2076 | priv->ieee->scans++; | ||
2077 | priv->status &= ~STATUS_SCANNING; | ||
2078 | } | ||
2079 | |||
2080 | #ifdef CONFIG_IPW_DEBUG | ||
2081 | #define IPW2100_HANDLER(v, f) { v, f, # v } | ||
2082 | struct ipw2100_status_indicator { | ||
2083 | int status; | ||
2084 | void (*cb)(struct ipw2100_priv *priv, u32 status); | ||
2085 | char *name; | ||
2086 | }; | ||
2087 | #else | ||
2088 | #define IPW2100_HANDLER(v, f) { v, f } | ||
2089 | struct ipw2100_status_indicator { | ||
2090 | int status; | ||
2091 | void (*cb)(struct ipw2100_priv *priv, u32 status); | ||
2092 | }; | ||
2093 | #endif /* CONFIG_IPW_DEBUG */ | ||
2094 | |||
2095 | static void isr_indicate_scanning(struct ipw2100_priv *priv, u32 status) | ||
2096 | { | ||
2097 | IPW_DEBUG_SCAN("Scanning...\n"); | ||
2098 | priv->status |= STATUS_SCANNING; | ||
2099 | } | ||
2100 | |||
2101 | const struct ipw2100_status_indicator status_handlers[] = { | ||
2102 | IPW2100_HANDLER(IPW_STATE_INITIALIZED, 0), | ||
2103 | IPW2100_HANDLER(IPW_STATE_COUNTRY_FOUND, 0), | ||
2104 | IPW2100_HANDLER(IPW_STATE_ASSOCIATED, isr_indicate_associated), | ||
2105 | IPW2100_HANDLER(IPW_STATE_ASSN_LOST, isr_indicate_association_lost), | ||
2106 | IPW2100_HANDLER(IPW_STATE_ASSN_CHANGED, 0), | ||
2107 | IPW2100_HANDLER(IPW_STATE_SCAN_COMPLETE, isr_scan_complete), | ||
2108 | IPW2100_HANDLER(IPW_STATE_ENTERED_PSP, 0), | ||
2109 | IPW2100_HANDLER(IPW_STATE_LEFT_PSP, 0), | ||
2110 | IPW2100_HANDLER(IPW_STATE_RF_KILL, isr_indicate_rf_kill), | ||
2111 | IPW2100_HANDLER(IPW_STATE_DISABLED, 0), | ||
2112 | IPW2100_HANDLER(IPW_STATE_POWER_DOWN, 0), | ||
2113 | IPW2100_HANDLER(IPW_STATE_SCANNING, isr_indicate_scanning), | ||
2114 | IPW2100_HANDLER(-1, 0) | ||
2115 | }; | ||
2116 | |||
2117 | |||
2118 | static void isr_status_change(struct ipw2100_priv *priv, int status) | ||
2119 | { | ||
2120 | int i; | ||
2121 | |||
2122 | if (status == IPW_STATE_SCANNING && | ||
2123 | priv->status & STATUS_ASSOCIATED && | ||
2124 | !(priv->status & STATUS_SCANNING)) { | ||
2125 | IPW_DEBUG_INFO("Scan detected while associated, with " | ||
2126 | "no scan request. Restarting firmware.\n"); | ||
2127 | |||
2128 | /* Wake up any sleeping jobs */ | ||
2129 | schedule_reset(priv); | ||
2130 | } | ||
2131 | |||
2132 | for (i = 0; status_handlers[i].status != -1; i++) { | ||
2133 | if (status == status_handlers[i].status) { | ||
2134 | IPW_DEBUG_NOTIF("Status change: %s\n", | ||
2135 | status_handlers[i].name); | ||
2136 | if (status_handlers[i].cb) | ||
2137 | status_handlers[i].cb(priv, status); | ||
2138 | priv->wstats.status = status; | ||
2139 | return; | ||
2140 | } | ||
2141 | } | ||
2142 | |||
2143 | IPW_DEBUG_NOTIF("unknown status received: %04x\n", status); | ||
2144 | } | ||
2145 | |||
2146 | static void isr_rx_complete_command( | ||
2147 | struct ipw2100_priv *priv, | ||
2148 | struct ipw2100_cmd_header *cmd) | ||
2149 | { | ||
2150 | #ifdef CONFIG_IPW_DEBUG | ||
2151 | if (cmd->host_command_reg < ARRAY_SIZE(command_types)) { | ||
2152 | IPW_DEBUG_HC("Command completed '%s (%d)'\n", | ||
2153 | command_types[cmd->host_command_reg], | ||
2154 | cmd->host_command_reg); | ||
2155 | } | ||
2156 | #endif | ||
2157 | if (cmd->host_command_reg == HOST_COMPLETE) | ||
2158 | priv->status |= STATUS_ENABLED; | ||
2159 | |||
2160 | if (cmd->host_command_reg == CARD_DISABLE) | ||
2161 | priv->status &= ~STATUS_ENABLED; | ||
2162 | |||
2163 | priv->status &= ~STATUS_CMD_ACTIVE; | ||
2164 | |||
2165 | wake_up_interruptible(&priv->wait_command_queue); | ||
2166 | } | ||
2167 | |||
2168 | #ifdef CONFIG_IPW_DEBUG | ||
2169 | const char *frame_types[] = { | ||
2170 | "COMMAND_STATUS_VAL", | ||
2171 | "STATUS_CHANGE_VAL", | ||
2172 | "P80211_DATA_VAL", | ||
2173 | "P8023_DATA_VAL", | ||
2174 | "HOST_NOTIFICATION_VAL" | ||
2175 | }; | ||
2176 | #endif | ||
2177 | |||
2178 | |||
2179 | static inline int ipw2100_alloc_skb( | ||
2180 | struct ipw2100_priv *priv, | ||
2181 | struct ipw2100_rx_packet *packet) | ||
2182 | { | ||
2183 | packet->skb = dev_alloc_skb(sizeof(struct ipw2100_rx)); | ||
2184 | if (!packet->skb) | ||
2185 | return -ENOMEM; | ||
2186 | |||
2187 | packet->rxp = (struct ipw2100_rx *)packet->skb->data; | ||
2188 | packet->dma_addr = pci_map_single(priv->pci_dev, packet->skb->data, | ||
2189 | sizeof(struct ipw2100_rx), | ||
2190 | PCI_DMA_FROMDEVICE); | ||
2191 | /* NOTE: pci_map_single does not return an error code, and 0 is a valid | ||
2192 | * dma_addr */ | ||
2193 | |||
2194 | return 0; | ||
2195 | } | ||
2196 | |||
2197 | |||
2198 | #define SEARCH_ERROR 0xffffffff | ||
2199 | #define SEARCH_FAIL 0xfffffffe | ||
2200 | #define SEARCH_SUCCESS 0xfffffff0 | ||
2201 | #define SEARCH_DISCARD 0 | ||
2202 | #define SEARCH_SNAPSHOT 1 | ||
2203 | |||
2204 | #define SNAPSHOT_ADDR(ofs) (priv->snapshot[((ofs) >> 12) & 0xff] + ((ofs) & 0xfff)) | ||
2205 | static inline int ipw2100_snapshot_alloc(struct ipw2100_priv *priv) | ||
2206 | { | ||
2207 | int i; | ||
2208 | if (priv->snapshot[0]) | ||
2209 | return 1; | ||
2210 | for (i = 0; i < 0x30; i++) { | ||
2211 | priv->snapshot[i] = (u8*)kmalloc(0x1000, GFP_ATOMIC); | ||
2212 | if (!priv->snapshot[i]) { | ||
2213 | IPW_DEBUG_INFO("%s: Error allocating snapshot " | ||
2214 | "buffer %d\n", priv->net_dev->name, i); | ||
2215 | while (i > 0) | ||
2216 | kfree(priv->snapshot[--i]); | ||
2217 | priv->snapshot[0] = NULL; | ||
2218 | return 0; | ||
2219 | } | ||
2220 | } | ||
2221 | |||
2222 | return 1; | ||
2223 | } | ||
2224 | |||
2225 | static inline void ipw2100_snapshot_free(struct ipw2100_priv *priv) | ||
2226 | { | ||
2227 | int i; | ||
2228 | if (!priv->snapshot[0]) | ||
2229 | return; | ||
2230 | for (i = 0; i < 0x30; i++) | ||
2231 | kfree(priv->snapshot[i]); | ||
2232 | priv->snapshot[0] = NULL; | ||
2233 | } | ||
2234 | |||
2235 | static inline u32 ipw2100_match_buf(struct ipw2100_priv *priv, u8 *in_buf, | ||
2236 | size_t len, int mode) | ||
2237 | { | ||
2238 | u32 i, j; | ||
2239 | u32 tmp; | ||
2240 | u8 *s, *d; | ||
2241 | u32 ret; | ||
2242 | |||
2243 | s = in_buf; | ||
2244 | if (mode == SEARCH_SNAPSHOT) { | ||
2245 | if (!ipw2100_snapshot_alloc(priv)) | ||
2246 | mode = SEARCH_DISCARD; | ||
2247 | } | ||
2248 | |||
2249 | for (ret = SEARCH_FAIL, i = 0; i < 0x30000; i += 4) { | ||
2250 | read_nic_dword(priv->net_dev, i, &tmp); | ||
2251 | if (mode == SEARCH_SNAPSHOT) | ||
2252 | *(u32 *)SNAPSHOT_ADDR(i) = tmp; | ||
2253 | if (ret == SEARCH_FAIL) { | ||
2254 | d = (u8*)&tmp; | ||
2255 | for (j = 0; j < 4; j++) { | ||
2256 | if (*s != *d) { | ||
2257 | s = in_buf; | ||
2258 | continue; | ||
2259 | } | ||
2260 | |||
2261 | s++; | ||
2262 | d++; | ||
2263 | |||
2264 | if ((s - in_buf) == len) | ||
2265 | ret = (i + j) - len + 1; | ||
2266 | } | ||
2267 | } else if (mode == SEARCH_DISCARD) | ||
2268 | return ret; | ||
2269 | } | ||
2270 | |||
2271 | return ret; | ||
2272 | } | ||
2273 | |||
2274 | /* | ||
2275 | * | ||
2276 | * 0) Disconnect the SKB from the firmware (just unmap) | ||
2277 | * 1) Pack the ETH header into the SKB | ||
2278 | * 2) Pass the SKB to the network stack | ||
2279 | * | ||
2280 | * When packet is provided by the firmware, it contains the following: | ||
2281 | * | ||
2282 | * . ieee80211_hdr | ||
2283 | * . ieee80211_snap_hdr | ||
2284 | * | ||
2285 | * The size of the constructed ethernet | ||
2286 | * | ||
2287 | */ | ||
2288 | #ifdef CONFIG_IPW2100_RX_DEBUG | ||
2289 | u8 packet_data[IPW_RX_NIC_BUFFER_LENGTH]; | ||
2290 | #endif | ||
2291 | |||
2292 | static inline void ipw2100_corruption_detected(struct ipw2100_priv *priv, | ||
2293 | int i) | ||
2294 | { | ||
2295 | #ifdef CONFIG_IPW_DEBUG_C3 | ||
2296 | struct ipw2100_status *status = &priv->status_queue.drv[i]; | ||
2297 | u32 match, reg; | ||
2298 | int j; | ||
2299 | #endif | ||
2300 | #ifdef ACPI_CSTATE_LIMIT_DEFINED | ||
2301 | int limit; | ||
2302 | #endif | ||
2303 | |||
2304 | IPW_DEBUG_INFO(DRV_NAME ": PCI latency error detected at " | ||
2305 | "0x%04X.\n", i * sizeof(struct ipw2100_status)); | ||
2306 | |||
2307 | #ifdef ACPI_CSTATE_LIMIT_DEFINED | ||
2308 | IPW_DEBUG_INFO(DRV_NAME ": Disabling C3 transitions.\n"); | ||
2309 | limit = acpi_get_cstate_limit(); | ||
2310 | if (limit > 2) { | ||
2311 | priv->cstate_limit = limit; | ||
2312 | acpi_set_cstate_limit(2); | ||
2313 | priv->config |= CFG_C3_DISABLED; | ||
2314 | } | ||
2315 | #endif | ||
2316 | |||
2317 | #ifdef CONFIG_IPW_DEBUG_C3 | ||
2318 | /* Halt the fimrware so we can get a good image */ | ||
2319 | write_register(priv->net_dev, IPW_REG_RESET_REG, | ||
2320 | IPW_AUX_HOST_RESET_REG_STOP_MASTER); | ||
2321 | j = 5; | ||
2322 | do { | ||
2323 | udelay(IPW_WAIT_RESET_MASTER_ASSERT_COMPLETE_DELAY); | ||
2324 | read_register(priv->net_dev, IPW_REG_RESET_REG, ®); | ||
2325 | |||
2326 | if (reg & IPW_AUX_HOST_RESET_REG_MASTER_DISABLED) | ||
2327 | break; | ||
2328 | } while (j--); | ||
2329 | |||
2330 | match = ipw2100_match_buf(priv, (u8*)status, | ||
2331 | sizeof(struct ipw2100_status), | ||
2332 | SEARCH_SNAPSHOT); | ||
2333 | if (match < SEARCH_SUCCESS) | ||
2334 | IPW_DEBUG_INFO("%s: DMA status match in Firmware at " | ||
2335 | "offset 0x%06X, length %d:\n", | ||
2336 | priv->net_dev->name, match, | ||
2337 | sizeof(struct ipw2100_status)); | ||
2338 | else | ||
2339 | IPW_DEBUG_INFO("%s: No DMA status match in " | ||
2340 | "Firmware.\n", priv->net_dev->name); | ||
2341 | |||
2342 | printk_buf((u8*)priv->status_queue.drv, | ||
2343 | sizeof(struct ipw2100_status) * RX_QUEUE_LENGTH); | ||
2344 | #endif | ||
2345 | |||
2346 | priv->fatal_error = IPW2100_ERR_C3_CORRUPTION; | ||
2347 | priv->ieee->stats.rx_errors++; | ||
2348 | schedule_reset(priv); | ||
2349 | } | ||
2350 | |||
2351 | static inline void isr_rx(struct ipw2100_priv *priv, int i, | ||
2352 | struct ieee80211_rx_stats *stats) | ||
2353 | { | ||
2354 | struct ipw2100_status *status = &priv->status_queue.drv[i]; | ||
2355 | struct ipw2100_rx_packet *packet = &priv->rx_buffers[i]; | ||
2356 | |||
2357 | IPW_DEBUG_RX("Handler...\n"); | ||
2358 | |||
2359 | if (unlikely(status->frame_size > skb_tailroom(packet->skb))) { | ||
2360 | IPW_DEBUG_INFO("%s: frame_size (%u) > skb_tailroom (%u)!" | ||
2361 | " Dropping.\n", | ||
2362 | priv->net_dev->name, | ||
2363 | status->frame_size, skb_tailroom(packet->skb)); | ||
2364 | priv->ieee->stats.rx_errors++; | ||
2365 | return; | ||
2366 | } | ||
2367 | |||
2368 | if (unlikely(!netif_running(priv->net_dev))) { | ||
2369 | priv->ieee->stats.rx_errors++; | ||
2370 | priv->wstats.discard.misc++; | ||
2371 | IPW_DEBUG_DROP("Dropping packet while interface is not up.\n"); | ||
2372 | return; | ||
2373 | } | ||
2374 | |||
2375 | if (unlikely(priv->ieee->iw_mode == IW_MODE_MONITOR && | ||
2376 | status->flags & IPW_STATUS_FLAG_CRC_ERROR)) { | ||
2377 | IPW_DEBUG_RX("CRC error in packet. Dropping.\n"); | ||
2378 | priv->ieee->stats.rx_errors++; | ||
2379 | return; | ||
2380 | } | ||
2381 | |||
2382 | if (unlikely(priv->ieee->iw_mode != IW_MODE_MONITOR && | ||
2383 | !(priv->status & STATUS_ASSOCIATED))) { | ||
2384 | IPW_DEBUG_DROP("Dropping packet while not associated.\n"); | ||
2385 | priv->wstats.discard.misc++; | ||
2386 | return; | ||
2387 | } | ||
2388 | |||
2389 | |||
2390 | pci_unmap_single(priv->pci_dev, | ||
2391 | packet->dma_addr, | ||
2392 | sizeof(struct ipw2100_rx), | ||
2393 | PCI_DMA_FROMDEVICE); | ||
2394 | |||
2395 | skb_put(packet->skb, status->frame_size); | ||
2396 | |||
2397 | #ifdef CONFIG_IPW2100_RX_DEBUG | ||
2398 | /* Make a copy of the frame so we can dump it to the logs if | ||
2399 | * ieee80211_rx fails */ | ||
2400 | memcpy(packet_data, packet->skb->data, | ||
2401 | min(status->frame_size, IPW_RX_NIC_BUFFER_LENGTH)); | ||
2402 | #endif | ||
2403 | |||
2404 | if (!ieee80211_rx(priv->ieee, packet->skb, stats)) { | ||
2405 | #ifdef CONFIG_IPW2100_RX_DEBUG | ||
2406 | IPW_DEBUG_DROP("%s: Non consumed packet:\n", | ||
2407 | priv->net_dev->name); | ||
2408 | printk_buf(IPW_DL_DROP, packet_data, status->frame_size); | ||
2409 | #endif | ||
2410 | priv->ieee->stats.rx_errors++; | ||
2411 | |||
2412 | /* ieee80211_rx failed, so it didn't free the SKB */ | ||
2413 | dev_kfree_skb_any(packet->skb); | ||
2414 | packet->skb = NULL; | ||
2415 | } | ||
2416 | |||
2417 | /* We need to allocate a new SKB and attach it to the RDB. */ | ||
2418 | if (unlikely(ipw2100_alloc_skb(priv, packet))) { | ||
2419 | IPW_DEBUG_WARNING( | ||
2420 | "%s: Unable to allocate SKB onto RBD ring - disabling " | ||
2421 | "adapter.\n", priv->net_dev->name); | ||
2422 | /* TODO: schedule adapter shutdown */ | ||
2423 | IPW_DEBUG_INFO("TODO: Shutdown adapter...\n"); | ||
2424 | } | ||
2425 | |||
2426 | /* Update the RDB entry */ | ||
2427 | priv->rx_queue.drv[i].host_addr = packet->dma_addr; | ||
2428 | } | ||
2429 | |||
2430 | static inline int ipw2100_corruption_check(struct ipw2100_priv *priv, int i) | ||
2431 | { | ||
2432 | struct ipw2100_status *status = &priv->status_queue.drv[i]; | ||
2433 | struct ipw2100_rx *u = priv->rx_buffers[i].rxp; | ||
2434 | u16 frame_type = status->status_fields & STATUS_TYPE_MASK; | ||
2435 | |||
2436 | switch (frame_type) { | ||
2437 | case COMMAND_STATUS_VAL: | ||
2438 | return (status->frame_size != sizeof(u->rx_data.command)); | ||
2439 | case STATUS_CHANGE_VAL: | ||
2440 | return (status->frame_size != sizeof(u->rx_data.status)); | ||
2441 | case HOST_NOTIFICATION_VAL: | ||
2442 | return (status->frame_size < sizeof(u->rx_data.notification)); | ||
2443 | case P80211_DATA_VAL: | ||
2444 | case P8023_DATA_VAL: | ||
2445 | #ifdef CONFIG_IPW2100_MONITOR | ||
2446 | return 0; | ||
2447 | #else | ||
2448 | switch (WLAN_FC_GET_TYPE(u->rx_data.header.frame_ctl)) { | ||
2449 | case IEEE80211_FTYPE_MGMT: | ||
2450 | case IEEE80211_FTYPE_CTL: | ||
2451 | return 0; | ||
2452 | case IEEE80211_FTYPE_DATA: | ||
2453 | return (status->frame_size > | ||
2454 | IPW_MAX_802_11_PAYLOAD_LENGTH); | ||
2455 | } | ||
2456 | #endif | ||
2457 | } | ||
2458 | |||
2459 | return 1; | ||
2460 | } | ||
2461 | |||
2462 | /* | ||
2463 | * ipw2100 interrupts are disabled at this point, and the ISR | ||
2464 | * is the only code that calls this method. So, we do not need | ||
2465 | * to play with any locks. | ||
2466 | * | ||
2467 | * RX Queue works as follows: | ||
2468 | * | ||
2469 | * Read index - firmware places packet in entry identified by the | ||
2470 | * Read index and advances Read index. In this manner, | ||
2471 | * Read index will always point to the next packet to | ||
2472 | * be filled--but not yet valid. | ||
2473 | * | ||
2474 | * Write index - driver fills this entry with an unused RBD entry. | ||
2475 | * This entry has not filled by the firmware yet. | ||
2476 | * | ||
2477 | * In between the W and R indexes are the RBDs that have been received | ||
2478 | * but not yet processed. | ||
2479 | * | ||
2480 | * The process of handling packets will start at WRITE + 1 and advance | ||
2481 | * until it reaches the READ index. | ||
2482 | * | ||
2483 | * The WRITE index is cached in the variable 'priv->rx_queue.next'. | ||
2484 | * | ||
2485 | */ | ||
2486 | static inline void __ipw2100_rx_process(struct ipw2100_priv *priv) | ||
2487 | { | ||
2488 | struct ipw2100_bd_queue *rxq = &priv->rx_queue; | ||
2489 | struct ipw2100_status_queue *sq = &priv->status_queue; | ||
2490 | struct ipw2100_rx_packet *packet; | ||
2491 | u16 frame_type; | ||
2492 | u32 r, w, i, s; | ||
2493 | struct ipw2100_rx *u; | ||
2494 | struct ieee80211_rx_stats stats = { | ||
2495 | .mac_time = jiffies, | ||
2496 | }; | ||
2497 | |||
2498 | read_register(priv->net_dev, IPW_MEM_HOST_SHARED_RX_READ_INDEX, &r); | ||
2499 | read_register(priv->net_dev, IPW_MEM_HOST_SHARED_RX_WRITE_INDEX, &w); | ||
2500 | |||
2501 | if (r >= rxq->entries) { | ||
2502 | IPW_DEBUG_RX("exit - bad read index\n"); | ||
2503 | return; | ||
2504 | } | ||
2505 | |||
2506 | i = (rxq->next + 1) % rxq->entries; | ||
2507 | s = i; | ||
2508 | while (i != r) { | ||
2509 | /* IPW_DEBUG_RX("r = %d : w = %d : processing = %d\n", | ||
2510 | r, rxq->next, i); */ | ||
2511 | |||
2512 | packet = &priv->rx_buffers[i]; | ||
2513 | |||
2514 | /* Sync the DMA for the STATUS buffer so CPU is sure to get | ||
2515 | * the correct values */ | ||
2516 | pci_dma_sync_single_for_cpu( | ||
2517 | priv->pci_dev, | ||
2518 | sq->nic + sizeof(struct ipw2100_status) * i, | ||
2519 | sizeof(struct ipw2100_status), | ||
2520 | PCI_DMA_FROMDEVICE); | ||
2521 | |||
2522 | /* Sync the DMA for the RX buffer so CPU is sure to get | ||
2523 | * the correct values */ | ||
2524 | pci_dma_sync_single_for_cpu(priv->pci_dev, packet->dma_addr, | ||
2525 | sizeof(struct ipw2100_rx), | ||
2526 | PCI_DMA_FROMDEVICE); | ||
2527 | |||
2528 | if (unlikely(ipw2100_corruption_check(priv, i))) { | ||
2529 | ipw2100_corruption_detected(priv, i); | ||
2530 | goto increment; | ||
2531 | } | ||
2532 | |||
2533 | u = packet->rxp; | ||
2534 | frame_type = sq->drv[i].status_fields & | ||
2535 | STATUS_TYPE_MASK; | ||
2536 | stats.rssi = sq->drv[i].rssi + IPW2100_RSSI_TO_DBM; | ||
2537 | stats.len = sq->drv[i].frame_size; | ||
2538 | |||
2539 | stats.mask = 0; | ||
2540 | if (stats.rssi != 0) | ||
2541 | stats.mask |= IEEE80211_STATMASK_RSSI; | ||
2542 | stats.freq = IEEE80211_24GHZ_BAND; | ||
2543 | |||
2544 | IPW_DEBUG_RX( | ||
2545 | "%s: '%s' frame type received (%d).\n", | ||
2546 | priv->net_dev->name, frame_types[frame_type], | ||
2547 | stats.len); | ||
2548 | |||
2549 | switch (frame_type) { | ||
2550 | case COMMAND_STATUS_VAL: | ||
2551 | /* Reset Rx watchdog */ | ||
2552 | isr_rx_complete_command( | ||
2553 | priv, &u->rx_data.command); | ||
2554 | break; | ||
2555 | |||
2556 | case STATUS_CHANGE_VAL: | ||
2557 | isr_status_change(priv, u->rx_data.status); | ||
2558 | break; | ||
2559 | |||
2560 | case P80211_DATA_VAL: | ||
2561 | case P8023_DATA_VAL: | ||
2562 | #ifdef CONFIG_IPW2100_MONITOR | ||
2563 | if (priv->ieee->iw_mode == IW_MODE_MONITOR) { | ||
2564 | isr_rx(priv, i, &stats); | ||
2565 | break; | ||
2566 | } | ||
2567 | #endif | ||
2568 | if (stats.len < sizeof(u->rx_data.header)) | ||
2569 | break; | ||
2570 | switch (WLAN_FC_GET_TYPE(u->rx_data.header. | ||
2571 | frame_ctl)) { | ||
2572 | case IEEE80211_FTYPE_MGMT: | ||
2573 | ieee80211_rx_mgt(priv->ieee, | ||
2574 | &u->rx_data.header, | ||
2575 | &stats); | ||
2576 | break; | ||
2577 | |||
2578 | case IEEE80211_FTYPE_CTL: | ||
2579 | break; | ||
2580 | |||
2581 | case IEEE80211_FTYPE_DATA: | ||
2582 | isr_rx(priv, i, &stats); | ||
2583 | break; | ||
2584 | |||
2585 | } | ||
2586 | break; | ||
2587 | } | ||
2588 | |||
2589 | increment: | ||
2590 | /* clear status field associated with this RBD */ | ||
2591 | rxq->drv[i].status.info.field = 0; | ||
2592 | |||
2593 | i = (i + 1) % rxq->entries; | ||
2594 | } | ||
2595 | |||
2596 | if (i != s) { | ||
2597 | /* backtrack one entry, wrapping to end if at 0 */ | ||
2598 | rxq->next = (i ? i : rxq->entries) - 1; | ||
2599 | |||
2600 | write_register(priv->net_dev, | ||
2601 | IPW_MEM_HOST_SHARED_RX_WRITE_INDEX, | ||
2602 | rxq->next); | ||
2603 | } | ||
2604 | } | ||
2605 | |||
2606 | |||
2607 | /* | ||
2608 | * __ipw2100_tx_process | ||
2609 | * | ||
2610 | * This routine will determine whether the next packet on | ||
2611 | * the fw_pend_list has been processed by the firmware yet. | ||
2612 | * | ||
2613 | * If not, then it does nothing and returns. | ||
2614 | * | ||
2615 | * If so, then it removes the item from the fw_pend_list, frees | ||
2616 | * any associated storage, and places the item back on the | ||
2617 | * free list of its source (either msg_free_list or tx_free_list) | ||
2618 | * | ||
2619 | * TX Queue works as follows: | ||
2620 | * | ||
2621 | * Read index - points to the next TBD that the firmware will | ||
2622 | * process. The firmware will read the data, and once | ||
2623 | * done processing, it will advance the Read index. | ||
2624 | * | ||
2625 | * Write index - driver fills this entry with an constructed TBD | ||
2626 | * entry. The Write index is not advanced until the | ||
2627 | * packet has been configured. | ||
2628 | * | ||
2629 | * In between the W and R indexes are the TBDs that have NOT been | ||
2630 | * processed. Lagging behind the R index are packets that have | ||
2631 | * been processed but have not been freed by the driver. | ||
2632 | * | ||
2633 | * In order to free old storage, an internal index will be maintained | ||
2634 | * that points to the next packet to be freed. When all used | ||
2635 | * packets have been freed, the oldest index will be the same as the | ||
2636 | * firmware's read index. | ||
2637 | * | ||
2638 | * The OLDEST index is cached in the variable 'priv->tx_queue.oldest' | ||
2639 | * | ||
2640 | * Because the TBD structure can not contain arbitrary data, the | ||
2641 | * driver must keep an internal queue of cached allocations such that | ||
2642 | * it can put that data back into the tx_free_list and msg_free_list | ||
2643 | * for use by future command and data packets. | ||
2644 | * | ||
2645 | */ | ||
2646 | static inline int __ipw2100_tx_process(struct ipw2100_priv *priv) | ||
2647 | { | ||
2648 | struct ipw2100_bd_queue *txq = &priv->tx_queue; | ||
2649 | struct ipw2100_bd *tbd; | ||
2650 | struct list_head *element; | ||
2651 | struct ipw2100_tx_packet *packet; | ||
2652 | int descriptors_used; | ||
2653 | int e, i; | ||
2654 | u32 r, w, frag_num = 0; | ||
2655 | |||
2656 | if (list_empty(&priv->fw_pend_list)) | ||
2657 | return 0; | ||
2658 | |||
2659 | element = priv->fw_pend_list.next; | ||
2660 | |||
2661 | packet = list_entry(element, struct ipw2100_tx_packet, list); | ||
2662 | tbd = &txq->drv[packet->index]; | ||
2663 | |||
2664 | /* Determine how many TBD entries must be finished... */ | ||
2665 | switch (packet->type) { | ||
2666 | case COMMAND: | ||
2667 | /* COMMAND uses only one slot; don't advance */ | ||
2668 | descriptors_used = 1; | ||
2669 | e = txq->oldest; | ||
2670 | break; | ||
2671 | |||
2672 | case DATA: | ||
2673 | /* DATA uses two slots; advance and loop position. */ | ||
2674 | descriptors_used = tbd->num_fragments; | ||
2675 | frag_num = tbd->num_fragments - 1; | ||
2676 | e = txq->oldest + frag_num; | ||
2677 | e %= txq->entries; | ||
2678 | break; | ||
2679 | |||
2680 | default: | ||
2681 | IPW_DEBUG_WARNING("%s: Bad fw_pend_list entry!\n", | ||
2682 | priv->net_dev->name); | ||
2683 | return 0; | ||
2684 | } | ||
2685 | |||
2686 | /* if the last TBD is not done by NIC yet, then packet is | ||
2687 | * not ready to be released. | ||
2688 | * | ||
2689 | */ | ||
2690 | read_register(priv->net_dev, IPW_MEM_HOST_SHARED_TX_QUEUE_READ_INDEX, | ||
2691 | &r); | ||
2692 | read_register(priv->net_dev, IPW_MEM_HOST_SHARED_TX_QUEUE_WRITE_INDEX, | ||
2693 | &w); | ||
2694 | if (w != txq->next) | ||
2695 | IPW_DEBUG_WARNING("%s: write index mismatch\n", | ||
2696 | priv->net_dev->name); | ||
2697 | |||
2698 | /* | ||
2699 | * txq->next is the index of the last packet written txq->oldest is | ||
2700 | * the index of the r is the index of the next packet to be read by | ||
2701 | * firmware | ||
2702 | */ | ||
2703 | |||
2704 | |||
2705 | /* | ||
2706 | * Quick graphic to help you visualize the following | ||
2707 | * if / else statement | ||
2708 | * | ||
2709 | * ===>| s---->|=============== | ||
2710 | * e>| | ||
2711 | * | a | b | c | d | e | f | g | h | i | j | k | l | ||
2712 | * r---->| | ||
2713 | * w | ||
2714 | * | ||
2715 | * w - updated by driver | ||
2716 | * r - updated by firmware | ||
2717 | * s - start of oldest BD entry (txq->oldest) | ||
2718 | * e - end of oldest BD entry | ||
2719 | * | ||
2720 | */ | ||
2721 | if (!((r <= w && (e < r || e >= w)) || (e < r && e >= w))) { | ||
2722 | IPW_DEBUG_TX("exit - no processed packets ready to release.\n"); | ||
2723 | return 0; | ||
2724 | } | ||
2725 | |||
2726 | list_del(element); | ||
2727 | DEC_STAT(&priv->fw_pend_stat); | ||
2728 | |||
2729 | #ifdef CONFIG_IPW_DEBUG | ||
2730 | { | ||
2731 | int i = txq->oldest; | ||
2732 | IPW_DEBUG_TX( | ||
2733 | "TX%d V=%p P=%p T=%p L=%d\n", i, | ||
2734 | &txq->drv[i], | ||
2735 | (void*)txq->nic + i * sizeof(struct ipw2100_bd), | ||
2736 | (void*)txq->drv[i].host_addr, | ||
2737 | txq->drv[i].buf_length); | ||
2738 | |||
2739 | if (packet->type == DATA) { | ||
2740 | i = (i + 1) % txq->entries; | ||
2741 | |||
2742 | IPW_DEBUG_TX( | ||
2743 | "TX%d V=%p P=%p T=%p L=%d\n", i, | ||
2744 | &txq->drv[i], | ||
2745 | (void*)txq->nic + i * | ||
2746 | sizeof(struct ipw2100_bd), | ||
2747 | (void*)txq->drv[i].host_addr, | ||
2748 | txq->drv[i].buf_length); | ||
2749 | } | ||
2750 | } | ||
2751 | #endif | ||
2752 | |||
2753 | switch (packet->type) { | ||
2754 | case DATA: | ||
2755 | if (txq->drv[txq->oldest].status.info.fields.txType != 0) | ||
2756 | IPW_DEBUG_WARNING("%s: Queue mismatch. " | ||
2757 | "Expecting DATA TBD but pulled " | ||
2758 | "something else: ids %d=%d.\n", | ||
2759 | priv->net_dev->name, txq->oldest, packet->index); | ||
2760 | |||
2761 | /* DATA packet; we have to unmap and free the SKB */ | ||
2762 | priv->ieee->stats.tx_packets++; | ||
2763 | for (i = 0; i < frag_num; i++) { | ||
2764 | tbd = &txq->drv[(packet->index + 1 + i) % | ||
2765 | txq->entries]; | ||
2766 | |||
2767 | IPW_DEBUG_TX( | ||
2768 | "TX%d P=%08x L=%d\n", | ||
2769 | (packet->index + 1 + i) % txq->entries, | ||
2770 | tbd->host_addr, tbd->buf_length); | ||
2771 | |||
2772 | pci_unmap_single(priv->pci_dev, | ||
2773 | tbd->host_addr, | ||
2774 | tbd->buf_length, | ||
2775 | PCI_DMA_TODEVICE); | ||
2776 | } | ||
2777 | |||
2778 | priv->ieee->stats.tx_bytes += packet->info.d_struct.txb->payload_size; | ||
2779 | ieee80211_txb_free(packet->info.d_struct.txb); | ||
2780 | packet->info.d_struct.txb = NULL; | ||
2781 | |||
2782 | list_add_tail(element, &priv->tx_free_list); | ||
2783 | INC_STAT(&priv->tx_free_stat); | ||
2784 | |||
2785 | /* We have a free slot in the Tx queue, so wake up the | ||
2786 | * transmit layer if it is stopped. */ | ||
2787 | if (priv->status & STATUS_ASSOCIATED && | ||
2788 | netif_queue_stopped(priv->net_dev)) { | ||
2789 | IPW_DEBUG_INFO(KERN_INFO | ||
2790 | "%s: Waking net queue.\n", | ||
2791 | priv->net_dev->name); | ||
2792 | netif_wake_queue(priv->net_dev); | ||
2793 | } | ||
2794 | |||
2795 | /* A packet was processed by the hardware, so update the | ||
2796 | * watchdog */ | ||
2797 | priv->net_dev->trans_start = jiffies; | ||
2798 | |||
2799 | break; | ||
2800 | |||
2801 | case COMMAND: | ||
2802 | if (txq->drv[txq->oldest].status.info.fields.txType != 1) | ||
2803 | IPW_DEBUG_WARNING("%s: Queue mismatch. " | ||
2804 | "Expecting COMMAND TBD but pulled " | ||
2805 | "something else: ids %d=%d.\n", | ||
2806 | priv->net_dev->name, txq->oldest, packet->index); | ||
2807 | |||
2808 | #ifdef CONFIG_IPW_DEBUG | ||
2809 | if (packet->info.c_struct.cmd->host_command_reg < | ||
2810 | sizeof(command_types) / sizeof(*command_types)) | ||
2811 | IPW_DEBUG_TX( | ||
2812 | "Command '%s (%d)' processed: %d.\n", | ||
2813 | command_types[packet->info.c_struct.cmd->host_command_reg], | ||
2814 | packet->info.c_struct.cmd->host_command_reg, | ||
2815 | packet->info.c_struct.cmd->cmd_status_reg); | ||
2816 | #endif | ||
2817 | |||
2818 | list_add_tail(element, &priv->msg_free_list); | ||
2819 | INC_STAT(&priv->msg_free_stat); | ||
2820 | break; | ||
2821 | } | ||
2822 | |||
2823 | /* advance oldest used TBD pointer to start of next entry */ | ||
2824 | txq->oldest = (e + 1) % txq->entries; | ||
2825 | /* increase available TBDs number */ | ||
2826 | txq->available += descriptors_used; | ||
2827 | SET_STAT(&priv->txq_stat, txq->available); | ||
2828 | |||
2829 | IPW_DEBUG_TX("packet latency (send to process) %ld jiffies\n", | ||
2830 | jiffies - packet->jiffy_start); | ||
2831 | |||
2832 | return (!list_empty(&priv->fw_pend_list)); | ||
2833 | } | ||
2834 | |||
2835 | |||
2836 | static inline void __ipw2100_tx_complete(struct ipw2100_priv *priv) | ||
2837 | { | ||
2838 | int i = 0; | ||
2839 | |||
2840 | while (__ipw2100_tx_process(priv) && i < 200) i++; | ||
2841 | |||
2842 | if (i == 200) { | ||
2843 | IPW_DEBUG_WARNING( | ||
2844 | "%s: Driver is running slow (%d iters).\n", | ||
2845 | priv->net_dev->name, i); | ||
2846 | } | ||
2847 | } | ||
2848 | |||
2849 | |||
2850 | static void X__ipw2100_tx_send_commands(struct ipw2100_priv *priv) | ||
2851 | { | ||
2852 | struct list_head *element; | ||
2853 | struct ipw2100_tx_packet *packet; | ||
2854 | struct ipw2100_bd_queue *txq = &priv->tx_queue; | ||
2855 | struct ipw2100_bd *tbd; | ||
2856 | int next = txq->next; | ||
2857 | |||
2858 | while (!list_empty(&priv->msg_pend_list)) { | ||
2859 | /* if there isn't enough space in TBD queue, then | ||
2860 | * don't stuff a new one in. | ||
2861 | * NOTE: 3 are needed as a command will take one, | ||
2862 | * and there is a minimum of 2 that must be | ||
2863 | * maintained between the r and w indexes | ||
2864 | */ | ||
2865 | if (txq->available <= 3) { | ||
2866 | IPW_DEBUG_TX("no room in tx_queue\n"); | ||
2867 | break; | ||
2868 | } | ||
2869 | |||
2870 | element = priv->msg_pend_list.next; | ||
2871 | list_del(element); | ||
2872 | DEC_STAT(&priv->msg_pend_stat); | ||
2873 | |||
2874 | packet = list_entry(element, | ||
2875 | struct ipw2100_tx_packet, list); | ||
2876 | |||
2877 | IPW_DEBUG_TX("using TBD at virt=%p, phys=%p\n", | ||
2878 | &txq->drv[txq->next], | ||
2879 | (void*)(txq->nic + txq->next * | ||
2880 | sizeof(struct ipw2100_bd))); | ||
2881 | |||
2882 | packet->index = txq->next; | ||
2883 | |||
2884 | tbd = &txq->drv[txq->next]; | ||
2885 | |||
2886 | /* initialize TBD */ | ||
2887 | tbd->host_addr = packet->info.c_struct.cmd_phys; | ||
2888 | tbd->buf_length = sizeof(struct ipw2100_cmd_header); | ||
2889 | /* not marking number of fragments causes problems | ||
2890 | * with f/w debug version */ | ||
2891 | tbd->num_fragments = 1; | ||
2892 | tbd->status.info.field = | ||
2893 | IPW_BD_STATUS_TX_FRAME_COMMAND | | ||
2894 | IPW_BD_STATUS_TX_INTERRUPT_ENABLE; | ||
2895 | |||
2896 | /* update TBD queue counters */ | ||
2897 | txq->next++; | ||
2898 | txq->next %= txq->entries; | ||
2899 | txq->available--; | ||
2900 | DEC_STAT(&priv->txq_stat); | ||
2901 | |||
2902 | list_add_tail(element, &priv->fw_pend_list); | ||
2903 | INC_STAT(&priv->fw_pend_stat); | ||
2904 | } | ||
2905 | |||
2906 | if (txq->next != next) { | ||
2907 | /* kick off the DMA by notifying firmware the | ||
2908 | * write index has moved; make sure TBD stores are sync'd */ | ||
2909 | wmb(); | ||
2910 | write_register(priv->net_dev, | ||
2911 | IPW_MEM_HOST_SHARED_TX_QUEUE_WRITE_INDEX, | ||
2912 | txq->next); | ||
2913 | } | ||
2914 | } | ||
2915 | |||
2916 | |||
2917 | /* | ||
2918 | * X__ipw2100_tx_send_data | ||
2919 | * | ||
2920 | */ | ||
2921 | static void X__ipw2100_tx_send_data(struct ipw2100_priv *priv) | ||
2922 | { | ||
2923 | struct list_head *element; | ||
2924 | struct ipw2100_tx_packet *packet; | ||
2925 | struct ipw2100_bd_queue *txq = &priv->tx_queue; | ||
2926 | struct ipw2100_bd *tbd; | ||
2927 | int next = txq->next; | ||
2928 | int i = 0; | ||
2929 | struct ipw2100_data_header *ipw_hdr; | ||
2930 | struct ieee80211_hdr *hdr; | ||
2931 | |||
2932 | while (!list_empty(&priv->tx_pend_list)) { | ||
2933 | /* if there isn't enough space in TBD queue, then | ||
2934 | * don't stuff a new one in. | ||
2935 | * NOTE: 4 are needed as a data will take two, | ||
2936 | * and there is a minimum of 2 that must be | ||
2937 | * maintained between the r and w indexes | ||
2938 | */ | ||
2939 | element = priv->tx_pend_list.next; | ||
2940 | packet = list_entry(element, struct ipw2100_tx_packet, list); | ||
2941 | |||
2942 | if (unlikely(1 + packet->info.d_struct.txb->nr_frags > | ||
2943 | IPW_MAX_BDS)) { | ||
2944 | /* TODO: Support merging buffers if more than | ||
2945 | * IPW_MAX_BDS are used */ | ||
2946 | IPW_DEBUG_INFO( | ||
2947 | "%s: Maximum BD theshold exceeded. " | ||
2948 | "Increase fragmentation level.\n", | ||
2949 | priv->net_dev->name); | ||
2950 | } | ||
2951 | |||
2952 | if (txq->available <= 3 + | ||
2953 | packet->info.d_struct.txb->nr_frags) { | ||
2954 | IPW_DEBUG_TX("no room in tx_queue\n"); | ||
2955 | break; | ||
2956 | } | ||
2957 | |||
2958 | list_del(element); | ||
2959 | DEC_STAT(&priv->tx_pend_stat); | ||
2960 | |||
2961 | tbd = &txq->drv[txq->next]; | ||
2962 | |||
2963 | packet->index = txq->next; | ||
2964 | |||
2965 | ipw_hdr = packet->info.d_struct.data; | ||
2966 | hdr = (struct ieee80211_hdr *)packet->info.d_struct.txb-> | ||
2967 | fragments[0]->data; | ||
2968 | |||
2969 | if (priv->ieee->iw_mode == IW_MODE_INFRA) { | ||
2970 | /* To DS: Addr1 = BSSID, Addr2 = SA, | ||
2971 | Addr3 = DA */ | ||
2972 | memcpy(ipw_hdr->src_addr, hdr->addr2, ETH_ALEN); | ||
2973 | memcpy(ipw_hdr->dst_addr, hdr->addr3, ETH_ALEN); | ||
2974 | } else if (priv->ieee->iw_mode == IW_MODE_ADHOC) { | ||
2975 | /* not From/To DS: Addr1 = DA, Addr2 = SA, | ||
2976 | Addr3 = BSSID */ | ||
2977 | memcpy(ipw_hdr->src_addr, hdr->addr2, ETH_ALEN); | ||
2978 | memcpy(ipw_hdr->dst_addr, hdr->addr1, ETH_ALEN); | ||
2979 | } | ||
2980 | |||
2981 | ipw_hdr->host_command_reg = SEND; | ||
2982 | ipw_hdr->host_command_reg1 = 0; | ||
2983 | |||
2984 | /* For now we only support host based encryption */ | ||
2985 | ipw_hdr->needs_encryption = 0; | ||
2986 | ipw_hdr->encrypted = packet->info.d_struct.txb->encrypted; | ||
2987 | if (packet->info.d_struct.txb->nr_frags > 1) | ||
2988 | ipw_hdr->fragment_size = | ||
2989 | packet->info.d_struct.txb->frag_size - IEEE80211_3ADDR_LEN; | ||
2990 | else | ||
2991 | ipw_hdr->fragment_size = 0; | ||
2992 | |||
2993 | tbd->host_addr = packet->info.d_struct.data_phys; | ||
2994 | tbd->buf_length = sizeof(struct ipw2100_data_header); | ||
2995 | tbd->num_fragments = 1 + packet->info.d_struct.txb->nr_frags; | ||
2996 | tbd->status.info.field = | ||
2997 | IPW_BD_STATUS_TX_FRAME_802_3 | | ||
2998 | IPW_BD_STATUS_TX_FRAME_NOT_LAST_FRAGMENT; | ||
2999 | txq->next++; | ||
3000 | txq->next %= txq->entries; | ||
3001 | |||
3002 | IPW_DEBUG_TX( | ||
3003 | "data header tbd TX%d P=%08x L=%d\n", | ||
3004 | packet->index, tbd->host_addr, | ||
3005 | tbd->buf_length); | ||
3006 | #ifdef CONFIG_IPW_DEBUG | ||
3007 | if (packet->info.d_struct.txb->nr_frags > 1) | ||
3008 | IPW_DEBUG_FRAG("fragment Tx: %d frames\n", | ||
3009 | packet->info.d_struct.txb->nr_frags); | ||
3010 | #endif | ||
3011 | |||
3012 | for (i = 0; i < packet->info.d_struct.txb->nr_frags; i++) { | ||
3013 | tbd = &txq->drv[txq->next]; | ||
3014 | if (i == packet->info.d_struct.txb->nr_frags - 1) | ||
3015 | tbd->status.info.field = | ||
3016 | IPW_BD_STATUS_TX_FRAME_802_3 | | ||
3017 | IPW_BD_STATUS_TX_INTERRUPT_ENABLE; | ||
3018 | else | ||
3019 | tbd->status.info.field = | ||
3020 | IPW_BD_STATUS_TX_FRAME_802_3 | | ||
3021 | IPW_BD_STATUS_TX_FRAME_NOT_LAST_FRAGMENT; | ||
3022 | |||
3023 | tbd->buf_length = packet->info.d_struct.txb-> | ||
3024 | fragments[i]->len - IEEE80211_3ADDR_LEN; | ||
3025 | |||
3026 | tbd->host_addr = pci_map_single( | ||
3027 | priv->pci_dev, | ||
3028 | packet->info.d_struct.txb->fragments[i]->data + | ||
3029 | IEEE80211_3ADDR_LEN, | ||
3030 | tbd->buf_length, | ||
3031 | PCI_DMA_TODEVICE); | ||
3032 | |||
3033 | IPW_DEBUG_TX( | ||
3034 | "data frag tbd TX%d P=%08x L=%d\n", | ||
3035 | txq->next, tbd->host_addr, tbd->buf_length); | ||
3036 | |||
3037 | pci_dma_sync_single_for_device( | ||
3038 | priv->pci_dev, tbd->host_addr, | ||
3039 | tbd->buf_length, | ||
3040 | PCI_DMA_TODEVICE); | ||
3041 | |||
3042 | txq->next++; | ||
3043 | txq->next %= txq->entries; | ||
3044 | } | ||
3045 | |||
3046 | txq->available -= 1 + packet->info.d_struct.txb->nr_frags; | ||
3047 | SET_STAT(&priv->txq_stat, txq->available); | ||
3048 | |||
3049 | list_add_tail(element, &priv->fw_pend_list); | ||
3050 | INC_STAT(&priv->fw_pend_stat); | ||
3051 | } | ||
3052 | |||
3053 | if (txq->next != next) { | ||
3054 | /* kick off the DMA by notifying firmware the | ||
3055 | * write index has moved; make sure TBD stores are sync'd */ | ||
3056 | write_register(priv->net_dev, | ||
3057 | IPW_MEM_HOST_SHARED_TX_QUEUE_WRITE_INDEX, | ||
3058 | txq->next); | ||
3059 | } | ||
3060 | return; | ||
3061 | } | ||
3062 | |||
3063 | static void ipw2100_irq_tasklet(struct ipw2100_priv *priv) | ||
3064 | { | ||
3065 | struct net_device *dev = priv->net_dev; | ||
3066 | unsigned long flags; | ||
3067 | u32 inta, tmp; | ||
3068 | |||
3069 | spin_lock_irqsave(&priv->low_lock, flags); | ||
3070 | ipw2100_disable_interrupts(priv); | ||
3071 | |||
3072 | read_register(dev, IPW_REG_INTA, &inta); | ||
3073 | |||
3074 | IPW_DEBUG_ISR("enter - INTA: 0x%08lX\n", | ||
3075 | (unsigned long)inta & IPW_INTERRUPT_MASK); | ||
3076 | |||
3077 | priv->in_isr++; | ||
3078 | priv->interrupts++; | ||
3079 | |||
3080 | /* We do not loop and keep polling for more interrupts as this | ||
3081 | * is frowned upon and doesn't play nicely with other potentially | ||
3082 | * chained IRQs */ | ||
3083 | IPW_DEBUG_ISR("INTA: 0x%08lX\n", | ||
3084 | (unsigned long)inta & IPW_INTERRUPT_MASK); | ||
3085 | |||
3086 | if (inta & IPW2100_INTA_FATAL_ERROR) { | ||
3087 | IPW_DEBUG_WARNING(DRV_NAME | ||
3088 | ": Fatal interrupt. Scheduling firmware restart.\n"); | ||
3089 | priv->inta_other++; | ||
3090 | write_register( | ||
3091 | dev, IPW_REG_INTA, | ||
3092 | IPW2100_INTA_FATAL_ERROR); | ||
3093 | |||
3094 | read_nic_dword(dev, IPW_NIC_FATAL_ERROR, &priv->fatal_error); | ||
3095 | IPW_DEBUG_INFO("%s: Fatal error value: 0x%08X\n", | ||
3096 | priv->net_dev->name, priv->fatal_error); | ||
3097 | |||
3098 | read_nic_dword(dev, IPW_ERROR_ADDR(priv->fatal_error), &tmp); | ||
3099 | IPW_DEBUG_INFO("%s: Fatal error address value: 0x%08X\n", | ||
3100 | priv->net_dev->name, tmp); | ||
3101 | |||
3102 | /* Wake up any sleeping jobs */ | ||
3103 | schedule_reset(priv); | ||
3104 | } | ||
3105 | |||
3106 | if (inta & IPW2100_INTA_PARITY_ERROR) { | ||
3107 | IPW_DEBUG_ERROR("***** PARITY ERROR INTERRUPT !!!! \n"); | ||
3108 | priv->inta_other++; | ||
3109 | write_register( | ||
3110 | dev, IPW_REG_INTA, | ||
3111 | IPW2100_INTA_PARITY_ERROR); | ||
3112 | } | ||
3113 | |||
3114 | if (inta & IPW2100_INTA_RX_TRANSFER) { | ||
3115 | IPW_DEBUG_ISR("RX interrupt\n"); | ||
3116 | |||
3117 | priv->rx_interrupts++; | ||
3118 | |||
3119 | write_register( | ||
3120 | dev, IPW_REG_INTA, | ||
3121 | IPW2100_INTA_RX_TRANSFER); | ||
3122 | |||
3123 | __ipw2100_rx_process(priv); | ||
3124 | __ipw2100_tx_complete(priv); | ||
3125 | } | ||
3126 | |||
3127 | if (inta & IPW2100_INTA_TX_TRANSFER) { | ||
3128 | IPW_DEBUG_ISR("TX interrupt\n"); | ||
3129 | |||
3130 | priv->tx_interrupts++; | ||
3131 | |||
3132 | write_register(dev, IPW_REG_INTA, | ||
3133 | IPW2100_INTA_TX_TRANSFER); | ||
3134 | |||
3135 | __ipw2100_tx_complete(priv); | ||
3136 | X__ipw2100_tx_send_commands(priv); | ||
3137 | X__ipw2100_tx_send_data(priv); | ||
3138 | } | ||
3139 | |||
3140 | if (inta & IPW2100_INTA_TX_COMPLETE) { | ||
3141 | IPW_DEBUG_ISR("TX complete\n"); | ||
3142 | priv->inta_other++; | ||
3143 | write_register( | ||
3144 | dev, IPW_REG_INTA, | ||
3145 | IPW2100_INTA_TX_COMPLETE); | ||
3146 | |||
3147 | __ipw2100_tx_complete(priv); | ||
3148 | } | ||
3149 | |||
3150 | if (inta & IPW2100_INTA_EVENT_INTERRUPT) { | ||
3151 | /* ipw2100_handle_event(dev); */ | ||
3152 | priv->inta_other++; | ||
3153 | write_register( | ||
3154 | dev, IPW_REG_INTA, | ||
3155 | IPW2100_INTA_EVENT_INTERRUPT); | ||
3156 | } | ||
3157 | |||
3158 | if (inta & IPW2100_INTA_FW_INIT_DONE) { | ||
3159 | IPW_DEBUG_ISR("FW init done interrupt\n"); | ||
3160 | priv->inta_other++; | ||
3161 | |||
3162 | read_register(dev, IPW_REG_INTA, &tmp); | ||
3163 | if (tmp & (IPW2100_INTA_FATAL_ERROR | | ||
3164 | IPW2100_INTA_PARITY_ERROR)) { | ||
3165 | write_register( | ||
3166 | dev, IPW_REG_INTA, | ||
3167 | IPW2100_INTA_FATAL_ERROR | | ||
3168 | IPW2100_INTA_PARITY_ERROR); | ||
3169 | } | ||
3170 | |||
3171 | write_register(dev, IPW_REG_INTA, | ||
3172 | IPW2100_INTA_FW_INIT_DONE); | ||
3173 | } | ||
3174 | |||
3175 | if (inta & IPW2100_INTA_STATUS_CHANGE) { | ||
3176 | IPW_DEBUG_ISR("Status change interrupt\n"); | ||
3177 | priv->inta_other++; | ||
3178 | write_register( | ||
3179 | dev, IPW_REG_INTA, | ||
3180 | IPW2100_INTA_STATUS_CHANGE); | ||
3181 | } | ||
3182 | |||
3183 | if (inta & IPW2100_INTA_SLAVE_MODE_HOST_COMMAND_DONE) { | ||
3184 | IPW_DEBUG_ISR("slave host mode interrupt\n"); | ||
3185 | priv->inta_other++; | ||
3186 | write_register( | ||
3187 | dev, IPW_REG_INTA, | ||
3188 | IPW2100_INTA_SLAVE_MODE_HOST_COMMAND_DONE); | ||
3189 | } | ||
3190 | |||
3191 | priv->in_isr--; | ||
3192 | ipw2100_enable_interrupts(priv); | ||
3193 | |||
3194 | spin_unlock_irqrestore(&priv->low_lock, flags); | ||
3195 | |||
3196 | IPW_DEBUG_ISR("exit\n"); | ||
3197 | } | ||
3198 | |||
3199 | |||
3200 | static irqreturn_t ipw2100_interrupt(int irq, void *data, | ||
3201 | struct pt_regs *regs) | ||
3202 | { | ||
3203 | struct ipw2100_priv *priv = data; | ||
3204 | u32 inta, inta_mask; | ||
3205 | |||
3206 | if (!data) | ||
3207 | return IRQ_NONE; | ||
3208 | |||
3209 | spin_lock(&priv->low_lock); | ||
3210 | |||
3211 | /* We check to see if we should be ignoring interrupts before | ||
3212 | * we touch the hardware. During ucode load if we try and handle | ||
3213 | * an interrupt we can cause keyboard problems as well as cause | ||
3214 | * the ucode to fail to initialize */ | ||
3215 | if (!(priv->status & STATUS_INT_ENABLED)) { | ||
3216 | /* Shared IRQ */ | ||
3217 | goto none; | ||
3218 | } | ||
3219 | |||
3220 | read_register(priv->net_dev, IPW_REG_INTA_MASK, &inta_mask); | ||
3221 | read_register(priv->net_dev, IPW_REG_INTA, &inta); | ||
3222 | |||
3223 | if (inta == 0xFFFFFFFF) { | ||
3224 | /* Hardware disappeared */ | ||
3225 | IPW_DEBUG_WARNING("IRQ INTA == 0xFFFFFFFF\n"); | ||
3226 | goto none; | ||
3227 | } | ||
3228 | |||
3229 | inta &= IPW_INTERRUPT_MASK; | ||
3230 | |||
3231 | if (!(inta & inta_mask)) { | ||
3232 | /* Shared interrupt */ | ||
3233 | goto none; | ||
3234 | } | ||
3235 | |||
3236 | /* We disable the hardware interrupt here just to prevent unneeded | ||
3237 | * calls to be made. We disable this again within the actual | ||
3238 | * work tasklet, so if another part of the code re-enables the | ||
3239 | * interrupt, that is fine */ | ||
3240 | ipw2100_disable_interrupts(priv); | ||
3241 | |||
3242 | tasklet_schedule(&priv->irq_tasklet); | ||
3243 | spin_unlock(&priv->low_lock); | ||
3244 | |||
3245 | return IRQ_HANDLED; | ||
3246 | none: | ||
3247 | spin_unlock(&priv->low_lock); | ||
3248 | return IRQ_NONE; | ||
3249 | } | ||
3250 | |||
3251 | static int ipw2100_tx(struct ieee80211_txb *txb, struct net_device *dev) | ||
3252 | { | ||
3253 | struct ipw2100_priv *priv = ieee80211_priv(dev); | ||
3254 | struct list_head *element; | ||
3255 | struct ipw2100_tx_packet *packet; | ||
3256 | unsigned long flags; | ||
3257 | |||
3258 | spin_lock_irqsave(&priv->low_lock, flags); | ||
3259 | |||
3260 | if (!(priv->status & STATUS_ASSOCIATED)) { | ||
3261 | IPW_DEBUG_INFO("Can not transmit when not connected.\n"); | ||
3262 | priv->ieee->stats.tx_carrier_errors++; | ||
3263 | netif_stop_queue(dev); | ||
3264 | goto fail_unlock; | ||
3265 | } | ||
3266 | |||
3267 | if (list_empty(&priv->tx_free_list)) | ||
3268 | goto fail_unlock; | ||
3269 | |||
3270 | element = priv->tx_free_list.next; | ||
3271 | packet = list_entry(element, struct ipw2100_tx_packet, list); | ||
3272 | |||
3273 | packet->info.d_struct.txb = txb; | ||
3274 | |||
3275 | IPW_DEBUG_TX("Sending fragment (%d bytes):\n", | ||
3276 | txb->fragments[0]->len); | ||
3277 | printk_buf(IPW_DL_TX, txb->fragments[0]->data, | ||
3278 | txb->fragments[0]->len); | ||
3279 | |||
3280 | packet->jiffy_start = jiffies; | ||
3281 | |||
3282 | list_del(element); | ||
3283 | DEC_STAT(&priv->tx_free_stat); | ||
3284 | |||
3285 | list_add_tail(element, &priv->tx_pend_list); | ||
3286 | INC_STAT(&priv->tx_pend_stat); | ||
3287 | |||
3288 | X__ipw2100_tx_send_data(priv); | ||
3289 | |||
3290 | spin_unlock_irqrestore(&priv->low_lock, flags); | ||
3291 | return 0; | ||
3292 | |||
3293 | fail_unlock: | ||
3294 | netif_stop_queue(dev); | ||
3295 | spin_unlock_irqrestore(&priv->low_lock, flags); | ||
3296 | return 1; | ||
3297 | } | ||
3298 | |||
3299 | |||
3300 | static int ipw2100_msg_allocate(struct ipw2100_priv *priv) | ||
3301 | { | ||
3302 | int i, j, err = -EINVAL; | ||
3303 | void *v; | ||
3304 | dma_addr_t p; | ||
3305 | |||
3306 | priv->msg_buffers = (struct ipw2100_tx_packet *)kmalloc( | ||
3307 | IPW_COMMAND_POOL_SIZE * sizeof(struct ipw2100_tx_packet), | ||
3308 | GFP_KERNEL); | ||
3309 | if (!priv->msg_buffers) { | ||
3310 | IPW_DEBUG_ERROR("%s: PCI alloc failed for msg " | ||
3311 | "buffers.\n", priv->net_dev->name); | ||
3312 | return -ENOMEM; | ||
3313 | } | ||
3314 | |||
3315 | for (i = 0; i < IPW_COMMAND_POOL_SIZE; i++) { | ||
3316 | v = pci_alloc_consistent( | ||
3317 | priv->pci_dev, | ||
3318 | sizeof(struct ipw2100_cmd_header), | ||
3319 | &p); | ||
3320 | if (!v) { | ||
3321 | IPW_DEBUG_ERROR( | ||
3322 | "%s: PCI alloc failed for msg " | ||
3323 | "buffers.\n", | ||
3324 | priv->net_dev->name); | ||
3325 | err = -ENOMEM; | ||
3326 | break; | ||
3327 | } | ||
3328 | |||
3329 | memset(v, 0, sizeof(struct ipw2100_cmd_header)); | ||
3330 | |||
3331 | priv->msg_buffers[i].type = COMMAND; | ||
3332 | priv->msg_buffers[i].info.c_struct.cmd = | ||
3333 | (struct ipw2100_cmd_header*)v; | ||
3334 | priv->msg_buffers[i].info.c_struct.cmd_phys = p; | ||
3335 | } | ||
3336 | |||
3337 | if (i == IPW_COMMAND_POOL_SIZE) | ||
3338 | return 0; | ||
3339 | |||
3340 | for (j = 0; j < i; j++) { | ||
3341 | pci_free_consistent( | ||
3342 | priv->pci_dev, | ||
3343 | sizeof(struct ipw2100_cmd_header), | ||
3344 | priv->msg_buffers[j].info.c_struct.cmd, | ||
3345 | priv->msg_buffers[j].info.c_struct.cmd_phys); | ||
3346 | } | ||
3347 | |||
3348 | kfree(priv->msg_buffers); | ||
3349 | priv->msg_buffers = NULL; | ||
3350 | |||
3351 | return err; | ||
3352 | } | ||
3353 | |||
3354 | static int ipw2100_msg_initialize(struct ipw2100_priv *priv) | ||
3355 | { | ||
3356 | int i; | ||
3357 | |||
3358 | INIT_LIST_HEAD(&priv->msg_free_list); | ||
3359 | INIT_LIST_HEAD(&priv->msg_pend_list); | ||
3360 | |||
3361 | for (i = 0; i < IPW_COMMAND_POOL_SIZE; i++) | ||
3362 | list_add_tail(&priv->msg_buffers[i].list, &priv->msg_free_list); | ||
3363 | SET_STAT(&priv->msg_free_stat, i); | ||
3364 | |||
3365 | return 0; | ||
3366 | } | ||
3367 | |||
3368 | static void ipw2100_msg_free(struct ipw2100_priv *priv) | ||
3369 | { | ||
3370 | int i; | ||
3371 | |||
3372 | if (!priv->msg_buffers) | ||
3373 | return; | ||
3374 | |||
3375 | for (i = 0; i < IPW_COMMAND_POOL_SIZE; i++) { | ||
3376 | pci_free_consistent(priv->pci_dev, | ||
3377 | sizeof(struct ipw2100_cmd_header), | ||
3378 | priv->msg_buffers[i].info.c_struct.cmd, | ||
3379 | priv->msg_buffers[i].info.c_struct.cmd_phys); | ||
3380 | } | ||
3381 | |||
3382 | kfree(priv->msg_buffers); | ||
3383 | priv->msg_buffers = NULL; | ||
3384 | } | ||
3385 | |||
3386 | static ssize_t show_pci(struct device *d, char *buf) | ||
3387 | { | ||
3388 | struct pci_dev *pci_dev = container_of(d, struct pci_dev, dev); | ||
3389 | char *out = buf; | ||
3390 | int i, j; | ||
3391 | u32 val; | ||
3392 | |||
3393 | for (i = 0; i < 16; i++) { | ||
3394 | out += sprintf(out, "[%08X] ", i * 16); | ||
3395 | for (j = 0; j < 16; j += 4) { | ||
3396 | pci_read_config_dword(pci_dev, i * 16 + j, &val); | ||
3397 | out += sprintf(out, "%08X ", val); | ||
3398 | } | ||
3399 | out += sprintf(out, "\n"); | ||
3400 | } | ||
3401 | |||
3402 | return out - buf; | ||
3403 | } | ||
3404 | static DEVICE_ATTR(pci, S_IRUGO, show_pci, NULL); | ||
3405 | |||
3406 | static ssize_t show_cfg(struct device *d, char *buf) | ||
3407 | { | ||
3408 | struct ipw2100_priv *p = (struct ipw2100_priv *)d->driver_data; | ||
3409 | return sprintf(buf, "0x%08x\n", (int)p->config); | ||
3410 | } | ||
3411 | static DEVICE_ATTR(cfg, S_IRUGO, show_cfg, NULL); | ||
3412 | |||
3413 | static ssize_t show_status(struct device *d, char *buf) | ||
3414 | { | ||
3415 | struct ipw2100_priv *p = (struct ipw2100_priv *)d->driver_data; | ||
3416 | return sprintf(buf, "0x%08x\n", (int)p->status); | ||
3417 | } | ||
3418 | static DEVICE_ATTR(status, S_IRUGO, show_status, NULL); | ||
3419 | |||
3420 | static ssize_t show_capability(struct device *d, char *buf) | ||
3421 | { | ||
3422 | struct ipw2100_priv *p = (struct ipw2100_priv *)d->driver_data; | ||
3423 | return sprintf(buf, "0x%08x\n", (int)p->capability); | ||
3424 | } | ||
3425 | static DEVICE_ATTR(capability, S_IRUGO, show_capability, NULL); | ||
3426 | |||
3427 | |||
3428 | #define IPW2100_REG(x) { IPW_ ##x, #x } | ||
3429 | const struct { | ||
3430 | u32 addr; | ||
3431 | const char *name; | ||
3432 | } hw_data[] = { | ||
3433 | IPW2100_REG(REG_GP_CNTRL), | ||
3434 | IPW2100_REG(REG_GPIO), | ||
3435 | IPW2100_REG(REG_INTA), | ||
3436 | IPW2100_REG(REG_INTA_MASK), | ||
3437 | IPW2100_REG(REG_RESET_REG), | ||
3438 | }; | ||
3439 | #define IPW2100_NIC(x, s) { x, #x, s } | ||
3440 | const struct { | ||
3441 | u32 addr; | ||
3442 | const char *name; | ||
3443 | size_t size; | ||
3444 | } nic_data[] = { | ||
3445 | IPW2100_NIC(IPW2100_CONTROL_REG, 2), | ||
3446 | IPW2100_NIC(0x210014, 1), | ||
3447 | IPW2100_NIC(0x210000, 1), | ||
3448 | }; | ||
3449 | #define IPW2100_ORD(x, d) { IPW_ORD_ ##x, #x, d } | ||
3450 | const struct { | ||
3451 | u8 index; | ||
3452 | const char *name; | ||
3453 | const char *desc; | ||
3454 | } ord_data[] = { | ||
3455 | IPW2100_ORD(STAT_TX_HOST_REQUESTS, "requested Host Tx's (MSDU)"), | ||
3456 | IPW2100_ORD(STAT_TX_HOST_COMPLETE, "successful Host Tx's (MSDU)"), | ||
3457 | IPW2100_ORD(STAT_TX_DIR_DATA, "successful Directed Tx's (MSDU)"), | ||
3458 | IPW2100_ORD(STAT_TX_DIR_DATA1, "successful Directed Tx's (MSDU) @ 1MB"), | ||
3459 | IPW2100_ORD(STAT_TX_DIR_DATA2, "successful Directed Tx's (MSDU) @ 2MB"), | ||
3460 | IPW2100_ORD(STAT_TX_DIR_DATA5_5, "successful Directed Tx's (MSDU) @ 5_5MB"), | ||
3461 | IPW2100_ORD(STAT_TX_DIR_DATA11, "successful Directed Tx's (MSDU) @ 11MB"), | ||
3462 | IPW2100_ORD(STAT_TX_NODIR_DATA1, "successful Non_Directed Tx's (MSDU) @ 1MB"), | ||
3463 | IPW2100_ORD(STAT_TX_NODIR_DATA2, "successful Non_Directed Tx's (MSDU) @ 2MB"), | ||
3464 | IPW2100_ORD(STAT_TX_NODIR_DATA5_5, "successful Non_Directed Tx's (MSDU) @ 5.5MB"), | ||
3465 | IPW2100_ORD(STAT_TX_NODIR_DATA11, "successful Non_Directed Tx's (MSDU) @ 11MB"), | ||
3466 | IPW2100_ORD(STAT_NULL_DATA, "successful NULL data Tx's"), | ||
3467 | IPW2100_ORD(STAT_TX_RTS, "successful Tx RTS"), | ||
3468 | IPW2100_ORD(STAT_TX_CTS, "successful Tx CTS"), | ||
3469 | IPW2100_ORD(STAT_TX_ACK, "successful Tx ACK"), | ||
3470 | IPW2100_ORD(STAT_TX_ASSN, "successful Association Tx's"), | ||
3471 | IPW2100_ORD(STAT_TX_ASSN_RESP, "successful Association response Tx's"), | ||
3472 | IPW2100_ORD(STAT_TX_REASSN, "successful Reassociation Tx's"), | ||
3473 | IPW2100_ORD(STAT_TX_REASSN_RESP, "successful Reassociation response Tx's"), | ||
3474 | IPW2100_ORD(STAT_TX_PROBE, "probes successfully transmitted"), | ||
3475 | IPW2100_ORD(STAT_TX_PROBE_RESP, "probe responses successfully transmitted"), | ||
3476 | IPW2100_ORD(STAT_TX_BEACON, "tx beacon"), | ||
3477 | IPW2100_ORD(STAT_TX_ATIM, "Tx ATIM"), | ||
3478 | IPW2100_ORD(STAT_TX_DISASSN, "successful Disassociation TX"), | ||
3479 | IPW2100_ORD(STAT_TX_AUTH, "successful Authentication Tx"), | ||
3480 | IPW2100_ORD(STAT_TX_DEAUTH, "successful Deauthentication TX"), | ||
3481 | IPW2100_ORD(STAT_TX_TOTAL_BYTES, "Total successful Tx data bytes"), | ||
3482 | IPW2100_ORD(STAT_TX_RETRIES, "Tx retries"), | ||
3483 | IPW2100_ORD(STAT_TX_RETRY1, "Tx retries at 1MBPS"), | ||
3484 | IPW2100_ORD(STAT_TX_RETRY2, "Tx retries at 2MBPS"), | ||
3485 | IPW2100_ORD(STAT_TX_RETRY5_5, "Tx retries at 5.5MBPS"), | ||
3486 | IPW2100_ORD(STAT_TX_RETRY11, "Tx retries at 11MBPS"), | ||
3487 | IPW2100_ORD(STAT_TX_FAILURES, "Tx Failures"), | ||
3488 | IPW2100_ORD(STAT_TX_MAX_TRIES_IN_HOP,"times max tries in a hop failed"), | ||
3489 | IPW2100_ORD(STAT_TX_DISASSN_FAIL, "times disassociation failed"), | ||
3490 | IPW2100_ORD(STAT_TX_ERR_CTS, "missed/bad CTS frames"), | ||
3491 | IPW2100_ORD(STAT_TX_ERR_ACK, "tx err due to acks"), | ||
3492 | IPW2100_ORD(STAT_RX_HOST, "packets passed to host"), | ||
3493 | IPW2100_ORD(STAT_RX_DIR_DATA, "directed packets"), | ||
3494 | IPW2100_ORD(STAT_RX_DIR_DATA1, "directed packets at 1MB"), | ||
3495 | IPW2100_ORD(STAT_RX_DIR_DATA2, "directed packets at 2MB"), | ||
3496 | IPW2100_ORD(STAT_RX_DIR_DATA5_5, "directed packets at 5.5MB"), | ||
3497 | IPW2100_ORD(STAT_RX_DIR_DATA11, "directed packets at 11MB"), | ||
3498 | IPW2100_ORD(STAT_RX_NODIR_DATA,"nondirected packets"), | ||
3499 | IPW2100_ORD(STAT_RX_NODIR_DATA1, "nondirected packets at 1MB"), | ||
3500 | IPW2100_ORD(STAT_RX_NODIR_DATA2, "nondirected packets at 2MB"), | ||
3501 | IPW2100_ORD(STAT_RX_NODIR_DATA5_5, "nondirected packets at 5.5MB"), | ||
3502 | IPW2100_ORD(STAT_RX_NODIR_DATA11, "nondirected packets at 11MB"), | ||
3503 | IPW2100_ORD(STAT_RX_NULL_DATA, "null data rx's"), | ||
3504 | IPW2100_ORD(STAT_RX_RTS, "Rx RTS"), | ||
3505 | IPW2100_ORD(STAT_RX_CTS, "Rx CTS"), | ||
3506 | IPW2100_ORD(STAT_RX_ACK, "Rx ACK"), | ||
3507 | IPW2100_ORD(STAT_RX_CFEND, "Rx CF End"), | ||
3508 | IPW2100_ORD(STAT_RX_CFEND_ACK, "Rx CF End + CF Ack"), | ||
3509 | IPW2100_ORD(STAT_RX_ASSN, "Association Rx's"), | ||
3510 | IPW2100_ORD(STAT_RX_ASSN_RESP, "Association response Rx's"), | ||
3511 | IPW2100_ORD(STAT_RX_REASSN, "Reassociation Rx's"), | ||
3512 | IPW2100_ORD(STAT_RX_REASSN_RESP, "Reassociation response Rx's"), | ||
3513 | IPW2100_ORD(STAT_RX_PROBE, "probe Rx's"), | ||
3514 | IPW2100_ORD(STAT_RX_PROBE_RESP, "probe response Rx's"), | ||
3515 | IPW2100_ORD(STAT_RX_BEACON, "Rx beacon"), | ||
3516 | IPW2100_ORD(STAT_RX_ATIM, "Rx ATIM"), | ||
3517 | IPW2100_ORD(STAT_RX_DISASSN, "disassociation Rx"), | ||
3518 | IPW2100_ORD(STAT_RX_AUTH, "authentication Rx"), | ||
3519 | IPW2100_ORD(STAT_RX_DEAUTH, "deauthentication Rx"), | ||
3520 | IPW2100_ORD(STAT_RX_TOTAL_BYTES,"Total rx data bytes received"), | ||
3521 | IPW2100_ORD(STAT_RX_ERR_CRC, "packets with Rx CRC error"), | ||
3522 | IPW2100_ORD(STAT_RX_ERR_CRC1, "Rx CRC errors at 1MB"), | ||
3523 | IPW2100_ORD(STAT_RX_ERR_CRC2, "Rx CRC errors at 2MB"), | ||
3524 | IPW2100_ORD(STAT_RX_ERR_CRC5_5, "Rx CRC errors at 5.5MB"), | ||
3525 | IPW2100_ORD(STAT_RX_ERR_CRC11, "Rx CRC errors at 11MB"), | ||
3526 | IPW2100_ORD(STAT_RX_DUPLICATE1, "duplicate rx packets at 1MB"), | ||
3527 | IPW2100_ORD(STAT_RX_DUPLICATE2, "duplicate rx packets at 2MB"), | ||
3528 | IPW2100_ORD(STAT_RX_DUPLICATE5_5, "duplicate rx packets at 5.5MB"), | ||
3529 | IPW2100_ORD(STAT_RX_DUPLICATE11, "duplicate rx packets at 11MB"), | ||
3530 | IPW2100_ORD(STAT_RX_DUPLICATE, "duplicate rx packets"), | ||
3531 | IPW2100_ORD(PERS_DB_LOCK, "locking fw permanent db"), | ||
3532 | IPW2100_ORD(PERS_DB_SIZE, "size of fw permanent db"), | ||
3533 | IPW2100_ORD(PERS_DB_ADDR, "address of fw permanent db"), | ||
3534 | IPW2100_ORD(STAT_RX_INVALID_PROTOCOL, "rx frames with invalid protocol"), | ||
3535 | IPW2100_ORD(SYS_BOOT_TIME, "Boot time"), | ||
3536 | IPW2100_ORD(STAT_RX_NO_BUFFER, "rx frames rejected due to no buffer"), | ||
3537 | IPW2100_ORD(STAT_RX_MISSING_FRAG, "rx frames dropped due to missing fragment"), | ||
3538 | IPW2100_ORD(STAT_RX_ORPHAN_FRAG, "rx frames dropped due to non-sequential fragment"), | ||
3539 | IPW2100_ORD(STAT_RX_ORPHAN_FRAME, "rx frames dropped due to unmatched 1st frame"), | ||
3540 | IPW2100_ORD(STAT_RX_FRAG_AGEOUT, "rx frames dropped due to uncompleted frame"), | ||
3541 | IPW2100_ORD(STAT_RX_ICV_ERRORS, "ICV errors during decryption"), | ||
3542 | IPW2100_ORD(STAT_PSP_SUSPENSION,"times adapter suspended"), | ||
3543 | IPW2100_ORD(STAT_PSP_BCN_TIMEOUT, "beacon timeout"), | ||
3544 | IPW2100_ORD(STAT_PSP_POLL_TIMEOUT, "poll response timeouts"), | ||
3545 | IPW2100_ORD(STAT_PSP_NONDIR_TIMEOUT, "timeouts waiting for last {broad,multi}cast pkt"), | ||
3546 | IPW2100_ORD(STAT_PSP_RX_DTIMS, "PSP DTIMs received"), | ||
3547 | IPW2100_ORD(STAT_PSP_RX_TIMS, "PSP TIMs received"), | ||
3548 | IPW2100_ORD(STAT_PSP_STATION_ID,"PSP Station ID"), | ||
3549 | IPW2100_ORD(LAST_ASSN_TIME, "RTC time of last association"), | ||
3550 | IPW2100_ORD(STAT_PERCENT_MISSED_BCNS,"current calculation of % missed beacons"), | ||
3551 | IPW2100_ORD(STAT_PERCENT_RETRIES,"current calculation of % missed tx retries"), | ||
3552 | IPW2100_ORD(ASSOCIATED_AP_PTR, "0 if not associated, else pointer to AP table entry"), | ||
3553 | IPW2100_ORD(AVAILABLE_AP_CNT, "AP's decsribed in the AP table"), | ||
3554 | IPW2100_ORD(AP_LIST_PTR, "Ptr to list of available APs"), | ||
3555 | IPW2100_ORD(STAT_AP_ASSNS, "associations"), | ||
3556 | IPW2100_ORD(STAT_ASSN_FAIL, "association failures"), | ||
3557 | IPW2100_ORD(STAT_ASSN_RESP_FAIL,"failures due to response fail"), | ||
3558 | IPW2100_ORD(STAT_FULL_SCANS, "full scans"), | ||
3559 | IPW2100_ORD(CARD_DISABLED, "Card Disabled"), | ||
3560 | IPW2100_ORD(STAT_ROAM_INHIBIT, "times roaming was inhibited due to activity"), | ||
3561 | IPW2100_ORD(RSSI_AT_ASSN, "RSSI of associated AP at time of association"), | ||
3562 | IPW2100_ORD(STAT_ASSN_CAUSE1, "reassociation: no probe response or TX on hop"), | ||
3563 | IPW2100_ORD(STAT_ASSN_CAUSE2, "reassociation: poor tx/rx quality"), | ||
3564 | IPW2100_ORD(STAT_ASSN_CAUSE3, "reassociation: tx/rx quality (excessive AP load"), | ||
3565 | IPW2100_ORD(STAT_ASSN_CAUSE4, "reassociation: AP RSSI level"), | ||
3566 | IPW2100_ORD(STAT_ASSN_CAUSE5, "reassociations due to load leveling"), | ||
3567 | IPW2100_ORD(STAT_AUTH_FAIL, "times authentication failed"), | ||
3568 | IPW2100_ORD(STAT_AUTH_RESP_FAIL,"times authentication response failed"), | ||
3569 | IPW2100_ORD(STATION_TABLE_CNT, "entries in association table"), | ||
3570 | IPW2100_ORD(RSSI_AVG_CURR, "Current avg RSSI"), | ||
3571 | IPW2100_ORD(POWER_MGMT_MODE, "Power mode - 0=CAM, 1=PSP"), | ||
3572 | IPW2100_ORD(COUNTRY_CODE, "IEEE country code as recv'd from beacon"), | ||
3573 | IPW2100_ORD(COUNTRY_CHANNELS, "channels suported by country"), | ||
3574 | IPW2100_ORD(RESET_CNT, "adapter resets (warm)"), | ||
3575 | IPW2100_ORD(BEACON_INTERVAL, "Beacon interval"), | ||
3576 | IPW2100_ORD(ANTENNA_DIVERSITY, "TRUE if antenna diversity is disabled"), | ||
3577 | IPW2100_ORD(DTIM_PERIOD, "beacon intervals between DTIMs"), | ||
3578 | IPW2100_ORD(OUR_FREQ, "current radio freq lower digits - channel ID"), | ||
3579 | IPW2100_ORD(RTC_TIME, "current RTC time"), | ||
3580 | IPW2100_ORD(PORT_TYPE, "operating mode"), | ||
3581 | IPW2100_ORD(CURRENT_TX_RATE, "current tx rate"), | ||
3582 | IPW2100_ORD(SUPPORTED_RATES, "supported tx rates"), | ||
3583 | IPW2100_ORD(ATIM_WINDOW, "current ATIM Window"), | ||
3584 | IPW2100_ORD(BASIC_RATES, "basic tx rates"), | ||
3585 | IPW2100_ORD(NIC_HIGHEST_RATE, "NIC highest tx rate"), | ||
3586 | IPW2100_ORD(AP_HIGHEST_RATE, "AP highest tx rate"), | ||
3587 | IPW2100_ORD(CAPABILITIES, "Management frame capability field"), | ||
3588 | IPW2100_ORD(AUTH_TYPE, "Type of authentication"), | ||
3589 | IPW2100_ORD(RADIO_TYPE, "Adapter card platform type"), | ||
3590 | IPW2100_ORD(RTS_THRESHOLD, "Min packet length for RTS handshaking"), | ||
3591 | IPW2100_ORD(INT_MODE, "International mode"), | ||
3592 | IPW2100_ORD(FRAGMENTATION_THRESHOLD, "protocol frag threshold"), | ||
3593 | IPW2100_ORD(EEPROM_SRAM_DB_BLOCK_START_ADDRESS, "EEPROM offset in SRAM"), | ||
3594 | IPW2100_ORD(EEPROM_SRAM_DB_BLOCK_SIZE, "EEPROM size in SRAM"), | ||
3595 | IPW2100_ORD(EEPROM_SKU_CAPABILITY, "EEPROM SKU Capability"), | ||
3596 | IPW2100_ORD(EEPROM_IBSS_11B_CHANNELS, "EEPROM IBSS 11b channel set"), | ||
3597 | IPW2100_ORD(MAC_VERSION, "MAC Version"), | ||
3598 | IPW2100_ORD(MAC_REVISION, "MAC Revision"), | ||
3599 | IPW2100_ORD(RADIO_VERSION, "Radio Version"), | ||
3600 | IPW2100_ORD(NIC_MANF_DATE_TIME, "MANF Date/Time STAMP"), | ||
3601 | IPW2100_ORD(UCODE_VERSION, "Ucode Version"), | ||
3602 | }; | ||
3603 | |||
3604 | |||
3605 | static ssize_t show_registers(struct device *d, char *buf) | ||
3606 | { | ||
3607 | int i; | ||
3608 | struct ipw2100_priv *priv = dev_get_drvdata(d); | ||
3609 | struct net_device *dev = priv->net_dev; | ||
3610 | char * out = buf; | ||
3611 | u32 val = 0; | ||
3612 | |||
3613 | out += sprintf(out, "%30s [Address ] : Hex\n", "Register"); | ||
3614 | |||
3615 | for (i = 0; i < (sizeof(hw_data) / sizeof(*hw_data)); i++) { | ||
3616 | read_register(dev, hw_data[i].addr, &val); | ||
3617 | out += sprintf(out, "%30s [%08X] : %08X\n", | ||
3618 | hw_data[i].name, hw_data[i].addr, val); | ||
3619 | } | ||
3620 | |||
3621 | return out - buf; | ||
3622 | } | ||
3623 | static DEVICE_ATTR(registers, S_IRUGO, show_registers, NULL); | ||
3624 | |||
3625 | |||
3626 | static ssize_t show_hardware(struct device *d, char *buf) | ||
3627 | { | ||
3628 | struct ipw2100_priv *priv = dev_get_drvdata(d); | ||
3629 | struct net_device *dev = priv->net_dev; | ||
3630 | char * out = buf; | ||
3631 | int i; | ||
3632 | |||
3633 | out += sprintf(out, "%30s [Address ] : Hex\n", "NIC entry"); | ||
3634 | |||
3635 | for (i = 0; i < (sizeof(nic_data) / sizeof(*nic_data)); i++) { | ||
3636 | u8 tmp8; | ||
3637 | u16 tmp16; | ||
3638 | u32 tmp32; | ||
3639 | |||
3640 | switch (nic_data[i].size) { | ||
3641 | case 1: | ||
3642 | read_nic_byte(dev, nic_data[i].addr, &tmp8); | ||
3643 | out += sprintf(out, "%30s [%08X] : %02X\n", | ||
3644 | nic_data[i].name, nic_data[i].addr, | ||
3645 | tmp8); | ||
3646 | break; | ||
3647 | case 2: | ||
3648 | read_nic_word(dev, nic_data[i].addr, &tmp16); | ||
3649 | out += sprintf(out, "%30s [%08X] : %04X\n", | ||
3650 | nic_data[i].name, nic_data[i].addr, | ||
3651 | tmp16); | ||
3652 | break; | ||
3653 | case 4: | ||
3654 | read_nic_dword(dev, nic_data[i].addr, &tmp32); | ||
3655 | out += sprintf(out, "%30s [%08X] : %08X\n", | ||
3656 | nic_data[i].name, nic_data[i].addr, | ||
3657 | tmp32); | ||
3658 | break; | ||
3659 | } | ||
3660 | } | ||
3661 | return out - buf; | ||
3662 | } | ||
3663 | static DEVICE_ATTR(hardware, S_IRUGO, show_hardware, NULL); | ||
3664 | |||
3665 | |||
3666 | static ssize_t show_memory(struct device *d, char *buf) | ||
3667 | { | ||
3668 | struct ipw2100_priv *priv = dev_get_drvdata(d); | ||
3669 | struct net_device *dev = priv->net_dev; | ||
3670 | static unsigned long loop = 0; | ||
3671 | int len = 0; | ||
3672 | u32 buffer[4]; | ||
3673 | int i; | ||
3674 | char line[81]; | ||
3675 | |||
3676 | if (loop >= 0x30000) | ||
3677 | loop = 0; | ||
3678 | |||
3679 | /* sysfs provides us PAGE_SIZE buffer */ | ||
3680 | while (len < PAGE_SIZE - 128 && loop < 0x30000) { | ||
3681 | |||
3682 | if (priv->snapshot[0]) for (i = 0; i < 4; i++) | ||
3683 | buffer[i] = *(u32 *)SNAPSHOT_ADDR(loop + i * 4); | ||
3684 | else for (i = 0; i < 4; i++) | ||
3685 | read_nic_dword(dev, loop + i * 4, &buffer[i]); | ||
3686 | |||
3687 | if (priv->dump_raw) | ||
3688 | len += sprintf(buf + len, | ||
3689 | "%c%c%c%c" | ||
3690 | "%c%c%c%c" | ||
3691 | "%c%c%c%c" | ||
3692 | "%c%c%c%c", | ||
3693 | ((u8*)buffer)[0x0], | ||
3694 | ((u8*)buffer)[0x1], | ||
3695 | ((u8*)buffer)[0x2], | ||
3696 | ((u8*)buffer)[0x3], | ||
3697 | ((u8*)buffer)[0x4], | ||
3698 | ((u8*)buffer)[0x5], | ||
3699 | ((u8*)buffer)[0x6], | ||
3700 | ((u8*)buffer)[0x7], | ||
3701 | ((u8*)buffer)[0x8], | ||
3702 | ((u8*)buffer)[0x9], | ||
3703 | ((u8*)buffer)[0xa], | ||
3704 | ((u8*)buffer)[0xb], | ||
3705 | ((u8*)buffer)[0xc], | ||
3706 | ((u8*)buffer)[0xd], | ||
3707 | ((u8*)buffer)[0xe], | ||
3708 | ((u8*)buffer)[0xf]); | ||
3709 | else | ||
3710 | len += sprintf(buf + len, "%s\n", | ||
3711 | snprint_line(line, sizeof(line), | ||
3712 | (u8*)buffer, 16, loop)); | ||
3713 | loop += 16; | ||
3714 | } | ||
3715 | |||
3716 | return len; | ||
3717 | } | ||
3718 | |||
3719 | static ssize_t store_memory(struct device *d, const char *buf, size_t count) | ||
3720 | { | ||
3721 | struct ipw2100_priv *priv = dev_get_drvdata(d); | ||
3722 | struct net_device *dev = priv->net_dev; | ||
3723 | const char *p = buf; | ||
3724 | |||
3725 | if (count < 1) | ||
3726 | return count; | ||
3727 | |||
3728 | if (p[0] == '1' || | ||
3729 | (count >= 2 && tolower(p[0]) == 'o' && tolower(p[1]) == 'n')) { | ||
3730 | IPW_DEBUG_INFO("%s: Setting memory dump to RAW mode.\n", | ||
3731 | dev->name); | ||
3732 | priv->dump_raw = 1; | ||
3733 | |||
3734 | } else if (p[0] == '0' || (count >= 2 && tolower(p[0]) == 'o' && | ||
3735 | tolower(p[1]) == 'f')) { | ||
3736 | IPW_DEBUG_INFO("%s: Setting memory dump to HEX mode.\n", | ||
3737 | dev->name); | ||
3738 | priv->dump_raw = 0; | ||
3739 | |||
3740 | } else if (tolower(p[0]) == 'r') { | ||
3741 | IPW_DEBUG_INFO("%s: Resetting firmware snapshot.\n", | ||
3742 | dev->name); | ||
3743 | ipw2100_snapshot_free(priv); | ||
3744 | |||
3745 | } else | ||
3746 | IPW_DEBUG_INFO("%s: Usage: 0|on = HEX, 1|off = RAW, " | ||
3747 | "reset = clear memory snapshot\n", | ||
3748 | dev->name); | ||
3749 | |||
3750 | return count; | ||
3751 | } | ||
3752 | static DEVICE_ATTR(memory, S_IWUSR|S_IRUGO, show_memory, store_memory); | ||
3753 | |||
3754 | |||
3755 | static ssize_t show_ordinals(struct device *d, char *buf) | ||
3756 | { | ||
3757 | struct ipw2100_priv *priv = dev_get_drvdata(d); | ||
3758 | u32 val = 0; | ||
3759 | int len = 0; | ||
3760 | u32 val_len; | ||
3761 | static int loop = 0; | ||
3762 | |||
3763 | if (loop >= sizeof(ord_data) / sizeof(*ord_data)) | ||
3764 | loop = 0; | ||
3765 | |||
3766 | /* sysfs provides us PAGE_SIZE buffer */ | ||
3767 | while (len < PAGE_SIZE - 128 && | ||
3768 | loop < (sizeof(ord_data) / sizeof(*ord_data))) { | ||
3769 | |||
3770 | val_len = sizeof(u32); | ||
3771 | |||
3772 | if (ipw2100_get_ordinal(priv, ord_data[loop].index, &val, | ||
3773 | &val_len)) | ||
3774 | len += sprintf(buf + len, "[0x%02X] = ERROR %s\n", | ||
3775 | ord_data[loop].index, | ||
3776 | ord_data[loop].desc); | ||
3777 | else | ||
3778 | len += sprintf(buf + len, "[0x%02X] = 0x%08X %s\n", | ||
3779 | ord_data[loop].index, val, | ||
3780 | ord_data[loop].desc); | ||
3781 | loop++; | ||
3782 | } | ||
3783 | |||
3784 | return len; | ||
3785 | } | ||
3786 | static DEVICE_ATTR(ordinals, S_IRUGO, show_ordinals, NULL); | ||
3787 | |||
3788 | |||
3789 | static ssize_t show_stats(struct device *d, char *buf) | ||
3790 | { | ||
3791 | struct ipw2100_priv *priv = dev_get_drvdata(d); | ||
3792 | char * out = buf; | ||
3793 | |||
3794 | out += sprintf(out, "interrupts: %d {tx: %d, rx: %d, other: %d}\n", | ||
3795 | priv->interrupts, priv->tx_interrupts, | ||
3796 | priv->rx_interrupts, priv->inta_other); | ||
3797 | out += sprintf(out, "firmware resets: %d\n", priv->resets); | ||
3798 | out += sprintf(out, "firmware hangs: %d\n", priv->hangs); | ||
3799 | #ifdef CONFIG_IPW_DEBUG | ||
3800 | out += sprintf(out, "packet mismatch image: %s\n", | ||
3801 | priv->snapshot[0] ? "YES" : "NO"); | ||
3802 | #endif | ||
3803 | |||
3804 | return out - buf; | ||
3805 | } | ||
3806 | static DEVICE_ATTR(stats, S_IRUGO, show_stats, NULL); | ||
3807 | |||
3808 | |||
3809 | int ipw2100_switch_mode(struct ipw2100_priv *priv, u32 mode) | ||
3810 | { | ||
3811 | int err; | ||
3812 | |||
3813 | if (mode == priv->ieee->iw_mode) | ||
3814 | return 0; | ||
3815 | |||
3816 | err = ipw2100_disable_adapter(priv); | ||
3817 | if (err) { | ||
3818 | IPW_DEBUG_ERROR("%s: Could not disable adapter %d\n", | ||
3819 | priv->net_dev->name, err); | ||
3820 | return err; | ||
3821 | } | ||
3822 | |||
3823 | switch (mode) { | ||
3824 | case IW_MODE_INFRA: | ||
3825 | priv->net_dev->type = ARPHRD_ETHER; | ||
3826 | break; | ||
3827 | case IW_MODE_ADHOC: | ||
3828 | priv->net_dev->type = ARPHRD_ETHER; | ||
3829 | break; | ||
3830 | #ifdef CONFIG_IPW2100_MONITOR | ||
3831 | case IW_MODE_MONITOR: | ||
3832 | priv->last_mode = priv->ieee->iw_mode; | ||
3833 | priv->net_dev->type = ARPHRD_IEEE80211; | ||
3834 | break; | ||
3835 | #endif /* CONFIG_IPW2100_MONITOR */ | ||
3836 | } | ||
3837 | |||
3838 | priv->ieee->iw_mode = mode; | ||
3839 | |||
3840 | #ifdef CONFIG_PM | ||
3841 | /* Indicate ipw2100_download_firmware download firmware | ||
3842 | * from disk instead of memory. */ | ||
3843 | ipw2100_firmware.version = 0; | ||
3844 | #endif | ||
3845 | |||
3846 | printk(KERN_INFO "%s: Reseting on mode change.\n", | ||
3847 | priv->net_dev->name); | ||
3848 | priv->reset_backoff = 0; | ||
3849 | schedule_reset(priv); | ||
3850 | |||
3851 | return 0; | ||
3852 | } | ||
3853 | |||
3854 | static ssize_t show_internals(struct device *d, char *buf) | ||
3855 | { | ||
3856 | struct ipw2100_priv *priv = dev_get_drvdata(d); | ||
3857 | int len = 0; | ||
3858 | |||
3859 | #define DUMP_VAR(x,y) len += sprintf(buf + len, # x ": %" # y "\n", priv-> x) | ||
3860 | |||
3861 | if (priv->status & STATUS_ASSOCIATED) | ||
3862 | len += sprintf(buf + len, "connected: %lu\n", | ||
3863 | get_seconds() - priv->connect_start); | ||
3864 | else | ||
3865 | len += sprintf(buf + len, "not connected\n"); | ||
3866 | |||
3867 | DUMP_VAR(ieee->crypt[priv->ieee->tx_keyidx], p); | ||
3868 | DUMP_VAR(status, 08lx); | ||
3869 | DUMP_VAR(config, 08lx); | ||
3870 | DUMP_VAR(capability, 08lx); | ||
3871 | |||
3872 | len += sprintf(buf + len, "last_rtc: %lu\n", (unsigned long)priv->last_rtc); | ||
3873 | |||
3874 | DUMP_VAR(fatal_error, d); | ||
3875 | DUMP_VAR(stop_hang_check, d); | ||
3876 | DUMP_VAR(stop_rf_kill, d); | ||
3877 | DUMP_VAR(messages_sent, d); | ||
3878 | |||
3879 | DUMP_VAR(tx_pend_stat.value, d); | ||
3880 | DUMP_VAR(tx_pend_stat.hi, d); | ||
3881 | |||
3882 | DUMP_VAR(tx_free_stat.value, d); | ||
3883 | DUMP_VAR(tx_free_stat.lo, d); | ||
3884 | |||
3885 | DUMP_VAR(msg_free_stat.value, d); | ||
3886 | DUMP_VAR(msg_free_stat.lo, d); | ||
3887 | |||
3888 | DUMP_VAR(msg_pend_stat.value, d); | ||
3889 | DUMP_VAR(msg_pend_stat.hi, d); | ||
3890 | |||
3891 | DUMP_VAR(fw_pend_stat.value, d); | ||
3892 | DUMP_VAR(fw_pend_stat.hi, d); | ||
3893 | |||
3894 | DUMP_VAR(txq_stat.value, d); | ||
3895 | DUMP_VAR(txq_stat.lo, d); | ||
3896 | |||
3897 | DUMP_VAR(ieee->scans, d); | ||
3898 | DUMP_VAR(reset_backoff, d); | ||
3899 | |||
3900 | return len; | ||
3901 | } | ||
3902 | static DEVICE_ATTR(internals, S_IRUGO, show_internals, NULL); | ||
3903 | |||
3904 | |||
3905 | static ssize_t show_bssinfo(struct device *d, char *buf) | ||
3906 | { | ||
3907 | struct ipw2100_priv *priv = dev_get_drvdata(d); | ||
3908 | char essid[IW_ESSID_MAX_SIZE + 1]; | ||
3909 | u8 bssid[ETH_ALEN]; | ||
3910 | u32 chan = 0; | ||
3911 | char * out = buf; | ||
3912 | int length; | ||
3913 | int ret; | ||
3914 | |||
3915 | memset(essid, 0, sizeof(essid)); | ||
3916 | memset(bssid, 0, sizeof(bssid)); | ||
3917 | |||
3918 | length = IW_ESSID_MAX_SIZE; | ||
3919 | ret = ipw2100_get_ordinal(priv, IPW_ORD_STAT_ASSN_SSID, essid, &length); | ||
3920 | if (ret) | ||
3921 | IPW_DEBUG_INFO("failed querying ordinals at line %d\n", | ||
3922 | __LINE__); | ||
3923 | |||
3924 | length = sizeof(bssid); | ||
3925 | ret = ipw2100_get_ordinal(priv, IPW_ORD_STAT_ASSN_AP_BSSID, | ||
3926 | bssid, &length); | ||
3927 | if (ret) | ||
3928 | IPW_DEBUG_INFO("failed querying ordinals at line %d\n", | ||
3929 | __LINE__); | ||
3930 | |||
3931 | length = sizeof(u32); | ||
3932 | ret = ipw2100_get_ordinal(priv, IPW_ORD_OUR_FREQ, &chan, &length); | ||
3933 | if (ret) | ||
3934 | IPW_DEBUG_INFO("failed querying ordinals at line %d\n", | ||
3935 | __LINE__); | ||
3936 | |||
3937 | out += sprintf(out, "ESSID: %s\n", essid); | ||
3938 | out += sprintf(out, "BSSID: %02x:%02x:%02x:%02x:%02x:%02x\n", | ||
3939 | bssid[0], bssid[1], bssid[2], | ||
3940 | bssid[3], bssid[4], bssid[5]); | ||
3941 | out += sprintf(out, "Channel: %d\n", chan); | ||
3942 | |||
3943 | return out - buf; | ||
3944 | } | ||
3945 | static DEVICE_ATTR(bssinfo, S_IRUGO, show_bssinfo, NULL); | ||
3946 | |||
3947 | |||
3948 | |||
3949 | |||
3950 | #ifdef CONFIG_IPW_DEBUG | ||
3951 | static ssize_t show_debug_level(struct device_driver *d, char *buf) | ||
3952 | { | ||
3953 | return sprintf(buf, "0x%08X\n", ipw2100_debug_level); | ||
3954 | } | ||
3955 | |||
3956 | static ssize_t store_debug_level(struct device_driver *d, const char *buf, | ||
3957 | size_t count) | ||
3958 | { | ||
3959 | char *p = (char *)buf; | ||
3960 | u32 val; | ||
3961 | |||
3962 | if (p[1] == 'x' || p[1] == 'X' || p[0] == 'x' || p[0] == 'X') { | ||
3963 | p++; | ||
3964 | if (p[0] == 'x' || p[0] == 'X') | ||
3965 | p++; | ||
3966 | val = simple_strtoul(p, &p, 16); | ||
3967 | } else | ||
3968 | val = simple_strtoul(p, &p, 10); | ||
3969 | if (p == buf) | ||
3970 | IPW_DEBUG_INFO(DRV_NAME | ||
3971 | ": %s is not in hex or decimal form.\n", buf); | ||
3972 | else | ||
3973 | ipw2100_debug_level = val; | ||
3974 | |||
3975 | return strnlen(buf, count); | ||
3976 | } | ||
3977 | static DRIVER_ATTR(debug_level, S_IWUSR | S_IRUGO, show_debug_level, | ||
3978 | store_debug_level); | ||
3979 | #endif /* CONFIG_IPW_DEBUG */ | ||
3980 | |||
3981 | |||
3982 | static ssize_t show_fatal_error(struct device *d, char *buf) | ||
3983 | { | ||
3984 | struct ipw2100_priv *priv = dev_get_drvdata(d); | ||
3985 | char *out = buf; | ||
3986 | int i; | ||
3987 | |||
3988 | if (priv->fatal_error) | ||
3989 | out += sprintf(out, "0x%08X\n", | ||
3990 | priv->fatal_error); | ||
3991 | else | ||
3992 | out += sprintf(out, "0\n"); | ||
3993 | |||
3994 | for (i = 1; i <= IPW2100_ERROR_QUEUE; i++) { | ||
3995 | if (!priv->fatal_errors[(priv->fatal_index - i) % | ||
3996 | IPW2100_ERROR_QUEUE]) | ||
3997 | continue; | ||
3998 | |||
3999 | out += sprintf(out, "%d. 0x%08X\n", i, | ||
4000 | priv->fatal_errors[(priv->fatal_index - i) % | ||
4001 | IPW2100_ERROR_QUEUE]); | ||
4002 | } | ||
4003 | |||
4004 | return out - buf; | ||
4005 | } | ||
4006 | |||
4007 | static ssize_t store_fatal_error(struct device *d, const char *buf, | ||
4008 | size_t count) | ||
4009 | { | ||
4010 | struct ipw2100_priv *priv = dev_get_drvdata(d); | ||
4011 | schedule_reset(priv); | ||
4012 | return count; | ||
4013 | } | ||
4014 | static DEVICE_ATTR(fatal_error, S_IWUSR|S_IRUGO, show_fatal_error, store_fatal_error); | ||
4015 | |||
4016 | |||
4017 | static ssize_t show_scan_age(struct device *d, char *buf) | ||
4018 | { | ||
4019 | struct ipw2100_priv *priv = dev_get_drvdata(d); | ||
4020 | return sprintf(buf, "%d\n", priv->ieee->scan_age); | ||
4021 | } | ||
4022 | |||
4023 | static ssize_t store_scan_age(struct device *d, const char *buf, size_t count) | ||
4024 | { | ||
4025 | struct ipw2100_priv *priv = dev_get_drvdata(d); | ||
4026 | struct net_device *dev = priv->net_dev; | ||
4027 | char buffer[] = "00000000"; | ||
4028 | unsigned long len = | ||
4029 | (sizeof(buffer) - 1) > count ? count : sizeof(buffer) - 1; | ||
4030 | unsigned long val; | ||
4031 | char *p = buffer; | ||
4032 | |||
4033 | IPW_DEBUG_INFO("enter\n"); | ||
4034 | |||
4035 | strncpy(buffer, buf, len); | ||
4036 | buffer[len] = 0; | ||
4037 | |||
4038 | if (p[1] == 'x' || p[1] == 'X' || p[0] == 'x' || p[0] == 'X') { | ||
4039 | p++; | ||
4040 | if (p[0] == 'x' || p[0] == 'X') | ||
4041 | p++; | ||
4042 | val = simple_strtoul(p, &p, 16); | ||
4043 | } else | ||
4044 | val = simple_strtoul(p, &p, 10); | ||
4045 | if (p == buffer) { | ||
4046 | IPW_DEBUG_INFO("%s: user supplied invalid value.\n", | ||
4047 | dev->name); | ||
4048 | } else { | ||
4049 | priv->ieee->scan_age = val; | ||
4050 | IPW_DEBUG_INFO("set scan_age = %u\n", priv->ieee->scan_age); | ||
4051 | } | ||
4052 | |||
4053 | IPW_DEBUG_INFO("exit\n"); | ||
4054 | return len; | ||
4055 | } | ||
4056 | static DEVICE_ATTR(scan_age, S_IWUSR | S_IRUGO, show_scan_age, store_scan_age); | ||
4057 | |||
4058 | |||
4059 | static ssize_t show_rf_kill(struct device *d, char *buf) | ||
4060 | { | ||
4061 | /* 0 - RF kill not enabled | ||
4062 | 1 - SW based RF kill active (sysfs) | ||
4063 | 2 - HW based RF kill active | ||
4064 | 3 - Both HW and SW baed RF kill active */ | ||
4065 | struct ipw2100_priv *priv = (struct ipw2100_priv *)d->driver_data; | ||
4066 | int val = ((priv->status & STATUS_RF_KILL_SW) ? 0x1 : 0x0) | | ||
4067 | (rf_kill_active(priv) ? 0x2 : 0x0); | ||
4068 | return sprintf(buf, "%i\n", val); | ||
4069 | } | ||
4070 | |||
4071 | static int ipw_radio_kill_sw(struct ipw2100_priv *priv, int disable_radio) | ||
4072 | { | ||
4073 | if ((disable_radio ? 1 : 0) == | ||
4074 | (priv->status & STATUS_RF_KILL_SW ? 1 : 0)) | ||
4075 | return 0 ; | ||
4076 | |||
4077 | IPW_DEBUG_RF_KILL("Manual SW RF Kill set to: RADIO %s\n", | ||
4078 | disable_radio ? "OFF" : "ON"); | ||
4079 | |||
4080 | down(&priv->action_sem); | ||
4081 | |||
4082 | if (disable_radio) { | ||
4083 | priv->status |= STATUS_RF_KILL_SW; | ||
4084 | ipw2100_down(priv); | ||
4085 | } else { | ||
4086 | priv->status &= ~STATUS_RF_KILL_SW; | ||
4087 | if (rf_kill_active(priv)) { | ||
4088 | IPW_DEBUG_RF_KILL("Can not turn radio back on - " | ||
4089 | "disabled by HW switch\n"); | ||
4090 | /* Make sure the RF_KILL check timer is running */ | ||
4091 | priv->stop_rf_kill = 0; | ||
4092 | cancel_delayed_work(&priv->rf_kill); | ||
4093 | queue_delayed_work(priv->workqueue, &priv->rf_kill, | ||
4094 | HZ); | ||
4095 | } else | ||
4096 | schedule_reset(priv); | ||
4097 | } | ||
4098 | |||
4099 | up(&priv->action_sem); | ||
4100 | return 1; | ||
4101 | } | ||
4102 | |||
4103 | static ssize_t store_rf_kill(struct device *d, const char *buf, size_t count) | ||
4104 | { | ||
4105 | struct ipw2100_priv *priv = dev_get_drvdata(d); | ||
4106 | ipw_radio_kill_sw(priv, buf[0] == '1'); | ||
4107 | return count; | ||
4108 | } | ||
4109 | static DEVICE_ATTR(rf_kill, S_IWUSR|S_IRUGO, show_rf_kill, store_rf_kill); | ||
4110 | |||
4111 | |||
4112 | static struct attribute *ipw2100_sysfs_entries[] = { | ||
4113 | &dev_attr_hardware.attr, | ||
4114 | &dev_attr_registers.attr, | ||
4115 | &dev_attr_ordinals.attr, | ||
4116 | &dev_attr_pci.attr, | ||
4117 | &dev_attr_stats.attr, | ||
4118 | &dev_attr_internals.attr, | ||
4119 | &dev_attr_bssinfo.attr, | ||
4120 | &dev_attr_memory.attr, | ||
4121 | &dev_attr_scan_age.attr, | ||
4122 | &dev_attr_fatal_error.attr, | ||
4123 | &dev_attr_rf_kill.attr, | ||
4124 | &dev_attr_cfg.attr, | ||
4125 | &dev_attr_status.attr, | ||
4126 | &dev_attr_capability.attr, | ||
4127 | NULL, | ||
4128 | }; | ||
4129 | |||
4130 | static struct attribute_group ipw2100_attribute_group = { | ||
4131 | .attrs = ipw2100_sysfs_entries, | ||
4132 | }; | ||
4133 | |||
4134 | |||
4135 | static int status_queue_allocate(struct ipw2100_priv *priv, int entries) | ||
4136 | { | ||
4137 | struct ipw2100_status_queue *q = &priv->status_queue; | ||
4138 | |||
4139 | IPW_DEBUG_INFO("enter\n"); | ||
4140 | |||
4141 | q->size = entries * sizeof(struct ipw2100_status); | ||
4142 | q->drv = (struct ipw2100_status *)pci_alloc_consistent( | ||
4143 | priv->pci_dev, q->size, &q->nic); | ||
4144 | if (!q->drv) { | ||
4145 | IPW_DEBUG_WARNING( | ||
4146 | "Can not allocate status queue.\n"); | ||
4147 | return -ENOMEM; | ||
4148 | } | ||
4149 | |||
4150 | memset(q->drv, 0, q->size); | ||
4151 | |||
4152 | IPW_DEBUG_INFO("exit\n"); | ||
4153 | |||
4154 | return 0; | ||
4155 | } | ||
4156 | |||
4157 | static void status_queue_free(struct ipw2100_priv *priv) | ||
4158 | { | ||
4159 | IPW_DEBUG_INFO("enter\n"); | ||
4160 | |||
4161 | if (priv->status_queue.drv) { | ||
4162 | pci_free_consistent( | ||
4163 | priv->pci_dev, priv->status_queue.size, | ||
4164 | priv->status_queue.drv, priv->status_queue.nic); | ||
4165 | priv->status_queue.drv = NULL; | ||
4166 | } | ||
4167 | |||
4168 | IPW_DEBUG_INFO("exit\n"); | ||
4169 | } | ||
4170 | |||
4171 | static int bd_queue_allocate(struct ipw2100_priv *priv, | ||
4172 | struct ipw2100_bd_queue *q, int entries) | ||
4173 | { | ||
4174 | IPW_DEBUG_INFO("enter\n"); | ||
4175 | |||
4176 | memset(q, 0, sizeof(struct ipw2100_bd_queue)); | ||
4177 | |||
4178 | q->entries = entries; | ||
4179 | q->size = entries * sizeof(struct ipw2100_bd); | ||
4180 | q->drv = pci_alloc_consistent(priv->pci_dev, q->size, &q->nic); | ||
4181 | if (!q->drv) { | ||
4182 | IPW_DEBUG_INFO("can't allocate shared memory for buffer descriptors\n"); | ||
4183 | return -ENOMEM; | ||
4184 | } | ||
4185 | memset(q->drv, 0, q->size); | ||
4186 | |||
4187 | IPW_DEBUG_INFO("exit\n"); | ||
4188 | |||
4189 | return 0; | ||
4190 | } | ||
4191 | |||
4192 | static void bd_queue_free(struct ipw2100_priv *priv, | ||
4193 | struct ipw2100_bd_queue *q) | ||
4194 | { | ||
4195 | IPW_DEBUG_INFO("enter\n"); | ||
4196 | |||
4197 | if (!q) | ||
4198 | return; | ||
4199 | |||
4200 | if (q->drv) { | ||
4201 | pci_free_consistent(priv->pci_dev, | ||
4202 | q->size, q->drv, q->nic); | ||
4203 | q->drv = NULL; | ||
4204 | } | ||
4205 | |||
4206 | IPW_DEBUG_INFO("exit\n"); | ||
4207 | } | ||
4208 | |||
4209 | static void bd_queue_initialize( | ||
4210 | struct ipw2100_priv *priv, struct ipw2100_bd_queue * q, | ||
4211 | u32 base, u32 size, u32 r, u32 w) | ||
4212 | { | ||
4213 | IPW_DEBUG_INFO("enter\n"); | ||
4214 | |||
4215 | IPW_DEBUG_INFO("initializing bd queue at virt=%p, phys=%08x\n", q->drv, q->nic); | ||
4216 | |||
4217 | write_register(priv->net_dev, base, q->nic); | ||
4218 | write_register(priv->net_dev, size, q->entries); | ||
4219 | write_register(priv->net_dev, r, q->oldest); | ||
4220 | write_register(priv->net_dev, w, q->next); | ||
4221 | |||
4222 | IPW_DEBUG_INFO("exit\n"); | ||
4223 | } | ||
4224 | |||
4225 | static void ipw2100_kill_workqueue(struct ipw2100_priv *priv) | ||
4226 | { | ||
4227 | if (priv->workqueue) { | ||
4228 | priv->stop_rf_kill = 1; | ||
4229 | priv->stop_hang_check = 1; | ||
4230 | cancel_delayed_work(&priv->reset_work); | ||
4231 | cancel_delayed_work(&priv->security_work); | ||
4232 | cancel_delayed_work(&priv->wx_event_work); | ||
4233 | cancel_delayed_work(&priv->hang_check); | ||
4234 | cancel_delayed_work(&priv->rf_kill); | ||
4235 | destroy_workqueue(priv->workqueue); | ||
4236 | priv->workqueue = NULL; | ||
4237 | } | ||
4238 | } | ||
4239 | |||
4240 | static int ipw2100_tx_allocate(struct ipw2100_priv *priv) | ||
4241 | { | ||
4242 | int i, j, err = -EINVAL; | ||
4243 | void *v; | ||
4244 | dma_addr_t p; | ||
4245 | |||
4246 | IPW_DEBUG_INFO("enter\n"); | ||
4247 | |||
4248 | err = bd_queue_allocate(priv, &priv->tx_queue, TX_QUEUE_LENGTH); | ||
4249 | if (err) { | ||
4250 | IPW_DEBUG_ERROR("%s: failed bd_queue_allocate\n", | ||
4251 | priv->net_dev->name); | ||
4252 | return err; | ||
4253 | } | ||
4254 | |||
4255 | priv->tx_buffers = (struct ipw2100_tx_packet *)kmalloc( | ||
4256 | TX_PENDED_QUEUE_LENGTH * sizeof(struct ipw2100_tx_packet), | ||
4257 | GFP_ATOMIC); | ||
4258 | if (!priv->tx_buffers) { | ||
4259 | IPW_DEBUG_ERROR("%s: alloc failed form tx buffers.\n", | ||
4260 | priv->net_dev->name); | ||
4261 | bd_queue_free(priv, &priv->tx_queue); | ||
4262 | return -ENOMEM; | ||
4263 | } | ||
4264 | |||
4265 | for (i = 0; i < TX_PENDED_QUEUE_LENGTH; i++) { | ||
4266 | v = pci_alloc_consistent( | ||
4267 | priv->pci_dev, sizeof(struct ipw2100_data_header), &p); | ||
4268 | if (!v) { | ||
4269 | IPW_DEBUG_ERROR("%s: PCI alloc failed for tx " | ||
4270 | "buffers.\n", priv->net_dev->name); | ||
4271 | err = -ENOMEM; | ||
4272 | break; | ||
4273 | } | ||
4274 | |||
4275 | priv->tx_buffers[i].type = DATA; | ||
4276 | priv->tx_buffers[i].info.d_struct.data = (struct ipw2100_data_header*)v; | ||
4277 | priv->tx_buffers[i].info.d_struct.data_phys = p; | ||
4278 | priv->tx_buffers[i].info.d_struct.txb = NULL; | ||
4279 | } | ||
4280 | |||
4281 | if (i == TX_PENDED_QUEUE_LENGTH) | ||
4282 | return 0; | ||
4283 | |||
4284 | for (j = 0; j < i; j++) { | ||
4285 | pci_free_consistent( | ||
4286 | priv->pci_dev, | ||
4287 | sizeof(struct ipw2100_data_header), | ||
4288 | priv->tx_buffers[j].info.d_struct.data, | ||
4289 | priv->tx_buffers[j].info.d_struct.data_phys); | ||
4290 | } | ||
4291 | |||
4292 | kfree(priv->tx_buffers); | ||
4293 | priv->tx_buffers = NULL; | ||
4294 | |||
4295 | return err; | ||
4296 | } | ||
4297 | |||
4298 | static void ipw2100_tx_initialize(struct ipw2100_priv *priv) | ||
4299 | { | ||
4300 | int i; | ||
4301 | |||
4302 | IPW_DEBUG_INFO("enter\n"); | ||
4303 | |||
4304 | /* | ||
4305 | * reinitialize packet info lists | ||
4306 | */ | ||
4307 | INIT_LIST_HEAD(&priv->fw_pend_list); | ||
4308 | INIT_STAT(&priv->fw_pend_stat); | ||
4309 | |||
4310 | /* | ||
4311 | * reinitialize lists | ||
4312 | */ | ||
4313 | INIT_LIST_HEAD(&priv->tx_pend_list); | ||
4314 | INIT_LIST_HEAD(&priv->tx_free_list); | ||
4315 | INIT_STAT(&priv->tx_pend_stat); | ||
4316 | INIT_STAT(&priv->tx_free_stat); | ||
4317 | |||
4318 | for (i = 0; i < TX_PENDED_QUEUE_LENGTH; i++) { | ||
4319 | /* We simply drop any SKBs that have been queued for | ||
4320 | * transmit */ | ||
4321 | if (priv->tx_buffers[i].info.d_struct.txb) { | ||
4322 | ieee80211_txb_free(priv->tx_buffers[i].info.d_struct.txb); | ||
4323 | priv->tx_buffers[i].info.d_struct.txb = NULL; | ||
4324 | } | ||
4325 | |||
4326 | list_add_tail(&priv->tx_buffers[i].list, &priv->tx_free_list); | ||
4327 | } | ||
4328 | |||
4329 | SET_STAT(&priv->tx_free_stat, i); | ||
4330 | |||
4331 | priv->tx_queue.oldest = 0; | ||
4332 | priv->tx_queue.available = priv->tx_queue.entries; | ||
4333 | priv->tx_queue.next = 0; | ||
4334 | INIT_STAT(&priv->txq_stat); | ||
4335 | SET_STAT(&priv->txq_stat, priv->tx_queue.available); | ||
4336 | |||
4337 | bd_queue_initialize(priv, &priv->tx_queue, | ||
4338 | IPW_MEM_HOST_SHARED_TX_QUEUE_BD_BASE, | ||
4339 | IPW_MEM_HOST_SHARED_TX_QUEUE_BD_SIZE, | ||
4340 | IPW_MEM_HOST_SHARED_TX_QUEUE_READ_INDEX, | ||
4341 | IPW_MEM_HOST_SHARED_TX_QUEUE_WRITE_INDEX); | ||
4342 | |||
4343 | IPW_DEBUG_INFO("exit\n"); | ||
4344 | |||
4345 | } | ||
4346 | |||
4347 | static void ipw2100_tx_free(struct ipw2100_priv *priv) | ||
4348 | { | ||
4349 | int i; | ||
4350 | |||
4351 | IPW_DEBUG_INFO("enter\n"); | ||
4352 | |||
4353 | bd_queue_free(priv, &priv->tx_queue); | ||
4354 | |||
4355 | if (!priv->tx_buffers) | ||
4356 | return; | ||
4357 | |||
4358 | for (i = 0; i < TX_PENDED_QUEUE_LENGTH; i++) { | ||
4359 | if (priv->tx_buffers[i].info.d_struct.txb) { | ||
4360 | ieee80211_txb_free(priv->tx_buffers[i].info.d_struct.txb); | ||
4361 | priv->tx_buffers[i].info.d_struct.txb = NULL; | ||
4362 | } | ||
4363 | if (priv->tx_buffers[i].info.d_struct.data) | ||
4364 | pci_free_consistent( | ||
4365 | priv->pci_dev, | ||
4366 | sizeof(struct ipw2100_data_header), | ||
4367 | priv->tx_buffers[i].info.d_struct.data, | ||
4368 | priv->tx_buffers[i].info.d_struct.data_phys); | ||
4369 | } | ||
4370 | |||
4371 | kfree(priv->tx_buffers); | ||
4372 | priv->tx_buffers = NULL; | ||
4373 | |||
4374 | IPW_DEBUG_INFO("exit\n"); | ||
4375 | } | ||
4376 | |||
4377 | |||
4378 | |||
4379 | static int ipw2100_rx_allocate(struct ipw2100_priv *priv) | ||
4380 | { | ||
4381 | int i, j, err = -EINVAL; | ||
4382 | |||
4383 | IPW_DEBUG_INFO("enter\n"); | ||
4384 | |||
4385 | err = bd_queue_allocate(priv, &priv->rx_queue, RX_QUEUE_LENGTH); | ||
4386 | if (err) { | ||
4387 | IPW_DEBUG_INFO("failed bd_queue_allocate\n"); | ||
4388 | return err; | ||
4389 | } | ||
4390 | |||
4391 | err = status_queue_allocate(priv, RX_QUEUE_LENGTH); | ||
4392 | if (err) { | ||
4393 | IPW_DEBUG_INFO("failed status_queue_allocate\n"); | ||
4394 | bd_queue_free(priv, &priv->rx_queue); | ||
4395 | return err; | ||
4396 | } | ||
4397 | |||
4398 | /* | ||
4399 | * allocate packets | ||
4400 | */ | ||
4401 | priv->rx_buffers = (struct ipw2100_rx_packet *) | ||
4402 | kmalloc(RX_QUEUE_LENGTH * sizeof(struct ipw2100_rx_packet), | ||
4403 | GFP_KERNEL); | ||
4404 | if (!priv->rx_buffers) { | ||
4405 | IPW_DEBUG_INFO("can't allocate rx packet buffer table\n"); | ||
4406 | |||
4407 | bd_queue_free(priv, &priv->rx_queue); | ||
4408 | |||
4409 | status_queue_free(priv); | ||
4410 | |||
4411 | return -ENOMEM; | ||
4412 | } | ||
4413 | |||
4414 | for (i = 0; i < RX_QUEUE_LENGTH; i++) { | ||
4415 | struct ipw2100_rx_packet *packet = &priv->rx_buffers[i]; | ||
4416 | |||
4417 | err = ipw2100_alloc_skb(priv, packet); | ||
4418 | if (unlikely(err)) { | ||
4419 | err = -ENOMEM; | ||
4420 | break; | ||
4421 | } | ||
4422 | |||
4423 | /* The BD holds the cache aligned address */ | ||
4424 | priv->rx_queue.drv[i].host_addr = packet->dma_addr; | ||
4425 | priv->rx_queue.drv[i].buf_length = IPW_RX_NIC_BUFFER_LENGTH; | ||
4426 | priv->status_queue.drv[i].status_fields = 0; | ||
4427 | } | ||
4428 | |||
4429 | if (i == RX_QUEUE_LENGTH) | ||
4430 | return 0; | ||
4431 | |||
4432 | for (j = 0; j < i; j++) { | ||
4433 | pci_unmap_single(priv->pci_dev, priv->rx_buffers[j].dma_addr, | ||
4434 | sizeof(struct ipw2100_rx_packet), | ||
4435 | PCI_DMA_FROMDEVICE); | ||
4436 | dev_kfree_skb(priv->rx_buffers[j].skb); | ||
4437 | } | ||
4438 | |||
4439 | kfree(priv->rx_buffers); | ||
4440 | priv->rx_buffers = NULL; | ||
4441 | |||
4442 | bd_queue_free(priv, &priv->rx_queue); | ||
4443 | |||
4444 | status_queue_free(priv); | ||
4445 | |||
4446 | return err; | ||
4447 | } | ||
4448 | |||
4449 | static void ipw2100_rx_initialize(struct ipw2100_priv *priv) | ||
4450 | { | ||
4451 | IPW_DEBUG_INFO("enter\n"); | ||
4452 | |||
4453 | priv->rx_queue.oldest = 0; | ||
4454 | priv->rx_queue.available = priv->rx_queue.entries - 1; | ||
4455 | priv->rx_queue.next = priv->rx_queue.entries - 1; | ||
4456 | |||
4457 | INIT_STAT(&priv->rxq_stat); | ||
4458 | SET_STAT(&priv->rxq_stat, priv->rx_queue.available); | ||
4459 | |||
4460 | bd_queue_initialize(priv, &priv->rx_queue, | ||
4461 | IPW_MEM_HOST_SHARED_RX_BD_BASE, | ||
4462 | IPW_MEM_HOST_SHARED_RX_BD_SIZE, | ||
4463 | IPW_MEM_HOST_SHARED_RX_READ_INDEX, | ||
4464 | IPW_MEM_HOST_SHARED_RX_WRITE_INDEX); | ||
4465 | |||
4466 | /* set up the status queue */ | ||
4467 | write_register(priv->net_dev, IPW_MEM_HOST_SHARED_RX_STATUS_BASE, | ||
4468 | priv->status_queue.nic); | ||
4469 | |||
4470 | IPW_DEBUG_INFO("exit\n"); | ||
4471 | } | ||
4472 | |||
4473 | static void ipw2100_rx_free(struct ipw2100_priv *priv) | ||
4474 | { | ||
4475 | int i; | ||
4476 | |||
4477 | IPW_DEBUG_INFO("enter\n"); | ||
4478 | |||
4479 | bd_queue_free(priv, &priv->rx_queue); | ||
4480 | status_queue_free(priv); | ||
4481 | |||
4482 | if (!priv->rx_buffers) | ||
4483 | return; | ||
4484 | |||
4485 | for (i = 0; i < RX_QUEUE_LENGTH; i++) { | ||
4486 | if (priv->rx_buffers[i].rxp) { | ||
4487 | pci_unmap_single(priv->pci_dev, | ||
4488 | priv->rx_buffers[i].dma_addr, | ||
4489 | sizeof(struct ipw2100_rx), | ||
4490 | PCI_DMA_FROMDEVICE); | ||
4491 | dev_kfree_skb(priv->rx_buffers[i].skb); | ||
4492 | } | ||
4493 | } | ||
4494 | |||
4495 | kfree(priv->rx_buffers); | ||
4496 | priv->rx_buffers = NULL; | ||
4497 | |||
4498 | IPW_DEBUG_INFO("exit\n"); | ||
4499 | } | ||
4500 | |||
4501 | static int ipw2100_read_mac_address(struct ipw2100_priv *priv) | ||
4502 | { | ||
4503 | u32 length = ETH_ALEN; | ||
4504 | u8 mac[ETH_ALEN]; | ||
4505 | |||
4506 | int err; | ||
4507 | |||
4508 | err = ipw2100_get_ordinal(priv, IPW_ORD_STAT_ADAPTER_MAC, | ||
4509 | mac, &length); | ||
4510 | if (err) { | ||
4511 | IPW_DEBUG_INFO("MAC address read failed\n"); | ||
4512 | return -EIO; | ||
4513 | } | ||
4514 | IPW_DEBUG_INFO("card MAC is %02X:%02X:%02X:%02X:%02X:%02X\n", | ||
4515 | mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]); | ||
4516 | |||
4517 | memcpy(priv->net_dev->dev_addr, mac, ETH_ALEN); | ||
4518 | |||
4519 | return 0; | ||
4520 | } | ||
4521 | |||
4522 | /******************************************************************** | ||
4523 | * | ||
4524 | * Firmware Commands | ||
4525 | * | ||
4526 | ********************************************************************/ | ||
4527 | |||
4528 | int ipw2100_set_mac_address(struct ipw2100_priv *priv, int batch_mode) | ||
4529 | { | ||
4530 | struct host_command cmd = { | ||
4531 | .host_command = ADAPTER_ADDRESS, | ||
4532 | .host_command_sequence = 0, | ||
4533 | .host_command_length = ETH_ALEN | ||
4534 | }; | ||
4535 | int err; | ||
4536 | |||
4537 | IPW_DEBUG_HC("SET_MAC_ADDRESS\n"); | ||
4538 | |||
4539 | IPW_DEBUG_INFO("enter\n"); | ||
4540 | |||
4541 | if (priv->config & CFG_CUSTOM_MAC) { | ||
4542 | memcpy(cmd.host_command_parameters, priv->mac_addr, | ||
4543 | ETH_ALEN); | ||
4544 | memcpy(priv->net_dev->dev_addr, priv->mac_addr, ETH_ALEN); | ||
4545 | } else | ||
4546 | memcpy(cmd.host_command_parameters, priv->net_dev->dev_addr, | ||
4547 | ETH_ALEN); | ||
4548 | |||
4549 | err = ipw2100_hw_send_command(priv, &cmd); | ||
4550 | |||
4551 | IPW_DEBUG_INFO("exit\n"); | ||
4552 | return err; | ||
4553 | } | ||
4554 | |||
4555 | int ipw2100_set_port_type(struct ipw2100_priv *priv, u32 port_type, | ||
4556 | int batch_mode) | ||
4557 | { | ||
4558 | struct host_command cmd = { | ||
4559 | .host_command = PORT_TYPE, | ||
4560 | .host_command_sequence = 0, | ||
4561 | .host_command_length = sizeof(u32) | ||
4562 | }; | ||
4563 | int err; | ||
4564 | |||
4565 | switch (port_type) { | ||
4566 | case IW_MODE_INFRA: | ||
4567 | cmd.host_command_parameters[0] = IPW_BSS; | ||
4568 | break; | ||
4569 | case IW_MODE_ADHOC: | ||
4570 | cmd.host_command_parameters[0] = IPW_IBSS; | ||
4571 | break; | ||
4572 | } | ||
4573 | |||
4574 | IPW_DEBUG_HC("PORT_TYPE: %s\n", | ||
4575 | port_type == IPW_IBSS ? "Ad-Hoc" : "Managed"); | ||
4576 | |||
4577 | if (!batch_mode) { | ||
4578 | err = ipw2100_disable_adapter(priv); | ||
4579 | if (err) { | ||
4580 | IPW_DEBUG_ERROR("%s: Could not disable adapter %d\n", | ||
4581 | priv->net_dev->name, err); | ||
4582 | return err; | ||
4583 | } | ||
4584 | } | ||
4585 | |||
4586 | /* send cmd to firmware */ | ||
4587 | err = ipw2100_hw_send_command(priv, &cmd); | ||
4588 | |||
4589 | if (!batch_mode) | ||
4590 | ipw2100_enable_adapter(priv); | ||
4591 | |||
4592 | return err; | ||
4593 | } | ||
4594 | |||
4595 | |||
4596 | int ipw2100_set_channel(struct ipw2100_priv *priv, u32 channel, int batch_mode) | ||
4597 | { | ||
4598 | struct host_command cmd = { | ||
4599 | .host_command = CHANNEL, | ||
4600 | .host_command_sequence = 0, | ||
4601 | .host_command_length = sizeof(u32) | ||
4602 | }; | ||
4603 | int err; | ||
4604 | |||
4605 | cmd.host_command_parameters[0] = channel; | ||
4606 | |||
4607 | IPW_DEBUG_HC("CHANNEL: %d\n", channel); | ||
4608 | |||
4609 | /* If BSS then we don't support channel selection */ | ||
4610 | if (priv->ieee->iw_mode == IW_MODE_INFRA) | ||
4611 | return 0; | ||
4612 | |||
4613 | if ((channel != 0) && | ||
4614 | ((channel < REG_MIN_CHANNEL) || (channel > REG_MAX_CHANNEL))) | ||
4615 | return -EINVAL; | ||
4616 | |||
4617 | if (!batch_mode) { | ||
4618 | err = ipw2100_disable_adapter(priv); | ||
4619 | if (err) | ||
4620 | return err; | ||
4621 | } | ||
4622 | |||
4623 | err = ipw2100_hw_send_command(priv, &cmd); | ||
4624 | if (err) { | ||
4625 | IPW_DEBUG_INFO("Failed to set channel to %d", | ||
4626 | channel); | ||
4627 | return err; | ||
4628 | } | ||
4629 | |||
4630 | if (channel) | ||
4631 | priv->config |= CFG_STATIC_CHANNEL; | ||
4632 | else | ||
4633 | priv->config &= ~CFG_STATIC_CHANNEL; | ||
4634 | |||
4635 | priv->channel = channel; | ||
4636 | |||
4637 | if (!batch_mode) { | ||
4638 | err = ipw2100_enable_adapter(priv); | ||
4639 | if (err) | ||
4640 | return err; | ||
4641 | } | ||
4642 | |||
4643 | return 0; | ||
4644 | } | ||
4645 | |||
4646 | int ipw2100_system_config(struct ipw2100_priv *priv, int batch_mode) | ||
4647 | { | ||
4648 | struct host_command cmd = { | ||
4649 | .host_command = SYSTEM_CONFIG, | ||
4650 | .host_command_sequence = 0, | ||
4651 | .host_command_length = 12, | ||
4652 | }; | ||
4653 | u32 ibss_mask, len = sizeof(u32); | ||
4654 | int err; | ||
4655 | |||
4656 | /* Set system configuration */ | ||
4657 | |||
4658 | if (!batch_mode) { | ||
4659 | err = ipw2100_disable_adapter(priv); | ||
4660 | if (err) | ||
4661 | return err; | ||
4662 | } | ||
4663 | |||
4664 | if (priv->ieee->iw_mode == IW_MODE_ADHOC) | ||
4665 | cmd.host_command_parameters[0] |= IPW_CFG_IBSS_AUTO_START; | ||
4666 | |||
4667 | cmd.host_command_parameters[0] |= IPW_CFG_IBSS_MASK | | ||
4668 | IPW_CFG_BSS_MASK | | ||
4669 | IPW_CFG_802_1x_ENABLE; | ||
4670 | |||
4671 | if (!(priv->config & CFG_LONG_PREAMBLE)) | ||
4672 | cmd.host_command_parameters[0] |= IPW_CFG_PREAMBLE_AUTO; | ||
4673 | |||
4674 | err = ipw2100_get_ordinal(priv, | ||
4675 | IPW_ORD_EEPROM_IBSS_11B_CHANNELS, | ||
4676 | &ibss_mask, &len); | ||
4677 | if (err) | ||
4678 | ibss_mask = IPW_IBSS_11B_DEFAULT_MASK; | ||
4679 | |||
4680 | cmd.host_command_parameters[1] = REG_CHANNEL_MASK; | ||
4681 | cmd.host_command_parameters[2] = REG_CHANNEL_MASK & ibss_mask; | ||
4682 | |||
4683 | /* 11b only */ | ||
4684 | /*cmd.host_command_parameters[0] |= DIVERSITY_ANTENNA_A;*/ | ||
4685 | |||
4686 | err = ipw2100_hw_send_command(priv, &cmd); | ||
4687 | if (err) | ||
4688 | return err; | ||
4689 | |||
4690 | /* If IPv6 is configured in the kernel then we don't want to filter out all | ||
4691 | * of the multicast packets as IPv6 needs some. */ | ||
4692 | #if !defined(CONFIG_IPV6) && !defined(CONFIG_IPV6_MODULE) | ||
4693 | cmd.host_command = ADD_MULTICAST; | ||
4694 | cmd.host_command_sequence = 0; | ||
4695 | cmd.host_command_length = 0; | ||
4696 | |||
4697 | ipw2100_hw_send_command(priv, &cmd); | ||
4698 | #endif | ||
4699 | if (!batch_mode) { | ||
4700 | err = ipw2100_enable_adapter(priv); | ||
4701 | if (err) | ||
4702 | return err; | ||
4703 | } | ||
4704 | |||
4705 | return 0; | ||
4706 | } | ||
4707 | |||
4708 | int ipw2100_set_tx_rates(struct ipw2100_priv *priv, u32 rate, int batch_mode) | ||
4709 | { | ||
4710 | struct host_command cmd = { | ||
4711 | .host_command = BASIC_TX_RATES, | ||
4712 | .host_command_sequence = 0, | ||
4713 | .host_command_length = 4 | ||
4714 | }; | ||
4715 | int err; | ||
4716 | |||
4717 | cmd.host_command_parameters[0] = rate & TX_RATE_MASK; | ||
4718 | |||
4719 | if (!batch_mode) { | ||
4720 | err = ipw2100_disable_adapter(priv); | ||
4721 | if (err) | ||
4722 | return err; | ||
4723 | } | ||
4724 | |||
4725 | /* Set BASIC TX Rate first */ | ||
4726 | ipw2100_hw_send_command(priv, &cmd); | ||
4727 | |||
4728 | /* Set TX Rate */ | ||
4729 | cmd.host_command = TX_RATES; | ||
4730 | ipw2100_hw_send_command(priv, &cmd); | ||
4731 | |||
4732 | /* Set MSDU TX Rate */ | ||
4733 | cmd.host_command = MSDU_TX_RATES; | ||
4734 | ipw2100_hw_send_command(priv, &cmd); | ||
4735 | |||
4736 | if (!batch_mode) { | ||
4737 | err = ipw2100_enable_adapter(priv); | ||
4738 | if (err) | ||
4739 | return err; | ||
4740 | } | ||
4741 | |||
4742 | priv->tx_rates = rate; | ||
4743 | |||
4744 | return 0; | ||
4745 | } | ||
4746 | |||
4747 | int ipw2100_set_power_mode(struct ipw2100_priv *priv, | ||
4748 | int power_level) | ||
4749 | { | ||
4750 | struct host_command cmd = { | ||
4751 | .host_command = POWER_MODE, | ||
4752 | .host_command_sequence = 0, | ||
4753 | .host_command_length = 4 | ||
4754 | }; | ||
4755 | int err; | ||
4756 | |||
4757 | cmd.host_command_parameters[0] = power_level; | ||
4758 | |||
4759 | err = ipw2100_hw_send_command(priv, &cmd); | ||
4760 | if (err) | ||
4761 | return err; | ||
4762 | |||
4763 | if (power_level == IPW_POWER_MODE_CAM) | ||
4764 | priv->power_mode = IPW_POWER_LEVEL(priv->power_mode); | ||
4765 | else | ||
4766 | priv->power_mode = IPW_POWER_ENABLED | power_level; | ||
4767 | |||
4768 | #ifdef CONFIG_IPW2100_TX_POWER | ||
4769 | if (priv->port_type == IBSS && | ||
4770 | priv->adhoc_power != DFTL_IBSS_TX_POWER) { | ||
4771 | /* Set beacon interval */ | ||
4772 | cmd.host_command = TX_POWER_INDEX; | ||
4773 | cmd.host_command_parameters[0] = (u32)priv->adhoc_power; | ||
4774 | |||
4775 | err = ipw2100_hw_send_command(priv, &cmd); | ||
4776 | if (err) | ||
4777 | return err; | ||
4778 | } | ||
4779 | #endif | ||
4780 | |||
4781 | return 0; | ||
4782 | } | ||
4783 | |||
4784 | |||
4785 | int ipw2100_set_rts_threshold(struct ipw2100_priv *priv, u32 threshold) | ||
4786 | { | ||
4787 | struct host_command cmd = { | ||
4788 | .host_command = RTS_THRESHOLD, | ||
4789 | .host_command_sequence = 0, | ||
4790 | .host_command_length = 4 | ||
4791 | }; | ||
4792 | int err; | ||
4793 | |||
4794 | if (threshold & RTS_DISABLED) | ||
4795 | cmd.host_command_parameters[0] = MAX_RTS_THRESHOLD; | ||
4796 | else | ||
4797 | cmd.host_command_parameters[0] = threshold & ~RTS_DISABLED; | ||
4798 | |||
4799 | err = ipw2100_hw_send_command(priv, &cmd); | ||
4800 | if (err) | ||
4801 | return err; | ||
4802 | |||
4803 | priv->rts_threshold = threshold; | ||
4804 | |||
4805 | return 0; | ||
4806 | } | ||
4807 | |||
4808 | #if 0 | ||
4809 | int ipw2100_set_fragmentation_threshold(struct ipw2100_priv *priv, | ||
4810 | u32 threshold, int batch_mode) | ||
4811 | { | ||
4812 | struct host_command cmd = { | ||
4813 | .host_command = FRAG_THRESHOLD, | ||
4814 | .host_command_sequence = 0, | ||
4815 | .host_command_length = 4, | ||
4816 | .host_command_parameters[0] = 0, | ||
4817 | }; | ||
4818 | int err; | ||
4819 | |||
4820 | if (!batch_mode) { | ||
4821 | err = ipw2100_disable_adapter(priv); | ||
4822 | if (err) | ||
4823 | return err; | ||
4824 | } | ||
4825 | |||
4826 | if (threshold == 0) | ||
4827 | threshold = DEFAULT_FRAG_THRESHOLD; | ||
4828 | else { | ||
4829 | threshold = max(threshold, MIN_FRAG_THRESHOLD); | ||
4830 | threshold = min(threshold, MAX_FRAG_THRESHOLD); | ||
4831 | } | ||
4832 | |||
4833 | cmd.host_command_parameters[0] = threshold; | ||
4834 | |||
4835 | IPW_DEBUG_HC("FRAG_THRESHOLD: %u\n", threshold); | ||
4836 | |||
4837 | err = ipw2100_hw_send_command(priv, &cmd); | ||
4838 | |||
4839 | if (!batch_mode) | ||
4840 | ipw2100_enable_adapter(priv); | ||
4841 | |||
4842 | if (!err) | ||
4843 | priv->frag_threshold = threshold; | ||
4844 | |||
4845 | return err; | ||
4846 | } | ||
4847 | #endif | ||
4848 | |||
4849 | int ipw2100_set_short_retry(struct ipw2100_priv *priv, u32 retry) | ||
4850 | { | ||
4851 | struct host_command cmd = { | ||
4852 | .host_command = SHORT_RETRY_LIMIT, | ||
4853 | .host_command_sequence = 0, | ||
4854 | .host_command_length = 4 | ||
4855 | }; | ||
4856 | int err; | ||
4857 | |||
4858 | cmd.host_command_parameters[0] = retry; | ||
4859 | |||
4860 | err = ipw2100_hw_send_command(priv, &cmd); | ||
4861 | if (err) | ||
4862 | return err; | ||
4863 | |||
4864 | priv->short_retry_limit = retry; | ||
4865 | |||
4866 | return 0; | ||
4867 | } | ||
4868 | |||
4869 | int ipw2100_set_long_retry(struct ipw2100_priv *priv, u32 retry) | ||
4870 | { | ||
4871 | struct host_command cmd = { | ||
4872 | .host_command = LONG_RETRY_LIMIT, | ||
4873 | .host_command_sequence = 0, | ||
4874 | .host_command_length = 4 | ||
4875 | }; | ||
4876 | int err; | ||
4877 | |||
4878 | cmd.host_command_parameters[0] = retry; | ||
4879 | |||
4880 | err = ipw2100_hw_send_command(priv, &cmd); | ||
4881 | if (err) | ||
4882 | return err; | ||
4883 | |||
4884 | priv->long_retry_limit = retry; | ||
4885 | |||
4886 | return 0; | ||
4887 | } | ||
4888 | |||
4889 | |||
4890 | int ipw2100_set_mandatory_bssid(struct ipw2100_priv *priv, u8 *bssid, | ||
4891 | int batch_mode) | ||
4892 | { | ||
4893 | struct host_command cmd = { | ||
4894 | .host_command = MANDATORY_BSSID, | ||
4895 | .host_command_sequence = 0, | ||
4896 | .host_command_length = (bssid == NULL) ? 0 : ETH_ALEN | ||
4897 | }; | ||
4898 | int err; | ||
4899 | |||
4900 | #ifdef CONFIG_IPW_DEBUG | ||
4901 | if (bssid != NULL) | ||
4902 | IPW_DEBUG_HC( | ||
4903 | "MANDATORY_BSSID: %02X:%02X:%02X:%02X:%02X:%02X\n", | ||
4904 | bssid[0], bssid[1], bssid[2], bssid[3], bssid[4], | ||
4905 | bssid[5]); | ||
4906 | else | ||
4907 | IPW_DEBUG_HC("MANDATORY_BSSID: <clear>\n"); | ||
4908 | #endif | ||
4909 | /* if BSSID is empty then we disable mandatory bssid mode */ | ||
4910 | if (bssid != NULL) | ||
4911 | memcpy((u8 *)cmd.host_command_parameters, bssid, ETH_ALEN); | ||
4912 | |||
4913 | if (!batch_mode) { | ||
4914 | err = ipw2100_disable_adapter(priv); | ||
4915 | if (err) | ||
4916 | return err; | ||
4917 | } | ||
4918 | |||
4919 | err = ipw2100_hw_send_command(priv, &cmd); | ||
4920 | |||
4921 | if (!batch_mode) | ||
4922 | ipw2100_enable_adapter(priv); | ||
4923 | |||
4924 | return err; | ||
4925 | } | ||
4926 | |||
4927 | #ifdef CONFIG_IEEE80211_WPA | ||
4928 | static int ipw2100_disassociate_bssid(struct ipw2100_priv *priv) | ||
4929 | { | ||
4930 | struct host_command cmd = { | ||
4931 | .host_command = DISASSOCIATION_BSSID, | ||
4932 | .host_command_sequence = 0, | ||
4933 | .host_command_length = ETH_ALEN | ||
4934 | }; | ||
4935 | int err; | ||
4936 | int len; | ||
4937 | |||
4938 | IPW_DEBUG_HC("DISASSOCIATION_BSSID\n"); | ||
4939 | |||
4940 | len = ETH_ALEN; | ||
4941 | /* The Firmware currently ignores the BSSID and just disassociates from | ||
4942 | * the currently associated AP -- but in the off chance that a future | ||
4943 | * firmware does use the BSSID provided here, we go ahead and try and | ||
4944 | * set it to the currently associated AP's BSSID */ | ||
4945 | memcpy(cmd.host_command_parameters, priv->bssid, ETH_ALEN); | ||
4946 | |||
4947 | err = ipw2100_hw_send_command(priv, &cmd); | ||
4948 | |||
4949 | return err; | ||
4950 | } | ||
4951 | #endif | ||
4952 | |||
4953 | /* | ||
4954 | * Pseudo code for setting up wpa_frame: | ||
4955 | */ | ||
4956 | #if 0 | ||
4957 | void x(struct ieee80211_assoc_frame *wpa_assoc) | ||
4958 | { | ||
4959 | struct ipw2100_wpa_assoc_frame frame; | ||
4960 | frame->fixed_ie_mask = IPW_WPA_CAPABILTIES | | ||
4961 | IPW_WPA_LISTENINTERVAL | | ||
4962 | IPW_WPA_AP_ADDRESS; | ||
4963 | frame->capab_info = wpa_assoc->capab_info; | ||
4964 | frame->lisen_interval = wpa_assoc->listent_interval; | ||
4965 | memcpy(frame->current_ap, wpa_assoc->current_ap, ETH_ALEN); | ||
4966 | |||
4967 | /* UNKNOWN -- I'm not postivive about this part; don't have any WPA | ||
4968 | * setup here to test it with. | ||
4969 | * | ||
4970 | * Walk the IEs in the wpa_assoc and figure out the total size of all | ||
4971 | * that data. Stick that into frame->var_ie_len. Then memcpy() all of | ||
4972 | * the IEs from wpa_frame into frame. | ||
4973 | */ | ||
4974 | frame->var_ie_len = calculate_ie_len(wpa_assoc); | ||
4975 | memcpy(frame->var_ie, wpa_assoc->variable, frame->var_ie_len); | ||
4976 | |||
4977 | ipw2100_set_wpa_ie(priv, &frame, 0); | ||
4978 | } | ||
4979 | #endif | ||
4980 | |||
4981 | |||
4982 | |||
4983 | |||
4984 | static int ipw2100_set_wpa_ie(struct ipw2100_priv *, | ||
4985 | struct ipw2100_wpa_assoc_frame *, int) | ||
4986 | __attribute__ ((unused)); | ||
4987 | |||
4988 | static int ipw2100_set_wpa_ie(struct ipw2100_priv *priv, | ||
4989 | struct ipw2100_wpa_assoc_frame *wpa_frame, | ||
4990 | int batch_mode) | ||
4991 | { | ||
4992 | struct host_command cmd = { | ||
4993 | .host_command = SET_WPA_IE, | ||
4994 | .host_command_sequence = 0, | ||
4995 | .host_command_length = sizeof(struct ipw2100_wpa_assoc_frame), | ||
4996 | }; | ||
4997 | int err; | ||
4998 | |||
4999 | IPW_DEBUG_HC("SET_WPA_IE\n"); | ||
5000 | |||
5001 | if (!batch_mode) { | ||
5002 | err = ipw2100_disable_adapter(priv); | ||
5003 | if (err) | ||
5004 | return err; | ||
5005 | } | ||
5006 | |||
5007 | memcpy(cmd.host_command_parameters, wpa_frame, | ||
5008 | sizeof(struct ipw2100_wpa_assoc_frame)); | ||
5009 | |||
5010 | err = ipw2100_hw_send_command(priv, &cmd); | ||
5011 | |||
5012 | if (!batch_mode) { | ||
5013 | if (ipw2100_enable_adapter(priv)) | ||
5014 | err = -EIO; | ||
5015 | } | ||
5016 | |||
5017 | return err; | ||
5018 | } | ||
5019 | |||
5020 | struct security_info_params { | ||
5021 | u32 allowed_ciphers; | ||
5022 | u16 version; | ||
5023 | u8 auth_mode; | ||
5024 | u8 replay_counters_number; | ||
5025 | u8 unicast_using_group; | ||
5026 | } __attribute__ ((packed)); | ||
5027 | |||
5028 | int ipw2100_set_security_information(struct ipw2100_priv *priv, | ||
5029 | int auth_mode, | ||
5030 | int security_level, | ||
5031 | int unicast_using_group, | ||
5032 | int batch_mode) | ||
5033 | { | ||
5034 | struct host_command cmd = { | ||
5035 | .host_command = SET_SECURITY_INFORMATION, | ||
5036 | .host_command_sequence = 0, | ||
5037 | .host_command_length = sizeof(struct security_info_params) | ||
5038 | }; | ||
5039 | struct security_info_params *security = | ||
5040 | (struct security_info_params *)&cmd.host_command_parameters; | ||
5041 | int err; | ||
5042 | memset(security, 0, sizeof(*security)); | ||
5043 | |||
5044 | /* If shared key AP authentication is turned on, then we need to | ||
5045 | * configure the firmware to try and use it. | ||
5046 | * | ||
5047 | * Actual data encryption/decryption is handled by the host. */ | ||
5048 | security->auth_mode = auth_mode; | ||
5049 | security->unicast_using_group = unicast_using_group; | ||
5050 | |||
5051 | switch (security_level) { | ||
5052 | default: | ||
5053 | case SEC_LEVEL_0: | ||
5054 | security->allowed_ciphers = IPW_NONE_CIPHER; | ||
5055 | break; | ||
5056 | case SEC_LEVEL_1: | ||
5057 | security->allowed_ciphers = IPW_WEP40_CIPHER | | ||
5058 | IPW_WEP104_CIPHER; | ||
5059 | break; | ||
5060 | case SEC_LEVEL_2: | ||
5061 | security->allowed_ciphers = IPW_WEP40_CIPHER | | ||
5062 | IPW_WEP104_CIPHER | IPW_TKIP_CIPHER; | ||
5063 | break; | ||
5064 | case SEC_LEVEL_2_CKIP: | ||
5065 | security->allowed_ciphers = IPW_WEP40_CIPHER | | ||
5066 | IPW_WEP104_CIPHER | IPW_CKIP_CIPHER; | ||
5067 | break; | ||
5068 | case SEC_LEVEL_3: | ||
5069 | security->allowed_ciphers = IPW_WEP40_CIPHER | | ||
5070 | IPW_WEP104_CIPHER | IPW_TKIP_CIPHER | IPW_CCMP_CIPHER; | ||
5071 | break; | ||
5072 | } | ||
5073 | |||
5074 | IPW_DEBUG_HC( | ||
5075 | "SET_SECURITY_INFORMATION: auth:%d cipher:0x%02X (level %d)\n", | ||
5076 | security->auth_mode, security->allowed_ciphers, security_level); | ||
5077 | |||
5078 | security->replay_counters_number = 0; | ||
5079 | |||
5080 | if (!batch_mode) { | ||
5081 | err = ipw2100_disable_adapter(priv); | ||
5082 | if (err) | ||
5083 | return err; | ||
5084 | } | ||
5085 | |||
5086 | err = ipw2100_hw_send_command(priv, &cmd); | ||
5087 | |||
5088 | if (!batch_mode) | ||
5089 | ipw2100_enable_adapter(priv); | ||
5090 | |||
5091 | return err; | ||
5092 | } | ||
5093 | |||
5094 | int ipw2100_set_tx_power(struct ipw2100_priv *priv, | ||
5095 | u32 tx_power) | ||
5096 | { | ||
5097 | struct host_command cmd = { | ||
5098 | .host_command = TX_POWER_INDEX, | ||
5099 | .host_command_sequence = 0, | ||
5100 | .host_command_length = 4 | ||
5101 | }; | ||
5102 | int err = 0; | ||
5103 | |||
5104 | cmd.host_command_parameters[0] = tx_power; | ||
5105 | |||
5106 | if (priv->ieee->iw_mode == IW_MODE_ADHOC) | ||
5107 | err = ipw2100_hw_send_command(priv, &cmd); | ||
5108 | if (!err) | ||
5109 | priv->tx_power = tx_power; | ||
5110 | |||
5111 | return 0; | ||
5112 | } | ||
5113 | |||
5114 | int ipw2100_set_ibss_beacon_interval(struct ipw2100_priv *priv, | ||
5115 | u32 interval, int batch_mode) | ||
5116 | { | ||
5117 | struct host_command cmd = { | ||
5118 | .host_command = BEACON_INTERVAL, | ||
5119 | .host_command_sequence = 0, | ||
5120 | .host_command_length = 4 | ||
5121 | }; | ||
5122 | int err; | ||
5123 | |||
5124 | cmd.host_command_parameters[0] = interval; | ||
5125 | |||
5126 | IPW_DEBUG_INFO("enter\n"); | ||
5127 | |||
5128 | if (priv->ieee->iw_mode == IW_MODE_ADHOC) { | ||
5129 | if (!batch_mode) { | ||
5130 | err = ipw2100_disable_adapter(priv); | ||
5131 | if (err) | ||
5132 | return err; | ||
5133 | } | ||
5134 | |||
5135 | ipw2100_hw_send_command(priv, &cmd); | ||
5136 | |||
5137 | if (!batch_mode) { | ||
5138 | err = ipw2100_enable_adapter(priv); | ||
5139 | if (err) | ||
5140 | return err; | ||
5141 | } | ||
5142 | } | ||
5143 | |||
5144 | IPW_DEBUG_INFO("exit\n"); | ||
5145 | |||
5146 | return 0; | ||
5147 | } | ||
5148 | |||
5149 | |||
5150 | void ipw2100_queues_initialize(struct ipw2100_priv *priv) | ||
5151 | { | ||
5152 | ipw2100_tx_initialize(priv); | ||
5153 | ipw2100_rx_initialize(priv); | ||
5154 | ipw2100_msg_initialize(priv); | ||
5155 | } | ||
5156 | |||
5157 | void ipw2100_queues_free(struct ipw2100_priv *priv) | ||
5158 | { | ||
5159 | ipw2100_tx_free(priv); | ||
5160 | ipw2100_rx_free(priv); | ||
5161 | ipw2100_msg_free(priv); | ||
5162 | } | ||
5163 | |||
5164 | int ipw2100_queues_allocate(struct ipw2100_priv *priv) | ||
5165 | { | ||
5166 | if (ipw2100_tx_allocate(priv) || | ||
5167 | ipw2100_rx_allocate(priv) || | ||
5168 | ipw2100_msg_allocate(priv)) | ||
5169 | goto fail; | ||
5170 | |||
5171 | return 0; | ||
5172 | |||
5173 | fail: | ||
5174 | ipw2100_tx_free(priv); | ||
5175 | ipw2100_rx_free(priv); | ||
5176 | ipw2100_msg_free(priv); | ||
5177 | return -ENOMEM; | ||
5178 | } | ||
5179 | |||
5180 | #define IPW_PRIVACY_CAPABLE 0x0008 | ||
5181 | |||
5182 | static int ipw2100_set_wep_flags(struct ipw2100_priv *priv, u32 flags, | ||
5183 | int batch_mode) | ||
5184 | { | ||
5185 | struct host_command cmd = { | ||
5186 | .host_command = WEP_FLAGS, | ||
5187 | .host_command_sequence = 0, | ||
5188 | .host_command_length = 4 | ||
5189 | }; | ||
5190 | int err; | ||
5191 | |||
5192 | cmd.host_command_parameters[0] = flags; | ||
5193 | |||
5194 | IPW_DEBUG_HC("WEP_FLAGS: flags = 0x%08X\n", flags); | ||
5195 | |||
5196 | if (!batch_mode) { | ||
5197 | err = ipw2100_disable_adapter(priv); | ||
5198 | if (err) { | ||
5199 | IPW_DEBUG_ERROR("%s: Could not disable adapter %d\n", | ||
5200 | priv->net_dev->name, err); | ||
5201 | return err; | ||
5202 | } | ||
5203 | } | ||
5204 | |||
5205 | /* send cmd to firmware */ | ||
5206 | err = ipw2100_hw_send_command(priv, &cmd); | ||
5207 | |||
5208 | if (!batch_mode) | ||
5209 | ipw2100_enable_adapter(priv); | ||
5210 | |||
5211 | return err; | ||
5212 | } | ||
5213 | |||
5214 | struct ipw2100_wep_key { | ||
5215 | u8 idx; | ||
5216 | u8 len; | ||
5217 | u8 key[13]; | ||
5218 | }; | ||
5219 | |||
5220 | /* Macros to ease up priting WEP keys */ | ||
5221 | #define WEP_FMT_64 "%02X%02X%02X%02X-%02X" | ||
5222 | #define WEP_FMT_128 "%02X%02X%02X%02X-%02X%02X%02X%02X-%02X%02X%02X" | ||
5223 | #define WEP_STR_64(x) x[0],x[1],x[2],x[3],x[4] | ||
5224 | #define WEP_STR_128(x) x[0],x[1],x[2],x[3],x[4],x[5],x[6],x[7],x[8],x[9],x[10] | ||
5225 | |||
5226 | |||
5227 | /** | ||
5228 | * Set a the wep key | ||
5229 | * | ||
5230 | * @priv: struct to work on | ||
5231 | * @idx: index of the key we want to set | ||
5232 | * @key: ptr to the key data to set | ||
5233 | * @len: length of the buffer at @key | ||
5234 | * @batch_mode: FIXME perform the operation in batch mode, not | ||
5235 | * disabling the device. | ||
5236 | * | ||
5237 | * @returns 0 if OK, < 0 errno code on error. | ||
5238 | * | ||
5239 | * Fill out a command structure with the new wep key, length an | ||
5240 | * index and send it down the wire. | ||
5241 | */ | ||
5242 | static int ipw2100_set_key(struct ipw2100_priv *priv, | ||
5243 | int idx, char *key, int len, int batch_mode) | ||
5244 | { | ||
5245 | int keylen = len ? (len <= 5 ? 5 : 13) : 0; | ||
5246 | struct host_command cmd = { | ||
5247 | .host_command = WEP_KEY_INFO, | ||
5248 | .host_command_sequence = 0, | ||
5249 | .host_command_length = sizeof(struct ipw2100_wep_key), | ||
5250 | }; | ||
5251 | struct ipw2100_wep_key *wep_key = (void*)cmd.host_command_parameters; | ||
5252 | int err; | ||
5253 | |||
5254 | IPW_DEBUG_HC("WEP_KEY_INFO: index = %d, len = %d/%d\n", | ||
5255 | idx, keylen, len); | ||
5256 | |||
5257 | /* NOTE: We don't check cached values in case the firmware was reset | ||
5258 | * or some other problem is occuring. If the user is setting the key, | ||
5259 | * then we push the change */ | ||
5260 | |||
5261 | wep_key->idx = idx; | ||
5262 | wep_key->len = keylen; | ||
5263 | |||
5264 | if (keylen) { | ||
5265 | memcpy(wep_key->key, key, len); | ||
5266 | memset(wep_key->key + len, 0, keylen - len); | ||
5267 | } | ||
5268 | |||
5269 | /* Will be optimized out on debug not being configured in */ | ||
5270 | if (keylen == 0) | ||
5271 | IPW_DEBUG_WEP("%s: Clearing key %d\n", | ||
5272 | priv->net_dev->name, wep_key->idx); | ||
5273 | else if (keylen == 5) | ||
5274 | IPW_DEBUG_WEP("%s: idx: %d, len: %d key: " WEP_FMT_64 "\n", | ||
5275 | priv->net_dev->name, wep_key->idx, wep_key->len, | ||
5276 | WEP_STR_64(wep_key->key)); | ||
5277 | else | ||
5278 | IPW_DEBUG_WEP("%s: idx: %d, len: %d key: " WEP_FMT_128 | ||
5279 | "\n", | ||
5280 | priv->net_dev->name, wep_key->idx, wep_key->len, | ||
5281 | WEP_STR_128(wep_key->key)); | ||
5282 | |||
5283 | if (!batch_mode) { | ||
5284 | err = ipw2100_disable_adapter(priv); | ||
5285 | /* FIXME: IPG: shouldn't this prink be in _disable_adapter()? */ | ||
5286 | if (err) { | ||
5287 | IPW_DEBUG_ERROR("%s: Could not disable adapter %d\n", | ||
5288 | priv->net_dev->name, err); | ||
5289 | return err; | ||
5290 | } | ||
5291 | } | ||
5292 | |||
5293 | /* send cmd to firmware */ | ||
5294 | err = ipw2100_hw_send_command(priv, &cmd); | ||
5295 | |||
5296 | if (!batch_mode) { | ||
5297 | int err2 = ipw2100_enable_adapter(priv); | ||
5298 | if (err == 0) | ||
5299 | err = err2; | ||
5300 | } | ||
5301 | return err; | ||
5302 | } | ||
5303 | |||
5304 | static int ipw2100_set_key_index(struct ipw2100_priv *priv, | ||
5305 | int idx, int batch_mode) | ||
5306 | { | ||
5307 | struct host_command cmd = { | ||
5308 | .host_command = WEP_KEY_INDEX, | ||
5309 | .host_command_sequence = 0, | ||
5310 | .host_command_length = 4, | ||
5311 | .host_command_parameters[0] = idx, | ||
5312 | }; | ||
5313 | int err; | ||
5314 | |||
5315 | IPW_DEBUG_HC("WEP_KEY_INDEX: index = %d\n", idx); | ||
5316 | |||
5317 | if (idx < 0 || idx > 3) | ||
5318 | return -EINVAL; | ||
5319 | |||
5320 | if (!batch_mode) { | ||
5321 | err = ipw2100_disable_adapter(priv); | ||
5322 | if (err) { | ||
5323 | IPW_DEBUG_ERROR("%s: Could not disable adapter %d\n", | ||
5324 | priv->net_dev->name, err); | ||
5325 | return err; | ||
5326 | } | ||
5327 | } | ||
5328 | |||
5329 | /* send cmd to firmware */ | ||
5330 | err = ipw2100_hw_send_command(priv, &cmd); | ||
5331 | |||
5332 | if (!batch_mode) | ||
5333 | ipw2100_enable_adapter(priv); | ||
5334 | |||
5335 | return err; | ||
5336 | } | ||
5337 | |||
5338 | |||
5339 | static int ipw2100_configure_security(struct ipw2100_priv *priv, | ||
5340 | int batch_mode) | ||
5341 | { | ||
5342 | int i, err, auth_mode, sec_level, use_group; | ||
5343 | |||
5344 | if (!(priv->status & STATUS_RUNNING)) | ||
5345 | return 0; | ||
5346 | |||
5347 | if (!batch_mode) { | ||
5348 | err = ipw2100_disable_adapter(priv); | ||
5349 | if (err) | ||
5350 | return err; | ||
5351 | } | ||
5352 | |||
5353 | if (!priv->sec.enabled) { | ||
5354 | err = ipw2100_set_security_information( | ||
5355 | priv, IPW_AUTH_OPEN, SEC_LEVEL_0, 0, 1); | ||
5356 | } else { | ||
5357 | auth_mode = IPW_AUTH_OPEN; | ||
5358 | if ((priv->sec.flags & SEC_AUTH_MODE) && | ||
5359 | (priv->sec.auth_mode == WLAN_AUTH_SHARED_KEY)) | ||
5360 | auth_mode = IPW_AUTH_SHARED; | ||
5361 | |||
5362 | sec_level = SEC_LEVEL_0; | ||
5363 | if (priv->sec.flags & SEC_LEVEL) | ||
5364 | sec_level = priv->sec.level; | ||
5365 | |||
5366 | use_group = 0; | ||
5367 | if (priv->sec.flags & SEC_UNICAST_GROUP) | ||
5368 | use_group = priv->sec.unicast_uses_group; | ||
5369 | |||
5370 | err = ipw2100_set_security_information( | ||
5371 | priv, auth_mode, sec_level, use_group, 1); | ||
5372 | } | ||
5373 | |||
5374 | if (err) | ||
5375 | goto exit; | ||
5376 | |||
5377 | if (priv->sec.enabled) { | ||
5378 | for (i = 0; i < 4; i++) { | ||
5379 | if (!(priv->sec.flags & (1 << i))) { | ||
5380 | memset(priv->sec.keys[i], 0, WEP_KEY_LEN); | ||
5381 | priv->sec.key_sizes[i] = 0; | ||
5382 | } else { | ||
5383 | err = ipw2100_set_key(priv, i, | ||
5384 | priv->sec.keys[i], | ||
5385 | priv->sec.key_sizes[i], | ||
5386 | 1); | ||
5387 | if (err) | ||
5388 | goto exit; | ||
5389 | } | ||
5390 | } | ||
5391 | |||
5392 | ipw2100_set_key_index(priv, priv->ieee->tx_keyidx, 1); | ||
5393 | } | ||
5394 | |||
5395 | /* Always enable privacy so the Host can filter WEP packets if | ||
5396 | * encrypted data is sent up */ | ||
5397 | err = ipw2100_set_wep_flags( | ||
5398 | priv, priv->sec.enabled ? IPW_PRIVACY_CAPABLE : 0, 1); | ||
5399 | if (err) | ||
5400 | goto exit; | ||
5401 | |||
5402 | priv->status &= ~STATUS_SECURITY_UPDATED; | ||
5403 | |||
5404 | exit: | ||
5405 | if (!batch_mode) | ||
5406 | ipw2100_enable_adapter(priv); | ||
5407 | |||
5408 | return err; | ||
5409 | } | ||
5410 | |||
5411 | static void ipw2100_security_work(struct ipw2100_priv *priv) | ||
5412 | { | ||
5413 | /* If we happen to have reconnected before we get a chance to | ||
5414 | * process this, then update the security settings--which causes | ||
5415 | * a disassociation to occur */ | ||
5416 | if (!(priv->status & STATUS_ASSOCIATED) && | ||
5417 | priv->status & STATUS_SECURITY_UPDATED) | ||
5418 | ipw2100_configure_security(priv, 0); | ||
5419 | } | ||
5420 | |||
5421 | static void shim__set_security(struct net_device *dev, | ||
5422 | struct ieee80211_security *sec) | ||
5423 | { | ||
5424 | struct ipw2100_priv *priv = ieee80211_priv(dev); | ||
5425 | int i, force_update = 0; | ||
5426 | |||
5427 | down(&priv->action_sem); | ||
5428 | if (!(priv->status & STATUS_INITIALIZED)) | ||
5429 | goto done; | ||
5430 | |||
5431 | for (i = 0; i < 4; i++) { | ||
5432 | if (sec->flags & (1 << i)) { | ||
5433 | priv->sec.key_sizes[i] = sec->key_sizes[i]; | ||
5434 | if (sec->key_sizes[i] == 0) | ||
5435 | priv->sec.flags &= ~(1 << i); | ||
5436 | else | ||
5437 | memcpy(priv->sec.keys[i], sec->keys[i], | ||
5438 | sec->key_sizes[i]); | ||
5439 | priv->sec.flags |= (1 << i); | ||
5440 | priv->status |= STATUS_SECURITY_UPDATED; | ||
5441 | } | ||
5442 | } | ||
5443 | |||
5444 | if ((sec->flags & SEC_ACTIVE_KEY) && | ||
5445 | priv->sec.active_key != sec->active_key) { | ||
5446 | if (sec->active_key <= 3) { | ||
5447 | priv->sec.active_key = sec->active_key; | ||
5448 | priv->sec.flags |= SEC_ACTIVE_KEY; | ||
5449 | } else | ||
5450 | priv->sec.flags &= ~SEC_ACTIVE_KEY; | ||
5451 | |||
5452 | priv->status |= STATUS_SECURITY_UPDATED; | ||
5453 | } | ||
5454 | |||
5455 | if ((sec->flags & SEC_AUTH_MODE) && | ||
5456 | (priv->sec.auth_mode != sec->auth_mode)) { | ||
5457 | priv->sec.auth_mode = sec->auth_mode; | ||
5458 | priv->sec.flags |= SEC_AUTH_MODE; | ||
5459 | priv->status |= STATUS_SECURITY_UPDATED; | ||
5460 | } | ||
5461 | |||
5462 | if (sec->flags & SEC_ENABLED && | ||
5463 | priv->sec.enabled != sec->enabled) { | ||
5464 | priv->sec.flags |= SEC_ENABLED; | ||
5465 | priv->sec.enabled = sec->enabled; | ||
5466 | priv->status |= STATUS_SECURITY_UPDATED; | ||
5467 | force_update = 1; | ||
5468 | } | ||
5469 | |||
5470 | if (sec->flags & SEC_LEVEL && | ||
5471 | priv->sec.level != sec->level) { | ||
5472 | priv->sec.level = sec->level; | ||
5473 | priv->sec.flags |= SEC_LEVEL; | ||
5474 | priv->status |= STATUS_SECURITY_UPDATED; | ||
5475 | } | ||
5476 | |||
5477 | IPW_DEBUG_WEP("Security flags: %c %c%c%c%c %c%c%c%c\n", | ||
5478 | priv->sec.flags & (1<<8) ? '1' : '0', | ||
5479 | priv->sec.flags & (1<<7) ? '1' : '0', | ||
5480 | priv->sec.flags & (1<<6) ? '1' : '0', | ||
5481 | priv->sec.flags & (1<<5) ? '1' : '0', | ||
5482 | priv->sec.flags & (1<<4) ? '1' : '0', | ||
5483 | priv->sec.flags & (1<<3) ? '1' : '0', | ||
5484 | priv->sec.flags & (1<<2) ? '1' : '0', | ||
5485 | priv->sec.flags & (1<<1) ? '1' : '0', | ||
5486 | priv->sec.flags & (1<<0) ? '1' : '0'); | ||
5487 | |||
5488 | /* As a temporary work around to enable WPA until we figure out why | ||
5489 | * wpa_supplicant toggles the security capability of the driver, which | ||
5490 | * forces a disassocation with force_update... | ||
5491 | * | ||
5492 | * if (force_update || !(priv->status & STATUS_ASSOCIATED))*/ | ||
5493 | if (!(priv->status & (STATUS_ASSOCIATED | STATUS_ASSOCIATING))) | ||
5494 | ipw2100_configure_security(priv, 0); | ||
5495 | done: | ||
5496 | up(&priv->action_sem); | ||
5497 | } | ||
5498 | |||
5499 | static int ipw2100_adapter_setup(struct ipw2100_priv *priv) | ||
5500 | { | ||
5501 | int err; | ||
5502 | int batch_mode = 1; | ||
5503 | u8 *bssid; | ||
5504 | |||
5505 | IPW_DEBUG_INFO("enter\n"); | ||
5506 | |||
5507 | err = ipw2100_disable_adapter(priv); | ||
5508 | if (err) | ||
5509 | return err; | ||
5510 | #ifdef CONFIG_IPW2100_MONITOR | ||
5511 | if (priv->ieee->iw_mode == IW_MODE_MONITOR) { | ||
5512 | err = ipw2100_set_channel(priv, priv->channel, batch_mode); | ||
5513 | if (err) | ||
5514 | return err; | ||
5515 | |||
5516 | IPW_DEBUG_INFO("exit\n"); | ||
5517 | |||
5518 | return 0; | ||
5519 | } | ||
5520 | #endif /* CONFIG_IPW2100_MONITOR */ | ||
5521 | |||
5522 | err = ipw2100_read_mac_address(priv); | ||
5523 | if (err) | ||
5524 | return -EIO; | ||
5525 | |||
5526 | err = ipw2100_set_mac_address(priv, batch_mode); | ||
5527 | if (err) | ||
5528 | return err; | ||
5529 | |||
5530 | err = ipw2100_set_port_type(priv, priv->ieee->iw_mode, batch_mode); | ||
5531 | if (err) | ||
5532 | return err; | ||
5533 | |||
5534 | if (priv->ieee->iw_mode == IW_MODE_ADHOC) { | ||
5535 | err = ipw2100_set_channel(priv, priv->channel, batch_mode); | ||
5536 | if (err) | ||
5537 | return err; | ||
5538 | } | ||
5539 | |||
5540 | err = ipw2100_system_config(priv, batch_mode); | ||
5541 | if (err) | ||
5542 | return err; | ||
5543 | |||
5544 | err = ipw2100_set_tx_rates(priv, priv->tx_rates, batch_mode); | ||
5545 | if (err) | ||
5546 | return err; | ||
5547 | |||
5548 | /* Default to power mode OFF */ | ||
5549 | err = ipw2100_set_power_mode(priv, IPW_POWER_MODE_CAM); | ||
5550 | if (err) | ||
5551 | return err; | ||
5552 | |||
5553 | err = ipw2100_set_rts_threshold(priv, priv->rts_threshold); | ||
5554 | if (err) | ||
5555 | return err; | ||
5556 | |||
5557 | if (priv->config & CFG_STATIC_BSSID) | ||
5558 | bssid = priv->bssid; | ||
5559 | else | ||
5560 | bssid = NULL; | ||
5561 | err = ipw2100_set_mandatory_bssid(priv, bssid, batch_mode); | ||
5562 | if (err) | ||
5563 | return err; | ||
5564 | |||
5565 | if (priv->config & CFG_STATIC_ESSID) | ||
5566 | err = ipw2100_set_essid(priv, priv->essid, priv->essid_len, | ||
5567 | batch_mode); | ||
5568 | else | ||
5569 | err = ipw2100_set_essid(priv, NULL, 0, batch_mode); | ||
5570 | if (err) | ||
5571 | return err; | ||
5572 | |||
5573 | err = ipw2100_configure_security(priv, batch_mode); | ||
5574 | if (err) | ||
5575 | return err; | ||
5576 | |||
5577 | if (priv->ieee->iw_mode == IW_MODE_ADHOC) { | ||
5578 | err = ipw2100_set_ibss_beacon_interval( | ||
5579 | priv, priv->beacon_interval, batch_mode); | ||
5580 | if (err) | ||
5581 | return err; | ||
5582 | |||
5583 | err = ipw2100_set_tx_power(priv, priv->tx_power); | ||
5584 | if (err) | ||
5585 | return err; | ||
5586 | } | ||
5587 | |||
5588 | /* | ||
5589 | err = ipw2100_set_fragmentation_threshold( | ||
5590 | priv, priv->frag_threshold, batch_mode); | ||
5591 | if (err) | ||
5592 | return err; | ||
5593 | */ | ||
5594 | |||
5595 | IPW_DEBUG_INFO("exit\n"); | ||
5596 | |||
5597 | return 0; | ||
5598 | } | ||
5599 | |||
5600 | |||
5601 | /************************************************************************* | ||
5602 | * | ||
5603 | * EXTERNALLY CALLED METHODS | ||
5604 | * | ||
5605 | *************************************************************************/ | ||
5606 | |||
5607 | /* This method is called by the network layer -- not to be confused with | ||
5608 | * ipw2100_set_mac_address() declared above called by this driver (and this | ||
5609 | * method as well) to talk to the firmware */ | ||
5610 | static int ipw2100_set_address(struct net_device *dev, void *p) | ||
5611 | { | ||
5612 | struct ipw2100_priv *priv = ieee80211_priv(dev); | ||
5613 | struct sockaddr *addr = p; | ||
5614 | int err = 0; | ||
5615 | |||
5616 | if (!is_valid_ether_addr(addr->sa_data)) | ||
5617 | return -EADDRNOTAVAIL; | ||
5618 | |||
5619 | down(&priv->action_sem); | ||
5620 | |||
5621 | priv->config |= CFG_CUSTOM_MAC; | ||
5622 | memcpy(priv->mac_addr, addr->sa_data, ETH_ALEN); | ||
5623 | |||
5624 | err = ipw2100_set_mac_address(priv, 0); | ||
5625 | if (err) | ||
5626 | goto done; | ||
5627 | |||
5628 | priv->reset_backoff = 0; | ||
5629 | up(&priv->action_sem); | ||
5630 | ipw2100_reset_adapter(priv); | ||
5631 | return 0; | ||
5632 | |||
5633 | done: | ||
5634 | up(&priv->action_sem); | ||
5635 | return err; | ||
5636 | } | ||
5637 | |||
5638 | static int ipw2100_open(struct net_device *dev) | ||
5639 | { | ||
5640 | struct ipw2100_priv *priv = ieee80211_priv(dev); | ||
5641 | unsigned long flags; | ||
5642 | IPW_DEBUG_INFO("dev->open\n"); | ||
5643 | |||
5644 | spin_lock_irqsave(&priv->low_lock, flags); | ||
5645 | if (priv->status & STATUS_ASSOCIATED) | ||
5646 | netif_start_queue(dev); | ||
5647 | spin_unlock_irqrestore(&priv->low_lock, flags); | ||
5648 | |||
5649 | return 0; | ||
5650 | } | ||
5651 | |||
5652 | static int ipw2100_close(struct net_device *dev) | ||
5653 | { | ||
5654 | struct ipw2100_priv *priv = ieee80211_priv(dev); | ||
5655 | unsigned long flags; | ||
5656 | struct list_head *element; | ||
5657 | struct ipw2100_tx_packet *packet; | ||
5658 | |||
5659 | IPW_DEBUG_INFO("enter\n"); | ||
5660 | |||
5661 | spin_lock_irqsave(&priv->low_lock, flags); | ||
5662 | |||
5663 | if (priv->status & STATUS_ASSOCIATED) | ||
5664 | netif_carrier_off(dev); | ||
5665 | netif_stop_queue(dev); | ||
5666 | |||
5667 | /* Flush the TX queue ... */ | ||
5668 | while (!list_empty(&priv->tx_pend_list)) { | ||
5669 | element = priv->tx_pend_list.next; | ||
5670 | packet = list_entry(element, struct ipw2100_tx_packet, list); | ||
5671 | |||
5672 | list_del(element); | ||
5673 | DEC_STAT(&priv->tx_pend_stat); | ||
5674 | |||
5675 | ieee80211_txb_free(packet->info.d_struct.txb); | ||
5676 | packet->info.d_struct.txb = NULL; | ||
5677 | |||
5678 | list_add_tail(element, &priv->tx_free_list); | ||
5679 | INC_STAT(&priv->tx_free_stat); | ||
5680 | } | ||
5681 | spin_unlock_irqrestore(&priv->low_lock, flags); | ||
5682 | |||
5683 | IPW_DEBUG_INFO("exit\n"); | ||
5684 | |||
5685 | return 0; | ||
5686 | } | ||
5687 | |||
5688 | |||
5689 | |||
5690 | /* | ||
5691 | * TODO: Fix this function... its just wrong | ||
5692 | */ | ||
5693 | static void ipw2100_tx_timeout(struct net_device *dev) | ||
5694 | { | ||
5695 | struct ipw2100_priv *priv = ieee80211_priv(dev); | ||
5696 | |||
5697 | priv->ieee->stats.tx_errors++; | ||
5698 | |||
5699 | #ifdef CONFIG_IPW2100_MONITOR | ||
5700 | if (priv->ieee->iw_mode == IW_MODE_MONITOR) | ||
5701 | return; | ||
5702 | #endif | ||
5703 | |||
5704 | IPW_DEBUG_INFO("%s: TX timed out. Scheduling firmware restart.\n", | ||
5705 | dev->name); | ||
5706 | schedule_reset(priv); | ||
5707 | } | ||
5708 | |||
5709 | |||
5710 | /* | ||
5711 | * TODO: reimplement it so that it reads statistics | ||
5712 | * from the adapter using ordinal tables | ||
5713 | * instead of/in addition to collecting them | ||
5714 | * in the driver | ||
5715 | */ | ||
5716 | static struct net_device_stats *ipw2100_stats(struct net_device *dev) | ||
5717 | { | ||
5718 | struct ipw2100_priv *priv = ieee80211_priv(dev); | ||
5719 | |||
5720 | return &priv->ieee->stats; | ||
5721 | } | ||
5722 | |||
5723 | /* Support for wpa_supplicant. Will be replaced with WEXT once | ||
5724 | * they get WPA support. */ | ||
5725 | #ifdef CONFIG_IEEE80211_WPA | ||
5726 | |||
5727 | /* following definitions must match definitions in driver_ipw2100.c */ | ||
5728 | |||
5729 | #define IPW2100_IOCTL_WPA_SUPPLICANT SIOCIWFIRSTPRIV+30 | ||
5730 | |||
5731 | #define IPW2100_CMD_SET_WPA_PARAM 1 | ||
5732 | #define IPW2100_CMD_SET_WPA_IE 2 | ||
5733 | #define IPW2100_CMD_SET_ENCRYPTION 3 | ||
5734 | #define IPW2100_CMD_MLME 4 | ||
5735 | |||
5736 | #define IPW2100_PARAM_WPA_ENABLED 1 | ||
5737 | #define IPW2100_PARAM_TKIP_COUNTERMEASURES 2 | ||
5738 | #define IPW2100_PARAM_DROP_UNENCRYPTED 3 | ||
5739 | #define IPW2100_PARAM_PRIVACY_INVOKED 4 | ||
5740 | #define IPW2100_PARAM_AUTH_ALGS 5 | ||
5741 | #define IPW2100_PARAM_IEEE_802_1X 6 | ||
5742 | |||
5743 | #define IPW2100_MLME_STA_DEAUTH 1 | ||
5744 | #define IPW2100_MLME_STA_DISASSOC 2 | ||
5745 | |||
5746 | #define IPW2100_CRYPT_ERR_UNKNOWN_ALG 2 | ||
5747 | #define IPW2100_CRYPT_ERR_UNKNOWN_ADDR 3 | ||
5748 | #define IPW2100_CRYPT_ERR_CRYPT_INIT_FAILED 4 | ||
5749 | #define IPW2100_CRYPT_ERR_KEY_SET_FAILED 5 | ||
5750 | #define IPW2100_CRYPT_ERR_TX_KEY_SET_FAILED 6 | ||
5751 | #define IPW2100_CRYPT_ERR_CARD_CONF_FAILED 7 | ||
5752 | |||
5753 | #define IPW2100_CRYPT_ALG_NAME_LEN 16 | ||
5754 | |||
5755 | struct ipw2100_param { | ||
5756 | u32 cmd; | ||
5757 | u8 sta_addr[ETH_ALEN]; | ||
5758 | union { | ||
5759 | struct { | ||
5760 | u8 name; | ||
5761 | u32 value; | ||
5762 | } wpa_param; | ||
5763 | struct { | ||
5764 | u32 len; | ||
5765 | u8 *data; | ||
5766 | } wpa_ie; | ||
5767 | struct{ | ||
5768 | int command; | ||
5769 | int reason_code; | ||
5770 | } mlme; | ||
5771 | struct { | ||
5772 | u8 alg[IPW2100_CRYPT_ALG_NAME_LEN]; | ||
5773 | u8 set_tx; | ||
5774 | u32 err; | ||
5775 | u8 idx; | ||
5776 | u8 seq[8]; /* sequence counter (set: RX, get: TX) */ | ||
5777 | u16 key_len; | ||
5778 | u8 key[0]; | ||
5779 | } crypt; | ||
5780 | |||
5781 | } u; | ||
5782 | }; | ||
5783 | |||
5784 | /* end of driver_ipw2100.c code */ | ||
5785 | |||
5786 | static int ipw2100_wpa_enable(struct ipw2100_priv *priv, int value){ | ||
5787 | |||
5788 | struct ieee80211_device *ieee = priv->ieee; | ||
5789 | struct ieee80211_security sec = { | ||
5790 | .flags = SEC_LEVEL | SEC_ENABLED, | ||
5791 | }; | ||
5792 | int ret = 0; | ||
5793 | |||
5794 | ieee->wpa_enabled = value; | ||
5795 | |||
5796 | if (value){ | ||
5797 | sec.level = SEC_LEVEL_3; | ||
5798 | sec.enabled = 1; | ||
5799 | } else { | ||
5800 | sec.level = SEC_LEVEL_0; | ||
5801 | sec.enabled = 0; | ||
5802 | } | ||
5803 | |||
5804 | if (ieee->set_security) | ||
5805 | ieee->set_security(ieee->dev, &sec); | ||
5806 | else | ||
5807 | ret = -EOPNOTSUPP; | ||
5808 | |||
5809 | return ret; | ||
5810 | } | ||
5811 | |||
5812 | #define AUTH_ALG_OPEN_SYSTEM 0x1 | ||
5813 | #define AUTH_ALG_SHARED_KEY 0x2 | ||
5814 | |||
5815 | static int ipw2100_wpa_set_auth_algs(struct ipw2100_priv *priv, int value){ | ||
5816 | |||
5817 | struct ieee80211_device *ieee = priv->ieee; | ||
5818 | struct ieee80211_security sec = { | ||
5819 | .flags = SEC_AUTH_MODE, | ||
5820 | }; | ||
5821 | int ret = 0; | ||
5822 | |||
5823 | if (value & AUTH_ALG_SHARED_KEY){ | ||
5824 | sec.auth_mode = WLAN_AUTH_SHARED_KEY; | ||
5825 | ieee->open_wep = 0; | ||
5826 | } else { | ||
5827 | sec.auth_mode = WLAN_AUTH_OPEN; | ||
5828 | ieee->open_wep = 1; | ||
5829 | } | ||
5830 | |||
5831 | if (ieee->set_security) | ||
5832 | ieee->set_security(ieee->dev, &sec); | ||
5833 | else | ||
5834 | ret = -EOPNOTSUPP; | ||
5835 | |||
5836 | return ret; | ||
5837 | } | ||
5838 | |||
5839 | |||
5840 | static int ipw2100_wpa_set_param(struct net_device *dev, u8 name, u32 value){ | ||
5841 | |||
5842 | struct ipw2100_priv *priv = ieee80211_priv(dev); | ||
5843 | int ret=0; | ||
5844 | |||
5845 | switch(name){ | ||
5846 | case IPW2100_PARAM_WPA_ENABLED: | ||
5847 | ret = ipw2100_wpa_enable(priv, value); | ||
5848 | break; | ||
5849 | |||
5850 | case IPW2100_PARAM_TKIP_COUNTERMEASURES: | ||
5851 | priv->ieee->tkip_countermeasures=value; | ||
5852 | break; | ||
5853 | |||
5854 | case IPW2100_PARAM_DROP_UNENCRYPTED: | ||
5855 | priv->ieee->drop_unencrypted=value; | ||
5856 | break; | ||
5857 | |||
5858 | case IPW2100_PARAM_PRIVACY_INVOKED: | ||
5859 | priv->ieee->privacy_invoked=value; | ||
5860 | break; | ||
5861 | |||
5862 | case IPW2100_PARAM_AUTH_ALGS: | ||
5863 | ret = ipw2100_wpa_set_auth_algs(priv, value); | ||
5864 | break; | ||
5865 | |||
5866 | case IPW2100_PARAM_IEEE_802_1X: | ||
5867 | priv->ieee->ieee802_1x=value; | ||
5868 | break; | ||
5869 | |||
5870 | default: | ||
5871 | IPW_DEBUG_ERROR("%s: Unknown WPA param: %d\n", | ||
5872 | dev->name, name); | ||
5873 | ret = -EOPNOTSUPP; | ||
5874 | } | ||
5875 | |||
5876 | return ret; | ||
5877 | } | ||
5878 | |||
5879 | static int ipw2100_wpa_mlme(struct net_device *dev, int command, int reason){ | ||
5880 | |||
5881 | struct ipw2100_priv *priv = ieee80211_priv(dev); | ||
5882 | int ret=0; | ||
5883 | |||
5884 | switch(command){ | ||
5885 | case IPW2100_MLME_STA_DEAUTH: | ||
5886 | // silently ignore | ||
5887 | break; | ||
5888 | |||
5889 | case IPW2100_MLME_STA_DISASSOC: | ||
5890 | ipw2100_disassociate_bssid(priv); | ||
5891 | break; | ||
5892 | |||
5893 | default: | ||
5894 | IPW_DEBUG_ERROR("%s: Unknown MLME request: %d\n", | ||
5895 | dev->name, command); | ||
5896 | ret = -EOPNOTSUPP; | ||
5897 | } | ||
5898 | |||
5899 | return ret; | ||
5900 | } | ||
5901 | |||
5902 | |||
5903 | void ipw2100_wpa_assoc_frame(struct ipw2100_priv *priv, | ||
5904 | char *wpa_ie, int wpa_ie_len){ | ||
5905 | |||
5906 | struct ipw2100_wpa_assoc_frame frame; | ||
5907 | |||
5908 | frame.fixed_ie_mask = 0; | ||
5909 | |||
5910 | /* copy WPA IE */ | ||
5911 | memcpy(frame.var_ie, wpa_ie, wpa_ie_len); | ||
5912 | frame.var_ie_len = wpa_ie_len; | ||
5913 | |||
5914 | /* make sure WPA is enabled */ | ||
5915 | ipw2100_wpa_enable(priv, 1); | ||
5916 | ipw2100_set_wpa_ie(priv, &frame, 0); | ||
5917 | } | ||
5918 | |||
5919 | |||
5920 | static int ipw2100_wpa_set_wpa_ie(struct net_device *dev, | ||
5921 | struct ipw2100_param *param, int plen){ | ||
5922 | |||
5923 | struct ipw2100_priv *priv = ieee80211_priv(dev); | ||
5924 | struct ieee80211_device *ieee = priv->ieee; | ||
5925 | u8 *buf; | ||
5926 | |||
5927 | if (! ieee->wpa_enabled) | ||
5928 | return -EOPNOTSUPP; | ||
5929 | |||
5930 | if (param->u.wpa_ie.len > MAX_WPA_IE_LEN || | ||
5931 | (param->u.wpa_ie.len && | ||
5932 | param->u.wpa_ie.data==NULL)) | ||
5933 | return -EINVAL; | ||
5934 | |||
5935 | if (param->u.wpa_ie.len){ | ||
5936 | buf = kmalloc(param->u.wpa_ie.len, GFP_KERNEL); | ||
5937 | if (buf == NULL) | ||
5938 | return -ENOMEM; | ||
5939 | |||
5940 | memcpy(buf, param->u.wpa_ie.data, param->u.wpa_ie.len); | ||
5941 | |||
5942 | kfree(ieee->wpa_ie); | ||
5943 | ieee->wpa_ie = buf; | ||
5944 | ieee->wpa_ie_len = param->u.wpa_ie.len; | ||
5945 | |||
5946 | } else { | ||
5947 | kfree(ieee->wpa_ie); | ||
5948 | ieee->wpa_ie = NULL; | ||
5949 | ieee->wpa_ie_len = 0; | ||
5950 | } | ||
5951 | |||
5952 | ipw2100_wpa_assoc_frame(priv, ieee->wpa_ie, ieee->wpa_ie_len); | ||
5953 | |||
5954 | return 0; | ||
5955 | } | ||
5956 | |||
5957 | /* implementation borrowed from hostap driver */ | ||
5958 | |||
5959 | static int ipw2100_wpa_set_encryption(struct net_device *dev, | ||
5960 | struct ipw2100_param *param, int param_len){ | ||
5961 | |||
5962 | int ret = 0; | ||
5963 | struct ipw2100_priv *priv = ieee80211_priv(dev); | ||
5964 | struct ieee80211_device *ieee = priv->ieee; | ||
5965 | struct ieee80211_crypto_ops *ops; | ||
5966 | struct ieee80211_crypt_data **crypt; | ||
5967 | |||
5968 | struct ieee80211_security sec = { | ||
5969 | .flags = 0, | ||
5970 | }; | ||
5971 | |||
5972 | param->u.crypt.err = 0; | ||
5973 | param->u.crypt.alg[IPW2100_CRYPT_ALG_NAME_LEN - 1] = '\0'; | ||
5974 | |||
5975 | if (param_len != | ||
5976 | (int) ((char *) param->u.crypt.key - (char *) param) + | ||
5977 | param->u.crypt.key_len){ | ||
5978 | IPW_DEBUG_INFO("Len mismatch %d, %d\n", param_len, param->u.crypt.key_len); | ||
5979 | return -EINVAL; | ||
5980 | } | ||
5981 | if (param->sta_addr[0] == 0xff && param->sta_addr[1] == 0xff && | ||
5982 | param->sta_addr[2] == 0xff && param->sta_addr[3] == 0xff && | ||
5983 | param->sta_addr[4] == 0xff && param->sta_addr[5] == 0xff) { | ||
5984 | if (param->u.crypt.idx >= WEP_KEYS) | ||
5985 | return -EINVAL; | ||
5986 | crypt = &ieee->crypt[param->u.crypt.idx]; | ||
5987 | } else { | ||
5988 | return -EINVAL; | ||
5989 | } | ||
5990 | |||
5991 | if (strcmp(param->u.crypt.alg, "none") == 0) { | ||
5992 | if (crypt){ | ||
5993 | sec.enabled = 0; | ||
5994 | sec.level = SEC_LEVEL_0; | ||
5995 | sec.flags |= SEC_ENABLED | SEC_LEVEL; | ||
5996 | ieee80211_crypt_delayed_deinit(ieee, crypt); | ||
5997 | } | ||
5998 | goto done; | ||
5999 | } | ||
6000 | sec.enabled = 1; | ||
6001 | sec.flags |= SEC_ENABLED; | ||
6002 | |||
6003 | ops = ieee80211_get_crypto_ops(param->u.crypt.alg); | ||
6004 | if (ops == NULL && strcmp(param->u.crypt.alg, "WEP") == 0) { | ||
6005 | request_module("ieee80211_crypt_wep"); | ||
6006 | ops = ieee80211_get_crypto_ops(param->u.crypt.alg); | ||
6007 | } else if (ops == NULL && strcmp(param->u.crypt.alg, "TKIP") == 0) { | ||
6008 | request_module("ieee80211_crypt_tkip"); | ||
6009 | ops = ieee80211_get_crypto_ops(param->u.crypt.alg); | ||
6010 | } else if (ops == NULL && strcmp(param->u.crypt.alg, "CCMP") == 0) { | ||
6011 | request_module("ieee80211_crypt_ccmp"); | ||
6012 | ops = ieee80211_get_crypto_ops(param->u.crypt.alg); | ||
6013 | } | ||
6014 | if (ops == NULL) { | ||
6015 | IPW_DEBUG_INFO("%s: unknown crypto alg '%s'\n", | ||
6016 | dev->name, param->u.crypt.alg); | ||
6017 | param->u.crypt.err = IPW2100_CRYPT_ERR_UNKNOWN_ALG; | ||
6018 | ret = -EINVAL; | ||
6019 | goto done; | ||
6020 | } | ||
6021 | |||
6022 | if (*crypt == NULL || (*crypt)->ops != ops) { | ||
6023 | struct ieee80211_crypt_data *new_crypt; | ||
6024 | |||
6025 | ieee80211_crypt_delayed_deinit(ieee, crypt); | ||
6026 | |||
6027 | new_crypt = (struct ieee80211_crypt_data *) | ||
6028 | kmalloc(sizeof(struct ieee80211_crypt_data), GFP_KERNEL); | ||
6029 | if (new_crypt == NULL) { | ||
6030 | ret = -ENOMEM; | ||
6031 | goto done; | ||
6032 | } | ||
6033 | memset(new_crypt, 0, sizeof(struct ieee80211_crypt_data)); | ||
6034 | new_crypt->ops = ops; | ||
6035 | if (new_crypt->ops && try_module_get(new_crypt->ops->owner)) | ||
6036 | new_crypt->priv = new_crypt->ops->init(param->u.crypt.idx); | ||
6037 | |||
6038 | if (new_crypt->priv == NULL) { | ||
6039 | kfree(new_crypt); | ||
6040 | param->u.crypt.err = | ||
6041 | IPW2100_CRYPT_ERR_CRYPT_INIT_FAILED; | ||
6042 | ret = -EINVAL; | ||
6043 | goto done; | ||
6044 | } | ||
6045 | |||
6046 | *crypt = new_crypt; | ||
6047 | } | ||
6048 | |||
6049 | if (param->u.crypt.key_len > 0 && (*crypt)->ops->set_key && | ||
6050 | (*crypt)->ops->set_key(param->u.crypt.key, | ||
6051 | param->u.crypt.key_len, param->u.crypt.seq, | ||
6052 | (*crypt)->priv) < 0) { | ||
6053 | IPW_DEBUG_INFO("%s: key setting failed\n", | ||
6054 | dev->name); | ||
6055 | param->u.crypt.err = IPW2100_CRYPT_ERR_KEY_SET_FAILED; | ||
6056 | ret = -EINVAL; | ||
6057 | goto done; | ||
6058 | } | ||
6059 | |||
6060 | if (param->u.crypt.set_tx){ | ||
6061 | ieee->tx_keyidx = param->u.crypt.idx; | ||
6062 | sec.active_key = param->u.crypt.idx; | ||
6063 | sec.flags |= SEC_ACTIVE_KEY; | ||
6064 | } | ||
6065 | |||
6066 | if (ops->name != NULL){ | ||
6067 | |||
6068 | if (strcmp(ops->name, "WEP") == 0) { | ||
6069 | memcpy(sec.keys[param->u.crypt.idx], param->u.crypt.key, param->u.crypt.key_len); | ||
6070 | sec.key_sizes[param->u.crypt.idx] = param->u.crypt.key_len; | ||
6071 | sec.flags |= (1 << param->u.crypt.idx); | ||
6072 | sec.flags |= SEC_LEVEL; | ||
6073 | sec.level = SEC_LEVEL_1; | ||
6074 | } else if (strcmp(ops->name, "TKIP") == 0) { | ||
6075 | sec.flags |= SEC_LEVEL; | ||
6076 | sec.level = SEC_LEVEL_2; | ||
6077 | } else if (strcmp(ops->name, "CCMP") == 0) { | ||
6078 | sec.flags |= SEC_LEVEL; | ||
6079 | sec.level = SEC_LEVEL_3; | ||
6080 | } | ||
6081 | } | ||
6082 | done: | ||
6083 | if (ieee->set_security) | ||
6084 | ieee->set_security(ieee->dev, &sec); | ||
6085 | |||
6086 | /* Do not reset port if card is in Managed mode since resetting will | ||
6087 | * generate new IEEE 802.11 authentication which may end up in looping | ||
6088 | * with IEEE 802.1X. If your hardware requires a reset after WEP | ||
6089 | * configuration (for example... Prism2), implement the reset_port in | ||
6090 | * the callbacks structures used to initialize the 802.11 stack. */ | ||
6091 | if (ieee->reset_on_keychange && | ||
6092 | ieee->iw_mode != IW_MODE_INFRA && | ||
6093 | ieee->reset_port && | ||
6094 | ieee->reset_port(dev)) { | ||
6095 | IPW_DEBUG_INFO("%s: reset_port failed\n", dev->name); | ||
6096 | param->u.crypt.err = IPW2100_CRYPT_ERR_CARD_CONF_FAILED; | ||
6097 | return -EINVAL; | ||
6098 | } | ||
6099 | |||
6100 | return ret; | ||
6101 | } | ||
6102 | |||
6103 | |||
6104 | static int ipw2100_wpa_supplicant(struct net_device *dev, struct iw_point *p){ | ||
6105 | |||
6106 | struct ipw2100_param *param; | ||
6107 | int ret=0; | ||
6108 | |||
6109 | IPW_DEBUG_IOCTL("wpa_supplicant: len=%d\n", p->length); | ||
6110 | |||
6111 | if (p->length < sizeof(struct ipw2100_param) || !p->pointer) | ||
6112 | return -EINVAL; | ||
6113 | |||
6114 | param = (struct ipw2100_param *)kmalloc(p->length, GFP_KERNEL); | ||
6115 | if (param == NULL) | ||
6116 | return -ENOMEM; | ||
6117 | |||
6118 | if (copy_from_user(param, p->pointer, p->length)){ | ||
6119 | kfree(param); | ||
6120 | return -EFAULT; | ||
6121 | } | ||
6122 | |||
6123 | switch (param->cmd){ | ||
6124 | |||
6125 | case IPW2100_CMD_SET_WPA_PARAM: | ||
6126 | ret = ipw2100_wpa_set_param(dev, param->u.wpa_param.name, | ||
6127 | param->u.wpa_param.value); | ||
6128 | break; | ||
6129 | |||
6130 | case IPW2100_CMD_SET_WPA_IE: | ||
6131 | ret = ipw2100_wpa_set_wpa_ie(dev, param, p->length); | ||
6132 | break; | ||
6133 | |||
6134 | case IPW2100_CMD_SET_ENCRYPTION: | ||
6135 | ret = ipw2100_wpa_set_encryption(dev, param, p->length); | ||
6136 | break; | ||
6137 | |||
6138 | case IPW2100_CMD_MLME: | ||
6139 | ret = ipw2100_wpa_mlme(dev, param->u.mlme.command, | ||
6140 | param->u.mlme.reason_code); | ||
6141 | break; | ||
6142 | |||
6143 | default: | ||
6144 | IPW_DEBUG_ERROR("%s: Unknown WPA supplicant request: %d\n", | ||
6145 | dev->name, param->cmd); | ||
6146 | ret = -EOPNOTSUPP; | ||
6147 | |||
6148 | } | ||
6149 | |||
6150 | if (ret == 0 && copy_to_user(p->pointer, param, p->length)) | ||
6151 | ret = -EFAULT; | ||
6152 | |||
6153 | kfree(param); | ||
6154 | return ret; | ||
6155 | } | ||
6156 | #endif /* CONFIG_IEEE80211_WPA */ | ||
6157 | |||
6158 | static int ipw2100_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) | ||
6159 | { | ||
6160 | #ifdef CONFIG_IEEE80211_WPA | ||
6161 | struct iwreq *wrq = (struct iwreq *) rq; | ||
6162 | int ret=-1; | ||
6163 | switch (cmd){ | ||
6164 | case IPW2100_IOCTL_WPA_SUPPLICANT: | ||
6165 | ret = ipw2100_wpa_supplicant(dev, &wrq->u.data); | ||
6166 | return ret; | ||
6167 | |||
6168 | default: | ||
6169 | return -EOPNOTSUPP; | ||
6170 | } | ||
6171 | |||
6172 | #endif /* CONFIG_IEEE80211_WPA */ | ||
6173 | |||
6174 | return -EOPNOTSUPP; | ||
6175 | } | ||
6176 | |||
6177 | |||
6178 | static void ipw_ethtool_get_drvinfo(struct net_device *dev, | ||
6179 | struct ethtool_drvinfo *info) | ||
6180 | { | ||
6181 | struct ipw2100_priv *priv = ieee80211_priv(dev); | ||
6182 | char fw_ver[64], ucode_ver[64]; | ||
6183 | |||
6184 | strcpy(info->driver, DRV_NAME); | ||
6185 | strcpy(info->version, DRV_VERSION); | ||
6186 | |||
6187 | ipw2100_get_fwversion(priv, fw_ver, sizeof(fw_ver)); | ||
6188 | ipw2100_get_ucodeversion(priv, ucode_ver, sizeof(ucode_ver)); | ||
6189 | |||
6190 | snprintf(info->fw_version, sizeof(info->fw_version), "%s:%d:%s", | ||
6191 | fw_ver, priv->eeprom_version, ucode_ver); | ||
6192 | |||
6193 | strcpy(info->bus_info, pci_name(priv->pci_dev)); | ||
6194 | } | ||
6195 | |||
6196 | static u32 ipw2100_ethtool_get_link(struct net_device *dev) | ||
6197 | { | ||
6198 | struct ipw2100_priv *priv = ieee80211_priv(dev); | ||
6199 | return (priv->status & STATUS_ASSOCIATED) ? 1 : 0; | ||
6200 | } | ||
6201 | |||
6202 | |||
6203 | static struct ethtool_ops ipw2100_ethtool_ops = { | ||
6204 | .get_link = ipw2100_ethtool_get_link, | ||
6205 | .get_drvinfo = ipw_ethtool_get_drvinfo, | ||
6206 | }; | ||
6207 | |||
6208 | static void ipw2100_hang_check(void *adapter) | ||
6209 | { | ||
6210 | struct ipw2100_priv *priv = adapter; | ||
6211 | unsigned long flags; | ||
6212 | u32 rtc = 0xa5a5a5a5; | ||
6213 | u32 len = sizeof(rtc); | ||
6214 | int restart = 0; | ||
6215 | |||
6216 | spin_lock_irqsave(&priv->low_lock, flags); | ||
6217 | |||
6218 | if (priv->fatal_error != 0) { | ||
6219 | /* If fatal_error is set then we need to restart */ | ||
6220 | IPW_DEBUG_INFO("%s: Hardware fatal error detected.\n", | ||
6221 | priv->net_dev->name); | ||
6222 | |||
6223 | restart = 1; | ||
6224 | } else if (ipw2100_get_ordinal(priv, IPW_ORD_RTC_TIME, &rtc, &len) || | ||
6225 | (rtc == priv->last_rtc)) { | ||
6226 | /* Check if firmware is hung */ | ||
6227 | IPW_DEBUG_INFO("%s: Firmware RTC stalled.\n", | ||
6228 | priv->net_dev->name); | ||
6229 | |||
6230 | restart = 1; | ||
6231 | } | ||
6232 | |||
6233 | if (restart) { | ||
6234 | /* Kill timer */ | ||
6235 | priv->stop_hang_check = 1; | ||
6236 | priv->hangs++; | ||
6237 | |||
6238 | /* Restart the NIC */ | ||
6239 | schedule_reset(priv); | ||
6240 | } | ||
6241 | |||
6242 | priv->last_rtc = rtc; | ||
6243 | |||
6244 | if (!priv->stop_hang_check) | ||
6245 | queue_delayed_work(priv->workqueue, &priv->hang_check, HZ / 2); | ||
6246 | |||
6247 | spin_unlock_irqrestore(&priv->low_lock, flags); | ||
6248 | } | ||
6249 | |||
6250 | |||
6251 | static void ipw2100_rf_kill(void *adapter) | ||
6252 | { | ||
6253 | struct ipw2100_priv *priv = adapter; | ||
6254 | unsigned long flags; | ||
6255 | |||
6256 | spin_lock_irqsave(&priv->low_lock, flags); | ||
6257 | |||
6258 | if (rf_kill_active(priv)) { | ||
6259 | IPW_DEBUG_RF_KILL("RF Kill active, rescheduling GPIO check\n"); | ||
6260 | if (!priv->stop_rf_kill) | ||
6261 | queue_delayed_work(priv->workqueue, &priv->rf_kill, HZ); | ||
6262 | goto exit_unlock; | ||
6263 | } | ||
6264 | |||
6265 | /* RF Kill is now disabled, so bring the device back up */ | ||
6266 | |||
6267 | if (!(priv->status & STATUS_RF_KILL_MASK)) { | ||
6268 | IPW_DEBUG_RF_KILL("HW RF Kill no longer active, restarting " | ||
6269 | "device\n"); | ||
6270 | schedule_reset(priv); | ||
6271 | } else | ||
6272 | IPW_DEBUG_RF_KILL("HW RF Kill deactivated. SW RF Kill still " | ||
6273 | "enabled\n"); | ||
6274 | |||
6275 | exit_unlock: | ||
6276 | spin_unlock_irqrestore(&priv->low_lock, flags); | ||
6277 | } | ||
6278 | |||
6279 | static void ipw2100_irq_tasklet(struct ipw2100_priv *priv); | ||
6280 | |||
6281 | /* Look into using netdev destructor to shutdown ieee80211? */ | ||
6282 | |||
6283 | static struct net_device *ipw2100_alloc_device( | ||
6284 | struct pci_dev *pci_dev, | ||
6285 | char *base_addr, | ||
6286 | unsigned long mem_start, | ||
6287 | unsigned long mem_len) | ||
6288 | { | ||
6289 | struct ipw2100_priv *priv; | ||
6290 | struct net_device *dev; | ||
6291 | |||
6292 | dev = alloc_ieee80211(sizeof(struct ipw2100_priv)); | ||
6293 | if (!dev) | ||
6294 | return NULL; | ||
6295 | priv = ieee80211_priv(dev); | ||
6296 | priv->ieee = netdev_priv(dev); | ||
6297 | priv->pci_dev = pci_dev; | ||
6298 | priv->net_dev = dev; | ||
6299 | |||
6300 | priv->ieee->hard_start_xmit = ipw2100_tx; | ||
6301 | priv->ieee->set_security = shim__set_security; | ||
6302 | |||
6303 | dev->open = ipw2100_open; | ||
6304 | dev->stop = ipw2100_close; | ||
6305 | dev->init = ipw2100_net_init; | ||
6306 | dev->do_ioctl = ipw2100_ioctl; | ||
6307 | dev->get_stats = ipw2100_stats; | ||
6308 | dev->ethtool_ops = &ipw2100_ethtool_ops; | ||
6309 | dev->tx_timeout = ipw2100_tx_timeout; | ||
6310 | dev->wireless_handlers = &ipw2100_wx_handler_def; | ||
6311 | dev->get_wireless_stats = ipw2100_wx_wireless_stats; | ||
6312 | dev->set_mac_address = ipw2100_set_address; | ||
6313 | dev->watchdog_timeo = 3*HZ; | ||
6314 | dev->irq = 0; | ||
6315 | |||
6316 | dev->base_addr = (unsigned long)base_addr; | ||
6317 | dev->mem_start = mem_start; | ||
6318 | dev->mem_end = dev->mem_start + mem_len - 1; | ||
6319 | |||
6320 | /* NOTE: We don't use the wireless_handlers hook | ||
6321 | * in dev as the system will start throwing WX requests | ||
6322 | * to us before we're actually initialized and it just | ||
6323 | * ends up causing problems. So, we just handle | ||
6324 | * the WX extensions through the ipw2100_ioctl interface */ | ||
6325 | |||
6326 | |||
6327 | /* memset() puts everything to 0, so we only have explicitely set | ||
6328 | * those values that need to be something else */ | ||
6329 | |||
6330 | /* If power management is turned on, default to AUTO mode */ | ||
6331 | priv->power_mode = IPW_POWER_AUTO; | ||
6332 | |||
6333 | |||
6334 | |||
6335 | #ifdef CONFIG_IEEE80211_WPA | ||
6336 | priv->ieee->wpa_enabled = 0; | ||
6337 | priv->ieee->tkip_countermeasures = 0; | ||
6338 | priv->ieee->drop_unencrypted = 0; | ||
6339 | priv->ieee->privacy_invoked = 0; | ||
6340 | priv->ieee->ieee802_1x = 1; | ||
6341 | #endif /* CONFIG_IEEE80211_WPA */ | ||
6342 | |||
6343 | /* Set module parameters */ | ||
6344 | switch (mode) { | ||
6345 | case 1: | ||
6346 | priv->ieee->iw_mode = IW_MODE_ADHOC; | ||
6347 | break; | ||
6348 | #ifdef CONFIG_IPW2100_MONITOR | ||
6349 | case 2: | ||
6350 | priv->ieee->iw_mode = IW_MODE_MONITOR; | ||
6351 | break; | ||
6352 | #endif | ||
6353 | default: | ||
6354 | case 0: | ||
6355 | priv->ieee->iw_mode = IW_MODE_INFRA; | ||
6356 | break; | ||
6357 | } | ||
6358 | |||
6359 | if (disable == 1) | ||
6360 | priv->status |= STATUS_RF_KILL_SW; | ||
6361 | |||
6362 | if (channel != 0 && | ||
6363 | ((channel >= REG_MIN_CHANNEL) && | ||
6364 | (channel <= REG_MAX_CHANNEL))) { | ||
6365 | priv->config |= CFG_STATIC_CHANNEL; | ||
6366 | priv->channel = channel; | ||
6367 | } | ||
6368 | |||
6369 | if (associate) | ||
6370 | priv->config |= CFG_ASSOCIATE; | ||
6371 | |||
6372 | priv->beacon_interval = DEFAULT_BEACON_INTERVAL; | ||
6373 | priv->short_retry_limit = DEFAULT_SHORT_RETRY_LIMIT; | ||
6374 | priv->long_retry_limit = DEFAULT_LONG_RETRY_LIMIT; | ||
6375 | priv->rts_threshold = DEFAULT_RTS_THRESHOLD | RTS_DISABLED; | ||
6376 | priv->frag_threshold = DEFAULT_FTS | FRAG_DISABLED; | ||
6377 | priv->tx_power = IPW_TX_POWER_DEFAULT; | ||
6378 | priv->tx_rates = DEFAULT_TX_RATES; | ||
6379 | |||
6380 | strcpy(priv->nick, "ipw2100"); | ||
6381 | |||
6382 | spin_lock_init(&priv->low_lock); | ||
6383 | sema_init(&priv->action_sem, 1); | ||
6384 | sema_init(&priv->adapter_sem, 1); | ||
6385 | |||
6386 | init_waitqueue_head(&priv->wait_command_queue); | ||
6387 | |||
6388 | netif_carrier_off(dev); | ||
6389 | |||
6390 | INIT_LIST_HEAD(&priv->msg_free_list); | ||
6391 | INIT_LIST_HEAD(&priv->msg_pend_list); | ||
6392 | INIT_STAT(&priv->msg_free_stat); | ||
6393 | INIT_STAT(&priv->msg_pend_stat); | ||
6394 | |||
6395 | INIT_LIST_HEAD(&priv->tx_free_list); | ||
6396 | INIT_LIST_HEAD(&priv->tx_pend_list); | ||
6397 | INIT_STAT(&priv->tx_free_stat); | ||
6398 | INIT_STAT(&priv->tx_pend_stat); | ||
6399 | |||
6400 | INIT_LIST_HEAD(&priv->fw_pend_list); | ||
6401 | INIT_STAT(&priv->fw_pend_stat); | ||
6402 | |||
6403 | |||
6404 | #ifdef CONFIG_SOFTWARE_SUSPEND2 | ||
6405 | priv->workqueue = create_workqueue(DRV_NAME, 0); | ||
6406 | #else | ||
6407 | priv->workqueue = create_workqueue(DRV_NAME); | ||
6408 | #endif | ||
6409 | INIT_WORK(&priv->reset_work, | ||
6410 | (void (*)(void *))ipw2100_reset_adapter, priv); | ||
6411 | INIT_WORK(&priv->security_work, | ||
6412 | (void (*)(void *))ipw2100_security_work, priv); | ||
6413 | INIT_WORK(&priv->wx_event_work, | ||
6414 | (void (*)(void *))ipw2100_wx_event_work, priv); | ||
6415 | INIT_WORK(&priv->hang_check, ipw2100_hang_check, priv); | ||
6416 | INIT_WORK(&priv->rf_kill, ipw2100_rf_kill, priv); | ||
6417 | |||
6418 | tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long)) | ||
6419 | ipw2100_irq_tasklet, (unsigned long)priv); | ||
6420 | |||
6421 | /* NOTE: We do not start the deferred work for status checks yet */ | ||
6422 | priv->stop_rf_kill = 1; | ||
6423 | priv->stop_hang_check = 1; | ||
6424 | |||
6425 | return dev; | ||
6426 | } | ||
6427 | |||
6428 | |||
6429 | |||
6430 | #define PCI_DMA_32BIT 0x00000000ffffffffULL | ||
6431 | |||
6432 | static int ipw2100_pci_init_one(struct pci_dev *pci_dev, | ||
6433 | const struct pci_device_id *ent) | ||
6434 | { | ||
6435 | unsigned long mem_start, mem_len, mem_flags; | ||
6436 | char *base_addr = NULL; | ||
6437 | struct net_device *dev = NULL; | ||
6438 | struct ipw2100_priv *priv = NULL; | ||
6439 | int err = 0; | ||
6440 | int registered = 0; | ||
6441 | u32 val; | ||
6442 | |||
6443 | IPW_DEBUG_INFO("enter\n"); | ||
6444 | |||
6445 | mem_start = pci_resource_start(pci_dev, 0); | ||
6446 | mem_len = pci_resource_len(pci_dev, 0); | ||
6447 | mem_flags = pci_resource_flags(pci_dev, 0); | ||
6448 | |||
6449 | if ((mem_flags & IORESOURCE_MEM) != IORESOURCE_MEM) { | ||
6450 | IPW_DEBUG_INFO("weird - resource type is not memory\n"); | ||
6451 | err = -ENODEV; | ||
6452 | goto fail; | ||
6453 | } | ||
6454 | |||
6455 | base_addr = ioremap_nocache(mem_start, mem_len); | ||
6456 | if (!base_addr) { | ||
6457 | printk(KERN_WARNING DRV_NAME | ||
6458 | "Error calling ioremap_nocache.\n"); | ||
6459 | err = -EIO; | ||
6460 | goto fail; | ||
6461 | } | ||
6462 | |||
6463 | /* allocate and initialize our net_device */ | ||
6464 | dev = ipw2100_alloc_device(pci_dev, base_addr, mem_start, mem_len); | ||
6465 | if (!dev) { | ||
6466 | printk(KERN_WARNING DRV_NAME | ||
6467 | "Error calling ipw2100_alloc_device.\n"); | ||
6468 | err = -ENOMEM; | ||
6469 | goto fail; | ||
6470 | } | ||
6471 | |||
6472 | /* set up PCI mappings for device */ | ||
6473 | err = pci_enable_device(pci_dev); | ||
6474 | if (err) { | ||
6475 | printk(KERN_WARNING DRV_NAME | ||
6476 | "Error calling pci_enable_device.\n"); | ||
6477 | return err; | ||
6478 | } | ||
6479 | |||
6480 | priv = ieee80211_priv(dev); | ||
6481 | |||
6482 | pci_set_master(pci_dev); | ||
6483 | pci_set_drvdata(pci_dev, priv); | ||
6484 | |||
6485 | err = pci_set_dma_mask(pci_dev, PCI_DMA_32BIT); | ||
6486 | if (err) { | ||
6487 | printk(KERN_WARNING DRV_NAME | ||
6488 | "Error calling pci_set_dma_mask.\n"); | ||
6489 | pci_disable_device(pci_dev); | ||
6490 | return err; | ||
6491 | } | ||
6492 | |||
6493 | err = pci_request_regions(pci_dev, DRV_NAME); | ||
6494 | if (err) { | ||
6495 | printk(KERN_WARNING DRV_NAME | ||
6496 | "Error calling pci_request_regions.\n"); | ||
6497 | pci_disable_device(pci_dev); | ||
6498 | return err; | ||
6499 | } | ||
6500 | |||
6501 | /* We disable the RETRY_TIMEOUT register (0x41) to keep | ||
6502 | * PCI Tx retries from interfering with C3 CPU state */ | ||
6503 | pci_read_config_dword(pci_dev, 0x40, &val); | ||
6504 | if ((val & 0x0000ff00) != 0) | ||
6505 | pci_write_config_dword(pci_dev, 0x40, val & 0xffff00ff); | ||
6506 | |||
6507 | pci_set_power_state(pci_dev, 0); | ||
6508 | |||
6509 | if (!ipw2100_hw_is_adapter_in_system(dev)) { | ||
6510 | printk(KERN_WARNING DRV_NAME | ||
6511 | "Device not found via register read.\n"); | ||
6512 | err = -ENODEV; | ||
6513 | goto fail; | ||
6514 | } | ||
6515 | |||
6516 | SET_NETDEV_DEV(dev, &pci_dev->dev); | ||
6517 | |||
6518 | /* Force interrupts to be shut off on the device */ | ||
6519 | priv->status |= STATUS_INT_ENABLED; | ||
6520 | ipw2100_disable_interrupts(priv); | ||
6521 | |||
6522 | /* Allocate and initialize the Tx/Rx queues and lists */ | ||
6523 | if (ipw2100_queues_allocate(priv)) { | ||
6524 | printk(KERN_WARNING DRV_NAME | ||
6525 | "Error calilng ipw2100_queues_allocate.\n"); | ||
6526 | err = -ENOMEM; | ||
6527 | goto fail; | ||
6528 | } | ||
6529 | ipw2100_queues_initialize(priv); | ||
6530 | |||
6531 | err = request_irq(pci_dev->irq, | ||
6532 | ipw2100_interrupt, SA_SHIRQ, | ||
6533 | dev->name, priv); | ||
6534 | if (err) { | ||
6535 | printk(KERN_WARNING DRV_NAME | ||
6536 | "Error calling request_irq: %d.\n", | ||
6537 | pci_dev->irq); | ||
6538 | goto fail; | ||
6539 | } | ||
6540 | dev->irq = pci_dev->irq; | ||
6541 | |||
6542 | IPW_DEBUG_INFO("Attempting to register device...\n"); | ||
6543 | |||
6544 | SET_MODULE_OWNER(dev); | ||
6545 | |||
6546 | printk(KERN_INFO DRV_NAME | ||
6547 | ": Detected Intel PRO/Wireless 2100 Network Connection\n"); | ||
6548 | |||
6549 | /* Bring up the interface. Pre 0.46, after we registered the | ||
6550 | * network device we would call ipw2100_up. This introduced a race | ||
6551 | * condition with newer hotplug configurations (network was coming | ||
6552 | * up and making calls before the device was initialized). | ||
6553 | * | ||
6554 | * If we called ipw2100_up before we registered the device, then the | ||
6555 | * device name wasn't registered. So, we instead use the net_dev->init | ||
6556 | * member to call a function that then just turns and calls ipw2100_up. | ||
6557 | * net_dev->init is called after name allocation but before the | ||
6558 | * notifier chain is called */ | ||
6559 | down(&priv->action_sem); | ||
6560 | err = register_netdev(dev); | ||
6561 | if (err) { | ||
6562 | printk(KERN_WARNING DRV_NAME | ||
6563 | "Error calling register_netdev.\n"); | ||
6564 | goto fail_unlock; | ||
6565 | } | ||
6566 | registered = 1; | ||
6567 | |||
6568 | IPW_DEBUG_INFO("%s: Bound to %s\n", dev->name, pci_name(pci_dev)); | ||
6569 | |||
6570 | /* perform this after register_netdev so that dev->name is set */ | ||
6571 | sysfs_create_group(&pci_dev->dev.kobj, &ipw2100_attribute_group); | ||
6572 | netif_carrier_off(dev); | ||
6573 | |||
6574 | /* If the RF Kill switch is disabled, go ahead and complete the | ||
6575 | * startup sequence */ | ||
6576 | if (!(priv->status & STATUS_RF_KILL_MASK)) { | ||
6577 | /* Enable the adapter - sends HOST_COMPLETE */ | ||
6578 | if (ipw2100_enable_adapter(priv)) { | ||
6579 | printk(KERN_WARNING DRV_NAME | ||
6580 | ": %s: failed in call to enable adapter.\n", | ||
6581 | priv->net_dev->name); | ||
6582 | ipw2100_hw_stop_adapter(priv); | ||
6583 | err = -EIO; | ||
6584 | goto fail_unlock; | ||
6585 | } | ||
6586 | |||
6587 | /* Start a scan . . . */ | ||
6588 | ipw2100_set_scan_options(priv); | ||
6589 | ipw2100_start_scan(priv); | ||
6590 | } | ||
6591 | |||
6592 | IPW_DEBUG_INFO("exit\n"); | ||
6593 | |||
6594 | priv->status |= STATUS_INITIALIZED; | ||
6595 | |||
6596 | up(&priv->action_sem); | ||
6597 | |||
6598 | return 0; | ||
6599 | |||
6600 | fail_unlock: | ||
6601 | up(&priv->action_sem); | ||
6602 | |||
6603 | fail: | ||
6604 | if (dev) { | ||
6605 | if (registered) | ||
6606 | unregister_netdev(dev); | ||
6607 | |||
6608 | ipw2100_hw_stop_adapter(priv); | ||
6609 | |||
6610 | ipw2100_disable_interrupts(priv); | ||
6611 | |||
6612 | if (dev->irq) | ||
6613 | free_irq(dev->irq, priv); | ||
6614 | |||
6615 | ipw2100_kill_workqueue(priv); | ||
6616 | |||
6617 | /* These are safe to call even if they weren't allocated */ | ||
6618 | ipw2100_queues_free(priv); | ||
6619 | sysfs_remove_group(&pci_dev->dev.kobj, &ipw2100_attribute_group); | ||
6620 | |||
6621 | free_ieee80211(dev); | ||
6622 | pci_set_drvdata(pci_dev, NULL); | ||
6623 | } | ||
6624 | |||
6625 | if (base_addr) | ||
6626 | iounmap((char*)base_addr); | ||
6627 | |||
6628 | pci_release_regions(pci_dev); | ||
6629 | pci_disable_device(pci_dev); | ||
6630 | |||
6631 | return err; | ||
6632 | } | ||
6633 | |||
6634 | static void __devexit ipw2100_pci_remove_one(struct pci_dev *pci_dev) | ||
6635 | { | ||
6636 | struct ipw2100_priv *priv = pci_get_drvdata(pci_dev); | ||
6637 | struct net_device *dev; | ||
6638 | |||
6639 | if (priv) { | ||
6640 | down(&priv->action_sem); | ||
6641 | |||
6642 | priv->status &= ~STATUS_INITIALIZED; | ||
6643 | |||
6644 | dev = priv->net_dev; | ||
6645 | sysfs_remove_group(&pci_dev->dev.kobj, &ipw2100_attribute_group); | ||
6646 | |||
6647 | #ifdef CONFIG_PM | ||
6648 | if (ipw2100_firmware.version) | ||
6649 | ipw2100_release_firmware(priv, &ipw2100_firmware); | ||
6650 | #endif | ||
6651 | /* Take down the hardware */ | ||
6652 | ipw2100_down(priv); | ||
6653 | |||
6654 | /* Release the semaphore so that the network subsystem can | ||
6655 | * complete any needed calls into the driver... */ | ||
6656 | up(&priv->action_sem); | ||
6657 | |||
6658 | /* Unregister the device first - this results in close() | ||
6659 | * being called if the device is open. If we free storage | ||
6660 | * first, then close() will crash. */ | ||
6661 | unregister_netdev(dev); | ||
6662 | |||
6663 | /* ipw2100_down will ensure that there is no more pending work | ||
6664 | * in the workqueue's, so we can safely remove them now. */ | ||
6665 | ipw2100_kill_workqueue(priv); | ||
6666 | |||
6667 | ipw2100_queues_free(priv); | ||
6668 | |||
6669 | /* Free potential debugging firmware snapshot */ | ||
6670 | ipw2100_snapshot_free(priv); | ||
6671 | |||
6672 | if (dev->irq) | ||
6673 | free_irq(dev->irq, priv); | ||
6674 | |||
6675 | if (dev->base_addr) | ||
6676 | iounmap((unsigned char *)dev->base_addr); | ||
6677 | |||
6678 | free_ieee80211(dev); | ||
6679 | } | ||
6680 | |||
6681 | pci_release_regions(pci_dev); | ||
6682 | pci_disable_device(pci_dev); | ||
6683 | |||
6684 | IPW_DEBUG_INFO("exit\n"); | ||
6685 | } | ||
6686 | |||
6687 | |||
6688 | #ifdef CONFIG_PM | ||
6689 | #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,11) | ||
6690 | static int ipw2100_suspend(struct pci_dev *pci_dev, u32 state) | ||
6691 | #else | ||
6692 | static int ipw2100_suspend(struct pci_dev *pci_dev, pm_message_t state) | ||
6693 | #endif | ||
6694 | { | ||
6695 | struct ipw2100_priv *priv = pci_get_drvdata(pci_dev); | ||
6696 | struct net_device *dev = priv->net_dev; | ||
6697 | |||
6698 | IPW_DEBUG_INFO("%s: Going into suspend...\n", | ||
6699 | dev->name); | ||
6700 | |||
6701 | down(&priv->action_sem); | ||
6702 | if (priv->status & STATUS_INITIALIZED) { | ||
6703 | /* Take down the device; powers it off, etc. */ | ||
6704 | ipw2100_down(priv); | ||
6705 | } | ||
6706 | |||
6707 | /* Remove the PRESENT state of the device */ | ||
6708 | netif_device_detach(dev); | ||
6709 | |||
6710 | #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,10) | ||
6711 | pci_save_state(pci_dev, priv->pm_state); | ||
6712 | #else | ||
6713 | pci_save_state(pci_dev); | ||
6714 | #endif | ||
6715 | pci_disable_device (pci_dev); | ||
6716 | #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,11) | ||
6717 | pci_set_power_state(pci_dev, state); | ||
6718 | #else | ||
6719 | pci_set_power_state(pci_dev, PCI_D3hot); | ||
6720 | #endif | ||
6721 | |||
6722 | up(&priv->action_sem); | ||
6723 | |||
6724 | return 0; | ||
6725 | } | ||
6726 | |||
6727 | static int ipw2100_resume(struct pci_dev *pci_dev) | ||
6728 | { | ||
6729 | struct ipw2100_priv *priv = pci_get_drvdata(pci_dev); | ||
6730 | struct net_device *dev = priv->net_dev; | ||
6731 | u32 val; | ||
6732 | |||
6733 | if (IPW2100_PM_DISABLED) | ||
6734 | return 0; | ||
6735 | |||
6736 | down(&priv->action_sem); | ||
6737 | |||
6738 | IPW_DEBUG_INFO("%s: Coming out of suspend...\n", | ||
6739 | dev->name); | ||
6740 | |||
6741 | #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,11) | ||
6742 | pci_set_power_state(pci_dev, 0); | ||
6743 | #else | ||
6744 | pci_set_power_state(pci_dev, PCI_D0); | ||
6745 | #endif | ||
6746 | pci_enable_device(pci_dev); | ||
6747 | #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,10) | ||
6748 | pci_restore_state(pci_dev, priv->pm_state); | ||
6749 | #else | ||
6750 | pci_restore_state(pci_dev); | ||
6751 | #endif | ||
6752 | |||
6753 | /* | ||
6754 | * Suspend/Resume resets the PCI configuration space, so we have to | ||
6755 | * re-disable the RETRY_TIMEOUT register (0x41) to keep PCI Tx retries | ||
6756 | * from interfering with C3 CPU state. pci_restore_state won't help | ||
6757 | * here since it only restores the first 64 bytes pci config header. | ||
6758 | */ | ||
6759 | pci_read_config_dword(pci_dev, 0x40, &val); | ||
6760 | if ((val & 0x0000ff00) != 0) | ||
6761 | pci_write_config_dword(pci_dev, 0x40, val & 0xffff00ff); | ||
6762 | |||
6763 | /* Set the device back into the PRESENT state; this will also wake | ||
6764 | * the queue of needed */ | ||
6765 | netif_device_attach(dev); | ||
6766 | |||
6767 | /* Bring the device back up */ | ||
6768 | if (!(priv->status & STATUS_RF_KILL_SW)) | ||
6769 | ipw2100_up(priv, 0); | ||
6770 | |||
6771 | up(&priv->action_sem); | ||
6772 | |||
6773 | return 0; | ||
6774 | } | ||
6775 | #endif | ||
6776 | |||
6777 | |||
6778 | #define IPW2100_DEV_ID(x) { PCI_VENDOR_ID_INTEL, 0x1043, 0x8086, x } | ||
6779 | |||
6780 | static struct pci_device_id ipw2100_pci_id_table[] __devinitdata = { | ||
6781 | IPW2100_DEV_ID(0x2520), /* IN 2100A mPCI 3A */ | ||
6782 | IPW2100_DEV_ID(0x2521), /* IN 2100A mPCI 3B */ | ||
6783 | IPW2100_DEV_ID(0x2524), /* IN 2100A mPCI 3B */ | ||
6784 | IPW2100_DEV_ID(0x2525), /* IN 2100A mPCI 3B */ | ||
6785 | IPW2100_DEV_ID(0x2526), /* IN 2100A mPCI Gen A3 */ | ||
6786 | IPW2100_DEV_ID(0x2522), /* IN 2100 mPCI 3B */ | ||
6787 | IPW2100_DEV_ID(0x2523), /* IN 2100 mPCI 3A */ | ||
6788 | IPW2100_DEV_ID(0x2527), /* IN 2100 mPCI 3B */ | ||
6789 | IPW2100_DEV_ID(0x2528), /* IN 2100 mPCI 3B */ | ||
6790 | IPW2100_DEV_ID(0x2529), /* IN 2100 mPCI 3B */ | ||
6791 | IPW2100_DEV_ID(0x252B), /* IN 2100 mPCI 3A */ | ||
6792 | IPW2100_DEV_ID(0x252C), /* IN 2100 mPCI 3A */ | ||
6793 | IPW2100_DEV_ID(0x252D), /* IN 2100 mPCI 3A */ | ||
6794 | |||
6795 | IPW2100_DEV_ID(0x2550), /* IB 2100A mPCI 3B */ | ||
6796 | IPW2100_DEV_ID(0x2551), /* IB 2100 mPCI 3B */ | ||
6797 | IPW2100_DEV_ID(0x2553), /* IB 2100 mPCI 3B */ | ||
6798 | IPW2100_DEV_ID(0x2554), /* IB 2100 mPCI 3B */ | ||
6799 | IPW2100_DEV_ID(0x2555), /* IB 2100 mPCI 3B */ | ||
6800 | |||
6801 | IPW2100_DEV_ID(0x2560), /* DE 2100A mPCI 3A */ | ||
6802 | IPW2100_DEV_ID(0x2562), /* DE 2100A mPCI 3A */ | ||
6803 | IPW2100_DEV_ID(0x2563), /* DE 2100A mPCI 3A */ | ||
6804 | IPW2100_DEV_ID(0x2561), /* DE 2100 mPCI 3A */ | ||
6805 | IPW2100_DEV_ID(0x2565), /* DE 2100 mPCI 3A */ | ||
6806 | IPW2100_DEV_ID(0x2566), /* DE 2100 mPCI 3A */ | ||
6807 | IPW2100_DEV_ID(0x2567), /* DE 2100 mPCI 3A */ | ||
6808 | |||
6809 | IPW2100_DEV_ID(0x2570), /* GA 2100 mPCI 3B */ | ||
6810 | |||
6811 | IPW2100_DEV_ID(0x2580), /* TO 2100A mPCI 3B */ | ||
6812 | IPW2100_DEV_ID(0x2582), /* TO 2100A mPCI 3B */ | ||
6813 | IPW2100_DEV_ID(0x2583), /* TO 2100A mPCI 3B */ | ||
6814 | IPW2100_DEV_ID(0x2581), /* TO 2100 mPCI 3B */ | ||
6815 | IPW2100_DEV_ID(0x2585), /* TO 2100 mPCI 3B */ | ||
6816 | IPW2100_DEV_ID(0x2586), /* TO 2100 mPCI 3B */ | ||
6817 | IPW2100_DEV_ID(0x2587), /* TO 2100 mPCI 3B */ | ||
6818 | |||
6819 | IPW2100_DEV_ID(0x2590), /* SO 2100A mPCI 3B */ | ||
6820 | IPW2100_DEV_ID(0x2592), /* SO 2100A mPCI 3B */ | ||
6821 | IPW2100_DEV_ID(0x2591), /* SO 2100 mPCI 3B */ | ||
6822 | IPW2100_DEV_ID(0x2593), /* SO 2100 mPCI 3B */ | ||
6823 | IPW2100_DEV_ID(0x2596), /* SO 2100 mPCI 3B */ | ||
6824 | IPW2100_DEV_ID(0x2598), /* SO 2100 mPCI 3B */ | ||
6825 | |||
6826 | IPW2100_DEV_ID(0x25A0), /* HP 2100 mPCI 3B */ | ||
6827 | {0,}, | ||
6828 | }; | ||
6829 | |||
6830 | MODULE_DEVICE_TABLE(pci, ipw2100_pci_id_table); | ||
6831 | |||
6832 | static struct pci_driver ipw2100_pci_driver = { | ||
6833 | .name = DRV_NAME, | ||
6834 | .id_table = ipw2100_pci_id_table, | ||
6835 | .probe = ipw2100_pci_init_one, | ||
6836 | .remove = __devexit_p(ipw2100_pci_remove_one), | ||
6837 | #ifdef CONFIG_PM | ||
6838 | .suspend = ipw2100_suspend, | ||
6839 | .resume = ipw2100_resume, | ||
6840 | #endif | ||
6841 | }; | ||
6842 | |||
6843 | |||
6844 | /** | ||
6845 | * Initialize the ipw2100 driver/module | ||
6846 | * | ||
6847 | * @returns 0 if ok, < 0 errno node con error. | ||
6848 | * | ||
6849 | * Note: we cannot init the /proc stuff until the PCI driver is there, | ||
6850 | * or we risk an unlikely race condition on someone accessing | ||
6851 | * uninitialized data in the PCI dev struct through /proc. | ||
6852 | */ | ||
6853 | static int __init ipw2100_init(void) | ||
6854 | { | ||
6855 | int ret; | ||
6856 | |||
6857 | printk(KERN_INFO DRV_NAME ": %s, %s\n", DRV_DESCRIPTION, DRV_VERSION); | ||
6858 | printk(KERN_INFO DRV_NAME ": %s\n", DRV_COPYRIGHT); | ||
6859 | |||
6860 | #ifdef CONFIG_IEEE80211_NOWEP | ||
6861 | IPW_DEBUG_INFO(DRV_NAME ": Compiled with WEP disabled.\n"); | ||
6862 | #endif | ||
6863 | |||
6864 | ret = pci_module_init(&ipw2100_pci_driver); | ||
6865 | |||
6866 | #ifdef CONFIG_IPW_DEBUG | ||
6867 | ipw2100_debug_level = debug; | ||
6868 | driver_create_file(&ipw2100_pci_driver.driver, | ||
6869 | &driver_attr_debug_level); | ||
6870 | #endif | ||
6871 | |||
6872 | return ret; | ||
6873 | } | ||
6874 | |||
6875 | |||
6876 | /** | ||
6877 | * Cleanup ipw2100 driver registration | ||
6878 | */ | ||
6879 | static void __exit ipw2100_exit(void) | ||
6880 | { | ||
6881 | /* FIXME: IPG: check that we have no instances of the devices open */ | ||
6882 | #ifdef CONFIG_IPW_DEBUG | ||
6883 | driver_remove_file(&ipw2100_pci_driver.driver, | ||
6884 | &driver_attr_debug_level); | ||
6885 | #endif | ||
6886 | pci_unregister_driver(&ipw2100_pci_driver); | ||
6887 | } | ||
6888 | |||
6889 | module_init(ipw2100_init); | ||
6890 | module_exit(ipw2100_exit); | ||
6891 | |||
6892 | #define WEXT_USECHANNELS 1 | ||
6893 | |||
6894 | const long ipw2100_frequencies[] = { | ||
6895 | 2412, 2417, 2422, 2427, | ||
6896 | 2432, 2437, 2442, 2447, | ||
6897 | 2452, 2457, 2462, 2467, | ||
6898 | 2472, 2484 | ||
6899 | }; | ||
6900 | |||
6901 | #define FREQ_COUNT (sizeof(ipw2100_frequencies) / \ | ||
6902 | sizeof(ipw2100_frequencies[0])) | ||
6903 | |||
6904 | const long ipw2100_rates_11b[] = { | ||
6905 | 1000000, | ||
6906 | 2000000, | ||
6907 | 5500000, | ||
6908 | 11000000 | ||
6909 | }; | ||
6910 | |||
6911 | #define RATE_COUNT (sizeof(ipw2100_rates_11b) / sizeof(ipw2100_rates_11b[0])) | ||
6912 | |||
6913 | static int ipw2100_wx_get_name(struct net_device *dev, | ||
6914 | struct iw_request_info *info, | ||
6915 | union iwreq_data *wrqu, char *extra) | ||
6916 | { | ||
6917 | /* | ||
6918 | * This can be called at any time. No action lock required | ||
6919 | */ | ||
6920 | |||
6921 | struct ipw2100_priv *priv = ieee80211_priv(dev); | ||
6922 | if (!(priv->status & STATUS_ASSOCIATED)) | ||
6923 | strcpy(wrqu->name, "unassociated"); | ||
6924 | else | ||
6925 | snprintf(wrqu->name, IFNAMSIZ, "IEEE 802.11b"); | ||
6926 | |||
6927 | IPW_DEBUG_WX("Name: %s\n", wrqu->name); | ||
6928 | return 0; | ||
6929 | } | ||
6930 | |||
6931 | |||
6932 | static int ipw2100_wx_set_freq(struct net_device *dev, | ||
6933 | struct iw_request_info *info, | ||
6934 | union iwreq_data *wrqu, char *extra) | ||
6935 | { | ||
6936 | struct ipw2100_priv *priv = ieee80211_priv(dev); | ||
6937 | struct iw_freq *fwrq = &wrqu->freq; | ||
6938 | int err = 0; | ||
6939 | |||
6940 | if (priv->ieee->iw_mode == IW_MODE_INFRA) | ||
6941 | return -EOPNOTSUPP; | ||
6942 | |||
6943 | down(&priv->action_sem); | ||
6944 | if (!(priv->status & STATUS_INITIALIZED)) { | ||
6945 | err = -EIO; | ||
6946 | goto done; | ||
6947 | } | ||
6948 | |||
6949 | /* if setting by freq convert to channel */ | ||
6950 | if (fwrq->e == 1) { | ||
6951 | if ((fwrq->m >= (int) 2.412e8 && | ||
6952 | fwrq->m <= (int) 2.487e8)) { | ||
6953 | int f = fwrq->m / 100000; | ||
6954 | int c = 0; | ||
6955 | |||
6956 | while ((c < REG_MAX_CHANNEL) && | ||
6957 | (f != ipw2100_frequencies[c])) | ||
6958 | c++; | ||
6959 | |||
6960 | /* hack to fall through */ | ||
6961 | fwrq->e = 0; | ||
6962 | fwrq->m = c + 1; | ||
6963 | } | ||
6964 | } | ||
6965 | |||
6966 | if (fwrq->e > 0 || fwrq->m > 1000) | ||
6967 | return -EOPNOTSUPP; | ||
6968 | else { /* Set the channel */ | ||
6969 | IPW_DEBUG_WX("SET Freq/Channel -> %d \n", fwrq->m); | ||
6970 | err = ipw2100_set_channel(priv, fwrq->m, 0); | ||
6971 | } | ||
6972 | |||
6973 | done: | ||
6974 | up(&priv->action_sem); | ||
6975 | return err; | ||
6976 | } | ||
6977 | |||
6978 | |||
6979 | static int ipw2100_wx_get_freq(struct net_device *dev, | ||
6980 | struct iw_request_info *info, | ||
6981 | union iwreq_data *wrqu, char *extra) | ||
6982 | { | ||
6983 | /* | ||
6984 | * This can be called at any time. No action lock required | ||
6985 | */ | ||
6986 | |||
6987 | struct ipw2100_priv *priv = ieee80211_priv(dev); | ||
6988 | |||
6989 | wrqu->freq.e = 0; | ||
6990 | |||
6991 | /* If we are associated, trying to associate, or have a statically | ||
6992 | * configured CHANNEL then return that; otherwise return ANY */ | ||
6993 | if (priv->config & CFG_STATIC_CHANNEL || | ||
6994 | priv->status & STATUS_ASSOCIATED) | ||
6995 | wrqu->freq.m = priv->channel; | ||
6996 | else | ||
6997 | wrqu->freq.m = 0; | ||
6998 | |||
6999 | IPW_DEBUG_WX("GET Freq/Channel -> %d \n", priv->channel); | ||
7000 | return 0; | ||
7001 | |||
7002 | } | ||
7003 | |||
7004 | static int ipw2100_wx_set_mode(struct net_device *dev, | ||
7005 | struct iw_request_info *info, | ||
7006 | union iwreq_data *wrqu, char *extra) | ||
7007 | { | ||
7008 | struct ipw2100_priv *priv = ieee80211_priv(dev); | ||
7009 | int err = 0; | ||
7010 | |||
7011 | IPW_DEBUG_WX("SET Mode -> %d \n", wrqu->mode); | ||
7012 | |||
7013 | if (wrqu->mode == priv->ieee->iw_mode) | ||
7014 | return 0; | ||
7015 | |||
7016 | down(&priv->action_sem); | ||
7017 | if (!(priv->status & STATUS_INITIALIZED)) { | ||
7018 | err = -EIO; | ||
7019 | goto done; | ||
7020 | } | ||
7021 | |||
7022 | switch (wrqu->mode) { | ||
7023 | #ifdef CONFIG_IPW2100_MONITOR | ||
7024 | case IW_MODE_MONITOR: | ||
7025 | err = ipw2100_switch_mode(priv, IW_MODE_MONITOR); | ||
7026 | break; | ||
7027 | #endif /* CONFIG_IPW2100_MONITOR */ | ||
7028 | case IW_MODE_ADHOC: | ||
7029 | err = ipw2100_switch_mode(priv, IW_MODE_ADHOC); | ||
7030 | break; | ||
7031 | case IW_MODE_INFRA: | ||
7032 | case IW_MODE_AUTO: | ||
7033 | default: | ||
7034 | err = ipw2100_switch_mode(priv, IW_MODE_INFRA); | ||
7035 | break; | ||
7036 | } | ||
7037 | |||
7038 | done: | ||
7039 | up(&priv->action_sem); | ||
7040 | return err; | ||
7041 | } | ||
7042 | |||
7043 | static int ipw2100_wx_get_mode(struct net_device *dev, | ||
7044 | struct iw_request_info *info, | ||
7045 | union iwreq_data *wrqu, char *extra) | ||
7046 | { | ||
7047 | /* | ||
7048 | * This can be called at any time. No action lock required | ||
7049 | */ | ||
7050 | |||
7051 | struct ipw2100_priv *priv = ieee80211_priv(dev); | ||
7052 | |||
7053 | wrqu->mode = priv->ieee->iw_mode; | ||
7054 | IPW_DEBUG_WX("GET Mode -> %d\n", wrqu->mode); | ||
7055 | |||
7056 | return 0; | ||
7057 | } | ||
7058 | |||
7059 | |||
7060 | #define POWER_MODES 5 | ||
7061 | |||
7062 | /* Values are in microsecond */ | ||
7063 | const s32 timeout_duration[POWER_MODES] = { | ||
7064 | 350000, | ||
7065 | 250000, | ||
7066 | 75000, | ||
7067 | 37000, | ||
7068 | 25000, | ||
7069 | }; | ||
7070 | |||
7071 | const s32 period_duration[POWER_MODES] = { | ||
7072 | 400000, | ||
7073 | 700000, | ||
7074 | 1000000, | ||
7075 | 1000000, | ||
7076 | 1000000 | ||
7077 | }; | ||
7078 | |||
7079 | static int ipw2100_wx_get_range(struct net_device *dev, | ||
7080 | struct iw_request_info *info, | ||
7081 | union iwreq_data *wrqu, char *extra) | ||
7082 | { | ||
7083 | /* | ||
7084 | * This can be called at any time. No action lock required | ||
7085 | */ | ||
7086 | |||
7087 | struct ipw2100_priv *priv = ieee80211_priv(dev); | ||
7088 | struct iw_range *range = (struct iw_range *)extra; | ||
7089 | u16 val; | ||
7090 | int i, level; | ||
7091 | |||
7092 | wrqu->data.length = sizeof(*range); | ||
7093 | memset(range, 0, sizeof(*range)); | ||
7094 | |||
7095 | /* Let's try to keep this struct in the same order as in | ||
7096 | * linux/include/wireless.h | ||
7097 | */ | ||
7098 | |||
7099 | /* TODO: See what values we can set, and remove the ones we can't | ||
7100 | * set, or fill them with some default data. | ||
7101 | */ | ||
7102 | |||
7103 | /* ~5 Mb/s real (802.11b) */ | ||
7104 | range->throughput = 5 * 1000 * 1000; | ||
7105 | |||
7106 | // range->sensitivity; /* signal level threshold range */ | ||
7107 | |||
7108 | range->max_qual.qual = 100; | ||
7109 | /* TODO: Find real max RSSI and stick here */ | ||
7110 | range->max_qual.level = 0; | ||
7111 | range->max_qual.noise = 0; | ||
7112 | range->max_qual.updated = 7; /* Updated all three */ | ||
7113 | |||
7114 | range->avg_qual.qual = 70; /* > 8% missed beacons is 'bad' */ | ||
7115 | /* TODO: Find real 'good' to 'bad' threshol value for RSSI */ | ||
7116 | range->avg_qual.level = 20 + IPW2100_RSSI_TO_DBM; | ||
7117 | range->avg_qual.noise = 0; | ||
7118 | range->avg_qual.updated = 7; /* Updated all three */ | ||
7119 | |||
7120 | range->num_bitrates = RATE_COUNT; | ||
7121 | |||
7122 | for (i = 0; i < RATE_COUNT && i < IW_MAX_BITRATES; i++) { | ||
7123 | range->bitrate[i] = ipw2100_rates_11b[i]; | ||
7124 | } | ||
7125 | |||
7126 | range->min_rts = MIN_RTS_THRESHOLD; | ||
7127 | range->max_rts = MAX_RTS_THRESHOLD; | ||
7128 | range->min_frag = MIN_FRAG_THRESHOLD; | ||
7129 | range->max_frag = MAX_FRAG_THRESHOLD; | ||
7130 | |||
7131 | range->min_pmp = period_duration[0]; /* Minimal PM period */ | ||
7132 | range->max_pmp = period_duration[POWER_MODES-1];/* Maximal PM period */ | ||
7133 | range->min_pmt = timeout_duration[POWER_MODES-1]; /* Minimal PM timeout */ | ||
7134 | range->max_pmt = timeout_duration[0];/* Maximal PM timeout */ | ||
7135 | |||
7136 | /* How to decode max/min PM period */ | ||
7137 | range->pmp_flags = IW_POWER_PERIOD; | ||
7138 | /* How to decode max/min PM period */ | ||
7139 | range->pmt_flags = IW_POWER_TIMEOUT; | ||
7140 | /* What PM options are supported */ | ||
7141 | range->pm_capa = IW_POWER_TIMEOUT | IW_POWER_PERIOD; | ||
7142 | |||
7143 | range->encoding_size[0] = 5; | ||
7144 | range->encoding_size[1] = 13; /* Different token sizes */ | ||
7145 | range->num_encoding_sizes = 2; /* Number of entry in the list */ | ||
7146 | range->max_encoding_tokens = WEP_KEYS; /* Max number of tokens */ | ||
7147 | // range->encoding_login_index; /* token index for login token */ | ||
7148 | |||
7149 | if (priv->ieee->iw_mode == IW_MODE_ADHOC) { | ||
7150 | range->txpower_capa = IW_TXPOW_DBM; | ||
7151 | range->num_txpower = IW_MAX_TXPOWER; | ||
7152 | for (i = 0, level = (IPW_TX_POWER_MAX_DBM * 16); i < IW_MAX_TXPOWER; | ||
7153 | i++, level -= ((IPW_TX_POWER_MAX_DBM - IPW_TX_POWER_MIN_DBM) * 16) / | ||
7154 | (IW_MAX_TXPOWER - 1)) | ||
7155 | range->txpower[i] = level / 16; | ||
7156 | } else { | ||
7157 | range->txpower_capa = 0; | ||
7158 | range->num_txpower = 0; | ||
7159 | } | ||
7160 | |||
7161 | |||
7162 | /* Set the Wireless Extension versions */ | ||
7163 | range->we_version_compiled = WIRELESS_EXT; | ||
7164 | range->we_version_source = 16; | ||
7165 | |||
7166 | // range->retry_capa; /* What retry options are supported */ | ||
7167 | // range->retry_flags; /* How to decode max/min retry limit */ | ||
7168 | // range->r_time_flags; /* How to decode max/min retry life */ | ||
7169 | // range->min_retry; /* Minimal number of retries */ | ||
7170 | // range->max_retry; /* Maximal number of retries */ | ||
7171 | // range->min_r_time; /* Minimal retry lifetime */ | ||
7172 | // range->max_r_time; /* Maximal retry lifetime */ | ||
7173 | |||
7174 | range->num_channels = FREQ_COUNT; | ||
7175 | |||
7176 | val = 0; | ||
7177 | for (i = 0; i < FREQ_COUNT; i++) { | ||
7178 | // TODO: Include only legal frequencies for some countries | ||
7179 | // if (local->channel_mask & (1 << i)) { | ||
7180 | range->freq[val].i = i + 1; | ||
7181 | range->freq[val].m = ipw2100_frequencies[i] * 100000; | ||
7182 | range->freq[val].e = 1; | ||
7183 | val++; | ||
7184 | // } | ||
7185 | if (val == IW_MAX_FREQUENCIES) | ||
7186 | break; | ||
7187 | } | ||
7188 | range->num_frequency = val; | ||
7189 | |||
7190 | IPW_DEBUG_WX("GET Range\n"); | ||
7191 | |||
7192 | return 0; | ||
7193 | } | ||
7194 | |||
7195 | static int ipw2100_wx_set_wap(struct net_device *dev, | ||
7196 | struct iw_request_info *info, | ||
7197 | union iwreq_data *wrqu, char *extra) | ||
7198 | { | ||
7199 | struct ipw2100_priv *priv = ieee80211_priv(dev); | ||
7200 | int err = 0; | ||
7201 | |||
7202 | static const unsigned char any[] = { | ||
7203 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff | ||
7204 | }; | ||
7205 | static const unsigned char off[] = { | ||
7206 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 | ||
7207 | }; | ||
7208 | |||
7209 | // sanity checks | ||
7210 | if (wrqu->ap_addr.sa_family != ARPHRD_ETHER) | ||
7211 | return -EINVAL; | ||
7212 | |||
7213 | down(&priv->action_sem); | ||
7214 | if (!(priv->status & STATUS_INITIALIZED)) { | ||
7215 | err = -EIO; | ||
7216 | goto done; | ||
7217 | } | ||
7218 | |||
7219 | if (!memcmp(any, wrqu->ap_addr.sa_data, ETH_ALEN) || | ||
7220 | !memcmp(off, wrqu->ap_addr.sa_data, ETH_ALEN)) { | ||
7221 | /* we disable mandatory BSSID association */ | ||
7222 | IPW_DEBUG_WX("exit - disable mandatory BSSID\n"); | ||
7223 | priv->config &= ~CFG_STATIC_BSSID; | ||
7224 | err = ipw2100_set_mandatory_bssid(priv, NULL, 0); | ||
7225 | goto done; | ||
7226 | } | ||
7227 | |||
7228 | priv->config |= CFG_STATIC_BSSID; | ||
7229 | memcpy(priv->mandatory_bssid_mac, wrqu->ap_addr.sa_data, ETH_ALEN); | ||
7230 | |||
7231 | err = ipw2100_set_mandatory_bssid(priv, wrqu->ap_addr.sa_data, 0); | ||
7232 | |||
7233 | IPW_DEBUG_WX("SET BSSID -> %02X:%02X:%02X:%02X:%02X:%02X\n", | ||
7234 | wrqu->ap_addr.sa_data[0] & 0xff, | ||
7235 | wrqu->ap_addr.sa_data[1] & 0xff, | ||
7236 | wrqu->ap_addr.sa_data[2] & 0xff, | ||
7237 | wrqu->ap_addr.sa_data[3] & 0xff, | ||
7238 | wrqu->ap_addr.sa_data[4] & 0xff, | ||
7239 | wrqu->ap_addr.sa_data[5] & 0xff); | ||
7240 | |||
7241 | done: | ||
7242 | up(&priv->action_sem); | ||
7243 | return err; | ||
7244 | } | ||
7245 | |||
7246 | static int ipw2100_wx_get_wap(struct net_device *dev, | ||
7247 | struct iw_request_info *info, | ||
7248 | union iwreq_data *wrqu, char *extra) | ||
7249 | { | ||
7250 | /* | ||
7251 | * This can be called at any time. No action lock required | ||
7252 | */ | ||
7253 | |||
7254 | struct ipw2100_priv *priv = ieee80211_priv(dev); | ||
7255 | |||
7256 | /* If we are associated, trying to associate, or have a statically | ||
7257 | * configured BSSID then return that; otherwise return ANY */ | ||
7258 | if (priv->config & CFG_STATIC_BSSID || | ||
7259 | priv->status & STATUS_ASSOCIATED) { | ||
7260 | wrqu->ap_addr.sa_family = ARPHRD_ETHER; | ||
7261 | memcpy(wrqu->ap_addr.sa_data, &priv->bssid, ETH_ALEN); | ||
7262 | } else | ||
7263 | memset(wrqu->ap_addr.sa_data, 0, ETH_ALEN); | ||
7264 | |||
7265 | IPW_DEBUG_WX("Getting WAP BSSID: " MAC_FMT "\n", | ||
7266 | MAC_ARG(wrqu->ap_addr.sa_data)); | ||
7267 | return 0; | ||
7268 | } | ||
7269 | |||
7270 | static int ipw2100_wx_set_essid(struct net_device *dev, | ||
7271 | struct iw_request_info *info, | ||
7272 | union iwreq_data *wrqu, char *extra) | ||
7273 | { | ||
7274 | struct ipw2100_priv *priv = ieee80211_priv(dev); | ||
7275 | char *essid = ""; /* ANY */ | ||
7276 | int length = 0; | ||
7277 | int err = 0; | ||
7278 | |||
7279 | down(&priv->action_sem); | ||
7280 | if (!(priv->status & STATUS_INITIALIZED)) { | ||
7281 | err = -EIO; | ||
7282 | goto done; | ||
7283 | } | ||
7284 | |||
7285 | if (wrqu->essid.flags && wrqu->essid.length) { | ||
7286 | length = wrqu->essid.length - 1; | ||
7287 | essid = extra; | ||
7288 | } | ||
7289 | |||
7290 | if (length == 0) { | ||
7291 | IPW_DEBUG_WX("Setting ESSID to ANY\n"); | ||
7292 | priv->config &= ~CFG_STATIC_ESSID; | ||
7293 | err = ipw2100_set_essid(priv, NULL, 0, 0); | ||
7294 | goto done; | ||
7295 | } | ||
7296 | |||
7297 | length = min(length, IW_ESSID_MAX_SIZE); | ||
7298 | |||
7299 | priv->config |= CFG_STATIC_ESSID; | ||
7300 | |||
7301 | if (priv->essid_len == length && !memcmp(priv->essid, extra, length)) { | ||
7302 | IPW_DEBUG_WX("ESSID set to current ESSID.\n"); | ||
7303 | err = 0; | ||
7304 | goto done; | ||
7305 | } | ||
7306 | |||
7307 | IPW_DEBUG_WX("Setting ESSID: '%s' (%d)\n", escape_essid(essid, length), | ||
7308 | length); | ||
7309 | |||
7310 | priv->essid_len = length; | ||
7311 | memcpy(priv->essid, essid, priv->essid_len); | ||
7312 | |||
7313 | err = ipw2100_set_essid(priv, essid, length, 0); | ||
7314 | |||
7315 | done: | ||
7316 | up(&priv->action_sem); | ||
7317 | return err; | ||
7318 | } | ||
7319 | |||
7320 | static int ipw2100_wx_get_essid(struct net_device *dev, | ||
7321 | struct iw_request_info *info, | ||
7322 | union iwreq_data *wrqu, char *extra) | ||
7323 | { | ||
7324 | /* | ||
7325 | * This can be called at any time. No action lock required | ||
7326 | */ | ||
7327 | |||
7328 | struct ipw2100_priv *priv = ieee80211_priv(dev); | ||
7329 | |||
7330 | /* If we are associated, trying to associate, or have a statically | ||
7331 | * configured ESSID then return that; otherwise return ANY */ | ||
7332 | if (priv->config & CFG_STATIC_ESSID || | ||
7333 | priv->status & STATUS_ASSOCIATED) { | ||
7334 | IPW_DEBUG_WX("Getting essid: '%s'\n", | ||
7335 | escape_essid(priv->essid, priv->essid_len)); | ||
7336 | memcpy(extra, priv->essid, priv->essid_len); | ||
7337 | wrqu->essid.length = priv->essid_len; | ||
7338 | wrqu->essid.flags = 1; /* active */ | ||
7339 | } else { | ||
7340 | IPW_DEBUG_WX("Getting essid: ANY\n"); | ||
7341 | wrqu->essid.length = 0; | ||
7342 | wrqu->essid.flags = 0; /* active */ | ||
7343 | } | ||
7344 | |||
7345 | return 0; | ||
7346 | } | ||
7347 | |||
7348 | static int ipw2100_wx_set_nick(struct net_device *dev, | ||
7349 | struct iw_request_info *info, | ||
7350 | union iwreq_data *wrqu, char *extra) | ||
7351 | { | ||
7352 | /* | ||
7353 | * This can be called at any time. No action lock required | ||
7354 | */ | ||
7355 | |||
7356 | struct ipw2100_priv *priv = ieee80211_priv(dev); | ||
7357 | |||
7358 | if (wrqu->data.length > IW_ESSID_MAX_SIZE) | ||
7359 | return -E2BIG; | ||
7360 | |||
7361 | wrqu->data.length = min((size_t)wrqu->data.length, sizeof(priv->nick)); | ||
7362 | memset(priv->nick, 0, sizeof(priv->nick)); | ||
7363 | memcpy(priv->nick, extra, wrqu->data.length); | ||
7364 | |||
7365 | IPW_DEBUG_WX("SET Nickname -> %s \n", priv->nick); | ||
7366 | |||
7367 | return 0; | ||
7368 | } | ||
7369 | |||
7370 | static int ipw2100_wx_get_nick(struct net_device *dev, | ||
7371 | struct iw_request_info *info, | ||
7372 | union iwreq_data *wrqu, char *extra) | ||
7373 | { | ||
7374 | /* | ||
7375 | * This can be called at any time. No action lock required | ||
7376 | */ | ||
7377 | |||
7378 | struct ipw2100_priv *priv = ieee80211_priv(dev); | ||
7379 | |||
7380 | wrqu->data.length = strlen(priv->nick) + 1; | ||
7381 | memcpy(extra, priv->nick, wrqu->data.length); | ||
7382 | wrqu->data.flags = 1; /* active */ | ||
7383 | |||
7384 | IPW_DEBUG_WX("GET Nickname -> %s \n", extra); | ||
7385 | |||
7386 | return 0; | ||
7387 | } | ||
7388 | |||
7389 | static int ipw2100_wx_set_rate(struct net_device *dev, | ||
7390 | struct iw_request_info *info, | ||
7391 | union iwreq_data *wrqu, char *extra) | ||
7392 | { | ||
7393 | struct ipw2100_priv *priv = ieee80211_priv(dev); | ||
7394 | u32 target_rate = wrqu->bitrate.value; | ||
7395 | u32 rate; | ||
7396 | int err = 0; | ||
7397 | |||
7398 | down(&priv->action_sem); | ||
7399 | if (!(priv->status & STATUS_INITIALIZED)) { | ||
7400 | err = -EIO; | ||
7401 | goto done; | ||
7402 | } | ||
7403 | |||
7404 | rate = 0; | ||
7405 | |||
7406 | if (target_rate == 1000000 || | ||
7407 | (!wrqu->bitrate.fixed && target_rate > 1000000)) | ||
7408 | rate |= TX_RATE_1_MBIT; | ||
7409 | if (target_rate == 2000000 || | ||
7410 | (!wrqu->bitrate.fixed && target_rate > 2000000)) | ||
7411 | rate |= TX_RATE_2_MBIT; | ||
7412 | if (target_rate == 5500000 || | ||
7413 | (!wrqu->bitrate.fixed && target_rate > 5500000)) | ||
7414 | rate |= TX_RATE_5_5_MBIT; | ||
7415 | if (target_rate == 11000000 || | ||
7416 | (!wrqu->bitrate.fixed && target_rate > 11000000)) | ||
7417 | rate |= TX_RATE_11_MBIT; | ||
7418 | if (rate == 0) | ||
7419 | rate = DEFAULT_TX_RATES; | ||
7420 | |||
7421 | err = ipw2100_set_tx_rates(priv, rate, 0); | ||
7422 | |||
7423 | IPW_DEBUG_WX("SET Rate -> %04X \n", rate); | ||
7424 | done: | ||
7425 | up(&priv->action_sem); | ||
7426 | return err; | ||
7427 | } | ||
7428 | |||
7429 | |||
7430 | static int ipw2100_wx_get_rate(struct net_device *dev, | ||
7431 | struct iw_request_info *info, | ||
7432 | union iwreq_data *wrqu, char *extra) | ||
7433 | { | ||
7434 | struct ipw2100_priv *priv = ieee80211_priv(dev); | ||
7435 | int val; | ||
7436 | int len = sizeof(val); | ||
7437 | int err = 0; | ||
7438 | |||
7439 | if (!(priv->status & STATUS_ENABLED) || | ||
7440 | priv->status & STATUS_RF_KILL_MASK || | ||
7441 | !(priv->status & STATUS_ASSOCIATED)) { | ||
7442 | wrqu->bitrate.value = 0; | ||
7443 | return 0; | ||
7444 | } | ||
7445 | |||
7446 | down(&priv->action_sem); | ||
7447 | if (!(priv->status & STATUS_INITIALIZED)) { | ||
7448 | err = -EIO; | ||
7449 | goto done; | ||
7450 | } | ||
7451 | |||
7452 | err = ipw2100_get_ordinal(priv, IPW_ORD_CURRENT_TX_RATE, &val, &len); | ||
7453 | if (err) { | ||
7454 | IPW_DEBUG_WX("failed querying ordinals.\n"); | ||
7455 | return err; | ||
7456 | } | ||
7457 | |||
7458 | switch (val & TX_RATE_MASK) { | ||
7459 | case TX_RATE_1_MBIT: | ||
7460 | wrqu->bitrate.value = 1000000; | ||
7461 | break; | ||
7462 | case TX_RATE_2_MBIT: | ||
7463 | wrqu->bitrate.value = 2000000; | ||
7464 | break; | ||
7465 | case TX_RATE_5_5_MBIT: | ||
7466 | wrqu->bitrate.value = 5500000; | ||
7467 | break; | ||
7468 | case TX_RATE_11_MBIT: | ||
7469 | wrqu->bitrate.value = 11000000; | ||
7470 | break; | ||
7471 | default: | ||
7472 | wrqu->bitrate.value = 0; | ||
7473 | } | ||
7474 | |||
7475 | IPW_DEBUG_WX("GET Rate -> %d \n", wrqu->bitrate.value); | ||
7476 | |||
7477 | done: | ||
7478 | up(&priv->action_sem); | ||
7479 | return err; | ||
7480 | } | ||
7481 | |||
7482 | static int ipw2100_wx_set_rts(struct net_device *dev, | ||
7483 | struct iw_request_info *info, | ||
7484 | union iwreq_data *wrqu, char *extra) | ||
7485 | { | ||
7486 | struct ipw2100_priv *priv = ieee80211_priv(dev); | ||
7487 | int value, err; | ||
7488 | |||
7489 | /* Auto RTS not yet supported */ | ||
7490 | if (wrqu->rts.fixed == 0) | ||
7491 | return -EINVAL; | ||
7492 | |||
7493 | down(&priv->action_sem); | ||
7494 | if (!(priv->status & STATUS_INITIALIZED)) { | ||
7495 | err = -EIO; | ||
7496 | goto done; | ||
7497 | } | ||
7498 | |||
7499 | if (wrqu->rts.disabled) | ||
7500 | value = priv->rts_threshold | RTS_DISABLED; | ||
7501 | else { | ||
7502 | if (wrqu->rts.value < 1 || | ||
7503 | wrqu->rts.value > 2304) { | ||
7504 | err = -EINVAL; | ||
7505 | goto done; | ||
7506 | } | ||
7507 | value = wrqu->rts.value; | ||
7508 | } | ||
7509 | |||
7510 | err = ipw2100_set_rts_threshold(priv, value); | ||
7511 | |||
7512 | IPW_DEBUG_WX("SET RTS Threshold -> 0x%08X \n", value); | ||
7513 | done: | ||
7514 | up(&priv->action_sem); | ||
7515 | return err; | ||
7516 | } | ||
7517 | |||
7518 | static int ipw2100_wx_get_rts(struct net_device *dev, | ||
7519 | struct iw_request_info *info, | ||
7520 | union iwreq_data *wrqu, char *extra) | ||
7521 | { | ||
7522 | /* | ||
7523 | * This can be called at any time. No action lock required | ||
7524 | */ | ||
7525 | |||
7526 | struct ipw2100_priv *priv = ieee80211_priv(dev); | ||
7527 | |||
7528 | wrqu->rts.value = priv->rts_threshold & ~RTS_DISABLED; | ||
7529 | wrqu->rts.fixed = 1; /* no auto select */ | ||
7530 | |||
7531 | /* If RTS is set to the default value, then it is disabled */ | ||
7532 | wrqu->rts.disabled = (priv->rts_threshold & RTS_DISABLED) ? 1 : 0; | ||
7533 | |||
7534 | IPW_DEBUG_WX("GET RTS Threshold -> 0x%08X \n", wrqu->rts.value); | ||
7535 | |||
7536 | return 0; | ||
7537 | } | ||
7538 | |||
7539 | static int ipw2100_wx_set_txpow(struct net_device *dev, | ||
7540 | struct iw_request_info *info, | ||
7541 | union iwreq_data *wrqu, char *extra) | ||
7542 | { | ||
7543 | struct ipw2100_priv *priv = ieee80211_priv(dev); | ||
7544 | int err = 0, value; | ||
7545 | |||
7546 | if (priv->ieee->iw_mode != IW_MODE_ADHOC) | ||
7547 | return -EINVAL; | ||
7548 | |||
7549 | if (wrqu->txpower.disabled == 1 || wrqu->txpower.fixed == 0) | ||
7550 | value = IPW_TX_POWER_DEFAULT; | ||
7551 | else { | ||
7552 | if (wrqu->txpower.value < IPW_TX_POWER_MIN_DBM || | ||
7553 | wrqu->txpower.value > IPW_TX_POWER_MAX_DBM) | ||
7554 | return -EINVAL; | ||
7555 | |||
7556 | value = (wrqu->txpower.value - IPW_TX_POWER_MIN_DBM) * 16 / | ||
7557 | (IPW_TX_POWER_MAX_DBM - IPW_TX_POWER_MIN_DBM); | ||
7558 | } | ||
7559 | |||
7560 | down(&priv->action_sem); | ||
7561 | if (!(priv->status & STATUS_INITIALIZED)) { | ||
7562 | err = -EIO; | ||
7563 | goto done; | ||
7564 | } | ||
7565 | |||
7566 | err = ipw2100_set_tx_power(priv, value); | ||
7567 | |||
7568 | IPW_DEBUG_WX("SET TX Power -> %d \n", value); | ||
7569 | |||
7570 | done: | ||
7571 | up(&priv->action_sem); | ||
7572 | return err; | ||
7573 | } | ||
7574 | |||
7575 | static int ipw2100_wx_get_txpow(struct net_device *dev, | ||
7576 | struct iw_request_info *info, | ||
7577 | union iwreq_data *wrqu, char *extra) | ||
7578 | { | ||
7579 | /* | ||
7580 | * This can be called at any time. No action lock required | ||
7581 | */ | ||
7582 | |||
7583 | struct ipw2100_priv *priv = ieee80211_priv(dev); | ||
7584 | |||
7585 | if (priv->ieee->iw_mode != IW_MODE_ADHOC) { | ||
7586 | wrqu->power.disabled = 1; | ||
7587 | return 0; | ||
7588 | } | ||
7589 | |||
7590 | if (priv->tx_power == IPW_TX_POWER_DEFAULT) { | ||
7591 | wrqu->power.fixed = 0; | ||
7592 | wrqu->power.value = IPW_TX_POWER_MAX_DBM; | ||
7593 | wrqu->power.disabled = 1; | ||
7594 | } else { | ||
7595 | wrqu->power.disabled = 0; | ||
7596 | wrqu->power.fixed = 1; | ||
7597 | wrqu->power.value = | ||
7598 | (priv->tx_power * | ||
7599 | (IPW_TX_POWER_MAX_DBM - IPW_TX_POWER_MIN_DBM)) / | ||
7600 | (IPW_TX_POWER_MAX - IPW_TX_POWER_MIN) + | ||
7601 | IPW_TX_POWER_MIN_DBM; | ||
7602 | } | ||
7603 | |||
7604 | wrqu->power.flags = IW_TXPOW_DBM; | ||
7605 | |||
7606 | IPW_DEBUG_WX("GET TX Power -> %d \n", wrqu->power.value); | ||
7607 | |||
7608 | return 0; | ||
7609 | } | ||
7610 | |||
7611 | static int ipw2100_wx_set_frag(struct net_device *dev, | ||
7612 | struct iw_request_info *info, | ||
7613 | union iwreq_data *wrqu, char *extra) | ||
7614 | { | ||
7615 | /* | ||
7616 | * This can be called at any time. No action lock required | ||
7617 | */ | ||
7618 | |||
7619 | struct ipw2100_priv *priv = ieee80211_priv(dev); | ||
7620 | |||
7621 | if (!wrqu->frag.fixed) | ||
7622 | return -EINVAL; | ||
7623 | |||
7624 | if (wrqu->frag.disabled) { | ||
7625 | priv->frag_threshold |= FRAG_DISABLED; | ||
7626 | priv->ieee->fts = DEFAULT_FTS; | ||
7627 | } else { | ||
7628 | if (wrqu->frag.value < MIN_FRAG_THRESHOLD || | ||
7629 | wrqu->frag.value > MAX_FRAG_THRESHOLD) | ||
7630 | return -EINVAL; | ||
7631 | |||
7632 | priv->ieee->fts = wrqu->frag.value & ~0x1; | ||
7633 | priv->frag_threshold = priv->ieee->fts; | ||
7634 | } | ||
7635 | |||
7636 | IPW_DEBUG_WX("SET Frag Threshold -> %d \n", priv->ieee->fts); | ||
7637 | |||
7638 | return 0; | ||
7639 | } | ||
7640 | |||
7641 | static int ipw2100_wx_get_frag(struct net_device *dev, | ||
7642 | struct iw_request_info *info, | ||
7643 | union iwreq_data *wrqu, char *extra) | ||
7644 | { | ||
7645 | /* | ||
7646 | * This can be called at any time. No action lock required | ||
7647 | */ | ||
7648 | |||
7649 | struct ipw2100_priv *priv = ieee80211_priv(dev); | ||
7650 | wrqu->frag.value = priv->frag_threshold & ~FRAG_DISABLED; | ||
7651 | wrqu->frag.fixed = 0; /* no auto select */ | ||
7652 | wrqu->frag.disabled = (priv->frag_threshold & FRAG_DISABLED) ? 1 : 0; | ||
7653 | |||
7654 | IPW_DEBUG_WX("GET Frag Threshold -> %d \n", wrqu->frag.value); | ||
7655 | |||
7656 | return 0; | ||
7657 | } | ||
7658 | |||
7659 | static int ipw2100_wx_set_retry(struct net_device *dev, | ||
7660 | struct iw_request_info *info, | ||
7661 | union iwreq_data *wrqu, char *extra) | ||
7662 | { | ||
7663 | struct ipw2100_priv *priv = ieee80211_priv(dev); | ||
7664 | int err = 0; | ||
7665 | |||
7666 | if (wrqu->retry.flags & IW_RETRY_LIFETIME || | ||
7667 | wrqu->retry.disabled) | ||
7668 | return -EINVAL; | ||
7669 | |||
7670 | if (!(wrqu->retry.flags & IW_RETRY_LIMIT)) | ||
7671 | return 0; | ||
7672 | |||
7673 | down(&priv->action_sem); | ||
7674 | if (!(priv->status & STATUS_INITIALIZED)) { | ||
7675 | err = -EIO; | ||
7676 | goto done; | ||
7677 | } | ||
7678 | |||
7679 | if (wrqu->retry.flags & IW_RETRY_MIN) { | ||
7680 | err = ipw2100_set_short_retry(priv, wrqu->retry.value); | ||
7681 | IPW_DEBUG_WX("SET Short Retry Limit -> %d \n", | ||
7682 | wrqu->retry.value); | ||
7683 | goto done; | ||
7684 | } | ||
7685 | |||
7686 | if (wrqu->retry.flags & IW_RETRY_MAX) { | ||
7687 | err = ipw2100_set_long_retry(priv, wrqu->retry.value); | ||
7688 | IPW_DEBUG_WX("SET Long Retry Limit -> %d \n", | ||
7689 | wrqu->retry.value); | ||
7690 | goto done; | ||
7691 | } | ||
7692 | |||
7693 | err = ipw2100_set_short_retry(priv, wrqu->retry.value); | ||
7694 | if (!err) | ||
7695 | err = ipw2100_set_long_retry(priv, wrqu->retry.value); | ||
7696 | |||
7697 | IPW_DEBUG_WX("SET Both Retry Limits -> %d \n", wrqu->retry.value); | ||
7698 | |||
7699 | done: | ||
7700 | up(&priv->action_sem); | ||
7701 | return err; | ||
7702 | } | ||
7703 | |||
7704 | static int ipw2100_wx_get_retry(struct net_device *dev, | ||
7705 | struct iw_request_info *info, | ||
7706 | union iwreq_data *wrqu, char *extra) | ||
7707 | { | ||
7708 | /* | ||
7709 | * This can be called at any time. No action lock required | ||
7710 | */ | ||
7711 | |||
7712 | struct ipw2100_priv *priv = ieee80211_priv(dev); | ||
7713 | |||
7714 | wrqu->retry.disabled = 0; /* can't be disabled */ | ||
7715 | |||
7716 | if ((wrqu->retry.flags & IW_RETRY_TYPE) == | ||
7717 | IW_RETRY_LIFETIME) | ||
7718 | return -EINVAL; | ||
7719 | |||
7720 | if (wrqu->retry.flags & IW_RETRY_MAX) { | ||
7721 | wrqu->retry.flags = IW_RETRY_LIMIT & IW_RETRY_MAX; | ||
7722 | wrqu->retry.value = priv->long_retry_limit; | ||
7723 | } else { | ||
7724 | wrqu->retry.flags = | ||
7725 | (priv->short_retry_limit != | ||
7726 | priv->long_retry_limit) ? | ||
7727 | IW_RETRY_LIMIT & IW_RETRY_MIN : IW_RETRY_LIMIT; | ||
7728 | |||
7729 | wrqu->retry.value = priv->short_retry_limit; | ||
7730 | } | ||
7731 | |||
7732 | IPW_DEBUG_WX("GET Retry -> %d \n", wrqu->retry.value); | ||
7733 | |||
7734 | return 0; | ||
7735 | } | ||
7736 | |||
7737 | static int ipw2100_wx_set_scan(struct net_device *dev, | ||
7738 | struct iw_request_info *info, | ||
7739 | union iwreq_data *wrqu, char *extra) | ||
7740 | { | ||
7741 | struct ipw2100_priv *priv = ieee80211_priv(dev); | ||
7742 | int err = 0; | ||
7743 | |||
7744 | down(&priv->action_sem); | ||
7745 | if (!(priv->status & STATUS_INITIALIZED)) { | ||
7746 | err = -EIO; | ||
7747 | goto done; | ||
7748 | } | ||
7749 | |||
7750 | IPW_DEBUG_WX("Initiating scan...\n"); | ||
7751 | if (ipw2100_set_scan_options(priv) || | ||
7752 | ipw2100_start_scan(priv)) { | ||
7753 | IPW_DEBUG_WX("Start scan failed.\n"); | ||
7754 | |||
7755 | /* TODO: Mark a scan as pending so when hardware initialized | ||
7756 | * a scan starts */ | ||
7757 | } | ||
7758 | |||
7759 | done: | ||
7760 | up(&priv->action_sem); | ||
7761 | return err; | ||
7762 | } | ||
7763 | |||
7764 | static int ipw2100_wx_get_scan(struct net_device *dev, | ||
7765 | struct iw_request_info *info, | ||
7766 | union iwreq_data *wrqu, char *extra) | ||
7767 | { | ||
7768 | /* | ||
7769 | * This can be called at any time. No action lock required | ||
7770 | */ | ||
7771 | |||
7772 | struct ipw2100_priv *priv = ieee80211_priv(dev); | ||
7773 | return ieee80211_wx_get_scan(priv->ieee, info, wrqu, extra); | ||
7774 | } | ||
7775 | |||
7776 | |||
7777 | /* | ||
7778 | * Implementation based on code in hostap-driver v0.1.3 hostap_ioctl.c | ||
7779 | */ | ||
7780 | static int ipw2100_wx_set_encode(struct net_device *dev, | ||
7781 | struct iw_request_info *info, | ||
7782 | union iwreq_data *wrqu, char *key) | ||
7783 | { | ||
7784 | /* | ||
7785 | * No check of STATUS_INITIALIZED required | ||
7786 | */ | ||
7787 | |||
7788 | struct ipw2100_priv *priv = ieee80211_priv(dev); | ||
7789 | return ieee80211_wx_set_encode(priv->ieee, info, wrqu, key); | ||
7790 | } | ||
7791 | |||
7792 | static int ipw2100_wx_get_encode(struct net_device *dev, | ||
7793 | struct iw_request_info *info, | ||
7794 | union iwreq_data *wrqu, char *key) | ||
7795 | { | ||
7796 | /* | ||
7797 | * This can be called at any time. No action lock required | ||
7798 | */ | ||
7799 | |||
7800 | struct ipw2100_priv *priv = ieee80211_priv(dev); | ||
7801 | return ieee80211_wx_get_encode(priv->ieee, info, wrqu, key); | ||
7802 | } | ||
7803 | |||
7804 | static int ipw2100_wx_set_power(struct net_device *dev, | ||
7805 | struct iw_request_info *info, | ||
7806 | union iwreq_data *wrqu, char *extra) | ||
7807 | { | ||
7808 | struct ipw2100_priv *priv = ieee80211_priv(dev); | ||
7809 | int err = 0; | ||
7810 | |||
7811 | down(&priv->action_sem); | ||
7812 | if (!(priv->status & STATUS_INITIALIZED)) { | ||
7813 | err = -EIO; | ||
7814 | goto done; | ||
7815 | } | ||
7816 | |||
7817 | if (wrqu->power.disabled) { | ||
7818 | priv->power_mode = IPW_POWER_LEVEL(priv->power_mode); | ||
7819 | err = ipw2100_set_power_mode(priv, IPW_POWER_MODE_CAM); | ||
7820 | IPW_DEBUG_WX("SET Power Management Mode -> off\n"); | ||
7821 | goto done; | ||
7822 | } | ||
7823 | |||
7824 | switch (wrqu->power.flags & IW_POWER_MODE) { | ||
7825 | case IW_POWER_ON: /* If not specified */ | ||
7826 | case IW_POWER_MODE: /* If set all mask */ | ||
7827 | case IW_POWER_ALL_R: /* If explicitely state all */ | ||
7828 | break; | ||
7829 | default: /* Otherwise we don't support it */ | ||
7830 | IPW_DEBUG_WX("SET PM Mode: %X not supported.\n", | ||
7831 | wrqu->power.flags); | ||
7832 | err = -EOPNOTSUPP; | ||
7833 | goto done; | ||
7834 | } | ||
7835 | |||
7836 | /* If the user hasn't specified a power management mode yet, default | ||
7837 | * to BATTERY */ | ||
7838 | priv->power_mode = IPW_POWER_ENABLED | priv->power_mode; | ||
7839 | err = ipw2100_set_power_mode(priv, IPW_POWER_LEVEL(priv->power_mode)); | ||
7840 | |||
7841 | IPW_DEBUG_WX("SET Power Management Mode -> 0x%02X\n", | ||
7842 | priv->power_mode); | ||
7843 | |||
7844 | done: | ||
7845 | up(&priv->action_sem); | ||
7846 | return err; | ||
7847 | |||
7848 | } | ||
7849 | |||
7850 | static int ipw2100_wx_get_power(struct net_device *dev, | ||
7851 | struct iw_request_info *info, | ||
7852 | union iwreq_data *wrqu, char *extra) | ||
7853 | { | ||
7854 | /* | ||
7855 | * This can be called at any time. No action lock required | ||
7856 | */ | ||
7857 | |||
7858 | struct ipw2100_priv *priv = ieee80211_priv(dev); | ||
7859 | |||
7860 | if (!(priv->power_mode & IPW_POWER_ENABLED)) { | ||
7861 | wrqu->power.disabled = 1; | ||
7862 | } else { | ||
7863 | wrqu->power.disabled = 0; | ||
7864 | wrqu->power.flags = 0; | ||
7865 | } | ||
7866 | |||
7867 | IPW_DEBUG_WX("GET Power Management Mode -> %02X\n", priv->power_mode); | ||
7868 | |||
7869 | return 0; | ||
7870 | } | ||
7871 | |||
7872 | |||
7873 | /* | ||
7874 | * | ||
7875 | * IWPRIV handlers | ||
7876 | * | ||
7877 | */ | ||
7878 | #ifdef CONFIG_IPW2100_MONITOR | ||
7879 | static int ipw2100_wx_set_promisc(struct net_device *dev, | ||
7880 | struct iw_request_info *info, | ||
7881 | union iwreq_data *wrqu, char *extra) | ||
7882 | { | ||
7883 | struct ipw2100_priv *priv = ieee80211_priv(dev); | ||
7884 | int *parms = (int *)extra; | ||
7885 | int enable = (parms[0] > 0); | ||
7886 | int err = 0; | ||
7887 | |||
7888 | down(&priv->action_sem); | ||
7889 | if (!(priv->status & STATUS_INITIALIZED)) { | ||
7890 | err = -EIO; | ||
7891 | goto done; | ||
7892 | } | ||
7893 | |||
7894 | if (enable) { | ||
7895 | if (priv->ieee->iw_mode == IW_MODE_MONITOR) { | ||
7896 | err = ipw2100_set_channel(priv, parms[1], 0); | ||
7897 | goto done; | ||
7898 | } | ||
7899 | priv->channel = parms[1]; | ||
7900 | err = ipw2100_switch_mode(priv, IW_MODE_MONITOR); | ||
7901 | } else { | ||
7902 | if (priv->ieee->iw_mode == IW_MODE_MONITOR) | ||
7903 | err = ipw2100_switch_mode(priv, priv->last_mode); | ||
7904 | } | ||
7905 | done: | ||
7906 | up(&priv->action_sem); | ||
7907 | return err; | ||
7908 | } | ||
7909 | |||
7910 | static int ipw2100_wx_reset(struct net_device *dev, | ||
7911 | struct iw_request_info *info, | ||
7912 | union iwreq_data *wrqu, char *extra) | ||
7913 | { | ||
7914 | struct ipw2100_priv *priv = ieee80211_priv(dev); | ||
7915 | if (priv->status & STATUS_INITIALIZED) | ||
7916 | schedule_reset(priv); | ||
7917 | return 0; | ||
7918 | } | ||
7919 | |||
7920 | #endif | ||
7921 | |||
7922 | static int ipw2100_wx_set_powermode(struct net_device *dev, | ||
7923 | struct iw_request_info *info, | ||
7924 | union iwreq_data *wrqu, char *extra) | ||
7925 | { | ||
7926 | struct ipw2100_priv *priv = ieee80211_priv(dev); | ||
7927 | int err = 0, mode = *(int *)extra; | ||
7928 | |||
7929 | down(&priv->action_sem); | ||
7930 | if (!(priv->status & STATUS_INITIALIZED)) { | ||
7931 | err = -EIO; | ||
7932 | goto done; | ||
7933 | } | ||
7934 | |||
7935 | if ((mode < 1) || (mode > POWER_MODES)) | ||
7936 | mode = IPW_POWER_AUTO; | ||
7937 | |||
7938 | if (priv->power_mode != mode) | ||
7939 | err = ipw2100_set_power_mode(priv, mode); | ||
7940 | done: | ||
7941 | up(&priv->action_sem); | ||
7942 | return err; | ||
7943 | } | ||
7944 | |||
7945 | #define MAX_POWER_STRING 80 | ||
7946 | static int ipw2100_wx_get_powermode(struct net_device *dev, | ||
7947 | struct iw_request_info *info, | ||
7948 | union iwreq_data *wrqu, char *extra) | ||
7949 | { | ||
7950 | /* | ||
7951 | * This can be called at any time. No action lock required | ||
7952 | */ | ||
7953 | |||
7954 | struct ipw2100_priv *priv = ieee80211_priv(dev); | ||
7955 | int level = IPW_POWER_LEVEL(priv->power_mode); | ||
7956 | s32 timeout, period; | ||
7957 | |||
7958 | if (!(priv->power_mode & IPW_POWER_ENABLED)) { | ||
7959 | snprintf(extra, MAX_POWER_STRING, | ||
7960 | "Power save level: %d (Off)", level); | ||
7961 | } else { | ||
7962 | switch (level) { | ||
7963 | case IPW_POWER_MODE_CAM: | ||
7964 | snprintf(extra, MAX_POWER_STRING, | ||
7965 | "Power save level: %d (None)", level); | ||
7966 | break; | ||
7967 | case IPW_POWER_AUTO: | ||
7968 | snprintf(extra, MAX_POWER_STRING, | ||
7969 | "Power save level: %d (Auto)", 0); | ||
7970 | break; | ||
7971 | default: | ||
7972 | timeout = timeout_duration[level - 1] / 1000; | ||
7973 | period = period_duration[level - 1] / 1000; | ||
7974 | snprintf(extra, MAX_POWER_STRING, | ||
7975 | "Power save level: %d " | ||
7976 | "(Timeout %dms, Period %dms)", | ||
7977 | level, timeout, period); | ||
7978 | } | ||
7979 | } | ||
7980 | |||
7981 | wrqu->data.length = strlen(extra) + 1; | ||
7982 | |||
7983 | return 0; | ||
7984 | } | ||
7985 | |||
7986 | |||
7987 | static int ipw2100_wx_set_preamble(struct net_device *dev, | ||
7988 | struct iw_request_info *info, | ||
7989 | union iwreq_data *wrqu, char *extra) | ||
7990 | { | ||
7991 | struct ipw2100_priv *priv = ieee80211_priv(dev); | ||
7992 | int err, mode = *(int *)extra; | ||
7993 | |||
7994 | down(&priv->action_sem); | ||
7995 | if (!(priv->status & STATUS_INITIALIZED)) { | ||
7996 | err = -EIO; | ||
7997 | goto done; | ||
7998 | } | ||
7999 | |||
8000 | if (mode == 1) | ||
8001 | priv->config |= CFG_LONG_PREAMBLE; | ||
8002 | else if (mode == 0) | ||
8003 | priv->config &= ~CFG_LONG_PREAMBLE; | ||
8004 | else { | ||
8005 | err = -EINVAL; | ||
8006 | goto done; | ||
8007 | } | ||
8008 | |||
8009 | err = ipw2100_system_config(priv, 0); | ||
8010 | |||
8011 | done: | ||
8012 | up(&priv->action_sem); | ||
8013 | return err; | ||
8014 | } | ||
8015 | |||
8016 | static int ipw2100_wx_get_preamble(struct net_device *dev, | ||
8017 | struct iw_request_info *info, | ||
8018 | union iwreq_data *wrqu, char *extra) | ||
8019 | { | ||
8020 | /* | ||
8021 | * This can be called at any time. No action lock required | ||
8022 | */ | ||
8023 | |||
8024 | struct ipw2100_priv *priv = ieee80211_priv(dev); | ||
8025 | |||
8026 | if (priv->config & CFG_LONG_PREAMBLE) | ||
8027 | snprintf(wrqu->name, IFNAMSIZ, "long (1)"); | ||
8028 | else | ||
8029 | snprintf(wrqu->name, IFNAMSIZ, "auto (0)"); | ||
8030 | |||
8031 | return 0; | ||
8032 | } | ||
8033 | |||
8034 | static iw_handler ipw2100_wx_handlers[] = | ||
8035 | { | ||
8036 | NULL, /* SIOCSIWCOMMIT */ | ||
8037 | ipw2100_wx_get_name, /* SIOCGIWNAME */ | ||
8038 | NULL, /* SIOCSIWNWID */ | ||
8039 | NULL, /* SIOCGIWNWID */ | ||
8040 | ipw2100_wx_set_freq, /* SIOCSIWFREQ */ | ||
8041 | ipw2100_wx_get_freq, /* SIOCGIWFREQ */ | ||
8042 | ipw2100_wx_set_mode, /* SIOCSIWMODE */ | ||
8043 | ipw2100_wx_get_mode, /* SIOCGIWMODE */ | ||
8044 | NULL, /* SIOCSIWSENS */ | ||
8045 | NULL, /* SIOCGIWSENS */ | ||
8046 | NULL, /* SIOCSIWRANGE */ | ||
8047 | ipw2100_wx_get_range, /* SIOCGIWRANGE */ | ||
8048 | NULL, /* SIOCSIWPRIV */ | ||
8049 | NULL, /* SIOCGIWPRIV */ | ||
8050 | NULL, /* SIOCSIWSTATS */ | ||
8051 | NULL, /* SIOCGIWSTATS */ | ||
8052 | NULL, /* SIOCSIWSPY */ | ||
8053 | NULL, /* SIOCGIWSPY */ | ||
8054 | NULL, /* SIOCGIWTHRSPY */ | ||
8055 | NULL, /* SIOCWIWTHRSPY */ | ||
8056 | ipw2100_wx_set_wap, /* SIOCSIWAP */ | ||
8057 | ipw2100_wx_get_wap, /* SIOCGIWAP */ | ||
8058 | NULL, /* -- hole -- */ | ||
8059 | NULL, /* SIOCGIWAPLIST -- depricated */ | ||
8060 | ipw2100_wx_set_scan, /* SIOCSIWSCAN */ | ||
8061 | ipw2100_wx_get_scan, /* SIOCGIWSCAN */ | ||
8062 | ipw2100_wx_set_essid, /* SIOCSIWESSID */ | ||
8063 | ipw2100_wx_get_essid, /* SIOCGIWESSID */ | ||
8064 | ipw2100_wx_set_nick, /* SIOCSIWNICKN */ | ||
8065 | ipw2100_wx_get_nick, /* SIOCGIWNICKN */ | ||
8066 | NULL, /* -- hole -- */ | ||
8067 | NULL, /* -- hole -- */ | ||
8068 | ipw2100_wx_set_rate, /* SIOCSIWRATE */ | ||
8069 | ipw2100_wx_get_rate, /* SIOCGIWRATE */ | ||
8070 | ipw2100_wx_set_rts, /* SIOCSIWRTS */ | ||
8071 | ipw2100_wx_get_rts, /* SIOCGIWRTS */ | ||
8072 | ipw2100_wx_set_frag, /* SIOCSIWFRAG */ | ||
8073 | ipw2100_wx_get_frag, /* SIOCGIWFRAG */ | ||
8074 | ipw2100_wx_set_txpow, /* SIOCSIWTXPOW */ | ||
8075 | ipw2100_wx_get_txpow, /* SIOCGIWTXPOW */ | ||
8076 | ipw2100_wx_set_retry, /* SIOCSIWRETRY */ | ||
8077 | ipw2100_wx_get_retry, /* SIOCGIWRETRY */ | ||
8078 | ipw2100_wx_set_encode, /* SIOCSIWENCODE */ | ||
8079 | ipw2100_wx_get_encode, /* SIOCGIWENCODE */ | ||
8080 | ipw2100_wx_set_power, /* SIOCSIWPOWER */ | ||
8081 | ipw2100_wx_get_power, /* SIOCGIWPOWER */ | ||
8082 | }; | ||
8083 | |||
8084 | #define IPW2100_PRIV_SET_MONITOR SIOCIWFIRSTPRIV | ||
8085 | #define IPW2100_PRIV_RESET SIOCIWFIRSTPRIV+1 | ||
8086 | #define IPW2100_PRIV_SET_POWER SIOCIWFIRSTPRIV+2 | ||
8087 | #define IPW2100_PRIV_GET_POWER SIOCIWFIRSTPRIV+3 | ||
8088 | #define IPW2100_PRIV_SET_LONGPREAMBLE SIOCIWFIRSTPRIV+4 | ||
8089 | #define IPW2100_PRIV_GET_LONGPREAMBLE SIOCIWFIRSTPRIV+5 | ||
8090 | |||
8091 | static const struct iw_priv_args ipw2100_private_args[] = { | ||
8092 | |||
8093 | #ifdef CONFIG_IPW2100_MONITOR | ||
8094 | { | ||
8095 | IPW2100_PRIV_SET_MONITOR, | ||
8096 | IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 2, 0, "monitor" | ||
8097 | }, | ||
8098 | { | ||
8099 | IPW2100_PRIV_RESET, | ||
8100 | IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 0, 0, "reset" | ||
8101 | }, | ||
8102 | #endif /* CONFIG_IPW2100_MONITOR */ | ||
8103 | |||
8104 | { | ||
8105 | IPW2100_PRIV_SET_POWER, | ||
8106 | IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "set_power" | ||
8107 | }, | ||
8108 | { | ||
8109 | IPW2100_PRIV_GET_POWER, | ||
8110 | 0, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_FIXED | MAX_POWER_STRING, "get_power" | ||
8111 | }, | ||
8112 | { | ||
8113 | IPW2100_PRIV_SET_LONGPREAMBLE, | ||
8114 | IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "set_preamble" | ||
8115 | }, | ||
8116 | { | ||
8117 | IPW2100_PRIV_GET_LONGPREAMBLE, | ||
8118 | 0, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_FIXED | IFNAMSIZ, "get_preamble" | ||
8119 | }, | ||
8120 | }; | ||
8121 | |||
8122 | static iw_handler ipw2100_private_handler[] = { | ||
8123 | #ifdef CONFIG_IPW2100_MONITOR | ||
8124 | ipw2100_wx_set_promisc, | ||
8125 | ipw2100_wx_reset, | ||
8126 | #else /* CONFIG_IPW2100_MONITOR */ | ||
8127 | NULL, | ||
8128 | NULL, | ||
8129 | #endif /* CONFIG_IPW2100_MONITOR */ | ||
8130 | ipw2100_wx_set_powermode, | ||
8131 | ipw2100_wx_get_powermode, | ||
8132 | ipw2100_wx_set_preamble, | ||
8133 | ipw2100_wx_get_preamble, | ||
8134 | }; | ||
8135 | |||
8136 | struct iw_handler_def ipw2100_wx_handler_def = | ||
8137 | { | ||
8138 | .standard = ipw2100_wx_handlers, | ||
8139 | .num_standard = sizeof(ipw2100_wx_handlers) / sizeof(iw_handler), | ||
8140 | .num_private = sizeof(ipw2100_private_handler) / sizeof(iw_handler), | ||
8141 | .num_private_args = sizeof(ipw2100_private_args) / | ||
8142 | sizeof(struct iw_priv_args), | ||
8143 | .private = (iw_handler *)ipw2100_private_handler, | ||
8144 | .private_args = (struct iw_priv_args *)ipw2100_private_args, | ||
8145 | }; | ||
8146 | |||
8147 | /* | ||
8148 | * Get wireless statistics. | ||
8149 | * Called by /proc/net/wireless | ||
8150 | * Also called by SIOCGIWSTATS | ||
8151 | */ | ||
8152 | struct iw_statistics *ipw2100_wx_wireless_stats(struct net_device * dev) | ||
8153 | { | ||
8154 | enum { | ||
8155 | POOR = 30, | ||
8156 | FAIR = 60, | ||
8157 | GOOD = 80, | ||
8158 | VERY_GOOD = 90, | ||
8159 | EXCELLENT = 95, | ||
8160 | PERFECT = 100 | ||
8161 | }; | ||
8162 | int rssi_qual; | ||
8163 | int tx_qual; | ||
8164 | int beacon_qual; | ||
8165 | |||
8166 | struct ipw2100_priv *priv = ieee80211_priv(dev); | ||
8167 | struct iw_statistics *wstats; | ||
8168 | u32 rssi, quality, tx_retries, missed_beacons, tx_failures; | ||
8169 | u32 ord_len = sizeof(u32); | ||
8170 | |||
8171 | if (!priv) | ||
8172 | return (struct iw_statistics *) NULL; | ||
8173 | |||
8174 | wstats = &priv->wstats; | ||
8175 | |||
8176 | /* if hw is disabled, then ipw2100_get_ordinal() can't be called. | ||
8177 | * ipw2100_wx_wireless_stats seems to be called before fw is | ||
8178 | * initialized. STATUS_ASSOCIATED will only be set if the hw is up | ||
8179 | * and associated; if not associcated, the values are all meaningless | ||
8180 | * anyway, so set them all to NULL and INVALID */ | ||
8181 | if (!(priv->status & STATUS_ASSOCIATED)) { | ||
8182 | wstats->miss.beacon = 0; | ||
8183 | wstats->discard.retries = 0; | ||
8184 | wstats->qual.qual = 0; | ||
8185 | wstats->qual.level = 0; | ||
8186 | wstats->qual.noise = 0; | ||
8187 | wstats->qual.updated = 7; | ||
8188 | wstats->qual.updated |= IW_QUAL_NOISE_INVALID | | ||
8189 | IW_QUAL_QUAL_INVALID | IW_QUAL_LEVEL_INVALID; | ||
8190 | return wstats; | ||
8191 | } | ||
8192 | |||
8193 | if (ipw2100_get_ordinal(priv, IPW_ORD_STAT_PERCENT_MISSED_BCNS, | ||
8194 | &missed_beacons, &ord_len)) | ||
8195 | goto fail_get_ordinal; | ||
8196 | |||
8197 | /* If we don't have a connection the quality and level is 0*/ | ||
8198 | if (!(priv->status & STATUS_ASSOCIATED)) { | ||
8199 | wstats->qual.qual = 0; | ||
8200 | wstats->qual.level = 0; | ||
8201 | } else { | ||
8202 | if (ipw2100_get_ordinal(priv, IPW_ORD_RSSI_AVG_CURR, | ||
8203 | &rssi, &ord_len)) | ||
8204 | goto fail_get_ordinal; | ||
8205 | wstats->qual.level = rssi + IPW2100_RSSI_TO_DBM; | ||
8206 | if (rssi < 10) | ||
8207 | rssi_qual = rssi * POOR / 10; | ||
8208 | else if (rssi < 15) | ||
8209 | rssi_qual = (rssi - 10) * (FAIR - POOR) / 5 + POOR; | ||
8210 | else if (rssi < 20) | ||
8211 | rssi_qual = (rssi - 15) * (GOOD - FAIR) / 5 + FAIR; | ||
8212 | else if (rssi < 30) | ||
8213 | rssi_qual = (rssi - 20) * (VERY_GOOD - GOOD) / | ||
8214 | 10 + GOOD; | ||
8215 | else | ||
8216 | rssi_qual = (rssi - 30) * (PERFECT - VERY_GOOD) / | ||
8217 | 10 + VERY_GOOD; | ||
8218 | |||
8219 | if (ipw2100_get_ordinal(priv, IPW_ORD_STAT_PERCENT_RETRIES, | ||
8220 | &tx_retries, &ord_len)) | ||
8221 | goto fail_get_ordinal; | ||
8222 | |||
8223 | if (tx_retries > 75) | ||
8224 | tx_qual = (90 - tx_retries) * POOR / 15; | ||
8225 | else if (tx_retries > 70) | ||
8226 | tx_qual = (75 - tx_retries) * (FAIR - POOR) / 5 + POOR; | ||
8227 | else if (tx_retries > 65) | ||
8228 | tx_qual = (70 - tx_retries) * (GOOD - FAIR) / 5 + FAIR; | ||
8229 | else if (tx_retries > 50) | ||
8230 | tx_qual = (65 - tx_retries) * (VERY_GOOD - GOOD) / | ||
8231 | 15 + GOOD; | ||
8232 | else | ||
8233 | tx_qual = (50 - tx_retries) * | ||
8234 | (PERFECT - VERY_GOOD) / 50 + VERY_GOOD; | ||
8235 | |||
8236 | if (missed_beacons > 50) | ||
8237 | beacon_qual = (60 - missed_beacons) * POOR / 10; | ||
8238 | else if (missed_beacons > 40) | ||
8239 | beacon_qual = (50 - missed_beacons) * (FAIR - POOR) / | ||
8240 | 10 + POOR; | ||
8241 | else if (missed_beacons > 32) | ||
8242 | beacon_qual = (40 - missed_beacons) * (GOOD - FAIR) / | ||
8243 | 18 + FAIR; | ||
8244 | else if (missed_beacons > 20) | ||
8245 | beacon_qual = (32 - missed_beacons) * | ||
8246 | (VERY_GOOD - GOOD) / 20 + GOOD; | ||
8247 | else | ||
8248 | beacon_qual = (20 - missed_beacons) * | ||
8249 | (PERFECT - VERY_GOOD) / 20 + VERY_GOOD; | ||
8250 | |||
8251 | quality = min(beacon_qual, min(tx_qual, rssi_qual)); | ||
8252 | |||
8253 | #ifdef CONFIG_IPW_DEBUG | ||
8254 | if (beacon_qual == quality) | ||
8255 | IPW_DEBUG_WX("Quality clamped by Missed Beacons\n"); | ||
8256 | else if (tx_qual == quality) | ||
8257 | IPW_DEBUG_WX("Quality clamped by Tx Retries\n"); | ||
8258 | else if (quality != 100) | ||
8259 | IPW_DEBUG_WX("Quality clamped by Signal Strength\n"); | ||
8260 | else | ||
8261 | IPW_DEBUG_WX("Quality not clamped.\n"); | ||
8262 | #endif | ||
8263 | |||
8264 | wstats->qual.qual = quality; | ||
8265 | wstats->qual.level = rssi + IPW2100_RSSI_TO_DBM; | ||
8266 | } | ||
8267 | |||
8268 | wstats->qual.noise = 0; | ||
8269 | wstats->qual.updated = 7; | ||
8270 | wstats->qual.updated |= IW_QUAL_NOISE_INVALID; | ||
8271 | |||
8272 | /* FIXME: this is percent and not a # */ | ||
8273 | wstats->miss.beacon = missed_beacons; | ||
8274 | |||
8275 | if (ipw2100_get_ordinal(priv, IPW_ORD_STAT_TX_FAILURES, | ||
8276 | &tx_failures, &ord_len)) | ||
8277 | goto fail_get_ordinal; | ||
8278 | wstats->discard.retries = tx_failures; | ||
8279 | |||
8280 | return wstats; | ||
8281 | |||
8282 | fail_get_ordinal: | ||
8283 | IPW_DEBUG_WX("failed querying ordinals.\n"); | ||
8284 | |||
8285 | return (struct iw_statistics *) NULL; | ||
8286 | } | ||
8287 | |||
8288 | void ipw2100_wx_event_work(struct ipw2100_priv *priv) | ||
8289 | { | ||
8290 | union iwreq_data wrqu; | ||
8291 | int len = ETH_ALEN; | ||
8292 | |||
8293 | if (priv->status & STATUS_STOPPING) | ||
8294 | return; | ||
8295 | |||
8296 | down(&priv->action_sem); | ||
8297 | |||
8298 | IPW_DEBUG_WX("enter\n"); | ||
8299 | |||
8300 | up(&priv->action_sem); | ||
8301 | |||
8302 | wrqu.ap_addr.sa_family = ARPHRD_ETHER; | ||
8303 | |||
8304 | /* Fetch BSSID from the hardware */ | ||
8305 | if (!(priv->status & (STATUS_ASSOCIATING | STATUS_ASSOCIATED)) || | ||
8306 | priv->status & STATUS_RF_KILL_MASK || | ||
8307 | ipw2100_get_ordinal(priv, IPW_ORD_STAT_ASSN_AP_BSSID, | ||
8308 | &priv->bssid, &len)) { | ||
8309 | memset(wrqu.ap_addr.sa_data, 0, ETH_ALEN); | ||
8310 | } else { | ||
8311 | /* We now have the BSSID, so can finish setting to the full | ||
8312 | * associated state */ | ||
8313 | memcpy(wrqu.ap_addr.sa_data, priv->bssid, ETH_ALEN); | ||
8314 | memcpy(&priv->ieee->bssid, priv->bssid, ETH_ALEN); | ||
8315 | priv->status &= ~STATUS_ASSOCIATING; | ||
8316 | priv->status |= STATUS_ASSOCIATED; | ||
8317 | netif_carrier_on(priv->net_dev); | ||
8318 | if (netif_queue_stopped(priv->net_dev)) { | ||
8319 | IPW_DEBUG_INFO("Waking net queue.\n"); | ||
8320 | netif_wake_queue(priv->net_dev); | ||
8321 | } else { | ||
8322 | IPW_DEBUG_INFO("Starting net queue.\n"); | ||
8323 | netif_start_queue(priv->net_dev); | ||
8324 | } | ||
8325 | } | ||
8326 | |||
8327 | if (!(priv->status & STATUS_ASSOCIATED)) { | ||
8328 | IPW_DEBUG_WX("Configuring ESSID\n"); | ||
8329 | down(&priv->action_sem); | ||
8330 | /* This is a disassociation event, so kick the firmware to | ||
8331 | * look for another AP */ | ||
8332 | if (priv->config & CFG_STATIC_ESSID) | ||
8333 | ipw2100_set_essid(priv, priv->essid, priv->essid_len, 0); | ||
8334 | else | ||
8335 | ipw2100_set_essid(priv, NULL, 0, 0); | ||
8336 | up(&priv->action_sem); | ||
8337 | } | ||
8338 | |||
8339 | wireless_send_event(priv->net_dev, SIOCGIWAP, &wrqu, NULL); | ||
8340 | } | ||
8341 | |||
8342 | #define IPW2100_FW_MAJOR_VERSION 1 | ||
8343 | #define IPW2100_FW_MINOR_VERSION 3 | ||
8344 | |||
8345 | #define IPW2100_FW_MINOR(x) ((x & 0xff) >> 8) | ||
8346 | #define IPW2100_FW_MAJOR(x) (x & 0xff) | ||
8347 | |||
8348 | #define IPW2100_FW_VERSION ((IPW2100_FW_MINOR_VERSION << 8) | \ | ||
8349 | IPW2100_FW_MAJOR_VERSION) | ||
8350 | |||
8351 | #define IPW2100_FW_PREFIX "ipw2100-" __stringify(IPW2100_FW_MAJOR_VERSION) \ | ||
8352 | "." __stringify(IPW2100_FW_MINOR_VERSION) | ||
8353 | |||
8354 | #define IPW2100_FW_NAME(x) IPW2100_FW_PREFIX "" x ".fw" | ||
8355 | |||
8356 | |||
8357 | /* | ||
8358 | |||
8359 | BINARY FIRMWARE HEADER FORMAT | ||
8360 | |||
8361 | offset length desc | ||
8362 | 0 2 version | ||
8363 | 2 2 mode == 0:BSS,1:IBSS,2:MONITOR | ||
8364 | 4 4 fw_len | ||
8365 | 8 4 uc_len | ||
8366 | C fw_len firmware data | ||
8367 | 12 + fw_len uc_len microcode data | ||
8368 | |||
8369 | */ | ||
8370 | |||
8371 | struct ipw2100_fw_header { | ||
8372 | short version; | ||
8373 | short mode; | ||
8374 | unsigned int fw_size; | ||
8375 | unsigned int uc_size; | ||
8376 | } __attribute__ ((packed)); | ||
8377 | |||
8378 | |||
8379 | |||
8380 | static int ipw2100_mod_firmware_load(struct ipw2100_fw *fw) | ||
8381 | { | ||
8382 | struct ipw2100_fw_header *h = | ||
8383 | (struct ipw2100_fw_header *)fw->fw_entry->data; | ||
8384 | |||
8385 | if (IPW2100_FW_MAJOR(h->version) != IPW2100_FW_MAJOR_VERSION) { | ||
8386 | IPW_DEBUG_WARNING("Firmware image not compatible " | ||
8387 | "(detected version id of %u). " | ||
8388 | "See Documentation/networking/README.ipw2100\n", | ||
8389 | h->version); | ||
8390 | return 1; | ||
8391 | } | ||
8392 | |||
8393 | fw->version = h->version; | ||
8394 | fw->fw.data = fw->fw_entry->data + sizeof(struct ipw2100_fw_header); | ||
8395 | fw->fw.size = h->fw_size; | ||
8396 | fw->uc.data = fw->fw.data + h->fw_size; | ||
8397 | fw->uc.size = h->uc_size; | ||
8398 | |||
8399 | return 0; | ||
8400 | } | ||
8401 | |||
8402 | |||
8403 | int ipw2100_get_firmware(struct ipw2100_priv *priv, struct ipw2100_fw *fw) | ||
8404 | { | ||
8405 | char *fw_name; | ||
8406 | int rc; | ||
8407 | |||
8408 | IPW_DEBUG_INFO("%s: Using hotplug firmware load.\n", | ||
8409 | priv->net_dev->name); | ||
8410 | |||
8411 | switch (priv->ieee->iw_mode) { | ||
8412 | case IW_MODE_ADHOC: | ||
8413 | fw_name = IPW2100_FW_NAME("-i"); | ||
8414 | break; | ||
8415 | #ifdef CONFIG_IPW2100_MONITOR | ||
8416 | case IW_MODE_MONITOR: | ||
8417 | fw_name = IPW2100_FW_NAME("-p"); | ||
8418 | break; | ||
8419 | #endif | ||
8420 | case IW_MODE_INFRA: | ||
8421 | default: | ||
8422 | fw_name = IPW2100_FW_NAME(""); | ||
8423 | break; | ||
8424 | } | ||
8425 | |||
8426 | rc = request_firmware(&fw->fw_entry, fw_name, &priv->pci_dev->dev); | ||
8427 | |||
8428 | if (rc < 0) { | ||
8429 | IPW_DEBUG_ERROR( | ||
8430 | "%s: Firmware '%s' not available or load failed.\n", | ||
8431 | priv->net_dev->name, fw_name); | ||
8432 | return rc; | ||
8433 | } | ||
8434 | IPW_DEBUG_INFO("firmware data %p size %d\n", fw->fw_entry->data, | ||
8435 | fw->fw_entry->size); | ||
8436 | |||
8437 | ipw2100_mod_firmware_load(fw); | ||
8438 | |||
8439 | return 0; | ||
8440 | } | ||
8441 | |||
8442 | void ipw2100_release_firmware(struct ipw2100_priv *priv, | ||
8443 | struct ipw2100_fw *fw) | ||
8444 | { | ||
8445 | fw->version = 0; | ||
8446 | if (fw->fw_entry) | ||
8447 | release_firmware(fw->fw_entry); | ||
8448 | fw->fw_entry = NULL; | ||
8449 | } | ||
8450 | |||
8451 | |||
8452 | int ipw2100_get_fwversion(struct ipw2100_priv *priv, char *buf, size_t max) | ||
8453 | { | ||
8454 | char ver[MAX_FW_VERSION_LEN]; | ||
8455 | u32 len = MAX_FW_VERSION_LEN; | ||
8456 | u32 tmp; | ||
8457 | int i; | ||
8458 | /* firmware version is an ascii string (max len of 14) */ | ||
8459 | if (ipw2100_get_ordinal(priv, IPW_ORD_STAT_FW_VER_NUM, | ||
8460 | ver, &len)) | ||
8461 | return -EIO; | ||
8462 | tmp = max; | ||
8463 | if (len >= max) | ||
8464 | len = max - 1; | ||
8465 | for (i = 0; i < len; i++) | ||
8466 | buf[i] = ver[i]; | ||
8467 | buf[i] = '\0'; | ||
8468 | return tmp; | ||
8469 | } | ||
8470 | |||
8471 | int ipw2100_get_ucodeversion(struct ipw2100_priv *priv, char *buf, size_t max) | ||
8472 | { | ||
8473 | u32 ver; | ||
8474 | u32 len = sizeof(ver); | ||
8475 | /* microcode version is a 32 bit integer */ | ||
8476 | if (ipw2100_get_ordinal(priv, IPW_ORD_UCODE_VERSION, | ||
8477 | &ver, &len)) | ||
8478 | return -EIO; | ||
8479 | return snprintf(buf, max, "%08X", ver); | ||
8480 | } | ||
8481 | |||
8482 | /* | ||
8483 | * On exit, the firmware will have been freed from the fw list | ||
8484 | */ | ||
8485 | int ipw2100_fw_download(struct ipw2100_priv *priv, struct ipw2100_fw *fw) | ||
8486 | { | ||
8487 | /* firmware is constructed of N contiguous entries, each entry is | ||
8488 | * structured as: | ||
8489 | * | ||
8490 | * offset sie desc | ||
8491 | * 0 4 address to write to | ||
8492 | * 4 2 length of data run | ||
8493 | * 6 length data | ||
8494 | */ | ||
8495 | unsigned int addr; | ||
8496 | unsigned short len; | ||
8497 | |||
8498 | const unsigned char *firmware_data = fw->fw.data; | ||
8499 | unsigned int firmware_data_left = fw->fw.size; | ||
8500 | |||
8501 | while (firmware_data_left > 0) { | ||
8502 | addr = *(u32 *)(firmware_data); | ||
8503 | firmware_data += 4; | ||
8504 | firmware_data_left -= 4; | ||
8505 | |||
8506 | len = *(u16 *)(firmware_data); | ||
8507 | firmware_data += 2; | ||
8508 | firmware_data_left -= 2; | ||
8509 | |||
8510 | if (len > 32) { | ||
8511 | IPW_DEBUG_ERROR( | ||
8512 | "Invalid firmware run-length of %d bytes\n", | ||
8513 | len); | ||
8514 | return -EINVAL; | ||
8515 | } | ||
8516 | |||
8517 | write_nic_memory(priv->net_dev, addr, len, firmware_data); | ||
8518 | firmware_data += len; | ||
8519 | firmware_data_left -= len; | ||
8520 | } | ||
8521 | |||
8522 | return 0; | ||
8523 | } | ||
8524 | |||
8525 | struct symbol_alive_response { | ||
8526 | u8 cmd_id; | ||
8527 | u8 seq_num; | ||
8528 | u8 ucode_rev; | ||
8529 | u8 eeprom_valid; | ||
8530 | u16 valid_flags; | ||
8531 | u8 IEEE_addr[6]; | ||
8532 | u16 flags; | ||
8533 | u16 pcb_rev; | ||
8534 | u16 clock_settle_time; // 1us LSB | ||
8535 | u16 powerup_settle_time; // 1us LSB | ||
8536 | u16 hop_settle_time; // 1us LSB | ||
8537 | u8 date[3]; // month, day, year | ||
8538 | u8 time[2]; // hours, minutes | ||
8539 | u8 ucode_valid; | ||
8540 | }; | ||
8541 | |||
8542 | int ipw2100_ucode_download(struct ipw2100_priv *priv, struct ipw2100_fw *fw) | ||
8543 | { | ||
8544 | struct net_device *dev = priv->net_dev; | ||
8545 | const unsigned char *microcode_data = fw->uc.data; | ||
8546 | unsigned int microcode_data_left = fw->uc.size; | ||
8547 | |||
8548 | struct symbol_alive_response response; | ||
8549 | int i, j; | ||
8550 | u8 data; | ||
8551 | |||
8552 | /* Symbol control */ | ||
8553 | write_nic_word(dev, IPW2100_CONTROL_REG, 0x703); | ||
8554 | readl((void *)(dev->base_addr)); | ||
8555 | write_nic_word(dev, IPW2100_CONTROL_REG, 0x707); | ||
8556 | readl((void *)(dev->base_addr)); | ||
8557 | |||
8558 | /* HW config */ | ||
8559 | write_nic_byte(dev, 0x210014, 0x72); /* fifo width =16 */ | ||
8560 | readl((void *)(dev->base_addr)); | ||
8561 | write_nic_byte(dev, 0x210014, 0x72); /* fifo width =16 */ | ||
8562 | readl((void *)(dev->base_addr)); | ||
8563 | |||
8564 | /* EN_CS_ACCESS bit to reset control store pointer */ | ||
8565 | write_nic_byte(dev, 0x210000, 0x40); | ||
8566 | readl((void *)(dev->base_addr)); | ||
8567 | write_nic_byte(dev, 0x210000, 0x0); | ||
8568 | readl((void *)(dev->base_addr)); | ||
8569 | write_nic_byte(dev, 0x210000, 0x40); | ||
8570 | readl((void *)(dev->base_addr)); | ||
8571 | |||
8572 | /* copy microcode from buffer into Symbol */ | ||
8573 | |||
8574 | while (microcode_data_left > 0) { | ||
8575 | write_nic_byte(dev, 0x210010, *microcode_data++); | ||
8576 | write_nic_byte(dev, 0x210010, *microcode_data++); | ||
8577 | microcode_data_left -= 2; | ||
8578 | } | ||
8579 | |||
8580 | /* EN_CS_ACCESS bit to reset the control store pointer */ | ||
8581 | write_nic_byte(dev, 0x210000, 0x0); | ||
8582 | readl((void *)(dev->base_addr)); | ||
8583 | |||
8584 | /* Enable System (Reg 0) | ||
8585 | * first enable causes garbage in RX FIFO */ | ||
8586 | write_nic_byte(dev, 0x210000, 0x0); | ||
8587 | readl((void *)(dev->base_addr)); | ||
8588 | write_nic_byte(dev, 0x210000, 0x80); | ||
8589 | readl((void *)(dev->base_addr)); | ||
8590 | |||
8591 | /* Reset External Baseband Reg */ | ||
8592 | write_nic_word(dev, IPW2100_CONTROL_REG, 0x703); | ||
8593 | readl((void *)(dev->base_addr)); | ||
8594 | write_nic_word(dev, IPW2100_CONTROL_REG, 0x707); | ||
8595 | readl((void *)(dev->base_addr)); | ||
8596 | |||
8597 | /* HW Config (Reg 5) */ | ||
8598 | write_nic_byte(dev, 0x210014, 0x72); // fifo width =16 | ||
8599 | readl((void *)(dev->base_addr)); | ||
8600 | write_nic_byte(dev, 0x210014, 0x72); // fifo width =16 | ||
8601 | readl((void *)(dev->base_addr)); | ||
8602 | |||
8603 | /* Enable System (Reg 0) | ||
8604 | * second enable should be OK */ | ||
8605 | write_nic_byte(dev, 0x210000, 0x00); // clear enable system | ||
8606 | readl((void *)(dev->base_addr)); | ||
8607 | write_nic_byte(dev, 0x210000, 0x80); // set enable system | ||
8608 | |||
8609 | /* check Symbol is enabled - upped this from 5 as it wasn't always | ||
8610 | * catching the update */ | ||
8611 | for (i = 0; i < 10; i++) { | ||
8612 | udelay(10); | ||
8613 | |||
8614 | /* check Dino is enabled bit */ | ||
8615 | read_nic_byte(dev, 0x210000, &data); | ||
8616 | if (data & 0x1) | ||
8617 | break; | ||
8618 | } | ||
8619 | |||
8620 | if (i == 10) { | ||
8621 | IPW_DEBUG_ERROR("%s: Error initializing Symbol\n", | ||
8622 | dev->name); | ||
8623 | return -EIO; | ||
8624 | } | ||
8625 | |||
8626 | /* Get Symbol alive response */ | ||
8627 | for (i = 0; i < 30; i++) { | ||
8628 | /* Read alive response structure */ | ||
8629 | for (j = 0; | ||
8630 | j < (sizeof(struct symbol_alive_response) >> 1); | ||
8631 | j++) | ||
8632 | read_nic_word(dev, 0x210004, | ||
8633 | ((u16 *)&response) + j); | ||
8634 | |||
8635 | if ((response.cmd_id == 1) && | ||
8636 | (response.ucode_valid == 0x1)) | ||
8637 | break; | ||
8638 | udelay(10); | ||
8639 | } | ||
8640 | |||
8641 | if (i == 30) { | ||
8642 | IPW_DEBUG_ERROR("%s: No response from Symbol - hw not alive\n", | ||
8643 | dev->name); | ||
8644 | printk_buf(IPW_DL_ERROR, (u8*)&response, sizeof(response)); | ||
8645 | return -EIO; | ||
8646 | } | ||
8647 | |||
8648 | return 0; | ||
8649 | } | ||
diff --git a/drivers/net/wireless/ipw2100.h b/drivers/net/wireless/ipw2100.h new file mode 100644 index 000000000000..0cc5746dd4f1 --- /dev/null +++ b/drivers/net/wireless/ipw2100.h | |||
@@ -0,0 +1,1278 @@ | |||
1 | /****************************************************************************** | ||
2 | |||
3 | Copyright(c) 2003 - 2005 Intel Corporation. All rights reserved. | ||
4 | |||
5 | This program is free software; you can redistribute it and/or modify it | ||
6 | under the terms of version 2 of the GNU General Public License as | ||
7 | published by the Free Software Foundation. | ||
8 | |||
9 | This program is distributed in the hope that it will be useful, but WITHOUT | ||
10 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | ||
11 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | ||
12 | more details. | ||
13 | |||
14 | You should have received a copy of the GNU General Public License along with | ||
15 | this program; if not, write to the Free Software Foundation, Inc., 59 | ||
16 | Temple Place - Suite 330, Boston, MA 02111-1307, USA. | ||
17 | |||
18 | The full GNU General Public License is included in this distribution in the | ||
19 | file called LICENSE. | ||
20 | |||
21 | Contact Information: | ||
22 | James P. Ketrenos <ipw2100-admin@linux.intel.com> | ||
23 | Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 | ||
24 | |||
25 | ******************************************************************************/ | ||
26 | #ifndef _IPW2100_H | ||
27 | #define _IPW2100_H | ||
28 | |||
29 | #include <linux/sched.h> | ||
30 | #include <linux/interrupt.h> | ||
31 | #include <linux/netdevice.h> | ||
32 | #include <linux/etherdevice.h> | ||
33 | #include <linux/list.h> | ||
34 | #include <linux/delay.h> | ||
35 | #include <linux/skbuff.h> | ||
36 | #include <asm/io.h> | ||
37 | #include <linux/socket.h> | ||
38 | #include <linux/if_arp.h> | ||
39 | #include <linux/wireless.h> | ||
40 | #include <linux/version.h> | ||
41 | #include <net/iw_handler.h> // new driver API | ||
42 | |||
43 | #include <net/ieee80211.h> | ||
44 | |||
45 | #include <linux/workqueue.h> | ||
46 | |||
47 | #ifndef IRQ_NONE | ||
48 | typedef void irqreturn_t; | ||
49 | #define IRQ_NONE | ||
50 | #define IRQ_HANDLED | ||
51 | #define IRQ_RETVAL(x) | ||
52 | #endif | ||
53 | |||
54 | #if WIRELESS_EXT < 17 | ||
55 | #define IW_QUAL_QUAL_INVALID 0x10 | ||
56 | #define IW_QUAL_LEVEL_INVALID 0x20 | ||
57 | #define IW_QUAL_NOISE_INVALID 0x40 | ||
58 | #endif | ||
59 | |||
60 | #if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,5) ) | ||
61 | #define pci_dma_sync_single_for_cpu pci_dma_sync_single | ||
62 | #define pci_dma_sync_single_for_device pci_dma_sync_single | ||
63 | #endif | ||
64 | |||
65 | #ifndef HAVE_FREE_NETDEV | ||
66 | #define free_netdev(x) kfree(x) | ||
67 | #endif | ||
68 | |||
69 | |||
70 | |||
71 | struct ipw2100_priv; | ||
72 | struct ipw2100_tx_packet; | ||
73 | struct ipw2100_rx_packet; | ||
74 | |||
75 | #ifdef CONFIG_IPW_DEBUG | ||
76 | enum { IPW_DEBUG_ENABLED = 1 }; | ||
77 | extern u32 ipw2100_debug_level; | ||
78 | #define IPW_DEBUG(level, message...) \ | ||
79 | do { \ | ||
80 | if (ipw2100_debug_level & (level)) { \ | ||
81 | printk(KERN_DEBUG "ipw2100: %c %s ", \ | ||
82 | in_interrupt() ? 'I' : 'U', __FUNCTION__); \ | ||
83 | printk(message); \ | ||
84 | } \ | ||
85 | } while (0) | ||
86 | #else | ||
87 | enum { IPW_DEBUG_ENABLED = 0 }; | ||
88 | #define IPW_DEBUG(level, message...) do {} while (0) | ||
89 | #endif /* CONFIG_IPW_DEBUG */ | ||
90 | |||
91 | #define IPW_DL_UNINIT 0x80000000 | ||
92 | #define IPW_DL_NONE 0x00000000 | ||
93 | #define IPW_DL_ALL 0x7FFFFFFF | ||
94 | |||
95 | /* | ||
96 | * To use the debug system; | ||
97 | * | ||
98 | * If you are defining a new debug classification, simply add it to the #define | ||
99 | * list here in the form of: | ||
100 | * | ||
101 | * #define IPW_DL_xxxx VALUE | ||
102 | * | ||
103 | * shifting value to the left one bit from the previous entry. xxxx should be | ||
104 | * the name of the classification (for example, WEP) | ||
105 | * | ||
106 | * You then need to either add a IPW2100_xxxx_DEBUG() macro definition for your | ||
107 | * classification, or use IPW_DEBUG(IPW_DL_xxxx, ...) whenever you want | ||
108 | * to send output to that classification. | ||
109 | * | ||
110 | * To add your debug level to the list of levels seen when you perform | ||
111 | * | ||
112 | * % cat /proc/net/ipw2100/debug_level | ||
113 | * | ||
114 | * you simply need to add your entry to the ipw2100_debug_levels array. | ||
115 | * | ||
116 | * If you do not see debug_level in /proc/net/ipw2100 then you do not have | ||
117 | * CONFIG_IPW_DEBUG defined in your kernel configuration | ||
118 | * | ||
119 | */ | ||
120 | |||
121 | #define IPW_DL_ERROR (1<<0) | ||
122 | #define IPW_DL_WARNING (1<<1) | ||
123 | #define IPW_DL_INFO (1<<2) | ||
124 | #define IPW_DL_WX (1<<3) | ||
125 | #define IPW_DL_HC (1<<5) | ||
126 | #define IPW_DL_STATE (1<<6) | ||
127 | |||
128 | #define IPW_DL_NOTIF (1<<10) | ||
129 | #define IPW_DL_SCAN (1<<11) | ||
130 | #define IPW_DL_ASSOC (1<<12) | ||
131 | #define IPW_DL_DROP (1<<13) | ||
132 | |||
133 | #define IPW_DL_IOCTL (1<<14) | ||
134 | #define IPW_DL_RF_KILL (1<<17) | ||
135 | |||
136 | |||
137 | #define IPW_DL_MANAGE (1<<15) | ||
138 | #define IPW_DL_FW (1<<16) | ||
139 | |||
140 | #define IPW_DL_FRAG (1<<21) | ||
141 | #define IPW_DL_WEP (1<<22) | ||
142 | #define IPW_DL_TX (1<<23) | ||
143 | #define IPW_DL_RX (1<<24) | ||
144 | #define IPW_DL_ISR (1<<25) | ||
145 | #define IPW_DL_IO (1<<26) | ||
146 | #define IPW_DL_TRACE (1<<28) | ||
147 | |||
148 | #define IPW_DEBUG_ERROR(f, a...) printk(KERN_ERR DRV_NAME ": " f, ## a) | ||
149 | #define IPW_DEBUG_WARNING(f, a...) printk(KERN_WARNING DRV_NAME ": " f, ## a) | ||
150 | #define IPW_DEBUG_INFO(f...) IPW_DEBUG(IPW_DL_INFO, ## f) | ||
151 | #define IPW_DEBUG_WX(f...) IPW_DEBUG(IPW_DL_WX, ## f) | ||
152 | #define IPW_DEBUG_SCAN(f...) IPW_DEBUG(IPW_DL_SCAN, ## f) | ||
153 | #define IPW_DEBUG_NOTIF(f...) IPW_DEBUG(IPW_DL_NOTIF, ## f) | ||
154 | #define IPW_DEBUG_TRACE(f...) IPW_DEBUG(IPW_DL_TRACE, ## f) | ||
155 | #define IPW_DEBUG_RX(f...) IPW_DEBUG(IPW_DL_RX, ## f) | ||
156 | #define IPW_DEBUG_TX(f...) IPW_DEBUG(IPW_DL_TX, ## f) | ||
157 | #define IPW_DEBUG_ISR(f...) IPW_DEBUG(IPW_DL_ISR, ## f) | ||
158 | #define IPW_DEBUG_MANAGEMENT(f...) IPW_DEBUG(IPW_DL_MANAGE, ## f) | ||
159 | #define IPW_DEBUG_WEP(f...) IPW_DEBUG(IPW_DL_WEP, ## f) | ||
160 | #define IPW_DEBUG_HC(f...) IPW_DEBUG(IPW_DL_HC, ## f) | ||
161 | #define IPW_DEBUG_FRAG(f...) IPW_DEBUG(IPW_DL_FRAG, ## f) | ||
162 | #define IPW_DEBUG_FW(f...) IPW_DEBUG(IPW_DL_FW, ## f) | ||
163 | #define IPW_DEBUG_RF_KILL(f...) IPW_DEBUG(IPW_DL_RF_KILL, ## f) | ||
164 | #define IPW_DEBUG_DROP(f...) IPW_DEBUG(IPW_DL_DROP, ## f) | ||
165 | #define IPW_DEBUG_IO(f...) IPW_DEBUG(IPW_DL_IO, ## f) | ||
166 | #define IPW_DEBUG_IOCTL(f...) IPW_DEBUG(IPW_DL_IOCTL, ## f) | ||
167 | #define IPW_DEBUG_STATE(f, a...) IPW_DEBUG(IPW_DL_STATE | IPW_DL_ASSOC | IPW_DL_INFO, f, ## a) | ||
168 | #define IPW_DEBUG_ASSOC(f, a...) IPW_DEBUG(IPW_DL_ASSOC | IPW_DL_INFO, f, ## a) | ||
169 | |||
170 | |||
171 | #define VERIFY(f) \ | ||
172 | { \ | ||
173 | int status = 0; \ | ||
174 | status = f; \ | ||
175 | if(status) \ | ||
176 | return status; \ | ||
177 | } | ||
178 | |||
179 | enum { | ||
180 | IPW_HW_STATE_DISABLED = 1, | ||
181 | IPW_HW_STATE_ENABLED = 0 | ||
182 | }; | ||
183 | |||
184 | struct ssid_context { | ||
185 | char ssid[IW_ESSID_MAX_SIZE + 1]; | ||
186 | int ssid_len; | ||
187 | unsigned char bssid[ETH_ALEN]; | ||
188 | int port_type; | ||
189 | int channel; | ||
190 | |||
191 | }; | ||
192 | |||
193 | extern const char *port_type_str[]; | ||
194 | extern const char *band_str[]; | ||
195 | |||
196 | #define NUMBER_OF_BD_PER_COMMAND_PACKET 1 | ||
197 | #define NUMBER_OF_BD_PER_DATA_PACKET 2 | ||
198 | |||
199 | #define IPW_MAX_BDS 6 | ||
200 | #define NUMBER_OF_OVERHEAD_BDS_PER_PACKETR 2 | ||
201 | #define NUMBER_OF_BDS_TO_LEAVE_FOR_COMMANDS 1 | ||
202 | |||
203 | #define REQUIRED_SPACE_IN_RING_FOR_COMMAND_PACKET \ | ||
204 | (IPW_BD_QUEUE_W_R_MIN_SPARE + NUMBER_OF_BD_PER_COMMAND_PACKET) | ||
205 | |||
206 | struct bd_status { | ||
207 | union { | ||
208 | struct { u8 nlf:1, txType:2, intEnabled:1, reserved:4;} fields; | ||
209 | u8 field; | ||
210 | } info; | ||
211 | } __attribute__ ((packed)); | ||
212 | |||
213 | #define IPW_BUFDESC_LAST_FRAG 0 | ||
214 | |||
215 | struct ipw2100_bd { | ||
216 | u32 host_addr; | ||
217 | u32 buf_length; | ||
218 | struct bd_status status; | ||
219 | /* number of fragments for frame (should be set only for | ||
220 | * 1st TBD) */ | ||
221 | u8 num_fragments; | ||
222 | u8 reserved[6]; | ||
223 | } __attribute__ ((packed)); | ||
224 | |||
225 | #define IPW_BD_QUEUE_LENGTH(n) (1<<n) | ||
226 | #define IPW_BD_ALIGNMENT(L) (L*sizeof(struct ipw2100_bd)) | ||
227 | |||
228 | #define IPW_BD_STATUS_TX_FRAME_802_3 0x00 | ||
229 | #define IPW_BD_STATUS_TX_FRAME_NOT_LAST_FRAGMENT 0x01 | ||
230 | #define IPW_BD_STATUS_TX_FRAME_COMMAND 0x02 | ||
231 | #define IPW_BD_STATUS_TX_FRAME_802_11 0x04 | ||
232 | #define IPW_BD_STATUS_TX_INTERRUPT_ENABLE 0x08 | ||
233 | |||
234 | struct ipw2100_bd_queue { | ||
235 | /* driver (virtual) pointer to queue */ | ||
236 | struct ipw2100_bd *drv; | ||
237 | |||
238 | /* firmware (physical) pointer to queue */ | ||
239 | dma_addr_t nic; | ||
240 | |||
241 | /* Length of phy memory allocated for BDs */ | ||
242 | u32 size; | ||
243 | |||
244 | /* Number of BDs in queue (and in array) */ | ||
245 | u32 entries; | ||
246 | |||
247 | /* Number of available BDs (invalid for NIC BDs) */ | ||
248 | u32 available; | ||
249 | |||
250 | /* Offset of oldest used BD in array (next one to | ||
251 | * check for completion) */ | ||
252 | u32 oldest; | ||
253 | |||
254 | /* Offset of next available (unused) BD */ | ||
255 | u32 next; | ||
256 | }; | ||
257 | |||
258 | #define RX_QUEUE_LENGTH 256 | ||
259 | #define TX_QUEUE_LENGTH 256 | ||
260 | #define HW_QUEUE_LENGTH 256 | ||
261 | |||
262 | #define TX_PENDED_QUEUE_LENGTH (TX_QUEUE_LENGTH / NUMBER_OF_BD_PER_DATA_PACKET) | ||
263 | |||
264 | #define STATUS_TYPE_MASK 0x0000000f | ||
265 | #define COMMAND_STATUS_VAL 0 | ||
266 | #define STATUS_CHANGE_VAL 1 | ||
267 | #define P80211_DATA_VAL 2 | ||
268 | #define P8023_DATA_VAL 3 | ||
269 | #define HOST_NOTIFICATION_VAL 4 | ||
270 | |||
271 | #define IPW2100_RSSI_TO_DBM (-98) | ||
272 | |||
273 | struct ipw2100_status { | ||
274 | u32 frame_size; | ||
275 | u16 status_fields; | ||
276 | u8 flags; | ||
277 | #define IPW_STATUS_FLAG_DECRYPTED (1<<0) | ||
278 | #define IPW_STATUS_FLAG_WEP_ENCRYPTED (1<<1) | ||
279 | #define IPW_STATUS_FLAG_CRC_ERROR (1<<2) | ||
280 | u8 rssi; | ||
281 | } __attribute__ ((packed)); | ||
282 | |||
283 | struct ipw2100_status_queue { | ||
284 | /* driver (virtual) pointer to queue */ | ||
285 | struct ipw2100_status *drv; | ||
286 | |||
287 | /* firmware (physical) pointer to queue */ | ||
288 | dma_addr_t nic; | ||
289 | |||
290 | /* Length of phy memory allocated for BDs */ | ||
291 | u32 size; | ||
292 | }; | ||
293 | |||
294 | #define HOST_COMMAND_PARAMS_REG_LEN 100 | ||
295 | #define CMD_STATUS_PARAMS_REG_LEN 3 | ||
296 | |||
297 | #define IPW_WPA_CAPABILITIES 0x1 | ||
298 | #define IPW_WPA_LISTENINTERVAL 0x2 | ||
299 | #define IPW_WPA_AP_ADDRESS 0x4 | ||
300 | |||
301 | #define IPW_MAX_VAR_IE_LEN ((HOST_COMMAND_PARAMS_REG_LEN - 4) * sizeof(u32)) | ||
302 | |||
303 | struct ipw2100_wpa_assoc_frame { | ||
304 | u16 fixed_ie_mask; | ||
305 | struct { | ||
306 | u16 capab_info; | ||
307 | u16 listen_interval; | ||
308 | u8 current_ap[ETH_ALEN]; | ||
309 | } fixed_ies; | ||
310 | u32 var_ie_len; | ||
311 | u8 var_ie[IPW_MAX_VAR_IE_LEN]; | ||
312 | }; | ||
313 | |||
314 | #define IPW_BSS 1 | ||
315 | #define IPW_MONITOR 2 | ||
316 | #define IPW_IBSS 3 | ||
317 | |||
318 | /** | ||
319 | * @struct _tx_cmd - HWCommand | ||
320 | * @brief H/W command structure. | ||
321 | */ | ||
322 | struct ipw2100_cmd_header { | ||
323 | u32 host_command_reg; | ||
324 | u32 host_command_reg1; | ||
325 | u32 sequence; | ||
326 | u32 host_command_len_reg; | ||
327 | u32 host_command_params_reg[HOST_COMMAND_PARAMS_REG_LEN]; | ||
328 | u32 cmd_status_reg; | ||
329 | u32 cmd_status_params_reg[CMD_STATUS_PARAMS_REG_LEN]; | ||
330 | u32 rxq_base_ptr; | ||
331 | u32 rxq_next_ptr; | ||
332 | u32 rxq_host_ptr; | ||
333 | u32 txq_base_ptr; | ||
334 | u32 txq_next_ptr; | ||
335 | u32 txq_host_ptr; | ||
336 | u32 tx_status_reg; | ||
337 | u32 reserved; | ||
338 | u32 status_change_reg; | ||
339 | u32 reserved1[3]; | ||
340 | u32 *ordinal1_ptr; | ||
341 | u32 *ordinal2_ptr; | ||
342 | } __attribute__ ((packed)); | ||
343 | |||
344 | struct ipw2100_data_header { | ||
345 | u32 host_command_reg; | ||
346 | u32 host_command_reg1; | ||
347 | u8 encrypted; // BOOLEAN in win! TRUE if frame is enc by driver | ||
348 | u8 needs_encryption; // BOOLEAN in win! TRUE if frma need to be enc in NIC | ||
349 | u8 wep_index; // 0 no key, 1-4 key index, 0xff immediate key | ||
350 | u8 key_size; // 0 no imm key, 0x5 64bit encr, 0xd 128bit encr, 0x10 128bit encr and 128bit IV | ||
351 | u8 key[16]; | ||
352 | u8 reserved[10]; // f/w reserved | ||
353 | u8 src_addr[ETH_ALEN]; | ||
354 | u8 dst_addr[ETH_ALEN]; | ||
355 | u16 fragment_size; | ||
356 | } __attribute__ ((packed)); | ||
357 | |||
358 | // Host command data structure | ||
359 | struct host_command { | ||
360 | u32 host_command; // COMMAND ID | ||
361 | u32 host_command1; // COMMAND ID | ||
362 | u32 host_command_sequence; // UNIQUE COMMAND NUMBER (ID) | ||
363 | u32 host_command_length; // LENGTH | ||
364 | u32 host_command_parameters[HOST_COMMAND_PARAMS_REG_LEN]; // COMMAND PARAMETERS | ||
365 | } __attribute__ ((packed)); | ||
366 | |||
367 | |||
368 | typedef enum { | ||
369 | POWER_ON_RESET, | ||
370 | EXIT_POWER_DOWN_RESET, | ||
371 | SW_RESET, | ||
372 | EEPROM_RW, | ||
373 | SW_RE_INIT | ||
374 | } ipw2100_reset_event; | ||
375 | |||
376 | enum { | ||
377 | COMMAND = 0xCAFE, | ||
378 | DATA, | ||
379 | RX | ||
380 | }; | ||
381 | |||
382 | |||
383 | struct ipw2100_tx_packet { | ||
384 | int type; | ||
385 | int index; | ||
386 | union { | ||
387 | struct { /* COMMAND */ | ||
388 | struct ipw2100_cmd_header* cmd; | ||
389 | dma_addr_t cmd_phys; | ||
390 | } c_struct; | ||
391 | struct { /* DATA */ | ||
392 | struct ipw2100_data_header* data; | ||
393 | dma_addr_t data_phys; | ||
394 | struct ieee80211_txb *txb; | ||
395 | } d_struct; | ||
396 | } info; | ||
397 | int jiffy_start; | ||
398 | |||
399 | struct list_head list; | ||
400 | }; | ||
401 | |||
402 | |||
403 | struct ipw2100_rx_packet { | ||
404 | struct ipw2100_rx *rxp; | ||
405 | dma_addr_t dma_addr; | ||
406 | int jiffy_start; | ||
407 | struct sk_buff *skb; | ||
408 | struct list_head list; | ||
409 | }; | ||
410 | |||
411 | #define FRAG_DISABLED (1<<31) | ||
412 | #define RTS_DISABLED (1<<31) | ||
413 | #define MAX_RTS_THRESHOLD 2304U | ||
414 | #define MIN_RTS_THRESHOLD 1U | ||
415 | #define DEFAULT_RTS_THRESHOLD 1000U | ||
416 | |||
417 | #define DEFAULT_BEACON_INTERVAL 100U | ||
418 | #define DEFAULT_SHORT_RETRY_LIMIT 7U | ||
419 | #define DEFAULT_LONG_RETRY_LIMIT 4U | ||
420 | |||
421 | struct ipw2100_ordinals { | ||
422 | u32 table1_addr; | ||
423 | u32 table2_addr; | ||
424 | u32 table1_size; | ||
425 | u32 table2_size; | ||
426 | }; | ||
427 | |||
428 | /* Host Notification header */ | ||
429 | struct ipw2100_notification { | ||
430 | u32 hnhdr_subtype; /* type of host notification */ | ||
431 | u32 hnhdr_size; /* size in bytes of data | ||
432 | or number of entries, if table. | ||
433 | Does NOT include header */ | ||
434 | } __attribute__ ((packed)); | ||
435 | |||
436 | #define MAX_KEY_SIZE 16 | ||
437 | #define MAX_KEYS 8 | ||
438 | |||
439 | #define IPW2100_WEP_ENABLE (1<<1) | ||
440 | #define IPW2100_WEP_DROP_CLEAR (1<<2) | ||
441 | |||
442 | #define IPW_NONE_CIPHER (1<<0) | ||
443 | #define IPW_WEP40_CIPHER (1<<1) | ||
444 | #define IPW_TKIP_CIPHER (1<<2) | ||
445 | #define IPW_CCMP_CIPHER (1<<4) | ||
446 | #define IPW_WEP104_CIPHER (1<<5) | ||
447 | #define IPW_CKIP_CIPHER (1<<6) | ||
448 | |||
449 | #define IPW_AUTH_OPEN 0 | ||
450 | #define IPW_AUTH_SHARED 1 | ||
451 | |||
452 | struct statistic { | ||
453 | int value; | ||
454 | int hi; | ||
455 | int lo; | ||
456 | }; | ||
457 | |||
458 | #define INIT_STAT(x) do { \ | ||
459 | (x)->value = (x)->hi = 0; \ | ||
460 | (x)->lo = 0x7fffffff; \ | ||
461 | } while (0) | ||
462 | #define SET_STAT(x,y) do { \ | ||
463 | (x)->value = y; \ | ||
464 | if ((x)->value > (x)->hi) (x)->hi = (x)->value; \ | ||
465 | if ((x)->value < (x)->lo) (x)->lo = (x)->value; \ | ||
466 | } while (0) | ||
467 | #define INC_STAT(x) do { if (++(x)->value > (x)->hi) (x)->hi = (x)->value; } \ | ||
468 | while (0) | ||
469 | #define DEC_STAT(x) do { if (--(x)->value < (x)->lo) (x)->lo = (x)->value; } \ | ||
470 | while (0) | ||
471 | |||
472 | #define IPW2100_ERROR_QUEUE 5 | ||
473 | |||
474 | /* Power management code: enable or disable? */ | ||
475 | enum { | ||
476 | #ifdef CONFIG_PM | ||
477 | IPW2100_PM_DISABLED = 0, | ||
478 | PM_STATE_SIZE = 16, | ||
479 | #else | ||
480 | IPW2100_PM_DISABLED = 1, | ||
481 | PM_STATE_SIZE = 0, | ||
482 | #endif | ||
483 | }; | ||
484 | |||
485 | #define STATUS_POWERED (1<<0) | ||
486 | #define STATUS_CMD_ACTIVE (1<<1) /**< host command in progress */ | ||
487 | #define STATUS_RUNNING (1<<2) /* Card initialized, but not enabled */ | ||
488 | #define STATUS_ENABLED (1<<3) /* Card enabled -- can scan,Tx,Rx */ | ||
489 | #define STATUS_STOPPING (1<<4) /* Card is in shutdown phase */ | ||
490 | #define STATUS_INITIALIZED (1<<5) /* Card is ready for external calls */ | ||
491 | #define STATUS_ASSOCIATING (1<<9) /* Associated, but no BSSID yet */ | ||
492 | #define STATUS_ASSOCIATED (1<<10) /* Associated and BSSID valid */ | ||
493 | #define STATUS_INT_ENABLED (1<<11) | ||
494 | #define STATUS_RF_KILL_HW (1<<12) | ||
495 | #define STATUS_RF_KILL_SW (1<<13) | ||
496 | #define STATUS_RF_KILL_MASK (STATUS_RF_KILL_HW | STATUS_RF_KILL_SW) | ||
497 | #define STATUS_EXIT_PENDING (1<<14) | ||
498 | |||
499 | #define STATUS_SCAN_PENDING (1<<23) | ||
500 | #define STATUS_SCANNING (1<<24) | ||
501 | #define STATUS_SCAN_ABORTING (1<<25) | ||
502 | #define STATUS_SCAN_COMPLETE (1<<26) | ||
503 | #define STATUS_WX_EVENT_PENDING (1<<27) | ||
504 | #define STATUS_RESET_PENDING (1<<29) | ||
505 | #define STATUS_SECURITY_UPDATED (1<<30) /* Security sync needed */ | ||
506 | |||
507 | |||
508 | |||
509 | /* Internal NIC states */ | ||
510 | #define IPW_STATE_INITIALIZED (1<<0) | ||
511 | #define IPW_STATE_COUNTRY_FOUND (1<<1) | ||
512 | #define IPW_STATE_ASSOCIATED (1<<2) | ||
513 | #define IPW_STATE_ASSN_LOST (1<<3) | ||
514 | #define IPW_STATE_ASSN_CHANGED (1<<4) | ||
515 | #define IPW_STATE_SCAN_COMPLETE (1<<5) | ||
516 | #define IPW_STATE_ENTERED_PSP (1<<6) | ||
517 | #define IPW_STATE_LEFT_PSP (1<<7) | ||
518 | #define IPW_STATE_RF_KILL (1<<8) | ||
519 | #define IPW_STATE_DISABLED (1<<9) | ||
520 | #define IPW_STATE_POWER_DOWN (1<<10) | ||
521 | #define IPW_STATE_SCANNING (1<<11) | ||
522 | |||
523 | |||
524 | |||
525 | #define CFG_STATIC_CHANNEL (1<<0) /* Restrict assoc. to single channel */ | ||
526 | #define CFG_STATIC_ESSID (1<<1) /* Restrict assoc. to single SSID */ | ||
527 | #define CFG_STATIC_BSSID (1<<2) /* Restrict assoc. to single BSSID */ | ||
528 | #define CFG_CUSTOM_MAC (1<<3) | ||
529 | #define CFG_LONG_PREAMBLE (1<<4) | ||
530 | #define CFG_ASSOCIATE (1<<6) | ||
531 | #define CFG_FIXED_RATE (1<<7) | ||
532 | #define CFG_ADHOC_CREATE (1<<8) | ||
533 | #define CFG_C3_DISABLED (1<<9) | ||
534 | #define CFG_PASSIVE_SCAN (1<<10) | ||
535 | |||
536 | #define CAP_SHARED_KEY (1<<0) /* Off = OPEN */ | ||
537 | #define CAP_PRIVACY_ON (1<<1) /* Off = No privacy */ | ||
538 | |||
539 | struct ipw2100_priv { | ||
540 | |||
541 | int stop_hang_check; /* Set 1 when shutting down to kill hang_check */ | ||
542 | int stop_rf_kill; /* Set 1 when shutting down to kill rf_kill */ | ||
543 | |||
544 | struct ieee80211_device *ieee; | ||
545 | unsigned long status; | ||
546 | unsigned long config; | ||
547 | unsigned long capability; | ||
548 | |||
549 | /* Statistics */ | ||
550 | int resets; | ||
551 | int reset_backoff; | ||
552 | |||
553 | /* Context */ | ||
554 | u8 essid[IW_ESSID_MAX_SIZE]; | ||
555 | u8 essid_len; | ||
556 | u8 bssid[ETH_ALEN]; | ||
557 | u8 channel; | ||
558 | int last_mode; | ||
559 | int cstate_limit; | ||
560 | |||
561 | unsigned long connect_start; | ||
562 | unsigned long last_reset; | ||
563 | |||
564 | u32 channel_mask; | ||
565 | u32 fatal_error; | ||
566 | u32 fatal_errors[IPW2100_ERROR_QUEUE]; | ||
567 | u32 fatal_index; | ||
568 | int eeprom_version; | ||
569 | int firmware_version; | ||
570 | unsigned long hw_features; | ||
571 | int hangs; | ||
572 | u32 last_rtc; | ||
573 | int dump_raw; /* 1 to dump raw bytes in /sys/.../memory */ | ||
574 | u8* snapshot[0x30]; | ||
575 | |||
576 | u8 mandatory_bssid_mac[ETH_ALEN]; | ||
577 | u8 mac_addr[ETH_ALEN]; | ||
578 | |||
579 | int power_mode; | ||
580 | |||
581 | /* WEP data */ | ||
582 | struct ieee80211_security sec; | ||
583 | int messages_sent; | ||
584 | |||
585 | |||
586 | int short_retry_limit; | ||
587 | int long_retry_limit; | ||
588 | |||
589 | u32 rts_threshold; | ||
590 | u32 frag_threshold; | ||
591 | |||
592 | int in_isr; | ||
593 | |||
594 | u32 tx_rates; | ||
595 | int tx_power; | ||
596 | u32 beacon_interval; | ||
597 | |||
598 | char nick[IW_ESSID_MAX_SIZE + 1]; | ||
599 | |||
600 | struct ipw2100_status_queue status_queue; | ||
601 | |||
602 | struct statistic txq_stat; | ||
603 | struct statistic rxq_stat; | ||
604 | struct ipw2100_bd_queue rx_queue; | ||
605 | struct ipw2100_bd_queue tx_queue; | ||
606 | struct ipw2100_rx_packet *rx_buffers; | ||
607 | |||
608 | struct statistic fw_pend_stat; | ||
609 | struct list_head fw_pend_list; | ||
610 | |||
611 | struct statistic msg_free_stat; | ||
612 | struct statistic msg_pend_stat; | ||
613 | struct list_head msg_free_list; | ||
614 | struct list_head msg_pend_list; | ||
615 | struct ipw2100_tx_packet *msg_buffers; | ||
616 | |||
617 | struct statistic tx_free_stat; | ||
618 | struct statistic tx_pend_stat; | ||
619 | struct list_head tx_free_list; | ||
620 | struct list_head tx_pend_list; | ||
621 | struct ipw2100_tx_packet *tx_buffers; | ||
622 | |||
623 | struct ipw2100_ordinals ordinals; | ||
624 | |||
625 | struct pci_dev *pci_dev; | ||
626 | |||
627 | struct proc_dir_entry *dir_dev; | ||
628 | |||
629 | struct net_device *net_dev; | ||
630 | struct iw_statistics wstats; | ||
631 | |||
632 | struct tasklet_struct irq_tasklet; | ||
633 | |||
634 | struct workqueue_struct *workqueue; | ||
635 | struct work_struct reset_work; | ||
636 | struct work_struct security_work; | ||
637 | struct work_struct wx_event_work; | ||
638 | struct work_struct hang_check; | ||
639 | struct work_struct rf_kill; | ||
640 | |||
641 | u32 interrupts; | ||
642 | int tx_interrupts; | ||
643 | int rx_interrupts; | ||
644 | int inta_other; | ||
645 | |||
646 | spinlock_t low_lock; | ||
647 | struct semaphore action_sem; | ||
648 | struct semaphore adapter_sem; | ||
649 | |||
650 | wait_queue_head_t wait_command_queue; | ||
651 | #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,10) | ||
652 | u32 pm_state[PM_STATE_SIZE]; | ||
653 | #endif | ||
654 | }; | ||
655 | |||
656 | |||
657 | /********************************************************* | ||
658 | * Host Command -> From Driver to FW | ||
659 | *********************************************************/ | ||
660 | |||
661 | /** | ||
662 | * Host command identifiers | ||
663 | */ | ||
664 | #define HOST_COMPLETE 2 | ||
665 | #define SYSTEM_CONFIG 6 | ||
666 | #define SSID 8 | ||
667 | #define MANDATORY_BSSID 9 | ||
668 | #define AUTHENTICATION_TYPE 10 | ||
669 | #define ADAPTER_ADDRESS 11 | ||
670 | #define PORT_TYPE 12 | ||
671 | #define INTERNATIONAL_MODE 13 | ||
672 | #define CHANNEL 14 | ||
673 | #define RTS_THRESHOLD 15 | ||
674 | #define FRAG_THRESHOLD 16 | ||
675 | #define POWER_MODE 17 | ||
676 | #define TX_RATES 18 | ||
677 | #define BASIC_TX_RATES 19 | ||
678 | #define WEP_KEY_INFO 20 | ||
679 | #define WEP_KEY_INDEX 25 | ||
680 | #define WEP_FLAGS 26 | ||
681 | #define ADD_MULTICAST 27 | ||
682 | #define CLEAR_ALL_MULTICAST 28 | ||
683 | #define BEACON_INTERVAL 29 | ||
684 | #define ATIM_WINDOW 30 | ||
685 | #define CLEAR_STATISTICS 31 | ||
686 | #define SEND 33 | ||
687 | #define TX_POWER_INDEX 36 | ||
688 | #define BROADCAST_SCAN 43 | ||
689 | #define CARD_DISABLE 44 | ||
690 | #define PREFERRED_BSSID 45 | ||
691 | #define SET_SCAN_OPTIONS 46 | ||
692 | #define SCAN_DWELL_TIME 47 | ||
693 | #define SWEEP_TABLE 48 | ||
694 | #define AP_OR_STATION_TABLE 49 | ||
695 | #define GROUP_ORDINALS 50 | ||
696 | #define SHORT_RETRY_LIMIT 51 | ||
697 | #define LONG_RETRY_LIMIT 52 | ||
698 | |||
699 | #define HOST_PRE_POWER_DOWN 58 | ||
700 | #define CARD_DISABLE_PHY_OFF 61 | ||
701 | #define MSDU_TX_RATES 62 | ||
702 | |||
703 | |||
704 | // Rogue AP Detection | ||
705 | #define SET_STATION_STAT_BITS 64 | ||
706 | #define CLEAR_STATIONS_STAT_BITS 65 | ||
707 | #define LEAP_ROGUE_MODE 66 //TODO tbw replaced by CFG_LEAP_ROGUE_AP | ||
708 | #define SET_SECURITY_INFORMATION 67 | ||
709 | #define DISASSOCIATION_BSSID 68 | ||
710 | #define SET_WPA_IE 69 | ||
711 | |||
712 | |||
713 | |||
714 | // system configuration bit mask: | ||
715 | //#define IPW_CFG_ANTENNA_SETTING 0x03 | ||
716 | //#define IPW_CFG_ANTENNA_A 0x01 | ||
717 | //#define IPW_CFG_ANTENNA_B 0x02 | ||
718 | #define IPW_CFG_MONITOR 0x00004 | ||
719 | //#define IPW_CFG_TX_STATUS_ENABLE 0x00008 | ||
720 | #define IPW_CFG_PREAMBLE_AUTO 0x00010 | ||
721 | #define IPW_CFG_IBSS_AUTO_START 0x00020 | ||
722 | //#define IPW_CFG_KERBEROS_ENABLE 0x00040 | ||
723 | #define IPW_CFG_LOOPBACK 0x00100 | ||
724 | //#define IPW_CFG_WNMP_PING_PASS 0x00200 | ||
725 | //#define IPW_CFG_DEBUG_ENABLE 0x00400 | ||
726 | #define IPW_CFG_ANSWER_BCSSID_PROBE 0x00800 | ||
727 | //#define IPW_CFG_BT_PRIORITY 0x01000 | ||
728 | #define IPW_CFG_BT_SIDEBAND_SIGNAL 0x02000 | ||
729 | #define IPW_CFG_802_1x_ENABLE 0x04000 | ||
730 | #define IPW_CFG_BSS_MASK 0x08000 | ||
731 | #define IPW_CFG_IBSS_MASK 0x10000 | ||
732 | //#define IPW_CFG_DYNAMIC_CW 0x10000 | ||
733 | |||
734 | #define IPW_SCAN_NOASSOCIATE (1<<0) | ||
735 | #define IPW_SCAN_MIXED_CELL (1<<1) | ||
736 | /* RESERVED (1<<2) */ | ||
737 | #define IPW_SCAN_PASSIVE (1<<3) | ||
738 | |||
739 | #define IPW_NIC_FATAL_ERROR 0x2A7F0 | ||
740 | #define IPW_ERROR_ADDR(x) (x & 0x3FFFF) | ||
741 | #define IPW_ERROR_CODE(x) ((x & 0xFF000000) >> 24) | ||
742 | #define IPW2100_ERR_C3_CORRUPTION (0x10 << 24) | ||
743 | #define IPW2100_ERR_MSG_TIMEOUT (0x11 << 24) | ||
744 | #define IPW2100_ERR_FW_LOAD (0x12 << 24) | ||
745 | |||
746 | #define IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND 0x200 | ||
747 | #define IPW_MEM_SRAM_HOST_INTERRUPT_AREA_LOWER_BOUND IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x0D80 | ||
748 | |||
749 | #define IPW_MEM_HOST_SHARED_RX_BD_BASE (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x40) | ||
750 | #define IPW_MEM_HOST_SHARED_RX_STATUS_BASE (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x44) | ||
751 | #define IPW_MEM_HOST_SHARED_RX_BD_SIZE (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x48) | ||
752 | #define IPW_MEM_HOST_SHARED_RX_READ_INDEX (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0xa0) | ||
753 | |||
754 | #define IPW_MEM_HOST_SHARED_TX_QUEUE_BD_BASE (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x00) | ||
755 | #define IPW_MEM_HOST_SHARED_TX_QUEUE_BD_SIZE (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x04) | ||
756 | #define IPW_MEM_HOST_SHARED_TX_QUEUE_READ_INDEX (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x80) | ||
757 | |||
758 | #define IPW_MEM_HOST_SHARED_RX_WRITE_INDEX \ | ||
759 | (IPW_MEM_SRAM_HOST_INTERRUPT_AREA_LOWER_BOUND + 0x20) | ||
760 | |||
761 | #define IPW_MEM_HOST_SHARED_TX_QUEUE_WRITE_INDEX \ | ||
762 | (IPW_MEM_SRAM_HOST_INTERRUPT_AREA_LOWER_BOUND) | ||
763 | |||
764 | |||
765 | #if 0 | ||
766 | #define IPW_MEM_HOST_SHARED_TX_QUEUE_0_BD_BASE (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x00) | ||
767 | #define IPW_MEM_HOST_SHARED_TX_QUEUE_0_BD_SIZE (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x04) | ||
768 | #define IPW_MEM_HOST_SHARED_TX_QUEUE_1_BD_BASE (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x08) | ||
769 | #define IPW_MEM_HOST_SHARED_TX_QUEUE_1_BD_SIZE (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x0c) | ||
770 | #define IPW_MEM_HOST_SHARED_TX_QUEUE_2_BD_BASE (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x10) | ||
771 | #define IPW_MEM_HOST_SHARED_TX_QUEUE_2_BD_SIZE (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x14) | ||
772 | #define IPW_MEM_HOST_SHARED_TX_QUEUE_3_BD_BASE (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x18) | ||
773 | #define IPW_MEM_HOST_SHARED_TX_QUEUE_3_BD_SIZE (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x1c) | ||
774 | #define IPW_MEM_HOST_SHARED_TX_QUEUE_0_READ_INDEX (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x80) | ||
775 | #define IPW_MEM_HOST_SHARED_TX_QUEUE_1_READ_INDEX (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x84) | ||
776 | #define IPW_MEM_HOST_SHARED_TX_QUEUE_2_READ_INDEX (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x88) | ||
777 | #define IPW_MEM_HOST_SHARED_TX_QUEUE_3_READ_INDEX (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x8c) | ||
778 | |||
779 | #define IPW_MEM_HOST_SHARED_TX_QUEUE_BD_BASE(QueueNum) \ | ||
780 | (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + (QueueNum<<3)) | ||
781 | #define IPW_MEM_HOST_SHARED_TX_QUEUE_BD_SIZE(QueueNum) \ | ||
782 | (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x0004+(QueueNum<<3)) | ||
783 | #define IPW_MEM_HOST_SHARED_TX_QUEUE_READ_INDEX(QueueNum) \ | ||
784 | (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x0080+(QueueNum<<2)) | ||
785 | |||
786 | #define IPW_MEM_HOST_SHARED_TX_QUEUE_0_WRITE_INDEX \ | ||
787 | (IPW_MEM_SRAM_HOST_INTERRUPT_AREA_LOWER_BOUND + 0x00) | ||
788 | #define IPW_MEM_HOST_SHARED_TX_QUEUE_1_WRITE_INDEX \ | ||
789 | (IPW_MEM_SRAM_HOST_INTERRUPT_AREA_LOWER_BOUND + 0x04) | ||
790 | #define IPW_MEM_HOST_SHARED_TX_QUEUE_2_WRITE_INDEX \ | ||
791 | (IPW_MEM_SRAM_HOST_INTERRUPT_AREA_LOWER_BOUND + 0x08) | ||
792 | #define IPW_MEM_HOST_SHARED_TX_QUEUE_3_WRITE_INDEX \ | ||
793 | (IPW_MEM_SRAM_HOST_INTERRUPT_AREA_LOWER_BOUND + 0x0c) | ||
794 | #define IPW_MEM_HOST_SHARED_SLAVE_MODE_INT_REGISTER \ | ||
795 | (IPW_MEM_SRAM_HOST_INTERRUPT_AREA_LOWER_BOUND + 0x78) | ||
796 | |||
797 | #endif | ||
798 | |||
799 | #define IPW_MEM_HOST_SHARED_ORDINALS_TABLE_1 (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x180) | ||
800 | #define IPW_MEM_HOST_SHARED_ORDINALS_TABLE_2 (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x184) | ||
801 | |||
802 | #define IPW2100_INTA_TX_TRANSFER (0x00000001) // Bit 0 (LSB) | ||
803 | #define IPW2100_INTA_RX_TRANSFER (0x00000002) // Bit 1 | ||
804 | #define IPW2100_INTA_TX_COMPLETE (0x00000004) // Bit 2 | ||
805 | #define IPW2100_INTA_EVENT_INTERRUPT (0x00000008) // Bit 3 | ||
806 | #define IPW2100_INTA_STATUS_CHANGE (0x00000010) // Bit 4 | ||
807 | #define IPW2100_INTA_BEACON_PERIOD_EXPIRED (0x00000020) // Bit 5 | ||
808 | #define IPW2100_INTA_SLAVE_MODE_HOST_COMMAND_DONE (0x00010000) // Bit 16 | ||
809 | #define IPW2100_INTA_FW_INIT_DONE (0x01000000) // Bit 24 | ||
810 | #define IPW2100_INTA_FW_CALIBRATION_CALC (0x02000000) // Bit 25 | ||
811 | #define IPW2100_INTA_FATAL_ERROR (0x40000000) // Bit 30 | ||
812 | #define IPW2100_INTA_PARITY_ERROR (0x80000000) // Bit 31 (MSB) | ||
813 | |||
814 | #define IPW_AUX_HOST_RESET_REG_PRINCETON_RESET (0x00000001) | ||
815 | #define IPW_AUX_HOST_RESET_REG_FORCE_NMI (0x00000002) | ||
816 | #define IPW_AUX_HOST_RESET_REG_PCI_HOST_CLUSTER_FATAL_NMI (0x00000004) | ||
817 | #define IPW_AUX_HOST_RESET_REG_CORE_FATAL_NMI (0x00000008) | ||
818 | #define IPW_AUX_HOST_RESET_REG_SW_RESET (0x00000080) | ||
819 | #define IPW_AUX_HOST_RESET_REG_MASTER_DISABLED (0x00000100) | ||
820 | #define IPW_AUX_HOST_RESET_REG_STOP_MASTER (0x00000200) | ||
821 | |||
822 | #define IPW_AUX_HOST_GP_CNTRL_BIT_CLOCK_READY (0x00000001) // Bit 0 (LSB) | ||
823 | #define IPW_AUX_HOST_GP_CNTRL_BIT_HOST_ALLOWS_STANDBY (0x00000002) // Bit 1 | ||
824 | #define IPW_AUX_HOST_GP_CNTRL_BIT_INIT_DONE (0x00000004) // Bit 2 | ||
825 | #define IPW_AUX_HOST_GP_CNTRL_BITS_SYS_CONFIG (0x000007c0) // Bits 6-10 | ||
826 | #define IPW_AUX_HOST_GP_CNTRL_BIT_BUS_TYPE (0x00000200) // Bit 9 | ||
827 | #define IPW_AUX_HOST_GP_CNTRL_BIT_BAR0_BLOCK_SIZE (0x00000400) // Bit 10 | ||
828 | #define IPW_AUX_HOST_GP_CNTRL_BIT_USB_MODE (0x20000000) // Bit 29 | ||
829 | #define IPW_AUX_HOST_GP_CNTRL_BIT_HOST_FORCES_SYS_CLK (0x40000000) // Bit 30 | ||
830 | #define IPW_AUX_HOST_GP_CNTRL_BIT_FW_FORCES_SYS_CLK (0x80000000) // Bit 31 (MSB) | ||
831 | |||
832 | #define IPW_BIT_GPIO_GPIO1_MASK 0x0000000C | ||
833 | #define IPW_BIT_GPIO_GPIO3_MASK 0x000000C0 | ||
834 | #define IPW_BIT_GPIO_GPIO1_ENABLE 0x00000008 | ||
835 | #define IPW_BIT_GPIO_RF_KILL 0x00010000 | ||
836 | |||
837 | #define IPW_BIT_GPIO_LED_OFF 0x00002000 // Bit 13 = 1 | ||
838 | |||
839 | #define IPW_REG_DOMAIN_0_OFFSET 0x0000 | ||
840 | #define IPW_REG_DOMAIN_1_OFFSET IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND | ||
841 | |||
842 | #define IPW_REG_INTA IPW_REG_DOMAIN_0_OFFSET + 0x0008 | ||
843 | #define IPW_REG_INTA_MASK IPW_REG_DOMAIN_0_OFFSET + 0x000C | ||
844 | #define IPW_REG_INDIRECT_ACCESS_ADDRESS IPW_REG_DOMAIN_0_OFFSET + 0x0010 | ||
845 | #define IPW_REG_INDIRECT_ACCESS_DATA IPW_REG_DOMAIN_0_OFFSET + 0x0014 | ||
846 | #define IPW_REG_AUTOINCREMENT_ADDRESS IPW_REG_DOMAIN_0_OFFSET + 0x0018 | ||
847 | #define IPW_REG_AUTOINCREMENT_DATA IPW_REG_DOMAIN_0_OFFSET + 0x001C | ||
848 | #define IPW_REG_RESET_REG IPW_REG_DOMAIN_0_OFFSET + 0x0020 | ||
849 | #define IPW_REG_GP_CNTRL IPW_REG_DOMAIN_0_OFFSET + 0x0024 | ||
850 | #define IPW_REG_GPIO IPW_REG_DOMAIN_0_OFFSET + 0x0030 | ||
851 | #define IPW_REG_FW_TYPE IPW_REG_DOMAIN_1_OFFSET + 0x0188 | ||
852 | #define IPW_REG_FW_VERSION IPW_REG_DOMAIN_1_OFFSET + 0x018C | ||
853 | #define IPW_REG_FW_COMPATABILITY_VERSION IPW_REG_DOMAIN_1_OFFSET + 0x0190 | ||
854 | |||
855 | #define IPW_REG_INDIRECT_ADDR_MASK 0x00FFFFFC | ||
856 | |||
857 | #define IPW_INTERRUPT_MASK 0xC1010013 | ||
858 | |||
859 | #define IPW2100_CONTROL_REG 0x220000 | ||
860 | #define IPW2100_CONTROL_PHY_OFF 0x8 | ||
861 | |||
862 | #define IPW2100_COMMAND 0x00300004 | ||
863 | #define IPW2100_COMMAND_PHY_ON 0x0 | ||
864 | #define IPW2100_COMMAND_PHY_OFF 0x1 | ||
865 | |||
866 | /* in DEBUG_AREA, values of memory always 0xd55555d5 */ | ||
867 | #define IPW_REG_DOA_DEBUG_AREA_START IPW_REG_DOMAIN_0_OFFSET + 0x0090 | ||
868 | #define IPW_REG_DOA_DEBUG_AREA_END IPW_REG_DOMAIN_0_OFFSET + 0x00FF | ||
869 | #define IPW_DATA_DOA_DEBUG_VALUE 0xd55555d5 | ||
870 | |||
871 | #define IPW_INTERNAL_REGISTER_HALT_AND_RESET 0x003000e0 | ||
872 | |||
873 | #define IPW_WAIT_CLOCK_STABILIZATION_DELAY 50 // micro seconds | ||
874 | #define IPW_WAIT_RESET_ARC_COMPLETE_DELAY 10 // micro seconds | ||
875 | #define IPW_WAIT_RESET_MASTER_ASSERT_COMPLETE_DELAY 10 // micro seconds | ||
876 | |||
877 | // BD ring queue read/write difference | ||
878 | #define IPW_BD_QUEUE_W_R_MIN_SPARE 2 | ||
879 | |||
880 | #define IPW_CACHE_LINE_LENGTH_DEFAULT 0x80 | ||
881 | |||
882 | #define IPW_CARD_DISABLE_PHY_OFF_COMPLETE_WAIT 100 // 100 milli | ||
883 | #define IPW_PREPARE_POWER_DOWN_COMPLETE_WAIT 100 // 100 milli | ||
884 | |||
885 | |||
886 | |||
887 | |||
888 | #define IPW_HEADER_802_11_SIZE sizeof(struct ieee80211_header_data) | ||
889 | #define IPW_MAX_80211_PAYLOAD_SIZE 2304U | ||
890 | #define IPW_MAX_802_11_PAYLOAD_LENGTH 2312 | ||
891 | #define IPW_MAX_ACCEPTABLE_TX_FRAME_LENGTH 1536 | ||
892 | #define IPW_MIN_ACCEPTABLE_RX_FRAME_LENGTH 60 | ||
893 | #define IPW_MAX_ACCEPTABLE_RX_FRAME_LENGTH \ | ||
894 | (IPW_MAX_ACCEPTABLE_TX_FRAME_LENGTH + IPW_HEADER_802_11_SIZE - \ | ||
895 | sizeof(struct ethhdr)) | ||
896 | |||
897 | #define IPW_802_11_FCS_LENGTH 4 | ||
898 | #define IPW_RX_NIC_BUFFER_LENGTH \ | ||
899 | (IPW_MAX_802_11_PAYLOAD_LENGTH + IPW_HEADER_802_11_SIZE + \ | ||
900 | IPW_802_11_FCS_LENGTH) | ||
901 | |||
902 | #define IPW_802_11_PAYLOAD_OFFSET \ | ||
903 | (sizeof(struct ieee80211_header_data) + \ | ||
904 | sizeof(struct ieee80211_snap_hdr)) | ||
905 | |||
906 | struct ipw2100_rx { | ||
907 | union { | ||
908 | unsigned char payload[IPW_RX_NIC_BUFFER_LENGTH]; | ||
909 | struct ieee80211_hdr header; | ||
910 | u32 status; | ||
911 | struct ipw2100_notification notification; | ||
912 | struct ipw2100_cmd_header command; | ||
913 | } rx_data; | ||
914 | } __attribute__ ((packed)); | ||
915 | |||
916 | // Bit 0-7 are for 802.11b tx rates - . Bit 5-7 are reserved | ||
917 | #define TX_RATE_1_MBIT 0x0001 | ||
918 | #define TX_RATE_2_MBIT 0x0002 | ||
919 | #define TX_RATE_5_5_MBIT 0x0004 | ||
920 | #define TX_RATE_11_MBIT 0x0008 | ||
921 | #define TX_RATE_MASK 0x000F | ||
922 | #define DEFAULT_TX_RATES 0x000F | ||
923 | |||
924 | #define IPW_POWER_MODE_CAM 0x00 //(always on) | ||
925 | #define IPW_POWER_INDEX_1 0x01 | ||
926 | #define IPW_POWER_INDEX_2 0x02 | ||
927 | #define IPW_POWER_INDEX_3 0x03 | ||
928 | #define IPW_POWER_INDEX_4 0x04 | ||
929 | #define IPW_POWER_INDEX_5 0x05 | ||
930 | #define IPW_POWER_AUTO 0x06 | ||
931 | #define IPW_POWER_MASK 0x0F | ||
932 | #define IPW_POWER_ENABLED 0x10 | ||
933 | #define IPW_POWER_LEVEL(x) ((x) & IPW_POWER_MASK) | ||
934 | |||
935 | #define IPW_TX_POWER_AUTO 0 | ||
936 | #define IPW_TX_POWER_ENHANCED 1 | ||
937 | |||
938 | #define IPW_TX_POWER_DEFAULT 32 | ||
939 | #define IPW_TX_POWER_MIN 0 | ||
940 | #define IPW_TX_POWER_MAX 16 | ||
941 | #define IPW_TX_POWER_MIN_DBM (-12) | ||
942 | #define IPW_TX_POWER_MAX_DBM 16 | ||
943 | |||
944 | #define FW_SCAN_DONOT_ASSOCIATE 0x0001 // Dont Attempt to Associate after Scan | ||
945 | #define FW_SCAN_PASSIVE 0x0008 // Force PASSSIVE Scan | ||
946 | |||
947 | #define REG_MIN_CHANNEL 0 | ||
948 | #define REG_MAX_CHANNEL 14 | ||
949 | |||
950 | #define REG_CHANNEL_MASK 0x00003FFF | ||
951 | #define IPW_IBSS_11B_DEFAULT_MASK 0x87ff | ||
952 | |||
953 | #define DIVERSITY_EITHER 0 // Use both antennas | ||
954 | #define DIVERSITY_ANTENNA_A 1 // Use antenna A | ||
955 | #define DIVERSITY_ANTENNA_B 2 // Use antenna B | ||
956 | |||
957 | |||
958 | #define HOST_COMMAND_WAIT 0 | ||
959 | #define HOST_COMMAND_NO_WAIT 1 | ||
960 | |||
961 | #define LOCK_NONE 0 | ||
962 | #define LOCK_DRIVER 1 | ||
963 | #define LOCK_FW 2 | ||
964 | |||
965 | #define TYPE_SWEEP_ORD 0x000D | ||
966 | #define TYPE_IBSS_STTN_ORD 0x000E | ||
967 | #define TYPE_BSS_AP_ORD 0x000F | ||
968 | #define TYPE_RAW_BEACON_ENTRY 0x0010 | ||
969 | #define TYPE_CALIBRATION_DATA 0x0011 | ||
970 | #define TYPE_ROGUE_AP_DATA 0x0012 | ||
971 | #define TYPE_ASSOCIATION_REQUEST 0x0013 | ||
972 | #define TYPE_REASSOCIATION_REQUEST 0x0014 | ||
973 | |||
974 | |||
975 | #define HW_FEATURE_RFKILL (0x0001) | ||
976 | #define RF_KILLSWITCH_OFF (1) | ||
977 | #define RF_KILLSWITCH_ON (0) | ||
978 | |||
979 | #define IPW_COMMAND_POOL_SIZE 40 | ||
980 | |||
981 | #define IPW_START_ORD_TAB_1 1 | ||
982 | #define IPW_START_ORD_TAB_2 1000 | ||
983 | |||
984 | #define IPW_ORD_TAB_1_ENTRY_SIZE sizeof(u32) | ||
985 | |||
986 | #define IS_ORDINAL_TABLE_ONE(mgr,id) \ | ||
987 | ((id >= IPW_START_ORD_TAB_1) && (id < mgr->table1_size)) | ||
988 | #define IS_ORDINAL_TABLE_TWO(mgr,id) \ | ||
989 | ((id >= IPW_START_ORD_TAB_2) && (id < (mgr->table2_size + IPW_START_ORD_TAB_2))) | ||
990 | |||
991 | #define BSS_ID_LENGTH 6 | ||
992 | |||
993 | // Fixed size data: Ordinal Table 1 | ||
994 | typedef enum _ORDINAL_TABLE_1 { // NS - means Not Supported by FW | ||
995 | // Transmit statistics | ||
996 | IPW_ORD_STAT_TX_HOST_REQUESTS = 1,// # of requested Host Tx's (MSDU) | ||
997 | IPW_ORD_STAT_TX_HOST_COMPLETE, // # of successful Host Tx's (MSDU) | ||
998 | IPW_ORD_STAT_TX_DIR_DATA, // # of successful Directed Tx's (MSDU) | ||
999 | |||
1000 | IPW_ORD_STAT_TX_DIR_DATA1 = 4, // # of successful Directed Tx's (MSDU) @ 1MB | ||
1001 | IPW_ORD_STAT_TX_DIR_DATA2, // # of successful Directed Tx's (MSDU) @ 2MB | ||
1002 | IPW_ORD_STAT_TX_DIR_DATA5_5, // # of successful Directed Tx's (MSDU) @ 5_5MB | ||
1003 | IPW_ORD_STAT_TX_DIR_DATA11, // # of successful Directed Tx's (MSDU) @ 11MB | ||
1004 | IPW_ORD_STAT_TX_DIR_DATA22, // # of successful Directed Tx's (MSDU) @ 22MB | ||
1005 | |||
1006 | IPW_ORD_STAT_TX_NODIR_DATA1 = 13,// # of successful Non_Directed Tx's (MSDU) @ 1MB | ||
1007 | IPW_ORD_STAT_TX_NODIR_DATA2, // # of successful Non_Directed Tx's (MSDU) @ 2MB | ||
1008 | IPW_ORD_STAT_TX_NODIR_DATA5_5, // # of successful Non_Directed Tx's (MSDU) @ 5.5MB | ||
1009 | IPW_ORD_STAT_TX_NODIR_DATA11, // # of successful Non_Directed Tx's (MSDU) @ 11MB | ||
1010 | |||
1011 | IPW_ORD_STAT_NULL_DATA = 21, // # of successful NULL data Tx's | ||
1012 | IPW_ORD_STAT_TX_RTS, // # of successful Tx RTS | ||
1013 | IPW_ORD_STAT_TX_CTS, // # of successful Tx CTS | ||
1014 | IPW_ORD_STAT_TX_ACK, // # of successful Tx ACK | ||
1015 | IPW_ORD_STAT_TX_ASSN, // # of successful Association Tx's | ||
1016 | IPW_ORD_STAT_TX_ASSN_RESP, // # of successful Association response Tx's | ||
1017 | IPW_ORD_STAT_TX_REASSN, // # of successful Reassociation Tx's | ||
1018 | IPW_ORD_STAT_TX_REASSN_RESP, // # of successful Reassociation response Tx's | ||
1019 | IPW_ORD_STAT_TX_PROBE, // # of probes successfully transmitted | ||
1020 | IPW_ORD_STAT_TX_PROBE_RESP, // # of probe responses successfully transmitted | ||
1021 | IPW_ORD_STAT_TX_BEACON, // # of tx beacon | ||
1022 | IPW_ORD_STAT_TX_ATIM, // # of Tx ATIM | ||
1023 | IPW_ORD_STAT_TX_DISASSN, // # of successful Disassociation TX | ||
1024 | IPW_ORD_STAT_TX_AUTH, // # of successful Authentication Tx | ||
1025 | IPW_ORD_STAT_TX_DEAUTH, // # of successful Deauthentication TX | ||
1026 | |||
1027 | IPW_ORD_STAT_TX_TOTAL_BYTES = 41,// Total successful Tx data bytes | ||
1028 | IPW_ORD_STAT_TX_RETRIES, // # of Tx retries | ||
1029 | IPW_ORD_STAT_TX_RETRY1, // # of Tx retries at 1MBPS | ||
1030 | IPW_ORD_STAT_TX_RETRY2, // # of Tx retries at 2MBPS | ||
1031 | IPW_ORD_STAT_TX_RETRY5_5, // # of Tx retries at 5.5MBPS | ||
1032 | IPW_ORD_STAT_TX_RETRY11, // # of Tx retries at 11MBPS | ||
1033 | |||
1034 | IPW_ORD_STAT_TX_FAILURES = 51, // # of Tx Failures | ||
1035 | IPW_ORD_STAT_TX_ABORT_AT_HOP, //NS // # of Tx's aborted at hop time | ||
1036 | IPW_ORD_STAT_TX_MAX_TRIES_IN_HOP,// # of times max tries in a hop failed | ||
1037 | IPW_ORD_STAT_TX_ABORT_LATE_DMA, //NS // # of times tx aborted due to late dma setup | ||
1038 | IPW_ORD_STAT_TX_ABORT_STX, //NS // # of times backoff aborted | ||
1039 | IPW_ORD_STAT_TX_DISASSN_FAIL, // # of times disassociation failed | ||
1040 | IPW_ORD_STAT_TX_ERR_CTS, // # of missed/bad CTS frames | ||
1041 | IPW_ORD_STAT_TX_BPDU, //NS // # of spanning tree BPDUs sent | ||
1042 | IPW_ORD_STAT_TX_ERR_ACK, // # of tx err due to acks | ||
1043 | |||
1044 | // Receive statistics | ||
1045 | IPW_ORD_STAT_RX_HOST = 61, // # of packets passed to host | ||
1046 | IPW_ORD_STAT_RX_DIR_DATA, // # of directed packets | ||
1047 | IPW_ORD_STAT_RX_DIR_DATA1, // # of directed packets at 1MB | ||
1048 | IPW_ORD_STAT_RX_DIR_DATA2, // # of directed packets at 2MB | ||
1049 | IPW_ORD_STAT_RX_DIR_DATA5_5, // # of directed packets at 5.5MB | ||
1050 | IPW_ORD_STAT_RX_DIR_DATA11, // # of directed packets at 11MB | ||
1051 | IPW_ORD_STAT_RX_DIR_DATA22, // # of directed packets at 22MB | ||
1052 | |||
1053 | IPW_ORD_STAT_RX_NODIR_DATA = 71,// # of nondirected packets | ||
1054 | IPW_ORD_STAT_RX_NODIR_DATA1, // # of nondirected packets at 1MB | ||
1055 | IPW_ORD_STAT_RX_NODIR_DATA2, // # of nondirected packets at 2MB | ||
1056 | IPW_ORD_STAT_RX_NODIR_DATA5_5, // # of nondirected packets at 5.5MB | ||
1057 | IPW_ORD_STAT_RX_NODIR_DATA11, // # of nondirected packets at 11MB | ||
1058 | |||
1059 | IPW_ORD_STAT_RX_NULL_DATA = 80, // # of null data rx's | ||
1060 | IPW_ORD_STAT_RX_POLL, //NS // # of poll rx | ||
1061 | IPW_ORD_STAT_RX_RTS, // # of Rx RTS | ||
1062 | IPW_ORD_STAT_RX_CTS, // # of Rx CTS | ||
1063 | IPW_ORD_STAT_RX_ACK, // # of Rx ACK | ||
1064 | IPW_ORD_STAT_RX_CFEND, // # of Rx CF End | ||
1065 | IPW_ORD_STAT_RX_CFEND_ACK, // # of Rx CF End + CF Ack | ||
1066 | IPW_ORD_STAT_RX_ASSN, // # of Association Rx's | ||
1067 | IPW_ORD_STAT_RX_ASSN_RESP, // # of Association response Rx's | ||
1068 | IPW_ORD_STAT_RX_REASSN, // # of Reassociation Rx's | ||
1069 | IPW_ORD_STAT_RX_REASSN_RESP, // # of Reassociation response Rx's | ||
1070 | IPW_ORD_STAT_RX_PROBE, // # of probe Rx's | ||
1071 | IPW_ORD_STAT_RX_PROBE_RESP, // # of probe response Rx's | ||
1072 | IPW_ORD_STAT_RX_BEACON, // # of Rx beacon | ||
1073 | IPW_ORD_STAT_RX_ATIM, // # of Rx ATIM | ||
1074 | IPW_ORD_STAT_RX_DISASSN, // # of disassociation Rx | ||
1075 | IPW_ORD_STAT_RX_AUTH, // # of authentication Rx | ||
1076 | IPW_ORD_STAT_RX_DEAUTH, // # of deauthentication Rx | ||
1077 | |||
1078 | IPW_ORD_STAT_RX_TOTAL_BYTES = 101,// Total rx data bytes received | ||
1079 | IPW_ORD_STAT_RX_ERR_CRC, // # of packets with Rx CRC error | ||
1080 | IPW_ORD_STAT_RX_ERR_CRC1, // # of Rx CRC errors at 1MB | ||
1081 | IPW_ORD_STAT_RX_ERR_CRC2, // # of Rx CRC errors at 2MB | ||
1082 | IPW_ORD_STAT_RX_ERR_CRC5_5, // # of Rx CRC errors at 5.5MB | ||
1083 | IPW_ORD_STAT_RX_ERR_CRC11, // # of Rx CRC errors at 11MB | ||
1084 | |||
1085 | IPW_ORD_STAT_RX_DUPLICATE1 = 112, // # of duplicate rx packets at 1MB | ||
1086 | IPW_ORD_STAT_RX_DUPLICATE2, // # of duplicate rx packets at 2MB | ||
1087 | IPW_ORD_STAT_RX_DUPLICATE5_5, // # of duplicate rx packets at 5.5MB | ||
1088 | IPW_ORD_STAT_RX_DUPLICATE11, // # of duplicate rx packets at 11MB | ||
1089 | IPW_ORD_STAT_RX_DUPLICATE = 119, // # of duplicate rx packets | ||
1090 | |||
1091 | IPW_ORD_PERS_DB_LOCK = 120, // # locking fw permanent db | ||
1092 | IPW_ORD_PERS_DB_SIZE, // # size of fw permanent db | ||
1093 | IPW_ORD_PERS_DB_ADDR, // # address of fw permanent db | ||
1094 | IPW_ORD_STAT_RX_INVALID_PROTOCOL, // # of rx frames with invalid protocol | ||
1095 | IPW_ORD_SYS_BOOT_TIME, // # Boot time | ||
1096 | IPW_ORD_STAT_RX_NO_BUFFER, // # of rx frames rejected due to no buffer | ||
1097 | IPW_ORD_STAT_RX_ABORT_LATE_DMA, //NS // # of rx frames rejected due to dma setup too late | ||
1098 | IPW_ORD_STAT_RX_ABORT_AT_HOP, //NS // # of rx frames aborted due to hop | ||
1099 | IPW_ORD_STAT_RX_MISSING_FRAG, // # of rx frames dropped due to missing fragment | ||
1100 | IPW_ORD_STAT_RX_ORPHAN_FRAG, // # of rx frames dropped due to non-sequential fragment | ||
1101 | IPW_ORD_STAT_RX_ORPHAN_FRAME, // # of rx frames dropped due to unmatched 1st frame | ||
1102 | IPW_ORD_STAT_RX_FRAG_AGEOUT, // # of rx frames dropped due to uncompleted frame | ||
1103 | IPW_ORD_STAT_RX_BAD_SSID, //NS // Bad SSID (unused) | ||
1104 | IPW_ORD_STAT_RX_ICV_ERRORS, // # of ICV errors during decryption | ||
1105 | |||
1106 | // PSP Statistics | ||
1107 | IPW_ORD_STAT_PSP_SUSPENSION = 137,// # of times adapter suspended | ||
1108 | IPW_ORD_STAT_PSP_BCN_TIMEOUT, // # of beacon timeout | ||
1109 | IPW_ORD_STAT_PSP_POLL_TIMEOUT, // # of poll response timeouts | ||
1110 | IPW_ORD_STAT_PSP_NONDIR_TIMEOUT,// # of timeouts waiting for last broadcast/muticast pkt | ||
1111 | IPW_ORD_STAT_PSP_RX_DTIMS, // # of PSP DTIMs received | ||
1112 | IPW_ORD_STAT_PSP_RX_TIMS, // # of PSP TIMs received | ||
1113 | IPW_ORD_STAT_PSP_STATION_ID, // PSP Station ID | ||
1114 | |||
1115 | // Association and roaming | ||
1116 | IPW_ORD_LAST_ASSN_TIME = 147, // RTC time of last association | ||
1117 | IPW_ORD_STAT_PERCENT_MISSED_BCNS,// current calculation of % missed beacons | ||
1118 | IPW_ORD_STAT_PERCENT_RETRIES, // current calculation of % missed tx retries | ||
1119 | IPW_ORD_ASSOCIATED_AP_PTR, // If associated, this is ptr to the associated | ||
1120 | // AP table entry. set to 0 if not associated | ||
1121 | IPW_ORD_AVAILABLE_AP_CNT, // # of AP's decsribed in the AP table | ||
1122 | IPW_ORD_AP_LIST_PTR, // Ptr to list of available APs | ||
1123 | IPW_ORD_STAT_AP_ASSNS, // # of associations | ||
1124 | IPW_ORD_STAT_ASSN_FAIL, // # of association failures | ||
1125 | IPW_ORD_STAT_ASSN_RESP_FAIL, // # of failuresdue to response fail | ||
1126 | IPW_ORD_STAT_FULL_SCANS, // # of full scans | ||
1127 | |||
1128 | IPW_ORD_CARD_DISABLED, // # Card Disabled | ||
1129 | IPW_ORD_STAT_ROAM_INHIBIT, // # of times roaming was inhibited due to ongoing activity | ||
1130 | IPW_FILLER_40, | ||
1131 | IPW_ORD_RSSI_AT_ASSN = 160, // RSSI of associated AP at time of association | ||
1132 | IPW_ORD_STAT_ASSN_CAUSE1, // # of reassociations due to no tx from AP in last N | ||
1133 | // hops or no prob_ responses in last 3 minutes | ||
1134 | IPW_ORD_STAT_ASSN_CAUSE2, // # of reassociations due to poor tx/rx quality | ||
1135 | IPW_ORD_STAT_ASSN_CAUSE3, // # of reassociations due to tx/rx quality with excessive | ||
1136 | // load at the AP | ||
1137 | IPW_ORD_STAT_ASSN_CAUSE4, // # of reassociations due to AP RSSI level fell below | ||
1138 | // eligible group | ||
1139 | IPW_ORD_STAT_ASSN_CAUSE5, // # of reassociations due to load leveling | ||
1140 | IPW_ORD_STAT_ASSN_CAUSE6, //NS // # of reassociations due to dropped by Ap | ||
1141 | IPW_FILLER_41, | ||
1142 | IPW_FILLER_42, | ||
1143 | IPW_FILLER_43, | ||
1144 | IPW_ORD_STAT_AUTH_FAIL, // # of times authentication failed | ||
1145 | IPW_ORD_STAT_AUTH_RESP_FAIL, // # of times authentication response failed | ||
1146 | IPW_ORD_STATION_TABLE_CNT, // # of entries in association table | ||
1147 | |||
1148 | // Other statistics | ||
1149 | IPW_ORD_RSSI_AVG_CURR = 173, // Current avg RSSI | ||
1150 | IPW_ORD_STEST_RESULTS_CURR, //NS // Current self test results word | ||
1151 | IPW_ORD_STEST_RESULTS_CUM, //NS // Cummulative self test results word | ||
1152 | IPW_ORD_SELF_TEST_STATUS, //NS // | ||
1153 | IPW_ORD_POWER_MGMT_MODE, // Power mode - 0=CAM, 1=PSP | ||
1154 | IPW_ORD_POWER_MGMT_INDEX, //NS // | ||
1155 | IPW_ORD_COUNTRY_CODE, // IEEE country code as recv'd from beacon | ||
1156 | IPW_ORD_COUNTRY_CHANNELS, // channels suported by country | ||
1157 | // IPW_ORD_COUNTRY_CHANNELS: | ||
1158 | // For 11b the lower 2-byte are used for channels from 1-14 | ||
1159 | // and the higher 2-byte are not used. | ||
1160 | IPW_ORD_RESET_CNT, // # of adapter resets (warm) | ||
1161 | IPW_ORD_BEACON_INTERVAL, // Beacon interval | ||
1162 | |||
1163 | IPW_ORD_PRINCETON_VERSION = 184, //NS // Princeton Version | ||
1164 | IPW_ORD_ANTENNA_DIVERSITY, // TRUE if antenna diversity is disabled | ||
1165 | IPW_ORD_CCA_RSSI, //NS // CCA RSSI value (factory programmed) | ||
1166 | IPW_ORD_STAT_EEPROM_UPDATE, //NS // # of times config EEPROM updated | ||
1167 | IPW_ORD_DTIM_PERIOD, // # of beacon intervals between DTIMs | ||
1168 | IPW_ORD_OUR_FREQ, // current radio freq lower digits - channel ID | ||
1169 | |||
1170 | IPW_ORD_RTC_TIME = 190, // current RTC time | ||
1171 | IPW_ORD_PORT_TYPE, // operating mode | ||
1172 | IPW_ORD_CURRENT_TX_RATE, // current tx rate | ||
1173 | IPW_ORD_SUPPORTED_RATES, // Bitmap of supported tx rates | ||
1174 | IPW_ORD_ATIM_WINDOW, // current ATIM Window | ||
1175 | IPW_ORD_BASIC_RATES, // bitmap of basic tx rates | ||
1176 | IPW_ORD_NIC_HIGHEST_RATE, // bitmap of basic tx rates | ||
1177 | IPW_ORD_AP_HIGHEST_RATE, // bitmap of basic tx rates | ||
1178 | IPW_ORD_CAPABILITIES, // Management frame capability field | ||
1179 | IPW_ORD_AUTH_TYPE, // Type of authentication | ||
1180 | IPW_ORD_RADIO_TYPE, // Adapter card platform type | ||
1181 | IPW_ORD_RTS_THRESHOLD = 201, // Min length of packet after which RTS handshaking is used | ||
1182 | IPW_ORD_INT_MODE, // International mode | ||
1183 | IPW_ORD_FRAGMENTATION_THRESHOLD, // protocol frag threshold | ||
1184 | IPW_ORD_EEPROM_SRAM_DB_BLOCK_START_ADDRESS, // EEPROM offset in SRAM | ||
1185 | IPW_ORD_EEPROM_SRAM_DB_BLOCK_SIZE, // EEPROM size in SRAM | ||
1186 | IPW_ORD_EEPROM_SKU_CAPABILITY, // EEPROM SKU Capability 206 = | ||
1187 | IPW_ORD_EEPROM_IBSS_11B_CHANNELS, // EEPROM IBSS 11b channel set | ||
1188 | |||
1189 | IPW_ORD_MAC_VERSION = 209, // MAC Version | ||
1190 | IPW_ORD_MAC_REVISION, // MAC Revision | ||
1191 | IPW_ORD_RADIO_VERSION, // Radio Version | ||
1192 | IPW_ORD_NIC_MANF_DATE_TIME, // MANF Date/Time STAMP | ||
1193 | IPW_ORD_UCODE_VERSION, // Ucode Version | ||
1194 | IPW_ORD_HW_RF_SWITCH_STATE = 214, // HW RF Kill Switch State | ||
1195 | } ORDINALTABLE1; | ||
1196 | //ENDOF TABLE1 | ||
1197 | |||
1198 | // ordinal table 2 | ||
1199 | // Variable length data: | ||
1200 | #define IPW_FIRST_VARIABLE_LENGTH_ORDINAL 1001 | ||
1201 | |||
1202 | typedef enum _ORDINAL_TABLE_2 { // NS - means Not Supported by FW | ||
1203 | IPW_ORD_STAT_BASE = 1000, // contains number of variable ORDs | ||
1204 | IPW_ORD_STAT_ADAPTER_MAC = 1001, // 6 bytes: our adapter MAC address | ||
1205 | IPW_ORD_STAT_PREFERRED_BSSID = 1002, // 6 bytes: BSSID of the preferred AP | ||
1206 | IPW_ORD_STAT_MANDATORY_BSSID = 1003, // 6 bytes: BSSID of the mandatory AP | ||
1207 | IPW_FILL_1, //NS // | ||
1208 | IPW_ORD_STAT_COUNTRY_TEXT = 1005, // 36 bytes: Country name text, First two bytes are Country code | ||
1209 | IPW_ORD_STAT_ASSN_SSID = 1006, // 32 bytes: ESSID String | ||
1210 | IPW_ORD_STATION_TABLE = 1007, // ? bytes: Station/AP table (via Direct SSID Scans) | ||
1211 | IPW_ORD_STAT_SWEEP_TABLE = 1008, // ? bytes: Sweep/Host Table table (via Broadcast Scans) | ||
1212 | IPW_ORD_STAT_ROAM_LOG = 1009, // ? bytes: Roaming log | ||
1213 | IPW_ORD_STAT_RATE_LOG = 1010, //NS // 0 bytes: Rate log | ||
1214 | IPW_ORD_STAT_FIFO = 1011, //NS // 0 bytes: Fifo buffer data structures | ||
1215 | IPW_ORD_STAT_FW_VER_NUM = 1012, // 14 bytes: fw version ID string as in (a.bb.ccc; "0.08.011") | ||
1216 | IPW_ORD_STAT_FW_DATE = 1013, // 14 bytes: fw date string (mmm dd yyyy; "Mar 13 2002") | ||
1217 | IPW_ORD_STAT_ASSN_AP_BSSID = 1014, // 6 bytes: MAC address of associated AP | ||
1218 | IPW_ORD_STAT_DEBUG = 1015, //NS // ? bytes: | ||
1219 | IPW_ORD_STAT_NIC_BPA_NUM = 1016, // 11 bytes: NIC BPA number in ASCII | ||
1220 | IPW_ORD_STAT_UCODE_DATE = 1017, // 5 bytes: uCode date | ||
1221 | IPW_ORD_SECURITY_NGOTIATION_RESULT = 1018, | ||
1222 | } ORDINALTABLE2; // NS - means Not Supported by FW | ||
1223 | |||
1224 | #define IPW_LAST_VARIABLE_LENGTH_ORDINAL 1018 | ||
1225 | |||
1226 | #ifndef WIRELESS_SPY | ||
1227 | #define WIRELESS_SPY // enable iwspy support | ||
1228 | #endif | ||
1229 | |||
1230 | extern struct iw_handler_def ipw2100_wx_handler_def; | ||
1231 | extern struct iw_statistics *ipw2100_wx_wireless_stats(struct net_device * dev); | ||
1232 | extern void ipw2100_wx_event_work(struct ipw2100_priv *priv); | ||
1233 | |||
1234 | #define IPW_HOST_FW_SHARED_AREA0 0x0002f200 | ||
1235 | #define IPW_HOST_FW_SHARED_AREA0_END 0x0002f510 // 0x310 bytes | ||
1236 | |||
1237 | #define IPW_HOST_FW_SHARED_AREA1 0x0002f610 | ||
1238 | #define IPW_HOST_FW_SHARED_AREA1_END 0x0002f630 // 0x20 bytes | ||
1239 | |||
1240 | #define IPW_HOST_FW_SHARED_AREA2 0x0002fa00 | ||
1241 | #define IPW_HOST_FW_SHARED_AREA2_END 0x0002fa20 // 0x20 bytes | ||
1242 | |||
1243 | #define IPW_HOST_FW_SHARED_AREA3 0x0002fc00 | ||
1244 | #define IPW_HOST_FW_SHARED_AREA3_END 0x0002fc10 // 0x10 bytes | ||
1245 | |||
1246 | #define IPW_HOST_FW_INTERRUPT_AREA 0x0002ff80 | ||
1247 | #define IPW_HOST_FW_INTERRUPT_AREA_END 0x00030000 // 0x80 bytes | ||
1248 | |||
1249 | struct ipw2100_fw_chunk { | ||
1250 | unsigned char *buf; | ||
1251 | long len; | ||
1252 | long pos; | ||
1253 | struct list_head list; | ||
1254 | }; | ||
1255 | |||
1256 | struct ipw2100_fw_chunk_set { | ||
1257 | const void *data; | ||
1258 | unsigned long size; | ||
1259 | }; | ||
1260 | |||
1261 | struct ipw2100_fw { | ||
1262 | int version; | ||
1263 | struct ipw2100_fw_chunk_set fw; | ||
1264 | struct ipw2100_fw_chunk_set uc; | ||
1265 | const struct firmware *fw_entry; | ||
1266 | }; | ||
1267 | |||
1268 | int ipw2100_get_firmware(struct ipw2100_priv *priv, struct ipw2100_fw *fw); | ||
1269 | void ipw2100_release_firmware(struct ipw2100_priv *priv, struct ipw2100_fw *fw); | ||
1270 | int ipw2100_fw_download(struct ipw2100_priv *priv, struct ipw2100_fw *fw); | ||
1271 | int ipw2100_ucode_download(struct ipw2100_priv *priv, struct ipw2100_fw *fw); | ||
1272 | |||
1273 | #define MAX_FW_VERSION_LEN 14 | ||
1274 | |||
1275 | int ipw2100_get_fwversion(struct ipw2100_priv *priv, char *buf, size_t max); | ||
1276 | int ipw2100_get_ucodeversion(struct ipw2100_priv *priv, char *buf, size_t max); | ||
1277 | |||
1278 | #endif /* _IPW2100_H */ | ||
diff --git a/drivers/net/wireless/ipw2200.c b/drivers/net/wireless/ipw2200.c new file mode 100644 index 000000000000..69733465354b --- /dev/null +++ b/drivers/net/wireless/ipw2200.c | |||
@@ -0,0 +1,7348 @@ | |||
1 | /****************************************************************************** | ||
2 | |||
3 | Copyright(c) 2003 - 2004 Intel Corporation. All rights reserved. | ||
4 | |||
5 | 802.11 status code portion of this file from ethereal-0.10.6: | ||
6 | Copyright 2000, Axis Communications AB | ||
7 | Ethereal - Network traffic analyzer | ||
8 | By Gerald Combs <gerald@ethereal.com> | ||
9 | Copyright 1998 Gerald Combs | ||
10 | |||
11 | This program is free software; you can redistribute it and/or modify it | ||
12 | under the terms of version 2 of the GNU General Public License as | ||
13 | published by the Free Software Foundation. | ||
14 | |||
15 | This program is distributed in the hope that it will be useful, but WITHOUT | ||
16 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | ||
17 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | ||
18 | more details. | ||
19 | |||
20 | You should have received a copy of the GNU General Public License along with | ||
21 | this program; if not, write to the Free Software Foundation, Inc., 59 | ||
22 | Temple Place - Suite 330, Boston, MA 02111-1307, USA. | ||
23 | |||
24 | The full GNU General Public License is included in this distribution in the | ||
25 | file called LICENSE. | ||
26 | |||
27 | Contact Information: | ||
28 | James P. Ketrenos <ipw2100-admin@linux.intel.com> | ||
29 | Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 | ||
30 | |||
31 | ******************************************************************************/ | ||
32 | |||
33 | #include "ipw2200.h" | ||
34 | |||
35 | #define IPW2200_VERSION "1.0.0" | ||
36 | #define DRV_DESCRIPTION "Intel(R) PRO/Wireless 2200/2915 Network Driver" | ||
37 | #define DRV_COPYRIGHT "Copyright(c) 2003-2004 Intel Corporation" | ||
38 | #define DRV_VERSION IPW2200_VERSION | ||
39 | |||
40 | MODULE_DESCRIPTION(DRV_DESCRIPTION); | ||
41 | MODULE_VERSION(DRV_VERSION); | ||
42 | MODULE_AUTHOR(DRV_COPYRIGHT); | ||
43 | MODULE_LICENSE("GPL"); | ||
44 | |||
45 | static int debug = 0; | ||
46 | static int channel = 0; | ||
47 | static char *ifname; | ||
48 | static int mode = 0; | ||
49 | |||
50 | static u32 ipw_debug_level; | ||
51 | static int associate = 1; | ||
52 | static int auto_create = 1; | ||
53 | static int disable = 0; | ||
54 | static const char ipw_modes[] = { | ||
55 | 'a', 'b', 'g', '?' | ||
56 | }; | ||
57 | |||
58 | static void ipw_rx(struct ipw_priv *priv); | ||
59 | static int ipw_queue_tx_reclaim(struct ipw_priv *priv, | ||
60 | struct clx2_tx_queue *txq, int qindex); | ||
61 | static int ipw_queue_reset(struct ipw_priv *priv); | ||
62 | |||
63 | static int ipw_queue_tx_hcmd(struct ipw_priv *priv, int hcmd, void *buf, | ||
64 | int len, int sync); | ||
65 | |||
66 | static void ipw_tx_queue_free(struct ipw_priv *); | ||
67 | |||
68 | static struct ipw_rx_queue *ipw_rx_queue_alloc(struct ipw_priv *); | ||
69 | static void ipw_rx_queue_free(struct ipw_priv *, struct ipw_rx_queue *); | ||
70 | static void ipw_rx_queue_replenish(void *); | ||
71 | |||
72 | static int ipw_up(struct ipw_priv *); | ||
73 | static void ipw_down(struct ipw_priv *); | ||
74 | static int ipw_config(struct ipw_priv *); | ||
75 | static int init_supported_rates(struct ipw_priv *priv, struct ipw_supported_rates *prates); | ||
76 | |||
77 | static u8 band_b_active_channel[MAX_B_CHANNELS] = { | ||
78 | 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 0 | ||
79 | }; | ||
80 | static u8 band_a_active_channel[MAX_A_CHANNELS] = { | ||
81 | 36, 40, 44, 48, 149, 153, 157, 161, 165, 52, 56, 60, 64, 0 | ||
82 | }; | ||
83 | |||
84 | static int is_valid_channel(int mode_mask, int channel) | ||
85 | { | ||
86 | int i; | ||
87 | |||
88 | if (!channel) | ||
89 | return 0; | ||
90 | |||
91 | if (mode_mask & IEEE_A) | ||
92 | for (i = 0; i < MAX_A_CHANNELS; i++) | ||
93 | if (band_a_active_channel[i] == channel) | ||
94 | return IEEE_A; | ||
95 | |||
96 | if (mode_mask & (IEEE_B | IEEE_G)) | ||
97 | for (i = 0; i < MAX_B_CHANNELS; i++) | ||
98 | if (band_b_active_channel[i] == channel) | ||
99 | return mode_mask & (IEEE_B | IEEE_G); | ||
100 | |||
101 | return 0; | ||
102 | } | ||
103 | |||
104 | static char *snprint_line(char *buf, size_t count, | ||
105 | const u8 *data, u32 len, u32 ofs) | ||
106 | { | ||
107 | int out, i, j, l; | ||
108 | char c; | ||
109 | |||
110 | out = snprintf(buf, count, "%08X", ofs); | ||
111 | |||
112 | for (l = 0, i = 0; i < 2; i++) { | ||
113 | out += snprintf(buf + out, count - out, " "); | ||
114 | for (j = 0; j < 8 && l < len; j++, l++) | ||
115 | out += snprintf(buf + out, count - out, "%02X ", | ||
116 | data[(i * 8 + j)]); | ||
117 | for (; j < 8; j++) | ||
118 | out += snprintf(buf + out, count - out, " "); | ||
119 | } | ||
120 | |||
121 | out += snprintf(buf + out, count - out, " "); | ||
122 | for (l = 0, i = 0; i < 2; i++) { | ||
123 | out += snprintf(buf + out, count - out, " "); | ||
124 | for (j = 0; j < 8 && l < len; j++, l++) { | ||
125 | c = data[(i * 8 + j)]; | ||
126 | if (!isascii(c) || !isprint(c)) | ||
127 | c = '.'; | ||
128 | |||
129 | out += snprintf(buf + out, count - out, "%c", c); | ||
130 | } | ||
131 | |||
132 | for (; j < 8; j++) | ||
133 | out += snprintf(buf + out, count - out, " "); | ||
134 | } | ||
135 | |||
136 | return buf; | ||
137 | } | ||
138 | |||
139 | static void printk_buf(int level, const u8 *data, u32 len) | ||
140 | { | ||
141 | char line[81]; | ||
142 | u32 ofs = 0; | ||
143 | if (!(ipw_debug_level & level)) | ||
144 | return; | ||
145 | |||
146 | while (len) { | ||
147 | printk(KERN_DEBUG "%s\n", | ||
148 | snprint_line(line, sizeof(line), &data[ofs], | ||
149 | min(len, 16U), ofs)); | ||
150 | ofs += 16; | ||
151 | len -= min(len, 16U); | ||
152 | } | ||
153 | } | ||
154 | |||
155 | static u32 _ipw_read_reg32(struct ipw_priv *priv, u32 reg); | ||
156 | #define ipw_read_reg32(a, b) _ipw_read_reg32(a, b) | ||
157 | |||
158 | static u8 _ipw_read_reg8(struct ipw_priv *ipw, u32 reg); | ||
159 | #define ipw_read_reg8(a, b) _ipw_read_reg8(a, b) | ||
160 | |||
161 | static void _ipw_write_reg8(struct ipw_priv *priv, u32 reg, u8 value); | ||
162 | static inline void ipw_write_reg8(struct ipw_priv *a, u32 b, u8 c) | ||
163 | { | ||
164 | IPW_DEBUG_IO("%s %d: write_indirect8(0x%08X, 0x%08X)\n", __FILE__, __LINE__, (u32)(b), (u32)(c)); | ||
165 | _ipw_write_reg8(a, b, c); | ||
166 | } | ||
167 | |||
168 | static void _ipw_write_reg16(struct ipw_priv *priv, u32 reg, u16 value); | ||
169 | static inline void ipw_write_reg16(struct ipw_priv *a, u32 b, u16 c) | ||
170 | { | ||
171 | IPW_DEBUG_IO("%s %d: write_indirect16(0x%08X, 0x%08X)\n", __FILE__, __LINE__, (u32)(b), (u32)(c)); | ||
172 | _ipw_write_reg16(a, b, c); | ||
173 | } | ||
174 | |||
175 | static void _ipw_write_reg32(struct ipw_priv *priv, u32 reg, u32 value); | ||
176 | static inline void ipw_write_reg32(struct ipw_priv *a, u32 b, u32 c) | ||
177 | { | ||
178 | IPW_DEBUG_IO("%s %d: write_indirect32(0x%08X, 0x%08X)\n", __FILE__, __LINE__, (u32)(b), (u32)(c)); | ||
179 | _ipw_write_reg32(a, b, c); | ||
180 | } | ||
181 | |||
182 | #define _ipw_write8(ipw, ofs, val) writeb((val), (ipw)->hw_base + (ofs)) | ||
183 | #define ipw_write8(ipw, ofs, val) \ | ||
184 | IPW_DEBUG_IO("%s %d: write_direct8(0x%08X, 0x%08X)\n", __FILE__, __LINE__, (u32)(ofs), (u32)(val)); \ | ||
185 | _ipw_write8(ipw, ofs, val) | ||
186 | |||
187 | #define _ipw_write16(ipw, ofs, val) writew((val), (ipw)->hw_base + (ofs)) | ||
188 | #define ipw_write16(ipw, ofs, val) \ | ||
189 | IPW_DEBUG_IO("%s %d: write_direct16(0x%08X, 0x%08X)\n", __FILE__, __LINE__, (u32)(ofs), (u32)(val)); \ | ||
190 | _ipw_write16(ipw, ofs, val) | ||
191 | |||
192 | #define _ipw_write32(ipw, ofs, val) writel((val), (ipw)->hw_base + (ofs)) | ||
193 | #define ipw_write32(ipw, ofs, val) \ | ||
194 | IPW_DEBUG_IO("%s %d: write_direct32(0x%08X, 0x%08X)\n", __FILE__, __LINE__, (u32)(ofs), (u32)(val)); \ | ||
195 | _ipw_write32(ipw, ofs, val) | ||
196 | |||
197 | #define _ipw_read8(ipw, ofs) readb((ipw)->hw_base + (ofs)) | ||
198 | static inline u8 __ipw_read8(char *f, u32 l, struct ipw_priv *ipw, u32 ofs) { | ||
199 | IPW_DEBUG_IO("%s %d: read_direct8(0x%08X)\n", f, l, (u32)(ofs)); | ||
200 | return _ipw_read8(ipw, ofs); | ||
201 | } | ||
202 | #define ipw_read8(ipw, ofs) __ipw_read8(__FILE__, __LINE__, ipw, ofs) | ||
203 | |||
204 | #define _ipw_read16(ipw, ofs) readw((ipw)->hw_base + (ofs)) | ||
205 | static inline u16 __ipw_read16(char *f, u32 l, struct ipw_priv *ipw, u32 ofs) { | ||
206 | IPW_DEBUG_IO("%s %d: read_direct16(0x%08X)\n", f, l, (u32)(ofs)); | ||
207 | return _ipw_read16(ipw, ofs); | ||
208 | } | ||
209 | #define ipw_read16(ipw, ofs) __ipw_read16(__FILE__, __LINE__, ipw, ofs) | ||
210 | |||
211 | #define _ipw_read32(ipw, ofs) readl((ipw)->hw_base + (ofs)) | ||
212 | static inline u32 __ipw_read32(char *f, u32 l, struct ipw_priv *ipw, u32 ofs) { | ||
213 | IPW_DEBUG_IO("%s %d: read_direct32(0x%08X)\n", f, l, (u32)(ofs)); | ||
214 | return _ipw_read32(ipw, ofs); | ||
215 | } | ||
216 | #define ipw_read32(ipw, ofs) __ipw_read32(__FILE__, __LINE__, ipw, ofs) | ||
217 | |||
218 | static void _ipw_read_indirect(struct ipw_priv *, u32, u8 *, int); | ||
219 | #define ipw_read_indirect(a, b, c, d) \ | ||
220 | IPW_DEBUG_IO("%s %d: read_inddirect(0x%08X) %d bytes\n", __FILE__, __LINE__, (u32)(b), d); \ | ||
221 | _ipw_read_indirect(a, b, c, d) | ||
222 | |||
223 | static void _ipw_write_indirect(struct ipw_priv *priv, u32 addr, u8 *data, int num); | ||
224 | #define ipw_write_indirect(a, b, c, d) \ | ||
225 | IPW_DEBUG_IO("%s %d: write_indirect(0x%08X) %d bytes\n", __FILE__, __LINE__, (u32)(b), d); \ | ||
226 | _ipw_write_indirect(a, b, c, d) | ||
227 | |||
228 | /* indirect write s */ | ||
229 | static void _ipw_write_reg32(struct ipw_priv *priv, u32 reg, | ||
230 | u32 value) | ||
231 | { | ||
232 | IPW_DEBUG_IO(" %p : reg = 0x%8X : value = 0x%8X\n", | ||
233 | priv, reg, value); | ||
234 | _ipw_write32(priv, CX2_INDIRECT_ADDR, reg); | ||
235 | _ipw_write32(priv, CX2_INDIRECT_DATA, value); | ||
236 | } | ||
237 | |||
238 | |||
239 | static void _ipw_write_reg8(struct ipw_priv *priv, u32 reg, u8 value) | ||
240 | { | ||
241 | IPW_DEBUG_IO(" reg = 0x%8X : value = 0x%8X\n", reg, value); | ||
242 | _ipw_write32(priv, CX2_INDIRECT_ADDR, reg & CX2_INDIRECT_ADDR_MASK); | ||
243 | _ipw_write8(priv, CX2_INDIRECT_DATA, value); | ||
244 | IPW_DEBUG_IO(" reg = 0x%8X : value = 0x%8X\n", | ||
245 | (unsigned)(priv->hw_base + CX2_INDIRECT_DATA), | ||
246 | value); | ||
247 | } | ||
248 | |||
249 | static void _ipw_write_reg16(struct ipw_priv *priv, u32 reg, | ||
250 | u16 value) | ||
251 | { | ||
252 | IPW_DEBUG_IO(" reg = 0x%8X : value = 0x%8X\n", reg, value); | ||
253 | _ipw_write32(priv, CX2_INDIRECT_ADDR, reg & CX2_INDIRECT_ADDR_MASK); | ||
254 | _ipw_write16(priv, CX2_INDIRECT_DATA, value); | ||
255 | } | ||
256 | |||
257 | /* indirect read s */ | ||
258 | |||
259 | static u8 _ipw_read_reg8(struct ipw_priv *priv, u32 reg) | ||
260 | { | ||
261 | u32 word; | ||
262 | _ipw_write32(priv, CX2_INDIRECT_ADDR, reg & CX2_INDIRECT_ADDR_MASK); | ||
263 | IPW_DEBUG_IO(" reg = 0x%8X : \n", reg); | ||
264 | word = _ipw_read32(priv, CX2_INDIRECT_DATA); | ||
265 | return (word >> ((reg & 0x3)*8)) & 0xff; | ||
266 | } | ||
267 | |||
268 | static u32 _ipw_read_reg32(struct ipw_priv *priv, u32 reg) | ||
269 | { | ||
270 | u32 value; | ||
271 | |||
272 | IPW_DEBUG_IO("%p : reg = 0x%08x\n", priv, reg); | ||
273 | |||
274 | _ipw_write32(priv, CX2_INDIRECT_ADDR, reg); | ||
275 | value = _ipw_read32(priv, CX2_INDIRECT_DATA); | ||
276 | IPW_DEBUG_IO(" reg = 0x%4X : value = 0x%4x \n", reg, value); | ||
277 | return value; | ||
278 | } | ||
279 | |||
280 | /* iterative/auto-increment 32 bit reads and writes */ | ||
281 | static void _ipw_read_indirect(struct ipw_priv *priv, u32 addr, u8 * buf, | ||
282 | int num) | ||
283 | { | ||
284 | u32 aligned_addr = addr & CX2_INDIRECT_ADDR_MASK; | ||
285 | u32 dif_len = addr - aligned_addr; | ||
286 | u32 aligned_len; | ||
287 | u32 i; | ||
288 | |||
289 | IPW_DEBUG_IO("addr = %i, buf = %p, num = %i\n", addr, buf, num); | ||
290 | |||
291 | /* Read the first nibble byte by byte */ | ||
292 | if (unlikely(dif_len)) { | ||
293 | /* Start reading at aligned_addr + dif_len */ | ||
294 | _ipw_write32(priv, CX2_INDIRECT_ADDR, aligned_addr); | ||
295 | for (i = dif_len; i < 4; i++, buf++) | ||
296 | *buf = _ipw_read8(priv, CX2_INDIRECT_DATA + i); | ||
297 | num -= dif_len; | ||
298 | aligned_addr += 4; | ||
299 | } | ||
300 | |||
301 | /* Read DWs through autoinc register */ | ||
302 | _ipw_write32(priv, CX2_AUTOINC_ADDR, aligned_addr); | ||
303 | aligned_len = num & CX2_INDIRECT_ADDR_MASK; | ||
304 | for (i = 0; i < aligned_len; i += 4, buf += 4, aligned_addr += 4) | ||
305 | *(u32*)buf = ipw_read32(priv, CX2_AUTOINC_DATA); | ||
306 | |||
307 | /* Copy the last nibble */ | ||
308 | dif_len = num - aligned_len; | ||
309 | _ipw_write32(priv, CX2_INDIRECT_ADDR, aligned_addr); | ||
310 | for (i = 0; i < dif_len; i++, buf++) | ||
311 | *buf = ipw_read8(priv, CX2_INDIRECT_DATA + i); | ||
312 | } | ||
313 | |||
314 | static void _ipw_write_indirect(struct ipw_priv *priv, u32 addr, u8 *buf, | ||
315 | int num) | ||
316 | { | ||
317 | u32 aligned_addr = addr & CX2_INDIRECT_ADDR_MASK; | ||
318 | u32 dif_len = addr - aligned_addr; | ||
319 | u32 aligned_len; | ||
320 | u32 i; | ||
321 | |||
322 | IPW_DEBUG_IO("addr = %i, buf = %p, num = %i\n", addr, buf, num); | ||
323 | |||
324 | /* Write the first nibble byte by byte */ | ||
325 | if (unlikely(dif_len)) { | ||
326 | /* Start writing at aligned_addr + dif_len */ | ||
327 | _ipw_write32(priv, CX2_INDIRECT_ADDR, aligned_addr); | ||
328 | for (i = dif_len; i < 4; i++, buf++) | ||
329 | _ipw_write8(priv, CX2_INDIRECT_DATA + i, *buf); | ||
330 | num -= dif_len; | ||
331 | aligned_addr += 4; | ||
332 | } | ||
333 | |||
334 | /* Write DWs through autoinc register */ | ||
335 | _ipw_write32(priv, CX2_AUTOINC_ADDR, aligned_addr); | ||
336 | aligned_len = num & CX2_INDIRECT_ADDR_MASK; | ||
337 | for (i = 0; i < aligned_len; i += 4, buf += 4, aligned_addr += 4) | ||
338 | _ipw_write32(priv, CX2_AUTOINC_DATA, *(u32*)buf); | ||
339 | |||
340 | /* Copy the last nibble */ | ||
341 | dif_len = num - aligned_len; | ||
342 | _ipw_write32(priv, CX2_INDIRECT_ADDR, aligned_addr); | ||
343 | for (i = 0; i < dif_len; i++, buf++) | ||
344 | _ipw_write8(priv, CX2_INDIRECT_DATA + i, *buf); | ||
345 | } | ||
346 | |||
347 | static void ipw_write_direct(struct ipw_priv *priv, u32 addr, void *buf, | ||
348 | int num) | ||
349 | { | ||
350 | memcpy_toio((priv->hw_base + addr), buf, num); | ||
351 | } | ||
352 | |||
353 | static inline void ipw_set_bit(struct ipw_priv *priv, u32 reg, u32 mask) | ||
354 | { | ||
355 | ipw_write32(priv, reg, ipw_read32(priv, reg) | mask); | ||
356 | } | ||
357 | |||
358 | static inline void ipw_clear_bit(struct ipw_priv *priv, u32 reg, u32 mask) | ||
359 | { | ||
360 | ipw_write32(priv, reg, ipw_read32(priv, reg) & ~mask); | ||
361 | } | ||
362 | |||
363 | static inline void ipw_enable_interrupts(struct ipw_priv *priv) | ||
364 | { | ||
365 | if (priv->status & STATUS_INT_ENABLED) | ||
366 | return; | ||
367 | priv->status |= STATUS_INT_ENABLED; | ||
368 | ipw_write32(priv, CX2_INTA_MASK_R, CX2_INTA_MASK_ALL); | ||
369 | } | ||
370 | |||
371 | static inline void ipw_disable_interrupts(struct ipw_priv *priv) | ||
372 | { | ||
373 | if (!(priv->status & STATUS_INT_ENABLED)) | ||
374 | return; | ||
375 | priv->status &= ~STATUS_INT_ENABLED; | ||
376 | ipw_write32(priv, CX2_INTA_MASK_R, ~CX2_INTA_MASK_ALL); | ||
377 | } | ||
378 | |||
379 | static char *ipw_error_desc(u32 val) | ||
380 | { | ||
381 | switch (val) { | ||
382 | case IPW_FW_ERROR_OK: | ||
383 | return "ERROR_OK"; | ||
384 | case IPW_FW_ERROR_FAIL: | ||
385 | return "ERROR_FAIL"; | ||
386 | case IPW_FW_ERROR_MEMORY_UNDERFLOW: | ||
387 | return "MEMORY_UNDERFLOW"; | ||
388 | case IPW_FW_ERROR_MEMORY_OVERFLOW: | ||
389 | return "MEMORY_OVERFLOW"; | ||
390 | case IPW_FW_ERROR_BAD_PARAM: | ||
391 | return "ERROR_BAD_PARAM"; | ||
392 | case IPW_FW_ERROR_BAD_CHECKSUM: | ||
393 | return "ERROR_BAD_CHECKSUM"; | ||
394 | case IPW_FW_ERROR_NMI_INTERRUPT: | ||
395 | return "ERROR_NMI_INTERRUPT"; | ||
396 | case IPW_FW_ERROR_BAD_DATABASE: | ||
397 | return "ERROR_BAD_DATABASE"; | ||
398 | case IPW_FW_ERROR_ALLOC_FAIL: | ||
399 | return "ERROR_ALLOC_FAIL"; | ||
400 | case IPW_FW_ERROR_DMA_UNDERRUN: | ||
401 | return "ERROR_DMA_UNDERRUN"; | ||
402 | case IPW_FW_ERROR_DMA_STATUS: | ||
403 | return "ERROR_DMA_STATUS"; | ||
404 | case IPW_FW_ERROR_DINOSTATUS_ERROR: | ||
405 | return "ERROR_DINOSTATUS_ERROR"; | ||
406 | case IPW_FW_ERROR_EEPROMSTATUS_ERROR: | ||
407 | return "ERROR_EEPROMSTATUS_ERROR"; | ||
408 | case IPW_FW_ERROR_SYSASSERT: | ||
409 | return "ERROR_SYSASSERT"; | ||
410 | case IPW_FW_ERROR_FATAL_ERROR: | ||
411 | return "ERROR_FATALSTATUS_ERROR"; | ||
412 | default: | ||
413 | return "UNKNOWNSTATUS_ERROR"; | ||
414 | } | ||
415 | } | ||
416 | |||
417 | static void ipw_dump_nic_error_log(struct ipw_priv *priv) | ||
418 | { | ||
419 | u32 desc, time, blink1, blink2, ilink1, ilink2, idata, i, count, base; | ||
420 | |||
421 | base = ipw_read32(priv, IPWSTATUS_ERROR_LOG); | ||
422 | count = ipw_read_reg32(priv, base); | ||
423 | |||
424 | if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) { | ||
425 | IPW_ERROR("Start IPW Error Log Dump:\n"); | ||
426 | IPW_ERROR("Status: 0x%08X, Config: %08X\n", | ||
427 | priv->status, priv->config); | ||
428 | } | ||
429 | |||
430 | for (i = ERROR_START_OFFSET; | ||
431 | i <= count * ERROR_ELEM_SIZE; | ||
432 | i += ERROR_ELEM_SIZE) { | ||
433 | desc = ipw_read_reg32(priv, base + i); | ||
434 | time = ipw_read_reg32(priv, base + i + 1*sizeof(u32)); | ||
435 | blink1 = ipw_read_reg32(priv, base + i + 2*sizeof(u32)); | ||
436 | blink2 = ipw_read_reg32(priv, base + i + 3*sizeof(u32)); | ||
437 | ilink1 = ipw_read_reg32(priv, base + i + 4*sizeof(u32)); | ||
438 | ilink2 = ipw_read_reg32(priv, base + i + 5*sizeof(u32)); | ||
439 | idata = ipw_read_reg32(priv, base + i + 6*sizeof(u32)); | ||
440 | |||
441 | IPW_ERROR( | ||
442 | "%s %i 0x%08x 0x%08x 0x%08x 0x%08x 0x%08x\n", | ||
443 | ipw_error_desc(desc), time, blink1, blink2, | ||
444 | ilink1, ilink2, idata); | ||
445 | } | ||
446 | } | ||
447 | |||
448 | static void ipw_dump_nic_event_log(struct ipw_priv *priv) | ||
449 | { | ||
450 | u32 ev, time, data, i, count, base; | ||
451 | |||
452 | base = ipw_read32(priv, IPW_EVENT_LOG); | ||
453 | count = ipw_read_reg32(priv, base); | ||
454 | |||
455 | if (EVENT_START_OFFSET <= count * EVENT_ELEM_SIZE) | ||
456 | IPW_ERROR("Start IPW Event Log Dump:\n"); | ||
457 | |||
458 | for (i = EVENT_START_OFFSET; | ||
459 | i <= count * EVENT_ELEM_SIZE; | ||
460 | i += EVENT_ELEM_SIZE) { | ||
461 | ev = ipw_read_reg32(priv, base + i); | ||
462 | time = ipw_read_reg32(priv, base + i + 1*sizeof(u32)); | ||
463 | data = ipw_read_reg32(priv, base + i + 2*sizeof(u32)); | ||
464 | |||
465 | #ifdef CONFIG_IPW_DEBUG | ||
466 | IPW_ERROR("%i\t0x%08x\t%i\n", time, data, ev); | ||
467 | #endif | ||
468 | } | ||
469 | } | ||
470 | |||
471 | static int ipw_get_ordinal(struct ipw_priv *priv, u32 ord, void *val, | ||
472 | u32 *len) | ||
473 | { | ||
474 | u32 addr, field_info, field_len, field_count, total_len; | ||
475 | |||
476 | IPW_DEBUG_ORD("ordinal = %i\n", ord); | ||
477 | |||
478 | if (!priv || !val || !len) { | ||
479 | IPW_DEBUG_ORD("Invalid argument\n"); | ||
480 | return -EINVAL; | ||
481 | } | ||
482 | |||
483 | /* verify device ordinal tables have been initialized */ | ||
484 | if (!priv->table0_addr || !priv->table1_addr || !priv->table2_addr) { | ||
485 | IPW_DEBUG_ORD("Access ordinals before initialization\n"); | ||
486 | return -EINVAL; | ||
487 | } | ||
488 | |||
489 | switch (IPW_ORD_TABLE_ID_MASK & ord) { | ||
490 | case IPW_ORD_TABLE_0_MASK: | ||
491 | /* | ||
492 | * TABLE 0: Direct access to a table of 32 bit values | ||
493 | * | ||
494 | * This is a very simple table with the data directly | ||
495 | * read from the table | ||
496 | */ | ||
497 | |||
498 | /* remove the table id from the ordinal */ | ||
499 | ord &= IPW_ORD_TABLE_VALUE_MASK; | ||
500 | |||
501 | /* boundary check */ | ||
502 | if (ord > priv->table0_len) { | ||
503 | IPW_DEBUG_ORD("ordinal value (%i) longer then " | ||
504 | "max (%i)\n", ord, priv->table0_len); | ||
505 | return -EINVAL; | ||
506 | } | ||
507 | |||
508 | /* verify we have enough room to store the value */ | ||
509 | if (*len < sizeof(u32)) { | ||
510 | IPW_DEBUG_ORD("ordinal buffer length too small, " | ||
511 | "need %d\n", sizeof(u32)); | ||
512 | return -EINVAL; | ||
513 | } | ||
514 | |||
515 | IPW_DEBUG_ORD("Reading TABLE0[%i] from offset 0x%08x\n", | ||
516 | ord, priv->table0_addr + (ord << 2)); | ||
517 | |||
518 | *len = sizeof(u32); | ||
519 | ord <<= 2; | ||
520 | *((u32 *)val) = ipw_read32(priv, priv->table0_addr + ord); | ||
521 | break; | ||
522 | |||
523 | case IPW_ORD_TABLE_1_MASK: | ||
524 | /* | ||
525 | * TABLE 1: Indirect access to a table of 32 bit values | ||
526 | * | ||
527 | * This is a fairly large table of u32 values each | ||
528 | * representing starting addr for the data (which is | ||
529 | * also a u32) | ||
530 | */ | ||
531 | |||
532 | /* remove the table id from the ordinal */ | ||
533 | ord &= IPW_ORD_TABLE_VALUE_MASK; | ||
534 | |||
535 | /* boundary check */ | ||
536 | if (ord > priv->table1_len) { | ||
537 | IPW_DEBUG_ORD("ordinal value too long\n"); | ||
538 | return -EINVAL; | ||
539 | } | ||
540 | |||
541 | /* verify we have enough room to store the value */ | ||
542 | if (*len < sizeof(u32)) { | ||
543 | IPW_DEBUG_ORD("ordinal buffer length too small, " | ||
544 | "need %d\n", sizeof(u32)); | ||
545 | return -EINVAL; | ||
546 | } | ||
547 | |||
548 | *((u32 *)val) = ipw_read_reg32(priv, (priv->table1_addr + (ord << 2))); | ||
549 | *len = sizeof(u32); | ||
550 | break; | ||
551 | |||
552 | case IPW_ORD_TABLE_2_MASK: | ||
553 | /* | ||
554 | * TABLE 2: Indirect access to a table of variable sized values | ||
555 | * | ||
556 | * This table consist of six values, each containing | ||
557 | * - dword containing the starting offset of the data | ||
558 | * - dword containing the lengh in the first 16bits | ||
559 | * and the count in the second 16bits | ||
560 | */ | ||
561 | |||
562 | /* remove the table id from the ordinal */ | ||
563 | ord &= IPW_ORD_TABLE_VALUE_MASK; | ||
564 | |||
565 | /* boundary check */ | ||
566 | if (ord > priv->table2_len) { | ||
567 | IPW_DEBUG_ORD("ordinal value too long\n"); | ||
568 | return -EINVAL; | ||
569 | } | ||
570 | |||
571 | /* get the address of statistic */ | ||
572 | addr = ipw_read_reg32(priv, priv->table2_addr + (ord << 3)); | ||
573 | |||
574 | /* get the second DW of statistics ; | ||
575 | * two 16-bit words - first is length, second is count */ | ||
576 | field_info = ipw_read_reg32(priv, priv->table2_addr + (ord << 3) + sizeof(u32)); | ||
577 | |||
578 | /* get each entry length */ | ||
579 | field_len = *((u16 *)&field_info); | ||
580 | |||
581 | /* get number of entries */ | ||
582 | field_count = *(((u16 *)&field_info) + 1); | ||
583 | |||
584 | /* abort if not enought memory */ | ||
585 | total_len = field_len * field_count; | ||
586 | if (total_len > *len) { | ||
587 | *len = total_len; | ||
588 | return -EINVAL; | ||
589 | } | ||
590 | |||
591 | *len = total_len; | ||
592 | if (!total_len) | ||
593 | return 0; | ||
594 | |||
595 | IPW_DEBUG_ORD("addr = 0x%08x, total_len = %i, " | ||
596 | "field_info = 0x%08x\n", | ||
597 | addr, total_len, field_info); | ||
598 | ipw_read_indirect(priv, addr, val, total_len); | ||
599 | break; | ||
600 | |||
601 | default: | ||
602 | IPW_DEBUG_ORD("Invalid ordinal!\n"); | ||
603 | return -EINVAL; | ||
604 | |||
605 | } | ||
606 | |||
607 | |||
608 | return 0; | ||
609 | } | ||
610 | |||
611 | static void ipw_init_ordinals(struct ipw_priv *priv) | ||
612 | { | ||
613 | priv->table0_addr = IPW_ORDINALS_TABLE_LOWER; | ||
614 | priv->table0_len = ipw_read32(priv, priv->table0_addr); | ||
615 | |||
616 | IPW_DEBUG_ORD("table 0 offset at 0x%08x, len = %i\n", | ||
617 | priv->table0_addr, priv->table0_len); | ||
618 | |||
619 | priv->table1_addr = ipw_read32(priv, IPW_ORDINALS_TABLE_1); | ||
620 | priv->table1_len = ipw_read_reg32(priv, priv->table1_addr); | ||
621 | |||
622 | IPW_DEBUG_ORD("table 1 offset at 0x%08x, len = %i\n", | ||
623 | priv->table1_addr, priv->table1_len); | ||
624 | |||
625 | priv->table2_addr = ipw_read32(priv, IPW_ORDINALS_TABLE_2); | ||
626 | priv->table2_len = ipw_read_reg32(priv, priv->table2_addr); | ||
627 | priv->table2_len &= 0x0000ffff; /* use first two bytes */ | ||
628 | |||
629 | IPW_DEBUG_ORD("table 2 offset at 0x%08x, len = %i\n", | ||
630 | priv->table2_addr, priv->table2_len); | ||
631 | |||
632 | } | ||
633 | |||
634 | /* | ||
635 | * The following adds a new attribute to the sysfs representation | ||
636 | * of this device driver (i.e. a new file in /sys/bus/pci/drivers/ipw/) | ||
637 | * used for controling the debug level. | ||
638 | * | ||
639 | * See the level definitions in ipw for details. | ||
640 | */ | ||
641 | static ssize_t show_debug_level(struct device_driver *d, char *buf) | ||
642 | { | ||
643 | return sprintf(buf, "0x%08X\n", ipw_debug_level); | ||
644 | } | ||
645 | static ssize_t store_debug_level(struct device_driver *d, const char *buf, | ||
646 | size_t count) | ||
647 | { | ||
648 | char *p = (char *)buf; | ||
649 | u32 val; | ||
650 | |||
651 | if (p[1] == 'x' || p[1] == 'X' || p[0] == 'x' || p[0] == 'X') { | ||
652 | p++; | ||
653 | if (p[0] == 'x' || p[0] == 'X') | ||
654 | p++; | ||
655 | val = simple_strtoul(p, &p, 16); | ||
656 | } else | ||
657 | val = simple_strtoul(p, &p, 10); | ||
658 | if (p == buf) | ||
659 | printk(KERN_INFO DRV_NAME | ||
660 | ": %s is not in hex or decimal form.\n", buf); | ||
661 | else | ||
662 | ipw_debug_level = val; | ||
663 | |||
664 | return strnlen(buf, count); | ||
665 | } | ||
666 | |||
667 | static DRIVER_ATTR(debug_level, S_IWUSR | S_IRUGO, | ||
668 | show_debug_level, store_debug_level); | ||
669 | |||
670 | static ssize_t show_status(struct device *d, char *buf) | ||
671 | { | ||
672 | struct ipw_priv *p = (struct ipw_priv *)d->driver_data; | ||
673 | return sprintf(buf, "0x%08x\n", (int)p->status); | ||
674 | } | ||
675 | static DEVICE_ATTR(status, S_IRUGO, show_status, NULL); | ||
676 | |||
677 | static ssize_t show_cfg(struct device *d, char *buf) | ||
678 | { | ||
679 | struct ipw_priv *p = (struct ipw_priv *)d->driver_data; | ||
680 | return sprintf(buf, "0x%08x\n", (int)p->config); | ||
681 | } | ||
682 | static DEVICE_ATTR(cfg, S_IRUGO, show_cfg, NULL); | ||
683 | |||
684 | static ssize_t show_nic_type(struct device *d, char *buf) | ||
685 | { | ||
686 | struct ipw_priv *p = (struct ipw_priv *)d->driver_data; | ||
687 | u8 type = p->eeprom[EEPROM_NIC_TYPE]; | ||
688 | |||
689 | switch (type) { | ||
690 | case EEPROM_NIC_TYPE_STANDARD: | ||
691 | return sprintf(buf, "STANDARD\n"); | ||
692 | case EEPROM_NIC_TYPE_DELL: | ||
693 | return sprintf(buf, "DELL\n"); | ||
694 | case EEPROM_NIC_TYPE_FUJITSU: | ||
695 | return sprintf(buf, "FUJITSU\n"); | ||
696 | case EEPROM_NIC_TYPE_IBM: | ||
697 | return sprintf(buf, "IBM\n"); | ||
698 | case EEPROM_NIC_TYPE_HP: | ||
699 | return sprintf(buf, "HP\n"); | ||
700 | } | ||
701 | |||
702 | return sprintf(buf, "UNKNOWN\n"); | ||
703 | } | ||
704 | static DEVICE_ATTR(nic_type, S_IRUGO, show_nic_type, NULL); | ||
705 | |||
706 | static ssize_t dump_error_log(struct device *d, const char *buf, | ||
707 | size_t count) | ||
708 | { | ||
709 | char *p = (char *)buf; | ||
710 | |||
711 | if (p[0] == '1') | ||
712 | ipw_dump_nic_error_log((struct ipw_priv*)d->driver_data); | ||
713 | |||
714 | return strnlen(buf, count); | ||
715 | } | ||
716 | static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, dump_error_log); | ||
717 | |||
718 | static ssize_t dump_event_log(struct device *d, const char *buf, | ||
719 | size_t count) | ||
720 | { | ||
721 | char *p = (char *)buf; | ||
722 | |||
723 | if (p[0] == '1') | ||
724 | ipw_dump_nic_event_log((struct ipw_priv*)d->driver_data); | ||
725 | |||
726 | return strnlen(buf, count); | ||
727 | } | ||
728 | static DEVICE_ATTR(dump_events, S_IWUSR, NULL, dump_event_log); | ||
729 | |||
730 | static ssize_t show_ucode_version(struct device *d, char *buf) | ||
731 | { | ||
732 | u32 len = sizeof(u32), tmp = 0; | ||
733 | struct ipw_priv *p = (struct ipw_priv*)d->driver_data; | ||
734 | |||
735 | if(ipw_get_ordinal(p, IPW_ORD_STAT_UCODE_VERSION, &tmp, &len)) | ||
736 | return 0; | ||
737 | |||
738 | return sprintf(buf, "0x%08x\n", tmp); | ||
739 | } | ||
740 | static DEVICE_ATTR(ucode_version, S_IWUSR|S_IRUGO, show_ucode_version, NULL); | ||
741 | |||
742 | static ssize_t show_rtc(struct device *d, char *buf) | ||
743 | { | ||
744 | u32 len = sizeof(u32), tmp = 0; | ||
745 | struct ipw_priv *p = (struct ipw_priv*)d->driver_data; | ||
746 | |||
747 | if(ipw_get_ordinal(p, IPW_ORD_STAT_RTC, &tmp, &len)) | ||
748 | return 0; | ||
749 | |||
750 | return sprintf(buf, "0x%08x\n", tmp); | ||
751 | } | ||
752 | static DEVICE_ATTR(rtc, S_IWUSR|S_IRUGO, show_rtc, NULL); | ||
753 | |||
754 | /* | ||
755 | * Add a device attribute to view/control the delay between eeprom | ||
756 | * operations. | ||
757 | */ | ||
758 | static ssize_t show_eeprom_delay(struct device *d, char *buf) | ||
759 | { | ||
760 | int n = ((struct ipw_priv*)d->driver_data)->eeprom_delay; | ||
761 | return sprintf(buf, "%i\n", n); | ||
762 | } | ||
763 | static ssize_t store_eeprom_delay(struct device *d, const char *buf, | ||
764 | size_t count) | ||
765 | { | ||
766 | struct ipw_priv *p = (struct ipw_priv*)d->driver_data; | ||
767 | sscanf(buf, "%i", &p->eeprom_delay); | ||
768 | return strnlen(buf, count); | ||
769 | } | ||
770 | static DEVICE_ATTR(eeprom_delay, S_IWUSR|S_IRUGO, | ||
771 | show_eeprom_delay,store_eeprom_delay); | ||
772 | |||
773 | static ssize_t show_command_event_reg(struct device *d, char *buf) | ||
774 | { | ||
775 | u32 reg = 0; | ||
776 | struct ipw_priv *p = (struct ipw_priv *)d->driver_data; | ||
777 | |||
778 | reg = ipw_read_reg32(p, CX2_INTERNAL_CMD_EVENT); | ||
779 | return sprintf(buf, "0x%08x\n", reg); | ||
780 | } | ||
781 | static ssize_t store_command_event_reg(struct device *d, | ||
782 | const char *buf, | ||
783 | size_t count) | ||
784 | { | ||
785 | u32 reg; | ||
786 | struct ipw_priv *p = (struct ipw_priv *)d->driver_data; | ||
787 | |||
788 | sscanf(buf, "%x", ®); | ||
789 | ipw_write_reg32(p, CX2_INTERNAL_CMD_EVENT, reg); | ||
790 | return strnlen(buf, count); | ||
791 | } | ||
792 | static DEVICE_ATTR(command_event_reg, S_IWUSR|S_IRUGO, | ||
793 | show_command_event_reg,store_command_event_reg); | ||
794 | |||
795 | static ssize_t show_mem_gpio_reg(struct device *d, char *buf) | ||
796 | { | ||
797 | u32 reg = 0; | ||
798 | struct ipw_priv *p = (struct ipw_priv *)d->driver_data; | ||
799 | |||
800 | reg = ipw_read_reg32(p, 0x301100); | ||
801 | return sprintf(buf, "0x%08x\n", reg); | ||
802 | } | ||
803 | static ssize_t store_mem_gpio_reg(struct device *d, | ||
804 | const char *buf, | ||
805 | size_t count) | ||
806 | { | ||
807 | u32 reg; | ||
808 | struct ipw_priv *p = (struct ipw_priv *)d->driver_data; | ||
809 | |||
810 | sscanf(buf, "%x", ®); | ||
811 | ipw_write_reg32(p, 0x301100, reg); | ||
812 | return strnlen(buf, count); | ||
813 | } | ||
814 | static DEVICE_ATTR(mem_gpio_reg, S_IWUSR|S_IRUGO, | ||
815 | show_mem_gpio_reg,store_mem_gpio_reg); | ||
816 | |||
817 | static ssize_t show_indirect_dword(struct device *d, char *buf) | ||
818 | { | ||
819 | u32 reg = 0; | ||
820 | struct ipw_priv *priv = (struct ipw_priv *)d->driver_data; | ||
821 | if (priv->status & STATUS_INDIRECT_DWORD) | ||
822 | reg = ipw_read_reg32(priv, priv->indirect_dword); | ||
823 | else | ||
824 | reg = 0; | ||
825 | |||
826 | return sprintf(buf, "0x%08x\n", reg); | ||
827 | } | ||
828 | static ssize_t store_indirect_dword(struct device *d, | ||
829 | const char *buf, | ||
830 | size_t count) | ||
831 | { | ||
832 | struct ipw_priv *priv = (struct ipw_priv *)d->driver_data; | ||
833 | |||
834 | sscanf(buf, "%x", &priv->indirect_dword); | ||
835 | priv->status |= STATUS_INDIRECT_DWORD; | ||
836 | return strnlen(buf, count); | ||
837 | } | ||
838 | static DEVICE_ATTR(indirect_dword, S_IWUSR|S_IRUGO, | ||
839 | show_indirect_dword,store_indirect_dword); | ||
840 | |||
841 | static ssize_t show_indirect_byte(struct device *d, char *buf) | ||
842 | { | ||
843 | u8 reg = 0; | ||
844 | struct ipw_priv *priv = (struct ipw_priv *)d->driver_data; | ||
845 | if (priv->status & STATUS_INDIRECT_BYTE) | ||
846 | reg = ipw_read_reg8(priv, priv->indirect_byte); | ||
847 | else | ||
848 | reg = 0; | ||
849 | |||
850 | return sprintf(buf, "0x%02x\n", reg); | ||
851 | } | ||
852 | static ssize_t store_indirect_byte(struct device *d, | ||
853 | const char *buf, | ||
854 | size_t count) | ||
855 | { | ||
856 | struct ipw_priv *priv = (struct ipw_priv *)d->driver_data; | ||
857 | |||
858 | sscanf(buf, "%x", &priv->indirect_byte); | ||
859 | priv->status |= STATUS_INDIRECT_BYTE; | ||
860 | return strnlen(buf, count); | ||
861 | } | ||
862 | static DEVICE_ATTR(indirect_byte, S_IWUSR|S_IRUGO, | ||
863 | show_indirect_byte, store_indirect_byte); | ||
864 | |||
865 | static ssize_t show_direct_dword(struct device *d, char *buf) | ||
866 | { | ||
867 | u32 reg = 0; | ||
868 | struct ipw_priv *priv = (struct ipw_priv *)d->driver_data; | ||
869 | |||
870 | if (priv->status & STATUS_DIRECT_DWORD) | ||
871 | reg = ipw_read32(priv, priv->direct_dword); | ||
872 | else | ||
873 | reg = 0; | ||
874 | |||
875 | return sprintf(buf, "0x%08x\n", reg); | ||
876 | } | ||
877 | static ssize_t store_direct_dword(struct device *d, | ||
878 | const char *buf, | ||
879 | size_t count) | ||
880 | { | ||
881 | struct ipw_priv *priv = (struct ipw_priv *)d->driver_data; | ||
882 | |||
883 | sscanf(buf, "%x", &priv->direct_dword); | ||
884 | priv->status |= STATUS_DIRECT_DWORD; | ||
885 | return strnlen(buf, count); | ||
886 | } | ||
887 | static DEVICE_ATTR(direct_dword, S_IWUSR|S_IRUGO, | ||
888 | show_direct_dword,store_direct_dword); | ||
889 | |||
890 | |||
891 | static inline int rf_kill_active(struct ipw_priv *priv) | ||
892 | { | ||
893 | if (0 == (ipw_read32(priv, 0x30) & 0x10000)) | ||
894 | priv->status |= STATUS_RF_KILL_HW; | ||
895 | else | ||
896 | priv->status &= ~STATUS_RF_KILL_HW; | ||
897 | |||
898 | return (priv->status & STATUS_RF_KILL_HW) ? 1 : 0; | ||
899 | } | ||
900 | |||
901 | static ssize_t show_rf_kill(struct device *d, char *buf) | ||
902 | { | ||
903 | /* 0 - RF kill not enabled | ||
904 | 1 - SW based RF kill active (sysfs) | ||
905 | 2 - HW based RF kill active | ||
906 | 3 - Both HW and SW baed RF kill active */ | ||
907 | struct ipw_priv *priv = (struct ipw_priv *)d->driver_data; | ||
908 | int val = ((priv->status & STATUS_RF_KILL_SW) ? 0x1 : 0x0) | | ||
909 | (rf_kill_active(priv) ? 0x2 : 0x0); | ||
910 | return sprintf(buf, "%i\n", val); | ||
911 | } | ||
912 | |||
913 | static int ipw_radio_kill_sw(struct ipw_priv *priv, int disable_radio) | ||
914 | { | ||
915 | if ((disable_radio ? 1 : 0) == | ||
916 | (priv->status & STATUS_RF_KILL_SW ? 1 : 0)) | ||
917 | return 0 ; | ||
918 | |||
919 | IPW_DEBUG_RF_KILL("Manual SW RF Kill set to: RADIO %s\n", | ||
920 | disable_radio ? "OFF" : "ON"); | ||
921 | |||
922 | if (disable_radio) { | ||
923 | priv->status |= STATUS_RF_KILL_SW; | ||
924 | |||
925 | if (priv->workqueue) { | ||
926 | cancel_delayed_work(&priv->request_scan); | ||
927 | } | ||
928 | wake_up_interruptible(&priv->wait_command_queue); | ||
929 | queue_work(priv->workqueue, &priv->down); | ||
930 | } else { | ||
931 | priv->status &= ~STATUS_RF_KILL_SW; | ||
932 | if (rf_kill_active(priv)) { | ||
933 | IPW_DEBUG_RF_KILL("Can not turn radio back on - " | ||
934 | "disabled by HW switch\n"); | ||
935 | /* Make sure the RF_KILL check timer is running */ | ||
936 | cancel_delayed_work(&priv->rf_kill); | ||
937 | queue_delayed_work(priv->workqueue, &priv->rf_kill, | ||
938 | 2 * HZ); | ||
939 | } else | ||
940 | queue_work(priv->workqueue, &priv->up); | ||
941 | } | ||
942 | |||
943 | return 1; | ||
944 | } | ||
945 | |||
946 | static ssize_t store_rf_kill(struct device *d, const char *buf, size_t count) | ||
947 | { | ||
948 | struct ipw_priv *priv = (struct ipw_priv *)d->driver_data; | ||
949 | |||
950 | ipw_radio_kill_sw(priv, buf[0] == '1'); | ||
951 | |||
952 | return count; | ||
953 | } | ||
954 | static DEVICE_ATTR(rf_kill, S_IWUSR|S_IRUGO, show_rf_kill, store_rf_kill); | ||
955 | |||
956 | static void ipw_irq_tasklet(struct ipw_priv *priv) | ||
957 | { | ||
958 | u32 inta, inta_mask, handled = 0; | ||
959 | unsigned long flags; | ||
960 | int rc = 0; | ||
961 | |||
962 | spin_lock_irqsave(&priv->lock, flags); | ||
963 | |||
964 | inta = ipw_read32(priv, CX2_INTA_RW); | ||
965 | inta_mask = ipw_read32(priv, CX2_INTA_MASK_R); | ||
966 | inta &= (CX2_INTA_MASK_ALL & inta_mask); | ||
967 | |||
968 | /* Add any cached INTA values that need to be handled */ | ||
969 | inta |= priv->isr_inta; | ||
970 | |||
971 | /* handle all the justifications for the interrupt */ | ||
972 | if (inta & CX2_INTA_BIT_RX_TRANSFER) { | ||
973 | ipw_rx(priv); | ||
974 | handled |= CX2_INTA_BIT_RX_TRANSFER; | ||
975 | } | ||
976 | |||
977 | if (inta & CX2_INTA_BIT_TX_CMD_QUEUE) { | ||
978 | IPW_DEBUG_HC("Command completed.\n"); | ||
979 | rc = ipw_queue_tx_reclaim( priv, &priv->txq_cmd, -1); | ||
980 | priv->status &= ~STATUS_HCMD_ACTIVE; | ||
981 | wake_up_interruptible(&priv->wait_command_queue); | ||
982 | handled |= CX2_INTA_BIT_TX_CMD_QUEUE; | ||
983 | } | ||
984 | |||
985 | if (inta & CX2_INTA_BIT_TX_QUEUE_1) { | ||
986 | IPW_DEBUG_TX("TX_QUEUE_1\n"); | ||
987 | rc = ipw_queue_tx_reclaim( priv, &priv->txq[0], 0); | ||
988 | handled |= CX2_INTA_BIT_TX_QUEUE_1; | ||
989 | } | ||
990 | |||
991 | if (inta & CX2_INTA_BIT_TX_QUEUE_2) { | ||
992 | IPW_DEBUG_TX("TX_QUEUE_2\n"); | ||
993 | rc = ipw_queue_tx_reclaim( priv, &priv->txq[1], 1); | ||
994 | handled |= CX2_INTA_BIT_TX_QUEUE_2; | ||
995 | } | ||
996 | |||
997 | if (inta & CX2_INTA_BIT_TX_QUEUE_3) { | ||
998 | IPW_DEBUG_TX("TX_QUEUE_3\n"); | ||
999 | rc = ipw_queue_tx_reclaim( priv, &priv->txq[2], 2); | ||
1000 | handled |= CX2_INTA_BIT_TX_QUEUE_3; | ||
1001 | } | ||
1002 | |||
1003 | if (inta & CX2_INTA_BIT_TX_QUEUE_4) { | ||
1004 | IPW_DEBUG_TX("TX_QUEUE_4\n"); | ||
1005 | rc = ipw_queue_tx_reclaim( priv, &priv->txq[3], 3); | ||
1006 | handled |= CX2_INTA_BIT_TX_QUEUE_4; | ||
1007 | } | ||
1008 | |||
1009 | if (inta & CX2_INTA_BIT_STATUS_CHANGE) { | ||
1010 | IPW_WARNING("STATUS_CHANGE\n"); | ||
1011 | handled |= CX2_INTA_BIT_STATUS_CHANGE; | ||
1012 | } | ||
1013 | |||
1014 | if (inta & CX2_INTA_BIT_BEACON_PERIOD_EXPIRED) { | ||
1015 | IPW_WARNING("TX_PERIOD_EXPIRED\n"); | ||
1016 | handled |= CX2_INTA_BIT_BEACON_PERIOD_EXPIRED; | ||
1017 | } | ||
1018 | |||
1019 | if (inta & CX2_INTA_BIT_SLAVE_MODE_HOST_CMD_DONE) { | ||
1020 | IPW_WARNING("HOST_CMD_DONE\n"); | ||
1021 | handled |= CX2_INTA_BIT_SLAVE_MODE_HOST_CMD_DONE; | ||
1022 | } | ||
1023 | |||
1024 | if (inta & CX2_INTA_BIT_FW_INITIALIZATION_DONE) { | ||
1025 | IPW_WARNING("FW_INITIALIZATION_DONE\n"); | ||
1026 | handled |= CX2_INTA_BIT_FW_INITIALIZATION_DONE; | ||
1027 | } | ||
1028 | |||
1029 | if (inta & CX2_INTA_BIT_FW_CARD_DISABLE_PHY_OFF_DONE) { | ||
1030 | IPW_WARNING("PHY_OFF_DONE\n"); | ||
1031 | handled |= CX2_INTA_BIT_FW_CARD_DISABLE_PHY_OFF_DONE; | ||
1032 | } | ||
1033 | |||
1034 | if (inta & CX2_INTA_BIT_RF_KILL_DONE) { | ||
1035 | IPW_DEBUG_RF_KILL("RF_KILL_DONE\n"); | ||
1036 | priv->status |= STATUS_RF_KILL_HW; | ||
1037 | wake_up_interruptible(&priv->wait_command_queue); | ||
1038 | netif_carrier_off(priv->net_dev); | ||
1039 | netif_stop_queue(priv->net_dev); | ||
1040 | cancel_delayed_work(&priv->request_scan); | ||
1041 | queue_delayed_work(priv->workqueue, &priv->rf_kill, 2 * HZ); | ||
1042 | handled |= CX2_INTA_BIT_RF_KILL_DONE; | ||
1043 | } | ||
1044 | |||
1045 | if (inta & CX2_INTA_BIT_FATAL_ERROR) { | ||
1046 | IPW_ERROR("Firmware error detected. Restarting.\n"); | ||
1047 | #ifdef CONFIG_IPW_DEBUG | ||
1048 | if (ipw_debug_level & IPW_DL_FW_ERRORS) { | ||
1049 | ipw_dump_nic_error_log(priv); | ||
1050 | ipw_dump_nic_event_log(priv); | ||
1051 | } | ||
1052 | #endif | ||
1053 | queue_work(priv->workqueue, &priv->adapter_restart); | ||
1054 | handled |= CX2_INTA_BIT_FATAL_ERROR; | ||
1055 | } | ||
1056 | |||
1057 | if (inta & CX2_INTA_BIT_PARITY_ERROR) { | ||
1058 | IPW_ERROR("Parity error\n"); | ||
1059 | handled |= CX2_INTA_BIT_PARITY_ERROR; | ||
1060 | } | ||
1061 | |||
1062 | if (handled != inta) { | ||
1063 | IPW_ERROR("Unhandled INTA bits 0x%08x\n", | ||
1064 | inta & ~handled); | ||
1065 | } | ||
1066 | |||
1067 | /* enable all interrupts */ | ||
1068 | ipw_enable_interrupts(priv); | ||
1069 | |||
1070 | spin_unlock_irqrestore(&priv->lock, flags); | ||
1071 | } | ||
1072 | |||
1073 | #ifdef CONFIG_IPW_DEBUG | ||
1074 | #define IPW_CMD(x) case IPW_CMD_ ## x : return #x | ||
1075 | static char *get_cmd_string(u8 cmd) | ||
1076 | { | ||
1077 | switch (cmd) { | ||
1078 | IPW_CMD(HOST_COMPLETE); | ||
1079 | IPW_CMD(POWER_DOWN); | ||
1080 | IPW_CMD(SYSTEM_CONFIG); | ||
1081 | IPW_CMD(MULTICAST_ADDRESS); | ||
1082 | IPW_CMD(SSID); | ||
1083 | IPW_CMD(ADAPTER_ADDRESS); | ||
1084 | IPW_CMD(PORT_TYPE); | ||
1085 | IPW_CMD(RTS_THRESHOLD); | ||
1086 | IPW_CMD(FRAG_THRESHOLD); | ||
1087 | IPW_CMD(POWER_MODE); | ||
1088 | IPW_CMD(WEP_KEY); | ||
1089 | IPW_CMD(TGI_TX_KEY); | ||
1090 | IPW_CMD(SCAN_REQUEST); | ||
1091 | IPW_CMD(SCAN_REQUEST_EXT); | ||
1092 | IPW_CMD(ASSOCIATE); | ||
1093 | IPW_CMD(SUPPORTED_RATES); | ||
1094 | IPW_CMD(SCAN_ABORT); | ||
1095 | IPW_CMD(TX_FLUSH); | ||
1096 | IPW_CMD(QOS_PARAMETERS); | ||
1097 | IPW_CMD(DINO_CONFIG); | ||
1098 | IPW_CMD(RSN_CAPABILITIES); | ||
1099 | IPW_CMD(RX_KEY); | ||
1100 | IPW_CMD(CARD_DISABLE); | ||
1101 | IPW_CMD(SEED_NUMBER); | ||
1102 | IPW_CMD(TX_POWER); | ||
1103 | IPW_CMD(COUNTRY_INFO); | ||
1104 | IPW_CMD(AIRONET_INFO); | ||
1105 | IPW_CMD(AP_TX_POWER); | ||
1106 | IPW_CMD(CCKM_INFO); | ||
1107 | IPW_CMD(CCX_VER_INFO); | ||
1108 | IPW_CMD(SET_CALIBRATION); | ||
1109 | IPW_CMD(SENSITIVITY_CALIB); | ||
1110 | IPW_CMD(RETRY_LIMIT); | ||
1111 | IPW_CMD(IPW_PRE_POWER_DOWN); | ||
1112 | IPW_CMD(VAP_BEACON_TEMPLATE); | ||
1113 | IPW_CMD(VAP_DTIM_PERIOD); | ||
1114 | IPW_CMD(EXT_SUPPORTED_RATES); | ||
1115 | IPW_CMD(VAP_LOCAL_TX_PWR_CONSTRAINT); | ||
1116 | IPW_CMD(VAP_QUIET_INTERVALS); | ||
1117 | IPW_CMD(VAP_CHANNEL_SWITCH); | ||
1118 | IPW_CMD(VAP_MANDATORY_CHANNELS); | ||
1119 | IPW_CMD(VAP_CELL_PWR_LIMIT); | ||
1120 | IPW_CMD(VAP_CF_PARAM_SET); | ||
1121 | IPW_CMD(VAP_SET_BEACONING_STATE); | ||
1122 | IPW_CMD(MEASUREMENT); | ||
1123 | IPW_CMD(POWER_CAPABILITY); | ||
1124 | IPW_CMD(SUPPORTED_CHANNELS); | ||
1125 | IPW_CMD(TPC_REPORT); | ||
1126 | IPW_CMD(WME_INFO); | ||
1127 | IPW_CMD(PRODUCTION_COMMAND); | ||
1128 | default: | ||
1129 | return "UNKNOWN"; | ||
1130 | } | ||
1131 | } | ||
1132 | #endif /* CONFIG_IPW_DEBUG */ | ||
1133 | |||
1134 | #define HOST_COMPLETE_TIMEOUT HZ | ||
1135 | static int ipw_send_cmd(struct ipw_priv *priv, struct host_cmd *cmd) | ||
1136 | { | ||
1137 | int rc = 0; | ||
1138 | |||
1139 | if (priv->status & STATUS_HCMD_ACTIVE) { | ||
1140 | IPW_ERROR("Already sending a command\n"); | ||
1141 | return -1; | ||
1142 | } | ||
1143 | |||
1144 | priv->status |= STATUS_HCMD_ACTIVE; | ||
1145 | |||
1146 | IPW_DEBUG_HC("Sending %s command (#%d), %d bytes\n", | ||
1147 | get_cmd_string(cmd->cmd), cmd->cmd, cmd->len); | ||
1148 | printk_buf(IPW_DL_HOST_COMMAND, (u8*)cmd->param, cmd->len); | ||
1149 | |||
1150 | rc = ipw_queue_tx_hcmd(priv, cmd->cmd, &cmd->param, cmd->len, 0); | ||
1151 | if (rc) | ||
1152 | return rc; | ||
1153 | |||
1154 | rc = wait_event_interruptible_timeout( | ||
1155 | priv->wait_command_queue, !(priv->status & STATUS_HCMD_ACTIVE), | ||
1156 | HOST_COMPLETE_TIMEOUT); | ||
1157 | if (rc == 0) { | ||
1158 | IPW_DEBUG_INFO("Command completion failed out after %dms.\n", | ||
1159 | HOST_COMPLETE_TIMEOUT / (HZ / 1000)); | ||
1160 | priv->status &= ~STATUS_HCMD_ACTIVE; | ||
1161 | return -EIO; | ||
1162 | } | ||
1163 | if (priv->status & STATUS_RF_KILL_MASK) { | ||
1164 | IPW_DEBUG_INFO("Command aborted due to RF Kill Switch\n"); | ||
1165 | return -EIO; | ||
1166 | } | ||
1167 | |||
1168 | return 0; | ||
1169 | } | ||
1170 | |||
1171 | static int ipw_send_host_complete(struct ipw_priv *priv) | ||
1172 | { | ||
1173 | struct host_cmd cmd = { | ||
1174 | .cmd = IPW_CMD_HOST_COMPLETE, | ||
1175 | .len = 0 | ||
1176 | }; | ||
1177 | |||
1178 | if (!priv) { | ||
1179 | IPW_ERROR("Invalid args\n"); | ||
1180 | return -1; | ||
1181 | } | ||
1182 | |||
1183 | if (ipw_send_cmd(priv, &cmd)) { | ||
1184 | IPW_ERROR("failed to send HOST_COMPLETE command\n"); | ||
1185 | return -1; | ||
1186 | } | ||
1187 | |||
1188 | return 0; | ||
1189 | } | ||
1190 | |||
1191 | static int ipw_send_system_config(struct ipw_priv *priv, | ||
1192 | struct ipw_sys_config *config) | ||
1193 | { | ||
1194 | struct host_cmd cmd = { | ||
1195 | .cmd = IPW_CMD_SYSTEM_CONFIG, | ||
1196 | .len = sizeof(*config) | ||
1197 | }; | ||
1198 | |||
1199 | if (!priv || !config) { | ||
1200 | IPW_ERROR("Invalid args\n"); | ||
1201 | return -1; | ||
1202 | } | ||
1203 | |||
1204 | memcpy(&cmd.param,config,sizeof(*config)); | ||
1205 | if (ipw_send_cmd(priv, &cmd)) { | ||
1206 | IPW_ERROR("failed to send SYSTEM_CONFIG command\n"); | ||
1207 | return -1; | ||
1208 | } | ||
1209 | |||
1210 | return 0; | ||
1211 | } | ||
1212 | |||
1213 | static int ipw_send_ssid(struct ipw_priv *priv, u8 *ssid, int len) | ||
1214 | { | ||
1215 | struct host_cmd cmd = { | ||
1216 | .cmd = IPW_CMD_SSID, | ||
1217 | .len = min(len, IW_ESSID_MAX_SIZE) | ||
1218 | }; | ||
1219 | |||
1220 | if (!priv || !ssid) { | ||
1221 | IPW_ERROR("Invalid args\n"); | ||
1222 | return -1; | ||
1223 | } | ||
1224 | |||
1225 | memcpy(&cmd.param, ssid, cmd.len); | ||
1226 | if (ipw_send_cmd(priv, &cmd)) { | ||
1227 | IPW_ERROR("failed to send SSID command\n"); | ||
1228 | return -1; | ||
1229 | } | ||
1230 | |||
1231 | return 0; | ||
1232 | } | ||
1233 | |||
1234 | static int ipw_send_adapter_address(struct ipw_priv *priv, u8 *mac) | ||
1235 | { | ||
1236 | struct host_cmd cmd = { | ||
1237 | .cmd = IPW_CMD_ADAPTER_ADDRESS, | ||
1238 | .len = ETH_ALEN | ||
1239 | }; | ||
1240 | |||
1241 | if (!priv || !mac) { | ||
1242 | IPW_ERROR("Invalid args\n"); | ||
1243 | return -1; | ||
1244 | } | ||
1245 | |||
1246 | IPW_DEBUG_INFO("%s: Setting MAC to " MAC_FMT "\n", | ||
1247 | priv->net_dev->name, MAC_ARG(mac)); | ||
1248 | |||
1249 | memcpy(&cmd.param, mac, ETH_ALEN); | ||
1250 | |||
1251 | if (ipw_send_cmd(priv, &cmd)) { | ||
1252 | IPW_ERROR("failed to send ADAPTER_ADDRESS command\n"); | ||
1253 | return -1; | ||
1254 | } | ||
1255 | |||
1256 | return 0; | ||
1257 | } | ||
1258 | |||
1259 | static void ipw_adapter_restart(void *adapter) | ||
1260 | { | ||
1261 | struct ipw_priv *priv = adapter; | ||
1262 | |||
1263 | if (priv->status & STATUS_RF_KILL_MASK) | ||
1264 | return; | ||
1265 | |||
1266 | ipw_down(priv); | ||
1267 | if (ipw_up(priv)) { | ||
1268 | IPW_ERROR("Failed to up device\n"); | ||
1269 | return; | ||
1270 | } | ||
1271 | } | ||
1272 | |||
1273 | |||
1274 | |||
1275 | |||
1276 | #define IPW_SCAN_CHECK_WATCHDOG (5 * HZ) | ||
1277 | |||
1278 | static void ipw_scan_check(void *data) | ||
1279 | { | ||
1280 | struct ipw_priv *priv = data; | ||
1281 | if (priv->status & (STATUS_SCANNING | STATUS_SCAN_ABORTING)) { | ||
1282 | IPW_DEBUG_SCAN("Scan completion watchdog resetting " | ||
1283 | "adapter (%dms).\n", | ||
1284 | IPW_SCAN_CHECK_WATCHDOG / 100); | ||
1285 | ipw_adapter_restart(priv); | ||
1286 | } | ||
1287 | } | ||
1288 | |||
1289 | static int ipw_send_scan_request_ext(struct ipw_priv *priv, | ||
1290 | struct ipw_scan_request_ext *request) | ||
1291 | { | ||
1292 | struct host_cmd cmd = { | ||
1293 | .cmd = IPW_CMD_SCAN_REQUEST_EXT, | ||
1294 | .len = sizeof(*request) | ||
1295 | }; | ||
1296 | |||
1297 | if (!priv || !request) { | ||
1298 | IPW_ERROR("Invalid args\n"); | ||
1299 | return -1; | ||
1300 | } | ||
1301 | |||
1302 | memcpy(&cmd.param,request,sizeof(*request)); | ||
1303 | if (ipw_send_cmd(priv, &cmd)) { | ||
1304 | IPW_ERROR("failed to send SCAN_REQUEST_EXT command\n"); | ||
1305 | return -1; | ||
1306 | } | ||
1307 | |||
1308 | queue_delayed_work(priv->workqueue, &priv->scan_check, | ||
1309 | IPW_SCAN_CHECK_WATCHDOG); | ||
1310 | return 0; | ||
1311 | } | ||
1312 | |||
1313 | static int ipw_send_scan_abort(struct ipw_priv *priv) | ||
1314 | { | ||
1315 | struct host_cmd cmd = { | ||
1316 | .cmd = IPW_CMD_SCAN_ABORT, | ||
1317 | .len = 0 | ||
1318 | }; | ||
1319 | |||
1320 | if (!priv) { | ||
1321 | IPW_ERROR("Invalid args\n"); | ||
1322 | return -1; | ||
1323 | } | ||
1324 | |||
1325 | if (ipw_send_cmd(priv, &cmd)) { | ||
1326 | IPW_ERROR("failed to send SCAN_ABORT command\n"); | ||
1327 | return -1; | ||
1328 | } | ||
1329 | |||
1330 | return 0; | ||
1331 | } | ||
1332 | |||
1333 | static int ipw_set_sensitivity(struct ipw_priv *priv, u16 sens) | ||
1334 | { | ||
1335 | struct host_cmd cmd = { | ||
1336 | .cmd = IPW_CMD_SENSITIVITY_CALIB, | ||
1337 | .len = sizeof(struct ipw_sensitivity_calib) | ||
1338 | }; | ||
1339 | struct ipw_sensitivity_calib *calib = (struct ipw_sensitivity_calib *) | ||
1340 | &cmd.param; | ||
1341 | calib->beacon_rssi_raw = sens; | ||
1342 | if (ipw_send_cmd(priv, &cmd)) { | ||
1343 | IPW_ERROR("failed to send SENSITIVITY CALIB command\n"); | ||
1344 | return -1; | ||
1345 | } | ||
1346 | |||
1347 | return 0; | ||
1348 | } | ||
1349 | |||
1350 | static int ipw_send_associate(struct ipw_priv *priv, | ||
1351 | struct ipw_associate *associate) | ||
1352 | { | ||
1353 | struct host_cmd cmd = { | ||
1354 | .cmd = IPW_CMD_ASSOCIATE, | ||
1355 | .len = sizeof(*associate) | ||
1356 | }; | ||
1357 | |||
1358 | if (!priv || !associate) { | ||
1359 | IPW_ERROR("Invalid args\n"); | ||
1360 | return -1; | ||
1361 | } | ||
1362 | |||
1363 | memcpy(&cmd.param,associate,sizeof(*associate)); | ||
1364 | if (ipw_send_cmd(priv, &cmd)) { | ||
1365 | IPW_ERROR("failed to send ASSOCIATE command\n"); | ||
1366 | return -1; | ||
1367 | } | ||
1368 | |||
1369 | return 0; | ||
1370 | } | ||
1371 | |||
1372 | static int ipw_send_supported_rates(struct ipw_priv *priv, | ||
1373 | struct ipw_supported_rates *rates) | ||
1374 | { | ||
1375 | struct host_cmd cmd = { | ||
1376 | .cmd = IPW_CMD_SUPPORTED_RATES, | ||
1377 | .len = sizeof(*rates) | ||
1378 | }; | ||
1379 | |||
1380 | if (!priv || !rates) { | ||
1381 | IPW_ERROR("Invalid args\n"); | ||
1382 | return -1; | ||
1383 | } | ||
1384 | |||
1385 | memcpy(&cmd.param,rates,sizeof(*rates)); | ||
1386 | if (ipw_send_cmd(priv, &cmd)) { | ||
1387 | IPW_ERROR("failed to send SUPPORTED_RATES command\n"); | ||
1388 | return -1; | ||
1389 | } | ||
1390 | |||
1391 | return 0; | ||
1392 | } | ||
1393 | |||
1394 | static int ipw_set_random_seed(struct ipw_priv *priv) | ||
1395 | { | ||
1396 | struct host_cmd cmd = { | ||
1397 | .cmd = IPW_CMD_SEED_NUMBER, | ||
1398 | .len = sizeof(u32) | ||
1399 | }; | ||
1400 | |||
1401 | if (!priv) { | ||
1402 | IPW_ERROR("Invalid args\n"); | ||
1403 | return -1; | ||
1404 | } | ||
1405 | |||
1406 | get_random_bytes(&cmd.param, sizeof(u32)); | ||
1407 | |||
1408 | if (ipw_send_cmd(priv, &cmd)) { | ||
1409 | IPW_ERROR("failed to send SEED_NUMBER command\n"); | ||
1410 | return -1; | ||
1411 | } | ||
1412 | |||
1413 | return 0; | ||
1414 | } | ||
1415 | |||
1416 | #if 0 | ||
1417 | static int ipw_send_card_disable(struct ipw_priv *priv, u32 phy_off) | ||
1418 | { | ||
1419 | struct host_cmd cmd = { | ||
1420 | .cmd = IPW_CMD_CARD_DISABLE, | ||
1421 | .len = sizeof(u32) | ||
1422 | }; | ||
1423 | |||
1424 | if (!priv) { | ||
1425 | IPW_ERROR("Invalid args\n"); | ||
1426 | return -1; | ||
1427 | } | ||
1428 | |||
1429 | *((u32*)&cmd.param) = phy_off; | ||
1430 | |||
1431 | if (ipw_send_cmd(priv, &cmd)) { | ||
1432 | IPW_ERROR("failed to send CARD_DISABLE command\n"); | ||
1433 | return -1; | ||
1434 | } | ||
1435 | |||
1436 | return 0; | ||
1437 | } | ||
1438 | #endif | ||
1439 | |||
1440 | static int ipw_send_tx_power(struct ipw_priv *priv, | ||
1441 | struct ipw_tx_power *power) | ||
1442 | { | ||
1443 | struct host_cmd cmd = { | ||
1444 | .cmd = IPW_CMD_TX_POWER, | ||
1445 | .len = sizeof(*power) | ||
1446 | }; | ||
1447 | |||
1448 | if (!priv || !power) { | ||
1449 | IPW_ERROR("Invalid args\n"); | ||
1450 | return -1; | ||
1451 | } | ||
1452 | |||
1453 | memcpy(&cmd.param,power,sizeof(*power)); | ||
1454 | if (ipw_send_cmd(priv, &cmd)) { | ||
1455 | IPW_ERROR("failed to send TX_POWER command\n"); | ||
1456 | return -1; | ||
1457 | } | ||
1458 | |||
1459 | return 0; | ||
1460 | } | ||
1461 | |||
1462 | static int ipw_send_rts_threshold(struct ipw_priv *priv, u16 rts) | ||
1463 | { | ||
1464 | struct ipw_rts_threshold rts_threshold = { | ||
1465 | .rts_threshold = rts, | ||
1466 | }; | ||
1467 | struct host_cmd cmd = { | ||
1468 | .cmd = IPW_CMD_RTS_THRESHOLD, | ||
1469 | .len = sizeof(rts_threshold) | ||
1470 | }; | ||
1471 | |||
1472 | if (!priv) { | ||
1473 | IPW_ERROR("Invalid args\n"); | ||
1474 | return -1; | ||
1475 | } | ||
1476 | |||
1477 | memcpy(&cmd.param, &rts_threshold, sizeof(rts_threshold)); | ||
1478 | if (ipw_send_cmd(priv, &cmd)) { | ||
1479 | IPW_ERROR("failed to send RTS_THRESHOLD command\n"); | ||
1480 | return -1; | ||
1481 | } | ||
1482 | |||
1483 | return 0; | ||
1484 | } | ||
1485 | |||
1486 | static int ipw_send_frag_threshold(struct ipw_priv *priv, u16 frag) | ||
1487 | { | ||
1488 | struct ipw_frag_threshold frag_threshold = { | ||
1489 | .frag_threshold = frag, | ||
1490 | }; | ||
1491 | struct host_cmd cmd = { | ||
1492 | .cmd = IPW_CMD_FRAG_THRESHOLD, | ||
1493 | .len = sizeof(frag_threshold) | ||
1494 | }; | ||
1495 | |||
1496 | if (!priv) { | ||
1497 | IPW_ERROR("Invalid args\n"); | ||
1498 | return -1; | ||
1499 | } | ||
1500 | |||
1501 | memcpy(&cmd.param, &frag_threshold, sizeof(frag_threshold)); | ||
1502 | if (ipw_send_cmd(priv, &cmd)) { | ||
1503 | IPW_ERROR("failed to send FRAG_THRESHOLD command\n"); | ||
1504 | return -1; | ||
1505 | } | ||
1506 | |||
1507 | return 0; | ||
1508 | } | ||
1509 | |||
1510 | static int ipw_send_power_mode(struct ipw_priv *priv, u32 mode) | ||
1511 | { | ||
1512 | struct host_cmd cmd = { | ||
1513 | .cmd = IPW_CMD_POWER_MODE, | ||
1514 | .len = sizeof(u32) | ||
1515 | }; | ||
1516 | u32 *param = (u32*)(&cmd.param); | ||
1517 | |||
1518 | if (!priv) { | ||
1519 | IPW_ERROR("Invalid args\n"); | ||
1520 | return -1; | ||
1521 | } | ||
1522 | |||
1523 | /* If on battery, set to 3, if AC set to CAM, else user | ||
1524 | * level */ | ||
1525 | switch (mode) { | ||
1526 | case IPW_POWER_BATTERY: | ||
1527 | *param = IPW_POWER_INDEX_3; | ||
1528 | break; | ||
1529 | case IPW_POWER_AC: | ||
1530 | *param = IPW_POWER_MODE_CAM; | ||
1531 | break; | ||
1532 | default: | ||
1533 | *param = mode; | ||
1534 | break; | ||
1535 | } | ||
1536 | |||
1537 | if (ipw_send_cmd(priv, &cmd)) { | ||
1538 | IPW_ERROR("failed to send POWER_MODE command\n"); | ||
1539 | return -1; | ||
1540 | } | ||
1541 | |||
1542 | return 0; | ||
1543 | } | ||
1544 | |||
1545 | /* | ||
1546 | * The IPW device contains a Microwire compatible EEPROM that stores | ||
1547 | * various data like the MAC address. Usually the firmware has exclusive | ||
1548 | * access to the eeprom, but during device initialization (before the | ||
1549 | * device driver has sent the HostComplete command to the firmware) the | ||
1550 | * device driver has read access to the EEPROM by way of indirect addressing | ||
1551 | * through a couple of memory mapped registers. | ||
1552 | * | ||
1553 | * The following is a simplified implementation for pulling data out of the | ||
1554 | * the eeprom, along with some helper functions to find information in | ||
1555 | * the per device private data's copy of the eeprom. | ||
1556 | * | ||
1557 | * NOTE: To better understand how these functions work (i.e what is a chip | ||
1558 | * select and why do have to keep driving the eeprom clock?), read | ||
1559 | * just about any data sheet for a Microwire compatible EEPROM. | ||
1560 | */ | ||
1561 | |||
1562 | /* write a 32 bit value into the indirect accessor register */ | ||
1563 | static inline void eeprom_write_reg(struct ipw_priv *p, u32 data) | ||
1564 | { | ||
1565 | ipw_write_reg32(p, FW_MEM_REG_EEPROM_ACCESS, data); | ||
1566 | |||
1567 | /* the eeprom requires some time to complete the operation */ | ||
1568 | udelay(p->eeprom_delay); | ||
1569 | |||
1570 | return; | ||
1571 | } | ||
1572 | |||
1573 | /* perform a chip select operation */ | ||
1574 | static inline void eeprom_cs(struct ipw_priv* priv) | ||
1575 | { | ||
1576 | eeprom_write_reg(priv,0); | ||
1577 | eeprom_write_reg(priv,EEPROM_BIT_CS); | ||
1578 | eeprom_write_reg(priv,EEPROM_BIT_CS|EEPROM_BIT_SK); | ||
1579 | eeprom_write_reg(priv,EEPROM_BIT_CS); | ||
1580 | } | ||
1581 | |||
1582 | /* perform a chip select operation */ | ||
1583 | static inline void eeprom_disable_cs(struct ipw_priv* priv) | ||
1584 | { | ||
1585 | eeprom_write_reg(priv,EEPROM_BIT_CS); | ||
1586 | eeprom_write_reg(priv,0); | ||
1587 | eeprom_write_reg(priv,EEPROM_BIT_SK); | ||
1588 | } | ||
1589 | |||
1590 | /* push a single bit down to the eeprom */ | ||
1591 | static inline void eeprom_write_bit(struct ipw_priv *p,u8 bit) | ||
1592 | { | ||
1593 | int d = ( bit ? EEPROM_BIT_DI : 0); | ||
1594 | eeprom_write_reg(p,EEPROM_BIT_CS|d); | ||
1595 | eeprom_write_reg(p,EEPROM_BIT_CS|d|EEPROM_BIT_SK); | ||
1596 | } | ||
1597 | |||
1598 | /* push an opcode followed by an address down to the eeprom */ | ||
1599 | static void eeprom_op(struct ipw_priv* priv, u8 op, u8 addr) | ||
1600 | { | ||
1601 | int i; | ||
1602 | |||
1603 | eeprom_cs(priv); | ||
1604 | eeprom_write_bit(priv,1); | ||
1605 | eeprom_write_bit(priv,op&2); | ||
1606 | eeprom_write_bit(priv,op&1); | ||
1607 | for ( i=7; i>=0; i-- ) { | ||
1608 | eeprom_write_bit(priv,addr&(1<<i)); | ||
1609 | } | ||
1610 | } | ||
1611 | |||
1612 | /* pull 16 bits off the eeprom, one bit at a time */ | ||
1613 | static u16 eeprom_read_u16(struct ipw_priv* priv, u8 addr) | ||
1614 | { | ||
1615 | int i; | ||
1616 | u16 r=0; | ||
1617 | |||
1618 | /* Send READ Opcode */ | ||
1619 | eeprom_op(priv,EEPROM_CMD_READ,addr); | ||
1620 | |||
1621 | /* Send dummy bit */ | ||
1622 | eeprom_write_reg(priv,EEPROM_BIT_CS); | ||
1623 | |||
1624 | /* Read the byte off the eeprom one bit at a time */ | ||
1625 | for ( i=0; i<16; i++ ) { | ||
1626 | u32 data = 0; | ||
1627 | eeprom_write_reg(priv,EEPROM_BIT_CS|EEPROM_BIT_SK); | ||
1628 | eeprom_write_reg(priv,EEPROM_BIT_CS); | ||
1629 | data = ipw_read_reg32(priv,FW_MEM_REG_EEPROM_ACCESS); | ||
1630 | r = (r<<1) | ((data & EEPROM_BIT_DO)?1:0); | ||
1631 | } | ||
1632 | |||
1633 | /* Send another dummy bit */ | ||
1634 | eeprom_write_reg(priv,0); | ||
1635 | eeprom_disable_cs(priv); | ||
1636 | |||
1637 | return r; | ||
1638 | } | ||
1639 | |||
1640 | /* helper function for pulling the mac address out of the private */ | ||
1641 | /* data's copy of the eeprom data */ | ||
1642 | static void eeprom_parse_mac(struct ipw_priv* priv, u8* mac) | ||
1643 | { | ||
1644 | u8* ee = (u8*)priv->eeprom; | ||
1645 | memcpy(mac, &ee[EEPROM_MAC_ADDRESS], 6); | ||
1646 | } | ||
1647 | |||
1648 | /* | ||
1649 | * Either the device driver (i.e. the host) or the firmware can | ||
1650 | * load eeprom data into the designated region in SRAM. If neither | ||
1651 | * happens then the FW will shutdown with a fatal error. | ||
1652 | * | ||
1653 | * In order to signal the FW to load the EEPROM, the EEPROM_LOAD_DISABLE | ||
1654 | * bit needs region of shared SRAM needs to be non-zero. | ||
1655 | */ | ||
1656 | static void ipw_eeprom_init_sram(struct ipw_priv *priv) | ||
1657 | { | ||
1658 | int i; | ||
1659 | u16 *eeprom = (u16 *)priv->eeprom; | ||
1660 | |||
1661 | IPW_DEBUG_TRACE(">>\n"); | ||
1662 | |||
1663 | /* read entire contents of eeprom into private buffer */ | ||
1664 | for ( i=0; i<128; i++ ) | ||
1665 | eeprom[i] = eeprom_read_u16(priv,(u8)i); | ||
1666 | |||
1667 | /* | ||
1668 | If the data looks correct, then copy it to our private | ||
1669 | copy. Otherwise let the firmware know to perform the operation | ||
1670 | on it's own | ||
1671 | */ | ||
1672 | if ((priv->eeprom + EEPROM_VERSION) != 0) { | ||
1673 | IPW_DEBUG_INFO("Writing EEPROM data into SRAM\n"); | ||
1674 | |||
1675 | /* write the eeprom data to sram */ | ||
1676 | for( i=0; i<CX2_EEPROM_IMAGE_SIZE; i++ ) | ||
1677 | ipw_write8(priv, IPW_EEPROM_DATA + i, | ||
1678 | priv->eeprom[i]); | ||
1679 | |||
1680 | /* Do not load eeprom data on fatal error or suspend */ | ||
1681 | ipw_write32(priv, IPW_EEPROM_LOAD_DISABLE, 0); | ||
1682 | } else { | ||
1683 | IPW_DEBUG_INFO("Enabling FW initializationg of SRAM\n"); | ||
1684 | |||
1685 | /* Load eeprom data on fatal error or suspend */ | ||
1686 | ipw_write32(priv, IPW_EEPROM_LOAD_DISABLE, 1); | ||
1687 | } | ||
1688 | |||
1689 | IPW_DEBUG_TRACE("<<\n"); | ||
1690 | } | ||
1691 | |||
1692 | |||
1693 | static inline void ipw_zero_memory(struct ipw_priv *priv, u32 start, u32 count) | ||
1694 | { | ||
1695 | count >>= 2; | ||
1696 | if (!count) return; | ||
1697 | _ipw_write32(priv, CX2_AUTOINC_ADDR, start); | ||
1698 | while (count--) | ||
1699 | _ipw_write32(priv, CX2_AUTOINC_DATA, 0); | ||
1700 | } | ||
1701 | |||
1702 | static inline void ipw_fw_dma_reset_command_blocks(struct ipw_priv *priv) | ||
1703 | { | ||
1704 | ipw_zero_memory(priv, CX2_SHARED_SRAM_DMA_CONTROL, | ||
1705 | CB_NUMBER_OF_ELEMENTS_SMALL * | ||
1706 | sizeof(struct command_block)); | ||
1707 | } | ||
1708 | |||
1709 | static int ipw_fw_dma_enable(struct ipw_priv *priv) | ||
1710 | { /* start dma engine but no transfers yet*/ | ||
1711 | |||
1712 | IPW_DEBUG_FW(">> : \n"); | ||
1713 | |||
1714 | /* Start the dma */ | ||
1715 | ipw_fw_dma_reset_command_blocks(priv); | ||
1716 | |||
1717 | /* Write CB base address */ | ||
1718 | ipw_write_reg32(priv, CX2_DMA_I_CB_BASE, CX2_SHARED_SRAM_DMA_CONTROL); | ||
1719 | |||
1720 | IPW_DEBUG_FW("<< : \n"); | ||
1721 | return 0; | ||
1722 | } | ||
1723 | |||
1724 | static void ipw_fw_dma_abort(struct ipw_priv *priv) | ||
1725 | { | ||
1726 | u32 control = 0; | ||
1727 | |||
1728 | IPW_DEBUG_FW(">> :\n"); | ||
1729 | |||
1730 | //set the Stop and Abort bit | ||
1731 | control = DMA_CONTROL_SMALL_CB_CONST_VALUE | DMA_CB_STOP_AND_ABORT; | ||
1732 | ipw_write_reg32(priv, CX2_DMA_I_DMA_CONTROL, control); | ||
1733 | priv->sram_desc.last_cb_index = 0; | ||
1734 | |||
1735 | IPW_DEBUG_FW("<< \n"); | ||
1736 | } | ||
1737 | |||
1738 | static int ipw_fw_dma_write_command_block(struct ipw_priv *priv, int index, struct command_block *cb) | ||
1739 | { | ||
1740 | u32 address = CX2_SHARED_SRAM_DMA_CONTROL + (sizeof(struct command_block) * index); | ||
1741 | IPW_DEBUG_FW(">> :\n"); | ||
1742 | |||
1743 | ipw_write_indirect(priv, address, (u8*)cb, sizeof(struct command_block)); | ||
1744 | |||
1745 | IPW_DEBUG_FW("<< :\n"); | ||
1746 | return 0; | ||
1747 | |||
1748 | } | ||
1749 | |||
1750 | static int ipw_fw_dma_kick(struct ipw_priv *priv) | ||
1751 | { | ||
1752 | u32 control = 0; | ||
1753 | u32 index=0; | ||
1754 | |||
1755 | IPW_DEBUG_FW(">> :\n"); | ||
1756 | |||
1757 | for (index = 0; index < priv->sram_desc.last_cb_index; index++) | ||
1758 | ipw_fw_dma_write_command_block(priv, index, &priv->sram_desc.cb_list[index]); | ||
1759 | |||
1760 | /* Enable the DMA in the CSR register */ | ||
1761 | ipw_clear_bit(priv, CX2_RESET_REG,CX2_RESET_REG_MASTER_DISABLED | CX2_RESET_REG_STOP_MASTER); | ||
1762 | |||
1763 | /* Set the Start bit. */ | ||
1764 | control = DMA_CONTROL_SMALL_CB_CONST_VALUE | DMA_CB_START; | ||
1765 | ipw_write_reg32(priv, CX2_DMA_I_DMA_CONTROL, control); | ||
1766 | |||
1767 | IPW_DEBUG_FW("<< :\n"); | ||
1768 | return 0; | ||
1769 | } | ||
1770 | |||
1771 | static void ipw_fw_dma_dump_command_block(struct ipw_priv *priv) | ||
1772 | { | ||
1773 | u32 address; | ||
1774 | u32 register_value=0; | ||
1775 | u32 cb_fields_address=0; | ||
1776 | |||
1777 | IPW_DEBUG_FW(">> :\n"); | ||
1778 | address = ipw_read_reg32(priv,CX2_DMA_I_CURRENT_CB); | ||
1779 | IPW_DEBUG_FW_INFO("Current CB is 0x%x \n",address); | ||
1780 | |||
1781 | /* Read the DMA Controlor register */ | ||
1782 | register_value = ipw_read_reg32(priv, CX2_DMA_I_DMA_CONTROL); | ||
1783 | IPW_DEBUG_FW_INFO("CX2_DMA_I_DMA_CONTROL is 0x%x \n",register_value); | ||
1784 | |||
1785 | /* Print the CB values*/ | ||
1786 | cb_fields_address = address; | ||
1787 | register_value = ipw_read_reg32(priv, cb_fields_address); | ||
1788 | IPW_DEBUG_FW_INFO("Current CB ControlField is 0x%x \n",register_value); | ||
1789 | |||
1790 | cb_fields_address += sizeof(u32); | ||
1791 | register_value = ipw_read_reg32(priv, cb_fields_address); | ||
1792 | IPW_DEBUG_FW_INFO("Current CB Source Field is 0x%x \n",register_value); | ||
1793 | |||
1794 | cb_fields_address += sizeof(u32); | ||
1795 | register_value = ipw_read_reg32(priv, cb_fields_address); | ||
1796 | IPW_DEBUG_FW_INFO("Current CB Destination Field is 0x%x \n", | ||
1797 | register_value); | ||
1798 | |||
1799 | cb_fields_address += sizeof(u32); | ||
1800 | register_value = ipw_read_reg32(priv, cb_fields_address); | ||
1801 | IPW_DEBUG_FW_INFO("Current CB Status Field is 0x%x \n",register_value); | ||
1802 | |||
1803 | IPW_DEBUG_FW(">> :\n"); | ||
1804 | } | ||
1805 | |||
1806 | static int ipw_fw_dma_command_block_index(struct ipw_priv *priv) | ||
1807 | { | ||
1808 | u32 current_cb_address = 0; | ||
1809 | u32 current_cb_index = 0; | ||
1810 | |||
1811 | IPW_DEBUG_FW("<< :\n"); | ||
1812 | current_cb_address= ipw_read_reg32(priv, CX2_DMA_I_CURRENT_CB); | ||
1813 | |||
1814 | current_cb_index = (current_cb_address - CX2_SHARED_SRAM_DMA_CONTROL )/ | ||
1815 | sizeof (struct command_block); | ||
1816 | |||
1817 | IPW_DEBUG_FW_INFO("Current CB index 0x%x address = 0x%X \n", | ||
1818 | current_cb_index, current_cb_address ); | ||
1819 | |||
1820 | IPW_DEBUG_FW(">> :\n"); | ||
1821 | return current_cb_index; | ||
1822 | |||
1823 | } | ||
1824 | |||
1825 | static int ipw_fw_dma_add_command_block(struct ipw_priv *priv, | ||
1826 | u32 src_address, | ||
1827 | u32 dest_address, | ||
1828 | u32 length, | ||
1829 | int interrupt_enabled, | ||
1830 | int is_last) | ||
1831 | { | ||
1832 | |||
1833 | u32 control = CB_VALID | CB_SRC_LE | CB_DEST_LE | CB_SRC_AUTOINC | | ||
1834 | CB_SRC_IO_GATED | CB_DEST_AUTOINC | CB_SRC_SIZE_LONG | | ||
1835 | CB_DEST_SIZE_LONG; | ||
1836 | struct command_block *cb; | ||
1837 | u32 last_cb_element=0; | ||
1838 | |||
1839 | IPW_DEBUG_FW_INFO("src_address=0x%x dest_address=0x%x length=0x%x\n", | ||
1840 | src_address, dest_address, length); | ||
1841 | |||
1842 | if (priv->sram_desc.last_cb_index >= CB_NUMBER_OF_ELEMENTS_SMALL) | ||
1843 | return -1; | ||
1844 | |||
1845 | last_cb_element = priv->sram_desc.last_cb_index; | ||
1846 | cb = &priv->sram_desc.cb_list[last_cb_element]; | ||
1847 | priv->sram_desc.last_cb_index++; | ||
1848 | |||
1849 | /* Calculate the new CB control word */ | ||
1850 | if (interrupt_enabled ) | ||
1851 | control |= CB_INT_ENABLED; | ||
1852 | |||
1853 | if (is_last) | ||
1854 | control |= CB_LAST_VALID; | ||
1855 | |||
1856 | control |= length; | ||
1857 | |||
1858 | /* Calculate the CB Element's checksum value */ | ||
1859 | cb->status = control ^src_address ^dest_address; | ||
1860 | |||
1861 | /* Copy the Source and Destination addresses */ | ||
1862 | cb->dest_addr = dest_address; | ||
1863 | cb->source_addr = src_address; | ||
1864 | |||
1865 | /* Copy the Control Word last */ | ||
1866 | cb->control = control; | ||
1867 | |||
1868 | return 0; | ||
1869 | } | ||
1870 | |||
1871 | static int ipw_fw_dma_add_buffer(struct ipw_priv *priv, | ||
1872 | u32 src_phys, | ||
1873 | u32 dest_address, | ||
1874 | u32 length) | ||
1875 | { | ||
1876 | u32 bytes_left = length; | ||
1877 | u32 src_offset=0; | ||
1878 | u32 dest_offset=0; | ||
1879 | int status = 0; | ||
1880 | IPW_DEBUG_FW(">> \n"); | ||
1881 | IPW_DEBUG_FW_INFO("src_phys=0x%x dest_address=0x%x length=0x%x\n", | ||
1882 | src_phys, dest_address, length); | ||
1883 | while (bytes_left > CB_MAX_LENGTH) { | ||
1884 | status = ipw_fw_dma_add_command_block( priv, | ||
1885 | src_phys + src_offset, | ||
1886 | dest_address + dest_offset, | ||
1887 | CB_MAX_LENGTH, 0, 0); | ||
1888 | if (status) { | ||
1889 | IPW_DEBUG_FW_INFO(": Failed\n"); | ||
1890 | return -1; | ||
1891 | } else | ||
1892 | IPW_DEBUG_FW_INFO(": Added new cb\n"); | ||
1893 | |||
1894 | src_offset += CB_MAX_LENGTH; | ||
1895 | dest_offset += CB_MAX_LENGTH; | ||
1896 | bytes_left -= CB_MAX_LENGTH; | ||
1897 | } | ||
1898 | |||
1899 | /* add the buffer tail */ | ||
1900 | if (bytes_left > 0) { | ||
1901 | status = ipw_fw_dma_add_command_block( | ||
1902 | priv, src_phys + src_offset, | ||
1903 | dest_address + dest_offset, | ||
1904 | bytes_left, 0, 0); | ||
1905 | if (status) { | ||
1906 | IPW_DEBUG_FW_INFO(": Failed on the buffer tail\n"); | ||
1907 | return -1; | ||
1908 | } else | ||
1909 | IPW_DEBUG_FW_INFO(": Adding new cb - the buffer tail\n"); | ||
1910 | } | ||
1911 | |||
1912 | |||
1913 | IPW_DEBUG_FW("<< \n"); | ||
1914 | return 0; | ||
1915 | } | ||
1916 | |||
1917 | static int ipw_fw_dma_wait(struct ipw_priv *priv) | ||
1918 | { | ||
1919 | u32 current_index = 0; | ||
1920 | u32 watchdog = 0; | ||
1921 | |||
1922 | IPW_DEBUG_FW(">> : \n"); | ||
1923 | |||
1924 | current_index = ipw_fw_dma_command_block_index(priv); | ||
1925 | IPW_DEBUG_FW_INFO("sram_desc.last_cb_index:0x%8X\n", | ||
1926 | (int) priv->sram_desc.last_cb_index); | ||
1927 | |||
1928 | while (current_index < priv->sram_desc.last_cb_index) { | ||
1929 | udelay(50); | ||
1930 | current_index = ipw_fw_dma_command_block_index(priv); | ||
1931 | |||
1932 | watchdog++; | ||
1933 | |||
1934 | if (watchdog > 400) { | ||
1935 | IPW_DEBUG_FW_INFO("Timeout\n"); | ||
1936 | ipw_fw_dma_dump_command_block(priv); | ||
1937 | ipw_fw_dma_abort(priv); | ||
1938 | return -1; | ||
1939 | } | ||
1940 | } | ||
1941 | |||
1942 | ipw_fw_dma_abort(priv); | ||
1943 | |||
1944 | /*Disable the DMA in the CSR register*/ | ||
1945 | ipw_set_bit(priv, CX2_RESET_REG, | ||
1946 | CX2_RESET_REG_MASTER_DISABLED | CX2_RESET_REG_STOP_MASTER); | ||
1947 | |||
1948 | IPW_DEBUG_FW("<< dmaWaitSync \n"); | ||
1949 | return 0; | ||
1950 | } | ||
1951 | |||
1952 | static void ipw_remove_current_network(struct ipw_priv *priv) | ||
1953 | { | ||
1954 | struct list_head *element, *safe; | ||
1955 | struct ieee80211_network *network = NULL; | ||
1956 | list_for_each_safe(element, safe, &priv->ieee->network_list) { | ||
1957 | network = list_entry(element, struct ieee80211_network, list); | ||
1958 | if (!memcmp(network->bssid, priv->bssid, ETH_ALEN)) { | ||
1959 | list_del(element); | ||
1960 | list_add_tail(&network->list, | ||
1961 | &priv->ieee->network_free_list); | ||
1962 | } | ||
1963 | } | ||
1964 | } | ||
1965 | |||
1966 | /** | ||
1967 | * Check that card is still alive. | ||
1968 | * Reads debug register from domain0. | ||
1969 | * If card is present, pre-defined value should | ||
1970 | * be found there. | ||
1971 | * | ||
1972 | * @param priv | ||
1973 | * @return 1 if card is present, 0 otherwise | ||
1974 | */ | ||
1975 | static inline int ipw_alive(struct ipw_priv *priv) | ||
1976 | { | ||
1977 | return ipw_read32(priv, 0x90) == 0xd55555d5; | ||
1978 | } | ||
1979 | |||
1980 | static inline int ipw_poll_bit(struct ipw_priv *priv, u32 addr, u32 mask, | ||
1981 | int timeout) | ||
1982 | { | ||
1983 | int i = 0; | ||
1984 | |||
1985 | do { | ||
1986 | if ((ipw_read32(priv, addr) & mask) == mask) | ||
1987 | return i; | ||
1988 | mdelay(10); | ||
1989 | i += 10; | ||
1990 | } while (i < timeout); | ||
1991 | |||
1992 | return -ETIME; | ||
1993 | } | ||
1994 | |||
1995 | /* These functions load the firmware and micro code for the operation of | ||
1996 | * the ipw hardware. It assumes the buffer has all the bits for the | ||
1997 | * image and the caller is handling the memory allocation and clean up. | ||
1998 | */ | ||
1999 | |||
2000 | |||
2001 | static int ipw_stop_master(struct ipw_priv * priv) | ||
2002 | { | ||
2003 | int rc; | ||
2004 | |||
2005 | IPW_DEBUG_TRACE(">> \n"); | ||
2006 | /* stop master. typical delay - 0 */ | ||
2007 | ipw_set_bit(priv, CX2_RESET_REG, CX2_RESET_REG_STOP_MASTER); | ||
2008 | |||
2009 | rc = ipw_poll_bit(priv, CX2_RESET_REG, | ||
2010 | CX2_RESET_REG_MASTER_DISABLED, 100); | ||
2011 | if (rc < 0) { | ||
2012 | IPW_ERROR("stop master failed in 10ms\n"); | ||
2013 | return -1; | ||
2014 | } | ||
2015 | |||
2016 | IPW_DEBUG_INFO("stop master %dms\n", rc); | ||
2017 | |||
2018 | return rc; | ||
2019 | } | ||
2020 | |||
2021 | static void ipw_arc_release(struct ipw_priv *priv) | ||
2022 | { | ||
2023 | IPW_DEBUG_TRACE(">> \n"); | ||
2024 | mdelay(5); | ||
2025 | |||
2026 | ipw_clear_bit(priv, CX2_RESET_REG, CBD_RESET_REG_PRINCETON_RESET); | ||
2027 | |||
2028 | /* no one knows timing, for safety add some delay */ | ||
2029 | mdelay(5); | ||
2030 | } | ||
2031 | |||
2032 | struct fw_header { | ||
2033 | u32 version; | ||
2034 | u32 mode; | ||
2035 | }; | ||
2036 | |||
2037 | struct fw_chunk { | ||
2038 | u32 address; | ||
2039 | u32 length; | ||
2040 | }; | ||
2041 | |||
2042 | #define IPW_FW_MAJOR_VERSION 2 | ||
2043 | #define IPW_FW_MINOR_VERSION 2 | ||
2044 | |||
2045 | #define IPW_FW_MINOR(x) ((x & 0xff) >> 8) | ||
2046 | #define IPW_FW_MAJOR(x) (x & 0xff) | ||
2047 | |||
2048 | #define IPW_FW_VERSION ((IPW_FW_MINOR_VERSION << 8) | \ | ||
2049 | IPW_FW_MAJOR_VERSION) | ||
2050 | |||
2051 | #define IPW_FW_PREFIX "ipw-" __stringify(IPW_FW_MAJOR_VERSION) \ | ||
2052 | "." __stringify(IPW_FW_MINOR_VERSION) "-" | ||
2053 | |||
2054 | #if IPW_FW_MAJOR_VERSION >= 2 && IPW_FW_MINOR_VERSION > 0 | ||
2055 | #define IPW_FW_NAME(x) IPW_FW_PREFIX "" x ".fw" | ||
2056 | #else | ||
2057 | #define IPW_FW_NAME(x) "ipw2200_" x ".fw" | ||
2058 | #endif | ||
2059 | |||
2060 | static int ipw_load_ucode(struct ipw_priv *priv, u8 * data, | ||
2061 | size_t len) | ||
2062 | { | ||
2063 | int rc = 0, i, addr; | ||
2064 | u8 cr = 0; | ||
2065 | u16 *image; | ||
2066 | |||
2067 | image = (u16 *)data; | ||
2068 | |||
2069 | IPW_DEBUG_TRACE(">> \n"); | ||
2070 | |||
2071 | rc = ipw_stop_master(priv); | ||
2072 | |||
2073 | if (rc < 0) | ||
2074 | return rc; | ||
2075 | |||
2076 | // spin_lock_irqsave(&priv->lock, flags); | ||
2077 | |||
2078 | for (addr = CX2_SHARED_LOWER_BOUND; | ||
2079 | addr < CX2_REGISTER_DOMAIN1_END; addr += 4) { | ||
2080 | ipw_write32(priv, addr, 0); | ||
2081 | } | ||
2082 | |||
2083 | /* no ucode (yet) */ | ||
2084 | memset(&priv->dino_alive, 0, sizeof(priv->dino_alive)); | ||
2085 | /* destroy DMA queues */ | ||
2086 | /* reset sequence */ | ||
2087 | |||
2088 | ipw_write_reg32(priv, CX2_MEM_HALT_AND_RESET ,CX2_BIT_HALT_RESET_ON); | ||
2089 | ipw_arc_release(priv); | ||
2090 | ipw_write_reg32(priv, CX2_MEM_HALT_AND_RESET, CX2_BIT_HALT_RESET_OFF); | ||
2091 | mdelay(1); | ||
2092 | |||
2093 | /* reset PHY */ | ||
2094 | ipw_write_reg32(priv, CX2_INTERNAL_CMD_EVENT, CX2_BASEBAND_POWER_DOWN); | ||
2095 | mdelay(1); | ||
2096 | |||
2097 | ipw_write_reg32(priv, CX2_INTERNAL_CMD_EVENT, 0); | ||
2098 | mdelay(1); | ||
2099 | |||
2100 | /* enable ucode store */ | ||
2101 | ipw_write_reg8(priv, DINO_CONTROL_REG, 0x0); | ||
2102 | ipw_write_reg8(priv, DINO_CONTROL_REG, DINO_ENABLE_CS); | ||
2103 | mdelay(1); | ||
2104 | |||
2105 | /* write ucode */ | ||
2106 | /** | ||
2107 | * @bug | ||
2108 | * Do NOT set indirect address register once and then | ||
2109 | * store data to indirect data register in the loop. | ||
2110 | * It seems very reasonable, but in this case DINO do not | ||
2111 | * accept ucode. It is essential to set address each time. | ||
2112 | */ | ||
2113 | /* load new ipw uCode */ | ||
2114 | for (i = 0; i < len / 2; i++) | ||
2115 | ipw_write_reg16(priv, CX2_BASEBAND_CONTROL_STORE, image[i]); | ||
2116 | |||
2117 | |||
2118 | /* enable DINO */ | ||
2119 | ipw_write_reg8(priv, CX2_BASEBAND_CONTROL_STATUS, 0); | ||
2120 | ipw_write_reg8(priv, CX2_BASEBAND_CONTROL_STATUS, | ||
2121 | DINO_ENABLE_SYSTEM ); | ||
2122 | |||
2123 | /* this is where the igx / win driver deveates from the VAP driver.*/ | ||
2124 | |||
2125 | /* wait for alive response */ | ||
2126 | for (i = 0; i < 100; i++) { | ||
2127 | /* poll for incoming data */ | ||
2128 | cr = ipw_read_reg8(priv, CX2_BASEBAND_CONTROL_STATUS); | ||
2129 | if (cr & DINO_RXFIFO_DATA) | ||
2130 | break; | ||
2131 | mdelay(1); | ||
2132 | } | ||
2133 | |||
2134 | if (cr & DINO_RXFIFO_DATA) { | ||
2135 | /* alive_command_responce size is NOT multiple of 4 */ | ||
2136 | u32 response_buffer[(sizeof(priv->dino_alive) + 3) / 4]; | ||
2137 | |||
2138 | for (i = 0; i < ARRAY_SIZE(response_buffer); i++) | ||
2139 | response_buffer[i] = | ||
2140 | ipw_read_reg32(priv, | ||
2141 | CX2_BASEBAND_RX_FIFO_READ); | ||
2142 | memcpy(&priv->dino_alive, response_buffer, | ||
2143 | sizeof(priv->dino_alive)); | ||
2144 | if (priv->dino_alive.alive_command == 1 | ||
2145 | && priv->dino_alive.ucode_valid == 1) { | ||
2146 | rc = 0; | ||
2147 | IPW_DEBUG_INFO( | ||
2148 | "Microcode OK, rev. %d (0x%x) dev. %d (0x%x) " | ||
2149 | "of %02d/%02d/%02d %02d:%02d\n", | ||
2150 | priv->dino_alive.software_revision, | ||
2151 | priv->dino_alive.software_revision, | ||
2152 | priv->dino_alive.device_identifier, | ||
2153 | priv->dino_alive.device_identifier, | ||
2154 | priv->dino_alive.time_stamp[0], | ||
2155 | priv->dino_alive.time_stamp[1], | ||
2156 | priv->dino_alive.time_stamp[2], | ||
2157 | priv->dino_alive.time_stamp[3], | ||
2158 | priv->dino_alive.time_stamp[4]); | ||
2159 | } else { | ||
2160 | IPW_DEBUG_INFO("Microcode is not alive\n"); | ||
2161 | rc = -EINVAL; | ||
2162 | } | ||
2163 | } else { | ||
2164 | IPW_DEBUG_INFO("No alive response from DINO\n"); | ||
2165 | rc = -ETIME; | ||
2166 | } | ||
2167 | |||
2168 | /* disable DINO, otherwise for some reason | ||
2169 | firmware have problem getting alive resp. */ | ||
2170 | ipw_write_reg8(priv, CX2_BASEBAND_CONTROL_STATUS, 0); | ||
2171 | |||
2172 | // spin_unlock_irqrestore(&priv->lock, flags); | ||
2173 | |||
2174 | return rc; | ||
2175 | } | ||
2176 | |||
2177 | static int ipw_load_firmware(struct ipw_priv *priv, u8 * data, | ||
2178 | size_t len) | ||
2179 | { | ||
2180 | int rc = -1; | ||
2181 | int offset = 0; | ||
2182 | struct fw_chunk *chunk; | ||
2183 | dma_addr_t shared_phys; | ||
2184 | u8 *shared_virt; | ||
2185 | |||
2186 | IPW_DEBUG_TRACE("<< : \n"); | ||
2187 | shared_virt = pci_alloc_consistent(priv->pci_dev, len, &shared_phys); | ||
2188 | |||
2189 | if (!shared_virt) | ||
2190 | return -ENOMEM; | ||
2191 | |||
2192 | memmove(shared_virt, data, len); | ||
2193 | |||
2194 | /* Start the Dma */ | ||
2195 | rc = ipw_fw_dma_enable(priv); | ||
2196 | |||
2197 | if (priv->sram_desc.last_cb_index > 0) { | ||
2198 | /* the DMA is already ready this would be a bug. */ | ||
2199 | BUG(); | ||
2200 | goto out; | ||
2201 | } | ||
2202 | |||
2203 | do { | ||
2204 | chunk = (struct fw_chunk *)(data + offset); | ||
2205 | offset += sizeof(struct fw_chunk); | ||
2206 | /* build DMA packet and queue up for sending */ | ||
2207 | /* dma to chunk->address, the chunk->length bytes from data + | ||
2208 | * offeset*/ | ||
2209 | /* Dma loading */ | ||
2210 | rc = ipw_fw_dma_add_buffer(priv, shared_phys + offset, | ||
2211 | chunk->address, chunk->length); | ||
2212 | if (rc) { | ||
2213 | IPW_DEBUG_INFO("dmaAddBuffer Failed\n"); | ||
2214 | goto out; | ||
2215 | } | ||
2216 | |||
2217 | offset += chunk->length; | ||
2218 | } while (offset < len); | ||
2219 | |||
2220 | /* Run the DMA and wait for the answer*/ | ||
2221 | rc = ipw_fw_dma_kick(priv); | ||
2222 | if (rc) { | ||
2223 | IPW_ERROR("dmaKick Failed\n"); | ||
2224 | goto out; | ||
2225 | } | ||
2226 | |||
2227 | rc = ipw_fw_dma_wait(priv); | ||
2228 | if (rc) { | ||
2229 | IPW_ERROR("dmaWaitSync Failed\n"); | ||
2230 | goto out; | ||
2231 | } | ||
2232 | out: | ||
2233 | pci_free_consistent( priv->pci_dev, len, shared_virt, shared_phys); | ||
2234 | return rc; | ||
2235 | } | ||
2236 | |||
2237 | /* stop nic */ | ||
2238 | static int ipw_stop_nic(struct ipw_priv *priv) | ||
2239 | { | ||
2240 | int rc = 0; | ||
2241 | |||
2242 | /* stop*/ | ||
2243 | ipw_write32(priv, CX2_RESET_REG, CX2_RESET_REG_STOP_MASTER); | ||
2244 | |||
2245 | rc = ipw_poll_bit(priv, CX2_RESET_REG, | ||
2246 | CX2_RESET_REG_MASTER_DISABLED, 500); | ||
2247 | if (rc < 0) { | ||
2248 | IPW_ERROR("wait for reg master disabled failed\n"); | ||
2249 | return rc; | ||
2250 | } | ||
2251 | |||
2252 | ipw_set_bit(priv, CX2_RESET_REG, CBD_RESET_REG_PRINCETON_RESET); | ||
2253 | |||
2254 | return rc; | ||
2255 | } | ||
2256 | |||
2257 | static void ipw_start_nic(struct ipw_priv *priv) | ||
2258 | { | ||
2259 | IPW_DEBUG_TRACE(">>\n"); | ||
2260 | |||
2261 | /* prvHwStartNic release ARC*/ | ||
2262 | ipw_clear_bit(priv, CX2_RESET_REG, | ||
2263 | CX2_RESET_REG_MASTER_DISABLED | | ||
2264 | CX2_RESET_REG_STOP_MASTER | | ||
2265 | CBD_RESET_REG_PRINCETON_RESET); | ||
2266 | |||
2267 | /* enable power management */ | ||
2268 | ipw_set_bit(priv, CX2_GP_CNTRL_RW, CX2_GP_CNTRL_BIT_HOST_ALLOWS_STANDBY); | ||
2269 | |||
2270 | IPW_DEBUG_TRACE("<<\n"); | ||
2271 | } | ||
2272 | |||
2273 | static int ipw_init_nic(struct ipw_priv *priv) | ||
2274 | { | ||
2275 | int rc; | ||
2276 | |||
2277 | IPW_DEBUG_TRACE(">>\n"); | ||
2278 | /* reset */ | ||
2279 | /*prvHwInitNic */ | ||
2280 | /* set "initialization complete" bit to move adapter to D0 state */ | ||
2281 | ipw_set_bit(priv, CX2_GP_CNTRL_RW, CX2_GP_CNTRL_BIT_INIT_DONE); | ||
2282 | |||
2283 | /* low-level PLL activation */ | ||
2284 | ipw_write32(priv, CX2_READ_INT_REGISTER, CX2_BIT_INT_HOST_SRAM_READ_INT_REGISTER); | ||
2285 | |||
2286 | /* wait for clock stabilization */ | ||
2287 | rc = ipw_poll_bit(priv, CX2_GP_CNTRL_RW, | ||
2288 | CX2_GP_CNTRL_BIT_CLOCK_READY, 250); | ||
2289 | if (rc < 0 ) | ||
2290 | IPW_DEBUG_INFO("FAILED wait for clock stablization\n"); | ||
2291 | |||
2292 | /* assert SW reset */ | ||
2293 | ipw_set_bit(priv, CX2_RESET_REG, CX2_RESET_REG_SW_RESET); | ||
2294 | |||
2295 | udelay(10); | ||
2296 | |||
2297 | /* set "initialization complete" bit to move adapter to D0 state */ | ||
2298 | ipw_set_bit(priv, CX2_GP_CNTRL_RW, CX2_GP_CNTRL_BIT_INIT_DONE); | ||
2299 | |||
2300 | IPW_DEBUG_TRACE(">>\n"); | ||
2301 | return 0; | ||
2302 | } | ||
2303 | |||
2304 | |||
2305 | /* Call this function from process context, it will sleep in request_firmware. | ||
2306 | * Probe is an ok place to call this from. | ||
2307 | */ | ||
2308 | static int ipw_reset_nic(struct ipw_priv *priv) | ||
2309 | { | ||
2310 | int rc = 0; | ||
2311 | |||
2312 | IPW_DEBUG_TRACE(">>\n"); | ||
2313 | |||
2314 | rc = ipw_init_nic(priv); | ||
2315 | |||
2316 | /* Clear the 'host command active' bit... */ | ||
2317 | priv->status &= ~STATUS_HCMD_ACTIVE; | ||
2318 | wake_up_interruptible(&priv->wait_command_queue); | ||
2319 | |||
2320 | IPW_DEBUG_TRACE("<<\n"); | ||
2321 | return rc; | ||
2322 | } | ||
2323 | |||
2324 | static int ipw_get_fw(struct ipw_priv *priv, | ||
2325 | const struct firmware **fw, const char *name) | ||
2326 | { | ||
2327 | struct fw_header *header; | ||
2328 | int rc; | ||
2329 | |||
2330 | /* ask firmware_class module to get the boot firmware off disk */ | ||
2331 | rc = request_firmware(fw, name, &priv->pci_dev->dev); | ||
2332 | if (rc < 0) { | ||
2333 | IPW_ERROR("%s load failed: Reason %d\n", name, rc); | ||
2334 | return rc; | ||
2335 | } | ||
2336 | |||
2337 | header = (struct fw_header *)(*fw)->data; | ||
2338 | if (IPW_FW_MAJOR(header->version) != IPW_FW_MAJOR_VERSION) { | ||
2339 | IPW_ERROR("'%s' firmware version not compatible (%d != %d)\n", | ||
2340 | name, | ||
2341 | IPW_FW_MAJOR(header->version), IPW_FW_MAJOR_VERSION); | ||
2342 | return -EINVAL; | ||
2343 | } | ||
2344 | |||
2345 | IPW_DEBUG_INFO("Loading firmware '%s' file v%d.%d (%d bytes)\n", | ||
2346 | name, | ||
2347 | IPW_FW_MAJOR(header->version), | ||
2348 | IPW_FW_MINOR(header->version), | ||
2349 | (*fw)->size - sizeof(struct fw_header)); | ||
2350 | return 0; | ||
2351 | } | ||
2352 | |||
2353 | #define CX2_RX_BUF_SIZE (3000) | ||
2354 | |||
2355 | static inline void ipw_rx_queue_reset(struct ipw_priv *priv, | ||
2356 | struct ipw_rx_queue *rxq) | ||
2357 | { | ||
2358 | unsigned long flags; | ||
2359 | int i; | ||
2360 | |||
2361 | spin_lock_irqsave(&rxq->lock, flags); | ||
2362 | |||
2363 | INIT_LIST_HEAD(&rxq->rx_free); | ||
2364 | INIT_LIST_HEAD(&rxq->rx_used); | ||
2365 | |||
2366 | /* Fill the rx_used queue with _all_ of the Rx buffers */ | ||
2367 | for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) { | ||
2368 | /* In the reset function, these buffers may have been allocated | ||
2369 | * to an SKB, so we need to unmap and free potential storage */ | ||
2370 | if (rxq->pool[i].skb != NULL) { | ||
2371 | pci_unmap_single(priv->pci_dev, rxq->pool[i].dma_addr, | ||
2372 | CX2_RX_BUF_SIZE, | ||
2373 | PCI_DMA_FROMDEVICE); | ||
2374 | dev_kfree_skb(rxq->pool[i].skb); | ||
2375 | } | ||
2376 | list_add_tail(&rxq->pool[i].list, &rxq->rx_used); | ||
2377 | } | ||
2378 | |||
2379 | /* Set us so that we have processed and used all buffers, but have | ||
2380 | * not restocked the Rx queue with fresh buffers */ | ||
2381 | rxq->read = rxq->write = 0; | ||
2382 | rxq->processed = RX_QUEUE_SIZE - 1; | ||
2383 | rxq->free_count = 0; | ||
2384 | spin_unlock_irqrestore(&rxq->lock, flags); | ||
2385 | } | ||
2386 | |||
2387 | #ifdef CONFIG_PM | ||
2388 | static int fw_loaded = 0; | ||
2389 | static const struct firmware *bootfw = NULL; | ||
2390 | static const struct firmware *firmware = NULL; | ||
2391 | static const struct firmware *ucode = NULL; | ||
2392 | #endif | ||
2393 | |||
2394 | static int ipw_load(struct ipw_priv *priv) | ||
2395 | { | ||
2396 | #ifndef CONFIG_PM | ||
2397 | const struct firmware *bootfw = NULL; | ||
2398 | const struct firmware *firmware = NULL; | ||
2399 | const struct firmware *ucode = NULL; | ||
2400 | #endif | ||
2401 | int rc = 0, retries = 3; | ||
2402 | |||
2403 | #ifdef CONFIG_PM | ||
2404 | if (!fw_loaded) { | ||
2405 | #endif | ||
2406 | rc = ipw_get_fw(priv, &bootfw, IPW_FW_NAME("boot")); | ||
2407 | if (rc) | ||
2408 | goto error; | ||
2409 | |||
2410 | switch (priv->ieee->iw_mode) { | ||
2411 | case IW_MODE_ADHOC: | ||
2412 | rc = ipw_get_fw(priv, &ucode, | ||
2413 | IPW_FW_NAME("ibss_ucode")); | ||
2414 | if (rc) | ||
2415 | goto error; | ||
2416 | |||
2417 | rc = ipw_get_fw(priv, &firmware, IPW_FW_NAME("ibss")); | ||
2418 | break; | ||
2419 | |||
2420 | #ifdef CONFIG_IPW_PROMISC | ||
2421 | case IW_MODE_MONITOR: | ||
2422 | rc = ipw_get_fw(priv, &ucode, | ||
2423 | IPW_FW_NAME("ibss_ucode")); | ||
2424 | if (rc) | ||
2425 | goto error; | ||
2426 | |||
2427 | rc = ipw_get_fw(priv, &firmware, IPW_FW_NAME("sniffer")); | ||
2428 | break; | ||
2429 | #endif | ||
2430 | case IW_MODE_INFRA: | ||
2431 | rc = ipw_get_fw(priv, &ucode, | ||
2432 | IPW_FW_NAME("bss_ucode")); | ||
2433 | if (rc) | ||
2434 | goto error; | ||
2435 | |||
2436 | rc = ipw_get_fw(priv, &firmware, IPW_FW_NAME("bss")); | ||
2437 | break; | ||
2438 | |||
2439 | default: | ||
2440 | rc = -EINVAL; | ||
2441 | } | ||
2442 | |||
2443 | if (rc) | ||
2444 | goto error; | ||
2445 | |||
2446 | #ifdef CONFIG_PM | ||
2447 | fw_loaded = 1; | ||
2448 | } | ||
2449 | #endif | ||
2450 | |||
2451 | if (!priv->rxq) | ||
2452 | priv->rxq = ipw_rx_queue_alloc(priv); | ||
2453 | else | ||
2454 | ipw_rx_queue_reset(priv, priv->rxq); | ||
2455 | if (!priv->rxq) { | ||
2456 | IPW_ERROR("Unable to initialize Rx queue\n"); | ||
2457 | goto error; | ||
2458 | } | ||
2459 | |||
2460 | retry: | ||
2461 | /* Ensure interrupts are disabled */ | ||
2462 | ipw_write32(priv, CX2_INTA_MASK_R, ~CX2_INTA_MASK_ALL); | ||
2463 | priv->status &= ~STATUS_INT_ENABLED; | ||
2464 | |||
2465 | /* ack pending interrupts */ | ||
2466 | ipw_write32(priv, CX2_INTA_RW, CX2_INTA_MASK_ALL); | ||
2467 | |||
2468 | ipw_stop_nic(priv); | ||
2469 | |||
2470 | rc = ipw_reset_nic(priv); | ||
2471 | if (rc) { | ||
2472 | IPW_ERROR("Unable to reset NIC\n"); | ||
2473 | goto error; | ||
2474 | } | ||
2475 | |||
2476 | ipw_zero_memory(priv, CX2_NIC_SRAM_LOWER_BOUND, | ||
2477 | CX2_NIC_SRAM_UPPER_BOUND - CX2_NIC_SRAM_LOWER_BOUND); | ||
2478 | |||
2479 | /* DMA the initial boot firmware into the device */ | ||
2480 | rc = ipw_load_firmware(priv, bootfw->data + sizeof(struct fw_header), | ||
2481 | bootfw->size - sizeof(struct fw_header)); | ||
2482 | if (rc < 0) { | ||
2483 | IPW_ERROR("Unable to load boot firmware\n"); | ||
2484 | goto error; | ||
2485 | } | ||
2486 | |||
2487 | /* kick start the device */ | ||
2488 | ipw_start_nic(priv); | ||
2489 | |||
2490 | /* wait for the device to finish it's initial startup sequence */ | ||
2491 | rc = ipw_poll_bit(priv, CX2_INTA_RW, | ||
2492 | CX2_INTA_BIT_FW_INITIALIZATION_DONE, 500); | ||
2493 | if (rc < 0) { | ||
2494 | IPW_ERROR("device failed to boot initial fw image\n"); | ||
2495 | goto error; | ||
2496 | } | ||
2497 | IPW_DEBUG_INFO("initial device response after %dms\n", rc); | ||
2498 | |||
2499 | /* ack fw init done interrupt */ | ||
2500 | ipw_write32(priv, CX2_INTA_RW, CX2_INTA_BIT_FW_INITIALIZATION_DONE); | ||
2501 | |||
2502 | /* DMA the ucode into the device */ | ||
2503 | rc = ipw_load_ucode(priv, ucode->data + sizeof(struct fw_header), | ||
2504 | ucode->size - sizeof(struct fw_header)); | ||
2505 | if (rc < 0) { | ||
2506 | IPW_ERROR("Unable to load ucode\n"); | ||
2507 | goto error; | ||
2508 | } | ||
2509 | |||
2510 | /* stop nic */ | ||
2511 | ipw_stop_nic(priv); | ||
2512 | |||
2513 | /* DMA bss firmware into the device */ | ||
2514 | rc = ipw_load_firmware(priv, firmware->data + | ||
2515 | sizeof(struct fw_header), | ||
2516 | firmware->size - sizeof(struct fw_header)); | ||
2517 | if (rc < 0 ) { | ||
2518 | IPW_ERROR("Unable to load firmware\n"); | ||
2519 | goto error; | ||
2520 | } | ||
2521 | |||
2522 | ipw_write32(priv, IPW_EEPROM_LOAD_DISABLE, 0); | ||
2523 | |||
2524 | rc = ipw_queue_reset(priv); | ||
2525 | if (rc) { | ||
2526 | IPW_ERROR("Unable to initialize queues\n"); | ||
2527 | goto error; | ||
2528 | } | ||
2529 | |||
2530 | /* Ensure interrupts are disabled */ | ||
2531 | ipw_write32(priv, CX2_INTA_MASK_R, ~CX2_INTA_MASK_ALL); | ||
2532 | |||
2533 | /* kick start the device */ | ||
2534 | ipw_start_nic(priv); | ||
2535 | |||
2536 | if (ipw_read32(priv, CX2_INTA_RW) & CX2_INTA_BIT_PARITY_ERROR) { | ||
2537 | if (retries > 0) { | ||
2538 | IPW_WARNING("Parity error. Retrying init.\n"); | ||
2539 | retries--; | ||
2540 | goto retry; | ||
2541 | } | ||
2542 | |||
2543 | IPW_ERROR("TODO: Handle parity error -- schedule restart?\n"); | ||
2544 | rc = -EIO; | ||
2545 | goto error; | ||
2546 | } | ||
2547 | |||
2548 | /* wait for the device */ | ||
2549 | rc = ipw_poll_bit(priv, CX2_INTA_RW, | ||
2550 | CX2_INTA_BIT_FW_INITIALIZATION_DONE, 500); | ||
2551 | if (rc < 0) { | ||
2552 | IPW_ERROR("device failed to start after 500ms\n"); | ||
2553 | goto error; | ||
2554 | } | ||
2555 | IPW_DEBUG_INFO("device response after %dms\n", rc); | ||
2556 | |||
2557 | /* ack fw init done interrupt */ | ||
2558 | ipw_write32(priv, CX2_INTA_RW, CX2_INTA_BIT_FW_INITIALIZATION_DONE); | ||
2559 | |||
2560 | /* read eeprom data and initialize the eeprom region of sram */ | ||
2561 | priv->eeprom_delay = 1; | ||
2562 | ipw_eeprom_init_sram(priv); | ||
2563 | |||
2564 | /* enable interrupts */ | ||
2565 | ipw_enable_interrupts(priv); | ||
2566 | |||
2567 | /* Ensure our queue has valid packets */ | ||
2568 | ipw_rx_queue_replenish(priv); | ||
2569 | |||
2570 | ipw_write32(priv, CX2_RX_READ_INDEX, priv->rxq->read); | ||
2571 | |||
2572 | /* ack pending interrupts */ | ||
2573 | ipw_write32(priv, CX2_INTA_RW, CX2_INTA_MASK_ALL); | ||
2574 | |||
2575 | #ifndef CONFIG_PM | ||
2576 | release_firmware(bootfw); | ||
2577 | release_firmware(ucode); | ||
2578 | release_firmware(firmware); | ||
2579 | #endif | ||
2580 | return 0; | ||
2581 | |||
2582 | error: | ||
2583 | if (priv->rxq) { | ||
2584 | ipw_rx_queue_free(priv, priv->rxq); | ||
2585 | priv->rxq = NULL; | ||
2586 | } | ||
2587 | ipw_tx_queue_free(priv); | ||
2588 | if (bootfw) | ||
2589 | release_firmware(bootfw); | ||
2590 | if (ucode) | ||
2591 | release_firmware(ucode); | ||
2592 | if (firmware) | ||
2593 | release_firmware(firmware); | ||
2594 | #ifdef CONFIG_PM | ||
2595 | fw_loaded = 0; | ||
2596 | bootfw = ucode = firmware = NULL; | ||
2597 | #endif | ||
2598 | |||
2599 | return rc; | ||
2600 | } | ||
2601 | |||
2602 | /** | ||
2603 | * DMA services | ||
2604 | * | ||
2605 | * Theory of operation | ||
2606 | * | ||
2607 | * A queue is a circular buffers with 'Read' and 'Write' pointers. | ||
2608 | * 2 empty entries always kept in the buffer to protect from overflow. | ||
2609 | * | ||
2610 | * For Tx queue, there are low mark and high mark limits. If, after queuing | ||
2611 | * the packet for Tx, free space become < low mark, Tx queue stopped. When | ||
2612 | * reclaiming packets (on 'tx done IRQ), if free space become > high mark, | ||
2613 | * Tx queue resumed. | ||
2614 | * | ||
2615 | * The IPW operates with six queues, one receive queue in the device's | ||
2616 | * sram, one transmit queue for sending commands to the device firmware, | ||
2617 | * and four transmit queues for data. | ||
2618 | * | ||
2619 | * The four transmit queues allow for performing quality of service (qos) | ||
2620 | * transmissions as per the 802.11 protocol. Currently Linux does not | ||
2621 | * provide a mechanism to the user for utilizing prioritized queues, so | ||
2622 | * we only utilize the first data transmit queue (queue1). | ||
2623 | */ | ||
2624 | |||
2625 | /** | ||
2626 | * Driver allocates buffers of this size for Rx | ||
2627 | */ | ||
2628 | |||
2629 | static inline int ipw_queue_space(const struct clx2_queue *q) | ||
2630 | { | ||
2631 | int s = q->last_used - q->first_empty; | ||
2632 | if (s <= 0) | ||
2633 | s += q->n_bd; | ||
2634 | s -= 2; /* keep some reserve to not confuse empty and full situations */ | ||
2635 | if (s < 0) | ||
2636 | s = 0; | ||
2637 | return s; | ||
2638 | } | ||
2639 | |||
2640 | static inline int ipw_queue_inc_wrap(int index, int n_bd) | ||
2641 | { | ||
2642 | return (++index == n_bd) ? 0 : index; | ||
2643 | } | ||
2644 | |||
2645 | /** | ||
2646 | * Initialize common DMA queue structure | ||
2647 | * | ||
2648 | * @param q queue to init | ||
2649 | * @param count Number of BD's to allocate. Should be power of 2 | ||
2650 | * @param read_register Address for 'read' register | ||
2651 | * (not offset within BAR, full address) | ||
2652 | * @param write_register Address for 'write' register | ||
2653 | * (not offset within BAR, full address) | ||
2654 | * @param base_register Address for 'base' register | ||
2655 | * (not offset within BAR, full address) | ||
2656 | * @param size Address for 'size' register | ||
2657 | * (not offset within BAR, full address) | ||
2658 | */ | ||
2659 | static void ipw_queue_init(struct ipw_priv *priv, struct clx2_queue *q, | ||
2660 | int count, u32 read, u32 write, | ||
2661 | u32 base, u32 size) | ||
2662 | { | ||
2663 | q->n_bd = count; | ||
2664 | |||
2665 | q->low_mark = q->n_bd / 4; | ||
2666 | if (q->low_mark < 4) | ||
2667 | q->low_mark = 4; | ||
2668 | |||
2669 | q->high_mark = q->n_bd / 8; | ||
2670 | if (q->high_mark < 2) | ||
2671 | q->high_mark = 2; | ||
2672 | |||
2673 | q->first_empty = q->last_used = 0; | ||
2674 | q->reg_r = read; | ||
2675 | q->reg_w = write; | ||
2676 | |||
2677 | ipw_write32(priv, base, q->dma_addr); | ||
2678 | ipw_write32(priv, size, count); | ||
2679 | ipw_write32(priv, read, 0); | ||
2680 | ipw_write32(priv, write, 0); | ||
2681 | |||
2682 | _ipw_read32(priv, 0x90); | ||
2683 | } | ||
2684 | |||
2685 | static int ipw_queue_tx_init(struct ipw_priv *priv, | ||
2686 | struct clx2_tx_queue *q, | ||
2687 | int count, u32 read, u32 write, | ||
2688 | u32 base, u32 size) | ||
2689 | { | ||
2690 | struct pci_dev *dev = priv->pci_dev; | ||
2691 | |||
2692 | q->txb = kmalloc(sizeof(q->txb[0]) * count, GFP_KERNEL); | ||
2693 | if (!q->txb) { | ||
2694 | IPW_ERROR("vmalloc for auxilary BD structures failed\n"); | ||
2695 | return -ENOMEM; | ||
2696 | } | ||
2697 | |||
2698 | q->bd = pci_alloc_consistent(dev,sizeof(q->bd[0])*count, &q->q.dma_addr); | ||
2699 | if (!q->bd) { | ||
2700 | IPW_ERROR("pci_alloc_consistent(%d) failed\n", | ||
2701 | sizeof(q->bd[0]) * count); | ||
2702 | kfree(q->txb); | ||
2703 | q->txb = NULL; | ||
2704 | return -ENOMEM; | ||
2705 | } | ||
2706 | |||
2707 | ipw_queue_init(priv, &q->q, count, read, write, base, size); | ||
2708 | return 0; | ||
2709 | } | ||
2710 | |||
2711 | /** | ||
2712 | * Free one TFD, those at index [txq->q.last_used]. | ||
2713 | * Do NOT advance any indexes | ||
2714 | * | ||
2715 | * @param dev | ||
2716 | * @param txq | ||
2717 | */ | ||
2718 | static void ipw_queue_tx_free_tfd(struct ipw_priv *priv, | ||
2719 | struct clx2_tx_queue *txq) | ||
2720 | { | ||
2721 | struct tfd_frame *bd = &txq->bd[txq->q.last_used]; | ||
2722 | struct pci_dev *dev = priv->pci_dev; | ||
2723 | int i; | ||
2724 | |||
2725 | /* classify bd */ | ||
2726 | if (bd->control_flags.message_type == TX_HOST_COMMAND_TYPE) | ||
2727 | /* nothing to cleanup after for host commands */ | ||
2728 | return; | ||
2729 | |||
2730 | /* sanity check */ | ||
2731 | if (bd->u.data.num_chunks > NUM_TFD_CHUNKS) { | ||
2732 | IPW_ERROR("Too many chunks: %i\n", bd->u.data.num_chunks); | ||
2733 | /** @todo issue fatal error, it is quite serious situation */ | ||
2734 | return; | ||
2735 | } | ||
2736 | |||
2737 | /* unmap chunks if any */ | ||
2738 | for (i = 0; i < bd->u.data.num_chunks; i++) { | ||
2739 | pci_unmap_single(dev, bd->u.data.chunk_ptr[i], | ||
2740 | bd->u.data.chunk_len[i], PCI_DMA_TODEVICE); | ||
2741 | if (txq->txb[txq->q.last_used]) { | ||
2742 | ieee80211_txb_free(txq->txb[txq->q.last_used]); | ||
2743 | txq->txb[txq->q.last_used] = NULL; | ||
2744 | } | ||
2745 | } | ||
2746 | } | ||
2747 | |||
2748 | /** | ||
2749 | * Deallocate DMA queue. | ||
2750 | * | ||
2751 | * Empty queue by removing and destroying all BD's. | ||
2752 | * Free all buffers. | ||
2753 | * | ||
2754 | * @param dev | ||
2755 | * @param q | ||
2756 | */ | ||
2757 | static void ipw_queue_tx_free(struct ipw_priv *priv, | ||
2758 | struct clx2_tx_queue *txq) | ||
2759 | { | ||
2760 | struct clx2_queue *q = &txq->q; | ||
2761 | struct pci_dev *dev = priv->pci_dev; | ||
2762 | |||
2763 | if (q->n_bd == 0) | ||
2764 | return; | ||
2765 | |||
2766 | /* first, empty all BD's */ | ||
2767 | for (; q->first_empty != q->last_used; | ||
2768 | q->last_used = ipw_queue_inc_wrap(q->last_used, q->n_bd)) { | ||
2769 | ipw_queue_tx_free_tfd(priv, txq); | ||
2770 | } | ||
2771 | |||
2772 | /* free buffers belonging to queue itself */ | ||
2773 | pci_free_consistent(dev, sizeof(txq->bd[0])*q->n_bd, txq->bd, | ||
2774 | q->dma_addr); | ||
2775 | kfree(txq->txb); | ||
2776 | |||
2777 | /* 0 fill whole structure */ | ||
2778 | memset(txq, 0, sizeof(*txq)); | ||
2779 | } | ||
2780 | |||
2781 | |||
2782 | /** | ||
2783 | * Destroy all DMA queues and structures | ||
2784 | * | ||
2785 | * @param priv | ||
2786 | */ | ||
2787 | static void ipw_tx_queue_free(struct ipw_priv *priv) | ||
2788 | { | ||
2789 | /* Tx CMD queue */ | ||
2790 | ipw_queue_tx_free(priv, &priv->txq_cmd); | ||
2791 | |||
2792 | /* Tx queues */ | ||
2793 | ipw_queue_tx_free(priv, &priv->txq[0]); | ||
2794 | ipw_queue_tx_free(priv, &priv->txq[1]); | ||
2795 | ipw_queue_tx_free(priv, &priv->txq[2]); | ||
2796 | ipw_queue_tx_free(priv, &priv->txq[3]); | ||
2797 | } | ||
2798 | |||
2799 | static void inline __maybe_wake_tx(struct ipw_priv *priv) | ||
2800 | { | ||
2801 | if (netif_running(priv->net_dev)) { | ||
2802 | switch (priv->port_type) { | ||
2803 | case DCR_TYPE_MU_BSS: | ||
2804 | case DCR_TYPE_MU_IBSS: | ||
2805 | if (!(priv->status & STATUS_ASSOCIATED)) { | ||
2806 | return; | ||
2807 | } | ||
2808 | } | ||
2809 | netif_wake_queue(priv->net_dev); | ||
2810 | } | ||
2811 | |||
2812 | } | ||
2813 | |||
2814 | static inline void ipw_create_bssid(struct ipw_priv *priv, u8 *bssid) | ||
2815 | { | ||
2816 | /* First 3 bytes are manufacturer */ | ||
2817 | bssid[0] = priv->mac_addr[0]; | ||
2818 | bssid[1] = priv->mac_addr[1]; | ||
2819 | bssid[2] = priv->mac_addr[2]; | ||
2820 | |||
2821 | /* Last bytes are random */ | ||
2822 | get_random_bytes(&bssid[3], ETH_ALEN-3); | ||
2823 | |||
2824 | bssid[0] &= 0xfe; /* clear multicast bit */ | ||
2825 | bssid[0] |= 0x02; /* set local assignment bit (IEEE802) */ | ||
2826 | } | ||
2827 | |||
2828 | static inline u8 ipw_add_station(struct ipw_priv *priv, u8 *bssid) | ||
2829 | { | ||
2830 | struct ipw_station_entry entry; | ||
2831 | int i; | ||
2832 | |||
2833 | for (i = 0; i < priv->num_stations; i++) { | ||
2834 | if (!memcmp(priv->stations[i], bssid, ETH_ALEN)) { | ||
2835 | /* Another node is active in network */ | ||
2836 | priv->missed_adhoc_beacons = 0; | ||
2837 | if (!(priv->config & CFG_STATIC_CHANNEL)) | ||
2838 | /* when other nodes drop out, we drop out */ | ||
2839 | priv->config &= ~CFG_ADHOC_PERSIST; | ||
2840 | |||
2841 | return i; | ||
2842 | } | ||
2843 | } | ||
2844 | |||
2845 | if (i == MAX_STATIONS) | ||
2846 | return IPW_INVALID_STATION; | ||
2847 | |||
2848 | IPW_DEBUG_SCAN("Adding AdHoc station: " MAC_FMT "\n", MAC_ARG(bssid)); | ||
2849 | |||
2850 | entry.reserved = 0; | ||
2851 | entry.support_mode = 0; | ||
2852 | memcpy(entry.mac_addr, bssid, ETH_ALEN); | ||
2853 | memcpy(priv->stations[i], bssid, ETH_ALEN); | ||
2854 | ipw_write_direct(priv, IPW_STATION_TABLE_LOWER + i * sizeof(entry), | ||
2855 | &entry, | ||
2856 | sizeof(entry)); | ||
2857 | priv->num_stations++; | ||
2858 | |||
2859 | return i; | ||
2860 | } | ||
2861 | |||
2862 | static inline u8 ipw_find_station(struct ipw_priv *priv, u8 *bssid) | ||
2863 | { | ||
2864 | int i; | ||
2865 | |||
2866 | for (i = 0; i < priv->num_stations; i++) | ||
2867 | if (!memcmp(priv->stations[i], bssid, ETH_ALEN)) | ||
2868 | return i; | ||
2869 | |||
2870 | return IPW_INVALID_STATION; | ||
2871 | } | ||
2872 | |||
2873 | static void ipw_send_disassociate(struct ipw_priv *priv, int quiet) | ||
2874 | { | ||
2875 | int err; | ||
2876 | |||
2877 | if (!(priv->status & (STATUS_ASSOCIATING | STATUS_ASSOCIATED))) { | ||
2878 | IPW_DEBUG_ASSOC("Disassociating while not associated.\n"); | ||
2879 | return; | ||
2880 | } | ||
2881 | |||
2882 | IPW_DEBUG_ASSOC("Disassocation attempt from " MAC_FMT " " | ||
2883 | "on channel %d.\n", | ||
2884 | MAC_ARG(priv->assoc_request.bssid), | ||
2885 | priv->assoc_request.channel); | ||
2886 | |||
2887 | priv->status &= ~(STATUS_ASSOCIATING | STATUS_ASSOCIATED); | ||
2888 | priv->status |= STATUS_DISASSOCIATING; | ||
2889 | |||
2890 | if (quiet) | ||
2891 | priv->assoc_request.assoc_type = HC_DISASSOC_QUIET; | ||
2892 | else | ||
2893 | priv->assoc_request.assoc_type = HC_DISASSOCIATE; | ||
2894 | err = ipw_send_associate(priv, &priv->assoc_request); | ||
2895 | if (err) { | ||
2896 | IPW_DEBUG_HC("Attempt to send [dis]associate command " | ||
2897 | "failed.\n"); | ||
2898 | return; | ||
2899 | } | ||
2900 | |||
2901 | } | ||
2902 | |||
2903 | static void ipw_disassociate(void *data) | ||
2904 | { | ||
2905 | ipw_send_disassociate(data, 0); | ||
2906 | } | ||
2907 | |||
2908 | static void notify_wx_assoc_event(struct ipw_priv *priv) | ||
2909 | { | ||
2910 | union iwreq_data wrqu; | ||
2911 | wrqu.ap_addr.sa_family = ARPHRD_ETHER; | ||
2912 | if (priv->status & STATUS_ASSOCIATED) | ||
2913 | memcpy(wrqu.ap_addr.sa_data, priv->bssid, ETH_ALEN); | ||
2914 | else | ||
2915 | memset(wrqu.ap_addr.sa_data, 0, ETH_ALEN); | ||
2916 | wireless_send_event(priv->net_dev, SIOCGIWAP, &wrqu, NULL); | ||
2917 | } | ||
2918 | |||
2919 | struct ipw_status_code { | ||
2920 | u16 status; | ||
2921 | const char *reason; | ||
2922 | }; | ||
2923 | |||
2924 | static const struct ipw_status_code ipw_status_codes[] = { | ||
2925 | {0x00, "Successful"}, | ||
2926 | {0x01, "Unspecified failure"}, | ||
2927 | {0x0A, "Cannot support all requested capabilities in the " | ||
2928 | "Capability information field"}, | ||
2929 | {0x0B, "Reassociation denied due to inability to confirm that " | ||
2930 | "association exists"}, | ||
2931 | {0x0C, "Association denied due to reason outside the scope of this " | ||
2932 | "standard"}, | ||
2933 | {0x0D, "Responding station does not support the specified authentication " | ||
2934 | "algorithm"}, | ||
2935 | {0x0E, "Received an Authentication frame with authentication sequence " | ||
2936 | "transaction sequence number out of expected sequence"}, | ||
2937 | {0x0F, "Authentication rejected because of challenge failure"}, | ||
2938 | {0x10, "Authentication rejected due to timeout waiting for next " | ||
2939 | "frame in sequence"}, | ||
2940 | {0x11, "Association denied because AP is unable to handle additional " | ||
2941 | "associated stations"}, | ||
2942 | {0x12, "Association denied due to requesting station not supporting all " | ||
2943 | "of the datarates in the BSSBasicServiceSet Parameter"}, | ||
2944 | {0x13, "Association denied due to requesting station not supporting " | ||
2945 | "short preamble operation"}, | ||
2946 | {0x14, "Association denied due to requesting station not supporting " | ||
2947 | "PBCC encoding"}, | ||
2948 | {0x15, "Association denied due to requesting station not supporting " | ||
2949 | "channel agility"}, | ||
2950 | {0x19, "Association denied due to requesting station not supporting " | ||
2951 | "short slot operation"}, | ||
2952 | {0x1A, "Association denied due to requesting station not supporting " | ||
2953 | "DSSS-OFDM operation"}, | ||
2954 | {0x28, "Invalid Information Element"}, | ||
2955 | {0x29, "Group Cipher is not valid"}, | ||
2956 | {0x2A, "Pairwise Cipher is not valid"}, | ||
2957 | {0x2B, "AKMP is not valid"}, | ||
2958 | {0x2C, "Unsupported RSN IE version"}, | ||
2959 | {0x2D, "Invalid RSN IE Capabilities"}, | ||
2960 | {0x2E, "Cipher suite is rejected per security policy"}, | ||
2961 | }; | ||
2962 | |||
2963 | #ifdef CONFIG_IPW_DEBUG | ||
2964 | static const char *ipw_get_status_code(u16 status) | ||
2965 | { | ||
2966 | int i; | ||
2967 | for (i = 0; i < ARRAY_SIZE(ipw_status_codes); i++) | ||
2968 | if (ipw_status_codes[i].status == status) | ||
2969 | return ipw_status_codes[i].reason; | ||
2970 | return "Unknown status value."; | ||
2971 | } | ||
2972 | #endif | ||
2973 | |||
2974 | static void inline average_init(struct average *avg) | ||
2975 | { | ||
2976 | memset(avg, 0, sizeof(*avg)); | ||
2977 | } | ||
2978 | |||
2979 | static void inline average_add(struct average *avg, s16 val) | ||
2980 | { | ||
2981 | avg->sum -= avg->entries[avg->pos]; | ||
2982 | avg->sum += val; | ||
2983 | avg->entries[avg->pos++] = val; | ||
2984 | if (unlikely(avg->pos == AVG_ENTRIES)) { | ||
2985 | avg->init = 1; | ||
2986 | avg->pos = 0; | ||
2987 | } | ||
2988 | } | ||
2989 | |||
2990 | static s16 inline average_value(struct average *avg) | ||
2991 | { | ||
2992 | if (!unlikely(avg->init)) { | ||
2993 | if (avg->pos) | ||
2994 | return avg->sum / avg->pos; | ||
2995 | return 0; | ||
2996 | } | ||
2997 | |||
2998 | return avg->sum / AVG_ENTRIES; | ||
2999 | } | ||
3000 | |||
3001 | static void ipw_reset_stats(struct ipw_priv *priv) | ||
3002 | { | ||
3003 | u32 len = sizeof(u32); | ||
3004 | |||
3005 | priv->quality = 0; | ||
3006 | |||
3007 | average_init(&priv->average_missed_beacons); | ||
3008 | average_init(&priv->average_rssi); | ||
3009 | average_init(&priv->average_noise); | ||
3010 | |||
3011 | priv->last_rate = 0; | ||
3012 | priv->last_missed_beacons = 0; | ||
3013 | priv->last_rx_packets = 0; | ||
3014 | priv->last_tx_packets = 0; | ||
3015 | priv->last_tx_failures = 0; | ||
3016 | |||
3017 | /* Firmware managed, reset only when NIC is restarted, so we have to | ||
3018 | * normalize on the current value */ | ||
3019 | ipw_get_ordinal(priv, IPW_ORD_STAT_RX_ERR_CRC, | ||
3020 | &priv->last_rx_err, &len); | ||
3021 | ipw_get_ordinal(priv, IPW_ORD_STAT_TX_FAILURE, | ||
3022 | &priv->last_tx_failures, &len); | ||
3023 | |||
3024 | /* Driver managed, reset with each association */ | ||
3025 | priv->missed_adhoc_beacons = 0; | ||
3026 | priv->missed_beacons = 0; | ||
3027 | priv->tx_packets = 0; | ||
3028 | priv->rx_packets = 0; | ||
3029 | |||
3030 | } | ||
3031 | |||
3032 | |||
3033 | static inline u32 ipw_get_max_rate(struct ipw_priv *priv) | ||
3034 | { | ||
3035 | u32 i = 0x80000000; | ||
3036 | u32 mask = priv->rates_mask; | ||
3037 | /* If currently associated in B mode, restrict the maximum | ||
3038 | * rate match to B rates */ | ||
3039 | if (priv->assoc_request.ieee_mode == IPW_B_MODE) | ||
3040 | mask &= IEEE80211_CCK_RATES_MASK; | ||
3041 | |||
3042 | /* TODO: Verify that the rate is supported by the current rates | ||
3043 | * list. */ | ||
3044 | |||
3045 | while (i && !(mask & i)) i >>= 1; | ||
3046 | switch (i) { | ||
3047 | case IEEE80211_CCK_RATE_1MB_MASK: return 1000000; | ||
3048 | case IEEE80211_CCK_RATE_2MB_MASK: return 2000000; | ||
3049 | case IEEE80211_CCK_RATE_5MB_MASK: return 5500000; | ||
3050 | case IEEE80211_OFDM_RATE_6MB_MASK: return 6000000; | ||
3051 | case IEEE80211_OFDM_RATE_9MB_MASK: return 9000000; | ||
3052 | case IEEE80211_CCK_RATE_11MB_MASK: return 11000000; | ||
3053 | case IEEE80211_OFDM_RATE_12MB_MASK: return 12000000; | ||
3054 | case IEEE80211_OFDM_RATE_18MB_MASK: return 18000000; | ||
3055 | case IEEE80211_OFDM_RATE_24MB_MASK: return 24000000; | ||
3056 | case IEEE80211_OFDM_RATE_36MB_MASK: return 36000000; | ||
3057 | case IEEE80211_OFDM_RATE_48MB_MASK: return 48000000; | ||
3058 | case IEEE80211_OFDM_RATE_54MB_MASK: return 54000000; | ||
3059 | } | ||
3060 | |||
3061 | if (priv->ieee->mode == IEEE_B) | ||
3062 | return 11000000; | ||
3063 | else | ||
3064 | return 54000000; | ||
3065 | } | ||
3066 | |||
3067 | static u32 ipw_get_current_rate(struct ipw_priv *priv) | ||
3068 | { | ||
3069 | u32 rate, len = sizeof(rate); | ||
3070 | int err; | ||
3071 | |||
3072 | if (!(priv->status & STATUS_ASSOCIATED)) | ||
3073 | return 0; | ||
3074 | |||
3075 | if (priv->tx_packets > IPW_REAL_RATE_RX_PACKET_THRESHOLD) { | ||
3076 | err = ipw_get_ordinal(priv, IPW_ORD_STAT_TX_CURR_RATE, &rate, | ||
3077 | &len); | ||
3078 | if (err) { | ||
3079 | IPW_DEBUG_INFO("failed querying ordinals.\n"); | ||
3080 | return 0; | ||
3081 | } | ||
3082 | } else | ||
3083 | return ipw_get_max_rate(priv); | ||
3084 | |||
3085 | switch (rate) { | ||
3086 | case IPW_TX_RATE_1MB: return 1000000; | ||
3087 | case IPW_TX_RATE_2MB: return 2000000; | ||
3088 | case IPW_TX_RATE_5MB: return 5500000; | ||
3089 | case IPW_TX_RATE_6MB: return 6000000; | ||
3090 | case IPW_TX_RATE_9MB: return 9000000; | ||
3091 | case IPW_TX_RATE_11MB: return 11000000; | ||
3092 | case IPW_TX_RATE_12MB: return 12000000; | ||
3093 | case IPW_TX_RATE_18MB: return 18000000; | ||
3094 | case IPW_TX_RATE_24MB: return 24000000; | ||
3095 | case IPW_TX_RATE_36MB: return 36000000; | ||
3096 | case IPW_TX_RATE_48MB: return 48000000; | ||
3097 | case IPW_TX_RATE_54MB: return 54000000; | ||
3098 | } | ||
3099 | |||
3100 | return 0; | ||
3101 | } | ||
3102 | |||
3103 | #define PERFECT_RSSI (-50) | ||
3104 | #define WORST_RSSI (-85) | ||
3105 | #define IPW_STATS_INTERVAL (2 * HZ) | ||
3106 | static void ipw_gather_stats(struct ipw_priv *priv) | ||
3107 | { | ||
3108 | u32 rx_err, rx_err_delta, rx_packets_delta; | ||
3109 | u32 tx_failures, tx_failures_delta, tx_packets_delta; | ||
3110 | u32 missed_beacons_percent, missed_beacons_delta; | ||
3111 | u32 quality = 0; | ||
3112 | u32 len = sizeof(u32); | ||
3113 | s16 rssi; | ||
3114 | u32 beacon_quality, signal_quality, tx_quality, rx_quality, | ||
3115 | rate_quality; | ||
3116 | |||
3117 | if (!(priv->status & STATUS_ASSOCIATED)) { | ||
3118 | priv->quality = 0; | ||
3119 | return; | ||
3120 | } | ||
3121 | |||
3122 | /* Update the statistics */ | ||
3123 | ipw_get_ordinal(priv, IPW_ORD_STAT_MISSED_BEACONS, | ||
3124 | &priv->missed_beacons, &len); | ||
3125 | missed_beacons_delta = priv->missed_beacons - | ||
3126 | priv->last_missed_beacons; | ||
3127 | priv->last_missed_beacons = priv->missed_beacons; | ||
3128 | if (priv->assoc_request.beacon_interval) { | ||
3129 | missed_beacons_percent = missed_beacons_delta * | ||
3130 | (HZ * priv->assoc_request.beacon_interval) / | ||
3131 | (IPW_STATS_INTERVAL * 10); | ||
3132 | } else { | ||
3133 | missed_beacons_percent = 0; | ||
3134 | } | ||
3135 | average_add(&priv->average_missed_beacons, missed_beacons_percent); | ||
3136 | |||
3137 | ipw_get_ordinal(priv, IPW_ORD_STAT_RX_ERR_CRC, &rx_err, &len); | ||
3138 | rx_err_delta = rx_err - priv->last_rx_err; | ||
3139 | priv->last_rx_err = rx_err; | ||
3140 | |||
3141 | ipw_get_ordinal(priv, IPW_ORD_STAT_TX_FAILURE, &tx_failures, &len); | ||
3142 | tx_failures_delta = tx_failures - priv->last_tx_failures; | ||
3143 | priv->last_tx_failures = tx_failures; | ||
3144 | |||
3145 | rx_packets_delta = priv->rx_packets - priv->last_rx_packets; | ||
3146 | priv->last_rx_packets = priv->rx_packets; | ||
3147 | |||
3148 | tx_packets_delta = priv->tx_packets - priv->last_tx_packets; | ||
3149 | priv->last_tx_packets = priv->tx_packets; | ||
3150 | |||
3151 | /* Calculate quality based on the following: | ||
3152 | * | ||
3153 | * Missed beacon: 100% = 0, 0% = 70% missed | ||
3154 | * Rate: 60% = 1Mbs, 100% = Max | ||
3155 | * Rx and Tx errors represent a straight % of total Rx/Tx | ||
3156 | * RSSI: 100% = > -50, 0% = < -80 | ||
3157 | * Rx errors: 100% = 0, 0% = 50% missed | ||
3158 | * | ||
3159 | * The lowest computed quality is used. | ||
3160 | * | ||
3161 | */ | ||
3162 | #define BEACON_THRESHOLD 5 | ||
3163 | beacon_quality = 100 - missed_beacons_percent; | ||
3164 | if (beacon_quality < BEACON_THRESHOLD) | ||
3165 | beacon_quality = 0; | ||
3166 | else | ||
3167 | beacon_quality = (beacon_quality - BEACON_THRESHOLD) * 100 / | ||
3168 | (100 - BEACON_THRESHOLD); | ||
3169 | IPW_DEBUG_STATS("Missed beacon: %3d%% (%d%%)\n", | ||
3170 | beacon_quality, missed_beacons_percent); | ||
3171 | |||
3172 | priv->last_rate = ipw_get_current_rate(priv); | ||
3173 | rate_quality = priv->last_rate * 40 / priv->last_rate + 60; | ||
3174 | IPW_DEBUG_STATS("Rate quality : %3d%% (%dMbs)\n", | ||
3175 | rate_quality, priv->last_rate / 1000000); | ||
3176 | |||
3177 | if (rx_packets_delta > 100 && | ||
3178 | rx_packets_delta + rx_err_delta) | ||
3179 | rx_quality = 100 - (rx_err_delta * 100) / | ||
3180 | (rx_packets_delta + rx_err_delta); | ||
3181 | else | ||
3182 | rx_quality = 100; | ||
3183 | IPW_DEBUG_STATS("Rx quality : %3d%% (%u errors, %u packets)\n", | ||
3184 | rx_quality, rx_err_delta, rx_packets_delta); | ||
3185 | |||
3186 | if (tx_packets_delta > 100 && | ||
3187 | tx_packets_delta + tx_failures_delta) | ||
3188 | tx_quality = 100 - (tx_failures_delta * 100) / | ||
3189 | (tx_packets_delta + tx_failures_delta); | ||
3190 | else | ||
3191 | tx_quality = 100; | ||
3192 | IPW_DEBUG_STATS("Tx quality : %3d%% (%u errors, %u packets)\n", | ||
3193 | tx_quality, tx_failures_delta, tx_packets_delta); | ||
3194 | |||
3195 | rssi = average_value(&priv->average_rssi); | ||
3196 | if (rssi > PERFECT_RSSI) | ||
3197 | signal_quality = 100; | ||
3198 | else if (rssi < WORST_RSSI) | ||
3199 | signal_quality = 0; | ||
3200 | else | ||
3201 | signal_quality = (rssi - WORST_RSSI) * 100 / | ||
3202 | (PERFECT_RSSI - WORST_RSSI); | ||
3203 | IPW_DEBUG_STATS("Signal level : %3d%% (%d dBm)\n", | ||
3204 | signal_quality, rssi); | ||
3205 | |||
3206 | quality = min(beacon_quality, | ||
3207 | min(rate_quality, | ||
3208 | min(tx_quality, min(rx_quality, signal_quality)))); | ||
3209 | if (quality == beacon_quality) | ||
3210 | IPW_DEBUG_STATS( | ||
3211 | "Quality (%d%%): Clamped to missed beacons.\n", | ||
3212 | quality); | ||
3213 | if (quality == rate_quality) | ||
3214 | IPW_DEBUG_STATS( | ||
3215 | "Quality (%d%%): Clamped to rate quality.\n", | ||
3216 | quality); | ||
3217 | if (quality == tx_quality) | ||
3218 | IPW_DEBUG_STATS( | ||
3219 | "Quality (%d%%): Clamped to Tx quality.\n", | ||
3220 | quality); | ||
3221 | if (quality == rx_quality) | ||
3222 | IPW_DEBUG_STATS( | ||
3223 | "Quality (%d%%): Clamped to Rx quality.\n", | ||
3224 | quality); | ||
3225 | if (quality == signal_quality) | ||
3226 | IPW_DEBUG_STATS( | ||
3227 | "Quality (%d%%): Clamped to signal quality.\n", | ||
3228 | quality); | ||
3229 | |||
3230 | priv->quality = quality; | ||
3231 | |||
3232 | queue_delayed_work(priv->workqueue, &priv->gather_stats, | ||
3233 | IPW_STATS_INTERVAL); | ||
3234 | } | ||
3235 | |||
3236 | /** | ||
3237 | * Handle host notification packet. | ||
3238 | * Called from interrupt routine | ||
3239 | */ | ||
3240 | static inline void ipw_rx_notification(struct ipw_priv* priv, | ||
3241 | struct ipw_rx_notification *notif) | ||
3242 | { | ||
3243 | IPW_DEBUG_NOTIF("type = %i (%d bytes)\n", | ||
3244 | notif->subtype, notif->size); | ||
3245 | |||
3246 | switch (notif->subtype) { | ||
3247 | case HOST_NOTIFICATION_STATUS_ASSOCIATED: { | ||
3248 | struct notif_association *assoc = ¬if->u.assoc; | ||
3249 | |||
3250 | switch (assoc->state) { | ||
3251 | case CMAS_ASSOCIATED: { | ||
3252 | IPW_DEBUG(IPW_DL_NOTIF | IPW_DL_STATE | IPW_DL_ASSOC, | ||
3253 | "associated: '%s' " MAC_FMT " \n", | ||
3254 | escape_essid(priv->essid, priv->essid_len), | ||
3255 | MAC_ARG(priv->bssid)); | ||
3256 | |||
3257 | switch (priv->ieee->iw_mode) { | ||
3258 | case IW_MODE_INFRA: | ||
3259 | memcpy(priv->ieee->bssid, priv->bssid, | ||
3260 | ETH_ALEN); | ||
3261 | break; | ||
3262 | |||
3263 | case IW_MODE_ADHOC: | ||
3264 | memcpy(priv->ieee->bssid, priv->bssid, | ||
3265 | ETH_ALEN); | ||
3266 | |||
3267 | /* clear out the station table */ | ||
3268 | priv->num_stations = 0; | ||
3269 | |||
3270 | IPW_DEBUG_ASSOC("queueing adhoc check\n"); | ||
3271 | queue_delayed_work(priv->workqueue, | ||
3272 | &priv->adhoc_check, | ||
3273 | priv->assoc_request.beacon_interval); | ||
3274 | break; | ||
3275 | } | ||
3276 | |||
3277 | priv->status &= ~STATUS_ASSOCIATING; | ||
3278 | priv->status |= STATUS_ASSOCIATED; | ||
3279 | |||
3280 | netif_carrier_on(priv->net_dev); | ||
3281 | if (netif_queue_stopped(priv->net_dev)) { | ||
3282 | IPW_DEBUG_NOTIF("waking queue\n"); | ||
3283 | netif_wake_queue(priv->net_dev); | ||
3284 | } else { | ||
3285 | IPW_DEBUG_NOTIF("starting queue\n"); | ||
3286 | netif_start_queue(priv->net_dev); | ||
3287 | } | ||
3288 | |||
3289 | ipw_reset_stats(priv); | ||
3290 | /* Ensure the rate is updated immediately */ | ||
3291 | priv->last_rate = ipw_get_current_rate(priv); | ||
3292 | schedule_work(&priv->gather_stats); | ||
3293 | notify_wx_assoc_event(priv); | ||
3294 | |||
3295 | /* queue_delayed_work(priv->workqueue, | ||
3296 | &priv->request_scan, | ||
3297 | SCAN_ASSOCIATED_INTERVAL); | ||
3298 | */ | ||
3299 | break; | ||
3300 | } | ||
3301 | |||
3302 | case CMAS_AUTHENTICATED: { | ||
3303 | if (priv->status & (STATUS_ASSOCIATED | STATUS_AUTH)) { | ||
3304 | #ifdef CONFIG_IPW_DEBUG | ||
3305 | struct notif_authenticate *auth = ¬if->u.auth; | ||
3306 | IPW_DEBUG(IPW_DL_NOTIF | IPW_DL_STATE | IPW_DL_ASSOC, | ||
3307 | "deauthenticated: '%s' " MAC_FMT ": (0x%04X) - %s \n", | ||
3308 | escape_essid(priv->essid, priv->essid_len), | ||
3309 | MAC_ARG(priv->bssid), | ||
3310 | ntohs(auth->status), | ||
3311 | ipw_get_status_code(ntohs(auth->status))); | ||
3312 | #endif | ||
3313 | |||
3314 | priv->status &= ~(STATUS_ASSOCIATING | | ||
3315 | STATUS_AUTH | | ||
3316 | STATUS_ASSOCIATED); | ||
3317 | |||
3318 | netif_carrier_off(priv->net_dev); | ||
3319 | netif_stop_queue(priv->net_dev); | ||
3320 | queue_work(priv->workqueue, &priv->request_scan); | ||
3321 | notify_wx_assoc_event(priv); | ||
3322 | break; | ||
3323 | } | ||
3324 | |||
3325 | IPW_DEBUG(IPW_DL_NOTIF | IPW_DL_STATE | IPW_DL_ASSOC, | ||
3326 | "authenticated: '%s' " MAC_FMT "\n", | ||
3327 | escape_essid(priv->essid, priv->essid_len), | ||
3328 | MAC_ARG(priv->bssid)); | ||
3329 | break; | ||
3330 | } | ||
3331 | |||
3332 | case CMAS_INIT: { | ||
3333 | IPW_DEBUG(IPW_DL_NOTIF | IPW_DL_STATE | IPW_DL_ASSOC, | ||
3334 | "disassociated: '%s' " MAC_FMT " \n", | ||
3335 | escape_essid(priv->essid, priv->essid_len), | ||
3336 | MAC_ARG(priv->bssid)); | ||
3337 | |||
3338 | priv->status &= ~( | ||
3339 | STATUS_DISASSOCIATING | | ||
3340 | STATUS_ASSOCIATING | | ||
3341 | STATUS_ASSOCIATED | | ||
3342 | STATUS_AUTH); | ||
3343 | |||
3344 | netif_stop_queue(priv->net_dev); | ||
3345 | if (!(priv->status & STATUS_ROAMING)) { | ||
3346 | netif_carrier_off(priv->net_dev); | ||
3347 | notify_wx_assoc_event(priv); | ||
3348 | |||
3349 | /* Cancel any queued work ... */ | ||
3350 | cancel_delayed_work(&priv->request_scan); | ||
3351 | cancel_delayed_work(&priv->adhoc_check); | ||
3352 | |||
3353 | /* Queue up another scan... */ | ||
3354 | queue_work(priv->workqueue, | ||
3355 | &priv->request_scan); | ||
3356 | |||
3357 | cancel_delayed_work(&priv->gather_stats); | ||
3358 | } else { | ||
3359 | priv->status |= STATUS_ROAMING; | ||
3360 | queue_work(priv->workqueue, | ||
3361 | &priv->request_scan); | ||
3362 | } | ||
3363 | |||
3364 | ipw_reset_stats(priv); | ||
3365 | break; | ||
3366 | } | ||
3367 | |||
3368 | default: | ||
3369 | IPW_ERROR("assoc: unknown (%d)\n", | ||
3370 | assoc->state); | ||
3371 | break; | ||
3372 | } | ||
3373 | |||
3374 | break; | ||
3375 | } | ||
3376 | |||
3377 | case HOST_NOTIFICATION_STATUS_AUTHENTICATE: { | ||
3378 | struct notif_authenticate *auth = ¬if->u.auth; | ||
3379 | switch (auth->state) { | ||
3380 | case CMAS_AUTHENTICATED: | ||
3381 | IPW_DEBUG(IPW_DL_NOTIF | IPW_DL_STATE, | ||
3382 | "authenticated: '%s' " MAC_FMT " \n", | ||
3383 | escape_essid(priv->essid, priv->essid_len), | ||
3384 | MAC_ARG(priv->bssid)); | ||
3385 | priv->status |= STATUS_AUTH; | ||
3386 | break; | ||
3387 | |||
3388 | case CMAS_INIT: | ||
3389 | if (priv->status & STATUS_AUTH) { | ||
3390 | IPW_DEBUG(IPW_DL_NOTIF | IPW_DL_STATE | IPW_DL_ASSOC, | ||
3391 | "authentication failed (0x%04X): %s\n", | ||
3392 | ntohs(auth->status), | ||
3393 | ipw_get_status_code(ntohs(auth->status))); | ||
3394 | } | ||
3395 | IPW_DEBUG(IPW_DL_NOTIF | IPW_DL_STATE | IPW_DL_ASSOC, | ||
3396 | "deauthenticated: '%s' " MAC_FMT "\n", | ||
3397 | escape_essid(priv->essid, priv->essid_len), | ||
3398 | MAC_ARG(priv->bssid)); | ||
3399 | |||
3400 | priv->status &= ~(STATUS_ASSOCIATING | | ||
3401 | STATUS_AUTH | | ||
3402 | STATUS_ASSOCIATED); | ||
3403 | |||
3404 | netif_carrier_off(priv->net_dev); | ||
3405 | netif_stop_queue(priv->net_dev); | ||
3406 | queue_work(priv->workqueue, &priv->request_scan); | ||
3407 | notify_wx_assoc_event(priv); | ||
3408 | break; | ||
3409 | |||
3410 | case CMAS_TX_AUTH_SEQ_1: | ||
3411 | IPW_DEBUG(IPW_DL_NOTIF | IPW_DL_STATE | IPW_DL_ASSOC, | ||
3412 | "AUTH_SEQ_1\n"); | ||
3413 | break; | ||
3414 | case CMAS_RX_AUTH_SEQ_2: | ||
3415 | IPW_DEBUG(IPW_DL_NOTIF | IPW_DL_STATE | IPW_DL_ASSOC, | ||
3416 | "AUTH_SEQ_2\n"); | ||
3417 | break; | ||
3418 | case CMAS_AUTH_SEQ_1_PASS: | ||
3419 | IPW_DEBUG(IPW_DL_NOTIF | IPW_DL_STATE | IPW_DL_ASSOC, | ||
3420 | "AUTH_SEQ_1_PASS\n"); | ||
3421 | break; | ||
3422 | case CMAS_AUTH_SEQ_1_FAIL: | ||
3423 | IPW_DEBUG(IPW_DL_NOTIF | IPW_DL_STATE | IPW_DL_ASSOC, | ||
3424 | "AUTH_SEQ_1_FAIL\n"); | ||
3425 | break; | ||
3426 | case CMAS_TX_AUTH_SEQ_3: | ||
3427 | IPW_DEBUG(IPW_DL_NOTIF | IPW_DL_STATE | IPW_DL_ASSOC, | ||
3428 | "AUTH_SEQ_3\n"); | ||
3429 | break; | ||
3430 | case CMAS_RX_AUTH_SEQ_4: | ||
3431 | IPW_DEBUG(IPW_DL_NOTIF | IPW_DL_STATE | IPW_DL_ASSOC, | ||
3432 | "RX_AUTH_SEQ_4\n"); | ||
3433 | break; | ||
3434 | case CMAS_AUTH_SEQ_2_PASS: | ||
3435 | IPW_DEBUG(IPW_DL_NOTIF | IPW_DL_STATE | IPW_DL_ASSOC, | ||
3436 | "AUTH_SEQ_2_PASS\n"); | ||
3437 | break; | ||
3438 | case CMAS_AUTH_SEQ_2_FAIL: | ||
3439 | IPW_DEBUG(IPW_DL_NOTIF | IPW_DL_STATE | IPW_DL_ASSOC, | ||
3440 | "AUT_SEQ_2_FAIL\n"); | ||
3441 | break; | ||
3442 | case CMAS_TX_ASSOC: | ||
3443 | IPW_DEBUG(IPW_DL_NOTIF | IPW_DL_STATE | IPW_DL_ASSOC, | ||
3444 | "TX_ASSOC\n"); | ||
3445 | break; | ||
3446 | case CMAS_RX_ASSOC_RESP: | ||
3447 | IPW_DEBUG(IPW_DL_NOTIF | IPW_DL_STATE | IPW_DL_ASSOC, | ||
3448 | "RX_ASSOC_RESP\n"); | ||
3449 | break; | ||
3450 | case CMAS_ASSOCIATED: | ||
3451 | IPW_DEBUG(IPW_DL_NOTIF | IPW_DL_STATE | IPW_DL_ASSOC, | ||
3452 | "ASSOCIATED\n"); | ||
3453 | break; | ||
3454 | default: | ||
3455 | IPW_DEBUG_NOTIF("auth: failure - %d\n", auth->state); | ||
3456 | break; | ||
3457 | } | ||
3458 | break; | ||
3459 | } | ||
3460 | |||
3461 | case HOST_NOTIFICATION_STATUS_SCAN_CHANNEL_RESULT: { | ||
3462 | struct notif_channel_result *x = ¬if->u.channel_result; | ||
3463 | |||
3464 | if (notif->size == sizeof(*x)) { | ||
3465 | IPW_DEBUG_SCAN("Scan result for channel %d\n", | ||
3466 | x->channel_num); | ||
3467 | } else { | ||
3468 | IPW_DEBUG_SCAN("Scan result of wrong size %d " | ||
3469 | "(should be %d)\n", | ||
3470 | notif->size,sizeof(*x)); | ||
3471 | } | ||
3472 | break; | ||
3473 | } | ||
3474 | |||
3475 | case HOST_NOTIFICATION_STATUS_SCAN_COMPLETED: { | ||
3476 | struct notif_scan_complete* x = ¬if->u.scan_complete; | ||
3477 | if (notif->size == sizeof(*x)) { | ||
3478 | IPW_DEBUG_SCAN("Scan completed: type %d, %d channels, " | ||
3479 | "%d status\n", | ||
3480 | x->scan_type, | ||
3481 | x->num_channels, | ||
3482 | x->status); | ||
3483 | } else { | ||
3484 | IPW_ERROR("Scan completed of wrong size %d " | ||
3485 | "(should be %d)\n", | ||
3486 | notif->size,sizeof(*x)); | ||
3487 | } | ||
3488 | |||
3489 | priv->status &= ~(STATUS_SCANNING | STATUS_SCAN_ABORTING); | ||
3490 | |||
3491 | cancel_delayed_work(&priv->scan_check); | ||
3492 | |||
3493 | if (!(priv->status & (STATUS_ASSOCIATED | | ||
3494 | STATUS_ASSOCIATING | | ||
3495 | STATUS_ROAMING | | ||
3496 | STATUS_DISASSOCIATING))) | ||
3497 | queue_work(priv->workqueue, &priv->associate); | ||
3498 | else if (priv->status & STATUS_ROAMING) { | ||
3499 | /* If a scan completed and we are in roam mode, then | ||
3500 | * the scan that completed was the one requested as a | ||
3501 | * result of entering roam... so, schedule the | ||
3502 | * roam work */ | ||
3503 | queue_work(priv->workqueue, &priv->roam); | ||
3504 | } else if (priv->status & STATUS_SCAN_PENDING) | ||
3505 | queue_work(priv->workqueue, &priv->request_scan); | ||
3506 | |||
3507 | priv->ieee->scans++; | ||
3508 | break; | ||
3509 | } | ||
3510 | |||
3511 | case HOST_NOTIFICATION_STATUS_FRAG_LENGTH: { | ||
3512 | struct notif_frag_length *x = ¬if->u.frag_len; | ||
3513 | |||
3514 | if (notif->size == sizeof(*x)) { | ||
3515 | IPW_ERROR("Frag length: %d\n", x->frag_length); | ||
3516 | } else { | ||
3517 | IPW_ERROR("Frag length of wrong size %d " | ||
3518 | "(should be %d)\n", | ||
3519 | notif->size, sizeof(*x)); | ||
3520 | } | ||
3521 | break; | ||
3522 | } | ||
3523 | |||
3524 | case HOST_NOTIFICATION_STATUS_LINK_DETERIORATION: { | ||
3525 | struct notif_link_deterioration *x = | ||
3526 | ¬if->u.link_deterioration; | ||
3527 | if (notif->size==sizeof(*x)) { | ||
3528 | IPW_DEBUG(IPW_DL_NOTIF | IPW_DL_STATE, | ||
3529 | "link deterioration: '%s' " MAC_FMT " \n", | ||
3530 | escape_essid(priv->essid, priv->essid_len), | ||
3531 | MAC_ARG(priv->bssid)); | ||
3532 | memcpy(&priv->last_link_deterioration, x, sizeof(*x)); | ||
3533 | } else { | ||
3534 | IPW_ERROR("Link Deterioration of wrong size %d " | ||
3535 | "(should be %d)\n", | ||
3536 | notif->size,sizeof(*x)); | ||
3537 | } | ||
3538 | break; | ||
3539 | } | ||
3540 | |||
3541 | case HOST_NOTIFICATION_DINO_CONFIG_RESPONSE: { | ||
3542 | IPW_ERROR("Dino config\n"); | ||
3543 | if (priv->hcmd && priv->hcmd->cmd == HOST_CMD_DINO_CONFIG) { | ||
3544 | /* TODO: Do anything special? */ | ||
3545 | } else { | ||
3546 | IPW_ERROR("Unexpected DINO_CONFIG_RESPONSE\n"); | ||
3547 | } | ||
3548 | break; | ||
3549 | } | ||
3550 | |||
3551 | case HOST_NOTIFICATION_STATUS_BEACON_STATE: { | ||
3552 | struct notif_beacon_state *x = ¬if->u.beacon_state; | ||
3553 | if (notif->size != sizeof(*x)) { | ||
3554 | IPW_ERROR("Beacon state of wrong size %d (should " | ||
3555 | "be %d)\n", notif->size, sizeof(*x)); | ||
3556 | break; | ||
3557 | } | ||
3558 | |||
3559 | if (x->state == HOST_NOTIFICATION_STATUS_BEACON_MISSING) { | ||
3560 | if (priv->status & STATUS_SCANNING) { | ||
3561 | /* Stop scan to keep fw from getting | ||
3562 | * stuck... */ | ||
3563 | queue_work(priv->workqueue, | ||
3564 | &priv->abort_scan); | ||
3565 | } | ||
3566 | |||
3567 | if (x->number > priv->missed_beacon_threshold && | ||
3568 | priv->status & STATUS_ASSOCIATED) { | ||
3569 | IPW_DEBUG(IPW_DL_INFO | IPW_DL_NOTIF | | ||
3570 | IPW_DL_STATE, | ||
3571 | "Missed beacon: %d - disassociate\n", | ||
3572 | x->number); | ||
3573 | queue_work(priv->workqueue, | ||
3574 | &priv->disassociate); | ||
3575 | } else if (x->number > priv->roaming_threshold) { | ||
3576 | IPW_DEBUG(IPW_DL_NOTIF | IPW_DL_STATE, | ||
3577 | "Missed beacon: %d - initiate " | ||
3578 | "roaming\n", | ||
3579 | x->number); | ||
3580 | queue_work(priv->workqueue, | ||
3581 | &priv->roam); | ||
3582 | } else { | ||
3583 | IPW_DEBUG_NOTIF("Missed beacon: %d\n", | ||
3584 | x->number); | ||
3585 | } | ||
3586 | |||
3587 | priv->notif_missed_beacons = x->number; | ||
3588 | |||
3589 | } | ||
3590 | |||
3591 | |||
3592 | break; | ||
3593 | } | ||
3594 | |||
3595 | case HOST_NOTIFICATION_STATUS_TGI_TX_KEY: { | ||
3596 | struct notif_tgi_tx_key *x = ¬if->u.tgi_tx_key; | ||
3597 | if (notif->size==sizeof(*x)) { | ||
3598 | IPW_ERROR("TGi Tx Key: state 0x%02x sec type " | ||
3599 | "0x%02x station %d\n", | ||
3600 | x->key_state,x->security_type, | ||
3601 | x->station_index); | ||
3602 | break; | ||
3603 | } | ||
3604 | |||
3605 | IPW_ERROR("TGi Tx Key of wrong size %d (should be %d)\n", | ||
3606 | notif->size,sizeof(*x)); | ||
3607 | break; | ||
3608 | } | ||
3609 | |||
3610 | case HOST_NOTIFICATION_CALIB_KEEP_RESULTS: { | ||
3611 | struct notif_calibration *x = ¬if->u.calibration; | ||
3612 | |||
3613 | if (notif->size == sizeof(*x)) { | ||
3614 | memcpy(&priv->calib, x, sizeof(*x)); | ||
3615 | IPW_DEBUG_INFO("TODO: Calibration\n"); | ||
3616 | break; | ||
3617 | } | ||
3618 | |||
3619 | IPW_ERROR("Calibration of wrong size %d (should be %d)\n", | ||
3620 | notif->size,sizeof(*x)); | ||
3621 | break; | ||
3622 | } | ||
3623 | |||
3624 | case HOST_NOTIFICATION_NOISE_STATS: { | ||
3625 | if (notif->size == sizeof(u32)) { | ||
3626 | priv->last_noise = (u8)(notif->u.noise.value & 0xff); | ||
3627 | average_add(&priv->average_noise, priv->last_noise); | ||
3628 | break; | ||
3629 | } | ||
3630 | |||
3631 | IPW_ERROR("Noise stat is wrong size %d (should be %d)\n", | ||
3632 | notif->size, sizeof(u32)); | ||
3633 | break; | ||
3634 | } | ||
3635 | |||
3636 | default: | ||
3637 | IPW_ERROR("Unknown notification: " | ||
3638 | "subtype=%d,flags=0x%2x,size=%d\n", | ||
3639 | notif->subtype, notif->flags, notif->size); | ||
3640 | } | ||
3641 | } | ||
3642 | |||
3643 | /** | ||
3644 | * Destroys all DMA structures and initialise them again | ||
3645 | * | ||
3646 | * @param priv | ||
3647 | * @return error code | ||
3648 | */ | ||
3649 | static int ipw_queue_reset(struct ipw_priv *priv) | ||
3650 | { | ||
3651 | int rc = 0; | ||
3652 | /** @todo customize queue sizes */ | ||
3653 | int nTx = 64, nTxCmd = 8; | ||
3654 | ipw_tx_queue_free(priv); | ||
3655 | /* Tx CMD queue */ | ||
3656 | rc = ipw_queue_tx_init(priv, &priv->txq_cmd, nTxCmd, | ||
3657 | CX2_TX_CMD_QUEUE_READ_INDEX, | ||
3658 | CX2_TX_CMD_QUEUE_WRITE_INDEX, | ||
3659 | CX2_TX_CMD_QUEUE_BD_BASE, | ||
3660 | CX2_TX_CMD_QUEUE_BD_SIZE); | ||
3661 | if (rc) { | ||
3662 | IPW_ERROR("Tx Cmd queue init failed\n"); | ||
3663 | goto error; | ||
3664 | } | ||
3665 | /* Tx queue(s) */ | ||
3666 | rc = ipw_queue_tx_init(priv, &priv->txq[0], nTx, | ||
3667 | CX2_TX_QUEUE_0_READ_INDEX, | ||
3668 | CX2_TX_QUEUE_0_WRITE_INDEX, | ||
3669 | CX2_TX_QUEUE_0_BD_BASE, | ||
3670 | CX2_TX_QUEUE_0_BD_SIZE); | ||
3671 | if (rc) { | ||
3672 | IPW_ERROR("Tx 0 queue init failed\n"); | ||
3673 | goto error; | ||
3674 | } | ||
3675 | rc = ipw_queue_tx_init(priv, &priv->txq[1], nTx, | ||
3676 | CX2_TX_QUEUE_1_READ_INDEX, | ||
3677 | CX2_TX_QUEUE_1_WRITE_INDEX, | ||
3678 | CX2_TX_QUEUE_1_BD_BASE, | ||
3679 | CX2_TX_QUEUE_1_BD_SIZE); | ||
3680 | if (rc) { | ||
3681 | IPW_ERROR("Tx 1 queue init failed\n"); | ||
3682 | goto error; | ||
3683 | } | ||
3684 | rc = ipw_queue_tx_init(priv, &priv->txq[2], nTx, | ||
3685 | CX2_TX_QUEUE_2_READ_INDEX, | ||
3686 | CX2_TX_QUEUE_2_WRITE_INDEX, | ||
3687 | CX2_TX_QUEUE_2_BD_BASE, | ||
3688 | CX2_TX_QUEUE_2_BD_SIZE); | ||
3689 | if (rc) { | ||
3690 | IPW_ERROR("Tx 2 queue init failed\n"); | ||
3691 | goto error; | ||
3692 | } | ||
3693 | rc = ipw_queue_tx_init(priv, &priv->txq[3], nTx, | ||
3694 | CX2_TX_QUEUE_3_READ_INDEX, | ||
3695 | CX2_TX_QUEUE_3_WRITE_INDEX, | ||
3696 | CX2_TX_QUEUE_3_BD_BASE, | ||
3697 | CX2_TX_QUEUE_3_BD_SIZE); | ||
3698 | if (rc) { | ||
3699 | IPW_ERROR("Tx 3 queue init failed\n"); | ||
3700 | goto error; | ||
3701 | } | ||
3702 | /* statistics */ | ||
3703 | priv->rx_bufs_min = 0; | ||
3704 | priv->rx_pend_max = 0; | ||
3705 | return rc; | ||
3706 | |||
3707 | error: | ||
3708 | ipw_tx_queue_free(priv); | ||
3709 | return rc; | ||
3710 | } | ||
3711 | |||
3712 | /** | ||
3713 | * Reclaim Tx queue entries no more used by NIC. | ||
3714 | * | ||
3715 | * When FW adwances 'R' index, all entries between old and | ||
3716 | * new 'R' index need to be reclaimed. As result, some free space | ||
3717 | * forms. If there is enough free space (> low mark), wake Tx queue. | ||
3718 | * | ||
3719 | * @note Need to protect against garbage in 'R' index | ||
3720 | * @param priv | ||
3721 | * @param txq | ||
3722 | * @param qindex | ||
3723 | * @return Number of used entries remains in the queue | ||
3724 | */ | ||
3725 | static int ipw_queue_tx_reclaim(struct ipw_priv *priv, | ||
3726 | struct clx2_tx_queue *txq, int qindex) | ||
3727 | { | ||
3728 | u32 hw_tail; | ||
3729 | int used; | ||
3730 | struct clx2_queue *q = &txq->q; | ||
3731 | |||
3732 | hw_tail = ipw_read32(priv, q->reg_r); | ||
3733 | if (hw_tail >= q->n_bd) { | ||
3734 | IPW_ERROR | ||
3735 | ("Read index for DMA queue (%d) is out of range [0-%d)\n", | ||
3736 | hw_tail, q->n_bd); | ||
3737 | goto done; | ||
3738 | } | ||
3739 | for (; q->last_used != hw_tail; | ||
3740 | q->last_used = ipw_queue_inc_wrap(q->last_used, q->n_bd)) { | ||
3741 | ipw_queue_tx_free_tfd(priv, txq); | ||
3742 | priv->tx_packets++; | ||
3743 | } | ||
3744 | done: | ||
3745 | if (ipw_queue_space(q) > q->low_mark && qindex >= 0) { | ||
3746 | __maybe_wake_tx(priv); | ||
3747 | } | ||
3748 | used = q->first_empty - q->last_used; | ||
3749 | if (used < 0) | ||
3750 | used += q->n_bd; | ||
3751 | |||
3752 | return used; | ||
3753 | } | ||
3754 | |||
3755 | static int ipw_queue_tx_hcmd(struct ipw_priv *priv, int hcmd, void *buf, | ||
3756 | int len, int sync) | ||
3757 | { | ||
3758 | struct clx2_tx_queue *txq = &priv->txq_cmd; | ||
3759 | struct clx2_queue *q = &txq->q; | ||
3760 | struct tfd_frame *tfd; | ||
3761 | |||
3762 | if (ipw_queue_space(q) < (sync ? 1 : 2)) { | ||
3763 | IPW_ERROR("No space for Tx\n"); | ||
3764 | return -EBUSY; | ||
3765 | } | ||
3766 | |||
3767 | tfd = &txq->bd[q->first_empty]; | ||
3768 | txq->txb[q->first_empty] = NULL; | ||
3769 | |||
3770 | memset(tfd, 0, sizeof(*tfd)); | ||
3771 | tfd->control_flags.message_type = TX_HOST_COMMAND_TYPE; | ||
3772 | tfd->control_flags.control_bits = TFD_NEED_IRQ_MASK; | ||
3773 | priv->hcmd_seq++; | ||
3774 | tfd->u.cmd.index = hcmd; | ||
3775 | tfd->u.cmd.length = len; | ||
3776 | memcpy(tfd->u.cmd.payload, buf, len); | ||
3777 | q->first_empty = ipw_queue_inc_wrap(q->first_empty, q->n_bd); | ||
3778 | ipw_write32(priv, q->reg_w, q->first_empty); | ||
3779 | _ipw_read32(priv, 0x90); | ||
3780 | |||
3781 | return 0; | ||
3782 | } | ||
3783 | |||
3784 | |||
3785 | |||
3786 | /* | ||
3787 | * Rx theory of operation | ||
3788 | * | ||
3789 | * The host allocates 32 DMA target addresses and passes the host address | ||
3790 | * to the firmware at register CX2_RFDS_TABLE_LOWER + N * RFD_SIZE where N is | ||
3791 | * 0 to 31 | ||
3792 | * | ||
3793 | * Rx Queue Indexes | ||
3794 | * The host/firmware share two index registers for managing the Rx buffers. | ||
3795 | * | ||
3796 | * The READ index maps to the first position that the firmware may be writing | ||
3797 | * to -- the driver can read up to (but not including) this position and get | ||
3798 | * good data. | ||
3799 | * The READ index is managed by the firmware once the card is enabled. | ||
3800 | * | ||
3801 | * The WRITE index maps to the last position the driver has read from -- the | ||
3802 | * position preceding WRITE is the last slot the firmware can place a packet. | ||
3803 | * | ||
3804 | * The queue is empty (no good data) if WRITE = READ - 1, and is full if | ||
3805 | * WRITE = READ. | ||
3806 | * | ||
3807 | * During initialization the host sets up the READ queue position to the first | ||
3808 | * INDEX position, and WRITE to the last (READ - 1 wrapped) | ||
3809 | * | ||
3810 | * When the firmware places a packet in a buffer it will advance the READ index | ||
3811 | * and fire the RX interrupt. The driver can then query the READ index and | ||
3812 | * process as many packets as possible, moving the WRITE index forward as it | ||
3813 | * resets the Rx queue buffers with new memory. | ||
3814 | * | ||
3815 | * The management in the driver is as follows: | ||
3816 | * + A list of pre-allocated SKBs is stored in ipw->rxq->rx_free. When | ||
3817 | * ipw->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled | ||
3818 | * to replensish the ipw->rxq->rx_free. | ||
3819 | * + In ipw_rx_queue_replenish (scheduled) if 'processed' != 'read' then the | ||
3820 | * ipw->rxq is replenished and the READ INDEX is updated (updating the | ||
3821 | * 'processed' and 'read' driver indexes as well) | ||
3822 | * + A received packet is processed and handed to the kernel network stack, | ||
3823 | * detached from the ipw->rxq. The driver 'processed' index is updated. | ||
3824 | * + The Host/Firmware ipw->rxq is replenished at tasklet time from the rx_free | ||
3825 | * list. If there are no allocated buffers in ipw->rxq->rx_free, the READ | ||
3826 | * INDEX is not incremented and ipw->status(RX_STALLED) is set. If there | ||
3827 | * were enough free buffers and RX_STALLED is set it is cleared. | ||
3828 | * | ||
3829 | * | ||
3830 | * Driver sequence: | ||
3831 | * | ||
3832 | * ipw_rx_queue_alloc() Allocates rx_free | ||
3833 | * ipw_rx_queue_replenish() Replenishes rx_free list from rx_used, and calls | ||
3834 | * ipw_rx_queue_restock | ||
3835 | * ipw_rx_queue_restock() Moves available buffers from rx_free into Rx | ||
3836 | * queue, updates firmware pointers, and updates | ||
3837 | * the WRITE index. If insufficient rx_free buffers | ||
3838 | * are available, schedules ipw_rx_queue_replenish | ||
3839 | * | ||
3840 | * -- enable interrupts -- | ||
3841 | * ISR - ipw_rx() Detach ipw_rx_mem_buffers from pool up to the | ||
3842 | * READ INDEX, detaching the SKB from the pool. | ||
3843 | * Moves the packet buffer from queue to rx_used. | ||
3844 | * Calls ipw_rx_queue_restock to refill any empty | ||
3845 | * slots. | ||
3846 | * ... | ||
3847 | * | ||
3848 | */ | ||
3849 | |||
3850 | /* | ||
3851 | * If there are slots in the RX queue that need to be restocked, | ||
3852 | * and we have free pre-allocated buffers, fill the ranks as much | ||
3853 | * as we can pulling from rx_free. | ||
3854 | * | ||
3855 | * This moves the 'write' index forward to catch up with 'processed', and | ||
3856 | * also updates the memory address in the firmware to reference the new | ||
3857 | * target buffer. | ||
3858 | */ | ||
3859 | static void ipw_rx_queue_restock(struct ipw_priv *priv) | ||
3860 | { | ||
3861 | struct ipw_rx_queue *rxq = priv->rxq; | ||
3862 | struct list_head *element; | ||
3863 | struct ipw_rx_mem_buffer *rxb; | ||
3864 | unsigned long flags; | ||
3865 | int write; | ||
3866 | |||
3867 | spin_lock_irqsave(&rxq->lock, flags); | ||
3868 | write = rxq->write; | ||
3869 | while ((rxq->write != rxq->processed) && (rxq->free_count)) { | ||
3870 | element = rxq->rx_free.next; | ||
3871 | rxb = list_entry(element, struct ipw_rx_mem_buffer, list); | ||
3872 | list_del(element); | ||
3873 | |||
3874 | ipw_write32(priv, CX2_RFDS_TABLE_LOWER + rxq->write * RFD_SIZE, | ||
3875 | rxb->dma_addr); | ||
3876 | rxq->queue[rxq->write] = rxb; | ||
3877 | rxq->write = (rxq->write + 1) % RX_QUEUE_SIZE; | ||
3878 | rxq->free_count--; | ||
3879 | } | ||
3880 | spin_unlock_irqrestore(&rxq->lock, flags); | ||
3881 | |||
3882 | /* If the pre-allocated buffer pool is dropping low, schedule to | ||
3883 | * refill it */ | ||
3884 | if (rxq->free_count <= RX_LOW_WATERMARK) | ||
3885 | queue_work(priv->workqueue, &priv->rx_replenish); | ||
3886 | |||
3887 | /* If we've added more space for the firmware to place data, tell it */ | ||
3888 | if (write != rxq->write) | ||
3889 | ipw_write32(priv, CX2_RX_WRITE_INDEX, rxq->write); | ||
3890 | } | ||
3891 | |||
3892 | /* | ||
3893 | * Move all used packet from rx_used to rx_free, allocating a new SKB for each. | ||
3894 | * Also restock the Rx queue via ipw_rx_queue_restock. | ||
3895 | * | ||
3896 | * This is called as a scheduled work item (except for during intialization) | ||
3897 | */ | ||
3898 | static void ipw_rx_queue_replenish(void *data) | ||
3899 | { | ||
3900 | struct ipw_priv *priv = data; | ||
3901 | struct ipw_rx_queue *rxq = priv->rxq; | ||
3902 | struct list_head *element; | ||
3903 | struct ipw_rx_mem_buffer *rxb; | ||
3904 | unsigned long flags; | ||
3905 | |||
3906 | spin_lock_irqsave(&rxq->lock, flags); | ||
3907 | while (!list_empty(&rxq->rx_used)) { | ||
3908 | element = rxq->rx_used.next; | ||
3909 | rxb = list_entry(element, struct ipw_rx_mem_buffer, list); | ||
3910 | rxb->skb = alloc_skb(CX2_RX_BUF_SIZE, GFP_ATOMIC); | ||
3911 | if (!rxb->skb) { | ||
3912 | printk(KERN_CRIT "%s: Can not allocate SKB buffers.\n", | ||
3913 | priv->net_dev->name); | ||
3914 | /* We don't reschedule replenish work here -- we will | ||
3915 | * call the restock method and if it still needs | ||
3916 | * more buffers it will schedule replenish */ | ||
3917 | break; | ||
3918 | } | ||
3919 | list_del(element); | ||
3920 | |||
3921 | rxb->rxb = (struct ipw_rx_buffer *)rxb->skb->data; | ||
3922 | rxb->dma_addr = pci_map_single( | ||
3923 | priv->pci_dev, rxb->skb->data, CX2_RX_BUF_SIZE, | ||
3924 | PCI_DMA_FROMDEVICE); | ||
3925 | |||
3926 | list_add_tail(&rxb->list, &rxq->rx_free); | ||
3927 | rxq->free_count++; | ||
3928 | } | ||
3929 | spin_unlock_irqrestore(&rxq->lock, flags); | ||
3930 | |||
3931 | ipw_rx_queue_restock(priv); | ||
3932 | } | ||
3933 | |||
3934 | /* Assumes that the skb field of the buffers in 'pool' is kept accurate. | ||
3935 | * If an SKB has been detached, the POOL needs to have it's SKB set to NULL | ||
3936 | * This free routine walks the list of POOL entries and if SKB is set to | ||
3937 | * non NULL it is unmapped and freed | ||
3938 | */ | ||
3939 | static void ipw_rx_queue_free(struct ipw_priv *priv, | ||
3940 | struct ipw_rx_queue *rxq) | ||
3941 | { | ||
3942 | int i; | ||
3943 | |||
3944 | if (!rxq) | ||
3945 | return; | ||
3946 | |||
3947 | for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) { | ||
3948 | if (rxq->pool[i].skb != NULL) { | ||
3949 | pci_unmap_single(priv->pci_dev, rxq->pool[i].dma_addr, | ||
3950 | CX2_RX_BUF_SIZE, | ||
3951 | PCI_DMA_FROMDEVICE); | ||
3952 | dev_kfree_skb(rxq->pool[i].skb); | ||
3953 | } | ||
3954 | } | ||
3955 | |||
3956 | kfree(rxq); | ||
3957 | } | ||
3958 | |||
3959 | static struct ipw_rx_queue *ipw_rx_queue_alloc(struct ipw_priv *priv) | ||
3960 | { | ||
3961 | struct ipw_rx_queue *rxq; | ||
3962 | int i; | ||
3963 | |||
3964 | rxq = (struct ipw_rx_queue *)kmalloc(sizeof(*rxq), GFP_KERNEL); | ||
3965 | memset(rxq, 0, sizeof(*rxq)); | ||
3966 | spin_lock_init(&rxq->lock); | ||
3967 | INIT_LIST_HEAD(&rxq->rx_free); | ||
3968 | INIT_LIST_HEAD(&rxq->rx_used); | ||
3969 | |||
3970 | /* Fill the rx_used queue with _all_ of the Rx buffers */ | ||
3971 | for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) | ||
3972 | list_add_tail(&rxq->pool[i].list, &rxq->rx_used); | ||
3973 | |||
3974 | /* Set us so that we have processed and used all buffers, but have | ||
3975 | * not restocked the Rx queue with fresh buffers */ | ||
3976 | rxq->read = rxq->write = 0; | ||
3977 | rxq->processed = RX_QUEUE_SIZE - 1; | ||
3978 | rxq->free_count = 0; | ||
3979 | |||
3980 | return rxq; | ||
3981 | } | ||
3982 | |||
3983 | static int ipw_is_rate_in_mask(struct ipw_priv *priv, int ieee_mode, u8 rate) | ||
3984 | { | ||
3985 | rate &= ~IEEE80211_BASIC_RATE_MASK; | ||
3986 | if (ieee_mode == IEEE_A) { | ||
3987 | switch (rate) { | ||
3988 | case IEEE80211_OFDM_RATE_6MB: | ||
3989 | return priv->rates_mask & IEEE80211_OFDM_RATE_6MB_MASK ? | ||
3990 | 1 : 0; | ||
3991 | case IEEE80211_OFDM_RATE_9MB: | ||
3992 | return priv->rates_mask & IEEE80211_OFDM_RATE_9MB_MASK ? | ||
3993 | 1 : 0; | ||
3994 | case IEEE80211_OFDM_RATE_12MB: | ||
3995 | return priv->rates_mask & IEEE80211_OFDM_RATE_12MB_MASK ? | ||
3996 | 1 : 0; | ||
3997 | case IEEE80211_OFDM_RATE_18MB: | ||
3998 | return priv->rates_mask & IEEE80211_OFDM_RATE_18MB_MASK ? | ||
3999 | 1 : 0; | ||
4000 | case IEEE80211_OFDM_RATE_24MB: | ||
4001 | return priv->rates_mask & IEEE80211_OFDM_RATE_24MB_MASK ? | ||
4002 | 1 : 0; | ||
4003 | case IEEE80211_OFDM_RATE_36MB: | ||
4004 | return priv->rates_mask & IEEE80211_OFDM_RATE_36MB_MASK ? | ||
4005 | 1 : 0; | ||
4006 | case IEEE80211_OFDM_RATE_48MB: | ||
4007 | return priv->rates_mask & IEEE80211_OFDM_RATE_48MB_MASK ? | ||
4008 | 1 : 0; | ||
4009 | case IEEE80211_OFDM_RATE_54MB: | ||
4010 | return priv->rates_mask & IEEE80211_OFDM_RATE_54MB_MASK ? | ||
4011 | 1 : 0; | ||
4012 | default: | ||
4013 | return 0; | ||
4014 | } | ||
4015 | } | ||
4016 | |||
4017 | /* B and G mixed */ | ||
4018 | switch (rate) { | ||
4019 | case IEEE80211_CCK_RATE_1MB: | ||
4020 | return priv->rates_mask & IEEE80211_CCK_RATE_1MB_MASK ? 1 : 0; | ||
4021 | case IEEE80211_CCK_RATE_2MB: | ||
4022 | return priv->rates_mask & IEEE80211_CCK_RATE_2MB_MASK ? 1 : 0; | ||
4023 | case IEEE80211_CCK_RATE_5MB: | ||
4024 | return priv->rates_mask & IEEE80211_CCK_RATE_5MB_MASK ? 1 : 0; | ||
4025 | case IEEE80211_CCK_RATE_11MB: | ||
4026 | return priv->rates_mask & IEEE80211_CCK_RATE_11MB_MASK ? 1 : 0; | ||
4027 | } | ||
4028 | |||
4029 | /* If we are limited to B modulations, bail at this point */ | ||
4030 | if (ieee_mode == IEEE_B) | ||
4031 | return 0; | ||
4032 | |||
4033 | /* G */ | ||
4034 | switch (rate) { | ||
4035 | case IEEE80211_OFDM_RATE_6MB: | ||
4036 | return priv->rates_mask & IEEE80211_OFDM_RATE_6MB_MASK ? 1 : 0; | ||
4037 | case IEEE80211_OFDM_RATE_9MB: | ||
4038 | return priv->rates_mask & IEEE80211_OFDM_RATE_9MB_MASK ? 1 : 0; | ||
4039 | case IEEE80211_OFDM_RATE_12MB: | ||
4040 | return priv->rates_mask & IEEE80211_OFDM_RATE_12MB_MASK ? 1 : 0; | ||
4041 | case IEEE80211_OFDM_RATE_18MB: | ||
4042 | return priv->rates_mask & IEEE80211_OFDM_RATE_18MB_MASK ? 1 : 0; | ||
4043 | case IEEE80211_OFDM_RATE_24MB: | ||
4044 | return priv->rates_mask & IEEE80211_OFDM_RATE_24MB_MASK ? 1 : 0; | ||
4045 | case IEEE80211_OFDM_RATE_36MB: | ||
4046 | return priv->rates_mask & IEEE80211_OFDM_RATE_36MB_MASK ? 1 : 0; | ||
4047 | case IEEE80211_OFDM_RATE_48MB: | ||
4048 | return priv->rates_mask & IEEE80211_OFDM_RATE_48MB_MASK ? 1 : 0; | ||
4049 | case IEEE80211_OFDM_RATE_54MB: | ||
4050 | return priv->rates_mask & IEEE80211_OFDM_RATE_54MB_MASK ? 1 : 0; | ||
4051 | } | ||
4052 | |||
4053 | return 0; | ||
4054 | } | ||
4055 | |||
4056 | static int ipw_compatible_rates(struct ipw_priv *priv, | ||
4057 | const struct ieee80211_network *network, | ||
4058 | struct ipw_supported_rates *rates) | ||
4059 | { | ||
4060 | int num_rates, i; | ||
4061 | |||
4062 | memset(rates, 0, sizeof(*rates)); | ||
4063 | num_rates = min(network->rates_len, (u8)IPW_MAX_RATES); | ||
4064 | rates->num_rates = 0; | ||
4065 | for (i = 0; i < num_rates; i++) { | ||
4066 | if (!ipw_is_rate_in_mask(priv, network->mode, network->rates[i])) { | ||
4067 | IPW_DEBUG_SCAN("Rate %02X masked : 0x%08X\n", | ||
4068 | network->rates[i], priv->rates_mask); | ||
4069 | continue; | ||
4070 | } | ||
4071 | |||
4072 | rates->supported_rates[rates->num_rates++] = network->rates[i]; | ||
4073 | } | ||
4074 | |||
4075 | num_rates = min(network->rates_ex_len, (u8)(IPW_MAX_RATES - num_rates)); | ||
4076 | for (i = 0; i < num_rates; i++) { | ||
4077 | if (!ipw_is_rate_in_mask(priv, network->mode, network->rates_ex[i])) { | ||
4078 | IPW_DEBUG_SCAN("Rate %02X masked : 0x%08X\n", | ||
4079 | network->rates_ex[i], priv->rates_mask); | ||
4080 | continue; | ||
4081 | } | ||
4082 | |||
4083 | rates->supported_rates[rates->num_rates++] = network->rates_ex[i]; | ||
4084 | } | ||
4085 | |||
4086 | return rates->num_rates; | ||
4087 | } | ||
4088 | |||
4089 | static inline void ipw_copy_rates(struct ipw_supported_rates *dest, | ||
4090 | const struct ipw_supported_rates *src) | ||
4091 | { | ||
4092 | u8 i; | ||
4093 | for (i = 0; i < src->num_rates; i++) | ||
4094 | dest->supported_rates[i] = src->supported_rates[i]; | ||
4095 | dest->num_rates = src->num_rates; | ||
4096 | } | ||
4097 | |||
4098 | /* TODO: Look at sniffed packets in the air to determine if the basic rate | ||
4099 | * mask should ever be used -- right now all callers to add the scan rates are | ||
4100 | * set with the modulation = CCK, so BASIC_RATE_MASK is never set... */ | ||
4101 | static void ipw_add_cck_scan_rates(struct ipw_supported_rates *rates, | ||
4102 | u8 modulation, u32 rate_mask) | ||
4103 | { | ||
4104 | u8 basic_mask = (IEEE80211_OFDM_MODULATION == modulation) ? | ||
4105 | IEEE80211_BASIC_RATE_MASK : 0; | ||
4106 | |||
4107 | if (rate_mask & IEEE80211_CCK_RATE_1MB_MASK) | ||
4108 | rates->supported_rates[rates->num_rates++] = | ||
4109 | IEEE80211_BASIC_RATE_MASK | IEEE80211_CCK_RATE_1MB; | ||
4110 | |||
4111 | if (rate_mask & IEEE80211_CCK_RATE_2MB_MASK) | ||
4112 | rates->supported_rates[rates->num_rates++] = | ||
4113 | IEEE80211_BASIC_RATE_MASK | IEEE80211_CCK_RATE_2MB; | ||
4114 | |||
4115 | if (rate_mask & IEEE80211_CCK_RATE_5MB_MASK) | ||
4116 | rates->supported_rates[rates->num_rates++] = basic_mask | | ||
4117 | IEEE80211_CCK_RATE_5MB; | ||
4118 | |||
4119 | if (rate_mask & IEEE80211_CCK_RATE_11MB_MASK) | ||
4120 | rates->supported_rates[rates->num_rates++] = basic_mask | | ||
4121 | IEEE80211_CCK_RATE_11MB; | ||
4122 | } | ||
4123 | |||
4124 | static void ipw_add_ofdm_scan_rates(struct ipw_supported_rates *rates, | ||
4125 | u8 modulation, u32 rate_mask) | ||
4126 | { | ||
4127 | u8 basic_mask = (IEEE80211_OFDM_MODULATION == modulation) ? | ||
4128 | IEEE80211_BASIC_RATE_MASK : 0; | ||
4129 | |||
4130 | if (rate_mask & IEEE80211_OFDM_RATE_6MB_MASK) | ||
4131 | rates->supported_rates[rates->num_rates++] = basic_mask | | ||
4132 | IEEE80211_OFDM_RATE_6MB; | ||
4133 | |||
4134 | if (rate_mask & IEEE80211_OFDM_RATE_9MB_MASK) | ||
4135 | rates->supported_rates[rates->num_rates++] = | ||
4136 | IEEE80211_OFDM_RATE_9MB; | ||
4137 | |||
4138 | if (rate_mask & IEEE80211_OFDM_RATE_12MB_MASK) | ||
4139 | rates->supported_rates[rates->num_rates++] = basic_mask | | ||
4140 | IEEE80211_OFDM_RATE_12MB; | ||
4141 | |||
4142 | if (rate_mask & IEEE80211_OFDM_RATE_18MB_MASK) | ||
4143 | rates->supported_rates[rates->num_rates++] = | ||
4144 | IEEE80211_OFDM_RATE_18MB; | ||
4145 | |||
4146 | if (rate_mask & IEEE80211_OFDM_RATE_24MB_MASK) | ||
4147 | rates->supported_rates[rates->num_rates++] = basic_mask | | ||
4148 | IEEE80211_OFDM_RATE_24MB; | ||
4149 | |||
4150 | if (rate_mask & IEEE80211_OFDM_RATE_36MB_MASK) | ||
4151 | rates->supported_rates[rates->num_rates++] = | ||
4152 | IEEE80211_OFDM_RATE_36MB; | ||
4153 | |||
4154 | if (rate_mask & IEEE80211_OFDM_RATE_48MB_MASK) | ||
4155 | rates->supported_rates[rates->num_rates++] = | ||
4156 | IEEE80211_OFDM_RATE_48MB; | ||
4157 | |||
4158 | if (rate_mask & IEEE80211_OFDM_RATE_54MB_MASK) | ||
4159 | rates->supported_rates[rates->num_rates++] = | ||
4160 | IEEE80211_OFDM_RATE_54MB; | ||
4161 | } | ||
4162 | |||
4163 | struct ipw_network_match { | ||
4164 | struct ieee80211_network *network; | ||
4165 | struct ipw_supported_rates rates; | ||
4166 | }; | ||
4167 | |||
4168 | static int ipw_best_network( | ||
4169 | struct ipw_priv *priv, | ||
4170 | struct ipw_network_match *match, | ||
4171 | struct ieee80211_network *network, | ||
4172 | int roaming) | ||
4173 | { | ||
4174 | struct ipw_supported_rates rates; | ||
4175 | |||
4176 | /* Verify that this network's capability is compatible with the | ||
4177 | * current mode (AdHoc or Infrastructure) */ | ||
4178 | if ((priv->ieee->iw_mode == IW_MODE_INFRA && | ||
4179 | !(network->capability & WLAN_CAPABILITY_BSS)) || | ||
4180 | (priv->ieee->iw_mode == IW_MODE_ADHOC && | ||
4181 | !(network->capability & WLAN_CAPABILITY_IBSS))) { | ||
4182 | IPW_DEBUG_ASSOC("Network '%s (" MAC_FMT ")' excluded due to " | ||
4183 | "capability mismatch.\n", | ||
4184 | escape_essid(network->ssid, network->ssid_len), | ||
4185 | MAC_ARG(network->bssid)); | ||
4186 | return 0; | ||
4187 | } | ||
4188 | |||
4189 | /* If we do not have an ESSID for this AP, we can not associate with | ||
4190 | * it */ | ||
4191 | if (network->flags & NETWORK_EMPTY_ESSID) { | ||
4192 | IPW_DEBUG_ASSOC("Network '%s (" MAC_FMT ")' excluded " | ||
4193 | "because of hidden ESSID.\n", | ||
4194 | escape_essid(network->ssid, network->ssid_len), | ||
4195 | MAC_ARG(network->bssid)); | ||
4196 | return 0; | ||
4197 | } | ||
4198 | |||
4199 | if (unlikely(roaming)) { | ||
4200 | /* If we are roaming, then ensure check if this is a valid | ||
4201 | * network to try and roam to */ | ||
4202 | if ((network->ssid_len != match->network->ssid_len) || | ||
4203 | memcmp(network->ssid, match->network->ssid, | ||
4204 | network->ssid_len)) { | ||
4205 | IPW_DEBUG_ASSOC("Netowrk '%s (" MAC_FMT ")' excluded " | ||
4206 | "because of non-network ESSID.\n", | ||
4207 | escape_essid(network->ssid, | ||
4208 | network->ssid_len), | ||
4209 | MAC_ARG(network->bssid)); | ||
4210 | return 0; | ||
4211 | } | ||
4212 | } else { | ||
4213 | /* If an ESSID has been configured then compare the broadcast | ||
4214 | * ESSID to ours */ | ||
4215 | if ((priv->config & CFG_STATIC_ESSID) && | ||
4216 | ((network->ssid_len != priv->essid_len) || | ||
4217 | memcmp(network->ssid, priv->essid, | ||
4218 | min(network->ssid_len, priv->essid_len)))) { | ||
4219 | char escaped[IW_ESSID_MAX_SIZE * 2 + 1]; | ||
4220 | strncpy(escaped, escape_essid( | ||
4221 | network->ssid, network->ssid_len), | ||
4222 | sizeof(escaped)); | ||
4223 | IPW_DEBUG_ASSOC("Network '%s (" MAC_FMT ")' excluded " | ||
4224 | "because of ESSID mismatch: '%s'.\n", | ||
4225 | escaped, MAC_ARG(network->bssid), | ||
4226 | escape_essid(priv->essid, priv->essid_len)); | ||
4227 | return 0; | ||
4228 | } | ||
4229 | } | ||
4230 | |||
4231 | /* If the old network rate is better than this one, don't bother | ||
4232 | * testing everything else. */ | ||
4233 | if (match->network && match->network->stats.rssi > | ||
4234 | network->stats.rssi) { | ||
4235 | char escaped[IW_ESSID_MAX_SIZE * 2 + 1]; | ||
4236 | strncpy(escaped, | ||
4237 | escape_essid(network->ssid, network->ssid_len), | ||
4238 | sizeof(escaped)); | ||
4239 | IPW_DEBUG_ASSOC("Network '%s (" MAC_FMT ")' excluded because " | ||
4240 | "'%s (" MAC_FMT ")' has a stronger signal.\n", | ||
4241 | escaped, MAC_ARG(network->bssid), | ||
4242 | escape_essid(match->network->ssid, | ||
4243 | match->network->ssid_len), | ||
4244 | MAC_ARG(match->network->bssid)); | ||
4245 | return 0; | ||
4246 | } | ||
4247 | |||
4248 | /* If this network has already had an association attempt within the | ||
4249 | * last 3 seconds, do not try and associate again... */ | ||
4250 | if (network->last_associate && | ||
4251 | time_after(network->last_associate + (HZ * 5UL), jiffies)) { | ||
4252 | IPW_DEBUG_ASSOC("Network '%s (" MAC_FMT ")' excluded " | ||
4253 | "because of storming (%lu since last " | ||
4254 | "assoc attempt).\n", | ||
4255 | escape_essid(network->ssid, network->ssid_len), | ||
4256 | MAC_ARG(network->bssid), | ||
4257 | (jiffies - network->last_associate) / HZ); | ||
4258 | return 0; | ||
4259 | } | ||
4260 | |||
4261 | /* Now go through and see if the requested network is valid... */ | ||
4262 | if (priv->ieee->scan_age != 0 && | ||
4263 | jiffies - network->last_scanned > priv->ieee->scan_age) { | ||
4264 | IPW_DEBUG_ASSOC("Network '%s (" MAC_FMT ")' excluded " | ||
4265 | "because of age: %lums.\n", | ||
4266 | escape_essid(network->ssid, network->ssid_len), | ||
4267 | MAC_ARG(network->bssid), | ||
4268 | (jiffies - network->last_scanned) / (HZ / 100)); | ||
4269 | return 0; | ||
4270 | } | ||
4271 | |||
4272 | if ((priv->config & CFG_STATIC_CHANNEL) && | ||
4273 | (network->channel != priv->channel)) { | ||
4274 | IPW_DEBUG_ASSOC("Network '%s (" MAC_FMT ")' excluded " | ||
4275 | "because of channel mismatch: %d != %d.\n", | ||
4276 | escape_essid(network->ssid, network->ssid_len), | ||
4277 | MAC_ARG(network->bssid), | ||
4278 | network->channel, priv->channel); | ||
4279 | return 0; | ||
4280 | } | ||
4281 | |||
4282 | /* Verify privacy compatability */ | ||
4283 | if (((priv->capability & CAP_PRIVACY_ON) ? 1 : 0) != | ||
4284 | ((network->capability & WLAN_CAPABILITY_PRIVACY) ? 1 : 0)) { | ||
4285 | IPW_DEBUG_ASSOC("Network '%s (" MAC_FMT ")' excluded " | ||
4286 | "because of privacy mismatch: %s != %s.\n", | ||
4287 | escape_essid(network->ssid, network->ssid_len), | ||
4288 | MAC_ARG(network->bssid), | ||
4289 | priv->capability & CAP_PRIVACY_ON ? "on" : | ||
4290 | "off", | ||
4291 | network->capability & | ||
4292 | WLAN_CAPABILITY_PRIVACY ?"on" : "off"); | ||
4293 | return 0; | ||
4294 | } | ||
4295 | |||
4296 | if ((priv->config & CFG_STATIC_BSSID) && | ||
4297 | memcmp(network->bssid, priv->bssid, ETH_ALEN)) { | ||
4298 | IPW_DEBUG_ASSOC("Network '%s (" MAC_FMT ")' excluded " | ||
4299 | "because of BSSID mismatch: " MAC_FMT ".\n", | ||
4300 | escape_essid(network->ssid, network->ssid_len), | ||
4301 | MAC_ARG(network->bssid), | ||
4302 | MAC_ARG(priv->bssid)); | ||
4303 | return 0; | ||
4304 | } | ||
4305 | |||
4306 | /* Filter out any incompatible freq / mode combinations */ | ||
4307 | if (!ieee80211_is_valid_mode(priv->ieee, network->mode)) { | ||
4308 | IPW_DEBUG_ASSOC("Network '%s (" MAC_FMT ")' excluded " | ||
4309 | "because of invalid frequency/mode " | ||
4310 | "combination.\n", | ||
4311 | escape_essid(network->ssid, network->ssid_len), | ||
4312 | MAC_ARG(network->bssid)); | ||
4313 | return 0; | ||
4314 | } | ||
4315 | |||
4316 | ipw_compatible_rates(priv, network, &rates); | ||
4317 | if (rates.num_rates == 0) { | ||
4318 | IPW_DEBUG_ASSOC("Network '%s (" MAC_FMT ")' excluded " | ||
4319 | "because of no compatible rates.\n", | ||
4320 | escape_essid(network->ssid, network->ssid_len), | ||
4321 | MAC_ARG(network->bssid)); | ||
4322 | return 0; | ||
4323 | } | ||
4324 | |||
4325 | /* TODO: Perform any further minimal comparititive tests. We do not | ||
4326 | * want to put too much policy logic here; intelligent scan selection | ||
4327 | * should occur within a generic IEEE 802.11 user space tool. */ | ||
4328 | |||
4329 | /* Set up 'new' AP to this network */ | ||
4330 | ipw_copy_rates(&match->rates, &rates); | ||
4331 | match->network = network; | ||
4332 | |||
4333 | IPW_DEBUG_ASSOC("Network '%s (" MAC_FMT ")' is a viable match.\n", | ||
4334 | escape_essid(network->ssid, network->ssid_len), | ||
4335 | MAC_ARG(network->bssid)); | ||
4336 | |||
4337 | return 1; | ||
4338 | } | ||
4339 | |||
4340 | |||
4341 | static void ipw_adhoc_create(struct ipw_priv *priv, | ||
4342 | struct ieee80211_network *network) | ||
4343 | { | ||
4344 | /* | ||
4345 | * For the purposes of scanning, we can set our wireless mode | ||
4346 | * to trigger scans across combinations of bands, but when it | ||
4347 | * comes to creating a new ad-hoc network, we have tell the FW | ||
4348 | * exactly which band to use. | ||
4349 | * | ||
4350 | * We also have the possibility of an invalid channel for the | ||
4351 | * chossen band. Attempting to create a new ad-hoc network | ||
4352 | * with an invalid channel for wireless mode will trigger a | ||
4353 | * FW fatal error. | ||
4354 | */ | ||
4355 | network->mode = is_valid_channel(priv->ieee->mode, priv->channel); | ||
4356 | if (network->mode) { | ||
4357 | network->channel = priv->channel; | ||
4358 | } else { | ||
4359 | IPW_WARNING("Overriding invalid channel\n"); | ||
4360 | if (priv->ieee->mode & IEEE_A) { | ||
4361 | network->mode = IEEE_A; | ||
4362 | priv->channel = band_a_active_channel[0]; | ||
4363 | } else if (priv->ieee->mode & IEEE_G) { | ||
4364 | network->mode = IEEE_G; | ||
4365 | priv->channel = band_b_active_channel[0]; | ||
4366 | } else { | ||
4367 | network->mode = IEEE_B; | ||
4368 | priv->channel = band_b_active_channel[0]; | ||
4369 | } | ||
4370 | } | ||
4371 | |||
4372 | network->channel = priv->channel; | ||
4373 | priv->config |= CFG_ADHOC_PERSIST; | ||
4374 | ipw_create_bssid(priv, network->bssid); | ||
4375 | network->ssid_len = priv->essid_len; | ||
4376 | memcpy(network->ssid, priv->essid, priv->essid_len); | ||
4377 | memset(&network->stats, 0, sizeof(network->stats)); | ||
4378 | network->capability = WLAN_CAPABILITY_IBSS; | ||
4379 | if (priv->capability & CAP_PRIVACY_ON) | ||
4380 | network->capability |= WLAN_CAPABILITY_PRIVACY; | ||
4381 | network->rates_len = min(priv->rates.num_rates, MAX_RATES_LENGTH); | ||
4382 | memcpy(network->rates, priv->rates.supported_rates, | ||
4383 | network->rates_len); | ||
4384 | network->rates_ex_len = priv->rates.num_rates - network->rates_len; | ||
4385 | memcpy(network->rates_ex, | ||
4386 | &priv->rates.supported_rates[network->rates_len], | ||
4387 | network->rates_ex_len); | ||
4388 | network->last_scanned = 0; | ||
4389 | network->flags = 0; | ||
4390 | network->last_associate = 0; | ||
4391 | network->time_stamp[0] = 0; | ||
4392 | network->time_stamp[1] = 0; | ||
4393 | network->beacon_interval = 100; /* Default */ | ||
4394 | network->listen_interval = 10; /* Default */ | ||
4395 | network->atim_window = 0; /* Default */ | ||
4396 | #ifdef CONFIG_IEEE80211_WPA | ||
4397 | network->wpa_ie_len = 0; | ||
4398 | network->rsn_ie_len = 0; | ||
4399 | #endif /* CONFIG_IEEE80211_WPA */ | ||
4400 | } | ||
4401 | |||
4402 | static void ipw_send_wep_keys(struct ipw_priv *priv) | ||
4403 | { | ||
4404 | struct ipw_wep_key *key; | ||
4405 | int i; | ||
4406 | struct host_cmd cmd = { | ||
4407 | .cmd = IPW_CMD_WEP_KEY, | ||
4408 | .len = sizeof(*key) | ||
4409 | }; | ||
4410 | |||
4411 | key = (struct ipw_wep_key *)&cmd.param; | ||
4412 | key->cmd_id = DINO_CMD_WEP_KEY; | ||
4413 | key->seq_num = 0; | ||
4414 | |||
4415 | for (i = 0; i < 4; i++) { | ||
4416 | key->key_index = i; | ||
4417 | if (!(priv->sec.flags & (1 << i))) { | ||
4418 | key->key_size = 0; | ||
4419 | } else { | ||
4420 | key->key_size = priv->sec.key_sizes[i]; | ||
4421 | memcpy(key->key, priv->sec.keys[i], key->key_size); | ||
4422 | } | ||
4423 | |||
4424 | if (ipw_send_cmd(priv, &cmd)) { | ||
4425 | IPW_ERROR("failed to send WEP_KEY command\n"); | ||
4426 | return; | ||
4427 | } | ||
4428 | } | ||
4429 | } | ||
4430 | |||
4431 | static void ipw_adhoc_check(void *data) | ||
4432 | { | ||
4433 | struct ipw_priv *priv = data; | ||
4434 | |||
4435 | if (priv->missed_adhoc_beacons++ > priv->missed_beacon_threshold && | ||
4436 | !(priv->config & CFG_ADHOC_PERSIST)) { | ||
4437 | IPW_DEBUG_SCAN("Disassociating due to missed beacons\n"); | ||
4438 | ipw_remove_current_network(priv); | ||
4439 | ipw_disassociate(priv); | ||
4440 | return; | ||
4441 | } | ||
4442 | |||
4443 | queue_delayed_work(priv->workqueue, &priv->adhoc_check, | ||
4444 | priv->assoc_request.beacon_interval); | ||
4445 | } | ||
4446 | |||
4447 | #ifdef CONFIG_IPW_DEBUG | ||
4448 | static void ipw_debug_config(struct ipw_priv *priv) | ||
4449 | { | ||
4450 | IPW_DEBUG_INFO("Scan completed, no valid APs matched " | ||
4451 | "[CFG 0x%08X]\n", priv->config); | ||
4452 | if (priv->config & CFG_STATIC_CHANNEL) | ||
4453 | IPW_DEBUG_INFO("Channel locked to %d\n", | ||
4454 | priv->channel); | ||
4455 | else | ||
4456 | IPW_DEBUG_INFO("Channel unlocked.\n"); | ||
4457 | if (priv->config & CFG_STATIC_ESSID) | ||
4458 | IPW_DEBUG_INFO("ESSID locked to '%s'\n", | ||
4459 | escape_essid(priv->essid, | ||
4460 | priv->essid_len)); | ||
4461 | else | ||
4462 | IPW_DEBUG_INFO("ESSID unlocked.\n"); | ||
4463 | if (priv->config & CFG_STATIC_BSSID) | ||
4464 | IPW_DEBUG_INFO("BSSID locked to %d\n", priv->channel); | ||
4465 | else | ||
4466 | IPW_DEBUG_INFO("BSSID unlocked.\n"); | ||
4467 | if (priv->capability & CAP_PRIVACY_ON) | ||
4468 | IPW_DEBUG_INFO("PRIVACY on\n"); | ||
4469 | else | ||
4470 | IPW_DEBUG_INFO("PRIVACY off\n"); | ||
4471 | IPW_DEBUG_INFO("RATE MASK: 0x%08X\n", priv->rates_mask); | ||
4472 | } | ||
4473 | #else | ||
4474 | #define ipw_debug_config(x) do {} while (0); | ||
4475 | #endif | ||
4476 | |||
4477 | static inline void ipw_set_fixed_rate(struct ipw_priv *priv, | ||
4478 | struct ieee80211_network *network) | ||
4479 | { | ||
4480 | /* TODO: Verify that this works... */ | ||
4481 | struct ipw_fixed_rate fr = { | ||
4482 | .tx_rates = priv->rates_mask | ||
4483 | }; | ||
4484 | u32 reg; | ||
4485 | u16 mask = 0; | ||
4486 | |||
4487 | /* Identify 'current FW band' and match it with the fixed | ||
4488 | * Tx rates */ | ||
4489 | |||
4490 | switch (priv->ieee->freq_band) { | ||
4491 | case IEEE80211_52GHZ_BAND: /* A only */ | ||
4492 | /* IEEE_A */ | ||
4493 | if (priv->rates_mask & ~IEEE80211_OFDM_RATES_MASK) { | ||
4494 | /* Invalid fixed rate mask */ | ||
4495 | fr.tx_rates = 0; | ||
4496 | break; | ||
4497 | } | ||
4498 | |||
4499 | fr.tx_rates >>= IEEE80211_OFDM_SHIFT_MASK_A; | ||
4500 | break; | ||
4501 | |||
4502 | default: /* 2.4Ghz or Mixed */ | ||
4503 | /* IEEE_B */ | ||
4504 | if (network->mode == IEEE_B) { | ||
4505 | if (fr.tx_rates & ~IEEE80211_CCK_RATES_MASK) { | ||
4506 | /* Invalid fixed rate mask */ | ||
4507 | fr.tx_rates = 0; | ||
4508 | } | ||
4509 | break; | ||
4510 | } | ||
4511 | |||
4512 | /* IEEE_G */ | ||
4513 | if (fr.tx_rates & ~(IEEE80211_CCK_RATES_MASK | | ||
4514 | IEEE80211_OFDM_RATES_MASK)) { | ||
4515 | /* Invalid fixed rate mask */ | ||
4516 | fr.tx_rates = 0; | ||
4517 | break; | ||
4518 | } | ||
4519 | |||
4520 | if (IEEE80211_OFDM_RATE_6MB_MASK & fr.tx_rates) { | ||
4521 | mask |= (IEEE80211_OFDM_RATE_6MB_MASK >> 1); | ||
4522 | fr.tx_rates &= ~IEEE80211_OFDM_RATE_6MB_MASK; | ||
4523 | } | ||
4524 | |||
4525 | if (IEEE80211_OFDM_RATE_9MB_MASK & fr.tx_rates) { | ||
4526 | mask |= (IEEE80211_OFDM_RATE_9MB_MASK >> 1); | ||
4527 | fr.tx_rates &= ~IEEE80211_OFDM_RATE_9MB_MASK; | ||
4528 | } | ||
4529 | |||
4530 | if (IEEE80211_OFDM_RATE_12MB_MASK & fr.tx_rates) { | ||
4531 | mask |= (IEEE80211_OFDM_RATE_12MB_MASK >> 1); | ||
4532 | fr.tx_rates &= ~IEEE80211_OFDM_RATE_12MB_MASK; | ||
4533 | } | ||
4534 | |||
4535 | fr.tx_rates |= mask; | ||
4536 | break; | ||
4537 | } | ||
4538 | |||
4539 | reg = ipw_read32(priv, IPW_MEM_FIXED_OVERRIDE); | ||
4540 | ipw_write_reg32(priv, reg, *(u32*)&fr); | ||
4541 | } | ||
4542 | |||
4543 | static int ipw_associate_network(struct ipw_priv *priv, | ||
4544 | struct ieee80211_network *network, | ||
4545 | struct ipw_supported_rates *rates, | ||
4546 | int roaming) | ||
4547 | { | ||
4548 | int err; | ||
4549 | |||
4550 | if (priv->config & CFG_FIXED_RATE) | ||
4551 | ipw_set_fixed_rate(priv, network); | ||
4552 | |||
4553 | if (!(priv->config & CFG_STATIC_ESSID)) { | ||
4554 | priv->essid_len = min(network->ssid_len, | ||
4555 | (u8)IW_ESSID_MAX_SIZE); | ||
4556 | memcpy(priv->essid, network->ssid, priv->essid_len); | ||
4557 | } | ||
4558 | |||
4559 | network->last_associate = jiffies; | ||
4560 | |||
4561 | memset(&priv->assoc_request, 0, sizeof(priv->assoc_request)); | ||
4562 | priv->assoc_request.channel = network->channel; | ||
4563 | if ((priv->capability & CAP_PRIVACY_ON) && | ||
4564 | (priv->capability & CAP_SHARED_KEY)) { | ||
4565 | priv->assoc_request.auth_type = AUTH_SHARED_KEY; | ||
4566 | priv->assoc_request.auth_key = priv->sec.active_key; | ||
4567 | } else { | ||
4568 | priv->assoc_request.auth_type = AUTH_OPEN; | ||
4569 | priv->assoc_request.auth_key = 0; | ||
4570 | } | ||
4571 | |||
4572 | if (priv->capability & CAP_PRIVACY_ON) | ||
4573 | ipw_send_wep_keys(priv); | ||
4574 | |||
4575 | /* | ||
4576 | * It is valid for our ieee device to support multiple modes, but | ||
4577 | * when it comes to associating to a given network we have to choose | ||
4578 | * just one mode. | ||
4579 | */ | ||
4580 | if (network->mode & priv->ieee->mode & IEEE_A) | ||
4581 | priv->assoc_request.ieee_mode = IPW_A_MODE; | ||
4582 | else if (network->mode & priv->ieee->mode & IEEE_G) | ||
4583 | priv->assoc_request.ieee_mode = IPW_G_MODE; | ||
4584 | else if (network->mode & priv->ieee->mode & IEEE_B) | ||
4585 | priv->assoc_request.ieee_mode = IPW_B_MODE; | ||
4586 | |||
4587 | IPW_DEBUG_ASSOC("%sssocation attempt: '%s', channel %d, " | ||
4588 | "802.11%c [%d], enc=%s%s%s%c%c\n", | ||
4589 | roaming ? "Rea" : "A", | ||
4590 | escape_essid(priv->essid, priv->essid_len), | ||
4591 | network->channel, | ||
4592 | ipw_modes[priv->assoc_request.ieee_mode], | ||
4593 | rates->num_rates, | ||
4594 | priv->capability & CAP_PRIVACY_ON ? "on " : "off", | ||
4595 | priv->capability & CAP_PRIVACY_ON ? | ||
4596 | (priv->capability & CAP_SHARED_KEY ? "(shared)" : | ||
4597 | "(open)") : "", | ||
4598 | priv->capability & CAP_PRIVACY_ON ? " key=" : "", | ||
4599 | priv->capability & CAP_PRIVACY_ON ? | ||
4600 | '1' + priv->sec.active_key : '.', | ||
4601 | priv->capability & CAP_PRIVACY_ON ? | ||
4602 | '.' : ' '); | ||
4603 | |||
4604 | priv->assoc_request.beacon_interval = network->beacon_interval; | ||
4605 | if ((priv->ieee->iw_mode == IW_MODE_ADHOC) && | ||
4606 | (network->time_stamp[0] == 0) && | ||
4607 | (network->time_stamp[1] == 0)) { | ||
4608 | priv->assoc_request.assoc_type = HC_IBSS_START; | ||
4609 | priv->assoc_request.assoc_tsf_msw = 0; | ||
4610 | priv->assoc_request.assoc_tsf_lsw = 0; | ||
4611 | } else { | ||
4612 | if (unlikely(roaming)) | ||
4613 | priv->assoc_request.assoc_type = HC_REASSOCIATE; | ||
4614 | else | ||
4615 | priv->assoc_request.assoc_type = HC_ASSOCIATE; | ||
4616 | priv->assoc_request.assoc_tsf_msw = network->time_stamp[1]; | ||
4617 | priv->assoc_request.assoc_tsf_lsw = network->time_stamp[0]; | ||
4618 | } | ||
4619 | |||
4620 | memcpy(&priv->assoc_request.bssid, network->bssid, ETH_ALEN); | ||
4621 | |||
4622 | if (priv->ieee->iw_mode == IW_MODE_ADHOC) { | ||
4623 | memset(&priv->assoc_request.dest, 0xFF, ETH_ALEN); | ||
4624 | priv->assoc_request.atim_window = network->atim_window; | ||
4625 | } else { | ||
4626 | memcpy(&priv->assoc_request.dest, network->bssid, | ||
4627 | ETH_ALEN); | ||
4628 | priv->assoc_request.atim_window = 0; | ||
4629 | } | ||
4630 | |||
4631 | priv->assoc_request.capability = network->capability; | ||
4632 | priv->assoc_request.listen_interval = network->listen_interval; | ||
4633 | |||
4634 | err = ipw_send_ssid(priv, priv->essid, priv->essid_len); | ||
4635 | if (err) { | ||
4636 | IPW_DEBUG_HC("Attempt to send SSID command failed.\n"); | ||
4637 | return err; | ||
4638 | } | ||
4639 | |||
4640 | rates->ieee_mode = priv->assoc_request.ieee_mode; | ||
4641 | rates->purpose = IPW_RATE_CONNECT; | ||
4642 | ipw_send_supported_rates(priv, rates); | ||
4643 | |||
4644 | if (priv->assoc_request.ieee_mode == IPW_G_MODE) | ||
4645 | priv->sys_config.dot11g_auto_detection = 1; | ||
4646 | else | ||
4647 | priv->sys_config.dot11g_auto_detection = 0; | ||
4648 | err = ipw_send_system_config(priv, &priv->sys_config); | ||
4649 | if (err) { | ||
4650 | IPW_DEBUG_HC("Attempt to send sys config command failed.\n"); | ||
4651 | return err; | ||
4652 | } | ||
4653 | |||
4654 | IPW_DEBUG_ASSOC("Association sensitivity: %d\n", network->stats.rssi); | ||
4655 | err = ipw_set_sensitivity(priv, network->stats.rssi); | ||
4656 | if (err) { | ||
4657 | IPW_DEBUG_HC("Attempt to send associate command failed.\n"); | ||
4658 | return err; | ||
4659 | } | ||
4660 | |||
4661 | /* | ||
4662 | * If preemption is enabled, it is possible for the association | ||
4663 | * to complete before we return from ipw_send_associate. Therefore | ||
4664 | * we have to be sure and update our priviate data first. | ||
4665 | */ | ||
4666 | priv->channel = network->channel; | ||
4667 | memcpy(priv->bssid, network->bssid, ETH_ALEN); | ||
4668 | priv->status |= STATUS_ASSOCIATING; | ||
4669 | priv->status &= ~STATUS_SECURITY_UPDATED; | ||
4670 | |||
4671 | priv->assoc_network = network; | ||
4672 | |||
4673 | err = ipw_send_associate(priv, &priv->assoc_request); | ||
4674 | if (err) { | ||
4675 | IPW_DEBUG_HC("Attempt to send associate command failed.\n"); | ||
4676 | return err; | ||
4677 | } | ||
4678 | |||
4679 | IPW_DEBUG(IPW_DL_STATE, "associating: '%s' " MAC_FMT " \n", | ||
4680 | escape_essid(priv->essid, priv->essid_len), | ||
4681 | MAC_ARG(priv->bssid)); | ||
4682 | |||
4683 | return 0; | ||
4684 | } | ||
4685 | |||
4686 | static void ipw_roam(void *data) | ||
4687 | { | ||
4688 | struct ipw_priv *priv = data; | ||
4689 | struct ieee80211_network *network = NULL; | ||
4690 | struct ipw_network_match match = { | ||
4691 | .network = priv->assoc_network | ||
4692 | }; | ||
4693 | |||
4694 | /* The roaming process is as follows: | ||
4695 | * | ||
4696 | * 1. Missed beacon threshold triggers the roaming process by | ||
4697 | * setting the status ROAM bit and requesting a scan. | ||
4698 | * 2. When the scan completes, it schedules the ROAM work | ||
4699 | * 3. The ROAM work looks at all of the known networks for one that | ||
4700 | * is a better network than the currently associated. If none | ||
4701 | * found, the ROAM process is over (ROAM bit cleared) | ||
4702 | * 4. If a better network is found, a disassociation request is | ||
4703 | * sent. | ||
4704 | * 5. When the disassociation completes, the roam work is again | ||
4705 | * scheduled. The second time through, the driver is no longer | ||
4706 | * associated, and the newly selected network is sent an | ||
4707 | * association request. | ||
4708 | * 6. At this point ,the roaming process is complete and the ROAM | ||
4709 | * status bit is cleared. | ||
4710 | */ | ||
4711 | |||
4712 | /* If we are no longer associated, and the roaming bit is no longer | ||
4713 | * set, then we are not actively roaming, so just return */ | ||
4714 | if (!(priv->status & (STATUS_ASSOCIATED | STATUS_ROAMING))) | ||
4715 | return; | ||
4716 | |||
4717 | if (priv->status & STATUS_ASSOCIATED) { | ||
4718 | /* First pass through ROAM process -- look for a better | ||
4719 | * network */ | ||
4720 | u8 rssi = priv->assoc_network->stats.rssi; | ||
4721 | priv->assoc_network->stats.rssi = -128; | ||
4722 | list_for_each_entry(network, &priv->ieee->network_list, list) { | ||
4723 | if (network != priv->assoc_network) | ||
4724 | ipw_best_network(priv, &match, network, 1); | ||
4725 | } | ||
4726 | priv->assoc_network->stats.rssi = rssi; | ||
4727 | |||
4728 | if (match.network == priv->assoc_network) { | ||
4729 | IPW_DEBUG_ASSOC("No better APs in this network to " | ||
4730 | "roam to.\n"); | ||
4731 | priv->status &= ~STATUS_ROAMING; | ||
4732 | ipw_debug_config(priv); | ||
4733 | return; | ||
4734 | } | ||
4735 | |||
4736 | ipw_send_disassociate(priv, 1); | ||
4737 | priv->assoc_network = match.network; | ||
4738 | |||
4739 | return; | ||
4740 | } | ||
4741 | |||
4742 | /* Second pass through ROAM process -- request association */ | ||
4743 | ipw_compatible_rates(priv, priv->assoc_network, &match.rates); | ||
4744 | ipw_associate_network(priv, priv->assoc_network, &match.rates, 1); | ||
4745 | priv->status &= ~STATUS_ROAMING; | ||
4746 | } | ||
4747 | |||
4748 | static void ipw_associate(void *data) | ||
4749 | { | ||
4750 | struct ipw_priv *priv = data; | ||
4751 | |||
4752 | struct ieee80211_network *network = NULL; | ||
4753 | struct ipw_network_match match = { | ||
4754 | .network = NULL | ||
4755 | }; | ||
4756 | struct ipw_supported_rates *rates; | ||
4757 | struct list_head *element; | ||
4758 | |||
4759 | if (!(priv->config & CFG_ASSOCIATE) && | ||
4760 | !(priv->config & (CFG_STATIC_ESSID | | ||
4761 | CFG_STATIC_CHANNEL | | ||
4762 | CFG_STATIC_BSSID))) { | ||
4763 | IPW_DEBUG_ASSOC("Not attempting association (associate=0)\n"); | ||
4764 | return; | ||
4765 | } | ||
4766 | |||
4767 | list_for_each_entry(network, &priv->ieee->network_list, list) | ||
4768 | ipw_best_network(priv, &match, network, 0); | ||
4769 | |||
4770 | network = match.network; | ||
4771 | rates = &match.rates; | ||
4772 | |||
4773 | if (network == NULL && | ||
4774 | priv->ieee->iw_mode == IW_MODE_ADHOC && | ||
4775 | priv->config & CFG_ADHOC_CREATE && | ||
4776 | priv->config & CFG_STATIC_ESSID && | ||
4777 | !list_empty(&priv->ieee->network_free_list)) { | ||
4778 | element = priv->ieee->network_free_list.next; | ||
4779 | network = list_entry(element, struct ieee80211_network, | ||
4780 | list); | ||
4781 | ipw_adhoc_create(priv, network); | ||
4782 | rates = &priv->rates; | ||
4783 | list_del(element); | ||
4784 | list_add_tail(&network->list, &priv->ieee->network_list); | ||
4785 | } | ||
4786 | |||
4787 | /* If we reached the end of the list, then we don't have any valid | ||
4788 | * matching APs */ | ||
4789 | if (!network) { | ||
4790 | ipw_debug_config(priv); | ||
4791 | |||
4792 | queue_delayed_work(priv->workqueue, &priv->request_scan, | ||
4793 | SCAN_INTERVAL); | ||
4794 | |||
4795 | return; | ||
4796 | } | ||
4797 | |||
4798 | ipw_associate_network(priv, network, rates, 0); | ||
4799 | } | ||
4800 | |||
4801 | static inline void ipw_handle_data_packet(struct ipw_priv *priv, | ||
4802 | struct ipw_rx_mem_buffer *rxb, | ||
4803 | struct ieee80211_rx_stats *stats) | ||
4804 | { | ||
4805 | struct ipw_rx_packet *pkt = (struct ipw_rx_packet *)rxb->skb->data; | ||
4806 | |||
4807 | /* We received data from the HW, so stop the watchdog */ | ||
4808 | priv->net_dev->trans_start = jiffies; | ||
4809 | |||
4810 | /* We only process data packets if the | ||
4811 | * interface is open */ | ||
4812 | if (unlikely((pkt->u.frame.length + IPW_RX_FRAME_SIZE) > | ||
4813 | skb_tailroom(rxb->skb))) { | ||
4814 | priv->ieee->stats.rx_errors++; | ||
4815 | priv->wstats.discard.misc++; | ||
4816 | IPW_DEBUG_DROP("Corruption detected! Oh no!\n"); | ||
4817 | return; | ||
4818 | } else if (unlikely(!netif_running(priv->net_dev))) { | ||
4819 | priv->ieee->stats.rx_dropped++; | ||
4820 | priv->wstats.discard.misc++; | ||
4821 | IPW_DEBUG_DROP("Dropping packet while interface is not up.\n"); | ||
4822 | return; | ||
4823 | } | ||
4824 | |||
4825 | /* Advance skb->data to the start of the actual payload */ | ||
4826 | skb_reserve(rxb->skb, (u32)&pkt->u.frame.data[0] - (u32)pkt); | ||
4827 | |||
4828 | /* Set the size of the skb to the size of the frame */ | ||
4829 | skb_put(rxb->skb, pkt->u.frame.length); | ||
4830 | |||
4831 | IPW_DEBUG_RX("Rx packet of %d bytes.\n", rxb->skb->len); | ||
4832 | |||
4833 | if (!ieee80211_rx(priv->ieee, rxb->skb, stats)) | ||
4834 | priv->ieee->stats.rx_errors++; | ||
4835 | else /* ieee80211_rx succeeded, so it now owns the SKB */ | ||
4836 | rxb->skb = NULL; | ||
4837 | } | ||
4838 | |||
4839 | |||
4840 | /* | ||
4841 | * Main entry function for recieving a packet with 80211 headers. This | ||
4842 | * should be called when ever the FW has notified us that there is a new | ||
4843 | * skb in the recieve queue. | ||
4844 | */ | ||
4845 | static void ipw_rx(struct ipw_priv *priv) | ||
4846 | { | ||
4847 | struct ipw_rx_mem_buffer *rxb; | ||
4848 | struct ipw_rx_packet *pkt; | ||
4849 | struct ieee80211_hdr *header; | ||
4850 | u32 r, w, i; | ||
4851 | u8 network_packet; | ||
4852 | |||
4853 | r = ipw_read32(priv, CX2_RX_READ_INDEX); | ||
4854 | w = ipw_read32(priv, CX2_RX_WRITE_INDEX); | ||
4855 | i = (priv->rxq->processed + 1) % RX_QUEUE_SIZE; | ||
4856 | |||
4857 | while (i != r) { | ||
4858 | rxb = priv->rxq->queue[i]; | ||
4859 | #ifdef CONFIG_IPW_DEBUG | ||
4860 | if (unlikely(rxb == NULL)) { | ||
4861 | printk(KERN_CRIT "Queue not allocated!\n"); | ||
4862 | break; | ||
4863 | } | ||
4864 | #endif | ||
4865 | priv->rxq->queue[i] = NULL; | ||
4866 | |||
4867 | pci_dma_sync_single_for_cpu(priv->pci_dev, rxb->dma_addr, | ||
4868 | CX2_RX_BUF_SIZE, | ||
4869 | PCI_DMA_FROMDEVICE); | ||
4870 | |||
4871 | pkt = (struct ipw_rx_packet *)rxb->skb->data; | ||
4872 | IPW_DEBUG_RX("Packet: type=%02X seq=%02X bits=%02X\n", | ||
4873 | pkt->header.message_type, | ||
4874 | pkt->header.rx_seq_num, | ||
4875 | pkt->header.control_bits); | ||
4876 | |||
4877 | switch (pkt->header.message_type) { | ||
4878 | case RX_FRAME_TYPE: /* 802.11 frame */ { | ||
4879 | struct ieee80211_rx_stats stats = { | ||
4880 | .rssi = pkt->u.frame.rssi_dbm - | ||
4881 | IPW_RSSI_TO_DBM, | ||
4882 | .signal = pkt->u.frame.signal, | ||
4883 | .rate = pkt->u.frame.rate, | ||
4884 | .mac_time = jiffies, | ||
4885 | .received_channel = | ||
4886 | pkt->u.frame.received_channel, | ||
4887 | .freq = (pkt->u.frame.control & (1<<0)) ? | ||
4888 | IEEE80211_24GHZ_BAND : IEEE80211_52GHZ_BAND, | ||
4889 | .len = pkt->u.frame.length, | ||
4890 | }; | ||
4891 | |||
4892 | if (stats.rssi != 0) | ||
4893 | stats.mask |= IEEE80211_STATMASK_RSSI; | ||
4894 | if (stats.signal != 0) | ||
4895 | stats.mask |= IEEE80211_STATMASK_SIGNAL; | ||
4896 | if (stats.rate != 0) | ||
4897 | stats.mask |= IEEE80211_STATMASK_RATE; | ||
4898 | |||
4899 | priv->rx_packets++; | ||
4900 | |||
4901 | #ifdef CONFIG_IPW_PROMISC | ||
4902 | if (priv->ieee->iw_mode == IW_MODE_MONITOR) { | ||
4903 | ipw_handle_data_packet(priv, rxb, &stats); | ||
4904 | break; | ||
4905 | } | ||
4906 | #endif | ||
4907 | |||
4908 | header = (struct ieee80211_hdr *)(rxb->skb->data + | ||
4909 | IPW_RX_FRAME_SIZE); | ||
4910 | /* TODO: Check Ad-Hoc dest/source and make sure | ||
4911 | * that we are actually parsing these packets | ||
4912 | * correctly -- we should probably use the | ||
4913 | * frame control of the packet and disregard | ||
4914 | * the current iw_mode */ | ||
4915 | switch (priv->ieee->iw_mode) { | ||
4916 | case IW_MODE_ADHOC: | ||
4917 | network_packet = | ||
4918 | !memcmp(header->addr1, | ||
4919 | priv->net_dev->dev_addr, | ||
4920 | ETH_ALEN) || | ||
4921 | !memcmp(header->addr3, | ||
4922 | priv->bssid, ETH_ALEN) || | ||
4923 | is_broadcast_ether_addr(header->addr1) || | ||
4924 | is_multicast_ether_addr(header->addr1); | ||
4925 | break; | ||
4926 | |||
4927 | case IW_MODE_INFRA: | ||
4928 | default: | ||
4929 | network_packet = | ||
4930 | !memcmp(header->addr3, | ||
4931 | priv->bssid, ETH_ALEN) || | ||
4932 | !memcmp(header->addr1, | ||
4933 | priv->net_dev->dev_addr, | ||
4934 | ETH_ALEN) || | ||
4935 | is_broadcast_ether_addr(header->addr1) || | ||
4936 | is_multicast_ether_addr(header->addr1); | ||
4937 | break; | ||
4938 | } | ||
4939 | |||
4940 | if (network_packet && priv->assoc_network) { | ||
4941 | priv->assoc_network->stats.rssi = stats.rssi; | ||
4942 | average_add(&priv->average_rssi, | ||
4943 | stats.rssi); | ||
4944 | priv->last_rx_rssi = stats.rssi; | ||
4945 | } | ||
4946 | |||
4947 | IPW_DEBUG_RX("Frame: len=%u\n", pkt->u.frame.length); | ||
4948 | |||
4949 | if (pkt->u.frame.length < frame_hdr_len(header)) { | ||
4950 | IPW_DEBUG_DROP("Received packet is too small. " | ||
4951 | "Dropping.\n"); | ||
4952 | priv->ieee->stats.rx_errors++; | ||
4953 | priv->wstats.discard.misc++; | ||
4954 | break; | ||
4955 | } | ||
4956 | |||
4957 | switch (WLAN_FC_GET_TYPE(header->frame_ctl)) { | ||
4958 | case IEEE80211_FTYPE_MGMT: | ||
4959 | ieee80211_rx_mgt(priv->ieee, header, &stats); | ||
4960 | if (priv->ieee->iw_mode == IW_MODE_ADHOC && | ||
4961 | ((WLAN_FC_GET_STYPE(header->frame_ctl) == | ||
4962 | IEEE80211_STYPE_PROBE_RESP) || | ||
4963 | (WLAN_FC_GET_STYPE(header->frame_ctl) == | ||
4964 | IEEE80211_STYPE_BEACON)) && | ||
4965 | !memcmp(header->addr3, priv->bssid, ETH_ALEN)) | ||
4966 | ipw_add_station(priv, header->addr2); | ||
4967 | break; | ||
4968 | |||
4969 | case IEEE80211_FTYPE_CTL: | ||
4970 | break; | ||
4971 | |||
4972 | case IEEE80211_FTYPE_DATA: | ||
4973 | if (network_packet) | ||
4974 | ipw_handle_data_packet(priv, rxb, &stats); | ||
4975 | else | ||
4976 | IPW_DEBUG_DROP("Dropping: " MAC_FMT | ||
4977 | ", " MAC_FMT ", " MAC_FMT "\n", | ||
4978 | MAC_ARG(header->addr1), MAC_ARG(header->addr2), | ||
4979 | MAC_ARG(header->addr3)); | ||
4980 | break; | ||
4981 | } | ||
4982 | break; | ||
4983 | } | ||
4984 | |||
4985 | case RX_HOST_NOTIFICATION_TYPE: { | ||
4986 | IPW_DEBUG_RX("Notification: subtype=%02X flags=%02X size=%d\n", | ||
4987 | pkt->u.notification.subtype, | ||
4988 | pkt->u.notification.flags, | ||
4989 | pkt->u.notification.size); | ||
4990 | ipw_rx_notification(priv, &pkt->u.notification); | ||
4991 | break; | ||
4992 | } | ||
4993 | |||
4994 | default: | ||
4995 | IPW_DEBUG_RX("Bad Rx packet of type %d\n", | ||
4996 | pkt->header.message_type); | ||
4997 | break; | ||
4998 | } | ||
4999 | |||
5000 | /* For now we just don't re-use anything. We can tweak this | ||
5001 | * later to try and re-use notification packets and SKBs that | ||
5002 | * fail to Rx correctly */ | ||
5003 | if (rxb->skb != NULL) { | ||
5004 | dev_kfree_skb_any(rxb->skb); | ||
5005 | rxb->skb = NULL; | ||
5006 | } | ||
5007 | |||
5008 | pci_unmap_single(priv->pci_dev, rxb->dma_addr, | ||
5009 | CX2_RX_BUF_SIZE, PCI_DMA_FROMDEVICE); | ||
5010 | list_add_tail(&rxb->list, &priv->rxq->rx_used); | ||
5011 | |||
5012 | i = (i + 1) % RX_QUEUE_SIZE; | ||
5013 | } | ||
5014 | |||
5015 | /* Backtrack one entry */ | ||
5016 | priv->rxq->processed = (i ? i : RX_QUEUE_SIZE) - 1; | ||
5017 | |||
5018 | ipw_rx_queue_restock(priv); | ||
5019 | } | ||
5020 | |||
5021 | static void ipw_abort_scan(struct ipw_priv *priv) | ||
5022 | { | ||
5023 | int err; | ||
5024 | |||
5025 | if (priv->status & STATUS_SCAN_ABORTING) { | ||
5026 | IPW_DEBUG_HC("Ignoring concurrent scan abort request.\n"); | ||
5027 | return; | ||
5028 | } | ||
5029 | priv->status |= STATUS_SCAN_ABORTING; | ||
5030 | |||
5031 | err = ipw_send_scan_abort(priv); | ||
5032 | if (err) | ||
5033 | IPW_DEBUG_HC("Request to abort scan failed.\n"); | ||
5034 | } | ||
5035 | |||
5036 | static int ipw_request_scan(struct ipw_priv *priv) | ||
5037 | { | ||
5038 | struct ipw_scan_request_ext scan; | ||
5039 | int channel_index = 0; | ||
5040 | int i, err, scan_type; | ||
5041 | |||
5042 | if (priv->status & STATUS_EXIT_PENDING) { | ||
5043 | IPW_DEBUG_SCAN("Aborting scan due to device shutdown\n"); | ||
5044 | priv->status |= STATUS_SCAN_PENDING; | ||
5045 | return 0; | ||
5046 | } | ||
5047 | |||
5048 | if (priv->status & STATUS_SCANNING) { | ||
5049 | IPW_DEBUG_HC("Concurrent scan requested. Aborting first.\n"); | ||
5050 | priv->status |= STATUS_SCAN_PENDING; | ||
5051 | ipw_abort_scan(priv); | ||
5052 | return 0; | ||
5053 | } | ||
5054 | |||
5055 | if (priv->status & STATUS_SCAN_ABORTING) { | ||
5056 | IPW_DEBUG_HC("Scan request while abort pending. Queuing.\n"); | ||
5057 | priv->status |= STATUS_SCAN_PENDING; | ||
5058 | return 0; | ||
5059 | } | ||
5060 | |||
5061 | if (priv->status & STATUS_RF_KILL_MASK) { | ||
5062 | IPW_DEBUG_HC("Aborting scan due to RF Kill activation\n"); | ||
5063 | priv->status |= STATUS_SCAN_PENDING; | ||
5064 | return 0; | ||
5065 | } | ||
5066 | |||
5067 | memset(&scan, 0, sizeof(scan)); | ||
5068 | |||
5069 | scan.dwell_time[IPW_SCAN_ACTIVE_BROADCAST_SCAN] = 20; | ||
5070 | scan.dwell_time[IPW_SCAN_ACTIVE_BROADCAST_AND_DIRECT_SCAN] = 20; | ||
5071 | scan.dwell_time[IPW_SCAN_PASSIVE_FULL_DWELL_SCAN] = 20; | ||
5072 | |||
5073 | scan.full_scan_index = ieee80211_get_scans(priv->ieee); | ||
5074 | /* If we are roaming, then make this a directed scan for the current | ||
5075 | * network. Otherwise, ensure that every other scan is a fast | ||
5076 | * channel hop scan */ | ||
5077 | if ((priv->status & STATUS_ROAMING) || ( | ||
5078 | !(priv->status & STATUS_ASSOCIATED) && | ||
5079 | (priv->config & CFG_STATIC_ESSID) && | ||
5080 | (scan.full_scan_index % 2))) { | ||
5081 | err = ipw_send_ssid(priv, priv->essid, priv->essid_len); | ||
5082 | if (err) { | ||
5083 | IPW_DEBUG_HC("Attempt to send SSID command failed.\n"); | ||
5084 | return err; | ||
5085 | } | ||
5086 | |||
5087 | scan_type = IPW_SCAN_ACTIVE_BROADCAST_AND_DIRECT_SCAN; | ||
5088 | } else { | ||
5089 | scan_type = IPW_SCAN_ACTIVE_BROADCAST_SCAN; | ||
5090 | } | ||
5091 | |||
5092 | if (priv->ieee->freq_band & IEEE80211_52GHZ_BAND) { | ||
5093 | int start = channel_index; | ||
5094 | for (i = 0; i < MAX_A_CHANNELS; i++) { | ||
5095 | if (band_a_active_channel[i] == 0) | ||
5096 | break; | ||
5097 | if ((priv->status & STATUS_ASSOCIATED) && | ||
5098 | band_a_active_channel[i] == priv->channel) | ||
5099 | continue; | ||
5100 | channel_index++; | ||
5101 | scan.channels_list[channel_index] = | ||
5102 | band_a_active_channel[i]; | ||
5103 | ipw_set_scan_type(&scan, channel_index, scan_type); | ||
5104 | } | ||
5105 | |||
5106 | if (start != channel_index) { | ||
5107 | scan.channels_list[start] = (u8)(IPW_A_MODE << 6) | | ||
5108 | (channel_index - start); | ||
5109 | channel_index++; | ||
5110 | } | ||
5111 | } | ||
5112 | |||
5113 | if (priv->ieee->freq_band & IEEE80211_24GHZ_BAND) { | ||
5114 | int start = channel_index; | ||
5115 | for (i = 0; i < MAX_B_CHANNELS; i++) { | ||
5116 | if (band_b_active_channel[i] == 0) | ||
5117 | break; | ||
5118 | if ((priv->status & STATUS_ASSOCIATED) && | ||
5119 | band_b_active_channel[i] == priv->channel) | ||
5120 | continue; | ||
5121 | channel_index++; | ||
5122 | scan.channels_list[channel_index] = | ||
5123 | band_b_active_channel[i]; | ||
5124 | ipw_set_scan_type(&scan, channel_index, scan_type); | ||
5125 | } | ||
5126 | |||
5127 | if (start != channel_index) { | ||
5128 | scan.channels_list[start] = (u8)(IPW_B_MODE << 6) | | ||
5129 | (channel_index - start); | ||
5130 | } | ||
5131 | } | ||
5132 | |||
5133 | err = ipw_send_scan_request_ext(priv, &scan); | ||
5134 | if (err) { | ||
5135 | IPW_DEBUG_HC("Sending scan command failed: %08X\n", | ||
5136 | err); | ||
5137 | return -EIO; | ||
5138 | } | ||
5139 | |||
5140 | priv->status |= STATUS_SCANNING; | ||
5141 | priv->status &= ~STATUS_SCAN_PENDING; | ||
5142 | |||
5143 | return 0; | ||
5144 | } | ||
5145 | |||
5146 | /* | ||
5147 | * This file defines the Wireless Extension handlers. It does not | ||
5148 | * define any methods of hardware manipulation and relies on the | ||
5149 | * functions defined in ipw_main to provide the HW interaction. | ||
5150 | * | ||
5151 | * The exception to this is the use of the ipw_get_ordinal() | ||
5152 | * function used to poll the hardware vs. making unecessary calls. | ||
5153 | * | ||
5154 | */ | ||
5155 | |||
5156 | static int ipw_wx_get_name(struct net_device *dev, | ||
5157 | struct iw_request_info *info, | ||
5158 | union iwreq_data *wrqu, char *extra) | ||
5159 | { | ||
5160 | struct ipw_priv *priv = ieee80211_priv(dev); | ||
5161 | if (!(priv->status & STATUS_ASSOCIATED)) | ||
5162 | strcpy(wrqu->name, "unassociated"); | ||
5163 | else | ||
5164 | snprintf(wrqu->name, IFNAMSIZ, "IEEE 802.11%c", | ||
5165 | ipw_modes[priv->assoc_request.ieee_mode]); | ||
5166 | IPW_DEBUG_WX("Name: %s\n", wrqu->name); | ||
5167 | return 0; | ||
5168 | } | ||
5169 | |||
5170 | static int ipw_set_channel(struct ipw_priv *priv, u8 channel) | ||
5171 | { | ||
5172 | if (channel == 0) { | ||
5173 | IPW_DEBUG_INFO("Setting channel to ANY (0)\n"); | ||
5174 | priv->config &= ~CFG_STATIC_CHANNEL; | ||
5175 | if (!(priv->status & (STATUS_SCANNING | STATUS_ASSOCIATED | | ||
5176 | STATUS_ASSOCIATING))) { | ||
5177 | IPW_DEBUG_ASSOC("Attempting to associate with new " | ||
5178 | "parameters.\n"); | ||
5179 | ipw_associate(priv); | ||
5180 | } | ||
5181 | |||
5182 | return 0; | ||
5183 | } | ||
5184 | |||
5185 | priv->config |= CFG_STATIC_CHANNEL; | ||
5186 | |||
5187 | if (priv->channel == channel) { | ||
5188 | IPW_DEBUG_INFO( | ||
5189 | "Request to set channel to current value (%d)\n", | ||
5190 | channel); | ||
5191 | return 0; | ||
5192 | } | ||
5193 | |||
5194 | IPW_DEBUG_INFO("Setting channel to %i\n", (int)channel); | ||
5195 | priv->channel = channel; | ||
5196 | |||
5197 | /* If we are currently associated, or trying to associate | ||
5198 | * then see if this is a new channel (causing us to disassociate) */ | ||
5199 | if (priv->status & (STATUS_ASSOCIATED | STATUS_ASSOCIATING)) { | ||
5200 | IPW_DEBUG_ASSOC("Disassociating due to channel change.\n"); | ||
5201 | ipw_disassociate(priv); | ||
5202 | } else { | ||
5203 | ipw_associate(priv); | ||
5204 | } | ||
5205 | |||
5206 | return 0; | ||
5207 | } | ||
5208 | |||
5209 | static int ipw_wx_set_freq(struct net_device *dev, | ||
5210 | struct iw_request_info *info, | ||
5211 | union iwreq_data *wrqu, char *extra) | ||
5212 | { | ||
5213 | struct ipw_priv *priv = ieee80211_priv(dev); | ||
5214 | struct iw_freq *fwrq = &wrqu->freq; | ||
5215 | |||
5216 | /* if setting by freq convert to channel */ | ||
5217 | if (fwrq->e == 1) { | ||
5218 | if ((fwrq->m >= (int) 2.412e8 && | ||
5219 | fwrq->m <= (int) 2.487e8)) { | ||
5220 | int f = fwrq->m / 100000; | ||
5221 | int c = 0; | ||
5222 | |||
5223 | while ((c < REG_MAX_CHANNEL) && | ||
5224 | (f != ipw_frequencies[c])) | ||
5225 | c++; | ||
5226 | |||
5227 | /* hack to fall through */ | ||
5228 | fwrq->e = 0; | ||
5229 | fwrq->m = c + 1; | ||
5230 | } | ||
5231 | } | ||
5232 | |||
5233 | if (fwrq->e > 0 || fwrq->m > 1000) | ||
5234 | return -EOPNOTSUPP; | ||
5235 | |||
5236 | IPW_DEBUG_WX("SET Freq/Channel -> %d \n", fwrq->m); | ||
5237 | return ipw_set_channel(priv, (u8)fwrq->m); | ||
5238 | |||
5239 | return 0; | ||
5240 | } | ||
5241 | |||
5242 | |||
5243 | static int ipw_wx_get_freq(struct net_device *dev, | ||
5244 | struct iw_request_info *info, | ||
5245 | union iwreq_data *wrqu, char *extra) | ||
5246 | { | ||
5247 | struct ipw_priv *priv = ieee80211_priv(dev); | ||
5248 | |||
5249 | wrqu->freq.e = 0; | ||
5250 | |||
5251 | /* If we are associated, trying to associate, or have a statically | ||
5252 | * configured CHANNEL then return that; otherwise return ANY */ | ||
5253 | if (priv->config & CFG_STATIC_CHANNEL || | ||
5254 | priv->status & (STATUS_ASSOCIATING | STATUS_ASSOCIATED)) | ||
5255 | wrqu->freq.m = priv->channel; | ||
5256 | else | ||
5257 | wrqu->freq.m = 0; | ||
5258 | |||
5259 | IPW_DEBUG_WX("GET Freq/Channel -> %d \n", priv->channel); | ||
5260 | return 0; | ||
5261 | } | ||
5262 | |||
5263 | static int ipw_wx_set_mode(struct net_device *dev, | ||
5264 | struct iw_request_info *info, | ||
5265 | union iwreq_data *wrqu, char *extra) | ||
5266 | { | ||
5267 | struct ipw_priv *priv = ieee80211_priv(dev); | ||
5268 | int err = 0; | ||
5269 | |||
5270 | IPW_DEBUG_WX("Set MODE: %d\n", wrqu->mode); | ||
5271 | |||
5272 | if (wrqu->mode == priv->ieee->iw_mode) | ||
5273 | return 0; | ||
5274 | |||
5275 | switch (wrqu->mode) { | ||
5276 | #ifdef CONFIG_IPW_PROMISC | ||
5277 | case IW_MODE_MONITOR: | ||
5278 | #endif | ||
5279 | case IW_MODE_ADHOC: | ||
5280 | case IW_MODE_INFRA: | ||
5281 | break; | ||
5282 | case IW_MODE_AUTO: | ||
5283 | wrqu->mode = IW_MODE_INFRA; | ||
5284 | break; | ||
5285 | default: | ||
5286 | return -EINVAL; | ||
5287 | } | ||
5288 | |||
5289 | #ifdef CONFIG_IPW_PROMISC | ||
5290 | if (priv->ieee->iw_mode == IW_MODE_MONITOR) | ||
5291 | priv->net_dev->type = ARPHRD_ETHER; | ||
5292 | |||
5293 | if (wrqu->mode == IW_MODE_MONITOR) | ||
5294 | priv->net_dev->type = ARPHRD_IEEE80211; | ||
5295 | #endif /* CONFIG_IPW_PROMISC */ | ||
5296 | |||
5297 | #ifdef CONFIG_PM | ||
5298 | /* Free the existing firmware and reset the fw_loaded | ||
5299 | * flag so ipw_load() will bring in the new firmawre */ | ||
5300 | if (fw_loaded) { | ||
5301 | fw_loaded = 0; | ||
5302 | } | ||
5303 | |||
5304 | release_firmware(bootfw); | ||
5305 | release_firmware(ucode); | ||
5306 | release_firmware(firmware); | ||
5307 | bootfw = ucode = firmware = NULL; | ||
5308 | #endif | ||
5309 | |||
5310 | priv->ieee->iw_mode = wrqu->mode; | ||
5311 | ipw_adapter_restart(priv); | ||
5312 | |||
5313 | return err; | ||
5314 | } | ||
5315 | |||
5316 | static int ipw_wx_get_mode(struct net_device *dev, | ||
5317 | struct iw_request_info *info, | ||
5318 | union iwreq_data *wrqu, char *extra) | ||
5319 | { | ||
5320 | struct ipw_priv *priv = ieee80211_priv(dev); | ||
5321 | |||
5322 | wrqu->mode = priv->ieee->iw_mode; | ||
5323 | IPW_DEBUG_WX("Get MODE -> %d\n", wrqu->mode); | ||
5324 | |||
5325 | return 0; | ||
5326 | } | ||
5327 | |||
5328 | |||
5329 | #define DEFAULT_RTS_THRESHOLD 2304U | ||
5330 | #define MIN_RTS_THRESHOLD 1U | ||
5331 | #define MAX_RTS_THRESHOLD 2304U | ||
5332 | #define DEFAULT_BEACON_INTERVAL 100U | ||
5333 | #define DEFAULT_SHORT_RETRY_LIMIT 7U | ||
5334 | #define DEFAULT_LONG_RETRY_LIMIT 4U | ||
5335 | |||
5336 | /* Values are in microsecond */ | ||
5337 | static const s32 timeout_duration[] = { | ||
5338 | 350000, | ||
5339 | 250000, | ||
5340 | 75000, | ||
5341 | 37000, | ||
5342 | 25000, | ||
5343 | }; | ||
5344 | |||
5345 | static const s32 period_duration[] = { | ||
5346 | 400000, | ||
5347 | 700000, | ||
5348 | 1000000, | ||
5349 | 1000000, | ||
5350 | 1000000 | ||
5351 | }; | ||
5352 | |||
5353 | static int ipw_wx_get_range(struct net_device *dev, | ||
5354 | struct iw_request_info *info, | ||
5355 | union iwreq_data *wrqu, char *extra) | ||
5356 | { | ||
5357 | struct ipw_priv *priv = ieee80211_priv(dev); | ||
5358 | struct iw_range *range = (struct iw_range *)extra; | ||
5359 | u16 val; | ||
5360 | int i; | ||
5361 | |||
5362 | wrqu->data.length = sizeof(*range); | ||
5363 | memset(range, 0, sizeof(*range)); | ||
5364 | |||
5365 | /* 54Mbs == ~27 Mb/s real (802.11g) */ | ||
5366 | range->throughput = 27 * 1000 * 1000; | ||
5367 | |||
5368 | range->max_qual.qual = 100; | ||
5369 | /* TODO: Find real max RSSI and stick here */ | ||
5370 | range->max_qual.level = 0; | ||
5371 | range->max_qual.noise = 0; | ||
5372 | range->max_qual.updated = 7; /* Updated all three */ | ||
5373 | |||
5374 | range->avg_qual.qual = 70; | ||
5375 | /* TODO: Find real 'good' to 'bad' threshol value for RSSI */ | ||
5376 | range->avg_qual.level = 0; /* FIXME to real average level */ | ||
5377 | range->avg_qual.noise = 0; | ||
5378 | range->avg_qual.updated = 7; /* Updated all three */ | ||
5379 | |||
5380 | range->num_bitrates = min(priv->rates.num_rates, (u8)IW_MAX_BITRATES); | ||
5381 | |||
5382 | for (i = 0; i < range->num_bitrates; i++) | ||
5383 | range->bitrate[i] = (priv->rates.supported_rates[i] & 0x7F) * | ||
5384 | 500000; | ||
5385 | |||
5386 | range->max_rts = DEFAULT_RTS_THRESHOLD; | ||
5387 | range->min_frag = MIN_FRAG_THRESHOLD; | ||
5388 | range->max_frag = MAX_FRAG_THRESHOLD; | ||
5389 | |||
5390 | range->encoding_size[0] = 5; | ||
5391 | range->encoding_size[1] = 13; | ||
5392 | range->num_encoding_sizes = 2; | ||
5393 | range->max_encoding_tokens = WEP_KEYS; | ||
5394 | |||
5395 | /* Set the Wireless Extension versions */ | ||
5396 | range->we_version_compiled = WIRELESS_EXT; | ||
5397 | range->we_version_source = 16; | ||
5398 | |||
5399 | range->num_channels = FREQ_COUNT; | ||
5400 | |||
5401 | val = 0; | ||
5402 | for (i = 0; i < FREQ_COUNT; i++) { | ||
5403 | range->freq[val].i = i + 1; | ||
5404 | range->freq[val].m = ipw_frequencies[i] * 100000; | ||
5405 | range->freq[val].e = 1; | ||
5406 | val++; | ||
5407 | |||
5408 | if (val == IW_MAX_FREQUENCIES) | ||
5409 | break; | ||
5410 | } | ||
5411 | range->num_frequency = val; | ||
5412 | |||
5413 | IPW_DEBUG_WX("GET Range\n"); | ||
5414 | return 0; | ||
5415 | } | ||
5416 | |||
5417 | static int ipw_wx_set_wap(struct net_device *dev, | ||
5418 | struct iw_request_info *info, | ||
5419 | union iwreq_data *wrqu, char *extra) | ||
5420 | { | ||
5421 | struct ipw_priv *priv = ieee80211_priv(dev); | ||
5422 | |||
5423 | static const unsigned char any[] = { | ||
5424 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff | ||
5425 | }; | ||
5426 | static const unsigned char off[] = { | ||
5427 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 | ||
5428 | }; | ||
5429 | |||
5430 | if (wrqu->ap_addr.sa_family != ARPHRD_ETHER) | ||
5431 | return -EINVAL; | ||
5432 | |||
5433 | if (!memcmp(any, wrqu->ap_addr.sa_data, ETH_ALEN) || | ||
5434 | !memcmp(off, wrqu->ap_addr.sa_data, ETH_ALEN)) { | ||
5435 | /* we disable mandatory BSSID association */ | ||
5436 | IPW_DEBUG_WX("Setting AP BSSID to ANY\n"); | ||
5437 | priv->config &= ~CFG_STATIC_BSSID; | ||
5438 | if (!(priv->status & (STATUS_SCANNING | STATUS_ASSOCIATED | | ||
5439 | STATUS_ASSOCIATING))) { | ||
5440 | IPW_DEBUG_ASSOC("Attempting to associate with new " | ||
5441 | "parameters.\n"); | ||
5442 | ipw_associate(priv); | ||
5443 | } | ||
5444 | |||
5445 | return 0; | ||
5446 | } | ||
5447 | |||
5448 | priv->config |= CFG_STATIC_BSSID; | ||
5449 | if (!memcmp(priv->bssid, wrqu->ap_addr.sa_data, ETH_ALEN)) { | ||
5450 | IPW_DEBUG_WX("BSSID set to current BSSID.\n"); | ||
5451 | return 0; | ||
5452 | } | ||
5453 | |||
5454 | IPW_DEBUG_WX("Setting mandatory BSSID to " MAC_FMT "\n", | ||
5455 | MAC_ARG(wrqu->ap_addr.sa_data)); | ||
5456 | |||
5457 | memcpy(priv->bssid, wrqu->ap_addr.sa_data, ETH_ALEN); | ||
5458 | |||
5459 | /* If we are currently associated, or trying to associate | ||
5460 | * then see if this is a new BSSID (causing us to disassociate) */ | ||
5461 | if (priv->status & (STATUS_ASSOCIATED | STATUS_ASSOCIATING)) { | ||
5462 | IPW_DEBUG_ASSOC("Disassociating due to BSSID change.\n"); | ||
5463 | ipw_disassociate(priv); | ||
5464 | } else { | ||
5465 | ipw_associate(priv); | ||
5466 | } | ||
5467 | |||
5468 | return 0; | ||
5469 | } | ||
5470 | |||
5471 | static int ipw_wx_get_wap(struct net_device *dev, | ||
5472 | struct iw_request_info *info, | ||
5473 | union iwreq_data *wrqu, char *extra) | ||
5474 | { | ||
5475 | struct ipw_priv *priv = ieee80211_priv(dev); | ||
5476 | /* If we are associated, trying to associate, or have a statically | ||
5477 | * configured BSSID then return that; otherwise return ANY */ | ||
5478 | if (priv->config & CFG_STATIC_BSSID || | ||
5479 | priv->status & (STATUS_ASSOCIATED | STATUS_ASSOCIATING)) { | ||
5480 | wrqu->ap_addr.sa_family = ARPHRD_ETHER; | ||
5481 | memcpy(wrqu->ap_addr.sa_data, &priv->bssid, ETH_ALEN); | ||
5482 | } else | ||
5483 | memset(wrqu->ap_addr.sa_data, 0, ETH_ALEN); | ||
5484 | |||
5485 | IPW_DEBUG_WX("Getting WAP BSSID: " MAC_FMT "\n", | ||
5486 | MAC_ARG(wrqu->ap_addr.sa_data)); | ||
5487 | return 0; | ||
5488 | } | ||
5489 | |||
5490 | static int ipw_wx_set_essid(struct net_device *dev, | ||
5491 | struct iw_request_info *info, | ||
5492 | union iwreq_data *wrqu, char *extra) | ||
5493 | { | ||
5494 | struct ipw_priv *priv = ieee80211_priv(dev); | ||
5495 | char *essid = ""; /* ANY */ | ||
5496 | int length = 0; | ||
5497 | |||
5498 | if (wrqu->essid.flags && wrqu->essid.length) { | ||
5499 | length = wrqu->essid.length - 1; | ||
5500 | essid = extra; | ||
5501 | } | ||
5502 | if (length == 0) { | ||
5503 | IPW_DEBUG_WX("Setting ESSID to ANY\n"); | ||
5504 | priv->config &= ~CFG_STATIC_ESSID; | ||
5505 | if (!(priv->status & (STATUS_SCANNING | STATUS_ASSOCIATED | | ||
5506 | STATUS_ASSOCIATING))) { | ||
5507 | IPW_DEBUG_ASSOC("Attempting to associate with new " | ||
5508 | "parameters.\n"); | ||
5509 | ipw_associate(priv); | ||
5510 | } | ||
5511 | |||
5512 | return 0; | ||
5513 | } | ||
5514 | |||
5515 | length = min(length, IW_ESSID_MAX_SIZE); | ||
5516 | |||
5517 | priv->config |= CFG_STATIC_ESSID; | ||
5518 | |||
5519 | if (priv->essid_len == length && !memcmp(priv->essid, extra, length)) { | ||
5520 | IPW_DEBUG_WX("ESSID set to current ESSID.\n"); | ||
5521 | return 0; | ||
5522 | } | ||
5523 | |||
5524 | IPW_DEBUG_WX("Setting ESSID: '%s' (%d)\n", escape_essid(essid, length), | ||
5525 | length); | ||
5526 | |||
5527 | priv->essid_len = length; | ||
5528 | memcpy(priv->essid, essid, priv->essid_len); | ||
5529 | |||
5530 | /* If we are currently associated, or trying to associate | ||
5531 | * then see if this is a new ESSID (causing us to disassociate) */ | ||
5532 | if (priv->status & (STATUS_ASSOCIATED | STATUS_ASSOCIATING)) { | ||
5533 | IPW_DEBUG_ASSOC("Disassociating due to ESSID change.\n"); | ||
5534 | ipw_disassociate(priv); | ||
5535 | } else { | ||
5536 | ipw_associate(priv); | ||
5537 | } | ||
5538 | |||
5539 | return 0; | ||
5540 | } | ||
5541 | |||
5542 | static int ipw_wx_get_essid(struct net_device *dev, | ||
5543 | struct iw_request_info *info, | ||
5544 | union iwreq_data *wrqu, char *extra) | ||
5545 | { | ||
5546 | struct ipw_priv *priv = ieee80211_priv(dev); | ||
5547 | |||
5548 | /* If we are associated, trying to associate, or have a statically | ||
5549 | * configured ESSID then return that; otherwise return ANY */ | ||
5550 | if (priv->config & CFG_STATIC_ESSID || | ||
5551 | priv->status & (STATUS_ASSOCIATED | STATUS_ASSOCIATING)) { | ||
5552 | IPW_DEBUG_WX("Getting essid: '%s'\n", | ||
5553 | escape_essid(priv->essid, priv->essid_len)); | ||
5554 | memcpy(extra, priv->essid, priv->essid_len); | ||
5555 | wrqu->essid.length = priv->essid_len; | ||
5556 | wrqu->essid.flags = 1; /* active */ | ||
5557 | } else { | ||
5558 | IPW_DEBUG_WX("Getting essid: ANY\n"); | ||
5559 | wrqu->essid.length = 0; | ||
5560 | wrqu->essid.flags = 0; /* active */ | ||
5561 | } | ||
5562 | |||
5563 | return 0; | ||
5564 | } | ||
5565 | |||
5566 | static int ipw_wx_set_nick(struct net_device *dev, | ||
5567 | struct iw_request_info *info, | ||
5568 | union iwreq_data *wrqu, char *extra) | ||
5569 | { | ||
5570 | struct ipw_priv *priv = ieee80211_priv(dev); | ||
5571 | |||
5572 | IPW_DEBUG_WX("Setting nick to '%s'\n", extra); | ||
5573 | if (wrqu->data.length > IW_ESSID_MAX_SIZE) | ||
5574 | return -E2BIG; | ||
5575 | |||
5576 | wrqu->data.length = min((size_t)wrqu->data.length, sizeof(priv->nick)); | ||
5577 | memset(priv->nick, 0, sizeof(priv->nick)); | ||
5578 | memcpy(priv->nick, extra, wrqu->data.length); | ||
5579 | IPW_DEBUG_TRACE("<<\n"); | ||
5580 | return 0; | ||
5581 | |||
5582 | } | ||
5583 | |||
5584 | |||
5585 | static int ipw_wx_get_nick(struct net_device *dev, | ||
5586 | struct iw_request_info *info, | ||
5587 | union iwreq_data *wrqu, char *extra) | ||
5588 | { | ||
5589 | struct ipw_priv *priv = ieee80211_priv(dev); | ||
5590 | IPW_DEBUG_WX("Getting nick\n"); | ||
5591 | wrqu->data.length = strlen(priv->nick) + 1; | ||
5592 | memcpy(extra, priv->nick, wrqu->data.length); | ||
5593 | wrqu->data.flags = 1; /* active */ | ||
5594 | return 0; | ||
5595 | } | ||
5596 | |||
5597 | |||
5598 | static int ipw_wx_set_rate(struct net_device *dev, | ||
5599 | struct iw_request_info *info, | ||
5600 | union iwreq_data *wrqu, char *extra) | ||
5601 | { | ||
5602 | IPW_DEBUG_WX("0x%p, 0x%p, 0x%p\n", dev, info, wrqu); | ||
5603 | return -EOPNOTSUPP; | ||
5604 | } | ||
5605 | |||
5606 | static int ipw_wx_get_rate(struct net_device *dev, | ||
5607 | struct iw_request_info *info, | ||
5608 | union iwreq_data *wrqu, char *extra) | ||
5609 | { | ||
5610 | struct ipw_priv * priv = ieee80211_priv(dev); | ||
5611 | wrqu->bitrate.value = priv->last_rate; | ||
5612 | |||
5613 | IPW_DEBUG_WX("GET Rate -> %d \n", wrqu->bitrate.value); | ||
5614 | return 0; | ||
5615 | } | ||
5616 | |||
5617 | |||
5618 | static int ipw_wx_set_rts(struct net_device *dev, | ||
5619 | struct iw_request_info *info, | ||
5620 | union iwreq_data *wrqu, char *extra) | ||
5621 | { | ||
5622 | struct ipw_priv *priv = ieee80211_priv(dev); | ||
5623 | |||
5624 | if (wrqu->rts.disabled) | ||
5625 | priv->rts_threshold = DEFAULT_RTS_THRESHOLD; | ||
5626 | else { | ||
5627 | if (wrqu->rts.value < MIN_RTS_THRESHOLD || | ||
5628 | wrqu->rts.value > MAX_RTS_THRESHOLD) | ||
5629 | return -EINVAL; | ||
5630 | |||
5631 | priv->rts_threshold = wrqu->rts.value; | ||
5632 | } | ||
5633 | |||
5634 | ipw_send_rts_threshold(priv, priv->rts_threshold); | ||
5635 | IPW_DEBUG_WX("SET RTS Threshold -> %d \n", priv->rts_threshold); | ||
5636 | return 0; | ||
5637 | } | ||
5638 | |||
5639 | static int ipw_wx_get_rts(struct net_device *dev, | ||
5640 | struct iw_request_info *info, | ||
5641 | union iwreq_data *wrqu, char *extra) | ||
5642 | { | ||
5643 | struct ipw_priv *priv = ieee80211_priv(dev); | ||
5644 | wrqu->rts.value = priv->rts_threshold; | ||
5645 | wrqu->rts.fixed = 0; /* no auto select */ | ||
5646 | wrqu->rts.disabled = | ||
5647 | (wrqu->rts.value == DEFAULT_RTS_THRESHOLD); | ||
5648 | |||
5649 | IPW_DEBUG_WX("GET RTS Threshold -> %d \n", wrqu->rts.value); | ||
5650 | return 0; | ||
5651 | } | ||
5652 | |||
5653 | |||
5654 | static int ipw_wx_set_txpow(struct net_device *dev, | ||
5655 | struct iw_request_info *info, | ||
5656 | union iwreq_data *wrqu, char *extra) | ||
5657 | { | ||
5658 | struct ipw_priv *priv = ieee80211_priv(dev); | ||
5659 | struct ipw_tx_power tx_power; | ||
5660 | int i; | ||
5661 | |||
5662 | if (ipw_radio_kill_sw(priv, wrqu->power.disabled)) | ||
5663 | return -EINPROGRESS; | ||
5664 | |||
5665 | if (wrqu->power.flags != IW_TXPOW_DBM) | ||
5666 | return -EINVAL; | ||
5667 | |||
5668 | if ((wrqu->power.value > 20) || | ||
5669 | (wrqu->power.value < -12)) | ||
5670 | return -EINVAL; | ||
5671 | |||
5672 | priv->tx_power = wrqu->power.value; | ||
5673 | |||
5674 | memset(&tx_power, 0, sizeof(tx_power)); | ||
5675 | |||
5676 | /* configure device for 'G' band */ | ||
5677 | tx_power.ieee_mode = IPW_G_MODE; | ||
5678 | tx_power.num_channels = 11; | ||
5679 | for (i = 0; i < 11; i++) { | ||
5680 | tx_power.channels_tx_power[i].channel_number = i + 1; | ||
5681 | tx_power.channels_tx_power[i].tx_power = priv->tx_power; | ||
5682 | } | ||
5683 | if (ipw_send_tx_power(priv, &tx_power)) | ||
5684 | goto error; | ||
5685 | |||
5686 | /* configure device to also handle 'B' band */ | ||
5687 | tx_power.ieee_mode = IPW_B_MODE; | ||
5688 | if (ipw_send_tx_power(priv, &tx_power)) | ||
5689 | goto error; | ||
5690 | |||
5691 | return 0; | ||
5692 | |||
5693 | error: | ||
5694 | return -EIO; | ||
5695 | } | ||
5696 | |||
5697 | |||
5698 | static int ipw_wx_get_txpow(struct net_device *dev, | ||
5699 | struct iw_request_info *info, | ||
5700 | union iwreq_data *wrqu, char *extra) | ||
5701 | { | ||
5702 | struct ipw_priv *priv = ieee80211_priv(dev); | ||
5703 | |||
5704 | wrqu->power.value = priv->tx_power; | ||
5705 | wrqu->power.fixed = 1; | ||
5706 | wrqu->power.flags = IW_TXPOW_DBM; | ||
5707 | wrqu->power.disabled = (priv->status & STATUS_RF_KILL_MASK) ? 1 : 0; | ||
5708 | |||
5709 | IPW_DEBUG_WX("GET TX Power -> %s %d \n", | ||
5710 | wrqu->power.disabled ? "ON" : "OFF", | ||
5711 | wrqu->power.value); | ||
5712 | |||
5713 | return 0; | ||
5714 | } | ||
5715 | |||
5716 | static int ipw_wx_set_frag(struct net_device *dev, | ||
5717 | struct iw_request_info *info, | ||
5718 | union iwreq_data *wrqu, char *extra) | ||
5719 | { | ||
5720 | struct ipw_priv *priv = ieee80211_priv(dev); | ||
5721 | |||
5722 | if (wrqu->frag.disabled) | ||
5723 | priv->ieee->fts = DEFAULT_FTS; | ||
5724 | else { | ||
5725 | if (wrqu->frag.value < MIN_FRAG_THRESHOLD || | ||
5726 | wrqu->frag.value > MAX_FRAG_THRESHOLD) | ||
5727 | return -EINVAL; | ||
5728 | |||
5729 | priv->ieee->fts = wrqu->frag.value & ~0x1; | ||
5730 | } | ||
5731 | |||
5732 | ipw_send_frag_threshold(priv, wrqu->frag.value); | ||
5733 | IPW_DEBUG_WX("SET Frag Threshold -> %d \n", wrqu->frag.value); | ||
5734 | return 0; | ||
5735 | } | ||
5736 | |||
5737 | static int ipw_wx_get_frag(struct net_device *dev, | ||
5738 | struct iw_request_info *info, | ||
5739 | union iwreq_data *wrqu, char *extra) | ||
5740 | { | ||
5741 | struct ipw_priv *priv = ieee80211_priv(dev); | ||
5742 | wrqu->frag.value = priv->ieee->fts; | ||
5743 | wrqu->frag.fixed = 0; /* no auto select */ | ||
5744 | wrqu->frag.disabled = | ||
5745 | (wrqu->frag.value == DEFAULT_FTS); | ||
5746 | |||
5747 | IPW_DEBUG_WX("GET Frag Threshold -> %d \n", wrqu->frag.value); | ||
5748 | |||
5749 | return 0; | ||
5750 | } | ||
5751 | |||
5752 | static int ipw_wx_set_retry(struct net_device *dev, | ||
5753 | struct iw_request_info *info, | ||
5754 | union iwreq_data *wrqu, char *extra) | ||
5755 | { | ||
5756 | IPW_DEBUG_WX("0x%p, 0x%p, 0x%p\n", dev, info, wrqu); | ||
5757 | return -EOPNOTSUPP; | ||
5758 | } | ||
5759 | |||
5760 | |||
5761 | static int ipw_wx_get_retry(struct net_device *dev, | ||
5762 | struct iw_request_info *info, | ||
5763 | union iwreq_data *wrqu, char *extra) | ||
5764 | { | ||
5765 | IPW_DEBUG_WX("0x%p, 0x%p, 0x%p\n", dev, info, wrqu); | ||
5766 | return -EOPNOTSUPP; | ||
5767 | } | ||
5768 | |||
5769 | |||
5770 | static int ipw_wx_set_scan(struct net_device *dev, | ||
5771 | struct iw_request_info *info, | ||
5772 | union iwreq_data *wrqu, char *extra) | ||
5773 | { | ||
5774 | struct ipw_priv *priv = ieee80211_priv(dev); | ||
5775 | IPW_DEBUG_WX("Start scan\n"); | ||
5776 | if (ipw_request_scan(priv)) | ||
5777 | return -EIO; | ||
5778 | return 0; | ||
5779 | } | ||
5780 | |||
5781 | static int ipw_wx_get_scan(struct net_device *dev, | ||
5782 | struct iw_request_info *info, | ||
5783 | union iwreq_data *wrqu, char *extra) | ||
5784 | { | ||
5785 | struct ipw_priv *priv = ieee80211_priv(dev); | ||
5786 | return ieee80211_wx_get_scan(priv->ieee, info, wrqu, extra); | ||
5787 | } | ||
5788 | |||
5789 | static int ipw_wx_set_encode(struct net_device *dev, | ||
5790 | struct iw_request_info *info, | ||
5791 | union iwreq_data *wrqu, char *key) | ||
5792 | { | ||
5793 | struct ipw_priv *priv = ieee80211_priv(dev); | ||
5794 | return ieee80211_wx_set_encode(priv->ieee, info, wrqu, key); | ||
5795 | } | ||
5796 | |||
5797 | static int ipw_wx_get_encode(struct net_device *dev, | ||
5798 | struct iw_request_info *info, | ||
5799 | union iwreq_data *wrqu, char *key) | ||
5800 | { | ||
5801 | struct ipw_priv *priv = ieee80211_priv(dev); | ||
5802 | return ieee80211_wx_get_encode(priv->ieee, info, wrqu, key); | ||
5803 | } | ||
5804 | |||
5805 | static int ipw_wx_set_power(struct net_device *dev, | ||
5806 | struct iw_request_info *info, | ||
5807 | union iwreq_data *wrqu, char *extra) | ||
5808 | { | ||
5809 | struct ipw_priv *priv = ieee80211_priv(dev); | ||
5810 | int err; | ||
5811 | |||
5812 | if (wrqu->power.disabled) { | ||
5813 | priv->power_mode = IPW_POWER_LEVEL(priv->power_mode); | ||
5814 | err = ipw_send_power_mode(priv, IPW_POWER_MODE_CAM); | ||
5815 | if (err) { | ||
5816 | IPW_DEBUG_WX("failed setting power mode.\n"); | ||
5817 | return err; | ||
5818 | } | ||
5819 | |||
5820 | IPW_DEBUG_WX("SET Power Management Mode -> off\n"); | ||
5821 | |||
5822 | return 0; | ||
5823 | } | ||
5824 | |||
5825 | switch (wrqu->power.flags & IW_POWER_MODE) { | ||
5826 | case IW_POWER_ON: /* If not specified */ | ||
5827 | case IW_POWER_MODE: /* If set all mask */ | ||
5828 | case IW_POWER_ALL_R: /* If explicitely state all */ | ||
5829 | break; | ||
5830 | default: /* Otherwise we don't support it */ | ||
5831 | IPW_DEBUG_WX("SET PM Mode: %X not supported.\n", | ||
5832 | wrqu->power.flags); | ||
5833 | return -EOPNOTSUPP; | ||
5834 | } | ||
5835 | |||
5836 | /* If the user hasn't specified a power management mode yet, default | ||
5837 | * to BATTERY */ | ||
5838 | if (IPW_POWER_LEVEL(priv->power_mode) == IPW_POWER_AC) | ||
5839 | priv->power_mode = IPW_POWER_ENABLED | IPW_POWER_BATTERY; | ||
5840 | else | ||
5841 | priv->power_mode = IPW_POWER_ENABLED | priv->power_mode; | ||
5842 | err = ipw_send_power_mode(priv, IPW_POWER_LEVEL(priv->power_mode)); | ||
5843 | if (err) { | ||
5844 | IPW_DEBUG_WX("failed setting power mode.\n"); | ||
5845 | return err; | ||
5846 | } | ||
5847 | |||
5848 | IPW_DEBUG_WX("SET Power Management Mode -> 0x%02X\n", | ||
5849 | priv->power_mode); | ||
5850 | |||
5851 | return 0; | ||
5852 | } | ||
5853 | |||
5854 | static int ipw_wx_get_power(struct net_device *dev, | ||
5855 | struct iw_request_info *info, | ||
5856 | union iwreq_data *wrqu, char *extra) | ||
5857 | { | ||
5858 | struct ipw_priv *priv = ieee80211_priv(dev); | ||
5859 | |||
5860 | if (!(priv->power_mode & IPW_POWER_ENABLED)) { | ||
5861 | wrqu->power.disabled = 1; | ||
5862 | } else { | ||
5863 | wrqu->power.disabled = 0; | ||
5864 | } | ||
5865 | |||
5866 | IPW_DEBUG_WX("GET Power Management Mode -> %02X\n", priv->power_mode); | ||
5867 | |||
5868 | return 0; | ||
5869 | } | ||
5870 | |||
5871 | static int ipw_wx_set_powermode(struct net_device *dev, | ||
5872 | struct iw_request_info *info, | ||
5873 | union iwreq_data *wrqu, char *extra) | ||
5874 | { | ||
5875 | struct ipw_priv *priv = ieee80211_priv(dev); | ||
5876 | int mode = *(int *)extra; | ||
5877 | int err; | ||
5878 | |||
5879 | if ((mode < 1) || (mode > IPW_POWER_LIMIT)) { | ||
5880 | mode = IPW_POWER_AC; | ||
5881 | priv->power_mode = mode; | ||
5882 | } else { | ||
5883 | priv->power_mode = IPW_POWER_ENABLED | mode; | ||
5884 | } | ||
5885 | |||
5886 | if (priv->power_mode != mode) { | ||
5887 | err = ipw_send_power_mode(priv, mode); | ||
5888 | |||
5889 | if (err) { | ||
5890 | IPW_DEBUG_WX("failed setting power mode.\n"); | ||
5891 | return err; | ||
5892 | } | ||
5893 | } | ||
5894 | |||
5895 | return 0; | ||
5896 | } | ||
5897 | |||
5898 | #define MAX_WX_STRING 80 | ||
5899 | static int ipw_wx_get_powermode(struct net_device *dev, | ||
5900 | struct iw_request_info *info, | ||
5901 | union iwreq_data *wrqu, char *extra) | ||
5902 | { | ||
5903 | struct ipw_priv *priv = ieee80211_priv(dev); | ||
5904 | int level = IPW_POWER_LEVEL(priv->power_mode); | ||
5905 | char *p = extra; | ||
5906 | |||
5907 | p += snprintf(p, MAX_WX_STRING, "Power save level: %d ", level); | ||
5908 | |||
5909 | switch (level) { | ||
5910 | case IPW_POWER_AC: | ||
5911 | p += snprintf(p, MAX_WX_STRING - (p - extra), "(AC)"); | ||
5912 | break; | ||
5913 | case IPW_POWER_BATTERY: | ||
5914 | p += snprintf(p, MAX_WX_STRING - (p - extra), "(BATTERY)"); | ||
5915 | break; | ||
5916 | default: | ||
5917 | p += snprintf(p, MAX_WX_STRING - (p - extra), | ||
5918 | "(Timeout %dms, Period %dms)", | ||
5919 | timeout_duration[level - 1] / 1000, | ||
5920 | period_duration[level - 1] / 1000); | ||
5921 | } | ||
5922 | |||
5923 | if (!(priv->power_mode & IPW_POWER_ENABLED)) | ||
5924 | p += snprintf(p, MAX_WX_STRING - (p - extra)," OFF"); | ||
5925 | |||
5926 | wrqu->data.length = p - extra + 1; | ||
5927 | |||
5928 | return 0; | ||
5929 | } | ||
5930 | |||
5931 | static int ipw_wx_set_wireless_mode(struct net_device *dev, | ||
5932 | struct iw_request_info *info, | ||
5933 | union iwreq_data *wrqu, char *extra) | ||
5934 | { | ||
5935 | struct ipw_priv *priv = ieee80211_priv(dev); | ||
5936 | int mode = *(int *)extra; | ||
5937 | u8 band = 0, modulation = 0; | ||
5938 | |||
5939 | if (mode == 0 || mode & ~IEEE_MODE_MASK) { | ||
5940 | IPW_WARNING("Attempt to set invalid wireless mode: %d\n", | ||
5941 | mode); | ||
5942 | return -EINVAL; | ||
5943 | } | ||
5944 | |||
5945 | if (priv->adapter == IPW_2915ABG) { | ||
5946 | priv->ieee->abg_ture = 1; | ||
5947 | if (mode & IEEE_A) { | ||
5948 | band |= IEEE80211_52GHZ_BAND; | ||
5949 | modulation |= IEEE80211_OFDM_MODULATION; | ||
5950 | } else | ||
5951 | priv->ieee->abg_ture = 0; | ||
5952 | } else { | ||
5953 | if (mode & IEEE_A) { | ||
5954 | IPW_WARNING("Attempt to set 2200BG into " | ||
5955 | "802.11a mode\n"); | ||
5956 | return -EINVAL; | ||
5957 | } | ||
5958 | |||
5959 | priv->ieee->abg_ture = 0; | ||
5960 | } | ||
5961 | |||
5962 | if (mode & IEEE_B) { | ||
5963 | band |= IEEE80211_24GHZ_BAND; | ||
5964 | modulation |= IEEE80211_CCK_MODULATION; | ||
5965 | } else | ||
5966 | priv->ieee->abg_ture = 0; | ||
5967 | |||
5968 | if (mode & IEEE_G) { | ||
5969 | band |= IEEE80211_24GHZ_BAND; | ||
5970 | modulation |= IEEE80211_OFDM_MODULATION; | ||
5971 | } else | ||
5972 | priv->ieee->abg_ture = 0; | ||
5973 | |||
5974 | priv->ieee->mode = mode; | ||
5975 | priv->ieee->freq_band = band; | ||
5976 | priv->ieee->modulation = modulation; | ||
5977 | init_supported_rates(priv, &priv->rates); | ||
5978 | |||
5979 | /* If we are currently associated, or trying to associate | ||
5980 | * then see if this is a new configuration (causing us to | ||
5981 | * disassociate) */ | ||
5982 | if (priv->status & (STATUS_ASSOCIATED | STATUS_ASSOCIATING)) { | ||
5983 | /* The resulting association will trigger | ||
5984 | * the new rates to be sent to the device */ | ||
5985 | IPW_DEBUG_ASSOC("Disassociating due to mode change.\n"); | ||
5986 | ipw_disassociate(priv); | ||
5987 | } else | ||
5988 | ipw_send_supported_rates(priv, &priv->rates); | ||
5989 | |||
5990 | IPW_DEBUG_WX("PRIV SET MODE: %c%c%c\n", | ||
5991 | mode & IEEE_A ? 'a' : '.', | ||
5992 | mode & IEEE_B ? 'b' : '.', | ||
5993 | mode & IEEE_G ? 'g' : '.'); | ||
5994 | return 0; | ||
5995 | } | ||
5996 | |||
5997 | static int ipw_wx_get_wireless_mode(struct net_device *dev, | ||
5998 | struct iw_request_info *info, | ||
5999 | union iwreq_data *wrqu, char *extra) | ||
6000 | { | ||
6001 | struct ipw_priv *priv = ieee80211_priv(dev); | ||
6002 | |||
6003 | switch (priv->ieee->freq_band) { | ||
6004 | case IEEE80211_24GHZ_BAND: | ||
6005 | switch (priv->ieee->modulation) { | ||
6006 | case IEEE80211_CCK_MODULATION: | ||
6007 | strncpy(extra, "802.11b (2)", MAX_WX_STRING); | ||
6008 | break; | ||
6009 | case IEEE80211_OFDM_MODULATION: | ||
6010 | strncpy(extra, "802.11g (4)", MAX_WX_STRING); | ||
6011 | break; | ||
6012 | default: | ||
6013 | strncpy(extra, "802.11bg (6)", MAX_WX_STRING); | ||
6014 | break; | ||
6015 | } | ||
6016 | break; | ||
6017 | |||
6018 | case IEEE80211_52GHZ_BAND: | ||
6019 | strncpy(extra, "802.11a (1)", MAX_WX_STRING); | ||
6020 | break; | ||
6021 | |||
6022 | default: /* Mixed Band */ | ||
6023 | switch (priv->ieee->modulation) { | ||
6024 | case IEEE80211_CCK_MODULATION: | ||
6025 | strncpy(extra, "802.11ab (3)", MAX_WX_STRING); | ||
6026 | break; | ||
6027 | case IEEE80211_OFDM_MODULATION: | ||
6028 | strncpy(extra, "802.11ag (5)", MAX_WX_STRING); | ||
6029 | break; | ||
6030 | default: | ||
6031 | strncpy(extra, "802.11abg (7)", MAX_WX_STRING); | ||
6032 | break; | ||
6033 | } | ||
6034 | break; | ||
6035 | } | ||
6036 | |||
6037 | IPW_DEBUG_WX("PRIV GET MODE: %s\n", extra); | ||
6038 | |||
6039 | wrqu->data.length = strlen(extra) + 1; | ||
6040 | |||
6041 | return 0; | ||
6042 | } | ||
6043 | |||
6044 | #ifdef CONFIG_IPW_PROMISC | ||
6045 | static int ipw_wx_set_promisc(struct net_device *dev, | ||
6046 | struct iw_request_info *info, | ||
6047 | union iwreq_data *wrqu, char *extra) | ||
6048 | { | ||
6049 | struct ipw_priv *priv = ieee80211_priv(dev); | ||
6050 | int *parms = (int *)extra; | ||
6051 | int enable = (parms[0] > 0); | ||
6052 | |||
6053 | IPW_DEBUG_WX("SET PROMISC: %d %d\n", enable, parms[1]); | ||
6054 | if (enable) { | ||
6055 | if (priv->ieee->iw_mode != IW_MODE_MONITOR) { | ||
6056 | priv->net_dev->type = ARPHRD_IEEE80211; | ||
6057 | ipw_adapter_restart(priv); | ||
6058 | } | ||
6059 | |||
6060 | ipw_set_channel(priv, parms[1]); | ||
6061 | } else { | ||
6062 | if (priv->ieee->iw_mode != IW_MODE_MONITOR) | ||
6063 | return 0; | ||
6064 | priv->net_dev->type = ARPHRD_ETHER; | ||
6065 | ipw_adapter_restart(priv); | ||
6066 | } | ||
6067 | return 0; | ||
6068 | } | ||
6069 | |||
6070 | |||
6071 | static int ipw_wx_reset(struct net_device *dev, | ||
6072 | struct iw_request_info *info, | ||
6073 | union iwreq_data *wrqu, char *extra) | ||
6074 | { | ||
6075 | struct ipw_priv *priv = ieee80211_priv(dev); | ||
6076 | IPW_DEBUG_WX("RESET\n"); | ||
6077 | ipw_adapter_restart(priv); | ||
6078 | return 0; | ||
6079 | } | ||
6080 | #endif // CONFIG_IPW_PROMISC | ||
6081 | |||
6082 | /* Rebase the WE IOCTLs to zero for the handler array */ | ||
6083 | #define IW_IOCTL(x) [(x)-SIOCSIWCOMMIT] | ||
6084 | static iw_handler ipw_wx_handlers[] = | ||
6085 | { | ||
6086 | IW_IOCTL(SIOCGIWNAME) = ipw_wx_get_name, | ||
6087 | IW_IOCTL(SIOCSIWFREQ) = ipw_wx_set_freq, | ||
6088 | IW_IOCTL(SIOCGIWFREQ) = ipw_wx_get_freq, | ||
6089 | IW_IOCTL(SIOCSIWMODE) = ipw_wx_set_mode, | ||
6090 | IW_IOCTL(SIOCGIWMODE) = ipw_wx_get_mode, | ||
6091 | IW_IOCTL(SIOCGIWRANGE) = ipw_wx_get_range, | ||
6092 | IW_IOCTL(SIOCSIWAP) = ipw_wx_set_wap, | ||
6093 | IW_IOCTL(SIOCGIWAP) = ipw_wx_get_wap, | ||
6094 | IW_IOCTL(SIOCSIWSCAN) = ipw_wx_set_scan, | ||
6095 | IW_IOCTL(SIOCGIWSCAN) = ipw_wx_get_scan, | ||
6096 | IW_IOCTL(SIOCSIWESSID) = ipw_wx_set_essid, | ||
6097 | IW_IOCTL(SIOCGIWESSID) = ipw_wx_get_essid, | ||
6098 | IW_IOCTL(SIOCSIWNICKN) = ipw_wx_set_nick, | ||
6099 | IW_IOCTL(SIOCGIWNICKN) = ipw_wx_get_nick, | ||
6100 | IW_IOCTL(SIOCSIWRATE) = ipw_wx_set_rate, | ||
6101 | IW_IOCTL(SIOCGIWRATE) = ipw_wx_get_rate, | ||
6102 | IW_IOCTL(SIOCSIWRTS) = ipw_wx_set_rts, | ||
6103 | IW_IOCTL(SIOCGIWRTS) = ipw_wx_get_rts, | ||
6104 | IW_IOCTL(SIOCSIWFRAG) = ipw_wx_set_frag, | ||
6105 | IW_IOCTL(SIOCGIWFRAG) = ipw_wx_get_frag, | ||
6106 | IW_IOCTL(SIOCSIWTXPOW) = ipw_wx_set_txpow, | ||
6107 | IW_IOCTL(SIOCGIWTXPOW) = ipw_wx_get_txpow, | ||
6108 | IW_IOCTL(SIOCSIWRETRY) = ipw_wx_set_retry, | ||
6109 | IW_IOCTL(SIOCGIWRETRY) = ipw_wx_get_retry, | ||
6110 | IW_IOCTL(SIOCSIWENCODE) = ipw_wx_set_encode, | ||
6111 | IW_IOCTL(SIOCGIWENCODE) = ipw_wx_get_encode, | ||
6112 | IW_IOCTL(SIOCSIWPOWER) = ipw_wx_set_power, | ||
6113 | IW_IOCTL(SIOCGIWPOWER) = ipw_wx_get_power, | ||
6114 | }; | ||
6115 | |||
6116 | #define IPW_PRIV_SET_POWER SIOCIWFIRSTPRIV | ||
6117 | #define IPW_PRIV_GET_POWER SIOCIWFIRSTPRIV+1 | ||
6118 | #define IPW_PRIV_SET_MODE SIOCIWFIRSTPRIV+2 | ||
6119 | #define IPW_PRIV_GET_MODE SIOCIWFIRSTPRIV+3 | ||
6120 | #define IPW_PRIV_SET_PROMISC SIOCIWFIRSTPRIV+4 | ||
6121 | #define IPW_PRIV_RESET SIOCIWFIRSTPRIV+5 | ||
6122 | |||
6123 | |||
6124 | static struct iw_priv_args ipw_priv_args[] = { | ||
6125 | { | ||
6126 | .cmd = IPW_PRIV_SET_POWER, | ||
6127 | .set_args = IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, | ||
6128 | .name = "set_power" | ||
6129 | }, | ||
6130 | { | ||
6131 | .cmd = IPW_PRIV_GET_POWER, | ||
6132 | .get_args = IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_FIXED | MAX_WX_STRING, | ||
6133 | .name = "get_power" | ||
6134 | }, | ||
6135 | { | ||
6136 | .cmd = IPW_PRIV_SET_MODE, | ||
6137 | .set_args = IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, | ||
6138 | .name = "set_mode" | ||
6139 | }, | ||
6140 | { | ||
6141 | .cmd = IPW_PRIV_GET_MODE, | ||
6142 | .get_args = IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_FIXED | MAX_WX_STRING, | ||
6143 | .name = "get_mode" | ||
6144 | }, | ||
6145 | #ifdef CONFIG_IPW_PROMISC | ||
6146 | { | ||
6147 | IPW_PRIV_SET_PROMISC, | ||
6148 | IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 2, 0, "monitor" | ||
6149 | }, | ||
6150 | { | ||
6151 | IPW_PRIV_RESET, | ||
6152 | IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 0, 0, "reset" | ||
6153 | }, | ||
6154 | #endif /* CONFIG_IPW_PROMISC */ | ||
6155 | }; | ||
6156 | |||
6157 | static iw_handler ipw_priv_handler[] = { | ||
6158 | ipw_wx_set_powermode, | ||
6159 | ipw_wx_get_powermode, | ||
6160 | ipw_wx_set_wireless_mode, | ||
6161 | ipw_wx_get_wireless_mode, | ||
6162 | #ifdef CONFIG_IPW_PROMISC | ||
6163 | ipw_wx_set_promisc, | ||
6164 | ipw_wx_reset, | ||
6165 | #endif | ||
6166 | }; | ||
6167 | |||
6168 | static struct iw_handler_def ipw_wx_handler_def = | ||
6169 | { | ||
6170 | .standard = ipw_wx_handlers, | ||
6171 | .num_standard = ARRAY_SIZE(ipw_wx_handlers), | ||
6172 | .num_private = ARRAY_SIZE(ipw_priv_handler), | ||
6173 | .num_private_args = ARRAY_SIZE(ipw_priv_args), | ||
6174 | .private = ipw_priv_handler, | ||
6175 | .private_args = ipw_priv_args, | ||
6176 | }; | ||
6177 | |||
6178 | |||
6179 | |||
6180 | |||
6181 | /* | ||
6182 | * Get wireless statistics. | ||
6183 | * Called by /proc/net/wireless | ||
6184 | * Also called by SIOCGIWSTATS | ||
6185 | */ | ||
6186 | static struct iw_statistics *ipw_get_wireless_stats(struct net_device * dev) | ||
6187 | { | ||
6188 | struct ipw_priv *priv = ieee80211_priv(dev); | ||
6189 | struct iw_statistics *wstats; | ||
6190 | |||
6191 | wstats = &priv->wstats; | ||
6192 | |||
6193 | /* if hw is disabled, then ipw2100_get_ordinal() can't be called. | ||
6194 | * ipw2100_wx_wireless_stats seems to be called before fw is | ||
6195 | * initialized. STATUS_ASSOCIATED will only be set if the hw is up | ||
6196 | * and associated; if not associcated, the values are all meaningless | ||
6197 | * anyway, so set them all to NULL and INVALID */ | ||
6198 | if (!(priv->status & STATUS_ASSOCIATED)) { | ||
6199 | wstats->miss.beacon = 0; | ||
6200 | wstats->discard.retries = 0; | ||
6201 | wstats->qual.qual = 0; | ||
6202 | wstats->qual.level = 0; | ||
6203 | wstats->qual.noise = 0; | ||
6204 | wstats->qual.updated = 7; | ||
6205 | wstats->qual.updated |= IW_QUAL_NOISE_INVALID | | ||
6206 | IW_QUAL_QUAL_INVALID | IW_QUAL_LEVEL_INVALID; | ||
6207 | return wstats; | ||
6208 | } | ||
6209 | |||
6210 | wstats->qual.qual = priv->quality; | ||
6211 | wstats->qual.level = average_value(&priv->average_rssi); | ||
6212 | wstats->qual.noise = average_value(&priv->average_noise); | ||
6213 | wstats->qual.updated = IW_QUAL_QUAL_UPDATED | IW_QUAL_LEVEL_UPDATED | | ||
6214 | IW_QUAL_NOISE_UPDATED; | ||
6215 | |||
6216 | wstats->miss.beacon = average_value(&priv->average_missed_beacons); | ||
6217 | wstats->discard.retries = priv->last_tx_failures; | ||
6218 | wstats->discard.code = priv->ieee->ieee_stats.rx_discards_undecryptable; | ||
6219 | |||
6220 | /* if (ipw_get_ordinal(priv, IPW_ORD_STAT_TX_RETRY, &tx_retry, &len)) | ||
6221 | goto fail_get_ordinal; | ||
6222 | wstats->discard.retries += tx_retry; */ | ||
6223 | |||
6224 | return wstats; | ||
6225 | } | ||
6226 | |||
6227 | |||
6228 | /* net device stuff */ | ||
6229 | |||
6230 | static inline void init_sys_config(struct ipw_sys_config *sys_config) | ||
6231 | { | ||
6232 | memset(sys_config, 0, sizeof(struct ipw_sys_config)); | ||
6233 | sys_config->bt_coexistence = 1; /* We may need to look into prvStaBtConfig */ | ||
6234 | sys_config->answer_broadcast_ssid_probe = 0; | ||
6235 | sys_config->accept_all_data_frames = 0; | ||
6236 | sys_config->accept_non_directed_frames = 1; | ||
6237 | sys_config->exclude_unicast_unencrypted = 0; | ||
6238 | sys_config->disable_unicast_decryption = 1; | ||
6239 | sys_config->exclude_multicast_unencrypted = 0; | ||
6240 | sys_config->disable_multicast_decryption = 1; | ||
6241 | sys_config->antenna_diversity = CFG_SYS_ANTENNA_BOTH; | ||
6242 | sys_config->pass_crc_to_host = 0; /* TODO: See if 1 gives us FCS */ | ||
6243 | sys_config->dot11g_auto_detection = 0; | ||
6244 | sys_config->enable_cts_to_self = 0; | ||
6245 | sys_config->bt_coexist_collision_thr = 0; | ||
6246 | sys_config->pass_noise_stats_to_host = 1; | ||
6247 | } | ||
6248 | |||
6249 | static int ipw_net_open(struct net_device *dev) | ||
6250 | { | ||
6251 | struct ipw_priv *priv = ieee80211_priv(dev); | ||
6252 | IPW_DEBUG_INFO("dev->open\n"); | ||
6253 | /* we should be verifying the device is ready to be opened */ | ||
6254 | if (!(priv->status & STATUS_RF_KILL_MASK) && | ||
6255 | (priv->status & STATUS_ASSOCIATED)) | ||
6256 | netif_start_queue(dev); | ||
6257 | return 0; | ||
6258 | } | ||
6259 | |||
6260 | static int ipw_net_stop(struct net_device *dev) | ||
6261 | { | ||
6262 | IPW_DEBUG_INFO("dev->close\n"); | ||
6263 | netif_stop_queue(dev); | ||
6264 | return 0; | ||
6265 | } | ||
6266 | |||
6267 | /* | ||
6268 | todo: | ||
6269 | |||
6270 | modify to send one tfd per fragment instead of using chunking. otherwise | ||
6271 | we need to heavily modify the ieee80211_skb_to_txb. | ||
6272 | */ | ||
6273 | |||
6274 | static inline void ipw_tx_skb(struct ipw_priv *priv, struct ieee80211_txb *txb) | ||
6275 | { | ||
6276 | struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) | ||
6277 | txb->fragments[0]->data; | ||
6278 | int i = 0; | ||
6279 | struct tfd_frame *tfd; | ||
6280 | struct clx2_tx_queue *txq = &priv->txq[0]; | ||
6281 | struct clx2_queue *q = &txq->q; | ||
6282 | u8 id, hdr_len, unicast; | ||
6283 | u16 remaining_bytes; | ||
6284 | |||
6285 | switch (priv->ieee->iw_mode) { | ||
6286 | case IW_MODE_ADHOC: | ||
6287 | hdr_len = IEEE80211_3ADDR_LEN; | ||
6288 | unicast = !is_broadcast_ether_addr(hdr->addr1) && | ||
6289 | !is_multicast_ether_addr(hdr->addr1); | ||
6290 | id = ipw_find_station(priv, hdr->addr1); | ||
6291 | if (id == IPW_INVALID_STATION) { | ||
6292 | id = ipw_add_station(priv, hdr->addr1); | ||
6293 | if (id == IPW_INVALID_STATION) { | ||
6294 | IPW_WARNING("Attempt to send data to " | ||
6295 | "invalid cell: " MAC_FMT "\n", | ||
6296 | MAC_ARG(hdr->addr1)); | ||
6297 | goto drop; | ||
6298 | } | ||
6299 | } | ||
6300 | break; | ||
6301 | |||
6302 | case IW_MODE_INFRA: | ||
6303 | default: | ||
6304 | unicast = !is_broadcast_ether_addr(hdr->addr3) && | ||
6305 | !is_multicast_ether_addr(hdr->addr3); | ||
6306 | hdr_len = IEEE80211_3ADDR_LEN; | ||
6307 | id = 0; | ||
6308 | break; | ||
6309 | } | ||
6310 | |||
6311 | tfd = &txq->bd[q->first_empty]; | ||
6312 | txq->txb[q->first_empty] = txb; | ||
6313 | memset(tfd, 0, sizeof(*tfd)); | ||
6314 | tfd->u.data.station_number = id; | ||
6315 | |||
6316 | tfd->control_flags.message_type = TX_FRAME_TYPE; | ||
6317 | tfd->control_flags.control_bits = TFD_NEED_IRQ_MASK; | ||
6318 | |||
6319 | tfd->u.data.cmd_id = DINO_CMD_TX; | ||
6320 | tfd->u.data.len = txb->payload_size; | ||
6321 | remaining_bytes = txb->payload_size; | ||
6322 | if (unlikely(!unicast)) | ||
6323 | tfd->u.data.tx_flags = DCT_FLAG_NO_WEP; | ||
6324 | else | ||
6325 | tfd->u.data.tx_flags = DCT_FLAG_NO_WEP | DCT_FLAG_ACK_REQD; | ||
6326 | |||
6327 | if (priv->assoc_request.ieee_mode == IPW_B_MODE) | ||
6328 | tfd->u.data.tx_flags_ext = DCT_FLAG_EXT_MODE_CCK; | ||
6329 | else | ||
6330 | tfd->u.data.tx_flags_ext = DCT_FLAG_EXT_MODE_OFDM; | ||
6331 | |||
6332 | if (priv->config & CFG_PREAMBLE) | ||
6333 | tfd->u.data.tx_flags |= DCT_FLAG_SHORT_PREMBL; | ||
6334 | |||
6335 | memcpy(&tfd->u.data.tfd.tfd_24.mchdr, hdr, hdr_len); | ||
6336 | |||
6337 | /* payload */ | ||
6338 | tfd->u.data.num_chunks = min((u8)(NUM_TFD_CHUNKS - 2), txb->nr_frags); | ||
6339 | for (i = 0; i < tfd->u.data.num_chunks; i++) { | ||
6340 | IPW_DEBUG_TX("Dumping TX packet frag %i of %i (%d bytes):\n", | ||
6341 | i, tfd->u.data.num_chunks, | ||
6342 | txb->fragments[i]->len - hdr_len); | ||
6343 | printk_buf(IPW_DL_TX, txb->fragments[i]->data + hdr_len, | ||
6344 | txb->fragments[i]->len - hdr_len); | ||
6345 | |||
6346 | tfd->u.data.chunk_ptr[i] = pci_map_single( | ||
6347 | priv->pci_dev, txb->fragments[i]->data + hdr_len, | ||
6348 | txb->fragments[i]->len - hdr_len, PCI_DMA_TODEVICE); | ||
6349 | tfd->u.data.chunk_len[i] = txb->fragments[i]->len - hdr_len; | ||
6350 | } | ||
6351 | |||
6352 | if (i != txb->nr_frags) { | ||
6353 | struct sk_buff *skb; | ||
6354 | u16 remaining_bytes = 0; | ||
6355 | int j; | ||
6356 | |||
6357 | for (j = i; j < txb->nr_frags; j++) | ||
6358 | remaining_bytes += txb->fragments[j]->len - hdr_len; | ||
6359 | |||
6360 | printk(KERN_INFO "Trying to reallocate for %d bytes\n", | ||
6361 | remaining_bytes); | ||
6362 | skb = alloc_skb(remaining_bytes, GFP_ATOMIC); | ||
6363 | if (skb != NULL) { | ||
6364 | tfd->u.data.chunk_len[i] = remaining_bytes; | ||
6365 | for (j = i; j < txb->nr_frags; j++) { | ||
6366 | int size = txb->fragments[j]->len - hdr_len; | ||
6367 | printk(KERN_INFO "Adding frag %d %d...\n", | ||
6368 | j, size); | ||
6369 | memcpy(skb_put(skb, size), | ||
6370 | txb->fragments[j]->data + hdr_len, | ||
6371 | size); | ||
6372 | } | ||
6373 | dev_kfree_skb_any(txb->fragments[i]); | ||
6374 | txb->fragments[i] = skb; | ||
6375 | tfd->u.data.chunk_ptr[i] = pci_map_single( | ||
6376 | priv->pci_dev, skb->data, | ||
6377 | tfd->u.data.chunk_len[i], PCI_DMA_TODEVICE); | ||
6378 | tfd->u.data.num_chunks++; | ||
6379 | } | ||
6380 | } | ||
6381 | |||
6382 | /* kick DMA */ | ||
6383 | q->first_empty = ipw_queue_inc_wrap(q->first_empty, q->n_bd); | ||
6384 | ipw_write32(priv, q->reg_w, q->first_empty); | ||
6385 | |||
6386 | if (ipw_queue_space(q) < q->high_mark) | ||
6387 | netif_stop_queue(priv->net_dev); | ||
6388 | |||
6389 | return; | ||
6390 | |||
6391 | drop: | ||
6392 | IPW_DEBUG_DROP("Silently dropping Tx packet.\n"); | ||
6393 | ieee80211_txb_free(txb); | ||
6394 | } | ||
6395 | |||
6396 | static int ipw_net_hard_start_xmit(struct ieee80211_txb *txb, | ||
6397 | struct net_device *dev) | ||
6398 | { | ||
6399 | struct ipw_priv *priv = ieee80211_priv(dev); | ||
6400 | unsigned long flags; | ||
6401 | |||
6402 | IPW_DEBUG_TX("dev->xmit(%d bytes)\n", txb->payload_size); | ||
6403 | |||
6404 | spin_lock_irqsave(&priv->lock, flags); | ||
6405 | |||
6406 | if (!(priv->status & STATUS_ASSOCIATED)) { | ||
6407 | IPW_DEBUG_INFO("Tx attempt while not associated.\n"); | ||
6408 | priv->ieee->stats.tx_carrier_errors++; | ||
6409 | netif_stop_queue(dev); | ||
6410 | goto fail_unlock; | ||
6411 | } | ||
6412 | |||
6413 | ipw_tx_skb(priv, txb); | ||
6414 | |||
6415 | spin_unlock_irqrestore(&priv->lock, flags); | ||
6416 | return 0; | ||
6417 | |||
6418 | fail_unlock: | ||
6419 | spin_unlock_irqrestore(&priv->lock, flags); | ||
6420 | return 1; | ||
6421 | } | ||
6422 | |||
6423 | static struct net_device_stats *ipw_net_get_stats(struct net_device *dev) | ||
6424 | { | ||
6425 | struct ipw_priv *priv = ieee80211_priv(dev); | ||
6426 | |||
6427 | priv->ieee->stats.tx_packets = priv->tx_packets; | ||
6428 | priv->ieee->stats.rx_packets = priv->rx_packets; | ||
6429 | return &priv->ieee->stats; | ||
6430 | } | ||
6431 | |||
6432 | static void ipw_net_set_multicast_list(struct net_device *dev) | ||
6433 | { | ||
6434 | |||
6435 | } | ||
6436 | |||
6437 | static int ipw_net_set_mac_address(struct net_device *dev, void *p) | ||
6438 | { | ||
6439 | struct ipw_priv *priv = ieee80211_priv(dev); | ||
6440 | struct sockaddr *addr = p; | ||
6441 | if (!is_valid_ether_addr(addr->sa_data)) | ||
6442 | return -EADDRNOTAVAIL; | ||
6443 | priv->config |= CFG_CUSTOM_MAC; | ||
6444 | memcpy(priv->mac_addr, addr->sa_data, ETH_ALEN); | ||
6445 | printk(KERN_INFO "%s: Setting MAC to " MAC_FMT "\n", | ||
6446 | priv->net_dev->name, MAC_ARG(priv->mac_addr)); | ||
6447 | ipw_adapter_restart(priv); | ||
6448 | return 0; | ||
6449 | } | ||
6450 | |||
6451 | static void ipw_ethtool_get_drvinfo(struct net_device *dev, | ||
6452 | struct ethtool_drvinfo *info) | ||
6453 | { | ||
6454 | struct ipw_priv *p = ieee80211_priv(dev); | ||
6455 | char vers[64]; | ||
6456 | char date[32]; | ||
6457 | u32 len; | ||
6458 | |||
6459 | strcpy(info->driver, DRV_NAME); | ||
6460 | strcpy(info->version, DRV_VERSION); | ||
6461 | |||
6462 | len = sizeof(vers); | ||
6463 | ipw_get_ordinal(p, IPW_ORD_STAT_FW_VERSION, vers, &len); | ||
6464 | len = sizeof(date); | ||
6465 | ipw_get_ordinal(p, IPW_ORD_STAT_FW_DATE, date, &len); | ||
6466 | |||
6467 | snprintf(info->fw_version, sizeof(info->fw_version),"%s (%s)", | ||
6468 | vers, date); | ||
6469 | strcpy(info->bus_info, pci_name(p->pci_dev)); | ||
6470 | info->eedump_len = CX2_EEPROM_IMAGE_SIZE; | ||
6471 | } | ||
6472 | |||
6473 | static u32 ipw_ethtool_get_link(struct net_device *dev) | ||
6474 | { | ||
6475 | struct ipw_priv *priv = ieee80211_priv(dev); | ||
6476 | return (priv->status & STATUS_ASSOCIATED) != 0; | ||
6477 | } | ||
6478 | |||
6479 | static int ipw_ethtool_get_eeprom_len(struct net_device *dev) | ||
6480 | { | ||
6481 | return CX2_EEPROM_IMAGE_SIZE; | ||
6482 | } | ||
6483 | |||
6484 | static int ipw_ethtool_get_eeprom(struct net_device *dev, | ||
6485 | struct ethtool_eeprom *eeprom, u8 *bytes) | ||
6486 | { | ||
6487 | struct ipw_priv *p = ieee80211_priv(dev); | ||
6488 | |||
6489 | if (eeprom->offset + eeprom->len > CX2_EEPROM_IMAGE_SIZE) | ||
6490 | return -EINVAL; | ||
6491 | |||
6492 | memcpy(bytes, &((u8 *)p->eeprom)[eeprom->offset], eeprom->len); | ||
6493 | return 0; | ||
6494 | } | ||
6495 | |||
6496 | static int ipw_ethtool_set_eeprom(struct net_device *dev, | ||
6497 | struct ethtool_eeprom *eeprom, u8 *bytes) | ||
6498 | { | ||
6499 | struct ipw_priv *p = ieee80211_priv(dev); | ||
6500 | int i; | ||
6501 | |||
6502 | if (eeprom->offset + eeprom->len > CX2_EEPROM_IMAGE_SIZE) | ||
6503 | return -EINVAL; | ||
6504 | |||
6505 | memcpy(&((u8 *)p->eeprom)[eeprom->offset], bytes, eeprom->len); | ||
6506 | for (i = IPW_EEPROM_DATA; | ||
6507 | i < IPW_EEPROM_DATA + CX2_EEPROM_IMAGE_SIZE; | ||
6508 | i++) | ||
6509 | ipw_write8(p, i, p->eeprom[i]); | ||
6510 | |||
6511 | return 0; | ||
6512 | } | ||
6513 | |||
6514 | static struct ethtool_ops ipw_ethtool_ops = { | ||
6515 | .get_link = ipw_ethtool_get_link, | ||
6516 | .get_drvinfo = ipw_ethtool_get_drvinfo, | ||
6517 | .get_eeprom_len = ipw_ethtool_get_eeprom_len, | ||
6518 | .get_eeprom = ipw_ethtool_get_eeprom, | ||
6519 | .set_eeprom = ipw_ethtool_set_eeprom, | ||
6520 | }; | ||
6521 | |||
6522 | static irqreturn_t ipw_isr(int irq, void *data, struct pt_regs *regs) | ||
6523 | { | ||
6524 | struct ipw_priv *priv = data; | ||
6525 | u32 inta, inta_mask; | ||
6526 | |||
6527 | if (!priv) | ||
6528 | return IRQ_NONE; | ||
6529 | |||
6530 | spin_lock(&priv->lock); | ||
6531 | |||
6532 | if (!(priv->status & STATUS_INT_ENABLED)) { | ||
6533 | /* Shared IRQ */ | ||
6534 | goto none; | ||
6535 | } | ||
6536 | |||
6537 | inta = ipw_read32(priv, CX2_INTA_RW); | ||
6538 | inta_mask = ipw_read32(priv, CX2_INTA_MASK_R); | ||
6539 | |||
6540 | if (inta == 0xFFFFFFFF) { | ||
6541 | /* Hardware disappeared */ | ||
6542 | IPW_WARNING("IRQ INTA == 0xFFFFFFFF\n"); | ||
6543 | goto none; | ||
6544 | } | ||
6545 | |||
6546 | if (!(inta & (CX2_INTA_MASK_ALL & inta_mask))) { | ||
6547 | /* Shared interrupt */ | ||
6548 | goto none; | ||
6549 | } | ||
6550 | |||
6551 | /* tell the device to stop sending interrupts */ | ||
6552 | ipw_disable_interrupts(priv); | ||
6553 | |||
6554 | /* ack current interrupts */ | ||
6555 | inta &= (CX2_INTA_MASK_ALL & inta_mask); | ||
6556 | ipw_write32(priv, CX2_INTA_RW, inta); | ||
6557 | |||
6558 | /* Cache INTA value for our tasklet */ | ||
6559 | priv->isr_inta = inta; | ||
6560 | |||
6561 | tasklet_schedule(&priv->irq_tasklet); | ||
6562 | |||
6563 | spin_unlock(&priv->lock); | ||
6564 | |||
6565 | return IRQ_HANDLED; | ||
6566 | none: | ||
6567 | spin_unlock(&priv->lock); | ||
6568 | return IRQ_NONE; | ||
6569 | } | ||
6570 | |||
6571 | static void ipw_rf_kill(void *adapter) | ||
6572 | { | ||
6573 | struct ipw_priv *priv = adapter; | ||
6574 | unsigned long flags; | ||
6575 | |||
6576 | spin_lock_irqsave(&priv->lock, flags); | ||
6577 | |||
6578 | if (rf_kill_active(priv)) { | ||
6579 | IPW_DEBUG_RF_KILL("RF Kill active, rescheduling GPIO check\n"); | ||
6580 | if (priv->workqueue) | ||
6581 | queue_delayed_work(priv->workqueue, | ||
6582 | &priv->rf_kill, 2 * HZ); | ||
6583 | goto exit_unlock; | ||
6584 | } | ||
6585 | |||
6586 | /* RF Kill is now disabled, so bring the device back up */ | ||
6587 | |||
6588 | if (!(priv->status & STATUS_RF_KILL_MASK)) { | ||
6589 | IPW_DEBUG_RF_KILL("HW RF Kill no longer active, restarting " | ||
6590 | "device\n"); | ||
6591 | |||
6592 | /* we can not do an adapter restart while inside an irq lock */ | ||
6593 | queue_work(priv->workqueue, &priv->adapter_restart); | ||
6594 | } else | ||
6595 | IPW_DEBUG_RF_KILL("HW RF Kill deactivated. SW RF Kill still " | ||
6596 | "enabled\n"); | ||
6597 | |||
6598 | exit_unlock: | ||
6599 | spin_unlock_irqrestore(&priv->lock, flags); | ||
6600 | } | ||
6601 | |||
6602 | static int ipw_setup_deferred_work(struct ipw_priv *priv) | ||
6603 | { | ||
6604 | int ret = 0; | ||
6605 | |||
6606 | #ifdef CONFIG_SOFTWARE_SUSPEND2 | ||
6607 | priv->workqueue = create_workqueue(DRV_NAME, 0); | ||
6608 | #else | ||
6609 | priv->workqueue = create_workqueue(DRV_NAME); | ||
6610 | #endif | ||
6611 | init_waitqueue_head(&priv->wait_command_queue); | ||
6612 | |||
6613 | INIT_WORK(&priv->adhoc_check, ipw_adhoc_check, priv); | ||
6614 | INIT_WORK(&priv->associate, ipw_associate, priv); | ||
6615 | INIT_WORK(&priv->disassociate, ipw_disassociate, priv); | ||
6616 | INIT_WORK(&priv->rx_replenish, ipw_rx_queue_replenish, priv); | ||
6617 | INIT_WORK(&priv->adapter_restart, ipw_adapter_restart, priv); | ||
6618 | INIT_WORK(&priv->rf_kill, ipw_rf_kill, priv); | ||
6619 | INIT_WORK(&priv->up, (void (*)(void *))ipw_up, priv); | ||
6620 | INIT_WORK(&priv->down, (void (*)(void *))ipw_down, priv); | ||
6621 | INIT_WORK(&priv->request_scan, | ||
6622 | (void (*)(void *))ipw_request_scan, priv); | ||
6623 | INIT_WORK(&priv->gather_stats, | ||
6624 | (void (*)(void *))ipw_gather_stats, priv); | ||
6625 | INIT_WORK(&priv->abort_scan, (void (*)(void *))ipw_abort_scan, priv); | ||
6626 | INIT_WORK(&priv->roam, ipw_roam, priv); | ||
6627 | INIT_WORK(&priv->scan_check, ipw_scan_check, priv); | ||
6628 | |||
6629 | tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long)) | ||
6630 | ipw_irq_tasklet, (unsigned long)priv); | ||
6631 | |||
6632 | return ret; | ||
6633 | } | ||
6634 | |||
6635 | |||
6636 | static void shim__set_security(struct net_device *dev, | ||
6637 | struct ieee80211_security *sec) | ||
6638 | { | ||
6639 | struct ipw_priv *priv = ieee80211_priv(dev); | ||
6640 | int i; | ||
6641 | |||
6642 | for (i = 0; i < 4; i++) { | ||
6643 | if (sec->flags & (1 << i)) { | ||
6644 | priv->sec.key_sizes[i] = sec->key_sizes[i]; | ||
6645 | if (sec->key_sizes[i] == 0) | ||
6646 | priv->sec.flags &= ~(1 << i); | ||
6647 | else | ||
6648 | memcpy(priv->sec.keys[i], sec->keys[i], | ||
6649 | sec->key_sizes[i]); | ||
6650 | priv->sec.flags |= (1 << i); | ||
6651 | priv->status |= STATUS_SECURITY_UPDATED; | ||
6652 | } | ||
6653 | } | ||
6654 | |||
6655 | if ((sec->flags & SEC_ACTIVE_KEY) && | ||
6656 | priv->sec.active_key != sec->active_key) { | ||
6657 | if (sec->active_key <= 3) { | ||
6658 | priv->sec.active_key = sec->active_key; | ||
6659 | priv->sec.flags |= SEC_ACTIVE_KEY; | ||
6660 | } else | ||
6661 | priv->sec.flags &= ~SEC_ACTIVE_KEY; | ||
6662 | priv->status |= STATUS_SECURITY_UPDATED; | ||
6663 | } | ||
6664 | |||
6665 | if ((sec->flags & SEC_AUTH_MODE) && | ||
6666 | (priv->sec.auth_mode != sec->auth_mode)) { | ||
6667 | priv->sec.auth_mode = sec->auth_mode; | ||
6668 | priv->sec.flags |= SEC_AUTH_MODE; | ||
6669 | if (sec->auth_mode == WLAN_AUTH_SHARED_KEY) | ||
6670 | priv->capability |= CAP_SHARED_KEY; | ||
6671 | else | ||
6672 | priv->capability &= ~CAP_SHARED_KEY; | ||
6673 | priv->status |= STATUS_SECURITY_UPDATED; | ||
6674 | } | ||
6675 | |||
6676 | if (sec->flags & SEC_ENABLED && | ||
6677 | priv->sec.enabled != sec->enabled) { | ||
6678 | priv->sec.flags |= SEC_ENABLED; | ||
6679 | priv->sec.enabled = sec->enabled; | ||
6680 | priv->status |= STATUS_SECURITY_UPDATED; | ||
6681 | if (sec->enabled) | ||
6682 | priv->capability |= CAP_PRIVACY_ON; | ||
6683 | else | ||
6684 | priv->capability &= ~CAP_PRIVACY_ON; | ||
6685 | } | ||
6686 | |||
6687 | if (sec->flags & SEC_LEVEL && | ||
6688 | priv->sec.level != sec->level) { | ||
6689 | priv->sec.level = sec->level; | ||
6690 | priv->sec.flags |= SEC_LEVEL; | ||
6691 | priv->status |= STATUS_SECURITY_UPDATED; | ||
6692 | } | ||
6693 | |||
6694 | /* To match current functionality of ipw2100 (which works well w/ | ||
6695 | * various supplicants, we don't force a disassociate if the | ||
6696 | * privacy capability changes ... */ | ||
6697 | #if 0 | ||
6698 | if ((priv->status & (STATUS_ASSOCIATED | STATUS_ASSOCIATING)) && | ||
6699 | (((priv->assoc_request.capability & | ||
6700 | WLAN_CAPABILITY_PRIVACY) && !sec->enabled) || | ||
6701 | (!(priv->assoc_request.capability & | ||
6702 | WLAN_CAPABILITY_PRIVACY) && sec->enabled))) { | ||
6703 | IPW_DEBUG_ASSOC("Disassociating due to capability " | ||
6704 | "change.\n"); | ||
6705 | ipw_disassociate(priv); | ||
6706 | } | ||
6707 | #endif | ||
6708 | } | ||
6709 | |||
6710 | static int init_supported_rates(struct ipw_priv *priv, | ||
6711 | struct ipw_supported_rates *rates) | ||
6712 | { | ||
6713 | /* TODO: Mask out rates based on priv->rates_mask */ | ||
6714 | |||
6715 | memset(rates, 0, sizeof(*rates)); | ||
6716 | /* configure supported rates */ | ||
6717 | switch (priv->ieee->freq_band) { | ||
6718 | case IEEE80211_52GHZ_BAND: | ||
6719 | rates->ieee_mode = IPW_A_MODE; | ||
6720 | rates->purpose = IPW_RATE_CAPABILITIES; | ||
6721 | ipw_add_ofdm_scan_rates(rates, IEEE80211_CCK_MODULATION, | ||
6722 | IEEE80211_OFDM_DEFAULT_RATES_MASK); | ||
6723 | break; | ||
6724 | |||
6725 | default: /* Mixed or 2.4Ghz */ | ||
6726 | rates->ieee_mode = IPW_G_MODE; | ||
6727 | rates->purpose = IPW_RATE_CAPABILITIES; | ||
6728 | ipw_add_cck_scan_rates(rates, IEEE80211_CCK_MODULATION, | ||
6729 | IEEE80211_CCK_DEFAULT_RATES_MASK); | ||
6730 | if (priv->ieee->modulation & IEEE80211_OFDM_MODULATION) { | ||
6731 | ipw_add_ofdm_scan_rates(rates, IEEE80211_CCK_MODULATION, | ||
6732 | IEEE80211_OFDM_DEFAULT_RATES_MASK); | ||
6733 | } | ||
6734 | break; | ||
6735 | } | ||
6736 | |||
6737 | return 0; | ||
6738 | } | ||
6739 | |||
6740 | static int ipw_config(struct ipw_priv *priv) | ||
6741 | { | ||
6742 | int i; | ||
6743 | struct ipw_tx_power tx_power; | ||
6744 | |||
6745 | memset(&priv->sys_config, 0, sizeof(priv->sys_config)); | ||
6746 | memset(&tx_power, 0, sizeof(tx_power)); | ||
6747 | |||
6748 | /* This is only called from ipw_up, which resets/reloads the firmware | ||
6749 | so, we don't need to first disable the card before we configure | ||
6750 | it */ | ||
6751 | |||
6752 | /* configure device for 'G' band */ | ||
6753 | tx_power.ieee_mode = IPW_G_MODE; | ||
6754 | tx_power.num_channels = 11; | ||
6755 | for (i = 0; i < 11; i++) { | ||
6756 | tx_power.channels_tx_power[i].channel_number = i + 1; | ||
6757 | tx_power.channels_tx_power[i].tx_power = priv->tx_power; | ||
6758 | } | ||
6759 | if (ipw_send_tx_power(priv, &tx_power)) | ||
6760 | goto error; | ||
6761 | |||
6762 | /* configure device to also handle 'B' band */ | ||
6763 | tx_power.ieee_mode = IPW_B_MODE; | ||
6764 | if (ipw_send_tx_power(priv, &tx_power)) | ||
6765 | goto error; | ||
6766 | |||
6767 | /* initialize adapter address */ | ||
6768 | if (ipw_send_adapter_address(priv, priv->net_dev->dev_addr)) | ||
6769 | goto error; | ||
6770 | |||
6771 | /* set basic system config settings */ | ||
6772 | init_sys_config(&priv->sys_config); | ||
6773 | if (ipw_send_system_config(priv, &priv->sys_config)) | ||
6774 | goto error; | ||
6775 | |||
6776 | init_supported_rates(priv, &priv->rates); | ||
6777 | if (ipw_send_supported_rates(priv, &priv->rates)) | ||
6778 | goto error; | ||
6779 | |||
6780 | /* Set request-to-send threshold */ | ||
6781 | if (priv->rts_threshold) { | ||
6782 | if (ipw_send_rts_threshold(priv, priv->rts_threshold)) | ||
6783 | goto error; | ||
6784 | } | ||
6785 | |||
6786 | if (ipw_set_random_seed(priv)) | ||
6787 | goto error; | ||
6788 | |||
6789 | /* final state transition to the RUN state */ | ||
6790 | if (ipw_send_host_complete(priv)) | ||
6791 | goto error; | ||
6792 | |||
6793 | /* If configured to try and auto-associate, kick off a scan */ | ||
6794 | if ((priv->config & CFG_ASSOCIATE) && ipw_request_scan(priv)) | ||
6795 | goto error; | ||
6796 | |||
6797 | return 0; | ||
6798 | |||
6799 | error: | ||
6800 | return -EIO; | ||
6801 | } | ||
6802 | |||
6803 | #define MAX_HW_RESTARTS 5 | ||
6804 | static int ipw_up(struct ipw_priv *priv) | ||
6805 | { | ||
6806 | int rc, i; | ||
6807 | |||
6808 | if (priv->status & STATUS_EXIT_PENDING) | ||
6809 | return -EIO; | ||
6810 | |||
6811 | for (i = 0; i < MAX_HW_RESTARTS; i++ ) { | ||
6812 | /* Load the microcode, firmware, and eeprom. | ||
6813 | * Also start the clocks. */ | ||
6814 | rc = ipw_load(priv); | ||
6815 | if (rc) { | ||
6816 | IPW_ERROR("Unable to load firmware: 0x%08X\n", | ||
6817 | rc); | ||
6818 | return rc; | ||
6819 | } | ||
6820 | |||
6821 | ipw_init_ordinals(priv); | ||
6822 | if (!(priv->config & CFG_CUSTOM_MAC)) | ||
6823 | eeprom_parse_mac(priv, priv->mac_addr); | ||
6824 | memcpy(priv->net_dev->dev_addr, priv->mac_addr, ETH_ALEN); | ||
6825 | |||
6826 | if (priv->status & STATUS_RF_KILL_MASK) | ||
6827 | return 0; | ||
6828 | |||
6829 | rc = ipw_config(priv); | ||
6830 | if (!rc) { | ||
6831 | IPW_DEBUG_INFO("Configured device on count %i\n", i); | ||
6832 | priv->notif_missed_beacons = 0; | ||
6833 | netif_start_queue(priv->net_dev); | ||
6834 | return 0; | ||
6835 | } else { | ||
6836 | IPW_DEBUG_INFO("Device configuration failed: 0x%08X\n", | ||
6837 | rc); | ||
6838 | } | ||
6839 | |||
6840 | IPW_DEBUG_INFO("Failed to config device on retry %d of %d\n", | ||
6841 | i, MAX_HW_RESTARTS); | ||
6842 | |||
6843 | /* We had an error bringing up the hardware, so take it | ||
6844 | * all the way back down so we can try again */ | ||
6845 | ipw_down(priv); | ||
6846 | } | ||
6847 | |||
6848 | /* tried to restart and config the device for as long as our | ||
6849 | * patience could withstand */ | ||
6850 | IPW_ERROR("Unable to initialize device after %d attempts.\n", | ||
6851 | i); | ||
6852 | return -EIO; | ||
6853 | } | ||
6854 | |||
6855 | static void ipw_down(struct ipw_priv *priv) | ||
6856 | { | ||
6857 | /* Attempt to disable the card */ | ||
6858 | #if 0 | ||
6859 | ipw_send_card_disable(priv, 0); | ||
6860 | #endif | ||
6861 | |||
6862 | /* tell the device to stop sending interrupts */ | ||
6863 | ipw_disable_interrupts(priv); | ||
6864 | |||
6865 | /* Clear all bits but the RF Kill */ | ||
6866 | priv->status &= STATUS_RF_KILL_MASK; | ||
6867 | |||
6868 | netif_carrier_off(priv->net_dev); | ||
6869 | netif_stop_queue(priv->net_dev); | ||
6870 | |||
6871 | ipw_stop_nic(priv); | ||
6872 | } | ||
6873 | |||
6874 | /* Called by register_netdev() */ | ||
6875 | static int ipw_net_init(struct net_device *dev) | ||
6876 | { | ||
6877 | struct ipw_priv *priv = ieee80211_priv(dev); | ||
6878 | |||
6879 | if (priv->status & STATUS_RF_KILL_SW) { | ||
6880 | IPW_WARNING("Radio disabled by module parameter.\n"); | ||
6881 | return 0; | ||
6882 | } else if (rf_kill_active(priv)) { | ||
6883 | IPW_WARNING("Radio Frequency Kill Switch is On:\n" | ||
6884 | "Kill switch must be turned off for " | ||
6885 | "wireless networking to work.\n"); | ||
6886 | queue_delayed_work(priv->workqueue, &priv->rf_kill, 2 * HZ); | ||
6887 | return 0; | ||
6888 | } | ||
6889 | |||
6890 | if (ipw_up(priv)) | ||
6891 | return -EIO; | ||
6892 | |||
6893 | return 0; | ||
6894 | } | ||
6895 | |||
6896 | /* PCI driver stuff */ | ||
6897 | static struct pci_device_id card_ids[] = { | ||
6898 | {PCI_VENDOR_ID_INTEL, 0x1043, 0x8086, 0x2701, 0, 0, 0}, | ||
6899 | {PCI_VENDOR_ID_INTEL, 0x1043, 0x8086, 0x2702, 0, 0, 0}, | ||
6900 | {PCI_VENDOR_ID_INTEL, 0x1043, 0x8086, 0x2711, 0, 0, 0}, | ||
6901 | {PCI_VENDOR_ID_INTEL, 0x1043, 0x8086, 0x2712, 0, 0, 0}, | ||
6902 | {PCI_VENDOR_ID_INTEL, 0x1043, 0x8086, 0x2721, 0, 0, 0}, | ||
6903 | {PCI_VENDOR_ID_INTEL, 0x1043, 0x8086, 0x2722, 0, 0, 0}, | ||
6904 | {PCI_VENDOR_ID_INTEL, 0x1043, 0x8086, 0x2731, 0, 0, 0}, | ||
6905 | {PCI_VENDOR_ID_INTEL, 0x1043, 0x8086, 0x2732, 0, 0, 0}, | ||
6906 | {PCI_VENDOR_ID_INTEL, 0x1043, 0x8086, 0x2741, 0, 0, 0}, | ||
6907 | {PCI_VENDOR_ID_INTEL, 0x1043, 0x103c, 0x2741, 0, 0, 0}, | ||
6908 | {PCI_VENDOR_ID_INTEL, 0x1043, 0x8086, 0x2742, 0, 0, 0}, | ||
6909 | {PCI_VENDOR_ID_INTEL, 0x1043, 0x8086, 0x2751, 0, 0, 0}, | ||
6910 | {PCI_VENDOR_ID_INTEL, 0x1043, 0x8086, 0x2752, 0, 0, 0}, | ||
6911 | {PCI_VENDOR_ID_INTEL, 0x1043, 0x8086, 0x2753, 0, 0, 0}, | ||
6912 | {PCI_VENDOR_ID_INTEL, 0x1043, 0x8086, 0x2754, 0, 0, 0}, | ||
6913 | {PCI_VENDOR_ID_INTEL, 0x1043, 0x8086, 0x2761, 0, 0, 0}, | ||
6914 | {PCI_VENDOR_ID_INTEL, 0x1043, 0x8086, 0x2762, 0, 0, 0}, | ||
6915 | {PCI_VENDOR_ID_INTEL, 0x104f, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, | ||
6916 | {PCI_VENDOR_ID_INTEL, 0x4220, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, /* BG */ | ||
6917 | {PCI_VENDOR_ID_INTEL, 0x4221, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, /* 2225BG */ | ||
6918 | {PCI_VENDOR_ID_INTEL, 0x4223, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, /* ABG */ | ||
6919 | {PCI_VENDOR_ID_INTEL, 0x4224, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, /* ABG */ | ||
6920 | |||
6921 | /* required last entry */ | ||
6922 | {0,} | ||
6923 | }; | ||
6924 | |||
6925 | MODULE_DEVICE_TABLE(pci, card_ids); | ||
6926 | |||
6927 | static struct attribute *ipw_sysfs_entries[] = { | ||
6928 | &dev_attr_rf_kill.attr, | ||
6929 | &dev_attr_direct_dword.attr, | ||
6930 | &dev_attr_indirect_byte.attr, | ||
6931 | &dev_attr_indirect_dword.attr, | ||
6932 | &dev_attr_mem_gpio_reg.attr, | ||
6933 | &dev_attr_command_event_reg.attr, | ||
6934 | &dev_attr_nic_type.attr, | ||
6935 | &dev_attr_status.attr, | ||
6936 | &dev_attr_cfg.attr, | ||
6937 | &dev_attr_dump_errors.attr, | ||
6938 | &dev_attr_dump_events.attr, | ||
6939 | &dev_attr_eeprom_delay.attr, | ||
6940 | &dev_attr_ucode_version.attr, | ||
6941 | &dev_attr_rtc.attr, | ||
6942 | NULL | ||
6943 | }; | ||
6944 | |||
6945 | static struct attribute_group ipw_attribute_group = { | ||
6946 | .name = NULL, /* put in device directory */ | ||
6947 | .attrs = ipw_sysfs_entries, | ||
6948 | }; | ||
6949 | |||
6950 | static int ipw_pci_probe(struct pci_dev *pdev, | ||
6951 | const struct pci_device_id *ent) | ||
6952 | { | ||
6953 | int err = 0; | ||
6954 | struct net_device *net_dev; | ||
6955 | void __iomem *base; | ||
6956 | u32 length, val; | ||
6957 | struct ipw_priv *priv; | ||
6958 | int band, modulation; | ||
6959 | |||
6960 | net_dev = alloc_ieee80211(sizeof(struct ipw_priv)); | ||
6961 | if (net_dev == NULL) { | ||
6962 | err = -ENOMEM; | ||
6963 | goto out; | ||
6964 | } | ||
6965 | |||
6966 | priv = ieee80211_priv(net_dev); | ||
6967 | priv->ieee = netdev_priv(net_dev); | ||
6968 | priv->net_dev = net_dev; | ||
6969 | priv->pci_dev = pdev; | ||
6970 | #ifdef CONFIG_IPW_DEBUG | ||
6971 | ipw_debug_level = debug; | ||
6972 | #endif | ||
6973 | spin_lock_init(&priv->lock); | ||
6974 | |||
6975 | if (pci_enable_device(pdev)) { | ||
6976 | err = -ENODEV; | ||
6977 | goto out_free_ieee80211; | ||
6978 | } | ||
6979 | |||
6980 | pci_set_master(pdev); | ||
6981 | |||
6982 | #define PCI_DMA_32BIT 0x00000000ffffffffULL | ||
6983 | err = pci_set_dma_mask(pdev, PCI_DMA_32BIT); | ||
6984 | if (!err) | ||
6985 | err = pci_set_consistent_dma_mask(pdev, PCI_DMA_32BIT); | ||
6986 | if (err) { | ||
6987 | printk(KERN_WARNING DRV_NAME ": No suitable DMA available.\n"); | ||
6988 | goto out_pci_disable_device; | ||
6989 | } | ||
6990 | |||
6991 | pci_set_drvdata(pdev, priv); | ||
6992 | |||
6993 | err = pci_request_regions(pdev, DRV_NAME); | ||
6994 | if (err) | ||
6995 | goto out_pci_disable_device; | ||
6996 | |||
6997 | /* We disable the RETRY_TIMEOUT register (0x41) to keep | ||
6998 | * PCI Tx retries from interfering with C3 CPU state */ | ||
6999 | pci_read_config_dword(pdev, 0x40, &val); | ||
7000 | if ((val & 0x0000ff00) != 0) | ||
7001 | pci_write_config_dword(pdev, 0x40, val & 0xffff00ff); | ||
7002 | |||
7003 | length = pci_resource_len(pdev, 0); | ||
7004 | priv->hw_len = length; | ||
7005 | |||
7006 | base = ioremap_nocache(pci_resource_start(pdev, 0), length); | ||
7007 | if (!base) { | ||
7008 | err = -ENODEV; | ||
7009 | goto out_pci_release_regions; | ||
7010 | } | ||
7011 | |||
7012 | priv->hw_base = base; | ||
7013 | IPW_DEBUG_INFO("pci_resource_len = 0x%08x\n", length); | ||
7014 | IPW_DEBUG_INFO("pci_resource_base = %p\n", base); | ||
7015 | |||
7016 | err = ipw_setup_deferred_work(priv); | ||
7017 | if (err) { | ||
7018 | IPW_ERROR("Unable to setup deferred work\n"); | ||
7019 | goto out_iounmap; | ||
7020 | } | ||
7021 | |||
7022 | /* Initialize module parameter values here */ | ||
7023 | if (ifname) | ||
7024 | strncpy(net_dev->name, ifname, IFNAMSIZ); | ||
7025 | |||
7026 | if (associate) | ||
7027 | priv->config |= CFG_ASSOCIATE; | ||
7028 | else | ||
7029 | IPW_DEBUG_INFO("Auto associate disabled.\n"); | ||
7030 | |||
7031 | if (auto_create) | ||
7032 | priv->config |= CFG_ADHOC_CREATE; | ||
7033 | else | ||
7034 | IPW_DEBUG_INFO("Auto adhoc creation disabled.\n"); | ||
7035 | |||
7036 | if (disable) { | ||
7037 | priv->status |= STATUS_RF_KILL_SW; | ||
7038 | IPW_DEBUG_INFO("Radio disabled.\n"); | ||
7039 | } | ||
7040 | |||
7041 | if (channel != 0) { | ||
7042 | priv->config |= CFG_STATIC_CHANNEL; | ||
7043 | priv->channel = channel; | ||
7044 | IPW_DEBUG_INFO("Bind to static channel %d\n", channel); | ||
7045 | IPW_DEBUG_INFO("Bind to static channel %d\n", channel); | ||
7046 | /* TODO: Validate that provided channel is in range */ | ||
7047 | } | ||
7048 | |||
7049 | switch (mode) { | ||
7050 | case 1: | ||
7051 | priv->ieee->iw_mode = IW_MODE_ADHOC; | ||
7052 | break; | ||
7053 | #ifdef CONFIG_IPW_PROMISC | ||
7054 | case 2: | ||
7055 | priv->ieee->iw_mode = IW_MODE_MONITOR; | ||
7056 | break; | ||
7057 | #endif | ||
7058 | default: | ||
7059 | case 0: | ||
7060 | priv->ieee->iw_mode = IW_MODE_INFRA; | ||
7061 | break; | ||
7062 | } | ||
7063 | |||
7064 | if ((priv->pci_dev->device == 0x4223) || | ||
7065 | (priv->pci_dev->device == 0x4224)) { | ||
7066 | printk(KERN_INFO DRV_NAME | ||
7067 | ": Detected Intel PRO/Wireless 2915ABG Network " | ||
7068 | "Connection\n"); | ||
7069 | priv->ieee->abg_ture = 1; | ||
7070 | band = IEEE80211_52GHZ_BAND | IEEE80211_24GHZ_BAND; | ||
7071 | modulation = IEEE80211_OFDM_MODULATION | | ||
7072 | IEEE80211_CCK_MODULATION; | ||
7073 | priv->adapter = IPW_2915ABG; | ||
7074 | priv->ieee->mode = IEEE_A|IEEE_G|IEEE_B; | ||
7075 | } else { | ||
7076 | if (priv->pci_dev->device == 0x4221) | ||
7077 | printk(KERN_INFO DRV_NAME | ||
7078 | ": Detected Intel PRO/Wireless 2225BG Network " | ||
7079 | "Connection\n"); | ||
7080 | else | ||
7081 | printk(KERN_INFO DRV_NAME | ||
7082 | ": Detected Intel PRO/Wireless 2200BG Network " | ||
7083 | "Connection\n"); | ||
7084 | |||
7085 | priv->ieee->abg_ture = 0; | ||
7086 | band = IEEE80211_24GHZ_BAND; | ||
7087 | modulation = IEEE80211_OFDM_MODULATION | | ||
7088 | IEEE80211_CCK_MODULATION; | ||
7089 | priv->adapter = IPW_2200BG; | ||
7090 | priv->ieee->mode = IEEE_G|IEEE_B; | ||
7091 | } | ||
7092 | |||
7093 | priv->ieee->freq_band = band; | ||
7094 | priv->ieee->modulation = modulation; | ||
7095 | |||
7096 | priv->rates_mask = IEEE80211_DEFAULT_RATES_MASK; | ||
7097 | |||
7098 | priv->missed_beacon_threshold = IPW_MB_DISASSOCIATE_THRESHOLD_DEFAULT; | ||
7099 | priv->roaming_threshold = IPW_MB_ROAMING_THRESHOLD_DEFAULT; | ||
7100 | |||
7101 | priv->rts_threshold = DEFAULT_RTS_THRESHOLD; | ||
7102 | |||
7103 | /* If power management is turned on, default to AC mode */ | ||
7104 | priv->power_mode = IPW_POWER_AC; | ||
7105 | priv->tx_power = IPW_DEFAULT_TX_POWER; | ||
7106 | |||
7107 | err = request_irq(pdev->irq, ipw_isr, SA_SHIRQ, DRV_NAME, | ||
7108 | priv); | ||
7109 | if (err) { | ||
7110 | IPW_ERROR("Error allocating IRQ %d\n", pdev->irq); | ||
7111 | goto out_destroy_workqueue; | ||
7112 | } | ||
7113 | |||
7114 | SET_MODULE_OWNER(net_dev); | ||
7115 | SET_NETDEV_DEV(net_dev, &pdev->dev); | ||
7116 | |||
7117 | priv->ieee->hard_start_xmit = ipw_net_hard_start_xmit; | ||
7118 | priv->ieee->set_security = shim__set_security; | ||
7119 | |||
7120 | net_dev->open = ipw_net_open; | ||
7121 | net_dev->stop = ipw_net_stop; | ||
7122 | net_dev->init = ipw_net_init; | ||
7123 | net_dev->get_stats = ipw_net_get_stats; | ||
7124 | net_dev->set_multicast_list = ipw_net_set_multicast_list; | ||
7125 | net_dev->set_mac_address = ipw_net_set_mac_address; | ||
7126 | net_dev->get_wireless_stats = ipw_get_wireless_stats; | ||
7127 | net_dev->wireless_handlers = &ipw_wx_handler_def; | ||
7128 | net_dev->ethtool_ops = &ipw_ethtool_ops; | ||
7129 | net_dev->irq = pdev->irq; | ||
7130 | net_dev->base_addr = (unsigned long )priv->hw_base; | ||
7131 | net_dev->mem_start = pci_resource_start(pdev, 0); | ||
7132 | net_dev->mem_end = net_dev->mem_start + pci_resource_len(pdev, 0) - 1; | ||
7133 | |||
7134 | err = sysfs_create_group(&pdev->dev.kobj, &ipw_attribute_group); | ||
7135 | if (err) { | ||
7136 | IPW_ERROR("failed to create sysfs device attributes\n"); | ||
7137 | goto out_release_irq; | ||
7138 | } | ||
7139 | |||
7140 | err = register_netdev(net_dev); | ||
7141 | if (err) { | ||
7142 | IPW_ERROR("failed to register network device\n"); | ||
7143 | goto out_remove_group; | ||
7144 | } | ||
7145 | |||
7146 | return 0; | ||
7147 | |||
7148 | out_remove_group: | ||
7149 | sysfs_remove_group(&pdev->dev.kobj, &ipw_attribute_group); | ||
7150 | out_release_irq: | ||
7151 | free_irq(pdev->irq, priv); | ||
7152 | out_destroy_workqueue: | ||
7153 | destroy_workqueue(priv->workqueue); | ||
7154 | priv->workqueue = NULL; | ||
7155 | out_iounmap: | ||
7156 | iounmap(priv->hw_base); | ||
7157 | out_pci_release_regions: | ||
7158 | pci_release_regions(pdev); | ||
7159 | out_pci_disable_device: | ||
7160 | pci_disable_device(pdev); | ||
7161 | pci_set_drvdata(pdev, NULL); | ||
7162 | out_free_ieee80211: | ||
7163 | free_ieee80211(priv->net_dev); | ||
7164 | out: | ||
7165 | return err; | ||
7166 | } | ||
7167 | |||
7168 | static void ipw_pci_remove(struct pci_dev *pdev) | ||
7169 | { | ||
7170 | struct ipw_priv *priv = pci_get_drvdata(pdev); | ||
7171 | if (!priv) | ||
7172 | return; | ||
7173 | |||
7174 | priv->status |= STATUS_EXIT_PENDING; | ||
7175 | |||
7176 | sysfs_remove_group(&pdev->dev.kobj, &ipw_attribute_group); | ||
7177 | |||
7178 | ipw_down(priv); | ||
7179 | |||
7180 | unregister_netdev(priv->net_dev); | ||
7181 | |||
7182 | if (priv->rxq) { | ||
7183 | ipw_rx_queue_free(priv, priv->rxq); | ||
7184 | priv->rxq = NULL; | ||
7185 | } | ||
7186 | ipw_tx_queue_free(priv); | ||
7187 | |||
7188 | /* ipw_down will ensure that there is no more pending work | ||
7189 | * in the workqueue's, so we can safely remove them now. */ | ||
7190 | if (priv->workqueue) { | ||
7191 | cancel_delayed_work(&priv->adhoc_check); | ||
7192 | cancel_delayed_work(&priv->gather_stats); | ||
7193 | cancel_delayed_work(&priv->request_scan); | ||
7194 | cancel_delayed_work(&priv->rf_kill); | ||
7195 | cancel_delayed_work(&priv->scan_check); | ||
7196 | destroy_workqueue(priv->workqueue); | ||
7197 | priv->workqueue = NULL; | ||
7198 | } | ||
7199 | |||
7200 | free_irq(pdev->irq, priv); | ||
7201 | iounmap(priv->hw_base); | ||
7202 | pci_release_regions(pdev); | ||
7203 | pci_disable_device(pdev); | ||
7204 | pci_set_drvdata(pdev, NULL); | ||
7205 | free_ieee80211(priv->net_dev); | ||
7206 | |||
7207 | #ifdef CONFIG_PM | ||
7208 | if (fw_loaded) { | ||
7209 | release_firmware(bootfw); | ||
7210 | release_firmware(ucode); | ||
7211 | release_firmware(firmware); | ||
7212 | fw_loaded = 0; | ||
7213 | } | ||
7214 | #endif | ||
7215 | } | ||
7216 | |||
7217 | |||
7218 | #ifdef CONFIG_PM | ||
7219 | static int ipw_pci_suspend(struct pci_dev *pdev, u32 state) | ||
7220 | { | ||
7221 | struct ipw_priv *priv = pci_get_drvdata(pdev); | ||
7222 | struct net_device *dev = priv->net_dev; | ||
7223 | |||
7224 | printk(KERN_INFO "%s: Going into suspend...\n", dev->name); | ||
7225 | |||
7226 | /* Take down the device; powers it off, etc. */ | ||
7227 | ipw_down(priv); | ||
7228 | |||
7229 | /* Remove the PRESENT state of the device */ | ||
7230 | netif_device_detach(dev); | ||
7231 | |||
7232 | #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,10) | ||
7233 | pci_save_state(pdev, priv->pm_state); | ||
7234 | #else | ||
7235 | pci_save_state(pdev); | ||
7236 | #endif | ||
7237 | pci_disable_device(pdev); | ||
7238 | pci_set_power_state(pdev, state); | ||
7239 | |||
7240 | return 0; | ||
7241 | } | ||
7242 | |||
7243 | static int ipw_pci_resume(struct pci_dev *pdev) | ||
7244 | { | ||
7245 | struct ipw_priv *priv = pci_get_drvdata(pdev); | ||
7246 | struct net_device *dev = priv->net_dev; | ||
7247 | u32 val; | ||
7248 | |||
7249 | printk(KERN_INFO "%s: Coming out of suspend...\n", dev->name); | ||
7250 | |||
7251 | pci_set_power_state(pdev, 0); | ||
7252 | pci_enable_device(pdev); | ||
7253 | #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,10) | ||
7254 | pci_restore_state(pdev, priv->pm_state); | ||
7255 | #else | ||
7256 | pci_restore_state(pdev); | ||
7257 | #endif | ||
7258 | /* | ||
7259 | * Suspend/Resume resets the PCI configuration space, so we have to | ||
7260 | * re-disable the RETRY_TIMEOUT register (0x41) to keep PCI Tx retries | ||
7261 | * from interfering with C3 CPU state. pci_restore_state won't help | ||
7262 | * here since it only restores the first 64 bytes pci config header. | ||
7263 | */ | ||
7264 | pci_read_config_dword(pdev, 0x40, &val); | ||
7265 | if ((val & 0x0000ff00) != 0) | ||
7266 | pci_write_config_dword(pdev, 0x40, val & 0xffff00ff); | ||
7267 | |||
7268 | /* Set the device back into the PRESENT state; this will also wake | ||
7269 | * the queue of needed */ | ||
7270 | netif_device_attach(dev); | ||
7271 | |||
7272 | /* Bring the device back up */ | ||
7273 | queue_work(priv->workqueue, &priv->up); | ||
7274 | |||
7275 | return 0; | ||
7276 | } | ||
7277 | #endif | ||
7278 | |||
7279 | /* driver initialization stuff */ | ||
7280 | static struct pci_driver ipw_driver = { | ||
7281 | .name = DRV_NAME, | ||
7282 | .id_table = card_ids, | ||
7283 | .probe = ipw_pci_probe, | ||
7284 | .remove = __devexit_p(ipw_pci_remove), | ||
7285 | #ifdef CONFIG_PM | ||
7286 | .suspend = ipw_pci_suspend, | ||
7287 | .resume = ipw_pci_resume, | ||
7288 | #endif | ||
7289 | }; | ||
7290 | |||
7291 | static int __init ipw_init(void) | ||
7292 | { | ||
7293 | int ret; | ||
7294 | |||
7295 | printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n"); | ||
7296 | printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n"); | ||
7297 | |||
7298 | ret = pci_module_init(&ipw_driver); | ||
7299 | if (ret) { | ||
7300 | IPW_ERROR("Unable to initialize PCI module\n"); | ||
7301 | return ret; | ||
7302 | } | ||
7303 | |||
7304 | ret = driver_create_file(&ipw_driver.driver, | ||
7305 | &driver_attr_debug_level); | ||
7306 | if (ret) { | ||
7307 | IPW_ERROR("Unable to create driver sysfs file\n"); | ||
7308 | pci_unregister_driver(&ipw_driver); | ||
7309 | return ret; | ||
7310 | } | ||
7311 | |||
7312 | return ret; | ||
7313 | } | ||
7314 | |||
7315 | static void __exit ipw_exit(void) | ||
7316 | { | ||
7317 | driver_remove_file(&ipw_driver.driver, &driver_attr_debug_level); | ||
7318 | pci_unregister_driver(&ipw_driver); | ||
7319 | } | ||
7320 | |||
7321 | module_param(disable, int, 0444); | ||
7322 | MODULE_PARM_DESC(disable, "manually disable the radio (default 0 [radio on])"); | ||
7323 | |||
7324 | module_param(associate, int, 0444); | ||
7325 | MODULE_PARM_DESC(associate, "auto associate when scanning (default on)"); | ||
7326 | |||
7327 | module_param(auto_create, int, 0444); | ||
7328 | MODULE_PARM_DESC(auto_create, "auto create adhoc network (default on)"); | ||
7329 | |||
7330 | module_param(debug, int, 0444); | ||
7331 | MODULE_PARM_DESC(debug, "debug output mask"); | ||
7332 | |||
7333 | module_param(channel, int, 0444); | ||
7334 | MODULE_PARM_DESC(channel, "channel to limit associate to (default 0 [ANY])"); | ||
7335 | |||
7336 | module_param(ifname, charp, 0444); | ||
7337 | MODULE_PARM_DESC(ifname, "network device name (default eth%d)"); | ||
7338 | |||
7339 | #ifdef CONFIG_IPW_PROMISC | ||
7340 | module_param(mode, int, 0444); | ||
7341 | MODULE_PARM_DESC(mode, "network mode (0=BSS,1=IBSS,2=Monitor)"); | ||
7342 | #else | ||
7343 | module_param(mode, int, 0444); | ||
7344 | MODULE_PARM_DESC(mode, "network mode (0=BSS,1=IBSS)"); | ||
7345 | #endif | ||
7346 | |||
7347 | module_exit(ipw_exit); | ||
7348 | module_init(ipw_init); | ||
diff --git a/drivers/net/wireless/ipw2200.h b/drivers/net/wireless/ipw2200.h new file mode 100644 index 000000000000..4e8b75e7962a --- /dev/null +++ b/drivers/net/wireless/ipw2200.h | |||
@@ -0,0 +1,1770 @@ | |||
1 | /****************************************************************************** | ||
2 | |||
3 | Copyright(c) 2003 - 2004 Intel Corporation. All rights reserved. | ||
4 | |||
5 | This program is free software; you can redistribute it and/or modify it | ||
6 | under the terms of version 2 of the GNU General Public License as | ||
7 | published by the Free Software Foundation. | ||
8 | |||
9 | This program is distributed in the hope that it will be useful, but WITHOUT | ||
10 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | ||
11 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | ||
12 | more details. | ||
13 | |||
14 | You should have received a copy of the GNU General Public License along with | ||
15 | this program; if not, write to the Free Software Foundation, Inc., 59 | ||
16 | Temple Place - Suite 330, Boston, MA 02111-1307, USA. | ||
17 | |||
18 | The full GNU General Public License is included in this distribution in the | ||
19 | file called LICENSE. | ||
20 | |||
21 | Contact Information: | ||
22 | James P. Ketrenos <ipw2100-admin@linux.intel.com> | ||
23 | Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 | ||
24 | |||
25 | ******************************************************************************/ | ||
26 | |||
27 | #ifndef __ipw2200_h__ | ||
28 | #define __ipw2200_h__ | ||
29 | |||
30 | #define WEXT_USECHANNELS 1 | ||
31 | |||
32 | #include <linux/module.h> | ||
33 | #include <linux/moduleparam.h> | ||
34 | #include <linux/config.h> | ||
35 | #include <linux/init.h> | ||
36 | |||
37 | #include <linux/version.h> | ||
38 | #include <linux/pci.h> | ||
39 | #include <linux/netdevice.h> | ||
40 | #include <linux/ethtool.h> | ||
41 | #include <linux/skbuff.h> | ||
42 | #include <linux/etherdevice.h> | ||
43 | #include <linux/delay.h> | ||
44 | #include <linux/random.h> | ||
45 | |||
46 | #include <linux/firmware.h> | ||
47 | #include <linux/wireless.h> | ||
48 | #include <asm/io.h> | ||
49 | |||
50 | #include <net/ieee80211.h> | ||
51 | |||
52 | #define DRV_NAME "ipw2200" | ||
53 | |||
54 | #include <linux/workqueue.h> | ||
55 | |||
56 | #ifndef IRQ_NONE | ||
57 | typedef void irqreturn_t; | ||
58 | #define IRQ_NONE | ||
59 | #define IRQ_HANDLED | ||
60 | #define IRQ_RETVAL(x) | ||
61 | #endif | ||
62 | |||
63 | #if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,9) ) | ||
64 | #define __iomem | ||
65 | #endif | ||
66 | |||
67 | #if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,5) ) | ||
68 | #define pci_dma_sync_single_for_cpu pci_dma_sync_single | ||
69 | #define pci_dma_sync_single_for_device pci_dma_sync_single | ||
70 | #endif | ||
71 | |||
72 | #ifndef HAVE_FREE_NETDEV | ||
73 | #define free_netdev(x) kfree(x) | ||
74 | #endif | ||
75 | |||
76 | /* Authentication and Association States */ | ||
77 | enum connection_manager_assoc_states | ||
78 | { | ||
79 | CMAS_INIT = 0, | ||
80 | CMAS_TX_AUTH_SEQ_1, | ||
81 | CMAS_RX_AUTH_SEQ_2, | ||
82 | CMAS_AUTH_SEQ_1_PASS, | ||
83 | CMAS_AUTH_SEQ_1_FAIL, | ||
84 | CMAS_TX_AUTH_SEQ_3, | ||
85 | CMAS_RX_AUTH_SEQ_4, | ||
86 | CMAS_AUTH_SEQ_2_PASS, | ||
87 | CMAS_AUTH_SEQ_2_FAIL, | ||
88 | CMAS_AUTHENTICATED, | ||
89 | CMAS_TX_ASSOC, | ||
90 | CMAS_RX_ASSOC_RESP, | ||
91 | CMAS_ASSOCIATED, | ||
92 | CMAS_LAST | ||
93 | }; | ||
94 | |||
95 | |||
96 | #define IPW_NORMAL 0 | ||
97 | #define IPW_NOWAIT 0 | ||
98 | #define IPW_WAIT (1<<0) | ||
99 | #define IPW_QUIET (1<<1) | ||
100 | #define IPW_ROAMING (1<<2) | ||
101 | |||
102 | #define IPW_POWER_MODE_CAM 0x00 //(always on) | ||
103 | #define IPW_POWER_INDEX_1 0x01 | ||
104 | #define IPW_POWER_INDEX_2 0x02 | ||
105 | #define IPW_POWER_INDEX_3 0x03 | ||
106 | #define IPW_POWER_INDEX_4 0x04 | ||
107 | #define IPW_POWER_INDEX_5 0x05 | ||
108 | #define IPW_POWER_AC 0x06 | ||
109 | #define IPW_POWER_BATTERY 0x07 | ||
110 | #define IPW_POWER_LIMIT 0x07 | ||
111 | #define IPW_POWER_MASK 0x0F | ||
112 | #define IPW_POWER_ENABLED 0x10 | ||
113 | #define IPW_POWER_LEVEL(x) ((x) & IPW_POWER_MASK) | ||
114 | |||
115 | #define IPW_CMD_HOST_COMPLETE 2 | ||
116 | #define IPW_CMD_POWER_DOWN 4 | ||
117 | #define IPW_CMD_SYSTEM_CONFIG 6 | ||
118 | #define IPW_CMD_MULTICAST_ADDRESS 7 | ||
119 | #define IPW_CMD_SSID 8 | ||
120 | #define IPW_CMD_ADAPTER_ADDRESS 11 | ||
121 | #define IPW_CMD_PORT_TYPE 12 | ||
122 | #define IPW_CMD_RTS_THRESHOLD 15 | ||
123 | #define IPW_CMD_FRAG_THRESHOLD 16 | ||
124 | #define IPW_CMD_POWER_MODE 17 | ||
125 | #define IPW_CMD_WEP_KEY 18 | ||
126 | #define IPW_CMD_TGI_TX_KEY 19 | ||
127 | #define IPW_CMD_SCAN_REQUEST 20 | ||
128 | #define IPW_CMD_ASSOCIATE 21 | ||
129 | #define IPW_CMD_SUPPORTED_RATES 22 | ||
130 | #define IPW_CMD_SCAN_ABORT 23 | ||
131 | #define IPW_CMD_TX_FLUSH 24 | ||
132 | #define IPW_CMD_QOS_PARAMETERS 25 | ||
133 | #define IPW_CMD_SCAN_REQUEST_EXT 26 | ||
134 | #define IPW_CMD_DINO_CONFIG 30 | ||
135 | #define IPW_CMD_RSN_CAPABILITIES 31 | ||
136 | #define IPW_CMD_RX_KEY 32 | ||
137 | #define IPW_CMD_CARD_DISABLE 33 | ||
138 | #define IPW_CMD_SEED_NUMBER 34 | ||
139 | #define IPW_CMD_TX_POWER 35 | ||
140 | #define IPW_CMD_COUNTRY_INFO 36 | ||
141 | #define IPW_CMD_AIRONET_INFO 37 | ||
142 | #define IPW_CMD_AP_TX_POWER 38 | ||
143 | #define IPW_CMD_CCKM_INFO 39 | ||
144 | #define IPW_CMD_CCX_VER_INFO 40 | ||
145 | #define IPW_CMD_SET_CALIBRATION 41 | ||
146 | #define IPW_CMD_SENSITIVITY_CALIB 42 | ||
147 | #define IPW_CMD_RETRY_LIMIT 51 | ||
148 | #define IPW_CMD_IPW_PRE_POWER_DOWN 58 | ||
149 | #define IPW_CMD_VAP_BEACON_TEMPLATE 60 | ||
150 | #define IPW_CMD_VAP_DTIM_PERIOD 61 | ||
151 | #define IPW_CMD_EXT_SUPPORTED_RATES 62 | ||
152 | #define IPW_CMD_VAP_LOCAL_TX_PWR_CONSTRAINT 63 | ||
153 | #define IPW_CMD_VAP_QUIET_INTERVALS 64 | ||
154 | #define IPW_CMD_VAP_CHANNEL_SWITCH 65 | ||
155 | #define IPW_CMD_VAP_MANDATORY_CHANNELS 66 | ||
156 | #define IPW_CMD_VAP_CELL_PWR_LIMIT 67 | ||
157 | #define IPW_CMD_VAP_CF_PARAM_SET 68 | ||
158 | #define IPW_CMD_VAP_SET_BEACONING_STATE 69 | ||
159 | #define IPW_CMD_MEASUREMENT 80 | ||
160 | #define IPW_CMD_POWER_CAPABILITY 81 | ||
161 | #define IPW_CMD_SUPPORTED_CHANNELS 82 | ||
162 | #define IPW_CMD_TPC_REPORT 83 | ||
163 | #define IPW_CMD_WME_INFO 84 | ||
164 | #define IPW_CMD_PRODUCTION_COMMAND 85 | ||
165 | #define IPW_CMD_LINKSYS_EOU_INFO 90 | ||
166 | |||
167 | #define RFD_SIZE 4 | ||
168 | #define NUM_TFD_CHUNKS 6 | ||
169 | |||
170 | #define TX_QUEUE_SIZE 32 | ||
171 | #define RX_QUEUE_SIZE 32 | ||
172 | |||
173 | #define DINO_CMD_WEP_KEY 0x08 | ||
174 | #define DINO_CMD_TX 0x0B | ||
175 | #define DCT_ANTENNA_A 0x01 | ||
176 | #define DCT_ANTENNA_B 0x02 | ||
177 | |||
178 | #define IPW_A_MODE 0 | ||
179 | #define IPW_B_MODE 1 | ||
180 | #define IPW_G_MODE 2 | ||
181 | |||
182 | /* | ||
183 | * TX Queue Flag Definitions | ||
184 | */ | ||
185 | |||
186 | /* abort attempt if mgmt frame is rx'd */ | ||
187 | #define DCT_FLAG_ABORT_MGMT 0x01 | ||
188 | |||
189 | /* require CTS */ | ||
190 | #define DCT_FLAG_CTS_REQUIRED 0x02 | ||
191 | |||
192 | /* use short preamble */ | ||
193 | #define DCT_FLAG_SHORT_PREMBL 0x04 | ||
194 | |||
195 | /* RTS/CTS first */ | ||
196 | #define DCT_FLAG_RTS_REQD 0x08 | ||
197 | |||
198 | /* dont calculate duration field */ | ||
199 | #define DCT_FLAG_DUR_SET 0x10 | ||
200 | |||
201 | /* even if MAC WEP set (allows pre-encrypt) */ | ||
202 | #define DCT_FLAG_NO_WEP 0x20 | ||
203 | #define IPW_ | ||
204 | /* overwrite TSF field */ | ||
205 | #define DCT_FLAG_TSF_REQD 0x40 | ||
206 | |||
207 | /* ACK rx is expected to follow */ | ||
208 | #define DCT_FLAG_ACK_REQD 0x80 | ||
209 | |||
210 | #define DCT_FLAG_EXT_MODE_CCK 0x01 | ||
211 | #define DCT_FLAG_EXT_MODE_OFDM 0x00 | ||
212 | |||
213 | |||
214 | #define TX_RX_TYPE_MASK 0xFF | ||
215 | #define TX_FRAME_TYPE 0x00 | ||
216 | #define TX_HOST_COMMAND_TYPE 0x01 | ||
217 | #define RX_FRAME_TYPE 0x09 | ||
218 | #define RX_HOST_NOTIFICATION_TYPE 0x03 | ||
219 | #define RX_HOST_CMD_RESPONSE_TYPE 0x04 | ||
220 | #define RX_TX_FRAME_RESPONSE_TYPE 0x05 | ||
221 | #define TFD_NEED_IRQ_MASK 0x04 | ||
222 | |||
223 | #define HOST_CMD_DINO_CONFIG 30 | ||
224 | |||
225 | #define HOST_NOTIFICATION_STATUS_ASSOCIATED 10 | ||
226 | #define HOST_NOTIFICATION_STATUS_AUTHENTICATE 11 | ||
227 | #define HOST_NOTIFICATION_STATUS_SCAN_CHANNEL_RESULT 12 | ||
228 | #define HOST_NOTIFICATION_STATUS_SCAN_COMPLETED 13 | ||
229 | #define HOST_NOTIFICATION_STATUS_FRAG_LENGTH 14 | ||
230 | #define HOST_NOTIFICATION_STATUS_LINK_DETERIORATION 15 | ||
231 | #define HOST_NOTIFICATION_DINO_CONFIG_RESPONSE 16 | ||
232 | #define HOST_NOTIFICATION_STATUS_BEACON_STATE 17 | ||
233 | #define HOST_NOTIFICATION_STATUS_TGI_TX_KEY 18 | ||
234 | #define HOST_NOTIFICATION_TX_STATUS 19 | ||
235 | #define HOST_NOTIFICATION_CALIB_KEEP_RESULTS 20 | ||
236 | #define HOST_NOTIFICATION_MEASUREMENT_STARTED 21 | ||
237 | #define HOST_NOTIFICATION_MEASUREMENT_ENDED 22 | ||
238 | #define HOST_NOTIFICATION_CHANNEL_SWITCHED 23 | ||
239 | #define HOST_NOTIFICATION_RX_DURING_QUIET_PERIOD 24 | ||
240 | #define HOST_NOTIFICATION_NOISE_STATS 25 | ||
241 | #define HOST_NOTIFICATION_S36_MEASUREMENT_ACCEPTED 30 | ||
242 | #define HOST_NOTIFICATION_S36_MEASUREMENT_REFUSED 31 | ||
243 | |||
244 | #define HOST_NOTIFICATION_STATUS_BEACON_MISSING 1 | ||
245 | #define IPW_MB_DISASSOCIATE_THRESHOLD_DEFAULT 24 | ||
246 | #define IPW_MB_ROAMING_THRESHOLD_DEFAULT 8 | ||
247 | #define IPW_REAL_RATE_RX_PACKET_THRESHOLD 300 | ||
248 | |||
249 | #define MACADRR_BYTE_LEN 6 | ||
250 | |||
251 | #define DCR_TYPE_AP 0x01 | ||
252 | #define DCR_TYPE_WLAP 0x02 | ||
253 | #define DCR_TYPE_MU_ESS 0x03 | ||
254 | #define DCR_TYPE_MU_IBSS 0x04 | ||
255 | #define DCR_TYPE_MU_PIBSS 0x05 | ||
256 | #define DCR_TYPE_SNIFFER 0x06 | ||
257 | #define DCR_TYPE_MU_BSS DCR_TYPE_MU_ESS | ||
258 | |||
259 | /** | ||
260 | * Generic queue structure | ||
261 | * | ||
262 | * Contains common data for Rx and Tx queues | ||
263 | */ | ||
264 | struct clx2_queue { | ||
265 | int n_bd; /**< number of BDs in this queue */ | ||
266 | int first_empty; /**< 1-st empty entry (index) */ | ||
267 | int last_used; /**< last used entry (index) */ | ||
268 | u32 reg_w; /**< 'write' reg (queue head), addr in domain 1 */ | ||
269 | u32 reg_r; /**< 'read' reg (queue tail), addr in domain 1 */ | ||
270 | dma_addr_t dma_addr; /**< physical addr for BD's */ | ||
271 | int low_mark; /**< low watermark, resume queue if free space more than this */ | ||
272 | int high_mark; /**< high watermark, stop queue if free space less than this */ | ||
273 | } __attribute__ ((packed)); | ||
274 | |||
275 | struct machdr32 | ||
276 | { | ||
277 | u16 frame_ctl; | ||
278 | u16 duration; // watch out for endians! | ||
279 | u8 addr1[ MACADRR_BYTE_LEN ]; | ||
280 | u8 addr2[ MACADRR_BYTE_LEN ]; | ||
281 | u8 addr3[ MACADRR_BYTE_LEN ]; | ||
282 | u16 seq_ctrl; // more endians! | ||
283 | u8 addr4[ MACADRR_BYTE_LEN ]; | ||
284 | u16 qos_ctrl; | ||
285 | } __attribute__ ((packed)) ; | ||
286 | |||
287 | struct machdr30 | ||
288 | { | ||
289 | u16 frame_ctl; | ||
290 | u16 duration; // watch out for endians! | ||
291 | u8 addr1[ MACADRR_BYTE_LEN ]; | ||
292 | u8 addr2[ MACADRR_BYTE_LEN ]; | ||
293 | u8 addr3[ MACADRR_BYTE_LEN ]; | ||
294 | u16 seq_ctrl; // more endians! | ||
295 | u8 addr4[ MACADRR_BYTE_LEN ]; | ||
296 | } __attribute__ ((packed)) ; | ||
297 | |||
298 | struct machdr26 | ||
299 | { | ||
300 | u16 frame_ctl; | ||
301 | u16 duration; // watch out for endians! | ||
302 | u8 addr1[ MACADRR_BYTE_LEN ]; | ||
303 | u8 addr2[ MACADRR_BYTE_LEN ]; | ||
304 | u8 addr3[ MACADRR_BYTE_LEN ]; | ||
305 | u16 seq_ctrl; // more endians! | ||
306 | u16 qos_ctrl; | ||
307 | } __attribute__ ((packed)) ; | ||
308 | |||
309 | struct machdr24 | ||
310 | { | ||
311 | u16 frame_ctl; | ||
312 | u16 duration; // watch out for endians! | ||
313 | u8 addr1[ MACADRR_BYTE_LEN ]; | ||
314 | u8 addr2[ MACADRR_BYTE_LEN ]; | ||
315 | u8 addr3[ MACADRR_BYTE_LEN ]; | ||
316 | u16 seq_ctrl; // more endians! | ||
317 | } __attribute__ ((packed)) ; | ||
318 | |||
319 | // TX TFD with 32 byte MAC Header | ||
320 | struct tx_tfd_32 | ||
321 | { | ||
322 | struct machdr32 mchdr; // 32 | ||
323 | u32 uivplaceholder[2]; // 8 | ||
324 | } __attribute__ ((packed)) ; | ||
325 | |||
326 | // TX TFD with 30 byte MAC Header | ||
327 | struct tx_tfd_30 | ||
328 | { | ||
329 | struct machdr30 mchdr; // 30 | ||
330 | u8 reserved[2]; // 2 | ||
331 | u32 uivplaceholder[2]; // 8 | ||
332 | } __attribute__ ((packed)) ; | ||
333 | |||
334 | // tx tfd with 26 byte mac header | ||
335 | struct tx_tfd_26 | ||
336 | { | ||
337 | struct machdr26 mchdr; // 26 | ||
338 | u8 reserved1[2]; // 2 | ||
339 | u32 uivplaceholder[2]; // 8 | ||
340 | u8 reserved2[4]; // 4 | ||
341 | } __attribute__ ((packed)) ; | ||
342 | |||
343 | // tx tfd with 24 byte mac header | ||
344 | struct tx_tfd_24 | ||
345 | { | ||
346 | struct machdr24 mchdr; // 24 | ||
347 | u32 uivplaceholder[2]; // 8 | ||
348 | u8 reserved[8]; // 8 | ||
349 | } __attribute__ ((packed)) ; | ||
350 | |||
351 | |||
352 | #define DCT_WEP_KEY_FIELD_LENGTH 16 | ||
353 | |||
354 | struct tfd_command | ||
355 | { | ||
356 | u8 index; | ||
357 | u8 length; | ||
358 | u16 reserved; | ||
359 | u8 payload[0]; | ||
360 | } __attribute__ ((packed)) ; | ||
361 | |||
362 | struct tfd_data { | ||
363 | /* Header */ | ||
364 | u32 work_area_ptr; | ||
365 | u8 station_number; /* 0 for BSS */ | ||
366 | u8 reserved1; | ||
367 | u16 reserved2; | ||
368 | |||
369 | /* Tx Parameters */ | ||
370 | u8 cmd_id; | ||
371 | u8 seq_num; | ||
372 | u16 len; | ||
373 | u8 priority; | ||
374 | u8 tx_flags; | ||
375 | u8 tx_flags_ext; | ||
376 | u8 key_index; | ||
377 | u8 wepkey[DCT_WEP_KEY_FIELD_LENGTH]; | ||
378 | u8 rate; | ||
379 | u8 antenna; | ||
380 | u16 next_packet_duration; | ||
381 | u16 next_frag_len; | ||
382 | u16 back_off_counter; //////txop; | ||
383 | u8 retrylimit; | ||
384 | u16 cwcurrent; | ||
385 | u8 reserved3; | ||
386 | |||
387 | /* 802.11 MAC Header */ | ||
388 | union | ||
389 | { | ||
390 | struct tx_tfd_24 tfd_24; | ||
391 | struct tx_tfd_26 tfd_26; | ||
392 | struct tx_tfd_30 tfd_30; | ||
393 | struct tx_tfd_32 tfd_32; | ||
394 | } tfd; | ||
395 | |||
396 | /* Payload DMA info */ | ||
397 | u32 num_chunks; | ||
398 | u32 chunk_ptr[NUM_TFD_CHUNKS]; | ||
399 | u16 chunk_len[NUM_TFD_CHUNKS]; | ||
400 | } __attribute__ ((packed)); | ||
401 | |||
402 | struct txrx_control_flags | ||
403 | { | ||
404 | u8 message_type; | ||
405 | u8 rx_seq_num; | ||
406 | u8 control_bits; | ||
407 | u8 reserved; | ||
408 | } __attribute__ ((packed)); | ||
409 | |||
410 | #define TFD_SIZE 128 | ||
411 | #define TFD_CMD_IMMEDIATE_PAYLOAD_LENGTH (TFD_SIZE - sizeof(struct txrx_control_flags)) | ||
412 | |||
413 | struct tfd_frame | ||
414 | { | ||
415 | struct txrx_control_flags control_flags; | ||
416 | union { | ||
417 | struct tfd_data data; | ||
418 | struct tfd_command cmd; | ||
419 | u8 raw[TFD_CMD_IMMEDIATE_PAYLOAD_LENGTH]; | ||
420 | } u; | ||
421 | } __attribute__ ((packed)) ; | ||
422 | |||
423 | typedef void destructor_func(const void*); | ||
424 | |||
425 | /** | ||
426 | * Tx Queue for DMA. Queue consists of circular buffer of | ||
427 | * BD's and required locking structures. | ||
428 | */ | ||
429 | struct clx2_tx_queue { | ||
430 | struct clx2_queue q; | ||
431 | struct tfd_frame* bd; | ||
432 | struct ieee80211_txb **txb; | ||
433 | }; | ||
434 | |||
435 | /* | ||
436 | * RX related structures and functions | ||
437 | */ | ||
438 | #define RX_FREE_BUFFERS 32 | ||
439 | #define RX_LOW_WATERMARK 8 | ||
440 | |||
441 | #define SUP_RATE_11A_MAX_NUM_CHANNELS (8) | ||
442 | #define SUP_RATE_11B_MAX_NUM_CHANNELS (4) | ||
443 | #define SUP_RATE_11G_MAX_NUM_CHANNELS (12) | ||
444 | |||
445 | // Used for passing to driver number of successes and failures per rate | ||
446 | struct rate_histogram | ||
447 | { | ||
448 | union { | ||
449 | u32 a[SUP_RATE_11A_MAX_NUM_CHANNELS]; | ||
450 | u32 b[SUP_RATE_11B_MAX_NUM_CHANNELS]; | ||
451 | u32 g[SUP_RATE_11G_MAX_NUM_CHANNELS]; | ||
452 | } success; | ||
453 | union { | ||
454 | u32 a[SUP_RATE_11A_MAX_NUM_CHANNELS]; | ||
455 | u32 b[SUP_RATE_11B_MAX_NUM_CHANNELS]; | ||
456 | u32 g[SUP_RATE_11G_MAX_NUM_CHANNELS]; | ||
457 | } failed; | ||
458 | } __attribute__ ((packed)); | ||
459 | |||
460 | /* statistics command response */ | ||
461 | struct ipw_cmd_stats { | ||
462 | u8 cmd_id; | ||
463 | u8 seq_num; | ||
464 | u16 good_sfd; | ||
465 | u16 bad_plcp; | ||
466 | u16 wrong_bssid; | ||
467 | u16 valid_mpdu; | ||
468 | u16 bad_mac_header; | ||
469 | u16 reserved_frame_types; | ||
470 | u16 rx_ina; | ||
471 | u16 bad_crc32; | ||
472 | u16 invalid_cts; | ||
473 | u16 invalid_acks; | ||
474 | u16 long_distance_ina_fina; | ||
475 | u16 dsp_silence_unreachable; | ||
476 | u16 accumulated_rssi; | ||
477 | u16 rx_ovfl_frame_tossed; | ||
478 | u16 rssi_silence_threshold; | ||
479 | u16 rx_ovfl_frame_supplied; | ||
480 | u16 last_rx_frame_signal; | ||
481 | u16 last_rx_frame_noise; | ||
482 | u16 rx_autodetec_no_ofdm; | ||
483 | u16 rx_autodetec_no_barker; | ||
484 | u16 reserved; | ||
485 | } __attribute__ ((packed)); | ||
486 | |||
487 | struct notif_channel_result { | ||
488 | u8 channel_num; | ||
489 | struct ipw_cmd_stats stats; | ||
490 | u8 uReserved; | ||
491 | } __attribute__ ((packed)); | ||
492 | |||
493 | struct notif_scan_complete { | ||
494 | u8 scan_type; | ||
495 | u8 num_channels; | ||
496 | u8 status; | ||
497 | u8 reserved; | ||
498 | } __attribute__ ((packed)); | ||
499 | |||
500 | struct notif_frag_length { | ||
501 | u16 frag_length; | ||
502 | u16 reserved; | ||
503 | } __attribute__ ((packed)); | ||
504 | |||
505 | struct notif_beacon_state { | ||
506 | u32 state; | ||
507 | u32 number; | ||
508 | } __attribute__ ((packed)); | ||
509 | |||
510 | struct notif_tgi_tx_key { | ||
511 | u8 key_state; | ||
512 | u8 security_type; | ||
513 | u8 station_index; | ||
514 | u8 reserved; | ||
515 | } __attribute__ ((packed)); | ||
516 | |||
517 | struct notif_link_deterioration { | ||
518 | struct ipw_cmd_stats stats; | ||
519 | u8 rate; | ||
520 | u8 modulation; | ||
521 | struct rate_histogram histogram; | ||
522 | u8 reserved1; | ||
523 | u16 reserved2; | ||
524 | } __attribute__ ((packed)); | ||
525 | |||
526 | struct notif_association { | ||
527 | u8 state; | ||
528 | } __attribute__ ((packed)); | ||
529 | |||
530 | struct notif_authenticate { | ||
531 | u8 state; | ||
532 | struct machdr24 addr; | ||
533 | u16 status; | ||
534 | } __attribute__ ((packed)); | ||
535 | |||
536 | struct temperature | ||
537 | { | ||
538 | s32 measured; | ||
539 | s32 active; | ||
540 | } __attribute__ ((packed)); | ||
541 | |||
542 | struct notif_calibration { | ||
543 | u8 data[104]; | ||
544 | } __attribute__ ((packed)); | ||
545 | |||
546 | struct notif_noise { | ||
547 | u32 value; | ||
548 | } __attribute__ ((packed)); | ||
549 | |||
550 | struct ipw_rx_notification { | ||
551 | u8 reserved[8]; | ||
552 | u8 subtype; | ||
553 | u8 flags; | ||
554 | u16 size; | ||
555 | union { | ||
556 | struct notif_association assoc; | ||
557 | struct notif_authenticate auth; | ||
558 | struct notif_channel_result channel_result; | ||
559 | struct notif_scan_complete scan_complete; | ||
560 | struct notif_frag_length frag_len; | ||
561 | struct notif_beacon_state beacon_state; | ||
562 | struct notif_tgi_tx_key tgi_tx_key; | ||
563 | struct notif_link_deterioration link_deterioration; | ||
564 | struct notif_calibration calibration; | ||
565 | struct notif_noise noise; | ||
566 | u8 raw[0]; | ||
567 | } u; | ||
568 | } __attribute__ ((packed)); | ||
569 | |||
570 | struct ipw_rx_frame { | ||
571 | u32 reserved1; | ||
572 | u8 parent_tsf[4]; // fw_use[0] is boolean for OUR_TSF_IS_GREATER | ||
573 | u8 received_channel; // The channel that this frame was received on. | ||
574 | // Note that for .11b this does not have to be | ||
575 | // the same as the channel that it was sent. | ||
576 | // Filled by LMAC | ||
577 | u8 frameStatus; | ||
578 | u8 rate; | ||
579 | u8 rssi; | ||
580 | u8 agc; | ||
581 | u8 rssi_dbm; | ||
582 | u16 signal; | ||
583 | u16 noise; | ||
584 | u8 antennaAndPhy; | ||
585 | u8 control; // control bit should be on in bg | ||
586 | u8 rtscts_rate; // rate of rts or cts (in rts cts sequence rate | ||
587 | // is identical) | ||
588 | u8 rtscts_seen; // 0x1 RTS seen ; 0x2 CTS seen | ||
589 | u16 length; | ||
590 | u8 data[0]; | ||
591 | } __attribute__ ((packed)); | ||
592 | |||
593 | struct ipw_rx_header { | ||
594 | u8 message_type; | ||
595 | u8 rx_seq_num; | ||
596 | u8 control_bits; | ||
597 | u8 reserved; | ||
598 | } __attribute__ ((packed)); | ||
599 | |||
600 | struct ipw_rx_packet | ||
601 | { | ||
602 | struct ipw_rx_header header; | ||
603 | union { | ||
604 | struct ipw_rx_frame frame; | ||
605 | struct ipw_rx_notification notification; | ||
606 | } u; | ||
607 | } __attribute__ ((packed)); | ||
608 | |||
609 | #define IPW_RX_NOTIFICATION_SIZE sizeof(struct ipw_rx_header) + 12 | ||
610 | #define IPW_RX_FRAME_SIZE sizeof(struct ipw_rx_header) + \ | ||
611 | sizeof(struct ipw_rx_frame) | ||
612 | |||
613 | struct ipw_rx_mem_buffer { | ||
614 | dma_addr_t dma_addr; | ||
615 | struct ipw_rx_buffer *rxb; | ||
616 | struct sk_buff *skb; | ||
617 | struct list_head list; | ||
618 | }; /* Not transferred over network, so not __attribute__ ((packed)) */ | ||
619 | |||
620 | struct ipw_rx_queue { | ||
621 | struct ipw_rx_mem_buffer pool[RX_QUEUE_SIZE + RX_FREE_BUFFERS]; | ||
622 | struct ipw_rx_mem_buffer *queue[RX_QUEUE_SIZE]; | ||
623 | u32 processed; /* Internal index to last handled Rx packet */ | ||
624 | u32 read; /* Shared index to newest available Rx buffer */ | ||
625 | u32 write; /* Shared index to oldest written Rx packet */ | ||
626 | u32 free_count;/* Number of pre-allocated buffers in rx_free */ | ||
627 | /* Each of these lists is used as a FIFO for ipw_rx_mem_buffers */ | ||
628 | struct list_head rx_free; /* Own an SKBs */ | ||
629 | struct list_head rx_used; /* No SKB allocated */ | ||
630 | spinlock_t lock; | ||
631 | }; /* Not transferred over network, so not __attribute__ ((packed)) */ | ||
632 | |||
633 | |||
634 | struct alive_command_responce { | ||
635 | u8 alive_command; | ||
636 | u8 sequence_number; | ||
637 | u16 software_revision; | ||
638 | u8 device_identifier; | ||
639 | u8 reserved1[5]; | ||
640 | u16 reserved2; | ||
641 | u16 reserved3; | ||
642 | u16 clock_settle_time; | ||
643 | u16 powerup_settle_time; | ||
644 | u16 reserved4; | ||
645 | u8 time_stamp[5]; /* month, day, year, hours, minutes */ | ||
646 | u8 ucode_valid; | ||
647 | } __attribute__ ((packed)); | ||
648 | |||
649 | #define IPW_MAX_RATES 12 | ||
650 | |||
651 | struct ipw_rates { | ||
652 | u8 num_rates; | ||
653 | u8 rates[IPW_MAX_RATES]; | ||
654 | } __attribute__ ((packed)); | ||
655 | |||
656 | struct command_block | ||
657 | { | ||
658 | unsigned int control; | ||
659 | u32 source_addr; | ||
660 | u32 dest_addr; | ||
661 | unsigned int status; | ||
662 | } __attribute__ ((packed)); | ||
663 | |||
664 | #define CB_NUMBER_OF_ELEMENTS_SMALL 64 | ||
665 | struct fw_image_desc | ||
666 | { | ||
667 | unsigned long last_cb_index; | ||
668 | unsigned long current_cb_index; | ||
669 | struct command_block cb_list[CB_NUMBER_OF_ELEMENTS_SMALL]; | ||
670 | void * v_addr; | ||
671 | unsigned long p_addr; | ||
672 | unsigned long len; | ||
673 | }; | ||
674 | |||
675 | struct ipw_sys_config | ||
676 | { | ||
677 | u8 bt_coexistence; | ||
678 | u8 reserved1; | ||
679 | u8 answer_broadcast_ssid_probe; | ||
680 | u8 accept_all_data_frames; | ||
681 | u8 accept_non_directed_frames; | ||
682 | u8 exclude_unicast_unencrypted; | ||
683 | u8 disable_unicast_decryption; | ||
684 | u8 exclude_multicast_unencrypted; | ||
685 | u8 disable_multicast_decryption; | ||
686 | u8 antenna_diversity; | ||
687 | u8 pass_crc_to_host; | ||
688 | u8 dot11g_auto_detection; | ||
689 | u8 enable_cts_to_self; | ||
690 | u8 enable_multicast_filtering; | ||
691 | u8 bt_coexist_collision_thr; | ||
692 | u8 reserved2; | ||
693 | u8 accept_all_mgmt_bcpr; | ||
694 | u8 accept_all_mgtm_frames; | ||
695 | u8 pass_noise_stats_to_host; | ||
696 | u8 reserved3; | ||
697 | } __attribute__ ((packed)); | ||
698 | |||
699 | struct ipw_multicast_addr | ||
700 | { | ||
701 | u8 num_of_multicast_addresses; | ||
702 | u8 reserved[3]; | ||
703 | u8 mac1[6]; | ||
704 | u8 mac2[6]; | ||
705 | u8 mac3[6]; | ||
706 | u8 mac4[6]; | ||
707 | } __attribute__ ((packed)); | ||
708 | |||
709 | struct ipw_wep_key | ||
710 | { | ||
711 | u8 cmd_id; | ||
712 | u8 seq_num; | ||
713 | u8 key_index; | ||
714 | u8 key_size; | ||
715 | u8 key[16]; | ||
716 | } __attribute__ ((packed)); | ||
717 | |||
718 | struct ipw_tgi_tx_key | ||
719 | { | ||
720 | u8 key_id; | ||
721 | u8 security_type; | ||
722 | u8 station_index; | ||
723 | u8 flags; | ||
724 | u8 key[16]; | ||
725 | u32 tx_counter[2]; | ||
726 | } __attribute__ ((packed)); | ||
727 | |||
728 | #define IPW_SCAN_CHANNELS 54 | ||
729 | |||
730 | struct ipw_scan_request | ||
731 | { | ||
732 | u8 scan_type; | ||
733 | u16 dwell_time; | ||
734 | u8 channels_list[IPW_SCAN_CHANNELS]; | ||
735 | u8 channels_reserved[3]; | ||
736 | } __attribute__ ((packed)); | ||
737 | |||
738 | enum { | ||
739 | IPW_SCAN_PASSIVE_TILL_FIRST_BEACON_SCAN = 0, | ||
740 | IPW_SCAN_PASSIVE_FULL_DWELL_SCAN, | ||
741 | IPW_SCAN_ACTIVE_DIRECT_SCAN, | ||
742 | IPW_SCAN_ACTIVE_BROADCAST_SCAN, | ||
743 | IPW_SCAN_ACTIVE_BROADCAST_AND_DIRECT_SCAN, | ||
744 | IPW_SCAN_TYPES | ||
745 | }; | ||
746 | |||
747 | struct ipw_scan_request_ext | ||
748 | { | ||
749 | u32 full_scan_index; | ||
750 | u8 channels_list[IPW_SCAN_CHANNELS]; | ||
751 | u8 scan_type[IPW_SCAN_CHANNELS / 2]; | ||
752 | u8 reserved; | ||
753 | u16 dwell_time[IPW_SCAN_TYPES]; | ||
754 | } __attribute__ ((packed)); | ||
755 | |||
756 | extern inline u8 ipw_get_scan_type(struct ipw_scan_request_ext *scan, u8 index) | ||
757 | { | ||
758 | if (index % 2) | ||
759 | return scan->scan_type[index / 2] & 0x0F; | ||
760 | else | ||
761 | return (scan->scan_type[index / 2] & 0xF0) >> 4; | ||
762 | } | ||
763 | |||
764 | extern inline void ipw_set_scan_type(struct ipw_scan_request_ext *scan, | ||
765 | u8 index, u8 scan_type) | ||
766 | { | ||
767 | if (index % 2) | ||
768 | scan->scan_type[index / 2] = | ||
769 | (scan->scan_type[index / 2] & 0xF0) | | ||
770 | (scan_type & 0x0F); | ||
771 | else | ||
772 | scan->scan_type[index / 2] = | ||
773 | (scan->scan_type[index / 2] & 0x0F) | | ||
774 | ((scan_type & 0x0F) << 4); | ||
775 | } | ||
776 | |||
777 | struct ipw_associate | ||
778 | { | ||
779 | u8 channel; | ||
780 | u8 auth_type:4, | ||
781 | auth_key:4; | ||
782 | u8 assoc_type; | ||
783 | u8 reserved; | ||
784 | u16 policy_support; | ||
785 | u8 preamble_length; | ||
786 | u8 ieee_mode; | ||
787 | u8 bssid[ETH_ALEN]; | ||
788 | u32 assoc_tsf_msw; | ||
789 | u32 assoc_tsf_lsw; | ||
790 | u16 capability; | ||
791 | u16 listen_interval; | ||
792 | u16 beacon_interval; | ||
793 | u8 dest[ETH_ALEN]; | ||
794 | u16 atim_window; | ||
795 | u8 smr; | ||
796 | u8 reserved1; | ||
797 | u16 reserved2; | ||
798 | } __attribute__ ((packed)); | ||
799 | |||
800 | struct ipw_supported_rates | ||
801 | { | ||
802 | u8 ieee_mode; | ||
803 | u8 num_rates; | ||
804 | u8 purpose; | ||
805 | u8 reserved; | ||
806 | u8 supported_rates[IPW_MAX_RATES]; | ||
807 | } __attribute__ ((packed)); | ||
808 | |||
809 | struct ipw_rts_threshold | ||
810 | { | ||
811 | u16 rts_threshold; | ||
812 | u16 reserved; | ||
813 | } __attribute__ ((packed)); | ||
814 | |||
815 | struct ipw_frag_threshold | ||
816 | { | ||
817 | u16 frag_threshold; | ||
818 | u16 reserved; | ||
819 | } __attribute__ ((packed)); | ||
820 | |||
821 | struct ipw_retry_limit | ||
822 | { | ||
823 | u8 short_retry_limit; | ||
824 | u8 long_retry_limit; | ||
825 | u16 reserved; | ||
826 | } __attribute__ ((packed)); | ||
827 | |||
828 | struct ipw_dino_config | ||
829 | { | ||
830 | u32 dino_config_addr; | ||
831 | u16 dino_config_size; | ||
832 | u8 dino_response; | ||
833 | u8 reserved; | ||
834 | } __attribute__ ((packed)); | ||
835 | |||
836 | struct ipw_aironet_info | ||
837 | { | ||
838 | u8 id; | ||
839 | u8 length; | ||
840 | u16 reserved; | ||
841 | } __attribute__ ((packed)); | ||
842 | |||
843 | struct ipw_rx_key | ||
844 | { | ||
845 | u8 station_index; | ||
846 | u8 key_type; | ||
847 | u8 key_id; | ||
848 | u8 key_flag; | ||
849 | u8 key[16]; | ||
850 | u8 station_address[6]; | ||
851 | u8 key_index; | ||
852 | u8 reserved; | ||
853 | } __attribute__ ((packed)); | ||
854 | |||
855 | struct ipw_country_channel_info | ||
856 | { | ||
857 | u8 first_channel; | ||
858 | u8 no_channels; | ||
859 | s8 max_tx_power; | ||
860 | } __attribute__ ((packed)); | ||
861 | |||
862 | struct ipw_country_info | ||
863 | { | ||
864 | u8 id; | ||
865 | u8 length; | ||
866 | u8 country_str[3]; | ||
867 | struct ipw_country_channel_info groups[7]; | ||
868 | } __attribute__ ((packed)); | ||
869 | |||
870 | struct ipw_channel_tx_power | ||
871 | { | ||
872 | u8 channel_number; | ||
873 | s8 tx_power; | ||
874 | } __attribute__ ((packed)); | ||
875 | |||
876 | #define SCAN_ASSOCIATED_INTERVAL (HZ) | ||
877 | #define SCAN_INTERVAL (HZ / 10) | ||
878 | #define MAX_A_CHANNELS 37 | ||
879 | #define MAX_B_CHANNELS 14 | ||
880 | |||
881 | struct ipw_tx_power | ||
882 | { | ||
883 | u8 num_channels; | ||
884 | u8 ieee_mode; | ||
885 | struct ipw_channel_tx_power channels_tx_power[MAX_A_CHANNELS]; | ||
886 | } __attribute__ ((packed)); | ||
887 | |||
888 | struct ipw_qos_parameters | ||
889 | { | ||
890 | u16 cw_min[4]; | ||
891 | u16 cw_max[4]; | ||
892 | u8 aifs[4]; | ||
893 | u8 flag[4]; | ||
894 | u16 tx_op_limit[4]; | ||
895 | } __attribute__ ((packed)); | ||
896 | |||
897 | struct ipw_rsn_capabilities | ||
898 | { | ||
899 | u8 id; | ||
900 | u8 length; | ||
901 | u16 version; | ||
902 | } __attribute__ ((packed)); | ||
903 | |||
904 | struct ipw_sensitivity_calib | ||
905 | { | ||
906 | u16 beacon_rssi_raw; | ||
907 | u16 reserved; | ||
908 | } __attribute__ ((packed)); | ||
909 | |||
910 | /** | ||
911 | * Host command structure. | ||
912 | * | ||
913 | * On input, the following fields should be filled: | ||
914 | * - cmd | ||
915 | * - len | ||
916 | * - status_len | ||
917 | * - param (if needed) | ||
918 | * | ||
919 | * On output, | ||
920 | * - \a status contains status; | ||
921 | * - \a param filled with status parameters. | ||
922 | */ | ||
923 | struct ipw_cmd { | ||
924 | u32 cmd; /**< Host command */ | ||
925 | u32 status; /**< Status */ | ||
926 | u32 status_len; /**< How many 32 bit parameters in the status */ | ||
927 | u32 len; /**< incoming parameters length, bytes */ | ||
928 | /** | ||
929 | * command parameters. | ||
930 | * There should be enough space for incoming and | ||
931 | * outcoming parameters. | ||
932 | * Incoming parameters listed 1-st, followed by outcoming params. | ||
933 | * nParams=(len+3)/4+status_len | ||
934 | */ | ||
935 | u32 param[0]; | ||
936 | } __attribute__ ((packed)); | ||
937 | |||
938 | #define STATUS_HCMD_ACTIVE (1<<0) /**< host command in progress */ | ||
939 | |||
940 | #define STATUS_INT_ENABLED (1<<1) | ||
941 | #define STATUS_RF_KILL_HW (1<<2) | ||
942 | #define STATUS_RF_KILL_SW (1<<3) | ||
943 | #define STATUS_RF_KILL_MASK (STATUS_RF_KILL_HW | STATUS_RF_KILL_SW) | ||
944 | |||
945 | #define STATUS_INIT (1<<5) | ||
946 | #define STATUS_AUTH (1<<6) | ||
947 | #define STATUS_ASSOCIATED (1<<7) | ||
948 | #define STATUS_STATE_MASK (STATUS_INIT | STATUS_AUTH | STATUS_ASSOCIATED) | ||
949 | |||
950 | #define STATUS_ASSOCIATING (1<<8) | ||
951 | #define STATUS_DISASSOCIATING (1<<9) | ||
952 | #define STATUS_ROAMING (1<<10) | ||
953 | #define STATUS_EXIT_PENDING (1<<11) | ||
954 | #define STATUS_DISASSOC_PENDING (1<<12) | ||
955 | #define STATUS_STATE_PENDING (1<<13) | ||
956 | |||
957 | #define STATUS_SCAN_PENDING (1<<20) | ||
958 | #define STATUS_SCANNING (1<<21) | ||
959 | #define STATUS_SCAN_ABORTING (1<<22) | ||
960 | |||
961 | #define STATUS_INDIRECT_BYTE (1<<28) /* sysfs entry configured for access */ | ||
962 | #define STATUS_INDIRECT_DWORD (1<<29) /* sysfs entry configured for access */ | ||
963 | #define STATUS_DIRECT_DWORD (1<<30) /* sysfs entry configured for access */ | ||
964 | |||
965 | #define STATUS_SECURITY_UPDATED (1<<31) /* Security sync needed */ | ||
966 | |||
967 | #define CFG_STATIC_CHANNEL (1<<0) /* Restrict assoc. to single channel */ | ||
968 | #define CFG_STATIC_ESSID (1<<1) /* Restrict assoc. to single SSID */ | ||
969 | #define CFG_STATIC_BSSID (1<<2) /* Restrict assoc. to single BSSID */ | ||
970 | #define CFG_CUSTOM_MAC (1<<3) | ||
971 | #define CFG_PREAMBLE (1<<4) | ||
972 | #define CFG_ADHOC_PERSIST (1<<5) | ||
973 | #define CFG_ASSOCIATE (1<<6) | ||
974 | #define CFG_FIXED_RATE (1<<7) | ||
975 | #define CFG_ADHOC_CREATE (1<<8) | ||
976 | |||
977 | #define CAP_SHARED_KEY (1<<0) /* Off = OPEN */ | ||
978 | #define CAP_PRIVACY_ON (1<<1) /* Off = No privacy */ | ||
979 | |||
980 | #define MAX_STATIONS 32 | ||
981 | #define IPW_INVALID_STATION (0xff) | ||
982 | |||
983 | struct ipw_station_entry { | ||
984 | u8 mac_addr[ETH_ALEN]; | ||
985 | u8 reserved; | ||
986 | u8 support_mode; | ||
987 | }; | ||
988 | |||
989 | #define AVG_ENTRIES 8 | ||
990 | struct average { | ||
991 | s16 entries[AVG_ENTRIES]; | ||
992 | u8 pos; | ||
993 | u8 init; | ||
994 | s32 sum; | ||
995 | }; | ||
996 | |||
997 | struct ipw_priv { | ||
998 | /* ieee device used by generic ieee processing code */ | ||
999 | struct ieee80211_device *ieee; | ||
1000 | struct ieee80211_security sec; | ||
1001 | |||
1002 | /* spinlock */ | ||
1003 | spinlock_t lock; | ||
1004 | |||
1005 | /* basic pci-network driver stuff */ | ||
1006 | struct pci_dev *pci_dev; | ||
1007 | struct net_device *net_dev; | ||
1008 | |||
1009 | /* pci hardware address support */ | ||
1010 | void __iomem *hw_base; | ||
1011 | unsigned long hw_len; | ||
1012 | |||
1013 | struct fw_image_desc sram_desc; | ||
1014 | |||
1015 | /* result of ucode download */ | ||
1016 | struct alive_command_responce dino_alive; | ||
1017 | |||
1018 | wait_queue_head_t wait_command_queue; | ||
1019 | wait_queue_head_t wait_state; | ||
1020 | |||
1021 | /* Rx and Tx DMA processing queues */ | ||
1022 | struct ipw_rx_queue *rxq; | ||
1023 | struct clx2_tx_queue txq_cmd; | ||
1024 | struct clx2_tx_queue txq[4]; | ||
1025 | u32 status; | ||
1026 | u32 config; | ||
1027 | u32 capability; | ||
1028 | |||
1029 | u8 last_rx_rssi; | ||
1030 | u8 last_noise; | ||
1031 | struct average average_missed_beacons; | ||
1032 | struct average average_rssi; | ||
1033 | struct average average_noise; | ||
1034 | u32 port_type; | ||
1035 | int rx_bufs_min; /**< minimum number of bufs in Rx queue */ | ||
1036 | int rx_pend_max; /**< maximum pending buffers for one IRQ */ | ||
1037 | u32 hcmd_seq; /**< sequence number for hcmd */ | ||
1038 | u32 missed_beacon_threshold; | ||
1039 | u32 roaming_threshold; | ||
1040 | |||
1041 | struct ipw_associate assoc_request; | ||
1042 | struct ieee80211_network *assoc_network; | ||
1043 | |||
1044 | unsigned long ts_scan_abort; | ||
1045 | struct ipw_supported_rates rates; | ||
1046 | struct ipw_rates phy[3]; /**< PHY restrictions, per band */ | ||
1047 | struct ipw_rates supp; /**< software defined */ | ||
1048 | struct ipw_rates extended; /**< use for corresp. IE, AP only */ | ||
1049 | |||
1050 | struct notif_link_deterioration last_link_deterioration; /** for statistics */ | ||
1051 | struct ipw_cmd* hcmd; /**< host command currently executed */ | ||
1052 | |||
1053 | wait_queue_head_t hcmd_wq; /**< host command waits for execution */ | ||
1054 | u32 tsf_bcn[2]; /**< TSF from latest beacon */ | ||
1055 | |||
1056 | struct notif_calibration calib; /**< last calibration */ | ||
1057 | |||
1058 | /* ordinal interface with firmware */ | ||
1059 | u32 table0_addr; | ||
1060 | u32 table0_len; | ||
1061 | u32 table1_addr; | ||
1062 | u32 table1_len; | ||
1063 | u32 table2_addr; | ||
1064 | u32 table2_len; | ||
1065 | |||
1066 | /* context information */ | ||
1067 | u8 essid[IW_ESSID_MAX_SIZE]; | ||
1068 | u8 essid_len; | ||
1069 | u8 nick[IW_ESSID_MAX_SIZE]; | ||
1070 | u16 rates_mask; | ||
1071 | u8 channel; | ||
1072 | struct ipw_sys_config sys_config; | ||
1073 | u32 power_mode; | ||
1074 | u8 bssid[ETH_ALEN]; | ||
1075 | u16 rts_threshold; | ||
1076 | u8 mac_addr[ETH_ALEN]; | ||
1077 | u8 num_stations; | ||
1078 | u8 stations[MAX_STATIONS][ETH_ALEN]; | ||
1079 | |||
1080 | u32 notif_missed_beacons; | ||
1081 | |||
1082 | /* Statistics and counters normalized with each association */ | ||
1083 | u32 last_missed_beacons; | ||
1084 | u32 last_tx_packets; | ||
1085 | u32 last_rx_packets; | ||
1086 | u32 last_tx_failures; | ||
1087 | u32 last_rx_err; | ||
1088 | u32 last_rate; | ||
1089 | |||
1090 | u32 missed_adhoc_beacons; | ||
1091 | u32 missed_beacons; | ||
1092 | u32 rx_packets; | ||
1093 | u32 tx_packets; | ||
1094 | u32 quality; | ||
1095 | |||
1096 | /* eeprom */ | ||
1097 | u8 eeprom[0x100]; /* 256 bytes of eeprom */ | ||
1098 | int eeprom_delay; | ||
1099 | |||
1100 | struct iw_statistics wstats; | ||
1101 | |||
1102 | struct workqueue_struct *workqueue; | ||
1103 | |||
1104 | struct work_struct adhoc_check; | ||
1105 | struct work_struct associate; | ||
1106 | struct work_struct disassociate; | ||
1107 | struct work_struct rx_replenish; | ||
1108 | struct work_struct request_scan; | ||
1109 | struct work_struct adapter_restart; | ||
1110 | struct work_struct rf_kill; | ||
1111 | struct work_struct up; | ||
1112 | struct work_struct down; | ||
1113 | struct work_struct gather_stats; | ||
1114 | struct work_struct abort_scan; | ||
1115 | struct work_struct roam; | ||
1116 | struct work_struct scan_check; | ||
1117 | |||
1118 | struct tasklet_struct irq_tasklet; | ||
1119 | |||
1120 | |||
1121 | #define IPW_2200BG 1 | ||
1122 | #define IPW_2915ABG 2 | ||
1123 | u8 adapter; | ||
1124 | |||
1125 | #define IPW_DEFAULT_TX_POWER 0x14 | ||
1126 | u8 tx_power; | ||
1127 | |||
1128 | #ifdef CONFIG_PM | ||
1129 | u32 pm_state[16]; | ||
1130 | #endif | ||
1131 | |||
1132 | /* network state */ | ||
1133 | |||
1134 | /* Used to pass the current INTA value from ISR to Tasklet */ | ||
1135 | u32 isr_inta; | ||
1136 | |||
1137 | /* debugging info */ | ||
1138 | u32 indirect_dword; | ||
1139 | u32 direct_dword; | ||
1140 | u32 indirect_byte; | ||
1141 | }; /*ipw_priv */ | ||
1142 | |||
1143 | |||
1144 | /* debug macros */ | ||
1145 | |||
1146 | #ifdef CONFIG_IPW_DEBUG | ||
1147 | #define IPW_DEBUG(level, fmt, args...) \ | ||
1148 | do { if (ipw_debug_level & (level)) \ | ||
1149 | printk(KERN_DEBUG DRV_NAME": %c %s " fmt, \ | ||
1150 | in_interrupt() ? 'I' : 'U', __FUNCTION__ , ## args); } while (0) | ||
1151 | #else | ||
1152 | #define IPW_DEBUG(level, fmt, args...) do {} while (0) | ||
1153 | #endif /* CONFIG_IPW_DEBUG */ | ||
1154 | |||
1155 | /* | ||
1156 | * To use the debug system; | ||
1157 | * | ||
1158 | * If you are defining a new debug classification, simply add it to the #define | ||
1159 | * list here in the form of: | ||
1160 | * | ||
1161 | * #define IPW_DL_xxxx VALUE | ||
1162 | * | ||
1163 | * shifting value to the left one bit from the previous entry. xxxx should be | ||
1164 | * the name of the classification (for example, WEP) | ||
1165 | * | ||
1166 | * You then need to either add a IPW_xxxx_DEBUG() macro definition for your | ||
1167 | * classification, or use IPW_DEBUG(IPW_DL_xxxx, ...) whenever you want | ||
1168 | * to send output to that classification. | ||
1169 | * | ||
1170 | * To add your debug level to the list of levels seen when you perform | ||
1171 | * | ||
1172 | * % cat /proc/net/ipw/debug_level | ||
1173 | * | ||
1174 | * you simply need to add your entry to the ipw_debug_levels array. | ||
1175 | * | ||
1176 | * If you do not see debug_level in /proc/net/ipw then you do not have | ||
1177 | * CONFIG_IPW_DEBUG defined in your kernel configuration | ||
1178 | * | ||
1179 | */ | ||
1180 | |||
1181 | #define IPW_DL_ERROR (1<<0) | ||
1182 | #define IPW_DL_WARNING (1<<1) | ||
1183 | #define IPW_DL_INFO (1<<2) | ||
1184 | #define IPW_DL_WX (1<<3) | ||
1185 | #define IPW_DL_HOST_COMMAND (1<<5) | ||
1186 | #define IPW_DL_STATE (1<<6) | ||
1187 | |||
1188 | #define IPW_DL_NOTIF (1<<10) | ||
1189 | #define IPW_DL_SCAN (1<<11) | ||
1190 | #define IPW_DL_ASSOC (1<<12) | ||
1191 | #define IPW_DL_DROP (1<<13) | ||
1192 | #define IPW_DL_IOCTL (1<<14) | ||
1193 | |||
1194 | #define IPW_DL_MANAGE (1<<15) | ||
1195 | #define IPW_DL_FW (1<<16) | ||
1196 | #define IPW_DL_RF_KILL (1<<17) | ||
1197 | #define IPW_DL_FW_ERRORS (1<<18) | ||
1198 | |||
1199 | |||
1200 | #define IPW_DL_ORD (1<<20) | ||
1201 | |||
1202 | #define IPW_DL_FRAG (1<<21) | ||
1203 | #define IPW_DL_WEP (1<<22) | ||
1204 | #define IPW_DL_TX (1<<23) | ||
1205 | #define IPW_DL_RX (1<<24) | ||
1206 | #define IPW_DL_ISR (1<<25) | ||
1207 | #define IPW_DL_FW_INFO (1<<26) | ||
1208 | #define IPW_DL_IO (1<<27) | ||
1209 | #define IPW_DL_TRACE (1<<28) | ||
1210 | |||
1211 | #define IPW_DL_STATS (1<<29) | ||
1212 | |||
1213 | |||
1214 | #define IPW_ERROR(f, a...) printk(KERN_ERR DRV_NAME ": " f, ## a) | ||
1215 | #define IPW_WARNING(f, a...) printk(KERN_WARNING DRV_NAME ": " f, ## a) | ||
1216 | #define IPW_DEBUG_INFO(f, a...) IPW_DEBUG(IPW_DL_INFO, f, ## a) | ||
1217 | |||
1218 | #define IPW_DEBUG_WX(f, a...) IPW_DEBUG(IPW_DL_WX, f, ## a) | ||
1219 | #define IPW_DEBUG_SCAN(f, a...) IPW_DEBUG(IPW_DL_SCAN, f, ## a) | ||
1220 | #define IPW_DEBUG_STATUS(f, a...) IPW_DEBUG(IPW_DL_STATUS, f, ## a) | ||
1221 | #define IPW_DEBUG_TRACE(f, a...) IPW_DEBUG(IPW_DL_TRACE, f, ## a) | ||
1222 | #define IPW_DEBUG_RX(f, a...) IPW_DEBUG(IPW_DL_RX, f, ## a) | ||
1223 | #define IPW_DEBUG_TX(f, a...) IPW_DEBUG(IPW_DL_TX, f, ## a) | ||
1224 | #define IPW_DEBUG_ISR(f, a...) IPW_DEBUG(IPW_DL_ISR, f, ## a) | ||
1225 | #define IPW_DEBUG_MANAGEMENT(f, a...) IPW_DEBUG(IPW_DL_MANAGE, f, ## a) | ||
1226 | #define IPW_DEBUG_WEP(f, a...) IPW_DEBUG(IPW_DL_WEP, f, ## a) | ||
1227 | #define IPW_DEBUG_HC(f, a...) IPW_DEBUG(IPW_DL_HOST_COMMAND, f, ## a) | ||
1228 | #define IPW_DEBUG_FRAG(f, a...) IPW_DEBUG(IPW_DL_FRAG, f, ## a) | ||
1229 | #define IPW_DEBUG_FW(f, a...) IPW_DEBUG(IPW_DL_FW, f, ## a) | ||
1230 | #define IPW_DEBUG_RF_KILL(f, a...) IPW_DEBUG(IPW_DL_RF_KILL, f, ## a) | ||
1231 | #define IPW_DEBUG_DROP(f, a...) IPW_DEBUG(IPW_DL_DROP, f, ## a) | ||
1232 | #define IPW_DEBUG_IO(f, a...) IPW_DEBUG(IPW_DL_IO, f, ## a) | ||
1233 | #define IPW_DEBUG_ORD(f, a...) IPW_DEBUG(IPW_DL_ORD, f, ## a) | ||
1234 | #define IPW_DEBUG_FW_INFO(f, a...) IPW_DEBUG(IPW_DL_FW_INFO, f, ## a) | ||
1235 | #define IPW_DEBUG_NOTIF(f, a...) IPW_DEBUG(IPW_DL_NOTIF, f, ## a) | ||
1236 | #define IPW_DEBUG_STATE(f, a...) IPW_DEBUG(IPW_DL_STATE | IPW_DL_ASSOC | IPW_DL_INFO, f, ## a) | ||
1237 | #define IPW_DEBUG_ASSOC(f, a...) IPW_DEBUG(IPW_DL_ASSOC | IPW_DL_INFO, f, ## a) | ||
1238 | #define IPW_DEBUG_STATS(f, a...) IPW_DEBUG(IPW_DL_STATS, f, ## a) | ||
1239 | |||
1240 | #include <linux/ctype.h> | ||
1241 | |||
1242 | /* | ||
1243 | * Register bit definitions | ||
1244 | */ | ||
1245 | |||
1246 | /* Dino control registers bits */ | ||
1247 | |||
1248 | #define DINO_ENABLE_SYSTEM 0x80 | ||
1249 | #define DINO_ENABLE_CS 0x40 | ||
1250 | #define DINO_RXFIFO_DATA 0x01 | ||
1251 | #define DINO_CONTROL_REG 0x00200000 | ||
1252 | |||
1253 | #define CX2_INTA_RW 0x00000008 | ||
1254 | #define CX2_INTA_MASK_R 0x0000000C | ||
1255 | #define CX2_INDIRECT_ADDR 0x00000010 | ||
1256 | #define CX2_INDIRECT_DATA 0x00000014 | ||
1257 | #define CX2_AUTOINC_ADDR 0x00000018 | ||
1258 | #define CX2_AUTOINC_DATA 0x0000001C | ||
1259 | #define CX2_RESET_REG 0x00000020 | ||
1260 | #define CX2_GP_CNTRL_RW 0x00000024 | ||
1261 | |||
1262 | #define CX2_READ_INT_REGISTER 0xFF4 | ||
1263 | |||
1264 | #define CX2_GP_CNTRL_BIT_INIT_DONE 0x00000004 | ||
1265 | |||
1266 | #define CX2_REGISTER_DOMAIN1_END 0x00001000 | ||
1267 | #define CX2_SRAM_READ_INT_REGISTER 0x00000ff4 | ||
1268 | |||
1269 | #define CX2_SHARED_LOWER_BOUND 0x00000200 | ||
1270 | #define CX2_INTERRUPT_AREA_LOWER_BOUND 0x00000f80 | ||
1271 | |||
1272 | #define CX2_NIC_SRAM_LOWER_BOUND 0x00000000 | ||
1273 | #define CX2_NIC_SRAM_UPPER_BOUND 0x00030000 | ||
1274 | |||
1275 | #define CX2_BIT_INT_HOST_SRAM_READ_INT_REGISTER (1 << 29) | ||
1276 | #define CX2_GP_CNTRL_BIT_CLOCK_READY 0x00000001 | ||
1277 | #define CX2_GP_CNTRL_BIT_HOST_ALLOWS_STANDBY 0x00000002 | ||
1278 | |||
1279 | /* | ||
1280 | * RESET Register Bit Indexes | ||
1281 | */ | ||
1282 | #define CBD_RESET_REG_PRINCETON_RESET 0x00000001 /* Bit 0 (LSB) */ | ||
1283 | #define CX2_RESET_REG_SW_RESET 0x00000080 /* Bit 7 */ | ||
1284 | #define CX2_RESET_REG_MASTER_DISABLED 0x00000100 /* Bit 8 */ | ||
1285 | #define CX2_RESET_REG_STOP_MASTER 0x00000200 /* Bit 9 */ | ||
1286 | #define CX2_ARC_KESHET_CONFIG 0x08000000 /* Bit 27 */ | ||
1287 | #define CX2_START_STANDBY 0x00000004 /* Bit 2 */ | ||
1288 | |||
1289 | #define CX2_CSR_CIS_UPPER_BOUND 0x00000200 | ||
1290 | #define CX2_DOMAIN_0_END 0x1000 | ||
1291 | #define CLX_MEM_BAR_SIZE 0x1000 | ||
1292 | |||
1293 | #define CX2_BASEBAND_CONTROL_STATUS 0X00200000 | ||
1294 | #define CX2_BASEBAND_TX_FIFO_WRITE 0X00200004 | ||
1295 | #define CX2_BASEBAND_RX_FIFO_READ 0X00200004 | ||
1296 | #define CX2_BASEBAND_CONTROL_STORE 0X00200010 | ||
1297 | |||
1298 | #define CX2_INTERNAL_CMD_EVENT 0X00300004 | ||
1299 | #define CX2_BASEBAND_POWER_DOWN 0x00000001 | ||
1300 | |||
1301 | #define CX2_MEM_HALT_AND_RESET 0x003000e0 | ||
1302 | |||
1303 | /* defgroup bits_halt_reset MEM_HALT_AND_RESET register bits */ | ||
1304 | #define CX2_BIT_HALT_RESET_ON 0x80000000 | ||
1305 | #define CX2_BIT_HALT_RESET_OFF 0x00000000 | ||
1306 | |||
1307 | #define CB_LAST_VALID 0x20000000 | ||
1308 | #define CB_INT_ENABLED 0x40000000 | ||
1309 | #define CB_VALID 0x80000000 | ||
1310 | #define CB_SRC_LE 0x08000000 | ||
1311 | #define CB_DEST_LE 0x04000000 | ||
1312 | #define CB_SRC_AUTOINC 0x00800000 | ||
1313 | #define CB_SRC_IO_GATED 0x00400000 | ||
1314 | #define CB_DEST_AUTOINC 0x00080000 | ||
1315 | #define CB_SRC_SIZE_LONG 0x00200000 | ||
1316 | #define CB_DEST_SIZE_LONG 0x00020000 | ||
1317 | |||
1318 | |||
1319 | /* DMA DEFINES */ | ||
1320 | |||
1321 | #define DMA_CONTROL_SMALL_CB_CONST_VALUE 0x00540000 | ||
1322 | #define DMA_CB_STOP_AND_ABORT 0x00000C00 | ||
1323 | #define DMA_CB_START 0x00000100 | ||
1324 | |||
1325 | |||
1326 | #define CX2_SHARED_SRAM_SIZE 0x00030000 | ||
1327 | #define CX2_SHARED_SRAM_DMA_CONTROL 0x00027000 | ||
1328 | #define CB_MAX_LENGTH 0x1FFF | ||
1329 | |||
1330 | #define CX2_HOST_EEPROM_DATA_SRAM_SIZE 0xA18 | ||
1331 | #define CX2_EEPROM_IMAGE_SIZE 0x100 | ||
1332 | |||
1333 | |||
1334 | /* DMA defs */ | ||
1335 | #define CX2_DMA_I_CURRENT_CB 0x003000D0 | ||
1336 | #define CX2_DMA_O_CURRENT_CB 0x003000D4 | ||
1337 | #define CX2_DMA_I_DMA_CONTROL 0x003000A4 | ||
1338 | #define CX2_DMA_I_CB_BASE 0x003000A0 | ||
1339 | |||
1340 | #define CX2_TX_CMD_QUEUE_BD_BASE (0x00000200) | ||
1341 | #define CX2_TX_CMD_QUEUE_BD_SIZE (0x00000204) | ||
1342 | #define CX2_TX_QUEUE_0_BD_BASE (0x00000208) | ||
1343 | #define CX2_TX_QUEUE_0_BD_SIZE (0x0000020C) | ||
1344 | #define CX2_TX_QUEUE_1_BD_BASE (0x00000210) | ||
1345 | #define CX2_TX_QUEUE_1_BD_SIZE (0x00000214) | ||
1346 | #define CX2_TX_QUEUE_2_BD_BASE (0x00000218) | ||
1347 | #define CX2_TX_QUEUE_2_BD_SIZE (0x0000021C) | ||
1348 | #define CX2_TX_QUEUE_3_BD_BASE (0x00000220) | ||
1349 | #define CX2_TX_QUEUE_3_BD_SIZE (0x00000224) | ||
1350 | #define CX2_RX_BD_BASE (0x00000240) | ||
1351 | #define CX2_RX_BD_SIZE (0x00000244) | ||
1352 | #define CX2_RFDS_TABLE_LOWER (0x00000500) | ||
1353 | |||
1354 | #define CX2_TX_CMD_QUEUE_READ_INDEX (0x00000280) | ||
1355 | #define CX2_TX_QUEUE_0_READ_INDEX (0x00000284) | ||
1356 | #define CX2_TX_QUEUE_1_READ_INDEX (0x00000288) | ||
1357 | #define CX2_TX_QUEUE_2_READ_INDEX (0x0000028C) | ||
1358 | #define CX2_TX_QUEUE_3_READ_INDEX (0x00000290) | ||
1359 | #define CX2_RX_READ_INDEX (0x000002A0) | ||
1360 | |||
1361 | #define CX2_TX_CMD_QUEUE_WRITE_INDEX (0x00000F80) | ||
1362 | #define CX2_TX_QUEUE_0_WRITE_INDEX (0x00000F84) | ||
1363 | #define CX2_TX_QUEUE_1_WRITE_INDEX (0x00000F88) | ||
1364 | #define CX2_TX_QUEUE_2_WRITE_INDEX (0x00000F8C) | ||
1365 | #define CX2_TX_QUEUE_3_WRITE_INDEX (0x00000F90) | ||
1366 | #define CX2_RX_WRITE_INDEX (0x00000FA0) | ||
1367 | |||
1368 | /* | ||
1369 | * EEPROM Related Definitions | ||
1370 | */ | ||
1371 | |||
1372 | #define IPW_EEPROM_DATA_SRAM_ADDRESS (CX2_SHARED_LOWER_BOUND + 0x814) | ||
1373 | #define IPW_EEPROM_DATA_SRAM_SIZE (CX2_SHARED_LOWER_BOUND + 0x818) | ||
1374 | #define IPW_EEPROM_LOAD_DISABLE (CX2_SHARED_LOWER_BOUND + 0x81C) | ||
1375 | #define IPW_EEPROM_DATA (CX2_SHARED_LOWER_BOUND + 0x820) | ||
1376 | #define IPW_EEPROM_UPPER_ADDRESS (CX2_SHARED_LOWER_BOUND + 0x9E0) | ||
1377 | |||
1378 | #define IPW_STATION_TABLE_LOWER (CX2_SHARED_LOWER_BOUND + 0xA0C) | ||
1379 | #define IPW_STATION_TABLE_UPPER (CX2_SHARED_LOWER_BOUND + 0xB0C) | ||
1380 | #define IPW_REQUEST_ATIM (CX2_SHARED_LOWER_BOUND + 0xB0C) | ||
1381 | #define IPW_ATIM_SENT (CX2_SHARED_LOWER_BOUND + 0xB10) | ||
1382 | #define IPW_WHO_IS_AWAKE (CX2_SHARED_LOWER_BOUND + 0xB14) | ||
1383 | #define IPW_DURING_ATIM_WINDOW (CX2_SHARED_LOWER_BOUND + 0xB18) | ||
1384 | |||
1385 | |||
1386 | #define MSB 1 | ||
1387 | #define LSB 0 | ||
1388 | #define WORD_TO_BYTE(_word) ((_word) * sizeof(u16)) | ||
1389 | |||
1390 | #define GET_EEPROM_ADDR(_wordoffset,_byteoffset) \ | ||
1391 | ( WORD_TO_BYTE(_wordoffset) + (_byteoffset) ) | ||
1392 | |||
1393 | /* EEPROM access by BYTE */ | ||
1394 | #define EEPROM_PME_CAPABILITY (GET_EEPROM_ADDR(0x09,MSB)) /* 1 byte */ | ||
1395 | #define EEPROM_MAC_ADDRESS (GET_EEPROM_ADDR(0x21,LSB)) /* 6 byte */ | ||
1396 | #define EEPROM_VERSION (GET_EEPROM_ADDR(0x24,MSB)) /* 1 byte */ | ||
1397 | #define EEPROM_NIC_TYPE (GET_EEPROM_ADDR(0x25,LSB)) /* 1 byte */ | ||
1398 | #define EEPROM_SKU_CAPABILITY (GET_EEPROM_ADDR(0x25,MSB)) /* 1 byte */ | ||
1399 | #define EEPROM_COUNTRY_CODE (GET_EEPROM_ADDR(0x26,LSB)) /* 3 bytes */ | ||
1400 | #define EEPROM_IBSS_CHANNELS_BG (GET_EEPROM_ADDR(0x28,LSB)) /* 2 bytes */ | ||
1401 | #define EEPROM_IBSS_CHANNELS_A (GET_EEPROM_ADDR(0x29,MSB)) /* 5 bytes */ | ||
1402 | #define EEPROM_BSS_CHANNELS_BG (GET_EEPROM_ADDR(0x2c,LSB)) /* 2 bytes */ | ||
1403 | #define EEPROM_HW_VERSION (GET_EEPROM_ADDR(0x72,LSB)) /* 2 bytes */ | ||
1404 | |||
1405 | /* NIC type as found in the one byte EEPROM_NIC_TYPE offset*/ | ||
1406 | #define EEPROM_NIC_TYPE_STANDARD 0 | ||
1407 | #define EEPROM_NIC_TYPE_DELL 1 | ||
1408 | #define EEPROM_NIC_TYPE_FUJITSU 2 | ||
1409 | #define EEPROM_NIC_TYPE_IBM 3 | ||
1410 | #define EEPROM_NIC_TYPE_HP 4 | ||
1411 | |||
1412 | #define FW_MEM_REG_LOWER_BOUND 0x00300000 | ||
1413 | #define FW_MEM_REG_EEPROM_ACCESS (FW_MEM_REG_LOWER_BOUND + 0x40) | ||
1414 | |||
1415 | #define EEPROM_BIT_SK (1<<0) | ||
1416 | #define EEPROM_BIT_CS (1<<1) | ||
1417 | #define EEPROM_BIT_DI (1<<2) | ||
1418 | #define EEPROM_BIT_DO (1<<4) | ||
1419 | |||
1420 | #define EEPROM_CMD_READ 0x2 | ||
1421 | |||
1422 | /* Interrupts masks */ | ||
1423 | #define CX2_INTA_NONE 0x00000000 | ||
1424 | |||
1425 | #define CX2_INTA_BIT_RX_TRANSFER 0x00000002 | ||
1426 | #define CX2_INTA_BIT_STATUS_CHANGE 0x00000010 | ||
1427 | #define CX2_INTA_BIT_BEACON_PERIOD_EXPIRED 0x00000020 | ||
1428 | |||
1429 | //Inta Bits for CF | ||
1430 | #define CX2_INTA_BIT_TX_CMD_QUEUE 0x00000800 | ||
1431 | #define CX2_INTA_BIT_TX_QUEUE_1 0x00001000 | ||
1432 | #define CX2_INTA_BIT_TX_QUEUE_2 0x00002000 | ||
1433 | #define CX2_INTA_BIT_TX_QUEUE_3 0x00004000 | ||
1434 | #define CX2_INTA_BIT_TX_QUEUE_4 0x00008000 | ||
1435 | |||
1436 | #define CX2_INTA_BIT_SLAVE_MODE_HOST_CMD_DONE 0x00010000 | ||
1437 | |||
1438 | #define CX2_INTA_BIT_PREPARE_FOR_POWER_DOWN 0x00100000 | ||
1439 | #define CX2_INTA_BIT_POWER_DOWN 0x00200000 | ||
1440 | |||
1441 | #define CX2_INTA_BIT_FW_INITIALIZATION_DONE 0x01000000 | ||
1442 | #define CX2_INTA_BIT_FW_CARD_DISABLE_PHY_OFF_DONE 0x02000000 | ||
1443 | #define CX2_INTA_BIT_RF_KILL_DONE 0x04000000 | ||
1444 | #define CX2_INTA_BIT_FATAL_ERROR 0x40000000 | ||
1445 | #define CX2_INTA_BIT_PARITY_ERROR 0x80000000 | ||
1446 | |||
1447 | /* Interrupts enabled at init time. */ | ||
1448 | #define CX2_INTA_MASK_ALL \ | ||
1449 | (CX2_INTA_BIT_TX_QUEUE_1 | \ | ||
1450 | CX2_INTA_BIT_TX_QUEUE_2 | \ | ||
1451 | CX2_INTA_BIT_TX_QUEUE_3 | \ | ||
1452 | CX2_INTA_BIT_TX_QUEUE_4 | \ | ||
1453 | CX2_INTA_BIT_TX_CMD_QUEUE | \ | ||
1454 | CX2_INTA_BIT_RX_TRANSFER | \ | ||
1455 | CX2_INTA_BIT_FATAL_ERROR | \ | ||
1456 | CX2_INTA_BIT_PARITY_ERROR | \ | ||
1457 | CX2_INTA_BIT_STATUS_CHANGE | \ | ||
1458 | CX2_INTA_BIT_FW_INITIALIZATION_DONE | \ | ||
1459 | CX2_INTA_BIT_BEACON_PERIOD_EXPIRED | \ | ||
1460 | CX2_INTA_BIT_SLAVE_MODE_HOST_CMD_DONE | \ | ||
1461 | CX2_INTA_BIT_PREPARE_FOR_POWER_DOWN | \ | ||
1462 | CX2_INTA_BIT_POWER_DOWN | \ | ||
1463 | CX2_INTA_BIT_RF_KILL_DONE ) | ||
1464 | |||
1465 | #define IPWSTATUS_ERROR_LOG (CX2_SHARED_LOWER_BOUND + 0x410) | ||
1466 | #define IPW_EVENT_LOG (CX2_SHARED_LOWER_BOUND + 0x414) | ||
1467 | |||
1468 | /* FW event log definitions */ | ||
1469 | #define EVENT_ELEM_SIZE (3 * sizeof(u32)) | ||
1470 | #define EVENT_START_OFFSET (1 * sizeof(u32) + 2 * sizeof(u16)) | ||
1471 | |||
1472 | /* FW error log definitions */ | ||
1473 | #define ERROR_ELEM_SIZE (7 * sizeof(u32)) | ||
1474 | #define ERROR_START_OFFSET (1 * sizeof(u32)) | ||
1475 | |||
1476 | enum { | ||
1477 | IPW_FW_ERROR_OK = 0, | ||
1478 | IPW_FW_ERROR_FAIL, | ||
1479 | IPW_FW_ERROR_MEMORY_UNDERFLOW, | ||
1480 | IPW_FW_ERROR_MEMORY_OVERFLOW, | ||
1481 | IPW_FW_ERROR_BAD_PARAM, | ||
1482 | IPW_FW_ERROR_BAD_CHECKSUM, | ||
1483 | IPW_FW_ERROR_NMI_INTERRUPT, | ||
1484 | IPW_FW_ERROR_BAD_DATABASE, | ||
1485 | IPW_FW_ERROR_ALLOC_FAIL, | ||
1486 | IPW_FW_ERROR_DMA_UNDERRUN, | ||
1487 | IPW_FW_ERROR_DMA_STATUS, | ||
1488 | IPW_FW_ERROR_DINOSTATUS_ERROR, | ||
1489 | IPW_FW_ERROR_EEPROMSTATUS_ERROR, | ||
1490 | IPW_FW_ERROR_SYSASSERT, | ||
1491 | IPW_FW_ERROR_FATAL_ERROR | ||
1492 | }; | ||
1493 | |||
1494 | #define AUTH_OPEN 0 | ||
1495 | #define AUTH_SHARED_KEY 1 | ||
1496 | #define AUTH_IGNORE 3 | ||
1497 | |||
1498 | #define HC_ASSOCIATE 0 | ||
1499 | #define HC_REASSOCIATE 1 | ||
1500 | #define HC_DISASSOCIATE 2 | ||
1501 | #define HC_IBSS_START 3 | ||
1502 | #define HC_IBSS_RECONF 4 | ||
1503 | #define HC_DISASSOC_QUIET 5 | ||
1504 | |||
1505 | #define IPW_RATE_CAPABILITIES 1 | ||
1506 | #define IPW_RATE_CONNECT 0 | ||
1507 | |||
1508 | |||
1509 | /* | ||
1510 | * Rate values and masks | ||
1511 | */ | ||
1512 | #define IPW_TX_RATE_1MB 0x0A | ||
1513 | #define IPW_TX_RATE_2MB 0x14 | ||
1514 | #define IPW_TX_RATE_5MB 0x37 | ||
1515 | #define IPW_TX_RATE_6MB 0x0D | ||
1516 | #define IPW_TX_RATE_9MB 0x0F | ||
1517 | #define IPW_TX_RATE_11MB 0x6E | ||
1518 | #define IPW_TX_RATE_12MB 0x05 | ||
1519 | #define IPW_TX_RATE_18MB 0x07 | ||
1520 | #define IPW_TX_RATE_24MB 0x09 | ||
1521 | #define IPW_TX_RATE_36MB 0x0B | ||
1522 | #define IPW_TX_RATE_48MB 0x01 | ||
1523 | #define IPW_TX_RATE_54MB 0x03 | ||
1524 | |||
1525 | #define IPW_ORD_TABLE_ID_MASK 0x0000FF00 | ||
1526 | #define IPW_ORD_TABLE_VALUE_MASK 0x000000FF | ||
1527 | |||
1528 | #define IPW_ORD_TABLE_0_MASK 0x0000F000 | ||
1529 | #define IPW_ORD_TABLE_1_MASK 0x0000F100 | ||
1530 | #define IPW_ORD_TABLE_2_MASK 0x0000F200 | ||
1531 | #define IPW_ORD_TABLE_3_MASK 0x0000F300 | ||
1532 | #define IPW_ORD_TABLE_4_MASK 0x0000F400 | ||
1533 | #define IPW_ORD_TABLE_5_MASK 0x0000F500 | ||
1534 | #define IPW_ORD_TABLE_6_MASK 0x0000F600 | ||
1535 | #define IPW_ORD_TABLE_7_MASK 0x0000F700 | ||
1536 | |||
1537 | /* | ||
1538 | * Table 0 Entries (all entries are 32 bits) | ||
1539 | */ | ||
1540 | enum { | ||
1541 | IPW_ORD_STAT_TX_CURR_RATE = IPW_ORD_TABLE_0_MASK + 1, | ||
1542 | IPW_ORD_STAT_FRAG_TRESHOLD, | ||
1543 | IPW_ORD_STAT_RTS_THRESHOLD, | ||
1544 | IPW_ORD_STAT_TX_HOST_REQUESTS, | ||
1545 | IPW_ORD_STAT_TX_HOST_COMPLETE, | ||
1546 | IPW_ORD_STAT_TX_DIR_DATA, | ||
1547 | IPW_ORD_STAT_TX_DIR_DATA_B_1, | ||
1548 | IPW_ORD_STAT_TX_DIR_DATA_B_2, | ||
1549 | IPW_ORD_STAT_TX_DIR_DATA_B_5_5, | ||
1550 | IPW_ORD_STAT_TX_DIR_DATA_B_11, | ||
1551 | /* Hole */ | ||
1552 | |||
1553 | |||
1554 | |||
1555 | |||
1556 | |||
1557 | |||
1558 | |||
1559 | IPW_ORD_STAT_TX_DIR_DATA_G_1 = IPW_ORD_TABLE_0_MASK + 19, | ||
1560 | IPW_ORD_STAT_TX_DIR_DATA_G_2, | ||
1561 | IPW_ORD_STAT_TX_DIR_DATA_G_5_5, | ||
1562 | IPW_ORD_STAT_TX_DIR_DATA_G_6, | ||
1563 | IPW_ORD_STAT_TX_DIR_DATA_G_9, | ||
1564 | IPW_ORD_STAT_TX_DIR_DATA_G_11, | ||
1565 | IPW_ORD_STAT_TX_DIR_DATA_G_12, | ||
1566 | IPW_ORD_STAT_TX_DIR_DATA_G_18, | ||
1567 | IPW_ORD_STAT_TX_DIR_DATA_G_24, | ||
1568 | IPW_ORD_STAT_TX_DIR_DATA_G_36, | ||
1569 | IPW_ORD_STAT_TX_DIR_DATA_G_48, | ||
1570 | IPW_ORD_STAT_TX_DIR_DATA_G_54, | ||
1571 | IPW_ORD_STAT_TX_NON_DIR_DATA, | ||
1572 | IPW_ORD_STAT_TX_NON_DIR_DATA_B_1, | ||
1573 | IPW_ORD_STAT_TX_NON_DIR_DATA_B_2, | ||
1574 | IPW_ORD_STAT_TX_NON_DIR_DATA_B_5_5, | ||
1575 | IPW_ORD_STAT_TX_NON_DIR_DATA_B_11, | ||
1576 | /* Hole */ | ||
1577 | |||
1578 | |||
1579 | |||
1580 | |||
1581 | |||
1582 | |||
1583 | |||
1584 | IPW_ORD_STAT_TX_NON_DIR_DATA_G_1 = IPW_ORD_TABLE_0_MASK + 44, | ||
1585 | IPW_ORD_STAT_TX_NON_DIR_DATA_G_2, | ||
1586 | IPW_ORD_STAT_TX_NON_DIR_DATA_G_5_5, | ||
1587 | IPW_ORD_STAT_TX_NON_DIR_DATA_G_6, | ||
1588 | IPW_ORD_STAT_TX_NON_DIR_DATA_G_9, | ||
1589 | IPW_ORD_STAT_TX_NON_DIR_DATA_G_11, | ||
1590 | IPW_ORD_STAT_TX_NON_DIR_DATA_G_12, | ||
1591 | IPW_ORD_STAT_TX_NON_DIR_DATA_G_18, | ||
1592 | IPW_ORD_STAT_TX_NON_DIR_DATA_G_24, | ||
1593 | IPW_ORD_STAT_TX_NON_DIR_DATA_G_36, | ||
1594 | IPW_ORD_STAT_TX_NON_DIR_DATA_G_48, | ||
1595 | IPW_ORD_STAT_TX_NON_DIR_DATA_G_54, | ||
1596 | IPW_ORD_STAT_TX_RETRY, | ||
1597 | IPW_ORD_STAT_TX_FAILURE, | ||
1598 | IPW_ORD_STAT_RX_ERR_CRC, | ||
1599 | IPW_ORD_STAT_RX_ERR_ICV, | ||
1600 | IPW_ORD_STAT_RX_NO_BUFFER, | ||
1601 | IPW_ORD_STAT_FULL_SCANS, | ||
1602 | IPW_ORD_STAT_PARTIAL_SCANS, | ||
1603 | IPW_ORD_STAT_TGH_ABORTED_SCANS, | ||
1604 | IPW_ORD_STAT_TX_TOTAL_BYTES, | ||
1605 | IPW_ORD_STAT_CURR_RSSI_RAW, | ||
1606 | IPW_ORD_STAT_RX_BEACON, | ||
1607 | IPW_ORD_STAT_MISSED_BEACONS, | ||
1608 | IPW_ORD_TABLE_0_LAST | ||
1609 | }; | ||
1610 | |||
1611 | #define IPW_RSSI_TO_DBM 112 | ||
1612 | |||
1613 | /* Table 1 Entries | ||
1614 | */ | ||
1615 | enum { | ||
1616 | IPW_ORD_TABLE_1_LAST = IPW_ORD_TABLE_1_MASK | 1, | ||
1617 | }; | ||
1618 | |||
1619 | /* | ||
1620 | * Table 2 Entries | ||
1621 | * | ||
1622 | * FW_VERSION: 16 byte string | ||
1623 | * FW_DATE: 16 byte string (only 14 bytes used) | ||
1624 | * UCODE_VERSION: 4 byte version code | ||
1625 | * UCODE_DATE: 5 bytes code code | ||
1626 | * ADDAPTER_MAC: 6 byte MAC address | ||
1627 | * RTC: 4 byte clock | ||
1628 | */ | ||
1629 | enum { | ||
1630 | IPW_ORD_STAT_FW_VERSION = IPW_ORD_TABLE_2_MASK | 1, | ||
1631 | IPW_ORD_STAT_FW_DATE, | ||
1632 | IPW_ORD_STAT_UCODE_VERSION, | ||
1633 | IPW_ORD_STAT_UCODE_DATE, | ||
1634 | IPW_ORD_STAT_ADAPTER_MAC, | ||
1635 | IPW_ORD_STAT_RTC, | ||
1636 | IPW_ORD_TABLE_2_LAST | ||
1637 | }; | ||
1638 | |||
1639 | /* Table 3 */ | ||
1640 | enum { | ||
1641 | IPW_ORD_STAT_TX_PACKET = IPW_ORD_TABLE_3_MASK | 0, | ||
1642 | IPW_ORD_STAT_TX_PACKET_FAILURE, | ||
1643 | IPW_ORD_STAT_TX_PACKET_SUCCESS, | ||
1644 | IPW_ORD_STAT_TX_PACKET_ABORTED, | ||
1645 | IPW_ORD_TABLE_3_LAST | ||
1646 | }; | ||
1647 | |||
1648 | /* Table 4 */ | ||
1649 | enum { | ||
1650 | IPW_ORD_TABLE_4_LAST = IPW_ORD_TABLE_4_MASK | ||
1651 | }; | ||
1652 | |||
1653 | /* Table 5 */ | ||
1654 | enum { | ||
1655 | IPW_ORD_STAT_AVAILABLE_AP_COUNT = IPW_ORD_TABLE_5_MASK, | ||
1656 | IPW_ORD_STAT_AP_ASSNS, | ||
1657 | IPW_ORD_STAT_ROAM, | ||
1658 | IPW_ORD_STAT_ROAM_CAUSE_MISSED_BEACONS, | ||
1659 | IPW_ORD_STAT_ROAM_CAUSE_UNASSOC, | ||
1660 | IPW_ORD_STAT_ROAM_CAUSE_RSSI, | ||
1661 | IPW_ORD_STAT_ROAM_CAUSE_LINK_QUALITY, | ||
1662 | IPW_ORD_STAT_ROAM_CAUSE_AP_LOAD_BALANCE, | ||
1663 | IPW_ORD_STAT_ROAM_CAUSE_AP_NO_TX, | ||
1664 | IPW_ORD_STAT_LINK_UP, | ||
1665 | IPW_ORD_STAT_LINK_DOWN, | ||
1666 | IPW_ORD_ANTENNA_DIVERSITY, | ||
1667 | IPW_ORD_CURR_FREQ, | ||
1668 | IPW_ORD_TABLE_5_LAST | ||
1669 | }; | ||
1670 | |||
1671 | /* Table 6 */ | ||
1672 | enum { | ||
1673 | IPW_ORD_COUNTRY_CODE = IPW_ORD_TABLE_6_MASK, | ||
1674 | IPW_ORD_CURR_BSSID, | ||
1675 | IPW_ORD_CURR_SSID, | ||
1676 | IPW_ORD_TABLE_6_LAST | ||
1677 | }; | ||
1678 | |||
1679 | /* Table 7 */ | ||
1680 | enum { | ||
1681 | IPW_ORD_STAT_PERCENT_MISSED_BEACONS = IPW_ORD_TABLE_7_MASK, | ||
1682 | IPW_ORD_STAT_PERCENT_TX_RETRIES, | ||
1683 | IPW_ORD_STAT_PERCENT_LINK_QUALITY, | ||
1684 | IPW_ORD_STAT_CURR_RSSI_DBM, | ||
1685 | IPW_ORD_TABLE_7_LAST | ||
1686 | }; | ||
1687 | |||
1688 | #define IPW_ORDINALS_TABLE_LOWER (CX2_SHARED_LOWER_BOUND + 0x500) | ||
1689 | #define IPW_ORDINALS_TABLE_0 (CX2_SHARED_LOWER_BOUND + 0x180) | ||
1690 | #define IPW_ORDINALS_TABLE_1 (CX2_SHARED_LOWER_BOUND + 0x184) | ||
1691 | #define IPW_ORDINALS_TABLE_2 (CX2_SHARED_LOWER_BOUND + 0x188) | ||
1692 | #define IPW_MEM_FIXED_OVERRIDE (CX2_SHARED_LOWER_BOUND + 0x41C) | ||
1693 | |||
1694 | struct ipw_fixed_rate { | ||
1695 | u16 tx_rates; | ||
1696 | u16 reserved; | ||
1697 | } __attribute__ ((packed)); | ||
1698 | |||
1699 | #define CX2_INDIRECT_ADDR_MASK (~0x3ul) | ||
1700 | |||
1701 | struct host_cmd { | ||
1702 | u8 cmd; | ||
1703 | u8 len; | ||
1704 | u16 reserved; | ||
1705 | u32 param[TFD_CMD_IMMEDIATE_PAYLOAD_LENGTH]; | ||
1706 | } __attribute__ ((packed)); | ||
1707 | |||
1708 | #define CFG_BT_COEXISTENCE_MIN 0x00 | ||
1709 | #define CFG_BT_COEXISTENCE_DEFER 0x02 | ||
1710 | #define CFG_BT_COEXISTENCE_KILL 0x04 | ||
1711 | #define CFG_BT_COEXISTENCE_WME_OVER_BT 0x08 | ||
1712 | #define CFG_BT_COEXISTENCE_OOB 0x10 | ||
1713 | #define CFG_BT_COEXISTENCE_MAX 0xFF | ||
1714 | #define CFG_BT_COEXISTENCE_DEF 0x80 /* read Bt from EEPROM*/ | ||
1715 | |||
1716 | #define CFG_CTS_TO_ITSELF_ENABLED_MIN 0x0 | ||
1717 | #define CFG_CTS_TO_ITSELF_ENABLED_MAX 0x1 | ||
1718 | #define CFG_CTS_TO_ITSELF_ENABLED_DEF CFG_CTS_TO_ITSELF_ENABLED_MIN | ||
1719 | |||
1720 | #define CFG_SYS_ANTENNA_BOTH 0x000 | ||
1721 | #define CFG_SYS_ANTENNA_A 0x001 | ||
1722 | #define CFG_SYS_ANTENNA_B 0x003 | ||
1723 | |||
1724 | /* | ||
1725 | * The definitions below were lifted off the ipw2100 driver, which only | ||
1726 | * supports 'b' mode, so I'm sure these are not exactly correct. | ||
1727 | * | ||
1728 | * Somebody fix these!! | ||
1729 | */ | ||
1730 | #define REG_MIN_CHANNEL 0 | ||
1731 | #define REG_MAX_CHANNEL 14 | ||
1732 | |||
1733 | #define REG_CHANNEL_MASK 0x00003FFF | ||
1734 | #define IPW_IBSS_11B_DEFAULT_MASK 0x87ff | ||
1735 | |||
1736 | static const long ipw_frequencies[] = { | ||
1737 | 2412, 2417, 2422, 2427, | ||
1738 | 2432, 2437, 2442, 2447, | ||
1739 | 2452, 2457, 2462, 2467, | ||
1740 | 2472, 2484 | ||
1741 | }; | ||
1742 | |||
1743 | #define FREQ_COUNT ARRAY_SIZE(ipw_frequencies) | ||
1744 | |||
1745 | #define IPW_MAX_CONFIG_RETRIES 10 | ||
1746 | |||
1747 | static inline u32 frame_hdr_len(struct ieee80211_hdr *hdr) | ||
1748 | { | ||
1749 | u32 retval; | ||
1750 | u16 fc; | ||
1751 | |||
1752 | retval = sizeof(struct ieee80211_hdr); | ||
1753 | fc = le16_to_cpu(hdr->frame_ctl); | ||
1754 | |||
1755 | /* | ||
1756 | * Function ToDS FromDS | ||
1757 | * IBSS 0 0 | ||
1758 | * To AP 1 0 | ||
1759 | * From AP 0 1 | ||
1760 | * WDS (bridge) 1 1 | ||
1761 | * | ||
1762 | * Only WDS frames use Address4 among them. --YZ | ||
1763 | */ | ||
1764 | if (!(fc & IEEE80211_FCTL_TODS) || !(fc & IEEE80211_FCTL_FROMDS)) | ||
1765 | retval -= ETH_ALEN; | ||
1766 | |||
1767 | return retval; | ||
1768 | } | ||
1769 | |||
1770 | #endif /* __ipw2200_h__ */ | ||
diff --git a/drivers/net/wireless/orinoco.c b/drivers/net/wireless/orinoco.c index a3a32430ae9d..b47684c3217e 100644 --- a/drivers/net/wireless/orinoco.c +++ b/drivers/net/wireless/orinoco.c | |||
@@ -464,6 +464,8 @@ | |||
464 | #include <linux/etherdevice.h> | 464 | #include <linux/etherdevice.h> |
465 | #include <linux/wireless.h> | 465 | #include <linux/wireless.h> |
466 | 466 | ||
467 | #include <net/ieee80211.h> | ||
468 | |||
467 | #include <asm/uaccess.h> | 469 | #include <asm/uaccess.h> |
468 | #include <asm/io.h> | 470 | #include <asm/io.h> |
469 | #include <asm/system.h> | 471 | #include <asm/system.h> |
@@ -471,7 +473,6 @@ | |||
471 | #include "hermes.h" | 473 | #include "hermes.h" |
472 | #include "hermes_rid.h" | 474 | #include "hermes_rid.h" |
473 | #include "orinoco.h" | 475 | #include "orinoco.h" |
474 | #include "ieee802_11.h" | ||
475 | 476 | ||
476 | /********************************************************************/ | 477 | /********************************************************************/ |
477 | /* Module information */ | 478 | /* Module information */ |
@@ -509,7 +510,7 @@ MODULE_PARM_DESC(suppress_linkstatus, "Don't log link status changes"); | |||
509 | /********************************************************************/ | 510 | /********************************************************************/ |
510 | 511 | ||
511 | #define ORINOCO_MIN_MTU 256 | 512 | #define ORINOCO_MIN_MTU 256 |
512 | #define ORINOCO_MAX_MTU (IEEE802_11_DATA_LEN - ENCAPS_OVERHEAD) | 513 | #define ORINOCO_MAX_MTU (IEEE80211_DATA_LEN - ENCAPS_OVERHEAD) |
513 | 514 | ||
514 | #define SYMBOL_MAX_VER_LEN (14) | 515 | #define SYMBOL_MAX_VER_LEN (14) |
515 | #define USER_BAP 0 | 516 | #define USER_BAP 0 |
@@ -760,7 +761,7 @@ static int orinoco_change_mtu(struct net_device *dev, int new_mtu) | |||
760 | if ( (new_mtu < ORINOCO_MIN_MTU) || (new_mtu > ORINOCO_MAX_MTU) ) | 761 | if ( (new_mtu < ORINOCO_MIN_MTU) || (new_mtu > ORINOCO_MAX_MTU) ) |
761 | return -EINVAL; | 762 | return -EINVAL; |
762 | 763 | ||
763 | if ( (new_mtu + ENCAPS_OVERHEAD + IEEE802_11_HLEN) > | 764 | if ( (new_mtu + ENCAPS_OVERHEAD + IEEE80211_HLEN) > |
764 | (priv->nicbuf_size - ETH_HLEN) ) | 765 | (priv->nicbuf_size - ETH_HLEN) ) |
765 | return -EINVAL; | 766 | return -EINVAL; |
766 | 767 | ||
@@ -1104,7 +1105,7 @@ static void __orinoco_ev_rx(struct net_device *dev, hermes_t *hw) | |||
1104 | stats->rx_dropped++; | 1105 | stats->rx_dropped++; |
1105 | goto drop; | 1106 | goto drop; |
1106 | } | 1107 | } |
1107 | if (length > IEEE802_11_DATA_LEN) { | 1108 | if (length > IEEE80211_DATA_LEN) { |
1108 | printk(KERN_WARNING "%s: Oversized frame received (%d bytes)\n", | 1109 | printk(KERN_WARNING "%s: Oversized frame received (%d bytes)\n", |
1109 | dev->name, length); | 1110 | dev->name, length); |
1110 | stats->rx_length_errors++; | 1111 | stats->rx_length_errors++; |
@@ -2264,7 +2265,7 @@ static int orinoco_init(struct net_device *dev) | |||
2264 | 2265 | ||
2265 | /* No need to lock, the hw_unavailable flag is already set in | 2266 | /* No need to lock, the hw_unavailable flag is already set in |
2266 | * alloc_orinocodev() */ | 2267 | * alloc_orinocodev() */ |
2267 | priv->nicbuf_size = IEEE802_11_FRAME_LEN + ETH_HLEN; | 2268 | priv->nicbuf_size = IEEE80211_FRAME_LEN + ETH_HLEN; |
2268 | 2269 | ||
2269 | /* Initialize the firmware */ | 2270 | /* Initialize the firmware */ |
2270 | err = hermes_init(hw); | 2271 | err = hermes_init(hw); |
diff --git a/drivers/net/wireless/wl3501.h b/drivers/net/wireless/wl3501.h index 8636d9306785..b5719437e981 100644 --- a/drivers/net/wireless/wl3501.h +++ b/drivers/net/wireless/wl3501.h | |||
@@ -2,7 +2,7 @@ | |||
2 | #define __WL3501_H__ | 2 | #define __WL3501_H__ |
3 | 3 | ||
4 | #include <linux/spinlock.h> | 4 | #include <linux/spinlock.h> |
5 | #include "ieee802_11.h" | 5 | #include <net/ieee80211.h> |
6 | 6 | ||
7 | /* define for WLA 2.0 */ | 7 | /* define for WLA 2.0 */ |
8 | #define WL3501_BLKSZ 256 | 8 | #define WL3501_BLKSZ 256 |
@@ -548,7 +548,7 @@ struct wl3501_80211_tx_plcp_hdr { | |||
548 | 548 | ||
549 | struct wl3501_80211_tx_hdr { | 549 | struct wl3501_80211_tx_hdr { |
550 | struct wl3501_80211_tx_plcp_hdr pclp_hdr; | 550 | struct wl3501_80211_tx_plcp_hdr pclp_hdr; |
551 | struct ieee802_11_hdr mac_hdr; | 551 | struct ieee80211_hdr mac_hdr; |
552 | } __attribute__ ((packed)); | 552 | } __attribute__ ((packed)); |
553 | 553 | ||
554 | /* | 554 | /* |