diff options
author | Lars-Peter Clausen <lars@metafoo.de> | 2010-05-11 20:10:56 -0400 |
---|---|---|
committer | Samuel Ortiz <sameo@linux.intel.com> | 2010-05-27 19:37:50 -0400 |
commit | 380c09f6489f1fd773a697e9e2a156c083a34fc5 (patch) | |
tree | 4069f2d01ed326a04cd4fabfc0258c3cb7d0c23f /drivers | |
parent | f7b2a77fe6f7b13b9cbf1909f032adef0be63ce1 (diff) |
mfd: Move pcf50633 irq related functions to its own file.
This reduces code clutter a bit and will ease an migration to genirq.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/mfd/Makefile | 3 | ||||
-rw-r--r-- | drivers/mfd/pcf50633-core.c | 303 | ||||
-rw-r--r-- | drivers/mfd/pcf50633-irq.c | 318 |
3 files changed, 330 insertions, 294 deletions
diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile index 85934966a593..ca1517e948af 100644 --- a/drivers/mfd/Makefile +++ b/drivers/mfd/Makefile | |||
@@ -57,7 +57,8 @@ obj-$(CONFIG_PMIC_DA903X) += da903x.o | |||
57 | max8925-objs := max8925-core.o max8925-i2c.o | 57 | max8925-objs := max8925-core.o max8925-i2c.o |
58 | obj-$(CONFIG_MFD_MAX8925) += max8925.o | 58 | obj-$(CONFIG_MFD_MAX8925) += max8925.o |
59 | 59 | ||
60 | obj-$(CONFIG_MFD_PCF50633) += pcf50633-core.o pcf50633-irq.o | 60 | pcf50633-objs := pcf50633-core.o pcf50633-irq.o |
61 | obj-$(CONFIG_MFD_PCF50633) += pcf50633.o | ||
61 | obj-$(CONFIG_PCF50633_ADC) += pcf50633-adc.o | 62 | obj-$(CONFIG_PCF50633_ADC) += pcf50633-adc.o |
62 | obj-$(CONFIG_PCF50633_GPIO) += pcf50633-gpio.o | 63 | obj-$(CONFIG_PCF50633_GPIO) += pcf50633-gpio.o |
63 | obj-$(CONFIG_ABX500_CORE) += abx500-core.o | 64 | obj-$(CONFIG_ABX500_CORE) += abx500-core.o |
diff --git a/drivers/mfd/pcf50633-core.c b/drivers/mfd/pcf50633-core.c index b3bef4998744..704736e6e9b9 100644 --- a/drivers/mfd/pcf50633-core.c +++ b/drivers/mfd/pcf50633-core.c | |||
@@ -21,16 +21,16 @@ | |||
21 | #include <linux/workqueue.h> | 21 | #include <linux/workqueue.h> |
22 | #include <linux/platform_device.h> | 22 | #include <linux/platform_device.h> |
23 | #include <linux/i2c.h> | 23 | #include <linux/i2c.h> |
24 | #include <linux/irq.h> | ||
25 | #include <linux/slab.h> | 24 | #include <linux/slab.h> |
26 | 25 | ||
27 | #include <linux/mfd/pcf50633/core.h> | 26 | #include <linux/mfd/pcf50633/core.h> |
28 | 27 | ||
29 | /* Two MBCS registers used during cold start */ | 28 | int pcf50633_irq_init(struct pcf50633 *pcf, int irq); |
30 | #define PCF50633_REG_MBCS1 0x4b | 29 | void pcf50633_irq_free(struct pcf50633 *pcf); |
31 | #define PCF50633_REG_MBCS2 0x4c | 30 | #ifdef CONFIG_PM |
32 | #define PCF50633_MBCS1_USBPRES 0x01 | 31 | int pcf50633_irq_suspend(struct pcf50633 *pcf); |
33 | #define PCF50633_MBCS1_ADAPTPRES 0x01 | 32 | int pcf50633_irq_resume(struct pcf50633 *pcf); |
33 | #endif | ||
34 | 34 | ||
35 | static int __pcf50633_read(struct pcf50633 *pcf, u8 reg, int num, u8 *data) | 35 | static int __pcf50633_read(struct pcf50633 *pcf, u8 reg, int num, u8 *data) |
36 | { | 36 | { |
@@ -215,228 +215,6 @@ static struct attribute_group pcf_attr_group = { | |||
215 | .attrs = pcf_sysfs_entries, | 215 | .attrs = pcf_sysfs_entries, |
216 | }; | 216 | }; |
217 | 217 | ||
218 | int pcf50633_register_irq(struct pcf50633 *pcf, int irq, | ||
219 | void (*handler) (int, void *), void *data) | ||
220 | { | ||
221 | if (irq < 0 || irq >= PCF50633_NUM_IRQ || !handler) | ||
222 | return -EINVAL; | ||
223 | |||
224 | if (WARN_ON(pcf->irq_handler[irq].handler)) | ||
225 | return -EBUSY; | ||
226 | |||
227 | mutex_lock(&pcf->lock); | ||
228 | pcf->irq_handler[irq].handler = handler; | ||
229 | pcf->irq_handler[irq].data = data; | ||
230 | mutex_unlock(&pcf->lock); | ||
231 | |||
232 | return 0; | ||
233 | } | ||
234 | EXPORT_SYMBOL_GPL(pcf50633_register_irq); | ||
235 | |||
236 | int pcf50633_free_irq(struct pcf50633 *pcf, int irq) | ||
237 | { | ||
238 | if (irq < 0 || irq >= PCF50633_NUM_IRQ) | ||
239 | return -EINVAL; | ||
240 | |||
241 | mutex_lock(&pcf->lock); | ||
242 | pcf->irq_handler[irq].handler = NULL; | ||
243 | mutex_unlock(&pcf->lock); | ||
244 | |||
245 | return 0; | ||
246 | } | ||
247 | EXPORT_SYMBOL_GPL(pcf50633_free_irq); | ||
248 | |||
249 | static int __pcf50633_irq_mask_set(struct pcf50633 *pcf, int irq, u8 mask) | ||
250 | { | ||
251 | u8 reg, bits, tmp; | ||
252 | int ret = 0, idx; | ||
253 | |||
254 | idx = irq >> 3; | ||
255 | reg = PCF50633_REG_INT1M + idx; | ||
256 | bits = 1 << (irq & 0x07); | ||
257 | |||
258 | mutex_lock(&pcf->lock); | ||
259 | |||
260 | if (mask) { | ||
261 | ret = __pcf50633_read(pcf, reg, 1, &tmp); | ||
262 | if (ret < 0) | ||
263 | goto out; | ||
264 | |||
265 | tmp |= bits; | ||
266 | |||
267 | ret = __pcf50633_write(pcf, reg, 1, &tmp); | ||
268 | if (ret < 0) | ||
269 | goto out; | ||
270 | |||
271 | pcf->mask_regs[idx] &= ~bits; | ||
272 | pcf->mask_regs[idx] |= bits; | ||
273 | } else { | ||
274 | ret = __pcf50633_read(pcf, reg, 1, &tmp); | ||
275 | if (ret < 0) | ||
276 | goto out; | ||
277 | |||
278 | tmp &= ~bits; | ||
279 | |||
280 | ret = __pcf50633_write(pcf, reg, 1, &tmp); | ||
281 | if (ret < 0) | ||
282 | goto out; | ||
283 | |||
284 | pcf->mask_regs[idx] &= ~bits; | ||
285 | } | ||
286 | out: | ||
287 | mutex_unlock(&pcf->lock); | ||
288 | |||
289 | return ret; | ||
290 | } | ||
291 | |||
292 | int pcf50633_irq_mask(struct pcf50633 *pcf, int irq) | ||
293 | { | ||
294 | dev_dbg(pcf->dev, "Masking IRQ %d\n", irq); | ||
295 | |||
296 | return __pcf50633_irq_mask_set(pcf, irq, 1); | ||
297 | } | ||
298 | EXPORT_SYMBOL_GPL(pcf50633_irq_mask); | ||
299 | |||
300 | int pcf50633_irq_unmask(struct pcf50633 *pcf, int irq) | ||
301 | { | ||
302 | dev_dbg(pcf->dev, "Unmasking IRQ %d\n", irq); | ||
303 | |||
304 | return __pcf50633_irq_mask_set(pcf, irq, 0); | ||
305 | } | ||
306 | EXPORT_SYMBOL_GPL(pcf50633_irq_unmask); | ||
307 | |||
308 | int pcf50633_irq_mask_get(struct pcf50633 *pcf, int irq) | ||
309 | { | ||
310 | u8 reg, bits; | ||
311 | |||
312 | reg = irq >> 3; | ||
313 | bits = 1 << (irq & 0x07); | ||
314 | |||
315 | return pcf->mask_regs[reg] & bits; | ||
316 | } | ||
317 | EXPORT_SYMBOL_GPL(pcf50633_irq_mask_get); | ||
318 | |||
319 | static void pcf50633_irq_call_handler(struct pcf50633 *pcf, int irq) | ||
320 | { | ||
321 | if (pcf->irq_handler[irq].handler) | ||
322 | pcf->irq_handler[irq].handler(irq, pcf->irq_handler[irq].data); | ||
323 | } | ||
324 | |||
325 | /* Maximum amount of time ONKEY is held before emergency action is taken */ | ||
326 | #define PCF50633_ONKEY1S_TIMEOUT 8 | ||
327 | |||
328 | static irqreturn_t pcf50633_irq(int irq, void *data) | ||
329 | { | ||
330 | struct pcf50633 *pcf = data; | ||
331 | int ret, i, j; | ||
332 | u8 pcf_int[5], chgstat; | ||
333 | |||
334 | /* Read the 5 INT regs in one transaction */ | ||
335 | ret = pcf50633_read_block(pcf, PCF50633_REG_INT1, | ||
336 | ARRAY_SIZE(pcf_int), pcf_int); | ||
337 | if (ret != ARRAY_SIZE(pcf_int)) { | ||
338 | dev_err(pcf->dev, "Error reading INT registers\n"); | ||
339 | |||
340 | /* | ||
341 | * If this doesn't ACK the interrupt to the chip, we'll be | ||
342 | * called once again as we're level triggered. | ||
343 | */ | ||
344 | goto out; | ||
345 | } | ||
346 | |||
347 | /* defeat 8s death from lowsys on A5 */ | ||
348 | pcf50633_reg_write(pcf, PCF50633_REG_OOCSHDWN, 0x04); | ||
349 | |||
350 | /* We immediately read the usb and adapter status. We thus make sure | ||
351 | * only of USBINS/USBREM IRQ handlers are called */ | ||
352 | if (pcf_int[0] & (PCF50633_INT1_USBINS | PCF50633_INT1_USBREM)) { | ||
353 | chgstat = pcf50633_reg_read(pcf, PCF50633_REG_MBCS2); | ||
354 | if (chgstat & (0x3 << 4)) | ||
355 | pcf_int[0] &= ~PCF50633_INT1_USBREM; | ||
356 | else | ||
357 | pcf_int[0] &= ~PCF50633_INT1_USBINS; | ||
358 | } | ||
359 | |||
360 | /* Make sure only one of ADPINS or ADPREM is set */ | ||
361 | if (pcf_int[0] & (PCF50633_INT1_ADPINS | PCF50633_INT1_ADPREM)) { | ||
362 | chgstat = pcf50633_reg_read(pcf, PCF50633_REG_MBCS2); | ||
363 | if (chgstat & (0x3 << 4)) | ||
364 | pcf_int[0] &= ~PCF50633_INT1_ADPREM; | ||
365 | else | ||
366 | pcf_int[0] &= ~PCF50633_INT1_ADPINS; | ||
367 | } | ||
368 | |||
369 | dev_dbg(pcf->dev, "INT1=0x%02x INT2=0x%02x INT3=0x%02x " | ||
370 | "INT4=0x%02x INT5=0x%02x\n", pcf_int[0], | ||
371 | pcf_int[1], pcf_int[2], pcf_int[3], pcf_int[4]); | ||
372 | |||
373 | /* Some revisions of the chip don't have a 8s standby mode on | ||
374 | * ONKEY1S press. We try to manually do it in such cases. */ | ||
375 | if ((pcf_int[0] & PCF50633_INT1_SECOND) && pcf->onkey1s_held) { | ||
376 | dev_info(pcf->dev, "ONKEY1S held for %d secs\n", | ||
377 | pcf->onkey1s_held); | ||
378 | if (pcf->onkey1s_held++ == PCF50633_ONKEY1S_TIMEOUT) | ||
379 | if (pcf->pdata->force_shutdown) | ||
380 | pcf->pdata->force_shutdown(pcf); | ||
381 | } | ||
382 | |||
383 | if (pcf_int[2] & PCF50633_INT3_ONKEY1S) { | ||
384 | dev_info(pcf->dev, "ONKEY1S held\n"); | ||
385 | pcf->onkey1s_held = 1 ; | ||
386 | |||
387 | /* Unmask IRQ_SECOND */ | ||
388 | pcf50633_reg_clear_bits(pcf, PCF50633_REG_INT1M, | ||
389 | PCF50633_INT1_SECOND); | ||
390 | |||
391 | /* Unmask IRQ_ONKEYR */ | ||
392 | pcf50633_reg_clear_bits(pcf, PCF50633_REG_INT2M, | ||
393 | PCF50633_INT2_ONKEYR); | ||
394 | } | ||
395 | |||
396 | if ((pcf_int[1] & PCF50633_INT2_ONKEYR) && pcf->onkey1s_held) { | ||
397 | pcf->onkey1s_held = 0; | ||
398 | |||
399 | /* Mask SECOND and ONKEYR interrupts */ | ||
400 | if (pcf->mask_regs[0] & PCF50633_INT1_SECOND) | ||
401 | pcf50633_reg_set_bit_mask(pcf, | ||
402 | PCF50633_REG_INT1M, | ||
403 | PCF50633_INT1_SECOND, | ||
404 | PCF50633_INT1_SECOND); | ||
405 | |||
406 | if (pcf->mask_regs[1] & PCF50633_INT2_ONKEYR) | ||
407 | pcf50633_reg_set_bit_mask(pcf, | ||
408 | PCF50633_REG_INT2M, | ||
409 | PCF50633_INT2_ONKEYR, | ||
410 | PCF50633_INT2_ONKEYR); | ||
411 | } | ||
412 | |||
413 | /* Have we just resumed ? */ | ||
414 | if (pcf->is_suspended) { | ||
415 | pcf->is_suspended = 0; | ||
416 | |||
417 | /* Set the resume reason filtering out non resumers */ | ||
418 | for (i = 0; i < ARRAY_SIZE(pcf_int); i++) | ||
419 | pcf->resume_reason[i] = pcf_int[i] & | ||
420 | pcf->pdata->resumers[i]; | ||
421 | |||
422 | /* Make sure we don't pass on any ONKEY events to | ||
423 | * userspace now */ | ||
424 | pcf_int[1] &= ~(PCF50633_INT2_ONKEYR | PCF50633_INT2_ONKEYF); | ||
425 | } | ||
426 | |||
427 | for (i = 0; i < ARRAY_SIZE(pcf_int); i++) { | ||
428 | /* Unset masked interrupts */ | ||
429 | pcf_int[i] &= ~pcf->mask_regs[i]; | ||
430 | |||
431 | for (j = 0; j < 8 ; j++) | ||
432 | if (pcf_int[i] & (1 << j)) | ||
433 | pcf50633_irq_call_handler(pcf, (i * 8) + j); | ||
434 | } | ||
435 | |||
436 | out: | ||
437 | return IRQ_HANDLED | ||
438 | } | ||
439 | |||
440 | static void | 218 | static void |
441 | pcf50633_client_dev_register(struct pcf50633 *pcf, const char *name, | 219 | pcf50633_client_dev_register(struct pcf50633 *pcf, const char *name, |
442 | struct platform_device **pdev) | 220 | struct platform_device **pdev) |
@@ -463,58 +241,17 @@ pcf50633_client_dev_register(struct pcf50633 *pcf, const char *name, | |||
463 | static int pcf50633_suspend(struct i2c_client *client, pm_message_t state) | 241 | static int pcf50633_suspend(struct i2c_client *client, pm_message_t state) |
464 | { | 242 | { |
465 | struct pcf50633 *pcf; | 243 | struct pcf50633 *pcf; |
466 | int ret = 0, i; | ||
467 | u8 res[5]; | ||
468 | |||
469 | pcf = i2c_get_clientdata(client); | 244 | pcf = i2c_get_clientdata(client); |
470 | 245 | ||
471 | /* Make sure our interrupt handlers are not called | 246 | return pcf50633_irq_suspend(pcf); |
472 | * henceforth */ | ||
473 | disable_irq(pcf->irq); | ||
474 | |||
475 | /* Save the masks */ | ||
476 | ret = pcf50633_read_block(pcf, PCF50633_REG_INT1M, | ||
477 | ARRAY_SIZE(pcf->suspend_irq_masks), | ||
478 | pcf->suspend_irq_masks); | ||
479 | if (ret < 0) { | ||
480 | dev_err(pcf->dev, "error saving irq masks\n"); | ||
481 | goto out; | ||
482 | } | ||
483 | |||
484 | /* Write wakeup irq masks */ | ||
485 | for (i = 0; i < ARRAY_SIZE(res); i++) | ||
486 | res[i] = ~pcf->pdata->resumers[i]; | ||
487 | |||
488 | ret = pcf50633_write_block(pcf, PCF50633_REG_INT1M, | ||
489 | ARRAY_SIZE(res), &res[0]); | ||
490 | if (ret < 0) { | ||
491 | dev_err(pcf->dev, "error writing wakeup irq masks\n"); | ||
492 | goto out; | ||
493 | } | ||
494 | |||
495 | pcf->is_suspended = 1; | ||
496 | |||
497 | out: | ||
498 | return ret; | ||
499 | } | 247 | } |
500 | 248 | ||
501 | static int pcf50633_resume(struct i2c_client *client) | 249 | static int pcf50633_resume(struct i2c_client *client) |
502 | { | 250 | { |
503 | struct pcf50633 *pcf; | 251 | struct pcf50633 *pcf; |
504 | int ret; | ||
505 | |||
506 | pcf = i2c_get_clientdata(client); | 252 | pcf = i2c_get_clientdata(client); |
507 | 253 | ||
508 | /* Write the saved mask registers */ | 254 | return pcf50633_irq_resume(pcf); |
509 | ret = pcf50633_write_block(pcf, PCF50633_REG_INT1M, | ||
510 | ARRAY_SIZE(pcf->suspend_irq_masks), | ||
511 | pcf->suspend_irq_masks); | ||
512 | if (ret < 0) | ||
513 | dev_err(pcf->dev, "Error restoring saved suspend masks\n"); | ||
514 | |||
515 | enable_irq(pcf->irq); | ||
516 | |||
517 | return 0; | ||
518 | } | 255 | } |
519 | #else | 256 | #else |
520 | #define pcf50633_suspend NULL | 257 | #define pcf50633_suspend NULL |
@@ -545,7 +282,6 @@ static int __devinit pcf50633_probe(struct i2c_client *client, | |||
545 | i2c_set_clientdata(client, pcf); | 282 | i2c_set_clientdata(client, pcf); |
546 | pcf->dev = &client->dev; | 283 | pcf->dev = &client->dev; |
547 | pcf->i2c_client = client; | 284 | pcf->i2c_client = client; |
548 | pcf->irq = client->irq; | ||
549 | 285 | ||
550 | version = pcf50633_reg_read(pcf, 0); | 286 | version = pcf50633_reg_read(pcf, 0); |
551 | variant = pcf50633_reg_read(pcf, 1); | 287 | variant = pcf50633_reg_read(pcf, 1); |
@@ -558,22 +294,7 @@ static int __devinit pcf50633_probe(struct i2c_client *client, | |||
558 | dev_info(pcf->dev, "Probed device version %d variant %d\n", | 294 | dev_info(pcf->dev, "Probed device version %d variant %d\n", |
559 | version, variant); | 295 | version, variant); |
560 | 296 | ||
561 | /* Enable all interrupts except RTC SECOND */ | 297 | pcf50633_irq_init(pcf, client->irq); |
562 | pcf->mask_regs[0] = 0x80; | ||
563 | pcf50633_reg_write(pcf, PCF50633_REG_INT1M, pcf->mask_regs[0]); | ||
564 | pcf50633_reg_write(pcf, PCF50633_REG_INT2M, 0x00); | ||
565 | pcf50633_reg_write(pcf, PCF50633_REG_INT3M, 0x00); | ||
566 | pcf50633_reg_write(pcf, PCF50633_REG_INT4M, 0x00); | ||
567 | pcf50633_reg_write(pcf, PCF50633_REG_INT5M, 0x00); | ||
568 | |||
569 | ret = request_threaded_irq(client->irq, NULL, pcf50633_irq, | ||
570 | IRQF_TRIGGER_LOW | IRQF_ONESHOT, | ||
571 | "pcf50633", pcf); | ||
572 | |||
573 | if (ret) { | ||
574 | dev_err(pcf->dev, "Failed to request IRQ %d\n", ret); | ||
575 | goto err_free; | ||
576 | } | ||
577 | 298 | ||
578 | /* Create sub devices */ | 299 | /* Create sub devices */ |
579 | pcf50633_client_dev_register(pcf, "pcf50633-input", | 300 | pcf50633_client_dev_register(pcf, "pcf50633-input", |
@@ -605,10 +326,6 @@ static int __devinit pcf50633_probe(struct i2c_client *client, | |||
605 | platform_device_add(pdev); | 326 | platform_device_add(pdev); |
606 | } | 327 | } |
607 | 328 | ||
608 | if (enable_irq_wake(client->irq) < 0) | ||
609 | dev_err(pcf->dev, "IRQ %u cannot be enabled as wake-up source" | ||
610 | "in this hardware revision", client->irq); | ||
611 | |||
612 | ret = sysfs_create_group(&client->dev.kobj, &pcf_attr_group); | 329 | ret = sysfs_create_group(&client->dev.kobj, &pcf_attr_group); |
613 | if (ret) | 330 | if (ret) |
614 | dev_err(pcf->dev, "error creating sysfs entries\n"); | 331 | dev_err(pcf->dev, "error creating sysfs entries\n"); |
@@ -630,7 +347,7 @@ static int __devexit pcf50633_remove(struct i2c_client *client) | |||
630 | struct pcf50633 *pcf = i2c_get_clientdata(client); | 347 | struct pcf50633 *pcf = i2c_get_clientdata(client); |
631 | int i; | 348 | int i; |
632 | 349 | ||
633 | free_irq(pcf->irq, pcf); | 350 | pcf50633_irq_free(pcf); |
634 | 351 | ||
635 | platform_device_unregister(pcf->input_pdev); | 352 | platform_device_unregister(pcf->input_pdev); |
636 | platform_device_unregister(pcf->rtc_pdev); | 353 | platform_device_unregister(pcf->rtc_pdev); |
diff --git a/drivers/mfd/pcf50633-irq.c b/drivers/mfd/pcf50633-irq.c new file mode 100644 index 000000000000..1b0192f1efff --- /dev/null +++ b/drivers/mfd/pcf50633-irq.c | |||
@@ -0,0 +1,318 @@ | |||
1 | /* NXP PCF50633 Power Management Unit (PMU) driver | ||
2 | * | ||
3 | * (C) 2006-2008 by Openmoko, Inc. | ||
4 | * Author: Harald Welte <laforge@openmoko.org> | ||
5 | * Balaji Rao <balajirrao@openmoko.org> | ||
6 | * All rights reserved. | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify it | ||
9 | * under the terms of the GNU General Public License as published by the | ||
10 | * Free Software Foundation; either version 2 of the License, or (at your | ||
11 | * option) any later version. | ||
12 | * | ||
13 | */ | ||
14 | |||
15 | #include <linux/interrupt.h> | ||
16 | #include <linux/kernel.h> | ||
17 | #include <linux/mutex.h> | ||
18 | #include <linux/slab.h> | ||
19 | |||
20 | #include <linux/mfd/pcf50633/core.h> | ||
21 | |||
22 | /* Two MBCS registers used during cold start */ | ||
23 | #define PCF50633_REG_MBCS1 0x4b | ||
24 | #define PCF50633_REG_MBCS2 0x4c | ||
25 | #define PCF50633_MBCS1_USBPRES 0x01 | ||
26 | #define PCF50633_MBCS1_ADAPTPRES 0x01 | ||
27 | |||
28 | int pcf50633_register_irq(struct pcf50633 *pcf, int irq, | ||
29 | void (*handler) (int, void *), void *data) | ||
30 | { | ||
31 | if (irq < 0 || irq >= PCF50633_NUM_IRQ || !handler) | ||
32 | return -EINVAL; | ||
33 | |||
34 | if (WARN_ON(pcf->irq_handler[irq].handler)) | ||
35 | return -EBUSY; | ||
36 | |||
37 | mutex_lock(&pcf->lock); | ||
38 | pcf->irq_handler[irq].handler = handler; | ||
39 | pcf->irq_handler[irq].data = data; | ||
40 | mutex_unlock(&pcf->lock); | ||
41 | |||
42 | return 0; | ||
43 | } | ||
44 | EXPORT_SYMBOL_GPL(pcf50633_register_irq); | ||
45 | |||
46 | int pcf50633_free_irq(struct pcf50633 *pcf, int irq) | ||
47 | { | ||
48 | if (irq < 0 || irq >= PCF50633_NUM_IRQ) | ||
49 | return -EINVAL; | ||
50 | |||
51 | mutex_lock(&pcf->lock); | ||
52 | pcf->irq_handler[irq].handler = NULL; | ||
53 | mutex_unlock(&pcf->lock); | ||
54 | |||
55 | return 0; | ||
56 | } | ||
57 | EXPORT_SYMBOL_GPL(pcf50633_free_irq); | ||
58 | |||
59 | static int __pcf50633_irq_mask_set(struct pcf50633 *pcf, int irq, u8 mask) | ||
60 | { | ||
61 | u8 reg, bit; | ||
62 | int ret = 0, idx; | ||
63 | |||
64 | idx = irq >> 3; | ||
65 | reg = PCF50633_REG_INT1M + idx; | ||
66 | bit = 1 << (irq & 0x07); | ||
67 | |||
68 | pcf50633_reg_set_bit_mask(pcf, reg, bit, mask ? bit : 0); | ||
69 | |||
70 | mutex_lock(&pcf->lock); | ||
71 | |||
72 | if (mask) | ||
73 | pcf->mask_regs[idx] |= bit; | ||
74 | else | ||
75 | pcf->mask_regs[idx] &= ~bit; | ||
76 | |||
77 | mutex_unlock(&pcf->lock); | ||
78 | |||
79 | return ret; | ||
80 | } | ||
81 | |||
82 | int pcf50633_irq_mask(struct pcf50633 *pcf, int irq) | ||
83 | { | ||
84 | dev_dbg(pcf->dev, "Masking IRQ %d\n", irq); | ||
85 | |||
86 | return __pcf50633_irq_mask_set(pcf, irq, 1); | ||
87 | } | ||
88 | EXPORT_SYMBOL_GPL(pcf50633_irq_mask); | ||
89 | |||
90 | int pcf50633_irq_unmask(struct pcf50633 *pcf, int irq) | ||
91 | { | ||
92 | dev_dbg(pcf->dev, "Unmasking IRQ %d\n", irq); | ||
93 | |||
94 | return __pcf50633_irq_mask_set(pcf, irq, 0); | ||
95 | } | ||
96 | EXPORT_SYMBOL_GPL(pcf50633_irq_unmask); | ||
97 | |||
98 | int pcf50633_irq_mask_get(struct pcf50633 *pcf, int irq) | ||
99 | { | ||
100 | u8 reg, bits; | ||
101 | |||
102 | reg = irq >> 3; | ||
103 | bits = 1 << (irq & 0x07); | ||
104 | |||
105 | return pcf->mask_regs[reg] & bits; | ||
106 | } | ||
107 | EXPORT_SYMBOL_GPL(pcf50633_irq_mask_get); | ||
108 | |||
109 | static void pcf50633_irq_call_handler(struct pcf50633 *pcf, int irq) | ||
110 | { | ||
111 | if (pcf->irq_handler[irq].handler) | ||
112 | pcf->irq_handler[irq].handler(irq, pcf->irq_handler[irq].data); | ||
113 | } | ||
114 | |||
115 | /* Maximum amount of time ONKEY is held before emergency action is taken */ | ||
116 | #define PCF50633_ONKEY1S_TIMEOUT 8 | ||
117 | |||
118 | static irqreturn_t pcf50633_irq(int irq, void *data) | ||
119 | { | ||
120 | struct pcf50633 *pcf = data; | ||
121 | int ret, i, j; | ||
122 | u8 pcf_int[5], chgstat; | ||
123 | |||
124 | /* Read the 5 INT regs in one transaction */ | ||
125 | ret = pcf50633_read_block(pcf, PCF50633_REG_INT1, | ||
126 | ARRAY_SIZE(pcf_int), pcf_int); | ||
127 | if (ret != ARRAY_SIZE(pcf_int)) { | ||
128 | dev_err(pcf->dev, "Error reading INT registers\n"); | ||
129 | |||
130 | /* | ||
131 | * If this doesn't ACK the interrupt to the chip, we'll be | ||
132 | * called once again as we're level triggered. | ||
133 | */ | ||
134 | goto out; | ||
135 | } | ||
136 | |||
137 | /* defeat 8s death from lowsys on A5 */ | ||
138 | pcf50633_reg_write(pcf, PCF50633_REG_OOCSHDWN, 0x04); | ||
139 | |||
140 | /* We immediately read the usb and adapter status. We thus make sure | ||
141 | * only of USBINS/USBREM IRQ handlers are called */ | ||
142 | if (pcf_int[0] & (PCF50633_INT1_USBINS | PCF50633_INT1_USBREM)) { | ||
143 | chgstat = pcf50633_reg_read(pcf, PCF50633_REG_MBCS2); | ||
144 | if (chgstat & (0x3 << 4)) | ||
145 | pcf_int[0] &= ~PCF50633_INT1_USBREM; | ||
146 | else | ||
147 | pcf_int[0] &= ~PCF50633_INT1_USBINS; | ||
148 | } | ||
149 | |||
150 | /* Make sure only one of ADPINS or ADPREM is set */ | ||
151 | if (pcf_int[0] & (PCF50633_INT1_ADPINS | PCF50633_INT1_ADPREM)) { | ||
152 | chgstat = pcf50633_reg_read(pcf, PCF50633_REG_MBCS2); | ||
153 | if (chgstat & (0x3 << 4)) | ||
154 | pcf_int[0] &= ~PCF50633_INT1_ADPREM; | ||
155 | else | ||
156 | pcf_int[0] &= ~PCF50633_INT1_ADPINS; | ||
157 | } | ||
158 | |||
159 | dev_dbg(pcf->dev, "INT1=0x%02x INT2=0x%02x INT3=0x%02x " | ||
160 | "INT4=0x%02x INT5=0x%02x\n", pcf_int[0], | ||
161 | pcf_int[1], pcf_int[2], pcf_int[3], pcf_int[4]); | ||
162 | |||
163 | /* Some revisions of the chip don't have a 8s standby mode on | ||
164 | * ONKEY1S press. We try to manually do it in such cases. */ | ||
165 | if ((pcf_int[0] & PCF50633_INT1_SECOND) && pcf->onkey1s_held) { | ||
166 | dev_info(pcf->dev, "ONKEY1S held for %d secs\n", | ||
167 | pcf->onkey1s_held); | ||
168 | if (pcf->onkey1s_held++ == PCF50633_ONKEY1S_TIMEOUT) | ||
169 | if (pcf->pdata->force_shutdown) | ||
170 | pcf->pdata->force_shutdown(pcf); | ||
171 | } | ||
172 | |||
173 | if (pcf_int[2] & PCF50633_INT3_ONKEY1S) { | ||
174 | dev_info(pcf->dev, "ONKEY1S held\n"); | ||
175 | pcf->onkey1s_held = 1 ; | ||
176 | |||
177 | /* Unmask IRQ_SECOND */ | ||
178 | pcf50633_reg_clear_bits(pcf, PCF50633_REG_INT1M, | ||
179 | PCF50633_INT1_SECOND); | ||
180 | |||
181 | /* Unmask IRQ_ONKEYR */ | ||
182 | pcf50633_reg_clear_bits(pcf, PCF50633_REG_INT2M, | ||
183 | PCF50633_INT2_ONKEYR); | ||
184 | } | ||
185 | |||
186 | if ((pcf_int[1] & PCF50633_INT2_ONKEYR) && pcf->onkey1s_held) { | ||
187 | pcf->onkey1s_held = 0; | ||
188 | |||
189 | /* Mask SECOND and ONKEYR interrupts */ | ||
190 | if (pcf->mask_regs[0] & PCF50633_INT1_SECOND) | ||
191 | pcf50633_reg_set_bit_mask(pcf, | ||
192 | PCF50633_REG_INT1M, | ||
193 | PCF50633_INT1_SECOND, | ||
194 | PCF50633_INT1_SECOND); | ||
195 | |||
196 | if (pcf->mask_regs[1] & PCF50633_INT2_ONKEYR) | ||
197 | pcf50633_reg_set_bit_mask(pcf, | ||
198 | PCF50633_REG_INT2M, | ||
199 | PCF50633_INT2_ONKEYR, | ||
200 | PCF50633_INT2_ONKEYR); | ||
201 | } | ||
202 | |||
203 | /* Have we just resumed ? */ | ||
204 | if (pcf->is_suspended) { | ||
205 | pcf->is_suspended = 0; | ||
206 | |||
207 | /* Set the resume reason filtering out non resumers */ | ||
208 | for (i = 0; i < ARRAY_SIZE(pcf_int); i++) | ||
209 | pcf->resume_reason[i] = pcf_int[i] & | ||
210 | pcf->pdata->resumers[i]; | ||
211 | |||
212 | /* Make sure we don't pass on any ONKEY events to | ||
213 | * userspace now */ | ||
214 | pcf_int[1] &= ~(PCF50633_INT2_ONKEYR | PCF50633_INT2_ONKEYF); | ||
215 | } | ||
216 | |||
217 | for (i = 0; i < ARRAY_SIZE(pcf_int); i++) { | ||
218 | /* Unset masked interrupts */ | ||
219 | pcf_int[i] &= ~pcf->mask_regs[i]; | ||
220 | |||
221 | for (j = 0; j < 8 ; j++) | ||
222 | if (pcf_int[i] & (1 << j)) | ||
223 | pcf50633_irq_call_handler(pcf, (i * 8) + j); | ||
224 | } | ||
225 | |||
226 | out: | ||
227 | return IRQ_HANDLED; | ||
228 | } | ||
229 | |||
230 | #ifdef CONFIG_PM | ||
231 | |||
232 | int pcf50633_irq_suspend(struct pcf50633 *pcf) | ||
233 | { | ||
234 | int ret; | ||
235 | int i; | ||
236 | u8 res[5]; | ||
237 | |||
238 | |||
239 | /* Make sure our interrupt handlers are not called | ||
240 | * henceforth */ | ||
241 | disable_irq(pcf->irq); | ||
242 | |||
243 | /* Save the masks */ | ||
244 | ret = pcf50633_read_block(pcf, PCF50633_REG_INT1M, | ||
245 | ARRAY_SIZE(pcf->suspend_irq_masks), | ||
246 | pcf->suspend_irq_masks); | ||
247 | if (ret < 0) { | ||
248 | dev_err(pcf->dev, "error saving irq masks\n"); | ||
249 | goto out; | ||
250 | } | ||
251 | |||
252 | /* Write wakeup irq masks */ | ||
253 | for (i = 0; i < ARRAY_SIZE(res); i++) | ||
254 | res[i] = ~pcf->pdata->resumers[i]; | ||
255 | |||
256 | ret = pcf50633_write_block(pcf, PCF50633_REG_INT1M, | ||
257 | ARRAY_SIZE(res), &res[0]); | ||
258 | if (ret < 0) { | ||
259 | dev_err(pcf->dev, "error writing wakeup irq masks\n"); | ||
260 | goto out; | ||
261 | } | ||
262 | |||
263 | pcf->is_suspended = 1; | ||
264 | |||
265 | out: | ||
266 | return ret; | ||
267 | } | ||
268 | |||
269 | int pcf50633_irq_resume(struct pcf50633 *pcf) | ||
270 | { | ||
271 | int ret; | ||
272 | |||
273 | /* Write the saved mask registers */ | ||
274 | ret = pcf50633_write_block(pcf, PCF50633_REG_INT1M, | ||
275 | ARRAY_SIZE(pcf->suspend_irq_masks), | ||
276 | pcf->suspend_irq_masks); | ||
277 | if (ret < 0) | ||
278 | dev_err(pcf->dev, "Error restoring saved suspend masks\n"); | ||
279 | |||
280 | enable_irq(pcf->irq); | ||
281 | |||
282 | return ret; | ||
283 | } | ||
284 | |||
285 | #endif | ||
286 | |||
287 | int pcf50633_irq_init(struct pcf50633 *pcf, int irq) | ||
288 | { | ||
289 | int ret; | ||
290 | |||
291 | pcf->irq = irq; | ||
292 | |||
293 | /* Enable all interrupts except RTC SECOND */ | ||
294 | pcf->mask_regs[0] = 0x80; | ||
295 | pcf50633_reg_write(pcf, PCF50633_REG_INT1M, pcf->mask_regs[0]); | ||
296 | pcf50633_reg_write(pcf, PCF50633_REG_INT2M, 0x00); | ||
297 | pcf50633_reg_write(pcf, PCF50633_REG_INT3M, 0x00); | ||
298 | pcf50633_reg_write(pcf, PCF50633_REG_INT4M, 0x00); | ||
299 | pcf50633_reg_write(pcf, PCF50633_REG_INT5M, 0x00); | ||
300 | |||
301 | ret = request_threaded_irq(irq, NULL, pcf50633_irq, | ||
302 | IRQF_TRIGGER_LOW | IRQF_ONESHOT, | ||
303 | "pcf50633", pcf); | ||
304 | |||
305 | if (ret) | ||
306 | dev_err(pcf->dev, "Failed to request IRQ %d\n", ret); | ||
307 | |||
308 | if (enable_irq_wake(irq) < 0) | ||
309 | dev_err(pcf->dev, "IRQ %u cannot be enabled as wake-up source" | ||
310 | "in this hardware revision", irq); | ||
311 | |||
312 | return ret; | ||
313 | } | ||
314 | |||
315 | void pcf50633_irq_free(struct pcf50633 *pcf) | ||
316 | { | ||
317 | free_irq(pcf->irq, pcf); | ||
318 | } | ||