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authorZhenyu Wang <zhenyuw@linux.intel.com>2009-07-23 13:00:28 -0400
committerEric Anholt <eric@anholt.net>2009-07-29 18:15:53 -0400
commit24f119c769bacac5729297b682fec7811a983cc6 (patch)
tree32223326ccc9ce401b3126044b50bdae078195df /drivers
parentcdaa052b05e26d96a990af5d253fd2af5db2b1fc (diff)
drm/i915: disable VGA plane reliably
This does VGA disable like DDX driver. SR01 bit 5 should be set before VGA plane disable through control register, otherwise we might get random crash and lockups. Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com> Signed-off-by: Eric Anholt <eric@anholt.net>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/gpu/drm/i915/intel_display.c28
1 files changed, 25 insertions, 3 deletions
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index a58bfadabd6f..b06364ed2591 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -998,6 +998,29 @@ intel_pipe_set_base(struct drm_crtc *crtc, int x, int y,
998 return 0; 998 return 0;
999} 999}
1000 1000
1001/* Disable the VGA plane that we never use */
1002static void i915_disable_vga (struct drm_device *dev)
1003{
1004 struct drm_i915_private *dev_priv = dev->dev_private;
1005 u8 sr1;
1006 u32 vga_reg;
1007
1008 if (IS_IGDNG(dev))
1009 vga_reg = CPU_VGACNTRL;
1010 else
1011 vga_reg = VGACNTRL;
1012
1013 if (I915_READ(vga_reg) & VGA_DISP_DISABLE)
1014 return;
1015
1016 I915_WRITE8(VGA_SR_INDEX, 1);
1017 sr1 = I915_READ8(VGA_SR_DATA);
1018 I915_WRITE8(VGA_SR_DATA, sr1 | (1 << 5));
1019 udelay(100);
1020
1021 I915_WRITE(vga_reg, VGA_DISP_DISABLE);
1022}
1023
1001static void igdng_crtc_dpms(struct drm_crtc *crtc, int mode) 1024static void igdng_crtc_dpms(struct drm_crtc *crtc, int mode)
1002{ 1025{
1003 struct drm_device *dev = crtc->dev; 1026 struct drm_device *dev = crtc->dev;
@@ -1200,8 +1223,7 @@ static void igdng_crtc_dpms(struct drm_crtc *crtc, int mode)
1200 case DRM_MODE_DPMS_OFF: 1223 case DRM_MODE_DPMS_OFF:
1201 DRM_DEBUG("crtc %d dpms off\n", pipe); 1224 DRM_DEBUG("crtc %d dpms off\n", pipe);
1202 1225
1203 /* Disable the VGA plane that we never use */ 1226 i915_disable_vga(dev);
1204 I915_WRITE(CPU_VGACNTRL, VGA_DISP_DISABLE);
1205 1227
1206 /* Disable display plane */ 1228 /* Disable display plane */
1207 temp = I915_READ(dspcntr_reg); 1229 temp = I915_READ(dspcntr_reg);
@@ -1342,7 +1364,7 @@ static void i9xx_crtc_dpms(struct drm_crtc *crtc, int mode)
1342 //intel_crtc_dpms_video(crtc, FALSE); TODO 1364 //intel_crtc_dpms_video(crtc, FALSE); TODO
1343 1365
1344 /* Disable the VGA plane that we never use */ 1366 /* Disable the VGA plane that we never use */
1345 I915_WRITE(VGACNTRL, VGA_DISP_DISABLE); 1367 i915_disable_vga(dev);
1346 1368
1347 /* Disable display plane */ 1369 /* Disable display plane */
1348 temp = I915_READ(dspcntr_reg); 1370 temp = I915_READ(dspcntr_reg);