Merge branch 'for-rmk' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into devel-stable

Conflicts:
	arch/arm/Kconfig

6 files changed, 76 insertions, 9 deletions

diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig
index 29e01f6238a7..15a9702e2941 100644
--- a/drivers/i2c/busses/Kconfig
+++ b/drivers/i2c/busses/Kconfig
@@ -521,12 +521,19 @@ config I2C_PXA_SLAVE
           is necessary for systems where the PXA may be a target on the
           I2C bus.
 
+config HAVE_S3C2410_I2C
+        bool
+        help
+          This will include I2C support for Samsung SoCs. If you want to
+          include I2C support for any machine, kindly select this in the
+          respective Kconfig file.
+
 config I2C_S3C2410
         tristate "S3C2410 I2C Driver"
-        depends on ARCH_S3C2410 || ARCH_S3C64XX
+        depends on HAVE_S3C2410_I2C
         help
           Say Y here to include support for I2C controller in the
-          Samsung S3C2410 based System-on-Chip devices.
+          Samsung SoCs.
 
 config I2C_S6000
         tristate "S6000 I2C support"
diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig
index 4301a6c7ed3b..9238c8f40f03 100644
--- a/drivers/rtc/Kconfig
+++ b/drivers/rtc/Kconfig
@@ -645,9 +645,16 @@ config RTC_DRV_OMAP
           DA8xx/OMAP-L13x chips.  This driver can also be built as a
           module called rtc-omap.
 
+config HAVE_S3C_RTC
+        bool
+        help
+          This will include RTC support for Samsung SoCs. If
+          you want to include RTC support for any machine, kindly
+          select this in the respective mach-XXXX/Kconfig file.
+
 config RTC_DRV_S3C
         tristate "Samsung S3C series SoC RTC"
-        depends on ARCH_S3C2410 || ARCH_S3C64XX
+        depends on ARCH_S3C2410 || ARCH_S3C64XX || HAVE_S3C_RTC
         help
           RTC (Realtime Clock) driver for the clock inbuilt into the
           Samsung S3C24XX series of SoCs. This can provide periodic
diff --git a/drivers/rtc/rtc-s3c.c b/drivers/rtc/rtc-s3c.c
index 70b68d35f969..a0d3ec89d412 100644
--- a/drivers/rtc/rtc-s3c.c
+++ b/drivers/rtc/rtc-s3c.c
@@ -1,5 +1,8 @@
 /* drivers/rtc/rtc-s3c.c
  *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
  * Copyright (c) 2004,2006 Simtec Electronics
  *      Ben Dooks, <ben@simtec.co.uk>
  *      http://armlinux.simtec.co.uk/
@@ -39,6 +42,7 @@ enum s3c_cpu_type {
 
 static struct resource *s3c_rtc_mem;
 
+static struct clk *rtc_clk;
 static void __iomem *s3c_rtc_base;
 static int s3c_rtc_alarmno = NO_IRQ;
 static int s3c_rtc_tickno  = NO_IRQ;
@@ -53,6 +57,10 @@ static irqreturn_t s3c_rtc_alarmirq(int irq, void *id)
         struct rtc_device *rdev = id;
 
         rtc_update_irq(rdev, 1, RTC_AF | RTC_IRQF);
+
+        if (s3c_rtc_cpu_type == TYPE_S3C64XX)
+                writeb(S3C2410_INTP_ALM, s3c_rtc_base + S3C2410_INTP);
+
         return IRQ_HANDLED;
 }
 
@@ -61,6 +69,10 @@ static irqreturn_t s3c_rtc_tickirq(int irq, void *id)
         struct rtc_device *rdev = id;
 
         rtc_update_irq(rdev, 1, RTC_PF | RTC_IRQF);
+
+        if (s3c_rtc_cpu_type == TYPE_S3C64XX)
+                writeb(S3C2410_INTP_TIC, s3c_rtc_base + S3C2410_INTP);
+
         return IRQ_HANDLED;
 }
 
@@ -94,7 +106,7 @@ static int s3c_rtc_setpie(struct device *dev, int enabled)
                 if (enabled)
                         tmp |= S3C64XX_RTCCON_TICEN;
 
-                writeb(tmp, s3c_rtc_base + S3C2410_RTCCON);
+                writew(tmp, s3c_rtc_base + S3C2410_RTCCON);
         } else {
                 tmp = readb(s3c_rtc_base + S3C2410_TICNT);
                 tmp &= ~S3C2410_TICNT_ENABLE;
@@ -128,7 +140,7 @@ static int s3c_rtc_setfreq(struct device *dev, int freq)
 
         tmp |= (rtc_dev->max_user_freq / freq)-1;
 
-        writeb(tmp, s3c_rtc_base + S3C2410_TICNT);
+        writel(tmp, s3c_rtc_base + S3C2410_TICNT);
         spin_unlock_irq(&s3c_rtc_pie_lock);
 
         return 0;
@@ -431,6 +443,10 @@ static int __devexit s3c_rtc_remove(struct platform_device *dev)
         s3c_rtc_setpie(&dev->dev, 0);
         s3c_rtc_setaie(0);
 
+        clk_disable(rtc_clk);
+        clk_put(rtc_clk);
+        rtc_clk = NULL;
+
         iounmap(s3c_rtc_base);
         release_resource(s3c_rtc_mem);
         kfree(s3c_rtc_mem);
@@ -442,6 +458,7 @@ static int __devinit s3c_rtc_probe(struct platform_device *pdev)
 {
         struct rtc_device *rtc;
         struct resource *res;
+        unsigned int tmp, i;
         int ret;
 
         pr_debug("%s: probe=%p\n", __func__, pdev);
@@ -488,6 +505,16 @@ static int __devinit s3c_rtc_probe(struct platform_device *pdev)
                 goto err_nomap;
         }
 
+        rtc_clk = clk_get(&pdev->dev, "rtc");
+        if (IS_ERR(rtc_clk)) {
+                dev_err(&pdev->dev, "failed to find rtc clock source\n");
+                ret = PTR_ERR(rtc_clk);
+                rtc_clk = NULL;
+                goto err_clk;
+        }
+
+        clk_enable(rtc_clk);
+
         /* check to see if everything is setup correctly */
 
         s3c_rtc_enable(pdev, 1);
@@ -510,6 +537,15 @@ static int __devinit s3c_rtc_probe(struct platform_device *pdev)
 
         s3c_rtc_cpu_type = platform_get_device_id(pdev)->driver_data;
 
+        /* Check RTC Time */
+
+        for (i = S3C2410_RTCSEC; i <= S3C2410_RTCYEAR; i += 0x4) {
+                tmp = readb(s3c_rtc_base + i);
+
+                if ((tmp & 0xf) > 0x9 || ((tmp >> 4) & 0xf) > 0x9)
+                        writeb(0, s3c_rtc_base + i);
+        }
+
         if (s3c_rtc_cpu_type == TYPE_S3C64XX)
                 rtc->max_user_freq = 32768;
         else
@@ -523,6 +559,10 @@ static int __devinit s3c_rtc_probe(struct platform_device *pdev)
 
  err_nortc:
         s3c_rtc_enable(pdev, 0);
+        clk_disable(rtc_clk);
+        clk_put(rtc_clk);
+
+ err_clk:
         iounmap(s3c_rtc_base);
 
  err_nomap:
diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
index e437ce8c1748..8f23eb54f498 100644
--- a/drivers/serial/Kconfig
+++ b/drivers/serial/Kconfig
@@ -536,8 +536,8 @@ config SERIAL_S3C6400
 
 config SERIAL_S5PV210
         tristate "Samsung S5PV210 Serial port support"
-        depends on SERIAL_SAMSUNG && (CPU_S5PV210 || CPU_S5P6442)
-        select SERIAL_SAMSUNG_UARTS_4 if CPU_S5PV210
+        depends on SERIAL_SAMSUNG && (CPU_S5PV210 || CPU_S5P6442 || CPU_S5PV310)
+        select SERIAL_SAMSUNG_UARTS_4 if (CPU_S5PV210 || CPU_S5PV310)
         default y
         help
           Serial port support for Samsung's S5P Family of SoC's
diff --git a/drivers/serial/s5pv210.c b/drivers/serial/s5pv210.c
index 4a789e5361a4..6ebccd70a707 100644
--- a/drivers/serial/s5pv210.c
+++ b/drivers/serial/s5pv210.c
@@ -28,8 +28,12 @@
 static int s5pv210_serial_setsource(struct uart_port *port,
                                         struct s3c24xx_uart_clksrc *clk)
 {
+        struct s3c2410_uartcfg *cfg = port->dev->platform_data;
         unsigned long ucon = rd_regl(port, S3C2410_UCON);
 
+        if ((cfg->clocks_size) == 1)
+                return 0;
+
         if (strcmp(clk->name, "pclk") == 0)
                 ucon &= ~S5PV210_UCON_CLKMASK;
         else if (strcmp(clk->name, "uclk1") == 0)
@@ -47,10 +51,14 @@ static int s5pv210_serial_setsource(struct uart_port *port,
 static int s5pv210_serial_getsource(struct uart_port *port,
                                         struct s3c24xx_uart_clksrc *clk)
 {
+        struct s3c2410_uartcfg *cfg = port->dev->platform_data;
         u32 ucon = rd_regl(port, S3C2410_UCON);
 
         clk->divisor = 1;
 
+        if ((cfg->clocks_size) == 1)
+                return 0;
+
         switch (ucon & S5PV210_UCON_CLKMASK) {
         case S5PV210_UCON_PCLK:
                 clk->name = "pclk";
diff --git a/drivers/serial/samsung.c b/drivers/serial/samsung.c
index a9d6c5626a0a..b1156ba8ad14 100644
--- a/drivers/serial/samsung.c
+++ b/drivers/serial/samsung.c
@@ -705,8 +705,13 @@ static void s3c24xx_serial_set_termios(struct uart_port *port,
         if (ourport->info->has_divslot) {
                 unsigned int div = ourport->baudclk_rate / baud;
 
-                udivslot = udivslot_table[div & 15];
-                dbg("udivslot = %04x (div %d)\n", udivslot, div & 15);
+                if (cfg->has_fracval) {
+                        udivslot = (div & 15);
+                        dbg("fracval = %04x\n", udivslot);
+                } else {
+                        udivslot = udivslot_table[div & 15];
+                        dbg("udivslot = %04x (div %d)\n", udivslot, div & 15);
+                }
         }
 
         switch (termios->c_cflag & CSIZE) {