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authorLarry Finger <Larry.Finger@lwfinger.net>2011-02-19 17:29:57 -0500
committerJohn W. Linville <linville@tuxdriver.com>2011-02-21 15:39:59 -0500
commit17c9ac62812b58aacefc7336215aecbb522f6547 (patch)
tree3eca6290a695716678d7ff12f9a3093b566c5c93 /drivers
parent663dcc73675bd70ee11195ce832b1d1691f967d0 (diff)
rtlwifi: rtl8192ce: Fix endian warnings
Drivers rtlwifi, and rtl8192ce generate a large number of sparse warnings. This patch fixes most of them. Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net> Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/net/wireless/rtlwifi/base.c16
-rw-r--r--drivers/net/wireless/rtlwifi/core.c6
-rw-r--r--drivers/net/wireless/rtlwifi/pci.c29
-rw-r--r--drivers/net/wireless/rtlwifi/rtl8192ce/hw.c39
-rw-r--r--drivers/net/wireless/rtlwifi/rtl8192ce/reg.h1
-rw-r--r--drivers/net/wireless/rtlwifi/rtl8192ce/trx.c21
-rw-r--r--drivers/net/wireless/rtlwifi/rtl8192ce/trx.h462
-rw-r--r--drivers/net/wireless/rtlwifi/usb.c16
-rw-r--r--drivers/net/wireless/rtlwifi/usb.h2
-rw-r--r--drivers/net/wireless/rtlwifi/wifi.h12
10 files changed, 313 insertions, 291 deletions
diff --git a/drivers/net/wireless/rtlwifi/base.c b/drivers/net/wireless/rtlwifi/base.c
index 1d6cc1f3c6bf..3f40dc2b129c 100644
--- a/drivers/net/wireless/rtlwifi/base.c
+++ b/drivers/net/wireless/rtlwifi/base.c
@@ -144,7 +144,7 @@ static void _rtl_init_hw_ht_capab(struct ieee80211_hw *hw,
144 ht_cap->mcs.rx_mask[1] = 0xFF; 144 ht_cap->mcs.rx_mask[1] = 0xFF;
145 ht_cap->mcs.rx_mask[4] = 0x01; 145 ht_cap->mcs.rx_mask[4] = 0x01;
146 146
147 ht_cap->mcs.rx_highest = MAX_BIT_RATE_40MHZ_MCS15; 147 ht_cap->mcs.rx_highest = cpu_to_le16(MAX_BIT_RATE_40MHZ_MCS15);
148 } else if (get_rf_type(rtlphy) == RF_1T1R) { 148 } else if (get_rf_type(rtlphy) == RF_1T1R) {
149 149
150 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, ("1T1R\n")); 150 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, ("1T1R\n"));
@@ -153,7 +153,7 @@ static void _rtl_init_hw_ht_capab(struct ieee80211_hw *hw,
153 ht_cap->mcs.rx_mask[1] = 0x00; 153 ht_cap->mcs.rx_mask[1] = 0x00;
154 ht_cap->mcs.rx_mask[4] = 0x01; 154 ht_cap->mcs.rx_mask[4] = 0x01;
155 155
156 ht_cap->mcs.rx_highest = MAX_BIT_RATE_40MHZ_MCS7; 156 ht_cap->mcs.rx_highest = cpu_to_le16(MAX_BIT_RATE_40MHZ_MCS7);
157 } 157 }
158} 158}
159 159
@@ -498,7 +498,7 @@ void rtl_get_tcb_desc(struct ieee80211_hw *hw,
498 struct rtl_mac *rtlmac = rtl_mac(rtl_priv(hw)); 498 struct rtl_mac *rtlmac = rtl_mac(rtl_priv(hw));
499 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)(skb->data); 499 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)(skb->data);
500 struct ieee80211_rate *txrate; 500 struct ieee80211_rate *txrate;
501 u16 fc = le16_to_cpu(hdr->frame_control); 501 __le16 fc = hdr->frame_control;
502 502
503 memset(tcb_desc, 0, sizeof(struct rtl_tcb_desc)); 503 memset(tcb_desc, 0, sizeof(struct rtl_tcb_desc));
504 504
@@ -570,7 +570,7 @@ bool rtl_tx_mgmt_proc(struct ieee80211_hw *hw, struct sk_buff *skb)
570 struct rtl_mac *mac = rtl_mac(rtl_priv(hw)); 570 struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
571 struct rtl_priv *rtlpriv = rtl_priv(hw); 571 struct rtl_priv *rtlpriv = rtl_priv(hw);
572 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)(skb->data); 572 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)(skb->data);
573 u16 fc = le16_to_cpu(hdr->frame_control); 573 __le16 fc = hdr->frame_control;
574 574
575 if (ieee80211_is_auth(fc)) { 575 if (ieee80211_is_auth(fc)) {
576 RT_TRACE(rtlpriv, COMP_SEND, DBG_DMESG, ("MAC80211_LINKING\n")); 576 RT_TRACE(rtlpriv, COMP_SEND, DBG_DMESG, ("MAC80211_LINKING\n"));
@@ -587,7 +587,7 @@ bool rtl_action_proc(struct ieee80211_hw *hw, struct sk_buff *skb, u8 is_tx)
587 struct rtl_mac *mac = rtl_mac(rtl_priv(hw)); 587 struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
588 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)(skb->data); 588 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)(skb->data);
589 struct rtl_priv *rtlpriv = rtl_priv(hw); 589 struct rtl_priv *rtlpriv = rtl_priv(hw);
590 u16 fc = le16_to_cpu(hdr->frame_control); 590 __le16 fc = hdr->frame_control;
591 u8 *act = (u8 *) (((u8 *) skb->data + MAC80211_3ADDR_LEN)); 591 u8 *act = (u8 *) (((u8 *) skb->data + MAC80211_3ADDR_LEN));
592 u8 category; 592 u8 category;
593 593
@@ -632,7 +632,7 @@ u8 rtl_is_special_data(struct ieee80211_hw *hw, struct sk_buff *skb, u8 is_tx)
632 struct rtl_priv *rtlpriv = rtl_priv(hw); 632 struct rtl_priv *rtlpriv = rtl_priv(hw);
633 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)(skb->data); 633 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)(skb->data);
634 struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw)); 634 struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
635 u16 fc = le16_to_cpu(hdr->frame_control); 635 __le16 fc = hdr->frame_control;
636 u16 ether_type; 636 u16 ether_type;
637 u8 mac_hdr_len = ieee80211_get_hdrlen_from_skb(skb); 637 u8 mac_hdr_len = ieee80211_get_hdrlen_from_skb(skb);
638 const struct iphdr *ip; 638 const struct iphdr *ip;
@@ -646,7 +646,6 @@ u8 rtl_is_special_data(struct ieee80211_hw *hw, struct sk_buff *skb, u8 is_tx)
646 ip = (struct iphdr *)((u8 *) skb->data + mac_hdr_len + 646 ip = (struct iphdr *)((u8 *) skb->data + mac_hdr_len +
647 SNAP_SIZE + PROTOC_TYPE_SIZE); 647 SNAP_SIZE + PROTOC_TYPE_SIZE);
648 ether_type = *(u16 *) ((u8 *) skb->data + mac_hdr_len + SNAP_SIZE); 648 ether_type = *(u16 *) ((u8 *) skb->data + mac_hdr_len + SNAP_SIZE);
649 ether_type = ntohs(ether_type);
650 649
651 if (ETH_P_IP == ether_type) { 650 if (ETH_P_IP == ether_type) {
652 if (IPPROTO_UDP == ip->protocol) { 651 if (IPPROTO_UDP == ip->protocol) {
@@ -690,7 +689,8 @@ u8 rtl_is_special_data(struct ieee80211_hw *hw, struct sk_buff *skb, u8 is_tx)
690 } 689 }
691 690
692 return true; 691 return true;
693 } else if (0x86DD == ether_type) { 692 } else if (ETH_P_IPV6 == ether_type) {
693 /* IPv6 */
694 return true; 694 return true;
695 } 695 }
696 696
diff --git a/drivers/net/wireless/rtlwifi/core.c b/drivers/net/wireless/rtlwifi/core.c
index 2d1e3e833568..b0996bf8a214 100644
--- a/drivers/net/wireless/rtlwifi/core.c
+++ b/drivers/net/wireless/rtlwifi/core.c
@@ -434,9 +434,9 @@ static int rtl_op_conf_tx(struct ieee80211_hw *hw, u16 queue,
434 434
435 aci = _rtl_get_hal_qnum(queue); 435 aci = _rtl_get_hal_qnum(queue);
436 mac->ac[aci].aifs = param->aifs; 436 mac->ac[aci].aifs = param->aifs;
437 mac->ac[aci].cw_min = param->cw_min; 437 mac->ac[aci].cw_min = cpu_to_le16(param->cw_min);
438 mac->ac[aci].cw_max = param->cw_max; 438 mac->ac[aci].cw_max = cpu_to_le16(param->cw_max);
439 mac->ac[aci].tx_op = param->txop; 439 mac->ac[aci].tx_op = cpu_to_le16(param->txop);
440 memcpy(&mac->edca_param[aci], param, sizeof(*param)); 440 memcpy(&mac->edca_param[aci], param, sizeof(*param));
441 rtlpriv->cfg->ops->set_qos(hw, aci); 441 rtlpriv->cfg->ops->set_qos(hw, aci);
442 return 0; 442 return 0;
diff --git a/drivers/net/wireless/rtlwifi/pci.c b/drivers/net/wireless/rtlwifi/pci.c
index 2da164380771..1f18bf7df741 100644
--- a/drivers/net/wireless/rtlwifi/pci.c
+++ b/drivers/net/wireless/rtlwifi/pci.c
@@ -476,9 +476,9 @@ static void _rtl_pci_tx_isr(struct ieee80211_hw *hw, int prio)
476 476
477 skb = __skb_dequeue(&ring->queue); 477 skb = __skb_dequeue(&ring->queue);
478 pci_unmap_single(rtlpci->pdev, 478 pci_unmap_single(rtlpci->pdev,
479 le32_to_cpu(rtlpriv->cfg->ops-> 479 rtlpriv->cfg->ops->
480 get_desc((u8 *) entry, true, 480 get_desc((u8 *) entry, true,
481 HW_DESC_TXBUFF_ADDR)), 481 HW_DESC_TXBUFF_ADDR),
482 skb->len, PCI_DMA_TODEVICE); 482 skb->len, PCI_DMA_TODEVICE);
483 483
484 RT_TRACE(rtlpriv, (COMP_INTR | COMP_SEND), DBG_TRACE, 484 RT_TRACE(rtlpriv, (COMP_INTR | COMP_SEND), DBG_TRACE,
@@ -557,7 +557,7 @@ static void _rtl_pci_rx_interrupt(struct ieee80211_hw *hw)
557 return; 557 return;
558 } else { 558 } else {
559 struct ieee80211_hdr *hdr; 559 struct ieee80211_hdr *hdr;
560 u16 fc; 560 __le16 fc;
561 struct sk_buff *new_skb = NULL; 561 struct sk_buff *new_skb = NULL;
562 562
563 rtlpriv->cfg->ops->query_rx_desc(hw, &stats, 563 rtlpriv->cfg->ops->query_rx_desc(hw, &stats,
@@ -583,7 +583,7 @@ static void _rtl_pci_rx_interrupt(struct ieee80211_hw *hw)
583 */ 583 */
584 584
585 hdr = (struct ieee80211_hdr *)(skb->data); 585 hdr = (struct ieee80211_hdr *)(skb->data);
586 fc = le16_to_cpu(hdr->frame_control); 586 fc = hdr->frame_control;
587 587
588 if (!stats.crc) { 588 if (!stats.crc) {
589 memcpy(IEEE80211_SKB_RXCB(skb), &rx_status, 589 memcpy(IEEE80211_SKB_RXCB(skb), &rx_status,
@@ -666,7 +666,7 @@ static void _rtl_pci_rx_interrupt(struct ieee80211_hw *hw)
666 666
667 } 667 }
668done: 668done:
669 bufferaddress = cpu_to_le32(*((dma_addr_t *) skb->cb)); 669 bufferaddress = (u32)(*((dma_addr_t *) skb->cb));
670 tmp_one = 1; 670 tmp_one = 1;
671 rtlpriv->cfg->ops->set_desc((u8 *) pdesc, false, 671 rtlpriv->cfg->ops->set_desc((u8 *) pdesc, false,
672 HW_DESC_RXBUFF_ADDR, 672 HW_DESC_RXBUFF_ADDR,
@@ -955,9 +955,8 @@ static int _rtl_pci_init_tx_ring(struct ieee80211_hw *hw,
955 ("queue:%d, ring_addr:%p\n", prio, ring)); 955 ("queue:%d, ring_addr:%p\n", prio, ring));
956 956
957 for (i = 0; i < entries; i++) { 957 for (i = 0; i < entries; i++) {
958 nextdescaddress = cpu_to_le32((u32) dma + 958 nextdescaddress = (u32) dma + ((i + 1) % entries) *
959 ((i + 1) % entries) * 959 sizeof(*ring);
960 sizeof(*ring));
961 960
962 rtlpriv->cfg->ops->set_desc((u8 *)&(ring[i]), 961 rtlpriv->cfg->ops->set_desc((u8 *)&(ring[i]),
963 true, HW_DESC_TX_NEXTDESC_ADDR, 962 true, HW_DESC_TX_NEXTDESC_ADDR,
@@ -1021,7 +1020,7 @@ static int _rtl_pci_init_rx_ring(struct ieee80211_hw *hw)
1021 rtlpci->rxbuffersize, 1020 rtlpci->rxbuffersize,
1022 PCI_DMA_FROMDEVICE); 1021 PCI_DMA_FROMDEVICE);
1023 1022
1024 bufferaddress = cpu_to_le32(*((dma_addr_t *)skb->cb)); 1023 bufferaddress = (u32)(*((dma_addr_t *)skb->cb));
1025 rtlpriv->cfg->ops->set_desc((u8 *)entry, false, 1024 rtlpriv->cfg->ops->set_desc((u8 *)entry, false,
1026 HW_DESC_RXBUFF_ADDR, 1025 HW_DESC_RXBUFF_ADDR,
1027 (u8 *)&bufferaddress); 1026 (u8 *)&bufferaddress);
@@ -1052,9 +1051,9 @@ static void _rtl_pci_free_tx_ring(struct ieee80211_hw *hw,
1052 struct sk_buff *skb = __skb_dequeue(&ring->queue); 1051 struct sk_buff *skb = __skb_dequeue(&ring->queue);
1053 1052
1054 pci_unmap_single(rtlpci->pdev, 1053 pci_unmap_single(rtlpci->pdev,
1055 le32_to_cpu(rtlpriv->cfg-> 1054 rtlpriv->cfg->
1056 ops->get_desc((u8 *) entry, true, 1055 ops->get_desc((u8 *) entry, true,
1057 HW_DESC_TXBUFF_ADDR)), 1056 HW_DESC_TXBUFF_ADDR),
1058 skb->len, PCI_DMA_TODEVICE); 1057 skb->len, PCI_DMA_TODEVICE);
1059 kfree_skb(skb); 1058 kfree_skb(skb);
1060 ring->idx = (ring->idx + 1) % ring->entries; 1059 ring->idx = (ring->idx + 1) % ring->entries;
@@ -1186,11 +1185,11 @@ int rtl_pci_reset_trx_ring(struct ieee80211_hw *hw)
1186 __skb_dequeue(&ring->queue); 1185 __skb_dequeue(&ring->queue);
1187 1186
1188 pci_unmap_single(rtlpci->pdev, 1187 pci_unmap_single(rtlpci->pdev,
1189 le32_to_cpu(rtlpriv->cfg->ops-> 1188 rtlpriv->cfg->ops->
1190 get_desc((u8 *) 1189 get_desc((u8 *)
1191 entry, 1190 entry,
1192 true, 1191 true,
1193 HW_DESC_TXBUFF_ADDR)), 1192 HW_DESC_TXBUFF_ADDR),
1194 skb->len, PCI_DMA_TODEVICE); 1193 skb->len, PCI_DMA_TODEVICE);
1195 kfree_skb(skb); 1194 kfree_skb(skb);
1196 ring->idx = (ring->idx + 1) % ring->entries; 1195 ring->idx = (ring->idx + 1) % ring->entries;
@@ -1204,7 +1203,7 @@ int rtl_pci_reset_trx_ring(struct ieee80211_hw *hw)
1204 return 0; 1203 return 0;
1205} 1204}
1206 1205
1207static unsigned int _rtl_mac_to_hwqueue(u16 fc, 1206static unsigned int _rtl_mac_to_hwqueue(__le16 fc,
1208 unsigned int mac80211_queue_index) 1207 unsigned int mac80211_queue_index)
1209{ 1208{
1210 unsigned int hw_queue_index; 1209 unsigned int hw_queue_index;
@@ -1254,7 +1253,7 @@ static int rtl_pci_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
1254 unsigned int queue_index, hw_queue; 1253 unsigned int queue_index, hw_queue;
1255 unsigned long flags; 1254 unsigned long flags;
1256 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)(skb->data); 1255 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)(skb->data);
1257 u16 fc = le16_to_cpu(hdr->frame_control); 1256 __le16 fc = hdr->frame_control;
1258 u8 *pda_addr = hdr->addr1; 1257 u8 *pda_addr = hdr->addr1;
1259 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw)); 1258 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1260 /*ssn */ 1259 /*ssn */
diff --git a/drivers/net/wireless/rtlwifi/rtl8192ce/hw.c b/drivers/net/wireless/rtlwifi/rtl8192ce/hw.c
index 7a1bfa92375f..0b910921e606 100644
--- a/drivers/net/wireless/rtlwifi/rtl8192ce/hw.c
+++ b/drivers/net/wireless/rtlwifi/rtl8192ce/hw.c
@@ -318,15 +318,17 @@ void rtl92ce_set_hw_reg(struct ieee80211_hw *hw, u8 variable, u8 *val)
318 } 318 }
319 case HW_VAR_AC_PARAM:{ 319 case HW_VAR_AC_PARAM:{
320 u8 e_aci = *((u8 *) val); 320 u8 e_aci = *((u8 *) val);
321 u32 u4b_ac_param = 0; 321 u32 u4b_ac_param;
322 u16 cw_min = le16_to_cpu(mac->ac[e_aci].cw_min);
323 u16 cw_max = le16_to_cpu(mac->ac[e_aci].cw_max);
324 u16 tx_op = le16_to_cpu(mac->ac[e_aci].tx_op);
322 325
323 u4b_ac_param |= (u32) mac->ac[e_aci].aifs; 326 u4b_ac_param = (u32) mac->ac[e_aci].aifs;
324 u4b_ac_param |= ((u32) mac->ac[e_aci].cw_min 327 u4b_ac_param |= ((u32)cw_min
325 & 0xF) << AC_PARAM_ECW_MIN_OFFSET; 328 & 0xF) << AC_PARAM_ECW_MIN_OFFSET;
326 u4b_ac_param |= ((u32) mac->ac[e_aci].cw_max & 329 u4b_ac_param |= ((u32)cw_max &
327 0xF) << AC_PARAM_ECW_MAX_OFFSET; 330 0xF) << AC_PARAM_ECW_MAX_OFFSET;
328 u4b_ac_param |= (u32) mac->ac[e_aci].tx_op 331 u4b_ac_param |= (u32)tx_op << AC_PARAM_TXOP_OFFSET;
329 << AC_PARAM_TXOP_LIMIT_OFFSET;
330 332
331 RT_TRACE(rtlpriv, COMP_MLME, DBG_LOUD, 333 RT_TRACE(rtlpriv, COMP_MLME, DBG_LOUD,
332 ("queue:%x, ac_param:%x\n", e_aci, 334 ("queue:%x, ac_param:%x\n", e_aci,
@@ -1170,21 +1172,20 @@ void rtl92ce_set_qos(struct ieee80211_hw *hw, int aci)
1170{ 1172{
1171 struct rtl_priv *rtlpriv = rtl_priv(hw); 1173 struct rtl_priv *rtlpriv = rtl_priv(hw);
1172 struct rtl_mac *mac = rtl_mac(rtl_priv(hw)); 1174 struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
1173
1174 u32 u4b_ac_param; 1175 u32 u4b_ac_param;
1176 u16 cw_min = le16_to_cpu(mac->ac[aci].cw_min);
1177 u16 cw_max = le16_to_cpu(mac->ac[aci].cw_max);
1178 u16 tx_op = le16_to_cpu(mac->ac[aci].tx_op);
1175 1179
1176 rtl92c_dm_init_edca_turbo(hw); 1180 rtl92c_dm_init_edca_turbo(hw);
1177
1178 u4b_ac_param = (u32) mac->ac[aci].aifs; 1181 u4b_ac_param = (u32) mac->ac[aci].aifs;
1179 u4b_ac_param |= 1182 u4b_ac_param |= (u32) ((cw_min & 0xF) << AC_PARAM_ECW_MIN_OFFSET);
1180 ((u32) mac->ac[aci].cw_min & 0xF) << AC_PARAM_ECW_MIN_OFFSET; 1183 u4b_ac_param |= (u32) ((cw_max & 0xF) << AC_PARAM_ECW_MAX_OFFSET);
1181 u4b_ac_param |= 1184 u4b_ac_param |= (u32) (tx_op << AC_PARAM_TXOP_OFFSET);
1182 ((u32) mac->ac[aci].cw_max & 0xF) << AC_PARAM_ECW_MAX_OFFSET;
1183 u4b_ac_param |= (u32) mac->ac[aci].tx_op << AC_PARAM_TXOP_LIMIT_OFFSET;
1184 RT_TRACE(rtlpriv, COMP_QOS, DBG_DMESG, 1185 RT_TRACE(rtlpriv, COMP_QOS, DBG_DMESG,
1185 ("queue:%x, ac_param:%x aifs:%x cwmin:%x cwmax:%x txop:%x\n", 1186 ("queue:%x, ac_param:%x aifs:%x cwmin:%x cwmax:%x txop:%x\n",
1186 aci, u4b_ac_param, mac->ac[aci].aifs, mac->ac[aci].cw_min, 1187 aci, u4b_ac_param, mac->ac[aci].aifs, cw_min,
1187 mac->ac[aci].cw_max, mac->ac[aci].tx_op)); 1188 cw_max, tx_op));
1188 switch (aci) { 1189 switch (aci) {
1189 case AC1_BK: 1190 case AC1_BK:
1190 rtl_write_dword(rtlpriv, REG_EDCA_BK_PARAM, u4b_ac_param); 1191 rtl_write_dword(rtlpriv, REG_EDCA_BK_PARAM, u4b_ac_param);
@@ -1712,7 +1713,7 @@ void rtl92ce_update_hal_rate_table(struct ieee80211_hw *hw)
1712 struct rtl_mac *mac = rtl_mac(rtl_priv(hw)); 1713 struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
1713 1714
1714 u32 ratr_value = (u32) mac->basic_rates; 1715 u32 ratr_value = (u32) mac->basic_rates;
1715 u8 *p_mcsrate = mac->mcs; 1716 u8 *mcsrate = mac->mcs;
1716 u8 ratr_index = 0; 1717 u8 ratr_index = 0;
1717 u8 nmode = mac->ht_enable; 1718 u8 nmode = mac->ht_enable;
1718 u8 mimo_ps = 1; 1719 u8 mimo_ps = 1;
@@ -1723,7 +1724,7 @@ void rtl92ce_update_hal_rate_table(struct ieee80211_hw *hw)
1723 u8 curshortgi_20mhz = mac->sgi_20; 1724 u8 curshortgi_20mhz = mac->sgi_20;
1724 enum wireless_mode wirelessmode = mac->mode; 1725 enum wireless_mode wirelessmode = mac->mode;
1725 1726
1726 ratr_value |= EF2BYTE((*(u16 *) (p_mcsrate))) << 12; 1727 ratr_value |= ((*(u16 *) (mcsrate))) << 12;
1727 1728
1728 switch (wirelessmode) { 1729 switch (wirelessmode) {
1729 case WIRELESS_MODE_B: 1730 case WIRELESS_MODE_B:
@@ -1892,8 +1893,8 @@ void rtl92ce_update_hal_rate_mask(struct ieee80211_hw *hw, u8 rssi_level)
1892 } 1893 }
1893 RT_TRACE(rtlpriv, COMP_RATR, DBG_DMESG, 1894 RT_TRACE(rtlpriv, COMP_RATR, DBG_DMESG,
1894 ("ratr_bitmap :%x\n", ratr_bitmap)); 1895 ("ratr_bitmap :%x\n", ratr_bitmap));
1895 *(u32 *)&rate_mask = EF4BYTE((ratr_bitmap & 0x0fffffff) | 1896 *(u32 *)&rate_mask = (ratr_bitmap & 0x0fffffff) |
1896 (ratr_index << 28)); 1897 (ratr_index << 28);
1897 rate_mask[4] = macid | (shortgi ? 0x20 : 0x00) | 0x80; 1898 rate_mask[4] = macid | (shortgi ? 0x20 : 0x00) | 0x80;
1898 RT_TRACE(rtlpriv, COMP_RATR, DBG_DMESG, ("Rate_index:%x, " 1899 RT_TRACE(rtlpriv, COMP_RATR, DBG_DMESG, ("Rate_index:%x, "
1899 "ratr_val:%x, %x:%x:%x:%x:%x\n", 1900 "ratr_val:%x, %x:%x:%x:%x:%x\n",
diff --git a/drivers/net/wireless/rtlwifi/rtl8192ce/reg.h b/drivers/net/wireless/rtlwifi/rtl8192ce/reg.h
index 3df22bd9480d..b0868a613841 100644
--- a/drivers/net/wireless/rtlwifi/rtl8192ce/reg.h
+++ b/drivers/net/wireless/rtlwifi/rtl8192ce/reg.h
@@ -1076,7 +1076,6 @@
1076#define _RARF_RC7(x) (((x) & 0x1F) << 16) 1076#define _RARF_RC7(x) (((x) & 0x1F) << 16)
1077#define _RARF_RC8(x) (((x) & 0x1F) << 24) 1077#define _RARF_RC8(x) (((x) & 0x1F) << 24)
1078 1078
1079#define AC_PARAM_TXOP_LIMIT_OFFSET 16
1080#define AC_PARAM_TXOP_OFFSET 16 1079#define AC_PARAM_TXOP_OFFSET 16
1081#define AC_PARAM_ECW_MAX_OFFSET 12 1080#define AC_PARAM_ECW_MAX_OFFSET 12
1082#define AC_PARAM_ECW_MIN_OFFSET 8 1081#define AC_PARAM_ECW_MIN_OFFSET 8
diff --git a/drivers/net/wireless/rtlwifi/rtl8192ce/trx.c b/drivers/net/wireless/rtlwifi/rtl8192ce/trx.c
index 58d7d36924e8..01b95427fee0 100644
--- a/drivers/net/wireless/rtlwifi/rtl8192ce/trx.c
+++ b/drivers/net/wireless/rtlwifi/rtl8192ce/trx.c
@@ -36,7 +36,7 @@
36#include "trx.h" 36#include "trx.h"
37#include "led.h" 37#include "led.h"
38 38
39static enum rtl_desc_qsel _rtl92ce_map_hwqueue_to_fwqueue(u16 fc, 39static enum rtl_desc_qsel _rtl92ce_map_hwqueue_to_fwqueue(__le16 fc,
40 unsigned int 40 unsigned int
41 skb_queue) 41 skb_queue)
42{ 42{
@@ -617,13 +617,15 @@ static void _rtl92ce_translate_rx_signal_stuff(struct ieee80211_hw *hw,
617 u8 *tmp_buf; 617 u8 *tmp_buf;
618 u8 *praddr; 618 u8 *praddr;
619 u8 *psaddr; 619 u8 *psaddr;
620 u16 fc, type; 620 __le16 fc;
621 u16 type, c_fc;
621 bool packet_matchbssid, packet_toself, packet_beacon; 622 bool packet_matchbssid, packet_toself, packet_beacon;
622 623
623 tmp_buf = skb->data + pstats->rx_drvinfo_size + pstats->rx_bufshift; 624 tmp_buf = skb->data + pstats->rx_drvinfo_size + pstats->rx_bufshift;
624 625
625 hdr = (struct ieee80211_hdr *)tmp_buf; 626 hdr = (struct ieee80211_hdr *)tmp_buf;
626 fc = le16_to_cpu(hdr->frame_control); 627 fc = hdr->frame_control;
628 c_fc = le16_to_cpu(fc);
627 type = WLAN_FC_GET_TYPE(fc); 629 type = WLAN_FC_GET_TYPE(fc);
628 praddr = hdr->addr1; 630 praddr = hdr->addr1;
629 psaddr = hdr->addr2; 631 psaddr = hdr->addr2;
@@ -631,8 +633,8 @@ static void _rtl92ce_translate_rx_signal_stuff(struct ieee80211_hw *hw,
631 packet_matchbssid = 633 packet_matchbssid =
632 ((IEEE80211_FTYPE_CTL != type) && 634 ((IEEE80211_FTYPE_CTL != type) &&
633 (!compare_ether_addr(mac->bssid, 635 (!compare_ether_addr(mac->bssid,
634 (fc & IEEE80211_FCTL_TODS) ? 636 (c_fc & IEEE80211_FCTL_TODS) ?
635 hdr->addr1 : (fc & IEEE80211_FCTL_FROMDS) ? 637 hdr->addr1 : (c_fc & IEEE80211_FCTL_FROMDS) ?
636 hdr->addr2 : hdr->addr3)) && 638 hdr->addr2 : hdr->addr3)) &&
637 (!pstats->hwerror) && (!pstats->crc) && (!pstats->icv)); 639 (!pstats->hwerror) && (!pstats->crc) && (!pstats->icv));
638 640
@@ -728,20 +730,17 @@ void rtl92ce_tx_fill_desc(struct ieee80211_hw *hw,
728 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw)); 730 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
729 struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw)); 731 struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
730 bool defaultadapter = true; 732 bool defaultadapter = true;
731
732 struct ieee80211_sta *sta = ieee80211_find_sta(mac->vif, mac->bssid); 733 struct ieee80211_sta *sta = ieee80211_find_sta(mac->vif, mac->bssid);
733
734 u8 *pdesc = (u8 *) pdesc_tx; 734 u8 *pdesc = (u8 *) pdesc_tx;
735 struct rtl_tcb_desc tcb_desc; 735 struct rtl_tcb_desc tcb_desc;
736 u8 *qc = ieee80211_get_qos_ctl(hdr); 736 u8 *qc = ieee80211_get_qos_ctl(hdr);
737 u8 tid = qc[0] & IEEE80211_QOS_CTL_TID_MASK; 737 u8 tid = qc[0] & IEEE80211_QOS_CTL_TID_MASK;
738 u16 seq_number; 738 u16 seq_number;
739 u16 fc = le16_to_cpu(hdr->frame_control); 739 __le16 fc = hdr->frame_control;
740 u8 rate_flag = info->control.rates[0].flags; 740 u8 rate_flag = info->control.rates[0].flags;
741 741
742 enum rtl_desc_qsel fw_qsel = 742 enum rtl_desc_qsel fw_qsel =
743 _rtl92ce_map_hwqueue_to_fwqueue(le16_to_cpu(hdr->frame_control), 743 _rtl92ce_map_hwqueue_to_fwqueue(fc, queue_index);
744 queue_index);
745 744
746 bool firstseg = ((hdr->seq_ctrl & 745 bool firstseg = ((hdr->seq_ctrl &
747 cpu_to_le16(IEEE80211_SCTL_FRAG)) == 0); 746 cpu_to_le16(IEEE80211_SCTL_FRAG)) == 0);
@@ -901,7 +900,7 @@ void rtl92ce_tx_fill_cmddesc(struct ieee80211_hw *hw,
901 PCI_DMA_TODEVICE); 900 PCI_DMA_TODEVICE);
902 901
903 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)(skb->data); 902 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)(skb->data);
904 u16 fc = le16_to_cpu(hdr->frame_control); 903 __le16 fc = hdr->frame_control;
905 904
906 CLEAR_PCI_TX_DESC_CONTENT(pdesc, TX_DESC_SIZE); 905 CLEAR_PCI_TX_DESC_CONTENT(pdesc, TX_DESC_SIZE);
907 906
diff --git a/drivers/net/wireless/rtlwifi/rtl8192ce/trx.h b/drivers/net/wireless/rtlwifi/rtl8192ce/trx.h
index a5fcdfb69cda..803adcc80c96 100644
--- a/drivers/net/wireless/rtlwifi/rtl8192ce/trx.h
+++ b/drivers/net/wireless/rtlwifi/rtl8192ce/trx.h
@@ -40,470 +40,494 @@
40#define USB_HWDESC_HEADER_LEN 32 40#define USB_HWDESC_HEADER_LEN 32
41#define CRCLENGTH 4 41#define CRCLENGTH 4
42 42
43/* Define a macro that takes a le32 word, converts it to host ordering,
44 * right shifts by a specified count, creates a mask of the specified
45 * bit count, and extracts that number of bits.
46 */
47
48#define SHIFT_AND_MASK_LE(__pdesc, __shift, __mask) \
49 ((le32_to_cpu(*(((__le32 *)(__pdesc)))) >> (__shift)) & \
50 BIT_LEN_MASK_32(__mask))
51
52/* Define a macro that clears a bit field in an le32 word and
53 * sets the specified value into that bit field. The resulting
54 * value remains in le32 ordering; however, it is properly converted
55 * to host ordering for the clear and set operations before conversion
56 * back to le32.
57 */
58
59#define SET_BITS_OFFSET_LE(__pdesc, __shift, __len, __val) \
60 (*(__le32 *)(__pdesc) = \
61 (cpu_to_le32((le32_to_cpu(*((__le32 *)(__pdesc))) & \
62 (~(BIT_OFFSET_LEN_MASK_32((__shift), __len)))) | \
63 (((u32)(__val) & BIT_LEN_MASK_32(__len)) << (__shift)))));
64
65/* macros to read/write various fields in RX or TX descriptors */
66
43#define SET_TX_DESC_PKT_SIZE(__pdesc, __val) \ 67#define SET_TX_DESC_PKT_SIZE(__pdesc, __val) \
44 SET_BITS_TO_LE_4BYTE(__pdesc, 0, 16, __val) 68 SET_BITS_OFFSET_LE(__pdesc, 0, 16, __val)
45#define SET_TX_DESC_OFFSET(__pdesc, __val) \ 69#define SET_TX_DESC_OFFSET(__pdesc, __val) \
46 SET_BITS_TO_LE_4BYTE(__pdesc, 16, 8, __val) 70 SET_BITS_OFFSET_LE(__pdesc, 16, 8, __val)
47#define SET_TX_DESC_BMC(__pdesc, __val) \ 71#define SET_TX_DESC_BMC(__pdesc, __val) \
48 SET_BITS_TO_LE_4BYTE(__pdesc, 24, 1, __val) 72 SET_BITS_OFFSET_LE(__pdesc, 24, 1, __val)
49#define SET_TX_DESC_HTC(__pdesc, __val) \ 73#define SET_TX_DESC_HTC(__pdesc, __val) \
50 SET_BITS_TO_LE_4BYTE(__pdesc, 25, 1, __val) 74 SET_BITS_OFFSET_LE(__pdesc, 25, 1, __val)
51#define SET_TX_DESC_LAST_SEG(__pdesc, __val) \ 75#define SET_TX_DESC_LAST_SEG(__pdesc, __val) \
52 SET_BITS_TO_LE_4BYTE(__pdesc, 26, 1, __val) 76 SET_BITS_OFFSET_LE(__pdesc, 26, 1, __val)
53#define SET_TX_DESC_FIRST_SEG(__pdesc, __val) \ 77#define SET_TX_DESC_FIRST_SEG(__pdesc, __val) \
54 SET_BITS_TO_LE_4BYTE(__pdesc, 27, 1, __val) 78 SET_BITS_OFFSET_LE(__pdesc, 27, 1, __val)
55#define SET_TX_DESC_LINIP(__pdesc, __val) \ 79#define SET_TX_DESC_LINIP(__pdesc, __val) \
56 SET_BITS_TO_LE_4BYTE(__pdesc, 28, 1, __val) 80 SET_BITS_OFFSET_LE(__pdesc, 28, 1, __val)
57#define SET_TX_DESC_NO_ACM(__pdesc, __val) \ 81#define SET_TX_DESC_NO_ACM(__pdesc, __val) \
58 SET_BITS_TO_LE_4BYTE(__pdesc, 29, 1, __val) 82 SET_BITS_OFFSET_LE(__pdesc, 29, 1, __val)
59#define SET_TX_DESC_GF(__pdesc, __val) \ 83#define SET_TX_DESC_GF(__pdesc, __val) \
60 SET_BITS_TO_LE_4BYTE(__pdesc, 30, 1, __val) 84 SET_BITS_OFFSET_LE(__pdesc, 30, 1, __val)
61#define SET_TX_DESC_OWN(__pdesc, __val) \ 85#define SET_TX_DESC_OWN(__pdesc, __val) \
62 SET_BITS_TO_LE_4BYTE(__pdesc, 31, 1, __val) 86 SET_BITS_OFFSET_LE(__pdesc, 31, 1, __val)
63 87
64#define GET_TX_DESC_PKT_SIZE(__pdesc) \ 88#define GET_TX_DESC_PKT_SIZE(__pdesc) \
65 LE_BITS_TO_4BYTE(__pdesc, 0, 16) 89 SHIFT_AND_MASK_LE(__pdesc, 0, 16)
66#define GET_TX_DESC_OFFSET(__pdesc) \ 90#define GET_TX_DESC_OFFSET(__pdesc) \
67 LE_BITS_TO_4BYTE(__pdesc, 16, 8) 91 SHIFT_AND_MASK_LE(__pdesc, 16, 8)
68#define GET_TX_DESC_BMC(__pdesc) \ 92#define GET_TX_DESC_BMC(__pdesc) \
69 LE_BITS_TO_4BYTE(__pdesc, 24, 1) 93 SHIFT_AND_MASK_LE(__pdesc, 24, 1)
70#define GET_TX_DESC_HTC(__pdesc) \ 94#define GET_TX_DESC_HTC(__pdesc) \
71 LE_BITS_TO_4BYTE(__pdesc, 25, 1) 95 SHIFT_AND_MASK_LE(__pdesc, 25, 1)
72#define GET_TX_DESC_LAST_SEG(__pdesc) \ 96#define GET_TX_DESC_LAST_SEG(__pdesc) \
73 LE_BITS_TO_4BYTE(__pdesc, 26, 1) 97 SHIFT_AND_MASK_LE(__pdesc, 26, 1)
74#define GET_TX_DESC_FIRST_SEG(__pdesc) \ 98#define GET_TX_DESC_FIRST_SEG(__pdesc) \
75 LE_BITS_TO_4BYTE(__pdesc, 27, 1) 99 SHIFT_AND_MASK_LE(__pdesc, 27, 1)
76#define GET_TX_DESC_LINIP(__pdesc) \ 100#define GET_TX_DESC_LINIP(__pdesc) \
77 LE_BITS_TO_4BYTE(__pdesc, 28, 1) 101 SHIFT_AND_MASK_LE(__pdesc, 28, 1)
78#define GET_TX_DESC_NO_ACM(__pdesc) \ 102#define GET_TX_DESC_NO_ACM(__pdesc) \
79 LE_BITS_TO_4BYTE(__pdesc, 29, 1) 103 SHIFT_AND_MASK_LE(__pdesc, 29, 1)
80#define GET_TX_DESC_GF(__pdesc) \ 104#define GET_TX_DESC_GF(__pdesc) \
81 LE_BITS_TO_4BYTE(__pdesc, 30, 1) 105 SHIFT_AND_MASK_LE(__pdesc, 30, 1)
82#define GET_TX_DESC_OWN(__pdesc) \ 106#define GET_TX_DESC_OWN(__pdesc) \
83 LE_BITS_TO_4BYTE(__pdesc, 31, 1) 107 SHIFT_AND_MASK_LE(__pdesc, 31, 1)
84 108
85#define SET_TX_DESC_MACID(__pdesc, __val) \ 109#define SET_TX_DESC_MACID(__pdesc, __val) \
86 SET_BITS_TO_LE_4BYTE(__pdesc+4, 0, 5, __val) 110 SET_BITS_OFFSET_LE(__pdesc+4, 0, 5, __val)
87#define SET_TX_DESC_AGG_BREAK(__pdesc, __val) \ 111#define SET_TX_DESC_AGG_BREAK(__pdesc, __val) \
88 SET_BITS_TO_LE_4BYTE(__pdesc+4, 5, 1, __val) 112 SET_BITS_OFFSET_LE(__pdesc+4, 5, 1, __val)
89#define SET_TX_DESC_BK(__pdesc, __val) \ 113#define SET_TX_DESC_BK(__pdesc, __val) \
90 SET_BITS_TO_LE_4BYTE(__pdesc+4, 6, 1, __val) 114 SET_BITS_OFFSET_LE(__pdesc+4, 6, 1, __val)
91#define SET_TX_DESC_RDG_ENABLE(__pdesc, __val) \ 115#define SET_TX_DESC_RDG_ENABLE(__pdesc, __val) \
92 SET_BITS_TO_LE_4BYTE(__pdesc+4, 7, 1, __val) 116 SET_BITS_OFFSET_LE(__pdesc+4, 7, 1, __val)
93#define SET_TX_DESC_QUEUE_SEL(__pdesc, __val) \ 117#define SET_TX_DESC_QUEUE_SEL(__pdesc, __val) \
94 SET_BITS_TO_LE_4BYTE(__pdesc+4, 8, 5, __val) 118 SET_BITS_OFFSET_LE(__pdesc+4, 8, 5, __val)
95#define SET_TX_DESC_RDG_NAV_EXT(__pdesc, __val) \ 119#define SET_TX_DESC_RDG_NAV_EXT(__pdesc, __val) \
96 SET_BITS_TO_LE_4BYTE(__pdesc+4, 13, 1, __val) 120 SET_BITS_OFFSET_LE(__pdesc+4, 13, 1, __val)
97#define SET_TX_DESC_LSIG_TXOP_EN(__pdesc, __val) \ 121#define SET_TX_DESC_LSIG_TXOP_EN(__pdesc, __val) \
98 SET_BITS_TO_LE_4BYTE(__pdesc+4, 14, 1, __val) 122 SET_BITS_OFFSET_LE(__pdesc+4, 14, 1, __val)
99#define SET_TX_DESC_PIFS(__pdesc, __val) \ 123#define SET_TX_DESC_PIFS(__pdesc, __val) \
100 SET_BITS_TO_LE_4BYTE(__pdesc+4, 15, 1, __val) 124 SET_BITS_OFFSET_LE(__pdesc+4, 15, 1, __val)
101#define SET_TX_DESC_RATE_ID(__pdesc, __val) \ 125#define SET_TX_DESC_RATE_ID(__pdesc, __val) \
102 SET_BITS_TO_LE_4BYTE(__pdesc+4, 16, 4, __val) 126 SET_BITS_OFFSET_LE(__pdesc+4, 16, 4, __val)
103#define SET_TX_DESC_NAV_USE_HDR(__pdesc, __val) \ 127#define SET_TX_DESC_NAV_USE_HDR(__pdesc, __val) \
104 SET_BITS_TO_LE_4BYTE(__pdesc+4, 20, 1, __val) 128 SET_BITS_OFFSET_LE(__pdesc+4, 20, 1, __val)
105#define SET_TX_DESC_EN_DESC_ID(__pdesc, __val) \ 129#define SET_TX_DESC_EN_DESC_ID(__pdesc, __val) \
106 SET_BITS_TO_LE_4BYTE(__pdesc+4, 21, 1, __val) 130 SET_BITS_OFFSET_LE(__pdesc+4, 21, 1, __val)
107#define SET_TX_DESC_SEC_TYPE(__pdesc, __val) \ 131#define SET_TX_DESC_SEC_TYPE(__pdesc, __val) \
108 SET_BITS_TO_LE_4BYTE(__pdesc+4, 22, 2, __val) 132 SET_BITS_OFFSET_LE(__pdesc+4, 22, 2, __val)
109#define SET_TX_DESC_PKT_OFFSET(__pdesc, __val) \ 133#define SET_TX_DESC_PKT_OFFSET(__pdesc, __val) \
110 SET_BITS_TO_LE_4BYTE(__pdesc+4, 24, 8, __val) 134 SET_BITS_OFFSET_LE(__pdesc+4, 24, 8, __val)
111 135
112#define GET_TX_DESC_MACID(__pdesc) \ 136#define GET_TX_DESC_MACID(__pdesc) \
113 LE_BITS_TO_4BYTE(__pdesc+4, 0, 5) 137 SHIFT_AND_MASK_LE(__pdesc+4, 0, 5)
114#define GET_TX_DESC_AGG_ENABLE(__pdesc) \ 138#define GET_TX_DESC_AGG_ENABLE(__pdesc) \
115 LE_BITS_TO_4BYTE(__pdesc+4, 5, 1) 139 SHIFT_AND_MASK_LE(__pdesc+4, 5, 1)
116#define GET_TX_DESC_AGG_BREAK(__pdesc) \ 140#define GET_TX_DESC_AGG_BREAK(__pdesc) \
117 LE_BITS_TO_4BYTE(__pdesc+4, 6, 1) 141 SHIFT_AND_MASK_LE(__pdesc+4, 6, 1)
118#define GET_TX_DESC_RDG_ENABLE(__pdesc) \ 142#define GET_TX_DESC_RDG_ENABLE(__pdesc) \
119 LE_BITS_TO_4BYTE(__pdesc+4, 7, 1) 143 SHIFT_AND_MASK_LE(__pdesc+4, 7, 1)
120#define GET_TX_DESC_QUEUE_SEL(__pdesc) \ 144#define GET_TX_DESC_QUEUE_SEL(__pdesc) \
121 LE_BITS_TO_4BYTE(__pdesc+4, 8, 5) 145 SHIFT_AND_MASK_LE(__pdesc+4, 8, 5)
122#define GET_TX_DESC_RDG_NAV_EXT(__pdesc) \ 146#define GET_TX_DESC_RDG_NAV_EXT(__pdesc) \
123 LE_BITS_TO_4BYTE(__pdesc+4, 13, 1) 147 SHIFT_AND_MASK_LE(__pdesc+4, 13, 1)
124#define GET_TX_DESC_LSIG_TXOP_EN(__pdesc) \ 148#define GET_TX_DESC_LSIG_TXOP_EN(__pdesc) \
125 LE_BITS_TO_4BYTE(__pdesc+4, 14, 1) 149 SHIFT_AND_MASK_LE(__pdesc+4, 14, 1)
126#define GET_TX_DESC_PIFS(__pdesc) \ 150#define GET_TX_DESC_PIFS(__pdesc) \
127 LE_BITS_TO_4BYTE(__pdesc+4, 15, 1) 151 SHIFT_AND_MASK_LE(__pdesc+4, 15, 1)
128#define GET_TX_DESC_RATE_ID(__pdesc) \ 152#define GET_TX_DESC_RATE_ID(__pdesc) \
129 LE_BITS_TO_4BYTE(__pdesc+4, 16, 4) 153 SHIFT_AND_MASK_LE(__pdesc+4, 16, 4)
130#define GET_TX_DESC_NAV_USE_HDR(__pdesc) \ 154#define GET_TX_DESC_NAV_USE_HDR(__pdesc) \
131 LE_BITS_TO_4BYTE(__pdesc+4, 20, 1) 155 SHIFT_AND_MASK_LE(__pdesc+4, 20, 1)
132#define GET_TX_DESC_EN_DESC_ID(__pdesc) \ 156#define GET_TX_DESC_EN_DESC_ID(__pdesc) \
133 LE_BITS_TO_4BYTE(__pdesc+4, 21, 1) 157 SHIFT_AND_MASK_LE(__pdesc+4, 21, 1)
134#define GET_TX_DESC_SEC_TYPE(__pdesc) \ 158#define GET_TX_DESC_SEC_TYPE(__pdesc) \
135 LE_BITS_TO_4BYTE(__pdesc+4, 22, 2) 159 SHIFT_AND_MASK_LE(__pdesc+4, 22, 2)
136#define GET_TX_DESC_PKT_OFFSET(__pdesc) \ 160#define GET_TX_DESC_PKT_OFFSET(__pdesc) \
137 LE_BITS_TO_4BYTE(__pdesc+4, 24, 8) 161 SHIFT_AND_MASK_LE(__pdesc+4, 24, 8)
138 162
139#define SET_TX_DESC_RTS_RC(__pdesc, __val) \ 163#define SET_TX_DESC_RTS_RC(__pdesc, __val) \
140 SET_BITS_TO_LE_4BYTE(__pdesc+8, 0, 6, __val) 164 SET_BITS_OFFSET_LE(__pdesc+8, 0, 6, __val)
141#define SET_TX_DESC_DATA_RC(__pdesc, __val) \ 165#define SET_TX_DESC_DATA_RC(__pdesc, __val) \
142 SET_BITS_TO_LE_4BYTE(__pdesc+8, 6, 6, __val) 166 SET_BITS_OFFSET_LE(__pdesc+8, 6, 6, __val)
143#define SET_TX_DESC_BAR_RTY_TH(__pdesc, __val) \ 167#define SET_TX_DESC_BAR_RTY_TH(__pdesc, __val) \
144 SET_BITS_TO_LE_4BYTE(__pdesc+8, 14, 2, __val) 168 SET_BITS_OFFSET_LE(__pdesc+8, 14, 2, __val)
145#define SET_TX_DESC_MORE_FRAG(__pdesc, __val) \ 169#define SET_TX_DESC_MORE_FRAG(__pdesc, __val) \
146 SET_BITS_TO_LE_4BYTE(__pdesc+8, 17, 1, __val) 170 SET_BITS_OFFSET_LE(__pdesc+8, 17, 1, __val)
147#define SET_TX_DESC_RAW(__pdesc, __val) \ 171#define SET_TX_DESC_RAW(__pdesc, __val) \
148 SET_BITS_TO_LE_4BYTE(__pdesc+8, 18, 1, __val) 172 SET_BITS_OFFSET_LE(__pdesc+8, 18, 1, __val)
149#define SET_TX_DESC_CCX(__pdesc, __val) \ 173#define SET_TX_DESC_CCX(__pdesc, __val) \
150 SET_BITS_TO_LE_4BYTE(__pdesc+8, 19, 1, __val) 174 SET_BITS_OFFSET_LE(__pdesc+8, 19, 1, __val)
151#define SET_TX_DESC_AMPDU_DENSITY(__pdesc, __val) \ 175#define SET_TX_DESC_AMPDU_DENSITY(__pdesc, __val) \
152 SET_BITS_TO_LE_4BYTE(__pdesc+8, 20, 3, __val) 176 SET_BITS_OFFSET_LE(__pdesc+8, 20, 3, __val)
153#define SET_TX_DESC_ANTSEL_A(__pdesc, __val) \ 177#define SET_TX_DESC_ANTSEL_A(__pdesc, __val) \
154 SET_BITS_TO_LE_4BYTE(__pdesc+8, 24, 1, __val) 178 SET_BITS_OFFSET_LE(__pdesc+8, 24, 1, __val)
155#define SET_TX_DESC_ANTSEL_B(__pdesc, __val) \ 179#define SET_TX_DESC_ANTSEL_B(__pdesc, __val) \
156 SET_BITS_TO_LE_4BYTE(__pdesc+8, 25, 1, __val) 180 SET_BITS_OFFSET_LE(__pdesc+8, 25, 1, __val)
157#define SET_TX_DESC_TX_ANT_CCK(__pdesc, __val) \ 181#define SET_TX_DESC_TX_ANT_CCK(__pdesc, __val) \
158 SET_BITS_TO_LE_4BYTE(__pdesc+8, 26, 2, __val) 182 SET_BITS_OFFSET_LE(__pdesc+8, 26, 2, __val)
159#define SET_TX_DESC_TX_ANTL(__pdesc, __val) \ 183#define SET_TX_DESC_TX_ANTL(__pdesc, __val) \
160 SET_BITS_TO_LE_4BYTE(__pdesc+8, 28, 2, __val) 184 SET_BITS_OFFSET_LE(__pdesc+8, 28, 2, __val)
161#define SET_TX_DESC_TX_ANT_HT(__pdesc, __val) \ 185#define SET_TX_DESC_TX_ANT_HT(__pdesc, __val) \
162 SET_BITS_TO_LE_4BYTE(__pdesc+8, 30, 2, __val) 186 SET_BITS_OFFSET_LE(__pdesc+8, 30, 2, __val)
163 187
164#define GET_TX_DESC_RTS_RC(__pdesc) \ 188#define GET_TX_DESC_RTS_RC(__pdesc) \
165 LE_BITS_TO_4BYTE(__pdesc+8, 0, 6) 189 SHIFT_AND_MASK_LE(__pdesc+8, 0, 6)
166#define GET_TX_DESC_DATA_RC(__pdesc) \ 190#define GET_TX_DESC_DATA_RC(__pdesc) \
167 LE_BITS_TO_4BYTE(__pdesc+8, 6, 6) 191 SHIFT_AND_MASK_LE(__pdesc+8, 6, 6)
168#define GET_TX_DESC_BAR_RTY_TH(__pdesc) \ 192#define GET_TX_DESC_BAR_RTY_TH(__pdesc) \
169 LE_BITS_TO_4BYTE(__pdesc+8, 14, 2) 193 SHIFT_AND_MASK_LE(__pdesc+8, 14, 2)
170#define GET_TX_DESC_MORE_FRAG(__pdesc) \ 194#define GET_TX_DESC_MORE_FRAG(__pdesc) \
171 LE_BITS_TO_4BYTE(__pdesc+8, 17, 1) 195 SHIFT_AND_MASK_LE(__pdesc+8, 17, 1)
172#define GET_TX_DESC_RAW(__pdesc) \ 196#define GET_TX_DESC_RAW(__pdesc) \
173 LE_BITS_TO_4BYTE(__pdesc+8, 18, 1) 197 SHIFT_AND_MASK_LE(__pdesc+8, 18, 1)
174#define GET_TX_DESC_CCX(__pdesc) \ 198#define GET_TX_DESC_CCX(__pdesc) \
175 LE_BITS_TO_4BYTE(__pdesc+8, 19, 1) 199 SHIFT_AND_MASK_LE(__pdesc+8, 19, 1)
176#define GET_TX_DESC_AMPDU_DENSITY(__pdesc) \ 200#define GET_TX_DESC_AMPDU_DENSITY(__pdesc) \
177 LE_BITS_TO_4BYTE(__pdesc+8, 20, 3) 201 SHIFT_AND_MASK_LE(__pdesc+8, 20, 3)
178#define GET_TX_DESC_ANTSEL_A(__pdesc) \ 202#define GET_TX_DESC_ANTSEL_A(__pdesc) \
179 LE_BITS_TO_4BYTE(__pdesc+8, 24, 1) 203 SHIFT_AND_MASK_LE(__pdesc+8, 24, 1)
180#define GET_TX_DESC_ANTSEL_B(__pdesc) \ 204#define GET_TX_DESC_ANTSEL_B(__pdesc) \
181 LE_BITS_TO_4BYTE(__pdesc+8, 25, 1) 205 SHIFT_AND_MASK_LE(__pdesc+8, 25, 1)
182#define GET_TX_DESC_TX_ANT_CCK(__pdesc) \ 206#define GET_TX_DESC_TX_ANT_CCK(__pdesc) \
183 LE_BITS_TO_4BYTE(__pdesc+8, 26, 2) 207 SHIFT_AND_MASK_LE(__pdesc+8, 26, 2)
184#define GET_TX_DESC_TX_ANTL(__pdesc) \ 208#define GET_TX_DESC_TX_ANTL(__pdesc) \
185 LE_BITS_TO_4BYTE(__pdesc+8, 28, 2) 209 SHIFT_AND_MASK_LE(__pdesc+8, 28, 2)
186#define GET_TX_DESC_TX_ANT_HT(__pdesc) \ 210#define GET_TX_DESC_TX_ANT_HT(__pdesc) \
187 LE_BITS_TO_4BYTE(__pdesc+8, 30, 2) 211 SHIFT_AND_MASK_LE(__pdesc+8, 30, 2)
188 212
189#define SET_TX_DESC_NEXT_HEAP_PAGE(__pdesc, __val) \ 213#define SET_TX_DESC_NEXT_HEAP_PAGE(__pdesc, __val) \
190 SET_BITS_TO_LE_4BYTE(__pdesc+12, 0, 8, __val) 214 SET_BITS_OFFSET_LE(__pdesc+12, 0, 8, __val)
191#define SET_TX_DESC_TAIL_PAGE(__pdesc, __val) \ 215#define SET_TX_DESC_TAIL_PAGE(__pdesc, __val) \
192 SET_BITS_TO_LE_4BYTE(__pdesc+12, 8, 8, __val) 216 SET_BITS_OFFSET_LE(__pdesc+12, 8, 8, __val)
193#define SET_TX_DESC_SEQ(__pdesc, __val) \ 217#define SET_TX_DESC_SEQ(__pdesc, __val) \
194 SET_BITS_TO_LE_4BYTE(__pdesc+12, 16, 12, __val) 218 SET_BITS_OFFSET_LE(__pdesc+12, 16, 12, __val)
195#define SET_TX_DESC_PKT_ID(__pdesc, __val) \ 219#define SET_TX_DESC_PKT_ID(__pdesc, __val) \
196 SET_BITS_TO_LE_4BYTE(__pdesc+12, 28, 4, __val) 220 SET_BITS_OFFSET_LE(__pdesc+12, 28, 4, __val)
197 221
198#define GET_TX_DESC_NEXT_HEAP_PAGE(__pdesc) \ 222#define GET_TX_DESC_NEXT_HEAP_PAGE(__pdesc) \
199 LE_BITS_TO_4BYTE(__pdesc+12, 0, 8) 223 SHIFT_AND_MASK_LE(__pdesc+12, 0, 8)
200#define GET_TX_DESC_TAIL_PAGE(__pdesc) \ 224#define GET_TX_DESC_TAIL_PAGE(__pdesc) \
201 LE_BITS_TO_4BYTE(__pdesc+12, 8, 8) 225 SHIFT_AND_MASK_LE(__pdesc+12, 8, 8)
202#define GET_TX_DESC_SEQ(__pdesc) \ 226#define GET_TX_DESC_SEQ(__pdesc) \
203 LE_BITS_TO_4BYTE(__pdesc+12, 16, 12) 227 SHIFT_AND_MASK_LE(__pdesc+12, 16, 12)
204#define GET_TX_DESC_PKT_ID(__pdesc) \ 228#define GET_TX_DESC_PKT_ID(__pdesc) \
205 LE_BITS_TO_4BYTE(__pdesc+12, 28, 4) 229 SHIFT_AND_MASK_LE(__pdesc+12, 28, 4)
206 230
207#define SET_TX_DESC_RTS_RATE(__pdesc, __val) \ 231#define SET_TX_DESC_RTS_RATE(__pdesc, __val) \
208 SET_BITS_TO_LE_4BYTE(__pdesc+16, 0, 5, __val) 232 SET_BITS_OFFSET_LE(__pdesc+16, 0, 5, __val)
209#define SET_TX_DESC_AP_DCFE(__pdesc, __val) \ 233#define SET_TX_DESC_AP_DCFE(__pdesc, __val) \
210 SET_BITS_TO_LE_4BYTE(__pdesc+16, 5, 1, __val) 234 SET_BITS_OFFSET_LE(__pdesc+16, 5, 1, __val)
211#define SET_TX_DESC_QOS(__pdesc, __val) \ 235#define SET_TX_DESC_QOS(__pdesc, __val) \
212 SET_BITS_TO_LE_4BYTE(__pdesc+16, 6, 1, __val) 236 SET_BITS_OFFSET_LE(__pdesc+16, 6, 1, __val)
213#define SET_TX_DESC_HWSEQ_EN(__pdesc, __val) \ 237#define SET_TX_DESC_HWSEQ_EN(__pdesc, __val) \
214 SET_BITS_TO_LE_4BYTE(__pdesc+16, 7, 1, __val) 238 SET_BITS_OFFSET_LE(__pdesc+16, 7, 1, __val)
215#define SET_TX_DESC_USE_RATE(__pdesc, __val) \ 239#define SET_TX_DESC_USE_RATE(__pdesc, __val) \
216 SET_BITS_TO_LE_4BYTE(__pdesc+16, 8, 1, __val) 240 SET_BITS_OFFSET_LE(__pdesc+16, 8, 1, __val)
217#define SET_TX_DESC_DISABLE_RTS_FB(__pdesc, __val) \ 241#define SET_TX_DESC_DISABLE_RTS_FB(__pdesc, __val) \
218 SET_BITS_TO_LE_4BYTE(__pdesc+16, 9, 1, __val) 242 SET_BITS_OFFSET_LE(__pdesc+16, 9, 1, __val)
219#define SET_TX_DESC_DISABLE_FB(__pdesc, __val) \ 243#define SET_TX_DESC_DISABLE_FB(__pdesc, __val) \
220 SET_BITS_TO_LE_4BYTE(__pdesc+16, 10, 1, __val) 244 SET_BITS_OFFSET_LE(__pdesc+16, 10, 1, __val)
221#define SET_TX_DESC_CTS2SELF(__pdesc, __val) \ 245#define SET_TX_DESC_CTS2SELF(__pdesc, __val) \
222 SET_BITS_TO_LE_4BYTE(__pdesc+16, 11, 1, __val) 246 SET_BITS_OFFSET_LE(__pdesc+16, 11, 1, __val)
223#define SET_TX_DESC_RTS_ENABLE(__pdesc, __val) \ 247#define SET_TX_DESC_RTS_ENABLE(__pdesc, __val) \
224 SET_BITS_TO_LE_4BYTE(__pdesc+16, 12, 1, __val) 248 SET_BITS_OFFSET_LE(__pdesc+16, 12, 1, __val)
225#define SET_TX_DESC_HW_RTS_ENABLE(__pdesc, __val) \ 249#define SET_TX_DESC_HW_RTS_ENABLE(__pdesc, __val) \
226 SET_BITS_TO_LE_4BYTE(__pdesc+16, 13, 1, __val) 250 SET_BITS_OFFSET_LE(__pdesc+16, 13, 1, __val)
227#define SET_TX_DESC_PORT_ID(__pdesc, __val) \ 251#define SET_TX_DESC_PORT_ID(__pdesc, __val) \
228 SET_BITS_TO_LE_4BYTE(__pdesc+16, 14, 1, __val) 252 SET_BITS_OFFSET_LE(__pdesc+16, 14, 1, __val)
229#define SET_TX_DESC_WAIT_DCTS(__pdesc, __val) \ 253#define SET_TX_DESC_WAIT_DCTS(__pdesc, __val) \
230 SET_BITS_TO_LE_4BYTE(__pdesc+16, 18, 1, __val) 254 SET_BITS_OFFSET_LE(__pdesc+16, 18, 1, __val)
231#define SET_TX_DESC_CTS2AP_EN(__pdesc, __val) \ 255#define SET_TX_DESC_CTS2AP_EN(__pdesc, __val) \
232 SET_BITS_TO_LE_4BYTE(__pdesc+16, 19, 1, __val) 256 SET_BITS_OFFSET_LE(__pdesc+16, 19, 1, __val)
233#define SET_TX_DESC_TX_SUB_CARRIER(__pdesc, __val) \ 257#define SET_TX_DESC_TX_SUB_CARRIER(__pdesc, __val) \
234 SET_BITS_TO_LE_4BYTE(__pdesc+16, 20, 2, __val) 258 SET_BITS_OFFSET_LE(__pdesc+16, 20, 2, __val)
235#define SET_TX_DESC_TX_STBC(__pdesc, __val) \ 259#define SET_TX_DESC_TX_STBC(__pdesc, __val) \
236 SET_BITS_TO_LE_4BYTE(__pdesc+16, 22, 2, __val) 260 SET_BITS_OFFSET_LE(__pdesc+16, 22, 2, __val)
237#define SET_TX_DESC_DATA_SHORT(__pdesc, __val) \ 261#define SET_TX_DESC_DATA_SHORT(__pdesc, __val) \
238 SET_BITS_TO_LE_4BYTE(__pdesc+16, 24, 1, __val) 262 SET_BITS_OFFSET_LE(__pdesc+16, 24, 1, __val)
239#define SET_TX_DESC_DATA_BW(__pdesc, __val) \ 263#define SET_TX_DESC_DATA_BW(__pdesc, __val) \
240 SET_BITS_TO_LE_4BYTE(__pdesc+16, 25, 1, __val) 264 SET_BITS_OFFSET_LE(__pdesc+16, 25, 1, __val)
241#define SET_TX_DESC_RTS_SHORT(__pdesc, __val) \ 265#define SET_TX_DESC_RTS_SHORT(__pdesc, __val) \
242 SET_BITS_TO_LE_4BYTE(__pdesc+16, 26, 1, __val) 266 SET_BITS_OFFSET_LE(__pdesc+16, 26, 1, __val)
243#define SET_TX_DESC_RTS_BW(__pdesc, __val) \ 267#define SET_TX_DESC_RTS_BW(__pdesc, __val) \
244 SET_BITS_TO_LE_4BYTE(__pdesc+16, 27, 1, __val) 268 SET_BITS_OFFSET_LE(__pdesc+16, 27, 1, __val)
245#define SET_TX_DESC_RTS_SC(__pdesc, __val) \ 269#define SET_TX_DESC_RTS_SC(__pdesc, __val) \
246 SET_BITS_TO_LE_4BYTE(__pdesc+16, 28, 2, __val) 270 SET_BITS_OFFSET_LE(__pdesc+16, 28, 2, __val)
247#define SET_TX_DESC_RTS_STBC(__pdesc, __val) \ 271#define SET_TX_DESC_RTS_STBC(__pdesc, __val) \
248 SET_BITS_TO_LE_4BYTE(__pdesc+16, 30, 2, __val) 272 SET_BITS_OFFSET_LE(__pdesc+16, 30, 2, __val)
249 273
250#define GET_TX_DESC_RTS_RATE(__pdesc) \ 274#define GET_TX_DESC_RTS_RATE(__pdesc) \
251 LE_BITS_TO_4BYTE(__pdesc+16, 0, 5) 275 SHIFT_AND_MASK_LE(__pdesc+16, 0, 5)
252#define GET_TX_DESC_AP_DCFE(__pdesc) \ 276#define GET_TX_DESC_AP_DCFE(__pdesc) \
253 LE_BITS_TO_4BYTE(__pdesc+16, 5, 1) 277 SHIFT_AND_MASK_LE(__pdesc+16, 5, 1)
254#define GET_TX_DESC_QOS(__pdesc) \ 278#define GET_TX_DESC_QOS(__pdesc) \
255 LE_BITS_TO_4BYTE(__pdesc+16, 6, 1) 279 SHIFT_AND_MASK_LE(__pdesc+16, 6, 1)
256#define GET_TX_DESC_HWSEQ_EN(__pdesc) \ 280#define GET_TX_DESC_HWSEQ_EN(__pdesc) \
257 LE_BITS_TO_4BYTE(__pdesc+16, 7, 1) 281 SHIFT_AND_MASK_LE(__pdesc+16, 7, 1)
258#define GET_TX_DESC_USE_RATE(__pdesc) \ 282#define GET_TX_DESC_USE_RATE(__pdesc) \
259 LE_BITS_TO_4BYTE(__pdesc+16, 8, 1) 283 SHIFT_AND_MASK_LE(__pdesc+16, 8, 1)
260#define GET_TX_DESC_DISABLE_RTS_FB(__pdesc) \ 284#define GET_TX_DESC_DISABLE_RTS_FB(__pdesc) \
261 LE_BITS_TO_4BYTE(__pdesc+16, 9, 1) 285 SHIFT_AND_MASK_LE(__pdesc+16, 9, 1)
262#define GET_TX_DESC_DISABLE_FB(__pdesc) \ 286#define GET_TX_DESC_DISABLE_FB(__pdesc) \
263 LE_BITS_TO_4BYTE(__pdesc+16, 10, 1) 287 SHIFT_AND_MASK_LE(__pdesc+16, 10, 1)
264#define GET_TX_DESC_CTS2SELF(__pdesc) \ 288#define GET_TX_DESC_CTS2SELF(__pdesc) \
265 LE_BITS_TO_4BYTE(__pdesc+16, 11, 1) 289 SHIFT_AND_MASK_LE(__pdesc+16, 11, 1)
266#define GET_TX_DESC_RTS_ENABLE(__pdesc) \ 290#define GET_TX_DESC_RTS_ENABLE(__pdesc) \
267 LE_BITS_TO_4BYTE(__pdesc+16, 12, 1) 291 SHIFT_AND_MASK_LE(__pdesc+16, 12, 1)
268#define GET_TX_DESC_HW_RTS_ENABLE(__pdesc) \ 292#define GET_TX_DESC_HW_RTS_ENABLE(__pdesc) \
269 LE_BITS_TO_4BYTE(__pdesc+16, 13, 1) 293 SHIFT_AND_MASK_LE(__pdesc+16, 13, 1)
270#define GET_TX_DESC_PORT_ID(__pdesc) \ 294#define GET_TX_DESC_PORT_ID(__pdesc) \
271 LE_BITS_TO_4BYTE(__pdesc+16, 14, 1) 295 SHIFT_AND_MASK_LE(__pdesc+16, 14, 1)
272#define GET_TX_DESC_WAIT_DCTS(__pdesc) \ 296#define GET_TX_DESC_WAIT_DCTS(__pdesc) \
273 LE_BITS_TO_4BYTE(__pdesc+16, 18, 1) 297 SHIFT_AND_MASK_LE(__pdesc+16, 18, 1)
274#define GET_TX_DESC_CTS2AP_EN(__pdesc) \ 298#define GET_TX_DESC_CTS2AP_EN(__pdesc) \
275 LE_BITS_TO_4BYTE(__pdesc+16, 19, 1) 299 SHIFT_AND_MASK_LE(__pdesc+16, 19, 1)
276#define GET_TX_DESC_TX_SUB_CARRIER(__pdesc) \ 300#define GET_TX_DESC_TX_SUB_CARRIER(__pdesc) \
277 LE_BITS_TO_4BYTE(__pdesc+16, 20, 2) 301 SHIFT_AND_MASK_LE(__pdesc+16, 20, 2)
278#define GET_TX_DESC_TX_STBC(__pdesc) \ 302#define GET_TX_DESC_TX_STBC(__pdesc) \
279 LE_BITS_TO_4BYTE(__pdesc+16, 22, 2) 303 SHIFT_AND_MASK_LE(__pdesc+16, 22, 2)
280#define GET_TX_DESC_DATA_SHORT(__pdesc) \ 304#define GET_TX_DESC_DATA_SHORT(__pdesc) \
281 LE_BITS_TO_4BYTE(__pdesc+16, 24, 1) 305 SHIFT_AND_MASK_LE(__pdesc+16, 24, 1)
282#define GET_TX_DESC_DATA_BW(__pdesc) \ 306#define GET_TX_DESC_DATA_BW(__pdesc) \
283 LE_BITS_TO_4BYTE(__pdesc+16, 25, 1) 307 SHIFT_AND_MASK_LE(__pdesc+16, 25, 1)
284#define GET_TX_DESC_RTS_SHORT(__pdesc) \ 308#define GET_TX_DESC_RTS_SHORT(__pdesc) \
285 LE_BITS_TO_4BYTE(__pdesc+16, 26, 1) 309 SHIFT_AND_MASK_LE(__pdesc+16, 26, 1)
286#define GET_TX_DESC_RTS_BW(__pdesc) \ 310#define GET_TX_DESC_RTS_BW(__pdesc) \
287 LE_BITS_TO_4BYTE(__pdesc+16, 27, 1) 311 SHIFT_AND_MASK_LE(__pdesc+16, 27, 1)
288#define GET_TX_DESC_RTS_SC(__pdesc) \ 312#define GET_TX_DESC_RTS_SC(__pdesc) \
289 LE_BITS_TO_4BYTE(__pdesc+16, 28, 2) 313 SHIFT_AND_MASK_LE(__pdesc+16, 28, 2)
290#define GET_TX_DESC_RTS_STBC(__pdesc) \ 314#define GET_TX_DESC_RTS_STBC(__pdesc) \
291 LE_BITS_TO_4BYTE(__pdesc+16, 30, 2) 315 SHIFT_AND_MASK_LE(__pdesc+16, 30, 2)
292 316
293#define SET_TX_DESC_TX_RATE(__pdesc, __val) \ 317#define SET_TX_DESC_TX_RATE(__pdesc, __val) \
294 SET_BITS_TO_LE_4BYTE(__pdesc+20, 0, 6, __val) 318 SET_BITS_OFFSET_LE(__pdesc+20, 0, 6, __val)
295#define SET_TX_DESC_DATA_SHORTGI(__pdesc, __val) \ 319#define SET_TX_DESC_DATA_SHORTGI(__pdesc, __val) \
296 SET_BITS_TO_LE_4BYTE(__pdesc+20, 6, 1, __val) 320 SET_BITS_OFFSET_LE(__pdesc+20, 6, 1, __val)
297#define SET_TX_DESC_CCX_TAG(__pdesc, __val) \ 321#define SET_TX_DESC_CCX_TAG(__pdesc, __val) \
298 SET_BITS_TO_LE_4BYTE(__pdesc+20, 7, 1, __val) 322 SET_BITS_OFFSET_LE(__pdesc+20, 7, 1, __val)
299#define SET_TX_DESC_DATA_RATE_FB_LIMIT(__pdesc, __val) \ 323#define SET_TX_DESC_DATA_RATE_FB_LIMIT(__pdesc, __val) \
300 SET_BITS_TO_LE_4BYTE(__pdesc+20, 8, 5, __val) 324 SET_BITS_OFFSET_LE(__pdesc+20, 8, 5, __val)
301#define SET_TX_DESC_RTS_RATE_FB_LIMIT(__pdesc, __val) \ 325#define SET_TX_DESC_RTS_RATE_FB_LIMIT(__pdesc, __val) \
302 SET_BITS_TO_LE_4BYTE(__pdesc+20, 13, 4, __val) 326 SET_BITS_OFFSET_LE(__pdesc+20, 13, 4, __val)
303#define SET_TX_DESC_RETRY_LIMIT_ENABLE(__pdesc, __val) \ 327#define SET_TX_DESC_RETRY_LIMIT_ENABLE(__pdesc, __val) \
304 SET_BITS_TO_LE_4BYTE(__pdesc+20, 17, 1, __val) 328 SET_BITS_OFFSET_LE(__pdesc+20, 17, 1, __val)
305#define SET_TX_DESC_DATA_RETRY_LIMIT(__pdesc, __val) \ 329#define SET_TX_DESC_DATA_RETRY_LIMIT(__pdesc, __val) \
306 SET_BITS_TO_LE_4BYTE(__pdesc+20, 18, 6, __val) 330 SET_BITS_OFFSET_LE(__pdesc+20, 18, 6, __val)
307#define SET_TX_DESC_USB_TXAGG_NUM(__pdesc, __val) \ 331#define SET_TX_DESC_USB_TXAGG_NUM(__pdesc, __val) \
308 SET_BITS_TO_LE_4BYTE(__pdesc+20, 24, 8, __val) 332 SET_BITS_OFFSET_LE(__pdesc+20, 24, 8, __val)
309 333
310#define GET_TX_DESC_TX_RATE(__pdesc) \ 334#define GET_TX_DESC_TX_RATE(__pdesc) \
311 LE_BITS_TO_4BYTE(__pdesc+20, 0, 6) 335 SHIFT_AND_MASK_LE(__pdesc+20, 0, 6)
312#define GET_TX_DESC_DATA_SHORTGI(__pdesc) \ 336#define GET_TX_DESC_DATA_SHORTGI(__pdesc) \
313 LE_BITS_TO_4BYTE(__pdesc+20, 6, 1) 337 SHIFT_AND_MASK_LE(__pdesc+20, 6, 1)
314#define GET_TX_DESC_CCX_TAG(__pdesc) \ 338#define GET_TX_DESC_CCX_TAG(__pdesc) \
315 LE_BITS_TO_4BYTE(__pdesc+20, 7, 1) 339 SHIFT_AND_MASK_LE(__pdesc+20, 7, 1)
316#define GET_TX_DESC_DATA_RATE_FB_LIMIT(__pdesc) \ 340#define GET_TX_DESC_DATA_RATE_FB_LIMIT(__pdesc) \
317 LE_BITS_TO_4BYTE(__pdesc+20, 8, 5) 341 SHIFT_AND_MASK_LE(__pdesc+20, 8, 5)
318#define GET_TX_DESC_RTS_RATE_FB_LIMIT(__pdesc) \ 342#define GET_TX_DESC_RTS_RATE_FB_LIMIT(__pdesc) \
319 LE_BITS_TO_4BYTE(__pdesc+20, 13, 4) 343 SHIFT_AND_MASK_LE(__pdesc+20, 13, 4)
320#define GET_TX_DESC_RETRY_LIMIT_ENABLE(__pdesc) \ 344#define GET_TX_DESC_RETRY_LIMIT_ENABLE(__pdesc) \
321 LE_BITS_TO_4BYTE(__pdesc+20, 17, 1) 345 SHIFT_AND_MASK_LE(__pdesc+20, 17, 1)
322#define GET_TX_DESC_DATA_RETRY_LIMIT(__pdesc) \ 346#define GET_TX_DESC_DATA_RETRY_LIMIT(__pdesc) \
323 LE_BITS_TO_4BYTE(__pdesc+20, 18, 6) 347 SHIFT_AND_MASK_LE(__pdesc+20, 18, 6)
324#define GET_TX_DESC_USB_TXAGG_NUM(__pdesc) \ 348#define GET_TX_DESC_USB_TXAGG_NUM(__pdesc) \
325 LE_BITS_TO_4BYTE(__pdesc+20, 24, 8) 349 SHIFT_AND_MASK_LE(__pdesc+20, 24, 8)
326 350
327#define SET_TX_DESC_TXAGC_A(__pdesc, __val) \ 351#define SET_TX_DESC_TXAGC_A(__pdesc, __val) \
328 SET_BITS_TO_LE_4BYTE(__pdesc+24, 0, 5, __val) 352 SET_BITS_OFFSET_LE(__pdesc+24, 0, 5, __val)
329#define SET_TX_DESC_TXAGC_B(__pdesc, __val) \ 353#define SET_TX_DESC_TXAGC_B(__pdesc, __val) \
330 SET_BITS_TO_LE_4BYTE(__pdesc+24, 5, 5, __val) 354 SET_BITS_OFFSET_LE(__pdesc+24, 5, 5, __val)
331#define SET_TX_DESC_USE_MAX_LEN(__pdesc, __val) \ 355#define SET_TX_DESC_USE_MAX_LEN(__pdesc, __val) \
332 SET_BITS_TO_LE_4BYTE(__pdesc+24, 10, 1, __val) 356 SET_BITS_OFFSET_LE(__pdesc+24, 10, 1, __val)
333#define SET_TX_DESC_MAX_AGG_NUM(__pdesc, __val) \ 357#define SET_TX_DESC_MAX_AGG_NUM(__pdesc, __val) \
334 SET_BITS_TO_LE_4BYTE(__pdesc+24, 11, 5, __val) 358 SET_BITS_OFFSET_LE(__pdesc+24, 11, 5, __val)
335#define SET_TX_DESC_MCSG1_MAX_LEN(__pdesc, __val) \ 359#define SET_TX_DESC_MCSG1_MAX_LEN(__pdesc, __val) \
336 SET_BITS_TO_LE_4BYTE(__pdesc+24, 16, 4, __val) 360 SET_BITS_OFFSET_LE(__pdesc+24, 16, 4, __val)
337#define SET_TX_DESC_MCSG2_MAX_LEN(__pdesc, __val) \ 361#define SET_TX_DESC_MCSG2_MAX_LEN(__pdesc, __val) \
338 SET_BITS_TO_LE_4BYTE(__pdesc+24, 20, 4, __val) 362 SET_BITS_OFFSET_LE(__pdesc+24, 20, 4, __val)
339#define SET_TX_DESC_MCSG3_MAX_LEN(__pdesc, __val) \ 363#define SET_TX_DESC_MCSG3_MAX_LEN(__pdesc, __val) \
340 SET_BITS_TO_LE_4BYTE(__pdesc+24, 24, 4, __val) 364 SET_BITS_OFFSET_LE(__pdesc+24, 24, 4, __val)
341#define SET_TX_DESC_MCS7_SGI_MAX_LEN(__pdesc, __val) \ 365#define SET_TX_DESC_MCS7_SGI_MAX_LEN(__pdesc, __val) \
342 SET_BITS_TO_LE_4BYTE(__pdesc+24, 28, 4, __val) 366 SET_BITS_OFFSET_LE(__pdesc+24, 28, 4, __val)
343 367
344#define GET_TX_DESC_TXAGC_A(__pdesc) \ 368#define GET_TX_DESC_TXAGC_A(__pdesc) \
345 LE_BITS_TO_4BYTE(__pdesc+24, 0, 5) 369 SHIFT_AND_MASK_LE(__pdesc+24, 0, 5)
346#define GET_TX_DESC_TXAGC_B(__pdesc) \ 370#define GET_TX_DESC_TXAGC_B(__pdesc) \
347 LE_BITS_TO_4BYTE(__pdesc+24, 5, 5) 371 SHIFT_AND_MASK_LE(__pdesc+24, 5, 5)
348#define GET_TX_DESC_USE_MAX_LEN(__pdesc) \ 372#define GET_TX_DESC_USE_MAX_LEN(__pdesc) \
349 LE_BITS_TO_4BYTE(__pdesc+24, 10, 1) 373 SHIFT_AND_MASK_LE(__pdesc+24, 10, 1)
350#define GET_TX_DESC_MAX_AGG_NUM(__pdesc) \ 374#define GET_TX_DESC_MAX_AGG_NUM(__pdesc) \
351 LE_BITS_TO_4BYTE(__pdesc+24, 11, 5) 375 SHIFT_AND_MASK_LE(__pdesc+24, 11, 5)
352#define GET_TX_DESC_MCSG1_MAX_LEN(__pdesc) \ 376#define GET_TX_DESC_MCSG1_MAX_LEN(__pdesc) \
353 LE_BITS_TO_4BYTE(__pdesc+24, 16, 4) 377 SHIFT_AND_MASK_LE(__pdesc+24, 16, 4)
354#define GET_TX_DESC_MCSG2_MAX_LEN(__pdesc) \ 378#define GET_TX_DESC_MCSG2_MAX_LEN(__pdesc) \
355 LE_BITS_TO_4BYTE(__pdesc+24, 20, 4) 379 SHIFT_AND_MASK_LE(__pdesc+24, 20, 4)
356#define GET_TX_DESC_MCSG3_MAX_LEN(__pdesc) \ 380#define GET_TX_DESC_MCSG3_MAX_LEN(__pdesc) \
357 LE_BITS_TO_4BYTE(__pdesc+24, 24, 4) 381 SHIFT_AND_MASK_LE(__pdesc+24, 24, 4)
358#define GET_TX_DESC_MCS7_SGI_MAX_LEN(__pdesc) \ 382#define GET_TX_DESC_MCS7_SGI_MAX_LEN(__pdesc) \
359 LE_BITS_TO_4BYTE(__pdesc+24, 28, 4) 383 SHIFT_AND_MASK_LE(__pdesc+24, 28, 4)
360 384
361#define SET_TX_DESC_TX_BUFFER_SIZE(__pdesc, __val) \ 385#define SET_TX_DESC_TX_BUFFER_SIZE(__pdesc, __val) \
362 SET_BITS_TO_LE_4BYTE(__pdesc+28, 0, 16, __val) 386 SET_BITS_OFFSET_LE(__pdesc+28, 0, 16, __val)
363#define SET_TX_DESC_MCSG4_MAX_LEN(__pdesc, __val) \ 387#define SET_TX_DESC_MCSG4_MAX_LEN(__pdesc, __val) \
364 SET_BITS_TO_LE_4BYTE(__pdesc+28, 16, 4, __val) 388 SET_BITS_OFFSET_LE(__pdesc+28, 16, 4, __val)
365#define SET_TX_DESC_MCSG5_MAX_LEN(__pdesc, __val) \ 389#define SET_TX_DESC_MCSG5_MAX_LEN(__pdesc, __val) \
366 SET_BITS_TO_LE_4BYTE(__pdesc+28, 20, 4, __val) 390 SET_BITS_OFFSET_LE(__pdesc+28, 20, 4, __val)
367#define SET_TX_DESC_MCSG6_MAX_LEN(__pdesc, __val) \ 391#define SET_TX_DESC_MCSG6_MAX_LEN(__pdesc, __val) \
368 SET_BITS_TO_LE_4BYTE(__pdesc+28, 24, 4, __val) 392 SET_BITS_OFFSET_LE(__pdesc+28, 24, 4, __val)
369#define SET_TX_DESC_MCS15_SGI_MAX_LEN(__pdesc, __val) \ 393#define SET_TX_DESC_MCS15_SGI_MAX_LEN(__pdesc, __val) \
370 SET_BITS_TO_LE_4BYTE(__pdesc+28, 28, 4, __val) 394 SET_BITS_OFFSET_LE(__pdesc+28, 28, 4, __val)
371 395
372#define GET_TX_DESC_TX_BUFFER_SIZE(__pdesc) \ 396#define GET_TX_DESC_TX_BUFFER_SIZE(__pdesc) \
373 LE_BITS_TO_4BYTE(__pdesc+28, 0, 16) 397 SHIFT_AND_MASK_LE(__pdesc+28, 0, 16)
374#define GET_TX_DESC_MCSG4_MAX_LEN(__pdesc) \ 398#define GET_TX_DESC_MCSG4_MAX_LEN(__pdesc) \
375 LE_BITS_TO_4BYTE(__pdesc+28, 16, 4) 399 SHIFT_AND_MASK_LE(__pdesc+28, 16, 4)
376#define GET_TX_DESC_MCSG5_MAX_LEN(__pdesc) \ 400#define GET_TX_DESC_MCSG5_MAX_LEN(__pdesc) \
377 LE_BITS_TO_4BYTE(__pdesc+28, 20, 4) 401 SHIFT_AND_MASK_LE(__pdesc+28, 20, 4)
378#define GET_TX_DESC_MCSG6_MAX_LEN(__pdesc) \ 402#define GET_TX_DESC_MCSG6_MAX_LEN(__pdesc) \
379 LE_BITS_TO_4BYTE(__pdesc+28, 24, 4) 403 SHIFT_AND_MASK_LE(__pdesc+28, 24, 4)
380#define GET_TX_DESC_MCS15_SGI_MAX_LEN(__pdesc) \ 404#define GET_TX_DESC_MCS15_SGI_MAX_LEN(__pdesc) \
381 LE_BITS_TO_4BYTE(__pdesc+28, 28, 4) 405 SHIFT_AND_MASK_LE(__pdesc+28, 28, 4)
382 406
383#define SET_TX_DESC_TX_BUFFER_ADDRESS(__pdesc, __val) \ 407#define SET_TX_DESC_TX_BUFFER_ADDRESS(__pdesc, __val) \
384 SET_BITS_TO_LE_4BYTE(__pdesc+32, 0, 32, __val) 408 SET_BITS_OFFSET_LE(__pdesc+32, 0, 32, __val)
385#define SET_TX_DESC_TX_BUFFER_ADDRESS64(__pdesc, __val) \ 409#define SET_TX_DESC_TX_BUFFER_ADDRESS64(__pdesc, __val) \
386 SET_BITS_TO_LE_4BYTE(__pdesc+36, 0, 32, __val) 410 SET_BITS_OFFSET_LE(__pdesc+36, 0, 32, __val)
387 411
388#define GET_TX_DESC_TX_BUFFER_ADDRESS(__pdesc) \ 412#define GET_TX_DESC_TX_BUFFER_ADDRESS(__pdesc) \
389 LE_BITS_TO_4BYTE(__pdesc+32, 0, 32) 413 SHIFT_AND_MASK_LE(__pdesc+32, 0, 32)
390#define GET_TX_DESC_TX_BUFFER_ADDRESS64(__pdesc) \ 414#define GET_TX_DESC_TX_BUFFER_ADDRESS64(__pdesc) \
391 LE_BITS_TO_4BYTE(__pdesc+36, 0, 32) 415 SHIFT_AND_MASK_LE(__pdesc+36, 0, 32)
392 416
393#define SET_TX_DESC_NEXT_DESC_ADDRESS(__pdesc, __val) \ 417#define SET_TX_DESC_NEXT_DESC_ADDRESS(__pdesc, __val) \
394 SET_BITS_TO_LE_4BYTE(__pdesc+40, 0, 32, __val) 418 SET_BITS_OFFSET_LE(__pdesc+40, 0, 32, __val)
395#define SET_TX_DESC_NEXT_DESC_ADDRESS64(__pdesc, __val) \ 419#define SET_TX_DESC_NEXT_DESC_ADDRESS64(__pdesc, __val) \
396 SET_BITS_TO_LE_4BYTE(__pdesc+44, 0, 32, __val) 420 SET_BITS_OFFSET_LE(__pdesc+44, 0, 32, __val)
397 421
398#define GET_TX_DESC_NEXT_DESC_ADDRESS(__pdesc) \ 422#define GET_TX_DESC_NEXT_DESC_ADDRESS(__pdesc) \
399 LE_BITS_TO_4BYTE(__pdesc+40, 0, 32) 423 SHIFT_AND_MASK_LE(__pdesc+40, 0, 32)
400#define GET_TX_DESC_NEXT_DESC_ADDRESS64(__pdesc) \ 424#define GET_TX_DESC_NEXT_DESC_ADDRESS64(__pdesc) \
401 LE_BITS_TO_4BYTE(__pdesc+44, 0, 32) 425 SHIFT_AND_MASK_LE(__pdesc+44, 0, 32)
402 426
403#define GET_RX_DESC_PKT_LEN(__pdesc) \ 427#define GET_RX_DESC_PKT_LEN(__pdesc) \
404 LE_BITS_TO_4BYTE(__pdesc, 0, 14) 428 SHIFT_AND_MASK_LE(__pdesc, 0, 14)
405#define GET_RX_DESC_CRC32(__pdesc) \ 429#define GET_RX_DESC_CRC32(__pdesc) \
406 LE_BITS_TO_4BYTE(__pdesc, 14, 1) 430 SHIFT_AND_MASK_LE(__pdesc, 14, 1)
407#define GET_RX_DESC_ICV(__pdesc) \ 431#define GET_RX_DESC_ICV(__pdesc) \
408 LE_BITS_TO_4BYTE(__pdesc, 15, 1) 432 SHIFT_AND_MASK_LE(__pdesc, 15, 1)
409#define GET_RX_DESC_DRV_INFO_SIZE(__pdesc) \ 433#define GET_RX_DESC_DRV_INFO_SIZE(__pdesc) \
410 LE_BITS_TO_4BYTE(__pdesc, 16, 4) 434 SHIFT_AND_MASK_LE(__pdesc, 16, 4)
411#define GET_RX_DESC_SECURITY(__pdesc) \ 435#define GET_RX_DESC_SECURITY(__pdesc) \
412 LE_BITS_TO_4BYTE(__pdesc, 20, 3) 436 SHIFT_AND_MASK_LE(__pdesc, 20, 3)
413#define GET_RX_DESC_QOS(__pdesc) \ 437#define GET_RX_DESC_QOS(__pdesc) \
414 LE_BITS_TO_4BYTE(__pdesc, 23, 1) 438 SHIFT_AND_MASK_LE(__pdesc, 23, 1)
415#define GET_RX_DESC_SHIFT(__pdesc) \ 439#define GET_RX_DESC_SHIFT(__pdesc) \
416 LE_BITS_TO_4BYTE(__pdesc, 24, 2) 440 SHIFT_AND_MASK_LE(__pdesc, 24, 2)
417#define GET_RX_DESC_PHYST(__pdesc) \ 441#define GET_RX_DESC_PHYST(__pdesc) \
418 LE_BITS_TO_4BYTE(__pdesc, 26, 1) 442 SHIFT_AND_MASK_LE(__pdesc, 26, 1)
419#define GET_RX_DESC_SWDEC(__pdesc) \ 443#define GET_RX_DESC_SWDEC(__pdesc) \
420 LE_BITS_TO_4BYTE(__pdesc, 27, 1) 444 SHIFT_AND_MASK_LE(__pdesc, 27, 1)
421#define GET_RX_DESC_LS(__pdesc) \ 445#define GET_RX_DESC_LS(__pdesc) \
422 LE_BITS_TO_4BYTE(__pdesc, 28, 1) 446 SHIFT_AND_MASK_LE(__pdesc, 28, 1)
423#define GET_RX_DESC_FS(__pdesc) \ 447#define GET_RX_DESC_FS(__pdesc) \
424 LE_BITS_TO_4BYTE(__pdesc, 29, 1) 448 SHIFT_AND_MASK_LE(__pdesc, 29, 1)
425#define GET_RX_DESC_EOR(__pdesc) \ 449#define GET_RX_DESC_EOR(__pdesc) \
426 LE_BITS_TO_4BYTE(__pdesc, 30, 1) 450 SHIFT_AND_MASK_LE(__pdesc, 30, 1)
427#define GET_RX_DESC_OWN(__pdesc) \ 451#define GET_RX_DESC_OWN(__pdesc) \
428 LE_BITS_TO_4BYTE(__pdesc, 31, 1) 452 SHIFT_AND_MASK_LE(__pdesc, 31, 1)
429 453
430#define SET_RX_DESC_PKT_LEN(__pdesc, __val) \ 454#define SET_RX_DESC_PKT_LEN(__pdesc, __val) \
431 SET_BITS_TO_LE_4BYTE(__pdesc, 0, 14, __val) 455 SET_BITS_OFFSET_LE(__pdesc, 0, 14, __val)
432#define SET_RX_DESC_EOR(__pdesc, __val) \ 456#define SET_RX_DESC_EOR(__pdesc, __val) \
433 SET_BITS_TO_LE_4BYTE(__pdesc, 30, 1, __val) 457 SET_BITS_OFFSET_LE(__pdesc, 30, 1, __val)
434#define SET_RX_DESC_OWN(__pdesc, __val) \ 458#define SET_RX_DESC_OWN(__pdesc, __val) \
435 SET_BITS_TO_LE_4BYTE(__pdesc, 31, 1, __val) 459 SET_BITS_OFFSET_LE(__pdesc, 31, 1, __val)
436 460
437#define GET_RX_DESC_MACID(__pdesc) \ 461#define GET_RX_DESC_MACID(__pdesc) \
438 LE_BITS_TO_4BYTE(__pdesc+4, 0, 5) 462 SHIFT_AND_MASK_LE(__pdesc+4, 0, 5)
439#define GET_RX_DESC_TID(__pdesc) \ 463#define GET_RX_DESC_TID(__pdesc) \
440 LE_BITS_TO_4BYTE(__pdesc+4, 5, 4) 464 SHIFT_AND_MASK_LE(__pdesc+4, 5, 4)
441#define GET_RX_DESC_HWRSVD(__pdesc) \ 465#define GET_RX_DESC_HWRSVD(__pdesc) \
442 LE_BITS_TO_4BYTE(__pdesc+4, 9, 5) 466 SHIFT_AND_MASK_LE(__pdesc+4, 9, 5)
443#define GET_RX_DESC_PAGGR(__pdesc) \ 467#define GET_RX_DESC_PAGGR(__pdesc) \
444 LE_BITS_TO_4BYTE(__pdesc+4, 14, 1) 468 SHIFT_AND_MASK_LE(__pdesc+4, 14, 1)
445#define GET_RX_DESC_FAGGR(__pdesc) \ 469#define GET_RX_DESC_FAGGR(__pdesc) \
446 LE_BITS_TO_4BYTE(__pdesc+4, 15, 1) 470 SHIFT_AND_MASK_LE(__pdesc+4, 15, 1)
447#define GET_RX_DESC_A1_FIT(__pdesc) \ 471#define GET_RX_DESC_A1_FIT(__pdesc) \
448 LE_BITS_TO_4BYTE(__pdesc+4, 16, 4) 472 SHIFT_AND_MASK_LE(__pdesc+4, 16, 4)
449#define GET_RX_DESC_A2_FIT(__pdesc) \ 473#define GET_RX_DESC_A2_FIT(__pdesc) \
450 LE_BITS_TO_4BYTE(__pdesc+4, 20, 4) 474 SHIFT_AND_MASK_LE(__pdesc+4, 20, 4)
451#define GET_RX_DESC_PAM(__pdesc) \ 475#define GET_RX_DESC_PAM(__pdesc) \
452 LE_BITS_TO_4BYTE(__pdesc+4, 24, 1) 476 SHIFT_AND_MASK_LE(__pdesc+4, 24, 1)
453#define GET_RX_DESC_PWR(__pdesc) \ 477#define GET_RX_DESC_PWR(__pdesc) \
454 LE_BITS_TO_4BYTE(__pdesc+4, 25, 1) 478 SHIFT_AND_MASK_LE(__pdesc+4, 25, 1)
455#define GET_RX_DESC_MD(__pdesc) \ 479#define GET_RX_DESC_MD(__pdesc) \
456 LE_BITS_TO_4BYTE(__pdesc+4, 26, 1) 480 SHIFT_AND_MASK_LE(__pdesc+4, 26, 1)
457#define GET_RX_DESC_MF(__pdesc) \ 481#define GET_RX_DESC_MF(__pdesc) \
458 LE_BITS_TO_4BYTE(__pdesc+4, 27, 1) 482 SHIFT_AND_MASK_LE(__pdesc+4, 27, 1)
459#define GET_RX_DESC_TYPE(__pdesc) \ 483#define GET_RX_DESC_TYPE(__pdesc) \
460 LE_BITS_TO_4BYTE(__pdesc+4, 28, 2) 484 SHIFT_AND_MASK_LE(__pdesc+4, 28, 2)
461#define GET_RX_DESC_MC(__pdesc) \ 485#define GET_RX_DESC_MC(__pdesc) \
462 LE_BITS_TO_4BYTE(__pdesc+4, 30, 1) 486 SHIFT_AND_MASK_LE(__pdesc+4, 30, 1)
463#define GET_RX_DESC_BC(__pdesc) \ 487#define GET_RX_DESC_BC(__pdesc) \
464 LE_BITS_TO_4BYTE(__pdesc+4, 31, 1) 488 SHIFT_AND_MASK_LE(__pdesc+4, 31, 1)
465#define GET_RX_DESC_SEQ(__pdesc) \ 489#define GET_RX_DESC_SEQ(__pdesc) \
466 LE_BITS_TO_4BYTE(__pdesc+8, 0, 12) 490 SHIFT_AND_MASK_LE(__pdesc+8, 0, 12)
467#define GET_RX_DESC_FRAG(__pdesc) \ 491#define GET_RX_DESC_FRAG(__pdesc) \
468 LE_BITS_TO_4BYTE(__pdesc+8, 12, 4) 492 SHIFT_AND_MASK_LE(__pdesc+8, 12, 4)
469#define GET_RX_DESC_NEXT_PKT_LEN(__pdesc) \ 493#define GET_RX_DESC_NEXT_PKT_LEN(__pdesc) \
470 LE_BITS_TO_4BYTE(__pdesc+8, 16, 14) 494 SHIFT_AND_MASK_LE(__pdesc+8, 16, 14)
471#define GET_RX_DESC_NEXT_IND(__pdesc) \ 495#define GET_RX_DESC_NEXT_IND(__pdesc) \
472 LE_BITS_TO_4BYTE(__pdesc+8, 30, 1) 496 SHIFT_AND_MASK_LE(__pdesc+8, 30, 1)
473#define GET_RX_DESC_RSVD(__pdesc) \ 497#define GET_RX_DESC_RSVD(__pdesc) \
474 LE_BITS_TO_4BYTE(__pdesc+8, 31, 1) 498 SHIFT_AND_MASK_LE(__pdesc+8, 31, 1)
475 499
476#define GET_RX_DESC_RXMCS(__pdesc) \ 500#define GET_RX_DESC_RXMCS(__pdesc) \
477 LE_BITS_TO_4BYTE(__pdesc+12, 0, 6) 501 SHIFT_AND_MASK_LE(__pdesc+12, 0, 6)
478#define GET_RX_DESC_RXHT(__pdesc) \ 502#define GET_RX_DESC_RXHT(__pdesc) \
479 LE_BITS_TO_4BYTE(__pdesc+12, 6, 1) 503 SHIFT_AND_MASK_LE(__pdesc+12, 6, 1)
480#define GET_RX_DESC_SPLCP(__pdesc) \ 504#define GET_RX_DESC_SPLCP(__pdesc) \
481 LE_BITS_TO_4BYTE(__pdesc+12, 8, 1) 505 SHIFT_AND_MASK_LE(__pdesc+12, 8, 1)
482#define GET_RX_DESC_BW(__pdesc) \ 506#define GET_RX_DESC_BW(__pdesc) \
483 LE_BITS_TO_4BYTE(__pdesc+12, 9, 1) 507 SHIFT_AND_MASK_LE(__pdesc+12, 9, 1)
484#define GET_RX_DESC_HTC(__pdesc) \ 508#define GET_RX_DESC_HTC(__pdesc) \
485 LE_BITS_TO_4BYTE(__pdesc+12, 10, 1) 509 SHIFT_AND_MASK_LE(__pdesc+12, 10, 1)
486#define GET_RX_DESC_HWPC_ERR(__pdesc) \ 510#define GET_RX_DESC_HWPC_ERR(__pdesc) \
487 LE_BITS_TO_4BYTE(__pdesc+12, 14, 1) 511 SHIFT_AND_MASK_LE(__pdesc+12, 14, 1)
488#define GET_RX_DESC_HWPC_IND(__pdesc) \ 512#define GET_RX_DESC_HWPC_IND(__pdesc) \
489 LE_BITS_TO_4BYTE(__pdesc+12, 15, 1) 513 SHIFT_AND_MASK_LE(__pdesc+12, 15, 1)
490#define GET_RX_DESC_IV0(__pdesc) \ 514#define GET_RX_DESC_IV0(__pdesc) \
491 LE_BITS_TO_4BYTE(__pdesc+12, 16, 16) 515 SHIFT_AND_MASK_LE(__pdesc+12, 16, 16)
492 516
493#define GET_RX_DESC_IV1(__pdesc) \ 517#define GET_RX_DESC_IV1(__pdesc) \
494 LE_BITS_TO_4BYTE(__pdesc+16, 0, 32) 518 SHIFT_AND_MASK_LE(__pdesc+16, 0, 32)
495#define GET_RX_DESC_TSFL(__pdesc) \ 519#define GET_RX_DESC_TSFL(__pdesc) \
496 LE_BITS_TO_4BYTE(__pdesc+20, 0, 32) 520 SHIFT_AND_MASK_LE(__pdesc+20, 0, 32)
497 521
498#define GET_RX_DESC_BUFF_ADDR(__pdesc) \ 522#define GET_RX_DESC_BUFF_ADDR(__pdesc) \
499 LE_BITS_TO_4BYTE(__pdesc+24, 0, 32) 523 SHIFT_AND_MASK_LE(__pdesc+24, 0, 32)
500#define GET_RX_DESC_BUFF_ADDR64(__pdesc) \ 524#define GET_RX_DESC_BUFF_ADDR64(__pdesc) \
501 LE_BITS_TO_4BYTE(__pdesc+28, 0, 32) 525 SHIFT_AND_MASK_LE(__pdesc+28, 0, 32)
502 526
503#define SET_RX_DESC_BUFF_ADDR(__pdesc, __val) \ 527#define SET_RX_DESC_BUFF_ADDR(__pdesc, __val) \
504 SET_BITS_TO_LE_4BYTE(__pdesc+24, 0, 32, __val) 528 SET_BITS_OFFSET_LE(__pdesc+24, 0, 32, __val)
505#define SET_RX_DESC_BUFF_ADDR64(__pdesc, __val) \ 529#define SET_RX_DESC_BUFF_ADDR64(__pdesc, __val) \
506 SET_BITS_TO_LE_4BYTE(__pdesc+28, 0, 32, __val) 530 SET_BITS_OFFSET_LE(__pdesc+28, 0, 32, __val)
507 531
508#define CLEAR_PCI_TX_DESC_CONTENT(__pdesc, _size) \ 532#define CLEAR_PCI_TX_DESC_CONTENT(__pdesc, _size) \
509do { \ 533do { \
diff --git a/drivers/net/wireless/rtlwifi/usb.c b/drivers/net/wireless/rtlwifi/usb.c
index 91340c547dbb..a4b2613d6a8c 100644
--- a/drivers/net/wireless/rtlwifi/usb.c
+++ b/drivers/net/wireless/rtlwifi/usb.c
@@ -126,7 +126,7 @@ static u32 _usb_read_sync(struct usb_device *udev, u32 addr, u16 len)
126 126
127 wvalue = (u16)addr; 127 wvalue = (u16)addr;
128 _usbctrl_vendorreq_sync_read(udev, request, wvalue, index, data, len); 128 _usbctrl_vendorreq_sync_read(udev, request, wvalue, index, data, len);
129 ret = le32_to_cpu(*data); 129 ret = *data;
130 kfree(data); 130 kfree(data);
131 return ret; 131 return ret;
132} 132}
@@ -163,7 +163,7 @@ static void _usb_write_async(struct usb_device *udev, u32 addr, u32 val,
163 request = REALTEK_USB_VENQT_CMD_REQ; 163 request = REALTEK_USB_VENQT_CMD_REQ;
164 index = REALTEK_USB_VENQT_CMD_IDX; /* n/a */ 164 index = REALTEK_USB_VENQT_CMD_IDX; /* n/a */
165 wvalue = (u16)(addr&0x0000ffff); 165 wvalue = (u16)(addr&0x0000ffff);
166 data = cpu_to_le32(val); 166 data = val;
167 _usbctrl_vendorreq_async_write(udev, request, wvalue, index, &data, 167 _usbctrl_vendorreq_async_write(udev, request, wvalue, index, &data,
168 len); 168 len);
169} 169}
@@ -437,7 +437,7 @@ static void _rtl_usb_rx_process_agg(struct ieee80211_hw *hw,
437 u8 *rxdesc = skb->data; 437 u8 *rxdesc = skb->data;
438 struct ieee80211_hdr *hdr; 438 struct ieee80211_hdr *hdr;
439 bool unicast = false; 439 bool unicast = false;
440 u16 fc; 440 __le16 fc;
441 struct ieee80211_rx_status rx_status = {0}; 441 struct ieee80211_rx_status rx_status = {0};
442 struct rtl_stats stats = { 442 struct rtl_stats stats = {
443 .signal = 0, 443 .signal = 0,
@@ -449,7 +449,7 @@ static void _rtl_usb_rx_process_agg(struct ieee80211_hw *hw,
449 rtlpriv->cfg->ops->query_rx_desc(hw, &stats, &rx_status, rxdesc, skb); 449 rtlpriv->cfg->ops->query_rx_desc(hw, &stats, &rx_status, rxdesc, skb);
450 skb_pull(skb, (stats.rx_drvinfo_size + stats.rx_bufshift)); 450 skb_pull(skb, (stats.rx_drvinfo_size + stats.rx_bufshift));
451 hdr = (struct ieee80211_hdr *)(skb->data); 451 hdr = (struct ieee80211_hdr *)(skb->data);
452 fc = le16_to_cpu(hdr->frame_control); 452 fc = hdr->frame_control;
453 if (!stats.crc) { 453 if (!stats.crc) {
454 memcpy(IEEE80211_SKB_RXCB(skb), &rx_status, sizeof(rx_status)); 454 memcpy(IEEE80211_SKB_RXCB(skb), &rx_status, sizeof(rx_status));
455 455
@@ -480,7 +480,7 @@ static void _rtl_usb_rx_process_noagg(struct ieee80211_hw *hw,
480 u8 *rxdesc = skb->data; 480 u8 *rxdesc = skb->data;
481 struct ieee80211_hdr *hdr; 481 struct ieee80211_hdr *hdr;
482 bool unicast = false; 482 bool unicast = false;
483 u16 fc; 483 __le16 fc;
484 struct ieee80211_rx_status rx_status = {0}; 484 struct ieee80211_rx_status rx_status = {0};
485 struct rtl_stats stats = { 485 struct rtl_stats stats = {
486 .signal = 0, 486 .signal = 0,
@@ -492,7 +492,7 @@ static void _rtl_usb_rx_process_noagg(struct ieee80211_hw *hw,
492 rtlpriv->cfg->ops->query_rx_desc(hw, &stats, &rx_status, rxdesc, skb); 492 rtlpriv->cfg->ops->query_rx_desc(hw, &stats, &rx_status, rxdesc, skb);
493 skb_pull(skb, (stats.rx_drvinfo_size + stats.rx_bufshift)); 493 skb_pull(skb, (stats.rx_drvinfo_size + stats.rx_bufshift));
494 hdr = (struct ieee80211_hdr *)(skb->data); 494 hdr = (struct ieee80211_hdr *)(skb->data);
495 fc = le16_to_cpu(hdr->frame_control); 495 fc = hdr->frame_control;
496 if (!stats.crc) { 496 if (!stats.crc) {
497 memcpy(IEEE80211_SKB_RXCB(skb), &rx_status, sizeof(rx_status)); 497 memcpy(IEEE80211_SKB_RXCB(skb), &rx_status, sizeof(rx_status));
498 498
@@ -853,7 +853,7 @@ static void _rtl_usb_tx_preprocess(struct ieee80211_hw *hw, struct sk_buff *skb,
853 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); 853 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
854 struct rtl_tx_desc *pdesc = NULL; 854 struct rtl_tx_desc *pdesc = NULL;
855 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)(skb->data); 855 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)(skb->data);
856 u16 fc = le16_to_cpu(hdr->frame_control); 856 __le16 fc = hdr->frame_control;
857 u8 *pda_addr = hdr->addr1; 857 u8 *pda_addr = hdr->addr1;
858 /* ssn */ 858 /* ssn */
859 u8 *qc = NULL; 859 u8 *qc = NULL;
@@ -892,7 +892,7 @@ static int rtl_usb_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
892 struct rtl_usb *rtlusb = rtl_usbdev(rtl_usbpriv(hw)); 892 struct rtl_usb *rtlusb = rtl_usbdev(rtl_usbpriv(hw));
893 struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw)); 893 struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
894 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)(skb->data); 894 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)(skb->data);
895 u16 fc = le16_to_cpu(hdr->frame_control); 895 __le16 fc = hdr->frame_control;
896 u16 hw_queue; 896 u16 hw_queue;
897 897
898 if (unlikely(is_hal_stop(rtlhal))) 898 if (unlikely(is_hal_stop(rtlhal)))
diff --git a/drivers/net/wireless/rtlwifi/usb.h b/drivers/net/wireless/rtlwifi/usb.h
index c83311655104..abadfe918d30 100644
--- a/drivers/net/wireless/rtlwifi/usb.h
+++ b/drivers/net/wireless/rtlwifi/usb.h
@@ -114,7 +114,7 @@ struct rtl_usb {
114 u32 irq_mask[2]; 114 u32 irq_mask[2];
115 bool irq_enabled; 115 bool irq_enabled;
116 116
117 u16 (*usb_mq_to_hwq)(u16 fc, u16 mac80211_queue_index); 117 u16 (*usb_mq_to_hwq)(__le16 fc, u16 mac80211_queue_index);
118 118
119 /* Tx */ 119 /* Tx */
120 u8 out_ep_nums ; 120 u8 out_ep_nums ;
diff --git a/drivers/net/wireless/rtlwifi/wifi.h b/drivers/net/wireless/rtlwifi/wifi.h
index c0f8140e8874..053943967a1c 100644
--- a/drivers/net/wireless/rtlwifi/wifi.h
+++ b/drivers/net/wireless/rtlwifi/wifi.h
@@ -1427,7 +1427,7 @@ struct rtl_hal_usbint_cfg {
1427 1427
1428 /* endpoint mapping */ 1428 /* endpoint mapping */
1429 int (*usb_endpoint_mapping)(struct ieee80211_hw *hw); 1429 int (*usb_endpoint_mapping)(struct ieee80211_hw *hw);
1430 u16 (*usb_mq_to_hwq)(u16 fc, u16 mac80211_queue_index); 1430 u16 (*usb_mq_to_hwq)(__le16 fc, u16 mac80211_queue_index);
1431}; 1431};
1432 1432
1433struct rtl_hal_cfg { 1433struct rtl_hal_cfg {
@@ -1646,7 +1646,7 @@ struct bt_coexist_info {
1646#define READEF2BYTE(_ptr) \ 1646#define READEF2BYTE(_ptr) \
1647 EF2BYTE(*((u16 *)(_ptr))) 1647 EF2BYTE(*((u16 *)(_ptr)))
1648#define READEF4BYTE(_ptr) \ 1648#define READEF4BYTE(_ptr) \
1649 EF4BYTE(*((u32 *)(_ptr))) 1649 EF4BYTE(*((__le32 *)(_ptr)))
1650 1650
1651/* Write data to memory */ 1651/* Write data to memory */
1652#define WRITEEF1BYTE(_ptr, _val) \ 1652#define WRITEEF1BYTE(_ptr, _val) \
@@ -1759,10 +1759,10 @@ Set subfield of little-endian 4-byte value to specified value. */
1759#define packet_get_type(_packet) (EF1BYTE((_packet).octet[0]) & 0xFC) 1759#define packet_get_type(_packet) (EF1BYTE((_packet).octet[0]) & 0xFC)
1760#define RTL_WATCH_DOG_TIME 2000 1760#define RTL_WATCH_DOG_TIME 2000
1761#define MSECS(t) msecs_to_jiffies(t) 1761#define MSECS(t) msecs_to_jiffies(t)
1762#define WLAN_FC_GET_VERS(fc) ((fc) & IEEE80211_FCTL_VERS) 1762#define WLAN_FC_GET_VERS(fc) (le16_to_cpu(fc) & IEEE80211_FCTL_VERS)
1763#define WLAN_FC_GET_TYPE(fc) ((fc) & IEEE80211_FCTL_FTYPE) 1763#define WLAN_FC_GET_TYPE(fc) (le16_to_cpu(fc) & IEEE80211_FCTL_FTYPE)
1764#define WLAN_FC_GET_STYPE(fc) ((fc) & IEEE80211_FCTL_STYPE) 1764#define WLAN_FC_GET_STYPE(fc) (le16_to_cpu(fc) & IEEE80211_FCTL_STYPE)
1765#define WLAN_FC_MORE_DATA(fc) ((fc) & IEEE80211_FCTL_MOREDATA) 1765#define WLAN_FC_MORE_DATA(fc) (le16_to_cpu(fc) & IEEE80211_FCTL_MOREDATA)
1766#define SEQ_TO_SN(seq) (((seq) & IEEE80211_SCTL_SEQ) >> 4) 1766#define SEQ_TO_SN(seq) (((seq) & IEEE80211_SCTL_SEQ) >> 4)
1767#define SN_TO_SEQ(ssn) (((ssn) << 4) & IEEE80211_SCTL_SEQ) 1767#define SN_TO_SEQ(ssn) (((ssn) << 4) & IEEE80211_SCTL_SEQ)
1768#define MAX_SN ((IEEE80211_SCTL_SEQ) >> 4) 1768#define MAX_SN ((IEEE80211_SCTL_SEQ) >> 4)
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-26 11:18:46 -0500