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authorLinus Torvalds <torvalds@woody.linux-foundation.org>2007-07-20 11:46:42 -0400
committerLinus Torvalds <torvalds@woody.linux-foundation.org>2007-07-20 11:46:42 -0400
commitdee2383784212c67819fdda1cbd4339f11d23b99 (patch)
treec6ec906c99c220c4a3894504195fc9f9b2d0f286 /drivers
parente609ccc3161ead8a685b15533d9b6958ed368358 (diff)
parent5ddf24c5ea9d715dc4f5d5d5dd1c9337d90466dc (diff)
Merge branch 'upstream-linus' of master.kernel.org:/pub/scm/linux/kernel/git/jgarzik/libata-dev
* 'upstream-linus' of master.kernel.org:/pub/scm/linux/kernel/git/jgarzik/libata-dev: (29 commits) libata: implement EH fast drain libata: schedule probing after SError access failure during autopsy libata: clear HOTPLUG flag after a reset libata: reorganize ata_ehi_hotplugged() libata: improve SCSI scan failure handling libata: quickly trigger SATA SPD down after debouncing failed libata: improve SATA PHY speed down logic The SATA controller device ID is different according to ahci: implement SCR_NOTIFICATION r/w ahci: make NO_NCQ handling more consistent libata: make ->scr_read/write callbacks return error code libata: implement AC_ERR_NCQ libata: improve EH report formatting sata_sil24: separate out sil24_do_softreset() sata_sil24: separate out sil24_exec_polled_cmd() sata_sil24: replace sil24_update_tf() with sil24_read_tf() ahci: separate out ahci_do_softreset() ahci: separate out ahci_exec_polled_cmd() ahci: separate out ahci_kick_engine() ahci: use deadline instead of fixed timeout for 1st FIS for SRST ...
Diffstat (limited to 'drivers')
-rw-r--r--drivers/ata/ahci.c255
-rw-r--r--drivers/ata/libata-core.c79
-rw-r--r--drivers/ata/libata-eh.c204
-rw-r--r--drivers/ata/libata-scsi.c63
-rw-r--r--drivers/ata/libata-sff.c4
-rw-r--r--drivers/ata/libata.h3
-rw-r--r--drivers/ata/pata_platform.c5
-rw-r--r--drivers/ata/pata_scc.c29
-rw-r--r--drivers/ata/sata_inic162x.c16
-rw-r--r--drivers/ata/sata_mv.c203
-rw-r--r--drivers/ata/sata_nv.c38
-rw-r--r--drivers/ata/sata_promise.c25
-rw-r--r--drivers/ata/sata_qstor.c18
-rw-r--r--drivers/ata/sata_sil.c25
-rw-r--r--drivers/ata/sata_sil24.c139
-rw-r--r--drivers/ata/sata_sis.c22
-rw-r--r--drivers/ata/sata_svw.c13
-rw-r--r--drivers/ata/sata_uli.c16
-rw-r--r--drivers/ata/sata_via.c27
-rw-r--r--drivers/ata/sata_vsc.c13
20 files changed, 799 insertions, 398 deletions
diff --git a/drivers/ata/ahci.c b/drivers/ata/ahci.c
index 11e4eb9f304e..06f212ff2b4f 100644
--- a/drivers/ata/ahci.c
+++ b/drivers/ata/ahci.c
@@ -99,6 +99,7 @@ enum {
99 HOST_CAP_SSC = (1 << 14), /* Slumber capable */ 99 HOST_CAP_SSC = (1 << 14), /* Slumber capable */
100 HOST_CAP_CLO = (1 << 24), /* Command List Override support */ 100 HOST_CAP_CLO = (1 << 24), /* Command List Override support */
101 HOST_CAP_SSS = (1 << 27), /* Staggered Spin-up */ 101 HOST_CAP_SSS = (1 << 27), /* Staggered Spin-up */
102 HOST_CAP_SNTF = (1 << 29), /* SNotification register */
102 HOST_CAP_NCQ = (1 << 30), /* Native Command Queueing */ 103 HOST_CAP_NCQ = (1 << 30), /* Native Command Queueing */
103 HOST_CAP_64 = (1 << 31), /* PCI DAC (64-bit DMA) support */ 104 HOST_CAP_64 = (1 << 31), /* PCI DAC (64-bit DMA) support */
104 105
@@ -113,11 +114,11 @@ enum {
113 PORT_TFDATA = 0x20, /* taskfile data */ 114 PORT_TFDATA = 0x20, /* taskfile data */
114 PORT_SIG = 0x24, /* device TF signature */ 115 PORT_SIG = 0x24, /* device TF signature */
115 PORT_CMD_ISSUE = 0x38, /* command issue */ 116 PORT_CMD_ISSUE = 0x38, /* command issue */
116 PORT_SCR = 0x28, /* SATA phy register block */
117 PORT_SCR_STAT = 0x28, /* SATA phy register: SStatus */ 117 PORT_SCR_STAT = 0x28, /* SATA phy register: SStatus */
118 PORT_SCR_CTL = 0x2c, /* SATA phy register: SControl */ 118 PORT_SCR_CTL = 0x2c, /* SATA phy register: SControl */
119 PORT_SCR_ERR = 0x30, /* SATA phy register: SError */ 119 PORT_SCR_ERR = 0x30, /* SATA phy register: SError */
120 PORT_SCR_ACT = 0x34, /* SATA phy register: SActive */ 120 PORT_SCR_ACT = 0x34, /* SATA phy register: SActive */
121 PORT_SCR_NTF = 0x3c, /* SATA phy register: SNotification */
121 122
122 /* PORT_IRQ_{STAT,MASK} bits */ 123 /* PORT_IRQ_{STAT,MASK} bits */
123 PORT_IRQ_COLD_PRES = (1 << 31), /* cold presence detect */ 124 PORT_IRQ_COLD_PRES = (1 << 31), /* cold presence detect */
@@ -216,8 +217,8 @@ struct ahci_port_priv {
216 unsigned int ncq_saw_sdb:1; 217 unsigned int ncq_saw_sdb:1;
217}; 218};
218 219
219static u32 ahci_scr_read (struct ata_port *ap, unsigned int sc_reg); 220static int ahci_scr_read(struct ata_port *ap, unsigned int sc_reg, u32 *val);
220static void ahci_scr_write (struct ata_port *ap, unsigned int sc_reg, u32 val); 221static int ahci_scr_write(struct ata_port *ap, unsigned int sc_reg, u32 val);
221static int ahci_init_one (struct pci_dev *pdev, const struct pci_device_id *ent); 222static int ahci_init_one (struct pci_dev *pdev, const struct pci_device_id *ent);
222static unsigned int ahci_qc_issue(struct ata_queued_cmd *qc); 223static unsigned int ahci_qc_issue(struct ata_queued_cmd *qc);
223static void ahci_irq_clear(struct ata_port *ap); 224static void ahci_irq_clear(struct ata_port *ap);
@@ -417,7 +418,10 @@ static const struct pci_device_id ahci_pci_tbl[] = {
417 418
418 /* ATI */ 419 /* ATI */
419 { PCI_VDEVICE(ATI, 0x4380), board_ahci_sb600 }, /* ATI SB600 */ 420 { PCI_VDEVICE(ATI, 0x4380), board_ahci_sb600 }, /* ATI SB600 */
420 { PCI_VDEVICE(ATI, 0x4390), board_ahci_sb600 }, /* ATI SB700 */ 421 { PCI_VDEVICE(ATI, 0x4390), board_ahci_sb600 }, /* ATI SB700 IDE */
422 { PCI_VDEVICE(ATI, 0x4391), board_ahci_sb600 }, /* ATI SB700 AHCI */
423 { PCI_VDEVICE(ATI, 0x4392), board_ahci_sb600 }, /* ATI SB700 nraid5 */
424 { PCI_VDEVICE(ATI, 0x4393), board_ahci_sb600 }, /* ATI SB700 raid5 */
421 425
422 /* VIA */ 426 /* VIA */
423 { PCI_VDEVICE(VIA, 0x3349), board_ahci_vt8251 }, /* VIA VT8251 */ 427 { PCI_VDEVICE(VIA, 0x3349), board_ahci_vt8251 }, /* VIA VT8251 */
@@ -545,13 +549,19 @@ static void ahci_save_initial_config(struct pci_dev *pdev,
545 hpriv->saved_cap = cap = readl(mmio + HOST_CAP); 549 hpriv->saved_cap = cap = readl(mmio + HOST_CAP);
546 hpriv->saved_port_map = port_map = readl(mmio + HOST_PORTS_IMPL); 550 hpriv->saved_port_map = port_map = readl(mmio + HOST_PORTS_IMPL);
547 551
548 /* some chips lie about 64bit support */ 552 /* some chips have errata preventing 64bit use */
549 if ((cap & HOST_CAP_64) && (pi->flags & AHCI_FLAG_32BIT_ONLY)) { 553 if ((cap & HOST_CAP_64) && (pi->flags & AHCI_FLAG_32BIT_ONLY)) {
550 dev_printk(KERN_INFO, &pdev->dev, 554 dev_printk(KERN_INFO, &pdev->dev,
551 "controller can't do 64bit DMA, forcing 32bit\n"); 555 "controller can't do 64bit DMA, forcing 32bit\n");
552 cap &= ~HOST_CAP_64; 556 cap &= ~HOST_CAP_64;
553 } 557 }
554 558
559 if ((cap & HOST_CAP_NCQ) && (pi->flags & AHCI_FLAG_NO_NCQ)) {
560 dev_printk(KERN_INFO, &pdev->dev,
561 "controller can't do NCQ, turning off CAP_NCQ\n");
562 cap &= ~HOST_CAP_NCQ;
563 }
564
555 /* fixup zero port_map */ 565 /* fixup zero port_map */
556 if (!port_map) { 566 if (!port_map) {
557 port_map = (1 << ahci_nr_ports(cap)) - 1; 567 port_map = (1 << ahci_nr_ports(cap)) - 1;
@@ -625,38 +635,45 @@ static void ahci_restore_initial_config(struct ata_host *host)
625 (void) readl(mmio + HOST_PORTS_IMPL); /* flush */ 635 (void) readl(mmio + HOST_PORTS_IMPL); /* flush */
626} 636}
627 637
628static u32 ahci_scr_read (struct ata_port *ap, unsigned int sc_reg_in) 638static unsigned ahci_scr_offset(struct ata_port *ap, unsigned int sc_reg)
629{ 639{
630 unsigned int sc_reg; 640 static const int offset[] = {
631 641 [SCR_STATUS] = PORT_SCR_STAT,
632 switch (sc_reg_in) { 642 [SCR_CONTROL] = PORT_SCR_CTL,
633 case SCR_STATUS: sc_reg = 0; break; 643 [SCR_ERROR] = PORT_SCR_ERR,
634 case SCR_CONTROL: sc_reg = 1; break; 644 [SCR_ACTIVE] = PORT_SCR_ACT,
635 case SCR_ERROR: sc_reg = 2; break; 645 [SCR_NOTIFICATION] = PORT_SCR_NTF,
636 case SCR_ACTIVE: sc_reg = 3; break; 646 };
637 default: 647 struct ahci_host_priv *hpriv = ap->host->private_data;
638 return 0xffffffffU;
639 }
640 648
641 return readl(ap->ioaddr.scr_addr + (sc_reg * 4)); 649 if (sc_reg < ARRAY_SIZE(offset) &&
650 (sc_reg != SCR_NOTIFICATION || (hpriv->cap & HOST_CAP_SNTF)))
651 return offset[sc_reg];
652 return 0;
642} 653}
643 654
644 655static int ahci_scr_read(struct ata_port *ap, unsigned int sc_reg, u32 *val)
645static void ahci_scr_write (struct ata_port *ap, unsigned int sc_reg_in,
646 u32 val)
647{ 656{
648 unsigned int sc_reg; 657 void __iomem *port_mmio = ahci_port_base(ap);
649 658 int offset = ahci_scr_offset(ap, sc_reg);
650 switch (sc_reg_in) { 659
651 case SCR_STATUS: sc_reg = 0; break; 660 if (offset) {
652 case SCR_CONTROL: sc_reg = 1; break; 661 *val = readl(port_mmio + offset);
653 case SCR_ERROR: sc_reg = 2; break; 662 return 0;
654 case SCR_ACTIVE: sc_reg = 3; break;
655 default:
656 return;
657 } 663 }
664 return -EINVAL;
665}
658 666
659 writel(val, ap->ioaddr.scr_addr + (sc_reg * 4)); 667static int ahci_scr_write(struct ata_port *ap, unsigned int sc_reg, u32 val)
668{
669 void __iomem *port_mmio = ahci_port_base(ap);
670 int offset = ahci_scr_offset(ap, sc_reg);
671
672 if (offset) {
673 writel(val, port_mmio + offset);
674 return 0;
675 }
676 return -EINVAL;
660} 677}
661 678
662static void ahci_start_engine(struct ata_port *ap) 679static void ahci_start_engine(struct ata_port *ap)
@@ -948,37 +965,87 @@ static void ahci_fill_cmd_slot(struct ahci_port_priv *pp, unsigned int tag,
948 pp->cmd_slot[tag].tbl_addr_hi = cpu_to_le32((cmd_tbl_dma >> 16) >> 16); 965 pp->cmd_slot[tag].tbl_addr_hi = cpu_to_le32((cmd_tbl_dma >> 16) >> 16);
949} 966}
950 967
951static int ahci_clo(struct ata_port *ap) 968static int ahci_kick_engine(struct ata_port *ap, int force_restart)
952{ 969{
953 void __iomem *port_mmio = ap->ioaddr.cmd_addr; 970 void __iomem *port_mmio = ap->ioaddr.cmd_addr;
954 struct ahci_host_priv *hpriv = ap->host->private_data; 971 struct ahci_host_priv *hpriv = ap->host->private_data;
955 u32 tmp; 972 u32 tmp;
973 int busy, rc;
974
975 /* do we need to kick the port? */
976 busy = ahci_check_status(ap) & (ATA_BUSY | ATA_DRQ);
977 if (!busy && !force_restart)
978 return 0;
979
980 /* stop engine */
981 rc = ahci_stop_engine(ap);
982 if (rc)
983 goto out_restart;
956 984
957 if (!(hpriv->cap & HOST_CAP_CLO)) 985 /* need to do CLO? */
958 return -EOPNOTSUPP; 986 if (!busy) {
987 rc = 0;
988 goto out_restart;
989 }
959 990
991 if (!(hpriv->cap & HOST_CAP_CLO)) {
992 rc = -EOPNOTSUPP;
993 goto out_restart;
994 }
995
996 /* perform CLO */
960 tmp = readl(port_mmio + PORT_CMD); 997 tmp = readl(port_mmio + PORT_CMD);
961 tmp |= PORT_CMD_CLO; 998 tmp |= PORT_CMD_CLO;
962 writel(tmp, port_mmio + PORT_CMD); 999 writel(tmp, port_mmio + PORT_CMD);
963 1000
1001 rc = 0;
964 tmp = ata_wait_register(port_mmio + PORT_CMD, 1002 tmp = ata_wait_register(port_mmio + PORT_CMD,
965 PORT_CMD_CLO, PORT_CMD_CLO, 1, 500); 1003 PORT_CMD_CLO, PORT_CMD_CLO, 1, 500);
966 if (tmp & PORT_CMD_CLO) 1004 if (tmp & PORT_CMD_CLO)
967 return -EIO; 1005 rc = -EIO;
968 1006
969 return 0; 1007 /* restart engine */
1008 out_restart:
1009 ahci_start_engine(ap);
1010 return rc;
970} 1011}
971 1012
972static int ahci_softreset(struct ata_port *ap, unsigned int *class, 1013static int ahci_exec_polled_cmd(struct ata_port *ap, int pmp,
973 unsigned long deadline) 1014 struct ata_taskfile *tf, int is_cmd, u16 flags,
1015 unsigned long timeout_msec)
974{ 1016{
1017 const u32 cmd_fis_len = 5; /* five dwords */
975 struct ahci_port_priv *pp = ap->private_data; 1018 struct ahci_port_priv *pp = ap->private_data;
976 void __iomem *port_mmio = ahci_port_base(ap); 1019 void __iomem *port_mmio = ahci_port_base(ap);
977 const u32 cmd_fis_len = 5; /* five dwords */ 1020 u8 *fis = pp->cmd_tbl;
1021 u32 tmp;
1022
1023 /* prep the command */
1024 ata_tf_to_fis(tf, pmp, is_cmd, fis);
1025 ahci_fill_cmd_slot(pp, 0, cmd_fis_len | flags | (pmp << 12));
1026
1027 /* issue & wait */
1028 writel(1, port_mmio + PORT_CMD_ISSUE);
1029
1030 if (timeout_msec) {
1031 tmp = ata_wait_register(port_mmio + PORT_CMD_ISSUE, 0x1, 0x1,
1032 1, timeout_msec);
1033 if (tmp & 0x1) {
1034 ahci_kick_engine(ap, 1);
1035 return -EBUSY;
1036 }
1037 } else
1038 readl(port_mmio + PORT_CMD_ISSUE); /* flush */
1039
1040 return 0;
1041}
1042
1043static int ahci_do_softreset(struct ata_port *ap, unsigned int *class,
1044 int pmp, unsigned long deadline)
1045{
978 const char *reason = NULL; 1046 const char *reason = NULL;
1047 unsigned long now, msecs;
979 struct ata_taskfile tf; 1048 struct ata_taskfile tf;
980 u32 tmp;
981 u8 *fis;
982 int rc; 1049 int rc;
983 1050
984 DPRINTK("ENTER\n"); 1051 DPRINTK("ENTER\n");
@@ -990,43 +1057,22 @@ static int ahci_softreset(struct ata_port *ap, unsigned int *class,
990 } 1057 }
991 1058
992 /* prepare for SRST (AHCI-1.1 10.4.1) */ 1059 /* prepare for SRST (AHCI-1.1 10.4.1) */
993 rc = ahci_stop_engine(ap); 1060 rc = ahci_kick_engine(ap, 1);
994 if (rc) { 1061 if (rc)
995 reason = "failed to stop engine"; 1062 ata_port_printk(ap, KERN_WARNING,
996 goto fail_restart; 1063 "failed to reset engine (errno=%d)", rc);
997 }
998
999 /* check BUSY/DRQ, perform Command List Override if necessary */
1000 if (ahci_check_status(ap) & (ATA_BUSY | ATA_DRQ)) {
1001 rc = ahci_clo(ap);
1002
1003 if (rc == -EOPNOTSUPP) {
1004 reason = "port busy but CLO unavailable";
1005 goto fail_restart;
1006 } else if (rc) {
1007 reason = "port busy but CLO failed";
1008 goto fail_restart;
1009 }
1010 }
1011
1012 /* restart engine */
1013 ahci_start_engine(ap);
1014 1064
1015 ata_tf_init(ap->device, &tf); 1065 ata_tf_init(ap->device, &tf);
1016 fis = pp->cmd_tbl;
1017 1066
1018 /* issue the first D2H Register FIS */ 1067 /* issue the first D2H Register FIS */
1019 ahci_fill_cmd_slot(pp, 0, 1068 msecs = 0;
1020 cmd_fis_len | AHCI_CMD_RESET | AHCI_CMD_CLR_BUSY); 1069 now = jiffies;
1070 if (time_after(now, deadline))
1071 msecs = jiffies_to_msecs(deadline - now);
1021 1072
1022 tf.ctl |= ATA_SRST; 1073 tf.ctl |= ATA_SRST;
1023 ata_tf_to_fis(&tf, fis, 0); 1074 if (ahci_exec_polled_cmd(ap, pmp, &tf, 0,
1024 fis[1] &= ~(1 << 7); /* turn off Command FIS bit */ 1075 AHCI_CMD_RESET | AHCI_CMD_CLR_BUSY, msecs)) {
1025
1026 writel(1, port_mmio + PORT_CMD_ISSUE);
1027
1028 tmp = ata_wait_register(port_mmio + PORT_CMD_ISSUE, 0x1, 0x1, 1, 500);
1029 if (tmp & 0x1) {
1030 rc = -EIO; 1076 rc = -EIO;
1031 reason = "1st FIS failed"; 1077 reason = "1st FIS failed";
1032 goto fail; 1078 goto fail;
@@ -1036,14 +1082,8 @@ static int ahci_softreset(struct ata_port *ap, unsigned int *class,
1036 msleep(1); 1082 msleep(1);
1037 1083
1038 /* issue the second D2H Register FIS */ 1084 /* issue the second D2H Register FIS */
1039 ahci_fill_cmd_slot(pp, 0, cmd_fis_len);
1040
1041 tf.ctl &= ~ATA_SRST; 1085 tf.ctl &= ~ATA_SRST;
1042 ata_tf_to_fis(&tf, fis, 0); 1086 ahci_exec_polled_cmd(ap, pmp, &tf, 0, 0, 0);
1043 fis[1] &= ~(1 << 7); /* turn off Command FIS bit */
1044
1045 writel(1, port_mmio + PORT_CMD_ISSUE);
1046 readl(port_mmio + PORT_CMD_ISSUE); /* flush */
1047 1087
1048 /* spec mandates ">= 2ms" before checking status. 1088 /* spec mandates ">= 2ms" before checking status.
1049 * We wait 150ms, because that was the magic delay used for 1089 * We wait 150ms, because that was the magic delay used for
@@ -1066,13 +1106,17 @@ static int ahci_softreset(struct ata_port *ap, unsigned int *class,
1066 DPRINTK("EXIT, class=%u\n", *class); 1106 DPRINTK("EXIT, class=%u\n", *class);
1067 return 0; 1107 return 0;
1068 1108
1069 fail_restart:
1070 ahci_start_engine(ap);
1071 fail: 1109 fail:
1072 ata_port_printk(ap, KERN_ERR, "softreset failed (%s)\n", reason); 1110 ata_port_printk(ap, KERN_ERR, "softreset failed (%s)\n", reason);
1073 return rc; 1111 return rc;
1074} 1112}
1075 1113
1114static int ahci_softreset(struct ata_port *ap, unsigned int *class,
1115 unsigned long deadline)
1116{
1117 return ahci_do_softreset(ap, class, 0, deadline);
1118}
1119
1076static int ahci_hardreset(struct ata_port *ap, unsigned int *class, 1120static int ahci_hardreset(struct ata_port *ap, unsigned int *class,
1077 unsigned long deadline) 1121 unsigned long deadline)
1078{ 1122{
@@ -1088,7 +1132,7 @@ static int ahci_hardreset(struct ata_port *ap, unsigned int *class,
1088 /* clear D2H reception area to properly wait for D2H FIS */ 1132 /* clear D2H reception area to properly wait for D2H FIS */
1089 ata_tf_init(ap->device, &tf); 1133 ata_tf_init(ap->device, &tf);
1090 tf.command = 0x80; 1134 tf.command = 0x80;
1091 ata_tf_to_fis(&tf, d2h_fis, 0); 1135 ata_tf_to_fis(&tf, 0, 0, d2h_fis);
1092 1136
1093 rc = sata_std_hardreset(ap, class, deadline); 1137 rc = sata_std_hardreset(ap, class, deadline);
1094 1138
@@ -1106,6 +1150,7 @@ static int ahci_hardreset(struct ata_port *ap, unsigned int *class,
1106static int ahci_vt8251_hardreset(struct ata_port *ap, unsigned int *class, 1150static int ahci_vt8251_hardreset(struct ata_port *ap, unsigned int *class,
1107 unsigned long deadline) 1151 unsigned long deadline)
1108{ 1152{
1153 u32 serror;
1109 int rc; 1154 int rc;
1110 1155
1111 DPRINTK("ENTER\n"); 1156 DPRINTK("ENTER\n");
@@ -1116,7 +1161,8 @@ static int ahci_vt8251_hardreset(struct ata_port *ap, unsigned int *class,
1116 deadline); 1161 deadline);
1117 1162
1118 /* vt8251 needs SError cleared for the port to operate */ 1163 /* vt8251 needs SError cleared for the port to operate */
1119 ahci_scr_write(ap, SCR_ERROR, ahci_scr_read(ap, SCR_ERROR)); 1164 ahci_scr_read(ap, SCR_ERROR, &serror);
1165 ahci_scr_write(ap, SCR_ERROR, serror);
1120 1166
1121 ahci_start_engine(ap); 1167 ahci_start_engine(ap);
1122 1168
@@ -1205,7 +1251,7 @@ static void ahci_qc_prep(struct ata_queued_cmd *qc)
1205 */ 1251 */
1206 cmd_tbl = pp->cmd_tbl + qc->tag * AHCI_CMD_TBL_SZ; 1252 cmd_tbl = pp->cmd_tbl + qc->tag * AHCI_CMD_TBL_SZ;
1207 1253
1208 ata_tf_to_fis(&qc->tf, cmd_tbl, 0); 1254 ata_tf_to_fis(&qc->tf, 0, 1, cmd_tbl);
1209 if (is_atapi) { 1255 if (is_atapi) {
1210 memset(cmd_tbl + AHCI_CMD_TBL_CDB, 0, 32); 1256 memset(cmd_tbl + AHCI_CMD_TBL_CDB, 0, 32);
1211 memcpy(cmd_tbl + AHCI_CMD_TBL_CDB, qc->cdb, qc->dev->cdb_len); 1257 memcpy(cmd_tbl + AHCI_CMD_TBL_CDB, qc->cdb, qc->dev->cdb_len);
@@ -1238,7 +1284,7 @@ static void ahci_error_intr(struct ata_port *ap, u32 irq_stat)
1238 ata_ehi_clear_desc(ehi); 1284 ata_ehi_clear_desc(ehi);
1239 1285
1240 /* AHCI needs SError cleared; otherwise, it might lock up */ 1286 /* AHCI needs SError cleared; otherwise, it might lock up */
1241 serror = ahci_scr_read(ap, SCR_ERROR); 1287 ahci_scr_read(ap, SCR_ERROR, &serror);
1242 ahci_scr_write(ap, SCR_ERROR, serror); 1288 ahci_scr_write(ap, SCR_ERROR, serror);
1243 1289
1244 /* analyze @irq_stat */ 1290 /* analyze @irq_stat */
@@ -1262,12 +1308,12 @@ static void ahci_error_intr(struct ata_port *ap, u32 irq_stat)
1262 if (irq_stat & PORT_IRQ_IF_ERR) { 1308 if (irq_stat & PORT_IRQ_IF_ERR) {
1263 err_mask |= AC_ERR_ATA_BUS; 1309 err_mask |= AC_ERR_ATA_BUS;
1264 action |= ATA_EH_SOFTRESET; 1310 action |= ATA_EH_SOFTRESET;
1265 ata_ehi_push_desc(ehi, ", interface fatal error"); 1311 ata_ehi_push_desc(ehi, "interface fatal error");
1266 } 1312 }
1267 1313
1268 if (irq_stat & (PORT_IRQ_CONNECT | PORT_IRQ_PHYRDY)) { 1314 if (irq_stat & (PORT_IRQ_CONNECT | PORT_IRQ_PHYRDY)) {
1269 ata_ehi_hotplugged(ehi); 1315 ata_ehi_hotplugged(ehi);
1270 ata_ehi_push_desc(ehi, ", %s", irq_stat & PORT_IRQ_CONNECT ? 1316 ata_ehi_push_desc(ehi, "%s", irq_stat & PORT_IRQ_CONNECT ?
1271 "connection status changed" : "PHY RDY changed"); 1317 "connection status changed" : "PHY RDY changed");
1272 } 1318 }
1273 1319
@@ -1276,7 +1322,7 @@ static void ahci_error_intr(struct ata_port *ap, u32 irq_stat)
1276 1322
1277 err_mask |= AC_ERR_HSM; 1323 err_mask |= AC_ERR_HSM;
1278 action |= ATA_EH_SOFTRESET; 1324 action |= ATA_EH_SOFTRESET;
1279 ata_ehi_push_desc(ehi, ", unknown FIS %08x %08x %08x %08x", 1325 ata_ehi_push_desc(ehi, "unknown FIS %08x %08x %08x %08x",
1280 unk[0], unk[1], unk[2], unk[3]); 1326 unk[0], unk[1], unk[2], unk[3]);
1281 } 1327 }
1282 1328
@@ -1512,11 +1558,17 @@ static void ahci_post_internal_cmd(struct ata_queued_cmd *qc)
1512{ 1558{
1513 struct ata_port *ap = qc->ap; 1559 struct ata_port *ap = qc->ap;
1514 1560
1515 if (qc->flags & ATA_QCFLAG_FAILED) { 1561 /* make DMA engine forget about the failed command */
1516 /* make DMA engine forget about the failed command */ 1562 if (qc->flags & ATA_QCFLAG_FAILED)
1517 ahci_stop_engine(ap); 1563 ahci_kick_engine(ap, 1);
1518 ahci_start_engine(ap); 1564}
1519 } 1565
1566static int ahci_port_resume(struct ata_port *ap)
1567{
1568 ahci_power_up(ap);
1569 ahci_start_port(ap);
1570
1571 return 0;
1520} 1572}
1521 1573
1522#ifdef CONFIG_PM 1574#ifdef CONFIG_PM
@@ -1536,14 +1588,6 @@ static int ahci_port_suspend(struct ata_port *ap, pm_message_t mesg)
1536 return rc; 1588 return rc;
1537} 1589}
1538 1590
1539static int ahci_port_resume(struct ata_port *ap)
1540{
1541 ahci_power_up(ap);
1542 ahci_start_port(ap);
1543
1544 return 0;
1545}
1546
1547static int ahci_pci_device_suspend(struct pci_dev *pdev, pm_message_t mesg) 1591static int ahci_pci_device_suspend(struct pci_dev *pdev, pm_message_t mesg)
1548{ 1592{
1549 struct ata_host *host = dev_get_drvdata(&pdev->dev); 1593 struct ata_host *host = dev_get_drvdata(&pdev->dev);
@@ -1734,12 +1778,13 @@ static void ahci_print_info(struct ata_host *host)
1734 1778
1735 dev_printk(KERN_INFO, &pdev->dev, 1779 dev_printk(KERN_INFO, &pdev->dev,
1736 "flags: " 1780 "flags: "
1737 "%s%s%s%s%s%s" 1781 "%s%s%s%s%s%s%s"
1738 "%s%s%s%s%s%s%s\n" 1782 "%s%s%s%s%s%s%s\n"
1739 , 1783 ,
1740 1784
1741 cap & (1 << 31) ? "64bit " : "", 1785 cap & (1 << 31) ? "64bit " : "",
1742 cap & (1 << 30) ? "ncq " : "", 1786 cap & (1 << 30) ? "ncq " : "",
1787 cap & (1 << 29) ? "sntf " : "",
1743 cap & (1 << 28) ? "ilck " : "", 1788 cap & (1 << 28) ? "ilck " : "",
1744 cap & (1 << 27) ? "stag " : "", 1789 cap & (1 << 27) ? "stag " : "",
1745 cap & (1 << 26) ? "pm " : "", 1790 cap & (1 << 26) ? "pm " : "",
@@ -1794,7 +1839,7 @@ static int ahci_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
1794 ahci_save_initial_config(pdev, &pi, hpriv); 1839 ahci_save_initial_config(pdev, &pi, hpriv);
1795 1840
1796 /* prepare host */ 1841 /* prepare host */
1797 if (!(pi.flags & AHCI_FLAG_NO_NCQ) && (hpriv->cap & HOST_CAP_NCQ)) 1842 if (hpriv->cap & HOST_CAP_NCQ)
1798 pi.flags |= ATA_FLAG_NCQ; 1843 pi.flags |= ATA_FLAG_NCQ;
1799 1844
1800 host = ata_host_alloc_pinfo(&pdev->dev, ppi, fls(hpriv->port_map)); 1845 host = ata_host_alloc_pinfo(&pdev->dev, ppi, fls(hpriv->port_map));
@@ -1808,10 +1853,8 @@ static int ahci_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
1808 void __iomem *port_mmio = ahci_port_base(ap); 1853 void __iomem *port_mmio = ahci_port_base(ap);
1809 1854
1810 /* standard SATA port setup */ 1855 /* standard SATA port setup */
1811 if (hpriv->port_map & (1 << i)) { 1856 if (hpriv->port_map & (1 << i))
1812 ap->ioaddr.cmd_addr = port_mmio; 1857 ap->ioaddr.cmd_addr = port_mmio;
1813 ap->ioaddr.scr_addr = port_mmio + PORT_SCR;
1814 }
1815 1858
1816 /* disabled/not-implemented port */ 1859 /* disabled/not-implemented port */
1817 else 1860 else
diff --git a/drivers/ata/libata-core.c b/drivers/ata/libata-core.c
index 88e2dd0983b5..6001aae0b884 100644
--- a/drivers/ata/libata-core.c
+++ b/drivers/ata/libata-core.c
@@ -111,8 +111,9 @@ MODULE_VERSION(DRV_VERSION);
111/** 111/**
112 * ata_tf_to_fis - Convert ATA taskfile to SATA FIS structure 112 * ata_tf_to_fis - Convert ATA taskfile to SATA FIS structure
113 * @tf: Taskfile to convert 113 * @tf: Taskfile to convert
114 * @fis: Buffer into which data will output
115 * @pmp: Port multiplier port 114 * @pmp: Port multiplier port
115 * @is_cmd: This FIS is for command
116 * @fis: Buffer into which data will output
116 * 117 *
117 * Converts a standard ATA taskfile to a Serial ATA 118 * Converts a standard ATA taskfile to a Serial ATA
118 * FIS structure (Register - Host to Device). 119 * FIS structure (Register - Host to Device).
@@ -120,12 +121,13 @@ MODULE_VERSION(DRV_VERSION);
120 * LOCKING: 121 * LOCKING:
121 * Inherited from caller. 122 * Inherited from caller.
122 */ 123 */
123 124void ata_tf_to_fis(const struct ata_taskfile *tf, u8 pmp, int is_cmd, u8 *fis)
124void ata_tf_to_fis(const struct ata_taskfile *tf, u8 *fis, u8 pmp)
125{ 125{
126 fis[0] = 0x27; /* Register - Host to Device FIS */ 126 fis[0] = 0x27; /* Register - Host to Device FIS */
127 fis[1] = (pmp & 0xf) | (1 << 7); /* Port multiplier number, 127 fis[1] = pmp & 0xf; /* Port multiplier number*/
128 bit 7 indicates Command FIS */ 128 if (is_cmd)
129 fis[1] |= (1 << 7); /* bit 7 indicates Command FIS */
130
129 fis[2] = tf->command; 131 fis[2] = tf->command;
130 fis[3] = tf->feature; 132 fis[3] = tf->feature;
131 133
@@ -2387,21 +2389,35 @@ int sata_down_spd_limit(struct ata_port *ap)
2387 u32 sstatus, spd, mask; 2389 u32 sstatus, spd, mask;
2388 int rc, highbit; 2390 int rc, highbit;
2389 2391
2392 if (!sata_scr_valid(ap))
2393 return -EOPNOTSUPP;
2394
2395 /* If SCR can be read, use it to determine the current SPD.
2396 * If not, use cached value in ap->sata_spd.
2397 */
2390 rc = sata_scr_read(ap, SCR_STATUS, &sstatus); 2398 rc = sata_scr_read(ap, SCR_STATUS, &sstatus);
2391 if (rc) 2399 if (rc == 0)
2392 return rc; 2400 spd = (sstatus >> 4) & 0xf;
2401 else
2402 spd = ap->sata_spd;
2393 2403
2394 mask = ap->sata_spd_limit; 2404 mask = ap->sata_spd_limit;
2395 if (mask <= 1) 2405 if (mask <= 1)
2396 return -EINVAL; 2406 return -EINVAL;
2407
2408 /* unconditionally mask off the highest bit */
2397 highbit = fls(mask) - 1; 2409 highbit = fls(mask) - 1;
2398 mask &= ~(1 << highbit); 2410 mask &= ~(1 << highbit);
2399 2411
2400 spd = (sstatus >> 4) & 0xf; 2412 /* Mask off all speeds higher than or equal to the current
2401 if (spd <= 1) 2413 * one. Force 1.5Gbps if current SPD is not available.
2402 return -EINVAL; 2414 */
2403 spd--; 2415 if (spd > 1)
2404 mask &= (1 << spd) - 1; 2416 mask &= (1 << (spd - 1)) - 1;
2417 else
2418 mask &= 1;
2419
2420 /* were we already at the bottom? */
2405 if (!mask) 2421 if (!mask)
2406 return -EINVAL; 2422 return -EINVAL;
2407 2423
@@ -3251,9 +3267,11 @@ int sata_phy_debounce(struct ata_port *ap, const unsigned long *params,
3251 last = cur; 3267 last = cur;
3252 last_jiffies = jiffies; 3268 last_jiffies = jiffies;
3253 3269
3254 /* check deadline */ 3270 /* Check deadline. If debouncing failed, return
3271 * -EPIPE to tell upper layer to lower link speed.
3272 */
3255 if (time_after(jiffies, deadline)) 3273 if (time_after(jiffies, deadline))
3256 return -EBUSY; 3274 return -EPIPE;
3257 } 3275 }
3258} 3276}
3259 3277
@@ -3769,6 +3787,7 @@ static const struct ata_blacklist_entry ata_device_blacklist [] = {
3769 { "Hitachi HTS541616J9SA00", "SB4OC70P", ATA_HORKAGE_NONCQ, }, 3787 { "Hitachi HTS541616J9SA00", "SB4OC70P", ATA_HORKAGE_NONCQ, },
3770 { "WDC WD740ADFD-00NLR1", NULL, ATA_HORKAGE_NONCQ, }, 3788 { "WDC WD740ADFD-00NLR1", NULL, ATA_HORKAGE_NONCQ, },
3771 { "FUJITSU MHV2080BH", "00840028", ATA_HORKAGE_NONCQ, }, 3789 { "FUJITSU MHV2080BH", "00840028", ATA_HORKAGE_NONCQ, },
3790 { "ST9160821AS", "3.CLF", ATA_HORKAGE_NONCQ, },
3772 3791
3773 /* Devices with NCQ limits */ 3792 /* Devices with NCQ limits */
3774 3793
@@ -5729,10 +5748,8 @@ int sata_scr_valid(struct ata_port *ap)
5729 */ 5748 */
5730int sata_scr_read(struct ata_port *ap, int reg, u32 *val) 5749int sata_scr_read(struct ata_port *ap, int reg, u32 *val)
5731{ 5750{
5732 if (sata_scr_valid(ap)) { 5751 if (sata_scr_valid(ap))
5733 *val = ap->ops->scr_read(ap, reg); 5752 return ap->ops->scr_read(ap, reg, val);
5734 return 0;
5735 }
5736 return -EOPNOTSUPP; 5753 return -EOPNOTSUPP;
5737} 5754}
5738 5755
@@ -5754,10 +5771,8 @@ int sata_scr_read(struct ata_port *ap, int reg, u32 *val)
5754 */ 5771 */
5755int sata_scr_write(struct ata_port *ap, int reg, u32 val) 5772int sata_scr_write(struct ata_port *ap, int reg, u32 val)
5756{ 5773{
5757 if (sata_scr_valid(ap)) { 5774 if (sata_scr_valid(ap))
5758 ap->ops->scr_write(ap, reg, val); 5775 return ap->ops->scr_write(ap, reg, val);
5759 return 0;
5760 }
5761 return -EOPNOTSUPP; 5776 return -EOPNOTSUPP;
5762} 5777}
5763 5778
@@ -5778,10 +5793,13 @@ int sata_scr_write(struct ata_port *ap, int reg, u32 val)
5778 */ 5793 */
5779int sata_scr_write_flush(struct ata_port *ap, int reg, u32 val) 5794int sata_scr_write_flush(struct ata_port *ap, int reg, u32 val)
5780{ 5795{
5796 int rc;
5797
5781 if (sata_scr_valid(ap)) { 5798 if (sata_scr_valid(ap)) {
5782 ap->ops->scr_write(ap, reg, val); 5799 rc = ap->ops->scr_write(ap, reg, val);
5783 ap->ops->scr_read(ap, reg); 5800 if (rc == 0)
5784 return 0; 5801 rc = ap->ops->scr_read(ap, reg, &val);
5802 return rc;
5785 } 5803 }
5786 return -EOPNOTSUPP; 5804 return -EOPNOTSUPP;
5787} 5805}
@@ -5993,6 +6011,7 @@ void ata_dev_init(struct ata_device *dev)
5993 6011
5994 /* SATA spd limit is bound to the first device */ 6012 /* SATA spd limit is bound to the first device */
5995 ap->sata_spd_limit = ap->hw_sata_spd_limit; 6013 ap->sata_spd_limit = ap->hw_sata_spd_limit;
6014 ap->sata_spd = 0;
5996 6015
5997 /* High bits of dev->flags are used to record warm plug 6016 /* High bits of dev->flags are used to record warm plug
5998 * requests which occur asynchronously. Synchronize using 6017 * requests which occur asynchronously. Synchronize using
@@ -6058,6 +6077,9 @@ struct ata_port *ata_port_alloc(struct ata_host *host)
6058 INIT_WORK(&ap->scsi_rescan_task, ata_scsi_dev_rescan); 6077 INIT_WORK(&ap->scsi_rescan_task, ata_scsi_dev_rescan);
6059 INIT_LIST_HEAD(&ap->eh_done_q); 6078 INIT_LIST_HEAD(&ap->eh_done_q);
6060 init_waitqueue_head(&ap->eh_wait_q); 6079 init_waitqueue_head(&ap->eh_wait_q);
6080 init_timer_deferrable(&ap->fastdrain_timer);
6081 ap->fastdrain_timer.function = ata_eh_fastdrain_timerfn;
6082 ap->fastdrain_timer.data = (unsigned long)ap;
6061 6083
6062 ap->cbl = ATA_CBL_NONE; 6084 ap->cbl = ATA_CBL_NONE;
6063 6085
@@ -6434,7 +6456,7 @@ int ata_host_register(struct ata_host *host, struct scsi_host_template *sht)
6434 for (i = 0; i < host->n_ports; i++) { 6456 for (i = 0; i < host->n_ports; i++) {
6435 struct ata_port *ap = host->ports[i]; 6457 struct ata_port *ap = host->ports[i];
6436 6458
6437 ata_scsi_scan_host(ap); 6459 ata_scsi_scan_host(ap, 1);
6438 } 6460 }
6439 6461
6440 return 0; 6462 return 0;
@@ -6942,6 +6964,9 @@ EXPORT_SYMBOL_GPL(ata_pci_default_filter);
6942EXPORT_SYMBOL_GPL(ata_pci_clear_simplex); 6964EXPORT_SYMBOL_GPL(ata_pci_clear_simplex);
6943#endif /* CONFIG_PCI */ 6965#endif /* CONFIG_PCI */
6944 6966
6967EXPORT_SYMBOL_GPL(__ata_ehi_push_desc);
6968EXPORT_SYMBOL_GPL(ata_ehi_push_desc);
6969EXPORT_SYMBOL_GPL(ata_ehi_clear_desc);
6945EXPORT_SYMBOL_GPL(ata_eng_timeout); 6970EXPORT_SYMBOL_GPL(ata_eng_timeout);
6946EXPORT_SYMBOL_GPL(ata_port_schedule_eh); 6971EXPORT_SYMBOL_GPL(ata_port_schedule_eh);
6947EXPORT_SYMBOL_GPL(ata_port_abort); 6972EXPORT_SYMBOL_GPL(ata_port_abort);
diff --git a/drivers/ata/libata-eh.c b/drivers/ata/libata-eh.c
index 9aa62a0754f6..ac6ceed4bb60 100644
--- a/drivers/ata/libata-eh.c
+++ b/drivers/ata/libata-eh.c
@@ -56,6 +56,7 @@ enum {
56 */ 56 */
57enum { 57enum {
58 ATA_EH_PRERESET_TIMEOUT = 10 * HZ, 58 ATA_EH_PRERESET_TIMEOUT = 10 * HZ,
59 ATA_EH_FASTDRAIN_INTERVAL = 3 * HZ,
59}; 60};
60 61
61/* The following table determines how we sequence resets. Each entry 62/* The following table determines how we sequence resets. Each entry
@@ -85,6 +86,71 @@ static void ata_eh_handle_port_resume(struct ata_port *ap)
85{ } 86{ }
86#endif /* CONFIG_PM */ 87#endif /* CONFIG_PM */
87 88
89static void __ata_ehi_pushv_desc(struct ata_eh_info *ehi, const char *fmt,
90 va_list args)
91{
92 ehi->desc_len += vscnprintf(ehi->desc + ehi->desc_len,
93 ATA_EH_DESC_LEN - ehi->desc_len,
94 fmt, args);
95}
96
97/**
98 * __ata_ehi_push_desc - push error description without adding separator
99 * @ehi: target EHI
100 * @fmt: printf format string
101 *
102 * Format string according to @fmt and append it to @ehi->desc.
103 *
104 * LOCKING:
105 * spin_lock_irqsave(host lock)
106 */
107void __ata_ehi_push_desc(struct ata_eh_info *ehi, const char *fmt, ...)
108{
109 va_list args;
110
111 va_start(args, fmt);
112 __ata_ehi_pushv_desc(ehi, fmt, args);
113 va_end(args);
114}
115
116/**
117 * ata_ehi_push_desc - push error description with separator
118 * @ehi: target EHI
119 * @fmt: printf format string
120 *
121 * Format string according to @fmt and append it to @ehi->desc.
122 * If @ehi->desc is not empty, ", " is added in-between.
123 *
124 * LOCKING:
125 * spin_lock_irqsave(host lock)
126 */
127void ata_ehi_push_desc(struct ata_eh_info *ehi, const char *fmt, ...)
128{
129 va_list args;
130
131 if (ehi->desc_len)
132 __ata_ehi_push_desc(ehi, ", ");
133
134 va_start(args, fmt);
135 __ata_ehi_pushv_desc(ehi, fmt, args);
136 va_end(args);
137}
138
139/**
140 * ata_ehi_clear_desc - clean error description
141 * @ehi: target EHI
142 *
143 * Clear @ehi->desc.
144 *
145 * LOCKING:
146 * spin_lock_irqsave(host lock)
147 */
148void ata_ehi_clear_desc(struct ata_eh_info *ehi)
149{
150 ehi->desc[0] = '\0';
151 ehi->desc_len = 0;
152}
153
88static void ata_ering_record(struct ata_ering *ering, int is_io, 154static void ata_ering_record(struct ata_ering *ering, int is_io,
89 unsigned int err_mask) 155 unsigned int err_mask)
90{ 156{
@@ -296,6 +362,9 @@ void ata_scsi_error(struct Scsi_Host *host)
296 repeat: 362 repeat:
297 /* invoke error handler */ 363 /* invoke error handler */
298 if (ap->ops->error_handler) { 364 if (ap->ops->error_handler) {
365 /* kill fast drain timer */
366 del_timer_sync(&ap->fastdrain_timer);
367
299 /* process port resume request */ 368 /* process port resume request */
300 ata_eh_handle_port_resume(ap); 369 ata_eh_handle_port_resume(ap);
301 370
@@ -511,6 +580,94 @@ void ata_eng_timeout(struct ata_port *ap)
511 DPRINTK("EXIT\n"); 580 DPRINTK("EXIT\n");
512} 581}
513 582
583static int ata_eh_nr_in_flight(struct ata_port *ap)
584{
585 unsigned int tag;
586 int nr = 0;
587
588 /* count only non-internal commands */
589 for (tag = 0; tag < ATA_MAX_QUEUE - 1; tag++)
590 if (ata_qc_from_tag(ap, tag))
591 nr++;
592
593 return nr;
594}
595
596void ata_eh_fastdrain_timerfn(unsigned long arg)
597{
598 struct ata_port *ap = (void *)arg;
599 unsigned long flags;
600 int cnt;
601
602 spin_lock_irqsave(ap->lock, flags);
603
604 cnt = ata_eh_nr_in_flight(ap);
605
606 /* are we done? */
607 if (!cnt)
608 goto out_unlock;
609
610 if (cnt == ap->fastdrain_cnt) {
611 unsigned int tag;
612
613 /* No progress during the last interval, tag all
614 * in-flight qcs as timed out and freeze the port.
615 */
616 for (tag = 0; tag < ATA_MAX_QUEUE - 1; tag++) {
617 struct ata_queued_cmd *qc = ata_qc_from_tag(ap, tag);
618 if (qc)
619 qc->err_mask |= AC_ERR_TIMEOUT;
620 }
621
622 ata_port_freeze(ap);
623 } else {
624 /* some qcs have finished, give it another chance */
625 ap->fastdrain_cnt = cnt;
626 ap->fastdrain_timer.expires =
627 jiffies + ATA_EH_FASTDRAIN_INTERVAL;
628 add_timer(&ap->fastdrain_timer);
629 }
630
631 out_unlock:
632 spin_unlock_irqrestore(ap->lock, flags);
633}
634
635/**
636 * ata_eh_set_pending - set ATA_PFLAG_EH_PENDING and activate fast drain
637 * @ap: target ATA port
638 * @fastdrain: activate fast drain
639 *
640 * Set ATA_PFLAG_EH_PENDING and activate fast drain if @fastdrain
641 * is non-zero and EH wasn't pending before. Fast drain ensures
642 * that EH kicks in in timely manner.
643 *
644 * LOCKING:
645 * spin_lock_irqsave(host lock)
646 */
647static void ata_eh_set_pending(struct ata_port *ap, int fastdrain)
648{
649 int cnt;
650
651 /* already scheduled? */
652 if (ap->pflags & ATA_PFLAG_EH_PENDING)
653 return;
654
655 ap->pflags |= ATA_PFLAG_EH_PENDING;
656
657 if (!fastdrain)
658 return;
659
660 /* do we have in-flight qcs? */
661 cnt = ata_eh_nr_in_flight(ap);
662 if (!cnt)
663 return;
664
665 /* activate fast drain */
666 ap->fastdrain_cnt = cnt;
667 ap->fastdrain_timer.expires = jiffies + ATA_EH_FASTDRAIN_INTERVAL;
668 add_timer(&ap->fastdrain_timer);
669}
670
514/** 671/**
515 * ata_qc_schedule_eh - schedule qc for error handling 672 * ata_qc_schedule_eh - schedule qc for error handling
516 * @qc: command to schedule error handling for 673 * @qc: command to schedule error handling for
@@ -528,7 +685,7 @@ void ata_qc_schedule_eh(struct ata_queued_cmd *qc)
528 WARN_ON(!ap->ops->error_handler); 685 WARN_ON(!ap->ops->error_handler);
529 686
530 qc->flags |= ATA_QCFLAG_FAILED; 687 qc->flags |= ATA_QCFLAG_FAILED;
531 qc->ap->pflags |= ATA_PFLAG_EH_PENDING; 688 ata_eh_set_pending(ap, 1);
532 689
533 /* The following will fail if timeout has already expired. 690 /* The following will fail if timeout has already expired.
534 * ata_scsi_error() takes care of such scmds on EH entry. 691 * ata_scsi_error() takes care of such scmds on EH entry.
@@ -555,7 +712,7 @@ void ata_port_schedule_eh(struct ata_port *ap)
555 if (ap->pflags & ATA_PFLAG_INITIALIZING) 712 if (ap->pflags & ATA_PFLAG_INITIALIZING)
556 return; 713 return;
557 714
558 ap->pflags |= ATA_PFLAG_EH_PENDING; 715 ata_eh_set_pending(ap, 1);
559 scsi_schedule_eh(ap->scsi_host); 716 scsi_schedule_eh(ap->scsi_host);
560 717
561 DPRINTK("port EH scheduled\n"); 718 DPRINTK("port EH scheduled\n");
@@ -579,6 +736,9 @@ int ata_port_abort(struct ata_port *ap)
579 736
580 WARN_ON(!ap->ops->error_handler); 737 WARN_ON(!ap->ops->error_handler);
581 738
739 /* we're gonna abort all commands, no need for fast drain */
740 ata_eh_set_pending(ap, 0);
741
582 for (tag = 0; tag < ATA_MAX_QUEUE; tag++) { 742 for (tag = 0; tag < ATA_MAX_QUEUE; tag++) {
583 struct ata_queued_cmd *qc = ata_qc_from_tag(ap, tag); 743 struct ata_queued_cmd *qc = ata_qc_from_tag(ap, tag);
584 744
@@ -1130,7 +1290,7 @@ static void ata_eh_analyze_ncq_error(struct ata_port *ap)
1130 /* we've got the perpetrator, condemn it */ 1290 /* we've got the perpetrator, condemn it */
1131 qc = __ata_qc_from_tag(ap, tag); 1291 qc = __ata_qc_from_tag(ap, tag);
1132 memcpy(&qc->result_tf, &tf, sizeof(tf)); 1292 memcpy(&qc->result_tf, &tf, sizeof(tf));
1133 qc->err_mask |= AC_ERR_DEV; 1293 qc->err_mask |= AC_ERR_DEV | AC_ERR_NCQ;
1134 ehc->i.err_mask &= ~AC_ERR_DEV; 1294 ehc->i.err_mask &= ~AC_ERR_DEV;
1135} 1295}
1136 1296
@@ -1413,8 +1573,12 @@ static void ata_eh_autopsy(struct ata_port *ap)
1413 if (rc == 0) { 1573 if (rc == 0) {
1414 ehc->i.serror |= serror; 1574 ehc->i.serror |= serror;
1415 ata_eh_analyze_serror(ap); 1575 ata_eh_analyze_serror(ap);
1416 } else if (rc != -EOPNOTSUPP) 1576 } else if (rc != -EOPNOTSUPP) {
1577 /* SError read failed, force hardreset and probing */
1578 ata_ehi_schedule_probe(&ehc->i);
1417 ehc->i.action |= ATA_EH_HARDRESET; 1579 ehc->i.action |= ATA_EH_HARDRESET;
1580 ehc->i.err_mask |= AC_ERR_OTHER;
1581 }
1418 1582
1419 /* analyze NCQ failure */ 1583 /* analyze NCQ failure */
1420 ata_eh_analyze_ncq_error(ap); 1584 ata_eh_analyze_ncq_error(ap);
@@ -1524,14 +1688,14 @@ static void ata_eh_report(struct ata_port *ap)
1524 ehc->i.err_mask, ap->sactive, ehc->i.serror, 1688 ehc->i.err_mask, ap->sactive, ehc->i.serror,
1525 ehc->i.action, frozen); 1689 ehc->i.action, frozen);
1526 if (desc) 1690 if (desc)
1527 ata_dev_printk(ehc->i.dev, KERN_ERR, "(%s)\n", desc); 1691 ata_dev_printk(ehc->i.dev, KERN_ERR, "%s\n", desc);
1528 } else { 1692 } else {
1529 ata_port_printk(ap, KERN_ERR, "exception Emask 0x%x " 1693 ata_port_printk(ap, KERN_ERR, "exception Emask 0x%x "
1530 "SAct 0x%x SErr 0x%x action 0x%x%s\n", 1694 "SAct 0x%x SErr 0x%x action 0x%x%s\n",
1531 ehc->i.err_mask, ap->sactive, ehc->i.serror, 1695 ehc->i.err_mask, ap->sactive, ehc->i.serror,
1532 ehc->i.action, frozen); 1696 ehc->i.action, frozen);
1533 if (desc) 1697 if (desc)
1534 ata_port_printk(ap, KERN_ERR, "(%s)\n", desc); 1698 ata_port_printk(ap, KERN_ERR, "%s\n", desc);
1535 } 1699 }
1536 1700
1537 for (tag = 0; tag < ATA_MAX_QUEUE; tag++) { 1701 for (tag = 0; tag < ATA_MAX_QUEUE; tag++) {
@@ -1551,7 +1715,7 @@ static void ata_eh_report(struct ata_port *ap)
1551 "cmd %02x/%02x:%02x:%02x:%02x:%02x/%02x:%02x:%02x:%02x:%02x/%02x " 1715 "cmd %02x/%02x:%02x:%02x:%02x:%02x/%02x:%02x:%02x:%02x:%02x/%02x "
1552 "tag %d cdb 0x%x data %u %s\n " 1716 "tag %d cdb 0x%x data %u %s\n "
1553 "res %02x/%02x:%02x:%02x:%02x:%02x/%02x:%02x:%02x:%02x:%02x/%02x " 1717 "res %02x/%02x:%02x:%02x:%02x:%02x/%02x:%02x:%02x:%02x:%02x/%02x "
1554 "Emask 0x%x (%s)\n", 1718 "Emask 0x%x (%s)%s\n",
1555 cmd->command, cmd->feature, cmd->nsect, 1719 cmd->command, cmd->feature, cmd->nsect,
1556 cmd->lbal, cmd->lbam, cmd->lbah, 1720 cmd->lbal, cmd->lbam, cmd->lbah,
1557 cmd->hob_feature, cmd->hob_nsect, 1721 cmd->hob_feature, cmd->hob_nsect,
@@ -1562,7 +1726,8 @@ static void ata_eh_report(struct ata_port *ap)
1562 res->lbal, res->lbam, res->lbah, 1726 res->lbal, res->lbam, res->lbah,
1563 res->hob_feature, res->hob_nsect, 1727 res->hob_feature, res->hob_nsect,
1564 res->hob_lbal, res->hob_lbam, res->hob_lbah, 1728 res->hob_lbal, res->hob_lbam, res->hob_lbah,
1565 res->device, qc->err_mask, ata_err_string(qc->err_mask)); 1729 res->device, qc->err_mask, ata_err_string(qc->err_mask),
1730 qc->err_mask & AC_ERR_NCQ ? " <F>" : "");
1566 } 1731 }
1567} 1732}
1568 1733
@@ -1648,7 +1813,7 @@ static int ata_eh_reset(struct ata_port *ap, int classify,
1648 } else 1813 } else
1649 ata_port_printk(ap, KERN_ERR, 1814 ata_port_printk(ap, KERN_ERR,
1650 "prereset failed (errno=%d)\n", rc); 1815 "prereset failed (errno=%d)\n", rc);
1651 return rc; 1816 goto out;
1652 } 1817 }
1653 } 1818 }
1654 1819
@@ -1661,7 +1826,8 @@ static int ata_eh_reset(struct ata_port *ap, int classify,
1661 /* prereset told us not to reset, bang classes and return */ 1826 /* prereset told us not to reset, bang classes and return */
1662 for (i = 0; i < ATA_MAX_DEVICES; i++) 1827 for (i = 0; i < ATA_MAX_DEVICES; i++)
1663 classes[i] = ATA_DEV_NONE; 1828 classes[i] = ATA_DEV_NONE;
1664 return 0; 1829 rc = 0;
1830 goto out;
1665 } 1831 }
1666 1832
1667 /* did prereset() screw up? if so, fix up to avoid oopsing */ 1833 /* did prereset() screw up? if so, fix up to avoid oopsing */
@@ -1697,7 +1863,8 @@ static int ata_eh_reset(struct ata_port *ap, int classify,
1697 ata_port_printk(ap, KERN_ERR, 1863 ata_port_printk(ap, KERN_ERR,
1698 "follow-up softreset required " 1864 "follow-up softreset required "
1699 "but no softreset avaliable\n"); 1865 "but no softreset avaliable\n");
1700 return -EINVAL; 1866 rc = -EINVAL;
1867 goto out;
1701 } 1868 }
1702 1869
1703 ata_eh_about_to_do(ap, NULL, ATA_EH_RESET_MASK); 1870 ata_eh_about_to_do(ap, NULL, ATA_EH_RESET_MASK);
@@ -1707,7 +1874,8 @@ static int ata_eh_reset(struct ata_port *ap, int classify,
1707 classes[0] == ATA_DEV_UNKNOWN) { 1874 classes[0] == ATA_DEV_UNKNOWN) {
1708 ata_port_printk(ap, KERN_ERR, 1875 ata_port_printk(ap, KERN_ERR,
1709 "classification failed\n"); 1876 "classification failed\n");
1710 return -EINVAL; 1877 rc = -EINVAL;
1878 goto out;
1711 } 1879 }
1712 } 1880 }
1713 1881
@@ -1724,7 +1892,7 @@ static int ata_eh_reset(struct ata_port *ap, int classify,
1724 schedule_timeout_uninterruptible(delta); 1892 schedule_timeout_uninterruptible(delta);
1725 } 1893 }
1726 1894
1727 if (reset == hardreset && 1895 if (rc == -EPIPE ||
1728 try == ARRAY_SIZE(ata_eh_reset_timeouts) - 1) 1896 try == ARRAY_SIZE(ata_eh_reset_timeouts) - 1)
1729 sata_down_spd_limit(ap); 1897 sata_down_spd_limit(ap);
1730 if (hardreset) 1898 if (hardreset)
@@ -1733,12 +1901,18 @@ static int ata_eh_reset(struct ata_port *ap, int classify,
1733 } 1901 }
1734 1902
1735 if (rc == 0) { 1903 if (rc == 0) {
1904 u32 sstatus;
1905
1736 /* After the reset, the device state is PIO 0 and the 1906 /* After the reset, the device state is PIO 0 and the
1737 * controller state is undefined. Record the mode. 1907 * controller state is undefined. Record the mode.
1738 */ 1908 */
1739 for (i = 0; i < ATA_MAX_DEVICES; i++) 1909 for (i = 0; i < ATA_MAX_DEVICES; i++)
1740 ap->device[i].pio_mode = XFER_PIO_0; 1910 ap->device[i].pio_mode = XFER_PIO_0;
1741 1911
1912 /* record current link speed */
1913 if (sata_scr_read(ap, SCR_STATUS, &sstatus) == 0)
1914 ap->sata_spd = (sstatus >> 4) & 0xf;
1915
1742 if (postreset) 1916 if (postreset)
1743 postreset(ap, classes); 1917 postreset(ap, classes);
1744 1918
@@ -1746,7 +1920,9 @@ static int ata_eh_reset(struct ata_port *ap, int classify,
1746 ata_eh_done(ap, NULL, ehc->i.action & ATA_EH_RESET_MASK); 1920 ata_eh_done(ap, NULL, ehc->i.action & ATA_EH_RESET_MASK);
1747 ehc->i.action |= ATA_EH_REVALIDATE; 1921 ehc->i.action |= ATA_EH_REVALIDATE;
1748 } 1922 }
1749 1923 out:
1924 /* clear hotplug flag */
1925 ehc->i.flags &= ~ATA_EHI_HOTPLUGGED;
1750 return rc; 1926 return rc;
1751} 1927}
1752 1928
diff --git a/drivers/ata/libata-scsi.c b/drivers/ata/libata-scsi.c
index cfde22da07ac..12ac0b511f79 100644
--- a/drivers/ata/libata-scsi.c
+++ b/drivers/ata/libata-scsi.c
@@ -2947,17 +2947,22 @@ int ata_scsi_add_hosts(struct ata_host *host, struct scsi_host_template *sht)
2947 return rc; 2947 return rc;
2948} 2948}
2949 2949
2950void ata_scsi_scan_host(struct ata_port *ap) 2950void ata_scsi_scan_host(struct ata_port *ap, int sync)
2951{ 2951{
2952 int tries = 5;
2953 struct ata_device *last_failed_dev = NULL;
2954 struct ata_device *dev;
2952 unsigned int i; 2955 unsigned int i;
2953 2956
2954 if (ap->flags & ATA_FLAG_DISABLED) 2957 if (ap->flags & ATA_FLAG_DISABLED)
2955 return; 2958 return;
2956 2959
2960 repeat:
2957 for (i = 0; i < ATA_MAX_DEVICES; i++) { 2961 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2958 struct ata_device *dev = &ap->device[i];
2959 struct scsi_device *sdev; 2962 struct scsi_device *sdev;
2960 2963
2964 dev = &ap->device[i];
2965
2961 if (!ata_dev_enabled(dev) || dev->sdev) 2966 if (!ata_dev_enabled(dev) || dev->sdev)
2962 continue; 2967 continue;
2963 2968
@@ -2967,6 +2972,45 @@ void ata_scsi_scan_host(struct ata_port *ap)
2967 scsi_device_put(sdev); 2972 scsi_device_put(sdev);
2968 } 2973 }
2969 } 2974 }
2975
2976 /* If we scanned while EH was in progress or allocation
2977 * failure occurred, scan would have failed silently. Check
2978 * whether all devices are attached.
2979 */
2980 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2981 dev = &ap->device[i];
2982 if (ata_dev_enabled(dev) && !dev->sdev)
2983 break;
2984 }
2985 if (i == ATA_MAX_DEVICES)
2986 return;
2987
2988 /* we're missing some SCSI devices */
2989 if (sync) {
2990 /* If caller requested synchrnous scan && we've made
2991 * any progress, sleep briefly and repeat.
2992 */
2993 if (dev != last_failed_dev) {
2994 msleep(100);
2995 last_failed_dev = dev;
2996 goto repeat;
2997 }
2998
2999 /* We might be failing to detect boot device, give it
3000 * a few more chances.
3001 */
3002 if (--tries) {
3003 msleep(100);
3004 goto repeat;
3005 }
3006
3007 ata_port_printk(ap, KERN_ERR, "WARNING: synchronous SCSI scan "
3008 "failed without making any progress,\n"
3009 " switching to async\n");
3010 }
3011
3012 queue_delayed_work(ata_aux_wq, &ap->hotplug_task,
3013 round_jiffies_relative(HZ));
2970} 3014}
2971 3015
2972/** 3016/**
@@ -3093,20 +3137,7 @@ void ata_scsi_hotplug(struct work_struct *work)
3093 } 3137 }
3094 3138
3095 /* scan for new ones */ 3139 /* scan for new ones */
3096 ata_scsi_scan_host(ap); 3140 ata_scsi_scan_host(ap, 0);
3097
3098 /* If we scanned while EH was in progress, scan would have
3099 * failed silently. Requeue if there are enabled but
3100 * unattached devices.
3101 */
3102 for (i = 0; i < ATA_MAX_DEVICES; i++) {
3103 struct ata_device *dev = &ap->device[i];
3104 if (ata_dev_enabled(dev) && !dev->sdev) {
3105 queue_delayed_work(ata_aux_wq, &ap->hotplug_task,
3106 round_jiffies_relative(HZ));
3107 break;
3108 }
3109 }
3110 3141
3111 DPRINTK("EXIT\n"); 3142 DPRINTK("EXIT\n");
3112} 3143}
diff --git a/drivers/ata/libata-sff.c b/drivers/ata/libata-sff.c
index ca7d2245d684..6c289c7b1322 100644
--- a/drivers/ata/libata-sff.c
+++ b/drivers/ata/libata-sff.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * libata-bmdma.c - helper library for PCI IDE BMDMA 2 * libata-sff.c - helper library for PCI IDE BMDMA
3 * 3 *
4 * Maintained by: Jeff Garzik <jgarzik@pobox.com> 4 * Maintained by: Jeff Garzik <jgarzik@pobox.com>
5 * Please ALWAYS copy linux-ide@vger.kernel.org 5 * Please ALWAYS copy linux-ide@vger.kernel.org
@@ -211,6 +211,8 @@ void ata_tf_read(struct ata_port *ap, struct ata_taskfile *tf)
211 tf->hob_lbal = ioread8(ioaddr->lbal_addr); 211 tf->hob_lbal = ioread8(ioaddr->lbal_addr);
212 tf->hob_lbam = ioread8(ioaddr->lbam_addr); 212 tf->hob_lbam = ioread8(ioaddr->lbam_addr);
213 tf->hob_lbah = ioread8(ioaddr->lbah_addr); 213 tf->hob_lbah = ioread8(ioaddr->lbah_addr);
214 iowrite8(tf->ctl, ioaddr->ctl_addr);
215 ap->last_ctl = tf->ctl;
214 } 216 }
215} 217}
216 218
diff --git a/drivers/ata/libata.h b/drivers/ata/libata.h
index ba17fc5f2e99..564cd234c805 100644
--- a/drivers/ata/libata.h
+++ b/drivers/ata/libata.h
@@ -112,7 +112,7 @@ static inline int ata_acpi_on_devcfg(struct ata_device *adev) { return 0; }
112/* libata-scsi.c */ 112/* libata-scsi.c */
113extern int ata_scsi_add_hosts(struct ata_host *host, 113extern int ata_scsi_add_hosts(struct ata_host *host,
114 struct scsi_host_template *sht); 114 struct scsi_host_template *sht);
115extern void ata_scsi_scan_host(struct ata_port *ap); 115extern void ata_scsi_scan_host(struct ata_port *ap, int sync);
116extern int ata_scsi_offline_dev(struct ata_device *dev); 116extern int ata_scsi_offline_dev(struct ata_device *dev);
117extern void ata_scsi_hotplug(struct work_struct *work); 117extern void ata_scsi_hotplug(struct work_struct *work);
118extern unsigned int ata_scsiop_inq_std(struct ata_scsi_args *args, u8 *rbuf, 118extern unsigned int ata_scsiop_inq_std(struct ata_scsi_args *args, u8 *rbuf,
@@ -151,6 +151,7 @@ extern int ata_bus_probe(struct ata_port *ap);
151extern enum scsi_eh_timer_return ata_scsi_timed_out(struct scsi_cmnd *cmd); 151extern enum scsi_eh_timer_return ata_scsi_timed_out(struct scsi_cmnd *cmd);
152extern void ata_scsi_error(struct Scsi_Host *host); 152extern void ata_scsi_error(struct Scsi_Host *host);
153extern void ata_port_wait_eh(struct ata_port *ap); 153extern void ata_port_wait_eh(struct ata_port *ap);
154extern void ata_eh_fastdrain_timerfn(unsigned long arg);
154extern void ata_qc_schedule_eh(struct ata_queued_cmd *qc); 155extern void ata_qc_schedule_eh(struct ata_queued_cmd *qc);
155 156
156/* libata-sff.c */ 157/* libata-sff.c */
diff --git a/drivers/ata/pata_platform.c b/drivers/ata/pata_platform.c
index 79f841bca593..a909f793ffc1 100644
--- a/drivers/ata/pata_platform.c
+++ b/drivers/ata/pata_platform.c
@@ -213,8 +213,9 @@ static int __devinit pata_platform_probe(struct platform_device *pdev)
213 pata_platform_setup_port(&ap->ioaddr, pp_info); 213 pata_platform_setup_port(&ap->ioaddr, pp_info);
214 214
215 /* activate */ 215 /* activate */
216 return ata_host_activate(host, platform_get_irq(pdev, 0), ata_interrupt, 216 return ata_host_activate(host, platform_get_irq(pdev, 0),
217 pp_info->irq_flags, &pata_platform_sht); 217 ata_interrupt, pp_info ? pp_info->irq_flags
218 : 0, &pata_platform_sht);
218} 219}
219 220
220/** 221/**
diff --git a/drivers/ata/pata_scc.c b/drivers/ata/pata_scc.c
index c55667e0eb65..36cdbd2b0bd5 100644
--- a/drivers/ata/pata_scc.c
+++ b/drivers/ata/pata_scc.c
@@ -238,12 +238,6 @@ static void scc_set_dmamode (struct ata_port *ap, struct ata_device *adev)
238 else 238 else
239 offset = 0; /* 100MHz */ 239 offset = 0; /* 100MHz */
240 240
241 /* errata A308 workaround: limit ATAPI UDMA mode to UDMA4 */
242 if (adev->class == ATA_DEV_ATAPI && speed > XFER_UDMA_4) {
243 printk(KERN_INFO "%s: limit ATAPI UDMA to UDMA4\n", DRV_NAME);
244 speed = XFER_UDMA_4;
245 }
246
247 if (speed >= XFER_UDMA_0) 241 if (speed >= XFER_UDMA_0)
248 idx = speed - XFER_UDMA_0; 242 idx = speed - XFER_UDMA_0;
249 else 243 else
@@ -264,6 +258,17 @@ static void scc_set_dmamode (struct ata_port *ap, struct ata_device *adev)
264 JCTSStbl[offset][idx] << 16 | JCENVTtbl[offset][idx]); 258 JCTSStbl[offset][idx] << 16 | JCENVTtbl[offset][idx]);
265} 259}
266 260
261unsigned long scc_mode_filter(struct ata_device *adev, unsigned long mask)
262{
263 /* errata A308 workaround: limit ATAPI UDMA mode to UDMA4 */
264 if (adev->class == ATA_DEV_ATAPI &&
265 (mask & (0xE0 << ATA_SHIFT_UDMA))) {
266 printk(KERN_INFO "%s: limit ATAPI UDMA to UDMA4\n", DRV_NAME);
267 mask &= ~(0xE0 << ATA_SHIFT_UDMA);
268 }
269 return ata_pci_default_filter(adev, mask);
270}
271
267/** 272/**
268 * scc_tf_load - send taskfile registers to host controller 273 * scc_tf_load - send taskfile registers to host controller
269 * @ap: Port to which output is sent 274 * @ap: Port to which output is sent
@@ -358,6 +363,8 @@ static void scc_tf_read (struct ata_port *ap, struct ata_taskfile *tf)
358 tf->hob_lbal = in_be32(ioaddr->lbal_addr); 363 tf->hob_lbal = in_be32(ioaddr->lbal_addr);
359 tf->hob_lbam = in_be32(ioaddr->lbam_addr); 364 tf->hob_lbam = in_be32(ioaddr->lbam_addr);
360 tf->hob_lbah = in_be32(ioaddr->lbah_addr); 365 tf->hob_lbah = in_be32(ioaddr->lbah_addr);
366 out_be32(ioaddr->ctl_addr, tf->ctl);
367 ap->last_ctl = tf->ctl;
361 } 368 }
362} 369}
363 370
@@ -741,7 +748,7 @@ static u8 scc_bmdma_status (struct ata_port *ap)
741 return host_stat; 748 return host_stat;
742 749
743 /* errata A252,A308 workaround: Step4 */ 750 /* errata A252,A308 workaround: Step4 */
744 if (ata_altstatus(ap) & ATA_ERR && int_status & INTSTS_INTRQ) 751 if ((ata_altstatus(ap) & ATA_ERR) && (int_status & INTSTS_INTRQ))
745 return (host_stat | ATA_DMA_INTR); 752 return (host_stat | ATA_DMA_INTR);
746 753
747 /* errata A308 workaround Step5 */ 754 /* errata A308 workaround Step5 */
@@ -752,11 +759,11 @@ static u8 scc_bmdma_status (struct ata_port *ap)
752 if ((qc->tf.protocol == ATA_PROT_DMA && 759 if ((qc->tf.protocol == ATA_PROT_DMA &&
753 qc->dev->xfer_mode > XFER_UDMA_4)) { 760 qc->dev->xfer_mode > XFER_UDMA_4)) {
754 if (!(int_status & INTSTS_ACTEINT)) { 761 if (!(int_status & INTSTS_ACTEINT)) {
755 printk(KERN_WARNING "ata%u: data lost occurred. (ACTEINT==0, retry:%d)\n", 762 printk(KERN_WARNING "ata%u: operation failed (transfer data loss)\n",
756 ap->print_id, retry); 763 ap->print_id);
757 host_stat |= ATA_DMA_ERR; 764 host_stat |= ATA_DMA_ERR;
758 if (retry++) 765 if (retry++)
759 ap->udma_mask >>= 1; 766 ap->udma_mask &= ~(1 << qc->dev->xfer_mode);
760 } else 767 } else
761 retry = 0; 768 retry = 0;
762 } 769 }
@@ -1016,7 +1023,7 @@ static const struct ata_port_operations scc_pata_ops = {
1016 .port_disable = ata_port_disable, 1023 .port_disable = ata_port_disable,
1017 .set_piomode = scc_set_piomode, 1024 .set_piomode = scc_set_piomode,
1018 .set_dmamode = scc_set_dmamode, 1025 .set_dmamode = scc_set_dmamode,
1019 .mode_filter = ata_pci_default_filter, 1026 .mode_filter = scc_mode_filter,
1020 1027
1021 .tf_load = scc_tf_load, 1028 .tf_load = scc_tf_load,
1022 .tf_read = scc_tf_read, 1029 .tf_read = scc_tf_read,
diff --git a/drivers/ata/sata_inic162x.c b/drivers/ata/sata_inic162x.c
index 3de183461c3c..a9c948d7604a 100644
--- a/drivers/ata/sata_inic162x.c
+++ b/drivers/ata/sata_inic162x.c
@@ -190,34 +190,34 @@ static void inic_reset_port(void __iomem *port_base)
190 writew(ctl, idma_ctl); 190 writew(ctl, idma_ctl);
191} 191}
192 192
193static u32 inic_scr_read(struct ata_port *ap, unsigned sc_reg) 193static int inic_scr_read(struct ata_port *ap, unsigned sc_reg, u32 *val)
194{ 194{
195 void __iomem *scr_addr = ap->ioaddr.scr_addr; 195 void __iomem *scr_addr = ap->ioaddr.scr_addr;
196 void __iomem *addr; 196 void __iomem *addr;
197 u32 val;
198 197
199 if (unlikely(sc_reg >= ARRAY_SIZE(scr_map))) 198 if (unlikely(sc_reg >= ARRAY_SIZE(scr_map)))
200 return 0xffffffffU; 199 return -EINVAL;
201 200
202 addr = scr_addr + scr_map[sc_reg] * 4; 201 addr = scr_addr + scr_map[sc_reg] * 4;
203 val = readl(scr_addr + scr_map[sc_reg] * 4); 202 *val = readl(scr_addr + scr_map[sc_reg] * 4);
204 203
205 /* this controller has stuck DIAG.N, ignore it */ 204 /* this controller has stuck DIAG.N, ignore it */
206 if (sc_reg == SCR_ERROR) 205 if (sc_reg == SCR_ERROR)
207 val &= ~SERR_PHYRDY_CHG; 206 *val &= ~SERR_PHYRDY_CHG;
208 return val; 207 return 0;
209} 208}
210 209
211static void inic_scr_write(struct ata_port *ap, unsigned sc_reg, u32 val) 210static int inic_scr_write(struct ata_port *ap, unsigned sc_reg, u32 val)
212{ 211{
213 void __iomem *scr_addr = ap->ioaddr.scr_addr; 212 void __iomem *scr_addr = ap->ioaddr.scr_addr;
214 void __iomem *addr; 213 void __iomem *addr;
215 214
216 if (unlikely(sc_reg >= ARRAY_SIZE(scr_map))) 215 if (unlikely(sc_reg >= ARRAY_SIZE(scr_map)))
217 return; 216 return -EINVAL;
218 217
219 addr = scr_addr + scr_map[sc_reg] * 4; 218 addr = scr_addr + scr_map[sc_reg] * 4;
220 writel(val, scr_addr + scr_map[sc_reg] * 4); 219 writel(val, scr_addr + scr_map[sc_reg] * 4);
220 return 0;
221} 221}
222 222
223/* 223/*
diff --git a/drivers/ata/sata_mv.c b/drivers/ata/sata_mv.c
index fb8a749423ca..8ec520885b95 100644
--- a/drivers/ata/sata_mv.c
+++ b/drivers/ata/sata_mv.c
@@ -35,8 +35,6 @@
35 35
36 6) Add port multiplier support (intermediate) 36 6) Add port multiplier support (intermediate)
37 37
38 7) Test and verify 3.0 Gbps support
39
40 8) Develop a low-power-consumption strategy, and implement it. 38 8) Develop a low-power-consumption strategy, and implement it.
41 39
42 9) [Experiment, low priority] See if ATAPI can be supported using 40 9) [Experiment, low priority] See if ATAPI can be supported using
@@ -227,26 +225,26 @@ enum {
227 225
228 EDMA_ERR_IRQ_CAUSE_OFS = 0x8, 226 EDMA_ERR_IRQ_CAUSE_OFS = 0x8,
229 EDMA_ERR_IRQ_MASK_OFS = 0xc, 227 EDMA_ERR_IRQ_MASK_OFS = 0xc,
230 EDMA_ERR_D_PAR = (1 << 0), 228 EDMA_ERR_D_PAR = (1 << 0), /* UDMA data parity err */
231 EDMA_ERR_PRD_PAR = (1 << 1), 229 EDMA_ERR_PRD_PAR = (1 << 1), /* UDMA PRD parity err */
232 EDMA_ERR_DEV = (1 << 2), 230 EDMA_ERR_DEV = (1 << 2), /* device error */
233 EDMA_ERR_DEV_DCON = (1 << 3), 231 EDMA_ERR_DEV_DCON = (1 << 3), /* device disconnect */
234 EDMA_ERR_DEV_CON = (1 << 4), 232 EDMA_ERR_DEV_CON = (1 << 4), /* device connected */
235 EDMA_ERR_SERR = (1 << 5), 233 EDMA_ERR_SERR = (1 << 5), /* SError bits [WBDST] raised */
236 EDMA_ERR_SELF_DIS = (1 << 7), /* Gen II/IIE self-disable */ 234 EDMA_ERR_SELF_DIS = (1 << 7), /* Gen II/IIE self-disable */
237 EDMA_ERR_SELF_DIS_5 = (1 << 8), /* Gen I self-disable */ 235 EDMA_ERR_SELF_DIS_5 = (1 << 8), /* Gen I self-disable */
238 EDMA_ERR_BIST_ASYNC = (1 << 8), 236 EDMA_ERR_BIST_ASYNC = (1 << 8), /* BIST FIS or Async Notify */
239 EDMA_ERR_TRANS_IRQ_7 = (1 << 8), /* Gen IIE transprt layer irq */ 237 EDMA_ERR_TRANS_IRQ_7 = (1 << 8), /* Gen IIE transprt layer irq */
240 EDMA_ERR_CRBQ_PAR = (1 << 9), 238 EDMA_ERR_CRQB_PAR = (1 << 9), /* CRQB parity error */
241 EDMA_ERR_CRPB_PAR = (1 << 10), 239 EDMA_ERR_CRPB_PAR = (1 << 10), /* CRPB parity error */
242 EDMA_ERR_INTRL_PAR = (1 << 11), 240 EDMA_ERR_INTRL_PAR = (1 << 11), /* internal parity error */
243 EDMA_ERR_IORDY = (1 << 12), 241 EDMA_ERR_IORDY = (1 << 12), /* IORdy timeout */
244 EDMA_ERR_LNK_CTRL_RX = (0xf << 13), 242 EDMA_ERR_LNK_CTRL_RX = (0xf << 13), /* link ctrl rx error */
245 EDMA_ERR_LNK_CTRL_RX_2 = (1 << 15), 243 EDMA_ERR_LNK_CTRL_RX_2 = (1 << 15),
246 EDMA_ERR_LNK_DATA_RX = (0xf << 17), 244 EDMA_ERR_LNK_DATA_RX = (0xf << 17), /* link data rx error */
247 EDMA_ERR_LNK_CTRL_TX = (0x1f << 21), 245 EDMA_ERR_LNK_CTRL_TX = (0x1f << 21), /* link ctrl tx error */
248 EDMA_ERR_LNK_DATA_TX = (0x1f << 26), 246 EDMA_ERR_LNK_DATA_TX = (0x1f << 26), /* link data tx error */
249 EDMA_ERR_TRANS_PROTO = (1 << 31), 247 EDMA_ERR_TRANS_PROTO = (1 << 31), /* transport protocol error */
250 EDMA_ERR_OVERRUN_5 = (1 << 5), 248 EDMA_ERR_OVERRUN_5 = (1 << 5),
251 EDMA_ERR_UNDERRUN_5 = (1 << 6), 249 EDMA_ERR_UNDERRUN_5 = (1 << 6),
252 EDMA_EH_FREEZE = EDMA_ERR_D_PAR | 250 EDMA_EH_FREEZE = EDMA_ERR_D_PAR |
@@ -255,7 +253,7 @@ enum {
255 EDMA_ERR_DEV_CON | 253 EDMA_ERR_DEV_CON |
256 EDMA_ERR_SERR | 254 EDMA_ERR_SERR |
257 EDMA_ERR_SELF_DIS | 255 EDMA_ERR_SELF_DIS |
258 EDMA_ERR_CRBQ_PAR | 256 EDMA_ERR_CRQB_PAR |
259 EDMA_ERR_CRPB_PAR | 257 EDMA_ERR_CRPB_PAR |
260 EDMA_ERR_INTRL_PAR | 258 EDMA_ERR_INTRL_PAR |
261 EDMA_ERR_IORDY | 259 EDMA_ERR_IORDY |
@@ -270,7 +268,7 @@ enum {
270 EDMA_ERR_OVERRUN_5 | 268 EDMA_ERR_OVERRUN_5 |
271 EDMA_ERR_UNDERRUN_5 | 269 EDMA_ERR_UNDERRUN_5 |
272 EDMA_ERR_SELF_DIS_5 | 270 EDMA_ERR_SELF_DIS_5 |
273 EDMA_ERR_CRBQ_PAR | 271 EDMA_ERR_CRQB_PAR |
274 EDMA_ERR_CRPB_PAR | 272 EDMA_ERR_CRPB_PAR |
275 EDMA_ERR_INTRL_PAR | 273 EDMA_ERR_INTRL_PAR |
276 EDMA_ERR_IORDY, 274 EDMA_ERR_IORDY,
@@ -286,10 +284,10 @@ enum {
286 EDMA_RSP_Q_OUT_PTR_OFS = 0x24, /* also contains BASE_LO */ 284 EDMA_RSP_Q_OUT_PTR_OFS = 0x24, /* also contains BASE_LO */
287 EDMA_RSP_Q_PTR_SHIFT = 3, 285 EDMA_RSP_Q_PTR_SHIFT = 3,
288 286
289 EDMA_CMD_OFS = 0x28, 287 EDMA_CMD_OFS = 0x28, /* EDMA command register */
290 EDMA_EN = (1 << 0), 288 EDMA_EN = (1 << 0), /* enable EDMA */
291 EDMA_DS = (1 << 1), 289 EDMA_DS = (1 << 1), /* disable EDMA; self-negated */
292 ATA_RST = (1 << 2), 290 ATA_RST = (1 << 2), /* reset trans/link/phy */
293 291
294 EDMA_IORDY_TMOUT = 0x34, 292 EDMA_IORDY_TMOUT = 0x34,
295 EDMA_ARB_CFG = 0x38, 293 EDMA_ARB_CFG = 0x38,
@@ -301,14 +299,13 @@ enum {
301 MV_HP_ERRATA_60X1B2 = (1 << 3), 299 MV_HP_ERRATA_60X1B2 = (1 << 3),
302 MV_HP_ERRATA_60X1C0 = (1 << 4), 300 MV_HP_ERRATA_60X1C0 = (1 << 4),
303 MV_HP_ERRATA_XX42A0 = (1 << 5), 301 MV_HP_ERRATA_XX42A0 = (1 << 5),
304 MV_HP_GEN_I = (1 << 6), 302 MV_HP_GEN_I = (1 << 6), /* Generation I: 50xx */
305 MV_HP_GEN_II = (1 << 7), 303 MV_HP_GEN_II = (1 << 7), /* Generation II: 60xx */
306 MV_HP_GEN_IIE = (1 << 8), 304 MV_HP_GEN_IIE = (1 << 8), /* Generation IIE: 6042/7042 */
307 305
308 /* Port private flags (pp_flags) */ 306 /* Port private flags (pp_flags) */
309 MV_PP_FLAG_EDMA_EN = (1 << 0), 307 MV_PP_FLAG_EDMA_EN = (1 << 0), /* is EDMA engine enabled? */
310 MV_PP_FLAG_EDMA_DS_ACT = (1 << 1), 308 MV_PP_FLAG_HAD_A_RESET = (1 << 2), /* 1st hard reset complete? */
311 MV_PP_FLAG_HAD_A_RESET = (1 << 2),
312}; 309};
313 310
314#define IS_GEN_I(hpriv) ((hpriv)->hp_flags & MV_HP_GEN_I) 311#define IS_GEN_I(hpriv) ((hpriv)->hp_flags & MV_HP_GEN_I)
@@ -318,8 +315,12 @@ enum {
318enum { 315enum {
319 MV_DMA_BOUNDARY = 0xffffffffU, 316 MV_DMA_BOUNDARY = 0xffffffffU,
320 317
318 /* mask of register bits containing lower 32 bits
319 * of EDMA request queue DMA address
320 */
321 EDMA_REQ_Q_BASE_LO_MASK = 0xfffffc00U, 321 EDMA_REQ_Q_BASE_LO_MASK = 0xfffffc00U,
322 322
323 /* ditto, for response queue */
323 EDMA_RSP_Q_BASE_LO_MASK = 0xffffff00U, 324 EDMA_RSP_Q_BASE_LO_MASK = 0xffffff00U,
324}; 325};
325 326
@@ -403,10 +404,10 @@ struct mv_host_priv {
403}; 404};
404 405
405static void mv_irq_clear(struct ata_port *ap); 406static void mv_irq_clear(struct ata_port *ap);
406static u32 mv_scr_read(struct ata_port *ap, unsigned int sc_reg_in); 407static int mv_scr_read(struct ata_port *ap, unsigned int sc_reg_in, u32 *val);
407static void mv_scr_write(struct ata_port *ap, unsigned int sc_reg_in, u32 val); 408static int mv_scr_write(struct ata_port *ap, unsigned int sc_reg_in, u32 val);
408static u32 mv5_scr_read(struct ata_port *ap, unsigned int sc_reg_in); 409static int mv5_scr_read(struct ata_port *ap, unsigned int sc_reg_in, u32 *val);
409static void mv5_scr_write(struct ata_port *ap, unsigned int sc_reg_in, u32 val); 410static int mv5_scr_write(struct ata_port *ap, unsigned int sc_reg_in, u32 val);
410static int mv_port_start(struct ata_port *ap); 411static int mv_port_start(struct ata_port *ap);
411static void mv_port_stop(struct ata_port *ap); 412static void mv_port_stop(struct ata_port *ap);
412static void mv_qc_prep(struct ata_queued_cmd *qc); 413static void mv_qc_prep(struct ata_queued_cmd *qc);
@@ -823,7 +824,7 @@ static void mv_start_dma(void __iomem *base, struct mv_host_priv *hpriv,
823} 824}
824 825
825/** 826/**
826 * mv_stop_dma - Disable eDMA engine 827 * __mv_stop_dma - Disable eDMA engine
827 * @ap: ATA channel to manipulate 828 * @ap: ATA channel to manipulate
828 * 829 *
829 * Verify the local cache of the eDMA state is accurate with a 830 * Verify the local cache of the eDMA state is accurate with a
@@ -832,7 +833,7 @@ static void mv_start_dma(void __iomem *base, struct mv_host_priv *hpriv,
832 * LOCKING: 833 * LOCKING:
833 * Inherited from caller. 834 * Inherited from caller.
834 */ 835 */
835static int mv_stop_dma(struct ata_port *ap) 836static int __mv_stop_dma(struct ata_port *ap)
836{ 837{
837 void __iomem *port_mmio = mv_ap_base(ap); 838 void __iomem *port_mmio = mv_ap_base(ap);
838 struct mv_port_priv *pp = ap->private_data; 839 struct mv_port_priv *pp = ap->private_data;
@@ -865,6 +866,18 @@ static int mv_stop_dma(struct ata_port *ap)
865 return err; 866 return err;
866} 867}
867 868
869static int mv_stop_dma(struct ata_port *ap)
870{
871 unsigned long flags;
872 int rc;
873
874 spin_lock_irqsave(&ap->host->lock, flags);
875 rc = __mv_stop_dma(ap);
876 spin_unlock_irqrestore(&ap->host->lock, flags);
877
878 return rc;
879}
880
868#ifdef ATA_DEBUG 881#ifdef ATA_DEBUG
869static void mv_dump_mem(void __iomem *start, unsigned bytes) 882static void mv_dump_mem(void __iomem *start, unsigned bytes)
870{ 883{
@@ -961,22 +974,26 @@ static unsigned int mv_scr_offset(unsigned int sc_reg_in)
961 return ofs; 974 return ofs;
962} 975}
963 976
964static u32 mv_scr_read(struct ata_port *ap, unsigned int sc_reg_in) 977static int mv_scr_read(struct ata_port *ap, unsigned int sc_reg_in, u32 *val)
965{ 978{
966 unsigned int ofs = mv_scr_offset(sc_reg_in); 979 unsigned int ofs = mv_scr_offset(sc_reg_in);
967 980
968 if (0xffffffffU != ofs) 981 if (ofs != 0xffffffffU) {
969 return readl(mv_ap_base(ap) + ofs); 982 *val = readl(mv_ap_base(ap) + ofs);
970 else 983 return 0;
971 return (u32) ofs; 984 } else
985 return -EINVAL;
972} 986}
973 987
974static void mv_scr_write(struct ata_port *ap, unsigned int sc_reg_in, u32 val) 988static int mv_scr_write(struct ata_port *ap, unsigned int sc_reg_in, u32 val)
975{ 989{
976 unsigned int ofs = mv_scr_offset(sc_reg_in); 990 unsigned int ofs = mv_scr_offset(sc_reg_in);
977 991
978 if (0xffffffffU != ofs) 992 if (ofs != 0xffffffffU) {
979 writelfl(val, mv_ap_base(ap) + ofs); 993 writelfl(val, mv_ap_base(ap) + ofs);
994 return 0;
995 } else
996 return -EINVAL;
980} 997}
981 998
982static void mv_edma_cfg(struct ata_port *ap, struct mv_host_priv *hpriv, 999static void mv_edma_cfg(struct ata_port *ap, struct mv_host_priv *hpriv,
@@ -1029,6 +1046,7 @@ static int mv_port_start(struct ata_port *ap)
1029 void __iomem *port_mmio = mv_ap_base(ap); 1046 void __iomem *port_mmio = mv_ap_base(ap);
1030 void *mem; 1047 void *mem;
1031 dma_addr_t mem_dma; 1048 dma_addr_t mem_dma;
1049 unsigned long flags;
1032 int rc; 1050 int rc;
1033 1051
1034 pp = devm_kzalloc(dev, sizeof(*pp), GFP_KERNEL); 1052 pp = devm_kzalloc(dev, sizeof(*pp), GFP_KERNEL);
@@ -1067,10 +1085,14 @@ static int mv_port_start(struct ata_port *ap)
1067 pp->sg_tbl = mem; 1085 pp->sg_tbl = mem;
1068 pp->sg_tbl_dma = mem_dma; 1086 pp->sg_tbl_dma = mem_dma;
1069 1087
1088 spin_lock_irqsave(&ap->host->lock, flags);
1089
1070 mv_edma_cfg(ap, hpriv, port_mmio); 1090 mv_edma_cfg(ap, hpriv, port_mmio);
1071 1091
1072 mv_set_edma_ptrs(port_mmio, hpriv, pp); 1092 mv_set_edma_ptrs(port_mmio, hpriv, pp);
1073 1093
1094 spin_unlock_irqrestore(&ap->host->lock, flags);
1095
1074 /* Don't turn on EDMA here...do it before DMA commands only. Else 1096 /* Don't turn on EDMA here...do it before DMA commands only. Else
1075 * we'll be unable to send non-data, PIO, etc due to restricted access 1097 * we'll be unable to send non-data, PIO, etc due to restricted access
1076 * to shadow regs. 1098 * to shadow regs.
@@ -1090,11 +1112,7 @@ static int mv_port_start(struct ata_port *ap)
1090 */ 1112 */
1091static void mv_port_stop(struct ata_port *ap) 1113static void mv_port_stop(struct ata_port *ap)
1092{ 1114{
1093 unsigned long flags;
1094
1095 spin_lock_irqsave(&ap->host->lock, flags);
1096 mv_stop_dma(ap); 1115 mv_stop_dma(ap);
1097 spin_unlock_irqrestore(&ap->host->lock, flags);
1098} 1116}
1099 1117
1100/** 1118/**
@@ -1325,7 +1343,7 @@ static unsigned int mv_qc_issue(struct ata_queued_cmd *qc)
1325 * port. Turn off EDMA so there won't be problems accessing 1343 * port. Turn off EDMA so there won't be problems accessing
1326 * shadow block, etc registers. 1344 * shadow block, etc registers.
1327 */ 1345 */
1328 mv_stop_dma(ap); 1346 __mv_stop_dma(ap);
1329 return ata_qc_issue_prot(qc); 1347 return ata_qc_issue_prot(qc);
1330 } 1348 }
1331 1349
@@ -1393,16 +1411,16 @@ static void mv_err_intr(struct ata_port *ap, struct ata_queued_cmd *qc)
1393 if (edma_err_cause & EDMA_ERR_DEV) 1411 if (edma_err_cause & EDMA_ERR_DEV)
1394 err_mask |= AC_ERR_DEV; 1412 err_mask |= AC_ERR_DEV;
1395 if (edma_err_cause & (EDMA_ERR_D_PAR | EDMA_ERR_PRD_PAR | 1413 if (edma_err_cause & (EDMA_ERR_D_PAR | EDMA_ERR_PRD_PAR |
1396 EDMA_ERR_CRBQ_PAR | EDMA_ERR_CRPB_PAR | 1414 EDMA_ERR_CRQB_PAR | EDMA_ERR_CRPB_PAR |
1397 EDMA_ERR_INTRL_PAR)) { 1415 EDMA_ERR_INTRL_PAR)) {
1398 err_mask |= AC_ERR_ATA_BUS; 1416 err_mask |= AC_ERR_ATA_BUS;
1399 action |= ATA_EH_HARDRESET; 1417 action |= ATA_EH_HARDRESET;
1400 ata_ehi_push_desc(ehi, ", parity error"); 1418 ata_ehi_push_desc(ehi, "parity error");
1401 } 1419 }
1402 if (edma_err_cause & (EDMA_ERR_DEV_DCON | EDMA_ERR_DEV_CON)) { 1420 if (edma_err_cause & (EDMA_ERR_DEV_DCON | EDMA_ERR_DEV_CON)) {
1403 ata_ehi_hotplugged(ehi); 1421 ata_ehi_hotplugged(ehi);
1404 ata_ehi_push_desc(ehi, edma_err_cause & EDMA_ERR_DEV_DCON ? 1422 ata_ehi_push_desc(ehi, edma_err_cause & EDMA_ERR_DEV_DCON ?
1405 ", dev disconnect" : ", dev connect"); 1423 "dev disconnect" : "dev connect");
1406 } 1424 }
1407 1425
1408 if (IS_GEN_I(hpriv)) { 1426 if (IS_GEN_I(hpriv)) {
@@ -1411,7 +1429,7 @@ static void mv_err_intr(struct ata_port *ap, struct ata_queued_cmd *qc)
1411 if (edma_err_cause & EDMA_ERR_SELF_DIS_5) { 1429 if (edma_err_cause & EDMA_ERR_SELF_DIS_5) {
1412 struct mv_port_priv *pp = ap->private_data; 1430 struct mv_port_priv *pp = ap->private_data;
1413 pp->pp_flags &= ~MV_PP_FLAG_EDMA_EN; 1431 pp->pp_flags &= ~MV_PP_FLAG_EDMA_EN;
1414 ata_ehi_push_desc(ehi, ", EDMA self-disable"); 1432 ata_ehi_push_desc(ehi, "EDMA self-disable");
1415 } 1433 }
1416 } else { 1434 } else {
1417 eh_freeze_mask = EDMA_EH_FREEZE; 1435 eh_freeze_mask = EDMA_EH_FREEZE;
@@ -1419,7 +1437,7 @@ static void mv_err_intr(struct ata_port *ap, struct ata_queued_cmd *qc)
1419 if (edma_err_cause & EDMA_ERR_SELF_DIS) { 1437 if (edma_err_cause & EDMA_ERR_SELF_DIS) {
1420 struct mv_port_priv *pp = ap->private_data; 1438 struct mv_port_priv *pp = ap->private_data;
1421 pp->pp_flags &= ~MV_PP_FLAG_EDMA_EN; 1439 pp->pp_flags &= ~MV_PP_FLAG_EDMA_EN;
1422 ata_ehi_push_desc(ehi, ", EDMA self-disable"); 1440 ata_ehi_push_desc(ehi, "EDMA self-disable");
1423 } 1441 }
1424 1442
1425 if (edma_err_cause & EDMA_ERR_SERR) { 1443 if (edma_err_cause & EDMA_ERR_SERR) {
@@ -1489,33 +1507,30 @@ static void mv_intr_edma(struct ata_port *ap)
1489 1507
1490 while (1) { 1508 while (1) {
1491 u16 status; 1509 u16 status;
1510 unsigned int tag;
1492 1511
1493 /* get s/w response queue last-read pointer, and compare */ 1512 /* get s/w response queue last-read pointer, and compare */
1494 out_index = pp->resp_idx & MV_MAX_Q_DEPTH_MASK; 1513 out_index = pp->resp_idx & MV_MAX_Q_DEPTH_MASK;
1495 if (in_index == out_index) 1514 if (in_index == out_index)
1496 break; 1515 break;
1497 1516
1498
1499 /* 50xx: get active ATA command */ 1517 /* 50xx: get active ATA command */
1500 if (IS_GEN_I(hpriv)) 1518 if (IS_GEN_I(hpriv))
1501 qc = ata_qc_from_tag(ap, ap->active_tag); 1519 tag = ap->active_tag;
1502 1520
1503 /* 60xx: get active ATA command via tag, to enable support 1521 /* Gen II/IIE: get active ATA command via tag, to enable
1504 * for queueing. this works transparently for queued and 1522 * support for queueing. this works transparently for
1505 * non-queued modes. 1523 * queued and non-queued modes.
1506 */ 1524 */
1507 else { 1525 else if (IS_GEN_II(hpriv))
1508 unsigned int tag; 1526 tag = (le16_to_cpu(pp->crpb[out_index].id)
1527 >> CRPB_IOID_SHIFT_6) & 0x3f;
1509 1528
1510 if (IS_GEN_II(hpriv)) 1529 else /* IS_GEN_IIE */
1511 tag = (le16_to_cpu(pp->crpb[out_index].id) 1530 tag = (le16_to_cpu(pp->crpb[out_index].id)
1512 >> CRPB_IOID_SHIFT_6) & 0x3f; 1531 >> CRPB_IOID_SHIFT_7) & 0x3f;
1513 else
1514 tag = (le16_to_cpu(pp->crpb[out_index].id)
1515 >> CRPB_IOID_SHIFT_7) & 0x3f;
1516 1532
1517 qc = ata_qc_from_tag(ap, tag); 1533 qc = ata_qc_from_tag(ap, tag);
1518 }
1519 1534
1520 /* lower 8 bits of status are EDMA_ERR_IRQ_CAUSE_OFS 1535 /* lower 8 bits of status are EDMA_ERR_IRQ_CAUSE_OFS
1521 * bits (WARNING: might not necessarily be associated 1536 * bits (WARNING: might not necessarily be associated
@@ -1535,7 +1550,7 @@ static void mv_intr_edma(struct ata_port *ap)
1535 ata_qc_complete(qc); 1550 ata_qc_complete(qc);
1536 } 1551 }
1537 1552
1538 /* advance software response queue pointer, to 1553 /* advance software response queue pointer, to
1539 * indicate (after the loop completes) to hardware 1554 * indicate (after the loop completes) to hardware
1540 * that we have consumed a response queue entry. 1555 * that we have consumed a response queue entry.
1541 */ 1556 */
@@ -1741,26 +1756,30 @@ static unsigned int mv5_scr_offset(unsigned int sc_reg_in)
1741 return ofs; 1756 return ofs;
1742} 1757}
1743 1758
1744static u32 mv5_scr_read(struct ata_port *ap, unsigned int sc_reg_in) 1759static int mv5_scr_read(struct ata_port *ap, unsigned int sc_reg_in, u32 *val)
1745{ 1760{
1746 void __iomem *mmio = ap->host->iomap[MV_PRIMARY_BAR]; 1761 void __iomem *mmio = ap->host->iomap[MV_PRIMARY_BAR];
1747 void __iomem *addr = mv5_phy_base(mmio, ap->port_no); 1762 void __iomem *addr = mv5_phy_base(mmio, ap->port_no);
1748 unsigned int ofs = mv5_scr_offset(sc_reg_in); 1763 unsigned int ofs = mv5_scr_offset(sc_reg_in);
1749 1764
1750 if (ofs != 0xffffffffU) 1765 if (ofs != 0xffffffffU) {
1751 return readl(addr + ofs); 1766 *val = readl(addr + ofs);
1752 else 1767 return 0;
1753 return (u32) ofs; 1768 } else
1769 return -EINVAL;
1754} 1770}
1755 1771
1756static void mv5_scr_write(struct ata_port *ap, unsigned int sc_reg_in, u32 val) 1772static int mv5_scr_write(struct ata_port *ap, unsigned int sc_reg_in, u32 val)
1757{ 1773{
1758 void __iomem *mmio = ap->host->iomap[MV_PRIMARY_BAR]; 1774 void __iomem *mmio = ap->host->iomap[MV_PRIMARY_BAR];
1759 void __iomem *addr = mv5_phy_base(mmio, ap->port_no); 1775 void __iomem *addr = mv5_phy_base(mmio, ap->port_no);
1760 unsigned int ofs = mv5_scr_offset(sc_reg_in); 1776 unsigned int ofs = mv5_scr_offset(sc_reg_in);
1761 1777
1762 if (ofs != 0xffffffffU) 1778 if (ofs != 0xffffffffU) {
1763 writelfl(val, addr + ofs); 1779 writelfl(val, addr + ofs);
1780 return 0;
1781 } else
1782 return -EINVAL;
1764} 1783}
1765 1784
1766static void mv5_reset_bus(struct pci_dev *pdev, void __iomem *mmio) 1785static void mv5_reset_bus(struct pci_dev *pdev, void __iomem *mmio)
@@ -2138,9 +2157,17 @@ static void mv_phy_reset(struct ata_port *ap, unsigned int *class,
2138 2157
2139 VPRINTK("ENTER, port %u, mmio 0x%p\n", ap->port_no, port_mmio); 2158 VPRINTK("ENTER, port %u, mmio 0x%p\n", ap->port_no, port_mmio);
2140 2159
2141 DPRINTK("S-regs after ATA_RST: SStat 0x%08x SErr 0x%08x " 2160#ifdef DEBUG
2142 "SCtrl 0x%08x\n", mv_scr_read(ap, SCR_STATUS), 2161 {
2143 mv_scr_read(ap, SCR_ERROR), mv_scr_read(ap, SCR_CONTROL)); 2162 u32 sstatus, serror, scontrol;
2163
2164 mv_scr_read(ap, SCR_STATUS, &sstatus);
2165 mv_scr_read(ap, SCR_ERROR, &serror);
2166 mv_scr_read(ap, SCR_CONTROL, &scontrol);
2167 DPRINTK("S-regs after ATA_RST: SStat 0x%08x SErr 0x%08x "
2168 "SCtrl 0x%08x\n", status, serror, scontrol);
2169 }
2170#endif
2144 2171
2145 /* Issue COMRESET via SControl */ 2172 /* Issue COMRESET via SControl */
2146comreset_retry: 2173comreset_retry:
@@ -2164,9 +2191,17 @@ comreset_retry:
2164 (retry-- > 0)) 2191 (retry-- > 0))
2165 goto comreset_retry; 2192 goto comreset_retry;
2166 2193
2167 DPRINTK("S-regs after PHY wake: SStat 0x%08x SErr 0x%08x " 2194#ifdef DEBUG
2168 "SCtrl 0x%08x\n", mv_scr_read(ap, SCR_STATUS), 2195 {
2169 mv_scr_read(ap, SCR_ERROR), mv_scr_read(ap, SCR_CONTROL)); 2196 u32 sstatus, serror, scontrol;
2197
2198 mv_scr_read(ap, SCR_STATUS, &sstatus);
2199 mv_scr_read(ap, SCR_ERROR, &serror);
2200 mv_scr_read(ap, SCR_CONTROL, &scontrol);
2201 DPRINTK("S-regs after PHY wake: SStat 0x%08x SErr 0x%08x "
2202 "SCtrl 0x%08x\n", sstatus, serror, scontrol);
2203 }
2204#endif
2170 2205
2171 if (ata_port_offline(ap)) { 2206 if (ata_port_offline(ap)) {
2172 *class = ATA_DEV_NONE; 2207 *class = ATA_DEV_NONE;
@@ -2209,7 +2244,7 @@ static int mv_prereset(struct ata_port *ap, unsigned long deadline)
2209 struct mv_port_priv *pp = ap->private_data; 2244 struct mv_port_priv *pp = ap->private_data;
2210 struct ata_eh_context *ehc = &ap->eh_context; 2245 struct ata_eh_context *ehc = &ap->eh_context;
2211 int rc; 2246 int rc;
2212 2247
2213 rc = mv_stop_dma(ap); 2248 rc = mv_stop_dma(ap);
2214 if (rc) 2249 if (rc)
2215 ehc->i.action |= ATA_EH_HARDRESET; 2250 ehc->i.action |= ATA_EH_HARDRESET;
diff --git a/drivers/ata/sata_nv.c b/drivers/ata/sata_nv.c
index db81e3efa5ec..0b58c4df6fd2 100644
--- a/drivers/ata/sata_nv.c
+++ b/drivers/ata/sata_nv.c
@@ -236,8 +236,8 @@ static void nv_ck804_host_stop(struct ata_host *host);
236static irqreturn_t nv_generic_interrupt(int irq, void *dev_instance); 236static irqreturn_t nv_generic_interrupt(int irq, void *dev_instance);
237static irqreturn_t nv_nf2_interrupt(int irq, void *dev_instance); 237static irqreturn_t nv_nf2_interrupt(int irq, void *dev_instance);
238static irqreturn_t nv_ck804_interrupt(int irq, void *dev_instance); 238static irqreturn_t nv_ck804_interrupt(int irq, void *dev_instance);
239static u32 nv_scr_read (struct ata_port *ap, unsigned int sc_reg); 239static int nv_scr_read (struct ata_port *ap, unsigned int sc_reg, u32 *val);
240static void nv_scr_write (struct ata_port *ap, unsigned int sc_reg, u32 val); 240static int nv_scr_write (struct ata_port *ap, unsigned int sc_reg, u32 val);
241 241
242static void nv_nf2_freeze(struct ata_port *ap); 242static void nv_nf2_freeze(struct ata_port *ap);
243static void nv_nf2_thaw(struct ata_port *ap); 243static void nv_nf2_thaw(struct ata_port *ap);
@@ -715,19 +715,20 @@ static int nv_adma_check_cpb(struct ata_port *ap, int cpb_num, int force_err)
715 int freeze = 0; 715 int freeze = 0;
716 716
717 ata_ehi_clear_desc(ehi); 717 ata_ehi_clear_desc(ehi);
718 ata_ehi_push_desc(ehi, "CPB resp_flags 0x%x", flags ); 718 __ata_ehi_push_desc(ehi, "CPB resp_flags 0x%x: ", flags );
719 if (flags & NV_CPB_RESP_ATA_ERR) { 719 if (flags & NV_CPB_RESP_ATA_ERR) {
720 ata_ehi_push_desc(ehi, ": ATA error"); 720 ata_ehi_push_desc(ehi, "ATA error");
721 ehi->err_mask |= AC_ERR_DEV; 721 ehi->err_mask |= AC_ERR_DEV;
722 } else if (flags & NV_CPB_RESP_CMD_ERR) { 722 } else if (flags & NV_CPB_RESP_CMD_ERR) {
723 ata_ehi_push_desc(ehi, ": CMD error"); 723 ata_ehi_push_desc(ehi, "CMD error");
724 ehi->err_mask |= AC_ERR_DEV; 724 ehi->err_mask |= AC_ERR_DEV;
725 } else if (flags & NV_CPB_RESP_CPB_ERR) { 725 } else if (flags & NV_CPB_RESP_CPB_ERR) {
726 ata_ehi_push_desc(ehi, ": CPB error"); 726 ata_ehi_push_desc(ehi, "CPB error");
727 ehi->err_mask |= AC_ERR_SYSTEM; 727 ehi->err_mask |= AC_ERR_SYSTEM;
728 freeze = 1; 728 freeze = 1;
729 } else { 729 } else {
730 /* notifier error, but no error in CPB flags? */ 730 /* notifier error, but no error in CPB flags? */
731 ata_ehi_push_desc(ehi, "unknown");
731 ehi->err_mask |= AC_ERR_OTHER; 732 ehi->err_mask |= AC_ERR_OTHER;
732 freeze = 1; 733 freeze = 1;
733 } 734 }
@@ -854,20 +855,21 @@ static irqreturn_t nv_adma_interrupt(int irq, void *dev_instance)
854 struct ata_eh_info *ehi = &ap->eh_info; 855 struct ata_eh_info *ehi = &ap->eh_info;
855 856
856 ata_ehi_clear_desc(ehi); 857 ata_ehi_clear_desc(ehi);
857 ata_ehi_push_desc(ehi, "ADMA status 0x%08x", status ); 858 __ata_ehi_push_desc(ehi, "ADMA status 0x%08x: ", status );
858 if (status & NV_ADMA_STAT_TIMEOUT) { 859 if (status & NV_ADMA_STAT_TIMEOUT) {
859 ehi->err_mask |= AC_ERR_SYSTEM; 860 ehi->err_mask |= AC_ERR_SYSTEM;
860 ata_ehi_push_desc(ehi, ": timeout"); 861 ata_ehi_push_desc(ehi, "timeout");
861 } else if (status & NV_ADMA_STAT_HOTPLUG) { 862 } else if (status & NV_ADMA_STAT_HOTPLUG) {
862 ata_ehi_hotplugged(ehi); 863 ata_ehi_hotplugged(ehi);
863 ata_ehi_push_desc(ehi, ": hotplug"); 864 ata_ehi_push_desc(ehi, "hotplug");
864 } else if (status & NV_ADMA_STAT_HOTUNPLUG) { 865 } else if (status & NV_ADMA_STAT_HOTUNPLUG) {
865 ata_ehi_hotplugged(ehi); 866 ata_ehi_hotplugged(ehi);
866 ata_ehi_push_desc(ehi, ": hot unplug"); 867 ata_ehi_push_desc(ehi, "hot unplug");
867 } else if (status & NV_ADMA_STAT_SERROR) { 868 } else if (status & NV_ADMA_STAT_SERROR) {
868 /* let libata analyze SError and figure out the cause */ 869 /* let libata analyze SError and figure out the cause */
869 ata_ehi_push_desc(ehi, ": SError"); 870 ata_ehi_push_desc(ehi, "SError");
870 } 871 } else
872 ata_ehi_push_desc(ehi, "unknown");
871 ata_port_freeze(ap); 873 ata_port_freeze(ap);
872 continue; 874 continue;
873 } 875 }
@@ -1391,20 +1393,22 @@ static irqreturn_t nv_ck804_interrupt(int irq, void *dev_instance)
1391 return ret; 1393 return ret;
1392} 1394}
1393 1395
1394static u32 nv_scr_read (struct ata_port *ap, unsigned int sc_reg) 1396static int nv_scr_read(struct ata_port *ap, unsigned int sc_reg, u32 *val)
1395{ 1397{
1396 if (sc_reg > SCR_CONTROL) 1398 if (sc_reg > SCR_CONTROL)
1397 return 0xffffffffU; 1399 return -EINVAL;
1398 1400
1399 return ioread32(ap->ioaddr.scr_addr + (sc_reg * 4)); 1401 *val = ioread32(ap->ioaddr.scr_addr + (sc_reg * 4));
1402 return 0;
1400} 1403}
1401 1404
1402static void nv_scr_write (struct ata_port *ap, unsigned int sc_reg, u32 val) 1405static int nv_scr_write(struct ata_port *ap, unsigned int sc_reg, u32 val)
1403{ 1406{
1404 if (sc_reg > SCR_CONTROL) 1407 if (sc_reg > SCR_CONTROL)
1405 return; 1408 return -EINVAL;
1406 1409
1407 iowrite32(val, ap->ioaddr.scr_addr + (sc_reg * 4)); 1410 iowrite32(val, ap->ioaddr.scr_addr + (sc_reg * 4));
1411 return 0;
1408} 1412}
1409 1413
1410static void nv_nf2_freeze(struct ata_port *ap) 1414static void nv_nf2_freeze(struct ata_port *ap)
diff --git a/drivers/ata/sata_promise.c b/drivers/ata/sata_promise.c
index d2fcb9a6bec2..d39ebc23c4a9 100644
--- a/drivers/ata/sata_promise.c
+++ b/drivers/ata/sata_promise.c
@@ -128,8 +128,8 @@ struct pdc_port_priv {
128 dma_addr_t pkt_dma; 128 dma_addr_t pkt_dma;
129}; 129};
130 130
131static u32 pdc_sata_scr_read (struct ata_port *ap, unsigned int sc_reg); 131static int pdc_sata_scr_read(struct ata_port *ap, unsigned int sc_reg, u32 *val);
132static void pdc_sata_scr_write (struct ata_port *ap, unsigned int sc_reg, u32 val); 132static int pdc_sata_scr_write(struct ata_port *ap, unsigned int sc_reg, u32 val);
133static int pdc_ata_init_one (struct pci_dev *pdev, const struct pci_device_id *ent); 133static int pdc_ata_init_one (struct pci_dev *pdev, const struct pci_device_id *ent);
134static int pdc_common_port_start(struct ata_port *ap); 134static int pdc_common_port_start(struct ata_port *ap);
135static int pdc_sata_port_start(struct ata_port *ap); 135static int pdc_sata_port_start(struct ata_port *ap);
@@ -427,19 +427,20 @@ static int pdc_sata_cable_detect(struct ata_port *ap)
427 return ATA_CBL_SATA; 427 return ATA_CBL_SATA;
428} 428}
429 429
430static u32 pdc_sata_scr_read (struct ata_port *ap, unsigned int sc_reg) 430static int pdc_sata_scr_read(struct ata_port *ap, unsigned int sc_reg, u32 *val)
431{ 431{
432 if (sc_reg > SCR_CONTROL) 432 if (sc_reg > SCR_CONTROL)
433 return 0xffffffffU; 433 return -EINVAL;
434 return readl(ap->ioaddr.scr_addr + (sc_reg * 4)); 434 *val = readl(ap->ioaddr.scr_addr + (sc_reg * 4));
435 return 0;
435} 436}
436 437
437static void pdc_sata_scr_write (struct ata_port *ap, unsigned int sc_reg, 438static int pdc_sata_scr_write(struct ata_port *ap, unsigned int sc_reg, u32 val)
438 u32 val)
439{ 439{
440 if (sc_reg > SCR_CONTROL) 440 if (sc_reg > SCR_CONTROL)
441 return; 441 return -EINVAL;
442 writel(val, ap->ioaddr.scr_addr + (sc_reg * 4)); 442 writel(val, ap->ioaddr.scr_addr + (sc_reg * 4));
443 return 0;
443} 444}
444 445
445static void pdc_atapi_pkt(struct ata_queued_cmd *qc) 446static void pdc_atapi_pkt(struct ata_queued_cmd *qc)
@@ -642,8 +643,12 @@ static void pdc_error_intr(struct ata_port *ap, struct ata_queued_cmd *qc,
642 | PDC_PCI_SYS_ERR | PDC1_PCI_PARITY_ERR)) 643 | PDC_PCI_SYS_ERR | PDC1_PCI_PARITY_ERR))
643 ac_err_mask |= AC_ERR_HOST_BUS; 644 ac_err_mask |= AC_ERR_HOST_BUS;
644 645
645 if (sata_scr_valid(ap)) 646 if (sata_scr_valid(ap)) {
646 ehi->serror |= pdc_sata_scr_read(ap, SCR_ERROR); 647 u32 serror;
648
649 pdc_sata_scr_read(ap, SCR_ERROR, &serror);
650 ehi->serror |= serror;
651 }
647 652
648 qc->err_mask |= ac_err_mask; 653 qc->err_mask |= ac_err_mask;
649 654
diff --git a/drivers/ata/sata_qstor.c b/drivers/ata/sata_qstor.c
index 9ab554da89bf..c8f9242e7f44 100644
--- a/drivers/ata/sata_qstor.c
+++ b/drivers/ata/sata_qstor.c
@@ -111,8 +111,8 @@ struct qs_port_priv {
111 qs_state_t state; 111 qs_state_t state;
112}; 112};
113 113
114static u32 qs_scr_read (struct ata_port *ap, unsigned int sc_reg); 114static int qs_scr_read(struct ata_port *ap, unsigned int sc_reg, u32 *val);
115static void qs_scr_write (struct ata_port *ap, unsigned int sc_reg, u32 val); 115static int qs_scr_write(struct ata_port *ap, unsigned int sc_reg, u32 val);
116static int qs_ata_init_one (struct pci_dev *pdev, const struct pci_device_id *ent); 116static int qs_ata_init_one (struct pci_dev *pdev, const struct pci_device_id *ent);
117static int qs_port_start(struct ata_port *ap); 117static int qs_port_start(struct ata_port *ap);
118static void qs_host_stop(struct ata_host *host); 118static void qs_host_stop(struct ata_host *host);
@@ -255,18 +255,20 @@ static void qs_eng_timeout(struct ata_port *ap)
255 ata_eng_timeout(ap); 255 ata_eng_timeout(ap);
256} 256}
257 257
258static u32 qs_scr_read (struct ata_port *ap, unsigned int sc_reg) 258static int qs_scr_read(struct ata_port *ap, unsigned int sc_reg, u32 *val)
259{ 259{
260 if (sc_reg > SCR_CONTROL) 260 if (sc_reg > SCR_CONTROL)
261 return ~0U; 261 return -EINVAL;
262 return readl(ap->ioaddr.scr_addr + (sc_reg * 8)); 262 *val = readl(ap->ioaddr.scr_addr + (sc_reg * 8));
263 return 0;
263} 264}
264 265
265static void qs_scr_write (struct ata_port *ap, unsigned int sc_reg, u32 val) 266static int qs_scr_write(struct ata_port *ap, unsigned int sc_reg, u32 val)
266{ 267{
267 if (sc_reg > SCR_CONTROL) 268 if (sc_reg > SCR_CONTROL)
268 return; 269 return -EINVAL;
269 writel(val, ap->ioaddr.scr_addr + (sc_reg * 8)); 270 writel(val, ap->ioaddr.scr_addr + (sc_reg * 8));
271 return 0;
270} 272}
271 273
272static unsigned int qs_fill_sg(struct ata_queued_cmd *qc) 274static unsigned int qs_fill_sg(struct ata_queued_cmd *qc)
@@ -337,7 +339,7 @@ static void qs_qc_prep(struct ata_queued_cmd *qc)
337 buf[28] = dflags; 339 buf[28] = dflags;
338 340
339 /* frame information structure (FIS) */ 341 /* frame information structure (FIS) */
340 ata_tf_to_fis(&qc->tf, &buf[32], 0); 342 ata_tf_to_fis(&qc->tf, 0, 1, &buf[32]);
341} 343}
342 344
343static inline void qs_packet_start(struct ata_queued_cmd *qc) 345static inline void qs_packet_start(struct ata_queued_cmd *qc)
diff --git a/drivers/ata/sata_sil.c b/drivers/ata/sata_sil.c
index 2a86dc4598d0..db6763758952 100644
--- a/drivers/ata/sata_sil.c
+++ b/drivers/ata/sata_sil.c
@@ -115,8 +115,8 @@ static int sil_init_one (struct pci_dev *pdev, const struct pci_device_id *ent);
115static int sil_pci_device_resume(struct pci_dev *pdev); 115static int sil_pci_device_resume(struct pci_dev *pdev);
116#endif 116#endif
117static void sil_dev_config(struct ata_device *dev); 117static void sil_dev_config(struct ata_device *dev);
118static u32 sil_scr_read (struct ata_port *ap, unsigned int sc_reg); 118static int sil_scr_read(struct ata_port *ap, unsigned int sc_reg, u32 *val);
119static void sil_scr_write (struct ata_port *ap, unsigned int sc_reg, u32 val); 119static int sil_scr_write(struct ata_port *ap, unsigned int sc_reg, u32 val);
120static int sil_set_mode (struct ata_port *ap, struct ata_device **r_failed); 120static int sil_set_mode (struct ata_port *ap, struct ata_device **r_failed);
121static void sil_freeze(struct ata_port *ap); 121static void sil_freeze(struct ata_port *ap);
122static void sil_thaw(struct ata_port *ap); 122static void sil_thaw(struct ata_port *ap);
@@ -350,19 +350,26 @@ static inline void __iomem *sil_scr_addr(struct ata_port *ap, unsigned int sc_re
350 return NULL; 350 return NULL;
351} 351}
352 352
353static u32 sil_scr_read (struct ata_port *ap, unsigned int sc_reg) 353static int sil_scr_read(struct ata_port *ap, unsigned int sc_reg, u32 *val)
354{ 354{
355 void __iomem *mmio = sil_scr_addr(ap, sc_reg); 355 void __iomem *mmio = sil_scr_addr(ap, sc_reg);
356 if (mmio) 356
357 return readl(mmio); 357 if (mmio) {
358 return 0xffffffffU; 358 *val = readl(mmio);
359 return 0;
360 }
361 return -EINVAL;
359} 362}
360 363
361static void sil_scr_write (struct ata_port *ap, unsigned int sc_reg, u32 val) 364static int sil_scr_write(struct ata_port *ap, unsigned int sc_reg, u32 val)
362{ 365{
363 void __iomem *mmio = sil_scr_addr(ap, sc_reg); 366 void __iomem *mmio = sil_scr_addr(ap, sc_reg);
364 if (mmio) 367
368 if (mmio) {
365 writel(val, mmio); 369 writel(val, mmio);
370 return 0;
371 }
372 return -EINVAL;
366} 373}
367 374
368static void sil_host_intr(struct ata_port *ap, u32 bmdma2) 375static void sil_host_intr(struct ata_port *ap, u32 bmdma2)
@@ -378,7 +385,7 @@ static void sil_host_intr(struct ata_port *ap, u32 bmdma2)
378 * controllers continue to assert IRQ as long as 385 * controllers continue to assert IRQ as long as
379 * SError bits are pending. Clear SError immediately. 386 * SError bits are pending. Clear SError immediately.
380 */ 387 */
381 serror = sil_scr_read(ap, SCR_ERROR); 388 sil_scr_read(ap, SCR_ERROR, &serror);
382 sil_scr_write(ap, SCR_ERROR, serror); 389 sil_scr_write(ap, SCR_ERROR, serror);
383 390
384 /* Trigger hotplug and accumulate SError only if the 391 /* Trigger hotplug and accumulate SError only if the
diff --git a/drivers/ata/sata_sil24.c b/drivers/ata/sata_sil24.c
index ac43a30ebe29..46fbbe7f121c 100644
--- a/drivers/ata/sata_sil24.c
+++ b/drivers/ata/sata_sil24.c
@@ -326,8 +326,8 @@ struct sil24_port_priv {
326 326
327static void sil24_dev_config(struct ata_device *dev); 327static void sil24_dev_config(struct ata_device *dev);
328static u8 sil24_check_status(struct ata_port *ap); 328static u8 sil24_check_status(struct ata_port *ap);
329static u32 sil24_scr_read(struct ata_port *ap, unsigned sc_reg); 329static int sil24_scr_read(struct ata_port *ap, unsigned sc_reg, u32 *val);
330static void sil24_scr_write(struct ata_port *ap, unsigned sc_reg, u32 val); 330static int sil24_scr_write(struct ata_port *ap, unsigned sc_reg, u32 val);
331static void sil24_tf_read(struct ata_port *ap, struct ata_taskfile *tf); 331static void sil24_tf_read(struct ata_port *ap, struct ata_taskfile *tf);
332static void sil24_qc_prep(struct ata_queued_cmd *qc); 332static void sil24_qc_prep(struct ata_queued_cmd *qc);
333static unsigned int sil24_qc_issue(struct ata_queued_cmd *qc); 333static unsigned int sil24_qc_issue(struct ata_queued_cmd *qc);
@@ -464,15 +464,15 @@ static void sil24_dev_config(struct ata_device *dev)
464 writel(PORT_CS_CDB16, port + PORT_CTRL_CLR); 464 writel(PORT_CS_CDB16, port + PORT_CTRL_CLR);
465} 465}
466 466
467static inline void sil24_update_tf(struct ata_port *ap) 467static void sil24_read_tf(struct ata_port *ap, int tag, struct ata_taskfile *tf)
468{ 468{
469 struct sil24_port_priv *pp = ap->private_data;
470 void __iomem *port = ap->ioaddr.cmd_addr; 469 void __iomem *port = ap->ioaddr.cmd_addr;
471 struct sil24_prb __iomem *prb = port; 470 struct sil24_prb __iomem *prb;
472 u8 fis[6 * 4]; 471 u8 fis[6 * 4];
473 472
474 memcpy_fromio(fis, prb->fis, 6 * 4); 473 prb = port + PORT_LRAM + sil24_tag(tag) * PORT_LRAM_SLOT_SZ;
475 ata_tf_from_fis(fis, &pp->tf); 474 memcpy_fromio(fis, prb->fis, sizeof(fis));
475 ata_tf_from_fis(fis, tf);
476} 476}
477 477
478static u8 sil24_check_status(struct ata_port *ap) 478static u8 sil24_check_status(struct ata_port *ap)
@@ -488,25 +488,30 @@ static int sil24_scr_map[] = {
488 [SCR_ACTIVE] = 3, 488 [SCR_ACTIVE] = 3,
489}; 489};
490 490
491static u32 sil24_scr_read(struct ata_port *ap, unsigned sc_reg) 491static int sil24_scr_read(struct ata_port *ap, unsigned sc_reg, u32 *val)
492{ 492{
493 void __iomem *scr_addr = ap->ioaddr.scr_addr; 493 void __iomem *scr_addr = ap->ioaddr.scr_addr;
494
494 if (sc_reg < ARRAY_SIZE(sil24_scr_map)) { 495 if (sc_reg < ARRAY_SIZE(sil24_scr_map)) {
495 void __iomem *addr; 496 void __iomem *addr;
496 addr = scr_addr + sil24_scr_map[sc_reg] * 4; 497 addr = scr_addr + sil24_scr_map[sc_reg] * 4;
497 return readl(scr_addr + sil24_scr_map[sc_reg] * 4); 498 *val = readl(scr_addr + sil24_scr_map[sc_reg] * 4);
499 return 0;
498 } 500 }
499 return 0xffffffffU; 501 return -EINVAL;
500} 502}
501 503
502static void sil24_scr_write(struct ata_port *ap, unsigned sc_reg, u32 val) 504static int sil24_scr_write(struct ata_port *ap, unsigned sc_reg, u32 val)
503{ 505{
504 void __iomem *scr_addr = ap->ioaddr.scr_addr; 506 void __iomem *scr_addr = ap->ioaddr.scr_addr;
507
505 if (sc_reg < ARRAY_SIZE(sil24_scr_map)) { 508 if (sc_reg < ARRAY_SIZE(sil24_scr_map)) {
506 void __iomem *addr; 509 void __iomem *addr;
507 addr = scr_addr + sil24_scr_map[sc_reg] * 4; 510 addr = scr_addr + sil24_scr_map[sc_reg] * 4;
508 writel(val, scr_addr + sil24_scr_map[sc_reg] * 4); 511 writel(val, scr_addr + sil24_scr_map[sc_reg] * 4);
512 return 0;
509 } 513 }
514 return -EINVAL;
510} 515}
511 516
512static void sil24_tf_read(struct ata_port *ap, struct ata_taskfile *tf) 517static void sil24_tf_read(struct ata_port *ap, struct ata_taskfile *tf)
@@ -531,15 +536,60 @@ static int sil24_init_port(struct ata_port *ap)
531 return 0; 536 return 0;
532} 537}
533 538
534static int sil24_softreset(struct ata_port *ap, unsigned int *class, 539static int sil24_exec_polled_cmd(struct ata_port *ap, int pmp,
535 unsigned long deadline) 540 const struct ata_taskfile *tf,
541 int is_cmd, u32 ctrl,
542 unsigned long timeout_msec)
536{ 543{
537 void __iomem *port = ap->ioaddr.cmd_addr; 544 void __iomem *port = ap->ioaddr.cmd_addr;
538 struct sil24_port_priv *pp = ap->private_data; 545 struct sil24_port_priv *pp = ap->private_data;
539 struct sil24_prb *prb = &pp->cmd_block[0].ata.prb; 546 struct sil24_prb *prb = &pp->cmd_block[0].ata.prb;
540 dma_addr_t paddr = pp->cmd_block_dma; 547 dma_addr_t paddr = pp->cmd_block_dma;
541 u32 mask, irq_stat; 548 u32 irq_enabled, irq_mask, irq_stat;
549 int rc;
550
551 prb->ctrl = cpu_to_le16(ctrl);
552 ata_tf_to_fis(tf, pmp, is_cmd, prb->fis);
553
554 /* temporarily plug completion and error interrupts */
555 irq_enabled = readl(port + PORT_IRQ_ENABLE_SET);
556 writel(PORT_IRQ_COMPLETE | PORT_IRQ_ERROR, port + PORT_IRQ_ENABLE_CLR);
557
558 writel((u32)paddr, port + PORT_CMD_ACTIVATE);
559 writel((u64)paddr >> 32, port + PORT_CMD_ACTIVATE + 4);
560
561 irq_mask = (PORT_IRQ_COMPLETE | PORT_IRQ_ERROR) << PORT_IRQ_RAW_SHIFT;
562 irq_stat = ata_wait_register(port + PORT_IRQ_STAT, irq_mask, 0x0,
563 10, timeout_msec);
564
565 writel(irq_mask, port + PORT_IRQ_STAT); /* clear IRQs */
566 irq_stat >>= PORT_IRQ_RAW_SHIFT;
567
568 if (irq_stat & PORT_IRQ_COMPLETE)
569 rc = 0;
570 else {
571 /* force port into known state */
572 sil24_init_port(ap);
573
574 if (irq_stat & PORT_IRQ_ERROR)
575 rc = -EIO;
576 else
577 rc = -EBUSY;
578 }
579
580 /* restore IRQ enabled */
581 writel(irq_enabled, port + PORT_IRQ_ENABLE_SET);
582
583 return rc;
584}
585
586static int sil24_do_softreset(struct ata_port *ap, unsigned int *class,
587 int pmp, unsigned long deadline)
588{
589 unsigned long timeout_msec = 0;
590 struct ata_taskfile tf;
542 const char *reason; 591 const char *reason;
592 int rc;
543 593
544 DPRINTK("ENTER\n"); 594 DPRINTK("ENTER\n");
545 595
@@ -556,29 +606,22 @@ static int sil24_softreset(struct ata_port *ap, unsigned int *class,
556 } 606 }
557 607
558 /* do SRST */ 608 /* do SRST */
559 prb->ctrl = cpu_to_le16(PRB_CTRL_SRST); 609 if (time_after(deadline, jiffies))
560 prb->fis[1] = 0; /* no PMP yet */ 610 timeout_msec = jiffies_to_msecs(deadline - jiffies);
561 611
562 writel((u32)paddr, port + PORT_CMD_ACTIVATE); 612 ata_tf_init(ap->device, &tf); /* doesn't really matter */
563 writel((u64)paddr >> 32, port + PORT_CMD_ACTIVATE + 4); 613 rc = sil24_exec_polled_cmd(ap, pmp, &tf, 0, PRB_CTRL_SRST,
564 614 timeout_msec);
565 mask = (PORT_IRQ_COMPLETE | PORT_IRQ_ERROR) << PORT_IRQ_RAW_SHIFT; 615 if (rc == -EBUSY) {
566 irq_stat = ata_wait_register(port + PORT_IRQ_STAT, mask, 0x0, 616 reason = "timeout";
567 100, jiffies_to_msecs(deadline - jiffies)); 617 goto err;
568 618 } else if (rc) {
569 writel(irq_stat, port + PORT_IRQ_STAT); /* clear IRQs */ 619 reason = "SRST command error";
570 irq_stat >>= PORT_IRQ_RAW_SHIFT;
571
572 if (!(irq_stat & PORT_IRQ_COMPLETE)) {
573 if (irq_stat & PORT_IRQ_ERROR)
574 reason = "SRST command error";
575 else
576 reason = "timeout";
577 goto err; 620 goto err;
578 } 621 }
579 622
580 sil24_update_tf(ap); 623 sil24_read_tf(ap, 0, &tf);
581 *class = ata_dev_classify(&pp->tf); 624 *class = ata_dev_classify(&tf);
582 625
583 if (*class == ATA_DEV_UNKNOWN) 626 if (*class == ATA_DEV_UNKNOWN)
584 *class = ATA_DEV_NONE; 627 *class = ATA_DEV_NONE;
@@ -592,6 +635,12 @@ static int sil24_softreset(struct ata_port *ap, unsigned int *class,
592 return -EIO; 635 return -EIO;
593} 636}
594 637
638static int sil24_softreset(struct ata_port *ap, unsigned int *class,
639 unsigned long deadline)
640{
641 return sil24_do_softreset(ap, class, 0, deadline);
642}
643
595static int sil24_hardreset(struct ata_port *ap, unsigned int *class, 644static int sil24_hardreset(struct ata_port *ap, unsigned int *class,
596 unsigned long deadline) 645 unsigned long deadline)
597{ 646{
@@ -699,7 +748,7 @@ static void sil24_qc_prep(struct ata_queued_cmd *qc)
699 } 748 }
700 749
701 prb->ctrl = cpu_to_le16(ctrl); 750 prb->ctrl = cpu_to_le16(ctrl);
702 ata_tf_to_fis(&qc->tf, prb->fis, 0); 751 ata_tf_to_fis(&qc->tf, 0, 1, prb->fis);
703 752
704 if (qc->flags & ATA_QCFLAG_DMAMAP) 753 if (qc->flags & ATA_QCFLAG_DMAMAP)
705 sil24_fill_sg(qc, sge); 754 sil24_fill_sg(qc, sge);
@@ -754,6 +803,7 @@ static void sil24_thaw(struct ata_port *ap)
754static void sil24_error_intr(struct ata_port *ap) 803static void sil24_error_intr(struct ata_port *ap)
755{ 804{
756 void __iomem *port = ap->ioaddr.cmd_addr; 805 void __iomem *port = ap->ioaddr.cmd_addr;
806 struct sil24_port_priv *pp = ap->private_data;
757 struct ata_eh_info *ehi = &ap->eh_info; 807 struct ata_eh_info *ehi = &ap->eh_info;
758 int freeze = 0; 808 int freeze = 0;
759 u32 irq_stat; 809 u32 irq_stat;
@@ -769,16 +819,16 @@ static void sil24_error_intr(struct ata_port *ap)
769 819
770 if (irq_stat & (PORT_IRQ_PHYRDY_CHG | PORT_IRQ_DEV_XCHG)) { 820 if (irq_stat & (PORT_IRQ_PHYRDY_CHG | PORT_IRQ_DEV_XCHG)) {
771 ata_ehi_hotplugged(ehi); 821 ata_ehi_hotplugged(ehi);
772 ata_ehi_push_desc(ehi, ", %s", 822 ata_ehi_push_desc(ehi, "%s",
773 irq_stat & PORT_IRQ_PHYRDY_CHG ? 823 irq_stat & PORT_IRQ_PHYRDY_CHG ?
774 "PHY RDY changed" : "device exchanged"); 824 "PHY RDY changed" : "device exchanged");
775 freeze = 1; 825 freeze = 1;
776 } 826 }
777 827
778 if (irq_stat & PORT_IRQ_UNK_FIS) { 828 if (irq_stat & PORT_IRQ_UNK_FIS) {
779 ehi->err_mask |= AC_ERR_HSM; 829 ehi->err_mask |= AC_ERR_HSM;
780 ehi->action |= ATA_EH_SOFTRESET; 830 ehi->action |= ATA_EH_SOFTRESET;
781 ata_ehi_push_desc(ehi , ", unknown FIS"); 831 ata_ehi_push_desc(ehi, "unknown FIS");
782 freeze = 1; 832 freeze = 1;
783 } 833 }
784 834
@@ -797,18 +847,18 @@ static void sil24_error_intr(struct ata_port *ap)
797 if (ci && ci->desc) { 847 if (ci && ci->desc) {
798 err_mask |= ci->err_mask; 848 err_mask |= ci->err_mask;
799 action |= ci->action; 849 action |= ci->action;
800 ata_ehi_push_desc(ehi, ", %s", ci->desc); 850 ata_ehi_push_desc(ehi, "%s", ci->desc);
801 } else { 851 } else {
802 err_mask |= AC_ERR_OTHER; 852 err_mask |= AC_ERR_OTHER;
803 action |= ATA_EH_SOFTRESET; 853 action |= ATA_EH_SOFTRESET;
804 ata_ehi_push_desc(ehi, ", unknown command error %d", 854 ata_ehi_push_desc(ehi, "unknown command error %d",
805 cerr); 855 cerr);
806 } 856 }
807 857
808 /* record error info */ 858 /* record error info */
809 qc = ata_qc_from_tag(ap, ap->active_tag); 859 qc = ata_qc_from_tag(ap, ap->active_tag);
810 if (qc) { 860 if (qc) {
811 sil24_update_tf(ap); 861 sil24_read_tf(ap, qc->tag, &pp->tf);
812 qc->err_mask |= err_mask; 862 qc->err_mask |= err_mask;
813 } else 863 } else
814 ehi->err_mask |= err_mask; 864 ehi->err_mask |= err_mask;
@@ -825,8 +875,11 @@ static void sil24_error_intr(struct ata_port *ap)
825 875
826static void sil24_finish_qc(struct ata_queued_cmd *qc) 876static void sil24_finish_qc(struct ata_queued_cmd *qc)
827{ 877{
878 struct ata_port *ap = qc->ap;
879 struct sil24_port_priv *pp = ap->private_data;
880
828 if (qc->flags & ATA_QCFLAG_RESULT_TF) 881 if (qc->flags & ATA_QCFLAG_RESULT_TF)
829 sil24_update_tf(qc->ap); 882 sil24_read_tf(ap, qc->tag, &pp->tf);
830} 883}
831 884
832static inline void sil24_host_intr(struct ata_port *ap) 885static inline void sil24_host_intr(struct ata_port *ap)
diff --git a/drivers/ata/sata_sis.c b/drivers/ata/sata_sis.c
index 33716b00c6b7..31a2f55aae66 100644
--- a/drivers/ata/sata_sis.c
+++ b/drivers/ata/sata_sis.c
@@ -64,8 +64,8 @@ enum {
64}; 64};
65 65
66static int sis_init_one (struct pci_dev *pdev, const struct pci_device_id *ent); 66static int sis_init_one (struct pci_dev *pdev, const struct pci_device_id *ent);
67static u32 sis_scr_read (struct ata_port *ap, unsigned int sc_reg); 67static int sis_scr_read (struct ata_port *ap, unsigned int sc_reg, u32 *val);
68static void sis_scr_write (struct ata_port *ap, unsigned int sc_reg, u32 val); 68static int sis_scr_write (struct ata_port *ap, unsigned int sc_reg, u32 val);
69 69
70static const struct pci_device_id sis_pci_tbl[] = { 70static const struct pci_device_id sis_pci_tbl[] = {
71 { PCI_VDEVICE(SI, 0x0180), sis_180 }, /* SiS 964/180 */ 71 { PCI_VDEVICE(SI, 0x0180), sis_180 }, /* SiS 964/180 */
@@ -207,36 +207,37 @@ static void sis_scr_cfg_write (struct ata_port *ap, unsigned int sc_reg, u32 val
207 pci_write_config_dword(pdev, cfg_addr+0x10, val); 207 pci_write_config_dword(pdev, cfg_addr+0x10, val);
208} 208}
209 209
210static u32 sis_scr_read (struct ata_port *ap, unsigned int sc_reg) 210static int sis_scr_read(struct ata_port *ap, unsigned int sc_reg, u32 *val)
211{ 211{
212 struct pci_dev *pdev = to_pci_dev(ap->host->dev); 212 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
213 u32 val, val2 = 0;
214 u8 pmr; 213 u8 pmr;
215 214
216 if (sc_reg > SCR_CONTROL) 215 if (sc_reg > SCR_CONTROL)
217 return 0xffffffffU; 216 return -EINVAL;
218 217
219 if (ap->flags & SIS_FLAG_CFGSCR) 218 if (ap->flags & SIS_FLAG_CFGSCR)
220 return sis_scr_cfg_read(ap, sc_reg); 219 return sis_scr_cfg_read(ap, sc_reg);
221 220
222 pci_read_config_byte(pdev, SIS_PMR, &pmr); 221 pci_read_config_byte(pdev, SIS_PMR, &pmr);
223 222
224 val = ioread32(ap->ioaddr.scr_addr + (sc_reg * 4)); 223 *val = ioread32(ap->ioaddr.scr_addr + (sc_reg * 4));
225 224
226 if ((pdev->device == 0x0182) || (pdev->device == 0x0183) || 225 if ((pdev->device == 0x0182) || (pdev->device == 0x0183) ||
227 (pdev->device == 0x1182) || (pmr & SIS_PMR_COMBINED)) 226 (pdev->device == 0x1182) || (pmr & SIS_PMR_COMBINED))
228 val2 = ioread32(ap->ioaddr.scr_addr + (sc_reg * 4) + 0x10); 227 *val |= ioread32(ap->ioaddr.scr_addr + (sc_reg * 4) + 0x10);
228
229 *val &= 0xfffffffb;
229 230
230 return (val | val2) & 0xfffffffb; 231 return 0;
231} 232}
232 233
233static void sis_scr_write (struct ata_port *ap, unsigned int sc_reg, u32 val) 234static int sis_scr_write(struct ata_port *ap, unsigned int sc_reg, u32 val)
234{ 235{
235 struct pci_dev *pdev = to_pci_dev(ap->host->dev); 236 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
236 u8 pmr; 237 u8 pmr;
237 238
238 if (sc_reg > SCR_CONTROL) 239 if (sc_reg > SCR_CONTROL)
239 return; 240 return -EINVAL;
240 241
241 pci_read_config_byte(pdev, SIS_PMR, &pmr); 242 pci_read_config_byte(pdev, SIS_PMR, &pmr);
242 243
@@ -248,6 +249,7 @@ static void sis_scr_write (struct ata_port *ap, unsigned int sc_reg, u32 val)
248 (pdev->device == 0x1182) || (pmr & SIS_PMR_COMBINED)) 249 (pdev->device == 0x1182) || (pmr & SIS_PMR_COMBINED))
249 iowrite32(val, ap->ioaddr.scr_addr + (sc_reg * 4)+0x10); 250 iowrite32(val, ap->ioaddr.scr_addr + (sc_reg * 4)+0x10);
250 } 251 }
252 return 0;
251} 253}
252 254
253static int sis_init_one (struct pci_dev *pdev, const struct pci_device_id *ent) 255static int sis_init_one (struct pci_dev *pdev, const struct pci_device_id *ent)
diff --git a/drivers/ata/sata_svw.c b/drivers/ata/sata_svw.c
index 63fe99afd59f..92e877075037 100644
--- a/drivers/ata/sata_svw.c
+++ b/drivers/ata/sata_svw.c
@@ -103,20 +103,21 @@ static int k2_sata_check_atapi_dma(struct ata_queued_cmd *qc)
103 return 0; 103 return 0;
104} 104}
105 105
106static u32 k2_sata_scr_read (struct ata_port *ap, unsigned int sc_reg) 106static int k2_sata_scr_read(struct ata_port *ap, unsigned int sc_reg, u32 *val)
107{ 107{
108 if (sc_reg > SCR_CONTROL) 108 if (sc_reg > SCR_CONTROL)
109 return 0xffffffffU; 109 return -EINVAL;
110 return readl(ap->ioaddr.scr_addr + (sc_reg * 4)); 110 *val = readl(ap->ioaddr.scr_addr + (sc_reg * 4));
111 return 0;
111} 112}
112 113
113 114
114static void k2_sata_scr_write (struct ata_port *ap, unsigned int sc_reg, 115static int k2_sata_scr_write(struct ata_port *ap, unsigned int sc_reg, u32 val)
115 u32 val)
116{ 116{
117 if (sc_reg > SCR_CONTROL) 117 if (sc_reg > SCR_CONTROL)
118 return; 118 return -EINVAL;
119 writel(val, ap->ioaddr.scr_addr + (sc_reg * 4)); 119 writel(val, ap->ioaddr.scr_addr + (sc_reg * 4));
120 return 0;
120} 121}
121 122
122 123
diff --git a/drivers/ata/sata_uli.c b/drivers/ata/sata_uli.c
index b52f83ab056a..78c28512f01c 100644
--- a/drivers/ata/sata_uli.c
+++ b/drivers/ata/sata_uli.c
@@ -57,8 +57,8 @@ struct uli_priv {
57}; 57};
58 58
59static int uli_init_one (struct pci_dev *pdev, const struct pci_device_id *ent); 59static int uli_init_one (struct pci_dev *pdev, const struct pci_device_id *ent);
60static u32 uli_scr_read (struct ata_port *ap, unsigned int sc_reg); 60static int uli_scr_read (struct ata_port *ap, unsigned int sc_reg, u32 *val);
61static void uli_scr_write (struct ata_port *ap, unsigned int sc_reg, u32 val); 61static int uli_scr_write (struct ata_port *ap, unsigned int sc_reg, u32 val);
62 62
63static const struct pci_device_id uli_pci_tbl[] = { 63static const struct pci_device_id uli_pci_tbl[] = {
64 { PCI_VDEVICE(AL, 0x5289), uli_5289 }, 64 { PCI_VDEVICE(AL, 0x5289), uli_5289 },
@@ -164,20 +164,22 @@ static void uli_scr_cfg_write (struct ata_port *ap, unsigned int scr, u32 val)
164 pci_write_config_dword(pdev, cfg_addr, val); 164 pci_write_config_dword(pdev, cfg_addr, val);
165} 165}
166 166
167static u32 uli_scr_read (struct ata_port *ap, unsigned int sc_reg) 167static int uli_scr_read (struct ata_port *ap, unsigned int sc_reg, u32 *val)
168{ 168{
169 if (sc_reg > SCR_CONTROL) 169 if (sc_reg > SCR_CONTROL)
170 return 0xffffffffU; 170 return -EINVAL;
171 171
172 return uli_scr_cfg_read(ap, sc_reg); 172 *val = uli_scr_cfg_read(ap, sc_reg);
173 return 0;
173} 174}
174 175
175static void uli_scr_write (struct ata_port *ap, unsigned int sc_reg, u32 val) 176static int uli_scr_write (struct ata_port *ap, unsigned int sc_reg, u32 val)
176{ 177{
177 if (sc_reg > SCR_CONTROL) //SCR_CONTROL=2, SCR_ERROR=1, SCR_STATUS=0 178 if (sc_reg > SCR_CONTROL) //SCR_CONTROL=2, SCR_ERROR=1, SCR_STATUS=0
178 return; 179 return -EINVAL;
179 180
180 uli_scr_cfg_write(ap, sc_reg, val); 181 uli_scr_cfg_write(ap, sc_reg, val);
182 return 0;
181} 183}
182 184
183static int uli_init_one (struct pci_dev *pdev, const struct pci_device_id *ent) 185static int uli_init_one (struct pci_dev *pdev, const struct pci_device_id *ent)
diff --git a/drivers/ata/sata_via.c b/drivers/ata/sata_via.c
index c4124475f754..86b7bfc17324 100644
--- a/drivers/ata/sata_via.c
+++ b/drivers/ata/sata_via.c
@@ -72,8 +72,8 @@ enum {
72}; 72};
73 73
74static int svia_init_one (struct pci_dev *pdev, const struct pci_device_id *ent); 74static int svia_init_one (struct pci_dev *pdev, const struct pci_device_id *ent);
75static u32 svia_scr_read (struct ata_port *ap, unsigned int sc_reg); 75static int svia_scr_read(struct ata_port *ap, unsigned int sc_reg, u32 *val);
76static void svia_scr_write (struct ata_port *ap, unsigned int sc_reg, u32 val); 76static int svia_scr_write(struct ata_port *ap, unsigned int sc_reg, u32 val);
77static void svia_noop_freeze(struct ata_port *ap); 77static void svia_noop_freeze(struct ata_port *ap);
78static void vt6420_error_handler(struct ata_port *ap); 78static void vt6420_error_handler(struct ata_port *ap);
79static int vt6421_pata_cable_detect(struct ata_port *ap); 79static int vt6421_pata_cable_detect(struct ata_port *ap);
@@ -249,18 +249,20 @@ MODULE_LICENSE("GPL");
249MODULE_DEVICE_TABLE(pci, svia_pci_tbl); 249MODULE_DEVICE_TABLE(pci, svia_pci_tbl);
250MODULE_VERSION(DRV_VERSION); 250MODULE_VERSION(DRV_VERSION);
251 251
252static u32 svia_scr_read (struct ata_port *ap, unsigned int sc_reg) 252static int svia_scr_read(struct ata_port *ap, unsigned int sc_reg, u32 *val)
253{ 253{
254 if (sc_reg > SCR_CONTROL) 254 if (sc_reg > SCR_CONTROL)
255 return 0xffffffffU; 255 return -EINVAL;
256 return ioread32(ap->ioaddr.scr_addr + (4 * sc_reg)); 256 *val = ioread32(ap->ioaddr.scr_addr + (4 * sc_reg));
257 return 0;
257} 258}
258 259
259static void svia_scr_write (struct ata_port *ap, unsigned int sc_reg, u32 val) 260static int svia_scr_write(struct ata_port *ap, unsigned int sc_reg, u32 val)
260{ 261{
261 if (sc_reg > SCR_CONTROL) 262 if (sc_reg > SCR_CONTROL)
262 return; 263 return -EINVAL;
263 iowrite32(val, ap->ioaddr.scr_addr + (4 * sc_reg)); 264 iowrite32(val, ap->ioaddr.scr_addr + (4 * sc_reg));
265 return 0;
264} 266}
265 267
266static void svia_noop_freeze(struct ata_port *ap) 268static void svia_noop_freeze(struct ata_port *ap)
@@ -305,18 +307,19 @@ static int vt6420_prereset(struct ata_port *ap, unsigned long deadline)
305 307
306 /* Resume phy. This is the old SATA resume sequence */ 308 /* Resume phy. This is the old SATA resume sequence */
307 svia_scr_write(ap, SCR_CONTROL, 0x300); 309 svia_scr_write(ap, SCR_CONTROL, 0x300);
308 svia_scr_read(ap, SCR_CONTROL); /* flush */ 310 svia_scr_read(ap, SCR_CONTROL, &scontrol); /* flush */
309 311
310 /* wait for phy to become ready, if necessary */ 312 /* wait for phy to become ready, if necessary */
311 do { 313 do {
312 msleep(200); 314 msleep(200);
313 if ((svia_scr_read(ap, SCR_STATUS) & 0xf) != 1) 315 svia_scr_read(ap, SCR_STATUS, &sstatus);
316 if ((sstatus & 0xf) != 1)
314 break; 317 break;
315 } while (time_before(jiffies, timeout)); 318 } while (time_before(jiffies, timeout));
316 319
317 /* open code sata_print_link_status() */ 320 /* open code sata_print_link_status() */
318 sstatus = svia_scr_read(ap, SCR_STATUS); 321 svia_scr_read(ap, SCR_STATUS, &sstatus);
319 scontrol = svia_scr_read(ap, SCR_CONTROL); 322 svia_scr_read(ap, SCR_CONTROL, &scontrol);
320 323
321 online = (sstatus & 0xf) == 0x3; 324 online = (sstatus & 0xf) == 0x3;
322 325
@@ -325,7 +328,7 @@ static int vt6420_prereset(struct ata_port *ap, unsigned long deadline)
325 online ? "up" : "down", sstatus, scontrol); 328 online ? "up" : "down", sstatus, scontrol);
326 329
327 /* SStatus is read one more time */ 330 /* SStatus is read one more time */
328 svia_scr_read(ap, SCR_STATUS); 331 svia_scr_read(ap, SCR_STATUS, &sstatus);
329 332
330 if (!online) { 333 if (!online) {
331 /* tell EH to bail */ 334 /* tell EH to bail */
diff --git a/drivers/ata/sata_vsc.c b/drivers/ata/sata_vsc.c
index 1b5d81faa102..24344d0d0575 100644
--- a/drivers/ata/sata_vsc.c
+++ b/drivers/ata/sata_vsc.c
@@ -98,20 +98,21 @@ enum {
98 VSC_SATA_INT_PHY_CHANGE), 98 VSC_SATA_INT_PHY_CHANGE),
99}; 99};
100 100
101static u32 vsc_sata_scr_read (struct ata_port *ap, unsigned int sc_reg) 101static int vsc_sata_scr_read(struct ata_port *ap, unsigned int sc_reg, u32 *val)
102{ 102{
103 if (sc_reg > SCR_CONTROL) 103 if (sc_reg > SCR_CONTROL)
104 return 0xffffffffU; 104 return -EINVAL;
105 return readl(ap->ioaddr.scr_addr + (sc_reg * 4)); 105 *val = readl(ap->ioaddr.scr_addr + (sc_reg * 4));
106 return 0;
106} 107}
107 108
108 109
109static void vsc_sata_scr_write (struct ata_port *ap, unsigned int sc_reg, 110static int vsc_sata_scr_write(struct ata_port *ap, unsigned int sc_reg, u32 val)
110 u32 val)
111{ 111{
112 if (sc_reg > SCR_CONTROL) 112 if (sc_reg > SCR_CONTROL)
113 return; 113 return -EINVAL;
114 writel(val, ap->ioaddr.scr_addr + (sc_reg * 4)); 114 writel(val, ap->ioaddr.scr_addr + (sc_reg * 4));
115 return 0;
115} 116}
116 117
117 118
generated by cgit v1.2.2 (git 2.25.0) at 2024-10-06 01:20:18 -0400