diff options
author | Scott Wood <scottwood@freescale.com> | 2007-07-24 16:53:07 -0400 |
---|---|---|
committer | Kumar Gala <galak@kernel.crashing.org> | 2007-10-03 21:36:35 -0400 |
commit | c1dcfd9d199043ff0e8805484a736ad36d9dd04a (patch) | |
tree | 87e04b315a1c277083dea7ae3443bcb56e94b9d2 /drivers | |
parent | 7ae870368d198affa249ed3382a8a288167ce885 (diff) |
[POWERPC] cpm_uart: sparse fixes
Mostly a bunch of direct access to in/out conversions, plus a few
cast removals, __iomem annotations, and miscellaneous cleanup.
Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/serial/cpm_uart/cpm_uart.h | 42 | ||||
-rw-r--r-- | drivers/serial/cpm_uart/cpm_uart_core.c | 299 | ||||
-rw-r--r-- | drivers/serial/cpm_uart/cpm_uart_cpm1.c | 2 | ||||
-rw-r--r-- | drivers/serial/cpm_uart/cpm_uart_cpm1.h | 14 | ||||
-rw-r--r-- | drivers/serial/cpm_uart/cpm_uart_cpm2.c | 4 | ||||
-rw-r--r-- | drivers/serial/cpm_uart/cpm_uart_cpm2.h | 14 |
6 files changed, 192 insertions, 183 deletions
diff --git a/drivers/serial/cpm_uart/cpm_uart.h b/drivers/serial/cpm_uart/cpm_uart.h index 4e1987adc23b..32b9737759c4 100644 --- a/drivers/serial/cpm_uart/cpm_uart.h +++ b/drivers/serial/cpm_uart/cpm_uart.h | |||
@@ -56,21 +56,21 @@ struct uart_cpm_port { | |||
56 | u16 rx_fifosize; | 56 | u16 rx_fifosize; |
57 | u16 tx_nrfifos; | 57 | u16 tx_nrfifos; |
58 | u16 tx_fifosize; | 58 | u16 tx_fifosize; |
59 | smc_t *smcp; | 59 | smc_t __iomem *smcp; |
60 | smc_uart_t *smcup; | 60 | smc_uart_t __iomem *smcup; |
61 | scc_t *sccp; | 61 | scc_t __iomem *sccp; |
62 | scc_uart_t *sccup; | 62 | scc_uart_t __iomem *sccup; |
63 | volatile cbd_t *rx_bd_base; | 63 | cbd_t __iomem *rx_bd_base; |
64 | volatile cbd_t *rx_cur; | 64 | cbd_t __iomem *rx_cur; |
65 | volatile cbd_t *tx_bd_base; | 65 | cbd_t __iomem *tx_bd_base; |
66 | volatile cbd_t *tx_cur; | 66 | cbd_t __iomem *tx_cur; |
67 | unsigned char *tx_buf; | 67 | unsigned char *tx_buf; |
68 | unsigned char *rx_buf; | 68 | unsigned char *rx_buf; |
69 | u32 flags; | 69 | u32 flags; |
70 | void (*set_lineif)(struct uart_cpm_port *); | 70 | void (*set_lineif)(struct uart_cpm_port *); |
71 | u8 brg; | 71 | u8 brg; |
72 | uint dp_addr; | 72 | uint dp_addr; |
73 | void *mem_addr; | 73 | void *mem_addr; |
74 | dma_addr_t dma_addr; | 74 | dma_addr_t dma_addr; |
75 | u32 mem_size; | 75 | u32 mem_size; |
76 | /* helpers */ | 76 | /* helpers */ |
@@ -106,34 +106,36 @@ void scc4_lineif(struct uart_cpm_port *pinfo); | |||
106 | /* | 106 | /* |
107 | virtual to phys transtalion | 107 | virtual to phys transtalion |
108 | */ | 108 | */ |
109 | static inline unsigned long cpu2cpm_addr(void* addr, struct uart_cpm_port *pinfo) | 109 | static inline unsigned long cpu2cpm_addr(void *addr, |
110 | struct uart_cpm_port *pinfo) | ||
110 | { | 111 | { |
111 | int offset; | 112 | int offset; |
112 | u32 val = (u32)addr; | 113 | u32 val = (u32)addr; |
114 | u32 mem = (u32)pinfo->mem_addr; | ||
113 | /* sane check */ | 115 | /* sane check */ |
114 | if (likely((val >= (u32)pinfo->mem_addr)) && | 116 | if (likely(val >= mem && val < mem + pinfo->mem_size)) { |
115 | (val<((u32)pinfo->mem_addr + pinfo->mem_size))) { | 117 | offset = val - mem; |
116 | offset = val - (u32)pinfo->mem_addr; | 118 | return pinfo->dma_addr + offset; |
117 | return pinfo->dma_addr+offset; | ||
118 | } | 119 | } |
119 | /* something nasty happened */ | 120 | /* something nasty happened */ |
120 | BUG(); | 121 | BUG(); |
121 | return 0; | 122 | return 0; |
122 | } | 123 | } |
123 | 124 | ||
124 | static inline void *cpm2cpu_addr(unsigned long addr, struct uart_cpm_port *pinfo) | 125 | static inline void *cpm2cpu_addr(unsigned long addr, |
126 | struct uart_cpm_port *pinfo) | ||
125 | { | 127 | { |
126 | int offset; | 128 | int offset; |
127 | u32 val = addr; | 129 | u32 val = addr; |
130 | u32 dma = (u32)pinfo->dma_addr; | ||
128 | /* sane check */ | 131 | /* sane check */ |
129 | if (likely((val >= pinfo->dma_addr) && | 132 | if (likely(val >= dma && val < dma + pinfo->mem_size)) { |
130 | (val<(pinfo->dma_addr + pinfo->mem_size)))) { | 133 | offset = val - dma; |
131 | offset = val - (u32)pinfo->dma_addr; | 134 | return pinfo->mem_addr + offset; |
132 | return (void*)(pinfo->mem_addr+offset); | ||
133 | } | 135 | } |
134 | /* something nasty happened */ | 136 | /* something nasty happened */ |
135 | BUG(); | 137 | BUG(); |
136 | return 0; | 138 | return NULL; |
137 | } | 139 | } |
138 | 140 | ||
139 | 141 | ||
diff --git a/drivers/serial/cpm_uart/cpm_uart_core.c b/drivers/serial/cpm_uart/cpm_uart_core.c index 8564ba2f3ec2..afaf195b6e04 100644 --- a/drivers/serial/cpm_uart/cpm_uart_core.c +++ b/drivers/serial/cpm_uart/cpm_uart_core.c | |||
@@ -131,14 +131,14 @@ static int cpm_uart_id2nr(int id) | |||
131 | static unsigned int cpm_uart_tx_empty(struct uart_port *port) | 131 | static unsigned int cpm_uart_tx_empty(struct uart_port *port) |
132 | { | 132 | { |
133 | struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port; | 133 | struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port; |
134 | volatile cbd_t *bdp = pinfo->tx_bd_base; | 134 | cbd_t __iomem *bdp = pinfo->tx_bd_base; |
135 | int ret = 0; | 135 | int ret = 0; |
136 | 136 | ||
137 | while (1) { | 137 | while (1) { |
138 | if (bdp->cbd_sc & BD_SC_READY) | 138 | if (in_be16(&bdp->cbd_sc) & BD_SC_READY) |
139 | break; | 139 | break; |
140 | 140 | ||
141 | if (bdp->cbd_sc & BD_SC_WRAP) { | 141 | if (in_be16(&bdp->cbd_sc) & BD_SC_WRAP) { |
142 | ret = TIOCSER_TEMT; | 142 | ret = TIOCSER_TEMT; |
143 | break; | 143 | break; |
144 | } | 144 | } |
@@ -167,15 +167,15 @@ static unsigned int cpm_uart_get_mctrl(struct uart_port *port) | |||
167 | static void cpm_uart_stop_tx(struct uart_port *port) | 167 | static void cpm_uart_stop_tx(struct uart_port *port) |
168 | { | 168 | { |
169 | struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port; | 169 | struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port; |
170 | volatile smc_t *smcp = pinfo->smcp; | 170 | smc_t __iomem *smcp = pinfo->smcp; |
171 | volatile scc_t *sccp = pinfo->sccp; | 171 | scc_t __iomem *sccp = pinfo->sccp; |
172 | 172 | ||
173 | pr_debug("CPM uart[%d]:stop tx\n", port->line); | 173 | pr_debug("CPM uart[%d]:stop tx\n", port->line); |
174 | 174 | ||
175 | if (IS_SMC(pinfo)) | 175 | if (IS_SMC(pinfo)) |
176 | smcp->smc_smcm &= ~SMCM_TX; | 176 | clrbits8(&smcp->smc_smcm, SMCM_TX); |
177 | else | 177 | else |
178 | sccp->scc_sccm &= ~UART_SCCM_TX; | 178 | clrbits16(&sccp->scc_sccm, UART_SCCM_TX); |
179 | } | 179 | } |
180 | 180 | ||
181 | /* | 181 | /* |
@@ -184,24 +184,24 @@ static void cpm_uart_stop_tx(struct uart_port *port) | |||
184 | static void cpm_uart_start_tx(struct uart_port *port) | 184 | static void cpm_uart_start_tx(struct uart_port *port) |
185 | { | 185 | { |
186 | struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port; | 186 | struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port; |
187 | volatile smc_t *smcp = pinfo->smcp; | 187 | smc_t __iomem *smcp = pinfo->smcp; |
188 | volatile scc_t *sccp = pinfo->sccp; | 188 | scc_t __iomem *sccp = pinfo->sccp; |
189 | 189 | ||
190 | pr_debug("CPM uart[%d]:start tx\n", port->line); | 190 | pr_debug("CPM uart[%d]:start tx\n", port->line); |
191 | 191 | ||
192 | if (IS_SMC(pinfo)) { | 192 | if (IS_SMC(pinfo)) { |
193 | if (smcp->smc_smcm & SMCM_TX) | 193 | if (in_8(&smcp->smc_smcm) & SMCM_TX) |
194 | return; | 194 | return; |
195 | } else { | 195 | } else { |
196 | if (sccp->scc_sccm & UART_SCCM_TX) | 196 | if (in_be16(&sccp->scc_sccm) & UART_SCCM_TX) |
197 | return; | 197 | return; |
198 | } | 198 | } |
199 | 199 | ||
200 | if (cpm_uart_tx_pump(port) != 0) { | 200 | if (cpm_uart_tx_pump(port) != 0) { |
201 | if (IS_SMC(pinfo)) { | 201 | if (IS_SMC(pinfo)) { |
202 | smcp->smc_smcm |= SMCM_TX; | 202 | setbits8(&smcp->smc_smcm, SMCM_TX); |
203 | } else { | 203 | } else { |
204 | sccp->scc_sccm |= UART_SCCM_TX; | 204 | setbits16(&sccp->scc_sccm, UART_SCCM_TX); |
205 | } | 205 | } |
206 | } | 206 | } |
207 | } | 207 | } |
@@ -212,15 +212,15 @@ static void cpm_uart_start_tx(struct uart_port *port) | |||
212 | static void cpm_uart_stop_rx(struct uart_port *port) | 212 | static void cpm_uart_stop_rx(struct uart_port *port) |
213 | { | 213 | { |
214 | struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port; | 214 | struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port; |
215 | volatile smc_t *smcp = pinfo->smcp; | 215 | smc_t __iomem *smcp = pinfo->smcp; |
216 | volatile scc_t *sccp = pinfo->sccp; | 216 | scc_t __iomem *sccp = pinfo->sccp; |
217 | 217 | ||
218 | pr_debug("CPM uart[%d]:stop rx\n", port->line); | 218 | pr_debug("CPM uart[%d]:stop rx\n", port->line); |
219 | 219 | ||
220 | if (IS_SMC(pinfo)) | 220 | if (IS_SMC(pinfo)) |
221 | smcp->smc_smcm &= ~SMCM_RX; | 221 | clrbits8(&smcp->smc_smcm, SMCM_RX); |
222 | else | 222 | else |
223 | sccp->scc_sccm &= ~UART_SCCM_RX; | 223 | clrbits16(&sccp->scc_sccm, UART_SCCM_RX); |
224 | } | 224 | } |
225 | 225 | ||
226 | /* | 226 | /* |
@@ -263,10 +263,11 @@ static void cpm_uart_int_tx(struct uart_port *port) | |||
263 | static void cpm_uart_int_rx(struct uart_port *port) | 263 | static void cpm_uart_int_rx(struct uart_port *port) |
264 | { | 264 | { |
265 | int i; | 265 | int i; |
266 | unsigned char ch, *cp; | 266 | unsigned char ch; |
267 | u8 *cp; | ||
267 | struct tty_struct *tty = port->info->tty; | 268 | struct tty_struct *tty = port->info->tty; |
268 | struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port; | 269 | struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port; |
269 | volatile cbd_t *bdp; | 270 | cbd_t __iomem *bdp; |
270 | u16 status; | 271 | u16 status; |
271 | unsigned int flg; | 272 | unsigned int flg; |
272 | 273 | ||
@@ -278,13 +279,13 @@ static void cpm_uart_int_rx(struct uart_port *port) | |||
278 | bdp = pinfo->rx_cur; | 279 | bdp = pinfo->rx_cur; |
279 | for (;;) { | 280 | for (;;) { |
280 | /* get status */ | 281 | /* get status */ |
281 | status = bdp->cbd_sc; | 282 | status = in_be16(&bdp->cbd_sc); |
282 | /* If this one is empty, return happy */ | 283 | /* If this one is empty, return happy */ |
283 | if (status & BD_SC_EMPTY) | 284 | if (status & BD_SC_EMPTY) |
284 | break; | 285 | break; |
285 | 286 | ||
286 | /* get number of characters, and check spce in flip-buffer */ | 287 | /* get number of characters, and check spce in flip-buffer */ |
287 | i = bdp->cbd_datlen; | 288 | i = in_be16(&bdp->cbd_datlen); |
288 | 289 | ||
289 | /* If we have not enough room in tty flip buffer, then we try | 290 | /* If we have not enough room in tty flip buffer, then we try |
290 | * later, which will be the next rx-interrupt or a timeout | 291 | * later, which will be the next rx-interrupt or a timeout |
@@ -295,7 +296,7 @@ static void cpm_uart_int_rx(struct uart_port *port) | |||
295 | } | 296 | } |
296 | 297 | ||
297 | /* get pointer */ | 298 | /* get pointer */ |
298 | cp = cpm2cpu_addr(bdp->cbd_bufaddr, pinfo); | 299 | cp = cpm2cpu_addr(in_be32(&bdp->cbd_bufaddr), pinfo); |
299 | 300 | ||
300 | /* loop through the buffer */ | 301 | /* loop through the buffer */ |
301 | while (i-- > 0) { | 302 | while (i-- > 0) { |
@@ -315,10 +316,11 @@ static void cpm_uart_int_rx(struct uart_port *port) | |||
315 | } /* End while (i--) */ | 316 | } /* End while (i--) */ |
316 | 317 | ||
317 | /* This BD is ready to be used again. Clear status. get next */ | 318 | /* This BD is ready to be used again. Clear status. get next */ |
318 | bdp->cbd_sc &= ~(BD_SC_BR | BD_SC_FR | BD_SC_PR | BD_SC_OV | BD_SC_ID); | 319 | clrbits16(&bdp->cbd_sc, BD_SC_BR | BD_SC_FR | BD_SC_PR | |
319 | bdp->cbd_sc |= BD_SC_EMPTY; | 320 | BD_SC_OV | BD_SC_ID); |
321 | setbits16(&bdp->cbd_sc, BD_SC_EMPTY); | ||
320 | 322 | ||
321 | if (bdp->cbd_sc & BD_SC_WRAP) | 323 | if (in_be16(&bdp->cbd_sc) & BD_SC_WRAP) |
322 | bdp = pinfo->rx_bd_base; | 324 | bdp = pinfo->rx_bd_base; |
323 | else | 325 | else |
324 | bdp++; | 326 | bdp++; |
@@ -326,7 +328,7 @@ static void cpm_uart_int_rx(struct uart_port *port) | |||
326 | } /* End for (;;) */ | 328 | } /* End for (;;) */ |
327 | 329 | ||
328 | /* Write back buffer pointer */ | 330 | /* Write back buffer pointer */ |
329 | pinfo->rx_cur = (volatile cbd_t *) bdp; | 331 | pinfo->rx_cur = bdp; |
330 | 332 | ||
331 | /* activate BH processing */ | 333 | /* activate BH processing */ |
332 | tty_flip_buffer_push(tty); | 334 | tty_flip_buffer_push(tty); |
@@ -380,14 +382,14 @@ static irqreturn_t cpm_uart_int(int irq, void *data) | |||
380 | u8 events; | 382 | u8 events; |
381 | struct uart_port *port = (struct uart_port *)data; | 383 | struct uart_port *port = (struct uart_port *)data; |
382 | struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port; | 384 | struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port; |
383 | volatile smc_t *smcp = pinfo->smcp; | 385 | smc_t __iomem *smcp = pinfo->smcp; |
384 | volatile scc_t *sccp = pinfo->sccp; | 386 | scc_t __iomem *sccp = pinfo->sccp; |
385 | 387 | ||
386 | pr_debug("CPM uart[%d]:IRQ\n", port->line); | 388 | pr_debug("CPM uart[%d]:IRQ\n", port->line); |
387 | 389 | ||
388 | if (IS_SMC(pinfo)) { | 390 | if (IS_SMC(pinfo)) { |
389 | events = smcp->smc_smce; | 391 | events = in_8(&smcp->smc_smce); |
390 | smcp->smc_smce = events; | 392 | out_8(&smcp->smc_smce, events); |
391 | if (events & SMCM_BRKE) | 393 | if (events & SMCM_BRKE) |
392 | uart_handle_break(port); | 394 | uart_handle_break(port); |
393 | if (events & SMCM_RX) | 395 | if (events & SMCM_RX) |
@@ -395,8 +397,8 @@ static irqreturn_t cpm_uart_int(int irq, void *data) | |||
395 | if (events & SMCM_TX) | 397 | if (events & SMCM_TX) |
396 | cpm_uart_int_tx(port); | 398 | cpm_uart_int_tx(port); |
397 | } else { | 399 | } else { |
398 | events = sccp->scc_scce; | 400 | events = in_be16(&sccp->scc_scce); |
399 | sccp->scc_scce = events; | 401 | out_be16(&sccp->scc_scce, events); |
400 | if (events & UART_SCCM_BRKE) | 402 | if (events & UART_SCCM_BRKE) |
401 | uart_handle_break(port); | 403 | uart_handle_break(port); |
402 | if (events & UART_SCCM_RX) | 404 | if (events & UART_SCCM_RX) |
@@ -421,11 +423,11 @@ static int cpm_uart_startup(struct uart_port *port) | |||
421 | 423 | ||
422 | /* Startup rx-int */ | 424 | /* Startup rx-int */ |
423 | if (IS_SMC(pinfo)) { | 425 | if (IS_SMC(pinfo)) { |
424 | pinfo->smcp->smc_smcm |= SMCM_RX; | 426 | setbits8(&pinfo->smcp->smc_smcm, SMCM_RX); |
425 | pinfo->smcp->smc_smcmr |= (SMCMR_REN | SMCMR_TEN); | 427 | setbits16(&pinfo->smcp->smc_smcmr, (SMCMR_REN | SMCMR_TEN)); |
426 | } else { | 428 | } else { |
427 | pinfo->sccp->scc_sccm |= UART_SCCM_RX; | 429 | setbits16(&pinfo->sccp->scc_sccm, UART_SCCM_RX); |
428 | pinfo->sccp->scc_gsmrl |= (SCC_GSMRL_ENR | SCC_GSMRL_ENT); | 430 | setbits32(&pinfo->sccp->scc_gsmrl, (SCC_GSMRL_ENR | SCC_GSMRL_ENT)); |
429 | } | 431 | } |
430 | 432 | ||
431 | if (!(pinfo->flags & FLAG_CONSOLE)) | 433 | if (!(pinfo->flags & FLAG_CONSOLE)) |
@@ -464,13 +466,13 @@ static void cpm_uart_shutdown(struct uart_port *port) | |||
464 | 466 | ||
465 | /* Stop uarts */ | 467 | /* Stop uarts */ |
466 | if (IS_SMC(pinfo)) { | 468 | if (IS_SMC(pinfo)) { |
467 | volatile smc_t *smcp = pinfo->smcp; | 469 | smc_t __iomem *smcp = pinfo->smcp; |
468 | smcp->smc_smcmr &= ~(SMCMR_REN | SMCMR_TEN); | 470 | clrbits16(&smcp->smc_smcmr, SMCMR_REN | SMCMR_TEN); |
469 | smcp->smc_smcm &= ~(SMCM_RX | SMCM_TX); | 471 | clrbits8(&smcp->smc_smcm, SMCM_RX | SMCM_TX); |
470 | } else { | 472 | } else { |
471 | volatile scc_t *sccp = pinfo->sccp; | 473 | scc_t __iomem *sccp = pinfo->sccp; |
472 | sccp->scc_gsmrl &= ~(SCC_GSMRL_ENR | SCC_GSMRL_ENT); | 474 | clrbits32(&sccp->scc_gsmrl, SCC_GSMRL_ENR | SCC_GSMRL_ENT); |
473 | sccp->scc_sccm &= ~(UART_SCCM_TX | UART_SCCM_RX); | 475 | clrbits16(&sccp->scc_sccm, UART_SCCM_TX | UART_SCCM_RX); |
474 | } | 476 | } |
475 | 477 | ||
476 | /* Shut them really down and reinit buffer descriptors */ | 478 | /* Shut them really down and reinit buffer descriptors */ |
@@ -492,8 +494,8 @@ static void cpm_uart_set_termios(struct uart_port *port, | |||
492 | u16 cval, scval, prev_mode; | 494 | u16 cval, scval, prev_mode; |
493 | int bits, sbits; | 495 | int bits, sbits; |
494 | struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port; | 496 | struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port; |
495 | volatile smc_t *smcp = pinfo->smcp; | 497 | smc_t __iomem *smcp = pinfo->smcp; |
496 | volatile scc_t *sccp = pinfo->sccp; | 498 | scc_t __iomem *sccp = pinfo->sccp; |
497 | 499 | ||
498 | pr_debug("CPM uart[%d]:set_termios\n", port->line); | 500 | pr_debug("CPM uart[%d]:set_termios\n", port->line); |
499 | 501 | ||
@@ -588,11 +590,11 @@ static void cpm_uart_set_termios(struct uart_port *port, | |||
588 | * enables, because we want to put them back if they were | 590 | * enables, because we want to put them back if they were |
589 | * present. | 591 | * present. |
590 | */ | 592 | */ |
591 | prev_mode = smcp->smc_smcmr; | 593 | prev_mode = in_be16(&smcp->smc_smcmr); |
592 | smcp->smc_smcmr = smcr_mk_clen(bits) | cval | SMCMR_SM_UART; | 594 | out_be16(&smcp->smc_smcmr, smcr_mk_clen(bits) | cval | SMCMR_SM_UART); |
593 | smcp->smc_smcmr |= (prev_mode & (SMCMR_REN | SMCMR_TEN)); | 595 | setbits16(&smcp->smc_smcmr, (prev_mode & (SMCMR_REN | SMCMR_TEN))); |
594 | } else { | 596 | } else { |
595 | sccp->scc_psmr = (sbits << 12) | scval; | 597 | out_be16(&sccp->scc_psmr, (sbits << 12) | scval); |
596 | } | 598 | } |
597 | 599 | ||
598 | cpm_set_brg(pinfo->brg - 1, baud); | 600 | cpm_set_brg(pinfo->brg - 1, baud); |
@@ -630,8 +632,8 @@ static int cpm_uart_verify_port(struct uart_port *port, | |||
630 | */ | 632 | */ |
631 | static int cpm_uart_tx_pump(struct uart_port *port) | 633 | static int cpm_uart_tx_pump(struct uart_port *port) |
632 | { | 634 | { |
633 | volatile cbd_t *bdp; | 635 | cbd_t __iomem *bdp; |
634 | unsigned char *p; | 636 | u8 *p; |
635 | int count; | 637 | int count; |
636 | struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port; | 638 | struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port; |
637 | struct circ_buf *xmit = &port->info->xmit; | 639 | struct circ_buf *xmit = &port->info->xmit; |
@@ -641,13 +643,14 @@ static int cpm_uart_tx_pump(struct uart_port *port) | |||
641 | /* Pick next descriptor and fill from buffer */ | 643 | /* Pick next descriptor and fill from buffer */ |
642 | bdp = pinfo->tx_cur; | 644 | bdp = pinfo->tx_cur; |
643 | 645 | ||
644 | p = cpm2cpu_addr(bdp->cbd_bufaddr, pinfo); | 646 | p = cpm2cpu_addr(in_be32(&bdp->cbd_bufaddr), pinfo); |
645 | 647 | ||
646 | *p++ = port->x_char; | 648 | *p++ = port->x_char; |
647 | bdp->cbd_datlen = 1; | 649 | |
648 | bdp->cbd_sc |= BD_SC_READY; | 650 | out_be16(&bdp->cbd_datlen, 1); |
651 | setbits16(&bdp->cbd_sc, BD_SC_READY); | ||
649 | /* Get next BD. */ | 652 | /* Get next BD. */ |
650 | if (bdp->cbd_sc & BD_SC_WRAP) | 653 | if (in_be16(&bdp->cbd_sc) & BD_SC_WRAP) |
651 | bdp = pinfo->tx_bd_base; | 654 | bdp = pinfo->tx_bd_base; |
652 | else | 655 | else |
653 | bdp++; | 656 | bdp++; |
@@ -666,9 +669,10 @@ static int cpm_uart_tx_pump(struct uart_port *port) | |||
666 | /* Pick next descriptor and fill from buffer */ | 669 | /* Pick next descriptor and fill from buffer */ |
667 | bdp = pinfo->tx_cur; | 670 | bdp = pinfo->tx_cur; |
668 | 671 | ||
669 | while (!(bdp->cbd_sc & BD_SC_READY) && (xmit->tail != xmit->head)) { | 672 | while (!(in_be16(&bdp->cbd_sc) & BD_SC_READY) && |
673 | xmit->tail != xmit->head) { | ||
670 | count = 0; | 674 | count = 0; |
671 | p = cpm2cpu_addr(bdp->cbd_bufaddr, pinfo); | 675 | p = cpm2cpu_addr(in_be32(&bdp->cbd_bufaddr), pinfo); |
672 | while (count < pinfo->tx_fifosize) { | 676 | while (count < pinfo->tx_fifosize) { |
673 | *p++ = xmit->buf[xmit->tail]; | 677 | *p++ = xmit->buf[xmit->tail]; |
674 | xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); | 678 | xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); |
@@ -677,11 +681,10 @@ static int cpm_uart_tx_pump(struct uart_port *port) | |||
677 | if (xmit->head == xmit->tail) | 681 | if (xmit->head == xmit->tail) |
678 | break; | 682 | break; |
679 | } | 683 | } |
680 | bdp->cbd_datlen = count; | 684 | out_be16(&bdp->cbd_datlen, count); |
681 | bdp->cbd_sc |= BD_SC_READY; | 685 | setbits16(&bdp->cbd_sc, BD_SC_READY); |
682 | eieio(); | ||
683 | /* Get next BD. */ | 686 | /* Get next BD. */ |
684 | if (bdp->cbd_sc & BD_SC_WRAP) | 687 | if (in_be16(&bdp->cbd_sc) & BD_SC_WRAP) |
685 | bdp = pinfo->tx_bd_base; | 688 | bdp = pinfo->tx_bd_base; |
686 | else | 689 | else |
687 | bdp++; | 690 | bdp++; |
@@ -706,7 +709,7 @@ static void cpm_uart_initbd(struct uart_cpm_port *pinfo) | |||
706 | { | 709 | { |
707 | int i; | 710 | int i; |
708 | u8 *mem_addr; | 711 | u8 *mem_addr; |
709 | volatile cbd_t *bdp; | 712 | cbd_t __iomem *bdp; |
710 | 713 | ||
711 | pr_debug("CPM uart[%d]:initbd\n", pinfo->port.line); | 714 | pr_debug("CPM uart[%d]:initbd\n", pinfo->port.line); |
712 | 715 | ||
@@ -717,13 +720,13 @@ static void cpm_uart_initbd(struct uart_cpm_port *pinfo) | |||
717 | mem_addr = pinfo->mem_addr; | 720 | mem_addr = pinfo->mem_addr; |
718 | bdp = pinfo->rx_cur = pinfo->rx_bd_base; | 721 | bdp = pinfo->rx_cur = pinfo->rx_bd_base; |
719 | for (i = 0; i < (pinfo->rx_nrfifos - 1); i++, bdp++) { | 722 | for (i = 0; i < (pinfo->rx_nrfifos - 1); i++, bdp++) { |
720 | bdp->cbd_bufaddr = cpu2cpm_addr(mem_addr, pinfo); | 723 | out_be32(&bdp->cbd_bufaddr, cpu2cpm_addr(mem_addr, pinfo)); |
721 | bdp->cbd_sc = BD_SC_EMPTY | BD_SC_INTRPT; | 724 | out_be16(&bdp->cbd_sc, BD_SC_EMPTY | BD_SC_INTRPT); |
722 | mem_addr += pinfo->rx_fifosize; | 725 | mem_addr += pinfo->rx_fifosize; |
723 | } | 726 | } |
724 | 727 | ||
725 | bdp->cbd_bufaddr = cpu2cpm_addr(mem_addr, pinfo); | 728 | out_be32(&bdp->cbd_bufaddr, cpu2cpm_addr(mem_addr, pinfo)); |
726 | bdp->cbd_sc = BD_SC_WRAP | BD_SC_EMPTY | BD_SC_INTRPT; | 729 | out_be16(&bdp->cbd_sc, BD_SC_WRAP | BD_SC_EMPTY | BD_SC_INTRPT); |
727 | 730 | ||
728 | /* Set the physical address of the host memory | 731 | /* Set the physical address of the host memory |
729 | * buffers in the buffer descriptors, and the | 732 | * buffers in the buffer descriptors, and the |
@@ -732,19 +735,19 @@ static void cpm_uart_initbd(struct uart_cpm_port *pinfo) | |||
732 | mem_addr = pinfo->mem_addr + L1_CACHE_ALIGN(pinfo->rx_nrfifos * pinfo->rx_fifosize); | 735 | mem_addr = pinfo->mem_addr + L1_CACHE_ALIGN(pinfo->rx_nrfifos * pinfo->rx_fifosize); |
733 | bdp = pinfo->tx_cur = pinfo->tx_bd_base; | 736 | bdp = pinfo->tx_cur = pinfo->tx_bd_base; |
734 | for (i = 0; i < (pinfo->tx_nrfifos - 1); i++, bdp++) { | 737 | for (i = 0; i < (pinfo->tx_nrfifos - 1); i++, bdp++) { |
735 | bdp->cbd_bufaddr = cpu2cpm_addr(mem_addr, pinfo); | 738 | out_be32(&bdp->cbd_bufaddr, cpu2cpm_addr(mem_addr, pinfo)); |
736 | bdp->cbd_sc = BD_SC_INTRPT; | 739 | out_be16(&bdp->cbd_sc, BD_SC_INTRPT); |
737 | mem_addr += pinfo->tx_fifosize; | 740 | mem_addr += pinfo->tx_fifosize; |
738 | } | 741 | } |
739 | 742 | ||
740 | bdp->cbd_bufaddr = cpu2cpm_addr(mem_addr, pinfo); | 743 | out_be32(&bdp->cbd_bufaddr, cpu2cpm_addr(mem_addr, pinfo)); |
741 | bdp->cbd_sc = BD_SC_WRAP | BD_SC_INTRPT; | 744 | out_be16(&bdp->cbd_sc, BD_SC_WRAP | BD_SC_INTRPT); |
742 | } | 745 | } |
743 | 746 | ||
744 | static void cpm_uart_init_scc(struct uart_cpm_port *pinfo) | 747 | static void cpm_uart_init_scc(struct uart_cpm_port *pinfo) |
745 | { | 748 | { |
746 | volatile scc_t *scp; | 749 | scc_t __iomem *scp; |
747 | volatile scc_uart_t *sup; | 750 | scc_uart_t __iomem *sup; |
748 | 751 | ||
749 | pr_debug("CPM uart[%d]:init_scc\n", pinfo->port.line); | 752 | pr_debug("CPM uart[%d]:init_scc\n", pinfo->port.line); |
750 | 753 | ||
@@ -752,8 +755,10 @@ static void cpm_uart_init_scc(struct uart_cpm_port *pinfo) | |||
752 | sup = pinfo->sccup; | 755 | sup = pinfo->sccup; |
753 | 756 | ||
754 | /* Store address */ | 757 | /* Store address */ |
755 | pinfo->sccup->scc_genscc.scc_rbase = (unsigned char *)pinfo->rx_bd_base - DPRAM_BASE; | 758 | out_be16(&pinfo->sccup->scc_genscc.scc_rbase, |
756 | pinfo->sccup->scc_genscc.scc_tbase = (unsigned char *)pinfo->tx_bd_base - DPRAM_BASE; | 759 | (u8 __iomem *)pinfo->rx_bd_base - DPRAM_BASE); |
760 | out_be16(&pinfo->sccup->scc_genscc.scc_tbase, | ||
761 | (u8 __iomem *)pinfo->tx_bd_base - DPRAM_BASE); | ||
757 | 762 | ||
758 | /* Set up the uart parameters in the | 763 | /* Set up the uart parameters in the |
759 | * parameter ram. | 764 | * parameter ram. |
@@ -761,25 +766,25 @@ static void cpm_uart_init_scc(struct uart_cpm_port *pinfo) | |||
761 | 766 | ||
762 | cpm_set_scc_fcr(sup); | 767 | cpm_set_scc_fcr(sup); |
763 | 768 | ||
764 | sup->scc_genscc.scc_mrblr = pinfo->rx_fifosize; | 769 | out_be16(&sup->scc_genscc.scc_mrblr, pinfo->rx_fifosize); |
765 | sup->scc_maxidl = pinfo->rx_fifosize; | 770 | out_be16(&sup->scc_maxidl, pinfo->rx_fifosize); |
766 | sup->scc_brkcr = 1; | 771 | out_be16(&sup->scc_brkcr, 1); |
767 | sup->scc_parec = 0; | 772 | out_be16(&sup->scc_parec, 0); |
768 | sup->scc_frmec = 0; | 773 | out_be16(&sup->scc_frmec, 0); |
769 | sup->scc_nosec = 0; | 774 | out_be16(&sup->scc_nosec, 0); |
770 | sup->scc_brkec = 0; | 775 | out_be16(&sup->scc_brkec, 0); |
771 | sup->scc_uaddr1 = 0; | 776 | out_be16(&sup->scc_uaddr1, 0); |
772 | sup->scc_uaddr2 = 0; | 777 | out_be16(&sup->scc_uaddr2, 0); |
773 | sup->scc_toseq = 0; | 778 | out_be16(&sup->scc_toseq, 0); |
774 | sup->scc_char1 = 0x8000; | 779 | out_be16(&sup->scc_char1, 0x8000); |
775 | sup->scc_char2 = 0x8000; | 780 | out_be16(&sup->scc_char2, 0x8000); |
776 | sup->scc_char3 = 0x8000; | 781 | out_be16(&sup->scc_char3, 0x8000); |
777 | sup->scc_char4 = 0x8000; | 782 | out_be16(&sup->scc_char4, 0x8000); |
778 | sup->scc_char5 = 0x8000; | 783 | out_be16(&sup->scc_char5, 0x8000); |
779 | sup->scc_char6 = 0x8000; | 784 | out_be16(&sup->scc_char6, 0x8000); |
780 | sup->scc_char7 = 0x8000; | 785 | out_be16(&sup->scc_char7, 0x8000); |
781 | sup->scc_char8 = 0x8000; | 786 | out_be16(&sup->scc_char8, 0x8000); |
782 | sup->scc_rccm = 0xc0ff; | 787 | out_be16(&sup->scc_rccm, 0xc0ff); |
783 | 788 | ||
784 | /* Send the CPM an initialize command. | 789 | /* Send the CPM an initialize command. |
785 | */ | 790 | */ |
@@ -788,23 +793,23 @@ static void cpm_uart_init_scc(struct uart_cpm_port *pinfo) | |||
788 | /* Set UART mode, 8 bit, no parity, one stop. | 793 | /* Set UART mode, 8 bit, no parity, one stop. |
789 | * Enable receive and transmit. | 794 | * Enable receive and transmit. |
790 | */ | 795 | */ |
791 | scp->scc_gsmrh = 0; | 796 | out_be32(&scp->scc_gsmrh, 0); |
792 | scp->scc_gsmrl = | 797 | out_be32(&scp->scc_gsmrl, |
793 | (SCC_GSMRL_MODE_UART | SCC_GSMRL_TDCR_16 | SCC_GSMRL_RDCR_16); | 798 | SCC_GSMRL_MODE_UART | SCC_GSMRL_TDCR_16 | SCC_GSMRL_RDCR_16); |
794 | 799 | ||
795 | /* Enable rx interrupts and clear all pending events. */ | 800 | /* Enable rx interrupts and clear all pending events. */ |
796 | scp->scc_sccm = 0; | 801 | out_be16(&scp->scc_sccm, 0); |
797 | scp->scc_scce = 0xffff; | 802 | out_be16(&scp->scc_scce, 0xffff); |
798 | scp->scc_dsr = 0x7e7e; | 803 | out_be16(&scp->scc_dsr, 0x7e7e); |
799 | scp->scc_psmr = 0x3000; | 804 | out_be16(&scp->scc_psmr, 0x3000); |
800 | 805 | ||
801 | scp->scc_gsmrl |= (SCC_GSMRL_ENR | SCC_GSMRL_ENT); | 806 | setbits32(&scp->scc_gsmrl, SCC_GSMRL_ENR | SCC_GSMRL_ENT); |
802 | } | 807 | } |
803 | 808 | ||
804 | static void cpm_uart_init_smc(struct uart_cpm_port *pinfo) | 809 | static void cpm_uart_init_smc(struct uart_cpm_port *pinfo) |
805 | { | 810 | { |
806 | volatile smc_t *sp; | 811 | smc_t __iomem *sp; |
807 | volatile smc_uart_t *up; | 812 | smc_uart_t __iomem *up; |
808 | 813 | ||
809 | pr_debug("CPM uart[%d]:init_smc\n", pinfo->port.line); | 814 | pr_debug("CPM uart[%d]:init_smc\n", pinfo->port.line); |
810 | 815 | ||
@@ -812,19 +817,21 @@ static void cpm_uart_init_smc(struct uart_cpm_port *pinfo) | |||
812 | up = pinfo->smcup; | 817 | up = pinfo->smcup; |
813 | 818 | ||
814 | /* Store address */ | 819 | /* Store address */ |
815 | pinfo->smcup->smc_rbase = (u_char *)pinfo->rx_bd_base - DPRAM_BASE; | 820 | out_be16(&pinfo->smcup->smc_rbase, |
816 | pinfo->smcup->smc_tbase = (u_char *)pinfo->tx_bd_base - DPRAM_BASE; | 821 | (u8 __iomem *)pinfo->rx_bd_base - DPRAM_BASE); |
822 | out_be16(&pinfo->smcup->smc_tbase, | ||
823 | (u8 __iomem *)pinfo->tx_bd_base - DPRAM_BASE); | ||
817 | 824 | ||
818 | /* | 825 | /* |
819 | * In case SMC1 is being relocated... | 826 | * In case SMC1 is being relocated... |
820 | */ | 827 | */ |
821 | #if defined (CONFIG_I2C_SPI_SMC1_UCODE_PATCH) | 828 | #if defined (CONFIG_I2C_SPI_SMC1_UCODE_PATCH) |
822 | up->smc_rbptr = pinfo->smcup->smc_rbase; | 829 | out_be16(&up->smc_rbptr, in_be16(&pinfo->smcup->smc_rbase)); |
823 | up->smc_tbptr = pinfo->smcup->smc_tbase; | 830 | out_be16(&up->smc_tbptr, in_be16(&pinfo->smcup->smc_tbase)); |
824 | up->smc_rstate = 0; | 831 | out_be32(&up->smc_rstate, 0); |
825 | up->smc_tstate = 0; | 832 | out_be32(&up->smc_tstate, 0); |
826 | up->smc_brkcr = 1; /* number of break chars */ | 833 | out_be16(&up->smc_brkcr, 1); /* number of break chars */ |
827 | up->smc_brkec = 0; | 834 | out_be16(&up->smc_brkec, 0); |
828 | #endif | 835 | #endif |
829 | 836 | ||
830 | /* Set up the uart parameters in the | 837 | /* Set up the uart parameters in the |
@@ -833,24 +840,24 @@ static void cpm_uart_init_smc(struct uart_cpm_port *pinfo) | |||
833 | cpm_set_smc_fcr(up); | 840 | cpm_set_smc_fcr(up); |
834 | 841 | ||
835 | /* Using idle charater time requires some additional tuning. */ | 842 | /* Using idle charater time requires some additional tuning. */ |
836 | up->smc_mrblr = pinfo->rx_fifosize; | 843 | out_be16(&up->smc_mrblr, pinfo->rx_fifosize); |
837 | up->smc_maxidl = pinfo->rx_fifosize; | 844 | out_be16(&up->smc_maxidl, pinfo->rx_fifosize); |
838 | up->smc_brklen = 0; | 845 | out_be16(&up->smc_brklen, 0); |
839 | up->smc_brkec = 0; | 846 | out_be16(&up->smc_brkec, 0); |
840 | up->smc_brkcr = 1; | 847 | out_be16(&up->smc_brkcr, 1); |
841 | 848 | ||
842 | cpm_line_cr_cmd(pinfo, CPM_CR_INIT_TRX); | 849 | cpm_line_cr_cmd(pinfo, CPM_CR_INIT_TRX); |
843 | 850 | ||
844 | /* Set UART mode, 8 bit, no parity, one stop. | 851 | /* Set UART mode, 8 bit, no parity, one stop. |
845 | * Enable receive and transmit. | 852 | * Enable receive and transmit. |
846 | */ | 853 | */ |
847 | sp->smc_smcmr = smcr_mk_clen(9) | SMCMR_SM_UART; | 854 | out_be16(&sp->smc_smcmr, smcr_mk_clen(9) | SMCMR_SM_UART); |
848 | 855 | ||
849 | /* Enable only rx interrupts clear all pending events. */ | 856 | /* Enable only rx interrupts clear all pending events. */ |
850 | sp->smc_smcm = 0; | 857 | out_8(&sp->smc_smcm, 0); |
851 | sp->smc_smce = 0xff; | 858 | out_8(&sp->smc_smce, 0xff); |
852 | 859 | ||
853 | sp->smc_smcmr |= (SMCMR_REN | SMCMR_TEN); | 860 | setbits16(&sp->smc_smcmr, SMCMR_REN | SMCMR_TEN); |
854 | } | 861 | } |
855 | 862 | ||
856 | /* | 863 | /* |
@@ -868,11 +875,11 @@ static int cpm_uart_request_port(struct uart_port *port) | |||
868 | return 0; | 875 | return 0; |
869 | 876 | ||
870 | if (IS_SMC(pinfo)) { | 877 | if (IS_SMC(pinfo)) { |
871 | pinfo->smcp->smc_smcm &= ~(SMCM_RX | SMCM_TX); | 878 | clrbits8(&pinfo->smcp->smc_smcm, SMCM_RX | SMCM_TX); |
872 | pinfo->smcp->smc_smcmr &= ~(SMCMR_REN | SMCMR_TEN); | 879 | clrbits16(&pinfo->smcp->smc_smcmr, SMCMR_REN | SMCMR_TEN); |
873 | } else { | 880 | } else { |
874 | pinfo->sccp->scc_sccm &= ~(UART_SCCM_TX | UART_SCCM_RX); | 881 | clrbits16(&pinfo->sccp->scc_sccm, UART_SCCM_TX | UART_SCCM_RX); |
875 | pinfo->sccp->scc_gsmrl &= ~(SCC_GSMRL_ENR | SCC_GSMRL_ENT); | 882 | clrbits32(&pinfo->sccp->scc_gsmrl, SCC_GSMRL_ENR | SCC_GSMRL_ENT); |
876 | } | 883 | } |
877 | 884 | ||
878 | ret = cpm_uart_allocbuf(pinfo, 0); | 885 | ret = cpm_uart_allocbuf(pinfo, 0); |
@@ -931,10 +938,11 @@ static struct uart_ops cpm_uart_pops = { | |||
931 | #ifdef CONFIG_PPC_CPM_NEW_BINDING | 938 | #ifdef CONFIG_PPC_CPM_NEW_BINDING |
932 | struct uart_cpm_port cpm_uart_ports[UART_NR]; | 939 | struct uart_cpm_port cpm_uart_ports[UART_NR]; |
933 | 940 | ||
934 | int cpm_uart_init_port(struct device_node *np, struct uart_cpm_port *pinfo) | 941 | static int cpm_uart_init_port(struct device_node *np, |
942 | struct uart_cpm_port *pinfo) | ||
935 | { | 943 | { |
936 | const u32 *data; | 944 | const u32 *data; |
937 | void __iomem *mem, __iomem *pram; | 945 | void __iomem *mem, *pram; |
938 | int len; | 946 | int len; |
939 | int ret; | 947 | int ret; |
940 | 948 | ||
@@ -1169,8 +1177,8 @@ static void cpm_uart_console_write(struct console *co, const char *s, | |||
1169 | &cpm_uart_ports[cpm_uart_port_map[co->index]]; | 1177 | &cpm_uart_ports[cpm_uart_port_map[co->index]]; |
1170 | #endif | 1178 | #endif |
1171 | unsigned int i; | 1179 | unsigned int i; |
1172 | volatile cbd_t *bdp, *bdbase; | 1180 | cbd_t __iomem *bdp, *bdbase; |
1173 | volatile unsigned char *cp; | 1181 | unsigned char *cp; |
1174 | 1182 | ||
1175 | /* Get the address of the host memory buffer. | 1183 | /* Get the address of the host memory buffer. |
1176 | */ | 1184 | */ |
@@ -1188,37 +1196,36 @@ static void cpm_uart_console_write(struct console *co, const char *s, | |||
1188 | * Ready indicates output is ready, and xmt is doing | 1196 | * Ready indicates output is ready, and xmt is doing |
1189 | * that, not that it is ready for us to send. | 1197 | * that, not that it is ready for us to send. |
1190 | */ | 1198 | */ |
1191 | while ((bdp->cbd_sc & BD_SC_READY) != 0) | 1199 | while ((in_be16(&bdp->cbd_sc) & BD_SC_READY) != 0) |
1192 | ; | 1200 | ; |
1193 | 1201 | ||
1194 | /* Send the character out. | 1202 | /* Send the character out. |
1195 | * If the buffer address is in the CPM DPRAM, don't | 1203 | * If the buffer address is in the CPM DPRAM, don't |
1196 | * convert it. | 1204 | * convert it. |
1197 | */ | 1205 | */ |
1198 | cp = cpm2cpu_addr(bdp->cbd_bufaddr, pinfo); | 1206 | cp = cpm2cpu_addr(in_be32(&bdp->cbd_bufaddr), pinfo); |
1199 | |||
1200 | *cp = *s; | 1207 | *cp = *s; |
1201 | 1208 | ||
1202 | bdp->cbd_datlen = 1; | 1209 | out_be16(&bdp->cbd_datlen, 1); |
1203 | bdp->cbd_sc |= BD_SC_READY; | 1210 | setbits16(&bdp->cbd_sc, BD_SC_READY); |
1204 | 1211 | ||
1205 | if (bdp->cbd_sc & BD_SC_WRAP) | 1212 | if (in_be16(&bdp->cbd_sc) & BD_SC_WRAP) |
1206 | bdp = bdbase; | 1213 | bdp = bdbase; |
1207 | else | 1214 | else |
1208 | bdp++; | 1215 | bdp++; |
1209 | 1216 | ||
1210 | /* if a LF, also do CR... */ | 1217 | /* if a LF, also do CR... */ |
1211 | if (*s == 10) { | 1218 | if (*s == 10) { |
1212 | while ((bdp->cbd_sc & BD_SC_READY) != 0) | 1219 | while ((in_be16(&bdp->cbd_sc) & BD_SC_READY) != 0) |
1213 | ; | 1220 | ; |
1214 | 1221 | ||
1215 | cp = cpm2cpu_addr(bdp->cbd_bufaddr, pinfo); | 1222 | cp = cpm2cpu_addr(in_be32(&bdp->cbd_bufaddr), pinfo); |
1216 | |||
1217 | *cp = 13; | 1223 | *cp = 13; |
1218 | bdp->cbd_datlen = 1; | ||
1219 | bdp->cbd_sc |= BD_SC_READY; | ||
1220 | 1224 | ||
1221 | if (bdp->cbd_sc & BD_SC_WRAP) | 1225 | out_be16(&bdp->cbd_datlen, 1); |
1226 | setbits16(&bdp->cbd_sc, BD_SC_READY); | ||
1227 | |||
1228 | if (in_be16(&bdp->cbd_sc) & BD_SC_WRAP) | ||
1222 | bdp = bdbase; | 1229 | bdp = bdbase; |
1223 | else | 1230 | else |
1224 | bdp++; | 1231 | bdp++; |
@@ -1229,10 +1236,10 @@ static void cpm_uart_console_write(struct console *co, const char *s, | |||
1229 | * Finally, Wait for transmitter & holding register to empty | 1236 | * Finally, Wait for transmitter & holding register to empty |
1230 | * and restore the IER | 1237 | * and restore the IER |
1231 | */ | 1238 | */ |
1232 | while ((bdp->cbd_sc & BD_SC_READY) != 0) | 1239 | while ((in_be16(&bdp->cbd_sc) & BD_SC_READY) != 0) |
1233 | ; | 1240 | ; |
1234 | 1241 | ||
1235 | pinfo->tx_cur = (volatile cbd_t *) bdp; | 1242 | pinfo->tx_cur = bdp; |
1236 | } | 1243 | } |
1237 | 1244 | ||
1238 | 1245 | ||
@@ -1319,11 +1326,11 @@ static int __init cpm_uart_console_setup(struct console *co, char *options) | |||
1319 | #endif | 1326 | #endif |
1320 | 1327 | ||
1321 | if (IS_SMC(pinfo)) { | 1328 | if (IS_SMC(pinfo)) { |
1322 | pinfo->smcp->smc_smcm &= ~(SMCM_RX | SMCM_TX); | 1329 | clrbits8(&pinfo->smcp->smc_smcm, SMCM_RX | SMCM_TX); |
1323 | pinfo->smcp->smc_smcmr &= ~(SMCMR_REN | SMCMR_TEN); | 1330 | clrbits16(&pinfo->smcp->smc_smcmr, SMCMR_REN | SMCMR_TEN); |
1324 | } else { | 1331 | } else { |
1325 | pinfo->sccp->scc_sccm &= ~(UART_SCCM_TX | UART_SCCM_RX); | 1332 | clrbits16(&pinfo->sccp->scc_sccm, UART_SCCM_TX | UART_SCCM_RX); |
1326 | pinfo->sccp->scc_gsmrl &= ~(SCC_GSMRL_ENR | SCC_GSMRL_ENT); | 1333 | clrbits32(&pinfo->sccp->scc_gsmrl, SCC_GSMRL_ENR | SCC_GSMRL_ENT); |
1327 | } | 1334 | } |
1328 | 1335 | ||
1329 | ret = cpm_uart_allocbuf(pinfo, 1); | 1336 | ret = cpm_uart_allocbuf(pinfo, 1); |
@@ -1354,7 +1361,7 @@ static struct console cpm_scc_uart_console = { | |||
1354 | .data = &cpm_reg, | 1361 | .data = &cpm_reg, |
1355 | }; | 1362 | }; |
1356 | 1363 | ||
1357 | int __init cpm_uart_console_init(void) | 1364 | static int __init cpm_uart_console_init(void) |
1358 | { | 1365 | { |
1359 | register_console(&cpm_scc_uart_console); | 1366 | register_console(&cpm_scc_uart_console); |
1360 | return 0; | 1367 | return 0; |
diff --git a/drivers/serial/cpm_uart/cpm_uart_cpm1.c b/drivers/serial/cpm_uart/cpm_uart_cpm1.c index 4647f55e19f1..52fb044bb79a 100644 --- a/drivers/serial/cpm_uart/cpm_uart_cpm1.c +++ b/drivers/serial/cpm_uart/cpm_uart_cpm1.c | |||
@@ -179,7 +179,7 @@ int cpm_uart_allocbuf(struct uart_cpm_port *pinfo, unsigned int is_con) | |||
179 | pinfo->tx_buf = pinfo->rx_buf + L1_CACHE_ALIGN(pinfo->rx_nrfifos | 179 | pinfo->tx_buf = pinfo->rx_buf + L1_CACHE_ALIGN(pinfo->rx_nrfifos |
180 | * pinfo->rx_fifosize); | 180 | * pinfo->rx_fifosize); |
181 | 181 | ||
182 | pinfo->rx_bd_base = (volatile cbd_t *)dp_mem; | 182 | pinfo->rx_bd_base = (cbd_t __iomem __force *)dp_mem; |
183 | pinfo->tx_bd_base = pinfo->rx_bd_base + pinfo->rx_nrfifos; | 183 | pinfo->tx_bd_base = pinfo->rx_bd_base + pinfo->rx_nrfifos; |
184 | 184 | ||
185 | return 0; | 185 | return 0; |
diff --git a/drivers/serial/cpm_uart/cpm_uart_cpm1.h b/drivers/serial/cpm_uart/cpm_uart_cpm1.h index 69f523a442e0..9b5465fb0bbb 100644 --- a/drivers/serial/cpm_uart/cpm_uart_cpm1.h +++ b/drivers/serial/cpm_uart/cpm_uart_cpm1.h | |||
@@ -27,18 +27,18 @@ static inline void cpm_set_brg(int brg, int baud) | |||
27 | cpm_setbrg(brg, baud); | 27 | cpm_setbrg(brg, baud); |
28 | } | 28 | } |
29 | 29 | ||
30 | static inline void cpm_set_scc_fcr(volatile scc_uart_t * sup) | 30 | static inline void cpm_set_scc_fcr(scc_uart_t __iomem * sup) |
31 | { | 31 | { |
32 | sup->scc_genscc.scc_rfcr = SMC_EB; | 32 | out_8(&sup->scc_genscc.scc_rfcr, SMC_EB); |
33 | sup->scc_genscc.scc_tfcr = SMC_EB; | 33 | out_8(&sup->scc_genscc.scc_tfcr, SMC_EB); |
34 | } | 34 | } |
35 | 35 | ||
36 | static inline void cpm_set_smc_fcr(volatile smc_uart_t * up) | 36 | static inline void cpm_set_smc_fcr(smc_uart_t __iomem * up) |
37 | { | 37 | { |
38 | up->smc_rfcr = SMC_EB; | 38 | out_8(&up->smc_rfcr, SMC_EB); |
39 | up->smc_tfcr = SMC_EB; | 39 | out_8(&up->smc_tfcr, SMC_EB); |
40 | } | 40 | } |
41 | 41 | ||
42 | #define DPRAM_BASE ((unsigned char *)cpm_dpram_addr(0)) | 42 | #define DPRAM_BASE ((u8 __iomem __force *)cpm_dpram_addr(0)) |
43 | 43 | ||
44 | #endif | 44 | #endif |
diff --git a/drivers/serial/cpm_uart/cpm_uart_cpm2.c b/drivers/serial/cpm_uart/cpm_uart_cpm2.c index 7ebce263ad40..5bd4508ce3c1 100644 --- a/drivers/serial/cpm_uart/cpm_uart_cpm2.c +++ b/drivers/serial/cpm_uart/cpm_uart_cpm2.c | |||
@@ -278,7 +278,7 @@ int cpm_uart_allocbuf(struct uart_cpm_port *pinfo, unsigned int is_con) | |||
278 | pinfo->tx_buf = pinfo->rx_buf + L1_CACHE_ALIGN(pinfo->rx_nrfifos | 278 | pinfo->tx_buf = pinfo->rx_buf + L1_CACHE_ALIGN(pinfo->rx_nrfifos |
279 | * pinfo->rx_fifosize); | 279 | * pinfo->rx_fifosize); |
280 | 280 | ||
281 | pinfo->rx_bd_base = (volatile cbd_t *)dp_mem; | 281 | pinfo->rx_bd_base = (cbd_t __iomem __force *)dp_mem; |
282 | pinfo->tx_bd_base = pinfo->rx_bd_base + pinfo->rx_nrfifos; | 282 | pinfo->tx_bd_base = pinfo->rx_bd_base + pinfo->rx_nrfifos; |
283 | 283 | ||
284 | return 0; | 284 | return 0; |
@@ -289,7 +289,7 @@ void cpm_uart_freebuf(struct uart_cpm_port *pinfo) | |||
289 | dma_free_coherent(NULL, L1_CACHE_ALIGN(pinfo->rx_nrfifos * | 289 | dma_free_coherent(NULL, L1_CACHE_ALIGN(pinfo->rx_nrfifos * |
290 | pinfo->rx_fifosize) + | 290 | pinfo->rx_fifosize) + |
291 | L1_CACHE_ALIGN(pinfo->tx_nrfifos * | 291 | L1_CACHE_ALIGN(pinfo->tx_nrfifos * |
292 | pinfo->tx_fifosize), pinfo->mem_addr, | 292 | pinfo->tx_fifosize), (void __force *)pinfo->mem_addr, |
293 | pinfo->dma_addr); | 293 | pinfo->dma_addr); |
294 | 294 | ||
295 | cpm_dpfree(pinfo->dp_addr); | 295 | cpm_dpfree(pinfo->dp_addr); |
diff --git a/drivers/serial/cpm_uart/cpm_uart_cpm2.h b/drivers/serial/cpm_uart/cpm_uart_cpm2.h index e7717ece0831..40006a7dce46 100644 --- a/drivers/serial/cpm_uart/cpm_uart_cpm2.h +++ b/drivers/serial/cpm_uart/cpm_uart_cpm2.h | |||
@@ -27,18 +27,18 @@ static inline void cpm_set_brg(int brg, int baud) | |||
27 | cpm_setbrg(brg, baud); | 27 | cpm_setbrg(brg, baud); |
28 | } | 28 | } |
29 | 29 | ||
30 | static inline void cpm_set_scc_fcr(volatile scc_uart_t * sup) | 30 | static inline void cpm_set_scc_fcr(scc_uart_t __iomem *sup) |
31 | { | 31 | { |
32 | sup->scc_genscc.scc_rfcr = CPMFCR_GBL | CPMFCR_EB; | 32 | out_8(&sup->scc_genscc.scc_rfcr, CPMFCR_GBL | CPMFCR_EB); |
33 | sup->scc_genscc.scc_tfcr = CPMFCR_GBL | CPMFCR_EB; | 33 | out_8(&sup->scc_genscc.scc_tfcr, CPMFCR_GBL | CPMFCR_EB); |
34 | } | 34 | } |
35 | 35 | ||
36 | static inline void cpm_set_smc_fcr(volatile smc_uart_t * up) | 36 | static inline void cpm_set_smc_fcr(smc_uart_t __iomem *up) |
37 | { | 37 | { |
38 | up->smc_rfcr = CPMFCR_GBL | CPMFCR_EB; | 38 | out_8(&up->smc_rfcr, CPMFCR_GBL | CPMFCR_EB); |
39 | up->smc_tfcr = CPMFCR_GBL | CPMFCR_EB; | 39 | out_8(&up->smc_tfcr, CPMFCR_GBL | CPMFCR_EB); |
40 | } | 40 | } |
41 | 41 | ||
42 | #define DPRAM_BASE ((unsigned char *)cpm_dpram_addr(0)) | 42 | #define DPRAM_BASE ((u8 __iomem __force *)cpm_dpram_addr(0)) |
43 | 43 | ||
44 | #endif | 44 | #endif |