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authorMauro Carvalho Chehab <mchehab@redhat.com>2010-09-24 10:53:52 -0400
committerMauro Carvalho Chehab <mchehab@redhat.com>2010-09-24 13:16:12 -0400
commite6649cc62949f1ed473bf1131fa425cfe72d3f64 (patch)
treebb24bcc207278c3c34b27f7e7e6ab82886a7f40e /drivers
parent1aa4a7b6b082adbfa704988dd098bc96b8837d5a (diff)
i7300_edac: Properly initialize per-csrow memory size
Due to the current edac-core limits, we cannot represent a per-channel memory size, for FB-DIMM drivers. So, we need to sum-up all values for each slot, in order to properly represent the total amount of memory found by the i7300 driver. Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/edac/i7300_edac.c17
1 files changed, 10 insertions, 7 deletions
diff --git a/drivers/edac/i7300_edac.c b/drivers/edac/i7300_edac.c
index 38d9cb8fad7c..05523b504271 100644
--- a/drivers/edac/i7300_edac.c
+++ b/drivers/edac/i7300_edac.c
@@ -617,7 +617,7 @@ static int decode_mtr(struct i7300_pvt *pvt,
617 int slot, int ch, int branch, 617 int slot, int ch, int branch,
618 struct i7300_dimm_info *dinfo, 618 struct i7300_dimm_info *dinfo,
619 struct csrow_info *p_csrow, 619 struct csrow_info *p_csrow,
620 u32 *last_page) 620 u32 *nr_pages)
621{ 621{
622 int mtr, ans, addrBits, channel; 622 int mtr, ans, addrBits, channel;
623 623
@@ -649,6 +649,7 @@ static int decode_mtr(struct i7300_pvt *pvt,
649 addrBits -= 3; /* 8 bits per bytes */ 649 addrBits -= 3; /* 8 bits per bytes */
650 650
651 dinfo->megabytes = 1 << addrBits; 651 dinfo->megabytes = 1 << addrBits;
652 *nr_pages = dinfo->megabytes << 8;
652 653
653 debugf2("\t\tWIDTH: x%d\n", MTR_DRAM_WIDTH(mtr)); 654 debugf2("\t\tWIDTH: x%d\n", MTR_DRAM_WIDTH(mtr));
654 655
@@ -662,12 +663,8 @@ static int decode_mtr(struct i7300_pvt *pvt,
662 debugf2("\t\tSIZE: %d MB\n", dinfo->megabytes); 663 debugf2("\t\tSIZE: %d MB\n", dinfo->megabytes);
663 664
664 p_csrow->grain = 8; 665 p_csrow->grain = 8;
665 p_csrow->nr_pages = dinfo->megabytes << 8;
666 p_csrow->mtype = MEM_FB_DDR2; 666 p_csrow->mtype = MEM_FB_DDR2;
667 p_csrow->csrow_idx = slot; 667 p_csrow->csrow_idx = slot;
668 p_csrow->first_page = *last_page;
669 *last_page += p_csrow->nr_pages;
670 p_csrow->last_page = *last_page;
671 p_csrow->page_mask = 0; 668 p_csrow->page_mask = 0;
672 669
673 /* 670 /*
@@ -780,7 +777,7 @@ static int i7300_init_csrows(struct mem_ctl_info *mci)
780 int rc = -ENODEV; 777 int rc = -ENODEV;
781 int mtr; 778 int mtr;
782 int ch, branch, slot, channel; 779 int ch, branch, slot, channel;
783 u32 last_page = 0; 780 u32 last_page = 0, nr_pages;
784 781
785 pvt = mci->pvt_info; 782 pvt = mci->pvt_info;
786 783
@@ -818,11 +815,17 @@ static int i7300_init_csrows(struct mem_ctl_info *mci)
818 p_csrow = &mci->csrows[slot]; 815 p_csrow = &mci->csrows[slot];
819 816
820 mtr = decode_mtr(pvt, slot, ch, branch, 817 mtr = decode_mtr(pvt, slot, ch, branch,
821 dinfo, p_csrow, &last_page); 818 dinfo, p_csrow, &nr_pages);
822 /* if no DIMMS on this row, continue */ 819 /* if no DIMMS on this row, continue */
823 if (!MTR_DIMMS_PRESENT(mtr)) 820 if (!MTR_DIMMS_PRESENT(mtr))
824 continue; 821 continue;
825 822
823 /* Update per_csrow memory count */
824 p_csrow->nr_pages += nr_pages;
825 p_csrow->first_page = last_page;
826 last_page += nr_pages;
827 p_csrow->last_page = last_page;
828
826 rc = 0; 829 rc = 0;
827 } 830 }
828 } 831 }