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authorEugeni Dodonov <eugeni.dodonov@intel.com>2012-02-23 20:57:06 -0500
committerJesse Barnes <jbarnes@virtuousgeek.org>2012-02-24 12:34:10 -0500
commitc0e2ee1bc0cf82eec89e26b7afe7e4db0561b7d9 (patch)
tree9d53bedc4c5778f7316b6a97d082b4c9820a8cef /drivers
parent4e9bb47bd29e02f2daaa7bdb2a8ddf977bf76f06 (diff)
drm/i915: fix operator precedence when enabling RC6p
As noticed by Torsten Kaiser, the operator precedence can play tricks with us here. CC: Dave Airlie <airlied@redhat.com> Signed-off-by: Eugeni Dodonov <eugeni.dodonov@intel.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/gpu/drm/i915/intel_display.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index e654f32de197..4871ba0dcc14 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -8194,7 +8194,7 @@ void gen6_enable_rps(struct drm_i915_private *dev_priv)
8194 8194
8195 if (intel_enable_rc6(dev_priv->dev)) 8195 if (intel_enable_rc6(dev_priv->dev))
8196 rc6_mask = GEN6_RC_CTL_RC6_ENABLE | 8196 rc6_mask = GEN6_RC_CTL_RC6_ENABLE |
8197 (IS_GEN7(dev_priv->dev)) ? GEN6_RC_CTL_RC6p_ENABLE : 0; 8197 ((IS_GEN7(dev_priv->dev)) ? GEN6_RC_CTL_RC6p_ENABLE : 0);
8198 8198
8199 I915_WRITE(GEN6_RC_CONTROL, 8199 I915_WRITE(GEN6_RC_CONTROL,
8200 rc6_mask | 8200 rc6_mask |