diff options
| author | Bruce Allan <bruce.w.allan@intel.com> | 2010-05-10 11:00:31 -0400 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2010-05-13 02:31:11 -0400 |
| commit | 9c5e209d4ba00eb09922f0f56136474372395c2b (patch) | |
| tree | dcd177cb165b46a5db273c29ab98ea65f65c9396 /drivers | |
| parent | 52a9b2319628e2cbbff7abc4f1092f4597c75a4f (diff) | |
e1000e: cleanup multiple common exit points
...in e1000_update_nvm_checksum_ich8lan().
Signed-off-by: Bruce Allan <bruce.w.allan@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/net/e1000e/ich8lan.c | 41 |
1 files changed, 17 insertions, 24 deletions
diff --git a/drivers/net/e1000e/ich8lan.c b/drivers/net/e1000e/ich8lan.c index b8c4dce01a04..448e12378dbc 100644 --- a/drivers/net/e1000e/ich8lan.c +++ b/drivers/net/e1000e/ich8lan.c | |||
| @@ -1938,18 +1938,14 @@ static s32 e1000_update_nvm_checksum_ich8lan(struct e1000_hw *hw) | |||
| 1938 | new_bank_offset = nvm->flash_bank_size; | 1938 | new_bank_offset = nvm->flash_bank_size; |
| 1939 | old_bank_offset = 0; | 1939 | old_bank_offset = 0; |
| 1940 | ret_val = e1000_erase_flash_bank_ich8lan(hw, 1); | 1940 | ret_val = e1000_erase_flash_bank_ich8lan(hw, 1); |
| 1941 | if (ret_val) { | 1941 | if (ret_val) |
| 1942 | nvm->ops.release(hw); | 1942 | goto release; |
| 1943 | goto out; | ||
| 1944 | } | ||
| 1945 | } else { | 1943 | } else { |
| 1946 | old_bank_offset = nvm->flash_bank_size; | 1944 | old_bank_offset = nvm->flash_bank_size; |
| 1947 | new_bank_offset = 0; | 1945 | new_bank_offset = 0; |
| 1948 | ret_val = e1000_erase_flash_bank_ich8lan(hw, 0); | 1946 | ret_val = e1000_erase_flash_bank_ich8lan(hw, 0); |
| 1949 | if (ret_val) { | 1947 | if (ret_val) |
| 1950 | nvm->ops.release(hw); | 1948 | goto release; |
| 1951 | goto out; | ||
| 1952 | } | ||
| 1953 | } | 1949 | } |
| 1954 | 1950 | ||
| 1955 | for (i = 0; i < E1000_ICH8_SHADOW_RAM_WORDS; i++) { | 1951 | for (i = 0; i < E1000_ICH8_SHADOW_RAM_WORDS; i++) { |
| @@ -2005,8 +2001,7 @@ static s32 e1000_update_nvm_checksum_ich8lan(struct e1000_hw *hw) | |||
| 2005 | if (ret_val) { | 2001 | if (ret_val) { |
| 2006 | /* Possibly read-only, see e1000e_write_protect_nvm_ich8lan() */ | 2002 | /* Possibly read-only, see e1000e_write_protect_nvm_ich8lan() */ |
| 2007 | e_dbg("Flash commit failed.\n"); | 2003 | e_dbg("Flash commit failed.\n"); |
| 2008 | nvm->ops.release(hw); | 2004 | goto release; |
| 2009 | goto out; | ||
| 2010 | } | 2005 | } |
| 2011 | 2006 | ||
| 2012 | /* | 2007 | /* |
| @@ -2017,18 +2012,15 @@ static s32 e1000_update_nvm_checksum_ich8lan(struct e1000_hw *hw) | |||
| 2017 | */ | 2012 | */ |
| 2018 | act_offset = new_bank_offset + E1000_ICH_NVM_SIG_WORD; | 2013 | act_offset = new_bank_offset + E1000_ICH_NVM_SIG_WORD; |
| 2019 | ret_val = e1000_read_flash_word_ich8lan(hw, act_offset, &data); | 2014 | ret_val = e1000_read_flash_word_ich8lan(hw, act_offset, &data); |
| 2020 | if (ret_val) { | 2015 | if (ret_val) |
| 2021 | nvm->ops.release(hw); | 2016 | goto release; |
| 2022 | goto out; | 2017 | |
| 2023 | } | ||
| 2024 | data &= 0xBFFF; | 2018 | data &= 0xBFFF; |
| 2025 | ret_val = e1000_retry_write_flash_byte_ich8lan(hw, | 2019 | ret_val = e1000_retry_write_flash_byte_ich8lan(hw, |
| 2026 | act_offset * 2 + 1, | 2020 | act_offset * 2 + 1, |
| 2027 | (u8)(data >> 8)); | 2021 | (u8)(data >> 8)); |
| 2028 | if (ret_val) { | 2022 | if (ret_val) |
| 2029 | nvm->ops.release(hw); | 2023 | goto release; |
| 2030 | goto out; | ||
| 2031 | } | ||
| 2032 | 2024 | ||
| 2033 | /* | 2025 | /* |
| 2034 | * And invalidate the previously valid segment by setting | 2026 | * And invalidate the previously valid segment by setting |
| @@ -2038,10 +2030,8 @@ static s32 e1000_update_nvm_checksum_ich8lan(struct e1000_hw *hw) | |||
| 2038 | */ | 2030 | */ |
| 2039 | act_offset = (old_bank_offset + E1000_ICH_NVM_SIG_WORD) * 2 + 1; | 2031 | act_offset = (old_bank_offset + E1000_ICH_NVM_SIG_WORD) * 2 + 1; |
| 2040 | ret_val = e1000_retry_write_flash_byte_ich8lan(hw, act_offset, 0); | 2032 | ret_val = e1000_retry_write_flash_byte_ich8lan(hw, act_offset, 0); |
| 2041 | if (ret_val) { | 2033 | if (ret_val) |
| 2042 | nvm->ops.release(hw); | 2034 | goto release; |
| 2043 | goto out; | ||
| 2044 | } | ||
| 2045 | 2035 | ||
| 2046 | /* Great! Everything worked, we can now clear the cached entries. */ | 2036 | /* Great! Everything worked, we can now clear the cached entries. */ |
| 2047 | for (i = 0; i < E1000_ICH8_SHADOW_RAM_WORDS; i++) { | 2037 | for (i = 0; i < E1000_ICH8_SHADOW_RAM_WORDS; i++) { |
| @@ -2049,14 +2039,17 @@ static s32 e1000_update_nvm_checksum_ich8lan(struct e1000_hw *hw) | |||
| 2049 | dev_spec->shadow_ram[i].value = 0xFFFF; | 2039 | dev_spec->shadow_ram[i].value = 0xFFFF; |
| 2050 | } | 2040 | } |
| 2051 | 2041 | ||
| 2042 | release: | ||
| 2052 | nvm->ops.release(hw); | 2043 | nvm->ops.release(hw); |
| 2053 | 2044 | ||
| 2054 | /* | 2045 | /* |
| 2055 | * Reload the EEPROM, or else modifications will not appear | 2046 | * Reload the EEPROM, or else modifications will not appear |
| 2056 | * until after the next adapter reset. | 2047 | * until after the next adapter reset. |
| 2057 | */ | 2048 | */ |
| 2058 | e1000e_reload_nvm(hw); | 2049 | if (!ret_val) { |
| 2059 | msleep(10); | 2050 | e1000e_reload_nvm(hw); |
| 2051 | msleep(10); | ||
| 2052 | } | ||
| 2060 | 2053 | ||
| 2061 | out: | 2054 | out: |
| 2062 | if (ret_val) | 2055 | if (ret_val) |
