diff options
author | Wilson Callan <wilson.callan@savantsystems.com> | 2012-07-19 02:49:16 -0400 |
---|---|---|
committer | Chris Ball <cjb@laptop.org> | 2012-07-22 16:42:30 -0400 |
commit | 9a0985b78d70209db1e0d870f7be80272a0e7642 (patch) | |
tree | aac27528e36b09c9b4710a6090c7cb34a207173d /drivers | |
parent | 108ecc4cf9c46a4caabaf18efc42d19818c95b70 (diff) |
mmc: esdhc: Fix DMA_MASK to not break mx25 DMA access
Patch to not set reserved bits in i.MX25 PROCTL register. DMA stops
working if those bits get set.
Signed-off-by: Wilson Callan <wilson.callan@savantsystems.com>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Chris Ball <cjb@laptop.org>
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/mmc/host/sdhci-esdhc-imx.c | 9 |
1 files changed, 7 insertions, 2 deletions
diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c b/drivers/mmc/host/sdhci-esdhc-imx.c index ebbe984e5d00..e23f8134591c 100644 --- a/drivers/mmc/host/sdhci-esdhc-imx.c +++ b/drivers/mmc/host/sdhci-esdhc-imx.c | |||
@@ -299,6 +299,8 @@ static void esdhc_writew_le(struct sdhci_host *host, u16 val, int reg) | |||
299 | 299 | ||
300 | static void esdhc_writeb_le(struct sdhci_host *host, u8 val, int reg) | 300 | static void esdhc_writeb_le(struct sdhci_host *host, u8 val, int reg) |
301 | { | 301 | { |
302 | struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); | ||
303 | struct pltfm_imx_data *imx_data = pltfm_host->priv; | ||
302 | u32 new_val; | 304 | u32 new_val; |
303 | 305 | ||
304 | switch (reg) { | 306 | switch (reg) { |
@@ -315,8 +317,11 @@ static void esdhc_writeb_le(struct sdhci_host *host, u8 val, int reg) | |||
315 | SDHCI_CTRL_D3CD); | 317 | SDHCI_CTRL_D3CD); |
316 | /* ensure the endianess */ | 318 | /* ensure the endianess */ |
317 | new_val |= ESDHC_HOST_CONTROL_LE; | 319 | new_val |= ESDHC_HOST_CONTROL_LE; |
318 | /* DMA mode bits are shifted */ | 320 | /* bits 8&9 are reserved on mx25 */ |
319 | new_val |= (val & SDHCI_CTRL_DMA_MASK) << 5; | 321 | if (!is_imx25_esdhc(imx_data)) { |
322 | /* DMA mode bits are shifted */ | ||
323 | new_val |= (val & SDHCI_CTRL_DMA_MASK) << 5; | ||
324 | } | ||
320 | 325 | ||
321 | esdhc_clrset_le(host, 0xffff, new_val, reg); | 326 | esdhc_clrset_le(host, 0xffff, new_val, reg); |
322 | return; | 327 | return; |