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authorBen Skeggs <bskeggs@redhat.com>2012-10-22 00:10:16 -0400
committerBen Skeggs <bskeggs@redhat.com>2012-10-22 00:38:06 -0400
commit5e5a195ecc8cc0280d169d6da33c959df6336e9f (patch)
tree40622c64d1335ebfcebf379d7f44a5a0ef40f56e /drivers
parent2c25b7399570ebdcf737c5af67c9d26a1771c002 (diff)
drm/nouveau/clock: fix missing pll type/addr when matching default entry
This issue is a regression from 70790f4f819875e8f390871fd15bbbf823f28e1b, and causes us to miss a special-case for C51 (NV4E) chipsets and return the wrong reference frequency for the VPLLs. Should fix fdo#56202 Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/gpu/drm/nouveau/core/subdev/bios/pll.c10
1 files changed, 4 insertions, 6 deletions
diff --git a/drivers/gpu/drm/nouveau/core/subdev/bios/pll.c b/drivers/gpu/drm/nouveau/core/subdev/bios/pll.c
index 5e5f4cddae3c..f835501203e5 100644
--- a/drivers/gpu/drm/nouveau/core/subdev/bios/pll.c
+++ b/drivers/gpu/drm/nouveau/core/subdev/bios/pll.c
@@ -157,11 +157,10 @@ pll_map_reg(struct nouveau_bios *bios, u32 reg, u32 *type, u8 *ver, u8 *len)
157 while (map->reg) { 157 while (map->reg) {
158 if (map->reg == reg && *ver >= 0x20) { 158 if (map->reg == reg && *ver >= 0x20) {
159 u16 addr = (data += hdr); 159 u16 addr = (data += hdr);
160 *type = map->type;
160 while (cnt--) { 161 while (cnt--) {
161 if (nv_ro32(bios, data) == map->reg) { 162 if (nv_ro32(bios, data) == map->reg)
162 *type = map->type;
163 return data; 163 return data;
164 }
165 data += *len; 164 data += *len;
166 } 165 }
167 return addr; 166 return addr;
@@ -200,11 +199,10 @@ pll_map_type(struct nouveau_bios *bios, u8 type, u32 *reg, u8 *ver, u8 *len)
200 while (map->reg) { 199 while (map->reg) {
201 if (map->type == type && *ver >= 0x20) { 200 if (map->type == type && *ver >= 0x20) {
202 u16 addr = (data += hdr); 201 u16 addr = (data += hdr);
202 *reg = map->reg;
203 while (cnt--) { 203 while (cnt--) {
204 if (nv_ro32(bios, data) == map->reg) { 204 if (nv_ro32(bios, data) == map->reg)
205 *reg = map->reg;
206 return data; 205 return data;
207 }
208 data += *len; 206 data += *len;
209 } 207 }
210 return addr; 208 return addr;