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authorKumar Gala <galak@kernel.crashing.org>2006-01-24 11:11:27 -0500
committerGreg Kroah-Hartman <gregkh@suse.de>2006-03-20 17:49:57 -0500
commit499003e815344304c7b0c93aad923ddf644d24e0 (patch)
tree7a73626d56fd83174b342093f421d99e7e90e5b4 /drivers
parent0eb8c7cafe8d4fa9a90ea8680200e3ae3d57b1bd (diff)
[PATCH] USB: Fix masking bug initialization of Freescale EHCI controller
In setting up the of PHY we masked off too many bits, instead just initialize PORTSC for the type of PHY we are using. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Acked-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/usb/host/ehci-fsl.c3
1 files changed, 1 insertions, 2 deletions
diff --git a/drivers/usb/host/ehci-fsl.c b/drivers/usb/host/ehci-fsl.c
index 59f90f76ee31..f985f121a245 100644
--- a/drivers/usb/host/ehci-fsl.c
+++ b/drivers/usb/host/ehci-fsl.c
@@ -160,8 +160,7 @@ static void mpc83xx_setup_phy(struct ehci_hcd *ehci,
160 enum fsl_usb2_phy_modes phy_mode, 160 enum fsl_usb2_phy_modes phy_mode,
161 unsigned int port_offset) 161 unsigned int port_offset)
162{ 162{
163 u32 portsc = readl(&ehci->regs->port_status[port_offset]); 163 u32 portsc = 0;
164 portsc &= ~PORT_PTS_MSK;
165 switch (phy_mode) { 164 switch (phy_mode) {
166 case FSL_USB2_PHY_ULPI: 165 case FSL_USB2_PHY_ULPI:
167 portsc |= PORT_PTS_ULPI; 166 portsc |= PORT_PTS_ULPI;