diff options
author | Steve Longerbeam <slongerbeam@gmail.com> | 2014-06-25 21:05:55 -0400 |
---|---|---|
committer | Philipp Zabel <p.zabel@pengutronix.de> | 2014-09-02 08:55:56 -0400 |
commit | 3feb049f378da6aa1209e05ef5c656a1f26a9183 (patch) | |
tree | a6fca304e6c726762ec2d740c85a15f9ec95a6f7 /drivers | |
parent | 60c04456f68f67f68180ebd84a47e4c58931f70f (diff) |
gpu: ipu-v3: Add ipu_dump()
Adds ipu_dump() which dumps IPU register state to debug.
Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/gpu/ipu-v3/ipu-common.c | 38 |
1 files changed, 38 insertions, 0 deletions
diff --git a/drivers/gpu/ipu-v3/ipu-common.c b/drivers/gpu/ipu-v3/ipu-common.c index 5c3d5269056e..df65d2bca522 100644 --- a/drivers/gpu/ipu-v3/ipu-common.c +++ b/drivers/gpu/ipu-v3/ipu-common.c | |||
@@ -1145,6 +1145,44 @@ static void ipu_irq_exit(struct ipu_soc *ipu) | |||
1145 | irq_domain_remove(ipu->domain); | 1145 | irq_domain_remove(ipu->domain); |
1146 | } | 1146 | } |
1147 | 1147 | ||
1148 | void ipu_dump(struct ipu_soc *ipu) | ||
1149 | { | ||
1150 | int i; | ||
1151 | |||
1152 | dev_dbg(ipu->dev, "IPU_CONF = \t0x%08X\n", | ||
1153 | ipu_cm_read(ipu, IPU_CONF)); | ||
1154 | dev_dbg(ipu->dev, "IDMAC_CONF = \t0x%08X\n", | ||
1155 | ipu_idmac_read(ipu, IDMAC_CONF)); | ||
1156 | dev_dbg(ipu->dev, "IDMAC_CHA_EN1 = \t0x%08X\n", | ||
1157 | ipu_idmac_read(ipu, IDMAC_CHA_EN(0))); | ||
1158 | dev_dbg(ipu->dev, "IDMAC_CHA_EN2 = \t0x%08X\n", | ||
1159 | ipu_idmac_read(ipu, IDMAC_CHA_EN(32))); | ||
1160 | dev_dbg(ipu->dev, "IDMAC_CHA_PRI1 = \t0x%08X\n", | ||
1161 | ipu_idmac_read(ipu, IDMAC_CHA_PRI(0))); | ||
1162 | dev_dbg(ipu->dev, "IDMAC_CHA_PRI2 = \t0x%08X\n", | ||
1163 | ipu_idmac_read(ipu, IDMAC_CHA_PRI(32))); | ||
1164 | dev_dbg(ipu->dev, "IDMAC_BAND_EN1 = \t0x%08X\n", | ||
1165 | ipu_idmac_read(ipu, IDMAC_BAND_EN(0))); | ||
1166 | dev_dbg(ipu->dev, "IDMAC_BAND_EN2 = \t0x%08X\n", | ||
1167 | ipu_idmac_read(ipu, IDMAC_BAND_EN(32))); | ||
1168 | dev_dbg(ipu->dev, "IPU_CHA_DB_MODE_SEL0 = \t0x%08X\n", | ||
1169 | ipu_cm_read(ipu, IPU_CHA_DB_MODE_SEL(0))); | ||
1170 | dev_dbg(ipu->dev, "IPU_CHA_DB_MODE_SEL1 = \t0x%08X\n", | ||
1171 | ipu_cm_read(ipu, IPU_CHA_DB_MODE_SEL(32))); | ||
1172 | dev_dbg(ipu->dev, "IPU_FS_PROC_FLOW1 = \t0x%08X\n", | ||
1173 | ipu_cm_read(ipu, IPU_FS_PROC_FLOW1)); | ||
1174 | dev_dbg(ipu->dev, "IPU_FS_PROC_FLOW2 = \t0x%08X\n", | ||
1175 | ipu_cm_read(ipu, IPU_FS_PROC_FLOW2)); | ||
1176 | dev_dbg(ipu->dev, "IPU_FS_PROC_FLOW3 = \t0x%08X\n", | ||
1177 | ipu_cm_read(ipu, IPU_FS_PROC_FLOW3)); | ||
1178 | dev_dbg(ipu->dev, "IPU_FS_DISP_FLOW1 = \t0x%08X\n", | ||
1179 | ipu_cm_read(ipu, IPU_FS_DISP_FLOW1)); | ||
1180 | for (i = 0; i < 15; i++) | ||
1181 | dev_dbg(ipu->dev, "IPU_INT_CTRL(%d) = \t%08X\n", i, | ||
1182 | ipu_cm_read(ipu, IPU_INT_CTRL(i))); | ||
1183 | } | ||
1184 | EXPORT_SYMBOL_GPL(ipu_dump); | ||
1185 | |||
1148 | static int ipu_probe(struct platform_device *pdev) | 1186 | static int ipu_probe(struct platform_device *pdev) |
1149 | { | 1187 | { |
1150 | const struct of_device_id *of_id = | 1188 | const struct of_device_id *of_id = |