diff options
author | Anson Huang <b20788@freescale.com> | 2014-05-12 11:10:35 -0400 |
---|---|---|
committer | Linus Walleij <linus.walleij@linaro.org> | 2014-05-27 05:24:28 -0400 |
commit | 2cc140fe360732bc5467df3ad932685c76078dd4 (patch) | |
tree | 0b3e2aacef67f974028e2778f2d68a997555deac /drivers | |
parent | cccb0c3e6a3feae761adbb34d74c1b9abb77ba4c (diff) |
pinctrl: add pinctrl driver for imx6sx
Add a pinctrl driver for i.MX6 SoloX based on pinctrl-imx core
driver.
Signed-off-by: Anson Huang <b20788@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/pinctrl/Kconfig | 7 | ||||
-rw-r--r-- | drivers/pinctrl/Makefile | 1 | ||||
-rw-r--r-- | drivers/pinctrl/pinctrl-imx6sx.c | 407 |
3 files changed, 415 insertions, 0 deletions
diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig index 29a0d8993456..0042ccb46b9a 100644 --- a/drivers/pinctrl/Kconfig +++ b/drivers/pinctrl/Kconfig | |||
@@ -188,6 +188,13 @@ config PINCTRL_IMX6SL | |||
188 | help | 188 | help |
189 | Say Y here to enable the imx6sl pinctrl driver | 189 | Say Y here to enable the imx6sl pinctrl driver |
190 | 190 | ||
191 | config PINCTRL_IMX6SX | ||
192 | bool "IMX6SX pinctrl driver" | ||
193 | depends on SOC_IMX6SX | ||
194 | select PINCTRL_IMX | ||
195 | help | ||
196 | Say Y here to enable the imx6sx pinctrl driver | ||
197 | |||
191 | config PINCTRL_VF610 | 198 | config PINCTRL_VF610 |
192 | bool "Freescale Vybrid VF610 pinctrl driver" | 199 | bool "Freescale Vybrid VF610 pinctrl driver" |
193 | depends on SOC_VF610 | 200 | depends on SOC_VF610 |
diff --git a/drivers/pinctrl/Makefile b/drivers/pinctrl/Makefile index c06432db970f..c4b5d405b8f5 100644 --- a/drivers/pinctrl/Makefile +++ b/drivers/pinctrl/Makefile | |||
@@ -32,6 +32,7 @@ obj-$(CONFIG_PINCTRL_IMX53) += pinctrl-imx53.o | |||
32 | obj-$(CONFIG_PINCTRL_IMX6Q) += pinctrl-imx6q.o | 32 | obj-$(CONFIG_PINCTRL_IMX6Q) += pinctrl-imx6q.o |
33 | obj-$(CONFIG_PINCTRL_IMX6Q) += pinctrl-imx6dl.o | 33 | obj-$(CONFIG_PINCTRL_IMX6Q) += pinctrl-imx6dl.o |
34 | obj-$(CONFIG_PINCTRL_IMX6SL) += pinctrl-imx6sl.o | 34 | obj-$(CONFIG_PINCTRL_IMX6SL) += pinctrl-imx6sl.o |
35 | obj-$(CONFIG_PINCTRL_IMX6SX) += pinctrl-imx6sx.o | ||
35 | obj-$(CONFIG_PINCTRL_FALCON) += pinctrl-falcon.o | 36 | obj-$(CONFIG_PINCTRL_FALCON) += pinctrl-falcon.o |
36 | obj-$(CONFIG_PINCTRL_MXS) += pinctrl-mxs.o | 37 | obj-$(CONFIG_PINCTRL_MXS) += pinctrl-mxs.o |
37 | obj-$(CONFIG_PINCTRL_IMX23) += pinctrl-imx23.o | 38 | obj-$(CONFIG_PINCTRL_IMX23) += pinctrl-imx23.o |
diff --git a/drivers/pinctrl/pinctrl-imx6sx.c b/drivers/pinctrl/pinctrl-imx6sx.c new file mode 100644 index 000000000000..09758a56b9df --- /dev/null +++ b/drivers/pinctrl/pinctrl-imx6sx.c | |||
@@ -0,0 +1,407 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2014 Freescale Semiconductor, Inc. | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify | ||
5 | * it under the terms of the GNU General Public License version 2 as | ||
6 | * published by the Free Software Foundation. | ||
7 | */ | ||
8 | |||
9 | #include <linux/err.h> | ||
10 | #include <linux/init.h> | ||
11 | #include <linux/io.h> | ||
12 | #include <linux/module.h> | ||
13 | #include <linux/of.h> | ||
14 | #include <linux/of_device.h> | ||
15 | #include <linux/pinctrl/pinctrl.h> | ||
16 | |||
17 | #include "pinctrl-imx.h" | ||
18 | |||
19 | enum imx6sx_pads { | ||
20 | MX6Sx_PAD_RESERVE0 = 0, | ||
21 | MX6Sx_PAD_RESERVE1 = 1, | ||
22 | MX6Sx_PAD_RESERVE2 = 2, | ||
23 | MX6Sx_PAD_RESERVE3 = 3, | ||
24 | MX6Sx_PAD_RESERVE4 = 4, | ||
25 | MX6SX_PAD_GPIO1_IO00 = 5, | ||
26 | MX6SX_PAD_GPIO1_IO01 = 6, | ||
27 | MX6SX_PAD_GPIO1_IO02 = 7, | ||
28 | MX6SX_PAD_GPIO1_IO03 = 8, | ||
29 | MX6SX_PAD_GPIO1_IO04 = 9, | ||
30 | MX6SX_PAD_GPIO1_IO05 = 10, | ||
31 | MX6SX_PAD_GPIO1_IO06 = 11, | ||
32 | MX6SX_PAD_GPIO1_IO07 = 12, | ||
33 | MX6SX_PAD_GPIO1_IO08 = 13, | ||
34 | MX6SX_PAD_GPIO1_IO09 = 14, | ||
35 | MX6SX_PAD_GPIO1_IO10 = 15, | ||
36 | MX6SX_PAD_GPIO1_IO11 = 16, | ||
37 | MX6SX_PAD_GPIO1_IO12 = 17, | ||
38 | MX6SX_PAD_GPIO1_IO13 = 18, | ||
39 | MX6SX_PAD_CSI_DATA00 = 19, | ||
40 | MX6SX_PAD_CSI_DATA01 = 20, | ||
41 | MX6SX_PAD_CSI_DATA02 = 21, | ||
42 | MX6SX_PAD_CSI_DATA03 = 22, | ||
43 | MX6SX_PAD_CSI_DATA04 = 23, | ||
44 | MX6SX_PAD_CSI_DATA05 = 24, | ||
45 | MX6SX_PAD_CSI_DATA06 = 25, | ||
46 | MX6SX_PAD_CSI_DATA07 = 26, | ||
47 | MX6SX_PAD_CSI_HSYNC = 27, | ||
48 | MX6SX_PAD_CSI_MCLK = 28, | ||
49 | MX6SX_PAD_CSI_PIXCLK = 29, | ||
50 | MX6SX_PAD_CSI_VSYNC = 30, | ||
51 | MX6SX_PAD_ENET1_COL = 31, | ||
52 | MX6SX_PAD_ENET1_CRS = 32, | ||
53 | MX6SX_PAD_ENET1_MDC = 33, | ||
54 | MX6SX_PAD_ENET1_MDIO = 34, | ||
55 | MX6SX_PAD_ENET1_RX_CLK = 35, | ||
56 | MX6SX_PAD_ENET1_TX_CLK = 36, | ||
57 | MX6SX_PAD_ENET2_COL = 37, | ||
58 | MX6SX_PAD_ENET2_CRS = 38, | ||
59 | MX6SX_PAD_ENET2_RX_CLK = 39, | ||
60 | MX6SX_PAD_ENET2_TX_CLK = 40, | ||
61 | MX6SX_PAD_KEY_COL0 = 41, | ||
62 | MX6SX_PAD_KEY_COL1 = 42, | ||
63 | MX6SX_PAD_KEY_COL2 = 43, | ||
64 | MX6SX_PAD_KEY_COL3 = 44, | ||
65 | MX6SX_PAD_KEY_COL4 = 45, | ||
66 | MX6SX_PAD_KEY_ROW0 = 46, | ||
67 | MX6SX_PAD_KEY_ROW1 = 47, | ||
68 | MX6SX_PAD_KEY_ROW2 = 48, | ||
69 | MX6SX_PAD_KEY_ROW3 = 49, | ||
70 | MX6SX_PAD_KEY_ROW4 = 50, | ||
71 | MX6SX_PAD_LCD1_CLK = 51, | ||
72 | MX6SX_PAD_LCD1_DATA00 = 52, | ||
73 | MX6SX_PAD_LCD1_DATA01 = 53, | ||
74 | MX6SX_PAD_LCD1_DATA02 = 54, | ||
75 | MX6SX_PAD_LCD1_DATA03 = 55, | ||
76 | MX6SX_PAD_LCD1_DATA04 = 56, | ||
77 | MX6SX_PAD_LCD1_DATA05 = 57, | ||
78 | MX6SX_PAD_LCD1_DATA06 = 58, | ||
79 | MX6SX_PAD_LCD1_DATA07 = 59, | ||
80 | MX6SX_PAD_LCD1_DATA08 = 60, | ||
81 | MX6SX_PAD_LCD1_DATA09 = 61, | ||
82 | MX6SX_PAD_LCD1_DATA10 = 62, | ||
83 | MX6SX_PAD_LCD1_DATA11 = 63, | ||
84 | MX6SX_PAD_LCD1_DATA12 = 64, | ||
85 | MX6SX_PAD_LCD1_DATA13 = 65, | ||
86 | MX6SX_PAD_LCD1_DATA14 = 66, | ||
87 | MX6SX_PAD_LCD1_DATA15 = 67, | ||
88 | MX6SX_PAD_LCD1_DATA16 = 68, | ||
89 | MX6SX_PAD_LCD1_DATA17 = 69, | ||
90 | MX6SX_PAD_LCD1_DATA18 = 70, | ||
91 | MX6SX_PAD_LCD1_DATA19 = 71, | ||
92 | MX6SX_PAD_LCD1_DATA20 = 72, | ||
93 | MX6SX_PAD_LCD1_DATA21 = 73, | ||
94 | MX6SX_PAD_LCD1_DATA22 = 74, | ||
95 | MX6SX_PAD_LCD1_DATA23 = 75, | ||
96 | MX6SX_PAD_LCD1_ENABLE = 76, | ||
97 | MX6SX_PAD_LCD1_HSYNC = 77, | ||
98 | MX6SX_PAD_LCD1_RESET = 78, | ||
99 | MX6SX_PAD_LCD1_VSYNC = 79, | ||
100 | MX6SX_PAD_NAND_ALE = 80, | ||
101 | MX6SX_PAD_NAND_CE0_B = 81, | ||
102 | MX6SX_PAD_NAND_CE1_B = 82, | ||
103 | MX6SX_PAD_NAND_CLE = 83, | ||
104 | MX6SX_PAD_NAND_DATA00 = 84 , | ||
105 | MX6SX_PAD_NAND_DATA01 = 85, | ||
106 | MX6SX_PAD_NAND_DATA02 = 86, | ||
107 | MX6SX_PAD_NAND_DATA03 = 87, | ||
108 | MX6SX_PAD_NAND_DATA04 = 88, | ||
109 | MX6SX_PAD_NAND_DATA05 = 89, | ||
110 | MX6SX_PAD_NAND_DATA06 = 90, | ||
111 | MX6SX_PAD_NAND_DATA07 = 91, | ||
112 | MX6SX_PAD_NAND_RE_B = 92, | ||
113 | MX6SX_PAD_NAND_READY_B = 93, | ||
114 | MX6SX_PAD_NAND_WE_B = 94, | ||
115 | MX6SX_PAD_NAND_WP_B = 95, | ||
116 | MX6SX_PAD_QSPI1A_DATA0 = 96, | ||
117 | MX6SX_PAD_QSPI1A_DATA1 = 97, | ||
118 | MX6SX_PAD_QSPI1A_DATA2 = 98, | ||
119 | MX6SX_PAD_QSPI1A_DATA3 = 99, | ||
120 | MX6SX_PAD_QSPI1A_DQS = 100, | ||
121 | MX6SX_PAD_QSPI1A_SCLK = 101, | ||
122 | MX6SX_PAD_QSPI1A_SS0_B = 102, | ||
123 | MX6SX_PAD_QSPI1A_SS1_B = 103, | ||
124 | MX6SX_PAD_QSPI1B_DATA0 = 104, | ||
125 | MX6SX_PAD_QSPI1B_DATA1 = 105, | ||
126 | MX6SX_PAD_QSPI1B_DATA2 = 106, | ||
127 | MX6SX_PAD_QSPI1B_DATA3 = 107, | ||
128 | MX6SX_PAD_QSPI1B_DQS = 108, | ||
129 | MX6SX_PAD_QSPI1B_SCLK = 109, | ||
130 | MX6SX_PAD_QSPI1B_SS0_B = 110, | ||
131 | MX6SX_PAD_QSPI1B_SS1_B = 111, | ||
132 | MX6SX_PAD_RGMII1_RD0 = 112, | ||
133 | MX6SX_PAD_RGMII1_RD1 = 113, | ||
134 | MX6SX_PAD_RGMII1_RD2 = 114, | ||
135 | MX6SX_PAD_RGMII1_RD3 = 115, | ||
136 | MX6SX_PAD_RGMII1_RX_CTL = 116, | ||
137 | MX6SX_PAD_RGMII1_RXC = 117, | ||
138 | MX6SX_PAD_RGMII1_TD0 = 118, | ||
139 | MX6SX_PAD_RGMII1_TD1 = 119, | ||
140 | MX6SX_PAD_RGMII1_TD2 = 120, | ||
141 | MX6SX_PAD_RGMII1_TD3 = 121, | ||
142 | MX6SX_PAD_RGMII1_TX_CTL = 122, | ||
143 | MX6SX_PAD_RGMII1_TXC = 123, | ||
144 | MX6SX_PAD_RGMII2_RD0 = 124, | ||
145 | MX6SX_PAD_RGMII2_RD1 = 125, | ||
146 | MX6SX_PAD_RGMII2_RD2 = 126, | ||
147 | MX6SX_PAD_RGMII2_RD3 = 127, | ||
148 | MX6SX_PAD_RGMII2_RX_CTL = 128, | ||
149 | MX6SX_PAD_RGMII2_RXC = 129, | ||
150 | MX6SX_PAD_RGMII2_TD0 = 130, | ||
151 | MX6SX_PAD_RGMII2_TD1 = 131, | ||
152 | MX6SX_PAD_RGMII2_TD2 = 132, | ||
153 | MX6SX_PAD_RGMII2_TD3 = 133, | ||
154 | MX6SX_PAD_RGMII2_TX_CTL = 134, | ||
155 | MX6SX_PAD_RGMII2_TXC = 135, | ||
156 | MX6SX_PAD_SD1_CLK = 136, | ||
157 | MX6SX_PAD_SD1_CMD = 137, | ||
158 | MX6SX_PAD_SD1_DATA0 = 138, | ||
159 | MX6SX_PAD_SD1_DATA1 = 139, | ||
160 | MX6SX_PAD_SD1_DATA2 = 140, | ||
161 | MX6SX_PAD_SD1_DATA3 = 141, | ||
162 | MX6SX_PAD_SD2_CLK = 142, | ||
163 | MX6SX_PAD_SD2_CMD = 143, | ||
164 | MX6SX_PAD_SD2_DATA0 = 144, | ||
165 | MX6SX_PAD_SD2_DATA1 = 145, | ||
166 | MX6SX_PAD_SD2_DATA2 = 146, | ||
167 | MX6SX_PAD_SD2_DATA3 = 147, | ||
168 | MX6SX_PAD_SD3_CLK = 148, | ||
169 | MX6SX_PAD_SD3_CMD = 149, | ||
170 | MX6SX_PAD_SD3_DATA0 = 150, | ||
171 | MX6SX_PAD_SD3_DATA1 = 151, | ||
172 | MX6SX_PAD_SD3_DATA2 = 152, | ||
173 | MX6SX_PAD_SD3_DATA3 = 153, | ||
174 | MX6SX_PAD_SD3_DATA4 = 154, | ||
175 | MX6SX_PAD_SD3_DATA5 = 155, | ||
176 | MX6SX_PAD_SD3_DATA6 = 156, | ||
177 | MX6SX_PAD_SD3_DATA7 = 157, | ||
178 | MX6SX_PAD_SD4_CLK = 158, | ||
179 | MX6SX_PAD_SD4_CMD = 159, | ||
180 | MX6SX_PAD_SD4_DATA0 = 160, | ||
181 | MX6SX_PAD_SD4_DATA1 = 161, | ||
182 | MX6SX_PAD_SD4_DATA2 = 162, | ||
183 | MX6SX_PAD_SD4_DATA3 = 163, | ||
184 | MX6SX_PAD_SD4_DATA4 = 164, | ||
185 | MX6SX_PAD_SD4_DATA5 = 165, | ||
186 | MX6SX_PAD_SD4_DATA6 = 166, | ||
187 | MX6SX_PAD_SD4_DATA7 = 167, | ||
188 | MX6SX_PAD_SD4_RESET_B = 168, | ||
189 | MX6SX_PAD_USB_H_DATA = 169, | ||
190 | MX6SX_PAD_USB_H_STROBE = 170, | ||
191 | }; | ||
192 | |||
193 | /* Pad names for the pinmux subsystem */ | ||
194 | static const struct pinctrl_pin_desc imx6sx_pinctrl_pads[] = { | ||
195 | IMX_PINCTRL_PIN(MX6Sx_PAD_RESERVE0), | ||
196 | IMX_PINCTRL_PIN(MX6Sx_PAD_RESERVE1), | ||
197 | IMX_PINCTRL_PIN(MX6Sx_PAD_RESERVE2), | ||
198 | IMX_PINCTRL_PIN(MX6Sx_PAD_RESERVE3), | ||
199 | IMX_PINCTRL_PIN(MX6Sx_PAD_RESERVE4), | ||
200 | IMX_PINCTRL_PIN(MX6SX_PAD_GPIO1_IO00), | ||
201 | IMX_PINCTRL_PIN(MX6SX_PAD_GPIO1_IO01), | ||
202 | IMX_PINCTRL_PIN(MX6SX_PAD_GPIO1_IO02), | ||
203 | IMX_PINCTRL_PIN(MX6SX_PAD_GPIO1_IO03), | ||
204 | IMX_PINCTRL_PIN(MX6SX_PAD_GPIO1_IO04), | ||
205 | IMX_PINCTRL_PIN(MX6SX_PAD_GPIO1_IO05), | ||
206 | IMX_PINCTRL_PIN(MX6SX_PAD_GPIO1_IO06), | ||
207 | IMX_PINCTRL_PIN(MX6SX_PAD_GPIO1_IO07), | ||
208 | IMX_PINCTRL_PIN(MX6SX_PAD_GPIO1_IO08), | ||
209 | IMX_PINCTRL_PIN(MX6SX_PAD_GPIO1_IO09), | ||
210 | IMX_PINCTRL_PIN(MX6SX_PAD_GPIO1_IO10), | ||
211 | IMX_PINCTRL_PIN(MX6SX_PAD_GPIO1_IO11), | ||
212 | IMX_PINCTRL_PIN(MX6SX_PAD_GPIO1_IO12), | ||
213 | IMX_PINCTRL_PIN(MX6SX_PAD_GPIO1_IO13), | ||
214 | IMX_PINCTRL_PIN(MX6SX_PAD_CSI_DATA00), | ||
215 | IMX_PINCTRL_PIN(MX6SX_PAD_CSI_DATA01), | ||
216 | IMX_PINCTRL_PIN(MX6SX_PAD_CSI_DATA02), | ||
217 | IMX_PINCTRL_PIN(MX6SX_PAD_CSI_DATA03), | ||
218 | IMX_PINCTRL_PIN(MX6SX_PAD_CSI_DATA04), | ||
219 | IMX_PINCTRL_PIN(MX6SX_PAD_CSI_DATA05), | ||
220 | IMX_PINCTRL_PIN(MX6SX_PAD_CSI_DATA06), | ||
221 | IMX_PINCTRL_PIN(MX6SX_PAD_CSI_DATA07), | ||
222 | IMX_PINCTRL_PIN(MX6SX_PAD_CSI_HSYNC), | ||
223 | IMX_PINCTRL_PIN(MX6SX_PAD_CSI_MCLK), | ||
224 | IMX_PINCTRL_PIN(MX6SX_PAD_CSI_PIXCLK), | ||
225 | IMX_PINCTRL_PIN(MX6SX_PAD_CSI_VSYNC), | ||
226 | IMX_PINCTRL_PIN(MX6SX_PAD_ENET1_COL), | ||
227 | IMX_PINCTRL_PIN(MX6SX_PAD_ENET1_CRS), | ||
228 | IMX_PINCTRL_PIN(MX6SX_PAD_ENET1_MDC), | ||
229 | IMX_PINCTRL_PIN(MX6SX_PAD_ENET1_MDIO), | ||
230 | IMX_PINCTRL_PIN(MX6SX_PAD_ENET1_RX_CLK), | ||
231 | IMX_PINCTRL_PIN(MX6SX_PAD_ENET1_TX_CLK), | ||
232 | IMX_PINCTRL_PIN(MX6SX_PAD_ENET2_COL), | ||
233 | IMX_PINCTRL_PIN(MX6SX_PAD_ENET2_CRS), | ||
234 | IMX_PINCTRL_PIN(MX6SX_PAD_ENET2_RX_CLK), | ||
235 | IMX_PINCTRL_PIN(MX6SX_PAD_ENET2_TX_CLK), | ||
236 | IMX_PINCTRL_PIN(MX6SX_PAD_KEY_COL0), | ||
237 | IMX_PINCTRL_PIN(MX6SX_PAD_KEY_COL1), | ||
238 | IMX_PINCTRL_PIN(MX6SX_PAD_KEY_COL2), | ||
239 | IMX_PINCTRL_PIN(MX6SX_PAD_KEY_COL3), | ||
240 | IMX_PINCTRL_PIN(MX6SX_PAD_KEY_COL4), | ||
241 | IMX_PINCTRL_PIN(MX6SX_PAD_KEY_ROW0), | ||
242 | IMX_PINCTRL_PIN(MX6SX_PAD_KEY_ROW1), | ||
243 | IMX_PINCTRL_PIN(MX6SX_PAD_KEY_ROW2), | ||
244 | IMX_PINCTRL_PIN(MX6SX_PAD_KEY_ROW3), | ||
245 | IMX_PINCTRL_PIN(MX6SX_PAD_KEY_ROW4), | ||
246 | IMX_PINCTRL_PIN(MX6SX_PAD_LCD1_CLK), | ||
247 | IMX_PINCTRL_PIN(MX6SX_PAD_LCD1_DATA00), | ||
248 | IMX_PINCTRL_PIN(MX6SX_PAD_LCD1_DATA01), | ||
249 | IMX_PINCTRL_PIN(MX6SX_PAD_LCD1_DATA02), | ||
250 | IMX_PINCTRL_PIN(MX6SX_PAD_LCD1_DATA03), | ||
251 | IMX_PINCTRL_PIN(MX6SX_PAD_LCD1_DATA04), | ||
252 | IMX_PINCTRL_PIN(MX6SX_PAD_LCD1_DATA05), | ||
253 | IMX_PINCTRL_PIN(MX6SX_PAD_LCD1_DATA06), | ||
254 | IMX_PINCTRL_PIN(MX6SX_PAD_LCD1_DATA07), | ||
255 | IMX_PINCTRL_PIN(MX6SX_PAD_LCD1_DATA08), | ||
256 | IMX_PINCTRL_PIN(MX6SX_PAD_LCD1_DATA09), | ||
257 | IMX_PINCTRL_PIN(MX6SX_PAD_LCD1_DATA10), | ||
258 | IMX_PINCTRL_PIN(MX6SX_PAD_LCD1_DATA11), | ||
259 | IMX_PINCTRL_PIN(MX6SX_PAD_LCD1_DATA12), | ||
260 | IMX_PINCTRL_PIN(MX6SX_PAD_LCD1_DATA13), | ||
261 | IMX_PINCTRL_PIN(MX6SX_PAD_LCD1_DATA14), | ||
262 | IMX_PINCTRL_PIN(MX6SX_PAD_LCD1_DATA15), | ||
263 | IMX_PINCTRL_PIN(MX6SX_PAD_LCD1_DATA16), | ||
264 | IMX_PINCTRL_PIN(MX6SX_PAD_LCD1_DATA17), | ||
265 | IMX_PINCTRL_PIN(MX6SX_PAD_LCD1_DATA18), | ||
266 | IMX_PINCTRL_PIN(MX6SX_PAD_LCD1_DATA19), | ||
267 | IMX_PINCTRL_PIN(MX6SX_PAD_LCD1_DATA20), | ||
268 | IMX_PINCTRL_PIN(MX6SX_PAD_LCD1_DATA21), | ||
269 | IMX_PINCTRL_PIN(MX6SX_PAD_LCD1_DATA22), | ||
270 | IMX_PINCTRL_PIN(MX6SX_PAD_LCD1_DATA23), | ||
271 | IMX_PINCTRL_PIN(MX6SX_PAD_LCD1_ENABLE), | ||
272 | IMX_PINCTRL_PIN(MX6SX_PAD_LCD1_HSYNC), | ||
273 | IMX_PINCTRL_PIN(MX6SX_PAD_LCD1_RESET), | ||
274 | IMX_PINCTRL_PIN(MX6SX_PAD_LCD1_VSYNC), | ||
275 | IMX_PINCTRL_PIN(MX6SX_PAD_NAND_ALE), | ||
276 | IMX_PINCTRL_PIN(MX6SX_PAD_NAND_CE0_B), | ||
277 | IMX_PINCTRL_PIN(MX6SX_PAD_NAND_CE1_B), | ||
278 | IMX_PINCTRL_PIN(MX6SX_PAD_NAND_CLE), | ||
279 | IMX_PINCTRL_PIN(MX6SX_PAD_NAND_DATA00), | ||
280 | IMX_PINCTRL_PIN(MX6SX_PAD_NAND_DATA01), | ||
281 | IMX_PINCTRL_PIN(MX6SX_PAD_NAND_DATA02), | ||
282 | IMX_PINCTRL_PIN(MX6SX_PAD_NAND_DATA03), | ||
283 | IMX_PINCTRL_PIN(MX6SX_PAD_NAND_DATA04), | ||
284 | IMX_PINCTRL_PIN(MX6SX_PAD_NAND_DATA05), | ||
285 | IMX_PINCTRL_PIN(MX6SX_PAD_NAND_DATA06), | ||
286 | IMX_PINCTRL_PIN(MX6SX_PAD_NAND_DATA07), | ||
287 | IMX_PINCTRL_PIN(MX6SX_PAD_NAND_RE_B), | ||
288 | IMX_PINCTRL_PIN(MX6SX_PAD_NAND_READY_B), | ||
289 | IMX_PINCTRL_PIN(MX6SX_PAD_NAND_WE_B), | ||
290 | IMX_PINCTRL_PIN(MX6SX_PAD_NAND_WP_B), | ||
291 | IMX_PINCTRL_PIN(MX6SX_PAD_QSPI1A_DATA0), | ||
292 | IMX_PINCTRL_PIN(MX6SX_PAD_QSPI1A_DATA1), | ||
293 | IMX_PINCTRL_PIN(MX6SX_PAD_QSPI1A_DATA2), | ||
294 | IMX_PINCTRL_PIN(MX6SX_PAD_QSPI1A_DATA3), | ||
295 | IMX_PINCTRL_PIN(MX6SX_PAD_QSPI1A_DQS), | ||
296 | IMX_PINCTRL_PIN(MX6SX_PAD_QSPI1A_SCLK), | ||
297 | IMX_PINCTRL_PIN(MX6SX_PAD_QSPI1A_SS0_B), | ||
298 | IMX_PINCTRL_PIN(MX6SX_PAD_QSPI1A_SS1_B), | ||
299 | IMX_PINCTRL_PIN(MX6SX_PAD_QSPI1B_DATA0), | ||
300 | IMX_PINCTRL_PIN(MX6SX_PAD_QSPI1B_DATA1), | ||
301 | IMX_PINCTRL_PIN(MX6SX_PAD_QSPI1B_DATA2), | ||
302 | IMX_PINCTRL_PIN(MX6SX_PAD_QSPI1B_DATA3), | ||
303 | IMX_PINCTRL_PIN(MX6SX_PAD_QSPI1B_DQS), | ||
304 | IMX_PINCTRL_PIN(MX6SX_PAD_QSPI1B_SCLK), | ||
305 | IMX_PINCTRL_PIN(MX6SX_PAD_QSPI1B_SS0_B), | ||
306 | IMX_PINCTRL_PIN(MX6SX_PAD_QSPI1B_SS1_B), | ||
307 | IMX_PINCTRL_PIN(MX6SX_PAD_RGMII1_RD0), | ||
308 | IMX_PINCTRL_PIN(MX6SX_PAD_RGMII1_RD1), | ||
309 | IMX_PINCTRL_PIN(MX6SX_PAD_RGMII1_RD2), | ||
310 | IMX_PINCTRL_PIN(MX6SX_PAD_RGMII1_RD3), | ||
311 | IMX_PINCTRL_PIN(MX6SX_PAD_RGMII1_RX_CTL), | ||
312 | IMX_PINCTRL_PIN(MX6SX_PAD_RGMII1_RXC), | ||
313 | IMX_PINCTRL_PIN(MX6SX_PAD_RGMII1_TD0), | ||
314 | IMX_PINCTRL_PIN(MX6SX_PAD_RGMII1_TD1), | ||
315 | IMX_PINCTRL_PIN(MX6SX_PAD_RGMII1_TD2), | ||
316 | IMX_PINCTRL_PIN(MX6SX_PAD_RGMII1_TD3), | ||
317 | IMX_PINCTRL_PIN(MX6SX_PAD_RGMII1_TX_CTL), | ||
318 | IMX_PINCTRL_PIN(MX6SX_PAD_RGMII1_TXC), | ||
319 | IMX_PINCTRL_PIN(MX6SX_PAD_RGMII2_RD0), | ||
320 | IMX_PINCTRL_PIN(MX6SX_PAD_RGMII2_RD1), | ||
321 | IMX_PINCTRL_PIN(MX6SX_PAD_RGMII2_RD2), | ||
322 | IMX_PINCTRL_PIN(MX6SX_PAD_RGMII2_RD3), | ||
323 | IMX_PINCTRL_PIN(MX6SX_PAD_RGMII2_RX_CTL), | ||
324 | IMX_PINCTRL_PIN(MX6SX_PAD_RGMII2_RXC), | ||
325 | IMX_PINCTRL_PIN(MX6SX_PAD_RGMII2_TD0), | ||
326 | IMX_PINCTRL_PIN(MX6SX_PAD_RGMII2_TD1), | ||
327 | IMX_PINCTRL_PIN(MX6SX_PAD_RGMII2_TD2), | ||
328 | IMX_PINCTRL_PIN(MX6SX_PAD_RGMII2_TD3), | ||
329 | IMX_PINCTRL_PIN(MX6SX_PAD_RGMII2_TX_CTL), | ||
330 | IMX_PINCTRL_PIN(MX6SX_PAD_RGMII2_TXC), | ||
331 | IMX_PINCTRL_PIN(MX6SX_PAD_SD1_CLK), | ||
332 | IMX_PINCTRL_PIN(MX6SX_PAD_SD1_CMD), | ||
333 | IMX_PINCTRL_PIN(MX6SX_PAD_SD1_DATA0), | ||
334 | IMX_PINCTRL_PIN(MX6SX_PAD_SD1_DATA1), | ||
335 | IMX_PINCTRL_PIN(MX6SX_PAD_SD1_DATA2), | ||
336 | IMX_PINCTRL_PIN(MX6SX_PAD_SD1_DATA3), | ||
337 | IMX_PINCTRL_PIN(MX6SX_PAD_SD2_CLK), | ||
338 | IMX_PINCTRL_PIN(MX6SX_PAD_SD2_CMD), | ||
339 | IMX_PINCTRL_PIN(MX6SX_PAD_SD2_DATA0), | ||
340 | IMX_PINCTRL_PIN(MX6SX_PAD_SD2_DATA1), | ||
341 | IMX_PINCTRL_PIN(MX6SX_PAD_SD2_DATA2), | ||
342 | IMX_PINCTRL_PIN(MX6SX_PAD_SD2_DATA3), | ||
343 | IMX_PINCTRL_PIN(MX6SX_PAD_SD3_CLK), | ||
344 | IMX_PINCTRL_PIN(MX6SX_PAD_SD3_CMD), | ||
345 | IMX_PINCTRL_PIN(MX6SX_PAD_SD3_DATA0), | ||
346 | IMX_PINCTRL_PIN(MX6SX_PAD_SD3_DATA1), | ||
347 | IMX_PINCTRL_PIN(MX6SX_PAD_SD3_DATA2), | ||
348 | IMX_PINCTRL_PIN(MX6SX_PAD_SD3_DATA3), | ||
349 | IMX_PINCTRL_PIN(MX6SX_PAD_SD3_DATA4), | ||
350 | IMX_PINCTRL_PIN(MX6SX_PAD_SD3_DATA5), | ||
351 | IMX_PINCTRL_PIN(MX6SX_PAD_SD3_DATA6), | ||
352 | IMX_PINCTRL_PIN(MX6SX_PAD_SD3_DATA7), | ||
353 | IMX_PINCTRL_PIN(MX6SX_PAD_SD4_CLK), | ||
354 | IMX_PINCTRL_PIN(MX6SX_PAD_SD4_CMD), | ||
355 | IMX_PINCTRL_PIN(MX6SX_PAD_SD4_DATA0), | ||
356 | IMX_PINCTRL_PIN(MX6SX_PAD_SD4_DATA1), | ||
357 | IMX_PINCTRL_PIN(MX6SX_PAD_SD4_DATA2), | ||
358 | IMX_PINCTRL_PIN(MX6SX_PAD_SD4_DATA3), | ||
359 | IMX_PINCTRL_PIN(MX6SX_PAD_SD4_DATA4), | ||
360 | IMX_PINCTRL_PIN(MX6SX_PAD_SD4_DATA5), | ||
361 | IMX_PINCTRL_PIN(MX6SX_PAD_SD4_DATA6), | ||
362 | IMX_PINCTRL_PIN(MX6SX_PAD_SD4_DATA7), | ||
363 | IMX_PINCTRL_PIN(MX6SX_PAD_SD4_RESET_B), | ||
364 | IMX_PINCTRL_PIN(MX6SX_PAD_USB_H_DATA), | ||
365 | IMX_PINCTRL_PIN(MX6SX_PAD_USB_H_STROBE), | ||
366 | }; | ||
367 | |||
368 | static struct imx_pinctrl_soc_info imx6sx_pinctrl_info = { | ||
369 | .pins = imx6sx_pinctrl_pads, | ||
370 | .npins = ARRAY_SIZE(imx6sx_pinctrl_pads), | ||
371 | }; | ||
372 | |||
373 | static struct of_device_id imx6sx_pinctrl_of_match[] = { | ||
374 | { .compatible = "fsl,imx6sx-iomuxc", }, | ||
375 | { /* sentinel */ } | ||
376 | }; | ||
377 | |||
378 | static int imx6sx_pinctrl_probe(struct platform_device *pdev) | ||
379 | { | ||
380 | return imx_pinctrl_probe(pdev, &imx6sx_pinctrl_info); | ||
381 | } | ||
382 | |||
383 | static struct platform_driver imx6sx_pinctrl_driver = { | ||
384 | .driver = { | ||
385 | .name = "imx6sx-pinctrl", | ||
386 | .owner = THIS_MODULE, | ||
387 | .of_match_table = of_match_ptr(imx6sx_pinctrl_of_match), | ||
388 | }, | ||
389 | .probe = imx6sx_pinctrl_probe, | ||
390 | .remove = imx_pinctrl_remove, | ||
391 | }; | ||
392 | |||
393 | static int __init imx6sx_pinctrl_init(void) | ||
394 | { | ||
395 | return platform_driver_register(&imx6sx_pinctrl_driver); | ||
396 | } | ||
397 | arch_initcall(imx6sx_pinctrl_init); | ||
398 | |||
399 | static void __exit imx6sx_pinctrl_exit(void) | ||
400 | { | ||
401 | platform_driver_unregister(&imx6sx_pinctrl_driver); | ||
402 | } | ||
403 | module_exit(imx6sx_pinctrl_exit); | ||
404 | |||
405 | MODULE_AUTHOR("Anson Huang <Anson.Huang@freescale.com>"); | ||
406 | MODULE_DESCRIPTION("Freescale imx6sx pinctrl driver"); | ||
407 | MODULE_LICENSE("GPL v2"); | ||