diff options
author | Dhananjay Phadke <dhananjay@netxen.com> | 2009-08-05 03:34:08 -0400 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2009-08-05 15:40:14 -0400 |
commit | 06db58c0cd92e157a4ccf2b6836c9f4b931c7cda (patch) | |
tree | 003f8a932093acfc073491b9e43e783b3a6ff088 /drivers | |
parent | 545eb370087494dcf267e6285fe3aa20e5617c33 (diff) |
netxen: remove unnecessary structures
Remove unnecessary offsetof calulations on these structures:
netxen_board_info, netxen_user_old_info, netxen_new_user_info.
The offsets into the flash are fixed, don't need to be calculated.
Signed-off-by: Dhananjay Phadke <dhananjay@netxen.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/net/netxen/netxen_nic.h | 167 | ||||
-rw-r--r-- | drivers/net/netxen/netxen_nic_hw.c | 27 |
2 files changed, 18 insertions, 176 deletions
diff --git a/drivers/net/netxen/netxen_nic.h b/drivers/net/netxen/netxen_nic.h index e22d08615893..bb4aa4f58676 100644 --- a/drivers/net/netxen/netxen_nic.h +++ b/drivers/net/netxen/netxen_nic.h | |||
@@ -441,154 +441,6 @@ struct status_desc { | |||
441 | #define NETXEN_BRDTYPE_P3_10G_XFP 0x0032 | 441 | #define NETXEN_BRDTYPE_P3_10G_XFP 0x0032 |
442 | #define NETXEN_BRDTYPE_P3_10G_TP 0x0080 | 442 | #define NETXEN_BRDTYPE_P3_10G_TP 0x0080 |
443 | 443 | ||
444 | struct netxen_board_info { | ||
445 | u32 header_version; | ||
446 | |||
447 | u32 board_mfg; | ||
448 | u32 board_type; | ||
449 | u32 board_num; | ||
450 | u32 chip_id; | ||
451 | u32 chip_minor; | ||
452 | u32 chip_major; | ||
453 | u32 chip_pkg; | ||
454 | u32 chip_lot; | ||
455 | |||
456 | u32 port_mask; /* available niu ports */ | ||
457 | u32 peg_mask; /* available pegs */ | ||
458 | u32 icache_ok; /* can we run with icache? */ | ||
459 | u32 dcache_ok; /* can we run with dcache? */ | ||
460 | u32 casper_ok; | ||
461 | |||
462 | u32 mac_addr_lo_0; | ||
463 | u32 mac_addr_lo_1; | ||
464 | u32 mac_addr_lo_2; | ||
465 | u32 mac_addr_lo_3; | ||
466 | |||
467 | /* MN-related config */ | ||
468 | u32 mn_sync_mode; /* enable/ sync shift cclk/ sync shift mclk */ | ||
469 | u32 mn_sync_shift_cclk; | ||
470 | u32 mn_sync_shift_mclk; | ||
471 | u32 mn_wb_en; | ||
472 | u32 mn_crystal_freq; /* in MHz */ | ||
473 | u32 mn_speed; /* in MHz */ | ||
474 | u32 mn_org; | ||
475 | u32 mn_depth; | ||
476 | u32 mn_ranks_0; /* ranks per slot */ | ||
477 | u32 mn_ranks_1; /* ranks per slot */ | ||
478 | u32 mn_rd_latency_0; | ||
479 | u32 mn_rd_latency_1; | ||
480 | u32 mn_rd_latency_2; | ||
481 | u32 mn_rd_latency_3; | ||
482 | u32 mn_rd_latency_4; | ||
483 | u32 mn_rd_latency_5; | ||
484 | u32 mn_rd_latency_6; | ||
485 | u32 mn_rd_latency_7; | ||
486 | u32 mn_rd_latency_8; | ||
487 | u32 mn_dll_val[18]; | ||
488 | u32 mn_mode_reg; /* MIU DDR Mode Register */ | ||
489 | u32 mn_ext_mode_reg; /* MIU DDR Extended Mode Register */ | ||
490 | u32 mn_timing_0; /* MIU Memory Control Timing Rgister */ | ||
491 | u32 mn_timing_1; /* MIU Extended Memory Ctrl Timing Register */ | ||
492 | u32 mn_timing_2; /* MIU Extended Memory Ctrl Timing2 Register */ | ||
493 | |||
494 | /* SN-related config */ | ||
495 | u32 sn_sync_mode; /* enable/ sync shift cclk / sync shift mclk */ | ||
496 | u32 sn_pt_mode; /* pass through mode */ | ||
497 | u32 sn_ecc_en; | ||
498 | u32 sn_wb_en; | ||
499 | u32 sn_crystal_freq; | ||
500 | u32 sn_speed; | ||
501 | u32 sn_org; | ||
502 | u32 sn_depth; | ||
503 | u32 sn_dll_tap; | ||
504 | u32 sn_rd_latency; | ||
505 | |||
506 | u32 mac_addr_hi_0; | ||
507 | u32 mac_addr_hi_1; | ||
508 | u32 mac_addr_hi_2; | ||
509 | u32 mac_addr_hi_3; | ||
510 | |||
511 | u32 magic; /* indicates flash has been initialized */ | ||
512 | |||
513 | u32 mn_rdimm; | ||
514 | u32 mn_dll_override; | ||
515 | |||
516 | }; | ||
517 | |||
518 | #define FLASH_NUM_PORTS (4) | ||
519 | |||
520 | struct netxen_flash_mac_addr { | ||
521 | u32 flash_addr[32]; | ||
522 | }; | ||
523 | |||
524 | struct netxen_user_old_info { | ||
525 | u8 flash_md5[16]; | ||
526 | u8 crbinit_md5[16]; | ||
527 | u8 brdcfg_md5[16]; | ||
528 | /* bootloader */ | ||
529 | u32 bootld_version; | ||
530 | u32 bootld_size; | ||
531 | u8 bootld_md5[16]; | ||
532 | /* image */ | ||
533 | u32 image_version; | ||
534 | u32 image_size; | ||
535 | u8 image_md5[16]; | ||
536 | /* primary image status */ | ||
537 | u32 primary_status; | ||
538 | u32 secondary_present; | ||
539 | |||
540 | /* MAC address , 4 ports */ | ||
541 | struct netxen_flash_mac_addr mac_addr[FLASH_NUM_PORTS]; | ||
542 | }; | ||
543 | #define FLASH_NUM_MAC_PER_PORT 32 | ||
544 | struct netxen_user_info { | ||
545 | u8 flash_md5[16 * 64]; | ||
546 | /* bootloader */ | ||
547 | u32 bootld_version; | ||
548 | u32 bootld_size; | ||
549 | /* image */ | ||
550 | u32 image_version; | ||
551 | u32 image_size; | ||
552 | /* primary image status */ | ||
553 | u32 primary_status; | ||
554 | u32 secondary_present; | ||
555 | |||
556 | /* MAC address , 4 ports, 32 address per port */ | ||
557 | u64 mac_addr[FLASH_NUM_PORTS * FLASH_NUM_MAC_PER_PORT]; | ||
558 | u32 sub_sys_id; | ||
559 | u8 serial_num[32]; | ||
560 | |||
561 | /* Any user defined data */ | ||
562 | }; | ||
563 | |||
564 | /* | ||
565 | * Flash Layout - new format. | ||
566 | */ | ||
567 | struct netxen_new_user_info { | ||
568 | u8 flash_md5[16 * 64]; | ||
569 | /* bootloader */ | ||
570 | u32 bootld_version; | ||
571 | u32 bootld_size; | ||
572 | /* image */ | ||
573 | u32 image_version; | ||
574 | u32 image_size; | ||
575 | /* primary image status */ | ||
576 | u32 primary_status; | ||
577 | u32 secondary_present; | ||
578 | |||
579 | /* MAC address , 4 ports, 32 address per port */ | ||
580 | u64 mac_addr[FLASH_NUM_PORTS * FLASH_NUM_MAC_PER_PORT]; | ||
581 | u32 sub_sys_id; | ||
582 | u8 serial_num[32]; | ||
583 | |||
584 | /* Any user defined data */ | ||
585 | }; | ||
586 | |||
587 | #define SECONDARY_IMAGE_PRESENT 0xb3b4b5b6 | ||
588 | #define SECONDARY_IMAGE_ABSENT 0xffffffff | ||
589 | #define PRIMARY_IMAGE_GOOD 0x5a5a5a5a | ||
590 | #define PRIMARY_IMAGE_BAD 0xffffffff | ||
591 | |||
592 | /* Flash memory map */ | 444 | /* Flash memory map */ |
593 | #define NETXEN_CRBINIT_START 0 /* crbinit section */ | 445 | #define NETXEN_CRBINIT_START 0 /* crbinit section */ |
594 | #define NETXEN_BRDCFG_START 0x4000 /* board config */ | 446 | #define NETXEN_BRDCFG_START 0x4000 /* board config */ |
@@ -599,28 +451,25 @@ struct netxen_new_user_info { | |||
599 | #define NETXEN_PXE_START 0x3E0000 /* PXE boot rom */ | 451 | #define NETXEN_PXE_START 0x3E0000 /* PXE boot rom */ |
600 | #define NETXEN_USER_START 0x3E8000 /* Firmare info */ | 452 | #define NETXEN_USER_START 0x3E8000 /* Firmare info */ |
601 | #define NETXEN_FIXED_START 0x3F0000 /* backup of crbinit */ | 453 | #define NETXEN_FIXED_START 0x3F0000 /* backup of crbinit */ |
454 | #define NETXEN_USER_START_OLD NETXEN_PXE_START /* very old flash */ | ||
602 | 455 | ||
456 | #define NX_OLD_MAC_ADDR_OFFSET (NETXEN_USER_START) | ||
603 | #define NX_FW_VERSION_OFFSET (NETXEN_USER_START+0x408) | 457 | #define NX_FW_VERSION_OFFSET (NETXEN_USER_START+0x408) |
604 | #define NX_FW_SIZE_OFFSET (NETXEN_USER_START+0x40c) | 458 | #define NX_FW_SIZE_OFFSET (NETXEN_USER_START+0x40c) |
459 | #define NX_FW_MAC_ADDR_OFFSET (NETXEN_USER_START+0x418) | ||
460 | #define NX_FW_SERIAL_NUM_OFFSET (NETXEN_USER_START+0x81c) | ||
605 | #define NX_BIOS_VERSION_OFFSET (NETXEN_USER_START+0x83c) | 461 | #define NX_BIOS_VERSION_OFFSET (NETXEN_USER_START+0x83c) |
462 | |||
463 | #define NX_HDR_VERSION_OFFSET (NETXEN_BRDCFG_START) | ||
464 | #define NX_BRDTYPE_OFFSET (NETXEN_BRDCFG_START+0x8) | ||
606 | #define NX_FW_MAGIC_OFFSET (NETXEN_BRDCFG_START+0x128) | 465 | #define NX_FW_MAGIC_OFFSET (NETXEN_BRDCFG_START+0x128) |
466 | |||
607 | #define NX_FW_MIN_SIZE (0x3fffff) | 467 | #define NX_FW_MIN_SIZE (0x3fffff) |
608 | #define NX_P2_MN_ROMIMAGE 0 | 468 | #define NX_P2_MN_ROMIMAGE 0 |
609 | #define NX_P3_CT_ROMIMAGE 1 | 469 | #define NX_P3_CT_ROMIMAGE 1 |
610 | #define NX_P3_MN_ROMIMAGE 2 | 470 | #define NX_P3_MN_ROMIMAGE 2 |
611 | #define NX_FLASH_ROMIMAGE 3 | 471 | #define NX_FLASH_ROMIMAGE 3 |
612 | 472 | ||
613 | #define NETXEN_USER_START_OLD NETXEN_PXE_START /* for backward compatibility */ | ||
614 | |||
615 | #define NETXEN_FLASH_START (NETXEN_CRBINIT_START) | ||
616 | #define NETXEN_INIT_SECTOR (0) | ||
617 | #define NETXEN_PRIMARY_START (NETXEN_BOOTLD_START) | ||
618 | #define NETXEN_FLASH_CRBINIT_SIZE (0x4000) | ||
619 | #define NETXEN_FLASH_BRDCFG_SIZE (sizeof(struct netxen_board_info)) | ||
620 | #define NETXEN_FLASH_USER_SIZE (sizeof(struct netxen_user_info)/sizeof(u32)) | ||
621 | #define NETXEN_FLASH_SECONDARY_SIZE (NETXEN_USER_START-NETXEN_SECONDARY_START) | ||
622 | #define NETXEN_NUM_PRIMARY_SECTORS (0x20) | ||
623 | #define NETXEN_NUM_CONFIG_SECTORS (1) | ||
624 | extern char netxen_nic_driver_name[]; | 473 | extern char netxen_nic_driver_name[]; |
625 | 474 | ||
626 | /* Number of status descriptors to handle per interrupt */ | 475 | /* Number of status descriptors to handle per interrupt */ |
diff --git a/drivers/net/netxen/netxen_nic_hw.c b/drivers/net/netxen/netxen_nic_hw.c index ddb9deb12b33..673dcf5ea53d 100644 --- a/drivers/net/netxen/netxen_nic_hw.c +++ b/drivers/net/netxen/netxen_nic_hw.c | |||
@@ -816,18 +816,15 @@ int netxen_get_flash_mac_addr(struct netxen_adapter *adapter, __le64 *mac) | |||
816 | __le32 *pmac = (__le32 *) mac; | 816 | __le32 *pmac = (__le32 *) mac; |
817 | u32 offset; | 817 | u32 offset; |
818 | 818 | ||
819 | offset = NETXEN_USER_START + | 819 | offset = NX_FW_MAC_ADDR_OFFSET + (adapter->portnum * sizeof(u64)); |
820 | offsetof(struct netxen_new_user_info, mac_addr) + | ||
821 | adapter->portnum * sizeof(u64); | ||
822 | 820 | ||
823 | if (netxen_get_flash_block(adapter, offset, sizeof(u64), pmac) == -1) | 821 | if (netxen_get_flash_block(adapter, offset, sizeof(u64), pmac) == -1) |
824 | return -1; | 822 | return -1; |
825 | 823 | ||
826 | if (*mac == cpu_to_le64(~0ULL)) { | 824 | if (*mac == cpu_to_le64(~0ULL)) { |
827 | 825 | ||
828 | offset = NETXEN_USER_START_OLD + | 826 | offset = NX_OLD_MAC_ADDR_OFFSET + |
829 | offsetof(struct netxen_user_old_info, mac_addr) + | 827 | (adapter->portnum * sizeof(u64)); |
830 | adapter->portnum * sizeof(u64); | ||
831 | 828 | ||
832 | if (netxen_get_flash_block(adapter, | 829 | if (netxen_get_flash_block(adapter, |
833 | offset, sizeof(u64), pmac) == -1) | 830 | offset, sizeof(u64), pmac) == -1) |
@@ -1857,13 +1854,11 @@ int netxen_nic_get_board_info(struct netxen_adapter *adapter) | |||
1857 | int offset, board_type, magic, header_version; | 1854 | int offset, board_type, magic, header_version; |
1858 | struct pci_dev *pdev = adapter->pdev; | 1855 | struct pci_dev *pdev = adapter->pdev; |
1859 | 1856 | ||
1860 | offset = NETXEN_BRDCFG_START + | 1857 | offset = NX_FW_MAGIC_OFFSET; |
1861 | offsetof(struct netxen_board_info, magic); | ||
1862 | if (netxen_rom_fast_read(adapter, offset, &magic)) | 1858 | if (netxen_rom_fast_read(adapter, offset, &magic)) |
1863 | return -EIO; | 1859 | return -EIO; |
1864 | 1860 | ||
1865 | offset = NETXEN_BRDCFG_START + | 1861 | offset = NX_HDR_VERSION_OFFSET; |
1866 | offsetof(struct netxen_board_info, header_version); | ||
1867 | if (netxen_rom_fast_read(adapter, offset, &header_version)) | 1862 | if (netxen_rom_fast_read(adapter, offset, &header_version)) |
1868 | return -EIO; | 1863 | return -EIO; |
1869 | 1864 | ||
@@ -1875,8 +1870,7 @@ int netxen_nic_get_board_info(struct netxen_adapter *adapter) | |||
1875 | return -EIO; | 1870 | return -EIO; |
1876 | } | 1871 | } |
1877 | 1872 | ||
1878 | offset = NETXEN_BRDCFG_START + | 1873 | offset = NX_BRDTYPE_OFFSET; |
1879 | offsetof(struct netxen_board_info, board_type); | ||
1880 | if (netxen_rom_fast_read(adapter, offset, &board_type)) | 1874 | if (netxen_rom_fast_read(adapter, offset, &board_type)) |
1881 | return -EIO; | 1875 | return -EIO; |
1882 | 1876 | ||
@@ -2022,23 +2016,22 @@ void netxen_nic_get_firmware_info(struct netxen_adapter *adapter) | |||
2022 | u32 fw_major, fw_minor, fw_build; | 2016 | u32 fw_major, fw_minor, fw_build; |
2023 | char brd_name[NETXEN_MAX_SHORT_NAME]; | 2017 | char brd_name[NETXEN_MAX_SHORT_NAME]; |
2024 | char serial_num[32]; | 2018 | char serial_num[32]; |
2025 | int i, addr, val; | 2019 | int i, offset, val; |
2026 | int *ptr32; | 2020 | int *ptr32; |
2027 | struct pci_dev *pdev = adapter->pdev; | 2021 | struct pci_dev *pdev = adapter->pdev; |
2028 | 2022 | ||
2029 | adapter->driver_mismatch = 0; | 2023 | adapter->driver_mismatch = 0; |
2030 | 2024 | ||
2031 | ptr32 = (int *)&serial_num; | 2025 | ptr32 = (int *)&serial_num; |
2032 | addr = NETXEN_USER_START + | 2026 | offset = NX_FW_SERIAL_NUM_OFFSET; |
2033 | offsetof(struct netxen_new_user_info, serial_num); | ||
2034 | for (i = 0; i < 8; i++) { | 2027 | for (i = 0; i < 8; i++) { |
2035 | if (netxen_rom_fast_read(adapter, addr, &val) == -1) { | 2028 | if (netxen_rom_fast_read(adapter, offset, &val) == -1) { |
2036 | dev_err(&pdev->dev, "error reading board info\n"); | 2029 | dev_err(&pdev->dev, "error reading board info\n"); |
2037 | adapter->driver_mismatch = 1; | 2030 | adapter->driver_mismatch = 1; |
2038 | return; | 2031 | return; |
2039 | } | 2032 | } |
2040 | ptr32[i] = cpu_to_le32(val); | 2033 | ptr32[i] = cpu_to_le32(val); |
2041 | addr += sizeof(u32); | 2034 | offset += sizeof(u32); |
2042 | } | 2035 | } |
2043 | 2036 | ||
2044 | fw_major = NXRD32(adapter, NETXEN_FW_VERSION_MAJOR); | 2037 | fw_major = NXRD32(adapter, NETXEN_FW_VERSION_MAJOR); |