diff options
| author | Vivek Natarajan <vnatarajan@atheros.com> | 2011-03-10 00:35:42 -0500 |
|---|---|---|
| committer | John W. Linville <linville@tuxdriver.com> | 2011-03-11 14:15:36 -0500 |
| commit | 75e03512455827eb2c09e057578ae23178a93cf8 (patch) | |
| tree | 70a67b05a6b9534f30c0e9ec0d50f1db152c5999 /drivers | |
| parent | 7ea1362c5d49c5761ce9fc3a4bbb090813134d03 (diff) | |
ath9k_hw: Fix PLL initialization for AR9485.
Increase the delay to make sure the initialization of pll
passes.
Signed-off-by: Vivek Natarajan <vnatarajan@atheros.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/net/wireless/ath/ath9k/hw.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/net/wireless/ath/ath9k/hw.c b/drivers/net/wireless/ath/ath9k/hw.c index 9a3438174f86..338b07502f1a 100644 --- a/drivers/net/wireless/ath/ath9k/hw.c +++ b/drivers/net/wireless/ath/ath9k/hw.c | |||
| @@ -701,7 +701,7 @@ static void ath9k_hw_init_pll(struct ath_hw *ah, | |||
| 701 | AR_CH0_DPLL3_PHASE_SHIFT, DPLL3_PHASE_SHIFT_VAL); | 701 | AR_CH0_DPLL3_PHASE_SHIFT, DPLL3_PHASE_SHIFT_VAL); |
| 702 | 702 | ||
| 703 | REG_WRITE(ah, AR_RTC_PLL_CONTROL, 0x1142c); | 703 | REG_WRITE(ah, AR_RTC_PLL_CONTROL, 0x1142c); |
| 704 | udelay(100); | 704 | udelay(1000); |
| 705 | 705 | ||
| 706 | REG_WRITE(ah, AR_RTC_PLL_CONTROL2, 0x886666); | 706 | REG_WRITE(ah, AR_RTC_PLL_CONTROL2, 0x886666); |
| 707 | 707 | ||
| @@ -713,7 +713,7 @@ static void ath9k_hw_init_pll(struct ath_hw *ah, | |||
| 713 | REG_RMW_FIELD(ah, AR_CH0_BB_DPLL3, | 713 | REG_RMW_FIELD(ah, AR_CH0_BB_DPLL3, |
| 714 | AR_CH0_DPLL3_PHASE_SHIFT, DPLL3_PHASE_SHIFT_VAL); | 714 | AR_CH0_DPLL3_PHASE_SHIFT, DPLL3_PHASE_SHIFT_VAL); |
| 715 | REG_WRITE(ah, AR_RTC_PLL_CONTROL, 0x142c); | 715 | REG_WRITE(ah, AR_RTC_PLL_CONTROL, 0x142c); |
| 716 | udelay(110); | 716 | udelay(1000); |
| 717 | } | 717 | } |
| 718 | 718 | ||
| 719 | pll = ath9k_hw_compute_pll_control(ah, chan); | 719 | pll = ath9k_hw_compute_pll_control(ah, chan); |